[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / tso / tso_directed / tso_n1_self_mod1.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: tso_n1_self_mod1.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define MAIN_BASE_DATA_ADDR     0x160000
#define MAIN_BASE_TEXT_ADDR     0x150000
#define MAIN_BASE_DATA_ADDR_RA  0x100160000
#define MAIN_BASE_TEXT_ADDR_RA  0x100150000

#define USER_PAGE_CUSTOM_MAP
#include "hboot.s"

SECTION .MAIN  TEXT_VA=0x150000, DATA_VA=0x160000

attr_text {
        Name = .MAIN,
        VA=MAIN_BASE_TEXT_ADDR,
        RA=MAIN_BASE_TEXT_ADDR_RA,
        PA=ra2pa(MAIN_BASE_TEXT_ADDR_RA,0),
        part_0_ctx_nonzero_tsb_config_0,
        TTE_G=0, TTE_Context=PCONTEXT, TTE_V=1, TTE_Size=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_EP=1, TTE_P=0, TTE_W=1
        }
attr_data {
        Name = .MAIN,
        VA=MAIN_BASE_DATA_ADDR,
        RA=MAIN_BASE_DATA_ADDR_RA,
        PA=ra2pa(MAIN_BASE_DATA_ADDR_RA,0),
        part_0_ctx_nonzero_tsb_config_0,
        TTE_G=0, TTE_Context=PCONTEXT, TTE_V=1, TTE_Size=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
        }

.text
.global main
main:	clr	%l0

firstExecuteMain1:
	set	main1,%i0
	jmpl	%i0,%o7          !the jump causes a new cache line to be
        nop                      !loaded into the l2 and the icache.
        nop
        nop


modifyCodeAtMain1:
	set	copied_code, %i0	!get some known data into the store reg.
	ld	[%i0],%l0       
	set	main1,%i0           	!change the data at main1
	st	%l0,[%i0]
	flush	%i0 		    	!flush is mandatory here


execute_main1_again:
        set     main1,%i0
        jmpl    %i0,%o7          	!the jump causes a new cache line to be
        nop                      	!loaded into the ecache and the icache.

	mov 7, %l1		 	! check that the modified instruction
	sub %l1, %l0, %l1	 	! is used and not the original
	brnz,pn %l1, bad_end
	nop

get_new_cache_line:			! do pretty much the same thing
	set	main2, %i0		! with another address
	ld	[%i0], %l0		! modify the address and then
	set	new_cache_line, %i0
	st	%l0,[%i0]
	flush	%i0       

execute_new_cache_line:			! execute
        set     new_cache_line,%i0
        jmpl    %i0,%o7          	!the jump causes a new cache line to be
        nop                      	!loaded into the ecache and the icache.
        nop
        set  0xbe, %l1
        sub %l1, %l0, %l1
        brnz,pn %l1, bad_end
        nop
 
normal_end:
        ta      T_GOOD_TRAP
bad_end:
        ta      T_BAD_TRAP


!==========================================================================
! the point of these next two pages is to have text pages that
! can be written and read
! The first page holds 2 cache lines worth, the second page has 1 cache line.
!==========================================================================
main1:
        mov     1,%l0           ! Replaced with copied_code second pass
	jmpl	%o7+8, %g0
	nop
copied_code:
	mov	7,%l0
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
        nop
new_cache_line:
	mov	0xbad,%l0
	jmpl	%o7+8, %g0
        nop
        nop
user_text2_end:

main2:
        mov     0xbe,%l0           ! Replaced with copied_code second pass
	jmpl	%o7+8, %g0
	nop

!======================================
.data
user_data_start:
	.word 0x0
user_data_end:
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: tso_n1_self_mod1.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define MAIN_BASE_DATA_ADDR 0x160000
	39	#define MAIN_BASE_TEXT_ADDR 0x150000
	40	#define MAIN_BASE_DATA_ADDR_RA 0x100160000
	41	#define MAIN_BASE_TEXT_ADDR_RA 0x100150000
	42
	43	#define USER_PAGE_CUSTOM_MAP
	44	#include "hboot.s"
	45
	46	SECTION .MAIN TEXT_VA=0x150000, DATA_VA=0x160000
	47
	48	attr_text {
	49	Name = .MAIN,
	50	VA=MAIN_BASE_TEXT_ADDR,
	51	RA=MAIN_BASE_TEXT_ADDR_RA,
	52	PA=ra2pa(MAIN_BASE_TEXT_ADDR_RA,0),
	53	part_0_ctx_nonzero_tsb_config_0,
	54	TTE_G=0, TTE_Context=PCONTEXT, TTE_V=1, TTE_Size=0, TTE_NFO=0,
	55	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
	56	TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_EP=1, TTE_P=0, TTE_W=1
	57	}
	58	attr_data {
	59	Name = .MAIN,
	60	VA=MAIN_BASE_DATA_ADDR,
	61	RA=MAIN_BASE_DATA_ADDR_RA,
	62	PA=ra2pa(MAIN_BASE_DATA_ADDR_RA,0),
	63	part_0_ctx_nonzero_tsb_config_0,
	64	TTE_G=0, TTE_Context=PCONTEXT, TTE_V=1, TTE_Size=0, TTE_NFO=0,
65	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
66	TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
67	}
68
69	.text
70	.global main
71	main: clr %l0
72
73	firstExecuteMain1:
74	set main1,%i0
75	jmpl %i0,%o7 !the jump causes a new cache line to be
76	nop !loaded into the l2 and the icache.
77	nop
78	nop
79
80
81	modifyCodeAtMain1:
82	set copied_code, %i0 !get some known data into the store reg.
83	ld [%i0],%l0
84	set main1,%i0 !change the data at main1
85	st %l0,[%i0]
86	flush %i0 !flush is mandatory here
87
88
89	execute_main1_again:
90	set main1,%i0
91	jmpl %i0,%o7 !the jump causes a new cache line to be
92	nop !loaded into the ecache and the icache.
93
94	mov 7, %l1 ! check that the modified instruction
95	sub %l1, %l0, %l1 ! is used and not the original
96	brnz,pn %l1, bad_end
97	nop
98
99	get_new_cache_line: ! do pretty much the same thing
100	set main2, %i0 ! with another address
101	ld [%i0], %l0 ! modify the address and then
102	set new_cache_line, %i0
103	st %l0,[%i0]
104	flush %i0
105
106	execute_new_cache_line: ! execute
107	set new_cache_line,%i0
108	jmpl %i0,%o7 !the jump causes a new cache line to be
109	nop !loaded into the ecache and the icache.
110	nop
111	set 0xbe, %l1
112	sub %l1, %l0, %l1
113	brnz,pn %l1, bad_end
114	nop
115
116	normal_end:
117	ta T_GOOD_TRAP
118	bad_end:
119	ta T_BAD_TRAP
120
121
122	!==========================================================================
123	! the point of these next two pages is to have text pages that
124	! can be written and read
125	! The first page holds 2 cache lines worth, the second page has 1 cache line.
126	!==========================================================================
127	main1:
128	mov 1,%l0 ! Replaced with copied_code second pass
129	jmpl %o7+8, %g0
130	nop
131	copied_code:
132	mov 7,%l0
133	nop
134	nop
135	nop
136	nop
137	nop
138	nop
139	nop
140	nop
141	nop
142	nop
143	nop
144	nop
145	new_cache_line:
146	mov 0xbad,%l0
147	jmpl %o7+8, %g0
148	nop
149	nop
150	user_text2_end:
151
152	main2:
153	mov 0xbe,%l0 ! Replaced with copied_code second pass
154	jmpl %o7+8, %g0
155	nop
156
157	!======================================
158	.data
159	user_data_start:
160	.word 0x0
161	user_data_end: