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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: tso_n2_ncrdwr2_user.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define MAIN_PAGE_HV_ALSO | |
39 | #define PART0_NZ_RANOTPA_2 0 | |
40 | #define ENABLE_PCIE_LINK_TRAINING | |
41 | ||
42 | #define H_HT0_DAE_invalid_asi_0x14 | |
43 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ | |
44 | inc %l5;\ | |
45 | done; nop | |
46 | ||
47 | #define H_HT0_DAE_nc_page_0x16 | |
48 | #define SUN_H_HT0_DAE_nc_page_0x16 \ | |
49 | inc %l4;\ | |
50 | done; nop | |
51 | ||
52 | #define H_HT0_Privileged_Action_0x37 | |
53 | #define SUN_H_HT0_Privileged_Action_0x37 \ | |
54 | inc %l3;\ | |
55 | done; nop | |
56 | ||
57 | #include "hboot.s" | |
58 | ||
59 | .text | |
60 | .global main | |
61 | main: | |
62 | ta T_CHANGE_HPRIV | |
63 | nop | |
64 | ||
65 | /************************************ | |
66 | enable floating point unit | |
67 | ************************************/ | |
68 | wr %g0, 0x4, %fprs /* make sure fef is 1 */ | |
69 | ||
70 | ta T_CHANGE_NONHPRIV | |
71 | nop | |
72 | /************************************ | |
73 | set up pointers | |
74 | *************************************/ | |
75 | setx 0x00d01ee000, %g1, %g3 ! translates to the MEM32 address space | |
76 | ||
77 | /************************************ | |
78 | Start doing non cacheable access | |
79 | RW's are done to the DMUPIO space | |
80 | starting from 0xC1 | |
81 | *************************************/ | |
82 | mov %g0, %g4 | |
83 | set 0x1, %g2 | |
84 | set 0x10, %g5 | |
85 | ||
86 | stloop1: | |
87 | stx %g2, [%g3 + %g4] | |
88 | inc %g2 | |
89 | add 0x8, %g4, %g4 | |
90 | deccc %g5 | |
91 | bne stloop1 | |
92 | nop | |
93 | ||
94 | mov 0x78, %g4 | |
95 | set 0x10, %g2 | |
96 | set 0x10, %g5 | |
97 | ||
98 | ldloop1: | |
99 | ldx [%g3 + %g4], %g1 | |
100 | subcc %g2, %g1, %g0 | |
101 | bne h_bad_end | |
102 | nop | |
103 | dec %g2 | |
104 | sub %g4, 0x8, %g4 | |
105 | deccc %g5 | |
106 | bne ldloop1 | |
107 | nop | |
108 | !================================ | |
109 | ||
110 | mov 0, %l3 !! initialize the interrupt counter | |
111 | mov 0, %l4 !! initialize the interrupt counter | |
112 | mov 0, %l5 !! initialize the interrupt counter | |
113 | ||
114 | setx user_data_start, %g1, %g2 | |
115 | ldd [%g2], %f0 !! set up f regs in case data gets stored | |
116 | ldd [%g2+8], %f2 | |
117 | ldd [%g2+16], %f4 | |
118 | ldd [%g2+24], %f6 | |
119 | ldd [%g2+32], %f8 | |
120 | ldd [%g2+40], %f10 | |
121 | ldd [%g2+48], %f12 | |
122 | ldd [%g2+56], %f14 | |
123 | ldd [%g2+64], %f16 | |
124 | ||
125 | !!! These are mentioned in PRM (v1.1) 9.1.2 it says that | |
126 | !!! 16-byte loads generated by ldda ASI*QUAD_LDD* should get a DAE_nc_page, | |
127 | !!! and stores should take a DAE_invalid_asi exception. | |
128 | ||
129 | mov %g3, %g4 | |
130 | ||
131 | !================================ | |
132 | stda %f0, [%g3]ASI_BLK_P !! asi 0xf0 | |
133 | ldda [%g3]ASI_BLK_P, %f0 !! should take an exception | |
134 | ldx [%g4 + 0], %o0 !! check that the stda stored data | |
135 | ldx [%g4 + 8], %o1 | |
136 | ldx [%g4 + 16], %o2 | |
137 | ldx [%g4 + 24], %o3 | |
138 | ldx [%g4 + 32], %o4 | |
139 | ldx [%g4 + 40], %o5 | |
140 | ldx [%g4 + 48], %o6 | |
141 | ldx [%g4 + 56], %o7 | |
142 | !================================ | |
143 | add 0x40, %g4, %g4 | |
144 | stda %f16, [%g3]ASI_BLK_PL !! asi 0xf8 | |
145 | ldda [%g3]ASI_BLK_PL, %f16 !! should take an exception | |
146 | ldx [%g4 + 0], %o0 !! check that the stda stored data | |
147 | ldx [%g4 + 8], %o1 | |
148 | ldx [%g4 + 16], %o2 | |
149 | ldx [%g4 + 24], %o3 | |
150 | ldx [%g4 + 32], %o4 | |
151 | ldx [%g4 + 40], %o5 | |
152 | ldx [%g4 + 48], %o6 | |
153 | ldx [%g4 + 56], %o7 | |
154 | !================================ | |
155 | ! add 0x40, %g4, %g4 | |
156 | ! stda %f0, [%g3]ASI_BLK_S !! asi 0xf1 | |
157 | ! ldda [%g3]ASI_BLK_S, %f0 !! should take an exception | |
158 | ! ldx [%g4 + 0], %o0 !! check that the stda stored data | |
159 | ! ldx [%g4 + 8], %o1 | |
160 | ! ldx [%g4 + 16], %o2 | |
161 | ! ldx [%g4 + 24], %o3 | |
162 | ! ldx [%g4 + 32], %o4 | |
163 | ! ldx [%g4 + 40], %o5 | |
164 | ! ldx [%g4 + 48], %o6 | |
165 | ! ldx [%g4 + 56], %o7 | |
166 | !================================ | |
167 | ! add 0x40, %g4, %g4 | |
168 | ! stda %f16, [%g3]ASI_BLK_SL !! asi 0xf9 | |
169 | ! ldda [%g3]ASI_BLK_SL, %f16 !! should take an exception | |
170 | ! ldx [%g4 + 0], %o0 !! check that the stda stored data | |
171 | ! ldx [%g4 + 8], %o1 | |
172 | ! ldx [%g4 + 16], %o2 | |
173 | ! ldx [%g4 + 24], %o3 | |
174 | ! ldx [%g4 + 32], %o4 | |
175 | ! ldx [%g4 + 40], %o5 | |
176 | ! ldx [%g4 + 48], %o6 | |
177 | ! ldx [%g4 + 56], %o7 | |
178 | !================================ | |
179 | ||
180 | !!! These are mentioned in PRM (v1.1) 9.1.2 it says that | |
181 | !!! 16-byte loads generated by ldda ASI*QUAD_LDD* should get a DAE_nc_page, | |
182 | !!! and stores should take a DAE_invalid_asi exception. | |
183 | ||
184 | add 0x40, %g4, %g4 | |
185 | stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P !! asi 0xe2 | |
186 | ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P, %l0 !! should take an exception | |
187 | !================================ | |
188 | add 0x40, %g4, %g4 | |
189 | stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P_LITTLE !! asi 0xea | |
190 | ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P_LITTLE, %l0 !! should take an exception | |
191 | !================================ | |
192 | ! add 0x40, %g4, %g4 | |
193 | ! stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S !! asi 0xe3 | |
194 | ! ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S, %l0 !! should take an exception | |
195 | !================================ | |
196 | ! add 0x40, %g4, %g4 | |
197 | ! stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S_LITTLE !! asi 0xeb | |
198 | ! ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S_LITTLE, %l0 !! should take an exception | |
199 | !================================ | |
200 | ! this gets a Data_Access_MMU_Miss_0x31 | |
201 | ! add 0x40, %g4, %g4 | |
202 | ! stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P !! asi 0x22 | |
203 | ! ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P, %l0 | |
204 | !================================ | |
205 | ! add 0x40, %g4, %g4 | |
206 | ! stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S !! asi 0x23 | |
207 | ! ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S, %l0 | |
208 | !================================ | |
209 | add 0x40, %g4, %g4 | |
210 | stda %f0, [%g4]ASI_NUCLEUS_QUAD_LDD !! asi 0x24 | |
211 | ldda [%g4]ASI_NUCLEUS_QUAD_LDD, %l0 | |
212 | !================================ | |
213 | add 0x40, %g4, %g4 | |
214 | stda %f0, [%g4]ASI_QUAD_LDD_REAL !! asi 0x26 | |
215 | ldda [%g4]ASI_QUAD_LDD_REAL, %l0 | |
216 | !================================ | |
217 | add 0x40, %g4, %g4 | |
218 | stda %f0, [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD !! asi 0x27 | |
219 | ldda [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD, %l0 | |
220 | !================================ | |
221 | ! add 0x40, %g4, %g4 | |
222 | ! stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P_LITTLE !! asi 0x2a | |
223 | ! ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P_LITTLE, %l0 | |
224 | !================================ | |
225 | ! add 0x40, %g4, %g4 | |
226 | ! stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S_LITTLE !! asi 0x2b | |
227 | ! ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S_LITTLE, %l0 | |
228 | !================================ | |
229 | add 0x40, %g4, %g4 | |
230 | stda %f0, [%g4]ASI_NUCLEUS_QUAD_LDD_LITTLE !! asi 0x2c | |
231 | ldda [%g4]ASI_NUCLEUS_QUAD_LDD_LITTLE, %l0 | |
232 | !================================ | |
233 | add 0x40, %g4, %g4 | |
234 | stda %f0, [%g4]ASI_QUAD_LDD_REAL_LITTLE !! asi 0x2e | |
235 | ldda [%g4]ASI_QUAD_LDD_REAL_LITTLE, %l0 | |
236 | !================================ | |
237 | add 0x40, %g4, %g4 | |
238 | stda %f0, [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD_LITTLE !! asi 0x2f | |
239 | ldda [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD_LITTLE, %l0 | |
240 | !================================ | |
241 | ||
242 | sub %l3, 12, %l3 !! There should have been 12 privileged interrupts | |
243 | brnz %l3, h_bad_end | |
244 | nop | |
245 | ||
246 | sub %l4, 4, %l4 !! There should have been 4 nc_page interrupts | |
247 | brnz %l4, h_bad_end | |
248 | nop | |
249 | ||
250 | sub %l5, 2, %l5 !! There should have been 2 invalid_asi interrupts | |
251 | brnz %l5, h_bad_end | |
252 | nop | |
253 | ||
254 | !================================== | |
255 | normal_end: | |
256 | ta T_GOOD_TRAP | |
257 | nop | |
258 | ||
259 | h_bad_end: | |
260 | ta T_BAD_TRAP | |
261 | nop | |
262 | /* | |
263 | * Data section | |
264 | */ | |
265 | .data | |
266 | .align 0x40 | |
267 | user_data_start: | |
268 | .xword 0xD6B3479DDB28926C | |
269 | .xword 0x1122334455667788 | |
270 | .xword 0x2233445566778811 | |
271 | .xword 0x3344556677881122 | |
272 | .xword 0x4455667788112233 | |
273 | .xword 0x5566778811223344 | |
274 | .xword 0x6677881122334455 | |
275 | .xword 0x7881122334455667 | |
276 | .xword 0x8811223344556677 | |
277 | ! .skip 1000 | |
278 | user_data_end: | |
279 | ||
280 | ||
281 | SECTION .NCDATA DATA_VA=0x00d01ee000 | |
282 | ||
283 | attr_data { | |
284 | Name = .NCDATA, | |
285 | VA=0x00d01ee000, | |
286 | RA=0xc100000000, | |
287 | PA=0xc100000000, | |
288 | part_0_ctx_nonzero_tsb_config_2, | |
289 | TTE_G=0, TTE_Context=PCONTEXT, TTE_V=1, TTE_Size=0, TTE_SIZE_PTR=0, TTE_NFO=0, | |
290 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
291 | TTE_L=0, TTE_CP=0, TTE_CV=0, TTE_E=1, TTE_P=0, TTE_W=1 | |
292 | } | |
293 | ||
294 | .data | |
295 | .global ncdata_base | |
296 | ncdata_base: | |
297 | .skip 1000 | |
298 |