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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: Debug_Event_Dmu.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define ENABLE_PCIE_LINK_TRAINING | |
39 | /* #define MAIN_PAGE_NUCLEUS_ALSO */ /* Access main in priviledge mode */ | |
40 | #define MAIN_PAGE_HV_ALSO | |
41 | ||
42 | #include "err_defines.h" | |
43 | #include "hboot.s" | |
44 | #include "peu_defines.h" | |
45 | ||
46 | #define DMA_DATA_ADDR 0x0000000123456700 | |
47 | #define DMA_DATA_BYP_ADDR1 0xfffc000123456700 | |
48 | #define DMA_DATA_BYP_ADDR2 0xfffc000123456780 | |
49 | #define DMA_DATA_BYP_ADDR3 0xfffc000123456800 | |
50 | #define DBG_ERR_PA 0x8000004000 | |
51 | #define DBG_ERR_VAL 0x1 | |
52 | /***following will enable the NCU related errors to trigger a pulse to MIO***/ | |
53 | ||
54 | #define Soc_Decr_Pa 0x8600000010 | |
55 | #define Soc_Decr_Val 0x0000300000 | |
56 | ||
57 | ||
58 | /************************************************************************ | |
59 | Test case code start | |
60 | ************************************************************************/ | |
61 | .text | |
62 | .global main | |
63 | ||
64 | main: | |
65 | ta T_CHANGE_HPRIV | |
66 | nop | |
67 | ||
68 | /**following will enable the NCU Debug Trigger Enable Register****/ | |
69 | setx Soc_Decr_Pa,%l1,%g4 | |
70 | setx Soc_Decr_Val,%l7,%g5 | |
71 | stx %g5,[%g4] | |
72 | nop | |
73 | nop | |
74 | membar #Sync | |
75 | ||
76 | setx DBG_ERR_PA,%l5,%g3 | |
77 | setx DBG_ERR_VAL,%l1,%g1 | |
78 | stx %g1,[%g3] | |
79 | nop | |
80 | nop | |
81 | membar #Sync | |
82 | ||
83 | ||
84 | ||
85 | ||
86 | ||
87 | /********************************* | |
88 | RAS | |
89 | *********************************/ | |
90 | set_ejr: | |
91 | set 0x1, %i1 | |
92 | sllx %i1, ERR_FIELD, %i2 | |
93 | setx SOC_EJR_REG, %l7, %i3 | |
94 | stx %i2, [%i3] | |
95 | membar 0x40 | |
96 | /********************************/ | |
97 | ||
98 | ! enable bypass in IOMMU | |
99 | setx FIRE_DLC_MMU_CSR_A_CTL_ADDR, %g1, %g2 | |
100 | setx FIRE_DLC_MMU_CSR_A_CTL__BYPASS_EN, %g1, %g3 | |
101 | stx %g3, [%g2] | |
102 | ldx [%g2], %g3 | |
103 | ||
104 | XmtUsrEvnt1: nop; | |
105 | ! $EV trig_pc_d(1, @VA(.MAIN.XmtUsrEvnt1)) -> EnablePCIeIgCmd ("DMAWR", DMA_DATA_BYP_ADDR1, DMA_DATA_BYP_ADDR1, "64'h40", 1 ) | |
106 | ldx [%g2], %g3 | |
107 | ldx [%g2], %g3 | |
108 | ldx [%g2], %g3 | |
109 | ldx [%g2], %g3 | |
110 | ||
111 | ||
112 | ! select a CSR in the PIU and transmit the command to NCU | |
113 | ||
114 | setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_ADDR, %g1, %g2 | |
115 | setx 0x020, %g1, %g4 | |
116 | ||
117 | delay_loop: | |
118 | ldx [%g2], %g5 | |
119 | nop | |
120 | nop | |
121 | nop | |
122 | nop | |
123 | dec %g4 | |
124 | brnz %g4, delay_loop | |
125 | nop | |
126 | ||
127 | setx SOC_ESR_REG, %l7, %i0 | |
128 | ldx [%i0], %i1 | |
129 | nop | |
130 | ||
131 | /********************************* | |
132 | RAS | |
133 | *********************************/ | |
134 | check_esr: | |
135 | setx 0x8000000000000000, %l7, %o3 !valid bit | |
136 | set 0x1, %i2 | |
137 | sllx %i2, ERR_FIELD, %i3 | |
138 | or %i3, %o3, %i4 | |
139 | sub %i1, %i4, %i5 | |
140 | brnz %i5, test_failed | |
141 | nop | |
142 | /********************************/ | |
143 | ||
144 | ||
145 | test_passed: | |
146 | EXIT_GOOD | |
147 | ||
148 | test_failed: | |
149 | EXIT_BAD | |
150 | ||
151 | /************************************************************************ | |
152 | Test case data start | |
153 | ************************************************************************/ | |
154 | ||
155 | SECTION .DATA DATA_VA=DMA_DATA_ADDR | |
156 | attr_data { | |
157 | Name = .DATA, | |
158 | hypervisor, | |
159 | compressimage | |
160 | } | |
161 | ||
162 | .data | |
163 | .global PCIAddr9 | |
164 | .xword 0x0001020304050607 | |
165 | .xword 0x08090a0b0c0d0e0f | |
166 | .xword 0x1011121314151617 | |
167 | .xword 0x18191a1b1c1d1e1f | |
168 | .xword 0x2021222324252627 | |
169 | .xword 0x28292a2b2c2d2e2f | |
170 | .xword 0x3031323334353637 | |
171 | .xword 0x38393a3b3c3d3e3f | |
172 | ||
173 | .xword 0x4041424344454647 | |
174 | .xword 0x48494a4b4c4d4e4f | |
175 | .xword 0x5051525354555657 | |
176 | .xword 0x58595a5b5c5d5e5f | |
177 | .xword 0x6061626364656667 | |
178 | .xword 0x68696a6b6c6d6e6f | |
179 | .xword 0x7071727374757677 | |
180 | .xword 0x78797a7b7c7d7e7f | |
181 | ||
182 | .xword 0x8081828384858687 | |
183 | .xword 0x88898a8b8c8d8e8f | |
184 | .xword 0x9091929394959697 | |
185 | .xword 0x98999a9b9c9d9e9f | |
186 | .xword 0xa0a1a2a3a4a5a6a7 | |
187 | .xword 0xa8a9aaabacadaeaf | |
188 | .xword 0xb0b1b2b3b4b5b6b7 | |
189 | .xword 0xb8b9babbbcbdbebf | |
190 | ||
191 | .xword 0xc0c1c2c3c4c5c6c7 | |
192 | .xword 0xc8c9cacbcccdcecf | |
193 | .xword 0xd0d1d2d3d4d5d6d7 | |
194 | .xword 0xd8d9dadbdcdddedf | |
195 | .xword 0xe0e1e2e3e4e5e6e7 | |
196 | .xword 0xe8e9eaebecedeeef | |
197 | .xword 0xf0f1f2f3f4f5f6f7 | |
198 | .xword 0xf8f9fafbfcfdfeff | |
199 | ||
200 | .xword 0x0001020304050607 | |
201 | .xword 0x08090a0b0c0d0e0f | |
202 | .xword 0x1011121314151617 | |
203 | .xword 0x18191a1b1c1d1e1f | |
204 | .xword 0x2021222324252627 | |
205 | .xword 0x28292a2b2c2d2e2f | |
206 | .xword 0x3031323334353637 | |
207 | .xword 0x38393a3b3c3d3e3f | |
208 | ||
209 | .xword 0x4041424344454647 | |
210 | .xword 0x48494a4b4c4d4e4f | |
211 | .xword 0x5051525354555657 | |
212 | .xword 0x58595a5b5c5d5e5f | |
213 | .xword 0x6061626364656667 | |
214 | .xword 0x68696a6b6c6d6e6f | |
215 | .xword 0x7071727374757677 | |
216 | .xword 0x78797a7b7c7d7e7f | |
217 | ||
218 | .xword 0x8081828384858687 | |
219 | .xword 0x88898a8b8c8d8e8f | |
220 | .xword 0x9091929394959697 | |
221 | .xword 0x98999a9b9c9d9e9f | |
222 | .xword 0xa0a1a2a3a4a5a6a7 | |
223 | .xword 0xa8a9aaabacadaeaf | |
224 | .xword 0xb0b1b2b3b4b5b6b7 | |
225 | .xword 0xb8b9babbbcbdbebf | |
226 | ||
227 | .xword 0xc0c1c2c3c4c5c6c7 | |
228 | .xword 0xc8c9cacbcccdcecf | |
229 | .xword 0xd0d1d2d3d4d5d6d7 | |
230 | .xword 0xd8d9dadbdcdddedf | |
231 | .xword 0xe0e1e2e3e4e5e6e7 | |
232 | .xword 0xe8e9eaebecedeeef | |
233 | .xword 0xf0f1f2f3f4f5f6f7 | |
234 | .xword 0xf8f9fafbfcfdfeff | |
235 | ||
236 | /************************************************************************/ | |
237 |