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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: my_console.h | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #ifndef __MY_CONSOLE_H | |
39 | #define __MY_CONSOLE_H | |
40 | ||
41 | #define PRINT(s) \ | |
42 | ba 1f ;\ | |
43 | rd %pc, %g1 ;\ | |
44 | 2: .asciz s ;\ | |
45 | .align 4 ;\ | |
46 | 1: add %g1, 4, %g1 ;\ | |
47 | ba puts ;\ | |
48 | rd %pc, %g7 ;\ | |
49 | ||
50 | ||
51 | ||
52 | /* | |
53 | * Hypervisor UART console definitions | |
54 | */ | |
55 | ||
56 | #define HV_UART 0xfff0c2c000 | |
57 | ||
58 | #define RBR_ADDR 0x0 | |
59 | #define THR_ADDR 0x0 | |
60 | #define IER_ADDR 0x1 | |
61 | #define IIR_ADDR 0x2 | |
62 | #define FCR_ADDR 0x2 | |
63 | #define LCR_ADDR 0x3 | |
64 | #define MCR_ADDR 0x4 | |
65 | #define LSR_ADDR 0x5 | |
66 | #define MSR_ADDR 0x6 | |
67 | #define SCR_ADDR 0x7 | |
68 | #define DLL_ADDR 0x0 | |
69 | #define DLM_ADDR 0x1 | |
70 | ||
71 | /* | |
72 | * Some Line Status Register (FCR) bits | |
73 | */ | |
74 | #define LSR_DRDY 0x1 | |
75 | #define LSR_BINT 0x10 | |
76 | #define LSR_THRE 0x20 | |
77 | #define LSR_TEMT 0x40 | |
78 | ||
79 | /* | |
80 | * Some FIFO Control Register (FCR) bits | |
81 | */ | |
82 | #define FCR_FIFO_ENABLE 0x1 | |
83 | #define FCR_RCVR_RESET 0x2 | |
84 | #define FCR_XMIT_RESET 0x4 | |
85 | ||
86 | /* | |
87 | * Line Control Register settings | |
88 | */ | |
89 | #define LCR_DLAB 0x80 | |
90 | #define LCR_8N1 0x3 | |
91 | ||
92 | /* | |
93 | * Baud rate settings for Divisor Latch Low (DLL) and Most (DLM) | |
94 | */ | |
95 | #define DLL_9600 96 | |
96 | #define DLM_9600 0x0 | |
97 | ||
98 | #endif |