[OpenSPARC-T2-DV] / verif / diag / assembly / exu / exu_shift_n2.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: exu_shift_n2.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define NUM_REG_CASES   2
#define NUM_IMMED_CASES 3    
   

/*******************************************************/    
#include "hboot.s"

.global main
main:
th_fork(th_main,%l0)		! start up to four threads.
	! All threads do the same thing. No need to run more than one core,
	! and no need to differentiate the threads because nobody stores
	! anything.
th_main_0:    
th_main_1:    
th_main_2:    
th_main_3:    
	!**************************
	! Operand2 as a register 
	!**************************
	set	rs1_data,%g1
	add	%g0,NUM_REG_CASES,%l0		
	wr	%g0,0xff,%ccr	    ! ccr set to ff. Should remain unchanged.

rs1_loop:
	ldx	[%g1],%l1
	add	%g0,65,%l2	    ! rs2 starts as 65
rs2_loop:   				    
	sll	%l1,%l2,%l3	    
	srl	%l1,%l2,%l3	    
	sra	%l1,%l2,%l3	    
	sllx	%l1,%l2,%l3	    
	srlx	%l1,%l2,%l3	    
	srax	%l1,%l2,%l3	    

	sub	%l2,0x1,%l2
	brgez,pt %l2,rs2_loop	    ! loop rs2 down to 0, inclusive
	nop
    
	! use rs1 value as the shift value just to put interesting things in
	! the upper bits of rs2.
	ldx	[%g1],%l2
	sll	%l1,%l2,%l3	    
	srl	%l1,%l2,%l3	    
	sra	%l1,%l2,%l3	    
	sllx	%l1,%l2,%l3	    
	srlx	%l1,%l2,%l3	    
	srax	%l1,%l2,%l3
    			    
	sub	%l0,1,%l0	    ! next rs1 value
	brnz,pt %l0,rs1_loop
	add	%g1,8,%g1	    ! move operand pointer

	!**************************
	! Operand2 as immediate 
	!**************************    
       
	set	immed_data,%g1
	add	%g0,NUM_IMMED_CASES,%l0
immed_loop:
	ldx	[%g1],%l1		
				   
	sll	%l1,0,%l3	    
	srl	%l1,0,%l3	    
	sra	%l1,0,%l3	    
	sllx	%l1,0,%l3	    
	srlx	%l1,0,%l3	    
	srax	%l1,0,%l3

    	sll	%l1,1,%l3	    
	srl	%l1,1,%l3	    
	sra	%l1,1,%l3	    
	sllx	%l1,1,%l3	    
	srlx	%l1,1,%l3	    
	srax	%l1,1,%l3

    	sll	%l1,2,%l3	    
	srl	%l1,2,%l3	    
	sra	%l1,2,%l3	    
	sllx	%l1,2,%l3	    
	srlx	%l1,2,%l3	    
	srax	%l1,2,%l3

    	sll	%l1,31,%l3	    
	srl	%l1,31,%l3	    
	sra	%l1,31,%l3	    
	sllx	%l1,31,%l3	    
	srlx	%l1,31,%l3	    
	srax	%l1,31,%l3     
    
	sllx	%l1,32,%l3	    
	srlx	%l1,32,%l3	    
	srax	%l1,32,%l3
    
	sllx	%l1,63,%l3	    
	srlx	%l1,63,%l3	    
	srax	%l1,63,%l3
    
    	sub	%l0,0x1,%l0
	brnz,pt	%l0,immed_loop
	add	%g1,8,%g1	    ! move operand pointer   

good_end:   
	ta	T_GOOD_TRAP
	nop
	nop    


!==========================    
.data
.align 0x1fff+1

.global tsdata
rs1_data:                   
        .word 0x80000001, 0x80000001
	.word 0x55555555, 0x55555555
 

.global immed_data
immed_data: 
        .word 0x00000000, 0x00000001
	.word 0x33333333, 0x70000000
	.word 0xaaaaaaaa, 0xaaaaaaaa    

.end
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: exu_shift_n2.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define NUM_REG_CASES 2
	39	#define NUM_IMMED_CASES 3
	40
	41
	42	/*******************************************************/
	43	#include "hboot.s"
	44
	45	.global main
	46	main:
	47	th_fork(th_main,%l0) ! start up to four threads.
	48	! All threads do the same thing. No need to run more than one core,
	49	! and no need to differentiate the threads because nobody stores
	50	! anything.
	51	th_main_0:
	52	th_main_1:
	53	th_main_2:
	54	th_main_3:
	55	!**************************
	56	! Operand2 as a register
	57	!**************************
	58	set rs1_data,%g1
	59	add %g0,NUM_REG_CASES,%l0
	60	wr %g0,0xff,%ccr ! ccr set to ff. Should remain unchanged.
	61
	62	rs1_loop:
	63	ldx [%g1],%l1
	64	add %g0,65,%l2 ! rs2 starts as 65
65	rs2_loop:
66	sll %l1,%l2,%l3
67	srl %l1,%l2,%l3
68	sra %l1,%l2,%l3
69	sllx %l1,%l2,%l3
70	srlx %l1,%l2,%l3
71	srax %l1,%l2,%l3
72
73	sub %l2,0x1,%l2
74	brgez,pt %l2,rs2_loop ! loop rs2 down to 0, inclusive
75	nop
76
77	! use rs1 value as the shift value just to put interesting things in
78	! the upper bits of rs2.
79	ldx [%g1],%l2
80	sll %l1,%l2,%l3
81	srl %l1,%l2,%l3
82	sra %l1,%l2,%l3
83	sllx %l1,%l2,%l3
84	srlx %l1,%l2,%l3
85	srax %l1,%l2,%l3
86
87	sub %l0,1,%l0 ! next rs1 value
88	brnz,pt %l0,rs1_loop
89	add %g1,8,%g1 ! move operand pointer
90
91	!**************************
92	! Operand2 as immediate
93	!**************************
94
95	set immed_data,%g1
96	add %g0,NUM_IMMED_CASES,%l0
97	immed_loop:
98	ldx [%g1],%l1
99
100	sll %l1,0,%l3
101	srl %l1,0,%l3
102	sra %l1,0,%l3
103	sllx %l1,0,%l3
104	srlx %l1,0,%l3
105	srax %l1,0,%l3
106
107	sll %l1,1,%l3
108	srl %l1,1,%l3
109	sra %l1,1,%l3
110	sllx %l1,1,%l3
111	srlx %l1,1,%l3
112	srax %l1,1,%l3
113
114	sll %l1,2,%l3
115	srl %l1,2,%l3
116	sra %l1,2,%l3
117	sllx %l1,2,%l3
118	srlx %l1,2,%l3
119	srax %l1,2,%l3
120
121	sll %l1,31,%l3
122	srl %l1,31,%l3
123	sra %l1,31,%l3
124	sllx %l1,31,%l3
125	srlx %l1,31,%l3
126	srax %l1,31,%l3
127
128	sllx %l1,32,%l3
129	srlx %l1,32,%l3
130	srax %l1,32,%l3
131
132	sllx %l1,63,%l3
133	srlx %l1,63,%l3
134	srax %l1,63,%l3
135
136	sub %l0,0x1,%l0
137	brnz,pt %l0,immed_loop
138	add %g1,8,%g1 ! move operand pointer
139
140	good_end:
141	ta T_GOOD_TRAP
142	nop
143	nop
144
145
146	!==========================
147	.data
148	.align 0x1fff+1
149
150	.global tsdata
151	rs1_data:
152	.word 0x80000001, 0x80000001
153	.word 0x55555555, 0x55555555
154
155
156	.global immed_data
157	immed_data:
158	.word 0x00000000, 0x00000001
159	.word 0x33333333, 0x70000000
160	.word 0xaaaaaaaa, 0xaaaaaaaa
161
162	.end