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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / exu / ffu_blkst_stall_n2.s
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86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: ffu_blkst_stall_n2.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define DMMU_SKIP_IF_NO_TTE
39#define STORE_LOOP 20
40
41#include "asi_s.h"
42
43#define MAIN_PAGE_HV_ALSO
44#define MAIN_PAGE_NUCLEUS_ALSO
45
46#define ENABLE_T0_Clean_Window_0x24
47#define ENABLE_T0_Corrected_ECC_error_0x63
48#define ENABLE_T0_Data_Access_Exception_0x30
49#define ENABLE_T0_Data_access_error_0x32
50#define ENABLE_T0_Division_By_Zero_0x28
51#define ENABLE_T0_Fp_disabled_0x20
52#define ENABLE_T0_Fp_exception_ieee_754_0x21
53#define ENABLE_T0_Fp_exception_other_0x22
54#define ENABLE_T0_Illegal_instruction_0x10
55#define ENABLE_T0_Instruction_Access_MMU_Miss_0x09
56#define ENABLE_T0_Instruction_access_error_0x0a
57#define ENABLE_T0_Instruction_access_exception_0x08
58#define ENABLE_T0_Lddf_Mem_Address_Not_Aligned_0x35
59#define ENABLE_T0_Mem_Address_Not_Aligned_0x34
60#define ENABLE_T0_Privileged_Action_0x37
61#define ENABLE_T0_Privileged_opcode_0x11
62#define ENABLE_T0_Stdf_Mem_Address_Not_Aligned_0x36
63#define ENABLE_T0_Tag_Overflow_0x23
64#define ENABLE_T0_Unimplemented_LDD_0x12
65#define ENABLE_T0_Unimplemented_STD_0x13
66#define ENABLE_T0_data_access_protection_0x6c
67#define ENABLE_T0_fast_data_access_MMU_miss_0x68
68#define ENABLE_T0_fast_instr_access_MMU_miss_0x64
69
70#include "hboot.s"
71
72
73.global main
74main:
75th_fork(th_main,%l0) ! start up to four threads.
76 ! All threads run the same code with different data.
77th_main_0:
78 wr %g0,0x4,%fprs
79
80 setx float_data,%l0,%g1
81 ldd [%g1],%f0
82 ldd [%g1],%f2
83 ldd [%g1],%f4
84 ldd [%g1],%f6
85 ldd [%g1],%f8
86 ldd [%g1],%f10
87 ldd [%g1],%f12
88 ldd [%g1],%f14
89 ldd [%g1],%f16
90 ldd [%g1],%f18
91 ldd [%g1],%f20
92 ldd [%g1],%f22
93 ldd [%g1],%f24
94 ldd [%g1],%f26
95 ldd [%g1],%f28
96 ldd [%g1],%f30
97
98 rd %asi,%g1 ! current value of asi reg
99
100 ta T_CHANGE_PRIV
101
102 ! these reads are just for debugging information
103// add ASI_PRIMARY_CONTEXT_REG_VAL,%g0,%i0
104// ldxa [%i0]ASI_PRIMARY_CONTEXT_REG,%i1 ! value of primary context
105
106// add ASI_SECONDARY_CONTEXT_REG_VAL,%g0,%i2
107// ldxa [%i2]ASI_SECONDARY_CONTEXT_REG,%i3 ! secondary context
108
109// rd %asi,%g2
110
111 ! and now back to our regularly scheduled testing
112 add %g0,STORE_LOOP,%g3
113 setx target0_primary,%l0,%g2
114 add %g2,0x000,%l1
115 add %g2,0x040,%l2
116 add %g2,0x080,%l3
117 add %g2,0x0c0,%l4
118 add %g2,0x100,%l5
119 add %g2,0x140,%l6
120 add %g2,0x180,%l7
121 add %g2,0x1c0,%i0
122 add %g2,0x200,%i1
123 add %g2,0x240,%i2
124 add %g2,0x280,%i3
125 add %g2,0x2c0,%i4
126
127primary_loop:
128 stda %f0, [%l1]ASI_BLOCK_AS_IF_USER_PRIMARY
129 stda %f16,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY
130 stda %f0, [%l3]ASI_BLOCK_AS_IF_USER_PRIMARY
131 stda %f16,[%l4]ASI_BLOCK_AS_IF_USER_PRIMARY
132 stda %f0, [%l5]ASI_BLOCK_AS_IF_USER_PRIMARY
133 stda %f16,[%l6]ASI_BLOCK_AS_IF_USER_PRIMARY
134 stda %f0, [%l7]ASI_BLOCK_AS_IF_USER_PRIMARY
135 stda %f16,[%i0]ASI_BLOCK_AS_IF_USER_PRIMARY
136 stda %f0, [%i1]ASI_BLOCK_AS_IF_USER_PRIMARY
137 stda %f16,[%i2]ASI_BLOCK_AS_IF_USER_PRIMARY
138 stda %f0, [%i3]ASI_BLOCK_AS_IF_USER_PRIMARY
139 stda %f16,[%i4]ASI_BLOCK_AS_IF_USER_PRIMARY
140
141 sub %g3,1,%g3
142 brgz %g3,primary_loop
143 nop
144
145 ! do it again with secondary space. FFU does not care, but what the heck...
146 add %g0,STORE_LOOP,%g3
147 setx target0_secondary,%l0,%g2
148 add %g2,0x000,%l1
149 add %g2,0x040,%l2
150 add %g2,0x080,%l3
151 add %g2,0x0c0,%l4
152 add %g2,0x100,%l5
153 add %g2,0x140,%l6
154 add %g2,0x180,%l7
155 add %g2,0x1c0,%i0
156 add %g2,0x200,%i1
157 add %g2,0x240,%i2
158 add %g2,0x280,%i3
159 add %g2,0x2c0,%i4
160
161secondary_loop:
162 stda %f0, [%l1]ASI_BLOCK_AS_IF_USER_SECONDARY
163 stda %f16,[%l2]ASI_BLOCK_AS_IF_USER_SECONDARY
164 stda %f0, [%l3]ASI_BLOCK_AS_IF_USER_SECONDARY
165 stda %f16,[%l4]ASI_BLOCK_AS_IF_USER_SECONDARY
166 stda %f0, [%l5]ASI_BLOCK_AS_IF_USER_SECONDARY
167 stda %f16,[%l6]ASI_BLOCK_AS_IF_USER_SECONDARY
168 stda %f0, [%l7]ASI_BLOCK_AS_IF_USER_SECONDARY
169 stda %f16,[%i0]ASI_BLOCK_AS_IF_USER_SECONDARY
170 stda %f0, [%i1]ASI_BLOCK_AS_IF_USER_SECONDARY
171 stda %f16,[%i2]ASI_BLOCK_AS_IF_USER_SECONDARY
172 stda %f0, [%i3]ASI_BLOCK_AS_IF_USER_SECONDARY
173 stda %f16,[%i4]ASI_BLOCK_AS_IF_USER_SECONDARY
174
175 sub %g3,1,%g3
176 brgz %g3,secondary_loop
177 nop
178
179 ! let the other threads finish gracefully
180 setx stop_flag,%l0,%g1
181 stx %g0,[%g1]
182 ba good_end
183 nop
184
185
186th_main_1:
187 wr %g0,0x4,%fprs
188 setx stop_flag,%l0,%g1
189 setx target1,%l0,%g2
190 ba background_noise
191 nop
192
193th_main_2:
194 wr %g0,0x4,%fprs
195 setx stop_flag,%l0,%g1
196 setx target1,%l0,%g2
197 ba background_noise
198 nop
199
200th_main_3:
201 wr %g0,0x4,%fprs
202 setx stop_flag,%l0,%g1
203 setx target1,%l0,%g2
204
205background_noise:
206 ! create a large load of integer stores using three threads
207 add %g2,0,%l1
208 add %g2,8,%l2
209 add %g2,0x10,%l3
210 add %g2,0x18,%l4
211 add %g2,0x20,%l5
212 add %g2,0x28,%l6
213 add %g2,0x30,%l7
214 add %g2,0x38,%i0
215 add %g2,0x40,%i1
216 add %g2,0x48,%i2
217 add %g2,0x50,%i3
218 add %g2,0x58,%i4
219 add %g2,0x60,%i5
220 add %g2,0x68,%i6
221 add %g2,0x70,%i7
222 add %g2,0x78,%o0
223 add %g2,0x80,%o1
224 add %g2,0x88,%o2
225 add %g2,0x90,%o3
226 add %g2,0x98,%o4
227 add %g2,0xa0,%o5
228 add %g2,0xa8,%o6
229 add %g2,0xb0,%o7
230
231noise_loop:
232 stx %l1,[%l1] ! 1
233 stx %l2,[%l2]
234 stx %l3,[%l3]
235 stx %l4,[%l4]
236 stx %l5,[%l5]
237 stx %l6,[%l6]
238 stx %l7,[%l7]
239 stx %i0,[%i0]
240 stx %i1,[%i1]
241 stx %i2,[%i2]
242 stx %i3,[%i3]
243 stx %i4,[%i4]
244 stx %i5,[%i5]
245 stx %i6,[%i6]
246 stx %i7,[%i7]
247 stx %o0,[%o0]
248 stx %o1,[%o1]
249 stx %o2,[%o2]
250 stx %o3,[%o3]
251 stx %o4,[%o4]
252 stx %o5,[%o5]
253 stx %o6,[%o6]
254 stx %o7,[%o7]
255
256 stx %l1,[%l1] ! 2
257 stx %l2,[%l2]
258 stx %l3,[%l3]
259 stx %l4,[%l4]
260 stx %l5,[%l5]
261 stx %l6,[%l6]
262 stx %l7,[%l7]
263 stx %i0,[%i0]
264 stx %i1,[%i1]
265 stx %i2,[%i2]
266 stx %i3,[%i3]
267 stx %i4,[%i4]
268 stx %i5,[%i5]
269 stx %i6,[%i6]
270 stx %i7,[%i7]
271 stx %o0,[%o0]
272 stx %o1,[%o1]
273 stx %o2,[%o2]
274 stx %o3,[%o3]
275 stx %o4,[%o4]
276 stx %o5,[%o5]
277 stx %o6,[%o6]
278 stx %o7,[%o7]
279
280 nop; nop; nop; nop
281 nop; nop; nop; nop
282
283 nop; nop; nop; nop
284 nop; nop; nop; nop
285
286 nop; nop; nop; nop
287 nop; nop; nop; nop
288
289 nop; nop; nop; nop
290 nop; nop; nop; nop
291
292
293 stx %l1,[%l1] ! 3
294 stx %l2,[%l2]
295 stx %l3,[%l3]
296 stx %l4,[%l4]
297 stx %l5,[%l5]
298 stx %l6,[%l6]
299 stx %l7,[%l7]
300 stx %i0,[%i0]
301 stx %i1,[%i1]
302 stx %i2,[%i2]
303 stx %i3,[%i3]
304 stx %i4,[%i4]
305 stx %i5,[%i5]
306 stx %i6,[%i6]
307 stx %i7,[%i7]
308 stx %o0,[%o0]
309 stx %o1,[%o1]
310 stx %o2,[%o2]
311 stx %o3,[%o3]
312 stx %o4,[%o4]
313 stx %o5,[%o5]
314 stx %o6,[%o6]
315 stx %o7,[%o7]
316
317 stx %l1,[%l1] ! 4
318 stx %l2,[%l2]
319 stx %l3,[%l3]
320 stx %l4,[%l4]
321 stx %l5,[%l5]
322 stx %l6,[%l6]
323 stx %l7,[%l7]
324 stx %i0,[%i0]
325 stx %i1,[%i1]
326 stx %i2,[%i2]
327 stx %i3,[%i3]
328 stx %i4,[%i4]
329 stx %i5,[%i5]
330 stx %i6,[%i6]
331 stx %i7,[%i7]
332 stx %o0,[%o0]
333 stx %o1,[%o1]
334 stx %o2,[%o2]
335 stx %o3,[%o3]
336 stx %o4,[%o4]
337 stx %o5,[%o5]
338 stx %o6,[%o6]
339 stx %o7,[%o7]
340
341 stx %l1,[%l1] ! 5
342 stx %l2,[%l2]
343 stx %l3,[%l3]
344 stx %l4,[%l4]
345 stx %l5,[%l5]
346 stx %l6,[%l6]
347 stx %l7,[%l7]
348 stx %i0,[%i0]
349 stx %i1,[%i1]
350 stx %i2,[%i2]
351 stx %i3,[%i3]
352 stx %i4,[%i4]
353 stx %i5,[%i5]
354 stx %i6,[%i6]
355 stx %i7,[%i7]
356 stx %o0,[%o0]
357 stx %o1,[%o1]
358 stx %o2,[%o2]
359 stx %o3,[%o3]
360 stx %o4,[%o4]
361 stx %o5,[%o5]
362 stx %o6,[%o6]
363 stx %o7,[%o7]
364
365 nop; nop; nop; nop
366 nop; nop; nop; nop
367
368 nop; nop; nop; nop
369 nop; nop; nop; nop
370
371 nop; nop; nop; nop
372 nop; nop; nop; nop
373
374 nop; nop; nop; nop
375 nop; nop; nop; nop
376
377 stx %l1,[%l1] ! 6
378 stx %l2,[%l2]
379 stx %l3,[%l3]
380 stx %l4,[%l4]
381 stx %l5,[%l5]
382 stx %l6,[%l6]
383 stx %l7,[%l7]
384 stx %i0,[%i0]
385 stx %i1,[%i1]
386 stx %i2,[%i2]
387 stx %i3,[%i3]
388 stx %i4,[%i4]
389 stx %i5,[%i5]
390 stx %i6,[%i6]
391 stx %i7,[%i7]
392 stx %o0,[%o0]
393 stx %o1,[%o1]
394 stx %o2,[%o2]
395 stx %o3,[%o3]
396 stx %o4,[%o4]
397 stx %o5,[%o5]
398 stx %o6,[%o6]
399 stx %o7,[%o7]
400
401 nop; nop; nop; nop
402 nop; nop; nop; nop
403
404 nop; nop; nop; nop
405 nop; nop; nop; nop
406
407 nop; nop; nop; nop
408 nop; nop; nop; nop
409
410 nop; nop; nop; nop
411 nop; nop; nop; nop
412
413 ldx [%g1],%l0 ! thread 0 writes to this addr to end test
414 brnz %l0,noise_loop
415 nop
416
417good_end:
418 ta T_GOOD_TRAP
419 nop
420 nop
421
422!==========================
423.data
424.align 0x1fff+1
425
426target1:
427 .word 0,0,0,0
428.align 1024
429target2:
430 .word 0,0,0,0
431.align 1024
432target3:
433 .word 0,0,0,0
434.align 1024
435
436
437stop_flag: .word 0xffffffff, 0xffffffff
438float_data: .word 0x3fe80000, 0x12345678
439
440!*************************************************
441
442.data
443.align 1024
444.global target0_primary
445target0_primary:
446 .word 0,0,0,0
447.align 1024
448
449
450!*************************************************
451
452.data
453.align 1024
454.global target0_secondary
455target0_secondary:
456 .word 0,0,0,0
457.align 1024
458
459
460.end
Full OpenSPARC design & verification tarball including full HDL.