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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: fgu_stfsr_traps_22.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | .ident "FOCUSCASE: focus.pm,v 1.1 2003/04/23 17:53:39 somePerson Exp somePerson $ spc_basic_isa3.pl FOCUS_SEED=12387" | |
39 | .ident "Mon Dec 8 19:56:04 CST 2003" | |
40 | .ident "Using Instruction Hash for Focus :$Id: fgu_stfsr_traps_22.s,v 1.4 2007/07/27 21:45:32 drp Exp $" | |
41 | #include "defines.h" | |
42 | #include "nmacros.h" | |
43 | #include "old_boot.s" | |
44 | ||
45 | /************************************************************************ | |
46 | Test case code start | |
47 | ************************************************************************/ | |
48 | ||
49 | .text | |
50 | .global main | |
51 | ||
52 | main: /* test begin */ | |
53 | ||
54 | ! Get TID/DIAG DATA AREA. Separate memory for each thread. | |
55 | ta T_RD_THID | |
56 | mov %o1, %l6 | |
57 | umul %l6, 256, %l7 | |
58 | setx DIAG_DATA_AREA, %g1, %g3 | |
59 | add %l7, %g3, %l7 | |
60 | ||
61 | cmp %l6, 0x0 | |
62 | be main_t0 | |
63 | nop | |
64 | cmp %l6, 0x1 | |
65 | be main_t1 | |
66 | nop | |
67 | cmp %l6, 0x2 | |
68 | be main_t2 | |
69 | nop | |
70 | cmp %l6, 0x3 | |
71 | be main_t3 | |
72 | nop | |
73 | cmp %l6, 0x4 | |
74 | be main_t4 | |
75 | nop | |
76 | cmp %l6, 0x5 | |
77 | be main_t5 | |
78 | nop | |
79 | cmp %l6, 0x6 | |
80 | be main_t6 | |
81 | nop | |
82 | cmp %l6, 0x7 | |
83 | be main_t7 | |
84 | nop | |
85 | EXIT_GOOD | |
86 | ! | |
87 | ! Thread 0 Start | |
88 | ! | |
89 | main_t0: | |
90 | mov %l7, %g1 | |
91 | !# Set %cwp for 8 windows | |
92 | !# This threads memory space into each %l7 | |
93 | wrpr %g0, 0x7, %cwp | |
94 | mov %g1, %l7 | |
95 | wrpr %g0, 0x6, %cwp | |
96 | mov %g1, %l7 | |
97 | wrpr %g0, 0x5, %cwp | |
98 | mov %g1, %l7 | |
99 | wrpr %g0, 0x4, %cwp | |
100 | mov %g1, %l7 | |
101 | wrpr %g0, 0x3, %cwp | |
102 | mov %g1, %l7 | |
103 | wrpr %g0, 0x2, %cwp | |
104 | mov %g1, %l7 | |
105 | wrpr %g0, 0x1, %cwp | |
106 | mov %g1, %l7 | |
107 | wrpr %g0, 0x0, %cwp | |
108 | mov %g1, %l7 | |
109 | ||
110 | !# Set %fsr | |
111 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
112 | stx %l6, [%l7 + 0x0] !# no post process | |
113 | ldx [%l7 + 0x0], %fsr !# no post process | |
114 | ||
115 | !# Initialize registers .. | |
116 | ||
117 | !# Global registers | |
118 | set 0x2, %g1 | |
119 | set 0x4, %g2 | |
120 | set 0x1, %g3 | |
121 | set 0xD, %g4 | |
122 | set 0x6, %g5 | |
123 | set 0x8, %g6 | |
124 | set 0x6, %g7 | |
125 | !# Input registers | |
126 | set -0x2, %i0 | |
127 | set -0x3, %i1 | |
128 | set -0x5, %i2 | |
129 | set -0x3, %i3 | |
130 | set -0x4, %i4 | |
131 | set -0xA, %i5 | |
132 | set -0xD, %i6 | |
133 | set -0xE, %i7 | |
134 | !# Local registers | |
135 | set 0x6B73716B, %l0 | |
136 | set 0x05EB1F11, %l1 | |
137 | set 0x6C42EC90, %l2 | |
138 | set 0x646E48A5, %l3 | |
139 | set 0x4A6774DB, %l4 | |
140 | set 0x5A204DA8, %l5 | |
141 | set 0x1CD90970, %l6 | |
142 | !# Output registers | |
143 | set -0x137F, %o0 | |
144 | set -0x1D16, %o1 | |
145 | set -0x0049, %o2 | |
146 | set -0x0998, %o3 | |
147 | set 0x0213, %o4 | |
148 | set 0x0400, %o5 | |
149 | set -0x1BEB, %o6 | |
150 | set -0x00F7, %o7 | |
151 | !# Float registers | |
152 | INIT_TH_FP_REG(%l7,%f0,0xCC8D0620E2DA3693) | |
153 | INIT_TH_FP_REG(%l7,%f2,0xFA244F23DF29DB54) | |
154 | INIT_TH_FP_REG(%l7,%f4,0xB3D57F1FD825C368) | |
155 | INIT_TH_FP_REG(%l7,%f6,0xD424E498A853CE5F) | |
156 | INIT_TH_FP_REG(%l7,%f8,0x977F0E2124D33F26) | |
157 | INIT_TH_FP_REG(%l7,%f10,0xA0B27E8022DAD6F1) | |
158 | INIT_TH_FP_REG(%l7,%f12,0x0E18BA3EE2FD2B03) | |
159 | INIT_TH_FP_REG(%l7,%f14,0x82E2F7E67C833C90) | |
160 | INIT_TH_FP_REG(%l7,%f16,0xB89D0594757DA2EA) | |
161 | INIT_TH_FP_REG(%l7,%f18,0x13FED6033727FCD0) | |
162 | INIT_TH_FP_REG(%l7,%f20,0x07AF4B2FEA0A7C57) | |
163 | INIT_TH_FP_REG(%l7,%f22,0xF9469CA7B8499B25) | |
164 | INIT_TH_FP_REG(%l7,%f24,0x44BC25C38BAFF430) | |
165 | INIT_TH_FP_REG(%l7,%f26,0x93A19EEFE466340C) | |
166 | INIT_TH_FP_REG(%l7,%f28,0xAAE03C1EEE40660C) | |
167 | INIT_TH_FP_REG(%l7,%f30,0x355FB97FCC4E55E9) | |
168 | ||
169 | !# Execute Main Diag .. | |
170 | ||
171 | tcc %icc, 0x5 | |
172 | fpadd32 %f18, %f2, %f2 | |
173 | alignaddr %l1, %l0, %g3 | |
174 | swap [%l7 + 0x0C], %i3 | |
175 | fmovrslz %i7, %f30, %f24 | |
176 | fbe,a %fcc1, loop_1 | |
177 | tge %xcc, 0x4 | |
178 | st %fsr, [%l7 + 0x0C] | |
179 | alignaddrl %l3, %i0, %o5 | |
180 | loop_1: | |
181 | nop | |
182 | setx 0xAE6F8A512DD43C0F, %l0, %l6 | |
183 | stx %l6, [%l7 + 0x28] | |
184 | ldd [%l7 + 0x28], %f14 | |
185 | fsqrtd %f14, %f4 | |
186 | fzero %f30 | |
187 | fmovduge %fcc3, %f30, %f26 | |
188 | fnot1 %f24, %f10 | |
189 | fabsd %f0, %f30 | |
190 | movre %g4, 0x052, %g2 | |
191 | fnands %f0, %f16, %f1 | |
192 | fmuld8ulx16 %f15, %f13, %f18 | |
193 | edge32ln %o7, %i1, %o2 | |
194 | set 0x78, %l2 | |
195 | stda %g6, [%l7 + %l2] 0xeb | |
196 | membar #Sync | |
197 | st %fsr, [%l7 + 0x64] | |
198 | orcc %o1, 0x1BE8, %l5 | |
199 | rdhpr %hpstate, %i5 | |
200 | edge8l %g1, %o3, %i2 | |
201 | add %g5, 0x068F, %o0 | |
202 | fsrc1s %f5, %f29 | |
203 | subc %g7, 0x1A7F, %o4 | |
204 | saved | |
205 | rdpr %cwp, %g1 | |
206 | rdpr %cansave, %g2 | |
207 | rdpr %canrestore, %g3 | |
208 | rdpr %cleanwin, %g4 | |
209 | rdpr %otherwin, %g5 | |
210 | rdpr %wstate, %g6 | |
211 | movrne %l2, 0x04F, %l4 | |
212 | sllx %i4, %o6, %l6 | |
213 | nop | |
214 | set 0x50, %l1 | |
215 | stx %i6, [%l7 + %l1] | |
216 | fbue,pt %fcc2, loop_2 | |
217 | addcc %l1, %l0, %i3 | |
218 | movcc %xcc, 0x538, %i7 | |
219 | add %l3, %i0, %o5 | |
220 | loop_2: | |
221 | st %fsr, [%l7 + 0x0C] | |
222 | nop | |
223 | fitos %f9, %f31 | |
224 | fstod %f31, %f20 | |
225 | fmovdvc %icc, %f4, %f10 | |
226 | fpsub32 %f24, %f6, %f12 | |
227 | rdpr %wstate, %g4 | |
228 | st %fsr, [%l7 + 0x0C] | |
229 | wrpr %g0, 0x0, %gl | |
230 | st %fsr, [%l7 + 0x4C] | |
231 | mulx %o7, %i1, %g3 | |
232 | st %fsr, [%l7 + 0x48] | |
233 | orcc %o2, 0x0987, %g6 | |
234 | st %fsr, [%l7 + 0x70] | |
235 | addc %o1, %i5, %l5 | |
236 | rd %y, %g1 | |
237 | tsubcc %i2, 0x18FB, %g5 | |
238 | fmovsge %xcc, %f20, %f13 | |
239 | fmuld8ulx16 %f24, %f5, %f20 | |
240 | sll %o0, 0x1C, %o3 | |
241 | popc %o4, %l2 | |
242 | mova %fcc1, 0x07E, %l4 | |
243 | fmovrslz %g7, %f2, %f6 | |
244 | movcc %icc, 0x54D, %o6 | |
245 | bshuffle %f8, %f10, %f16 | |
246 | fmovsvs %xcc, %f15, %f12 | |
247 | st %fsr, [%l7 + 0x24] | |
248 | st %fsr, [%l7 + 0x28] | |
249 | fmul8ulx16 %f6, %f6, %f22 | |
250 | fxnor %f2, %f6, %f6 | |
251 | fmovrslz %l6, %f17, %f25 | |
252 | nop | |
253 | set 0x72, %l6 | |
254 | sth %i4, [%l7 + %l6] | |
255 | movg %fcc0, %i6, %l1 | |
256 | ||
257 | or %g0, 0x8, %l0 | |
258 | sllx %l0, 0x3c, %l0 | |
259 | wrhpr %l0, 0xDC2, %hsys_tick_cmpr | |
260 | st %f9, [%l7 + 0x70] | |
261 | andncc %l3, 0x143F, %i0 | |
262 | ldd [%l7 + 0x40], %f18 | |
263 | st %fsr, [%l7 + 0x58] | |
264 | st %fsr, [%l7 + 0x78] | |
265 | membar 0x2F | |
266 | st %fsr, [%l7 + 0x50] | |
267 | fmovdvc %icc, %f8, %f2 | |
268 | st %fsr, [%l7 + 0x50] | |
269 | stbar | |
270 | brgz,a,pn %l0, loop_3 | |
271 | st %fsr, [%l7 + 0x44] | |
272 | edge8l %g4, %g2, %o7 | |
273 | movo %fcc0, %i1, %o5 | |
274 | loop_3: | |
275 | fcmpne16 %f4, %f12, %o2 | |
276 | st %fsr, [%l7 + 0x7C] | |
277 | movneg %xcc, 0x331, %g3 | |
278 | fmovdule %fcc3, %f26, %f20 | |
279 | ||
280 | or %g0, 0x8, %l0 | |
281 | sllx %l0, 0x3c, %l0 | |
282 | wrhpr %l0, %g0, %hsys_tick_cmpr | |
283 | nop | |
284 | set 0x39, %o7 | |
285 | ldstub [%l7 + %o7], %i5 | |
286 | movl %icc, 0x5C3, %g6 | |
287 | st %fsr, [%l7 + 0x38] | |
288 | movcc %xcc, %l5, %i2 | |
289 | movug %fcc1, 0x346, %g5 | |
290 | membar 0x46 | |
291 | fnot1s %f18, %f13 | |
292 | movge %xcc, %g1, %o3 | |
293 | st %fsr, [%l7 + 0x60] | |
294 | sethi 0x00BF, %o4 | |
295 | st %fsr, [%l7 + 0x38] | |
296 | fmovdcs %icc, %f20, %f28 | |
297 | fbn,a %fcc3, loop_4 | |
298 | brlz,a,pn %o0, loop_5 | |
299 | rdpr %gl, %l2 | |
300 | srl %g7, %o6, %l4 | |
301 | loop_4: | |
302 | fmul8x16au %f23, %f21, %f28 | |
303 | loop_5: | |
304 | saved | |
305 | rdpr %cwp, %g1 | |
306 | rdpr %cansave, %g2 | |
307 | rdpr %canrestore, %g3 | |
308 | rdpr %cleanwin, %g4 | |
309 | rdpr %otherwin, %g5 | |
310 | rdpr %wstate, %g6 | |
311 | movrgez %l6, %i4, %i6 | |
312 | or %l1, 0x128B, %i7 | |
313 | movneg %icc, 0x7B9, %l3 | |
314 | nop | |
315 | set 0x58, %l3 | |
316 | stx %fsr, [%l7 + %l3] | |
317 | st %fsr, [%l7 + 0x1C] | |
318 | st %fsr, [%l7 + 0x18] | |
319 | subc %i0, 0x014A, %l0 | |
320 | fmovrse %g4, %f4, %f21 | |
321 | movge %xcc, %i3, %o7 | |
322 | restored | |
323 | rdpr %cwp, %g1 | |
324 | rdpr %cansave, %g2 | |
325 | rdpr %canrestore, %g3 | |
326 | rdpr %cleanwin, %g4 | |
327 | rdpr %otherwin, %g5 | |
328 | rdpr %wstate, %g6 | |
329 | fmovdn %fcc2, %f0, %f30 | |
330 | fpmerge %f15, %f6, %f24 | |
331 | nop | |
332 | setx 0x126920DF7CB7F5E4, %l0, %l6 | |
333 | stx %l6, [%l7 + 0x28] | |
334 | ldd [%l7 + 0x28], %f26 | |
335 | setx 0x0EB397608DCB85F4, %l1, %l5 | |
336 | stx %l5, [%l7 + 0x10] | |
337 | ldd [%l7 + 0x10], %f24 | |
338 | fmuld %f24, %f26, %f6 | |
339 | st %fsr, [%l7 + 0x50] | |
340 | rdpr %cansave, %g2 | |
341 | wr %g0, 0x50, %asi | |
342 | ldxa [%g0 + 0x30] %asi, %o5 | |
343 | fpsub16s %f18, %f31, %f12 | |
344 | fmovsn %fcc1, %f21, %f19 | |
345 | movuge %fcc2, %i1, %g3 | |
346 | restored | |
347 | rdpr %cwp, %g1 | |
348 | rdpr %cansave, %g2 | |
349 | rdpr %canrestore, %g3 | |
350 | rdpr %cleanwin, %g4 | |
351 | rdpr %otherwin, %g5 | |
352 | rdpr %wstate, %g6 | |
353 | fandnot2s %f5, %f26, %f21 | |
354 | ||
355 | or %g0, 0x8, %l0 | |
356 | sllx %l0, 0x3c, %l0 | |
357 | wr %l0, 0xCF9, %tick_cmpr | |
358 | edge8l %o1, %i5, %g6 | |
359 | fmovscs %xcc, %f15, %f27 | |
360 | ||
361 | or %g0, 0x8, %l0 | |
362 | sllx %l0, 0x3c, %l0 | |
363 | wrhpr %l0, 0x2E1, %hsys_tick_cmpr | |
364 | st %fsr, [%l7 + 0x28] | |
365 | st %fsr, [%l7 + 0x5C] | |
366 | st %fsr, [%l7 + 0x34] | |
367 | movrgz %g5, 0x0DB, %g1 | |
368 | fmovduge %fcc3, %f2, %f12 | |
369 | fnot2 %f0, %f6 | |
370 | fmovrdne %o3, %f26, %f4 | |
371 | ldub [%l7 + 0x4B], %o4 | |
372 | edge16ln %i2, %l2, %g7 | |
373 | bvs,a %xcc, loop_6 | |
374 | fmovdge %xcc, %f24, %f12 | |
375 | st %fsr, [%l7 + 0x58] | |
376 | xnorcc %o0, 0x072F, %o6 | |
377 | loop_6: | |
378 | stb %l4, [%l7 + 0x54] | |
379 | brz,a %l6, loop_7 | |
380 | fmovdneg %xcc, %f2, %f14 | |
381 | restored | |
382 | rdpr %cwp, %g1 | |
383 | rdpr %cansave, %g2 | |
384 | rdpr %canrestore, %g3 | |
385 | rdpr %cleanwin, %g4 | |
386 | rdpr %otherwin, %g5 | |
387 | rdpr %wstate, %g6 | |
388 | nop | |
389 | fitod %f10, %f12 | |
390 | fdtox %f12, %f4 | |
391 | fxtod %f4, %f20 | |
392 | loop_7: | |
393 | tge %xcc, 0x4 | |
394 | fmovsvc %xcc, %f26, %f13 | |
395 | nop | |
396 | set 0x6B, %g4 | |
397 | stb %i6, [%l7 + %g4] | |
398 | array8 %i4, %i7, %l1 | |
399 | ||
400 | or %g0, 0x8, %l0 | |
401 | sllx %l0, 0x3c, %l0 | |
402 | wrhpr %l0, 0xFE1, %hsys_tick_cmpr | |
403 | andcc %i0, %l0, %i3 | |
404 | movrlz %g4, %o7, %o5 | |
405 | wr %g0, 0xd1, %asi | |
406 | ldda [%l7 + 0x40] %asi, %f0 | |
407 | popc %g2, %g3 | |
408 | nop | |
409 | setx 0x16C0, %l0, %o1 | |
410 | sdivx %i1, %o1, %i5 | |
411 | fmovsul %fcc0, %f6, %f11 | |
412 | fble,pn %fcc1, loop_8 | |
413 | fmovsule %fcc2, %f4, %f27 | |
414 | fba %fcc1, loop_9 | |
415 | srlx %g6, 0x0F, %o2 | |
416 | loop_8: | |
417 | tg %icc, 0x5 | |
418 | fpadd16 %f8, %f12, %f12 | |
419 | loop_9: | |
420 | flushw | |
421 | bgu,a,pt %icc, loop_10 | |
422 | fpadd16s %f9, %f15, %f1 | |
423 | st %fsr, [%l7 + 0x38] | |
424 | st %fsr, [%l7 + 0x24] | |
425 | loop_10: | |
426 | st %fsr, [%l7 + 0x1C] | |
427 | st %fsr, [%l7 + 0x10] | |
428 | fmovsule %fcc1, %f7, %f8 | |
429 | st %fsr, [%l7 + 0x50] | |
430 | movneg %xcc, %l5, %g5 | |
431 | st %fsr, [%l7 + 0x2C] | |
432 | st %fsr, [%l7 + 0x4C] | |
433 | st %fsr, [%l7 + 0x2C] | |
434 | st %fsr, [%l7 + 0x30] | |
435 | sir 0x0820 | |
436 | sll %g1, %o3, %i2 | |
437 | tpos %xcc, 0x4 | |
438 | fnor %f8, %f16, %f28 | |
439 | st %fsr, [%l7 + 0x5C] | |
440 | bvc,pn %icc, loop_11 | |
441 | addccc %l2, 0x07CF, %o4 | |
442 | fone %f14 | |
443 | set 0x40, %o0 | |
444 | stha %g7, [%l7 + %o0] 0x2f | |
445 | membar #Sync | |
446 | loop_11: | |
447 | st %fsr, [%l7 + 0x30] | |
448 | st %fsr, [%l7 + 0x24] | |
449 | nop | |
450 | setx 0x063D, %l0, %o6 | |
451 | sdivcc %o0, %o6, %l4 | |
452 | sll %i6, %i4, %i7 | |
453 | movl %fcc3, 0x674, %l6 | |
454 | st %fsr, [%l7 + 0x24] | |
455 | st %fsr, [%l7 + 0x7C] | |
456 | st %fsr, [%l7 + 0x48] | |
457 | nop | |
458 | fitos %f9, %f25 | |
459 | wrpr %l1, 0x08ED, %cwp | |
460 | EXIT_GOOD | |
461 | ||
462 | ||
463 | ||
464 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
465 | ! | |
466 | ! Stats for Thread 0: | |
467 | ! | |
468 | ! Type l : 55 | |
469 | ! Type a : 12 | |
470 | ! Type x : 4 | |
471 | ! Type cti : 11 | |
472 | ! Type f : 50 | |
473 | ! Type i : 68 | |
474 | ! | |
475 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
476 | ||
477 | ! | |
478 | ! Thread 1 Start | |
479 | ! | |
480 | main_t1: | |
481 | mov %l7, %g1 | |
482 | !# Set %cwp for 8 windows | |
483 | !# This threads memory space into each %l7 | |
484 | wrpr %g0, 0x7, %cwp | |
485 | mov %g1, %l7 | |
486 | wrpr %g0, 0x6, %cwp | |
487 | mov %g1, %l7 | |
488 | wrpr %g0, 0x5, %cwp | |
489 | mov %g1, %l7 | |
490 | wrpr %g0, 0x4, %cwp | |
491 | mov %g1, %l7 | |
492 | wrpr %g0, 0x3, %cwp | |
493 | mov %g1, %l7 | |
494 | wrpr %g0, 0x2, %cwp | |
495 | mov %g1, %l7 | |
496 | wrpr %g0, 0x1, %cwp | |
497 | mov %g1, %l7 | |
498 | wrpr %g0, 0x0, %cwp | |
499 | mov %g1, %l7 | |
500 | ||
501 | !# Set %fsr | |
502 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
503 | stx %l6, [%l7 + 0x0] !# no post process | |
504 | ldx [%l7 + 0x0], %fsr !# no post process | |
505 | ||
506 | !# Initialize registers .. | |
507 | ||
508 | !# Global registers | |
509 | set 0xD, %g1 | |
510 | set 0x5, %g2 | |
511 | set 0x8, %g3 | |
512 | set 0x4, %g4 | |
513 | set 0x9, %g5 | |
514 | set 0xA, %g6 | |
515 | set 0x7, %g7 | |
516 | !# Input registers | |
517 | set -0x6, %i0 | |
518 | set -0xB, %i1 | |
519 | set -0xB, %i2 | |
520 | set -0x9, %i3 | |
521 | set -0x0, %i4 | |
522 | set -0x5, %i5 | |
523 | set -0xE, %i6 | |
524 | set -0x3, %i7 | |
525 | !# Local registers | |
526 | set 0x7685806A, %l0 | |
527 | set 0x37E7DC2B, %l1 | |
528 | set 0x71FF9317, %l2 | |
529 | set 0x41ACEFDD, %l3 | |
530 | set 0x0EB9C626, %l4 | |
531 | set 0x78C202D8, %l5 | |
532 | set 0x48628AB1, %l6 | |
533 | !# Output registers | |
534 | set 0x0A0A, %o0 | |
535 | set 0x0842, %o1 | |
536 | set 0x1810, %o2 | |
537 | set 0x1296, %o3 | |
538 | set 0x1A32, %o4 | |
539 | set -0x16CE, %o5 | |
540 | set 0x1AF4, %o6 | |
541 | set -0x08D0, %o7 | |
542 | !# Float registers | |
543 | INIT_TH_FP_REG(%l7,%f0,0xCC8D0620E2DA3693) | |
544 | INIT_TH_FP_REG(%l7,%f2,0xFA244F23DF29DB54) | |
545 | INIT_TH_FP_REG(%l7,%f4,0xB3D57F1FD825C368) | |
546 | INIT_TH_FP_REG(%l7,%f6,0xD424E498A853CE5F) | |
547 | INIT_TH_FP_REG(%l7,%f8,0x977F0E2124D33F26) | |
548 | INIT_TH_FP_REG(%l7,%f10,0xA0B27E8022DAD6F1) | |
549 | INIT_TH_FP_REG(%l7,%f12,0x0E18BA3EE2FD2B03) | |
550 | INIT_TH_FP_REG(%l7,%f14,0x82E2F7E67C833C90) | |
551 | INIT_TH_FP_REG(%l7,%f16,0xB89D0594757DA2EA) | |
552 | INIT_TH_FP_REG(%l7,%f18,0x13FED6033727FCD0) | |
553 | INIT_TH_FP_REG(%l7,%f20,0x07AF4B2FEA0A7C57) | |
554 | INIT_TH_FP_REG(%l7,%f22,0xF9469CA7B8499B25) | |
555 | INIT_TH_FP_REG(%l7,%f24,0x44BC25C38BAFF430) | |
556 | INIT_TH_FP_REG(%l7,%f26,0x93A19EEFE466340C) | |
557 | INIT_TH_FP_REG(%l7,%f28,0xAAE03C1EEE40660C) | |
558 | INIT_TH_FP_REG(%l7,%f30,0x355FB97FCC4E55E9) | |
559 | ||
560 | !# Execute Main Diag .. | |
561 | ||
562 | bgu,pn %xcc, loop_12 | |
563 | st %fsr, [%l7 + 0x38] | |
564 | fmovsu %fcc2, %f11, %f16 | |
565 | nop | |
566 | setx 0x1D1D, %l0, %l3 | |
567 | sdivcc %i0, %l3, %l0 | |
568 | loop_12: | |
569 | st %fsr, [%l7 + 0x4C] | |
570 | rd %asi, %g4 | |
571 | fbo,a,pn %fcc1, loop_13 | |
572 | fmovdpos %icc, %f2, %f30 | |
573 | edge32l %o7, %o5, %i3 | |
574 | nop | |
575 | setx 0x9972168E7072D22D, %l0, %l6 | |
576 | stx %l6, [%l7 + 0x28] | |
577 | ldd [%l7 + 0x28], %f4 | |
578 | fsqrtd %f4, %f18 | |
579 | loop_13: | |
580 | wrpr %g2, %i1, %cwp | |
581 | rd %softint, %o1 | |
582 | st %fsr, [%l7 + 0x7C] | |
583 | fmovduge %fcc1, %f12, %f16 | |
584 | st %fsr, [%l7 + 0x20] | |
585 | movrne %i5, %g3, %o2 | |
586 | fmovdvc %xcc, %f6, %f0 | |
587 | wr %l5, 0x0EEC, %ccr | |
588 | tgu %xcc, 0x2 | |
589 | rdpr %pil, %g5 | |
590 | swap [%l7 + 0x58], %g1 | |
591 | ta %icc, 0x6 | |
592 | move %xcc, %g6, %o3 | |
593 | st %fsr, [%l7 + 0x44] | |
594 | fmovdu %fcc0, %f12, %f30 | |
595 | st %fsr, [%l7 + 0x34] | |
596 | movue %fcc1, 0x4B1, %i2 | |
597 | st %fsr, [%l7 + 0x28] | |
598 | addc %l2, 0x0BDE, %o4 | |
599 | pdist %f12, %f18, %f8 | |
600 | movue %fcc2, %g7, %o6 | |
601 | fmovsule %fcc3, %f1, %f12 | |
602 | fpadd32s %f29, %f14, %f21 | |
603 | rd %asi, %o0 | |
604 | fpadd32 %f4, %f22, %f22 | |
605 | movgu %icc, %l4, %i4 | |
606 | tsubcctv %i6, %l6, %i7 | |
607 | set 0x6A, %i5 | |
608 | stha %l1, [%l7 + %i5] 0x10 | |
609 | fmovscs %xcc, %f7, %f25 | |
610 | st %fsr, [%l7 + 0x48] | |
611 | nop | |
612 | setx 0xAC49407F09B6DC6A, %l0, %l6 | |
613 | stx %l6, [%l7 + 0x28] | |
614 | ldd [%l7 + 0x28], %f28 | |
615 | fsqrtd %f28, %f26 | |
616 | st %fsr, [%l7 + 0x74] | |
617 | brlez,pn %i0, loop_14 | |
618 | nop | |
619 | set 0x38, %l4 | |
620 | ldd [%l7 + %l4], %f10 | |
621 | st %fsr, [%l7 + 0x48] | |
622 | fnot1 %f16, %f30 | |
623 | loop_14: | |
624 | wr %l0, %g4, %softint | |
625 | movcc %icc, %o7, %l3 | |
626 | set 0x40, %g6 | |
627 | ldda [%l7 + %g6] 0xd9, %f0 | |
628 | movu %fcc0, 0x31B, %o5 | |
629 | st %fsr, [%l7 + 0x18] | |
630 | fornot2 %f6, %f20, %f24 | |
631 | fble %fcc1, loop_15 | |
632 | bgu,pn %icc, loop_16 | |
633 | taddcctv %g2, 0x1371, %i3 | |
634 | fmovrdne %i1, %f24, %f28 | |
635 | loop_15: | |
636 | wrpr %i5, %o1, %pil | |
637 | loop_16: | |
638 | rd %pc, %g3 | |
639 | st %fsr, [%l7 + 0x1C] | |
640 | nop | |
641 | set 0x10, %i0 | |
642 | stx %fsr, [%l7 + %i0] | |
643 | rd %asi, %l5 | |
644 | tneg %icc, 0x2 | |
645 | bgu,a,pn %icc, loop_17 | |
646 | edge8 %g5, %o2, %g6 | |
647 | ta %xcc, 0x1 | |
648 | and %g1, %i2, %l2 | |
649 | loop_17: | |
650 | st %fsr, [%l7 + 0x60] | |
651 | st %fsr, [%l7 + 0x40] | |
652 | ldsb [%l7 + 0x61], %o3 | |
653 | fmul8sux16 %f14, %f20, %f18 | |
654 | fble,a %fcc3, loop_18 | |
655 | stw %o4, [%l7 + 0x44] | |
656 | st %fsr, [%l7 + 0x08] | |
657 | fbule %fcc2, loop_19 | |
658 | loop_18: | |
659 | st %fsr, [%l7 + 0x58] | |
660 | fmovdcc %icc, %f8, %f0 | |
661 | nop | |
662 | setx 0x2CE9C0DB22627062, %l0, %l6 | |
663 | stx %l6, [%l7 + 0x28] | |
664 | ldd [%l7 + 0x28], %f22 | |
665 | setx 0x1EE9BED3B923B078, %l1, %l5 | |
666 | stx %l5, [%l7 + 0x10] | |
667 | ldd [%l7 + 0x10], %f0 | |
668 | fsubd %f0, %f22, %f2 | |
669 | loop_19: | |
670 | st %fsr, [%l7 + 0x1C] | |
671 | tg %icc, 0x7 | |
672 | st %fsr, [%l7 + 0x58] | |
673 | fcmple32 %f26, %f14, %o6 | |
674 | fmovdneg %icc, %f8, %f0 | |
675 | st %fsr, [%l7 + 0x30] | |
676 | stbar | |
677 | fone %f24 | |
678 | st %fsr, [%l7 + 0x5C] | |
679 | rd %y, %g7 | |
680 | st %fsr, [%l7 + 0x70] | |
681 | st %fsr, [%l7 + 0x20] | |
682 | alignaddr %o0, %i4, %i6 | |
683 | wr %l6, %i7, %sys_tick | |
684 | fand %f30, %f24, %f0 | |
685 | st %fsr, [%l7 + 0x7C] | |
686 | fmovsneg %xcc, %f16, %f2 | |
687 | stx %l1, [%l7 + 0x70] | |
688 | wr %g0, 0x10, %asi | |
689 | sta %f22, [%l7 + 0x08] %asi | |
690 | addcc %l4, 0x0977, %i0 | |
691 | fmovdle %xcc, %f8, %f6 | |
692 | st %fsr, [%l7 + 0x70] | |
693 | brgez %l0, loop_20 | |
694 | st %fsr, [%l7 + 0x5C] | |
695 | fpsub16s %f7, %f26, %f20 | |
696 | movcc %icc, %g4, %l3 | |
697 | loop_20: | |
698 | edge16n %o7, %o5, %i3 | |
699 | rdpr %tl, %i1 | |
700 | fxor %f10, %f2, %f16 | |
701 | nop | |
702 | setx 0x2C19EB62211A325E, %l0, %l6 | |
703 | stx %l6, [%l7 + 0x28] | |
704 | ldd [%l7 + 0x28], %f20 | |
705 | setx 0x6A228ABD79DC21DA, %l1, %l5 | |
706 | stx %l5, [%l7 + 0x10] | |
707 | ldd [%l7 + 0x10], %f26 | |
708 | fsubd %f26, %f20, %f4 | |
709 | fbl,pn %fcc0, loop_21 | |
710 | fbuge,pn %fcc2, loop_22 | |
711 | st %fsr, [%l7 + 0x20] | |
712 | move %fcc0, %i5, %g2 | |
713 | loop_21: | |
714 | alignaddr %o1, %g3, %l5 | |
715 | loop_22: | |
716 | tcc %icc, 0x5 | |
717 | tg %icc, 0x5 | |
718 | orncc %o2, 0x1F6D, %g5 | |
719 | fmovdo %fcc3, %f20, %f26 | |
720 | orncc %g6, %g1, %i2 | |
721 | movrgz %l2, 0x152, %o3 | |
722 | rdhpr %hpstate, %o6 | |
723 | smulcc %o4, %g7, %o0 | |
724 | nop | |
725 | set 0x58, %o5 | |
726 | ldd [%l7 + %o5], %f4 | |
727 | fnot1s %f5, %f3 | |
728 | or %i4, %i6, %l6 | |
729 | movpos %xcc, 0x2BE, %l1 | |
730 | st %fsr, [%l7 + 0x38] | |
731 | fands %f24, %f7, %f12 | |
732 | orcc %l4, %i0, %l0 | |
733 | st %fsr, [%l7 + 0x58] | |
734 | movpos %icc, %g4, %l3 | |
735 | fmovse %fcc2, %f12, %f8 | |
736 | fmovrde %i7, %f30, %f10 | |
737 | fmovdule %fcc0, %f6, %f4 | |
738 | nop | |
739 | set 0x28, %i6 | |
740 | ldd [%l7 + %i6], %o6 | |
741 | st %fsr, [%l7 + 0x2C] | |
742 | alignaddr %i3, %i1, %o5 | |
743 | fmovdu %fcc0, %f16, %f4 | |
744 | fmovsvs %xcc, %f0, %f22 | |
745 | fmovscc %xcc, %f8, %f14 | |
746 | fcmps %fcc3, %f17, %f15 | |
747 | st %fsr, [%l7 + 0x5C] | |
748 | addc %g2, %i5, %o1 | |
749 | movre %l5, 0x271, %g3 | |
750 | bleu,pt %icc, loop_23 | |
751 | st %fsr, [%l7 + 0x14] | |
752 | st %fsr, [%l7 + 0x6C] | |
753 | fmovsa %xcc, %f25, %f27 | |
754 | loop_23: | |
755 | edge32n %g5, %g6, %o2 | |
756 | nop | |
757 | setx 0x1274, %l0, %l2 | |
758 | udivcc %i2, %l2, %o3 | |
759 | st %fsr, [%l7 + 0x14] | |
760 | set 0x4A, %l0 | |
761 | lduha [%l7 + %l0] 0x81, %g1 | |
762 | st %fsr, [%l7 + 0x48] | |
763 | st %fsr, [%l7 + 0x28] | |
764 | orn %o6, %g7, %o4 | |
765 | smul %i4, 0x1C13, %o0 | |
766 | fmovs %f25, %f6 | |
767 | fmovdule %fcc1, %f0, %f4 | |
768 | fsrc2 %f22, %f26 | |
769 | movvc %xcc, %l6, %l1 | |
770 | orncc %l4, %i6, %l0 | |
771 | nop | |
772 | fitos %f8, %f9 | |
773 | edge32ln %g4, %l3, %i7 | |
774 | rdpr %otherwin, %i0 | |
775 | tcs %xcc, 0x4 | |
776 | fzero %f26 | |
777 | rd %ccr, %i3 | |
778 | fzero %f6 | |
779 | st %fsr, [%l7 + 0x7C] | |
780 | ||
781 | or %g0, 0x8, %l0 | |
782 | sllx %l0, 0x3c, %l0 | |
783 | wrhpr %l0, 0x556, %hsys_tick_cmpr | |
784 | wrpr %g0, 0x2, %gl | |
785 | rd %sys_tick_cmpr, %o1 | |
786 | fxnors %f7, %f1, %f4 | |
787 | st %fsr, [%l7 + 0x28] | |
788 | fmovsneg %xcc, %f21, %f27 | |
789 | fmovsleu %xcc, %f16, %f25 | |
790 | st %fsr, [%l7 + 0x34] | |
791 | edge32l %l5, %g3, %o5 | |
792 | nop | |
793 | setx 0x32D19367, %l0, %l6 | |
794 | st %l6, [%l7 + 0x28] | |
795 | ld [%l7 + 0x28], %f0 | |
796 | setx 0xF9B5E97B, %l1, %l5 | |
797 | st %l5, [%l7 + 0x10] | |
798 | ld [%l7 + 0x10], %f23 | |
799 | fmuls %f23, %f0, %f25 | |
800 | bn,pt %xcc, loop_24 | |
801 | st %fsr, [%l7 + 0x08] | |
802 | ldx [%l7 + 0x78], %g6 | |
803 | fmovrse %g5, %f22, %f0 | |
804 | loop_24: | |
805 | nop | |
806 | fitos %f5, %f5 | |
807 | fstoi %f5, %f6 | |
808 | udiv %o2, 0x165A, %i2 | |
809 | st %fsr, [%l7 + 0x28] | |
810 | alignaddrl %l2, %o3, %o6 | |
811 | st %fsr, [%l7 + 0x2C] | |
812 | rdpr %canrestore, %g1 | |
813 | fmovrsgez %g7, %f9, %f26 | |
814 | st %fsr, [%l7 + 0x3C] | |
815 | fmul8x16au %f30, %f15, %f12 | |
816 | add %i4, %o0, %o4 | |
817 | st %fsr, [%l7 + 0x50] | |
818 | tvc %icc, 0x2 | |
819 | tpos %icc, 0x2 | |
820 | mova %icc, 0x603, %l6 | |
821 | add %l4, %l1, %l0 | |
822 | EXIT_GOOD | |
823 | ||
824 | ||
825 | ||
826 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
827 | ! | |
828 | ! Stats for Thread 1: | |
829 | ! | |
830 | ! Type l : 57 | |
831 | ! Type a : 20 | |
832 | ! Type x : 4 | |
833 | ! Type cti : 13 | |
834 | ! Type f : 52 | |
835 | ! Type i : 54 | |
836 | ! | |
837 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
838 | ||
839 | ! | |
840 | ! Thread 2 Start | |
841 | ! | |
842 | main_t2: | |
843 | mov %l7, %g1 | |
844 | !# Set %cwp for 8 windows | |
845 | !# This threads memory space into each %l7 | |
846 | wrpr %g0, 0x7, %cwp | |
847 | mov %g1, %l7 | |
848 | wrpr %g0, 0x6, %cwp | |
849 | mov %g1, %l7 | |
850 | wrpr %g0, 0x5, %cwp | |
851 | mov %g1, %l7 | |
852 | wrpr %g0, 0x4, %cwp | |
853 | mov %g1, %l7 | |
854 | wrpr %g0, 0x3, %cwp | |
855 | mov %g1, %l7 | |
856 | wrpr %g0, 0x2, %cwp | |
857 | mov %g1, %l7 | |
858 | wrpr %g0, 0x1, %cwp | |
859 | mov %g1, %l7 | |
860 | wrpr %g0, 0x0, %cwp | |
861 | mov %g1, %l7 | |
862 | ||
863 | !# Set %fsr | |
864 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
865 | stx %l6, [%l7 + 0x0] !# no post process | |
866 | ldx [%l7 + 0x0], %fsr !# no post process | |
867 | ||
868 | !# Initialize registers .. | |
869 | ||
870 | !# Global registers | |
871 | set 0xA, %g1 | |
872 | set 0x0, %g2 | |
873 | set 0xF, %g3 | |
874 | set 0x1, %g4 | |
875 | set 0x8, %g5 | |
876 | set 0xA, %g6 | |
877 | set 0x4, %g7 | |
878 | !# Input registers | |
879 | set -0x2, %i0 | |
880 | set -0x6, %i1 | |
881 | set -0x2, %i2 | |
882 | set -0xA, %i3 | |
883 | set -0xB, %i4 | |
884 | set -0xD, %i5 | |
885 | set -0x3, %i6 | |
886 | set -0x9, %i7 | |
887 | !# Local registers | |
888 | set 0x5039558F, %l0 | |
889 | set 0x6680A21B, %l1 | |
890 | set 0x4BF3CDDC, %l2 | |
891 | set 0x0F3E6246, %l3 | |
892 | set 0x656510D6, %l4 | |
893 | set 0x582FE47A, %l5 | |
894 | set 0x12B916C3, %l6 | |
895 | !# Output registers | |
896 | set -0x0680, %o0 | |
897 | set -0x1C4C, %o1 | |
898 | set 0x0643, %o2 | |
899 | set -0x1FE5, %o3 | |
900 | set -0x0040, %o4 | |
901 | set 0x1E70, %o5 | |
902 | set -0x0D6F, %o6 | |
903 | set -0x1034, %o7 | |
904 | !# Float registers | |
905 | INIT_TH_FP_REG(%l7,%f0,0xCC8D0620E2DA3693) | |
906 | INIT_TH_FP_REG(%l7,%f2,0xFA244F23DF29DB54) | |
907 | INIT_TH_FP_REG(%l7,%f4,0xB3D57F1FD825C368) | |
908 | INIT_TH_FP_REG(%l7,%f6,0xD424E498A853CE5F) | |
909 | INIT_TH_FP_REG(%l7,%f8,0x977F0E2124D33F26) | |
910 | INIT_TH_FP_REG(%l7,%f10,0xA0B27E8022DAD6F1) | |
911 | INIT_TH_FP_REG(%l7,%f12,0x0E18BA3EE2FD2B03) | |
912 | INIT_TH_FP_REG(%l7,%f14,0x82E2F7E67C833C90) | |
913 | INIT_TH_FP_REG(%l7,%f16,0xB89D0594757DA2EA) | |
914 | INIT_TH_FP_REG(%l7,%f18,0x13FED6033727FCD0) | |
915 | INIT_TH_FP_REG(%l7,%f20,0x07AF4B2FEA0A7C57) | |
916 | INIT_TH_FP_REG(%l7,%f22,0xF9469CA7B8499B25) | |
917 | INIT_TH_FP_REG(%l7,%f24,0x44BC25C38BAFF430) | |
918 | INIT_TH_FP_REG(%l7,%f26,0x93A19EEFE466340C) | |
919 | INIT_TH_FP_REG(%l7,%f28,0xAAE03C1EEE40660C) | |
920 | INIT_TH_FP_REG(%l7,%f30,0x355FB97FCC4E55E9) | |
921 | ||
922 | !# Execute Main Diag .. | |
923 | ||
924 | fcmps %fcc2, %f21, %f9 | |
925 | srl %i6, %l3, %g4 | |
926 | fnot2s %f24, %f12 | |
927 | edge8l %i0, %i7, %i3 | |
928 | subcc %o7, 0x0BEF, %g2 | |
929 | movrlz %i1, %o1, %i5 | |
930 | tvs %xcc, 0x4 | |
931 | fmovsgu %icc, %f2, %f5 | |
932 | movrlez %g3, %o5, %g6 | |
933 | st %fsr, [%l7 + 0x38] | |
934 | st %fsr, [%l7 + 0x18] | |
935 | st %fsr, [%l7 + 0x1C] | |
936 | ldx [%l7 + 0x20], %g5 | |
937 | fmovs %f15, %f31 | |
938 | st %fsr, [%l7 + 0x70] | |
939 | fmovslg %fcc1, %f31, %f25 | |
940 | nop | |
941 | fitos %f14, %f5 | |
942 | fstox %f5, %f12 | |
943 | fxtos %f12, %f14 | |
944 | st %fsr, [%l7 + 0x70] | |
945 | rd %softint, %l5 | |
946 | fmovsug %fcc0, %f4, %f11 | |
947 | ldsw [%l7 + 0x70], %i2 | |
948 | bcs,a,pt %xcc, loop_25 | |
949 | st %fsr, [%l7 + 0x58] | |
950 | fand %f30, %f26, %f2 | |
951 | nop | |
952 | set 0x5A, %i1 | |
953 | stb %o2, [%l7 + %i1] | |
954 | loop_25: | |
955 | subccc %o3, %o6, %g1 | |
956 | stbar | |
957 | st %fsr, [%l7 + 0x40] | |
958 | udiv %l2, 0x14E1, %g7 | |
959 | fmovse %fcc2, %f23, %f15 | |
960 | mulscc %o0, 0x1BFC, %o4 | |
961 | fmovrse %i4, %f24, %f16 | |
962 | st %fsr, [%l7 + 0x48] | |
963 | wrpr %l4, 0x1B7E, %pil | |
964 | st %fsr, [%l7 + 0x34] | |
965 | movuge %fcc3, %l6, %l1 | |
966 | tgu %icc, 0x4 | |
967 | wrpr %l0, 0x0B1C, %tick | |
968 | sll %i6, %l3, %g4 | |
969 | alignaddr %i0, %i7, %o7 | |
970 | fpadd16 %f28, %f30, %f30 | |
971 | prefetch [%l7 + 0x14], 3 | |
972 | fbg,a,pt %fcc0, loop_26 | |
973 | sub %i3, %g2, %i1 | |
974 | st %fsr, [%l7 + 0x58] | |
975 | fmovsvc %xcc, %f27, %f13 | |
976 | loop_26: | |
977 | nop | |
978 | ||
979 | or %g0, 0x8, %l0 | |
980 | sllx %l0, 0x3c, %l0 | |
981 | wrhpr %l0, %g0, %hsys_tick_cmpr | |
982 | st %fsr, [%l7 + 0x40] | |
983 | fcmple16 %f22, %f26, %i5 | |
984 | st %fsr, [%l7 + 0x18] | |
985 | st %fsr, [%l7 + 0x4C] | |
986 | fmovdne %fcc3, %f10, %f6 | |
987 | fands %f26, %f1, %f13 | |
988 | st %fsr, [%l7 + 0x50] | |
989 | nop | |
990 | setx 0x0290, %l0, %g5 | |
991 | udiv %g6, %g5, %l5 | |
992 | fxors %f23, %f2, %f30 | |
993 | nop | |
994 | fitos %f8, %f1 | |
995 | fstox %f1, %f18 | |
996 | fxtos %f18, %f22 | |
997 | fmovd %f10, %f4 | |
998 | array8 %o5, %i2, %o3 | |
999 | movrlz %o6, %g1, %o2 | |
1000 | movrgz %g7, %o0, %o4 | |
1001 | sllx %l2, %i4, %l4 | |
1002 | st %fsr, [%l7 + 0x08] | |
1003 | wr %g0, 0x80, %asi | |
1004 | ldda [%l7 + 0x50] %asi, %i6 | |
1005 | st %fsr, [%l7 + 0x68] | |
1006 | tle %icc, 0x7 | |
1007 | fones %f25 | |
1008 | alignaddr %l1, %i6, %l3 | |
1009 | edge8 %g4, %i0, %l0 | |
1010 | st %fsr, [%l7 + 0x7C] | |
1011 | movcc %xcc, 0x2FB, %i7 | |
1012 | fmovrde %i3, %f0, %f2 | |
1013 | tgu %icc, 0x3 | |
1014 | st %fsr, [%l7 + 0x24] | |
1015 | fbuge,a %fcc3, loop_27 | |
1016 | fmovdne %icc, %f28, %f18 | |
1017 | wrpr %g2, %i1, %pil | |
1018 | st %fsr, [%l7 + 0x2C] | |
1019 | loop_27: | |
1020 | fmovdl %xcc, %f26, %f0 | |
1021 | nop | |
1022 | setx 0x63A72EFA427D853E, %l0, %l6 | |
1023 | stx %l6, [%l7 + 0x28] | |
1024 | ldd [%l7 + 0x28], %f24 | |
1025 | setx 0x2D131417, %l1, %l5 | |
1026 | stx %l5, [%l7 + 0x10] | |
1027 | ldd [%l7 + 0x10], %f16 | |
1028 | fsmuld %f16, %f24, %f28 | |
1029 | fmovsgu %icc, %f0, %f23 | |
1030 | fmovsne %fcc3, %f17, %f21 | |
1031 | movul %fcc3, %o7, %o1 | |
1032 | st %fsr, [%l7 + 0x18] | |
1033 | st %fsr, [%l7 + 0x44] | |
1034 | st %fsr, [%l7 + 0x7C] | |
1035 | bcs,a %xcc, loop_28 | |
1036 | ldub [%l7 + 0x45], %g3 | |
1037 | wr %g6, %i5, %clear_softint | |
1038 | rd %asi, %l5 | |
1039 | loop_28: | |
1040 | st %fsr, [%l7 + 0x18] | |
1041 | st %fsr, [%l7 + 0x10] | |
1042 | ||
1043 | or %g0, 0x8, %l0 | |
1044 | sllx %l0, 0x3c, %l0 | |
1045 | wr %l0, %g0, %sys_tick_cmpr | |
1046 | st %fsr, [%l7 + 0x74] | |
1047 | fcmped %fcc1, %f30, %f10 | |
1048 | rdpr %tl, %g5 | |
1049 | st %fsr, [%l7 + 0x48] | |
1050 | st %fsr, [%l7 + 0x60] | |
1051 | fmovso %fcc0, %f12, %f23 | |
1052 | movn %fcc2, %o3, %o6 | |
1053 | fmovdle %fcc3, %f14, %f0 | |
1054 | st %fsr, [%l7 + 0x78] | |
1055 | fabsd %f4, %f18 | |
1056 | st %fsr, [%l7 + 0x54] | |
1057 | st %fsr, [%l7 + 0x58] | |
1058 | fmovsul %fcc0, %f26, %f5 | |
1059 | movre %g1, 0x305, %i2 | |
1060 | st %fsr, [%l7 + 0x3C] | |
1061 | st %fsr, [%l7 + 0x74] | |
1062 | rdhpr %ver, %g7 | |
1063 | st %fsr, [%l7 + 0x40] | |
1064 | tneg %xcc, 0x1 | |
1065 | fmovsue %fcc0, %f11, %f11 | |
1066 | fba %fcc3, loop_29 | |
1067 | nop | |
1068 | fitod %f12, %f16 | |
1069 | fdtox %f16, %f24 | |
1070 | fxtod %f24, %f2 | |
1071 | fpsub16s %f2, %f24, %f28 | |
1072 | st %fsr, [%l7 + 0x44] | |
1073 | loop_29: | |
1074 | wrpr %g0, 0x1, %gl | |
1075 | nop | |
1076 | fitod %f27, %f18 | |
1077 | movvs %icc, 0x33D, %o4 | |
1078 | fmovrslez %o2, %f4, %f12 | |
1079 | nop | |
1080 | set 0x40, %g3 | |
1081 | ldsw [%l7 + %g3], %i4 | |
1082 | movrne %l2, %l6, %l1 | |
1083 | fandnot1 %f28, %f20, %f30 | |
1084 | fmovrslez %i6, %f0, %f17 | |
1085 | st %fsr, [%l7 + 0x18] | |
1086 | rd %fprs, %l4 | |
1087 | rdpr %otherwin, %g4 | |
1088 | fnegd %f8, %f26 | |
1089 | movvs %icc, 0x0FB, %i0 | |
1090 | wr %l3, %l0, %sys_tick | |
1091 | rdpr %canrestore, %i7 | |
1092 | st %fsr, [%l7 + 0x08] | |
1093 | fmovdu %fcc3, %f6, %f4 | |
1094 | st %fsr, [%l7 + 0x1C] | |
1095 | tge %xcc, 0x2 | |
1096 | st %fsr, [%l7 + 0x50] | |
1097 | nop | |
1098 | setx 0xC2892534, %l0, %l6 | |
1099 | st %l6, [%l7 + 0x28] | |
1100 | ld [%l7 + 0x28], %f10 | |
1101 | setx 0x629BFC8F, %l1, %l5 | |
1102 | st %l5, [%l7 + 0x10] | |
1103 | ld [%l7 + 0x10], %f3 | |
1104 | fadds %f3, %f10, %f14 | |
1105 | or %g2, %i1, %i3 | |
1106 | fxnors %f8, %f6, %f25 | |
1107 | st %fsr, [%l7 + 0x48] | |
1108 | st %fsr, [%l7 + 0x38] | |
1109 | bvs,a,pt %icc, loop_30 | |
1110 | te %xcc, 0x5 | |
1111 | st %fsr, [%l7 + 0x20] | |
1112 | nop | |
1113 | fitos %f8, %f16 | |
1114 | fstox %f16, %f14 | |
1115 | loop_30: | |
1116 | st %fsr, [%l7 + 0x08] | |
1117 | bmask %o1, %o7, %g3 | |
1118 | tg %icc, 0x6 | |
1119 | addcc %i5, 0x1B5F, %g6 | |
1120 | edge32n %o5, %g5, %o3 | |
1121 | fpadd32 %f6, %f20, %f30 | |
1122 | fbe,pn %fcc0, loop_31 | |
1123 | st %fsr, [%l7 + 0x24] | |
1124 | mova %fcc1, %o6, %l5 | |
1125 | nop | |
1126 | setx 0x0474, %l0, %g7 | |
1127 | udivx %g1, %g7, %o0 | |
1128 | loop_31: | |
1129 | fands %f0, %f12, %f2 | |
1130 | movug %fcc0, 0x29A, %i2 | |
1131 | fnegs %f8, %f15 | |
1132 | st %fsr, [%l7 + 0x70] | |
1133 | st %fsr, [%l7 + 0x28] | |
1134 | fnegd %f26, %f14 | |
1135 | mova %fcc3, %o4, %o2 | |
1136 | st %fsr, [%l7 + 0x28] | |
1137 | fmovs %f30, %f25 | |
1138 | fnot1s %f28, %f19 | |
1139 | edge32n %l2, %l6, %i4 | |
1140 | rdpr %tl, %l1 | |
1141 | fmovsu %fcc0, %f0, %f5 | |
1142 | edge16n %l4, %g4, %i0 | |
1143 | nop | |
1144 | setx loop_32, %l0, %l1 | |
1145 | wrpr 0x1, %tl | |
1146 | wrpr %l1, %tnpc | |
1147 | setx 0x022100001405, %l0, %l1 | |
1148 | wrpr %l1, %tstate | |
1149 | wrhpr 0x4, %htstate | |
1150 | rdpr %tt, %l1 | |
1151 | wrpr %g0, %l1, %tt | |
1152 | rdpr %pstate, %l1 | |
1153 | wrpr %g0, %l1, %pstate | |
1154 | rdpr %tl, %l1 | |
1155 | wrpr %g0, %l1, %tl | |
1156 | rdpr %tpc, %l1 | |
1157 | wrpr %g0, %l1, %tpc | |
1158 | rdpr %tnpc, %l1 | |
1159 | wrpr %g0, %l1, %tnpc | |
1160 | rdpr %tstate, %l1 | |
1161 | wrpr %g0, %l1, %tstate | |
1162 | rdpr %tba, %l1 | |
1163 | wrpr %g0, %l1, %tba | |
1164 | rdpr %tba, %l1 | |
1165 | wrpr %g0, %l1, %tba | |
1166 | rdhpr %hpstate, %l1 | |
1167 | wrhpr %g0, %l1, %hpstate | |
1168 | rdhpr %htstate, %l1 | |
1169 | wrhpr %g0, %l1, %htstate | |
1170 | rdhpr %hintp, %l1 | |
1171 | wrhpr %g0, %l1, %hintp | |
1172 | done | |
1173 | st %fsr, [%l7 + 0x74] | |
1174 | st %fsr, [%l7 + 0x4C] | |
1175 | fmovdleu %xcc, %f8, %f28 | |
1176 | loop_32: | |
1177 | st %fsr, [%l7 + 0x14] | |
1178 | alignaddr %l3, %i6, %l0 | |
1179 | tcs %icc, 0x7 | |
1180 | fmovdlg %fcc2, %f14, %f0 | |
1181 | st %fsr, [%l7 + 0x34] | |
1182 | nop | |
1183 | setx 0x19B9, %l0, %i7 | |
1184 | udivx %g2, %i7, %i3 | |
1185 | st %fsr, [%l7 + 0x68] | |
1186 | move %xcc, 0x04A, %o1 | |
1187 | st %fsr, [%l7 + 0x08] | |
1188 | st %fsr, [%l7 + 0x34] | |
1189 | st %fsr, [%l7 + 0x3C] | |
1190 | flushw | |
1191 | fcmpne32 %f30, %f20, %o7 | |
1192 | tsubcc %g3, %i1, %i5 | |
1193 | fbne,pt %fcc0, loop_33 | |
1194 | fmovsule %fcc0, %f10, %f31 | |
1195 | tle %icc, 0x5 | |
1196 | fornot2 %f6, %f2, %f2 | |
1197 | loop_33: | |
1198 | fpsub16s %f25, %f24, %f27 | |
1199 | fabss %f6, %f31 | |
1200 | edge8l %o5, %g6, %g5 | |
1201 | fblg %fcc1, loop_34 | |
1202 | st %fsr, [%l7 + 0x60] | |
1203 | fba,a,pn %fcc3, loop_35 | |
1204 | movlg %fcc3, %o3, %o6 | |
1205 | loop_34: | |
1206 | nop | |
1207 | ||
1208 | loop_35: | |
1209 | nop | |
1210 | ||
1211 | EXIT_GOOD | |
1212 | ||
1213 | ||
1214 | ||
1215 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
1216 | ! | |
1217 | ! Stats for Thread 2: | |
1218 | ! | |
1219 | ! Type l : 63 | |
1220 | ! Type a : 16 | |
1221 | ! Type x : 1 | |
1222 | ! Type cti : 11 | |
1223 | ! Type f : 56 | |
1224 | ! Type i : 53 | |
1225 | ! | |
1226 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
1227 | ||
1228 | ! | |
1229 | ! Thread 3 Start | |
1230 | ! | |
1231 | main_t3: | |
1232 | mov %l7, %g1 | |
1233 | !# Set %cwp for 8 windows | |
1234 | !# This threads memory space into each %l7 | |
1235 | wrpr %g0, 0x7, %cwp | |
1236 | mov %g1, %l7 | |
1237 | wrpr %g0, 0x6, %cwp | |
1238 | mov %g1, %l7 | |
1239 | wrpr %g0, 0x5, %cwp | |
1240 | mov %g1, %l7 | |
1241 | wrpr %g0, 0x4, %cwp | |
1242 | mov %g1, %l7 | |
1243 | wrpr %g0, 0x3, %cwp | |
1244 | mov %g1, %l7 | |
1245 | wrpr %g0, 0x2, %cwp | |
1246 | mov %g1, %l7 | |
1247 | wrpr %g0, 0x1, %cwp | |
1248 | mov %g1, %l7 | |
1249 | wrpr %g0, 0x0, %cwp | |
1250 | mov %g1, %l7 | |
1251 | ||
1252 | !# Set %fsr | |
1253 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
1254 | stx %l6, [%l7 + 0x0] !# no post process | |
1255 | ldx [%l7 + 0x0], %fsr !# no post process | |
1256 | ||
1257 | !# Initialize registers .. | |
1258 | ||
1259 | !# Global registers | |
1260 | set 0x6, %g1 | |
1261 | set 0x9, %g2 | |
1262 | set 0x0, %g3 | |
1263 | set 0x6, %g4 | |
1264 | set 0x0, %g5 | |
1265 | set 0x7, %g6 | |
1266 | set 0xB, %g7 | |
1267 | !# Input registers | |
1268 | set -0x6, %i0 | |
1269 | set -0x4, %i1 | |
1270 | set -0x3, %i2 | |
1271 | set -0x2, %i3 | |
1272 | set -0x2, %i4 | |
1273 | set -0xE, %i5 | |
1274 | set -0xD, %i6 | |
1275 | set -0x4, %i7 | |
1276 | !# Local registers | |
1277 | set 0x694911C5, %l0 | |
1278 | set 0x47689B72, %l1 | |
1279 | set 0x60FE1226, %l2 | |
1280 | set 0x72D2B397, %l3 | |
1281 | set 0x7A053B7F, %l4 | |
1282 | set 0x5702EF7D, %l5 | |
1283 | set 0x647F50FB, %l6 | |
1284 | !# Output registers | |
1285 | set -0x0F74, %o0 | |
1286 | set -0x0851, %o1 | |
1287 | set -0x179D, %o2 | |
1288 | set 0x1DC6, %o3 | |
1289 | set -0x1D95, %o4 | |
1290 | set 0x1FA1, %o5 | |
1291 | set -0x1BE2, %o6 | |
1292 | set 0x1E91, %o7 | |
1293 | !# Float registers | |
1294 | INIT_TH_FP_REG(%l7,%f0,0xCC8D0620E2DA3693) | |
1295 | INIT_TH_FP_REG(%l7,%f2,0xFA244F23DF29DB54) | |
1296 | INIT_TH_FP_REG(%l7,%f4,0xB3D57F1FD825C368) | |
1297 | INIT_TH_FP_REG(%l7,%f6,0xD424E498A853CE5F) | |
1298 | INIT_TH_FP_REG(%l7,%f8,0x977F0E2124D33F26) | |
1299 | INIT_TH_FP_REG(%l7,%f10,0xA0B27E8022DAD6F1) | |
1300 | INIT_TH_FP_REG(%l7,%f12,0x0E18BA3EE2FD2B03) | |
1301 | INIT_TH_FP_REG(%l7,%f14,0x82E2F7E67C833C90) | |
1302 | INIT_TH_FP_REG(%l7,%f16,0xB89D0594757DA2EA) | |
1303 | INIT_TH_FP_REG(%l7,%f18,0x13FED6033727FCD0) | |
1304 | INIT_TH_FP_REG(%l7,%f20,0x07AF4B2FEA0A7C57) | |
1305 | INIT_TH_FP_REG(%l7,%f22,0xF9469CA7B8499B25) | |
1306 | INIT_TH_FP_REG(%l7,%f24,0x44BC25C38BAFF430) | |
1307 | INIT_TH_FP_REG(%l7,%f26,0x93A19EEFE466340C) | |
1308 | INIT_TH_FP_REG(%l7,%f28,0xAAE03C1EEE40660C) | |
1309 | INIT_TH_FP_REG(%l7,%f30,0x355FB97FCC4E55E9) | |
1310 | ||
1311 | !# Execute Main Diag .. | |
1312 | ||
1313 | nop | |
1314 | setx 0xDA9A3E5DD9D6CA39, %l0, %l6 | |
1315 | stx %l6, [%l7 + 0x28] | |
1316 | ldd [%l7 + 0x28], %f6 | |
1317 | setx 0x780E3EE8, %l1, %l5 | |
1318 | stx %l5, [%l7 + 0x10] | |
1319 | ldd [%l7 + 0x10], %f28 | |
1320 | fsmuld %f28, %f6, %f22 | |
1321 | st %fsr, [%l7 + 0x3C] | |
1322 | fmovrse %g1, %f8, %f5 | |
1323 | st %fsr, [%l7 + 0x10] | |
1324 | fcmpgt16 %f0, %f8, %g7 | |
1325 | fnot2 %f16, %f26 | |
1326 | andcc %l5, 0x04B4, %o0 | |
1327 | st %fsr, [%l7 + 0x68] | |
1328 | nop | |
1329 | setx 0xDE33AF3F, %l0, %l6 | |
1330 | st %l6, [%l7 + 0x28] | |
1331 | ld [%l7 + 0x28], %f11 | |
1332 | setx 0xE66FEC9F, %l1, %l5 | |
1333 | st %l5, [%l7 + 0x10] | |
1334 | ld [%l7 + 0x10], %f28 | |
1335 | fdivs %f28, %f11, %f23 | |
1336 | array16 %o4, %o2, %l2 | |
1337 | fmovse %fcc3, %f28, %f14 | |
1338 | fxors %f28, %f18, %f28 | |
1339 | st %fsr, [%l7 + 0x70] | |
1340 | st %fsr, [%l7 + 0x30] | |
1341 | fpackfix %f0, %f17 | |
1342 | mova %icc, 0x312, %l6 | |
1343 | fmovdne %fcc0, %f26, %f0 | |
1344 | srl %i4, %i2, %l1 | |
1345 | st %fsr, [%l7 + 0x74] | |
1346 | fnand %f6, %f10, %f12 | |
1347 | bl,a %icc, loop_36 | |
1348 | st %fsr, [%l7 + 0x48] | |
1349 | nop | |
1350 | setx 0xC6955B340DE70A0F, %l0, %l6 | |
1351 | stx %l6, [%l7 + 0x50] | |
1352 | ldx [%l7 + 0x50], %fsr | |
1353 | fone %f16 | |
1354 | loop_36: | |
1355 | fcmpne16 %f4, %f14, %l4 | |
1356 | st %fsr, [%l7 + 0x50] | |
1357 | addccc %g4, 0x0DA2, %l3 | |
1358 | rdhpr %hpstate, %i0 | |
1359 | edge16n %i6, %l0, %i7 | |
1360 | te %icc, 0x2 | |
1361 | subccc %i3, %o1, %g2 | |
1362 | or %g3, 0x1BD4, %o7 | |
1363 | xorcc %i1, 0x06D9, %o5 | |
1364 | st %fsr, [%l7 + 0x38] | |
1365 | st %fsr, [%l7 + 0x30] | |
1366 | ||
1367 | or %g0, 0x8, %l0 | |
1368 | sllx %l0, 0x3c, %l0 | |
1369 | wrhpr %l0, %g0, %hsys_tick_cmpr | |
1370 | fpack16 %f22, %f13 | |
1371 | fmovdcs %xcc, %f0, %f16 | |
1372 | wr %o3, %g5, %pic | |
1373 | nop | |
1374 | setx 0x38D8B4DF, %l0, %l6 | |
1375 | st %l6, [%l7 + 0x28] | |
1376 | ld [%l7 + 0x28], %f1 | |
1377 | setx 0xB53982C6, %l1, %l5 | |
1378 | st %l5, [%l7 + 0x10] | |
1379 | ld [%l7 + 0x10], %f1 | |
1380 | fadds %f1, %f1, %f17 | |
1381 | saved | |
1382 | rdpr %cwp, %g1 | |
1383 | rdpr %cansave, %g2 | |
1384 | rdpr %canrestore, %g3 | |
1385 | rdpr %cleanwin, %g4 | |
1386 | rdpr %otherwin, %g5 | |
1387 | rdpr %wstate, %g6 | |
1388 | wr %g0, 0x2f, %asi | |
1389 | stda %g0, [%l7 + 0x20] %asi | |
1390 | membar #Sync | |
1391 | nop | |
1392 | setx 0x9EDF1B12, %l0, %l6 | |
1393 | st %l6, [%l7 + 0x28] | |
1394 | ld [%l7 + 0x28], %f27 | |
1395 | setx 0x474C3123, %l1, %l5 | |
1396 | st %l5, [%l7 + 0x10] | |
1397 | ld [%l7 + 0x10], %f0 | |
1398 | fdivs %f0, %f27, %f11 | |
1399 | fmovdge %fcc1, %f26, %f20 | |
1400 | mulx %o6, 0x0945, %l5 | |
1401 | fornot1s %f30, %f1, %f31 | |
1402 | ldsw [%l7 + 0x14], %g7 | |
1403 | fmovdne %xcc, %f20, %f18 | |
1404 | st %fsr, [%l7 + 0x38] | |
1405 | st %fsr, [%l7 + 0x3C] | |
1406 | wrpr %o0, %o4, %tick | |
1407 | st %fsr, [%l7 + 0x6C] | |
1408 | orncc %l2, 0x0E3B, %l6 | |
1409 | move %fcc2, 0x672, %o2 | |
1410 | st %fsr, [%l7 + 0x2C] | |
1411 | st %fsr, [%l7 + 0x40] | |
1412 | st %fsr, [%l7 + 0x60] | |
1413 | fmovrse %i2, %f19, %f5 | |
1414 | fabss %f18, %f24 | |
1415 | brlez %i4, loop_37 | |
1416 | rd %tick_cmpr, %l1 | |
1417 | st %fsr, [%l7 + 0x14] | |
1418 | st %fsr, [%l7 + 0x48] | |
1419 | loop_37: | |
1420 | fmovrslz %l4, %f17, %f24 | |
1421 | st %fsr, [%l7 + 0x20] | |
1422 | st %fsr, [%l7 + 0x14] | |
1423 | siam 0x0 | |
1424 | fmovdue %fcc3, %f2, %f20 | |
1425 | nop | |
1426 | setx 0x23D321BB0DDDB048, %l0, %l6 | |
1427 | stx %l6, [%l7 + 0x28] | |
1428 | ldd [%l7 + 0x28], %f12 | |
1429 | fsqrtd %f12, %f8 | |
1430 | st %fsr, [%l7 + 0x20] | |
1431 | tl %xcc, 0x4 | |
1432 | fmovscs %xcc, %f0, %f23 | |
1433 | st %fsr, [%l7 + 0x24] | |
1434 | andcc %l3, 0x10BE, %i0 | |
1435 | movcs %icc, 0x4DA, %i6 | |
1436 | wr %g0, 0x88, %asi | |
1437 | lduha [%l7 + 0x44] %asi, %l0 | |
1438 | fcmpgt16 %f2, %f6, %g4 | |
1439 | nop | |
1440 | setx 0x776EB75C, %l0, %l6 | |
1441 | st %l6, [%l7 + 0x24] | |
1442 | ld [%l7 + 0x24], %fsr | |
1443 | andn %i7, 0x1411, %i3 | |
1444 | st %fsr, [%l7 + 0x34] | |
1445 | add %l7, 0x40, %l6 | |
1446 | wr %g0, 0x04, %asi | |
1447 | lda [%l6] %asi, %o1 | |
1448 | casa [%l6] %asi, %o1, %g2 | |
1449 | edge16l %o7, %i1, %g3 | |
1450 | bne,a,pn %xcc, loop_38 | |
1451 | siam 0x7 | |
1452 | bn,pt %icc, loop_39 | |
1453 | fbug %fcc0, loop_40 | |
1454 | loop_38: | |
1455 | rd %pc, %o5 | |
1456 | tsubcc %g6, 0x0CE8, %i5 | |
1457 | loop_39: | |
1458 | nop | |
1459 | setx 0xCDDB3F25, %l0, %l6 | |
1460 | st %l6, [%l7 + 0x28] | |
1461 | ld [%l7 + 0x28], %f3 | |
1462 | setx 0x0F2EA867, %l1, %l5 | |
1463 | st %l5, [%l7 + 0x10] | |
1464 | ld [%l7 + 0x10], %f19 | |
1465 | fadds %f19, %f3, %f3 | |
1466 | loop_40: | |
1467 | fmovrse %g5, %f4, %f16 | |
1468 | st %fsr, [%l7 + 0x78] | |
1469 | ||
1470 | or %g0, 0x8, %l0 | |
1471 | sllx %l0, 0x3c, %l0 | |
1472 | wrhpr %l0, 0xA04, %hsys_tick_cmpr | |
1473 | st %fsr, [%l7 + 0x44] | |
1474 | fabss %f14, %f16 | |
1475 | saved | |
1476 | rdpr %cwp, %g1 | |
1477 | rdpr %cansave, %g2 | |
1478 | rdpr %canrestore, %g3 | |
1479 | rdpr %cleanwin, %g4 | |
1480 | rdpr %otherwin, %g5 | |
1481 | rdpr %wstate, %g6 | |
1482 | fmovdgu %xcc, %f2, %f6 | |
1483 | taddcctv %l5, %g7, %o6 | |
1484 | st %fsr, [%l7 + 0x6C] | |
1485 | movrlz %o4, %o0, %l2 | |
1486 | tpos %icc, 0x3 | |
1487 | tsubcctv %o2, %i2, %l6 | |
1488 | tsubcc %l1, %i4, %l4 | |
1489 | rd %ccr, %l3 | |
1490 | wr %i0, %l0, %sys_tick | |
1491 | st %fsr, [%l7 + 0x08] | |
1492 | st %fsr, [%l7 + 0x54] | |
1493 | st %fsr, [%l7 + 0x70] | |
1494 | st %fsr, [%l7 + 0x5C] | |
1495 | st %fsr, [%l7 + 0x1C] | |
1496 | sra %g4, 0x14, %i7 | |
1497 | ||
1498 | or %g0, 0x8, %l0 | |
1499 | sllx %l0, 0x3c, %l0 | |
1500 | wrhpr %l0, %g0, %hsys_tick_cmpr | |
1501 | fmovsl %fcc3, %f8, %f19 | |
1502 | xorcc %o1, 0x0929, %i6 | |
1503 | nop | |
1504 | setx 0x05B1, %l0, %i1 | |
1505 | sdiv %o7, %i1, %g3 | |
1506 | tcs %icc, 0x1 | |
1507 | array32 %o5, %g2, %i5 | |
1508 | movrne %g6, 0x3C9, %g5 | |
1509 | st %fsr, [%l7 + 0x70] | |
1510 | fmul8x16au %f8, %f9, %f4 | |
1511 | tvc %icc, 0x7 | |
1512 | st %fsr, [%l7 + 0x34] | |
1513 | bcs,a %xcc, loop_41 | |
1514 | fpsub32 %f30, %f0, %f16 | |
1515 | bg,pt %xcc, loop_42 | |
1516 | wr %g1, %o3, %sys_tick | |
1517 | loop_41: | |
1518 | fbule,pt %fcc2, loop_43 | |
1519 | fone %f2 | |
1520 | loop_42: | |
1521 | fmovd %f4, %f8 | |
1522 | fmovda %fcc2, %f8, %f18 | |
1523 | loop_43: | |
1524 | fnand %f2, %f12, %f24 | |
1525 | st %fsr, [%l7 + 0x74] | |
1526 | fors %f13, %f9, %f6 | |
1527 | smul %g7, 0x0465, %o6 | |
1528 | nop | |
1529 | set 0x5C, %i7 | |
1530 | prefetch [%l7 + %i7], 2 | |
1531 | fmovsne %fcc1, %f13, %f26 | |
1532 | movvs %xcc, %l5, %o0 | |
1533 | nop | |
1534 | setx 0x40A060E8, %l0, %l6 | |
1535 | st %l6, [%l7 + 0x28] | |
1536 | ld [%l7 + 0x28], %f10 | |
1537 | setx 0x8F6D1168, %l1, %l5 | |
1538 | st %l5, [%l7 + 0x10] | |
1539 | ld [%l7 + 0x10], %f17 | |
1540 | fdivs %f17, %f10, %f20 | |
1541 | rd %tick_cmpr, %l2 | |
1542 | st %fsr, [%l7 + 0x74] | |
1543 | st %fsr, [%l7 + 0x1C] | |
1544 | tn %xcc, 0x0 | |
1545 | st %fsr, [%l7 + 0x34] | |
1546 | edge16n %o4, %i2, %l6 | |
1547 | nop | |
1548 | fitod %f10, %f22 | |
1549 | fdtoi %f22, %f4 | |
1550 | fmovsue %fcc0, %f23, %f23 | |
1551 | st %fsr, [%l7 + 0x3C] | |
1552 | movrgez %o2, %i4, %l1 | |
1553 | smulcc %l4, 0x0CC9, %l3 | |
1554 | fmovsge %fcc0, %f8, %f15 | |
1555 | stbar | |
1556 | fandnot1s %f6, %f10, %f13 | |
1557 | st %fsr, [%l7 + 0x08] | |
1558 | nop | |
1559 | setx 0x1954, %l1, %l0 | |
1560 | sdivx %i0, %l0, %g4 | |
1561 | movrlz %i3, 0x3DB, %o1 | |
1562 | st %fsr, [%l7 + 0x3C] | |
1563 | fmovrslz %i6, %f8, %f9 | |
1564 | udivcc %o7, 0x192D, %i7 | |
1565 | rdhpr %hintp, %i1 | |
1566 | fmovsg %fcc0, %f10, %f15 | |
1567 | fmovrdlz %g3, %f22, %f6 | |
1568 | st %fsr, [%l7 + 0x30] | |
1569 | restored | |
1570 | rdpr %cwp, %g1 | |
1571 | rdpr %cansave, %g2 | |
1572 | rdpr %canrestore, %g3 | |
1573 | rdpr %cleanwin, %g4 | |
1574 | rdpr %otherwin, %g5 | |
1575 | rdpr %wstate, %g6 | |
1576 | bmask %o5, %i5, %g2 | |
1577 | udiv %g6, 0x0433, %g5 | |
1578 | wr %g1, 0x025E, %softint | |
1579 | fmovrsgz %g7, %f5, %f10 | |
1580 | st %fsr, [%l7 + 0x30] | |
1581 | nop | |
1582 | fitod %f0, %f14 | |
1583 | fdtox %f14, %f28 | |
1584 | fxtod %f28, %f30 | |
1585 | nop | |
1586 | setx 0xA73EB7C207ACA7B5, %l0, %l6 | |
1587 | stx %l6, [%l7 + 0x28] | |
1588 | ldd [%l7 + 0x28], %f18 | |
1589 | setx 0xDE339ED29062DC17, %l1, %l5 | |
1590 | stx %l5, [%l7 + 0x10] | |
1591 | ldd [%l7 + 0x10], %f14 | |
1592 | fdivd %f14, %f18, %f2 | |
1593 | movpos %xcc, 0x484, %o6 | |
1594 | tle %icc, 0x5 | |
1595 | faligndata %f24, %f6, %f12 | |
1596 | fmovrdlez %l5, %f8, %f26 | |
1597 | array32 %o0, %o3, %l2 | |
1598 | set 0x74, %o1 | |
1599 | ldsha [%l7 + %o1] 0x88, %o4 | |
1600 | fors %f8, %f4, %f11 | |
1601 | movule %fcc1, %l6, %o2 | |
1602 | fmovde %fcc3, %f30, %f6 | |
1603 | udiv %i4, 0x148C, %i2 | |
1604 | fcmpd %fcc2, %f18, %f30 | |
1605 | tleu %xcc, 0x5 | |
1606 | te %xcc, 0x6 | |
1607 | edge32n %l4, %l1, %l3 | |
1608 | umul %i0, 0x136C, %g4 | |
1609 | st %fsr, [%l7 + 0x48] | |
1610 | st %fsr, [%l7 + 0x48] | |
1611 | bne,pn %xcc, loop_44 | |
1612 | fornot1 %f22, %f10, %f10 | |
1613 | st %fsr, [%l7 + 0x0C] | |
1614 | rd %y, %i3 | |
1615 | loop_44: | |
1616 | xor %l0, 0x1E62, %o1 | |
1617 | fornot1s %f29, %f3, %f17 | |
1618 | udivcc %o7, 0x1882, %i7 | |
1619 | stx %fsr, [%l7 + 0x68] | |
1620 | movpos %xcc, 0x52D, %i6 | |
1621 | st %fsr, [%l7 + 0x58] | |
1622 | EXIT_GOOD | |
1623 | ||
1624 | ||
1625 | ||
1626 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
1627 | ! | |
1628 | ! Stats for Thread 3: | |
1629 | ! | |
1630 | ! Type l : 56 | |
1631 | ! Type a : 15 | |
1632 | ! Type x : 4 | |
1633 | ! Type cti : 9 | |
1634 | ! Type f : 59 | |
1635 | ! Type i : 57 | |
1636 | ! | |
1637 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
1638 | ||
1639 | ! | |
1640 | ! Thread 4 Start | |
1641 | ! | |
1642 | main_t4: | |
1643 | mov %l7, %g1 | |
1644 | !# Set %cwp for 8 windows | |
1645 | !# This threads memory space into each %l7 | |
1646 | wrpr %g0, 0x7, %cwp | |
1647 | mov %g1, %l7 | |
1648 | wrpr %g0, 0x6, %cwp | |
1649 | mov %g1, %l7 | |
1650 | wrpr %g0, 0x5, %cwp | |
1651 | mov %g1, %l7 | |
1652 | wrpr %g0, 0x4, %cwp | |
1653 | mov %g1, %l7 | |
1654 | wrpr %g0, 0x3, %cwp | |
1655 | mov %g1, %l7 | |
1656 | wrpr %g0, 0x2, %cwp | |
1657 | mov %g1, %l7 | |
1658 | wrpr %g0, 0x1, %cwp | |
1659 | mov %g1, %l7 | |
1660 | wrpr %g0, 0x0, %cwp | |
1661 | mov %g1, %l7 | |
1662 | ||
1663 | !# Set %fsr | |
1664 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
1665 | stx %l6, [%l7 + 0x0] !# no post process | |
1666 | ldx [%l7 + 0x0], %fsr !# no post process | |
1667 | ||
1668 | !# Initialize registers .. | |
1669 | ||
1670 | !# Global registers | |
1671 | set 0x2, %g1 | |
1672 | set 0xF, %g2 | |
1673 | set 0xE, %g3 | |
1674 | set 0x1, %g4 | |
1675 | set 0x5, %g5 | |
1676 | set 0x8, %g6 | |
1677 | set 0x6, %g7 | |
1678 | !# Input registers | |
1679 | set -0x8, %i0 | |
1680 | set -0x3, %i1 | |
1681 | set -0xD, %i2 | |
1682 | set -0x5, %i3 | |
1683 | set -0xE, %i4 | |
1684 | set -0x8, %i5 | |
1685 | set -0x3, %i6 | |
1686 | set -0xB, %i7 | |
1687 | !# Local registers | |
1688 | set 0x601417E0, %l0 | |
1689 | set 0x651D0D4D, %l1 | |
1690 | set 0x683B4593, %l2 | |
1691 | set 0x26CD6757, %l3 | |
1692 | set 0x540B50BC, %l4 | |
1693 | set 0x0BFEBCE5, %l5 | |
1694 | set 0x24EF1243, %l6 | |
1695 | !# Output registers | |
1696 | set -0x0746, %o0 | |
1697 | set -0x1C76, %o1 | |
1698 | set -0x0AD5, %o2 | |
1699 | set 0x1F9C, %o3 | |
1700 | set 0x18D6, %o4 | |
1701 | set -0x0279, %o5 | |
1702 | set 0x0DF0, %o6 | |
1703 | set 0x18E1, %o7 | |
1704 | !# Float registers | |
1705 | INIT_TH_FP_REG(%l7,%f0,0xCC8D0620E2DA3693) | |
1706 | INIT_TH_FP_REG(%l7,%f2,0xFA244F23DF29DB54) | |
1707 | INIT_TH_FP_REG(%l7,%f4,0xB3D57F1FD825C368) | |
1708 | INIT_TH_FP_REG(%l7,%f6,0xD424E498A853CE5F) | |
1709 | INIT_TH_FP_REG(%l7,%f8,0x977F0E2124D33F26) | |
1710 | INIT_TH_FP_REG(%l7,%f10,0xA0B27E8022DAD6F1) | |
1711 | INIT_TH_FP_REG(%l7,%f12,0x0E18BA3EE2FD2B03) | |
1712 | INIT_TH_FP_REG(%l7,%f14,0x82E2F7E67C833C90) | |
1713 | INIT_TH_FP_REG(%l7,%f16,0xB89D0594757DA2EA) | |
1714 | INIT_TH_FP_REG(%l7,%f18,0x13FED6033727FCD0) | |
1715 | INIT_TH_FP_REG(%l7,%f20,0x07AF4B2FEA0A7C57) | |
1716 | INIT_TH_FP_REG(%l7,%f22,0xF9469CA7B8499B25) | |
1717 | INIT_TH_FP_REG(%l7,%f24,0x44BC25C38BAFF430) | |
1718 | INIT_TH_FP_REG(%l7,%f26,0x93A19EEFE466340C) | |
1719 | INIT_TH_FP_REG(%l7,%f28,0xAAE03C1EEE40660C) | |
1720 | INIT_TH_FP_REG(%l7,%f30,0x355FB97FCC4E55E9) | |
1721 | ||
1722 | !# Execute Main Diag .. | |
1723 | ||
1724 | fmovsul %fcc3, %f20, %f27 | |
1725 | andncc %i1, %o5, %i5 | |
1726 | srl %g3, 0x0A, %g2 | |
1727 | fmovsule %fcc1, %f16, %f6 | |
1728 | st %fsr, [%l7 + 0x6C] | |
1729 | rd %asi, %g6 | |
1730 | st %fsr, [%l7 + 0x7C] | |
1731 | bshuffle %f28, %f20, %f14 | |
1732 | st %fsr, [%l7 + 0x6C] | |
1733 | st %fsr, [%l7 + 0x70] | |
1734 | fone %f6 | |
1735 | fbule,a,pt %fcc3, loop_45 | |
1736 | xnorcc %g5, %g7, %g1 | |
1737 | st %fsr, [%l7 + 0x50] | |
1738 | sdivcc %o6, 0x10A1, %l5 | |
1739 | loop_45: | |
1740 | fandnot2s %f8, %f6, %f5 | |
1741 | nop | |
1742 | fitos %f6, %f26 | |
1743 | fstoi %f26, %f21 | |
1744 | st %fsr, [%l7 + 0x34] | |
1745 | st %fsr, [%l7 + 0x28] | |
1746 | fmovdlg %fcc0, %f24, %f16 | |
1747 | fmovdule %fcc3, %f16, %f14 | |
1748 | st %fsr, [%l7 + 0x40] | |
1749 | set 0x40, %g2 | |
1750 | stda %f0, [%l7 + %g2] 0xc2 | |
1751 | nop | |
1752 | fitos %f12, %f30 | |
1753 | fmovdvs %xcc, %f26, %f28 | |
1754 | st %fsr, [%l7 + 0x1C] | |
1755 | fmovsle %fcc1, %f1, %f21 | |
1756 | membar 0x59 | |
1757 | fpackfix %f22, %f16 | |
1758 | movne %fcc0, %o3, %l2 | |
1759 | fmovsue %fcc0, %f31, %f24 | |
1760 | srlx %o0, 0x0A, %l6 | |
1761 | fnands %f4, %f13, %f1 | |
1762 | st %fsr, [%l7 + 0x20] | |
1763 | st %fsr, [%l7 + 0x2C] | |
1764 | fmovrslez %o2, %f13, %f30 | |
1765 | fmovdue %fcc0, %f28, %f0 | |
1766 | st %fsr, [%l7 + 0x40] | |
1767 | st %fsr, [%l7 + 0x40] | |
1768 | fcmpeq32 %f8, %f0, %o4 | |
1769 | nop | |
1770 | fitos %f6, %f3 | |
1771 | fstoi %f3, %f28 | |
1772 | st %fsr, [%l7 + 0x78] | |
1773 | fornot2 %f26, %f2, %f20 | |
1774 | fmovrdlz %i2, %f4, %f4 | |
1775 | fnot1 %f8, %f24 | |
1776 | rdpr %otherwin, %i4 | |
1777 | fzero %f18 | |
1778 | tvc %icc, 0x1 | |
1779 | for %f6, %f28, %f18 | |
1780 | st %fsr, [%l7 + 0x64] | |
1781 | st %fsr, [%l7 + 0x64] | |
1782 | bl,a,pt %icc, loop_46 | |
1783 | st %fsr, [%l7 + 0x38] | |
1784 | smulcc %l4, 0x1695, %l1 | |
1785 | wr %g0, 0xd2, %asi | |
1786 | ldda [%l7 + 0x40] %asi, %f16 | |
1787 | loop_46: | |
1788 | tgu %xcc, 0x4 | |
1789 | fmovdn %fcc1, %f24, %f30 | |
1790 | fxors %f29, %f8, %f2 | |
1791 | array8 %i0, %g4, %i3 | |
1792 | fpack16 %f24, %f11 | |
1793 | fsrc2 %f4, %f2 | |
1794 | fmovsu %fcc2, %f15, %f10 | |
1795 | nop | |
1796 | fitos %f1, %f30 | |
1797 | fstod %f30, %f28 | |
1798 | fornot1 %f2, %f28, %f28 | |
1799 | st %fsr, [%l7 + 0x40] | |
1800 | st %fsr, [%l7 + 0x78] | |
1801 | ||
1802 | or %g0, 0x8, %l0 | |
1803 | sllx %l0, 0x3c, %l0 | |
1804 | wrhpr %l0, 0x3FE, %hsys_tick_cmpr | |
1805 | andncc %o7, %i7, %i6 | |
1806 | st %fsr, [%l7 + 0x0C] | |
1807 | wrpr %g0, 0x2, %gl | |
1808 | fpsub16 %f20, %f16, %f14 | |
1809 | st %fsr, [%l7 + 0x74] | |
1810 | srl %i1, %i5, %o5 | |
1811 | st %fsr, [%l7 + 0x6C] | |
1812 | nop | |
1813 | set 0x40, %o6 | |
1814 | std %g2, [%l7 + %o6] | |
1815 | bgu %icc, loop_47 | |
1816 | fmovdge %xcc, %f24, %f24 | |
1817 | st %fsr, [%l7 + 0x28] | |
1818 | st %fsr, [%l7 + 0x28] | |
1819 | loop_47: | |
1820 | fnot2 %f2, %f16 | |
1821 | fnands %f12, %f28, %f2 | |
1822 | sethi 0x0A7D, %g6 | |
1823 | bshuffle %f18, %f20, %f8 | |
1824 | fabss %f13, %f13 | |
1825 | movleu %xcc, 0x4D4, %g5 | |
1826 | nop | |
1827 | fitod %f8, %f8 | |
1828 | fdtoi %f8, %f13 | |
1829 | tle %icc, 0x3 | |
1830 | st %fsr, [%l7 + 0x4C] | |
1831 | umulcc %g7, %g1, %o6 | |
1832 | rdhpr %hsys_tick_cmpr, %g2 | |
1833 | st %fsr, [%l7 + 0x0C] | |
1834 | st %fsr, [%l7 + 0x20] | |
1835 | st %fsr, [%l7 + 0x54] | |
1836 | fmovdu %fcc2, %f20, %f20 | |
1837 | movrne %l5, %l2, %o0 | |
1838 | fmovdlg %fcc0, %f28, %f4 | |
1839 | fmovsuge %fcc0, %f14, %f24 | |
1840 | nop | |
1841 | setx 0x205753CC, %l0, %l6 | |
1842 | st %l6, [%l7 + 0x28] | |
1843 | ld [%l7 + 0x28], %f17 | |
1844 | fsqrts %f17, %f7 | |
1845 | movl %xcc, 0x382, %l6 | |
1846 | edge8n %o3, %o4, %o2 | |
1847 | wr %g0, 0x2a, %asi | |
1848 | stda %i4, [%l7 + 0x28] %asi | |
1849 | membar #Sync | |
1850 | ||
1851 | or %g0, 0x8, %l0 | |
1852 | sllx %l0, 0x3c, %l0 | |
1853 | wrhpr %l0, 0xC35, %hsys_tick_cmpr | |
1854 | fcmple16 %f16, %f18, %l1 | |
1855 | st %fsr, [%l7 + 0x14] | |
1856 | nop | |
1857 | fitos %f2, %f8 | |
1858 | fstod %f8, %f2 | |
1859 | fzero %f24 | |
1860 | or %l4, 0x109C, %g4 | |
1861 | movrgez %i3, 0x072, %i0 | |
1862 | set 0x61, %l5 | |
1863 | ldsba [%l7 + %l5] 0x89, %l3 | |
1864 | movvc %xcc, %o7, %l0 | |
1865 | st %fsr, [%l7 + 0x20] | |
1866 | st %fsr, [%l7 + 0x08] | |
1867 | st %fsr, [%l7 + 0x34] | |
1868 | ta %icc, 0x4 | |
1869 | st %fsr, [%l7 + 0x5C] | |
1870 | fba,a %fcc0, loop_48 | |
1871 | st %fsr, [%l7 + 0x60] | |
1872 | tsubcctv %i7, 0x10A0, %o1 | |
1873 | movrne %i1, %i6, %i5 | |
1874 | loop_48: | |
1875 | fmovdcc %xcc, %f6, %f2 | |
1876 | rdpr %canrestore, %g3 | |
1877 | st %fsr, [%l7 + 0x10] | |
1878 | rd %pc, %g6 | |
1879 | st %fsr, [%l7 + 0x2C] | |
1880 | sra %g5, 0x01, %o5 | |
1881 | fcmple16 %f20, %f22, %g1 | |
1882 | st %fsr, [%l7 + 0x30] | |
1883 | st %fsr, [%l7 + 0x58] | |
1884 | nop | |
1885 | set 0x47, %o3 | |
1886 | ldub [%l7 + %o3], %o6 | |
1887 | bge %icc, loop_49 | |
1888 | fmovsg %icc, %f3, %f10 | |
1889 | andn %g2, 0x0C6B, %l5 | |
1890 | st %fsr, [%l7 + 0x28] | |
1891 | loop_49: | |
1892 | rd %ccr, %g7 | |
1893 | st %fsr, [%l7 + 0x34] | |
1894 | fmovrdlz %l2, %f20, %f0 | |
1895 | nop | |
1896 | setx loop_50, %l0, %l1 | |
1897 | jmpl %l1, %l6 | |
1898 | tsubcctv %o0, %o4, %o2 | |
1899 | st %fsr, [%l7 + 0x48] | |
1900 | st %fsr, [%l7 + 0x54] | |
1901 | loop_50: | |
1902 | st %fsr, [%l7 + 0x2C] | |
1903 | lduw [%l7 + 0x74], %o3 | |
1904 | st %fsr, [%l7 + 0x5C] | |
1905 | fmovdo %fcc2, %f30, %f30 | |
1906 | st %fsr, [%l7 + 0x2C] | |
1907 | orn %i4, 0x1CD3, %l1 | |
1908 | fsrc1 %f2, %f14 | |
1909 | st %fsr, [%l7 + 0x34] | |
1910 | fpack32 %f0, %f30, %f16 | |
1911 | st %fsr, [%l7 + 0x68] | |
1912 | st %fsr, [%l7 + 0x0C] | |
1913 | smul %i2, 0x1737, %l4 | |
1914 | movo %fcc2, 0x78D, %g4 | |
1915 | nop | |
1916 | fitos %f11, %f20 | |
1917 | fstox %f20, %f2 | |
1918 | st %fsr, [%l7 + 0x68] | |
1919 | andncc %i3, 0x12CB, %i0 | |
1920 | restored | |
1921 | rdpr %cwp, %g1 | |
1922 | rdpr %cansave, %g2 | |
1923 | rdpr %canrestore, %g3 | |
1924 | rdpr %cleanwin, %g4 | |
1925 | rdpr %otherwin, %g5 | |
1926 | rdpr %wstate, %g6 | |
1927 | brz,a,pt %l3, loop_51 | |
1928 | st %fsr, [%l7 + 0x68] | |
1929 | st %fsr, [%l7 + 0x6C] | |
1930 | st %fsr, [%l7 + 0x3C] | |
1931 | loop_51: | |
1932 | bgu,a,pt %xcc, loop_52 | |
1933 | fmovsgu %xcc, %f22, %f2 | |
1934 | st %fsr, [%l7 + 0x54] | |
1935 | nop | |
1936 | setx 0x6A19815C, %l0, %l6 | |
1937 | st %l6, [%l7 + 0x28] | |
1938 | ld [%l7 + 0x28], %f23 | |
1939 | fsqrts %f23, %f10 | |
1940 | loop_52: | |
1941 | fmul8sux16 %f24, %f18, %f12 | |
1942 | movle %fcc3, %o7, %i7 | |
1943 | fornot1s %f6, %f15, %f17 | |
1944 | fmovsvc %xcc, %f4, %f15 | |
1945 | sethi 0x178C, %o1 | |
1946 | rdhpr %hpstate, %i1 | |
1947 | fxors %f1, %f16, %f12 | |
1948 | edge32n %l0, %i6, %i5 | |
1949 | fmovsl %fcc3, %f21, %f24 | |
1950 | bleu,a,pt %xcc, loop_53 | |
1951 | tvs %icc, 0x7 | |
1952 | bn %xcc, loop_54 | |
1953 | fmovrdne %g3, %f26, %f26 | |
1954 | loop_53: | |
1955 | st %fsr, [%l7 + 0x54] | |
1956 | fcmped %fcc0, %f24, %f20 | |
1957 | loop_54: | |
1958 | fmovsvc %xcc, %f4, %f23 | |
1959 | wr %g0, 0xeb, %asi | |
1960 | stda %g4, [%l7 + 0x58] %asi | |
1961 | membar #Sync | |
1962 | and %g6, %o5, %g1 | |
1963 | fmovsvc %icc, %f6, %f5 | |
1964 | prefetch [%l7 + 0x34], 4 | |
1965 | ta %xcc, 0x0 | |
1966 | st %fsr, [%l7 + 0x30] | |
1967 | tcs %xcc, 0x2 | |
1968 | st %fsr, [%l7 + 0x0C] | |
1969 | fcmpes %fcc2, %f3, %f20 | |
1970 | st %fsr, [%l7 + 0x58] | |
1971 | fpadd16s %f8, %f5, %f20 | |
1972 | movleu %xcc, %o6, %g2 | |
1973 | st %fsr, [%l7 + 0x10] | |
1974 | st %fsr, [%l7 + 0x14] | |
1975 | EXIT_GOOD | |
1976 | ||
1977 | ||
1978 | ||
1979 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
1980 | ! | |
1981 | ! Stats for Thread 4: | |
1982 | ! | |
1983 | ! Type l : 68 | |
1984 | ! Type a : 10 | |
1985 | ! Type x : 5 | |
1986 | ! Type cti : 10 | |
1987 | ! Type f : 65 | |
1988 | ! Type i : 42 | |
1989 | ! | |
1990 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
1991 | ||
1992 | ! | |
1993 | ! Thread 5 Start | |
1994 | ! | |
1995 | main_t5: | |
1996 | mov %l7, %g1 | |
1997 | !# Set %cwp for 8 windows | |
1998 | !# This threads memory space into each %l7 | |
1999 | wrpr %g0, 0x7, %cwp | |
2000 | mov %g1, %l7 | |
2001 | wrpr %g0, 0x6, %cwp | |
2002 | mov %g1, %l7 | |
2003 | wrpr %g0, 0x5, %cwp | |
2004 | mov %g1, %l7 | |
2005 | wrpr %g0, 0x4, %cwp | |
2006 | mov %g1, %l7 | |
2007 | wrpr %g0, 0x3, %cwp | |
2008 | mov %g1, %l7 | |
2009 | wrpr %g0, 0x2, %cwp | |
2010 | mov %g1, %l7 | |
2011 | wrpr %g0, 0x1, %cwp | |
2012 | mov %g1, %l7 | |
2013 | wrpr %g0, 0x0, %cwp | |
2014 | mov %g1, %l7 | |
2015 | ||
2016 | !# Set %fsr | |
2017 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
2018 | stx %l6, [%l7 + 0x0] !# no post process | |
2019 | ldx [%l7 + 0x0], %fsr !# no post process | |
2020 | ||
2021 | !# Initialize registers .. | |
2022 | ||
2023 | !# Global registers | |
2024 | set 0xE, %g1 | |
2025 | set 0x2, %g2 | |
2026 | set 0x7, %g3 | |
2027 | set 0xD, %g4 | |
2028 | set 0x6, %g5 | |
2029 | set 0x8, %g6 | |
2030 | set 0x5, %g7 | |
2031 | !# Input registers | |
2032 | set -0x3, %i0 | |
2033 | set -0xC, %i1 | |
2034 | set -0xD, %i2 | |
2035 | set -0x1, %i3 | |
2036 | set -0xC, %i4 | |
2037 | set -0x3, %i5 | |
2038 | set -0x8, %i6 | |
2039 | set -0xD, %i7 | |
2040 | !# Local registers | |
2041 | set 0x6FD1168D, %l0 | |
2042 | set 0x5010DD63, %l1 | |
2043 | set 0x111C2379, %l2 | |
2044 | set 0x581CD540, %l3 | |
2045 | set 0x7F96D71E, %l4 | |
2046 | set 0x0A40B6F7, %l5 | |
2047 | set 0x1CD88ACB, %l6 | |
2048 | !# Output registers | |
2049 | set -0x12D0, %o0 | |
2050 | set -0x1F78, %o1 | |
2051 | set -0x117D, %o2 | |
2052 | set -0x171E, %o3 | |
2053 | set -0x10E2, %o4 | |
2054 | set 0x1E29, %o5 | |
2055 | set 0x0316, %o6 | |
2056 | set -0x156D, %o7 | |
2057 | !# Float registers | |
2058 | INIT_TH_FP_REG(%l7,%f0,0xCC8D0620E2DA3693) | |
2059 | INIT_TH_FP_REG(%l7,%f2,0xFA244F23DF29DB54) | |
2060 | INIT_TH_FP_REG(%l7,%f4,0xB3D57F1FD825C368) | |
2061 | INIT_TH_FP_REG(%l7,%f6,0xD424E498A853CE5F) | |
2062 | INIT_TH_FP_REG(%l7,%f8,0x977F0E2124D33F26) | |
2063 | INIT_TH_FP_REG(%l7,%f10,0xA0B27E8022DAD6F1) | |
2064 | INIT_TH_FP_REG(%l7,%f12,0x0E18BA3EE2FD2B03) | |
2065 | INIT_TH_FP_REG(%l7,%f14,0x82E2F7E67C833C90) | |
2066 | INIT_TH_FP_REG(%l7,%f16,0xB89D0594757DA2EA) | |
2067 | INIT_TH_FP_REG(%l7,%f18,0x13FED6033727FCD0) | |
2068 | INIT_TH_FP_REG(%l7,%f20,0x07AF4B2FEA0A7C57) | |
2069 | INIT_TH_FP_REG(%l7,%f22,0xF9469CA7B8499B25) | |
2070 | INIT_TH_FP_REG(%l7,%f24,0x44BC25C38BAFF430) | |
2071 | INIT_TH_FP_REG(%l7,%f26,0x93A19EEFE466340C) | |
2072 | INIT_TH_FP_REG(%l7,%f28,0xAAE03C1EEE40660C) | |
2073 | INIT_TH_FP_REG(%l7,%f30,0x355FB97FCC4E55E9) | |
2074 | ||
2075 | !# Execute Main Diag .. | |
2076 | ||
2077 | rd %y, %l5 | |
2078 | pdist %f24, %f16, %f0 | |
2079 | subcc %l2, %g7, %l6 | |
2080 | edge16n %o0, %o2, %o3 | |
2081 | nop | |
2082 | fitod %f18, %f16 | |
2083 | st %fsr, [%l7 + 0x7C] | |
2084 | fmovsule %fcc3, %f22, %f17 | |
2085 | fmul8ulx16 %f8, %f20, %f8 | |
2086 | saved | |
2087 | rdpr %cwp, %g1 | |
2088 | rdpr %cansave, %g2 | |
2089 | rdpr %canrestore, %g3 | |
2090 | rdpr %cleanwin, %g4 | |
2091 | rdpr %otherwin, %g5 | |
2092 | rdpr %wstate, %g6 | |
2093 | st %fsr, [%l7 + 0x58] | |
2094 | st %fsr, [%l7 + 0x60] | |
2095 | st %fsr, [%l7 + 0x30] | |
2096 | st %fsr, [%l7 + 0x6C] | |
2097 | nop | |
2098 | fitod %f2, %f6 | |
2099 | fdtox %f6, %f14 | |
2100 | sub %o4, 0x0F01, %i4 | |
2101 | umul %i2, 0x0755, %l1 | |
2102 | st %fsr, [%l7 + 0x44] | |
2103 | movre %g4, %l4, %i3 | |
2104 | bcc %xcc, loop_55 | |
2105 | st %fsr, [%l7 + 0x64] | |
2106 | st %fsr, [%l7 + 0x78] | |
2107 | movre %l3, 0x17E, %i0 | |
2108 | loop_55: | |
2109 | st %fsr, [%l7 + 0x7C] | |
2110 | array32 %o7, %i7, %i1 | |
2111 | array32 %o1, %i6, %i5 | |
2112 | st %fsr, [%l7 + 0x20] | |
2113 | fpack16 %f24, %f26 | |
2114 | fble %fcc0, loop_56 | |
2115 | st %fsr, [%l7 + 0x20] | |
2116 | fnot2s %f25, %f28 | |
2117 | fxors %f4, %f28, %f20 | |
2118 | loop_56: | |
2119 | fmovsuge %fcc0, %f1, %f29 | |
2120 | st %fsr, [%l7 + 0x1C] | |
2121 | movre %l0, 0x3E0, %g3 | |
2122 | fmovdpos %icc, %f28, %f30 | |
2123 | fnors %f8, %f24, %f24 | |
2124 | st %fsr, [%l7 + 0x20] | |
2125 | sth %g6, [%l7 + 0x16] | |
2126 | edge16 %o5, %g1, %o6 | |
2127 | fmovsvc %icc, %f25, %f8 | |
2128 | membar 0x09 | |
2129 | edge8 %g2, %l5, %l2 | |
2130 | fmovsne %xcc, %f14, %f29 | |
2131 | orn %g5, %g7, %l6 | |
2132 | mulscc %o0, 0x0E18, %o3 | |
2133 | fcmple32 %f22, %f22, %o4 | |
2134 | fbue %fcc3, loop_57 | |
2135 | st %fsr, [%l7 + 0x70] | |
2136 | ||
2137 | or %g0, 0x8, %l0 | |
2138 | sllx %l0, 0x3c, %l0 | |
2139 | wr %l0, %g0, %tick_cmpr | |
2140 | nop | |
2141 | setx 0x668DA4375D8E9520, %l0, %l6 | |
2142 | stx %l6, [%l7 + 0x28] | |
2143 | ldd [%l7 + 0x28], %f4 | |
2144 | setx 0xA66F82BA3E3FCC86, %l1, %l5 | |
2145 | stx %l5, [%l7 + 0x10] | |
2146 | ldd [%l7 + 0x10], %f30 | |
2147 | faddd %f30, %f4, %f16 | |
2148 | loop_57: | |
2149 | add %i2, %g4, %l4 | |
2150 | st %fsr, [%l7 + 0x48] | |
2151 | alignaddr %i3, %l1, %l3 | |
2152 | st %fsr, [%l7 + 0x2C] | |
2153 | wr %g0, 0x0c, %asi | |
2154 | lduwa [%l7 + 0x18] %asi, %i0 | |
2155 | bgu,pn %icc, loop_58 | |
2156 | st %fsr, [%l7 + 0x34] | |
2157 | nop | |
2158 | setx 0xC9FE439E, %l0, %l6 | |
2159 | st %l6, [%l7 + 0x28] | |
2160 | ld [%l7 + 0x28], %f18 | |
2161 | fsqrts %f18, %f9 | |
2162 | fpackfix %f4, %f31 | |
2163 | loop_58: | |
2164 | fmovscc %xcc, %f6, %f31 | |
2165 | fone %f0 | |
2166 | st %fsr, [%l7 + 0x28] | |
2167 | fmovdcc %icc, %f28, %f0 | |
2168 | movug %fcc0, %o7, %i1 | |
2169 | ldub [%l7 + 0x41], %i7 | |
2170 | alignaddrl %i6, %i5, %l0 | |
2171 | addcc %g3, %o1, %g6 | |
2172 | srlx %o5, %o6, %g2 | |
2173 | wr %g0, 0x10, %asi | |
2174 | prefetcha [%l7 + 0x18] %asi, 0 | |
2175 | st %fsr, [%l7 + 0x40] | |
2176 | fzero %f8 | |
2177 | tl %xcc, 0x4 | |
2178 | st %fsr, [%l7 + 0x18] | |
2179 | st %fsr, [%l7 + 0x50] | |
2180 | st %fsr, [%l7 + 0x38] | |
2181 | nop | |
2182 | set 0x4C, %g1 | |
2183 | stw %l2, [%l7 + %g1] | |
2184 | nop | |
2185 | setx 0x17A6, %l0, %g7 | |
2186 | sdivcc %g1, %g7, %l6 | |
2187 | ta %xcc, 0x6 | |
2188 | st %fsr, [%l7 + 0x2C] | |
2189 | st %fsr, [%l7 + 0x0C] | |
2190 | st %fsr, [%l7 + 0x5C] | |
2191 | st %fsr, [%l7 + 0x20] | |
2192 | rdhpr %hpstate, %o0 | |
2193 | rd %sys_tick_cmpr, %g5 | |
2194 | fmovduge %fcc0, %f16, %f6 | |
2195 | xnorcc %o4, 0x0C0F, %o3 | |
2196 | bgu %icc, loop_59 | |
2197 | fbge,a %fcc3, loop_60 | |
2198 | st %fsr, [%l7 + 0x40] | |
2199 | bmask %o2, %i4, %i2 | |
2200 | loop_59: | |
2201 | st %fsr, [%l7 + 0x40] | |
2202 | loop_60: | |
2203 | sethi 0x1F0E, %g4 | |
2204 | fandnot1s %f17, %f2, %f9 | |
2205 | wrpr %g0, 0x2, %gl | |
2206 | fmovrse %l1, %f31, %f7 | |
2207 | st %fsr, [%l7 + 0x68] | |
2208 | ld [%l7 + 0x40], %f25 | |
2209 | fmovscc %xcc, %f29, %f30 | |
2210 | andn %l4, %i0, %l3 | |
2211 | movle %fcc0, 0x557, %i1 | |
2212 | fbe,pn %fcc3, loop_61 | |
2213 | fnands %f30, %f18, %f18 | |
2214 | fmovsleu %icc, %f19, %f8 | |
2215 | andcc %i7, %i6, %o7 | |
2216 | loop_61: | |
2217 | movrgz %i5, 0x309, %g3 | |
2218 | sllx %o1, %g6, %l0 | |
2219 | wr %g0, 0x52, %asi | |
2220 | ldxa [%g0 + 0x220] %asi, %o5 | |
2221 | movrne %g2, %l5, %o6 | |
2222 | fone %f26 | |
2223 | fpack16 %f16, %f0 | |
2224 | movue %fcc2, %l2, %g1 | |
2225 | fpadd32 %f28, %f26, %f30 | |
2226 | st %fsr, [%l7 + 0x68] | |
2227 | membar 0x79 | |
2228 | st %fsr, [%l7 + 0x70] | |
2229 | fmovdu %fcc3, %f4, %f18 | |
2230 | fmovrdgez %g7, %f22, %f22 | |
2231 | st %fsr, [%l7 + 0x78] | |
2232 | st %fsr, [%l7 + 0x54] | |
2233 | rdhpr %ver, %l6 | |
2234 | st %fsr, [%l7 + 0x34] | |
2235 | fnegs %f6, %f10 | |
2236 | st %fsr, [%l7 + 0x6C] | |
2237 | fbul %fcc2, loop_62 | |
2238 | edge32l %g5, %o4, %o3 | |
2239 | prefetch [%l7 + 0x30], 1 | |
2240 | st %fsr, [%l7 + 0x4C] | |
2241 | loop_62: | |
2242 | rdhpr %hintp, %o0 | |
2243 | fmovdgu %xcc, %f28, %f28 | |
2244 | nop | |
2245 | fitod %f6, %f20 | |
2246 | fdtoi %f20, %f1 | |
2247 | tleu %icc, 0x2 | |
2248 | st %fsr, [%l7 + 0x08] | |
2249 | st %fsr, [%l7 + 0x18] | |
2250 | fbuge %fcc1, loop_63 | |
2251 | fzero %f18 | |
2252 | movne %xcc, 0x349, %i4 | |
2253 | taddcctv %o2, 0x1D57, %i2 | |
2254 | loop_63: | |
2255 | fsrc1s %f3, %f15 | |
2256 | ld [%l7 + 0x5C], %f19 | |
2257 | st %fsr, [%l7 + 0x24] | |
2258 | edge8l %g4, %l1, %l4 | |
2259 | wr %i3, 0x1225, %ccr | |
2260 | st %fsr, [%l7 + 0x74] | |
2261 | lduw [%l7 + 0x14], %i0 | |
2262 | st %fsr, [%l7 + 0x14] | |
2263 | movpos %icc, 0x22C, %i1 | |
2264 | array32 %l3, %i7, %o7 | |
2265 | st %fsr, [%l7 + 0x2C] | |
2266 | st %fsr, [%l7 + 0x48] | |
2267 | ||
2268 | or %g0, 0x8, %l0 | |
2269 | sllx %l0, 0x3c, %l0 | |
2270 | wrhpr %l0, 0x4D0, %hsys_tick_cmpr | |
2271 | or %i5, %g6, %l0 | |
2272 | nop | |
2273 | fitod %f2, %f6 | |
2274 | fdtox %f6, %f0 | |
2275 | fxtod %f0, %f6 | |
2276 | st %fsr, [%l7 + 0x48] | |
2277 | fmovspos %xcc, %f30, %f28 | |
2278 | nop | |
2279 | fitos %f12, %f21 | |
2280 | fstox %f21, %f10 | |
2281 | fxtos %f10, %f2 | |
2282 | st %fsr, [%l7 + 0x64] | |
2283 | st %fsr, [%l7 + 0x78] | |
2284 | nop | |
2285 | setx 0x7ACC8DB8, %l0, %l6 | |
2286 | st %l6, [%l7 + 0x28] | |
2287 | ld [%l7 + 0x28], %f28 | |
2288 | setx 0x37C4EF7D, %l1, %l5 | |
2289 | st %l5, [%l7 + 0x10] | |
2290 | ld [%l7 + 0x10], %f23 | |
2291 | fmuls %f23, %f28, %f3 | |
2292 | fandnot1s %f22, %f20, %f27 | |
2293 | fbul,a %fcc1, loop_64 | |
2294 | popc 0x06ED, %o5 | |
2295 | st %fsr, [%l7 + 0x20] | |
2296 | st %fsr, [%l7 + 0x58] | |
2297 | loop_64: | |
2298 | st %f17, [%l7 + 0x14] | |
2299 | nop | |
2300 | set 0x1C, %o4 | |
2301 | ldsw [%l7 + %o4], %o1 | |
2302 | tvs %icc, 0x4 | |
2303 | fmovsvc %icc, %f9, %f23 | |
2304 | wrpr %g2, %o6, %cwp | |
2305 | rd %tick_cmpr, %l2 | |
2306 | wr %g0, 0x5, %fprs | |
2307 | udivcc %g1, 0x1F05, %g7 | |
2308 | fandnot1s %f30, %f17, %f13 | |
2309 | fcmpd %fcc3, %f24, %f28 | |
2310 | st %fsr, [%l7 + 0x48] | |
2311 | movrgz %g5, 0x316, %o4 | |
2312 | wrpr %g0, 0x0, %gl | |
2313 | edge32l %i4, %o2, %o0 | |
2314 | movule %fcc1, 0x564, %i2 | |
2315 | set 0x24, %g7 | |
2316 | ldsba [%l7 + %g7] 0x0c, %g4 | |
2317 | fmovdo %fcc2, %f30, %f14 | |
2318 | fbn,pt %fcc2, loop_65 | |
2319 | movrgz %l1, %i3, %l4 | |
2320 | st %fsr, [%l7 + 0x78] | |
2321 | nop | |
2322 | fitod %f8, %f10 | |
2323 | fdtos %f10, %f26 | |
2324 | loop_65: | |
2325 | fmovdgu %icc, %f18, %f24 | |
2326 | st %fsr, [%l7 + 0x68] | |
2327 | tleu %xcc, 0x2 | |
2328 | fnot1 %f26, %f30 | |
2329 | st %fsr, [%l7 + 0x4C] | |
2330 | rdhpr %hintp, %i1 | |
2331 | ||
2332 | or %g0, 0x8, %l0 | |
2333 | sllx %l0, 0x3c, %l0 | |
2334 | wr %l0, 0x3D1, %sys_tick_cmpr | |
2335 | st %fsr, [%l7 + 0x40] | |
2336 | fmovdue %fcc2, %f10, %f0 | |
2337 | fand %f30, %f30, %f4 | |
2338 | st %fsr, [%l7 + 0x38] | |
2339 | wr %o7, %i7, %sys_tick | |
2340 | EXIT_GOOD | |
2341 | ||
2342 | ||
2343 | ||
2344 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
2345 | ! | |
2346 | ! Stats for Thread 5: | |
2347 | ! | |
2348 | ! Type l : 67 | |
2349 | ! Type a : 16 | |
2350 | ! Type x : 4 | |
2351 | ! Type cti : 11 | |
2352 | ! Type f : 51 | |
2353 | ! Type i : 51 | |
2354 | ! | |
2355 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
2356 | ||
2357 | ! | |
2358 | ! Thread 6 Start | |
2359 | ! | |
2360 | main_t6: | |
2361 | mov %l7, %g1 | |
2362 | !# Set %cwp for 8 windows | |
2363 | !# This threads memory space into each %l7 | |
2364 | wrpr %g0, 0x7, %cwp | |
2365 | mov %g1, %l7 | |
2366 | wrpr %g0, 0x6, %cwp | |
2367 | mov %g1, %l7 | |
2368 | wrpr %g0, 0x5, %cwp | |
2369 | mov %g1, %l7 | |
2370 | wrpr %g0, 0x4, %cwp | |
2371 | mov %g1, %l7 | |
2372 | wrpr %g0, 0x3, %cwp | |
2373 | mov %g1, %l7 | |
2374 | wrpr %g0, 0x2, %cwp | |
2375 | mov %g1, %l7 | |
2376 | wrpr %g0, 0x1, %cwp | |
2377 | mov %g1, %l7 | |
2378 | wrpr %g0, 0x0, %cwp | |
2379 | mov %g1, %l7 | |
2380 | ||
2381 | !# Set %fsr | |
2382 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
2383 | stx %l6, [%l7 + 0x0] !# no post process | |
2384 | ldx [%l7 + 0x0], %fsr !# no post process | |
2385 | ||
2386 | !# Initialize registers .. | |
2387 | ||
2388 | !# Global registers | |
2389 | set 0x3, %g1 | |
2390 | set 0xE, %g2 | |
2391 | set 0xC, %g3 | |
2392 | set 0x2, %g4 | |
2393 | set 0x5, %g5 | |
2394 | set 0x2, %g6 | |
2395 | set 0xB, %g7 | |
2396 | !# Input registers | |
2397 | set -0xF, %i0 | |
2398 | set -0x1, %i1 | |
2399 | set -0x9, %i2 | |
2400 | set -0xC, %i3 | |
2401 | set -0x7, %i4 | |
2402 | set -0x5, %i5 | |
2403 | set -0x2, %i6 | |
2404 | set -0x0, %i7 | |
2405 | !# Local registers | |
2406 | set 0x2112852E, %l0 | |
2407 | set 0x752E1CAF, %l1 | |
2408 | set 0x238EE386, %l2 | |
2409 | set 0x48907B13, %l3 | |
2410 | set 0x4D5A19D7, %l4 | |
2411 | set 0x759655FF, %l5 | |
2412 | set 0x4A9B080A, %l6 | |
2413 | !# Output registers | |
2414 | set -0x19A0, %o0 | |
2415 | set 0x0042, %o1 | |
2416 | set 0x0A12, %o2 | |
2417 | set -0x12C9, %o3 | |
2418 | set 0x06FF, %o4 | |
2419 | set -0x19AA, %o5 | |
2420 | set 0x0D5B, %o6 | |
2421 | set -0x11BB, %o7 | |
2422 | !# Float registers | |
2423 | INIT_TH_FP_REG(%l7,%f0,0xCC8D0620E2DA3693) | |
2424 | INIT_TH_FP_REG(%l7,%f2,0xFA244F23DF29DB54) | |
2425 | INIT_TH_FP_REG(%l7,%f4,0xB3D57F1FD825C368) | |
2426 | INIT_TH_FP_REG(%l7,%f6,0xD424E498A853CE5F) | |
2427 | INIT_TH_FP_REG(%l7,%f8,0x977F0E2124D33F26) | |
2428 | INIT_TH_FP_REG(%l7,%f10,0xA0B27E8022DAD6F1) | |
2429 | INIT_TH_FP_REG(%l7,%f12,0x0E18BA3EE2FD2B03) | |
2430 | INIT_TH_FP_REG(%l7,%f14,0x82E2F7E67C833C90) | |
2431 | INIT_TH_FP_REG(%l7,%f16,0xB89D0594757DA2EA) | |
2432 | INIT_TH_FP_REG(%l7,%f18,0x13FED6033727FCD0) | |
2433 | INIT_TH_FP_REG(%l7,%f20,0x07AF4B2FEA0A7C57) | |
2434 | INIT_TH_FP_REG(%l7,%f22,0xF9469CA7B8499B25) | |
2435 | INIT_TH_FP_REG(%l7,%f24,0x44BC25C38BAFF430) | |
2436 | INIT_TH_FP_REG(%l7,%f26,0x93A19EEFE466340C) | |
2437 | INIT_TH_FP_REG(%l7,%f28,0xAAE03C1EEE40660C) | |
2438 | INIT_TH_FP_REG(%l7,%f30,0x355FB97FCC4E55E9) | |
2439 | ||
2440 | !# Execute Main Diag .. | |
2441 | ||
2442 | fmul8ulx16 %f0, %f22, %f12 | |
2443 | movleu %xcc, %i6, %i5 | |
2444 | fzeros %f30 | |
2445 | st %fsr, [%l7 + 0x5C] | |
2446 | st %fsr, [%l7 + 0x0C] | |
2447 | brgez,a,pn %g6, loop_66 | |
2448 | rdpr %gl, %g3 | |
2449 | fmovsule %fcc0, %f15, %f7 | |
2450 | edge16n %o5, %l0, %g2 | |
2451 | loop_66: | |
2452 | st %fsr, [%l7 + 0x70] | |
2453 | sra %o6, 0x03, %l2 | |
2454 | st %fsr, [%l7 + 0x74] | |
2455 | movvs %xcc, %o1, %g1 | |
2456 | fmovsvc %xcc, %f15, %f17 | |
2457 | st %fsr, [%l7 + 0x54] | |
2458 | nop | |
2459 | fitod %f14, %f30 | |
2460 | st %fsr, [%l7 + 0x5C] | |
2461 | movuge %fcc1, %g7, %g5 | |
2462 | array32 %o4, %l5, %l6 | |
2463 | movge %xcc, 0x59F, %o3 | |
2464 | st %fsr, [%l7 + 0x08] | |
2465 | wrpr %i4, 0x1769, %pil | |
2466 | ldsb [%l7 + 0x5D], %o2 | |
2467 | fmovslg %fcc1, %f11, %f30 | |
2468 | st %fsr, [%l7 + 0x74] | |
2469 | fmovdvc %xcc, %f2, %f10 | |
2470 | bshuffle %f22, %f18, %f18 | |
2471 | rd %fprs, %i2 | |
2472 | fmovdle %icc, %f30, %f0 | |
2473 | st %fsr, [%l7 + 0x78] | |
2474 | fbue,a %fcc1, loop_67 | |
2475 | st %fsr, [%l7 + 0x20] | |
2476 | rdhpr %hintp, %o0 | |
2477 | st %fsr, [%l7 + 0x3C] | |
2478 | loop_67: | |
2479 | st %fsr, [%l7 + 0x20] | |
2480 | st %fsr, [%l7 + 0x08] | |
2481 | fandnot1 %f28, %f24, %f10 | |
2482 | smul %l1, 0x0579, %g4 | |
2483 | st %fsr, [%l7 + 0x64] | |
2484 | wrpr %g0, 0x2, %gl | |
2485 | fnands %f18, %f30, %f28 | |
2486 | st %fsr, [%l7 + 0x7C] | |
2487 | faligndata %f6, %f0, %f26 | |
2488 | set 0x54, %i3 | |
2489 | lduwa [%l7 + %i3] 0x19, %l3 | |
2490 | fnot1 %f8, %f14 | |
2491 | st %fsr, [%l7 + 0x40] | |
2492 | alignaddrl %i1, %i0, %o7 | |
2493 | edge16n %i6, %i5, %g6 | |
2494 | rd %sys_tick_cmpr, %g3 | |
2495 | fbge,a %fcc3, loop_68 | |
2496 | movrne %o5, %l0, %g2 | |
2497 | edge32n %i7, %o6, %o1 | |
2498 | nop | |
2499 | set 0x60, %i4 | |
2500 | stx %fsr, [%l7 + %i4] | |
2501 | loop_68: | |
2502 | andncc %l2, 0x1008, %g1 | |
2503 | bcc,pt %xcc, loop_69 | |
2504 | lduh [%l7 + 0x54], %g5 | |
2505 | st %fsr, [%l7 + 0x3C] | |
2506 | tsubcc %o4, %l5, %g7 | |
2507 | loop_69: | |
2508 | mova %xcc, 0x39A, %o3 | |
2509 | nop | |
2510 | setx 0x7820D755, %l0, %l6 | |
2511 | st %l6, [%l7 + 0x28] | |
2512 | ld [%l7 + 0x28], %f21 | |
2513 | setx 0x5E3E6C2D, %l1, %l5 | |
2514 | st %l5, [%l7 + 0x10] | |
2515 | ld [%l7 + 0x10], %f29 | |
2516 | fdivs %f29, %f21, %f25 | |
2517 | movg %fcc0, %i4, %l6 | |
2518 | fmovdcs %icc, %f18, %f18 | |
2519 | fmuld8ulx16 %f28, %f5, %f6 | |
2520 | tneg %icc, 0x5 | |
2521 | fpmerge %f18, %f13, %f8 | |
2522 | rd %y, %o2 | |
2523 | sllx %o0, 0x15, %i2 | |
2524 | fmovsvs %xcc, %f14, %f0 | |
2525 | stbar | |
2526 | fornot2 %f24, %f30, %f28 | |
2527 | fcmpd %fcc3, %f2, %f12 | |
2528 | mulscc %l1, %i3, %g4 | |
2529 | nop | |
2530 | fitos %f9, %f28 | |
2531 | fstox %f28, %f8 | |
2532 | restored | |
2533 | rdpr %cwp, %g1 | |
2534 | rdpr %cansave, %g2 | |
2535 | rdpr %canrestore, %g3 | |
2536 | rdpr %cleanwin, %g4 | |
2537 | rdpr %otherwin, %g5 | |
2538 | rdpr %wstate, %g6 | |
2539 | edge16l %l3, %i1, %l4 | |
2540 | st %fsr, [%l7 + 0x08] | |
2541 | fmovdle %icc, %f10, %f0 | |
2542 | fand %f30, %f28, %f22 | |
2543 | nop | |
2544 | fitod %f2, %f8 | |
2545 | fdtos %f8, %f9 | |
2546 | edge8n %o7, %i0, %i5 | |
2547 | xnor %g6, 0x0DB6, %g3 | |
2548 | alignaddr %o5, %l0, %g2 | |
2549 | fmovrdlez %i7, %f2, %f26 | |
2550 | umul %i6, 0x10B2, %o6 | |
2551 | ||
2552 | or %g0, 0x8, %l0 | |
2553 | sllx %l0, 0x3c, %l0 | |
2554 | wrhpr %l0, %g0, %hsys_tick_cmpr | |
2555 | st %fsr, [%l7 + 0x14] | |
2556 | bvs %xcc, loop_70 | |
2557 | fmovsug %fcc3, %f31, %f4 | |
2558 | fandnot2s %f3, %f19, %f13 | |
2559 | st %fsr, [%l7 + 0x7C] | |
2560 | loop_70: | |
2561 | srax %g1, 0x13, %g5 | |
2562 | rd %fprs, %l2 | |
2563 | nop | |
2564 | set 0x3C, %g5 | |
2565 | stw %l5, [%l7 + %g5] | |
2566 | add %o4, 0x1C30, %o3 | |
2567 | nop | |
2568 | fitod %f0, %f18 | |
2569 | fdtos %f18, %f15 | |
2570 | taddcctv %i4, %l6, %g7 | |
2571 | edge8ln %o2, %o0, %l1 | |
2572 | st %fsr, [%l7 + 0x3C] | |
2573 | fbu %fcc2, loop_71 | |
2574 | fbn %fcc1, loop_72 | |
2575 | st %fsr, [%l7 + 0x10] | |
2576 | st %fsr, [%l7 + 0x0C] | |
2577 | loop_71: | |
2578 | rdhpr %hpstate, %i3 | |
2579 | loop_72: | |
2580 | nop | |
2581 | set 0x7C, %o2 | |
2582 | lduw [%l7 + %o2], %i2 | |
2583 | nop | |
2584 | set 0x50, %l2 | |
2585 | ldd [%l7 + %l2], %f18 | |
2586 | addc %l3, %g4, %i1 | |
2587 | st %fsr, [%l7 + 0x18] | |
2588 | st %fsr, [%l7 + 0x28] | |
2589 | taddcctv %o7, 0x06FB, %l4 | |
2590 | ble,a %icc, loop_73 | |
2591 | brz %i0, loop_74 | |
2592 | nop | |
2593 | setx 0xFAD4CA632B8C5474, %l0, %l6 | |
2594 | stx %l6, [%l7 + 0x28] | |
2595 | ldd [%l7 + 0x28], %f6 | |
2596 | setx 0xE1178B6AB0186909, %l1, %l5 | |
2597 | stx %l5, [%l7 + 0x10] | |
2598 | ldd [%l7 + 0x10], %f8 | |
2599 | faddd %f8, %f6, %f16 | |
2600 | te %icc, 0x4 | |
2601 | loop_73: | |
2602 | nop | |
2603 | setx 0x17ED, %l0, %g3 | |
2604 | udivx %i5, %g3, %g6 | |
2605 | loop_74: | |
2606 | std %f30, [%l7 + 0x30] | |
2607 | nop | |
2608 | setx 0x7A0A557B, %l0, %l6 | |
2609 | st %l6, [%l7 + 0x28] | |
2610 | ld [%l7 + 0x28], %f2 | |
2611 | setx 0x568564A7, %l1, %l5 | |
2612 | st %l5, [%l7 + 0x10] | |
2613 | ld [%l7 + 0x10], %f27 | |
2614 | fadds %f27, %f2, %f6 | |
2615 | fmul8x16au %f20, %f1, %f24 | |
2616 | fmovsneg %icc, %f31, %f18 | |
2617 | nop | |
2618 | setx 0x0898, %l1, %l0 | |
2619 | udiv %o5, %l0, %g2 | |
2620 | fexpand %f30, %f12 | |
2621 | fpadd16s %f7, %f22, %f13 | |
2622 | st %fsr, [%l7 + 0x54] | |
2623 | fcmpne32 %f20, %f4, %i6 | |
2624 | st %fsr, [%l7 + 0x7C] | |
2625 | st %fsr, [%l7 + 0x1C] | |
2626 | fmovrdgz %o6, %f20, %f14 | |
2627 | st %fsr, [%l7 + 0x38] | |
2628 | st %fsr, [%l7 + 0x34] | |
2629 | taddcc %i7, 0x10C8, %g1 | |
2630 | st %fsr, [%l7 + 0x24] | |
2631 | rdpr %gl, %o1 | |
2632 | fpsub32 %f22, %f0, %f8 | |
2633 | st %fsr, [%l7 + 0x58] | |
2634 | st %fsr, [%l7 + 0x78] | |
2635 | fmovdl %fcc3, %f2, %f22 | |
2636 | st %fsr, [%l7 + 0x10] | |
2637 | fmovdge %fcc3, %f8, %f16 | |
2638 | st %fsr, [%l7 + 0x1C] | |
2639 | st %fsr, [%l7 + 0x10] | |
2640 | edge16 %l2, %l5, %g5 | |
2641 | movul %fcc1, %o3, %o4 | |
2642 | movrlz %l6, %g7, %i4 | |
2643 | fcmpd %fcc1, %f18, %f14 | |
2644 | nop | |
2645 | setx loop_75, %l0, %l1 | |
2646 | jmpl %l1, %o0 | |
2647 | fors %f26, %f26, %f19 | |
2648 | fmovscc %xcc, %f18, %f11 | |
2649 | movneg %xcc, %l1, %o2 | |
2650 | loop_75: | |
2651 | umul %i3, %i2, %g4 | |
2652 | st %fsr, [%l7 + 0x08] | |
2653 | fand %f10, %f14, %f12 | |
2654 | fbe,a %fcc2, loop_76 | |
2655 | fmovdule %fcc0, %f20, %f28 | |
2656 | nop | |
2657 | setx 0x99586FC0, %l0, %l6 | |
2658 | st %l6, [%l7 + 0x28] | |
2659 | ld [%l7 + 0x28], %f8 | |
2660 | setx 0x8C8638FD, %l1, %l5 | |
2661 | st %l5, [%l7 + 0x10] | |
2662 | ld [%l7 + 0x10], %f3 | |
2663 | fdivs %f3, %f8, %f2 | |
2664 | st %fsr, [%l7 + 0x40] | |
2665 | loop_76: | |
2666 | nop | |
2667 | set 0x48, %i2 | |
2668 | sth %l3, [%l7 + %i2] | |
2669 | fbo,a %fcc3, loop_77 | |
2670 | st %fsr, [%l7 + 0x54] | |
2671 | movle %fcc3, %o7, %i1 | |
2672 | fmovsuge %fcc2, %f17, %f8 | |
2673 | loop_77: | |
2674 | fpsub32 %f0, %f8, %f30 | |
2675 | ble,a %icc, loop_78 | |
2676 | edge8 %i0, %i5, %l4 | |
2677 | st %fsr, [%l7 + 0x48] | |
2678 | fones %f17 | |
2679 | loop_78: | |
2680 | movl %icc, 0x07E, %g6 | |
2681 | nop | |
2682 | setx 0x5144C81C, %l0, %l6 | |
2683 | st %l6, [%l7 + 0x28] | |
2684 | ld [%l7 + 0x28], %f19 | |
2685 | setx 0x73D10D47, %l1, %l5 | |
2686 | st %l5, [%l7 + 0x10] | |
2687 | ld [%l7 + 0x10], %f7 | |
2688 | fadds %f7, %f19, %f31 | |
2689 | st %fsr, [%l7 + 0x40] | |
2690 | andncc %g3, 0x00E1, %o5 | |
2691 | fmovrdne %l0, %f10, %f10 | |
2692 | st %fsr, [%l7 + 0x1C] | |
2693 | tsubcc %g2, %i6, %i7 | |
2694 | nop | |
2695 | fitos %f20, %f3 | |
2696 | fmovde %fcc3, %f12, %f24 | |
2697 | fmovsuge %fcc1, %f2, %f9 | |
2698 | andn %g1, %o1, %o6 | |
2699 | addc %l2, 0x1265, %l5 | |
2700 | st %fsr, [%l7 + 0x7C] | |
2701 | subccc %o3, %g5, %l6 | |
2702 | nop | |
2703 | setx loop_79, %l0, %l1 | |
2704 | wrpr 0x1, %tl | |
2705 | wrpr %l1, %tpc | |
2706 | add %l1, 0x4, %l1 | |
2707 | wrpr %l1, %tnpc | |
2708 | setx 0x034400001402, %l0, %l1 | |
2709 | wrpr %l1, %tstate | |
2710 | wrhpr 0x4, %htstate | |
2711 | retry | |
2712 | movre %o4, 0x1C9, %i4 | |
2713 | fmovrdne %g7, %f28, %f12 | |
2714 | st %fsr, [%l7 + 0x6C] | |
2715 | loop_79: | |
2716 | nop | |
2717 | wr %g0, 0x11, %asi | |
2718 | stwa %l1, [%l7 + 0x18] %asi | |
2719 | xorcc %o2, %i3, %o0 | |
2720 | ||
2721 | or %g0, 0x8, %l0 | |
2722 | sllx %l0, 0x3c, %l0 | |
2723 | wrhpr %l0, 0xE9C, %hsys_tick_cmpr | |
2724 | restored | |
2725 | rdpr %cwp, %g1 | |
2726 | rdpr %cansave, %g2 | |
2727 | rdpr %canrestore, %g3 | |
2728 | rdpr %cleanwin, %g4 | |
2729 | rdpr %otherwin, %g5 | |
2730 | rdpr %wstate, %g6 | |
2731 | fmovsue %fcc0, %f5, %f20 | |
2732 | orncc %l3, %g4, %o7 | |
2733 | movrgz %i1, %i0, %l4 | |
2734 | bneg %icc, loop_80 | |
2735 | st %fsr, [%l7 + 0x58] | |
2736 | fandnot1 %f4, %f8, %f28 | |
2737 | fbue,a,pt %fcc0, loop_81 | |
2738 | loop_80: | |
2739 | st %fsr, [%l7 + 0x6C] | |
2740 | fabss %f30, %f25 | |
2741 | add %g6, %i5, %o5 | |
2742 | loop_81: | |
2743 | st %fsr, [%l7 + 0x44] | |
2744 | fmovsa %xcc, %f30, %f15 | |
2745 | EXIT_GOOD | |
2746 | ||
2747 | ||
2748 | ||
2749 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
2750 | ! | |
2751 | ! Stats for Thread 6: | |
2752 | ! | |
2753 | ! Type l : 58 | |
2754 | ! Type a : 12 | |
2755 | ! Type x : 2 | |
2756 | ! Type cti : 16 | |
2757 | ! Type f : 58 | |
2758 | ! Type i : 54 | |
2759 | ! | |
2760 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
2761 | ||
2762 | ! | |
2763 | ! Thread 7 Start | |
2764 | ! | |
2765 | main_t7: | |
2766 | mov %l7, %g1 | |
2767 | !# Set %cwp for 8 windows | |
2768 | !# This threads memory space into each %l7 | |
2769 | wrpr %g0, 0x7, %cwp | |
2770 | mov %g1, %l7 | |
2771 | wrpr %g0, 0x6, %cwp | |
2772 | mov %g1, %l7 | |
2773 | wrpr %g0, 0x5, %cwp | |
2774 | mov %g1, %l7 | |
2775 | wrpr %g0, 0x4, %cwp | |
2776 | mov %g1, %l7 | |
2777 | wrpr %g0, 0x3, %cwp | |
2778 | mov %g1, %l7 | |
2779 | wrpr %g0, 0x2, %cwp | |
2780 | mov %g1, %l7 | |
2781 | wrpr %g0, 0x1, %cwp | |
2782 | mov %g1, %l7 | |
2783 | wrpr %g0, 0x0, %cwp | |
2784 | mov %g1, %l7 | |
2785 | ||
2786 | !# Set %fsr | |
2787 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
2788 | stx %l6, [%l7 + 0x0] !# no post process | |
2789 | ldx [%l7 + 0x0], %fsr !# no post process | |
2790 | ||
2791 | !# Initialize registers .. | |
2792 | ||
2793 | !# Global registers | |
2794 | set 0x7, %g1 | |
2795 | set 0x4, %g2 | |
2796 | set 0xB, %g3 | |
2797 | set 0x1, %g4 | |
2798 | set 0xA, %g5 | |
2799 | set 0xB, %g6 | |
2800 | set 0xE, %g7 | |
2801 | !# Input registers | |
2802 | set -0xB, %i0 | |
2803 | set -0x3, %i1 | |
2804 | set -0x8, %i2 | |
2805 | set -0x8, %i3 | |
2806 | set -0x5, %i4 | |
2807 | set -0x9, %i5 | |
2808 | set -0x3, %i6 | |
2809 | set -0xC, %i7 | |
2810 | !# Local registers | |
2811 | set 0x5DDA7069, %l0 | |
2812 | set 0x2245D858, %l1 | |
2813 | set 0x564DB3B0, %l2 | |
2814 | set 0x14C86928, %l3 | |
2815 | set 0x41500F72, %l4 | |
2816 | set 0x043D8F9F, %l5 | |
2817 | set 0x4D841C51, %l6 | |
2818 | !# Output registers | |
2819 | set 0x16DD, %o0 | |
2820 | set 0x074A, %o1 | |
2821 | set -0x1F93, %o2 | |
2822 | set -0x0B06, %o3 | |
2823 | set -0x05E5, %o4 | |
2824 | set 0x1754, %o5 | |
2825 | set -0x1326, %o6 | |
2826 | set -0x1C37, %o7 | |
2827 | !# Float registers | |
2828 | INIT_TH_FP_REG(%l7,%f0,0xCC8D0620E2DA3693) | |
2829 | INIT_TH_FP_REG(%l7,%f2,0xFA244F23DF29DB54) | |
2830 | INIT_TH_FP_REG(%l7,%f4,0xB3D57F1FD825C368) | |
2831 | INIT_TH_FP_REG(%l7,%f6,0xD424E498A853CE5F) | |
2832 | INIT_TH_FP_REG(%l7,%f8,0x977F0E2124D33F26) | |
2833 | INIT_TH_FP_REG(%l7,%f10,0xA0B27E8022DAD6F1) | |
2834 | INIT_TH_FP_REG(%l7,%f12,0x0E18BA3EE2FD2B03) | |
2835 | INIT_TH_FP_REG(%l7,%f14,0x82E2F7E67C833C90) | |
2836 | INIT_TH_FP_REG(%l7,%f16,0xB89D0594757DA2EA) | |
2837 | INIT_TH_FP_REG(%l7,%f18,0x13FED6033727FCD0) | |
2838 | INIT_TH_FP_REG(%l7,%f20,0x07AF4B2FEA0A7C57) | |
2839 | INIT_TH_FP_REG(%l7,%f22,0xF9469CA7B8499B25) | |
2840 | INIT_TH_FP_REG(%l7,%f24,0x44BC25C38BAFF430) | |
2841 | INIT_TH_FP_REG(%l7,%f26,0x93A19EEFE466340C) | |
2842 | INIT_TH_FP_REG(%l7,%f28,0xAAE03C1EEE40660C) | |
2843 | INIT_TH_FP_REG(%l7,%f30,0x355FB97FCC4E55E9) | |
2844 | ||
2845 | !# Execute Main Diag .. | |
2846 | ||
2847 | nop | |
2848 | setx 0xB02FBBF9, %l0, %l6 | |
2849 | st %l6, [%l7 + 0x28] | |
2850 | ld [%l7 + 0x28], %f15 | |
2851 | setx 0x9770274D, %l1, %l5 | |
2852 | st %l5, [%l7 + 0x10] | |
2853 | ld [%l7 + 0x10], %f14 | |
2854 | fsubs %f14, %f15, %f16 | |
2855 | add %l0, %g2, %i6 | |
2856 | std %g2, [%l7 + 0x20] | |
2857 | st %fsr, [%l7 + 0x30] | |
2858 | taddcc %i7, %g1, %o1 | |
2859 | tne %xcc, 0x5 | |
2860 | wr %o6, %l5, %ccr | |
2861 | fmovrslz %l2, %f27, %f5 | |
2862 | fmovsleu %xcc, %f2, %f22 | |
2863 | mulx %g5, 0x08E6, %o3 | |
2864 | nop | |
2865 | setx 0xA55E23FDF05AC1A1, %l0, %l6 | |
2866 | stx %l6, [%l7 + 0x28] | |
2867 | ldd [%l7 + 0x28], %f2 | |
2868 | setx 0xF5C5304A, %l1, %l5 | |
2869 | stx %l5, [%l7 + 0x10] | |
2870 | ldd [%l7 + 0x10], %f22 | |
2871 | fsmuld %f22, %f2, %f24 | |
2872 | fbge %fcc2, loop_82 | |
2873 | rdhpr %hsys_tick_cmpr, %o4 | |
2874 | movcc %xcc, %l6, %i4 | |
2875 | st %fsr, [%l7 + 0x10] | |
2876 | loop_82: | |
2877 | ldub [%l7 + 0x0F], %g7 | |
2878 | st %fsr, [%l7 + 0x14] | |
2879 | brgez,a,pn %o2, loop_83 | |
2880 | orcc %i3, %l1, %i2 | |
2881 | st %fsr, [%l7 + 0x64] | |
2882 | rdpr %otherwin, %o0 | |
2883 | loop_83: | |
2884 | fcmpes %fcc3, %f18, %f9 | |
2885 | st %fsr, [%l7 + 0x2C] | |
2886 | movuge %fcc2, %g4, %l3 | |
2887 | st %fsr, [%l7 + 0x28] | |
2888 | alignaddr %o7, %i0, %l4 | |
2889 | sethi 0x1246, %i1 | |
2890 | st %fsr, [%l7 + 0x5C] | |
2891 | tsubcctv %i5, 0x17CC, %g6 | |
2892 | rdpr %wstate, %l0 | |
2893 | fpadd16s %f13, %f12, %f5 | |
2894 | andn %o5, 0x19C0, %i6 | |
2895 | st %fsr, [%l7 + 0x6C] | |
2896 | fpsub16s %f19, %f18, %f22 | |
2897 | fmovdug %fcc3, %f24, %f2 | |
2898 | rd %tick_cmpr, %g2 | |
2899 | bmask %g3, %i7, %o1 | |
2900 | ta %xcc, 0x2 | |
2901 | nop | |
2902 | setx 0x782DD334EE84254E, %l0, %l6 | |
2903 | stx %l6, [%l7 + 0x28] | |
2904 | ldd [%l7 + 0x28], %f28 | |
2905 | fsqrtd %f28, %f10 | |
2906 | rdpr %wstate, %o6 | |
2907 | wr %l5, %g1, %sys_tick | |
2908 | nop | |
2909 | setx 0x3C997840E1EA1B55, %l0, %l6 | |
2910 | stx %l6, [%l7 + 0x28] | |
2911 | ldd [%l7 + 0x28], %f24 | |
2912 | fsqrtd %f24, %f20 | |
2913 | st %fsr, [%l7 + 0x48] | |
2914 | tvs %icc, 0x5 | |
2915 | st %fsr, [%l7 + 0x7C] | |
2916 | st %fsr, [%l7 + 0x34] | |
2917 | fcmped %fcc1, %f20, %f24 | |
2918 | bg,pn %xcc, loop_84 | |
2919 | array16 %l2, %g5, %o3 | |
2920 | fcmpes %fcc2, %f17, %f14 | |
2921 | tn %icc, 0x2 | |
2922 | loop_84: | |
2923 | taddcctv %o4, %i4, %g7 | |
2924 | nop | |
2925 | setx 0x3586122081AEBDC8, %l0, %l6 | |
2926 | stx %l6, [%l7 + 0x58] | |
2927 | ldx [%l7 + 0x58], %fsr | |
2928 | edge8 %l6, %i3, %o2 | |
2929 | st %fsr, [%l7 + 0x64] | |
2930 | st %fsr, [%l7 + 0x30] | |
2931 | fmovslg %fcc2, %f5, %f24 | |
2932 | fmovsue %fcc1, %f0, %f0 | |
2933 | restored | |
2934 | rdpr %cwp, %g1 | |
2935 | rdpr %cansave, %g2 | |
2936 | rdpr %canrestore, %g3 | |
2937 | rdpr %cleanwin, %g4 | |
2938 | rdpr %otherwin, %g5 | |
2939 | rdpr %wstate, %g6 | |
2940 | fcmpne32 %f18, %f6, %i2 | |
2941 | edge32ln %l1, %g4, %o0 | |
2942 | fbl,pn %fcc1, loop_85 | |
2943 | st %fsr, [%l7 + 0x78] | |
2944 | nop | |
2945 | setx 0x1137, %l0, %o7 | |
2946 | sdivx %l3, %o7, %l4 | |
2947 | fpsub32s %f12, %f17, %f0 | |
2948 | loop_85: | |
2949 | fzero %f16 | |
2950 | ldd [%l7 + 0x38], %f24 | |
2951 | fmovsuge %fcc0, %f10, %f18 | |
2952 | smulcc %i1, %i5, %g6 | |
2953 | umulcc %i0, 0x1B5C, %l0 | |
2954 | fmovrdlz %o5, %f24, %f8 | |
2955 | subc %i6, 0x03ED, %g3 | |
2956 | st %fsr, [%l7 + 0x1C] | |
2957 | wrpr %i7, %o1, %tick | |
2958 | sethi 0x1681, %g2 | |
2959 | st %fsr, [%l7 + 0x34] | |
2960 | st %fsr, [%l7 + 0x34] | |
2961 | tneg %xcc, 0x5 | |
2962 | mulscc %o6, 0x08F9, %l5 | |
2963 | movn %icc, 0x6CB, %g1 | |
2964 | fmovsne %fcc1, %f17, %f2 | |
2965 | fpackfix %f14, %f31 | |
2966 | st %fsr, [%l7 + 0x10] | |
2967 | tle %icc, 0x5 | |
2968 | wr %g0, 0x80, %asi | |
2969 | stwa %g5, [%l7 + 0x70] %asi | |
2970 | st %fsr, [%l7 + 0x48] | |
2971 | st %fsr, [%l7 + 0x28] | |
2972 | fxnors %f29, %f21, %f9 | |
2973 | nop | |
2974 | setx 0x82857030FE441B96, %l0, %l6 | |
2975 | stx %l6, [%l7 + 0x28] | |
2976 | ldd [%l7 + 0x28], %f16 | |
2977 | setx 0x247CEEE2, %l1, %l5 | |
2978 | stx %l5, [%l7 + 0x10] | |
2979 | ldd [%l7 + 0x10], %f30 | |
2980 | fsmuld %f30, %f16, %f10 | |
2981 | st %fsr, [%l7 + 0x54] | |
2982 | fmovrdlz %o3, %f30, %f8 | |
2983 | fmovsue %fcc0, %f12, %f30 | |
2984 | st %fsr, [%l7 + 0x40] | |
2985 | st %fsr, [%l7 + 0x50] | |
2986 | st %fsr, [%l7 + 0x38] | |
2987 | andcc %o4, 0x054C, %i4 | |
2988 | movue %fcc2, 0x040, %g7 | |
2989 | fmul8x16 %f14, %f2, %f12 | |
2990 | fmovsuge %fcc3, %f0, %f6 | |
2991 | st %fsr, [%l7 + 0x10] | |
2992 | nop | |
2993 | setx 0x13DC, %l0, %i3 | |
2994 | udiv %l2, %i3, %o2 | |
2995 | fmovdcs %icc, %f4, %f24 | |
2996 | fmovdneg %icc, %f16, %f30 | |
2997 | stw %i2, [%l7 + 0x2C] | |
2998 | st %fsr, [%l7 + 0x4C] | |
2999 | nop | |
3000 | setx 0x08A6, %l0, %g4 | |
3001 | sdivcc %l6, %g4, %l1 | |
3002 | st %fsr, [%l7 + 0x58] | |
3003 | st %fsr, [%l7 + 0x6C] | |
3004 | fmovse %fcc3, %f29, %f15 | |
3005 | movul %fcc2, %o0, %o7 | |
3006 | st %fsr, [%l7 + 0x30] | |
3007 | edge32ln %l3, %l4, %i5 | |
3008 | st %fsr, [%l7 + 0x6C] | |
3009 | fbue,a %fcc0, loop_86 | |
3010 | movre %g6, %i0, %i1 | |
3011 | st %fsr, [%l7 + 0x48] | |
3012 | fpadd32 %f24, %f10, %f12 | |
3013 | loop_86: | |
3014 | st %fsr, [%l7 + 0x60] | |
3015 | set 0x32, %l6 | |
3016 | lduha [%l7 + %l6] 0x19, %l0 | |
3017 | fpadd16 %f20, %f24, %f8 | |
3018 | st %fsr, [%l7 + 0x28] | |
3019 | siam 0x3 | |
3020 | movvs %icc, 0x115, %o5 | |
3021 | restored | |
3022 | rdpr %cwp, %g1 | |
3023 | rdpr %cansave, %g2 | |
3024 | rdpr %canrestore, %g3 | |
3025 | rdpr %cleanwin, %g4 | |
3026 | rdpr %otherwin, %g5 | |
3027 | rdpr %wstate, %g6 | |
3028 | orn %i6, %i7, %g3 | |
3029 | st %fsr, [%l7 + 0x14] | |
3030 | movcs %xcc, %o1, %g2 | |
3031 | nop | |
3032 | setx 0xEA8921BA, %l0, %l6 | |
3033 | st %l6, [%l7 + 0x28] | |
3034 | ld [%l7 + 0x28], %f27 | |
3035 | setx 0xF0DBBDF4, %l1, %l5 | |
3036 | st %l5, [%l7 + 0x10] | |
3037 | ld [%l7 + 0x10], %f7 | |
3038 | fmuls %f7, %f27, %f1 | |
3039 | fmovdul %fcc3, %f18, %f6 | |
3040 | st %fsr, [%l7 + 0x54] | |
3041 | movneg %icc, %l5, %o6 | |
3042 | andn %g1, 0x011A, %o3 | |
3043 | movn %fcc0, 0x7E7, %o4 | |
3044 | st %fsr, [%l7 + 0x18] | |
3045 | fbue,a %fcc1, loop_87 | |
3046 | stx %fsr, [%l7 + 0x58] | |
3047 | st %fsr, [%l7 + 0x68] | |
3048 | edge16n %g5, %i4, %g7 | |
3049 | loop_87: | |
3050 | nop | |
3051 | setx 0x1B29, %l0, %o2 | |
3052 | udivx %i3, %o2, %l2 | |
3053 | st %fsr, [%l7 + 0x18] | |
3054 | st %fsr, [%l7 + 0x40] | |
3055 | fmuld8sux16 %f6, %f15, %f4 | |
3056 | fbe,a,pt %fcc1, loop_88 | |
3057 | array8 %i2, %g4, %l1 | |
3058 | st %fsr, [%l7 + 0x38] | |
3059 | ldub [%l7 + 0x26], %l6 | |
3060 | loop_88: | |
3061 | nop | |
3062 | fitod %f4, %f10 | |
3063 | fdtox %f10, %f8 | |
3064 | fxtod %f8, %f4 | |
3065 | st %fsr, [%l7 + 0x68] | |
3066 | movrlz %o7, %l3, %o0 | |
3067 | st %fsr, [%l7 + 0x34] | |
3068 | st %fsr, [%l7 + 0x5C] | |
3069 | st %fsr, [%l7 + 0x60] | |
3070 | fmul8sux16 %f22, %f6, %f16 | |
3071 | movrlez %i5, %g6, %l4 | |
3072 | membar #Sync | |
3073 | set 0x40, %l1 | |
3074 | ldda [%l7 + %l1] 0xf8, %f0 | |
3075 | fxnor %f16, %f30, %f12 | |
3076 | fmovdpos %icc, %f22, %f14 | |
3077 | or %i1, %i0, %o5 | |
3078 | set 0x40, %l3 | |
3079 | stda %f0, [%l7 + %l3] 0xc1 | |
3080 | st %fsr, [%l7 + 0x64] | |
3081 | ||
3082 | or %g0, 0x8, %l0 | |
3083 | sllx %l0, 0x3c, %l0 | |
3084 | wrhpr %l0, 0xD0F, %hsys_tick_cmpr | |
3085 | fmovso %fcc1, %f12, %f24 | |
3086 | nop | |
3087 | fitod %f0, %f6 | |
3088 | prefetch [%l7 + 0x2C], 3 | |
3089 | faligndata %f22, %f2, %f24 | |
3090 | st %fsr, [%l7 + 0x08] | |
3091 | tcc %icc, 0x3 | |
3092 | fmovspos %xcc, %f12, %f0 | |
3093 | fbule,a,pn %fcc2, loop_89 | |
3094 | st %fsr, [%l7 + 0x70] | |
3095 | fabss %f22, %f4 | |
3096 | st %fsr, [%l7 + 0x60] | |
3097 | loop_89: | |
3098 | nop | |
3099 | setx 0x6A0250869ECAE2B2, %l0, %l6 | |
3100 | stx %l6, [%l7 + 0x28] | |
3101 | ldd [%l7 + 0x28], %f12 | |
3102 | setx 0xC8FE7DA7FF149BB6, %l1, %l5 | |
3103 | stx %l5, [%l7 + 0x10] | |
3104 | ldd [%l7 + 0x10], %f14 | |
3105 | faddd %f14, %f12, %f12 | |
3106 | flush %l7 + 0x44 | |
3107 | bleu %xcc, loop_90 | |
3108 | nop | |
3109 | set 0x40, %o7 | |
3110 | std %f8, [%l7 + %o7] | |
3111 | fpackfix %f12, %f20 | |
3112 | sub %g3, 0x0E0C, %i7 | |
3113 | loop_90: | |
3114 | tl %icc, 0x3 | |
3115 | fmovsu %fcc1, %f27, %f4 | |
3116 | array8 %o1, %g2, %o6 | |
3117 | movre %l5, %g1, %o3 | |
3118 | fcmpd %fcc2, %f4, %f4 | |
3119 | wr %g0, 0x11, %asi | |
3120 | lduha [%l7 + 0x66] %asi, %o4 | |
3121 | fmovrdgez %g5, %f4, %f30 | |
3122 | brlez,a %g7, loop_91 | |
3123 | st %fsr, [%l7 + 0x10] | |
3124 | fmovduge %fcc2, %f24, %f4 | |
3125 | nop | |
3126 | setx 0x0935, %l0, %i4 | |
3127 | udivcc %i3, %i4, %o2 | |
3128 | loop_91: | |
3129 | movge %fcc3, 0x590, %i2 | |
3130 | fmovdcc %icc, %f28, %f0 | |
3131 | st %fsr, [%l7 + 0x54] | |
3132 | fmovsge %icc, %f5, %f13 | |
3133 | st %fsr, [%l7 + 0x60] | |
3134 | nop | |
3135 | setx 0xBA728830, %l0, %l6 | |
3136 | st %l6, [%l7 + 0x28] | |
3137 | ld [%l7 + 0x28], %f20 | |
3138 | setx 0x5BF76D90, %l1, %l5 | |
3139 | st %l5, [%l7 + 0x10] | |
3140 | ld [%l7 + 0x10], %f27 | |
3141 | fsubs %f27, %f20, %f27 | |
3142 | EXIT_GOOD | |
3143 | ||
3144 | ||
3145 | ||
3146 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
3147 | ! | |
3148 | ! Stats for Thread 7: | |
3149 | ! | |
3150 | ! Type l : 66 | |
3151 | ! Type a : 9 | |
3152 | ! Type x : 5 | |
3153 | ! Type cti : 10 | |
3154 | ! Type f : 54 | |
3155 | ! Type i : 56 | |
3156 | ! | |
3157 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
3158 | ||
3159 | ||
3160 | EXIT_GOOD /* test finish */ | |
3161 | ||
3162 | /************************************************************************ | |
3163 | Test case data start | |
3164 | ************************************************************************/ | |
3165 | .data | |
3166 | user_data_start: | |
3167 | scratch_area: | |
3168 | .word 0xF5681776 | |
3169 | .word 0x885F1365 | |
3170 | .word 0xA2754697 | |
3171 | .word 0xED619F24 | |
3172 | .word 0xCE7CC31B | |
3173 | .word 0x67367937 | |
3174 | .word 0xE1DFFE70 | |
3175 | .word 0xB1C3F371 | |
3176 | .word 0x52D43409 | |
3177 | .word 0x23A7D161 | |
3178 | .word 0x95E6AC99 | |
3179 | .word 0x1ADD80DB | |
3180 | .word 0x9275C51E | |
3181 | .word 0x7244D468 | |
3182 | .word 0x998C82B6 | |
3183 | .word 0xC68B0EC9 | |
3184 | .word 0xC633A9E5 | |
3185 | .word 0x82AB8B81 | |
3186 | .word 0x02203605 | |
3187 | .word 0x8BF40F64 | |
3188 | .word 0x581784BC | |
3189 | .word 0x6BE48BF2 | |
3190 | .word 0x36B0857B | |
3191 | .word 0x09F35909 | |
3192 | .word 0x18BD51A9 | |
3193 | .word 0xB99B0817 | |
3194 | .word 0xCBD4BFFF | |
3195 | .word 0x0DD99D0B | |
3196 | .word 0x31FDBC62 | |
3197 | .word 0x2E4AC7BE | |
3198 | .word 0x00920AB0 | |
3199 | .word 0x72F91BF5 | |
3200 | .word 0x16AA0AF2 | |
3201 | .word 0x155F9687 | |
3202 | .word 0x1AB46A47 | |
3203 | .word 0xDF134426 | |
3204 | .word 0xE0499366 | |
3205 | .word 0x439E716A | |
3206 | .word 0x8FDC773F | |
3207 | .word 0x79AD1E25 | |
3208 | .word 0x7A29D6AE | |
3209 | .word 0x53E9F36A | |
3210 | .word 0x4EC5F198 | |
3211 | .word 0x2010033A | |
3212 | .word 0xCAA06637 | |
3213 | .word 0xD59BC676 | |
3214 | .word 0x8C651B87 | |
3215 | .word 0x5711061E | |
3216 | .word 0x11CDB84D | |
3217 | .word 0x2800A008 | |
3218 | .word 0xF437927A | |
3219 | .word 0x440BBD19 | |
3220 | .word 0xAF570264 | |
3221 | .word 0x25CE52E7 | |
3222 | .word 0xCD4E3A38 | |
3223 | .word 0xB1015F98 | |
3224 | .word 0xD8FA9405 | |
3225 | .word 0xAD455F5B | |
3226 | .word 0xA8105A1F | |
3227 | .word 0xB1642078 | |
3228 | .word 0xD754725F | |
3229 | .word 0x76E21C51 | |
3230 | .word 0x1DF32B80 | |
3231 | .word 0x07A1AAAF | |
3232 | .end |