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86530b38 AT |
1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: fgu_stxfsr_traps_23.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | .ident "FOCUSCASE: focus.pm,v 1.1 2003/04/23 17:53:39 somePerson Exp somePerson $ spc_basic_isa3.pl FOCUS_SEED=1238790" | |
39 | .ident "Mon Dec 8 19:56:46 CST 2003" | |
40 | .ident "Using Instruction Hash for Focus :$Id: fgu_stxfsr_traps_23.s,v 1.4 2007/07/27 21:45:32 drp Exp $" | |
41 | #include "defines.h" | |
42 | #include "nmacros.h" | |
43 | #include "old_boot.s" | |
44 | ||
45 | /************************************************************************ | |
46 | Test case code start | |
47 | ************************************************************************/ | |
48 | ||
49 | .text | |
50 | .global main | |
51 | ||
52 | main: /* test begin */ | |
53 | ||
54 | ! Get TID/DIAG DATA AREA. Separate memory for each thread. | |
55 | ta T_RD_THID | |
56 | mov %o1, %l6 | |
57 | umul %l6, 256, %l7 | |
58 | setx DIAG_DATA_AREA, %g1, %g3 | |
59 | add %l7, %g3, %l7 | |
60 | ||
61 | cmp %l6, 0x0 | |
62 | be main_t0 | |
63 | nop | |
64 | cmp %l6, 0x1 | |
65 | be main_t1 | |
66 | nop | |
67 | cmp %l6, 0x2 | |
68 | be main_t2 | |
69 | nop | |
70 | cmp %l6, 0x3 | |
71 | be main_t3 | |
72 | nop | |
73 | cmp %l6, 0x4 | |
74 | be main_t4 | |
75 | nop | |
76 | cmp %l6, 0x5 | |
77 | be main_t5 | |
78 | nop | |
79 | cmp %l6, 0x6 | |
80 | be main_t6 | |
81 | nop | |
82 | cmp %l6, 0x7 | |
83 | be main_t7 | |
84 | nop | |
85 | EXIT_GOOD | |
86 | ! | |
87 | ! Thread 0 Start | |
88 | ! | |
89 | main_t0: | |
90 | mov %l7, %g1 | |
91 | !# Set %cwp for 8 windows | |
92 | !# This threads memory space into each %l7 | |
93 | wrpr %g0, 0x7, %cwp | |
94 | mov %g1, %l7 | |
95 | wrpr %g0, 0x6, %cwp | |
96 | mov %g1, %l7 | |
97 | wrpr %g0, 0x5, %cwp | |
98 | mov %g1, %l7 | |
99 | wrpr %g0, 0x4, %cwp | |
100 | mov %g1, %l7 | |
101 | wrpr %g0, 0x3, %cwp | |
102 | mov %g1, %l7 | |
103 | wrpr %g0, 0x2, %cwp | |
104 | mov %g1, %l7 | |
105 | wrpr %g0, 0x1, %cwp | |
106 | mov %g1, %l7 | |
107 | wrpr %g0, 0x0, %cwp | |
108 | mov %g1, %l7 | |
109 | ||
110 | !# Set %fsr | |
111 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
112 | stx %l6, [%l7 + 0x0] !# no post process | |
113 | ldx [%l7 + 0x0], %fsr !# no post process | |
114 | ||
115 | !# Initialize registers .. | |
116 | ||
117 | !# Global registers | |
118 | set 0x7, %g1 | |
119 | set 0x4, %g2 | |
120 | set 0xB, %g3 | |
121 | set 0x1, %g4 | |
122 | set 0xA, %g5 | |
123 | set 0xE, %g6 | |
124 | set 0x0, %g7 | |
125 | !# Input registers | |
126 | set -0x1, %i0 | |
127 | set -0xC, %i1 | |
128 | set -0xD, %i2 | |
129 | set -0xB, %i3 | |
130 | set -0x4, %i4 | |
131 | set -0x9, %i5 | |
132 | set -0x8, %i6 | |
133 | set -0x6, %i7 | |
134 | !# Local registers | |
135 | set 0x64163A83, %l0 | |
136 | set 0x3050C94B, %l1 | |
137 | set 0x550190D2, %l2 | |
138 | set 0x4315A51E, %l3 | |
139 | set 0x1A17E749, %l4 | |
140 | set 0x28A15890, %l5 | |
141 | set 0x4AECE499, %l6 | |
142 | !# Output registers | |
143 | set -0x0DB0, %o0 | |
144 | set 0x0001, %o1 | |
145 | set 0x07D8, %o2 | |
146 | set 0x09EF, %o3 | |
147 | set -0x17F7, %o4 | |
148 | set -0x000E, %o5 | |
149 | set 0x1EB6, %o6 | |
150 | set -0x0F5E, %o7 | |
151 | !# Float registers | |
152 | INIT_TH_FP_REG(%l7,%f0,0x5CDEBE004C9316D6) | |
153 | INIT_TH_FP_REG(%l7,%f2,0x5AF70778F0C4B088) | |
154 | INIT_TH_FP_REG(%l7,%f4,0x8D7526625EC515A4) | |
155 | INIT_TH_FP_REG(%l7,%f6,0xE02F1C846E8760CC) | |
156 | INIT_TH_FP_REG(%l7,%f8,0x0321EB208EE2B95B) | |
157 | INIT_TH_FP_REG(%l7,%f10,0x2389D1100A6649F3) | |
158 | INIT_TH_FP_REG(%l7,%f12,0x67131F7252CC89E3) | |
159 | INIT_TH_FP_REG(%l7,%f14,0xE9E42F7A627F9BF1) | |
160 | INIT_TH_FP_REG(%l7,%f16,0x768EE71D99271671) | |
161 | INIT_TH_FP_REG(%l7,%f18,0x7E12787768E2C912) | |
162 | INIT_TH_FP_REG(%l7,%f20,0x308AE9F847B82508) | |
163 | INIT_TH_FP_REG(%l7,%f22,0x4821D99235B5284B) | |
164 | INIT_TH_FP_REG(%l7,%f24,0xE1625C0F20759DEE) | |
165 | INIT_TH_FP_REG(%l7,%f26,0x376BF26EBED9E858) | |
166 | INIT_TH_FP_REG(%l7,%f28,0x3F3211F11C669311) | |
167 | INIT_TH_FP_REG(%l7,%f30,0xEE9DF5D905EBEBD1) | |
168 | ||
169 | !# Execute Main Diag .. | |
170 | ||
171 | edge8ln %o3, %l3, %i5 | |
172 | fcmpeq16 %f6, %f22, %l4 | |
173 | edge16ln %g5, %l1, %g4 | |
174 | fbe,a %fcc1, loop_1 | |
175 | fbe,pt %fcc3, loop_2 | |
176 | brz,a,pt %o2, loop_3 | |
177 | nop | |
178 | set 0x60, %l1 | |
179 | stx %fsr, [%l7 + %l1] | |
180 | loop_1: | |
181 | movrgez %g1, 0x0AB, %g3 | |
182 | loop_2: | |
183 | movl %fcc3, %i6, %l2 | |
184 | loop_3: | |
185 | movcc %icc, %o7, %i2 | |
186 | edge8 %g6, %i4, %o4 | |
187 | tn %xcc, 0x2 | |
188 | wrpr %i0, 0x0EEC, %cwp | |
189 | ldsh [%l7 + 0x4C], %g7 | |
190 | alignaddr %i1, %l5, %g2 | |
191 | nop | |
192 | setx 0x173F, %l0, %i7 | |
193 | udiv %o5, %i7, %l0 | |
194 | fnot1s %f14, %f6 | |
195 | stx %fsr, [%l7 + 0x10] | |
196 | rdhpr %ver, %o6 | |
197 | fmovsn %fcc0, %f21, %f8 | |
198 | wr %o1, 0x1AD4, %y | |
199 | subc %i3, 0x0F40, %o0 | |
200 | edge32 %l6, %l3, %i5 | |
201 | nop | |
202 | set 0x50, %l5 | |
203 | stx %fsr, [%l7 + %l5] | |
204 | fnors %f27, %f0, %f31 | |
205 | saved | |
206 | rdpr %cwp, %g1 | |
207 | rdpr %cansave, %g2 | |
208 | rdpr %canrestore, %g3 | |
209 | rdpr %cleanwin, %g4 | |
210 | rdpr %otherwin, %g5 | |
211 | rdpr %wstate, %g6 | |
212 | rdpr %canrestore, %o3 | |
213 | tneg %xcc, 0x2 | |
214 | nop | |
215 | setx 0xEC18A098, %l0, %l6 | |
216 | st %l6, [%l7 + 0x28] | |
217 | ld [%l7 + 0x28], %f20 | |
218 | setx 0xAFDEA40A, %l1, %l5 | |
219 | st %l5, [%l7 + 0x10] | |
220 | ld [%l7 + 0x10], %f13 | |
221 | fdivs %f13, %f20, %f30 | |
222 | fabss %f12, %f15 | |
223 | nop | |
224 | setx 0xD4213CB55FC65762, %l0, %l6 | |
225 | stx %l6, [%l7 + 0x28] | |
226 | ldd [%l7 + 0x28], %f16 | |
227 | setx 0x636BE8DAFAE076F1, %l1, %l5 | |
228 | stx %l5, [%l7 + 0x10] | |
229 | ldd [%l7 + 0x10], %f24 | |
230 | fdivd %f24, %f16, %f4 | |
231 | nop | |
232 | set 0x08, %o1 | |
233 | stx %fsr, [%l7 + %o1] | |
234 | wrpr %l4, %l1, %cwp | |
235 | edge8n %g5, %o2, %g1 | |
236 | ble,a %icc, loop_4 | |
237 | nop | |
238 | set 0x78, %l4 | |
239 | stx %fsr, [%l7 + %l4] | |
240 | stx %fsr, [%l7 + 0x58] | |
241 | fmovsgu %xcc, %f27, %f25 | |
242 | loop_4: | |
243 | fcmped %fcc1, %f16, %f26 | |
244 | movule %fcc0, 0x246, %g4 | |
245 | tn %xcc, 0x6 | |
246 | nop | |
247 | fitos %f7, %f8 | |
248 | rd %softint, %g3 | |
249 | fnegs %f0, %f26 | |
250 | tneg %xcc, 0x7 | |
251 | fmovrdlz %i6, %f18, %f30 | |
252 | tl %xcc, 0x3 | |
253 | fmovdo %fcc0, %f16, %f26 | |
254 | orncc %l2, %o7, %g6 | |
255 | nop | |
256 | fitod %f0, %f20 | |
257 | fdtox %f20, %f28 | |
258 | ldx [%l7 + 0x40], %i4 | |
259 | nop | |
260 | set 0x48, %o6 | |
261 | stx %i2, [%l7 + %o6] | |
262 | fandnot2 %f20, %f30, %f18 | |
263 | be,pt %xcc, loop_5 | |
264 | brz %o4, loop_6 | |
265 | fmovda %fcc1, %f10, %f2 | |
266 | fmovsgu %icc, %f10, %f27 | |
267 | loop_5: | |
268 | fxors %f16, %f3, %f21 | |
269 | loop_6: | |
270 | nop | |
271 | set 0x70, %g3 | |
272 | stx %fsr, [%l7 + %g3] | |
273 | nop | |
274 | set 0x20, %l0 | |
275 | ldd [%l7 + %l0], %g6 | |
276 | rd %sys_tick_cmpr, %i1 | |
277 | pdist %f6, %f26, %f28 | |
278 | fmovrsgz %i0, %f28, %f15 | |
279 | fmovd %f28, %f14 | |
280 | set 0x40, %o2 | |
281 | stda %f0, [%l7 + %o2] 0xf9 | |
282 | membar #Sync | |
283 | mulx %g2, %o5, %l5 | |
284 | nop | |
285 | setx 0x0C59, %l1, %l0 | |
286 | sdivx %i7, %l0, %o1 | |
287 | fornot2s %f17, %f13, %f22 | |
288 | movg %icc, %o6, %o0 | |
289 | nop | |
290 | set 0x40, %i0 | |
291 | stx %fsr, [%l7 + %i0] | |
292 | fpack16 %f18, %f19 | |
293 | xor %i3, %l6, %l3 | |
294 | stx %fsr, [%l7 + 0x50] | |
295 | mulscc %i5, %l4, %l1 | |
296 | nop | |
297 | set 0x08, %i6 | |
298 | stx %fsr, [%l7 + %i6] | |
299 | nop | |
300 | set 0x78, %o3 | |
301 | stx %fsr, [%l7 + %o3] | |
302 | orncc %o3, %g5, %o2 | |
303 | srax %g1, 0x0A, %g4 | |
304 | nop | |
305 | set 0x20, %g2 | |
306 | stx %fsr, [%l7 + %g2] | |
307 | nop | |
308 | set 0x78, %i4 | |
309 | stx %fsr, [%l7 + %i4] | |
310 | ba,a %icc, loop_7 | |
311 | nop | |
312 | setx loop_8, %l0, %l1 | |
313 | wrpr 0x1, %tl | |
314 | wrpr %l1, %tnpc | |
315 | setx 0x011100001402, %l0, %l1 | |
316 | wrpr %l1, %tstate | |
317 | wrhpr 0x4, %htstate | |
318 | rdpr %tt, %l1 | |
319 | wrpr %g0, %l1, %tt | |
320 | rdpr %pstate, %l1 | |
321 | wrpr %g0, %l1, %pstate | |
322 | rdpr %tl, %l1 | |
323 | wrpr %g0, %l1, %tl | |
324 | rdpr %tpc, %l1 | |
325 | wrpr %g0, %l1, %tpc | |
326 | rdpr %tnpc, %l1 | |
327 | wrpr %g0, %l1, %tnpc | |
328 | rdpr %tstate, %l1 | |
329 | wrpr %g0, %l1, %tstate | |
330 | rdpr %tba, %l1 | |
331 | wrpr %g0, %l1, %tba | |
332 | rdpr %tba, %l1 | |
333 | wrpr %g0, %l1, %tba | |
334 | rdhpr %hpstate, %l1 | |
335 | wrhpr %g0, %l1, %hpstate | |
336 | rdhpr %htstate, %l1 | |
337 | wrhpr %g0, %l1, %htstate | |
338 | rdhpr %hintp, %l1 | |
339 | wrhpr %g0, %l1, %hintp | |
340 | done | |
341 | nop | |
342 | set 0x08, %l2 | |
343 | stx %fsr, [%l7 + %l2] | |
344 | nop | |
345 | fitod %f12, %f14 | |
346 | fdtoi %f14, %f30 | |
347 | loop_7: | |
348 | subcc %i6, %l2, %g3 | |
349 | loop_8: | |
350 | nop | |
351 | set 0x40, %g1 | |
352 | stx %fsr, [%l7 + %g1] | |
353 | fbue,pt %fcc1, loop_9 | |
354 | tcs %xcc, 0x5 | |
355 | brgz,a,pn %o7, loop_10 | |
356 | movule %fcc2, 0x3EC, %i4 | |
357 | loop_9: | |
358 | std %f30, [%l7 + 0x50] | |
359 | movo %fcc2, 0x138, %g6 | |
360 | loop_10: | |
361 | bvs,a %xcc, loop_11 | |
362 | siam 0x4 | |
363 | siam 0x3 | |
364 | stx %fsr, [%l7 + 0x30] | |
365 | loop_11: | |
366 | stx %fsr, [%l7 + 0x70] | |
367 | tsubcctv %o4, %i2, %i1 | |
368 | movuge %fcc2, %g7, %i0 | |
369 | edge16l %o5, %l5, %g2 | |
370 | tne %xcc, 0x7 | |
371 | set 0x50, %i5 | |
372 | lda [%l7 + %i5] 0x81, %f16 | |
373 | wr %i7, 0x0A2B, %y | |
374 | array32 %l0, %o6, %o1 | |
375 | stx %fsr, [%l7 + 0x20] | |
376 | wrpr %o0, 0x0F90, %tick | |
377 | nop | |
378 | fitos %f18, %f1 | |
379 | movrne %i3, %l6, %i5 | |
380 | fmovd %f2, %f28 | |
381 | fmovdug %fcc0, %f0, %f30 | |
382 | fmovdug %fcc2, %f20, %f12 | |
383 | tsubcctv %l3, %l4, %l1 | |
384 | nop | |
385 | set 0x58, %g6 | |
386 | stx %fsr, [%l7 + %g6] | |
387 | nop | |
388 | set 0x58, %i1 | |
389 | stx %fsr, [%l7 + %i1] | |
390 | rdhpr %hpstate, %o3 | |
391 | fmovdue %fcc3, %f18, %f2 | |
392 | fmul8ulx16 %f0, %f22, %f24 | |
393 | fmovrsne %g5, %f30, %f19 | |
394 | fbul,a,pn %fcc3, loop_12 | |
395 | stx %fsr, [%l7 + 0x78] | |
396 | rdpr %canrestore, %g1 | |
397 | array32 %g4, %o2, %l2 | |
398 | loop_12: | |
399 | nop | |
400 | set 0x70, %o7 | |
401 | stx %fsr, [%l7 + %o7] | |
402 | andcc %g3, 0x1957, %i6 | |
403 | taddcc %o7, 0x0CC7, %i4 | |
404 | fmovrse %g6, %f20, %f24 | |
405 | fmul8ulx16 %f12, %f18, %f26 | |
406 | set 0x78, %g7 | |
407 | stxa %i2, [%l7 + %g7] 0x0c | |
408 | wr %g0, 0x50, %asi | |
409 | ldxa [%g0 + 0x00] %asi, %o4 | |
410 | nop | |
411 | set 0x28, %g5 | |
412 | stx %fsr, [%l7 + %g5] | |
413 | fpack32 %f20, %f10, %f10 | |
414 | fmul8sux16 %f16, %f6, %f26 | |
415 | fbul,pt %fcc1, loop_13 | |
416 | bl,pt %icc, loop_14 | |
417 | fzeros %f14 | |
418 | fnands %f12, %f27, %f4 | |
419 | loop_13: | |
420 | nop | |
421 | set 0x78, %o5 | |
422 | stx %fsr, [%l7 + %o5] | |
423 | loop_14: | |
424 | nop | |
425 | setx 0x377AD13AD769BF4F, %l0, %l6 | |
426 | stx %l6, [%l7 + 0x28] | |
427 | ldd [%l7 + 0x28], %f26 | |
428 | fsqrtd %f26, %f26 | |
429 | fands %f19, %f15, %f26 | |
430 | nop | |
431 | setx 0xBC10249F2EBA34D4, %l0, %l6 | |
432 | stx %l6, [%l7 + 0x28] | |
433 | ldd [%l7 + 0x28], %f6 | |
434 | setx 0xE0C6671FC357E567, %l1, %l5 | |
435 | stx %l5, [%l7 + 0x10] | |
436 | ldd [%l7 + 0x10], %f6 | |
437 | fdivd %f6, %f6, %f24 | |
438 | tge %xcc, 0x0 | |
439 | ba,a %icc, loop_15 | |
440 | xnor %g7, 0x1EFD, %i0 | |
441 | ||
442 | or %g0, 0x8, %l0 | |
443 | sllx %l0, 0x3c, %l0 | |
444 | wrhpr %l0, 0x73A, %hsys_tick_cmpr | |
445 | ld [%l7 + 0x64], %f27 | |
446 | loop_15: | |
447 | fmovdue %fcc0, %f6, %f6 | |
448 | movrgz %i1, 0x184, %g2 | |
449 | stx %fsr, [%l7 + 0x28] | |
450 | fnegd %f2, %f30 | |
451 | ||
452 | or %g0, 0x8, %l0 | |
453 | sllx %l0, 0x3c, %l0 | |
454 | wrhpr %l0, 0x5C9, %hsys_tick_cmpr | |
455 | stx %fsr, [%l7 + 0x50] | |
456 | stx %fsr, [%l7 + 0x08] | |
457 | fnand %f12, %f6, %f4 | |
458 | fmovsvc %xcc, %f18, %f0 | |
459 | stx %fsr, [%l7 + 0x40] | |
460 | tneg %xcc, 0x0 | |
461 | movle %xcc, 0x0E6, %o6 | |
462 | fpack16 %f18, %f30 | |
463 | stx %fsr, [%l7 + 0x60] | |
464 | ||
465 | or %g0, 0x8, %l0 | |
466 | sllx %l0, 0x3c, %l0 | |
467 | wrhpr %l0, 0x639, %hsys_tick_cmpr | |
468 | fmovs %f26, %f24 | |
469 | stx %fsr, [%l7 + 0x28] | |
470 | orncc %i3, %l0, %i5 | |
471 | rdhpr %ver, %l6 | |
472 | fmovrslez %l3, %f5, %f17 | |
473 | faligndata %f18, %f22, %f26 | |
474 | fmovdle %fcc3, %f8, %f6 | |
475 | nop | |
476 | fitod %f2, %f8 | |
477 | fdtoi %f8, %f0 | |
478 | movrne %l4, %o3, %l1 | |
479 | rdhpr %htba, %g1 | |
480 | nop | |
481 | set 0x28, %o4 | |
482 | stx %fsr, [%l7 + %o4] | |
483 | stx %fsr, [%l7 + 0x78] | |
484 | nop | |
485 | fitod %f8, %f0 | |
486 | fdtoi %f0, %f3 | |
487 | nop | |
488 | set 0x30, %i7 | |
489 | stx %fsr, [%l7 + %i7] | |
490 | pdist %f0, %f4, %f18 | |
491 | fand %f22, %f8, %f30 | |
492 | nop | |
493 | set 0x20, %i2 | |
494 | stx %fsr, [%l7 + %i2] | |
495 | fone %f24 | |
496 | rd %y, %g4 | |
497 | movgu %xcc, 0x244, %o2 | |
498 | fxnors %f20, %f5, %f8 | |
499 | srlx %g5, 0x0E, %g3 | |
500 | stx %fsr, [%l7 + 0x50] | |
501 | nop | |
502 | set 0x40, %g4 | |
503 | stx %fsr, [%l7 + %g4] | |
504 | fmovdge %xcc, %f4, %f30 | |
505 | nop | |
506 | set 0x40, %o0 | |
507 | stx %fsr, [%l7 + %o0] | |
508 | tsubcc %i6, %l2, %i4 | |
509 | nop | |
510 | setx 0x0198, %l0, %o7 | |
511 | sdivx %g6, %o7, %i2 | |
512 | fornot1s %f4, %f28, %f28 | |
513 | nop | |
514 | setx loop_16, %l0, %l1 | |
515 | wrpr 0x1, %tl | |
516 | wrpr %l1, %tpc | |
517 | add %l1, 0x4, %l1 | |
518 | wrpr %l1, %tnpc | |
519 | setx 0x004400001404, %l0, %l1 | |
520 | wrpr %l1, %tstate | |
521 | wrhpr 0x4, %htstate | |
522 | retry | |
523 | fmovdue %fcc0, %f26, %f30 | |
524 | fmovsl %fcc3, %f14, %f17 | |
525 | stx %fsr, [%l7 + 0x28] | |
526 | loop_16: | |
527 | stx %fsr, [%l7 + 0x58] | |
528 | nop | |
529 | fitos %f5, %f27 | |
530 | fstod %f27, %f24 | |
531 | edge8n %g7, %i0, %o5 | |
532 | EXIT_GOOD | |
533 | ||
534 | ||
535 | ||
536 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
537 | ! | |
538 | ! Stats for Thread 0: | |
539 | ! | |
540 | ! Type l : 49 | |
541 | ! Type a : 17 | |
542 | ! Type x : 4 | |
543 | ! Type cti : 16 | |
544 | ! Type f : 62 | |
545 | ! Type i : 52 | |
546 | ! | |
547 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
548 | ||
549 | ! | |
550 | ! Thread 1 Start | |
551 | ! | |
552 | main_t1: | |
553 | mov %l7, %g1 | |
554 | !# Set %cwp for 8 windows | |
555 | !# This threads memory space into each %l7 | |
556 | wrpr %g0, 0x7, %cwp | |
557 | mov %g1, %l7 | |
558 | wrpr %g0, 0x6, %cwp | |
559 | mov %g1, %l7 | |
560 | wrpr %g0, 0x5, %cwp | |
561 | mov %g1, %l7 | |
562 | wrpr %g0, 0x4, %cwp | |
563 | mov %g1, %l7 | |
564 | wrpr %g0, 0x3, %cwp | |
565 | mov %g1, %l7 | |
566 | wrpr %g0, 0x2, %cwp | |
567 | mov %g1, %l7 | |
568 | wrpr %g0, 0x1, %cwp | |
569 | mov %g1, %l7 | |
570 | wrpr %g0, 0x0, %cwp | |
571 | mov %g1, %l7 | |
572 | ||
573 | !# Set %fsr | |
574 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
575 | stx %l6, [%l7 + 0x0] !# no post process | |
576 | ldx [%l7 + 0x0], %fsr !# no post process | |
577 | ||
578 | !# Initialize registers .. | |
579 | ||
580 | !# Global registers | |
581 | set 0x9, %g1 | |
582 | set 0x7, %g2 | |
583 | set 0x2, %g3 | |
584 | set 0x9, %g4 | |
585 | set 0x3, %g5 | |
586 | set 0xC, %g6 | |
587 | set 0x9, %g7 | |
588 | !# Input registers | |
589 | set -0x1, %i0 | |
590 | set -0x3, %i1 | |
591 | set -0x1, %i2 | |
592 | set -0x0, %i3 | |
593 | set -0xF, %i4 | |
594 | set -0x7, %i5 | |
595 | set -0x7, %i6 | |
596 | set -0x6, %i7 | |
597 | !# Local registers | |
598 | set 0x7F46F6FB, %l0 | |
599 | set 0x62B750F9, %l1 | |
600 | set 0x76588A0C, %l2 | |
601 | set 0x0126A0FB, %l3 | |
602 | set 0x7B23A0CD, %l4 | |
603 | set 0x6014B0D5, %l5 | |
604 | set 0x28D6F064, %l6 | |
605 | !# Output registers | |
606 | set -0x1790, %o0 | |
607 | set 0x1FB3, %o1 | |
608 | set -0x1F12, %o2 | |
609 | set -0x1E92, %o3 | |
610 | set -0x1726, %o4 | |
611 | set -0x1847, %o5 | |
612 | set 0x1FBC, %o6 | |
613 | set 0x18D4, %o7 | |
614 | !# Float registers | |
615 | INIT_TH_FP_REG(%l7,%f0,0x5CDEBE004C9316D6) | |
616 | INIT_TH_FP_REG(%l7,%f2,0x5AF70778F0C4B088) | |
617 | INIT_TH_FP_REG(%l7,%f4,0x8D7526625EC515A4) | |
618 | INIT_TH_FP_REG(%l7,%f6,0xE02F1C846E8760CC) | |
619 | INIT_TH_FP_REG(%l7,%f8,0x0321EB208EE2B95B) | |
620 | INIT_TH_FP_REG(%l7,%f10,0x2389D1100A6649F3) | |
621 | INIT_TH_FP_REG(%l7,%f12,0x67131F7252CC89E3) | |
622 | INIT_TH_FP_REG(%l7,%f14,0xE9E42F7A627F9BF1) | |
623 | INIT_TH_FP_REG(%l7,%f16,0x768EE71D99271671) | |
624 | INIT_TH_FP_REG(%l7,%f18,0x7E12787768E2C912) | |
625 | INIT_TH_FP_REG(%l7,%f20,0x308AE9F847B82508) | |
626 | INIT_TH_FP_REG(%l7,%f22,0x4821D99235B5284B) | |
627 | INIT_TH_FP_REG(%l7,%f24,0xE1625C0F20759DEE) | |
628 | INIT_TH_FP_REG(%l7,%f26,0x376BF26EBED9E858) | |
629 | INIT_TH_FP_REG(%l7,%f28,0x3F3211F11C669311) | |
630 | INIT_TH_FP_REG(%l7,%f30,0xEE9DF5D905EBEBD1) | |
631 | ||
632 | !# Execute Main Diag .. | |
633 | ||
634 | nop | |
635 | set 0x70, %i3 | |
636 | stx %fsr, [%l7 + %i3] | |
637 | stw %o4, [%l7 + 0x64] | |
638 | mulx %i1, 0x07BD, %g2 | |
639 | movcs %xcc, %l5, %i7 | |
640 | set 0x52, %l6 | |
641 | stha %o1, [%l7 + %l6] 0x23 | |
642 | membar #Sync | |
643 | wr %o6, 0x05B0, %pic | |
644 | fmovsule %fcc2, %f1, %f8 | |
645 | xnorcc %i3, 0x03A8, %o0 | |
646 | tg %icc, 0x1 | |
647 | nop | |
648 | set 0x58, %l3 | |
649 | stx %fsr, [%l7 + %l3] | |
650 | fmul8x16au %f4, %f20, %f24 | |
651 | fbg %fcc2, loop_17 | |
652 | movvc %xcc, 0x500, %i5 | |
653 | fmovsneg %icc, %f28, %f27 | |
654 | subcc %l0, %l6, %l3 | |
655 | loop_17: | |
656 | fmovsneg %icc, %f1, %f12 | |
657 | stx %fsr, [%l7 + 0x70] | |
658 | fmul8x16au %f6, %f30, %f28 | |
659 | nop | |
660 | set 0x68, %l1 | |
661 | stx %fsr, [%l7 + %l1] | |
662 | fmovrsgz %l4, %f23, %f15 | |
663 | stx %fsr, [%l7 + 0x30] | |
664 | movcc %xcc, %l1, %g1 | |
665 | edge16n %o3, %o2, %g4 | |
666 | bge %xcc, loop_18 | |
667 | stx %fsr, [%l7 + 0x28] | |
668 | fpadd32s %f13, %f26, %f13 | |
669 | bge %xcc, loop_19 | |
670 | loop_18: | |
671 | fxnors %f17, %f11, %f4 | |
672 | stx %fsr, [%l7 + 0x50] | |
673 | fmovsg %fcc0, %f4, %f4 | |
674 | loop_19: | |
675 | array16 %g5, %i6, %g3 | |
676 | nop | |
677 | set 0x78, %o1 | |
678 | stx %fsr, [%l7 + %o1] | |
679 | nop | |
680 | set 0x58, %l4 | |
681 | stx %fsr, [%l7 + %l4] | |
682 | nop | |
683 | set 0x47, %o6 | |
684 | ldsb [%l7 + %o6], %l2 | |
685 | wr %g0, 0x88, %asi | |
686 | ldsha [%l7 + 0x42] %asi, %g6 | |
687 | sra %o7, %i2, %i4 | |
688 | fxor %f18, %f22, %f10 | |
689 | movcs %icc, 0x5FF, %g7 | |
690 | stx %fsr, [%l7 + 0x50] | |
691 | taddcctv %i0, %o4, %o5 | |
692 | fmovs %f5, %f25 | |
693 | nop | |
694 | set 0x08, %g3 | |
695 | stx %fsr, [%l7 + %g3] | |
696 | movpos %xcc, %i1, %g2 | |
697 | taddcc %l5, %i7, %o6 | |
698 | movneg %xcc, 0x0A9, %i3 | |
699 | fnand %f26, %f20, %f24 | |
700 | movvc %xcc, %o1, %i5 | |
701 | fmovdneg %xcc, %f8, %f10 | |
702 | nop | |
703 | set 0x50, %l0 | |
704 | stx %fsr, [%l7 + %l0] | |
705 | tsubcctv %o0, %l6, %l3 | |
706 | nop | |
707 | fitos %f11, %f10 | |
708 | nop | |
709 | set 0x40, %o2 | |
710 | stx %fsr, [%l7 + %o2] | |
711 | add %l7, 0x1C, %l6 | |
712 | wr %g0, 0x88, %asi | |
713 | casa [%l6] 0x88, %l4, %l0 | |
714 | fmovsue %fcc0, %f11, %f27 | |
715 | fmovdcc %xcc, %f8, %f10 | |
716 | st %fsr, [%l7 + 0x34] | |
717 | alignaddr %g1, %l1, %o2 | |
718 | fblg,pt %fcc1, loop_20 | |
719 | nop | |
720 | set 0x20, %i0 | |
721 | stx %fsr, [%l7 + %i0] | |
722 | nop | |
723 | setx loop_21, %l0, %l1 | |
724 | jmpl %l1, %g4 | |
725 | wr %o3, %i6, %set_softint | |
726 | loop_20: | |
727 | fcmpne32 %f30, %f28, %g5 | |
728 | nop | |
729 | set 0x68, %i6 | |
730 | stx %fsr, [%l7 + %i6] | |
731 | loop_21: | |
732 | movre %l2, 0x1BC, %g3 | |
733 | fmovsneg %xcc, %f20, %f31 | |
734 | fxors %f21, %f29, %f0 | |
735 | rd %sys_tick_cmpr, %o7 | |
736 | mulx %g6, %i2, %i4 | |
737 | add %l7, 0x50, %l6 | |
738 | wr %g0, 0x0c, %asi | |
739 | lda [%l6] %asi, %g7 | |
740 | casa [%l6] %asi, %g7, %o4 | |
741 | ||
742 | or %g0, 0x8, %l0 | |
743 | sllx %l0, 0x3c, %l0 | |
744 | wrhpr %l0, %g0, %hsys_tick_cmpr | |
745 | fnot1 %f26, %f0 | |
746 | bleu,a,pt %icc, loop_22 | |
747 | fmovrslez %g2, %f8, %f16 | |
748 | fmovdule %fcc3, %f30, %f0 | |
749 | stx %fsr, [%l7 + 0x50] | |
750 | loop_22: | |
751 | nop | |
752 | set 0x20, %o3 | |
753 | stx %fsr, [%l7 + %o3] | |
754 | nop | |
755 | set 0x38, %g2 | |
756 | ldd [%l7 + %g2], %i0 | |
757 | bleu,a,pt %xcc, loop_23 | |
758 | movrne %i7, 0x1B9, %l5 | |
759 | fmovdn %fcc2, %f10, %f16 | |
760 | pdist %f16, %f12, %f20 | |
761 | loop_23: | |
762 | nop | |
763 | setx 0x434C2936, %l0, %l6 | |
764 | st %l6, [%l7 + 0x28] | |
765 | ld [%l7 + 0x28], %f23 | |
766 | setx 0x5A93855D, %l1, %l5 | |
767 | st %l5, [%l7 + 0x10] | |
768 | ld [%l7 + 0x10], %f16 | |
769 | fmuls %f16, %f23, %f4 | |
770 | fmovdl %xcc, %f22, %f24 | |
771 | fmovrdlez %i3, %f0, %f30 | |
772 | fmovdneg %xcc, %f22, %f8 | |
773 | fmovsgu %xcc, %f0, %f2 | |
774 | stx %fsr, [%l7 + 0x78] | |
775 | bcc,a,pn %icc, loop_24 | |
776 | fmovse %icc, %f5, %f19 | |
777 | stx %fsr, [%l7 + 0x50] | |
778 | rd %tick_cmpr, %o1 | |
779 | loop_24: | |
780 | bne,pn %icc, loop_25 | |
781 | nop | |
782 | set 0x78, %l5 | |
783 | stx %fsr, [%l7 + %l5] | |
784 | stx %fsr, [%l7 + 0x28] | |
785 | fmovsgu %xcc, %f13, %f31 | |
786 | loop_25: | |
787 | subc %o6, %o0, %l6 | |
788 | wrpr %g0, 0x3, %gl | |
789 | membar 0x3E | |
790 | brgez,pn %l0, loop_26 | |
791 | array16 %l4, %g1, %l1 | |
792 | saved | |
793 | rdpr %cwp, %g1 | |
794 | rdpr %cansave, %g2 | |
795 | rdpr %canrestore, %g3 | |
796 | rdpr %cleanwin, %g4 | |
797 | rdpr %otherwin, %g5 | |
798 | rdpr %wstate, %g6 | |
799 | array32 %o2, %g4, %o3 | |
800 | loop_26: | |
801 | nop | |
802 | set 0x78, %l2 | |
803 | stx %fsr, [%l7 + %l2] | |
804 | movl %icc, %i6, %l2 | |
805 | tvs %icc, 0x2 | |
806 | stx %fsr, [%l7 + 0x38] | |
807 | movge %xcc, 0x5A3, %g3 | |
808 | fpsub32 %f14, %f18, %f24 | |
809 | fcmpd %fcc2, %f14, %f0 | |
810 | tcc %xcc, 0x1 | |
811 | nop | |
812 | set 0x18, %i4 | |
813 | stx %fsr, [%l7 + %i4] | |
814 | sir 0x1449 | |
815 | rd %y, %g5 | |
816 | nop | |
817 | set 0x50, %g1 | |
818 | stx %fsr, [%l7 + %g1] | |
819 | fcmple16 %f14, %f12, %o7 | |
820 | fcmpeq32 %f10, %f2, %g6 | |
821 | nop | |
822 | setx 0xC878E0898DCC43C9, %l0, %l6 | |
823 | stx %l6, [%l7 + 0x28] | |
824 | ldd [%l7 + 0x28], %f14 | |
825 | setx 0xFCE62E2BD6961C96, %l1, %l5 | |
826 | stx %l5, [%l7 + 0x10] | |
827 | ldd [%l7 + 0x10], %f30 | |
828 | faddd %f30, %f14, %f0 | |
829 | movg %fcc3, 0x367, %i4 | |
830 | stx %fsr, [%l7 + 0x10] | |
831 | stx %fsr, [%l7 + 0x50] | |
832 | wrpr %i2, %g7, %cwp | |
833 | wrpr %o4, 0x1BB3, %tick | |
834 | nop | |
835 | set 0x38, %g6 | |
836 | stx %fsr, [%l7 + %g6] | |
837 | movrlz %i1, 0x0C1, %g2 | |
838 | stx %fsr, [%l7 + 0x18] | |
839 | edge8 %i0, %o5, %i7 | |
840 | stx %fsr, [%l7 + 0x18] | |
841 | stx %fsr, [%l7 + 0x28] | |
842 | fornot1 %f28, %f4, %f16 | |
843 | nop | |
844 | set 0x30, %i1 | |
845 | stx %fsr, [%l7 + %i1] | |
846 | stx %fsr, [%l7 + 0x30] | |
847 | fcmple16 %f0, %f4, %i3 | |
848 | movcc %icc, 0x3EA, %l5 | |
849 | edge8n %o1, %o0, %l6 | |
850 | movneg %xcc, 0x6C4, %o6 | |
851 | orcc %l3, %l0, %l4 | |
852 | nop | |
853 | set 0x10, %i5 | |
854 | stx %fsr, [%l7 + %i5] | |
855 | stx %fsr, [%l7 + 0x28] | |
856 | bg,a,pt %xcc, loop_27 | |
857 | movvc %xcc, %i5, %g1 | |
858 | alignaddr %l1, %o2, %o3 | |
859 | tvc %icc, 0x4 | |
860 | loop_27: | |
861 | bgu %xcc, loop_28 | |
862 | movg %fcc1, %g4, %i6 | |
863 | subcc %g3, %g5, %l2 | |
864 | nop | |
865 | setx 0xD88BF5C83B209EEC, %l0, %l6 | |
866 | stx %l6, [%l7 + 0x28] | |
867 | ldd [%l7 + 0x28], %f0 | |
868 | fsqrtd %f0, %f8 | |
869 | loop_28: | |
870 | rd %tick_cmpr, %g6 | |
871 | fmovdvc %icc, %f28, %f2 | |
872 | fone %f16 | |
873 | nop | |
874 | set 0x58, %o7 | |
875 | stx %fsr, [%l7 + %o7] | |
876 | bge,a,pn %icc, loop_29 | |
877 | fnot1s %f4, %f0 | |
878 | sll %o7, %i2, %g7 | |
879 | stx %fsr, [%l7 + 0x30] | |
880 | loop_29: | |
881 | wr %i4, 0x00DB, %sys_tick | |
882 | nop | |
883 | set 0x3E, %g5 | |
884 | lduh [%l7 + %g5], %i1 | |
885 | movgu %xcc, 0x3CC, %g2 | |
886 | nop | |
887 | set 0x68, %g7 | |
888 | stx %fsr, [%l7 + %g7] | |
889 | wr %g0, 0x04, %asi | |
890 | lduwa [%l7 + 0x5C] %asi, %o4 | |
891 | fba %fcc1, loop_30 | |
892 | fmovrse %i0, %f1, %f27 | |
893 | add %l7, 0x50, %l6 | |
894 | wr %g0, 0x11, %asi | |
895 | casa [%l6] 0x11, %i7, %i3 | |
896 | loop_30: | |
897 | stx %fsr, [%l7 + 0x58] | |
898 | nop | |
899 | fitod %f2, %f6 | |
900 | fdtox %f6, %f2 | |
901 | fxtod %f2, %f26 | |
902 | movrne %o5, %l5, %o0 | |
903 | stx %fsr, [%l7 + 0x08] | |
904 | edge16l %o1, %o6, %l6 | |
905 | stx %fsr, [%l7 + 0x20] | |
906 | fmovrdgz %l3, %f30, %f4 | |
907 | flushw | |
908 | fmovrse %l0, %f24, %f0 | |
909 | fmovscc %xcc, %f17, %f29 | |
910 | nop | |
911 | setx 0xEBB10800F0384EE0, %l0, %l6 | |
912 | stx %l6, [%l7 + 0x10] | |
913 | ldx [%l7 + 0x10], %fsr | |
914 | nop | |
915 | set 0x08, %o5 | |
916 | stx %fsr, [%l7 + %o5] | |
917 | movo %fcc3, %i5, %l4 | |
918 | add %l1, %g1, %o3 | |
919 | nop | |
920 | fitos %f5, %f15 | |
921 | fstox %f15, %f16 | |
922 | movne %xcc, 0x4F2, %g4 | |
923 | fmuld8ulx16 %f30, %f1, %f28 | |
924 | nop | |
925 | set 0x58, %i7 | |
926 | stx %fsr, [%l7 + %i7] | |
927 | fmovrse %i6, %f18, %f4 | |
928 | ldsb [%l7 + 0x4D], %o2 | |
929 | andcc %g3, 0x0911, %g5 | |
930 | nop | |
931 | fitos %f13, %f23 | |
932 | fstox %f23, %f26 | |
933 | stx %fsr, [%l7 + 0x20] | |
934 | fpadd16s %f20, %f17, %f23 | |
935 | stx %fsr, [%l7 + 0x58] | |
936 | movrlez %g6, 0x0D2, %l2 | |
937 | fpackfix %f20, %f29 | |
938 | stx %fsr, [%l7 + 0x10] | |
939 | movo %fcc1, 0x58A, %i2 | |
940 | subcc %g7, %i4, %i1 | |
941 | stx %fsr, [%l7 + 0x68] | |
942 | andcc %g2, 0x0223, %o4 | |
943 | EXIT_GOOD | |
944 | ||
945 | ||
946 | ||
947 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
948 | ! | |
949 | ! Stats for Thread 1: | |
950 | ! | |
951 | ! Type l : 60 | |
952 | ! Type a : 11 | |
953 | ! Type cti : 14 | |
954 | ! Type x : 6 | |
955 | ! Type f : 53 | |
956 | ! Type i : 56 | |
957 | ! | |
958 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
959 | ||
960 | ! | |
961 | ! Thread 2 Start | |
962 | ! | |
963 | main_t2: | |
964 | mov %l7, %g1 | |
965 | !# Set %cwp for 8 windows | |
966 | !# This threads memory space into each %l7 | |
967 | wrpr %g0, 0x7, %cwp | |
968 | mov %g1, %l7 | |
969 | wrpr %g0, 0x6, %cwp | |
970 | mov %g1, %l7 | |
971 | wrpr %g0, 0x5, %cwp | |
972 | mov %g1, %l7 | |
973 | wrpr %g0, 0x4, %cwp | |
974 | mov %g1, %l7 | |
975 | wrpr %g0, 0x3, %cwp | |
976 | mov %g1, %l7 | |
977 | wrpr %g0, 0x2, %cwp | |
978 | mov %g1, %l7 | |
979 | wrpr %g0, 0x1, %cwp | |
980 | mov %g1, %l7 | |
981 | wrpr %g0, 0x0, %cwp | |
982 | mov %g1, %l7 | |
983 | ||
984 | !# Set %fsr | |
985 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
986 | stx %l6, [%l7 + 0x0] !# no post process | |
987 | ldx [%l7 + 0x0], %fsr !# no post process | |
988 | ||
989 | !# Initialize registers .. | |
990 | ||
991 | !# Global registers | |
992 | set 0xF, %g1 | |
993 | set 0xA, %g2 | |
994 | set 0x4, %g3 | |
995 | set 0xC, %g4 | |
996 | set 0xB, %g5 | |
997 | set 0xC, %g6 | |
998 | set 0xB, %g7 | |
999 | !# Input registers | |
1000 | set -0x0, %i0 | |
1001 | set -0x8, %i1 | |
1002 | set -0x4, %i2 | |
1003 | set -0xA, %i3 | |
1004 | set -0x9, %i4 | |
1005 | set -0x2, %i5 | |
1006 | set -0x2, %i6 | |
1007 | set -0x7, %i7 | |
1008 | !# Local registers | |
1009 | set 0x0F2978F3, %l0 | |
1010 | set 0x04C42D3B, %l1 | |
1011 | set 0x1C751CE8, %l2 | |
1012 | set 0x40B227FD, %l3 | |
1013 | set 0x3A3FB002, %l4 | |
1014 | set 0x778A0471, %l5 | |
1015 | set 0x7DF096D6, %l6 | |
1016 | !# Output registers | |
1017 | set 0x183C, %o0 | |
1018 | set 0x0477, %o1 | |
1019 | set -0x13D6, %o2 | |
1020 | set -0x00C1, %o3 | |
1021 | set 0x1B01, %o4 | |
1022 | set -0x1C7A, %o5 | |
1023 | set 0x198D, %o6 | |
1024 | set -0x0E78, %o7 | |
1025 | !# Float registers | |
1026 | INIT_TH_FP_REG(%l7,%f0,0x5CDEBE004C9316D6) | |
1027 | INIT_TH_FP_REG(%l7,%f2,0x5AF70778F0C4B088) | |
1028 | INIT_TH_FP_REG(%l7,%f4,0x8D7526625EC515A4) | |
1029 | INIT_TH_FP_REG(%l7,%f6,0xE02F1C846E8760CC) | |
1030 | INIT_TH_FP_REG(%l7,%f8,0x0321EB208EE2B95B) | |
1031 | INIT_TH_FP_REG(%l7,%f10,0x2389D1100A6649F3) | |
1032 | INIT_TH_FP_REG(%l7,%f12,0x67131F7252CC89E3) | |
1033 | INIT_TH_FP_REG(%l7,%f14,0xE9E42F7A627F9BF1) | |
1034 | INIT_TH_FP_REG(%l7,%f16,0x768EE71D99271671) | |
1035 | INIT_TH_FP_REG(%l7,%f18,0x7E12787768E2C912) | |
1036 | INIT_TH_FP_REG(%l7,%f20,0x308AE9F847B82508) | |
1037 | INIT_TH_FP_REG(%l7,%f22,0x4821D99235B5284B) | |
1038 | INIT_TH_FP_REG(%l7,%f24,0xE1625C0F20759DEE) | |
1039 | INIT_TH_FP_REG(%l7,%f26,0x376BF26EBED9E858) | |
1040 | INIT_TH_FP_REG(%l7,%f28,0x3F3211F11C669311) | |
1041 | INIT_TH_FP_REG(%l7,%f30,0xEE9DF5D905EBEBD1) | |
1042 | ||
1043 | !# Execute Main Diag .. | |
1044 | ||
1045 | stx %fsr, [%l7 + 0x68] | |
1046 | ldub [%l7 + 0x29], %i0 | |
1047 | fble,pn %fcc3, loop_31 | |
1048 | andcc %i7, 0x060F, %i3 | |
1049 | edge32 %o5, %l5, %o7 | |
1050 | stx %fsr, [%l7 + 0x70] | |
1051 | loop_31: | |
1052 | fmovsvs %icc, %f10, %f11 | |
1053 | tvc %icc, 0x5 | |
1054 | sllx %o1, %o0, %o6 | |
1055 | stx %fsr, [%l7 + 0x18] | |
1056 | nop | |
1057 | set 0x10, %i2 | |
1058 | stx %fsr, [%l7 + %i2] | |
1059 | stx %fsr, [%l7 + 0x50] | |
1060 | nop | |
1061 | setx 0xF4437BDB, %l0, %l6 | |
1062 | st %l6, [%l7 + 0x28] | |
1063 | ld [%l7 + 0x28], %f25 | |
1064 | fsqrts %f25, %f29 | |
1065 | fmovrdlez %l3, %f6, %f6 | |
1066 | nop | |
1067 | set 0x60, %o4 | |
1068 | stx %fsr, [%l7 + %o4] | |
1069 | fpack16 %f18, %f7 | |
1070 | nop | |
1071 | set 0x60, %g4 | |
1072 | stx %fsr, [%l7 + %g4] | |
1073 | nop | |
1074 | set 0x58, %i3 | |
1075 | stx %fsr, [%l7 + %i3] | |
1076 | taddcctv %l6, %l0, %l4 | |
1077 | fmovrsne %i5, %f5, %f28 | |
1078 | fmovsule %fcc2, %f10, %f24 | |
1079 | faligndata %f10, %f20, %f16 | |
1080 | edge8n %l1, %o3, %g4 | |
1081 | fones %f19 | |
1082 | tsubcctv %i6, %g1, %g3 | |
1083 | subcc %g5, 0x1F29, %o2 | |
1084 | smul %l2, %i2, %g6 | |
1085 | nop | |
1086 | setx 0x736D74D2EA2D6D26, %l0, %l6 | |
1087 | stx %l6, [%l7 + 0x28] | |
1088 | ldd [%l7 + 0x28], %f28 | |
1089 | setx 0x4749FDB9E3AC2725, %l1, %l5 | |
1090 | stx %l5, [%l7 + 0x10] | |
1091 | ldd [%l7 + 0x10], %f22 | |
1092 | fsubd %f22, %f28, %f22 | |
1093 | wr %g0, 0x11, %asi | |
1094 | prefetcha [%l7 + 0x78] %asi, 1 | |
1095 | movuge %fcc0, 0x0B7, %g7 | |
1096 | fmuld8ulx16 %f14, %f18, %f0 | |
1097 | wrpr %i1, 0x0877, %pil | |
1098 | taddcc %g2, 0x0DAB, %o4 | |
1099 | nop | |
1100 | set 0x28, %o0 | |
1101 | stx %i0, [%l7 + %o0] | |
1102 | addc %i3, 0x13F0, %o5 | |
1103 | nop | |
1104 | set 0x60, %l3 | |
1105 | stx %fsr, [%l7 + %l3] | |
1106 | bgu,a,pn %xcc, loop_32 | |
1107 | fmovdn %fcc3, %f30, %f22 | |
1108 | fmovsu %fcc3, %f7, %f13 | |
1109 | te %icc, 0x7 | |
1110 | loop_32: | |
1111 | fmovrslez %l5, %f6, %f8 | |
1112 | fzeros %f14 | |
1113 | smul %o7, 0x1F4C, %i7 | |
1114 | tvc %icc, 0x2 | |
1115 | nop | |
1116 | set 0x3C, %l1 | |
1117 | ldsw [%l7 + %l1], %o1 | |
1118 | sll %o6, 0x0F, %o0 | |
1119 | movue %fcc0, %l3, %l0 | |
1120 | stx %fsr, [%l7 + 0x48] | |
1121 | wr %g0, 0x10, %asi | |
1122 | lduwa [%l7 + 0x2C] %asi, %l6 | |
1123 | set 0x4A, %o1 | |
1124 | stha %l4, [%l7 + %o1] 0x2a | |
1125 | membar #Sync | |
1126 | tleu %xcc, 0x0 | |
1127 | stx %fsr, [%l7 + 0x70] | |
1128 | bleu,pn %icc, loop_33 | |
1129 | nop | |
1130 | set 0x40, %l4 | |
1131 | stx %fsr, [%l7 + %l4] | |
1132 | stx %fsr, [%l7 + 0x60] | |
1133 | movrgez %l1, 0x388, %i5 | |
1134 | loop_33: | |
1135 | stx %fsr, [%l7 + 0x30] | |
1136 | fmovsvs %icc, %f17, %f4 | |
1137 | nop | |
1138 | set 0x48, %o6 | |
1139 | stx %fsr, [%l7 + %o6] | |
1140 | stx %fsr, [%l7 + 0x58] | |
1141 | set 0x40, %l6 | |
1142 | ldda [%l7 + %l6] 0x81, %f0 | |
1143 | nop | |
1144 | set 0x60, %g3 | |
1145 | stx %fsr, [%l7 + %g3] | |
1146 | fmovdo %fcc3, %f24, %f6 | |
1147 | stx %fsr, [%l7 + 0x68] | |
1148 | fcmple32 %f0, %f30, %o3 | |
1149 | edge32l %i6, %g4, %g1 | |
1150 | nop | |
1151 | setx 0x2D6B2756, %l0, %l6 | |
1152 | st %l6, [%l7 + 0x44] | |
1153 | ld [%l7 + 0x44], %fsr | |
1154 | fmovdule %fcc3, %f30, %f26 | |
1155 | ta %xcc, 0x7 | |
1156 | fmovrsne %g3, %f5, %f6 | |
1157 | nop | |
1158 | set 0x60, %o2 | |
1159 | stx %fsr, [%l7 + %o2] | |
1160 | rdpr %wstate, %o2 | |
1161 | nop | |
1162 | set 0x38, %l0 | |
1163 | stx %fsr, [%l7 + %l0] | |
1164 | wr %g5, %i2, %softint | |
1165 | stx %fsr, [%l7 + 0x08] | |
1166 | nop | |
1167 | fitod %f4, %f20 | |
1168 | fdtos %f20, %f7 | |
1169 | fmovrdgz %g6, %f14, %f14 | |
1170 | nop | |
1171 | set 0x78, %i6 | |
1172 | stx %fsr, [%l7 + %i6] | |
1173 | udivcc %i4, 0x1845, %l2 | |
1174 | wrpr %g7, 0x066B, %pil | |
1175 | nop | |
1176 | setx loop_34, %l0, %l1 | |
1177 | wrpr 0x1, %tl | |
1178 | wrpr %l1, %tnpc | |
1179 | setx 0x024400001402, %l0, %l1 | |
1180 | wrpr %l1, %tstate | |
1181 | wrhpr 0x4, %htstate | |
1182 | rdpr %tt, %l1 | |
1183 | wrpr %g0, %l1, %tt | |
1184 | rdpr %pstate, %l1 | |
1185 | wrpr %g0, %l1, %pstate | |
1186 | rdpr %tl, %l1 | |
1187 | wrpr %g0, %l1, %tl | |
1188 | rdpr %tpc, %l1 | |
1189 | wrpr %g0, %l1, %tpc | |
1190 | rdpr %tnpc, %l1 | |
1191 | wrpr %g0, %l1, %tnpc | |
1192 | rdpr %tstate, %l1 | |
1193 | wrpr %g0, %l1, %tstate | |
1194 | rdpr %tba, %l1 | |
1195 | wrpr %g0, %l1, %tba | |
1196 | rdpr %tba, %l1 | |
1197 | wrpr %g0, %l1, %tba | |
1198 | rdhpr %hpstate, %l1 | |
1199 | wrhpr %g0, %l1, %hpstate | |
1200 | rdhpr %htstate, %l1 | |
1201 | wrhpr %g0, %l1, %htstate | |
1202 | rdhpr %hintp, %l1 | |
1203 | wrhpr %g0, %l1, %hintp | |
1204 | done | |
1205 | fmovsgu %icc, %f28, %f26 | |
1206 | nop | |
1207 | set 0x30, %o3 | |
1208 | stx %fsr, [%l7 + %o3] | |
1209 | stx %fsr, [%l7 + 0x68] | |
1210 | loop_34: | |
1211 | fpadd16 %f20, %f4, %f30 | |
1212 | nop | |
1213 | set 0x20, %i0 | |
1214 | stx %fsr, [%l7 + %i0] | |
1215 | nop | |
1216 | set 0x4F, %g2 | |
1217 | ldsb [%l7 + %g2], %g2 | |
1218 | nop | |
1219 | set 0x2E, %l2 | |
1220 | lduh [%l7 + %l2], %i1 | |
1221 | fmovs %f0, %f6 | |
1222 | stx %fsr, [%l7 + 0x40] | |
1223 | stx %fsr, [%l7 + 0x58] | |
1224 | fmovslg %fcc2, %f12, %f20 | |
1225 | membar 0x7E | |
1226 | nop | |
1227 | setx 0x0E0137C7134099E0, %l0, %l6 | |
1228 | stx %l6, [%l7 + 0x28] | |
1229 | ldd [%l7 + 0x28], %f4 | |
1230 | setx 0x7121AA3A62FA7665, %l1, %l5 | |
1231 | stx %l5, [%l7 + 0x10] | |
1232 | ldd [%l7 + 0x10], %f16 | |
1233 | fdivd %f16, %f4, %f2 | |
1234 | fmovsn %xcc, %f27, %f5 | |
1235 | movrgez %i0, %i3, %o4 | |
1236 | rdhpr %hsys_tick_cmpr, %o5 | |
1237 | nop | |
1238 | setx 0x78C6241469C311C6, %l0, %l6 | |
1239 | stx %l6, [%l7 + 0x28] | |
1240 | ldd [%l7 + 0x28], %f0 | |
1241 | setx 0x5855B8B51EAA5758, %l1, %l5 | |
1242 | stx %l5, [%l7 + 0x10] | |
1243 | ldd [%l7 + 0x10], %f10 | |
1244 | fmuld %f10, %f0, %f22 | |
1245 | ta %icc, 0x2 | |
1246 | nop | |
1247 | set 0x60, %i4 | |
1248 | stx %fsr, [%l7 + %i4] | |
1249 | fpsub32 %f18, %f22, %f8 | |
1250 | bge,a,pn %icc, loop_35 | |
1251 | fzero %f20 | |
1252 | stx %fsr, [%l7 + 0x18] | |
1253 | movrne %o7, 0x2EF, %i7 | |
1254 | loop_35: | |
1255 | tcs %xcc, 0x3 | |
1256 | nop | |
1257 | setx 0x1E0D, %l0, %o1 | |
1258 | udivx %l5, %o1, %o6 | |
1259 | nop | |
1260 | set 0x60, %g1 | |
1261 | stx %fsr, [%l7 + %g1] | |
1262 | nop | |
1263 | set 0x3A, %g6 | |
1264 | ldstub [%l7 + %g6], %o0 | |
1265 | orncc %l3, %l6, %l0 | |
1266 | nop | |
1267 | set 0x78, %l5 | |
1268 | stx %fsr, [%l7 + %l5] | |
1269 | tvs %xcc, 0x0 | |
1270 | ldx [%l7 + 0x08], %l1 | |
1271 | nop | |
1272 | set 0x58, %i5 | |
1273 | stx %fsr, [%l7 + %i5] | |
1274 | fpadd16s %f30, %f8, %f10 | |
1275 | movn %fcc0, %i5, %l4 | |
1276 | fbe,pn %fcc1, loop_36 | |
1277 | fmovdlg %fcc1, %f24, %f26 | |
1278 | nop | |
1279 | setx 0xF9B9AFF3407EF547, %l0, %l6 | |
1280 | stx %l6, [%l7 + 0x28] | |
1281 | ldd [%l7 + 0x28], %f22 | |
1282 | setx 0x1EF0D84162EC9615, %l1, %l5 | |
1283 | stx %l5, [%l7 + 0x10] | |
1284 | ldd [%l7 + 0x10], %f10 | |
1285 | faddd %f10, %f22, %f8 | |
1286 | set 0x40, %i1 | |
1287 | stda %f0, [%l7 + %i1] 0xcc | |
1288 | loop_36: | |
1289 | nop | |
1290 | setx 0x8C7F36DD4823220F, %l0, %l6 | |
1291 | stx %l6, [%l7 + 0x28] | |
1292 | ldd [%l7 + 0x28], %f8 | |
1293 | setx 0x894A62941D7DDB35, %l1, %l5 | |
1294 | stx %l5, [%l7 + 0x10] | |
1295 | ldd [%l7 + 0x10], %f6 | |
1296 | fdivd %f6, %f8, %f2 | |
1297 | andncc %o3, %i6, %g1 | |
1298 | fpsub16 %f20, %f2, %f8 | |
1299 | nop | |
1300 | set 0x08, %g5 | |
1301 | stx %fsr, [%l7 + %g5] | |
1302 | fpack32 %f20, %f0, %f6 | |
1303 | fone %f26 | |
1304 | fbule,pt %fcc3, loop_37 | |
1305 | bn,pn %icc, loop_38 | |
1306 | sub %g4, %o2, %g5 | |
1307 | nop | |
1308 | set 0x08, %o7 | |
1309 | stx %fsr, [%l7 + %o7] | |
1310 | loop_37: | |
1311 | flushw | |
1312 | loop_38: | |
1313 | nop | |
1314 | setx 0x3D113F5D7A00CD2F, %l0, %l6 | |
1315 | stx %l6, [%l7 + 0x28] | |
1316 | ldd [%l7 + 0x28], %f0 | |
1317 | setx 0xBE157ECC919DD793, %l1, %l5 | |
1318 | stx %l5, [%l7 + 0x10] | |
1319 | ldd [%l7 + 0x10], %f12 | |
1320 | faddd %f12, %f0, %f4 | |
1321 | addcc %g3, 0x1778, %g6 | |
1322 | ld [%l7 + 0x44], %f20 | |
1323 | rdpr %otherwin, %i4 | |
1324 | rdhpr %hsys_tick_cmpr, %i2 | |
1325 | movrne %l2, 0x286, %g2 | |
1326 | fmovrslez %i1, %f30, %f3 | |
1327 | nop | |
1328 | set 0x38, %o5 | |
1329 | stx %fsr, [%l7 + %o5] | |
1330 | or %i0, 0x1065, %g7 | |
1331 | rd %asi, %o4 | |
1332 | stx %fsr, [%l7 + 0x50] | |
1333 | nop | |
1334 | setx 0x88F56BCA, %l0, %l6 | |
1335 | st %l6, [%l7 + 0x28] | |
1336 | ld [%l7 + 0x28], %f13 | |
1337 | setx 0xE2C76047, %l1, %l5 | |
1338 | st %l5, [%l7 + 0x10] | |
1339 | ld [%l7 + 0x10], %f0 | |
1340 | fadds %f0, %f13, %f11 | |
1341 | stx %fsr, [%l7 + 0x08] | |
1342 | movrne %o5, 0x223, %o7 | |
1343 | fmovdne %xcc, %f30, %f2 | |
1344 | tg %icc, 0x6 | |
1345 | fmovdule %fcc3, %f24, %f30 | |
1346 | tge %icc, 0x0 | |
1347 | te %icc, 0x6 | |
1348 | fnors %f21, %f30, %f11 | |
1349 | lduw [%l7 + 0x0C], %i7 | |
1350 | nop | |
1351 | set 0x30, %g7 | |
1352 | stx %fsr, [%l7 + %g7] | |
1353 | orncc %i3, 0x0C29, %l5 | |
1354 | fmovsge %fcc0, %f8, %f1 | |
1355 | membar #Sync | |
1356 | set 0x40, %i2 | |
1357 | ldda [%l7 + %i2] 0xf1, %f16 | |
1358 | fsrc2 %f26, %f10 | |
1359 | fcmps %fcc2, %f7, %f25 | |
1360 | edge32l %o6, %o0, %o1 | |
1361 | umulcc %l3, %l6, %l0 | |
1362 | stx %fsr, [%l7 + 0x30] | |
1363 | fmovdl %fcc1, %f16, %f30 | |
1364 | fmul8ulx16 %f22, %f16, %f6 | |
1365 | fands %f6, %f13, %f9 | |
1366 | fmovdue %fcc1, %f4, %f22 | |
1367 | set 0x2C, %i7 | |
1368 | sta %f7, [%l7 + %i7] 0x80 | |
1369 | fmovsle %icc, %f10, %f17 | |
1370 | nop | |
1371 | set 0x68, %g4 | |
1372 | stx %fsr, [%l7 + %g4] | |
1373 | wrpr %i5, %l1, %tick | |
1374 | mulscc %l4, %i6, %g1 | |
1375 | fcmpes %fcc1, %f30, %f21 | |
1376 | orn %o3, %o2, %g4 | |
1377 | movo %fcc1, %g3, %g5 | |
1378 | nop | |
1379 | fitos %f9, %f31 | |
1380 | fstox %f31, %f16 | |
1381 | sll %g6, 0x0A, %i2 | |
1382 | fmovscs %icc, %f2, %f31 | |
1383 | stx %fsr, [%l7 + 0x78] | |
1384 | fors %f12, %f29, %f17 | |
1385 | nop | |
1386 | fitod %f8, %f6 | |
1387 | fdtos %f6, %f8 | |
1388 | fmovrdlez %i4, %f2, %f20 | |
1389 | fmovscs %xcc, %f29, %f0 | |
1390 | subccc %g2, %l2, %i1 | |
1391 | mulx %g7, 0x0494, %i0 | |
1392 | fmovrdgez %o4, %f22, %f18 | |
1393 | ||
1394 | or %g0, 0x8, %l0 | |
1395 | sllx %l0, 0x3c, %l0 | |
1396 | wrhpr %l0, %g0, %hsys_tick_cmpr | |
1397 | edge16n %o7, %i3, %i7 | |
1398 | ||
1399 | or %g0, 0x8, %l0 | |
1400 | sllx %l0, 0x3c, %l0 | |
1401 | wrhpr %l0, %g0, %hsys_tick_cmpr | |
1402 | rdpr %pil, %o0 | |
1403 | fmovdlg %fcc2, %f30, %f12 | |
1404 | nop | |
1405 | set 0x68, %o4 | |
1406 | stx %fsr, [%l7 + %o4] | |
1407 | fmovdug %fcc2, %f26, %f12 | |
1408 | ||
1409 | or %g0, 0x8, %l0 | |
1410 | sllx %l0, 0x3c, %l0 | |
1411 | wrhpr %l0, %g0, %hsys_tick_cmpr | |
1412 | wrpr %g0, 0x3, %gl | |
1413 | EXIT_GOOD | |
1414 | ||
1415 | ||
1416 | ||
1417 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
1418 | ! | |
1419 | ! Stats for Thread 2: | |
1420 | ! | |
1421 | ! Type l : 59 | |
1422 | ! Type a : 14 | |
1423 | ! Type x : 7 | |
1424 | ! Type cti : 8 | |
1425 | ! Type f : 61 | |
1426 | ! Type i : 51 | |
1427 | ! | |
1428 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
1429 | ||
1430 | ! | |
1431 | ! Thread 3 Start | |
1432 | ! | |
1433 | main_t3: | |
1434 | mov %l7, %g1 | |
1435 | !# Set %cwp for 8 windows | |
1436 | !# This threads memory space into each %l7 | |
1437 | wrpr %g0, 0x7, %cwp | |
1438 | mov %g1, %l7 | |
1439 | wrpr %g0, 0x6, %cwp | |
1440 | mov %g1, %l7 | |
1441 | wrpr %g0, 0x5, %cwp | |
1442 | mov %g1, %l7 | |
1443 | wrpr %g0, 0x4, %cwp | |
1444 | mov %g1, %l7 | |
1445 | wrpr %g0, 0x3, %cwp | |
1446 | mov %g1, %l7 | |
1447 | wrpr %g0, 0x2, %cwp | |
1448 | mov %g1, %l7 | |
1449 | wrpr %g0, 0x1, %cwp | |
1450 | mov %g1, %l7 | |
1451 | wrpr %g0, 0x0, %cwp | |
1452 | mov %g1, %l7 | |
1453 | ||
1454 | !# Set %fsr | |
1455 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
1456 | stx %l6, [%l7 + 0x0] !# no post process | |
1457 | ldx [%l7 + 0x0], %fsr !# no post process | |
1458 | ||
1459 | !# Initialize registers .. | |
1460 | ||
1461 | !# Global registers | |
1462 | set 0xA, %g1 | |
1463 | set 0x5, %g2 | |
1464 | set 0xF, %g3 | |
1465 | set 0x4, %g4 | |
1466 | set 0x3, %g5 | |
1467 | set 0xF, %g6 | |
1468 | set 0x9, %g7 | |
1469 | !# Input registers | |
1470 | set -0x6, %i0 | |
1471 | set -0xA, %i1 | |
1472 | set -0x0, %i2 | |
1473 | set -0xF, %i3 | |
1474 | set -0xB, %i4 | |
1475 | set -0xB, %i5 | |
1476 | set -0xE, %i6 | |
1477 | set -0xB, %i7 | |
1478 | !# Local registers | |
1479 | set 0x29C1DA74, %l0 | |
1480 | set 0x0F2B0339, %l1 | |
1481 | set 0x6CED2356, %l2 | |
1482 | set 0x7ED745F0, %l3 | |
1483 | set 0x7495764C, %l4 | |
1484 | set 0x714ABACD, %l5 | |
1485 | set 0x287AC8C4, %l6 | |
1486 | !# Output registers | |
1487 | set -0x0B61, %o0 | |
1488 | set -0x14CE, %o1 | |
1489 | set 0x1F90, %o2 | |
1490 | set 0x1CBC, %o3 | |
1491 | set -0x1AB6, %o4 | |
1492 | set -0x194C, %o5 | |
1493 | set -0x078D, %o6 | |
1494 | set -0x1A90, %o7 | |
1495 | !# Float registers | |
1496 | INIT_TH_FP_REG(%l7,%f0,0x5CDEBE004C9316D6) | |
1497 | INIT_TH_FP_REG(%l7,%f2,0x5AF70778F0C4B088) | |
1498 | INIT_TH_FP_REG(%l7,%f4,0x8D7526625EC515A4) | |
1499 | INIT_TH_FP_REG(%l7,%f6,0xE02F1C846E8760CC) | |
1500 | INIT_TH_FP_REG(%l7,%f8,0x0321EB208EE2B95B) | |
1501 | INIT_TH_FP_REG(%l7,%f10,0x2389D1100A6649F3) | |
1502 | INIT_TH_FP_REG(%l7,%f12,0x67131F7252CC89E3) | |
1503 | INIT_TH_FP_REG(%l7,%f14,0xE9E42F7A627F9BF1) | |
1504 | INIT_TH_FP_REG(%l7,%f16,0x768EE71D99271671) | |
1505 | INIT_TH_FP_REG(%l7,%f18,0x7E12787768E2C912) | |
1506 | INIT_TH_FP_REG(%l7,%f20,0x308AE9F847B82508) | |
1507 | INIT_TH_FP_REG(%l7,%f22,0x4821D99235B5284B) | |
1508 | INIT_TH_FP_REG(%l7,%f24,0xE1625C0F20759DEE) | |
1509 | INIT_TH_FP_REG(%l7,%f26,0x376BF26EBED9E858) | |
1510 | INIT_TH_FP_REG(%l7,%f28,0x3F3211F11C669311) | |
1511 | INIT_TH_FP_REG(%l7,%f30,0xEE9DF5D905EBEBD1) | |
1512 | ||
1513 | !# Execute Main Diag .. | |
1514 | ||
1515 | fmovdleu %xcc, %f2, %f28 | |
1516 | stx %fsr, [%l7 + 0x50] | |
1517 | wrpr %l6, 0x0B8E, %cwp | |
1518 | fbn %fcc2, loop_39 | |
1519 | addccc %i5, %l1, %l0 | |
1520 | fmovsvs %icc, %f16, %f3 | |
1521 | te %xcc, 0x7 | |
1522 | loop_39: | |
1523 | fmul8x16al %f4, %f12, %f28 | |
1524 | fabss %f18, %f19 | |
1525 | nop | |
1526 | set 0x68, %i3 | |
1527 | stx %fsr, [%l7 + %i3] | |
1528 | nop | |
1529 | set 0x48, %o0 | |
1530 | stx %fsr, [%l7 + %o0] | |
1531 | tcc %icc, 0x5 | |
1532 | edge16l %i6, %l4, %o3 | |
1533 | mulx %g1, %g4, %g3 | |
1534 | wr %g0, 0x19, %asi | |
1535 | ldsba [%l7 + 0x37] %asi, %o2 | |
1536 | fcmps %fcc0, %f30, %f18 | |
1537 | fpmerge %f6, %f10, %f24 | |
1538 | fones %f16 | |
1539 | movpos %icc, 0x6C0, %g6 | |
1540 | alignaddrl %g5, %i4, %i2 | |
1541 | nop | |
1542 | set 0x2C, %l1 | |
1543 | lduh [%l7 + %l1], %l2 | |
1544 | stx %fsr, [%l7 + 0x18] | |
1545 | fandnot1 %f4, %f16, %f24 | |
1546 | movn %icc, %g2, %i1 | |
1547 | movrgez %i0, 0x24E, %g7 | |
1548 | tcc %xcc, 0x2 | |
1549 | nop | |
1550 | setx loop_40, %l0, %l1 | |
1551 | wrpr 0x1, %tl | |
1552 | wrpr %l1, %tnpc | |
1553 | setx 0x034100001400, %l0, %l1 | |
1554 | wrpr %l1, %tstate | |
1555 | wrhpr 0x4, %htstate | |
1556 | rdpr %tt, %l1 | |
1557 | wrpr %g0, %l1, %tt | |
1558 | rdpr %pstate, %l1 | |
1559 | wrpr %g0, %l1, %pstate | |
1560 | rdpr %tl, %l1 | |
1561 | wrpr %g0, %l1, %tl | |
1562 | rdpr %tpc, %l1 | |
1563 | wrpr %g0, %l1, %tpc | |
1564 | rdpr %tnpc, %l1 | |
1565 | wrpr %g0, %l1, %tnpc | |
1566 | rdpr %tstate, %l1 | |
1567 | wrpr %g0, %l1, %tstate | |
1568 | rdpr %tba, %l1 | |
1569 | wrpr %g0, %l1, %tba | |
1570 | rdpr %tba, %l1 | |
1571 | wrpr %g0, %l1, %tba | |
1572 | rdhpr %hpstate, %l1 | |
1573 | wrhpr %g0, %l1, %hpstate | |
1574 | rdhpr %htstate, %l1 | |
1575 | wrhpr %g0, %l1, %htstate | |
1576 | rdhpr %hintp, %l1 | |
1577 | wrhpr %g0, %l1, %hintp | |
1578 | done | |
1579 | brz %o5, loop_41 | |
1580 | nop | |
1581 | set 0x28, %o1 | |
1582 | stx %fsr, [%l7 + %o1] | |
1583 | rd %sys_tick_cmpr, %o7 | |
1584 | loop_40: | |
1585 | fors %f24, %f9, %f23 | |
1586 | loop_41: | |
1587 | nop | |
1588 | set 0x38, %l3 | |
1589 | lduw [%l7 + %l3], %i3 | |
1590 | stx %fsr, [%l7 + 0x30] | |
1591 | array32 %o4, %i7, %o6 | |
1592 | fmuld8ulx16 %f30, %f14, %f10 | |
1593 | fmovsul %fcc1, %f9, %f6 | |
1594 | fsrc2 %f28, %f26 | |
1595 | nop | |
1596 | setx 0x035E, %l0, %o1 | |
1597 | sdivx %o0, %o1, %l3 | |
1598 | nop | |
1599 | set 0x60, %l4 | |
1600 | stx %fsr, [%l7 + %l4] | |
1601 | fors %f31, %f27, %f10 | |
1602 | set 0x6C, %l6 | |
1603 | swapa [%l7 + %l6] 0x80, %l5 | |
1604 | nop | |
1605 | set 0x38, %g3 | |
1606 | stx %fsr, [%l7 + %g3] | |
1607 | edge16l %l6, %i5, %l0 | |
1608 | fmovsul %fcc3, %f7, %f27 | |
1609 | nop | |
1610 | setx 0x0148, %l0, %i6 | |
1611 | udiv %l1, %i6, %o3 | |
1612 | nop | |
1613 | set 0x18, %o2 | |
1614 | stx %fsr, [%l7 + %o2] | |
1615 | nop | |
1616 | set 0x58, %l0 | |
1617 | stx %fsr, [%l7 + %l0] | |
1618 | nop | |
1619 | set 0x20, %o6 | |
1620 | stx %fsr, [%l7 + %o6] | |
1621 | fblg,a,pt %fcc3, loop_42 | |
1622 | fmovrsne %g1, %f29, %f9 | |
1623 | tcs %icc, 0x1 | |
1624 | smulcc %g4, 0x155F, %g3 | |
1625 | loop_42: | |
1626 | nop | |
1627 | fitod %f12, %f28 | |
1628 | fdtos %f28, %f28 | |
1629 | stx %fsr, [%l7 + 0x18] | |
1630 | nop | |
1631 | setx 0xBC9B47A810065044, %l0, %l6 | |
1632 | stx %l6, [%l7 + 0x28] | |
1633 | ldd [%l7 + 0x28], %f30 | |
1634 | setx 0x05736AA2E1DA0DFF, %l1, %l5 | |
1635 | stx %l5, [%l7 + 0x10] | |
1636 | ldd [%l7 + 0x10], %f2 | |
1637 | faddd %f2, %f30, %f18 | |
1638 | fmovsg %xcc, %f5, %f14 | |
1639 | movrlez %l4, %g6, %o2 | |
1640 | tcs %icc, 0x5 | |
1641 | nop | |
1642 | set 0x58, %o3 | |
1643 | stx %fsr, [%l7 + %o3] | |
1644 | nop | |
1645 | set 0x50, %i0 | |
1646 | stx %fsr, [%l7 + %i0] | |
1647 | xnor %i4, %g5, %i2 | |
1648 | fpsub32s %f17, %f14, %f18 | |
1649 | fandnot1 %f0, %f4, %f28 | |
1650 | nop | |
1651 | fitod %f4, %f2 | |
1652 | fdtos %f2, %f14 | |
1653 | wr %g2, %l2, %ccr | |
1654 | tleu %xcc, 0x5 | |
1655 | rd %ccr, %i1 | |
1656 | fmovdlg %fcc2, %f22, %f14 | |
1657 | fmovsleu %xcc, %f2, %f6 | |
1658 | fmovd %f30, %f6 | |
1659 | stx %fsr, [%l7 + 0x38] | |
1660 | stx %fsr, [%l7 + 0x28] | |
1661 | fandnot2s %f4, %f11, %f1 | |
1662 | stx %fsr, [%l7 + 0x68] | |
1663 | fmovrdgez %g7, %f20, %f30 | |
1664 | nop | |
1665 | set 0x68, %i6 | |
1666 | stx %fsr, [%l7 + %i6] | |
1667 | fnands %f16, %f15, %f6 | |
1668 | tl %icc, 0x7 | |
1669 | fandnot1 %f14, %f4, %f14 | |
1670 | bg %icc, loop_43 | |
1671 | movne %fcc3, %i0, %o7 | |
1672 | srax %i3, 0x06, %o4 | |
1673 | stx %fsr, [%l7 + 0x60] | |
1674 | loop_43: | |
1675 | addcc %o5, %i7, %o6 | |
1676 | sdivx %o0, 0x0E2E, %o1 | |
1677 | wrpr %l5, %l6, %cwp | |
1678 | stx %fsr, [%l7 + 0x40] | |
1679 | fmovsn %icc, %f31, %f21 | |
1680 | fornot1s %f15, %f2, %f20 | |
1681 | fcmpgt32 %f6, %f20, %l3 | |
1682 | fsrc2 %f18, %f2 | |
1683 | nop | |
1684 | set 0x30, %g2 | |
1685 | stx %fsr, [%l7 + %g2] | |
1686 | fmovspos %icc, %f14, %f5 | |
1687 | pdist %f18, %f18, %f24 | |
1688 | fmovsneg %xcc, %f8, %f4 | |
1689 | nop | |
1690 | set 0x28, %i4 | |
1691 | stx %fsr, [%l7 + %i4] | |
1692 | nop | |
1693 | setx loop_44, %l0, %l1 | |
1694 | wrpr 0x1, %tl | |
1695 | wrpr %l1, %tnpc | |
1696 | setx 0x004100001402, %l0, %l1 | |
1697 | wrpr %l1, %tstate | |
1698 | wrhpr 0x4, %htstate | |
1699 | rdpr %tt, %l1 | |
1700 | wrpr %g0, %l1, %tt | |
1701 | rdpr %pstate, %l1 | |
1702 | wrpr %g0, %l1, %pstate | |
1703 | rdpr %tl, %l1 | |
1704 | wrpr %g0, %l1, %tl | |
1705 | rdpr %tpc, %l1 | |
1706 | wrpr %g0, %l1, %tpc | |
1707 | rdpr %tnpc, %l1 | |
1708 | wrpr %g0, %l1, %tnpc | |
1709 | rdpr %tstate, %l1 | |
1710 | wrpr %g0, %l1, %tstate | |
1711 | rdpr %tba, %l1 | |
1712 | wrpr %g0, %l1, %tba | |
1713 | rdpr %tba, %l1 | |
1714 | wrpr %g0, %l1, %tba | |
1715 | rdhpr %hpstate, %l1 | |
1716 | wrhpr %g0, %l1, %hpstate | |
1717 | rdhpr %htstate, %l1 | |
1718 | wrhpr %g0, %l1, %htstate | |
1719 | rdhpr %hintp, %l1 | |
1720 | wrhpr %g0, %l1, %hintp | |
1721 | done | |
1722 | edge8l %l0, %l1, %i5 | |
1723 | nop | |
1724 | set 0x68, %g1 | |
1725 | stx %fsr, [%l7 + %g1] | |
1726 | fnegd %f0, %f12 | |
1727 | loop_44: | |
1728 | membar 0x55 | |
1729 | nop | |
1730 | set 0x20, %l2 | |
1731 | stx %fsr, [%l7 + %l2] | |
1732 | set 0x40, %l5 | |
1733 | stda %f0, [%l7 + %l5] 0xd0 | |
1734 | fnegs %f16, %f22 | |
1735 | bmask %i6, %o3, %g4 | |
1736 | nop | |
1737 | setx 0x195B, %l0, %g1 | |
1738 | sdiv %g3, %g1, %l4 | |
1739 | stx %fsr, [%l7 + 0x40] | |
1740 | fbuge,pt %fcc0, loop_45 | |
1741 | bne,a %xcc, loop_46 | |
1742 | edge8l %g6, %o2, %i4 | |
1743 | stx %fsr, [%l7 + 0x58] | |
1744 | loop_45: | |
1745 | fmovda %fcc0, %f20, %f24 | |
1746 | loop_46: | |
1747 | srlx %g5, 0x12, %g2 | |
1748 | rd %tick_cmpr, %i2 | |
1749 | stx %fsr, [%l7 + 0x58] | |
1750 | nop | |
1751 | set 0x48, %g6 | |
1752 | ldd [%l7 + %g6], %f30 | |
1753 | nop | |
1754 | set 0x60, %i1 | |
1755 | stx %fsr, [%l7 + %i1] | |
1756 | fors %f19, %f28, %f1 | |
1757 | fandnot2s %f11, %f27, %f3 | |
1758 | fmovsgu %xcc, %f9, %f10 | |
1759 | nop | |
1760 | set 0x40, %i5 | |
1761 | stx %fsr, [%l7 + %i5] | |
1762 | fpsub16 %f26, %f6, %f16 | |
1763 | fcmpne32 %f24, %f28, %l2 | |
1764 | brz %i1, loop_47 | |
1765 | fcmpeq16 %f6, %f28, %i0 | |
1766 | fmovdo %fcc0, %f4, %f6 | |
1767 | nop | |
1768 | set 0x68, %g5 | |
1769 | stx %fsr, [%l7 + %g5] | |
1770 | loop_47: | |
1771 | bcs,a,pt %xcc, loop_48 | |
1772 | stx %fsr, [%l7 + 0x18] | |
1773 | nop | |
1774 | setx 0xD4791362B17C9775, %l0, %l6 | |
1775 | stx %l6, [%l7 + 0x28] | |
1776 | ldd [%l7 + 0x28], %f30 | |
1777 | setx 0x86CB6473DB31D295, %l1, %l5 | |
1778 | stx %l5, [%l7 + 0x10] | |
1779 | ldd [%l7 + 0x10], %f8 | |
1780 | fmuld %f8, %f30, %f30 | |
1781 | stx %fsr, [%l7 + 0x50] | |
1782 | loop_48: | |
1783 | nop | |
1784 | setx 0x4196931D, %l0, %l6 | |
1785 | st %l6, [%l7 + 0x28] | |
1786 | ld [%l7 + 0x28], %f12 | |
1787 | setx 0x6142EC7C, %l1, %l5 | |
1788 | st %l5, [%l7 + 0x10] | |
1789 | ld [%l7 + 0x10], %f7 | |
1790 | fmuls %f7, %f12, %f27 | |
1791 | fmovrslez %o7, %f22, %f22 | |
1792 | nop | |
1793 | setx 0x46A0C04A1D215696, %l0, %l6 | |
1794 | stx %l6, [%l7 + 0x28] | |
1795 | ldd [%l7 + 0x28], %f24 | |
1796 | setx 0x2A590414C395CE1C, %l1, %l5 | |
1797 | stx %l5, [%l7 + 0x10] | |
1798 | ldd [%l7 + 0x10], %f18 | |
1799 | fsubd %f18, %f24, %f2 | |
1800 | fcmple16 %f12, %f30, %g7 | |
1801 | fmovso %fcc0, %f22, %f30 | |
1802 | nop | |
1803 | fitos %f7, %f1 | |
1804 | fstox %f1, %f24 | |
1805 | fxtos %f24, %f13 | |
1806 | nop | |
1807 | set 0x48, %o7 | |
1808 | stx %fsr, [%l7 + %o7] | |
1809 | fmovd %f16, %f10 | |
1810 | tvs %xcc, 0x7 | |
1811 | fmovs %f2, %f9 | |
1812 | ||
1813 | or %g0, 0x8, %l0 | |
1814 | sllx %l0, 0x3c, %l0 | |
1815 | wrhpr %l0, 0xCAD, %hsys_tick_cmpr | |
1816 | fmovrse %o4, %f18, %f22 | |
1817 | fmovsge %xcc, %f15, %f28 | |
1818 | sdivcc %o5, 0x17E9, %i7 | |
1819 | movvc %icc, %o0, %o1 | |
1820 | fmovdge %fcc0, %f2, %f0 | |
1821 | tn %xcc, 0x3 | |
1822 | subccc %o6, %l6, %l3 | |
1823 | movule %fcc2, %l0, %l5 | |
1824 | movul %fcc3, %l1, %i5 | |
1825 | mulx %i6, %o3, %g3 | |
1826 | st %f9, [%l7 + 0x50] | |
1827 | fcmpgt32 %f22, %f20, %g4 | |
1828 | membar 0x1C | |
1829 | nop | |
1830 | set 0x58, %g7 | |
1831 | stx %fsr, [%l7 + %g7] | |
1832 | fmovdvs %xcc, %f6, %f14 | |
1833 | nop | |
1834 | set 0x70, %o5 | |
1835 | ldsh [%l7 + %o5], %g1 | |
1836 | move %icc, 0x621, %l4 | |
1837 | fblg,a,pn %fcc0, loop_49 | |
1838 | nop | |
1839 | set 0x20, %i2 | |
1840 | stx %fsr, [%l7 + %i2] | |
1841 | nop | |
1842 | set 0x40, %i7 | |
1843 | stx %fsr, [%l7 + %i7] | |
1844 | stx %fsr, [%l7 + 0x70] | |
1845 | loop_49: | |
1846 | fmovrdlez %g6, %f14, %f0 | |
1847 | nop | |
1848 | set 0x58, %g4 | |
1849 | stx %fsr, [%l7 + %g4] | |
1850 | nop | |
1851 | fitod %f28, %f28 | |
1852 | fabss %f19, %f0 | |
1853 | nop | |
1854 | fitod %f4, %f28 | |
1855 | fdtoi %f28, %f28 | |
1856 | set 0x5F, %o4 | |
1857 | lduba [%l7 + %o4] 0x81, %o2 | |
1858 | fmovdpos %icc, %f22, %f4 | |
1859 | movo %fcc2, 0x39E, %i4 | |
1860 | nop | |
1861 | set 0x58, %o0 | |
1862 | stx %fsr, [%l7 + %o0] | |
1863 | fone %f2 | |
1864 | nop | |
1865 | setx 0x535ED520, %l0, %l6 | |
1866 | st %l6, [%l7 + 0x28] | |
1867 | ld [%l7 + 0x28], %f3 | |
1868 | setx 0x507C260B, %l1, %l5 | |
1869 | st %l5, [%l7 + 0x10] | |
1870 | ld [%l7 + 0x10], %f14 | |
1871 | fmuls %f14, %f3, %f24 | |
1872 | nop | |
1873 | set 0x18, %l1 | |
1874 | stx %fsr, [%l7 + %l1] | |
1875 | fmovso %fcc1, %f2, %f20 | |
1876 | wr %g2, %i2, %ccr | |
1877 | sdiv %l2, 0x1089, %i1 | |
1878 | stx %fsr, [%l7 + 0x50] | |
1879 | nop | |
1880 | set 0x30, %o1 | |
1881 | stx %fsr, [%l7 + %o1] | |
1882 | stb %g5, [%l7 + 0x1C] | |
1883 | edge8ln %o7, %i0, %g7 | |
1884 | fcmpeq16 %f14, %f12, %o4 | |
1885 | fmovrsne %i3, %f15, %f13 | |
1886 | fmovrdgez %i7, %f22, %f20 | |
1887 | stx %fsr, [%l7 + 0x58] | |
1888 | movug %fcc0, %o0, %o5 | |
1889 | stx %fsr, [%l7 + 0x78] | |
1890 | fandnot1 %f0, %f26, %f24 | |
1891 | bneg,a %icc, loop_50 | |
1892 | fmovsleu %xcc, %f14, %f4 | |
1893 | fxnor %f30, %f18, %f14 | |
1894 | fmovdneg %xcc, %f14, %f24 | |
1895 | loop_50: | |
1896 | fbg,a,pn %fcc0, loop_51 | |
1897 | movne %icc, %o1, %o6 | |
1898 | movul %fcc2, %l6, %l3 | |
1899 | loop_51: | |
1900 | nop | |
1901 | ||
1902 | EXIT_GOOD | |
1903 | ||
1904 | ||
1905 | ||
1906 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
1907 | ! | |
1908 | ! Stats for Thread 3: | |
1909 | ! | |
1910 | ! Type l : 54 | |
1911 | ! Type a : 8 | |
1912 | ! Type x : 4 | |
1913 | ! Type cti : 13 | |
1914 | ! Type f : 74 | |
1915 | ! Type i : 47 | |
1916 | ! | |
1917 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
1918 | ||
1919 | ! | |
1920 | ! Thread 4 Start | |
1921 | ! | |
1922 | main_t4: | |
1923 | mov %l7, %g1 | |
1924 | !# Set %cwp for 8 windows | |
1925 | !# This threads memory space into each %l7 | |
1926 | wrpr %g0, 0x7, %cwp | |
1927 | mov %g1, %l7 | |
1928 | wrpr %g0, 0x6, %cwp | |
1929 | mov %g1, %l7 | |
1930 | wrpr %g0, 0x5, %cwp | |
1931 | mov %g1, %l7 | |
1932 | wrpr %g0, 0x4, %cwp | |
1933 | mov %g1, %l7 | |
1934 | wrpr %g0, 0x3, %cwp | |
1935 | mov %g1, %l7 | |
1936 | wrpr %g0, 0x2, %cwp | |
1937 | mov %g1, %l7 | |
1938 | wrpr %g0, 0x1, %cwp | |
1939 | mov %g1, %l7 | |
1940 | wrpr %g0, 0x0, %cwp | |
1941 | mov %g1, %l7 | |
1942 | ||
1943 | !# Set %fsr | |
1944 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
1945 | stx %l6, [%l7 + 0x0] !# no post process | |
1946 | ldx [%l7 + 0x0], %fsr !# no post process | |
1947 | ||
1948 | !# Initialize registers .. | |
1949 | ||
1950 | !# Global registers | |
1951 | set 0xB, %g1 | |
1952 | set 0x0, %g2 | |
1953 | set 0x2, %g3 | |
1954 | set 0xD, %g4 | |
1955 | set 0x1, %g5 | |
1956 | set 0xC, %g6 | |
1957 | set 0xC, %g7 | |
1958 | !# Input registers | |
1959 | set -0x8, %i0 | |
1960 | set -0x1, %i1 | |
1961 | set -0x6, %i2 | |
1962 | set -0xD, %i3 | |
1963 | set -0x0, %i4 | |
1964 | set -0x2, %i5 | |
1965 | set -0x9, %i6 | |
1966 | set -0x4, %i7 | |
1967 | !# Local registers | |
1968 | set 0x4E1177C4, %l0 | |
1969 | set 0x5D80D7D3, %l1 | |
1970 | set 0x1E7580B7, %l2 | |
1971 | set 0x74C32E0F, %l3 | |
1972 | set 0x2D891145, %l4 | |
1973 | set 0x7D326465, %l5 | |
1974 | set 0x250770FA, %l6 | |
1975 | !# Output registers | |
1976 | set 0x1B2E, %o0 | |
1977 | set 0x0817, %o1 | |
1978 | set -0x133C, %o2 | |
1979 | set -0x0848, %o3 | |
1980 | set 0x1E71, %o4 | |
1981 | set -0x000B, %o5 | |
1982 | set -0x07ED, %o6 | |
1983 | set 0x05D2, %o7 | |
1984 | !# Float registers | |
1985 | INIT_TH_FP_REG(%l7,%f0,0x5CDEBE004C9316D6) | |
1986 | INIT_TH_FP_REG(%l7,%f2,0x5AF70778F0C4B088) | |
1987 | INIT_TH_FP_REG(%l7,%f4,0x8D7526625EC515A4) | |
1988 | INIT_TH_FP_REG(%l7,%f6,0xE02F1C846E8760CC) | |
1989 | INIT_TH_FP_REG(%l7,%f8,0x0321EB208EE2B95B) | |
1990 | INIT_TH_FP_REG(%l7,%f10,0x2389D1100A6649F3) | |
1991 | INIT_TH_FP_REG(%l7,%f12,0x67131F7252CC89E3) | |
1992 | INIT_TH_FP_REG(%l7,%f14,0xE9E42F7A627F9BF1) | |
1993 | INIT_TH_FP_REG(%l7,%f16,0x768EE71D99271671) | |
1994 | INIT_TH_FP_REG(%l7,%f18,0x7E12787768E2C912) | |
1995 | INIT_TH_FP_REG(%l7,%f20,0x308AE9F847B82508) | |
1996 | INIT_TH_FP_REG(%l7,%f22,0x4821D99235B5284B) | |
1997 | INIT_TH_FP_REG(%l7,%f24,0xE1625C0F20759DEE) | |
1998 | INIT_TH_FP_REG(%l7,%f26,0x376BF26EBED9E858) | |
1999 | INIT_TH_FP_REG(%l7,%f28,0x3F3211F11C669311) | |
2000 | INIT_TH_FP_REG(%l7,%f30,0xEE9DF5D905EBEBD1) | |
2001 | ||
2002 | !# Execute Main Diag .. | |
2003 | ||
2004 | fmovrdlz %l5, %f22, %f8 | |
2005 | nop | |
2006 | setx 0xA828630FEA7A40C6, %l0, %l6 | |
2007 | stx %l6, [%l7 + 0x28] | |
2008 | ldd [%l7 + 0x28], %f14 | |
2009 | setx 0xF8AA743E9BA84DB0, %l1, %l5 | |
2010 | stx %l5, [%l7 + 0x10] | |
2011 | ldd [%l7 + 0x10], %f2 | |
2012 | faddd %f2, %f14, %f30 | |
2013 | nop | |
2014 | set 0x50, %l3 | |
2015 | stx %fsr, [%l7 + %l3] | |
2016 | fornot2s %f20, %f9, %f6 | |
2017 | stx %fsr, [%l7 + 0x30] | |
2018 | wr %g0, 0x89, %asi | |
2019 | stxa %l1, [%l7 + 0x78] %asi | |
2020 | move %fcc2, 0x450, %l0 | |
2021 | fmul8sux16 %f26, %f18, %f20 | |
2022 | fmovd %f12, %f18 | |
2023 | stx %fsr, [%l7 + 0x78] | |
2024 | sllx %i5, 0x0F, %i6 | |
2025 | nop | |
2026 | setx 0x98CFA505CD088D1E, %l0, %l6 | |
2027 | stx %l6, [%l7 + 0x28] | |
2028 | ldd [%l7 + 0x28], %f10 | |
2029 | setx 0xB4A2027F31FCEE99, %l1, %l5 | |
2030 | stx %l5, [%l7 + 0x10] | |
2031 | ldd [%l7 + 0x10], %f26 | |
2032 | fmuld %f26, %f10, %f10 | |
2033 | nop | |
2034 | setx 0x2B275F710EE19C76, %l0, %l6 | |
2035 | stx %l6, [%l7 + 0x28] | |
2036 | ldd [%l7 + 0x28], %f26 | |
2037 | setx 0xB397FD2C5C567ABB, %l1, %l5 | |
2038 | stx %l5, [%l7 + 0x10] | |
2039 | ldd [%l7 + 0x10], %f6 | |
2040 | fmuld %f6, %f26, %f16 | |
2041 | fmovdug %fcc3, %f22, %f12 | |
2042 | lduw [%l7 + 0x3C], %g3 | |
2043 | set 0x40, %l4 | |
2044 | stda %f16, [%l7 + %l4] 0xc8 | |
2045 | xnorcc %g4, %g1, %l4 | |
2046 | bne,a %icc, loop_52 | |
2047 | fmovsule %fcc3, %f10, %f10 | |
2048 | fcmps %fcc0, %f31, %f10 | |
2049 | xnor %o3, %o2, %i4 | |
2050 | loop_52: | |
2051 | nop | |
2052 | setx 0x1F6FEB8B, %l0, %l6 | |
2053 | st %l6, [%l7 + 0x34] | |
2054 | ld [%l7 + 0x34], %fsr | |
2055 | nop | |
2056 | setx loop_53, %l0, %l1 | |
2057 | wrpr 0x1, %tl | |
2058 | wrpr %l1, %tpc | |
2059 | add %l1, 0x4, %l1 | |
2060 | wrpr %l1, %tnpc | |
2061 | setx 0x001200001402, %l0, %l1 | |
2062 | wrpr %l1, %tstate | |
2063 | wrhpr 0x4, %htstate | |
2064 | retry | |
2065 | rdhpr %hpstate, %g2 | |
2066 | and %i2, %l2, %i1 | |
2067 | movcs %icc, %g6, %o7 | |
2068 | loop_53: | |
2069 | stx %fsr, [%l7 + 0x70] | |
2070 | stx %fsr, [%l7 + 0x20] | |
2071 | nop | |
2072 | setx 0x71C42B98, %l0, %l6 | |
2073 | st %l6, [%l7 + 0x28] | |
2074 | ld [%l7 + 0x28], %f16 | |
2075 | setx 0xDD03FB54, %l1, %l5 | |
2076 | st %l5, [%l7 + 0x10] | |
2077 | ld [%l7 + 0x10], %f30 | |
2078 | fsubs %f30, %f16, %f16 | |
2079 | fmovsu %fcc3, %f5, %f22 | |
2080 | bvc %xcc, loop_54 | |
2081 | nop | |
2082 | setx 0x089E, %l0, %g7 | |
2083 | sdivcc %g5, %g7, %o4 | |
2084 | stx %fsr, [%l7 + 0x10] | |
2085 | nop | |
2086 | set 0x38, %i3 | |
2087 | stb %i3, [%l7 + %i3] | |
2088 | loop_54: | |
2089 | restored | |
2090 | rdpr %cwp, %g1 | |
2091 | rdpr %cansave, %g2 | |
2092 | rdpr %canrestore, %g3 | |
2093 | rdpr %cleanwin, %g4 | |
2094 | rdpr %otherwin, %g5 | |
2095 | rdpr %wstate, %g6 | |
2096 | stx %fsr, [%l7 + 0x40] | |
2097 | stx %fsr, [%l7 + 0x50] | |
2098 | stx %fsr, [%l7 + 0x08] | |
2099 | nop | |
2100 | set 0x6C, %g3 | |
2101 | lduh [%l7 + %g3], %i0 | |
2102 | edge32 %i7, %o0, %o1 | |
2103 | nop | |
2104 | setx 0x15D80CD2, %l0, %l6 | |
2105 | st %l6, [%l7 + 0x28] | |
2106 | ld [%l7 + 0x28], %f16 | |
2107 | fsqrts %f16, %f24 | |
2108 | fbne,a %fcc1, loop_55 | |
2109 | fnor %f22, %f26, %f14 | |
2110 | fmovdneg %icc, %f6, %f28 | |
2111 | nop | |
2112 | set 0x08, %o2 | |
2113 | stx %fsr, [%l7 + %o2] | |
2114 | loop_55: | |
2115 | nop | |
2116 | setx 0xD5BCB566A1E3641F, %l0, %l6 | |
2117 | stx %l6, [%l7 + 0x28] | |
2118 | ldd [%l7 + 0x28], %f14 | |
2119 | setx 0x82321E2C101E2605, %l1, %l5 | |
2120 | stx %l5, [%l7 + 0x10] | |
2121 | ldd [%l7 + 0x10], %f28 | |
2122 | fdivd %f28, %f14, %f10 | |
2123 | fzeros %f6 | |
2124 | be,pn %icc, loop_56 | |
2125 | nop | |
2126 | set 0x18, %l0 | |
2127 | stx %fsr, [%l7 + %l0] | |
2128 | nop | |
2129 | setx 0xC8EC2F814D44F2BB, %l0, %l6 | |
2130 | stx %l6, [%l7 + 0x28] | |
2131 | ldd [%l7 + 0x28], %f16 | |
2132 | setx 0x1ADDE6417031C37E, %l1, %l5 | |
2133 | stx %l5, [%l7 + 0x10] | |
2134 | ldd [%l7 + 0x10], %f28 | |
2135 | fmuld %f28, %f16, %f8 | |
2136 | stx %fsr, [%l7 + 0x48] | |
2137 | loop_56: | |
2138 | fnot2 %f28, %f14 | |
2139 | taddcc %o6, 0x1154, %l6 | |
2140 | siam 0x6 | |
2141 | stx %fsr, [%l7 + 0x78] | |
2142 | nop | |
2143 | set 0x20, %l6 | |
2144 | stx %fsr, [%l7 + %l6] | |
2145 | fbul %fcc2, loop_57 | |
2146 | movrgez %o5, 0x197, %l5 | |
2147 | stx %fsr, [%l7 + 0x68] | |
2148 | nop | |
2149 | set 0x20, %o3 | |
2150 | stx %fsr, [%l7 + %o3] | |
2151 | loop_57: | |
2152 | fmovsle %icc, %f1, %f1 | |
2153 | smulcc %l3, %l1, %l0 | |
2154 | wrpr %i5, 0x0014, %tick | |
2155 | nop | |
2156 | set 0x28, %o6 | |
2157 | stx %fsr, [%l7 + %o6] | |
2158 | tleu %icc, 0x0 | |
2159 | movneg %xcc, %g3, %g4 | |
2160 | rdpr %cleanwin, %i6 | |
2161 | edge32 %g1, %l4, %o2 | |
2162 | fmovrdlez %i4, %f2, %f12 | |
2163 | ldsw [%l7 + 0x30], %o3 | |
2164 | fnot2 %f0, %f26 | |
2165 | stx %fsr, [%l7 + 0x70] | |
2166 | array8 %i2, %l2, %g2 | |
2167 | nop | |
2168 | set 0x70, %i0 | |
2169 | stx %fsr, [%l7 + %i0] | |
2170 | nop | |
2171 | setx 0xCA157025, %l0, %l6 | |
2172 | st %l6, [%l7 + 0x28] | |
2173 | ld [%l7 + 0x28], %f15 | |
2174 | setx 0x0618B439, %l1, %l5 | |
2175 | st %l5, [%l7 + 0x10] | |
2176 | ld [%l7 + 0x10], %f19 | |
2177 | fdivs %f19, %f15, %f19 | |
2178 | stx %fsr, [%l7 + 0x38] | |
2179 | movne %fcc2, 0x528, %i1 | |
2180 | orncc %o7, %g6, %g5 | |
2181 | stx %fsr, [%l7 + 0x58] | |
2182 | sll %g7, 0x17, %o4 | |
2183 | fmovdue %fcc2, %f18, %f6 | |
2184 | nop | |
2185 | set 0x70, %g2 | |
2186 | stx %fsr, [%l7 + %g2] | |
2187 | nop | |
2188 | set 0x58, %i6 | |
2189 | stx %fsr, [%l7 + %i6] | |
2190 | nop | |
2191 | set 0x38, %g1 | |
2192 | stx %fsr, [%l7 + %g1] | |
2193 | fmovsu %fcc0, %f24, %f22 | |
2194 | andcc %i3, %i0, %i7 | |
2195 | nop | |
2196 | setx 0x39DC0AB2, %l0, %l6 | |
2197 | st %l6, [%l7 + 0x28] | |
2198 | ld [%l7 + 0x28], %f31 | |
2199 | fsqrts %f31, %f4 | |
2200 | ||
2201 | or %g0, 0x8, %l0 | |
2202 | sllx %l0, 0x3c, %l0 | |
2203 | wrhpr %l0, 0xADA, %hsys_tick_cmpr | |
2204 | nop | |
2205 | set 0x28, %i4 | |
2206 | stx %fsr, [%l7 + %i4] | |
2207 | fcmped %fcc0, %f24, %f26 | |
2208 | fbe %fcc2, loop_58 | |
2209 | nop | |
2210 | set 0x30, %l2 | |
2211 | stx %fsr, [%l7 + %l2] | |
2212 | nop | |
2213 | set 0x18, %g6 | |
2214 | stx %fsr, [%l7 + %g6] | |
2215 | udivcc %o0, 0x070D, %o6 | |
2216 | loop_58: | |
2217 | bmask %l6, %l5, %o5 | |
2218 | fbue %fcc3, loop_59 | |
2219 | stx %fsr, [%l7 + 0x60] | |
2220 | rd %pc, %l3 | |
2221 | fornot1s %f13, %f12, %f8 | |
2222 | loop_59: | |
2223 | be,pt %xcc, loop_60 | |
2224 | fabss %f7, %f14 | |
2225 | stx %fsr, [%l7 + 0x58] | |
2226 | fmovsa %fcc3, %f4, %f18 | |
2227 | loop_60: | |
2228 | stx %fsr, [%l7 + 0x50] | |
2229 | nop | |
2230 | set 0x10, %l5 | |
2231 | stx %fsr, [%l7 + %l5] | |
2232 | fmul8x16 %f27, %f2, %f20 | |
2233 | nop | |
2234 | set 0x20, %i1 | |
2235 | stx %fsr, [%l7 + %i1] | |
2236 | rdpr %tl, %l1 | |
2237 | fpack32 %f28, %f4, %f8 | |
2238 | brnz %i5, loop_61 | |
2239 | stx %fsr, [%l7 + 0x78] | |
2240 | fmovdleu %icc, %f24, %f4 | |
2241 | tgu %icc, 0x5 | |
2242 | loop_61: | |
2243 | fmovsvs %xcc, %f2, %f11 | |
2244 | fmovsle %xcc, %f3, %f11 | |
2245 | fpadd32s %f25, %f21, %f8 | |
2246 | tg %xcc, 0x0 | |
2247 | mova %xcc, 0x40A, %g3 | |
2248 | rdpr %tba, %l0 | |
2249 | movrgez %i6, 0x253, %g1 | |
2250 | stx %fsr, [%l7 + 0x10] | |
2251 | be,a %icc, loop_62 | |
2252 | fmovsule %fcc0, %f29, %f21 | |
2253 | tsubcctv %l4, %o2, %i4 | |
2254 | fmul8x16 %f16, %f2, %f6 | |
2255 | loop_62: | |
2256 | stx %fsr, [%l7 + 0x78] | |
2257 | stx %fsr, [%l7 + 0x38] | |
2258 | add %o3, 0x1B13, %g4 | |
2259 | fabsd %f22, %f4 | |
2260 | fcmpne32 %f20, %f28, %l2 | |
2261 | nop | |
2262 | set 0x68, %i5 | |
2263 | stx %fsr, [%l7 + %i5] | |
2264 | sdiv %g2, 0x17A1, %i2 | |
2265 | fmovdlg %fcc3, %f20, %f22 | |
2266 | fcmpne32 %f16, %f12, %i1 | |
2267 | std %f20, [%l7 + 0x40] | |
2268 | bn,pt %icc, loop_63 | |
2269 | nop | |
2270 | set 0x70, %g5 | |
2271 | stx %fsr, [%l7 + %g5] | |
2272 | nop | |
2273 | set 0x08, %g7 | |
2274 | stx %fsr, [%l7 + %g7] | |
2275 | fmovrslz %g6, %f29, %f6 | |
2276 | loop_63: | |
2277 | fsrc2 %f2, %f16 | |
2278 | nop | |
2279 | set 0x08, %o5 | |
2280 | stx %fsr, [%l7 + %o5] | |
2281 | fpadd16 %f16, %f18, %f18 | |
2282 | fnot1s %f0, %f3 | |
2283 | fmul8x16 %f3, %f14, %f26 | |
2284 | nop | |
2285 | setx 0xB26A6B26B4C5E67B, %l0, %l6 | |
2286 | stx %l6, [%l7 + 0x28] | |
2287 | ldd [%l7 + 0x28], %f10 | |
2288 | setx 0x02686B0B3FA1D30A, %l1, %l5 | |
2289 | stx %l5, [%l7 + 0x10] | |
2290 | ldd [%l7 + 0x10], %f30 | |
2291 | fdivd %f30, %f10, %f4 | |
2292 | nop | |
2293 | set 0x58, %o7 | |
2294 | stx %fsr, [%l7 + %o7] | |
2295 | rdpr %pil, %o7 | |
2296 | andcc %g7, %o4, %i3 | |
2297 | nop | |
2298 | set 0x3C, %i7 | |
2299 | ldsh [%l7 + %i7], %g5 | |
2300 | ldsb [%l7 + 0x6E], %i7 | |
2301 | nop | |
2302 | set 0x70, %i2 | |
2303 | stx %fsr, [%l7 + %i2] | |
2304 | rd %pc, %i0 | |
2305 | movrne %o1, %o0, %o6 | |
2306 | nop | |
2307 | setx 0xC879016F, %l0, %l6 | |
2308 | st %l6, [%l7 + 0x28] | |
2309 | ld [%l7 + 0x28], %f26 | |
2310 | setx 0xA3373D1E, %l1, %l5 | |
2311 | st %l5, [%l7 + 0x10] | |
2312 | ld [%l7 + 0x10], %f19 | |
2313 | fmuls %f19, %f26, %f3 | |
2314 | movug %fcc1, %l5, %l6 | |
2315 | sllx %o5, 0x00, %l1 | |
2316 | stx %fsr, [%l7 + 0x58] | |
2317 | fnegd %f18, %f18 | |
2318 | fmovrde %l3, %f22, %f16 | |
2319 | stx %fsr, [%l7 + 0x28] | |
2320 | rd %y, %g3 | |
2321 | brgez %i5, loop_64 | |
2322 | stx %fsr, [%l7 + 0x50] | |
2323 | add %l0, 0x18FB, %g1 | |
2324 | fmovdg %fcc1, %f22, %f30 | |
2325 | loop_64: | |
2326 | fmovrsne %l4, %f17, %f9 | |
2327 | fxnors %f5, %f23, %f18 | |
2328 | fble,pt %fcc0, loop_65 | |
2329 | fmovdge %fcc2, %f0, %f24 | |
2330 | movlg %fcc1, %i6, %i4 | |
2331 | stx %fsr, [%l7 + 0x48] | |
2332 | loop_65: | |
2333 | subccc %o2, 0x03FE, %o3 | |
2334 | stx %fsr, [%l7 + 0x20] | |
2335 | tgu %icc, 0x2 | |
2336 | tneg %icc, 0x4 | |
2337 | nop | |
2338 | set 0x52, %o4 | |
2339 | ldub [%l7 + %o4], %l2 | |
2340 | fpadd16 %f24, %f24, %f20 | |
2341 | nop | |
2342 | fitod %f2, %f4 | |
2343 | fdtox %f4, %f20 | |
2344 | bgu,pn %xcc, loop_66 | |
2345 | tcs %icc, 0x6 | |
2346 | membar 0x5B | |
2347 | xnor %g2, 0x1E69, %i2 | |
2348 | loop_66: | |
2349 | fornot1s %f0, %f14, %f28 | |
2350 | nop | |
2351 | set 0x40, %g4 | |
2352 | stx %fsr, [%l7 + %g4] | |
2353 | fmovdcc %icc, %f6, %f2 | |
2354 | fpadd16 %f24, %f8, %f22 | |
2355 | nop | |
2356 | set 0x58, %o0 | |
2357 | stx %fsr, [%l7 + %o0] | |
2358 | restored | |
2359 | rdpr %cwp, %g1 | |
2360 | rdpr %cansave, %g2 | |
2361 | rdpr %canrestore, %g3 | |
2362 | rdpr %cleanwin, %g4 | |
2363 | rdpr %otherwin, %g5 | |
2364 | rdpr %wstate, %g6 | |
2365 | nop | |
2366 | fitod %f12, %f10 | |
2367 | fdtos %f10, %f24 | |
2368 | movneg %icc, 0x209, %g4 | |
2369 | fxors %f7, %f3, %f9 | |
2370 | fmovrsgz %i1, %f15, %f24 | |
2371 | stx %fsr, [%l7 + 0x60] | |
2372 | fmovsue %fcc0, %f4, %f19 | |
2373 | fmovrdgz %o7, %f12, %f26 | |
2374 | rdpr %gl, %g6 | |
2375 | tvs %xcc, 0x7 | |
2376 | stx %fsr, [%l7 + 0x50] | |
2377 | EXIT_GOOD | |
2378 | ||
2379 | ||
2380 | ||
2381 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
2382 | ! | |
2383 | ! Stats for Thread 4: | |
2384 | ! | |
2385 | ! Type l : 62 | |
2386 | ! Type a : 11 | |
2387 | ! Type cti : 15 | |
2388 | ! Type x : 2 | |
2389 | ! Type f : 66 | |
2390 | ! Type i : 44 | |
2391 | ! | |
2392 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
2393 | ||
2394 | ! | |
2395 | ! Thread 5 Start | |
2396 | ! | |
2397 | main_t5: | |
2398 | mov %l7, %g1 | |
2399 | !# Set %cwp for 8 windows | |
2400 | !# This threads memory space into each %l7 | |
2401 | wrpr %g0, 0x7, %cwp | |
2402 | mov %g1, %l7 | |
2403 | wrpr %g0, 0x6, %cwp | |
2404 | mov %g1, %l7 | |
2405 | wrpr %g0, 0x5, %cwp | |
2406 | mov %g1, %l7 | |
2407 | wrpr %g0, 0x4, %cwp | |
2408 | mov %g1, %l7 | |
2409 | wrpr %g0, 0x3, %cwp | |
2410 | mov %g1, %l7 | |
2411 | wrpr %g0, 0x2, %cwp | |
2412 | mov %g1, %l7 | |
2413 | wrpr %g0, 0x1, %cwp | |
2414 | mov %g1, %l7 | |
2415 | wrpr %g0, 0x0, %cwp | |
2416 | mov %g1, %l7 | |
2417 | ||
2418 | !# Set %fsr | |
2419 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
2420 | stx %l6, [%l7 + 0x0] !# no post process | |
2421 | ldx [%l7 + 0x0], %fsr !# no post process | |
2422 | ||
2423 | !# Initialize registers .. | |
2424 | ||
2425 | !# Global registers | |
2426 | set 0xA, %g1 | |
2427 | set 0x5, %g2 | |
2428 | set 0xF, %g3 | |
2429 | set 0x0, %g4 | |
2430 | set 0xC, %g5 | |
2431 | set 0x9, %g6 | |
2432 | set 0xB, %g7 | |
2433 | !# Input registers | |
2434 | set -0x1, %i0 | |
2435 | set -0x0, %i1 | |
2436 | set -0x4, %i2 | |
2437 | set -0x2, %i3 | |
2438 | set -0x4, %i4 | |
2439 | set -0x3, %i5 | |
2440 | set -0x4, %i6 | |
2441 | set -0x0, %i7 | |
2442 | !# Local registers | |
2443 | set 0x54A38682, %l0 | |
2444 | set 0x6E36BF7F, %l1 | |
2445 | set 0x19E81C99, %l2 | |
2446 | set 0x430A293F, %l3 | |
2447 | set 0x2B1F37CE, %l4 | |
2448 | set 0x498EBD25, %l5 | |
2449 | set 0x378B7E21, %l6 | |
2450 | !# Output registers | |
2451 | set 0x1277, %o0 | |
2452 | set -0x0E0B, %o1 | |
2453 | set 0x0BBB, %o2 | |
2454 | set -0x0314, %o3 | |
2455 | set -0x1156, %o4 | |
2456 | set -0x0191, %o5 | |
2457 | set -0x05ED, %o6 | |
2458 | set -0x138D, %o7 | |
2459 | !# Float registers | |
2460 | INIT_TH_FP_REG(%l7,%f0,0x5CDEBE004C9316D6) | |
2461 | INIT_TH_FP_REG(%l7,%f2,0x5AF70778F0C4B088) | |
2462 | INIT_TH_FP_REG(%l7,%f4,0x8D7526625EC515A4) | |
2463 | INIT_TH_FP_REG(%l7,%f6,0xE02F1C846E8760CC) | |
2464 | INIT_TH_FP_REG(%l7,%f8,0x0321EB208EE2B95B) | |
2465 | INIT_TH_FP_REG(%l7,%f10,0x2389D1100A6649F3) | |
2466 | INIT_TH_FP_REG(%l7,%f12,0x67131F7252CC89E3) | |
2467 | INIT_TH_FP_REG(%l7,%f14,0xE9E42F7A627F9BF1) | |
2468 | INIT_TH_FP_REG(%l7,%f16,0x768EE71D99271671) | |
2469 | INIT_TH_FP_REG(%l7,%f18,0x7E12787768E2C912) | |
2470 | INIT_TH_FP_REG(%l7,%f20,0x308AE9F847B82508) | |
2471 | INIT_TH_FP_REG(%l7,%f22,0x4821D99235B5284B) | |
2472 | INIT_TH_FP_REG(%l7,%f24,0xE1625C0F20759DEE) | |
2473 | INIT_TH_FP_REG(%l7,%f26,0x376BF26EBED9E858) | |
2474 | INIT_TH_FP_REG(%l7,%f28,0x3F3211F11C669311) | |
2475 | INIT_TH_FP_REG(%l7,%f30,0xEE9DF5D905EBEBD1) | |
2476 | ||
2477 | !# Execute Main Diag .. | |
2478 | ||
2479 | edge16ln %g7, %o4, %i3 | |
2480 | subcc %g5, %i7, %o1 | |
2481 | fcmped %fcc3, %f10, %f6 | |
2482 | set 0x40, %o1 | |
2483 | stda %f16, [%l7 + %o1] 0x81 | |
2484 | rd %sys_tick_cmpr, %i0 | |
2485 | nop | |
2486 | set 0x38, %l3 | |
2487 | stx %fsr, [%l7 + %l3] | |
2488 | bmask %o6, %o0, %l6 | |
2489 | fcmpeq16 %f20, %f20, %l5 | |
2490 | nop | |
2491 | set 0x10, %l4 | |
2492 | stx %fsr, [%l7 + %l4] | |
2493 | stx %fsr, [%l7 + 0x50] | |
2494 | nop | |
2495 | set 0x66, %l1 | |
2496 | ldsb [%l7 + %l1], %l1 | |
2497 | tleu %icc, 0x4 | |
2498 | nop | |
2499 | fitod %f8, %f22 | |
2500 | fdtoi %f22, %f0 | |
2501 | tvc %xcc, 0x4 | |
2502 | tg %xcc, 0x5 | |
2503 | bgu %xcc, loop_67 | |
2504 | nop | |
2505 | setx loop_68, %l0, %l1 | |
2506 | jmpl %l1, %l3 | |
2507 | fnor %f12, %f24, %f28 | |
2508 | stx %fsr, [%l7 + 0x60] | |
2509 | loop_67: | |
2510 | stx %fsr, [%l7 + 0x30] | |
2511 | loop_68: | |
2512 | srax %g3, 0x05, %i5 | |
2513 | stx %fsr, [%l7 + 0x38] | |
2514 | fsrc2 %f26, %f22 | |
2515 | tsubcc %l0, 0x19A9, %g1 | |
2516 | sethi 0x1AE5, %l4 | |
2517 | fmovs %f16, %f11 | |
2518 | fabss %f17, %f1 | |
2519 | orcc %o5, %i6, %o2 | |
2520 | fmul8x16au %f24, %f21, %f8 | |
2521 | fmovde %fcc0, %f20, %f28 | |
2522 | nop | |
2523 | setx 0x19C06B9A9BCD44A9, %l0, %l6 | |
2524 | stx %l6, [%l7 + 0x28] | |
2525 | ldd [%l7 + 0x28], %f12 | |
2526 | setx 0xAC8DD347291EEC06, %l1, %l5 | |
2527 | stx %l5, [%l7 + 0x10] | |
2528 | ldd [%l7 + 0x10], %f4 | |
2529 | fdivd %f4, %f12, %f22 | |
2530 | fmovdo %fcc0, %f26, %f28 | |
2531 | fmovsule %fcc0, %f3, %f14 | |
2532 | fnot2 %f4, %f24 | |
2533 | fcmpeq16 %f22, %f4, %o3 | |
2534 | nop | |
2535 | set 0x10, %g3 | |
2536 | stx %fsr, [%l7 + %g3] | |
2537 | tsubcc %i4, 0x0EF5, %l2 | |
2538 | popc %g2, %g4 | |
2539 | nop | |
2540 | set 0x60, %i3 | |
2541 | stx %fsr, [%l7 + %i3] | |
2542 | fcmpeq32 %f16, %f22, %i1 | |
2543 | stx %fsr, [%l7 + 0x48] | |
2544 | stx %fsr, [%l7 + 0x30] | |
2545 | fnegs %f4, %f3 | |
2546 | nop | |
2547 | set 0x40, %l0 | |
2548 | stx %fsr, [%l7 + %l0] | |
2549 | fabss %f27, %f15 | |
2550 | edge16l %i2, %g6, %o7 | |
2551 | tge %icc, 0x4 | |
2552 | stx %fsr, [%l7 + 0x08] | |
2553 | ldsh [%l7 + 0x08], %g7 | |
2554 | nop | |
2555 | set 0x18, %o2 | |
2556 | stx %fsr, [%l7 + %o2] | |
2557 | nop | |
2558 | setx 0xEB32FB59, %l0, %l6 | |
2559 | st %l6, [%l7 + 0x28] | |
2560 | ld [%l7 + 0x28], %f24 | |
2561 | setx 0x9D24357E, %l1, %l5 | |
2562 | st %l5, [%l7 + 0x10] | |
2563 | ld [%l7 + 0x10], %f0 | |
2564 | fsubs %f0, %f24, %f15 | |
2565 | edge16 %o4, %i3, %g5 | |
2566 | stx %fsr, [%l7 + 0x78] | |
2567 | rdhpr %ver, %i7 | |
2568 | nop | |
2569 | fitod %f0, %f6 | |
2570 | fdtoi %f6, %f13 | |
2571 | fmovdlg %fcc2, %f16, %f26 | |
2572 | nop | |
2573 | set 0x50, %o3 | |
2574 | stx %fsr, [%l7 + %o3] | |
2575 | srax %o1, 0x06, %i0 | |
2576 | fmovsule %fcc2, %f11, %f14 | |
2577 | stx %fsr, [%l7 + 0x08] | |
2578 | fpsub32 %f20, %f12, %f14 | |
2579 | stx %fsr, [%l7 + 0x20] | |
2580 | nop | |
2581 | setx loop_69, %l0, %l1 | |
2582 | wrpr 0x1, %tl | |
2583 | wrpr %l1, %tnpc | |
2584 | setx 0x011400001402, %l0, %l1 | |
2585 | wrpr %l1, %tstate | |
2586 | wrhpr 0x4, %htstate | |
2587 | rdpr %tt, %l1 | |
2588 | wrpr %g0, %l1, %tt | |
2589 | rdpr %pstate, %l1 | |
2590 | wrpr %g0, %l1, %pstate | |
2591 | rdpr %tl, %l1 | |
2592 | wrpr %g0, %l1, %tl | |
2593 | rdpr %tpc, %l1 | |
2594 | wrpr %g0, %l1, %tpc | |
2595 | rdpr %tnpc, %l1 | |
2596 | wrpr %g0, %l1, %tnpc | |
2597 | rdpr %tstate, %l1 | |
2598 | wrpr %g0, %l1, %tstate | |
2599 | rdpr %tba, %l1 | |
2600 | wrpr %g0, %l1, %tba | |
2601 | rdpr %tba, %l1 | |
2602 | wrpr %g0, %l1, %tba | |
2603 | rdhpr %hpstate, %l1 | |
2604 | wrhpr %g0, %l1, %hpstate | |
2605 | rdhpr %htstate, %l1 | |
2606 | wrhpr %g0, %l1, %htstate | |
2607 | rdhpr %hintp, %l1 | |
2608 | wrhpr %g0, %l1, %hintp | |
2609 | done | |
2610 | fmovdl %fcc2, %f18, %f30 | |
2611 | fmuld8sux16 %f16, %f4, %f2 | |
2612 | edge8n %o0, %l6, %o6 | |
2613 | loop_69: | |
2614 | fbug,a %fcc1, loop_70 | |
2615 | ble,a,pn %xcc, loop_71 | |
2616 | sir 0x1E18 | |
2617 | fabsd %f26, %f28 | |
2618 | loop_70: | |
2619 | fornot2 %f10, %f22, %f14 | |
2620 | loop_71: | |
2621 | fbne,a %fcc1, loop_72 | |
2622 | fandnot2 %f30, %f22, %f6 | |
2623 | fnands %f29, %f3, %f1 | |
2624 | fmovdge %icc, %f28, %f10 | |
2625 | loop_72: | |
2626 | fmovsu %fcc1, %f9, %f20 | |
2627 | fmuld8sux16 %f13, %f11, %f6 | |
2628 | array8 %l1, %l3, %l5 | |
2629 | fmovdvc %xcc, %f20, %f28 | |
2630 | movuge %fcc2, 0x737, %g3 | |
2631 | stx %fsr, [%l7 + 0x50] | |
2632 | stx %fsr, [%l7 + 0x58] | |
2633 | rdpr %wstate, %i5 | |
2634 | movlg %fcc2, %l0, %g1 | |
2635 | tneg %icc, 0x6 | |
2636 | nop | |
2637 | setx 0x5CD49D7881DEB3C5, %l0, %l6 | |
2638 | stx %l6, [%l7 + 0x28] | |
2639 | ldd [%l7 + 0x28], %f16 | |
2640 | setx 0x00E998C4478AEA12, %l1, %l5 | |
2641 | stx %l5, [%l7 + 0x10] | |
2642 | ldd [%l7 + 0x10], %f28 | |
2643 | fsubd %f28, %f16, %f12 | |
2644 | movuge %fcc3, 0x0AE, %o5 | |
2645 | tpos %xcc, 0x4 | |
2646 | ldd [%l7 + 0x40], %f8 | |
2647 | tle %xcc, 0x5 | |
2648 | fmovs %f12, %f18 | |
2649 | fmovsvc %xcc, %f23, %f25 | |
2650 | rdpr %tl, %l4 | |
2651 | fone %f2 | |
2652 | nop | |
2653 | setx loop_73, %l0, %l1 | |
2654 | jmpl %l1, %i6 | |
2655 | nop | |
2656 | set 0x30, %l6 | |
2657 | stx %fsr, [%l7 + %l6] | |
2658 | membar 0x58 | |
2659 | edge8n %o3, %o2, %l2 | |
2660 | loop_73: | |
2661 | fbuge,a,pn %fcc1, loop_74 | |
2662 | stx %fsr, [%l7 + 0x68] | |
2663 | fands %f19, %f16, %f31 | |
2664 | movrne %i4, 0x0AA, %g2 | |
2665 | loop_74: | |
2666 | fmovrslez %i1, %f7, %f6 | |
2667 | wrpr %g4, %g6, %pil | |
2668 | nop | |
2669 | set 0x40, %i0 | |
2670 | stx %fsr, [%l7 + %i0] | |
2671 | srax %o7, 0x00, %g7 | |
2672 | rdhpr %hsys_tick_cmpr, %i2 | |
2673 | rdpr %tl, %o4 | |
2674 | fmovdue %fcc2, %f28, %f28 | |
2675 | fmovrdlez %g5, %f20, %f0 | |
2676 | stx %fsr, [%l7 + 0x08] | |
2677 | wr %i3, 0x1CD7, %y | |
2678 | movn %xcc, %i7, %o1 | |
2679 | fcmpne16 %f12, %f22, %o0 | |
2680 | andcc %l6, %i0, %l1 | |
2681 | nop | |
2682 | set 0x28, %g2 | |
2683 | stx %fsr, [%l7 + %g2] | |
2684 | edge16ln %l3, %l5, %o6 | |
2685 | ||
2686 | or %g0, 0x8, %l0 | |
2687 | sllx %l0, 0x3c, %l0 | |
2688 | wrhpr %l0, 0x477, %hsys_tick_cmpr | |
2689 | nop | |
2690 | set 0x30, %o6 | |
2691 | stx %fsr, [%l7 + %o6] | |
2692 | fmovrdgez %i5, %f24, %f0 | |
2693 | nop | |
2694 | set 0x48, %g1 | |
2695 | stx %fsr, [%l7 + %g1] | |
2696 | fnors %f13, %f1, %f30 | |
2697 | fnot2s %f13, %f23 | |
2698 | be %xcc, loop_75 | |
2699 | nop | |
2700 | set 0x40, %i4 | |
2701 | stx %fsr, [%l7 + %i4] | |
2702 | fmovrdgz %l0, %f12, %f24 | |
2703 | restored | |
2704 | rdpr %cwp, %g1 | |
2705 | rdpr %cansave, %g2 | |
2706 | rdpr %canrestore, %g3 | |
2707 | rdpr %cleanwin, %g4 | |
2708 | rdpr %otherwin, %g5 | |
2709 | rdpr %wstate, %g6 | |
2710 | loop_75: | |
2711 | fmovspos %icc, %f24, %f31 | |
2712 | stx %fsr, [%l7 + 0x50] | |
2713 | nop | |
2714 | set 0x50, %i6 | |
2715 | stx %fsr, [%l7 + %i6] | |
2716 | tg %xcc, 0x7 | |
2717 | movn %icc, 0x2BC, %o5 | |
2718 | wr %g0, 0x80, %asi | |
2719 | swapa [%l7 + 0x28] %asi, %l4 | |
2720 | fnegd %f24, %f6 | |
2721 | movneg %icc, 0x0C5, %i6 | |
2722 | tn %icc, 0x7 | |
2723 | wr %g0, 0x04, %asi | |
2724 | stha %o3, [%l7 + 0x1A] %asi | |
2725 | fba,a %fcc1, loop_76 | |
2726 | fbu %fcc2, loop_77 | |
2727 | nop | |
2728 | set 0x28, %g6 | |
2729 | stx %fsr, [%l7 + %g6] | |
2730 | nop | |
2731 | set 0x5C, %l5 | |
2732 | ldsw [%l7 + %l5], %g1 | |
2733 | loop_76: | |
2734 | fornot1s %f4, %f0, %f22 | |
2735 | loop_77: | |
2736 | brz,pt %l2, loop_78 | |
2737 | edge32ln %o2, %i4, %g2 | |
2738 | rdpr %pil, %i1 | |
2739 | tvc %icc, 0x4 | |
2740 | loop_78: | |
2741 | nop | |
2742 | set 0x10, %i1 | |
2743 | stx %fsr, [%l7 + %i1] | |
2744 | ldstub [%l7 + 0x41], %g6 | |
2745 | nop | |
2746 | set 0x18, %i5 | |
2747 | stx %fsr, [%l7 + %i5] | |
2748 | rdhpr %hsys_tick_cmpr, %o7 | |
2749 | wr %g0, 0x81, %asi | |
2750 | lduha [%l7 + 0x12] %asi, %g7 | |
2751 | rd %tick_cmpr, %g4 | |
2752 | fbo,a,pn %fcc0, loop_79 | |
2753 | fmovdcs %icc, %f20, %f26 | |
2754 | fmovdul %fcc3, %f16, %f30 | |
2755 | umulcc %i2, %g5, %o4 | |
2756 | loop_79: | |
2757 | ld [%l7 + 0x34], %f27 | |
2758 | fbuge,pt %fcc3, loop_80 | |
2759 | nop | |
2760 | fitos %f8, %f26 | |
2761 | fstoi %f26, %f14 | |
2762 | stx %fsr, [%l7 + 0x38] | |
2763 | alignaddrl %i3, %i7, %o0 | |
2764 | loop_80: | |
2765 | add %o1, 0x15B9, %l6 | |
2766 | nop | |
2767 | fitos %f2, %f26 | |
2768 | fstoi %f26, %f11 | |
2769 | fmovsg %fcc0, %f6, %f13 | |
2770 | or %i0, 0x0620, %l1 | |
2771 | array8 %l5, %o6, %g3 | |
2772 | stx %fsr, [%l7 + 0x48] | |
2773 | fmuld8sux16 %f29, %f3, %f10 | |
2774 | nop | |
2775 | set 0x30, %l2 | |
2776 | stx %fsr, [%l7 + %l2] | |
2777 | subccc %l3, 0x0183, %l0 | |
2778 | ta %icc, 0x4 | |
2779 | movrlez %i5, %l4, %i6 | |
2780 | nop | |
2781 | setx 0x64AC9993, %l0, %l6 | |
2782 | st %l6, [%l7 + 0x28] | |
2783 | ld [%l7 + 0x28], %f30 | |
2784 | setx 0x2FC45311, %l1, %l5 | |
2785 | st %l5, [%l7 + 0x10] | |
2786 | ld [%l7 + 0x10], %f16 | |
2787 | fdivs %f16, %f30, %f8 | |
2788 | lduh [%l7 + 0x42], %o3 | |
2789 | rdpr %gl, %g1 | |
2790 | stx %fsr, [%l7 + 0x28] | |
2791 | edge32l %l2, %o2, %i4 | |
2792 | add %l7, 0x38, %l6 | |
2793 | wr %g0, 0x81, %asi | |
2794 | casxa [%l6] %asi, %g2, %i1 | |
2795 | subcc %g6, %o7, %g7 | |
2796 | flushw | |
2797 | nop | |
2798 | set 0x30, %g7 | |
2799 | stx %fsr, [%l7 + %g7] | |
2800 | flushw | |
2801 | nop | |
2802 | set 0x68, %o5 | |
2803 | stx %fsr, [%l7 + %o5] | |
2804 | stx %fsr, [%l7 + 0x18] | |
2805 | fmovsg %icc, %f28, %f19 | |
2806 | ldsh [%l7 + 0x6C], %g4 | |
2807 | nop | |
2808 | set 0x10, %g5 | |
2809 | stx %fsr, [%l7 + %g5] | |
2810 | sethi 0x0675, %o5 | |
2811 | nop | |
2812 | set 0x08, %o7 | |
2813 | stx %fsr, [%l7 + %o7] | |
2814 | movne %icc, 0x13E, %i2 | |
2815 | movge %icc, %g5, %i3 | |
2816 | mova %fcc2, %o4, %i7 | |
2817 | fcmps %fcc0, %f0, %f13 | |
2818 | udiv %o1, 0x0347, %l6 | |
2819 | stx %o0, [%l7 + 0x78] | |
2820 | EXIT_GOOD | |
2821 | ||
2822 | ||
2823 | ||
2824 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
2825 | ! | |
2826 | ! Stats for Thread 5: | |
2827 | ! | |
2828 | ! Type l : 55 | |
2829 | ! Type a : 13 | |
2830 | ! Type cti : 14 | |
2831 | ! Type x : 5 | |
2832 | ! Type f : 57 | |
2833 | ! Type i : 56 | |
2834 | ! | |
2835 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
2836 | ||
2837 | ! | |
2838 | ! Thread 6 Start | |
2839 | ! | |
2840 | main_t6: | |
2841 | mov %l7, %g1 | |
2842 | !# Set %cwp for 8 windows | |
2843 | !# This threads memory space into each %l7 | |
2844 | wrpr %g0, 0x7, %cwp | |
2845 | mov %g1, %l7 | |
2846 | wrpr %g0, 0x6, %cwp | |
2847 | mov %g1, %l7 | |
2848 | wrpr %g0, 0x5, %cwp | |
2849 | mov %g1, %l7 | |
2850 | wrpr %g0, 0x4, %cwp | |
2851 | mov %g1, %l7 | |
2852 | wrpr %g0, 0x3, %cwp | |
2853 | mov %g1, %l7 | |
2854 | wrpr %g0, 0x2, %cwp | |
2855 | mov %g1, %l7 | |
2856 | wrpr %g0, 0x1, %cwp | |
2857 | mov %g1, %l7 | |
2858 | wrpr %g0, 0x0, %cwp | |
2859 | mov %g1, %l7 | |
2860 | ||
2861 | !# Set %fsr | |
2862 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
2863 | stx %l6, [%l7 + 0x0] !# no post process | |
2864 | ldx [%l7 + 0x0], %fsr !# no post process | |
2865 | ||
2866 | !# Initialize registers .. | |
2867 | ||
2868 | !# Global registers | |
2869 | set 0x1, %g1 | |
2870 | set 0x8, %g2 | |
2871 | set 0xB, %g3 | |
2872 | set 0xC, %g4 | |
2873 | set 0x8, %g5 | |
2874 | set 0x8, %g6 | |
2875 | set 0x4, %g7 | |
2876 | !# Input registers | |
2877 | set -0x0, %i0 | |
2878 | set -0x2, %i1 | |
2879 | set -0x1, %i2 | |
2880 | set -0x3, %i3 | |
2881 | set -0xE, %i4 | |
2882 | set -0x1, %i5 | |
2883 | set -0xB, %i6 | |
2884 | set -0x6, %i7 | |
2885 | !# Local registers | |
2886 | set 0x1FD5E5EE, %l0 | |
2887 | set 0x317A3C43, %l1 | |
2888 | set 0x54B10D7B, %l2 | |
2889 | set 0x6893FB67, %l3 | |
2890 | set 0x78C57DF6, %l4 | |
2891 | set 0x571D578D, %l5 | |
2892 | set 0x1DFF2BA2, %l6 | |
2893 | !# Output registers | |
2894 | set -0x0B59, %o0 | |
2895 | set -0x0585, %o1 | |
2896 | set -0x0E1B, %o2 | |
2897 | set 0x18C4, %o3 | |
2898 | set -0x0260, %o4 | |
2899 | set 0x023E, %o5 | |
2900 | set -0x1A5F, %o6 | |
2901 | set -0x0BFF, %o7 | |
2902 | !# Float registers | |
2903 | INIT_TH_FP_REG(%l7,%f0,0x5CDEBE004C9316D6) | |
2904 | INIT_TH_FP_REG(%l7,%f2,0x5AF70778F0C4B088) | |
2905 | INIT_TH_FP_REG(%l7,%f4,0x8D7526625EC515A4) | |
2906 | INIT_TH_FP_REG(%l7,%f6,0xE02F1C846E8760CC) | |
2907 | INIT_TH_FP_REG(%l7,%f8,0x0321EB208EE2B95B) | |
2908 | INIT_TH_FP_REG(%l7,%f10,0x2389D1100A6649F3) | |
2909 | INIT_TH_FP_REG(%l7,%f12,0x67131F7252CC89E3) | |
2910 | INIT_TH_FP_REG(%l7,%f14,0xE9E42F7A627F9BF1) | |
2911 | INIT_TH_FP_REG(%l7,%f16,0x768EE71D99271671) | |
2912 | INIT_TH_FP_REG(%l7,%f18,0x7E12787768E2C912) | |
2913 | INIT_TH_FP_REG(%l7,%f20,0x308AE9F847B82508) | |
2914 | INIT_TH_FP_REG(%l7,%f22,0x4821D99235B5284B) | |
2915 | INIT_TH_FP_REG(%l7,%f24,0xE1625C0F20759DEE) | |
2916 | INIT_TH_FP_REG(%l7,%f26,0x376BF26EBED9E858) | |
2917 | INIT_TH_FP_REG(%l7,%f28,0x3F3211F11C669311) | |
2918 | INIT_TH_FP_REG(%l7,%f30,0xEE9DF5D905EBEBD1) | |
2919 | ||
2920 | !# Execute Main Diag .. | |
2921 | ||
2922 | mulscc %l1, 0x0C72, %i0 | |
2923 | fornot2 %f6, %f30, %f10 | |
2924 | or %l5, 0x1994, %o6 | |
2925 | nop | |
2926 | set 0x50, %i2 | |
2927 | stx %fsr, [%l7 + %i2] | |
2928 | fmovda %fcc0, %f4, %f16 | |
2929 | subc %g3, %l0, %l3 | |
2930 | subc %i5, 0x1D45, %l4 | |
2931 | tcc %icc, 0x7 | |
2932 | taddcctv %o3, %i6, %l2 | |
2933 | stx %fsr, [%l7 + 0x10] | |
2934 | movleu %icc, %o2, %g1 | |
2935 | smul %g2, 0x0AFE, %i1 | |
2936 | nop | |
2937 | setx 0x0865, %l0, %o7 | |
2938 | sdivcc %g6, %o7, %g7 | |
2939 | fnot1s %f23, %f29 | |
2940 | fcmps %fcc2, %f12, %f6 | |
2941 | movrgz %i4, %g4, %o5 | |
2942 | fnands %f17, %f8, %f19 | |
2943 | stx %fsr, [%l7 + 0x18] | |
2944 | fxors %f24, %f15, %f15 | |
2945 | nop | |
2946 | set 0x50, %o4 | |
2947 | stx %fsr, [%l7 + %o4] | |
2948 | fcmps %fcc0, %f22, %f31 | |
2949 | movuge %fcc0, %g5, %i2 | |
2950 | stx %fsr, [%l7 + 0x70] | |
2951 | stx %fsr, [%l7 + 0x70] | |
2952 | ldd [%l7 + 0x50], %f6 | |
2953 | bpos %icc, loop_81 | |
2954 | stx %fsr, [%l7 + 0x48] | |
2955 | fandnot2 %f22, %f14, %f12 | |
2956 | fmovrdgez %i3, %f24, %f12 | |
2957 | loop_81: | |
2958 | fsrc1 %f0, %f20 | |
2959 | set 0x64, %i7 | |
2960 | ldsha [%l7 + %i7] 0x89, %i7 | |
2961 | movrlez %o4, 0x17E, %l6 | |
2962 | popc %o0, %l1 | |
2963 | wrpr %i0, %o1, %cwp | |
2964 | orn %o6, 0x1909, %l5 | |
2965 | stx %fsr, [%l7 + 0x20] | |
2966 | nop | |
2967 | fitod %f2, %f22 | |
2968 | fdtos %f22, %f2 | |
2969 | sub %g3, 0x1AD7, %l3 | |
2970 | fbge %fcc1, loop_82 | |
2971 | fmovdlg %fcc1, %f8, %f4 | |
2972 | nop | |
2973 | set 0x68, %o0 | |
2974 | prefetch [%l7 + %o0], 1 | |
2975 | wr %g0, 0x88, %asi | |
2976 | stha %l0, [%l7 + 0x3A] %asi | |
2977 | loop_82: | |
2978 | nop | |
2979 | set 0x60, %g4 | |
2980 | stx %fsr, [%l7 + %g4] | |
2981 | movuge %fcc0, 0x460, %i5 | |
2982 | array16 %l4, %o3, %l2 | |
2983 | fsrc1s %f26, %f3 | |
2984 | flushw | |
2985 | fcmpne32 %f10, %f20, %i6 | |
2986 | wrpr %o2, 0x1C96, %pil | |
2987 | nop | |
2988 | set 0x50, %l3 | |
2989 | stx %fsr, [%l7 + %l3] | |
2990 | stx %fsr, [%l7 + 0x58] | |
2991 | fmovslg %fcc1, %f1, %f20 | |
2992 | movrgz %g1, %i1, %g2 | |
2993 | fmovdul %fcc1, %f24, %f24 | |
2994 | movrne %g6, %o7, %i4 | |
2995 | fmovsuge %fcc1, %f1, %f22 | |
2996 | sll %g4, 0x0E, %o5 | |
2997 | stx %fsr, [%l7 + 0x30] | |
2998 | fands %f29, %f5, %f13 | |
2999 | fornot1 %f26, %f0, %f12 | |
3000 | tn %icc, 0x5 | |
3001 | fmovdgu %xcc, %f6, %f6 | |
3002 | fcmpne16 %f22, %f12, %g5 | |
3003 | nop | |
3004 | setx 0xEF7A84682230CE9F, %l0, %l6 | |
3005 | stx %l6, [%l7 + 0x28] | |
3006 | ldd [%l7 + 0x28], %f4 | |
3007 | setx 0xFA310361AFAC31B2, %l1, %l5 | |
3008 | stx %l5, [%l7 + 0x10] | |
3009 | ldd [%l7 + 0x10], %f12 | |
3010 | fsubd %f12, %f4, %f18 | |
3011 | fandnot1 %f20, %f8, %f30 | |
3012 | bvs,a,pt %xcc, loop_83 | |
3013 | rdpr %gl, %g7 | |
3014 | nop | |
3015 | fitos %f7, %f4 | |
3016 | fstox %f4, %f24 | |
3017 | array32 %i3, %i2, %o4 | |
3018 | loop_83: | |
3019 | stx %fsr, [%l7 + 0x50] | |
3020 | nop | |
3021 | set 0x58, %o1 | |
3022 | stx %fsr, [%l7 + %o1] | |
3023 | fmovdu %fcc1, %f10, %f14 | |
3024 | movleu %xcc, %i7, %o0 | |
3025 | tge %xcc, 0x0 | |
3026 | fone %f12 | |
3027 | fands %f22, %f9, %f23 | |
3028 | movo %fcc1, 0x6A4, %l1 | |
3029 | fpadd16 %f4, %f30, %f22 | |
3030 | stx %fsr, [%l7 + 0x30] | |
3031 | rdpr %gl, %l6 | |
3032 | fmovsule %fcc2, %f6, %f24 | |
3033 | stx %fsr, [%l7 + 0x60] | |
3034 | smulcc %i0, %o6, %l5 | |
3035 | nop | |
3036 | set 0x50, %l1 | |
3037 | stx %fsr, [%l7 + %l1] | |
3038 | movl %fcc2, %g3, %o1 | |
3039 | movuge %fcc0, 0x462, %l3 | |
3040 | nop | |
3041 | set 0x78, %g3 | |
3042 | stx %fsr, [%l7 + %g3] | |
3043 | rdpr %wstate, %i5 | |
3044 | fmovrslez %l0, %f16, %f3 | |
3045 | fmovsa %fcc1, %f15, %f24 | |
3046 | rdpr %gl, %o3 | |
3047 | xnorcc %l4, %l2, %o2 | |
3048 | movrlz %i6, 0x06D, %i1 | |
3049 | fmul8ulx16 %f14, %f24, %f6 | |
3050 | sra %g1, %g2, %g6 | |
3051 | nop | |
3052 | set 0x10, %i3 | |
3053 | stx %fsr, [%l7 + %i3] | |
3054 | edge8l %i4, %g4, %o7 | |
3055 | fmul8ulx16 %f30, %f12, %f20 | |
3056 | array32 %o5, %g7, %g5 | |
3057 | fmovsgu %icc, %f31, %f14 | |
3058 | nop | |
3059 | set 0x10, %l0 | |
3060 | stx %fsr, [%l7 + %l0] | |
3061 | movvs %xcc, 0x4AA, %i3 | |
3062 | tvc %xcc, 0x0 | |
3063 | fsrc1s %f12, %f22 | |
3064 | nop | |
3065 | fitod %f4, %f14 | |
3066 | fdtox %f14, %f0 | |
3067 | fxtod %f0, %f10 | |
3068 | tgu %xcc, 0x2 | |
3069 | fmovscc %xcc, %f3, %f12 | |
3070 | movn %fcc3, 0x560, %o4 | |
3071 | movvs %icc, %i2, %i7 | |
3072 | tcc %icc, 0x7 | |
3073 | nop | |
3074 | set 0x58, %l4 | |
3075 | stx %fsr, [%l7 + %l4] | |
3076 | nop | |
3077 | fitod %f8, %f28 | |
3078 | fdtoi %f28, %f20 | |
3079 | movlg %fcc2, %l1, %o0 | |
3080 | nop | |
3081 | set 0x18, %o2 | |
3082 | stx %fsr, [%l7 + %o2] | |
3083 | stx %fsr, [%l7 + 0x58] | |
3084 | fnors %f24, %f16, %f7 | |
3085 | fpsub16s %f8, %f0, %f29 | |
3086 | sdiv %l6, 0x118D, %o6 | |
3087 | fmovscc %icc, %f30, %f30 | |
3088 | nop | |
3089 | set 0x30, %l6 | |
3090 | stx %fsr, [%l7 + %l6] | |
3091 | edge16ln %i0, %l5, %g3 | |
3092 | bvs,pn %icc, loop_84 | |
3093 | movcs %icc, %l3, %o1 | |
3094 | fmovrse %i5, %f1, %f28 | |
3095 | rdpr %gl, %o3 | |
3096 | loop_84: | |
3097 | nop | |
3098 | setx 0xDE6EEDC09B91D341, %l0, %l6 | |
3099 | stx %l6, [%l7 + 0x28] | |
3100 | ldd [%l7 + 0x28], %f4 | |
3101 | setx 0xF6E03B37E7D6FF83, %l1, %l5 | |
3102 | stx %l5, [%l7 + 0x10] | |
3103 | ldd [%l7 + 0x10], %f24 | |
3104 | fdivd %f24, %f4, %f8 | |
3105 | addc %l4, 0x1E67, %l0 | |
3106 | ||
3107 | or %g0, 0x8, %l0 | |
3108 | sllx %l0, 0x3c, %l0 | |
3109 | wrhpr %l0, %g0, %hsys_tick_cmpr | |
3110 | andcc %i6, %i1, %l2 | |
3111 | stx %fsr, [%l7 + 0x60] | |
3112 | wr %g0, 0x11, %asi | |
3113 | ldswa [%l7 + 0x34] %asi, %g2 | |
3114 | stx %fsr, [%l7 + 0x08] | |
3115 | nop | |
3116 | fitod %f10, %f14 | |
3117 | fdtoi %f14, %f15 | |
3118 | wr %g1, %i4, %y | |
3119 | nop | |
3120 | setx 0x794ECBA6EAF1C7AE, %l0, %l6 | |
3121 | stx %l6, [%l7 + 0x28] | |
3122 | ldd [%l7 + 0x28], %f10 | |
3123 | setx 0x41B247F21FBD2AA4, %l1, %l5 | |
3124 | stx %l5, [%l7 + 0x10] | |
3125 | ldd [%l7 + 0x10], %f18 | |
3126 | faddd %f18, %f10, %f4 | |
3127 | nop | |
3128 | set 0x10, %i0 | |
3129 | stx %fsr, [%l7 + %i0] | |
3130 | fmuld8ulx16 %f19, %f10, %f4 | |
3131 | xnorcc %g6, 0x0508, %o7 | |
3132 | bgu %xcc, loop_85 | |
3133 | bl,a %xcc, loop_86 | |
3134 | fandnot2 %f18, %f10, %f24 | |
3135 | nop | |
3136 | fitod %f29, %f8 | |
3137 | loop_85: | |
3138 | nop | |
3139 | setx 0xB1FA8A75, %l0, %l6 | |
3140 | st %l6, [%l7 + 0x28] | |
3141 | ld [%l7 + 0x28], %f18 | |
3142 | fsqrts %f18, %f7 | |
3143 | loop_86: | |
3144 | fmovsleu %icc, %f18, %f19 | |
3145 | nop | |
3146 | set 0x4C, %g2 | |
3147 | swap [%l7 + %g2], %g4 | |
3148 | wr %o5, 0x11F5, %pic | |
3149 | fmovscs %xcc, %f25, %f0 | |
3150 | fcmpeq32 %f30, %f28, %g7 | |
3151 | nop | |
3152 | set 0x20, %o6 | |
3153 | stx %fsr, [%l7 + %o6] | |
3154 | stx %fsr, [%l7 + 0x68] | |
3155 | fbug,a %fcc1, loop_87 | |
3156 | fmovsue %fcc2, %f14, %f27 | |
3157 | tvs %icc, 0x1 | |
3158 | movneg %icc, %g5, %o4 | |
3159 | loop_87: | |
3160 | movrgez %i3, 0x18C, %i7 | |
3161 | edge32 %i2, %o0, %l1 | |
3162 | stx %fsr, [%l7 + 0x38] | |
3163 | add %l7, 0x30, %l6 | |
3164 | wr %g0, 0x89, %asi | |
3165 | casa [%l6] %asi, %o6, %l6 | |
3166 | stx %fsr, [%l7 + 0x10] | |
3167 | array32 %i0, %l5, %l3 | |
3168 | fandnot2s %f9, %f4, %f6 | |
3169 | nop | |
3170 | set 0x10, %g1 | |
3171 | stx %fsr, [%l7 + %g1] | |
3172 | fbu %fcc2, loop_88 | |
3173 | edge32 %g3, %o1, %i5 | |
3174 | mulx %l4, %l0, %o3 | |
3175 | nop | |
3176 | set 0x08, %i4 | |
3177 | stx %fsr, [%l7 + %i4] | |
3178 | loop_88: | |
3179 | fxors %f13, %f26, %f12 | |
3180 | nop | |
3181 | set 0x18, %o3 | |
3182 | stx %fsr, [%l7 + %o3] | |
3183 | stx %fsr, [%l7 + 0x10] | |
3184 | stx %fsr, [%l7 + 0x40] | |
3185 | nop | |
3186 | fitos %f3, %f1 | |
3187 | fstoi %f1, %f29 | |
3188 | add %o2, %i6, %l2 | |
3189 | movrlz %g2, %g1, %i4 | |
3190 | movue %fcc1, %i1, %g6 | |
3191 | rd %sys_tick_cmpr, %o7 | |
3192 | fmovrdgez %o5, %f30, %f2 | |
3193 | stx %fsr, [%l7 + 0x30] | |
3194 | wr %g7, 0x07C4, %set_softint | |
3195 | set 0x68, %i6 | |
3196 | stxa %g5, [%l7 + %i6] 0x81 | |
3197 | fpsub32s %f4, %f14, %f31 | |
3198 | stx %fsr, [%l7 + 0x30] | |
3199 | fmovsl %fcc2, %f22, %f10 | |
3200 | stx %fsr, [%l7 + 0x50] | |
3201 | stx %fsr, [%l7 + 0x60] | |
3202 | nop | |
3203 | setx 0x3FE5DC7462E859B8, %l0, %l6 | |
3204 | stx %l6, [%l7 + 0x28] | |
3205 | ldd [%l7 + 0x28], %f18 | |
3206 | fsqrtd %f18, %f10 | |
3207 | nop | |
3208 | set 0x58, %g6 | |
3209 | flush %l7 + %g6 | |
3210 | bcc,pn %icc, loop_89 | |
3211 | nop | |
3212 | set 0x40, %l5 | |
3213 | stx %fsr, [%l7 + %l5] | |
3214 | nop | |
3215 | set 0x20, %i1 | |
3216 | stx %fsr, [%l7 + %i1] | |
3217 | fbg,a,pt %fcc1, loop_90 | |
3218 | loop_89: | |
3219 | nop | |
3220 | set 0x78, %i5 | |
3221 | stx %fsr, [%l7 + %i5] | |
3222 | stx %fsr, [%l7 + 0x40] | |
3223 | set 0x0C, %l2 | |
3224 | swapa [%l7 + %l2] 0x88, %o4 | |
3225 | loop_90: | |
3226 | orncc %g4, %i7, %i2 | |
3227 | EXIT_GOOD | |
3228 | ||
3229 | ||
3230 | ||
3231 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
3232 | ! | |
3233 | ! Stats for Thread 6: | |
3234 | ! | |
3235 | ! Type l : 54 | |
3236 | ! Type a : 12 | |
3237 | ! Type x : 6 | |
3238 | ! Type cti : 10 | |
3239 | ! Type f : 60 | |
3240 | ! Type i : 58 | |
3241 | ! | |
3242 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
3243 | ||
3244 | ! | |
3245 | ! Thread 7 Start | |
3246 | ! | |
3247 | main_t7: | |
3248 | mov %l7, %g1 | |
3249 | !# Set %cwp for 8 windows | |
3250 | !# This threads memory space into each %l7 | |
3251 | wrpr %g0, 0x7, %cwp | |
3252 | mov %g1, %l7 | |
3253 | wrpr %g0, 0x6, %cwp | |
3254 | mov %g1, %l7 | |
3255 | wrpr %g0, 0x5, %cwp | |
3256 | mov %g1, %l7 | |
3257 | wrpr %g0, 0x4, %cwp | |
3258 | mov %g1, %l7 | |
3259 | wrpr %g0, 0x3, %cwp | |
3260 | mov %g1, %l7 | |
3261 | wrpr %g0, 0x2, %cwp | |
3262 | mov %g1, %l7 | |
3263 | wrpr %g0, 0x1, %cwp | |
3264 | mov %g1, %l7 | |
3265 | wrpr %g0, 0x0, %cwp | |
3266 | mov %g1, %l7 | |
3267 | ||
3268 | !# Set %fsr | |
3269 | setx 0x0000000000000000, %l0, %l6 !# no post process | |
3270 | stx %l6, [%l7 + 0x0] !# no post process | |
3271 | ldx [%l7 + 0x0], %fsr !# no post process | |
3272 | ||
3273 | !# Initialize registers .. | |
3274 | ||
3275 | !# Global registers | |
3276 | set 0x1, %g1 | |
3277 | set 0x7, %g2 | |
3278 | set 0x3, %g3 | |
3279 | set 0x2, %g4 | |
3280 | set 0x9, %g5 | |
3281 | set 0xA, %g6 | |
3282 | set 0xD, %g7 | |
3283 | !# Input registers | |
3284 | set -0xA, %i0 | |
3285 | set -0x5, %i1 | |
3286 | set -0x6, %i2 | |
3287 | set -0x4, %i3 | |
3288 | set -0x2, %i4 | |
3289 | set -0x6, %i5 | |
3290 | set -0x7, %i6 | |
3291 | set -0x3, %i7 | |
3292 | !# Local registers | |
3293 | set 0x4F13B718, %l0 | |
3294 | set 0x2D12A4A7, %l1 | |
3295 | set 0x12307B21, %l2 | |
3296 | set 0x53417FC7, %l3 | |
3297 | set 0x32A41835, %l4 | |
3298 | set 0x2F52F856, %l5 | |
3299 | set 0x229377C2, %l6 | |
3300 | !# Output registers | |
3301 | set -0x0A13, %o0 | |
3302 | set 0x0E90, %o1 | |
3303 | set 0x1F95, %o2 | |
3304 | set -0x1927, %o3 | |
3305 | set 0x1595, %o4 | |
3306 | set -0x1614, %o5 | |
3307 | set 0x00C6, %o6 | |
3308 | set 0x1188, %o7 | |
3309 | !# Float registers | |
3310 | INIT_TH_FP_REG(%l7,%f0,0x5CDEBE004C9316D6) | |
3311 | INIT_TH_FP_REG(%l7,%f2,0x5AF70778F0C4B088) | |
3312 | INIT_TH_FP_REG(%l7,%f4,0x8D7526625EC515A4) | |
3313 | INIT_TH_FP_REG(%l7,%f6,0xE02F1C846E8760CC) | |
3314 | INIT_TH_FP_REG(%l7,%f8,0x0321EB208EE2B95B) | |
3315 | INIT_TH_FP_REG(%l7,%f10,0x2389D1100A6649F3) | |
3316 | INIT_TH_FP_REG(%l7,%f12,0x67131F7252CC89E3) | |
3317 | INIT_TH_FP_REG(%l7,%f14,0xE9E42F7A627F9BF1) | |
3318 | INIT_TH_FP_REG(%l7,%f16,0x768EE71D99271671) | |
3319 | INIT_TH_FP_REG(%l7,%f18,0x7E12787768E2C912) | |
3320 | INIT_TH_FP_REG(%l7,%f20,0x308AE9F847B82508) | |
3321 | INIT_TH_FP_REG(%l7,%f22,0x4821D99235B5284B) | |
3322 | INIT_TH_FP_REG(%l7,%f24,0xE1625C0F20759DEE) | |
3323 | INIT_TH_FP_REG(%l7,%f26,0x376BF26EBED9E858) | |
3324 | INIT_TH_FP_REG(%l7,%f28,0x3F3211F11C669311) | |
3325 | INIT_TH_FP_REG(%l7,%f30,0xEE9DF5D905EBEBD1) | |
3326 | ||
3327 | !# Execute Main Diag .. | |
3328 | ||
3329 | fzero %f22 | |
3330 | fcmple16 %f10, %f22, %o0 | |
3331 | srl %l1, 0x1F, %i3 | |
3332 | stx %fsr, [%l7 + 0x70] | |
3333 | rdhpr %hsys_tick_cmpr, %l6 | |
3334 | fmovdule %fcc0, %f2, %f2 | |
3335 | movule %fcc1, %o6, %i0 | |
3336 | andcc %l3, %l5, %g3 | |
3337 | wr %i5, 0x194B, %y | |
3338 | fmovs %f27, %f24 | |
3339 | movcs %xcc, %o1, %l4 | |
3340 | stx %fsr, [%l7 + 0x68] | |
3341 | move %fcc0, %l0, %o3 | |
3342 | sdivcc %i6, 0x155A, %o2 | |
3343 | mulscc %g2, %l2, %i4 | |
3344 | sra %i1, 0x02, %g1 | |
3345 | orcc %g6, %o7, %o5 | |
3346 | fbuge %fcc0, loop_91 | |
3347 | srl %g5, 0x1F, %g7 | |
3348 | stx %fsr, [%l7 + 0x48] | |
3349 | bge,a %icc, loop_92 | |
3350 | loop_91: | |
3351 | movgu %icc, %g4, %i7 | |
3352 | subcc %o4, %o0, %l1 | |
3353 | wrpr %i2, %l6, %pil | |
3354 | loop_92: | |
3355 | edge8 %o6, %i3, %i0 | |
3356 | movrgez %l3, 0x2A2, %l5 | |
3357 | pdist %f22, %f20, %f12 | |
3358 | fmovrde %i5, %f10, %f12 | |
3359 | movleu %xcc, %o1, %l4 | |
3360 | wr %g3, %l0, %set_softint | |
3361 | nop | |
3362 | set 0x60, %o5 | |
3363 | stx %fsr, [%l7 + %o5] | |
3364 | bvs %icc, loop_93 | |
3365 | mova %xcc, 0x414, %i6 | |
3366 | nop | |
3367 | setx 0x0853, %l0, %o3 | |
3368 | udivx %o2, %o3, %g2 | |
3369 | andn %i4, %l2, %g1 | |
3370 | loop_93: | |
3371 | fmovsug %fcc3, %f17, %f17 | |
3372 | stx %fsr, [%l7 + 0x48] | |
3373 | fabsd %f12, %f8 | |
3374 | nop | |
3375 | setx 0x95B675D13208857F, %l0, %l6 | |
3376 | stx %l6, [%l7 + 0x28] | |
3377 | ldd [%l7 + 0x28], %f28 | |
3378 | setx 0xDC74FFE388B651FC, %l1, %l5 | |
3379 | stx %l5, [%l7 + 0x10] | |
3380 | ldd [%l7 + 0x10], %f18 | |
3381 | fmuld %f18, %f28, %f22 | |
3382 | fandnot2 %f16, %f20, %f30 | |
3383 | ta %xcc, 0x2 | |
3384 | fmovsug %fcc2, %f26, %f22 | |
3385 | fmovscc %icc, %f12, %f25 | |
3386 | for %f6, %f12, %f4 | |
3387 | stx %fsr, [%l7 + 0x60] | |
3388 | nop | |
3389 | fitos %f0, %f27 | |
3390 | fstox %f27, %f4 | |
3391 | stx %fsr, [%l7 + 0x60] | |
3392 | bg,a,pn %xcc, loop_94 | |
3393 | nop | |
3394 | set 0x60, %g7 | |
3395 | stx %fsr, [%l7 + %g7] | |
3396 | ||
3397 | or %g0, 0x8, %l0 | |
3398 | sllx %l0, 0x3c, %l0 | |
3399 | wrhpr %l0, 0x46D, %hsys_tick_cmpr | |
3400 | stx %fsr, [%l7 + 0x38] | |
3401 | loop_94: | |
3402 | wr %o5, %g5, %clear_softint | |
3403 | bpos,pt %icc, loop_95 | |
3404 | subccc %g7, %i1, %g4 | |
3405 | nop | |
3406 | set 0x28, %g5 | |
3407 | stx %fsr, [%l7 + %g5] | |
3408 | movrgez %i7, %o4, %o0 | |
3409 | loop_95: | |
3410 | stx %fsr, [%l7 + 0x48] | |
3411 | stx %fsr, [%l7 + 0x48] | |
3412 | call loop_96 | |
3413 | fbue,a %fcc3, loop_97 | |
3414 | fmovslg %fcc2, %f18, %f13 | |
3415 | nop | |
3416 | fitos %f3, %f21 | |
3417 | fstod %f21, %f2 | |
3418 | loop_96: | |
3419 | nop | |
3420 | set 0x58, %i2 | |
3421 | stx %fsr, [%l7 + %i2] | |
3422 | loop_97: | |
3423 | siam 0x6 | |
3424 | sra %i2, 0x03, %l1 | |
3425 | nop | |
3426 | set 0x28, %o4 | |
3427 | stx %fsr, [%l7 + %o4] | |
3428 | nop | |
3429 | set 0x10, %i7 | |
3430 | stx %fsr, [%l7 + %i7] | |
3431 | nop | |
3432 | set 0x10, %o7 | |
3433 | stx %fsr, [%l7 + %o7] | |
3434 | fabss %f19, %f3 | |
3435 | nop | |
3436 | setx 0x0395, %l0, %o6 | |
3437 | udivcc %l6, %o6, %i3 | |
3438 | add %l3, 0x0A5C, %l5 | |
3439 | stx %fsr, [%l7 + 0x10] | |
3440 | fmovsgu %xcc, %f21, %f18 | |
3441 | nop | |
3442 | set 0x60, %g4 | |
3443 | stx %fsr, [%l7 + %g4] | |
3444 | fcmple16 %f20, %f10, %i5 | |
3445 | stx %fsr, [%l7 + 0x28] | |
3446 | fornot2s %f2, %f8, %f27 | |
3447 | stx %fsr, [%l7 + 0x68] | |
3448 | fsrc2 %f8, %f16 | |
3449 | movrlz %o1, %i0, %l4 | |
3450 | stx %fsr, [%l7 + 0x50] | |
3451 | fmovsa %icc, %f24, %f21 | |
3452 | bcs,a,pn %xcc, loop_98 | |
3453 | fmovsne %xcc, %f18, %f24 | |
3454 | movlg %fcc2, 0x751, %g3 | |
3455 | nop | |
3456 | set 0x28, %o0 | |
3457 | stx %fsr, [%l7 + %o0] | |
3458 | loop_98: | |
3459 | fmovsue %fcc1, %f19, %f30 | |
3460 | rdpr %pil, %l0 | |
3461 | fmovscc %icc, %f9, %f20 | |
3462 | fbg,pn %fcc2, loop_99 | |
3463 | ta %xcc, 0x0 | |
3464 | fmovrdgez %o2, %f28, %f14 | |
3465 | stx %fsr, [%l7 + 0x48] | |
3466 | loop_99: | |
3467 | fornot1 %f30, %f0, %f22 | |
3468 | fmovsvc %icc, %f23, %f11 | |
3469 | fmovslg %fcc0, %f9, %f5 | |
3470 | nop | |
3471 | set 0x40, %l3 | |
3472 | stx %fsr, [%l7 + %l3] | |
3473 | fbo %fcc3, loop_100 | |
3474 | movle %icc, %o3, %i6 | |
3475 | nop | |
3476 | setx 0x9D8A80AE, %l0, %l6 | |
3477 | st %l6, [%l7 + 0x28] | |
3478 | ld [%l7 + 0x28], %f3 | |
3479 | setx 0xCE450B4E, %l1, %l5 | |
3480 | st %l5, [%l7 + 0x10] | |
3481 | ld [%l7 + 0x10], %f21 | |
3482 | fmuls %f21, %f3, %f0 | |
3483 | andn %i4, %g2, %g1 | |
3484 | loop_100: | |
3485 | stx %fsr, [%l7 + 0x70] | |
3486 | fcmpgt16 %f2, %f2, %l2 | |
3487 | nop | |
3488 | set 0x20, %o1 | |
3489 | stx %fsr, [%l7 + %o1] | |
3490 | rdpr %pil, %o7 | |
3491 | edge32l %g6, %g5, %o5 | |
3492 | tg %xcc, 0x5 | |
3493 | nop | |
3494 | setx 0x802F6A2256A3A5FD, %l0, %l6 | |
3495 | stx %l6, [%l7 + 0x28] | |
3496 | ldd [%l7 + 0x28], %f6 | |
3497 | setx 0x7F5DA66632A9B09C, %l1, %l5 | |
3498 | stx %l5, [%l7 + 0x10] | |
3499 | ldd [%l7 + 0x10], %f4 | |
3500 | fdivd %f4, %f6, %f4 | |
3501 | ||
3502 | or %g0, 0x8, %l0 | |
3503 | sllx %l0, 0x3c, %l0 | |
3504 | wr %l0, 0xCB6, %tick_cmpr | |
3505 | fmovda %fcc2, %f10, %f14 | |
3506 | nop | |
3507 | set 0x50, %g3 | |
3508 | stx %fsr, [%l7 + %g3] | |
3509 | wr %g4, 0x0FE6, %set_softint | |
3510 | nop | |
3511 | set 0x30, %i3 | |
3512 | stx %fsr, [%l7 + %i3] | |
3513 | taddcctv %g7, 0x15CE, %o4 | |
3514 | rdpr %cleanwin, %i7 | |
3515 | fcmpd %fcc0, %f20, %f16 | |
3516 | movg %fcc3, 0x056, %i2 | |
3517 | fand %f20, %f10, %f28 | |
3518 | rd %fprs, %o0 | |
3519 | fbn,a,pt %fcc3, loop_101 | |
3520 | fmovdvc %icc, %f16, %f6 | |
3521 | wr %g0, 0xe2, %asi | |
3522 | stxa %l1, [%l7 + 0x38] %asi | |
3523 | membar #Sync | |
3524 | loop_101: | |
3525 | bne %xcc, loop_102 | |
3526 | fmovdl %icc, %f22, %f12 | |
3527 | ldd [%l7 + 0x08], %f12 | |
3528 | fmovdug %fcc0, %f18, %f30 | |
3529 | loop_102: | |
3530 | nop | |
3531 | fitos %f10, %f7 | |
3532 | fstox %f7, %f16 | |
3533 | fxtos %f16, %f18 | |
3534 | nop | |
3535 | setx 0x1EA7, %l0, %i3 | |
3536 | sdivx %l6, %i3, %l3 | |
3537 | edge16n %o6, %l5, %o1 | |
3538 | fmovdcc %icc, %f2, %f10 | |
3539 | fmovrsgz %i0, %f28, %f21 | |
3540 | smul %l4, %g3, %l0 | |
3541 | restored | |
3542 | rdpr %cwp, %g1 | |
3543 | rdpr %cansave, %g2 | |
3544 | rdpr %canrestore, %g3 | |
3545 | rdpr %cleanwin, %g4 | |
3546 | rdpr %otherwin, %g5 | |
3547 | rdpr %wstate, %g6 | |
3548 | edge8l %o2, %o3, %i6 | |
3549 | nop | |
3550 | set 0x18, %l0 | |
3551 | stx %fsr, [%l7 + %l0] | |
3552 | rdpr %wstate, %i4 | |
3553 | tle %icc, 0x1 | |
3554 | stx %fsr, [%l7 + 0x58] | |
3555 | fbue %fcc2, loop_103 | |
3556 | bmask %g2, %i5, %l2 | |
3557 | fbl,a,pn %fcc2, loop_104 | |
3558 | fmovsvc %icc, %f8, %f20 | |
3559 | loop_103: | |
3560 | nop | |
3561 | set 0x28, %l4 | |
3562 | stx %fsr, [%l7 + %l4] | |
3563 | wr %g0, 0x0c, %asi | |
3564 | stxa %o7, [%l7 + 0x68] %asi | |
3565 | loop_104: | |
3566 | edge32l %g1, %g6, %g5 | |
3567 | set 0x68, %l1 | |
3568 | ldswa [%l7 + %l1] 0x88, %i1 | |
3569 | fmovsg %xcc, %f12, %f11 | |
3570 | stx %fsr, [%l7 + 0x78] | |
3571 | fmovrsne %o5, %f23, %f24 | |
3572 | bneg %icc, loop_105 | |
3573 | edge8n %g7, %g4, %i7 | |
3574 | fnot1 %f8, %f24 | |
3575 | udivx %o4, 0x0C90, %i2 | |
3576 | loop_105: | |
3577 | fmovdcc %xcc, %f14, %f2 | |
3578 | set 0x28, %o2 | |
3579 | stda %l0, [%l7 + %o2] 0xeb | |
3580 | membar #Sync | |
3581 | fnands %f22, %f22, %f2 | |
3582 | fnands %f31, %f6, %f13 | |
3583 | fmul8x16au %f13, %f0, %f30 | |
3584 | sub %o0, 0x0B03, %i3 | |
3585 | stx %fsr, [%l7 + 0x28] | |
3586 | fnands %f24, %f26, %f10 | |
3587 | movl %fcc2, 0x750, %l6 | |
3588 | stx %fsr, [%l7 + 0x48] | |
3589 | wrpr %l3, 0x1174, %pil | |
3590 | nop | |
3591 | set 0x64, %i0 | |
3592 | ldsw [%l7 + %i0], %l5 | |
3593 | fsrc1s %f9, %f20 | |
3594 | nop | |
3595 | set 0x38, %g2 | |
3596 | stx %fsr, [%l7 + %g2] | |
3597 | ||
3598 | or %g0, 0x8, %l0 | |
3599 | sllx %l0, 0x3c, %l0 | |
3600 | wrhpr %l0, 0xC29, %hsys_tick_cmpr | |
3601 | move %xcc, %i0, %l4 | |
3602 | taddcctv %o6, 0x1A37, %g3 | |
3603 | fcmpes %fcc1, %f24, %f3 | |
3604 | fbge,a,pt %fcc2, loop_106 | |
3605 | nop | |
3606 | set 0x14, %l6 | |
3607 | ldstub [%l7 + %l6], %l0 | |
3608 | alignaddrl %o2, %i6, %o3 | |
3609 | fmovscc %xcc, %f23, %f1 | |
3610 | loop_106: | |
3611 | fmovsgu %xcc, %f23, %f18 | |
3612 | fbug,pt %fcc3, loop_107 | |
3613 | stx %fsr, [%l7 + 0x30] | |
3614 | add %g2, %i5, %i4 | |
3615 | nop | |
3616 | set 0x68, %o6 | |
3617 | stx %fsr, [%l7 + %o6] | |
3618 | loop_107: | |
3619 | nop | |
3620 | set 0x78, %g1 | |
3621 | stx %fsr, [%l7 + %g1] | |
3622 | stx %fsr, [%l7 + 0x78] | |
3623 | sll %l2, %g1, %g6 | |
3624 | movn %xcc, %o7, %i1 | |
3625 | movne %fcc3, %g5, %g7 | |
3626 | sethi 0x0C74, %o5 | |
3627 | edge32 %i7, %o4, %i2 | |
3628 | nop | |
3629 | setx 0x5580E7568B0F7D03, %l0, %l6 | |
3630 | stx %l6, [%l7 + 0x38] | |
3631 | ldx [%l7 + 0x38], %fsr | |
3632 | te %icc, 0x1 | |
3633 | nop | |
3634 | set 0x40, %i4 | |
3635 | stx %fsr, [%l7 + %i4] | |
3636 | bcc,a %icc, loop_108 | |
3637 | wr %g0, 0x4, %fprs | |
3638 | fpackfix %f14, %f5 | |
3639 | fmovsle %xcc, %f14, %f9 | |
3640 | loop_108: | |
3641 | bmask %i3, %l6, %l3 | |
3642 | fmovdg %xcc, %f4, %f14 | |
3643 | EXIT_GOOD | |
3644 | ||
3645 | ||
3646 | ||
3647 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
3648 | ! | |
3649 | ! Stats for Thread 7: | |
3650 | ! | |
3651 | ! Type l : 48 | |
3652 | ! Type a : 16 | |
3653 | ! Type x : 4 | |
3654 | ! Type cti : 18 | |
3655 | ! Type f : 58 | |
3656 | ! Type i : 56 | |
3657 | ! | |
3658 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
3659 | ||
3660 | ||
3661 | EXIT_GOOD /* test finish */ | |
3662 | ||
3663 | /************************************************************************ | |
3664 | Test case data start | |
3665 | ************************************************************************/ | |
3666 | .data | |
3667 | user_data_start: | |
3668 | scratch_area: | |
3669 | .word 0x4F038F7E | |
3670 | .word 0x59AD8E35 | |
3671 | .word 0x47154752 | |
3672 | .word 0x0582082C | |
3673 | .word 0x8EC2FD84 | |
3674 | .word 0x8A1B2712 | |
3675 | .word 0x09DA7F5A | |
3676 | .word 0xFFF360AB | |
3677 | .word 0x6E60B5DF | |
3678 | .word 0xC7F34AC3 | |
3679 | .word 0xA2F5C26A | |
3680 | .word 0x34C4D3B9 | |
3681 | .word 0xE13BCC6E | |
3682 | .word 0x5C304E45 | |
3683 | .word 0xD28D3334 | |
3684 | .word 0xDE999812 | |
3685 | .word 0xAF83AB51 | |
3686 | .word 0x346EEE31 | |
3687 | .word 0xD9F5F318 | |
3688 | .word 0x0109166D | |
3689 | .word 0x6B350FB4 | |
3690 | .word 0x462CAF1E | |
3691 | .word 0x9C8E9B92 | |
3692 | .word 0x8A4FD604 | |
3693 | .word 0xEF0D03F2 | |
3694 | .word 0xEFCEB4DF | |
3695 | .word 0x1892238E | |
3696 | .word 0xF990C067 | |
3697 | .word 0x74D39EF7 | |
3698 | .word 0x9BCABC53 | |
3699 | .word 0x180F7A76 | |
3700 | .word 0x8EAA6F83 | |
3701 | .word 0x72F5288E | |
3702 | .word 0x433A8197 | |
3703 | .word 0x896EF5B0 | |
3704 | .word 0x86012CE6 | |
3705 | .word 0xFA7592F6 | |
3706 | .word 0x94985A73 | |
3707 | .word 0x114BE7C9 | |
3708 | .word 0x97F0D9B8 | |
3709 | .word 0x2F1876DC | |
3710 | .word 0x0C59B589 | |
3711 | .word 0x84AB4625 | |
3712 | .word 0xDEFD5E3B | |
3713 | .word 0xD8F86E1A | |
3714 | .word 0x35790508 | |
3715 | .word 0xD5B76A03 | |
3716 | .word 0x767FE98E | |
3717 | .word 0xA292ED36 | |
3718 | .word 0x3A6858DF | |
3719 | .word 0xF5B0D4B6 | |
3720 | .word 0xEE395E25 | |
3721 | .word 0xBD2ECB67 | |
3722 | .word 0x810F8503 | |
3723 | .word 0x7F89E537 | |
3724 | .word 0xF8B02438 | |
3725 | .word 0xC163552F | |
3726 | .word 0x010E8C6F | |
3727 | .word 0xFF72E895 | |
3728 | .word 0x346856AF | |
3729 | .word 0x4E88F81E | |
3730 | .word 0x88E38DD5 | |
3731 | .word 0x0F24855E | |
3732 | .word 0x55C227F7 | |
3733 | .end |