[OpenSPARC-T2-DV] / verif / diag / assembly / include / daccess_prot_handler.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: daccess_prot_handler.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
daccess_prot_handler:	
#ifdef CHECK_SFSR_SFAR
        mov     0x18, %g7
        ldxa    [%g7] ASI_PARTITION_ID, %g2         ! get sfsr
        mov     0x20, %g7
        ldxa    [%g7] ASI_PARTITION_ID, %g3         ! get sfar
#endif
#ifdef EX_TRAPCHECK
	! extended trapcheck returns traptype
	mov	0x68,	%o0
#endif 
	mov	ASI_DMMU_TAG_ACCESS_VAL, %g7
	ldxa	[%g7] ASI_DMMU_TAG_REG, %g6		! get va/context from tag-access

#ifndef USE_SOFTWARE_PTR_CALC
    
    mov ASI_DTSB_PTR_0, %g7

dacc_prot_tsbptr_calc:

    ldxa    [%g7] ASI_DTSB_PTR, %g1     

#else

dacc_prot_conf_0:
	! Load TSB_CONFIG address in %g7
        mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_0, %g7
	
dacc_prot_tsbptr_calc:	
!Uses g1-g5, Expects TSB_CONFIG address in %g7, va in %g6, REsults in %g1
!Leave %g6 intact
#include "mmu_ptr_calc.s"

#endif
    
dacc_load_entry:		
	ldda	[%g1] ASI_NUCLEUS_QUAD_LDD, %g4		! load tte from ps0 tsb
	ldxa	[%g0] ASI_DMMU_TAG_REG, %g2		! get va/context from tag-target
	cmp	%g2, %g4
	bne	%xcc, dacc_prot_check_for_ptr_chase
	nop
	ba	dacc_prot_trap_done
	mov	0x80, %g1
	

dacc_prot_check_for_ptr_chase:
    cmp %g4, -1         ! if all 1's, follow link
    be,a    %xcc, dacc_prot_ptr_chase
    nop

    !! Look up all config registers (1-3)

    
#ifndef USE_SOFTWARE_PTR_CALC
    ! %g7 contains last pointer used ..
    ! %g7 contains last pointer used ..
1:
dacc_prot_config_0:	
	cmp	%g7, ASI_DTSB_PTR_1
	bge	%xcc, dacc_prot_config_1
	nop
	mov	ASI_DTSB_PTR_1, %g7
	ldxa	[%g7] ASI_DTSB_PTR, %g1
	ba	dacc_load_entry
	nop
dacc_prot_config_1:
	cmp	%g7, ASI_DTSB_PTR_2
	bge	%xcc, dacc_prot_config_2
	nop
	mov	ASI_DTSB_PTR_2, %g7
	ldxa	[%g7] ASI_DTSB_PTR, %g1
	ba	dacc_load_entry
	nop
dacc_prot_config_2:
	cmp	%g7, ASI_DTSB_PTR_3
	bge	%xcc, dacc_prot_config_3
	nop
	mov	ASI_DTSB_PTR_3, %g7
	ldxa	[%g7] ASI_DTSB_PTR, %g1
	ba	dacc_load_entry
	nop
dacc_prot_config_3:


#else

    !! Gotta do SW table walk through the 3 remaing configs ..
    ! Expect %g7 to stll have addr of last ctx0 config register
    ! and %g6 should have va/context from tag access register

    ! Normalize %g7
    sllx %g6, 51, %g5
    brnz,a %g5, 1f
    sub %g7, 0x20, %g7     ! this executes only if branch taken

1:

    cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1
    bl,a dacc_prot_tsbptr_calc
dacc_prot_conf_1:
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1, %g7

    cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2
    bl,a dacc_prot_tsbptr_calc
dacc_prot_conf_2:
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2, %g7

    cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3
    bl,a dacc_prot_tsbptr_calc
dacc_prot_conf_3:
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g7

#endif

#ifndef SUN4V
	sllx	%g5, 15, %g3		! extract size[2]
	srlx	%g3, 61, %g3
	sllx	%g5, 1, %g1		! extract size[1:0]
	srlx	%g1, 62, %g1
	or	%g3, %g1, %g1		! %g1 = size[2:0]
#else
	sllx	%g5, 61, %g1
	srlx	%g1, 61, %g1            ! %g1 = size[2:0]
#endif
	mulx	%g1, 3, %g1
	sub	%g0, 1, %g3
	sllx	%g3, 13, %g3
	sllx	%g3, %g1, %g3
        sethi   %hi(0x00001fff), %g1
        or      %g1, 0xfff, %g1
	or	%g3, %g1, %g3		! %g3 = va/ctxt mask based on size[2:0]

	and	%g2, %g3, %g3		! apply mask
	cmp	%g3, %g4		! check if va/ctxt match
	be	%xcc, dacc_prot_trap_done
	nop
	
dapno_tte_in_tsb:
    nop
#ifdef DMMU_SKIP_IF_NO_TTE
    done
    nop
#endif

dacc_prot_ptr_chase:
    or  %g5, %g0, %g3           ! %g3 is link-reg
dacc_prot_ptr_chase_loop:
    ldda    [%g3] ASI_NUCLEUS_QUAD_LDD, %g4     ! load tte from tsb
    ldxa    [%g0] ASI_DMMU_TAG_REG, %g2     ! get va/context from tag-target
    cmp %g2, %g4
    bne %xcc, dacc_prot_follow_link
    nop
    ba  dacc_prot_trap_done
    mov ASI_PARTITION_ID_VAL, %g1       ! offset (VA) for patrition id

dacc_prot_follow_link:
    ldx [%g3+16], %g3
    cmp %g3, -1
    bne %xcc, dacc_prot_ptr_chase_loop ! keep chasing pointer
    nop

dacc_prot_next_tsb:
    ! Look up the Next TSB, until done with all TSBs ?
#ifndef USE_SOFTWARE_PTR_CALC
    cmp %g7, ASI_DTSB_PTR_3
    bl 1b
    nop
#else
    ! Compare with TSB_CONFIG_3 for ctx0 and TSB_CONFIG_3+0x20 for ctx!0
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g4
    sllx %g6, 51, %g5
    brnz,a %g5, 2f
    sub %g7, 0x20, %g7
2:  
    cmp %g7, %g4
    bl 1b
    nop		

#endif

dacc_prot_trap_done:
	!! check to see if RA[39] is set.
	!! RA[39] = 0 means accessing memory space
	!! RA[39] = 1 means accessing I/O space
	mov	%g5, %g3
	sllx	%g3, 24, %g3
	srlx	%g3, 63, %g3
	brnz	%g3, dacc_prot_skip_part_base	
	! add partition base to data-in
	setx	partition_base_list, %g3, %g2	! for partition base
	ldxa	[%g1] ASI_PARTITION_ID, %g3		! partition id
	sllx	%g3, 3, %g3		! offset - partition list
	ldx	[%g2 + %g3], %g1
	add	%g5, %g1, %g5
dacc_prot_skip_part_base:	
	mov	0x30, %g7
	mov     0x000, %g6
	mov	0x40, %g1		! set W-bit
	or	%g1, %g5, %g5
	!stxa	%g4, [ %g7 ] ASI_PARTITION_ID	! {tag-access, data-in}
	stxa	%g5, [ %g6 ] ASI_DTLB_DATA_IN 
	retry 


!!
!!	

	
dacc_prot_handler_ext:
	cmp	%g4, -1			! if all 1's, follow link
	be,a	%xcc, dacc_prot_ptr_chase
	mov	0, %g7			! remember ptr chase from ps0

    !! Look up all config registers (1-3)

#ifndef USE_SOFTWARE_PTR_CALC
    ! %g7 contains last pointer used ..
1:
    cmp %g7, ASI_DTSB_PTR_1
    bl,a dmmu_tsbptr_calc
    mov ASI_DTSB_PTR_1, %g7

    cmp %g7, ASI_DTSB_PTR_2
    bl,a dmmu_tsbptr_calc
    mov ASI_DTSB_PTR_2, %g7

    cmp %g7, ASI_DTSB_PTR_3
    bl,a dmmu_tsbptr_calc
    mov ASI_DTSB_PTR_3, %g7

#else

    !! Gotta do SW table walk through the 3 remaing configs ..
    ! Expect %g7 to stll have addr of last ctx0 config register
    ! and %g6 should have va/context from tag access register

    ! Normalize %g7
    sllx %g6, 51, %g5
    brnz,a %g5, 1f
    sub %g7, 0x20, %g7     ! this executes only if branch taken

1:

    cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1
    bl,a dacc_prot_tsbptr_calc
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1, %g7

    cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2
    bl,a dacc_prot_tsbptr_calc
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2, %g7

    cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3
    bl,a dacc_prot_tsbptr_calc
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g7


#endif

#ifndef SUN4V
	sllx	%g5, 15, %g3		! extract size[2]
	srlx	%g3, 61, %g3
	sllx	%g5, 1, %g1		! extract size[1:0]
	srlx	%g1, 62, %g1
	or	%g3, %g1, %g1		! %g1 = size[2:0]
#else
	sllx	%g5, 61, %g1
	srlx	%g1, 61, %g1            ! %g1 = size[2:0]
#endif
	mulx	%g1, 3, %g1
	sub	%g0, 1, %g3
	sllx	%g3, 13, %g3
	sllx	%g3, %g1, %g3
    sethi   %hi(0x00001fff), %g1
    or      %g1, 0xfff, %g1
	or	%g3, %g1, %g3		! %g3 = va/ctxt mask based on size[2:0]

	and	%g2, %g3, %g3		! apply mask
	cmp	%g3, %g4		! check if va/ctxt match
	be,a	%xcc, dacc_prot_trap_done
	mov	0x80, %g1		! offset (VA) for patrition id
		

dacno_tte_in_tsb:
    nop
#ifdef DMMU_SKIP_IF_NO_TTE
    done
    nop
#endif
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: daccess_prot_handler.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	daccess_prot_handler:
	39	#ifdef CHECK_SFSR_SFAR
	40	mov 0x18, %g7
	41	ldxa [%g7] ASI_PARTITION_ID, %g2 ! get sfsr
	42	mov 0x20, %g7
	43	ldxa [%g7] ASI_PARTITION_ID, %g3 ! get sfar
	44	#endif
	45	#ifdef EX_TRAPCHECK
	46	! extended trapcheck returns traptype
	47	mov 0x68, %o0
	48	#endif
	49	mov ASI_DMMU_TAG_ACCESS_VAL, %g7
	50	ldxa [%g7] ASI_DMMU_TAG_REG, %g6 ! get va/context from tag-access
	51
	52	#ifndef USE_SOFTWARE_PTR_CALC
	53
	54	mov ASI_DTSB_PTR_0, %g7
	55
	56	dacc_prot_tsbptr_calc:
	57
	58	ldxa [%g7] ASI_DTSB_PTR, %g1
	59
	60	#else
	61
	62	dacc_prot_conf_0:
	63	! Load TSB_CONFIG address in %g7
	64	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_0, %g7
65
66	dacc_prot_tsbptr_calc:
67	!Uses g1-g5, Expects TSB_CONFIG address in %g7, va in %g6, REsults in %g1
68	!Leave %g6 intact
69	#include "mmu_ptr_calc.s"
70
71	#endif
72
73	dacc_load_entry:
74	ldda [%g1] ASI_NUCLEUS_QUAD_LDD, %g4 ! load tte from ps0 tsb
75	ldxa [%g0] ASI_DMMU_TAG_REG, %g2 ! get va/context from tag-target
76	cmp %g2, %g4
77	bne %xcc, dacc_prot_check_for_ptr_chase
78	nop
79	ba dacc_prot_trap_done
80	mov 0x80, %g1
81
82
83	dacc_prot_check_for_ptr_chase:
84	cmp %g4, -1 ! if all 1's, follow link
85	be,a %xcc, dacc_prot_ptr_chase
86	nop
87
88	!! Look up all config registers (1-3)
89
90
91	#ifndef USE_SOFTWARE_PTR_CALC
92	! %g7 contains last pointer used ..
93	! %g7 contains last pointer used ..
94	1:
95	dacc_prot_config_0:
96	cmp %g7, ASI_DTSB_PTR_1
97	bge %xcc, dacc_prot_config_1
98	nop
99	mov ASI_DTSB_PTR_1, %g7
100	ldxa [%g7] ASI_DTSB_PTR, %g1
101	ba dacc_load_entry
102	nop
103	dacc_prot_config_1:
104	cmp %g7, ASI_DTSB_PTR_2
105	bge %xcc, dacc_prot_config_2
106	nop
107	mov ASI_DTSB_PTR_2, %g7
108	ldxa [%g7] ASI_DTSB_PTR, %g1
109	ba dacc_load_entry
110	nop
111	dacc_prot_config_2:
112	cmp %g7, ASI_DTSB_PTR_3
113	bge %xcc, dacc_prot_config_3
114	nop
115	mov ASI_DTSB_PTR_3, %g7
116	ldxa [%g7] ASI_DTSB_PTR, %g1
117	ba dacc_load_entry
118	nop
119	dacc_prot_config_3:
120
121
122	#else
123
124	!! Gotta do SW table walk through the 3 remaing configs ..
125	! Expect %g7 to stll have addr of last ctx0 config register
126	! and %g6 should have va/context from tag access register
127
128	! Normalize %g7
129	sllx %g6, 51, %g5
130	brnz,a %g5, 1f
131	sub %g7, 0x20, %g7 ! this executes only if branch taken
132
133	1:
134
135	cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1
136	bl,a dacc_prot_tsbptr_calc
137	dacc_prot_conf_1:
138	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1, %g7
139
140	cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2
141	bl,a dacc_prot_tsbptr_calc
142	dacc_prot_conf_2:
143	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2, %g7
144
145	cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3
146	bl,a dacc_prot_tsbptr_calc
147	dacc_prot_conf_3:
148	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g7
149
150	#endif
151
152	#ifndef SUN4V
153	sllx %g5, 15, %g3 ! extract size[2]
154	srlx %g3, 61, %g3
155	sllx %g5, 1, %g1 ! extract size[1:0]
156	srlx %g1, 62, %g1
157	or %g3, %g1, %g1 ! %g1 = size[2:0]
158	#else
159	sllx %g5, 61, %g1
160	srlx %g1, 61, %g1 ! %g1 = size[2:0]
161	#endif
162	mulx %g1, 3, %g1
163	sub %g0, 1, %g3
164	sllx %g3, 13, %g3
165	sllx %g3, %g1, %g3
166	sethi %hi(0x00001fff), %g1
167	or %g1, 0xfff, %g1
168	or %g3, %g1, %g3 ! %g3 = va/ctxt mask based on size[2:0]
169
170	and %g2, %g3, %g3 ! apply mask
171	cmp %g3, %g4 ! check if va/ctxt match
172	be %xcc, dacc_prot_trap_done
173	nop
174
175	dapno_tte_in_tsb:
176	nop
177	#ifdef DMMU_SKIP_IF_NO_TTE
178	done
179	nop
180	#endif
181
182	dacc_prot_ptr_chase:
183	or %g5, %g0, %g3 ! %g3 is link-reg
184	dacc_prot_ptr_chase_loop:
185	ldda [%g3] ASI_NUCLEUS_QUAD_LDD, %g4 ! load tte from tsb
186	ldxa [%g0] ASI_DMMU_TAG_REG, %g2 ! get va/context from tag-target
187	cmp %g2, %g4
188	bne %xcc, dacc_prot_follow_link
189	nop
190	ba dacc_prot_trap_done
191	mov ASI_PARTITION_ID_VAL, %g1 ! offset (VA) for patrition id
192
193	dacc_prot_follow_link:
194	ldx [%g3+16], %g3
195	cmp %g3, -1
196	bne %xcc, dacc_prot_ptr_chase_loop ! keep chasing pointer
197	nop
198
199	dacc_prot_next_tsb:
200	! Look up the Next TSB, until done with all TSBs ?
201	#ifndef USE_SOFTWARE_PTR_CALC
202	cmp %g7, ASI_DTSB_PTR_3
203	bl 1b
204	nop
205	#else
206	! Compare with TSB_CONFIG_3 for ctx0 and TSB_CONFIG_3+0x20 for ctx!0
207	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g4
208	sllx %g6, 51, %g5
209	brnz,a %g5, 2f
210	sub %g7, 0x20, %g7
211	2:
212	cmp %g7, %g4
213	bl 1b
214	nop
215
216	#endif
217
218	dacc_prot_trap_done:
219	!! check to see if RA[39] is set.
220	!! RA[39] = 0 means accessing memory space
221	!! RA[39] = 1 means accessing I/O space
222	mov %g5, %g3
223	sllx %g3, 24, %g3
224	srlx %g3, 63, %g3
225	brnz %g3, dacc_prot_skip_part_base
226	! add partition base to data-in
227	setx partition_base_list, %g3, %g2 ! for partition base
228	ldxa [%g1] ASI_PARTITION_ID, %g3 ! partition id
229	sllx %g3, 3, %g3 ! offset - partition list
230	ldx [%g2 + %g3], %g1
231	add %g5, %g1, %g5
232	dacc_prot_skip_part_base:
233	mov 0x30, %g7
234	mov 0x000, %g6
235	mov 0x40, %g1 ! set W-bit
236	or %g1, %g5, %g5
237	!stxa %g4, [ %g7 ] ASI_PARTITION_ID ! {tag-access, data-in}
238	stxa %g5, [ %g6 ] ASI_DTLB_DATA_IN
239	retry
240
241
242	!!
243	!!
244
245
246	dacc_prot_handler_ext:
247	cmp %g4, -1 ! if all 1's, follow link
248	be,a %xcc, dacc_prot_ptr_chase
249	mov 0, %g7 ! remember ptr chase from ps0
250
251	!! Look up all config registers (1-3)
252
253	#ifndef USE_SOFTWARE_PTR_CALC
254	! %g7 contains last pointer used ..
255	1:
256	cmp %g7, ASI_DTSB_PTR_1
257	bl,a dmmu_tsbptr_calc
258	mov ASI_DTSB_PTR_1, %g7
259
260	cmp %g7, ASI_DTSB_PTR_2
261	bl,a dmmu_tsbptr_calc
262	mov ASI_DTSB_PTR_2, %g7
263
264	cmp %g7, ASI_DTSB_PTR_3
265	bl,a dmmu_tsbptr_calc
266	mov ASI_DTSB_PTR_3, %g7
267
268	#else
269
270	!! Gotta do SW table walk through the 3 remaing configs ..
271	! Expect %g7 to stll have addr of last ctx0 config register
272	! and %g6 should have va/context from tag access register
273
274	! Normalize %g7
275	sllx %g6, 51, %g5
276	brnz,a %g5, 1f
277	sub %g7, 0x20, %g7 ! this executes only if branch taken
278
279	1:
280
281	cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1
282	bl,a dacc_prot_tsbptr_calc
283	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1, %g7
284
285	cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2
286	bl,a dacc_prot_tsbptr_calc
287	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2, %g7
288
289	cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3
290	bl,a dacc_prot_tsbptr_calc
291	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g7
292
293
294	#endif
295
296	#ifndef SUN4V
297	sllx %g5, 15, %g3 ! extract size[2]
298	srlx %g3, 61, %g3
299	sllx %g5, 1, %g1 ! extract size[1:0]
300	srlx %g1, 62, %g1
301	or %g3, %g1, %g1 ! %g1 = size[2:0]
302	#else
303	sllx %g5, 61, %g1
304	srlx %g1, 61, %g1 ! %g1 = size[2:0]
305	#endif
306	mulx %g1, 3, %g1
307	sub %g0, 1, %g3
308	sllx %g3, 13, %g3
309	sllx %g3, %g1, %g3
310	sethi %hi(0x00001fff), %g1
311	or %g1, 0xfff, %g1
312	or %g3, %g1, %g3 ! %g3 = va/ctxt mask based on size[2:0]
313
314	and %g2, %g3, %g3 ! apply mask
315	cmp %g3, %g4 ! check if va/ctxt match
316	be,a %xcc, dacc_prot_trap_done
317	mov 0x80, %g1 ! offset (VA) for patrition id
318
319
320	dacno_tte_in_tsb:
321	nop
322	#ifdef DMMU_SKIP_IF_NO_TTE
323	done
324	nop
325	#endif
326