[OpenSPARC-T2-DV] / verif / diag / assembly / include / dmmu_miss_handler_ext.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: dmmu_miss_handler_ext.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
dmmu_miss_handler:  	
	

#ifdef EX_TRAPCHECK
	! extended trapcheck returns traptype
	mov	0x68,	%o0
#endif
	mov	ASI_DMMU_TAG_ACCESS_VAL, %g7
	ldxa	[%g7] ASI_DMMU_TAG_REG, %g6		! get va/context from tag-access

#ifdef USE_SOFTWARE_PTR_CALC
    ! SW Implementation of PTR register calQlations

dconfig_0:
    ! Load TSB_CONFIG address in %g7
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_0, %g7

dmmu_tsbptr_calc:
!Uses g1-g5, Expects TSB_CONFIG address in %g7, va in %g6, REsults in %g1
!Leave %g6 intact
#include <mmu_ptr_calc.s>
    
#else
        
    mov ASI_DTSB_PTR_0, %g7

dmmu_tsbptr_calc:

    ldxa    [%g7] ASI_DTSB_PTR, %g1
    
#endif

#ifdef MIMIC_SOLARIS
	srlx	%g0, %g0, %g0
	brnz	%g0, HT0_Fast_Data_Access_MMU_Miss_0x68
	sll	%g0, %g0, %g0
	xor	%g0, %g0, %g0
#endif
    

dload_entry:
	ldda	[%g1] ASI_NUCLEUS_QUAD_LDD, %g4		! load tte from  tsb
	srlx	%g5, 63, %g2                        ! Check valid bit ..
	brz,a	%g2, dmmu_check_for_ptr_chase
    cmp %g4, -1                             ! if all 1's, follow link
	ldxa	[%g0] ASI_DMMU_TAG_REG, %g2		! get va/context from tag-target
#ifdef DMMU_HAS_SHARED_CTXT
check_dmmu_has_shared_ctx:
    ! If this TSB has use_ctxt bits set, then mask context
    ! 1. Get TSB config (%g7 has TSB_CONFIG addr OR TSB_PTR addr)
#ifndef USE_SOFTWARE_PTR_CALC
    sllx %g6, 51, %g3
    brz,a %g3, compare_ttetag_d            ! Ignore shared ctx for nucleus
	stxa %g0, [%g0]ASI_SCRATCHPAD          ! Save decision for later
    sub %g7, 0x40, %g3                     ! %g3 has TSB config ADDR
#else 
    mov %g7, %g3                           ! %g3 has TSB config ADDR
#endif
    ldxa [%g3] ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %g3 
check_use_ctx_d:
    srlx %g3, 61, %g3
    and %g3, 3, %g3                         ! %g3 has use_ctx bits ..
    brz %g3, compare_ttetag_d
	stxa %g3, [%g0]ASI_SCRATCHPAD          ! Save decision for later
mask_ctx_d:
    sethi %hi(0x1fff0000), %g1
    sllx %g1, 32, %g1                       ! Create mask for ctxt in tag target
    andn %g2, %g1, %g2                      ! Masked tag target (%g2) 
    andn %g4, %g1, %g4                      ! Masked tte tag (%g4)
#endif
compare_ttetag_d:
	cmp	%g2, %g4
	be	%xcc, dmmu_trap_done
	mov	0x80, %g1		! offset (VA) for patrition id

    andcc %g5, 0x4, %g1                     ! Check TTE size for mask
	bz,a	dmmu_check_for_ptr_chase        ! size <5 .. no masking reqd
    cmp %g4, -1                             ! if all 1's, follow link
    andn %g2, 0x3f, %g2                     ! mask out bits 22:27
	cmp	%g2, %g4                            ! Now compare masked tag target
	be	%xcc, dmmu_trap_done
	mov	0x80, %g1		                    ! offset (VA) for patrition id


dmmu_check_for_ptr_chase:    
    cmp %g4, -1                             ! if all 1's, follow link
    be,a    %xcc, dmmu_ptr_chase
    nop

    !! Look up all config registers (1-3)
    
#ifdef USE_SOFTWARE_PTR_CALC

    !! Gotta do SW table walk through the 3 remaing configs ..
    ! Expect %g7 to stll have addr of last ctx0 config register
    ! and %g6 should have va/context from tag access register

    ! Normalize %g7
    sllx %g6, 51, %g5
    brnz,a %g5, 1f
    sub %g7, 0x20, %g7     ! this executes only if branch taken

1:

    cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1
    bl,a dmmu_tsbptr_calc
dconfig_1:
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1, %g7

    cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2
    bl,a dmmu_tsbptr_calc
dconfig_2:
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2, %g7

    cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3
    bl,a dmmu_tsbptr_calc
dconfig_3:
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g7
    
#else

    ! %g7 contains last pointer used ..
1:
dconfig_1:
	cmp	%g7, ASI_DTSB_PTR_1
	bge,a	%xcc, dconfig_2
	cmp	%g7, ASI_DTSB_PTR_2
	mov	ASI_DTSB_PTR_1, %g7
	ldxa	[%g7] ASI_DTSB_PTR, %g1
	ba,a	dload_entry
dconfig_2:
	bge,a	%xcc, dconfig_3
	cmp	%g7, ASI_DTSB_PTR_3
	mov	ASI_DTSB_PTR_2, %g7
	ldxa	[%g7] ASI_DTSB_PTR, %g1
	ba,a	dload_entry
dconfig_3:
	bge 	%xcc, dno_tte_in_tsb
	mov	ASI_DTSB_PTR_3, %g7
	ldxa	[%g7] ASI_DTSB_PTR, %g1
	ba,a	dload_entry
#endif

dno_tte_in_tsb:
    nop
#ifdef DMMU_SKIP_IF_NO_TTE
    done
    nop
#endif

dtsb_failing_noptr:
#if defined(KAOS_SIMULATION) 
    ba  check_for_dmmu_flush_and_sigsegv
    nop
#endif	
 	ta	T_BAD_TRAP
	nop
    
! Preserve g6/g7 !!
dmmu_ptr_chase:
    or  %g5, %g0, %g3           ! %g3 is link-reg
dmmu_ptr_chase_loop:
    ldda    [%g3] ASI_NUCLEUS_QUAD_LDD, %g4     ! load tte from tsb
    srlx	%g5, 63, %g2
    brz	%g2, dfollow_link
    nop
    ldxa    [%g0] ASI_DMMU_TAG_REG, %g2     ! get va/context from tag-target
#ifdef DMMU_HAS_SHARED_CTXT
check_dmmu_has_shared_ctx_l:
    ! If this TSB has use_ctxt bits set, then mask context
    ! 1. Get TSB config (%g7 has TSB_CONFIG addr OR TSB_PTR addr)
#ifndef USE_SOFTWARE_PTR_CALC
    sllx %g6, 51, %g1
    brz,a %g1, compare_ttetag_dl           ! Ignore shared ctx for nucleus
	stxa %g0, [%g0]ASI_SCRATCHPAD          ! Save decision for later
    sub %g7, 0x40, %g1                     ! %g1 has TSB config ADDR
#else 
    mov %g7, %g1                           ! %g1 has TSB config ADDR
#endif
    ldxa [%g1] ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %g1 
check_use_ctx_dl:
    srlx %g1, 61, %g1
    and %g1, 3, %g1                         ! %g1 has use_ctx bits ..
    brz %g1, compare_ttetag_dl
	stxa %g1, [%g0]ASI_SCRATCHPAD          ! Save decision for later
mask_ctx_dl:
    sethi %hi(0x1fff0000), %g1
    sllx %g1, 32, %g1                        ! Create mask for ctxt in tag target

    andn %g2, %g1, %g2                      ! Masked tag target (%g2) 
    andn %g4, %g1, %g4                      ! Masked tte tag (%g4)
#endif
compare_ttetag_dl:
    cmp %g2, %g4
    be %xcc, dmmu_trap_done
    mov 0x80, %g1                           ! offset (VA) for patrition id

    andcc %g5, 0x4, %g1                     ! Check TTE size for mask
	bz	dfollow_link                        ! size <5 .. no masking reqd
    andn %g2, 0x3f, %g2                     ! mask out bits 22:27
	cmp	%g2, %g4                            ! Now compare masked tag target
	be	%xcc, dmmu_trap_done
	mov	0x80, %g1		                    ! offset (VA) for patrition id
                                            ! DONT USE G1 until PA is done

dfollow_link:
    ldx [%g3+16], %g3
    cmp %g3, -1
    bne %xcc, dmmu_ptr_chase_loop ! keep chasing pointer
    nop

dnext_tsb:
    ! Look up the Next TSB, until done with all TSBs ?
#ifdef USE_SOFTWARE_PTR_CALC
    ! Compare with TSB_CONFIG_3 for ctx0 and TSB_CONFIG_3+0x20 for ctx!0
    mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g4
    sllx %g6, 51, %g5
    brnz,a %g5, 2f
    sub %g7, 0x20, %g7
2:  
    cmp %g7, %g4
    bl 1b
    nop
#else
    cmp %g7, ASI_DTSB_PTR_3
    bl 1b
    nop
#endif

dpointer_chase_unsuccessful:
#ifdef DMMU_SKIP_IF_NO_TTE
    done
	nop
#endif

dpage_fault_ptr:
#if defined(KAOS_SIMULATION) 
    ba  check_for_dmmu_flush_and_sigsegv
    nop
#endif	
 	ta	T_BAD_TRAP
	nop

dmmu_trap_done:
#ifdef DMMU_HAS_SHARED_CTXT
    ! %g6 has the unmasked tag access
    ldxa [%g0]ASI_SCRATCHPAD, %g3           ! Do we need to force ctxt ?
    brz %g3, done_forcing_ctxt_d            ! Nope
    cmp %g3, 1                              ! Which one ?
    movne %xcc, 0x8, %g3                    ! ctxt_0
    move %xcc, 0x108, %g3                   ! ctxt_1
force_ctxt_d:
    ldxa [%g3]ASI_PRIMARY_CONTEXT_REG, %g3  ! Get ctxt value
    srlx %g6, 13, %g2
    sllx %g2, 13, %g2                       ! Clear ctxt from tag-access
    or %g3, %g2, %g2                        ! Stuff in masked tag-access
	mov	ASI_DMMU_TAG_ACCESS_VAL, %g3        
    stxa %g2, [%g3]0x50                     ! Save forced ctx in tag-access
done_forcing_ctxt_d:
#endif
#ifdef SOME_TSB_PANOTRA
    ! Figure out if Offset should be added.
    ! %g7 contains TSB VA if SW ptr calc, and PTR address if HW_PTR_CALC
    ! %g6 contains ASI_DMMU_TAG_REG value
#ifndef USE_SOFTWARE_PTR_CALC
    sllx %g6, 51, %g3
    brz,a %g3, .+8
    sub %g7, 0x20, %g7      ! extra subtract for Z ctx 
    sub %g7, 0x40, %g7    
#endif
    ldxa [%g7] ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %g3
check_ranotpa_d:
    and %g3, 0x100, %g3         ! Is RANOTPA 1 ?
    brz,a %g3, loaded_dtlb
	stxa	%g5, [ %g0 ] ASI_DTLB_DATA_IN	! data-in
#endif
xlate_ratopa_d:
    ! add partition base to data-in
    setx    partition_base_list, %g3, %g2   ! for partition base
    ldxa    [%g1] ASI_PARTITION_ID, %g3     ! partition id
    sllx    %g3, 3, %g3     ! offset - partition list
    ldx [%g2 + %g3], %g1
    add %g5, %g1, %g5
	
dmmu_skip_part_base:

    stxa    %g5, [ %g0 ] ASI_DTLB_DATA_IN   ! data-in
loaded_dtlb:
    retry 
	

!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!	
! Data_Real_Tran_Miss_0x3f code here
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!    

dmmu_real_miss_handler:
	mov	0x30, %g7
	ldxa	[%g7] 0x58, %g2		! get ra from tag-access

	!! check to see if RA[39] is set.
	!! RA[39] = 0 means accessing memory space
	!! RA[39] = 1 means accessing I/O space
	mov	%g2, %g4
	mov	%g0, %g1		! %g1 will contain partition base

#ifndef DISABLE_PART_LIMIT_CHECK
    mov %g4, %g2
    srlx    %g2, 33, %g2        ! check to see if ra exceeds 8GB limit
    cmp %g2, %g0
    tne %xcc, T_BAD_TRAP
#endif

    ! add partition base to data-in
    setx    partition_base_list, %g1, %g2   ! for partition base
    mov ASI_PARTITION_ID_VAL, %g1       ! offset (VA) for patrition id
    ldxa    [%g1] ASI_PARTITION_ID, %g3     ! partition id
    sllx    %g3, 3, %g3     ! offset - partition list
    ldx [%g2 + %g3], %g1

dmmu_real_skip_part_base:
#ifdef REAL_DATA_ATTR
        setx    REAL_DATA_ATTR, %g2, %g5 ! user defined attributes
#else
#ifndef SUN4V
    setx    0x8000000000000022, %g2, %g5 ! CP W
#else
    setx    0x8000000000000440, %g2, %g5 ! CP W
#endif
#endif

    srlx    %g4, 13, %g4        ! get rid of garbage in context field
    sllx    %g4, 13, %g4
    or  %g4, %g5, %g5
    add %g5, %g1, %g5
    mov ASI_DMMU_TAG_ACCESS_VAL, %g7


    mov 0x400, %g6
    stxa    %g4, [ %g7 ] ASI_DMMU_TAG_REG   ! {tag-access, data-in}
    stxa    %g5, [ %g6 ] ASI_DTLB_DATA_IN
    retry 

/* Code specific for KAOS */
#if defined(KAOS_SIMULATION)    
check_for_dmmu_flush_and_sigsegv: 
    done
    /* check for flush */

    ldxa   [%g0]ASI_DMMU_TAG_TARGET, %g5
    ldxa   [%g0] 0x59, %g1 

    and     %g5, 0x3ff, %g5 
    sll     %g5, 9, %g5 
    srl     %g1, 4, %g1 
    and     %g1, 0x1ff, %g1 
    or      %g1, %g5, %g4 

    !ta       0x2
    rdpr     %tpc, %g2

    ta       0x2e
    cmp      %o1, 0
    setx     ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_0 THR_0_PARTID,), %g3, %g1
    be,a     1f
    nop 
    cmp      %o1, 1
    setx     ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_1, THR_1_PARTID), %g3, %g1
    be,a     1f
    nop 
    cmp      %o1, 2
    setx     ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_2, THR_2_PARTID), %g3, %g1
    be,a     1f
    nop 
    cmp      %o1, 3
    setx     ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_3, THR_3_PARTID), %g3, %g1
    be,a     1f
    nop
    cmp      %o1, 4
    setx     ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_4, THR_4_PARTID), %g3, %g1
    be,a     1f
    nop 
    cmp      %o1, 5
    setx     ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_5, THR_5_PARTID), %g3, %g1
    be,a     1f
    nop 
    cmp      %o1, 6
    setx     ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_6, THR_6_PARTID), %g3, %g1
    be,a     1f
    nop 
    cmp      %o1, 7
    setx     ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_7,THR_7_PARTID), %g3, %g1
    be,a     1f
    nop 	
    ta       0x1
    nop

1:      stx      %g2, [%g1]

    mov     0x08, %g1
    ldxa    [%g1] 0x21, %o1
    mov     0x10, %g1
    ldxa    [%g1] 0x21, %o2 
    set     0x1, %o3
    set     0x0, %o4
    setx    data_segv_check, %g1, %o5

    ta 0x2a

    nop

#endif
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: dmmu_miss_handler_ext.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	dmmu_miss_handler:
	39
	40
	41	#ifdef EX_TRAPCHECK
	42	! extended trapcheck returns traptype
	43	mov 0x68, %o0
	44	#endif
	45	mov ASI_DMMU_TAG_ACCESS_VAL, %g7
	46	ldxa [%g7] ASI_DMMU_TAG_REG, %g6 ! get va/context from tag-access
	47
	48	#ifdef USE_SOFTWARE_PTR_CALC
	49	! SW Implementation of PTR register calQlations
	50
	51	dconfig_0:
	52	! Load TSB_CONFIG address in %g7
	53	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_0, %g7
	54
	55	dmmu_tsbptr_calc:
	56	!Uses g1-g5, Expects TSB_CONFIG address in %g7, va in %g6, REsults in %g1
	57	!Leave %g6 intact
	58	#include <mmu_ptr_calc.s>
	59
	60	#else
	61
	62	mov ASI_DTSB_PTR_0, %g7
	63
	64	dmmu_tsbptr_calc:
65
66	ldxa [%g7] ASI_DTSB_PTR, %g1
67
68	#endif
69
70	#ifdef MIMIC_SOLARIS
71	srlx %g0, %g0, %g0
72	brnz %g0, HT0_Fast_Data_Access_MMU_Miss_0x68
73	sll %g0, %g0, %g0
74	xor %g0, %g0, %g0
75	#endif
76
77
78	dload_entry:
79	ldda [%g1] ASI_NUCLEUS_QUAD_LDD, %g4 ! load tte from tsb
80	srlx %g5, 63, %g2 ! Check valid bit ..
81	brz,a %g2, dmmu_check_for_ptr_chase
82	cmp %g4, -1 ! if all 1's, follow link
83	ldxa [%g0] ASI_DMMU_TAG_REG, %g2 ! get va/context from tag-target
84	#ifdef DMMU_HAS_SHARED_CTXT
85	check_dmmu_has_shared_ctx:
86	! If this TSB has use_ctxt bits set, then mask context
87	! 1. Get TSB config (%g7 has TSB_CONFIG addr OR TSB_PTR addr)
88	#ifndef USE_SOFTWARE_PTR_CALC
89	sllx %g6, 51, %g3
90	brz,a %g3, compare_ttetag_d ! Ignore shared ctx for nucleus
91	stxa %g0, [%g0]ASI_SCRATCHPAD ! Save decision for later
92	sub %g7, 0x40, %g3 ! %g3 has TSB config ADDR
93	#else
94	mov %g7, %g3 ! %g3 has TSB config ADDR
95	#endif
96	ldxa [%g3] ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %g3
97	check_use_ctx_d:
98	srlx %g3, 61, %g3
99	and %g3, 3, %g3 ! %g3 has use_ctx bits ..
100	brz %g3, compare_ttetag_d
101	stxa %g3, [%g0]ASI_SCRATCHPAD ! Save decision for later
102	mask_ctx_d:
103	sethi %hi(0x1fff0000), %g1
104	sllx %g1, 32, %g1 ! Create mask for ctxt in tag target
105	andn %g2, %g1, %g2 ! Masked tag target (%g2)
106	andn %g4, %g1, %g4 ! Masked tte tag (%g4)
107	#endif
108	compare_ttetag_d:
109	cmp %g2, %g4
110	be %xcc, dmmu_trap_done
111	mov 0x80, %g1 ! offset (VA) for patrition id
112
113	andcc %g5, 0x4, %g1 ! Check TTE size for mask
114	bz,a dmmu_check_for_ptr_chase ! size <5 .. no masking reqd
115	cmp %g4, -1 ! if all 1's, follow link
116	andn %g2, 0x3f, %g2 ! mask out bits 22:27
117	cmp %g2, %g4 ! Now compare masked tag target
118	be %xcc, dmmu_trap_done
119	mov 0x80, %g1 ! offset (VA) for patrition id
120
121
122	dmmu_check_for_ptr_chase:
123	cmp %g4, -1 ! if all 1's, follow link
124	be,a %xcc, dmmu_ptr_chase
125	nop
126
127	!! Look up all config registers (1-3)
128
129	#ifdef USE_SOFTWARE_PTR_CALC
130
131	!! Gotta do SW table walk through the 3 remaing configs ..
132	! Expect %g7 to stll have addr of last ctx0 config register
133	! and %g6 should have va/context from tag access register
134
135	! Normalize %g7
136	sllx %g6, 51, %g5
137	brnz,a %g5, 1f
138	sub %g7, 0x20, %g7 ! this executes only if branch taken
139
140	1:
141
142	cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1
143	bl,a dmmu_tsbptr_calc
144	dconfig_1:
145	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1, %g7
146
147	cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2
148	bl,a dmmu_tsbptr_calc
149	dconfig_2:
150	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2, %g7
151
152	cmp %g7, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3
153	bl,a dmmu_tsbptr_calc
154	dconfig_3:
155	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g7
156
157	#else
158
159	! %g7 contains last pointer used ..
160	1:
161	dconfig_1:
162	cmp %g7, ASI_DTSB_PTR_1
163	bge,a %xcc, dconfig_2
164	cmp %g7, ASI_DTSB_PTR_2
165	mov ASI_DTSB_PTR_1, %g7
166	ldxa [%g7] ASI_DTSB_PTR, %g1
167	ba,a dload_entry
168	dconfig_2:
169	bge,a %xcc, dconfig_3
170	cmp %g7, ASI_DTSB_PTR_3
171	mov ASI_DTSB_PTR_2, %g7
172	ldxa [%g7] ASI_DTSB_PTR, %g1
173	ba,a dload_entry
174	dconfig_3:
175	bge %xcc, dno_tte_in_tsb
176	mov ASI_DTSB_PTR_3, %g7
177	ldxa [%g7] ASI_DTSB_PTR, %g1
178	ba,a dload_entry
179	#endif
180
181	dno_tte_in_tsb:
182	nop
183	#ifdef DMMU_SKIP_IF_NO_TTE
184	done
185	nop
186	#endif
187
188	dtsb_failing_noptr:
189	#if defined(KAOS_SIMULATION)
190	ba check_for_dmmu_flush_and_sigsegv
191	nop
192	#endif
193	ta T_BAD_TRAP
194	nop
195
196	! Preserve g6/g7 !!
197	dmmu_ptr_chase:
198	or %g5, %g0, %g3 ! %g3 is link-reg
199	dmmu_ptr_chase_loop:
200	ldda [%g3] ASI_NUCLEUS_QUAD_LDD, %g4 ! load tte from tsb
201	srlx %g5, 63, %g2
202	brz %g2, dfollow_link
203	nop
204	ldxa [%g0] ASI_DMMU_TAG_REG, %g2 ! get va/context from tag-target
205	#ifdef DMMU_HAS_SHARED_CTXT
206	check_dmmu_has_shared_ctx_l:
207	! If this TSB has use_ctxt bits set, then mask context
208	! 1. Get TSB config (%g7 has TSB_CONFIG addr OR TSB_PTR addr)
209	#ifndef USE_SOFTWARE_PTR_CALC
210	sllx %g6, 51, %g1
211	brz,a %g1, compare_ttetag_dl ! Ignore shared ctx for nucleus
212	stxa %g0, [%g0]ASI_SCRATCHPAD ! Save decision for later
213	sub %g7, 0x40, %g1 ! %g1 has TSB config ADDR
214	#else
215	mov %g7, %g1 ! %g1 has TSB config ADDR
216	#endif
217	ldxa [%g1] ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %g1
218	check_use_ctx_dl:
219	srlx %g1, 61, %g1
220	and %g1, 3, %g1 ! %g1 has use_ctx bits ..
221	brz %g1, compare_ttetag_dl
222	stxa %g1, [%g0]ASI_SCRATCHPAD ! Save decision for later
223	mask_ctx_dl:
224	sethi %hi(0x1fff0000), %g1
225	sllx %g1, 32, %g1 ! Create mask for ctxt in tag target
226
227	andn %g2, %g1, %g2 ! Masked tag target (%g2)
228	andn %g4, %g1, %g4 ! Masked tte tag (%g4)
229	#endif
230	compare_ttetag_dl:
231	cmp %g2, %g4
232	be %xcc, dmmu_trap_done
233	mov 0x80, %g1 ! offset (VA) for patrition id
234
235	andcc %g5, 0x4, %g1 ! Check TTE size for mask
236	bz dfollow_link ! size <5 .. no masking reqd
237	andn %g2, 0x3f, %g2 ! mask out bits 22:27
238	cmp %g2, %g4 ! Now compare masked tag target
239	be %xcc, dmmu_trap_done
240	mov 0x80, %g1 ! offset (VA) for patrition id
241	! DONT USE G1 until PA is done
242
243	dfollow_link:
244	ldx [%g3+16], %g3
245	cmp %g3, -1
246	bne %xcc, dmmu_ptr_chase_loop ! keep chasing pointer
247	nop
248
249	dnext_tsb:
250	! Look up the Next TSB, until done with all TSBs ?
251	#ifdef USE_SOFTWARE_PTR_CALC
252	! Compare with TSB_CONFIG_3 for ctx0 and TSB_CONFIG_3+0x20 for ctx!0
253	mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3, %g4
254	sllx %g6, 51, %g5
255	brnz,a %g5, 2f
256	sub %g7, 0x20, %g7
257	2:
258	cmp %g7, %g4
259	bl 1b
260	nop
261	#else
262	cmp %g7, ASI_DTSB_PTR_3
263	bl 1b
264	nop
265	#endif
266
267	dpointer_chase_unsuccessful:
268	#ifdef DMMU_SKIP_IF_NO_TTE
269	done
270	nop
271	#endif
272
273	dpage_fault_ptr:
274	#if defined(KAOS_SIMULATION)
275	ba check_for_dmmu_flush_and_sigsegv
276	nop
277	#endif
278	ta T_BAD_TRAP
279	nop
280
281	dmmu_trap_done:
282	#ifdef DMMU_HAS_SHARED_CTXT
283	! %g6 has the unmasked tag access
284	ldxa [%g0]ASI_SCRATCHPAD, %g3 ! Do we need to force ctxt ?
285	brz %g3, done_forcing_ctxt_d ! Nope
286	cmp %g3, 1 ! Which one ?
287	movne %xcc, 0x8, %g3 ! ctxt_0
288	move %xcc, 0x108, %g3 ! ctxt_1
289	force_ctxt_d:
290	ldxa [%g3]ASI_PRIMARY_CONTEXT_REG, %g3 ! Get ctxt value
291	srlx %g6, 13, %g2
292	sllx %g2, 13, %g2 ! Clear ctxt from tag-access
293	or %g3, %g2, %g2 ! Stuff in masked tag-access
294	mov ASI_DMMU_TAG_ACCESS_VAL, %g3
295	stxa %g2, [%g3]0x50 ! Save forced ctx in tag-access
296	done_forcing_ctxt_d:
297	#endif
298	#ifdef SOME_TSB_PANOTRA
299	! Figure out if Offset should be added.
300	! %g7 contains TSB VA if SW ptr calc, and PTR address if HW_PTR_CALC
301	! %g6 contains ASI_DMMU_TAG_REG value
302	#ifndef USE_SOFTWARE_PTR_CALC
303	sllx %g6, 51, %g3
304	brz,a %g3, .+8
305	sub %g7, 0x20, %g7 ! extra subtract for Z ctx
306	sub %g7, 0x40, %g7
307	#endif
308	ldxa [%g7] ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %g3
309	check_ranotpa_d:
310	and %g3, 0x100, %g3 ! Is RANOTPA 1 ?
311	brz,a %g3, loaded_dtlb
312	stxa %g5, [ %g0 ] ASI_DTLB_DATA_IN ! data-in
313	#endif
314	xlate_ratopa_d:
315	! add partition base to data-in
316	setx partition_base_list, %g3, %g2 ! for partition base
317	ldxa [%g1] ASI_PARTITION_ID, %g3 ! partition id
318	sllx %g3, 3, %g3 ! offset - partition list
319	ldx [%g2 + %g3], %g1
320	add %g5, %g1, %g5
321
322	dmmu_skip_part_base:
323
324	stxa %g5, [ %g0 ] ASI_DTLB_DATA_IN ! data-in
325	loaded_dtlb:
326	retry
327
328
329
330	!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
331	! Data_Real_Tran_Miss_0x3f code here
332	!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
333
334	dmmu_real_miss_handler:
335	mov 0x30, %g7
336	ldxa [%g7] 0x58, %g2 ! get ra from tag-access
337
338	!! check to see if RA[39] is set.
339	!! RA[39] = 0 means accessing memory space
340	!! RA[39] = 1 means accessing I/O space
341	mov %g2, %g4
342	mov %g0, %g1 ! %g1 will contain partition base
343
344	#ifndef DISABLE_PART_LIMIT_CHECK
345	mov %g4, %g2
346	srlx %g2, 33, %g2 ! check to see if ra exceeds 8GB limit
347	cmp %g2, %g0
348	tne %xcc, T_BAD_TRAP
349	#endif
350
351	! add partition base to data-in
352	setx partition_base_list, %g1, %g2 ! for partition base
353	mov ASI_PARTITION_ID_VAL, %g1 ! offset (VA) for patrition id
354	ldxa [%g1] ASI_PARTITION_ID, %g3 ! partition id
355	sllx %g3, 3, %g3 ! offset - partition list
356	ldx [%g2 + %g3], %g1
357
358	dmmu_real_skip_part_base:
359	#ifdef REAL_DATA_ATTR
360	setx REAL_DATA_ATTR, %g2, %g5 ! user defined attributes
361	#else
362	#ifndef SUN4V
363	setx 0x8000000000000022, %g2, %g5 ! CP W
364	#else
365	setx 0x8000000000000440, %g2, %g5 ! CP W
366	#endif
367	#endif
368
369	srlx %g4, 13, %g4 ! get rid of garbage in context field
370	sllx %g4, 13, %g4
371	or %g4, %g5, %g5
372	add %g5, %g1, %g5
373	mov ASI_DMMU_TAG_ACCESS_VAL, %g7
374
375
376	mov 0x400, %g6
377	stxa %g4, [ %g7 ] ASI_DMMU_TAG_REG ! {tag-access, data-in}
378	stxa %g5, [ %g6 ] ASI_DTLB_DATA_IN
379	retry
380
381	/* Code specific for KAOS */
382	#if defined(KAOS_SIMULATION)
383	check_for_dmmu_flush_and_sigsegv:
384	done
385	/* check for flush */
386
387	ldxa [%g0]ASI_DMMU_TAG_TARGET, %g5
388	ldxa [%g0] 0x59, %g1
389
390	and %g5, 0x3ff, %g5
391	sll %g5, 9, %g5
392	srl %g1, 4, %g1
393	and %g1, 0x1ff, %g1
394	or %g1, %g5, %g4
395
396	!ta 0x2
397	rdpr %tpc, %g2
398
399	ta 0x2e
400	cmp %o1, 0
401	setx ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_0 THR_0_PARTID,), %g3, %g1
402	be,a 1f
403	nop
404	cmp %o1, 1
405	setx ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_1, THR_1_PARTID), %g3, %g1
406	be,a 1f
407	nop
408	cmp %o1, 2
409	setx ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_2, THR_2_PARTID), %g3, %g1
410	be,a 1f
411	nop
412	cmp %o1, 3
413	setx ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_3, THR_3_PARTID), %g3, %g1
414	be,a 1f
415	nop
416	cmp %o1, 4
417	setx ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_4, THR_4_PARTID), %g3, %g1
418	be,a 1f
419	nop
420	cmp %o1, 5
421	setx ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_5, THR_5_PARTID), %g3, %g1
422	be,a 1f
423	nop
424	cmp %o1, 6
425	setx ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_6, THR_6_PARTID), %g3, %g1
426	be,a 1f
427	nop
428	cmp %o1, 7
429	setx ra2pa(LOCAL_SUPERVISOR_SECTION_DATA_PA_7,THR_7_PARTID), %g3, %g1
430	be,a 1f
431	nop
432	ta 0x1
433	nop
434
435	1: stx %g2, [%g1]
436
437	mov 0x08, %g1
438	ldxa [%g1] 0x21, %o1
439	mov 0x10, %g1
440	ldxa [%g1] 0x21, %o2
441	set 0x1, %o3
442	set 0x0, %o4
443	setx data_segv_check, %g1, %o5
444
445	ta 0x2a
446
447	nop
448
449	#endif