projects / OpenSPARC-T2-DV / blame
? search:
summary | tags | clone url | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / include / hboot.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: hboot.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#ifndef __HBOOT_S__
39#define __HBOOT_S__
40
41#ifdef CONFIG_M4
42#include S2MEM_DEFINES
43#else
44#include "config.m4"
45#endif
46
47#include "constants.h"
48#include "xlate.h"
49
50#ifdef S2MEM_DEFINES
51#include S2MEM_DEFINES
52#else
53#include "defines.h"
54#endif
55
56#ifdef S2MEM_MACROS
57#include S2MEM_MACROS
58#else
59#include "macros.m4"
60#include "macros.h" /* macro from SUN legacy diags */
61#endif
62
63#ifndef __HBOOT_S_DONE__
64#define __HBOOT_S_DONE__
65
66.global Power_On_Reset
67
68SECTION .RED_SEC TEXT_VA = 0xfffffffff0000000, DATA_VA = 0xfffffffff0010000
69
70#ifndef ALL_PAGE_CUSTOM_MAP
71attr_text {
72 Name=.RED_SEC,
73 hypervisor
74}
75#endif
76
77#ifndef ALL_PAGE_CUSTOM_MAP
78attr_data {
79 Name=.RED_SEC,
80 hypervisor
81}
82#endif
83
84.text
85
86RESERVED_0: !Should not come here
87 nop
88 nop
89 nop
90 nop
91 nop
92 nop
93 nop
94 nop
95
96! $EV trig_pc_d(1,expr(@VA(.RED_SEC.Power_On_Reset)&0x0000ffffffffffff,16,16)) -> marker(bootStart, * , 1)
97/*SV 04/25/06 */
98#ifdef SLAM_VECTORS
99
100
101#endif
102
103Power_On_Reset:
104#ifdef LOADNGO
105#include "loadngo_l2_init.s"
106#endif
107#ifdef My_Power_On_Reset
108 My_Power_On_Reset
109#else
110#ifdef BOOTPROM_INIT
111 ba bootprom_init
112 wrpr 0, %g0, %gl
113#else
114 setx HRedmode_Reset_Handler, %g1, %g2
115 jmp %g2
116 wrpr 0, %g0, %gl
117#endif
118
119#endif
120
121.align 32
122
123Watchdog_Reset:
124#ifdef My_Watchdog_Reset
125 My_Watchdog_Reset
126#else
127 setx Watchdog_Reset_Handler, %g1, %g2
128 jmp %g2
129 nop
130#endif
131
132
133.align 32
134
135External_Reset:
136#ifdef My_External_Reset
137 My_External_Reset
138#else
139 setx External_Reset_Handler, %g6, %g7
140 jmp %g7
141 nop
142#endif
143
144.align 32
145
146Software_Initiated_Reset:
147#ifdef My_Software_Initiated_Reset
148 My_Software_Initiated_Reset
149#else
150 setx Software_Reset_Handler, %g1, %g2
151 jmp %g2
152 nop
153#endif
154
155.align 32
156
157RED_Mode_Other_Reset:
158#ifdef My_RED_Mode_Other_Reset
159 My_RED_Mode_Other_Reset
160#else
161 nop
162 nop
163 nop
164#endif
165
166.align 32
167
168#include "bootprom_init.s"
169
170#ifdef FAST_BOOT
171SECTION .ALT_RED TEXT_VA = 0x0000000000000000
172
173#ifndef ALL_PAGE_CUSTOM_MAP
174attr_text {
175 Name=.ALT_RED,
176 hypervisor
177}
178#endif
179
180.text
181
182RESERVED_0: !Should not come here
183 nop
184 nop
185 nop
186 nop
187 nop
188 nop
189 nop
190 nop
191
192! $EV trig_pc_d(1,@VA(.ALT_RED.Alt_Power_On_Reset)) -> marker(bootStart, *, 1)
193Alt_Power_On_Reset:
194#ifdef My_Power_On_Reset
195 My_Power_On_Reset
196#else
197 setx HRedmode_Reset_Handler, %g1, %g2
198 jmp %g2
199 wrpr 0, %g0, %gl
200#endif
201
202.align 32
203
204Alt_Watchdog_Reset:
205#ifdef My_Watchdog_Reset
206 My_Watchdog_Reset
207#else
208 setx Watchdog_Reset_Handler, %g1, %g2
209 jmp %g2
210 nop
211#endif
212
213
214.align 32
215
216Alt_External_Reset:
217#ifdef My_External_Reset
218 My_External_Reset
219#else
220 setx External_Reset_Handler, %g6, %g7
221 jmp %g7
222 nop
223#endif
224
225.align 32
226
227Alt_Software_Initiated_Reset:
228#ifdef My_Software_Initiated_Reset
229 My_Software_Initiated_Reset
230#else
231 setx Software_Reset_Handler, %g1, %g2
232 jmp %g2
233 nop
234#endif
235
236.align 32
237
238Alt_RED_Mode_Other_Reset:
239#ifdef My_RED_Mode_Other_Reset
240 My_RED_Mode_Other_Reset
241#else
242 nop
243 nop
244 nop
245#endif
246
247#endif
248
249SECTION .RED_EXT_SEC TEXT_VA = HV_RED_TEXT_PA, DATA_VA = HV_RED_DATA_PA
250
251#ifndef ALL_PAGE_CUSTOM_MAP
252attr_text {
253 Name=.RED_EXT_SEC,
254 hypervisor
255}
256#endif
257
258#ifndef ALL_PAGE_CUSTOM_MAP
259attr_data {
260 Name=.RED_EXT_SEC,
261 hypervisor
262}
263#endif
264
265.text
266
267.global HRedmode_Reset_Handler
268! align HRedmode_Reset_Handler to 0x40020 so that
269! we can have an option to boot straight from DRAM
270! instead of 0xfff0000020
271 nop
272 nop
273 nop
274 nop
275 nop
276 nop
277 nop
278 nop
279HRedmode_Reset_Handler:
280
281#ifdef S2MEM_RED_RESET_HANDLER
282#include S2MEM_RED_RESET_HANDLER
283#else
284#include "hred_reset_handler.s"
285#endif
286
287.global Watchdog_Reset_Handler
288Watchdog_Reset_Handler:
289
290#ifdef S2MEM_WATCHDOG_RESET_HANDLER
291#include S2MEM_WATCHDOG_RESET_HANDLER
292#else
293#include "watchdog_reset_handler.s"
294#endif
295
296.global External_Reset_Handler
297External_Reset_Handler:
298
299#ifdef S2MEM_EXTERNAL_RESET_HANDLER
300#include S2MEM_EXTERNAL_RESET_HANDLER
301#else
302#include "external_reset_handler.s"
303#endif
304
305.global Software_Reset_Handler
306Software_Reset_Handler:
307
308#ifdef S2MEM_SOFTWARE_RESET_HANDLER
309#include S2MEM_SOFTWARE_RESET_HANDLER
310#else
311#include "software_reset_handler.s"
312#endif
313
314.data
315part_id_list:
316 .xword THR_0_PARTID, THR_1_PARTID, THR_2_PARTID, THR_3_PARTID
317 .xword THR_4_PARTID, THR_5_PARTID, THR_6_PARTID, THR_7_PARTID
318 .xword THR_8_PARTID, THR_9_PARTID, THR_10_PARTID, THR_11_PARTID
319 .xword THR_12_PARTID, THR_13_PARTID, THR_14_PARTID, THR_15_PARTID
320 .xword THR_16_PARTID, THR_17_PARTID, THR_18_PARTID, THR_19_PARTID
321 .xword THR_20_PARTID, THR_21_PARTID, THR_22_PARTID, THR_23_PARTID
322 .xword THR_24_PARTID, THR_25_PARTID, THR_26_PARTID, THR_27_PARTID
323 .xword THR_28_PARTID, THR_29_PARTID, THR_30_PARTID, THR_31_PARTID
324 .xword THR_32_PARTID, THR_33_PARTID, THR_34_PARTID, THR_35_PARTID
325 .xword THR_36_PARTID, THR_37_PARTID, THR_38_PARTID, THR_39_PARTID
326 .xword THR_40_PARTID, THR_41_PARTID, THR_42_PARTID, THR_43_PARTID
327 .xword THR_44_PARTID, THR_45_PARTID, THR_46_PARTID, THR_47_PARTID
328 .xword THR_48_PARTID, THR_49_PARTID, THR_50_PARTID, THR_51_PARTID
329 .xword THR_52_PARTID, THR_53_PARTID, THR_54_PARTID, THR_55_PARTID
330 .xword THR_56_PARTID, THR_57_PARTID, THR_58_PARTID, THR_59_PARTID
331 .xword THR_60_PARTID, THR_61_PARTID, THR_62_PARTID, THR_63_PARTID
332
333.global partition_base_list
334partition_base_list:
335 .xword PART_0_BASE, PART_1_BASE, PART_2_BASE, PART_3_BASE
336 .xword PART_4_BASE, PART_5_BASE, PART_6_BASE, PART_7_BASE
337
338partition_phys_offset_list:
339 .xword PART0_PHY_OFF_0, PART0_PHY_OFF_1, PART0_PHY_OFF_2, PART0_PHY_OFF_3
340 .xword PART1_PHY_OFF_0, PART1_PHY_OFF_1, PART1_PHY_OFF_2, PART1_PHY_OFF_3
341 .xword PART2_PHY_OFF_0, PART2_PHY_OFF_1, PART2_PHY_OFF_2, PART2_PHY_OFF_3
342 .xword PART3_PHY_OFF_0, PART3_PHY_OFF_1, PART3_PHY_OFF_2, PART3_PHY_OFF_3
343 .xword PART4_PHY_OFF_0, PART4_PHY_OFF_1, PART4_PHY_OFF_2, PART4_PHY_OFF_3
344 .xword PART5_PHY_OFF_0, PART5_PHY_OFF_1, PART5_PHY_OFF_2, PART5_PHY_OFF_3
345 .xword PART6_PHY_OFF_0, PART6_PHY_OFF_1, PART6_PHY_OFF_2, PART6_PHY_OFF_3
346 .xword PART7_PHY_OFF_0, PART7_PHY_OFF_1, PART7_PHY_OFF_2, PART7_PHY_OFF_3
347
348tsb_config_base_list:
349 .xword part_0_z_tsb_config_0, part_0_nz_tsb_config_0
350 .xword part_0_z_tsb_config_1, part_0_nz_tsb_config_1
351 .xword part_0_z_tsb_config_2, part_0_nz_tsb_config_2
352 .xword part_0_z_tsb_config_3, part_0_nz_tsb_config_3
353 .xword 0x0, 0x0
354 .xword part_1_z_tsb_config_0, part_1_nz_tsb_config_0
355 .xword part_1_z_tsb_config_1, part_1_nz_tsb_config_1
356 .xword part_1_z_tsb_config_2, part_1_nz_tsb_config_2
357 .xword part_1_z_tsb_config_3, part_1_nz_tsb_config_3
358 .xword 0x0, 0x0
359 .xword part_2_z_tsb_config_0, part_2_nz_tsb_config_0
360 .xword part_2_z_tsb_config_1, part_2_nz_tsb_config_1
361 .xword part_2_z_tsb_config_2, part_2_nz_tsb_config_2
362 .xword part_2_z_tsb_config_3, part_2_nz_tsb_config_3
363 .xword 0x0, 0x0
364 .xword part_3_z_tsb_config_0, part_3_nz_tsb_config_0
365 .xword part_3_z_tsb_config_1, part_3_nz_tsb_config_1
366 .xword part_3_z_tsb_config_2, part_3_nz_tsb_config_2
367 .xword part_3_z_tsb_config_3, part_3_nz_tsb_config_3
368 .xword 0x0, 0x0
369 .xword part_4_z_tsb_config_0, part_4_nz_tsb_config_0
370 .xword part_4_z_tsb_config_1, part_4_nz_tsb_config_1
371 .xword part_4_z_tsb_config_2, part_4_nz_tsb_config_2
372 .xword part_4_z_tsb_config_3, part_4_nz_tsb_config_3
373 .xword 0x0, 0x0
374 .xword part_5_z_tsb_config_0, part_5_nz_tsb_config_0
375 .xword part_5_z_tsb_config_1, part_5_nz_tsb_config_1
376 .xword part_5_z_tsb_config_2, part_5_nz_tsb_config_2
377 .xword part_5_z_tsb_config_3, part_5_nz_tsb_config_3
378 .xword 0x0, 0x0
379 .xword part_6_z_tsb_config_0, part_6_nz_tsb_config_0
380 .xword part_6_z_tsb_config_1, part_6_nz_tsb_config_1
381 .xword part_6_z_tsb_config_2, part_6_nz_tsb_config_2
382 .xword part_6_z_tsb_config_3, part_6_nz_tsb_config_3
383 .xword 0x0, 0x0
384 .xword part_7_z_tsb_config_0, part_7_nz_tsb_config_0
385 .xword part_7_z_tsb_config_1, part_7_nz_tsb_config_1
386 .xword part_7_z_tsb_config_2, part_7_nz_tsb_config_2
387 .xword part_7_z_tsb_config_3, part_7_nz_tsb_config_3
388 .xword 0x0, 0x0
389
390.global sync_thr_counter
391sync_thr_counter:
392 .xword 0x0
393.global sync_thr_counter1
394sync_thr_counter1:
395 .xword 0x0
396.global sync_thr_counter2
397sync_thr_counter2:
398 .xword 0x0
399.global sync_thr_counter3
400sync_thr_counter3:
401 .xword 0x0
402.global sync_thr_counter4
403sync_thr_counter4:
404 .xword 0x0
405 .xword 0x0
406 .xword 0x0
407 .xword 0x0
408 .xword 0x0
409 .xword 0x0
410 .xword 0x0
411 .xword 0x0
412.global sync_thr_counter5
413sync_thr_counter5:
414 .xword 0x0
415 .xword 0x0
416 .xword 0x0
417 .xword 0x0
418 .xword 0x0
419 .xword 0x0
420 .xword 0x0
421 .xword 0x0
422.global sync_thr_counter6
423sync_thr_counter6:
424 .xword 0x0
425 .xword 0x0
426 .xword 0x0
427 .xword 0x0
428 .xword 0x0
429 .xword 0x0
430 .xword 0x0
431 .xword 0x0
432
433.global exit_sync_thr_counter
434exit_sync_thr_counter:
435 .xword 0x0
436
437#ifndef HBOOT_HV_ONLY
438
439SECTION .HPRIV_RESET TEXT_VA=PRIV_RESET_VA
440#ifndef ALL_PAGE_CUSTOM_MAP
441changequote([, ])dnl
442forloop([i], 0, 7, [
443ifdef([part_]i[_used],[
444attr_text {
445 Name = .HPRIV_RESET,
446 RA = PRIV_RESET_RA,
447 PA = ra2pa2(PRIV_RESET_RA,i),
448#ifndef USE_N1_TSB_NAMES
449#ifndef NO_NZ_TSB_IN_PRIV
450 [part_]i[_ctx_nonzero_tsb_config_0],
451#endif
452 [part_]i[_ctx_zero_tsb_config_0],
453#else
454#ifndef NO_NZ_TSB_IN_PRIV
455 [part_]i[_i_ctx_nonzero_ps0_tsb],
456#endif
457 [part_]i[_i_ctx_zero_ps0_tsb],
458#endif
459 TTE_G=1, TTE_Context=0, TTE_V=1,
460 TTE_Size=PART0_Z_PAGE_SIZE_0, TTE_NFO=0, TTE_IE=0,
461 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0,
462 TTE_E=0, TTE_P=1, TTE_W=1, TTE_X=1
463 }
464])dnl
465])dnl
466changequote(`,')dnl'
467#endif
468! DO NOT ADD ANY CODE BEFORE HPriv_Reset_Handler
469.global HPriv_Reset_Handler
470
471HPriv_Reset_Handler:
472
473#ifdef S2MEM_PRIV_RESET_HANDLER
474#include S2MEM_PRIV_RESET_HANDLER
475#else
476#include "hpriv_reset_handler.s"
477#endif
478
479#endif
480
481SECTION .HTRAPS TEXT_VA=HV_TRAP_BASE_PA, DATA_VA=HV_TRAP_DATA_PA
482#ifndef ALL_PAGE_CUSTOM_MAP
483attr_text {
484 Name = .HTRAPS,
485 hypervisor,
486 }
487attr_data {
488 Name = .HTRAPS,
489 hypervisor,
490 }
491#endif
492
493#include "htraps.s"
494
495#ifndef NO_DECLARE_TSB
496#ifndef GOLDFINGER
497
498#ifdef PART_0_USED
499SECTION .PART_0_CTX_ZERO_TSB_0 DATA_VA=PART0_Z_ADDR_0
500#ifndef ALL_PAGE_CUSTOM_MAP
501attr_data {
502 Name = .PART_0_CTX_ZERO_TSB_0,
503 hypervisor
504 }
505#endif
506SECTION .PART_0_CTX_NONZERO_TSB__0 DATA_VA=PART0_NZ_ADDR_0
507#ifndef ALL_PAGE_CUSTOM_MAP
508attr_data {
509 Name = .PART_0_CTX_NONZERO_TSB_0,
510 hypervisor
511 }
512#endif
513SECTION .PART_0_CTX_ZERO_TSB_0 DATA_VA=PART0_Z_ADDR_0
514#ifndef ALL_PAGE_CUSTOM_MAP
515attr_data {
516 Name = .PART_0_CTX_ZERO_TSB_0,
517 hypervisor
518 }
519#endif
520SECTION .PART_0_CTX_NONZERO_TSB_0 DATA_VA=PART0_NZ_ADDR_0
521#ifndef ALL_PAGE_CUSTOM_MAP
522attr_data {
523 Name = .PART_0_CTX_NONZERO_TSB_0,
524 hypervisor
525 }
526#endif
527
528SECTION .PART_0_CTX_ZERO_TSB_1 DATA_VA=PART0_Z_ADDR_1
529#ifndef ALL_PAGE_CUSTOM_MAP
530attr_data {
531 Name = .PART_0_CTX_ZERO_TSB_1,
532 hypervisor
533 }
534#endif
535SECTION .PART_0_CTX_NONZERO_TSB_1 DATA_VA=PART0_NZ_ADDR_1
536#ifndef ALL_PAGE_CUSTOM_MAP
537attr_data {
538 Name = .PART_0_CTX_NONZERO_TSB_1,
539 hypervisor
540 }
541#endif
542SECTION .PART_0_CTX_ZERO_TSB_1 DATA_VA=PART0_Z_ADDR_1
543#ifndef ALL_PAGE_CUSTOM_MAP
544attr_data {
545 Name = .PART_0_CTX_ZERO_TSB_1,
546 hypervisor
547 }
548#endif
549SECTION .PART_0_CTX_NONZERO_TSB_1 DATA_VA=PART0_NZ_ADDR_1
550#ifndef ALL_PAGE_CUSTOM_MAP
551attr_data {
552 Name = .PART_0_CTX_NONZERO_TSB_1,
553 hypervisor
554 }
555#endif
556SECTION .PART_0_TSB_LINK DATA_VA=PART_0_LINK_AREA_BASE_ADDR
557#ifndef ALL_PAGE_CUSTOM_MAP
558attr_data {
559 Name = .PART_0_TSB_LINK,
560 hypervisor
561 }
562#endif
563#endif
564
565#ifdef PART_1_USED
566SECTION .PART_1_CTX_ZERO_TSB_0 DATA_VA=PART1_Z_ADDR_0
567#ifndef ALL_PAGE_CUSTOM_MAP
568attr_data {
569 Name = .PART_1_CTX_ZERO_TSB_0,
570 hypervisor
571 }
572#endif
573SECTION .PART_1_CTX_NONZERO_TSB_0 DATA_VA=PART1_NZ_ADDR_0
574#ifndef ALL_PAGE_CUSTOM_MAP
575attr_data {
576 Name = .PART_1_CTX_NONZERO_TSB_0,
577 hypervisor
578 }
579#endif
580SECTION .PART_1_CTX_ZERO_TSB_0 DATA_VA=PART1_Z_ADDR_0
581#ifndef ALL_PAGE_CUSTOM_MAP
582attr_data {
583 Name = .PART_1_CTX_ZERO_TSB_0,
584 hypervisor
585 }
586#endif
587SECTION .PART_1_CTX_NONZERO_TSB_0 DATA_VA=PART1_NZ_ADDR_0
588#ifndef ALL_PAGE_CUSTOM_MAP
589attr_data {
590 Name = .PART_1_CTX_NONZERO_TSB_0,
591 hypervisor
592 }
593#endif
594SECTION .PART_1_TSB_LINK DATA_VA=PART_1_LINK_AREA_BASE_ADDR
595#ifndef ALL_PAGE_CUSTOM_MAP
596attr_data {
597 Name = .PART_1_TSB_LINK,
598 hypervisor
599 }
600#endif
601#endif
602
603#ifdef PART_2_USED
604SECTION .PART_2_CTX_ZERO_TSB_0 DATA_VA=PART2_Z_ADDR_0
605#ifndef ALL_PAGE_CUSTOM_MAP
606attr_data {
607 Name = .PART_2_CTX_ZERO_TSB_0,
608 hypervisor
609 }
610#endif
611SECTION .PART_2_CTX_NONZERO_TSB_0 DATA_VA=PART2_NZ_ADDR_0
612#ifndef ALL_PAGE_CUSTOM_MAP
613attr_data {
614 Name = .PART_2_CTX_NONZERO_TSB_0,
615 hypervisor
616 }
617#endif
618SECTION .PART_2_CTX_ZERO_TSB_0 DATA_VA=PART2_Z_ADDR_0
619#ifndef ALL_PAGE_CUSTOM_MAP
620attr_data {
621 Name = .PART_2_CTX_ZERO_TSB_0,
622 hypervisor
623 }
624#endif
625SECTION .PART_2_CTX_NONZERO_TSB_0 DATA_VA=PART2_NZ_ADDR_0
626#ifndef ALL_PAGE_CUSTOM_MAP
627attr_data {
628 Name = .PART_2_CTX_NONZERO_TSB_0,
629 hypervisor
630 }
631#endif
632SECTION .PART_2_TSB_LINK DATA_VA=PART_2_LINK_AREA_BASE_ADDR
633#ifndef ALL_PAGE_CUSTOM_MAP
634attr_data {
635 Name = .PART_2_TSB_LINK,
636 hypervisor
637 }
638#endif
639#endif
640
641#ifdef PART_3_USED
642SECTION .PART_3_CTX_ZERO_TSB_0 DATA_VA=PART3_Z_ADDR_0
643#ifndef ALL_PAGE_CUSTOM_MAP
644attr_data {
645 Name = .PART_3_CTX_ZERO_TSB_0,
646 hypervisor
647 }
648#endif
649SECTION .PART_3_CTX_NONZERO_TSB_0 DATA_VA=PART3_NZ_ADDR_0
650#ifndef ALL_PAGE_CUSTOM_MAP
651attr_data {
652 Name = .PART_3_CTX_NONZERO_TSB_0,
653 hypervisor
654 }
655#endif
656SECTION .PART_3_CTX_ZERO_TSB_0 DATA_VA=PART3_Z_ADDR_0
657#ifndef ALL_PAGE_CUSTOM_MAP
658attr_data {
659 Name = .PART_3_CTX_ZERO_TSB_0,
660 hypervisor
661 }
662#endif
663SECTION .PART_3_CTX_NONZERO_TSB_0 DATA_VA=PART3_NZ_ADDR_0
664#ifndef ALL_PAGE_CUSTOM_MAP
665attr_data {
666 Name = .PART_3_CTX_NONZERO_TSB_0,
667 hypervisor
668 }
669#endif
670SECTION .PART_3_TSB_LINK DATA_VA=PART_3_LINK_AREA_BASE_ADDR
671#ifndef ALL_PAGE_CUSTOM_MAP
672attr_data {
673 Name = .PART_3_TSB_LINK,
674 hypervisor
675 }
676#endif
677#endif
678
679#ifdef PART_4_USED
680SECTION .PART_4_CTX_ZERO_TSB_0 DATA_VA=PART4_Z_ADDR_0
681#ifndef ALL_PAGE_CUSTOM_MAP
682attr_data {
683 Name = .PART_4_CTX_ZERO_TSB_0,
684 hypervisor
685 }
686#endif
687SECTION .PART_4_CTX_NONZERO_TSB_0 DATA_VA=PART4_NZ_ADDR_0
688#ifndef ALL_PAGE_CUSTOM_MAP
689attr_data {
690 Name = .PART_4_CTX_NONZERO_TSB_0,
691 hypervisor
692 }
693#endif
694SECTION .PART_4_CTX_ZERO_TSB_0 DATA_VA=PART4_Z_ADDR_0
695#ifndef ALL_PAGE_CUSTOM_MAP
696attr_data {
697 Name = .PART_4_CTX_ZERO_TSB_0,
698 hypervisor
699 }
700#endif
701SECTION .PART_4_CTX_NONZERO_TSB_0 DATA_VA=PART4_NZ_ADDR_0
702#ifndef ALL_PAGE_CUSTOM_MAP
703attr_data {
704 Name = .PART_4_CTX_NONZERO_TSB_0,
705 hypervisor
706 }
707#endif
708SECTION .PART_4_TSB_LINK DATA_VA=PART_4_LINK_AREA_BASE_ADDR
709#ifndef ALL_PAGE_CUSTOM_MAP
710attr_data {
711 Name = .PART_4_TSB_LINK,
712 hypervisor
713 }
714#endif
715#endif
716
717#ifdef PART_5_USED
718SECTION .PART_5_CTX_ZERO_TSB_0 DATA_VA=PART5_Z_ADDR_0
719#ifndef ALL_PAGE_CUSTOM_MAP
720attr_data {
721 Name = .PART_5_CTX_ZERO_TSB_0,
722 hypervisor
723 }
724#endif
725SECTION .PART_5_CTX_NONZERO_TSB_0 DATA_VA=PART5_NZ_ADDR_0
726#ifndef ALL_PAGE_CUSTOM_MAP
727attr_data {
728 Name = .PART_5_CTX_NONZERO_TSB_0,
729 hypervisor
730 }
731#endif
732SECTION .PART_5_CTX_ZERO_TSB_0 DATA_VA=PART5_Z_ADDR_0
733#ifndef ALL_PAGE_CUSTOM_MAP
734attr_data {
735 Name = .PART_5_CTX_ZERO_TSB_0,
736 hypervisor
737 }
738#endif
739SECTION .PART_5_CTX_NONZERO_TSB_0 DATA_VA=PART5_NZ_ADDR_0
740#ifndef ALL_PAGE_CUSTOM_MAP
741attr_data {
742 Name = .PART_5_CTX_NONZERO_TSB_0,
743 hypervisor
744 }
745#endif
746SECTION .PART_5_TSB_LINK DATA_VA=PART_5_LINK_AREA_BASE_ADDR
747#ifndef ALL_PAGE_CUSTOM_MAP
748attr_data {
749 Name = .PART_5_TSB_LINK,
750 hypervisor
751 }
752#endif
753#endif
754
755#ifdef PART_6_USED
756SECTION .PART_6_CTX_ZERO_TSB_0 DATA_VA=PART6_Z_ADDR_0
757#ifndef ALL_PAGE_CUSTOM_MAP
758attr_data {
759 Name = .PART_6_CTX_ZERO_TSB_0,
760 hypervisor
761 }
762#endif
763SECTION .PART_6_CTX_NONZERO_TSB_0 DATA_VA=PART6_NZ_ADDR_0
764#ifndef ALL_PAGE_CUSTOM_MAP
765attr_data {
766 Name = .PART_6_CTX_NONZERO_TSB_0,
767 hypervisor
768 }
769#endif
770SECTION .PART_6_CTX_ZERO_TSB_0 DATA_VA=PART6_Z_ADDR_0
771#ifndef ALL_PAGE_CUSTOM_MAP
772attr_data {
773 Name = .PART_6_CTX_ZERO_TSB_0,
774 hypervisor
775 }
776#endif
777SECTION .PART_6_CTX_NONZERO_TSB_0 DATA_VA=PART6_NZ_ADDR_0
778#ifndef ALL_PAGE_CUSTOM_MAP
779attr_data {
780 Name = .PART_6_CTX_NONZERO_TSB_0,
781 hypervisor
782 }
783#endif
784SECTION .PART_6_TSB_LINK DATA_VA=PART_6_LINK_AREA_BASE_ADDR
785#ifndef ALL_PAGE_CUSTOM_MAP
786attr_data {
787 Name = .PART_6_TSB_LINK,
788 hypervisor
789 }
790#endif
791#endif
792
793#ifdef PART_7_USED
794SECTION .PART_7_CTX_ZERO_TSB_0 DATA_VA=PART7_Z_ADDR_0
795#ifndef ALL_PAGE_CUSTOM_MAP
796attr_data {
797 Name = .PART_7_CTX_ZERO_TSB_0,
798 hypervisor
799 }
800#endif
801SECTION .PART_7_CTX_NONZERO_TSB_0 DATA_VA=PART7_NZ_ADDR_0
802#ifndef ALL_PAGE_CUSTOM_MAP
803attr_data {
804 Name = .PART_7_CTX_NONZERO_TSB_0,
805 hypervisor
806 }
807#endif
808SECTION .PART_7_CTX_ZERO_TSB_0 DATA_VA=PART7_Z_ADDR_0
809#ifndef ALL_PAGE_CUSTOM_MAP
810attr_data {
811 Name = .PART_7_CTX_ZERO_TSB_0,
812 hypervisor
813 }
814#endif
815SECTION .PART_7_CTX_NONZERO_TSB_0 DATA_VA=PART7_NZ_ADDR_0
816#ifndef ALL_PAGE_CUSTOM_MAP
817attr_data {
818 Name = .PART_7_CTX_NONZERO_TSB_0,
819 hypervisor
820 }
821#endif
822SECTION .PART_7_TSB_LINK DATA_VA=PART_7_LINK_AREA_BASE_ADDR
823#ifndef ALL_PAGE_CUSTOM_MAP
824attr_data {
825 Name = .PART_7_TSB_LINK,
826 hypervisor
827 }
828#endif
829#endif
830#endif
831#endif
832
833
834#ifndef HBOOT_HV_ONLY
835SECTION .TRAPS TEXT_VA=TRAP_BASE_VA, DATA_VA=TRAP_DATA_VA
836#ifndef ALL_PAGE_CUSTOM_MAP
837changequote([, ])dnl
838forloop([i], 0, 7, [
839ifdef([part_]i[_used],[
840attr_text {
841 Name = .TRAPS,
842 RA = TRAP_BASE_RA,
843 PA = ra2pa2(TRAP_BASE_RA,i),
844#ifndef USE_N1_TSB_NAMES
845 [part_]i[_ctx_zero_tsb_config_0],
846#else
847 [part_]i[_i_ctx_zero_ps0_tsb],
848#endif
849 TTE_G=1, TTE_Context=0, TTE_V=1,
850 TTE_Size=PART0_Z_PAGE_SIZE_0, TTE_NFO=0, TTE_IE=0,
851 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0,
852 TTE_E=0, TTE_P=1, TTE_W=1, TTE_X=1
853 }
854attr_data {
855 Name = .TRAPS,
856 RA = TRAP_DATA_RA,
857 PA = ra2pa2(TRAP_DATA_RA,i),
858#ifndef USE_N1_TSB_NAMES
859 [part_]i[_ctx_zero_tsb_config_0],
860#else
861 [part_]i[_d_ctx_zero_ps0_tsb],
862#endif
863 TTE_G=1, TTE_Context=0, TTE_V=1,
864 TTE_Size=PART0_Z_PAGE_SIZE_0, TTE_NFO=0, TTE_IE=0,
865 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0,
866 TTE_E=0, TTE_P=1, TTE_W=1
867 }
868#ifdef TRAP_SECT_HV_ALSO
869attr_text {
870 Name = .TRAPS,
871 hypervisor
872}
873attr_data {
874 Name = .TRAPS,
875 hypervisor
876}
877#endif
878
879])dnl
880])dnl
881changequote(`,')dnl'
882
883#endif
884
885#include "traps.s"
886
887#endif
888
889SECTION .KERNEL TEXT_VA = KERNEL_BASE_TEXT_VA, DATA_VA=KERNEL_BASE_DATA_VA
890#ifndef ALL_PAGE_CUSTOM_MAP
891#ifndef HBOOT_HV_ONLY
892changequote([, ])dnl
893forloop([i], 0, 7, [
894ifdef([part_]i[_used],[
895attr_text {
896 Name = .KERNEL,
897 RA = KERNEL_BASE_TEXT_RA,
898 PA = ra2pa2(KERNEL_BASE_TEXT_RA,i),
899#ifndef USE_N1_TSB_NAMES
900#ifndef NO_NZ_TSB_IN_PRIV
901 [part_]i[_ctx_nonzero_tsb_config_0],
902#endif
903 [part_]i[_ctx_zero_tsb_config_0],
904#else
905#ifndef NO_NZ_TSB_IN_PRIV
906 [part_]i[_i_ctx_nonzero_ps0_tsb],
907#endif
908 [part_]i[_i_ctx_zero_ps0_tsb],
909#endif
910 TTE_G=1, TTE_Context=0, TTE_V=1,
911 TTE_Size=PART0_Z_PAGE_SIZE_0, TTE_NFO=0, TTE_IE=0,
912 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0,
913 TTE_E=0, TTE_P=1, TTE_W=1, TTE_X=1
914 }
915
916attr_data {
917 Name = .KERNEL,
918 RA=KERNEL_BASE_DATA_RA,
919 PA=ra2pa2(KERNEL_BASE_DATA_RA,i),
920#ifndef USE_N1_TSB_NAMES
921#ifndef NO_NZ_TSB_IN_PRIV
922 [part_]i[_ctx_nonzero_tsb_config_0],
923#endif
924 [part_]i[_ctx_zero_tsb_config_0],
925#else
926#ifndef NO_NZ_TSB_IN_PRIV
927 [part_]i[_d_ctx_nonzero_ps0_tsb],
928#endif
929 [part_]i[_d_ctx_zero_ps0_tsb],
930#endif
931 TTE_G=1, TTE_Context=0, TTE_V=1,
932 TTE_Size=PART0_Z_PAGE_SIZE_0, TTE_NFO=0,
933 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
934 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=1, TTE_W=1
935 }
936
937])dnl
938])dnl
939changequote(`,')dnl'
940#else
941attr_text {
942 Name = .KERNEL,
943 hypervisor
944}
945attr_data {
946 Name = .KERNEL,
947 hypervisor
948}
949#endif
950#endif
951
952.text
953
954kernel:
955 ! set trap base addr
956 setx TRAP_BASE_VA, %l0, %l7
957 wrpr %l7, %g0, %tba
958
959 ! setup %g7 to point to per thread user data scratchpad
960 rdth_id_p ! get thread ID in %o1
961 mov %o1, %o5 ! save in %o5 to be used later
962 sllx %o1, 7, %o1
963 setx user_globals, %g1, %g7
964 add %g7, %o1, %g7
965
966#ifndef USER_PAGE_CUSTOM_MAP
967 ! setup user heap pointer
968 setx heapptr, %g1, %g2
969 setx user_heap_start, %g1, %g3
970 stx %g3, [%g2]
971#endif
972
973 ! init context regs
974#ifndef MAIN_PAGE_NUCLEUS_ONLY
975 mov PCONTEXT, %o1
976 mov SCONTEXT, %o2
977 mov PCONTEXT1, %o6
978 mov SCONTEXT1, %o7
979#else
980 mov 0, %o1
981 mov 0, %o2
982 mov 0, %o3
983 mov 0, %o4
984#endif
985
986#if !defined(USER_PAGE_CUSTOM_MAP) && defined(USER_TEXT_MT_MAP)
987 add %o1, %o5, %o1 ! add thread id to contexts
988 add %o2, %o5, %o2
989#endif
990#if !defined(USER_PAGE_CUSTOM_MAP) && !defined(MAIN_PAGE_NUCLEUS_ONLY)
991 mov 0x0, %o3 ! go to non-priv code
992#else
993 mov 0x1, %o3 ! go to priv code
994#endif
995 mov 0x0, %o4 ! set hpriv to zero
996 setx start_label_list, %g1, %g2
997 sllx %o5, 3, %o5 ! offset - start_label_list
998 ldx [%g2 + %o5], %o5 ! %o5 contains start_label
999
1000end_of_boot:
1001 ta T_CHANGE_CTX
1002 nop
1003
1004#include "kernel_handler.s"
1005
1006!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
1007!! This bit of magic figures out which TSB config to be
1008!! use for the main page. Boot/Traps use config_0, so if
1009!! you want to do anything special like change page size
1010!! etc, use TSB config other than 0 by defining MAIN_PAGE_USE_CONFIG
1011!! in your diag.
1012!!
1013!! Only works for partition 0 page sizes
1014!!
1015#ifdef MAIN_PAGE_USE_CONFIG
1016#if !(MAIN_PAGE_USE_CONFIG ^ 3)
1017#define _TSB_CONFIG_0 _tsb_config_3
1018#define MAIN_PAGE_NZ_PAGE_SIZE PART0_NZ_PAGE_SIZE_3
1019#define MAIN_PAGE_Z_PAGE_SIZE PART0_Z_PAGE_SIZE_3
1020#elif !(MAIN_PAGE_USE_CONFIG ^ 2)
1021#define _TSB_CONFIG_0 _tsb_config_2
1022#define MAIN_PAGE_NZ_PAGE_SIZE PART0_NZ_PAGE_SIZE_2
1023#define MAIN_PAGE_Z_PAGE_SIZE PART0_Z_PAGE_SIZE_2
1024#elif !(MAIN_PAGE_USE_CONFIG ^ 1)
1025#define _TSB_CONFIG_0 _tsb_config_1
1026#define MAIN_PAGE_NZ_PAGE_SIZE PART0_NZ_PAGE_SIZE_1
1027#define MAIN_PAGE_Z_PAGE_SIZE PART0_Z_PAGE_SIZE_1
1028#endif
1029#else
1030#define _TSB_CONFIG_0 _tsb_config_0
1031#define MAIN_PAGE_NZ_PAGE_SIZE PART0_NZ_PAGE_SIZE_0
1032#define MAIN_PAGE_Z_PAGE_SIZE PART0_Z_PAGE_SIZE_0
1033#endif
1034
1035#ifndef USER_PAGE_CUSTOM_MAP
1036#ifndef ALL_PAGE_CUSTOM_MAP
1037
1038changequote([, ])dnl
1039
1040#ifndef HBOOT_HV_ONLY
1041
1042! dnl M4_user_text_idx is max thread number if USER_TEXT_MT_MAP else 0.
1043foreachbit([i], 64, M4_user_text_mask, [
1044#ifndef USER_TEXT_MT_MAP
1045SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA, BSS_VA=MAIN_BASE_BSS_VA
1046#else
1047SECTION [.MAIN]i TEXT_VA=[0x]mpeval(MAIN_BASE_TEXT_VA + i * USER_PAGE_INCR, 16), DATA_VA=[0x]mpeval(MAIN_BASE_DATA_VA + i * USER_PAGE_INCR, 16), BSS_VA=[0x]mpeval(MAIN_BASE_BSS_VA + i * USER_PAGE_INCR, 16)
1048#endif
1049attr_text {
1050#ifndef USER_TEXT_MT_MAP
1051 Name = .MAIN,
1052#else
1053 Name = [.MAIN]i,
1054#endif
1055 VA= [0x]mpeval(MAIN_BASE_TEXT_VA + i * USER_PAGE_INCR, 16),
1056#ifndef MAIN_PAGE_VA_IS_RA_ALSO
1057 RA= [0x]mpeval(MAIN_BASE_TEXT_RA + i * USER_PAGE_INCR, 16),
1058 PA= ra2pa2([0x]mpeval(MAIN_BASE_TEXT_RA + i * USER_PAGE_INCR, 16),tid2pid(i)),
1059#else
1060 RA= [0x]mpeval(MAIN_BASE_TEXT_VA + i * USER_PAGE_INCR, 16),
1061 PA= ra2pa2([0x]mpeval(MAIN_BASE_TEXT_VA + i * USER_PAGE_INCR, 16),tid2pid(i)),
1062#endif
1063#ifndef MAIN_PAGE_NUCLEUS_ONLY
1064#ifndef USE_N1_TSB_NAMES
1065 [part_]tid2pid(i)[_ctx_nonzero]_TSB_CONFIG_0,
1066#else
1067 [part_]tid2pid(i)[_i_ctx_nonzero_ps0_tsb],
1068#endif
1069#else
1070#ifndef USE_N1_TSB_NAMES
1071 [part_]tid2pid(i)[_ctx_zero]_TSB_CONFIG_0,
1072#else
1073 [part_]tid2pid(i)[_i_ctx_zero_ps0_tsb],
1074#endif
1075#endif
1076#ifdef MAIN_PAGE_NUCLEUS_ALSO
1077#ifndef USE_N1_TSB_NAMES
1078 [part_]tid2pid(i)[_ctx_zero]_TSB_CONFIG_0,
1079#else
1080 [part_]tid2pid(i)[_i_ctx_zero_ps0_tsb],
1081#endif
1082#endif
1083#ifdef MAIN_TEXT_PAGE_NUCLEUS_DATA_ALSO
1084#ifndef USE_N1_TSB_NAMES
1085 [part_]tid2pid(i)[_ctx_zero]_TSB_CONFIG_0,
1086#else
1087 [part_]tid2pid(i)[_d_ctx_zero_ps0_tsb],
1088#endif
1089#endif
1090 TTE_G=1, TTE_Context=[0x]eval(PCONTEXT + i, 16), TTE_V=1,
1091#ifndef MAIN_PAGE_NUCLEUS_ONLY
1092 TTE_Size=MAIN_PAGE_NZ_PAGE_SIZE,
1093#else
1094 TTE_Size=MAIN_PAGE_Z_PAGE_SIZE,
1095#endif
1096 TTE_NFO=0,
1097 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1098 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_X=1,
1099#ifdef MAIN_TEXT_DATA_ALSO
1100 TTE_W=1
1101#else
1102 TTE_W=0
1103#endif
1104 }
1105
1106#ifdef THREAD_0_DIAG
1107define(M4_midasdefs, esyscmd(grep "midas: midas" ../midas.log | perl -ane 'print join(" ", grep(/-D/, @F))'))
1108!Defines for second pass cpp are M4_midasdefs
1109#else
1110#define M4_midasdefs
1111#endif
1112
1113#define SYSCMD_0 cat $DV_ROOT/verif/diag/assembly
1114#define SYSCMD_1 sed -e 's/.global.*main//'| bw_cpp -traditional-cpp -B -P M4_midasdefs -D__HBOOT_S_DONE__ -DNO_DECLARE_TSB -DMT_TEMPLATE -I$DV_ROOT/verif/diag/assembly/include
1115#define SYSCMD_2 bw_m4 -I $DV_ROOT/verif/diag/assembly/include | sed -e 's/\.MAIN\./\.MAIN}}i{{\./'
1116
1117dnl Diag has code for more than one thread. Make a main for each thread.
1118#ifdef USER_TEXT_MT_MAP
1119
1120[.global main]i
1121[main]i:
1122
1123dnl This is how N1 is doing multi thread diags. Each thread can run a
1124dnl separate stand alone diag that is named using pound define
1125dnl THREAD_X_DIAG lines. This is done in a separate file, a
1126dnl mt template file. Need example... Need 64 threads
1127#ifdef THREAD_0_DIAG
1128! Will execute SYSCMD_0/THREAD_0_DIAG | SYSCMD_1 | SYSCMD_2 ..
1129changequote({{, }})
1130ifelse(
1131i, 0, {{esyscmd(SYSCMD_0/THREAD_0_DIAG | SYSCMD_1 | SYSCMD_2)}},
1132i, 1, {{esyscmd(SYSCMD_0/THREAD_1_DIAG | SYSCMD_1 | SYSCMD_2)}},
1133i, 2, {{esyscmd(SYSCMD_0/THREAD_2_DIAG | SYSCMD_1 | SYSCMD_2)}},
1134i, 3, {{esyscmd(SYSCMD_0/THREAD_3_DIAG | SYSCMD_1 | SYSCMD_2)}},
1135i, 4, {{esyscmd(SYSCMD_0/THREAD_4_DIAG | SYSCMD_1 | SYSCMD_2)}},
1136i, 5, {{esyscmd(SYSCMD_0/THREAD_5_DIAG | SYSCMD_1 | SYSCMD_2)}},
1137i, 6, {{esyscmd(SYSCMD_0/THREAD_6_DIAG | SYSCMD_1 | SYSCMD_2)}},
1138i, 7, {{esyscmd(SYSCMD_0/THREAD_7_DIAG | SYSCMD_1 | SYSCMD_2)}},
1139i, 8, {{esyscmd(SYSCMD_0/THREAD_8_DIAG | SYSCMD_1 | SYSCMD_2)}},
1140i, 9, {{esyscmd(SYSCMD_0/THREAD_9_DIAG | SYSCMD_1 | SYSCMD_2)}},
1141i, 10, {{esyscmd(SYSCMD_0/THREAD_10_DIAG | SYSCMD_1 | SYSCMD_2)}},
1142i, 11, {{esyscmd(SYSCMD_0/THREAD_11_DIAG | SYSCMD_1 | SYSCMD_2)}},
1143i, 12, {{esyscmd(SYSCMD_0/THREAD_12_DIAG | SYSCMD_1 | SYSCMD_2)}},
1144i, 13, {{esyscmd(SYSCMD_0/THREAD_13_DIAG | SYSCMD_1 | SYSCMD_2)}},
1145i, 14, {{esyscmd(SYSCMD_0/THREAD_14_DIAG | SYSCMD_1 | SYSCMD_2)}},
1146i, 15, {{esyscmd(SYSCMD_0/THREAD_15_DIAG | SYSCMD_1 | SYSCMD_2)}},
1147i, 16, {{esyscmd(SYSCMD_0/THREAD_16_DIAG | SYSCMD_1 | SYSCMD_2)}},
1148i, 17, {{esyscmd(SYSCMD_0/THREAD_17_DIAG | SYSCMD_1 | SYSCMD_2)}},
1149i, 18, {{esyscmd(SYSCMD_0/THREAD_18_DIAG | SYSCMD_1 | SYSCMD_2)}},
1150i, 19, {{esyscmd(SYSCMD_0/THREAD_19_DIAG | SYSCMD_1 | SYSCMD_2)}},
1151i, 20, {{esyscmd(SYSCMD_0/THREAD_20_DIAG | SYSCMD_1 | SYSCMD_2)}},
1152i, 21, {{esyscmd(SYSCMD_0/THREAD_21_DIAG | SYSCMD_1 | SYSCMD_2)}},
1153i, 22, {{esyscmd(SYSCMD_0/THREAD_22_DIAG | SYSCMD_1 | SYSCMD_2)}},
1154i, 23, {{esyscmd(SYSCMD_0/THREAD_23_DIAG | SYSCMD_1 | SYSCMD_2)}},
1155i, 24, {{esyscmd(SYSCMD_0/THREAD_24_DIAG | SYSCMD_1 | SYSCMD_2)}},
1156i, 25, {{esyscmd(SYSCMD_0/THREAD_25_DIAG | SYSCMD_1 | SYSCMD_2)}},
1157i, 26, {{esyscmd(SYSCMD_0/THREAD_26_DIAG | SYSCMD_1 | SYSCMD_2)}},
1158i, 27, {{esyscmd(SYSCMD_0/THREAD_27_DIAG | SYSCMD_1 | SYSCMD_2)}},
1159i, 28, {{esyscmd(SYSCMD_0/THREAD_28_DIAG | SYSCMD_1 | SYSCMD_2)}},
1160i, 29, {{esyscmd(SYSCMD_0/THREAD_29_DIAG | SYSCMD_1 | SYSCMD_2)}},
1161i, 30, {{esyscmd(SYSCMD_0/THREAD_30_DIAG | SYSCMD_1 | SYSCMD_2)}},
1162i, 31, {{esyscmd(SYSCMD_0/THREAD_31_DIAG | SYSCMD_1 | SYSCMD_2)}},
1163i, 32, {{esyscmd(SYSCMD_0/THREAD_32_DIAG | SYSCMD_1 | SYSCMD_2)}},
1164i, 33, {{esyscmd(SYSCMD_0/THREAD_33_DIAG | SYSCMD_1 | SYSCMD_2)}},
1165i, 34, {{esyscmd(SYSCMD_0/THREAD_34_DIAG | SYSCMD_1 | SYSCMD_2)}},
1166i, 35, {{esyscmd(SYSCMD_0/THREAD_35_DIAG | SYSCMD_1 | SYSCMD_2)}},
1167i, 36, {{esyscmd(SYSCMD_0/THREAD_36_DIAG | SYSCMD_1 | SYSCMD_2)}},
1168i, 37, {{esyscmd(SYSCMD_0/THREAD_37_DIAG | SYSCMD_1 | SYSCMD_2)}},
1169i, 38, {{esyscmd(SYSCMD_0/THREAD_38_DIAG | SYSCMD_1 | SYSCMD_2)}},
1170i, 39, {{esyscmd(SYSCMD_0/THREAD_39_DIAG | SYSCMD_1 | SYSCMD_2)}},
1171i, 40, {{esyscmd(SYSCMD_0/THREAD_40_DIAG | SYSCMD_1 | SYSCMD_2)}},
1172i, 41, {{esyscmd(SYSCMD_0/THREAD_41_DIAG | SYSCMD_1 | SYSCMD_2)}},
1173i, 42, {{esyscmd(SYSCMD_0/THREAD_42_DIAG | SYSCMD_1 | SYSCMD_2)}},
1174i, 43, {{esyscmd(SYSCMD_0/THREAD_43_DIAG | SYSCMD_1 | SYSCMD_2)}},
1175i, 44, {{esyscmd(SYSCMD_0/THREAD_44_DIAG | SYSCMD_1 | SYSCMD_2)}},
1176i, 45, {{esyscmd(SYSCMD_0/THREAD_45_DIAG | SYSCMD_1 | SYSCMD_2)}},
1177i, 46, {{esyscmd(SYSCMD_0/THREAD_46_DIAG | SYSCMD_1 | SYSCMD_2)}},
1178i, 47, {{esyscmd(SYSCMD_0/THREAD_47_DIAG | SYSCMD_1 | SYSCMD_2)}},
1179i, 48, {{esyscmd(SYSCMD_0/THREAD_48_DIAG | SYSCMD_1 | SYSCMD_2)}},
1180i, 49, {{esyscmd(SYSCMD_0/THREAD_49_DIAG | SYSCMD_1 | SYSCMD_2)}},
1181i, 50, {{esyscmd(SYSCMD_0/THREAD_50_DIAG | SYSCMD_1 | SYSCMD_2)}},
1182i, 51, {{esyscmd(SYSCMD_0/THREAD_51_DIAG | SYSCMD_1 | SYSCMD_2)}},
1183i, 52, {{esyscmd(SYSCMD_0/THREAD_52_DIAG | SYSCMD_1 | SYSCMD_2)}},
1184i, 53, {{esyscmd(SYSCMD_0/THREAD_53_DIAG | SYSCMD_1 | SYSCMD_2)}},
1185i, 54, {{esyscmd(SYSCMD_0/THREAD_54_DIAG | SYSCMD_1 | SYSCMD_2)}},
1186i, 55, {{esyscmd(SYSCMD_0/THREAD_55_DIAG | SYSCMD_1 | SYSCMD_2)}},
1187i, 56, {{esyscmd(SYSCMD_0/THREAD_56_DIAG | SYSCMD_1 | SYSCMD_2)}},
1188i, 57, {{esyscmd(SYSCMD_0/THREAD_57_DIAG | SYSCMD_1 | SYSCMD_2)}},
1189i, 58, {{esyscmd(SYSCMD_0/THREAD_58_DIAG | SYSCMD_1 | SYSCMD_2)}},
1190i, 59, {{esyscmd(SYSCMD_0/THREAD_59_DIAG | SYSCMD_1 | SYSCMD_2)}},
1191i, 60, {{esyscmd(SYSCMD_0/THREAD_60_DIAG | SYSCMD_1 | SYSCMD_2)}},
1192i, 61, {{esyscmd(SYSCMD_0/THREAD_61_DIAG | SYSCMD_1 | SYSCMD_2)}},
1193i, 62, {{esyscmd(SYSCMD_0/THREAD_62_DIAG | SYSCMD_1 | SYSCMD_2)}},
1194{{esyscmd(SYSCMD_0/THREAD_63_DIAG | SYSCMD_1 | SYSCMD_2)}})
1195changequote([, ])dnl
1196#else
1197
1198
1199#ifdef USER_TEXT_MT_MAP_ALL
1200dnl If the diag file has unique code for each/all threads then split up
1201dnl the file by thread as if we had each threads code in a separate
1202dnl file as in THREAD_n_DIAG above. Will split up focus diags that use
1203dnl ! Thread 0 Start
1204dnl comments.
1205changequote(`,')dnl'
1206syscmd(cat diag.s | awk "/^.define|^.include/`,'/th.fork/" > diag.tmp)
1207syscmd(cat diag.s | awk "/^.global `thread_'i/`,'/EXIT_GOOD/" >> diag.tmp)
1208syscmd(cat diag.s | awk "/^.data/`,'/^.end/" >> diag.tmp)
1209esyscmd(cat diag.tmp | SYSCMD_1 | SYSCMD_2)
1210#else
1211dnl If the diag has code for one thread that is going to be
1212dnl duplicated for, and run on, each thread.
1213changequote(`,')dnl'
1214esyscmd(cat diag.s | SYSCMD_1 | SYSCMD_2)
1215#endif
1216
1217changequote([, ])dnl
1218#endif
1219#endif
1220
1221
1222])dnl forloop
1223
1224#else
1225SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA, BSS_VA=MAIN_BASE_BSS_VA
1226#endif
1227
1228#if (defined MAIN_PAGE_HV_ALSO || defined HBOOT_HV_ONLY)
1229foreachbit([i], 64, M4_user_text_mask, [
1230attr_text {
1231#ifndef USER_TEXT_MT_MAP
1232 Name = .MAIN,
1233#else
1234 Name = [.MAIN]i,
1235#endif
1236 VA= [0x]mpeval(MAIN_BASE_TEXT_VA + i * USER_PAGE_INCR, 16),
1237 hypervisor
1238 }
1239])dnl
1240#endif
1241
1242
1243#ifndef HBOOT_HV_ONLY
1244
1245foreachbit([i], 64, M4_user_data_mask, [
1246attr_data {
1247#ifndef USER_TEXT_MT_MAP
1248 Name = .MAIN,
1249#else
1250 Name = [.MAIN]i,
1251#endif
1252 VA= [0x]mpeval(MAIN_BASE_DATA_VA + i * USER_PAGE_INCR, 16),
1253#ifndef MAIN_PAGE_VA_IS_RA_ALSO
1254 RA= [0x]mpeval(MAIN_BASE_DATA_RA + i * USER_PAGE_INCR, 16),
1255 PA= ra2pa2([0x]mpeval(MAIN_BASE_DATA_RA + i * USER_PAGE_INCR, 16),tid2pid(i)),
1256#else
1257 RA= [0x]mpeval(MAIN_BASE_DATA_VA + i * USER_PAGE_INCR, 16),
1258 PA= ra2pa2([0x]mpeval(MAIN_BASE_DATA_VA + i * USER_PAGE_INCR, 16),tid2pid(i)),
1259#endif
1260#ifndef MAIN_PAGE_NUCLEUS_ONLY
1261#ifndef USE_N1_TSB_NAMES
1262 [part_]tid2pid(i)[_ctx_nonzero]_TSB_CONFIG_0,
1263#else
1264 [part_]tid2pid(i)[_d_ctx_nonzero_ps0_tsb],
1265#endif
1266#else
1267#ifndef USE_N1_TSB_NAMES
1268 [part_]tid2pid(i)[_ctx_zero]_TSB_CONFIG_0
1269#else
1270 [part_]tid2pid(i)[_d_ctx_zero_ps0_tsb],
1271#endif
1272#endif
1273#ifdef MAIN_PAGE_NUCLEUS_ALSO
1274#ifndef USE_N1_TSB_NAMES
1275 [part_]tid2pid(i)[_ctx_zero]_TSB_CONFIG_0
1276#else
1277 [part_]tid2pid(i)[_d_ctx_zero_ps0_tsb],
1278#endif
1279#endif
1280#ifdef MAIN_DATA_TEXT_ALSO
1281#ifndef USE_N1_TSB_NAMES
1282 [part_]tid2pid(i)[_ctx_nonzero]_TSB_CONFIG_0,
1283#else
1284 [part_]tid2pid(i)[_d_ctx_nonzero_ps0_tsb],
1285#endif
1286#endif
1287 TTE_G=1, TTE_Context=[0x]eval(PCONTEXT + i, 16), TTE_V=1,
1288#ifndef MAIN_PAGE_NUCLEUS_ONLY
1289 TTE_Size=MAIN_PAGE_NZ_PAGE_SIZE,
1290#else
1291 TTE_Size=MAIN_PAGE_Z_PAGE_SIZE,
1292#endif
1293 TTE_NFO=0,
1294 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1295 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1
1296 }
1297
1298])dnl
1299
1300#endif
1301
1302#if (defined MAIN_PAGE_HV_ALSO || defined HBOOT_HV_ONLY)
1303foreachbit([i], 64, M4_user_data_mask, [
1304attr_data {
1305#ifndef USER_TEXT_MT_MAP
1306 Name = .MAIN,
1307#else
1308 Name = [.MAIN]i,
1309#endif
1310 VA= [0x]mpeval(MAIN_BASE_DATA_VA + i * USER_PAGE_INCR, 16),
1311 hypervisor
1312 }
1313])dnl
1314#endif
1315
1316
1317foreachbit([i], 64, M4_user_data_mask, [
1318attr_bss {
1319#ifndef USER_TEXT_MT_MAP
1320 Name = .MAIN,
1321#else
1322 Name = [.MAIN]i,
1323#endif
1324 VA= [0x]mpeval(MAIN_BASE_BSS_VA + i * USER_PAGE_INCR, 16),
1325 RA= [0x]mpeval(MAIN_BASE_BSS_RA + i * USER_PAGE_INCR, 16),
1326 PA= ra2pa2([0x]mpeval(MAIN_BASE_BSS_RA + i * USER_PAGE_INCR, 16),tid2pid(i)),
1327#ifndef USE_N1_TSB_NAMES
1328 [part_]tid2pid(i)[_ctx_nonzero]_TSB_CONFIG_0,
1329#else
1330 [part_]tid2pid(i)[_d_ctx_nonzero_ps0_tsb],
1331#endif
1332 TTE_G=0, TTE_Context=[0x]eval(PCONTEXT + i, 16), TTE_V=1,
1333#ifndef MAIN_PAGE_NUCLEUS_ONLY
1334 TTE_Size=MAIN_PAGE_NZ_PAGE_SIZE,
1335#else
1336 TTE_Size=MAIN_PAGE_Z_PAGE_SIZE,
1337#endif
1338 TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1339 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1
1340 }
1341])dnl
1342
1343changequote(`,')dnl'
1344
1345#endif
1346#endif
1347
1348
1349#ifdef USE_STACK
1350changequote([, ])dnl
1351foreachbit([i], 64, THREAD_MASK, [
1352SECTION [.STACK]eval(i) BSS_VA= [0x]mpeval(STACK_BASE_VA + i * USER_PAGE_INCR, 16)
1353
1354attr_bss {
1355 NAME=[.STACK]eval(i),
1356 VA=[0x]mpeval(STACK_BASE_VA + i * USER_PAGE_INCR, 16),
1357 RA=[0x]mpeval(STACK_BASE_RA + i * USER_PAGE_INCR, 16),
1358 PA=ra2pa2([0x]mpeval(STACK_BASE_RA + i * USER_PAGE_INCR, 16), tid2pid(eval(i))),
1359#ifndef USE_N1_TSB_NAMES
1360 [part_]tid2pid(eval(i))[_ctx_nonzero]_TSB_CONFIG_0,
1361#else
1362 [part_]tid2pid(eval(i))[_d_ctx_nonzero_ps0_tsb],
1363#endif
1364 TTE_G=1, TTE_Context=[0x]eval(PCONTEXT,16), TTE_V=1,
1365#ifndef MAIN_PAGE_NUCLEUS_ONLY
1366 TTE_Size=MAIN_PAGE_NZ_PAGE_SIZE,
1367#else
1368 TTE_Size=MAIN_PAGE_Z_PAGE_SIZE,
1369#endif
1370 TTE_NFO=0,
1371 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1372 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1
1373 }
1374.section .bss
1375.global [stack]eval(i)
1376[stack]eval(i):
1377 .skip STACKSIZE
1378
1379])dnl
1380changequote(`,')dnl'
1381#endif /* ifdef USE_STACK */
1382#if (defined USER_TEXT_MT_MAP && !(defined THREAD_0_DIAG || defined USER_PAGE_CUSTOM_MAP))
1383m4exit(0) dnl stop reading diag.s we have already read it for each thread
1384#endif
1385#endif /* __HBOOT_S_DONE__ */
1386#endif /* __HBOOT_S__ */
Full OpenSPARC design & verification tarball including full HDL.