Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / include / loadngo_l2_init.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: loadngo_l2_init.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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37*/
38#ifdef DTM_ENABLED
39 setx 0x8900000810, %g3, %g2 !! RESET STATUS reg
40 ldx [%g2], %g3 !! read reset source
41 and %g3, 2, %g3 !! nonzero if WMR
42 brz %g3, loadngo_done
43 nop
44#endif
45 ldxa [%g0] ASI_INTR_ID, %g1
46#ifndef SIXGUNS
47#ifndef PORTABLE_CORE
48changequote([, ])dnl ! The M4_* variables need this
49 cmp %g1, M4_master_tid
50changequote(`,')dnl ! [] are not quotes anymore
51#else
52 andcc %g1, 0x7, %g2
53#endif
54#else
55 ! Determine master thread by querying CORE_RUNNING
56 mov 0x50, %g3
57 ldxa [%g3]ASI_CMP_CORE, %g2 ! Who is running ?
58 neg %g2, %l1
59 xnor %g2, %l1, %l1
60 popc %l1, %l1 ! Get lowest bit set ..
61 dec %l1
62 cmp %l1, %g1
63#endif
64 bne %xcc, loadngo_done
65 nop
66loadngo_turnonL2:
67 ! enable L2-cache
68 mov 0xa9, %l2
69 sllx %l2, 32, %l2
70 stx %g0, [%l2 + 0x000]
71 stx %g0, [%l2 + 0x040]
72 stx %g0, [%l2 + 0x080]
73 stx %g0, [%l2 + 0x0c0]
74 stx %g0, [%l2 + 0x100]
75 stx %g0, [%l2 + 0x140]
76 stx %g0, [%l2 + 0x180]
77 stx %g0, [%l2 + 0x1c0]
78loadngo_turnonL1:
79 ! gee I sure do hope that these magic tricks work here!!
80 mov (CREGS_LSU_CTL_REG_DC << 1 | CREGS_LSU_CTL_REG_IC), %g2
81 stxa %g2, [%g0] 0x45
82
83 ! Up to here, all forms of loadngo are the same, but from here down,
84 ! only pass2_preamble needs the fancy loaderloader and the diag data.
85
86 ! In pass1 we don't care WHAT SSI instructions execute, all we want
87 ! is the cache dump at the end, and the SSI at the front don't matter.
88
89 ! In pass2slam, we will use the vectors from the end on, but not those
90 ! before here, so we need to branch directly to loadngo_done label.
91
92#ifdef LOADNGO_PREAMBLE
93 ba,a loadngo_shovecodein
94! nop delay slot for both paths
95#else
96! ASI_RST_VEC_MASK to 1
97#ifndef DTM_ENABLED
98 set 0x1, %i3
99 wr %g0, 0x45, %asi
100 stxa %i3, [%g0 + 0x18] %asi
101#endif
102 ba,a loadngo_done
103! nop ! delay slot for both paths
104#endif
105
106 ! Here is the code for PASS2 only.
107
108loadngo_shovecodein:
109 ! In an amusing example of recursive development, the loader code
110 ! that will be loaded is used to load the loader. In addition to
111 ! providing self documentation, this is still somewhat efficient
112 ! code and using it here puts a copy of it in mem.image.
113
114 ! this loader requires several registers to be setup
115
116loadngo_setupLoader:
117 setx LoaderData, %l1, %l7 ! setx is a macro
118 ba loadngo_gettagaddr ! NOT FIRST CACHE LINE, 0x3c in
119 sethi %hi(0x400000), %l4 ! one instruction in delay slot
120
121! NOTE loop does not start here, entry is gettagADDR, NO FALLTHROUGH
122.align 32 ! MUST align cacheable version, SSI doesn't really care
123loadngo_gettagdata:
124 ldx [%l7], %l1 ! get tag data
125 inc 8, %l7 ! advance data pointer
126 stx %l1, [%l2] ! store tag into tag array
127 ldx [%l7], %l2 ! get diagnostic address for data word 0
128 inc 8, %l7 ! advance data pointer
129 add %l2, 0x38, %l2 ! add 0x38 to even address base in l2
130 add %l2, %l4, %l3 ! odd word address (+0x400000) in l3
131
132loadngo_dwordloop:
133 ldx [%l7], %l1 ! get even data word (0,0x10,0x20...)
134 inc 8, %l7 ! advance data pointer
135 stx %l1, [%l2+%l0] ! store even instruction into data array
136 ldx [%l7], %l1 ! get odd data word (8,0x18,0x28...)
137 inc 8, %l7 ! advance data pointer
138 stx %l1, [%l3+%l0] ! store odd instruction into data array
139 brlz %l0, loadngo_dwordloop ! repeat loop while negative, eight times
140 inc 8, %l0 ! step loop in delay slot, last loop is 0
141! fallthrough means we are done with 16 data words, get next tag addr
142
143loadngo_gettagaddr:
144 sub %g0, 0x38, %l0 ! put -0x38 into %l0 for loop control
145 ldx [%l7], %l2 ! get tag diagnostic address
146 brnz %l2, loadngo_gettagdata ! branch on register, no need to test first
147 inc 8, %l7 ! advance data pointer in delay slot
148
149! fallthrough means got a tag addr of 0, go to vuad loop
150
151loadngo_vuadloop:
152 ldx [%l7], %l2 ! get vuad diagnostic address
153 brz %l2, loadngo_done4now ! branch on register, no need to test first
154 inc 8, %l7 ! advance data pointer
155 ldx [%l7], %l1 ! get vuad data
156 inc 8, %l7 ! advance data pointer
157 ba loadngo_vuadloop ! repeat until a 0 address
158 stx %l1, [%l2] ! store vuad into vuad array
159! The cache versions has a few more instructions
160! done4now:
161! call %l6
162! nop (actually 6 nops to finish the line)
163
164 ! I think I could tighten that up a bit, especially vuadloop, but once
165 ! we have two cache lines, there is no advantage, I can't do it in one.
166
167loadngo_done4now: ! no need to do the call %l6, running from SSI space
168
169 ! Now use that loader we just loaded to load the rest of cache.
170
171 ! Need to do the same setup operations.
172 setx loadngo_SSIdata, %l1, %l7
173 ! because of the way data is layed out, that setx isn't needed.
174 ! sethi %hi(0x400000), %l4 ! %l4 still has 0x400000
175 setx loadngo_done, %l1, %l6 ! where to go when finished
176
177loadngo_gocacheable: ! don't forget, entry point is not at first cacheline,
178!ASI_RST_VEC_MASK to 1
179#ifndef DTM_ENABLED
180 set 0x1, %i3
181 wr %g0, 0x45, %asi
182 stxa %i3, [%g0 + 0x18] %asi
183#endif
184 setx 0x1234567bc, %l1, %l2 ! must offset 0x3c onto 123456780
185 call %l2
186 nop
187
188loadngo_done:
189! we now return you to hboot.s, or BOOTPROM_INIT, or wherever else you may have
190! stuck this #include call. L2 is enabled, loaded, VUAD set, and ready to go.
191 nop
192
193
194! here is the data for the 2 cache lines of the loader, 23 xwords.
195.data
196
197LoaderData:
198
199 !** Writing cache line at address 0x123456780 to bank: 2, set: 179, way: 0
200
201 ! Write the cache Tag for 0xa400016780 = 0x123451
202.xword 0xa400016780 ! TagAddr
203.xword 0x123451 ! TagData
204
205 ! Write the diagnostic address for B=2, S=179, W=0
206.xword 0xa000016780 ! Data Address
207
208 ! Write the cache data for word 0
209.xword 0x712ee00068 ! Data for addr 0xa000016780
210
211 ! Write the cache data for word 1
212.xword 0x5702f00445 ! Data for addr 0xa000416780
213
214 ! Write the cache data for word 2
215.xword 0x713a400068 ! Data for addr 0xa000016788
216
217 ! Write the cache data for word 3
218.xword 0x722ee00016 ! Data for addr 0xa000416788
219
220 ! Write the cache data for word 4
221.xword 0x5702f00445 ! Data for addr 0xa000016790
222
223 ! Write the cache data for word 5
224.xword 0x5202501c79 ! Data for addr 0xa000416790
225
226 ! Write the cache data for word 6
227.xword 0x5302400a7e ! Data for addr 0xa000016798
228
229 ! Write the cache data for word 7
230.xword 0x712ee00068 ! Data for addr 0xa000416798
231
232 ! Write the cache data for word 8
233.xword 0x5702f00445 ! Data for addr 0xa0000167a0
234
235 ! Write the cache data for word 9
236.xword 0x713a400821 ! Data for addr 0xa0004167a0
237
238 ! Write the cache data for word 10
239.xword 0x712ee00068 ! Data for addr 0xa0000167a8
240
241 ! Write the cache data for word 11
242.xword 0x5702f00445 ! Data for addr 0xa0004167a8
243
244 ! Write the cache data for word 12
245.xword 0x713a600875 ! Data for addr 0xa0000167b0
246
247 ! Write the cache data for word 13
248.xword 0x37e1ffd65 ! Data for addr 0xa0004167b0
249
250 ! Write the cache data for word 14
251.xword 0x500210040e ! Data for addr 0xa0000167b8
252
253 ! Write the cache data for word 15
254.xword 0x5010101c0e ! Data for addr 0xa0004167b8
255
256
257
258 !** Writing cache line at address 0x1234567C0 to bank: 3, set: 179, way: 0
259
260 ! Write the cache Tag for 0xa4000167c0 = 0x123451
261.xword 0xa4000167c0 ! TagAddr
262.xword 0x123451 ! TagData
263
264 ! Write the diagnostic address for B=3, S=179, W=0
265.xword 0xa0000167c0 ! Data Address
266
267 ! Write the cache data for word 0
268.xword 0x722ee00016 ! Data for addr 0xa0000167c0
269
270 ! Write the cache data for word 1
271.xword 0x57e5ff7bf ! Data for addr 0xa0004167c0
272
273 ! Write the cache data for word 2
274.xword 0x5702f00445 ! Data for addr 0xa0000167c8
275
276 ! Write the cache data for word 3
277.xword 0x722ee00016 ! Data for addr 0xa0004167c8
278
279 ! Write the cache data for word 4
280.xword 0x166400309 ! Data for addr 0xa0000167d0
281
282 ! Write the cache data for word 5
283.xword 0x5702f00445 ! Data for addr 0xa0004167d0
284
285 ! Write the cache data for word 6
286.xword 0x712ee00068 ! Data for addr 0xa0000167d8
287
288 ! Write the cache data for word 7
289.xword 0x5702f00445 ! Data for addr 0xa0004167d8
290
291 ! Write the cache data for word 8
292.xword 0x85ffffde7 ! Data for addr 0xa0000167e0
293
294 ! Write the cache data for word 9
295.xword 0x713a400068 ! Data for addr 0xa0004167e0
296
297 ! Write the cache data for word 10
298.xword 0x4fe2c0005d ! Data for addr 0xa0000167e8
299
300 ! Write the cache data for word 11
301.xword 0x8000005e ! Data for addr 0xa0004167e8
302
303 ! Write the cache data for word 12
304.xword 0x8000005e ! Data for addr 0xa0000167f0
305
306 ! Write the cache data for word 13
307.xword 0x8000005e ! Data for addr 0xa0004167f0
308
309 ! Write the cache data for word 14
310.xword 0x8000005e ! Data for addr 0xa0000167f8
311
312 ! Write the cache data for word 15
313.xword 0x8000005e ! Data for addr 0xa0004167f8
314
315.xword 0 !** stop tag/data loop, begin vuad loop.
316
317 !** Writing valid/dirty vectors.
318
319 ! Write the cache VUAD for bank:2, set:0x0b3
320.xword 0xa600416780 ! VUAD Address
321.xword 0x1600010000 ! VUAD Data
322
323 ! Write the cache VUAD for bank:3, set:0x0b3
324.xword 0xa6004167c0 ! VUAD Address
325.xword 0x1600010000 ! VUAD Data
326
327.xword 0 !** stop vuad loop, all done now, jump to it!
328
329
330 ! and here is diag cache load data from teh pass1 L2 dump...
331
332loadngo_SSIdata:
333#ifdef LOADNGO_PREAMBLE
334#include <diag.lng>
335#endif
336
337loadngo_endofdata: ! use this label to see how BIG the data is
338.text