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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / include / niu_init_rx.h
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: niu_init_rx.h
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38NIU_TX_INIT:
39 setx 0x8100180000, %g1, %g2
40 setx 0x3, %g1, %g3
41 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
42 nop
43
44 setx 0x8100180008, %g1, %g2
45 setx 0x3, %g1, %g3
46 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
47 nop
48
49 setx 0x8100180000, %g1, %g2
50 setx 0x1, %g1, %g3
51 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
52 nop
53
54 setx 0x8100180000, %g1, %g2
55 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
56 nop
57
58 setx 0x8100180008, %g1, %g2
59 setx 0x1, %g1, %g3
60 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
61 nop
62
63 setx 0x8100180008, %g1, %g2
64 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
65 nop
66
67 setx 0x8100180060, %g1, %g2
68 setx 0x1000f01, %g1, %g3
69 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
70 nop
71
72 setx 0x8100180000, %g1, %g2
73 setx 0x1, %g1, %g3
74 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
75 nop
76
77 setx 0x8100180000, %g1, %g2
78 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
79 nop
80
81 setx 0x8100180008, %g1, %g2
82 setx 0x1, %g1, %g3
83 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
84 nop
85
86 setx 0x8100180008, %g1, %g2
87 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
88 nop
89
90 setx 0x8100180060, %g1, %g2
91 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
92 nop
93
94 setx 0x8100180060, %g1, %g2
95 setx 0x1000f01, %g1, %g3
96 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
97 nop
98
99 setx 0x8100180000, %g1, %g2
100 setx 0x1, %g1, %g3
101 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
102 nop
103
104 setx 0x8100180000, %g1, %g2
105 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
106 nop
107
108 setx 0x8100180000, %g1, %g2
109 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
110 nop
111
112 setx 0x8100180008, %g1, %g2
113 setx 0x1, %g1, %g3
114 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
115 nop
116
117 setx 0x8100180008, %g1, %g2
118 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
119 nop
120
121 setx 0x8100182000, %g1, %g2
122 setx 0x8000, %g1, %g3
123 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
124 nop
125
126 setx 0x8100280000, %g1, %g2
127 setx 0x10101, %g1, %g3
128 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
129 nop
130
131 setx 0x8100720000, %g1, %g2
132 setx 0x1f, %g1, %g3
133 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
134 nop
135
136 setx 0x8100590000, %g1, %g2
137 setx 0x0, %g1, %g3
138 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
139 nop
140
141 setx 0x81006a0000, %g1, %g2
142 setx 0x3, %g1, %g3
143 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
144 nop
145
146 setx 0x8100600010, %g1, %g2
147 setx 0x0fff000000000200, %g1, %g3
148 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
149 nop
150
151 setx 0x8100600018, %g1, %g2
152 setx 0x80, %g1, %g3
153 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
154 nop
155
156 setx 0x8100600040, %g1, %g2
157 setx 0x4fff000000020000, %g1, %g3
158 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
159 nop
160
161 setx 0x8100600000, %g1, %g2
162 setx 0x80000000, %g1, %g3
163 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
164 nop
165
166 setx 0x8100600020, %g1, %g2
167 setx 0x512, %g1, %g3
168 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
169 nop
170
171 setx 0x8100180060, %g1, %g2
172 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
173 nop
174
175 setx 0x8100180060, %g1, %g2
176 setx 0x1000901, %g1, %g3
177 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
178 nop
179
180 setx 0x8100180060, %g1, %g2
181 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
182 nop
183
184 setx 0x8100180060, %g1, %g2
185 setx 0x1010901, %g1, %g3
186 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
187 nop
188
189 setx 0x8100180208, %g1, %g2
190 setx 0xffffffff, %g1, %g3
191 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
192 nop
193
194 setx 0x8100180900, %g1, %g2
195 setx 0x0, %g1, %g3
196 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
197 nop
198
199 setx 0x8100180908, %g1, %g2
200 setx 0x0, %g1, %g3
201 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
202 nop
203
204 setx 0x8100180910, %g1, %g2
205 setx 0x0, %g1, %g3
206 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
207 nop
208
209 setx 0x8100180918, %g1, %g2
210 setx 0x0, %g1, %g3
211 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
212 nop
213
214 setx 0x8100180218, %g1, %g2
215 setx 0x1, %g1, %g3
216 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
217 nop
218
219 setx 0x8100180220, %g1, %g2
220 setx 0xffff, %g1, %g3
221 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
222 nop
223
224 setx 0x8100180228, %g1, %g2
225 setx 0x100, %g1, %g3
226 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
227 nop
228
229#ifdef MAC_RX_FRAME_INTR
230
231 ! Enable the interrupt in MAC0
232
233 setx 0x8100180048, %g1, %g2
234 stxa %g0, [%g2]ASI_PRIMARY_LITTLE
235 nop
236
237 ! Enable the interrupt in the NIU
238
239 setx 0x8100b00000, %g1, %g2 ! LD_IM1
240 stxa %g0, [%g2]ASI_PRIMARY_LITTLE
241 nop
242
243 setx 0x8100800018, %g1, %g2 ! LDGIMGN
244 setx 0x80000001, %g1, %g3
245 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
246 nop
247
248 setx 0x8100080008, %g1, %g2 ! LDGITMRES
249 set 1, %g3
250 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
251 nop
252
253 setx 0x8100810200, %g1, %g2 ! SID
254 set 1, %g3
255 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
256 nop
257
258#endif
Full OpenSPARC design & verification tarball including full HDL.