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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: niu_start_bg_pkts.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #if defined(ENABLE_BG_NIU_RX) && !defined(ENABLE_NIU_BG_RX) | |
39 | #define ENABLE_NIU_BG_RX | |
40 | #endif /* ENABLE_BG_NIU_RX */ | |
41 | ||
42 | ||
43 | #ifdef ENABLE_NIU_BG_RX | |
44 | enable_bg_niu_rx: | |
45 | ldxa [%g0] ASI_INTR_ID, %g7 ! Get the thread number | |
46 | changequote([, ])dnl | |
47 | cmp %g7, M4_master_tid | |
48 | changequote(`,')dnl | |
49 | bne %xcc, enable_bg_niu_rx_end | |
50 | nop | |
51 | ||
52 | enable_bg_niu_rx_trigger_NIU_InitRxDma: | |
53 | !$EV trig_pc_d(1, @VA(.RED_EXT_SEC.enable_bg_niu_rx_trigger_NIU_InitRxDma)) -> NIU_InitRxDma(RXDMA_CHNL, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, NIU_Xlate_On) | |
54 | ||
55 | mov 0x5, %l0 ! Delay for Vera to complete | |
56 | enable_bg_niu_rx_delay_loop: | |
57 | nop | |
58 | nop | |
59 | nop | |
60 | nop | |
61 | dec %l0 | |
62 | brnz %l0, enable_bg_niu_rx_delay_loop | |
63 | nop | |
64 | ||
65 | enable_bg_niu_rx_call_NiuInitRxDma: | |
66 | setx RXDMA_CHNL, %l7, %o0 | |
67 | setx RX_DESC_RING_LENGTH, %l7, %o1 | |
68 | setx RX_COMPL_RING_LEN, %l7, %o2 | |
69 | setx RBR_CONFIG_B_DATA, %l7, %o3 | |
70 | setx RX_INITIAL_KICK, %l7, %o4 | |
71 | call NiuInitRxDma | |
72 | nop | |
73 | ||
74 | enable_bg_niu_rx_trigger_NIU_RxPktConf: | |
75 | nop | |
76 | !$EV trig_pc_d(1, @VA(.RED_EXT_SEC.enable_bg_niu_rx_trigger_NIU_RxPktConf)) -> NIU_RxPktConf(RXMAC_PKTCNT, MAC_ID) | |
77 | ||
78 | enable_bg_niu_rx_trigger_NIU_RxGenPkt: | |
79 | nop | |
80 | !$EV trig_pc_d(1, @VA(.RED_EXT_SEC.enable_bg_niu_rx_trigger_NIU_RxGenPkt)) -> NIU_RxGenPkt(MAC_ID, RXDMA_CHNL, RXMAC_PKTCNT, MAC_PKT_LEN) | |
81 | ||
82 | enable_bg_niu_rx_end: | |
83 | #endif /* ENABLE_NIU_BG_RX */ | |
84 | ||
85 | ||
86 | #ifdef ENABLE_NIU_BG_TX | |
87 | enable_niu_bg_tx: | |
88 | ldxa [%g0] ASI_INTR_ID, %g7 ! Get the thread number | |
89 | changequote([, ])dnl | |
90 | cmp %g7, M4_master_tid | |
91 | changequote(`,')dnl | |
92 | bne %xcc, enable_niu_bg_tx_end | |
93 | nop | |
94 | ||
95 | #ifndef NIU_BG_TX_MAC_ID | |
96 | #define NIU_BG_TX_MAC_ID MAC_ID | |
97 | #endif // NIU_BG_TX_MAC_ID | |
98 | ||
99 | #ifndef NIU_BG_TX_PKT_LEN | |
100 | #define NIU_BG_TX_PKT_LEN TX_PKT_LEN | |
101 | #endif // NIU_BG_TX_PKT_LEN | |
102 | ||
103 | #ifndef NIU_BG_TX_PKT_COUNT | |
104 | #define NIU_BG_TX_PKT_COUNT NIU_TX_PKT_CNT | |
105 | #endif // NIU_BG_TX_PKT_COUNT | |
106 | ||
107 | #ifndef NIU_BG_TX_MAX_BURST_LEN | |
108 | #define NIU_BG_TX_MAX_BURST_LEN SetTxMaxBurst_Data | |
109 | #endif // NIU_BG_TX_MAX_BURST_LEN | |
110 | ||
111 | #define NIU_BG_TX_DMA_ACTIVE_LIST eval(1<<INTR0x60_NIU_TX_DMA_0) | |
112 | #define NIU_BG_TX_DMA_NUM_HEX eval(INTR0x60_NIU_TX_DMA_0, 16) | |
113 | ||
114 | enable_niu_bg_tx_Initflow: | |
115 | ! $EV trig_pc_d(1, @VA(.RED_EXT_SEC.enable_niu_bg_tx_Initflow)) -> pktGenConfig(NIU_BG_TX_MAC_ID, FRAME_TYPE, FRAME_CLASS, NIU_BG_TX_PKT_LEN,0,0,1) | |
116 | nop | |
117 | ||
118 | enable_niu_bg_tx_TxDMAActivate: | |
119 | ! $EV trig_pc_d(1, @VA(.RED_EXT_SEC.enable_niu_bg_tx_TxDMAActivate)) -> NIU_TxDMAActivate (NIU_BG_TX_MAC_ID, eval(NIU_BG_TX_DMA_ACTIVE_LIST,16), 0, 0, 0, 1) | |
120 | set NIU_BG_TX_MAC_ID, %o0 | |
121 | set NIU_BG_TX_DMA_ACTIVE_LIST, %o1 | |
122 | call SetTxDMAActive | |
123 | nop | |
124 | ||
125 | enable_niu_bg_tx_AddTxChannels: | |
126 | ! $EV trig_pc_d(1, @VA(.RED_EXT_SEC.enable_niu_bg_tx_AddTxChannels)) -> NIU_AddTxChannels(NIU_BG_TX_MAC_ID, NIU_BG_TX_DMA_NUM_HEX, 0, 0, 0, 1) | |
127 | nop | |
128 | ||
129 | enable_niu_bg_tx_SetTxMaxBurst : | |
130 | ! $EV trig_pc_d(1, @VA(.RED_EXT_SEC.enable_niu_bg_tx_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (NIU_BG_TX_MAC_ID, NIU_BG_TX_DMA_NUM_HEX, eval(NIU_BG_TX_MAX_BURST_LEN,16), 0, 0, 0, 1) | |
131 | best_set_reg(INTR0x60_NIU_TX_DMA_0, %l7, %o0) ! 1st parameter | |
132 | best_set_reg(NIU_BG_TX_MAX_BURST_LEN, %l7, %o1) ! 2nd parameter | |
133 | call SetTxMaxBurst | |
134 | ||
135 | enable_niu_bg_tx_InitTxDma: | |
136 | ! $EV trig_pc_d(1, @VA(.RED_EXT_SEC.enable_niu_bg_tx_InitTxDma)) -> NIU_InitTxDma (NIU_BG_TX_MAC_ID, NIU_BG_TX_DMA_NUM_HEX, NIU_Xlate_On, 0, 0, 0, 1) | |
137 | best_set_reg(INTR0x60_NIU_TX_DMA_0, %l7, %o0) ! 1st parameter | |
138 | call InitTxDma | |
139 | nop | |
140 | ||
141 | enable_niu_bg_tx_Gen_Packet: | |
142 | ! $EV trig_pc_d(1, @VA(.RED_EXT_SEC.enable_niu_bg_tx_Gen_Packet)) -> TxPktGen(NIU_BG_TX_MAC_ID, NIU_BG_TX_DMA_NUM_HEX, NIU_BG_TX_PKT_COUNT, 0, 0, 0, 1) | |
143 | /* Small delay loop to wait for packets to be written to DRAM */ | |
144 | best_set_reg(NIU_BG_TX_PKT_COUNT, %l7, %l0) | |
145 | enable_niu_bg_tx_Gen_Packet_loop: | |
146 | brnz %l0, enable_niu_bg_tx_Gen_Packet_loop | |
147 | dec %l0 | |
148 | ||
149 | enable_niu_bg_tx_SetTxRingKick: | |
150 | ! $EV trig_pc_d(1, @VA(.RED_EXT_SEC.enable_niu_bg_tx_SetTxRingKick)) -> NIU_SetTxRingKick(NIU_BG_TX_MAC_ID, NIU_BG_TX_DMA_NUM_HEX, 0, 0, 0, 1) | |
151 | best_set_reg(NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %l7, %l2) | |
152 | #ifdef FC_NO_PEU_VERA | |
153 | ! PEP does not support 64-bit access, so use two 32-bit loads | |
154 | lduw [%l2], %l3 | |
155 | lduw [%l2+4], %l7 | |
156 | sllx %l3, 32, %l3 | |
157 | add %l7, %l3, %l3 | |
158 | #else // FC_NO_PEU_VERA | |
159 | ldx [%l2], %l3 | |
160 | #endif // FC_NO_PEU_VERA | |
161 | best_set_reg(mpeval(TX_RING_KICK_Addr+(INTR0x60_NIU_TX_DMA_0*0x200)), %l7, %l2) | |
162 | stxa %l3, [%l2]ASI_PRIMARY_LITTLE | |
163 | ||
164 | enable_niu_bg_tx_SetTxCs: | |
165 | best_set_reg(TX_CS_Data, %l7, %l3) | |
166 | best_set_reg(mpeval(TX_CS_Addr+(INTR0x60_NIU_TX_DMA_0*0x200)), %l7, %l2) | |
167 | stxa %l3, [%l2]ASI_PRIMARY_LITTLE | |
168 | ||
169 | enable_niu_bg_tx_end: | |
170 | #endif /* ENABLE_NIU_BG_TX */ |