Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / isa3 / isa3_pmu_cpu_ldst.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: isa3_pmu_cpu_ldst.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
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14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
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23* For the avoidance of doubt, and except that if any non-GPL license
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36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_NUCLEUS_ALSO
39#include "hboot.s"
40/************************************************************************
41 Test case code start
42 ************************************************************************/
43
44.text
45.global main
46
47main: /* test begin */
48
49!
50! Thread 0 Start
51!
52!main_t0:
53 !# Initialize registers ..
54
55 !# Global registers
56 !# Input registers
57 !# Local registers
58 set 0x28094042, %l0 ! count spu load operations to L2
59 set 0x28114082, %l1 ! count spu store operations to l2
60 set 0x28214102, %l2 ! count cpu loads to l2
61 set 0x28414202, %l3 ! count cpu ifetch to l2
62 set 0x28814402, %l4 ! count cpu stores to l2
63 set 0x20000000, %l5 ! do not use
64 set 0x10000000, %l6 ! do not ues
65 !# Output registers
66 !# Float registers
67 !# Other state
68
69 !# Execute Main Diag ..
70 ta T_CHANGE_PRIV ! Should cause Watchdog_reset trap
71
72 rd %pic, %g2 ! load the current pic value into %g2
73 wr %g0, %g0, %pic ! zero out the counter
74
75
76 ! before sending branches, update the PCR to be in UT.?
77 rd %pcr, %g3 ! load the current pcr value into %g3
78
79!count cpu loads to l2
80 wr %l2, %g0, %pcr ! count dcache misses
81
82 addcc %g0, 0x0000, %g2
83 setx load_1, %g2, %g3
84 ld [%g3 + 0x0], %g2
85 ld [%g3 + 0x10], %g6
86 ld [%g3 + 0x0], %g1 !should not be counted as a dmiss
87 inc %g5
88 inc %g5
89 rd %pic, %g2 !check pic value
90
91!count cpu stores to l2
92 wr %l4, %g0, %pcr !count stores
93 add %g0, 0x0000, %g2
94 setx store_1, %g2, %o6
95 stx %o6, [%g3 + 0x10]
96 rd %pic, %g2 ! load the current pic value into %g2
97 inc %g5
98
99!stop counting
100 wr %g0, %g0, %pcr !stop counting
101
102 rd %pic, %g2 !check pic value
103 cmp %g2, %g5
104 bne,pn %icc, fail
105
106
107 nop
108
109done:
110 EXIT_GOOD /* test finish */
111fail:
112 EXIT_BAD /* bad count */
113
114/************************************************************************
115 Test case data start
116 ************************************************************************/
117.data
118user_data_start:
119scratch_area:
120.align 16
121load_1:
122.word 0xFFFF2e2d
123.word 0x2e2dFFFF
124.align 16
125
126load_2:
127.xword 0xABCDEF0123456789
128store_1:
129.align 16
130.word 0xDEADBEEF
131.word 0xAAAAAAAA
132.align 16
133
134.end