Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / isa3 / isa3_pmu_int15.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: isa3_pmu_int15.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
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14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
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21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
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36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_NUCLEUS_ALSO
39
40!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
41!Override trap handler definitions
42!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
43
44! Trap should set %l2=TT which is verified in main program
45
46! Turn off interrupts by setting PIL=15
47
48#define H_T0_Interrupt_Level_15_0x4f
49#define My_T0_Interrupt_Level_15_0x4f \
50 rdpr %tt, %l2; \
51 mov 0xf, %l3; \
52 wrpr %l3, %l7, %pil; \
53 retry; \
54 nop;
55
56! Set PIL so that pic_overflow can be taken
57#define CREGS_PIL 0xe
58
59#include "hboot.s"
60
61/************************************************************************
62 Test case code start
63 ************************************************************************/
64
65.text
66.global main
67
68main: /* test begin */
69
70!
71! Thread 0 Start
72!
73!main_t0:
74 !# Initialize registers ..
75
76 !# Global registers
77 !# Input registers
78 !# Local registers
79 set 0x10088072, %l0 ! count completed branches with TOE
80 set 0x101080b2, %l1 ! count taken branches (mispredicted) with TOE
81 set 0x00000000, %l2 ! setup to be used by the trap checker
82 set 0x10408232, %l3 ! count loads with TOE
83 set 0x10808432, %l4 ! count stores with TOE
84 set 0x11008832, %l5 ! count sethi (software count instr) with TOE
85 set 0x12009032, %l6 ! count other instructions
86 !# Output registers
87 !# Float registers
88 !# Other state
89
90 !# Execute Main Diag ..
91 ta T_CHANGE_PRIV ! Should cause Watchdog_reset trap
92init_pic:
93 rd %pic, %g2 ! load the current pic value into %g2
94 set 0xfffffff6, %g1
95 wr %g1, %g0, %pic ! set the counter to near overflow
96
97check_pcr:
98 rd %pcr, %g3 ! load the current pcr value into %g3
99
100cnt_br:
101 wr %l0, %g0, %pcr ! count branches
102 set 0x0, %g4
103 cmp %g0, %g4
104 bne,pn %icc, fail ! no branching
105 brz %l0, fail ! no branching
106 rd %pic, %g2 ! load the current pic value into %g2
107
108 addcc %g0, 0x0002, %g5! keep track of counts
109
110cnt_other:
111 wr %l6, %g0, %pcr !count other inst
112 inc %g5
113 inc %g5
114
115stop_cnt:
116 wr %g0, %g0, %pcr !stop counting
117
118 add %g0, 0x0003, %g4
119 rd %pic, %g2 !check pic value
120 cmp %g2, %g5
121 !bne,pn %icc, fail
122
123chk_trap:
124 set 0x4f, %g1
125 cmp %l2, %g1
126 bne fail
127 nop
128
129done:
130 EXIT_GOOD /* test finish */
131fail:
132 EXIT_BAD /* bad count */
133
134/************************************************************************
135 Test case data start
136 ************************************************************************/
137.data
138user_data_start:
139scratch_area:
140.align 16
141load_1:
142.word 0xFFFF2e2d
143.word 0x2e2dFFFF
144.align 16
145
146store_1:
147.align 16
148.word 0xDEADBEEF
149.word 0xAAAAAAAA
150.align 16
151
152.end