Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / isa3 / ldst_sync.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: ldst_sync.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
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21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
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36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_HV_ALSO
39#define MAIN_PAGE_NUCLEUS_ALSO
40
41! Include boot.s so it will be part of release. Later remove include.
42#include "boot.s"
43#include "hboot.s"
44
45/************************************************************************
46 Test case code start
47 ************************************************************************/
48
49.text
50.global main
51
52main: /* test begin */
53
54 !# Local registers
55 set 0x42D087D4, %l0
56 set 0x17EA3BAA, %l1
57 set 0x066038FE, %l2
58 set 0x6486751E, %l3
59 set 0x2E19B70E, %l4
60 set 0x265B41FB, %l5
61 set 0x61A0B017, %l6
62
63 setx user_data_start, %i0, %l0
64
65 !# simple load miss
66 ldx [%l0], %l1
67
68 !# Store hit and load full RAW
69 st %l2, [%l0+0x8]
70 lduh [%l0+0x8], %l3
71
72 !# Store miss and load full RAW
73 st %l4, [%l0+0x10]
74 ld [%l0+0x10], %l3
75
76 !# Store hit and load partial RAW
77 st %l5, [%l0+0x8]
78 ldx [%l0+0x8], %l3
79
80 !# Simple L1 hit
81 ld [%l0+0x4], %l3
82
83 nop
84 nop
85 nop
86 nop
87
88 !# LDSTUB, SWAP, PREFETCH, FLUSH
89
90 ldstub [%l0 + 0x20], %l4
91 swap [%l0 + 0x30], %l5
92 prefetch [%l0 + 0x40], 0x3
93 flush %l0 + 0x50
94
95 nop
96 nop
97 nop
98 nop
99
100 !# CAS
101
102 add %l0, 0x60, %l6
103 wr %g0, 0x80, %asi
104 casa [%l6] %asi, %l4, %i0
105
106 ta T_CHANGE_HPRIV
107
108 !# Ld to I/O space
109ld_IO: setx 0xc000000000, %i0, %l0
110 setx 0x0123456789abcdef, %i0, %l1
111 setx 0xfedcba9876543210, %i0, %l2
112 ldx [%l0], %l3
113 stx %l1, [%l0+0x0]
114 stx %l2, [%l0+0x8]
115 ldub [%l0+0x0], %l4
116 ldub [%l0+0x1], %l4
117 ldub [%l0+0x2], %l4
118 ldub [%l0+0x3], %l4
119 ldub [%l0+0x4], %l4
120 ldub [%l0+0x5], %l4
121 ldub [%l0+0x6], %l4
122 ldub [%l0+0x7], %l4
123 ldub [%l0+0x8], %l4
124 ldub [%l0+0x9], %l4
125 ldub [%l0+0xa], %l4
126 ldub [%l0+0xb], %l4
127 ldub [%l0+0xc], %l4
128 ldub [%l0+0xd], %l4
129 ldub [%l0+0xe], %l4
130 ldub [%l0+0xf], %l4
131
132 lduh [%l0+0x0], %l5
133 lduh [%l0+0x2], %l5
134 lduh [%l0+0x4], %l5
135 lduh [%l0+0x6], %l5
136 lduh [%l0+0x8], %l5
137 lduh [%l0+0xa], %l5
138
139 lduw [%l0+0x0], %l6
140 lduw [%l0+0x4], %l6
141 lduw [%l0+0x8], %l6
142 lduw [%l0+0xc], %l6
143
144 ldx [%l0+0x0], %l7
145 ldx [%l0+0x8], %l7
146
147 ! Test misc ASIs
148 wr %g0, ASI_DTLB_TAG_READ_REG, %asi
149 ldxa [0x0] %asi, %i0
150 wr %g0, ASI_ITLB_TAG_READ_REG, %asi
151 ldxa [0x0] %asi, %i1
152 wr %g0, ASI_DTLB_DATA_ACCESS_REG, %asi
153 ldxa [0x0] %asi, %i2
154 wr %g0, ASI_ITLB_DATA_ACCESS_REG, %asi
155 ldxa [0x0] %asi, %i3
156 wr %g0, ASI_ITLB_PROBE, %asi
157 ldxa [0x0] %asi, %i4
158
159 ! %tick & %stick
160 rd %tick, %i5
161 nop
162 rd %sys_tick, %i5
163 nop
164 rd %tick, %i5
165 nop
166 rd %sys_tick, %i5
167 nop
168
169 nop
170 nop
171 nop
172 nop
173 EXIT_GOOD
174
175/************************************************************************
176 Test case data start
177 ************************************************************************/
178.data
179
180user_data_start:
181.xword 0xFFFF7FFFFFFFFFFF
182.xword 0x08090a0b0c0d0e0f
183.xword 0x1011121314151617
184.xword 0x18191a1b1c1d1e1f
185.xword 0x2021222324252627
186.xword 0x28292a2b2c2d2e2f
187.xword 0x3031323334353637
188.xword 0x38393a3b3c3d3e3f
189.xword 0x4041424344454647
190.xword 0x48494a4b4c4d4e4f
191.xword 0x5051525354555657
192.xword 0x58595a5b5c5d5e5f
193.xword 0x6061626364656667
194.xword 0x68696a6b6c6d6e6f
195.xword 0x7071727374757677
196.xword 0x78797a7b7c7d7e7f
197.xword 0x8081828384858687
198.xword 0x88898a8b8c8d8e8f
199.xword 0x9091929394959697
200.xword 0x98999a9b9c9d9e9f
201.xword 0xa0a1a2a3a4a5a6a7
202.xword 0xa8a9aaabacadaeaf
203.xword 0xb0b1b2b3b4b5b6b7
204.xword 0xb8b9babbbcbdbebf
205.xword 0xc0c1c2c3c4c5c6c7
206.xword 0xc8c9cacbcccdcecf
207.xword 0xd0d1d2d3d4d5d6d7
208.xword 0xd8d9dadbdcdddedf
209.xword 0xe0e1e2e3e4e5e6e7
210.xword 0xe8e9eaebecedeeef
211.xword 0xf0f1f2f3f4f5f6f7
212.xword 0xf8f9fafbfcfdfeff
213.end