Commit | Line | Data |
---|---|---|
86530b38 AT |
1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: mpgen_6000l.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | ! Niagara2 UP Random Test | |
39 | ! Seed = 325162151 | |
40 | ! Riesling can be on | |
41 | ! 1 Thread, 6000 lines | |
42 | ! mpgen created on Dec 20, 2005 (16:35:03) | |
43 | ! mpgen_6000l.s created on Mar 25, 2009 (16:21:51) | |
44 | ! RC file : mar25.rc | |
45 | ! cmd = /import/n2-tools/release/tools/mpgen/mpgen,1.051220 -rc mar25.rc -o mpgen_6000l -p 1 -l 6000 | |
46 | ||
47 | #define H_HT0_Hw_Corrected_Error_0x63 hw_corrected_error_handler | |
48 | ||
49 | #define MAIN_PAGE_NUCLEUS_ALSO | |
50 | #define MAIN_PAGE_HV_ALSO | |
51 | #define N_CPUS 1 | |
52 | #define ENABLE_T0_Fp_exception_ieee_754_0x21 | |
53 | #define ENABLE_T0_Fp_exception_other_0x22 | |
54 | #define ENABLE_T0_Fp_disabled_0x20 | |
55 | #define ENABLE_T0_Illegal_instruction_0x10 | |
56 | #define ENABLE_T1_Illegal_instruction_0x10 | |
57 | #define ENABLE_HT0_Illegal_instruction_0x10 | |
58 | #define ENABLE_HT1_Illegal_instruction_0x10 | |
59 | #define ENABLE_T0_Clean_Window_0x24 | |
60 | #define THREAD_COUNT 1 | |
61 | #define THREAD_STRIDE 1 | |
62 | #define SKIP_TRAPCHECK | |
63 | #define USE_MPGEN_TRAPS | |
64 | ||
65 | #include "hboot.s" | |
66 | ||
67 | .text | |
68 | .global main | |
69 | main: | |
70 | ||
71 | ! Random code for Processor 0 | |
72 | ||
73 | processor_0: | |
74 | ta T_CHANGE_PRIV | |
75 | wrpr %g0,7,%cleanwin | |
76 | call p0_init_memory_pointers | |
77 | wr %g0,0x80,%asi ! Setting default asi to 80 | |
78 | ||
79 | ! Initialize the floating point registers for processor 0 | |
80 | ||
81 | wr %g0,0x4,%fprs ! Make sure fef is 1 | |
82 | set p0_init_freg,%g1 | |
83 | ! %f0 = ac476bd0 09d31c41 1b14921f a74fbc72 | |
84 | ! %f4 = 6dc55018 53b092e5 25f21a9a 05ccba88 | |
85 | ! %f8 = a129439b 4593b975 45269cc7 dde86312 | |
86 | ! %f12 = f19cdde6 7bfaa699 8fc7434f 1e45e32a | |
87 | ldda [%g1]ASI_BLK_P,%f0 | |
88 | add %g1,64,%g1 | |
89 | ! %f16 = 694085e9 11b4cdbc 1966b200 0765828c | |
90 | ! %f20 = 819eb122 352281ad 6dbfc13c 46921a93 | |
91 | ! %f24 = f57f1752 0ef50f98 b5b530e6 68d7666b | |
92 | ! %f28 = 4da374b8 a99b4462 6d163b25 ffedc807 | |
93 | ldda [%g1]ASI_BLK_P,%f16 | |
94 | add %g1,64,%g1 | |
95 | ! %f32 = 94c309f8 b1889df7 f48bcd52 51da7ad0 | |
96 | ! %f36 = 407f1214 55543911 634b5b93 fe4b4b07 | |
97 | ! %f40 = 250d3a8d ceebe63f 3b474f0a e777c83f | |
98 | ! %f44 = 6cbe0bce eec8a94a b46834ce 51226702 | |
99 | ldda [%g1]ASI_BLK_P,%f32 | |
100 | ||
101 | ! Set up the Graphics Status Register | |
102 | ||
103 | setx 0xda6f737f00000067,%g7,%g1 ! GSR scale = 12, align = 7 | |
104 | wr %g1,%g0,%gsr ! GSR = da6f737f00000067 | |
105 | wr %g0,%y ! Clear Y register | |
106 | xorcc %g0,%g0,%g3 ! init %g3 and set flags | |
107 | membar #Sync ! Force the block loads to complete | |
108 | ||
109 | ! Start of Random Code for processor 0 | |
110 | ||
111 | p0_label_1: | |
112 | ! %f23 = 46921a93, Mem[0000000030101410] = 728d5662 | |
113 | sta %f23,[%i4+%o5]0x89 ! Mem[0000000030101410] = 46921a93 | |
114 | ! Mem[0000000010081430] = d034c7dc32c3ea98, %f0 = ac476bd0 09d31c41 | |
115 | ldd [%i2+0x030],%f0 ! %f0 = d034c7dc 32c3ea98 | |
116 | ! %l6 = ea11b213, %l7 = 5cf831b4, Mem[0000000010141410] = fb5568f3 929e61a9 | |
117 | stda %l6,[%i5+%o5]0x88 ! Mem[0000000010141410] = ea11b213 5cf831b4 | |
118 | ! Mem[0000000030141408] = ba8a98d7, %f19 = 0765828c | |
119 | lda [%i5+%o4]0x81,%f19 ! %f19 = ba8a98d7 | |
120 | ! Mem[0000000030141408] = ba8a98d7, %l6 = 02629122ea11b213 | |
121 | lduba [%i5+%o4]0x81,%l6 ! %l6 = 00000000000000ba | |
122 | ! %l6 = 00000000000000ba, Mem[00000000201c0000] = 419f1669, %asi = 80 | |
123 | stha %l6,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00ba1669 | |
124 | ! %l5 = 6c8dd8d22c28d25d, Mem[0000000010181400] = 0624b4a74e696d93 | |
125 | stxa %l5,[%i6+%g0]0x88 ! Mem[0000000010181400] = 6c8dd8d22c28d25d | |
126 | ! Mem[0000000010081428] = 7aa1e7c6, %l3 = 6ef09e92, %l4 = 8d643538 | |
127 | add %i2,0x28,%g1 | |
128 | casa [%g1]0x80,%l3,%l4 ! %l4 = 000000007aa1e7c6 | |
129 | ! Mem[0000000010141408] = b3563cc0, %l5 = 6c8dd8d22c28d25d | |
130 | ldsha [%i5+%o4]0x88,%l5 ! %l5 = 0000000000003cc0 | |
131 | ! Starting 10 instruction Store Burst | |
132 | ! Mem[0000000030001410] = 6922ef6e, %l0 = 104294b86f381658 | |
133 | lduba [%i0+%o5]0x89,%l0 ! %l0 = 000000000000006e | |
134 | ||
135 | p0_label_2: | |
136 | ! %f18 = 1966b200 ba8a98d7, Mem[0000000030141400] = b8902d80 9601ff8b | |
137 | stda %f18,[%i5+%g0]0x81 ! Mem[0000000030141400] = 1966b200 ba8a98d7 | |
138 | ! %l2 = 6c72aba8842b9a6c, Mem[0000000010041410] = 3c0a0d1c | |
139 | stba %l2,[%i1+%o5]0x88 ! Mem[0000000010041410] = 3c0a0d6c | |
140 | ! %l6 = 000000ba, %l7 = 5cf831b4, Mem[00000000300c1408] = a2fd1ec9 e4efbcc9 | |
141 | stda %l6,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 000000ba 5cf831b4 | |
142 | ! %f0 = d034c7dc 32c3ea98 1b14921f a74fbc72 | |
143 | ! %f4 = 6dc55018 53b092e5 25f21a9a 05ccba88 | |
144 | ! %f8 = a129439b 4593b975 45269cc7 dde86312 | |
145 | ! %f12 = f19cdde6 7bfaa699 8fc7434f 1e45e32a | |
146 | stda %f0,[%i0]ASI_BLK_AIUSL ! Block Store to 0000000030001400 | |
147 | ! %l0 = 000000000000006e, Mem[0000000010041410] = 411ebe333c0a0d6c | |
148 | stxa %l0,[%i1+%o5]0x88 ! Mem[0000000010041410] = 000000000000006e | |
149 | ! Mem[00000000300c1408] = 000000ba, %l3 = 782d602e6ef09e92 | |
150 | swapa [%i3+%o4]0x89,%l3 ! %l3 = 00000000000000ba | |
151 | ! %l5 = 0000000000003cc0, Mem[00000000100c1400] = 3f746fa4 | |
152 | stba %l5,[%i3+%g0]0x80 ! Mem[00000000100c1400] = c0746fa4 | |
153 | ! Mem[0000000030081410] = e45d2f77, %l3 = 00000000000000ba | |
154 | ldstuba [%i2+%o5]0x89,%l3 ! %l3 = 00000077000000ff | |
155 | ! %l2 = 6c72aba8842b9a6c, Mem[0000000030001408] = a74fbc72 | |
156 | stba %l2,[%i0+%o4]0x89 ! Mem[0000000030001408] = a74fbc6c | |
157 | ! Starting 10 instruction Load Burst | |
158 | ! Mem[00000000100c1400] = c0746fa4ef2c740a, %l2 = 6c72aba8842b9a6c | |
159 | ldxa [%i3+%g0]0x80,%l2 ! %l2 = c0746fa4ef2c740a | |
160 | ||
161 | p0_label_3: | |
162 | ! Mem[0000000010041424] = 4d072a78, %l5 = 0000000000003cc0 | |
163 | ldsba [%i1+0x027]%asi,%l5 ! %l5 = 0000000000000078 | |
164 | ! Mem[0000000010041408] = 73a695a61acb8d6c, %l1 = c68c7ca02b0f7a2e | |
165 | ldxa [%i1+%o4]0x80,%l1 ! %l1 = 73a695a61acb8d6c | |
166 | ! Mem[0000000010081410] = 2eb2f190, %l1 = 73a695a61acb8d6c | |
167 | lduwa [%i2+%o5]0x88,%l1 ! %l1 = 000000002eb2f190 | |
168 | ! Mem[0000000030101408] = aeae3c8dafd8f9da, %l5 = 0000000000000078 | |
169 | ldxa [%i4+%o4]0x89,%l5 ! %l5 = aeae3c8dafd8f9da | |
170 | ! Mem[0000000010141410] = 13b211ea, %l6 = 00000000000000ba | |
171 | lduwa [%i5+%o5]0x80,%l6 ! %l6 = 0000000013b211ea | |
172 | ! Mem[00000000201c0000] = 00ba1669, %l7 = e57709b25cf831b4 | |
173 | lduh [%o0+%g0],%l7 ! %l7 = 00000000000000ba | |
174 | ! Mem[0000000010181410] = 4f57f82bcb181e67, %l5 = aeae3c8dafd8f9da | |
175 | ldxa [%i6+0x010]%asi,%l5 ! %l5 = 4f57f82bcb181e67 | |
176 | ! Mem[0000000010081408] = 427c860f, %f28 = 4da374b8 | |
177 | lda [%i2+%o4]0x80,%f28 ! %f28 = 427c860f | |
178 | ! Mem[00000000211c0000] = 64ddfe0c, %l7 = 00000000000000ba | |
179 | ldsh [%o2+%g0],%l7 ! %l7 = 00000000000064dd | |
180 | ! Starting 10 instruction Store Burst | |
181 | ! Mem[00000000300c1400] = c33b4255, %l0 = 000000000000006e | |
182 | ldstuba [%i3+%g0]0x89,%l0 ! %l0 = 00000055000000ff | |
183 | ||
184 | p0_label_4: | |
185 | ! %l6 = 0000000013b211ea, Mem[0000000030081408] = 1f90ce66 | |
186 | stwa %l6,[%i2+%o4]0x81 ! Mem[0000000030081408] = 13b211ea | |
187 | ! Mem[0000000030181400] = b469a328, %l0 = 0000000000000055 | |
188 | ldstuba [%i6+%g0]0x89,%l0 ! %l0 = 00000028000000ff | |
189 | ! %f26 = b5b530e6 68d7666b, Mem[0000000010081410] = 2eb2f190 c3e6470b | |
190 | stda %f26,[%i2+%o5]0x88 ! Mem[0000000010081410] = b5b530e6 68d7666b | |
191 | ! Mem[00000000201c0001] = 00ba1669, %l6 = 0000000013b211ea | |
192 | ldstuba [%o0+0x001]%asi,%l6 ! %l6 = 000000ba000000ff | |
193 | ! %f17 = 11b4cdbc, Mem[0000000010041400] = 2b46809f | |
194 | sta %f17,[%i1+%g0]0x88 ! Mem[0000000010041400] = 11b4cdbc | |
195 | ! %l4 = 000000007aa1e7c6, Mem[0000000030101410] = 46921a93 | |
196 | stba %l4,[%i4+%o5]0x89 ! Mem[0000000030101410] = 46921ac6 | |
197 | ! Mem[0000000010101410] = 5a438fc8, %l3 = 0000000000000077 | |
198 | ldstuba [%i4+%o5]0x80,%l3 ! %l3 = 0000005a000000ff | |
199 | ! Mem[0000000010081400] = ad222174e3e1f5ad, %l3 = 000000000000005a, %l3 = 000000000000005a | |
200 | casxa [%i2]0x80,%l3,%l3 ! %l3 = ad222174e3e1f5ad | |
201 | ! %l4 = 000000007aa1e7c6, Mem[00000000300c1410] = d21d8022 | |
202 | stwa %l4,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 7aa1e7c6 | |
203 | ! Starting 10 instruction Load Burst | |
204 | ! Mem[00000000100c1410] = 4243424e, %l3 = ad222174e3e1f5ad | |
205 | lduwa [%i3+%o5]0x88,%l3 ! %l3 = 000000004243424e | |
206 | ||
207 | p0_label_5: | |
208 | membar #Sync ! Added by membar checker (1) | |
209 | ! Mem[0000000010001434] = ffb8ffb0, %l5 = 4f57f82bcb181e67 | |
210 | lduba [%i0+0x037]%asi,%l5 ! %l5 = 00000000000000b0 | |
211 | ! Mem[0000000030181400] = ffa369b4, %l0 = 0000000000000028 | |
212 | ldsha [%i6+%g0]0x81,%l0 ! %l0 = ffffffffffffffa3 | |
213 | ! Mem[0000000010041400] = bccdb411 46bc5e50 73a695a6 1acb8d6c | |
214 | ! Mem[0000000010041410] = 6e000000 00000000 ca93dcbf e2f66f18 | |
215 | ! Mem[0000000010041420] = 2ce65c7f 4d072a78 5d7ae4e4 33c4a113 | |
216 | ! Mem[0000000010041430] = 4d30c046 fff9275e 8b0838cb 3f787673 | |
217 | ldda [%i1]ASI_BLK_AIUPL,%f16 ! Block Load from 0000000010041400 | |
218 | ! Mem[0000000010141400] = 8a11f7ce, %l6 = 00000000000000ba | |
219 | lduba [%i5+%g0]0x80,%l6 ! %l6 = 000000000000008a | |
220 | ! Mem[0000000010081408] = 0f867c42, %l5 = 00000000000000b0 | |
221 | lduwa [%i2+%o4]0x88,%l5 ! %l5 = 000000000f867c42 | |
222 | ! Mem[00000000300c1410] = 7aa1e7c6, %f15 = 1e45e32a | |
223 | lda [%i3+%o5]0x89,%f15 ! %f15 = 7aa1e7c6 | |
224 | ! Mem[0000000030141400] = 00b26619, %f0 = d034c7dc | |
225 | lda [%i5+%g0]0x89,%f0 ! %f0 = 00b26619 | |
226 | ! Mem[0000000010101400] = 08ce0e40, %l0 = ffffffffffffffa3 | |
227 | ldswa [%i4+%g0]0x88,%l0 ! %l0 = 0000000008ce0e40 | |
228 | ! Mem[0000000010141400] = 8a11f7ce1748fc23, %l1 = 000000002eb2f190 | |
229 | ldx [%i5+%g0],%l1 ! %l1 = 8a11f7ce1748fc23 | |
230 | ! Starting 10 instruction Store Burst | |
231 | ! %f16 = 505ebc46 11b4cdbc 6c8dcb1a a695a673 | |
232 | ! %f20 = 00000000 0000006e 186ff6e2 bfdc93ca | |
233 | ! %f24 = 782a074d 7f5ce62c 13a1c433 e4e47a5d | |
234 | ! %f28 = 5e27f9ff 46c0304d 7376783f cb38088b | |
235 | stda %f16,[%i6]ASI_BLK_PL ! Block Store to 0000000010181400 | |
236 | ||
237 | ! Check Point 1 for processor 0 | |
238 | ||
239 | set p0_check_pt_data_1,%g4 | |
240 | rd %ccr,%g5 ! %g5 = 44 | |
241 | ldx [%g4+0x08],%g2 | |
242 | cmp %l0,%g2 ! %l0 = 0000000008ce0e40 | |
243 | bne %xcc,p0_reg_check_fail0 | |
244 | mov 0xee0,%g1 | |
245 | ldx [%g4+0x10],%g2 | |
246 | cmp %l1,%g2 ! %l1 = 8a11f7ce1748fc23 | |
247 | bne %xcc,p0_reg_check_fail1 | |
248 | mov 0xee1,%g1 | |
249 | ldx [%g4+0x18],%g2 | |
250 | cmp %l2,%g2 ! %l2 = c0746fa4ef2c740a | |
251 | bne %xcc,p0_reg_check_fail2 | |
252 | mov 0xee2,%g1 | |
253 | ldx [%g4+0x20],%g2 | |
254 | cmp %l3,%g2 ! %l3 = 000000004243424e | |
255 | bne %xcc,p0_reg_check_fail3 | |
256 | mov 0xee3,%g1 | |
257 | ldx [%g4+0x28],%g2 | |
258 | cmp %l5,%g2 ! %l5 = 000000000f867c42 | |
259 | bne %xcc,p0_reg_check_fail5 | |
260 | mov 0xee5,%g1 | |
261 | ldx [%g4+0x30],%g2 | |
262 | cmp %l6,%g2 ! %l6 = 000000000000008a | |
263 | bne %xcc,p0_reg_check_fail6 | |
264 | mov 0xee6,%g1 | |
265 | ldx [%g4+0x38],%g2 | |
266 | cmp %l7,%g2 ! %l7 = 00000000000064dd | |
267 | bne %xcc,p0_reg_check_fail7 | |
268 | mov 0xee7,%g1 | |
269 | ldx [%g4+0x40],%g3 | |
270 | std %f0,[%g4] | |
271 | ldx [%g4],%g2 | |
272 | cmp %g3,%g2 ! %f0 = 00b26619 32c3ea98 | |
273 | bne %xcc,p0_freg_check_fail | |
274 | mov 0xf00,%g1 | |
275 | ldx [%g4+0x48],%g3 | |
276 | std %f14,[%g4] | |
277 | ldx [%g4],%g2 | |
278 | cmp %g3,%g2 ! %f14 = 8fc7434f 7aa1e7c6 | |
279 | bne %xcc,p0_freg_check_fail | |
280 | mov 0xf14,%g1 | |
281 | ldx [%g4+0x50],%g3 | |
282 | std %f16,[%g4] | |
283 | ldx [%g4],%g2 | |
284 | cmp %g3,%g2 ! %f16 = 505ebc46 11b4cdbc | |
285 | bne %xcc,p0_freg_check_fail | |
286 | mov 0xf16,%g1 | |
287 | ldx [%g4+0x58],%g3 | |
288 | std %f18,[%g4] | |
289 | ldx [%g4],%g2 | |
290 | cmp %g3,%g2 ! %f18 = 6c8dcb1a a695a673 | |
291 | bne %xcc,p0_freg_check_fail | |
292 | mov 0xf18,%g1 | |
293 | ldx [%g4+0x60],%g3 | |
294 | std %f20,[%g4] | |
295 | ldx [%g4],%g2 | |
296 | cmp %g3,%g2 ! %f20 = 00000000 0000006e | |
297 | bne %xcc,p0_freg_check_fail | |
298 | mov 0xf20,%g1 | |
299 | ldx [%g4+0x68],%g3 | |
300 | std %f22,[%g4] | |
301 | ldx [%g4],%g2 | |
302 | cmp %g3,%g2 ! %f22 = 186ff6e2 bfdc93ca | |
303 | bne %xcc,p0_freg_check_fail | |
304 | mov 0xf22,%g1 | |
305 | ldx [%g4+0x70],%g3 | |
306 | std %f24,[%g4] | |
307 | ldx [%g4],%g2 | |
308 | cmp %g3,%g2 ! %f24 = 782a074d 7f5ce62c | |
309 | bne %xcc,p0_freg_check_fail | |
310 | mov 0xf24,%g1 | |
311 | ldx [%g4+0x78],%g3 | |
312 | std %f26,[%g4] | |
313 | ldx [%g4],%g2 | |
314 | cmp %g3,%g2 ! %f26 = 13a1c433 e4e47a5d | |
315 | bne %xcc,p0_freg_check_fail | |
316 | mov 0xf26,%g1 | |
317 | ldx [%g4+0x80],%g3 | |
318 | std %f28,[%g4] | |
319 | ldx [%g4],%g2 | |
320 | cmp %g3,%g2 ! %f28 = 5e27f9ff 46c0304d | |
321 | bne %xcc,p0_freg_check_fail | |
322 | mov 0xf28,%g1 | |
323 | ldx [%g4+0x88],%g3 | |
324 | std %f30,[%g4] | |
325 | ldx [%g4],%g2 | |
326 | cmp %g3,%g2 ! %f30 = 7376783f cb38088b | |
327 | bne %xcc,p0_freg_check_fail | |
328 | mov 0xf30,%g1 | |
329 | ||
330 | ! Check Point 1 completed | |
331 | ||
332 | ||
333 | p0_label_6: | |
334 | ! %f12 = f19cdde6 7bfaa699, Mem[0000000030181410] = ee589899 a3ab1f6f | |
335 | stda %f12,[%i6+%o5]0x81 ! Mem[0000000030181410] = f19cdde6 7bfaa699 | |
336 | ! Mem[0000000021800040] = f3845e5c, %l0 = 0000000008ce0e40 | |
337 | ldstub [%o3+0x040],%l0 ! %l0 = 000000f3000000ff | |
338 | ! Mem[00000000300c1400] = c33b42ff, %l3 = 000000004243424e | |
339 | swapa [%i3+%g0]0x89,%l3 ! %l3 = 00000000c33b42ff | |
340 | ! %l3 = 00000000c33b42ff, Mem[0000000020800001] = 6f750db6 | |
341 | stb %l3,[%o1+0x001] ! Mem[0000000020800000] = 6fff0db6 | |
342 | ! %l5 = 000000000f867c42, Mem[0000000010081400] = ad222174 | |
343 | stba %l5,[%i2+%g0]0x80 ! Mem[0000000010081400] = 42222174 | |
344 | ! %l6 = 0000008a, %l7 = 000064dd, Mem[0000000010141410] = ea11b213 5cf831b4 | |
345 | stda %l6,[%i5+%o5]0x88 ! Mem[0000000010141410] = 0000008a 000064dd | |
346 | ! %f0 = 00b26619 32c3ea98 1b14921f a74fbc72 | |
347 | ! %f4 = 6dc55018 53b092e5 25f21a9a 05ccba88 | |
348 | ! %f8 = a129439b 4593b975 45269cc7 dde86312 | |
349 | ! %f12 = f19cdde6 7bfaa699 8fc7434f 7aa1e7c6 | |
350 | stda %f0,[%i2]ASI_BLK_AIUPL ! Block Store to 0000000010081400 | |
351 | ! %l6 = 0000008a, %l7 = 000064dd, Mem[0000000010181428] = 5d7ae4e4 33c4a113 | |
352 | stda %l6,[%i6+0x028]%asi ! Mem[0000000010181428] = 0000008a 000064dd | |
353 | ! Mem[0000000010001420] = 9012a1e5, %l5 = 0f867c42, %l2 = ef2c740a | |
354 | add %i0,0x20,%g1 | |
355 | casa [%g1]0x80,%l5,%l2 ! %l2 = 000000009012a1e5 | |
356 | ! Starting 10 instruction Load Burst | |
357 | ! Mem[0000000010101410] = 9cfc7b37 c88f43ff, %l0 = 000000f3, %l1 = 1748fc23 | |
358 | ldda [%i4+%o5]0x88,%l0 ! %l0 = 00000000c88f43ff 000000009cfc7b37 | |
359 | ||
360 | p0_label_7: | |
361 | ! Mem[0000000021800040] = ff845e5c, %l1 = 000000009cfc7b37 | |
362 | ldsha [%o3+0x040]%asi,%l1 ! %l1 = ffffffffffffff84 | |
363 | ! Mem[0000000010101408] = b050a3909318db84, %l2 = 000000009012a1e5 | |
364 | ldxa [%i4+%o4]0x88,%l2 ! %l2 = b050a3909318db84 | |
365 | ! Mem[00000000300c1400] = 4243424e, %l7 = 00000000000064dd | |
366 | lduha [%i3+%g0]0x89,%l7 ! %l7 = 000000000000424e | |
367 | membar #Sync ! Added by membar checker (2) | |
368 | ! Mem[0000000030181400] = ffa369b4 7ffff583 3a5b71f7 f3ba531c | |
369 | ! Mem[0000000030181410] = f19cdde6 7bfaa699 79d47728 22c19623 | |
370 | ! Mem[0000000030181420] = fec3a1b4 2697841b eee6fcb5 ed8440cc | |
371 | ! Mem[0000000030181430] = 86e1d243 ae14ad00 e7689938 cae660d1 | |
372 | ldda [%i6]ASI_BLK_SL,%f16 ! Block Load from 0000000030181400 | |
373 | ! Mem[00000000100c1400] = c0746fa4ef2c740a, %f4 = 6dc55018 53b092e5 | |
374 | ldda [%i3+%g0]0x80,%f4 ! %f4 = c0746fa4 ef2c740a | |
375 | ! Mem[0000000010001400] = b07b7a12, %l1 = ffffffffffffff84 | |
376 | ldswa [%i0+%g0]0x88,%l1 ! %l1 = ffffffffb07b7a12 | |
377 | ! Mem[0000000010001438] = 362d08c9, %l6 = 000000000000008a | |
378 | lduha [%i0+0x03a]%asi,%l6 ! %l6 = 00000000000008c9 | |
379 | ! Mem[0000000010001418] = d9876ee7 f8d13fed, %l0 = c88f43ff, %l1 = b07b7a12 | |
380 | ldda [%i0+0x018]%asi,%l0 ! %l0 = 00000000d9876ee7 00000000f8d13fed | |
381 | ! Mem[0000000030181410] = f19cdde67bfaa699, %f6 = 25f21a9a 05ccba88 | |
382 | ldda [%i6+%o5]0x81,%f6 ! %f6 = f19cdde6 7bfaa699 | |
383 | ! Starting 10 instruction Store Burst | |
384 | ! Mem[0000000030181410] = f19cdde6, %l4 = 000000007aa1e7c6 | |
385 | swapa [%i6+%o5]0x81,%l4 ! %l4 = 00000000f19cdde6 | |
386 | ||
387 | p0_label_8: | |
388 | ! %l4 = f19cdde6, %l5 = 0f867c42, Mem[0000000030081400] = 51aac94f d21fa684 | |
389 | stda %l4,[%i2+%g0]0x89 ! Mem[0000000030081400] = f19cdde6 0f867c42 | |
390 | ! %f10 = 45269cc7 dde86312, %l2 = b050a3909318db84 | |
391 | ! Mem[0000000030101410] = c61a9246d776c049 | |
392 | add %i4,0x010,%g1 | |
393 | stda %f10,[%g1+%l2]ASI_PST32_SL ! Mem[0000000030101410] = c61a9246d776c049 | |
394 | ! %l0 = 00000000d9876ee7, Mem[0000000030101408] = afd8f9da | |
395 | stwa %l0,[%i4+%o4]0x89 ! Mem[0000000030101408] = d9876ee7 | |
396 | ! %l5 = 000000000f867c42, Mem[0000000030141400] = 00b26619 | |
397 | stba %l5,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00b26642 | |
398 | ! Mem[00000000100c140b] = 3ba4a6ce, %l0 = 00000000d9876ee7 | |
399 | ldstub [%i3+0x00b],%l0 ! %l0 = 000000ce000000ff | |
400 | ! %l0 = 00000000000000ce, Mem[0000000021800040] = ff845e5c | |
401 | stb %l0,[%o3+0x040] ! Mem[0000000021800040] = ce845e5c | |
402 | ! Mem[0000000010101400] = 400ece08, %l4 = 00000000f19cdde6 | |
403 | swapa [%i4+%g0]0x80,%l4 ! %l4 = 00000000400ece08 | |
404 | ! %f12 = f19cdde6, Mem[00000000300c1408] = 6ef09e92 | |
405 | sta %f12,[%i3+%o4]0x89 ! Mem[00000000300c1408] = f19cdde6 | |
406 | ! Code Fragment 3 | |
407 | p0_fragment_1: | |
408 | ! %l0 = 00000000000000ce | |
409 | setx 0x32b1fe082783e5a4,%g7,%l0 ! %l0 = 32b1fe082783e5a4 | |
410 | ! %l1 = 00000000f8d13fed | |
411 | setx 0x0f0544ffa28f141d,%g7,%l1 ! %l1 = 0f0544ffa28f141d | |
412 | setx 0x1fe000, %g1, %g3 | |
413 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
414 | setx 0x1ffff8, %g1, %g2 | |
415 | and %l0, %g2, %l0 | |
416 | ta T_CHANGE_HPRIV | |
417 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
418 | ta T_CHANGE_NONHPRIV | |
419 | ! %l0 = 32b1fe082783e5a4 | |
420 | setx 0xdeb857dfc92b129e,%g7,%l0 ! %l0 = deb857dfc92b129e | |
421 | ! %l1 = 0f0544ffa28f141d | |
422 | setx 0xea4038183008f19e,%g7,%l1 ! %l1 = ea4038183008f19e | |
423 | ! Starting 10 instruction Load Burst | |
424 | ! Mem[0000000010101410] = ff438fc8377bfc9c, %l7 = 000000000000424e | |
425 | ldxa [%i4+%o5]0x80,%l7 ! %l7 = ff438fc8377bfc9c | |
426 | ||
427 | p0_label_9: | |
428 | ! Mem[00000000211c0000] = 64ddfe0c, %l1 = ea4038183008f19e | |
429 | lduh [%o2+%g0],%l1 ! %l1 = 00000000000064dd | |
430 | ! Mem[0000000010041414] = 00000000, %l1 = 00000000000064dd | |
431 | ldsha [%i1+0x016]%asi,%l1 ! %l1 = 0000000000000000 | |
432 | ! Mem[0000000010181400] = bccdb411, %l4 = 00000000400ece08 | |
433 | ldsba [%i6+%g0]0x80,%l4 ! %l4 = ffffffffffffffbc | |
434 | ! Mem[0000000010081400] = 98eac332 1966b200, %l0 = c92b129e, %l1 = 00000000 | |
435 | ldda [%i2+%g0]0x80,%l0 ! %l0 = 0000000098eac332 000000001966b200 | |
436 | ! Mem[0000000010081410] = e592b053, %l3 = 00000000c33b42ff | |
437 | lduba [%i2+%o5]0x80,%l3 ! %l3 = 00000000000000e5 | |
438 | ! Mem[00000000211c0000] = 64ddfe0c, %l1 = 000000001966b200 | |
439 | ldsh [%o2+%g0],%l1 ! %l1 = 00000000000064dd | |
440 | ! Mem[0000000030101408] = aeae3c8dd9876ee7, %f4 = c0746fa4 ef2c740a | |
441 | ldda [%i4+%o4]0x89,%f4 ! %f4 = aeae3c8d d9876ee7 | |
442 | ! Mem[0000000030101408] = aeae3c8d d9876ee7, %l4 = ffffffbc, %l5 = 0f867c42 | |
443 | ldda [%i4+%o4]0x89,%l4 ! %l4 = 00000000d9876ee7 00000000aeae3c8d | |
444 | ! Mem[000000001014140c] = c681f136, %l0 = 0000000098eac332 | |
445 | lduba [%i5+0x00c]%asi,%l0 ! %l0 = 00000000000000c6 | |
446 | ! Starting 10 instruction Store Burst | |
447 | ! %l1 = 00000000000064dd, Mem[0000000021800080] = 31a00b33 | |
448 | stb %l1,[%o3+0x080] ! Mem[0000000021800080] = dda00b33 | |
449 | ||
450 | p0_label_10: | |
451 | ! %l6 = 00000000000008c9, Mem[00000000100c1408] = 3ba4a6ff | |
452 | stba %l6,[%i3+%o4]0x80 ! Mem[00000000100c1408] = c9a4a6ff | |
453 | ! %f26 = cc4084ed b5fce6ee, %l5 = 00000000aeae3c8d | |
454 | ! Mem[0000000010101410] = ff438fc8377bfc9c | |
455 | add %i4,0x010,%g1 | |
456 | stda %f26,[%g1+%l5]ASI_PST32_PL ! Mem[0000000010101410] = eee6fcb5377bfc9c | |
457 | ! %l2 = b050a3909318db84, Mem[00000000218001c1] = 4a8afa38, %asi = 80 | |
458 | stba %l2,[%o3+0x1c1]%asi ! Mem[00000000218001c0] = 4a84fa38 | |
459 | ! %l1 = 00000000000064dd, Mem[0000000010081400] = 00b2661932c3ea98 | |
460 | stxa %l1,[%i2+%g0]0x88 ! Mem[0000000010081400] = 00000000000064dd | |
461 | ! Mem[0000000010081400] = 000064dd, %l7 = ff438fc8377bfc9c | |
462 | ldstuba [%i2+%g0]0x88,%l7 ! %l7 = 000000dd000000ff | |
463 | ! %l1 = 00000000000064dd, Mem[00000000300c1410] = c6e7a17acf2a6d67 | |
464 | stxa %l1,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 00000000000064dd | |
465 | ! Mem[0000000030041410] = aa60375e, %l3 = 00000000000000e5 | |
466 | ldstuba [%i1+%o5]0x89,%l3 ! %l3 = 0000005e000000ff | |
467 | ! %l2 = b050a3909318db84, Mem[0000000030101400] = 76fc0a2b | |
468 | stha %l2,[%i4+%g0]0x89 ! Mem[0000000030101400] = 76fcdb84 | |
469 | ! %l6 = 00000000000008c9, Mem[0000000010141410] = 000064dd0000008a | |
470 | stxa %l6,[%i5+%o5]0x88 ! Mem[0000000010141410] = 00000000000008c9 | |
471 | ! Starting 10 instruction Load Burst | |
472 | ! Mem[0000000010001434] = ffb8ffb0, %f28 = 00ad14ae | |
473 | ld [%i0+0x034],%f28 ! %f28 = ffb8ffb0 | |
474 | ||
475 | ! Check Point 2 for processor 0 | |
476 | ||
477 | set p0_check_pt_data_2,%g4 | |
478 | rd %ccr,%g5 ! %g5 = 44 | |
479 | ldx [%g4+0x08],%g2 | |
480 | cmp %l0,%g2 ! %l0 = 00000000000000c6 | |
481 | bne %xcc,p0_reg_check_fail0 | |
482 | mov 0xee0,%g1 | |
483 | ldx [%g4+0x10],%g2 | |
484 | cmp %l1,%g2 ! %l1 = 00000000000064dd | |
485 | bne %xcc,p0_reg_check_fail1 | |
486 | mov 0xee1,%g1 | |
487 | ldx [%g4+0x18],%g2 | |
488 | cmp %l2,%g2 ! %l2 = b050a3909318db84 | |
489 | bne %xcc,p0_reg_check_fail2 | |
490 | mov 0xee2,%g1 | |
491 | ldx [%g4+0x20],%g2 | |
492 | cmp %l3,%g2 ! %l3 = 000000000000005e | |
493 | bne %xcc,p0_reg_check_fail3 | |
494 | mov 0xee3,%g1 | |
495 | ldx [%g4+0x28],%g2 | |
496 | cmp %l4,%g2 ! %l4 = 00000000d9876ee7 | |
497 | bne %xcc,p0_reg_check_fail4 | |
498 | mov 0xee4,%g1 | |
499 | ldx [%g4+0x30],%g2 | |
500 | cmp %l6,%g2 ! %l6 = 00000000000008c9 | |
501 | bne %xcc,p0_reg_check_fail6 | |
502 | mov 0xee6,%g1 | |
503 | ldx [%g4+0x38],%g2 | |
504 | cmp %l7,%g2 ! %l7 = 00000000000000dd | |
505 | bne %xcc,p0_reg_check_fail7 | |
506 | mov 0xee7,%g1 | |
507 | ldx [%g4+0x40],%g3 | |
508 | std %f0,[%g4] | |
509 | ldx [%g4],%g2 | |
510 | cmp %g3,%g2 ! %f0 = 00b26619 32c3ea98 | |
511 | bne %xcc,p0_freg_check_fail | |
512 | mov 0xf00,%g1 | |
513 | ldx [%g4+0x48],%g3 | |
514 | std %f4,[%g4] | |
515 | ldx [%g4],%g2 | |
516 | cmp %g3,%g2 ! %f4 = aeae3c8d d9876ee7 | |
517 | bne %xcc,p0_freg_check_fail | |
518 | mov 0xf04,%g1 | |
519 | ldx [%g4+0x50],%g3 | |
520 | std %f6,[%g4] | |
521 | ldx [%g4],%g2 | |
522 | cmp %g3,%g2 ! %f6 = f19cdde6 7bfaa699 | |
523 | bne %xcc,p0_freg_check_fail | |
524 | mov 0xf06,%g1 | |
525 | ldx [%g4+0x58],%g3 | |
526 | std %f16,[%g4] | |
527 | ldx [%g4],%g2 | |
528 | cmp %g3,%g2 ! %f16 = 83f5ff7f b469a3ff | |
529 | bne %xcc,p0_freg_check_fail | |
530 | mov 0xf16,%g1 | |
531 | ldx [%g4+0x60],%g3 | |
532 | std %f18,[%g4] | |
533 | ldx [%g4],%g2 | |
534 | cmp %g3,%g2 ! %f18 = 1c53baf3 f7715b3a | |
535 | bne %xcc,p0_freg_check_fail | |
536 | mov 0xf18,%g1 | |
537 | ldx [%g4+0x68],%g3 | |
538 | std %f20,[%g4] | |
539 | ldx [%g4],%g2 | |
540 | cmp %g3,%g2 ! %f20 = 99a6fa7b e6dd9cf1 | |
541 | bne %xcc,p0_freg_check_fail | |
542 | mov 0xf20,%g1 | |
543 | ldx [%g4+0x70],%g3 | |
544 | std %f22,[%g4] | |
545 | ldx [%g4],%g2 | |
546 | cmp %g3,%g2 ! %f22 = 2396c122 2877d479 | |
547 | bne %xcc,p0_freg_check_fail | |
548 | mov 0xf22,%g1 | |
549 | ldx [%g4+0x78],%g3 | |
550 | std %f24,[%g4] | |
551 | ldx [%g4],%g2 | |
552 | cmp %g3,%g2 ! %f24 = 1b849726 b4a1c3fe | |
553 | bne %xcc,p0_freg_check_fail | |
554 | mov 0xf24,%g1 | |
555 | ldx [%g4+0x80],%g3 | |
556 | std %f26,[%g4] | |
557 | ldx [%g4],%g2 | |
558 | cmp %g3,%g2 ! %f26 = cc4084ed b5fce6ee | |
559 | bne %xcc,p0_freg_check_fail | |
560 | mov 0xf26,%g1 | |
561 | ldx [%g4+0x88],%g3 | |
562 | std %f28,[%g4] | |
563 | ldx [%g4],%g2 | |
564 | cmp %g3,%g2 ! %f28 = ffb8ffb0 43d2e186 | |
565 | bne %xcc,p0_freg_check_fail | |
566 | mov 0xf28,%g1 | |
567 | ldx [%g4+0x90],%g3 | |
568 | std %f30,[%g4] | |
569 | ldx [%g4],%g2 | |
570 | cmp %g3,%g2 ! %f30 = d160e6ca 389968e7 | |
571 | bne %xcc,p0_freg_check_fail | |
572 | mov 0xf30,%g1 | |
573 | ||
574 | ! Check Point 2 completed | |
575 | ||
576 | ||
577 | p0_label_11: | |
578 | ! Mem[0000000010101410] = eee6fcb5, %l6 = 00000000000008c9 | |
579 | ldsba [%i4+%o5]0x80,%l6 ! %l6 = ffffffffffffffee | |
580 | ! Mem[0000000030101400] = 76fcdb84, %f1 = 32c3ea98 | |
581 | lda [%i4+%g0]0x89,%f1 ! %f1 = 76fcdb84 | |
582 | ! Mem[00000000100c1410] = 4243424e, %l5 = 00000000aeae3c8d | |
583 | ldsba [%i3+%o5]0x88,%l5 ! %l5 = 000000000000004e | |
584 | ! Mem[0000000010001410] = 06929c79, %l6 = ffffffffffffffee | |
585 | lduha [%i0+%o5]0x88,%l6 ! %l6 = 0000000000009c79 | |
586 | ! Mem[0000000030101400] = 76fcdb84, %l1 = 00000000000064dd | |
587 | lduba [%i4+%g0]0x89,%l1 ! %l1 = 0000000000000084 | |
588 | membar #Sync ! Added by membar checker (3) | |
589 | ! Mem[0000000030101400] = 84dbfc76 9636898b e76e87d9 8d3caeae | |
590 | ! Mem[0000000030101410] = c61a9246 d776c049 5e9e1157 6b6c2202 | |
591 | ! Mem[0000000030101420] = 3bedac39 d81a5b92 c78091bb 759a4764 | |
592 | ! Mem[0000000030101430] = fac65f36 9ce0b68a 46ee6de4 c49410cd | |
593 | ldda [%i4]ASI_BLK_S,%f16 ! Block Load from 0000000030101400 | |
594 | ! Mem[000000001018140c] = 1acb8d6c, %f13 = 7bfaa699 | |
595 | ld [%i6+0x00c],%f13 ! %f13 = 1acb8d6c | |
596 | ! Mem[0000000030001408] = a74fbc6c, %l6 = 0000000000009c79 | |
597 | ldsha [%i0+%o4]0x89,%l6 ! %l6 = ffffffffffffbc6c | |
598 | ! Mem[0000000010141400] = 8a11f7ce, %l3 = 000000000000005e | |
599 | lduha [%i5+%g0]0x80,%l3 ! %l3 = 0000000000008a11 | |
600 | ! Starting 10 instruction Store Burst | |
601 | ! %l0 = 000000c6, %l1 = 00000084, Mem[0000000010101410] = eee6fcb5 377bfc9c | |
602 | std %l0,[%i4+%o5] ! Mem[0000000010101410] = 000000c6 00000084 | |
603 | ||
604 | p0_label_12: | |
605 | ! %f4 = aeae3c8d d9876ee7, %l6 = ffffffffffffbc6c | |
606 | ! Mem[0000000010181438] = 8b0838cb3f787673 | |
607 | add %i6,0x038,%g1 | |
608 | stda %f4,[%g1+%l6]ASI_PST32_P ! Mem[0000000010181438] = 8b0838cb3f787673 | |
609 | ! %l4 = 00000000d9876ee7, Mem[0000000010081408] = 72bc4fa71f92141b | |
610 | stxa %l4,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00000000d9876ee7 | |
611 | ! %l0 = 00000000000000c6, Mem[0000000010181408] = 73a695a6 | |
612 | stwa %l0,[%i6+%o4]0x80 ! Mem[0000000010181408] = 000000c6 | |
613 | ! Mem[00000000211c0001] = 64ddfe0c, %l6 = ffffffffffffbc6c | |
614 | ldstuba [%o2+0x001]%asi,%l6 ! %l6 = 000000dd000000ff | |
615 | ! %l2 = b050a3909318db84, Mem[0000000010001408] = 238e16d8 | |
616 | stha %l2,[%i0+%o4]0x88 ! Mem[0000000010001408] = 238edb84 | |
617 | ! %l0 = 00000000000000c6, Mem[0000000030041408] = 304297c0ff954b70 | |
618 | stxa %l0,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000000000000c6 | |
619 | ! %l6 = 00000000000000dd, Mem[0000000030041408] = 000000c6 | |
620 | stba %l6,[%i1+%o4]0x89 ! Mem[0000000030041408] = 000000dd | |
621 | ! Mem[000000001010141c] = bae3267a, %l1 = 0000000000000084, %asi = 80 | |
622 | swapa [%i4+0x01c]%asi,%l1 ! %l1 = 00000000bae3267a | |
623 | ! Mem[0000000010141400] = cef7118a, %l2 = b050a3909318db84 | |
624 | swapa [%i5+%g0]0x88,%l2 ! %l2 = 00000000cef7118a | |
625 | ! Starting 10 instruction Load Burst | |
626 | ! Mem[000000001004140c] = 1acb8d6c, %l0 = 00000000000000c6 | |
627 | ldsb [%i1+0x00d],%l0 ! %l0 = ffffffffffffffcb | |
628 | ||
629 | p0_label_13: | |
630 | ! Mem[0000000010181410] = 0000006e, %l7 = 00000000000000dd | |
631 | ldsha [%i6+%o5]0x88,%l7 ! %l7 = 000000000000006e | |
632 | ! Mem[0000000010181410] = 6e000000, %l5 = 000000000000004e | |
633 | ldsba [%i6+%o5]0x80,%l5 ! %l5 = 000000000000006e | |
634 | ! Mem[00000000100c1410] = 4e424342, %f2 = 1b14921f | |
635 | lda [%i3+%o5]0x80,%f2 ! %f2 = 4e424342 | |
636 | ! Mem[00000000211c0000] = 64fffe0c, %l4 = 00000000d9876ee7 | |
637 | lduba [%o2+0x001]%asi,%l4 ! %l4 = 00000000000000ff | |
638 | ! Mem[0000000030001400] = 98eac332, %l2 = 00000000cef7118a | |
639 | ldsha [%i0+%g0]0x81,%l2 ! %l2 = ffffffffffff98ea | |
640 | ! Mem[000000001010140c] = 90a350b0, %f14 = 8fc7434f | |
641 | ld [%i4+0x00c],%f14 ! %f14 = 90a350b0 | |
642 | ! Mem[0000000021800000] = d9f29a65, %l7 = 000000000000006e | |
643 | ldsb [%o3+%g0],%l7 ! %l7 = ffffffffffffffd9 | |
644 | ! Mem[0000000010001408] = 238edb84, %l0 = ffffffffffffffcb | |
645 | lduwa [%i0+%o4]0x88,%l0 ! %l0 = 00000000238edb84 | |
646 | ! Mem[0000000010141408] = c03c56b3, %f9 = 4593b975 | |
647 | lda [%i5+%o4]0x80,%f9 ! %f9 = c03c56b3 | |
648 | ! Starting 10 instruction Store Burst | |
649 | ! %l6 = 00000000000000dd, Mem[0000000030041410] = ff3760aa49cb5c73 | |
650 | stxa %l6,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000000000dd | |
651 | ||
652 | p0_label_14: | |
653 | ! %l4 = 00000000000000ff, Mem[0000000010041400] = bccdb41146bc5e50 | |
654 | stxa %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000000000ff | |
655 | ! Mem[00000000100c1405] = ef2c740a, %l2 = ffffffffffff98ea | |
656 | ldstuba [%i3+0x005]%asi,%l2 ! %l2 = 0000002c000000ff | |
657 | ! %l7 = ffffffffffffffd9, Mem[00000000300c1410] = 00000000000064dd | |
658 | stxa %l7,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ffffffffffffffd9 | |
659 | ! %l0 = 00000000238edb84, Mem[0000000010041407] = 000000ff | |
660 | stb %l0,[%i1+0x007] ! Mem[0000000010041404] = 00000084 | |
661 | ! %l5 = 000000000000006e, Mem[0000000010181438] = 8b0838cb3f787673 | |
662 | stx %l5,[%i6+0x038] ! Mem[0000000010181438] = 000000000000006e | |
663 | ! Mem[0000000010101408] = 84db1893, %l7 = ffffffffffffffd9 | |
664 | ldstuba [%i4+%o4]0x80,%l7 ! %l7 = 00000084000000ff | |
665 | ! %l4 = 000000ff, %l5 = 0000006e, Mem[0000000010141400] = 9318db84 23fc4817 | |
666 | stda %l4,[%i5+%g0]0x88 ! Mem[0000000010141400] = 000000ff 0000006e | |
667 | ! %l7 = 0000000000000084, Mem[00000000300c1400] = 4243424e | |
668 | stha %l7,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 42430084 | |
669 | ! %l2 = 0000002c, %l3 = 00008a11, Mem[0000000010001400] = 127a7bb0 c0d9d035 | |
670 | stda %l2,[%i0+%g0]0x80 ! Mem[0000000010001400] = 0000002c 00008a11 | |
671 | ! Starting 10 instruction Load Burst | |
672 | ! Mem[0000000010001400] = 0000002c00008a11, %l5 = 000000000000006e | |
673 | ldxa [%i0+%g0]0x80,%l5 ! %l5 = 0000002c00008a11 | |
674 | ||
675 | p0_label_15: | |
676 | ! Mem[0000000030081400] = f19cdde6, %l6 = 00000000000000dd | |
677 | lduwa [%i2+%g0]0x89,%l6 ! %l6 = 00000000f19cdde6 | |
678 | ! Mem[0000000030101410] = 46921ac6, %l4 = 00000000000000ff | |
679 | lduha [%i4+%o5]0x89,%l4 ! %l4 = 0000000000001ac6 | |
680 | ! Mem[0000000030181408] = f7715b3a, %l2 = 000000000000002c | |
681 | ldswa [%i6+%o4]0x89,%l2 ! %l2 = fffffffff7715b3a | |
682 | ! Mem[0000000010041410] = 0000006e, %l6 = 00000000f19cdde6 | |
683 | ldswa [%i1+%o5]0x88,%l6 ! %l6 = 000000000000006e | |
684 | ! Mem[0000000010041408] = 73a695a61acb8d6c, %f28 = fac65f36 9ce0b68a | |
685 | ldda [%i1+0x008]%asi,%f28 ! %f28 = 73a695a6 1acb8d6c | |
686 | ! Mem[0000000030141400] = 4266b200 ba8a98d7 ba8a98d7 ae6e0959 | |
687 | ! Mem[0000000030141410] = 624810c0 5d2f4385 16d6ce81 6a6a89be | |
688 | ! Mem[0000000030141420] = 2f13f88e b83cf293 c9db2797 4929e3d1 | |
689 | ! Mem[0000000030141430] = 016c83ca e1f643c5 11b07fb2 4b34ff17 | |
690 | ldda [%i5]ASI_BLK_S,%f16 ! Block Load from 0000000030141400 | |
691 | ! Mem[0000000030101408] = d9876ee7, %l5 = 0000002c00008a11 | |
692 | ldsha [%i4+%o4]0x89,%l5 ! %l5 = 0000000000006ee7 | |
693 | ! Mem[00000000201c0000] = 00ff1669, %l3 = 0000000000008a11 | |
694 | ldsb [%o0+0x001],%l3 ! %l3 = ffffffffffffffff | |
695 | ! Mem[0000000010041408] = 73a695a6, %l4 = 0000000000001ac6 | |
696 | lduha [%i1+0x008]%asi,%l4 ! %l4 = 00000000000073a6 | |
697 | ! Starting 10 instruction Store Burst | |
698 | ! %l7 = 0000000000000084, Mem[00000000300c1408] = e6dd9cf1 | |
699 | stba %l7,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 84dd9cf1 | |
700 | ||
701 | ! Check Point 3 for processor 0 | |
702 | ||
703 | set p0_check_pt_data_3,%g4 | |
704 | rd %ccr,%g5 ! %g5 = 44 | |
705 | ldx [%g4+0x08],%g2 | |
706 | cmp %l0,%g2 ! %l0 = 00000000238edb84 | |
707 | bne %xcc,p0_reg_check_fail0 | |
708 | mov 0xee0,%g1 | |
709 | ldx [%g4+0x10],%g2 | |
710 | cmp %l1,%g2 ! %l1 = 00000000bae3267a | |
711 | bne %xcc,p0_reg_check_fail1 | |
712 | mov 0xee1,%g1 | |
713 | ldx [%g4+0x18],%g2 | |
714 | cmp %l2,%g2 ! %l2 = fffffffff7715b3a | |
715 | bne %xcc,p0_reg_check_fail2 | |
716 | mov 0xee2,%g1 | |
717 | ldx [%g4+0x20],%g2 | |
718 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
719 | bne %xcc,p0_reg_check_fail3 | |
720 | mov 0xee3,%g1 | |
721 | ldx [%g4+0x28],%g2 | |
722 | cmp %l4,%g2 ! %l4 = 00000000000073a6 | |
723 | bne %xcc,p0_reg_check_fail4 | |
724 | mov 0xee4,%g1 | |
725 | ldx [%g4+0x30],%g2 | |
726 | cmp %l5,%g2 ! %l5 = 0000000000006ee7 | |
727 | bne %xcc,p0_reg_check_fail5 | |
728 | mov 0xee5,%g1 | |
729 | ldx [%g4+0x38],%g2 | |
730 | cmp %l6,%g2 ! %l6 = 000000000000006e | |
731 | bne %xcc,p0_reg_check_fail6 | |
732 | mov 0xee6,%g1 | |
733 | ldx [%g4+0x40],%g2 | |
734 | cmp %l7,%g2 ! %l7 = 0000000000000084 | |
735 | bne %xcc,p0_reg_check_fail7 | |
736 | mov 0xee7,%g1 | |
737 | ldx [%g4+0x48],%g3 | |
738 | std %f0,[%g4] | |
739 | ldx [%g4],%g2 | |
740 | cmp %g3,%g2 ! %f0 = 00b26619 76fcdb84 | |
741 | bne %xcc,p0_freg_check_fail | |
742 | mov 0xf00,%g1 | |
743 | ldx [%g4+0x50],%g3 | |
744 | std %f2,[%g4] | |
745 | ldx [%g4],%g2 | |
746 | cmp %g3,%g2 ! %f2 = 4e424342 a74fbc72 | |
747 | bne %xcc,p0_freg_check_fail | |
748 | mov 0xf02,%g1 | |
749 | ldx [%g4+0x58],%g3 | |
750 | std %f8,[%g4] | |
751 | ldx [%g4],%g2 | |
752 | cmp %g3,%g2 ! %f8 = a129439b c03c56b3 | |
753 | bne %xcc,p0_freg_check_fail | |
754 | mov 0xf08,%g1 | |
755 | ldx [%g4+0x60],%g3 | |
756 | std %f12,[%g4] | |
757 | ldx [%g4],%g2 | |
758 | cmp %g3,%g2 ! %f12 = f19cdde6 1acb8d6c | |
759 | bne %xcc,p0_freg_check_fail | |
760 | mov 0xf12,%g1 | |
761 | ldx [%g4+0x68],%g3 | |
762 | std %f14,[%g4] | |
763 | ldx [%g4],%g2 | |
764 | cmp %g3,%g2 ! %f14 = 90a350b0 7aa1e7c6 | |
765 | bne %xcc,p0_freg_check_fail | |
766 | mov 0xf14,%g1 | |
767 | ldx [%g4+0x70],%g3 | |
768 | std %f16,[%g4] | |
769 | ldx [%g4],%g2 | |
770 | cmp %g3,%g2 ! %f16 = 4266b200 ba8a98d7 | |
771 | bne %xcc,p0_freg_check_fail | |
772 | mov 0xf16,%g1 | |
773 | ldx [%g4+0x78],%g3 | |
774 | std %f18,[%g4] | |
775 | ldx [%g4],%g2 | |
776 | cmp %g3,%g2 ! %f18 = ba8a98d7 ae6e0959 | |
777 | bne %xcc,p0_freg_check_fail | |
778 | mov 0xf18,%g1 | |
779 | ldx [%g4+0x80],%g3 | |
780 | std %f20,[%g4] | |
781 | ldx [%g4],%g2 | |
782 | cmp %g3,%g2 ! %f20 = 624810c0 5d2f4385 | |
783 | bne %xcc,p0_freg_check_fail | |
784 | mov 0xf20,%g1 | |
785 | ldx [%g4+0x88],%g3 | |
786 | std %f22,[%g4] | |
787 | ldx [%g4],%g2 | |
788 | cmp %g3,%g2 ! %f22 = 16d6ce81 6a6a89be | |
789 | bne %xcc,p0_freg_check_fail | |
790 | mov 0xf22,%g1 | |
791 | ldx [%g4+0x90],%g3 | |
792 | std %f24,[%g4] | |
793 | ldx [%g4],%g2 | |
794 | cmp %g3,%g2 ! %f24 = 2f13f88e b83cf293 | |
795 | bne %xcc,p0_freg_check_fail | |
796 | mov 0xf24,%g1 | |
797 | ldx [%g4+0x98],%g3 | |
798 | std %f26,[%g4] | |
799 | ldx [%g4],%g2 | |
800 | cmp %g3,%g2 ! %f26 = c9db2797 4929e3d1 | |
801 | bne %xcc,p0_freg_check_fail | |
802 | mov 0xf26,%g1 | |
803 | ldx [%g4+0xa0],%g3 | |
804 | std %f28,[%g4] | |
805 | ldx [%g4],%g2 | |
806 | cmp %g3,%g2 ! %f28 = 016c83ca e1f643c5 | |
807 | bne %xcc,p0_freg_check_fail | |
808 | mov 0xf28,%g1 | |
809 | ldx [%g4+0xa8],%g3 | |
810 | std %f30,[%g4] | |
811 | ldx [%g4],%g2 | |
812 | cmp %g3,%g2 ! %f30 = 11b07fb2 4b34ff17 | |
813 | bne %xcc,p0_freg_check_fail | |
814 | mov 0xf30,%g1 | |
815 | ||
816 | ! Check Point 3 completed | |
817 | ||
818 | ||
819 | p0_label_16: | |
820 | ! Mem[0000000030181408] = f7715b3a, %l7 = 0000000000000084 | |
821 | ldstuba [%i6+%o4]0x89,%l7 ! %l7 = 0000003a000000ff | |
822 | ! %l7 = 000000000000003a, Mem[00000000300c1408] = f19cdd84 | |
823 | stha %l7,[%i3+%o4]0x89 ! Mem[00000000300c1408] = f19c003a | |
824 | ! %f12 = f19cdde6 1acb8d6c, %l7 = 000000000000003a | |
825 | ! Mem[0000000010101410] = 000000c600000084 | |
826 | add %i4,0x010,%g1 | |
827 | stda %f12,[%g1+%l7]ASI_PST8_P ! Mem[0000000010101410] = 0000dde61a008d84 | |
828 | ! Mem[0000000030041400] = 012789d9, %l6 = 000000000000006e | |
829 | swapa [%i1+%g0]0x81,%l6 ! %l6 = 00000000012789d9 | |
830 | ! Mem[0000000010141410] = 000008c9, %l5 = 0000000000006ee7 | |
831 | swapa [%i5+%o5]0x88,%l5 ! %l5 = 00000000000008c9 | |
832 | ! %l2 = fffffffff7715b3a, Mem[0000000010001410] = 06929c79 | |
833 | stha %l2,[%i0+%o5]0x88 ! Mem[0000000010001410] = 06925b3a | |
834 | ! %l1 = 00000000bae3267a, Mem[0000000010041400] = 00000000 | |
835 | stha %l1,[%i1+%g0]0x88 ! Mem[0000000010041400] = 0000267a | |
836 | ! Mem[0000000030141400] = 00b26642, %l2 = fffffffff7715b3a | |
837 | swapa [%i5+%g0]0x89,%l2 ! %l2 = 0000000000b26642 | |
838 | ! Mem[0000000030101400] = 76fcdb84, %l6 = 00000000012789d9 | |
839 | ldstuba [%i4+%g0]0x89,%l6 ! %l6 = 00000084000000ff | |
840 | ! Starting 10 instruction Load Burst | |
841 | ! Mem[0000000010181410] = 0000006e, %l7 = 000000000000003a | |
842 | lduwa [%i6+%o5]0x88,%l7 ! %l7 = 000000000000006e | |
843 | ||
844 | p0_label_17: | |
845 | ! Mem[000000001000143c] = d7428e9c, %l1 = 00000000bae3267a | |
846 | ldswa [%i0+0x03c]%asi,%l1 ! %l1 = ffffffffd7428e9c | |
847 | ! Mem[0000000010181408] = 000000c6, %l6 = 0000000000000084 | |
848 | ldsw [%i6+%o4],%l6 ! %l6 = 00000000000000c6 | |
849 | ! Mem[0000000010081410] = e592b053, %l0 = 00000000238edb84 | |
850 | ldsha [%i2+%o5]0x80,%l0 ! %l0 = ffffffffffffe592 | |
851 | ! Mem[0000000030181400] = ffa369b4, %l4 = 00000000000073a6 | |
852 | ldsha [%i6+%g0]0x81,%l4 ! %l4 = ffffffffffffffa3 | |
853 | ! Mem[00000000211c0000] = 64fffe0c, %l4 = ffffffffffffffa3 | |
854 | ldsh [%o2+%g0],%l4 ! %l4 = 00000000000064ff | |
855 | ! Mem[0000000030041400] = 0f7ac90a 6e000000, %l0 = ffffe592, %l1 = d7428e9c | |
856 | ldda [%i1+%g0]0x89,%l0 ! %l0 = 000000006e000000 000000000f7ac90a | |
857 | membar #Sync ! Added by membar checker (4) | |
858 | ! Mem[0000000030181400] = ffa369b4 7ffff583 ff5b71f7 f3ba531c | |
859 | ! Mem[0000000030181410] = 7aa1e7c6 7bfaa699 79d47728 22c19623 | |
860 | ! Mem[0000000030181420] = fec3a1b4 2697841b eee6fcb5 ed8440cc | |
861 | ! Mem[0000000030181430] = 86e1d243 ae14ad00 e7689938 cae660d1 | |
862 | ldda [%i6]ASI_BLK_SL,%f0 ! Block Load from 0000000030181400 | |
863 | ! Mem[0000000010001410] = 3a5b9206522ea5b3, %l7 = 000000000000006e | |
864 | ldxa [%i0+%o5]0x80,%l7 ! %l7 = 3a5b9206522ea5b3 | |
865 | ! Mem[0000000010101400] = e6dd9cf1, %l1 = 000000000f7ac90a | |
866 | ldswa [%i4+%g0]0x88,%l1 ! %l1 = ffffffffe6dd9cf1 | |
867 | ! Starting 10 instruction Store Burst | |
868 | ! %f22 = 16d6ce81 6a6a89be, %l6 = 00000000000000c6 | |
869 | ! Mem[00000000100c1430] = 36f9e0d240a3c37e | |
870 | add %i3,0x030,%g1 | |
871 | stda %f22,[%g1+%l6]ASI_PST32_P ! Mem[00000000100c1430] = 16d6ce8140a3c37e | |
872 | ||
873 | p0_label_18: | |
874 | ! %l0 = 000000006e000000, Mem[000000001018140f] = 1acb8d6c | |
875 | stb %l0,[%i6+0x00f] ! Mem[000000001018140c] = 1acb8d00 | |
876 | ! %f28 = 016c83ca, Mem[00000000100c1408] = ffa6a4c9 | |
877 | sta %f28,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 016c83ca | |
878 | ! Mem[0000000030101400] = ffdbfc76, %l7 = 3a5b9206522ea5b3 | |
879 | ldstuba [%i4+%g0]0x81,%l7 ! %l7 = 000000ff000000ff | |
880 | ! Mem[00000000100c1400] = c0746fa4, %l4 = 00000000000064ff | |
881 | ldstuba [%i3+0x000]%asi,%l4 ! %l4 = 000000c0000000ff | |
882 | ! %l3 = ffffffffffffffff, Mem[0000000010101410] = e6dd0000 | |
883 | stwa %l3,[%i4+%o5]0x88 ! Mem[0000000010101410] = ffffffff | |
884 | ! %l1 = ffffffffe6dd9cf1, Mem[0000000030101410] = 46921ac6 | |
885 | stwa %l1,[%i4+%o5]0x89 ! Mem[0000000030101410] = e6dd9cf1 | |
886 | ! Mem[0000000030041410] = 00000000, %l5 = 00000000000008c9 | |
887 | swapa [%i1+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
888 | ! Mem[00000000211c0000] = 64fffe0c, %l1 = ffffffffe6dd9cf1 | |
889 | ldstuba [%o2+0x000]%asi,%l1 ! %l1 = 00000064000000ff | |
890 | ! Mem[000000001018140c] = 1acb8d00, %l6 = 00000000000000c6, %asi = 80 | |
891 | swapa [%i6+0x00c]%asi,%l6 ! %l6 = 000000001acb8d00 | |
892 | ! Starting 10 instruction Load Burst | |
893 | ! Mem[0000000010181408] = 000000c6 000000c6, %l4 = 000000c0, %l5 = 00000000 | |
894 | ldda [%i6+%o4]0x80,%l4 ! %l4 = 00000000000000c6 00000000000000c6 | |
895 | ||
896 | p0_label_19: | |
897 | ! Mem[0000000010181408] = 000000c6, %l1 = 0000000000000064 | |
898 | ldswa [%i6+%o4]0x80,%l1 ! %l1 = 00000000000000c6 | |
899 | ! Mem[0000000010081408] = 00000000, %f28 = 016c83ca | |
900 | lda [%i2+%o4]0x88,%f28 ! %f28 = 00000000 | |
901 | ! Mem[0000000030041400] = 0000006e, %l3 = ffffffffffffffff | |
902 | lduha [%i1+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
903 | ! Mem[0000000010081408] = 00000000, %l5 = 00000000000000c6 | |
904 | lduha [%i2+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
905 | ! Mem[000000001008140c] = d9876ee7, %l3 = 0000000000000000 | |
906 | lduwa [%i2+0x00c]%asi,%l3 ! %l3 = 00000000d9876ee7 | |
907 | membar #Sync ! Added by membar checker (5) | |
908 | ! Mem[00000000100c1400] = ff746fa4 efff740a ca836c01 6d1dd03f | |
909 | ! Mem[00000000100c1410] = 4e424342 377d1d25 b4b2c9e5 cd516cdb | |
910 | ! Mem[00000000100c1420] = 25a4a400 81924473 82183f12 58460382 | |
911 | ! Mem[00000000100c1430] = 16d6ce81 40a3c37e cc6a42fc 9fa18714 | |
912 | ldda [%i3]ASI_BLK_AIUP,%f16 ! Block Load from 00000000100c1400 | |
913 | ! Mem[0000000030181410] = 7aa1e7c6, %l7 = 00000000000000ff | |
914 | lduha [%i6+%o5]0x81,%l7 ! %l7 = 0000000000007aa1 | |
915 | ! Mem[00000000300c1408] = f19c003a, %l4 = 00000000000000c6 | |
916 | lduba [%i3+%o4]0x89,%l4 ! %l4 = 000000000000003a | |
917 | ! Mem[00000000201c0000] = 00ff1669, %l4 = 000000000000003a | |
918 | ldsba [%o0+0x001]%asi,%l4 ! %l4 = ffffffffffffffff | |
919 | ! Starting 10 instruction Store Burst | |
920 | ! %l6 = 000000001acb8d00, Mem[000000001010141c] = 00000084, %asi = 80 | |
921 | stba %l6,[%i4+0x01c]%asi ! Mem[000000001010141c] = 00000084 | |
922 | ||
923 | p0_label_20: | |
924 | ! %l0 = 000000006e000000, Mem[00000000211c0000] = fffffe0c | |
925 | sth %l0,[%o2+%g0] ! Mem[00000000211c0000] = 0000fe0c | |
926 | ! Mem[00000000211c0000] = 0000fe0c, %l2 = 0000000000b26642 | |
927 | ldstuba [%o2+0x000]%asi,%l2 ! %l2 = 00000000000000ff | |
928 | ! Mem[00000000300c1400] = 84004342, %l3 = 00000000d9876ee7 | |
929 | ldstuba [%i3+%g0]0x81,%l3 ! %l3 = 00000084000000ff | |
930 | ! Mem[0000000030181400] = b469a3ff, %l7 = 0000000000007aa1 | |
931 | swapa [%i6+%g0]0x89,%l7 ! %l7 = 00000000b469a3ff | |
932 | ! Mem[0000000010101410] = ffffffff, %l3 = 0000000000000084 | |
933 | ldstuba [%i4+%o5]0x80,%l3 ! %l3 = 000000ff000000ff | |
934 | ! %l4 = ffffffffffffffff, Mem[0000000020800041] = 97c09ffa, %asi = 80 | |
935 | stba %l4,[%o1+0x041]%asi ! Mem[0000000020800040] = 97ff9ffa | |
936 | ! %f6 = 2396c122, Mem[0000000010141400] = ff000000 | |
937 | sta %f6 ,[%i5+%g0]0x80 ! Mem[0000000010141400] = 2396c122 | |
938 | ! %l0 = 6e000000, %l1 = 000000c6, Mem[0000000010141410] = e76e0000 00000000 | |
939 | stda %l0,[%i5+%o5]0x80 ! Mem[0000000010141410] = 6e000000 000000c6 | |
940 | ! %l3 = 00000000000000ff, Mem[0000000010181408] = c6000000 | |
941 | stha %l3,[%i6+%o4]0x88 ! Mem[0000000010181408] = c60000ff | |
942 | ! Starting 10 instruction Load Burst | |
943 | ! Mem[0000000020800000] = 6fff0db6, %l4 = ffffffffffffffff | |
944 | lduba [%o1+0x000]%asi,%l4 ! %l4 = 000000000000006f | |
945 | ||
946 | ! Check Point 4 for processor 0 | |
947 | ||
948 | set p0_check_pt_data_4,%g4 | |
949 | rd %ccr,%g5 ! %g5 = 44 | |
950 | ldx [%g4+0x08],%g2 | |
951 | cmp %l0,%g2 ! %l0 = 000000006e000000 | |
952 | bne %xcc,p0_reg_check_fail0 | |
953 | mov 0xee0,%g1 | |
954 | ldx [%g4+0x10],%g2 | |
955 | cmp %l1,%g2 ! %l1 = 00000000000000c6 | |
956 | bne %xcc,p0_reg_check_fail1 | |
957 | mov 0xee1,%g1 | |
958 | ldx [%g4+0x18],%g2 | |
959 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
960 | bne %xcc,p0_reg_check_fail2 | |
961 | mov 0xee2,%g1 | |
962 | ldx [%g4+0x20],%g2 | |
963 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
964 | bne %xcc,p0_reg_check_fail3 | |
965 | mov 0xee3,%g1 | |
966 | ldx [%g4+0x28],%g2 | |
967 | cmp %l4,%g2 ! %l4 = 000000000000006f | |
968 | bne %xcc,p0_reg_check_fail4 | |
969 | mov 0xee4,%g1 | |
970 | ldx [%g4+0x30],%g2 | |
971 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
972 | bne %xcc,p0_reg_check_fail5 | |
973 | mov 0xee5,%g1 | |
974 | ldx [%g4+0x38],%g2 | |
975 | cmp %l6,%g2 ! %l6 = 000000001acb8d00 | |
976 | bne %xcc,p0_reg_check_fail6 | |
977 | mov 0xee6,%g1 | |
978 | ldx [%g4+0x40],%g2 | |
979 | cmp %l7,%g2 ! %l7 = 00000000b469a3ff | |
980 | bne %xcc,p0_reg_check_fail7 | |
981 | mov 0xee7,%g1 | |
982 | ldx [%g4+0x48],%g3 | |
983 | std %f0,[%g4] | |
984 | ldx [%g4],%g2 | |
985 | cmp %g3,%g2 ! %f0 = 83f5ff7f b469a3ff | |
986 | bne %xcc,p0_freg_check_fail | |
987 | mov 0xf00,%g1 | |
988 | ldx [%g4+0x50],%g3 | |
989 | std %f2,[%g4] | |
990 | ldx [%g4],%g2 | |
991 | cmp %g3,%g2 ! %f2 = 1c53baf3 f7715bff | |
992 | bne %xcc,p0_freg_check_fail | |
993 | mov 0xf02,%g1 | |
994 | ldx [%g4+0x58],%g3 | |
995 | std %f4,[%g4] | |
996 | ldx [%g4],%g2 | |
997 | cmp %g3,%g2 ! %f4 = 99a6fa7b c6e7a17a | |
998 | bne %xcc,p0_freg_check_fail | |
999 | mov 0xf04,%g1 | |
1000 | ldx [%g4+0x60],%g3 | |
1001 | std %f6,[%g4] | |
1002 | ldx [%g4],%g2 | |
1003 | cmp %g3,%g2 ! %f6 = 2396c122 2877d479 | |
1004 | bne %xcc,p0_freg_check_fail | |
1005 | mov 0xf06,%g1 | |
1006 | ldx [%g4+0x68],%g3 | |
1007 | std %f8,[%g4] | |
1008 | ldx [%g4],%g2 | |
1009 | cmp %g3,%g2 ! %f8 = 1b849726 b4a1c3fe | |
1010 | bne %xcc,p0_freg_check_fail | |
1011 | mov 0xf08,%g1 | |
1012 | ldx [%g4+0x70],%g3 | |
1013 | std %f10,[%g4] | |
1014 | ldx [%g4],%g2 | |
1015 | cmp %g3,%g2 ! %f10 = cc4084ed b5fce6ee | |
1016 | bne %xcc,p0_freg_check_fail | |
1017 | mov 0xf10,%g1 | |
1018 | ldx [%g4+0x78],%g3 | |
1019 | std %f12,[%g4] | |
1020 | ldx [%g4],%g2 | |
1021 | cmp %g3,%g2 ! %f12 = 00ad14ae 43d2e186 | |
1022 | bne %xcc,p0_freg_check_fail | |
1023 | mov 0xf12,%g1 | |
1024 | ldx [%g4+0x80],%g3 | |
1025 | std %f14,[%g4] | |
1026 | ldx [%g4],%g2 | |
1027 | cmp %g3,%g2 ! %f14 = d160e6ca 389968e7 | |
1028 | bne %xcc,p0_freg_check_fail | |
1029 | mov 0xf14,%g1 | |
1030 | ldx [%g4+0x88],%g3 | |
1031 | std %f16,[%g4] | |
1032 | ldx [%g4],%g2 | |
1033 | cmp %g3,%g2 ! %f16 = ff746fa4 efff740a | |
1034 | bne %xcc,p0_freg_check_fail | |
1035 | mov 0xf16,%g1 | |
1036 | ldx [%g4+0x90],%g3 | |
1037 | std %f18,[%g4] | |
1038 | ldx [%g4],%g2 | |
1039 | cmp %g3,%g2 ! %f18 = ca836c01 6d1dd03f | |
1040 | bne %xcc,p0_freg_check_fail | |
1041 | mov 0xf18,%g1 | |
1042 | ldx [%g4+0x98],%g3 | |
1043 | std %f20,[%g4] | |
1044 | ldx [%g4],%g2 | |
1045 | cmp %g3,%g2 ! %f20 = 4e424342 377d1d25 | |
1046 | bne %xcc,p0_freg_check_fail | |
1047 | mov 0xf20,%g1 | |
1048 | ldx [%g4+0xa0],%g3 | |
1049 | std %f22,[%g4] | |
1050 | ldx [%g4],%g2 | |
1051 | cmp %g3,%g2 ! %f22 = b4b2c9e5 cd516cdb | |
1052 | bne %xcc,p0_freg_check_fail | |
1053 | mov 0xf22,%g1 | |
1054 | ldx [%g4+0xa8],%g3 | |
1055 | std %f24,[%g4] | |
1056 | ldx [%g4],%g2 | |
1057 | cmp %g3,%g2 ! %f24 = 25a4a400 81924473 | |
1058 | bne %xcc,p0_freg_check_fail | |
1059 | mov 0xf24,%g1 | |
1060 | ldx [%g4+0xb0],%g3 | |
1061 | std %f26,[%g4] | |
1062 | ldx [%g4],%g2 | |
1063 | cmp %g3,%g2 ! %f26 = 82183f12 58460382 | |
1064 | bne %xcc,p0_freg_check_fail | |
1065 | mov 0xf26,%g1 | |
1066 | ldx [%g4+0xb8],%g3 | |
1067 | std %f28,[%g4] | |
1068 | ldx [%g4],%g2 | |
1069 | cmp %g3,%g2 ! %f28 = 16d6ce81 40a3c37e | |
1070 | bne %xcc,p0_freg_check_fail | |
1071 | mov 0xf28,%g1 | |
1072 | ldx [%g4+0xc0],%g3 | |
1073 | std %f30,[%g4] | |
1074 | ldx [%g4],%g2 | |
1075 | cmp %g3,%g2 ! %f30 = cc6a42fc 9fa18714 | |
1076 | bne %xcc,p0_freg_check_fail | |
1077 | mov 0xf30,%g1 | |
1078 | ||
1079 | ! Check Point 4 completed | |
1080 | ||
1081 | ||
1082 | p0_label_21: | |
1083 | ! Mem[00000000100c1408] = 3fd01d6d016c83ca, %l3 = 00000000000000ff | |
1084 | ldxa [%i3+%o4]0x88,%l3 ! %l3 = 3fd01d6d016c83ca | |
1085 | ! Mem[0000000010181410] = 6e000000, %l1 = 00000000000000c6 | |
1086 | lduha [%i6+%o5]0x80,%l1 ! %l1 = 0000000000006e00 | |
1087 | ! Mem[00000000100c1408] = 016c83ca, %l4 = 000000000000006f | |
1088 | lduwa [%i3+%o4]0x88,%l4 ! %l4 = 00000000016c83ca | |
1089 | ! Mem[0000000030101410] = f19cdde6, %l3 = 3fd01d6d016c83ca | |
1090 | ldsha [%i4+%o5]0x81,%l3 ! %l3 = fffffffffffff19c | |
1091 | ! Mem[0000000010181430] = 4d30c046, %l3 = fffffffffffff19c | |
1092 | lduha [%i6+0x030]%asi,%l3 ! %l3 = 0000000000004d30 | |
1093 | ! Mem[00000000100c1408] = ca836c01, %l3 = 0000000000004d30 | |
1094 | ldsb [%i3+%o4],%l3 ! %l3 = ffffffffffffffca | |
1095 | ! Mem[0000000030081410] = ff2f5de4, %f2 = 1c53baf3 | |
1096 | lda [%i2+%o5]0x81,%f2 ! %f2 = ff2f5de4 | |
1097 | ! Mem[00000000211c0000] = ff00fe0c, %l2 = 0000000000000000 | |
1098 | ldsha [%o2+0x000]%asi,%l2 ! %l2 = ffffffffffffff00 | |
1099 | ! Mem[0000000030141400] = 3a5b71f7, %l6 = 000000001acb8d00 | |
1100 | ldsha [%i5+%g0]0x81,%l6 ! %l6 = 0000000000003a5b | |
1101 | ! Starting 10 instruction Store Burst | |
1102 | ! Mem[0000000010101430] = 1b814de4, %l7 = b469a3ff, %l4 = 016c83ca | |
1103 | add %i4,0x30,%g1 | |
1104 | casa [%g1]0x80,%l7,%l4 ! %l4 = 000000001b814de4 | |
1105 | ||
1106 | p0_label_22: | |
1107 | ! Mem[0000000010181408] = ff0000c6, %l2 = ffffffffffffff00 | |
1108 | ldstuba [%i6+%o4]0x80,%l2 ! %l2 = 000000ff000000ff | |
1109 | ! Mem[0000000030001410] = e592b053, %l4 = 000000001b814de4 | |
1110 | ldstuba [%i0+%o5]0x81,%l4 ! %l4 = 000000e5000000ff | |
1111 | ! %f18 = ca836c01 6d1dd03f, Mem[0000000010001400] = 0000002c 00008a11 | |
1112 | stda %f18,[%i0+%g0]0x80 ! Mem[0000000010001400] = ca836c01 6d1dd03f | |
1113 | ! %l2 = 000000ff, %l3 = ffffffca, Mem[0000000030101400] = 76fcdbff 8b893696 | |
1114 | stda %l2,[%i4+%g0]0x89 ! Mem[0000000030101400] = 000000ff ffffffca | |
1115 | ! Mem[000000001018142c] = 000064dd, %l4 = 00000000000000e5, %asi = 80 | |
1116 | swapa [%i6+0x02c]%asi,%l4 ! %l4 = 00000000000064dd | |
1117 | membar #Sync ! Added by membar checker (6) | |
1118 | ! %l2 = 00000000000000ff, Mem[00000000100c1410] = 4e424342 | |
1119 | stha %l2,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 00ff4342 | |
1120 | ! Mem[0000000030101410] = e6dd9cf1, %l2 = 00000000000000ff | |
1121 | swapa [%i4+%o5]0x89,%l2 ! %l2 = 00000000e6dd9cf1 | |
1122 | ! %f24 = 25a4a400, Mem[0000000010001410] = 3a5b9206 | |
1123 | sta %f24,[%i0+%o5]0x80 ! Mem[0000000010001410] = 25a4a400 | |
1124 | ! %f4 = 99a6fa7b, Mem[0000000030001400] = 32c3ea98 | |
1125 | sta %f4 ,[%i0+%g0]0x89 ! Mem[0000000030001400] = 99a6fa7b | |
1126 | ! Starting 10 instruction Load Burst | |
1127 | ! Mem[0000000010141410] = 0000006e, %l4 = 00000000000064dd | |
1128 | ldsba [%i5+%o5]0x88,%l4 ! %l4 = 000000000000006e | |
1129 | ||
1130 | p0_label_23: | |
1131 | ! Mem[0000000030041410] = 000008c9, %l4 = 000000000000006e | |
1132 | ldswa [%i1+%o5]0x81,%l4 ! %l4 = 00000000000008c9 | |
1133 | ! Mem[0000000010001428] = faa3f94da309ade0, %f26 = 82183f12 58460382 | |
1134 | ldd [%i0+0x028],%f26 ! %f26 = faa3f94d a309ade0 | |
1135 | ! %l5 = 0000000000000000, %l7 = 00000000b469a3ff, %l6 = 0000000000003a5b | |
1136 | sdivx %l5,%l7,%l6 ! %l6 = 0000000000000000 | |
1137 | ! Mem[0000000010001410] = b3a52e5200a4a425, %f18 = ca836c01 6d1dd03f | |
1138 | ldda [%i0+%o5]0x88,%f18 ! %f18 = b3a52e52 00a4a425 | |
1139 | ! Mem[0000000010181408] = ff0000c6, %l7 = 00000000b469a3ff | |
1140 | lduha [%i6+%o4]0x80,%l7 ! %l7 = 000000000000ff00 | |
1141 | ! Mem[0000000010001434] = ffb8ffb0, %l1 = 0000000000006e00 | |
1142 | lduwa [%i0+0x034]%asi,%l1 ! %l1 = 00000000ffb8ffb0 | |
1143 | ! Mem[0000000030001400] = d034c7dc99a6fa7b, %f20 = 4e424342 377d1d25 | |
1144 | ldda [%i0+%g0]0x89,%f20 ! %f20 = d034c7dc 99a6fa7b | |
1145 | ! Mem[0000000030041408] = dd000000, %l6 = 0000000000000000 | |
1146 | ldswa [%i1+%o4]0x81,%l6 ! %l6 = ffffffffdd000000 | |
1147 | ! Mem[00000000100c1400] = 0a74ffefa46f74ff, %l3 = ffffffffffffffca | |
1148 | ldxa [%i3+%g0]0x88,%l3 ! %l3 = 0a74ffefa46f74ff | |
1149 | ! Starting 10 instruction Store Burst | |
1150 | ! %l7 = 000000000000ff00, Mem[0000000030101408] = e76e87d98d3caeae | |
1151 | stxa %l7,[%i4+%o4]0x81 ! Mem[0000000030101408] = 000000000000ff00 | |
1152 | ||
1153 | p0_label_24: | |
1154 | ! %l6 = dd000000, %l7 = 0000ff00, Mem[0000000010181408] = c60000ff c6000000 | |
1155 | stda %l6,[%i6+%o4]0x88 ! Mem[0000000010181408] = dd000000 0000ff00 | |
1156 | ! %l7 = 000000000000ff00, Mem[0000000010001410] = 00a4a425 | |
1157 | stha %l7,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00a4ff00 | |
1158 | ! Mem[0000000010081408] = 00000000, %l5 = 0000000000000000 | |
1159 | swapa [%i2+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
1160 | ! %l3 = 0a74ffefa46f74ff, Mem[0000000030041400] = 6e000000 | |
1161 | stba %l3,[%i1+%g0]0x89 ! Mem[0000000030041400] = 6e0000ff | |
1162 | ! %l0 = 000000006e000000, Mem[00000000100c1408] = 3fd01d6d016c83ca | |
1163 | stxa %l0,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 000000006e000000 | |
1164 | ! Mem[0000000030041408] = dd000000, %l0 = 000000006e000000 | |
1165 | ldstuba [%i1+%o4]0x81,%l0 ! %l0 = 000000dd000000ff | |
1166 | ! %f9 = b4a1c3fe, Mem[0000000030101408] = 00000000 | |
1167 | sta %f9 ,[%i4+%o4]0x81 ! Mem[0000000030101408] = b4a1c3fe | |
1168 | ! %f14 = d160e6ca 389968e7, Mem[0000000010181410] = 6e000000 00000000 | |
1169 | stda %f14,[%i6+0x010]%asi ! Mem[0000000010181410] = d160e6ca 389968e7 | |
1170 | ! %l2 = 00000000e6dd9cf1, Mem[00000000300c1410] = ffffffff | |
1171 | stha %l2,[%i3+%o5]0x89 ! Mem[00000000300c1410] = ffff9cf1 | |
1172 | ! Starting 10 instruction Load Burst | |
1173 | ! Mem[00000000100c1408] = 6e000000, %l5 = 0000000000000000 | |
1174 | ldsba [%i3+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
1175 | ||
1176 | p0_label_25: | |
1177 | ! Mem[00000000100c1408] = 6e000000, %l7 = 000000000000ff00 | |
1178 | ldsha [%i3+%o4]0x88,%l7 ! %l7 = 0000000000000000 | |
1179 | ! Mem[0000000010041408] = a695a673, %f9 = b4a1c3fe | |
1180 | lda [%i1+%o4]0x88,%f9 ! %f9 = a695a673 | |
1181 | ! Mem[0000000020800000] = 6fff0db6, %l1 = 00000000ffb8ffb0 | |
1182 | ldub [%o1+0x001],%l1 ! %l1 = 00000000000000ff | |
1183 | ! Mem[0000000010181410] = d160e6ca, %l4 = 00000000000008c9 | |
1184 | lduha [%i6+0x012]%asi,%l4 ! %l4 = 000000000000e6ca | |
1185 | ! Mem[0000000030001400] = 99a6fa7b, %l3 = 0a74ffefa46f74ff | |
1186 | lduba [%i0+%g0]0x89,%l3 ! %l3 = 000000000000007b | |
1187 | ! Mem[0000000030181410] = c6e7a17a, %l5 = 0000000000000000 | |
1188 | lduwa [%i6+%o5]0x89,%l5 ! %l5 = 00000000c6e7a17a | |
1189 | membar #Sync ! Added by membar checker (7) | |
1190 | ! Mem[0000000030041400] = ff00006e 0ac97a0f ff000000 00000000 | |
1191 | ! Mem[0000000030041410] = 000008c9 000000dd c90a8ea5 3eec125e | |
1192 | ! Mem[0000000030041420] = 0f105c1a ed13eb1e 3d8bd50d 767d008b | |
1193 | ! Mem[0000000030041430] = 8ed62c03 37e2e09e 5205b393 20e3dee5 | |
1194 | ldda [%i1]ASI_BLK_AIUS,%f16 ! Block Load from 0000000030041400 | |
1195 | ! Mem[0000000030181410] = c6e7a17a, %f12 = 00ad14ae | |
1196 | lda [%i6+%o5]0x89,%f12 ! %f12 = c6e7a17a | |
1197 | ! Mem[0000000010081408] = 00000000 d9876ee7, %l2 = e6dd9cf1, %l3 = 0000007b | |
1198 | ldda [%i2+0x008]%asi,%l2 ! %l2 = 0000000000000000 00000000d9876ee7 | |
1199 | ! Starting 10 instruction Store Burst | |
1200 | ! %l2 = 00000000, %l3 = d9876ee7, Mem[0000000010181408] = dd000000 0000ff00 | |
1201 | stda %l2,[%i6+%o4]0x88 ! Mem[0000000010181408] = 00000000 d9876ee7 | |
1202 | ||
1203 | ! Check Point 5 for processor 0 | |
1204 | ||
1205 | set p0_check_pt_data_5,%g4 | |
1206 | rd %ccr,%g5 ! %g5 = 44 | |
1207 | ldx [%g4+0x08],%g2 | |
1208 | cmp %l0,%g2 ! %l0 = 00000000000000dd | |
1209 | bne %xcc,p0_reg_check_fail0 | |
1210 | mov 0xee0,%g1 | |
1211 | ldx [%g4+0x10],%g2 | |
1212 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
1213 | bne %xcc,p0_reg_check_fail1 | |
1214 | mov 0xee1,%g1 | |
1215 | ldx [%g4+0x18],%g2 | |
1216 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
1217 | bne %xcc,p0_reg_check_fail2 | |
1218 | mov 0xee2,%g1 | |
1219 | ldx [%g4+0x20],%g2 | |
1220 | cmp %l3,%g2 ! %l3 = 00000000d9876ee7 | |
1221 | bne %xcc,p0_reg_check_fail3 | |
1222 | mov 0xee3,%g1 | |
1223 | ldx [%g4+0x28],%g2 | |
1224 | cmp %l4,%g2 ! %l4 = 000000000000e6ca | |
1225 | bne %xcc,p0_reg_check_fail4 | |
1226 | mov 0xee4,%g1 | |
1227 | ldx [%g4+0x30],%g2 | |
1228 | cmp %l5,%g2 ! %l5 = 00000000c6e7a17a | |
1229 | bne %xcc,p0_reg_check_fail5 | |
1230 | mov 0xee5,%g1 | |
1231 | ldx [%g4+0x38],%g2 | |
1232 | cmp %l6,%g2 ! %l6 = ffffffffdd000000 | |
1233 | bne %xcc,p0_reg_check_fail6 | |
1234 | mov 0xee6,%g1 | |
1235 | ldx [%g4+0x40],%g2 | |
1236 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
1237 | bne %xcc,p0_reg_check_fail7 | |
1238 | mov 0xee7,%g1 | |
1239 | ldx [%g4+0x48],%g3 | |
1240 | std %f2,[%g4] | |
1241 | ldx [%g4],%g2 | |
1242 | cmp %g3,%g2 ! %f2 = ff2f5de4 f7715bff | |
1243 | bne %xcc,p0_freg_check_fail | |
1244 | mov 0xf02,%g1 | |
1245 | ldx [%g4+0x50],%g3 | |
1246 | std %f8,[%g4] | |
1247 | ldx [%g4],%g2 | |
1248 | cmp %g3,%g2 ! %f8 = 1b849726 a695a673 | |
1249 | bne %xcc,p0_freg_check_fail | |
1250 | mov 0xf08,%g1 | |
1251 | ldx [%g4+0x58],%g3 | |
1252 | std %f12,[%g4] | |
1253 | ldx [%g4],%g2 | |
1254 | cmp %g3,%g2 ! %f12 = c6e7a17a 43d2e186 | |
1255 | bne %xcc,p0_freg_check_fail | |
1256 | mov 0xf12,%g1 | |
1257 | ldx [%g4+0x60],%g3 | |
1258 | std %f16,[%g4] | |
1259 | ldx [%g4],%g2 | |
1260 | cmp %g3,%g2 ! %f16 = ff00006e 0ac97a0f | |
1261 | bne %xcc,p0_freg_check_fail | |
1262 | mov 0xf16,%g1 | |
1263 | ldx [%g4+0x68],%g3 | |
1264 | std %f18,[%g4] | |
1265 | ldx [%g4],%g2 | |
1266 | cmp %g3,%g2 ! %f18 = ff000000 00000000 | |
1267 | bne %xcc,p0_freg_check_fail | |
1268 | mov 0xf18,%g1 | |
1269 | ldx [%g4+0x70],%g3 | |
1270 | std %f20,[%g4] | |
1271 | ldx [%g4],%g2 | |
1272 | cmp %g3,%g2 ! %f20 = 000008c9 000000dd | |
1273 | bne %xcc,p0_freg_check_fail | |
1274 | mov 0xf20,%g1 | |
1275 | ldx [%g4+0x78],%g3 | |
1276 | std %f22,[%g4] | |
1277 | ldx [%g4],%g2 | |
1278 | cmp %g3,%g2 ! %f22 = c90a8ea5 3eec125e | |
1279 | bne %xcc,p0_freg_check_fail | |
1280 | mov 0xf22,%g1 | |
1281 | ldx [%g4+0x80],%g3 | |
1282 | std %f24,[%g4] | |
1283 | ldx [%g4],%g2 | |
1284 | cmp %g3,%g2 ! %f24 = 0f105c1a ed13eb1e | |
1285 | bne %xcc,p0_freg_check_fail | |
1286 | mov 0xf24,%g1 | |
1287 | ldx [%g4+0x88],%g3 | |
1288 | std %f26,[%g4] | |
1289 | ldx [%g4],%g2 | |
1290 | cmp %g3,%g2 ! %f26 = 3d8bd50d 767d008b | |
1291 | bne %xcc,p0_freg_check_fail | |
1292 | mov 0xf26,%g1 | |
1293 | ldx [%g4+0x90],%g3 | |
1294 | std %f28,[%g4] | |
1295 | ldx [%g4],%g2 | |
1296 | cmp %g3,%g2 ! %f28 = 8ed62c03 37e2e09e | |
1297 | bne %xcc,p0_freg_check_fail | |
1298 | mov 0xf28,%g1 | |
1299 | ldx [%g4+0x98],%g3 | |
1300 | std %f30,[%g4] | |
1301 | ldx [%g4],%g2 | |
1302 | cmp %g3,%g2 ! %f30 = 5205b393 20e3dee5 | |
1303 | bne %xcc,p0_freg_check_fail | |
1304 | mov 0xf30,%g1 | |
1305 | ||
1306 | ! Check Point 5 completed | |
1307 | ||
1308 | ||
1309 | p0_label_26: | |
1310 | ! %l6 = ffffffffdd000000, Mem[0000000010081410] = e592b053 | |
1311 | stwa %l6,[%i2+%o5]0x80 ! Mem[0000000010081410] = dd000000 | |
1312 | ! Mem[0000000010001408] = 84db8e23, %l3 = 00000000d9876ee7 | |
1313 | swap [%i0+%o4],%l3 ! %l3 = 0000000084db8e23 | |
1314 | ! Mem[00000000100c1408] = 0000006e, %l7 = 0000000000000000 | |
1315 | ldsha [%i3+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
1316 | ! %l4 = 000000000000e6ca, Mem[00000000201c0000] = 00ff1669 | |
1317 | sth %l4,[%o0+%g0] ! Mem[00000000201c0000] = e6ca1669 | |
1318 | ! Mem[0000000030141410] = 624810c0, %l2 = 0000000000000000 | |
1319 | ldstuba [%i5+%o5]0x81,%l2 ! %l2 = 00000062000000ff | |
1320 | ! Mem[0000000010081428] = 1263e8ddc79c2645, %l0 = 00000000000000dd, %l1 = 00000000000000ff | |
1321 | add %i2,0x28,%g1 | |
1322 | casxa [%g1]0x80,%l0,%l1 ! %l1 = 1263e8ddc79c2645 | |
1323 | ! Mem[0000000030081410] = e45d2fff, %l5 = 00000000c6e7a17a | |
1324 | ldstuba [%i2+%o5]0x89,%l5 ! %l5 = 000000ff000000ff | |
1325 | ! %f30 = 5205b393 20e3dee5, %l0 = 00000000000000dd | |
1326 | ! Mem[0000000010141418] = 1a1bfb629236627b | |
1327 | add %i5,0x018,%g1 | |
1328 | stda %f30,[%g1+%l0]ASI_PST32_P ! Mem[0000000010141418] = 1a1bfb6220e3dee5 | |
1329 | ! %l1 = 1263e8ddc79c2645, Mem[0000000030081410] = ff2f5de4 | |
1330 | stha %l1,[%i2+%o5]0x81 ! Mem[0000000030081410] = 26455de4 | |
1331 | ! Starting 10 instruction Load Burst | |
1332 | ! Mem[0000000010081408] = 00000000, %l2 = 0000000000000062 | |
1333 | lduwa [%i2+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
1334 | ||
1335 | p0_label_27: | |
1336 | ! Mem[0000000030181400] = a17a0000, %l0 = 00000000000000dd | |
1337 | ldsba [%i6+%g0]0x81,%l0 ! %l0 = ffffffffffffffa1 | |
1338 | ! Mem[0000000010001418] = d9876ee7, %l5 = 00000000000000ff | |
1339 | ldsb [%i0+0x01a],%l5 ! %l5 = 000000000000006e | |
1340 | ! Mem[00000000211c0000] = ff00fe0c, %l3 = 0000000084db8e23 | |
1341 | ldub [%o2+%g0],%l3 ! %l3 = 00000000000000ff | |
1342 | ! Mem[00000000100c1400] = ff746fa4, %l0 = ffffffffffffffa1 | |
1343 | lduba [%i3+%g0]0x80,%l0 ! %l0 = 00000000000000ff | |
1344 | ! Mem[0000000030001400] = d034c7dc 99a6fa7b, %l4 = 0000e6ca, %l5 = 0000006e | |
1345 | ldda [%i0+%g0]0x89,%l4 ! %l4 = 0000000099a6fa7b 00000000d034c7dc | |
1346 | ! Mem[00000000201c0000] = e6ca1669, %l7 = 0000000000000000 | |
1347 | ldsba [%o0+0x001]%asi,%l7 ! %l7 = ffffffffffffffca | |
1348 | ! Mem[0000000010141400] = 2396c1226e000000, %f6 = 2396c122 2877d479 | |
1349 | ldda [%i5+%g0]0x80,%f6 ! %f6 = 2396c122 6e000000 | |
1350 | ! Mem[0000000030041410] = c9080000, %l6 = ffffffffdd000000 | |
1351 | ldswa [%i1+%o5]0x89,%l6 ! %l6 = ffffffffc9080000 | |
1352 | ! Mem[0000000030081408] = ea11b213, %f3 = f7715bff | |
1353 | lda [%i2+%o4]0x89,%f3 ! %f3 = ea11b213 | |
1354 | ! Starting 10 instruction Store Burst | |
1355 | ! Mem[0000000010001400] = ca836c01, %l6 = ffffffffc9080000 | |
1356 | swapa [%i0+%g0]0x80,%l6 ! %l6 = 00000000ca836c01 | |
1357 | ||
1358 | p0_label_28: | |
1359 | ! Mem[0000000021800100] = 610e39e7, %l3 = 00000000000000ff | |
1360 | ldstuba [%o3+0x100]%asi,%l3 ! %l3 = 00000061000000ff | |
1361 | ! %l6 = ca836c01, %l7 = ffffffca, Mem[0000000010001410] = 00a4ff00 b3a52e52 | |
1362 | stda %l6,[%i0+%o5]0x88 ! Mem[0000000010001410] = ca836c01 ffffffca | |
1363 | ! Mem[00000000100c1408] = 0000006e, %l2 = 0000000000000000 | |
1364 | swapa [%i3+%o4]0x80,%l2 ! %l2 = 000000000000006e | |
1365 | ! Mem[0000000010181408] = 00000000, %l3 = 0000000000000061 | |
1366 | swapa [%i6+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
1367 | ! Mem[0000000030081410] = e45d4526, %l0 = 00000000000000ff | |
1368 | ldstuba [%i2+%o5]0x89,%l0 ! %l0 = 00000026000000ff | |
1369 | ! Mem[0000000010181410] = cae660d1, %l1 = 1263e8ddc79c2645 | |
1370 | swapa [%i6+%o5]0x88,%l1 ! %l1 = 00000000cae660d1 | |
1371 | ! %l6 = 00000000ca836c01, Mem[0000000030181410] = 7aa1e7c6 | |
1372 | stwa %l6,[%i6+%o5]0x81 ! Mem[0000000030181410] = ca836c01 | |
1373 | ! %l0 = 0000000000000026, Mem[0000000030101410] = ff000000d776c049 | |
1374 | stxa %l0,[%i4+%o5]0x81 ! Mem[0000000030101410] = 0000000000000026 | |
1375 | ! %f14 = d160e6ca, Mem[0000000010081400] = 000064ff | |
1376 | sta %f14,[%i2+%g0]0x88 ! Mem[0000000010081400] = d160e6ca | |
1377 | ! Starting 10 instruction Load Burst | |
1378 | ! Mem[0000000030041400] = 6e0000ff, %l2 = 000000000000006e | |
1379 | ldsba [%i1+%g0]0x89,%l2 ! %l2 = ffffffffffffffff | |
1380 | ||
1381 | p0_label_29: | |
1382 | ! Mem[0000000010141400] = 0000006e22c19623, %l5 = 00000000d034c7dc | |
1383 | ldxa [%i5+%g0]0x88,%l5 ! %l5 = 0000006e22c19623 | |
1384 | ! Mem[0000000020800000] = 6fff0db6, %l1 = 00000000cae660d1 | |
1385 | lduh [%o1+%g0],%l1 ! %l1 = 0000000000006fff | |
1386 | ! Mem[0000000010101428] = b1484755, %l1 = 0000000000006fff | |
1387 | ldsh [%i4+0x028],%l1 ! %l1 = ffffffffffffb148 | |
1388 | ! Mem[00000000211c0000] = ff00fe0c, %l4 = 0000000099a6fa7b | |
1389 | ldsh [%o2+%g0],%l4 ! %l4 = ffffffffffffff00 | |
1390 | ! Mem[00000000211c0000] = ff00fe0c, %l5 = 0000006e22c19623 | |
1391 | ldub [%o2+0x001],%l5 ! %l5 = 0000000000000000 | |
1392 | ! Mem[0000000010041410] = 00000000 0000006e, %l0 = 00000026, %l1 = ffffb148 | |
1393 | ldda [%i1+%o5]0x88,%l0 ! %l0 = 000000000000006e 0000000000000000 | |
1394 | ! Mem[0000000030141408] = ba8a98d7ae6e0959, %f0 = 83f5ff7f b469a3ff | |
1395 | ldda [%i5+%o4]0x81,%f0 ! %f0 = ba8a98d7 ae6e0959 | |
1396 | ! Mem[00000000100c1410] = 4243ff00, %l4 = ffffffffffffff00 | |
1397 | lduha [%i3+%o5]0x88,%l4 ! %l4 = 000000000000ff00 | |
1398 | ! Mem[0000000030101410] = 00000000, %l1 = 0000000000000000 | |
1399 | ldswa [%i4+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
1400 | ! Starting 10 instruction Store Burst | |
1401 | ! %l5 = 0000000000000000, Mem[0000000030101400] = 000000ff | |
1402 | stha %l5,[%i4+%g0]0x89 ! Mem[0000000030101400] = 00000000 | |
1403 | ||
1404 | p0_label_30: | |
1405 | ! Mem[00000000100c1404] = efff740a, %l3 = 0000000000000000, %asi = 80 | |
1406 | swapa [%i3+0x004]%asi,%l3 ! %l3 = 00000000efff740a | |
1407 | ! Mem[000000001014143c] = d6f06643, %l1 = 0000000000000000, %asi = 80 | |
1408 | swapa [%i5+0x03c]%asi,%l1 ! %l1 = 00000000d6f06643 | |
1409 | ! %l6 = 00000000ca836c01, Mem[0000000030181410] = ca836c01 | |
1410 | stha %l6,[%i6+%o5]0x81 ! Mem[0000000030181410] = 6c016c01 | |
1411 | ! %l3 = 00000000efff740a, Mem[0000000010101408] = ffdb1893 | |
1412 | stha %l3,[%i4+%o4]0x80 ! Mem[0000000010101408] = 740a1893 | |
1413 | ! %f8 = 1b849726 a695a673, Mem[0000000010141410] = 6e000000 000000c6 | |
1414 | stda %f8 ,[%i5+%o5]0x80 ! Mem[0000000010141410] = 1b849726 a695a673 | |
1415 | ! Mem[0000000030181410] = 6c016c01, %l6 = 00000000ca836c01 | |
1416 | swapa [%i6+%o5]0x81,%l6 ! %l6 = 000000006c016c01 | |
1417 | ! %l1 = 00000000d6f06643, Mem[000000001010143c] = 171eac14 | |
1418 | sth %l1,[%i4+0x03c] ! Mem[000000001010143c] = 6643ac14 | |
1419 | ! %f0 = ba8a98d7 ae6e0959 ff2f5de4 ea11b213 | |
1420 | ! %f4 = 99a6fa7b c6e7a17a 2396c122 6e000000 | |
1421 | ! %f8 = 1b849726 a695a673 cc4084ed b5fce6ee | |
1422 | ! %f12 = c6e7a17a 43d2e186 d160e6ca 389968e7 | |
1423 | stda %f0,[%i6]ASI_BLK_S ! Block Store to 0000000030181400 | |
1424 | ! %l2 = ffffffffffffffff, Mem[0000000030001410] = 53b092ff | |
1425 | stwa %l2,[%i0+%o5]0x89 ! Mem[0000000030001410] = ffffffff | |
1426 | ! Starting 10 instruction Load Burst | |
1427 | membar #Sync ! Added by membar checker (8) | |
1428 | ! Mem[0000000030181410] = 99a6fa7b, %l6 = 000000006c016c01 | |
1429 | ldswa [%i6+%o5]0x81,%l6 ! %l6 = ffffffff99a6fa7b | |
1430 | ||
1431 | ! Check Point 6 for processor 0 | |
1432 | ||
1433 | set p0_check_pt_data_6,%g4 | |
1434 | rd %ccr,%g5 ! %g5 = 44 | |
1435 | ldx [%g4+0x08],%g2 | |
1436 | cmp %l0,%g2 ! %l0 = 000000000000006e | |
1437 | bne %xcc,p0_reg_check_fail0 | |
1438 | mov 0xee0,%g1 | |
1439 | ldx [%g4+0x10],%g2 | |
1440 | cmp %l1,%g2 ! %l1 = 00000000d6f06643 | |
1441 | bne %xcc,p0_reg_check_fail1 | |
1442 | mov 0xee1,%g1 | |
1443 | ldx [%g4+0x18],%g2 | |
1444 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
1445 | bne %xcc,p0_reg_check_fail2 | |
1446 | mov 0xee2,%g1 | |
1447 | ldx [%g4+0x20],%g2 | |
1448 | cmp %l3,%g2 ! %l3 = 00000000efff740a | |
1449 | bne %xcc,p0_reg_check_fail3 | |
1450 | mov 0xee3,%g1 | |
1451 | ldx [%g4+0x28],%g2 | |
1452 | cmp %l4,%g2 ! %l4 = 000000000000ff00 | |
1453 | bne %xcc,p0_reg_check_fail4 | |
1454 | mov 0xee4,%g1 | |
1455 | ldx [%g4+0x30],%g2 | |
1456 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
1457 | bne %xcc,p0_reg_check_fail5 | |
1458 | mov 0xee5,%g1 | |
1459 | ldx [%g4+0x38],%g2 | |
1460 | cmp %l6,%g2 ! %l6 = ffffffff99a6fa7b | |
1461 | bne %xcc,p0_reg_check_fail6 | |
1462 | mov 0xee6,%g1 | |
1463 | ldx [%g4+0x40],%g2 | |
1464 | cmp %l7,%g2 ! %l7 = ffffffffffffffca | |
1465 | bne %xcc,p0_reg_check_fail7 | |
1466 | mov 0xee7,%g1 | |
1467 | ldx [%g4+0x48],%g3 | |
1468 | std %f0,[%g4] | |
1469 | ldx [%g4],%g2 | |
1470 | cmp %g3,%g2 ! %f0 = ba8a98d7 ae6e0959 | |
1471 | bne %xcc,p0_freg_check_fail | |
1472 | mov 0xf00,%g1 | |
1473 | ldx [%g4+0x50],%g3 | |
1474 | std %f2,[%g4] | |
1475 | ldx [%g4],%g2 | |
1476 | cmp %g3,%g2 ! %f2 = ff2f5de4 ea11b213 | |
1477 | bne %xcc,p0_freg_check_fail | |
1478 | mov 0xf02,%g1 | |
1479 | ldx [%g4+0x58],%g3 | |
1480 | std %f4,[%g4] | |
1481 | ldx [%g4],%g2 | |
1482 | cmp %g3,%g2 ! %f4 = 99a6fa7b c6e7a17a | |
1483 | bne %xcc,p0_freg_check_fail | |
1484 | mov 0xf04,%g1 | |
1485 | ldx [%g4+0x60],%g3 | |
1486 | std %f6,[%g4] | |
1487 | ldx [%g4],%g2 | |
1488 | cmp %g3,%g2 ! %f6 = 2396c122 6e000000 | |
1489 | bne %xcc,p0_freg_check_fail | |
1490 | mov 0xf06,%g1 | |
1491 | ||
1492 | ! Check Point 6 completed | |
1493 | ||
1494 | ||
1495 | p0_label_31: | |
1496 | ! Mem[0000000010081410] = 6dc55018 000000dd, %l2 = ffffffff, %l3 = efff740a | |
1497 | ldda [%i2+%o5]0x88,%l2 ! %l2 = 00000000000000dd 000000006dc55018 | |
1498 | ! Mem[0000000030001410] = 6dc55018 ffffffff, %l6 = 99a6fa7b, %l7 = ffffffca | |
1499 | ldda [%i0+%o5]0x89,%l6 ! %l6 = 00000000ffffffff 000000006dc55018 | |
1500 | ! Mem[0000000010181410] = 45269cc7, %l1 = 00000000d6f06643 | |
1501 | ldsba [%i6+%o5]0x80,%l1 ! %l1 = 0000000000000045 | |
1502 | ! Mem[0000000010181408] = 61000000, %l0 = 000000000000006e | |
1503 | ldsba [%i6+%o4]0x80,%l0 ! %l0 = 0000000000000061 | |
1504 | ! Mem[0000000030141410] = c01048ff, %l4 = 000000000000ff00 | |
1505 | lduba [%i5+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
1506 | ! Mem[0000000030001400] = 99a6fa7b, %l2 = 00000000000000dd | |
1507 | ldsha [%i0+%g0]0x89,%l2 ! %l2 = fffffffffffffa7b | |
1508 | ! Mem[0000000010081410] = 000000dd, %l7 = 000000006dc55018 | |
1509 | lduha [%i2+%o5]0x88,%l7 ! %l7 = 00000000000000dd | |
1510 | ! Mem[00000000100c1400] = a46f74ff, %l6 = 00000000ffffffff | |
1511 | lduha [%i3+%g0]0x88,%l6 ! %l6 = 00000000000074ff | |
1512 | ! Mem[00000000300c1400] = 424300ff, %l1 = 0000000000000045 | |
1513 | ldswa [%i3+%g0]0x89,%l1 ! %l1 = 00000000424300ff | |
1514 | ! Starting 10 instruction Store Burst | |
1515 | ! %l1 = 00000000424300ff, Mem[0000000010001408] = e76e87d9 | |
1516 | stha %l1,[%i0+%o4]0x88 ! Mem[0000000010001408] = e76e00ff | |
1517 | ||
1518 | p0_label_32: | |
1519 | ! Mem[0000000010141410] = 1b849726, %l3 = 000000006dc55018 | |
1520 | ldstuba [%i5+%o5]0x80,%l3 ! %l3 = 0000001b000000ff | |
1521 | ! Mem[00000000100c1400] = a46f74ff, %l5 = 0000000000000000 | |
1522 | swapa [%i3+%g0]0x88,%l5 ! %l5 = 00000000a46f74ff | |
1523 | ! Mem[0000000030081400] = e6dd9cf1, %l1 = 00000000424300ff | |
1524 | ldstuba [%i2+%g0]0x81,%l1 ! %l1 = 000000e6000000ff | |
1525 | ! %f30 = 5205b393 20e3dee5, Mem[0000000010041410] = 6e000000 00000000 | |
1526 | stda %f30,[%i1+0x010]%asi ! Mem[0000000010041410] = 5205b393 20e3dee5 | |
1527 | ! %f10 = cc4084ed b5fce6ee, Mem[00000000300c1400] = 424300ff ebcc11ce | |
1528 | stda %f10,[%i3+%g0]0x89 ! Mem[00000000300c1400] = cc4084ed b5fce6ee | |
1529 | ! %f6 = 2396c122 6e000000, %l1 = 00000000000000e6 | |
1530 | ! Mem[0000000010141430] = 7e79ac25888dca7a | |
1531 | add %i5,0x030,%g1 | |
1532 | stda %f6,[%g1+%l1]ASI_PST8_PL ! Mem[0000000010141430] = 7e00002588c19623 | |
1533 | ! %l0 = 0000000000000061, Mem[00000000300c1410] = ffff9cf1 | |
1534 | stwa %l0,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 00000061 | |
1535 | ! %l6 = 00000000000074ff, Mem[0000000030141400] = d7988abaf7715b3a | |
1536 | stxa %l6,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000000074ff | |
1537 | ! %l4 = 000000ff, %l5 = a46f74ff, Mem[0000000030001400] = 7bfaa699 dcc734d0 | |
1538 | stda %l4,[%i0+%g0]0x81 ! Mem[0000000030001400] = 000000ff a46f74ff | |
1539 | ! Starting 10 instruction Load Burst | |
1540 | ! Mem[00000000100c1408] = 00000000, %l5 = 00000000a46f74ff | |
1541 | lduwa [%i3+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
1542 | ||
1543 | p0_label_33: | |
1544 | ! Mem[0000000010101404] = bc4ed19b, %l2 = fffffffffffffa7b | |
1545 | lduha [%i4+0x006]%asi,%l2 ! %l2 = 000000000000d19b | |
1546 | ! Mem[0000000010141400] = 22c19623, %l4 = 00000000000000ff | |
1547 | lduwa [%i5+%g0]0x88,%l4 ! %l4 = 0000000022c19623 | |
1548 | ! Mem[0000000030001410] = 6dc55018 ffffffff, %l0 = 00000061, %l1 = 000000e6 | |
1549 | ldda [%i0+%o5]0x89,%l0 ! %l0 = 00000000ffffffff 000000006dc55018 | |
1550 | ! Mem[00000000100c1400] = 00000000, %l5 = 0000000000000000 | |
1551 | ldsha [%i3+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
1552 | ! Mem[0000000010141410] = 269784ff, %f16 = ff00006e | |
1553 | lda [%i5+%o5]0x88,%f16 ! %f16 = 269784ff | |
1554 | ! Mem[00000000100c1408] = 0000000000000000, %l3 = 000000000000001b | |
1555 | ldxa [%i3+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
1556 | ! Mem[00000000300c1410] = 61000000ffffffd9, %l0 = 00000000ffffffff | |
1557 | ldxa [%i3+%o5]0x81,%l0 ! %l0 = 61000000ffffffd9 | |
1558 | ! Mem[0000000010081400] = 00000000 d160e6ca, %l6 = 000074ff, %l7 = 000000dd | |
1559 | ldda [%i2+%g0]0x88,%l6 ! %l6 = 00000000d160e6ca 0000000000000000 | |
1560 | ! Mem[0000000030001410] = 6dc55018ffffffff, %f2 = ff2f5de4 ea11b213 | |
1561 | ldda [%i0+%o5]0x89,%f2 ! %f2 = 6dc55018 ffffffff | |
1562 | ! Starting 10 instruction Store Burst | |
1563 | ! %l7 = 0000000000000000, Mem[0000000030041408] = 000000ff | |
1564 | stha %l7,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000000 | |
1565 | ||
1566 | p0_label_34: | |
1567 | ! Mem[0000000010141408] = b3563cc0, %l3 = 0000000000000000 | |
1568 | swapa [%i5+%o4]0x88,%l3 ! %l3 = 00000000b3563cc0 | |
1569 | ! Mem[0000000010081400] = cae660d1, %l7 = 0000000000000000 | |
1570 | ldstuba [%i2+%g0]0x80,%l7 ! %l7 = 000000ca000000ff | |
1571 | ! %l7 = 00000000000000ca, Mem[0000000030081408] = ea11b213 | |
1572 | stba %l7,[%i2+%o4]0x89 ! Mem[0000000030081408] = ea11b2ca | |
1573 | ! %l3 = 00000000b3563cc0, Mem[0000000020800000] = 6fff0db6, %asi = 80 | |
1574 | stba %l3,[%o1+0x000]%asi ! Mem[0000000020800000] = c0ff0db6 | |
1575 | ! Mem[0000000010181408] = 61000000, %l3 = 00000000b3563cc0 | |
1576 | swapa [%i6+%o4]0x80,%l3 ! %l3 = 0000000061000000 | |
1577 | ! Mem[00000000300c1410] = 00000061, %l0 = 61000000ffffffd9 | |
1578 | swapa [%i3+%o5]0x89,%l0 ! %l0 = 0000000000000061 | |
1579 | ! %l4 = 0000000022c19623, Mem[00000000218001c0] = 4a84fa38 | |
1580 | sth %l4,[%o3+0x1c0] ! Mem[00000000218001c0] = 9623fa38 | |
1581 | ! %l6 = 00000000d160e6ca, Mem[0000000010081408] = 00000000 | |
1582 | stha %l6,[%i2+%o4]0x88 ! Mem[0000000010081408] = 0000e6ca | |
1583 | ! %f22 = c90a8ea5, Mem[0000000030001400] = 000000ff | |
1584 | sta %f22,[%i0+%g0]0x81 ! Mem[0000000030001400] = c90a8ea5 | |
1585 | ! Starting 10 instruction Load Burst | |
1586 | ! Mem[00000000211c0000] = ff00fe0c, %l2 = 000000000000d19b | |
1587 | ldsh [%o2+%g0],%l2 ! %l2 = ffffffffffffff00 | |
1588 | ||
1589 | p0_label_35: | |
1590 | ! Mem[0000000030181408] = ff2f5de4 ea11b213, %l2 = ffffff00, %l3 = 61000000 | |
1591 | ldda [%i6+%o4]0x81,%l2 ! %l2 = 00000000ff2f5de4 00000000ea11b213 | |
1592 | ! Mem[00000000300c1400] = eee6fcb5ed8440cc, %f4 = 99a6fa7b c6e7a17a | |
1593 | ldda [%i3+%g0]0x81,%f4 ! %f4 = eee6fcb5 ed8440cc | |
1594 | ! Mem[0000000010041410] = 5205b39320e3dee5, %f6 = 2396c122 6e000000 | |
1595 | ldda [%i1+0x010]%asi,%f6 ! %f6 = 5205b393 20e3dee5 | |
1596 | ! Mem[0000000010101414] = 1a008d84, %l1 = 000000006dc55018 | |
1597 | lduw [%i4+0x014],%l1 ! %l1 = 000000001a008d84 | |
1598 | membar #Sync ! Added by membar checker (9) | |
1599 | ! Mem[0000000010001400] = c9080000 6d1dd03f ff006ee7 77aa02f1 | |
1600 | ! Mem[0000000010001410] = 016c83ca caffffff d9876ee7 f8d13fed | |
1601 | ! Mem[0000000010001420] = 9012a1e5 d5706d98 faa3f94d a309ade0 | |
1602 | ! Mem[0000000010001430] = f28a2c5e ffb8ffb0 362d08c9 d7428e9c | |
1603 | ldda [%i0]ASI_BLK_PL,%f0 ! Block Load from 0000000010001400 | |
1604 | ! Mem[0000000010081400] = ffe660d1, %l5 = 0000000000000000 | |
1605 | ldswa [%i2+%g0]0x80,%l5 ! %l5 = ffffffffffe660d1 | |
1606 | ! Mem[00000000100c1428] = 82183f12 58460382, %l0 = 00000061, %l1 = 1a008d84 | |
1607 | ldd [%i3+0x028],%l0 ! %l0 = 0000000082183f12 0000000058460382 | |
1608 | ! Mem[0000000030001400] = ff746fa4a58e0ac9, %f20 = 000008c9 000000dd | |
1609 | ldda [%i0+%g0]0x89,%f20 ! %f20 = ff746fa4 a58e0ac9 | |
1610 | ! Mem[0000000030101408] = b4a1c3fe, %l5 = ffffffffffe660d1 | |
1611 | lduha [%i4+%o4]0x81,%l5 ! %l5 = 000000000000b4a1 | |
1612 | ! Starting 10 instruction Store Burst | |
1613 | ! %l3 = 00000000ea11b213, Mem[00000000100c1410] = 4243ff00 | |
1614 | stwa %l3,[%i3+%o5]0x88 ! Mem[00000000100c1410] = ea11b213 | |
1615 | ||
1616 | ! Check Point 7 for processor 0 | |
1617 | ||
1618 | set p0_check_pt_data_7,%g4 | |
1619 | rd %ccr,%g5 ! %g5 = 44 | |
1620 | ldx [%g4+0x08],%g2 | |
1621 | cmp %l0,%g2 ! %l0 = 0000000082183f12 | |
1622 | bne %xcc,p0_reg_check_fail0 | |
1623 | mov 0xee0,%g1 | |
1624 | ldx [%g4+0x10],%g2 | |
1625 | cmp %l1,%g2 ! %l1 = 0000000058460382 | |
1626 | bne %xcc,p0_reg_check_fail1 | |
1627 | mov 0xee1,%g1 | |
1628 | ldx [%g4+0x18],%g2 | |
1629 | cmp %l2,%g2 ! %l2 = 00000000ff2f5de4 | |
1630 | bne %xcc,p0_reg_check_fail2 | |
1631 | mov 0xee2,%g1 | |
1632 | ldx [%g4+0x20],%g2 | |
1633 | cmp %l3,%g2 ! %l3 = 00000000ea11b213 | |
1634 | bne %xcc,p0_reg_check_fail3 | |
1635 | mov 0xee3,%g1 | |
1636 | ldx [%g4+0x28],%g2 | |
1637 | cmp %l4,%g2 ! %l4 = 0000000022c19623 | |
1638 | bne %xcc,p0_reg_check_fail4 | |
1639 | mov 0xee4,%g1 | |
1640 | ldx [%g4+0x30],%g2 | |
1641 | cmp %l5,%g2 ! %l5 = 000000000000b4a1 | |
1642 | bne %xcc,p0_reg_check_fail5 | |
1643 | mov 0xee5,%g1 | |
1644 | ldx [%g4+0x38],%g2 | |
1645 | cmp %l6,%g2 ! %l6 = 00000000d160e6ca | |
1646 | bne %xcc,p0_reg_check_fail6 | |
1647 | mov 0xee6,%g1 | |
1648 | ldx [%g4+0x40],%g2 | |
1649 | cmp %l7,%g2 ! %l7 = 00000000000000ca | |
1650 | bne %xcc,p0_reg_check_fail7 | |
1651 | mov 0xee7,%g1 | |
1652 | ldx [%g4+0x48],%g3 | |
1653 | std %f0,[%g4] | |
1654 | ldx [%g4],%g2 | |
1655 | cmp %g3,%g2 ! %f0 = 3fd01d6d 000008c9 | |
1656 | bne %xcc,p0_freg_check_fail | |
1657 | mov 0xf00,%g1 | |
1658 | ldx [%g4+0x50],%g3 | |
1659 | std %f2,[%g4] | |
1660 | ldx [%g4],%g2 | |
1661 | cmp %g3,%g2 ! %f2 = f102aa77 e76e00ff | |
1662 | bne %xcc,p0_freg_check_fail | |
1663 | mov 0xf02,%g1 | |
1664 | ldx [%g4+0x58],%g3 | |
1665 | std %f4,[%g4] | |
1666 | ldx [%g4],%g2 | |
1667 | cmp %g3,%g2 ! %f4 = ffffffca ca836c01 | |
1668 | bne %xcc,p0_freg_check_fail | |
1669 | mov 0xf04,%g1 | |
1670 | ldx [%g4+0x60],%g3 | |
1671 | std %f6,[%g4] | |
1672 | ldx [%g4],%g2 | |
1673 | cmp %g3,%g2 ! %f6 = ed3fd1f8 e76e87d9 | |
1674 | bne %xcc,p0_freg_check_fail | |
1675 | mov 0xf06,%g1 | |
1676 | ldx [%g4+0x68],%g3 | |
1677 | std %f8,[%g4] | |
1678 | ldx [%g4],%g2 | |
1679 | cmp %g3,%g2 ! %f8 = 986d70d5 e5a11290 | |
1680 | bne %xcc,p0_freg_check_fail | |
1681 | mov 0xf08,%g1 | |
1682 | ldx [%g4+0x70],%g3 | |
1683 | std %f10,[%g4] | |
1684 | ldx [%g4],%g2 | |
1685 | cmp %g3,%g2 ! %f10 = e0ad09a3 4df9a3fa | |
1686 | bne %xcc,p0_freg_check_fail | |
1687 | mov 0xf10,%g1 | |
1688 | ldx [%g4+0x78],%g3 | |
1689 | std %f12,[%g4] | |
1690 | ldx [%g4],%g2 | |
1691 | cmp %g3,%g2 ! %f12 = b0ffb8ff 5e2c8af2 | |
1692 | bne %xcc,p0_freg_check_fail | |
1693 | mov 0xf12,%g1 | |
1694 | ldx [%g4+0x80],%g3 | |
1695 | std %f14,[%g4] | |
1696 | ldx [%g4],%g2 | |
1697 | cmp %g3,%g2 ! %f14 = 9c8e42d7 c9082d36 | |
1698 | bne %xcc,p0_freg_check_fail | |
1699 | mov 0xf14,%g1 | |
1700 | ldx [%g4+0x88],%g3 | |
1701 | std %f16,[%g4] | |
1702 | ldx [%g4],%g2 | |
1703 | cmp %g3,%g2 ! %f16 = 269784ff 0ac97a0f | |
1704 | bne %xcc,p0_freg_check_fail | |
1705 | mov 0xf16,%g1 | |
1706 | ldx [%g4+0x90],%g3 | |
1707 | std %f20,[%g4] | |
1708 | ldx [%g4],%g2 | |
1709 | cmp %g3,%g2 ! %f20 = ff746fa4 a58e0ac9 | |
1710 | bne %xcc,p0_freg_check_fail | |
1711 | mov 0xf20,%g1 | |
1712 | ||
1713 | ! Check Point 7 completed | |
1714 | ||
1715 | ||
1716 | p0_label_36: | |
1717 | ! %l5 = 000000000000b4a1, Mem[0000000030041410] = dd000000c9080000 | |
1718 | stxa %l5,[%i1+%o5]0x89 ! Mem[0000000030041410] = 000000000000b4a1 | |
1719 | ! %l2 = 00000000ff2f5de4, Mem[0000000030041410] = a1b40000 | |
1720 | stba %l2,[%i1+%o5]0x81 ! Mem[0000000030041410] = e4b40000 | |
1721 | ! %f6 = ed3fd1f8 e76e87d9, %l1 = 0000000058460382 | |
1722 | ! Mem[0000000010101420] = 53e63730aa2bd2c4 | |
1723 | add %i4,0x020,%g1 | |
1724 | stda %f6,[%g1+%l1]ASI_PST32_P ! Mem[0000000010101420] = ed3fd1f8aa2bd2c4 | |
1725 | membar #Sync ! Added by membar checker (10) | |
1726 | ! %f28 = 8ed62c03, Mem[0000000010001400] = c9080000 | |
1727 | sta %f28,[%i0+%g0]0x80 ! Mem[0000000010001400] = 8ed62c03 | |
1728 | ! Mem[00000000100c1408] = 00000000, %l1 = 0000000058460382 | |
1729 | swapa [%i3+%o4]0x88,%l1 ! %l1 = 0000000000000000 | |
1730 | ! %l5 = 000000000000b4a1, Mem[0000000020800040] = 97ff9ffa, %asi = 80 | |
1731 | stha %l5,[%o1+0x040]%asi ! Mem[0000000020800040] = b4a19ffa | |
1732 | ! Mem[0000000010041413] = 5205b393, %l5 = 000000000000b4a1 | |
1733 | ldstuba [%i1+0x013]%asi,%l5 ! %l5 = 00000093000000ff | |
1734 | ! %f10 = e0ad09a3 4df9a3fa, Mem[0000000010141400] = 22c19623 0000006e | |
1735 | stda %f10,[%i5+%g0]0x88 ! Mem[0000000010141400] = e0ad09a3 4df9a3fa | |
1736 | ! %l4 = 0000000022c19623, Mem[0000000010041410] = ffb30552 | |
1737 | stha %l4,[%i1+%o5]0x88 ! Mem[0000000010041410] = ffb39623 | |
1738 | ! Starting 10 instruction Load Burst | |
1739 | ! Mem[0000000010041410] = 2396b3ff20e3dee5, %l3 = 00000000ea11b213 | |
1740 | ldxa [%i1+%o5]0x80,%l3 ! %l3 = 2396b3ff20e3dee5 | |
1741 | ||
1742 | p0_label_37: | |
1743 | ! Mem[0000000030141410] = ff4810c0, %l4 = 0000000022c19623 | |
1744 | ldsba [%i5+%o5]0x81,%l4 ! %l4 = ffffffffffffffff | |
1745 | ! Mem[0000000030141408] = ba8a98d7, %l2 = 00000000ff2f5de4 | |
1746 | ldsba [%i5+%o4]0x81,%l2 ! %l2 = ffffffffffffffba | |
1747 | ! Mem[0000000010181400] = bccdb411, %l6 = 00000000d160e6ca | |
1748 | lduwa [%i6+%g0]0x80,%l6 ! %l6 = 00000000bccdb411 | |
1749 | ! Mem[000000001004142c] = 33c4a113, %l4 = ffffffffffffffff | |
1750 | lduw [%i1+0x02c],%l4 ! %l4 = 0000000033c4a113 | |
1751 | ! Mem[0000000010001408] = f102aa77 e76e00ff, %l0 = 82183f12, %l1 = 00000000 | |
1752 | ldda [%i0+%o4]0x88,%l0 ! %l0 = 00000000e76e00ff 00000000f102aa77 | |
1753 | ! Mem[0000000010101410] = ffffffff1a008d84, %f4 = ffffffca ca836c01 | |
1754 | ldda [%i4+%o5]0x80,%f4 ! %f4 = ffffffff 1a008d84 | |
1755 | ! Mem[0000000030181408] = 13b211ea e45d2fff, %l2 = ffffffba, %l3 = 20e3dee5 | |
1756 | ldda [%i6+%o4]0x89,%l2 ! %l2 = 00000000e45d2fff 0000000013b211ea | |
1757 | ! Mem[0000000010181418] = ca93dcbf e2f66f18, %l6 = bccdb411, %l7 = 000000ca | |
1758 | ldda [%i6+0x018]%asi,%l6 ! %l6 = 00000000ca93dcbf 00000000e2f66f18 | |
1759 | ! Mem[0000000010041418] = ca93dcbfe2f66f18, %f22 = c90a8ea5 3eec125e | |
1760 | ldda [%i1+0x018]%asi,%f22 ! %f22 = ca93dcbf e2f66f18 | |
1761 | ! Starting 10 instruction Store Burst | |
1762 | ! %f7 = e76e87d9, Mem[0000000010001408] = ff006ee7 | |
1763 | sta %f7 ,[%i0+%o4]0x80 ! Mem[0000000010001408] = e76e87d9 | |
1764 | ||
1765 | p0_label_38: | |
1766 | ! Mem[0000000010181400] = bccdb411, %l1 = 00000000f102aa77 | |
1767 | swapa [%i6+%g0]0x80,%l1 ! %l1 = 00000000bccdb411 | |
1768 | ! %f16 = 269784ff 0ac97a0f ff000000 00000000 | |
1769 | ! %f20 = ff746fa4 a58e0ac9 ca93dcbf e2f66f18 | |
1770 | ! %f24 = 0f105c1a ed13eb1e 3d8bd50d 767d008b | |
1771 | ! %f28 = 8ed62c03 37e2e09e 5205b393 20e3dee5 | |
1772 | stda %f16,[%i3]ASI_BLK_AIUP ! Block Store to 00000000100c1400 | |
1773 | ! Mem[0000000010001400] = 032cd68e, %l2 = 00000000e45d2fff | |
1774 | swapa [%i0+%g0]0x88,%l2 ! %l2 = 00000000032cd68e | |
1775 | ! Mem[0000000010101408] = 740a1893, %f9 = e5a11290 | |
1776 | lda [%i4+%o4]0x80,%f9 ! %f9 = 740a1893 | |
1777 | ! %l4 = 33c4a113, %l5 = 00000093, Mem[0000000030101410] = 00000000 26000000 | |
1778 | stda %l4,[%i4+%o5]0x89 ! Mem[0000000030101410] = 33c4a113 00000093 | |
1779 | ! %l5 = 0000000000000093, Mem[00000000300c1410] = ffffffd9 | |
1780 | stha %l5,[%i3+%o5]0x89 ! Mem[00000000300c1410] = ffff0093 | |
1781 | ! Mem[0000000030141408] = ba8a98d7, %l1 = 00000000bccdb411 | |
1782 | ldstuba [%i5+%o4]0x81,%l1 ! %l1 = 000000ba000000ff | |
1783 | ! %f0 = 3fd01d6d 000008c9 f102aa77 e76e00ff | |
1784 | ! %f4 = ffffffff 1a008d84 ed3fd1f8 e76e87d9 | |
1785 | ! %f8 = 986d70d5 740a1893 e0ad09a3 4df9a3fa | |
1786 | ! %f12 = b0ffb8ff 5e2c8af2 9c8e42d7 c9082d36 | |
1787 | stda %f0,[%i4]ASI_BLK_AIUPL ! Block Store to 0000000010101400 | |
1788 | ! %f20 = ff746fa4 a58e0ac9, Mem[0000000030181400] = ba8a98d7 ae6e0959 | |
1789 | stda %f20,[%i6+%g0]0x81 ! Mem[0000000030181400] = ff746fa4 a58e0ac9 | |
1790 | ! Starting 10 instruction Load Burst | |
1791 | ! Mem[00000000211c0000] = ff00fe0c, %l6 = 00000000ca93dcbf | |
1792 | ldsb [%o2+0x001],%l6 ! %l6 = 0000000000000000 | |
1793 | ||
1794 | p0_label_39: | |
1795 | ! Mem[0000000010141410] = ff849726a695a673, %f22 = ca93dcbf e2f66f18 | |
1796 | ldda [%i5+%o5]0x80,%f22 ! %f22 = ff849726 a695a673 | |
1797 | ! Mem[0000000010181420] = 2ce65c7f 4d072a78, %l6 = 00000000, %l7 = e2f66f18 | |
1798 | ldda [%i6+0x020]%asi,%l6 ! %l6 = 000000002ce65c7f 000000004d072a78 | |
1799 | ! Mem[0000000010001400] = e45d2fff, %l7 = 000000004d072a78 | |
1800 | ldswa [%i0+%g0]0x88,%l7 ! %l7 = ffffffffe45d2fff | |
1801 | ! Mem[0000000030041408] = 0000000000000000, %f22 = ff849726 a695a673 | |
1802 | ldda [%i1+%o4]0x81,%f22 ! %f22 = 00000000 00000000 | |
1803 | ! Mem[0000000010141410] = 269784ff, %l4 = 0000000033c4a113 | |
1804 | lduha [%i5+%o5]0x88,%l4 ! %l4 = 00000000000084ff | |
1805 | ! Mem[0000000010141410] = ff849726a695a673, %l2 = 00000000032cd68e | |
1806 | ldxa [%i5+0x010]%asi,%l2 ! %l2 = ff849726a695a673 | |
1807 | ! Mem[0000000010081404] = 00000000, %l6 = 000000002ce65c7f | |
1808 | lduw [%i2+0x004],%l6 ! %l6 = 0000000000000000 | |
1809 | ! Mem[00000000300c1410] = 9300ffff, %f16 = 269784ff | |
1810 | lda [%i3+%o5]0x81,%f16 ! %f16 = 9300ffff | |
1811 | ! Mem[0000000030181400] = c90a8ea5a46f74ff, %f16 = 9300ffff 0ac97a0f | |
1812 | ldda [%i6+%g0]0x89,%f16 ! %f16 = c90a8ea5 a46f74ff | |
1813 | ! Starting 10 instruction Store Burst | |
1814 | ! %l7 = ffffffffe45d2fff, Mem[00000000100c1408] = ff00000000000000 | |
1815 | stxa %l7,[%i3+%o4]0x80 ! Mem[00000000100c1408] = ffffffffe45d2fff | |
1816 | ||
1817 | p0_label_40: | |
1818 | ! %l2 = ff849726a695a673, Mem[0000000010041410] = ffb39623 | |
1819 | stha %l2,[%i1+%o5]0x88 ! Mem[0000000010041410] = ffb3a673 | |
1820 | ! %f20 = ff746fa4 a58e0ac9, %l3 = 0000000013b211ea | |
1821 | ! Mem[0000000010181408] = b3563cc0e76e87d9 | |
1822 | add %i6,0x008,%g1 | |
1823 | stda %f20,[%g1+%l3]ASI_PST16_P ! Mem[0000000010181408] = ff743cc0a58e87d9 | |
1824 | ! %l2 = ff849726a695a673, Mem[0000000030101410] = 0000009333c4a113 | |
1825 | stxa %l2,[%i4+%o5]0x89 ! Mem[0000000030101410] = ff849726a695a673 | |
1826 | ! Mem[00000000211c0001] = ff00fe0c, %l0 = 00000000e76e00ff | |
1827 | ldstuba [%o2+0x001]%asi,%l0 ! %l0 = 00000000000000ff | |
1828 | membar #Sync ! Added by membar checker (11) | |
1829 | ! Mem[0000000010101410] = 1a008d84, %l7 = ffffffffe45d2fff | |
1830 | ldstuba [%i4+%o5]0x88,%l7 ! %l7 = 00000084000000ff | |
1831 | ! %f29 = 37e2e09e, Mem[0000000030081408] = ea11b2ca | |
1832 | sta %f29,[%i2+%o4]0x89 ! Mem[0000000030081408] = 37e2e09e | |
1833 | ! %f2 = f102aa77 e76e00ff, Mem[00000000300c1400] = eee6fcb5 ed8440cc | |
1834 | stda %f2 ,[%i3+%g0]0x81 ! Mem[00000000300c1400] = f102aa77 e76e00ff | |
1835 | ! Mem[0000000010181400] = f102aa77, %l1 = 00000000000000ba | |
1836 | swapa [%i6+%g0]0x80,%l1 ! %l1 = 00000000f102aa77 | |
1837 | ! %l6 = 0000000000000000, Mem[0000000010001423] = 9012a1e5, %asi = 80 | |
1838 | stba %l6,[%i0+0x023]%asi ! Mem[0000000010001420] = 9012a100 | |
1839 | ! Starting 10 instruction Load Burst | |
1840 | ! Mem[0000000010141420] = 1651b55b 7a9afc2a, %l2 = a695a673, %l3 = 13b211ea | |
1841 | ldda [%i5+0x020]%asi,%l2 ! %l2 = 000000001651b55b 000000007a9afc2a | |
1842 | ||
1843 | ! Check Point 8 for processor 0 | |
1844 | ||
1845 | set p0_check_pt_data_8,%g4 | |
1846 | rd %ccr,%g5 ! %g5 = 44 | |
1847 | ldx [%g4+0x08],%g2 | |
1848 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
1849 | bne %xcc,p0_reg_check_fail0 | |
1850 | mov 0xee0,%g1 | |
1851 | ldx [%g4+0x10],%g2 | |
1852 | cmp %l1,%g2 ! %l1 = 00000000f102aa77 | |
1853 | bne %xcc,p0_reg_check_fail1 | |
1854 | mov 0xee1,%g1 | |
1855 | ldx [%g4+0x18],%g2 | |
1856 | cmp %l2,%g2 ! %l2 = 000000001651b55b | |
1857 | bne %xcc,p0_reg_check_fail2 | |
1858 | mov 0xee2,%g1 | |
1859 | ldx [%g4+0x20],%g2 | |
1860 | cmp %l3,%g2 ! %l3 = 000000007a9afc2a | |
1861 | bne %xcc,p0_reg_check_fail3 | |
1862 | mov 0xee3,%g1 | |
1863 | ldx [%g4+0x28],%g2 | |
1864 | cmp %l4,%g2 ! %l4 = 00000000000084ff | |
1865 | bne %xcc,p0_reg_check_fail4 | |
1866 | mov 0xee4,%g1 | |
1867 | ldx [%g4+0x30],%g2 | |
1868 | cmp %l5,%g2 ! %l5 = 0000000000000093 | |
1869 | bne %xcc,p0_reg_check_fail5 | |
1870 | mov 0xee5,%g1 | |
1871 | ldx [%g4+0x38],%g2 | |
1872 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
1873 | bne %xcc,p0_reg_check_fail6 | |
1874 | mov 0xee6,%g1 | |
1875 | ldx [%g4+0x40],%g2 | |
1876 | cmp %l7,%g2 ! %l7 = 0000000000000084 | |
1877 | bne %xcc,p0_reg_check_fail7 | |
1878 | mov 0xee7,%g1 | |
1879 | ldx [%g4+0x48],%g3 | |
1880 | std %f0,[%g4] | |
1881 | ldx [%g4],%g2 | |
1882 | cmp %g3,%g2 ! %f0 = 3fd01d6d 000008c9 | |
1883 | bne %xcc,p0_freg_check_fail | |
1884 | mov 0xf00,%g1 | |
1885 | ldx [%g4+0x50],%g3 | |
1886 | std %f2,[%g4] | |
1887 | ldx [%g4],%g2 | |
1888 | cmp %g3,%g2 ! %f2 = f102aa77 e76e00ff | |
1889 | bne %xcc,p0_freg_check_fail | |
1890 | mov 0xf02,%g1 | |
1891 | ldx [%g4+0x58],%g3 | |
1892 | std %f4,[%g4] | |
1893 | ldx [%g4],%g2 | |
1894 | cmp %g3,%g2 ! %f4 = ffffffff 1a008d84 | |
1895 | bne %xcc,p0_freg_check_fail | |
1896 | mov 0xf04,%g1 | |
1897 | ldx [%g4+0x60],%g3 | |
1898 | std %f6,[%g4] | |
1899 | ldx [%g4],%g2 | |
1900 | cmp %g3,%g2 ! %f6 = ed3fd1f8 e76e87d9 | |
1901 | bne %xcc,p0_freg_check_fail | |
1902 | mov 0xf06,%g1 | |
1903 | ldx [%g4+0x68],%g3 | |
1904 | std %f8,[%g4] | |
1905 | ldx [%g4],%g2 | |
1906 | cmp %g3,%g2 ! %f8 = 986d70d5 740a1893 | |
1907 | bne %xcc,p0_freg_check_fail | |
1908 | mov 0xf08,%g1 | |
1909 | ldx [%g4+0x70],%g3 | |
1910 | std %f16,[%g4] | |
1911 | ldx [%g4],%g2 | |
1912 | cmp %g3,%g2 ! %f16 = c90a8ea5 a46f74ff | |
1913 | bne %xcc,p0_freg_check_fail | |
1914 | mov 0xf16,%g1 | |
1915 | ldx [%g4+0x78],%g3 | |
1916 | std %f22,[%g4] | |
1917 | ldx [%g4],%g2 | |
1918 | cmp %g3,%g2 ! %f22 = 00000000 00000000 | |
1919 | bne %xcc,p0_freg_check_fail | |
1920 | mov 0xf22,%g1 | |
1921 | ||
1922 | ! Check Point 8 completed | |
1923 | ||
1924 | ||
1925 | p0_label_41: | |
1926 | ! Mem[0000000010181408] = ff743cc0a58e87d9, %l1 = 00000000f102aa77 | |
1927 | ldxa [%i6+%o4]0x80,%l1 ! %l1 = ff743cc0a58e87d9 | |
1928 | ! Mem[0000000010081430] = 99a6fa7b, %l6 = 0000000000000000 | |
1929 | ldsha [%i2+0x032]%asi,%l6 ! %l6 = fffffffffffffa7b | |
1930 | ! Mem[0000000030101410] = a695a673, %l0 = 0000000000000000 | |
1931 | ldsha [%i4+%o5]0x89,%l0 ! %l0 = ffffffffffffa673 | |
1932 | ! Mem[0000000010001400] = 3fd01d6de45d2fff, %f16 = c90a8ea5 a46f74ff | |
1933 | ldda [%i0+%g0]0x88,%f16 ! %f16 = 3fd01d6d e45d2fff | |
1934 | ! Mem[0000000010141400] = faa3f94da309ade0, %l5 = 0000000000000093 | |
1935 | ldxa [%i5+0x000]%asi,%l5 ! %l5 = faa3f94da309ade0 | |
1936 | ! Mem[0000000010181408] = ff743cc0, %l4 = 00000000000084ff | |
1937 | ldsha [%i6+%o4]0x80,%l4 ! %l4 = ffffffffffffff74 | |
1938 | ! Mem[0000000010001410] = 016c83ca, %l1 = ff743cc0a58e87d9 | |
1939 | ldsha [%i0+%o5]0x80,%l1 ! %l1 = 000000000000016c | |
1940 | ! Mem[0000000010041400] = 7a260000, %l5 = faa3f94da309ade0 | |
1941 | lduha [%i1+%g0]0x80,%l5 ! %l5 = 0000000000007a26 | |
1942 | ! Mem[00000000100c1430] = 8ed62c03, %f25 = ed13eb1e | |
1943 | ld [%i3+0x030],%f25 ! %f25 = 8ed62c03 | |
1944 | ! Starting 10 instruction Store Burst | |
1945 | ! %l6 = fffffffffffffa7b, Mem[0000000010181430] = 4d30c046 | |
1946 | sth %l6,[%i6+0x030] ! Mem[0000000010181430] = fa7bc046 | |
1947 | ||
1948 | p0_label_42: | |
1949 | ! %f20 = ff746fa4 a58e0ac9, %l0 = ffffffffffffa673 | |
1950 | ! Mem[00000000100c1430] = 8ed62c0337e2e09e | |
1951 | add %i3,0x030,%g1 | |
1952 | stda %f20,[%g1+%l0]ASI_PST32_PL ! Mem[00000000100c1430] = c90a8ea5a46f74ff | |
1953 | ! %f12 = b0ffb8ff 5e2c8af2, %l7 = 0000000000000084 | |
1954 | ! Mem[0000000010001438] = 362d08c9d7428e9c | |
1955 | add %i0,0x038,%g1 | |
1956 | stda %f12,[%g1+%l7]ASI_PST16_PL ! Mem[0000000010001438] = 362d08c9ffb88e9c | |
1957 | ! Mem[0000000030181400] = ff746fa4, %l7 = 0000000000000084 | |
1958 | ldstuba [%i6+%g0]0x81,%l7 ! %l7 = 000000ff000000ff | |
1959 | ! %l4 = ffffffffffffff74, Mem[0000000010081408] = 0000e6ca | |
1960 | stha %l4,[%i2+%o4]0x88 ! Mem[0000000010081408] = 0000ff74 | |
1961 | ! Mem[0000000030041408] = 00000000, %l3 = 000000007a9afc2a | |
1962 | swapa [%i1+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
1963 | ! %f24 = 0f105c1a 8ed62c03, Mem[0000000010001410] = ca836c01 ffffffca | |
1964 | stda %f24,[%i0+%o5]0x88 ! Mem[0000000010001410] = 0f105c1a 8ed62c03 | |
1965 | ! Mem[0000000010041410] = 73a6b3ff, %l5 = 0000000000007a26 | |
1966 | swapa [%i1+%o5]0x80,%l5 ! %l5 = 0000000073a6b3ff | |
1967 | ! Mem[0000000030181410] = 99a6fa7b, %l2 = 000000001651b55b | |
1968 | swapa [%i6+%o5]0x81,%l2 ! %l2 = 0000000099a6fa7b | |
1969 | ! %f31 = 20e3dee5, Mem[00000000300c1408] = f19c003a | |
1970 | sta %f31,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 20e3dee5 | |
1971 | ! Starting 10 instruction Load Burst | |
1972 | ! Mem[0000000010001408] = e76e87d977aa02f1, %f8 = 986d70d5 740a1893 | |
1973 | ldda [%i0+%o4]0x80,%f8 ! %f8 = e76e87d9 77aa02f1 | |
1974 | ||
1975 | p0_label_43: | |
1976 | ! Mem[0000000030141408] = d7988aff, %f25 = 8ed62c03 | |
1977 | lda [%i5+%o4]0x89,%f25 ! %f25 = d7988aff | |
1978 | ! Mem[0000000030101400] = 00000000, %l0 = ffffffffffffa673 | |
1979 | lduha [%i4+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
1980 | ! Mem[0000000010001400] = e45d2fff, %l4 = ffffffffffffff74 | |
1981 | ldswa [%i0+%g0]0x88,%l4 ! %l4 = ffffffffe45d2fff | |
1982 | ! Mem[0000000030081408] = 37e2e09e, %l7 = 00000000000000ff | |
1983 | ldswa [%i2+%o4]0x89,%l7 ! %l7 = 0000000037e2e09e | |
1984 | ! Mem[0000000030081408] = 3a8a708a 37e2e09e, %l4 = e45d2fff, %l5 = 73a6b3ff | |
1985 | ldda [%i2+%o4]0x89,%l4 ! %l4 = 0000000037e2e09e 000000003a8a708a | |
1986 | ! Mem[0000000030181400] = ff746fa4a58e0ac9, %l4 = 0000000037e2e09e | |
1987 | ldxa [%i6+%g0]0x81,%l4 ! %l4 = ff746fa4a58e0ac9 | |
1988 | ! Mem[0000000010041408] = 73a695a6, %l5 = 000000003a8a708a | |
1989 | ldsha [%i1+%o4]0x80,%l5 ! %l5 = 00000000000073a6 | |
1990 | ! Mem[0000000020800040] = b4a19ffa, %l4 = ff746fa4a58e0ac9 | |
1991 | lduha [%o1+0x040]%asi,%l4 ! %l4 = 000000000000b4a1 | |
1992 | ! Mem[0000000010041408] = a695a673, %l0 = 0000000000000000 | |
1993 | ldsba [%i1+%o4]0x88,%l0 ! %l0 = 0000000000000073 | |
1994 | ! Starting 10 instruction Store Burst | |
1995 | ! Mem[0000000010141410] = 269784ff, %l2 = 0000000099a6fa7b | |
1996 | ldstuba [%i5+%o5]0x88,%l2 ! %l2 = 000000ff000000ff | |
1997 | ||
1998 | p0_label_44: | |
1999 | ! Mem[00000000100c1404] = 0ac97a0f, %l5 = 00000000000073a6 | |
2000 | ldstub [%i3+0x004],%l5 ! %l5 = 0000000a000000ff | |
2001 | ! %l2 = 000000ff, %l3 = 00000000, Mem[0000000010001408] = d9876ee7 f102aa77 | |
2002 | stda %l2,[%i0+%o4]0x88 ! Mem[0000000010001408] = 000000ff 00000000 | |
2003 | ! %l6 = fffffffffffffa7b, Mem[0000000030041400] = 0f7ac90a6e0000ff | |
2004 | stxa %l6,[%i1+%g0]0x89 ! Mem[0000000030041400] = fffffffffffffa7b | |
2005 | ! %l1 = 000000000000016c, Mem[0000000020800000] = c0ff0db6, %asi = 80 | |
2006 | stha %l1,[%o1+0x000]%asi ! Mem[0000000020800000] = 016c0db6 | |
2007 | ! %l7 = 0000000037e2e09e, Mem[0000000010041410] = 00007a26 | |
2008 | stha %l7,[%i1+%o5]0x80 ! Mem[0000000010041410] = e09e7a26 | |
2009 | ! %l7 = 0000000037e2e09e, Mem[0000000010001410] = 8ed62c03 | |
2010 | stba %l7,[%i0+%o5]0x88 ! Mem[0000000010001410] = 8ed62c9e | |
2011 | ! %l6 = fffffffffffffa7b, Mem[00000000201c0000] = e6ca1669 | |
2012 | sth %l6,[%o0+%g0] ! Mem[00000000201c0000] = fa7b1669 | |
2013 | ! %f16 = 3fd01d6d, Mem[0000000030181408] = e45d2fff | |
2014 | sta %f16,[%i6+%o4]0x89 ! Mem[0000000030181408] = 3fd01d6d | |
2015 | ! Mem[0000000010001400] = ff2f5de4, %l3 = 0000000000000000 | |
2016 | swapa [%i0+%g0]0x80,%l3 ! %l3 = 00000000ff2f5de4 | |
2017 | ! Starting 10 instruction Load Burst | |
2018 | ! Mem[0000000010101408] = f102aa77 e76e00ff, %l2 = 000000ff, %l3 = ff2f5de4 | |
2019 | ldda [%i4+%o4]0x88,%l2 ! %l2 = 00000000e76e00ff 00000000f102aa77 | |
2020 | ||
2021 | p0_label_45: | |
2022 | ! Mem[0000000010001404] = 6d1dd03f, %l3 = 00000000f102aa77 | |
2023 | lduw [%i0+0x004],%l3 ! %l3 = 000000006d1dd03f | |
2024 | membar #Sync ! Added by membar checker (12) | |
2025 | ! Mem[0000000010101400] = c9080000 6d1dd03f ff006ee7 77aa02f1 | |
2026 | ! Mem[0000000010101410] = ff8d001a ffffffff d9876ee7 f8d13fed | |
2027 | ! Mem[0000000010101420] = 93180a74 d5706d98 faa3f94d a309ade0 | |
2028 | ! Mem[0000000010101430] = f28a2c5e ffb8ffb0 362d08c9 d7428e9c | |
2029 | ldda [%i4]ASI_BLK_P,%f0 ! Block Load from 0000000010101400 | |
2030 | ! Mem[0000000030041410] = 0000b4e4, %l2 = 00000000e76e00ff | |
2031 | lduwa [%i1+%o5]0x89,%l2 ! %l2 = 000000000000b4e4 | |
2032 | ! Mem[0000000010041410] = 267a9ee0, %l6 = fffffffffffffa7b | |
2033 | lduwa [%i1+%o5]0x88,%l6 ! %l6 = 00000000267a9ee0 | |
2034 | ! Mem[0000000010141410] = 269784ff, %l6 = 00000000267a9ee0 | |
2035 | ldsba [%i5+%o5]0x88,%l6 ! %l6 = ffffffffffffffff | |
2036 | ! Mem[0000000010041400] = 0000267a, %l7 = 0000000037e2e09e | |
2037 | ldsba [%i1+%g0]0x88,%l7 ! %l7 = 000000000000007a | |
2038 | ! Mem[0000000030141400] = ff740000 00000000, %l0 = 00000073, %l1 = 0000016c | |
2039 | ldda [%i5+%g0]0x81,%l0 ! %l0 = 00000000ff740000 0000000000000000 | |
2040 | ! Mem[0000000010101408] = ff006ee7, %l3 = 000000006d1dd03f | |
2041 | ldsh [%i4+%o4],%l3 ! %l3 = ffffffffffffff00 | |
2042 | ! Mem[0000000010081410] = dd000000, %l2 = 000000000000b4e4 | |
2043 | ldswa [%i2+%o5]0x80,%l2 ! %l2 = ffffffffdd000000 | |
2044 | ! Starting 10 instruction Store Burst | |
2045 | ! %l7 = 000000000000007a, Mem[0000000010141408] = 00000000 | |
2046 | stba %l7,[%i5+%o4]0x80 ! Mem[0000000010141408] = 7a000000 | |
2047 | ||
2048 | ! Check Point 9 for processor 0 | |
2049 | ||
2050 | set p0_check_pt_data_9,%g4 | |
2051 | rd %ccr,%g5 ! %g5 = 44 | |
2052 | ldx [%g4+0x08],%g2 | |
2053 | cmp %l0,%g2 ! %l0 = 00000000ff740000 | |
2054 | bne %xcc,p0_reg_check_fail0 | |
2055 | mov 0xee0,%g1 | |
2056 | ldx [%g4+0x10],%g2 | |
2057 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
2058 | bne %xcc,p0_reg_check_fail1 | |
2059 | mov 0xee1,%g1 | |
2060 | ldx [%g4+0x18],%g2 | |
2061 | cmp %l2,%g2 ! %l2 = ffffffffdd000000 | |
2062 | bne %xcc,p0_reg_check_fail2 | |
2063 | mov 0xee2,%g1 | |
2064 | ldx [%g4+0x20],%g2 | |
2065 | cmp %l3,%g2 ! %l3 = ffffffffffffff00 | |
2066 | bne %xcc,p0_reg_check_fail3 | |
2067 | mov 0xee3,%g1 | |
2068 | ldx [%g4+0x28],%g2 | |
2069 | cmp %l4,%g2 ! %l4 = 000000000000b4a1 | |
2070 | bne %xcc,p0_reg_check_fail4 | |
2071 | mov 0xee4,%g1 | |
2072 | ldx [%g4+0x30],%g2 | |
2073 | cmp %l5,%g2 ! %l5 = 000000000000000a | |
2074 | bne %xcc,p0_reg_check_fail5 | |
2075 | mov 0xee5,%g1 | |
2076 | ldx [%g4+0x38],%g2 | |
2077 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
2078 | bne %xcc,p0_reg_check_fail6 | |
2079 | mov 0xee6,%g1 | |
2080 | ldx [%g4+0x40],%g2 | |
2081 | cmp %l7,%g2 ! %l7 = 000000000000007a | |
2082 | bne %xcc,p0_reg_check_fail7 | |
2083 | mov 0xee7,%g1 | |
2084 | ldx [%g4+0x48],%g3 | |
2085 | std %f0,[%g4] | |
2086 | ldx [%g4],%g2 | |
2087 | cmp %g3,%g2 ! %f0 = c9080000 6d1dd03f | |
2088 | bne %xcc,p0_freg_check_fail | |
2089 | mov 0xf00,%g1 | |
2090 | ldx [%g4+0x50],%g3 | |
2091 | std %f2,[%g4] | |
2092 | ldx [%g4],%g2 | |
2093 | cmp %g3,%g2 ! %f2 = ff006ee7 77aa02f1 | |
2094 | bne %xcc,p0_freg_check_fail | |
2095 | mov 0xf02,%g1 | |
2096 | ldx [%g4+0x58],%g3 | |
2097 | std %f4,[%g4] | |
2098 | ldx [%g4],%g2 | |
2099 | cmp %g3,%g2 ! %f4 = ff8d001a ffffffff | |
2100 | bne %xcc,p0_freg_check_fail | |
2101 | mov 0xf04,%g1 | |
2102 | ldx [%g4+0x60],%g3 | |
2103 | std %f6,[%g4] | |
2104 | ldx [%g4],%g2 | |
2105 | cmp %g3,%g2 ! %f6 = d9876ee7 f8d13fed | |
2106 | bne %xcc,p0_freg_check_fail | |
2107 | mov 0xf06,%g1 | |
2108 | ldx [%g4+0x68],%g3 | |
2109 | std %f8,[%g4] | |
2110 | ldx [%g4],%g2 | |
2111 | cmp %g3,%g2 ! %f8 = 93180a74 d5706d98 | |
2112 | bne %xcc,p0_freg_check_fail | |
2113 | mov 0xf08,%g1 | |
2114 | ldx [%g4+0x70],%g3 | |
2115 | std %f10,[%g4] | |
2116 | ldx [%g4],%g2 | |
2117 | cmp %g3,%g2 ! %f10 = faa3f94d a309ade0 | |
2118 | bne %xcc,p0_freg_check_fail | |
2119 | mov 0xf10,%g1 | |
2120 | ldx [%g4+0x78],%g3 | |
2121 | std %f12,[%g4] | |
2122 | ldx [%g4],%g2 | |
2123 | cmp %g3,%g2 ! %f12 = f28a2c5e ffb8ffb0 | |
2124 | bne %xcc,p0_freg_check_fail | |
2125 | mov 0xf12,%g1 | |
2126 | ldx [%g4+0x80],%g3 | |
2127 | std %f14,[%g4] | |
2128 | ldx [%g4],%g2 | |
2129 | cmp %g3,%g2 ! %f14 = 362d08c9 d7428e9c | |
2130 | bne %xcc,p0_freg_check_fail | |
2131 | mov 0xf14,%g1 | |
2132 | ldx [%g4+0x88],%g3 | |
2133 | std %f16,[%g4] | |
2134 | ldx [%g4],%g2 | |
2135 | cmp %g3,%g2 ! %f16 = 3fd01d6d e45d2fff | |
2136 | bne %xcc,p0_freg_check_fail | |
2137 | mov 0xf16,%g1 | |
2138 | ldx [%g4+0x90],%g3 | |
2139 | std %f24,[%g4] | |
2140 | ldx [%g4],%g2 | |
2141 | cmp %g3,%g2 ! %f24 = 0f105c1a d7988aff | |
2142 | bne %xcc,p0_freg_check_fail | |
2143 | mov 0xf24,%g1 | |
2144 | ||
2145 | ! Check Point 9 completed | |
2146 | ||
2147 | ||
2148 | p0_label_46: | |
2149 | ! %l6 = ffffffffffffffff, Mem[0000000010081412] = dd000000, %asi = 80 | |
2150 | stha %l6,[%i2+0x012]%asi ! Mem[0000000010081410] = dd00ffff | |
2151 | ! Mem[0000000010181424] = 4d072a78, %l7 = 000000000000007a, %asi = 80 | |
2152 | swapa [%i6+0x024]%asi,%l7 ! %l7 = 000000004d072a78 | |
2153 | ! Mem[0000000010141434] = 88c19623, %l1 = 00000000, %l6 = ffffffff | |
2154 | add %i5,0x34,%g1 | |
2155 | casa [%g1]0x80,%l1,%l6 ! %l6 = 0000000088c19623 | |
2156 | ! %l7 = 000000004d072a78, Mem[0000000030081400] = ffdd9cf1427c860f | |
2157 | stxa %l7,[%i2+%g0]0x81 ! Mem[0000000030081400] = 000000004d072a78 | |
2158 | membar #Sync ! Added by membar checker (13) | |
2159 | ! %l5 = 000000000000000a, Mem[0000000010101410] = ff8d001a | |
2160 | stba %l5,[%i4+%o5]0x80 ! Mem[0000000010101410] = 0a8d001a | |
2161 | ! %f22 = 00000000, Mem[0000000030101410] = 73a695a6 | |
2162 | sta %f22,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00000000 | |
2163 | ! %l6 = 88c19623, %l7 = 4d072a78, Mem[0000000010181408] = c03c74ff d9878ea5 | |
2164 | stda %l6,[%i6+%o4]0x88 ! Mem[0000000010181408] = 88c19623 4d072a78 | |
2165 | ! Mem[0000000010181408] = 88c19623, %l2 = ffffffffdd000000 | |
2166 | ldstuba [%i6+%o4]0x88,%l2 ! %l2 = 00000023000000ff | |
2167 | ! %l5 = 000000000000000a, Mem[0000000010081408] = 74ff0000 | |
2168 | stba %l5,[%i2+%o4]0x80 ! Mem[0000000010081408] = 0aff0000 | |
2169 | ! Starting 10 instruction Load Burst | |
2170 | ! Mem[0000000010101400] = 000008c9, %f1 = 6d1dd03f | |
2171 | lda [%i4+%g0]0x88,%f1 ! %f1 = 000008c9 | |
2172 | ||
2173 | p0_label_47: | |
2174 | ! Mem[00000000218000c0] = 8ae24e2c, %l3 = ffffffffffffff00 | |
2175 | ldub [%o3+0x0c0],%l3 ! %l3 = 000000000000008a | |
2176 | ! Mem[00000000201c0000] = fa7b1669, %l3 = 000000000000008a | |
2177 | ldsb [%o0+0x001],%l3 ! %l3 = 000000000000007b | |
2178 | ! Mem[00000000201c0000] = fa7b1669, %l1 = 0000000000000000 | |
2179 | lduh [%o0+%g0],%l1 ! %l1 = 000000000000fa7b | |
2180 | ! Mem[0000000010001408] = 00000000 000000ff, %l2 = 00000023, %l3 = 0000007b | |
2181 | ldda [%i0+%o4]0x88,%l2 ! %l2 = 00000000000000ff 0000000000000000 | |
2182 | ! Mem[0000000030141410] = c01048ff, %l1 = 000000000000fa7b | |
2183 | ldswa [%i5+%o5]0x89,%l1 ! %l1 = ffffffffc01048ff | |
2184 | ! Mem[0000000030101400] = 00000000, %f29 = 37e2e09e | |
2185 | lda [%i4+%g0]0x81,%f29 ! %f29 = 00000000 | |
2186 | ! Mem[0000000010041410] = 267a9ee0, %l1 = ffffffffc01048ff | |
2187 | ldsba [%i1+%o5]0x88,%l1 ! %l1 = ffffffffffffffe0 | |
2188 | ! Mem[0000000030181400] = ff746fa4, %l2 = 00000000000000ff | |
2189 | lduha [%i6+%g0]0x81,%l2 ! %l2 = 000000000000ff74 | |
2190 | ! Mem[0000000010001418] = d9876ee7 f8d13fed, %l6 = 88c19623, %l7 = 4d072a78 | |
2191 | ldda [%i0+0x018]%asi,%l6 ! %l6 = 00000000d9876ee7 00000000f8d13fed | |
2192 | ! Starting 10 instruction Store Burst | |
2193 | ! Mem[0000000030141400] = 000074ff, %l7 = 00000000f8d13fed | |
2194 | swapa [%i5+%g0]0x89,%l7 ! %l7 = 00000000000074ff | |
2195 | ||
2196 | p0_label_48: | |
2197 | ! Mem[0000000010041414] = 20e3dee5, %l4 = 0000b4a1, %l7 = 000074ff | |
2198 | add %i1,0x14,%g1 | |
2199 | casa [%g1]0x80,%l4,%l7 ! %l7 = 0000000020e3dee5 | |
2200 | ! %f23 = 00000000, Mem[0000000010081400] = ffe660d1 | |
2201 | sta %f23,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 | |
2202 | ! %l2 = 000000000000ff74, Mem[0000000010101400] = c9080000 | |
2203 | stwa %l2,[%i4+%g0]0x80 ! Mem[0000000010101400] = 0000ff74 | |
2204 | ! %f28 = 8ed62c03 00000000, Mem[0000000010141408] = 7a000000 c681f136 | |
2205 | stda %f28,[%i5+%o4]0x80 ! Mem[0000000010141408] = 8ed62c03 00000000 | |
2206 | ! %l2 = 0000ff74, %l3 = 00000000, Mem[0000000010141408] = 032cd68e 00000000 | |
2207 | stda %l2,[%i5+%o4]0x88 ! Mem[0000000010141408] = 0000ff74 00000000 | |
2208 | ! %l6 = 00000000d9876ee7, Mem[00000000201c0001] = fa7b1669 | |
2209 | stb %l6,[%o0+0x001] ! Mem[00000000201c0000] = fae71669 | |
2210 | ! %f24 = 0f105c1a, Mem[00000000300c1410] = ffff0093 | |
2211 | sta %f24,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 0f105c1a | |
2212 | ! %l4 = 000000000000b4a1, Mem[0000000030141400] = ed3fd1f800000000 | |
2213 | stxa %l4,[%i5+%g0]0x81 ! Mem[0000000030141400] = 000000000000b4a1 | |
2214 | ! %l2 = 000000000000ff74, Mem[0000000010081400] = 0000000000000000 | |
2215 | stxa %l2,[%i2+%g0]0x80 ! Mem[0000000010081400] = 000000000000ff74 | |
2216 | ! Starting 10 instruction Load Burst | |
2217 | ! Mem[0000000010001410] = 8ed62c9e, %f2 = ff006ee7 | |
2218 | lda [%i0+%o5]0x88,%f2 ! %f2 = 8ed62c9e | |
2219 | ||
2220 | p0_label_49: | |
2221 | ! Mem[0000000010081408] = 0aff0000d9876ee7, %f8 = 93180a74 d5706d98 | |
2222 | ldda [%i2+%o4]0x80,%f8 ! %f8 = 0aff0000 d9876ee7 | |
2223 | ! Mem[0000000010141400] = faa3f94da309ade0, %l0 = 00000000ff740000 | |
2224 | ldxa [%i5+%g0]0x80,%l0 ! %l0 = faa3f94da309ade0 | |
2225 | ! Mem[0000000010041408] = a695a673, %l2 = 000000000000ff74 | |
2226 | lduwa [%i1+%o4]0x88,%l2 ! %l2 = 00000000a695a673 | |
2227 | ! Mem[0000000030141408] = d7988aff, %l4 = 000000000000b4a1 | |
2228 | lduba [%i5+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
2229 | ! Mem[0000000030181410] = 5bb55116, %f13 = ffb8ffb0 | |
2230 | lda [%i6+%o5]0x89,%f13 ! %f13 = 5bb55116 | |
2231 | ! Mem[00000000211c0000] = fffffe0c, %l2 = 00000000a695a673 | |
2232 | ldsha [%o2+0x000]%asi,%l2 ! %l2 = ffffffffffffffff | |
2233 | ! Mem[00000000100c1400] = ff849726, %l0 = faa3f94da309ade0 | |
2234 | lduwa [%i3+%g0]0x88,%l0 ! %l0 = 00000000ff849726 | |
2235 | ! Mem[00000000300c1408] = 20e3dee5, %l3 = 0000000000000000 | |
2236 | lduba [%i3+%o4]0x89,%l3 ! %l3 = 00000000000000e5 | |
2237 | ! Mem[00000000100c1400] = 269784ff, %l5 = 000000000000000a | |
2238 | lduba [%i3+%g0]0x80,%l5 ! %l5 = 0000000000000026 | |
2239 | ! Starting 10 instruction Store Burst | |
2240 | ! %f0 = c9080000 000008c9, Mem[0000000030181408] = 3fd01d6d 13b211ea | |
2241 | stda %f0 ,[%i6+%o4]0x89 ! Mem[0000000030181408] = c9080000 000008c9 | |
2242 | ||
2243 | p0_label_50: | |
2244 | ! %l1 = ffffffffffffffe0, Mem[0000000030101410] = 00000000 | |
2245 | stwa %l1,[%i4+%o5]0x89 ! Mem[0000000030101410] = ffffffe0 | |
2246 | ! %f10 = faa3f94d a309ade0, Mem[0000000030141400] = 00000000 0000b4a1 | |
2247 | stda %f10,[%i5+%g0]0x81 ! Mem[0000000030141400] = faa3f94d a309ade0 | |
2248 | ! %l3 = 00000000000000e5, Mem[00000000100c1400] = ff849726 | |
2249 | stha %l3,[%i3+%g0]0x88 ! Mem[00000000100c1400] = ff8400e5 | |
2250 | ! Mem[0000000021800081] = dda00b33, %l7 = 0000000020e3dee5 | |
2251 | ldstub [%o3+0x081],%l7 ! %l7 = 000000a0000000ff | |
2252 | ! %l4 = 00000000000000ff, Mem[00000000100c1408] = ffffffff | |
2253 | stha %l4,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00ffffff | |
2254 | ! %l4 = 000000ff, %l5 = 00000026, Mem[0000000010181410] = 45269cc7 389968e7 | |
2255 | stda %l4,[%i6+%o5]0x80 ! Mem[0000000010181410] = 000000ff 00000026 | |
2256 | ! %f21 = a58e0ac9, Mem[0000000010001410] = 8ed62c9e | |
2257 | sta %f21,[%i0+%o5]0x88 ! Mem[0000000010001410] = a58e0ac9 | |
2258 | ! %l2 = ffffffffffffffff, Mem[0000000030101408] = b4a1c3fe0000ff00 | |
2259 | stxa %l2,[%i4+%o4]0x81 ! Mem[0000000030101408] = ffffffffffffffff | |
2260 | ! Mem[00000000100c1400] = ff8400e5, %l4 = 00000000000000ff | |
2261 | ldstuba [%i3+%g0]0x88,%l4 ! %l4 = 000000e5000000ff | |
2262 | ! Starting 10 instruction Load Burst | |
2263 | ! Mem[0000000010081400] = 00000000, %l5 = 0000000000000026 | |
2264 | ldsba [%i2+0x001]%asi,%l5 ! %l5 = 0000000000000000 | |
2265 | ||
2266 | ! Check Point 10 for processor 0 | |
2267 | ||
2268 | set p0_check_pt_data_10,%g4 | |
2269 | rd %ccr,%g5 ! %g5 = 44 | |
2270 | ldx [%g4+0x08],%g2 | |
2271 | cmp %l0,%g2 ! %l0 = 00000000ff849726 | |
2272 | bne %xcc,p0_reg_check_fail0 | |
2273 | mov 0xee0,%g1 | |
2274 | ldx [%g4+0x10],%g2 | |
2275 | cmp %l1,%g2 ! %l1 = ffffffffffffffe0 | |
2276 | bne %xcc,p0_reg_check_fail1 | |
2277 | mov 0xee1,%g1 | |
2278 | ldx [%g4+0x18],%g2 | |
2279 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
2280 | bne %xcc,p0_reg_check_fail2 | |
2281 | mov 0xee2,%g1 | |
2282 | ldx [%g4+0x20],%g2 | |
2283 | cmp %l3,%g2 ! %l3 = 00000000000000e5 | |
2284 | bne %xcc,p0_reg_check_fail3 | |
2285 | mov 0xee3,%g1 | |
2286 | ldx [%g4+0x28],%g2 | |
2287 | cmp %l4,%g2 ! %l4 = 00000000000000e5 | |
2288 | bne %xcc,p0_reg_check_fail4 | |
2289 | mov 0xee4,%g1 | |
2290 | ldx [%g4+0x30],%g2 | |
2291 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
2292 | bne %xcc,p0_reg_check_fail5 | |
2293 | mov 0xee5,%g1 | |
2294 | ldx [%g4+0x38],%g2 | |
2295 | cmp %l7,%g2 ! %l7 = 00000000000000a0 | |
2296 | bne %xcc,p0_reg_check_fail7 | |
2297 | mov 0xee7,%g1 | |
2298 | ldx [%g4+0x40],%g3 | |
2299 | std %f0,[%g4] | |
2300 | ldx [%g4],%g2 | |
2301 | cmp %g3,%g2 ! %f0 = c9080000 000008c9 | |
2302 | bne %xcc,p0_freg_check_fail | |
2303 | mov 0xf00,%g1 | |
2304 | ldx [%g4+0x48],%g3 | |
2305 | std %f2,[%g4] | |
2306 | ldx [%g4],%g2 | |
2307 | cmp %g3,%g2 ! %f2 = 8ed62c9e 77aa02f1 | |
2308 | bne %xcc,p0_freg_check_fail | |
2309 | mov 0xf02,%g1 | |
2310 | ldx [%g4+0x50],%g3 | |
2311 | std %f6,[%g4] | |
2312 | ldx [%g4],%g2 | |
2313 | cmp %g3,%g2 ! %f6 = d9876ee7 f8d13fed | |
2314 | bne %xcc,p0_freg_check_fail | |
2315 | mov 0xf06,%g1 | |
2316 | ldx [%g4+0x58],%g3 | |
2317 | std %f8,[%g4] | |
2318 | ldx [%g4],%g2 | |
2319 | cmp %g3,%g2 ! %f8 = 0aff0000 d9876ee7 | |
2320 | bne %xcc,p0_freg_check_fail | |
2321 | mov 0xf08,%g1 | |
2322 | ldx [%g4+0x60],%g3 | |
2323 | std %f12,[%g4] | |
2324 | ldx [%g4],%g2 | |
2325 | cmp %g3,%g2 ! %f12 = f28a2c5e 5bb55116 | |
2326 | bne %xcc,p0_freg_check_fail | |
2327 | mov 0xf12,%g1 | |
2328 | ldx [%g4+0x68],%g3 | |
2329 | std %f28,[%g4] | |
2330 | ldx [%g4],%g2 | |
2331 | cmp %g3,%g2 ! %f28 = 8ed62c03 00000000 | |
2332 | bne %xcc,p0_freg_check_fail | |
2333 | mov 0xf28,%g1 | |
2334 | ||
2335 | ! Check Point 10 completed | |
2336 | ||
2337 | ||
2338 | p0_label_51: | |
2339 | ! Mem[00000000300c1400] = f102aa77, %l3 = 00000000000000e5 | |
2340 | ldsha [%i3+%g0]0x81,%l3 ! %l3 = fffffffffffff102 | |
2341 | ! Mem[0000000010041428] = 5d7ae4e4 33c4a113, %l2 = ffffffff, %l3 = fffff102 | |
2342 | ldd [%i1+0x028],%l2 ! %l2 = 000000005d7ae4e4 0000000033c4a113 | |
2343 | ! Mem[0000000010081400] = 00000000, %l3 = 0000000033c4a113 | |
2344 | ldswa [%i2+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
2345 | ! Mem[0000000030101408] = ffffffff, %l6 = 00000000d9876ee7 | |
2346 | lduba [%i4+%o4]0x89,%l6 ! %l6 = 00000000000000ff | |
2347 | ! Mem[0000000010141408] = 74ff0000, %l7 = 00000000000000a0 | |
2348 | lduha [%i5+%o4]0x80,%l7 ! %l7 = 00000000000074ff | |
2349 | ! Mem[00000000300c1408] = e5dee320, %l0 = 00000000ff849726 | |
2350 | ldsba [%i3+%o4]0x81,%l0 ! %l0 = ffffffffffffffe5 | |
2351 | ! Mem[00000000300c1410] = 1a5c100f, %l0 = ffffffffffffffe5 | |
2352 | ldswa [%i3+%o5]0x81,%l0 ! %l0 = 000000001a5c100f | |
2353 | ! Mem[0000000030041400] = fffffa7b, %l3 = 0000000000000000 | |
2354 | lduwa [%i1+%g0]0x89,%l3 ! %l3 = 00000000fffffa7b | |
2355 | ! Mem[0000000010041410] = e09e7a26, %l2 = 000000005d7ae4e4 | |
2356 | ldswa [%i1+%o5]0x80,%l2 ! %l2 = ffffffffe09e7a26 | |
2357 | ! Starting 10 instruction Store Burst | |
2358 | ! Mem[0000000030041410] = e4b40000, %l6 = 00000000000000ff | |
2359 | swapa [%i1+%o5]0x81,%l6 ! %l6 = 00000000e4b40000 | |
2360 | ||
2361 | p0_label_52: | |
2362 | ! %l0 = 000000001a5c100f, Mem[0000000030081410] = ff455de4 | |
2363 | stha %l0,[%i2+%o5]0x81 ! Mem[0000000030081410] = 100f5de4 | |
2364 | ! %f0 = c9080000 000008c9, Mem[0000000030041400] = fffffa7b ffffffff | |
2365 | stda %f0 ,[%i1+%g0]0x89 ! Mem[0000000030041400] = c9080000 000008c9 | |
2366 | ! %l1 = ffffffffffffffe0, Mem[0000000030101400] = 00000000 | |
2367 | stwa %l1,[%i4+%g0]0x89 ! Mem[0000000030101400] = ffffffe0 | |
2368 | ! %l0 = 1a5c100f, %l1 = ffffffe0, Mem[0000000010181400] = 000000ba 46bc5e50 | |
2369 | stda %l0,[%i6+%g0]0x80 ! Mem[0000000010181400] = 1a5c100f ffffffe0 | |
2370 | ! %f12 = f28a2c5e 5bb55116, Mem[0000000030001400] = a58e0ac9 ff746fa4 | |
2371 | stda %f12,[%i0+%g0]0x89 ! Mem[0000000030001400] = f28a2c5e 5bb55116 | |
2372 | ! Mem[0000000010181410] = 000000ff, %l6 = 00000000e4b40000 | |
2373 | swapa [%i6+%o5]0x80,%l6 ! %l6 = 00000000000000ff | |
2374 | ! %f24 = 0f105c1a d7988aff, Mem[0000000030041410] = ff000000 00000000 | |
2375 | stda %f24,[%i1+%o5]0x89 ! Mem[0000000030041410] = 0f105c1a d7988aff | |
2376 | ! %f19 = 00000000, Mem[0000000010001410] = c90a8ea5 | |
2377 | sta %f19,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 | |
2378 | ! Mem[0000000030101400] = ffffffe0, %l5 = 0000000000000000 | |
2379 | swapa [%i4+%g0]0x89,%l5 ! %l5 = 00000000ffffffe0 | |
2380 | ! Starting 10 instruction Load Burst | |
2381 | ! Mem[0000000010141410] = ff849726, %f14 = 362d08c9 | |
2382 | lda [%i5+%o5]0x80,%f14 ! %f14 = ff849726 | |
2383 | ||
2384 | p0_label_53: | |
2385 | ! Mem[0000000010081400] = 74ff000000000000, %l2 = ffffffffe09e7a26 | |
2386 | ldxa [%i2+%g0]0x88,%l2 ! %l2 = 74ff000000000000 | |
2387 | ! Mem[0000000010181410] = 26000000 0000b4e4, %l2 = 00000000, %l3 = fffffa7b | |
2388 | ldda [%i6+%o5]0x88,%l2 ! %l2 = 000000000000b4e4 0000000026000000 | |
2389 | ! Mem[0000000030081400] = 00000000, %l7 = 00000000000074ff | |
2390 | lduwa [%i2+%g0]0x81,%l7 ! %l7 = 0000000000000000 | |
2391 | ! Mem[0000000010181400] = 1a5c100f ffffffe0, %l0 = 1a5c100f, %l1 = ffffffe0 | |
2392 | ldda [%i6+%g0]0x80,%l0 ! %l0 = 000000001a5c100f 00000000ffffffe0 | |
2393 | ! Mem[0000000030141410] = ff4810c0, %l7 = 0000000000000000 | |
2394 | ldsba [%i5+%o5]0x81,%l7 ! %l7 = ffffffffffffffff | |
2395 | ! Mem[0000000010081410] = ffff00dd, %f31 = 20e3dee5 | |
2396 | lda [%i2+%o5]0x88,%f31 ! %f31 = ffff00dd | |
2397 | ! Mem[0000000010001408] = 00000000 000000ff, %l4 = 000000e5, %l5 = ffffffe0 | |
2398 | ldda [%i0+%o4]0x88,%l4 ! %l4 = 00000000000000ff 0000000000000000 | |
2399 | membar #Sync ! Added by membar checker (14) | |
2400 | ! Mem[0000000010101400] = 0000ff74 6d1dd03f ff006ee7 77aa02f1 | |
2401 | ! Mem[0000000010101410] = 0a8d001a ffffffff d9876ee7 f8d13fed | |
2402 | ! Mem[0000000010101420] = 93180a74 d5706d98 faa3f94d a309ade0 | |
2403 | ! Mem[0000000010101430] = f28a2c5e ffb8ffb0 362d08c9 d7428e9c | |
2404 | ldda [%i4]ASI_BLK_P,%f16 ! Block Load from 0000000010101400 | |
2405 | ! Mem[0000000010101408] = ff006ee777aa02f1, %f10 = faa3f94d a309ade0 | |
2406 | ldda [%i4+%o4]0x80,%f10 ! %f10 = ff006ee7 77aa02f1 | |
2407 | ! Starting 10 instruction Store Burst | |
2408 | ! %l1 = 00000000ffffffe0, Mem[0000000010041400] = 7a260000 | |
2409 | stwa %l1,[%i1+%g0]0x80 ! Mem[0000000010041400] = ffffffe0 | |
2410 | ||
2411 | p0_label_54: | |
2412 | membar #Sync ! Added by membar checker (15) | |
2413 | ! %l2 = 000000000000b4e4, Mem[0000000010101400] = 74ff0000 | |
2414 | stwa %l2,[%i4+%g0]0x88 ! Mem[0000000010101400] = 0000b4e4 | |
2415 | ! %l0 = 1a5c100f, %l1 = ffffffe0, Mem[00000000300c1408] = e5dee320 b431f85c | |
2416 | stda %l0,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 1a5c100f ffffffe0 | |
2417 | ! %l7 = ffffffffffffffff, Mem[00000000201c0001] = fae71669 | |
2418 | stb %l7,[%o0+0x001] ! Mem[00000000201c0000] = faff1669 | |
2419 | ! Mem[00000000300c1400] = 77aa02f1, %l5 = 0000000000000000 | |
2420 | swapa [%i3+%g0]0x89,%l5 ! %l5 = 0000000077aa02f1 | |
2421 | ! %f12 = f28a2c5e, Mem[0000000010181400] = 0f105c1a | |
2422 | sta %f12,[%i6+%g0]0x88 ! Mem[0000000010181400] = f28a2c5e | |
2423 | ! %l4 = 00000000000000ff, Mem[00000000201c0000] = faff1669, %asi = 80 | |
2424 | stba %l4,[%o0+0x000]%asi ! Mem[00000000201c0000] = ffff1669 | |
2425 | ! Mem[0000000010141407] = a309ade0, %l4 = 00000000000000ff | |
2426 | ldstub [%i5+0x007],%l4 ! %l4 = 000000e0000000ff | |
2427 | ! %f7 = f8d13fed, Mem[00000000300c1400] = 00000000 | |
2428 | sta %f7 ,[%i3+%g0]0x81 ! Mem[00000000300c1400] = f8d13fed | |
2429 | ! %l2 = 000000000000b4e4, Mem[00000000100c1410] = ff746fa4 | |
2430 | stba %l2,[%i3+%o5]0x80 ! Mem[00000000100c1410] = e4746fa4 | |
2431 | ! Starting 10 instruction Load Burst | |
2432 | ! Mem[0000000030181400] = c90a8ea5 a46f74ff, %l6 = 000000ff, %l7 = ffffffff | |
2433 | ldda [%i6+%g0]0x89,%l6 ! %l6 = 00000000a46f74ff 00000000c90a8ea5 | |
2434 | ||
2435 | p0_label_55: | |
2436 | ! Mem[0000000010001408] = ff000000, %l7 = 00000000c90a8ea5 | |
2437 | lduha [%i0+%o4]0x80,%l7 ! %l7 = 000000000000ff00 | |
2438 | ! Mem[0000000010081408] = 0aff0000, %l2 = 000000000000b4e4 | |
2439 | lduha [%i2+%o4]0x80,%l2 ! %l2 = 0000000000000aff | |
2440 | ! Mem[0000000010141400] = faa3f94da309adff, %l5 = 0000000077aa02f1 | |
2441 | ldxa [%i5+%g0]0x80,%l5 ! %l5 = faa3f94da309adff | |
2442 | ! Mem[00000000300c1410] = 1a5c100fffffffd9, %l3 = 0000000026000000 | |
2443 | ldxa [%i3+%o5]0x81,%l3 ! %l3 = 1a5c100fffffffd9 | |
2444 | ! Mem[0000000030081410] = 100f5de4, %l0 = 000000001a5c100f | |
2445 | lduba [%i2+%o5]0x81,%l0 ! %l0 = 0000000000000010 | |
2446 | ! Mem[00000000100c1400] = ff8400ff, %l4 = 00000000000000e0 | |
2447 | lduba [%i3+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
2448 | ! Mem[0000000030001400] = f28a2c5e 5bb55116, %l2 = 00000aff, %l3 = ffffffd9 | |
2449 | ldda [%i0+%g0]0x89,%l2 ! %l2 = 000000005bb55116 00000000f28a2c5e | |
2450 | ! Mem[00000000300c1408] = 1a5c100f, %l4 = 00000000000000ff | |
2451 | lduwa [%i3+%o4]0x81,%l4 ! %l4 = 000000001a5c100f | |
2452 | ! Mem[00000000100c1430] = c90a8ea5a46f74ff, %l0 = 0000000000000010 | |
2453 | ldx [%i3+0x030],%l0 ! %l0 = c90a8ea5a46f74ff | |
2454 | ! Starting 10 instruction Store Burst | |
2455 | ! %f23 = f8d13fed, Mem[0000000030081400] = 00000000 | |
2456 | sta %f23,[%i2+%g0]0x81 ! Mem[0000000030081400] = f8d13fed | |
2457 | ||
2458 | ! Check Point 11 for processor 0 | |
2459 | ||
2460 | set p0_check_pt_data_11,%g4 | |
2461 | rd %ccr,%g5 ! %g5 = 44 | |
2462 | ldx [%g4+0x08],%g2 | |
2463 | cmp %l0,%g2 ! %l0 = c90a8ea5a46f74ff | |
2464 | bne %xcc,p0_reg_check_fail0 | |
2465 | mov 0xee0,%g1 | |
2466 | ldx [%g4+0x10],%g2 | |
2467 | cmp %l2,%g2 ! %l2 = 000000005bb55116 | |
2468 | bne %xcc,p0_reg_check_fail2 | |
2469 | mov 0xee2,%g1 | |
2470 | ldx [%g4+0x18],%g2 | |
2471 | cmp %l3,%g2 ! %l3 = 00000000f28a2c5e | |
2472 | bne %xcc,p0_reg_check_fail3 | |
2473 | mov 0xee3,%g1 | |
2474 | ldx [%g4+0x20],%g2 | |
2475 | cmp %l4,%g2 ! %l4 = 000000001a5c100f | |
2476 | bne %xcc,p0_reg_check_fail4 | |
2477 | mov 0xee4,%g1 | |
2478 | ldx [%g4+0x28],%g2 | |
2479 | cmp %l5,%g2 ! %l5 = faa3f94da309adff | |
2480 | bne %xcc,p0_reg_check_fail5 | |
2481 | mov 0xee5,%g1 | |
2482 | ldx [%g4+0x30],%g2 | |
2483 | cmp %l6,%g2 ! %l6 = 00000000a46f74ff | |
2484 | bne %xcc,p0_reg_check_fail6 | |
2485 | mov 0xee6,%g1 | |
2486 | ldx [%g4+0x38],%g2 | |
2487 | cmp %l7,%g2 ! %l7 = 000000000000ff00 | |
2488 | bne %xcc,p0_reg_check_fail7 | |
2489 | mov 0xee7,%g1 | |
2490 | ldx [%g4+0x40],%g3 | |
2491 | std %f0,[%g4] | |
2492 | ldx [%g4],%g2 | |
2493 | cmp %g3,%g2 ! %f0 = c9080000 000008c9 | |
2494 | bne %xcc,p0_freg_check_fail | |
2495 | mov 0xf00,%g1 | |
2496 | ldx [%g4+0x48],%g3 | |
2497 | std %f2,[%g4] | |
2498 | ldx [%g4],%g2 | |
2499 | cmp %g3,%g2 ! %f2 = 8ed62c9e 77aa02f1 | |
2500 | bne %xcc,p0_freg_check_fail | |
2501 | mov 0xf02,%g1 | |
2502 | ldx [%g4+0x50],%g3 | |
2503 | std %f4,[%g4] | |
2504 | ldx [%g4],%g2 | |
2505 | cmp %g3,%g2 ! %f4 = ff8d001a ffffffff | |
2506 | bne %xcc,p0_freg_check_fail | |
2507 | mov 0xf04,%g1 | |
2508 | ldx [%g4+0x58],%g3 | |
2509 | std %f6,[%g4] | |
2510 | ldx [%g4],%g2 | |
2511 | cmp %g3,%g2 ! %f6 = d9876ee7 f8d13fed | |
2512 | bne %xcc,p0_freg_check_fail | |
2513 | mov 0xf06,%g1 | |
2514 | ldx [%g4+0x60],%g3 | |
2515 | std %f10,[%g4] | |
2516 | ldx [%g4],%g2 | |
2517 | cmp %g3,%g2 ! %f10 = ff006ee7 77aa02f1 | |
2518 | bne %xcc,p0_freg_check_fail | |
2519 | mov 0xf10,%g1 | |
2520 | ldx [%g4+0x68],%g3 | |
2521 | std %f14,[%g4] | |
2522 | ldx [%g4],%g2 | |
2523 | cmp %g3,%g2 ! %f14 = ff849726 d7428e9c | |
2524 | bne %xcc,p0_freg_check_fail | |
2525 | mov 0xf14,%g1 | |
2526 | ldx [%g4+0x70],%g3 | |
2527 | std %f16,[%g4] | |
2528 | ldx [%g4],%g2 | |
2529 | cmp %g3,%g2 ! %f16 = 0000ff74 6d1dd03f | |
2530 | bne %xcc,p0_freg_check_fail | |
2531 | mov 0xf16,%g1 | |
2532 | ldx [%g4+0x78],%g3 | |
2533 | std %f18,[%g4] | |
2534 | ldx [%g4],%g2 | |
2535 | cmp %g3,%g2 ! %f18 = ff006ee7 77aa02f1 | |
2536 | bne %xcc,p0_freg_check_fail | |
2537 | mov 0xf18,%g1 | |
2538 | ldx [%g4+0x80],%g3 | |
2539 | std %f20,[%g4] | |
2540 | ldx [%g4],%g2 | |
2541 | cmp %g3,%g2 ! %f20 = 0a8d001a ffffffff | |
2542 | bne %xcc,p0_freg_check_fail | |
2543 | mov 0xf20,%g1 | |
2544 | ldx [%g4+0x88],%g3 | |
2545 | std %f22,[%g4] | |
2546 | ldx [%g4],%g2 | |
2547 | cmp %g3,%g2 ! %f22 = d9876ee7 f8d13fed | |
2548 | bne %xcc,p0_freg_check_fail | |
2549 | mov 0xf22,%g1 | |
2550 | ldx [%g4+0x90],%g3 | |
2551 | std %f24,[%g4] | |
2552 | ldx [%g4],%g2 | |
2553 | cmp %g3,%g2 ! %f24 = 93180a74 d5706d98 | |
2554 | bne %xcc,p0_freg_check_fail | |
2555 | mov 0xf24,%g1 | |
2556 | ldx [%g4+0x98],%g3 | |
2557 | std %f26,[%g4] | |
2558 | ldx [%g4],%g2 | |
2559 | cmp %g3,%g2 ! %f26 = faa3f94d a309ade0 | |
2560 | bne %xcc,p0_freg_check_fail | |
2561 | mov 0xf26,%g1 | |
2562 | ldx [%g4+0xa0],%g3 | |
2563 | std %f28,[%g4] | |
2564 | ldx [%g4],%g2 | |
2565 | cmp %g3,%g2 ! %f28 = f28a2c5e ffb8ffb0 | |
2566 | bne %xcc,p0_freg_check_fail | |
2567 | mov 0xf28,%g1 | |
2568 | ldx [%g4+0xa8],%g3 | |
2569 | std %f30,[%g4] | |
2570 | ldx [%g4],%g2 | |
2571 | cmp %g3,%g2 ! %f30 = 362d08c9 d7428e9c | |
2572 | bne %xcc,p0_freg_check_fail | |
2573 | mov 0xf30,%g1 | |
2574 | ||
2575 | ! Check Point 11 completed | |
2576 | ||
2577 | ||
2578 | p0_label_56: | |
2579 | ! %f16 = 0000ff74 6d1dd03f ff006ee7 77aa02f1 | |
2580 | ! %f20 = 0a8d001a ffffffff d9876ee7 f8d13fed | |
2581 | ! %f24 = 93180a74 d5706d98 faa3f94d a309ade0 | |
2582 | ! %f28 = f28a2c5e ffb8ffb0 362d08c9 d7428e9c | |
2583 | stda %f16,[%i4]ASI_BLK_PL ! Block Store to 0000000010101400 | |
2584 | ! Mem[0000000010001410] = 00000000, %l7 = 000000000000ff00 | |
2585 | ldstuba [%i0+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
2586 | ! %f6 = d9876ee7 f8d13fed, Mem[0000000010041410] = e09e7a26 20e3dee5 | |
2587 | stda %f6 ,[%i1+0x010]%asi ! Mem[0000000010041410] = d9876ee7 f8d13fed | |
2588 | ! Mem[0000000030081410] = 100f5de4, %l1 = 00000000ffffffe0 | |
2589 | ldstuba [%i2+%o5]0x81,%l1 ! %l1 = 00000010000000ff | |
2590 | ! Mem[0000000010001410] = ff000000, %l7 = 0000000000000000 | |
2591 | swapa [%i0+%o5]0x80,%l7 ! %l7 = 00000000ff000000 | |
2592 | membar #Sync ! Added by membar checker (16) | |
2593 | ! Mem[0000000010101408] = ff006ee777aa02f1, %f6 = d9876ee7 f8d13fed | |
2594 | ldda [%i4+%o4]0x88,%f6 ! %f6 = ff006ee7 77aa02f1 | |
2595 | ! %f19 = 77aa02f1, Mem[0000000010001408] = ff000000 | |
2596 | sta %f19,[%i0+%o4]0x80 ! Mem[0000000010001408] = 77aa02f1 | |
2597 | ! %f22 = d9876ee7 f8d13fed, %l5 = faa3f94da309adff | |
2598 | ! Mem[0000000030041418] = c90a8ea53eec125e | |
2599 | add %i1,0x018,%g1 | |
2600 | stda %f22,[%g1+%l5]ASI_PST32_S ! Mem[0000000030041418] = d9876ee7f8d13fed | |
2601 | ! %f19 = 77aa02f1, Mem[0000000030081408] = 9ee0e237 | |
2602 | sta %f19,[%i2+%o4]0x81 ! Mem[0000000030081408] = 77aa02f1 | |
2603 | ! Starting 10 instruction Load Burst | |
2604 | ! Mem[0000000010041400] = e0ffffff, %l3 = 00000000f28a2c5e | |
2605 | ldsha [%i1+%g0]0x88,%l3 ! %l3 = ffffffffffffffff | |
2606 | ||
2607 | p0_label_57: | |
2608 | ! Mem[0000000010181410] = e4b40000, %l2 = 000000005bb55116 | |
2609 | ldswa [%i6+%o5]0x80,%l2 ! %l2 = ffffffffe4b40000 | |
2610 | ! Mem[0000000010081408] = 0aff0000, %l6 = 00000000a46f74ff | |
2611 | ldsha [%i2+%o4]0x80,%l6 ! %l6 = 0000000000000aff | |
2612 | ! Mem[0000000030081400] = ed3fd1f8, %l0 = c90a8ea5a46f74ff | |
2613 | lduha [%i2+%g0]0x89,%l0 ! %l0 = 000000000000d1f8 | |
2614 | ! Mem[0000000010101410] = 0a8d001a ffffffff, %l2 = e4b40000, %l3 = ffffffff | |
2615 | ldda [%i4+%o5]0x88,%l2 ! %l2 = 00000000ffffffff 000000000a8d001a | |
2616 | ! Mem[0000000010041400] = e0ffffff, %l4 = 000000001a5c100f | |
2617 | lduwa [%i1+%g0]0x88,%l4 ! %l4 = 00000000e0ffffff | |
2618 | ! Mem[0000000030101408] = ffffffff, %l0 = 000000000000d1f8 | |
2619 | lduba [%i4+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
2620 | ! Mem[0000000010181438] = 00000000, %f4 = ff8d001a | |
2621 | lda [%i6+0x038]%asi,%f4 ! %f4 = 00000000 | |
2622 | ! Mem[00000000100c1408] = 00ffffff, %l6 = 0000000000000aff | |
2623 | ldsha [%i3+0x00a]%asi,%l6 ! %l6 = ffffffffffffffff | |
2624 | ! Mem[0000000030101410] = e0ffffff269784ff, %l4 = 00000000e0ffffff | |
2625 | ldxa [%i4+%o5]0x81,%l4 ! %l4 = e0ffffff269784ff | |
2626 | ! Starting 10 instruction Store Burst | |
2627 | ! %l1 = 0000000000000010, Mem[0000000030041408] = 7a9afc2a | |
2628 | stba %l1,[%i1+%o4]0x89 ! Mem[0000000030041408] = 7a9afc10 | |
2629 | ||
2630 | p0_label_58: | |
2631 | ! Mem[0000000010081429] = 1263e8dd, %l1 = 0000000000000010 | |
2632 | ldstub [%i2+0x029],%l1 ! %l1 = 00000063000000ff | |
2633 | ! Mem[0000000010141400] = faa3f94d, %l5 = faa3f94da309adff | |
2634 | ldstuba [%i5+%g0]0x80,%l5 ! %l5 = 000000fa000000ff | |
2635 | ! %l1 = 0000000000000063, Mem[0000000010181438] = 00000000 | |
2636 | sth %l1,[%i6+0x038] ! Mem[0000000010181438] = 00630000 | |
2637 | ! %l2 = 00000000ffffffff, Mem[00000000100c1400] = ff8400ff | |
2638 | stwa %l2,[%i3+%g0]0x88 ! Mem[00000000100c1400] = ffffffff | |
2639 | ! Mem[0000000010101410] = ffffffff, %l4 = e0ffffff269784ff | |
2640 | swap [%i4+%o5],%l4 ! %l4 = 00000000ffffffff | |
2641 | ! %l7 = 00000000ff000000, Mem[0000000010181410] = e4b40000 | |
2642 | stba %l7,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00b40000 | |
2643 | ! Mem[0000000010081410] = dd00ffff, %l4 = 00000000ffffffff | |
2644 | swapa [%i2+%o5]0x80,%l4 ! %l4 = 00000000dd00ffff | |
2645 | ! %f14 = ff849726 d7428e9c, Mem[0000000010041420] = 2ce65c7f 4d072a78 | |
2646 | std %f14,[%i1+0x020] ! Mem[0000000010041420] = ff849726 d7428e9c | |
2647 | ! Mem[000000001004143b] = 8b0838cb, %l0 = 00000000000000ff | |
2648 | ldstub [%i1+0x03b],%l0 ! %l0 = 000000cb000000ff | |
2649 | ! Starting 10 instruction Load Burst | |
2650 | ! Mem[0000000010001408] = 77aa02f100000000, %l3 = 000000000a8d001a | |
2651 | ldxa [%i0+%o4]0x80,%l3 ! %l3 = 77aa02f100000000 | |
2652 | ||
2653 | p0_label_59: | |
2654 | ! Mem[0000000010041424] = d7428e9c, %l5 = 00000000000000fa | |
2655 | lduba [%i1+0x027]%asi,%l5 ! %l5 = 000000000000009c | |
2656 | ! Mem[0000000030141408] = ff8a98d7ae6e0959, %l2 = 00000000ffffffff | |
2657 | ldxa [%i5+%o4]0x81,%l2 ! %l2 = ff8a98d7ae6e0959 | |
2658 | ! Mem[0000000030081408] = f102aa77, %l5 = 000000000000009c | |
2659 | lduha [%i2+%o4]0x89,%l5 ! %l5 = 000000000000aa77 | |
2660 | ! Mem[0000000010001400] = 3fd01d6d00000000, %l7 = 00000000ff000000 | |
2661 | ldxa [%i0+%g0]0x88,%l7 ! %l7 = 3fd01d6d00000000 | |
2662 | ! Mem[00000000201c0000] = ffff1669, %l2 = ff8a98d7ae6e0959 | |
2663 | ldsha [%o0+0x000]%asi,%l2 ! %l2 = ffffffffffffffff | |
2664 | membar #Sync ! Added by membar checker (17) | |
2665 | ! Mem[0000000010181400] = 5e2c8af2 ffffffe0 ff96c188 782a074d | |
2666 | ! Mem[0000000010181410] = 00b40000 00000026 ca93dcbf e2f66f18 | |
2667 | ! Mem[0000000010181420] = 2ce65c7f 0000007a 0000008a 000000e5 | |
2668 | ! Mem[0000000010181430] = fa7bc046 fff9275e 00630000 0000006e | |
2669 | ldda [%i6]ASI_BLK_AIUPL,%f0 ! Block Load from 0000000010181400 | |
2670 | ! Mem[0000000030101410] = e0ffffff, %f17 = 6d1dd03f | |
2671 | lda [%i4+%o5]0x81,%f17 ! %f17 = e0ffffff | |
2672 | ! Mem[0000000030001408] = 6cbc4fa71f92141b, %f22 = d9876ee7 f8d13fed | |
2673 | ldda [%i0+%o4]0x81,%f22 ! %f22 = 6cbc4fa7 1f92141b | |
2674 | ! Mem[00000000100c1434] = a46f74ff, %l0 = 00000000000000cb | |
2675 | lduh [%i3+0x036],%l0 ! %l0 = 00000000000074ff | |
2676 | ! Starting 10 instruction Store Burst | |
2677 | ! Mem[0000000030181400] = a46f74ff, %l3 = 77aa02f100000000 | |
2678 | swapa [%i6+%g0]0x89,%l3 ! %l3 = 00000000a46f74ff | |
2679 | ||
2680 | p0_label_60: | |
2681 | membar #Sync ! Added by membar checker (18) | |
2682 | ! %f20 = 0a8d001a, Mem[0000000010181400] = 5e2c8af2 | |
2683 | sta %f20,[%i6+%g0]0x80 ! Mem[0000000010181400] = 0a8d001a | |
2684 | ! %f23 = 1f92141b, Mem[0000000010081400] = 00000000 | |
2685 | sta %f23,[%i2+%g0]0x88 ! Mem[0000000010081400] = 1f92141b | |
2686 | ! Mem[0000000030041408] = 10fc9a7a, %l2 = ffffffffffffffff | |
2687 | swapa [%i1+%o4]0x81,%l2 ! %l2 = 0000000010fc9a7a | |
2688 | ! %l4 = dd00ffff, %l5 = 0000aa77, Mem[0000000030041408] = ffffffff 00000000 | |
2689 | stda %l4,[%i1+%o4]0x81 ! Mem[0000000030041408] = dd00ffff 0000aa77 | |
2690 | ! %l3 = 00000000a46f74ff, Mem[0000000030001408] = 1b14921fa74fbc6c | |
2691 | stxa %l3,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00000000a46f74ff | |
2692 | ! Mem[0000000010141410] = 269784ff, %l1 = 0000000000000063 | |
2693 | ldstuba [%i5+%o5]0x88,%l1 ! %l1 = 000000ff000000ff | |
2694 | ! Mem[00000000300c1400] = ed3fd1f8, %l0 = 00000000000074ff | |
2695 | swapa [%i3+%g0]0x89,%l0 ! %l0 = 00000000ed3fd1f8 | |
2696 | ! %l3 = 00000000a46f74ff, Mem[0000000010141400] = 4df9a3ff | |
2697 | stwa %l3,[%i5+%g0]0x88 ! Mem[0000000010141400] = a46f74ff | |
2698 | ! Mem[0000000010181400] = 1a008d0a, %l4 = 00000000dd00ffff | |
2699 | ldstuba [%i6+%g0]0x88,%l4 ! %l4 = 0000000a000000ff | |
2700 | ! Starting 10 instruction Load Burst | |
2701 | ! Mem[0000000010181408] = ff96c188, %l6 = ffffffffffffffff | |
2702 | lduha [%i6+%o4]0x80,%l6 ! %l6 = 000000000000ff96 | |
2703 | ||
2704 | ! Check Point 12 for processor 0 | |
2705 | ||
2706 | set p0_check_pt_data_12,%g4 | |
2707 | rd %ccr,%g5 ! %g5 = 44 | |
2708 | ldx [%g4+0x08],%g2 | |
2709 | cmp %l0,%g2 ! %l0 = 00000000ed3fd1f8 | |
2710 | bne %xcc,p0_reg_check_fail0 | |
2711 | mov 0xee0,%g1 | |
2712 | ldx [%g4+0x10],%g2 | |
2713 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
2714 | bne %xcc,p0_reg_check_fail1 | |
2715 | mov 0xee1,%g1 | |
2716 | ldx [%g4+0x18],%g2 | |
2717 | cmp %l2,%g2 ! %l2 = 0000000010fc9a7a | |
2718 | bne %xcc,p0_reg_check_fail2 | |
2719 | mov 0xee2,%g1 | |
2720 | ldx [%g4+0x20],%g2 | |
2721 | cmp %l3,%g2 ! %l3 = 00000000a46f74ff | |
2722 | bne %xcc,p0_reg_check_fail3 | |
2723 | mov 0xee3,%g1 | |
2724 | ldx [%g4+0x28],%g2 | |
2725 | cmp %l4,%g2 ! %l4 = 000000000000000a | |
2726 | bne %xcc,p0_reg_check_fail4 | |
2727 | mov 0xee4,%g1 | |
2728 | ldx [%g4+0x30],%g2 | |
2729 | cmp %l5,%g2 ! %l5 = 000000000000aa77 | |
2730 | bne %xcc,p0_reg_check_fail5 | |
2731 | mov 0xee5,%g1 | |
2732 | ldx [%g4+0x38],%g2 | |
2733 | cmp %l6,%g2 ! %l6 = 000000000000ff96 | |
2734 | bne %xcc,p0_reg_check_fail6 | |
2735 | mov 0xee6,%g1 | |
2736 | ldx [%g4+0x40],%g2 | |
2737 | cmp %l7,%g2 ! %l7 = 3fd01d6d00000000 | |
2738 | bne %xcc,p0_reg_check_fail7 | |
2739 | mov 0xee7,%g1 | |
2740 | ldx [%g4+0x48],%g3 | |
2741 | std %f0,[%g4] | |
2742 | ldx [%g4],%g2 | |
2743 | cmp %g3,%g2 ! %f0 = e0ffffff f28a2c5e | |
2744 | bne %xcc,p0_freg_check_fail | |
2745 | mov 0xf00,%g1 | |
2746 | ldx [%g4+0x50],%g3 | |
2747 | std %f2,[%g4] | |
2748 | ldx [%g4],%g2 | |
2749 | cmp %g3,%g2 ! %f2 = 4d072a78 88c196ff | |
2750 | bne %xcc,p0_freg_check_fail | |
2751 | mov 0xf02,%g1 | |
2752 | ldx [%g4+0x58],%g3 | |
2753 | std %f4,[%g4] | |
2754 | ldx [%g4],%g2 | |
2755 | cmp %g3,%g2 ! %f4 = 26000000 0000b400 | |
2756 | bne %xcc,p0_freg_check_fail | |
2757 | mov 0xf04,%g1 | |
2758 | ldx [%g4+0x60],%g3 | |
2759 | std %f6,[%g4] | |
2760 | ldx [%g4],%g2 | |
2761 | cmp %g3,%g2 ! %f6 = 186ff6e2 bfdc93ca | |
2762 | bne %xcc,p0_freg_check_fail | |
2763 | mov 0xf06,%g1 | |
2764 | ldx [%g4+0x68],%g3 | |
2765 | std %f8,[%g4] | |
2766 | ldx [%g4],%g2 | |
2767 | cmp %g3,%g2 ! %f8 = 7a000000 7f5ce62c | |
2768 | bne %xcc,p0_freg_check_fail | |
2769 | mov 0xf08,%g1 | |
2770 | ldx [%g4+0x70],%g3 | |
2771 | std %f10,[%g4] | |
2772 | ldx [%g4],%g2 | |
2773 | cmp %g3,%g2 ! %f10 = e5000000 8a000000 | |
2774 | bne %xcc,p0_freg_check_fail | |
2775 | mov 0xf10,%g1 | |
2776 | ldx [%g4+0x78],%g3 | |
2777 | std %f12,[%g4] | |
2778 | ldx [%g4],%g2 | |
2779 | cmp %g3,%g2 ! %f12 = 5e27f9ff 46c07bfa | |
2780 | bne %xcc,p0_freg_check_fail | |
2781 | mov 0xf12,%g1 | |
2782 | ldx [%g4+0x80],%g3 | |
2783 | std %f14,[%g4] | |
2784 | ldx [%g4],%g2 | |
2785 | cmp %g3,%g2 ! %f14 = 6e000000 00006300 | |
2786 | bne %xcc,p0_freg_check_fail | |
2787 | mov 0xf14,%g1 | |
2788 | ldx [%g4+0x88],%g3 | |
2789 | std %f16,[%g4] | |
2790 | ldx [%g4],%g2 | |
2791 | cmp %g3,%g2 ! %f16 = 0000ff74 e0ffffff | |
2792 | bne %xcc,p0_freg_check_fail | |
2793 | mov 0xf16,%g1 | |
2794 | ldx [%g4+0x90],%g3 | |
2795 | std %f22,[%g4] | |
2796 | ldx [%g4],%g2 | |
2797 | cmp %g3,%g2 ! %f22 = 6cbc4fa7 1f92141b | |
2798 | bne %xcc,p0_freg_check_fail | |
2799 | mov 0xf22,%g1 | |
2800 | ||
2801 | ! Check Point 12 completed | |
2802 | ||
2803 | ||
2804 | p0_label_61: | |
2805 | ! Mem[0000000010101400] = 3fd01d6d 74ff0000, %l4 = 0000000a, %l5 = 0000aa77 | |
2806 | ldda [%i4+%g0]0x80,%l4 ! %l4 = 000000003fd01d6d 0000000074ff0000 | |
2807 | ! Mem[000000001008142c] = c79c2645, %l2 = 0000000010fc9a7a | |
2808 | ldsb [%i2+0x02c],%l2 ! %l2 = ffffffffffffffc7 | |
2809 | ! Mem[0000000030001410] = ffffffff, %l4 = 000000003fd01d6d | |
2810 | ldswa [%i0+%o5]0x81,%l4 ! %l4 = ffffffffffffffff | |
2811 | ! Mem[0000000030081408] = 77aa02f18a708a3a, %f10 = e5000000 8a000000 | |
2812 | ldda [%i2+%o4]0x81,%f10 ! %f10 = 77aa02f1 8a708a3a | |
2813 | ! Mem[0000000010181410] = 0000b400, %l1 = 00000000000000ff | |
2814 | lduba [%i6+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
2815 | ! Mem[0000000030141400] = faa3f94d, %l7 = 3fd01d6d00000000 | |
2816 | ldsha [%i5+%g0]0x81,%l7 ! %l7 = fffffffffffffaa3 | |
2817 | ! Mem[0000000010001430] = f28a2c5effb8ffb0, %f14 = 6e000000 00006300 | |
2818 | ldd [%i0+0x030],%f14 ! %f14 = f28a2c5e ffb8ffb0 | |
2819 | ! Mem[00000000300c1408] = e0ffffff 0f105c1a, %l4 = ffffffff, %l5 = 74ff0000 | |
2820 | ldda [%i3+%o4]0x89,%l4 ! %l4 = 000000000f105c1a 00000000e0ffffff | |
2821 | ! Mem[00000000100c1424] = ed13eb1e, %f4 = 26000000 | |
2822 | lda [%i3+0x024]%asi,%f4 ! %f4 = ed13eb1e | |
2823 | ! Starting 10 instruction Store Burst | |
2824 | ! %l6 = 000000000000ff96, Mem[0000000030141410] = c01048ff | |
2825 | stwa %l6,[%i5+%o5]0x89 ! Mem[0000000030141410] = 0000ff96 | |
2826 | ||
2827 | p0_label_62: | |
2828 | ! Mem[0000000010041408] = 73a695a6, %l6 = 000000000000ff96 | |
2829 | swapa [%i1+%o4]0x80,%l6 ! %l6 = 0000000073a695a6 | |
2830 | ! Mem[0000000010081408] = 0aff0000d9876ee7, %l6 = 0000000073a695a6, %l7 = fffffffffffffaa3 | |
2831 | add %i2,0x08,%g1 | |
2832 | casxa [%g1]0x80,%l6,%l7 ! %l7 = 0aff0000d9876ee7 | |
2833 | ! %l0 = ed3fd1f8, %l1 = 00000000, Mem[0000000010081408] = 0000ff0a e76e87d9 | |
2834 | stda %l0,[%i2+%o4]0x88 ! Mem[0000000010081408] = ed3fd1f8 00000000 | |
2835 | ! Mem[000000001000143c] = ffb88e9c, %f21 = ffffffff | |
2836 | ld [%i0+0x03c],%f21 ! %f21 = ffb88e9c | |
2837 | ! Mem[0000000030181408] = c9080000, %l4 = 000000000f105c1a | |
2838 | ldstuba [%i6+%o4]0x81,%l4 ! %l4 = 000000c9000000ff | |
2839 | ! %l4 = 00000000000000c9, Mem[00000000100c1408] = 00ffffff | |
2840 | stwa %l4,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 000000c9 | |
2841 | ! %l2 = ffffffffffffffc7, Mem[0000000010081408] = f8d13fed00000000 | |
2842 | stxa %l2,[%i2+%o4]0x80 ! Mem[0000000010081408] = ffffffffffffffc7 | |
2843 | ! %l7 = 0aff0000d9876ee7, Mem[0000000020800041] = b4a19ffa | |
2844 | stb %l7,[%o1+0x041] ! Mem[0000000020800040] = b4e79ffa | |
2845 | ! %l4 = 00000000000000c9, Mem[0000000030101410] = e0ffffff | |
2846 | stha %l4,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00c9ffff | |
2847 | ! Starting 10 instruction Load Burst | |
2848 | ! Mem[0000000030181408] = ff080000000008c9, %l6 = 0000000073a695a6 | |
2849 | ldxa [%i6+%o4]0x81,%l6 ! %l6 = ff080000000008c9 | |
2850 | ||
2851 | p0_label_63: | |
2852 | ! Mem[0000000030041410] = ff8a98d7, %l4 = 00000000000000c9 | |
2853 | lduwa [%i1+%o5]0x81,%l4 ! %l4 = 00000000ff8a98d7 | |
2854 | ! Mem[0000000030181400] = 00000000, %f3 = 88c196ff | |
2855 | lda [%i6+%g0]0x81,%f3 ! %f3 = 00000000 | |
2856 | ! Mem[0000000010141400] = ff746fa4 a309adff, %l0 = ed3fd1f8, %l1 = 00000000 | |
2857 | ldda [%i5+%g0]0x80,%l0 ! %l0 = 00000000ff746fa4 00000000a309adff | |
2858 | ! Mem[0000000030141400] = 4df9a3fa, %l4 = 00000000ff8a98d7 | |
2859 | lduha [%i5+%g0]0x89,%l4 ! %l4 = 000000000000a3fa | |
2860 | ! %l0 = 00000000ff746fa4, %l6 = ff080000000008c9, %l4 = 000000000000a3fa | |
2861 | sdivx %l0,%l6,%l4 ! %l4 = 0000000000000000 | |
2862 | ! Mem[0000000010081410] = ffffffff, %l0 = 00000000ff746fa4 | |
2863 | ldswa [%i2+%o5]0x80,%l0 ! %l0 = ffffffffffffffff | |
2864 | ! Mem[00000000100c1408] = ff2f5de4c9000000, %l2 = ffffffffffffffc7 | |
2865 | ldxa [%i3+%o4]0x88,%l2 ! %l2 = ff2f5de4c9000000 | |
2866 | ! Mem[00000000300c1400] = ff740000e76e00ff, %l1 = 00000000a309adff | |
2867 | ldxa [%i3+%g0]0x81,%l1 ! %l1 = ff740000e76e00ff | |
2868 | ! Mem[0000000030081408] = 77aa02f18a708a3a, %l3 = 00000000a46f74ff | |
2869 | ldxa [%i2+%o4]0x81,%l3 ! %l3 = 77aa02f18a708a3a | |
2870 | ! Starting 10 instruction Store Burst | |
2871 | ! %l6 = ff080000000008c9, Mem[00000000300c1400] = ff740000 | |
2872 | stba %l6,[%i3+%g0]0x81 ! Mem[00000000300c1400] = c9740000 | |
2873 | ||
2874 | p0_label_64: | |
2875 | ! Mem[0000000030041408] = dd00ffff, %l4 = 0000000000000000 | |
2876 | swapa [%i1+%o4]0x81,%l4 ! %l4 = 00000000dd00ffff | |
2877 | ! %f20 = 0a8d001a ffb88e9c, %l3 = 77aa02f18a708a3a | |
2878 | ! Mem[0000000030181410] = 1651b55bc6e7a17a | |
2879 | add %i6,0x010,%g1 | |
2880 | stda %f20,[%g1+%l3]ASI_PST16_SL ! Mem[0000000030181410] = 1651b8ffc6e78d0a | |
2881 | ! Mem[0000000030041410] = d7988aff, %l6 = ff080000000008c9 | |
2882 | swapa [%i1+%o5]0x89,%l6 ! %l6 = 00000000d7988aff | |
2883 | ! %l6 = d7988aff, %l7 = d9876ee7, Mem[00000000300c1400] = c9740000 e76e00ff | |
2884 | stda %l6,[%i3+%g0]0x81 ! Mem[00000000300c1400] = d7988aff d9876ee7 | |
2885 | ! Mem[00000000100c1419] = ca93dcbf, %l7 = 0aff0000d9876ee7 | |
2886 | ldstuba [%i3+0x019]%asi,%l7 ! %l7 = 00000093000000ff | |
2887 | ! %l5 = 00000000e0ffffff, Mem[00000000100c140c] = e45d2fff, %asi = 80 | |
2888 | stwa %l5,[%i3+0x00c]%asi ! Mem[00000000100c140c] = e0ffffff | |
2889 | ! Mem[0000000010041428] = 5d7ae4e433c4a113, %l5 = 00000000e0ffffff, %l2 = ff2f5de4c9000000 | |
2890 | add %i1,0x28,%g1 | |
2891 | casxa [%g1]0x80,%l5,%l2 ! %l2 = 5d7ae4e433c4a113 | |
2892 | ! %l1 = ff740000e76e00ff, Mem[0000000010081416] = 1850c56d, %asi = 80 | |
2893 | stha %l1,[%i2+0x016]%asi ! Mem[0000000010081414] = 185000ff | |
2894 | ! %l6 = 00000000d7988aff, Mem[0000000010181408] = ff96c188 | |
2895 | stwa %l6,[%i6+%o4]0x80 ! Mem[0000000010181408] = d7988aff | |
2896 | ! Starting 10 instruction Load Burst | |
2897 | ! Mem[0000000010181410] = 0000b400, %l4 = 00000000dd00ffff | |
2898 | ldswa [%i6+%o5]0x88,%l4 ! %l4 = 000000000000b400 | |
2899 | ||
2900 | p0_label_65: | |
2901 | ! Mem[0000000010181410] = 0000b400, %l5 = 00000000e0ffffff | |
2902 | ldsba [%i6+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
2903 | ! Mem[0000000010141400] = ffad09a3 a46f74ff, %l0 = ffffffff, %l1 = e76e00ff | |
2904 | ldda [%i5+%g0]0x88,%l0 ! %l0 = 00000000a46f74ff 00000000ffad09a3 | |
2905 | ! Mem[0000000010041400] = e0ffffff, %l7 = 0000000000000093 | |
2906 | ldswa [%i1+%g0]0x88,%l7 ! %l7 = ffffffffe0ffffff | |
2907 | ! Mem[00000000100c1410] = e4746fa4 a58e0ac9, %l2 = 33c4a113, %l3 = 8a708a3a | |
2908 | ldda [%i3+%o5]0x80,%l2 ! %l2 = 00000000e4746fa4 00000000a58e0ac9 | |
2909 | ! Mem[0000000030041400] = 000008c9, %l5 = 0000000000000000 | |
2910 | lduwa [%i1+%g0]0x89,%l5 ! %l5 = 00000000000008c9 | |
2911 | ! Mem[0000000010001400] = 00000000, %f31 = d7428e9c | |
2912 | lda [%i0+%g0]0x80,%f31 ! %f31 = 00000000 | |
2913 | ! Mem[0000000010001410] = 00000000, %l6 = 00000000d7988aff | |
2914 | ldsha [%i0+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
2915 | ! Mem[0000000010001400] = 00000000, %l4 = 000000000000b400 | |
2916 | ldstuba [%i0+%g0]0x80,%l4 ! %l4 = 00000000000000ff | |
2917 | ! Mem[0000000010001418] = d9876ee7, %l7 = ffffffffe0ffffff | |
2918 | ldub [%i0+0x01a],%l7 ! %l7 = 000000000000006e | |
2919 | ! Starting 10 instruction Store Burst | |
2920 | ! %f16 = 0000ff74 e0ffffff ff006ee7 77aa02f1 | |
2921 | ! %f20 = 0a8d001a ffb88e9c 6cbc4fa7 1f92141b | |
2922 | ! %f24 = 93180a74 d5706d98 faa3f94d a309ade0 | |
2923 | ! %f28 = f28a2c5e ffb8ffb0 362d08c9 00000000 | |
2924 | stda %f16,[%i5]ASI_BLK_S ! Block Store to 0000000030141400 | |
2925 | ||
2926 | ! Check Point 13 for processor 0 | |
2927 | ||
2928 | set p0_check_pt_data_13,%g4 | |
2929 | rd %ccr,%g5 ! %g5 = 44 | |
2930 | ldx [%g4+0x08],%g2 | |
2931 | cmp %l0,%g2 ! %l0 = 00000000a46f74ff | |
2932 | bne %xcc,p0_reg_check_fail0 | |
2933 | mov 0xee0,%g1 | |
2934 | ldx [%g4+0x10],%g2 | |
2935 | cmp %l1,%g2 ! %l1 = 00000000ffad09a3 | |
2936 | bne %xcc,p0_reg_check_fail1 | |
2937 | mov 0xee1,%g1 | |
2938 | ldx [%g4+0x18],%g2 | |
2939 | cmp %l2,%g2 ! %l2 = 00000000e4746fa4 | |
2940 | bne %xcc,p0_reg_check_fail2 | |
2941 | mov 0xee2,%g1 | |
2942 | ldx [%g4+0x20],%g2 | |
2943 | cmp %l3,%g2 ! %l3 = 00000000a58e0ac9 | |
2944 | bne %xcc,p0_reg_check_fail3 | |
2945 | mov 0xee3,%g1 | |
2946 | ldx [%g4+0x28],%g2 | |
2947 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
2948 | bne %xcc,p0_reg_check_fail4 | |
2949 | mov 0xee4,%g1 | |
2950 | ldx [%g4+0x30],%g2 | |
2951 | cmp %l5,%g2 ! %l5 = 00000000000008c9 | |
2952 | bne %xcc,p0_reg_check_fail5 | |
2953 | mov 0xee5,%g1 | |
2954 | ldx [%g4+0x38],%g2 | |
2955 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
2956 | bne %xcc,p0_reg_check_fail6 | |
2957 | mov 0xee6,%g1 | |
2958 | ldx [%g4+0x40],%g2 | |
2959 | cmp %l7,%g2 ! %l7 = 000000000000006e | |
2960 | bne %xcc,p0_reg_check_fail7 | |
2961 | mov 0xee7,%g1 | |
2962 | ldx [%g4+0x48],%g3 | |
2963 | std %f0,[%g4] | |
2964 | ldx [%g4],%g2 | |
2965 | cmp %g3,%g2 ! %f0 = e0ffffff f28a2c5e | |
2966 | bne %xcc,p0_freg_check_fail | |
2967 | mov 0xf00,%g1 | |
2968 | ldx [%g4+0x50],%g3 | |
2969 | std %f2,[%g4] | |
2970 | ldx [%g4],%g2 | |
2971 | cmp %g3,%g2 ! %f2 = 4d072a78 00000000 | |
2972 | bne %xcc,p0_freg_check_fail | |
2973 | mov 0xf02,%g1 | |
2974 | ldx [%g4+0x58],%g3 | |
2975 | std %f4,[%g4] | |
2976 | ldx [%g4],%g2 | |
2977 | cmp %g3,%g2 ! %f4 = ed13eb1e 0000b400 | |
2978 | bne %xcc,p0_freg_check_fail | |
2979 | mov 0xf04,%g1 | |
2980 | ldx [%g4+0x60],%g3 | |
2981 | std %f10,[%g4] | |
2982 | ldx [%g4],%g2 | |
2983 | cmp %g3,%g2 ! %f10 = 77aa02f1 8a708a3a | |
2984 | bne %xcc,p0_freg_check_fail | |
2985 | mov 0xf10,%g1 | |
2986 | ldx [%g4+0x68],%g3 | |
2987 | std %f14,[%g4] | |
2988 | ldx [%g4],%g2 | |
2989 | cmp %g3,%g2 ! %f14 = f28a2c5e ffb8ffb0 | |
2990 | bne %xcc,p0_freg_check_fail | |
2991 | mov 0xf14,%g1 | |
2992 | ldx [%g4+0x70],%g3 | |
2993 | std %f20,[%g4] | |
2994 | ldx [%g4],%g2 | |
2995 | cmp %g3,%g2 ! %f20 = 0a8d001a ffb88e9c | |
2996 | bne %xcc,p0_freg_check_fail | |
2997 | mov 0xf20,%g1 | |
2998 | ldx [%g4+0x78],%g3 | |
2999 | std %f30,[%g4] | |
3000 | ldx [%g4],%g2 | |
3001 | cmp %g3,%g2 ! %f30 = 362d08c9 00000000 | |
3002 | bne %xcc,p0_freg_check_fail | |
3003 | mov 0xf30,%g1 | |
3004 | ||
3005 | ! Check Point 13 completed | |
3006 | ||
3007 | ||
3008 | p0_label_66: | |
3009 | ! %l6 = 0000000000000000, Mem[0000000030181410] = 1651b8ff | |
3010 | stba %l6,[%i6+%o5]0x81 ! Mem[0000000030181410] = 0051b8ff | |
3011 | ! %l3 = 00000000a58e0ac9, Mem[00000000100c1400] = ffffffff | |
3012 | stwa %l3,[%i3+%g0]0x88 ! Mem[00000000100c1400] = a58e0ac9 | |
3013 | ! Mem[0000000010101407] = 74ff0000, %l2 = 00000000e4746fa4 | |
3014 | ldstub [%i4+0x007],%l2 ! %l2 = 00000000000000ff | |
3015 | ! %f4 = ed13eb1e 0000b400, Mem[0000000010181410] = 00b40000 00000026 | |
3016 | stda %f4 ,[%i6+0x010]%asi ! Mem[0000000010181410] = ed13eb1e 0000b400 | |
3017 | ! %f6 = 186ff6e2 bfdc93ca, Mem[0000000010141438] = e13bcdbf 00000000 | |
3018 | stda %f6 ,[%i5+0x038]%asi ! Mem[0000000010141438] = 186ff6e2 bfdc93ca | |
3019 | ! %f16 = 0000ff74 e0ffffff, Mem[0000000030041400] = 000008c9 c9080000 | |
3020 | stda %f16,[%i1+%g0]0x89 ! Mem[0000000030041400] = 0000ff74 e0ffffff | |
3021 | ! %f23 = 1f92141b, Mem[0000000010081408] = ffffffff | |
3022 | sta %f23,[%i2+%o4]0x88 ! Mem[0000000010081408] = 1f92141b | |
3023 | ! %l4 = 0000000000000000, Mem[0000000030141408] = ff006ee777aa02f1 | |
3024 | stxa %l4,[%i5+%o4]0x81 ! Mem[0000000030141408] = 0000000000000000 | |
3025 | ! Mem[0000000030081400] = f8d13fed, %l7 = 000000000000006e | |
3026 | ldstuba [%i2+%g0]0x81,%l7 ! %l7 = 000000f8000000ff | |
3027 | ! Starting 10 instruction Load Burst | |
3028 | ! Mem[0000000030041400] = ffffffe0, %l3 = 00000000a58e0ac9 | |
3029 | lduwa [%i1+%g0]0x81,%l3 ! %l3 = 00000000ffffffe0 | |
3030 | ||
3031 | p0_label_67: | |
3032 | ! Mem[00000000300c1408] = e0ffffff0f105c1a, %l6 = 0000000000000000 | |
3033 | ldxa [%i3+%o4]0x89,%l6 ! %l6 = e0ffffff0f105c1a | |
3034 | ! Mem[0000000010081410] = ffffffff 185000ff, %l4 = 00000000, %l5 = 000008c9 | |
3035 | ldda [%i2+%o5]0x80,%l4 ! %l4 = 00000000ffffffff 00000000185000ff | |
3036 | ! Mem[0000000030041400] = 0000ff74e0ffffff, %f24 = 93180a74 d5706d98 | |
3037 | ldda [%i1+%g0]0x89,%f24 ! %f24 = 0000ff74 e0ffffff | |
3038 | ! Mem[0000000030081410] = e45d0fff, %l0 = 00000000a46f74ff | |
3039 | ldsba [%i2+%o5]0x89,%l0 ! %l0 = ffffffffffffffff | |
3040 | ! Mem[00000000211c0000] = fffffe0c, %l7 = 00000000000000f8 | |
3041 | ldub [%o2+%g0],%l7 ! %l7 = 00000000000000ff | |
3042 | ! Mem[0000000010081408] = c7ffffff1f92141b, %l3 = 00000000ffffffe0 | |
3043 | ldxa [%i2+%o4]0x88,%l3 ! %l3 = c7ffffff1f92141b | |
3044 | membar #Sync ! Added by membar checker (19) | |
3045 | ! Mem[0000000010141410] = ff849726 a695a673, %l2 = 00000000, %l3 = 1f92141b | |
3046 | ldd [%i5+%o5],%l2 ! %l2 = 00000000ff849726 00000000a695a673 | |
3047 | ! Mem[000000001010143c] = c9082d36, %l1 = 00000000ffad09a3 | |
3048 | lduw [%i4+0x03c],%l1 ! %l1 = 00000000c9082d36 | |
3049 | ! Mem[0000000010101408] = f102aa77, %l7 = 00000000000000ff | |
3050 | ldsha [%i4+%o4]0x80,%l7 ! %l7 = fffffffffffff102 | |
3051 | ! Starting 10 instruction Store Burst | |
3052 | ! %l4 = 00000000ffffffff, Mem[0000000030141408] = 0000000000000000 | |
3053 | stxa %l4,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000ffffffff | |
3054 | ||
3055 | p0_label_68: | |
3056 | ! Mem[0000000010041408] = 0000ff96, %l7 = fffffffffffff102 | |
3057 | swap [%i1+%o4],%l7 ! %l7 = 000000000000ff96 | |
3058 | ! Mem[0000000010101400] = 3fd01d6d, %l2 = 00000000ff849726 | |
3059 | ldstuba [%i4+%g0]0x80,%l2 ! %l2 = 0000003f000000ff | |
3060 | ! %f24 = 0000ff74 e0ffffff, Mem[0000000010001430] = f28a2c5e ffb8ffb0 | |
3061 | std %f24,[%i0+0x030] ! Mem[0000000010001430] = 0000ff74 e0ffffff | |
3062 | ! %l4 = ffffffff, %l5 = 185000ff, Mem[0000000030041400] = ffffffe0 74ff0000 | |
3063 | stda %l4,[%i1+%g0]0x81 ! Mem[0000000030041400] = ffffffff 185000ff | |
3064 | ! Mem[0000000030081408] = f102aa77, %l6 = e0ffffff0f105c1a | |
3065 | swapa [%i2+%o4]0x89,%l6 ! %l6 = 00000000f102aa77 | |
3066 | ! Mem[00000000201c0000] = ffff1669, %l3 = 00000000a695a673 | |
3067 | ldstub [%o0+%g0],%l3 ! %l3 = 000000ff000000ff | |
3068 | ! %l2 = 000000000000003f, Mem[0000000010041410] = d9876ee7 | |
3069 | stha %l2,[%i1+%o5]0x80 ! Mem[0000000010041410] = 003f6ee7 | |
3070 | ! %l2 = 000000000000003f, Mem[0000000010141408] = 0000ff74 | |
3071 | stba %l2,[%i5+%o4]0x88 ! Mem[0000000010141408] = 0000ff3f | |
3072 | ! Mem[0000000030081400] = ed3fd1ff, %l6 = 00000000f102aa77 | |
3073 | swapa [%i2+%g0]0x89,%l6 ! %l6 = 00000000ed3fd1ff | |
3074 | ! Starting 10 instruction Load Burst | |
3075 | ! Mem[00000000300c1408] = 1a5c100f, %l5 = 00000000185000ff | |
3076 | lduwa [%i3+%o4]0x81,%l5 ! %l5 = 000000001a5c100f | |
3077 | ||
3078 | p0_label_69: | |
3079 | ! Mem[0000000030181408] = 000008ff, %f11 = 8a708a3a | |
3080 | lda [%i6+%o4]0x89,%f11 ! %f11 = 000008ff | |
3081 | ! Mem[0000000010081400] = 1b14921f, %l0 = ffffffffffffffff | |
3082 | lduha [%i2+%g0]0x80,%l0 ! %l0 = 0000000000001b14 | |
3083 | ! Mem[0000000010141400] = ff746fa4, %f10 = 77aa02f1 | |
3084 | lda [%i5+%g0]0x80,%f10 ! %f10 = ff746fa4 | |
3085 | ! Mem[0000000030101400] = 00000000, %l4 = 00000000ffffffff | |
3086 | ldsha [%i4+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
3087 | ! Mem[0000000030141410] = 9c8eb8ff 1a008d0a, %l4 = 00000000, %l5 = 1a5c100f | |
3088 | ldda [%i5+%o5]0x89,%l4 ! %l4 = 000000001a008d0a 000000009c8eb8ff | |
3089 | ! Mem[0000000010181410] = 00b400001eeb13ed, %l5 = 000000009c8eb8ff | |
3090 | ldxa [%i6+%o5]0x88,%l5 ! %l5 = 00b400001eeb13ed | |
3091 | ! Mem[0000000030041400] = ffffffff, %l2 = 000000000000003f | |
3092 | ldsha [%i1+%g0]0x81,%l2 ! %l2 = ffffffffffffffff | |
3093 | ! Mem[0000000030101410] = ffffc900, %l1 = 00000000c9082d36 | |
3094 | ldsha [%i4+%o5]0x89,%l1 ! %l1 = ffffffffffffc900 | |
3095 | ! Mem[0000000010041408] = fffff102, %l1 = ffffffffffffc900 | |
3096 | lduwa [%i1+%o4]0x80,%l1 ! %l1 = 00000000fffff102 | |
3097 | ! Starting 10 instruction Store Burst | |
3098 | ! %f8 = 7a000000, Mem[0000000010001400] = 000000ff | |
3099 | sta %f8 ,[%i0+%g0]0x88 ! Mem[0000000010001400] = 7a000000 | |
3100 | ||
3101 | p0_label_70: | |
3102 | ! Mem[0000000010041410] = e76e3f00, %l2 = ffffffffffffffff | |
3103 | ldstuba [%i1+%o5]0x88,%l2 ! %l2 = 00000000000000ff | |
3104 | ! Mem[00000000300c1400] = d7988aff, %l4 = 000000001a008d0a | |
3105 | ldstuba [%i3+%g0]0x81,%l4 ! %l4 = 000000d7000000ff | |
3106 | ! %f30 = 362d08c9 00000000, %l5 = 00b400001eeb13ed | |
3107 | ! Mem[0000000010041408] = fffff1021acb8d6c | |
3108 | add %i1,0x008,%g1 | |
3109 | stda %f30,[%g1+%l5]ASI_PST8_P ! Mem[0000000010041408] = 362d080200008d00 | |
3110 | ! %l1 = 00000000fffff102, Mem[00000000300c1400] = ff8a98ff | |
3111 | stwa %l1,[%i3+%g0]0x89 ! Mem[00000000300c1400] = fffff102 | |
3112 | ! %l5 = 00b400001eeb13ed, Mem[00000000100c140b] = 000000c9 | |
3113 | stb %l5,[%i3+0x00b] ! Mem[00000000100c1408] = 000000ed | |
3114 | ! Mem[00000000100c1417] = a58e0ac9, %l3 = 00000000000000ff | |
3115 | ldstuba [%i3+0x017]%asi,%l3 ! %l3 = 000000c9000000ff | |
3116 | ! %l1 = 00000000fffff102, Mem[0000000010181418] = ca93dcbfe2f66f18 | |
3117 | stx %l1,[%i6+0x018] ! Mem[0000000010181418] = 00000000fffff102 | |
3118 | ! %l5 = 00b400001eeb13ed, Mem[00000000100c1410] = a46f74e4 | |
3119 | stha %l5,[%i3+%o5]0x88 ! Mem[00000000100c1410] = a46f13ed | |
3120 | ! %f16 = 0000ff74 e0ffffff, %l1 = 00000000fffff102 | |
3121 | ! Mem[0000000030041428] = 3d8bd50d767d008b | |
3122 | add %i1,0x028,%g1 | |
3123 | stda %f16,[%g1+%l1]ASI_PST16_S ! Mem[0000000030041428] = 3d8bd50de0ff008b | |
3124 | ! Starting 10 instruction Load Burst | |
3125 | ! Mem[0000000010141410] = 269784ff, %l7 = 000000000000ff96 | |
3126 | lduwa [%i5+%o5]0x88,%l7 ! %l7 = 00000000269784ff | |
3127 | ||
3128 | ! Check Point 14 for processor 0 | |
3129 | ||
3130 | set p0_check_pt_data_14,%g4 | |
3131 | rd %ccr,%g5 ! %g5 = 44 | |
3132 | ldx [%g4+0x08],%g2 | |
3133 | cmp %l0,%g2 ! %l0 = 0000000000001b14 | |
3134 | bne %xcc,p0_reg_check_fail0 | |
3135 | mov 0xee0,%g1 | |
3136 | ldx [%g4+0x10],%g2 | |
3137 | cmp %l1,%g2 ! %l1 = 00000000fffff102 | |
3138 | bne %xcc,p0_reg_check_fail1 | |
3139 | mov 0xee1,%g1 | |
3140 | ldx [%g4+0x18],%g2 | |
3141 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
3142 | bne %xcc,p0_reg_check_fail2 | |
3143 | mov 0xee2,%g1 | |
3144 | ldx [%g4+0x20],%g2 | |
3145 | cmp %l3,%g2 ! %l3 = 00000000000000c9 | |
3146 | bne %xcc,p0_reg_check_fail3 | |
3147 | mov 0xee3,%g1 | |
3148 | ldx [%g4+0x28],%g2 | |
3149 | cmp %l4,%g2 ! %l4 = 00000000000000d7 | |
3150 | bne %xcc,p0_reg_check_fail4 | |
3151 | mov 0xee4,%g1 | |
3152 | ldx [%g4+0x30],%g2 | |
3153 | cmp %l5,%g2 ! %l5 = 00b400001eeb13ed | |
3154 | bne %xcc,p0_reg_check_fail5 | |
3155 | mov 0xee5,%g1 | |
3156 | ldx [%g4+0x38],%g2 | |
3157 | cmp %l6,%g2 ! %l6 = 00000000ed3fd1ff | |
3158 | bne %xcc,p0_reg_check_fail6 | |
3159 | mov 0xee6,%g1 | |
3160 | ldx [%g4+0x40],%g2 | |
3161 | cmp %l7,%g2 ! %l7 = 00000000269784ff | |
3162 | bne %xcc,p0_reg_check_fail7 | |
3163 | mov 0xee7,%g1 | |
3164 | ldx [%g4+0x48],%g3 | |
3165 | std %f2,[%g4] | |
3166 | ldx [%g4],%g2 | |
3167 | cmp %g3,%g2 ! %f2 = 4d072a78 00000000 | |
3168 | bne %xcc,p0_freg_check_fail | |
3169 | mov 0xf02,%g1 | |
3170 | ldx [%g4+0x50],%g3 | |
3171 | std %f4,[%g4] | |
3172 | ldx [%g4],%g2 | |
3173 | cmp %g3,%g2 ! %f4 = ed13eb1e 0000b400 | |
3174 | bne %xcc,p0_freg_check_fail | |
3175 | mov 0xf04,%g1 | |
3176 | ldx [%g4+0x58],%g3 | |
3177 | std %f10,[%g4] | |
3178 | ldx [%g4],%g2 | |
3179 | cmp %g3,%g2 ! %f10 = ff746fa4 000008ff | |
3180 | bne %xcc,p0_freg_check_fail | |
3181 | mov 0xf10,%g1 | |
3182 | ldx [%g4+0x60],%g3 | |
3183 | std %f24,[%g4] | |
3184 | ldx [%g4],%g2 | |
3185 | cmp %g3,%g2 ! %f24 = 0000ff74 e0ffffff | |
3186 | bne %xcc,p0_freg_check_fail | |
3187 | mov 0xf24,%g1 | |
3188 | ||
3189 | ! Check Point 14 completed | |
3190 | ||
3191 | ||
3192 | p0_label_71: | |
3193 | ! Mem[0000000010081428] = 12ffe8ddc79c2645, %f28 = f28a2c5e ffb8ffb0 | |
3194 | ldd [%i2+0x028],%f28 ! %f28 = 12ffe8dd c79c2645 | |
3195 | ! Mem[0000000010101410] = 269784ff, %l2 = 0000000000000000 | |
3196 | ldsha [%i4+%o5]0x80,%l2 ! %l2 = 0000000000002697 | |
3197 | ! Mem[00000000100c1400] = a58e0ac9, %f18 = ff006ee7 | |
3198 | lda [%i3+%g0]0x88,%f18 ! %f18 = a58e0ac9 | |
3199 | ! Mem[0000000010141408] = 3fff000000000000, %f14 = f28a2c5e ffb8ffb0 | |
3200 | ldda [%i5+%o4]0x80,%f14 ! %f14 = 3fff0000 00000000 | |
3201 | ! Mem[0000000010141400] = a46f74ff, %l3 = 00000000000000c9 | |
3202 | lduha [%i5+%g0]0x88,%l3 ! %l3 = 00000000000074ff | |
3203 | ! Mem[0000000010041410] = ff3f6ee7, %l7 = 00000000269784ff | |
3204 | lduba [%i1+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
3205 | ! Mem[00000000100c1410] = ed136fa4, %l0 = 0000000000001b14 | |
3206 | lduba [%i3+%o5]0x80,%l0 ! %l0 = 00000000000000ed | |
3207 | ! Mem[0000000010001400] = 0000007a6d1dd03f, %l0 = 00000000000000ed | |
3208 | ldxa [%i0+0x000]%asi,%l0 ! %l0 = 0000007a6d1dd03f | |
3209 | ! Mem[0000000030101400] = 00000000 caffffff, %l0 = 6d1dd03f, %l1 = fffff102 | |
3210 | ldda [%i4+%g0]0x81,%l0 ! %l0 = 0000000000000000 00000000caffffff | |
3211 | ! Starting 10 instruction Store Burst | |
3212 | ! Mem[00000000100c1408] = 000000ed, %l2 = 0000000000002697, %asi = 80 | |
3213 | swapa [%i3+0x008]%asi,%l2 ! %l2 = 00000000000000ed | |
3214 | ||
3215 | p0_label_72: | |
3216 | ! Mem[00000000100c1400] = c90a8ea5, %l1 = 00000000caffffff | |
3217 | ldstuba [%i3+%g0]0x80,%l1 ! %l1 = 000000c9000000ff | |
3218 | ! %f14 = 3fff0000, Mem[0000000030081400] = 77aa02f1 | |
3219 | sta %f14,[%i2+%g0]0x81 ! Mem[0000000030081400] = 3fff0000 | |
3220 | ! Mem[0000000030081410] = ff0f5de4, %l0 = 0000000000000000 | |
3221 | swapa [%i2+%o5]0x81,%l0 ! %l0 = 00000000ff0f5de4 | |
3222 | ! %f20 = 0a8d001a, Mem[0000000010141410] = ff849726 | |
3223 | sta %f20,[%i5+%o5]0x80 ! Mem[0000000010141410] = 0a8d001a | |
3224 | ! Mem[0000000030141408] = 00000000, %l5 = 00b400001eeb13ed | |
3225 | ldstuba [%i5+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
3226 | ! %l0 = 00000000ff0f5de4, Mem[00000000300c1410] = 1a5c100f | |
3227 | stha %l0,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 5de4100f | |
3228 | ! %l3 = 00000000000074ff, Mem[0000000030001400] = f28a2c5e5bb55116 | |
3229 | stxa %l3,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00000000000074ff | |
3230 | ! %l0 = 00000000ff0f5de4, Mem[00000000100c1430] = c90a8ea5 | |
3231 | sth %l0,[%i3+0x030] ! Mem[00000000100c1430] = 5de48ea5 | |
3232 | ! %l5 = 0000000000000000, Mem[0000000030081408] = 1a5c100f8a708a3a | |
3233 | stxa %l5,[%i2+%o4]0x81 ! Mem[0000000030081408] = 0000000000000000 | |
3234 | ! Starting 10 instruction Load Burst | |
3235 | ! Mem[0000000030101400] = 00000000 caffffff ffffffff ffffffff | |
3236 | ! Mem[0000000030101410] = 00c9ffff 269784ff 5e9e1157 6b6c2202 | |
3237 | ! Mem[0000000030101420] = 3bedac39 d81a5b92 c78091bb 759a4764 | |
3238 | ! Mem[0000000030101430] = fac65f36 9ce0b68a 46ee6de4 c49410cd | |
3239 | ldda [%i4]ASI_BLK_S,%f0 ! Block Load from 0000000030101400 | |
3240 | ||
3241 | p0_label_73: | |
3242 | ! Mem[0000000030001408] = ff746fa4, %l6 = 00000000ed3fd1ff | |
3243 | lduwa [%i0+%o4]0x81,%l6 ! %l6 = 00000000ff746fa4 | |
3244 | ! Mem[0000000010041410] = ed3fd1f8e76e3fff, %l2 = 00000000000000ed | |
3245 | ldxa [%i1+%o5]0x88,%l2 ! %l2 = ed3fd1f8e76e3fff | |
3246 | ! Mem[0000000010041420] = ff849726d7428e9c, %l0 = 00000000ff0f5de4 | |
3247 | ldxa [%i1+0x020]%asi,%l0 ! %l0 = ff849726d7428e9c | |
3248 | ! Mem[0000000010041410] = ff3f6ee7, %f26 = faa3f94d | |
3249 | lda [%i1+0x010]%asi,%f26 ! %f26 = ff3f6ee7 | |
3250 | ! Mem[0000000010081430] = 99a6fa7b, %l4 = 00000000000000d7 | |
3251 | ldsh [%i2+0x032],%l4 ! %l4 = fffffffffffffa7b | |
3252 | ! Mem[0000000010181400] = ff8d001a, %l0 = ff849726d7428e9c | |
3253 | ldsba [%i6+%g0]0x80,%l0 ! %l0 = ffffffffffffffff | |
3254 | ! Mem[0000000030001408] = 00000000a46f74ff, %f26 = ff3f6ee7 a309ade0 | |
3255 | ldda [%i0+%o4]0x89,%f26 ! %f26 = 00000000 a46f74ff | |
3256 | ! Mem[00000000300c1410] = 0f10e45d, %l7 = 00000000000000ff | |
3257 | lduha [%i3+%o5]0x89,%l7 ! %l7 = 000000000000e45d | |
3258 | ! Mem[00000000100c1408] = 00002697, %l0 = ffffffffffffffff | |
3259 | lduwa [%i3+%o4]0x80,%l0 ! %l0 = 0000000000002697 | |
3260 | ! Starting 10 instruction Store Burst | |
3261 | ! %l3 = 00000000000074ff, Mem[0000000030001408] = ff746fa400000000 | |
3262 | stxa %l3,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000000074ff | |
3263 | ||
3264 | p0_label_74: | |
3265 | membar #Sync ! Added by membar checker (20) | |
3266 | ! %l6 = 00000000ff746fa4, Mem[0000000030101400] = 00000000 | |
3267 | stba %l6,[%i4+%g0]0x81 ! Mem[0000000030101400] = a4000000 | |
3268 | ! %l7 = 000000000000e45d, Mem[0000000030001408] = 00000000 | |
3269 | stwa %l7,[%i0+%o4]0x89 ! Mem[0000000030001408] = 0000e45d | |
3270 | ! %l0 = 0000000000002697, Mem[0000000010181400] = 1a008dff | |
3271 | stba %l0,[%i6+%g0]0x88 ! Mem[0000000010181400] = 1a008d97 | |
3272 | ! Mem[0000000010081400] = 1b14921f, %l7 = 000000000000e45d | |
3273 | swapa [%i2+%g0]0x80,%l7 ! %l7 = 000000001b14921f | |
3274 | ! %l1 = 00000000000000c9, Mem[0000000030041408] = 00000000 | |
3275 | stha %l1,[%i1+%o4]0x89 ! Mem[0000000030041408] = 000000c9 | |
3276 | ! %f16 = 0000ff74 e0ffffff a58e0ac9 77aa02f1 | |
3277 | ! %f20 = 0a8d001a ffb88e9c 6cbc4fa7 1f92141b | |
3278 | ! %f24 = 0000ff74 e0ffffff 00000000 a46f74ff | |
3279 | ! %f28 = 12ffe8dd c79c2645 362d08c9 00000000 | |
3280 | stda %f16,[%i3]ASI_BLK_PL ! Block Store to 00000000100c1400 | |
3281 | ! Mem[0000000030081410] = 00000000, %l7 = 000000001b14921f | |
3282 | ldstuba [%i2+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
3283 | ! %l4 = fffffffffffffa7b, Mem[00000000100c1434] = dde8ff12 | |
3284 | sth %l4,[%i3+0x034] ! Mem[00000000100c1434] = fa7bff12 | |
3285 | ! %l7 = 0000000000000000, Mem[00000000300c1410] = 5de4100f | |
3286 | stwa %l7,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 00000000 | |
3287 | ! Starting 10 instruction Load Burst | |
3288 | ! Mem[0000000021800140] = 5b30f8a0, %l1 = 00000000000000c9 | |
3289 | lduh [%o3+0x140],%l1 ! %l1 = 0000000000005b30 | |
3290 | ||
3291 | p0_label_75: | |
3292 | ! Mem[0000000030141400] = ffffffe074ff0000, %f14 = 46ee6de4 c49410cd | |
3293 | ldda [%i5+%g0]0x89,%f14 ! %f14 = ffffffe0 74ff0000 | |
3294 | ! Mem[00000000211c0000] = fffffe0c, %l3 = 00000000000074ff | |
3295 | lduba [%o2+0x001]%asi,%l3 ! %l3 = 00000000000000ff | |
3296 | ! Mem[0000000010081400] = 0000e45d, %l6 = 00000000ff746fa4 | |
3297 | lduha [%i2+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
3298 | ! Mem[0000000010001410] = 00000000, %l4 = fffffffffffffa7b | |
3299 | ldsha [%i0+0x012]%asi,%l4 ! %l4 = 0000000000000000 | |
3300 | ! Mem[0000000030041408] = 000000c9, %l0 = 0000000000002697 | |
3301 | lduha [%i1+%o4]0x89,%l0 ! %l0 = 00000000000000c9 | |
3302 | ! Mem[000000001004142c] = 33c4a113, %l3 = 00000000000000ff | |
3303 | ldsw [%i1+0x02c],%l3 ! %l3 = 0000000033c4a113 | |
3304 | ! Mem[0000000030041400] = ffffffff185000ff, %l0 = 00000000000000c9 | |
3305 | ldxa [%i1+%g0]0x81,%l0 ! %l0 = ffffffff185000ff | |
3306 | ! Mem[0000000010081400] = 5de40000, %l4 = 0000000000000000 | |
3307 | ldsba [%i2+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
3308 | ! %f8 = 3bedac39 d81a5b92, Mem[0000000010041428] = 5d7ae4e4 33c4a113 | |
3309 | stda %f8 ,[%i1+0x028]%asi ! Mem[0000000010041428] = 3bedac39 d81a5b92 | |
3310 | ! Starting 10 instruction Store Burst | |
3311 | ! %l0 = ffffffff185000ff, Mem[0000000030001410] = ffffffff | |
3312 | stwa %l0,[%i0+%o5]0x81 ! Mem[0000000030001410] = 185000ff | |
3313 | ||
3314 | ! Check Point 15 for processor 0 | |
3315 | ||
3316 | set p0_check_pt_data_15,%g4 | |
3317 | rd %ccr,%g5 ! %g5 = 44 | |
3318 | ldx [%g4+0x08],%g2 | |
3319 | cmp %l0,%g2 ! %l0 = ffffffff185000ff | |
3320 | bne %xcc,p0_reg_check_fail0 | |
3321 | mov 0xee0,%g1 | |
3322 | ldx [%g4+0x10],%g2 | |
3323 | cmp %l1,%g2 ! %l1 = 0000000000005b30 | |
3324 | bne %xcc,p0_reg_check_fail1 | |
3325 | mov 0xee1,%g1 | |
3326 | ldx [%g4+0x18],%g2 | |
3327 | cmp %l2,%g2 ! %l2 = ed3fd1f8e76e3fff | |
3328 | bne %xcc,p0_reg_check_fail2 | |
3329 | mov 0xee2,%g1 | |
3330 | ldx [%g4+0x20],%g2 | |
3331 | cmp %l3,%g2 ! %l3 = 0000000033c4a113 | |
3332 | bne %xcc,p0_reg_check_fail3 | |
3333 | mov 0xee3,%g1 | |
3334 | ldx [%g4+0x28],%g2 | |
3335 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
3336 | bne %xcc,p0_reg_check_fail4 | |
3337 | mov 0xee4,%g1 | |
3338 | ldx [%g4+0x30],%g2 | |
3339 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
3340 | bne %xcc,p0_reg_check_fail5 | |
3341 | mov 0xee5,%g1 | |
3342 | ldx [%g4+0x38],%g2 | |
3343 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
3344 | bne %xcc,p0_reg_check_fail6 | |
3345 | mov 0xee6,%g1 | |
3346 | ldx [%g4+0x40],%g2 | |
3347 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
3348 | bne %xcc,p0_reg_check_fail7 | |
3349 | mov 0xee7,%g1 | |
3350 | ldx [%g4+0x48],%g3 | |
3351 | std %f0,[%g4] | |
3352 | ldx [%g4],%g2 | |
3353 | cmp %g3,%g2 ! %f0 = 00000000 caffffff | |
3354 | bne %xcc,p0_freg_check_fail | |
3355 | mov 0xf00,%g1 | |
3356 | ldx [%g4+0x50],%g3 | |
3357 | std %f2,[%g4] | |
3358 | ldx [%g4],%g2 | |
3359 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
3360 | bne %xcc,p0_freg_check_fail | |
3361 | mov 0xf02,%g1 | |
3362 | ldx [%g4+0x58],%g3 | |
3363 | std %f4,[%g4] | |
3364 | ldx [%g4],%g2 | |
3365 | cmp %g3,%g2 ! %f4 = 00c9ffff 269784ff | |
3366 | bne %xcc,p0_freg_check_fail | |
3367 | mov 0xf04,%g1 | |
3368 | ldx [%g4+0x60],%g3 | |
3369 | std %f6,[%g4] | |
3370 | ldx [%g4],%g2 | |
3371 | cmp %g3,%g2 ! %f6 = 5e9e1157 6b6c2202 | |
3372 | bne %xcc,p0_freg_check_fail | |
3373 | mov 0xf06,%g1 | |
3374 | ldx [%g4+0x68],%g3 | |
3375 | std %f8,[%g4] | |
3376 | ldx [%g4],%g2 | |
3377 | cmp %g3,%g2 ! %f8 = 3bedac39 d81a5b92 | |
3378 | bne %xcc,p0_freg_check_fail | |
3379 | mov 0xf08,%g1 | |
3380 | ldx [%g4+0x70],%g3 | |
3381 | std %f10,[%g4] | |
3382 | ldx [%g4],%g2 | |
3383 | cmp %g3,%g2 ! %f10 = c78091bb 759a4764 | |
3384 | bne %xcc,p0_freg_check_fail | |
3385 | mov 0xf10,%g1 | |
3386 | ldx [%g4+0x78],%g3 | |
3387 | std %f12,[%g4] | |
3388 | ldx [%g4],%g2 | |
3389 | cmp %g3,%g2 ! %f12 = fac65f36 9ce0b68a | |
3390 | bne %xcc,p0_freg_check_fail | |
3391 | mov 0xf12,%g1 | |
3392 | ldx [%g4+0x80],%g3 | |
3393 | std %f14,[%g4] | |
3394 | ldx [%g4],%g2 | |
3395 | cmp %g3,%g2 ! %f14 = ffffffe0 74ff0000 | |
3396 | bne %xcc,p0_freg_check_fail | |
3397 | mov 0xf14,%g1 | |
3398 | ldx [%g4+0x88],%g3 | |
3399 | std %f18,[%g4] | |
3400 | ldx [%g4],%g2 | |
3401 | cmp %g3,%g2 ! %f18 = a58e0ac9 77aa02f1 | |
3402 | bne %xcc,p0_freg_check_fail | |
3403 | mov 0xf18,%g1 | |
3404 | ldx [%g4+0x90],%g3 | |
3405 | std %f26,[%g4] | |
3406 | ldx [%g4],%g2 | |
3407 | cmp %g3,%g2 ! %f26 = 00000000 a46f74ff | |
3408 | bne %xcc,p0_freg_check_fail | |
3409 | mov 0xf26,%g1 | |
3410 | ldx [%g4+0x98],%g3 | |
3411 | std %f28,[%g4] | |
3412 | ldx [%g4],%g2 | |
3413 | cmp %g3,%g2 ! %f28 = 12ffe8dd c79c2645 | |
3414 | bne %xcc,p0_freg_check_fail | |
3415 | mov 0xf28,%g1 | |
3416 | ||
3417 | ! Check Point 15 completed | |
3418 | ||
3419 | ||
3420 | p0_label_76: | |
3421 | ! Mem[00000000300c1410] = 00000000, %l1 = 0000000000005b30 | |
3422 | swapa [%i3+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
3423 | ! %l1 = 0000000000000000, Mem[000000001004140e] = 00008d00 | |
3424 | sth %l1,[%i1+0x00e] ! Mem[000000001004140c] = 00000000 | |
3425 | ! Mem[0000000030001410] = 185000ff, %l1 = 0000000000000000 | |
3426 | swapa [%i0+%o5]0x81,%l1 ! %l1 = 00000000185000ff | |
3427 | ! %l2 = ed3fd1f8e76e3fff, Mem[0000000030001410] = 00000000 | |
3428 | stwa %l2,[%i0+%o5]0x81 ! Mem[0000000030001410] = e76e3fff | |
3429 | ! Mem[0000000030001408] = 0000e45d, %l3 = 0000000033c4a113 | |
3430 | swapa [%i0+%o4]0x89,%l3 ! %l3 = 000000000000e45d | |
3431 | ! Mem[0000000030081410] = 000000ff, %l2 = ed3fd1f8e76e3fff | |
3432 | swapa [%i2+%o5]0x89,%l2 ! %l2 = 00000000000000ff | |
3433 | ! %l7 = 0000000000000000, Mem[0000000010041410] = ff3f6ee7 | |
3434 | stha %l7,[%i1+%o5]0x80 ! Mem[0000000010041410] = 00006ee7 | |
3435 | ! %l6 = 0000000000000000, Mem[0000000010101410] = ff849726 | |
3436 | stba %l6,[%i4+%o5]0x88 ! Mem[0000000010101410] = ff849700 | |
3437 | ! %l5 = 0000000000000000, Mem[0000000030001400] = 000074ff | |
3438 | stba %l5,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00007400 | |
3439 | ! Starting 10 instruction Load Burst | |
3440 | ! Mem[0000000010081400] = 0000e45d, %l7 = 0000000000000000 | |
3441 | ldsha [%i2+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
3442 | ||
3443 | p0_label_77: | |
3444 | membar #Sync ! Added by membar checker (21) | |
3445 | ! Mem[0000000010181400] = 978d001a ffffffe0 d7988aff 782a074d | |
3446 | ! Mem[0000000010181410] = ed13eb1e 0000b400 00000000 fffff102 | |
3447 | ! Mem[0000000010181420] = 2ce65c7f 0000007a 0000008a 000000e5 | |
3448 | ! Mem[0000000010181430] = fa7bc046 fff9275e 00630000 0000006e | |
3449 | ldda [%i6]ASI_BLK_AIUP,%f16 ! Block Load from 0000000010181400 | |
3450 | ! Mem[0000000010141400] = a46f74ff, %l3 = 000000000000e45d | |
3451 | lduwa [%i5+%g0]0x88,%l3 ! %l3 = 00000000a46f74ff | |
3452 | ! Mem[00000000201c0000] = ffff1669, %l5 = 0000000000000000 | |
3453 | ldsh [%o0+%g0],%l5 ! %l5 = ffffffffffffffff | |
3454 | ! Mem[0000000030101408] = ffffffff, %l7 = 0000000000000000 | |
3455 | lduba [%i4+%o4]0x89,%l7 ! %l7 = 00000000000000ff | |
3456 | ! Mem[0000000010141428] = 7d2a31b6, %l4 = 0000000000000000 | |
3457 | lduwa [%i5+0x028]%asi,%l4 ! %l4 = 000000007d2a31b6 | |
3458 | ! Mem[0000000010181434] = fff9275e, %f11 = 759a4764 | |
3459 | ld [%i6+0x034],%f11 ! %f11 = fff9275e | |
3460 | ! Mem[0000000010001418] = d9876ee7, %f11 = fff9275e | |
3461 | ld [%i0+0x018],%f11 ! %f11 = d9876ee7 | |
3462 | ! Mem[0000000030041410] = 000008c9, %l1 = 00000000185000ff | |
3463 | lduba [%i1+%o5]0x89,%l1 ! %l1 = 00000000000000c9 | |
3464 | ! Mem[00000000100c1438] = 00000000, %f8 = 3bedac39 | |
3465 | lda [%i3+0x038]%asi,%f8 ! %f8 = 00000000 | |
3466 | ! Starting 10 instruction Store Burst | |
3467 | membar #Sync ! Added by membar checker (22) | |
3468 | ! %f8 = 00000000 d81a5b92, Mem[0000000010181410] = ed13eb1e 0000b400 | |
3469 | stda %f8 ,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00000000 d81a5b92 | |
3470 | ||
3471 | p0_label_78: | |
3472 | ! Mem[00000000100c1400] = ffffffe0, %l6 = 0000000000000000 | |
3473 | ldstuba [%i3+%g0]0x80,%l6 ! %l6 = 000000ff000000ff | |
3474 | ! Mem[00000000100c1435] = fa7bff12, %l2 = 00000000000000ff | |
3475 | ldstuba [%i3+0x035]%asi,%l2 ! %l2 = 0000007b000000ff | |
3476 | ! %l5 = ffffffffffffffff, Mem[0000000030081400] = 0000ff3f | |
3477 | stba %l5,[%i2+%g0]0x89 ! Mem[0000000030081400] = 0000ffff | |
3478 | ! %l5 = ffffffffffffffff, Mem[0000000010041434] = fff9275e, %asi = 80 | |
3479 | stha %l5,[%i1+0x034]%asi ! Mem[0000000010041434] = ffff275e | |
3480 | ! %l4 = 000000007d2a31b6, Mem[0000000010001400] = 0000007a | |
3481 | stwa %l4,[%i0+%g0]0x80 ! Mem[0000000010001400] = 7d2a31b6 | |
3482 | ! %l7 = 00000000000000ff, Mem[0000000030181410] = 0051b8ffc6e78d0a | |
3483 | stxa %l7,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000000000ff | |
3484 | ! %f16 = 978d001a ffffffe0 d7988aff 782a074d | |
3485 | ! %f20 = ed13eb1e 0000b400 00000000 fffff102 | |
3486 | ! %f24 = 2ce65c7f 0000007a 0000008a 000000e5 | |
3487 | ! %f28 = fa7bc046 fff9275e 00630000 0000006e | |
3488 | stda %f16,[%i4]ASI_BLK_PL ! Block Store to 0000000010101400 | |
3489 | membar #Sync ! Added by membar checker (23) | |
3490 | ! Mem[0000000010101410] = 00b40000, %l6 = 00000000000000ff | |
3491 | ldstuba [%i4+%o5]0x80,%l6 ! %l6 = 00000000000000ff | |
3492 | ! Mem[0000000010041400] = ffffffe0, %l7 = 00000000000000ff | |
3493 | swapa [%i1+%g0]0x80,%l7 ! %l7 = 00000000ffffffe0 | |
3494 | ! Starting 10 instruction Load Burst | |
3495 | ! Mem[00000000211c0000] = fffffe0c, %l7 = 00000000ffffffe0 | |
3496 | ldsha [%o2+0x000]%asi,%l7 ! %l7 = ffffffffffffffff | |
3497 | ||
3498 | p0_label_79: | |
3499 | ! Mem[0000000030001400] = 0074000000000000, %l2 = 000000000000007b | |
3500 | ldxa [%i0+%g0]0x81,%l2 ! %l2 = 0074000000000000 | |
3501 | ! Mem[0000000021800100] = ff0e39e7, %l4 = 000000007d2a31b6 | |
3502 | ldsh [%o3+0x100],%l4 ! %l4 = ffffffffffffff0e | |
3503 | ! Mem[0000000010141400] = a46f74ff, %l4 = ffffffffffffff0e | |
3504 | ldsha [%i5+%g0]0x88,%l4 ! %l4 = 00000000000074ff | |
3505 | ! Mem[00000000100c1400] = ffffffe0, %l3 = 00000000a46f74ff | |
3506 | ldsba [%i3+%g0]0x80,%l3 ! %l3 = ffffffffffffffff | |
3507 | ! Mem[00000000218000c0] = 8ae24e2c, %l6 = 0000000000000000 | |
3508 | lduha [%o3+0x0c0]%asi,%l6 ! %l6 = 0000000000008ae2 | |
3509 | ! Mem[0000000010001414] = 1a5c100f, %l5 = ffffffffffffffff | |
3510 | ldub [%i0+0x016],%l5 ! %l5 = 0000000000000010 | |
3511 | ! Mem[0000000030141408] = ff000000, %l0 = ffffffff185000ff | |
3512 | lduba [%i5+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
3513 | ! Mem[0000000010081438] = c6e7a17a, %l4 = 00000000000074ff | |
3514 | lduw [%i2+0x038],%l4 ! %l4 = 00000000c6e7a17a | |
3515 | ! Mem[0000000030181400] = c90a8ea5 00000000, %l4 = c6e7a17a, %l5 = 00000010 | |
3516 | ldda [%i6+%g0]0x89,%l4 ! %l4 = 0000000000000000 00000000c90a8ea5 | |
3517 | ! Starting 10 instruction Store Burst | |
3518 | ! %l5 = 00000000c90a8ea5, Mem[0000000030041400] = ffffffff | |
3519 | stba %l5,[%i1+%g0]0x89 ! Mem[0000000030041400] = ffffffa5 | |
3520 | ||
3521 | p0_label_80: | |
3522 | ! %f30 = 00630000 0000006e, Mem[0000000010181408] = ff8a98d7 4d072a78 | |
3523 | stda %f30,[%i6+%o4]0x88 ! Mem[0000000010181408] = 00630000 0000006e | |
3524 | ! %f12 = fac65f36 9ce0b68a, %l7 = ffffffffffffffff | |
3525 | ! Mem[0000000010141408] = 3fff000000000000 | |
3526 | add %i5,0x008,%g1 | |
3527 | stda %f12,[%g1+%l7]ASI_PST16_PL ! Mem[0000000010141408] = 8ab6e09c365fc6fa | |
3528 | ! %l4 = 0000000000000000, Mem[0000000010141400] = ff746fa4 | |
3529 | stba %l4,[%i5+%g0]0x80 ! Mem[0000000010141400] = 00746fa4 | |
3530 | ! %f9 = d81a5b92, Mem[0000000010081410] = ffffffff | |
3531 | sta %f9 ,[%i2+%o5]0x80 ! Mem[0000000010081410] = d81a5b92 | |
3532 | ! Code Fragment 4 | |
3533 | p0_fragment_2: | |
3534 | ! %l0 = 00000000000000ff | |
3535 | setx 0xb3e0b5f071f2aade,%g7,%l0 ! %l0 = b3e0b5f071f2aade | |
3536 | ! %l1 = 00000000000000c9 | |
3537 | setx 0x57a20b406ad73ff2,%g7,%l1 ! %l1 = 57a20b406ad73ff2 | |
3538 | setx 0x7ff8, %g1, %g2 | |
3539 | and %l0, %g2, %l0 | |
3540 | setx 0xffffffff, %g1, %g2 | |
3541 | and %l1, %g2, %l1 | |
3542 | setx 0x100000000, %g1, %g2 | |
3543 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
3544 | ta T_CHANGE_HPRIV | |
3545 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
3546 | ta T_CHANGE_NONHPRIV | |
3547 | ! %l0 = b3e0b5f071f2aade | |
3548 | setx 0x8f25cdd8432c3eb6,%g7,%l0 ! %l0 = 8f25cdd8432c3eb6 | |
3549 | ! %l1 = 57a20b406ad73ff2 | |
3550 | setx 0xf9726fefe7092e9d,%g7,%l1 ! %l1 = f9726fefe7092e9d | |
3551 | ! %l4 = 00000000, %l5 = c90a8ea5, Mem[0000000010041400] = ff000000 84000000 | |
3552 | stda %l4,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 c90a8ea5 | |
3553 | ! Mem[0000000010181408] = 6e00000000006300, %l4 = 0000000000000000, %l6 = 0000000000008ae2 | |
3554 | add %i6,0x08,%g1 | |
3555 | casxa [%g1]0x80,%l4,%l6 ! %l6 = 6e00000000006300 | |
3556 | ! Mem[0000000030101408] = ffffffff, %l7 = ffffffffffffffff | |
3557 | swapa [%i4+%o4]0x81,%l7 ! %l7 = 00000000ffffffff | |
3558 | ! Mem[0000000030081410] = ff3f6ee7, %l4 = 0000000000000000 | |
3559 | ldstuba [%i2+%o5]0x81,%l4 ! %l4 = 000000ff000000ff | |
3560 | ! Starting 10 instruction Load Burst | |
3561 | ! Mem[0000000010141410] = 0a8d001a, %l3 = ffffffffffffffff | |
3562 | ldsba [%i5+%o5]0x80,%l3 ! %l3 = 000000000000000a | |
3563 | ||
3564 | ! Check Point 16 for processor 0 | |
3565 | ||
3566 | set p0_check_pt_data_16,%g4 | |
3567 | rd %ccr,%g5 ! %g5 = 44 | |
3568 | ldx [%g4+0x08],%g2 | |
3569 | cmp %l0,%g2 ! %l0 = 8f25cdd8432c3eb6 | |
3570 | bne %xcc,p0_reg_check_fail0 | |
3571 | mov 0xee0,%g1 | |
3572 | ldx [%g4+0x10],%g2 | |
3573 | cmp %l1,%g2 ! %l1 = f9726fefe7092e9d | |
3574 | bne %xcc,p0_reg_check_fail1 | |
3575 | mov 0xee1,%g1 | |
3576 | ldx [%g4+0x18],%g2 | |
3577 | cmp %l2,%g2 ! %l2 = 0074000000000000 | |
3578 | bne %xcc,p0_reg_check_fail2 | |
3579 | mov 0xee2,%g1 | |
3580 | ldx [%g4+0x20],%g2 | |
3581 | cmp %l3,%g2 ! %l3 = 000000000000000a | |
3582 | bne %xcc,p0_reg_check_fail3 | |
3583 | mov 0xee3,%g1 | |
3584 | ldx [%g4+0x28],%g2 | |
3585 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
3586 | bne %xcc,p0_reg_check_fail4 | |
3587 | mov 0xee4,%g1 | |
3588 | ldx [%g4+0x30],%g2 | |
3589 | cmp %l5,%g2 ! %l5 = 00000000c90a8ea5 | |
3590 | bne %xcc,p0_reg_check_fail5 | |
3591 | mov 0xee5,%g1 | |
3592 | ldx [%g4+0x38],%g2 | |
3593 | cmp %l6,%g2 ! %l6 = 6e00000000006300 | |
3594 | bne %xcc,p0_reg_check_fail6 | |
3595 | mov 0xee6,%g1 | |
3596 | ldx [%g4+0x40],%g2 | |
3597 | cmp %l7,%g2 ! %l7 = 00000000ffffffff | |
3598 | bne %xcc,p0_reg_check_fail7 | |
3599 | mov 0xee7,%g1 | |
3600 | ldx [%g4+0x48],%g3 | |
3601 | std %f4,[%g4] | |
3602 | ldx [%g4],%g2 | |
3603 | cmp %g3,%g2 ! %f4 = 00c9ffff 269784ff | |
3604 | bne %xcc,p0_freg_check_fail | |
3605 | mov 0xf04,%g1 | |
3606 | ldx [%g4+0x50],%g3 | |
3607 | std %f8,[%g4] | |
3608 | ldx [%g4],%g2 | |
3609 | cmp %g3,%g2 ! %f8 = 00000000 d81a5b92 | |
3610 | bne %xcc,p0_freg_check_fail | |
3611 | mov 0xf08,%g1 | |
3612 | ldx [%g4+0x58],%g3 | |
3613 | std %f10,[%g4] | |
3614 | ldx [%g4],%g2 | |
3615 | cmp %g3,%g2 ! %f10 = c78091bb d9876ee7 | |
3616 | bne %xcc,p0_freg_check_fail | |
3617 | mov 0xf10,%g1 | |
3618 | ldx [%g4+0x60],%g3 | |
3619 | std %f16,[%g4] | |
3620 | ldx [%g4],%g2 | |
3621 | cmp %g3,%g2 ! %f16 = 978d001a ffffffe0 | |
3622 | bne %xcc,p0_freg_check_fail | |
3623 | mov 0xf16,%g1 | |
3624 | ldx [%g4+0x68],%g3 | |
3625 | std %f18,[%g4] | |
3626 | ldx [%g4],%g2 | |
3627 | cmp %g3,%g2 ! %f18 = d7988aff 782a074d | |
3628 | bne %xcc,p0_freg_check_fail | |
3629 | mov 0xf18,%g1 | |
3630 | ldx [%g4+0x70],%g3 | |
3631 | std %f20,[%g4] | |
3632 | ldx [%g4],%g2 | |
3633 | cmp %g3,%g2 ! %f20 = ed13eb1e 0000b400 | |
3634 | bne %xcc,p0_freg_check_fail | |
3635 | mov 0xf20,%g1 | |
3636 | ldx [%g4+0x78],%g3 | |
3637 | std %f22,[%g4] | |
3638 | ldx [%g4],%g2 | |
3639 | cmp %g3,%g2 ! %f22 = 00000000 fffff102 | |
3640 | bne %xcc,p0_freg_check_fail | |
3641 | mov 0xf22,%g1 | |
3642 | ldx [%g4+0x80],%g3 | |
3643 | std %f24,[%g4] | |
3644 | ldx [%g4],%g2 | |
3645 | cmp %g3,%g2 ! %f24 = 2ce65c7f 0000007a | |
3646 | bne %xcc,p0_freg_check_fail | |
3647 | mov 0xf24,%g1 | |
3648 | ldx [%g4+0x88],%g3 | |
3649 | std %f26,[%g4] | |
3650 | ldx [%g4],%g2 | |
3651 | cmp %g3,%g2 ! %f26 = 0000008a 000000e5 | |
3652 | bne %xcc,p0_freg_check_fail | |
3653 | mov 0xf26,%g1 | |
3654 | ldx [%g4+0x90],%g3 | |
3655 | std %f28,[%g4] | |
3656 | ldx [%g4],%g2 | |
3657 | cmp %g3,%g2 ! %f28 = fa7bc046 fff9275e | |
3658 | bne %xcc,p0_freg_check_fail | |
3659 | mov 0xf28,%g1 | |
3660 | ldx [%g4+0x98],%g3 | |
3661 | std %f30,[%g4] | |
3662 | ldx [%g4],%g2 | |
3663 | cmp %g3,%g2 ! %f30 = 00630000 0000006e | |
3664 | bne %xcc,p0_freg_check_fail | |
3665 | mov 0xf30,%g1 | |
3666 | ||
3667 | ! Check Point 16 completed | |
3668 | ||
3669 | ||
3670 | p0_label_81: | |
3671 | ! Mem[0000000010001410] = 0f105c1a00000000, %f30 = 00630000 0000006e | |
3672 | ldda [%i0+%o5]0x88,%f30 ! %f30 = 0f105c1a 00000000 | |
3673 | ! Mem[00000000218001c0] = 9623fa38, %l4 = 00000000000000ff | |
3674 | lduh [%o3+0x1c0],%l4 ! %l4 = 0000000000009623 | |
3675 | ! Mem[00000000201c0000] = ffff1669, %l2 = 0074000000000000 | |
3676 | ldsha [%o0+0x000]%asi,%l2 ! %l2 = ffffffffffffffff | |
3677 | ! Mem[0000000030041408] = c90000000000aa77, %l3 = 000000000000000a | |
3678 | ldxa [%i1+%o4]0x81,%l3 ! %l3 = c90000000000aa77 | |
3679 | ! Mem[00000000300c1400] = fffff102, %f4 = 00c9ffff | |
3680 | lda [%i3+%g0]0x89,%f4 ! %f4 = fffff102 | |
3681 | ! Mem[0000000030101408] = ffffffff, %l0 = 8f25cdd8432c3eb6 | |
3682 | ldsha [%i4+%o4]0x89,%l0 ! %l0 = ffffffffffffffff | |
3683 | ! Mem[00000000211c0000] = fffffe0c, %l4 = 0000000000009623 | |
3684 | lduh [%o2+%g0],%l4 ! %l4 = 000000000000ffff | |
3685 | ! Mem[0000000030001408] = 33c4a113, %l6 = 6e00000000006300 | |
3686 | lduba [%i0+%o4]0x89,%l6 ! %l6 = 0000000000000013 | |
3687 | ! Mem[0000000010181400] = 978d001a ffffffe0, %l0 = ffffffff, %l1 = e7092e9d | |
3688 | ldda [%i6+%g0]0x80,%l0 ! %l0 = 00000000978d001a 00000000ffffffe0 | |
3689 | ! Starting 10 instruction Store Burst | |
3690 | ! %l3 = c90000000000aa77, Mem[0000000010081410] = 925b1ad8 | |
3691 | stba %l3,[%i2+%o5]0x88 ! Mem[0000000010081410] = 925b1a77 | |
3692 | ||
3693 | p0_label_82: | |
3694 | ! %l1 = 00000000ffffffe0, Mem[0000000010041400] = 00000000 | |
3695 | stba %l1,[%i1+%g0]0x88 ! Mem[0000000010041400] = 000000e0 | |
3696 | ! %f28 = fa7bc046 fff9275e, %l1 = 00000000ffffffe0 | |
3697 | ! Mem[0000000010041428] = 3bedac39d81a5b92 | |
3698 | add %i1,0x028,%g1 | |
3699 | stda %f28,[%g1+%l1]ASI_PST32_P ! Mem[0000000010041428] = 3bedac39d81a5b92 | |
3700 | ! Mem[0000000021800081] = ddff0b33, %l6 = 0000000000000013 | |
3701 | ldstub [%o3+0x081],%l6 ! %l6 = 000000ff000000ff | |
3702 | ! Mem[0000000010181400] = 1a008d97, %l4 = 000000000000ffff | |
3703 | swapa [%i6+%g0]0x88,%l4 ! %l4 = 000000001a008d97 | |
3704 | ! %l2 = ffffffffffffffff, Mem[00000000100c1400] = e0ffffff | |
3705 | stha %l2,[%i3+%g0]0x88 ! Mem[00000000100c1400] = e0ffffff | |
3706 | ! %l1 = 00000000ffffffe0, Mem[0000000010101408] = 4d072a78 | |
3707 | stha %l1,[%i4+%o4]0x80 ! Mem[0000000010101408] = ffe02a78 | |
3708 | ! %l4 = 000000001a008d97, Mem[0000000010041400] = e0000000a58e0ac9 | |
3709 | stxa %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = 000000001a008d97 | |
3710 | ! %f0 = 00000000 caffffff, Mem[0000000010041408] = 362d0802 00000000 | |
3711 | std %f0 ,[%i1+%o4] ! Mem[0000000010041408] = 00000000 caffffff | |
3712 | ! Mem[0000000030081410] = e76e3fff, %l2 = ffffffffffffffff | |
3713 | swapa [%i2+%o5]0x89,%l2 ! %l2 = 00000000e76e3fff | |
3714 | ! Starting 10 instruction Load Burst | |
3715 | ! Mem[0000000010181400] = ffff0000ffffffe0, %l3 = c90000000000aa77 | |
3716 | ldxa [%i6+%g0]0x80,%l3 ! %l3 = ffff0000ffffffe0 | |
3717 | ||
3718 | p0_label_83: | |
3719 | ! Mem[0000000030181410] = 00000000, %l6 = 00000000000000ff | |
3720 | lduha [%i6+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
3721 | ! Mem[0000000010101410] = 0000b4ff, %l3 = ffff0000ffffffe0 | |
3722 | ldswa [%i4+%o5]0x88,%l3 ! %l3 = 000000000000b4ff | |
3723 | ! Mem[0000000030081408] = 00000000, %l0 = 00000000978d001a | |
3724 | lduwa [%i2+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
3725 | ! Mem[0000000030081408] = 00000000, %l1 = 00000000ffffffe0 | |
3726 | ldsha [%i2+%o4]0x81,%l1 ! %l1 = 0000000000000000 | |
3727 | ! Mem[0000000010081408] = 1b14921f ffffffc7, %l2 = e76e3fff, %l3 = 0000b4ff | |
3728 | ldda [%i2+%o4]0x80,%l2 ! %l2 = 000000001b14921f 00000000ffffffc7 | |
3729 | ! Mem[0000000030181408] = c9080000000008ff, %l3 = 00000000ffffffc7 | |
3730 | ldxa [%i6+%o4]0x89,%l3 ! %l3 = c9080000000008ff | |
3731 | ! Mem[00000000300c1410] = 00005b30, %l3 = c9080000000008ff | |
3732 | ldsba [%i3+%o5]0x89,%l3 ! %l3 = 0000000000000030 | |
3733 | ! Mem[0000000030141410] = 0a8d001a, %f0 = 00000000 | |
3734 | lda [%i5+%o5]0x81,%f0 ! %f0 = 0a8d001a | |
3735 | ! Mem[0000000030181408] = 000008ff, %l7 = 00000000ffffffff | |
3736 | lduha [%i6+%o4]0x89,%l7 ! %l7 = 00000000000008ff | |
3737 | ! Starting 10 instruction Store Burst | |
3738 | ! %l7 = 00000000000008ff, Mem[00000000201c0000] = ffff1669 | |
3739 | stb %l7,[%o0+%g0] ! Mem[00000000201c0000] = ffff1669 | |
3740 | ||
3741 | p0_label_84: | |
3742 | ! Mem[0000000030101400] = a4000000, %l1 = 0000000000000000 | |
3743 | swapa [%i4+%g0]0x81,%l1 ! %l1 = 00000000a4000000 | |
3744 | ! Mem[00000000300c1400] = fffff102, %l3 = 0000000000000030 | |
3745 | ldstuba [%i3+%g0]0x89,%l3 ! %l3 = 00000002000000ff | |
3746 | ! Mem[0000000010041408] = 00000000caffffff, %l1 = 00000000a4000000 | |
3747 | ldxa [%i1+%o4]0x80,%l1 ! %l1 = 00000000caffffff | |
3748 | ! Mem[0000000030041410] = c9080000, %l6 = 0000000000000000 | |
3749 | ldstuba [%i1+%o5]0x81,%l6 ! %l6 = 000000c9000000ff | |
3750 | ! %l0 = 0000000000000000, Mem[0000000030101408] = ffffffff | |
3751 | stba %l0,[%i4+%o4]0x89 ! Mem[0000000030101408] = ffffff00 | |
3752 | ! %l5 = 00000000c90a8ea5, Mem[0000000010041400] = 00000000 | |
3753 | stba %l5,[%i1+%g0]0x80 ! Mem[0000000010041400] = a5000000 | |
3754 | ! %l1 = 00000000caffffff, Mem[00000000300c1408] = 0f105c1a | |
3755 | stha %l1,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 0f10ffff | |
3756 | ! %f22 = 00000000, Mem[0000000010001428] = faa3f94d | |
3757 | st %f22,[%i0+0x028] ! Mem[0000000010001428] = 00000000 | |
3758 | ! Mem[0000000010001400] = 7d2a31b6, %l6 = 00000000000000c9 | |
3759 | ldub [%i0+0x003],%l6 ! %l6 = 00000000000000b6 | |
3760 | ! Starting 10 instruction Load Burst | |
3761 | ! %l6 = 00000000000000b6, Mem[00000000300c1400] = fff1ffff | |
3762 | stba %l6,[%i3+%g0]0x81 ! Mem[00000000300c1400] = b6f1ffff | |
3763 | ||
3764 | p0_label_85: | |
3765 | ! Mem[0000000010181400] = 0000ffff, %l6 = 00000000000000b6 | |
3766 | lduha [%i6+%g0]0x88,%l6 ! %l6 = 000000000000ffff | |
3767 | ! Mem[00000000201c0000] = ffff1669, %l5 = 00000000c90a8ea5 | |
3768 | ldsba [%o0+0x001]%asi,%l5 ! %l5 = ffffffffffffffff | |
3769 | ! Mem[0000000010181418] = 00000000, %f26 = 0000008a | |
3770 | ld [%i6+0x018],%f26 ! %f26 = 00000000 | |
3771 | ! Mem[000000001004140c] = caffffff, %l7 = 00000000000008ff | |
3772 | lduw [%i1+0x00c],%l7 ! %l7 = 00000000caffffff | |
3773 | ! Mem[0000000020800000] = 016c0db6, %l5 = ffffffffffffffff | |
3774 | lduha [%o1+0x000]%asi,%l5 ! %l5 = 000000000000016c | |
3775 | ! Mem[0000000010081410] = 925b1a77, %l6 = 000000000000ffff | |
3776 | lduba [%i2+%o5]0x88,%l6 ! %l6 = 0000000000000077 | |
3777 | ! Mem[0000000030081410] = ffffffff, %l1 = 00000000caffffff | |
3778 | lduba [%i2+%o5]0x89,%l1 ! %l1 = 00000000000000ff | |
3779 | ! Mem[0000000030181400] = 00000000, %l0 = 0000000000000000 | |
3780 | ldsha [%i6+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
3781 | ! Mem[0000000010041410] = 00006ee7, %l5 = 000000000000016c | |
3782 | lduba [%i1+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
3783 | ! Starting 10 instruction Store Burst | |
3784 | ! %f0 = 0a8d001a caffffff ffffffff ffffffff | |
3785 | ! %f4 = fffff102 269784ff 5e9e1157 6b6c2202 | |
3786 | ! %f8 = 00000000 d81a5b92 c78091bb d9876ee7 | |
3787 | ! %f12 = fac65f36 9ce0b68a ffffffe0 74ff0000 | |
3788 | stda %f0,[%i3]ASI_BLK_AIUP ! Block Store to 00000000100c1400 | |
3789 | ||
3790 | ! Check Point 17 for processor 0 | |
3791 | ||
3792 | set p0_check_pt_data_17,%g4 | |
3793 | rd %ccr,%g5 ! %g5 = 44 | |
3794 | ldx [%g4+0x08],%g2 | |
3795 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
3796 | bne %xcc,p0_reg_check_fail0 | |
3797 | mov 0xee0,%g1 | |
3798 | ldx [%g4+0x10],%g2 | |
3799 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
3800 | bne %xcc,p0_reg_check_fail1 | |
3801 | mov 0xee1,%g1 | |
3802 | ldx [%g4+0x18],%g2 | |
3803 | cmp %l2,%g2 ! %l2 = 000000001b14921f | |
3804 | bne %xcc,p0_reg_check_fail2 | |
3805 | mov 0xee2,%g1 | |
3806 | ldx [%g4+0x20],%g2 | |
3807 | cmp %l3,%g2 ! %l3 = 0000000000000002 | |
3808 | bne %xcc,p0_reg_check_fail3 | |
3809 | mov 0xee3,%g1 | |
3810 | ldx [%g4+0x28],%g2 | |
3811 | cmp %l4,%g2 ! %l4 = 000000001a008d97 | |
3812 | bne %xcc,p0_reg_check_fail4 | |
3813 | mov 0xee4,%g1 | |
3814 | ldx [%g4+0x30],%g2 | |
3815 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
3816 | bne %xcc,p0_reg_check_fail5 | |
3817 | mov 0xee5,%g1 | |
3818 | ldx [%g4+0x38],%g2 | |
3819 | cmp %l6,%g2 ! %l6 = 0000000000000077 | |
3820 | bne %xcc,p0_reg_check_fail6 | |
3821 | mov 0xee6,%g1 | |
3822 | ldx [%g4+0x40],%g2 | |
3823 | cmp %l7,%g2 ! %l7 = 00000000caffffff | |
3824 | bne %xcc,p0_reg_check_fail7 | |
3825 | mov 0xee7,%g1 | |
3826 | ldx [%g4+0x48],%g3 | |
3827 | std %f0,[%g4] | |
3828 | ldx [%g4],%g2 | |
3829 | cmp %g3,%g2 ! %f0 = 0a8d001a caffffff | |
3830 | bne %xcc,p0_freg_check_fail | |
3831 | mov 0xf00,%g1 | |
3832 | ldx [%g4+0x50],%g3 | |
3833 | std %f2,[%g4] | |
3834 | ldx [%g4],%g2 | |
3835 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
3836 | bne %xcc,p0_freg_check_fail | |
3837 | mov 0xf02,%g1 | |
3838 | ldx [%g4+0x58],%g3 | |
3839 | std %f4,[%g4] | |
3840 | ldx [%g4],%g2 | |
3841 | cmp %g3,%g2 ! %f4 = fffff102 269784ff | |
3842 | bne %xcc,p0_freg_check_fail | |
3843 | mov 0xf04,%g1 | |
3844 | ldx [%g4+0x60],%g3 | |
3845 | std %f26,[%g4] | |
3846 | ldx [%g4],%g2 | |
3847 | cmp %g3,%g2 ! %f26 = 00000000 000000e5 | |
3848 | bne %xcc,p0_freg_check_fail | |
3849 | mov 0xf26,%g1 | |
3850 | ldx [%g4+0x68],%g3 | |
3851 | std %f30,[%g4] | |
3852 | ldx [%g4],%g2 | |
3853 | cmp %g3,%g2 ! %f30 = 0f105c1a 00000000 | |
3854 | bne %xcc,p0_freg_check_fail | |
3855 | mov 0xf30,%g1 | |
3856 | ||
3857 | ! Check Point 17 completed | |
3858 | ||
3859 | ||
3860 | p0_label_86: | |
3861 | ! %l5 = 0000000000000000, Mem[0000000010141408] = 8ab6e09c365fc6fa | |
3862 | stxa %l5,[%i5+%o4]0x80 ! Mem[0000000010141408] = 0000000000000000 | |
3863 | ! %f18 = d7988aff, Mem[0000000010041400] = 000000a5 | |
3864 | sta %f18,[%i1+%g0]0x88 ! Mem[0000000010041400] = d7988aff | |
3865 | ! %f2 = ffffffff ffffffff, Mem[0000000030141400] = 74ff0000 ffffffe0 | |
3866 | stda %f2 ,[%i5+%g0]0x89 ! Mem[0000000030141400] = ffffffff ffffffff | |
3867 | ! Mem[0000000030081400] = 0000ffff, %l6 = 0000000000000077 | |
3868 | ldstuba [%i2+%g0]0x89,%l6 ! %l6 = 000000ff000000ff | |
3869 | ! %l1 = 00000000000000ff, Mem[0000000010081408] = 1f92141b | |
3870 | stba %l1,[%i2+%o4]0x88 ! Mem[0000000010081408] = 1f9214ff | |
3871 | ! Mem[0000000030001410] = e76e3fff, %l7 = 00000000caffffff | |
3872 | swapa [%i0+%o5]0x81,%l7 ! %l7 = 00000000e76e3fff | |
3873 | ! %f30 = 0f105c1a 00000000, Mem[0000000010081400] = 0000e45d 0000ff74 | |
3874 | stda %f30,[%i2+%g0]0x80 ! Mem[0000000010081400] = 0f105c1a 00000000 | |
3875 | ! Mem[0000000030181410] = 00000000, %l0 = 0000000000000000 | |
3876 | ldstuba [%i6+%o5]0x89,%l0 ! %l0 = 00000000000000ff | |
3877 | ! %f26 = 00000000 000000e5, Mem[0000000030141410] = 1a008d0a 9c8eb8ff | |
3878 | stda %f26,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00000000 000000e5 | |
3879 | ! Starting 10 instruction Load Burst | |
3880 | ! Mem[0000000010081404] = 00000000, %l2 = 000000001b14921f | |
3881 | lduh [%i2+0x006],%l2 ! %l2 = 0000000000000000 | |
3882 | ||
3883 | p0_label_87: | |
3884 | ! Mem[0000000030181408] = 000008ff, %l5 = 0000000000000000 | |
3885 | lduba [%i6+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
3886 | ! Mem[0000000030001400] = 00740000, %f24 = 2ce65c7f | |
3887 | lda [%i0+%g0]0x81,%f24 ! %f24 = 00740000 | |
3888 | membar #Sync ! Added by membar checker (24) | |
3889 | ! Mem[00000000100c1408] = ffffffff, %l0 = 0000000000000000 | |
3890 | ldsba [%i3+%o4]0x88,%l0 ! %l0 = ffffffffffffffff | |
3891 | ! Mem[0000000010101430] = 5e27f9ff 46c07bfa, %l0 = ffffffff, %l1 = 000000ff | |
3892 | ldd [%i4+0x030],%l0 ! %l0 = 000000005e27f9ff 0000000046c07bfa | |
3893 | ! Mem[0000000010141400] = 00746fa4a309adff, %f16 = 978d001a ffffffe0 | |
3894 | ldda [%i5+%g0]0x80,%f16 ! %f16 = 00746fa4 a309adff | |
3895 | ! Mem[0000000030101410] = 00c9ffff, %l6 = 00000000000000ff | |
3896 | ldsha [%i4+%o5]0x81,%l6 ! %l6 = 00000000000000c9 | |
3897 | ! Mem[0000000030141408] = ffffffff 000000ff, %l0 = 5e27f9ff, %l1 = 46c07bfa | |
3898 | ldda [%i5+%o4]0x89,%l0 ! %l0 = 00000000000000ff 00000000ffffffff | |
3899 | ! Mem[0000000010081410] = 771a5b92, %l4 = 000000001a008d97 | |
3900 | lduwa [%i2+%o5]0x80,%l4 ! %l4 = 00000000771a5b92 | |
3901 | ! Mem[00000000100c1410] = fffff102, %l4 = 00000000771a5b92 | |
3902 | lduha [%i3+0x010]%asi,%l4 ! %l4 = 000000000000ffff | |
3903 | ! Starting 10 instruction Store Burst | |
3904 | ! Mem[0000000010041410] = 00006ee7, %l2 = 00000000, %l2 = 00000000 | |
3905 | add %i1,0x10,%g1 | |
3906 | casa [%g1]0x80,%l2,%l2 ! %l2 = 0000000000006ee7 | |
3907 | ||
3908 | p0_label_88: | |
3909 | ! %f6 = 5e9e1157 6b6c2202, Mem[0000000010081410] = 925b1a77 ff005018 | |
3910 | stda %f6 ,[%i2+%o5]0x88 ! Mem[0000000010081410] = 5e9e1157 6b6c2202 | |
3911 | ! Mem[0000000010101410] = ffb40000, %l6 = 00000000000000c9 | |
3912 | swapa [%i4+%o5]0x80,%l6 ! %l6 = 00000000ffb40000 | |
3913 | ! %f24 = 00740000 0000007a, Mem[0000000010141430] = 7e000025 88c19623 | |
3914 | std %f24,[%i5+0x030] ! Mem[0000000010141430] = 00740000 0000007a | |
3915 | ! %f8 = 00000000 d81a5b92, Mem[0000000010001410] = 00000000 1a5c100f | |
3916 | stda %f8 ,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 d81a5b92 | |
3917 | ! %l2 = 0000000000006ee7, Mem[0000000010001410] = 00000000 | |
3918 | stba %l2,[%i0+%o5]0x88 ! Mem[0000000010001410] = 000000e7 | |
3919 | ! %l6 = 00000000ffb40000, Mem[0000000030041408] = 000000c9 | |
3920 | stha %l6,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000000 | |
3921 | ! Mem[0000000010041408] = 00000000, %l2 = 0000000000006ee7 | |
3922 | ldsha [%i1+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
3923 | ! Mem[00000000100c1410] = fffff102, %l3 = 0000000000000002 | |
3924 | ldstuba [%i3+%o5]0x80,%l3 ! %l3 = 000000ff000000ff | |
3925 | ! Mem[0000000020800000] = 016c0db6, %l2 = 0000000000000000 | |
3926 | ldstub [%o1+%g0],%l2 ! %l2 = 00000001000000ff | |
3927 | ! Starting 10 instruction Load Burst | |
3928 | ! Mem[0000000030141400] = ffffffffffffffff, %f0 = 0a8d001a caffffff | |
3929 | ldda [%i5+%g0]0x89,%f0 ! %f0 = ffffffff ffffffff | |
3930 | ||
3931 | p0_label_89: | |
3932 | ! Mem[0000000010101410] = ed13eb1ec9000000, %l5 = 00000000000000ff | |
3933 | ldxa [%i4+%o5]0x88,%l5 ! %l5 = ed13eb1ec9000000 | |
3934 | ! Mem[0000000030041408] = 00000000, %f6 = 5e9e1157 | |
3935 | lda [%i1+%o4]0x89,%f6 ! %f6 = 00000000 | |
3936 | ! Mem[0000000010141400] = 00746fa4, %f12 = fac65f36 | |
3937 | lda [%i5+%g0]0x80,%f12 ! %f12 = 00746fa4 | |
3938 | ! Mem[0000000010181410] = 00000000, %l1 = 00000000ffffffff | |
3939 | ldsha [%i6+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
3940 | ! Mem[0000000010141400] = a46f7400, %l2 = 0000000000000001 | |
3941 | ldsba [%i5+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
3942 | ! Mem[0000000020800040] = b4e79ffa, %l1 = 0000000000000000 | |
3943 | ldsba [%o1+0x040]%asi,%l1 ! %l1 = ffffffffffffffb4 | |
3944 | ! Mem[0000000010181410] = 00000000, %l3 = 00000000000000ff | |
3945 | lduwa [%i6+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
3946 | ! Mem[0000000030001400] = 0074000000000000, %f16 = 00746fa4 a309adff | |
3947 | ldda [%i0+%g0]0x81,%f16 ! %f16 = 00740000 00000000 | |
3948 | ! Mem[00000000300c1400] = fffff1b6, %l3 = 0000000000000000 | |
3949 | ldsha [%i3+%g0]0x89,%l3 ! %l3 = fffffffffffff1b6 | |
3950 | ! Starting 10 instruction Store Burst | |
3951 | ! Mem[0000000010001400] = 7d2a31b6, %l1 = ffffffffffffffb4, %asi = 80 | |
3952 | swapa [%i0+0x000]%asi,%l1 ! %l1 = 000000007d2a31b6 | |
3953 | ||
3954 | p0_label_90: | |
3955 | ! Mem[0000000010081428] = 12ffe8dd, %l1 = 000000007d2a31b6 | |
3956 | swap [%i2+0x028],%l1 ! %l1 = 0000000012ffe8dd | |
3957 | ! %l2 = 00000000, %l3 = fffff1b6, Mem[0000000030141408] = 000000ff ffffffff | |
3958 | stda %l2,[%i5+%o4]0x89 ! Mem[0000000030141408] = 00000000 fffff1b6 | |
3959 | ! %f0 = ffffffff ffffffff ffffffff ffffffff | |
3960 | ! %f4 = fffff102 269784ff 00000000 6b6c2202 | |
3961 | ! %f8 = 00000000 d81a5b92 c78091bb d9876ee7 | |
3962 | ! %f12 = 00746fa4 9ce0b68a ffffffe0 74ff0000 | |
3963 | stda %f0,[%i6]ASI_BLK_AIUS ! Block Store to 0000000030181400 | |
3964 | ! Mem[00000000100c140d] = ffffffff, %l6 = 00000000ffb40000 | |
3965 | ldstuba [%i3+0x00d]%asi,%l6 ! %l6 = 000000ff000000ff | |
3966 | ! %l0 = 00000000000000ff, Mem[0000000010181404] = ffffffe0, %asi = 80 | |
3967 | stba %l0,[%i6+0x004]%asi ! Mem[0000000010181404] = ffffffe0 | |
3968 | ! %l0 = 00000000000000ff, Mem[00000000100c1408] = ffffffff | |
3969 | stwa %l0,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 000000ff | |
3970 | ! %f18 = d7988aff 782a074d, %l2 = 0000000000000000 | |
3971 | ! Mem[0000000010141418] = 1a1bfb6220e3dee5 | |
3972 | add %i5,0x018,%g1 | |
3973 | stda %f18,[%g1+%l2]ASI_PST16_PL ! Mem[0000000010141418] = 1a1bfb6220e3dee5 | |
3974 | ! %l3 = fffffffffffff1b6, Mem[000000001018142a] = 0000008a, %asi = 80 | |
3975 | stha %l3,[%i6+0x02a]%asi ! Mem[0000000010181428] = 0000f1b6 | |
3976 | ! Mem[00000000100c1434] = 9ce0b68a, %l6 = 000000ff, %l3 = fffff1b6 | |
3977 | add %i3,0x34,%g1 | |
3978 | casa [%g1]0x80,%l6,%l3 ! %l3 = 000000009ce0b68a | |
3979 | ! Starting 10 instruction Load Burst | |
3980 | ! Mem[0000000010101400] = e0ffffff, %f31 = 00000000 | |
3981 | ld [%i4+%g0],%f31 ! %f31 = e0ffffff | |
3982 | ||
3983 | ! Check Point 18 for processor 0 | |
3984 | ||
3985 | set p0_check_pt_data_18,%g4 | |
3986 | rd %ccr,%g5 ! %g5 = 44 | |
3987 | ldx [%g4+0x08],%g2 | |
3988 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
3989 | bne %xcc,p0_reg_check_fail0 | |
3990 | mov 0xee0,%g1 | |
3991 | ldx [%g4+0x10],%g2 | |
3992 | cmp %l1,%g2 ! %l1 = 0000000012ffe8dd | |
3993 | bne %xcc,p0_reg_check_fail1 | |
3994 | mov 0xee1,%g1 | |
3995 | ldx [%g4+0x18],%g2 | |
3996 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
3997 | bne %xcc,p0_reg_check_fail2 | |
3998 | mov 0xee2,%g1 | |
3999 | ldx [%g4+0x20],%g2 | |
4000 | cmp %l3,%g2 ! %l3 = 000000009ce0b68a | |
4001 | bne %xcc,p0_reg_check_fail3 | |
4002 | mov 0xee3,%g1 | |
4003 | ldx [%g4+0x28],%g2 | |
4004 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
4005 | bne %xcc,p0_reg_check_fail4 | |
4006 | mov 0xee4,%g1 | |
4007 | ldx [%g4+0x30],%g2 | |
4008 | cmp %l5,%g2 ! %l5 = ed13eb1ec9000000 | |
4009 | bne %xcc,p0_reg_check_fail5 | |
4010 | mov 0xee5,%g1 | |
4011 | ldx [%g4+0x38],%g2 | |
4012 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
4013 | bne %xcc,p0_reg_check_fail6 | |
4014 | mov 0xee6,%g1 | |
4015 | ldx [%g4+0x40],%g3 | |
4016 | std %f0,[%g4] | |
4017 | ldx [%g4],%g2 | |
4018 | cmp %g3,%g2 ! %f0 = ffffffff ffffffff | |
4019 | bne %xcc,p0_freg_check_fail | |
4020 | mov 0xf00,%g1 | |
4021 | ldx [%g4+0x48],%g3 | |
4022 | std %f6,[%g4] | |
4023 | ldx [%g4],%g2 | |
4024 | cmp %g3,%g2 ! %f6 = 00000000 6b6c2202 | |
4025 | bne %xcc,p0_freg_check_fail | |
4026 | mov 0xf06,%g1 | |
4027 | ldx [%g4+0x50],%g3 | |
4028 | std %f12,[%g4] | |
4029 | ldx [%g4],%g2 | |
4030 | cmp %g3,%g2 ! %f12 = 00746fa4 9ce0b68a | |
4031 | bne %xcc,p0_freg_check_fail | |
4032 | mov 0xf12,%g1 | |
4033 | ldx [%g4+0x58],%g3 | |
4034 | std %f16,[%g4] | |
4035 | ldx [%g4],%g2 | |
4036 | cmp %g3,%g2 ! %f16 = 00740000 00000000 | |
4037 | bne %xcc,p0_freg_check_fail | |
4038 | mov 0xf16,%g1 | |
4039 | ldx [%g4+0x60],%g3 | |
4040 | std %f24,[%g4] | |
4041 | ldx [%g4],%g2 | |
4042 | cmp %g3,%g2 ! %f24 = 00740000 0000007a | |
4043 | bne %xcc,p0_freg_check_fail | |
4044 | mov 0xf24,%g1 | |
4045 | ldx [%g4+0x68],%g3 | |
4046 | std %f30,[%g4] | |
4047 | ldx [%g4],%g2 | |
4048 | cmp %g3,%g2 ! %f30 = 0f105c1a e0ffffff | |
4049 | bne %xcc,p0_freg_check_fail | |
4050 | mov 0xf30,%g1 | |
4051 | ||
4052 | ! Check Point 18 completed | |
4053 | ||
4054 | ||
4055 | p0_label_91: | |
4056 | membar #Sync ! Added by membar checker (25) | |
4057 | ! Mem[0000000030181400] = ffffffff, %l3 = 000000009ce0b68a | |
4058 | lduwa [%i6+%g0]0x81,%l3 ! %l3 = 00000000ffffffff | |
4059 | ! Mem[00000000300c1400] = b6f1ffffd9876ee7, %l6 = 00000000000000ff | |
4060 | ldxa [%i3+%g0]0x81,%l6 ! %l6 = b6f1ffffd9876ee7 | |
4061 | ! Mem[0000000030141400] = ffffffff ffffffff, %l0 = 000000ff, %l1 = 12ffe8dd | |
4062 | ldda [%i5+%g0]0x89,%l0 ! %l0 = 00000000ffffffff 00000000ffffffff | |
4063 | ! Mem[0000000020800040] = b4e79ffa, %l0 = 00000000ffffffff | |
4064 | ldsba [%o1+0x041]%asi,%l0 ! %l0 = ffffffffffffffe7 | |
4065 | ! Mem[0000000010141424] = 7a9afc2a, %l6 = b6f1ffffd9876ee7 | |
4066 | lduha [%i5+0x024]%asi,%l6 ! %l6 = 0000000000007a9a | |
4067 | ! Mem[0000000010041430] = 4d30c046 ffff275e, %l2 = 00000000, %l3 = ffffffff | |
4068 | ldd [%i1+0x030],%l2 ! %l2 = 000000004d30c046 00000000ffff275e | |
4069 | ! Mem[00000000300c1400] = b6f1ffff, %l2 = 000000004d30c046 | |
4070 | lduha [%i3+%g0]0x81,%l2 ! %l2 = 000000000000b6f1 | |
4071 | ! Mem[0000000010141410] = 1a008d0a, %l0 = ffffffffffffffe7 | |
4072 | ldsha [%i5+%o5]0x88,%l0 ! %l0 = ffffffffffff8d0a | |
4073 | ! Mem[00000000100c1400] = 0a8d001a, %f13 = 9ce0b68a | |
4074 | lda [%i3+%g0]0x80,%f13 ! %f13 = 0a8d001a | |
4075 | ! Starting 10 instruction Store Burst | |
4076 | ! %l6 = 0000000000007a9a, Mem[0000000010001438] = 362d08c9ffb88e9c, %asi = 80 | |
4077 | stxa %l6,[%i0+0x038]%asi ! Mem[0000000010001438] = 0000000000007a9a | |
4078 | ||
4079 | p0_label_92: | |
4080 | ! Mem[0000000030101408] = ffffff00, %l1 = 00000000ffffffff | |
4081 | swapa [%i4+%o4]0x89,%l1 ! %l1 = 00000000ffffff00 | |
4082 | ! %l6 = 0000000000007a9a, Mem[0000000030001400] = 00740000 | |
4083 | stwa %l6,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00007a9a | |
4084 | ! %l4 = 000000000000ffff, Mem[0000000030041400] = ffffffa5 | |
4085 | stwa %l4,[%i1+%g0]0x89 ! Mem[0000000030041400] = 0000ffff | |
4086 | ! Mem[00000000100c140f] = ffffffff, %l0 = ffffffffffff8d0a | |
4087 | ldstub [%i3+0x00f],%l0 ! %l0 = 000000ff000000ff | |
4088 | ! %l6 = 0000000000007a9a, Mem[0000000010181410] = 00000000 | |
4089 | stha %l6,[%i6+%o5]0x80 ! Mem[0000000010181410] = 7a9a0000 | |
4090 | ! %l0 = 00000000000000ff, Mem[0000000010181410] = 7a9a0000 | |
4091 | stwa %l0,[%i6+%o5]0x80 ! Mem[0000000010181410] = 000000ff | |
4092 | ! %l2 = 0000b6f1, %l3 = ffff275e, Mem[0000000030101400] = 00000000 caffffff | |
4093 | stda %l2,[%i4+%g0]0x81 ! Mem[0000000030101400] = 0000b6f1 ffff275e | |
4094 | ! Mem[0000000010181428] = 0000f1b6000000e5, %l5 = ed13eb1ec9000000, %l3 = 00000000ffff275e | |
4095 | add %i6,0x28,%g1 | |
4096 | casxa [%g1]0x80,%l5,%l3 ! %l3 = 0000f1b6000000e5 | |
4097 | ! %l6 = 0000000000007a9a, Mem[0000000010101404] = 1a008d97 | |
4098 | sth %l6,[%i4+0x004] ! Mem[0000000010101404] = 7a9a8d97 | |
4099 | ! Starting 10 instruction Load Burst | |
4100 | ! Mem[0000000010041408] = ffffffca00000000, %f28 = fa7bc046 fff9275e | |
4101 | ldda [%i1+%o4]0x88,%f28 ! %f28 = ffffffca 00000000 | |
4102 | ||
4103 | p0_label_93: | |
4104 | ! Mem[0000000010101438] = 6e00000000006300, %f22 = 00000000 fffff102 | |
4105 | ldda [%i4+0x038]%asi,%f22 ! %f22 = 6e000000 00006300 | |
4106 | ! Mem[0000000010081420] = 75b993459b4329a1, %f26 = 00000000 000000e5 | |
4107 | ldda [%i2+0x020]%asi,%f26 ! %f26 = 75b99345 9b4329a1 | |
4108 | ! Mem[0000000010101410] = 000000c9, %l2 = 000000000000b6f1 | |
4109 | lduw [%i4+%o5],%l2 ! %l2 = 00000000000000c9 | |
4110 | ! Mem[0000000010141404] = a309adff, %l2 = 00000000000000c9 | |
4111 | ldsba [%i5+0x005]%asi,%l2 ! %l2 = 0000000000000009 | |
4112 | ! %l3 = 0000f1b6000000e5, imm = 0000000000000eda, %l1 = 00000000ffffff00 | |
4113 | xnor %l3,0xeda,%l1 ! %l1 = ffff0e49fffff1c0 | |
4114 | ! Mem[0000000030001408] = 13a1c433000074ff, %f20 = ed13eb1e 0000b400 | |
4115 | ldda [%i0+%o4]0x81,%f20 ! %f20 = 13a1c433 000074ff | |
4116 | ! Mem[0000000010001400] = b4ffffff, %l3 = 0000f1b6000000e5 | |
4117 | ldsba [%i0+%g0]0x88,%l3 ! %l3 = ffffffffffffffff | |
4118 | ! Mem[0000000010001408] = 77aa02f1, %l1 = ffff0e49fffff1c0 | |
4119 | lduwa [%i0+%o4]0x80,%l1 ! %l1 = 0000000077aa02f1 | |
4120 | ! Mem[00000000201c0000] = ffff1669, %l2 = 0000000000000009 | |
4121 | ldsh [%o0+%g0],%l2 ! %l2 = ffffffffffffffff | |
4122 | ! Starting 10 instruction Store Burst | |
4123 | ! %l7 = 00000000e76e3fff, Mem[00000000211c0000] = fffffe0c | |
4124 | stb %l7,[%o2+%g0] ! Mem[00000000211c0000] = fffffe0c | |
4125 | ||
4126 | p0_label_94: | |
4127 | ! %f24 = 00740000 0000007a, Mem[00000000300c1408] = 0f10ffff e0ffffff | |
4128 | stda %f24,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 00740000 0000007a | |
4129 | ! %f30 = 0f105c1a e0ffffff, Mem[0000000030141408] = 00000000 b6f1ffff | |
4130 | stda %f30,[%i5+%o4]0x81 ! Mem[0000000030141408] = 0f105c1a e0ffffff | |
4131 | ! %f2 = ffffffff ffffffff, Mem[0000000010081410] = 02226c6b 57119e5e | |
4132 | stda %f2 ,[%i2+0x010]%asi ! Mem[0000000010081410] = ffffffff ffffffff | |
4133 | ! %l1 = 0000000077aa02f1, Mem[0000000030181408] = ffffffff | |
4134 | stwa %l1,[%i6+%o4]0x89 ! Mem[0000000030181408] = 77aa02f1 | |
4135 | ! %l1 = 0000000077aa02f1, Mem[000000001018141f] = fffff102, %asi = 80 | |
4136 | stba %l1,[%i6+0x01f]%asi ! Mem[000000001018141c] = fffff1f1 | |
4137 | ! Mem[000000001004143c] = 3f787673, %l5 = c9000000, %l0 = 000000ff | |
4138 | add %i1,0x3c,%g1 | |
4139 | casa [%g1]0x80,%l5,%l0 ! %l0 = 000000003f787673 | |
4140 | ! Mem[0000000030101400] = f1b60000, %l3 = ffffffffffffffff | |
4141 | ldstuba [%i4+%g0]0x89,%l3 ! %l3 = 00000000000000ff | |
4142 | ! %l6 = 00007a9a, %l7 = e76e3fff, Mem[0000000010181400] = ffff0000 ffffffe0 | |
4143 | stda %l6,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00007a9a e76e3fff | |
4144 | ! %l3 = 0000000000000000, Mem[0000000010041400] = ff8a98d7 | |
4145 | stb %l3,[%i1+%g0] ! Mem[0000000010041400] = 008a98d7 | |
4146 | ! Starting 10 instruction Load Burst | |
4147 | ! Mem[0000000030081410] = 07577efbffffffff, %l5 = ed13eb1ec9000000 | |
4148 | ldxa [%i2+%o5]0x89,%l5 ! %l5 = 07577efbffffffff | |
4149 | ||
4150 | p0_label_95: | |
4151 | ! Mem[0000000030041410] = ff080000, %l2 = ffffffffffffffff | |
4152 | ldsba [%i1+%o5]0x81,%l2 ! %l2 = ffffffffffffffff | |
4153 | ! Mem[0000000010081410] = ffffffff, %f21 = 000074ff | |
4154 | lda [%i2+0x010]%asi,%f21 ! %f21 = ffffffff | |
4155 | ! Mem[0000000030141400] = ffffffffffffffff, %l2 = ffffffffffffffff | |
4156 | ldxa [%i5+%g0]0x89,%l2 ! %l2 = ffffffffffffffff | |
4157 | ! Mem[0000000010041400] = 978d001ad7988a00, %l0 = 000000003f787673 | |
4158 | ldxa [%i1+%g0]0x88,%l0 ! %l0 = 978d001ad7988a00 | |
4159 | ! Mem[0000000010081400] = 0f105c1a, %f18 = d7988aff | |
4160 | lda [%i2+%g0]0x80,%f18 ! %f18 = 0f105c1a | |
4161 | ! Mem[0000000030081400] = 0000ffff, %l3 = 0000000000000000 | |
4162 | lduba [%i2+%g0]0x89,%l3 ! %l3 = 00000000000000ff | |
4163 | ! Mem[00000000201c0000] = ffff1669, %l6 = 0000000000007a9a | |
4164 | lduha [%o0+0x000]%asi,%l6 ! %l6 = 000000000000ffff | |
4165 | ! Mem[0000000030141400] = ffffffff, %l4 = 000000000000ffff | |
4166 | lduwa [%i5+%g0]0x89,%l4 ! %l4 = 00000000ffffffff | |
4167 | ! Mem[0000000010141408] = 00000000, %l3 = 00000000000000ff | |
4168 | ldswa [%i5+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
4169 | ! Starting 10 instruction Store Burst | |
4170 | ! Mem[0000000010041410] = e76e0000, %l5 = 07577efbffffffff | |
4171 | ldstuba [%i1+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
4172 | ||
4173 | ! Check Point 19 for processor 0 | |
4174 | ||
4175 | set p0_check_pt_data_19,%g4 | |
4176 | rd %ccr,%g5 ! %g5 = 44 | |
4177 | ldx [%g4+0x08],%g2 | |
4178 | cmp %l0,%g2 ! %l0 = 978d001ad7988a00 | |
4179 | bne %xcc,p0_reg_check_fail0 | |
4180 | mov 0xee0,%g1 | |
4181 | ldx [%g4+0x10],%g2 | |
4182 | cmp %l1,%g2 ! %l1 = 0000000077aa02f1 | |
4183 | bne %xcc,p0_reg_check_fail1 | |
4184 | mov 0xee1,%g1 | |
4185 | ldx [%g4+0x18],%g2 | |
4186 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
4187 | bne %xcc,p0_reg_check_fail2 | |
4188 | mov 0xee2,%g1 | |
4189 | ldx [%g4+0x20],%g2 | |
4190 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
4191 | bne %xcc,p0_reg_check_fail3 | |
4192 | mov 0xee3,%g1 | |
4193 | ldx [%g4+0x28],%g2 | |
4194 | cmp %l4,%g2 ! %l4 = 00000000ffffffff | |
4195 | bne %xcc,p0_reg_check_fail4 | |
4196 | mov 0xee4,%g1 | |
4197 | ldx [%g4+0x30],%g2 | |
4198 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
4199 | bne %xcc,p0_reg_check_fail5 | |
4200 | mov 0xee5,%g1 | |
4201 | ldx [%g4+0x38],%g2 | |
4202 | cmp %l6,%g2 ! %l6 = 000000000000ffff | |
4203 | bne %xcc,p0_reg_check_fail6 | |
4204 | mov 0xee6,%g1 | |
4205 | ldx [%g4+0x40],%g3 | |
4206 | std %f0,[%g4] | |
4207 | ldx [%g4],%g2 | |
4208 | cmp %g3,%g2 ! %f0 = ffffffff ffffffff | |
4209 | bne %xcc,p0_freg_check_fail | |
4210 | mov 0xf00,%g1 | |
4211 | ldx [%g4+0x48],%g3 | |
4212 | std %f2,[%g4] | |
4213 | ldx [%g4],%g2 | |
4214 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
4215 | bne %xcc,p0_freg_check_fail | |
4216 | mov 0xf02,%g1 | |
4217 | ldx [%g4+0x50],%g3 | |
4218 | std %f12,[%g4] | |
4219 | ldx [%g4],%g2 | |
4220 | cmp %g3,%g2 ! %f12 = 00746fa4 0a8d001a | |
4221 | bne %xcc,p0_freg_check_fail | |
4222 | mov 0xf12,%g1 | |
4223 | ldx [%g4+0x58],%g3 | |
4224 | std %f18,[%g4] | |
4225 | ldx [%g4],%g2 | |
4226 | cmp %g3,%g2 ! %f18 = 0f105c1a 782a074d | |
4227 | bne %xcc,p0_freg_check_fail | |
4228 | mov 0xf18,%g1 | |
4229 | ldx [%g4+0x60],%g3 | |
4230 | std %f20,[%g4] | |
4231 | ldx [%g4],%g2 | |
4232 | cmp %g3,%g2 ! %f20 = 13a1c433 ffffffff | |
4233 | bne %xcc,p0_freg_check_fail | |
4234 | mov 0xf20,%g1 | |
4235 | ldx [%g4+0x68],%g3 | |
4236 | std %f22,[%g4] | |
4237 | ldx [%g4],%g2 | |
4238 | cmp %g3,%g2 ! %f22 = 6e000000 00006300 | |
4239 | bne %xcc,p0_freg_check_fail | |
4240 | mov 0xf22,%g1 | |
4241 | ldx [%g4+0x70],%g3 | |
4242 | std %f26,[%g4] | |
4243 | ldx [%g4],%g2 | |
4244 | cmp %g3,%g2 ! %f26 = 75b99345 9b4329a1 | |
4245 | bne %xcc,p0_freg_check_fail | |
4246 | mov 0xf26,%g1 | |
4247 | ldx [%g4+0x78],%g3 | |
4248 | std %f28,[%g4] | |
4249 | ldx [%g4],%g2 | |
4250 | cmp %g3,%g2 ! %f28 = ffffffca 00000000 | |
4251 | bne %xcc,p0_freg_check_fail | |
4252 | mov 0xf28,%g1 | |
4253 | ||
4254 | ! Check Point 19 completed | |
4255 | ||
4256 | ||
4257 | p0_label_96: | |
4258 | ! Mem[0000000010001421] = 9012a100, %l0 = 978d001ad7988a00 | |
4259 | ldstuba [%i0+0x021]%asi,%l0 ! %l0 = 00000012000000ff | |
4260 | ! %l0 = 0000000000000012, Mem[0000000010141400] = 00746fa4 | |
4261 | stba %l0,[%i5+%g0]0x80 ! Mem[0000000010141400] = 12746fa4 | |
4262 | ! %l2 = ffffffff, %l3 = 00000000, Mem[0000000030001410] = caffffff 1850c56d | |
4263 | stda %l2,[%i0+%o5]0x81 ! Mem[0000000030001410] = ffffffff 00000000 | |
4264 | ! %l0 = 00000012, %l1 = 77aa02f1, Mem[0000000030081408] = 00000000 00000000 | |
4265 | stda %l0,[%i2+%o4]0x81 ! Mem[0000000030081408] = 00000012 77aa02f1 | |
4266 | ! Mem[0000000010101438] = 6e000000, %l5 = 00000000, %l3 = 00000000 | |
4267 | add %i4,0x38,%g1 | |
4268 | casa [%g1]0x80,%l5,%l3 ! %l3 = 000000006e000000 | |
4269 | ! %l2 = ffffffffffffffff, Mem[00000000300c1408] = 0000007a | |
4270 | stba %l2,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 000000ff | |
4271 | ! %f7 = 6b6c2202, Mem[000000001008140c] = ffffffc7 | |
4272 | sta %f7 ,[%i2+0x00c]%asi ! Mem[000000001008140c] = 6b6c2202 | |
4273 | ! %l7 = 00000000e76e3fff, Mem[00000000211c0000] = fffffe0c, %asi = 80 | |
4274 | stba %l7,[%o2+0x000]%asi ! Mem[00000000211c0000] = fffffe0c | |
4275 | ! %l0 = 0000000000000012, Mem[0000000030041410] = ff0800001a5c100f | |
4276 | stxa %l0,[%i1+%o5]0x81 ! Mem[0000000030041410] = 0000000000000012 | |
4277 | ! Starting 10 instruction Load Burst | |
4278 | ! Mem[0000000030141408] = 1a5c100f, %l6 = 000000000000ffff | |
4279 | lduba [%i5+%o4]0x89,%l6 ! %l6 = 000000000000000f | |
4280 | ||
4281 | p0_label_97: | |
4282 | ! Mem[00000000100c1400] = 0a8d001a, %l0 = 0000000000000012 | |
4283 | ldswa [%i3+%g0]0x80,%l0 ! %l0 = 000000000a8d001a | |
4284 | ! Mem[0000000010181400] = 00007a9a, %l7 = 00000000e76e3fff | |
4285 | lduba [%i6+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
4286 | ! Mem[0000000010181410] = 000000ff, %l1 = 0000000077aa02f1 | |
4287 | ldsba [%i6+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
4288 | ! Mem[0000000030101410] = ffffc900, %l4 = 00000000ffffffff | |
4289 | ldswa [%i4+%o5]0x89,%l4 ! %l4 = ffffffffffffc900 | |
4290 | ! Mem[0000000010001408] = f102aa77, %l0 = 000000000a8d001a | |
4291 | ldsba [%i0+%o4]0x88,%l0 ! %l0 = 0000000000000077 | |
4292 | ! Mem[0000000030181408] = f102aa77, %l5 = 0000000000000000 | |
4293 | ldsha [%i6+%o4]0x81,%l5 ! %l5 = fffffffffffff102 | |
4294 | ! Mem[0000000030041410] = 00000000, %f20 = 13a1c433 | |
4295 | lda [%i1+%o5]0x81,%f20 ! %f20 = 00000000 | |
4296 | ! Mem[0000000030141410] = 000000e5, %l3 = 000000006e000000 | |
4297 | ldswa [%i5+%o5]0x89,%l3 ! %l3 = 00000000000000e5 | |
4298 | ! Mem[0000000030101400] = 5e27fffff1b600ff, %l3 = 00000000000000e5 | |
4299 | ldxa [%i4+%g0]0x89,%l3 ! %l3 = 5e27fffff1b600ff | |
4300 | ! Starting 10 instruction Store Burst | |
4301 | ! Mem[00000000100c1400] = 0a8d001a, %l5 = fffffffffffff102 | |
4302 | ldstuba [%i3+%g0]0x80,%l5 ! %l5 = 0000000a000000ff | |
4303 | ||
4304 | p0_label_98: | |
4305 | ! %l0 = 0000000000000077, Mem[0000000030141400] = ffffffff | |
4306 | stwa %l0,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000077 | |
4307 | ! %f16 = 00740000 00000000 0f105c1a 782a074d | |
4308 | ! %f20 = 00000000 ffffffff 6e000000 00006300 | |
4309 | ! %f24 = 00740000 0000007a 75b99345 9b4329a1 | |
4310 | ! %f28 = ffffffca 00000000 0f105c1a e0ffffff | |
4311 | stda %f16,[%i2]ASI_BLK_P ! Block Store to 0000000010081400 | |
4312 | ! Mem[0000000010001408] = f102aa77, %l2 = ffffffffffffffff | |
4313 | ldstuba [%i0+%o4]0x88,%l2 ! %l2 = 00000077000000ff | |
4314 | ! Mem[0000000010041434] = ffff275e, %l2 = 0000000000000077, %asi = 80 | |
4315 | swapa [%i1+0x034]%asi,%l2 ! %l2 = 00000000ffff275e | |
4316 | ! Mem[0000000030141400] = 77000000, %l3 = 5e27fffff1b600ff | |
4317 | ldstuba [%i5+%g0]0x81,%l3 ! %l3 = 00000077000000ff | |
4318 | ! Mem[0000000030141400] = ff000000, %l6 = 000000000000000f | |
4319 | swapa [%i5+%g0]0x81,%l6 ! %l6 = 00000000ff000000 | |
4320 | ! Mem[0000000030001410] = ffffffff, %l7 = 0000000000000000 | |
4321 | swapa [%i0+%o5]0x89,%l7 ! %l7 = 00000000ffffffff | |
4322 | ! %l5 = 000000000000000a, Mem[0000000030081410] = ffffffff | |
4323 | stha %l5,[%i2+%o5]0x81 ! Mem[0000000030081410] = 000affff | |
4324 | ! Mem[0000000010101408] = 782ae0ff, %l0 = 0000000000000077 | |
4325 | swapa [%i4+%o4]0x88,%l0 ! %l0 = 00000000782ae0ff | |
4326 | ! Starting 10 instruction Load Burst | |
4327 | ! Mem[00000000300c1408] = ff000000, %l5 = 000000000000000a | |
4328 | ldswa [%i3+%o4]0x81,%l5 ! %l5 = ffffffffff000000 | |
4329 | ||
4330 | p0_label_99: | |
4331 | ! Mem[0000000010101418] = 02f1ffff, %l0 = 00000000782ae0ff | |
4332 | lduw [%i4+0x018],%l0 ! %l0 = 0000000002f1ffff | |
4333 | membar #Sync ! Added by membar checker (26) | |
4334 | ! Mem[0000000010081420] = 007400000000007a, %f10 = c78091bb d9876ee7 | |
4335 | ldda [%i2+0x020]%asi,%f10 ! %f10 = 00740000 0000007a | |
4336 | ! Mem[0000000010081410] = 00000000, %l7 = 00000000ffffffff | |
4337 | ldswa [%i2+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
4338 | ! Mem[00000000201c0000] = ffff1669, %l5 = ffffffffff000000 | |
4339 | lduba [%o0+0x001]%asi,%l5 ! %l5 = 00000000000000ff | |
4340 | ! Mem[0000000030141400] = 0000000fffffffff, %l4 = ffffffffffffc900 | |
4341 | ldxa [%i5+%g0]0x81,%l4 ! %l4 = 0000000fffffffff | |
4342 | ! Mem[0000000010141408] = 00000000, %l3 = 0000000000000077 | |
4343 | lduwa [%i5+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
4344 | ! Mem[0000000010081418] = 6e00000000006300, %f22 = 6e000000 00006300 | |
4345 | ldda [%i2+0x018]%asi,%f22 ! %f22 = 6e000000 00006300 | |
4346 | ! Mem[0000000030001408] = 13a1c433 000074ff, %l2 = ffff275e, %l3 = 00000000 | |
4347 | ldda [%i0+%o4]0x81,%l2 ! %l2 = 0000000013a1c433 00000000000074ff | |
4348 | ! Mem[00000000211c0000] = fffffe0c, %l1 = 0000000000000000 | |
4349 | lduba [%o2+0x001]%asi,%l1 ! %l1 = 00000000000000ff | |
4350 | ! Starting 10 instruction Store Burst | |
4351 | ! Mem[000000001014141c] = 20e3dee5, %l1 = 000000ff, %l6 = ff000000 | |
4352 | add %i5,0x1c,%g1 | |
4353 | casa [%g1]0x80,%l1,%l6 ! %l6 = 0000000020e3dee5 | |
4354 | ||
4355 | p0_label_100: | |
4356 | ! Mem[0000000010081408] = 1a5c100f, %l5 = 00000000000000ff | |
4357 | swapa [%i2+%o4]0x88,%l5 ! %l5 = 000000001a5c100f | |
4358 | ! %l5 = 000000001a5c100f, Mem[0000000010181408] = 006300000000006e | |
4359 | stxa %l5,[%i6+%o4]0x88 ! Mem[0000000010181408] = 000000001a5c100f | |
4360 | ! Mem[0000000010181400] = 00007a9a, %l1 = 00000000000000ff, %asi = 80 | |
4361 | swapa [%i6+0x000]%asi,%l1 ! %l1 = 0000000000007a9a | |
4362 | ! %f24 = 00740000, Mem[0000000030181400] = ffffffff | |
4363 | sta %f24,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00740000 | |
4364 | ! %f14 = ffffffe0 74ff0000, Mem[0000000010101420] = 7a000000 7f5ce62c | |
4365 | std %f14,[%i4+0x020] ! Mem[0000000010101420] = ffffffe0 74ff0000 | |
4366 | ! %f4 = fffff102 269784ff, Mem[0000000010141410] = 1a008d0a 73a695a6 | |
4367 | stda %f4 ,[%i5+%o5]0x88 ! Mem[0000000010141410] = fffff102 269784ff | |
4368 | ! Mem[00000000100c1414] = 269784ff, %l0 = 02f1ffff, %l2 = 13a1c433 | |
4369 | add %i3,0x14,%g1 | |
4370 | casa [%g1]0x80,%l0,%l2 ! %l2 = 00000000269784ff | |
4371 | ! %l0 = 02f1ffff, %l1 = 00007a9a, Mem[0000000030041400] = ffff0000 185000ff | |
4372 | stda %l0,[%i1+%g0]0x81 ! Mem[0000000030041400] = 02f1ffff 00007a9a | |
4373 | ! %f14 = ffffffe0 74ff0000, Mem[0000000010001430] = 0000ff74 e0ffffff | |
4374 | std %f14,[%i0+0x030] ! Mem[0000000010001430] = ffffffe0 74ff0000 | |
4375 | ! Starting 10 instruction Load Burst | |
4376 | ! Mem[0000000010141400] = 12746fa4, %l3 = 00000000000074ff | |
4377 | lduba [%i5+%g0]0x80,%l3 ! %l3 = 0000000000000012 | |
4378 | ||
4379 | ! Check Point 20 for processor 0 | |
4380 | ||
4381 | set p0_check_pt_data_20,%g4 | |
4382 | rd %ccr,%g5 ! %g5 = 44 | |
4383 | ldx [%g4+0x08],%g2 | |
4384 | cmp %l0,%g2 ! %l0 = 0000000002f1ffff | |
4385 | bne %xcc,p0_reg_check_fail0 | |
4386 | mov 0xee0,%g1 | |
4387 | ldx [%g4+0x10],%g2 | |
4388 | cmp %l1,%g2 ! %l1 = 0000000000007a9a | |
4389 | bne %xcc,p0_reg_check_fail1 | |
4390 | mov 0xee1,%g1 | |
4391 | ldx [%g4+0x18],%g2 | |
4392 | cmp %l2,%g2 ! %l2 = 00000000269784ff | |
4393 | bne %xcc,p0_reg_check_fail2 | |
4394 | mov 0xee2,%g1 | |
4395 | ldx [%g4+0x20],%g2 | |
4396 | cmp %l3,%g2 ! %l3 = 0000000000000012 | |
4397 | bne %xcc,p0_reg_check_fail3 | |
4398 | mov 0xee3,%g1 | |
4399 | ldx [%g4+0x28],%g2 | |
4400 | cmp %l4,%g2 ! %l4 = 0000000fffffffff | |
4401 | bne %xcc,p0_reg_check_fail4 | |
4402 | mov 0xee4,%g1 | |
4403 | ldx [%g4+0x30],%g2 | |
4404 | cmp %l5,%g2 ! %l5 = 000000001a5c100f | |
4405 | bne %xcc,p0_reg_check_fail5 | |
4406 | mov 0xee5,%g1 | |
4407 | ldx [%g4+0x38],%g2 | |
4408 | cmp %l6,%g2 ! %l6 = 0000000020e3dee5 | |
4409 | bne %xcc,p0_reg_check_fail6 | |
4410 | mov 0xee6,%g1 | |
4411 | ldx [%g4+0x40],%g2 | |
4412 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
4413 | bne %xcc,p0_reg_check_fail7 | |
4414 | mov 0xee7,%g1 | |
4415 | ldx [%g4+0x48],%g3 | |
4416 | std %f2,[%g4] | |
4417 | ldx [%g4],%g2 | |
4418 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
4419 | bne %xcc,p0_freg_check_fail | |
4420 | mov 0xf02,%g1 | |
4421 | ldx [%g4+0x50],%g3 | |
4422 | std %f10,[%g4] | |
4423 | ldx [%g4],%g2 | |
4424 | cmp %g3,%g2 ! %f10 = 00740000 0000007a | |
4425 | bne %xcc,p0_freg_check_fail | |
4426 | mov 0xf10,%g1 | |
4427 | ldx [%g4+0x58],%g3 | |
4428 | std %f20,[%g4] | |
4429 | ldx [%g4],%g2 | |
4430 | cmp %g3,%g2 ! %f20 = 00000000 ffffffff | |
4431 | bne %xcc,p0_freg_check_fail | |
4432 | mov 0xf20,%g1 | |
4433 | ldx [%g4+0x60],%g3 | |
4434 | std %f22,[%g4] | |
4435 | ldx [%g4],%g2 | |
4436 | cmp %g3,%g2 ! %f22 = 6e000000 00006300 | |
4437 | bne %xcc,p0_freg_check_fail | |
4438 | mov 0xf22,%g1 | |
4439 | ||
4440 | ! Check Point 20 completed | |
4441 | ||
4442 | ||
4443 | p0_label_101: | |
4444 | ! Mem[00000000300c1400] = fffff1b6, %l6 = 0000000020e3dee5 | |
4445 | ldswa [%i3+%g0]0x89,%l6 ! %l6 = fffffffffffff1b6 | |
4446 | ! Mem[00000000300c1400] = b6f1ffff, %l0 = 0000000002f1ffff | |
4447 | ldswa [%i3+%g0]0x81,%l0 ! %l0 = ffffffffb6f1ffff | |
4448 | ! Mem[0000000010141404] = a309adff, %l6 = fffffffffffff1b6 | |
4449 | ldsh [%i5+0x004],%l6 ! %l6 = ffffffffffffa309 | |
4450 | ! Mem[0000000010081410] = 00000000, %l4 = 0000000fffffffff | |
4451 | ldswa [%i2+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
4452 | ! Mem[0000000010181408] = 1a5c100f, %l3 = 0000000000000012 | |
4453 | lduha [%i6+%o4]0x88,%l3 ! %l3 = 000000000000100f | |
4454 | ! Mem[0000000010101410] = 000000c9, %l2 = 00000000269784ff | |
4455 | ldsha [%i4+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
4456 | ! Mem[0000000030101410] = ffffc900, %l3 = 000000000000100f | |
4457 | ldsba [%i4+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
4458 | ! Mem[0000000030181410] = ff84972602f1ffff, %f4 = fffff102 269784ff | |
4459 | ldda [%i6+%o5]0x89,%f4 ! %f4 = ff849726 02f1ffff | |
4460 | ! Mem[0000000030141410] = 000000e5, %l1 = 0000000000007a9a | |
4461 | lduwa [%i5+%o5]0x89,%l1 ! %l1 = 00000000000000e5 | |
4462 | ! Starting 10 instruction Store Burst | |
4463 | ! Mem[0000000010181410] = 000000ff, %l1 = 00000000000000e5 | |
4464 | swapa [%i6+%o5]0x80,%l1 ! %l1 = 00000000000000ff | |
4465 | ||
4466 | p0_label_102: | |
4467 | ! Mem[0000000010101408] = 77000000, %l4 = 0000000000000000 | |
4468 | ldstuba [%i4+%o4]0x80,%l4 ! %l4 = 00000077000000ff | |
4469 | ! Mem[0000000030001400] = 9a7a0000, %l3 = 0000000000000000 | |
4470 | swapa [%i0+%g0]0x89,%l3 ! %l3 = 000000009a7a0000 | |
4471 | ! %f12 = 00746fa4 0a8d001a, Mem[0000000010101400] = e0ffffff 7a9a8d97 | |
4472 | stda %f12,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00746fa4 0a8d001a | |
4473 | ! Mem[00000000300c1400] = b6f1ffff, %l6 = ffffffffffffa309 | |
4474 | ldstuba [%i3+%g0]0x81,%l6 ! %l6 = 000000b6000000ff | |
4475 | ! Mem[00000000100c1408] = 000000ff, %l2 = 0000000000000000 | |
4476 | swap [%i3+%o4],%l2 ! %l2 = 00000000000000ff | |
4477 | ! %l3 = 000000009a7a0000, Mem[000000001018143c] = 0000006e, %asi = 80 | |
4478 | stwa %l3,[%i6+0x03c]%asi ! Mem[000000001018143c] = 9a7a0000 | |
4479 | ! Mem[0000000030181410] = fffff102, %l4 = 0000000000000077 | |
4480 | swapa [%i6+%o5]0x81,%l4 ! %l4 = 00000000fffff102 | |
4481 | ! %f10 = 00740000 0000007a, Mem[0000000010081410] = 00000000 ffffffff | |
4482 | stda %f10,[%i2+%o5]0x80 ! Mem[0000000010081410] = 00740000 0000007a | |
4483 | ! %f30 = 0f105c1a e0ffffff, Mem[0000000010141400] = a46f7412 ffad09a3 | |
4484 | stda %f30,[%i5+%g0]0x88 ! Mem[0000000010141400] = 0f105c1a e0ffffff | |
4485 | ! Starting 10 instruction Load Burst | |
4486 | ! Mem[0000000010181410] = 000000e5, %f16 = 00740000 | |
4487 | lda [%i6+%o5]0x80,%f16 ! %f16 = 000000e5 | |
4488 | ||
4489 | p0_label_103: | |
4490 | ! Mem[0000000030081400] = ffff00004d072a78, %l7 = 0000000000000000 | |
4491 | ldxa [%i2+%g0]0x81,%l7 ! %l7 = ffff00004d072a78 | |
4492 | ! Mem[0000000010001430] = ffffffe0, %l2 = 00000000000000ff | |
4493 | lduw [%i0+0x030],%l2 ! %l2 = 00000000ffffffe0 | |
4494 | ! Mem[0000000010141408] = 00000000, %l4 = 00000000fffff102 | |
4495 | ldswa [%i5+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
4496 | ! Mem[0000000030181410] = 00000077, %l7 = ffff00004d072a78 | |
4497 | lduha [%i6+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
4498 | ! Mem[0000000010101400] = 00746fa4 0a8d001a, %l0 = b6f1ffff, %l1 = 000000ff | |
4499 | ldda [%i4+%g0]0x80,%l0 ! %l0 = 0000000000746fa4 000000000a8d001a | |
4500 | ! Mem[0000000030041410] = 00000000, %l2 = 00000000ffffffe0 | |
4501 | lduha [%i1+%o5]0x81,%l2 ! %l2 = 0000000000000000 | |
4502 | ! Mem[000000001010140c] = ff8a98d7, %l6 = 00000000000000b6 | |
4503 | lduw [%i4+0x00c],%l6 ! %l6 = 00000000ff8a98d7 | |
4504 | ! Mem[0000000030001410] = 00000000, %l6 = 00000000ff8a98d7 | |
4505 | lduba [%i0+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
4506 | ! Mem[00000000100c1400] = ff8d001a, %l1 = 000000000a8d001a | |
4507 | lduba [%i3+%g0]0x80,%l1 ! %l1 = 00000000000000ff | |
4508 | ! Starting 10 instruction Store Burst | |
4509 | ! %f14 = ffffffe0 74ff0000, Mem[0000000030001408] = 13a1c433 000074ff | |
4510 | stda %f14,[%i0+%o4]0x81 ! Mem[0000000030001408] = ffffffe0 74ff0000 | |
4511 | ||
4512 | p0_label_104: | |
4513 | ! %l2 = 00000000, %l3 = 9a7a0000, Mem[0000000030081410] = 000affff fb7e5707 | |
4514 | stda %l2,[%i2+%o5]0x81 ! Mem[0000000030081410] = 00000000 9a7a0000 | |
4515 | ! %l6 = 0000000000000000, Mem[00000000100c143c] = 74ff0000, %asi = 80 | |
4516 | stha %l6,[%i3+0x03c]%asi ! Mem[00000000100c143c] = 00000000 | |
4517 | ! %l1 = 00000000000000ff, Mem[0000000030041410] = 0000000000000012 | |
4518 | stxa %l1,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000000000ff | |
4519 | ! Mem[00000000100c1408] = 00000000, %l6 = 0000000000000000 | |
4520 | ldstuba [%i3+%o4]0x80,%l6 ! %l6 = 00000000000000ff | |
4521 | ! %f30 = 0f105c1a e0ffffff, Mem[0000000010001430] = ffffffe0 74ff0000 | |
4522 | std %f30,[%i0+0x030] ! Mem[0000000010001430] = 0f105c1a e0ffffff | |
4523 | ! %l5 = 000000001a5c100f, Mem[0000000030041400] = 02f1ffff | |
4524 | stwa %l5,[%i1+%g0]0x81 ! Mem[0000000030041400] = 1a5c100f | |
4525 | ! Mem[0000000010141410] = ff849726, %l7 = 0000000000000000 | |
4526 | swapa [%i5+%o5]0x80,%l7 ! %l7 = 00000000ff849726 | |
4527 | ! Mem[00000000100c1408] = 000000ff, %l2 = 0000000000000000 | |
4528 | ldstuba [%i3+%o4]0x88,%l2 ! %l2 = 000000ff000000ff | |
4529 | ! %l0 = 0000000000746fa4, Mem[0000000010041400] = 008a98d7 | |
4530 | stwa %l0,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00746fa4 | |
4531 | ! Starting 10 instruction Load Burst | |
4532 | ! Mem[0000000010001410] = 000000e7, %l3 = 000000009a7a0000 | |
4533 | lduba [%i0+%o5]0x88,%l3 ! %l3 = 00000000000000e7 | |
4534 | ||
4535 | p0_label_105: | |
4536 | ! Mem[0000000030101408] = ffffffff, %l1 = 00000000000000ff | |
4537 | ldsba [%i4+%o4]0x81,%l1 ! %l1 = ffffffffffffffff | |
4538 | ! Mem[0000000020800040] = b4e79ffa, %l3 = 00000000000000e7 | |
4539 | ldsha [%o1+0x040]%asi,%l3 ! %l3 = ffffffffffffb4e7 | |
4540 | ! Mem[00000000100c1408] = ff000000, %l4 = 0000000000000000 | |
4541 | ldsba [%i3+%o4]0x80,%l4 ! %l4 = ffffffffffffffff | |
4542 | ! Mem[0000000010041400] = 00746fa41a008d97, %l0 = 0000000000746fa4 | |
4543 | ldxa [%i1+%g0]0x80,%l0 ! %l0 = 00746fa41a008d97 | |
4544 | ! Mem[0000000030081410] = 00000000, %l7 = 00000000ff849726 | |
4545 | ldsha [%i2+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
4546 | ! Mem[0000000010181418] = 00000000fffff1f1, %l4 = ffffffffffffffff | |
4547 | ldxa [%i6+0x018]%asi,%l4 ! %l4 = 00000000fffff1f1 | |
4548 | ! Mem[0000000010181408] = 1a5c100f, %l2 = 00000000000000ff | |
4549 | ldswa [%i6+%o4]0x88,%l2 ! %l2 = 000000001a5c100f | |
4550 | ! Mem[0000000010081428] = 75b99345 9b4329a1, %l4 = fffff1f1, %l5 = 1a5c100f | |
4551 | ldda [%i2+0x028]%asi,%l4 ! %l4 = 0000000075b99345 000000009b4329a1 | |
4552 | ! Mem[0000000010081428] = 75b99345 9b4329a1, %l2 = 1a5c100f, %l3 = ffffb4e7 | |
4553 | ldd [%i2+0x028],%l2 ! %l2 = 0000000075b99345 000000009b4329a1 | |
4554 | ! Starting 10 instruction Store Burst | |
4555 | ! %l1 = ffffffffffffffff, Mem[0000000030181410] = 77000000 | |
4556 | stba %l1,[%i6+%o5]0x89 ! Mem[0000000030181410] = 770000ff | |
4557 | ||
4558 | ! Check Point 21 for processor 0 | |
4559 | ||
4560 | set p0_check_pt_data_21,%g4 | |
4561 | rd %ccr,%g5 ! %g5 = 44 | |
4562 | ldx [%g4+0x08],%g2 | |
4563 | cmp %l0,%g2 ! %l0 = 00746fa41a008d97 | |
4564 | bne %xcc,p0_reg_check_fail0 | |
4565 | mov 0xee0,%g1 | |
4566 | ldx [%g4+0x10],%g2 | |
4567 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
4568 | bne %xcc,p0_reg_check_fail1 | |
4569 | mov 0xee1,%g1 | |
4570 | ldx [%g4+0x18],%g2 | |
4571 | cmp %l2,%g2 ! %l2 = 0000000075b99345 | |
4572 | bne %xcc,p0_reg_check_fail2 | |
4573 | mov 0xee2,%g1 | |
4574 | ldx [%g4+0x20],%g2 | |
4575 | cmp %l3,%g2 ! %l3 = 000000009b4329a1 | |
4576 | bne %xcc,p0_reg_check_fail3 | |
4577 | mov 0xee3,%g1 | |
4578 | ldx [%g4+0x28],%g2 | |
4579 | cmp %l4,%g2 ! %l4 = 0000000075b99345 | |
4580 | bne %xcc,p0_reg_check_fail4 | |
4581 | mov 0xee4,%g1 | |
4582 | ldx [%g4+0x30],%g2 | |
4583 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
4584 | bne %xcc,p0_reg_check_fail6 | |
4585 | mov 0xee6,%g1 | |
4586 | ldx [%g4+0x38],%g2 | |
4587 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
4588 | bne %xcc,p0_reg_check_fail7 | |
4589 | mov 0xee7,%g1 | |
4590 | ldx [%g4+0x40],%g3 | |
4591 | std %f0,[%g4] | |
4592 | ldx [%g4],%g2 | |
4593 | cmp %g3,%g2 ! %f0 = ffffffff ffffffff | |
4594 | bne %xcc,p0_freg_check_fail | |
4595 | mov 0xf00,%g1 | |
4596 | ldx [%g4+0x48],%g3 | |
4597 | std %f2,[%g4] | |
4598 | ldx [%g4],%g2 | |
4599 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
4600 | bne %xcc,p0_freg_check_fail | |
4601 | mov 0xf02,%g1 | |
4602 | ldx [%g4+0x50],%g3 | |
4603 | std %f4,[%g4] | |
4604 | ldx [%g4],%g2 | |
4605 | cmp %g3,%g2 ! %f4 = ff849726 02f1ffff | |
4606 | bne %xcc,p0_freg_check_fail | |
4607 | mov 0xf04,%g1 | |
4608 | ldx [%g4+0x58],%g3 | |
4609 | std %f16,[%g4] | |
4610 | ldx [%g4],%g2 | |
4611 | cmp %g3,%g2 ! %f16 = 000000e5 00000000 | |
4612 | bne %xcc,p0_freg_check_fail | |
4613 | mov 0xf16,%g1 | |
4614 | ||
4615 | ! Check Point 21 completed | |
4616 | ||
4617 | ||
4618 | p0_label_106: | |
4619 | ! %l2 = 75b99345, %l3 = 9b4329a1, Mem[0000000030101410] = 00c9ffff 269784ff | |
4620 | stda %l2,[%i4+%o5]0x81 ! Mem[0000000030101410] = 75b99345 9b4329a1 | |
4621 | ! Mem[0000000010081410] = 00740000, %l6 = 0000000000000000 | |
4622 | swapa [%i2+%o5]0x80,%l6 ! %l6 = 0000000000740000 | |
4623 | ! %l0 = 00746fa41a008d97, Mem[00000000300c1408] = 00740000000000ff | |
4624 | stxa %l0,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 00746fa41a008d97 | |
4625 | ! %l2 = 75b99345, %l3 = 9b4329a1, Mem[0000000010181400] = 000000ff e76e3fff | |
4626 | stda %l2,[%i6+%g0]0x80 ! Mem[0000000010181400] = 75b99345 9b4329a1 | |
4627 | ! %l6 = 0000000000740000, Mem[0000000010081410] = 000000000000007a | |
4628 | stxa %l6,[%i2+%o5]0x80 ! Mem[0000000010081410] = 0000000000740000 | |
4629 | ! %l2 = 0000000075b99345, Mem[0000000030141408] = 0f105c1ae0ffffff | |
4630 | stxa %l2,[%i5+%o4]0x81 ! Mem[0000000030141408] = 0000000075b99345 | |
4631 | ! %f24 = 00740000 0000007a, Mem[0000000010041400] = 00746fa4 1a008d97 | |
4632 | stda %f24,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00740000 0000007a | |
4633 | ! %l3 = 000000009b4329a1, Mem[0000000030041410] = 00000000 | |
4634 | stwa %l3,[%i1+%o5]0x89 ! Mem[0000000030041410] = 9b4329a1 | |
4635 | ! %l4 = 0000000075b99345, Mem[0000000010101400] = a46f7400 | |
4636 | stha %l4,[%i4+%g0]0x88 ! Mem[0000000010101400] = a46f9345 | |
4637 | ! Starting 10 instruction Load Burst | |
4638 | ! Mem[0000000020800000] = ff6c0db6, %l6 = 0000000000740000 | |
4639 | ldsb [%o1+0x001],%l6 ! %l6 = 000000000000006c | |
4640 | ||
4641 | p0_label_107: | |
4642 | ! Mem[0000000030001410] = 00000000 00000000, %l2 = 75b99345, %l3 = 9b4329a1 | |
4643 | ldda [%i0+%o5]0x89,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
4644 | ! Mem[0000000030101408] = ffffffff, %f21 = ffffffff | |
4645 | lda [%i4+%o4]0x81,%f21 ! %f21 = ffffffff | |
4646 | ! Mem[0000000010041410] = e76e00ff, %l1 = ffffffffffffffff | |
4647 | ldsha [%i1+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
4648 | ! Mem[0000000010181420] = 2ce65c7f, %l0 = 00746fa41a008d97 | |
4649 | lduba [%i6+0x020]%asi,%l0 ! %l0 = 000000000000002c | |
4650 | ! Mem[0000000010081428] = 75b99345 9b4329a1, %l4 = 75b99345, %l5 = 9b4329a1 | |
4651 | ldd [%i2+0x028],%l4 ! %l4 = 0000000075b99345 000000009b4329a1 | |
4652 | ! Mem[0000000030001400] = 0000000000000000, %f16 = 000000e5 00000000 | |
4653 | ldda [%i0+%g0]0x81,%f16 ! %f16 = 00000000 00000000 | |
4654 | ! Mem[0000000010041400] = 00740000, %l1 = 00000000000000ff | |
4655 | lduba [%i1+%g0]0x80,%l1 ! %l1 = 0000000000000000 | |
4656 | ! Mem[0000000010041400] = 00007400, %f31 = e0ffffff | |
4657 | lda [%i1+%g0]0x88,%f31 ! %f31 = 00007400 | |
4658 | ! Mem[0000000010101400] = 45936fa4, %l7 = 0000000000000000 | |
4659 | lduba [%i4+%g0]0x80,%l7 ! %l7 = 0000000000000045 | |
4660 | ! Starting 10 instruction Store Burst | |
4661 | ! Mem[0000000030041400] = 1a5c100f, %l5 = 000000009b4329a1 | |
4662 | ldstuba [%i1+%g0]0x81,%l5 ! %l5 = 0000001a000000ff | |
4663 | ||
4664 | p0_label_108: | |
4665 | ! %l0 = 000000000000002c, Mem[0000000010041408] = 00000000 | |
4666 | stba %l0,[%i1+%o4]0x88 ! Mem[0000000010041408] = 0000002c | |
4667 | ! Mem[0000000030101400] = ff00b6f1, %l1 = 0000000000000000 | |
4668 | ldstuba [%i4+%g0]0x81,%l1 ! %l1 = 000000ff000000ff | |
4669 | ! Mem[0000000020800001] = ff6c0db6, %l0 = 000000000000002c | |
4670 | ldstub [%o1+0x001],%l0 ! %l0 = 0000006c000000ff | |
4671 | ! Mem[0000000010081408] = ff000000, %l0 = 000000000000006c | |
4672 | swapa [%i2+%o4]0x80,%l0 ! %l0 = 00000000ff000000 | |
4673 | ! %f12 = 00746fa4 0a8d001a, %l1 = 00000000000000ff | |
4674 | ! Mem[0000000010081428] = 75b993459b4329a1 | |
4675 | add %i2,0x028,%g1 | |
4676 | stda %f12,[%g1+%l1]ASI_PST16_PL ! Mem[0000000010081428] = 1a008d0aa46f7400 | |
4677 | ! Mem[0000000030101408] = ffffffff, %l7 = 0000000000000045 | |
4678 | lduha [%i4+%o4]0x81,%l7 ! %l7 = 000000000000ffff | |
4679 | ! Mem[0000000030081400] = ffff0000, %l1 = 00000000000000ff | |
4680 | ldstuba [%i2+%g0]0x81,%l1 ! %l1 = 000000ff000000ff | |
4681 | ! %f24 = 00740000 0000007a, %l7 = 000000000000ffff | |
4682 | ! Mem[0000000010101428] = e50000008a000000 | |
4683 | add %i4,0x028,%g1 | |
4684 | stda %f24,[%g1+%l7]ASI_PST32_P ! Mem[0000000010101428] = 007400000000007a | |
4685 | ! Mem[0000000010101408] = 000000ff, %l5 = 000000000000001a | |
4686 | ldstuba [%i4+%o4]0x88,%l5 ! %l5 = 000000ff000000ff | |
4687 | ! Starting 10 instruction Load Burst | |
4688 | ! Mem[0000000010041400] = 00007400, %l1 = 00000000000000ff | |
4689 | lduha [%i1+%g0]0x88,%l1 ! %l1 = 0000000000007400 | |
4690 | ||
4691 | p0_label_109: | |
4692 | ! Mem[00000000300c1400] = fffff1ff, %l3 = 0000000000000000 | |
4693 | ldsba [%i3+%g0]0x89,%l3 ! %l3 = ffffffffffffffff | |
4694 | ! Mem[0000000030041410] = 9b4329a1, %l3 = ffffffffffffffff | |
4695 | lduba [%i1+%o5]0x89,%l3 ! %l3 = 00000000000000a1 | |
4696 | ! Mem[0000000030041408] = 00000000, %l0 = 00000000ff000000 | |
4697 | lduwa [%i1+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
4698 | ! Mem[0000000030001410] = 00000000, %l4 = 0000000075b99345 | |
4699 | lduwa [%i0+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
4700 | ! Mem[0000000030101410] = 75b99345 9b4329a1, %l2 = 00000000, %l3 = 000000a1 | |
4701 | ldda [%i4+%o5]0x81,%l2 ! %l2 = 0000000075b99345 000000009b4329a1 | |
4702 | ! Mem[0000000030001408] = ffffffe0, %l3 = 000000009b4329a1 | |
4703 | lduwa [%i0+%o4]0x81,%l3 ! %l3 = 00000000ffffffe0 | |
4704 | ! Mem[0000000010181410] = e5000000, %l2 = 0000000075b99345 | |
4705 | ldsha [%i6+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
4706 | membar #Sync ! Added by membar checker (27) | |
4707 | ! Mem[0000000030081400] = ffff0000 4d072a78 00000012 77aa02f1 | |
4708 | ! Mem[0000000030081410] = 00000000 9a7a0000 1d825880 5e067d5a | |
4709 | ! Mem[0000000030081420] = 06d37253 8e2d6ade 578bd2d3 c3fce2e3 | |
4710 | ! Mem[0000000030081430] = 0a06c0b1 c0dc16be 4b20c2b8 480207d9 | |
4711 | ldda [%i2]ASI_BLK_SL,%f16 ! Block Load from 0000000030081400 | |
4712 | ! Mem[00000000300c1400] = fffff1ff, %l6 = 000000000000006c | |
4713 | lduha [%i3+%g0]0x89,%l6 ! %l6 = 000000000000f1ff | |
4714 | ! Starting 10 instruction Store Burst | |
4715 | ! %f4 = ff849726, Mem[0000000010101408] = ff000000 | |
4716 | sta %f4 ,[%i4+%o4]0x80 ! Mem[0000000010101408] = ff849726 | |
4717 | ||
4718 | p0_label_110: | |
4719 | ! %f16 = 782a074d 0000ffff f102aa77 12000000 | |
4720 | ! %f20 = 00007a9a 00000000 5a7d065e 8058821d | |
4721 | ! %f24 = de6a2d8e 5372d306 e3e2fcc3 d3d28b57 | |
4722 | ! %f28 = be16dcc0 b1c0060a d9070248 b8c2204b | |
4723 | stda %f16,[%i0]ASI_BLK_SL ! Block Store to 0000000030001400 | |
4724 | ! %l0 = 00000000, %l1 = 00007400, Mem[0000000030181410] = ff000077 269784ff | |
4725 | stda %l0,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 00007400 | |
4726 | ! Mem[0000000010101400] = 45936fa4, %l4 = 0000000000000000 | |
4727 | swapa [%i4+%g0]0x80,%l4 ! %l4 = 0000000045936fa4 | |
4728 | ! %l7 = 000000000000ffff, Mem[0000000010001432] = 0f105c1a | |
4729 | stb %l7,[%i0+0x032] ! Mem[0000000010001430] = 0f10ff1a | |
4730 | ! %l7 = 000000000000ffff, Mem[0000000010101400] = 00000000 | |
4731 | stha %l7,[%i4+%g0]0x88 ! Mem[0000000010101400] = 0000ffff | |
4732 | ! Mem[00000000211c0001] = fffffe0c, %l1 = 0000000000007400 | |
4733 | ldstub [%o2+0x001],%l1 ! %l1 = 000000ff000000ff | |
4734 | ! %f13 = 0a8d001a, Mem[0000000030181410] = 00000000 | |
4735 | sta %f13,[%i6+%o5]0x89 ! Mem[0000000030181410] = 0a8d001a | |
4736 | ! Mem[0000000010101408] = 269784ff, %l0 = 0000000000000000 | |
4737 | ldstuba [%i4+%o4]0x88,%l0 ! %l0 = 000000ff000000ff | |
4738 | ! %l7 = 000000000000ffff, Mem[0000000030181410] = 1a008d0a | |
4739 | stba %l7,[%i6+%o5]0x81 ! Mem[0000000030181410] = ff008d0a | |
4740 | ! Starting 10 instruction Load Burst | |
4741 | ! Mem[0000000030041400] = 0f105cff, %l0 = 00000000000000ff | |
4742 | ldsha [%i1+%g0]0x89,%l0 ! %l0 = 0000000000005cff | |
4743 | ||
4744 | ! Check Point 22 for processor 0 | |
4745 | ||
4746 | set p0_check_pt_data_22,%g4 | |
4747 | rd %ccr,%g5 ! %g5 = 44 | |
4748 | ldx [%g4+0x08],%g2 | |
4749 | cmp %l0,%g2 ! %l0 = 0000000000005cff | |
4750 | bne %xcc,p0_reg_check_fail0 | |
4751 | mov 0xee0,%g1 | |
4752 | ldx [%g4+0x10],%g2 | |
4753 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
4754 | bne %xcc,p0_reg_check_fail1 | |
4755 | mov 0xee1,%g1 | |
4756 | ldx [%g4+0x18],%g2 | |
4757 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
4758 | bne %xcc,p0_reg_check_fail2 | |
4759 | mov 0xee2,%g1 | |
4760 | ldx [%g4+0x20],%g2 | |
4761 | cmp %l3,%g2 ! %l3 = 00000000ffffffe0 | |
4762 | bne %xcc,p0_reg_check_fail3 | |
4763 | mov 0xee3,%g1 | |
4764 | ldx [%g4+0x28],%g2 | |
4765 | cmp %l4,%g2 ! %l4 = 0000000045936fa4 | |
4766 | bne %xcc,p0_reg_check_fail4 | |
4767 | mov 0xee4,%g1 | |
4768 | ldx [%g4+0x30],%g2 | |
4769 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
4770 | bne %xcc,p0_reg_check_fail5 | |
4771 | mov 0xee5,%g1 | |
4772 | ldx [%g4+0x38],%g2 | |
4773 | cmp %l6,%g2 ! %l6 = 000000000000f1ff | |
4774 | bne %xcc,p0_reg_check_fail6 | |
4775 | mov 0xee6,%g1 | |
4776 | ldx [%g4+0x40],%g2 | |
4777 | cmp %l7,%g2 ! %l7 = 000000000000ffff | |
4778 | bne %xcc,p0_reg_check_fail7 | |
4779 | mov 0xee7,%g1 | |
4780 | ldx [%g4+0x48],%g3 | |
4781 | std %f2,[%g4] | |
4782 | ldx [%g4],%g2 | |
4783 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
4784 | bne %xcc,p0_freg_check_fail | |
4785 | mov 0xf02,%g1 | |
4786 | ldx [%g4+0x50],%g3 | |
4787 | std %f4,[%g4] | |
4788 | ldx [%g4],%g2 | |
4789 | cmp %g3,%g2 ! %f4 = ff849726 02f1ffff | |
4790 | bne %xcc,p0_freg_check_fail | |
4791 | mov 0xf04,%g1 | |
4792 | ldx [%g4+0x58],%g3 | |
4793 | std %f16,[%g4] | |
4794 | ldx [%g4],%g2 | |
4795 | cmp %g3,%g2 ! %f16 = 782a074d 0000ffff | |
4796 | bne %xcc,p0_freg_check_fail | |
4797 | mov 0xf16,%g1 | |
4798 | ldx [%g4+0x60],%g3 | |
4799 | std %f18,[%g4] | |
4800 | ldx [%g4],%g2 | |
4801 | cmp %g3,%g2 ! %f18 = f102aa77 12000000 | |
4802 | bne %xcc,p0_freg_check_fail | |
4803 | mov 0xf18,%g1 | |
4804 | ldx [%g4+0x68],%g3 | |
4805 | std %f20,[%g4] | |
4806 | ldx [%g4],%g2 | |
4807 | cmp %g3,%g2 ! %f20 = 00007a9a 00000000 | |
4808 | bne %xcc,p0_freg_check_fail | |
4809 | mov 0xf20,%g1 | |
4810 | ldx [%g4+0x70],%g3 | |
4811 | std %f22,[%g4] | |
4812 | ldx [%g4],%g2 | |
4813 | cmp %g3,%g2 ! %f22 = 5a7d065e 8058821d | |
4814 | bne %xcc,p0_freg_check_fail | |
4815 | mov 0xf22,%g1 | |
4816 | ldx [%g4+0x78],%g3 | |
4817 | std %f24,[%g4] | |
4818 | ldx [%g4],%g2 | |
4819 | cmp %g3,%g2 ! %f24 = de6a2d8e 5372d306 | |
4820 | bne %xcc,p0_freg_check_fail | |
4821 | mov 0xf24,%g1 | |
4822 | ldx [%g4+0x80],%g3 | |
4823 | std %f26,[%g4] | |
4824 | ldx [%g4],%g2 | |
4825 | cmp %g3,%g2 ! %f26 = e3e2fcc3 d3d28b57 | |
4826 | bne %xcc,p0_freg_check_fail | |
4827 | mov 0xf26,%g1 | |
4828 | ldx [%g4+0x88],%g3 | |
4829 | std %f28,[%g4] | |
4830 | ldx [%g4],%g2 | |
4831 | cmp %g3,%g2 ! %f28 = be16dcc0 b1c0060a | |
4832 | bne %xcc,p0_freg_check_fail | |
4833 | mov 0xf28,%g1 | |
4834 | ldx [%g4+0x90],%g3 | |
4835 | std %f30,[%g4] | |
4836 | ldx [%g4],%g2 | |
4837 | cmp %g3,%g2 ! %f30 = d9070248 b8c2204b | |
4838 | bne %xcc,p0_freg_check_fail | |
4839 | mov 0xf30,%g1 | |
4840 | ||
4841 | ! Check Point 22 completed | |
4842 | ||
4843 | ||
4844 | p0_label_111: | |
4845 | ! Mem[0000000030141410] = 00000000000000e5, %l2 = 0000000000000000 | |
4846 | ldxa [%i5+%o5]0x89,%l2 ! %l2 = 00000000000000e5 | |
4847 | ! Mem[0000000030101408] = ffffffff, %l6 = 000000000000f1ff | |
4848 | ldswa [%i4+%o4]0x89,%l6 ! %l6 = ffffffffffffffff | |
4849 | ! Mem[0000000010041410] = e76e00ff, %l7 = 000000000000ffff | |
4850 | lduha [%i1+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
4851 | ! Mem[0000000030101410] = a129439b4593b975, %f12 = 00746fa4 0a8d001a | |
4852 | ldda [%i4+%o5]0x89,%f12 ! %f12 = a129439b 4593b975 | |
4853 | ! Mem[00000000100c1408] = ff000000ffffffff, %f18 = f102aa77 12000000 | |
4854 | ldda [%i3+%o4]0x80,%f18 ! %f18 = ff000000 ffffffff | |
4855 | ! Mem[0000000030141408] = 00000000, %l2 = 00000000000000e5 | |
4856 | lduba [%i5+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
4857 | ! Mem[00000000201c0000] = ffff1669, %l0 = 0000000000005cff | |
4858 | ldsh [%o0+%g0],%l0 ! %l0 = ffffffffffffffff | |
4859 | ! Mem[00000000211c0000] = fffffe0c, %l0 = ffffffffffffffff | |
4860 | ldsb [%o2+%g0],%l0 ! %l0 = ffffffffffffffff | |
4861 | membar #Sync ! Added by membar checker (28) | |
4862 | ! Mem[0000000010001408] = f102aaff, %l7 = 00000000000000ff | |
4863 | ldsba [%i0+%o4]0x88,%l7 ! %l7 = ffffffffffffffff | |
4864 | ! Starting 10 instruction Store Burst | |
4865 | ! %f0 = ffffffff ffffffff ffffffff ffffffff | |
4866 | ! %f4 = ff849726 02f1ffff 00000000 6b6c2202 | |
4867 | ! %f8 = 00000000 d81a5b92 00740000 0000007a | |
4868 | ! %f12 = a129439b 4593b975 ffffffe0 74ff0000 | |
4869 | stda %f0,[%i5]ASI_BLK_SL ! Block Store to 0000000030141400 | |
4870 | ||
4871 | p0_label_112: | |
4872 | ! %l0 = ffffffff, %l1 = 000000ff, Mem[0000000030181410] = 0a8d00ff 00740000 | |
4873 | stda %l0,[%i6+%o5]0x89 ! Mem[0000000030181410] = ffffffff 000000ff | |
4874 | ! %f16 = 782a074d 0000ffff, %l2 = 0000000000000000 | |
4875 | ! Mem[00000000100c1408] = ff000000ffffffff | |
4876 | add %i3,0x008,%g1 | |
4877 | stda %f16,[%g1+%l2]ASI_PST32_P ! Mem[00000000100c1408] = ff000000ffffffff | |
4878 | ! Mem[0000000030081408] = 12000000, %l2 = 0000000000000000 | |
4879 | ldstuba [%i2+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
4880 | ! %l2 = 00000000, %l3 = ffffffe0, Mem[0000000030141410] = fffff102 269784ff | |
4881 | stda %l2,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 ffffffe0 | |
4882 | ! %l2 = 0000000000000000, Mem[0000000010141410] = 00000000 | |
4883 | stha %l2,[%i5+%o5]0x88 ! Mem[0000000010141410] = 00000000 | |
4884 | ! %l3 = 00000000ffffffe0, Mem[0000000010081408] = 6c000000 | |
4885 | stwa %l3,[%i2+%o4]0x88 ! Mem[0000000010081408] = ffffffe0 | |
4886 | ! %l0 = ffffffffffffffff, Mem[0000000030141410] = 00000000 | |
4887 | stba %l0,[%i5+%o5]0x81 ! Mem[0000000030141410] = ff000000 | |
4888 | ! Mem[00000000300c1400] = fff1ffff, %l4 = 0000000045936fa4 | |
4889 | ldstuba [%i3+%g0]0x81,%l4 ! %l4 = 000000ff000000ff | |
4890 | ! %l6 = ffffffffffffffff, Mem[00000000300c1408] = 978d001a | |
4891 | stha %l6,[%i3+%o4]0x81 ! Mem[00000000300c1408] = ffff001a | |
4892 | ! Starting 10 instruction Load Burst | |
4893 | ! Mem[0000000021800140] = 5b30f8a0, %l3 = 00000000ffffffe0 | |
4894 | ldsha [%o3+0x140]%asi,%l3 ! %l3 = 0000000000005b30 | |
4895 | ||
4896 | p0_label_113: | |
4897 | ! Mem[0000000030041408] = 00000000, %l6 = ffffffffffffffff | |
4898 | ldswa [%i1+%o4]0x81,%l6 ! %l6 = 0000000000000000 | |
4899 | ! Mem[0000000010041400] = 007400000000007a, %l2 = 0000000000000000 | |
4900 | ldxa [%i1+%g0]0x80,%l2 ! %l2 = 007400000000007a | |
4901 | ! Mem[0000000030081408] = 120000ff, %l7 = ffffffffffffffff | |
4902 | ldswa [%i2+%o4]0x89,%l7 ! %l7 = 00000000120000ff | |
4903 | ! Mem[0000000010101400] = 1a008d0a 0000ffff, %l6 = 00000000, %l7 = 120000ff | |
4904 | ldda [%i4+%g0]0x88,%l6 ! %l6 = 000000000000ffff 000000001a008d0a | |
4905 | ! Mem[0000000030101410] = 75b99345, %l5 = 00000000000000ff | |
4906 | ldsba [%i4+%o5]0x81,%l5 ! %l5 = 0000000000000075 | |
4907 | ! Mem[0000000010041410] = ff006ee7, %l5 = 0000000000000075 | |
4908 | ldsba [%i1+%o5]0x80,%l5 ! %l5 = ffffffffffffffff | |
4909 | ! Mem[0000000010181400] = 4593b975, %l5 = ffffffffffffffff | |
4910 | lduwa [%i6+%g0]0x88,%l5 ! %l5 = 000000004593b975 | |
4911 | ! Mem[0000000010041400] = 00740000, %l5 = 000000004593b975 | |
4912 | ldsba [%i1+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
4913 | membar #Sync ! Added by membar checker (29) | |
4914 | ! Mem[0000000010141410] = 0000000002f1ffff, %l7 = 000000001a008d0a | |
4915 | ldxa [%i5+%o5]0x80,%l7 ! %l7 = 0000000002f1ffff | |
4916 | ! Starting 10 instruction Store Burst | |
4917 | ! %l5 = 0000000000000000, Mem[0000000030041400] = ff5c100f00007a9a | |
4918 | stxa %l5,[%i1+%g0]0x81 ! Mem[0000000030041400] = 0000000000000000 | |
4919 | ||
4920 | p0_label_114: | |
4921 | ! %f22 = 5a7d065e 8058821d, Mem[0000000010181418] = 00000000 fffff1f1 | |
4922 | stda %f22,[%i6+0x018]%asi ! Mem[0000000010181418] = 5a7d065e 8058821d | |
4923 | ! %f30 = d9070248, Mem[0000000010101410] = 000000c9 | |
4924 | st %f30,[%i4+%o5] ! Mem[0000000010101410] = d9070248 | |
4925 | ! %l3 = 0000000000005b30, Mem[0000000030181410] = ffffffff | |
4926 | stha %l3,[%i6+%o5]0x89 ! Mem[0000000030181410] = ffff5b30 | |
4927 | ! Mem[0000000010181400] = 4593b975, %l7 = 0000000002f1ffff | |
4928 | swapa [%i6+%g0]0x88,%l7 ! %l7 = 000000004593b975 | |
4929 | ! %f16 = 782a074d, Mem[0000000030141408] = ffffffff | |
4930 | sta %f16,[%i5+%o4]0x89 ! Mem[0000000030141408] = 782a074d | |
4931 | ! %l5 = 0000000000000000, Mem[0000000030181400] = 00007400 | |
4932 | stba %l5,[%i6+%g0]0x89 ! Mem[0000000030181400] = 00007400 | |
4933 | ! Mem[0000000030001408] = 12000000, %l4 = 00000000000000ff | |
4934 | ldstuba [%i0+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
4935 | ! Mem[0000000030001408] = 120000ff, %l5 = 0000000000000000 | |
4936 | swapa [%i0+%o4]0x89,%l5 ! %l5 = 00000000120000ff | |
4937 | ! Mem[0000000010081400] = 00740000 00000000 e0ffffff 782a074d | |
4938 | ! Mem[0000000010081410] = 00000000 00740000 6e000000 00006300 | |
4939 | ! Mem[0000000010081420] = 00740000 0000007a 1a008d0a a46f7400 | |
4940 | ! Mem[0000000010081430] = ffffffca 00000000 0f105c1a e0ffffff | |
4941 | ldda [%i2]ASI_BLK_PL,%f0 ! Block Load from 0000000010081400 | |
4942 | ! Starting 10 instruction Load Burst | |
4943 | ! Mem[0000000010181408] = 0f105c1a, %l0 = ffffffffffffffff | |
4944 | lduwa [%i6+%o4]0x80,%l0 ! %l0 = 000000000f105c1a | |
4945 | ||
4946 | p0_label_115: | |
4947 | ! Mem[0000000010041404] = 0000007a, %l6 = 000000000000ffff | |
4948 | ldswa [%i1+0x004]%asi,%l6 ! %l6 = 000000000000007a | |
4949 | ! Mem[0000000030041408] = 00000000, %l7 = 000000004593b975 | |
4950 | ldsba [%i1+%o4]0x81,%l7 ! %l7 = 0000000000000000 | |
4951 | ! Mem[00000000100c1410] = fffff102, %l0 = 000000000f105c1a | |
4952 | lduwa [%i3+%o5]0x80,%l0 ! %l0 = 00000000fffff102 | |
4953 | ! Mem[0000000030081408] = ff000012, %l5 = 00000000120000ff | |
4954 | ldswa [%i2+%o4]0x81,%l5 ! %l5 = ffffffffff000012 | |
4955 | ! Mem[0000000010101410] = d90702481eeb13ed, %f20 = 00007a9a 00000000 | |
4956 | ldda [%i4+%o5]0x80,%f20 ! %f20 = d9070248 1eeb13ed | |
4957 | ! Mem[00000000211c0000] = fffffe0c, %l1 = 00000000000000ff | |
4958 | ldsh [%o2+%g0],%l1 ! %l1 = ffffffffffffffff | |
4959 | ! Mem[0000000010001410] = e7000000, %l7 = 0000000000000000 | |
4960 | lduba [%i0+%o5]0x80,%l7 ! %l7 = 00000000000000e7 | |
4961 | ! Mem[0000000030141408] = 4d072a78, %l1 = ffffffffffffffff | |
4962 | ldswa [%i5+%o4]0x81,%l1 ! %l1 = 000000004d072a78 | |
4963 | ! Mem[00000000100c1400] = ff8d001a, %l7 = 00000000000000e7 | |
4964 | ldswa [%i3+%g0]0x80,%l7 ! %l7 = ffffffffff8d001a | |
4965 | ! Starting 10 instruction Store Burst | |
4966 | ! Mem[0000000010001436] = e0ffffff, %l3 = 0000000000005b30 | |
4967 | ldstub [%i0+0x036],%l3 ! %l3 = 000000ff000000ff | |
4968 | ||
4969 | ! Check Point 23 for processor 0 | |
4970 | ||
4971 | set p0_check_pt_data_23,%g4 | |
4972 | rd %ccr,%g5 ! %g5 = 44 | |
4973 | ldx [%g4+0x08],%g2 | |
4974 | cmp %l0,%g2 ! %l0 = 00000000fffff102 | |
4975 | bne %xcc,p0_reg_check_fail0 | |
4976 | mov 0xee0,%g1 | |
4977 | ldx [%g4+0x10],%g2 | |
4978 | cmp %l1,%g2 ! %l1 = 000000004d072a78 | |
4979 | bne %xcc,p0_reg_check_fail1 | |
4980 | mov 0xee1,%g1 | |
4981 | ldx [%g4+0x18],%g2 | |
4982 | cmp %l2,%g2 ! %l2 = 007400000000007a | |
4983 | bne %xcc,p0_reg_check_fail2 | |
4984 | mov 0xee2,%g1 | |
4985 | ldx [%g4+0x20],%g2 | |
4986 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
4987 | bne %xcc,p0_reg_check_fail3 | |
4988 | mov 0xee3,%g1 | |
4989 | ldx [%g4+0x28],%g2 | |
4990 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
4991 | bne %xcc,p0_reg_check_fail4 | |
4992 | mov 0xee4,%g1 | |
4993 | ldx [%g4+0x30],%g2 | |
4994 | cmp %l5,%g2 ! %l5 = ffffffffff000012 | |
4995 | bne %xcc,p0_reg_check_fail5 | |
4996 | mov 0xee5,%g1 | |
4997 | ldx [%g4+0x38],%g2 | |
4998 | cmp %l6,%g2 ! %l6 = 000000000000007a | |
4999 | bne %xcc,p0_reg_check_fail6 | |
5000 | mov 0xee6,%g1 | |
5001 | ldx [%g4+0x40],%g2 | |
5002 | cmp %l7,%g2 ! %l7 = ffffffffff8d001a | |
5003 | bne %xcc,p0_reg_check_fail7 | |
5004 | mov 0xee7,%g1 | |
5005 | ldx [%g4+0x48],%g3 | |
5006 | std %f0,[%g4] | |
5007 | ldx [%g4],%g2 | |
5008 | cmp %g3,%g2 ! %f0 = 00000000 00007400 | |
5009 | bne %xcc,p0_freg_check_fail | |
5010 | mov 0xf00,%g1 | |
5011 | ldx [%g4+0x50],%g3 | |
5012 | std %f2,[%g4] | |
5013 | ldx [%g4],%g2 | |
5014 | cmp %g3,%g2 ! %f2 = 4d072a78 ffffffe0 | |
5015 | bne %xcc,p0_freg_check_fail | |
5016 | mov 0xf02,%g1 | |
5017 | ldx [%g4+0x58],%g3 | |
5018 | std %f4,[%g4] | |
5019 | ldx [%g4],%g2 | |
5020 | cmp %g3,%g2 ! %f4 = 00007400 00000000 | |
5021 | bne %xcc,p0_freg_check_fail | |
5022 | mov 0xf04,%g1 | |
5023 | ldx [%g4+0x60],%g3 | |
5024 | std %f6,[%g4] | |
5025 | ldx [%g4],%g2 | |
5026 | cmp %g3,%g2 ! %f6 = 00630000 0000006e | |
5027 | bne %xcc,p0_freg_check_fail | |
5028 | mov 0xf06,%g1 | |
5029 | ldx [%g4+0x68],%g3 | |
5030 | std %f8,[%g4] | |
5031 | ldx [%g4],%g2 | |
5032 | cmp %g3,%g2 ! %f8 = 7a000000 00007400 | |
5033 | bne %xcc,p0_freg_check_fail | |
5034 | mov 0xf08,%g1 | |
5035 | ldx [%g4+0x70],%g3 | |
5036 | std %f10,[%g4] | |
5037 | ldx [%g4],%g2 | |
5038 | cmp %g3,%g2 ! %f10 = 00746fa4 0a8d001a | |
5039 | bne %xcc,p0_freg_check_fail | |
5040 | mov 0xf10,%g1 | |
5041 | ldx [%g4+0x78],%g3 | |
5042 | std %f12,[%g4] | |
5043 | ldx [%g4],%g2 | |
5044 | cmp %g3,%g2 ! %f12 = 00000000 caffffff | |
5045 | bne %xcc,p0_freg_check_fail | |
5046 | mov 0xf12,%g1 | |
5047 | ldx [%g4+0x80],%g3 | |
5048 | std %f14,[%g4] | |
5049 | ldx [%g4],%g2 | |
5050 | cmp %g3,%g2 ! %f14 = ffffffe0 1a5c100f | |
5051 | bne %xcc,p0_freg_check_fail | |
5052 | mov 0xf14,%g1 | |
5053 | ldx [%g4+0x88],%g3 | |
5054 | std %f18,[%g4] | |
5055 | ldx [%g4],%g2 | |
5056 | cmp %g3,%g2 ! %f18 = ff000000 ffffffff | |
5057 | bne %xcc,p0_freg_check_fail | |
5058 | mov 0xf18,%g1 | |
5059 | ldx [%g4+0x90],%g3 | |
5060 | std %f20,[%g4] | |
5061 | ldx [%g4],%g2 | |
5062 | cmp %g3,%g2 ! %f20 = d9070248 1eeb13ed | |
5063 | bne %xcc,p0_freg_check_fail | |
5064 | mov 0xf20,%g1 | |
5065 | ||
5066 | ! Check Point 23 completed | |
5067 | ||
5068 | ||
5069 | p0_label_116: | |
5070 | ! %l1 = 000000004d072a78, Mem[00000000201c0000] = ffff1669, %asi = 80 | |
5071 | stha %l1,[%o0+0x000]%asi ! Mem[00000000201c0000] = 2a781669 | |
5072 | ! %f23 = 8058821d, Mem[0000000030181408] = f102aa77 | |
5073 | sta %f23,[%i6+%o4]0x81 ! Mem[0000000030181408] = 8058821d | |
5074 | ! Mem[0000000030081410] = 00000000, %l0 = 00000000fffff102 | |
5075 | ldstuba [%i2+%o5]0x81,%l0 ! %l0 = 00000000000000ff | |
5076 | ! Mem[00000000100c1400] = 1a008dff, %l5 = ffffffffff000012 | |
5077 | swapa [%i3+%g0]0x88,%l5 ! %l5 = 000000001a008dff | |
5078 | ! %l3 = 00000000000000ff, Mem[0000000030081400] = ffff0000 | |
5079 | stba %l3,[%i2+%g0]0x81 ! Mem[0000000030081400] = ffff0000 | |
5080 | ! %l4 = 0000000000000000, Mem[0000000010141409] = 00000000 | |
5081 | stb %l4,[%i5+0x009] ! Mem[0000000010141408] = 00000000 | |
5082 | ! %f4 = 00007400 00000000, Mem[00000000100c1410] = fffff102 269784ff | |
5083 | std %f4 ,[%i3+%o5] ! Mem[00000000100c1410] = 00007400 00000000 | |
5084 | ! %f20 = d9070248 1eeb13ed, %l1 = 000000004d072a78 | |
5085 | ! Mem[0000000030141410] = ff000000ffffffe0 | |
5086 | add %i5,0x010,%g1 | |
5087 | stda %f20,[%g1+%l1]ASI_PST8_S ! Mem[0000000030141410] = ff0702481effffe0 | |
5088 | ! %f8 = 7a000000, Mem[00000000100c1430] = fac65f36 | |
5089 | st %f8 ,[%i3+0x030] ! Mem[00000000100c1430] = 7a000000 | |
5090 | ! Starting 10 instruction Load Burst | |
5091 | ! Mem[0000000030101400] = ff00b6f1 ffff275e ffffffff ffffffff | |
5092 | ! Mem[0000000030101410] = 75b99345 9b4329a1 5e9e1157 6b6c2202 | |
5093 | ! Mem[0000000030101420] = 3bedac39 d81a5b92 c78091bb 759a4764 | |
5094 | ! Mem[0000000030101430] = fac65f36 9ce0b68a 46ee6de4 c49410cd | |
5095 | ldda [%i4]ASI_BLK_S,%f16 ! Block Load from 0000000030101400 | |
5096 | ||
5097 | p0_label_117: | |
5098 | membar #Sync ! Added by membar checker (30) | |
5099 | ! %f12 = 00000000, Mem[0000000010081410] = 00000000 | |
5100 | sta %f12,[%i2+%o5]0x80 ! Mem[0000000010081410] = 00000000 | |
5101 | ! Mem[00000000100c1408] = ff000000, %l2 = 007400000000007a | |
5102 | lduwa [%i3+0x008]%asi,%l2 ! %l2 = 00000000ff000000 | |
5103 | ! Mem[0000000010001410] = 925b1ad8000000e7, %f6 = 00630000 0000006e | |
5104 | ldda [%i0+%o5]0x88,%f6 ! %f6 = 925b1ad8 000000e7 | |
5105 | ! Mem[00000000100c1408] = ff000000, %l4 = 0000000000000000 | |
5106 | ldswa [%i3+%o4]0x80,%l4 ! %l4 = ffffffffff000000 | |
5107 | ! Mem[0000000010001410] = 925b1ad8000000e7, %l6 = 000000000000007a | |
5108 | ldxa [%i0+%o5]0x88,%l6 ! %l6 = 925b1ad8000000e7 | |
5109 | ! Mem[00000000100c1408] = ff000000, %l7 = ffffffffff8d001a | |
5110 | lduha [%i3+%o4]0x80,%l7 ! %l7 = 000000000000ff00 | |
5111 | ! Mem[0000000030101400] = ff00b6f1, %l2 = 00000000ff000000 | |
5112 | ldswa [%i4+%g0]0x81,%l2 ! %l2 = ffffffffff00b6f1 | |
5113 | ! Mem[0000000030041408] = 00000000, %l7 = 000000000000ff00 | |
5114 | lduha [%i1+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
5115 | ! Mem[0000000030101410] = 4593b975, %l1 = 000000004d072a78 | |
5116 | lduba [%i4+%o5]0x89,%l1 ! %l1 = 0000000000000075 | |
5117 | ! Starting 10 instruction Store Burst | |
5118 | ! Mem[0000000030081408] = ff000012, %l6 = 925b1ad8000000e7 | |
5119 | ldstuba [%i2+%o4]0x81,%l6 ! %l6 = 000000ff000000ff | |
5120 | ||
5121 | p0_label_118: | |
5122 | ! %l5 = 000000001a008dff, Mem[0000000010081408] = ffffffe0 | |
5123 | stwa %l5,[%i2+%o4]0x88 ! Mem[0000000010081408] = 1a008dff | |
5124 | ! %f18 = ffffffff ffffffff, Mem[0000000030041408] = 00000000 0000aa77 | |
5125 | stda %f18,[%i1+%o4]0x81 ! Mem[0000000030041408] = ffffffff ffffffff | |
5126 | ! Mem[0000000030181408] = 8058821d, %l2 = ffffffffff00b6f1 | |
5127 | swapa [%i6+%o4]0x81,%l2 ! %l2 = 000000008058821d | |
5128 | ! Mem[0000000030001400] = 0000ffff, %l4 = ffffffffff000000 | |
5129 | ldstuba [%i0+%g0]0x89,%l4 ! %l4 = 000000ff000000ff | |
5130 | ! %f2 = 4d072a78, Mem[0000000010001408] = ffaa02f1 | |
5131 | sta %f2 ,[%i0+0x008]%asi ! Mem[0000000010001408] = 4d072a78 | |
5132 | ! %f9 = 00007400, Mem[0000000010041410] = ff006ee7 | |
5133 | sta %f9 ,[%i1+%o5]0x80 ! Mem[0000000010041410] = 00007400 | |
5134 | ! %f22 = 5e9e1157 6b6c2202, Mem[0000000010041400] = 00740000 0000007a | |
5135 | std %f22,[%i1+%g0] ! Mem[0000000010041400] = 5e9e1157 6b6c2202 | |
5136 | ! %l5 = 000000001a008dff, Mem[0000000030181408] = f1b600ff | |
5137 | stba %l5,[%i6+%o4]0x89 ! Mem[0000000030181408] = f1b600ff | |
5138 | ! %f7 = 000000e7, Mem[0000000010181410] = 000000e5 | |
5139 | sta %f7 ,[%i6+%o5]0x80 ! Mem[0000000010181410] = 000000e7 | |
5140 | ! Starting 10 instruction Load Burst | |
5141 | ! Mem[0000000010041410] = 00007400f8d13fed, %l4 = 00000000000000ff | |
5142 | ldxa [%i1+0x010]%asi,%l4 ! %l4 = 00007400f8d13fed | |
5143 | ||
5144 | p0_label_119: | |
5145 | ! Mem[0000000010001408] = 4d072a78, %l3 = 00000000000000ff | |
5146 | ldswa [%i0+%o4]0x80,%l3 ! %l3 = 000000004d072a78 | |
5147 | ! Mem[0000000010181408] = 1a5c100f, %l3 = 000000004d072a78 | |
5148 | lduha [%i6+%o4]0x88,%l3 ! %l3 = 000000000000100f | |
5149 | ! Mem[0000000030001408] = 00000000, %l1 = 0000000000000075 | |
5150 | ldswa [%i0+%o4]0x89,%l1 ! %l1 = 0000000000000000 | |
5151 | ! Mem[0000000010181410] = 000000e7d81a5b92, %l4 = 00007400f8d13fed | |
5152 | ldxa [%i6+%o5]0x80,%l4 ! %l4 = 000000e7d81a5b92 | |
5153 | ! Mem[00000000300c1400] = fff1ffff d9876ee7, %l0 = 00000000, %l1 = 00000000 | |
5154 | ldda [%i3+%g0]0x81,%l0 ! %l0 = 00000000fff1ffff 00000000d9876ee7 | |
5155 | ! Mem[0000000030181400] = 00740000 ffffffff, %l4 = d81a5b92, %l5 = 1a008dff | |
5156 | ldda [%i6+%g0]0x81,%l4 ! %l4 = 0000000000740000 00000000ffffffff | |
5157 | ! Mem[0000000030041408] = ffffffffffffffff, %f2 = 4d072a78 ffffffe0 | |
5158 | ldda [%i1+%o4]0x89,%f2 ! %f2 = ffffffff ffffffff | |
5159 | ! Mem[0000000010181400] = fffff102, %l2 = 000000008058821d | |
5160 | ldsb [%i6+0x002],%l2 ! %l2 = fffffffffffffff1 | |
5161 | ! Mem[0000000010101408] = 269784ff, %l4 = 0000000000740000 | |
5162 | ldsba [%i4+%o4]0x88,%l4 ! %l4 = ffffffffffffffff | |
5163 | ! Starting 10 instruction Store Burst | |
5164 | ! %l1 = 00000000d9876ee7, Mem[00000000100c1400] = ff000012 | |
5165 | stwa %l1,[%i3+%g0]0x88 ! Mem[00000000100c1400] = d9876ee7 | |
5166 | ||
5167 | p0_label_120: | |
5168 | ! Mem[00000000300c1410] = 00005b30, %l2 = fffffffffffffff1 | |
5169 | ldstuba [%i3+%o5]0x89,%l2 ! %l2 = 00000030000000ff | |
5170 | ! %l6 = 00000000000000ff, Mem[0000000030041410] = a129439b | |
5171 | stwa %l6,[%i1+%o5]0x81 ! Mem[0000000030041410] = 000000ff | |
5172 | ! Mem[0000000010101427] = 74ff0000, %l1 = 00000000d9876ee7 | |
5173 | ldstuba [%i4+0x027]%asi,%l1 ! %l1 = 00000000000000ff | |
5174 | ! %f31 = c49410cd, Mem[0000000030181400] = 00007400 | |
5175 | sta %f31,[%i6+%g0]0x89 ! Mem[0000000030181400] = c49410cd | |
5176 | ! Mem[00000000300c1400] = fffff1ff, %l1 = 0000000000000000 | |
5177 | swapa [%i3+%g0]0x89,%l1 ! %l1 = 00000000fffff1ff | |
5178 | ! Mem[0000000010101410] = 480207d9, %l0 = 00000000fff1ffff | |
5179 | ldstuba [%i4+%o5]0x88,%l0 ! %l0 = 000000d9000000ff | |
5180 | ! Mem[000000001018141c] = 8058821d, %l4 = ffffffffffffffff | |
5181 | swap [%i6+0x01c],%l4 ! %l4 = 000000008058821d | |
5182 | ! Mem[0000000010101410] = ff070248, %l6 = 00000000000000ff | |
5183 | swapa [%i4+%o5]0x80,%l6 ! %l6 = 00000000ff070248 | |
5184 | ! Mem[0000000030181408] = ff00b6f1, %l2 = 0000000000000030 | |
5185 | ldstuba [%i6+%o4]0x81,%l2 ! %l2 = 000000ff000000ff | |
5186 | ! Starting 10 instruction Load Burst | |
5187 | ! Mem[0000000030181408] = ffffffff f1b600ff, %l2 = 000000ff, %l3 = 0000100f | |
5188 | ldda [%i6+%o4]0x89,%l2 ! %l2 = 00000000f1b600ff 00000000ffffffff | |
5189 | ||
5190 | ! Check Point 24 for processor 0 | |
5191 | ||
5192 | set p0_check_pt_data_24,%g4 | |
5193 | rd %ccr,%g5 ! %g5 = 44 | |
5194 | ldx [%g4+0x08],%g2 | |
5195 | cmp %l0,%g2 ! %l0 = 00000000000000d9 | |
5196 | bne %xcc,p0_reg_check_fail0 | |
5197 | mov 0xee0,%g1 | |
5198 | ldx [%g4+0x10],%g2 | |
5199 | cmp %l1,%g2 ! %l1 = 00000000fffff1ff | |
5200 | bne %xcc,p0_reg_check_fail1 | |
5201 | mov 0xee1,%g1 | |
5202 | ldx [%g4+0x18],%g2 | |
5203 | cmp %l2,%g2 ! %l2 = 00000000f1b600ff | |
5204 | bne %xcc,p0_reg_check_fail2 | |
5205 | mov 0xee2,%g1 | |
5206 | ldx [%g4+0x20],%g2 | |
5207 | cmp %l3,%g2 ! %l3 = 00000000ffffffff | |
5208 | bne %xcc,p0_reg_check_fail3 | |
5209 | mov 0xee3,%g1 | |
5210 | ldx [%g4+0x28],%g2 | |
5211 | cmp %l4,%g2 ! %l4 = 000000008058821d | |
5212 | bne %xcc,p0_reg_check_fail4 | |
5213 | mov 0xee4,%g1 | |
5214 | ldx [%g4+0x30],%g2 | |
5215 | cmp %l6,%g2 ! %l6 = 00000000ff070248 | |
5216 | bne %xcc,p0_reg_check_fail6 | |
5217 | mov 0xee6,%g1 | |
5218 | ldx [%g4+0x38],%g2 | |
5219 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
5220 | bne %xcc,p0_reg_check_fail7 | |
5221 | mov 0xee7,%g1 | |
5222 | ldx [%g4+0x40],%g3 | |
5223 | std %f0,[%g4] | |
5224 | ldx [%g4],%g2 | |
5225 | cmp %g3,%g2 ! %f0 = 00000000 00007400 | |
5226 | bne %xcc,p0_freg_check_fail | |
5227 | mov 0xf00,%g1 | |
5228 | ldx [%g4+0x48],%g3 | |
5229 | std %f2,[%g4] | |
5230 | ldx [%g4],%g2 | |
5231 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
5232 | bne %xcc,p0_freg_check_fail | |
5233 | mov 0xf02,%g1 | |
5234 | ldx [%g4+0x50],%g3 | |
5235 | std %f4,[%g4] | |
5236 | ldx [%g4],%g2 | |
5237 | cmp %g3,%g2 ! %f4 = 00007400 00000000 | |
5238 | bne %xcc,p0_freg_check_fail | |
5239 | mov 0xf04,%g1 | |
5240 | ldx [%g4+0x58],%g3 | |
5241 | std %f6,[%g4] | |
5242 | ldx [%g4],%g2 | |
5243 | cmp %g3,%g2 ! %f6 = 925b1ad8 000000e7 | |
5244 | bne %xcc,p0_freg_check_fail | |
5245 | mov 0xf06,%g1 | |
5246 | ldx [%g4+0x60],%g3 | |
5247 | std %f16,[%g4] | |
5248 | ldx [%g4],%g2 | |
5249 | cmp %g3,%g2 ! %f16 = ff00b6f1 ffff275e | |
5250 | bne %xcc,p0_freg_check_fail | |
5251 | mov 0xf16,%g1 | |
5252 | ldx [%g4+0x68],%g3 | |
5253 | std %f18,[%g4] | |
5254 | ldx [%g4],%g2 | |
5255 | cmp %g3,%g2 ! %f18 = ffffffff ffffffff | |
5256 | bne %xcc,p0_freg_check_fail | |
5257 | mov 0xf18,%g1 | |
5258 | ldx [%g4+0x70],%g3 | |
5259 | std %f20,[%g4] | |
5260 | ldx [%g4],%g2 | |
5261 | cmp %g3,%g2 ! %f20 = 75b99345 9b4329a1 | |
5262 | bne %xcc,p0_freg_check_fail | |
5263 | mov 0xf20,%g1 | |
5264 | ldx [%g4+0x78],%g3 | |
5265 | std %f22,[%g4] | |
5266 | ldx [%g4],%g2 | |
5267 | cmp %g3,%g2 ! %f22 = 5e9e1157 6b6c2202 | |
5268 | bne %xcc,p0_freg_check_fail | |
5269 | mov 0xf22,%g1 | |
5270 | ldx [%g4+0x80],%g3 | |
5271 | std %f24,[%g4] | |
5272 | ldx [%g4],%g2 | |
5273 | cmp %g3,%g2 ! %f24 = 3bedac39 d81a5b92 | |
5274 | bne %xcc,p0_freg_check_fail | |
5275 | mov 0xf24,%g1 | |
5276 | ldx [%g4+0x88],%g3 | |
5277 | std %f26,[%g4] | |
5278 | ldx [%g4],%g2 | |
5279 | cmp %g3,%g2 ! %f26 = c78091bb 759a4764 | |
5280 | bne %xcc,p0_freg_check_fail | |
5281 | mov 0xf26,%g1 | |
5282 | ldx [%g4+0x90],%g3 | |
5283 | std %f28,[%g4] | |
5284 | ldx [%g4],%g2 | |
5285 | cmp %g3,%g2 ! %f28 = fac65f36 9ce0b68a | |
5286 | bne %xcc,p0_freg_check_fail | |
5287 | mov 0xf28,%g1 | |
5288 | ldx [%g4+0x98],%g3 | |
5289 | std %f30,[%g4] | |
5290 | ldx [%g4],%g2 | |
5291 | cmp %g3,%g2 ! %f30 = 46ee6de4 c49410cd | |
5292 | bne %xcc,p0_freg_check_fail | |
5293 | mov 0xf30,%g1 | |
5294 | ||
5295 | ! Check Point 24 completed | |
5296 | ||
5297 | ||
5298 | p0_label_121: | |
5299 | ! Mem[0000000010001408] = 4d072a78, %l3 = 00000000ffffffff | |
5300 | lduba [%i0+%o4]0x80,%l3 ! %l3 = 000000000000004d | |
5301 | ! Mem[0000000030041408] = ffffffff, %l1 = 00000000fffff1ff | |
5302 | lduba [%i1+%o4]0x89,%l1 ! %l1 = 00000000000000ff | |
5303 | ! Mem[0000000010081410] = 00000000, %l1 = 00000000000000ff | |
5304 | ldswa [%i2+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
5305 | ! Mem[0000000030081410] = ff000000, %l2 = 00000000f1b600ff | |
5306 | lduwa [%i2+%o5]0x81,%l2 ! %l2 = 00000000ff000000 | |
5307 | ! Mem[0000000010101408] = ff849726, %l3 = 000000000000004d | |
5308 | lduwa [%i4+%o4]0x80,%l3 ! %l3 = 00000000ff849726 | |
5309 | ! Mem[0000000030041410] = ff000000, %l6 = 00000000ff070248 | |
5310 | lduwa [%i1+%o5]0x89,%l6 ! %l6 = 00000000ff000000 | |
5311 | ! Mem[0000000010141408] = 00000000 00000000, %l0 = 000000d9, %l1 = 00000000 | |
5312 | ldda [%i5+%o4]0x80,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
5313 | ! Mem[0000000030101408] = ffffffffffffffff, %l5 = 00000000ffffffff | |
5314 | ldxa [%i4+%o4]0x81,%l5 ! %l5 = ffffffffffffffff | |
5315 | ! Mem[0000000010001408] = 4d072a78, %l4 = 000000008058821d | |
5316 | lduha [%i0+%o4]0x80,%l4 ! %l4 = 0000000000004d07 | |
5317 | ! Starting 10 instruction Store Burst | |
5318 | ! Mem[000000001014140c] = 00000000, %l4 = 0000000000004d07 | |
5319 | ldstuba [%i5+0x00c]%asi,%l4 ! %l4 = 00000000000000ff | |
5320 | ||
5321 | p0_label_122: | |
5322 | ! Mem[0000000030001410] = 00000000, %l0 = 0000000000000000 | |
5323 | ldstuba [%i0+%o5]0x81,%l0 ! %l0 = 00000000000000ff | |
5324 | ! %l7 = 0000000000000000, Mem[00000000201c0000] = 2a781669 | |
5325 | sth %l7,[%o0+%g0] ! Mem[00000000201c0000] = 00001669 | |
5326 | ! Mem[00000000211c0001] = fffffe0c, %l7 = 0000000000000000 | |
5327 | ldstub [%o2+0x001],%l7 ! %l7 = 000000ff000000ff | |
5328 | ! Mem[0000000030141408] = 4d072a78, %l0 = 0000000000000000 | |
5329 | ldstuba [%i5+%o4]0x81,%l0 ! %l0 = 0000004d000000ff | |
5330 | ! %l7 = 00000000000000ff, Mem[00000000100c1410] = 00740000 | |
5331 | stwa %l7,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 000000ff | |
5332 | ! %l7 = 00000000000000ff, Mem[0000000010101408] = ff849726 | |
5333 | stha %l7,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00ff9726 | |
5334 | ! Mem[0000000021800000] = d9f29a65, %l5 = ffffffffffffffff | |
5335 | ldstuba [%o3+0x000]%asi,%l5 ! %l5 = 000000d9000000ff | |
5336 | ! %f24 = 3bedac39, Mem[0000000010141434] = 0000007a | |
5337 | sta %f24,[%i5+0x034]%asi ! Mem[0000000010141434] = 3bedac39 | |
5338 | ! %f16 = ff00b6f1 ffff275e ffffffff ffffffff | |
5339 | ! %f20 = 75b99345 9b4329a1 5e9e1157 6b6c2202 | |
5340 | ! %f24 = 3bedac39 d81a5b92 c78091bb 759a4764 | |
5341 | ! %f28 = fac65f36 9ce0b68a 46ee6de4 c49410cd | |
5342 | stda %f16,[%i5]ASI_BLK_AIUPL ! Block Store to 0000000010141400 | |
5343 | ! Starting 10 instruction Load Burst | |
5344 | ! Mem[0000000030181400] = c49410cd, %l5 = 00000000000000d9 | |
5345 | lduha [%i6+%g0]0x89,%l5 ! %l5 = 00000000000010cd | |
5346 | ||
5347 | p0_label_123: | |
5348 | ! Mem[0000000030041400] = 00000000, %l0 = 000000000000004d | |
5349 | ldsba [%i1+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
5350 | ! Mem[0000000010041400] = 57119e5e, %l4 = 0000000000000000 | |
5351 | lduba [%i1+%g0]0x88,%l4 ! %l4 = 000000000000005e | |
5352 | ! Mem[0000000010001434] = e0ffffff, %l0 = 0000000000000000 | |
5353 | ldsba [%i0+0x035]%asi,%l0 ! %l0 = ffffffffffffffff | |
5354 | ! Mem[00000000300c1410] = 00005bff, %l7 = 00000000000000ff | |
5355 | ldsha [%i3+%o5]0x89,%l7 ! %l7 = 0000000000005bff | |
5356 | ! Mem[0000000010001400] = ffffffb4, %l4 = 000000000000005e | |
5357 | lduwa [%i0+%g0]0x80,%l4 ! %l4 = 00000000ffffffb4 | |
5358 | ! Mem[00000000100c1408] = ff000000ffffffff, %f14 = ffffffe0 1a5c100f | |
5359 | ldda [%i3+%o4]0x80,%f14 ! %f14 = ff000000 ffffffff | |
5360 | ! Mem[0000000030001408] = 00000000, %l1 = 0000000000000000 | |
5361 | lduba [%i0+%o4]0x89,%l1 ! %l1 = 0000000000000000 | |
5362 | ! Mem[0000000030041400] = 00000000, %l1 = 0000000000000000 | |
5363 | lduwa [%i1+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
5364 | ! Mem[0000000030041408] = ffffffffffffffff, %f2 = ffffffff ffffffff | |
5365 | ldda [%i1+%o4]0x89,%f2 ! %f2 = ffffffff ffffffff | |
5366 | ! Starting 10 instruction Store Burst | |
5367 | ! %f2 = ffffffff ffffffff, Mem[0000000030101400] = f1b600ff 5e27ffff | |
5368 | stda %f2 ,[%i4+%g0]0x89 ! Mem[0000000030101400] = ffffffff ffffffff | |
5369 | ||
5370 | p0_label_124: | |
5371 | ! %l6 = ff000000, %l7 = 00005bff, Mem[0000000010141410] = a129439b 4593b975 | |
5372 | stda %l6,[%i5+%o5]0x80 ! Mem[0000000010141410] = ff000000 00005bff | |
5373 | ! Mem[0000000010081408] = 1a008dff, %l3 = 00000000ff849726 | |
5374 | ldstuba [%i2+%o4]0x88,%l3 ! %l3 = 000000ff000000ff | |
5375 | membar #Sync ! Added by membar checker (31) | |
5376 | ! Mem[0000000010141400] = ffff275e, %l5 = 00000000000010cd | |
5377 | ldstuba [%i5+%g0]0x88,%l5 ! %l5 = 0000005e000000ff | |
5378 | ! %l6 = 00000000ff000000, Mem[0000000010141418] = 02226c6b, %asi = 80 | |
5379 | stha %l6,[%i5+0x018]%asi ! Mem[0000000010141418] = 00006c6b | |
5380 | ! %l4 = ffffffb4, %l5 = 0000005e, Mem[0000000010141420] = 925b1ad8 39aced3b | |
5381 | std %l4,[%i5+0x020] ! Mem[0000000010141420] = ffffffb4 0000005e | |
5382 | ! %l4 = ffffffb4, %l5 = 0000005e, Mem[0000000010081400] = 00740000 00000000 | |
5383 | stda %l4,[%i2+%g0]0x80 ! Mem[0000000010081400] = ffffffb4 0000005e | |
5384 | ! %l7 = 0000000000005bff, Mem[0000000030181410] = 305bffffff000000 | |
5385 | stxa %l7,[%i6+%o5]0x81 ! Mem[0000000030181410] = 0000000000005bff | |
5386 | ! %l7 = 0000000000005bff, Mem[0000000010081400] = ffffffb40000005e | |
5387 | stxa %l7,[%i2+%g0]0x80 ! Mem[0000000010081400] = 0000000000005bff | |
5388 | ! %l0 = ffffffff, %l1 = 00000000, Mem[0000000030081410] = 000000ff 00007a9a | |
5389 | stda %l0,[%i2+%o5]0x89 ! Mem[0000000030081410] = ffffffff 00000000 | |
5390 | ! Starting 10 instruction Load Burst | |
5391 | ! Mem[00000000100c1408] = ff000000, %l1 = 0000000000000000 | |
5392 | lduwa [%i3+%o4]0x80,%l1 ! %l1 = 00000000ff000000 | |
5393 | ||
5394 | p0_label_125: | |
5395 | ! Mem[00000000100c1410] = ff000000, %l0 = ffffffffffffffff | |
5396 | lduha [%i3+%o5]0x80,%l0 ! %l0 = 000000000000ff00 | |
5397 | ! Mem[00000000100c1410] = 000000ff, %l7 = 0000000000005bff | |
5398 | ldswa [%i3+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
5399 | ! Mem[0000000010001400] = ffffffb4, %l3 = 00000000000000ff | |
5400 | lduba [%i0+0x003]%asi,%l3 ! %l3 = 00000000000000b4 | |
5401 | ! Mem[0000000030141408] = 782a07ff, %l3 = 00000000000000b4 | |
5402 | lduwa [%i5+%o4]0x89,%l3 ! %l3 = 00000000782a07ff | |
5403 | ! Mem[0000000010041408] = 2c000000, %l2 = 00000000ff000000 | |
5404 | lduwa [%i1+%o4]0x80,%l2 ! %l2 = 000000002c000000 | |
5405 | ! Mem[0000000010181410] = 000000e7d81a5b92, %l1 = 00000000ff000000 | |
5406 | ldxa [%i6+%o5]0x80,%l1 ! %l1 = 000000e7d81a5b92 | |
5407 | ! Mem[0000000030001408] = 00000000, %f13 = caffffff | |
5408 | lda [%i0+%o4]0x89,%f13 ! %f13 = 00000000 | |
5409 | ! Mem[0000000030101400] = ffffffff, %l5 = 000000000000005e | |
5410 | ldsba [%i4+%g0]0x81,%l5 ! %l5 = ffffffffffffffff | |
5411 | ! Mem[00000000100c1408] = 000000ff, %l0 = 000000000000ff00 | |
5412 | lduha [%i3+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
5413 | ! Starting 10 instruction Store Burst | |
5414 | ! Mem[0000000030141408] = 782a07ff, %l0 = 00000000000000ff | |
5415 | swapa [%i5+%o4]0x89,%l0 ! %l0 = 00000000782a07ff | |
5416 | ||
5417 | ! Check Point 25 for processor 0 | |
5418 | ||
5419 | set p0_check_pt_data_25,%g4 | |
5420 | rd %ccr,%g5 ! %g5 = 44 | |
5421 | ldx [%g4+0x08],%g2 | |
5422 | cmp %l0,%g2 ! %l0 = 00000000782a07ff | |
5423 | bne %xcc,p0_reg_check_fail0 | |
5424 | mov 0xee0,%g1 | |
5425 | ldx [%g4+0x10],%g2 | |
5426 | cmp %l1,%g2 ! %l1 = 000000e7d81a5b92 | |
5427 | bne %xcc,p0_reg_check_fail1 | |
5428 | mov 0xee1,%g1 | |
5429 | ldx [%g4+0x18],%g2 | |
5430 | cmp %l2,%g2 ! %l2 = 000000002c000000 | |
5431 | bne %xcc,p0_reg_check_fail2 | |
5432 | mov 0xee2,%g1 | |
5433 | ldx [%g4+0x20],%g2 | |
5434 | cmp %l3,%g2 ! %l3 = 00000000782a07ff | |
5435 | bne %xcc,p0_reg_check_fail3 | |
5436 | mov 0xee3,%g1 | |
5437 | ldx [%g4+0x28],%g2 | |
5438 | cmp %l4,%g2 ! %l4 = 00000000ffffffb4 | |
5439 | bne %xcc,p0_reg_check_fail4 | |
5440 | mov 0xee4,%g1 | |
5441 | ldx [%g4+0x30],%g2 | |
5442 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
5443 | bne %xcc,p0_reg_check_fail5 | |
5444 | mov 0xee5,%g1 | |
5445 | ldx [%g4+0x38],%g2 | |
5446 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
5447 | bne %xcc,p0_reg_check_fail6 | |
5448 | mov 0xee6,%g1 | |
5449 | ldx [%g4+0x40],%g2 | |
5450 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
5451 | bne %xcc,p0_reg_check_fail7 | |
5452 | mov 0xee7,%g1 | |
5453 | ldx [%g4+0x48],%g3 | |
5454 | std %f0,[%g4] | |
5455 | ldx [%g4],%g2 | |
5456 | cmp %g3,%g2 ! %f0 = 00000000 00007400 | |
5457 | bne %xcc,p0_freg_check_fail | |
5458 | mov 0xf00,%g1 | |
5459 | ldx [%g4+0x50],%g3 | |
5460 | std %f2,[%g4] | |
5461 | ldx [%g4],%g2 | |
5462 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
5463 | bne %xcc,p0_freg_check_fail | |
5464 | mov 0xf02,%g1 | |
5465 | ldx [%g4+0x58],%g3 | |
5466 | std %f12,[%g4] | |
5467 | ldx [%g4],%g2 | |
5468 | cmp %g3,%g2 ! %f12 = 00000000 00000000 | |
5469 | bne %xcc,p0_freg_check_fail | |
5470 | mov 0xf12,%g1 | |
5471 | ldx [%g4+0x60],%g3 | |
5472 | std %f14,[%g4] | |
5473 | ldx [%g4],%g2 | |
5474 | cmp %g3,%g2 ! %f14 = ff000000 ffffffff | |
5475 | bne %xcc,p0_freg_check_fail | |
5476 | mov 0xf14,%g1 | |
5477 | ||
5478 | ! Check Point 25 completed | |
5479 | ||
5480 | ||
5481 | p0_label_126: | |
5482 | ! Mem[0000000030081400] = 0000ffff, %l1 = 000000e7d81a5b92 | |
5483 | ldstuba [%i2+%g0]0x89,%l1 ! %l1 = 000000ff000000ff | |
5484 | ! %f6 = 925b1ad8 000000e7, Mem[0000000030001400] = ffff0000 4d072a78 | |
5485 | stda %f6 ,[%i0+%g0]0x81 ! Mem[0000000030001400] = 925b1ad8 000000e7 | |
5486 | ! %f6 = 925b1ad8, Mem[0000000010041408] = 2c000000 | |
5487 | sta %f6 ,[%i1+%o4]0x80 ! Mem[0000000010041408] = 925b1ad8 | |
5488 | ! Mem[0000000010081434] = 00000000, %l3 = 00000000782a07ff | |
5489 | swap [%i2+0x034],%l3 ! %l3 = 0000000000000000 | |
5490 | ! %l6 = 00000000ff000000, Mem[0000000010181408] = 1a5c100f | |
5491 | stwa %l6,[%i6+%o4]0x88 ! Mem[0000000010181408] = ff000000 | |
5492 | ! %l0 = 00000000782a07ff, Mem[0000000010001435] = e0ffffff, %asi = 80 | |
5493 | stba %l0,[%i0+0x035]%asi ! Mem[0000000010001434] = e0ffffff | |
5494 | ! %l0 = 00000000782a07ff, Mem[0000000010041410] = 00007400 | |
5495 | stba %l0,[%i1+%o5]0x80 ! Mem[0000000010041410] = ff007400 | |
5496 | ! Mem[00000000100c1400] = d9876ee7, %l5 = ffffffffffffffff | |
5497 | ldstuba [%i3+%g0]0x88,%l5 ! %l5 = 000000e7000000ff | |
5498 | ! %f16 = ff00b6f1 ffff275e, %l1 = 00000000000000ff | |
5499 | ! Mem[0000000030141418] = 02226c6b00000000 | |
5500 | add %i5,0x018,%g1 | |
5501 | stda %f16,[%g1+%l1]ASI_PST32_S ! Mem[0000000030141418] = ff00b6f1ffff275e | |
5502 | ! Starting 10 instruction Load Burst | |
5503 | ! Mem[0000000010081410] = 00000000, %l2 = 000000002c000000 | |
5504 | lduwa [%i2+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
5505 | ||
5506 | p0_label_127: | |
5507 | ! Mem[0000000030001408] = f102aa7700000000, %l3 = 0000000000000000 | |
5508 | ldxa [%i0+%o4]0x89,%l3 ! %l3 = f102aa7700000000 | |
5509 | ! Mem[0000000030041408] = ffffffffffffffff, %l2 = 0000000000000000 | |
5510 | ldxa [%i1+%o4]0x89,%l2 ! %l2 = ffffffffffffffff | |
5511 | ! Mem[0000000010101408] = 00ff9726, %l1 = 00000000000000ff | |
5512 | ldsha [%i4+%o4]0x80,%l1 ! %l1 = 00000000000000ff | |
5513 | ! Mem[000000001010140c] = ff8a98d7, %f5 = 00000000 | |
5514 | ld [%i4+0x00c],%f5 ! %f5 = ff8a98d7 | |
5515 | ! Mem[000000001018142c] = 000000e5, %l0 = 00000000782a07ff | |
5516 | ldsw [%i6+0x02c],%l0 ! %l0 = 00000000000000e5 | |
5517 | ! Mem[0000000030041408] = ffffffff, %l7 = 00000000000000ff | |
5518 | lduba [%i1+%o4]0x89,%l7 ! %l7 = 00000000000000ff | |
5519 | ! Mem[00000000300c1400] = 00000000, %f1 = 00007400 | |
5520 | lda [%i3+%g0]0x89,%f1 ! %f1 = 00000000 | |
5521 | ! Mem[0000000030001400] = e7000000 d81a5b92, %l0 = 000000e5, %l1 = 000000ff | |
5522 | ldda [%i0+%g0]0x89,%l0 ! %l0 = 00000000d81a5b92 00000000e7000000 | |
5523 | ! Mem[0000000010141410] = ff000000, %l0 = 00000000d81a5b92 | |
5524 | ldsb [%i5+%o5],%l0 ! %l0 = ffffffffffffffff | |
5525 | ! Starting 10 instruction Store Burst | |
5526 | ! Mem[00000000211c0000] = fffffe0c, %l6 = 00000000ff000000 | |
5527 | ldstub [%o2+%g0],%l6 ! %l6 = 000000ff000000ff | |
5528 | ||
5529 | p0_label_128: | |
5530 | ! Mem[0000000030141410] = 480207ff, %l6 = 00000000000000ff | |
5531 | ldstuba [%i5+%o5]0x89,%l6 ! %l6 = 000000ff000000ff | |
5532 | ! Mem[0000000021800000] = fff29a65, %l6 = 00000000000000ff | |
5533 | ldstub [%o3+%g0],%l6 ! %l6 = 000000ff000000ff | |
5534 | ! %l0 = ffffffffffffffff, Mem[00000000100c1408] = ff000000 | |
5535 | stha %l0,[%i3+%o4]0x80 ! Mem[00000000100c1408] = ffff0000 | |
5536 | ! Mem[00000000300c1400] = 00000000, %l1 = 00000000e7000000 | |
5537 | swapa [%i3+%g0]0x81,%l1 ! %l1 = 0000000000000000 | |
5538 | ! Mem[0000000010081428] = 1a008d0a, %l6 = 000000ff, %l6 = 000000ff | |
5539 | add %i2,0x28,%g1 | |
5540 | casa [%g1]0x80,%l6,%l6 ! %l6 = 000000001a008d0a | |
5541 | ! %l6 = 000000001a008d0a, Mem[00000000100c1408] = 0000ffff | |
5542 | stba %l6,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 0000ff0a | |
5543 | ! Mem[0000000030081410] = ffffffff, %l5 = 00000000000000e7 | |
5544 | ldstuba [%i2+%o5]0x89,%l5 ! %l5 = 000000ff000000ff | |
5545 | ! Mem[0000000030001400] = 925b1ad8, %l1 = 0000000000000000 | |
5546 | swapa [%i0+%g0]0x81,%l1 ! %l1 = 00000000925b1ad8 | |
5547 | ! %l5 = 00000000000000ff, Mem[0000000020800040] = b4e79ffa | |
5548 | sth %l5,[%o1+0x040] ! Mem[0000000020800040] = 00ff9ffa | |
5549 | ! Starting 10 instruction Load Burst | |
5550 | ! Mem[0000000010101400] = ffff00000a8d001a, %f16 = ff00b6f1 ffff275e | |
5551 | ldda [%i4+%g0]0x80,%f16 ! %f16 = ffff0000 0a8d001a | |
5552 | ||
5553 | p0_label_129: | |
5554 | ! Mem[0000000030141410] = 480207ff, %l1 = 00000000925b1ad8 | |
5555 | lduwa [%i5+%o5]0x89,%l1 ! %l1 = 00000000480207ff | |
5556 | ! Mem[0000000010141400] = ffff27ff, %l1 = 00000000480207ff | |
5557 | lduha [%i5+%g0]0x88,%l1 ! %l1 = 00000000000027ff | |
5558 | ! Mem[0000000010181400] = 02f1ffff, %f27 = 759a4764 | |
5559 | lda [%i6+%g0]0x88,%f27 ! %f27 = 02f1ffff | |
5560 | ! Mem[0000000010141418] = 00006c6b, %f0 = 00000000 | |
5561 | lda [%i5+0x018]%asi,%f0 ! %f0 = 00006c6b | |
5562 | ! Mem[000000001014140c] = ffffffff, %l1 = 00000000000027ff | |
5563 | lduw [%i5+0x00c],%l1 ! %l1 = 00000000ffffffff | |
5564 | ! Mem[0000000020800000] = ffff0db6, %l6 = 000000001a008d0a | |
5565 | ldsb [%o1+0x001],%l6 ! %l6 = ffffffffffffffff | |
5566 | ! Mem[0000000010041434] = 00000077, %l6 = ffffffffffffffff | |
5567 | ldswa [%i1+0x034]%asi,%l6 ! %l6 = 0000000000000077 | |
5568 | ! Mem[0000000010081410] = 0000740000000000, %f28 = fac65f36 9ce0b68a | |
5569 | ldda [%i2+%o5]0x88,%f28 ! %f28 = 00007400 00000000 | |
5570 | ! Mem[0000000010081438] = 0f105c1a, %l7 = 00000000000000ff | |
5571 | ldswa [%i2+0x038]%asi,%l7 ! %l7 = 000000000f105c1a | |
5572 | ! Starting 10 instruction Store Burst | |
5573 | ! %l3 = f102aa7700000000, Mem[0000000030101400] = ffffffff | |
5574 | stba %l3,[%i4+%g0]0x89 ! Mem[0000000030101400] = ffffff00 | |
5575 | ||
5576 | p0_label_130: | |
5577 | ! %f8 = 7a000000, Mem[0000000010041408] = d81a5b92 | |
5578 | sta %f8 ,[%i1+%o4]0x88 ! Mem[0000000010041408] = 7a000000 | |
5579 | ! %l4 = 00000000ffffffb4, Mem[0000000010081410] = 00000000 | |
5580 | stha %l4,[%i2+%o5]0x88 ! Mem[0000000010081410] = 0000ffb4 | |
5581 | ! %f10 = 00746fa4 0a8d001a, %l3 = f102aa7700000000 | |
5582 | ! Mem[0000000030141410] = ff0702481effffe0 | |
5583 | add %i5,0x010,%g1 | |
5584 | stda %f10,[%g1+%l3]ASI_PST32_S ! Mem[0000000030141410] = ff0702481effffe0 | |
5585 | ! %f31 = c49410cd, Mem[00000000300c1410] = 00005bff | |
5586 | sta %f31,[%i3+%o5]0x89 ! Mem[00000000300c1410] = c49410cd | |
5587 | ! Mem[0000000010001410] = 000000e7, %l4 = 00000000ffffffb4 | |
5588 | ldstuba [%i0+%o5]0x88,%l4 ! %l4 = 000000e7000000ff | |
5589 | ! %l0 = ffffffffffffffff, Mem[0000000030081400] = ffff00004d072a78 | |
5590 | stxa %l0,[%i2+%g0]0x81 ! Mem[0000000030081400] = ffffffffffffffff | |
5591 | ! %f30 = 46ee6de4 c49410cd, %l5 = 00000000000000ff | |
5592 | ! Mem[0000000030001430] = 0a06c0b1c0dc16be | |
5593 | add %i0,0x030,%g1 | |
5594 | stda %f30,[%g1+%l5]ASI_PST16_SL ! Mem[0000000030001430] = cd1094c4e46dee46 | |
5595 | ! Mem[0000000010081400] = 00000000, %l1 = 00000000ffffffff | |
5596 | ldstuba [%i2+%g0]0x88,%l1 ! %l1 = 00000000000000ff | |
5597 | ! %f30 = 46ee6de4 c49410cd, Mem[0000000010041408] = 0000007a caffffff | |
5598 | stda %f30,[%i1+%o4]0x80 ! Mem[0000000010041408] = 46ee6de4 c49410cd | |
5599 | ! Starting 10 instruction Load Burst | |
5600 | ! Mem[0000000010101400] = 0000ffff, %l2 = ffffffffffffffff | |
5601 | ldswa [%i4+%g0]0x88,%l2 ! %l2 = 000000000000ffff | |
5602 | ||
5603 | ! Check Point 26 for processor 0 | |
5604 | ||
5605 | set p0_check_pt_data_26,%g4 | |
5606 | rd %ccr,%g5 ! %g5 = 44 | |
5607 | ldx [%g4+0x08],%g2 | |
5608 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
5609 | bne %xcc,p0_reg_check_fail0 | |
5610 | mov 0xee0,%g1 | |
5611 | ldx [%g4+0x10],%g2 | |
5612 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
5613 | bne %xcc,p0_reg_check_fail1 | |
5614 | mov 0xee1,%g1 | |
5615 | ldx [%g4+0x18],%g2 | |
5616 | cmp %l2,%g2 ! %l2 = 000000000000ffff | |
5617 | bne %xcc,p0_reg_check_fail2 | |
5618 | mov 0xee2,%g1 | |
5619 | ldx [%g4+0x20],%g2 | |
5620 | cmp %l3,%g2 ! %l3 = f102aa7700000000 | |
5621 | bne %xcc,p0_reg_check_fail3 | |
5622 | mov 0xee3,%g1 | |
5623 | ldx [%g4+0x28],%g2 | |
5624 | cmp %l4,%g2 ! %l4 = 00000000000000e7 | |
5625 | bne %xcc,p0_reg_check_fail4 | |
5626 | mov 0xee4,%g1 | |
5627 | ldx [%g4+0x30],%g2 | |
5628 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
5629 | bne %xcc,p0_reg_check_fail5 | |
5630 | mov 0xee5,%g1 | |
5631 | ldx [%g4+0x38],%g2 | |
5632 | cmp %l6,%g2 ! %l6 = 0000000000000077 | |
5633 | bne %xcc,p0_reg_check_fail6 | |
5634 | mov 0xee6,%g1 | |
5635 | ldx [%g4+0x40],%g2 | |
5636 | cmp %l7,%g2 ! %l7 = 000000000f105c1a | |
5637 | bne %xcc,p0_reg_check_fail7 | |
5638 | mov 0xee7,%g1 | |
5639 | ldx [%g4+0x48],%g3 | |
5640 | std %f0,[%g4] | |
5641 | ldx [%g4],%g2 | |
5642 | cmp %g3,%g2 ! %f0 = 00006c6b 00000000 | |
5643 | bne %xcc,p0_freg_check_fail | |
5644 | mov 0xf00,%g1 | |
5645 | ldx [%g4+0x50],%g3 | |
5646 | std %f4,[%g4] | |
5647 | ldx [%g4],%g2 | |
5648 | cmp %g3,%g2 ! %f4 = 00007400 ff8a98d7 | |
5649 | bne %xcc,p0_freg_check_fail | |
5650 | mov 0xf04,%g1 | |
5651 | ldx [%g4+0x58],%g3 | |
5652 | std %f16,[%g4] | |
5653 | ldx [%g4],%g2 | |
5654 | cmp %g3,%g2 ! %f16 = ffff0000 0a8d001a | |
5655 | bne %xcc,p0_freg_check_fail | |
5656 | mov 0xf16,%g1 | |
5657 | ldx [%g4+0x60],%g3 | |
5658 | std %f26,[%g4] | |
5659 | ldx [%g4],%g2 | |
5660 | cmp %g3,%g2 ! %f26 = c78091bb 02f1ffff | |
5661 | bne %xcc,p0_freg_check_fail | |
5662 | mov 0xf26,%g1 | |
5663 | ldx [%g4+0x68],%g3 | |
5664 | std %f28,[%g4] | |
5665 | ldx [%g4],%g2 | |
5666 | cmp %g3,%g2 ! %f28 = 00007400 00000000 | |
5667 | bne %xcc,p0_freg_check_fail | |
5668 | mov 0xf28,%g1 | |
5669 | ||
5670 | ! Check Point 26 completed | |
5671 | ||
5672 | ||
5673 | p0_label_131: | |
5674 | ! Mem[000000001014140c] = ffffffff, %l7 = 000000000f105c1a | |
5675 | ldsha [%i5+0x00e]%asi,%l7 ! %l7 = ffffffffffffffff | |
5676 | ! Mem[0000000030081410] = ffffffff, %l7 = ffffffffffffffff | |
5677 | ldswa [%i2+%o5]0x81,%l7 ! %l7 = ffffffffffffffff | |
5678 | ! Mem[0000000010001418] = d9876ee7, %l1 = 0000000000000000 | |
5679 | lduh [%i0+0x01a],%l1 ! %l1 = 0000000000006ee7 | |
5680 | ! Mem[00000000100c1410] = ff000000, %l1 = 0000000000006ee7 | |
5681 | ldswa [%i3+%o5]0x80,%l1 ! %l1 = ffffffffff000000 | |
5682 | ! Mem[0000000021800100] = ff0e39e7, %l7 = ffffffffffffffff | |
5683 | lduha [%o3+0x100]%asi,%l7 ! %l7 = 000000000000ff0e | |
5684 | ! Mem[0000000030041400] = 0000000000000000, %f16 = ffff0000 0a8d001a | |
5685 | ldda [%i1+%g0]0x81,%f16 ! %f16 = 00000000 00000000 | |
5686 | ! Mem[0000000010141400] = ff27ffff f1b600ff, %l2 = 0000ffff, %l3 = 00000000 | |
5687 | ldd [%i5+%g0],%l2 ! %l2 = 00000000ff27ffff 00000000f1b600ff | |
5688 | ! Mem[00000000300c1410] = d9ffffffc49410cd, %l5 = 00000000000000ff | |
5689 | ldxa [%i3+%o5]0x89,%l5 ! %l5 = d9ffffffc49410cd | |
5690 | ! Mem[0000000010001400] = ffffffb46d1dd03f, %f6 = 925b1ad8 000000e7 | |
5691 | ldda [%i0+%g0]0x80,%f6 ! %f6 = ffffffb4 6d1dd03f | |
5692 | ! Starting 10 instruction Store Burst | |
5693 | ! Mem[0000000020800041] = 00ff9ffa, %l0 = ffffffffffffffff | |
5694 | ldstuba [%o1+0x041]%asi,%l0 ! %l0 = 000000ff000000ff | |
5695 | ||
5696 | p0_label_132: | |
5697 | ! %l1 = ffffffffff000000, Mem[00000000100c1400] = ff6e87d9 | |
5698 | stha %l1,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 000087d9 | |
5699 | ! %f16 = 00000000 00000000, %l7 = 000000000000ff0e | |
5700 | ! Mem[0000000030001408] = 0000000077aa02f1 | |
5701 | add %i0,0x008,%g1 | |
5702 | stda %f16,[%g1+%l7]ASI_PST8_S ! Mem[0000000030001408] = 00000000000000f1 | |
5703 | ! %l0 = 000000ff, %l1 = ff000000, Mem[0000000010001420] = 90ffa100 d5706d98 | |
5704 | stda %l0,[%i0+0x020]%asi ! Mem[0000000010001420] = 000000ff ff000000 | |
5705 | ! Mem[0000000021800000] = fff29a65, %l1 = ffffffffff000000 | |
5706 | ldstuba [%o3+0x000]%asi,%l1 ! %l1 = 000000ff000000ff | |
5707 | ! Mem[00000000300c1408] = 1a00ffff, %l7 = 000000000000ff0e | |
5708 | ldstuba [%i3+%o4]0x89,%l7 ! %l7 = 000000ff000000ff | |
5709 | ! Mem[0000000030041408] = ffffffff, %l0 = 00000000000000ff | |
5710 | ldstuba [%i1+%o4]0x81,%l0 ! %l0 = 000000ff000000ff | |
5711 | ! %l5 = d9ffffffc49410cd, Mem[00000000201c0000] = 00001669 | |
5712 | stb %l5,[%o0+%g0] ! Mem[00000000201c0000] = cd001669 | |
5713 | ! %f16 = 00000000, Mem[0000000030181410] = 00000000 | |
5714 | sta %f16,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 | |
5715 | ! Mem[0000000030081408] = ff000012, %l1 = 00000000000000ff | |
5716 | ldstuba [%i2+%o4]0x81,%l1 ! %l1 = 000000ff000000ff | |
5717 | ! Starting 10 instruction Load Burst | |
5718 | ! Mem[0000000030001410] = ff000000, %l3 = 00000000f1b600ff | |
5719 | lduha [%i0+%o5]0x81,%l3 ! %l3 = 000000000000ff00 | |
5720 | ||
5721 | p0_label_133: | |
5722 | ! Mem[0000000010081400] = 000000ff, %l6 = 0000000000000077 | |
5723 | lduba [%i2+%g0]0x88,%l6 ! %l6 = 00000000000000ff | |
5724 | ! Mem[0000000030081408] = ff000012, %f0 = 00006c6b | |
5725 | lda [%i2+%o4]0x81,%f0 ! %f0 = ff000012 | |
5726 | ! Mem[0000000010081410] = b4ff000000740000, %l7 = 00000000000000ff | |
5727 | ldxa [%i2+%o5]0x80,%l7 ! %l7 = b4ff000000740000 | |
5728 | ! Mem[0000000010081408] = ff8d001a 782a074d, %l2 = ff27ffff, %l3 = 0000ff00 | |
5729 | ldda [%i2+%o4]0x80,%l2 ! %l2 = 00000000ff8d001a 00000000782a074d | |
5730 | ! Mem[0000000010101400] = 0000ffff, %l6 = 00000000000000ff | |
5731 | ldswa [%i4+%g0]0x88,%l6 ! %l6 = 000000000000ffff | |
5732 | ! Mem[0000000030081400] = ffffffff, %f26 = c78091bb | |
5733 | lda [%i2+%g0]0x81,%f26 ! %f26 = ffffffff | |
5734 | ! Mem[0000000010141400] = ff27ffff f1b600ff, %l2 = ff8d001a, %l3 = 782a074d | |
5735 | ldda [%i5+%g0]0x80,%l2 ! %l2 = 00000000ff27ffff 00000000f1b600ff | |
5736 | ! Mem[00000000300c1400] = e7000000 d9876ee7, %l0 = 000000ff, %l1 = 000000ff | |
5737 | ldda [%i3+%g0]0x81,%l0 ! %l0 = 00000000e7000000 00000000d9876ee7 | |
5738 | ! Mem[00000000300c1400] = e7000000, %l0 = 00000000e7000000 | |
5739 | lduha [%i3+%g0]0x81,%l0 ! %l0 = 000000000000e700 | |
5740 | ! Starting 10 instruction Store Burst | |
5741 | ! %l0 = 000000000000e700, Mem[00000000300c1408] = 1a00ffff | |
5742 | stwa %l0,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 0000e700 | |
5743 | ||
5744 | p0_label_134: | |
5745 | ! %l3 = 00000000f1b600ff, Mem[0000000010181400] = fffff102 | |
5746 | stha %l3,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00fff102 | |
5747 | ! Mem[00000000100c1430] = 7a0000009ce0b68a, %l5 = d9ffffffc49410cd, %l1 = 00000000d9876ee7 | |
5748 | add %i3,0x30,%g1 | |
5749 | casxa [%g1]0x80,%l5,%l1 ! %l1 = 7a0000009ce0b68a | |
5750 | ! %f28 = 00007400 00000000, Mem[0000000030001408] = 00000000 f1000000 | |
5751 | stda %f28,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00007400 00000000 | |
5752 | ! Mem[0000000010181405] = 9b4329a1, %l5 = d9ffffffc49410cd | |
5753 | ldstuba [%i6+0x005]%asi,%l5 ! %l5 = 00000043000000ff | |
5754 | ! %l2 = 00000000ff27ffff, Mem[0000000010081410] = 0000ffb4 | |
5755 | stha %l2,[%i2+%o5]0x88 ! Mem[0000000010081410] = 0000ffff | |
5756 | ! Mem[00000000100c1410] = 000000ff, %l2 = 00000000ff27ffff | |
5757 | swapa [%i3+%o5]0x88,%l2 ! %l2 = 00000000000000ff | |
5758 | ! Mem[00000000300c1410] = c49410cd, %l1 = 7a0000009ce0b68a | |
5759 | ldsha [%i3+%o5]0x89,%l1 ! %l1 = 00000000000010cd | |
5760 | ! %f16 = 00000000 00000000 ffffffff ffffffff | |
5761 | ! %f20 = 75b99345 9b4329a1 5e9e1157 6b6c2202 | |
5762 | ! %f24 = 3bedac39 d81a5b92 ffffffff 02f1ffff | |
5763 | ! %f28 = 00007400 00000000 46ee6de4 c49410cd | |
5764 | stda %f16,[%i6]ASI_COMMIT_P ! Block Store to 0000000010181400 | |
5765 | ! %f4 = 00007400 ff8a98d7, %l4 = 00000000000000e7 | |
5766 | ! Mem[00000000300c1410] = cd1094c4ffffffd9 | |
5767 | add %i3,0x010,%g1 | |
5768 | stda %f4,[%g1+%l4]ASI_PST8_SL ! Mem[00000000300c1410] = d7988ac4ff740000 | |
5769 | ! Starting 10 instruction Load Burst | |
5770 | ! Mem[00000000300c1410] = c48a98d7, %l5 = 0000000000000043 | |
5771 | lduwa [%i3+%o5]0x89,%l5 ! %l5 = 00000000c48a98d7 | |
5772 | ||
5773 | p0_label_135: | |
5774 | ! Mem[00000000300c1410] = d7988ac4, %l2 = 00000000000000ff | |
5775 | ldsba [%i3+%o5]0x81,%l2 ! %l2 = ffffffffffffffd7 | |
5776 | ! Mem[0000000010001400] = ffffffb4, %l1 = 00000000000010cd | |
5777 | lduwa [%i0+%g0]0x80,%l1 ! %l1 = 00000000ffffffb4 | |
5778 | ! Mem[0000000010101400] = 0000ffff, %l3 = 00000000f1b600ff | |
5779 | lduba [%i4+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
5780 | ! Mem[0000000010081400] = 000000ff, %l7 = b4ff000000740000 | |
5781 | ldsha [%i2+%g0]0x88,%l7 ! %l7 = 00000000000000ff | |
5782 | ! Mem[0000000010041410] = ff007400, %l4 = 00000000000000e7 | |
5783 | lduha [%i1+%o5]0x80,%l4 ! %l4 = 000000000000ff00 | |
5784 | membar #Sync ! Added by membar checker (32) | |
5785 | ! Mem[0000000010001400] = ffffffb4 6d1dd03f 4d072a78 00000000 | |
5786 | ! Mem[0000000010001410] = ff000000 d81a5b92 d9876ee7 f8d13fed | |
5787 | ! Mem[0000000010001420] = 000000ff ff000000 00000000 a309ade0 | |
5788 | ! Mem[0000000010001430] = 0f10ff1a e0ffffff 00000000 00007a9a | |
5789 | ldda [%i0]ASI_BLK_P,%f0 ! Block Load from 0000000010001400 | |
5790 | ! Mem[0000000030101400] = ffffffffffffff00, %l4 = 000000000000ff00 | |
5791 | ldxa [%i4+%g0]0x89,%l4 ! %l4 = ffffffffffffff00 | |
5792 | ! Mem[0000000010181424] = d81a5b92, %f24 = 3bedac39 | |
5793 | ld [%i6+0x024],%f24 ! %f24 = d81a5b92 | |
5794 | ! Mem[0000000010101410] = ed13eb1e ff000000, %l0 = 0000e700, %l1 = ffffffb4 | |
5795 | ldda [%i4+%o5]0x88,%l0 ! %l0 = 00000000ff000000 00000000ed13eb1e | |
5796 | ! Starting 10 instruction Store Burst | |
5797 | ! %f0 = ffffffb4 6d1dd03f 4d072a78 00000000 | |
5798 | ! %f4 = ff000000 d81a5b92 d9876ee7 f8d13fed | |
5799 | ! %f8 = 000000ff ff000000 00000000 a309ade0 | |
5800 | ! %f12 = 0f10ff1a e0ffffff 00000000 00007a9a | |
5801 | stda %f0,[%i6]ASI_COMMIT_S ! Block Store to 0000000030181400 | |
5802 | ||
5803 | ! Check Point 27 for processor 0 | |
5804 | ||
5805 | set p0_check_pt_data_27,%g4 | |
5806 | rd %ccr,%g5 ! %g5 = 44 | |
5807 | ldx [%g4+0x08],%g2 | |
5808 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
5809 | bne %xcc,p0_reg_check_fail0 | |
5810 | mov 0xee0,%g1 | |
5811 | ldx [%g4+0x10],%g2 | |
5812 | cmp %l1,%g2 ! %l1 = 00000000ed13eb1e | |
5813 | bne %xcc,p0_reg_check_fail1 | |
5814 | mov 0xee1,%g1 | |
5815 | ldx [%g4+0x18],%g2 | |
5816 | cmp %l2,%g2 ! %l2 = ffffffffffffffd7 | |
5817 | bne %xcc,p0_reg_check_fail2 | |
5818 | mov 0xee2,%g1 | |
5819 | ldx [%g4+0x20],%g2 | |
5820 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
5821 | bne %xcc,p0_reg_check_fail3 | |
5822 | mov 0xee3,%g1 | |
5823 | ldx [%g4+0x28],%g2 | |
5824 | cmp %l4,%g2 ! %l4 = ffffffffffffff00 | |
5825 | bne %xcc,p0_reg_check_fail4 | |
5826 | mov 0xee4,%g1 | |
5827 | ldx [%g4+0x30],%g2 | |
5828 | cmp %l5,%g2 ! %l5 = 00000000c48a98d7 | |
5829 | bne %xcc,p0_reg_check_fail5 | |
5830 | mov 0xee5,%g1 | |
5831 | ldx [%g4+0x38],%g2 | |
5832 | cmp %l6,%g2 ! %l6 = 000000000000ffff | |
5833 | bne %xcc,p0_reg_check_fail6 | |
5834 | mov 0xee6,%g1 | |
5835 | ldx [%g4+0x40],%g2 | |
5836 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
5837 | bne %xcc,p0_reg_check_fail7 | |
5838 | mov 0xee7,%g1 | |
5839 | ldx [%g4+0x48],%g3 | |
5840 | std %f0,[%g4] | |
5841 | ldx [%g4],%g2 | |
5842 | cmp %g3,%g2 ! %f0 = ffffffb4 6d1dd03f | |
5843 | bne %xcc,p0_freg_check_fail | |
5844 | mov 0xf00,%g1 | |
5845 | ldx [%g4+0x50],%g3 | |
5846 | std %f2,[%g4] | |
5847 | ldx [%g4],%g2 | |
5848 | cmp %g3,%g2 ! %f2 = 4d072a78 00000000 | |
5849 | bne %xcc,p0_freg_check_fail | |
5850 | mov 0xf02,%g1 | |
5851 | ldx [%g4+0x58],%g3 | |
5852 | std %f4,[%g4] | |
5853 | ldx [%g4],%g2 | |
5854 | cmp %g3,%g2 ! %f4 = ff000000 d81a5b92 | |
5855 | bne %xcc,p0_freg_check_fail | |
5856 | mov 0xf04,%g1 | |
5857 | ldx [%g4+0x60],%g3 | |
5858 | std %f6,[%g4] | |
5859 | ldx [%g4],%g2 | |
5860 | cmp %g3,%g2 ! %f6 = d9876ee7 f8d13fed | |
5861 | bne %xcc,p0_freg_check_fail | |
5862 | mov 0xf06,%g1 | |
5863 | ldx [%g4+0x68],%g3 | |
5864 | std %f8,[%g4] | |
5865 | ldx [%g4],%g2 | |
5866 | cmp %g3,%g2 ! %f8 = 000000ff ff000000 | |
5867 | bne %xcc,p0_freg_check_fail | |
5868 | mov 0xf08,%g1 | |
5869 | ldx [%g4+0x70],%g3 | |
5870 | std %f10,[%g4] | |
5871 | ldx [%g4],%g2 | |
5872 | cmp %g3,%g2 ! %f10 = 00000000 a309ade0 | |
5873 | bne %xcc,p0_freg_check_fail | |
5874 | mov 0xf10,%g1 | |
5875 | ldx [%g4+0x78],%g3 | |
5876 | std %f12,[%g4] | |
5877 | ldx [%g4],%g2 | |
5878 | cmp %g3,%g2 ! %f12 = 0f10ff1a e0ffffff | |
5879 | bne %xcc,p0_freg_check_fail | |
5880 | mov 0xf12,%g1 | |
5881 | ldx [%g4+0x80],%g3 | |
5882 | std %f14,[%g4] | |
5883 | ldx [%g4],%g2 | |
5884 | cmp %g3,%g2 ! %f14 = 00000000 00007a9a | |
5885 | bne %xcc,p0_freg_check_fail | |
5886 | mov 0xf14,%g1 | |
5887 | ldx [%g4+0x88],%g3 | |
5888 | std %f16,[%g4] | |
5889 | ldx [%g4],%g2 | |
5890 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
5891 | bne %xcc,p0_freg_check_fail | |
5892 | mov 0xf16,%g1 | |
5893 | ldx [%g4+0x90],%g3 | |
5894 | std %f24,[%g4] | |
5895 | ldx [%g4],%g2 | |
5896 | cmp %g3,%g2 ! %f24 = d81a5b92 d81a5b92 | |
5897 | bne %xcc,p0_freg_check_fail | |
5898 | mov 0xf24,%g1 | |
5899 | ldx [%g4+0x98],%g3 | |
5900 | std %f26,[%g4] | |
5901 | ldx [%g4],%g2 | |
5902 | cmp %g3,%g2 ! %f26 = ffffffff 02f1ffff | |
5903 | bne %xcc,p0_freg_check_fail | |
5904 | mov 0xf26,%g1 | |
5905 | ||
5906 | ! Check Point 27 completed | |
5907 | ||
5908 | ||
5909 | p0_label_136: | |
5910 | ! %f10 = 00000000 a309ade0, Mem[0000000010101410] = 000000ff 1eeb13ed | |
5911 | std %f10,[%i4+%o5] ! Mem[0000000010101410] = 00000000 a309ade0 | |
5912 | membar #Sync ! Added by membar checker (33) | |
5913 | ! %l2 = ffffffd7, %l3 = 000000ff, Mem[0000000030181410] = ff000000 d81a5b92 | |
5914 | stda %l2,[%i6+%o5]0x81 ! Mem[0000000030181410] = ffffffd7 000000ff | |
5915 | ! Mem[0000000010181410] = 4593b975, %l3 = 00000000000000ff | |
5916 | ldstuba [%i6+%o5]0x88,%l3 ! %l3 = 00000075000000ff | |
5917 | ! Mem[0000000030181408] = 00000000782a074d, %l5 = 00000000c48a98d7 | |
5918 | ldxa [%i6+%o4]0x89,%l5 ! %l5 = 00000000782a074d | |
5919 | ! Mem[00000000300c1408] = 00e70000, %l4 = ffffffffffffff00 | |
5920 | swapa [%i3+%o4]0x81,%l4 ! %l4 = 0000000000e70000 | |
5921 | ! %l2 = ffffffffffffffd7, Mem[0000000030181400] = b4ffffff | |
5922 | stwa %l2,[%i6+%g0]0x89 ! Mem[0000000030181400] = ffffffd7 | |
5923 | ! Mem[0000000021800041] = ce845e5c, %l4 = 0000000000e70000 | |
5924 | ldstub [%o3+0x041],%l4 ! %l4 = 00000084000000ff | |
5925 | ! %f14 = 00000000 00007a9a, Mem[0000000010001400] = b4ffffff 3fd01d6d | |
5926 | stda %f14,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 00007a9a | |
5927 | ! %f24 = d81a5b92 d81a5b92, Mem[0000000030081410] = ffffffff 00000000 | |
5928 | stda %f24,[%i2+%o5]0x89 ! Mem[0000000030081410] = d81a5b92 d81a5b92 | |
5929 | ! Starting 10 instruction Load Burst | |
5930 | ! Mem[0000000030081400] = ffffffff, %f7 = f8d13fed | |
5931 | lda [%i2+%g0]0x89,%f7 ! %f7 = ffffffff | |
5932 | ||
5933 | p0_label_137: | |
5934 | ! Mem[00000000100c1438] = ffffffe0, %l1 = 00000000ed13eb1e | |
5935 | ldsha [%i3+0x03a]%asi,%l1 ! %l1 = ffffffffffffffe0 | |
5936 | ! Mem[0000000010041414] = f8d13fed, %l6 = 000000000000ffff | |
5937 | lduh [%i1+0x016],%l6 ! %l6 = 0000000000003fed | |
5938 | ! Mem[0000000021800180] = e2cfdb07, %l1 = ffffffffffffffe0 | |
5939 | lduh [%o3+0x180],%l1 ! %l1 = 000000000000e2cf | |
5940 | ! Mem[0000000010081424] = 0000007a, %l5 = 00000000782a074d | |
5941 | ldsba [%i2+0x025]%asi,%l5 ! %l5 = 0000000000000000 | |
5942 | ! Mem[0000000030001408] = 00000000, %l2 = ffffffffffffffd7 | |
5943 | ldswa [%i0+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
5944 | ! Mem[00000000100c1400] = ffffffcad9870000, %l2 = 0000000000000000 | |
5945 | ldxa [%i3+%g0]0x88,%l2 ! %l2 = ffffffcad9870000 | |
5946 | ! Mem[0000000020800000] = ffff0db6, %l6 = 0000000000003fed | |
5947 | lduha [%o1+0x000]%asi,%l6 ! %l6 = 000000000000ffff | |
5948 | ! Mem[0000000010041400] = 02226c6b57119e5e, %f18 = ffffffff ffffffff | |
5949 | ldda [%i1+%g0]0x88,%f18 ! %f18 = 02226c6b 57119e5e | |
5950 | ! Mem[0000000030001408] = 00000000, %l7 = 00000000000000ff | |
5951 | ldswa [%i0+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
5952 | ! Starting 10 instruction Store Burst | |
5953 | ! Mem[0000000010041400] = 5e9e1157, %l6 = 000000000000ffff | |
5954 | ldstuba [%i1+%g0]0x80,%l6 ! %l6 = 0000005e000000ff | |
5955 | ||
5956 | p0_label_138: | |
5957 | ! %l7 = 0000000000000000, Mem[0000000030041400] = 00000000 | |
5958 | stwa %l7,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00000000 | |
5959 | ! %f6 = d9876ee7 ffffffff, %l2 = ffffffcad9870000 | |
5960 | ! Mem[0000000010181420] = 3bedac39d81a5b92 | |
5961 | add %i6,0x020,%g1 | |
5962 | stda %f6,[%g1+%l2]ASI_PST32_P ! Mem[0000000010181420] = 3bedac39d81a5b92 | |
5963 | ! Mem[0000000010181404] = 00000000, %l5 = 0000000000000000, %asi = 80 | |
5964 | swapa [%i6+0x004]%asi,%l5 ! %l5 = 0000000000000000 | |
5965 | ! %l5 = 0000000000000000, Mem[0000000010181400] = 00000000 | |
5966 | stha %l5,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000 | |
5967 | ! Mem[00000000100c141b] = 5e9e1157, %l0 = 00000000ff000000 | |
5968 | ldstuba [%i3+0x01b]%asi,%l0 ! %l0 = 00000057000000ff | |
5969 | ! %l2 = ffffffcad9870000, Mem[0000000030141410] = ff070248 | |
5970 | stba %l2,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00070248 | |
5971 | ! %f6 = d9876ee7 ffffffff, %l1 = 000000000000e2cf | |
5972 | ! Mem[0000000030141430] = 75b993459b4329a1 | |
5973 | add %i5,0x030,%g1 | |
5974 | stda %f6,[%g1+%l1]ASI_PST8_SL ! Mem[0000000030141430] = ffffffff9b4387d9 | |
5975 | ! %l2 = ffffffcad9870000, Mem[00000000100c1434] = 9ce0b68a | |
5976 | sth %l2,[%i3+0x034] ! Mem[00000000100c1434] = 0000b68a | |
5977 | ! %l3 = 0000000000000075, Mem[0000000030101410] = 75b99345 | |
5978 | stba %l3,[%i4+%o5]0x81 ! Mem[0000000030101410] = 75b99345 | |
5979 | ! Starting 10 instruction Load Burst | |
5980 | ! Mem[0000000010041410] = ff007400, %l0 = 0000000000000057 | |
5981 | lduba [%i1+%o5]0x80,%l0 ! %l0 = 00000000000000ff | |
5982 | ||
5983 | p0_label_139: | |
5984 | ! Mem[0000000010141434] = 365fc6fa, %l4 = 0000000000000084 | |
5985 | ldsba [%i5+0x037]%asi,%l4 ! %l4 = fffffffffffffffa | |
5986 | ! Mem[0000000010081400] = ff000000, %l0 = 00000000000000ff | |
5987 | lduha [%i2+%g0]0x80,%l0 ! %l0 = 000000000000ff00 | |
5988 | ! Mem[0000000030041408] = ffffffffffffffff, %l3 = 0000000000000075 | |
5989 | ldxa [%i1+%o4]0x89,%l3 ! %l3 = ffffffffffffffff | |
5990 | ! Mem[0000000021800040] = ceff5e5c, %l2 = ffffffcad9870000 | |
5991 | lduh [%o3+0x040],%l2 ! %l2 = 000000000000ceff | |
5992 | ! Mem[0000000010001410] = ff000000, %l3 = ffffffffffffffff | |
5993 | lduwa [%i0+%o5]0x80,%l3 ! %l3 = 00000000ff000000 | |
5994 | ! Mem[0000000010041408] = 46ee6de4c49410cd, %l3 = 00000000ff000000 | |
5995 | ldxa [%i1+%o4]0x80,%l3 ! %l3 = 46ee6de4c49410cd | |
5996 | ! Mem[0000000010181400] = 00000000, %l3 = 46ee6de4c49410cd | |
5997 | lduba [%i6+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
5998 | ! Mem[000000001014141c] = 57119e5e, %l3 = 0000000000000000 | |
5999 | lduha [%i5+0x01e]%asi,%l3 ! %l3 = 0000000000009e5e | |
6000 | ! Mem[0000000010181400] = 0000000000000000, %f24 = d81a5b92 d81a5b92 | |
6001 | ldda [%i6+%g0]0x88,%f24 ! %f24 = 00000000 00000000 | |
6002 | ! Starting 10 instruction Store Burst | |
6003 | ! %l5 = 0000000000000000, Mem[00000000300c1400] = 000000e7 | |
6004 | stba %l5,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 00000000 | |
6005 | ||
6006 | p0_label_140: | |
6007 | ! Mem[000000001010143f] = 00006300, %l1 = 000000000000e2cf | |
6008 | ldstuba [%i4+0x03f]%asi,%l1 ! %l1 = 00000000000000ff | |
6009 | ! %f22 = 5e9e1157 6b6c2202, %l2 = 000000000000ceff | |
6010 | ! Mem[00000000300c1438] = 28dd7ee6855a539c | |
6011 | add %i3,0x038,%g1 | |
6012 | stda %f22,[%g1+%l2]ASI_PST8_SL ! Mem[00000000300c1438] = 02226c6b57119e5e | |
6013 | ! Mem[0000000010081410] = ffff0000, %l2 = 000000000000ceff | |
6014 | ldstuba [%i2+%o5]0x80,%l2 ! %l2 = 000000ff000000ff | |
6015 | ! Mem[0000000010081400] = 000000ff, %l4 = fffffffffffffffa | |
6016 | ldstuba [%i2+%g0]0x88,%l4 ! %l4 = 000000ff000000ff | |
6017 | ! %l3 = 0000000000009e5e, Mem[00000000201c0001] = cd001669, %asi = 80 | |
6018 | stba %l3,[%o0+0x001]%asi ! Mem[00000000201c0000] = cd5e1669 | |
6019 | ! %f0 = ffffffb4 6d1dd03f, Mem[0000000010081400] = ff000000 00005bff | |
6020 | stda %f0 ,[%i2+%g0]0x80 ! Mem[0000000010081400] = ffffffb4 6d1dd03f | |
6021 | ! Mem[0000000030181408] = 782a074d, %l5 = 0000000000000000 | |
6022 | ldstuba [%i6+%o4]0x89,%l5 ! %l5 = 0000004d000000ff | |
6023 | ! %l5 = 000000000000004d, Mem[0000000010141408] = ffffffffffffffff | |
6024 | stxa %l5,[%i5+%o4]0x88 ! Mem[0000000010141408] = 000000000000004d | |
6025 | ! %l6 = 000000000000005e, Mem[00000000100c1408] = 0aff0000 | |
6026 | stwa %l6,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 0000005e | |
6027 | ! Starting 10 instruction Load Burst | |
6028 | membar #Sync ! Added by membar checker (34) | |
6029 | ! Mem[00000000100c1400] = 000087d9 caffffff 0000005e ffffffff | |
6030 | ! Mem[00000000100c1410] = ffff27ff 00000000 5e9e11ff 6b6c2202 | |
6031 | ! Mem[00000000100c1420] = 00000000 d81a5b92 c78091bb d9876ee7 | |
6032 | ! Mem[00000000100c1430] = 7a000000 0000b68a ffffffe0 00000000 | |
6033 | ldda [%i3]ASI_BLK_PL,%f0 ! Block Load from 00000000100c1400 | |
6034 | ||
6035 | ! Check Point 28 for processor 0 | |
6036 | ||
6037 | set p0_check_pt_data_28,%g4 | |
6038 | rd %ccr,%g5 ! %g5 = 44 | |
6039 | ldx [%g4+0x08],%g2 | |
6040 | cmp %l0,%g2 ! %l0 = 000000000000ff00 | |
6041 | bne %xcc,p0_reg_check_fail0 | |
6042 | mov 0xee0,%g1 | |
6043 | ldx [%g4+0x10],%g2 | |
6044 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
6045 | bne %xcc,p0_reg_check_fail1 | |
6046 | mov 0xee1,%g1 | |
6047 | ldx [%g4+0x18],%g2 | |
6048 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
6049 | bne %xcc,p0_reg_check_fail2 | |
6050 | mov 0xee2,%g1 | |
6051 | ldx [%g4+0x20],%g2 | |
6052 | cmp %l3,%g2 ! %l3 = 0000000000009e5e | |
6053 | bne %xcc,p0_reg_check_fail3 | |
6054 | mov 0xee3,%g1 | |
6055 | ldx [%g4+0x28],%g2 | |
6056 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
6057 | bne %xcc,p0_reg_check_fail4 | |
6058 | mov 0xee4,%g1 | |
6059 | ldx [%g4+0x30],%g2 | |
6060 | cmp %l5,%g2 ! %l5 = 000000000000004d | |
6061 | bne %xcc,p0_reg_check_fail5 | |
6062 | mov 0xee5,%g1 | |
6063 | ldx [%g4+0x38],%g2 | |
6064 | cmp %l6,%g2 ! %l6 = 000000000000005e | |
6065 | bne %xcc,p0_reg_check_fail6 | |
6066 | mov 0xee6,%g1 | |
6067 | ldx [%g4+0x40],%g2 | |
6068 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
6069 | bne %xcc,p0_reg_check_fail7 | |
6070 | mov 0xee7,%g1 | |
6071 | ldx [%g4+0x48],%g3 | |
6072 | std %f0,[%g4] | |
6073 | ldx [%g4],%g2 | |
6074 | cmp %g3,%g2 ! %f0 = ffffffca d9870000 | |
6075 | bne %xcc,p0_freg_check_fail | |
6076 | mov 0xf00,%g1 | |
6077 | ldx [%g4+0x50],%g3 | |
6078 | std %f2,[%g4] | |
6079 | ldx [%g4],%g2 | |
6080 | cmp %g3,%g2 ! %f2 = ffffffff 5e000000 | |
6081 | bne %xcc,p0_freg_check_fail | |
6082 | mov 0xf02,%g1 | |
6083 | ldx [%g4+0x58],%g3 | |
6084 | std %f4,[%g4] | |
6085 | ldx [%g4],%g2 | |
6086 | cmp %g3,%g2 ! %f4 = 00000000 ff27ffff | |
6087 | bne %xcc,p0_freg_check_fail | |
6088 | mov 0xf04,%g1 | |
6089 | ldx [%g4+0x60],%g3 | |
6090 | std %f6,[%g4] | |
6091 | ldx [%g4],%g2 | |
6092 | cmp %g3,%g2 ! %f6 = 02226c6b ff119e5e | |
6093 | bne %xcc,p0_freg_check_fail | |
6094 | mov 0xf06,%g1 | |
6095 | ldx [%g4+0x68],%g3 | |
6096 | std %f8,[%g4] | |
6097 | ldx [%g4],%g2 | |
6098 | cmp %g3,%g2 ! %f8 = 925b1ad8 00000000 | |
6099 | bne %xcc,p0_freg_check_fail | |
6100 | mov 0xf08,%g1 | |
6101 | ldx [%g4+0x70],%g3 | |
6102 | std %f10,[%g4] | |
6103 | ldx [%g4],%g2 | |
6104 | cmp %g3,%g2 ! %f10 = e76e87d9 bb9180c7 | |
6105 | bne %xcc,p0_freg_check_fail | |
6106 | mov 0xf10,%g1 | |
6107 | ldx [%g4+0x78],%g3 | |
6108 | std %f12,[%g4] | |
6109 | ldx [%g4],%g2 | |
6110 | cmp %g3,%g2 ! %f12 = 8ab60000 0000007a | |
6111 | bne %xcc,p0_freg_check_fail | |
6112 | mov 0xf12,%g1 | |
6113 | ldx [%g4+0x80],%g3 | |
6114 | std %f14,[%g4] | |
6115 | ldx [%g4],%g2 | |
6116 | cmp %g3,%g2 ! %f14 = 00000000 e0ffffff | |
6117 | bne %xcc,p0_freg_check_fail | |
6118 | mov 0xf14,%g1 | |
6119 | ldx [%g4+0x88],%g3 | |
6120 | std %f18,[%g4] | |
6121 | ldx [%g4],%g2 | |
6122 | cmp %g3,%g2 ! %f18 = 02226c6b 57119e5e | |
6123 | bne %xcc,p0_freg_check_fail | |
6124 | mov 0xf18,%g1 | |
6125 | ldx [%g4+0x90],%g3 | |
6126 | std %f24,[%g4] | |
6127 | ldx [%g4],%g2 | |
6128 | cmp %g3,%g2 ! %f24 = 00000000 00000000 | |
6129 | bne %xcc,p0_freg_check_fail | |
6130 | mov 0xf24,%g1 | |
6131 | ||
6132 | ! Check Point 28 completed | |
6133 | ||
6134 | ||
6135 | p0_label_141: | |
6136 | ! Mem[00000000100c1410] = 00000000ff27ffff, %f14 = 00000000 e0ffffff | |
6137 | ldda [%i3+%o5]0x88,%f14 ! %f14 = 00000000 ff27ffff | |
6138 | ! Mem[0000000030081410] = 925b1ad8, %f0 = ffffffca | |
6139 | lda [%i2+%o5]0x81,%f0 ! %f0 = 925b1ad8 | |
6140 | ! Mem[00000000100c1408] = 0000005effffffff, %f28 = 00007400 00000000 | |
6141 | ldda [%i3+%o4]0x80,%f28 ! %f28 = 0000005e ffffffff | |
6142 | ! Mem[0000000030081408] = ff000012, %l2 = 00000000000000ff | |
6143 | ldswa [%i2+%o4]0x81,%l2 ! %l2 = ffffffffff000012 | |
6144 | ! Mem[0000000010041438] = 8b0838ff, %l7 = 0000000000000000 | |
6145 | lduha [%i1+0x03a]%asi,%l7 ! %l7 = 00000000000038ff | |
6146 | ! Mem[0000000030041408] = ffffffff, %l5 = 000000000000004d | |
6147 | lduba [%i1+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
6148 | ! Mem[0000000030101400] = 00ffffff, %l1 = 0000000000000000 | |
6149 | ldswa [%i4+%g0]0x81,%l1 ! %l1 = 0000000000ffffff | |
6150 | ! Mem[00000000100c140c] = ffffffff, %l2 = ffffffffff000012 | |
6151 | lduha [%i3+0x00c]%asi,%l2 ! %l2 = 000000000000ffff | |
6152 | ! Mem[0000000010081400] = b4ffffff, %f3 = 5e000000 | |
6153 | lda [%i2+%g0]0x88,%f3 ! %f3 = b4ffffff | |
6154 | ! Starting 10 instruction Store Burst | |
6155 | ! Mem[0000000030101400] = ffffff00, %l2 = 000000000000ffff | |
6156 | swapa [%i4+%g0]0x89,%l2 ! %l2 = 00000000ffffff00 | |
6157 | ||
6158 | p0_label_142: | |
6159 | ! Mem[00000000100c1400] = 000087d9, %l1 = 0000000000ffffff | |
6160 | swapa [%i3+%g0]0x80,%l1 ! %l1 = 00000000000087d9 | |
6161 | ! %l2 = 00000000ffffff00, Mem[0000000010001400] = 00007a9a | |
6162 | stba %l2,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00007a00 | |
6163 | ! %l6 = 000000000000005e, Mem[0000000010101408] = 00ff9726 | |
6164 | stha %l6,[%i4+%o4]0x80 ! Mem[0000000010101408] = 005e9726 | |
6165 | ! %f14 = 00000000 ff27ffff, Mem[0000000030101400] = 0000ffff ffffffff | |
6166 | stda %f14,[%i4+%g0]0x89 ! Mem[0000000030101400] = 00000000 ff27ffff | |
6167 | ! %l2 = 00000000ffffff00, Mem[0000000030141400] = ffffffff | |
6168 | stba %l2,[%i5+%g0]0x89 ! Mem[0000000030141400] = ffffff00 | |
6169 | ! %l7 = 00000000000038ff, Mem[0000000010101400] = 0000ffff | |
6170 | stwa %l7,[%i4+%g0]0x88 ! Mem[0000000010101400] = 000038ff | |
6171 | ! Mem[0000000030141408] = ff000000, %l4 = 00000000000000ff | |
6172 | swapa [%i5+%o4]0x81,%l4 ! %l4 = 00000000ff000000 | |
6173 | ! Mem[0000000010041400] = ff9e1157, %l7 = 00000000000038ff | |
6174 | swap [%i1+%g0],%l7 ! %l7 = 00000000ff9e1157 | |
6175 | ! %f22 = 5e9e1157 6b6c2202, Mem[0000000030181410] = d7ffffff ff000000 | |
6176 | stda %f22,[%i6+%o5]0x89 ! Mem[0000000030181410] = 5e9e1157 6b6c2202 | |
6177 | ! Starting 10 instruction Load Burst | |
6178 | ! Mem[00000000100c1408] = 0000005e, %l5 = 00000000000000ff | |
6179 | lduba [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
6180 | ||
6181 | p0_label_143: | |
6182 | ! Mem[0000000010141400] = ff27ffff, %l3 = 0000000000009e5e | |
6183 | ldsha [%i5+%g0]0x80,%l3 ! %l3 = ffffffffffffff27 | |
6184 | ! Mem[0000000010041424] = d7428e9c, %f9 = 00000000 | |
6185 | lda [%i1+0x024]%asi,%f9 ! %f9 = d7428e9c | |
6186 | ! Mem[00000000211c0000] = fffffe0c, %l7 = 00000000ff9e1157 | |
6187 | lduh [%o2+%g0],%l7 ! %l7 = 000000000000ffff | |
6188 | ! Mem[0000000010181408] = ffffffff ffffffff, %l0 = 0000ff00, %l1 = 000087d9 | |
6189 | ldda [%i6+%o4]0x88,%l0 ! %l0 = 00000000ffffffff 00000000ffffffff | |
6190 | ! Mem[0000000030101408] = ffffffff, %l2 = 00000000ffffff00 | |
6191 | lduba [%i4+%o4]0x81,%l2 ! %l2 = 00000000000000ff | |
6192 | ! Mem[00000000300c1400] = 00000000, %l2 = 00000000000000ff | |
6193 | lduwa [%i3+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
6194 | ! Mem[0000000010101408] = 26975e00, %l6 = 000000000000005e | |
6195 | ldsba [%i4+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
6196 | ! Mem[0000000030001400] = 00000000, %l2 = 0000000000000000 | |
6197 | ldswa [%i0+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
6198 | ! Mem[0000000030041408] = ffffffffffffffff, %f20 = 75b99345 9b4329a1 | |
6199 | ldda [%i1+%o4]0x81,%f20 ! %f20 = ffffffff ffffffff | |
6200 | ! Starting 10 instruction Store Burst | |
6201 | ! %l4 = 00000000ff000000, Mem[0000000030001400] = 00000000000000e7 | |
6202 | stxa %l4,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00000000ff000000 | |
6203 | ||
6204 | p0_label_144: | |
6205 | ! %f10 = e76e87d9 bb9180c7, Mem[0000000010101418] = 02f1ffff 00000000 | |
6206 | stda %f10,[%i4+0x018]%asi ! Mem[0000000010101418] = e76e87d9 bb9180c7 | |
6207 | ! %l1 = 00000000ffffffff, Mem[0000000010081417] = 00740000, %asi = 80 | |
6208 | stba %l1,[%i2+0x017]%asi ! Mem[0000000010081414] = 007400ff | |
6209 | ! %l1 = 00000000ffffffff, Mem[0000000030141408] = 000000ff | |
6210 | stha %l1,[%i5+%o4]0x81 ! Mem[0000000030141408] = ffff00ff | |
6211 | ! %f8 = 925b1ad8 d7428e9c, Mem[0000000010001400] = 007a0000 00000000 | |
6212 | stda %f8 ,[%i0+%g0]0x80 ! Mem[0000000010001400] = 925b1ad8 d7428e9c | |
6213 | ! %l2 = 00000000, %l3 = ffffff27, Mem[0000000010181438] = 46ee6de4 c49410cd | |
6214 | stda %l2,[%i6+0x038]%asi ! Mem[0000000010181438] = 00000000 ffffff27 | |
6215 | ! Mem[0000000010081408] = 1a008dff, %l3 = ffffffffffffff27 | |
6216 | swapa [%i2+%o4]0x88,%l3 ! %l3 = 000000001a008dff | |
6217 | ! %f16 = 00000000, Mem[0000000030041410] = ff000000 | |
6218 | sta %f16,[%i1+%o5]0x89 ! Mem[0000000030041410] = 00000000 | |
6219 | ! %l0 = ffffffff, %l1 = ffffffff, Mem[00000000300c1408] = 00ffffff 00746fa4 | |
6220 | stda %l0,[%i3+%o4]0x89 ! Mem[00000000300c1408] = ffffffff ffffffff | |
6221 | ! %l4 = ff000000, %l5 = 00000000, Mem[0000000010041400] = 000038ff 6b6c2202 | |
6222 | stda %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = ff000000 00000000 | |
6223 | ! Starting 10 instruction Load Burst | |
6224 | ! Mem[00000000300c1408] = ffffffff, %l0 = 00000000ffffffff | |
6225 | ldsba [%i3+%o4]0x89,%l0 ! %l0 = ffffffffffffffff | |
6226 | ||
6227 | p0_label_145: | |
6228 | ! Mem[00000000100c1410] = 00000000ff27ffff, %f22 = 5e9e1157 6b6c2202 | |
6229 | ldda [%i3+%o5]0x88,%f22 ! %f22 = 00000000 ff27ffff | |
6230 | ! Mem[0000000030141408] = ffff00ff ffffffff, %l0 = ffffffff, %l1 = ffffffff | |
6231 | ldda [%i5+%o4]0x81,%l0 ! %l0 = 00000000ffff00ff 00000000ffffffff | |
6232 | ! Mem[00000000100c1400] = ffffff00, %l6 = 0000000000000000 | |
6233 | ldswa [%i3+%g0]0x88,%l6 ! %l6 = ffffffffffffff00 | |
6234 | ! Mem[00000000300c1400] = 00000000d9876ee7, %f12 = 8ab60000 0000007a | |
6235 | ldda [%i3+%g0]0x81,%f12 ! %f12 = 00000000 d9876ee7 | |
6236 | ! Mem[0000000030181400] = d7ffffff 6d1dd03f, %l4 = ff000000, %l5 = 00000000 | |
6237 | ldda [%i6+%g0]0x81,%l4 ! %l4 = 00000000d7ffffff 000000006d1dd03f | |
6238 | ! Mem[0000000030041400] = 00000000, %l5 = 000000006d1dd03f | |
6239 | lduba [%i1+%g0]0x81,%l5 ! %l5 = 0000000000000000 | |
6240 | ! Mem[0000000030081408] = 120000ff, %l7 = 000000000000ffff | |
6241 | lduwa [%i2+%o4]0x89,%l7 ! %l7 = 00000000120000ff | |
6242 | ! Mem[0000000030181410] = 02226c6b, %l0 = 00000000ffff00ff | |
6243 | ldsha [%i6+%o5]0x81,%l0 ! %l0 = 0000000000000222 | |
6244 | ! Mem[0000000030141400] = 00ffffff, %f5 = ff27ffff | |
6245 | lda [%i5+%g0]0x81,%f5 ! %f5 = 00ffffff | |
6246 | ! Starting 10 instruction Store Burst | |
6247 | ! Mem[00000000201c0001] = cd5e1669, %l0 = 0000000000000222 | |
6248 | ldstuba [%o0+0x001]%asi,%l0 ! %l0 = 0000005e000000ff | |
6249 | ||
6250 | ! Check Point 29 for processor 0 | |
6251 | ||
6252 | set p0_check_pt_data_29,%g4 | |
6253 | rd %ccr,%g5 ! %g5 = 44 | |
6254 | ldx [%g4+0x08],%g2 | |
6255 | cmp %l0,%g2 ! %l0 = 000000000000005e | |
6256 | bne %xcc,p0_reg_check_fail0 | |
6257 | mov 0xee0,%g1 | |
6258 | ldx [%g4+0x10],%g2 | |
6259 | cmp %l1,%g2 ! %l1 = 00000000ffffffff | |
6260 | bne %xcc,p0_reg_check_fail1 | |
6261 | mov 0xee1,%g1 | |
6262 | ldx [%g4+0x18],%g2 | |
6263 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
6264 | bne %xcc,p0_reg_check_fail2 | |
6265 | mov 0xee2,%g1 | |
6266 | ldx [%g4+0x20],%g2 | |
6267 | cmp %l3,%g2 ! %l3 = 000000001a008dff | |
6268 | bne %xcc,p0_reg_check_fail3 | |
6269 | mov 0xee3,%g1 | |
6270 | ldx [%g4+0x28],%g2 | |
6271 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
6272 | bne %xcc,p0_reg_check_fail5 | |
6273 | mov 0xee5,%g1 | |
6274 | ldx [%g4+0x30],%g2 | |
6275 | cmp %l6,%g2 ! %l6 = ffffffffffffff00 | |
6276 | bne %xcc,p0_reg_check_fail6 | |
6277 | mov 0xee6,%g1 | |
6278 | ldx [%g4+0x38],%g2 | |
6279 | cmp %l7,%g2 ! %l7 = 00000000120000ff | |
6280 | bne %xcc,p0_reg_check_fail7 | |
6281 | mov 0xee7,%g1 | |
6282 | ldx [%g4+0x40],%g3 | |
6283 | std %f0,[%g4] | |
6284 | ldx [%g4],%g2 | |
6285 | cmp %g3,%g2 ! %f0 = 925b1ad8 d9870000 | |
6286 | bne %xcc,p0_freg_check_fail | |
6287 | mov 0xf00,%g1 | |
6288 | ldx [%g4+0x48],%g3 | |
6289 | std %f2,[%g4] | |
6290 | ldx [%g4],%g2 | |
6291 | cmp %g3,%g2 ! %f2 = ffffffff b4ffffff | |
6292 | bne %xcc,p0_freg_check_fail | |
6293 | mov 0xf02,%g1 | |
6294 | ldx [%g4+0x50],%g3 | |
6295 | std %f4,[%g4] | |
6296 | ldx [%g4],%g2 | |
6297 | cmp %g3,%g2 ! %f4 = 00000000 00ffffff | |
6298 | bne %xcc,p0_freg_check_fail | |
6299 | mov 0xf04,%g1 | |
6300 | ldx [%g4+0x58],%g3 | |
6301 | std %f8,[%g4] | |
6302 | ldx [%g4],%g2 | |
6303 | cmp %g3,%g2 ! %f8 = 925b1ad8 d7428e9c | |
6304 | bne %xcc,p0_freg_check_fail | |
6305 | mov 0xf08,%g1 | |
6306 | ldx [%g4+0x60],%g3 | |
6307 | std %f12,[%g4] | |
6308 | ldx [%g4],%g2 | |
6309 | cmp %g3,%g2 ! %f12 = 00000000 d9876ee7 | |
6310 | bne %xcc,p0_freg_check_fail | |
6311 | mov 0xf12,%g1 | |
6312 | ldx [%g4+0x68],%g3 | |
6313 | std %f14,[%g4] | |
6314 | ldx [%g4],%g2 | |
6315 | cmp %g3,%g2 ! %f14 = 00000000 ff27ffff | |
6316 | bne %xcc,p0_freg_check_fail | |
6317 | mov 0xf14,%g1 | |
6318 | ldx [%g4+0x70],%g3 | |
6319 | std %f20,[%g4] | |
6320 | ldx [%g4],%g2 | |
6321 | cmp %g3,%g2 ! %f20 = ffffffff ffffffff | |
6322 | bne %xcc,p0_freg_check_fail | |
6323 | mov 0xf20,%g1 | |
6324 | ldx [%g4+0x78],%g3 | |
6325 | std %f22,[%g4] | |
6326 | ldx [%g4],%g2 | |
6327 | cmp %g3,%g2 ! %f22 = 00000000 ff27ffff | |
6328 | bne %xcc,p0_freg_check_fail | |
6329 | mov 0xf22,%g1 | |
6330 | ldx [%g4+0x80],%g3 | |
6331 | std %f28,[%g4] | |
6332 | ldx [%g4],%g2 | |
6333 | cmp %g3,%g2 ! %f28 = 0000005e ffffffff | |
6334 | bne %xcc,p0_freg_check_fail | |
6335 | mov 0xf28,%g1 | |
6336 | ||
6337 | ! Check Point 29 completed | |
6338 | ||
6339 | ||
6340 | p0_label_146: | |
6341 | ! %l6 = ffffffffffffff00, Mem[0000000010081408] = 27ffffff | |
6342 | stba %l6,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00ffffff | |
6343 | ! %l2 = 0000000000000000, Mem[0000000030101408] = ffffffff | |
6344 | stba %l2,[%i4+%o4]0x89 ! Mem[0000000030101408] = ffffff00 | |
6345 | ! %l2 = 0000000000000000, Mem[0000000010101408] = 005e9726ff8a98d7 | |
6346 | stxa %l2,[%i4+%o4]0x80 ! Mem[0000000010101408] = 0000000000000000 | |
6347 | ! %l0 = 0000005e, %l1 = ffffffff, Mem[0000000030001410] = ff000000 9a7a0000 | |
6348 | stda %l0,[%i0+%o5]0x81 ! Mem[0000000030001410] = 0000005e ffffffff | |
6349 | membar #Sync ! Added by membar checker (35) | |
6350 | ! %f12 = 00000000, Mem[00000000100c1410] = ffff27ff | |
6351 | st %f12,[%i3+%o5] ! Mem[00000000100c1410] = 00000000 | |
6352 | ! %l2 = 0000000000000000, Mem[0000000020800000] = ffff0db6 | |
6353 | sth %l2,[%o1+%g0] ! Mem[0000000020800000] = 00000db6 | |
6354 | ! %f22 = 00000000 ff27ffff, Mem[0000000030101410] = 75b99345 9b4329a1 | |
6355 | stda %f22,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00000000 ff27ffff | |
6356 | ! %l6 = ffffff00, %l7 = 120000ff, Mem[00000000100c1410] = 00000000 00000000 | |
6357 | stda %l6,[%i3+%o5]0x80 ! Mem[00000000100c1410] = ffffff00 120000ff | |
6358 | ! Mem[0000000010081400] = ffffffb4, %l2 = 00000000, %l3 = 1a008dff | |
6359 | casa [%i2]0x80,%l2,%l3 ! %l3 = 00000000ffffffb4 | |
6360 | ! Starting 10 instruction Load Burst | |
6361 | ! Mem[00000000100c1408] = 0000005e, %l6 = ffffffffffffff00 | |
6362 | lduha [%i3+%o4]0x80,%l6 ! %l6 = 0000000000000000 | |
6363 | ||
6364 | p0_label_147: | |
6365 | ! Mem[0000000030181400] = d7ffffff 6d1dd03f, %l2 = 00000000, %l3 = ffffffb4 | |
6366 | ldda [%i6+%g0]0x81,%l2 ! %l2 = 00000000d7ffffff 000000006d1dd03f | |
6367 | ! Mem[0000000010081400] = ffffffb4, %l5 = 0000000000000000 | |
6368 | ldsba [%i2+%g0]0x80,%l5 ! %l5 = ffffffffffffffff | |
6369 | ! Mem[0000000021800040] = ceff5e5c, %l3 = 000000006d1dd03f | |
6370 | ldub [%o3+0x041],%l3 ! %l3 = 00000000000000ff | |
6371 | ! Mem[0000000010001408] = 4d072a78, %l3 = 00000000000000ff | |
6372 | lduha [%i0+%o4]0x80,%l3 ! %l3 = 0000000000004d07 | |
6373 | ! Mem[0000000030101410] = 00000000ff27ffff, %f0 = 925b1ad8 d9870000 | |
6374 | ldda [%i4+%o5]0x81,%f0 ! %f0 = 00000000 ff27ffff | |
6375 | ! Mem[0000000010001408] = 4d072a78, %l2 = 00000000d7ffffff | |
6376 | lduba [%i0+%o4]0x80,%l2 ! %l2 = 000000000000004d | |
6377 | ! Mem[0000000010101408] = 0000000000000000, %l5 = ffffffffffffffff | |
6378 | ldxa [%i4+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
6379 | ! Mem[0000000030141400] = ffffffffffffff00, %f18 = 02226c6b 57119e5e | |
6380 | ldda [%i5+%g0]0x89,%f18 ! %f18 = ffffffff ffffff00 | |
6381 | ! Mem[0000000030041410] = 00000000, %l6 = 0000000000000000 | |
6382 | ldswa [%i1+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
6383 | ! Starting 10 instruction Store Burst | |
6384 | ! Mem[0000000010181438] = 00000000, %l5 = 00000000, %l1 = ffffffff | |
6385 | add %i6,0x38,%g1 | |
6386 | casa [%g1]0x80,%l5,%l1 ! %l1 = 0000000000000000 | |
6387 | ||
6388 | p0_label_148: | |
6389 | ! Mem[0000000010181408] = ffffffff, %l7 = 00000000120000ff | |
6390 | ldstuba [%i6+%o4]0x80,%l7 ! %l7 = 000000ff000000ff | |
6391 | ! Mem[0000000010001410] = ff000000, %l5 = 0000000000000000 | |
6392 | ldstuba [%i0+%o5]0x80,%l5 ! %l5 = 000000ff000000ff | |
6393 | ! Mem[000000001000140c] = 00000000, %l7 = 000000ff, %l7 = 000000ff | |
6394 | add %i0,0x0c,%g1 | |
6395 | casa [%g1]0x80,%l7,%l7 ! %l7 = 0000000000000000 | |
6396 | ! Mem[0000000030101408] = 00ffffff, %l7 = 0000000000000000 | |
6397 | ldstuba [%i4+%o4]0x81,%l7 ! %l7 = 00000000000000ff | |
6398 | ! Mem[0000000030101410] = 00000000, %l2 = 000000000000004d | |
6399 | ldstuba [%i4+%o5]0x89,%l2 ! %l2 = 00000000000000ff | |
6400 | ! Mem[0000000010101400] = ff3800000a8d001a, %l3 = 0000000000004d07, %l5 = 00000000000000ff | |
6401 | casxa [%i4]0x80,%l3,%l5 ! %l5 = ff3800000a8d001a | |
6402 | ! %l4 = 00000000d7ffffff, Mem[00000000100c1408] = ffffffff5e000000 | |
6403 | stxa %l4,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000d7ffffff | |
6404 | ! Mem[0000000030181408] = ff072a78, %l7 = 0000000000000000 | |
6405 | ldstuba [%i6+%o4]0x81,%l7 ! %l7 = 000000ff000000ff | |
6406 | ! Mem[00000000100c142a] = c78091bb, %l5 = ff3800000a8d001a | |
6407 | ldstuba [%i3+0x02a]%asi,%l5 ! %l5 = 00000091000000ff | |
6408 | ! Starting 10 instruction Load Burst | |
6409 | ! Mem[00000000211c0000] = fffffe0c, %l0 = 000000000000005e | |
6410 | ldsha [%o2+0x000]%asi,%l0 ! %l0 = ffffffffffffffff | |
6411 | ||
6412 | p0_label_149: | |
6413 | ! Mem[0000000030101400] = ff27ffff, %l0 = ffffffffffffffff | |
6414 | lduwa [%i4+%g0]0x89,%l0 ! %l0 = 00000000ff27ffff | |
6415 | ! Mem[00000000100c1410] = 00ffffff, %l6 = 0000000000000000 | |
6416 | lduwa [%i3+%o5]0x88,%l6 ! %l6 = 0000000000ffffff | |
6417 | ! Mem[00000000100c1410] = ffffff00, %l3 = 0000000000004d07 | |
6418 | ldsha [%i3+%o5]0x80,%l3 ! %l3 = ffffffffffffffff | |
6419 | ! Mem[0000000010081400] = b4ffffff, %f16 = 00000000 | |
6420 | lda [%i2+%g0]0x88,%f16 ! %f16 = b4ffffff | |
6421 | ! Mem[0000000010081408] = ffffff00, %l7 = 00000000000000ff | |
6422 | lduha [%i2+%o4]0x88,%l7 ! %l7 = 000000000000ff00 | |
6423 | ! Mem[0000000010041410] = ed3fd1f8007400ff, %f6 = 02226c6b ff119e5e | |
6424 | ldda [%i1+%o5]0x88,%f6 ! %f6 = ed3fd1f8 007400ff | |
6425 | ! Mem[0000000030141408] = ffff00ffffffffff, %l6 = 0000000000ffffff | |
6426 | ldxa [%i5+%o4]0x81,%l6 ! %l6 = ffff00ffffffffff | |
6427 | ! Mem[0000000010001408] = 4d072a7800000000, %l6 = ffff00ffffffffff | |
6428 | ldxa [%i0+%o4]0x80,%l6 ! %l6 = 4d072a7800000000 | |
6429 | ! Mem[0000000010141410] = 000000ff, %l1 = 0000000000000000 | |
6430 | ldsha [%i5+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
6431 | ! Starting 10 instruction Store Burst | |
6432 | ! Mem[0000000030141400] = ffffff00, %l3 = ffffffffffffffff | |
6433 | swapa [%i5+%g0]0x89,%l3 ! %l3 = 00000000ffffff00 | |
6434 | ||
6435 | p0_label_150: | |
6436 | ! Mem[0000000010081408] = 00ffffff, %l7 = 000000000000ff00 | |
6437 | ldstuba [%i2+%o4]0x80,%l7 ! %l7 = 00000000000000ff | |
6438 | ! %l5 = 0000000000000091, Mem[0000000010001408] = 4d072a78 | |
6439 | stwa %l5,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000091 | |
6440 | ! Mem[0000000010141418] = 00006c6b, %l5 = 0000000000000091 | |
6441 | swap [%i5+0x018],%l5 ! %l5 = 0000000000006c6b | |
6442 | ! %l0 = ff27ffff, %l1 = 000000ff, Mem[0000000010081430] = ffffffca 782a07ff | |
6443 | stda %l0,[%i2+0x030]%asi ! Mem[0000000010081430] = ff27ffff 000000ff | |
6444 | ! Mem[0000000030141410] = 48020700, %l2 = 0000000000000000 | |
6445 | swapa [%i5+%o5]0x89,%l2 ! %l2 = 0000000048020700 | |
6446 | ! %f18 = ffffffff ffffff00, Mem[00000000100c1410] = ffffff00 120000ff | |
6447 | std %f18,[%i3+%o5] ! Mem[00000000100c1410] = ffffffff ffffff00 | |
6448 | ! %f31 = c49410cd, Mem[0000000030041410] = 00000000 | |
6449 | sta %f31,[%i1+%o5]0x81 ! Mem[0000000030041410] = c49410cd | |
6450 | ! %l4 = 00000000d7ffffff, Mem[0000000010001408] = 00000091, %asi = 80 | |
6451 | stha %l4,[%i0+0x008]%asi ! Mem[0000000010001408] = ffff0091 | |
6452 | ! %l4 = 00000000d7ffffff, Mem[0000000030181400] = d7ffffff | |
6453 | stha %l4,[%i6+%g0]0x81 ! Mem[0000000030181400] = ffffffff | |
6454 | ! Starting 10 instruction Load Burst | |
6455 | ! Mem[0000000010181410] = ffb99345, %l2 = 0000000048020700 | |
6456 | lduha [%i6+%o5]0x80,%l2 ! %l2 = 000000000000ffb9 | |
6457 | ||
6458 | ! Check Point 30 for processor 0 | |
6459 | ||
6460 | set p0_check_pt_data_30,%g4 | |
6461 | rd %ccr,%g5 ! %g5 = 44 | |
6462 | ldx [%g4+0x08],%g2 | |
6463 | cmp %l0,%g2 ! %l0 = 00000000ff27ffff | |
6464 | bne %xcc,p0_reg_check_fail0 | |
6465 | mov 0xee0,%g1 | |
6466 | ldx [%g4+0x10],%g2 | |
6467 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
6468 | bne %xcc,p0_reg_check_fail1 | |
6469 | mov 0xee1,%g1 | |
6470 | ldx [%g4+0x18],%g2 | |
6471 | cmp %l2,%g2 ! %l2 = 000000000000ffb9 | |
6472 | bne %xcc,p0_reg_check_fail2 | |
6473 | mov 0xee2,%g1 | |
6474 | ldx [%g4+0x20],%g2 | |
6475 | cmp %l3,%g2 ! %l3 = 00000000ffffff00 | |
6476 | bne %xcc,p0_reg_check_fail3 | |
6477 | mov 0xee3,%g1 | |
6478 | ldx [%g4+0x28],%g2 | |
6479 | cmp %l5,%g2 ! %l5 = 0000000000006c6b | |
6480 | bne %xcc,p0_reg_check_fail5 | |
6481 | mov 0xee5,%g1 | |
6482 | ldx [%g4+0x30],%g2 | |
6483 | cmp %l6,%g2 ! %l6 = 4d072a7800000000 | |
6484 | bne %xcc,p0_reg_check_fail6 | |
6485 | mov 0xee6,%g1 | |
6486 | ldx [%g4+0x38],%g2 | |
6487 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
6488 | bne %xcc,p0_reg_check_fail7 | |
6489 | mov 0xee7,%g1 | |
6490 | ldx [%g4+0x40],%g3 | |
6491 | std %f0,[%g4] | |
6492 | ldx [%g4],%g2 | |
6493 | cmp %g3,%g2 ! %f0 = 00000000 ff27ffff | |
6494 | bne %xcc,p0_freg_check_fail | |
6495 | mov 0xf00,%g1 | |
6496 | ldx [%g4+0x48],%g3 | |
6497 | std %f2,[%g4] | |
6498 | ldx [%g4],%g2 | |
6499 | cmp %g3,%g2 ! %f2 = ffffffff b4ffffff | |
6500 | bne %xcc,p0_freg_check_fail | |
6501 | mov 0xf02,%g1 | |
6502 | ldx [%g4+0x50],%g3 | |
6503 | std %f6,[%g4] | |
6504 | ldx [%g4],%g2 | |
6505 | cmp %g3,%g2 ! %f6 = ed3fd1f8 007400ff | |
6506 | bne %xcc,p0_freg_check_fail | |
6507 | mov 0xf06,%g1 | |
6508 | ldx [%g4+0x58],%g3 | |
6509 | std %f16,[%g4] | |
6510 | ldx [%g4],%g2 | |
6511 | cmp %g3,%g2 ! %f16 = b4ffffff 00000000 | |
6512 | bne %xcc,p0_freg_check_fail | |
6513 | mov 0xf16,%g1 | |
6514 | ldx [%g4+0x60],%g3 | |
6515 | std %f18,[%g4] | |
6516 | ldx [%g4],%g2 | |
6517 | cmp %g3,%g2 ! %f18 = ffffffff ffffff00 | |
6518 | bne %xcc,p0_freg_check_fail | |
6519 | mov 0xf18,%g1 | |
6520 | ||
6521 | ! Check Point 30 completed | |
6522 | ||
6523 | ||
6524 | p0_label_151: | |
6525 | membar #Sync ! Added by membar checker (36) | |
6526 | ! Mem[0000000010181400] = 00000000 00000000 ffffffff ffffffff | |
6527 | ! Mem[0000000010181410] = ffb99345 9b4329a1 5e9e1157 6b6c2202 | |
6528 | ! Mem[0000000010181420] = 3bedac39 d81a5b92 ffffffff 02f1ffff | |
6529 | ! Mem[0000000010181430] = 00007400 00000000 ffffffff ffffff27 | |
6530 | ldda [%i6]ASI_BLK_AIUPL,%f16 ! Block Load from 0000000010181400 | |
6531 | ! Mem[00000000300c1400] = 00000000 d9876ee7, %l0 = ff27ffff, %l1 = 000000ff | |
6532 | ldda [%i3+%g0]0x81,%l0 ! %l0 = 0000000000000000 00000000d9876ee7 | |
6533 | ! Mem[0000000030101410] = 000000ff, %l6 = 4d072a7800000000 | |
6534 | ldsba [%i4+%o5]0x89,%l6 ! %l6 = ffffffffffffffff | |
6535 | ! Mem[0000000030041410] = cd1094c4, %l5 = 0000000000006c6b | |
6536 | lduwa [%i1+%o5]0x89,%l5 ! %l5 = 00000000cd1094c4 | |
6537 | ! Mem[0000000030141410] = 00000000, %l3 = 00000000ffffff00 | |
6538 | lduha [%i5+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
6539 | ! Mem[00000000300c1400] = 00000000, %f10 = e76e87d9 | |
6540 | lda [%i3+%g0]0x81,%f10 ! %f10 = 00000000 | |
6541 | ! Mem[0000000010181408] = ffffffff, %l3 = 0000000000000000 | |
6542 | ldsba [%i6+%o4]0x88,%l3 ! %l3 = ffffffffffffffff | |
6543 | ! Mem[00000000100c1408] = d7ffffff, %f10 = 00000000 | |
6544 | lda [%i3+%o4]0x88,%f10 ! %f10 = d7ffffff | |
6545 | ! Mem[0000000030141410] = 00000000, %l0 = 0000000000000000 | |
6546 | ldswa [%i5+%o5]0x81,%l0 ! %l0 = 0000000000000000 | |
6547 | ! Starting 10 instruction Store Burst | |
6548 | ! Mem[0000000010141410] = 000000ff, %l1 = 00000000d9876ee7 | |
6549 | swapa [%i5+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
6550 | ||
6551 | p0_label_152: | |
6552 | membar #Sync ! Added by membar checker (37) | |
6553 | ! %f14 = 00000000 ff27ffff, Mem[0000000010181400] = 00000000 00000000 | |
6554 | stda %f14,[%i6+%g0]0x88 ! Mem[0000000010181400] = 00000000 ff27ffff | |
6555 | ! %l4 = 00000000d7ffffff, Mem[0000000030081408] = 120000ff | |
6556 | stha %l4,[%i2+%o4]0x89 ! Mem[0000000030081408] = 1200ffff | |
6557 | ! %f9 = d7428e9c, Mem[0000000030001400] = 00000000 | |
6558 | sta %f9 ,[%i0+%g0]0x81 ! Mem[0000000030001400] = d7428e9c | |
6559 | ! Mem[0000000010081408] = ffffffff, %l3 = ffffffffffffffff | |
6560 | ldstuba [%i2+%o4]0x80,%l3 ! %l3 = 000000ff000000ff | |
6561 | ! %l2 = 000000000000ffb9, Mem[0000000030001400] = 9c8e42d7 | |
6562 | stha %l2,[%i0+%g0]0x89 ! Mem[0000000030001400] = 9c8effb9 | |
6563 | ! Mem[0000000030001408] = 00000000, %l6 = ffffffffffffffff | |
6564 | ldstuba [%i0+%o4]0x81,%l6 ! %l6 = 00000000000000ff | |
6565 | ! %f2 = ffffffff b4ffffff, %l5 = 00000000cd1094c4 | |
6566 | ! Mem[0000000030141420] = 925b1ad800000000 | |
6567 | add %i5,0x020,%g1 | |
6568 | stda %f2,[%g1+%l5]ASI_PST32_SL ! Mem[0000000030141420] = 925b1ad800000000 | |
6569 | ! Mem[0000000030101400] = ff27ffff, %l2 = 000000000000ffb9 | |
6570 | swapa [%i4+%g0]0x89,%l2 ! %l2 = 00000000ff27ffff | |
6571 | ! %l4 = d7ffffff, %l5 = cd1094c4, Mem[0000000030001410] = 0000005e ffffffff | |
6572 | stda %l4,[%i0+%o5]0x81 ! Mem[0000000030001410] = d7ffffff cd1094c4 | |
6573 | ! Starting 10 instruction Load Burst | |
6574 | ! Mem[0000000010181438] = ffffffff, %l0 = 0000000000000000 | |
6575 | lduh [%i6+0x038],%l0 ! %l0 = 000000000000ffff | |
6576 | ||
6577 | p0_label_153: | |
6578 | ! Mem[0000000010141400] = ff27ffff f1b600ff, %l6 = 00000000, %l7 = 00000000 | |
6579 | ldda [%i5+%g0]0x80,%l6 ! %l6 = 00000000ff27ffff 00000000f1b600ff | |
6580 | ! Mem[0000000030081408] = ffff0012, %l0 = 000000000000ffff | |
6581 | ldswa [%i2+%o4]0x81,%l0 ! %l0 = ffffffffffff0012 | |
6582 | ! Mem[0000000010141408] = 4d000000, %l0 = ffffffffffff0012 | |
6583 | ldsha [%i5+%o4]0x80,%l0 ! %l0 = 0000000000004d00 | |
6584 | ! Mem[0000000010081408] = ffffffff, %f18 = ffffffff | |
6585 | lda [%i2+%o4]0x88,%f18 ! %f18 = ffffffff | |
6586 | ! Mem[0000000010001410] = 000000ff, %l1 = 00000000000000ff | |
6587 | ldsba [%i0+%o5]0x88,%l1 ! %l1 = ffffffffffffffff | |
6588 | ! Mem[0000000010141418] = 00000091, %l6 = 00000000ff27ffff | |
6589 | ldswa [%i5+0x018]%asi,%l6 ! %l6 = 0000000000000091 | |
6590 | ! Mem[0000000030181408] = ff072a78, %f27 = ffffffff | |
6591 | lda [%i6+%o4]0x81,%f27 ! %f27 = ff072a78 | |
6592 | ! Mem[00000000100c1400] = 00ffffff caffffff ffffffd7 00000000 | |
6593 | ! Mem[00000000100c1410] = ffffffff ffffff00 5e9e11ff 6b6c2202 | |
6594 | ! Mem[00000000100c1420] = 00000000 d81a5b92 c780ffbb d9876ee7 | |
6595 | ! Mem[00000000100c1430] = 7a000000 0000b68a ffffffe0 00000000 | |
6596 | ldda [%i3]ASI_BLK_AIUP,%f0 ! Block Load from 00000000100c1400 | |
6597 | ! Mem[0000000010081410] = 0000ffff, %l1 = ffffffffffffffff | |
6598 | ldsha [%i2+%o5]0x88,%l1 ! %l1 = ffffffffffffffff | |
6599 | ! Starting 10 instruction Store Burst | |
6600 | ! Mem[0000000010101428] = 00740000, %l0 = 0000000000004d00, %asi = 80 | |
6601 | swapa [%i4+0x028]%asi,%l0 ! %l0 = 0000000000740000 | |
6602 | ||
6603 | p0_label_154: | |
6604 | ! Mem[00000000100c1404] = caffffff, %l0 = 00740000, %l2 = ff27ffff | |
6605 | add %i3,0x04,%g1 | |
6606 | casa [%g1]0x80,%l0,%l2 ! %l2 = 00000000caffffff | |
6607 | ! Mem[0000000010101438] = 6e000000, %l7 = 00000000f1b600ff, %asi = 80 | |
6608 | swapa [%i4+0x038]%asi,%l7 ! %l7 = 000000006e000000 | |
6609 | ! %l6 = 00000091, %l7 = 6e000000, Mem[0000000030081410] = d81a5b92 d81a5b92 | |
6610 | stda %l6,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00000091 6e000000 | |
6611 | ! %l5 = 00000000cd1094c4, Mem[0000000030081400] = ffffffff | |
6612 | stha %l5,[%i2+%g0]0x89 ! Mem[0000000030081400] = ffff94c4 | |
6613 | ! Mem[0000000030181408] = 782a07ff, %l4 = 00000000d7ffffff | |
6614 | ldstuba [%i6+%o4]0x89,%l4 ! %l4 = 000000ff000000ff | |
6615 | ! %f19 = ffffffff, Mem[0000000030101408] = ffffffff | |
6616 | sta %f19,[%i4+%o4]0x89 ! Mem[0000000030101408] = ffffffff | |
6617 | ! %f18 = ffffffff ffffffff, Mem[0000000030181400] = ffffffff 3fd01d6d | |
6618 | stda %f18,[%i6+%g0]0x89 ! Mem[0000000030181400] = ffffffff ffffffff | |
6619 | ! Mem[0000000030041400] = 00000000, %l3 = 00000000000000ff | |
6620 | ldstuba [%i1+%g0]0x89,%l3 ! %l3 = 00000000000000ff | |
6621 | ! %l0 = 0000000000740000, Mem[0000000030001400] = b9ff8e9cff000000 | |
6622 | stxa %l0,[%i0+%g0]0x81 ! Mem[0000000030001400] = 0000000000740000 | |
6623 | ! Starting 10 instruction Load Burst | |
6624 | ! Mem[000000001004143c] = 3f787673, %l0 = 0000000000740000 | |
6625 | lduwa [%i1+0x03c]%asi,%l0 ! %l0 = 000000003f787673 | |
6626 | ||
6627 | p0_label_155: | |
6628 | ! Mem[0000000030181410] = 02226c6b57119e5e, %l6 = 0000000000000091 | |
6629 | ldxa [%i6+%o5]0x81,%l6 ! %l6 = 02226c6b57119e5e | |
6630 | ! Mem[00000000211c0000] = fffffe0c, %l2 = 00000000caffffff | |
6631 | ldsha [%o2+0x000]%asi,%l2 ! %l2 = ffffffffffffffff | |
6632 | ! Mem[0000000030001408] = ff000000, %l2 = ffffffffffffffff | |
6633 | lduba [%i0+%o4]0x81,%l2 ! %l2 = 00000000000000ff | |
6634 | ! Mem[0000000030041408] = ffffffff, %l7 = 000000006e000000 | |
6635 | lduha [%i1+%o4]0x89,%l7 ! %l7 = 000000000000ffff | |
6636 | ! Mem[0000000010081410] = ffff0000, %f26 = fffff102 | |
6637 | lda [%i2+%o5]0x80,%f26 ! %f26 = ffff0000 | |
6638 | ! Mem[00000000100c1408] = 00000000d7ffffff, %f22 = 02226c6b 57119e5e | |
6639 | ldda [%i3+%o4]0x88,%f22 ! %f22 = 00000000 d7ffffff | |
6640 | ! Mem[0000000010001408] = ffff009100000000, %l5 = 00000000cd1094c4 | |
6641 | ldxa [%i0+%o4]0x80,%l5 ! %l5 = ffff009100000000 | |
6642 | ! Mem[0000000010181410] = a129439b 4593b9ff, %l6 = 57119e5e, %l7 = 0000ffff | |
6643 | ldda [%i6+%o5]0x88,%l6 ! %l6 = 000000004593b9ff 00000000a129439b | |
6644 | ! Mem[00000000300c1408] = ffffffff, %l5 = ffff009100000000 | |
6645 | lduba [%i3+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
6646 | ! Starting 10 instruction Store Burst | |
6647 | ! Mem[0000000030181408] = ff072a78, %l3 = 0000000000000000 | |
6648 | swapa [%i6+%o4]0x81,%l3 ! %l3 = 00000000ff072a78 | |
6649 | ||
6650 | ! Check Point 31 for processor 0 | |
6651 | ||
6652 | set p0_check_pt_data_31,%g4 | |
6653 | rd %ccr,%g5 ! %g5 = 44 | |
6654 | ldx [%g4+0x08],%g2 | |
6655 | cmp %l0,%g2 ! %l0 = 000000003f787673 | |
6656 | bne %xcc,p0_reg_check_fail0 | |
6657 | mov 0xee0,%g1 | |
6658 | ldx [%g4+0x10],%g2 | |
6659 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
6660 | bne %xcc,p0_reg_check_fail1 | |
6661 | mov 0xee1,%g1 | |
6662 | ldx [%g4+0x18],%g2 | |
6663 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
6664 | bne %xcc,p0_reg_check_fail2 | |
6665 | mov 0xee2,%g1 | |
6666 | ldx [%g4+0x20],%g2 | |
6667 | cmp %l3,%g2 ! %l3 = 00000000ff072a78 | |
6668 | bne %xcc,p0_reg_check_fail3 | |
6669 | mov 0xee3,%g1 | |
6670 | ldx [%g4+0x28],%g2 | |
6671 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
6672 | bne %xcc,p0_reg_check_fail4 | |
6673 | mov 0xee4,%g1 | |
6674 | ldx [%g4+0x30],%g2 | |
6675 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
6676 | bne %xcc,p0_reg_check_fail5 | |
6677 | mov 0xee5,%g1 | |
6678 | ldx [%g4+0x38],%g2 | |
6679 | cmp %l6,%g2 ! %l6 = 000000004593b9ff | |
6680 | bne %xcc,p0_reg_check_fail6 | |
6681 | mov 0xee6,%g1 | |
6682 | ldx [%g4+0x40],%g2 | |
6683 | cmp %l7,%g2 ! %l7 = 00000000a129439b | |
6684 | bne %xcc,p0_reg_check_fail7 | |
6685 | mov 0xee7,%g1 | |
6686 | ldx [%g4+0x48],%g3 | |
6687 | std %f0,[%g4] | |
6688 | ldx [%g4],%g2 | |
6689 | cmp %g3,%g2 ! %f0 = 00ffffff caffffff | |
6690 | bne %xcc,p0_freg_check_fail | |
6691 | mov 0xf00,%g1 | |
6692 | ldx [%g4+0x50],%g3 | |
6693 | std %f2,[%g4] | |
6694 | ldx [%g4],%g2 | |
6695 | cmp %g3,%g2 ! %f2 = ffffffd7 00000000 | |
6696 | bne %xcc,p0_freg_check_fail | |
6697 | mov 0xf02,%g1 | |
6698 | ldx [%g4+0x58],%g3 | |
6699 | std %f4,[%g4] | |
6700 | ldx [%g4],%g2 | |
6701 | cmp %g3,%g2 ! %f4 = ffffffff ffffff00 | |
6702 | bne %xcc,p0_freg_check_fail | |
6703 | mov 0xf04,%g1 | |
6704 | ldx [%g4+0x60],%g3 | |
6705 | std %f6,[%g4] | |
6706 | ldx [%g4],%g2 | |
6707 | cmp %g3,%g2 ! %f6 = 5e9e11ff 6b6c2202 | |
6708 | bne %xcc,p0_freg_check_fail | |
6709 | mov 0xf06,%g1 | |
6710 | ldx [%g4+0x68],%g3 | |
6711 | std %f8,[%g4] | |
6712 | ldx [%g4],%g2 | |
6713 | cmp %g3,%g2 ! %f8 = 00000000 d81a5b92 | |
6714 | bne %xcc,p0_freg_check_fail | |
6715 | mov 0xf08,%g1 | |
6716 | ldx [%g4+0x70],%g3 | |
6717 | std %f10,[%g4] | |
6718 | ldx [%g4],%g2 | |
6719 | cmp %g3,%g2 ! %f10 = c780ffbb d9876ee7 | |
6720 | bne %xcc,p0_freg_check_fail | |
6721 | mov 0xf10,%g1 | |
6722 | ldx [%g4+0x78],%g3 | |
6723 | std %f12,[%g4] | |
6724 | ldx [%g4],%g2 | |
6725 | cmp %g3,%g2 ! %f12 = 7a000000 0000b68a | |
6726 | bne %xcc,p0_freg_check_fail | |
6727 | mov 0xf12,%g1 | |
6728 | ldx [%g4+0x80],%g3 | |
6729 | std %f14,[%g4] | |
6730 | ldx [%g4],%g2 | |
6731 | cmp %g3,%g2 ! %f14 = ffffffe0 00000000 | |
6732 | bne %xcc,p0_freg_check_fail | |
6733 | mov 0xf14,%g1 | |
6734 | ldx [%g4+0x88],%g3 | |
6735 | std %f16,[%g4] | |
6736 | ldx [%g4],%g2 | |
6737 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
6738 | bne %xcc,p0_freg_check_fail | |
6739 | mov 0xf16,%g1 | |
6740 | ldx [%g4+0x90],%g3 | |
6741 | std %f18,[%g4] | |
6742 | ldx [%g4],%g2 | |
6743 | cmp %g3,%g2 ! %f18 = ffffffff ffffffff | |
6744 | bne %xcc,p0_freg_check_fail | |
6745 | mov 0xf18,%g1 | |
6746 | ldx [%g4+0x98],%g3 | |
6747 | std %f20,[%g4] | |
6748 | ldx [%g4],%g2 | |
6749 | cmp %g3,%g2 ! %f20 = a129439b 4593b9ff | |
6750 | bne %xcc,p0_freg_check_fail | |
6751 | mov 0xf20,%g1 | |
6752 | ldx [%g4+0xa0],%g3 | |
6753 | std %f22,[%g4] | |
6754 | ldx [%g4],%g2 | |
6755 | cmp %g3,%g2 ! %f22 = 00000000 d7ffffff | |
6756 | bne %xcc,p0_freg_check_fail | |
6757 | mov 0xf22,%g1 | |
6758 | ldx [%g4+0xa8],%g3 | |
6759 | std %f24,[%g4] | |
6760 | ldx [%g4],%g2 | |
6761 | cmp %g3,%g2 ! %f24 = 925b1ad8 39aced3b | |
6762 | bne %xcc,p0_freg_check_fail | |
6763 | mov 0xf24,%g1 | |
6764 | ldx [%g4+0xb0],%g3 | |
6765 | std %f26,[%g4] | |
6766 | ldx [%g4],%g2 | |
6767 | cmp %g3,%g2 ! %f26 = ffff0000 ff072a78 | |
6768 | bne %xcc,p0_freg_check_fail | |
6769 | mov 0xf26,%g1 | |
6770 | ldx [%g4+0xb8],%g3 | |
6771 | std %f28,[%g4] | |
6772 | ldx [%g4],%g2 | |
6773 | cmp %g3,%g2 ! %f28 = 00000000 00740000 | |
6774 | bne %xcc,p0_freg_check_fail | |
6775 | mov 0xf28,%g1 | |
6776 | ldx [%g4+0xc0],%g3 | |
6777 | std %f30,[%g4] | |
6778 | ldx [%g4],%g2 | |
6779 | cmp %g3,%g2 ! %f30 = 27ffffff ffffffff | |
6780 | bne %xcc,p0_freg_check_fail | |
6781 | mov 0xf30,%g1 | |
6782 | ||
6783 | ! Check Point 31 completed | |
6784 | ||
6785 | ||
6786 | p0_label_156: | |
6787 | membar #Sync ! Added by membar checker (38) | |
6788 | ! Mem[0000000010081400] = ffffffb4 6d1dd03f ffffffff 782a074d | |
6789 | ! Mem[0000000010081410] = ffff0000 007400ff 6e000000 00006300 | |
6790 | ! Mem[0000000010081420] = 00740000 0000007a 1a008d0a a46f7400 | |
6791 | ! Mem[0000000010081430] = ff27ffff 000000ff 0f105c1a e0ffffff | |
6792 | ldda [%i2]ASI_BLK_P,%f0 ! Block Load from 0000000010081400 | |
6793 | ! Mem[0000000010101414] = a309ade0, %l0 = 000000003f787673, %asi = 80 | |
6794 | swapa [%i4+0x014]%asi,%l0 ! %l0 = 00000000a309ade0 | |
6795 | ! Mem[0000000021800101] = ff0e39e7, %l0 = 00000000a309ade0 | |
6796 | ldstub [%o3+0x101],%l0 ! %l0 = 0000000e000000ff | |
6797 | ! %l3 = 00000000ff072a78, Mem[0000000010041400] = ff000000 | |
6798 | stba %l3,[%i1+%g0]0x80 ! Mem[0000000010041400] = 78000000 | |
6799 | ! %l1 = ffffffffffffffff, Mem[0000000030101408] = ffffffff | |
6800 | stwa %l1,[%i4+%o4]0x89 ! Mem[0000000030101408] = ffffffff | |
6801 | ! Mem[0000000010101410] = 00000000, %l6 = 000000004593b9ff | |
6802 | ldstuba [%i4+%o5]0x80,%l6 ! %l6 = 00000000000000ff | |
6803 | ! %f17 = 00000000, Mem[000000001018143c] = ffffff27 | |
6804 | st %f17,[%i6+0x03c] ! Mem[000000001018143c] = 00000000 | |
6805 | ! Mem[0000000010181430] = 00007400, %l0 = 000000000000000e | |
6806 | swap [%i6+0x030],%l0 ! %l0 = 0000000000007400 | |
6807 | ! Mem[0000000021800141] = 5b30f8a0, %l7 = 00000000a129439b | |
6808 | ldstuba [%o3+0x141]%asi,%l7 ! %l7 = 00000030000000ff | |
6809 | ! Starting 10 instruction Load Burst | |
6810 | ! Mem[0000000010001408] = ffff0091, %l7 = 0000000000000030 | |
6811 | swapa [%i0+%o4]0x80,%l7 ! %l7 = 00000000ffff0091 | |
6812 | ||
6813 | p0_label_157: | |
6814 | ! Mem[0000000030141400] = ffffffff, %l1 = ffffffffffffffff | |
6815 | ldsba [%i5+%g0]0x81,%l1 ! %l1 = ffffffffffffffff | |
6816 | ! Mem[00000000100c1408] = d7ffffff, %f20 = a129439b | |
6817 | lda [%i3+%o4]0x88,%f20 ! %f20 = d7ffffff | |
6818 | ! Mem[0000000010041400] = 00000078, %l3 = 00000000ff072a78 | |
6819 | ldswa [%i1+%g0]0x88,%l3 ! %l3 = 0000000000000078 | |
6820 | ! Mem[0000000030141400] = ffffffffffffffff, %l6 = 0000000000000000 | |
6821 | ldxa [%i5+%g0]0x81,%l6 ! %l6 = ffffffffffffffff | |
6822 | ! Mem[0000000010181400] = ffff27ff, %l5 = 00000000000000ff | |
6823 | ldsha [%i6+%g0]0x80,%l5 ! %l5 = ffffffffffffffff | |
6824 | ! Mem[0000000030141408] = ff00ffff, %l3 = 0000000000000078 | |
6825 | ldsba [%i5+%o4]0x89,%l3 ! %l3 = ffffffffffffffff | |
6826 | ! Mem[0000000010181424] = d81a5b92, %l4 = 00000000000000ff | |
6827 | ldswa [%i6+0x024]%asi,%l4 ! %l4 = ffffffffd81a5b92 | |
6828 | ! Mem[000000001018142c] = 02f1ffff, %l7 = 00000000ffff0091 | |
6829 | ldswa [%i6+0x02c]%asi,%l7 ! %l7 = 0000000002f1ffff | |
6830 | ! Mem[0000000030081400] = c494ffffffffffff, %l7 = 0000000002f1ffff | |
6831 | ldxa [%i2+%g0]0x81,%l7 ! %l7 = c494ffffffffffff | |
6832 | ! Starting 10 instruction Store Burst | |
6833 | ! Mem[0000000030141410] = 00000000, %l7 = c494ffffffffffff | |
6834 | swapa [%i5+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
6835 | ||
6836 | p0_label_158: | |
6837 | ! Mem[0000000010001430] = 0f10ff1ae0ffffff, %l1 = ffffffffffffffff, %l5 = ffffffffffffffff | |
6838 | add %i0,0x30,%g1 | |
6839 | casxa [%g1]0x80,%l1,%l5 ! %l5 = 0f10ff1ae0ffffff | |
6840 | ! %l2 = 000000ff, %l3 = ffffffff, Mem[0000000030181408] = 00000000 00000000 | |
6841 | stda %l2,[%i6+%o4]0x89 ! Mem[0000000030181408] = 000000ff ffffffff | |
6842 | ! %l3 = ffffffffffffffff, Mem[0000000030081400] = c494ffff | |
6843 | stba %l3,[%i2+%g0]0x81 ! Mem[0000000030081400] = ff94ffff | |
6844 | ! Mem[00000000201c0000] = cdff1669, %l4 = ffffffffd81a5b92 | |
6845 | ldstub [%o0+%g0],%l4 ! %l4 = 000000cd000000ff | |
6846 | ! %l4 = 00000000000000cd, Mem[0000000030001408] = 000000ff | |
6847 | stba %l4,[%i0+%o4]0x89 ! Mem[0000000030001408] = 000000cd | |
6848 | ! Mem[0000000030001408] = cd000000, %l3 = ffffffffffffffff | |
6849 | lduha [%i0+%o4]0x81,%l3 ! %l3 = 000000000000cd00 | |
6850 | ! %l6 = ffffffffffffffff, Mem[0000000010141410] = ff5b0000d9876ee7 | |
6851 | stxa %l6,[%i5+%o5]0x88 ! Mem[0000000010141410] = ffffffffffffffff | |
6852 | ! %f20 = d7ffffff, Mem[0000000010001414] = d81a5b92 | |
6853 | st %f20,[%i0+0x014] ! Mem[0000000010001414] = d7ffffff | |
6854 | ! %l5 = 0f10ff1ae0ffffff, Mem[0000000021800140] = 5bfff8a0, %asi = 80 | |
6855 | stba %l5,[%o3+0x140]%asi ! Mem[0000000021800140] = fffff8a0 | |
6856 | ! Starting 10 instruction Load Burst | |
6857 | ! Mem[0000000010141408] = 000000000000004d, %f20 = d7ffffff 4593b9ff | |
6858 | ldda [%i5+%o4]0x88,%f20 ! %f20 = 00000000 0000004d | |
6859 | ||
6860 | p0_label_159: | |
6861 | ! Mem[0000000030081400] = ffffffffffff94ff, %l3 = 000000000000cd00 | |
6862 | ldxa [%i2+%g0]0x89,%l3 ! %l3 = ffffffffffff94ff | |
6863 | ! Mem[0000000030101410] = ff000000, %l4 = 00000000000000cd | |
6864 | ldsba [%i4+%o5]0x81,%l4 ! %l4 = ffffffffffffffff | |
6865 | ! Mem[0000000030001400] = 00000000, %l6 = ffffffffffffffff | |
6866 | lduba [%i0+%g0]0x89,%l6 ! %l6 = 0000000000000000 | |
6867 | ! Mem[0000000010181410] = a129439b 4593b9ff, %l4 = ffffffff, %l5 = e0ffffff | |
6868 | ldda [%i6+%o5]0x88,%l4 ! %l4 = 000000004593b9ff 00000000a129439b | |
6869 | ! Mem[0000000010181408] = ffffffff, %l1 = ffffffffffffffff | |
6870 | lduwa [%i6+0x008]%asi,%l1 ! %l1 = 00000000ffffffff | |
6871 | ! Mem[0000000030181408] = 000000ff, %f16 = 00000000 | |
6872 | lda [%i6+%o4]0x89,%f16 ! %f16 = 000000ff | |
6873 | ! Mem[0000000030081410] = 00000091, %l0 = 0000000000007400 | |
6874 | lduba [%i2+%o5]0x89,%l0 ! %l0 = 0000000000000091 | |
6875 | membar #Sync ! Added by membar checker (39) | |
6876 | ! Mem[0000000010141400] = ff27ffff f1b600ff 4d000000 00000000 | |
6877 | ! Mem[0000000010141410] = ffffffff ffffffff 00000091 57119e5e | |
6878 | ! Mem[0000000010141420] = ffffffb4 0000005e 64479a75 bb9180c7 | |
6879 | ! Mem[0000000010141430] = 8ab6e09c 365fc6fa cd1094c4 e46dee46 | |
6880 | ldda [%i5]ASI_BLK_PL,%f0 ! Block Load from 0000000010141400 | |
6881 | ! Mem[0000000010001400] = 925b1ad8 d7428e9c 00000030 00000000 | |
6882 | ! Mem[0000000010001410] = ff000000 d7ffffff d9876ee7 f8d13fed | |
6883 | ! Mem[0000000010001420] = 000000ff ff000000 00000000 a309ade0 | |
6884 | ! Mem[0000000010001430] = 0f10ff1a e0ffffff 00000000 00007a9a | |
6885 | ldda [%i0]ASI_BLK_AIUP,%f16 ! Block Load from 0000000010001400 | |
6886 | ! Starting 10 instruction Store Burst | |
6887 | ! %f12 = fac65f36 9ce0b68a, %l4 = 000000004593b9ff | |
6888 | ! Mem[0000000010101410] = ff0000003f787673 | |
6889 | add %i4,0x010,%g1 | |
6890 | stda %f12,[%g1+%l4]ASI_PST16_PL ! Mem[0000000010101410] = 8ab6e09c365fc6fa | |
6891 | ||
6892 | p0_label_160: | |
6893 | ! Mem[00000000300c1408] = ffffffff, %l2 = 00000000000000ff | |
6894 | swapa [%i3+%o4]0x81,%l2 ! %l2 = 00000000ffffffff | |
6895 | ! Mem[00000000300c1400] = 00000000, %l3 = ffffffffffff94ff | |
6896 | swapa [%i3+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
6897 | ! %f2 = 00000000 0000004d, Mem[0000000030101410] = ff000000 ff27ffff | |
6898 | stda %f2 ,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00000000 0000004d | |
6899 | ! Mem[0000000010041408] = 46ee6de4, %l6 = 0000000000000000 | |
6900 | swapa [%i1+%o4]0x80,%l6 ! %l6 = 0000000046ee6de4 | |
6901 | ! %l6 = 0000000046ee6de4, Mem[0000000010081428] = 1a008d0a, %asi = 80 | |
6902 | stba %l6,[%i2+0x028]%asi ! Mem[0000000010081428] = e4008d0a | |
6903 | ! Mem[000000001010140c] = 00000000, %l0 = 0000000000000091, %asi = 80 | |
6904 | swapa [%i4+0x00c]%asi,%l0 ! %l0 = 0000000000000000 | |
6905 | ! %f4 = ffffffff ffffffff, %l7 = 0000000000000000 | |
6906 | ! Mem[00000000300c1428] = 32e87f5a30df3e11 | |
6907 | add %i3,0x028,%g1 | |
6908 | stda %f4,[%g1+%l7]ASI_PST8_S ! Mem[00000000300c1428] = 32e87f5a30df3e11 | |
6909 | ! Mem[0000000010041425] = d7428e9c, %l6 = 0000000046ee6de4 | |
6910 | ldstub [%i1+0x025],%l6 ! %l6 = 00000042000000ff | |
6911 | ! %l1 = 00000000ffffffff, Mem[0000000010081400] = b4ffffff | |
6912 | stha %l1,[%i2+%g0]0x88 ! Mem[0000000010081400] = b4ffffff | |
6913 | ! Starting 10 instruction Load Burst | |
6914 | ! Mem[0000000010041428] = 3bedac39, %f11 = 759a4764 | |
6915 | ld [%i1+0x028],%f11 ! %f11 = 3bedac39 | |
6916 | ||
6917 | ! Check Point 32 for processor 0 | |
6918 | ||
6919 | set p0_check_pt_data_32,%g4 | |
6920 | rd %ccr,%g5 ! %g5 = 44 | |
6921 | ldx [%g4+0x08],%g2 | |
6922 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
6923 | bne %xcc,p0_reg_check_fail0 | |
6924 | mov 0xee0,%g1 | |
6925 | ldx [%g4+0x10],%g2 | |
6926 | cmp %l1,%g2 ! %l1 = 00000000ffffffff | |
6927 | bne %xcc,p0_reg_check_fail1 | |
6928 | mov 0xee1,%g1 | |
6929 | ldx [%g4+0x18],%g2 | |
6930 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
6931 | bne %xcc,p0_reg_check_fail3 | |
6932 | mov 0xee3,%g1 | |
6933 | ldx [%g4+0x20],%g2 | |
6934 | cmp %l4,%g2 ! %l4 = 000000004593b9ff | |
6935 | bne %xcc,p0_reg_check_fail4 | |
6936 | mov 0xee4,%g1 | |
6937 | ldx [%g4+0x28],%g2 | |
6938 | cmp %l5,%g2 ! %l5 = 00000000a129439b | |
6939 | bne %xcc,p0_reg_check_fail5 | |
6940 | mov 0xee5,%g1 | |
6941 | ldx [%g4+0x30],%g2 | |
6942 | cmp %l6,%g2 ! %l6 = 0000000000000042 | |
6943 | bne %xcc,p0_reg_check_fail6 | |
6944 | mov 0xee6,%g1 | |
6945 | ldx [%g4+0x38],%g2 | |
6946 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
6947 | bne %xcc,p0_reg_check_fail7 | |
6948 | mov 0xee7,%g1 | |
6949 | ldx [%g4+0x40],%g3 | |
6950 | std %f0,[%g4] | |
6951 | ldx [%g4],%g2 | |
6952 | cmp %g3,%g2 ! %f0 = ff00b6f1 ffff27ff | |
6953 | bne %xcc,p0_freg_check_fail | |
6954 | mov 0xf00,%g1 | |
6955 | ldx [%g4+0x48],%g3 | |
6956 | std %f2,[%g4] | |
6957 | ldx [%g4],%g2 | |
6958 | cmp %g3,%g2 ! %f2 = 00000000 0000004d | |
6959 | bne %xcc,p0_freg_check_fail | |
6960 | mov 0xf02,%g1 | |
6961 | ldx [%g4+0x50],%g3 | |
6962 | std %f4,[%g4] | |
6963 | ldx [%g4],%g2 | |
6964 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
6965 | bne %xcc,p0_freg_check_fail | |
6966 | mov 0xf04,%g1 | |
6967 | ldx [%g4+0x58],%g3 | |
6968 | std %f6,[%g4] | |
6969 | ldx [%g4],%g2 | |
6970 | cmp %g3,%g2 ! %f6 = 5e9e1157 91000000 | |
6971 | bne %xcc,p0_freg_check_fail | |
6972 | mov 0xf06,%g1 | |
6973 | ldx [%g4+0x60],%g3 | |
6974 | std %f8,[%g4] | |
6975 | ldx [%g4],%g2 | |
6976 | cmp %g3,%g2 ! %f8 = 5e000000 b4ffffff | |
6977 | bne %xcc,p0_freg_check_fail | |
6978 | mov 0xf08,%g1 | |
6979 | ldx [%g4+0x68],%g3 | |
6980 | std %f10,[%g4] | |
6981 | ldx [%g4],%g2 | |
6982 | cmp %g3,%g2 ! %f10 = c78091bb 3bedac39 | |
6983 | bne %xcc,p0_freg_check_fail | |
6984 | mov 0xf10,%g1 | |
6985 | ldx [%g4+0x70],%g3 | |
6986 | std %f12,[%g4] | |
6987 | ldx [%g4],%g2 | |
6988 | cmp %g3,%g2 ! %f12 = fac65f36 9ce0b68a | |
6989 | bne %xcc,p0_freg_check_fail | |
6990 | mov 0xf12,%g1 | |
6991 | ldx [%g4+0x78],%g3 | |
6992 | std %f14,[%g4] | |
6993 | ldx [%g4],%g2 | |
6994 | cmp %g3,%g2 ! %f14 = 46ee6de4 c49410cd | |
6995 | bne %xcc,p0_freg_check_fail | |
6996 | mov 0xf14,%g1 | |
6997 | ldx [%g4+0x80],%g3 | |
6998 | std %f16,[%g4] | |
6999 | ldx [%g4],%g2 | |
7000 | cmp %g3,%g2 ! %f16 = 925b1ad8 d7428e9c | |
7001 | bne %xcc,p0_freg_check_fail | |
7002 | mov 0xf16,%g1 | |
7003 | ldx [%g4+0x88],%g3 | |
7004 | std %f18,[%g4] | |
7005 | ldx [%g4],%g2 | |
7006 | cmp %g3,%g2 ! %f18 = 00000030 00000000 | |
7007 | bne %xcc,p0_freg_check_fail | |
7008 | mov 0xf18,%g1 | |
7009 | ldx [%g4+0x90],%g3 | |
7010 | std %f20,[%g4] | |
7011 | ldx [%g4],%g2 | |
7012 | cmp %g3,%g2 ! %f20 = ff000000 d7ffffff | |
7013 | bne %xcc,p0_freg_check_fail | |
7014 | mov 0xf20,%g1 | |
7015 | ldx [%g4+0x98],%g3 | |
7016 | std %f22,[%g4] | |
7017 | ldx [%g4],%g2 | |
7018 | cmp %g3,%g2 ! %f22 = d9876ee7 f8d13fed | |
7019 | bne %xcc,p0_freg_check_fail | |
7020 | mov 0xf22,%g1 | |
7021 | ldx [%g4+0xa0],%g3 | |
7022 | std %f24,[%g4] | |
7023 | ldx [%g4],%g2 | |
7024 | cmp %g3,%g2 ! %f24 = 000000ff ff000000 | |
7025 | bne %xcc,p0_freg_check_fail | |
7026 | mov 0xf24,%g1 | |
7027 | ldx [%g4+0xa8],%g3 | |
7028 | std %f26,[%g4] | |
7029 | ldx [%g4],%g2 | |
7030 | cmp %g3,%g2 ! %f26 = 00000000 a309ade0 | |
7031 | bne %xcc,p0_freg_check_fail | |
7032 | mov 0xf26,%g1 | |
7033 | ldx [%g4+0xb0],%g3 | |
7034 | std %f28,[%g4] | |
7035 | ldx [%g4],%g2 | |
7036 | cmp %g3,%g2 ! %f28 = 0f10ff1a e0ffffff | |
7037 | bne %xcc,p0_freg_check_fail | |
7038 | mov 0xf28,%g1 | |
7039 | ldx [%g4+0xb8],%g3 | |
7040 | std %f30,[%g4] | |
7041 | ldx [%g4],%g2 | |
7042 | cmp %g3,%g2 ! %f30 = 00000000 00007a9a | |
7043 | bne %xcc,p0_freg_check_fail | |
7044 | mov 0xf30,%g1 | |
7045 | ||
7046 | ! Check Point 32 completed | |
7047 | ||
7048 | ||
7049 | p0_label_161: | |
7050 | ! Mem[0000000010141400] = ff27fffff1b600ff, %l6 = 0000000000000042 | |
7051 | ldxa [%i5+%g0]0x80,%l6 ! %l6 = ff27fffff1b600ff | |
7052 | membar #Sync ! Added by membar checker (40) | |
7053 | ! %f0 = ff00b6f1, Mem[0000000010141410] = ffffffff | |
7054 | sta %f0 ,[%i5+%o5]0x88 ! Mem[0000000010141410] = ff00b6f1 | |
7055 | ! Mem[0000000010101410] = 9ce0b68a, %l0 = 0000000000000000 | |
7056 | ldsha [%i4+%o5]0x88,%l0 ! %l0 = ffffffffffffb68a | |
7057 | ! Mem[00000000300c1410] = 000074ffc48a98d7, %f4 = ffffffff ffffffff | |
7058 | ldda [%i3+%o5]0x89,%f4 ! %f4 = 000074ff c48a98d7 | |
7059 | ! Mem[0000000030081408] = ffff0012, %l4 = 000000004593b9ff | |
7060 | lduba [%i2+%o4]0x81,%l4 ! %l4 = 00000000000000ff | |
7061 | ! Mem[00000000100c1428] = c780ffbb d9876ee7, %l2 = ffffffff, %l3 = 00000000 | |
7062 | ldd [%i3+0x028],%l2 ! %l2 = 00000000c780ffbb 00000000d9876ee7 | |
7063 | ! Mem[0000000010041408] = 00000000, %l7 = 0000000000000000 | |
7064 | lduwa [%i1+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
7065 | ! Mem[0000000010041408] = 00000000, %l3 = 00000000d9876ee7 | |
7066 | lduba [%i1+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
7067 | ! Mem[00000000100c1408] = 00000000d7ffffff, %f16 = 925b1ad8 d7428e9c | |
7068 | ldda [%i3+%o4]0x88,%f16 ! %f16 = 00000000 d7ffffff | |
7069 | ! Starting 10 instruction Store Burst | |
7070 | ! %l1 = 00000000ffffffff, Mem[0000000030081410] = 00000091 | |
7071 | stwa %l1,[%i2+%o5]0x89 ! Mem[0000000030081410] = ffffffff | |
7072 | ||
7073 | p0_label_162: | |
7074 | ! Mem[0000000010001430] = 0f10ff1a, %f12 = fac65f36 | |
7075 | ld [%i0+0x030],%f12 ! %f12 = 0f10ff1a | |
7076 | ! %l0 = ffffb68a, %l1 = ffffffff, Mem[0000000010001408] = 30000000 00000000 | |
7077 | stda %l0,[%i0+%o4]0x88 ! Mem[0000000010001408] = ffffb68a ffffffff | |
7078 | ! %l1 = 00000000ffffffff, Mem[0000000010101408] = 00000000 | |
7079 | stba %l1,[%i4+%o4]0x80 ! Mem[0000000010101408] = ff000000 | |
7080 | ! Mem[0000000010001408] = ffffb68a, %l5 = 00000000a129439b | |
7081 | swapa [%i0+%o4]0x88,%l5 ! %l5 = 00000000ffffb68a | |
7082 | ! Mem[0000000010041400] = 78000000, %l4 = 00000000000000ff | |
7083 | ldstuba [%i1+%g0]0x80,%l4 ! %l4 = 00000078000000ff | |
7084 | ! Mem[0000000010181410] = 4593b9ff, %l1 = 00000000ffffffff | |
7085 | ldstuba [%i6+%o5]0x88,%l1 ! %l1 = 000000ff000000ff | |
7086 | ! Mem[0000000010041418] = ca93dcbf, %l1 = 00000000000000ff | |
7087 | swap [%i1+0x018],%l1 ! %l1 = 00000000ca93dcbf | |
7088 | ! %f16 = 00000000 d7ffffff 00000030 00000000 | |
7089 | ! %f20 = ff000000 d7ffffff d9876ee7 f8d13fed | |
7090 | ! %f24 = 000000ff ff000000 00000000 a309ade0 | |
7091 | ! %f28 = 0f10ff1a e0ffffff 00000000 00007a9a | |
7092 | stda %f16,[%i2]ASI_BLK_AIUP ! Block Store to 0000000010081400 | |
7093 | ! %l7 = 0000000000000000, Mem[0000000030081410] = ffffffff | |
7094 | stba %l7,[%i2+%o5]0x89 ! Mem[0000000030081410] = ffffff00 | |
7095 | ! Starting 10 instruction Load Burst | |
7096 | ! Mem[0000000010041410] = ff007400, %l1 = 00000000ca93dcbf | |
7097 | ldsha [%i1+%o5]0x80,%l1 ! %l1 = ffffffffffffff00 | |
7098 | ||
7099 | p0_label_163: | |
7100 | ! Mem[0000000010101410] = 9ce0b68a, %f10 = c78091bb | |
7101 | lda [%i4+%o5]0x88,%f10 ! %f10 = 9ce0b68a | |
7102 | ! Mem[0000000010181430] = 0000000e, %l1 = ffffffffffffff00 | |
7103 | lduha [%i6+0x030]%asi,%l1 ! %l1 = 0000000000000000 | |
7104 | ! Mem[0000000010181410] = a129439b4593b9ff, %l0 = ffffffffffffb68a | |
7105 | ldxa [%i6+%o5]0x88,%l0 ! %l0 = a129439b4593b9ff | |
7106 | ! Mem[0000000020800040] = 00ff9ffa, %l3 = 0000000000000000 | |
7107 | ldsb [%o1+0x041],%l3 ! %l3 = ffffffffffffffff | |
7108 | ! Mem[0000000010041400] = 00000000000000ff, %l1 = 0000000000000000 | |
7109 | ldxa [%i1+%g0]0x88,%l1 ! %l1 = 00000000000000ff | |
7110 | ! Mem[0000000030081400] = ffff94ff, %l5 = 00000000ffffb68a | |
7111 | lduha [%i2+%g0]0x89,%l5 ! %l5 = 00000000000094ff | |
7112 | ! Mem[0000000030101410] = 00000000, %l3 = ffffffffffffffff | |
7113 | ldsha [%i4+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
7114 | ! Mem[00000000300c1400] = ff94ffff, %l4 = 0000000000000078 | |
7115 | lduwa [%i3+%g0]0x89,%l4 ! %l4 = 00000000ff94ffff | |
7116 | ! Mem[0000000020800040] = 00ff9ffa, %l5 = 00000000000094ff | |
7117 | ldsha [%o1+0x040]%asi,%l5 ! %l5 = 00000000000000ff | |
7118 | ! Starting 10 instruction Store Burst | |
7119 | ! Mem[00000000100c1408] = d7ffffff, %l1 = 00000000000000ff | |
7120 | ldstuba [%i3+%o4]0x88,%l1 ! %l1 = 000000ff000000ff | |
7121 | ||
7122 | p0_label_164: | |
7123 | ! %l4 = 00000000ff94ffff, Mem[0000000030181408] = ff000000ffffffff | |
7124 | stxa %l4,[%i6+%o4]0x81 ! Mem[0000000030181408] = 00000000ff94ffff | |
7125 | ! %f0 = ff00b6f1 ffff27ff 00000000 0000004d | |
7126 | ! %f4 = 000074ff c48a98d7 5e9e1157 91000000 | |
7127 | ! %f8 = 5e000000 b4ffffff 9ce0b68a 3bedac39 | |
7128 | ! %f12 = 0f10ff1a 9ce0b68a 46ee6de4 c49410cd | |
7129 | stda %f0,[%i1]ASI_BLK_PL ! Block Store to 0000000010041400 | |
7130 | ! %f30 = 00000000 00007a9a, Mem[0000000030181400] = ffffffff ffffffff | |
7131 | stda %f30,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00000000 00007a9a | |
7132 | ! %f20 = ff000000 d7ffffff, Mem[0000000010181410] = 4593b9ff a129439b | |
7133 | stda %f20,[%i6+%o5]0x88 ! Mem[0000000010181410] = ff000000 d7ffffff | |
7134 | ! Mem[000000001018143a] = ffffffff, %l4 = 00000000ff94ffff | |
7135 | ldstuba [%i6+0x03a]%asi,%l4 ! %l4 = 000000ff000000ff | |
7136 | ! %l6 = ff27fffff1b600ff, Mem[0000000030041410] = c49410cd000000ff | |
7137 | stxa %l6,[%i1+%o5]0x81 ! Mem[0000000030041410] = ff27fffff1b600ff | |
7138 | ! %l4 = 00000000000000ff, Mem[0000000010101400] = ff380000, %asi = 80 | |
7139 | stwa %l4,[%i4+0x000]%asi ! Mem[0000000010101400] = 000000ff | |
7140 | ! %l5 = 00000000000000ff, Mem[0000000010041408] = 4d00000000000000 | |
7141 | stxa %l5,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00000000000000ff | |
7142 | ! %l6 = ff27fffff1b600ff, Mem[00000000100c1408] = d7ffffff | |
7143 | stba %l6,[%i3+%o4]0x88 ! Mem[00000000100c1408] = d7ffffff | |
7144 | ! Starting 10 instruction Load Burst | |
7145 | ! Mem[0000000030081400] = ff94ffff, %f30 = 00000000 | |
7146 | lda [%i2+%g0]0x81,%f30 ! %f30 = ff94ffff | |
7147 | ||
7148 | p0_label_165: | |
7149 | ! Mem[0000000030001408] = cd000000, %l3 = 0000000000000000 | |
7150 | lduwa [%i0+%o4]0x81,%l3 ! %l3 = 00000000cd000000 | |
7151 | ! Mem[00000000218001c0] = 9623fa38, %l6 = ff27fffff1b600ff | |
7152 | lduha [%o3+0x1c0]%asi,%l6 ! %l6 = 0000000000009623 | |
7153 | ! Mem[0000000030001410] = c49410cd ffffffd7, %l2 = c780ffbb, %l3 = cd000000 | |
7154 | ldda [%i0+%o5]0x89,%l2 ! %l2 = 00000000ffffffd7 00000000c49410cd | |
7155 | ! Mem[0000000010101438] = f1b600ff, %l2 = 00000000ffffffd7 | |
7156 | lduha [%i4+0x03a]%asi,%l2 ! %l2 = 00000000000000ff | |
7157 | ! Mem[0000000010181410] = ff000000d7ffffff, %l7 = 0000000000000000 | |
7158 | ldxa [%i6+%o5]0x88,%l7 ! %l7 = ff000000d7ffffff | |
7159 | ! Mem[0000000030141400] = ffffffff, %l6 = 0000000000009623 | |
7160 | lduha [%i5+%g0]0x89,%l6 ! %l6 = 000000000000ffff | |
7161 | ! Mem[0000000010181418] = 5e9e1157, %l7 = ff000000d7ffffff | |
7162 | lduha [%i6+0x018]%asi,%l7 ! %l7 = 0000000000005e9e | |
7163 | ! Mem[0000000030141410] = ffffffff, %l6 = 000000000000ffff | |
7164 | ldswa [%i5+%o5]0x81,%l6 ! %l6 = ffffffffffffffff | |
7165 | ! Mem[0000000030041410] = ff27ffff, %f23 = f8d13fed | |
7166 | lda [%i1+%o5]0x81,%f23 ! %f23 = ff27ffff | |
7167 | ! Starting 10 instruction Store Burst | |
7168 | ! Mem[00000000300c1400] = ff94ffff, %l6 = ffffffffffffffff | |
7169 | swapa [%i3+%g0]0x89,%l6 ! %l6 = 00000000ff94ffff | |
7170 | ||
7171 | ! Check Point 33 for processor 0 | |
7172 | ||
7173 | set p0_check_pt_data_33,%g4 | |
7174 | rd %ccr,%g5 ! %g5 = 44 | |
7175 | ldx [%g4+0x08],%g2 | |
7176 | cmp %l0,%g2 ! %l0 = a129439b4593b9ff | |
7177 | bne %xcc,p0_reg_check_fail0 | |
7178 | mov 0xee0,%g1 | |
7179 | ldx [%g4+0x10],%g2 | |
7180 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
7181 | bne %xcc,p0_reg_check_fail1 | |
7182 | mov 0xee1,%g1 | |
7183 | ldx [%g4+0x18],%g2 | |
7184 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
7185 | bne %xcc,p0_reg_check_fail2 | |
7186 | mov 0xee2,%g1 | |
7187 | ldx [%g4+0x20],%g2 | |
7188 | cmp %l3,%g2 ! %l3 = 00000000c49410cd | |
7189 | bne %xcc,p0_reg_check_fail3 | |
7190 | mov 0xee3,%g1 | |
7191 | ldx [%g4+0x28],%g2 | |
7192 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
7193 | bne %xcc,p0_reg_check_fail4 | |
7194 | mov 0xee4,%g1 | |
7195 | ldx [%g4+0x30],%g2 | |
7196 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
7197 | bne %xcc,p0_reg_check_fail5 | |
7198 | mov 0xee5,%g1 | |
7199 | ldx [%g4+0x38],%g2 | |
7200 | cmp %l6,%g2 ! %l6 = 00000000ff94ffff | |
7201 | bne %xcc,p0_reg_check_fail6 | |
7202 | mov 0xee6,%g1 | |
7203 | ldx [%g4+0x40],%g2 | |
7204 | cmp %l7,%g2 ! %l7 = 0000000000005e9e | |
7205 | bne %xcc,p0_reg_check_fail7 | |
7206 | mov 0xee7,%g1 | |
7207 | ldx [%g4+0x48],%g3 | |
7208 | std %f2,[%g4] | |
7209 | ldx [%g4],%g2 | |
7210 | cmp %g3,%g2 ! %f2 = 00000000 0000004d | |
7211 | bne %xcc,p0_freg_check_fail | |
7212 | mov 0xf02,%g1 | |
7213 | ldx [%g4+0x50],%g3 | |
7214 | std %f4,[%g4] | |
7215 | ldx [%g4],%g2 | |
7216 | cmp %g3,%g2 ! %f4 = 000074ff c48a98d7 | |
7217 | bne %xcc,p0_freg_check_fail | |
7218 | mov 0xf04,%g1 | |
7219 | ldx [%g4+0x58],%g3 | |
7220 | std %f10,[%g4] | |
7221 | ldx [%g4],%g2 | |
7222 | cmp %g3,%g2 ! %f10 = 9ce0b68a 3bedac39 | |
7223 | bne %xcc,p0_freg_check_fail | |
7224 | mov 0xf10,%g1 | |
7225 | ldx [%g4+0x60],%g3 | |
7226 | std %f12,[%g4] | |
7227 | ldx [%g4],%g2 | |
7228 | cmp %g3,%g2 ! %f12 = 0f10ff1a 9ce0b68a | |
7229 | bne %xcc,p0_freg_check_fail | |
7230 | mov 0xf12,%g1 | |
7231 | ldx [%g4+0x68],%g3 | |
7232 | std %f16,[%g4] | |
7233 | ldx [%g4],%g2 | |
7234 | cmp %g3,%g2 ! %f16 = 00000000 d7ffffff | |
7235 | bne %xcc,p0_freg_check_fail | |
7236 | mov 0xf16,%g1 | |
7237 | ldx [%g4+0x70],%g3 | |
7238 | std %f22,[%g4] | |
7239 | ldx [%g4],%g2 | |
7240 | cmp %g3,%g2 ! %f22 = d9876ee7 ff27ffff | |
7241 | bne %xcc,p0_freg_check_fail | |
7242 | mov 0xf22,%g1 | |
7243 | ldx [%g4+0x78],%g3 | |
7244 | std %f30,[%g4] | |
7245 | ldx [%g4],%g2 | |
7246 | cmp %g3,%g2 ! %f30 = ff94ffff 00007a9a | |
7247 | bne %xcc,p0_freg_check_fail | |
7248 | mov 0xf30,%g1 | |
7249 | ||
7250 | ! Check Point 33 completed | |
7251 | ||
7252 | ||
7253 | p0_label_166: | |
7254 | ! Mem[0000000010101410] = 9ce0b68a, %l1 = 00000000000000ff | |
7255 | ldstuba [%i4+%o5]0x88,%l1 ! %l1 = 0000008a000000ff | |
7256 | ! %f30 = ff94ffff 00007a9a, Mem[0000000030041400] = 000000ff 00000000 | |
7257 | stda %f30,[%i1+%g0]0x89 ! Mem[0000000030041400] = ff94ffff 00007a9a | |
7258 | ! %l5 = 00000000000000ff, Mem[0000000030001408] = cd00000000740000 | |
7259 | stxa %l5,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000000000ff | |
7260 | ! Mem[0000000030081408] = ffff0012, %l2 = 00000000000000ff | |
7261 | ldstuba [%i2+%o4]0x81,%l2 ! %l2 = 000000ff000000ff | |
7262 | ! Mem[00000000300c1410] = c48a98d7, %l2 = 00000000000000ff | |
7263 | ldstuba [%i3+%o5]0x89,%l2 ! %l2 = 000000d7000000ff | |
7264 | ! Mem[0000000030181400] = 00000000, %l0 = a129439b4593b9ff | |
7265 | ldstuba [%i6+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
7266 | ! %f30 = ff94ffff 00007a9a, Mem[0000000010041408] = 00000000 000000ff | |
7267 | stda %f30,[%i1+%o4]0x80 ! Mem[0000000010041408] = ff94ffff 00007a9a | |
7268 | ! %l5 = 00000000000000ff, Mem[00000000100c1400] = 00ffffff | |
7269 | stwa %l5,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 000000ff | |
7270 | ! %l6 = 00000000ff94ffff, Mem[0000000010001400] = 925b1ad8 | |
7271 | stha %l6,[%i0+%g0]0x80 ! Mem[0000000010001400] = ffff1ad8 | |
7272 | ! Starting 10 instruction Load Burst | |
7273 | ! Mem[0000000010181400] = ffff27ff, %l1 = 000000000000008a | |
7274 | ldstuba [%i6+%g0]0x80,%l1 ! %l1 = 000000ff000000ff | |
7275 | ||
7276 | p0_label_167: | |
7277 | membar #Sync ! Added by membar checker (41) | |
7278 | ! Mem[0000000010041400] = ff27ffff, %l3 = 00000000c49410cd | |
7279 | ldsha [%i1+%g0]0x80,%l3 ! %l3 = ffffffffffffff27 | |
7280 | ! Mem[0000000010081434] = e0ffffff, %l4 = 00000000000000ff | |
7281 | lduw [%i2+0x034],%l4 ! %l4 = 00000000e0ffffff | |
7282 | ! Mem[0000000030141410] = e0ffff1effffffff, %f2 = 00000000 0000004d | |
7283 | ldda [%i5+%o5]0x89,%f2 ! %f2 = e0ffff1e ffffffff | |
7284 | ! Mem[0000000010041400] = ff27ffff, %l5 = 00000000000000ff | |
7285 | ldsba [%i1+%g0]0x80,%l5 ! %l5 = ffffffffffffffff | |
7286 | ! Mem[0000000030141400] = ffffffff, %l7 = 0000000000005e9e | |
7287 | lduba [%i5+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
7288 | ! Mem[00000000100c142c] = d9876ee7, %f22 = d9876ee7 | |
7289 | lda [%i3+0x02c]%asi,%f22 ! %f22 = d9876ee7 | |
7290 | ! Mem[0000000030081410] = 00ffffff, %l1 = 00000000000000ff | |
7291 | ldsha [%i2+%o5]0x81,%l1 ! %l1 = 00000000000000ff | |
7292 | ! Mem[0000000010101410] = fac65f369ce0b6ff, %f10 = 9ce0b68a 3bedac39 | |
7293 | ldda [%i4+%o5]0x88,%f10 ! %f10 = fac65f36 9ce0b6ff | |
7294 | ! Mem[0000000010101410] = ffb6e09c365fc6fa, %f2 = e0ffff1e ffffffff | |
7295 | ldda [%i4+%o5]0x80,%f2 ! %f2 = ffb6e09c 365fc6fa | |
7296 | ! Starting 10 instruction Store Burst | |
7297 | ! Mem[000000001018141c] = 6b6c2202, %l2 = 00000000000000d7 | |
7298 | swap [%i6+0x01c],%l2 ! %l2 = 000000006b6c2202 | |
7299 | ||
7300 | p0_label_168: | |
7301 | ! Mem[00000000300c1408] = 000000ff, %l0 = 0000000000000000 | |
7302 | swapa [%i3+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
7303 | ! Mem[0000000030101400] = b9ff0000, %l6 = 00000000ff94ffff | |
7304 | ldstuba [%i4+%g0]0x81,%l6 ! %l6 = 000000b9000000ff | |
7305 | ! %f26 = 00000000 a309ade0, %l1 = 00000000000000ff | |
7306 | ! Mem[0000000010141400] = ff27fffff1b600ff | |
7307 | stda %f26,[%i5+%l1]ASI_PST32_PL ! Mem[0000000010141400] = e0ad09a300000000 | |
7308 | ! %f24 = 000000ff ff000000, %l3 = ffffffffffffff27 | |
7309 | ! Mem[00000000300c1420] = faac1c9cb16e901c | |
7310 | add %i3,0x020,%g1 | |
7311 | stda %f24,[%g1+%l3]ASI_PST8_SL ! Mem[00000000300c1420] = 0000009cb100901c | |
7312 | ! Mem[0000000030101400] = 0000ffff, %l7 = 00000000000000ff | |
7313 | swapa [%i4+%g0]0x89,%l7 ! %l7 = 000000000000ffff | |
7314 | ! %l4 = 00000000e0ffffff, Mem[00000000100c1408] = ffffffd700000000 | |
7315 | stxa %l4,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00000000e0ffffff | |
7316 | ! %f11 = 9ce0b6ff, Mem[0000000010001408] = a129439b | |
7317 | sta %f11,[%i0+%o4]0x88 ! Mem[0000000010001408] = 9ce0b6ff | |
7318 | ! Mem[0000000010041410] = c48a98d7, %l4 = 00000000e0ffffff | |
7319 | swapa [%i1+%o5]0x88,%l4 ! %l4 = 00000000c48a98d7 | |
7320 | ! %f22 = d9876ee7 ff27ffff, %l2 = 000000006b6c2202 | |
7321 | ! Mem[0000000010081438] = 0000000000007a9a | |
7322 | add %i2,0x038,%g1 | |
7323 | stda %f22,[%g1+%l2]ASI_PST8_PL ! Mem[0000000010081438] = 00ff000000007a9a | |
7324 | ! Starting 10 instruction Load Burst | |
7325 | ! Mem[00000000100c1400] = ffffffcaff000000, %l5 = ffffffffffffffff | |
7326 | ldxa [%i3+%g0]0x88,%l5 ! %l5 = ffffffcaff000000 | |
7327 | ||
7328 | p0_label_169: | |
7329 | ! Mem[0000000010081410] = ff000000, %l6 = 00000000000000b9 | |
7330 | ldsba [%i2+0x012]%asi,%l6 ! %l6 = 0000000000000000 | |
7331 | ! Mem[0000000030101410] = 00000000, %l6 = 0000000000000000 | |
7332 | ldswa [%i4+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
7333 | ! Mem[0000000030041408] = ffffffff, %l5 = ffffffcaff000000 | |
7334 | lduba [%i1+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
7335 | ! Mem[0000000030041408] = ffffffff, %l3 = ffffffffffffff27 | |
7336 | ldswa [%i1+%o4]0x81,%l3 ! %l3 = ffffffffffffffff | |
7337 | ! Mem[0000000010041424] = 0000005e, %l2 = 000000006b6c2202 | |
7338 | lduh [%i1+0x026],%l2 ! %l2 = 000000000000005e | |
7339 | ! Mem[0000000010001410] = ff000000, %l3 = ffffffffffffffff | |
7340 | ldswa [%i0+%o5]0x80,%l3 ! %l3 = ffffffffff000000 | |
7341 | ! Mem[0000000010101434] = 46c07bfa, %l2 = 000000000000005e | |
7342 | ldsha [%i4+0x034]%asi,%l2 ! %l2 = 00000000000046c0 | |
7343 | membar #Sync ! Added by membar checker (42) | |
7344 | ! Mem[00000000100c1400] = 000000ff caffffff 00000000 e0ffffff | |
7345 | ! Mem[00000000100c1410] = ffffffff ffffff00 5e9e11ff 6b6c2202 | |
7346 | ! Mem[00000000100c1420] = 00000000 d81a5b92 c780ffbb d9876ee7 | |
7347 | ! Mem[00000000100c1430] = 7a000000 0000b68a ffffffe0 00000000 | |
7348 | ldda [%i3]ASI_BLK_P,%f0 ! Block Load from 00000000100c1400 | |
7349 | ! Mem[0000000030181410] = 5e9e11576b6c2202, %f30 = ff94ffff 00007a9a | |
7350 | ldda [%i6+%o5]0x89,%f30 ! %f30 = 5e9e1157 6b6c2202 | |
7351 | ! Starting 10 instruction Store Burst | |
7352 | ! Mem[0000000030001408] = 00000000, %l1 = 00000000000000ff | |
7353 | swapa [%i0+%o4]0x81,%l1 ! %l1 = 0000000000000000 | |
7354 | ||
7355 | p0_label_170: | |
7356 | ! %f28 = 0f10ff1a e0ffffff, %l2 = 00000000000046c0 | |
7357 | ! Mem[0000000010101428] = 00004d000000007a | |
7358 | add %i4,0x028,%g1 | |
7359 | stda %f28,[%g1+%l2]ASI_PST16_PL ! Mem[0000000010101428] = 00004d000000007a | |
7360 | ! Mem[0000000010141410] = f1b600ff, %l5 = 00000000000000ff | |
7361 | ldstub [%i5+%o5],%l5 ! %l5 = 000000f1000000ff | |
7362 | ! Mem[00000000300c1410] = c48a98ff, %l7 = 000000000000ffff | |
7363 | swapa [%i3+%o5]0x89,%l7 ! %l7 = 00000000c48a98ff | |
7364 | ! %l3 = ffffffffff000000, Mem[0000000030041410] = ffff27ff | |
7365 | stha %l3,[%i1+%o5]0x89 ! Mem[0000000030041410] = ffff0000 | |
7366 | ! %f27 = a309ade0, Mem[0000000010181400] = ffff27ff | |
7367 | sta %f27,[%i6+%g0]0x80 ! Mem[0000000010181400] = a309ade0 | |
7368 | ! Mem[000000001008140c] = 00000000, %l0 = 00000000000000ff | |
7369 | swap [%i2+0x00c],%l0 ! %l0 = 0000000000000000 | |
7370 | ! Mem[00000000100c1408] = 00000000, %l2 = 00000000000046c0 | |
7371 | swapa [%i3+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
7372 | ! Mem[0000000021800081] = ddff0b33, %l4 = 00000000c48a98d7 | |
7373 | ldstub [%o3+0x081],%l4 ! %l4 = 000000ff000000ff | |
7374 | ! Mem[0000000010181424] = d81a5b92, %l3 = ffffffffff000000 | |
7375 | swap [%i6+0x024],%l3 ! %l3 = 00000000d81a5b92 | |
7376 | ! Starting 10 instruction Load Burst | |
7377 | ! Mem[000000001014140c] = 00000000, %l5 = 00000000000000f1 | |
7378 | ldsb [%i5+0x00e],%l5 ! %l5 = 0000000000000000 | |
7379 | ||
7380 | ! Check Point 34 for processor 0 | |
7381 | ||
7382 | set p0_check_pt_data_34,%g4 | |
7383 | rd %ccr,%g5 ! %g5 = 44 | |
7384 | ldx [%g4+0x08],%g2 | |
7385 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
7386 | bne %xcc,p0_reg_check_fail0 | |
7387 | mov 0xee0,%g1 | |
7388 | ldx [%g4+0x10],%g2 | |
7389 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
7390 | bne %xcc,p0_reg_check_fail1 | |
7391 | mov 0xee1,%g1 | |
7392 | ldx [%g4+0x18],%g2 | |
7393 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
7394 | bne %xcc,p0_reg_check_fail2 | |
7395 | mov 0xee2,%g1 | |
7396 | ldx [%g4+0x20],%g2 | |
7397 | cmp %l3,%g2 ! %l3 = 00000000d81a5b92 | |
7398 | bne %xcc,p0_reg_check_fail3 | |
7399 | mov 0xee3,%g1 | |
7400 | ldx [%g4+0x28],%g2 | |
7401 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
7402 | bne %xcc,p0_reg_check_fail4 | |
7403 | mov 0xee4,%g1 | |
7404 | ldx [%g4+0x30],%g2 | |
7405 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
7406 | bne %xcc,p0_reg_check_fail5 | |
7407 | mov 0xee5,%g1 | |
7408 | ldx [%g4+0x38],%g2 | |
7409 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
7410 | bne %xcc,p0_reg_check_fail6 | |
7411 | mov 0xee6,%g1 | |
7412 | ldx [%g4+0x40],%g2 | |
7413 | cmp %l7,%g2 ! %l7 = 00000000c48a98ff | |
7414 | bne %xcc,p0_reg_check_fail7 | |
7415 | mov 0xee7,%g1 | |
7416 | ldx [%g4+0x48],%g3 | |
7417 | std %f0,[%g4] | |
7418 | ldx [%g4],%g2 | |
7419 | cmp %g3,%g2 ! %f0 = 000000ff caffffff | |
7420 | bne %xcc,p0_freg_check_fail | |
7421 | mov 0xf00,%g1 | |
7422 | ldx [%g4+0x50],%g3 | |
7423 | std %f2,[%g4] | |
7424 | ldx [%g4],%g2 | |
7425 | cmp %g3,%g2 ! %f2 = 00000000 e0ffffff | |
7426 | bne %xcc,p0_freg_check_fail | |
7427 | mov 0xf02,%g1 | |
7428 | ldx [%g4+0x58],%g3 | |
7429 | std %f4,[%g4] | |
7430 | ldx [%g4],%g2 | |
7431 | cmp %g3,%g2 ! %f4 = ffffffff ffffff00 | |
7432 | bne %xcc,p0_freg_check_fail | |
7433 | mov 0xf04,%g1 | |
7434 | ldx [%g4+0x60],%g3 | |
7435 | std %f6,[%g4] | |
7436 | ldx [%g4],%g2 | |
7437 | cmp %g3,%g2 ! %f6 = 5e9e11ff 6b6c2202 | |
7438 | bne %xcc,p0_freg_check_fail | |
7439 | mov 0xf06,%g1 | |
7440 | ldx [%g4+0x68],%g3 | |
7441 | std %f8,[%g4] | |
7442 | ldx [%g4],%g2 | |
7443 | cmp %g3,%g2 ! %f8 = 00000000 d81a5b92 | |
7444 | bne %xcc,p0_freg_check_fail | |
7445 | mov 0xf08,%g1 | |
7446 | ldx [%g4+0x70],%g3 | |
7447 | std %f10,[%g4] | |
7448 | ldx [%g4],%g2 | |
7449 | cmp %g3,%g2 ! %f10 = c780ffbb d9876ee7 | |
7450 | bne %xcc,p0_freg_check_fail | |
7451 | mov 0xf10,%g1 | |
7452 | ldx [%g4+0x78],%g3 | |
7453 | std %f12,[%g4] | |
7454 | ldx [%g4],%g2 | |
7455 | cmp %g3,%g2 ! %f12 = 7a000000 0000b68a | |
7456 | bne %xcc,p0_freg_check_fail | |
7457 | mov 0xf12,%g1 | |
7458 | ldx [%g4+0x80],%g3 | |
7459 | std %f14,[%g4] | |
7460 | ldx [%g4],%g2 | |
7461 | cmp %g3,%g2 ! %f14 = ffffffe0 00000000 | |
7462 | bne %xcc,p0_freg_check_fail | |
7463 | mov 0xf14,%g1 | |
7464 | ldx [%g4+0x88],%g3 | |
7465 | std %f22,[%g4] | |
7466 | ldx [%g4],%g2 | |
7467 | cmp %g3,%g2 ! %f22 = d9876ee7 ff27ffff | |
7468 | bne %xcc,p0_freg_check_fail | |
7469 | mov 0xf22,%g1 | |
7470 | ldx [%g4+0x90],%g3 | |
7471 | std %f30,[%g4] | |
7472 | ldx [%g4],%g2 | |
7473 | cmp %g3,%g2 ! %f30 = 5e9e1157 6b6c2202 | |
7474 | bne %xcc,p0_freg_check_fail | |
7475 | mov 0xf30,%g1 | |
7476 | ||
7477 | ! Check Point 34 completed | |
7478 | ||
7479 | ||
7480 | p0_label_171: | |
7481 | ! Mem[0000000030101410] = 00000000, %l4 = 00000000000000ff | |
7482 | ldsba [%i4+%o5]0x81,%l4 ! %l4 = 0000000000000000 | |
7483 | ! Mem[0000000010141408] = 0000004d, %f28 = 0f10ff1a | |
7484 | lda [%i5+%o4]0x88,%f28 ! %f28 = 0000004d | |
7485 | ! Mem[0000000010041428] = 39aced3b, %l4 = 0000000000000000 | |
7486 | lduha [%i1+0x02a]%asi,%l4 ! %l4 = 000000000000ed3b | |
7487 | ! Mem[00000000211c0000] = fffffe0c, %l3 = 00000000d81a5b92 | |
7488 | lduba [%o2+0x000]%asi,%l3 ! %l3 = 00000000000000ff | |
7489 | ! Mem[0000000030101410] = 000000000000004d, %l4 = 000000000000ed3b | |
7490 | ldxa [%i4+%o5]0x81,%l4 ! %l4 = 000000000000004d | |
7491 | ! Mem[0000000010181410] = d7ffffff, %l4 = 000000000000004d | |
7492 | ldstuba [%i6+%o5]0x88,%l4 ! %l4 = 000000ff000000ff | |
7493 | ! Mem[0000000030181410] = 02226c6b, %f16 = 00000000 | |
7494 | lda [%i6+%o5]0x81,%f16 ! %f16 = 02226c6b | |
7495 | ! Mem[0000000010081400] = 00000000, %l4 = 00000000000000ff | |
7496 | lduha [%i2+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
7497 | ! Mem[00000000201c0000] = ffff1669, %l6 = 0000000000000000 | |
7498 | ldsha [%o0+0x000]%asi,%l6 ! %l6 = ffffffffffffffff | |
7499 | ! Starting 10 instruction Store Burst | |
7500 | ! %l6 = ffffffffffffffff, Mem[0000000010041410] = e0ffffff | |
7501 | stba %l6,[%i1+%o5]0x88 ! Mem[0000000010041410] = e0ffffff | |
7502 | ||
7503 | p0_label_172: | |
7504 | ! %l1 = 0000000000000000, Mem[0000000030081408] = f102aa771200ffff | |
7505 | stxa %l1,[%i2+%o4]0x89 ! Mem[0000000030081408] = 0000000000000000 | |
7506 | ! %l2 = 00000000, %l3 = 000000ff, Mem[0000000010081408] = 00000030 000000ff | |
7507 | stda %l2,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00000000 000000ff | |
7508 | ! %l6 = ffffffff, %l7 = c48a98ff, Mem[0000000010041400] = ff27ffff f1b600ff | |
7509 | stda %l6,[%i1+%g0]0x80 ! Mem[0000000010041400] = ffffffff c48a98ff | |
7510 | ! Mem[00000000300c1400] = ffffffff, %l6 = ffffffffffffffff | |
7511 | swapa [%i3+%g0]0x89,%l6 ! %l6 = 00000000ffffffff | |
7512 | ! %l1 = 0000000000000000, Mem[0000000010001400] = d81affff | |
7513 | stba %l1,[%i0+%g0]0x88 ! Mem[0000000010001400] = d81aff00 | |
7514 | ! %f20 = ff000000 d7ffffff, %l2 = 0000000000000000 | |
7515 | ! Mem[00000000300c1410] = ffff0000ff740000 | |
7516 | add %i3,0x010,%g1 | |
7517 | stda %f20,[%g1+%l2]ASI_PST16_SL ! Mem[00000000300c1410] = ffff0000ff740000 | |
7518 | ! %l5 = 0000000000000000, Mem[00000000211c0000] = fffffe0c | |
7519 | sth %l5,[%o2+%g0] ! Mem[00000000211c0000] = 0000fe0c | |
7520 | ! %f8 = 00000000, Mem[0000000030081400] = ff94ffff | |
7521 | sta %f8 ,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000000 | |
7522 | ! %l6 = ffffffff, %l7 = c48a98ff, Mem[0000000030041410] = 0000ffff f1b600ff | |
7523 | stda %l6,[%i1+%o5]0x81 ! Mem[0000000030041410] = ffffffff c48a98ff | |
7524 | ! Starting 10 instruction Load Burst | |
7525 | ! Mem[0000000010181408] = ffffffffffffffff, %l0 = 0000000000000000 | |
7526 | ldxa [%i6+%o4]0x80,%l0 ! %l0 = ffffffffffffffff | |
7527 | ||
7528 | p0_label_173: | |
7529 | ! Mem[0000000010101400] = 000000ff0a8d001a, %l7 = 00000000c48a98ff | |
7530 | ldxa [%i4+%g0]0x80,%l7 ! %l7 = 000000ff0a8d001a | |
7531 | ! Mem[0000000010041408] = 9a7a0000ffff94ff, %l4 = 0000000000000000 | |
7532 | ldxa [%i1+%o4]0x88,%l4 ! %l4 = 9a7a0000ffff94ff | |
7533 | ! Mem[0000000030101400] = ff000000, %l6 = 00000000ffffffff | |
7534 | lduha [%i4+%g0]0x81,%l6 ! %l6 = 000000000000ff00 | |
7535 | membar #Sync ! Added by membar checker (43) | |
7536 | ! Mem[0000000030041400] = 9a7a0000 ffff94ff ffffffff ffffffff | |
7537 | ! Mem[0000000030041410] = ffffffff c48a98ff d9876ee7 f8d13fed | |
7538 | ! Mem[0000000030041420] = 0f105c1a ed13eb1e 3d8bd50d e0ff008b | |
7539 | ! Mem[0000000030041430] = 8ed62c03 37e2e09e 5205b393 20e3dee5 | |
7540 | ldda [%i1]ASI_BLK_SL,%f0 ! Block Load from 0000000030041400 | |
7541 | ! Mem[0000000030081408] = 00000000, %l0 = ffffffffffffffff | |
7542 | ldswa [%i2+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
7543 | ! Mem[0000000030181408] = 00000000, %f20 = ff000000 | |
7544 | lda [%i6+%o4]0x81,%f20 ! %f20 = 00000000 | |
7545 | ! Mem[0000000010081410] = ffffffd7000000ff, %l0 = 0000000000000000 | |
7546 | ldxa [%i2+%o5]0x88,%l0 ! %l0 = ffffffd7000000ff | |
7547 | ! Mem[0000000030181400] = ff000000 00007a9a 00000000 ff94ffff | |
7548 | ! Mem[0000000030181410] = 02226c6b 57119e5e d9876ee7 f8d13fed | |
7549 | ! Mem[0000000030181420] = 000000ff ff000000 00000000 a309ade0 | |
7550 | ! Mem[0000000030181430] = 0f10ff1a e0ffffff 00000000 00007a9a | |
7551 | ldda [%i6]ASI_BLK_AIUSL,%f16 ! Block Load from 0000000030181400 | |
7552 | ! Mem[0000000030041410] = ffffffff, %l4 = 9a7a0000ffff94ff | |
7553 | lduba [%i1+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
7554 | ! Starting 10 instruction Store Burst | |
7555 | ! %l7 = 000000ff0a8d001a, Mem[000000001008143f] = 00007a9a, %asi = 80 | |
7556 | stba %l7,[%i2+0x03f]%asi ! Mem[000000001008143c] = 00007a1a | |
7557 | ||
7558 | p0_label_174: | |
7559 | membar #Sync ! Added by membar checker (44) | |
7560 | ! %f6 = ed3fd1f8 e76e87d9, %l4 = 00000000000000ff | |
7561 | ! Mem[0000000030041418] = d9876ee7f8d13fed | |
7562 | add %i1,0x018,%g1 | |
7563 | stda %f6,[%g1+%l4]ASI_PST16_S ! Mem[0000000030041418] = ed3fd1f8e76e87d9 | |
7564 | ! %l7 = 000000ff0a8d001a, Mem[00000000100c1408] = 000046c0e0ffffff | |
7565 | stxa %l7,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 000000ff0a8d001a | |
7566 | ! %l6 = 000000000000ff00, Mem[0000000030101400] = ff000000 | |
7567 | stha %l6,[%i4+%g0]0x81 ! Mem[0000000030101400] = ff000000 | |
7568 | ! Mem[0000000010141410] = ffb600ffffffffff, %l5 = 0000000000000000, %l5 = 0000000000000000 | |
7569 | add %i5,0x10,%g1 | |
7570 | casxa [%g1]0x80,%l5,%l5 ! %l5 = ffb600ffffffffff | |
7571 | ! %f10 = 8b00ffe0 0dd58b3d, Mem[0000000030101410] = 00000000 4d000000 | |
7572 | stda %f10,[%i4+%o5]0x89 ! Mem[0000000030101410] = 8b00ffe0 0dd58b3d | |
7573 | ! Mem[0000000030001400] = 00000000, %l5 = ffb600ffffffffff | |
7574 | swapa [%i0+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
7575 | ! %l6 = 000000000000ff00, Mem[0000000010041410] = ffffffe0ff740000 | |
7576 | stx %l6,[%i1+%o5] ! Mem[0000000010041410] = 000000000000ff00 | |
7577 | ! %l1 = 0000000000000000, Mem[0000000030041400] = 9a7a0000 | |
7578 | stwa %l1,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00000000 | |
7579 | ! %f18 = ffff94ff 00000000, Mem[0000000010041400] = ffffffff ff988ac4 | |
7580 | stda %f18,[%i1+%g0]0x88 ! Mem[0000000010041400] = ffff94ff 00000000 | |
7581 | ! Starting 10 instruction Load Burst | |
7582 | ! Mem[0000000010001410] = ff000000, %f9 = 1a5c100f | |
7583 | ld [%i0+%o5],%f9 ! %f9 = ff000000 | |
7584 | ||
7585 | p0_label_175: | |
7586 | ! Mem[0000000010141410] = ffb600ff, %l0 = ffffffd7000000ff | |
7587 | lduwa [%i5+%o5]0x80,%l0 ! %l0 = 00000000ffb600ff | |
7588 | ! Mem[0000000010101408] = ff000000, %l4 = 00000000000000ff | |
7589 | lduha [%i4+%o4]0x80,%l4 ! %l4 = 000000000000ff00 | |
7590 | ! Mem[0000000030181408] = 00000000 ff94ffff, %l6 = 0000ff00, %l7 = 0a8d001a | |
7591 | ldda [%i6+%o4]0x81,%l6 ! %l6 = 0000000000000000 00000000ff94ffff | |
7592 | ! Mem[000000001018143c] = 00000000, %l7 = 00000000ff94ffff | |
7593 | lduha [%i6+0x03c]%asi,%l7 ! %l7 = 0000000000000000 | |
7594 | ! Mem[00000000300c1410] = 0000ffff, %l1 = 0000000000000000 | |
7595 | lduwa [%i3+%o5]0x89,%l1 ! %l1 = 000000000000ffff | |
7596 | ! Mem[0000000010101410] = ffb6e09c, %l7 = 0000000000000000 | |
7597 | ldsba [%i4+%o5]0x80,%l7 ! %l7 = ffffffffffffffff | |
7598 | ! Mem[0000000030141410] = ffffffff, %l1 = 000000000000ffff | |
7599 | lduha [%i5+%o5]0x89,%l1 ! %l1 = 000000000000ffff | |
7600 | ! Mem[0000000010001410] = ffffffd7 000000ff, %l4 = 0000ff00, %l5 = 00000000 | |
7601 | ldda [%i0+%o5]0x88,%l4 ! %l4 = 00000000000000ff 00000000ffffffd7 | |
7602 | ! Mem[0000000030101408] = ffffffff, %l4 = 00000000000000ff | |
7603 | ldswa [%i4+%o4]0x89,%l4 ! %l4 = ffffffffffffffff | |
7604 | ! Starting 10 instruction Store Burst | |
7605 | ! %f16 = 9a7a0000 000000ff, %l6 = 0000000000000000 | |
7606 | ! Mem[0000000010081428] = 00000000a309ade0 | |
7607 | add %i2,0x028,%g1 | |
7608 | stda %f16,[%g1+%l6]ASI_PST16_PL ! Mem[0000000010081428] = 00000000a309ade0 | |
7609 | ||
7610 | ! Check Point 35 for processor 0 | |
7611 | ||
7612 | set p0_check_pt_data_35,%g4 | |
7613 | rd %ccr,%g5 ! %g5 = 44 | |
7614 | ldx [%g4+0x08],%g2 | |
7615 | cmp %l0,%g2 ! %l0 = 00000000ffb600ff | |
7616 | bne %xcc,p0_reg_check_fail0 | |
7617 | mov 0xee0,%g1 | |
7618 | ldx [%g4+0x10],%g2 | |
7619 | cmp %l1,%g2 ! %l1 = 000000000000ffff | |
7620 | bne %xcc,p0_reg_check_fail1 | |
7621 | mov 0xee1,%g1 | |
7622 | ldx [%g4+0x18],%g2 | |
7623 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
7624 | bne %xcc,p0_reg_check_fail3 | |
7625 | mov 0xee3,%g1 | |
7626 | ldx [%g4+0x20],%g2 | |
7627 | cmp %l4,%g2 ! %l4 = ffffffffffffffff | |
7628 | bne %xcc,p0_reg_check_fail4 | |
7629 | mov 0xee4,%g1 | |
7630 | ldx [%g4+0x28],%g2 | |
7631 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
7632 | bne %xcc,p0_reg_check_fail6 | |
7633 | mov 0xee6,%g1 | |
7634 | ldx [%g4+0x30],%g2 | |
7635 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
7636 | bne %xcc,p0_reg_check_fail7 | |
7637 | mov 0xee7,%g1 | |
7638 | ldx [%g4+0x38],%g3 | |
7639 | std %f0,[%g4] | |
7640 | ldx [%g4],%g2 | |
7641 | cmp %g3,%g2 ! %f0 = ff94ffff 00007a9a | |
7642 | bne %xcc,p0_freg_check_fail | |
7643 | mov 0xf00,%g1 | |
7644 | ldx [%g4+0x40],%g3 | |
7645 | std %f2,[%g4] | |
7646 | ldx [%g4],%g2 | |
7647 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
7648 | bne %xcc,p0_freg_check_fail | |
7649 | mov 0xf02,%g1 | |
7650 | ldx [%g4+0x48],%g3 | |
7651 | std %f4,[%g4] | |
7652 | ldx [%g4],%g2 | |
7653 | cmp %g3,%g2 ! %f4 = ff988ac4 ffffffff | |
7654 | bne %xcc,p0_freg_check_fail | |
7655 | mov 0xf04,%g1 | |
7656 | ldx [%g4+0x50],%g3 | |
7657 | std %f6,[%g4] | |
7658 | ldx [%g4],%g2 | |
7659 | cmp %g3,%g2 ! %f6 = ed3fd1f8 e76e87d9 | |
7660 | bne %xcc,p0_freg_check_fail | |
7661 | mov 0xf06,%g1 | |
7662 | ldx [%g4+0x58],%g3 | |
7663 | std %f8,[%g4] | |
7664 | ldx [%g4],%g2 | |
7665 | cmp %g3,%g2 ! %f8 = 1eeb13ed ff000000 | |
7666 | bne %xcc,p0_freg_check_fail | |
7667 | mov 0xf08,%g1 | |
7668 | ldx [%g4+0x60],%g3 | |
7669 | std %f10,[%g4] | |
7670 | ldx [%g4],%g2 | |
7671 | cmp %g3,%g2 ! %f10 = 8b00ffe0 0dd58b3d | |
7672 | bne %xcc,p0_freg_check_fail | |
7673 | mov 0xf10,%g1 | |
7674 | ldx [%g4+0x68],%g3 | |
7675 | std %f12,[%g4] | |
7676 | ldx [%g4],%g2 | |
7677 | cmp %g3,%g2 ! %f12 = 9ee0e237 032cd68e | |
7678 | bne %xcc,p0_freg_check_fail | |
7679 | mov 0xf12,%g1 | |
7680 | ldx [%g4+0x70],%g3 | |
7681 | std %f14,[%g4] | |
7682 | ldx [%g4],%g2 | |
7683 | cmp %g3,%g2 ! %f14 = e5dee320 93b30552 | |
7684 | bne %xcc,p0_freg_check_fail | |
7685 | mov 0xf14,%g1 | |
7686 | ldx [%g4+0x78],%g3 | |
7687 | std %f16,[%g4] | |
7688 | ldx [%g4],%g2 | |
7689 | cmp %g3,%g2 ! %f16 = 9a7a0000 000000ff | |
7690 | bne %xcc,p0_freg_check_fail | |
7691 | mov 0xf16,%g1 | |
7692 | ldx [%g4+0x80],%g3 | |
7693 | std %f18,[%g4] | |
7694 | ldx [%g4],%g2 | |
7695 | cmp %g3,%g2 ! %f18 = ffff94ff 00000000 | |
7696 | bne %xcc,p0_freg_check_fail | |
7697 | mov 0xf18,%g1 | |
7698 | ldx [%g4+0x88],%g3 | |
7699 | std %f20,[%g4] | |
7700 | ldx [%g4],%g2 | |
7701 | cmp %g3,%g2 ! %f20 = 5e9e1157 6b6c2202 | |
7702 | bne %xcc,p0_freg_check_fail | |
7703 | mov 0xf20,%g1 | |
7704 | ldx [%g4+0x90],%g3 | |
7705 | std %f22,[%g4] | |
7706 | ldx [%g4],%g2 | |
7707 | cmp %g3,%g2 ! %f22 = ed3fd1f8 e76e87d9 | |
7708 | bne %xcc,p0_freg_check_fail | |
7709 | mov 0xf22,%g1 | |
7710 | ldx [%g4+0x98],%g3 | |
7711 | std %f24,[%g4] | |
7712 | ldx [%g4],%g2 | |
7713 | cmp %g3,%g2 ! %f24 = 000000ff ff000000 | |
7714 | bne %xcc,p0_freg_check_fail | |
7715 | mov 0xf24,%g1 | |
7716 | ldx [%g4+0xa0],%g3 | |
7717 | std %f26,[%g4] | |
7718 | ldx [%g4],%g2 | |
7719 | cmp %g3,%g2 ! %f26 = e0ad09a3 00000000 | |
7720 | bne %xcc,p0_freg_check_fail | |
7721 | mov 0xf26,%g1 | |
7722 | ldx [%g4+0xa8],%g3 | |
7723 | std %f28,[%g4] | |
7724 | ldx [%g4],%g2 | |
7725 | cmp %g3,%g2 ! %f28 = ffffffe0 1aff100f | |
7726 | bne %xcc,p0_freg_check_fail | |
7727 | mov 0xf28,%g1 | |
7728 | ldx [%g4+0xb0],%g3 | |
7729 | std %f30,[%g4] | |
7730 | ldx [%g4],%g2 | |
7731 | cmp %g3,%g2 ! %f30 = 9a7a0000 00000000 | |
7732 | bne %xcc,p0_freg_check_fail | |
7733 | mov 0xf30,%g1 | |
7734 | ||
7735 | ! Check Point 35 completed | |
7736 | ||
7737 | ||
7738 | p0_label_176: | |
7739 | ! Mem[0000000010141408] = 4d000000, %l3 = 00000000000000ff | |
7740 | ldstuba [%i5+%o4]0x80,%l3 ! %l3 = 0000004d000000ff | |
7741 | ! %l1 = 000000000000ffff, Mem[0000000010041408] = ffff94ff | |
7742 | stwa %l1,[%i1+%o4]0x88 ! Mem[0000000010041408] = 0000ffff | |
7743 | ! %l6 = 00000000, %l7 = ffffffff, Mem[0000000010041408] = 0000ffff 9a7a0000 | |
7744 | stda %l6,[%i1+%o4]0x88 ! Mem[0000000010041408] = 00000000 ffffffff | |
7745 | ! Mem[0000000010041400] = 00000000, %l7 = ffffffffffffffff | |
7746 | ldstuba [%i1+%g0]0x80,%l7 ! %l7 = 00000000000000ff | |
7747 | ! %l2 = 00000000, %l3 = 0000004d, Mem[0000000010001410] = ff000000 d7ffffff | |
7748 | stda %l2,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 0000004d | |
7749 | ! %l1 = 000000000000ffff, Mem[0000000010041410] = 00ff000000000000 | |
7750 | stxa %l1,[%i1+%o5]0x88 ! Mem[0000000010041410] = 000000000000ffff | |
7751 | ! %f20 = 5e9e1157, Mem[00000000100c1410] = ffffffff | |
7752 | sta %f20,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 5e9e1157 | |
7753 | ! %f26 = e0ad09a3, Mem[0000000030101400] = 000000ff | |
7754 | sta %f26,[%i4+%g0]0x89 ! Mem[0000000030101400] = e0ad09a3 | |
7755 | ! %l3 = 000000000000004d, Mem[0000000030181408] = 00000000 | |
7756 | stwa %l3,[%i6+%o4]0x81 ! Mem[0000000030181408] = 0000004d | |
7757 | ! Starting 10 instruction Load Burst | |
7758 | ! Mem[0000000010081408] = 00000000, %f14 = e5dee320 | |
7759 | lda [%i2+%o4]0x80,%f14 ! %f14 = 00000000 | |
7760 | ||
7761 | p0_label_177: | |
7762 | ! Mem[0000000030101408] = ffffffff ffffffff, %l6 = 00000000, %l7 = 00000000 | |
7763 | ldda [%i4+%o4]0x81,%l6 ! %l6 = 00000000ffffffff 00000000ffffffff | |
7764 | ! Mem[0000000010001408] = ffb6e09c ffffffff, %l6 = ffffffff, %l7 = ffffffff | |
7765 | ldda [%i0+%o4]0x80,%l6 ! %l6 = 00000000ffb6e09c 00000000ffffffff | |
7766 | ! Mem[0000000030141408] = ff00ffff, %l7 = 00000000ffffffff | |
7767 | lduha [%i5+%o4]0x89,%l7 ! %l7 = 000000000000ffff | |
7768 | ! Mem[0000000030081400] = 00000000 ffffffff 00000000 00000000 | |
7769 | ! Mem[0000000030081410] = 00ffffff 0000006e 1d825880 5e067d5a | |
7770 | ! Mem[0000000030081420] = 06d37253 8e2d6ade 578bd2d3 c3fce2e3 | |
7771 | ! Mem[0000000030081430] = 0a06c0b1 c0dc16be 4b20c2b8 480207d9 | |
7772 | ldda [%i2]ASI_BLK_S,%f16 ! Block Load from 0000000030081400 | |
7773 | ! Mem[0000000010001410] = 00000000, %l3 = 000000000000004d | |
7774 | ldsba [%i0+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
7775 | ! %l5 = 00000000ffffffd7, Mem[0000000030001410] = ffffffd7 | |
7776 | stha %l5,[%i0+%o5]0x89 ! Mem[0000000030001410] = ffffffd7 | |
7777 | ! Mem[0000000010101408] = ff000000, %l4 = ffffffffffffffff | |
7778 | lduwa [%i4+%o4]0x80,%l4 ! %l4 = 00000000ff000000 | |
7779 | ! Mem[0000000010101414] = 365fc6fa, %l6 = 00000000ffb6e09c | |
7780 | lduh [%i4+0x014],%l6 ! %l6 = 000000000000365f | |
7781 | ! Mem[00000000211c0000] = 0000fe0c, %l3 = 0000000000000000 | |
7782 | lduba [%o2+0x001]%asi,%l3 ! %l3 = 0000000000000000 | |
7783 | ! Starting 10 instruction Store Burst | |
7784 | ! %l6 = 0000365f, %l7 = 0000ffff, Mem[0000000010101400] = 000000ff 0a8d001a | |
7785 | std %l6,[%i4+%g0] ! Mem[0000000010101400] = 0000365f 0000ffff | |
7786 | ||
7787 | p0_label_178: | |
7788 | ! %f16 = 00000000 ffffffff 00000000 00000000 | |
7789 | ! %f20 = 00ffffff 0000006e 1d825880 5e067d5a | |
7790 | ! %f24 = 06d37253 8e2d6ade 578bd2d3 c3fce2e3 | |
7791 | ! %f28 = 0a06c0b1 c0dc16be 4b20c2b8 480207d9 | |
7792 | stda %f16,[%i1]ASI_COMMIT_S ! Block Store to 0000000030041400 | |
7793 | ! %l3 = 0000000000000000, Mem[0000000010101408] = ff000000 | |
7794 | stba %l3,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000 | |
7795 | ! Mem[000000001014140c] = 00000000, %l1 = 000000000000ffff | |
7796 | swap [%i5+0x00c],%l1 ! %l1 = 0000000000000000 | |
7797 | ! %l2 = 0000000000000000, Mem[00000000100c1410] = 57119e5effffff00, %asi = 80 | |
7798 | stxa %l2,[%i3+0x010]%asi ! Mem[00000000100c1410] = 0000000000000000 | |
7799 | ! %l0 = 00000000ffb600ff, Mem[0000000010081410] = ff000000 | |
7800 | stba %l0,[%i2+%o5]0x80 ! Mem[0000000010081410] = ff000000 | |
7801 | ! Mem[00000000100c1408] = ff000000, %l6 = 000000000000365f | |
7802 | swapa [%i3+%o4]0x88,%l6 ! %l6 = 00000000ff000000 | |
7803 | ! Mem[0000000010101408] = 00000000, %l7 = 000000000000ffff | |
7804 | swapa [%i4+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
7805 | ! %l0 = 00000000ffb600ff, Mem[0000000010181400] = e0ad09a3 | |
7806 | stwa %l0,[%i6+%g0]0x88 ! Mem[0000000010181400] = ffb600ff | |
7807 | ! Mem[0000000010081400] = 00000000, %l0 = 00000000ffb600ff | |
7808 | ldstuba [%i2+%g0]0x88,%l0 ! %l0 = 00000000000000ff | |
7809 | ! Starting 10 instruction Load Burst | |
7810 | ! Mem[0000000010081400] = ff000000, %l0 = 0000000000000000 | |
7811 | lduw [%i2+%g0],%l0 ! %l0 = 00000000ff000000 | |
7812 | ||
7813 | p0_label_179: | |
7814 | ! Mem[0000000030081410] = ffffff00, %l5 = 00000000ffffffd7 | |
7815 | ldsba [%i2+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
7816 | ! Mem[00000000100c1408] = 5f360000 0a8d001a, %l4 = ff000000, %l5 = 00000000 | |
7817 | ldda [%i3+%o4]0x80,%l4 ! %l4 = 000000005f360000 000000000a8d001a | |
7818 | ! Mem[0000000010101400] = 0000365f, %f9 = ff000000 | |
7819 | lda [%i4+%g0]0x80,%f9 ! %f9 = 0000365f | |
7820 | membar #Sync ! Added by membar checker (45) | |
7821 | ! Mem[0000000010101400] = 0000365f 0000ffff 0000ffff 00000091 | |
7822 | ! Mem[0000000010101410] = ffb6e09c 365fc6fa e76e87d9 bb9180c7 | |
7823 | ! Mem[0000000010101420] = ffffffe0 74ff00ff 00004d00 0000007a | |
7824 | ! Mem[0000000010101430] = 5e27f9ff 46c07bfa f1b600ff 000063ff | |
7825 | ldda [%i4]ASI_BLK_P,%f16 ! Block Load from 0000000010101400 | |
7826 | ! Mem[000000001010141c] = bb9180c7, %f0 = ff94ffff | |
7827 | lda [%i4+0x01c]%asi,%f0 ! %f0 = bb9180c7 | |
7828 | ! Mem[0000000010181408] = ffffffff, %l0 = 00000000ff000000 | |
7829 | lduwa [%i6+%o4]0x88,%l0 ! %l0 = 00000000ffffffff | |
7830 | ! Mem[0000000030141408] = ffff00ff, %l1 = 0000000000000000 | |
7831 | lduwa [%i5+%o4]0x81,%l1 ! %l1 = 00000000ffff00ff | |
7832 | ! Mem[00000000100c1410] = 00000000, %l5 = 000000000a8d001a | |
7833 | lduba [%i3+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
7834 | ! Mem[0000000030001400] = ffffffff 00740000 000000ff 000000ff | |
7835 | ! Mem[0000000030001410] = d7ffffff cd1094c4 1d825880 5e067d5a | |
7836 | ! Mem[0000000030001420] = 06d37253 8e2d6ade 578bd2d3 c3fce2e3 | |
7837 | ! Mem[0000000030001430] = cd1094c4 e46dee46 4b20c2b8 480207d9 | |
7838 | ldda [%i0]ASI_BLK_S,%f16 ! Block Load from 0000000030001400 | |
7839 | ! Starting 10 instruction Store Burst | |
7840 | ! Mem[0000000030181410] = 02226c6b, %l3 = 0000000000000000 | |
7841 | swapa [%i6+%o5]0x81,%l3 ! %l3 = 0000000002226c6b | |
7842 | ||
7843 | p0_label_180: | |
7844 | ! Mem[0000000030041410] = ffffff00, %l5 = 0000000000000000 | |
7845 | swapa [%i1+%o5]0x89,%l5 ! %l5 = 00000000ffffff00 | |
7846 | ! %l5 = 00000000ffffff00, Mem[0000000010141400] = a309ade0 | |
7847 | stwa %l5,[%i5+%g0]0x88 ! Mem[0000000010141400] = ffffff00 | |
7848 | ! %l4 = 5f360000, %l5 = ffffff00, Mem[0000000030141410] = ffffffff e0ffff1e | |
7849 | stda %l4,[%i5+%o5]0x89 ! Mem[0000000030141410] = 5f360000 ffffff00 | |
7850 | ! Mem[0000000030081410] = ffffff00, %l0 = 00000000ffffffff | |
7851 | ldstuba [%i2+%o5]0x89,%l0 ! %l0 = 00000000000000ff | |
7852 | membar #Sync ! Added by membar checker (46) | |
7853 | ! %l0 = 0000000000000000, Mem[0000000010101408] = 0000ffff | |
7854 | stwa %l0,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000 | |
7855 | ! Mem[000000001014143a] = cd1094c4, %l1 = 00000000ffff00ff | |
7856 | ldstuba [%i5+0x03a]%asi,%l1 ! %l1 = 00000094000000ff | |
7857 | ! Mem[0000000030141400] = ffffffff, %l2 = 0000000000000000 | |
7858 | swapa [%i5+%g0]0x81,%l2 ! %l2 = 00000000ffffffff | |
7859 | ! %f0 = bb9180c7 00007a9a, %l0 = 0000000000000000 | |
7860 | ! Mem[00000000100c1438] = ffffffe000000000 | |
7861 | add %i3,0x038,%g1 | |
7862 | stda %f0,[%g1+%l0]ASI_PST32_PL ! Mem[00000000100c1438] = ffffffe000000000 | |
7863 | ! Mem[0000000030081400] = 00000000, %l7 = 0000000000000000 | |
7864 | ldstuba [%i2+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
7865 | ! Starting 10 instruction Load Burst | |
7866 | ! Mem[0000000030001410] = ffffffd7, %l1 = 0000000000000094 | |
7867 | swapa [%i0+%o5]0x89,%l1 ! %l1 = 00000000ffffffd7 | |
7868 | ||
7869 | ! Check Point 36 for processor 0 | |
7870 | ||
7871 | set p0_check_pt_data_36,%g4 | |
7872 | rd %ccr,%g5 ! %g5 = 44 | |
7873 | ldx [%g4+0x08],%g2 | |
7874 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
7875 | bne %xcc,p0_reg_check_fail0 | |
7876 | mov 0xee0,%g1 | |
7877 | ldx [%g4+0x10],%g2 | |
7878 | cmp %l1,%g2 ! %l1 = 00000000ffffffd7 | |
7879 | bne %xcc,p0_reg_check_fail1 | |
7880 | mov 0xee1,%g1 | |
7881 | ldx [%g4+0x18],%g2 | |
7882 | cmp %l3,%g2 ! %l3 = 0000000002226c6b | |
7883 | bne %xcc,p0_reg_check_fail3 | |
7884 | mov 0xee3,%g1 | |
7885 | ldx [%g4+0x20],%g2 | |
7886 | cmp %l4,%g2 ! %l4 = 000000005f360000 | |
7887 | bne %xcc,p0_reg_check_fail4 | |
7888 | mov 0xee4,%g1 | |
7889 | ldx [%g4+0x28],%g2 | |
7890 | cmp %l5,%g2 ! %l5 = 00000000ffffff00 | |
7891 | bne %xcc,p0_reg_check_fail5 | |
7892 | mov 0xee5,%g1 | |
7893 | ldx [%g4+0x30],%g2 | |
7894 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
7895 | bne %xcc,p0_reg_check_fail6 | |
7896 | mov 0xee6,%g1 | |
7897 | ldx [%g4+0x38],%g2 | |
7898 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
7899 | bne %xcc,p0_reg_check_fail7 | |
7900 | mov 0xee7,%g1 | |
7901 | ldx [%g4+0x40],%g3 | |
7902 | std %f0,[%g4] | |
7903 | ldx [%g4],%g2 | |
7904 | cmp %g3,%g2 ! %f0 = bb9180c7 00007a9a | |
7905 | bne %xcc,p0_freg_check_fail | |
7906 | mov 0xf00,%g1 | |
7907 | ldx [%g4+0x48],%g3 | |
7908 | std %f4,[%g4] | |
7909 | ldx [%g4],%g2 | |
7910 | cmp %g3,%g2 ! %f4 = ff988ac4 ffffffff | |
7911 | bne %xcc,p0_freg_check_fail | |
7912 | mov 0xf04,%g1 | |
7913 | ldx [%g4+0x50],%g3 | |
7914 | std %f6,[%g4] | |
7915 | ldx [%g4],%g2 | |
7916 | cmp %g3,%g2 ! %f6 = ed3fd1f8 e76e87d9 | |
7917 | bne %xcc,p0_freg_check_fail | |
7918 | mov 0xf06,%g1 | |
7919 | ldx [%g4+0x58],%g3 | |
7920 | std %f8,[%g4] | |
7921 | ldx [%g4],%g2 | |
7922 | cmp %g3,%g2 ! %f8 = 1eeb13ed 0000365f | |
7923 | bne %xcc,p0_freg_check_fail | |
7924 | mov 0xf08,%g1 | |
7925 | ldx [%g4+0x60],%g3 | |
7926 | std %f14,[%g4] | |
7927 | ldx [%g4],%g2 | |
7928 | cmp %g3,%g2 ! %f14 = 00000000 93b30552 | |
7929 | bne %xcc,p0_freg_check_fail | |
7930 | mov 0xf14,%g1 | |
7931 | ldx [%g4+0x68],%g3 | |
7932 | std %f16,[%g4] | |
7933 | ldx [%g4],%g2 | |
7934 | cmp %g3,%g2 ! %f16 = ffffffff 00740000 | |
7935 | bne %xcc,p0_freg_check_fail | |
7936 | mov 0xf16,%g1 | |
7937 | ldx [%g4+0x70],%g3 | |
7938 | std %f18,[%g4] | |
7939 | ldx [%g4],%g2 | |
7940 | cmp %g3,%g2 ! %f18 = 000000ff 000000ff | |
7941 | bne %xcc,p0_freg_check_fail | |
7942 | mov 0xf18,%g1 | |
7943 | ldx [%g4+0x78],%g3 | |
7944 | std %f20,[%g4] | |
7945 | ldx [%g4],%g2 | |
7946 | cmp %g3,%g2 ! %f20 = d7ffffff cd1094c4 | |
7947 | bne %xcc,p0_freg_check_fail | |
7948 | mov 0xf20,%g1 | |
7949 | ldx [%g4+0x80],%g3 | |
7950 | std %f22,[%g4] | |
7951 | ldx [%g4],%g2 | |
7952 | cmp %g3,%g2 ! %f22 = 1d825880 5e067d5a | |
7953 | bne %xcc,p0_freg_check_fail | |
7954 | mov 0xf22,%g1 | |
7955 | ldx [%g4+0x88],%g3 | |
7956 | std %f24,[%g4] | |
7957 | ldx [%g4],%g2 | |
7958 | cmp %g3,%g2 ! %f24 = 06d37253 8e2d6ade | |
7959 | bne %xcc,p0_freg_check_fail | |
7960 | mov 0xf24,%g1 | |
7961 | ldx [%g4+0x90],%g3 | |
7962 | std %f26,[%g4] | |
7963 | ldx [%g4],%g2 | |
7964 | cmp %g3,%g2 ! %f26 = 578bd2d3 c3fce2e3 | |
7965 | bne %xcc,p0_freg_check_fail | |
7966 | mov 0xf26,%g1 | |
7967 | ldx [%g4+0x98],%g3 | |
7968 | std %f28,[%g4] | |
7969 | ldx [%g4],%g2 | |
7970 | cmp %g3,%g2 ! %f28 = cd1094c4 e46dee46 | |
7971 | bne %xcc,p0_freg_check_fail | |
7972 | mov 0xf28,%g1 | |
7973 | ldx [%g4+0xa0],%g3 | |
7974 | std %f30,[%g4] | |
7975 | ldx [%g4],%g2 | |
7976 | cmp %g3,%g2 ! %f30 = 4b20c2b8 480207d9 | |
7977 | bne %xcc,p0_freg_check_fail | |
7978 | mov 0xf30,%g1 | |
7979 | ||
7980 | ! Check Point 36 completed | |
7981 | ||
7982 | ||
7983 | p0_label_181: | |
7984 | ! Mem[0000000030041410] = 00000000, %l4 = 000000005f360000 | |
7985 | ldsba [%i1+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
7986 | ! Mem[0000000030001410] = 94000000, %l5 = 00000000ffffff00 | |
7987 | lduba [%i0+%o5]0x81,%l5 ! %l5 = 0000000000000094 | |
7988 | ! Mem[0000000030141400] = 00000000, %l3 = 0000000002226c6b | |
7989 | ldsba [%i5+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
7990 | ! Mem[0000000030181410] = 5e9e1157 00000000, %l6 = ff000000, %l7 = 00000000 | |
7991 | ldda [%i6+%o5]0x89,%l6 ! %l6 = 0000000000000000 000000005e9e1157 | |
7992 | ! Mem[0000000030041410] = 00000000, %l2 = 00000000ffffffff | |
7993 | lduwa [%i1+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
7994 | ! Mem[0000000030001400] = ffffffff, %l6 = 0000000000000000 | |
7995 | lduwa [%i0+%g0]0x81,%l6 ! %l6 = 00000000ffffffff | |
7996 | ! Mem[0000000030101400] = e0ad09a3, %l4 = 0000000000000000 | |
7997 | lduba [%i4+%g0]0x89,%l4 ! %l4 = 00000000000000a3 | |
7998 | ! Mem[00000000211c0000] = 0000fe0c, %l5 = 0000000000000094 | |
7999 | ldsb [%o2+0x001],%l5 ! %l5 = 0000000000000000 | |
8000 | ! Mem[00000000201c0000] = ffff1669, %l6 = 00000000ffffffff | |
8001 | ldsha [%o0+0x000]%asi,%l6 ! %l6 = ffffffffffffffff | |
8002 | ! Starting 10 instruction Store Burst | |
8003 | ! %l4 = 00000000000000a3, Mem[0000000021800140] = fffff8a0, %asi = 80 | |
8004 | stha %l4,[%o3+0x140]%asi ! Mem[0000000021800140] = 00a3f8a0 | |
8005 | ||
8006 | p0_label_182: | |
8007 | ! %l0 = 00000000, %l1 = ffffffd7, Mem[0000000030181400] = 000000ff 9a7a0000 | |
8008 | stda %l0,[%i6+%g0]0x89 ! Mem[0000000030181400] = 00000000 ffffffd7 | |
8009 | ! %l4 = 00000000000000a3, Mem[00000000300c1410] = 000074ff0000ffff | |
8010 | stxa %l4,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 00000000000000a3 | |
8011 | ! %l0 = 0000000000000000, Mem[0000000030141410] = 0000365f | |
8012 | stha %l0,[%i5+%o5]0x81 ! Mem[0000000030141410] = 0000365f | |
8013 | ! %f20 = d7ffffff cd1094c4, Mem[0000000030181408] = 0000004d ff94ffff | |
8014 | stda %f20,[%i6+%o4]0x81 ! Mem[0000000030181408] = d7ffffff cd1094c4 | |
8015 | ! Mem[0000000030101410] = 0dd58b3d, %l1 = 00000000ffffffd7 | |
8016 | swapa [%i4+%o5]0x89,%l1 ! %l1 = 000000000dd58b3d | |
8017 | ! %f13 = 032cd68e, Mem[000000001018143c] = 00000000 | |
8018 | sta %f13,[%i6+0x03c]%asi ! Mem[000000001018143c] = 032cd68e | |
8019 | ! %l6 = ffffffffffffffff, Mem[0000000010001408] = ffb6e09c | |
8020 | stba %l6,[%i0+%o4]0x80 ! Mem[0000000010001408] = ffb6e09c | |
8021 | ! %f26 = 578bd2d3 c3fce2e3, Mem[00000000100c1410] = 00000000 00000000 | |
8022 | stda %f26,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 578bd2d3 c3fce2e3 | |
8023 | ! %f28 = cd1094c4, Mem[0000000030041410] = 00000000 | |
8024 | sta %f28,[%i1+%o5]0x81 ! Mem[0000000030041410] = cd1094c4 | |
8025 | ! Starting 10 instruction Load Burst | |
8026 | ! Mem[0000000030041410] = cd1094c4, %l2 = 0000000000000000 | |
8027 | lduha [%i1+%o5]0x81,%l2 ! %l2 = 000000000000cd10 | |
8028 | ||
8029 | p0_label_183: | |
8030 | ! Mem[0000000030041400] = 00000000, %l6 = ffffffffffffffff | |
8031 | ldswa [%i1+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
8032 | ! Mem[0000000030001410] = 94000000, %l5 = 0000000000000000 | |
8033 | lduwa [%i0+%o5]0x81,%l5 ! %l5 = 0000000094000000 | |
8034 | ! Mem[0000000010001408] = ffb6e09c, %l5 = 0000000094000000 | |
8035 | ldswa [%i0+%o4]0x80,%l5 ! %l5 = ffffffffffb6e09c | |
8036 | ! Mem[0000000010001400] = 9c8e42d7 d81aff00, %l0 = 00000000, %l1 = 0dd58b3d | |
8037 | ldda [%i0+%g0]0x88,%l0 ! %l0 = 00000000d81aff00 000000009c8e42d7 | |
8038 | ! Mem[0000000010081410] = 000000ff, %f15 = 93b30552 | |
8039 | lda [%i2+%o5]0x88,%f15 ! %f15 = 000000ff | |
8040 | ! Mem[0000000010081410] = 000000ff, %l7 = 000000005e9e1157 | |
8041 | lduha [%i2+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
8042 | ! Mem[0000000010081400] = ff000000, %f4 = ff988ac4 | |
8043 | lda [%i2+%g0]0x80,%f4 ! %f4 = ff000000 | |
8044 | ! Mem[0000000010081400] = 000000ff, %l4 = 00000000000000a3 | |
8045 | lduwa [%i2+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
8046 | ! Mem[0000000010101404] = 0000ffff, %f14 = 00000000 | |
8047 | lda [%i4+0x004]%asi,%f14 ! %f14 = 0000ffff | |
8048 | ! Starting 10 instruction Store Burst | |
8049 | ! Mem[0000000010001408] = 9ce0b6ff, %l3 = 0000000000000000 | |
8050 | ldstuba [%i0+%o4]0x88,%l3 ! %l3 = 000000ff000000ff | |
8051 | ||
8052 | p0_label_184: | |
8053 | ! Mem[00000000100c1408] = 5f360000, %l0 = 00000000d81aff00 | |
8054 | swapa [%i3+%o4]0x80,%l0 ! %l0 = 000000005f360000 | |
8055 | ! %f4 = ff000000 ffffffff, Mem[0000000030101408] = ffffffff ffffffff | |
8056 | stda %f4 ,[%i4+%o4]0x81 ! Mem[0000000030101408] = ff000000 ffffffff | |
8057 | ! Mem[00000000201c0000] = ffff1669, %l0 = 000000005f360000 | |
8058 | ldstub [%o0+%g0],%l0 ! %l0 = 000000ff000000ff | |
8059 | ! %l6 = 0000000000000000, Mem[0000000030041408] = 0000000000000000 | |
8060 | stxa %l6,[%i1+%o4]0x81 ! Mem[0000000030041408] = 0000000000000000 | |
8061 | ! Mem[0000000030081400] = ff000000, %l1 = 000000009c8e42d7 | |
8062 | ldstuba [%i2+%g0]0x81,%l1 ! %l1 = 000000ff000000ff | |
8063 | ! %f30 = 4b20c2b8, Mem[00000000100c1408] = 00ff1ad8 | |
8064 | sta %f30,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 4b20c2b8 | |
8065 | ! Mem[0000000010041420] = ffffffb40000005e, %l5 = ffffffffffb6e09c, %l0 = 00000000000000ff | |
8066 | add %i1,0x20,%g1 | |
8067 | casxa [%g1]0x80,%l5,%l0 ! %l0 = ffffffb40000005e | |
8068 | ! %f24 = 06d37253 8e2d6ade, %l1 = 00000000000000ff | |
8069 | ! Mem[00000000300c1408] = 00000000ffffffff | |
8070 | add %i3,0x008,%g1 | |
8071 | stda %f24,[%g1+%l1]ASI_PST8_SL ! Mem[00000000300c1408] = de6a2d8e5372d306 | |
8072 | ! Mem[0000000030181408] = d7ffffff, %l5 = ffffffffffb6e09c | |
8073 | ldstuba [%i6+%o4]0x81,%l5 ! %l5 = 000000d7000000ff | |
8074 | ! Starting 10 instruction Load Burst | |
8075 | ! Mem[00000000100c1410] = 578bd2d3, %l3 = 00000000000000ff | |
8076 | ldswa [%i3+%o5]0x80,%l3 ! %l3 = 00000000578bd2d3 | |
8077 | ||
8078 | p0_label_185: | |
8079 | ! %l4 = 00000000000000ff, Mem[000000001018143e] = 032cd68e | |
8080 | stb %l4,[%i6+0x03e] ! Mem[000000001018143c] = 032cff8e | |
8081 | ! Mem[0000000010141408] = 000000ff, %l4 = 00000000000000ff | |
8082 | ldsba [%i5+%o4]0x88,%l4 ! %l4 = ffffffffffffffff | |
8083 | ! Mem[0000000021800000] = fff29a65, %l7 = 00000000000000ff | |
8084 | lduha [%o3+0x000]%asi,%l7 ! %l7 = 000000000000fff2 | |
8085 | ! Mem[0000000030141400] = 00000000, %l7 = 000000000000fff2 | |
8086 | ldsba [%i5+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
8087 | membar #Sync ! Added by membar checker (47) | |
8088 | ! Mem[00000000100c1400] = 000000ff caffffff b8c2204b 0a8d001a | |
8089 | ! Mem[00000000100c1410] = 578bd2d3 c3fce2e3 5e9e11ff 6b6c2202 | |
8090 | ! Mem[00000000100c1420] = 00000000 d81a5b92 c780ffbb d9876ee7 | |
8091 | ! Mem[00000000100c1430] = 7a000000 0000b68a ffffffe0 00000000 | |
8092 | ldda [%i3]ASI_BLK_P,%f0 ! Block Load from 00000000100c1400 | |
8093 | ! Mem[0000000010001410] = 00000000, %l1 = 00000000000000ff | |
8094 | ldsba [%i0+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
8095 | ! Mem[0000000010101400] = 5f360000, %l3 = 00000000578bd2d3 | |
8096 | lduwa [%i4+%g0]0x88,%l3 ! %l3 = 000000005f360000 | |
8097 | ! Mem[00000000300c1410] = 000000a3, %l7 = 0000000000000000 | |
8098 | ldswa [%i3+%o5]0x89,%l7 ! %l7 = 00000000000000a3 | |
8099 | ! Mem[0000000010181400] = ffb600ff, %l7 = 00000000000000a3 | |
8100 | ldswa [%i6+%g0]0x88,%l7 ! %l7 = ffffffffffb600ff | |
8101 | ! Starting 10 instruction Store Burst | |
8102 | ! Mem[000000001010142c] = 0000007a, %l6 = 00000000, %l6 = 00000000 | |
8103 | add %i4,0x2c,%g1 | |
8104 | casa [%g1]0x80,%l6,%l6 ! %l6 = 000000000000007a | |
8105 | ||
8106 | ! Check Point 37 for processor 0 | |
8107 | ||
8108 | set p0_check_pt_data_37,%g4 | |
8109 | rd %ccr,%g5 ! %g5 = 44 | |
8110 | ldx [%g4+0x08],%g2 | |
8111 | cmp %l0,%g2 ! %l0 = ffffffb40000005e | |
8112 | bne %xcc,p0_reg_check_fail0 | |
8113 | mov 0xee0,%g1 | |
8114 | ldx [%g4+0x10],%g2 | |
8115 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
8116 | bne %xcc,p0_reg_check_fail1 | |
8117 | mov 0xee1,%g1 | |
8118 | ldx [%g4+0x18],%g2 | |
8119 | cmp %l2,%g2 ! %l2 = 000000000000cd10 | |
8120 | bne %xcc,p0_reg_check_fail2 | |
8121 | mov 0xee2,%g1 | |
8122 | ldx [%g4+0x20],%g2 | |
8123 | cmp %l3,%g2 ! %l3 = 000000005f360000 | |
8124 | bne %xcc,p0_reg_check_fail3 | |
8125 | mov 0xee3,%g1 | |
8126 | ldx [%g4+0x28],%g2 | |
8127 | cmp %l4,%g2 ! %l4 = ffffffffffffffff | |
8128 | bne %xcc,p0_reg_check_fail4 | |
8129 | mov 0xee4,%g1 | |
8130 | ldx [%g4+0x30],%g2 | |
8131 | cmp %l5,%g2 ! %l5 = 00000000000000d7 | |
8132 | bne %xcc,p0_reg_check_fail5 | |
8133 | mov 0xee5,%g1 | |
8134 | ldx [%g4+0x38],%g2 | |
8135 | cmp %l6,%g2 ! %l6 = 000000000000007a | |
8136 | bne %xcc,p0_reg_check_fail6 | |
8137 | mov 0xee6,%g1 | |
8138 | ldx [%g4+0x40],%g2 | |
8139 | cmp %l7,%g2 ! %l7 = ffffffffffb600ff | |
8140 | bne %xcc,p0_reg_check_fail7 | |
8141 | mov 0xee7,%g1 | |
8142 | ldx [%g4+0x48],%g3 | |
8143 | std %f0,[%g4] | |
8144 | ldx [%g4],%g2 | |
8145 | cmp %g3,%g2 ! %f0 = 000000ff caffffff | |
8146 | bne %xcc,p0_freg_check_fail | |
8147 | mov 0xf00,%g1 | |
8148 | ldx [%g4+0x50],%g3 | |
8149 | std %f2,[%g4] | |
8150 | ldx [%g4],%g2 | |
8151 | cmp %g3,%g2 ! %f2 = b8c2204b 0a8d001a | |
8152 | bne %xcc,p0_freg_check_fail | |
8153 | mov 0xf02,%g1 | |
8154 | ldx [%g4+0x58],%g3 | |
8155 | std %f4,[%g4] | |
8156 | ldx [%g4],%g2 | |
8157 | cmp %g3,%g2 ! %f4 = 578bd2d3 c3fce2e3 | |
8158 | bne %xcc,p0_freg_check_fail | |
8159 | mov 0xf04,%g1 | |
8160 | ldx [%g4+0x60],%g3 | |
8161 | std %f6,[%g4] | |
8162 | ldx [%g4],%g2 | |
8163 | cmp %g3,%g2 ! %f6 = 5e9e11ff 6b6c2202 | |
8164 | bne %xcc,p0_freg_check_fail | |
8165 | mov 0xf06,%g1 | |
8166 | ldx [%g4+0x68],%g3 | |
8167 | std %f8,[%g4] | |
8168 | ldx [%g4],%g2 | |
8169 | cmp %g3,%g2 ! %f8 = 00000000 d81a5b92 | |
8170 | bne %xcc,p0_freg_check_fail | |
8171 | mov 0xf08,%g1 | |
8172 | ldx [%g4+0x70],%g3 | |
8173 | std %f10,[%g4] | |
8174 | ldx [%g4],%g2 | |
8175 | cmp %g3,%g2 ! %f10 = c780ffbb d9876ee7 | |
8176 | bne %xcc,p0_freg_check_fail | |
8177 | mov 0xf10,%g1 | |
8178 | ldx [%g4+0x78],%g3 | |
8179 | std %f12,[%g4] | |
8180 | ldx [%g4],%g2 | |
8181 | cmp %g3,%g2 ! %f12 = 7a000000 0000b68a | |
8182 | bne %xcc,p0_freg_check_fail | |
8183 | mov 0xf12,%g1 | |
8184 | ldx [%g4+0x80],%g3 | |
8185 | std %f14,[%g4] | |
8186 | ldx [%g4],%g2 | |
8187 | cmp %g3,%g2 ! %f14 = ffffffe0 00000000 | |
8188 | bne %xcc,p0_freg_check_fail | |
8189 | mov 0xf14,%g1 | |
8190 | ||
8191 | ! Check Point 37 completed | |
8192 | ||
8193 | ||
8194 | p0_label_186: | |
8195 | ! Mem[0000000030041408] = 00000000, %l0 = ffffffb40000005e | |
8196 | ldstuba [%i1+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
8197 | ! Mem[00000000211c0000] = 0000fe0c, %l3 = 000000005f360000 | |
8198 | ldstub [%o2+%g0],%l3 ! %l3 = 00000000000000ff | |
8199 | ! %f0 = 000000ff, Mem[0000000010001408] = ffb6e09c | |
8200 | sta %f0 ,[%i0+%o4]0x80 ! Mem[0000000010001408] = 000000ff | |
8201 | ! %f26 = 578bd2d3 c3fce2e3, %l6 = 000000000000007a | |
8202 | ! Mem[0000000030141438] = 0000ff74e0ffffff | |
8203 | add %i5,0x038,%g1 | |
8204 | stda %f26,[%g1+%l6]ASI_PST8_SL ! Mem[0000000030141438] = 00e2ffc3d3d28bff | |
8205 | ! Mem[0000000010041428] = 39aced3b8ab6e09c, %l1 = 0000000000000000, %l1 = 0000000000000000 | |
8206 | add %i1,0x28,%g1 | |
8207 | casxa [%g1]0x80,%l1,%l1 ! %l1 = 39aced3b8ab6e09c | |
8208 | ! %f8 = 00000000 d81a5b92, Mem[0000000010081408] = 00000000 000000ff | |
8209 | stda %f8 ,[%i2+0x008]%asi ! Mem[0000000010081408] = 00000000 d81a5b92 | |
8210 | ! Mem[0000000030001400] = ffffffff, %l5 = 00000000000000d7 | |
8211 | lduwa [%i0+%g0]0x81,%l5 ! %l5 = 00000000ffffffff | |
8212 | ! Mem[0000000010001438] = 00000000, %l1 = 39aced3b8ab6e09c, %asi = 80 | |
8213 | swapa [%i0+0x038]%asi,%l1 ! %l1 = 0000000000000000 | |
8214 | ! Mem[0000000010141408] = 000000ff, %l3 = 0000000000000000 | |
8215 | swapa [%i5+%o4]0x88,%l3 ! %l3 = 00000000000000ff | |
8216 | ! Starting 10 instruction Load Burst | |
8217 | ! Mem[000000001010140c] = 00000091, %l1 = 0000000000000000 | |
8218 | ldsba [%i4+0x00e]%asi,%l1 ! %l1 = 0000000000000000 | |
8219 | ||
8220 | p0_label_187: | |
8221 | ! Mem[0000000010181410] = ffffffd7, %l7 = ffffffffffb600ff | |
8222 | ldswa [%i6+0x010]%asi,%l7 ! %l7 = ffffffffffffffd7 | |
8223 | ! Mem[0000000010001400] = 00ff1ad8, %l1 = 0000000000000000 | |
8224 | lduwa [%i0+%g0]0x80,%l1 ! %l1 = 0000000000ff1ad8 | |
8225 | ! Mem[0000000030181408] = ffffffff, %l1 = 0000000000ff1ad8 | |
8226 | ldsha [%i6+%o4]0x81,%l1 ! %l1 = ffffffffffffffff | |
8227 | ! Mem[0000000030001400] = ffffffff00740000, %l1 = ffffffffffffffff | |
8228 | ldxa [%i0+%g0]0x81,%l1 ! %l1 = ffffffff00740000 | |
8229 | ! Mem[000000001000140c] = ffffffff, %l2 = 000000000000cd10 | |
8230 | lduh [%i0+0x00c],%l2 ! %l2 = 000000000000ffff | |
8231 | ! Mem[0000000030081410] = ffffffff, %f31 = 480207d9 | |
8232 | lda [%i2+%o5]0x89,%f31 ! %f31 = ffffffff | |
8233 | ! Mem[0000000010141410] = ffffffff ff00b6ff, %l0 = 00000000, %l1 = 00740000 | |
8234 | ldda [%i5+%o5]0x88,%l0 ! %l0 = 00000000ff00b6ff 00000000ffffffff | |
8235 | ! Mem[000000001000143c] = 00007a9a, %l2 = 000000000000ffff | |
8236 | ldsha [%i0+0x03e]%asi,%l2 ! %l2 = 0000000000007a9a | |
8237 | ! Mem[0000000010141408] = 00000000, %l0 = 00000000ff00b6ff | |
8238 | lduba [%i5+%o4]0x80,%l0 ! %l0 = 0000000000000000 | |
8239 | ! Starting 10 instruction Store Burst | |
8240 | ! %f0 = 000000ff caffffff b8c2204b 0a8d001a | |
8241 | ! %f4 = 578bd2d3 c3fce2e3 5e9e11ff 6b6c2202 | |
8242 | ! %f8 = 00000000 d81a5b92 c780ffbb d9876ee7 | |
8243 | ! %f12 = 7a000000 0000b68a ffffffe0 00000000 | |
8244 | stda %f0,[%i4]ASI_COMMIT_P ! Block Store to 0000000010101400 | |
8245 | ||
8246 | p0_label_188: | |
8247 | ! Mem[0000000030081410] = ffffffff, %l7 = ffffffffffffffd7 | |
8248 | ldstuba [%i2+%o5]0x81,%l7 ! %l7 = 000000ff000000ff | |
8249 | ! Mem[00000000100c1414] = c3fce2e3, %l7 = 00000000000000ff | |
8250 | ldstuba [%i3+0x014]%asi,%l7 ! %l7 = 000000c3000000ff | |
8251 | ! %f18 = 000000ff 000000ff, Mem[0000000010141408] = 00000000 0000ffff | |
8252 | stda %f18,[%i5+%o4]0x80 ! Mem[0000000010141408] = 000000ff 000000ff | |
8253 | ! %l2 = 00007a9a, %l3 = 000000ff, Mem[0000000030041410] = cd1094c4 0000006e | |
8254 | stda %l2,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00007a9a 000000ff | |
8255 | ! %f26 = 578bd2d3 c3fce2e3, %l0 = 0000000000000000 | |
8256 | ! Mem[0000000010141418] = 0000009157119e5e | |
8257 | add %i5,0x018,%g1 | |
8258 | stda %f26,[%g1+%l0]ASI_PST8_PL ! Mem[0000000010141418] = 0000009157119e5e | |
8259 | ! Mem[00000000100c1410] = d3d28b57, %l5 = 00000000ffffffff | |
8260 | swapa [%i3+%o5]0x88,%l5 ! %l5 = 00000000d3d28b57 | |
8261 | ! %f0 = 000000ff caffffff b8c2204b 0a8d001a | |
8262 | ! %f4 = 578bd2d3 c3fce2e3 5e9e11ff 6b6c2202 | |
8263 | ! %f8 = 00000000 d81a5b92 c780ffbb d9876ee7 | |
8264 | ! %f12 = 7a000000 0000b68a ffffffe0 00000000 | |
8265 | stda %f0,[%i1]ASI_COMMIT_S ! Block Store to 0000000030041400 | |
8266 | ! %l3 = 00000000000000ff, Mem[0000000021800080] = ddff0b33 | |
8267 | stb %l3,[%o3+0x080] ! Mem[0000000021800080] = ffff0b33 | |
8268 | membar #Sync ! Added by membar checker (48) | |
8269 | ! %l5 = 00000000d3d28b57, Mem[0000000030041400] = ff000000 | |
8270 | stwa %l5,[%i1+%g0]0x89 ! Mem[0000000030041400] = d3d28b57 | |
8271 | ! Starting 10 instruction Load Burst | |
8272 | ! Mem[0000000010141408] = ff000000, %l5 = 00000000d3d28b57 | |
8273 | ldsha [%i5+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
8274 | ||
8275 | p0_label_189: | |
8276 | ! Mem[0000000010081408] = 00000000, %l5 = 0000000000000000 | |
8277 | ldswa [%i2+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
8278 | ! Mem[0000000010101410] = 578bd2d3, %l0 = 0000000000000000 | |
8279 | ldsba [%i4+%o5]0x80,%l0 ! %l0 = 0000000000000057 | |
8280 | ! Mem[0000000010081420] = 000000ff ff000000, %l4 = ffffffff, %l5 = 00000000 | |
8281 | ldda [%i2+0x020]%asi,%l4 ! %l4 = 00000000000000ff 00000000ff000000 | |
8282 | ! Mem[00000000100c142c] = d9876ee7, %l4 = 00000000000000ff | |
8283 | ldsb [%i3+0x02c],%l4 ! %l4 = ffffffffffffffd9 | |
8284 | ! Mem[0000000030041408] = b8c2204b, %l6 = 000000000000007a | |
8285 | lduba [%i1+%o4]0x81,%l6 ! %l6 = 00000000000000b8 | |
8286 | ! Mem[0000000030181400] = 00000000, %l6 = 00000000000000b8 | |
8287 | lduwa [%i6+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
8288 | ! Mem[00000000300c1410] = 00000000000000a3, %f20 = d7ffffff cd1094c4 | |
8289 | ldda [%i3+%o5]0x89,%f20 ! %f20 = 00000000 000000a3 | |
8290 | ! Mem[0000000010081400] = ff000000, %l4 = ffffffffffffffd9 | |
8291 | lduha [%i2+%g0]0x80,%l4 ! %l4 = 000000000000ff00 | |
8292 | ! %l1 = 00000000ffffffff, %l6 = 0000000000000000, %l0 = 0000000000000057 | |
8293 | orn %l1,%l6,%l0 ! %l0 = ffffffffffffffff | |
8294 | ! Starting 10 instruction Store Burst | |
8295 | ! %l2 = 0000000000007a9a, Mem[00000000100c1400] = 000000ffcaffffff | |
8296 | stxa %l2,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 0000000000007a9a | |
8297 | ||
8298 | p0_label_190: | |
8299 | ! %l6 = 0000000000000000, Mem[0000000020800001] = 00000db6 | |
8300 | stb %l6,[%o1+0x001] ! Mem[0000000020800000] = 00000db6 | |
8301 | ! Mem[0000000030081400] = 000000ff, %l5 = 00000000ff000000 | |
8302 | ldstuba [%i2+%g0]0x89,%l5 ! %l5 = 000000ff000000ff | |
8303 | ! %f29 = e46dee46, Mem[00000000100c1400] = 00000000 | |
8304 | sta %f29,[%i3+%g0]0x80 ! Mem[00000000100c1400] = e46dee46 | |
8305 | ! Mem[00000000100c1410] = ffffffff, %l1 = 00000000ffffffff | |
8306 | swapa [%i3+%o5]0x88,%l1 ! %l1 = 00000000ffffffff | |
8307 | ! Mem[0000000010081410] = 000000ff, %l1 = 00000000ffffffff | |
8308 | swapa [%i2+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
8309 | ! Mem[0000000010081404] = d7ffffff, %l4 = 000000000000ff00 | |
8310 | swap [%i2+0x004],%l4 ! %l4 = 00000000d7ffffff | |
8311 | ! %l5 = 00000000000000ff, Mem[0000000010181400] = ff00b6ff | |
8312 | stwa %l5,[%i6+%g0]0x80 ! Mem[0000000010181400] = 000000ff | |
8313 | ! Mem[0000000030181410] = 00000000, %l5 = 00000000000000ff | |
8314 | ldstuba [%i6+%o5]0x81,%l5 ! %l5 = 00000000000000ff | |
8315 | ! Mem[0000000010001410] = 00000000, %l2 = 0000000000007a9a | |
8316 | ldstuba [%i0+%o5]0x88,%l2 ! %l2 = 00000000000000ff | |
8317 | ! Starting 10 instruction Load Burst | |
8318 | ! Mem[0000000010041418] = 00000091, %l4 = 00000000d7ffffff | |
8319 | lduwa [%i1+0x018]%asi,%l4 ! %l4 = 0000000000000091 | |
8320 | ||
8321 | ! Check Point 38 for processor 0 | |
8322 | ||
8323 | set p0_check_pt_data_38,%g4 | |
8324 | rd %ccr,%g5 ! %g5 = 44 | |
8325 | ldx [%g4+0x08],%g2 | |
8326 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
8327 | bne %xcc,p0_reg_check_fail0 | |
8328 | mov 0xee0,%g1 | |
8329 | ldx [%g4+0x10],%g2 | |
8330 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
8331 | bne %xcc,p0_reg_check_fail1 | |
8332 | mov 0xee1,%g1 | |
8333 | ldx [%g4+0x18],%g2 | |
8334 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
8335 | bne %xcc,p0_reg_check_fail2 | |
8336 | mov 0xee2,%g1 | |
8337 | ldx [%g4+0x20],%g2 | |
8338 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
8339 | bne %xcc,p0_reg_check_fail3 | |
8340 | mov 0xee3,%g1 | |
8341 | ldx [%g4+0x28],%g2 | |
8342 | cmp %l4,%g2 ! %l4 = 0000000000000091 | |
8343 | bne %xcc,p0_reg_check_fail4 | |
8344 | mov 0xee4,%g1 | |
8345 | ldx [%g4+0x30],%g2 | |
8346 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
8347 | bne %xcc,p0_reg_check_fail5 | |
8348 | mov 0xee5,%g1 | |
8349 | ldx [%g4+0x38],%g2 | |
8350 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
8351 | bne %xcc,p0_reg_check_fail6 | |
8352 | mov 0xee6,%g1 | |
8353 | ldx [%g4+0x40],%g2 | |
8354 | cmp %l7,%g2 ! %l7 = 00000000000000c3 | |
8355 | bne %xcc,p0_reg_check_fail7 | |
8356 | mov 0xee7,%g1 | |
8357 | ldx [%g4+0x48],%g3 | |
8358 | std %f0,[%g4] | |
8359 | ldx [%g4],%g2 | |
8360 | cmp %g3,%g2 ! %f0 = 000000ff caffffff | |
8361 | bne %xcc,p0_freg_check_fail | |
8362 | mov 0xf00,%g1 | |
8363 | ldx [%g4+0x50],%g3 | |
8364 | std %f4,[%g4] | |
8365 | ldx [%g4],%g2 | |
8366 | cmp %g3,%g2 ! %f4 = 578bd2d3 c3fce2e3 | |
8367 | bne %xcc,p0_freg_check_fail | |
8368 | mov 0xf04,%g1 | |
8369 | ldx [%g4+0x58],%g3 | |
8370 | std %f20,[%g4] | |
8371 | ldx [%g4],%g2 | |
8372 | cmp %g3,%g2 ! %f20 = 00000000 000000a3 | |
8373 | bne %xcc,p0_freg_check_fail | |
8374 | mov 0xf20,%g1 | |
8375 | ldx [%g4+0x60],%g3 | |
8376 | std %f30,[%g4] | |
8377 | ldx [%g4],%g2 | |
8378 | cmp %g3,%g2 ! %f30 = 4b20c2b8 ffffffff | |
8379 | bne %xcc,p0_freg_check_fail | |
8380 | mov 0xf30,%g1 | |
8381 | ||
8382 | ! Check Point 38 completed | |
8383 | ||
8384 | ||
8385 | p0_label_191: | |
8386 | ! Mem[0000000030041400] = d3d28b57, %l6 = 0000000000000000 | |
8387 | lduha [%i1+%g0]0x89,%l6 ! %l6 = 0000000000008b57 | |
8388 | ! Mem[00000000100c1410] = ffffffff, %l6 = 0000000000008b57 | |
8389 | lduwa [%i3+%o5]0x80,%l6 ! %l6 = 00000000ffffffff | |
8390 | ! Mem[0000000010101410] = e3e2fcc3 d3d28b57, %l6 = ffffffff, %l7 = 000000c3 | |
8391 | ldda [%i4+%o5]0x88,%l6 ! %l6 = 00000000d3d28b57 00000000e3e2fcc3 | |
8392 | ! Mem[0000000010141400] = ffffff00, %l0 = ffffffffffffffff | |
8393 | ldsba [%i5+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
8394 | ! Mem[0000000010001408] = 000000ffffffffff, %l5 = 0000000000000000 | |
8395 | ldxa [%i0+%o4]0x80,%l5 ! %l5 = 000000ffffffffff | |
8396 | ! Mem[0000000010081418] = d9876ee7f8d13fed, %f10 = c780ffbb d9876ee7 | |
8397 | ldd [%i2+0x018],%f10 ! %f10 = d9876ee7 f8d13fed | |
8398 | ! Mem[0000000010041410] = ffff0000, %l7 = 00000000e3e2fcc3 | |
8399 | lduwa [%i1+%o5]0x80,%l7 ! %l7 = 00000000ffff0000 | |
8400 | ! Mem[00000000201c0000] = ffff1669, %l1 = 00000000000000ff | |
8401 | ldsb [%o0+%g0],%l1 ! %l1 = ffffffffffffffff | |
8402 | ! Mem[0000000030141400] = 00000000 ffffffff ffff00ff ffffffff | |
8403 | ! Mem[0000000030141410] = 0000365f 00ffffff ff00b6f1 ffff275e | |
8404 | ! Mem[0000000030141420] = 925b1ad8 00000000 7a000000 00007400 | |
8405 | ! Mem[0000000030141430] = ffffffff 9b4387d9 00e2ffc3 d3d28bff | |
8406 | ldda [%i5]ASI_BLK_S,%f0 ! Block Load from 0000000030141400 | |
8407 | ! Starting 10 instruction Store Burst | |
8408 | ! %l4 = 0000000000000091, Mem[0000000030001410] = 94000000cd1094c4 | |
8409 | stxa %l4,[%i0+%o5]0x81 ! Mem[0000000030001410] = 0000000000000091 | |
8410 | ||
8411 | p0_label_192: | |
8412 | ! %l0 = 00000000, %l1 = ffffffff, Mem[0000000030001408] = ff000000 ff000000 | |
8413 | stda %l0,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00000000 ffffffff | |
8414 | ! Mem[0000000010041410] = ffff0000, %l2 = 0000000000000000 | |
8415 | swapa [%i1+%o5]0x80,%l2 ! %l2 = 00000000ffff0000 | |
8416 | ! Mem[0000000030041410] = d3d28b57, %l6 = 00000000d3d28b57 | |
8417 | ldstuba [%i1+%o5]0x89,%l6 ! %l6 = 00000057000000ff | |
8418 | ! %f29 = e46dee46, Mem[0000000030001408] = 00000000 | |
8419 | sta %f29,[%i0+%o4]0x81 ! Mem[0000000030001408] = e46dee46 | |
8420 | ! %l6 = 0000000000000057, Mem[0000000030181410] = ff00000057119e5e | |
8421 | stxa %l6,[%i6+%o5]0x81 ! Mem[0000000030181410] = 0000000000000057 | |
8422 | ! %l6 = 0000000000000057, Mem[00000000211c0000] = ff00fe0c | |
8423 | stb %l6,[%o2+%g0] ! Mem[00000000211c0000] = 5700fe0c | |
8424 | ! %l7 = 00000000ffff0000, Mem[0000000030001400] = ffffffff | |
8425 | stha %l7,[%i0+%g0]0x89 ! Mem[0000000030001400] = ffff0000 | |
8426 | ! %l7 = 00000000ffff0000, Mem[0000000010001414] = 0000004d, %asi = 80 | |
8427 | stwa %l7,[%i0+0x014]%asi ! Mem[0000000010001414] = ffff0000 | |
8428 | membar #Sync ! Added by membar checker (49) | |
8429 | ! %f29 = e46dee46, Mem[0000000030141400] = 00000000 | |
8430 | sta %f29,[%i5+%g0]0x81 ! Mem[0000000030141400] = e46dee46 | |
8431 | ! Starting 10 instruction Load Burst | |
8432 | ! Mem[0000000010141410] = ffffffffff00b6ff, %f0 = 00000000 ffffffff | |
8433 | ldda [%i5+%o5]0x88,%f0 ! %f0 = ffffffff ff00b6ff | |
8434 | ||
8435 | p0_label_193: | |
8436 | ! Mem[0000000021800080] = ffff0b33, %l7 = 00000000ffff0000 | |
8437 | ldsb [%o3+0x081],%l7 ! %l7 = ffffffffffffffff | |
8438 | ! Mem[0000000030141410] = 0000365f, %l2 = 00000000ffff0000 | |
8439 | lduwa [%i5+%o5]0x81,%l2 ! %l2 = 000000000000365f | |
8440 | ! Mem[0000000010141408] = 000000ff, %f11 = 00007400 | |
8441 | lda [%i5+%o4]0x80,%f11 ! %f11 = 000000ff | |
8442 | ! Mem[0000000010041410] = 00000000, %l5 = 000000ffffffffff | |
8443 | ldsba [%i1+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
8444 | ! Mem[0000000010041400] = ff000000, %l4 = 0000000000000091 | |
8445 | ldsha [%i1+%g0]0x80,%l4 ! %l4 = ffffffffffffff00 | |
8446 | ! Mem[0000000010181400] = ff000000, %l3 = 00000000000000ff | |
8447 | lduwa [%i6+%g0]0x88,%l3 ! %l3 = 00000000ff000000 | |
8448 | ! Mem[0000000030081408] = 00000000, %l3 = 00000000ff000000 | |
8449 | ldsba [%i2+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
8450 | ! Mem[00000000300c1410] = 000000a3, %l0 = 0000000000000000 | |
8451 | lduwa [%i3+%o5]0x89,%l0 ! %l0 = 00000000000000a3 | |
8452 | ! Mem[0000000030101408] = ffffffff000000ff, %f26 = 578bd2d3 c3fce2e3 | |
8453 | ldda [%i4+%o4]0x89,%f26 ! %f26 = ffffffff 000000ff | |
8454 | ! Starting 10 instruction Store Burst | |
8455 | ! %l2 = 000000000000365f, Mem[00000000300c1410] = a3000000 | |
8456 | stba %l2,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 5f000000 | |
8457 | ||
8458 | p0_label_194: | |
8459 | ! Mem[0000000021800181] = e2cfdb07, %l4 = ffffffffffffff00 | |
8460 | ldstuba [%o3+0x181]%asi,%l4 ! %l4 = 000000cf000000ff | |
8461 | ! Mem[0000000010001400] = d81aff00, %l6 = 0000000000000057 | |
8462 | ldstuba [%i0+%g0]0x88,%l6 ! %l6 = 00000000000000ff | |
8463 | ! Mem[000000001008142c] = a309ade0, %l4 = 000000cf, %l4 = 000000cf | |
8464 | add %i2,0x2c,%g1 | |
8465 | casa [%g1]0x80,%l4,%l4 ! %l4 = 00000000a309ade0 | |
8466 | ! Mem[0000000030001408] = e46dee46, %l5 = 0000000000000000 | |
8467 | ldstuba [%i0+%o4]0x81,%l5 ! %l5 = 000000e4000000ff | |
8468 | ! %l6 = 0000000000000000, Mem[0000000010081400] = 00ff0000000000ff | |
8469 | stxa %l6,[%i2+%g0]0x88 ! Mem[0000000010081400] = 0000000000000000 | |
8470 | ! Mem[0000000030181408] = ffffffff, %l6 = 0000000000000000 | |
8471 | swapa [%i6+%o4]0x89,%l6 ! %l6 = 00000000ffffffff | |
8472 | ! %l3 = 0000000000000000, Mem[0000000030001410] = 00000000 | |
8473 | stba %l3,[%i0+%o5]0x81 ! Mem[0000000030001410] = 00000000 | |
8474 | ! Mem[0000000030001410] = 00000000, %l6 = 00000000ffffffff | |
8475 | ldstuba [%i0+%o5]0x81,%l6 ! %l6 = 00000000000000ff | |
8476 | ! %f6 = ff00b6f1 ffff275e, Mem[0000000010001410] = ff000000 ffff0000 | |
8477 | stda %f6 ,[%i0+%o5]0x80 ! Mem[0000000010001410] = ff00b6f1 ffff275e | |
8478 | ! Starting 10 instruction Load Burst | |
8479 | ! Mem[000000001014143c] = e46dee46, %l2 = 000000000000365f | |
8480 | lduh [%i5+0x03e],%l2 ! %l2 = 000000000000ee46 | |
8481 | ||
8482 | p0_label_195: | |
8483 | ! Mem[0000000010141410] = ffffffffff00b6ff, %l3 = 0000000000000000 | |
8484 | ldxa [%i5+%o5]0x88,%l3 ! %l3 = ffffffffff00b6ff | |
8485 | ! Mem[0000000030181410] = 00000000, %l6 = 0000000000000000 | |
8486 | ldswa [%i6+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
8487 | ! Mem[0000000010101410] = d3d28b57, %l5 = 00000000000000e4 | |
8488 | ldsba [%i4+%o5]0x88,%l5 ! %l5 = 0000000000000057 | |
8489 | ! Mem[0000000020800040] = 00ff9ffa, %l4 = 00000000a309ade0 | |
8490 | ldub [%o1+0x040],%l4 ! %l4 = 0000000000000000 | |
8491 | ! Mem[00000000300c1400] = ffffffff, %l5 = 0000000000000057 | |
8492 | ldsba [%i3+%g0]0x89,%l5 ! %l5 = ffffffffffffffff | |
8493 | ! Code Fragment 3 | |
8494 | p0_fragment_3: | |
8495 | ! %l0 = 00000000000000a3 | |
8496 | setx 0x206a4b205f957e51,%g7,%l0 ! %l0 = 206a4b205f957e51 | |
8497 | ! %l1 = ffffffffffffffff | |
8498 | setx 0x89a68d27fabd3276,%g7,%l1 ! %l1 = 89a68d27fabd3276 | |
8499 | setx 0x1fe000, %g1, %g3 | |
8500 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
8501 | setx 0x1ffff8, %g1, %g2 | |
8502 | and %l0, %g2, %l0 | |
8503 | ta T_CHANGE_HPRIV | |
8504 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
8505 | ta T_CHANGE_NONHPRIV | |
8506 | ! %l0 = 206a4b205f957e51 | |
8507 | setx 0x63e90d683eb33a19,%g7,%l0 ! %l0 = 63e90d683eb33a19 | |
8508 | ! %l1 = 89a68d27fabd3276 | |
8509 | setx 0x2c2b00904dad5043,%g7,%l1 ! %l1 = 2c2b00904dad5043 | |
8510 | ! Mem[00000000201c0000] = ffff1669, %l2 = 000000000000ee46 | |
8511 | ldsba [%o0+0x001]%asi,%l2 ! %l2 = ffffffffffffffff | |
8512 | ! Mem[0000000010081400] = 00000000 00000000, %l0 = 3eb33a19, %l1 = 4dad5043 | |
8513 | ldda [%i2+%g0]0x80,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
8514 | ! Mem[000000001010140c] = 0a8d001a, %l3 = ffffffffff00b6ff | |
8515 | ldub [%i4+0x00c],%l3 ! %l3 = 000000000000000a | |
8516 | ! Starting 10 instruction Store Burst | |
8517 | ! %l7 = ffffffffffffffff, Mem[0000000030141408] = ffff00ffffffffff | |
8518 | stxa %l7,[%i5+%o4]0x81 ! Mem[0000000030141408] = ffffffffffffffff | |
8519 | ||
8520 | ! Check Point 39 for processor 0 | |
8521 | ||
8522 | set p0_check_pt_data_39,%g4 | |
8523 | rd %ccr,%g5 ! %g5 = 44 | |
8524 | ldx [%g4+0x08],%g2 | |
8525 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
8526 | bne %xcc,p0_reg_check_fail0 | |
8527 | mov 0xee0,%g1 | |
8528 | ldx [%g4+0x10],%g2 | |
8529 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
8530 | bne %xcc,p0_reg_check_fail1 | |
8531 | mov 0xee1,%g1 | |
8532 | ldx [%g4+0x18],%g2 | |
8533 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
8534 | bne %xcc,p0_reg_check_fail2 | |
8535 | mov 0xee2,%g1 | |
8536 | ldx [%g4+0x20],%g2 | |
8537 | cmp %l3,%g2 ! %l3 = 000000000000000a | |
8538 | bne %xcc,p0_reg_check_fail3 | |
8539 | mov 0xee3,%g1 | |
8540 | ldx [%g4+0x28],%g2 | |
8541 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
8542 | bne %xcc,p0_reg_check_fail4 | |
8543 | mov 0xee4,%g1 | |
8544 | ldx [%g4+0x30],%g2 | |
8545 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
8546 | bne %xcc,p0_reg_check_fail5 | |
8547 | mov 0xee5,%g1 | |
8548 | ldx [%g4+0x38],%g2 | |
8549 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
8550 | bne %xcc,p0_reg_check_fail6 | |
8551 | mov 0xee6,%g1 | |
8552 | ldx [%g4+0x40],%g2 | |
8553 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
8554 | bne %xcc,p0_reg_check_fail7 | |
8555 | mov 0xee7,%g1 | |
8556 | ldx [%g4+0x48],%g3 | |
8557 | std %f0,[%g4] | |
8558 | ldx [%g4],%g2 | |
8559 | cmp %g3,%g2 ! %f0 = ffffffff ff00b6ff | |
8560 | bne %xcc,p0_freg_check_fail | |
8561 | mov 0xf00,%g1 | |
8562 | ldx [%g4+0x50],%g3 | |
8563 | std %f2,[%g4] | |
8564 | ldx [%g4],%g2 | |
8565 | cmp %g3,%g2 ! %f2 = ffff00ff ffffffff | |
8566 | bne %xcc,p0_freg_check_fail | |
8567 | mov 0xf02,%g1 | |
8568 | ldx [%g4+0x58],%g3 | |
8569 | std %f4,[%g4] | |
8570 | ldx [%g4],%g2 | |
8571 | cmp %g3,%g2 ! %f4 = 0000365f 00ffffff | |
8572 | bne %xcc,p0_freg_check_fail | |
8573 | mov 0xf04,%g1 | |
8574 | ldx [%g4+0x60],%g3 | |
8575 | std %f6,[%g4] | |
8576 | ldx [%g4],%g2 | |
8577 | cmp %g3,%g2 ! %f6 = ff00b6f1 ffff275e | |
8578 | bne %xcc,p0_freg_check_fail | |
8579 | mov 0xf06,%g1 | |
8580 | ldx [%g4+0x68],%g3 | |
8581 | std %f8,[%g4] | |
8582 | ldx [%g4],%g2 | |
8583 | cmp %g3,%g2 ! %f8 = 925b1ad8 00000000 | |
8584 | bne %xcc,p0_freg_check_fail | |
8585 | mov 0xf08,%g1 | |
8586 | ldx [%g4+0x70],%g3 | |
8587 | std %f10,[%g4] | |
8588 | ldx [%g4],%g2 | |
8589 | cmp %g3,%g2 ! %f10 = 7a000000 000000ff | |
8590 | bne %xcc,p0_freg_check_fail | |
8591 | mov 0xf10,%g1 | |
8592 | ldx [%g4+0x78],%g3 | |
8593 | std %f12,[%g4] | |
8594 | ldx [%g4],%g2 | |
8595 | cmp %g3,%g2 ! %f12 = ffffffff 9b4387d9 | |
8596 | bne %xcc,p0_freg_check_fail | |
8597 | mov 0xf12,%g1 | |
8598 | ldx [%g4+0x80],%g3 | |
8599 | std %f14,[%g4] | |
8600 | ldx [%g4],%g2 | |
8601 | cmp %g3,%g2 ! %f14 = 00e2ffc3 d3d28bff | |
8602 | bne %xcc,p0_freg_check_fail | |
8603 | mov 0xf14,%g1 | |
8604 | ldx [%g4+0x88],%g3 | |
8605 | std %f26,[%g4] | |
8606 | ldx [%g4],%g2 | |
8607 | cmp %g3,%g2 ! %f26 = ffffffff 000000ff | |
8608 | bne %xcc,p0_freg_check_fail | |
8609 | mov 0xf26,%g1 | |
8610 | ||
8611 | ! Check Point 39 completed | |
8612 | ||
8613 | ||
8614 | p0_label_196: | |
8615 | ! Mem[0000000020800040] = 00ff9ffa, %l4 = 0000000000000000 | |
8616 | ldstub [%o1+0x040],%l4 ! %l4 = 00000000000000ff | |
8617 | ! %f10 = 7a000000, Mem[0000000010141410] = ffb600ff | |
8618 | sta %f10,[%i5+%o5]0x80 ! Mem[0000000010141410] = 7a000000 | |
8619 | ! %l6 = 0000000000000000, Mem[0000000010041408] = ffffffff00000000 | |
8620 | stxa %l6,[%i1+%o4]0x88 ! Mem[0000000010041408] = 0000000000000000 | |
8621 | ! %l6 = 0000000000000000, Mem[00000000100c1410] = ffffffff | |
8622 | stha %l6,[%i3+%o5]0x88 ! Mem[00000000100c1410] = ffff0000 | |
8623 | ! Mem[0000000020800041] = ffff9ffa, %l0 = 0000000000000000 | |
8624 | ldstub [%o1+0x041],%l0 ! %l0 = 000000ff000000ff | |
8625 | ! %f18 = 000000ff 000000ff, %l3 = 000000000000000a | |
8626 | ! Mem[0000000030101410] = d7ffffffe0ff008b | |
8627 | add %i4,0x010,%g1 | |
8628 | stda %f18,[%g1+%l3]ASI_PST32_SL ! Mem[0000000030101410] = d7ffffffff000000 | |
8629 | ! %l4 = 00000000, %l5 = ffffffff, Mem[0000000030081400] = ff000000 ffffffff | |
8630 | stda %l4,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000000 ffffffff | |
8631 | ! %l2 = ffffffffffffffff, Mem[0000000030001410] = ff000000 | |
8632 | stha %l2,[%i0+%o5]0x81 ! Mem[0000000030001410] = ffff0000 | |
8633 | ! Mem[0000000030181410] = 00000000, %l5 = ffffffffffffffff | |
8634 | swapa [%i6+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
8635 | ! Starting 10 instruction Load Burst | |
8636 | ! Mem[00000000201c0000] = ffff1669, %l7 = ffffffffffffffff | |
8637 | lduh [%o0+%g0],%l7 ! %l7 = 000000000000ffff | |
8638 | ||
8639 | p0_label_197: | |
8640 | ! Mem[0000000010141410] = 0000007a, %f14 = 00e2ffc3 | |
8641 | lda [%i5+%o5]0x88,%f14 ! %f14 = 0000007a | |
8642 | ! Mem[00000000100c1400] = e46dee46, %l5 = 0000000000000000 | |
8643 | ldsha [%i3+%g0]0x80,%l5 ! %l5 = ffffffffffffe46d | |
8644 | ! Mem[0000000010101420] = 00000000, %l7 = 000000000000ffff | |
8645 | ldub [%i4+0x022],%l7 ! %l7 = 0000000000000000 | |
8646 | ! Mem[0000000030001400] = ffff0000, %l0 = 00000000000000ff | |
8647 | lduwa [%i0+%g0]0x89,%l0 ! %l0 = 00000000ffff0000 | |
8648 | ! Mem[0000000010041408] = 0000000000000000, %f26 = ffffffff 000000ff | |
8649 | ldda [%i1+%o4]0x80,%f26 ! %f26 = 00000000 00000000 | |
8650 | ! Mem[0000000020800000] = 00000db6, %l7 = 0000000000000000 | |
8651 | lduh [%o1+%g0],%l7 ! %l7 = 0000000000000000 | |
8652 | ! Mem[00000000100c1438] = ffffffe0, %l3 = 000000000000000a | |
8653 | ldsh [%i3+0x03a],%l3 ! %l3 = ffffffffffffffe0 | |
8654 | ! Mem[0000000030101408] = 000000ff, %f25 = 8e2d6ade | |
8655 | lda [%i4+%o4]0x89,%f25 ! %f25 = 000000ff | |
8656 | ! Mem[0000000030081400] = 00000000ffffffff, %l4 = 0000000000000000 | |
8657 | ldxa [%i2+%g0]0x81,%l4 ! %l4 = 00000000ffffffff | |
8658 | ! Starting 10 instruction Store Burst | |
8659 | ! Mem[0000000010001400] = ffff1ad8, %l1 = 0000000000000000 | |
8660 | ldstuba [%i0+%g0]0x80,%l1 ! %l1 = 000000ff000000ff | |
8661 | ||
8662 | p0_label_198: | |
8663 | ! Mem[0000000010041410] = 00000000, %l4 = 00000000ffffffff | |
8664 | ldstuba [%i1+%o5]0x80,%l4 ! %l4 = 00000000000000ff | |
8665 | ! %l4 = 0000000000000000, Mem[0000000020800001] = 00000db6, %asi = 80 | |
8666 | stba %l4,[%o1+0x001]%asi ! Mem[0000000020800000] = 00000db6 | |
8667 | ! %f25 = 000000ff, Mem[0000000030081408] = 00000000 | |
8668 | sta %f25,[%i2+%o4]0x81 ! Mem[0000000030081408] = 000000ff | |
8669 | ! %l3 = ffffffffffffffe0, Mem[0000000030041400] = 578bd2d3 | |
8670 | stha %l3,[%i1+%g0]0x81 ! Mem[0000000030041400] = ffe0d2d3 | |
8671 | ! Mem[0000000010001408] = 000000ff, %l0 = 00000000ffff0000 | |
8672 | swapa [%i0+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
8673 | ! %f4 = 0000365f, Mem[00000000100c1408] = b8c2204b | |
8674 | sta %f4 ,[%i3+0x008]%asi ! Mem[00000000100c1408] = 0000365f | |
8675 | ! %l5 = ffffffffffffe46d, Mem[0000000030041408] = b8c2204b0a8d001a | |
8676 | stxa %l5,[%i1+%o4]0x81 ! Mem[0000000030041408] = ffffffffffffe46d | |
8677 | ! %l3 = ffffffffffffffe0, Mem[0000000010041410] = ff000000 | |
8678 | stba %l3,[%i1+%o5]0x80 ! Mem[0000000010041410] = e0000000 | |
8679 | ! %l0 = 000000ff, %l1 = 000000ff, Mem[0000000030101408] = 000000ff ffffffff | |
8680 | stda %l0,[%i4+%o4]0x89 ! Mem[0000000030101408] = 000000ff 000000ff | |
8681 | ! Starting 10 instruction Load Burst | |
8682 | ! Mem[0000000030081410] = ffffffff, %f21 = 000000a3 | |
8683 | lda [%i2+%o5]0x89,%f21 ! %f21 = ffffffff | |
8684 | ||
8685 | p0_label_199: | |
8686 | ! Mem[0000000030081400] = 00000000, %l0 = 00000000000000ff | |
8687 | ldsha [%i2+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
8688 | ! Mem[0000000010101410] = e3e2fcc3d3d28b57, %f0 = ffffffff ff00b6ff | |
8689 | ldda [%i4+%o5]0x88,%f0 ! %f0 = e3e2fcc3 d3d28b57 | |
8690 | ! Mem[0000000021800180] = e2ffdb07, %l4 = 0000000000000000 | |
8691 | ldsha [%o3+0x180]%asi,%l4 ! %l4 = ffffffffffffe2ff | |
8692 | ! Mem[0000000010101400] = 000000ff, %l3 = ffffffffffffffe0 | |
8693 | ldswa [%i4+%g0]0x80,%l3 ! %l3 = 00000000000000ff | |
8694 | ! Mem[0000000010041410] = e0000000, %l4 = ffffffffffffe2ff | |
8695 | lduwa [%i1+%o5]0x80,%l4 ! %l4 = 00000000e0000000 | |
8696 | ! Mem[0000000030001410] = ffff0000, %l0 = 0000000000000000 | |
8697 | lduba [%i0+%o5]0x81,%l0 ! %l0 = 00000000000000ff | |
8698 | ! Mem[0000000010181408] = ffffffff, %l6 = 0000000000000000 | |
8699 | ldsb [%i6+0x00a],%l6 ! %l6 = ffffffffffffffff | |
8700 | ! Mem[000000001010142c] = d9876ee7, %l3 = 00000000000000ff | |
8701 | ldsba [%i4+0x02c]%asi,%l3 ! %l3 = ffffffffffffffd9 | |
8702 | ! Mem[0000000010041400] = ffff94ff 000000ff, %l6 = ffffffff, %l7 = 00000000 | |
8703 | ldda [%i1+%g0]0x88,%l6 ! %l6 = 00000000000000ff 00000000ffff94ff | |
8704 | ! Starting 10 instruction Store Burst | |
8705 | ! %l6 = 00000000000000ff, Mem[0000000030101408] = ff000000 | |
8706 | stba %l6,[%i4+%o4]0x81 ! Mem[0000000030101408] = ff000000 | |
8707 | ||
8708 | p0_label_200: | |
8709 | ! Mem[000000001004141c] = 57119e5e, %l6 = 000000ff, %l2 = ffffffff | |
8710 | add %i1,0x1c,%g1 | |
8711 | casa [%g1]0x80,%l6,%l2 ! %l2 = 0000000057119e5e | |
8712 | ! %f24 = 06d37253 000000ff, Mem[0000000010181400] = 000000ff 00000000 | |
8713 | stda %f24,[%i6+%g0]0x80 ! Mem[0000000010181400] = 06d37253 000000ff | |
8714 | ! Mem[000000001014141c] = 57119e5e, %l3 = ffffffffffffffd9, %asi = 80 | |
8715 | swapa [%i5+0x01c]%asi,%l3 ! %l3 = 0000000057119e5e | |
8716 | ! %l1 = 00000000000000ff, Mem[0000000010141402] = 00ffffff, %asi = 80 | |
8717 | stba %l1,[%i5+0x002]%asi ! Mem[0000000010141400] = 00ffffff | |
8718 | ! %l2 = 0000000057119e5e, Mem[0000000010141400] = ffffff00 | |
8719 | stha %l2,[%i5+%g0]0x88 ! Mem[0000000010141400] = ffff9e5e | |
8720 | ! %f24 = 06d37253, Mem[0000000030181410] = ffffffff | |
8721 | sta %f24,[%i6+%o5]0x89 ! Mem[0000000030181410] = 06d37253 | |
8722 | ! %l1 = 00000000000000ff, Mem[0000000010081408] = 00000000 | |
8723 | stba %l1,[%i2+%o4]0x88 ! Mem[0000000010081408] = 000000ff | |
8724 | ! %f16 = ffffffff 00740000, %l0 = 00000000000000ff | |
8725 | ! Mem[0000000010141438] = cd10ffc4e46dee46 | |
8726 | add %i5,0x038,%g1 | |
8727 | stda %f16,[%g1+%l0]ASI_PST8_PL ! Mem[0000000010141438] = 00007400ffffffff | |
8728 | ! %l6 = 00000000000000ff, Mem[0000000030041400] = ffffffcad3d2e0ff | |
8729 | stxa %l6,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00000000000000ff | |
8730 | ! Starting 10 instruction Load Burst | |
8731 | ! Mem[0000000010141400] = 5e9effff00000000, %f4 = 0000365f 00ffffff | |
8732 | ldda [%i5+%g0]0x80,%f4 ! %f4 = 5e9effff 00000000 | |
8733 | ||
8734 | ! Check Point 40 for processor 0 | |
8735 | ||
8736 | set p0_check_pt_data_40,%g4 | |
8737 | rd %ccr,%g5 ! %g5 = 44 | |
8738 | ldx [%g4+0x08],%g2 | |
8739 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
8740 | bne %xcc,p0_reg_check_fail0 | |
8741 | mov 0xee0,%g1 | |
8742 | ldx [%g4+0x10],%g2 | |
8743 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
8744 | bne %xcc,p0_reg_check_fail1 | |
8745 | mov 0xee1,%g1 | |
8746 | ldx [%g4+0x18],%g2 | |
8747 | cmp %l3,%g2 ! %l3 = 0000000057119e5e | |
8748 | bne %xcc,p0_reg_check_fail3 | |
8749 | mov 0xee3,%g1 | |
8750 | ldx [%g4+0x20],%g2 | |
8751 | cmp %l4,%g2 ! %l4 = 00000000e0000000 | |
8752 | bne %xcc,p0_reg_check_fail4 | |
8753 | mov 0xee4,%g1 | |
8754 | ldx [%g4+0x28],%g2 | |
8755 | cmp %l5,%g2 ! %l5 = ffffffffffffe46d | |
8756 | bne %xcc,p0_reg_check_fail5 | |
8757 | mov 0xee5,%g1 | |
8758 | ldx [%g4+0x30],%g2 | |
8759 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
8760 | bne %xcc,p0_reg_check_fail6 | |
8761 | mov 0xee6,%g1 | |
8762 | ldx [%g4+0x38],%g2 | |
8763 | cmp %l7,%g2 ! %l7 = 00000000ffff94ff | |
8764 | bne %xcc,p0_reg_check_fail7 | |
8765 | mov 0xee7,%g1 | |
8766 | ldx [%g4+0x40],%g3 | |
8767 | std %f0,[%g4] | |
8768 | ldx [%g4],%g2 | |
8769 | cmp %g3,%g2 ! %f0 = e3e2fcc3 d3d28b57 | |
8770 | bne %xcc,p0_freg_check_fail | |
8771 | mov 0xf00,%g1 | |
8772 | ldx [%g4+0x48],%g3 | |
8773 | std %f4,[%g4] | |
8774 | ldx [%g4],%g2 | |
8775 | cmp %g3,%g2 ! %f4 = 5e9effff 00000000 | |
8776 | bne %xcc,p0_freg_check_fail | |
8777 | mov 0xf04,%g1 | |
8778 | ldx [%g4+0x50],%g3 | |
8779 | std %f6,[%g4] | |
8780 | ldx [%g4],%g2 | |
8781 | cmp %g3,%g2 ! %f6 = ff00b6f1 ffff275e | |
8782 | bne %xcc,p0_freg_check_fail | |
8783 | mov 0xf06,%g1 | |
8784 | ldx [%g4+0x58],%g3 | |
8785 | std %f14,[%g4] | |
8786 | ldx [%g4],%g2 | |
8787 | cmp %g3,%g2 ! %f14 = 0000007a d3d28bff | |
8788 | bne %xcc,p0_freg_check_fail | |
8789 | mov 0xf14,%g1 | |
8790 | ldx [%g4+0x60],%g3 | |
8791 | std %f20,[%g4] | |
8792 | ldx [%g4],%g2 | |
8793 | cmp %g3,%g2 ! %f20 = 00000000 ffffffff | |
8794 | bne %xcc,p0_freg_check_fail | |
8795 | mov 0xf20,%g1 | |
8796 | ldx [%g4+0x68],%g3 | |
8797 | std %f24,[%g4] | |
8798 | ldx [%g4],%g2 | |
8799 | cmp %g3,%g2 ! %f24 = 06d37253 000000ff | |
8800 | bne %xcc,p0_freg_check_fail | |
8801 | mov 0xf24,%g1 | |
8802 | ldx [%g4+0x70],%g3 | |
8803 | std %f26,[%g4] | |
8804 | ldx [%g4],%g2 | |
8805 | cmp %g3,%g2 ! %f26 = 00000000 00000000 | |
8806 | bne %xcc,p0_freg_check_fail | |
8807 | mov 0xf26,%g1 | |
8808 | ||
8809 | ! Check Point 40 completed | |
8810 | ||
8811 | ||
8812 | p0_label_201: | |
8813 | ! Mem[0000000030041410] = ff8bd2d3, %l6 = 00000000000000ff | |
8814 | lduwa [%i1+%o5]0x81,%l6 ! %l6 = 00000000ff8bd2d3 | |
8815 | ! Mem[0000000010181408] = ffffffff ffffffff, %l4 = e0000000, %l5 = ffffe46d | |
8816 | ldda [%i6+0x008]%asi,%l4 ! %l4 = 00000000ffffffff 00000000ffffffff | |
8817 | ! Mem[0000000010141408] = 000000ff, %l3 = 0000000057119e5e | |
8818 | lduha [%i5+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
8819 | ! Mem[00000000300c1400] = ffffffff, %l4 = 00000000ffffffff | |
8820 | ldswa [%i3+%g0]0x81,%l4 ! %l4 = ffffffffffffffff | |
8821 | ! Mem[0000000030081400] = 00000000, %f4 = 5e9effff | |
8822 | lda [%i2+%g0]0x89,%f4 ! %f4 = 00000000 | |
8823 | ! Mem[0000000010101410] = 578bd2d3, %l0 = 00000000000000ff | |
8824 | ldsha [%i4+%o5]0x80,%l0 ! %l0 = 000000000000578b | |
8825 | ! Mem[0000000010101400] = ffffffcaff000000, %f14 = 0000007a d3d28bff | |
8826 | ldda [%i4+%g0]0x88,%f14 ! %f14 = ffffffca ff000000 | |
8827 | ! Mem[0000000010041400] = ff000000, %l6 = 00000000ff8bd2d3 | |
8828 | ldsba [%i1+%g0]0x80,%l6 ! %l6 = ffffffffffffffff | |
8829 | ! Mem[0000000010101418] = 5e9e11ff, %l1 = 00000000000000ff | |
8830 | ldsb [%i4+0x01b],%l1 ! %l1 = ffffffffffffffff | |
8831 | ! Starting 10 instruction Store Burst | |
8832 | ! Mem[0000000030101408] = ff000000, %l3 = 0000000000000000 | |
8833 | ldstuba [%i4+%o4]0x81,%l3 ! %l3 = 000000ff000000ff | |
8834 | ||
8835 | p0_label_202: | |
8836 | ! %f1 = d3d28b57, Mem[0000000010181408] = ffffffff | |
8837 | sta %f1 ,[%i6+%o4]0x88 ! Mem[0000000010181408] = d3d28b57 | |
8838 | ! %l3 = 00000000000000ff, %l0 = 000000000000578b, %y = 00000000 | |
8839 | udiv %l3,%l0,%l6 ! %l6 = 0000000000000000 | |
8840 | mov %l0,%y ! %y = 0000578b | |
8841 | ! %l0 = 000000000000578b, Mem[0000000010181424] = ff000000, %asi = 80 | |
8842 | stwa %l0,[%i6+0x024]%asi ! Mem[0000000010181424] = 0000578b | |
8843 | ! %f28 = cd1094c4 e46dee46, Mem[0000000030141410] = 0000365f 00ffffff | |
8844 | stda %f28,[%i5+%o5]0x81 ! Mem[0000000030141410] = cd1094c4 e46dee46 | |
8845 | ! %f25 = 000000ff, Mem[00000000100c1400] = e46dee46 | |
8846 | st %f25,[%i3+%g0] ! Mem[00000000100c1400] = 000000ff | |
8847 | ! %f18 = 000000ff 000000ff, Mem[0000000010081418] = d9876ee7 f8d13fed | |
8848 | std %f18,[%i2+0x018] ! Mem[0000000010081418] = 000000ff 000000ff | |
8849 | ! %l2 = 0000000057119e5e, Mem[0000000021800181] = e2ffdb07, %asi = 80 | |
8850 | stba %l2,[%o3+0x181]%asi ! Mem[0000000021800180] = e25edb07 | |
8851 | ! %f14 = ffffffca ff000000, Mem[0000000010101400] = ff000000 ffffffca | |
8852 | stda %f14,[%i4+%g0]0x88 ! Mem[0000000010101400] = ffffffca ff000000 | |
8853 | ! %l6 = 00000000, %l7 = ffff94ff, Mem[0000000010041400] = ff000000 ff94ffff | |
8854 | stda %l6,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000 ffff94ff | |
8855 | ! Starting 10 instruction Load Burst | |
8856 | ! Mem[0000000010081428] = 00000000, %l5 = 00000000ffffffff | |
8857 | ldsw [%i2+0x028],%l5 ! %l5 = 0000000000000000 | |
8858 | ||
8859 | p0_label_203: | |
8860 | ! Mem[0000000010101414] = c3fce2e3, %l0 = 000000000000578b | |
8861 | ldsw [%i4+0x014],%l0 ! %l0 = ffffffffc3fce2e3 | |
8862 | ! Mem[0000000030041408] = ffffffff ffffe46d, %l0 = c3fce2e3, %l1 = ffffffff | |
8863 | ldda [%i1+%o4]0x81,%l0 ! %l0 = 00000000ffffffff 00000000ffffe46d | |
8864 | membar #Sync ! Added by membar checker (50) | |
8865 | ! Mem[0000000010001400] = ffff1ad8 d7428e9c ffff0000 ffffffff | |
8866 | ! Mem[0000000010001410] = ff00b6f1 ffff275e d9876ee7 f8d13fed | |
8867 | ! Mem[0000000010001420] = 000000ff ff000000 00000000 a309ade0 | |
8868 | ! Mem[0000000010001430] = 0f10ff1a e0ffffff 8ab6e09c 00007a9a | |
8869 | ldda [%i0]ASI_BLK_P,%f16 ! Block Load from 0000000010001400 | |
8870 | ! Mem[0000000030181400] = 00000000d7ffffff, %l6 = 0000000000000000 | |
8871 | ldxa [%i6+%g0]0x81,%l6 ! %l6 = 00000000d7ffffff | |
8872 | ! Mem[0000000010081410] = ffffffffd7ffffff, %f6 = ff00b6f1 ffff275e | |
8873 | ldda [%i2+%o5]0x80,%f6 ! %f6 = ffffffff d7ffffff | |
8874 | ! Mem[0000000010041428] = 39aced3b, %l6 = 00000000d7ffffff | |
8875 | lduw [%i1+0x028],%l6 ! %l6 = 0000000039aced3b | |
8876 | ! Mem[0000000010101420] = 00000000d81a5b92, %f14 = ffffffca ff000000 | |
8877 | ldda [%i4+0x020]%asi,%f14 ! %f14 = 00000000 d81a5b92 | |
8878 | ! Mem[0000000030041408] = ffffffff, %l2 = 0000000057119e5e | |
8879 | ldsba [%i1+%o4]0x81,%l2 ! %l2 = ffffffffffffffff | |
8880 | ! Mem[0000000010001410] = ff00b6f1ffff275e, %l7 = 00000000ffff94ff | |
8881 | ldxa [%i0+%o5]0x80,%l7 ! %l7 = ff00b6f1ffff275e | |
8882 | ! Starting 10 instruction Store Burst | |
8883 | ! %l0 = 00000000ffffffff, Mem[0000000010141408] = ff000000ff000000 | |
8884 | stxa %l0,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000000ffffffff | |
8885 | ||
8886 | p0_label_204: | |
8887 | ! %l1 = 00000000ffffe46d, Mem[00000000100c1434] = 0000b68a | |
8888 | sth %l1,[%i3+0x034] ! Mem[00000000100c1434] = e46db68a | |
8889 | ! Mem[0000000010041418] = 00000091, %l2 = ffffffffffffffff | |
8890 | swap [%i1+0x018],%l2 ! %l2 = 0000000000000091 | |
8891 | ! %l2 = 0000000000000091, Mem[0000000010181410] = ffffffd7 | |
8892 | stba %l2,[%i6+%o5]0x80 ! Mem[0000000010181410] = 91ffffd7 | |
8893 | ! Mem[0000000010101410] = d3d28b57, %l6 = 0000000039aced3b | |
8894 | swapa [%i4+%o5]0x88,%l6 ! %l6 = 00000000d3d28b57 | |
8895 | ! %l4 = ffffffff, %l5 = 00000000, Mem[0000000010181408] = 578bd2d3 ffffffff | |
8896 | stda %l4,[%i6+%o4]0x80 ! Mem[0000000010181408] = ffffffff 00000000 | |
8897 | ! %l5 = 0000000000000000, Mem[00000000300c1408] = 06d372538e2d6ade | |
8898 | stxa %l5,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 0000000000000000 | |
8899 | ! %l7 = ff00b6f1ffff275e, Mem[0000000010181410] = 91ffffd7 | |
8900 | stwa %l7,[%i6+%o5]0x80 ! Mem[0000000010181410] = ffff275e | |
8901 | ! Mem[0000000010001438] = 8ab6e09c00007a9a, %l1 = 00000000ffffe46d, %l2 = 0000000000000091 | |
8902 | add %i0,0x38,%g1 | |
8903 | casxa [%g1]0x80,%l1,%l2 ! %l2 = 8ab6e09c00007a9a | |
8904 | ! %l4 = ffffffffffffffff, Mem[0000000010181408] = ffffffff | |
8905 | stwa %l4,[%i6+%o4]0x88 ! Mem[0000000010181408] = ffffffff | |
8906 | ! Starting 10 instruction Load Burst | |
8907 | ! Mem[0000000030041410] = ff8bd2d3c3fce2e3, %f0 = e3e2fcc3 d3d28b57 | |
8908 | ldda [%i1+%o5]0x81,%f0 ! %f0 = ff8bd2d3 c3fce2e3 | |
8909 | ||
8910 | p0_label_205: | |
8911 | ! Mem[0000000030001410] = ffff0000 00000091, %l2 = 00007a9a, %l3 = 000000ff | |
8912 | ldda [%i0+%o5]0x81,%l2 ! %l2 = 00000000ffff0000 0000000000000091 | |
8913 | ! Mem[0000000030001400] = 0000ffff, %l7 = ff00b6f1ffff275e | |
8914 | ldsha [%i0+%g0]0x81,%l7 ! %l7 = 0000000000000000 | |
8915 | ! Mem[0000000010141400] = 00000000ffff9e5e, %f4 = 00000000 00000000 | |
8916 | ldda [%i5+%g0]0x88,%f4 ! %f4 = 00000000 ffff9e5e | |
8917 | ! Mem[0000000010081408] = ff000000, %l3 = 0000000000000091 | |
8918 | ldsw [%i2+%o4],%l3 ! %l3 = ffffffffff000000 | |
8919 | ! Mem[0000000010181410] = ffff275e, %l4 = ffffffffffffffff | |
8920 | ldswa [%i6+%o5]0x80,%l4 ! %l4 = ffffffffffff275e | |
8921 | ! Mem[0000000030001410] = ffff0000, %l2 = 00000000ffff0000 | |
8922 | ldsha [%i0+%o5]0x81,%l2 ! %l2 = ffffffffffffffff | |
8923 | ! Mem[0000000010041430] = 8ab6e09c, %l7 = 0000000000000000 | |
8924 | lduha [%i1+0x032]%asi,%l7 ! %l7 = 000000000000e09c | |
8925 | ! Mem[0000000030041408] = ffffffff, %l6 = 00000000d3d28b57 | |
8926 | lduwa [%i1+%o4]0x89,%l6 ! %l6 = 00000000ffffffff | |
8927 | ! Mem[00000000201c0000] = ffff1669, %l2 = ffffffffffffffff | |
8928 | ldsh [%o0+%g0],%l2 ! %l2 = ffffffffffffffff | |
8929 | ! Starting 10 instruction Store Burst | |
8930 | ! %l4 = ffff275e, %l5 = 00000000, Mem[0000000010101410] = 3bedac39 c3fce2e3 | |
8931 | stda %l4,[%i4+%o5]0x80 ! Mem[0000000010101410] = ffff275e 00000000 | |
8932 | ||
8933 | ! Check Point 41 for processor 0 | |
8934 | ||
8935 | set p0_check_pt_data_41,%g4 | |
8936 | rd %ccr,%g5 ! %g5 = 44 | |
8937 | ldx [%g4+0x08],%g2 | |
8938 | cmp %l0,%g2 ! %l0 = 00000000ffffffff | |
8939 | bne %xcc,p0_reg_check_fail0 | |
8940 | mov 0xee0,%g1 | |
8941 | ldx [%g4+0x10],%g2 | |
8942 | cmp %l1,%g2 ! %l1 = 00000000ffffe46d | |
8943 | bne %xcc,p0_reg_check_fail1 | |
8944 | mov 0xee1,%g1 | |
8945 | ldx [%g4+0x18],%g2 | |
8946 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
8947 | bne %xcc,p0_reg_check_fail2 | |
8948 | mov 0xee2,%g1 | |
8949 | ldx [%g4+0x20],%g2 | |
8950 | cmp %l3,%g2 ! %l3 = ffffffffff000000 | |
8951 | bne %xcc,p0_reg_check_fail3 | |
8952 | mov 0xee3,%g1 | |
8953 | ldx [%g4+0x28],%g2 | |
8954 | cmp %l4,%g2 ! %l4 = ffffffffffff275e | |
8955 | bne %xcc,p0_reg_check_fail4 | |
8956 | mov 0xee4,%g1 | |
8957 | ldx [%g4+0x30],%g2 | |
8958 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
8959 | bne %xcc,p0_reg_check_fail5 | |
8960 | mov 0xee5,%g1 | |
8961 | ldx [%g4+0x38],%g2 | |
8962 | cmp %l6,%g2 ! %l6 = 00000000ffffffff | |
8963 | bne %xcc,p0_reg_check_fail6 | |
8964 | mov 0xee6,%g1 | |
8965 | ldx [%g4+0x40],%g2 | |
8966 | cmp %l7,%g2 ! %l7 = 000000000000e09c | |
8967 | bne %xcc,p0_reg_check_fail7 | |
8968 | mov 0xee7,%g1 | |
8969 | ldx [%g4+0x48],%g3 | |
8970 | std %f0,[%g4] | |
8971 | ldx [%g4],%g2 | |
8972 | cmp %g3,%g2 ! %f0 = ff8bd2d3 c3fce2e3 | |
8973 | bne %xcc,p0_freg_check_fail | |
8974 | mov 0xf00,%g1 | |
8975 | ldx [%g4+0x50],%g3 | |
8976 | std %f2,[%g4] | |
8977 | ldx [%g4],%g2 | |
8978 | cmp %g3,%g2 ! %f2 = ffff00ff ffffffff | |
8979 | bne %xcc,p0_freg_check_fail | |
8980 | mov 0xf02,%g1 | |
8981 | ldx [%g4+0x58],%g3 | |
8982 | std %f4,[%g4] | |
8983 | ldx [%g4],%g2 | |
8984 | cmp %g3,%g2 ! %f4 = 00000000 ffff9e5e | |
8985 | bne %xcc,p0_freg_check_fail | |
8986 | mov 0xf04,%g1 | |
8987 | ldx [%g4+0x60],%g3 | |
8988 | std %f6,[%g4] | |
8989 | ldx [%g4],%g2 | |
8990 | cmp %g3,%g2 ! %f6 = ffffffff d7ffffff | |
8991 | bne %xcc,p0_freg_check_fail | |
8992 | mov 0xf06,%g1 | |
8993 | ldx [%g4+0x68],%g3 | |
8994 | std %f14,[%g4] | |
8995 | ldx [%g4],%g2 | |
8996 | cmp %g3,%g2 ! %f14 = 00000000 d81a5b92 | |
8997 | bne %xcc,p0_freg_check_fail | |
8998 | mov 0xf14,%g1 | |
8999 | ldx [%g4+0x70],%g3 | |
9000 | std %f16,[%g4] | |
9001 | ldx [%g4],%g2 | |
9002 | cmp %g3,%g2 ! %f16 = ffff1ad8 d7428e9c | |
9003 | bne %xcc,p0_freg_check_fail | |
9004 | mov 0xf16,%g1 | |
9005 | ldx [%g4+0x78],%g3 | |
9006 | std %f18,[%g4] | |
9007 | ldx [%g4],%g2 | |
9008 | cmp %g3,%g2 ! %f18 = ffff0000 ffffffff | |
9009 | bne %xcc,p0_freg_check_fail | |
9010 | mov 0xf18,%g1 | |
9011 | ldx [%g4+0x80],%g3 | |
9012 | std %f20,[%g4] | |
9013 | ldx [%g4],%g2 | |
9014 | cmp %g3,%g2 ! %f20 = ff00b6f1 ffff275e | |
9015 | bne %xcc,p0_freg_check_fail | |
9016 | mov 0xf20,%g1 | |
9017 | ldx [%g4+0x88],%g3 | |
9018 | std %f22,[%g4] | |
9019 | ldx [%g4],%g2 | |
9020 | cmp %g3,%g2 ! %f22 = d9876ee7 f8d13fed | |
9021 | bne %xcc,p0_freg_check_fail | |
9022 | mov 0xf22,%g1 | |
9023 | ldx [%g4+0x90],%g3 | |
9024 | std %f24,[%g4] | |
9025 | ldx [%g4],%g2 | |
9026 | cmp %g3,%g2 ! %f24 = 000000ff ff000000 | |
9027 | bne %xcc,p0_freg_check_fail | |
9028 | mov 0xf24,%g1 | |
9029 | ldx [%g4+0x98],%g3 | |
9030 | std %f26,[%g4] | |
9031 | ldx [%g4],%g2 | |
9032 | cmp %g3,%g2 ! %f26 = 00000000 a309ade0 | |
9033 | bne %xcc,p0_freg_check_fail | |
9034 | mov 0xf26,%g1 | |
9035 | ldx [%g4+0xa0],%g3 | |
9036 | std %f28,[%g4] | |
9037 | ldx [%g4],%g2 | |
9038 | cmp %g3,%g2 ! %f28 = 0f10ff1a e0ffffff | |
9039 | bne %xcc,p0_freg_check_fail | |
9040 | mov 0xf28,%g1 | |
9041 | ldx [%g4+0xa8],%g3 | |
9042 | std %f30,[%g4] | |
9043 | ldx [%g4],%g2 | |
9044 | cmp %g3,%g2 ! %f30 = 8ab6e09c 00007a9a | |
9045 | bne %xcc,p0_freg_check_fail | |
9046 | mov 0xf30,%g1 | |
9047 | ||
9048 | ! Check Point 41 completed | |
9049 | ||
9050 | ||
9051 | p0_label_206: | |
9052 | ! %l2 = ffffffffffffffff, Mem[0000000010101410] = 5e27ffff | |
9053 | stba %l2,[%i4+%o5]0x88 ! Mem[0000000010101410] = 5e27ffff | |
9054 | ! Mem[0000000010101400] = 000000ff, %l5 = 0000000000000000 | |
9055 | ldstuba [%i4+%g0]0x80,%l5 ! %l5 = 00000000000000ff | |
9056 | membar #Sync ! Added by membar checker (51) | |
9057 | ! %l3 = ffffffffff000000, Mem[0000000010001426] = ff000000, %asi = 80 | |
9058 | stha %l3,[%i0+0x026]%asi ! Mem[0000000010001424] = ff000000 | |
9059 | ! %l0 = 00000000ffffffff, Mem[0000000010041410] = 000000e0 | |
9060 | stwa %l0,[%i1+%o5]0x88 ! Mem[0000000010041410] = ffffffff | |
9061 | ! Mem[0000000030141410] = c49410cd, %l1 = 00000000ffffe46d | |
9062 | lduba [%i5+%o5]0x89,%l1 ! %l1 = 00000000000000cd | |
9063 | ! Mem[0000000020800001] = 00000db6, %l7 = 000000000000e09c | |
9064 | ldstuba [%o1+0x001]%asi,%l7 ! %l7 = 00000000000000ff | |
9065 | ! %l3 = ffffffffff000000, Mem[0000000030041408] = ffffffff | |
9066 | stba %l3,[%i1+%o4]0x89 ! Mem[0000000030041408] = ffffff00 | |
9067 | ! Mem[00000000201c0001] = ffff1669, %l0 = 00000000ffffffff | |
9068 | ldstuba [%o0+0x001]%asi,%l0 ! %l0 = 000000ff000000ff | |
9069 | ! %l7 = 0000000000000000, Mem[0000000010141408] = ffffffff | |
9070 | stha %l7,[%i5+%o4]0x88 ! Mem[0000000010141408] = ffff0000 | |
9071 | ! Starting 10 instruction Load Burst | |
9072 | ! Mem[00000000201c0000] = ffff1669, %l6 = 00000000ffffffff | |
9073 | lduba [%o0+0x001]%asi,%l6 ! %l6 = 00000000000000ff | |
9074 | ||
9075 | p0_label_207: | |
9076 | ! Mem[0000000030081400] = 00000000, %l0 = 00000000000000ff | |
9077 | lduha [%i2+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
9078 | ! Mem[0000000010141430] = 8ab6e09c, %l1 = 00000000000000cd | |
9079 | ldub [%i5+0x031],%l1 ! %l1 = 00000000000000b6 | |
9080 | ! Mem[0000000010041410] = 00000000ffffffff, %f12 = ffffffff 9b4387d9 | |
9081 | ldda [%i1+%o5]0x88,%f12 ! %f12 = 00000000 ffffffff | |
9082 | ! Mem[0000000030181408] = 00000000, %l0 = 0000000000000000 | |
9083 | lduba [%i6+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
9084 | ! Mem[00000000100c1400] = ff000000, %l3 = ffffffffff000000 | |
9085 | lduba [%i3+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
9086 | ! Mem[0000000021800100] = ffff39e7, %l3 = 0000000000000000 | |
9087 | ldsba [%o3+0x101]%asi,%l3 ! %l3 = ffffffffffffffff | |
9088 | ! Mem[0000000030001400] = 0000ffff, %f4 = 00000000 | |
9089 | lda [%i0+%g0]0x81,%f4 ! %f4 = 0000ffff | |
9090 | ! Mem[0000000010081400] = 00000000 00000000 ff000000 d81a5b92 | |
9091 | ! Mem[0000000010081410] = ffffffff d7ffffff 000000ff 000000ff | |
9092 | ! Mem[0000000010081420] = 000000ff ff000000 00000000 a309ade0 | |
9093 | ! Mem[0000000010081430] = 0f10ff1a e0ffffff 00ff0000 00007a1a | |
9094 | ldda [%i2]ASI_BLK_AIUP,%f16 ! Block Load from 0000000010081400 | |
9095 | ! Mem[0000000010141408] = ffff0000, %l1 = 00000000000000b6 | |
9096 | lduha [%i5+%o4]0x88,%l1 ! %l1 = 0000000000000000 | |
9097 | ! Starting 10 instruction Store Burst | |
9098 | ! %l2 = ffffffffffffffff, Mem[0000000020800040] = ffff9ffa | |
9099 | sth %l2,[%o1+0x040] ! Mem[0000000020800040] = ffff9ffa | |
9100 | ||
9101 | p0_label_208: | |
9102 | ! Mem[0000000030081408] = ff000000, %l4 = ffffffffffff275e | |
9103 | swapa [%i2+%o4]0x89,%l4 ! %l4 = 00000000ff000000 | |
9104 | ! Mem[00000000100c1410] = 0000fffffffce2e3, %l6 = 00000000000000ff, %l7 = 0000000000000000 | |
9105 | add %i3,0x10,%g1 | |
9106 | casxa [%g1]0x80,%l6,%l7 ! %l7 = 0000fffffffce2e3 | |
9107 | ! %f4 = 0000ffff ffff9e5e, Mem[0000000010101408] = b8c2204b 0a8d001a | |
9108 | stda %f4 ,[%i4+%o4]0x80 ! Mem[0000000010101408] = 0000ffff ffff9e5e | |
9109 | ! %l7 = 0000fffffffce2e3, Mem[0000000030101400] = e0ad09a3 | |
9110 | stha %l7,[%i4+%g0]0x89 ! Mem[0000000030101400] = e0ade2e3 | |
9111 | ! %l4 = 00000000ff000000, Mem[0000000010041400] = 00000000 | |
9112 | stba %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000 | |
9113 | ! %f2 = ffff00ff ffffffff, Mem[0000000010101408] = 0000ffff ffff9e5e | |
9114 | std %f2 ,[%i4+%o4] ! Mem[0000000010101408] = ffff00ff ffffffff | |
9115 | ! %l0 = 0000000000000000, Mem[0000000030181408] = 00000000 | |
9116 | stwa %l0,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000 | |
9117 | ! Mem[0000000010001400] = d81affff, %l0 = 0000000000000000 | |
9118 | ldstuba [%i0+%g0]0x88,%l0 ! %l0 = 000000ff000000ff | |
9119 | ! %l4 = 00000000ff000000, Mem[00000000201c0000] = ffff1669, %asi = 80 | |
9120 | stha %l4,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00001669 | |
9121 | ! Starting 10 instruction Load Burst | |
9122 | ! Mem[0000000020800000] = 00ff0db6, %l3 = ffffffffffffffff | |
9123 | ldsha [%o1+0x000]%asi,%l3 ! %l3 = 00000000000000ff | |
9124 | ||
9125 | p0_label_209: | |
9126 | ! Mem[00000000100c143c] = 00000000, %f14 = 00000000 | |
9127 | lda [%i3+0x03c]%asi,%f14 ! %f14 = 00000000 | |
9128 | ! Mem[0000000010081410] = ffffffff, %l6 = 00000000000000ff | |
9129 | lduha [%i2+%o5]0x80,%l6 ! %l6 = 000000000000ffff | |
9130 | ! Mem[0000000010001400] = ffff1ad8, %l1 = 0000000000000000 | |
9131 | ldsha [%i0+%g0]0x80,%l1 ! %l1 = ffffffffffffffff | |
9132 | ! Mem[0000000030141400] = e46dee46 ffffffff ffffffff ffffffff | |
9133 | ! Mem[0000000030141410] = cd1094c4 e46dee46 ff00b6f1 ffff275e | |
9134 | ! Mem[0000000030141420] = 925b1ad8 00000000 7a000000 00007400 | |
9135 | ! Mem[0000000030141430] = ffffffff 9b4387d9 00e2ffc3 d3d28bff | |
9136 | ldda [%i5]ASI_BLK_S,%f16 ! Block Load from 0000000030141400 | |
9137 | ! Mem[0000000010081400] = 00000000, %l1 = ffffffffffffffff | |
9138 | lduha [%i2+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
9139 | ! Mem[0000000010041408] = 00000000, %l1 = 0000000000000000 | |
9140 | lduha [%i1+%o4]0x88,%l1 ! %l1 = 0000000000000000 | |
9141 | ! Mem[0000000010181410] = ff0000005e27ffff, %f6 = ffffffff d7ffffff | |
9142 | ldda [%i6+%o5]0x88,%f6 ! %f6 = ff000000 5e27ffff | |
9143 | ! Mem[0000000030181400] = 00000000 d7ffffff, %l6 = 0000ffff, %l7 = fffce2e3 | |
9144 | ldda [%i6+%g0]0x81,%l6 ! %l6 = 0000000000000000 00000000d7ffffff | |
9145 | ! Mem[0000000010181410] = ffff275e, %l3 = 00000000000000ff | |
9146 | ldsba [%i6+%o5]0x80,%l3 ! %l3 = ffffffffffffffff | |
9147 | ! Starting 10 instruction Store Burst | |
9148 | ! %f4 = 0000ffff ffff9e5e, %l1 = 0000000000000000 | |
9149 | ! Mem[0000000010101418] = 5e9e11ff6b6c2202 | |
9150 | add %i4,0x018,%g1 | |
9151 | stda %f4,[%g1+%l1]ASI_PST8_PL ! Mem[0000000010101418] = 5e9e11ff6b6c2202 | |
9152 | ||
9153 | p0_label_210: | |
9154 | ! %l0 = 00000000000000ff, Mem[0000000010101410] = ffff275e | |
9155 | stwa %l0,[%i4+%o5]0x80 ! Mem[0000000010101410] = 000000ff | |
9156 | ! %l1 = 0000000000000000, Mem[00000000100c1400] = 000000ff | |
9157 | stha %l1,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 000000ff | |
9158 | membar #Sync ! Added by membar checker (52) | |
9159 | ! %l6 = 00000000, %l7 = d7ffffff, Mem[0000000030141410] = cd1094c4 e46dee46 | |
9160 | stda %l6,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 d7ffffff | |
9161 | ! %f23 = ffff275e, Mem[0000000010141408] = ffff0000 | |
9162 | sta %f23,[%i5+%o4]0x88 ! Mem[0000000010141408] = ffff275e | |
9163 | ! Mem[0000000010141408] = 5e27ffff, %l3 = ffffffffffffffff | |
9164 | ldstuba [%i5+%o4]0x80,%l3 ! %l3 = 0000005e000000ff | |
9165 | ! Mem[0000000030141400] = e46dee46, %l7 = 00000000d7ffffff | |
9166 | swapa [%i5+%g0]0x81,%l7 ! %l7 = 00000000e46dee46 | |
9167 | ! %l0 = 00000000000000ff, Mem[00000000300c1400] = ffffffff | |
9168 | stba %l0,[%i3+%g0]0x89 ! Mem[00000000300c1400] = ffffffff | |
9169 | ! %l7 = 00000000e46dee46, Mem[00000000300c1400] = ffffffff | |
9170 | stha %l7,[%i3+%g0]0x81 ! Mem[00000000300c1400] = ee46ffff | |
9171 | ! %l1 = 0000000000000000, Mem[0000000020800001] = 00ff0db6, %asi = 80 | |
9172 | stba %l1,[%o1+0x001]%asi ! Mem[0000000020800000] = 00000db6 | |
9173 | ! Starting 10 instruction Load Burst | |
9174 | ! Mem[0000000030081400] = 00000000 ffffffff 5e27ffff 00000000 | |
9175 | ! Mem[0000000030081410] = ffffffff 0000006e 1d825880 5e067d5a | |
9176 | ! Mem[0000000030081420] = 06d37253 8e2d6ade 578bd2d3 c3fce2e3 | |
9177 | ! Mem[0000000030081430] = 0a06c0b1 c0dc16be 4b20c2b8 480207d9 | |
9178 | ldda [%i2]ASI_BLK_AIUSL,%f0 ! Block Load from 0000000030081400 | |
9179 | ||
9180 | ! Check Point 42 for processor 0 | |
9181 | ||
9182 | set p0_check_pt_data_42,%g4 | |
9183 | rd %ccr,%g5 ! %g5 = 44 | |
9184 | ldx [%g4+0x08],%g2 | |
9185 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
9186 | bne %xcc,p0_reg_check_fail0 | |
9187 | mov 0xee0,%g1 | |
9188 | ldx [%g4+0x10],%g2 | |
9189 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
9190 | bne %xcc,p0_reg_check_fail1 | |
9191 | mov 0xee1,%g1 | |
9192 | ldx [%g4+0x18],%g2 | |
9193 | cmp %l3,%g2 ! %l3 = 000000000000005e | |
9194 | bne %xcc,p0_reg_check_fail3 | |
9195 | mov 0xee3,%g1 | |
9196 | ldx [%g4+0x20],%g2 | |
9197 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
9198 | bne %xcc,p0_reg_check_fail5 | |
9199 | mov 0xee5,%g1 | |
9200 | ldx [%g4+0x28],%g2 | |
9201 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
9202 | bne %xcc,p0_reg_check_fail6 | |
9203 | mov 0xee6,%g1 | |
9204 | ldx [%g4+0x30],%g2 | |
9205 | cmp %l7,%g2 ! %l7 = 00000000e46dee46 | |
9206 | bne %xcc,p0_reg_check_fail7 | |
9207 | mov 0xee7,%g1 | |
9208 | nop ! Wait out %f0 latency | |
9209 | nop ! Wait out %f0 latency | |
9210 | nop ! Wait out %f0 latency | |
9211 | nop ! Wait out %f0 latency | |
9212 | nop ! Wait out %f0 latency | |
9213 | nop ! Wait out %f0 latency | |
9214 | nop ! Wait out %f0 latency | |
9215 | nop ! Wait out %f0 latency | |
9216 | ldx [%g4+0x38],%g3 | |
9217 | std %f0,[%g4] | |
9218 | ldx [%g4],%g2 | |
9219 | cmp %g3,%g2 ! %f0 = ffffffff 00000000 | |
9220 | bne %xcc,p0_freg_check_fail | |
9221 | mov 0xf00,%g1 | |
9222 | ldx [%g4+0x40],%g3 | |
9223 | std %f2,[%g4] | |
9224 | ldx [%g4],%g2 | |
9225 | cmp %g3,%g2 ! %f2 = 00000000 ffff275e | |
9226 | bne %xcc,p0_freg_check_fail | |
9227 | mov 0xf02,%g1 | |
9228 | ldx [%g4+0x48],%g3 | |
9229 | std %f4,[%g4] | |
9230 | ldx [%g4],%g2 | |
9231 | cmp %g3,%g2 ! %f4 = 6e000000 ffffffff | |
9232 | bne %xcc,p0_freg_check_fail | |
9233 | mov 0xf04,%g1 | |
9234 | ldx [%g4+0x50],%g3 | |
9235 | std %f6,[%g4] | |
9236 | ldx [%g4],%g2 | |
9237 | cmp %g3,%g2 ! %f6 = 5a7d065e 8058821d | |
9238 | bne %xcc,p0_freg_check_fail | |
9239 | mov 0xf06,%g1 | |
9240 | ldx [%g4+0x58],%g3 | |
9241 | std %f8,[%g4] | |
9242 | ldx [%g4],%g2 | |
9243 | cmp %g3,%g2 ! %f8 = de6a2d8e 5372d306 | |
9244 | bne %xcc,p0_freg_check_fail | |
9245 | mov 0xf08,%g1 | |
9246 | ldx [%g4+0x60],%g3 | |
9247 | std %f10,[%g4] | |
9248 | ldx [%g4],%g2 | |
9249 | cmp %g3,%g2 ! %f10 = e3e2fcc3 d3d28b57 | |
9250 | bne %xcc,p0_freg_check_fail | |
9251 | mov 0xf10,%g1 | |
9252 | ldx [%g4+0x68],%g3 | |
9253 | std %f12,[%g4] | |
9254 | ldx [%g4],%g2 | |
9255 | cmp %g3,%g2 ! %f12 = be16dcc0 b1c0060a | |
9256 | bne %xcc,p0_freg_check_fail | |
9257 | mov 0xf12,%g1 | |
9258 | ldx [%g4+0x70],%g3 | |
9259 | std %f14,[%g4] | |
9260 | ldx [%g4],%g2 | |
9261 | cmp %g3,%g2 ! %f14 = d9070248 b8c2204b | |
9262 | bne %xcc,p0_freg_check_fail | |
9263 | mov 0xf14,%g1 | |
9264 | ldx [%g4+0x78],%g3 | |
9265 | std %f16,[%g4] | |
9266 | ldx [%g4],%g2 | |
9267 | cmp %g3,%g2 ! %f16 = e46dee46 ffffffff | |
9268 | bne %xcc,p0_freg_check_fail | |
9269 | mov 0xf16,%g1 | |
9270 | ldx [%g4+0x80],%g3 | |
9271 | std %f18,[%g4] | |
9272 | ldx [%g4],%g2 | |
9273 | cmp %g3,%g2 ! %f18 = ffffffff ffffffff | |
9274 | bne %xcc,p0_freg_check_fail | |
9275 | mov 0xf18,%g1 | |
9276 | ldx [%g4+0x88],%g3 | |
9277 | std %f20,[%g4] | |
9278 | ldx [%g4],%g2 | |
9279 | cmp %g3,%g2 ! %f20 = cd1094c4 e46dee46 | |
9280 | bne %xcc,p0_freg_check_fail | |
9281 | mov 0xf20,%g1 | |
9282 | ldx [%g4+0x90],%g3 | |
9283 | std %f22,[%g4] | |
9284 | ldx [%g4],%g2 | |
9285 | cmp %g3,%g2 ! %f22 = ff00b6f1 ffff275e | |
9286 | bne %xcc,p0_freg_check_fail | |
9287 | mov 0xf22,%g1 | |
9288 | ldx [%g4+0x98],%g3 | |
9289 | std %f24,[%g4] | |
9290 | ldx [%g4],%g2 | |
9291 | cmp %g3,%g2 ! %f24 = 925b1ad8 00000000 | |
9292 | bne %xcc,p0_freg_check_fail | |
9293 | mov 0xf24,%g1 | |
9294 | ldx [%g4+0xa0],%g3 | |
9295 | std %f26,[%g4] | |
9296 | ldx [%g4],%g2 | |
9297 | cmp %g3,%g2 ! %f26 = 7a000000 00007400 | |
9298 | bne %xcc,p0_freg_check_fail | |
9299 | mov 0xf26,%g1 | |
9300 | ldx [%g4+0xa8],%g3 | |
9301 | std %f28,[%g4] | |
9302 | ldx [%g4],%g2 | |
9303 | cmp %g3,%g2 ! %f28 = ffffffff 9b4387d9 | |
9304 | bne %xcc,p0_freg_check_fail | |
9305 | mov 0xf28,%g1 | |
9306 | ldx [%g4+0xb0],%g3 | |
9307 | std %f30,[%g4] | |
9308 | ldx [%g4],%g2 | |
9309 | cmp %g3,%g2 ! %f30 = 00e2ffc3 d3d28bff | |
9310 | bne %xcc,p0_freg_check_fail | |
9311 | mov 0xf30,%g1 | |
9312 | ||
9313 | ! Check Point 42 completed | |
9314 | ||
9315 | ||
9316 | p0_label_211: | |
9317 | ! Mem[0000000010041408] = 00000000, %l4 = 00000000ff000000 | |
9318 | lduh [%i1+%o4],%l4 ! %l4 = 0000000000000000 | |
9319 | ! Mem[0000000010141404] = 00000000, %f12 = be16dcc0 | |
9320 | lda [%i5+0x004]%asi,%f12 ! %f12 = 00000000 | |
9321 | ! Mem[00000000100c1410] = 0000fffffffce2e3, %l2 = ffffffffffffffff | |
9322 | ldxa [%i3+%o5]0x80,%l2 ! %l2 = 0000fffffffce2e3 | |
9323 | ! Mem[0000000020800040] = ffff9ffa, %l6 = 0000000000000000 | |
9324 | ldsh [%o1+0x040],%l6 ! %l6 = ffffffffffffffff | |
9325 | ! Mem[0000000010101400] = ff0000ff, %l7 = 00000000e46dee46 | |
9326 | lduwa [%i4+%g0]0x88,%l7 ! %l7 = 00000000ff0000ff | |
9327 | ! Mem[00000000300c1408] = 00000000, %l5 = 0000000000000000 | |
9328 | ldsba [%i3+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
9329 | ! Mem[0000000010001400] = ffff1ad8, %l3 = 000000000000005e | |
9330 | lduba [%i0+%g0]0x80,%l3 ! %l3 = 00000000000000ff | |
9331 | ! Mem[00000000100c1400] = 000000ff 00007a9a, %l6 = ffffffff, %l7 = ff0000ff | |
9332 | ldda [%i3+%g0]0x80,%l6 ! %l6 = 00000000000000ff 0000000000007a9a | |
9333 | ! Mem[00000000100c1408] = 5f360000, %l0 = 00000000000000ff | |
9334 | lduba [%i3+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
9335 | ! Starting 10 instruction Store Burst | |
9336 | ! Mem[000000001010141c] = 6b6c2202, %l3 = 00000000000000ff, %asi = 80 | |
9337 | swapa [%i4+0x01c]%asi,%l3 ! %l3 = 000000006b6c2202 | |
9338 | ||
9339 | p0_label_212: | |
9340 | ! %l0 = 0000000000000000, Mem[00000000201c0001] = 00001669 | |
9341 | stb %l0,[%o0+0x001] ! Mem[00000000201c0000] = 00001669 | |
9342 | ! %f12 = 00000000 b1c0060a, Mem[0000000010001418] = d9876ee7 f8d13fed | |
9343 | std %f12,[%i0+0x018] ! Mem[0000000010001418] = 00000000 b1c0060a | |
9344 | ! %f1 = 00000000, Mem[0000000010101410] = 000000ff | |
9345 | sta %f1 ,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00000000 | |
9346 | ! %l5 = 0000000000000000, Mem[000000001000143d] = 00007a9a, %asi = 80 | |
9347 | stba %l5,[%i0+0x03d]%asi ! Mem[000000001000143c] = 00007a9a | |
9348 | ! Mem[0000000030181410] = 06d37253, %l1 = 0000000000000000 | |
9349 | swapa [%i6+%o5]0x89,%l1 ! %l1 = 0000000006d37253 | |
9350 | ! %l4 = 0000000000000000, Mem[00000000100c1400] = ff000000 | |
9351 | stha %l4,[%i3+%g0]0x88 ! Mem[00000000100c1400] = ff000000 | |
9352 | ! %f13 = b1c0060a, Mem[00000000300c1400] = ffff46ee | |
9353 | sta %f13,[%i3+%g0]0x89 ! Mem[00000000300c1400] = b1c0060a | |
9354 | ! %f18 = ffffffff ffffffff, Mem[0000000030101410] = d7ffffff ff000000 | |
9355 | stda %f18,[%i4+%o5]0x81 ! Mem[0000000030101410] = ffffffff ffffffff | |
9356 | ! Mem[0000000030001400] = ffff0000, %l1 = 0000000006d37253 | |
9357 | swapa [%i0+%g0]0x89,%l1 ! %l1 = 00000000ffff0000 | |
9358 | ! Starting 10 instruction Load Burst | |
9359 | ! Mem[00000000100c1400] = 000000ff 00007a9a, %l4 = 00000000, %l5 = 00000000 | |
9360 | ldda [%i3+0x000]%asi,%l4 ! %l4 = 00000000000000ff 0000000000007a9a | |
9361 | ||
9362 | p0_label_213: | |
9363 | ! Mem[00000000100c1408] = 0000365f0a8d001a, %l2 = 0000fffffffce2e3 | |
9364 | ldxa [%i3+%o4]0x80,%l2 ! %l2 = 0000365f0a8d001a | |
9365 | ! Mem[0000000030101408] = ff000000, %l6 = 00000000000000ff | |
9366 | ldsha [%i4+%o4]0x81,%l6 ! %l6 = ffffffffffffff00 | |
9367 | ! Mem[0000000010181410] = ffff275e, %l6 = ffffffffffffff00 | |
9368 | lduha [%i6+%o5]0x80,%l6 ! %l6 = 000000000000ffff | |
9369 | ! Mem[00000000100c1400] = 000000ff, %l3 = 000000006b6c2202 | |
9370 | lduba [%i3+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
9371 | ! Mem[0000000030181410] = 00000000, %l6 = 000000000000ffff | |
9372 | lduha [%i6+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
9373 | ! Mem[0000000010181400] = 06d37253, %l5 = 0000000000007a9a | |
9374 | lduwa [%i6+%g0]0x80,%l5 ! %l5 = 0000000006d37253 | |
9375 | ! Mem[00000000100c1430] = 7a000000, %l3 = 0000000000000000 | |
9376 | ldsba [%i3+0x031]%asi,%l3 ! %l3 = 0000000000000000 | |
9377 | ! Mem[00000000211c0000] = 5700fe0c, %l7 = 0000000000007a9a | |
9378 | ldsb [%o2+%g0],%l7 ! %l7 = 0000000000000057 | |
9379 | ! Mem[0000000010001408] = 0000ffff, %l4 = 00000000000000ff | |
9380 | ldsba [%i0+%o4]0x88,%l4 ! %l4 = ffffffffffffffff | |
9381 | ! Starting 10 instruction Store Burst | |
9382 | ! Mem[0000000010041410] = ffffffff, %l3 = 0000000000000000 | |
9383 | swapa [%i1+%o5]0x80,%l3 ! %l3 = 00000000ffffffff | |
9384 | ||
9385 | p0_label_214: | |
9386 | ! %l2 = 0a8d001a, %l3 = ffffffff, Mem[0000000010001400] = d81affff 9c8e42d7 | |
9387 | stda %l2,[%i0+%g0]0x88 ! Mem[0000000010001400] = 0a8d001a ffffffff | |
9388 | ! Mem[00000000100c1400] = 000000ff, %l2 = 0000365f0a8d001a | |
9389 | swapa [%i3+%g0]0x80,%l2 ! %l2 = 00000000000000ff | |
9390 | ! %l1 = 00000000ffff0000, Mem[0000000030141408] = ffffffff | |
9391 | stha %l1,[%i5+%o4]0x89 ! Mem[0000000030141408] = ffff0000 | |
9392 | ! %f22 = ff00b6f1 ffff275e, %l2 = 00000000000000ff | |
9393 | ! Mem[0000000010101438] = ffffffe000000000 | |
9394 | add %i4,0x038,%g1 | |
9395 | stda %f22,[%g1+%l2]ASI_PST8_PL ! Mem[0000000010101438] = 5e27fffff1b600ff | |
9396 | ! %l3 = 00000000ffffffff, Mem[0000000010041400] = 00000000 | |
9397 | stba %l3,[%i1+%g0]0x88 ! Mem[0000000010041400] = 000000ff | |
9398 | ! Mem[0000000030141400] = d7ffffff, %l0 = 0000000000000000 | |
9399 | lduwa [%i5+%g0]0x81,%l0 ! %l0 = 00000000d7ffffff | |
9400 | ! %l7 = 0000000000000057, Mem[0000000020800000] = 00000db6, %asi = 80 | |
9401 | stba %l7,[%o1+0x000]%asi ! Mem[0000000020800000] = 57000db6 | |
9402 | ! %f12 = 00000000 b1c0060a, %l4 = ffffffffffffffff | |
9403 | ! Mem[0000000030141428] = 7a00000000007400 | |
9404 | add %i5,0x028,%g1 | |
9405 | stda %f12,[%g1+%l4]ASI_PST32_S ! Mem[0000000030141428] = 00000000b1c0060a | |
9406 | ! %l2 = 00000000000000ff, Mem[0000000010001410] = f1b600ff | |
9407 | stha %l2,[%i0+%o5]0x88 ! Mem[0000000010001410] = f1b600ff | |
9408 | ! Starting 10 instruction Load Burst | |
9409 | ! Mem[0000000010041400] = ff000000, %l5 = 0000000006d37253 | |
9410 | lduwa [%i1+%g0]0x80,%l5 ! %l5 = 00000000ff000000 | |
9411 | ||
9412 | p0_label_215: | |
9413 | ! Mem[00000000211c0000] = 5700fe0c, %l5 = 00000000ff000000 | |
9414 | ldsha [%o2+0x000]%asi,%l5 ! %l5 = 0000000000005700 | |
9415 | ! Mem[00000000300c1400] = b1c0060a, %l3 = 00000000ffffffff | |
9416 | ldswa [%i3+%g0]0x89,%l3 ! %l3 = ffffffffb1c0060a | |
9417 | ! Mem[0000000030141410] = 00000000, %l3 = ffffffffb1c0060a | |
9418 | lduha [%i5+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
9419 | ! Mem[0000000030001400] = 5372d30600740000, %l7 = 0000000000000057 | |
9420 | ldxa [%i0+%g0]0x81,%l7 ! %l7 = 5372d30600740000 | |
9421 | ! Mem[0000000010081424] = ff000000, %l0 = 00000000d7ffffff | |
9422 | ldsha [%i2+0x024]%asi,%l0 ! %l0 = ffffffffffffff00 | |
9423 | ! Mem[0000000030041400] = ff000000 00000000 00ffffff ffffe46d | |
9424 | ! Mem[0000000030041410] = ff8bd2d3 c3fce2e3 5e9e11ff 6b6c2202 | |
9425 | ! Mem[0000000030041420] = 00000000 d81a5b92 c780ffbb d9876ee7 | |
9426 | ! Mem[0000000030041430] = 7a000000 0000b68a ffffffe0 00000000 | |
9427 | ldda [%i1]ASI_BLK_SL,%f16 ! Block Load from 0000000030041400 | |
9428 | ! Mem[0000000010141438] = 00007400 ffffffff, %l4 = ffffffff, %l5 = 00005700 | |
9429 | ldda [%i5+0x038]%asi,%l4 ! %l4 = 0000000000007400 00000000ffffffff | |
9430 | ! Mem[0000000030101408] = ff000000, %l5 = 00000000ffffffff | |
9431 | lduha [%i4+%o4]0x81,%l5 ! %l5 = 000000000000ff00 | |
9432 | ! Mem[0000000010041400] = 000000ff, %f4 = 6e000000 | |
9433 | lda [%i1+%g0]0x88,%f4 ! %f4 = 000000ff | |
9434 | ! Starting 10 instruction Store Burst | |
9435 | ! %f4 = 000000ff ffffffff, Mem[0000000010041400] = 000000ff ff94ffff | |
9436 | stda %f4 ,[%i1+%g0]0x88 ! Mem[0000000010041400] = 000000ff ffffffff | |
9437 | ||
9438 | ! Check Point 43 for processor 0 | |
9439 | ||
9440 | set p0_check_pt_data_43,%g4 | |
9441 | rd %ccr,%g5 ! %g5 = 44 | |
9442 | ldx [%g4+0x08],%g2 | |
9443 | cmp %l0,%g2 ! %l0 = ffffffffffffff00 | |
9444 | bne %xcc,p0_reg_check_fail0 | |
9445 | mov 0xee0,%g1 | |
9446 | ldx [%g4+0x10],%g2 | |
9447 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
9448 | bne %xcc,p0_reg_check_fail2 | |
9449 | mov 0xee2,%g1 | |
9450 | ldx [%g4+0x18],%g2 | |
9451 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
9452 | bne %xcc,p0_reg_check_fail3 | |
9453 | mov 0xee3,%g1 | |
9454 | ldx [%g4+0x20],%g2 | |
9455 | cmp %l4,%g2 ! %l4 = 0000000000007400 | |
9456 | bne %xcc,p0_reg_check_fail4 | |
9457 | mov 0xee4,%g1 | |
9458 | ldx [%g4+0x28],%g2 | |
9459 | cmp %l5,%g2 ! %l5 = 000000000000ff00 | |
9460 | bne %xcc,p0_reg_check_fail5 | |
9461 | mov 0xee5,%g1 | |
9462 | ldx [%g4+0x30],%g2 | |
9463 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
9464 | bne %xcc,p0_reg_check_fail6 | |
9465 | mov 0xee6,%g1 | |
9466 | ldx [%g4+0x38],%g2 | |
9467 | cmp %l7,%g2 ! %l7 = 5372d30600740000 | |
9468 | bne %xcc,p0_reg_check_fail7 | |
9469 | mov 0xee7,%g1 | |
9470 | ldx [%g4+0x40],%g3 | |
9471 | std %f4,[%g4] | |
9472 | ldx [%g4],%g2 | |
9473 | cmp %g3,%g2 ! %f4 = 000000ff ffffffff | |
9474 | bne %xcc,p0_freg_check_fail | |
9475 | mov 0xf04,%g1 | |
9476 | ldx [%g4+0x48],%g3 | |
9477 | std %f6,[%g4] | |
9478 | ldx [%g4],%g2 | |
9479 | cmp %g3,%g2 ! %f6 = 5a7d065e 8058821d | |
9480 | bne %xcc,p0_freg_check_fail | |
9481 | mov 0xf06,%g1 | |
9482 | ldx [%g4+0x50],%g3 | |
9483 | std %f12,[%g4] | |
9484 | ldx [%g4],%g2 | |
9485 | cmp %g3,%g2 ! %f12 = 00000000 b1c0060a | |
9486 | bne %xcc,p0_freg_check_fail | |
9487 | mov 0xf12,%g1 | |
9488 | ldx [%g4+0x58],%g3 | |
9489 | std %f16,[%g4] | |
9490 | ldx [%g4],%g2 | |
9491 | cmp %g3,%g2 ! %f16 = 00000000 000000ff | |
9492 | bne %xcc,p0_freg_check_fail | |
9493 | mov 0xf16,%g1 | |
9494 | ldx [%g4+0x60],%g3 | |
9495 | std %f18,[%g4] | |
9496 | ldx [%g4],%g2 | |
9497 | cmp %g3,%g2 ! %f18 = 6de4ffff ffffff00 | |
9498 | bne %xcc,p0_freg_check_fail | |
9499 | mov 0xf18,%g1 | |
9500 | ldx [%g4+0x68],%g3 | |
9501 | std %f20,[%g4] | |
9502 | ldx [%g4],%g2 | |
9503 | cmp %g3,%g2 ! %f20 = e3e2fcc3 d3d28bff | |
9504 | bne %xcc,p0_freg_check_fail | |
9505 | mov 0xf20,%g1 | |
9506 | ldx [%g4+0x70],%g3 | |
9507 | std %f22,[%g4] | |
9508 | ldx [%g4],%g2 | |
9509 | cmp %g3,%g2 ! %f22 = 02226c6b ff119e5e | |
9510 | bne %xcc,p0_freg_check_fail | |
9511 | mov 0xf22,%g1 | |
9512 | ldx [%g4+0x78],%g3 | |
9513 | std %f24,[%g4] | |
9514 | ldx [%g4],%g2 | |
9515 | cmp %g3,%g2 ! %f24 = 925b1ad8 00000000 | |
9516 | bne %xcc,p0_freg_check_fail | |
9517 | mov 0xf24,%g1 | |
9518 | ldx [%g4+0x80],%g3 | |
9519 | std %f26,[%g4] | |
9520 | ldx [%g4],%g2 | |
9521 | cmp %g3,%g2 ! %f26 = e76e87d9 bbff80c7 | |
9522 | bne %xcc,p0_freg_check_fail | |
9523 | mov 0xf26,%g1 | |
9524 | ldx [%g4+0x88],%g3 | |
9525 | std %f28,[%g4] | |
9526 | ldx [%g4],%g2 | |
9527 | cmp %g3,%g2 ! %f28 = 8ab60000 0000007a | |
9528 | bne %xcc,p0_freg_check_fail | |
9529 | mov 0xf28,%g1 | |
9530 | ldx [%g4+0x90],%g3 | |
9531 | std %f30,[%g4] | |
9532 | ldx [%g4],%g2 | |
9533 | cmp %g3,%g2 ! %f30 = 00000000 e0ffffff | |
9534 | bne %xcc,p0_freg_check_fail | |
9535 | mov 0xf30,%g1 | |
9536 | ||
9537 | ! Check Point 43 completed | |
9538 | ||
9539 | ||
9540 | p0_label_216: | |
9541 | ! Mem[0000000030101408] = ff000000, %l1 = 00000000ffff0000 | |
9542 | ldstuba [%i4+%o4]0x81,%l1 ! %l1 = 000000ff000000ff | |
9543 | ! Mem[0000000030141400] = d7ffffff, %l4 = 0000000000007400 | |
9544 | ldstuba [%i5+%g0]0x81,%l4 ! %l4 = 000000d7000000ff | |
9545 | ! Mem[0000000030181408] = 00000000, %l2 = 00000000000000ff | |
9546 | swapa [%i6+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
9547 | ! Mem[0000000010081414] = d7ffffff, %l5 = 0000ff00, %l7 = 00740000 | |
9548 | add %i2,0x14,%g1 | |
9549 | casa [%g1]0x80,%l5,%l7 ! %l7 = 00000000d7ffffff | |
9550 | ! %f0 = ffffffff 00000000 00000000 ffff275e | |
9551 | ! %f4 = 000000ff ffffffff 5a7d065e 8058821d | |
9552 | ! %f8 = de6a2d8e 5372d306 e3e2fcc3 d3d28b57 | |
9553 | ! %f12 = 00000000 b1c0060a d9070248 b8c2204b | |
9554 | stda %f0,[%i2]ASI_COMMIT_S ! Block Store to 0000000030081400 | |
9555 | ! Mem[0000000010181408] = ffffffff, %l3 = 0000000000000000 | |
9556 | swapa [%i6+%o4]0x88,%l3 ! %l3 = 00000000ffffffff | |
9557 | ! %l3 = 00000000ffffffff, Mem[0000000010141400] = 5e9effff | |
9558 | stba %l3,[%i5+%g0]0x80 ! Mem[0000000010141400] = ff9effff | |
9559 | ! %l1 = 00000000000000ff, Mem[0000000010041400] = ffffffff | |
9560 | stwa %l1,[%i1+%g0]0x88 ! Mem[0000000010041400] = 000000ff | |
9561 | ! %l7 = 00000000d7ffffff, Mem[0000000010041410] = 00000000 | |
9562 | stwa %l7,[%i1+%o5]0x88 ! Mem[0000000010041410] = d7ffffff | |
9563 | ! Starting 10 instruction Load Burst | |
9564 | ! Mem[00000000300c1410] = 5f00000000000000, %l1 = 00000000000000ff | |
9565 | ldxa [%i3+%o5]0x81,%l1 ! %l1 = 5f00000000000000 | |
9566 | ||
9567 | p0_label_217: | |
9568 | ! Mem[0000000030101400] = e3e2ade0, %l1 = 5f00000000000000 | |
9569 | ldsha [%i4+%g0]0x81,%l1 ! %l1 = ffffffffffffe3e2 | |
9570 | ! Mem[0000000020800040] = ffff9ffa, %l0 = ffffffffffffff00 | |
9571 | lduba [%o1+0x041]%asi,%l0 ! %l0 = 00000000000000ff | |
9572 | ! Mem[00000000300c1410] = 5f000000, %l2 = 0000000000000000 | |
9573 | ldswa [%i3+%o5]0x81,%l2 ! %l2 = 000000005f000000 | |
9574 | ! Mem[0000000010101400] = ff0000ff, %l5 = 000000000000ff00 | |
9575 | lduba [%i4+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
9576 | ! Mem[00000000100c1400] = 1a008d0a, %l1 = ffffffffffffe3e2 | |
9577 | ldswa [%i3+%g0]0x88,%l1 ! %l1 = 000000001a008d0a | |
9578 | membar #Sync ! Added by membar checker (53) | |
9579 | ! Mem[0000000010081404] = 00000000, %l7 = 00000000d7ffffff | |
9580 | ldub [%i2+0x004],%l7 ! %l7 = 0000000000000000 | |
9581 | ! Mem[00000000201c0000] = 00001669, %l4 = 00000000000000d7 | |
9582 | ldsb [%o0+%g0],%l4 ! %l4 = 0000000000000000 | |
9583 | ! Mem[0000000030101408] = 000000ff, %l5 = 00000000000000ff | |
9584 | ldsha [%i4+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
9585 | ! Mem[0000000030081400] = ffffffff, %l3 = 00000000ffffffff | |
9586 | ldswa [%i2+%g0]0x89,%l3 ! %l3 = ffffffffffffffff | |
9587 | ! Starting 10 instruction Store Burst | |
9588 | ! %l2 = 000000005f000000, Mem[0000000010081400] = 0000000000000000 | |
9589 | stxa %l2,[%i2+%g0]0x88 ! Mem[0000000010081400] = 000000005f000000 | |
9590 | ||
9591 | p0_label_218: | |
9592 | ! %f4 = 000000ff, Mem[0000000010001410] = f1b600ff | |
9593 | sta %f4 ,[%i0+%o5]0x88 ! Mem[0000000010001410] = 000000ff | |
9594 | ! %f2 = 00000000 ffff275e, %l1 = 000000001a008d0a | |
9595 | ! Mem[0000000030181400] = 00000000d7ffffff | |
9596 | stda %f2,[%i6+%l1]ASI_PST8_S ! Mem[0000000030181400] = 00000000ffff27ff | |
9597 | ! %l4 = 0000000000000000, Mem[0000000010141408] = ff27ffff | |
9598 | stwa %l4,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000 | |
9599 | ! Mem[0000000030101410] = ffffffff, %l3 = ffffffffffffffff | |
9600 | ldstuba [%i4+%o5]0x81,%l3 ! %l3 = 000000ff000000ff | |
9601 | ! %l0 = 00000000000000ff, Mem[0000000010141400] = ff9effff | |
9602 | stha %l0,[%i5+%g0]0x80 ! Mem[0000000010141400] = 00ffffff | |
9603 | ! %l0 = 00000000000000ff, Mem[0000000030101410] = ffffffff | |
9604 | stha %l0,[%i4+%o5]0x89 ! Mem[0000000030101410] = ffff00ff | |
9605 | ! Mem[0000000030101408] = 000000ff, %l5 = 00000000000000ff | |
9606 | swapa [%i4+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
9607 | ! Mem[00000000201c0001] = 00001669, %l1 = 000000001a008d0a | |
9608 | ldstub [%o0+0x001],%l1 ! %l1 = 00000000000000ff | |
9609 | ! Mem[0000000010041408] = 00000000, %l1 = 00000000, %l7 = 00000000 | |
9610 | add %i1,0x08,%g1 | |
9611 | casa [%g1]0x80,%l1,%l7 ! %l7 = 0000000000000000 | |
9612 | ! Starting 10 instruction Load Burst | |
9613 | ! Mem[0000000020800000] = 57000db6, %l2 = 000000005f000000 | |
9614 | ldsh [%o1+%g0],%l2 ! %l2 = 0000000000005700 | |
9615 | ||
9616 | p0_label_219: | |
9617 | ! Mem[0000000010081408] = ff000000, %l7 = 0000000000000000 | |
9618 | ldsba [%i2+%o4]0x80,%l7 ! %l7 = ffffffffffffffff | |
9619 | ! Mem[0000000010141408] = 00000000, %l4 = 0000000000000000 | |
9620 | lduwa [%i5+%o4]0x88,%l4 ! %l4 = 0000000000000000 | |
9621 | ! Mem[0000000010181438] = ffffffff 032cff8e, %l6 = 00000000, %l7 = ffffffff | |
9622 | ldda [%i6+0x038]%asi,%l6 ! %l6 = 00000000ffffffff 00000000032cff8e | |
9623 | ! Mem[0000000010141410] = 7a000000ffffffff, %f0 = ffffffff 00000000 | |
9624 | ldda [%i5+%o5]0x80,%f0 ! %f0 = 7a000000 ffffffff | |
9625 | ! Mem[0000000030001408] = 46ee6dff, %l7 = 00000000032cff8e | |
9626 | lduha [%i0+%o4]0x89,%l7 ! %l7 = 0000000000006dff | |
9627 | ! Mem[0000000010001400] = ffffffff0a8d001a, %l3 = 00000000000000ff | |
9628 | ldxa [%i0+%g0]0x88,%l3 ! %l3 = ffffffff0a8d001a | |
9629 | membar #Sync ! Added by membar checker (54) | |
9630 | ! Mem[0000000030181400] = 00000000 ffff27ff 000000ff cd1094c4 | |
9631 | ! Mem[0000000030181410] = 00000000 00000057 d9876ee7 f8d13fed | |
9632 | ! Mem[0000000030181420] = 000000ff ff000000 00000000 a309ade0 | |
9633 | ! Mem[0000000030181430] = 0f10ff1a e0ffffff 00000000 00007a9a | |
9634 | ldda [%i6]ASI_BLK_SL,%f0 ! Block Load from 0000000030181400 | |
9635 | ! Mem[0000000010001400] = ffffffff 0a8d001a, %l6 = ffffffff, %l7 = 00006dff | |
9636 | ldda [%i0+%g0]0x88,%l6 ! %l6 = 000000000a8d001a 00000000ffffffff | |
9637 | ! Mem[00000000300c1400] = 0a06c0b1, %l2 = 0000000000005700 | |
9638 | lduwa [%i3+%g0]0x81,%l2 ! %l2 = 000000000a06c0b1 | |
9639 | ! Starting 10 instruction Store Burst | |
9640 | membar #Sync ! Added by membar checker (55) | |
9641 | ! %l3 = ffffffff0a8d001a, Mem[0000000030181400] = 00000000ffff27ff | |
9642 | stxa %l3,[%i6+%g0]0x81 ! Mem[0000000030181400] = ffffffff0a8d001a | |
9643 | ||
9644 | p0_label_220: | |
9645 | ! %l6 = 000000000a8d001a, Mem[00000000201c0000] = 00ff1669 | |
9646 | stb %l6,[%o0+%g0] ! Mem[00000000201c0000] = 1aff1669 | |
9647 | ! Mem[0000000021800100] = ffff39e7, %l0 = 00000000000000ff | |
9648 | ldstuba [%o3+0x100]%asi,%l0 ! %l0 = 000000ff000000ff | |
9649 | ! %f23 = ff119e5e, Mem[0000000010041408] = 00000000 | |
9650 | sta %f23,[%i1+%o4]0x80 ! Mem[0000000010041408] = ff119e5e | |
9651 | ! %l2 = 0a06c0b1, %l3 = 0a8d001a, Mem[0000000030001400] = 06d37253 00007400 | |
9652 | stda %l2,[%i0+%g0]0x89 ! Mem[0000000030001400] = 0a06c0b1 0a8d001a | |
9653 | ! %l1 = 0000000000000000, Mem[0000000030141400] = ffffffff | |
9654 | stwa %l1,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00000000 | |
9655 | ! Mem[0000000010041410] = d7ffffff, %l5 = 00000000000000ff | |
9656 | swapa [%i1+%o5]0x88,%l5 ! %l5 = 00000000d7ffffff | |
9657 | ! %l6 = 000000000a8d001a, Mem[0000000030041410] = ff8bd2d3 | |
9658 | stba %l6,[%i1+%o5]0x81 ! Mem[0000000030041410] = 1a8bd2d3 | |
9659 | ! Mem[00000000201c0000] = 1aff1669, %l2 = 000000000a06c0b1 | |
9660 | ldstuba [%o0+0x000]%asi,%l2 ! %l2 = 0000001a000000ff | |
9661 | ! %f19 = ffffff00, Mem[0000000030041408] = 00ffffff | |
9662 | sta %f19,[%i1+%o4]0x81 ! Mem[0000000030041408] = ffffff00 | |
9663 | ! Starting 10 instruction Load Burst | |
9664 | ! Mem[0000000010101400] = ff0000ff, %l3 = ffffffff0a8d001a | |
9665 | ldstuba [%i4+%g0]0x88,%l3 ! %l3 = 000000ff000000ff | |
9666 | ||
9667 | ! Check Point 44 for processor 0 | |
9668 | ||
9669 | set p0_check_pt_data_44,%g4 | |
9670 | rd %ccr,%g5 ! %g5 = 44 | |
9671 | ldx [%g4+0x08],%g2 | |
9672 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
9673 | bne %xcc,p0_reg_check_fail0 | |
9674 | mov 0xee0,%g1 | |
9675 | ldx [%g4+0x10],%g2 | |
9676 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
9677 | bne %xcc,p0_reg_check_fail1 | |
9678 | mov 0xee1,%g1 | |
9679 | ldx [%g4+0x18],%g2 | |
9680 | cmp %l2,%g2 ! %l2 = 000000000000001a | |
9681 | bne %xcc,p0_reg_check_fail2 | |
9682 | mov 0xee2,%g1 | |
9683 | ldx [%g4+0x20],%g2 | |
9684 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
9685 | bne %xcc,p0_reg_check_fail3 | |
9686 | mov 0xee3,%g1 | |
9687 | ldx [%g4+0x28],%g2 | |
9688 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
9689 | bne %xcc,p0_reg_check_fail4 | |
9690 | mov 0xee4,%g1 | |
9691 | ldx [%g4+0x30],%g2 | |
9692 | cmp %l5,%g2 ! %l5 = 00000000d7ffffff | |
9693 | bne %xcc,p0_reg_check_fail5 | |
9694 | mov 0xee5,%g1 | |
9695 | ldx [%g4+0x38],%g2 | |
9696 | cmp %l7,%g2 ! %l7 = 00000000ffffffff | |
9697 | bne %xcc,p0_reg_check_fail7 | |
9698 | mov 0xee7,%g1 | |
9699 | ldx [%g4+0x40],%g3 | |
9700 | std %f0,[%g4] | |
9701 | ldx [%g4],%g2 | |
9702 | cmp %g3,%g2 ! %f0 = ff27ffff 00000000 | |
9703 | bne %xcc,p0_freg_check_fail | |
9704 | mov 0xf00,%g1 | |
9705 | ldx [%g4+0x48],%g3 | |
9706 | std %f2,[%g4] | |
9707 | ldx [%g4],%g2 | |
9708 | cmp %g3,%g2 ! %f2 = c49410cd ff000000 | |
9709 | bne %xcc,p0_freg_check_fail | |
9710 | mov 0xf02,%g1 | |
9711 | ldx [%g4+0x50],%g3 | |
9712 | std %f4,[%g4] | |
9713 | ldx [%g4],%g2 | |
9714 | cmp %g3,%g2 ! %f4 = 57000000 00000000 | |
9715 | bne %xcc,p0_freg_check_fail | |
9716 | mov 0xf04,%g1 | |
9717 | ldx [%g4+0x58],%g3 | |
9718 | std %f6,[%g4] | |
9719 | ldx [%g4],%g2 | |
9720 | cmp %g3,%g2 ! %f6 = ed3fd1f8 e76e87d9 | |
9721 | bne %xcc,p0_freg_check_fail | |
9722 | mov 0xf06,%g1 | |
9723 | ldx [%g4+0x60],%g3 | |
9724 | std %f8,[%g4] | |
9725 | ldx [%g4],%g2 | |
9726 | cmp %g3,%g2 ! %f8 = 000000ff ff000000 | |
9727 | bne %xcc,p0_freg_check_fail | |
9728 | mov 0xf08,%g1 | |
9729 | ldx [%g4+0x68],%g3 | |
9730 | std %f10,[%g4] | |
9731 | ldx [%g4],%g2 | |
9732 | cmp %g3,%g2 ! %f10 = e0ad09a3 00000000 | |
9733 | bne %xcc,p0_freg_check_fail | |
9734 | mov 0xf10,%g1 | |
9735 | ldx [%g4+0x70],%g3 | |
9736 | std %f12,[%g4] | |
9737 | ldx [%g4],%g2 | |
9738 | cmp %g3,%g2 ! %f12 = ffffffe0 1aff100f | |
9739 | bne %xcc,p0_freg_check_fail | |
9740 | mov 0xf12,%g1 | |
9741 | ldx [%g4+0x78],%g3 | |
9742 | std %f14,[%g4] | |
9743 | ldx [%g4],%g2 | |
9744 | cmp %g3,%g2 ! %f14 = 9a7a0000 00000000 | |
9745 | bne %xcc,p0_freg_check_fail | |
9746 | mov 0xf14,%g1 | |
9747 | ||
9748 | ! Check Point 44 completed | |
9749 | ||
9750 | ||
9751 | p0_label_221: | |
9752 | ! Mem[00000000201c0000] = ffff1669, %l0 = 00000000000000ff | |
9753 | lduh [%o0+%g0],%l0 ! %l0 = 000000000000ffff | |
9754 | ! Mem[00000000100c1408] = 5f360000, %f31 = e0ffffff | |
9755 | lda [%i3+%o4]0x88,%f31 ! %f31 = 5f360000 | |
9756 | ! Mem[0000000010181410] = 5e27ffff, %l1 = 0000000000000000 | |
9757 | ldswa [%i6+%o5]0x88,%l1 ! %l1 = 000000005e27ffff | |
9758 | ! Mem[0000000030081408] = 00000000, %l3 = 00000000000000ff | |
9759 | lduwa [%i2+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
9760 | ! Mem[0000000010041408] = ff119e5e00000000, %f20 = e3e2fcc3 d3d28bff | |
9761 | ldda [%i1+%o4]0x80,%f20 ! %f20 = ff119e5e 00000000 | |
9762 | ! Mem[0000000010041408] = ff119e5e, %l4 = 0000000000000000 | |
9763 | lduba [%i1+%o4]0x80,%l4 ! %l4 = 00000000000000ff | |
9764 | ! Mem[00000000100c1400] = 0a8d001a 00007a9a 0000365f 0a8d001a | |
9765 | ! Mem[00000000100c1410] = 0000ffff fffce2e3 5e9e11ff 6b6c2202 | |
9766 | ! Mem[00000000100c1420] = 00000000 d81a5b92 c780ffbb d9876ee7 | |
9767 | ! Mem[00000000100c1430] = 7a000000 e46db68a ffffffe0 00000000 | |
9768 | ldda [%i3]ASI_BLK_P,%f16 ! Block Load from 00000000100c1400 | |
9769 | ! Mem[0000000030041410] = 1a8bd2d3, %f2 = c49410cd | |
9770 | lda [%i1+%o5]0x81,%f2 ! %f2 = 1a8bd2d3 | |
9771 | ! Mem[0000000030141400] = 00000000ffffffff, %l2 = 000000000000001a | |
9772 | ldxa [%i5+%g0]0x81,%l2 ! %l2 = 00000000ffffffff | |
9773 | ! Starting 10 instruction Store Burst | |
9774 | ! Mem[0000000010081410] = ffffffff, %l6 = 000000000a8d001a | |
9775 | ldstuba [%i2+%o5]0x80,%l6 ! %l6 = 000000ff000000ff | |
9776 | ||
9777 | p0_label_222: | |
9778 | ! %f4 = 57000000 00000000, Mem[0000000030141400] = 00000000 ffffffff | |
9779 | stda %f4 ,[%i5+%g0]0x81 ! Mem[0000000030141400] = 57000000 00000000 | |
9780 | ! %l6 = 00000000000000ff, Mem[0000000010101408] = ffff00ff | |
9781 | stw %l6,[%i4+%o4] ! Mem[0000000010101408] = 000000ff | |
9782 | ! %f7 = e76e87d9, Mem[0000000010181410] = 5e27ffff | |
9783 | sta %f7 ,[%i6+%o5]0x88 ! Mem[0000000010181410] = e76e87d9 | |
9784 | ! %l2 = 00000000ffffffff, Mem[0000000010041414] = 00000000 | |
9785 | stw %l2,[%i1+0x014] ! Mem[0000000010041414] = ffffffff | |
9786 | ! Mem[0000000030001400] = 0a06c0b1, %l3 = 0000000000000000 | |
9787 | swapa [%i0+%g0]0x89,%l3 ! %l3 = 000000000a06c0b1 | |
9788 | membar #Sync ! Added by membar checker (56) | |
9789 | ! %l7 = 00000000ffffffff, Mem[00000000100c143c] = 00000000 | |
9790 | stw %l7,[%i3+0x03c] ! Mem[00000000100c143c] = ffffffff | |
9791 | ! %l2 = 00000000ffffffff, Mem[0000000010101400] = ff0000ff | |
9792 | stba %l2,[%i4+%g0]0x80 ! Mem[0000000010101400] = ff0000ff | |
9793 | ! %l6 = 00000000000000ff, Mem[0000000010081424] = ff000000, %asi = 80 | |
9794 | stwa %l6,[%i2+0x024]%asi ! Mem[0000000010081424] = 000000ff | |
9795 | ! %l7 = 00000000ffffffff, Mem[0000000030141408] = 0000ffff | |
9796 | stwa %l7,[%i5+%o4]0x81 ! Mem[0000000030141408] = ffffffff | |
9797 | ! Starting 10 instruction Load Burst | |
9798 | ! Mem[00000000211c0000] = 5700fe0c, %l0 = 000000000000ffff | |
9799 | lduba [%o2+0x001]%asi,%l0 ! %l0 = 0000000000000000 | |
9800 | ||
9801 | p0_label_223: | |
9802 | ! Mem[0000000010181428] = ffffffff 02f1ffff, %l2 = ffffffff, %l3 = 0a06c0b1 | |
9803 | ldd [%i6+0x028],%l2 ! %l2 = 00000000ffffffff 0000000002f1ffff | |
9804 | ! Mem[0000000010001410] = ff000000, %l5 = 00000000d7ffffff | |
9805 | ldsba [%i0+%o5]0x80,%l5 ! %l5 = ffffffffffffffff | |
9806 | ! Mem[0000000010181408] = 00000000, %l2 = 00000000ffffffff | |
9807 | lduw [%i6+%o4],%l2 ! %l2 = 0000000000000000 | |
9808 | ! Mem[00000000100c1408] = 0000365f, %l5 = ffffffffffffffff | |
9809 | ldsha [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
9810 | ! Mem[0000000010081410] = ffffffff, %l7 = 00000000ffffffff | |
9811 | lduwa [%i2+%o5]0x88,%l7 ! %l7 = 00000000ffffffff | |
9812 | ! Mem[00000000300c1400] = b1c0060a, %l5 = 0000000000000000 | |
9813 | ldsba [%i3+%g0]0x89,%l5 ! %l5 = 000000000000000a | |
9814 | ! Mem[0000000010101410] = 00000000, %l5 = 000000000000000a | |
9815 | ldsba [%i4+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
9816 | ! Mem[000000001014140c] = 00000000, %l4 = 00000000000000ff | |
9817 | lduwa [%i5+0x00c]%asi,%l4 ! %l4 = 0000000000000000 | |
9818 | ! Mem[0000000010081400] = 5f000000, %l7 = 00000000ffffffff | |
9819 | lduba [%i2+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
9820 | ! Starting 10 instruction Store Burst | |
9821 | ! Mem[0000000010001410] = ff000000, %l6 = 00000000000000ff | |
9822 | swapa [%i0+%o5]0x80,%l6 ! %l6 = 00000000ff000000 | |
9823 | ||
9824 | p0_label_224: | |
9825 | ! %l1 = 000000005e27ffff, Mem[00000000300c1400] = 0a06c0b1 | |
9826 | stba %l1,[%i3+%g0]0x81 ! Mem[00000000300c1400] = ff06c0b1 | |
9827 | ! %l1 = 000000005e27ffff, Mem[0000000030041410] = d3d28b1a | |
9828 | stba %l1,[%i1+%o5]0x89 ! Mem[0000000030041410] = d3d28bff | |
9829 | ! %l3 = 0000000002f1ffff, Mem[0000000010081400] = 000000005f000000 | |
9830 | stxa %l3,[%i2+%g0]0x88 ! Mem[0000000010081400] = 0000000002f1ffff | |
9831 | ! Mem[0000000010141430] = 8ab6e09c, %l4 = 0000000000000000 | |
9832 | ldstuba [%i5+0x030]%asi,%l4 ! %l4 = 0000008a000000ff | |
9833 | ! Mem[0000000010181400] = 5372d306, %l1 = 000000005e27ffff | |
9834 | swapa [%i6+%g0]0x88,%l1 ! %l1 = 000000005372d306 | |
9835 | ! %l1 = 000000005372d306, Mem[0000000020800000] = 57000db6 | |
9836 | sth %l1,[%o1+%g0] ! Mem[0000000020800000] = d3060db6 | |
9837 | ! Mem[0000000010041400] = 000000ff, %l0 = 0000000000000000 | |
9838 | ldstuba [%i1+%g0]0x88,%l0 ! %l0 = 000000ff000000ff | |
9839 | ! %f24 = 00000000 d81a5b92, Mem[0000000010181400] = ffff275e 000000ff | |
9840 | stda %f24,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000 d81a5b92 | |
9841 | ! %f2 = 1a8bd2d3 ff000000, Mem[00000000100c1410] = ffff0000 e3e2fcff | |
9842 | stda %f2 ,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 1a8bd2d3 ff000000 | |
9843 | ! Starting 10 instruction Load Burst | |
9844 | ! Mem[0000000010081410] = ffffffffd7ffffff, %l0 = 00000000000000ff | |
9845 | ldxa [%i2+%o5]0x80,%l0 ! %l0 = ffffffffd7ffffff | |
9846 | ||
9847 | p0_label_225: | |
9848 | ! Mem[0000000010001400] = 1a008d0a, %f17 = 00007a9a | |
9849 | lda [%i0+%g0]0x80,%f17 ! %f17 = 1a008d0a | |
9850 | ! Mem[0000000030081410] = ff000000, %l5 = 0000000000000000 | |
9851 | lduwa [%i2+%o5]0x89,%l5 ! %l5 = 00000000ff000000 | |
9852 | ! Mem[0000000010041410] = 000000ff, %l5 = 00000000ff000000 | |
9853 | lduha [%i1+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
9854 | ! Mem[00000000300c1400] = ff06c0b1, %f23 = 6b6c2202 | |
9855 | lda [%i3+%g0]0x81,%f23 ! %f23 = ff06c0b1 | |
9856 | ! Mem[0000000010041400] = ff000000, %f14 = 9a7a0000 | |
9857 | lda [%i1+%g0]0x80,%f14 ! %f14 = ff000000 | |
9858 | membar #Sync ! Added by membar checker (57) | |
9859 | ! Mem[0000000010041400] = ff000000 ff000000 ff119e5e 00000000 | |
9860 | ! Mem[0000000010041410] = ff000000 ffffffff ffffffff 57119e5e | |
9861 | ! Mem[0000000010041420] = ffffffb4 0000005e 39aced3b 8ab6e09c | |
9862 | ! Mem[0000000010041430] = 8ab6e09c 1aff100f cd1094c4 e46dee46 | |
9863 | ldda [%i1]ASI_BLK_AIUPL,%f0 ! Block Load from 0000000010041400 | |
9864 | ! Mem[0000000010041400] = ff000000, %l3 = 0000000002f1ffff | |
9865 | lduba [%i1+%g0]0x80,%l3 ! %l3 = 00000000000000ff | |
9866 | ! Mem[0000000010041410] = ffffffff000000ff, %l7 = 0000000000000000 | |
9867 | ldxa [%i1+%o5]0x88,%l7 ! %l7 = ffffffff000000ff | |
9868 | ! Mem[0000000030081400] = 00000000ffffffff, %l4 = 000000000000008a | |
9869 | ldxa [%i2+%g0]0x89,%l4 ! %l4 = 00000000ffffffff | |
9870 | ! Starting 10 instruction Store Burst | |
9871 | ! %l3 = 00000000000000ff, Mem[00000000300c1408] = 00000000 | |
9872 | stwa %l3,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 000000ff | |
9873 | ||
9874 | ! Check Point 45 for processor 0 | |
9875 | ||
9876 | set p0_check_pt_data_45,%g4 | |
9877 | rd %ccr,%g5 ! %g5 = 44 | |
9878 | ldx [%g4+0x08],%g2 | |
9879 | cmp %l0,%g2 ! %l0 = ffffffffd7ffffff | |
9880 | bne %xcc,p0_reg_check_fail0 | |
9881 | mov 0xee0,%g1 | |
9882 | ldx [%g4+0x10],%g2 | |
9883 | cmp %l1,%g2 ! %l1 = 000000005372d306 | |
9884 | bne %xcc,p0_reg_check_fail1 | |
9885 | mov 0xee1,%g1 | |
9886 | ldx [%g4+0x18],%g2 | |
9887 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
9888 | bne %xcc,p0_reg_check_fail2 | |
9889 | mov 0xee2,%g1 | |
9890 | ldx [%g4+0x20],%g2 | |
9891 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
9892 | bne %xcc,p0_reg_check_fail3 | |
9893 | mov 0xee3,%g1 | |
9894 | ldx [%g4+0x28],%g2 | |
9895 | cmp %l4,%g2 ! %l4 = 00000000ffffffff | |
9896 | bne %xcc,p0_reg_check_fail4 | |
9897 | mov 0xee4,%g1 | |
9898 | ldx [%g4+0x30],%g2 | |
9899 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
9900 | bne %xcc,p0_reg_check_fail5 | |
9901 | mov 0xee5,%g1 | |
9902 | ldx [%g4+0x38],%g2 | |
9903 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
9904 | bne %xcc,p0_reg_check_fail6 | |
9905 | mov 0xee6,%g1 | |
9906 | ldx [%g4+0x40],%g2 | |
9907 | cmp %l7,%g2 ! %l7 = ffffffff000000ff | |
9908 | bne %xcc,p0_reg_check_fail7 | |
9909 | mov 0xee7,%g1 | |
9910 | ldx [%g4+0x48],%g3 | |
9911 | std %f0,[%g4] | |
9912 | ldx [%g4],%g2 | |
9913 | cmp %g3,%g2 ! %f0 = 000000ff 000000ff | |
9914 | bne %xcc,p0_freg_check_fail | |
9915 | mov 0xf00,%g1 | |
9916 | ldx [%g4+0x50],%g3 | |
9917 | std %f2,[%g4] | |
9918 | ldx [%g4],%g2 | |
9919 | cmp %g3,%g2 ! %f2 = 00000000 5e9e11ff | |
9920 | bne %xcc,p0_freg_check_fail | |
9921 | mov 0xf02,%g1 | |
9922 | ldx [%g4+0x58],%g3 | |
9923 | std %f4,[%g4] | |
9924 | ldx [%g4],%g2 | |
9925 | cmp %g3,%g2 ! %f4 = ffffffff 000000ff | |
9926 | bne %xcc,p0_freg_check_fail | |
9927 | mov 0xf04,%g1 | |
9928 | ldx [%g4+0x60],%g3 | |
9929 | std %f6,[%g4] | |
9930 | ldx [%g4],%g2 | |
9931 | cmp %g3,%g2 ! %f6 = 5e9e1157 ffffffff | |
9932 | bne %xcc,p0_freg_check_fail | |
9933 | mov 0xf06,%g1 | |
9934 | ldx [%g4+0x68],%g3 | |
9935 | std %f8,[%g4] | |
9936 | ldx [%g4],%g2 | |
9937 | cmp %g3,%g2 ! %f8 = 5e000000 b4ffffff | |
9938 | bne %xcc,p0_freg_check_fail | |
9939 | mov 0xf08,%g1 | |
9940 | ldx [%g4+0x70],%g3 | |
9941 | std %f10,[%g4] | |
9942 | ldx [%g4],%g2 | |
9943 | cmp %g3,%g2 ! %f10 = 9ce0b68a 3bedac39 | |
9944 | bne %xcc,p0_freg_check_fail | |
9945 | mov 0xf10,%g1 | |
9946 | ldx [%g4+0x78],%g3 | |
9947 | std %f12,[%g4] | |
9948 | ldx [%g4],%g2 | |
9949 | cmp %g3,%g2 ! %f12 = 0f10ff1a 9ce0b68a | |
9950 | bne %xcc,p0_freg_check_fail | |
9951 | mov 0xf12,%g1 | |
9952 | ldx [%g4+0x80],%g3 | |
9953 | std %f14,[%g4] | |
9954 | ldx [%g4],%g2 | |
9955 | cmp %g3,%g2 ! %f14 = 46ee6de4 c49410cd | |
9956 | bne %xcc,p0_freg_check_fail | |
9957 | mov 0xf14,%g1 | |
9958 | ldx [%g4+0x88],%g3 | |
9959 | std %f16,[%g4] | |
9960 | ldx [%g4],%g2 | |
9961 | cmp %g3,%g2 ! %f16 = 0a8d001a 1a008d0a | |
9962 | bne %xcc,p0_freg_check_fail | |
9963 | mov 0xf16,%g1 | |
9964 | ldx [%g4+0x90],%g3 | |
9965 | std %f18,[%g4] | |
9966 | ldx [%g4],%g2 | |
9967 | cmp %g3,%g2 ! %f18 = 0000365f 0a8d001a | |
9968 | bne %xcc,p0_freg_check_fail | |
9969 | mov 0xf18,%g1 | |
9970 | ldx [%g4+0x98],%g3 | |
9971 | std %f20,[%g4] | |
9972 | ldx [%g4],%g2 | |
9973 | cmp %g3,%g2 ! %f20 = 0000ffff fffce2e3 | |
9974 | bne %xcc,p0_freg_check_fail | |
9975 | mov 0xf20,%g1 | |
9976 | ldx [%g4+0xa0],%g3 | |
9977 | std %f22,[%g4] | |
9978 | ldx [%g4],%g2 | |
9979 | cmp %g3,%g2 ! %f22 = 5e9e11ff ff06c0b1 | |
9980 | bne %xcc,p0_freg_check_fail | |
9981 | mov 0xf22,%g1 | |
9982 | ldx [%g4+0xa8],%g3 | |
9983 | std %f24,[%g4] | |
9984 | ldx [%g4],%g2 | |
9985 | cmp %g3,%g2 ! %f24 = 00000000 d81a5b92 | |
9986 | bne %xcc,p0_freg_check_fail | |
9987 | mov 0xf24,%g1 | |
9988 | ldx [%g4+0xb0],%g3 | |
9989 | std %f26,[%g4] | |
9990 | ldx [%g4],%g2 | |
9991 | cmp %g3,%g2 ! %f26 = c780ffbb d9876ee7 | |
9992 | bne %xcc,p0_freg_check_fail | |
9993 | mov 0xf26,%g1 | |
9994 | ldx [%g4+0xb8],%g3 | |
9995 | std %f28,[%g4] | |
9996 | ldx [%g4],%g2 | |
9997 | cmp %g3,%g2 ! %f28 = 7a000000 e46db68a | |
9998 | bne %xcc,p0_freg_check_fail | |
9999 | mov 0xf28,%g1 | |
10000 | ldx [%g4+0xc0],%g3 | |
10001 | std %f30,[%g4] | |
10002 | ldx [%g4],%g2 | |
10003 | cmp %g3,%g2 ! %f30 = ffffffe0 00000000 | |
10004 | bne %xcc,p0_freg_check_fail | |
10005 | mov 0xf30,%g1 | |
10006 | ||
10007 | ! Check Point 45 completed | |
10008 | ||
10009 | ||
10010 | p0_label_226: | |
10011 | ! %f10 = 9ce0b68a, Mem[0000000010081420] = 000000ff | |
10012 | sta %f10,[%i2+0x020]%asi ! Mem[0000000010081420] = 9ce0b68a | |
10013 | membar #Sync ! Added by membar checker (58) | |
10014 | ! %l1 = 000000005372d306, Mem[0000000010041408] = ff119e5e00000000 | |
10015 | stx %l1,[%i1+%o4] ! Mem[0000000010041408] = 000000005372d306 | |
10016 | ! Mem[000000001010141c] = 000000ff, %l0 = d7ffffff, %l4 = ffffffff | |
10017 | add %i4,0x1c,%g1 | |
10018 | casa [%g1]0x80,%l0,%l4 ! %l4 = 00000000000000ff | |
10019 | ! %l5 = 00000000000000ff, Mem[00000000100c1408] = 5f360000 | |
10020 | stha %l5,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 5f3600ff | |
10021 | ! Mem[0000000010141400] = ffffff00, %l1 = 000000005372d306 | |
10022 | swapa [%i5+%g0]0x88,%l1 ! %l1 = 00000000ffffff00 | |
10023 | ! %f26 = c780ffbb d9876ee7, %l6 = 00000000ff000000 | |
10024 | ! Mem[0000000030041428] = c780ffbbd9876ee7 | |
10025 | add %i1,0x028,%g1 | |
10026 | stda %f26,[%g1+%l6]ASI_PST16_SL ! Mem[0000000030041428] = c780ffbbd9876ee7 | |
10027 | ! Mem[0000000010101400] = ff0000ff, %l7 = ffffffff000000ff | |
10028 | ldstuba [%i4+%g0]0x80,%l7 ! %l7 = 000000ff000000ff | |
10029 | ! Mem[0000000010041428] = 39aced3b8ab6e09c, %l1 = 00000000ffffff00, %l7 = 00000000000000ff | |
10030 | add %i1,0x28,%g1 | |
10031 | casxa [%g1]0x80,%l1,%l7 ! %l7 = 39aced3b8ab6e09c | |
10032 | ! %l6 = ff000000, %l7 = 8ab6e09c, Mem[00000000100c1400] = 1a008d0a 9a7a0000 | |
10033 | stda %l6,[%i3+%g0]0x88 ! Mem[00000000100c1400] = ff000000 8ab6e09c | |
10034 | ! Starting 10 instruction Load Burst | |
10035 | ! Mem[0000000030041408] = ffffff00, %f29 = e46db68a | |
10036 | lda [%i1+%o4]0x81,%f29 ! %f29 = ffffff00 | |
10037 | ||
10038 | p0_label_227: | |
10039 | ! Mem[0000000010141408] = 0000000000000000, %f30 = ffffffe0 00000000 | |
10040 | ldda [%i5+%o4]0x80,%f30 ! %f30 = 00000000 00000000 | |
10041 | ! Mem[0000000010181438] = ffffffff032cff8e, %l3 = 00000000000000ff | |
10042 | ldx [%i6+0x038],%l3 ! %l3 = ffffffff032cff8e | |
10043 | ! Mem[00000000201c0000] = ffff1669, %l1 = 00000000ffffff00 | |
10044 | lduha [%o0+0x000]%asi,%l1 ! %l1 = 000000000000ffff | |
10045 | ! Mem[00000000100c1400] = 8ab6e09cff000000, %f20 = 0000ffff fffce2e3 | |
10046 | ldda [%i3+%g0]0x88,%f20 ! %f20 = 8ab6e09c ff000000 | |
10047 | ! Mem[0000000010081400] = fffff10200000000, %l4 = 00000000000000ff | |
10048 | ldxa [%i2+%g0]0x80,%l4 ! %l4 = fffff10200000000 | |
10049 | ! Mem[0000000030081408] = 00000000, %l7 = 39aced3b8ab6e09c | |
10050 | lduha [%i2+%o4]0x81,%l7 ! %l7 = 0000000000000000 | |
10051 | ! Mem[0000000021800180] = e25edb07, %l5 = 00000000000000ff | |
10052 | ldsba [%o3+0x180]%asi,%l5 ! %l5 = ffffffffffffffe2 | |
10053 | ! Mem[00000000100c1400] = 8ab6e09cff000000, %l0 = ffffffffd7ffffff | |
10054 | ldxa [%i3+%g0]0x88,%l0 ! %l0 = 8ab6e09cff000000 | |
10055 | ! Mem[0000000010041400] = ff000000, %l4 = fffff10200000000 | |
10056 | ldsha [%i1+%g0]0x80,%l4 ! %l4 = ffffffffffffff00 | |
10057 | ! Starting 10 instruction Store Burst | |
10058 | ! %f4 = ffffffff 000000ff, Mem[0000000030101408] = ff000000 ff000000 | |
10059 | stda %f4 ,[%i4+%o4]0x81 ! Mem[0000000030101408] = ffffffff 000000ff | |
10060 | ||
10061 | p0_label_228: | |
10062 | ! %l5 = ffffffffffffffe2, Mem[0000000030081410] = ff000000 | |
10063 | stwa %l5,[%i2+%o5]0x89 ! Mem[0000000030081410] = ffffffe2 | |
10064 | ! %l2 = 00000000, %l3 = 032cff8e, Mem[0000000010141400] = 06d37253 00000000 | |
10065 | stda %l2,[%i5+%g0]0x80 ! Mem[0000000010141400] = 00000000 032cff8e | |
10066 | ! %f8 = 5e000000 b4ffffff, %l0 = 8ab6e09cff000000 | |
10067 | ! Mem[0000000010141420] = ffffffb40000005e | |
10068 | add %i5,0x020,%g1 | |
10069 | stda %f8,[%g1+%l0]ASI_PST8_P ! Mem[0000000010141420] = ffffffb40000005e | |
10070 | ! %l7 = 0000000000000000, Mem[0000000030101400] = e0ade2e3 | |
10071 | stha %l7,[%i4+%g0]0x89 ! Mem[0000000030101400] = e0ad0000 | |
10072 | ! %f20 = 8ab6e09c ff000000, Mem[0000000010101410] = 00000000 00000000 | |
10073 | stda %f20,[%i4+%o5]0x80 ! Mem[0000000010101410] = 8ab6e09c ff000000 | |
10074 | ! Mem[0000000010081400] = fffff102, %l2 = 0000000000000000 | |
10075 | ldstuba [%i2+%g0]0x80,%l2 ! %l2 = 000000ff000000ff | |
10076 | ! Mem[00000000100c1400] = 000000ff9ce0b68a, %l6 = 00000000ff000000, %l4 = ffffffffffffff00 | |
10077 | casxa [%i3]0x80,%l6,%l4 ! %l4 = 000000ff9ce0b68a | |
10078 | ! %l5 = ffffffffffffffe2, Mem[00000000211c0000] = 5700fe0c | |
10079 | stb %l5,[%o2+%g0] ! Mem[00000000211c0000] = e200fe0c | |
10080 | ! Mem[0000000010141400] = 00000000, %l2 = 00000000000000ff | |
10081 | swapa [%i5+%g0]0x80,%l2 ! %l2 = 0000000000000000 | |
10082 | ! Starting 10 instruction Load Burst | |
10083 | ! Mem[0000000030041400] = ff000000, %l4 = 000000ff9ce0b68a | |
10084 | lduwa [%i1+%g0]0x81,%l4 ! %l4 = 00000000ff000000 | |
10085 | ||
10086 | p0_label_229: | |
10087 | ! Mem[0000000030001408] = ffffffff 46ee6dff, %l0 = ff000000, %l1 = 0000ffff | |
10088 | ldda [%i0+%o4]0x89,%l0 ! %l0 = 0000000046ee6dff 00000000ffffffff | |
10089 | ! Mem[0000000010041408] = 00000000, %f26 = c780ffbb | |
10090 | lda [%i1+0x008]%asi,%f26 ! %f26 = 00000000 | |
10091 | ! Mem[00000000201c0000] = ffff1669, %l6 = 00000000ff000000 | |
10092 | ldsba [%o0+0x001]%asi,%l6 ! %l6 = ffffffffffffffff | |
10093 | ! Mem[00000000300c1410] = 0000005f, %l5 = ffffffffffffffe2 | |
10094 | lduwa [%i3+%o5]0x89,%l5 ! %l5 = 000000000000005f | |
10095 | ! Mem[0000000030081400] = ffffffff, %l1 = 00000000ffffffff | |
10096 | ldswa [%i2+%g0]0x89,%l1 ! %l1 = ffffffffffffffff | |
10097 | ! Mem[0000000010101400] = ff0000ffcaffffff, %l3 = ffffffff032cff8e | |
10098 | ldxa [%i4+%g0]0x80,%l3 ! %l3 = ff0000ffcaffffff | |
10099 | ! Mem[0000000010001400] = 1a008d0a, %l6 = ffffffffffffffff | |
10100 | ldsba [%i0+%g0]0x80,%l6 ! %l6 = 000000000000001a | |
10101 | ! Mem[0000000010041404] = ff000000, %l6 = 000000000000001a | |
10102 | ldsb [%i1+0x005],%l6 ! %l6 = 0000000000000000 | |
10103 | ! Mem[000000001004142c] = 8ab6e09c, %l1 = ffffffffffffffff | |
10104 | ldub [%i1+0x02d],%l1 ! %l1 = 00000000000000b6 | |
10105 | ! Starting 10 instruction Store Burst | |
10106 | ! %f26 = 00000000 d9876ee7, Mem[0000000010001400] = 1a008d0a ffffffff | |
10107 | stda %f26,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00000000 d9876ee7 | |
10108 | ||
10109 | p0_label_230: | |
10110 | ! %l4 = 00000000ff000000, Mem[0000000010101400] = ff0000ff | |
10111 | stwa %l4,[%i4+%g0]0x88 ! Mem[0000000010101400] = ff000000 | |
10112 | ! %l1 = 00000000000000b6, Mem[0000000010181410] = d9876ee7 | |
10113 | stwa %l1,[%i6+%o5]0x80 ! Mem[0000000010181410] = 000000b6 | |
10114 | ! Mem[0000000010041408] = 00000000, %l7 = 0000000000000000 | |
10115 | swapa [%i1+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
10116 | ! %l5 = 000000000000005f, Mem[0000000020800000] = d3060db6 | |
10117 | stb %l5,[%o1+%g0] ! Mem[0000000020800000] = 5f060db6 | |
10118 | ! %f20 = 8ab6e09c ff000000, Mem[0000000010141400] = ff000000 8eff2c03 | |
10119 | stda %f20,[%i5+%g0]0x88 ! Mem[0000000010141400] = 8ab6e09c ff000000 | |
10120 | ! %l6 = 0000000000000000, Mem[0000000030141410] = 00000000 | |
10121 | stwa %l6,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 | |
10122 | ! %l2 = 00000000, %l3 = caffffff, Mem[0000000010001438] = 8ab6e09c 00007a9a | |
10123 | stda %l2,[%i0+0x038]%asi ! Mem[0000000010001438] = 00000000 caffffff | |
10124 | ! %f4 = ffffffff 000000ff, %l1 = 00000000000000b6 | |
10125 | ! Mem[00000000100c1430] = 7a000000e46db68a | |
10126 | add %i3,0x030,%g1 | |
10127 | stda %f4,[%g1+%l1]ASI_PST8_P ! Mem[00000000100c1430] = ff00ffffe400008a | |
10128 | ! %l2 = 00000000, %l3 = caffffff, Mem[0000000010101410] = 9ce0b68a 000000ff | |
10129 | stda %l2,[%i4+%o5]0x88 ! Mem[0000000010101410] = 00000000 caffffff | |
10130 | ! Starting 10 instruction Load Burst | |
10131 | ! Mem[0000000010001400] = 00000000, %l2 = 0000000000000000 | |
10132 | ldsb [%i0+0x003],%l2 ! %l2 = 0000000000000000 | |
10133 | ||
10134 | ! Check Point 46 for processor 0 | |
10135 | ||
10136 | set p0_check_pt_data_46,%g4 | |
10137 | rd %ccr,%g5 ! %g5 = 44 | |
10138 | ldx [%g4+0x08],%g2 | |
10139 | cmp %l0,%g2 ! %l0 = 0000000046ee6dff | |
10140 | bne %xcc,p0_reg_check_fail0 | |
10141 | mov 0xee0,%g1 | |
10142 | ldx [%g4+0x10],%g2 | |
10143 | cmp %l1,%g2 ! %l1 = 00000000000000b6 | |
10144 | bne %xcc,p0_reg_check_fail1 | |
10145 | mov 0xee1,%g1 | |
10146 | ldx [%g4+0x18],%g2 | |
10147 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
10148 | bne %xcc,p0_reg_check_fail2 | |
10149 | mov 0xee2,%g1 | |
10150 | ldx [%g4+0x20],%g2 | |
10151 | cmp %l3,%g2 ! %l3 = ff0000ffcaffffff | |
10152 | bne %xcc,p0_reg_check_fail3 | |
10153 | mov 0xee3,%g1 | |
10154 | ldx [%g4+0x28],%g2 | |
10155 | cmp %l4,%g2 ! %l4 = 00000000ff000000 | |
10156 | bne %xcc,p0_reg_check_fail4 | |
10157 | mov 0xee4,%g1 | |
10158 | ldx [%g4+0x30],%g2 | |
10159 | cmp %l5,%g2 ! %l5 = 000000000000005f | |
10160 | bne %xcc,p0_reg_check_fail5 | |
10161 | mov 0xee5,%g1 | |
10162 | ldx [%g4+0x38],%g2 | |
10163 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
10164 | bne %xcc,p0_reg_check_fail6 | |
10165 | mov 0xee6,%g1 | |
10166 | ldx [%g4+0x40],%g2 | |
10167 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
10168 | bne %xcc,p0_reg_check_fail7 | |
10169 | mov 0xee7,%g1 | |
10170 | ldx [%g4+0x48],%g3 | |
10171 | std %f0,[%g4] | |
10172 | ldx [%g4],%g2 | |
10173 | cmp %g3,%g2 ! %f0 = 000000ff 000000ff | |
10174 | bne %xcc,p0_freg_check_fail | |
10175 | mov 0xf00,%g1 | |
10176 | ldx [%g4+0x50],%g3 | |
10177 | std %f20,[%g4] | |
10178 | ldx [%g4],%g2 | |
10179 | cmp %g3,%g2 ! %f20 = 8ab6e09c ff000000 | |
10180 | bne %xcc,p0_freg_check_fail | |
10181 | mov 0xf20,%g1 | |
10182 | ldx [%g4+0x58],%g3 | |
10183 | std %f26,[%g4] | |
10184 | ldx [%g4],%g2 | |
10185 | cmp %g3,%g2 ! %f26 = 00000000 d9876ee7 | |
10186 | bne %xcc,p0_freg_check_fail | |
10187 | mov 0xf26,%g1 | |
10188 | ldx [%g4+0x60],%g3 | |
10189 | std %f28,[%g4] | |
10190 | ldx [%g4],%g2 | |
10191 | cmp %g3,%g2 ! %f28 = 7a000000 ffffff00 | |
10192 | bne %xcc,p0_freg_check_fail | |
10193 | mov 0xf28,%g1 | |
10194 | ldx [%g4+0x68],%g3 | |
10195 | std %f30,[%g4] | |
10196 | ldx [%g4],%g2 | |
10197 | cmp %g3,%g2 ! %f30 = 00000000 00000000 | |
10198 | bne %xcc,p0_freg_check_fail | |
10199 | mov 0xf30,%g1 | |
10200 | ||
10201 | ! Check Point 46 completed | |
10202 | ||
10203 | ||
10204 | p0_label_231: | |
10205 | ! Mem[00000000211c0000] = e200fe0c, %l4 = 00000000ff000000 | |
10206 | ldsba [%o2+0x001]%asi,%l4 ! %l4 = 0000000000000000 | |
10207 | ! Mem[00000000100c1400] = 000000ff, %l4 = 0000000000000000 | |
10208 | ldub [%i3+0x001],%l4 ! %l4 = 0000000000000000 | |
10209 | ! Mem[0000000030081400] = ffffffff, %l5 = 000000000000005f | |
10210 | lduha [%i2+%g0]0x89,%l5 ! %l5 = 000000000000ffff | |
10211 | ! Mem[00000000211c0000] = e200fe0c, %l5 = 000000000000ffff | |
10212 | ldsha [%o2+0x000]%asi,%l5 ! %l5 = ffffffffffffe200 | |
10213 | ! Mem[0000000010141430] = ffb6e09c, %l5 = ffffffffffffe200 | |
10214 | ldsha [%i5+0x032]%asi,%l5 ! %l5 = ffffffffffffe09c | |
10215 | ! Mem[00000000100c1400] = ff000000, %f30 = 00000000 | |
10216 | lda [%i3+%g0]0x88,%f30 ! %f30 = ff000000 | |
10217 | ! Mem[0000000010001408] = ffff0000ffffffff, %f4 = ffffffff 000000ff | |
10218 | ldd [%i0+%o4],%f4 ! %f4 = ffff0000 ffffffff | |
10219 | ! Mem[0000000030001400] = 00000000, %l3 = ff0000ffcaffffff | |
10220 | ldsba [%i0+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
10221 | ! Mem[00000000100c1404] = 9ce0b68a, %l0 = 0000000046ee6dff | |
10222 | lduba [%i3+0x006]%asi,%l0 ! %l0 = 00000000000000b6 | |
10223 | ! Starting 10 instruction Store Burst | |
10224 | ! %f24 = 00000000 d81a5b92, Mem[00000000100c1410] = ff000000 1a8bd2d3 | |
10225 | stda %f24,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 00000000 d81a5b92 | |
10226 | ||
10227 | p0_label_232: | |
10228 | ! Mem[0000000030001408] = ff6dee46, %l0 = 00000000000000b6 | |
10229 | ldstuba [%i0+%o4]0x81,%l0 ! %l0 = 000000ff000000ff | |
10230 | ! Mem[000000001004143a] = cd1094c4, %l1 = 00000000000000b6 | |
10231 | ldstuba [%i1+0x03a]%asi,%l1 ! %l1 = 00000094000000ff | |
10232 | ! %l1 = 0000000000000094, Mem[0000000010101400] = 000000ff | |
10233 | stwa %l1,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00000094 | |
10234 | ! %l2 = 0000000000000000, Mem[00000000218000c0] = 8ae24e2c, %asi = 80 | |
10235 | stba %l2,[%o3+0x0c0]%asi ! Mem[00000000218000c0] = 00e24e2c | |
10236 | ! %f16 = 0a8d001a 1a008d0a 0000365f 0a8d001a | |
10237 | ! %f20 = 8ab6e09c ff000000 5e9e11ff ff06c0b1 | |
10238 | ! %f24 = 00000000 d81a5b92 00000000 d9876ee7 | |
10239 | ! %f28 = 7a000000 ffffff00 ff000000 00000000 | |
10240 | stda %f16,[%i0]ASI_BLK_AIUS ! Block Store to 0000000030001400 | |
10241 | ! %f10 = 9ce0b68a 3bedac39, Mem[0000000030101410] = ffff00ff ffffffff | |
10242 | stda %f10,[%i4+%o5]0x89 ! Mem[0000000030101410] = 9ce0b68a 3bedac39 | |
10243 | ! %l4 = 0000000000000000, Mem[00000000201c0000] = ffff1669, %asi = 80 | |
10244 | stba %l4,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00ff1669 | |
10245 | ! Mem[0000000010081420] = 9ce0b68a, %l2 = 00000000, %l2 = 00000000 | |
10246 | add %i2,0x20,%g1 | |
10247 | casa [%g1]0x80,%l2,%l2 ! %l2 = 000000009ce0b68a | |
10248 | ! %f1 = 000000ff, Mem[0000000030001400] = 1a008d0a | |
10249 | sta %f1 ,[%i0+%g0]0x89 ! Mem[0000000030001400] = 000000ff | |
10250 | ! Starting 10 instruction Load Burst | |
10251 | ! Mem[0000000010141410] = 0000007a, %l1 = 0000000000000094 | |
10252 | ldsha [%i5+%o5]0x88,%l1 ! %l1 = 000000000000007a | |
10253 | ||
10254 | p0_label_233: | |
10255 | ! Mem[0000000010081408] = ff000000d81a5b92, %f14 = 46ee6de4 c49410cd | |
10256 | ldda [%i2+%o4]0x80,%f14 ! %f14 = ff000000 d81a5b92 | |
10257 | ! Mem[00000000300c1410] = 5f000000, %l7 = 0000000000000000 | |
10258 | ldsba [%i3+%o5]0x81,%l7 ! %l7 = 000000000000005f | |
10259 | ! Mem[0000000030141410] = 00000000 d7ffffff, %l4 = 00000000, %l5 = ffffe09c | |
10260 | ldda [%i5+%o5]0x81,%l4 ! %l4 = 0000000000000000 00000000d7ffffff | |
10261 | membar #Sync ! Added by membar checker (59) | |
10262 | ! Mem[0000000030001400] = 000000ff, %l1 = 000000000000007a | |
10263 | lduha [%i0+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
10264 | ! Mem[0000000020800000] = 5f060db6, %l4 = 0000000000000000 | |
10265 | ldsba [%o1+0x000]%asi,%l4 ! %l4 = 000000000000005f | |
10266 | ! Mem[0000000010101410] = 00000000, %l2 = 000000009ce0b68a | |
10267 | ldsba [%i4+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
10268 | ! Mem[0000000010101400] = 94000000, %l2 = 0000000000000000 | |
10269 | lduba [%i4+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
10270 | ! Mem[0000000020800000] = 5f060db6, %l1 = 00000000000000ff | |
10271 | ldsb [%o1+%g0],%l1 ! %l1 = 000000000000005f | |
10272 | ! Mem[0000000030041400] = 000000ff, %l4 = 000000000000005f | |
10273 | lduwa [%i1+%g0]0x89,%l4 ! %l4 = 00000000000000ff | |
10274 | ! Starting 10 instruction Store Burst | |
10275 | ! %l5 = 00000000d7ffffff, Mem[0000000010141436] = 365fc6fa, %asi = 80 | |
10276 | stha %l5,[%i5+0x036]%asi ! Mem[0000000010141434] = 365fffff | |
10277 | ||
10278 | p0_label_234: | |
10279 | ! Mem[00000000211c0000] = e200fe0c, %l4 = 00000000000000ff | |
10280 | ldstuba [%o2+0x000]%asi,%l4 ! %l4 = 000000e2000000ff | |
10281 | ! Mem[0000000030181408] = ff000000, %l2 = 0000000000000000 | |
10282 | lduwa [%i6+%o4]0x89,%l2 ! %l2 = 00000000ff000000 | |
10283 | ! Mem[00000000100c1408] = 5f3600ff, %l5 = 00000000d7ffffff | |
10284 | swapa [%i3+%o4]0x88,%l5 ! %l5 = 000000005f3600ff | |
10285 | ! %l5 = 000000005f3600ff, Mem[0000000030001410] = 000000ff9ce0b68a | |
10286 | stxa %l5,[%i0+%o5]0x89 ! Mem[0000000030001410] = 000000005f3600ff | |
10287 | ! %f6 = 5e9e1157, Mem[00000000300c1410] = 5f000000 | |
10288 | sta %f6 ,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 5e9e1157 | |
10289 | ! %l4 = 00000000000000e2, Mem[00000000100c1400] = 000000ff | |
10290 | stha %l4,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00e200ff | |
10291 | ! %f30 = ff000000, Mem[0000000010181404] = d81a5b92 | |
10292 | sta %f30,[%i6+0x004]%asi ! Mem[0000000010181404] = ff000000 | |
10293 | ! %l1 = 000000000000005f, Mem[0000000010101410] = caffffff00000000 | |
10294 | stxa %l1,[%i4+%o5]0x88 ! Mem[0000000010101410] = 000000000000005f | |
10295 | ! Mem[00000000300c1408] = 000000ff, %l0 = 00000000000000ff | |
10296 | ldstuba [%i3+%o4]0x89,%l0 ! %l0 = 000000ff000000ff | |
10297 | ! Starting 10 instruction Load Burst | |
10298 | ! Mem[0000000010181400] = 00000000ff000000, %l1 = 000000000000005f | |
10299 | ldxa [%i6+%g0]0x80,%l1 ! %l1 = 00000000ff000000 | |
10300 | ||
10301 | p0_label_235: | |
10302 | ! Mem[000000001018142c] = 02f1ffff, %l5 = 000000005f3600ff | |
10303 | ldsh [%i6+0x02c],%l5 ! %l5 = 00000000000002f1 | |
10304 | ! Mem[00000000300c1400] = b1c006ff, %l5 = 00000000000002f1 | |
10305 | lduha [%i3+%g0]0x89,%l5 ! %l5 = 00000000000006ff | |
10306 | ! Mem[0000000030181400] = ffffffff, %l2 = 00000000ff000000 | |
10307 | ldsha [%i6+%g0]0x81,%l2 ! %l2 = ffffffffffffffff | |
10308 | ! Mem[0000000010181410] = 000000b6, %l1 = 00000000ff000000 | |
10309 | ldsba [%i6+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
10310 | ! Mem[0000000010181408] = 0000000000000000, %l6 = 0000000000000000 | |
10311 | ldxa [%i6+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
10312 | ! Mem[0000000020800040] = ffff9ffa, %l0 = 00000000000000ff | |
10313 | ldsba [%o1+0x041]%asi,%l0 ! %l0 = ffffffffffffffff | |
10314 | ! Mem[0000000010101424] = d81a5b92, %f1 = 000000ff | |
10315 | lda [%i4+0x024]%asi,%f1 ! %f1 = d81a5b92 | |
10316 | ! Mem[0000000030081408] = 00000000 ffff275e, %l6 = 00000000, %l7 = 0000005f | |
10317 | ldda [%i2+%o4]0x81,%l6 ! %l6 = 0000000000000000 00000000ffff275e | |
10318 | membar #Sync ! Added by membar checker (60) | |
10319 | ! Mem[00000000100c1400] = 00e200ff 9ce0b68a ffffffd7 0a8d001a | |
10320 | ! Mem[00000000100c1410] = 925b1ad8 00000000 5e9e11ff 6b6c2202 | |
10321 | ! Mem[00000000100c1420] = 00000000 d81a5b92 c780ffbb d9876ee7 | |
10322 | ! Mem[00000000100c1430] = ff00ffff e400008a ffffffe0 ffffffff | |
10323 | ldda [%i3]ASI_BLK_P,%f0 ! Block Load from 00000000100c1400 | |
10324 | ! Starting 10 instruction Store Burst | |
10325 | ! %f18 = 0000365f 0a8d001a, %l3 = 0000000000000000 | |
10326 | ! Mem[0000000030181418] = d9876ee7f8d13fed | |
10327 | add %i6,0x018,%g1 | |
10328 | stda %f18,[%g1+%l3]ASI_PST16_SL ! Mem[0000000030181418] = d9876ee7f8d13fed | |
10329 | ||
10330 | ! Check Point 47 for processor 0 | |
10331 | ||
10332 | set p0_check_pt_data_47,%g4 | |
10333 | rd %ccr,%g5 ! %g5 = 44 | |
10334 | ldx [%g4+0x08],%g2 | |
10335 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
10336 | bne %xcc,p0_reg_check_fail0 | |
10337 | mov 0xee0,%g1 | |
10338 | ldx [%g4+0x10],%g2 | |
10339 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
10340 | bne %xcc,p0_reg_check_fail1 | |
10341 | mov 0xee1,%g1 | |
10342 | ldx [%g4+0x18],%g2 | |
10343 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
10344 | bne %xcc,p0_reg_check_fail2 | |
10345 | mov 0xee2,%g1 | |
10346 | ldx [%g4+0x20],%g2 | |
10347 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
10348 | bne %xcc,p0_reg_check_fail3 | |
10349 | mov 0xee3,%g1 | |
10350 | ldx [%g4+0x28],%g2 | |
10351 | cmp %l4,%g2 ! %l4 = 00000000000000e2 | |
10352 | bne %xcc,p0_reg_check_fail4 | |
10353 | mov 0xee4,%g1 | |
10354 | ldx [%g4+0x30],%g2 | |
10355 | cmp %l5,%g2 ! %l5 = 00000000000006ff | |
10356 | bne %xcc,p0_reg_check_fail5 | |
10357 | mov 0xee5,%g1 | |
10358 | ldx [%g4+0x38],%g2 | |
10359 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
10360 | bne %xcc,p0_reg_check_fail6 | |
10361 | mov 0xee6,%g1 | |
10362 | ldx [%g4+0x40],%g2 | |
10363 | cmp %l7,%g2 ! %l7 = 00000000ffff275e | |
10364 | bne %xcc,p0_reg_check_fail7 | |
10365 | mov 0xee7,%g1 | |
10366 | ldx [%g4+0x48],%g3 | |
10367 | std %f0,[%g4] | |
10368 | ldx [%g4],%g2 | |
10369 | cmp %g3,%g2 ! %f0 = 00e200ff 9ce0b68a | |
10370 | bne %xcc,p0_freg_check_fail | |
10371 | mov 0xf00,%g1 | |
10372 | ldx [%g4+0x50],%g3 | |
10373 | std %f2,[%g4] | |
10374 | ldx [%g4],%g2 | |
10375 | cmp %g3,%g2 ! %f2 = ffffffd7 0a8d001a | |
10376 | bne %xcc,p0_freg_check_fail | |
10377 | mov 0xf02,%g1 | |
10378 | ldx [%g4+0x58],%g3 | |
10379 | std %f4,[%g4] | |
10380 | ldx [%g4],%g2 | |
10381 | cmp %g3,%g2 ! %f4 = 925b1ad8 00000000 | |
10382 | bne %xcc,p0_freg_check_fail | |
10383 | mov 0xf04,%g1 | |
10384 | ldx [%g4+0x60],%g3 | |
10385 | std %f6,[%g4] | |
10386 | ldx [%g4],%g2 | |
10387 | cmp %g3,%g2 ! %f6 = 5e9e11ff 6b6c2202 | |
10388 | bne %xcc,p0_freg_check_fail | |
10389 | mov 0xf06,%g1 | |
10390 | ldx [%g4+0x68],%g3 | |
10391 | std %f8,[%g4] | |
10392 | ldx [%g4],%g2 | |
10393 | cmp %g3,%g2 ! %f8 = 00000000 d81a5b92 | |
10394 | bne %xcc,p0_freg_check_fail | |
10395 | mov 0xf08,%g1 | |
10396 | ldx [%g4+0x70],%g3 | |
10397 | std %f10,[%g4] | |
10398 | ldx [%g4],%g2 | |
10399 | cmp %g3,%g2 ! %f10 = c780ffbb d9876ee7 | |
10400 | bne %xcc,p0_freg_check_fail | |
10401 | mov 0xf10,%g1 | |
10402 | ldx [%g4+0x78],%g3 | |
10403 | std %f12,[%g4] | |
10404 | ldx [%g4],%g2 | |
10405 | cmp %g3,%g2 ! %f12 = ff00ffff e400008a | |
10406 | bne %xcc,p0_freg_check_fail | |
10407 | mov 0xf12,%g1 | |
10408 | ldx [%g4+0x80],%g3 | |
10409 | std %f14,[%g4] | |
10410 | ldx [%g4],%g2 | |
10411 | cmp %g3,%g2 ! %f14 = ffffffe0 ffffffff | |
10412 | bne %xcc,p0_freg_check_fail | |
10413 | mov 0xf14,%g1 | |
10414 | ldx [%g4+0x88],%g3 | |
10415 | std %f30,[%g4] | |
10416 | ldx [%g4],%g2 | |
10417 | cmp %g3,%g2 ! %f30 = ff000000 00000000 | |
10418 | bne %xcc,p0_freg_check_fail | |
10419 | mov 0xf30,%g1 | |
10420 | ||
10421 | ! Check Point 47 completed | |
10422 | ||
10423 | ||
10424 | p0_label_236: | |
10425 | ! %l5 = 00000000000006ff, Mem[0000000010041400] = 000000ff | |
10426 | stwa %l5,[%i1+%g0]0x88 ! Mem[0000000010041400] = 000006ff | |
10427 | ! Mem[0000000010001438] = 00000000, %l7 = 00000000ffff275e | |
10428 | swap [%i0+0x038],%l7 ! %l7 = 0000000000000000 | |
10429 | ! %l1 = 0000000000000000, Mem[0000000010181432] = 0000000e, %asi = 80 | |
10430 | stha %l1,[%i6+0x032]%asi ! Mem[0000000010181430] = 00000000 | |
10431 | ! Mem[00000000300c1408] = 000000ff, %l5 = 00000000000006ff | |
10432 | ldstuba [%i3+%o4]0x89,%l5 ! %l5 = 000000ff000000ff | |
10433 | ! Mem[0000000010041408] = 00000000, %l5 = 00000000000000ff | |
10434 | swapa [%i1+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
10435 | ! Mem[0000000020800040] = ffff9ffa, %l0 = ffffffffffffffff | |
10436 | ldstuba [%o1+0x040]%asi,%l0 ! %l0 = 000000ff000000ff | |
10437 | ! %l0 = 00000000000000ff, Mem[0000000030041400] = 000000ff | |
10438 | stha %l0,[%i1+%g0]0x89 ! Mem[0000000030041400] = 000000ff | |
10439 | membar #Sync ! Added by membar checker (61) | |
10440 | ! %f20 = 8ab6e09c, Mem[00000000100c1408] = ffffffd7 | |
10441 | sta %f20,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 8ab6e09c | |
10442 | ! Mem[0000000030081408] = 00000000, %l5 = 0000000000000000 | |
10443 | ldstuba [%i2+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
10444 | ! Starting 10 instruction Load Burst | |
10445 | ! Mem[0000000010181400] = 000000ff00000000, %l6 = 0000000000000000 | |
10446 | ldxa [%i6+%g0]0x88,%l6 ! %l6 = 000000ff00000000 | |
10447 | ||
10448 | p0_label_237: | |
10449 | ! Mem[00000000300c1408] = ff000000, %l3 = 0000000000000000 | |
10450 | lduwa [%i3+%o4]0x81,%l3 ! %l3 = 00000000ff000000 | |
10451 | ! Mem[0000000020800000] = 5f060db6, %l7 = 0000000000000000 | |
10452 | lduh [%o1+%g0],%l7 ! %l7 = 0000000000005f06 | |
10453 | ! Mem[0000000010141410] = 7a000000ffffffff, %l3 = 00000000ff000000 | |
10454 | ldx [%i5+%o5],%l3 ! %l3 = 7a000000ffffffff | |
10455 | ! Mem[0000000020800040] = ffff9ffa, %l7 = 0000000000005f06 | |
10456 | ldsba [%o1+0x040]%asi,%l7 ! %l7 = ffffffffffffffff | |
10457 | ! Mem[0000000021800180] = e25edb07, %l4 = 00000000000000e2 | |
10458 | ldsha [%o3+0x180]%asi,%l4 ! %l4 = ffffffffffffe25e | |
10459 | ! Mem[0000000030001410] = 000000005f3600ff, %l7 = ffffffffffffffff | |
10460 | ldxa [%i0+%o5]0x89,%l7 ! %l7 = 000000005f3600ff | |
10461 | ! Mem[0000000030141400] = 57000000, %l3 = 7a000000ffffffff | |
10462 | ldsba [%i5+%g0]0x81,%l3 ! %l3 = 0000000000000057 | |
10463 | ! Mem[0000000010001410] = ff000000, %l1 = 0000000000000000 | |
10464 | lduha [%i0+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
10465 | ! Mem[00000000211c0000] = ff00fe0c, %l4 = ffffffffffffe25e | |
10466 | lduh [%o2+%g0],%l4 ! %l4 = 000000000000ff00 | |
10467 | ! Starting 10 instruction Store Burst | |
10468 | ! Mem[0000000020800040] = ffff9ffa, %l4 = 000000000000ff00 | |
10469 | ldstuba [%o1+0x040]%asi,%l4 ! %l4 = 000000ff000000ff | |
10470 | ||
10471 | p0_label_238: | |
10472 | ! %l2 = ffffffffffffffff, Mem[0000000010141438] = 00007400 | |
10473 | stb %l2,[%i5+0x038] ! Mem[0000000010141438] = ff007400 | |
10474 | ! Mem[0000000010081408] = ff000000, %l4 = 00000000000000ff | |
10475 | ldstuba [%i2+%o4]0x80,%l4 ! %l4 = 000000ff000000ff | |
10476 | ! %l4 = 00000000000000ff, Mem[0000000010041400] = 000006ff | |
10477 | stwa %l4,[%i1+%g0]0x88 ! Mem[0000000010041400] = 000000ff | |
10478 | ! Mem[0000000010141436] = 365fffff, %l4 = 00000000000000ff | |
10479 | ldstuba [%i5+0x036]%asi,%l4 ! %l4 = 000000ff000000ff | |
10480 | ! Mem[0000000010181420] = 3bedac390000578b, %l2 = ffffffffffffffff, %l4 = 00000000000000ff | |
10481 | add %i6,0x20,%g1 | |
10482 | casxa [%g1]0x80,%l2,%l4 ! %l4 = 3bedac390000578b | |
10483 | ! Mem[00000000100c142c] = d9876ee7, %l5 = 0000000000000000, %asi = 80 | |
10484 | swapa [%i3+0x02c]%asi,%l5 ! %l5 = 00000000d9876ee7 | |
10485 | ! %f0 = 00e200ff 9ce0b68a, %l1 = 0000000000000000 | |
10486 | ! Mem[0000000010141408] = 0000000000000000 | |
10487 | add %i5,0x008,%g1 | |
10488 | stda %f0,[%g1+%l1]ASI_PST8_PL ! Mem[0000000010141408] = 0000000000000000 | |
10489 | ! %l4 = 0000578b, %l5 = d9876ee7, Mem[0000000010081418] = 000000ff 000000ff | |
10490 | stda %l4,[%i2+0x018]%asi ! Mem[0000000010081418] = 0000578b d9876ee7 | |
10491 | ! Mem[0000000030181400] = ffffffff, %f18 = 0000365f | |
10492 | lda [%i6+%g0]0x81,%f18 ! %f18 = ffffffff | |
10493 | ! Starting 10 instruction Load Burst | |
10494 | ! Mem[0000000010001410] = 000000ff, %f5 = 00000000 | |
10495 | lda [%i0+%o5]0x80,%f5 ! %f5 = 000000ff | |
10496 | ||
10497 | p0_label_239: | |
10498 | ! Mem[0000000030181408] = 000000ffcd1094c4, %l4 = 3bedac390000578b | |
10499 | ldxa [%i6+%o4]0x81,%l4 ! %l4 = 000000ffcd1094c4 | |
10500 | ! Mem[0000000030101408] = ffffffff, %l4 = 000000ffcd1094c4 | |
10501 | lduba [%i4+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
10502 | ! Mem[0000000030181410] = 00000000, %l1 = 0000000000000000 | |
10503 | ldsha [%i6+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
10504 | ! Mem[000000001018143c] = 032cff8e, %l6 = 000000ff00000000 | |
10505 | ldsh [%i6+0x03e],%l6 ! %l6 = ffffffffffffff8e | |
10506 | ! Mem[0000000010001400] = 00000000, %l2 = ffffffffffffffff | |
10507 | ldswa [%i0+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
10508 | ! Mem[00000000100c1410] = 925b1ad800000000, %l7 = 000000005f3600ff | |
10509 | ldx [%i3+%o5],%l7 ! %l7 = 925b1ad800000000 | |
10510 | ! Mem[0000000030181410] = 00000000, %l2 = 0000000000000000 | |
10511 | lduwa [%i6+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
10512 | ! Mem[0000000030001410] = 000000005f3600ff, %f6 = 5e9e11ff 6b6c2202 | |
10513 | ldda [%i0+%o5]0x89,%f6 ! %f6 = 00000000 5f3600ff | |
10514 | ! Mem[00000000201c0000] = 00ff1669, %l4 = 00000000000000ff | |
10515 | ldub [%o0+%g0],%l4 ! %l4 = 0000000000000000 | |
10516 | ! Starting 10 instruction Store Burst | |
10517 | ! %l6 = ffffffffffffff8e, Mem[0000000030041410] = d3d28bff | |
10518 | stba %l6,[%i1+%o5]0x89 ! Mem[0000000030041410] = d3d28b8e | |
10519 | ||
10520 | p0_label_240: | |
10521 | ! Mem[0000000030001400] = ff000000, %l3 = 0000000000000057 | |
10522 | swapa [%i0+%g0]0x81,%l3 ! %l3 = 00000000ff000000 | |
10523 | ! Mem[0000000030081408] = 000000ff, %l7 = 925b1ad800000000 | |
10524 | swapa [%i2+%o4]0x89,%l7 ! %l7 = 00000000000000ff | |
10525 | ! Mem[0000000010181411] = 000000b6, %l4 = 0000000000000000 | |
10526 | ldstuba [%i6+0x011]%asi,%l4 ! %l4 = 00000000000000ff | |
10527 | ! %f27 = d9876ee7, Mem[0000000030001408] = 0000365f | |
10528 | sta %f27,[%i0+%o4]0x81 ! Mem[0000000030001408] = d9876ee7 | |
10529 | ! %f4 = 925b1ad8 000000ff, Mem[0000000010081400] = 02f1ffff 00000000 | |
10530 | stda %f4 ,[%i2+%g0]0x88 ! Mem[0000000010081400] = 925b1ad8 000000ff | |
10531 | ! %f14 = ffffffe0 ffffffff, Mem[0000000010101410] = 0000005f 00000000 | |
10532 | stda %f14,[%i4+%o5]0x88 ! Mem[0000000010101410] = ffffffe0 ffffffff | |
10533 | ! Mem[0000000010101404] = caffffff, %l6 = ffffffffffffff8e | |
10534 | ldstub [%i4+0x004],%l6 ! %l6 = 000000ca000000ff | |
10535 | ! %l4 = 0000000000000000, Mem[00000000100c1400] = 00e200ff | |
10536 | sth %l4,[%i3+%g0] ! Mem[00000000100c1400] = 000000ff | |
10537 | ! Mem[000000001010143c] = f1b600ff, %l4 = 0000000000000000, %asi = 80 | |
10538 | swapa [%i4+0x03c]%asi,%l4 ! %l4 = 00000000f1b600ff | |
10539 | ! Starting 10 instruction Load Burst | |
10540 | ! Mem[0000000030101410] = 3bedac39, %f27 = d9876ee7 | |
10541 | lda [%i4+%o5]0x89,%f27 ! %f27 = 3bedac39 | |
10542 | ||
10543 | ! Check Point 48 for processor 0 | |
10544 | ||
10545 | set p0_check_pt_data_48,%g4 | |
10546 | rd %ccr,%g5 ! %g5 = 44 | |
10547 | ldx [%g4+0x08],%g2 | |
10548 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
10549 | bne %xcc,p0_reg_check_fail0 | |
10550 | mov 0xee0,%g1 | |
10551 | ldx [%g4+0x10],%g2 | |
10552 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
10553 | bne %xcc,p0_reg_check_fail1 | |
10554 | mov 0xee1,%g1 | |
10555 | ldx [%g4+0x18],%g2 | |
10556 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
10557 | bne %xcc,p0_reg_check_fail2 | |
10558 | mov 0xee2,%g1 | |
10559 | ldx [%g4+0x20],%g2 | |
10560 | cmp %l3,%g2 ! %l3 = 00000000ff000000 | |
10561 | bne %xcc,p0_reg_check_fail3 | |
10562 | mov 0xee3,%g1 | |
10563 | ldx [%g4+0x28],%g2 | |
10564 | cmp %l4,%g2 ! %l4 = 00000000f1b600ff | |
10565 | bne %xcc,p0_reg_check_fail4 | |
10566 | mov 0xee4,%g1 | |
10567 | ldx [%g4+0x30],%g2 | |
10568 | cmp %l5,%g2 ! %l5 = 00000000d9876ee7 | |
10569 | bne %xcc,p0_reg_check_fail5 | |
10570 | mov 0xee5,%g1 | |
10571 | ldx [%g4+0x38],%g2 | |
10572 | cmp %l6,%g2 ! %l6 = 00000000000000ca | |
10573 | bne %xcc,p0_reg_check_fail6 | |
10574 | mov 0xee6,%g1 | |
10575 | ldx [%g4+0x40],%g2 | |
10576 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
10577 | bne %xcc,p0_reg_check_fail7 | |
10578 | mov 0xee7,%g1 | |
10579 | ldx [%g4+0x48],%g3 | |
10580 | std %f4,[%g4] | |
10581 | ldx [%g4],%g2 | |
10582 | cmp %g3,%g2 ! %f4 = 925b1ad8 000000ff | |
10583 | bne %xcc,p0_freg_check_fail | |
10584 | mov 0xf04,%g1 | |
10585 | ldx [%g4+0x50],%g3 | |
10586 | std %f6,[%g4] | |
10587 | ldx [%g4],%g2 | |
10588 | cmp %g3,%g2 ! %f6 = 00000000 5f3600ff | |
10589 | bne %xcc,p0_freg_check_fail | |
10590 | mov 0xf06,%g1 | |
10591 | ldx [%g4+0x58],%g3 | |
10592 | std %f18,[%g4] | |
10593 | ldx [%g4],%g2 | |
10594 | cmp %g3,%g2 ! %f18 = ffffffff 0a8d001a | |
10595 | bne %xcc,p0_freg_check_fail | |
10596 | mov 0xf18,%g1 | |
10597 | ldx [%g4+0x60],%g3 | |
10598 | std %f26,[%g4] | |
10599 | ldx [%g4],%g2 | |
10600 | cmp %g3,%g2 ! %f26 = 00000000 3bedac39 | |
10601 | bne %xcc,p0_freg_check_fail | |
10602 | mov 0xf26,%g1 | |
10603 | ||
10604 | ! Check Point 48 completed | |
10605 | ||
10606 | ||
10607 | p0_label_241: | |
10608 | ! Mem[0000000030101410] = 39aced3b, %f4 = 925b1ad8 | |
10609 | lda [%i4+%o5]0x81,%f4 ! %f4 = 39aced3b | |
10610 | ! Mem[0000000030081410] = e2ffffff, %l5 = 00000000d9876ee7 | |
10611 | lduha [%i2+%o5]0x81,%l5 ! %l5 = 000000000000e2ff | |
10612 | ! Mem[0000000010001410] = ff000000, %l1 = 0000000000000000 | |
10613 | lduwa [%i0+%o5]0x88,%l1 ! %l1 = 00000000ff000000 | |
10614 | ! Mem[0000000010001408] = ffffffff0000ffff, %f14 = ffffffe0 ffffffff | |
10615 | ldda [%i0+%o4]0x88,%f14 ! %f14 = ffffffff 0000ffff | |
10616 | ! Mem[000000001000141c] = b1c0060a, %l3 = 00000000ff000000 | |
10617 | lduba [%i0+0x01c]%asi,%l3 ! %l3 = 00000000000000b1 | |
10618 | ! Mem[00000000300c1408] = 000000ff, %f25 = d81a5b92 | |
10619 | lda [%i3+%o4]0x89,%f25 ! %f25 = 000000ff | |
10620 | ! Mem[0000000030041400] = ff000000, %l7 = 00000000000000ff | |
10621 | lduwa [%i1+%g0]0x81,%l7 ! %l7 = 00000000ff000000 | |
10622 | ! Mem[0000000010001408] = ffff0000, %l7 = 00000000ff000000 | |
10623 | ldsw [%i0+%o4],%l7 ! %l7 = ffffffffffff0000 | |
10624 | ! Mem[0000000030101400] = 0000ade0, %l7 = ffffffffffff0000 | |
10625 | lduwa [%i4+%g0]0x81,%l7 ! %l7 = 000000000000ade0 | |
10626 | ! Starting 10 instruction Store Burst | |
10627 | ! %l1 = 00000000ff000000, Mem[0000000010001408] = ffff0000 | |
10628 | stwa %l1,[%i0+%o4]0x80 ! Mem[0000000010001408] = ff000000 | |
10629 | ||
10630 | p0_label_242: | |
10631 | ! %f0 = 00e200ff 9ce0b68a, %l5 = 000000000000e2ff | |
10632 | ! Mem[0000000010101428] = c780ffbbd9876ee7 | |
10633 | add %i4,0x028,%g1 | |
10634 | stda %f0,[%g1+%l5]ASI_PST8_P ! Mem[0000000010101428] = 00e200ff9ce0b68a | |
10635 | ! Mem[0000000030181408] = ff000000, %l1 = 00000000ff000000 | |
10636 | swapa [%i6+%o4]0x89,%l1 ! %l1 = 00000000ff000000 | |
10637 | ! %f4 = 39aced3b 000000ff, Mem[0000000010101408] = ff000000 ffffffff | |
10638 | stda %f4 ,[%i4+%o4]0x88 ! Mem[0000000010101408] = 39aced3b 000000ff | |
10639 | ! %l4 = 00000000f1b600ff, Mem[0000000030101400] = e0ad0000 | |
10640 | stha %l4,[%i4+%g0]0x89 ! Mem[0000000030101400] = e0ad00ff | |
10641 | ! %l7 = 000000000000ade0, Mem[0000000030101400] = ff00ade0 | |
10642 | stha %l7,[%i4+%g0]0x81 ! Mem[0000000030101400] = ade0ade0 | |
10643 | ! %l1 = 00000000ff000000, Mem[0000000010101408] = 000000ff | |
10644 | stwa %l1,[%i4+%o4]0x88 ! Mem[0000000010101408] = ff000000 | |
10645 | ! %f16 = 0a8d001a 1a008d0a, Mem[0000000030081408] = 00000000 5e27ffff | |
10646 | stda %f16,[%i2+%o4]0x89 ! Mem[0000000030081408] = 0a8d001a 1a008d0a | |
10647 | ! Mem[0000000010181400] = 00000000, %l6 = 00000000000000ca | |
10648 | swapa [%i6+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
10649 | ! Mem[0000000010001400] = 00000000, %l0 = 00000000000000ff | |
10650 | ldstuba [%i0+%g0]0x88,%l0 ! %l0 = 00000000000000ff | |
10651 | ! Starting 10 instruction Load Burst | |
10652 | membar #Sync ! Added by membar checker (62) | |
10653 | ! Mem[0000000030101400] = ade0ade0 00000000 ffffffff 000000ff | |
10654 | ! Mem[0000000030101410] = 39aced3b 8ab6e09c 5e9e1157 6b6c2202 | |
10655 | ! Mem[0000000030101420] = 3bedac39 d81a5b92 c78091bb 759a4764 | |
10656 | ! Mem[0000000030101430] = fac65f36 9ce0b68a 46ee6de4 c49410cd | |
10657 | ldda [%i4]ASI_BLK_SL,%f0 ! Block Load from 0000000030101400 | |
10658 | ||
10659 | p0_label_243: | |
10660 | ! Mem[0000000030181408] = 000000ff, %l2 = 0000000000000000 | |
10661 | ldsha [%i6+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
10662 | ! Mem[0000000010081410] = ffffffff d7ffffff, %l2 = 00000000, %l3 = 000000b1 | |
10663 | ldda [%i2+%o5]0x80,%l2 ! %l2 = 00000000ffffffff 00000000d7ffffff | |
10664 | ! Mem[0000000010141410] = 7a000000, %l6 = 0000000000000000 | |
10665 | lduh [%i5+%o5],%l6 ! %l6 = 0000000000007a00 | |
10666 | ! Mem[0000000010141418] = 00000091, %l7 = 000000000000ade0 | |
10667 | ldub [%i5+0x019],%l7 ! %l7 = 0000000000000000 | |
10668 | ! Mem[0000000010001410] = 000000ff, %f18 = ffffffff | |
10669 | lda [%i0+%o5]0x80,%f18 ! %f18 = 000000ff | |
10670 | ! Mem[0000000010141400] = 000000ff 9ce0b68a 00000000 00000000 | |
10671 | ! Mem[0000000010141410] = 7a000000 ffffffff 00000091 ffffffd9 | |
10672 | ! Mem[0000000010141420] = ffffffb4 0000005e 64479a75 bb9180c7 | |
10673 | ! Mem[0000000010141430] = ffb6e09c 365fffff ff007400 ffffffff | |
10674 | ldda [%i5]ASI_BLK_PL,%f16 ! Block Load from 0000000010141400 | |
10675 | ! Mem[0000000010141408] = 00000000, %l7 = 0000000000000000 | |
10676 | lduwa [%i5+%o4]0x88,%l7 ! %l7 = 0000000000000000 | |
10677 | ! Mem[0000000010041408] = 000000ff, %l2 = 00000000ffffffff | |
10678 | ldsha [%i1+%o4]0x88,%l2 ! %l2 = 00000000000000ff | |
10679 | ! Mem[000000001018143c] = 032cff8e, %f5 = 3bedac39 | |
10680 | ld [%i6+0x03c],%f5 ! %f5 = 032cff8e | |
10681 | ! Starting 10 instruction Store Burst | |
10682 | ! Mem[0000000030041408] = 00ffffff, %l0 = 0000000000000000 | |
10683 | ldstuba [%i1+%o4]0x89,%l0 ! %l0 = 000000ff000000ff | |
10684 | ||
10685 | p0_label_244: | |
10686 | ! Mem[0000000010101400] = 00000094, %l6 = 0000000000007a00 | |
10687 | ldstuba [%i4+%g0]0x80,%l6 ! %l6 = 00000000000000ff | |
10688 | ! Mem[00000000300c1408] = 000000ff, %l0 = 00000000000000ff | |
10689 | swapa [%i3+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
10690 | ! Mem[0000000030001408] = d9876ee7, %l6 = 0000000000000000 | |
10691 | ldstuba [%i0+%o4]0x81,%l6 ! %l6 = 000000d9000000ff | |
10692 | ! %l4 = 00000000f1b600ff, Mem[0000000020800040] = ffff9ffa | |
10693 | stb %l4,[%o1+0x040] ! Mem[0000000020800040] = ffff9ffa | |
10694 | ! %l2 = 00000000000000ff, Mem[0000000030041408] = ffffff00 | |
10695 | stha %l2,[%i1+%o4]0x81 ! Mem[0000000030041408] = 00ffff00 | |
10696 | ! %l6 = 00000000000000d9, Mem[0000000030081400] = ffffffff | |
10697 | stwa %l6,[%i2+%g0]0x81 ! Mem[0000000030081400] = 000000d9 | |
10698 | ! %l3 = 00000000d7ffffff, Mem[0000000010001418] = 00000000b1c0060a | |
10699 | stx %l3,[%i0+0x018] ! Mem[0000000010001418] = 00000000d7ffffff | |
10700 | ! Mem[0000000030101408] = ffffffff, %l4 = 00000000f1b600ff | |
10701 | ldstuba [%i4+%o4]0x81,%l4 ! %l4 = 000000ff000000ff | |
10702 | ! %l0 = 000000ff, %l1 = ff000000, Mem[0000000030001410] = 5f3600ff 00000000 | |
10703 | stda %l0,[%i0+%o5]0x89 ! Mem[0000000030001410] = 000000ff ff000000 | |
10704 | ! Starting 10 instruction Load Burst | |
10705 | ! Mem[0000000030001400] = 00000057, %l4 = 00000000000000ff | |
10706 | ldsba [%i0+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
10707 | ||
10708 | p0_label_245: | |
10709 | ! Mem[0000000030101408] = ffffffff, %f12 = 8ab6e09c | |
10710 | lda [%i4+%o4]0x81,%f12 ! %f12 = ffffffff | |
10711 | ! Mem[0000000010081408] = 000000ff, %l0 = 00000000000000ff | |
10712 | ldswa [%i2+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
10713 | ! Mem[0000000010001420] = 000000ffff000000, %l1 = 00000000ff000000 | |
10714 | ldx [%i0+0x020],%l1 ! %l1 = 000000ffff000000 | |
10715 | ! Mem[0000000010001408] = 000000ff, %l1 = 000000ffff000000 | |
10716 | lduba [%i0+%o4]0x88,%l1 ! %l1 = 00000000000000ff | |
10717 | ! Mem[0000000030001400] = 57000000, %l1 = 00000000000000ff | |
10718 | lduha [%i0+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
10719 | ! Mem[0000000010181410] = b600ff00, %l0 = 00000000000000ff | |
10720 | ldswa [%i6+%o5]0x88,%l0 ! %l0 = ffffffffb600ff00 | |
10721 | ! Mem[0000000010181410] = 00ff00b6, %l3 = 00000000d7ffffff | |
10722 | lduwa [%i6+%o5]0x80,%l3 ! %l3 = 0000000000ff00b6 | |
10723 | ! Mem[0000000030041400] = ff000000, %l0 = ffffffffb600ff00 | |
10724 | ldswa [%i1+%g0]0x81,%l0 ! %l0 = ffffffffff000000 | |
10725 | ! Mem[0000000010001408] = ffffffff000000ff, %f14 = cd1094c4 e46dee46 | |
10726 | ldda [%i0+%o4]0x88,%f14 ! %f14 = ffffffff 000000ff | |
10727 | ! Starting 10 instruction Store Burst | |
10728 | ! Mem[0000000010181408] = 00000000, %l3 = 0000000000ff00b6 | |
10729 | swapa [%i6+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
10730 | ||
10731 | ! Check Point 49 for processor 0 | |
10732 | ||
10733 | set p0_check_pt_data_49,%g4 | |
10734 | rd %ccr,%g5 ! %g5 = 44 | |
10735 | ldx [%g4+0x08],%g2 | |
10736 | cmp %l0,%g2 ! %l0 = ffffffffff000000 | |
10737 | bne %xcc,p0_reg_check_fail0 | |
10738 | mov 0xee0,%g1 | |
10739 | ldx [%g4+0x10],%g2 | |
10740 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
10741 | bne %xcc,p0_reg_check_fail1 | |
10742 | mov 0xee1,%g1 | |
10743 | ldx [%g4+0x18],%g2 | |
10744 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
10745 | bne %xcc,p0_reg_check_fail2 | |
10746 | mov 0xee2,%g1 | |
10747 | ldx [%g4+0x20],%g2 | |
10748 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
10749 | bne %xcc,p0_reg_check_fail3 | |
10750 | mov 0xee3,%g1 | |
10751 | ldx [%g4+0x28],%g2 | |
10752 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
10753 | bne %xcc,p0_reg_check_fail4 | |
10754 | mov 0xee4,%g1 | |
10755 | ldx [%g4+0x30],%g2 | |
10756 | cmp %l5,%g2 ! %l5 = 000000000000e2ff | |
10757 | bne %xcc,p0_reg_check_fail5 | |
10758 | mov 0xee5,%g1 | |
10759 | ldx [%g4+0x38],%g2 | |
10760 | cmp %l6,%g2 ! %l6 = 00000000000000d9 | |
10761 | bne %xcc,p0_reg_check_fail6 | |
10762 | mov 0xee6,%g1 | |
10763 | ldx [%g4+0x40],%g2 | |
10764 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
10765 | bne %xcc,p0_reg_check_fail7 | |
10766 | mov 0xee7,%g1 | |
10767 | ldx [%g4+0x48],%g3 | |
10768 | std %f0,[%g4] | |
10769 | ldx [%g4],%g2 | |
10770 | cmp %g3,%g2 ! %f0 = 00000000 e0ade0ad | |
10771 | bne %xcc,p0_freg_check_fail | |
10772 | mov 0xf00,%g1 | |
10773 | ldx [%g4+0x50],%g3 | |
10774 | std %f2,[%g4] | |
10775 | ldx [%g4],%g2 | |
10776 | cmp %g3,%g2 ! %f2 = ff000000 ffffffff | |
10777 | bne %xcc,p0_freg_check_fail | |
10778 | mov 0xf02,%g1 | |
10779 | ldx [%g4+0x58],%g3 | |
10780 | std %f4,[%g4] | |
10781 | ldx [%g4],%g2 | |
10782 | cmp %g3,%g2 ! %f4 = 9ce0b68a 032cff8e | |
10783 | bne %xcc,p0_freg_check_fail | |
10784 | mov 0xf04,%g1 | |
10785 | ldx [%g4+0x60],%g3 | |
10786 | std %f6,[%g4] | |
10787 | ldx [%g4],%g2 | |
10788 | cmp %g3,%g2 ! %f6 = 02226c6b 57119e5e | |
10789 | bne %xcc,p0_freg_check_fail | |
10790 | mov 0xf06,%g1 | |
10791 | ldx [%g4+0x68],%g3 | |
10792 | std %f8,[%g4] | |
10793 | ldx [%g4],%g2 | |
10794 | cmp %g3,%g2 ! %f8 = 925b1ad8 39aced3b | |
10795 | bne %xcc,p0_freg_check_fail | |
10796 | mov 0xf08,%g1 | |
10797 | ldx [%g4+0x70],%g3 | |
10798 | std %f10,[%g4] | |
10799 | ldx [%g4],%g2 | |
10800 | cmp %g3,%g2 ! %f10 = 64479a75 bb9180c7 | |
10801 | bne %xcc,p0_freg_check_fail | |
10802 | mov 0xf10,%g1 | |
10803 | ldx [%g4+0x78],%g3 | |
10804 | std %f12,[%g4] | |
10805 | ldx [%g4],%g2 | |
10806 | cmp %g3,%g2 ! %f12 = ffffffff 365fc6fa | |
10807 | bne %xcc,p0_freg_check_fail | |
10808 | mov 0xf12,%g1 | |
10809 | ldx [%g4+0x80],%g3 | |
10810 | std %f14,[%g4] | |
10811 | ldx [%g4],%g2 | |
10812 | cmp %g3,%g2 ! %f14 = ffffffff 000000ff | |
10813 | bne %xcc,p0_freg_check_fail | |
10814 | mov 0xf14,%g1 | |
10815 | ldx [%g4+0x88],%g3 | |
10816 | std %f16,[%g4] | |
10817 | ldx [%g4],%g2 | |
10818 | cmp %g3,%g2 ! %f16 = 8ab6e09c ff000000 | |
10819 | bne %xcc,p0_freg_check_fail | |
10820 | mov 0xf16,%g1 | |
10821 | ldx [%g4+0x90],%g3 | |
10822 | std %f18,[%g4] | |
10823 | ldx [%g4],%g2 | |
10824 | cmp %g3,%g2 ! %f18 = 00000000 00000000 | |
10825 | bne %xcc,p0_freg_check_fail | |
10826 | mov 0xf18,%g1 | |
10827 | ldx [%g4+0x98],%g3 | |
10828 | std %f20,[%g4] | |
10829 | ldx [%g4],%g2 | |
10830 | cmp %g3,%g2 ! %f20 = ffffffff 0000007a | |
10831 | bne %xcc,p0_freg_check_fail | |
10832 | mov 0xf20,%g1 | |
10833 | ldx [%g4+0xa0],%g3 | |
10834 | std %f22,[%g4] | |
10835 | ldx [%g4],%g2 | |
10836 | cmp %g3,%g2 ! %f22 = d9ffffff 91000000 | |
10837 | bne %xcc,p0_freg_check_fail | |
10838 | mov 0xf22,%g1 | |
10839 | ldx [%g4+0xa8],%g3 | |
10840 | std %f24,[%g4] | |
10841 | ldx [%g4],%g2 | |
10842 | cmp %g3,%g2 ! %f24 = 5e000000 b4ffffff | |
10843 | bne %xcc,p0_freg_check_fail | |
10844 | mov 0xf24,%g1 | |
10845 | ldx [%g4+0xb0],%g3 | |
10846 | std %f26,[%g4] | |
10847 | ldx [%g4],%g2 | |
10848 | cmp %g3,%g2 ! %f26 = c78091bb 759a4764 | |
10849 | bne %xcc,p0_freg_check_fail | |
10850 | mov 0xf26,%g1 | |
10851 | ldx [%g4+0xb8],%g3 | |
10852 | std %f28,[%g4] | |
10853 | ldx [%g4],%g2 | |
10854 | cmp %g3,%g2 ! %f28 = ffff5f36 9ce0b6ff | |
10855 | bne %xcc,p0_freg_check_fail | |
10856 | mov 0xf28,%g1 | |
10857 | ldx [%g4+0xc0],%g3 | |
10858 | std %f30,[%g4] | |
10859 | ldx [%g4],%g2 | |
10860 | cmp %g3,%g2 ! %f30 = ffffffff 007400ff | |
10861 | bne %xcc,p0_freg_check_fail | |
10862 | mov 0xf30,%g1 | |
10863 | ||
10864 | ! Check Point 49 completed | |
10865 | ||
10866 | ||
10867 | p0_label_246: | |
10868 | ! %f14 = ffffffff 000000ff, Mem[0000000010081408] = 000000ff 925b1ad8 | |
10869 | stda %f14,[%i2+%o4]0x88 ! Mem[0000000010081408] = ffffffff 000000ff | |
10870 | ! %f2 = ff000000 ffffffff, Mem[0000000030041400] = 000000ff 00000000 | |
10871 | stda %f2 ,[%i1+%g0]0x89 ! Mem[0000000030041400] = ff000000 ffffffff | |
10872 | ! Mem[0000000010181400] = 000000ca, %l6 = 00000000000000d9 | |
10873 | ldstuba [%i6+%g0]0x80,%l6 ! %l6 = 00000000000000ff | |
10874 | ! Mem[00000000100c1400] = ff000000, %l4 = 0000000000000000 | |
10875 | ldstuba [%i3+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
10876 | ! Mem[0000000030101408] = ffffffff, %l0 = ffffffffff000000 | |
10877 | swapa [%i4+%o4]0x89,%l0 ! %l0 = 00000000ffffffff | |
10878 | ! %l4 = 00000000, %l5 = 0000e2ff, Mem[0000000030081400] = d9000000 00000000 | |
10879 | stda %l4,[%i2+%g0]0x89 ! Mem[0000000030081400] = 00000000 0000e2ff | |
10880 | ! %l0 = 00000000ffffffff, Mem[0000000030181408] = 000000ff | |
10881 | stwa %l0,[%i6+%o4]0x81 ! Mem[0000000030181408] = ffffffff | |
10882 | ! %l6 = 0000000000000000, Mem[0000000020800040] = ffff9ffa | |
10883 | sth %l6,[%o1+0x040] ! Mem[0000000020800040] = 00009ffa | |
10884 | ! %l5 = 000000000000e2ff, Mem[00000000100c1408] = 8ab6e09c | |
10885 | stba %l5,[%i3+%o4]0x80 ! Mem[00000000100c1408] = ffb6e09c | |
10886 | ! Starting 10 instruction Load Burst | |
10887 | ! Mem[0000000010181410] = ff000000 b600ff00, %l4 = 00000000, %l5 = 0000e2ff | |
10888 | ldda [%i6+%o5]0x88,%l4 ! %l4 = 00000000b600ff00 00000000ff000000 | |
10889 | ||
10890 | p0_label_247: | |
10891 | ! Mem[0000000030101400] = ade0ade000000000, %l7 = 0000000000000000 | |
10892 | ldxa [%i4+%g0]0x81,%l7 ! %l7 = ade0ade000000000 | |
10893 | ! Mem[00000000100c1430] = ff00ffff, %l1 = 0000000000000000 | |
10894 | ldsba [%i3+0x031]%asi,%l1 ! %l1 = 0000000000000000 | |
10895 | ! Mem[0000000010101410] = ffffffff e0ffffff, %l6 = 00000000, %l7 = 00000000 | |
10896 | ldda [%i4+%o5]0x80,%l6 ! %l6 = 00000000ffffffff 00000000e0ffffff | |
10897 | ! Mem[00000000201c0000] = 00ff1669, %l5 = 00000000ff000000 | |
10898 | lduh [%o0+%g0],%l5 ! %l5 = 00000000000000ff | |
10899 | ! Mem[0000000030181408] = ffffffff, %l2 = 00000000000000ff | |
10900 | lduwa [%i6+%o4]0x81,%l2 ! %l2 = 00000000ffffffff | |
10901 | ! Mem[0000000030141410] = 00000000 d7ffffff, %l6 = ffffffff, %l7 = e0ffffff | |
10902 | ldda [%i5+%o5]0x81,%l6 ! %l6 = 0000000000000000 00000000d7ffffff | |
10903 | ! Mem[00000000100c142c] = 00000000, %l2 = 00000000ffffffff | |
10904 | ldsha [%i3+0x02e]%asi,%l2 ! %l2 = 0000000000000000 | |
10905 | ! Mem[0000000030081410] = e2ffffffffffffff, %l0 = 00000000ffffffff | |
10906 | ldxa [%i2+%o5]0x81,%l0 ! %l0 = e2ffffffffffffff | |
10907 | ! Mem[0000000010101408] = ff000000, %l2 = 0000000000000000 | |
10908 | ldsba [%i4+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
10909 | ! Starting 10 instruction Store Burst | |
10910 | ! %f16 = 8ab6e09c ff000000, Mem[0000000030181408] = ffffffff cd1094c4 | |
10911 | stda %f16,[%i6+%o4]0x81 ! Mem[0000000030181408] = 8ab6e09c ff000000 | |
10912 | ||
10913 | p0_label_248: | |
10914 | ! %l2 = 0000000000000000, Mem[0000000010181400] = ff0000ca | |
10915 | stwa %l2,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000 | |
10916 | ! Mem[0000000030001408] = e76e87ff, %l4 = 00000000b600ff00 | |
10917 | swapa [%i0+%o4]0x89,%l4 ! %l4 = 00000000e76e87ff | |
10918 | ! Mem[00000000201c0000] = 00ff1669, %l1 = 0000000000000000 | |
10919 | ldstub [%o0+%g0],%l1 ! %l1 = 00000000000000ff | |
10920 | ! %f30 = ffffffff, Mem[0000000010181410] = b600ff00 | |
10921 | sta %f30,[%i6+%o5]0x88 ! Mem[0000000010181410] = ffffffff | |
10922 | ! Mem[000000001008140c] = ffffffff, %l1 = 0000000000000000, %asi = 80 | |
10923 | swapa [%i2+0x00c]%asi,%l1 ! %l1 = 00000000ffffffff | |
10924 | ! %l3 = 0000000000000000, Mem[0000000030001410] = 000000ff | |
10925 | stwa %l3,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00000000 | |
10926 | ! Mem[0000000010141410] = 0000007a, %l7 = 00000000d7ffffff | |
10927 | swapa [%i5+%o5]0x88,%l7 ! %l7 = 000000000000007a | |
10928 | ! %l4 = e76e87ff, %l5 = 000000ff, Mem[0000000030141408] = ffffffff ffffffff | |
10929 | stda %l4,[%i5+%o4]0x81 ! Mem[0000000030141408] = e76e87ff 000000ff | |
10930 | ! %l6 = 00000000, %l7 = 0000007a, Mem[0000000010101410] = ffffffff e0ffffff | |
10931 | stda %l6,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00000000 0000007a | |
10932 | ! Starting 10 instruction Load Burst | |
10933 | ! Mem[0000000010101408] = 000000ff3bedac39, %l7 = 000000000000007a | |
10934 | ldxa [%i4+%o4]0x80,%l7 ! %l7 = 000000ff3bedac39 | |
10935 | ||
10936 | p0_label_249: | |
10937 | ! Mem[00000000211c0000] = ff00fe0c, %l7 = 000000ff3bedac39 | |
10938 | ldsba [%o2+0x000]%asi,%l7 ! %l7 = ffffffffffffffff | |
10939 | ! Mem[0000000010001400] = ff000000d9876ee7, %f26 = c78091bb 759a4764 | |
10940 | ldda [%i0+%g0]0x80,%f26 ! %f26 = ff000000 d9876ee7 | |
10941 | ! Mem[00000000300c1400] = b1c006ff, %l7 = ffffffffffffffff | |
10942 | ldsha [%i3+%g0]0x89,%l7 ! %l7 = 00000000000006ff | |
10943 | ! Mem[000000001004140c] = 5372d306, %l2 = 0000000000000000 | |
10944 | ldsb [%i1+0x00e],%l2 ! %l2 = ffffffffffffffd3 | |
10945 | ! Mem[0000000030081400] = 00000000, %l1 = 00000000ffffffff | |
10946 | ldsha [%i2+%g0]0x81,%l1 ! %l1 = 0000000000000000 | |
10947 | ! Mem[00000000300c1408] = ff000000, %l7 = 00000000000006ff | |
10948 | lduwa [%i3+%o4]0x81,%l7 ! %l7 = 00000000ff000000 | |
10949 | ! Mem[0000000010101424] = d81a5b92, %f17 = ff000000 | |
10950 | ld [%i4+0x024],%f17 ! %f17 = d81a5b92 | |
10951 | ! Mem[0000000021800100] = ffff39e7, %l3 = 0000000000000000 | |
10952 | lduh [%o3+0x100],%l3 ! %l3 = 000000000000ffff | |
10953 | ! Mem[00000000100c1400] = ff0000ff, %l5 = 00000000000000ff | |
10954 | ldsha [%i3+%g0]0x80,%l5 ! %l5 = ffffffffffffff00 | |
10955 | ! Starting 10 instruction Store Burst | |
10956 | ! %f0 = 00000000 e0ade0ad ff000000 ffffffff | |
10957 | ! %f4 = 9ce0b68a 032cff8e 02226c6b 57119e5e | |
10958 | ! %f8 = 925b1ad8 39aced3b 64479a75 bb9180c7 | |
10959 | ! %f12 = ffffffff 365fc6fa ffffffff 000000ff | |
10960 | stda %f0,[%i5]ASI_BLK_AIUS ! Block Store to 0000000030141400 | |
10961 | ||
10962 | p0_label_250: | |
10963 | ! %l1 = 0000000000000000, Mem[0000000010041408] = ff0000005372d306 | |
10964 | stxa %l1,[%i1+%o4]0x80 ! Mem[0000000010041408] = 0000000000000000 | |
10965 | ! %l0 = e2ffffffffffffff, Mem[0000000010181400] = 00000000 | |
10966 | stba %l0,[%i6+%g0]0x80 ! Mem[0000000010181400] = ff000000 | |
10967 | ! %l6 = 0000000000000000, Mem[0000000010041410] = 000000ff | |
10968 | stwa %l6,[%i1+%o5]0x88 ! Mem[0000000010041410] = 00000000 | |
10969 | membar #Sync ! Added by membar checker (63) | |
10970 | ! Mem[0000000010141400] = ff000000, %l5 = ffffffffffffff00 | |
10971 | ldstuba [%i5+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
10972 | ! %l6 = 00000000, %l7 = ff000000, Mem[0000000010181408] = b600ff00 00000000 | |
10973 | std %l6,[%i6+%o4] ! Mem[0000000010181408] = 00000000 ff000000 | |
10974 | ! Mem[0000000030041410] = d3d28b8e, %l2 = ffffffffffffffd3 | |
10975 | swapa [%i1+%o5]0x89,%l2 ! %l2 = 00000000d3d28b8e | |
10976 | ! Mem[00000000300c1408] = 000000ff, %l7 = 00000000ff000000 | |
10977 | ldstuba [%i3+%o4]0x89,%l7 ! %l7 = 000000ff000000ff | |
10978 | ! %l4 = 00000000e76e87ff, Mem[00000000300c1400] = e76e87d9b1c006ff | |
10979 | stxa %l4,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 00000000e76e87ff | |
10980 | ! %l5 = 0000000000000000, Mem[000000001008142b] = 00000000 | |
10981 | stb %l5,[%i2+0x02b] ! Mem[0000000010081428] = 00000000 | |
10982 | ! Starting 10 instruction Load Burst | |
10983 | ! Mem[00000000100c1400] = ff0000ff, %l1 = 0000000000000000 | |
10984 | ldsba [%i3+%g0]0x80,%l1 ! %l1 = ffffffffffffffff | |
10985 | ||
10986 | ! Check Point 50 for processor 0 | |
10987 | ||
10988 | set p0_check_pt_data_50,%g4 | |
10989 | rd %ccr,%g5 ! %g5 = 44 | |
10990 | ldx [%g4+0x08],%g2 | |
10991 | cmp %l0,%g2 ! %l0 = e2ffffffffffffff | |
10992 | bne %xcc,p0_reg_check_fail0 | |
10993 | mov 0xee0,%g1 | |
10994 | ldx [%g4+0x10],%g2 | |
10995 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
10996 | bne %xcc,p0_reg_check_fail1 | |
10997 | mov 0xee1,%g1 | |
10998 | ldx [%g4+0x18],%g2 | |
10999 | cmp %l2,%g2 ! %l2 = 00000000d3d28b8e | |
11000 | bne %xcc,p0_reg_check_fail2 | |
11001 | mov 0xee2,%g1 | |
11002 | ldx [%g4+0x20],%g2 | |
11003 | cmp %l3,%g2 ! %l3 = 000000000000ffff | |
11004 | bne %xcc,p0_reg_check_fail3 | |
11005 | mov 0xee3,%g1 | |
11006 | ldx [%g4+0x28],%g2 | |
11007 | cmp %l4,%g2 ! %l4 = 00000000e76e87ff | |
11008 | bne %xcc,p0_reg_check_fail4 | |
11009 | mov 0xee4,%g1 | |
11010 | ldx [%g4+0x30],%g2 | |
11011 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
11012 | bne %xcc,p0_reg_check_fail5 | |
11013 | mov 0xee5,%g1 | |
11014 | ldx [%g4+0x38],%g2 | |
11015 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
11016 | bne %xcc,p0_reg_check_fail6 | |
11017 | mov 0xee6,%g1 | |
11018 | ldx [%g4+0x40],%g2 | |
11019 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
11020 | bne %xcc,p0_reg_check_fail7 | |
11021 | mov 0xee7,%g1 | |
11022 | ldx [%g4+0x48],%g3 | |
11023 | std %f4,[%g4] | |
11024 | ldx [%g4],%g2 | |
11025 | cmp %g3,%g2 ! %f4 = 9ce0b68a 032cff8e | |
11026 | bne %xcc,p0_freg_check_fail | |
11027 | mov 0xf04,%g1 | |
11028 | ldx [%g4+0x50],%g3 | |
11029 | std %f6,[%g4] | |
11030 | ldx [%g4],%g2 | |
11031 | cmp %g3,%g2 ! %f6 = 02226c6b 57119e5e | |
11032 | bne %xcc,p0_freg_check_fail | |
11033 | mov 0xf06,%g1 | |
11034 | ldx [%g4+0x58],%g3 | |
11035 | std %f16,[%g4] | |
11036 | ldx [%g4],%g2 | |
11037 | cmp %g3,%g2 ! %f16 = 8ab6e09c d81a5b92 | |
11038 | bne %xcc,p0_freg_check_fail | |
11039 | mov 0xf16,%g1 | |
11040 | ldx [%g4+0x60],%g3 | |
11041 | std %f26,[%g4] | |
11042 | ldx [%g4],%g2 | |
11043 | cmp %g3,%g2 ! %f26 = ff000000 d9876ee7 | |
11044 | bne %xcc,p0_freg_check_fail | |
11045 | mov 0xf26,%g1 | |
11046 | ||
11047 | ! Check Point 50 completed | |
11048 | ||
11049 | ||
11050 | p0_label_251: | |
11051 | ! Mem[0000000010101410] = 00000000, %l3 = 000000000000ffff | |
11052 | ldsha [%i4+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
11053 | ! Mem[0000000030141410] = 9ce0b68a, %f21 = 0000007a | |
11054 | lda [%i5+%o5]0x81,%f21 ! %f21 = 9ce0b68a | |
11055 | ! Mem[0000000010101400] = ff000094 ffffffff 000000ff 3bedac39 | |
11056 | ! Mem[0000000010101410] = 00000000 0000007a 5e9e11ff 000000ff | |
11057 | ! Mem[0000000010101420] = 00000000 d81a5b92 00e200ff 9ce0b68a | |
11058 | ! Mem[0000000010101430] = 7a000000 0000b68a 5e27ffff 00000000 | |
11059 | ldda [%i4]ASI_BLK_P,%f16 ! Block Load from 0000000010101400 | |
11060 | ! Mem[0000000010041408] = 00000000 00000000, %l0 = ffffffff, %l1 = ffffffff | |
11061 | ldda [%i1+%o4]0x80,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
11062 | ! Mem[00000000100c1410] = 925b1ad8, %l2 = 00000000d3d28b8e | |
11063 | ldswa [%i3+%o5]0x80,%l2 ! %l2 = ffffffff925b1ad8 | |
11064 | ! Mem[0000000010041410] = 00000000 ffffffff, %l0 = 00000000, %l1 = 00000000 | |
11065 | ldd [%i1+%o5],%l0 ! %l0 = 0000000000000000 00000000ffffffff | |
11066 | ! Mem[000000001008142c] = a309ade0, %l1 = 00000000ffffffff | |
11067 | ldsba [%i2+0x02d]%asi,%l1 ! %l1 = 0000000000000009 | |
11068 | ! Mem[0000000010041420] = ffffffb4, %l4 = 00000000e76e87ff | |
11069 | ldsha [%i1+0x020]%asi,%l4 ! %l4 = ffffffffffffffff | |
11070 | ! Mem[0000000030041408] = 00ffff00, %l1 = 0000000000000009 | |
11071 | lduha [%i1+%o4]0x81,%l1 ! %l1 = 00000000000000ff | |
11072 | ! Starting 10 instruction Store Burst | |
11073 | ! %l2 = ffffffff925b1ad8, Mem[0000000030001410] = 00000000 | |
11074 | stba %l2,[%i0+%o5]0x81 ! Mem[0000000030001410] = d8000000 | |
11075 | ||
11076 | p0_label_252: | |
11077 | ! %l6 = 0000000000000000, Mem[0000000030001408] = 00ff00b60a8d001a | |
11078 | stxa %l6,[%i0+%o4]0x81 ! Mem[0000000030001408] = 0000000000000000 | |
11079 | ! %l1 = 00000000000000ff, Mem[0000000030141400] = 00000000 | |
11080 | stha %l1,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00ff0000 | |
11081 | ! %l4 = ffffffffffffffff, Mem[00000000201c0000] = ffff1669 | |
11082 | stb %l4,[%o0+%g0] ! Mem[00000000201c0000] = ffff1669 | |
11083 | membar #Sync ! Added by membar checker (64) | |
11084 | ! %l4 = ffffffffffffffff, Mem[0000000010101400] = ff000094 | |
11085 | stwa %l4,[%i4+%g0]0x80 ! Mem[0000000010101400] = ffffffff | |
11086 | ! Mem[0000000020800040] = 00009ffa, %l2 = ffffffff925b1ad8 | |
11087 | ldstub [%o1+0x040],%l2 ! %l2 = 00000000000000ff | |
11088 | ! %l2 = 0000000000000000, Mem[00000000100c1422] = 00000000, %asi = 80 | |
11089 | stha %l2,[%i3+0x022]%asi ! Mem[00000000100c1420] = 00000000 | |
11090 | ! %f22 = 5e9e11ff 000000ff, %l5 = 0000000000000000 | |
11091 | ! Mem[0000000030001428] = 00000000d9876ee7 | |
11092 | add %i0,0x028,%g1 | |
11093 | stda %f22,[%g1+%l5]ASI_PST32_S ! Mem[0000000030001428] = 00000000d9876ee7 | |
11094 | ! Mem[00000000300c1400] = ff876ee7, %l7 = 00000000000000ff | |
11095 | ldstuba [%i3+%g0]0x81,%l7 ! %l7 = 000000ff000000ff | |
11096 | ! %l7 = 00000000000000ff, Mem[0000000010181400] = ff000000 | |
11097 | stba %l7,[%i6+%g0]0x80 ! Mem[0000000010181400] = ff000000 | |
11098 | ! Starting 10 instruction Load Burst | |
11099 | ! Mem[00000000100c1410] = 925b1ad8 00000000, %l6 = 00000000, %l7 = 000000ff | |
11100 | ldda [%i3+%o5]0x80,%l6 ! %l6 = 00000000925b1ad8 0000000000000000 | |
11101 | ||
11102 | p0_label_253: | |
11103 | ! Mem[0000000030101408] = ff000000ff000000, %f20 = 00000000 0000007a | |
11104 | ldda [%i4+%o4]0x89,%f20 ! %f20 = ff000000 ff000000 | |
11105 | ! Mem[0000000010041408] = 00000000 00000000, %l0 = 00000000, %l1 = 000000ff | |
11106 | ldda [%i1+%o4]0x88,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
11107 | ! Mem[0000000030101400] = ade0ade0, %l5 = 0000000000000000 | |
11108 | ldsba [%i4+%g0]0x81,%l5 ! %l5 = ffffffffffffffad | |
11109 | ! Mem[0000000030101410] = 39aced3b, %l7 = 0000000000000000 | |
11110 | lduwa [%i4+%o5]0x81,%l7 ! %l7 = 0000000039aced3b | |
11111 | ! Mem[0000000010001410] = 5e27ffff ff000000, %l6 = 925b1ad8, %l7 = 39aced3b | |
11112 | ldda [%i0+%o5]0x88,%l6 ! %l6 = 00000000ff000000 000000005e27ffff | |
11113 | ! Mem[00000000300c1408] = 000000ff, %f5 = 032cff8e | |
11114 | lda [%i3+%o4]0x89,%f5 ! %f5 = 000000ff | |
11115 | ! Mem[0000000010001408] = ff000000, %l6 = 00000000ff000000 | |
11116 | lduha [%i0+%o4]0x80,%l6 ! %l6 = 000000000000ff00 | |
11117 | ! Mem[0000000021800180] = e25edb07, %l1 = 0000000000000000 | |
11118 | ldub [%o3+0x180],%l1 ! %l1 = 00000000000000e2 | |
11119 | ! Mem[0000000030101400] = e0ade0ad, %l6 = 000000000000ff00 | |
11120 | lduwa [%i4+%g0]0x89,%l6 ! %l6 = 00000000e0ade0ad | |
11121 | ! Starting 10 instruction Store Burst | |
11122 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010001410] = 000000ff ffff275e | |
11123 | stda %l2,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 00000000 | |
11124 | ||
11125 | p0_label_254: | |
11126 | ! %l0 = 0000000000000000, Mem[0000000030041410] = d3ffffff | |
11127 | stba %l0,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00ffffff | |
11128 | ! %l6 = 00000000e0ade0ad, Mem[0000000030041410] = 00ffffffc3fce2e3 | |
11129 | stxa %l6,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000e0ade0ad | |
11130 | ! Mem[00000000300c1400] = e76e87ff, %l0 = 0000000000000000 | |
11131 | swapa [%i3+%g0]0x89,%l0 ! %l0 = 00000000e76e87ff | |
11132 | ! %l7 = 000000005e27ffff, Mem[0000000010181410] = ffffffff | |
11133 | stwa %l7,[%i6+%o5]0x80 ! Mem[0000000010181410] = 5e27ffff | |
11134 | ! %l1 = 00000000000000e2, Mem[000000001008142c] = a309ade0 | |
11135 | sth %l1,[%i2+0x02c] ! Mem[000000001008142c] = 00e2ade0 | |
11136 | ! Mem[0000000010101408] = 000000ff, %l2 = 0000000000000000 | |
11137 | swapa [%i4+%o4]0x80,%l2 ! %l2 = 00000000000000ff | |
11138 | ! %l0 = e76e87ff, %l1 = 000000e2, Mem[00000000300c1400] = 00000000 00000000 | |
11139 | stda %l0,[%i3+%g0]0x89 ! Mem[00000000300c1400] = e76e87ff 000000e2 | |
11140 | ! %l2 = 00000000000000ff, Mem[0000000030141408] = 000000ff | |
11141 | stha %l2,[%i5+%o4]0x89 ! Mem[0000000030141408] = 000000ff | |
11142 | ! Code Fragment 3 | |
11143 | p0_fragment_4: | |
11144 | ! %l0 = 00000000e76e87ff | |
11145 | setx 0x5898db3008513e2c,%g7,%l0 ! %l0 = 5898db3008513e2c | |
11146 | ! %l1 = 00000000000000e2 | |
11147 | setx 0xf4a8a5bfef1794d3,%g7,%l1 ! %l1 = f4a8a5bfef1794d3 | |
11148 | setx 0x1fe000, %g1, %g3 | |
11149 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
11150 | setx 0x1ffff8, %g1, %g2 | |
11151 | and %l0, %g2, %l0 | |
11152 | ta T_CHANGE_HPRIV | |
11153 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
11154 | ta T_CHANGE_NONHPRIV | |
11155 | ! %l0 = 5898db3008513e2c | |
11156 | setx 0x7af90087ab0d90df,%g7,%l0 ! %l0 = 7af90087ab0d90df | |
11157 | ! %l1 = f4a8a5bfef1794d3 | |
11158 | setx 0x652d22107b7b8500,%g7,%l1 ! %l1 = 652d22107b7b8500 | |
11159 | ! Starting 10 instruction Load Burst | |
11160 | ! Mem[0000000030141410] = 9ce0b68a, %f23 = 000000ff | |
11161 | lda [%i5+%o5]0x81,%f23 ! %f23 = 9ce0b68a | |
11162 | ||
11163 | p0_label_255: | |
11164 | ! Mem[0000000010181400] = 000000ff, %l7 = 000000005e27ffff | |
11165 | lduha [%i6+%g0]0x88,%l7 ! %l7 = 00000000000000ff | |
11166 | ! Mem[0000000030181400] = ffffffff 0a8d001a 8ab6e09c ff000000 | |
11167 | ! Mem[0000000030181410] = 00000000 00000057 d9876ee7 f8d13fed | |
11168 | ! Mem[0000000030181420] = 000000ff ff000000 00000000 a309ade0 | |
11169 | ! Mem[0000000030181430] = 0f10ff1a e0ffffff 00000000 00007a9a | |
11170 | ldda [%i6]ASI_BLK_AIUSL,%f16 ! Block Load from 0000000030181400 | |
11171 | ! Mem[00000000300c1410] = 0000000057119e5e, %f0 = 00000000 e0ade0ad | |
11172 | ldda [%i3+%o5]0x89,%f0 ! %f0 = 00000000 57119e5e | |
11173 | ! Mem[0000000010181408] = 00000000, %l0 = 7af90087ab0d90df | |
11174 | lduba [%i6+%o4]0x80,%l0 ! %l0 = 0000000000000000 | |
11175 | ! Mem[0000000010101400] = ffffffff, %l4 = ffffffffffffffff | |
11176 | ldswa [%i4+%g0]0x88,%l4 ! %l4 = ffffffffffffffff | |
11177 | ! Mem[0000000010181404] = ff000000, %l4 = ffffffffffffffff | |
11178 | ldsh [%i6+0x004],%l4 ! %l4 = ffffffffffffff00 | |
11179 | ! Mem[0000000030001408] = 00000000, %l3 = 0000000000000000 | |
11180 | lduha [%i0+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
11181 | ! Mem[00000000218000c0] = 00e24e2c, %l4 = ffffffffffffff00 | |
11182 | ldsha [%o3+0x0c0]%asi,%l4 ! %l4 = 00000000000000e2 | |
11183 | ! Mem[00000000201c0000] = ffff1669, %l6 = 00000000e0ade0ad | |
11184 | lduh [%o0+%g0],%l6 ! %l6 = 000000000000ffff | |
11185 | ! Starting 10 instruction Store Burst | |
11186 | ! Mem[0000000030081408] = 1a008d0a, %l7 = 00000000000000ff | |
11187 | swapa [%i2+%o4]0x89,%l7 ! %l7 = 000000001a008d0a | |
11188 | ||
11189 | ! Check Point 51 for processor 0 | |
11190 | ||
11191 | set p0_check_pt_data_51,%g4 | |
11192 | rd %ccr,%g5 ! %g5 = 44 | |
11193 | ldx [%g4+0x08],%g2 | |
11194 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
11195 | bne %xcc,p0_reg_check_fail0 | |
11196 | mov 0xee0,%g1 | |
11197 | ldx [%g4+0x10],%g2 | |
11198 | cmp %l1,%g2 ! %l1 = 652d22107b7b8500 | |
11199 | bne %xcc,p0_reg_check_fail1 | |
11200 | mov 0xee1,%g1 | |
11201 | ldx [%g4+0x18],%g2 | |
11202 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
11203 | bne %xcc,p0_reg_check_fail2 | |
11204 | mov 0xee2,%g1 | |
11205 | ldx [%g4+0x20],%g2 | |
11206 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
11207 | bne %xcc,p0_reg_check_fail3 | |
11208 | mov 0xee3,%g1 | |
11209 | ldx [%g4+0x28],%g2 | |
11210 | cmp %l4,%g2 ! %l4 = 00000000000000e2 | |
11211 | bne %xcc,p0_reg_check_fail4 | |
11212 | mov 0xee4,%g1 | |
11213 | ldx [%g4+0x30],%g2 | |
11214 | cmp %l5,%g2 ! %l5 = ffffffffffffffad | |
11215 | bne %xcc,p0_reg_check_fail5 | |
11216 | mov 0xee5,%g1 | |
11217 | ldx [%g4+0x38],%g2 | |
11218 | cmp %l6,%g2 ! %l6 = 000000000000ffff | |
11219 | bne %xcc,p0_reg_check_fail6 | |
11220 | mov 0xee6,%g1 | |
11221 | ldx [%g4+0x40],%g2 | |
11222 | cmp %l7,%g2 ! %l7 = 000000001a008d0a | |
11223 | bne %xcc,p0_reg_check_fail7 | |
11224 | mov 0xee7,%g1 | |
11225 | ldx [%g4+0x48],%g3 | |
11226 | std %f0,[%g4] | |
11227 | ldx [%g4],%g2 | |
11228 | cmp %g3,%g2 ! %f0 = 00000000 57119e5e | |
11229 | bne %xcc,p0_freg_check_fail | |
11230 | mov 0xf00,%g1 | |
11231 | ldx [%g4+0x50],%g3 | |
11232 | std %f4,[%g4] | |
11233 | ldx [%g4],%g2 | |
11234 | cmp %g3,%g2 ! %f4 = 9ce0b68a 000000ff | |
11235 | bne %xcc,p0_freg_check_fail | |
11236 | mov 0xf04,%g1 | |
11237 | ldx [%g4+0x58],%g3 | |
11238 | std %f6,[%g4] | |
11239 | ldx [%g4],%g2 | |
11240 | cmp %g3,%g2 ! %f6 = 02226c6b 57119e5e | |
11241 | bne %xcc,p0_freg_check_fail | |
11242 | mov 0xf06,%g1 | |
11243 | ldx [%g4+0x60],%g3 | |
11244 | std %f16,[%g4] | |
11245 | ldx [%g4],%g2 | |
11246 | cmp %g3,%g2 ! %f16 = 1a008d0a ffffffff | |
11247 | bne %xcc,p0_freg_check_fail | |
11248 | mov 0xf16,%g1 | |
11249 | ldx [%g4+0x68],%g3 | |
11250 | std %f18,[%g4] | |
11251 | ldx [%g4],%g2 | |
11252 | cmp %g3,%g2 ! %f18 = 000000ff 9ce0b68a | |
11253 | bne %xcc,p0_freg_check_fail | |
11254 | mov 0xf18,%g1 | |
11255 | ldx [%g4+0x70],%g3 | |
11256 | std %f20,[%g4] | |
11257 | ldx [%g4],%g2 | |
11258 | cmp %g3,%g2 ! %f20 = 57000000 00000000 | |
11259 | bne %xcc,p0_freg_check_fail | |
11260 | mov 0xf20,%g1 | |
11261 | ldx [%g4+0x78],%g3 | |
11262 | std %f22,[%g4] | |
11263 | ldx [%g4],%g2 | |
11264 | cmp %g3,%g2 ! %f22 = ed3fd1f8 e76e87d9 | |
11265 | bne %xcc,p0_freg_check_fail | |
11266 | mov 0xf22,%g1 | |
11267 | ldx [%g4+0x80],%g3 | |
11268 | std %f24,[%g4] | |
11269 | ldx [%g4],%g2 | |
11270 | cmp %g3,%g2 ! %f24 = 000000ff ff000000 | |
11271 | bne %xcc,p0_freg_check_fail | |
11272 | mov 0xf24,%g1 | |
11273 | ldx [%g4+0x88],%g3 | |
11274 | std %f26,[%g4] | |
11275 | ldx [%g4],%g2 | |
11276 | cmp %g3,%g2 ! %f26 = e0ad09a3 00000000 | |
11277 | bne %xcc,p0_freg_check_fail | |
11278 | mov 0xf26,%g1 | |
11279 | ldx [%g4+0x90],%g3 | |
11280 | std %f28,[%g4] | |
11281 | ldx [%g4],%g2 | |
11282 | cmp %g3,%g2 ! %f28 = ffffffe0 1aff100f | |
11283 | bne %xcc,p0_freg_check_fail | |
11284 | mov 0xf28,%g1 | |
11285 | ldx [%g4+0x98],%g3 | |
11286 | std %f30,[%g4] | |
11287 | ldx [%g4],%g2 | |
11288 | cmp %g3,%g2 ! %f30 = 9a7a0000 00000000 | |
11289 | bne %xcc,p0_freg_check_fail | |
11290 | mov 0xf30,%g1 | |
11291 | ||
11292 | ! Check Point 51 completed | |
11293 | ||
11294 | ||
11295 | p0_label_256: | |
11296 | ! Mem[0000000010081418] = 0000578bd9876ee7, %l5 = ffffffffffffffad, %l1 = 652d22107b7b8500 | |
11297 | add %i2,0x18,%g1 | |
11298 | casxa [%g1]0x80,%l5,%l1 ! %l1 = 0000578bd9876ee7 | |
11299 | ! Mem[00000000218000c1] = 00e24e2c, %l7 = 000000001a008d0a | |
11300 | ldstub [%o3+0x0c1],%l7 ! %l7 = 000000e2000000ff | |
11301 | ! %f20 = 57000000 00000000, Mem[0000000030141408] = ff000000 ffffffff | |
11302 | stda %f20,[%i5+%o4]0x81 ! Mem[0000000030141408] = 57000000 00000000 | |
11303 | ! Mem[0000000030141408] = 00000057, %l0 = 0000000000000000 | |
11304 | ldstuba [%i5+%o4]0x89,%l0 ! %l0 = 00000057000000ff | |
11305 | ! Mem[0000000010041410] = 00000000, %l1 = 0000578bd9876ee7 | |
11306 | swapa [%i1+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
11307 | ! %f2 = ff000000 ffffffff, Mem[0000000010101418] = 5e9e11ff 000000ff | |
11308 | stda %f2 ,[%i4+0x018]%asi ! Mem[0000000010101418] = ff000000 ffffffff | |
11309 | ! %l5 = ffffffffffffffad, Mem[0000000010181400] = ff000000 | |
11310 | stba %l5,[%i6+%g0]0x80 ! Mem[0000000010181400] = ad000000 | |
11311 | ! %l1 = 0000000000000000, Mem[0000000030141400] = 00ff0000e0ade0ad | |
11312 | stxa %l1,[%i5+%g0]0x81 ! Mem[0000000030141400] = 0000000000000000 | |
11313 | ! Mem[0000000030041410] = 00000000, %l1 = 0000000000000000 | |
11314 | ldstuba [%i1+%o5]0x81,%l1 ! %l1 = 00000000000000ff | |
11315 | ! Starting 10 instruction Load Burst | |
11316 | ! Mem[0000000030181408] = 9ce0b68a, %l5 = ffffffffffffffad | |
11317 | lduba [%i6+%o4]0x89,%l5 ! %l5 = 000000000000008a | |
11318 | ||
11319 | p0_label_257: | |
11320 | ! Mem[00000000211c0000] = ff00fe0c, %l7 = 00000000000000e2 | |
11321 | lduha [%o2+0x000]%asi,%l7 ! %l7 = 000000000000ff00 | |
11322 | ! Mem[0000000010001408] = ff000000, %l5 = 000000000000008a | |
11323 | ldswa [%i0+%o4]0x80,%l5 ! %l5 = ffffffffff000000 | |
11324 | ! Mem[000000001004143c] = e46dee46, %l1 = 0000000000000000 | |
11325 | ldsw [%i1+0x03c],%l1 ! %l1 = ffffffffe46dee46 | |
11326 | ! Mem[0000000030141400] = 00000000, %l0 = 0000000000000057 | |
11327 | lduwa [%i5+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
11328 | ! Mem[0000000010141410] = ffffffd7, %l5 = ffffffffff000000 | |
11329 | lduwa [%i5+%o5]0x80,%l5 ! %l5 = 00000000ffffffd7 | |
11330 | ! Mem[0000000030101410] = 39aced3b 8ab6e09c, %l0 = 00000000, %l1 = e46dee46 | |
11331 | ldda [%i4+%o5]0x81,%l0 ! %l0 = 0000000039aced3b 000000008ab6e09c | |
11332 | ! Mem[0000000030101408] = 000000ff000000ff, %l2 = 00000000000000ff | |
11333 | ldxa [%i4+%o4]0x81,%l2 ! %l2 = 000000ff000000ff | |
11334 | ! Mem[0000000010141430] = ffb6e09c, %l4 = 00000000000000e2 | |
11335 | ldsha [%i5+0x030]%asi,%l4 ! %l4 = ffffffffffffffb6 | |
11336 | ! Mem[0000000010001400] = ff000000, %l4 = ffffffffffffffb6 | |
11337 | ldswa [%i0+%g0]0x80,%l4 ! %l4 = ffffffffff000000 | |
11338 | ! Starting 10 instruction Store Burst | |
11339 | ! Mem[0000000010181400] = 000000ad, %l0 = 0000000039aced3b | |
11340 | swapa [%i6+%g0]0x88,%l0 ! %l0 = 00000000000000ad | |
11341 | ||
11342 | p0_label_258: | |
11343 | ! %l5 = 00000000ffffffd7, Mem[0000000030101408] = 000000ff | |
11344 | stha %l5,[%i4+%o4]0x81 ! Mem[0000000030101408] = ffd700ff | |
11345 | ! Mem[00000000300c1400] = e76e87ff, %l7 = 000000000000ff00 | |
11346 | swapa [%i3+%g0]0x89,%l7 ! %l7 = 00000000e76e87ff | |
11347 | ! %f4 = 9ce0b68a 000000ff, %l0 = 00000000000000ad | |
11348 | ! Mem[0000000030041410] = ff000000e0ade0ad | |
11349 | add %i1,0x010,%g1 | |
11350 | stda %f4,[%g1+%l0]ASI_PST32_S ! Mem[0000000030041410] = ff000000000000ff | |
11351 | ! %l7 = 00000000e76e87ff, Mem[0000000021800040] = ceff5e5c | |
11352 | sth %l7,[%o3+0x040] ! Mem[0000000021800040] = 87ff5e5c | |
11353 | ! %l6 = 000000000000ffff, Mem[0000000010141404] = 9ce0b68a | |
11354 | stw %l6,[%i5+0x004] ! Mem[0000000010141404] = 0000ffff | |
11355 | ! Mem[0000000030081408] = 000000ff, %l6 = 000000000000ffff | |
11356 | ldstuba [%i2+%o4]0x89,%l6 ! %l6 = 000000ff000000ff | |
11357 | membar #Sync ! Added by membar checker (65) | |
11358 | ! %l6 = 000000ff, %l7 = e76e87ff, Mem[0000000030181400] = ffffffff 0a8d001a | |
11359 | stda %l6,[%i6+%g0]0x81 ! Mem[0000000030181400] = 000000ff e76e87ff | |
11360 | ! Mem[0000000030081410] = e2ffffff, %l1 = 000000008ab6e09c | |
11361 | ldstuba [%i2+%o5]0x81,%l1 ! %l1 = 000000e2000000ff | |
11362 | ! Mem[0000000030181408] = 8ab6e09c, %l6 = 00000000000000ff | |
11363 | swapa [%i6+%o4]0x81,%l6 ! %l6 = 000000008ab6e09c | |
11364 | ! Starting 10 instruction Load Burst | |
11365 | ! Mem[0000000010141408] = 00000000, %l1 = 00000000000000e2 | |
11366 | lduba [%i5+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
11367 | ||
11368 | p0_label_259: | |
11369 | ! Mem[0000000030041400] = ffffffff, %l4 = ffffffffff000000 | |
11370 | lduwa [%i1+%g0]0x89,%l4 ! %l4 = 00000000ffffffff | |
11371 | ! Mem[0000000010181400] = 39aced3b, %l5 = 00000000ffffffd7 | |
11372 | lduba [%i6+%g0]0x88,%l5 ! %l5 = 000000000000003b | |
11373 | membar #Sync ! Added by membar checker (66) | |
11374 | ! Mem[0000000030081400] = 00000000 ffe20000 ff000000 1a008d0a | |
11375 | ! Mem[0000000030081410] = ffffffff ffffffff 5a7d065e 8058821d | |
11376 | ! Mem[0000000030081420] = de6a2d8e 5372d306 e3e2fcc3 d3d28b57 | |
11377 | ! Mem[0000000030081430] = 00000000 b1c0060a d9070248 b8c2204b | |
11378 | ldda [%i2]ASI_BLK_S,%f16 ! Block Load from 0000000030081400 | |
11379 | ! Mem[00000000300c1400] = 00ff0000 e2000000, %l2 = 000000ff, %l3 = 00000000 | |
11380 | ldda [%i3+%g0]0x81,%l2 ! %l2 = 0000000000ff0000 00000000e2000000 | |
11381 | ! Mem[0000000030041410] = ff000000000000ff, %f14 = ffffffff 000000ff | |
11382 | ldda [%i1+%o5]0x81,%f14 ! %f14 = ff000000 000000ff | |
11383 | ! Mem[0000000030001410] = d8000000, %l7 = 00000000e76e87ff | |
11384 | ldsba [%i0+%o5]0x81,%l7 ! %l7 = ffffffffffffffd8 | |
11385 | ! Mem[0000000030041400] = ffffffff, %l1 = 0000000000000000 | |
11386 | lduha [%i1+%g0]0x89,%l1 ! %l1 = 000000000000ffff | |
11387 | ! Mem[0000000030101408] = ffd700ff 000000ff, %l4 = ffffffff, %l5 = 0000003b | |
11388 | ldda [%i4+%o4]0x81,%l4 ! %l4 = 00000000ffd700ff 00000000000000ff | |
11389 | ! Mem[00000000300c1408] = 000000ff, %l2 = 0000000000ff0000 | |
11390 | lduba [%i3+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
11391 | ! Starting 10 instruction Store Burst | |
11392 | ! %f5 = 000000ff, Mem[00000000300c1400] = 0000ff00 | |
11393 | sta %f5 ,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 000000ff | |
11394 | ||
11395 | p0_label_260: | |
11396 | ! Mem[0000000010041410] = d9876ee7, %l4 = 00000000ffd700ff | |
11397 | ldstuba [%i1+%o5]0x88,%l4 ! %l4 = 000000e7000000ff | |
11398 | ! Mem[0000000010001408] = 000000ff, %l6 = 000000008ab6e09c | |
11399 | ldstuba [%i0+%o4]0x88,%l6 ! %l6 = 000000ff000000ff | |
11400 | ! Mem[0000000010181410] = ffff275e, %l2 = 00000000000000ff | |
11401 | swapa [%i6+%o5]0x88,%l2 ! %l2 = 00000000ffff275e | |
11402 | ! Mem[0000000020800041] = ff009ffa, %l2 = 00000000ffff275e | |
11403 | ldstub [%o1+0x041],%l2 ! %l2 = 00000000000000ff | |
11404 | ! Mem[0000000030181400] = 000000ff, %l2 = 0000000000000000 | |
11405 | ldstuba [%i6+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
11406 | ! %l0 = 00000000000000ad, Mem[000000001004140c] = 00000000, %asi = 80 | |
11407 | stwa %l0,[%i1+0x00c]%asi ! Mem[000000001004140c] = 000000ad | |
11408 | ! Mem[0000000030001408] = 00000000, %f6 = 02226c6b | |
11409 | lda [%i0+%o4]0x89,%f6 ! %f6 = 00000000 | |
11410 | ! %l6 = 00000000000000ff, Mem[0000000010181410] = ff000000000000ff | |
11411 | stxa %l6,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000000000ff | |
11412 | ! %l4 = 000000e7, %l5 = 000000ff, Mem[0000000010101408] = 00000000 39aced3b | |
11413 | stda %l4,[%i4+%o4]0x88 ! Mem[0000000010101408] = 000000e7 000000ff | |
11414 | ! Starting 10 instruction Load Burst | |
11415 | ! Mem[0000000030081408] = 000000ff, %l3 = 00000000e2000000 | |
11416 | ldsha [%i2+%o4]0x89,%l3 ! %l3 = 00000000000000ff | |
11417 | ||
11418 | ! Check Point 52 for processor 0 | |
11419 | ||
11420 | set p0_check_pt_data_52,%g4 | |
11421 | rd %ccr,%g5 ! %g5 = 44 | |
11422 | ldx [%g4+0x08],%g2 | |
11423 | cmp %l0,%g2 ! %l0 = 00000000000000ad | |
11424 | bne %xcc,p0_reg_check_fail0 | |
11425 | mov 0xee0,%g1 | |
11426 | ldx [%g4+0x10],%g2 | |
11427 | cmp %l1,%g2 ! %l1 = 000000000000ffff | |
11428 | bne %xcc,p0_reg_check_fail1 | |
11429 | mov 0xee1,%g1 | |
11430 | ldx [%g4+0x18],%g2 | |
11431 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
11432 | bne %xcc,p0_reg_check_fail2 | |
11433 | mov 0xee2,%g1 | |
11434 | ldx [%g4+0x20],%g2 | |
11435 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
11436 | bne %xcc,p0_reg_check_fail3 | |
11437 | mov 0xee3,%g1 | |
11438 | ldx [%g4+0x28],%g2 | |
11439 | cmp %l4,%g2 ! %l4 = 00000000000000e7 | |
11440 | bne %xcc,p0_reg_check_fail4 | |
11441 | mov 0xee4,%g1 | |
11442 | ldx [%g4+0x30],%g2 | |
11443 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
11444 | bne %xcc,p0_reg_check_fail5 | |
11445 | mov 0xee5,%g1 | |
11446 | ldx [%g4+0x38],%g2 | |
11447 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
11448 | bne %xcc,p0_reg_check_fail6 | |
11449 | mov 0xee6,%g1 | |
11450 | ldx [%g4+0x40],%g2 | |
11451 | cmp %l7,%g2 ! %l7 = ffffffffffffffd8 | |
11452 | bne %xcc,p0_reg_check_fail7 | |
11453 | mov 0xee7,%g1 | |
11454 | ldx [%g4+0x48],%g3 | |
11455 | std %f0,[%g4] | |
11456 | ldx [%g4],%g2 | |
11457 | cmp %g3,%g2 ! %f0 = 00000000 57119e5e | |
11458 | bne %xcc,p0_freg_check_fail | |
11459 | mov 0xf00,%g1 | |
11460 | ldx [%g4+0x50],%g3 | |
11461 | std %f2,[%g4] | |
11462 | ldx [%g4],%g2 | |
11463 | cmp %g3,%g2 ! %f2 = ff000000 ffffffff | |
11464 | bne %xcc,p0_freg_check_fail | |
11465 | mov 0xf02,%g1 | |
11466 | ldx [%g4+0x58],%g3 | |
11467 | std %f4,[%g4] | |
11468 | ldx [%g4],%g2 | |
11469 | cmp %g3,%g2 ! %f4 = 9ce0b68a 000000ff | |
11470 | bne %xcc,p0_freg_check_fail | |
11471 | mov 0xf04,%g1 | |
11472 | ldx [%g4+0x60],%g3 | |
11473 | std %f6,[%g4] | |
11474 | ldx [%g4],%g2 | |
11475 | cmp %g3,%g2 ! %f6 = 00000000 57119e5e | |
11476 | bne %xcc,p0_freg_check_fail | |
11477 | mov 0xf06,%g1 | |
11478 | ldx [%g4+0x68],%g3 | |
11479 | std %f14,[%g4] | |
11480 | ldx [%g4],%g2 | |
11481 | cmp %g3,%g2 ! %f14 = ff000000 000000ff | |
11482 | bne %xcc,p0_freg_check_fail | |
11483 | mov 0xf14,%g1 | |
11484 | ldx [%g4+0x70],%g3 | |
11485 | std %f16,[%g4] | |
11486 | ldx [%g4],%g2 | |
11487 | cmp %g3,%g2 ! %f16 = 00000000 ffe20000 | |
11488 | bne %xcc,p0_freg_check_fail | |
11489 | mov 0xf16,%g1 | |
11490 | ldx [%g4+0x78],%g3 | |
11491 | std %f18,[%g4] | |
11492 | ldx [%g4],%g2 | |
11493 | cmp %g3,%g2 ! %f18 = ff000000 1a008d0a | |
11494 | bne %xcc,p0_freg_check_fail | |
11495 | mov 0xf18,%g1 | |
11496 | ldx [%g4+0x80],%g3 | |
11497 | std %f20,[%g4] | |
11498 | ldx [%g4],%g2 | |
11499 | cmp %g3,%g2 ! %f20 = ffffffff ffffffff | |
11500 | bne %xcc,p0_freg_check_fail | |
11501 | mov 0xf20,%g1 | |
11502 | ldx [%g4+0x88],%g3 | |
11503 | std %f22,[%g4] | |
11504 | ldx [%g4],%g2 | |
11505 | cmp %g3,%g2 ! %f22 = 5a7d065e 8058821d | |
11506 | bne %xcc,p0_freg_check_fail | |
11507 | mov 0xf22,%g1 | |
11508 | ldx [%g4+0x90],%g3 | |
11509 | std %f24,[%g4] | |
11510 | ldx [%g4],%g2 | |
11511 | cmp %g3,%g2 ! %f24 = de6a2d8e 5372d306 | |
11512 | bne %xcc,p0_freg_check_fail | |
11513 | mov 0xf24,%g1 | |
11514 | ldx [%g4+0x98],%g3 | |
11515 | std %f26,[%g4] | |
11516 | ldx [%g4],%g2 | |
11517 | cmp %g3,%g2 ! %f26 = e3e2fcc3 d3d28b57 | |
11518 | bne %xcc,p0_freg_check_fail | |
11519 | mov 0xf26,%g1 | |
11520 | ldx [%g4+0xa0],%g3 | |
11521 | std %f28,[%g4] | |
11522 | ldx [%g4],%g2 | |
11523 | cmp %g3,%g2 ! %f28 = 00000000 b1c0060a | |
11524 | bne %xcc,p0_freg_check_fail | |
11525 | mov 0xf28,%g1 | |
11526 | ldx [%g4+0xa8],%g3 | |
11527 | std %f30,[%g4] | |
11528 | ldx [%g4],%g2 | |
11529 | cmp %g3,%g2 ! %f30 = d9070248 b8c2204b | |
11530 | bne %xcc,p0_freg_check_fail | |
11531 | mov 0xf30,%g1 | |
11532 | ||
11533 | ! Check Point 52 completed | |
11534 | ||
11535 | ||
11536 | p0_label_261: | |
11537 | ! Mem[0000000010081410] = ffffffff, %l6 = 00000000000000ff | |
11538 | ldsba [%i2+%o5]0x88,%l6 ! %l6 = ffffffffffffffff | |
11539 | ! Mem[0000000010101408] = e7000000, %l7 = ffffffffffffffd8 | |
11540 | lduba [%i4+%o4]0x80,%l7 ! %l7 = 00000000000000e7 | |
11541 | ! %l2 = 0000000000000000, immed = 0000045c, %y = 0000578b | |
11542 | smul %l2,0x45c,%l7 ! %l7 = 0000000000000000, %y = 00000000 | |
11543 | ! Mem[0000000010181400] = 39aced3b, %l2 = 0000000000000000 | |
11544 | lduba [%i6+%g0]0x88,%l2 ! %l2 = 000000000000003b | |
11545 | ! Mem[0000000010081400] = ff000000 d81a5b92 ff000000 00000000 | |
11546 | ! Mem[0000000010081410] = ffffffff d7ffffff 0000578b d9876ee7 | |
11547 | ! Mem[0000000010081420] = 9ce0b68a 000000ff 00000000 00e2ade0 | |
11548 | ! Mem[0000000010081430] = 0f10ff1a e0ffffff 00ff0000 00007a1a | |
11549 | ldda [%i2]ASI_BLK_PL,%f16 ! Block Load from 0000000010081400 | |
11550 | ! Mem[0000000010181400] = 000000ff39aced3b, %f0 = 00000000 57119e5e | |
11551 | ldda [%i6+%g0]0x88,%f0 ! %f0 = 000000ff 39aced3b | |
11552 | ! Mem[0000000030141408] = 000000ff, %l0 = 00000000000000ad | |
11553 | lduha [%i5+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
11554 | ! Mem[0000000010181428] = ffffffff, %l5 = 00000000000000ff | |
11555 | ldswa [%i6+0x028]%asi,%l5 ! %l5 = ffffffffffffffff | |
11556 | ! Mem[0000000030181410] = 00000000, %f2 = ff000000 | |
11557 | lda [%i6+%o5]0x81,%f2 ! %f2 = 00000000 | |
11558 | ! Starting 10 instruction Store Burst | |
11559 | ! %l4 = 00000000000000e7, Mem[00000000300c1408] = 000000ff | |
11560 | stba %l4,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 000000e7 | |
11561 | ||
11562 | p0_label_262: | |
11563 | ! Mem[0000000010081400] = ff000000, %l0 = 00000000000000ff | |
11564 | swapa [%i2+%g0]0x80,%l0 ! %l0 = 00000000ff000000 | |
11565 | ! %l2 = 0000003b, %l3 = 000000ff, Mem[0000000010141410] = ffffffd7 ffffffff | |
11566 | stda %l2,[%i5+0x010]%asi ! Mem[0000000010141410] = 0000003b 000000ff | |
11567 | ! %f6 = 00000000 57119e5e, %l0 = 00000000ff000000 | |
11568 | ! Mem[00000000300c1410] = 5e9e115700000000 | |
11569 | add %i3,0x010,%g1 | |
11570 | stda %f6,[%g1+%l0]ASI_PST16_SL ! Mem[00000000300c1410] = 5e9e115700000000 | |
11571 | ! %l2 = 0000003b, %l3 = 000000ff, Mem[0000000030041410] = 000000ff ff000000 | |
11572 | stda %l2,[%i1+%o5]0x89 ! Mem[0000000030041410] = 0000003b 000000ff | |
11573 | ! Mem[0000000010041410] = ff6e87d9, %l5 = ffffffffffffffff | |
11574 | ldstuba [%i1+%o5]0x80,%l5 ! %l5 = 000000ff000000ff | |
11575 | ! %l1 = 000000000000ffff, Mem[0000000021800181] = e25edb07 | |
11576 | stb %l1,[%o3+0x181] ! Mem[0000000021800180] = e2ffdb07 | |
11577 | ! Mem[0000000021800141] = 00a3f8a0, %l1 = 000000000000ffff | |
11578 | ldstub [%o3+0x141],%l1 ! %l1 = 000000a3000000ff | |
11579 | ! %f3 = ffffffff, Mem[0000000010041410] = ff6e87d9 | |
11580 | sta %f3 ,[%i1+%o5]0x80 ! Mem[0000000010041410] = ffffffff | |
11581 | ! %l4 = 000000e7, %l5 = 000000ff, Mem[00000000100c1410] = d81a5b92 00000000 | |
11582 | stda %l4,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 000000e7 000000ff | |
11583 | ! Starting 10 instruction Load Burst | |
11584 | ! Mem[0000000030001410] = 000000d8, %l4 = 00000000000000e7 | |
11585 | lduba [%i0+%o5]0x89,%l4 ! %l4 = 00000000000000d8 | |
11586 | ||
11587 | p0_label_263: | |
11588 | ! Mem[0000000010181400] = 3bedac39, %l4 = 00000000000000d8 | |
11589 | lduha [%i6+%g0]0x80,%l4 ! %l4 = 0000000000003bed | |
11590 | ! Mem[0000000030041410] = 000000ff0000003b, %f0 = 000000ff 39aced3b | |
11591 | ldda [%i1+%o5]0x89,%f0 ! %f0 = 000000ff 0000003b | |
11592 | ! Mem[0000000010041400] = 000000ff, %l3 = 00000000000000ff | |
11593 | lduha [%i1+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
11594 | ! Mem[0000000030181408] = 000000ffff000000, %l5 = 00000000000000ff | |
11595 | ldxa [%i6+%o4]0x89,%l5 ! %l5 = 000000ffff000000 | |
11596 | ! Mem[0000000030041400] = ffffffff, %l4 = 0000000000003bed | |
11597 | lduha [%i1+%g0]0x81,%l4 ! %l4 = 000000000000ffff | |
11598 | ! Mem[0000000010041408] = 00000000, %l1 = 00000000000000a3 | |
11599 | ldsba [%i1+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
11600 | ! Mem[00000000100c1420] = 00000000, %l6 = ffffffffffffffff | |
11601 | ldsb [%i3+0x022],%l6 ! %l6 = 0000000000000000 | |
11602 | ! Mem[000000001000143c] = caffffff, %l3 = 00000000000000ff | |
11603 | ldsw [%i0+0x03c],%l3 ! %l3 = ffffffffcaffffff | |
11604 | ! Mem[0000000030041410] = 3b000000ff000000, %f10 = 64479a75 bb9180c7 | |
11605 | ldda [%i1+%o5]0x81,%f10 ! %f10 = 3b000000 ff000000 | |
11606 | ! Starting 10 instruction Store Burst | |
11607 | ! Mem[0000000030081408] = ff000000, %l5 = 000000ffff000000 | |
11608 | swapa [%i2+%o4]0x81,%l5 ! %l5 = 00000000ff000000 | |
11609 | ||
11610 | p0_label_264: | |
11611 | ! %l4 = 0000ffff, %l5 = ff000000, Mem[0000000010041408] = 00000000 ad000000 | |
11612 | stda %l4,[%i1+%o4]0x88 ! Mem[0000000010041408] = 0000ffff ff000000 | |
11613 | ! Mem[00000000100c1400] = ff0000ff, %l7 = 0000000000000000 | |
11614 | swapa [%i3+%g0]0x88,%l7 ! %l7 = 00000000ff0000ff | |
11615 | ! %l2 = 000000000000003b, Mem[0000000030101400] = ade0ade0 | |
11616 | stha %l2,[%i4+%g0]0x81 ! Mem[0000000030101400] = 003bade0 | |
11617 | ! Mem[0000000030081408] = 000000ff, %l7 = 00000000ff0000ff | |
11618 | ldstuba [%i2+%o4]0x89,%l7 ! %l7 = 000000ff000000ff | |
11619 | ! %l1 = 0000000000000000, Mem[0000000010141400] = ff0000ff | |
11620 | stha %l1,[%i5+%g0]0x80 ! Mem[0000000010141400] = 000000ff | |
11621 | membar #Sync ! Added by membar checker (67) | |
11622 | ! %l5 = 00000000ff000000, Mem[0000000010081424] = 000000ff | |
11623 | stw %l5,[%i2+0x024] ! Mem[0000000010081424] = ff000000 | |
11624 | ! Mem[0000000010001400] = 000000ff, %l2 = 000000000000003b | |
11625 | swapa [%i0+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
11626 | ! %l5 = 00000000ff000000, Mem[00000000100c1400] = 8ab6e09c00000000 | |
11627 | stxa %l5,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 00000000ff000000 | |
11628 | ! Mem[00000000100c1408] = ffb6e09c, %l1 = 0000000000000000 | |
11629 | swapa [%i3+%o4]0x80,%l1 ! %l1 = 00000000ffb6e09c | |
11630 | ! Starting 10 instruction Load Burst | |
11631 | ! Mem[00000000100c1410] = 000000ff000000e7, %l6 = 0000000000000000 | |
11632 | ldxa [%i3+%o5]0x88,%l6 ! %l6 = 000000ff000000e7 | |
11633 | ||
11634 | p0_label_265: | |
11635 | ! Mem[0000000010101420] = 00000000, %l3 = ffffffffcaffffff | |
11636 | ldsb [%i4+0x023],%l3 ! %l3 = 0000000000000000 | |
11637 | ! Mem[0000000030141400] = 00000000, %f6 = 00000000 | |
11638 | lda [%i5+%g0]0x81,%f6 ! %f6 = 00000000 | |
11639 | ! Mem[0000000010081418] = 0000578bd9876ee7, %l7 = 00000000000000ff | |
11640 | ldx [%i2+0x018],%l7 ! %l7 = 0000578bd9876ee7 | |
11641 | ! Mem[00000000100c1400] = ff000000, %l5 = 00000000ff000000 | |
11642 | lduba [%i3+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
11643 | ! Mem[0000000030041410] = 0000003b, %l7 = 0000578bd9876ee7 | |
11644 | ldsba [%i1+%o5]0x89,%l7 ! %l7 = 000000000000003b | |
11645 | ! Mem[0000000010041400] = ff000000 ff000000 ffff0000 000000ff | |
11646 | ! Mem[0000000010041410] = ffffffff ffffffff ffffffff 57119e5e | |
11647 | ! Mem[0000000010041420] = ffffffb4 0000005e 39aced3b 8ab6e09c | |
11648 | ! Mem[0000000010041430] = 8ab6e09c 1aff100f cd10ffc4 e46dee46 | |
11649 | ldda [%i1]ASI_BLK_P,%f0 ! Block Load from 0000000010041400 | |
11650 | ! Mem[0000000010081420] = 9ce0b68aff000000, %f16 = 925b1ad8 000000ff | |
11651 | ldd [%i2+0x020],%f16 ! %f16 = 9ce0b68a ff000000 | |
11652 | ! Mem[0000000030141400] = 00000000, %f17 = ff000000 | |
11653 | lda [%i5+%g0]0x81,%f17 ! %f17 = 00000000 | |
11654 | ! Mem[00000000300c1408] = 000000e7, %f20 = ffffffd7 | |
11655 | lda [%i3+%o4]0x89,%f20 ! %f20 = 000000e7 | |
11656 | ! Starting 10 instruction Store Burst | |
11657 | ! %l0 = ff000000, %l1 = ffb6e09c, Mem[0000000030081410] = ffffffff ffffffff | |
11658 | stda %l0,[%i2+%o5]0x89 ! Mem[0000000030081410] = ff000000 ffb6e09c | |
11659 | ||
11660 | ! Check Point 53 for processor 0 | |
11661 | ||
11662 | set p0_check_pt_data_53,%g4 | |
11663 | rd %ccr,%g5 ! %g5 = 44 | |
11664 | ldx [%g4+0x08],%g2 | |
11665 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
11666 | bne %xcc,p0_reg_check_fail0 | |
11667 | mov 0xee0,%g1 | |
11668 | ldx [%g4+0x10],%g2 | |
11669 | cmp %l1,%g2 ! %l1 = 00000000ffb6e09c | |
11670 | bne %xcc,p0_reg_check_fail1 | |
11671 | mov 0xee1,%g1 | |
11672 | ldx [%g4+0x18],%g2 | |
11673 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
11674 | bne %xcc,p0_reg_check_fail2 | |
11675 | mov 0xee2,%g1 | |
11676 | ldx [%g4+0x20],%g2 | |
11677 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
11678 | bne %xcc,p0_reg_check_fail3 | |
11679 | mov 0xee3,%g1 | |
11680 | ldx [%g4+0x28],%g2 | |
11681 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
11682 | bne %xcc,p0_reg_check_fail4 | |
11683 | mov 0xee4,%g1 | |
11684 | ldx [%g4+0x30],%g2 | |
11685 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
11686 | bne %xcc,p0_reg_check_fail5 | |
11687 | mov 0xee5,%g1 | |
11688 | ldx [%g4+0x38],%g2 | |
11689 | cmp %l6,%g2 ! %l6 = 000000ff000000e7 | |
11690 | bne %xcc,p0_reg_check_fail6 | |
11691 | mov 0xee6,%g1 | |
11692 | ldx [%g4+0x40],%g2 | |
11693 | cmp %l7,%g2 ! %l7 = 000000000000003b | |
11694 | bne %xcc,p0_reg_check_fail7 | |
11695 | mov 0xee7,%g1 | |
11696 | ldx [%g4+0x48],%g3 | |
11697 | std %f0,[%g4] | |
11698 | ldx [%g4],%g2 | |
11699 | cmp %g3,%g2 ! %f0 = ff000000 ff000000 | |
11700 | bne %xcc,p0_freg_check_fail | |
11701 | mov 0xf00,%g1 | |
11702 | ldx [%g4+0x50],%g3 | |
11703 | std %f2,[%g4] | |
11704 | ldx [%g4],%g2 | |
11705 | cmp %g3,%g2 ! %f2 = ffff0000 000000ff | |
11706 | bne %xcc,p0_freg_check_fail | |
11707 | mov 0xf02,%g1 | |
11708 | ldx [%g4+0x58],%g3 | |
11709 | std %f4,[%g4] | |
11710 | ldx [%g4],%g2 | |
11711 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
11712 | bne %xcc,p0_freg_check_fail | |
11713 | mov 0xf04,%g1 | |
11714 | ldx [%g4+0x60],%g3 | |
11715 | std %f6,[%g4] | |
11716 | ldx [%g4],%g2 | |
11717 | cmp %g3,%g2 ! %f6 = ffffffff 57119e5e | |
11718 | bne %xcc,p0_freg_check_fail | |
11719 | mov 0xf06,%g1 | |
11720 | ldx [%g4+0x68],%g3 | |
11721 | std %f8,[%g4] | |
11722 | ldx [%g4],%g2 | |
11723 | cmp %g3,%g2 ! %f8 = ffffffb4 0000005e | |
11724 | bne %xcc,p0_freg_check_fail | |
11725 | mov 0xf08,%g1 | |
11726 | ldx [%g4+0x70],%g3 | |
11727 | std %f10,[%g4] | |
11728 | ldx [%g4],%g2 | |
11729 | cmp %g3,%g2 ! %f10 = 39aced3b 8ab6e09c | |
11730 | bne %xcc,p0_freg_check_fail | |
11731 | mov 0xf10,%g1 | |
11732 | ldx [%g4+0x78],%g3 | |
11733 | std %f12,[%g4] | |
11734 | ldx [%g4],%g2 | |
11735 | cmp %g3,%g2 ! %f12 = 8ab6e09c 1aff100f | |
11736 | bne %xcc,p0_freg_check_fail | |
11737 | mov 0xf12,%g1 | |
11738 | ldx [%g4+0x80],%g3 | |
11739 | std %f14,[%g4] | |
11740 | ldx [%g4],%g2 | |
11741 | cmp %g3,%g2 ! %f14 = cd10ffc4 e46dee46 | |
11742 | bne %xcc,p0_freg_check_fail | |
11743 | mov 0xf14,%g1 | |
11744 | ldx [%g4+0x88],%g3 | |
11745 | std %f16,[%g4] | |
11746 | ldx [%g4],%g2 | |
11747 | cmp %g3,%g2 ! %f16 = 9ce0b68a 00000000 | |
11748 | bne %xcc,p0_freg_check_fail | |
11749 | mov 0xf16,%g1 | |
11750 | ldx [%g4+0x90],%g3 | |
11751 | std %f18,[%g4] | |
11752 | ldx [%g4],%g2 | |
11753 | cmp %g3,%g2 ! %f18 = 00000000 000000ff | |
11754 | bne %xcc,p0_freg_check_fail | |
11755 | mov 0xf18,%g1 | |
11756 | ldx [%g4+0x98],%g3 | |
11757 | std %f20,[%g4] | |
11758 | ldx [%g4],%g2 | |
11759 | cmp %g3,%g2 ! %f20 = 000000e7 ffffffff | |
11760 | bne %xcc,p0_freg_check_fail | |
11761 | mov 0xf20,%g1 | |
11762 | ldx [%g4+0xa0],%g3 | |
11763 | std %f22,[%g4] | |
11764 | ldx [%g4],%g2 | |
11765 | cmp %g3,%g2 ! %f22 = e76e87d9 8b570000 | |
11766 | bne %xcc,p0_freg_check_fail | |
11767 | mov 0xf22,%g1 | |
11768 | ldx [%g4+0xa8],%g3 | |
11769 | std %f24,[%g4] | |
11770 | ldx [%g4],%g2 | |
11771 | cmp %g3,%g2 ! %f24 = ff000000 8ab6e09c | |
11772 | bne %xcc,p0_freg_check_fail | |
11773 | mov 0xf24,%g1 | |
11774 | ldx [%g4+0xb0],%g3 | |
11775 | std %f26,[%g4] | |
11776 | ldx [%g4],%g2 | |
11777 | cmp %g3,%g2 ! %f26 = e0ade200 00000000 | |
11778 | bne %xcc,p0_freg_check_fail | |
11779 | mov 0xf26,%g1 | |
11780 | ldx [%g4+0xb8],%g3 | |
11781 | std %f28,[%g4] | |
11782 | ldx [%g4],%g2 | |
11783 | cmp %g3,%g2 ! %f28 = ffffffe0 1aff100f | |
11784 | bne %xcc,p0_freg_check_fail | |
11785 | mov 0xf28,%g1 | |
11786 | ldx [%g4+0xc0],%g3 | |
11787 | std %f30,[%g4] | |
11788 | ldx [%g4],%g2 | |
11789 | cmp %g3,%g2 ! %f30 = 1a7a0000 0000ff00 | |
11790 | bne %xcc,p0_freg_check_fail | |
11791 | mov 0xf30,%g1 | |
11792 | ||
11793 | ! Check Point 53 completed | |
11794 | ||
11795 | ||
11796 | p0_label_266: | |
11797 | ! %l0 = ff000000, %l1 = ffb6e09c, Mem[00000000100c1400] = ff000000 00000000 | |
11798 | stda %l0,[%i3+%g0]0x88 ! Mem[00000000100c1400] = ff000000 ffb6e09c | |
11799 | ! %f0 = ff000000 ff000000, %l2 = 00000000000000ff | |
11800 | ! Mem[0000000030041438] = ffffffe000000000 | |
11801 | add %i1,0x038,%g1 | |
11802 | stda %f0,[%g1+%l2]ASI_PST32_S ! Mem[0000000030041438] = ff000000ff000000 | |
11803 | ! Mem[00000000100c1408] = 00000000, %l2 = 00000000000000ff | |
11804 | swapa [%i3+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
11805 | ! %l1 = 00000000ffb6e09c, Mem[0000000030081400] = 00000000 | |
11806 | stwa %l1,[%i2+%g0]0x89 ! Mem[0000000030081400] = ffb6e09c | |
11807 | ! %l6 = 000000ff000000e7, Mem[0000000010081408] = ff000000 | |
11808 | stwa %l6,[%i2+%o4]0x80 ! Mem[0000000010081408] = 000000e7 | |
11809 | ! Mem[0000000030141408] = 000000ff, %l3 = 0000000000000000 | |
11810 | swapa [%i5+%o4]0x89,%l3 ! %l3 = 00000000000000ff | |
11811 | ! Mem[0000000020800041] = ffff9ffa, %l5 = 0000000000000000 | |
11812 | ldstub [%o1+0x041],%l5 ! %l5 = 000000ff000000ff | |
11813 | ! Mem[0000000030101408] = ff00d7ff, %l2 = 0000000000000000 | |
11814 | swapa [%i4+%o4]0x89,%l2 ! %l2 = 00000000ff00d7ff | |
11815 | ! %l2 = 00000000ff00d7ff, Mem[0000000030101408] = 00000000 | |
11816 | stha %l2,[%i4+%o4]0x81 ! Mem[0000000030101408] = d7ff0000 | |
11817 | ! Starting 10 instruction Load Burst | |
11818 | ! Mem[0000000010081438] = 00ff0000, %f26 = e0ade200 | |
11819 | ld [%i2+0x038],%f26 ! %f26 = 00ff0000 | |
11820 | ||
11821 | p0_label_267: | |
11822 | ! Mem[0000000030141408] = 0000000000000000, %l4 = 000000000000ffff | |
11823 | ldxa [%i5+%o4]0x81,%l4 ! %l4 = 0000000000000000 | |
11824 | ! Mem[0000000030001408] = 00000000, %l3 = 00000000000000ff | |
11825 | ldsha [%i0+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
11826 | ! Mem[0000000010081400] = 000000ff d81a5b92, %l0 = ff000000, %l1 = ffb6e09c | |
11827 | ldda [%i2+%g0]0x80,%l0 ! %l0 = 00000000000000ff 00000000d81a5b92 | |
11828 | ! Mem[0000000030081410] = ff000000, %l4 = 0000000000000000 | |
11829 | lduha [%i2+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
11830 | ! Mem[00000000300c1410] = 5e9e115700000000, %f22 = e76e87d9 8b570000 | |
11831 | ldda [%i3+%o5]0x81,%f22 ! %f22 = 5e9e1157 00000000 | |
11832 | ! Mem[000000001018143c] = 032cff8e, %l0 = 00000000000000ff | |
11833 | ldsb [%i6+0x03d],%l0 ! %l0 = 000000000000002c | |
11834 | ! Mem[0000000010101438] = 5e27ffff, %l3 = 0000000000000000 | |
11835 | lduba [%i4+0x039]%asi,%l3 ! %l3 = 0000000000000027 | |
11836 | ! Mem[0000000030001400] = 00000057, %f30 = 1a7a0000 | |
11837 | lda [%i0+%g0]0x81,%f30 ! %f30 = 00000057 | |
11838 | ! Mem[0000000010001408] = 000000ff, %l6 = 000000ff000000e7 | |
11839 | lduwa [%i0+%o4]0x88,%l6 ! %l6 = 00000000000000ff | |
11840 | ! Starting 10 instruction Store Burst | |
11841 | ! Mem[0000000010101400] = ffffffff, %l0 = 000000000000002c | |
11842 | swapa [%i4+%g0]0x80,%l0 ! %l0 = 00000000ffffffff | |
11843 | ||
11844 | p0_label_268: | |
11845 | ! %f12 = 8ab6e09c, Mem[00000000100c1410] = 000000e7 | |
11846 | sta %f12,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 8ab6e09c | |
11847 | ! %f30 = 00000057 0000ff00, %l5 = 00000000000000ff | |
11848 | ! Mem[0000000010101418] = ff000000ffffffff | |
11849 | add %i4,0x018,%g1 | |
11850 | stda %f30,[%g1+%l5]ASI_PST16_PL ! Mem[0000000010101418] = 00ff000057000000 | |
11851 | ! Mem[0000000020800000] = 5f060db6, %l0 = 00000000ffffffff | |
11852 | ldstuba [%o1+0x000]%asi,%l0 ! %l0 = 0000005f000000ff | |
11853 | ! %l7 = 000000000000003b, Mem[0000000030101400] = 003bade0 | |
11854 | stba %l7,[%i4+%g0]0x81 ! Mem[0000000030101400] = 3b3bade0 | |
11855 | ! Mem[0000000010001408] = 000000ff, %l6 = 00000000000000ff | |
11856 | ldstuba [%i0+%o4]0x88,%l6 ! %l6 = 000000ff000000ff | |
11857 | ! %l7 = 000000000000003b, Mem[0000000010101400] = ffffffff2c000000 | |
11858 | stxa %l7,[%i4+%g0]0x88 ! Mem[0000000010101400] = 000000000000003b | |
11859 | ! Mem[0000000030001410] = 000000d8, %l6 = 00000000000000ff | |
11860 | ldstuba [%i0+%o5]0x89,%l6 ! %l6 = 000000d8000000ff | |
11861 | ! %l2 = ff00d7ff, %l3 = 00000027, Mem[0000000010001400] = 0000003b e76e87d9 | |
11862 | stda %l2,[%i0+%g0]0x88 ! Mem[0000000010001400] = ff00d7ff 00000027 | |
11863 | ! %l2 = 00000000ff00d7ff, Mem[0000000010081410] = ffffffff | |
11864 | stha %l2,[%i2+%o5]0x88 ! Mem[0000000010081410] = ffffd7ff | |
11865 | ! Starting 10 instruction Load Burst | |
11866 | ! Mem[0000000010181410] = 000000ff, %l6 = 00000000000000d8 | |
11867 | ldsba [%i6+%o5]0x88,%l6 ! %l6 = ffffffffffffffff | |
11868 | ||
11869 | p0_label_269: | |
11870 | ! Mem[0000000030001400] = 57000000, %l0 = 000000000000005f | |
11871 | lduwa [%i0+%g0]0x89,%l0 ! %l0 = 0000000057000000 | |
11872 | ! Mem[0000000030141408] = 00000000, %l3 = 0000000000000027 | |
11873 | ldsba [%i5+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
11874 | ! Mem[0000000010141410] = 3b000000, %l3 = 0000000000000000 | |
11875 | lduwa [%i5+%o5]0x88,%l3 ! %l3 = 000000003b000000 | |
11876 | ! Mem[0000000030081410] = 000000ff, %l7 = 000000000000003b | |
11877 | lduba [%i2+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
11878 | ! Mem[0000000010081410] = ffd7ffff, %l6 = ffffffffffffffff | |
11879 | ldsba [%i2+%o5]0x80,%l6 ! %l6 = ffffffffffffffff | |
11880 | ! Mem[0000000010101408] = e7000000, %l4 = 0000000000000000 | |
11881 | lduba [%i4+0x009]%asi,%l4 ! %l4 = 0000000000000000 | |
11882 | ! Mem[0000000010081400] = 000000ff d81a5b92, %l4 = 00000000, %l5 = 000000ff | |
11883 | ldda [%i2+%g0]0x80,%l4 ! %l4 = 00000000000000ff 00000000d81a5b92 | |
11884 | ! Mem[0000000010101400] = 3b000000, %l1 = 00000000d81a5b92 | |
11885 | ldsha [%i4+%g0]0x80,%l1 ! %l1 = 0000000000003b00 | |
11886 | ! Mem[0000000010041410] = ffffffffffffffff, %f12 = 8ab6e09c 1aff100f | |
11887 | ldda [%i1+%o5]0x88,%f12 ! %f12 = ffffffff ffffffff | |
11888 | ! Starting 10 instruction Store Burst | |
11889 | ! %f22 = 5e9e1157, Mem[0000000010181410] = ff000000 | |
11890 | sta %f22,[%i6+%o5]0x80 ! Mem[0000000010181410] = 5e9e1157 | |
11891 | ||
11892 | p0_label_270: | |
11893 | ! Mem[0000000030141408] = 00000000, %l4 = 00000000000000ff | |
11894 | ldstuba [%i5+%o4]0x81,%l4 ! %l4 = 00000000000000ff | |
11895 | ! %l1 = 0000000000003b00, Mem[0000000010101408] = e7000000 | |
11896 | stwa %l1,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00003b00 | |
11897 | ! %l2 = ff00d7ff, %l3 = 3b000000, Mem[00000000100c1410] = 9ce0b68a ff000000 | |
11898 | stda %l2,[%i3+%o5]0x80 ! Mem[00000000100c1410] = ff00d7ff 3b000000 | |
11899 | ! Mem[000000001018141c] = 000000d7, %l5 = 00000000d81a5b92, %asi = 80 | |
11900 | swapa [%i6+0x01c]%asi,%l5 ! %l5 = 00000000000000d7 | |
11901 | ! Mem[0000000030101410] = 39aced3b, %l0 = 0000000057000000 | |
11902 | ldstuba [%i4+%o5]0x81,%l0 ! %l0 = 00000039000000ff | |
11903 | ! %l2 = 00000000ff00d7ff, Mem[0000000010141410] = 0000003b000000ff, %asi = 80 | |
11904 | stxa %l2,[%i5+0x010]%asi ! Mem[0000000010141410] = 00000000ff00d7ff | |
11905 | ! %l4 = 0000000000000000, Mem[0000000010181400] = 000000ff39aced3b | |
11906 | stxa %l4,[%i6+%g0]0x88 ! Mem[0000000010181400] = 0000000000000000 | |
11907 | ! Mem[0000000010141400] = 000000ff0000ffff, %l1 = 0000000000003b00, %l3 = 000000003b000000 | |
11908 | casxa [%i5]0x80,%l1,%l3 ! %l3 = 000000ff0000ffff | |
11909 | ! %f28 = ffffffe0 1aff100f, Mem[0000000030041400] = ffffffff ff000000 | |
11910 | stda %f28,[%i1+%g0]0x89 ! Mem[0000000030041400] = ffffffe0 1aff100f | |
11911 | ! Starting 10 instruction Load Burst | |
11912 | ! Mem[0000000021800180] = e2ffdb07, %l1 = 0000000000003b00 | |
11913 | lduh [%o3+0x180],%l1 ! %l1 = 000000000000e2ff | |
11914 | ||
11915 | ! Check Point 54 for processor 0 | |
11916 | ||
11917 | set p0_check_pt_data_54,%g4 | |
11918 | rd %ccr,%g5 ! %g5 = 44 | |
11919 | ldx [%g4+0x08],%g2 | |
11920 | cmp %l0,%g2 ! %l0 = 0000000000000039 | |
11921 | bne %xcc,p0_reg_check_fail0 | |
11922 | mov 0xee0,%g1 | |
11923 | ldx [%g4+0x10],%g2 | |
11924 | cmp %l1,%g2 ! %l1 = 000000000000e2ff | |
11925 | bne %xcc,p0_reg_check_fail1 | |
11926 | mov 0xee1,%g1 | |
11927 | ldx [%g4+0x18],%g2 | |
11928 | cmp %l3,%g2 ! %l3 = 000000ff0000ffff | |
11929 | bne %xcc,p0_reg_check_fail3 | |
11930 | mov 0xee3,%g1 | |
11931 | ldx [%g4+0x20],%g2 | |
11932 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
11933 | bne %xcc,p0_reg_check_fail4 | |
11934 | mov 0xee4,%g1 | |
11935 | ldx [%g4+0x28],%g2 | |
11936 | cmp %l5,%g2 ! %l5 = 00000000000000d7 | |
11937 | bne %xcc,p0_reg_check_fail5 | |
11938 | mov 0xee5,%g1 | |
11939 | ldx [%g4+0x30],%g2 | |
11940 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
11941 | bne %xcc,p0_reg_check_fail6 | |
11942 | mov 0xee6,%g1 | |
11943 | ldx [%g4+0x38],%g2 | |
11944 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
11945 | bne %xcc,p0_reg_check_fail7 | |
11946 | mov 0xee7,%g1 | |
11947 | ldx [%g4+0x40],%g3 | |
11948 | std %f0,[%g4] | |
11949 | ldx [%g4],%g2 | |
11950 | cmp %g3,%g2 ! %f0 = ff000000 ff000000 | |
11951 | bne %xcc,p0_freg_check_fail | |
11952 | mov 0xf00,%g1 | |
11953 | ldx [%g4+0x48],%g3 | |
11954 | std %f4,[%g4] | |
11955 | ldx [%g4],%g2 | |
11956 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
11957 | bne %xcc,p0_freg_check_fail | |
11958 | mov 0xf04,%g1 | |
11959 | ldx [%g4+0x50],%g3 | |
11960 | std %f12,[%g4] | |
11961 | ldx [%g4],%g2 | |
11962 | cmp %g3,%g2 ! %f12 = ffffffff ffffffff | |
11963 | bne %xcc,p0_freg_check_fail | |
11964 | mov 0xf12,%g1 | |
11965 | ldx [%g4+0x58],%g3 | |
11966 | std %f22,[%g4] | |
11967 | ldx [%g4],%g2 | |
11968 | cmp %g3,%g2 ! %f22 = 5e9e1157 00000000 | |
11969 | bne %xcc,p0_freg_check_fail | |
11970 | mov 0xf22,%g1 | |
11971 | ldx [%g4+0x60],%g3 | |
11972 | std %f26,[%g4] | |
11973 | ldx [%g4],%g2 | |
11974 | cmp %g3,%g2 ! %f26 = 00ff0000 00000000 | |
11975 | bne %xcc,p0_freg_check_fail | |
11976 | mov 0xf26,%g1 | |
11977 | ldx [%g4+0x68],%g3 | |
11978 | std %f30,[%g4] | |
11979 | ldx [%g4],%g2 | |
11980 | cmp %g3,%g2 ! %f30 = 00000057 0000ff00 | |
11981 | bne %xcc,p0_freg_check_fail | |
11982 | mov 0xf30,%g1 | |
11983 | ||
11984 | ! Check Point 54 completed | |
11985 | ||
11986 | ||
11987 | p0_label_271: | |
11988 | ! Mem[0000000010001430] = 0f10ff1ae0ffffff, %f10 = 39aced3b 8ab6e09c | |
11989 | ldda [%i0+0x030]%asi,%f10 ! %f10 = 0f10ff1a e0ffffff | |
11990 | ! Mem[0000000010001410] = 00000000, %f0 = ff000000 | |
11991 | lda [%i0+%o5]0x88,%f0 ! %f0 = 00000000 | |
11992 | ! Mem[0000000010081408] = 00000000 e7000000, %l2 = ff00d7ff, %l3 = 0000ffff | |
11993 | ldda [%i2+%o4]0x88,%l2 ! %l2 = 00000000e7000000 0000000000000000 | |
11994 | ! Mem[00000000100c1408] = 1a008d0aff000000, %f24 = ff000000 8ab6e09c | |
11995 | ldda [%i3+%o4]0x88,%f24 ! %f24 = 1a008d0a ff000000 | |
11996 | ! Mem[0000000010081404] = d81a5b92, %l7 = 0000000000000000 | |
11997 | ldub [%i2+0x006],%l7 ! %l7 = 000000000000005b | |
11998 | ! Mem[000000001014143c] = ffffffff, %l0 = 0000000000000039 | |
11999 | ldsb [%i5+0x03f],%l0 ! %l0 = ffffffffffffffff | |
12000 | ! Mem[0000000030101400] = e0ad3b3b, %l5 = 00000000000000d7 | |
12001 | ldsba [%i4+%g0]0x89,%l5 ! %l5 = 000000000000003b | |
12002 | ! Mem[0000000010081400] = 000000ff, %l3 = 0000000000000000 | |
12003 | lduha [%i2+0x000]%asi,%l3 ! %l3 = 0000000000000000 | |
12004 | ! Mem[0000000010181418] = 5e9e1157, %l5 = 000000000000003b | |
12005 | ldsha [%i6+0x01a]%asi,%l5 ! %l5 = 0000000000001157 | |
12006 | ! Starting 10 instruction Store Burst | |
12007 | ! %f17 = 00000000, Mem[0000000010181434] = 00000000 | |
12008 | st %f17,[%i6+0x034] ! Mem[0000000010181434] = 00000000 | |
12009 | ||
12010 | p0_label_272: | |
12011 | ! %l2 = 00000000e7000000, Mem[0000000030181410] = 00000000 | |
12012 | stwa %l2,[%i6+%o5]0x81 ! Mem[0000000030181410] = e7000000 | |
12013 | ! %l3 = 0000000000000000, Mem[0000000010001400] = 00000027ff00d7ff | |
12014 | stxa %l3,[%i0+%g0]0x88 ! Mem[0000000010001400] = 0000000000000000 | |
12015 | ! Mem[00000000300c1408] = 000000e7, %l2 = 00000000e7000000 | |
12016 | ldstuba [%i3+%o4]0x89,%l2 ! %l2 = 000000e7000000ff | |
12017 | ! Mem[0000000010141408] = 00000000, %l4 = 0000000000000000 | |
12018 | swapa [%i5+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
12019 | ! %l2 = 00000000000000e7, Mem[0000000030101400] = 00000000e0ad3b3b | |
12020 | stxa %l2,[%i4+%g0]0x89 ! Mem[0000000030101400] = 00000000000000e7 | |
12021 | ! Mem[0000000010041410] = ffffffff, %l6 = ffffffffffffffff | |
12022 | ldstuba [%i1+%o5]0x80,%l6 ! %l6 = 000000ff000000ff | |
12023 | ! %l5 = 0000000000001157, Mem[0000000010001421] = 000000ff | |
12024 | stb %l5,[%i0+0x021] ! Mem[0000000010001420] = 005700ff | |
12025 | ! Mem[0000000021800040] = 87ff5e5c, %l2 = 00000000000000e7 | |
12026 | ldstub [%o3+0x040],%l2 ! %l2 = 00000087000000ff | |
12027 | ! %l7 = 000000000000005b, Mem[0000000010001400] = 0000000000000000 | |
12028 | stxa %l7,[%i0+%g0]0x88 ! Mem[0000000010001400] = 000000000000005b | |
12029 | ! Starting 10 instruction Load Burst | |
12030 | ! Mem[0000000010181438] = ffffffff, %l4 = 0000000000000000 | |
12031 | lduha [%i6+0x038]%asi,%l4 ! %l4 = 000000000000ffff | |
12032 | ||
12033 | p0_label_273: | |
12034 | ! Mem[0000000010101400] = 0000003b, %l3 = 0000000000000000 | |
12035 | ldswa [%i4+%g0]0x88,%l3 ! %l3 = 000000000000003b | |
12036 | ! Mem[0000000010041408] = ff0000000000ffff, %f18 = 00000000 000000ff | |
12037 | ldda [%i1+%o4]0x88,%f18 ! %f18 = ff000000 0000ffff | |
12038 | ! Mem[0000000010141400] = ff000000, %l2 = 0000000000000087 | |
12039 | ldsba [%i5+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
12040 | ! Mem[0000000010141400] = 000000ff, %l7 = 000000000000005b | |
12041 | lduba [%i5+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
12042 | ! Mem[00000000100c1424] = d81a5b92, %l5 = 0000000000001157 | |
12043 | lduha [%i3+0x024]%asi,%l5 ! %l5 = 000000000000d81a | |
12044 | ! Mem[000000001014142c] = bb9180c7, %f24 = 1a008d0a | |
12045 | lda [%i5+0x02c]%asi,%f24 ! %f24 = bb9180c7 | |
12046 | ! Mem[0000000030081400] = 9ce0b6ffffe20000, %f10 = 0f10ff1a e0ffffff | |
12047 | ldda [%i2+%g0]0x81,%f10 ! %f10 = 9ce0b6ff ffe20000 | |
12048 | ! Mem[0000000010181410] = 5e9e1157, %l6 = 00000000000000ff | |
12049 | lduha [%i6+%o5]0x80,%l6 ! %l6 = 0000000000005e9e | |
12050 | ! Mem[0000000010181408] = 00000000, %l3 = 000000000000003b | |
12051 | lduwa [%i6+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
12052 | ! Starting 10 instruction Store Burst | |
12053 | ! %l3 = 0000000000000000, Mem[0000000010101410] = 00000000 | |
12054 | stha %l3,[%i4+%o5]0x88 ! Mem[0000000010101410] = 00000000 | |
12055 | ||
12056 | p0_label_274: | |
12057 | ! %l4 = 000000000000ffff, Mem[0000000010001429] = 00000000, %asi = 80 | |
12058 | stba %l4,[%i0+0x029]%asi ! Mem[0000000010001428] = 00ff0000 | |
12059 | ! %l6 = 0000000000005e9e, Mem[0000000010101408] = 000000ff003b0000 | |
12060 | stxa %l6,[%i4+%o4]0x88 ! Mem[0000000010101408] = 0000000000005e9e | |
12061 | ! Mem[0000000010001400] = 0000005b, %l2 = 0000000000000000 | |
12062 | swapa [%i0+%g0]0x88,%l2 ! %l2 = 000000000000005b | |
12063 | ! %f16 = 9ce0b68a 00000000 ff000000 0000ffff | |
12064 | ! %f20 = 000000e7 ffffffff 5e9e1157 00000000 | |
12065 | ! %f24 = bb9180c7 ff000000 00ff0000 00000000 | |
12066 | ! %f28 = ffffffe0 1aff100f 00000057 0000ff00 | |
12067 | stda %f16,[%i0]ASI_COMMIT_S ! Block Store to 0000000030001400 | |
12068 | ! Mem[0000000010081408] = 000000e7, %l6 = 0000000000005e9e | |
12069 | ldstuba [%i2+%o4]0x80,%l6 ! %l6 = 00000000000000ff | |
12070 | ! %l4 = 000000000000ffff, Mem[0000000030081400] = 9ce0b6ff | |
12071 | stha %l4,[%i2+%g0]0x81 ! Mem[0000000030081400] = ffffb6ff | |
12072 | ! Mem[0000000010041410] = ffffffff, %l3 = 0000000000000000 | |
12073 | swapa [%i1+%o5]0x88,%l3 ! %l3 = 00000000ffffffff | |
12074 | ! %l4 = 000000000000ffff, Mem[0000000010081410] = ffffd7ff | |
12075 | stba %l4,[%i2+%o5]0x88 ! Mem[0000000010081410] = ffffd7ff | |
12076 | ! %f0 = 00000000 ff000000, Mem[0000000010141408] = 00000000 00000000 | |
12077 | stda %f0 ,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000000 ff000000 | |
12078 | ! Starting 10 instruction Load Burst | |
12079 | membar #Sync ! Added by membar checker (68) | |
12080 | ! Mem[0000000010001400] = 00000000, %l7 = 0000000000000000 | |
12081 | ldsha [%i0+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
12082 | ||
12083 | p0_label_275: | |
12084 | ! Mem[0000000030081400] = ffffb6ffffe20000, %f2 = ffff0000 000000ff | |
12085 | ldda [%i2+%g0]0x81,%f2 ! %f2 = ffffb6ff ffe20000 | |
12086 | ! Mem[0000000030181410] = e700000000000057, %f18 = ff000000 0000ffff | |
12087 | ldda [%i6+%o5]0x81,%f18 ! %f18 = e7000000 00000057 | |
12088 | ! Mem[0000000010041400] = 000000ff, %f18 = e7000000 | |
12089 | lda [%i1+%g0]0x88,%f18 ! %f18 = 000000ff | |
12090 | ! Mem[0000000010181408] = 00000000, %l1 = 000000000000e2ff | |
12091 | ldsha [%i6+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
12092 | ! Mem[0000000010081408] = ff0000e7, %l1 = 0000000000000000 | |
12093 | lduha [%i2+0x008]%asi,%l1 ! %l1 = 000000000000ff00 | |
12094 | ! Mem[0000000010181410] = 5e9e1157, %l1 = 000000000000ff00 | |
12095 | lduha [%i6+%o5]0x80,%l1 ! %l1 = 0000000000005e9e | |
12096 | ! Mem[0000000010041410] = ffffffff 00000000, %l2 = 0000005b, %l3 = ffffffff | |
12097 | ldda [%i1+%o5]0x88,%l2 ! %l2 = 0000000000000000 00000000ffffffff | |
12098 | ! Mem[0000000030141408] = ff00000000000000, %f10 = 9ce0b6ff ffe20000 | |
12099 | ldda [%i5+%o4]0x81,%f10 ! %f10 = ff000000 00000000 | |
12100 | ! Mem[0000000030081408] = 0a8d001a 000000ff, %l0 = ffffffff, %l1 = 00005e9e | |
12101 | ldda [%i2+%o4]0x89,%l0 ! %l0 = 00000000000000ff 000000000a8d001a | |
12102 | ! Starting 10 instruction Store Burst | |
12103 | ! Mem[0000000021800100] = ffff39e7, %l1 = 000000000a8d001a | |
12104 | ldstub [%o3+0x100],%l1 ! %l1 = 000000ff000000ff | |
12105 | ||
12106 | ! Check Point 55 for processor 0 | |
12107 | ||
12108 | set p0_check_pt_data_55,%g4 | |
12109 | rd %ccr,%g5 ! %g5 = 44 | |
12110 | ldx [%g4+0x08],%g2 | |
12111 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
12112 | bne %xcc,p0_reg_check_fail0 | |
12113 | mov 0xee0,%g1 | |
12114 | ldx [%g4+0x10],%g2 | |
12115 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
12116 | bne %xcc,p0_reg_check_fail1 | |
12117 | mov 0xee1,%g1 | |
12118 | ldx [%g4+0x18],%g2 | |
12119 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
12120 | bne %xcc,p0_reg_check_fail2 | |
12121 | mov 0xee2,%g1 | |
12122 | ldx [%g4+0x20],%g2 | |
12123 | cmp %l3,%g2 ! %l3 = 00000000ffffffff | |
12124 | bne %xcc,p0_reg_check_fail3 | |
12125 | mov 0xee3,%g1 | |
12126 | ldx [%g4+0x28],%g2 | |
12127 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
12128 | bne %xcc,p0_reg_check_fail4 | |
12129 | mov 0xee4,%g1 | |
12130 | ldx [%g4+0x30],%g2 | |
12131 | cmp %l5,%g2 ! %l5 = 000000000000d81a | |
12132 | bne %xcc,p0_reg_check_fail5 | |
12133 | mov 0xee5,%g1 | |
12134 | ldx [%g4+0x38],%g2 | |
12135 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
12136 | bne %xcc,p0_reg_check_fail6 | |
12137 | mov 0xee6,%g1 | |
12138 | ldx [%g4+0x40],%g2 | |
12139 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
12140 | bne %xcc,p0_reg_check_fail7 | |
12141 | mov 0xee7,%g1 | |
12142 | ldx [%g4+0x48],%g3 | |
12143 | std %f0,[%g4] | |
12144 | ldx [%g4],%g2 | |
12145 | cmp %g3,%g2 ! %f0 = 00000000 ff000000 | |
12146 | bne %xcc,p0_freg_check_fail | |
12147 | mov 0xf00,%g1 | |
12148 | ldx [%g4+0x50],%g3 | |
12149 | std %f2,[%g4] | |
12150 | ldx [%g4],%g2 | |
12151 | cmp %g3,%g2 ! %f2 = ffffb6ff ffe20000 | |
12152 | bne %xcc,p0_freg_check_fail | |
12153 | mov 0xf02,%g1 | |
12154 | ldx [%g4+0x58],%g3 | |
12155 | std %f10,[%g4] | |
12156 | ldx [%g4],%g2 | |
12157 | cmp %g3,%g2 ! %f10 = ff000000 00000000 | |
12158 | bne %xcc,p0_freg_check_fail | |
12159 | mov 0xf10,%g1 | |
12160 | ldx [%g4+0x60],%g3 | |
12161 | std %f18,[%g4] | |
12162 | ldx [%g4],%g2 | |
12163 | cmp %g3,%g2 ! %f18 = 000000ff 00000057 | |
12164 | bne %xcc,p0_freg_check_fail | |
12165 | mov 0xf18,%g1 | |
12166 | ldx [%g4+0x68],%g3 | |
12167 | std %f24,[%g4] | |
12168 | ldx [%g4],%g2 | |
12169 | cmp %g3,%g2 ! %f24 = bb9180c7 ff000000 | |
12170 | bne %xcc,p0_freg_check_fail | |
12171 | mov 0xf24,%g1 | |
12172 | ||
12173 | ! Check Point 55 completed | |
12174 | ||
12175 | ||
12176 | p0_label_276: | |
12177 | ! Mem[00000000300c1410] = 5e9e1157, %l4 = 000000000000ffff | |
12178 | ldstuba [%i3+%o5]0x81,%l4 ! %l4 = 0000005e000000ff | |
12179 | ! %l3 = 00000000ffffffff, Mem[0000000030081408] = 000000ff | |
12180 | stwa %l3,[%i2+%o4]0x89 ! Mem[0000000030081408] = ffffffff | |
12181 | ! %l4 = 000000000000005e, Mem[0000000010001408] = ff000000ffffffff | |
12182 | stxa %l4,[%i0+%o4]0x80 ! Mem[0000000010001408] = 000000000000005e | |
12183 | ! Mem[0000000010081433] = 0f10ff1a, %l3 = 00000000ffffffff | |
12184 | ldstub [%i2+0x033],%l3 ! %l3 = 0000001a000000ff | |
12185 | ! %f0 = 00000000 ff000000 ffffb6ff ffe20000 | |
12186 | ! %f4 = ffffffff ffffffff ffffffff 57119e5e | |
12187 | ! %f8 = ffffffb4 0000005e ff000000 00000000 | |
12188 | ! %f12 = ffffffff ffffffff cd10ffc4 e46dee46 | |
12189 | stda %f0,[%i0]ASI_BLK_AIUSL ! Block Store to 0000000030001400 | |
12190 | ! %l6 = 00000000, %l7 = 00000000, Mem[0000000010081428] = 00000000 00e2ade0 | |
12191 | std %l6,[%i2+0x028] ! Mem[0000000010081428] = 00000000 00000000 | |
12192 | ! Mem[0000000010041410] = 00000000, %l7 = 0000000000000000 | |
12193 | ldstuba [%i1+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
12194 | ! %l4 = 000000000000005e, Mem[0000000010181410] = 5e9e1157 | |
12195 | stha %l4,[%i6+%o5]0x80 ! Mem[0000000010181410] = 005e1157 | |
12196 | membar #Sync ! Added by membar checker (69) | |
12197 | ! Mem[0000000010001420] = 005700ffff000000, %l2 = 0000000000000000, %l7 = 0000000000000000 | |
12198 | add %i0,0x20,%g1 | |
12199 | casxa [%g1]0x80,%l2,%l7 ! %l7 = 005700ffff000000 | |
12200 | ! Starting 10 instruction Load Burst | |
12201 | ! Mem[0000000010001400] = 0000000000000000, %l5 = 000000000000d81a | |
12202 | ldxa [%i0+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
12203 | ||
12204 | p0_label_277: | |
12205 | ! Mem[0000000010041400] = 000000ff, %l2 = 0000000000000000 | |
12206 | ldswa [%i1+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
12207 | ! Mem[0000000010141400] = ff000000, %l2 = 00000000000000ff | |
12208 | lduba [%i5+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
12209 | ! Mem[0000000030001410] = ffffffff, %l6 = 0000000000000000 | |
12210 | lduwa [%i0+%o5]0x89,%l6 ! %l6 = 00000000ffffffff | |
12211 | ! Mem[0000000010001400] = 00000000, %f28 = ffffffe0 | |
12212 | lda [%i0+%g0]0x88,%f28 ! %f28 = 00000000 | |
12213 | ! Mem[00000000100c1414] = 3b000000, %l5 = 0000000000000000 | |
12214 | ldsha [%i3+0x016]%asi,%l5 ! %l5 = 0000000000000000 | |
12215 | ! Mem[000000001008140c] = 00000000, %l2 = 0000000000000000 | |
12216 | lduba [%i2+0x00c]%asi,%l2 ! %l2 = 0000000000000000 | |
12217 | ! Mem[0000000010181408] = 00000000, %l0 = 00000000000000ff | |
12218 | ldsba [%i6+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
12219 | ! Mem[0000000010101410] = 7a00000000000000, %f16 = 9ce0b68a 00000000 | |
12220 | ldda [%i4+%o5]0x88,%f16 ! %f16 = 7a000000 00000000 | |
12221 | ! Mem[0000000030141408] = ff000000, %l6 = 00000000ffffffff | |
12222 | lduba [%i5+%o4]0x81,%l6 ! %l6 = 00000000000000ff | |
12223 | ! Starting 10 instruction Store Burst | |
12224 | ! %f24 = bb9180c7 ff000000, Mem[0000000030141408] = ff000000 00000000 | |
12225 | stda %f24,[%i5+%o4]0x81 ! Mem[0000000030141408] = bb9180c7 ff000000 | |
12226 | ||
12227 | p0_label_278: | |
12228 | ! %l3 = 000000000000001a, Mem[0000000030141400] = 0000000000000000 | |
12229 | stxa %l3,[%i5+%g0]0x81 ! Mem[0000000030141400] = 000000000000001a | |
12230 | ! Mem[0000000010081408] = ff0000e700000000, %l0 = 0000000000000000, %l3 = 000000000000001a | |
12231 | add %i2,0x08,%g1 | |
12232 | casxa [%g1]0x80,%l0,%l3 ! %l3 = ff0000e700000000 | |
12233 | ! %f21 = ffffffff, Mem[0000000010041410] = 000000ff | |
12234 | sta %f21,[%i1+%o5]0x88 ! Mem[0000000010041410] = ffffffff | |
12235 | ! %l5 = 0000000000000000, Mem[0000000030081410] = 000000ff | |
12236 | stba %l5,[%i2+%o5]0x81 ! Mem[0000000030081410] = 000000ff | |
12237 | ! %f30 = 00000057, Mem[0000000010001428] = 00ff0000 | |
12238 | sta %f30,[%i0+0x028]%asi ! Mem[0000000010001428] = 00000057 | |
12239 | ! Mem[0000000030001400] = ff000000, %l1 = 00000000000000ff | |
12240 | ldstuba [%i0+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
12241 | ! %l7 = 005700ffff000000, Mem[0000000010041434] = 1aff100f, %asi = 80 | |
12242 | stba %l7,[%i1+0x034]%asi ! Mem[0000000010041434] = 00ff100f | |
12243 | ! Mem[0000000010141408] = 000000ff, %l1 = 0000000000000000 | |
12244 | swapa [%i5+%o4]0x80,%l1 ! %l1 = 00000000000000ff | |
12245 | ! %l7 = 005700ffff000000, Mem[0000000010141408] = 00000000 | |
12246 | stba %l7,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000 | |
12247 | ! Starting 10 instruction Load Burst | |
12248 | ! Mem[0000000010181400] = 0000000000000000, %f22 = 5e9e1157 00000000 | |
12249 | ldda [%i6+%g0]0x80,%f22 ! %f22 = 00000000 00000000 | |
12250 | ||
12251 | p0_label_279: | |
12252 | ! Mem[0000000030001410] = ffffffff, %l1 = 00000000000000ff | |
12253 | lduha [%i0+%o5]0x81,%l1 ! %l1 = 000000000000ffff | |
12254 | ! Mem[000000001000140c] = 0000005e, %l0 = 0000000000000000 | |
12255 | ldub [%i0+0x00c],%l0 ! %l0 = 0000000000000000 | |
12256 | ! Mem[0000000010101400] = 0000003b, %f3 = ffe20000 | |
12257 | lda [%i4+%g0]0x88,%f3 ! %f3 = 0000003b | |
12258 | ! Mem[0000000010141400] = 000000ff, %l5 = 0000000000000000 | |
12259 | ldsba [%i5+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
12260 | ! Mem[00000000300c1408] = 000000ff, %f15 = e46dee46 | |
12261 | lda [%i3+%o4]0x89,%f15 ! %f15 = 000000ff | |
12262 | ! Mem[0000000010141400] = 000000ff, %l6 = 00000000000000ff | |
12263 | lduwa [%i5+%g0]0x80,%l6 ! %l6 = 00000000000000ff | |
12264 | ! Mem[0000000010001400] = 00000000, %l3 = ff0000e700000000 | |
12265 | lduha [%i0+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
12266 | ! Mem[0000000030041408] = 00ffff00ffffe46d, %l7 = 005700ffff000000 | |
12267 | ldxa [%i1+%o4]0x81,%l7 ! %l7 = 00ffff00ffffe46d | |
12268 | ! Mem[0000000030041400] = ffffffe01aff100f, %l7 = 00ffff00ffffe46d | |
12269 | ldxa [%i1+%g0]0x89,%l7 ! %l7 = ffffffe01aff100f | |
12270 | ! Starting 10 instruction Store Burst | |
12271 | ! Mem[0000000030181400] = ff0000ff, %l7 = ffffffe01aff100f | |
12272 | ldstuba [%i6+%g0]0x89,%l7 ! %l7 = 000000ff000000ff | |
12273 | ||
12274 | p0_label_280: | |
12275 | ! %l6 = 000000ff, %l7 = 000000ff, Mem[0000000030101400] = 000000e7 00000000 | |
12276 | stda %l6,[%i4+%g0]0x89 ! Mem[0000000030101400] = 000000ff 000000ff | |
12277 | ! %f26 = 00ff0000 00000000, %l2 = 0000000000000000 | |
12278 | ! Mem[0000000010001408] = 000000000000005e | |
12279 | add %i0,0x008,%g1 | |
12280 | stda %f26,[%g1+%l2]ASI_PST32_P ! Mem[0000000010001408] = 000000000000005e | |
12281 | ! %l2 = 0000000000000000, Mem[0000000010141434] = 365fffff, %asi = 80 | |
12282 | stwa %l2,[%i5+0x034]%asi ! Mem[0000000010141434] = 00000000 | |
12283 | ! Mem[0000000010181410] = 57115e00, %l7 = 00000000000000ff | |
12284 | lduwa [%i6+%o5]0x88,%l7 ! %l7 = 0000000057115e00 | |
12285 | ! Mem[0000000030081408] = ffffffff, %l1 = 000000000000ffff | |
12286 | swapa [%i2+%o4]0x89,%l1 ! %l1 = 00000000ffffffff | |
12287 | ! %l0 = 0000000000000000, Mem[00000000300c1410] = ff9e1157 | |
12288 | stha %l0,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 00001157 | |
12289 | ! %l3 = 0000000000000000, Mem[000000001010143e] = 00000000, %asi = 80 | |
12290 | stba %l3,[%i4+0x03e]%asi ! Mem[000000001010143c] = 00000000 | |
12291 | ! %f6 = ffffffff 57119e5e, Mem[0000000030001408] = ffe20000 ffffb6ff | |
12292 | stda %f6 ,[%i0+%o4]0x89 ! Mem[0000000030001408] = ffffffff 57119e5e | |
12293 | ! %l5 = 0000000000000000, Mem[0000000021800180] = e2ffdb07, %asi = 80 | |
12294 | stba %l5,[%o3+0x180]%asi ! Mem[0000000021800180] = 00ffdb07 | |
12295 | ! Starting 10 instruction Load Burst | |
12296 | ! Mem[00000000201c0000] = ffff1669, %l6 = 00000000000000ff | |
12297 | ldsha [%o0+0x000]%asi,%l6 ! %l6 = ffffffffffffffff | |
12298 | ||
12299 | ! Check Point 56 for processor 0 | |
12300 | ||
12301 | set p0_check_pt_data_56,%g4 | |
12302 | rd %ccr,%g5 ! %g5 = 44 | |
12303 | ldx [%g4+0x08],%g2 | |
12304 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
12305 | bne %xcc,p0_reg_check_fail0 | |
12306 | mov 0xee0,%g1 | |
12307 | ldx [%g4+0x10],%g2 | |
12308 | cmp %l1,%g2 ! %l1 = 00000000ffffffff | |
12309 | bne %xcc,p0_reg_check_fail1 | |
12310 | mov 0xee1,%g1 | |
12311 | ldx [%g4+0x18],%g2 | |
12312 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
12313 | bne %xcc,p0_reg_check_fail2 | |
12314 | mov 0xee2,%g1 | |
12315 | ldx [%g4+0x20],%g2 | |
12316 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
12317 | bne %xcc,p0_reg_check_fail3 | |
12318 | mov 0xee3,%g1 | |
12319 | ldx [%g4+0x28],%g2 | |
12320 | cmp %l4,%g2 ! %l4 = 000000000000005e | |
12321 | bne %xcc,p0_reg_check_fail4 | |
12322 | mov 0xee4,%g1 | |
12323 | ldx [%g4+0x30],%g2 | |
12324 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
12325 | bne %xcc,p0_reg_check_fail5 | |
12326 | mov 0xee5,%g1 | |
12327 | ldx [%g4+0x38],%g2 | |
12328 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
12329 | bne %xcc,p0_reg_check_fail6 | |
12330 | mov 0xee6,%g1 | |
12331 | ldx [%g4+0x40],%g2 | |
12332 | cmp %l7,%g2 ! %l7 = 0000000057115e00 | |
12333 | bne %xcc,p0_reg_check_fail7 | |
12334 | mov 0xee7,%g1 | |
12335 | ldx [%g4+0x48],%g3 | |
12336 | std %f2,[%g4] | |
12337 | ldx [%g4],%g2 | |
12338 | cmp %g3,%g2 ! %f2 = ffffb6ff 0000003b | |
12339 | bne %xcc,p0_freg_check_fail | |
12340 | mov 0xf02,%g1 | |
12341 | ldx [%g4+0x50],%g3 | |
12342 | std %f14,[%g4] | |
12343 | ldx [%g4],%g2 | |
12344 | cmp %g3,%g2 ! %f14 = cd10ffc4 000000ff | |
12345 | bne %xcc,p0_freg_check_fail | |
12346 | mov 0xf14,%g1 | |
12347 | ldx [%g4+0x58],%g3 | |
12348 | std %f16,[%g4] | |
12349 | ldx [%g4],%g2 | |
12350 | cmp %g3,%g2 ! %f16 = 7a000000 00000000 | |
12351 | bne %xcc,p0_freg_check_fail | |
12352 | mov 0xf16,%g1 | |
12353 | ldx [%g4+0x60],%g3 | |
12354 | std %f22,[%g4] | |
12355 | ldx [%g4],%g2 | |
12356 | cmp %g3,%g2 ! %f22 = 00000000 00000000 | |
12357 | bne %xcc,p0_freg_check_fail | |
12358 | mov 0xf22,%g1 | |
12359 | ldx [%g4+0x68],%g3 | |
12360 | std %f28,[%g4] | |
12361 | ldx [%g4],%g2 | |
12362 | cmp %g3,%g2 ! %f28 = 00000000 1aff100f | |
12363 | bne %xcc,p0_freg_check_fail | |
12364 | mov 0xf28,%g1 | |
12365 | ||
12366 | ! Check Point 56 completed | |
12367 | ||
12368 | ||
12369 | p0_label_281: | |
12370 | ! Mem[0000000030041400] = 1aff100f, %l0 = 0000000000000000 | |
12371 | ldsba [%i1+%g0]0x89,%l0 ! %l0 = 000000000000000f | |
12372 | ! Mem[00000000100c1408] = 000000ff, %l5 = 0000000000000000 | |
12373 | lduha [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
12374 | ! Mem[0000000030001410] = ffffffff, %l6 = ffffffffffffffff | |
12375 | lduwa [%i0+%o5]0x89,%l6 ! %l6 = 00000000ffffffff | |
12376 | ! Mem[0000000020800040] = ffff9ffa, %l2 = 0000000000000000 | |
12377 | ldub [%o1+0x040],%l2 ! %l2 = 00000000000000ff | |
12378 | ! Mem[0000000030101408] = d7ff0000000000ff, %f2 = ffffb6ff 0000003b | |
12379 | ldda [%i4+%o4]0x81,%f2 ! %f2 = d7ff0000 000000ff | |
12380 | ! Mem[0000000010001408] = 000000000000005e, %l7 = 0000000057115e00 | |
12381 | ldxa [%i0+%o4]0x80,%l7 ! %l7 = 000000000000005e | |
12382 | ! Mem[0000000030041410] = 3b000000, %l2 = 00000000000000ff | |
12383 | ldsba [%i1+%o5]0x81,%l2 ! %l2 = 000000000000003b | |
12384 | ! Mem[0000000030101408] = d7ff0000, %l0 = 000000000000000f | |
12385 | ldswa [%i4+%o4]0x81,%l0 ! %l0 = ffffffffd7ff0000 | |
12386 | ! Mem[0000000010101408] = 00005e9e, %l4 = 000000000000005e | |
12387 | lduwa [%i4+%o4]0x88,%l4 ! %l4 = 0000000000005e9e | |
12388 | ! Starting 10 instruction Store Burst | |
12389 | ! %f6 = ffffffff 57119e5e, %l3 = 0000000000000000 | |
12390 | ! Mem[0000000030101400] = ff000000ff000000 | |
12391 | stda %f6,[%i4+%l3]ASI_PST32_SL ! Mem[0000000030101400] = ff000000ff000000 | |
12392 | ||
12393 | p0_label_282: | |
12394 | ! %l4 = 00005e9e, %l5 = 00000000, Mem[0000000030081410] = 000000ff 9ce0b6ff | |
12395 | stda %l4,[%i2+%o5]0x81 ! Mem[0000000030081410] = 00005e9e 00000000 | |
12396 | ! %l0 = d7ff0000, %l1 = ffffffff, Mem[0000000030041410] = 3b000000 ff000000 | |
12397 | stda %l0,[%i1+%o5]0x81 ! Mem[0000000030041410] = d7ff0000 ffffffff | |
12398 | ! %f25 = ff000000, Mem[0000000010141428] = 64479a75 | |
12399 | sta %f25,[%i5+0x028]%asi ! Mem[0000000010141428] = ff000000 | |
12400 | ! Mem[0000000010181414] = 00000000, %l6 = 00000000ffffffff | |
12401 | ldstuba [%i6+0x014]%asi,%l6 ! %l6 = 00000000000000ff | |
12402 | ! Mem[0000000010181400] = 00000000, %l5 = 0000000000000000 | |
12403 | ldstuba [%i6+0x000]%asi,%l5 ! %l5 = 00000000000000ff | |
12404 | ! Mem[0000000010181408] = 00000000, %l5 = 0000000000000000 | |
12405 | swapa [%i6+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
12406 | ! %l2 = 000000000000003b, Mem[0000000030101400] = ff000000 | |
12407 | stwa %l2,[%i4+%g0]0x81 ! Mem[0000000030101400] = 0000003b | |
12408 | ! %l3 = 0000000000000000, %l4 = 0000000000005e9e, %y = 00000000 | |
12409 | smul %l3,%l4,%l1 ! %l1 = 0000000000000000, %y = 00000000 | |
12410 | ! Mem[0000000010001400] = 00000000, %l2 = 000000000000003b | |
12411 | ldstuba [%i0+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
12412 | ! Starting 10 instruction Load Burst | |
12413 | ! Mem[0000000010001400] = 000000ff, %l6 = 0000000000000000 | |
12414 | ldswa [%i0+%g0]0x88,%l6 ! %l6 = 00000000000000ff | |
12415 | ||
12416 | p0_label_283: | |
12417 | ! Mem[0000000030181400] = ff0000ff, %l2 = 0000000000000000 | |
12418 | ldsha [%i6+%g0]0x81,%l2 ! %l2 = ffffffffffffff00 | |
12419 | ! Mem[0000000030181408] = 000000ff, %l7 = 000000000000005e | |
12420 | ldsha [%i6+%o4]0x81,%l7 ! %l7 = 0000000000000000 | |
12421 | ! Mem[0000000030041410] = ffffffff0000ffd7, %f20 = 000000e7 ffffffff | |
12422 | ldda [%i1+%o5]0x89,%f20 ! %f20 = ffffffff 0000ffd7 | |
12423 | ! Mem[0000000010141410] = 00000000, %l4 = 0000000000005e9e | |
12424 | ldsha [%i5+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
12425 | ! Mem[00000000100c1400] = 000000ff 9ce0b6ff 000000ff 0a8d001a | |
12426 | ! Mem[00000000100c1410] = ff00d7ff 3b000000 5e9e11ff 6b6c2202 | |
12427 | ! Mem[00000000100c1420] = 00000000 d81a5b92 c780ffbb 00000000 | |
12428 | ! Mem[00000000100c1430] = ff00ffff e400008a ffffffe0 ffffffff | |
12429 | ldda [%i3]ASI_BLK_PL,%f16 ! Block Load from 00000000100c1400 | |
12430 | ! Mem[0000000030041408] = 00ffff00, %l4 = 0000000000000000 | |
12431 | lduwa [%i1+%o4]0x89,%l4 ! %l4 = 0000000000ffff00 | |
12432 | ! Mem[0000000010181408] = 00000000, %l1 = 0000000000000000 | |
12433 | lduw [%i6+%o4],%l1 ! %l1 = 0000000000000000 | |
12434 | ! Mem[0000000030001408] = 57119e5e, %l3 = 0000000000000000 | |
12435 | ldsha [%i0+%o4]0x89,%l3 ! %l3 = ffffffffffff9e5e | |
12436 | ! Mem[0000000030001400] = ff0000ff, %l2 = ffffffffffffff00 | |
12437 | lduwa [%i0+%g0]0x89,%l2 ! %l2 = 00000000ff0000ff | |
12438 | ! Starting 10 instruction Store Burst | |
12439 | ! Mem[0000000010101408] = 00005e9e, %l6 = 00000000000000ff | |
12440 | swapa [%i4+%o4]0x88,%l6 ! %l6 = 0000000000005e9e | |
12441 | ||
12442 | p0_label_284: | |
12443 | ! %f10 = ff000000 00000000, Mem[0000000030041400] = 0f10ff1a e0ffffff | |
12444 | stda %f10,[%i1+%g0]0x81 ! Mem[0000000030041400] = ff000000 00000000 | |
12445 | ! Mem[0000000010081408] = e70000ff, %l7 = 0000000000000000 | |
12446 | swapa [%i2+%o4]0x88,%l7 ! %l7 = 00000000e70000ff | |
12447 | ! %l3 = ffffffffffff9e5e, Mem[0000000010141410] = 00000000 | |
12448 | stwa %l3,[%i5+%o5]0x80 ! Mem[0000000010141410] = ffff9e5e | |
12449 | ! Mem[000000001014140a] = 00000000, %l0 = ffffffffd7ff0000 | |
12450 | ldstub [%i5+0x00a],%l0 ! %l0 = 00000000000000ff | |
12451 | ! %l2 = 00000000ff0000ff, Mem[0000000010001414] = 00000000 | |
12452 | sth %l2,[%i0+0x014] ! Mem[0000000010001414] = 00ff0000 | |
12453 | ! Mem[0000000030081400] = ffb6ffff, %l2 = 00000000ff0000ff | |
12454 | swapa [%i2+%g0]0x89,%l2 ! %l2 = 00000000ffb6ffff | |
12455 | ! %f11 = 00000000, Mem[0000000010041414] = ffffffff | |
12456 | st %f11,[%i1+0x014] ! Mem[0000000010041414] = 00000000 | |
12457 | ! Mem[0000000010041408] = 0000ffff, %l5 = 0000000000000000 | |
12458 | swapa [%i1+%o4]0x88,%l5 ! %l5 = 000000000000ffff | |
12459 | ! %f0 = 00000000 ff000000 d7ff0000 000000ff | |
12460 | ! %f4 = ffffffff ffffffff ffffffff 57119e5e | |
12461 | ! %f8 = ffffffb4 0000005e ff000000 00000000 | |
12462 | ! %f12 = ffffffff ffffffff cd10ffc4 000000ff | |
12463 | stda %f0,[%i5]ASI_BLK_AIUP ! Block Store to 0000000010141400 | |
12464 | ! Starting 10 instruction Load Burst | |
12465 | ! Mem[0000000030181400] = ff0000ff e76e87ff, %l0 = 00000000, %l1 = 00000000 | |
12466 | ldda [%i6+%g0]0x81,%l0 ! %l0 = 00000000ff0000ff 00000000e76e87ff | |
12467 | ||
12468 | p0_label_285: | |
12469 | ! Mem[0000000020800040] = ffff9ffa, %l0 = 00000000ff0000ff | |
12470 | lduha [%o1+0x040]%asi,%l0 ! %l0 = 000000000000ffff | |
12471 | membar #Sync ! Added by membar checker (70) | |
12472 | ! Mem[0000000010141408] = ff0000000000ffd7, %l3 = ffffffffffff9e5e | |
12473 | ldxa [%i5+%o4]0x88,%l3 ! %l3 = ff0000000000ffd7 | |
12474 | ! Mem[00000000100c1408] = 000000ff 0a8d001a, %l4 = 00ffff00, %l5 = 0000ffff | |
12475 | ldda [%i3+%o4]0x80,%l4 ! %l4 = 00000000000000ff 000000000a8d001a | |
12476 | ! Mem[0000000010081408] = 00000000, %l1 = 00000000e76e87ff | |
12477 | lduha [%i2+%o4]0x88,%l1 ! %l1 = 0000000000000000 | |
12478 | ! Mem[00000000100c1400] = ff000000, %l5 = 000000000a8d001a | |
12479 | ldsha [%i3+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
12480 | ! Mem[0000000030001408] = 5e9e1157, %l1 = 0000000000000000 | |
12481 | lduba [%i0+%o4]0x81,%l1 ! %l1 = 000000000000005e | |
12482 | ! Mem[0000000010041408] = 00000000, %l6 = 0000000000005e9e | |
12483 | lduba [%i1+%o4]0x80,%l6 ! %l6 = 0000000000000000 | |
12484 | ! Mem[0000000030181408] = 000000ff ff000000, %l6 = 00000000, %l7 = e70000ff | |
12485 | ldda [%i6+%o4]0x89,%l6 ! %l6 = 00000000ff000000 00000000000000ff | |
12486 | ! Mem[0000000030101400] = 0000003b, %l3 = ff0000000000ffd7 | |
12487 | lduha [%i4+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
12488 | ! Starting 10 instruction Store Burst | |
12489 | ! Mem[0000000030101408] = 0000ffd7, %l5 = 0000000000000000 | |
12490 | ldstuba [%i4+%o4]0x89,%l5 ! %l5 = 000000d7000000ff | |
12491 | ||
12492 | ! Check Point 57 for processor 0 | |
12493 | ||
12494 | set p0_check_pt_data_57,%g4 | |
12495 | rd %ccr,%g5 ! %g5 = 44 | |
12496 | ldx [%g4+0x08],%g2 | |
12497 | cmp %l0,%g2 ! %l0 = 000000000000ffff | |
12498 | bne %xcc,p0_reg_check_fail0 | |
12499 | mov 0xee0,%g1 | |
12500 | ldx [%g4+0x10],%g2 | |
12501 | cmp %l1,%g2 ! %l1 = 000000000000005e | |
12502 | bne %xcc,p0_reg_check_fail1 | |
12503 | mov 0xee1,%g1 | |
12504 | ldx [%g4+0x18],%g2 | |
12505 | cmp %l2,%g2 ! %l2 = 00000000ffb6ffff | |
12506 | bne %xcc,p0_reg_check_fail2 | |
12507 | mov 0xee2,%g1 | |
12508 | ldx [%g4+0x20],%g2 | |
12509 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
12510 | bne %xcc,p0_reg_check_fail3 | |
12511 | mov 0xee3,%g1 | |
12512 | ldx [%g4+0x28],%g2 | |
12513 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
12514 | bne %xcc,p0_reg_check_fail4 | |
12515 | mov 0xee4,%g1 | |
12516 | ldx [%g4+0x30],%g2 | |
12517 | cmp %l5,%g2 ! %l5 = 00000000000000d7 | |
12518 | bne %xcc,p0_reg_check_fail5 | |
12519 | mov 0xee5,%g1 | |
12520 | ldx [%g4+0x38],%g2 | |
12521 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
12522 | bne %xcc,p0_reg_check_fail6 | |
12523 | mov 0xee6,%g1 | |
12524 | ldx [%g4+0x40],%g2 | |
12525 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
12526 | bne %xcc,p0_reg_check_fail7 | |
12527 | mov 0xee7,%g1 | |
12528 | ldx [%g4+0x48],%g3 | |
12529 | std %f0,[%g4] | |
12530 | ldx [%g4],%g2 | |
12531 | cmp %g3,%g2 ! %f0 = 00000000 ff000000 | |
12532 | bne %xcc,p0_freg_check_fail | |
12533 | mov 0xf00,%g1 | |
12534 | ldx [%g4+0x50],%g3 | |
12535 | std %f2,[%g4] | |
12536 | ldx [%g4],%g2 | |
12537 | cmp %g3,%g2 ! %f2 = d7ff0000 000000ff | |
12538 | bne %xcc,p0_freg_check_fail | |
12539 | mov 0xf02,%g1 | |
12540 | ldx [%g4+0x58],%g3 | |
12541 | std %f4,[%g4] | |
12542 | ldx [%g4],%g2 | |
12543 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
12544 | bne %xcc,p0_freg_check_fail | |
12545 | mov 0xf04,%g1 | |
12546 | ldx [%g4+0x60],%g3 | |
12547 | std %f6,[%g4] | |
12548 | ldx [%g4],%g2 | |
12549 | cmp %g3,%g2 ! %f6 = ffffffff 57119e5e | |
12550 | bne %xcc,p0_freg_check_fail | |
12551 | mov 0xf06,%g1 | |
12552 | ldx [%g4+0x68],%g3 | |
12553 | std %f16,[%g4] | |
12554 | ldx [%g4],%g2 | |
12555 | cmp %g3,%g2 ! %f16 = ffb6e09c ff000000 | |
12556 | bne %xcc,p0_freg_check_fail | |
12557 | mov 0xf16,%g1 | |
12558 | ldx [%g4+0x70],%g3 | |
12559 | std %f18,[%g4] | |
12560 | ldx [%g4],%g2 | |
12561 | cmp %g3,%g2 ! %f18 = 1a008d0a ff000000 | |
12562 | bne %xcc,p0_freg_check_fail | |
12563 | mov 0xf18,%g1 | |
12564 | ldx [%g4+0x78],%g3 | |
12565 | std %f20,[%g4] | |
12566 | ldx [%g4],%g2 | |
12567 | cmp %g3,%g2 ! %f20 = 0000003b ffd700ff | |
12568 | bne %xcc,p0_freg_check_fail | |
12569 | mov 0xf20,%g1 | |
12570 | ldx [%g4+0x80],%g3 | |
12571 | std %f22,[%g4] | |
12572 | ldx [%g4],%g2 | |
12573 | cmp %g3,%g2 ! %f22 = 02226c6b ff119e5e | |
12574 | bne %xcc,p0_freg_check_fail | |
12575 | mov 0xf22,%g1 | |
12576 | ldx [%g4+0x88],%g3 | |
12577 | std %f24,[%g4] | |
12578 | ldx [%g4],%g2 | |
12579 | cmp %g3,%g2 ! %f24 = 925b1ad8 00000000 | |
12580 | bne %xcc,p0_freg_check_fail | |
12581 | mov 0xf24,%g1 | |
12582 | ldx [%g4+0x90],%g3 | |
12583 | std %f26,[%g4] | |
12584 | ldx [%g4],%g2 | |
12585 | cmp %g3,%g2 ! %f26 = 00000000 bbff80c7 | |
12586 | bne %xcc,p0_freg_check_fail | |
12587 | mov 0xf26,%g1 | |
12588 | ldx [%g4+0x98],%g3 | |
12589 | std %f28,[%g4] | |
12590 | ldx [%g4],%g2 | |
12591 | cmp %g3,%g2 ! %f28 = 8a0000e4 ffff00ff | |
12592 | bne %xcc,p0_freg_check_fail | |
12593 | mov 0xf28,%g1 | |
12594 | ldx [%g4+0xa0],%g3 | |
12595 | std %f30,[%g4] | |
12596 | ldx [%g4],%g2 | |
12597 | cmp %g3,%g2 ! %f30 = ffffffff e0ffffff | |
12598 | bne %xcc,p0_freg_check_fail | |
12599 | mov 0xf30,%g1 | |
12600 | ||
12601 | ! Check Point 57 completed | |
12602 | ||
12603 | ||
12604 | p0_label_286: | |
12605 | ! Mem[0000000010001431] = 0f10ff1a, %l0 = 000000000000ffff | |
12606 | ldstub [%i0+0x031],%l0 ! %l0 = 00000010000000ff | |
12607 | ! %l4 = 00000000000000ff, Mem[00000000100c1400] = 000000ff | |
12608 | stha %l4,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00ff00ff | |
12609 | ! Mem[0000000030181400] = ff0000ff, %l7 = 00000000000000ff | |
12610 | swapa [%i6+%g0]0x81,%l7 ! %l7 = 00000000ff0000ff | |
12611 | ! Mem[0000000030041400] = 00000000000000ff, %f30 = ffffffff e0ffffff | |
12612 | ldda [%i1+%g0]0x89,%f30 ! %f30 = 00000000 000000ff | |
12613 | ! %l4 = 00000000000000ff, Mem[0000000030081408] = ffff00001a008d0a | |
12614 | stxa %l4,[%i2+%o4]0x81 ! Mem[0000000030081408] = 00000000000000ff | |
12615 | ! %l6 = ff000000, %l7 = ff0000ff, Mem[00000000100c1408] = 000000ff 0a8d001a | |
12616 | stda %l6,[%i3+%o4]0x80 ! Mem[00000000100c1408] = ff000000 ff0000ff | |
12617 | ! %l3 = 0000000000000000, Mem[00000000201c0001] = ffff1669 | |
12618 | stb %l3,[%o0+0x001] ! Mem[00000000201c0000] = ff001669 | |
12619 | ! Mem[0000000010101400] = 0000003b, %l3 = 0000000000000000 | |
12620 | swapa [%i4+%g0]0x88,%l3 ! %l3 = 000000000000003b | |
12621 | ! %l6 = 00000000ff000000, Mem[00000000211c0001] = ff00fe0c | |
12622 | stb %l6,[%o2+0x001] ! Mem[00000000211c0000] = ff00fe0c | |
12623 | ! Starting 10 instruction Load Burst | |
12624 | ! Mem[0000000010101400] = 00000000, %l6 = 00000000ff000000 | |
12625 | ldsba [%i4+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
12626 | ||
12627 | p0_label_287: | |
12628 | ! Mem[0000000010141400] = 000000ff00000000, %f4 = ffffffff ffffffff | |
12629 | ldda [%i5+%g0]0x88,%f4 ! %f4 = 000000ff 00000000 | |
12630 | ! Mem[0000000010101410] = 00000000, %l4 = 00000000000000ff | |
12631 | ldsba [%i4+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
12632 | ! Mem[0000000010181400] = ff000000, %f20 = 0000003b | |
12633 | lda [%i6+%g0]0x80,%f20 ! %f20 = ff000000 | |
12634 | ! Mem[0000000010101400] = 00000000, %l4 = 0000000000000000 | |
12635 | lduha [%i4+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
12636 | ! Mem[0000000020800000] = ff060db6, %l1 = 000000000000005e | |
12637 | ldsh [%o1+%g0],%l1 ! %l1 = ffffffffffffff06 | |
12638 | ! Mem[0000000010001408] = 00000000, %l4 = 0000000000000000 | |
12639 | lduba [%i0+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
12640 | ! Mem[0000000010181400] = ff000000, %l2 = 00000000ffb6ffff | |
12641 | lduwa [%i6+%g0]0x80,%l2 ! %l2 = 00000000ff000000 | |
12642 | ! Mem[0000000010001408] = 000000000000005e, %f18 = 1a008d0a ff000000 | |
12643 | ldda [%i0+%o4]0x80,%f18 ! %f18 = 00000000 0000005e | |
12644 | ! Mem[0000000010081410] = ffd7ffff d7ffffff, %l2 = ff000000, %l3 = 0000003b | |
12645 | ldda [%i2+%o5]0x80,%l2 ! %l2 = 00000000ffd7ffff 00000000d7ffffff | |
12646 | ! Starting 10 instruction Store Burst | |
12647 | ! %f30 = 00000000 000000ff, Mem[0000000010001400] = 000000ff 00000000 | |
12648 | stda %f30,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 000000ff | |
12649 | ||
12650 | p0_label_288: | |
12651 | ! %l1 = ffffffffffffff06, Mem[0000000010001400] = ff00000000000000 | |
12652 | stxa %l1,[%i0+%g0]0x80 ! Mem[0000000010001400] = ffffffffffffff06 | |
12653 | ! %l2 = ffd7ffff, %l3 = d7ffffff, Mem[0000000030101408] = ffff0000 000000ff | |
12654 | stda %l2,[%i4+%o4]0x81 ! Mem[0000000030101408] = ffd7ffff d7ffffff | |
12655 | ! Mem[0000000030041408] = 00ffff00, %l3 = 00000000d7ffffff | |
12656 | swapa [%i1+%o4]0x81,%l3 ! %l3 = 0000000000ffff00 | |
12657 | ! %f4 = 000000ff 00000000, Mem[0000000010141428] = ff000000 00000000 | |
12658 | std %f4 ,[%i5+0x028] ! Mem[0000000010141428] = 000000ff 00000000 | |
12659 | ! %f2 = d7ff0000 000000ff, %l3 = 0000000000ffff00 | |
12660 | ! Mem[0000000030181418] = d9876ee7f8d13fed | |
12661 | add %i6,0x018,%g1 | |
12662 | stda %f2,[%g1+%l3]ASI_PST8_SL ! Mem[0000000030181418] = d9876ee7f8d13fed | |
12663 | ! %f0 = 00000000 ff000000, Mem[0000000010101410] = 00000000 0000007a | |
12664 | stda %f0 ,[%i4+0x010]%asi ! Mem[0000000010101410] = 00000000 ff000000 | |
12665 | ! Mem[0000000030041410] = d7ff0000, %l4 = 0000000000000000 | |
12666 | swapa [%i1+%o5]0x81,%l4 ! %l4 = 00000000d7ff0000 | |
12667 | ! %l7 = 00000000ff0000ff, Mem[0000000010181400] = 000000ff | |
12668 | stha %l7,[%i6+%g0]0x88 ! Mem[0000000010181400] = 000000ff | |
12669 | ! Mem[0000000010101410] = 00000000, %l7 = 00000000ff0000ff | |
12670 | ldstuba [%i4+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
12671 | ! Starting 10 instruction Load Burst | |
12672 | ! Mem[00000000201c0000] = ff001669, %l2 = 00000000ffd7ffff | |
12673 | lduba [%o0+0x000]%asi,%l2 ! %l2 = 00000000000000ff | |
12674 | ||
12675 | p0_label_289: | |
12676 | ! Mem[0000000010001418] = 00000000, %l0 = 0000000000000010 | |
12677 | ldswa [%i0+0x018]%asi,%l0 ! %l0 = 0000000000000000 | |
12678 | ! Mem[0000000010141414] = ffffffff, %l6 = 0000000000000000 | |
12679 | ldsb [%i5+0x014],%l6 ! %l6 = ffffffffffffffff | |
12680 | ! Mem[0000000010101410] = 000000ff, %l4 = 00000000d7ff0000 | |
12681 | lduha [%i4+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
12682 | ! Mem[0000000020800000] = ff060db6, %l4 = 00000000000000ff | |
12683 | lduba [%o1+0x001]%asi,%l4 ! %l4 = 0000000000000006 | |
12684 | ! Mem[0000000010001428] = 00000057a309ade0, %l5 = 00000000000000d7 | |
12685 | ldxa [%i0+0x028]%asi,%l5 ! %l5 = 00000057a309ade0 | |
12686 | ! Mem[0000000030101408] = ffd7ffffd7ffffff, %f26 = 00000000 bbff80c7 | |
12687 | ldda [%i4+%o4]0x81,%f26 ! %f26 = ffd7ffff d7ffffff | |
12688 | ! Mem[0000000030101400] = 0000003b, %l4 = 0000000000000006 | |
12689 | lduha [%i4+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
12690 | ! Mem[0000000010041408] = 00000000, %l1 = ffffffffffffff06 | |
12691 | lduba [%i1+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
12692 | ! Mem[0000000010001414] = 00ff0000, %l3 = 0000000000ffff00 | |
12693 | ldsb [%i0+0x017],%l3 ! %l3 = 0000000000000000 | |
12694 | ! Starting 10 instruction Store Burst | |
12695 | ! %l7 = 0000000000000000, Mem[0000000030101400] = 000000ff3b000000 | |
12696 | stxa %l7,[%i4+%g0]0x89 ! Mem[0000000030101400] = 0000000000000000 | |
12697 | ||
12698 | p0_label_290: | |
12699 | ! Mem[000000001014143e] = 000000ff, %l3 = 0000000000000000 | |
12700 | ldstuba [%i5+0x03e]%asi,%l3 ! %l3 = 00000000000000ff | |
12701 | ! Mem[0000000010001410] = 00000000, %l7 = 0000000000000000 | |
12702 | ldstuba [%i0+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
12703 | ! %l6 = ffffffffffffffff, Mem[0000000030101408] = ffd7ffffd7ffffff | |
12704 | stxa %l6,[%i4+%o4]0x81 ! Mem[0000000030101408] = ffffffffffffffff | |
12705 | ! %l7 = 0000000000000000, Mem[0000000010001408] = 00000000 | |
12706 | stw %l7,[%i0+%o4] ! Mem[0000000010001408] = 00000000 | |
12707 | ! %f5 = 00000000, Mem[0000000030181400] = ff000000 | |
12708 | sta %f5 ,[%i6+%g0]0x89 ! Mem[0000000030181400] = 00000000 | |
12709 | ! Mem[0000000030081400] = ff0000ff, %l1 = 0000000000000000 | |
12710 | ldstuba [%i2+%g0]0x81,%l1 ! %l1 = 000000ff000000ff | |
12711 | ! Mem[0000000010101424] = d81a5b92, %l6 = ffffffffffffffff, %asi = 80 | |
12712 | swapa [%i4+0x024]%asi,%l6 ! %l6 = 00000000d81a5b92 | |
12713 | ! Mem[0000000010001402] = ffffffff, %l3 = 0000000000000000 | |
12714 | ldstub [%i0+0x002],%l3 ! %l3 = 000000ff000000ff | |
12715 | ! %f6 = ffffffff 57119e5e, Mem[0000000010041428] = 39aced3b 8ab6e09c | |
12716 | std %f6 ,[%i1+0x028] ! Mem[0000000010041428] = ffffffff 57119e5e | |
12717 | ! Starting 10 instruction Load Burst | |
12718 | ! Mem[00000000100c143c] = ffffffff, %f12 = ffffffff | |
12719 | ld [%i3+0x03c],%f12 ! %f12 = ffffffff | |
12720 | ||
12721 | ! Check Point 58 for processor 0 | |
12722 | ||
12723 | set p0_check_pt_data_58,%g4 | |
12724 | rd %ccr,%g5 ! %g5 = 44 | |
12725 | ldx [%g4+0x08],%g2 | |
12726 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
12727 | bne %xcc,p0_reg_check_fail0 | |
12728 | mov 0xee0,%g1 | |
12729 | ldx [%g4+0x10],%g2 | |
12730 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
12731 | bne %xcc,p0_reg_check_fail1 | |
12732 | mov 0xee1,%g1 | |
12733 | ldx [%g4+0x18],%g2 | |
12734 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
12735 | bne %xcc,p0_reg_check_fail2 | |
12736 | mov 0xee2,%g1 | |
12737 | ldx [%g4+0x20],%g2 | |
12738 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
12739 | bne %xcc,p0_reg_check_fail3 | |
12740 | mov 0xee3,%g1 | |
12741 | ldx [%g4+0x28],%g2 | |
12742 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
12743 | bne %xcc,p0_reg_check_fail4 | |
12744 | mov 0xee4,%g1 | |
12745 | ldx [%g4+0x30],%g2 | |
12746 | cmp %l5,%g2 ! %l5 = 00000057a309ade0 | |
12747 | bne %xcc,p0_reg_check_fail5 | |
12748 | mov 0xee5,%g1 | |
12749 | ldx [%g4+0x38],%g2 | |
12750 | cmp %l6,%g2 ! %l6 = 00000000d81a5b92 | |
12751 | bne %xcc,p0_reg_check_fail6 | |
12752 | mov 0xee6,%g1 | |
12753 | ldx [%g4+0x40],%g2 | |
12754 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
12755 | bne %xcc,p0_reg_check_fail7 | |
12756 | mov 0xee7,%g1 | |
12757 | ldx [%g4+0x48],%g3 | |
12758 | std %f2,[%g4] | |
12759 | ldx [%g4],%g2 | |
12760 | cmp %g3,%g2 ! %f2 = d7ff0000 000000ff | |
12761 | bne %xcc,p0_freg_check_fail | |
12762 | mov 0xf02,%g1 | |
12763 | ldx [%g4+0x50],%g3 | |
12764 | std %f4,[%g4] | |
12765 | ldx [%g4],%g2 | |
12766 | cmp %g3,%g2 ! %f4 = 000000ff 00000000 | |
12767 | bne %xcc,p0_freg_check_fail | |
12768 | mov 0xf04,%g1 | |
12769 | ldx [%g4+0x58],%g3 | |
12770 | std %f12,[%g4] | |
12771 | ldx [%g4],%g2 | |
12772 | cmp %g3,%g2 ! %f12 = ffffffff ffffffff | |
12773 | bne %xcc,p0_freg_check_fail | |
12774 | mov 0xf12,%g1 | |
12775 | ldx [%g4+0x60],%g3 | |
12776 | std %f18,[%g4] | |
12777 | ldx [%g4],%g2 | |
12778 | cmp %g3,%g2 ! %f18 = 00000000 0000005e | |
12779 | bne %xcc,p0_freg_check_fail | |
12780 | mov 0xf18,%g1 | |
12781 | ldx [%g4+0x68],%g3 | |
12782 | std %f20,[%g4] | |
12783 | ldx [%g4],%g2 | |
12784 | cmp %g3,%g2 ! %f20 = ff000000 ffd700ff | |
12785 | bne %xcc,p0_freg_check_fail | |
12786 | mov 0xf20,%g1 | |
12787 | ldx [%g4+0x70],%g3 | |
12788 | std %f26,[%g4] | |
12789 | ldx [%g4],%g2 | |
12790 | cmp %g3,%g2 ! %f26 = ffd7ffff d7ffffff | |
12791 | bne %xcc,p0_freg_check_fail | |
12792 | mov 0xf26,%g1 | |
12793 | ldx [%g4+0x78],%g3 | |
12794 | std %f30,[%g4] | |
12795 | ldx [%g4],%g2 | |
12796 | cmp %g3,%g2 ! %f30 = 00000000 000000ff | |
12797 | bne %xcc,p0_freg_check_fail | |
12798 | mov 0xf30,%g1 | |
12799 | ||
12800 | ! Check Point 58 completed | |
12801 | ||
12802 | ||
12803 | p0_label_291: | |
12804 | ! Mem[0000000010181400] = ff000000 00000000, %l2 = 000000ff, %l3 = 000000ff | |
12805 | ldda [%i6+%g0]0x80,%l2 ! %l2 = 00000000ff000000 0000000000000000 | |
12806 | ! Mem[0000000010041400] = 000000ff, %f30 = 00000000 | |
12807 | lda [%i1+%g0]0x88,%f30 ! %f30 = 000000ff | |
12808 | ! Mem[0000000010141424] = 0000005e, %l5 = 00000057a309ade0 | |
12809 | lduwa [%i5+0x024]%asi,%l5 ! %l5 = 000000000000005e | |
12810 | ! Mem[0000000010141408] = 0000ffd7, %f17 = ff000000 | |
12811 | lda [%i5+%o4]0x88,%f17 ! %f17 = 0000ffd7 | |
12812 | ! Mem[0000000010001400] = ffffffff, %l4 = 0000000000000000 | |
12813 | lduha [%i0+%g0]0x80,%l4 ! %l4 = 000000000000ffff | |
12814 | ! Mem[0000000030001400] = 00000000ff0000ff, %f4 = 000000ff 00000000 | |
12815 | ldda [%i0+%g0]0x89,%f4 ! %f4 = 00000000 ff0000ff | |
12816 | ! Mem[0000000010081408] = 00000000, %l3 = 0000000000000000 | |
12817 | lduba [%i2+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
12818 | ! Mem[0000000010141408] = 0000ffd7, %l6 = 00000000d81a5b92 | |
12819 | ldsha [%i5+%o4]0x88,%l6 ! %l6 = ffffffffffffffd7 | |
12820 | ! Mem[0000000010001438] = ffff275ecaffffff, %l6 = ffffffffffffffd7 | |
12821 | ldxa [%i0+0x038]%asi,%l6 ! %l6 = ffff275ecaffffff | |
12822 | ! Starting 10 instruction Store Burst | |
12823 | ! Mem[0000000010141410] = ffffffff, %l2 = 00000000ff000000 | |
12824 | ldstuba [%i5+%o5]0x88,%l2 ! %l2 = 000000ff000000ff | |
12825 | ||
12826 | p0_label_292: | |
12827 | ! %l6 = ffff275ecaffffff, Mem[0000000010101400] = 0000000000000000 | |
12828 | stxa %l6,[%i4+%g0]0x80 ! Mem[0000000010101400] = ffff275ecaffffff | |
12829 | ! %l2 = 00000000000000ff, Mem[00000000211c0000] = ff00fe0c | |
12830 | stb %l2,[%o2+%g0] ! Mem[00000000211c0000] = ff00fe0c | |
12831 | ! Mem[0000000030101400] = 00000000, %l2 = 00000000000000ff | |
12832 | swapa [%i4+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
12833 | ! %f18 = 00000000 0000005e, %l6 = ffff275ecaffffff | |
12834 | ! Mem[0000000010081438] = 00ff000000007a1a | |
12835 | add %i2,0x038,%g1 | |
12836 | stda %f18,[%g1+%l6]ASI_PST16_P ! Mem[0000000010081438] = 000000000000005e | |
12837 | ! Mem[0000000030081408] = 00000000, %l3 = 0000000000000000 | |
12838 | swapa [%i2+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
12839 | ! Mem[0000000010101410] = ff000000, %l6 = ffff275ecaffffff | |
12840 | swapa [%i4+%o5]0x80,%l6 ! %l6 = 00000000ff000000 | |
12841 | ! %f12 = ffffffff ffffffff, %l7 = 0000000000000000 | |
12842 | ! Mem[0000000030141420] = 925b1ad839aced3b | |
12843 | add %i5,0x020,%g1 | |
12844 | stda %f12,[%g1+%l7]ASI_PST16_S ! Mem[0000000030141420] = 925b1ad839aced3b | |
12845 | ! Mem[0000000010081404] = d81a5b92, %l3 = 0000000000000000, %asi = 80 | |
12846 | swapa [%i2+0x004]%asi,%l3 ! %l3 = 00000000d81a5b92 | |
12847 | ! %f4 = 00000000, Mem[0000000010001410] = ff000000 | |
12848 | sta %f4 ,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 | |
12849 | ! Starting 10 instruction Load Burst | |
12850 | ! Mem[00000000300c1410] = 0000000057110000, %f20 = ff000000 ffd700ff | |
12851 | ldda [%i3+%o5]0x89,%f20 ! %f20 = 00000000 57110000 | |
12852 | ||
12853 | p0_label_293: | |
12854 | ! Mem[0000000030141400] = 00000000, %l0 = 0000000000000000 | |
12855 | lduwa [%i5+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
12856 | ! Mem[0000000030041400] = ff000000, %f4 = 00000000 | |
12857 | lda [%i1+%g0]0x81,%f4 ! %f4 = ff000000 | |
12858 | ! Mem[00000000300c1400] = ff000000, %l2 = 0000000000000000 | |
12859 | lduwa [%i3+%g0]0x81,%l2 ! %l2 = 00000000ff000000 | |
12860 | ! Mem[0000000010001408] = 00000000 0000005e, %l6 = ff000000, %l7 = 00000000 | |
12861 | ldda [%i0+%o4]0x80,%l6 ! %l6 = 0000000000000000 000000000000005e | |
12862 | ! Mem[00000000100c1400] = 00ff00ff, %l7 = 000000000000005e | |
12863 | ldsh [%i3+0x002],%l7 ! %l7 = 00000000000000ff | |
12864 | ! Mem[0000000010081400] = ff000000, %f26 = ffd7ffff | |
12865 | lda [%i2+%g0]0x88,%f26 ! %f26 = ff000000 | |
12866 | ! Mem[0000000010001424] = ff000000, %l4 = 000000000000ffff | |
12867 | ldsha [%i0+0x026]%asi,%l4 ! %l4 = 0000000000000000 | |
12868 | membar #Sync ! Added by membar checker (71) | |
12869 | ! Mem[0000000030141400] = 00000000 0000001a bb9180c7 ff000000 | |
12870 | ! Mem[0000000030141410] = 9ce0b68a 032cff8e 02226c6b 57119e5e | |
12871 | ! Mem[0000000030141420] = 925b1ad8 39aced3b 64479a75 bb9180c7 | |
12872 | ! Mem[0000000030141430] = ffffffff 365fc6fa ffffffff 000000ff | |
12873 | ldda [%i5]ASI_BLK_AIUS,%f0 ! Block Load from 0000000030141400 | |
12874 | ! Mem[00000000300c1410] = 0000000057110000, %f26 = ff000000 d7ffffff | |
12875 | ldda [%i3+%o5]0x89,%f26 ! %f26 = 00000000 57110000 | |
12876 | ! Starting 10 instruction Store Burst | |
12877 | ! Mem[0000000010081408] = 00000000, %l0 = 0000000000000000 | |
12878 | swapa [%i2+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
12879 | ||
12880 | p0_label_294: | |
12881 | ! Mem[0000000010181404] = 00000000, %l0 = 00000000, %l1 = 000000ff | |
12882 | add %i6,0x04,%g1 | |
12883 | casa [%g1]0x80,%l0,%l1 ! %l1 = 0000000000000000 | |
12884 | ! %l4 = 0000000000000000, Mem[0000000010001418] = 00000000d7ffffff, %asi = 80 | |
12885 | stxa %l4,[%i0+0x018]%asi ! Mem[0000000010001418] = 0000000000000000 | |
12886 | ! Mem[000000001010140c] = 00000000, %l7 = 000000ff, %l2 = ff000000 | |
12887 | add %i4,0x0c,%g1 | |
12888 | casa [%g1]0x80,%l7,%l2 ! %l2 = 0000000000000000 | |
12889 | ! Mem[0000000030081410] = 9e5e0000, %l0 = 0000000000000000 | |
12890 | swapa [%i2+%o5]0x89,%l0 ! %l0 = 000000009e5e0000 | |
12891 | ! %l1 = 0000000000000000, Mem[0000000010101410] = caffffff | |
12892 | stha %l1,[%i4+%o5]0x80 ! Mem[0000000010101410] = 0000ffff | |
12893 | ! Mem[0000000030141408] = bb9180c7, %l4 = 0000000000000000 | |
12894 | swapa [%i5+%o4]0x81,%l4 ! %l4 = 00000000bb9180c7 | |
12895 | ! %f28 = 8a0000e4 ffff00ff, Mem[0000000010041408] = 00000000 000000ff | |
12896 | stda %f28,[%i1+%o4]0x80 ! Mem[0000000010041408] = 8a0000e4 ffff00ff | |
12897 | ! Mem[0000000030041408] = ffffffd7, %l6 = 0000000000000000 | |
12898 | swapa [%i1+%o4]0x89,%l6 ! %l6 = 00000000ffffffd7 | |
12899 | ! Mem[0000000021800041] = ffff5e5c, %l1 = 0000000000000000 | |
12900 | ldstuba [%o3+0x041]%asi,%l1 ! %l1 = 000000ff000000ff | |
12901 | ! Starting 10 instruction Load Burst | |
12902 | ! Mem[00000000100c1410] = ffd700ff, %l0 = 000000009e5e0000 | |
12903 | ldswa [%i3+%o5]0x88,%l0 ! %l0 = ffffffffffd700ff | |
12904 | ||
12905 | p0_label_295: | |
12906 | ! Mem[0000000030081408] = ff000000 00000000, %l0 = ffd700ff, %l1 = 000000ff | |
12907 | ldda [%i2+%o4]0x89,%l0 ! %l0 = 0000000000000000 00000000ff000000 | |
12908 | ! Mem[0000000010181400] = ff000000000000ff, %f30 = 000000ff 000000ff | |
12909 | ldda [%i6+%g0]0x80,%f30 ! %f30 = ff000000 000000ff | |
12910 | ! Mem[0000000010101410] = 0000ffff, %l7 = 00000000000000ff | |
12911 | lduwa [%i4+%o5]0x80,%l7 ! %l7 = 000000000000ffff | |
12912 | ! Mem[0000000030181408] = 000000ff, %l3 = 00000000d81a5b92 | |
12913 | lduha [%i6+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
12914 | ! Mem[0000000030001410] = ffffffff, %l4 = 00000000bb9180c7 | |
12915 | ldswa [%i0+%o5]0x81,%l4 ! %l4 = ffffffffffffffff | |
12916 | ! Mem[00000000201c0000] = ff001669, %l7 = 000000000000ffff | |
12917 | ldub [%o0+%g0],%l7 ! %l7 = 00000000000000ff | |
12918 | ! Mem[0000000010081424] = ff000000, %l6 = 00000000ffffffd7 | |
12919 | lduh [%i2+0x026],%l6 ! %l6 = 0000000000000000 | |
12920 | ! Mem[00000000100c1408] = ff000000ff0000ff, %l2 = 0000000000000000 | |
12921 | ldxa [%i3+%o4]0x80,%l2 ! %l2 = ff000000ff0000ff | |
12922 | ! Mem[0000000021800000] = fff29a65, %l0 = 0000000000000000 | |
12923 | lduba [%o3+0x000]%asi,%l0 ! %l0 = 00000000000000ff | |
12924 | ! Starting 10 instruction Store Burst | |
12925 | ! Mem[00000000211c0000] = ff00fe0c, %l5 = 000000000000005e | |
12926 | ldub [%o2+0x001],%l5 ! %l5 = 0000000000000000 | |
12927 | ||
12928 | ! Check Point 59 for processor 0 | |
12929 | ||
12930 | set p0_check_pt_data_59,%g4 | |
12931 | rd %ccr,%g5 ! %g5 = 44 | |
12932 | ldx [%g4+0x08],%g2 | |
12933 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
12934 | bne %xcc,p0_reg_check_fail0 | |
12935 | mov 0xee0,%g1 | |
12936 | ldx [%g4+0x10],%g2 | |
12937 | cmp %l1,%g2 ! %l1 = 00000000ff000000 | |
12938 | bne %xcc,p0_reg_check_fail1 | |
12939 | mov 0xee1,%g1 | |
12940 | ldx [%g4+0x18],%g2 | |
12941 | cmp %l2,%g2 ! %l2 = ff000000ff0000ff | |
12942 | bne %xcc,p0_reg_check_fail2 | |
12943 | mov 0xee2,%g1 | |
12944 | ldx [%g4+0x20],%g2 | |
12945 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
12946 | bne %xcc,p0_reg_check_fail3 | |
12947 | mov 0xee3,%g1 | |
12948 | ldx [%g4+0x28],%g2 | |
12949 | cmp %l4,%g2 ! %l4 = ffffffffffffffff | |
12950 | bne %xcc,p0_reg_check_fail4 | |
12951 | mov 0xee4,%g1 | |
12952 | ldx [%g4+0x30],%g2 | |
12953 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
12954 | bne %xcc,p0_reg_check_fail5 | |
12955 | mov 0xee5,%g1 | |
12956 | ldx [%g4+0x38],%g2 | |
12957 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
12958 | bne %xcc,p0_reg_check_fail6 | |
12959 | mov 0xee6,%g1 | |
12960 | ldx [%g4+0x40],%g2 | |
12961 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
12962 | bne %xcc,p0_reg_check_fail7 | |
12963 | mov 0xee7,%g1 | |
12964 | ldx [%g4+0x48],%g3 | |
12965 | std %f0,[%g4] | |
12966 | ldx [%g4],%g2 | |
12967 | cmp %g3,%g2 ! %f0 = 00000000 0000001a | |
12968 | bne %xcc,p0_freg_check_fail | |
12969 | mov 0xf00,%g1 | |
12970 | ldx [%g4+0x50],%g3 | |
12971 | std %f2,[%g4] | |
12972 | ldx [%g4],%g2 | |
12973 | cmp %g3,%g2 ! %f2 = bb9180c7 ff000000 | |
12974 | bne %xcc,p0_freg_check_fail | |
12975 | mov 0xf02,%g1 | |
12976 | ldx [%g4+0x58],%g3 | |
12977 | std %f4,[%g4] | |
12978 | ldx [%g4],%g2 | |
12979 | cmp %g3,%g2 ! %f4 = 9ce0b68a 032cff8e | |
12980 | bne %xcc,p0_freg_check_fail | |
12981 | mov 0xf04,%g1 | |
12982 | ldx [%g4+0x60],%g3 | |
12983 | std %f6,[%g4] | |
12984 | ldx [%g4],%g2 | |
12985 | cmp %g3,%g2 ! %f6 = 02226c6b 57119e5e | |
12986 | bne %xcc,p0_freg_check_fail | |
12987 | mov 0xf06,%g1 | |
12988 | ldx [%g4+0x68],%g3 | |
12989 | std %f8,[%g4] | |
12990 | ldx [%g4],%g2 | |
12991 | cmp %g3,%g2 ! %f8 = 925b1ad8 39aced3b | |
12992 | bne %xcc,p0_freg_check_fail | |
12993 | mov 0xf08,%g1 | |
12994 | ldx [%g4+0x70],%g3 | |
12995 | std %f10,[%g4] | |
12996 | ldx [%g4],%g2 | |
12997 | cmp %g3,%g2 ! %f10 = 64479a75 bb9180c7 | |
12998 | bne %xcc,p0_freg_check_fail | |
12999 | mov 0xf10,%g1 | |
13000 | ldx [%g4+0x78],%g3 | |
13001 | std %f12,[%g4] | |
13002 | ldx [%g4],%g2 | |
13003 | cmp %g3,%g2 ! %f12 = ffffffff 365fc6fa | |
13004 | bne %xcc,p0_freg_check_fail | |
13005 | mov 0xf12,%g1 | |
13006 | ldx [%g4+0x80],%g3 | |
13007 | std %f14,[%g4] | |
13008 | ldx [%g4],%g2 | |
13009 | cmp %g3,%g2 ! %f14 = ffffffff 000000ff | |
13010 | bne %xcc,p0_freg_check_fail | |
13011 | mov 0xf14,%g1 | |
13012 | ldx [%g4+0x88],%g3 | |
13013 | std %f16,[%g4] | |
13014 | ldx [%g4],%g2 | |
13015 | cmp %g3,%g2 ! %f16 = ffb6e09c 0000ffd7 | |
13016 | bne %xcc,p0_freg_check_fail | |
13017 | mov 0xf16,%g1 | |
13018 | ldx [%g4+0x90],%g3 | |
13019 | std %f20,[%g4] | |
13020 | ldx [%g4],%g2 | |
13021 | cmp %g3,%g2 ! %f20 = 00000000 57110000 | |
13022 | bne %xcc,p0_freg_check_fail | |
13023 | mov 0xf20,%g1 | |
13024 | ldx [%g4+0x98],%g3 | |
13025 | std %f26,[%g4] | |
13026 | ldx [%g4],%g2 | |
13027 | cmp %g3,%g2 ! %f26 = 00000000 57110000 | |
13028 | bne %xcc,p0_freg_check_fail | |
13029 | mov 0xf26,%g1 | |
13030 | ldx [%g4+0xa0],%g3 | |
13031 | std %f30,[%g4] | |
13032 | ldx [%g4],%g2 | |
13033 | cmp %g3,%g2 ! %f30 = ff000000 000000ff | |
13034 | bne %xcc,p0_freg_check_fail | |
13035 | mov 0xf30,%g1 | |
13036 | ||
13037 | ! Check Point 59 completed | |
13038 | ||
13039 | ||
13040 | p0_label_296: | |
13041 | ! Mem[0000000010141424] = 0000005e, %l1 = 00000000ff000000, %asi = 80 | |
13042 | swapa [%i5+0x024]%asi,%l1 ! %l1 = 000000000000005e | |
13043 | ! Mem[0000000030081410] = 00000000, %l2 = ff000000ff0000ff | |
13044 | ldstuba [%i2+%o5]0x89,%l2 ! %l2 = 00000000000000ff | |
13045 | ! %f28 = 8a0000e4 ffff00ff, %l1 = 000000000000005e | |
13046 | ! Mem[00000000100c1438] = ffffffe0ffffffff | |
13047 | add %i3,0x038,%g1 | |
13048 | stda %f28,[%g1+%l1]ASI_PST8_P ! Mem[00000000100c1438] = ff00ffe4ffff00ff | |
13049 | ! %l5 = 0000000000000000, Mem[0000000021800180] = 00ffdb07, %asi = 80 | |
13050 | stha %l5,[%o3+0x180]%asi ! Mem[0000000021800180] = 0000db07 | |
13051 | ! %l1 = 000000000000005e, Mem[0000000010001400] = ffffffff | |
13052 | stba %l1,[%i0+%g0]0x80 ! Mem[0000000010001400] = 5effffff | |
13053 | ! Mem[000000001010142c] = 9ce0b68a, %l0 = 000000ff, %l2 = 00000000 | |
13054 | add %i4,0x2c,%g1 | |
13055 | casa [%g1]0x80,%l0,%l2 ! %l2 = 000000009ce0b68a | |
13056 | ! %l1 = 000000000000005e, Mem[0000000010041408] = 8a0000e4 | |
13057 | stba %l1,[%i1+%o4]0x80 ! Mem[0000000010041408] = 5e0000e4 | |
13058 | ! Mem[0000000030141410] = 9ce0b68a, %l1 = 000000000000005e | |
13059 | swapa [%i5+%o5]0x81,%l1 ! %l1 = 000000009ce0b68a | |
13060 | ! %l1 = 000000009ce0b68a, Mem[00000000100c1422] = 00000000, %asi = 80 | |
13061 | stha %l1,[%i3+0x022]%asi ! Mem[00000000100c1420] = 0000b68a | |
13062 | ! Starting 10 instruction Load Burst | |
13063 | ! Mem[0000000010001404] = ffffff06, %l3 = 0000000000000000 | |
13064 | ldsb [%i0+0x005],%l3 ! %l3 = ffffffffffffffff | |
13065 | ||
13066 | p0_label_297: | |
13067 | ! Mem[00000000100c1408] = 000000ff, %l3 = ffffffffffffffff | |
13068 | lduha [%i3+%o4]0x88,%l3 ! %l3 = 00000000000000ff | |
13069 | ! Mem[0000000010041410] = 00000000 ffffffff, %l2 = 9ce0b68a, %l3 = 000000ff | |
13070 | ldda [%i1+%o5]0x88,%l2 ! %l2 = 00000000ffffffff 0000000000000000 | |
13071 | membar #Sync ! Added by membar checker (72) | |
13072 | ! Mem[0000000030141400] = 00000000 0000001a 00000000 ff000000 | |
13073 | ! Mem[0000000030141410] = 0000005e 032cff8e 02226c6b 57119e5e | |
13074 | ! Mem[0000000030141420] = 925b1ad8 39aced3b 64479a75 bb9180c7 | |
13075 | ! Mem[0000000030141430] = ffffffff 365fc6fa ffffffff 000000ff | |
13076 | ldda [%i5]ASI_BLK_AIUSL,%f16 ! Block Load from 0000000030141400 | |
13077 | ! Mem[0000000030181400] = 00000000, %l7 = 00000000000000ff | |
13078 | ldsba [%i6+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
13079 | ! Mem[0000000010141410] = ffffffff, %l2 = 00000000ffffffff | |
13080 | lduwa [%i5+%o5]0x88,%l2 ! %l2 = 00000000ffffffff | |
13081 | ! Mem[0000000010101410] = 0000ffff, %f7 = 57119e5e | |
13082 | lda [%i4+%o5]0x80,%f7 ! %f7 = 0000ffff | |
13083 | ! Mem[0000000030081400] = ff0000ff, %l2 = 00000000ffffffff | |
13084 | ldsha [%i2+%g0]0x81,%l2 ! %l2 = ffffffffffffff00 | |
13085 | ! Mem[0000000010001410] = 00000000, %l6 = 0000000000000000 | |
13086 | lduha [%i0+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
13087 | ! Mem[0000000030041400] = ff000000, %l1 = 000000009ce0b68a | |
13088 | ldsha [%i1+%g0]0x81,%l1 ! %l1 = ffffffffffffff00 | |
13089 | ! Starting 10 instruction Store Burst | |
13090 | ! %l7 = 0000000000000000, Mem[0000000030101400] = ff000000 | |
13091 | stha %l7,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 | |
13092 | ||
13093 | p0_label_298: | |
13094 | ! %l5 = 0000000000000000, Mem[00000000100c1400] = 00ff00ff9ce0b6ff | |
13095 | stx %l5,[%i3+%g0] ! Mem[00000000100c1400] = 0000000000000000 | |
13096 | ! %l6 = 00000000, %l7 = 00000000, Mem[00000000300c1408] = ff000000 00000000 | |
13097 | stda %l6,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 00000000 00000000 | |
13098 | ! %l7 = 0000000000000000, Mem[0000000030101400] = 0000000000000000 | |
13099 | stxa %l7,[%i4+%g0]0x81 ! Mem[0000000030101400] = 0000000000000000 | |
13100 | membar #Sync ! Added by membar checker (73) | |
13101 | ! %l7 = 0000000000000000, Mem[0000000030141400] = 00000000 | |
13102 | stha %l7,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000 | |
13103 | ! %l4 = ffffffffffffffff, Mem[00000000100c1408] = ff000000 | |
13104 | stba %l4,[%i3+%o4]0x80 ! Mem[00000000100c1408] = ff000000 | |
13105 | ! Mem[0000000010141408] = 0000ffd7, %l5 = 0000000000000000 | |
13106 | ldstuba [%i5+%o4]0x88,%l5 ! %l5 = 000000d7000000ff | |
13107 | ! %l6 = 0000000000000000, Mem[0000000030101400] = 00000000 | |
13108 | stba %l6,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 | |
13109 | ! %l2 = ffffff00, %l3 = 00000000, Mem[0000000010101410] = ffff0000 000000ff | |
13110 | stda %l2,[%i4+%o5]0x88 ! Mem[0000000010101410] = ffffff00 00000000 | |
13111 | ! Mem[00000000100c1408] = ff000000, %l1 = ffffffffffffff00 | |
13112 | swapa [%i3+%o4]0x80,%l1 ! %l1 = 00000000ff000000 | |
13113 | ! Starting 10 instruction Load Burst | |
13114 | ! Mem[0000000030041400] = ff000000 00000000, %l2 = ffffff00, %l3 = 00000000 | |
13115 | ldda [%i1+%g0]0x81,%l2 ! %l2 = 00000000ff000000 0000000000000000 | |
13116 | ||
13117 | p0_label_299: | |
13118 | ! Mem[0000000010101400] = ffff275e caffffff, %l4 = ffffffff, %l5 = 000000d7 | |
13119 | ldda [%i4+%g0]0x80,%l4 ! %l4 = 00000000ffff275e 00000000caffffff | |
13120 | ! Mem[0000000030001408] = 5e9e1157, %l5 = 00000000caffffff | |
13121 | lduba [%i0+%o4]0x81,%l5 ! %l5 = 000000000000005e | |
13122 | ! Mem[00000000201c0000] = ff001669, %l6 = 0000000000000000 | |
13123 | lduha [%o0+0x000]%asi,%l6 ! %l6 = 000000000000ff00 | |
13124 | ! Mem[0000000010081410] = ffd7ffffd7ffffff, %f8 = 925b1ad8 39aced3b | |
13125 | ldda [%i2+%o5]0x80,%f8 ! %f8 = ffd7ffff d7ffffff | |
13126 | ! Mem[0000000030101400] = 00000000, %l3 = 0000000000000000 | |
13127 | ldsba [%i4+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
13128 | ! Mem[0000000030141408] = 00000000, %l2 = 00000000ff000000 | |
13129 | lduba [%i5+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
13130 | ! Mem[0000000010141410] = ffffffff, %l3 = 0000000000000000 | |
13131 | lduwa [%i5+%o5]0x88,%l3 ! %l3 = 00000000ffffffff | |
13132 | ! Mem[0000000030001408] = 57119e5e, %l1 = 00000000ff000000 | |
13133 | lduha [%i0+%o4]0x89,%l1 ! %l1 = 0000000000009e5e | |
13134 | ! Mem[0000000010181414] = ff000000, %l1 = 0000000000009e5e | |
13135 | lduh [%i6+0x016],%l1 ! %l1 = 0000000000000000 | |
13136 | ! Starting 10 instruction Store Burst | |
13137 | ! Mem[0000000030141400] = 00000000, %l5 = 000000000000005e | |
13138 | ldstuba [%i5+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
13139 | ||
13140 | p0_label_300: | |
13141 | ! %l4 = ffff275e, %l5 = 00000000, Mem[00000000300c1408] = 00000000 00000000 | |
13142 | stda %l4,[%i3+%o4]0x89 ! Mem[00000000300c1408] = ffff275e 00000000 | |
13143 | ! %l2 = 0000000000000000, Mem[00000000100c142f] = 00000000 | |
13144 | stb %l2,[%i3+0x02f] ! Mem[00000000100c142c] = 00000000 | |
13145 | ! Mem[0000000010141438] = cd10ffc4, %l6 = 000000000000ff00 | |
13146 | swap [%i5+0x038],%l6 ! %l6 = 00000000cd10ffc4 | |
13147 | ! Mem[0000000010101400] = ffff275e, %l5 = 0000000000000000, %asi = 80 | |
13148 | swapa [%i4+0x000]%asi,%l5 ! %l5 = 00000000ffff275e | |
13149 | ! %l2 = 0000000000000000, Mem[0000000010081400] = 00000000ff000000 | |
13150 | stxa %l2,[%i2+%g0]0x88 ! Mem[0000000010081400] = 0000000000000000 | |
13151 | ! Mem[0000000010001408] = 00000000, %l4 = 00000000ffff275e | |
13152 | swapa [%i0+%o4]0x88,%l4 ! %l4 = 0000000000000000 | |
13153 | ! %l6 = 00000000cd10ffc4, Mem[0000000010001406] = ffffff06 | |
13154 | sth %l6,[%i0+0x006] ! Mem[0000000010001404] = ffffffc4 | |
13155 | ! %f4 = 9ce0b68a 032cff8e, Mem[0000000010041410] = ffffffff 00000000 | |
13156 | stda %f4 ,[%i1+%o5]0x88 ! Mem[0000000010041410] = 9ce0b68a 032cff8e | |
13157 | ! %f19 = 00000000, Mem[0000000010141420] = ffffffb4 | |
13158 | sta %f19,[%i5+0x020]%asi ! Mem[0000000010141420] = 00000000 | |
13159 | ! Starting 10 instruction Load Burst | |
13160 | ! Mem[0000000010041410] = 9ce0b68a032cff8e, %f8 = ffd7ffff d7ffffff | |
13161 | ldda [%i1+%o5]0x88,%f8 ! %f8 = 9ce0b68a 032cff8e | |
13162 | ||
13163 | ! Check Point 60 for processor 0 | |
13164 | ||
13165 | set p0_check_pt_data_60,%g4 | |
13166 | rd %ccr,%g5 ! %g5 = 44 | |
13167 | ldx [%g4+0x08],%g2 | |
13168 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
13169 | bne %xcc,p0_reg_check_fail1 | |
13170 | mov 0xee1,%g1 | |
13171 | ldx [%g4+0x10],%g2 | |
13172 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
13173 | bne %xcc,p0_reg_check_fail2 | |
13174 | mov 0xee2,%g1 | |
13175 | ldx [%g4+0x18],%g2 | |
13176 | cmp %l3,%g2 ! %l3 = 00000000ffffffff | |
13177 | bne %xcc,p0_reg_check_fail3 | |
13178 | mov 0xee3,%g1 | |
13179 | ldx [%g4+0x20],%g2 | |
13180 | cmp %l5,%g2 ! %l5 = 00000000ffff275e | |
13181 | bne %xcc,p0_reg_check_fail5 | |
13182 | mov 0xee5,%g1 | |
13183 | ldx [%g4+0x28],%g2 | |
13184 | cmp %l6,%g2 ! %l6 = 00000000cd10ffc4 | |
13185 | bne %xcc,p0_reg_check_fail6 | |
13186 | mov 0xee6,%g1 | |
13187 | ldx [%g4+0x30],%g2 | |
13188 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
13189 | bne %xcc,p0_reg_check_fail7 | |
13190 | mov 0xee7,%g1 | |
13191 | ldx [%g4+0x38],%g3 | |
13192 | std %f2,[%g4] | |
13193 | ldx [%g4],%g2 | |
13194 | cmp %g3,%g2 ! %f2 = bb9180c7 ff000000 | |
13195 | bne %xcc,p0_freg_check_fail | |
13196 | mov 0xf02,%g1 | |
13197 | ldx [%g4+0x40],%g3 | |
13198 | std %f4,[%g4] | |
13199 | ldx [%g4],%g2 | |
13200 | cmp %g3,%g2 ! %f4 = 9ce0b68a 032cff8e | |
13201 | bne %xcc,p0_freg_check_fail | |
13202 | mov 0xf04,%g1 | |
13203 | ldx [%g4+0x48],%g3 | |
13204 | std %f6,[%g4] | |
13205 | ldx [%g4],%g2 | |
13206 | cmp %g3,%g2 ! %f6 = 02226c6b 0000ffff | |
13207 | bne %xcc,p0_freg_check_fail | |
13208 | mov 0xf06,%g1 | |
13209 | ldx [%g4+0x50],%g3 | |
13210 | std %f8,[%g4] | |
13211 | ldx [%g4],%g2 | |
13212 | cmp %g3,%g2 ! %f8 = 9ce0b68a 032cff8e | |
13213 | bne %xcc,p0_freg_check_fail | |
13214 | mov 0xf08,%g1 | |
13215 | ldx [%g4+0x58],%g3 | |
13216 | std %f16,[%g4] | |
13217 | ldx [%g4],%g2 | |
13218 | cmp %g3,%g2 ! %f16 = 1a000000 00000000 | |
13219 | bne %xcc,p0_freg_check_fail | |
13220 | mov 0xf16,%g1 | |
13221 | ldx [%g4+0x60],%g3 | |
13222 | std %f18,[%g4] | |
13223 | ldx [%g4],%g2 | |
13224 | cmp %g3,%g2 ! %f18 = 000000ff 00000000 | |
13225 | bne %xcc,p0_freg_check_fail | |
13226 | mov 0xf18,%g1 | |
13227 | ldx [%g4+0x68],%g3 | |
13228 | std %f20,[%g4] | |
13229 | ldx [%g4],%g2 | |
13230 | cmp %g3,%g2 ! %f20 = 8eff2c03 5e000000 | |
13231 | bne %xcc,p0_freg_check_fail | |
13232 | mov 0xf20,%g1 | |
13233 | ldx [%g4+0x70],%g3 | |
13234 | std %f22,[%g4] | |
13235 | ldx [%g4],%g2 | |
13236 | cmp %g3,%g2 ! %f22 = 5e9e1157 6b6c2202 | |
13237 | bne %xcc,p0_freg_check_fail | |
13238 | mov 0xf22,%g1 | |
13239 | ldx [%g4+0x78],%g3 | |
13240 | std %f24,[%g4] | |
13241 | ldx [%g4],%g2 | |
13242 | cmp %g3,%g2 ! %f24 = 3bedac39 d81a5b92 | |
13243 | bne %xcc,p0_freg_check_fail | |
13244 | mov 0xf24,%g1 | |
13245 | ldx [%g4+0x80],%g3 | |
13246 | std %f26,[%g4] | |
13247 | ldx [%g4],%g2 | |
13248 | cmp %g3,%g2 ! %f26 = c78091bb 759a4764 | |
13249 | bne %xcc,p0_freg_check_fail | |
13250 | mov 0xf26,%g1 | |
13251 | ldx [%g4+0x88],%g3 | |
13252 | std %f28,[%g4] | |
13253 | ldx [%g4],%g2 | |
13254 | cmp %g3,%g2 ! %f28 = fac65f36 ffffffff | |
13255 | bne %xcc,p0_freg_check_fail | |
13256 | mov 0xf28,%g1 | |
13257 | ldx [%g4+0x90],%g3 | |
13258 | std %f30,[%g4] | |
13259 | ldx [%g4],%g2 | |
13260 | cmp %g3,%g2 ! %f30 = ff000000 ffffffff | |
13261 | bne %xcc,p0_freg_check_fail | |
13262 | mov 0xf30,%g1 | |
13263 | ||
13264 | ! Check Point 60 completed | |
13265 | ||
13266 | ||
13267 | p0_label_301: | |
13268 | ! Mem[00000000100c1410] = 0000003bffd700ff, %l3 = 00000000ffffffff | |
13269 | ldxa [%i3+%o5]0x88,%l3 ! %l3 = 0000003bffd700ff | |
13270 | ! Mem[0000000010141408] = ffff0000000000ff, %f18 = 000000ff 00000000 | |
13271 | ldda [%i5+%o4]0x80,%f18 ! %f18 = ffff0000 000000ff | |
13272 | ! Mem[0000000010081410] = ffffd7ff, %l5 = 00000000ffff275e | |
13273 | ldsba [%i2+%o5]0x88,%l5 ! %l5 = ffffffffffffffff | |
13274 | ! Mem[0000000010081400] = 00000000 00000000, %l2 = 00000000, %l3 = ffd700ff | |
13275 | ldda [%i2+%g0]0x80,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
13276 | ! Mem[0000000020800040] = ffff9ffa, %l6 = 00000000cd10ffc4 | |
13277 | ldsh [%o1+0x040],%l6 ! %l6 = ffffffffffffffff | |
13278 | ! Mem[0000000010001408] = ffff275e, %l7 = 0000000000000000 | |
13279 | lduha [%i0+%o4]0x88,%l7 ! %l7 = 000000000000275e | |
13280 | ! Mem[00000000100c1414] = 3b000000, %l1 = 0000000000000000 | |
13281 | ldswa [%i3+0x014]%asi,%l1 ! %l1 = 000000003b000000 | |
13282 | ! Mem[0000000030141408] = 00000000, %l1 = 000000003b000000 | |
13283 | lduba [%i5+%o4]0x89,%l1 ! %l1 = 0000000000000000 | |
13284 | ! Mem[00000000300c1400] = 000000ff, %l0 = 00000000000000ff | |
13285 | ldsba [%i3+%g0]0x89,%l0 ! %l0 = ffffffffffffffff | |
13286 | ! Starting 10 instruction Store Burst | |
13287 | ! Mem[0000000010081400] = 00000000, %l1 = 0000000000000000 | |
13288 | ldstuba [%i2+%g0]0x80,%l1 ! %l1 = 00000000000000ff | |
13289 | ||
13290 | p0_label_302: | |
13291 | ! Mem[0000000030181408] = 000000ff, %l6 = ffffffffffffffff | |
13292 | ldstuba [%i6+%o4]0x81,%l6 ! %l6 = 00000000000000ff | |
13293 | ! Mem[00000000300c1408] = ffff275e, %l1 = 0000000000000000 | |
13294 | ldstuba [%i3+%o4]0x89,%l1 ! %l1 = 0000005e000000ff | |
13295 | ! %l0 = ffffffffffffffff, Mem[0000000030181400] = 00000000 | |
13296 | stwa %l0,[%i6+%g0]0x89 ! Mem[0000000030181400] = ffffffff | |
13297 | ! %l6 = 0000000000000000, Mem[0000000030141400] = 000000ff | |
13298 | stwa %l6,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000 | |
13299 | ! Mem[00000000100c1424] = d81a5b92, %l0 = ffffffffffffffff, %asi = 80 | |
13300 | swapa [%i3+0x024]%asi,%l0 ! %l0 = 00000000d81a5b92 | |
13301 | ! %l3 = 0000000000000000, Mem[0000000010041400] = 000000ff | |
13302 | stba %l3,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 | |
13303 | ! %l4 = 0000000000000000, Mem[0000000010141408] = 0000ffff | |
13304 | stha %l4,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000000 | |
13305 | ! %f2 = bb9180c7 ff000000, Mem[00000000100c1410] = ff00d7ff 3b000000 | |
13306 | stda %f2 ,[%i3+%o5]0x80 ! Mem[00000000100c1410] = bb9180c7 ff000000 | |
13307 | ! %f7 = 0000ffff, Mem[0000000010101408] = 000000ff | |
13308 | sta %f7 ,[%i4+%o4]0x88 ! Mem[0000000010101408] = 0000ffff | |
13309 | ! Starting 10 instruction Load Burst | |
13310 | ! Mem[00000000100c1410] = bb9180c7, %l1 = 000000000000005e | |
13311 | ldsba [%i3+%o5]0x80,%l1 ! %l1 = ffffffffffffffbb | |
13312 | ||
13313 | p0_label_303: | |
13314 | ! Mem[0000000030181400] = ffffffff, %l0 = 00000000d81a5b92 | |
13315 | lduha [%i6+%g0]0x89,%l0 ! %l0 = 000000000000ffff | |
13316 | ! Mem[0000000030141400] = 1a00000000000000, %f10 = 64479a75 bb9180c7 | |
13317 | ldda [%i5+%g0]0x89,%f10 ! %f10 = 1a000000 00000000 | |
13318 | ! Mem[0000000030101400] = 00000000, %l2 = 0000000000000000 | |
13319 | ldsba [%i4+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
13320 | ! Mem[0000000010041408] = e400005e, %l3 = 0000000000000000 | |
13321 | ldsha [%i1+%o4]0x88,%l3 ! %l3 = 000000000000005e | |
13322 | ! Mem[0000000010001408] = 5e27ffff0000005e, %l0 = 000000000000ffff | |
13323 | ldxa [%i0+0x008]%asi,%l0 ! %l0 = 5e27ffff0000005e | |
13324 | ! Mem[00000000300c1408] = ff27ffff00000000, %l5 = ffffffffffffffff | |
13325 | ldxa [%i3+%o4]0x81,%l5 ! %l5 = ff27ffff00000000 | |
13326 | ! Mem[0000000030081410] = 000000ff, %l4 = 0000000000000000 | |
13327 | lduba [%i2+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
13328 | ! Mem[0000000030101408] = ffffffff, %l1 = ffffffffffffffbb | |
13329 | ldsha [%i4+%o4]0x81,%l1 ! %l1 = ffffffffffffffff | |
13330 | ! Mem[0000000010141438] = 0000ff00, %l0 = 5e27ffff0000005e | |
13331 | ldsba [%i5+0x03a]%asi,%l0 ! %l0 = ffffffffffffffff | |
13332 | ! Starting 10 instruction Store Burst | |
13333 | ! Mem[00000000300c1410] = 57110000, %l4 = 00000000000000ff | |
13334 | ldstuba [%i3+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
13335 | ||
13336 | p0_label_304: | |
13337 | ! %l4 = 0000000000000000, Mem[0000000010181410] = 57115e00 | |
13338 | stwa %l4,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000 | |
13339 | ! %f26 = c78091bb 759a4764, Mem[0000000010181438] = ffffffff 032cff8e | |
13340 | std %f26,[%i6+0x038] ! Mem[0000000010181438] = c78091bb 759a4764 | |
13341 | ! %f16 = 1a000000, Mem[0000000030041400] = 000000ff | |
13342 | sta %f16,[%i1+%g0]0x89 ! Mem[0000000030041400] = 1a000000 | |
13343 | ! Mem[00000000100c1400] = 00000000, %l2 = 0000000000000000 | |
13344 | ldstuba [%i3+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
13345 | ! %l3 = 000000000000005e, Mem[0000000010041410] = 8eff2c03 | |
13346 | stwa %l3,[%i1+%o5]0x80 ! Mem[0000000010041410] = 0000005e | |
13347 | ! %l4 = 0000000000000000, Mem[0000000030081410] = 000000ff | |
13348 | stwa %l4,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00000000 | |
13349 | ! Mem[0000000030081410] = 00000000, %l1 = ffffffffffffffff | |
13350 | swapa [%i2+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
13351 | ! Mem[0000000010101410] = ffffff00, %l5 = ff27ffff00000000 | |
13352 | swapa [%i4+%o5]0x88,%l5 ! %l5 = 00000000ffffff00 | |
13353 | ! Mem[0000000010141424] = ff000000, %l4 = 0000000000000000 | |
13354 | swap [%i5+0x024],%l4 ! %l4 = 00000000ff000000 | |
13355 | ! Starting 10 instruction Load Burst | |
13356 | ! Mem[0000000010141410] = ffffffff, %l7 = 000000000000275e | |
13357 | ldswa [%i5+%o5]0x88,%l7 ! %l7 = ffffffffffffffff | |
13358 | ||
13359 | p0_label_305: | |
13360 | ! Mem[0000000010001410] = 00000000, %l1 = 0000000000000000 | |
13361 | lduha [%i0+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
13362 | ! Mem[0000000010141400] = 00000000ff000000, %l2 = 0000000000000000 | |
13363 | ldxa [%i5+%g0]0x80,%l2 ! %l2 = 00000000ff000000 | |
13364 | ! Mem[0000000010001408] = 5e27ffff0000005e, %f8 = 9ce0b68a 032cff8e | |
13365 | ldda [%i0+%o4]0x80,%f8 ! %f8 = 5e27ffff 0000005e | |
13366 | ! Mem[0000000030141410] = 0000005e, %l1 = 0000000000000000 | |
13367 | ldswa [%i5+%o5]0x81,%l1 ! %l1 = 000000000000005e | |
13368 | ! Mem[0000000010041410] = 5e000000, %l7 = ffffffffffffffff | |
13369 | ldswa [%i1+%o5]0x88,%l7 ! %l7 = 000000005e000000 | |
13370 | ! Mem[0000000030101410] = 3bedacff, %l2 = 00000000ff000000 | |
13371 | ldswa [%i4+%o5]0x89,%l2 ! %l2 = 000000003bedacff | |
13372 | ! Mem[0000000010081434] = e0ffffff, %l1 = 000000000000005e | |
13373 | ldsba [%i2+0x037]%asi,%l1 ! %l1 = ffffffffffffffff | |
13374 | ! Mem[0000000010041408] = e400005e, %l2 = 000000003bedacff | |
13375 | lduha [%i1+%o4]0x88,%l2 ! %l2 = 000000000000005e | |
13376 | ! Mem[00000000100c1400] = ff000000, %l5 = 00000000ffffff00 | |
13377 | ldsha [%i3+0x000]%asi,%l5 ! %l5 = ffffffffffffff00 | |
13378 | ! Starting 10 instruction Store Burst | |
13379 | ! %f16 = 1a000000 00000000, %l2 = 000000000000005e | |
13380 | ! Mem[00000000300c1408] = ff27ffff00000000 | |
13381 | add %i3,0x008,%g1 | |
13382 | stda %f16,[%g1+%l2]ASI_PST8_S ! Mem[00000000300c1408] = ff00ff0000000000 | |
13383 | ||
13384 | ! Check Point 61 for processor 0 | |
13385 | ||
13386 | set p0_check_pt_data_61,%g4 | |
13387 | rd %ccr,%g5 ! %g5 = 44 | |
13388 | ldx [%g4+0x08],%g2 | |
13389 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
13390 | bne %xcc,p0_reg_check_fail0 | |
13391 | mov 0xee0,%g1 | |
13392 | ldx [%g4+0x10],%g2 | |
13393 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
13394 | bne %xcc,p0_reg_check_fail1 | |
13395 | mov 0xee1,%g1 | |
13396 | ldx [%g4+0x18],%g2 | |
13397 | cmp %l2,%g2 ! %l2 = 000000000000005e | |
13398 | bne %xcc,p0_reg_check_fail2 | |
13399 | mov 0xee2,%g1 | |
13400 | ldx [%g4+0x20],%g2 | |
13401 | cmp %l3,%g2 ! %l3 = 000000000000005e | |
13402 | bne %xcc,p0_reg_check_fail3 | |
13403 | mov 0xee3,%g1 | |
13404 | ldx [%g4+0x28],%g2 | |
13405 | cmp %l4,%g2 ! %l4 = 00000000ff000000 | |
13406 | bne %xcc,p0_reg_check_fail4 | |
13407 | mov 0xee4,%g1 | |
13408 | ldx [%g4+0x30],%g2 | |
13409 | cmp %l5,%g2 ! %l5 = ffffffffffffff00 | |
13410 | bne %xcc,p0_reg_check_fail5 | |
13411 | mov 0xee5,%g1 | |
13412 | ldx [%g4+0x38],%g2 | |
13413 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
13414 | bne %xcc,p0_reg_check_fail6 | |
13415 | mov 0xee6,%g1 | |
13416 | ldx [%g4+0x40],%g2 | |
13417 | cmp %l7,%g2 ! %l7 = 000000005e000000 | |
13418 | bne %xcc,p0_reg_check_fail7 | |
13419 | mov 0xee7,%g1 | |
13420 | ldx [%g4+0x48],%g3 | |
13421 | std %f2,[%g4] | |
13422 | ldx [%g4],%g2 | |
13423 | cmp %g3,%g2 ! %f2 = bb9180c7 ff000000 | |
13424 | bne %xcc,p0_freg_check_fail | |
13425 | mov 0xf02,%g1 | |
13426 | ldx [%g4+0x50],%g3 | |
13427 | std %f8,[%g4] | |
13428 | ldx [%g4],%g2 | |
13429 | cmp %g3,%g2 ! %f8 = 5e27ffff 0000005e | |
13430 | bne %xcc,p0_freg_check_fail | |
13431 | mov 0xf08,%g1 | |
13432 | ldx [%g4+0x58],%g3 | |
13433 | std %f10,[%g4] | |
13434 | ldx [%g4],%g2 | |
13435 | cmp %g3,%g2 ! %f10 = 1a000000 00000000 | |
13436 | bne %xcc,p0_freg_check_fail | |
13437 | mov 0xf10,%g1 | |
13438 | ldx [%g4+0x60],%g3 | |
13439 | std %f18,[%g4] | |
13440 | ldx [%g4],%g2 | |
13441 | cmp %g3,%g2 ! %f18 = ffff0000 000000ff | |
13442 | bne %xcc,p0_freg_check_fail | |
13443 | mov 0xf18,%g1 | |
13444 | ||
13445 | ! Check Point 61 completed | |
13446 | ||
13447 | ||
13448 | p0_label_306: | |
13449 | ! %f2 = bb9180c7 ff000000, %l0 = ffffffffffffffff | |
13450 | ! Mem[0000000030181410] = e700000000000057 | |
13451 | add %i6,0x010,%g1 | |
13452 | stda %f2,[%g1+%l0]ASI_PST16_S ! Mem[0000000030181410] = bb9180c7ff000000 | |
13453 | ! %l1 = ffffffffffffffff, Mem[0000000010001400] = ffffff5e | |
13454 | stba %l1,[%i0+%g0]0x88 ! Mem[0000000010001400] = ffffffff | |
13455 | ! %l2 = 000000000000005e, Mem[0000000030081408] = 00000000 | |
13456 | stba %l2,[%i2+%o4]0x89 ! Mem[0000000030081408] = 0000005e | |
13457 | ! %l2 = 000000000000005e, Mem[00000000100c1400] = ff000000 | |
13458 | stba %l2,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 5e000000 | |
13459 | ! Mem[0000000020800000] = ff060db6, %l2 = 000000000000005e | |
13460 | ldsb [%o1+%g0],%l2 ! %l2 = ffffffffffffffff | |
13461 | ! %l5 = ffffffffffffff00, Mem[00000000201c0000] = ff001669, %asi = 80 | |
13462 | stba %l5,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00001669 | |
13463 | ! Mem[0000000030101408] = ffffffff, %l5 = ffffffffffffff00 | |
13464 | swapa [%i4+%o4]0x89,%l5 ! %l5 = 00000000ffffffff | |
13465 | ! Mem[0000000010041408] = e400005e, %l5 = 00000000ffffffff | |
13466 | ldstuba [%i1+%o4]0x88,%l5 ! %l5 = 0000005e000000ff | |
13467 | ! Mem[00000000201c0001] = 00001669, %l6 = 0000000000000000 | |
13468 | ldstub [%o0+0x001],%l6 ! %l6 = 00000000000000ff | |
13469 | ! Starting 10 instruction Load Burst | |
13470 | membar #Sync ! Added by membar checker (74) | |
13471 | ! Mem[0000000030141400] = 00000000 0000001a 00000000 ff000000 | |
13472 | ! Mem[0000000030141410] = 0000005e 032cff8e 02226c6b 57119e5e | |
13473 | ! Mem[0000000030141420] = 925b1ad8 39aced3b 64479a75 bb9180c7 | |
13474 | ! Mem[0000000030141430] = ffffffff 365fc6fa ffffffff 000000ff | |
13475 | ldda [%i5]ASI_BLK_S,%f16 ! Block Load from 0000000030141400 | |
13476 | ||
13477 | p0_label_307: | |
13478 | ! Mem[0000000010001408] = ffff275e, %l2 = ffffffffffffffff | |
13479 | lduha [%i0+%o4]0x88,%l2 ! %l2 = 000000000000275e | |
13480 | ! Mem[000000001010143c] = 00000000, %l6 = 0000000000000000 | |
13481 | ldswa [%i4+0x03c]%asi,%l6 ! %l6 = 0000000000000000 | |
13482 | ! Mem[00000000300c1400] = 000000e2000000ff, %f4 = 9ce0b68a 032cff8e | |
13483 | ldda [%i3+%g0]0x89,%f4 ! %f4 = 000000e2 000000ff | |
13484 | ! Mem[0000000010041410] = 5e000000, %l0 = ffffffffffffffff | |
13485 | lduwa [%i1+%o5]0x88,%l0 ! %l0 = 000000005e000000 | |
13486 | ! Mem[00000000100c1410] = c78091bb, %l1 = ffffffffffffffff | |
13487 | lduwa [%i3+%o5]0x88,%l1 ! %l1 = 00000000c78091bb | |
13488 | ! Mem[0000000030081410] = ffffffff, %l3 = 000000000000005e | |
13489 | ldsha [%i2+%o5]0x89,%l3 ! %l3 = ffffffffffffffff | |
13490 | ! Mem[00000000201c0000] = 00ff1669, %l5 = 000000000000005e | |
13491 | ldsb [%o0+%g0],%l5 ! %l5 = 0000000000000000 | |
13492 | ! Mem[0000000010081408] = 00000000, %l1 = 00000000c78091bb | |
13493 | ldswa [%i2+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
13494 | ! Mem[0000000030081408] = 5e000000000000ff, %f0 = 00000000 0000001a | |
13495 | ldda [%i2+%o4]0x81,%f0 ! %f0 = 5e000000 000000ff | |
13496 | ! Starting 10 instruction Store Burst | |
13497 | ! %l4 = ff000000, %l5 = 00000000, Mem[00000000300c1410] = ff001157 00000000 | |
13498 | stda %l4,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ff000000 00000000 | |
13499 | ||
13500 | p0_label_308: | |
13501 | ! %f4 = 000000e2, Mem[0000000030001410] = ffffffff | |
13502 | sta %f4 ,[%i0+%o5]0x81 ! Mem[0000000030001410] = 000000e2 | |
13503 | ! Mem[0000000030041400] = 1a000000, %l3 = ffffffffffffffff | |
13504 | ldstuba [%i1+%g0]0x89,%l3 ! %l3 = 00000000000000ff | |
13505 | ! %f12 = ffffffff, Mem[0000000010181424] = 0000578b | |
13506 | st %f12,[%i6+0x024] ! Mem[0000000010181424] = ffffffff | |
13507 | ! %f0 = 5e000000 000000ff, %l5 = 0000000000000000 | |
13508 | ! Mem[0000000030101430] = fac65f369ce0b68a | |
13509 | add %i4,0x030,%g1 | |
13510 | stda %f0,[%g1+%l5]ASI_PST32_S ! Mem[0000000030101430] = fac65f369ce0b68a | |
13511 | membar #Sync ! Added by membar checker (75) | |
13512 | ! %l5 = 0000000000000000, Mem[0000000030141408] = 00000000 | |
13513 | stha %l5,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 | |
13514 | ! %f10 = 1a000000, Mem[0000000030101408] = 00ffffff | |
13515 | sta %f10,[%i4+%o4]0x81 ! Mem[0000000030101408] = 1a000000 | |
13516 | ! %l2 = 000000000000275e, Mem[0000000010101408] = ffff0000 | |
13517 | stba %l2,[%i4+%o4]0x80 ! Mem[0000000010101408] = 5eff0000 | |
13518 | ! %f18 = 00000000, Mem[0000000010041400] = 00000000 | |
13519 | sta %f18,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 | |
13520 | ! %l3 = 0000000000000000, Mem[0000000010141414] = ffffffff, %asi = 80 | |
13521 | stha %l3,[%i5+0x014]%asi ! Mem[0000000010141414] = 0000ffff | |
13522 | ! Starting 10 instruction Load Burst | |
13523 | ! Mem[0000000010081400] = ff000000, %l0 = 000000005e000000 | |
13524 | ldsba [%i2+%g0]0x80,%l0 ! %l0 = ffffffffffffffff | |
13525 | ||
13526 | p0_label_309: | |
13527 | ! Mem[0000000030081408] = ff0000000000005e, %l6 = 0000000000000000 | |
13528 | ldxa [%i2+%o4]0x89,%l6 ! %l6 = ff0000000000005e | |
13529 | ! Mem[0000000021800040] = ffff5e5c, %l4 = 00000000ff000000 | |
13530 | ldsh [%o3+0x040],%l4 ! %l4 = ffffffffffffffff | |
13531 | ! Mem[0000000010101400] = 00000000, %l3 = 0000000000000000 | |
13532 | ldswa [%i4+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
13533 | ! Mem[0000000010181400] = ff000000, %f29 = 365fc6fa | |
13534 | ld [%i6+%g0],%f29 ! %f29 = ff000000 | |
13535 | ! Mem[0000000010101420] = 00000000, %l3 = 0000000000000000 | |
13536 | ldsba [%i4+0x021]%asi,%l3 ! %l3 = 0000000000000000 | |
13537 | ! Mem[00000000300c1410] = ff00000000000000, %f16 = 00000000 0000001a | |
13538 | ldda [%i3+%o5]0x81,%f16 ! %f16 = ff000000 00000000 | |
13539 | ! %l5 = 0000000000000000, imm = 00000000000003b3, %l3 = 0000000000000000 | |
13540 | andn %l5,0x3b3,%l3 ! %l3 = 0000000000000000 | |
13541 | ! Mem[0000000030101410] = 3bedacff, %l0 = ffffffffffffffff | |
13542 | lduwa [%i4+%o5]0x89,%l0 ! %l0 = 000000003bedacff | |
13543 | ! Mem[0000000010181408] = 000000ff 00000000, %l6 = 0000005e, %l7 = 5e000000 | |
13544 | ldda [%i6+%o4]0x88,%l6 ! %l6 = 0000000000000000 00000000000000ff | |
13545 | ! Starting 10 instruction Store Burst | |
13546 | ! %l3 = 0000000000000000, Mem[0000000030001408] = 5e9e1157ffffffff | |
13547 | stxa %l3,[%i0+%o4]0x81 ! Mem[0000000030001408] = 0000000000000000 | |
13548 | ||
13549 | p0_label_310: | |
13550 | ! Mem[00000000211c0000] = ff00fe0c, %l1 = 0000000000000000 | |
13551 | ldstub [%o2+%g0],%l1 ! %l1 = 000000ff000000ff | |
13552 | ! %l4 = ffffffffffffffff, Mem[0000000030181410] = c78091bb | |
13553 | stha %l4,[%i6+%o5]0x89 ! Mem[0000000030181410] = c780ffff | |
13554 | ! %l2 = 000000000000275e, Mem[0000000010141400] = 00000000 | |
13555 | stwa %l2,[%i5+%g0]0x80 ! Mem[0000000010141400] = 0000275e | |
13556 | ! %f30 = ffffffff 000000ff, %l3 = 0000000000000000 | |
13557 | ! Mem[0000000010081410] = ffd7ffffd7ffffff | |
13558 | add %i2,0x010,%g1 | |
13559 | stda %f30,[%g1+%l3]ASI_PST8_PL ! Mem[0000000010081410] = ffd7ffffd7ffffff | |
13560 | ! %l6 = 00000000, %l7 = 000000ff, Mem[0000000030181410] = ffff80c7 ff000000 | |
13561 | stda %l6,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 000000ff | |
13562 | ! Mem[0000000030001408] = 00000000, %l4 = ffffffffffffffff | |
13563 | ldstuba [%i0+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
13564 | ! %l1 = 00000000000000ff, Mem[0000000030081410] = 00000000ffffffff | |
13565 | stxa %l1,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00000000000000ff | |
13566 | ! Mem[0000000010181408] = 00000000, %l1 = 00000000000000ff | |
13567 | ldstuba [%i6+%o4]0x88,%l1 ! %l1 = 00000000000000ff | |
13568 | ! %l7 = 00000000000000ff, Mem[000000001000140a] = 5e27ffff | |
13569 | stb %l7,[%i0+0x00a] ! Mem[0000000010001408] = 5e27ffff | |
13570 | ! Starting 10 instruction Load Burst | |
13571 | ! Mem[0000000030141408] = 00000000, %l6 = 0000000000000000 | |
13572 | lduha [%i5+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
13573 | ||
13574 | ! Check Point 62 for processor 0 | |
13575 | ||
13576 | set p0_check_pt_data_62,%g4 | |
13577 | rd %ccr,%g5 ! %g5 = 44 | |
13578 | ldx [%g4+0x08],%g2 | |
13579 | cmp %l0,%g2 ! %l0 = 000000003bedacff | |
13580 | bne %xcc,p0_reg_check_fail0 | |
13581 | mov 0xee0,%g1 | |
13582 | ldx [%g4+0x10],%g2 | |
13583 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
13584 | bne %xcc,p0_reg_check_fail1 | |
13585 | mov 0xee1,%g1 | |
13586 | ldx [%g4+0x18],%g2 | |
13587 | cmp %l2,%g2 ! %l2 = 000000000000275e | |
13588 | bne %xcc,p0_reg_check_fail2 | |
13589 | mov 0xee2,%g1 | |
13590 | ldx [%g4+0x20],%g2 | |
13591 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
13592 | bne %xcc,p0_reg_check_fail3 | |
13593 | mov 0xee3,%g1 | |
13594 | ldx [%g4+0x28],%g2 | |
13595 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
13596 | bne %xcc,p0_reg_check_fail4 | |
13597 | mov 0xee4,%g1 | |
13598 | ldx [%g4+0x30],%g2 | |
13599 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
13600 | bne %xcc,p0_reg_check_fail5 | |
13601 | mov 0xee5,%g1 | |
13602 | ldx [%g4+0x38],%g2 | |
13603 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
13604 | bne %xcc,p0_reg_check_fail6 | |
13605 | mov 0xee6,%g1 | |
13606 | ldx [%g4+0x40],%g3 | |
13607 | std %f0,[%g4] | |
13608 | ldx [%g4],%g2 | |
13609 | cmp %g3,%g2 ! %f0 = 5e000000 000000ff | |
13610 | bne %xcc,p0_freg_check_fail | |
13611 | mov 0xf00,%g1 | |
13612 | ldx [%g4+0x48],%g3 | |
13613 | std %f4,[%g4] | |
13614 | ldx [%g4],%g2 | |
13615 | cmp %g3,%g2 ! %f4 = 000000e2 000000ff | |
13616 | bne %xcc,p0_freg_check_fail | |
13617 | mov 0xf04,%g1 | |
13618 | ldx [%g4+0x50],%g3 | |
13619 | std %f6,[%g4] | |
13620 | ldx [%g4],%g2 | |
13621 | cmp %g3,%g2 ! %f6 = 02226c6b 0000ffff | |
13622 | bne %xcc,p0_freg_check_fail | |
13623 | mov 0xf06,%g1 | |
13624 | ldx [%g4+0x58],%g3 | |
13625 | std %f16,[%g4] | |
13626 | ldx [%g4],%g2 | |
13627 | cmp %g3,%g2 ! %f16 = ff000000 00000000 | |
13628 | bne %xcc,p0_freg_check_fail | |
13629 | mov 0xf16,%g1 | |
13630 | ldx [%g4+0x60],%g3 | |
13631 | std %f18,[%g4] | |
13632 | ldx [%g4],%g2 | |
13633 | cmp %g3,%g2 ! %f18 = 00000000 ff000000 | |
13634 | bne %xcc,p0_freg_check_fail | |
13635 | mov 0xf18,%g1 | |
13636 | ldx [%g4+0x68],%g3 | |
13637 | std %f20,[%g4] | |
13638 | ldx [%g4],%g2 | |
13639 | cmp %g3,%g2 ! %f20 = 0000005e 032cff8e | |
13640 | bne %xcc,p0_freg_check_fail | |
13641 | mov 0xf20,%g1 | |
13642 | ldx [%g4+0x70],%g3 | |
13643 | std %f22,[%g4] | |
13644 | ldx [%g4],%g2 | |
13645 | cmp %g3,%g2 ! %f22 = 02226c6b 57119e5e | |
13646 | bne %xcc,p0_freg_check_fail | |
13647 | mov 0xf22,%g1 | |
13648 | ldx [%g4+0x78],%g3 | |
13649 | std %f24,[%g4] | |
13650 | ldx [%g4],%g2 | |
13651 | cmp %g3,%g2 ! %f24 = 925b1ad8 39aced3b | |
13652 | bne %xcc,p0_freg_check_fail | |
13653 | mov 0xf24,%g1 | |
13654 | ldx [%g4+0x80],%g3 | |
13655 | std %f26,[%g4] | |
13656 | ldx [%g4],%g2 | |
13657 | cmp %g3,%g2 ! %f26 = 64479a75 bb9180c7 | |
13658 | bne %xcc,p0_freg_check_fail | |
13659 | mov 0xf26,%g1 | |
13660 | ldx [%g4+0x88],%g3 | |
13661 | std %f28,[%g4] | |
13662 | ldx [%g4],%g2 | |
13663 | cmp %g3,%g2 ! %f28 = ffffffff ff000000 | |
13664 | bne %xcc,p0_freg_check_fail | |
13665 | mov 0xf28,%g1 | |
13666 | ldx [%g4+0x90],%g3 | |
13667 | std %f30,[%g4] | |
13668 | ldx [%g4],%g2 | |
13669 | cmp %g3,%g2 ! %f30 = ffffffff 000000ff | |
13670 | bne %xcc,p0_freg_check_fail | |
13671 | mov 0xf30,%g1 | |
13672 | ||
13673 | ! Check Point 62 completed | |
13674 | ||
13675 | ||
13676 | p0_label_311: | |
13677 | ! Mem[0000000010181410] = 00000000ff000000, %f4 = 000000e2 000000ff | |
13678 | ldda [%i6+%o5]0x80,%f4 ! %f4 = 00000000 ff000000 | |
13679 | ! Mem[00000000300c1408] = ff00ff00, %l0 = 000000003bedacff | |
13680 | ldswa [%i3+%o4]0x81,%l0 ! %l0 = ffffffffff00ff00 | |
13681 | ! Mem[0000000010041400] = 00000000ff000000, %f24 = 925b1ad8 39aced3b | |
13682 | ldda [%i1+%g0]0x80,%f24 ! %f24 = 00000000 ff000000 | |
13683 | ! Mem[0000000010181410] = 00000000, %l0 = ffffffffff00ff00 | |
13684 | ldswa [%i6+%o5]0x88,%l0 ! %l0 = 0000000000000000 | |
13685 | ! Mem[0000000010141418] = ffffffff 57119e5e, %l0 = 00000000, %l1 = 00000000 | |
13686 | ldd [%i5+0x018],%l0 ! %l0 = 00000000ffffffff 0000000057119e5e | |
13687 | ! Mem[0000000030101400] = 0000000000000000, %l1 = 0000000057119e5e | |
13688 | ldxa [%i4+%g0]0x81,%l1 ! %l1 = 0000000000000000 | |
13689 | ! Mem[0000000030141408] = 000000ff 00000000, %l4 = 00000000, %l5 = 00000000 | |
13690 | ldda [%i5+%o4]0x89,%l4 ! %l4 = 0000000000000000 00000000000000ff | |
13691 | ! Mem[0000000010181400] = ff000000, %f10 = 1a000000 | |
13692 | lda [%i6+0x000]%asi,%f10 ! %f10 = ff000000 | |
13693 | ! Mem[0000000010081400] = 000000ff, %l1 = 0000000000000000 | |
13694 | ldsba [%i2+%g0]0x88,%l1 ! %l1 = ffffffffffffffff | |
13695 | ! Starting 10 instruction Store Burst | |
13696 | ! Mem[000000001010140e] = 00000000, %l0 = 00000000ffffffff | |
13697 | ldstub [%i4+0x00e],%l0 ! %l0 = 00000000000000ff | |
13698 | ||
13699 | p0_label_312: | |
13700 | ! Mem[00000000218001c0] = 9623fa38, %l3 = 0000000000000000 | |
13701 | ldstuba [%o3+0x1c0]%asi,%l3 ! %l3 = 00000096000000ff | |
13702 | ! %l5 = 00000000000000ff, Mem[0000000030141410] = 5e000000 | |
13703 | stba %l5,[%i5+%o5]0x89 ! Mem[0000000030141410] = 5e0000ff | |
13704 | ! Mem[0000000030141410] = 5e0000ff, %l5 = 00000000000000ff | |
13705 | ldstuba [%i5+%o5]0x89,%l5 ! %l5 = 000000ff000000ff | |
13706 | ! %l5 = 00000000000000ff, Mem[00000000100c1408] = ffffff00 | |
13707 | stba %l5,[%i3+%o4]0x80 ! Mem[00000000100c1408] = ffffff00 | |
13708 | ! Mem[0000000010081431] = 0f10ffff, %l5 = 00000000000000ff | |
13709 | ldstuba [%i2+0x031]%asi,%l5 ! %l5 = 00000010000000ff | |
13710 | ! %l0 = 00000000, %l1 = ffffffff, Mem[0000000030101408] = 0000001a ffffffff | |
13711 | stda %l0,[%i4+%o4]0x89 ! Mem[0000000030101408] = 00000000 ffffffff | |
13712 | ! %l6 = 0000000000000000, Mem[0000000030041410] = 00000000 | |
13713 | stwa %l6,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000 | |
13714 | ! %l2 = 0000275e, %l3 = 00000096, Mem[0000000010081408] = 00000000 00000000 | |
13715 | stda %l2,[%i2+%o4]0x80 ! Mem[0000000010081408] = 0000275e 00000096 | |
13716 | ! %f5 = ff000000, Mem[0000000010001434] = e0ffffff | |
13717 | sta %f5 ,[%i0+0x034]%asi ! Mem[0000000010001434] = ff000000 | |
13718 | ! Starting 10 instruction Load Burst | |
13719 | ! Mem[0000000030101408] = 00000000ffffffff, %f2 = bb9180c7 ff000000 | |
13720 | ldda [%i4+%o4]0x81,%f2 ! %f2 = 00000000 ffffffff | |
13721 | ||
13722 | p0_label_313: | |
13723 | ! Mem[000000001000142d] = a309ade0, %l3 = 0000000000000096 | |
13724 | ldstuba [%i0+0x02d]%asi,%l3 ! %l3 = 00000009000000ff | |
13725 | ! Mem[0000000010181408] = 000000ff, %f24 = 00000000 | |
13726 | lda [%i6+%o4]0x88,%f24 ! %f24 = 000000ff | |
13727 | ! Mem[0000000010001400] = ffffffff, %l2 = 000000000000275e | |
13728 | lduwa [%i0+%g0]0x88,%l2 ! %l2 = 00000000ffffffff | |
13729 | ! Mem[00000000100c1400] = 5e000000, %l6 = 0000000000000000 | |
13730 | ldsba [%i3+%g0]0x80,%l6 ! %l6 = 000000000000005e | |
13731 | ! Mem[0000000010041410] = 5e000000, %l2 = 00000000ffffffff | |
13732 | ldswa [%i1+%o5]0x88,%l2 ! %l2 = 000000005e000000 | |
13733 | ! Mem[0000000030041410] = 00000000, %l6 = 000000000000005e | |
13734 | ldswa [%i1+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
13735 | ! Mem[0000000021800080] = ffff0b33, %l2 = 000000005e000000 | |
13736 | lduba [%o3+0x080]%asi,%l2 ! %l2 = 00000000000000ff | |
13737 | ! Mem[00000000100c1410] = bb9180c7, %l3 = 0000000000000009 | |
13738 | lduha [%i3+%o5]0x80,%l3 ! %l3 = 000000000000bb91 | |
13739 | ! Mem[0000000010181430] = 00000000, %l6 = 0000000000000000 | |
13740 | lduh [%i6+0x032],%l6 ! %l6 = 0000000000000000 | |
13741 | ! Starting 10 instruction Store Burst | |
13742 | ! %f12 = ffffffff, Mem[0000000010181400] = ff000000 | |
13743 | st %f12,[%i6+%g0] ! Mem[0000000010181400] = ffffffff | |
13744 | ||
13745 | p0_label_314: | |
13746 | ! %l4 = 0000000000000000, Mem[0000000030041408] = 00000000 | |
13747 | stha %l4,[%i1+%o4]0x81 ! Mem[0000000030041408] = 00000000 | |
13748 | ! Mem[0000000020800000] = ff060db6, %l5 = 0000000000000010 | |
13749 | ldsba [%o1+0x000]%asi,%l5 ! %l5 = ffffffffffffffff | |
13750 | ! %f2 = 00000000 ffffffff, Mem[0000000010081410] = ffd7ffff d7ffffff | |
13751 | stda %f2 ,[%i2+%o5]0x80 ! Mem[0000000010081410] = 00000000 ffffffff | |
13752 | ! %l3 = 000000000000bb91, Mem[0000000030101400] = 00000000 | |
13753 | stba %l3,[%i4+%g0]0x89 ! Mem[0000000030101400] = 00000091 | |
13754 | ! %f16 = ff000000 00000000 00000000 ff000000 | |
13755 | ! %f20 = 0000005e 032cff8e 02226c6b 57119e5e | |
13756 | ! %f24 = 000000ff ff000000 64479a75 bb9180c7 | |
13757 | ! %f28 = ffffffff ff000000 ffffffff 000000ff | |
13758 | stda %f16,[%i0]ASI_BLK_AIUSL ! Block Store to 0000000030001400 | |
13759 | ! Mem[0000000010081400] = 000000ff, %l2 = 00000000000000ff | |
13760 | ldstuba [%i2+%g0]0x88,%l2 ! %l2 = 000000ff000000ff | |
13761 | ! %f14 = ffffffff 000000ff, %l5 = ffffffffffffffff | |
13762 | ! Mem[0000000010101420] = 00000000ffffffff | |
13763 | add %i4,0x020,%g1 | |
13764 | stda %f14,[%g1+%l5]ASI_PST16_P ! Mem[0000000010101420] = ffffffff000000ff | |
13765 | ! %f16 = ff000000 00000000 00000000 ff000000 | |
13766 | ! %f20 = 0000005e 032cff8e 02226c6b 57119e5e | |
13767 | ! %f24 = 000000ff ff000000 64479a75 bb9180c7 | |
13768 | ! %f28 = ffffffff ff000000 ffffffff 000000ff | |
13769 | stda %f16,[%i1]ASI_BLK_S ! Block Store to 0000000030041400 | |
13770 | ! %l2 = 00000000000000ff, Mem[00000000211c0000] = ff00fe0c | |
13771 | sth %l2,[%o2+%g0] ! Mem[00000000211c0000] = 00fffe0c | |
13772 | ! Starting 10 instruction Load Burst | |
13773 | ! Mem[0000000010181408] = ff000000ff000000, %f12 = ffffffff 365fc6fa | |
13774 | ldda [%i6+0x008]%asi,%f12 ! %f12 = ff000000 ff000000 | |
13775 | ||
13776 | p0_label_315: | |
13777 | ! Mem[0000000030141400] = 00000000, %l2 = 00000000000000ff | |
13778 | ldswa [%i5+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
13779 | ! Mem[0000000030101408] = 00000000, %l7 = 00000000000000ff | |
13780 | lduha [%i4+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
13781 | membar #Sync ! Added by membar checker (76) | |
13782 | ! Mem[0000000030001410] = 8eff2c035e000000, %f14 = ffffffff 000000ff | |
13783 | ldda [%i0+%o5]0x81,%f14 ! %f14 = 8eff2c03 5e000000 | |
13784 | ! Mem[0000000010101428] = 00e200ff 9ce0b68a, %l4 = 00000000, %l5 = ffffffff | |
13785 | ldda [%i4+0x028]%asi,%l4 ! %l4 = 0000000000e200ff 000000009ce0b68a | |
13786 | ! Mem[0000000010081408] = 0000275e, %l6 = 0000000000000000 | |
13787 | lduwa [%i2+%o4]0x80,%l6 ! %l6 = 000000000000275e | |
13788 | ! Mem[0000000010181400] = ff000000 ffffffff, %l0 = 00000000, %l1 = ffffffff | |
13789 | ldda [%i6+%g0]0x88,%l0 ! %l0 = 00000000ffffffff 00000000ff000000 | |
13790 | ! Mem[0000000010141408] = 00000000, %l6 = 000000000000275e | |
13791 | ldsba [%i5+%o4]0x80,%l6 ! %l6 = 0000000000000000 | |
13792 | ! Mem[0000000010001400] = c4ffffff ffffffff, %l2 = 00000000, %l3 = 0000bb91 | |
13793 | ldda [%i0+%g0]0x88,%l2 ! %l2 = 00000000ffffffff 00000000c4ffffff | |
13794 | ! Mem[0000000030141400] = 00000000, %l0 = 00000000ffffffff | |
13795 | lduba [%i5+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
13796 | ! Starting 10 instruction Store Burst | |
13797 | ! %l6 = 0000000000000000, Mem[000000001008142c] = 00000000 | |
13798 | sth %l6,[%i2+0x02c] ! Mem[000000001008142c] = 00000000 | |
13799 | ||
13800 | ! Check Point 63 for processor 0 | |
13801 | ||
13802 | set p0_check_pt_data_63,%g4 | |
13803 | rd %ccr,%g5 ! %g5 = 44 | |
13804 | ldx [%g4+0x08],%g2 | |
13805 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
13806 | bne %xcc,p0_reg_check_fail0 | |
13807 | mov 0xee0,%g1 | |
13808 | ldx [%g4+0x10],%g2 | |
13809 | cmp %l1,%g2 ! %l1 = 00000000ff000000 | |
13810 | bne %xcc,p0_reg_check_fail1 | |
13811 | mov 0xee1,%g1 | |
13812 | ldx [%g4+0x18],%g2 | |
13813 | cmp %l2,%g2 ! %l2 = 00000000ffffffff | |
13814 | bne %xcc,p0_reg_check_fail2 | |
13815 | mov 0xee2,%g1 | |
13816 | ldx [%g4+0x20],%g2 | |
13817 | cmp %l3,%g2 ! %l3 = 00000000c4ffffff | |
13818 | bne %xcc,p0_reg_check_fail3 | |
13819 | mov 0xee3,%g1 | |
13820 | ldx [%g4+0x28],%g2 | |
13821 | cmp %l5,%g2 ! %l5 = 000000009ce0b68a | |
13822 | bne %xcc,p0_reg_check_fail5 | |
13823 | mov 0xee5,%g1 | |
13824 | ldx [%g4+0x30],%g2 | |
13825 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
13826 | bne %xcc,p0_reg_check_fail6 | |
13827 | mov 0xee6,%g1 | |
13828 | ldx [%g4+0x38],%g2 | |
13829 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
13830 | bne %xcc,p0_reg_check_fail7 | |
13831 | mov 0xee7,%g1 | |
13832 | ldx [%g4+0x40],%g3 | |
13833 | std %f0,[%g4] | |
13834 | ldx [%g4],%g2 | |
13835 | cmp %g3,%g2 ! %f0 = 5e000000 000000ff | |
13836 | bne %xcc,p0_freg_check_fail | |
13837 | mov 0xf00,%g1 | |
13838 | ldx [%g4+0x48],%g3 | |
13839 | std %f2,[%g4] | |
13840 | ldx [%g4],%g2 | |
13841 | cmp %g3,%g2 ! %f2 = 00000000 ffffffff | |
13842 | bne %xcc,p0_freg_check_fail | |
13843 | mov 0xf02,%g1 | |
13844 | ldx [%g4+0x50],%g3 | |
13845 | std %f4,[%g4] | |
13846 | ldx [%g4],%g2 | |
13847 | cmp %g3,%g2 ! %f4 = 00000000 ff000000 | |
13848 | bne %xcc,p0_freg_check_fail | |
13849 | mov 0xf04,%g1 | |
13850 | ldx [%g4+0x58],%g3 | |
13851 | std %f10,[%g4] | |
13852 | ldx [%g4],%g2 | |
13853 | cmp %g3,%g2 ! %f10 = ff000000 00000000 | |
13854 | bne %xcc,p0_freg_check_fail | |
13855 | mov 0xf10,%g1 | |
13856 | ldx [%g4+0x60],%g3 | |
13857 | std %f12,[%g4] | |
13858 | ldx [%g4],%g2 | |
13859 | cmp %g3,%g2 ! %f12 = ff000000 ff000000 | |
13860 | bne %xcc,p0_freg_check_fail | |
13861 | mov 0xf12,%g1 | |
13862 | ldx [%g4+0x68],%g3 | |
13863 | std %f14,[%g4] | |
13864 | ldx [%g4],%g2 | |
13865 | cmp %g3,%g2 ! %f14 = 8eff2c03 5e000000 | |
13866 | bne %xcc,p0_freg_check_fail | |
13867 | mov 0xf14,%g1 | |
13868 | ldx [%g4+0x70],%g3 | |
13869 | std %f24,[%g4] | |
13870 | ldx [%g4],%g2 | |
13871 | cmp %g3,%g2 ! %f24 = 000000ff ff000000 | |
13872 | bne %xcc,p0_freg_check_fail | |
13873 | mov 0xf24,%g1 | |
13874 | ||
13875 | ! Check Point 63 completed | |
13876 | ||
13877 | ||
13878 | p0_label_316: | |
13879 | ! %l0 = 00000000, %l1 = ff000000, Mem[0000000010081400] = 000000ff 00000000 | |
13880 | stda %l0,[%i2+%g0]0x88 ! Mem[0000000010081400] = 00000000 ff000000 | |
13881 | ! Mem[0000000010041408] = e40000ff, %l6 = 0000000000000000 | |
13882 | swapa [%i1+%o4]0x88,%l6 ! %l6 = 00000000e40000ff | |
13883 | ! %f4 = 00000000 ff000000, Mem[0000000010001410] = 00000000 00ff0000 | |
13884 | stda %f4 ,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 ff000000 | |
13885 | ! Mem[0000000010141410] = ffffffff, %l4 = 0000000000e200ff | |
13886 | ldstuba [%i5+%o5]0x88,%l4 ! %l4 = 000000ff000000ff | |
13887 | ! %l4 = 000000ff, %l5 = 9ce0b68a, Mem[0000000010101428] = 00e200ff 9ce0b68a | |
13888 | stda %l4,[%i4+0x028]%asi ! Mem[0000000010101428] = 000000ff 9ce0b68a | |
13889 | ! %l0 = 00000000, %l1 = ff000000, Mem[0000000010181408] = 000000ff 000000ff | |
13890 | stda %l0,[%i6+%o4]0x88 ! Mem[0000000010181408] = 00000000 ff000000 | |
13891 | ! Mem[0000000010181429] = ffffffff, %l1 = 00000000ff000000 | |
13892 | ldstub [%i6+0x029],%l1 ! %l1 = 000000ff000000ff | |
13893 | ! %f24 = 000000ff ff000000, %l4 = 00000000000000ff | |
13894 | ! Mem[0000000030101418] = 5e9e11576b6c2202 | |
13895 | add %i4,0x018,%g1 | |
13896 | stda %f24,[%g1+%l4]ASI_PST16_SL ! Mem[0000000030101418] = 000000ffff000000 | |
13897 | ! Mem[000000001000143c] = caffffff, %l2 = 00000000ffffffff, %asi = 80 | |
13898 | swapa [%i0+0x03c]%asi,%l2 ! %l2 = 00000000caffffff | |
13899 | ! Starting 10 instruction Load Burst | |
13900 | ! Mem[0000000010001420] = 005700ff ff000000, %l0 = 00000000, %l1 = 000000ff | |
13901 | ldda [%i0+0x020]%asi,%l0 ! %l0 = 00000000005700ff 00000000ff000000 | |
13902 | ||
13903 | p0_label_317: | |
13904 | ! Mem[0000000010101410] = 00000000, %l4 = 00000000000000ff | |
13905 | lduha [%i4+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
13906 | ! Mem[0000000030001410] = 032cff8e, %l7 = 0000000000000000 | |
13907 | ldsba [%i0+%o5]0x89,%l7 ! %l7 = ffffffffffffff8e | |
13908 | ! Mem[0000000030141408] = 00000000, %l0 = 00000000005700ff | |
13909 | ldsba [%i5+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
13910 | ! Mem[00000000100c1400] = 0000005e, %l1 = 00000000ff000000 | |
13911 | lduha [%i3+%g0]0x88,%l1 ! %l1 = 000000000000005e | |
13912 | ! Mem[000000001004142c] = 57119e5e, %l3 = 00000000c4ffffff | |
13913 | lduwa [%i1+0x02c]%asi,%l3 ! %l3 = 0000000057119e5e | |
13914 | ! Mem[0000000010181400] = ffffffff000000ff, %l0 = 0000000000000000 | |
13915 | ldxa [%i6+%g0]0x80,%l0 ! %l0 = ffffffff000000ff | |
13916 | ! Mem[0000000010181410] = 00000000, %l3 = 0000000057119e5e | |
13917 | lduwa [%i6+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
13918 | ! Mem[00000000100c1408] = ff0000ff00ffffff, %f8 = 5e27ffff 0000005e | |
13919 | ldda [%i3+%o4]0x88,%f8 ! %f8 = ff0000ff 00ffffff | |
13920 | ! Mem[00000000211c0000] = 00fffe0c, %l2 = 00000000caffffff | |
13921 | ldstub [%o2+%g0],%l2 ! %l2 = 00000000000000ff | |
13922 | ! Starting 10 instruction Store Burst | |
13923 | ! %l4 = 0000000000000000, Mem[0000000030101408] = ffffffff00000000 | |
13924 | stxa %l4,[%i4+%o4]0x89 ! Mem[0000000030101408] = 0000000000000000 | |
13925 | ||
13926 | p0_label_318: | |
13927 | ! %l2 = 0000000000000000, Mem[0000000030081400] = ff0000ff | |
13928 | stba %l2,[%i2+%g0]0x89 ! Mem[0000000030081400] = ff000000 | |
13929 | ! %l4 = 00000000, %l5 = 9ce0b68a, Mem[0000000010041410] = 0000005e 8ab6e09c | |
13930 | std %l4,[%i1+%o5] ! Mem[0000000010041410] = 00000000 9ce0b68a | |
13931 | ! %l3 = 0000000000000000, Mem[0000000010081429] = 00000000 | |
13932 | stb %l3,[%i2+0x029] ! Mem[0000000010081428] = 00000000 | |
13933 | ! %f30 = ffffffff 000000ff, Mem[0000000010181410] = 00000000 ff000000 | |
13934 | std %f30,[%i6+%o5] ! Mem[0000000010181410] = ffffffff 000000ff | |
13935 | ! Mem[0000000030181408] = ff0000ff, %l4 = 0000000000000000 | |
13936 | swapa [%i6+%o4]0x81,%l4 ! %l4 = 00000000ff0000ff | |
13937 | ! %f28 = ffffffff ff000000, %l2 = 0000000000000000 | |
13938 | ! Mem[0000000010101400] = 00000000caffffff | |
13939 | stda %f28,[%i4+%l2]ASI_PST16_P ! Mem[0000000010101400] = 00000000caffffff | |
13940 | ! Mem[0000000010101410] = 00000000, %l0 = ffffffff000000ff | |
13941 | ldstuba [%i4+%o5]0x80,%l0 ! %l0 = 00000000000000ff | |
13942 | ! %l3 = 0000000000000000, Mem[0000000010101410] = ff000000 | |
13943 | stwa %l3,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00000000 | |
13944 | ! Mem[00000000100c1434] = e400008a, %l4 = 00000000ff0000ff, %asi = 80 | |
13945 | swapa [%i3+0x034]%asi,%l4 ! %l4 = 00000000e400008a | |
13946 | ! Starting 10 instruction Load Burst | |
13947 | ! Mem[0000000030141410] = 8eff2c03 5e0000ff, %l4 = e400008a, %l5 = 9ce0b68a | |
13948 | ldda [%i5+%o5]0x89,%l4 ! %l4 = 000000005e0000ff 000000008eff2c03 | |
13949 | ||
13950 | p0_label_319: | |
13951 | ! Mem[0000000010041400] = 000000ff00000000, %f10 = ff000000 00000000 | |
13952 | ldda [%i1+%g0]0x88,%f10 ! %f10 = 000000ff 00000000 | |
13953 | ! Mem[00000000100c1420] = 0000b68affffffff, %f26 = 64479a75 bb9180c7 | |
13954 | ldda [%i3+0x020]%asi,%f26 ! %f26 = 0000b68a ffffffff | |
13955 | ! Mem[0000000030081400] = 000000ff ffe20000, %l0 = 00000000, %l1 = 0000005e | |
13956 | ldda [%i2+%g0]0x81,%l0 ! %l0 = 00000000000000ff 00000000ffe20000 | |
13957 | ! Mem[0000000010081410] = 00000000, %l2 = 0000000000000000 | |
13958 | lduwa [%i2+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
13959 | ! Mem[0000000030041408] = 000000ff00000000, %l3 = 0000000000000000 | |
13960 | ldxa [%i1+%o4]0x89,%l3 ! %l3 = 000000ff00000000 | |
13961 | ! Mem[0000000010041410] = 00000000, %f5 = ff000000 | |
13962 | lda [%i1+%o5]0x88,%f5 ! %f5 = 00000000 | |
13963 | ! Mem[0000000030041400] = 000000ff, %l1 = 00000000ffe20000 | |
13964 | lduha [%i1+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
13965 | ! Mem[0000000010041410] = 8ab6e09c00000000, %l0 = 00000000000000ff | |
13966 | ldxa [%i1+%o5]0x88,%l0 ! %l0 = 8ab6e09c00000000 | |
13967 | ! Mem[0000000010081400] = 00000000, %l6 = 00000000e40000ff | |
13968 | ldswa [%i2+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
13969 | ! Starting 10 instruction Store Burst | |
13970 | ! %f24 = 000000ff ff000000, Mem[0000000010101410] = 00000000 00000000 | |
13971 | stda %f24,[%i4+%o5]0x88 ! Mem[0000000010101410] = 000000ff ff000000 | |
13972 | ||
13973 | p0_label_320: | |
13974 | ! %l0 = 8ab6e09c00000000, Mem[00000000201c0001] = 00ff1669 | |
13975 | stb %l0,[%o0+0x001] ! Mem[00000000201c0000] = 00001669 | |
13976 | ! %f28 = ffffffff, Mem[0000000030101410] = 3bedacff | |
13977 | sta %f28,[%i4+%o5]0x89 ! Mem[0000000030101410] = ffffffff | |
13978 | ! %l3 = 000000ff00000000, Mem[00000000100c1408] = ffffff00 | |
13979 | stwa %l3,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00000000 | |
13980 | ! %l5 = 000000008eff2c03, Mem[0000000030081408] = 0000005e | |
13981 | stba %l5,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000003 | |
13982 | ! Mem[0000000030041400] = 000000ff, %l4 = 000000005e0000ff | |
13983 | ldstuba [%i1+%g0]0x89,%l4 ! %l4 = 000000ff000000ff | |
13984 | ! %l0 = 00000000, %l1 = 000000ff, Mem[0000000030101400] = 91000000 00000000 | |
13985 | stda %l0,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 000000ff | |
13986 | ! %l2 = 0000000000000000, Mem[0000000010141410] = ffffffff | |
13987 | stwa %l2,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00000000 | |
13988 | ! %f8 = ff0000ff, Mem[0000000010141408] = 00000000 | |
13989 | st %f8 ,[%i5+%o4] ! Mem[0000000010141408] = ff0000ff | |
13990 | ! %f31 = 000000ff, Mem[0000000010041420] = ffffffb4 | |
13991 | sta %f31,[%i1+0x020]%asi ! Mem[0000000010041420] = 000000ff | |
13992 | ! Starting 10 instruction Load Burst | |
13993 | ! Mem[0000000030001400] = 00000000000000ff, %l2 = 0000000000000000 | |
13994 | ldxa [%i0+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
13995 | ||
13996 | ! Check Point 64 for processor 0 | |
13997 | ||
13998 | set p0_check_pt_data_64,%g4 | |
13999 | rd %ccr,%g5 ! %g5 = 44 | |
14000 | ldx [%g4+0x08],%g2 | |
14001 | cmp %l0,%g2 ! %l0 = 8ab6e09c00000000 | |
14002 | bne %xcc,p0_reg_check_fail0 | |
14003 | mov 0xee0,%g1 | |
14004 | ldx [%g4+0x10],%g2 | |
14005 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
14006 | bne %xcc,p0_reg_check_fail1 | |
14007 | mov 0xee1,%g1 | |
14008 | ldx [%g4+0x18],%g2 | |
14009 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
14010 | bne %xcc,p0_reg_check_fail2 | |
14011 | mov 0xee2,%g1 | |
14012 | ldx [%g4+0x20],%g2 | |
14013 | cmp %l3,%g2 ! %l3 = 000000ff00000000 | |
14014 | bne %xcc,p0_reg_check_fail3 | |
14015 | mov 0xee3,%g1 | |
14016 | ldx [%g4+0x28],%g2 | |
14017 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
14018 | bne %xcc,p0_reg_check_fail4 | |
14019 | mov 0xee4,%g1 | |
14020 | ldx [%g4+0x30],%g2 | |
14021 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
14022 | bne %xcc,p0_reg_check_fail6 | |
14023 | mov 0xee6,%g1 | |
14024 | ldx [%g4+0x38],%g2 | |
14025 | cmp %l7,%g2 ! %l7 = ffffffffffffff8e | |
14026 | bne %xcc,p0_reg_check_fail7 | |
14027 | mov 0xee7,%g1 | |
14028 | ldx [%g4+0x40],%g3 | |
14029 | std %f0,[%g4] | |
14030 | ldx [%g4],%g2 | |
14031 | cmp %g3,%g2 ! %f0 = 5e000000 000000ff | |
14032 | bne %xcc,p0_freg_check_fail | |
14033 | mov 0xf00,%g1 | |
14034 | ldx [%g4+0x48],%g3 | |
14035 | std %f4,[%g4] | |
14036 | ldx [%g4],%g2 | |
14037 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
14038 | bne %xcc,p0_freg_check_fail | |
14039 | mov 0xf04,%g1 | |
14040 | ldx [%g4+0x50],%g3 | |
14041 | std %f8,[%g4] | |
14042 | ldx [%g4],%g2 | |
14043 | cmp %g3,%g2 ! %f8 = ff0000ff 00ffffff | |
14044 | bne %xcc,p0_freg_check_fail | |
14045 | mov 0xf08,%g1 | |
14046 | ldx [%g4+0x58],%g3 | |
14047 | std %f10,[%g4] | |
14048 | ldx [%g4],%g2 | |
14049 | cmp %g3,%g2 ! %f10 = 000000ff 00000000 | |
14050 | bne %xcc,p0_freg_check_fail | |
14051 | mov 0xf10,%g1 | |
14052 | ldx [%g4+0x60],%g3 | |
14053 | std %f26,[%g4] | |
14054 | ldx [%g4],%g2 | |
14055 | cmp %g3,%g2 ! %f26 = 0000b68a ffffffff | |
14056 | bne %xcc,p0_freg_check_fail | |
14057 | mov 0xf26,%g1 | |
14058 | ||
14059 | ! Check Point 64 completed | |
14060 | ||
14061 | ||
14062 | p0_label_321: | |
14063 | ! Mem[0000000030041400] = 000000ff, %l0 = 8ab6e09c00000000 | |
14064 | lduba [%i1+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
14065 | ! Mem[0000000030081400] = 000000ff, %l4 = 00000000000000ff | |
14066 | lduwa [%i2+%g0]0x81,%l4 ! %l4 = 00000000000000ff | |
14067 | ! Mem[0000000030081408] = 03000000, %l6 = 0000000000000000 | |
14068 | ldsba [%i2+%o4]0x81,%l6 ! %l6 = 0000000000000003 | |
14069 | ! Mem[0000000020800000] = ff060db6, %l0 = 00000000000000ff | |
14070 | lduba [%o1+0x001]%asi,%l0 ! %l0 = 0000000000000006 | |
14071 | ! Mem[0000000010001408] = 5e27ffff, %f31 = 000000ff | |
14072 | lda [%i0+%o4]0x80,%f31 ! %f31 = 5e27ffff | |
14073 | ! Mem[0000000030181408] = 00000000ff000000, %l6 = 0000000000000003 | |
14074 | ldxa [%i6+%o4]0x81,%l6 ! %l6 = 00000000ff000000 | |
14075 | ! Mem[0000000010001410] = 00000000, %l4 = 00000000000000ff | |
14076 | ldsba [%i0+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
14077 | ! %l4 = 0000000000000000, immed = fffff2db, %y = 00000000 | |
14078 | udiv %l4,-0xd25,%l7 ! %l7 = 0000000000000000 | |
14079 | mov %l0,%y ! %y = 00000006 | |
14080 | ! Mem[000000001000141c] = 00000000, %l6 = 00000000ff000000 | |
14081 | lduha [%i0+0x01c]%asi,%l6 ! %l6 = 0000000000000000 | |
14082 | ! Starting 10 instruction Store Burst | |
14083 | ! %l2 = 000000ff, %l3 = 00000000, Mem[0000000030001408] = 000000ff 00000000 | |
14084 | stda %l2,[%i0+%o4]0x81 ! Mem[0000000030001408] = 000000ff 00000000 | |
14085 | ||
14086 | p0_label_322: | |
14087 | ! %l6 = 0000000000000000, Mem[0000000030181408] = 000000ff00000000 | |
14088 | stxa %l6,[%i6+%o4]0x89 ! Mem[0000000030181408] = 0000000000000000 | |
14089 | ! %l6 = 0000000000000000, Mem[00000000300c1408] = ff00ff00 | |
14090 | stha %l6,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 0000ff00 | |
14091 | ! %l3 = 000000ff00000000, Mem[0000000030041400] = 00000000000000ff | |
14092 | stxa %l3,[%i1+%g0]0x89 ! Mem[0000000030041400] = 000000ff00000000 | |
14093 | ! Mem[0000000010081410] = 00000000, %l5 = 000000008eff2c03 | |
14094 | ldstuba [%i2+%o5]0x80,%l5 ! %l5 = 00000000000000ff | |
14095 | ! %f0 = 5e000000 000000ff, Mem[0000000030041408] = 00000000 000000ff | |
14096 | stda %f0 ,[%i1+%o4]0x89 ! Mem[0000000030041408] = 5e000000 000000ff | |
14097 | ! %l1 = 00000000000000ff, Mem[0000000010001430] = 0fffff1aff000000, %asi = 80 | |
14098 | stxa %l1,[%i0+0x030]%asi ! Mem[0000000010001430] = 00000000000000ff | |
14099 | ! %f30 = ffffffff 5e27ffff, %l4 = 0000000000000000 | |
14100 | ! Mem[0000000030001438] = ff000000ffffffff | |
14101 | add %i0,0x038,%g1 | |
14102 | stda %f30,[%g1+%l4]ASI_PST8_S ! Mem[0000000030001438] = ff000000ffffffff | |
14103 | ! %f12 = ff000000 ff000000, Mem[0000000030041400] = 00000000 ff000000 | |
14104 | stda %f12,[%i1+%g0]0x81 ! Mem[0000000030041400] = ff000000 ff000000 | |
14105 | ! %l1 = 00000000000000ff, Mem[0000000010001408] = 5e000000ffff275e | |
14106 | stxa %l1,[%i0+%o4]0x88 ! Mem[0000000010001408] = 00000000000000ff | |
14107 | ! Starting 10 instruction Load Burst | |
14108 | ! Mem[0000000010181408] = ff000000 00000000, %l6 = 00000000, %l7 = 00000000 | |
14109 | ldda [%i6+%o4]0x88,%l6 ! %l6 = 0000000000000000 00000000ff000000 | |
14110 | ||
14111 | p0_label_323: | |
14112 | ! Mem[0000000030141410] = ff00005e 032cff8e, %l4 = 00000000, %l5 = 00000000 | |
14113 | ldda [%i5+%o5]0x81,%l4 ! %l4 = 00000000ff00005e 00000000032cff8e | |
14114 | ! Mem[0000000030081410] = ff000000, %l3 = 000000ff00000000 | |
14115 | lduwa [%i2+%o5]0x81,%l3 ! %l3 = 00000000ff000000 | |
14116 | ! Mem[0000000020800000] = ff060db6, %l4 = 00000000ff00005e | |
14117 | ldsh [%o1+%g0],%l4 ! %l4 = ffffffffffffff06 | |
14118 | ! Mem[0000000010141408] = ff0000ff, %l2 = 00000000000000ff | |
14119 | ldsha [%i5+%o4]0x80,%l2 ! %l2 = ffffffffffffff00 | |
14120 | ! Mem[0000000010141414] = 0000ffff, %l6 = 0000000000000000 | |
14121 | ldswa [%i5+0x014]%asi,%l6 ! %l6 = 000000000000ffff | |
14122 | ! Mem[0000000010141438] = 0000ff00, %l0 = 0000000000000006 | |
14123 | ldsba [%i5+0x03a]%asi,%l0 ! %l0 = ffffffffffffffff | |
14124 | ! Mem[0000000030041400] = ff000000 ff000000, %l2 = ffffff00, %l3 = ff000000 | |
14125 | ldda [%i1+%g0]0x81,%l2 ! %l2 = 00000000ff000000 00000000ff000000 | |
14126 | ! Mem[000000001008141c] = d9876ee7, %f6 = 02226c6b | |
14127 | lda [%i2+0x01c]%asi,%f6 ! %f6 = d9876ee7 | |
14128 | ! Mem[0000000030141408] = 00000000, %l4 = ffffffffffffff06 | |
14129 | lduba [%i5+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
14130 | ! Starting 10 instruction Store Burst | |
14131 | ! %f9 = 00ffffff, Mem[0000000030101410] = ffffffff | |
14132 | sta %f9 ,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00ffffff | |
14133 | ||
14134 | p0_label_324: | |
14135 | ! Mem[00000000300c1410] = 000000ff, %l1 = 00000000000000ff | |
14136 | swapa [%i3+%o5]0x89,%l1 ! %l1 = 00000000000000ff | |
14137 | ! %l2 = 00000000ff000000, Mem[00000000100c1410] = c78091bb | |
14138 | stha %l2,[%i3+%o5]0x88 ! Mem[00000000100c1410] = c7800000 | |
14139 | ! %l7 = 00000000ff000000, Mem[0000000010181410] = ffffffff | |
14140 | stba %l7,[%i6+%o5]0x88 ! Mem[0000000010181410] = ffffff00 | |
14141 | ! %f18 = 00000000 ff000000, %l1 = 00000000000000ff | |
14142 | ! Mem[0000000010041430] = 8ab6e09c00ff100f | |
14143 | add %i1,0x030,%g1 | |
14144 | stda %f18,[%g1+%l1]ASI_PST32_P ! Mem[0000000010041430] = 00000000ff000000 | |
14145 | ! %l3 = 00000000ff000000, Mem[0000000030041408] = ff000000 | |
14146 | stha %l3,[%i1+%o4]0x81 ! Mem[0000000030041408] = 00000000 | |
14147 | ! %l0 = ffffffffffffffff, Mem[0000000030181408] = 00000000 | |
14148 | stwa %l0,[%i6+%o4]0x89 ! Mem[0000000030181408] = ffffffff | |
14149 | ! Mem[00000000100c1408] = 00000000, %l0 = ffffffffffffffff | |
14150 | ldstuba [%i3+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
14151 | ! Mem[0000000030001400] = 00000000, %l7 = 00000000ff000000 | |
14152 | ldstuba [%i0+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
14153 | ! Mem[0000000010081408] = 5e270000, %l0 = 0000000000000000 | |
14154 | swapa [%i2+%o4]0x88,%l0 ! %l0 = 000000005e270000 | |
14155 | ! Starting 10 instruction Load Burst | |
14156 | ! Mem[00000000201c0000] = 00001669, %l6 = 000000000000ffff | |
14157 | lduh [%o0+%g0],%l6 ! %l6 = 0000000000000000 | |
14158 | ||
14159 | p0_label_325: | |
14160 | ! Mem[00000000100c1410] = 000080c7, %l3 = 00000000ff000000 | |
14161 | ldswa [%i3+%o5]0x80,%l3 ! %l3 = 00000000000080c7 | |
14162 | ! Mem[0000000030181410] = 00000000, %l5 = 00000000032cff8e | |
14163 | lduba [%i6+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
14164 | ! Mem[00000000300c1410] = ff000000, %f1 = 000000ff | |
14165 | lda [%i3+%o5]0x81,%f1 ! %f1 = ff000000 | |
14166 | ! Mem[0000000030001410] = 032cff8e, %l4 = 0000000000000000 | |
14167 | lduba [%i0+%o5]0x89,%l4 ! %l4 = 000000000000008e | |
14168 | ! Mem[0000000030181400] = ffffffff, %l5 = 0000000000000000 | |
14169 | ldsba [%i6+%g0]0x81,%l5 ! %l5 = ffffffffffffffff | |
14170 | ! Mem[0000000030141400] = 00000000, %l5 = ffffffffffffffff | |
14171 | ldsba [%i5+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
14172 | ! Mem[0000000030181408] = ffffffff, %l5 = 0000000000000000 | |
14173 | ldswa [%i6+%o4]0x81,%l5 ! %l5 = ffffffffffffffff | |
14174 | ! Mem[0000000030181400] = ffffffff, %f28 = ffffffff | |
14175 | lda [%i6+%g0]0x81,%f28 ! %f28 = ffffffff | |
14176 | ! Mem[0000000030081400] = 000000ff, %l6 = 0000000000000000 | |
14177 | ldswa [%i2+%g0]0x81,%l6 ! %l6 = 00000000000000ff | |
14178 | ! Starting 10 instruction Store Burst | |
14179 | ! %f16 = ff000000 00000000 00000000 ff000000 | |
14180 | ! %f20 = 0000005e 032cff8e 02226c6b 57119e5e | |
14181 | ! %f24 = 000000ff ff000000 0000b68a ffffffff | |
14182 | ! %f28 = ffffffff ff000000 ffffffff 5e27ffff | |
14183 | stda %f16,[%i5]ASI_BLK_AIUPL ! Block Store to 0000000010141400 | |
14184 | ||
14185 | ! Check Point 65 for processor 0 | |
14186 | ||
14187 | set p0_check_pt_data_65,%g4 | |
14188 | rd %ccr,%g5 ! %g5 = 44 | |
14189 | ldx [%g4+0x08],%g2 | |
14190 | cmp %l0,%g2 ! %l0 = 000000005e270000 | |
14191 | bne %xcc,p0_reg_check_fail0 | |
14192 | mov 0xee0,%g1 | |
14193 | ldx [%g4+0x10],%g2 | |
14194 | cmp %l2,%g2 ! %l2 = 00000000ff000000 | |
14195 | bne %xcc,p0_reg_check_fail2 | |
14196 | mov 0xee2,%g1 | |
14197 | ldx [%g4+0x18],%g2 | |
14198 | cmp %l3,%g2 ! %l3 = 00000000000080c7 | |
14199 | bne %xcc,p0_reg_check_fail3 | |
14200 | mov 0xee3,%g1 | |
14201 | ldx [%g4+0x20],%g2 | |
14202 | cmp %l4,%g2 ! %l4 = 000000000000008e | |
14203 | bne %xcc,p0_reg_check_fail4 | |
14204 | mov 0xee4,%g1 | |
14205 | ldx [%g4+0x28],%g2 | |
14206 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
14207 | bne %xcc,p0_reg_check_fail5 | |
14208 | mov 0xee5,%g1 | |
14209 | ldx [%g4+0x30],%g2 | |
14210 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
14211 | bne %xcc,p0_reg_check_fail6 | |
14212 | mov 0xee6,%g1 | |
14213 | ldx [%g4+0x38],%g2 | |
14214 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
14215 | bne %xcc,p0_reg_check_fail7 | |
14216 | mov 0xee7,%g1 | |
14217 | ldx [%g4+0x40],%g3 | |
14218 | std %f0,[%g4] | |
14219 | ldx [%g4],%g2 | |
14220 | cmp %g3,%g2 ! %f0 = 5e000000 ff000000 | |
14221 | bne %xcc,p0_freg_check_fail | |
14222 | mov 0xf00,%g1 | |
14223 | ldx [%g4+0x48],%g3 | |
14224 | std %f2,[%g4] | |
14225 | ldx [%g4],%g2 | |
14226 | cmp %g3,%g2 ! %f2 = 00000000 ffffffff | |
14227 | bne %xcc,p0_freg_check_fail | |
14228 | mov 0xf02,%g1 | |
14229 | ldx [%g4+0x50],%g3 | |
14230 | std %f4,[%g4] | |
14231 | ldx [%g4],%g2 | |
14232 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
14233 | bne %xcc,p0_freg_check_fail | |
14234 | mov 0xf04,%g1 | |
14235 | ldx [%g4+0x58],%g3 | |
14236 | std %f6,[%g4] | |
14237 | ldx [%g4],%g2 | |
14238 | cmp %g3,%g2 ! %f6 = d9876ee7 0000ffff | |
14239 | bne %xcc,p0_freg_check_fail | |
14240 | mov 0xf06,%g1 | |
14241 | ldx [%g4+0x60],%g3 | |
14242 | std %f28,[%g4] | |
14243 | ldx [%g4],%g2 | |
14244 | cmp %g3,%g2 ! %f28 = ffffffff ff000000 | |
14245 | bne %xcc,p0_freg_check_fail | |
14246 | mov 0xf28,%g1 | |
14247 | ldx [%g4+0x68],%g3 | |
14248 | std %f30,[%g4] | |
14249 | ldx [%g4],%g2 | |
14250 | cmp %g3,%g2 ! %f30 = ffffffff 5e27ffff | |
14251 | bne %xcc,p0_freg_check_fail | |
14252 | mov 0xf30,%g1 | |
14253 | ||
14254 | ! Check Point 65 completed | |
14255 | ||
14256 | ||
14257 | p0_label_326: | |
14258 | ! %f26 = 0000b68a ffffffff, Mem[0000000030041400] = 000000ff 000000ff | |
14259 | stda %f26,[%i1+%g0]0x89 ! Mem[0000000030041400] = 0000b68a ffffffff | |
14260 | ! Mem[000000001008143b] = 00000000, %l5 = ffffffffffffffff | |
14261 | ldstuba [%i2+0x03b]%asi,%l5 ! %l5 = 00000000000000ff | |
14262 | ! %l0 = 5e270000, %l1 = 000000ff, Mem[0000000030041408] = 00000000 5e000000 | |
14263 | stda %l0,[%i1+%o4]0x89 ! Mem[0000000030041408] = 5e270000 000000ff | |
14264 | ! %l0 = 000000005e270000, Mem[0000000030101400] = 00000000 | |
14265 | stwa %l0,[%i4+%g0]0x81 ! Mem[0000000030101400] = 5e270000 | |
14266 | ! %l7 = 0000000000000000, Mem[0000000021800040] = ffff5e5c | |
14267 | sth %l7,[%o3+0x040] ! Mem[0000000021800040] = 00005e5c | |
14268 | ! %l0 = 5e270000, %l1 = 000000ff, Mem[0000000030181410] = 00000000 000000ff | |
14269 | stda %l0,[%i6+%o5]0x81 ! Mem[0000000030181410] = 5e270000 000000ff | |
14270 | ! %l0 = 5e270000, %l1 = 000000ff, Mem[0000000030041410] = 0000005e 032cff8e | |
14271 | stda %l0,[%i1+%o5]0x81 ! Mem[0000000030041410] = 5e270000 000000ff | |
14272 | ! %f20 = 0000005e 032cff8e, Mem[0000000010141408] = 000000ff 00000000 | |
14273 | stda %f20,[%i5+%o4]0x80 ! Mem[0000000010141408] = 0000005e 032cff8e | |
14274 | ! %f16 = ff000000 00000000, %l4 = 000000000000008e | |
14275 | ! Mem[0000000010001430] = 00000000000000ff | |
14276 | add %i0,0x030,%g1 | |
14277 | stda %f16,[%g1+%l4]ASI_PST32_PL ! Mem[0000000010001430] = 00000000000000ff | |
14278 | ! Starting 10 instruction Load Burst | |
14279 | ! Mem[0000000030001400] = ff000000 000000ff, %l4 = 0000008e, %l5 = 00000000 | |
14280 | ldda [%i0+%g0]0x81,%l4 ! %l4 = 00000000ff000000 00000000000000ff | |
14281 | ||
14282 | p0_label_327: | |
14283 | ! Mem[0000000010181408] = 00000000, %l1 = 00000000000000ff | |
14284 | lduha [%i6+%o4]0x88,%l1 ! %l1 = 0000000000000000 | |
14285 | ! Mem[0000000010041434] = ff000000, %l7 = 0000000000000000 | |
14286 | ldsb [%i1+0x034],%l7 ! %l7 = ffffffffffffffff | |
14287 | ! Mem[0000000010001408] = 00000000 000000ff, %l6 = 000000ff, %l7 = ffffffff | |
14288 | ldda [%i0+%o4]0x88,%l6 ! %l6 = 00000000000000ff 0000000000000000 | |
14289 | ! Mem[0000000030141410] = ff00005e, %l4 = 00000000ff000000 | |
14290 | lduba [%i5+%o5]0x81,%l4 ! %l4 = 00000000000000ff | |
14291 | ! Mem[0000000021800040] = 00005e5c, %l0 = 000000005e270000 | |
14292 | lduh [%o3+0x040],%l0 ! %l0 = 0000000000000000 | |
14293 | ! Mem[0000000030041408] = 0000275e, %l2 = 00000000ff000000 | |
14294 | ldsba [%i1+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
14295 | ! Mem[0000000010041400] = 00000000ff000000, %l7 = 0000000000000000 | |
14296 | ldxa [%i1+%g0]0x80,%l7 ! %l7 = 00000000ff000000 | |
14297 | ! Mem[0000000030101408] = 0000000000000000, %f14 = 8eff2c03 5e000000 | |
14298 | ldda [%i4+%o4]0x81,%f14 ! %f14 = 00000000 00000000 | |
14299 | ! Mem[0000000010181408] = ff00000000000000, %l7 = 00000000ff000000 | |
14300 | ldxa [%i6+%o4]0x88,%l7 ! %l7 = ff00000000000000 | |
14301 | ! Starting 10 instruction Store Burst | |
14302 | ! %l0 = 0000000000000000, Mem[0000000010101400] = ffffffca00000000 | |
14303 | stxa %l0,[%i4+%g0]0x88 ! Mem[0000000010101400] = 0000000000000000 | |
14304 | ||
14305 | p0_label_328: | |
14306 | ! %f26 = 0000b68a ffffffff, Mem[0000000030081408] = 03000000 000000ff | |
14307 | stda %f26,[%i2+%o4]0x81 ! Mem[0000000030081408] = 0000b68a ffffffff | |
14308 | ! %f10 = 000000ff, Mem[0000000030041400] = ffffffff | |
14309 | sta %f10,[%i1+%g0]0x81 ! Mem[0000000030041400] = 000000ff | |
14310 | ! %f12 = ff000000 ff000000, Mem[0000000010181410] = 00ffffff 000000ff | |
14311 | stda %f12,[%i6+0x010]%asi ! Mem[0000000010181410] = ff000000 ff000000 | |
14312 | ! %l7 = ff00000000000000, Mem[0000000021800040] = 00005e5c | |
14313 | stb %l7,[%o3+0x040] ! Mem[0000000021800040] = 00005e5c | |
14314 | ! %f12 = ff000000 ff000000, Mem[0000000030101400] = 5e270000 000000ff | |
14315 | stda %f12,[%i4+%g0]0x81 ! Mem[0000000030101400] = ff000000 ff000000 | |
14316 | ! %l3 = 00000000000080c7, Mem[0000000030141400] = 00000000 | |
14317 | stba %l3,[%i5+%g0]0x81 ! Mem[0000000030141400] = c7000000 | |
14318 | ! %l2 = 0000000000000000, Mem[0000000010181410] = ff000000 | |
14319 | stwa %l2,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00000000 | |
14320 | ! %f29 = ff000000, Mem[0000000030181408] = ffffffff | |
14321 | sta %f29,[%i6+%o4]0x89 ! Mem[0000000030181408] = ff000000 | |
14322 | ! %l6 = 00000000000000ff, Mem[0000000030081408] = 0000b68affffffff | |
14323 | stxa %l6,[%i2+%o4]0x81 ! Mem[0000000030081408] = 00000000000000ff | |
14324 | ! Starting 10 instruction Load Burst | |
14325 | ! Mem[00000000100c1408] = ff000000, %l2 = 0000000000000000 | |
14326 | ldsba [%i3+%o4]0x80,%l2 ! %l2 = ffffffffffffffff | |
14327 | ||
14328 | p0_label_329: | |
14329 | ! Mem[0000000010101404] = 00000000, %l6 = 00000000000000ff | |
14330 | lduba [%i4+0x007]%asi,%l6 ! %l6 = 0000000000000000 | |
14331 | membar #Sync ! Added by membar checker (77) | |
14332 | ! Mem[0000000010141400] = 00000000, %f2 = 00000000 | |
14333 | lda [%i5+%g0]0x80,%f2 ! %f2 = 00000000 | |
14334 | ! Mem[0000000010141408] = 0000005e, %l4 = 00000000000000ff | |
14335 | ldsba [%i5+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
14336 | ! Mem[0000000030181400] = ffffffff, %l4 = 0000000000000000 | |
14337 | lduba [%i6+%g0]0x81,%l4 ! %l4 = 00000000000000ff | |
14338 | ! Mem[0000000030041410] = 5e270000, %l6 = 0000000000000000 | |
14339 | lduha [%i1+%o5]0x81,%l6 ! %l6 = 0000000000005e27 | |
14340 | ! Mem[0000000030181400] = ffffffff, %l5 = 00000000000000ff | |
14341 | lduba [%i6+%g0]0x89,%l5 ! %l5 = 00000000000000ff | |
14342 | ! Mem[0000000030141408] = 000000ff00000000, %f24 = 000000ff ff000000 | |
14343 | ldda [%i5+%o4]0x89,%f24 ! %f24 = 000000ff 00000000 | |
14344 | ! Mem[0000000021800180] = 0000db07, %l4 = 00000000000000ff | |
14345 | ldsba [%o3+0x180]%asi,%l4 ! %l4 = 0000000000000000 | |
14346 | ! Mem[0000000030081400] = 000000ff, %l3 = 00000000000080c7 | |
14347 | ldsha [%i2+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
14348 | ! Starting 10 instruction Store Burst | |
14349 | ! %l3 = 0000000000000000, Mem[0000000010081400] = 00000000 | |
14350 | stha %l3,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 | |
14351 | ||
14352 | p0_label_330: | |
14353 | ! Mem[0000000010181408] = 00000000, %l3 = 0000000000000000 | |
14354 | swapa [%i6+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
14355 | ! %f6 = d9876ee7, Mem[000000001010143c] = 00000000 | |
14356 | sta %f6 ,[%i4+0x03c]%asi ! Mem[000000001010143c] = d9876ee7 | |
14357 | ! %f29 = ff000000, Mem[0000000030141408] = 00000000 | |
14358 | sta %f29,[%i5+%o4]0x89 ! Mem[0000000030141408] = ff000000 | |
14359 | ! %l3 = 0000000000000000, Mem[0000000030041410] = 0000275e | |
14360 | stha %l3,[%i1+%o5]0x89 ! Mem[0000000030041410] = 00000000 | |
14361 | ! %l7 = ff00000000000000, Mem[0000000030181410] = 0000275e | |
14362 | stba %l7,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00002700 | |
14363 | ! Mem[0000000010181408] = 00000000, %l4 = 0000000000000000 | |
14364 | swapa [%i6+%o4]0x88,%l4 ! %l4 = 0000000000000000 | |
14365 | ! %l0 = 00000000, %l1 = 00000000, Mem[00000000300c1408] = 0000ff00 00000000 | |
14366 | stda %l0,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 00000000 00000000 | |
14367 | ! %f28 = ffffffff, Mem[0000000010141400] = 00000000 | |
14368 | st %f28,[%i5+%g0] ! Mem[0000000010141400] = ffffffff | |
14369 | ! %l4 = 00000000, %l5 = 000000ff, Mem[0000000010041400] = 00000000 000000ff | |
14370 | stda %l4,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 000000ff | |
14371 | ! Starting 10 instruction Load Burst | |
14372 | ! Mem[0000000010001408] = 000000ff, %l0 = 0000000000000000 | |
14373 | lduha [%i0+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
14374 | ||
14375 | ! Check Point 66 for processor 0 | |
14376 | ||
14377 | set p0_check_pt_data_66,%g4 | |
14378 | rd %ccr,%g5 ! %g5 = 44 | |
14379 | ldx [%g4+0x08],%g2 | |
14380 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
14381 | bne %xcc,p0_reg_check_fail0 | |
14382 | mov 0xee0,%g1 | |
14383 | ldx [%g4+0x10],%g2 | |
14384 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
14385 | bne %xcc,p0_reg_check_fail1 | |
14386 | mov 0xee1,%g1 | |
14387 | ldx [%g4+0x18],%g2 | |
14388 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
14389 | bne %xcc,p0_reg_check_fail2 | |
14390 | mov 0xee2,%g1 | |
14391 | ldx [%g4+0x20],%g2 | |
14392 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
14393 | bne %xcc,p0_reg_check_fail3 | |
14394 | mov 0xee3,%g1 | |
14395 | ldx [%g4+0x28],%g2 | |
14396 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
14397 | bne %xcc,p0_reg_check_fail4 | |
14398 | mov 0xee4,%g1 | |
14399 | ldx [%g4+0x30],%g2 | |
14400 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
14401 | bne %xcc,p0_reg_check_fail5 | |
14402 | mov 0xee5,%g1 | |
14403 | ldx [%g4+0x38],%g2 | |
14404 | cmp %l6,%g2 ! %l6 = 0000000000005e27 | |
14405 | bne %xcc,p0_reg_check_fail6 | |
14406 | mov 0xee6,%g1 | |
14407 | ldx [%g4+0x40],%g2 | |
14408 | cmp %l7,%g2 ! %l7 = ff00000000000000 | |
14409 | bne %xcc,p0_reg_check_fail7 | |
14410 | mov 0xee7,%g1 | |
14411 | ldx [%g4+0x48],%g3 | |
14412 | std %f2,[%g4] | |
14413 | ldx [%g4],%g2 | |
14414 | cmp %g3,%g2 ! %f2 = 00000000 ffffffff | |
14415 | bne %xcc,p0_freg_check_fail | |
14416 | mov 0xf02,%g1 | |
14417 | ldx [%g4+0x50],%g3 | |
14418 | std %f4,[%g4] | |
14419 | ldx [%g4],%g2 | |
14420 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
14421 | bne %xcc,p0_freg_check_fail | |
14422 | mov 0xf04,%g1 | |
14423 | ldx [%g4+0x58],%g3 | |
14424 | std %f6,[%g4] | |
14425 | ldx [%g4],%g2 | |
14426 | cmp %g3,%g2 ! %f6 = d9876ee7 0000ffff | |
14427 | bne %xcc,p0_freg_check_fail | |
14428 | mov 0xf06,%g1 | |
14429 | ldx [%g4+0x60],%g3 | |
14430 | std %f14,[%g4] | |
14431 | ldx [%g4],%g2 | |
14432 | cmp %g3,%g2 ! %f14 = 00000000 00000000 | |
14433 | bne %xcc,p0_freg_check_fail | |
14434 | mov 0xf14,%g1 | |
14435 | ldx [%g4+0x68],%g3 | |
14436 | std %f24,[%g4] | |
14437 | ldx [%g4],%g2 | |
14438 | cmp %g3,%g2 ! %f24 = 000000ff 00000000 | |
14439 | bne %xcc,p0_freg_check_fail | |
14440 | mov 0xf24,%g1 | |
14441 | ||
14442 | ! Check Point 66 completed | |
14443 | ||
14444 | ||
14445 | p0_label_331: | |
14446 | ! Mem[00000000100c1428] = c780ffbb 00000000, %l2 = ffffffff, %l3 = 00000000 | |
14447 | ldda [%i3+0x028]%asi,%l2 ! %l2 = 00000000c780ffbb 0000000000000000 | |
14448 | ! Mem[00000000100c1428] = c780ffbb, %l0 = 00000000000000ff | |
14449 | lduh [%i3+0x02a],%l0 ! %l0 = 000000000000ffbb | |
14450 | ! Mem[0000000010181410] = 00000000, %l3 = 0000000000000000 | |
14451 | lduwa [%i6+0x010]%asi,%l3 ! %l3 = 0000000000000000 | |
14452 | ! Mem[0000000030101408] = 00000000, %l1 = 0000000000000000 | |
14453 | lduba [%i4+%o4]0x89,%l1 ! %l1 = 0000000000000000 | |
14454 | ! Mem[0000000010001410] = 00000000ff000000, %f22 = 02226c6b 57119e5e | |
14455 | ldda [%i0+%o5]0x80,%f22 ! %f22 = 00000000 ff000000 | |
14456 | ! Mem[0000000030101400] = 000000ff 000000ff, %l6 = 00005e27, %l7 = 00000000 | |
14457 | ldda [%i4+%g0]0x89,%l6 ! %l6 = 00000000000000ff 00000000000000ff | |
14458 | ! Mem[0000000010181410] = 00000000, %l1 = 0000000000000000 | |
14459 | ldsba [%i6+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
14460 | ! Mem[0000000030001400] = 000000ff, %l4 = 0000000000000000 | |
14461 | ldsba [%i0+%g0]0x89,%l4 ! %l4 = ffffffffffffffff | |
14462 | ! Mem[00000000300c1410] = ff000000, %l0 = 000000000000ffbb | |
14463 | lduba [%i3+%o5]0x81,%l0 ! %l0 = 00000000000000ff | |
14464 | ! Starting 10 instruction Store Burst | |
14465 | ! %f24 = 000000ff 00000000, %l2 = 00000000c780ffbb | |
14466 | ! Mem[0000000010001430] = 00000000000000ff | |
14467 | add %i0,0x030,%g1 | |
14468 | stda %f24,[%g1+%l2]ASI_PST8_P ! Mem[0000000010001430] = 000000ff00000000 | |
14469 | ||
14470 | p0_label_332: | |
14471 | ! Mem[0000000030001410] = 032cff8e, %l5 = 00000000000000ff | |
14472 | ldstuba [%i0+%o5]0x89,%l5 ! %l5 = 0000008e000000ff | |
14473 | ! Mem[000000001004143c] = e46dee46, %l4 = ffffffffffffffff | |
14474 | swap [%i1+0x03c],%l4 ! %l4 = 00000000e46dee46 | |
14475 | ! %l7 = 00000000000000ff, Mem[0000000010141400] = ffffffff | |
14476 | stba %l7,[%i5+%g0]0x80 ! Mem[0000000010141400] = ffffffff | |
14477 | ! %l1 = 0000000000000000, Mem[00000000201c0001] = 00001669, %asi = 80 | |
14478 | stba %l1,[%o0+0x001]%asi ! Mem[00000000201c0000] = 00001669 | |
14479 | ! %l2 = c780ffbb, %l3 = 00000000, Mem[0000000030101408] = 00000000 00000000 | |
14480 | stda %l2,[%i4+%o4]0x89 ! Mem[0000000030101408] = c780ffbb 00000000 | |
14481 | ! %f20 = 0000005e, Mem[0000000030141400] = 000000c7 | |
14482 | sta %f20,[%i5+%g0]0x89 ! Mem[0000000030141400] = 0000005e | |
14483 | ! %l3 = 0000000000000000, Mem[0000000010001400] = ffffffff | |
14484 | stha %l3,[%i0+%g0]0x88 ! Mem[0000000010001400] = ffff0000 | |
14485 | ! %f28 = ffffffff ff000000, %l3 = 0000000000000000 | |
14486 | ! Mem[0000000010081418] = 0000578bd9876ee7 | |
14487 | add %i2,0x018,%g1 | |
14488 | stda %f28,[%g1+%l3]ASI_PST8_PL ! Mem[0000000010081418] = 0000578bd9876ee7 | |
14489 | ! Mem[0000000010141408] = 0000005e, %l7 = 00000000000000ff | |
14490 | swapa [%i5+%o4]0x80,%l7 ! %l7 = 000000000000005e | |
14491 | ! Starting 10 instruction Load Burst | |
14492 | ! Mem[0000000010041410] = 00000000, %l2 = 00000000c780ffbb | |
14493 | ldsw [%i1+%o5],%l2 ! %l2 = 0000000000000000 | |
14494 | ||
14495 | p0_label_333: | |
14496 | ! Mem[0000000010001410] = 00000000, %l5 = 000000000000008e | |
14497 | ldsba [%i0+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
14498 | ! Mem[0000000010181408] = 00000000, %l2 = 0000000000000000 | |
14499 | ldsha [%i6+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
14500 | ! Mem[0000000010181430] = 0000000000000000, %f14 = 00000000 00000000 | |
14501 | ldda [%i6+0x030]%asi,%f14 ! %f14 = 00000000 00000000 | |
14502 | ! Mem[0000000010101430] = 7a0000000000b68a, %f14 = 00000000 00000000 | |
14503 | ldda [%i4+0x030]%asi,%f14 ! %f14 = 7a000000 0000b68a | |
14504 | ! Mem[00000000100c1428] = c780ffbb, %l3 = 0000000000000000 | |
14505 | ldsba [%i3+0x02b]%asi,%l3 ! %l3 = ffffffffffffffbb | |
14506 | ! Mem[0000000010001400] = ffff0000, %l3 = ffffffffffffffbb | |
14507 | lduha [%i0+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
14508 | ! Mem[0000000030081408] = 00000000, %l0 = 00000000000000ff | |
14509 | ldsba [%i2+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
14510 | ! Mem[0000000010001430] = 000000ff, %l4 = 00000000e46dee46 | |
14511 | ldsw [%i0+0x030],%l4 ! %l4 = 00000000000000ff | |
14512 | ! Mem[0000000030081408] = 00000000, %l6 = 00000000000000ff | |
14513 | ldsha [%i2+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
14514 | ! Starting 10 instruction Store Burst | |
14515 | ! %l6 = 0000000000000000, Mem[0000000010081400] = ff00000000000000 | |
14516 | stxa %l6,[%i2+%g0]0x88 ! Mem[0000000010081400] = 0000000000000000 | |
14517 | ||
14518 | p0_label_334: | |
14519 | ! %l7 = 000000000000005e, Mem[0000000030001410] = 032cffff | |
14520 | stwa %l7,[%i0+%o5]0x89 ! Mem[0000000030001410] = 0000005e | |
14521 | ! Mem[0000000030181410] = 00002700, %l0 = 0000000000000000 | |
14522 | ldstuba [%i6+%o5]0x89,%l0 ! %l0 = 00000000000000ff | |
14523 | ! %l5 = 0000000000000000, Mem[0000000010101410] = 000000ff | |
14524 | stwa %l5,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00000000 | |
14525 | ! Mem[0000000010001400] = 0000ffff, %l6 = 0000000000000000 | |
14526 | ldstuba [%i0+%g0]0x80,%l6 ! %l6 = 00000000000000ff | |
14527 | ! Mem[0000000010101400] = 00000000, %l5 = 0000000000000000 | |
14528 | swapa [%i4+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
14529 | ! %l3 = 0000000000000000, Mem[0000000030081408] = 00000000 | |
14530 | stba %l3,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000000 | |
14531 | ! %f4 = 00000000 00000000, %l6 = 0000000000000000 | |
14532 | ! Mem[0000000030181430] = 0f10ff1ae0ffffff | |
14533 | add %i6,0x030,%g1 | |
14534 | stda %f4,[%g1+%l6]ASI_PST16_SL ! Mem[0000000030181430] = 0f10ff1ae0ffffff | |
14535 | ! %l2 = 0000000000000000, Mem[0000000010001400] = ff00ffff | |
14536 | stwa %l2,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00000000 | |
14537 | ! %l7 = 000000000000005e, Mem[0000000010081400] = 0000000000000000, %asi = 80 | |
14538 | stxa %l7,[%i2+0x000]%asi ! Mem[0000000010081400] = 000000000000005e | |
14539 | ! Starting 10 instruction Load Burst | |
14540 | ! Mem[0000000010081424] = ff000000, %f18 = 00000000 | |
14541 | lda [%i2+0x024]%asi,%f18 ! %f18 = ff000000 | |
14542 | ||
14543 | p0_label_335: | |
14544 | ! Mem[00000000100c1410] = c7800000, %l3 = 0000000000000000 | |
14545 | ldswa [%i3+%o5]0x88,%l3 ! %l3 = ffffffffc7800000 | |
14546 | ! Mem[0000000030081408] = 00000000, %l5 = 0000000000000000 | |
14547 | ldswa [%i2+%o4]0x81,%l5 ! %l5 = 0000000000000000 | |
14548 | ! Mem[0000000030001410] = 0000005e0000005e, %f18 = ff000000 ff000000 | |
14549 | ldda [%i0+%o5]0x89,%f18 ! %f18 = 0000005e 0000005e | |
14550 | ! Mem[0000000030081410] = ff000000, %l5 = 0000000000000000 | |
14551 | ldswa [%i2+%o5]0x81,%l5 ! %l5 = ffffffffff000000 | |
14552 | ! Mem[00000000300c1408] = 00000000, %l4 = 00000000000000ff | |
14553 | lduba [%i3+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
14554 | ! Mem[00000000201c0000] = 00001669, %l5 = ffffffffff000000 | |
14555 | ldsha [%o0+0x000]%asi,%l5 ! %l5 = 0000000000000000 | |
14556 | ! Mem[000000001004141c] = 57119e5e, %l0 = 0000000000000000 | |
14557 | ldswa [%i1+0x01c]%asi,%l0 ! %l0 = 0000000057119e5e | |
14558 | ! Mem[0000000030141410] = 5e0000ff, %l4 = 0000000000000000 | |
14559 | lduba [%i5+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
14560 | ! Mem[0000000030041410] = 00000000000000ff, %f28 = ffffffff ff000000 | |
14561 | ldda [%i1+%o5]0x81,%f28 ! %f28 = 00000000 000000ff | |
14562 | ! Starting 10 instruction Store Burst | |
14563 | ! %l6 = 0000000000000000, Mem[0000000030081400] = 000000ff | |
14564 | stwa %l6,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000000 | |
14565 | ||
14566 | ! Check Point 67 for processor 0 | |
14567 | ||
14568 | set p0_check_pt_data_67,%g4 | |
14569 | rd %ccr,%g5 ! %g5 = 44 | |
14570 | ldx [%g4+0x08],%g2 | |
14571 | cmp %l0,%g2 ! %l0 = 0000000057119e5e | |
14572 | bne %xcc,p0_reg_check_fail0 | |
14573 | mov 0xee0,%g1 | |
14574 | ldx [%g4+0x10],%g2 | |
14575 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
14576 | bne %xcc,p0_reg_check_fail1 | |
14577 | mov 0xee1,%g1 | |
14578 | ldx [%g4+0x18],%g2 | |
14579 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
14580 | bne %xcc,p0_reg_check_fail2 | |
14581 | mov 0xee2,%g1 | |
14582 | ldx [%g4+0x20],%g2 | |
14583 | cmp %l3,%g2 ! %l3 = ffffffffc7800000 | |
14584 | bne %xcc,p0_reg_check_fail3 | |
14585 | mov 0xee3,%g1 | |
14586 | ldx [%g4+0x28],%g2 | |
14587 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
14588 | bne %xcc,p0_reg_check_fail4 | |
14589 | mov 0xee4,%g1 | |
14590 | ldx [%g4+0x30],%g2 | |
14591 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
14592 | bne %xcc,p0_reg_check_fail5 | |
14593 | mov 0xee5,%g1 | |
14594 | ldx [%g4+0x38],%g2 | |
14595 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
14596 | bne %xcc,p0_reg_check_fail6 | |
14597 | mov 0xee6,%g1 | |
14598 | ldx [%g4+0x40],%g3 | |
14599 | std %f2,[%g4] | |
14600 | ldx [%g4],%g2 | |
14601 | cmp %g3,%g2 ! %f2 = 00000000 ffffffff | |
14602 | bne %xcc,p0_freg_check_fail | |
14603 | mov 0xf02,%g1 | |
14604 | ldx [%g4+0x48],%g3 | |
14605 | std %f6,[%g4] | |
14606 | ldx [%g4],%g2 | |
14607 | cmp %g3,%g2 ! %f6 = d9876ee7 0000ffff | |
14608 | bne %xcc,p0_freg_check_fail | |
14609 | mov 0xf06,%g1 | |
14610 | ldx [%g4+0x50],%g3 | |
14611 | std %f14,[%g4] | |
14612 | ldx [%g4],%g2 | |
14613 | cmp %g3,%g2 ! %f14 = 7a000000 0000b68a | |
14614 | bne %xcc,p0_freg_check_fail | |
14615 | mov 0xf14,%g1 | |
14616 | ldx [%g4+0x58],%g3 | |
14617 | std %f18,[%g4] | |
14618 | ldx [%g4],%g2 | |
14619 | cmp %g3,%g2 ! %f18 = 0000005e 0000005e | |
14620 | bne %xcc,p0_freg_check_fail | |
14621 | mov 0xf18,%g1 | |
14622 | ldx [%g4+0x60],%g3 | |
14623 | std %f22,[%g4] | |
14624 | ldx [%g4],%g2 | |
14625 | cmp %g3,%g2 ! %f22 = 00000000 ff000000 | |
14626 | bne %xcc,p0_freg_check_fail | |
14627 | mov 0xf22,%g1 | |
14628 | ldx [%g4+0x68],%g3 | |
14629 | std %f28,[%g4] | |
14630 | ldx [%g4],%g2 | |
14631 | cmp %g3,%g2 ! %f28 = 00000000 000000ff | |
14632 | bne %xcc,p0_freg_check_fail | |
14633 | mov 0xf28,%g1 | |
14634 | ||
14635 | ! Check Point 67 completed | |
14636 | ||
14637 | ||
14638 | p0_label_336: | |
14639 | ! Mem[0000000010101419] = 00ff0000, %l7 = 000000000000005e | |
14640 | ldstuba [%i4+0x019]%asi,%l7 ! %l7 = 000000ff000000ff | |
14641 | ! %f8 = ff0000ff 00ffffff, %l1 = 0000000000000000 | |
14642 | ! Mem[0000000030181438] = 0000000000007a9a | |
14643 | add %i6,0x038,%g1 | |
14644 | stda %f8,[%g1+%l1]ASI_PST16_SL ! Mem[0000000030181438] = 0000000000007a9a | |
14645 | ! %f28 = 00000000 000000ff, Mem[0000000030001408] = 000000ff 00000000 | |
14646 | stda %f28,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000 000000ff | |
14647 | ! Mem[00000000201c0000] = 00001669, %l4 = 00000000000000ff | |
14648 | ldstub [%o0+%g0],%l4 ! %l4 = 00000000000000ff | |
14649 | ! %l2 = 0000000000000000, Mem[0000000030141408] = 000000ff | |
14650 | stba %l2,[%i5+%o4]0x81 ! Mem[0000000030141408] = 000000ff | |
14651 | ! Mem[0000000010141408] = 000000ff032cff8e, %f20 = 0000005e 032cff8e | |
14652 | ldda [%i5+%o4]0x80,%f20 ! %f20 = 000000ff 032cff8e | |
14653 | ! %f8 = ff0000ff 00ffffff, Mem[0000000010141408] = ff000000 8eff2c03 | |
14654 | stda %f8 ,[%i5+%o4]0x88 ! Mem[0000000010141408] = ff0000ff 00ffffff | |
14655 | ! %l1 = 0000000000000000, Mem[0000000030181400] = ffffffff | |
14656 | stba %l1,[%i6+%g0]0x89 ! Mem[0000000030181400] = ffffff00 | |
14657 | ! %l3 = ffffffffc7800000, Mem[0000000030101400] = 000000ff | |
14658 | stba %l3,[%i4+%g0]0x89 ! Mem[0000000030101400] = 00000000 | |
14659 | ! Starting 10 instruction Load Burst | |
14660 | ! Mem[0000000030041410] = 00000000, %l6 = 0000000000000000 | |
14661 | lduba [%i1+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
14662 | ||
14663 | p0_label_337: | |
14664 | ! Mem[00000000300c1400] = ff000000, %l6 = 0000000000000000 | |
14665 | ldswa [%i3+%g0]0x81,%l6 ! %l6 = ffffffffff000000 | |
14666 | ! Mem[00000000100c1410] = 000080c7, %l7 = 00000000000000ff | |
14667 | lduba [%i3+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
14668 | ! Mem[0000000030041400] = 000000ff 8ab60000, %l0 = 57119e5e, %l1 = 00000000 | |
14669 | ldda [%i1+%g0]0x81,%l0 ! %l0 = 00000000000000ff 000000008ab60000 | |
14670 | ! Code Fragment 4 | |
14671 | p0_fragment_5: | |
14672 | ! %l0 = 00000000000000ff | |
14673 | setx 0xef22602f8d8df9a0,%g7,%l0 ! %l0 = ef22602f8d8df9a0 | |
14674 | ! %l1 = 000000008ab60000 | |
14675 | setx 0x668348480193c1fa,%g7,%l1 ! %l1 = 668348480193c1fa | |
14676 | setx 0x7ff8, %g1, %g2 | |
14677 | and %l0, %g2, %l0 | |
14678 | setx 0xffffffff, %g1, %g2 | |
14679 | and %l1, %g2, %l1 | |
14680 | setx 0x100000000, %g1, %g2 | |
14681 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
14682 | ta T_CHANGE_HPRIV | |
14683 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
14684 | ta T_CHANGE_NONHPRIV | |
14685 | ! %l0 = ef22602f8d8df9a0 | |
14686 | setx 0xe94cdde025143501,%g7,%l0 ! %l0 = e94cdde025143501 | |
14687 | ! %l1 = 668348480193c1fa | |
14688 | setx 0x7cf30f507140a746,%g7,%l1 ! %l1 = 7cf30f507140a746 | |
14689 | ! Mem[00000000201c0000] = ff001669, %l3 = ffffffffc7800000 | |
14690 | lduha [%o0+0x000]%asi,%l3 ! %l3 = 000000000000ff00 | |
14691 | ! Mem[00000000100c1400] = 5e000000, %l7 = 0000000000000000 | |
14692 | lduha [%i3+%g0]0x80,%l7 ! %l7 = 0000000000005e00 | |
14693 | ! Mem[0000000030041410] = 00000000000000ff, %l1 = 7cf30f507140a746 | |
14694 | ldxa [%i1+%o5]0x81,%l1 ! %l1 = 00000000000000ff | |
14695 | ! Mem[0000000010001408] = ff000000, %l0 = e94cdde025143501 | |
14696 | lduba [%i0+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
14697 | ! Mem[0000000030141400] = 0000005e, %l6 = ffffffffff000000 | |
14698 | lduwa [%i5+%g0]0x89,%l6 ! %l6 = 000000000000005e | |
14699 | ! Starting 10 instruction Store Burst | |
14700 | ! Mem[0000000010101410] = 00000000, %l6 = 000000000000005e | |
14701 | ldstuba [%i4+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
14702 | ||
14703 | p0_label_338: | |
14704 | ! %l0 = 00000000000000ff, Mem[0000000010001420] = 005700ffff000000 | |
14705 | stx %l0,[%i0+0x020] ! Mem[0000000010001420] = 00000000000000ff | |
14706 | ! %l5 = 0000000000000000, Mem[0000000030141408] = 000000ff | |
14707 | stha %l5,[%i5+%o4]0x81 ! Mem[0000000030141408] = 000000ff | |
14708 | ! %l1 = 00000000000000ff, Mem[0000000030181408] = ff000000 | |
14709 | stba %l1,[%i6+%o4]0x89 ! Mem[0000000030181408] = ff0000ff | |
14710 | ! %l2 = 0000000000000000, Mem[0000000010081400] = 00000000 | |
14711 | stwa %l2,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 | |
14712 | ! %l6 = 0000000000000000, Mem[00000000100c1420] = 0000b68affffffff | |
14713 | stx %l6,[%i3+0x020] ! Mem[00000000100c1420] = 0000000000000000 | |
14714 | ! %f0 = 5e000000 ff000000 00000000 ffffffff | |
14715 | ! %f4 = 00000000 00000000 d9876ee7 0000ffff | |
14716 | ! %f8 = ff0000ff 00ffffff 000000ff 00000000 | |
14717 | ! %f12 = ff000000 ff000000 7a000000 0000b68a | |
14718 | stda %f0,[%i1]ASI_COMMIT_P ! Block Store to 0000000010041400 | |
14719 | ! Mem[0000000030141410] = 5e0000ff, %l7 = 0000000000005e00 | |
14720 | ldstuba [%i5+%o5]0x89,%l7 ! %l7 = 000000ff000000ff | |
14721 | ! %l7 = 00000000000000ff, Mem[0000000030041400] = ff000000 | |
14722 | stha %l7,[%i1+%g0]0x89 ! Mem[0000000030041400] = ff0000ff | |
14723 | ! Mem[0000000010181410] = 00000000ff000000, %l3 = 000000000000ff00, %l0 = 00000000000000ff | |
14724 | add %i6,0x10,%g1 | |
14725 | casxa [%g1]0x80,%l3,%l0 ! %l0 = 00000000ff000000 | |
14726 | ! Starting 10 instruction Load Burst | |
14727 | ! Mem[0000000010181400] = ffffffff, %l6 = 0000000000000000 | |
14728 | lduha [%i6+%g0]0x80,%l6 ! %l6 = 000000000000ffff | |
14729 | ||
14730 | p0_label_339: | |
14731 | ! Mem[0000000010001408] = ff000000, %f31 = 5e27ffff | |
14732 | ld [%i0+%o4],%f31 ! %f31 = ff000000 | |
14733 | ! Mem[0000000030181410] = ff270000, %l3 = 000000000000ff00 | |
14734 | ldswa [%i6+%o5]0x81,%l3 ! %l3 = ffffffffff270000 | |
14735 | ! Mem[0000000030141400] = 0000005e, %l0 = 00000000ff000000 | |
14736 | ldsha [%i5+%g0]0x89,%l0 ! %l0 = 000000000000005e | |
14737 | ! Mem[0000000030041408] = 5e270000, %f18 = 0000005e | |
14738 | lda [%i1+%o4]0x89,%f18 ! %f18 = 5e270000 | |
14739 | ! Mem[0000000010101408] = 0000ff5e, %l1 = 00000000000000ff | |
14740 | lduba [%i4+%o4]0x88,%l1 ! %l1 = 000000000000005e | |
14741 | ! Mem[0000000010081410] = ff000000, %l5 = 0000000000000000 | |
14742 | lduwa [%i2+%o5]0x80,%l5 ! %l5 = 00000000ff000000 | |
14743 | ! Mem[0000000030001408] = 00000000, %f23 = ff000000 | |
14744 | lda [%i0+%o4]0x89,%f23 ! %f23 = 00000000 | |
14745 | ! Mem[0000000030181410] = ff270000, %f19 = 0000005e | |
14746 | lda [%i6+%o5]0x81,%f19 ! %f19 = ff270000 | |
14747 | ! Mem[0000000030181400] = ffffff00, %l2 = 0000000000000000 | |
14748 | ldsba [%i6+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
14749 | ! Starting 10 instruction Store Burst | |
14750 | ! %l3 = ffffffffff270000, Mem[0000000010081408] = 00000000 | |
14751 | stw %l3,[%i2+%o4] ! Mem[0000000010081408] = ff270000 | |
14752 | ||
14753 | p0_label_340: | |
14754 | ! %l0 = 000000000000005e, Mem[0000000030041408] = 0000275e | |
14755 | stwa %l0,[%i1+%o4]0x81 ! Mem[0000000030041408] = 0000005e | |
14756 | ! Mem[0000000030181410] = 000027ff, %l1 = 000000000000005e | |
14757 | swapa [%i6+%o5]0x89,%l1 ! %l1 = 00000000000027ff | |
14758 | ! %l0 = 0000005e, %l1 = 000027ff, Mem[00000000100c1428] = c780ffbb 00000000 | |
14759 | std %l0,[%i3+0x028] ! Mem[00000000100c1428] = 0000005e 000027ff | |
14760 | ! %f30 = ffffffff, Mem[0000000010141430] = 000000ff | |
14761 | st %f30,[%i5+0x030] ! Mem[0000000010141430] = ffffffff | |
14762 | ! Code Fragment 3 | |
14763 | p0_fragment_6: | |
14764 | ! %l0 = 000000000000005e | |
14765 | setx 0xc0464c0055c217f4,%g7,%l0 ! %l0 = c0464c0055c217f4 | |
14766 | ! %l1 = 00000000000027ff | |
14767 | setx 0x0a9c7c406dcfb260,%g7,%l1 ! %l1 = 0a9c7c406dcfb260 | |
14768 | setx 0x1fe000, %g1, %g3 | |
14769 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
14770 | setx 0x1ffff8, %g1, %g2 | |
14771 | and %l0, %g2, %l0 | |
14772 | ta T_CHANGE_HPRIV | |
14773 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
14774 | ta T_CHANGE_NONHPRIV | |
14775 | ! %l0 = c0464c0055c217f4 | |
14776 | setx 0x33ec2aa846125b65,%g7,%l0 ! %l0 = 33ec2aa846125b65 | |
14777 | ! %l1 = 0a9c7c406dcfb260 | |
14778 | setx 0x84fec017c6de0242,%g7,%l1 ! %l1 = 84fec017c6de0242 | |
14779 | membar #Sync ! Added by membar checker (78) | |
14780 | ! Mem[0000000010041408] = 00000000, %l1 = 84fec017c6de0242 | |
14781 | swapa [%i1+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
14782 | ! %l5 = 00000000ff000000, Mem[0000000010001416] = ff000000 | |
14783 | stb %l5,[%i0+0x016] ! Mem[0000000010001414] = ff000000 | |
14784 | ! Code Fragment 4 | |
14785 | p0_fragment_7: | |
14786 | ! %l0 = 33ec2aa846125b65 | |
14787 | setx 0x47566d4878f1ad86,%g7,%l0 ! %l0 = 47566d4878f1ad86 | |
14788 | ! %l1 = 0000000000000000 | |
14789 | setx 0x3cf62087f2fe4a3e,%g7,%l1 ! %l1 = 3cf62087f2fe4a3e | |
14790 | setx 0x7ff8, %g1, %g2 | |
14791 | and %l0, %g2, %l0 | |
14792 | setx 0xffffffff, %g1, %g2 | |
14793 | and %l1, %g2, %l1 | |
14794 | setx 0x100000000, %g1, %g2 | |
14795 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
14796 | ta T_CHANGE_HPRIV | |
14797 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
14798 | ta T_CHANGE_NONHPRIV | |
14799 | ! %l0 = 47566d4878f1ad86 | |
14800 | setx 0x682379f7f7cc201a,%g7,%l0 ! %l0 = 682379f7f7cc201a | |
14801 | ! %l1 = 3cf62087f2fe4a3e | |
14802 | setx 0x4ae4d3a06e8cb64e,%g7,%l1 ! %l1 = 4ae4d3a06e8cb64e | |
14803 | ! Mem[0000000010101400] = 00000000, %l0 = 682379f7f7cc201a | |
14804 | ldstuba [%i4+%g0]0x88,%l0 ! %l0 = 00000000000000ff | |
14805 | ! Starting 10 instruction Load Burst | |
14806 | ! Mem[0000000010081408] = ff270000, %l1 = 4ae4d3a06e8cb64e | |
14807 | ldswa [%i2+%o4]0x80,%l1 ! %l1 = ffffffffff270000 | |
14808 | ||
14809 | ! Check Point 68 for processor 0 | |
14810 | ||
14811 | set p0_check_pt_data_68,%g4 | |
14812 | rd %ccr,%g5 ! %g5 = 44 | |
14813 | ldx [%g4+0x08],%g2 | |
14814 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
14815 | bne %xcc,p0_reg_check_fail0 | |
14816 | mov 0xee0,%g1 | |
14817 | ldx [%g4+0x10],%g2 | |
14818 | cmp %l1,%g2 ! %l1 = ffffffffff270000 | |
14819 | bne %xcc,p0_reg_check_fail1 | |
14820 | mov 0xee1,%g1 | |
14821 | ldx [%g4+0x18],%g2 | |
14822 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
14823 | bne %xcc,p0_reg_check_fail2 | |
14824 | mov 0xee2,%g1 | |
14825 | ldx [%g4+0x20],%g2 | |
14826 | cmp %l3,%g2 ! %l3 = ffffffffff270000 | |
14827 | bne %xcc,p0_reg_check_fail3 | |
14828 | mov 0xee3,%g1 | |
14829 | ldx [%g4+0x28],%g2 | |
14830 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
14831 | bne %xcc,p0_reg_check_fail4 | |
14832 | mov 0xee4,%g1 | |
14833 | ldx [%g4+0x30],%g2 | |
14834 | cmp %l5,%g2 ! %l5 = 00000000ff000000 | |
14835 | bne %xcc,p0_reg_check_fail5 | |
14836 | mov 0xee5,%g1 | |
14837 | ldx [%g4+0x38],%g2 | |
14838 | cmp %l6,%g2 ! %l6 = 000000000000ffff | |
14839 | bne %xcc,p0_reg_check_fail6 | |
14840 | mov 0xee6,%g1 | |
14841 | ldx [%g4+0x40],%g2 | |
14842 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
14843 | bne %xcc,p0_reg_check_fail7 | |
14844 | mov 0xee7,%g1 | |
14845 | ldx [%g4+0x48],%g3 | |
14846 | std %f0,[%g4] | |
14847 | ldx [%g4],%g2 | |
14848 | cmp %g3,%g2 ! %f0 = 5e000000 ff000000 | |
14849 | bne %xcc,p0_freg_check_fail | |
14850 | mov 0xf00,%g1 | |
14851 | ldx [%g4+0x50],%g3 | |
14852 | std %f18,[%g4] | |
14853 | ldx [%g4],%g2 | |
14854 | cmp %g3,%g2 ! %f18 = 5e270000 ff270000 | |
14855 | bne %xcc,p0_freg_check_fail | |
14856 | mov 0xf18,%g1 | |
14857 | ldx [%g4+0x58],%g3 | |
14858 | std %f20,[%g4] | |
14859 | ldx [%g4],%g2 | |
14860 | cmp %g3,%g2 ! %f20 = 000000ff 032cff8e | |
14861 | bne %xcc,p0_freg_check_fail | |
14862 | mov 0xf20,%g1 | |
14863 | ldx [%g4+0x60],%g3 | |
14864 | std %f22,[%g4] | |
14865 | ldx [%g4],%g2 | |
14866 | cmp %g3,%g2 ! %f22 = 00000000 00000000 | |
14867 | bne %xcc,p0_freg_check_fail | |
14868 | mov 0xf22,%g1 | |
14869 | ldx [%g4+0x68],%g3 | |
14870 | std %f30,[%g4] | |
14871 | ldx [%g4],%g2 | |
14872 | cmp %g3,%g2 ! %f30 = ffffffff ff000000 | |
14873 | bne %xcc,p0_freg_check_fail | |
14874 | mov 0xf30,%g1 | |
14875 | ||
14876 | ! Check Point 68 completed | |
14877 | ||
14878 | ||
14879 | p0_label_341: | |
14880 | ! Mem[00000000300c1408] = 0000000000000000, %l5 = 00000000ff000000 | |
14881 | ldxa [%i3+%o4]0x81,%l5 ! %l5 = 0000000000000000 | |
14882 | ! Mem[0000000010181410] = 00000000, %l5 = 0000000000000000 | |
14883 | ldsha [%i6+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
14884 | ! Mem[0000000010181408] = 00000000000000ff, %l0 = 0000000000000000 | |
14885 | ldxa [%i6+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
14886 | ! Mem[0000000010081420] = 9ce0b68a, %l0 = 00000000000000ff | |
14887 | lduwa [%i2+0x020]%asi,%l0 ! %l0 = 000000009ce0b68a | |
14888 | ! Mem[0000000010041410] = 00000000, %f15 = 0000b68a | |
14889 | lda [%i1+%o5]0x80,%f15 ! %f15 = 00000000 | |
14890 | ! Mem[0000000010141418] = 5e9e1157, %l1 = ffffffffff270000 | |
14891 | lduh [%i5+0x01a],%l1 ! %l1 = 0000000000001157 | |
14892 | ! Mem[0000000010141408] = ffffff00, %l7 = 00000000000000ff | |
14893 | lduwa [%i5+0x008]%asi,%l7 ! %l7 = 00000000ffffff00 | |
14894 | ! Mem[0000000030041400] = 0000b68aff0000ff, %l5 = 0000000000000000 | |
14895 | ldxa [%i1+%g0]0x89,%l5 ! %l5 = 0000b68aff0000ff | |
14896 | ! Mem[0000000030141408] = 000000ffff000000, %f4 = 00000000 00000000 | |
14897 | ldda [%i5+%o4]0x89,%f4 ! %f4 = 000000ff ff000000 | |
14898 | ! Starting 10 instruction Store Burst | |
14899 | ! %l7 = 00000000ffffff00, Mem[00000000300c1408] = 00000000 | |
14900 | stwa %l7,[%i3+%o4]0x81 ! Mem[00000000300c1408] = ffffff00 | |
14901 | ||
14902 | p0_label_342: | |
14903 | ! %l0 = 000000009ce0b68a, Mem[0000000021800180] = 0000db07 | |
14904 | sth %l0,[%o3+0x180] ! Mem[0000000021800180] = b68adb07 | |
14905 | ! %l2 = 00000000, %l3 = ff270000, Mem[0000000030101400] = 00000000 ff000000 | |
14906 | stda %l2,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 ff270000 | |
14907 | ! Mem[0000000010041408] = c6de0242, %l1 = 0000000000001157 | |
14908 | ldstuba [%i1+%o4]0x80,%l1 ! %l1 = 000000c6000000ff | |
14909 | ! %l4 = 0000000000000000, Mem[0000000010041418] = d9876ee70000ffff, %asi = 80 | |
14910 | stxa %l4,[%i1+0x018]%asi ! Mem[0000000010041418] = 0000000000000000 | |
14911 | ! %f1 = ff000000, Mem[0000000010001400] = 00000000 | |
14912 | sta %f1 ,[%i0+%g0]0x88 ! Mem[0000000010001400] = ff000000 | |
14913 | ! %f20 = 000000ff 032cff8e, Mem[0000000010081400] = 00000000 5e000000 | |
14914 | stda %f20,[%i2+%g0]0x88 ! Mem[0000000010081400] = 000000ff 032cff8e | |
14915 | ! %f0 = 5e000000 ff000000 00000000 ffffffff | |
14916 | ! %f4 = 000000ff ff000000 d9876ee7 0000ffff | |
14917 | ! %f8 = ff0000ff 00ffffff 000000ff 00000000 | |
14918 | ! %f12 = ff000000 ff000000 7a000000 00000000 | |
14919 | stda %f0,[%i6]ASI_BLK_AIUPL ! Block Store to 0000000010181400 | |
14920 | ! %l3 = ffffffffff270000, Mem[0000000010001428] = 00000057, %asi = 80 | |
14921 | stwa %l3,[%i0+0x028]%asi ! Mem[0000000010001428] = ff270000 | |
14922 | ! %l4 = 0000000000000000, Mem[0000000030001408] = 00000000 | |
14923 | stwa %l4,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000 | |
14924 | ! Starting 10 instruction Load Burst | |
14925 | ! Mem[0000000030081400] = 00000000, %l6 = 000000000000ffff | |
14926 | lduha [%i2+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
14927 | ||
14928 | p0_label_343: | |
14929 | ! Mem[0000000010141434] = ffffffff, %l1 = 00000000000000c6 | |
14930 | ldsba [%i5+0x034]%asi,%l1 ! %l1 = ffffffffffffffff | |
14931 | ! Mem[00000000100c1410] = c7800000, %l2 = 0000000000000000 | |
14932 | lduba [%i3+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
14933 | membar #Sync ! Added by membar checker (79) | |
14934 | ! Mem[0000000010181400] = 000000ff, %l5 = 0000b68aff0000ff | |
14935 | ldsha [%i6+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
14936 | ! Mem[00000000300c1408] = 00ffffff, %l3 = ffffffffff270000 | |
14937 | ldswa [%i3+%o4]0x89,%l3 ! %l3 = 0000000000ffffff | |
14938 | ! Mem[0000000030001410] = 0000005e, %l1 = ffffffffffffffff | |
14939 | lduba [%i0+%o5]0x89,%l1 ! %l1 = 000000000000005e | |
14940 | ! Mem[00000000100c1408] = 000000ff, %l1 = 000000000000005e | |
14941 | ldswa [%i3+%o4]0x88,%l1 ! %l1 = 00000000000000ff | |
14942 | ! Mem[0000000030141410] = ff00005e, %l4 = 0000000000000000 | |
14943 | ldswa [%i5+%o5]0x81,%l4 ! %l4 = ffffffffff00005e | |
14944 | ! Mem[0000000030101408] = bbff80c7, %l4 = ffffffffff00005e | |
14945 | lduwa [%i4+%o4]0x81,%l4 ! %l4 = 00000000bbff80c7 | |
14946 | ! Mem[0000000010141408] = 00ffffff, %l2 = 0000000000000000 | |
14947 | ldsba [%i5+%o4]0x88,%l2 ! %l2 = ffffffffffffffff | |
14948 | ! Starting 10 instruction Store Burst | |
14949 | ! Mem[0000000030081410] = ff000000, %l2 = ffffffffffffffff | |
14950 | swapa [%i2+%o5]0x81,%l2 ! %l2 = 00000000ff000000 | |
14951 | ||
14952 | p0_label_344: | |
14953 | ! Mem[0000000021800000] = fff29a65, %l2 = 00000000ff000000 | |
14954 | ldstub [%o3+%g0],%l2 ! %l2 = 000000ff000000ff | |
14955 | ! %l6 = 0000000000000000, Mem[0000000030141400] = 0000005e | |
14956 | stha %l6,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000 | |
14957 | ! %l4 = 00000000bbff80c7, Mem[0000000020800000] = ff060db6, %asi = 80 | |
14958 | stba %l4,[%o1+0x000]%asi ! Mem[0000000020800000] = c7060db6 | |
14959 | ! %l6 = 00000000, %l7 = ffffff00, Mem[0000000030081410] = ffffffff 00000000 | |
14960 | stda %l6,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00000000 ffffff00 | |
14961 | ! %l0 = 9ce0b68a, %l1 = 000000ff, Mem[0000000010141420] = 000000ff ff000000 | |
14962 | stda %l0,[%i5+0x020]%asi ! Mem[0000000010141420] = 9ce0b68a 000000ff | |
14963 | ! %l5 = 0000000000000000, Mem[0000000021800141] = 00fff8a0 | |
14964 | stb %l5,[%o3+0x141] ! Mem[0000000021800140] = 0000f8a0 | |
14965 | ! %f0 = 5e000000 ff000000, Mem[0000000010101400] = ff000000 00000000 | |
14966 | stda %f0 ,[%i4+%g0]0x80 ! Mem[0000000010101400] = 5e000000 ff000000 | |
14967 | ! %l1 = 00000000000000ff, Mem[0000000010141400] = ffffffff | |
14968 | stba %l1,[%i5+%g0]0x88 ! Mem[0000000010141400] = ffffffff | |
14969 | ! Mem[0000000030041408] = 5e000000, %l4 = 00000000bbff80c7 | |
14970 | ldstuba [%i1+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
14971 | ! Starting 10 instruction Load Burst | |
14972 | ! Mem[0000000030041400] = 0000b68aff0000ff, %f24 = 000000ff 00000000 | |
14973 | ldda [%i1+%g0]0x89,%f24 ! %f24 = 0000b68a ff0000ff | |
14974 | ||
14975 | p0_label_345: | |
14976 | ! Mem[00000000211c0000] = fffffe0c, %l5 = 0000000000000000 | |
14977 | lduba [%o2+0x001]%asi,%l5 ! %l5 = 00000000000000ff | |
14978 | ! Mem[0000000030141410] = ff00005e, %l3 = 0000000000ffffff | |
14979 | ldsba [%i5+%o5]0x81,%l3 ! %l3 = ffffffffffffffff | |
14980 | ! Mem[0000000010001430] = 000000ff, %l3 = ffffffffffffffff | |
14981 | ldsba [%i0+0x030]%asi,%l3 ! %l3 = 0000000000000000 | |
14982 | ! Mem[00000000300c1408] = 00ffffff, %l4 = 0000000000000000 | |
14983 | lduha [%i3+%o4]0x89,%l4 ! %l4 = 000000000000ffff | |
14984 | ! Mem[0000000010181410] = 000000ff, %l7 = 00000000ffffff00 | |
14985 | ldsba [%i6+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
14986 | ! Mem[0000000010141410] = 0000005e 032cff8e, %l2 = 000000ff, %l3 = 00000000 | |
14987 | ldda [%i5+%o5]0x88,%l2 ! %l2 = 00000000032cff8e 000000000000005e | |
14988 | ! Mem[0000000030001408] = 00000000, %f31 = ff000000 | |
14989 | lda [%i0+%o4]0x89,%f31 ! %f31 = 00000000 | |
14990 | ! Mem[0000000030081410] = 00000000, %l1 = 00000000000000ff | |
14991 | lduba [%i2+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
14992 | ! Mem[0000000030141408] = 000000ff, %l5 = 00000000000000ff | |
14993 | lduha [%i5+%o4]0x81,%l5 ! %l5 = 0000000000000000 | |
14994 | ! Starting 10 instruction Store Burst | |
14995 | ! Mem[0000000010101416] = ff000000, %l5 = 0000000000000000 | |
14996 | ldstub [%i4+0x016],%l5 ! %l5 = 00000000000000ff | |
14997 | ||
14998 | ! Check Point 69 for processor 0 | |
14999 | ||
15000 | set p0_check_pt_data_69,%g4 | |
15001 | rd %ccr,%g5 ! %g5 = 44 | |
15002 | ldx [%g4+0x08],%g2 | |
15003 | cmp %l0,%g2 ! %l0 = 000000009ce0b68a | |
15004 | bne %xcc,p0_reg_check_fail0 | |
15005 | mov 0xee0,%g1 | |
15006 | ldx [%g4+0x10],%g2 | |
15007 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
15008 | bne %xcc,p0_reg_check_fail1 | |
15009 | mov 0xee1,%g1 | |
15010 | ldx [%g4+0x18],%g2 | |
15011 | cmp %l2,%g2 ! %l2 = 00000000032cff8e | |
15012 | bne %xcc,p0_reg_check_fail2 | |
15013 | mov 0xee2,%g1 | |
15014 | ldx [%g4+0x20],%g2 | |
15015 | cmp %l3,%g2 ! %l3 = 000000000000005e | |
15016 | bne %xcc,p0_reg_check_fail3 | |
15017 | mov 0xee3,%g1 | |
15018 | ldx [%g4+0x28],%g2 | |
15019 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
15020 | bne %xcc,p0_reg_check_fail4 | |
15021 | mov 0xee4,%g1 | |
15022 | ldx [%g4+0x30],%g2 | |
15023 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
15024 | bne %xcc,p0_reg_check_fail5 | |
15025 | mov 0xee5,%g1 | |
15026 | ldx [%g4+0x38],%g2 | |
15027 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
15028 | bne %xcc,p0_reg_check_fail6 | |
15029 | mov 0xee6,%g1 | |
15030 | ldx [%g4+0x40],%g2 | |
15031 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
15032 | bne %xcc,p0_reg_check_fail7 | |
15033 | mov 0xee7,%g1 | |
15034 | ldx [%g4+0x48],%g3 | |
15035 | std %f2,[%g4] | |
15036 | ldx [%g4],%g2 | |
15037 | cmp %g3,%g2 ! %f2 = 00000000 ffffffff | |
15038 | bne %xcc,p0_freg_check_fail | |
15039 | mov 0xf02,%g1 | |
15040 | ldx [%g4+0x50],%g3 | |
15041 | std %f4,[%g4] | |
15042 | ldx [%g4],%g2 | |
15043 | cmp %g3,%g2 ! %f4 = 000000ff ff000000 | |
15044 | bne %xcc,p0_freg_check_fail | |
15045 | mov 0xf04,%g1 | |
15046 | ldx [%g4+0x58],%g3 | |
15047 | std %f14,[%g4] | |
15048 | ldx [%g4],%g2 | |
15049 | cmp %g3,%g2 ! %f14 = 7a000000 00000000 | |
15050 | bne %xcc,p0_freg_check_fail | |
15051 | mov 0xf14,%g1 | |
15052 | ldx [%g4+0x60],%g3 | |
15053 | std %f24,[%g4] | |
15054 | ldx [%g4],%g2 | |
15055 | cmp %g3,%g2 ! %f24 = 0000b68a ff0000ff | |
15056 | bne %xcc,p0_freg_check_fail | |
15057 | mov 0xf24,%g1 | |
15058 | ldx [%g4+0x68],%g3 | |
15059 | std %f30,[%g4] | |
15060 | ldx [%g4],%g2 | |
15061 | cmp %g3,%g2 ! %f30 = ffffffff 00000000 | |
15062 | bne %xcc,p0_freg_check_fail | |
15063 | mov 0xf30,%g1 | |
15064 | ||
15065 | ! Check Point 69 completed | |
15066 | ||
15067 | ||
15068 | p0_label_346: | |
15069 | ! %l4 = 000000000000ffff, Mem[0000000010081400] = 8eff2c03 | |
15070 | stba %l4,[%i2+%g0]0x80 ! Mem[0000000010081400] = ffff2c03 | |
15071 | ! Mem[000000001018140c] = 00000000, %l5 = 0000000000000000 | |
15072 | swap [%i6+0x00c],%l5 ! %l5 = 0000000000000000 | |
15073 | ! Mem[0000000010001438] = ffff275e, %l7 = 00000000, %l1 = 00000000 | |
15074 | add %i0,0x38,%g1 | |
15075 | casa [%g1]0x80,%l7,%l1 ! %l1 = 00000000ffff275e | |
15076 | ! Mem[0000000010081420] = 9ce0b68a, %l2 = 00000000032cff8e | |
15077 | swap [%i2+0x020],%l2 ! %l2 = 000000009ce0b68a | |
15078 | ! %l0 = 9ce0b68a, %l1 = ffff275e, Mem[0000000010041430] = ff000000 ff000000 | |
15079 | stda %l0,[%i1+0x030]%asi ! Mem[0000000010041430] = 9ce0b68a ffff275e | |
15080 | ! %f20 = 000000ff 032cff8e, Mem[0000000010141400] = ffffffff 000000ff | |
15081 | stda %f20,[%i5+%g0]0x80 ! Mem[0000000010141400] = 000000ff 032cff8e | |
15082 | ! %l0 = 000000009ce0b68a, Mem[0000000010041418] = 0000000000000000 | |
15083 | stx %l0,[%i1+0x018] ! Mem[0000000010041418] = 000000009ce0b68a | |
15084 | ! %l0 = 9ce0b68a, %l1 = ffff275e, Mem[0000000010181400] = 000000ff 0000005e | |
15085 | stda %l0,[%i6+%g0]0x80 ! Mem[0000000010181400] = 9ce0b68a ffff275e | |
15086 | ! %l4 = 0000ffff, %l5 = 00000000, Mem[0000000010181418] = ffff0000 e76e87d9 | |
15087 | stda %l4,[%i6+0x018]%asi ! Mem[0000000010181418] = 0000ffff 00000000 | |
15088 | ! Starting 10 instruction Load Burst | |
15089 | ! Mem[00000000300c1400] = 000000ff, %l5 = 0000000000000000 | |
15090 | ldsha [%i3+%g0]0x89,%l5 ! %l5 = 00000000000000ff | |
15091 | ||
15092 | p0_label_347: | |
15093 | ! Mem[0000000010081400] = ffff2c03ff000000, %f22 = 00000000 00000000 | |
15094 | ldda [%i2+%g0]0x80,%f22 ! %f22 = ffff2c03 ff000000 | |
15095 | ! Mem[0000000030101410] = 00ffffff8ab6e09c, %f30 = ffffffff 00000000 | |
15096 | ldda [%i4+%o5]0x81,%f30 ! %f30 = 00ffffff 8ab6e09c | |
15097 | ! Mem[00000000201c0000] = ff001669, %l5 = 00000000000000ff | |
15098 | ldsba [%o0+0x001]%asi,%l5 ! %l5 = 0000000000000000 | |
15099 | ! Mem[0000000010081410] = ff000000, %f22 = ffff2c03 | |
15100 | lda [%i2+%o5]0x80,%f22 ! %f22 = ff000000 | |
15101 | ! Mem[0000000030081400] = 00000000, %l1 = 00000000ffff275e | |
15102 | lduha [%i2+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
15103 | ! Mem[0000000010001400] = 000000ff, %l7 = 0000000000000000 | |
15104 | lduba [%i0+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
15105 | ! Mem[0000000010101438] = 5e27ffffd9876ee7, %l7 = 0000000000000000 | |
15106 | ldxa [%i4+0x038]%asi,%l7 ! %l7 = 5e27ffffd9876ee7 | |
15107 | ! Mem[00000000300c1400] = ff000000, %l0 = 000000009ce0b68a | |
15108 | lduwa [%i3+%g0]0x81,%l0 ! %l0 = 00000000ff000000 | |
15109 | ! Mem[00000000100c1438] = ff00ffe4 ffff00ff, %l0 = ff000000, %l1 = 00000000 | |
15110 | ldda [%i3+0x038]%asi,%l0 ! %l0 = 00000000ff00ffe4 00000000ffff00ff | |
15111 | ! Starting 10 instruction Store Burst | |
15112 | ! Mem[0000000030141400] = 00000000, %l7 = 5e27ffffd9876ee7 | |
15113 | swapa [%i5+%g0]0x81,%l7 ! %l7 = 0000000000000000 | |
15114 | ||
15115 | p0_label_348: | |
15116 | ! %l6 = 0000000000000000, Mem[0000000030181400] = ffffff00 | |
15117 | stba %l6,[%i6+%g0]0x89 ! Mem[0000000030181400] = ffffff00 | |
15118 | ! %l3 = 000000000000005e, Mem[00000000100c1410] = 000000ffc7800000 | |
15119 | stxa %l3,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 000000000000005e | |
15120 | ! %f4 = 000000ff, Mem[0000000030141408] = 000000ff | |
15121 | sta %f4 ,[%i5+%o4]0x81 ! Mem[0000000030141408] = 000000ff | |
15122 | ! %l1 = 00000000ffff00ff, Mem[0000000010081410] = ff000000ffffffff, %asi = 80 | |
15123 | stxa %l1,[%i2+0x010]%asi ! Mem[0000000010081410] = 00000000ffff00ff | |
15124 | ! %f18 = 5e270000 ff270000, %l2 = 000000009ce0b68a | |
15125 | ! Mem[00000000300c1430] = c2ff6960c79a7436 | |
15126 | add %i3,0x030,%g1 | |
15127 | stda %f18,[%g1+%l2]ASI_PST8_S ! Mem[00000000300c1430] = 5eff6960ff9a0036 | |
15128 | ! %l5 = 0000000000000000, Mem[0000000030181410] = 0000005e | |
15129 | stba %l5,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000 | |
15130 | ! Mem[0000000010141434] = ffffffff, %l2 = 000000009ce0b68a | |
15131 | swap [%i5+0x034],%l2 ! %l2 = 00000000ffffffff | |
15132 | ! Mem[00000000100c1416] = 00000000, %l3 = 000000000000005e | |
15133 | ldstuba [%i3+0x016]%asi,%l3 ! %l3 = 00000000000000ff | |
15134 | ! %l2 = 00000000ffffffff, Mem[0000000010141408] = ffffff00 | |
15135 | stwa %l2,[%i5+%o4]0x80 ! Mem[0000000010141408] = ffffffff | |
15136 | ! Starting 10 instruction Load Burst | |
15137 | ! Mem[0000000010081410] = ff00ffff00000000, %f2 = 00000000 ffffffff | |
15138 | ldda [%i2+%o5]0x88,%f2 ! %f2 = ff00ffff 00000000 | |
15139 | ||
15140 | p0_label_349: | |
15141 | ! Mem[00000000211c0000] = fffffe0c, %l2 = 00000000ffffffff | |
15142 | ldsba [%o2+0x001]%asi,%l2 ! %l2 = ffffffffffffffff | |
15143 | ! Mem[0000000030081410] = 00000000, %l1 = 00000000ffff00ff | |
15144 | ldsha [%i2+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
15145 | ! Mem[0000000021800080] = ffff0b33, %l0 = 00000000ff00ffe4 | |
15146 | lduba [%o3+0x080]%asi,%l0 ! %l0 = 00000000000000ff | |
15147 | ! Mem[0000000030181410] = 00000000, %f6 = d9876ee7 | |
15148 | lda [%i6+%o5]0x89,%f6 ! %f6 = 00000000 | |
15149 | ! Mem[000000001018141c] = 00000000, %l5 = 0000000000000000 | |
15150 | ldswa [%i6+0x01c]%asi,%l5 ! %l5 = 0000000000000000 | |
15151 | ! Mem[0000000010041410] = 00000000, %f4 = 000000ff | |
15152 | lda [%i1+%o5]0x88,%f4 ! %f4 = 00000000 | |
15153 | ! Mem[0000000010141408] = ffffffff, %l6 = 0000000000000000 | |
15154 | lduha [%i5+%o4]0x80,%l6 ! %l6 = 000000000000ffff | |
15155 | ! Mem[00000000300c1410] = 00000000000000ff, %l0 = 00000000000000ff | |
15156 | ldxa [%i3+%o5]0x89,%l0 ! %l0 = 00000000000000ff | |
15157 | ! Mem[00000000300c1410] = ff000000 00000000, %l0 = 000000ff, %l1 = 00000000 | |
15158 | ldda [%i3+%o5]0x81,%l0 ! %l0 = 00000000ff000000 0000000000000000 | |
15159 | ! Starting 10 instruction Store Burst | |
15160 | ! Mem[0000000010041410] = 00000000, %l6 = 000000000000ffff | |
15161 | ldstuba [%i1+%o5]0x80,%l6 ! %l6 = 00000000000000ff | |
15162 | ||
15163 | p0_label_350: | |
15164 | ! Mem[00000000211c0000] = fffffe0c, %l1 = 0000000000000000 | |
15165 | ldstub [%o2+%g0],%l1 ! %l1 = 000000ff000000ff | |
15166 | ! %l6 = 0000000000000000, Mem[0000000030041408] = 5e0000ff | |
15167 | stha %l6,[%i1+%o4]0x89 ! Mem[0000000030041408] = 5e000000 | |
15168 | ! Mem[0000000030141408] = 000000ff, %l0 = 00000000ff000000 | |
15169 | swapa [%i5+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
15170 | ! %l2 = ffffffffffffffff, Mem[0000000010081410] = 00000000 | |
15171 | stwa %l2,[%i2+%o5]0x80 ! Mem[0000000010081410] = ffffffff | |
15172 | ! %f24 = 0000b68a ff0000ff, %l6 = 0000000000000000 | |
15173 | ! Mem[00000000300c1410] = ff00000000000000 | |
15174 | add %i3,0x010,%g1 | |
15175 | stda %f24,[%g1+%l6]ASI_PST8_S ! Mem[00000000300c1410] = ff00000000000000 | |
15176 | ! %l4 = 0000ffff, %l5 = 00000000, Mem[0000000030001408] = 00000000 000000ff | |
15177 | stda %l4,[%i0+%o4]0x81 ! Mem[0000000030001408] = 0000ffff 00000000 | |
15178 | ! %l2 = ffffffffffffffff, Mem[0000000010101400] = 0000005e | |
15179 | stwa %l2,[%i4+%g0]0x88 ! Mem[0000000010101400] = ffffffff | |
15180 | ! %l6 = 0000000000000000, Mem[0000000010081410] = ffffffff | |
15181 | stba %l6,[%i2+%o5]0x80 ! Mem[0000000010081410] = 00ffffff | |
15182 | ! %f6 = 00000000 0000ffff, %l3 = 0000000000000000 | |
15183 | ! Mem[0000000030181410] = 00000000000000ff | |
15184 | add %i6,0x010,%g1 | |
15185 | stda %f6,[%g1+%l3]ASI_PST32_S ! Mem[0000000030181410] = 00000000000000ff | |
15186 | ! Starting 10 instruction Load Burst | |
15187 | ! Mem[00000000218000c0] = 00ff4e2c, %l5 = 0000000000000000 | |
15188 | lduba [%o3+0x0c1]%asi,%l5 ! %l5 = 00000000000000ff | |
15189 | ||
15190 | ! Check Point 70 for processor 0 | |
15191 | ||
15192 | set p0_check_pt_data_70,%g4 | |
15193 | rd %ccr,%g5 ! %g5 = 44 | |
15194 | ldx [%g4+0x08],%g2 | |
15195 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
15196 | bne %xcc,p0_reg_check_fail0 | |
15197 | mov 0xee0,%g1 | |
15198 | ldx [%g4+0x10],%g2 | |
15199 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
15200 | bne %xcc,p0_reg_check_fail1 | |
15201 | mov 0xee1,%g1 | |
15202 | ldx [%g4+0x18],%g2 | |
15203 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
15204 | bne %xcc,p0_reg_check_fail2 | |
15205 | mov 0xee2,%g1 | |
15206 | ldx [%g4+0x20],%g2 | |
15207 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
15208 | bne %xcc,p0_reg_check_fail3 | |
15209 | mov 0xee3,%g1 | |
15210 | ldx [%g4+0x28],%g2 | |
15211 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
15212 | bne %xcc,p0_reg_check_fail5 | |
15213 | mov 0xee5,%g1 | |
15214 | ldx [%g4+0x30],%g2 | |
15215 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
15216 | bne %xcc,p0_reg_check_fail6 | |
15217 | mov 0xee6,%g1 | |
15218 | ldx [%g4+0x38],%g2 | |
15219 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
15220 | bne %xcc,p0_reg_check_fail7 | |
15221 | mov 0xee7,%g1 | |
15222 | ldx [%g4+0x40],%g3 | |
15223 | std %f0,[%g4] | |
15224 | ldx [%g4],%g2 | |
15225 | cmp %g3,%g2 ! %f0 = 5e000000 ff000000 | |
15226 | bne %xcc,p0_freg_check_fail | |
15227 | mov 0xf00,%g1 | |
15228 | ldx [%g4+0x48],%g3 | |
15229 | std %f2,[%g4] | |
15230 | ldx [%g4],%g2 | |
15231 | cmp %g3,%g2 ! %f2 = ff00ffff 00000000 | |
15232 | bne %xcc,p0_freg_check_fail | |
15233 | mov 0xf02,%g1 | |
15234 | ldx [%g4+0x50],%g3 | |
15235 | std %f4,[%g4] | |
15236 | ldx [%g4],%g2 | |
15237 | cmp %g3,%g2 ! %f4 = 00000000 ff000000 | |
15238 | bne %xcc,p0_freg_check_fail | |
15239 | mov 0xf04,%g1 | |
15240 | ldx [%g4+0x58],%g3 | |
15241 | std %f6,[%g4] | |
15242 | ldx [%g4],%g2 | |
15243 | cmp %g3,%g2 ! %f6 = 00000000 0000ffff | |
15244 | bne %xcc,p0_freg_check_fail | |
15245 | mov 0xf06,%g1 | |
15246 | ldx [%g4+0x60],%g3 | |
15247 | std %f22,[%g4] | |
15248 | ldx [%g4],%g2 | |
15249 | cmp %g3,%g2 ! %f22 = ff000000 ff000000 | |
15250 | bne %xcc,p0_freg_check_fail | |
15251 | mov 0xf22,%g1 | |
15252 | ldx [%g4+0x68],%g3 | |
15253 | std %f30,[%g4] | |
15254 | ldx [%g4],%g2 | |
15255 | cmp %g3,%g2 ! %f30 = 00ffffff 8ab6e09c | |
15256 | bne %xcc,p0_freg_check_fail | |
15257 | mov 0xf30,%g1 | |
15258 | ||
15259 | ! Check Point 70 completed | |
15260 | ||
15261 | ||
15262 | p0_label_351: | |
15263 | ! Mem[00000000201c0000] = ff001669, %l5 = 00000000000000ff | |
15264 | ldsha [%o0+0x000]%asi,%l5 ! %l5 = ffffffffffffff00 | |
15265 | ! Mem[0000000030001410] = 0000005e 0000005e, %l6 = 00000000, %l7 = 00000000 | |
15266 | ldda [%i0+%o5]0x89,%l6 ! %l6 = 000000000000005e 000000000000005e | |
15267 | ! Mem[0000000010141408] = ffffffff, %l7 = 000000000000005e | |
15268 | ldswa [%i5+%o4]0x88,%l7 ! %l7 = ffffffffffffffff | |
15269 | ! Mem[0000000010141410] = 032cff8e, %l7 = ffffffffffffffff | |
15270 | ldsba [%i5+%o5]0x88,%l7 ! %l7 = ffffffffffffff8e | |
15271 | ! Mem[0000000010141408] = ffffffff, %l5 = ffffffffffffff00 | |
15272 | lduha [%i5+%o4]0x88,%l5 ! %l5 = 000000000000ffff | |
15273 | ! Mem[0000000010081408] = 96000000 000027ff, %l0 = 000000ff, %l1 = 000000ff | |
15274 | ldda [%i2+%o4]0x88,%l0 ! %l0 = 00000000000027ff 0000000096000000 | |
15275 | ! Mem[0000000010041408] = 4202deff, %l6 = 000000000000005e | |
15276 | ldsba [%i1+%o4]0x88,%l6 ! %l6 = ffffffffffffffff | |
15277 | ! Mem[0000000010181408] = ffffffff, %l0 = 00000000000027ff | |
15278 | ldsha [%i6+%o4]0x80,%l0 ! %l0 = ffffffffffffffff | |
15279 | membar #Sync ! Added by membar checker (80) | |
15280 | ! Mem[00000000100c1400] = 5e000000 00000000 ff000000 ff0000ff | |
15281 | ! Mem[00000000100c1410] = 5e000000 0000ff00 5e9e11ff 6b6c2202 | |
15282 | ! Mem[00000000100c1420] = 00000000 00000000 0000005e 000027ff | |
15283 | ! Mem[00000000100c1430] = ff00ffff ff0000ff ff00ffe4 ffff00ff | |
15284 | ldda [%i3]ASI_BLK_AIUP,%f16 ! Block Load from 00000000100c1400 | |
15285 | ! Starting 10 instruction Store Burst | |
15286 | ! %f12 = ff000000 ff000000, %l3 = 0000000000000000 | |
15287 | ! Mem[00000000300c1400] = ff000000e2000000 | |
15288 | stda %f12,[%i3+%l3]ASI_PST16_SL ! Mem[00000000300c1400] = ff000000e2000000 | |
15289 | ||
15290 | p0_label_352: | |
15291 | ! Mem[0000000010081408] = 000027ff, %l1 = 0000000096000000 | |
15292 | swapa [%i2+%o4]0x88,%l1 ! %l1 = 00000000000027ff | |
15293 | ! %l4 = 000000000000ffff, Mem[0000000021800180] = b68adb07 | |
15294 | sth %l4,[%o3+0x180] ! Mem[0000000021800180] = ffffdb07 | |
15295 | ! Mem[0000000030001410] = 0000005e, %l5 = 000000000000ffff | |
15296 | swapa [%i0+%o5]0x89,%l5 ! %l5 = 000000000000005e | |
15297 | ! %f7 = 0000ffff, Mem[0000000010101400] = ffffffff | |
15298 | sta %f7 ,[%i4+%g0]0x88 ! Mem[0000000010101400] = 0000ffff | |
15299 | ! %l3 = 0000000000000000, Mem[0000000030181400] = 00ffffff | |
15300 | stha %l3,[%i6+%g0]0x81 ! Mem[0000000030181400] = 0000ffff | |
15301 | ! Mem[0000000010081404] = ff000000, %l3 = 00000000, %l3 = 00000000 | |
15302 | add %i2,0x04,%g1 | |
15303 | casa [%g1]0x80,%l3,%l3 ! %l3 = 00000000ff000000 | |
15304 | ! Mem[0000000010081424] = ff000000, %l1 = 00000000000027ff | |
15305 | swap [%i2+0x024],%l1 ! %l1 = 00000000ff000000 | |
15306 | ! Mem[0000000030041408] = 5e000000, %l5 = 000000000000005e | |
15307 | ldstuba [%i1+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
15308 | ! %l2 = ffffffffffffffff, Mem[0000000010081408] = 0000009600000096 | |
15309 | stxa %l2,[%i2+%o4]0x80 ! Mem[0000000010081408] = ffffffffffffffff | |
15310 | ! Starting 10 instruction Load Burst | |
15311 | ! Mem[0000000020800040] = ffff9ffa, %l2 = ffffffffffffffff | |
15312 | ldsh [%o1+0x040],%l2 ! %l2 = ffffffffffffffff | |
15313 | ||
15314 | p0_label_353: | |
15315 | ! Mem[0000000010081410] = 00ffffff ffff00ff, %l0 = ffffffff, %l1 = ff000000 | |
15316 | ldda [%i2+%o5]0x80,%l0 ! %l0 = 0000000000ffffff 00000000ffff00ff | |
15317 | ! Mem[0000000030141400] = e76e87d9, %l1 = 00000000ffff00ff | |
15318 | ldsba [%i5+%g0]0x89,%l1 ! %l1 = ffffffffffffffd9 | |
15319 | ! Mem[0000000010081400] = ffff2c03, %l4 = 000000000000ffff | |
15320 | lduha [%i2+%g0]0x80,%l4 ! %l4 = 000000000000ffff | |
15321 | ! Mem[00000000211c0000] = fffffe0c, %l2 = ffffffffffffffff | |
15322 | ldsha [%o2+0x000]%asi,%l2 ! %l2 = ffffffffffffffff | |
15323 | ! Mem[0000000010041408] = ffde0242, %l6 = ffffffffffffffff | |
15324 | lduba [%i1+%o4]0x80,%l6 ! %l6 = 00000000000000ff | |
15325 | ! Mem[0000000010041408] = ffde0242, %l0 = 0000000000ffffff | |
15326 | ldsba [%i1+%o4]0x80,%l0 ! %l0 = ffffffffffffffff | |
15327 | ! Mem[0000000010181400] = 9ce0b68a, %l2 = ffffffffffffffff | |
15328 | lduha [%i6+0x002]%asi,%l2 ! %l2 = 000000000000b68a | |
15329 | ! Mem[0000000020800040] = ffff9ffa, %l6 = 00000000000000ff | |
15330 | ldsha [%o1+0x040]%asi,%l6 ! %l6 = ffffffffffffffff | |
15331 | ! Mem[00000000300c1408] = 00ffffff, %l3 = 00000000ff000000 | |
15332 | lduba [%i3+%o4]0x89,%l3 ! %l3 = 00000000000000ff | |
15333 | ! Starting 10 instruction Store Burst | |
15334 | ! Mem[000000001014140d] = ff0000ff, %l4 = 000000000000ffff | |
15335 | ldstub [%i5+0x00d],%l4 ! %l4 = 00000000000000ff | |
15336 | ||
15337 | p0_label_354: | |
15338 | ! %l4 = 0000000000000000, Mem[0000000010181408] = ffffffff | |
15339 | stha %l4,[%i6+%o4]0x88 ! Mem[0000000010181408] = ffff0000 | |
15340 | ! %f12 = ff000000, Mem[0000000030001408] = ffff0000 | |
15341 | sta %f12,[%i0+%o4]0x89 ! Mem[0000000030001408] = ff000000 | |
15342 | ! Mem[00000000100c1410] = 0000005e, %l2 = 000000000000b68a | |
15343 | swapa [%i3+%o5]0x88,%l2 ! %l2 = 000000000000005e | |
15344 | ! %l7 = ffffffffffffff8e, Mem[0000000030181410] = 00000000 | |
15345 | stba %l7,[%i6+%o5]0x81 ! Mem[0000000030181410] = 8e000000 | |
15346 | ! Mem[0000000010181414] = ff000000, %l0 = ffffffffffffffff, %asi = 80 | |
15347 | swapa [%i6+0x014]%asi,%l0 ! %l0 = 00000000ff000000 | |
15348 | ! %l3 = 00000000000000ff, Mem[0000000030041400] = ff0000ff | |
15349 | stba %l3,[%i1+%g0]0x81 ! Mem[0000000030041400] = ff0000ff | |
15350 | ! %l6 = ffffffffffffffff, Mem[0000000030101410] = ffffff00 | |
15351 | stha %l6,[%i4+%o5]0x89 ! Mem[0000000030101410] = ffffffff | |
15352 | ! Mem[0000000030081410] = 00000000, %l0 = 00000000ff000000 | |
15353 | ldstuba [%i2+%o5]0x81,%l0 ! %l0 = 00000000000000ff | |
15354 | ! Mem[0000000030041410] = 00000000, %l2 = 000000000000005e | |
15355 | swapa [%i1+%o5]0x81,%l2 ! %l2 = 0000000000000000 | |
15356 | ! Starting 10 instruction Load Burst | |
15357 | ! Mem[0000000010001408] = 000000ff, %l3 = 00000000000000ff | |
15358 | lduha [%i0+%o4]0x88,%l3 ! %l3 = 00000000000000ff | |
15359 | ||
15360 | p0_label_355: | |
15361 | ! Mem[0000000030001408] = ff000000, %f3 = 00000000 | |
15362 | lda [%i0+%o4]0x89,%f3 ! %f3 = ff000000 | |
15363 | ! Mem[0000000010081410] = 00ffffff, %l2 = 0000000000000000 | |
15364 | ldswa [%i2+%o5]0x80,%l2 ! %l2 = 0000000000ffffff | |
15365 | ! Mem[00000000300c1410] = ff000000, %l0 = 0000000000000000 | |
15366 | lduwa [%i3+%o5]0x81,%l0 ! %l0 = 00000000ff000000 | |
15367 | ! %l0 = 00000000ff000000, %l5 = 0000000000000000, %l6 = ffffffffffffffff | |
15368 | andn %l0,%l5,%l6 ! %l6 = 00000000ff000000 | |
15369 | ! Mem[0000000010101430] = 7a000000 0000b68a, %l2 = 00ffffff, %l3 = 000000ff | |
15370 | ldd [%i4+0x030],%l2 ! %l2 = 000000007a000000 000000000000b68a | |
15371 | ! Mem[00000000300c1410] = ff000000, %l3 = 000000000000b68a | |
15372 | lduha [%i3+%o5]0x81,%l3 ! %l3 = 000000000000ff00 | |
15373 | ! Mem[00000000100c1400] = 5e00000000000000, %l4 = 0000000000000000 | |
15374 | ldxa [%i3+%g0]0x80,%l4 ! %l4 = 5e00000000000000 | |
15375 | ! Mem[00000000201c0000] = ff001669, %l7 = ffffffffffffff8e | |
15376 | lduba [%o0+0x000]%asi,%l7 ! %l7 = 00000000000000ff | |
15377 | ! Mem[00000000300c1400] = ff000000 e2000000, %l2 = 7a000000, %l3 = 0000ff00 | |
15378 | ldda [%i3+%g0]0x81,%l2 ! %l2 = 00000000ff000000 00000000e2000000 | |
15379 | ! Starting 10 instruction Store Burst | |
15380 | ! %l0 = ff000000, %l1 = ffffffd9, Mem[0000000030101408] = c780ffbb 00000000 | |
15381 | stda %l0,[%i4+%o4]0x89 ! Mem[0000000030101408] = ff000000 ffffffd9 | |
15382 | ||
15383 | ! Check Point 71 for processor 0 | |
15384 | ||
15385 | set p0_check_pt_data_71,%g4 | |
15386 | rd %ccr,%g5 ! %g5 = 44 | |
15387 | ldx [%g4+0x08],%g2 | |
15388 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
15389 | bne %xcc,p0_reg_check_fail0 | |
15390 | mov 0xee0,%g1 | |
15391 | ldx [%g4+0x10],%g2 | |
15392 | cmp %l1,%g2 ! %l1 = ffffffffffffffd9 | |
15393 | bne %xcc,p0_reg_check_fail1 | |
15394 | mov 0xee1,%g1 | |
15395 | ldx [%g4+0x18],%g2 | |
15396 | cmp %l2,%g2 ! %l2 = 00000000ff000000 | |
15397 | bne %xcc,p0_reg_check_fail2 | |
15398 | mov 0xee2,%g1 | |
15399 | ldx [%g4+0x20],%g2 | |
15400 | cmp %l3,%g2 ! %l3 = 00000000e2000000 | |
15401 | bne %xcc,p0_reg_check_fail3 | |
15402 | mov 0xee3,%g1 | |
15403 | ldx [%g4+0x28],%g2 | |
15404 | cmp %l4,%g2 ! %l4 = 5e00000000000000 | |
15405 | bne %xcc,p0_reg_check_fail4 | |
15406 | mov 0xee4,%g1 | |
15407 | ldx [%g4+0x30],%g2 | |
15408 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
15409 | bne %xcc,p0_reg_check_fail5 | |
15410 | mov 0xee5,%g1 | |
15411 | ldx [%g4+0x38],%g2 | |
15412 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
15413 | bne %xcc,p0_reg_check_fail6 | |
15414 | mov 0xee6,%g1 | |
15415 | ldx [%g4+0x40],%g2 | |
15416 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
15417 | bne %xcc,p0_reg_check_fail7 | |
15418 | mov 0xee7,%g1 | |
15419 | ldx [%g4+0x48],%g3 | |
15420 | std %f0,[%g4] | |
15421 | ldx [%g4],%g2 | |
15422 | cmp %g3,%g2 ! %f0 = 5e000000 ff000000 | |
15423 | bne %xcc,p0_freg_check_fail | |
15424 | mov 0xf00,%g1 | |
15425 | ldx [%g4+0x50],%g3 | |
15426 | std %f2,[%g4] | |
15427 | ldx [%g4],%g2 | |
15428 | cmp %g3,%g2 ! %f2 = ff00ffff ff000000 | |
15429 | bne %xcc,p0_freg_check_fail | |
15430 | mov 0xf02,%g1 | |
15431 | ldx [%g4+0x58],%g3 | |
15432 | std %f6,[%g4] | |
15433 | ldx [%g4],%g2 | |
15434 | cmp %g3,%g2 ! %f6 = 00000000 0000ffff | |
15435 | bne %xcc,p0_freg_check_fail | |
15436 | mov 0xf06,%g1 | |
15437 | ldx [%g4+0x60],%g3 | |
15438 | std %f16,[%g4] | |
15439 | ldx [%g4],%g2 | |
15440 | cmp %g3,%g2 ! %f16 = 5e000000 00000000 | |
15441 | bne %xcc,p0_freg_check_fail | |
15442 | mov 0xf16,%g1 | |
15443 | ldx [%g4+0x68],%g3 | |
15444 | std %f18,[%g4] | |
15445 | ldx [%g4],%g2 | |
15446 | cmp %g3,%g2 ! %f18 = ff000000 ff0000ff | |
15447 | bne %xcc,p0_freg_check_fail | |
15448 | mov 0xf18,%g1 | |
15449 | ldx [%g4+0x70],%g3 | |
15450 | std %f20,[%g4] | |
15451 | ldx [%g4],%g2 | |
15452 | cmp %g3,%g2 ! %f20 = 5e000000 0000ff00 | |
15453 | bne %xcc,p0_freg_check_fail | |
15454 | mov 0xf20,%g1 | |
15455 | ldx [%g4+0x78],%g3 | |
15456 | std %f22,[%g4] | |
15457 | ldx [%g4],%g2 | |
15458 | cmp %g3,%g2 ! %f22 = 5e9e11ff 6b6c2202 | |
15459 | bne %xcc,p0_freg_check_fail | |
15460 | mov 0xf22,%g1 | |
15461 | ldx [%g4+0x80],%g3 | |
15462 | std %f24,[%g4] | |
15463 | ldx [%g4],%g2 | |
15464 | cmp %g3,%g2 ! %f24 = 00000000 00000000 | |
15465 | bne %xcc,p0_freg_check_fail | |
15466 | mov 0xf24,%g1 | |
15467 | ldx [%g4+0x88],%g3 | |
15468 | std %f26,[%g4] | |
15469 | ldx [%g4],%g2 | |
15470 | cmp %g3,%g2 ! %f26 = 0000005e 000027ff | |
15471 | bne %xcc,p0_freg_check_fail | |
15472 | mov 0xf26,%g1 | |
15473 | ldx [%g4+0x90],%g3 | |
15474 | std %f28,[%g4] | |
15475 | ldx [%g4],%g2 | |
15476 | cmp %g3,%g2 ! %f28 = ff00ffff ff0000ff | |
15477 | bne %xcc,p0_freg_check_fail | |
15478 | mov 0xf28,%g1 | |
15479 | ldx [%g4+0x98],%g3 | |
15480 | std %f30,[%g4] | |
15481 | ldx [%g4],%g2 | |
15482 | cmp %g3,%g2 ! %f30 = ff00ffe4 ffff00ff | |
15483 | bne %xcc,p0_freg_check_fail | |
15484 | mov 0xf30,%g1 | |
15485 | ||
15486 | ! Check Point 71 completed | |
15487 | ||
15488 | ||
15489 | p0_label_356: | |
15490 | ! %f0 = 5e000000 ff000000, Mem[0000000010001418] = 00000000 00000000 | |
15491 | std %f0 ,[%i0+0x018] ! Mem[0000000010001418] = 5e000000 ff000000 | |
15492 | ! %f30 = ff00ffe4 ffff00ff, %l7 = 00000000000000ff | |
15493 | ! Mem[00000000300c1428] = 32e87f5a30df3e11 | |
15494 | add %i3,0x028,%g1 | |
15495 | stda %f30,[%g1+%l7]ASI_PST8_S ! Mem[00000000300c1428] = ff00ffe4ffff00ff | |
15496 | ! %l3 = 00000000e2000000, Mem[0000000010041410] = 000000ff | |
15497 | stha %l3,[%i1+%o5]0x88 ! Mem[0000000010041410] = 00000000 | |
15498 | ! %l3 = 00000000e2000000, Mem[0000000010001410] = 00000000 | |
15499 | stba %l3,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00000000 | |
15500 | ! %f24 = 00000000 00000000, Mem[0000000030101408] = ff000000 ffffffd9 | |
15501 | stda %f24,[%i4+%o4]0x89 ! Mem[0000000030101408] = 00000000 00000000 | |
15502 | ! Mem[0000000010141400] = 000000ff, %l6 = 00000000ff000000 | |
15503 | swapa [%i5+%g0]0x80,%l6 ! %l6 = 00000000000000ff | |
15504 | ! %l7 = 00000000000000ff, Mem[0000000030001400] = ff000000 | |
15505 | stha %l7,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00ff0000 | |
15506 | ! %f12 = ff000000 ff000000, Mem[0000000030081400] = 00000000 ffe20000 | |
15507 | stda %f12,[%i2+%g0]0x81 ! Mem[0000000030081400] = ff000000 ff000000 | |
15508 | ! %l4 = 5e00000000000000, Mem[0000000030181400] = 0000ffff | |
15509 | stha %l4,[%i6+%g0]0x81 ! Mem[0000000030181400] = 0000ffff | |
15510 | ! Starting 10 instruction Load Burst | |
15511 | ! Mem[0000000010001404] = ffffffc4, %l0 = 00000000ff000000 | |
15512 | ldsba [%i0+0x007]%asi,%l0 ! %l0 = ffffffffffffffc4 | |
15513 | ||
15514 | p0_label_357: | |
15515 | ! Mem[0000000010101408] = 5eff00000000ff00, %f16 = 5e000000 00000000 | |
15516 | ldda [%i4+%o4]0x80,%f16 ! %f16 = 5eff0000 0000ff00 | |
15517 | ! Mem[00000000100c1430] = ff00ffff, %l5 = 0000000000000000 | |
15518 | lduwa [%i3+0x030]%asi,%l5 ! %l5 = 00000000ff00ffff | |
15519 | ! Mem[00000000100c1400] = 5e000000 00000000, %l2 = ff000000, %l3 = e2000000 | |
15520 | ldda [%i3+%g0]0x80,%l2 ! %l2 = 000000005e000000 0000000000000000 | |
15521 | ! Mem[0000000030101408] = 00000000, %l4 = 5e00000000000000 | |
15522 | ldswa [%i4+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
15523 | ! Mem[0000000030101408] = 00000000, %l1 = ffffffffffffffd9 | |
15524 | ldswa [%i4+%o4]0x81,%l1 ! %l1 = 0000000000000000 | |
15525 | ! Mem[0000000021800180] = ffffdb07, %l3 = 0000000000000000 | |
15526 | lduba [%o3+0x180]%asi,%l3 ! %l3 = 00000000000000ff | |
15527 | ! Mem[0000000010181400] = 9ce0b68a ffff275e, %l2 = 5e000000, %l3 = 000000ff | |
15528 | ldda [%i6+%g0]0x80,%l2 ! %l2 = 000000009ce0b68a 00000000ffff275e | |
15529 | ! Mem[0000000030101400] = 00000000 ff270000, %l6 = 000000ff, %l7 = 000000ff | |
15530 | ldda [%i4+%g0]0x81,%l6 ! %l6 = 0000000000000000 00000000ff270000 | |
15531 | ! Mem[0000000030181408] = ff0000ff, %f3 = ff000000 | |
15532 | lda [%i6+%o4]0x89,%f3 ! %f3 = ff0000ff | |
15533 | ! Starting 10 instruction Store Burst | |
15534 | ! Mem[0000000030001408] = ff000000, %l3 = 00000000ffff275e | |
15535 | ldstuba [%i0+%o4]0x89,%l3 ! %l3 = 00000000000000ff | |
15536 | ||
15537 | p0_label_358: | |
15538 | ! %l7 = 00000000ff270000, Mem[0000000010181408] = ffff0000 | |
15539 | stwa %l7,[%i6+%o4]0x88 ! Mem[0000000010181408] = ff270000 | |
15540 | ! %f26 = 0000005e 000027ff, %l3 = 0000000000000000 | |
15541 | ! Mem[00000000300c1438] = 02226c6b57119e5e | |
15542 | add %i3,0x038,%g1 | |
15543 | stda %f26,[%g1+%l3]ASI_PST16_SL ! Mem[00000000300c1438] = 02226c6b57119e5e | |
15544 | ! %l1 = 0000000000000000, Mem[0000000010041400] = 5e000000ff000000 | |
15545 | stxa %l1,[%i1+%g0]0x80 ! Mem[0000000010041400] = 0000000000000000 | |
15546 | ! %l3 = 0000000000000000, Mem[00000000201c0000] = ff001669 | |
15547 | sth %l3,[%o0+%g0] ! Mem[00000000201c0000] = 00001669 | |
15548 | ! %l0 = ffffffffffffffc4, Mem[00000000300c1410] = ff00000000000000 | |
15549 | stxa %l0,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ffffffffffffffc4 | |
15550 | ! Mem[0000000010101408] = 0000ff5e, %l1 = 0000000000000000 | |
15551 | ldstuba [%i4+%o4]0x88,%l1 ! %l1 = 0000005e000000ff | |
15552 | ! %l2 = 000000009ce0b68a, Mem[0000000030001408] = ff0000ff | |
15553 | stwa %l2,[%i0+%o4]0x81 ! Mem[0000000030001408] = 9ce0b68a | |
15554 | ! %l2 = 000000009ce0b68a, Mem[0000000030041400] = ff0000ff | |
15555 | stwa %l2,[%i1+%g0]0x81 ! Mem[0000000030041400] = 9ce0b68a | |
15556 | ! %f12 = ff000000 ff000000, Mem[0000000010141400] = 000000ff 8eff2c03 | |
15557 | stda %f12,[%i5+%g0]0x88 ! Mem[0000000010141400] = ff000000 ff000000 | |
15558 | ! Starting 10 instruction Load Burst | |
15559 | ! Mem[0000000010001400] = ff000000, %l5 = 00000000ff00ffff | |
15560 | ldswa [%i0+%g0]0x88,%l5 ! %l5 = ffffffffff000000 | |
15561 | ||
15562 | p0_label_359: | |
15563 | ! Mem[00000000100c1408] = ff000000ff0000ff, %f0 = 5e000000 ff000000 | |
15564 | ldd [%i3+%o4],%f0 ! %f0 = ff000000 ff0000ff | |
15565 | ! Mem[0000000010141410] = 032cff8e, %l7 = 00000000ff270000 | |
15566 | lduha [%i5+%o5]0x88,%l7 ! %l7 = 000000000000ff8e | |
15567 | ! Mem[0000000010041400] = 00000000, %l3 = 0000000000000000 | |
15568 | swapa [%i1+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
15569 | ! Mem[0000000010141400] = ff000000, %l3 = 0000000000000000 | |
15570 | lduha [%i5+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
15571 | ! Mem[0000000010081408] = ffffffff, %l1 = 000000000000005e | |
15572 | lduwa [%i2+%o4]0x88,%l1 ! %l1 = 00000000ffffffff | |
15573 | ! Mem[0000000021800040] = 00005e5c, %l4 = 0000000000000000 | |
15574 | ldsb [%o3+0x040],%l4 ! %l4 = 0000000000000000 | |
15575 | ! Mem[0000000020800000] = c7060db6, %l6 = 0000000000000000 | |
15576 | ldub [%o1+0x001],%l6 ! %l6 = 0000000000000006 | |
15577 | ! Mem[0000000010181408] = ff270000, %l7 = 000000000000ff8e | |
15578 | ldsha [%i6+%o4]0x88,%l7 ! %l7 = 0000000000000000 | |
15579 | ! Mem[00000000100c1418] = 5e9e11ff6b6c2202, %l2 = 000000009ce0b68a | |
15580 | ldx [%i3+0x018],%l2 ! %l2 = 5e9e11ff6b6c2202 | |
15581 | ! Starting 10 instruction Store Burst | |
15582 | ! Mem[0000000010101408] = ffff0000, %l5 = ffffffffff000000, %asi = 80 | |
15583 | swapa [%i4+0x008]%asi,%l5 ! %l5 = 00000000ffff0000 | |
15584 | ||
15585 | p0_label_360: | |
15586 | ! %l4 = 0000000000000000, Mem[0000000010041408] = ffffffff4202deff | |
15587 | stxa %l4,[%i1+%o4]0x88 ! Mem[0000000010041408] = 0000000000000000 | |
15588 | ! %f16 = 5eff0000 0000ff00 ff000000 ff0000ff | |
15589 | ! %f20 = 5e000000 0000ff00 5e9e11ff 6b6c2202 | |
15590 | ! %f24 = 00000000 00000000 0000005e 000027ff | |
15591 | ! %f28 = ff00ffff ff0000ff ff00ffe4 ffff00ff | |
15592 | stda %f16,[%i3]ASI_BLK_PL ! Block Store to 00000000100c1400 | |
15593 | ! %l7 = 0000000000000000, Mem[0000000030001408] = 9ce0b68a | |
15594 | stha %l7,[%i0+%o4]0x81 ! Mem[0000000030001408] = 0000b68a | |
15595 | ! Mem[0000000030141408] = ff000000, %l5 = 00000000ffff0000 | |
15596 | swapa [%i5+%o4]0x81,%l5 ! %l5 = 00000000ff000000 | |
15597 | ! %l1 = 00000000ffffffff, Mem[0000000030141400] = d9876ee7 | |
15598 | stha %l1,[%i5+%g0]0x81 ! Mem[0000000030141400] = ffff6ee7 | |
15599 | membar #Sync ! Added by membar checker (81) | |
15600 | ! %l7 = 0000000000000000, Mem[00000000100c1400] = 00ff00000000ff5e | |
15601 | stxa %l7,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 0000000000000000 | |
15602 | ! Mem[00000000100c1414] = 0000005e, %l3 = 0000000000000000, %asi = 80 | |
15603 | swapa [%i3+0x014]%asi,%l3 ! %l3 = 000000000000005e | |
15604 | ! %f30 = ff00ffe4, Mem[0000000010141410] = 032cff8e | |
15605 | sta %f30,[%i5+%o5]0x88 ! Mem[0000000010141410] = ff00ffe4 | |
15606 | ! Mem[0000000010181430] = 000000ff, %l5 = ff000000, %l3 = 0000005e | |
15607 | add %i6,0x30,%g1 | |
15608 | casa [%g1]0x80,%l5,%l3 ! %l3 = 00000000000000ff | |
15609 | ! Starting 10 instruction Load Burst | |
15610 | ! Mem[0000000030041408] = 000000ff 5e0000ff, %l6 = 00000006, %l7 = 00000000 | |
15611 | ldda [%i1+%o4]0x89,%l6 ! %l6 = 000000005e0000ff 00000000000000ff | |
15612 | ||
15613 | ! Check Point 72 for processor 0 | |
15614 | ||
15615 | set p0_check_pt_data_72,%g4 | |
15616 | rd %ccr,%g5 ! %g5 = 44 | |
15617 | ldx [%g4+0x08],%g2 | |
15618 | cmp %l0,%g2 ! %l0 = ffffffffffffffc4 | |
15619 | bne %xcc,p0_reg_check_fail0 | |
15620 | mov 0xee0,%g1 | |
15621 | ldx [%g4+0x10],%g2 | |
15622 | cmp %l1,%g2 ! %l1 = 00000000ffffffff | |
15623 | bne %xcc,p0_reg_check_fail1 | |
15624 | mov 0xee1,%g1 | |
15625 | ldx [%g4+0x18],%g2 | |
15626 | cmp %l2,%g2 ! %l2 = 5e9e11ff6b6c2202 | |
15627 | bne %xcc,p0_reg_check_fail2 | |
15628 | mov 0xee2,%g1 | |
15629 | ldx [%g4+0x20],%g2 | |
15630 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
15631 | bne %xcc,p0_reg_check_fail3 | |
15632 | mov 0xee3,%g1 | |
15633 | ldx [%g4+0x28],%g2 | |
15634 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
15635 | bne %xcc,p0_reg_check_fail4 | |
15636 | mov 0xee4,%g1 | |
15637 | ldx [%g4+0x30],%g2 | |
15638 | cmp %l5,%g2 ! %l5 = 00000000ff000000 | |
15639 | bne %xcc,p0_reg_check_fail5 | |
15640 | mov 0xee5,%g1 | |
15641 | ldx [%g4+0x38],%g2 | |
15642 | cmp %l6,%g2 ! %l6 = 000000005e0000ff | |
15643 | bne %xcc,p0_reg_check_fail6 | |
15644 | mov 0xee6,%g1 | |
15645 | ldx [%g4+0x40],%g2 | |
15646 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
15647 | bne %xcc,p0_reg_check_fail7 | |
15648 | mov 0xee7,%g1 | |
15649 | ldx [%g4+0x48],%g3 | |
15650 | std %f0,[%g4] | |
15651 | ldx [%g4],%g2 | |
15652 | cmp %g3,%g2 ! %f0 = ff000000 ff0000ff | |
15653 | bne %xcc,p0_freg_check_fail | |
15654 | mov 0xf00,%g1 | |
15655 | ldx [%g4+0x50],%g3 | |
15656 | std %f2,[%g4] | |
15657 | ldx [%g4],%g2 | |
15658 | cmp %g3,%g2 ! %f2 = ff00ffff ff0000ff | |
15659 | bne %xcc,p0_freg_check_fail | |
15660 | mov 0xf02,%g1 | |
15661 | ldx [%g4+0x58],%g3 | |
15662 | std %f6,[%g4] | |
15663 | ldx [%g4],%g2 | |
15664 | cmp %g3,%g2 ! %f6 = 00000000 0000ffff | |
15665 | bne %xcc,p0_freg_check_fail | |
15666 | mov 0xf06,%g1 | |
15667 | ldx [%g4+0x60],%g3 | |
15668 | std %f16,[%g4] | |
15669 | ldx [%g4],%g2 | |
15670 | cmp %g3,%g2 ! %f16 = 5eff0000 0000ff00 | |
15671 | bne %xcc,p0_freg_check_fail | |
15672 | mov 0xf16,%g1 | |
15673 | ||
15674 | ! Check Point 72 completed | |
15675 | ||
15676 | ||
15677 | p0_label_361: | |
15678 | ! Mem[0000000030041410] = 0000005e000000ff, %l4 = 0000000000000000 | |
15679 | ldxa [%i1+%o5]0x81,%l4 ! %l4 = 0000005e000000ff | |
15680 | ! Mem[0000000020800000] = c7060db6, %l1 = 00000000ffffffff | |
15681 | ldsh [%o1+%g0],%l1 ! %l1 = ffffffffffffc706 | |
15682 | ! Mem[0000000010101404] = ff000000, %l5 = 00000000ff000000 | |
15683 | ldsha [%i4+0x006]%asi,%l5 ! %l5 = 0000000000000000 | |
15684 | ! Mem[0000000030101410] = 9ce0b68affffffff, %l5 = 0000000000000000 | |
15685 | ldxa [%i4+%o5]0x89,%l5 ! %l5 = 9ce0b68affffffff | |
15686 | ! Mem[0000000030181408] = ff0000ff, %l4 = 0000005e000000ff | |
15687 | lduba [%i6+%o4]0x81,%l4 ! %l4 = 00000000000000ff | |
15688 | ! Mem[00000000201c0000] = 00001669, %l5 = 9ce0b68affffffff | |
15689 | lduba [%o0+0x001]%asi,%l5 ! %l5 = 0000000000000000 | |
15690 | ! Mem[00000000100c1400] = 00000000, %l5 = 0000000000000000 | |
15691 | lduha [%i3+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
15692 | ! Mem[0000000010001408] = 00000000 000000ff, %l4 = 000000ff, %l5 = 00000000 | |
15693 | ldda [%i0+%o4]0x88,%l4 ! %l4 = 00000000000000ff 0000000000000000 | |
15694 | ! Mem[0000000030101410] = ffffffff, %l7 = 00000000000000ff | |
15695 | lduba [%i4+%o5]0x81,%l7 ! %l7 = 00000000000000ff | |
15696 | ! Starting 10 instruction Store Burst | |
15697 | ! %f4 = 00000000, Mem[0000000010001428] = ff270000 | |
15698 | st %f4 ,[%i0+0x028] ! Mem[0000000010001428] = 00000000 | |
15699 | ||
15700 | p0_label_362: | |
15701 | ! Mem[0000000030141408] = ffff0000, %l0 = ffffffffffffffc4 | |
15702 | ldstuba [%i5+%o4]0x81,%l0 ! %l0 = 000000ff000000ff | |
15703 | ! Mem[0000000010081408] = ffffffff, %l2 = 5e9e11ff6b6c2202 | |
15704 | swapa [%i2+%o4]0x80,%l2 ! %l2 = 00000000ffffffff | |
15705 | ! %l6 = 5e0000ff, %l7 = 000000ff, Mem[0000000010001410] = 00000000 000000ff | |
15706 | stda %l6,[%i0+%o5]0x88 ! Mem[0000000010001410] = 5e0000ff 000000ff | |
15707 | ! %l0 = 00000000000000ff, Mem[0000000010001410] = ff00005e | |
15708 | stha %l0,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00ff005e | |
15709 | ! %f10 = 000000ff 00000000, Mem[0000000030081410] = 000000ff ffffff00 | |
15710 | stda %f10,[%i2+%o5]0x89 ! Mem[0000000030081410] = 000000ff 00000000 | |
15711 | ! %l5 = 0000000000000000, Mem[0000000010041400] = 0000000000000000 | |
15712 | stxa %l5,[%i1+%g0]0x80 ! Mem[0000000010041400] = 0000000000000000 | |
15713 | ! %f2 = ff00ffff ff0000ff, %l1 = ffffffffffffc706 | |
15714 | ! Mem[0000000010041408] = 0000000000000000 | |
15715 | add %i1,0x008,%g1 | |
15716 | stda %f2,[%g1+%l1]ASI_PST16_P ! Mem[0000000010041408] = 0000ffffff000000 | |
15717 | ! %f30 = ff00ffe4 ffff00ff, Mem[0000000030181400] = 0000ffff e76e87ff | |
15718 | stda %f30,[%i6+%g0]0x81 ! Mem[0000000030181400] = ff00ffe4 ffff00ff | |
15719 | ! %l6 = 000000005e0000ff, Mem[0000000021800180] = ffffdb07, %asi = 80 | |
15720 | stba %l6,[%o3+0x180]%asi ! Mem[0000000021800180] = ffffdb07 | |
15721 | ! Starting 10 instruction Load Burst | |
15722 | ! Mem[00000000201c0000] = 00001669, %l4 = 00000000000000ff | |
15723 | ldub [%o0+0x001],%l4 ! %l4 = 0000000000000000 | |
15724 | ||
15725 | p0_label_363: | |
15726 | ! Mem[0000000030101400] = 00000000, %l0 = 00000000000000ff | |
15727 | lduwa [%i4+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
15728 | ! Mem[00000000100c1410] = 0000ff00, %l4 = 0000000000000000 | |
15729 | lduha [%i3+%o5]0x88,%l4 ! %l4 = 000000000000ff00 | |
15730 | ! Mem[0000000030141400] = e76effff, %l6 = 000000005e0000ff | |
15731 | lduha [%i5+%g0]0x89,%l6 ! %l6 = 000000000000ffff | |
15732 | ! Mem[0000000010181400] = 8ab6e09c, %l5 = 0000000000000000 | |
15733 | lduha [%i6+%g0]0x88,%l5 ! %l5 = 000000000000e09c | |
15734 | ! Mem[0000000010181408] = ff270000, %l5 = 000000000000e09c | |
15735 | ldsba [%i6+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
15736 | ! Mem[00000000100c1428] = ff270000, %l1 = ffffffffffffc706 | |
15737 | ldub [%i3+0x028],%l1 ! %l1 = 00000000000000ff | |
15738 | ! Mem[00000000100c1408] = ff0000ff, %l2 = 00000000ffffffff | |
15739 | lduba [%i3+%o4]0x88,%l2 ! %l2 = 00000000000000ff | |
15740 | ! Mem[0000000030081408] = 00000000, %f18 = ff000000 | |
15741 | lda [%i2+%o4]0x89,%f18 ! %f18 = 00000000 | |
15742 | ! Mem[00000000100c1418] = 02226c6b ff119e5e, %l4 = 0000ff00, %l5 = 00000000 | |
15743 | ldd [%i3+0x018],%l4 ! %l4 = 0000000002226c6b 00000000ff119e5e | |
15744 | ! Starting 10 instruction Store Burst | |
15745 | ! Mem[0000000030041400] = 9ce0b68a, %l6 = 000000000000ffff | |
15746 | swapa [%i1+%g0]0x81,%l6 ! %l6 = 000000009ce0b68a | |
15747 | ||
15748 | p0_label_364: | |
15749 | ! %f2 = ff00ffff ff0000ff, %l2 = 00000000000000ff | |
15750 | ! Mem[00000000100c1418] = 02226c6bff119e5e | |
15751 | add %i3,0x018,%g1 | |
15752 | stda %f2,[%g1+%l2]ASI_PST32_P ! Mem[00000000100c1418] = ff00ffffff0000ff | |
15753 | ! Mem[0000000030181400] = ff00ffe4, %l7 = 00000000000000ff | |
15754 | swapa [%i6+%g0]0x81,%l7 ! %l7 = 00000000ff00ffe4 | |
15755 | ! %l7 = 00000000ff00ffe4, Mem[0000000030141400] = e76effff | |
15756 | stba %l7,[%i5+%g0]0x89 ! Mem[0000000030141400] = e76effe4 | |
15757 | ! %f26 = 0000005e 000027ff, Mem[0000000010001410] = 00ff005e ff000000 | |
15758 | stda %f26,[%i0+0x010]%asi ! Mem[0000000010001410] = 0000005e 000027ff | |
15759 | ! %l5 = 00000000ff119e5e, Mem[0000000010041410] = 00000000 | |
15760 | stba %l5,[%i1+%o5]0x80 ! Mem[0000000010041410] = 5e000000 | |
15761 | ! Mem[00000000300c1400] = 000000ff, %l1 = 00000000000000ff | |
15762 | swapa [%i3+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
15763 | ! Mem[0000000020800040] = ffff9ffa, %l1 = 00000000000000ff | |
15764 | ldstuba [%o1+0x040]%asi,%l1 ! %l1 = 000000ff000000ff | |
15765 | ! %l2 = 00000000000000ff, Mem[0000000030001408] = 8ab60000 | |
15766 | stba %l2,[%i0+%o4]0x89 ! Mem[0000000030001408] = 8ab600ff | |
15767 | ! Mem[0000000030141400] = e4ff6ee7, %l4 = 0000000002226c6b | |
15768 | swapa [%i5+%g0]0x81,%l4 ! %l4 = 00000000e4ff6ee7 | |
15769 | ! Starting 10 instruction Load Burst | |
15770 | ! Mem[0000000030041410] = 0000005e, %l1 = 00000000000000ff | |
15771 | ldsha [%i1+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
15772 | ||
15773 | p0_label_365: | |
15774 | ! Mem[00000000300c1400] = ff000000, %l7 = 00000000ff00ffe4 | |
15775 | ldswa [%i3+%g0]0x81,%l7 ! %l7 = ffffffffff000000 | |
15776 | ! Mem[0000000010181400] = 8ab6e09c, %l6 = 000000009ce0b68a | |
15777 | ldsba [%i6+%g0]0x88,%l6 ! %l6 = ffffffffffffff9c | |
15778 | ! Mem[0000000030041400] = ffff0000, %l7 = ffffffffff000000 | |
15779 | ldsha [%i1+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
15780 | ! Mem[0000000010101400] = ffff0000, %l0 = 0000000000000000 | |
15781 | ldsha [%i4+%g0]0x80,%l0 ! %l0 = ffffffffffffffff | |
15782 | ! Mem[0000000010001418] = 5e000000ff000000, %l4 = 00000000e4ff6ee7 | |
15783 | ldx [%i0+0x018],%l4 ! %l4 = 5e000000ff000000 | |
15784 | ! Mem[0000000010041410] = 0000005e, %l3 = 00000000000000ff | |
15785 | ldswa [%i1+%o5]0x88,%l3 ! %l3 = 000000000000005e | |
15786 | ! Mem[000000001010140c] = 0000ff00, %l4 = 5e000000ff000000 | |
15787 | ldsba [%i4+0x00f]%asi,%l4 ! %l4 = 0000000000000000 | |
15788 | ! Mem[0000000030141408] = 0000ffff, %l7 = 0000000000000000 | |
15789 | lduwa [%i5+%o4]0x89,%l7 ! %l7 = 000000000000ffff | |
15790 | ! Mem[0000000010141408] = ffffffff, %l5 = 00000000ff119e5e | |
15791 | lduwa [%i5+%o4]0x80,%l5 ! %l5 = 00000000ffffffff | |
15792 | ! Starting 10 instruction Store Burst | |
15793 | ! %l5 = 00000000ffffffff, Mem[0000000010041408] = 0000ffff | |
15794 | stw %l5,[%i1+%o4] ! Mem[0000000010041408] = ffffffff | |
15795 | ||
15796 | ! Check Point 73 for processor 0 | |
15797 | ||
15798 | set p0_check_pt_data_73,%g4 | |
15799 | rd %ccr,%g5 ! %g5 = 44 | |
15800 | ldx [%g4+0x08],%g2 | |
15801 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
15802 | bne %xcc,p0_reg_check_fail0 | |
15803 | mov 0xee0,%g1 | |
15804 | ldx [%g4+0x10],%g2 | |
15805 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
15806 | bne %xcc,p0_reg_check_fail1 | |
15807 | mov 0xee1,%g1 | |
15808 | ldx [%g4+0x18],%g2 | |
15809 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
15810 | bne %xcc,p0_reg_check_fail2 | |
15811 | mov 0xee2,%g1 | |
15812 | ldx [%g4+0x20],%g2 | |
15813 | cmp %l3,%g2 ! %l3 = 000000000000005e | |
15814 | bne %xcc,p0_reg_check_fail3 | |
15815 | mov 0xee3,%g1 | |
15816 | ldx [%g4+0x28],%g2 | |
15817 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
15818 | bne %xcc,p0_reg_check_fail4 | |
15819 | mov 0xee4,%g1 | |
15820 | ldx [%g4+0x30],%g2 | |
15821 | cmp %l5,%g2 ! %l5 = 00000000ffffffff | |
15822 | bne %xcc,p0_reg_check_fail5 | |
15823 | mov 0xee5,%g1 | |
15824 | ldx [%g4+0x38],%g2 | |
15825 | cmp %l6,%g2 ! %l6 = ffffffffffffff9c | |
15826 | bne %xcc,p0_reg_check_fail6 | |
15827 | mov 0xee6,%g1 | |
15828 | ldx [%g4+0x40],%g2 | |
15829 | cmp %l7,%g2 ! %l7 = 000000000000ffff | |
15830 | bne %xcc,p0_reg_check_fail7 | |
15831 | mov 0xee7,%g1 | |
15832 | ldx [%g4+0x48],%g3 | |
15833 | std %f4,[%g4] | |
15834 | ldx [%g4],%g2 | |
15835 | cmp %g3,%g2 ! %f4 = 00000000 ff000000 | |
15836 | bne %xcc,p0_freg_check_fail | |
15837 | mov 0xf04,%g1 | |
15838 | ldx [%g4+0x50],%g3 | |
15839 | std %f18,[%g4] | |
15840 | ldx [%g4],%g2 | |
15841 | cmp %g3,%g2 ! %f18 = 00000000 ff0000ff | |
15842 | bne %xcc,p0_freg_check_fail | |
15843 | mov 0xf18,%g1 | |
15844 | ||
15845 | ! Check Point 73 completed | |
15846 | ||
15847 | ||
15848 | p0_label_366: | |
15849 | ! %f20 = 5e000000 0000ff00, %l4 = 0000000000000000 | |
15850 | ! Mem[0000000010001418] = 5e000000ff000000 | |
15851 | add %i0,0x018,%g1 | |
15852 | stda %f20,[%g1+%l4]ASI_PST8_PL ! Mem[0000000010001418] = 5e000000ff000000 | |
15853 | ! %l0 = ffffffff, %l1 = 00000000, Mem[0000000010181400] = 9ce0b68a ffff275e | |
15854 | stda %l0,[%i6+%g0]0x80 ! Mem[0000000010181400] = ffffffff 00000000 | |
15855 | ! Mem[0000000010101410] = ff000000, %l4 = 0000000000000000 | |
15856 | ldstuba [%i4+%o5]0x80,%l4 ! %l4 = 000000ff000000ff | |
15857 | ! %f0 = ff000000 ff0000ff, Mem[0000000010181410] = ff000000 ffffffff | |
15858 | stda %f0 ,[%i6+%o5]0x88 ! Mem[0000000010181410] = ff000000 ff0000ff | |
15859 | ! %l4 = 00000000000000ff, Mem[0000000010101408] = ff0000000000ff00 | |
15860 | stxa %l4,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000000000ff | |
15861 | ! %l1 = 0000000000000000, Mem[0000000010081409] = 6b6c2202 | |
15862 | stb %l1,[%i2+0x009] ! Mem[0000000010081408] = 6b002202 | |
15863 | ! %f30 = ff00ffe4 ffff00ff, Mem[0000000010101408] = 00000000 000000ff | |
15864 | stda %f30,[%i4+%o4]0x80 ! Mem[0000000010101408] = ff00ffe4 ffff00ff | |
15865 | ! Mem[0000000010081400] = 032cffff, %l2 = 00000000000000ff | |
15866 | swapa [%i2+%g0]0x88,%l2 ! %l2 = 00000000032cffff | |
15867 | ! %l2 = 032cffff, %l3 = 0000005e, Mem[0000000010041420] = ff0000ff 00ffffff | |
15868 | std %l2,[%i1+0x020] ! Mem[0000000010041420] = 032cffff 0000005e | |
15869 | ! Starting 10 instruction Load Burst | |
15870 | ! Mem[0000000030181400] = 000000ff, %l2 = 00000000032cffff | |
15871 | ldswa [%i6+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
15872 | ||
15873 | p0_label_367: | |
15874 | ! Mem[0000000010081408] = 6b002202ffffffff, %l1 = 0000000000000000 | |
15875 | ldxa [%i2+%o4]0x80,%l1 ! %l1 = 6b002202ffffffff | |
15876 | ! Mem[00000000100c1438] = ff00ffff, %l4 = 00000000000000ff | |
15877 | lduw [%i3+0x038],%l4 ! %l4 = 00000000ff00ffff | |
15878 | ! Mem[0000000030081410] = 00000000 ff000000, %l2 = 000000ff, %l3 = 0000005e | |
15879 | ldda [%i2+%o5]0x81,%l2 ! %l2 = 0000000000000000 00000000ff000000 | |
15880 | ! Mem[0000000010101408] = ff00ffffe4ff00ff, %l0 = ffffffffffffffff | |
15881 | ldxa [%i4+%o4]0x88,%l0 ! %l0 = ff00ffffe4ff00ff | |
15882 | ! Mem[0000000010001408] = ff000000, %f1 = ff0000ff | |
15883 | lda [%i0+%o4]0x80,%f1 ! %f1 = ff000000 | |
15884 | ! Mem[0000000030001408] = ff00b68a, %l0 = ff00ffffe4ff00ff | |
15885 | ldswa [%i0+%o4]0x81,%l0 ! %l0 = ffffffffff00b68a | |
15886 | ! Mem[0000000010081408] = 0222006b, %l4 = 00000000ff00ffff | |
15887 | lduba [%i2+%o4]0x88,%l4 ! %l4 = 000000000000006b | |
15888 | ! Mem[0000000010101400] = 000000ff0000ffff, %f10 = 000000ff 00000000 | |
15889 | ldda [%i4+%g0]0x88,%f10 ! %f10 = 000000ff 0000ffff | |
15890 | ! Mem[0000000010181400] = ffffffff00000000, %f14 = 7a000000 00000000 | |
15891 | ldda [%i6+%g0]0x80,%f14 ! %f14 = ffffffff 00000000 | |
15892 | ! Starting 10 instruction Store Burst | |
15893 | ! %l0 = ffffffffff00b68a, Mem[0000000030001410] = ffff0000 | |
15894 | stba %l0,[%i0+%o5]0x81 ! Mem[0000000030001410] = 8aff0000 | |
15895 | ||
15896 | p0_label_368: | |
15897 | ! %l5 = 00000000ffffffff, Mem[0000000010141424] = 000000ff | |
15898 | stw %l5,[%i5+0x024] ! Mem[0000000010141424] = ffffffff | |
15899 | ! %l2 = 0000000000000000, Mem[00000000100c141c] = ff0000ff, %asi = 80 | |
15900 | stwa %l2,[%i3+0x01c]%asi ! Mem[00000000100c141c] = 00000000 | |
15901 | ! %l2 = 00000000, %l3 = ff000000, Mem[0000000030041408] = 5e0000ff 000000ff | |
15902 | stda %l2,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000000 ff000000 | |
15903 | ! Mem[0000000010001408] = 000000ff, %l0 = ffffffffff00b68a | |
15904 | swapa [%i0+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
15905 | ! %l3 = 00000000ff000000, Mem[0000000010181434] = 000000ff | |
15906 | stw %l3,[%i6+0x034] ! Mem[0000000010181434] = ff000000 | |
15907 | ! Mem[0000000010081410] = 00ffffffffff00ff, %l1 = 6b002202ffffffff, %l2 = 0000000000000000 | |
15908 | add %i2,0x10,%g1 | |
15909 | casxa [%g1]0x80,%l1,%l2 ! %l2 = 00ffffffffff00ff | |
15910 | ! %f14 = ffffffff 00000000, Mem[0000000030001408] = ff00b68a 00000000 | |
15911 | stda %f14,[%i0+%o4]0x81 ! Mem[0000000030001408] = ffffffff 00000000 | |
15912 | ! %l7 = 000000000000ffff, Mem[0000000020800040] = ffff9ffa, %asi = 80 | |
15913 | stba %l7,[%o1+0x040]%asi ! Mem[0000000020800040] = ffff9ffa | |
15914 | ! %f5 = ff000000, Mem[0000000030041410] = 5e000000 | |
15915 | sta %f5 ,[%i1+%o5]0x89 ! Mem[0000000030041410] = ff000000 | |
15916 | ! Starting 10 instruction Load Burst | |
15917 | ! Mem[0000000010101400] = ffff0000, %l0 = 00000000000000ff | |
15918 | lduba [%i4+%g0]0x80,%l0 ! %l0 = 00000000000000ff | |
15919 | ||
15920 | p0_label_369: | |
15921 | ! Mem[000000001004141c] = 9ce0b68a, %l7 = 000000000000ffff | |
15922 | ldsw [%i1+0x01c],%l7 ! %l7 = ffffffff9ce0b68a | |
15923 | ! Mem[0000000030081408] = 00000000, %l5 = 00000000ffffffff | |
15924 | ldsha [%i2+%o4]0x81,%l5 ! %l5 = 0000000000000000 | |
15925 | ! Mem[0000000010081400] = ff000000, %l2 = 00ffffffffff00ff | |
15926 | ldsh [%i2+0x002],%l2 ! %l2 = 0000000000000000 | |
15927 | ! Mem[0000000030141408] = 000000ff0000ffff, %l2 = 0000000000000000 | |
15928 | ldxa [%i5+%o4]0x89,%l2 ! %l2 = 000000ff0000ffff | |
15929 | ! Mem[0000000030081400] = ff000000ff000000, %l0 = 00000000000000ff | |
15930 | ldxa [%i2+%g0]0x81,%l0 ! %l0 = ff000000ff000000 | |
15931 | ! Mem[000000001018141c] = 00000000, %l1 = 6b002202ffffffff | |
15932 | lduba [%i6+0x01d]%asi,%l1 ! %l1 = 0000000000000000 | |
15933 | ! Mem[0000000010081408] = 6b002202ffffffff, %f14 = ffffffff 00000000 | |
15934 | ldda [%i2+%o4]0x80,%f14 ! %f14 = 6b002202 ffffffff | |
15935 | ! Mem[0000000010001410] = 0000005e, %l1 = 0000000000000000 | |
15936 | ldsha [%i0+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
15937 | ! Mem[0000000010001408] = 8ab600ff, %l5 = 0000000000000000 | |
15938 | ldsha [%i0+%o4]0x80,%l5 ! %l5 = ffffffffffff8ab6 | |
15939 | ! Starting 10 instruction Store Burst | |
15940 | ! Mem[0000000030001400] = 00ff0000, %l7 = ffffffff9ce0b68a | |
15941 | swapa [%i0+%g0]0x81,%l7 ! %l7 = 0000000000ff0000 | |
15942 | ||
15943 | p0_label_370: | |
15944 | ! Mem[0000000010081420] = 032cff8e, %l6 = ffffff9c, %l5 = ffff8ab6 | |
15945 | add %i2,0x20,%g1 | |
15946 | casa [%g1]0x80,%l6,%l5 ! %l5 = 00000000032cff8e | |
15947 | ! Mem[0000000030081400] = ff000000, %l2 = 000000ff0000ffff | |
15948 | swapa [%i2+%g0]0x81,%l2 ! %l2 = 00000000ff000000 | |
15949 | ! %l6 = ffffff9c, %l7 = 00ff0000, Mem[0000000010081400] = ff000000 ff000000 | |
15950 | stda %l6,[%i2+%g0]0x80 ! Mem[0000000010081400] = ffffff9c 00ff0000 | |
15951 | ! %f2 = ff00ffff ff0000ff, Mem[0000000030001400] = 8ab6e09c ff000000 | |
15952 | stda %f2 ,[%i0+%g0]0x89 ! Mem[0000000030001400] = ff00ffff ff0000ff | |
15953 | ! %l6 = ffffffffffffff9c, Mem[0000000010181408] = 00000000ff270000 | |
15954 | stxa %l6,[%i6+%o4]0x88 ! Mem[0000000010181408] = ffffffffffffff9c | |
15955 | ! %f4 = 00000000 ff000000, Mem[0000000010141410] = ff00ffe4 0000005e | |
15956 | stda %f4 ,[%i5+%o5]0x88 ! Mem[0000000010141410] = 00000000 ff000000 | |
15957 | ! Mem[0000000030101408] = 00000000, %l6 = ffffffffffffff9c | |
15958 | ldstuba [%i4+%o4]0x81,%l6 ! %l6 = 00000000000000ff | |
15959 | ! %l2 = ff000000, %l3 = ff000000, Mem[00000000300c1400] = 000000ff 000000e2 | |
15960 | stda %l2,[%i3+%g0]0x89 ! Mem[00000000300c1400] = ff000000 ff000000 | |
15961 | ! %f26 = 0000005e 000027ff, %l1 = 0000000000000000 | |
15962 | ! Mem[0000000010001420] = 00000000000000ff | |
15963 | add %i0,0x020,%g1 | |
15964 | stda %f26,[%g1+%l1]ASI_PST32_PL ! Mem[0000000010001420] = 00000000000000ff | |
15965 | ! Starting 10 instruction Load Burst | |
15966 | ! Mem[0000000030001400] = ff0000ff, %l4 = 000000000000006b | |
15967 | lduwa [%i0+%g0]0x89,%l4 ! %l4 = 00000000ff0000ff | |
15968 | ||
15969 | ! Check Point 74 for processor 0 | |
15970 | ||
15971 | set p0_check_pt_data_74,%g4 | |
15972 | rd %ccr,%g5 ! %g5 = 44 | |
15973 | ldx [%g4+0x08],%g2 | |
15974 | cmp %l0,%g2 ! %l0 = ff000000ff000000 | |
15975 | bne %xcc,p0_reg_check_fail0 | |
15976 | mov 0xee0,%g1 | |
15977 | ldx [%g4+0x10],%g2 | |
15978 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
15979 | bne %xcc,p0_reg_check_fail1 | |
15980 | mov 0xee1,%g1 | |
15981 | ldx [%g4+0x18],%g2 | |
15982 | cmp %l2,%g2 ! %l2 = 00000000ff000000 | |
15983 | bne %xcc,p0_reg_check_fail2 | |
15984 | mov 0xee2,%g1 | |
15985 | ldx [%g4+0x20],%g2 | |
15986 | cmp %l4,%g2 ! %l4 = 00000000ff0000ff | |
15987 | bne %xcc,p0_reg_check_fail4 | |
15988 | mov 0xee4,%g1 | |
15989 | ldx [%g4+0x28],%g2 | |
15990 | cmp %l5,%g2 ! %l5 = 00000000032cff8e | |
15991 | bne %xcc,p0_reg_check_fail5 | |
15992 | mov 0xee5,%g1 | |
15993 | ldx [%g4+0x30],%g2 | |
15994 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
15995 | bne %xcc,p0_reg_check_fail6 | |
15996 | mov 0xee6,%g1 | |
15997 | ldx [%g4+0x38],%g2 | |
15998 | cmp %l7,%g2 ! %l7 = 0000000000ff0000 | |
15999 | bne %xcc,p0_reg_check_fail7 | |
16000 | mov 0xee7,%g1 | |
16001 | ldx [%g4+0x40],%g3 | |
16002 | std %f0,[%g4] | |
16003 | ldx [%g4],%g2 | |
16004 | cmp %g3,%g2 ! %f0 = ff000000 ff000000 | |
16005 | bne %xcc,p0_freg_check_fail | |
16006 | mov 0xf00,%g1 | |
16007 | ldx [%g4+0x48],%g3 | |
16008 | std %f2,[%g4] | |
16009 | ldx [%g4],%g2 | |
16010 | cmp %g3,%g2 ! %f2 = ff00ffff ff0000ff | |
16011 | bne %xcc,p0_freg_check_fail | |
16012 | mov 0xf02,%g1 | |
16013 | ldx [%g4+0x50],%g3 | |
16014 | std %f10,[%g4] | |
16015 | ldx [%g4],%g2 | |
16016 | cmp %g3,%g2 ! %f10 = 000000ff 0000ffff | |
16017 | bne %xcc,p0_freg_check_fail | |
16018 | mov 0xf10,%g1 | |
16019 | ldx [%g4+0x58],%g3 | |
16020 | std %f14,[%g4] | |
16021 | ldx [%g4],%g2 | |
16022 | cmp %g3,%g2 ! %f14 = 6b002202 ffffffff | |
16023 | bne %xcc,p0_freg_check_fail | |
16024 | mov 0xf14,%g1 | |
16025 | ||
16026 | ! Check Point 74 completed | |
16027 | ||
16028 | ||
16029 | p0_label_371: | |
16030 | ! Mem[0000000010041410] = 5e000000, %l1 = 0000000000000000 | |
16031 | ldswa [%i1+%o5]0x80,%l1 ! %l1 = 000000005e000000 | |
16032 | ! Mem[000000001008142c] = 00000000, %l4 = 00000000ff0000ff | |
16033 | ldsba [%i2+0x02d]%asi,%l4 ! %l4 = 0000000000000000 | |
16034 | ! Mem[000000001014143c] = ffffffff, %l1 = 000000005e000000 | |
16035 | ldsw [%i5+0x03c],%l1 ! %l1 = ffffffffffffffff | |
16036 | ! Mem[0000000030001408] = ffffffff, %l0 = ff000000ff000000 | |
16037 | ldswa [%i0+%o4]0x89,%l0 ! %l0 = ffffffffffffffff | |
16038 | ! Mem[0000000030041400] = 0000ffff, %l4 = 0000000000000000 | |
16039 | lduwa [%i1+%g0]0x81,%l4 ! %l4 = 000000000000ffff | |
16040 | ! Mem[0000000010181408] = ffffff9c, %l5 = 00000000032cff8e | |
16041 | ldsha [%i6+%o4]0x88,%l5 ! %l5 = ffffffffffffff9c | |
16042 | ! Mem[0000000030141400] = 1a0000006b6c2202, %f30 = ff00ffe4 ffff00ff | |
16043 | ldda [%i5+%g0]0x89,%f30 ! %f30 = 1a000000 6b6c2202 | |
16044 | ! Mem[0000000030081400] = 0000ffff, %l1 = ffffffffffffffff | |
16045 | ldswa [%i2+%g0]0x81,%l1 ! %l1 = 000000000000ffff | |
16046 | ! Mem[00000000100c1408] = ff0000ff, %l3 = 00000000ff000000 | |
16047 | ldswa [%i3+%o4]0x80,%l3 ! %l3 = ffffffffff0000ff | |
16048 | ! Starting 10 instruction Store Burst | |
16049 | ! %l1 = 000000000000ffff, Mem[0000000030001400] = ff0000ffffff00ff | |
16050 | stxa %l1,[%i0+%g0]0x81 ! Mem[0000000030001400] = 000000000000ffff | |
16051 | ||
16052 | p0_label_372: | |
16053 | ! %f12 = ff000000 ff000000, %l1 = 000000000000ffff | |
16054 | ! Mem[0000000010101418] = 00ff000057000000 | |
16055 | add %i4,0x018,%g1 | |
16056 | stda %f12,[%g1+%l1]ASI_PST16_P ! Mem[0000000010101418] = ff000000ff000000 | |
16057 | ! %l5 = ffffffffffffff9c, Mem[0000000010041408] = ffffffff | |
16058 | stba %l5,[%i1+%o4]0x80 ! Mem[0000000010041408] = 9cffffff | |
16059 | ! %l4 = 000000000000ffff, Mem[0000000010081432] = 0fffffff | |
16060 | sth %l4,[%i2+0x032] ! Mem[0000000010081430] = 0fffffff | |
16061 | ! Mem[0000000010081410] = 00ffffff, %l5 = ffffffffffffff9c, %asi = 80 | |
16062 | swapa [%i2+0x010]%asi,%l5 ! %l5 = 0000000000ffffff | |
16063 | ! Mem[0000000010081410] = ffffff9cffff00ff, %l5 = 0000000000ffffff, %l7 = 0000000000ff0000 | |
16064 | add %i2,0x10,%g1 | |
16065 | casxa [%g1]0x80,%l5,%l7 ! %l7 = ffffff9cffff00ff | |
16066 | ! %l0 = ffffffff, %l1 = 0000ffff, Mem[0000000010101410] = ff000000 ff00ff00 | |
16067 | std %l0,[%i4+%o5] ! Mem[0000000010101410] = ffffffff 0000ffff | |
16068 | ! %l4 = 000000000000ffff, Mem[0000000010141409] = ffffffff | |
16069 | stb %l4,[%i5+0x009] ! Mem[0000000010141408] = ffffffff | |
16070 | ! %f27 = 000027ff, Mem[0000000010101408] = e4ff00ff | |
16071 | sta %f27,[%i4+%o4]0x88 ! Mem[0000000010101408] = 000027ff | |
16072 | ! %l5 = 0000000000ffffff, Mem[00000000211c0000] = fffffe0c, %asi = 80 | |
16073 | stha %l5,[%o2+0x000]%asi ! Mem[00000000211c0000] = fffffe0c | |
16074 | ! Starting 10 instruction Load Burst | |
16075 | ! Mem[00000000100c1408] = ff0000ff, %f1 = ff000000 | |
16076 | lda [%i3+%o4]0x80,%f1 ! %f1 = ff0000ff | |
16077 | ||
16078 | p0_label_373: | |
16079 | ! Mem[00000000201c0000] = 00001669, %l2 = 00000000ff000000 | |
16080 | ldsh [%o0+%g0],%l2 ! %l2 = 0000000000000000 | |
16081 | ! Mem[00000000100c1410] = 0000ff00, %l4 = 000000000000ffff | |
16082 | lduwa [%i3+%o5]0x88,%l4 ! %l4 = 000000000000ff00 | |
16083 | ! Mem[00000000300c1400] = 000000ff, %f12 = ff000000 | |
16084 | lda [%i3+%g0]0x81,%f12 ! %f12 = 000000ff | |
16085 | ! Mem[0000000010081408] = 6b002202, %l7 = ffffff9cffff00ff | |
16086 | lduha [%i2+%o4]0x80,%l7 ! %l7 = 0000000000006b00 | |
16087 | ! Mem[00000000100c1438] = ff00ffff, %l2 = 0000000000000000 | |
16088 | ldsba [%i3+0x039]%asi,%l2 ! %l2 = 0000000000000000 | |
16089 | ! Mem[0000000030101400] = 00000000, %f23 = 6b6c2202 | |
16090 | lda [%i4+%g0]0x89,%f23 ! %f23 = 00000000 | |
16091 | ! Mem[0000000030141410] = ff00005e, %l3 = ffffffffff0000ff | |
16092 | ldswa [%i5+%o5]0x81,%l3 ! %l3 = ffffffffff00005e | |
16093 | ! Mem[0000000010041400] = 00000000, %l4 = 000000000000ff00 | |
16094 | lduh [%i1+0x002],%l4 ! %l4 = 0000000000000000 | |
16095 | ! Mem[0000000010181408] = 9cffffff, %f2 = ff00ffff | |
16096 | lda [%i6+%o4]0x80,%f2 ! %f2 = 9cffffff | |
16097 | ! Starting 10 instruction Store Burst | |
16098 | ! %f20 = 5e000000 0000ff00, Mem[0000000030141408] = 0000ffff 000000ff | |
16099 | stda %f20,[%i5+%o4]0x89 ! Mem[0000000030141408] = 5e000000 0000ff00 | |
16100 | ||
16101 | p0_label_374: | |
16102 | ! %l4 = 0000000000000000, Mem[0000000010101410] = ffffffff | |
16103 | stba %l4,[%i4+%o5]0x88 ! Mem[0000000010101410] = ffffff00 | |
16104 | ! %f12 = 000000ff, Mem[00000000300c1410] = ffffffff | |
16105 | sta %f12,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 000000ff | |
16106 | ! %l7 = 0000000000006b00, Mem[0000000020800000] = c7060db6, %asi = 80 | |
16107 | stha %l7,[%o1+0x000]%asi ! Mem[0000000020800000] = 6b000db6 | |
16108 | ! %l2 = 0000000000000000, Mem[0000000030041400] = 0000b68affff0000 | |
16109 | stxa %l2,[%i1+%g0]0x89 ! Mem[0000000030041400] = 0000000000000000 | |
16110 | ! %l2 = 0000000000000000, Mem[0000000030181400] = 000000ff | |
16111 | stha %l2,[%i6+%g0]0x81 ! Mem[0000000030181400] = 000000ff | |
16112 | ! %l2 = 00000000, %l3 = ff00005e, Mem[0000000010101408] = 000027ff ff00ffff | |
16113 | stda %l2,[%i4+%o4]0x88 ! Mem[0000000010101408] = 00000000 ff00005e | |
16114 | ! %l1 = 000000000000ffff, Mem[0000000010001410] = ff2700005e000000 | |
16115 | stxa %l1,[%i0+%o5]0x88 ! Mem[0000000010001410] = 000000000000ffff | |
16116 | ! Mem[0000000030081408] = 00000000, %l7 = 0000000000006b00 | |
16117 | swapa [%i2+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
16118 | ! %f7 = 0000ffff, Mem[0000000010001410] = ffff0000 | |
16119 | sta %f7 ,[%i0+%o5]0x80 ! Mem[0000000010001410] = 0000ffff | |
16120 | ! Starting 10 instruction Load Burst | |
16121 | ! Mem[0000000010141418] = 5e9e11576b6c2202, %l6 = 0000000000000000 | |
16122 | ldx [%i5+0x018],%l6 ! %l6 = 5e9e11576b6c2202 | |
16123 | ||
16124 | p0_label_375: | |
16125 | ! Mem[0000000010141400] = ff000000, %l5 = 0000000000ffffff | |
16126 | ldsba [%i5+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
16127 | ! Mem[0000000010141400] = 000000ff, %l7 = 0000000000000000 | |
16128 | lduba [%i5+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
16129 | ! Mem[0000000010141408] = ffffffffffff00ff, %l1 = 000000000000ffff | |
16130 | ldxa [%i5+%o4]0x80,%l1 ! %l1 = ffffffffffff00ff | |
16131 | ! Mem[0000000010041410] = 0000005e, %l0 = ffffffffffffffff | |
16132 | lduwa [%i1+%o5]0x88,%l0 ! %l0 = 000000000000005e | |
16133 | ! Mem[0000000010041400] = 0000000000000000, %f4 = 00000000 ff000000 | |
16134 | ldda [%i1+%g0]0x88,%f4 ! %f4 = 00000000 00000000 | |
16135 | ! Mem[0000000030041410] = 000000ff, %l1 = ffffffffffff00ff | |
16136 | ldswa [%i1+%o5]0x81,%l1 ! %l1 = 00000000000000ff | |
16137 | ! Mem[00000000100c1428] = ff270000, %l3 = ffffffffff00005e | |
16138 | lduha [%i3+0x02a]%asi,%l3 ! %l3 = 0000000000000000 | |
16139 | ! Mem[0000000010181428] = 00000000 ff000000, %l4 = 00000000, %l5 = 00000000 | |
16140 | ldda [%i6+0x028]%asi,%l4 ! %l4 = 0000000000000000 00000000ff000000 | |
16141 | ! Mem[0000000010181428] = 00000000, %f24 = 00000000 | |
16142 | lda [%i6+0x028]%asi,%f24 ! %f24 = 00000000 | |
16143 | ! Starting 10 instruction Store Burst | |
16144 | ! %l5 = 00000000ff000000, Mem[0000000030041400] = 0000000000000000 | |
16145 | stxa %l5,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00000000ff000000 | |
16146 | ||
16147 | ! Check Point 75 for processor 0 | |
16148 | ||
16149 | set p0_check_pt_data_75,%g4 | |
16150 | rd %ccr,%g5 ! %g5 = 44 | |
16151 | ldx [%g4+0x08],%g2 | |
16152 | cmp %l0,%g2 ! %l0 = 000000000000005e | |
16153 | bne %xcc,p0_reg_check_fail0 | |
16154 | mov 0xee0,%g1 | |
16155 | ldx [%g4+0x10],%g2 | |
16156 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
16157 | bne %xcc,p0_reg_check_fail1 | |
16158 | mov 0xee1,%g1 | |
16159 | ldx [%g4+0x18],%g2 | |
16160 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
16161 | bne %xcc,p0_reg_check_fail2 | |
16162 | mov 0xee2,%g1 | |
16163 | ldx [%g4+0x20],%g2 | |
16164 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
16165 | bne %xcc,p0_reg_check_fail3 | |
16166 | mov 0xee3,%g1 | |
16167 | ldx [%g4+0x28],%g2 | |
16168 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
16169 | bne %xcc,p0_reg_check_fail4 | |
16170 | mov 0xee4,%g1 | |
16171 | ldx [%g4+0x30],%g2 | |
16172 | cmp %l5,%g2 ! %l5 = 00000000ff000000 | |
16173 | bne %xcc,p0_reg_check_fail5 | |
16174 | mov 0xee5,%g1 | |
16175 | ldx [%g4+0x38],%g2 | |
16176 | cmp %l6,%g2 ! %l6 = 5e9e11576b6c2202 | |
16177 | bne %xcc,p0_reg_check_fail6 | |
16178 | mov 0xee6,%g1 | |
16179 | ldx [%g4+0x40],%g2 | |
16180 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
16181 | bne %xcc,p0_reg_check_fail7 | |
16182 | mov 0xee7,%g1 | |
16183 | ldx [%g4+0x48],%g3 | |
16184 | std %f0,[%g4] | |
16185 | ldx [%g4],%g2 | |
16186 | cmp %g3,%g2 ! %f0 = ff000000 ff0000ff | |
16187 | bne %xcc,p0_freg_check_fail | |
16188 | mov 0xf00,%g1 | |
16189 | ldx [%g4+0x50],%g3 | |
16190 | std %f2,[%g4] | |
16191 | ldx [%g4],%g2 | |
16192 | cmp %g3,%g2 ! %f2 = 9cffffff ff0000ff | |
16193 | bne %xcc,p0_freg_check_fail | |
16194 | mov 0xf02,%g1 | |
16195 | ldx [%g4+0x58],%g3 | |
16196 | std %f4,[%g4] | |
16197 | ldx [%g4],%g2 | |
16198 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
16199 | bne %xcc,p0_freg_check_fail | |
16200 | mov 0xf04,%g1 | |
16201 | ldx [%g4+0x60],%g3 | |
16202 | std %f12,[%g4] | |
16203 | ldx [%g4],%g2 | |
16204 | cmp %g3,%g2 ! %f12 = 000000ff ff000000 | |
16205 | bne %xcc,p0_freg_check_fail | |
16206 | mov 0xf12,%g1 | |
16207 | ldx [%g4+0x68],%g3 | |
16208 | std %f22,[%g4] | |
16209 | ldx [%g4],%g2 | |
16210 | cmp %g3,%g2 ! %f22 = 5e9e11ff 00000000 | |
16211 | bne %xcc,p0_freg_check_fail | |
16212 | mov 0xf22,%g1 | |
16213 | ldx [%g4+0x70],%g3 | |
16214 | std %f24,[%g4] | |
16215 | ldx [%g4],%g2 | |
16216 | cmp %g3,%g2 ! %f24 = 00000000 00000000 | |
16217 | bne %xcc,p0_freg_check_fail | |
16218 | mov 0xf24,%g1 | |
16219 | ldx [%g4+0x78],%g3 | |
16220 | std %f30,[%g4] | |
16221 | ldx [%g4],%g2 | |
16222 | cmp %g3,%g2 ! %f30 = 1a000000 6b6c2202 | |
16223 | bne %xcc,p0_freg_check_fail | |
16224 | mov 0xf30,%g1 | |
16225 | ||
16226 | ! Check Point 75 completed | |
16227 | ||
16228 | ||
16229 | p0_label_376: | |
16230 | ! %l5 = 00000000ff000000, Mem[0000000010041428] = 000000ff00000000 | |
16231 | stx %l5,[%i1+0x028] ! Mem[0000000010041428] = 00000000ff000000 | |
16232 | ! %l3 = 0000000000000000, Mem[0000000010141410] = ff000000 | |
16233 | stha %l3,[%i5+%o5]0x88 ! Mem[0000000010141410] = ff000000 | |
16234 | ! %l3 = 0000000000000000, Mem[00000000100c1410] = 000000000000ff00 | |
16235 | stxa %l3,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 0000000000000000 | |
16236 | ! %f8 = ff0000ff 00ffffff, Mem[00000000300c1410] = 000000ff ffffffc4 | |
16237 | stda %f8 ,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ff0000ff 00ffffff | |
16238 | ! Mem[0000000030101408] = 000000ff, %l5 = 00000000ff000000 | |
16239 | swapa [%i4+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
16240 | ! Mem[00000000300c1400] = 000000ff, %l4 = 0000000000000000 | |
16241 | ldstuba [%i3+%g0]0x81,%l4 ! %l4 = 00000000000000ff | |
16242 | ! Mem[0000000030181408] = ff0000ff, %l6 = 5e9e11576b6c2202 | |
16243 | ldstuba [%i6+%o4]0x81,%l6 ! %l6 = 000000ff000000ff | |
16244 | ! %l0 = 000000000000005e, Mem[0000000010101408] = ff00005e00000000 | |
16245 | stxa %l0,[%i4+%o4]0x88 ! Mem[0000000010101408] = 000000000000005e | |
16246 | ! Mem[0000000010041400] = 00000000, %l3 = 0000000000000000 | |
16247 | swapa [%i1+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
16248 | ! Starting 10 instruction Load Burst | |
16249 | ! Mem[0000000030181410] = 0000008e, %l6 = 00000000000000ff | |
16250 | ldswa [%i6+%o5]0x89,%l6 ! %l6 = 000000000000008e | |
16251 | ||
16252 | p0_label_377: | |
16253 | ! Mem[0000000010101400] = 000000ff0000ffff, %f12 = 000000ff ff000000 | |
16254 | ldda [%i4+%g0]0x88,%f12 ! %f12 = 000000ff 0000ffff | |
16255 | ! Mem[0000000010041410] = 0000005e, %l6 = 000000000000008e | |
16256 | lduwa [%i1+%o5]0x88,%l6 ! %l6 = 000000000000005e | |
16257 | ! Mem[0000000010141410] = 000000ff 00000000, %l2 = 00000000, %l3 = 00000000 | |
16258 | ldda [%i5+%o5]0x80,%l2 ! %l2 = 00000000000000ff 0000000000000000 | |
16259 | ! Mem[0000000010101408] = 5e000000, %l3 = 0000000000000000 | |
16260 | ldsba [%i4+%o4]0x80,%l3 ! %l3 = 000000000000005e | |
16261 | ! Mem[0000000030081408] = 006b0000, %f15 = ffffffff | |
16262 | lda [%i2+%o4]0x81,%f15 ! %f15 = 006b0000 | |
16263 | ! Mem[00000000100c1410] = 0000000000000000, %l3 = 000000000000005e | |
16264 | ldxa [%i3+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
16265 | ! Mem[00000000300c1410] = ff0000ff, %l0 = 000000000000005e | |
16266 | swapa [%i3+%o5]0x89,%l0 ! %l0 = 00000000ff0000ff | |
16267 | ! Mem[0000000010001410] = 0000ffff, %l7 = 0000000000000000 | |
16268 | ldswa [%i0+%o5]0x80,%l7 ! %l7 = 000000000000ffff | |
16269 | ! Mem[00000000100c1424] = 00000000, %l3 = 0000000000000000 | |
16270 | ldsha [%i3+0x024]%asi,%l3 ! %l3 = 0000000000000000 | |
16271 | ! Starting 10 instruction Store Burst | |
16272 | ! %l4 = 0000000000000000, Mem[0000000010101408] = 5e00000000000000 | |
16273 | stxa %l4,[%i4+%o4]0x80 ! Mem[0000000010101408] = 0000000000000000 | |
16274 | ||
16275 | p0_label_378: | |
16276 | ! %l2 = 000000ff, %l3 = 00000000, Mem[0000000010081428] = 00000000 00000000 | |
16277 | stda %l2,[%i2+0x028]%asi ! Mem[0000000010081428] = 000000ff 00000000 | |
16278 | ! Mem[00000000100c1410] = 00000000, %l7 = 000000000000ffff | |
16279 | swapa [%i3+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
16280 | ! Mem[0000000010001430] = 000000ff, %l1 = 00000000000000ff | |
16281 | swap [%i0+0x030],%l1 ! %l1 = 00000000000000ff | |
16282 | ! Mem[0000000010101410] = ffffff00, %l2 = 00000000000000ff | |
16283 | swapa [%i4+%o5]0x88,%l2 ! %l2 = 00000000ffffff00 | |
16284 | ! %f19 = ff0000ff, Mem[0000000010101408] = 00000000 | |
16285 | sta %f19,[%i4+%o4]0x80 ! Mem[0000000010101408] = ff0000ff | |
16286 | ! %l7 = 0000000000000000, Mem[00000000211c0000] = fffffe0c | |
16287 | stb %l7,[%o2+%g0] ! Mem[00000000211c0000] = 00fffe0c | |
16288 | ! %f26 = 0000005e 000027ff, %l7 = 0000000000000000 | |
16289 | ! Mem[0000000030181420] = 000000ffff000000 | |
16290 | add %i6,0x020,%g1 | |
16291 | stda %f26,[%g1+%l7]ASI_PST32_SL ! Mem[0000000030181420] = 000000ffff000000 | |
16292 | ! %l1 = 00000000000000ff, Mem[0000000021800101] = ffff39e7, %asi = 80 | |
16293 | stba %l1,[%o3+0x101]%asi ! Mem[0000000021800100] = ffff39e7 | |
16294 | ! %f16 = 5eff0000, Mem[0000000030141400] = 6b6c2202 | |
16295 | sta %f16,[%i5+%g0]0x89 ! Mem[0000000030141400] = 5eff0000 | |
16296 | ! Starting 10 instruction Load Burst | |
16297 | ! Mem[0000000030041410] = ff000000, %l0 = 00000000ff0000ff | |
16298 | ldsba [%i1+%o5]0x89,%l0 ! %l0 = 0000000000000000 | |
16299 | ||
16300 | p0_label_379: | |
16301 | ! Mem[0000000010181428] = 00000000 ff000000, %l0 = 00000000, %l1 = 000000ff | |
16302 | ldd [%i6+0x028],%l0 ! %l0 = 0000000000000000 00000000ff000000 | |
16303 | ! Mem[0000000010001430] = 000000ff, %l6 = 000000000000005e | |
16304 | ldswa [%i0+0x030]%asi,%l6 ! %l6 = 00000000000000ff | |
16305 | ! Mem[0000000030141410] = ff00005e, %l1 = 00000000ff000000 | |
16306 | ldsba [%i5+%o5]0x81,%l1 ! %l1 = ffffffffffffffff | |
16307 | ! Mem[0000000030141408] = 00ff0000, %f22 = 5e9e11ff | |
16308 | lda [%i5+%o4]0x81,%f22 ! %f22 = 00ff0000 | |
16309 | ! Mem[0000000030081410] = 000000ff00000000, %f30 = 1a000000 6b6c2202 | |
16310 | ldda [%i2+%o5]0x89,%f30 ! %f30 = 000000ff 00000000 | |
16311 | ! Mem[0000000030041408] = 00000000, %l5 = 00000000000000ff | |
16312 | ldswa [%i1+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
16313 | ! Mem[0000000030141408] = 5e0000000000ff00, %l5 = 0000000000000000 | |
16314 | ldxa [%i5+%o4]0x89,%l5 ! %l5 = 5e0000000000ff00 | |
16315 | ! Mem[00000000300c1408] = 00000000 00ffffff, %l6 = 000000ff, %l7 = 00000000 | |
16316 | ldda [%i3+%o4]0x89,%l6 ! %l6 = 0000000000ffffff 0000000000000000 | |
16317 | ! Mem[0000000010081418] = 0000578bd9876ee7, %f6 = 00000000 0000ffff | |
16318 | ldda [%i2+0x018]%asi,%f6 ! %f6 = 0000578b d9876ee7 | |
16319 | ! Starting 10 instruction Store Burst | |
16320 | ! %l4 = 00000000, %l5 = 0000ff00, Mem[0000000010101438] = 5e27ffff d9876ee7 | |
16321 | std %l4,[%i4+0x038] ! Mem[0000000010101438] = 00000000 0000ff00 | |
16322 | ||
16323 | p0_label_380: | |
16324 | ! Mem[00000000100c140d] = 000000ff, %l4 = 0000000000000000 | |
16325 | ldstuba [%i3+0x00d]%asi,%l4 ! %l4 = 00000000000000ff | |
16326 | ! Mem[0000000010141400] = ff000000, %l3 = 0000000000000000 | |
16327 | ldstuba [%i5+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
16328 | ! %f22 = 00ff0000, Mem[0000000010101400] = 0000ffff | |
16329 | sta %f22,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00ff0000 | |
16330 | ! Mem[0000000020800040] = ffff9ffa, %l3 = 0000000000000000 | |
16331 | lduha [%o1+0x040]%asi,%l3 ! %l3 = 000000000000ffff | |
16332 | ! %l0 = 0000000000000000, Mem[0000000010141400] = ff0000ff000000ff | |
16333 | stxa %l0,[%i5+%g0]0x80 ! Mem[0000000010141400] = 0000000000000000 | |
16334 | ! %f8 = ff0000ff, Mem[0000000030101410] = ffffffff | |
16335 | sta %f8 ,[%i4+%o5]0x81 ! Mem[0000000030101410] = ff0000ff | |
16336 | ! %l4 = 0000000000000000, Mem[00000000201c0001] = 00001669 | |
16337 | stb %l4,[%o0+0x001] ! Mem[00000000201c0000] = 00001669 | |
16338 | ! %l7 = 0000000000000000, Mem[0000000030141410] = ff00005e | |
16339 | stha %l7,[%i5+%o5]0x81 ! Mem[0000000030141410] = 0000005e | |
16340 | ! Mem[0000000010141410] = 000000ff, %l2 = 00000000ffffff00, %asi = 80 | |
16341 | swapa [%i5+0x010]%asi,%l2 ! %l2 = 00000000000000ff | |
16342 | ! Starting 10 instruction Load Burst | |
16343 | ! Mem[0000000030001408] = ffffffff, %l5 = 5e0000000000ff00 | |
16344 | lduwa [%i0+%o4]0x81,%l5 ! %l5 = 00000000ffffffff | |
16345 | ||
16346 | ! Check Point 76 for processor 0 | |
16347 | ||
16348 | set p0_check_pt_data_76,%g4 | |
16349 | rd %ccr,%g5 ! %g5 = 44 | |
16350 | ldx [%g4+0x08],%g2 | |
16351 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
16352 | bne %xcc,p0_reg_check_fail0 | |
16353 | mov 0xee0,%g1 | |
16354 | ldx [%g4+0x10],%g2 | |
16355 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
16356 | bne %xcc,p0_reg_check_fail1 | |
16357 | mov 0xee1,%g1 | |
16358 | ldx [%g4+0x18],%g2 | |
16359 | cmp %l3,%g2 ! %l3 = 000000000000ffff | |
16360 | bne %xcc,p0_reg_check_fail3 | |
16361 | mov 0xee3,%g1 | |
16362 | ldx [%g4+0x20],%g2 | |
16363 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
16364 | bne %xcc,p0_reg_check_fail4 | |
16365 | mov 0xee4,%g1 | |
16366 | ldx [%g4+0x28],%g2 | |
16367 | cmp %l5,%g2 ! %l5 = 00000000ffffffff | |
16368 | bne %xcc,p0_reg_check_fail5 | |
16369 | mov 0xee5,%g1 | |
16370 | ldx [%g4+0x30],%g2 | |
16371 | cmp %l6,%g2 ! %l6 = 0000000000ffffff | |
16372 | bne %xcc,p0_reg_check_fail6 | |
16373 | mov 0xee6,%g1 | |
16374 | ldx [%g4+0x38],%g2 | |
16375 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
16376 | bne %xcc,p0_reg_check_fail7 | |
16377 | mov 0xee7,%g1 | |
16378 | ldx [%g4+0x40],%g3 | |
16379 | std %f0,[%g4] | |
16380 | ldx [%g4],%g2 | |
16381 | cmp %g3,%g2 ! %f0 = ff000000 ff0000ff | |
16382 | bne %xcc,p0_freg_check_fail | |
16383 | mov 0xf00,%g1 | |
16384 | ldx [%g4+0x48],%g3 | |
16385 | std %f2,[%g4] | |
16386 | ldx [%g4],%g2 | |
16387 | cmp %g3,%g2 ! %f2 = 9cffffff ff0000ff | |
16388 | bne %xcc,p0_freg_check_fail | |
16389 | mov 0xf02,%g1 | |
16390 | ldx [%g4+0x50],%g3 | |
16391 | std %f6,[%g4] | |
16392 | ldx [%g4],%g2 | |
16393 | cmp %g3,%g2 ! %f6 = 0000578b d9876ee7 | |
16394 | bne %xcc,p0_freg_check_fail | |
16395 | mov 0xf06,%g1 | |
16396 | ldx [%g4+0x58],%g3 | |
16397 | std %f12,[%g4] | |
16398 | ldx [%g4],%g2 | |
16399 | cmp %g3,%g2 ! %f12 = 000000ff 0000ffff | |
16400 | bne %xcc,p0_freg_check_fail | |
16401 | mov 0xf12,%g1 | |
16402 | ldx [%g4+0x60],%g3 | |
16403 | std %f14,[%g4] | |
16404 | ldx [%g4],%g2 | |
16405 | cmp %g3,%g2 ! %f14 = 6b002202 006b0000 | |
16406 | bne %xcc,p0_freg_check_fail | |
16407 | mov 0xf14,%g1 | |
16408 | ldx [%g4+0x68],%g3 | |
16409 | std %f22,[%g4] | |
16410 | ldx [%g4],%g2 | |
16411 | cmp %g3,%g2 ! %f22 = 00ff0000 00000000 | |
16412 | bne %xcc,p0_freg_check_fail | |
16413 | mov 0xf22,%g1 | |
16414 | ldx [%g4+0x70],%g3 | |
16415 | std %f30,[%g4] | |
16416 | ldx [%g4],%g2 | |
16417 | cmp %g3,%g2 ! %f30 = 000000ff 00000000 | |
16418 | bne %xcc,p0_freg_check_fail | |
16419 | mov 0xf30,%g1 | |
16420 | ||
16421 | ! Check Point 76 completed | |
16422 | ||
16423 | ||
16424 | p0_label_381: | |
16425 | ! Mem[00000000100c1408] = ff0000ff00ff00ff, %f6 = 0000578b d9876ee7 | |
16426 | ldda [%i3+%o4]0x80,%f6 ! %f6 = ff0000ff 00ff00ff | |
16427 | ! Mem[0000000030181410] = ff0000000000008e, %l7 = 0000000000000000 | |
16428 | ldxa [%i6+%o5]0x89,%l7 ! %l7 = ff0000000000008e | |
16429 | ! Mem[0000000010181428] = 00000000, %l0 = 0000000000000000 | |
16430 | ldsw [%i6+0x028],%l0 ! %l0 = 0000000000000000 | |
16431 | ! Mem[0000000030181408] = ff0000ff, %f0 = ff000000 | |
16432 | lda [%i6+%o4]0x81,%f0 ! %f0 = ff0000ff | |
16433 | ! Mem[0000000010001408] = ff00b68a, %l0 = 0000000000000000 | |
16434 | lduwa [%i0+%o4]0x88,%l0 ! %l0 = 00000000ff00b68a | |
16435 | ! Mem[0000000030001410] = 0000005e0000ff8a, %f20 = 5e000000 0000ff00 | |
16436 | ldda [%i0+%o5]0x89,%f20 ! %f20 = 0000005e 0000ff8a | |
16437 | ! Mem[0000000010081408] = 6b002202ffffffff, %l4 = 0000000000000000 | |
16438 | ldxa [%i2+%o4]0x80,%l4 ! %l4 = 6b002202ffffffff | |
16439 | ! Mem[0000000030141400] = 0000ff5e0000001a, %l7 = ff0000000000008e | |
16440 | ldxa [%i5+%g0]0x81,%l7 ! %l7 = 0000ff5e0000001a | |
16441 | ! Mem[0000000010141420] = 9ce0b68a, %l0 = 00000000ff00b68a | |
16442 | lduba [%i5+0x023]%asi,%l0 ! %l0 = 000000000000008a | |
16443 | ! Starting 10 instruction Store Burst | |
16444 | ! Mem[0000000010041410] = 5e00000000000000, %l0 = 000000000000008a, %l4 = 6b002202ffffffff | |
16445 | add %i1,0x10,%g1 | |
16446 | casxa [%g1]0x80,%l0,%l4 ! %l4 = 5e00000000000000 | |
16447 | ||
16448 | p0_label_382: | |
16449 | ! %f28 = ff00ffff, Mem[0000000010141408] = ffffffff | |
16450 | sta %f28,[%i5+%o4]0x88 ! Mem[0000000010141408] = ff00ffff | |
16451 | ! %l6 = 0000000000ffffff, Mem[00000000201c0000] = 00001669, %asi = 80 | |
16452 | stha %l6,[%o0+0x000]%asi ! Mem[00000000201c0000] = ffff1669 | |
16453 | ! Mem[0000000010081410] = ffffff9c, %l7 = 0000ff5e0000001a | |
16454 | swapa [%i2+%o5]0x80,%l7 ! %l7 = 00000000ffffff9c | |
16455 | ! %l0 = 000000000000008a, Mem[00000000218001c0] = ff23fa38 | |
16456 | sth %l0,[%o3+0x1c0] ! Mem[00000000218001c0] = 008afa38 | |
16457 | ! %f22 = 00ff0000, Mem[0000000030141400] = 0000ff5e | |
16458 | sta %f22,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00ff0000 | |
16459 | ! Mem[0000000010041430] = 9ce0b68affff275e, %l4 = 5e00000000000000, %l4 = 5e00000000000000 | |
16460 | add %i1,0x30,%g1 | |
16461 | casxa [%g1]0x80,%l4,%l4 ! %l4 = 9ce0b68affff275e | |
16462 | ! %l7 = 00000000ffffff9c, Mem[0000000030101408] = 000000ff00000000 | |
16463 | stxa %l7,[%i4+%o4]0x81 ! Mem[0000000030101408] = 00000000ffffff9c | |
16464 | ! Mem[0000000010181429] = 00000000, %l3 = 000000000000ffff | |
16465 | ldstub [%i6+0x029],%l3 ! %l3 = 00000000000000ff | |
16466 | ! %l0 = 000000000000008a, Mem[0000000030041410] = ff000000 | |
16467 | stba %l0,[%i1+%o5]0x89 ! Mem[0000000030041410] = ff00008a | |
16468 | ! Starting 10 instruction Load Burst | |
16469 | ! Mem[0000000030141408] = 00ff0000, %f22 = 00ff0000 | |
16470 | lda [%i5+%o4]0x81,%f22 ! %f22 = 00ff0000 | |
16471 | ||
16472 | p0_label_383: | |
16473 | ! Mem[0000000010141408] = ffff00ffffff00ff, %l2 = 00000000000000ff | |
16474 | ldxa [%i5+0x008]%asi,%l2 ! %l2 = ffff00ffffff00ff | |
16475 | ! Mem[0000000010181424] = ff0000ff, %l5 = 00000000ffffffff | |
16476 | ldsba [%i6+0x024]%asi,%l5 ! %l5 = ffffffffffffffff | |
16477 | ! Mem[00000000100c1400] = 00000000, %l4 = 9ce0b68affff275e | |
16478 | ldsba [%i3+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
16479 | ! Mem[0000000010101408] = ff0000ff00000000, %f28 = ff00ffff ff0000ff | |
16480 | ldda [%i4+%o4]0x80,%f28 ! %f28 = ff0000ff 00000000 | |
16481 | ! Mem[0000000030181410] = 8e000000, %l7 = 00000000ffffff9c | |
16482 | lduha [%i6+%o5]0x81,%l7 ! %l7 = 0000000000008e00 | |
16483 | ! Mem[0000000030041408] = 00000000, %l5 = ffffffffffffffff | |
16484 | lduha [%i1+%o4]0x81,%l5 ! %l5 = 0000000000000000 | |
16485 | ! Mem[0000000030181400] = 000000ff, %l2 = ffff00ffffff00ff | |
16486 | lduha [%i6+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
16487 | ! Mem[00000000211c0000] = 00fffe0c, %l4 = 0000000000000000 | |
16488 | lduba [%o2+0x000]%asi,%l4 ! %l4 = 0000000000000000 | |
16489 | ! Mem[0000000030141410] = 0000005e, %l2 = 0000000000000000 | |
16490 | ldsha [%i5+%o5]0x81,%l2 ! %l2 = 0000000000000000 | |
16491 | ! Starting 10 instruction Store Burst | |
16492 | ! Mem[000000001010143c] = 0000ff00, %l6 = 00ffffff, %l7 = 00008e00 | |
16493 | add %i4,0x3c,%g1 | |
16494 | casa [%g1]0x80,%l6,%l7 ! %l7 = 000000000000ff00 | |
16495 | ||
16496 | p0_label_384: | |
16497 | ! %f19 = ff0000ff, Mem[000000001010141c] = ff000000 | |
16498 | sta %f19,[%i4+0x01c]%asi ! Mem[000000001010141c] = ff0000ff | |
16499 | ! %f2 = 9cffffff ff0000ff, %l2 = 0000000000000000 | |
16500 | ! Mem[0000000010141438] = ffff275effffffff | |
16501 | add %i5,0x038,%g1 | |
16502 | stda %f2,[%g1+%l2]ASI_PST32_P ! Mem[0000000010141438] = ffff275effffffff | |
16503 | ! %l3 = 0000000000000000, Mem[0000000010001410] = ffff0000 | |
16504 | stba %l3,[%i0+%o5]0x88 ! Mem[0000000010001410] = ffff0000 | |
16505 | ! %l1 = ffffffffffffffff, Mem[0000000010001414] = 00000000, %asi = 80 | |
16506 | stha %l1,[%i0+0x014]%asi ! Mem[0000000010001414] = ffff0000 | |
16507 | ! %f18 = 00000000 ff0000ff, Mem[0000000030041410] = ff00008a ff000000 | |
16508 | stda %f18,[%i1+%o5]0x89 ! Mem[0000000030041410] = 00000000 ff0000ff | |
16509 | ! %f13 = 0000ffff, Mem[0000000030041410] = ff0000ff | |
16510 | sta %f13,[%i1+%o5]0x81 ! Mem[0000000030041410] = 0000ffff | |
16511 | ! Mem[0000000010101408] = ff0000ff, %l7 = 000000000000ff00 | |
16512 | ldstuba [%i4+%o4]0x88,%l7 ! %l7 = 000000ff000000ff | |
16513 | ! Mem[0000000030181410] = 8e000000, %l7 = 00000000000000ff | |
16514 | swapa [%i6+%o5]0x81,%l7 ! %l7 = 000000008e000000 | |
16515 | ! %f28 = ff0000ff 00000000, Mem[0000000010141400] = 00000000 00000000 | |
16516 | stda %f28,[%i5+%g0]0x80 ! Mem[0000000010141400] = ff0000ff 00000000 | |
16517 | ! Starting 10 instruction Load Burst | |
16518 | ! Mem[0000000010101408] = ff0000ff00000000, %l3 = 0000000000000000 | |
16519 | ldx [%i4+%o4],%l3 ! %l3 = ff0000ff00000000 | |
16520 | ||
16521 | p0_label_385: | |
16522 | ! Mem[00000000100c1410] = 0000ffff, %l0 = 000000000000008a | |
16523 | ldswa [%i3+%o5]0x88,%l0 ! %l0 = 000000000000ffff | |
16524 | ! Mem[0000000030001410] = 0000ff8a, %l1 = ffffffffffffffff | |
16525 | lduha [%i0+%o5]0x89,%l1 ! %l1 = 000000000000ff8a | |
16526 | ! Mem[0000000010101408] = ff0000ff, %l4 = 0000000000000000 | |
16527 | lduba [%i4+%o4]0x80,%l4 ! %l4 = 00000000000000ff | |
16528 | ! Mem[0000000030181408] = ff0000ff, %l1 = 000000000000ff8a | |
16529 | lduba [%i6+%o4]0x81,%l1 ! %l1 = 00000000000000ff | |
16530 | ! Mem[0000000010041400] = 00000000 00000000, %l4 = 000000ff, %l5 = 00000000 | |
16531 | ldda [%i1+%g0]0x80,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
16532 | ! Mem[0000000030181410] = ff000000 ff000000, %l0 = 0000ffff, %l1 = 000000ff | |
16533 | ldda [%i6+%o5]0x89,%l0 ! %l0 = 00000000ff000000 00000000ff000000 | |
16534 | ! Mem[0000000030101410] = 9ce0b68aff0000ff, %l0 = 00000000ff000000 | |
16535 | ldxa [%i4+%o5]0x89,%l0 ! %l0 = 9ce0b68aff0000ff | |
16536 | ! Mem[0000000010101428] = 000000ff, %l4 = 0000000000000000 | |
16537 | ldsw [%i4+0x028],%l4 ! %l4 = 00000000000000ff | |
16538 | ! Mem[0000000010001400] = ff000000, %l1 = 00000000ff000000 | |
16539 | ldswa [%i0+%g0]0x88,%l1 ! %l1 = ffffffffff000000 | |
16540 | ! Starting 10 instruction Store Burst | |
16541 | ! %l6 = 0000000000ffffff, Mem[0000000010001408] = ff00b68a | |
16542 | stwa %l6,[%i0+%o4]0x88 ! Mem[0000000010001408] = 00ffffff | |
16543 | ||
16544 | ! Check Point 77 for processor 0 | |
16545 | ||
16546 | set p0_check_pt_data_77,%g4 | |
16547 | rd %ccr,%g5 ! %g5 = 44 | |
16548 | ldx [%g4+0x08],%g2 | |
16549 | cmp %l0,%g2 ! %l0 = 9ce0b68aff0000ff | |
16550 | bne %xcc,p0_reg_check_fail0 | |
16551 | mov 0xee0,%g1 | |
16552 | ldx [%g4+0x10],%g2 | |
16553 | cmp %l1,%g2 ! %l1 = ffffffffff000000 | |
16554 | bne %xcc,p0_reg_check_fail1 | |
16555 | mov 0xee1,%g1 | |
16556 | ldx [%g4+0x18],%g2 | |
16557 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
16558 | bne %xcc,p0_reg_check_fail2 | |
16559 | mov 0xee2,%g1 | |
16560 | ldx [%g4+0x20],%g2 | |
16561 | cmp %l3,%g2 ! %l3 = ff0000ff00000000 | |
16562 | bne %xcc,p0_reg_check_fail3 | |
16563 | mov 0xee3,%g1 | |
16564 | ldx [%g4+0x28],%g2 | |
16565 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
16566 | bne %xcc,p0_reg_check_fail4 | |
16567 | mov 0xee4,%g1 | |
16568 | ldx [%g4+0x30],%g2 | |
16569 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
16570 | bne %xcc,p0_reg_check_fail5 | |
16571 | mov 0xee5,%g1 | |
16572 | ldx [%g4+0x38],%g2 | |
16573 | cmp %l7,%g2 ! %l7 = 000000008e000000 | |
16574 | bne %xcc,p0_reg_check_fail7 | |
16575 | mov 0xee7,%g1 | |
16576 | ldx [%g4+0x40],%g3 | |
16577 | std %f0,[%g4] | |
16578 | ldx [%g4],%g2 | |
16579 | cmp %g3,%g2 ! %f0 = ff0000ff ff0000ff | |
16580 | bne %xcc,p0_freg_check_fail | |
16581 | mov 0xf00,%g1 | |
16582 | ldx [%g4+0x48],%g3 | |
16583 | std %f4,[%g4] | |
16584 | ldx [%g4],%g2 | |
16585 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
16586 | bne %xcc,p0_freg_check_fail | |
16587 | mov 0xf04,%g1 | |
16588 | ldx [%g4+0x50],%g3 | |
16589 | std %f6,[%g4] | |
16590 | ldx [%g4],%g2 | |
16591 | cmp %g3,%g2 ! %f6 = ff0000ff 00ff00ff | |
16592 | bne %xcc,p0_freg_check_fail | |
16593 | mov 0xf06,%g1 | |
16594 | ldx [%g4+0x58],%g3 | |
16595 | std %f20,[%g4] | |
16596 | ldx [%g4],%g2 | |
16597 | cmp %g3,%g2 ! %f20 = 0000005e 0000ff8a | |
16598 | bne %xcc,p0_freg_check_fail | |
16599 | mov 0xf20,%g1 | |
16600 | ldx [%g4+0x60],%g3 | |
16601 | std %f22,[%g4] | |
16602 | ldx [%g4],%g2 | |
16603 | cmp %g3,%g2 ! %f22 = 00ff0000 00000000 | |
16604 | bne %xcc,p0_freg_check_fail | |
16605 | mov 0xf22,%g1 | |
16606 | ldx [%g4+0x68],%g3 | |
16607 | std %f28,[%g4] | |
16608 | ldx [%g4],%g2 | |
16609 | cmp %g3,%g2 ! %f28 = ff0000ff 00000000 | |
16610 | bne %xcc,p0_freg_check_fail | |
16611 | mov 0xf28,%g1 | |
16612 | ||
16613 | ! Check Point 77 completed | |
16614 | ||
16615 | ||
16616 | p0_label_386: | |
16617 | ! %l4 = 00000000000000ff, Mem[0000000030001408] = ffffffff | |
16618 | stwa %l4,[%i0+%o4]0x81 ! Mem[0000000030001408] = 000000ff | |
16619 | ! %f22 = 00ff0000 00000000, %l1 = ffffffffff000000 | |
16620 | ! Mem[00000000100c1430] = ff0000ffffff00ff | |
16621 | add %i3,0x030,%g1 | |
16622 | stda %f22,[%g1+%l1]ASI_PST8_P ! Mem[00000000100c1430] = ff0000ffffff00ff | |
16623 | ! %l2 = 0000000000000000, Mem[0000000030181410] = ff000000 | |
16624 | stba %l2,[%i6+%o5]0x89 ! Mem[0000000030181410] = ff000000 | |
16625 | ! %l1 = ffffffffff000000, Mem[0000000021800100] = ffff39e7, %asi = 80 | |
16626 | stba %l1,[%o3+0x100]%asi ! Mem[0000000021800100] = 00ff39e7 | |
16627 | ! %l5 = 0000000000000000, Mem[00000000211c0000] = 00fffe0c, %asi = 80 | |
16628 | stha %l5,[%o2+0x000]%asi ! Mem[00000000211c0000] = 0000fe0c | |
16629 | ! %l2 = 0000000000000000, Mem[00000000300c1400] = ff0000ff | |
16630 | stba %l2,[%i3+%g0]0x89 ! Mem[00000000300c1400] = ff000000 | |
16631 | ! Mem[00000000300c1400] = 000000ff, %l4 = 00000000000000ff | |
16632 | swapa [%i3+%g0]0x81,%l4 ! %l4 = 00000000000000ff | |
16633 | ! Mem[0000000030081408] = 006b0000, %l3 = ff0000ff00000000 | |
16634 | ldstuba [%i2+%o4]0x81,%l3 ! %l3 = 00000000000000ff | |
16635 | ! Mem[0000000010001400] = ff000000, %l2 = 0000000000000000 | |
16636 | swapa [%i0+%g0]0x88,%l2 ! %l2 = 00000000ff000000 | |
16637 | ! Starting 10 instruction Load Burst | |
16638 | ! Mem[0000000030081400] = 0000ffff, %l2 = 00000000ff000000 | |
16639 | ldsba [%i2+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
16640 | ||
16641 | p0_label_387: | |
16642 | ! Mem[0000000010181400] = ffffffff 00000000, %l2 = 00000000, %l3 = 00000000 | |
16643 | ldda [%i6+%g0]0x80,%l2 ! %l2 = 00000000ffffffff 0000000000000000 | |
16644 | ! Mem[0000000010141408] = ff00ffff, %l5 = 0000000000000000 | |
16645 | ldswa [%i5+%o4]0x88,%l5 ! %l5 = ffffffffff00ffff | |
16646 | ! Mem[00000000300c1400] = ff000000, %l4 = 00000000000000ff | |
16647 | ldsha [%i3+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
16648 | ! Mem[0000000010181410] = ff0000ff, %l6 = 0000000000ffffff | |
16649 | ldsba [%i6+%o5]0x80,%l6 ! %l6 = ffffffffffffffff | |
16650 | ! Mem[0000000010101408] = ff0000ff, %f2 = 9cffffff | |
16651 | lda [%i4+%o4]0x80,%f2 ! %f2 = ff0000ff | |
16652 | ! Mem[0000000030181410] = 000000ff 000000ff, %l6 = ffffffff, %l7 = 8e000000 | |
16653 | ldda [%i6+%o5]0x81,%l6 ! %l6 = 00000000000000ff 00000000000000ff | |
16654 | ! Code Fragment 4 | |
16655 | p0_fragment_8: | |
16656 | ! %l0 = 9ce0b68aff0000ff | |
16657 | setx 0xf1e0ba97b932b5c0,%g7,%l0 ! %l0 = f1e0ba97b932b5c0 | |
16658 | ! %l1 = ffffffffff000000 | |
16659 | setx 0x6bb51a5fafde8278,%g7,%l1 ! %l1 = 6bb51a5fafde8278 | |
16660 | setx 0x7ff8, %g1, %g2 | |
16661 | and %l0, %g2, %l0 | |
16662 | setx 0xffffffff, %g1, %g2 | |
16663 | and %l1, %g2, %l1 | |
16664 | setx 0x100000000, %g1, %g2 | |
16665 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
16666 | ta T_CHANGE_HPRIV | |
16667 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
16668 | ta T_CHANGE_NONHPRIV | |
16669 | ! %l0 = f1e0ba97b932b5c0 | |
16670 | setx 0x06d90327988c3d94,%g7,%l0 ! %l0 = 06d90327988c3d94 | |
16671 | ! %l1 = 6bb51a5fafde8278 | |
16672 | setx 0xce3385d85beb5de2,%g7,%l1 ! %l1 = ce3385d85beb5de2 | |
16673 | ! Mem[0000000010141400] = ff0000ff, %l3 = 0000000000000000 | |
16674 | ldsba [%i5+%g0]0x80,%l3 ! %l3 = ffffffffffffffff | |
16675 | ! Mem[0000000010041400] = 00000000, %l5 = ffffffffff00ffff | |
16676 | lduha [%i1+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
16677 | ! Starting 10 instruction Store Burst | |
16678 | ! %f13 = 0000ffff, Mem[0000000030081410] = 00000000 | |
16679 | sta %f13,[%i2+%o5]0x81 ! Mem[0000000030081410] = 0000ffff | |
16680 | ||
16681 | p0_label_388: | |
16682 | ! %f28 = ff0000ff 00000000, %l2 = 00000000ffffffff | |
16683 | ! Mem[0000000010101418] = ff000000ff0000ff | |
16684 | add %i4,0x018,%g1 | |
16685 | stda %f28,[%g1+%l2]ASI_PST32_P ! Mem[0000000010101418] = ff0000ff00000000 | |
16686 | ! %l0 = 06d90327988c3d94, %l7 = 00000000000000ff, %l5 = 0000000000000000 | |
16687 | or %l0,%l7,%l5 ! %l5 = 06d90327988c3dff | |
16688 | ! %f30 = 000000ff 00000000, Mem[0000000030101410] = ff0000ff 9ce0b68a | |
16689 | stda %f30,[%i4+%o5]0x89 ! Mem[0000000030101410] = 000000ff 00000000 | |
16690 | ! %l7 = 00000000000000ff, Mem[0000000010041408] = 9cffffff | |
16691 | stwa %l7,[%i1+%o4]0x80 ! Mem[0000000010041408] = 000000ff | |
16692 | ! %l5 = 06d90327988c3dff, Mem[0000000010081400] = 9cffffff | |
16693 | stwa %l5,[%i2+%g0]0x88 ! Mem[0000000010081400] = 988c3dff | |
16694 | ! Mem[00000000218001c1] = 008afa38, %l6 = 00000000000000ff | |
16695 | ldstuba [%o3+0x1c1]%asi,%l6 ! %l6 = 0000008a000000ff | |
16696 | ! Mem[0000000030181400] = ff000000, %l3 = ffffffffffffffff | |
16697 | swapa [%i6+%g0]0x89,%l3 ! %l3 = 00000000ff000000 | |
16698 | ! %l6 = 000000000000008a, Mem[0000000030181400] = ffffffff | |
16699 | stba %l6,[%i6+%g0]0x89 ! Mem[0000000030181400] = ffffff8a | |
16700 | ! %f12 = 000000ff 0000ffff, Mem[0000000030101408] = 00000000 ffffff9c | |
16701 | stda %f12,[%i4+%o4]0x81 ! Mem[0000000030101408] = 000000ff 0000ffff | |
16702 | ! Starting 10 instruction Load Burst | |
16703 | ! %l2 = 00000000ffffffff, Mem[00000000211c0000] = 0000fe0c, %asi = 80 | |
16704 | stha %l2,[%o2+0x000]%asi ! Mem[00000000211c0000] = fffffe0c | |
16705 | ||
16706 | p0_label_389: | |
16707 | ! Mem[0000000030141408] = 00ff0000, %f9 = 00ffffff | |
16708 | lda [%i5+%o4]0x81,%f9 ! %f9 = 00ff0000 | |
16709 | ! Mem[0000000010181410] = ff000000ff0000ff, %f14 = 6b002202 006b0000 | |
16710 | ldda [%i6+%o5]0x88,%f14 ! %f14 = ff000000 ff0000ff | |
16711 | ! Mem[00000000100c1438] = ff00ffff, %f17 = 0000ff00 | |
16712 | ld [%i3+0x038],%f17 ! %f17 = ff00ffff | |
16713 | ! Mem[0000000010181410] = ff0000ff, %l6 = 000000000000008a | |
16714 | lduha [%i6+%o5]0x80,%l6 ! %l6 = 000000000000ff00 | |
16715 | ! Mem[0000000010081404] = 00ff0000, %l7 = 00000000000000ff | |
16716 | ldsb [%i2+0x007],%l7 ! %l7 = 0000000000000000 | |
16717 | ! Mem[0000000030141400] = 0000ff00, %l1 = ce3385d85beb5de2 | |
16718 | ldsba [%i5+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
16719 | ! Mem[00000000300c1410] = 5e000000, %l0 = 06d90327988c3d94 | |
16720 | ldsha [%i3+%o5]0x81,%l0 ! %l0 = 0000000000005e00 | |
16721 | ! Mem[00000000100c1414] = 00000000, %l5 = 06d90327988c3dff | |
16722 | lduh [%i3+0x016],%l5 ! %l5 = 0000000000000000 | |
16723 | ! Mem[0000000010001410] = 0000ffff, %l2 = 00000000ffffffff | |
16724 | lduwa [%i0+%o5]0x80,%l2 ! %l2 = 000000000000ffff | |
16725 | ! Starting 10 instruction Store Burst | |
16726 | ! %l4 = 0000000000000000, Mem[0000000030041400] = 00000000 | |
16727 | stha %l4,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00000000 | |
16728 | ||
16729 | p0_label_390: | |
16730 | ! %l2 = 000000000000ffff, Mem[00000000100c141c] = 00000000 | |
16731 | stw %l2,[%i3+0x01c] ! Mem[00000000100c141c] = 0000ffff | |
16732 | ! Mem[0000000010181430] = 000000ffff000000, %l2 = 000000000000ffff, %l4 = 0000000000000000 | |
16733 | add %i6,0x30,%g1 | |
16734 | casxa [%g1]0x80,%l2,%l4 ! %l4 = 000000ffff000000 | |
16735 | ! %f27 = 000027ff, Mem[0000000030141408] = 00ff0000 | |
16736 | sta %f27,[%i5+%o4]0x81 ! Mem[0000000030141408] = 000027ff | |
16737 | ! Mem[0000000010001404] = ffffffc4, %l2 = 000000000000ffff, %asi = 80 | |
16738 | swapa [%i0+0x004]%asi,%l2 ! %l2 = 00000000ffffffc4 | |
16739 | ! %l3 = 00000000ff000000, Mem[0000000010001410] = ffff0000 | |
16740 | stba %l3,[%i0+%o5]0x88 ! Mem[0000000010001410] = ffff0000 | |
16741 | ! Mem[0000000030181410] = 000000ff, %l4 = 000000ffff000000 | |
16742 | swapa [%i6+%o5]0x81,%l4 ! %l4 = 00000000000000ff | |
16743 | ! Mem[0000000030101410] = 00000000, %l5 = 0000000000000000 | |
16744 | swapa [%i4+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
16745 | ! Mem[00000000201c0000] = ffff1669, %l6 = 000000000000ff00 | |
16746 | ldstuba [%o0+0x000]%asi,%l6 ! %l6 = 000000ff000000ff | |
16747 | ! %l2 = 00000000ffffffc4, Mem[0000000030181400] = ffffff8a | |
16748 | stwa %l2,[%i6+%g0]0x89 ! Mem[0000000030181400] = ffffffc4 | |
16749 | ! Starting 10 instruction Load Burst | |
16750 | ! Mem[00000000300c1400] = ff000000, %l4 = 00000000000000ff | |
16751 | ldsha [%i3+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
16752 | ||
16753 | ! Check Point 78 for processor 0 | |
16754 | ||
16755 | set p0_check_pt_data_78,%g4 | |
16756 | rd %ccr,%g5 ! %g5 = 44 | |
16757 | ldx [%g4+0x08],%g2 | |
16758 | cmp %l0,%g2 ! %l0 = 0000000000005e00 | |
16759 | bne %xcc,p0_reg_check_fail0 | |
16760 | mov 0xee0,%g1 | |
16761 | ldx [%g4+0x10],%g2 | |
16762 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
16763 | bne %xcc,p0_reg_check_fail1 | |
16764 | mov 0xee1,%g1 | |
16765 | ldx [%g4+0x18],%g2 | |
16766 | cmp %l2,%g2 ! %l2 = 00000000ffffffc4 | |
16767 | bne %xcc,p0_reg_check_fail2 | |
16768 | mov 0xee2,%g1 | |
16769 | ldx [%g4+0x20],%g2 | |
16770 | cmp %l3,%g2 ! %l3 = 00000000ff000000 | |
16771 | bne %xcc,p0_reg_check_fail3 | |
16772 | mov 0xee3,%g1 | |
16773 | ldx [%g4+0x28],%g2 | |
16774 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
16775 | bne %xcc,p0_reg_check_fail4 | |
16776 | mov 0xee4,%g1 | |
16777 | ldx [%g4+0x30],%g2 | |
16778 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
16779 | bne %xcc,p0_reg_check_fail5 | |
16780 | mov 0xee5,%g1 | |
16781 | ldx [%g4+0x38],%g2 | |
16782 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
16783 | bne %xcc,p0_reg_check_fail6 | |
16784 | mov 0xee6,%g1 | |
16785 | ldx [%g4+0x40],%g2 | |
16786 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
16787 | bne %xcc,p0_reg_check_fail7 | |
16788 | mov 0xee7,%g1 | |
16789 | ldx [%g4+0x48],%g3 | |
16790 | std %f2,[%g4] | |
16791 | ldx [%g4],%g2 | |
16792 | cmp %g3,%g2 ! %f2 = ff0000ff ff0000ff | |
16793 | bne %xcc,p0_freg_check_fail | |
16794 | mov 0xf02,%g1 | |
16795 | ldx [%g4+0x50],%g3 | |
16796 | std %f6,[%g4] | |
16797 | ldx [%g4],%g2 | |
16798 | cmp %g3,%g2 ! %f6 = ff0000ff 00ff00ff | |
16799 | bne %xcc,p0_freg_check_fail | |
16800 | mov 0xf06,%g1 | |
16801 | ldx [%g4+0x58],%g3 | |
16802 | std %f8,[%g4] | |
16803 | ldx [%g4],%g2 | |
16804 | cmp %g3,%g2 ! %f8 = ff0000ff 00ff0000 | |
16805 | bne %xcc,p0_freg_check_fail | |
16806 | mov 0xf08,%g1 | |
16807 | ldx [%g4+0x60],%g3 | |
16808 | std %f14,[%g4] | |
16809 | ldx [%g4],%g2 | |
16810 | cmp %g3,%g2 ! %f14 = ff000000 ff0000ff | |
16811 | bne %xcc,p0_freg_check_fail | |
16812 | mov 0xf14,%g1 | |
16813 | ldx [%g4+0x68],%g3 | |
16814 | std %f16,[%g4] | |
16815 | ldx [%g4],%g2 | |
16816 | cmp %g3,%g2 ! %f16 = 5eff0000 ff00ffff | |
16817 | bne %xcc,p0_freg_check_fail | |
16818 | mov 0xf16,%g1 | |
16819 | ||
16820 | ! Check Point 78 completed | |
16821 | ||
16822 | ||
16823 | p0_label_391: | |
16824 | ! Mem[00000000100c1400] = 00000000, %l3 = 00000000ff000000 | |
16825 | ldsba [%i3+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
16826 | ! Mem[0000000010181410] = ff0000ff, %l2 = 00000000ffffffc4 | |
16827 | ldsha [%i6+%o5]0x80,%l2 ! %l2 = ffffffffffffff00 | |
16828 | ! Mem[0000000030081410] = 0000ffffff000000, %l3 = 0000000000000000 | |
16829 | ldxa [%i2+%o5]0x81,%l3 ! %l3 = 0000ffffff000000 | |
16830 | ! Mem[0000000010001408] = ffffff00, %l5 = 0000000000000000 | |
16831 | lduwa [%i0+%o4]0x80,%l5 ! %l5 = 00000000ffffff00 | |
16832 | ! Mem[0000000010141410] = 00ffffff, %l3 = 0000ffffff000000 | |
16833 | lduwa [%i5+%o5]0x88,%l3 ! %l3 = 0000000000ffffff | |
16834 | ! Mem[0000000030001400] = ffff000000000000, %l1 = 0000000000000000 | |
16835 | ldxa [%i0+%g0]0x89,%l1 ! %l1 = ffff000000000000 | |
16836 | ! Mem[0000000010041408] = ff000000, %l3 = 0000000000ffffff | |
16837 | ldsha [%i1+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
16838 | ! Mem[000000001000140c] = 00000000, %l1 = ffff000000000000 | |
16839 | ldsh [%i0+0x00c],%l1 ! %l1 = 0000000000000000 | |
16840 | ! Mem[00000000201c0000] = ffff1669, %l0 = 0000000000005e00 | |
16841 | ldub [%o0+%g0],%l0 ! %l0 = 00000000000000ff | |
16842 | ! Starting 10 instruction Store Burst | |
16843 | ! %l4 = 0000000000000000, Mem[0000000020800040] = ffff9ffa | |
16844 | sth %l4,[%o1+0x040] ! Mem[0000000020800040] = 00009ffa | |
16845 | ||
16846 | p0_label_392: | |
16847 | ! %l4 = 00000000, %l5 = ffffff00, Mem[0000000010181400] = ffffffff 00000000 | |
16848 | std %l4,[%i6+%g0] ! Mem[0000000010181400] = 00000000 ffffff00 | |
16849 | ! %l5 = 00000000ffffff00, Mem[0000000010041400] = 00000000 | |
16850 | stba %l5,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 | |
16851 | ! %f12 = 000000ff, Mem[0000000030041410] = 0000ffff | |
16852 | sta %f12,[%i1+%o5]0x81 ! Mem[0000000030041410] = 000000ff | |
16853 | ! %l0 = 000000ff, %l1 = 00000000, Mem[00000000300c1400] = 000000ff 000000ff | |
16854 | stda %l0,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 000000ff 00000000 | |
16855 | ! %l0 = 00000000000000ff, Mem[0000000010041418] = 000000009ce0b68a | |
16856 | stx %l0,[%i1+0x018] ! Mem[0000000010041418] = 00000000000000ff | |
16857 | ! %l0 = 00000000000000ff, Mem[0000000030141408] = 000027ff | |
16858 | stba %l0,[%i5+%o4]0x81 ! Mem[0000000030141408] = ff0027ff | |
16859 | ! %f10 = 000000ff 0000ffff, Mem[0000000010141428] = ffffffff 8ab60000 | |
16860 | std %f10,[%i5+0x028] ! Mem[0000000010141428] = 000000ff 0000ffff | |
16861 | ! %f12 = 000000ff, Mem[00000000100c1408] = ff0000ff | |
16862 | sta %f12,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 000000ff | |
16863 | ! Mem[0000000030081410] = ffff0000, %l7 = 0000000000000000 | |
16864 | ldstuba [%i2+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
16865 | ! Starting 10 instruction Load Burst | |
16866 | ! Mem[0000000010081434] = e0ffffff, %l3 = 0000000000000000 | |
16867 | lduh [%i2+0x034],%l3 ! %l3 = 000000000000e0ff | |
16868 | ||
16869 | p0_label_393: | |
16870 | ! Mem[0000000010081410] = 1a000000, %f29 = 00000000 | |
16871 | lda [%i2+%o5]0x88,%f29 ! %f29 = 1a000000 | |
16872 | ! Mem[00000000201c0000] = ffff1669, %l4 = 0000000000000000 | |
16873 | lduba [%o0+0x001]%asi,%l4 ! %l4 = 00000000000000ff | |
16874 | ! Mem[000000001000142c] = a3ffade0, %l1 = 0000000000000000 | |
16875 | lduh [%i0+0x02e],%l1 ! %l1 = 000000000000ade0 | |
16876 | ! Mem[0000000010141400] = ff0000ff00000000, %l7 = 0000000000000000 | |
16877 | ldxa [%i5+%g0]0x80,%l7 ! %l7 = ff0000ff00000000 | |
16878 | ! Mem[0000000030041400] = 00000000ff000000, %f26 = 0000005e 000027ff | |
16879 | ldda [%i1+%g0]0x81,%f26 ! %f26 = 00000000 ff000000 | |
16880 | ! Mem[0000000030001410] = 8aff0000 5e000000, %l2 = ffffff00, %l3 = 0000e0ff | |
16881 | ldda [%i0+%o5]0x81,%l2 ! %l2 = 000000008aff0000 000000005e000000 | |
16882 | ! Mem[0000000020800000] = 6b000db6, %l7 = ff0000ff00000000 | |
16883 | ldsh [%o1+%g0],%l7 ! %l7 = 0000000000006b00 | |
16884 | ! Mem[0000000030101400] = 00000000, %l7 = 0000000000006b00 | |
16885 | ldsba [%i4+%g0]0x81,%l7 ! %l7 = 0000000000000000 | |
16886 | ! Mem[0000000010181410] = ff0000ff, %l6 = 00000000000000ff | |
16887 | lduba [%i6+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
16888 | ! Starting 10 instruction Store Burst | |
16889 | ! Mem[0000000030081408] = 00006bff, %l3 = 000000005e000000 | |
16890 | swapa [%i2+%o4]0x89,%l3 ! %l3 = 0000000000006bff | |
16891 | ||
16892 | p0_label_394: | |
16893 | ! Mem[0000000030101400] = 00000000, %l3 = 0000000000006bff | |
16894 | ldstuba [%i4+%g0]0x89,%l3 ! %l3 = 00000000000000ff | |
16895 | ! %f18 = 00000000 ff0000ff, Mem[0000000030081408] = 5e000000 ff000000 | |
16896 | stda %f18,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000000 ff0000ff | |
16897 | ! Mem[0000000010081410] = 1a000000, %l6 = 00000000000000ff | |
16898 | swapa [%i2+%o5]0x88,%l6 ! %l6 = 000000001a000000 | |
16899 | ! %l0 = 000000ff, %l1 = 0000ade0, Mem[0000000010101408] = ff0000ff 00000000 | |
16900 | stda %l0,[%i4+%o4]0x88 ! Mem[0000000010101408] = 000000ff 0000ade0 | |
16901 | ! %l0 = 00000000000000ff, Mem[000000001010143a] = 00000000, %asi = 80 | |
16902 | stba %l0,[%i4+0x03a]%asi ! Mem[0000000010101438] = 0000ff00 | |
16903 | ! %l6 = 000000001a000000, Mem[0000000010081400] = ff3d8c98 | |
16904 | stba %l6,[%i2+%g0]0x80 ! Mem[0000000010081400] = 003d8c98 | |
16905 | ! Mem[0000000010141421] = 9ce0b68a, %l5 = 00000000ffffff00 | |
16906 | ldstub [%i5+0x021],%l5 ! %l5 = 000000e0000000ff | |
16907 | ! %l7 = 0000000000000000, Mem[00000000100c1408] = 000000ff | |
16908 | stha %l7,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000 | |
16909 | ! %l1 = 000000000000ade0, Mem[0000000030041410] = ff000000 | |
16910 | stha %l1,[%i1+%o5]0x89 ! Mem[0000000030041410] = ff00ade0 | |
16911 | ! Starting 10 instruction Load Burst | |
16912 | ! Mem[0000000030041410] = e0ad00ff, %l5 = 00000000000000e0 | |
16913 | lduwa [%i1+%o5]0x81,%l5 ! %l5 = 00000000e0ad00ff | |
16914 | ||
16915 | p0_label_395: | |
16916 | ! Mem[0000000010041400] = 00000000, %f17 = ff00ffff | |
16917 | lda [%i1+%g0]0x80,%f17 ! %f17 = 00000000 | |
16918 | ! Mem[0000000010101410] = 000000ff, %l4 = 00000000000000ff | |
16919 | lduba [%i4+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
16920 | ! Mem[0000000020800000] = 6b000db6, %l4 = 00000000000000ff | |
16921 | ldsha [%o1+0x000]%asi,%l4 ! %l4 = 0000000000006b00 | |
16922 | ! Mem[0000000010001408] = ffffff00, %f13 = 0000ffff | |
16923 | lda [%i0+%o4]0x80,%f13 ! %f13 = ffffff00 | |
16924 | ! Mem[0000000030141400] = 00ff0000, %l5 = 00000000e0ad00ff | |
16925 | ldsha [%i5+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
16926 | ! Mem[0000000030081400] = ffff0000, %l5 = 00000000000000ff | |
16927 | ldsba [%i2+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
16928 | ! Mem[0000000010141410] = ffffff00, %l1 = 000000000000ade0 | |
16929 | lduw [%i5+%o5],%l1 ! %l1 = 00000000ffffff00 | |
16930 | ! Mem[000000001014142c] = 0000ffff, %l6 = 000000001a000000 | |
16931 | lduba [%i5+0x02c]%asi,%l6 ! %l6 = 0000000000000000 | |
16932 | ! Mem[0000000030081408] = ff0000ff, %l5 = 0000000000000000 | |
16933 | ldswa [%i2+%o4]0x89,%l5 ! %l5 = ffffffffff0000ff | |
16934 | ! Starting 10 instruction Store Burst | |
16935 | ! Mem[000000001010141e] = 00000000, %l1 = 00000000ffffff00 | |
16936 | ldstuba [%i4+0x01e]%asi,%l1 ! %l1 = 00000000000000ff | |
16937 | ||
16938 | ! Check Point 79 for processor 0 | |
16939 | ||
16940 | set p0_check_pt_data_79,%g4 | |
16941 | rd %ccr,%g5 ! %g5 = 44 | |
16942 | ldx [%g4+0x08],%g2 | |
16943 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
16944 | bne %xcc,p0_reg_check_fail0 | |
16945 | mov 0xee0,%g1 | |
16946 | ldx [%g4+0x10],%g2 | |
16947 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
16948 | bne %xcc,p0_reg_check_fail1 | |
16949 | mov 0xee1,%g1 | |
16950 | ldx [%g4+0x18],%g2 | |
16951 | cmp %l2,%g2 ! %l2 = 000000008aff0000 | |
16952 | bne %xcc,p0_reg_check_fail2 | |
16953 | mov 0xee2,%g1 | |
16954 | ldx [%g4+0x20],%g2 | |
16955 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
16956 | bne %xcc,p0_reg_check_fail3 | |
16957 | mov 0xee3,%g1 | |
16958 | ldx [%g4+0x28],%g2 | |
16959 | cmp %l4,%g2 ! %l4 = 0000000000006b00 | |
16960 | bne %xcc,p0_reg_check_fail4 | |
16961 | mov 0xee4,%g1 | |
16962 | ldx [%g4+0x30],%g2 | |
16963 | cmp %l5,%g2 ! %l5 = ffffffffff0000ff | |
16964 | bne %xcc,p0_reg_check_fail5 | |
16965 | mov 0xee5,%g1 | |
16966 | ldx [%g4+0x38],%g2 | |
16967 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
16968 | bne %xcc,p0_reg_check_fail6 | |
16969 | mov 0xee6,%g1 | |
16970 | ldx [%g4+0x40],%g2 | |
16971 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
16972 | bne %xcc,p0_reg_check_fail7 | |
16973 | mov 0xee7,%g1 | |
16974 | ldx [%g4+0x48],%g3 | |
16975 | std %f2,[%g4] | |
16976 | ldx [%g4],%g2 | |
16977 | cmp %g3,%g2 ! %f2 = ff0000ff ff0000ff | |
16978 | bne %xcc,p0_freg_check_fail | |
16979 | mov 0xf02,%g1 | |
16980 | ldx [%g4+0x50],%g3 | |
16981 | std %f12,[%g4] | |
16982 | ldx [%g4],%g2 | |
16983 | cmp %g3,%g2 ! %f12 = 000000ff ffffff00 | |
16984 | bne %xcc,p0_freg_check_fail | |
16985 | mov 0xf12,%g1 | |
16986 | ldx [%g4+0x58],%g3 | |
16987 | std %f16,[%g4] | |
16988 | ldx [%g4],%g2 | |
16989 | cmp %g3,%g2 ! %f16 = 5eff0000 00000000 | |
16990 | bne %xcc,p0_freg_check_fail | |
16991 | mov 0xf16,%g1 | |
16992 | ldx [%g4+0x60],%g3 | |
16993 | std %f26,[%g4] | |
16994 | ldx [%g4],%g2 | |
16995 | cmp %g3,%g2 ! %f26 = 00000000 ff000000 | |
16996 | bne %xcc,p0_freg_check_fail | |
16997 | mov 0xf26,%g1 | |
16998 | ldx [%g4+0x68],%g3 | |
16999 | std %f28,[%g4] | |
17000 | ldx [%g4],%g2 | |
17001 | cmp %g3,%g2 ! %f28 = ff0000ff 1a000000 | |
17002 | bne %xcc,p0_freg_check_fail | |
17003 | mov 0xf28,%g1 | |
17004 | ||
17005 | ! Check Point 79 completed | |
17006 | ||
17007 | ||
17008 | p0_label_396: | |
17009 | ! Mem[00000000201c0001] = ffff1669, %l0 = 00000000000000ff | |
17010 | ldstub [%o0+0x001],%l0 ! %l0 = 000000ff000000ff | |
17011 | ! Mem[0000000030141408] = ff0027ff, %l4 = 0000000000006b00 | |
17012 | ldstuba [%i5+%o4]0x81,%l4 ! %l4 = 000000ff000000ff | |
17013 | ! %l0 = 000000ff, %l1 = 00000000, Mem[0000000010141400] = ff0000ff 00000000 | |
17014 | stda %l0,[%i5+%g0]0x80 ! Mem[0000000010141400] = 000000ff 00000000 | |
17015 | ! Mem[00000000100c1410] = ffff0000, %l3 = 0000000000000000 | |
17016 | swapa [%i3+%o5]0x80,%l3 ! %l3 = 00000000ffff0000 | |
17017 | ! %l3 = 00000000ffff0000, Mem[0000000010101430] = 7a0000000000b68a | |
17018 | stx %l3,[%i4+0x030] ! Mem[0000000010101430] = 00000000ffff0000 | |
17019 | ! Mem[000000001000141d] = ff000000, %l5 = ffffffffff0000ff | |
17020 | ldstub [%i0+0x01d],%l5 ! %l5 = 00000000000000ff | |
17021 | ! %f0 = ff0000ff ff0000ff, %l2 = 000000008aff0000 | |
17022 | ! Mem[0000000030141420] = 925b1ad839aced3b | |
17023 | add %i5,0x020,%g1 | |
17024 | stda %f0,[%g1+%l2]ASI_PST32_SL ! Mem[0000000030141420] = 925b1ad839aced3b | |
17025 | ! %l6 = 0000000000000000, Mem[00000000300c1410] = 5e00000000ffffff | |
17026 | stxa %l6,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 0000000000000000 | |
17027 | ! Mem[0000000010081408] = 6b002202, %l0 = 00000000000000ff | |
17028 | ldsba [%i2+%o4]0x80,%l0 ! %l0 = 000000000000006b | |
17029 | ! Starting 10 instruction Load Burst | |
17030 | ! Mem[0000000021800000] = fff29a65, %l2 = 000000008aff0000 | |
17031 | ldsba [%o3+0x001]%asi,%l2 ! %l2 = fffffffffffffff2 | |
17032 | ||
17033 | p0_label_397: | |
17034 | ! Mem[00000000211c0000] = fffffe0c, %l2 = fffffffffffffff2 | |
17035 | ldsb [%o2+0x001],%l2 ! %l2 = ffffffffffffffff | |
17036 | ! Mem[0000000030081408] = ff0000ff, %l2 = ffffffffffffffff | |
17037 | ldsba [%i2+%o4]0x81,%l2 ! %l2 = ffffffffffffffff | |
17038 | ! Mem[0000000010041410] = 0000005e, %l6 = 0000000000000000 | |
17039 | lduba [%i1+%o5]0x88,%l6 ! %l6 = 000000000000005e | |
17040 | ! Mem[0000000010101400] = 00ff0000, %l6 = 000000000000005e | |
17041 | ldsha [%i4+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
17042 | ! Mem[0000000030041400] = 00000000, %l5 = 0000000000000000 | |
17043 | ldswa [%i1+%g0]0x81,%l5 ! %l5 = 0000000000000000 | |
17044 | ! Mem[0000000030101408] = ffff0000ff000000, %f24 = 00000000 00000000 | |
17045 | ldda [%i4+%o4]0x89,%f24 ! %f24 = ffff0000 ff000000 | |
17046 | ! Mem[0000000010181428] = 00ff0000, %l0 = 000000000000006b | |
17047 | ldub [%i6+0x02a],%l0 ! %l0 = 0000000000000000 | |
17048 | ! Mem[00000000100c1400] = 00000000 00000000, %l6 = 00000000, %l7 = 00000000 | |
17049 | ldda [%i3+0x000]%asi,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
17050 | ! Mem[000000001004142c] = ff000000, %l0 = 0000000000000000 | |
17051 | lduw [%i1+0x02c],%l0 ! %l0 = 00000000ff000000 | |
17052 | ! Starting 10 instruction Store Burst | |
17053 | ! %f11 = 0000ffff, Mem[0000000010001408] = ffffff00 | |
17054 | sta %f11,[%i0+%o4]0x80 ! Mem[0000000010001408] = 0000ffff | |
17055 | ||
17056 | p0_label_398: | |
17057 | ! %l2 = ffffffffffffffff, Mem[00000000100c1400] = 00000000 | |
17058 | stha %l2,[%i3+%g0]0x80 ! Mem[00000000100c1400] = ffff0000 | |
17059 | ! %l4 = 000000ff, %l5 = 00000000, Mem[0000000030041408] = 00000000 000000ff | |
17060 | stda %l4,[%i1+%o4]0x81 ! Mem[0000000030041408] = 000000ff 00000000 | |
17061 | ! %f0 = ff0000ff ff0000ff, %l1 = 0000000000000000 | |
17062 | ! Mem[0000000010141400] = 000000ff00000000 | |
17063 | stda %f0,[%i5+%l1]ASI_PST16_PL ! Mem[0000000010141400] = 000000ff00000000 | |
17064 | ! %f4 = 00000000, Mem[0000000010081420] = 032cff8e | |
17065 | sta %f4 ,[%i2+0x020]%asi ! Mem[0000000010081420] = 00000000 | |
17066 | ! %f17 = 00000000, Mem[00000000100c1408] = 00000000 | |
17067 | sta %f17,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000 | |
17068 | ! %l2 = ffffffffffffffff, Mem[0000000010181426] = ff0000ff, %asi = 80 | |
17069 | stha %l2,[%i6+0x026]%asi ! Mem[0000000010181424] = ff00ffff | |
17070 | ! %l2 = ffffffffffffffff, Mem[0000000030001410] = 8aff0000 | |
17071 | stha %l2,[%i0+%o5]0x81 ! Mem[0000000030001410] = ffff0000 | |
17072 | ! %l7 = 0000000000000000, Mem[0000000010041408] = 000000ff, %asi = 80 | |
17073 | stwa %l7,[%i1+0x008]%asi ! Mem[0000000010041408] = 00000000 | |
17074 | ! %l2 = ffffffffffffffff, Mem[0000000010181408] = 9cffffffffffffff | |
17075 | stx %l2,[%i6+%o4] ! Mem[0000000010181408] = ffffffffffffffff | |
17076 | ! Starting 10 instruction Load Burst | |
17077 | ! Mem[0000000010001410] = 0000ffff, %l7 = 0000000000000000 | |
17078 | lduba [%i0+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
17079 | ||
17080 | p0_label_399: | |
17081 | ! Mem[00000000201c0000] = ffff1669, %l6 = 0000000000000000 | |
17082 | lduh [%o0+%g0],%l6 ! %l6 = 000000000000ffff | |
17083 | ! Mem[0000000030001410] = 0000ffff, %l0 = 00000000ff000000 | |
17084 | lduwa [%i0+%o5]0x89,%l0 ! %l0 = 000000000000ffff | |
17085 | ! Mem[0000000010041400] = 00000000, %l3 = 00000000ffff0000 | |
17086 | lduba [%i1+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
17087 | ! Mem[0000000021800000] = fff29a65, %l6 = 000000000000ffff | |
17088 | lduh [%o3+%g0],%l6 ! %l6 = 000000000000fff2 | |
17089 | ! Mem[0000000030141400] = 0000ff00, %l0 = 000000000000ffff | |
17090 | ldswa [%i5+%g0]0x89,%l0 ! %l0 = 000000000000ff00 | |
17091 | ! Mem[0000000010181418] = 0000ffff00000000, %f22 = 00ff0000 00000000 | |
17092 | ldda [%i6+0x018]%asi,%f22 ! %f22 = 0000ffff 00000000 | |
17093 | ! Mem[00000000100c1410] = 00000000 00000000, %l4 = 000000ff, %l5 = 00000000 | |
17094 | ldda [%i3+0x010]%asi,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
17095 | ! Mem[0000000010001400] = 00000000, %f18 = 00000000 | |
17096 | lda [%i0+%g0]0x88,%f18 ! %f18 = 00000000 | |
17097 | ! Mem[0000000030001400] = 00000000, %l5 = 0000000000000000 | |
17098 | ldsha [%i0+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
17099 | ! Starting 10 instruction Store Burst | |
17100 | ! Mem[00000000100c1438] = ff00ffff, %l0 = 000000000000ff00, %asi = 80 | |
17101 | swapa [%i3+0x038]%asi,%l0 ! %l0 = 00000000ff00ffff | |
17102 | ||
17103 | p0_label_400: | |
17104 | ! %f14 = ff000000 ff0000ff, Mem[0000000010101408] = ff000000 e0ad0000 | |
17105 | stda %f14,[%i4+%o4]0x80 ! Mem[0000000010101408] = ff000000 ff0000ff | |
17106 | ! %f16 = 5eff0000 00000000, %l4 = 0000000000000000 | |
17107 | ! Mem[0000000010101438] = 0000ff000000ff00 | |
17108 | add %i4,0x038,%g1 | |
17109 | stda %f16,[%g1+%l4]ASI_PST16_PL ! Mem[0000000010101438] = 0000ff000000ff00 | |
17110 | ! %f8 = ff0000ff 00ff0000, Mem[0000000030041410] = ff00ade0 00000000 | |
17111 | stda %f8 ,[%i1+%o5]0x89 ! Mem[0000000030041410] = ff0000ff 00ff0000 | |
17112 | ! Mem[0000000030181400] = ffffffc4, %l1 = 0000000000000000 | |
17113 | swapa [%i6+%g0]0x89,%l1 ! %l1 = 00000000ffffffc4 | |
17114 | ! Mem[0000000010101410] = ff000000, %l5 = 0000000000000000 | |
17115 | swapa [%i4+%o5]0x80,%l5 ! %l5 = 00000000ff000000 | |
17116 | ! %l7 = 0000000000000000, Mem[0000000030141400] = 0000ff00 | |
17117 | stha %l7,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000 | |
17118 | ! %f30 = 000000ff 00000000, %l5 = 00000000ff000000 | |
17119 | ! Mem[0000000010141418] = 5e9e11576b6c2202 | |
17120 | add %i5,0x018,%g1 | |
17121 | stda %f30,[%g1+%l5]ASI_PST16_PL ! Mem[0000000010141418] = 5e9e11576b6c2202 | |
17122 | ! Mem[0000000020800040] = 00009ffa, %l6 = 000000000000fff2 | |
17123 | ldstuba [%o1+0x040]%asi,%l6 ! %l6 = 00000000000000ff | |
17124 | ! %l1 = 00000000ffffffc4, Mem[00000000201c0001] = ffff1669 | |
17125 | stb %l1,[%o0+0x001] ! Mem[00000000201c0000] = ffc41669 | |
17126 | ! Starting 10 instruction Load Burst | |
17127 | ! Mem[0000000010081400] = 988c3d00, %l6 = 0000000000000000 | |
17128 | lduba [%i2+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
17129 | ||
17130 | ! Check Point 80 for processor 0 | |
17131 | ||
17132 | set p0_check_pt_data_80,%g4 | |
17133 | rd %ccr,%g5 ! %g5 = 44 | |
17134 | ldx [%g4+0x08],%g2 | |
17135 | cmp %l0,%g2 ! %l0 = 00000000ff00ffff | |
17136 | bne %xcc,p0_reg_check_fail0 | |
17137 | mov 0xee0,%g1 | |
17138 | ldx [%g4+0x10],%g2 | |
17139 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
17140 | bne %xcc,p0_reg_check_fail2 | |
17141 | mov 0xee2,%g1 | |
17142 | ldx [%g4+0x18],%g2 | |
17143 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
17144 | bne %xcc,p0_reg_check_fail3 | |
17145 | mov 0xee3,%g1 | |
17146 | ldx [%g4+0x20],%g2 | |
17147 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
17148 | bne %xcc,p0_reg_check_fail4 | |
17149 | mov 0xee4,%g1 | |
17150 | ldx [%g4+0x28],%g2 | |
17151 | cmp %l5,%g2 ! %l5 = 00000000ff000000 | |
17152 | bne %xcc,p0_reg_check_fail5 | |
17153 | mov 0xee5,%g1 | |
17154 | ldx [%g4+0x30],%g2 | |
17155 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
17156 | bne %xcc,p0_reg_check_fail6 | |
17157 | mov 0xee6,%g1 | |
17158 | ldx [%g4+0x38],%g2 | |
17159 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
17160 | bne %xcc,p0_reg_check_fail7 | |
17161 | mov 0xee7,%g1 | |
17162 | ldx [%g4+0x40],%g3 | |
17163 | std %f4,[%g4] | |
17164 | ldx [%g4],%g2 | |
17165 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
17166 | bne %xcc,p0_freg_check_fail | |
17167 | mov 0xf04,%g1 | |
17168 | ldx [%g4+0x48],%g3 | |
17169 | std %f6,[%g4] | |
17170 | ldx [%g4],%g2 | |
17171 | cmp %g3,%g2 ! %f6 = ff0000ff 00ff00ff | |
17172 | bne %xcc,p0_freg_check_fail | |
17173 | mov 0xf06,%g1 | |
17174 | ldx [%g4+0x50],%g3 | |
17175 | std %f18,[%g4] | |
17176 | ldx [%g4],%g2 | |
17177 | cmp %g3,%g2 ! %f18 = 00000000 ff0000ff | |
17178 | bne %xcc,p0_freg_check_fail | |
17179 | mov 0xf18,%g1 | |
17180 | ldx [%g4+0x58],%g3 | |
17181 | std %f22,[%g4] | |
17182 | ldx [%g4],%g2 | |
17183 | cmp %g3,%g2 ! %f22 = 0000ffff 00000000 | |
17184 | bne %xcc,p0_freg_check_fail | |
17185 | mov 0xf22,%g1 | |
17186 | ldx [%g4+0x60],%g3 | |
17187 | std %f24,[%g4] | |
17188 | ldx [%g4],%g2 | |
17189 | cmp %g3,%g2 ! %f24 = ffff0000 ff000000 | |
17190 | bne %xcc,p0_freg_check_fail | |
17191 | mov 0xf24,%g1 | |
17192 | ||
17193 | ! Check Point 80 completed | |
17194 | ||
17195 | ||
17196 | p0_label_401: | |
17197 | ! Mem[0000000010141408] = ff00ffff, %l0 = 00000000ff00ffff | |
17198 | ldsba [%i5+%o4]0x88,%l0 ! %l0 = ffffffffffffffff | |
17199 | ! Mem[0000000010181408] = ffffffff, %l6 = 0000000000000000 | |
17200 | ldswa [%i6+%o4]0x88,%l6 ! %l6 = ffffffffffffffff | |
17201 | ! Mem[00000000300c1408] = 0000000000ffffff, %l5 = 00000000ff000000 | |
17202 | ldxa [%i3+%o4]0x89,%l5 ! %l5 = 0000000000ffffff | |
17203 | ! Mem[0000000030181400] = 00000000, %l7 = 0000000000000000 | |
17204 | ldswa [%i6+%g0]0x81,%l7 ! %l7 = 0000000000000000 | |
17205 | ! Mem[0000000030181408] = 00000000 ff0000ff, %l0 = ffffffff, %l1 = ffffffc4 | |
17206 | ldda [%i6+%o4]0x89,%l0 ! %l0 = 00000000ff0000ff 0000000000000000 | |
17207 | ! Mem[0000000010081400] = 003d8c98, %l5 = 0000000000ffffff | |
17208 | ldsba [%i2+0x002]%asi,%l5 ! %l5 = ffffffffffffff8c | |
17209 | ! Mem[000000001000140c] = 00000000, %l6 = ffffffffffffffff | |
17210 | lduha [%i0+0x00e]%asi,%l6 ! %l6 = 0000000000000000 | |
17211 | ! Mem[0000000030001408] = 000000ff, %l1 = 0000000000000000 | |
17212 | ldswa [%i0+%o4]0x81,%l1 ! %l1 = 00000000000000ff | |
17213 | ! Mem[0000000010181410] = ff0000ff 000000ff, %l0 = ff0000ff, %l1 = 000000ff | |
17214 | ldda [%i6+%o5]0x80,%l0 ! %l0 = 00000000ff0000ff 00000000000000ff | |
17215 | ! Starting 10 instruction Store Burst | |
17216 | ! %l2 = ffffffffffffffff, Mem[0000000010141408] = ffff00ff | |
17217 | stwa %l2,[%i5+%o4]0x80 ! Mem[0000000010141408] = ffffffff | |
17218 | ||
17219 | p0_label_402: | |
17220 | ! %l5 = ffffffffffffff8c, Mem[0000000010081408] = 6b002202 | |
17221 | stba %l5,[%i2+%o4]0x80 ! Mem[0000000010081408] = 8c002202 | |
17222 | ! %l4 = 0000000000000000, Mem[0000000010001408] = ffff0000 | |
17223 | stba %l4,[%i0+%o4]0x88 ! Mem[0000000010001408] = ffff0000 | |
17224 | ! Mem[0000000010101400] = 0000ff00, %l1 = 00000000000000ff | |
17225 | swapa [%i4+%g0]0x80,%l1 ! %l1 = 000000000000ff00 | |
17226 | ! %f22 = 0000ffff 00000000, %l7 = 0000000000000000 | |
17227 | ! Mem[0000000010041428] = 00000000ff000000 | |
17228 | add %i1,0x028,%g1 | |
17229 | stda %f22,[%g1+%l7]ASI_PST32_P ! Mem[0000000010041428] = 00000000ff000000 | |
17230 | ! %l7 = 0000000000000000, Mem[00000000300c1400] = 000000ff | |
17231 | stwa %l7,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00000000 | |
17232 | ! Mem[00000000100c143b] = 0000ff00, %l7 = 0000000000000000 | |
17233 | ldstub [%i3+0x03b],%l7 ! %l7 = 00000000000000ff | |
17234 | ! %f14 = ff000000, Mem[0000000010101410] = 00000000 | |
17235 | sta %f14,[%i4+%o5]0x88 ! Mem[0000000010101410] = ff000000 | |
17236 | ! %l4 = 0000000000000000, Mem[0000000010141410] = ffffff0000000000 | |
17237 | stxa %l4,[%i5+%o5]0x80 ! Mem[0000000010141410] = 0000000000000000 | |
17238 | ! %f14 = ff000000 ff0000ff, %l2 = ffffffffffffffff | |
17239 | ! Mem[0000000010181400] = 00000000ffffff00 | |
17240 | stda %f14,[%i6+%l2]ASI_PST16_PL ! Mem[0000000010181400] = ff0000ff000000ff | |
17241 | ! Starting 10 instruction Load Burst | |
17242 | ! Mem[0000000030181408] = ff0000ff, %f16 = 5eff0000 | |
17243 | lda [%i6+%o4]0x89,%f16 ! %f16 = ff0000ff | |
17244 | ||
17245 | p0_label_403: | |
17246 | ! Mem[0000000010041420] = 032cffff, %l1 = 000000000000ff00 | |
17247 | lduha [%i1+0x020]%asi,%l1 ! %l1 = 000000000000032c | |
17248 | ! Mem[0000000030181408] = 00000000ff0000ff, %l3 = 0000000000000000 | |
17249 | ldxa [%i6+%o4]0x89,%l3 ! %l3 = 00000000ff0000ff | |
17250 | ! Mem[00000000211c0000] = fffffe0c, %l1 = 000000000000032c | |
17251 | lduh [%o2+%g0],%l1 ! %l1 = 000000000000ffff | |
17252 | ! Mem[0000000030101400] = 000000ff, %f15 = ff0000ff | |
17253 | lda [%i4+%g0]0x89,%f15 ! %f15 = 000000ff | |
17254 | ! Mem[0000000030141400] = 00000000, %l7 = 0000000000000000 | |
17255 | lduwa [%i5+%g0]0x81,%l7 ! %l7 = 0000000000000000 | |
17256 | ! Mem[0000000030181410] = 000000ff, %l4 = 0000000000000000 | |
17257 | lduha [%i6+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
17258 | ! Mem[0000000030001400] = ffff0000 00000000, %l4 = 000000ff, %l5 = ffffff8c | |
17259 | ldda [%i0+%g0]0x89,%l4 ! %l4 = 0000000000000000 00000000ffff0000 | |
17260 | ! Mem[0000000010041410] = 5e000000, %l1 = 000000000000ffff | |
17261 | ldswa [%i1+%o5]0x80,%l1 ! %l1 = 000000005e000000 | |
17262 | ! Mem[0000000030081410] = ffff00ff, %l0 = 00000000ff0000ff | |
17263 | ldsba [%i2+%o5]0x89,%l0 ! %l0 = ffffffffffffffff | |
17264 | ! Starting 10 instruction Store Burst | |
17265 | ! Mem[00000000100c1405] = 00000000, %l1 = 000000005e000000 | |
17266 | ldstuba [%i3+0x005]%asi,%l1 ! %l1 = 00000000000000ff | |
17267 | ||
17268 | p0_label_404: | |
17269 | ! Mem[0000000010141400] = 000000ff, %l6 = 0000000000000000 | |
17270 | swapa [%i5+%g0]0x80,%l6 ! %l6 = 00000000000000ff | |
17271 | ! %f12 = 000000ff ffffff00, %l4 = 0000000000000000 | |
17272 | ! Mem[0000000030181428] = 00000000a309ade0 | |
17273 | add %i6,0x028,%g1 | |
17274 | stda %f12,[%g1+%l4]ASI_PST8_SL ! Mem[0000000030181428] = 00000000a309ade0 | |
17275 | ! Mem[0000000030081410] = ffff00ff, %l0 = ffffffffffffffff | |
17276 | swapa [%i2+%o5]0x89,%l0 ! %l0 = 00000000ffff00ff | |
17277 | ! Mem[0000000030041400] = 00000000, %l0 = 00000000ffff00ff | |
17278 | swapa [%i1+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
17279 | ! Mem[0000000030041400] = ff00ffff, %l4 = 0000000000000000 | |
17280 | swapa [%i1+%g0]0x89,%l4 ! %l4 = 00000000ff00ffff | |
17281 | ! %f0 = ff0000ff ff0000ff ff0000ff ff0000ff | |
17282 | ! %f4 = 00000000 00000000 ff0000ff 00ff00ff | |
17283 | ! %f8 = ff0000ff 00ff0000 000000ff 0000ffff | |
17284 | ! %f12 = 000000ff ffffff00 ff000000 000000ff | |
17285 | stda %f0,[%i4]ASI_BLK_AIUP ! Block Store to 0000000010101400 | |
17286 | ! Mem[0000000010181408] = ffffffff, %l3 = 00000000ff0000ff | |
17287 | ldstuba [%i6+%o4]0x88,%l3 ! %l3 = 000000ff000000ff | |
17288 | ! %l7 = 0000000000000000, Mem[00000000300c1410] = 0000000000000000 | |
17289 | stxa %l7,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 0000000000000000 | |
17290 | ! %f30 = 000000ff 00000000, %l7 = 0000000000000000 | |
17291 | ! Mem[0000000010101418] = ff0000ff00ff00ff | |
17292 | add %i4,0x018,%g1 | |
17293 | stda %f30,[%g1+%l7]ASI_PST16_P ! Mem[0000000010101418] = ff0000ff00ff00ff | |
17294 | ! Starting 10 instruction Load Burst | |
17295 | ! Mem[0000000010181424] = ff00ffff, %l0 = 0000000000000000 | |
17296 | ldub [%i6+0x025],%l0 ! %l0 = 0000000000000000 | |
17297 | ||
17298 | p0_label_405: | |
17299 | ! Mem[0000000030141410] = 0000005e, %l3 = 00000000000000ff | |
17300 | lduha [%i5+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
17301 | ! Mem[0000000030081408] = ff0000ff00000000, %l6 = 00000000000000ff | |
17302 | ldxa [%i2+%o4]0x81,%l6 ! %l6 = ff0000ff00000000 | |
17303 | ! Mem[0000000010081410] = ff000000, %l5 = 00000000ffff0000 | |
17304 | lduba [%i2+%o5]0x80,%l5 ! %l5 = 00000000000000ff | |
17305 | ! Mem[0000000030001410] = 0000005e0000ffff, %l2 = ffffffffffffffff | |
17306 | ldxa [%i0+%o5]0x89,%l2 ! %l2 = 0000005e0000ffff | |
17307 | membar #Sync ! Added by membar checker (82) | |
17308 | ! Mem[0000000010101408] = ff0000ff, %l7 = 0000000000000000 | |
17309 | lduba [%i4+%o4]0x80,%l7 ! %l7 = 00000000000000ff | |
17310 | ! Mem[0000000010001424] = 000000ff, %f17 = 00000000 | |
17311 | ld [%i0+0x024],%f17 ! %f17 = 000000ff | |
17312 | ! Mem[0000000030141400] = 00000000, %f6 = ff0000ff | |
17313 | lda [%i5+%g0]0x89,%f6 ! %f6 = 00000000 | |
17314 | ! Mem[00000000300c1408] = ffffff0000000000, %l3 = 0000000000000000 | |
17315 | ldxa [%i3+%o4]0x81,%l3 ! %l3 = ffffff0000000000 | |
17316 | ! Mem[00000000100c142c] = 5e000000, %f22 = 0000ffff | |
17317 | ld [%i3+0x02c],%f22 ! %f22 = 5e000000 | |
17318 | ! Starting 10 instruction Store Burst | |
17319 | ! %l6 = ff0000ff00000000, Mem[0000000010001428] = 00000000, %asi = 80 | |
17320 | stwa %l6,[%i0+0x028]%asi ! Mem[0000000010001428] = 00000000 | |
17321 | ||
17322 | ! Check Point 81 for processor 0 | |
17323 | ||
17324 | set p0_check_pt_data_81,%g4 | |
17325 | rd %ccr,%g5 ! %g5 = 44 | |
17326 | ldx [%g4+0x08],%g2 | |
17327 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
17328 | bne %xcc,p0_reg_check_fail0 | |
17329 | mov 0xee0,%g1 | |
17330 | ldx [%g4+0x10],%g2 | |
17331 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
17332 | bne %xcc,p0_reg_check_fail1 | |
17333 | mov 0xee1,%g1 | |
17334 | ldx [%g4+0x18],%g2 | |
17335 | cmp %l2,%g2 ! %l2 = 0000005e0000ffff | |
17336 | bne %xcc,p0_reg_check_fail2 | |
17337 | mov 0xee2,%g1 | |
17338 | ldx [%g4+0x20],%g2 | |
17339 | cmp %l3,%g2 ! %l3 = ffffff0000000000 | |
17340 | bne %xcc,p0_reg_check_fail3 | |
17341 | mov 0xee3,%g1 | |
17342 | ldx [%g4+0x28],%g2 | |
17343 | cmp %l4,%g2 ! %l4 = 00000000ff00ffff | |
17344 | bne %xcc,p0_reg_check_fail4 | |
17345 | mov 0xee4,%g1 | |
17346 | ldx [%g4+0x30],%g2 | |
17347 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
17348 | bne %xcc,p0_reg_check_fail5 | |
17349 | mov 0xee5,%g1 | |
17350 | ldx [%g4+0x38],%g2 | |
17351 | cmp %l6,%g2 ! %l6 = ff0000ff00000000 | |
17352 | bne %xcc,p0_reg_check_fail6 | |
17353 | mov 0xee6,%g1 | |
17354 | ldx [%g4+0x40],%g2 | |
17355 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
17356 | bne %xcc,p0_reg_check_fail7 | |
17357 | mov 0xee7,%g1 | |
17358 | ldx [%g4+0x48],%g3 | |
17359 | std %f0,[%g4] | |
17360 | ldx [%g4],%g2 | |
17361 | cmp %g3,%g2 ! %f0 = ff0000ff ff0000ff | |
17362 | bne %xcc,p0_freg_check_fail | |
17363 | mov 0xf00,%g1 | |
17364 | ldx [%g4+0x50],%g3 | |
17365 | std %f4,[%g4] | |
17366 | ldx [%g4],%g2 | |
17367 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
17368 | bne %xcc,p0_freg_check_fail | |
17369 | mov 0xf04,%g1 | |
17370 | ldx [%g4+0x58],%g3 | |
17371 | std %f6,[%g4] | |
17372 | ldx [%g4],%g2 | |
17373 | cmp %g3,%g2 ! %f6 = 00000000 00ff00ff | |
17374 | bne %xcc,p0_freg_check_fail | |
17375 | mov 0xf06,%g1 | |
17376 | ldx [%g4+0x60],%g3 | |
17377 | std %f14,[%g4] | |
17378 | ldx [%g4],%g2 | |
17379 | cmp %g3,%g2 ! %f14 = ff000000 000000ff | |
17380 | bne %xcc,p0_freg_check_fail | |
17381 | mov 0xf14,%g1 | |
17382 | ldx [%g4+0x68],%g3 | |
17383 | std %f16,[%g4] | |
17384 | ldx [%g4],%g2 | |
17385 | cmp %g3,%g2 ! %f16 = ff0000ff 000000ff | |
17386 | bne %xcc,p0_freg_check_fail | |
17387 | mov 0xf16,%g1 | |
17388 | ldx [%g4+0x70],%g3 | |
17389 | std %f22,[%g4] | |
17390 | ldx [%g4],%g2 | |
17391 | cmp %g3,%g2 ! %f22 = 5e000000 00000000 | |
17392 | bne %xcc,p0_freg_check_fail | |
17393 | mov 0xf22,%g1 | |
17394 | ||
17395 | ! Check Point 81 completed | |
17396 | ||
17397 | ||
17398 | p0_label_406: | |
17399 | ! Mem[0000000010001408] = 0000ffff, %l5 = 00000000000000ff | |
17400 | swapa [%i0+%o4]0x80,%l5 ! %l5 = 000000000000ffff | |
17401 | ! Mem[0000000010101408] = ff0000ff, %l7 = 00000000000000ff | |
17402 | ldstuba [%i4+%o4]0x80,%l7 ! %l7 = 000000ff000000ff | |
17403 | ! %f10 = 000000ff, Mem[0000000010001410] = ffff0000 | |
17404 | sta %f10,[%i0+%o5]0x88 ! Mem[0000000010001410] = 000000ff | |
17405 | ! %f12 = 000000ff ffffff00, Mem[00000000300c1400] = 00000000 00000000 | |
17406 | stda %f12,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 000000ff ffffff00 | |
17407 | ! %l5 = 000000000000ffff, Mem[00000000100c1400] = ffff0000 | |
17408 | stwa %l5,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 0000ffff | |
17409 | ! Mem[0000000010081410] = 000000ff, %l4 = 00000000ff00ffff | |
17410 | swapa [%i2+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
17411 | ! %l7 = 00000000000000ff, Mem[0000000010001408] = ff000000 | |
17412 | stwa %l7,[%i0+%o4]0x88 ! Mem[0000000010001408] = 000000ff | |
17413 | ! %l7 = 00000000000000ff, Mem[00000000100c1410] = 0000000000000000 | |
17414 | stxa %l7,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 00000000000000ff | |
17415 | ! Mem[0000000010181400] = ff0000ff, %l3 = ffffff0000000000 | |
17416 | ldstuba [%i6+%g0]0x88,%l3 ! %l3 = 000000ff000000ff | |
17417 | ! Starting 10 instruction Load Burst | |
17418 | ! Mem[00000000300c1400] = 000000ffffffff00, %f30 = 000000ff 00000000 | |
17419 | ldda [%i3+%g0]0x89,%f30 ! %f30 = 000000ff ffffff00 | |
17420 | ||
17421 | p0_label_407: | |
17422 | ! Mem[0000000030101408] = 000000ff, %l3 = 00000000000000ff | |
17423 | lduba [%i4+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
17424 | ! Mem[0000000030141408] = ff2700ff, %l6 = ff0000ff00000000 | |
17425 | ldsba [%i5+%o4]0x89,%l6 ! %l6 = ffffffffffffffff | |
17426 | ! Mem[0000000010181438] = 000000000000007a, %f14 = ff000000 000000ff | |
17427 | ldd [%i6+0x038],%f14 ! %f14 = 00000000 0000007a | |
17428 | ! Mem[00000000201c0000] = ffc41669, %l0 = 0000000000000000 | |
17429 | lduba [%o0+0x001]%asi,%l0 ! %l0 = 00000000000000c4 | |
17430 | ! Mem[00000000100c1400] = 0000ffff00ff0000, %f16 = ff0000ff 000000ff | |
17431 | ldda [%i3+%g0]0x80,%f16 ! %f16 = 0000ffff 00ff0000 | |
17432 | ! Mem[0000000010041408] = 000000ff00000000, %l3 = 0000000000000000 | |
17433 | ldxa [%i1+%o4]0x88,%l3 ! %l3 = 000000ff00000000 | |
17434 | ! Mem[0000000021800140] = 0000f8a0, %l3 = 000000ff00000000 | |
17435 | ldsh [%o3+0x140],%l3 ! %l3 = 0000000000000000 | |
17436 | ! Mem[0000000030101400] = ff000000, %l4 = 00000000000000ff | |
17437 | ldsha [%i4+%g0]0x81,%l4 ! %l4 = ffffffffffffff00 | |
17438 | ! Mem[0000000010041410] = 00000000 0000005e, %l6 = ffffffff, %l7 = 000000ff | |
17439 | ldda [%i1+%o5]0x88,%l6 ! %l6 = 000000000000005e 0000000000000000 | |
17440 | ! Starting 10 instruction Store Burst | |
17441 | ! Mem[0000000030081408] = ff0000ff, %l2 = 0000005e0000ffff | |
17442 | swapa [%i2+%o4]0x89,%l2 ! %l2 = 00000000ff0000ff | |
17443 | ||
17444 | p0_label_408: | |
17445 | ! Mem[0000000021800000] = fff29a65, %l7 = 0000000000000000 | |
17446 | ldstub [%o3+%g0],%l7 ! %l7 = 000000ff000000ff | |
17447 | ! %f28 = ff0000ff 1a000000, Mem[0000000010141428] = 000000ff 0000ffff | |
17448 | stda %f28,[%i5+0x028]%asi ! Mem[0000000010141428] = ff0000ff 1a000000 | |
17449 | ! Mem[0000000010141411] = 00000000, %l4 = ffffffffffffff00 | |
17450 | ldstuba [%i5+0x011]%asi,%l4 ! %l4 = 00000000000000ff | |
17451 | ! %l2 = 00000000ff0000ff, Mem[0000000010141408] = ffffffff | |
17452 | stwa %l2,[%i5+%o4]0x80 ! Mem[0000000010141408] = ff0000ff | |
17453 | ! %f20 = 0000005e 0000ff8a, Mem[0000000010041410] = 5e000000 00000000 | |
17454 | stda %f20,[%i1+%o5]0x80 ! Mem[0000000010041410] = 0000005e 0000ff8a | |
17455 | ! %l2 = 00000000ff0000ff, Mem[0000000010041410] = 0000005e | |
17456 | stha %l2,[%i1+%o5]0x80 ! Mem[0000000010041410] = 00ff005e | |
17457 | ! Mem[0000000010101414] = 00000000, %l7 = 00000000000000ff | |
17458 | ldstuba [%i4+0x014]%asi,%l7 ! %l7 = 00000000000000ff | |
17459 | ! Mem[0000000030181410] = 000000ff, %l4 = 0000000000000000 | |
17460 | swapa [%i6+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
17461 | ! %l0 = 00000000000000c4, Mem[0000000010081410] = ff00ffff | |
17462 | stwa %l0,[%i2+%o5]0x88 ! Mem[0000000010081410] = 000000c4 | |
17463 | ! Starting 10 instruction Load Burst | |
17464 | ! Mem[0000000010001408] = 000000ff, %f5 = 00000000 | |
17465 | lda [%i0+%o4]0x88,%f5 ! %f5 = 000000ff | |
17466 | ||
17467 | p0_label_409: | |
17468 | ! Mem[00000000300c1408] = 00ffffff, %l5 = 000000000000ffff | |
17469 | ldsha [%i3+%o4]0x89,%l5 ! %l5 = ffffffffffffffff | |
17470 | ! Mem[0000000010001408] = ff000000, %l0 = 00000000000000c4 | |
17471 | lduh [%i0+0x00a],%l0 ! %l0 = 0000000000000000 | |
17472 | ! Mem[0000000010181410] = ff000000 ff0000ff, %l0 = 00000000, %l1 = 00000000 | |
17473 | ldda [%i6+%o5]0x88,%l0 ! %l0 = 00000000ff0000ff 00000000ff000000 | |
17474 | ! Mem[00000000100c1400] = ffff0000, %l2 = 00000000ff0000ff | |
17475 | ldswa [%i3+%g0]0x88,%l2 ! %l2 = ffffffffffff0000 | |
17476 | ! Mem[0000000010001408] = ff000000, %l3 = 0000000000000000 | |
17477 | lduha [%i0+%o4]0x80,%l3 ! %l3 = 000000000000ff00 | |
17478 | ! Mem[00000000100c1408] = 00000000, %l0 = 00000000ff0000ff | |
17479 | ldsba [%i3+%o4]0x80,%l0 ! %l0 = 0000000000000000 | |
17480 | ! Mem[00000000100c1420] = 0000000000000000, %l2 = ffffffffffff0000 | |
17481 | ldxa [%i3+0x020]%asi,%l2 ! %l2 = 0000000000000000 | |
17482 | ! Mem[0000000010181410] = ff0000ff, %f16 = 0000ffff | |
17483 | lda [%i6+%o5]0x80,%f16 ! %f16 = ff0000ff | |
17484 | ! Mem[0000000010081400] = 0000ff00988c3d00, %f6 = 00000000 00ff00ff | |
17485 | ldda [%i2+%g0]0x88,%f6 ! %f6 = 0000ff00 988c3d00 | |
17486 | ! Starting 10 instruction Store Burst | |
17487 | ! Mem[0000000030041400] = 00000000, %l2 = 0000000000000000 | |
17488 | ldstuba [%i1+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
17489 | ||
17490 | p0_label_410: | |
17491 | ! Mem[0000000010181410] = ff0000ff, %l0 = 0000000000000000 | |
17492 | swap [%i6+%o5],%l0 ! %l0 = 00000000ff0000ff | |
17493 | ! Mem[0000000010081428] = 000000ff00000000, %l7 = 0000000000000000, %l2 = 0000000000000000 | |
17494 | add %i2,0x28,%g1 | |
17495 | casxa [%g1]0x80,%l7,%l2 ! %l2 = 000000ff00000000 | |
17496 | ! %f24 = ffff0000 ff000000, Mem[0000000010081428] = 000000ff 00000000 | |
17497 | std %f24,[%i2+0x028] ! Mem[0000000010081428] = ffff0000 ff000000 | |
17498 | ! %f18 = 00000000 ff0000ff, %l3 = 000000000000ff00 | |
17499 | ! Mem[0000000030141410] = 0000005e032cff8e | |
17500 | add %i5,0x010,%g1 | |
17501 | stda %f18,[%g1+%l3]ASI_PST32_SL ! Mem[0000000030141410] = 0000005e032cff8e | |
17502 | ! %f0 = ff0000ff ff0000ff, Mem[0000000030081400] = 0000ffff ff000000 | |
17503 | stda %f0 ,[%i2+%g0]0x81 ! Mem[0000000030081400] = ff0000ff ff0000ff | |
17504 | ! Mem[0000000030101410] = 00000000, %l2 = 000000ff00000000 | |
17505 | ldstuba [%i4+%o5]0x89,%l2 ! %l2 = 00000000000000ff | |
17506 | ! Mem[0000000010181429] = 00ff0000, %l5 = ffffffffffffffff | |
17507 | ldstuba [%i6+0x029]%asi,%l5 ! %l5 = 000000ff000000ff | |
17508 | ! Mem[0000000030041408] = 000000ff, %l7 = 0000000000000000 | |
17509 | ldstuba [%i1+%o4]0x81,%l7 ! %l7 = 00000000000000ff | |
17510 | ! %f12 = 000000ff, Mem[0000000010001410] = 000000ff | |
17511 | sta %f12,[%i0+%o5]0x88 ! Mem[0000000010001410] = 000000ff | |
17512 | ! Starting 10 instruction Load Burst | |
17513 | ! Mem[0000000010141400] = 00000000, %l5 = 00000000000000ff | |
17514 | lduba [%i5+0x000]%asi,%l5 ! %l5 = 0000000000000000 | |
17515 | ||
17516 | ! Check Point 82 for processor 0 | |
17517 | ||
17518 | set p0_check_pt_data_82,%g4 | |
17519 | rd %ccr,%g5 ! %g5 = 44 | |
17520 | ldx [%g4+0x08],%g2 | |
17521 | cmp %l0,%g2 ! %l0 = 00000000ff0000ff | |
17522 | bne %xcc,p0_reg_check_fail0 | |
17523 | mov 0xee0,%g1 | |
17524 | ldx [%g4+0x10],%g2 | |
17525 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
17526 | bne %xcc,p0_reg_check_fail2 | |
17527 | mov 0xee2,%g1 | |
17528 | ldx [%g4+0x18],%g2 | |
17529 | cmp %l3,%g2 ! %l3 = 000000000000ff00 | |
17530 | bne %xcc,p0_reg_check_fail3 | |
17531 | mov 0xee3,%g1 | |
17532 | ldx [%g4+0x20],%g2 | |
17533 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
17534 | bne %xcc,p0_reg_check_fail4 | |
17535 | mov 0xee4,%g1 | |
17536 | ldx [%g4+0x28],%g2 | |
17537 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
17538 | bne %xcc,p0_reg_check_fail5 | |
17539 | mov 0xee5,%g1 | |
17540 | ldx [%g4+0x30],%g2 | |
17541 | cmp %l6,%g2 ! %l6 = 000000000000005e | |
17542 | bne %xcc,p0_reg_check_fail6 | |
17543 | mov 0xee6,%g1 | |
17544 | ldx [%g4+0x38],%g2 | |
17545 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
17546 | bne %xcc,p0_reg_check_fail7 | |
17547 | mov 0xee7,%g1 | |
17548 | ldx [%g4+0x40],%g3 | |
17549 | std %f0,[%g4] | |
17550 | ldx [%g4],%g2 | |
17551 | cmp %g3,%g2 ! %f0 = ff0000ff ff0000ff | |
17552 | bne %xcc,p0_freg_check_fail | |
17553 | mov 0xf00,%g1 | |
17554 | ldx [%g4+0x48],%g3 | |
17555 | std %f4,[%g4] | |
17556 | ldx [%g4],%g2 | |
17557 | cmp %g3,%g2 ! %f4 = 00000000 000000ff | |
17558 | bne %xcc,p0_freg_check_fail | |
17559 | mov 0xf04,%g1 | |
17560 | ldx [%g4+0x50],%g3 | |
17561 | std %f6,[%g4] | |
17562 | ldx [%g4],%g2 | |
17563 | cmp %g3,%g2 ! %f6 = 0000ff00 988c3d00 | |
17564 | bne %xcc,p0_freg_check_fail | |
17565 | mov 0xf06,%g1 | |
17566 | ldx [%g4+0x58],%g3 | |
17567 | std %f14,[%g4] | |
17568 | ldx [%g4],%g2 | |
17569 | cmp %g3,%g2 ! %f14 = 00000000 0000007a | |
17570 | bne %xcc,p0_freg_check_fail | |
17571 | mov 0xf14,%g1 | |
17572 | ldx [%g4+0x60],%g3 | |
17573 | std %f16,[%g4] | |
17574 | ldx [%g4],%g2 | |
17575 | cmp %g3,%g2 ! %f16 = ff0000ff 00ff0000 | |
17576 | bne %xcc,p0_freg_check_fail | |
17577 | mov 0xf16,%g1 | |
17578 | ldx [%g4+0x68],%g3 | |
17579 | std %f30,[%g4] | |
17580 | ldx [%g4],%g2 | |
17581 | cmp %g3,%g2 ! %f30 = 000000ff ffffff00 | |
17582 | bne %xcc,p0_freg_check_fail | |
17583 | mov 0xf30,%g1 | |
17584 | ||
17585 | ! Check Point 82 completed | |
17586 | ||
17587 | ||
17588 | p0_label_411: | |
17589 | ! Mem[0000000010101404] = ff0000ff, %f10 = 000000ff | |
17590 | ld [%i4+0x004],%f10 ! %f10 = ff0000ff | |
17591 | ! Mem[00000000100c1434] = ffff00ff, %f27 = ff000000 | |
17592 | ld [%i3+0x034],%f27 ! %f27 = ffff00ff | |
17593 | ! Mem[0000000010181400] = ff0000ff, %l4 = 00000000000000ff | |
17594 | ldswa [%i6+%g0]0x80,%l4 ! %l4 = ffffffffff0000ff | |
17595 | ! Mem[0000000010101420] = ff0000ff, %l1 = 00000000ff000000 | |
17596 | ldswa [%i4+0x020]%asi,%l1 ! %l1 = ffffffffff0000ff | |
17597 | ! Mem[0000000010181408] = ffffffff, %l4 = ffffffffff0000ff | |
17598 | ldsba [%i6+%o4]0x80,%l4 ! %l4 = ffffffffffffffff | |
17599 | ! Mem[00000000100c1408] = 00000000, %l2 = 0000000000000000 | |
17600 | ldswa [%i3+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
17601 | ! Mem[0000000010181434] = ff000000, %l6 = 000000000000005e | |
17602 | lduba [%i6+0x034]%asi,%l6 ! %l6 = 00000000000000ff | |
17603 | ! Mem[0000000010101400] = ff0000ff, %l4 = ffffffffffffffff | |
17604 | lduha [%i4+%g0]0x80,%l4 ! %l4 = 000000000000ff00 | |
17605 | ! Mem[0000000030041408] = ff0000ff, %l2 = 0000000000000000 | |
17606 | ldswa [%i1+%o4]0x81,%l2 ! %l2 = ffffffffff0000ff | |
17607 | ! Starting 10 instruction Store Burst | |
17608 | ! %f24 = ffff0000 ff000000, %l7 = 0000000000000000 | |
17609 | ! Mem[0000000010181410] = 00000000000000ff | |
17610 | add %i6,0x010,%g1 | |
17611 | stda %f24,[%g1+%l7]ASI_PST8_PL ! Mem[0000000010181410] = 00000000000000ff | |
17612 | ||
17613 | p0_label_412: | |
17614 | ! %l7 = 0000000000000000, Mem[0000000030101408] = 000000ff | |
17615 | stba %l7,[%i4+%o4]0x81 ! Mem[0000000030101408] = 000000ff | |
17616 | ! %l0 = 00000000ff0000ff, Mem[0000000010041408] = 00000000 | |
17617 | stha %l0,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00ff0000 | |
17618 | ! %l6 = 000000ff, %l7 = 00000000, Mem[00000000100c1400] = 0000ffff 00ff0000 | |
17619 | stda %l6,[%i3+0x000]%asi ! Mem[00000000100c1400] = 000000ff 00000000 | |
17620 | ! Mem[0000000010041410] = 00ff005e0000ff8a, %l5 = 0000000000000000, %l6 = 00000000000000ff | |
17621 | add %i1,0x10,%g1 | |
17622 | casxa [%g1]0x80,%l5,%l6 ! %l6 = 00ff005e0000ff8a | |
17623 | ! %f16 = ff0000ff 00ff0000 00000000 ff0000ff | |
17624 | ! %f20 = 0000005e 0000ff8a 5e000000 00000000 | |
17625 | ! %f24 = ffff0000 ff000000 00000000 ffff00ff | |
17626 | ! %f28 = ff0000ff 1a000000 000000ff ffffff00 | |
17627 | stda %f16,[%i6]ASI_BLK_SL ! Block Store to 0000000030181400 | |
17628 | ! %l7 = 0000000000000000, Mem[00000000100c1410] = ff000000 | |
17629 | stwa %l7,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 00000000 | |
17630 | ! %l2 = ff0000ff, %l3 = 0000ff00, Mem[0000000010101408] = ff0000ff ff0000ff | |
17631 | stda %l2,[%i4+%o4]0x88 ! Mem[0000000010101408] = ff0000ff 0000ff00 | |
17632 | ! %l7 = 0000000000000000, Mem[0000000030041408] = 00000000ff0000ff | |
17633 | stxa %l7,[%i1+%o4]0x89 ! Mem[0000000030041408] = 0000000000000000 | |
17634 | ! %l2 = ffffffffff0000ff, Mem[0000000010001416] = ffff0000, %asi = 80 | |
17635 | stha %l2,[%i0+0x016]%asi ! Mem[0000000010001414] = ffff00ff | |
17636 | ! Starting 10 instruction Load Burst | |
17637 | ! Mem[0000000010081408] = 0222008c, %l0 = 00000000ff0000ff | |
17638 | lduba [%i2+%o4]0x88,%l0 ! %l0 = 000000000000008c | |
17639 | ||
17640 | p0_label_413: | |
17641 | ! Mem[0000000010141400] = 00000000, %l7 = 0000000000000000 | |
17642 | ldsba [%i5+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
17643 | ! Mem[0000000010141410] = 00ff000000000000, %f4 = 00000000 000000ff | |
17644 | ldda [%i5+%o5]0x80,%f4 ! %f4 = 00ff0000 00000000 | |
17645 | ! Mem[0000000020800040] = ff009ffa, %l1 = ffffffffff0000ff | |
17646 | ldsb [%o1+0x040],%l1 ! %l1 = ffffffffffffffff | |
17647 | ! Mem[0000000010041400] = 00000000, %l7 = 0000000000000000 | |
17648 | lduha [%i1+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
17649 | ! Mem[00000000100c1400] = ff000000, %f13 = ffffff00 | |
17650 | lda [%i3+%g0]0x88,%f13 ! %f13 = ff000000 | |
17651 | ! Mem[0000000010081410] = c4000000, %l6 = 00ff005e0000ff8a | |
17652 | ldsba [%i2+%o5]0x80,%l6 ! %l6 = ffffffffffffffc4 | |
17653 | membar #Sync ! Added by membar checker (83) | |
17654 | ! Mem[0000000030181408] = ff0000ff00000000, %l1 = ffffffffffffffff | |
17655 | ldxa [%i6+%o4]0x81,%l1 ! %l1 = ff0000ff00000000 | |
17656 | ! Mem[0000000030141400] = 00000000 0000001a ff0027ff 0000005e | |
17657 | ! Mem[0000000030141410] = 0000005e 032cff8e 02226c6b 57119e5e | |
17658 | ! Mem[0000000030141420] = 925b1ad8 39aced3b 64479a75 bb9180c7 | |
17659 | ! Mem[0000000030141430] = ffffffff 365fc6fa ffffffff 000000ff | |
17660 | ldda [%i5]ASI_BLK_AIUS,%f0 ! Block Load from 0000000030141400 | |
17661 | ! Mem[0000000030001408] = ff000000, %l3 = 000000000000ff00 | |
17662 | ldsba [%i0+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
17663 | ! Starting 10 instruction Store Burst | |
17664 | ! %f28 = ff0000ff 1a000000, %l0 = 000000000000008c | |
17665 | ! Mem[00000000100c1408] = 0000000000ff00ff | |
17666 | add %i3,0x008,%g1 | |
17667 | stda %f28,[%g1+%l0]ASI_PST8_P ! Mem[00000000100c1408] = ff0000001a0000ff | |
17668 | ||
17669 | p0_label_414: | |
17670 | ! Mem[0000000010181400] = ff0000ff, %l2 = ffffffffff0000ff | |
17671 | ldstuba [%i6+%g0]0x80,%l2 ! %l2 = 000000ff000000ff | |
17672 | ! %l6 = ffffffc4, %l7 = 00000000, Mem[0000000010141408] = ff0000ff ff00ffff | |
17673 | stda %l6,[%i5+%o4]0x88 ! Mem[0000000010141408] = ffffffc4 00000000 | |
17674 | membar #Sync ! Added by membar checker (84) | |
17675 | ! %f18 = 00000000 ff0000ff, Mem[0000000030141410] = 0000005e 032cff8e | |
17676 | stda %f18,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 ff0000ff | |
17677 | ! %f20 = 0000005e, Mem[00000000300c1400] = ffffff00 | |
17678 | sta %f20,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 0000005e | |
17679 | ! %f5 = 032cff8e, Mem[0000000010101408] = ff0000ff | |
17680 | sta %f5 ,[%i4+%o4]0x80 ! Mem[0000000010101408] = 032cff8e | |
17681 | ! %f6 = 02226c6b 57119e5e, Mem[0000000010101400] = ff0000ff ff0000ff | |
17682 | stda %f6 ,[%i4+%g0]0x80 ! Mem[0000000010101400] = 02226c6b 57119e5e | |
17683 | ! %l0 = 000000000000008c, Mem[0000000030181410] = 8aff0000 | |
17684 | stba %l0,[%i6+%o5]0x81 ! Mem[0000000030181410] = 8cff0000 | |
17685 | ! %f22 = 5e000000 00000000, Mem[0000000030141400] = 00000000 1a000000 | |
17686 | stda %f22,[%i5+%g0]0x89 ! Mem[0000000030141400] = 5e000000 00000000 | |
17687 | ! %f24 = ffff0000 ff000000, Mem[0000000030081408] = 0000ffff 00000000 | |
17688 | stda %f24,[%i2+%o4]0x89 ! Mem[0000000030081408] = ffff0000 ff000000 | |
17689 | ! Starting 10 instruction Load Burst | |
17690 | ! Mem[0000000010041410] = 5e00ff00, %f21 = 0000ff8a | |
17691 | lda [%i1+%o5]0x88,%f21 ! %f21 = 5e00ff00 | |
17692 | ||
17693 | p0_label_415: | |
17694 | ! Mem[000000001018142c] = ff000000, %l6 = ffffffffffffffc4 | |
17695 | lduha [%i6+0x02c]%asi,%l6 ! %l6 = 000000000000ff00 | |
17696 | ! Mem[0000000010001400] = 00000000, %l5 = 0000000000000000 | |
17697 | lduwa [%i0+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
17698 | ! Mem[00000000100c1410] = 00000000 00000000, %l0 = 0000008c, %l1 = 00000000 | |
17699 | ldda [%i3+%o5]0x80,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
17700 | membar #Sync ! Added by membar checker (85) | |
17701 | ! Mem[00000000300c1400] = 5e000000 ff000000 ffffff00 00000000 | |
17702 | ! Mem[00000000300c1410] = 00000000 00000000 b5238e48 1293fe50 | |
17703 | ! Mem[00000000300c1420] = 0000009c b100901c ff00ffe4 ffff00ff | |
17704 | ! Mem[00000000300c1430] = 5eff6960 ff9a0036 02226c6b 57119e5e | |
17705 | ldda [%i3]ASI_BLK_S,%f16 ! Block Load from 00000000300c1400 | |
17706 | ! Mem[0000000010041408] = 00ff0000, %l0 = 0000000000000000 | |
17707 | lduha [%i1+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
17708 | ! Mem[0000000030001400] = ffff000000000000, %f12 = ffffffff 365fc6fa | |
17709 | ldda [%i0+%g0]0x89,%f12 ! %f12 = ffff0000 00000000 | |
17710 | ! Mem[0000000030081408] = ff000000, %l1 = 0000000000000000 | |
17711 | ldswa [%i2+%o4]0x89,%l1 ! %l1 = ffffffffff000000 | |
17712 | ! Mem[0000000010001410] = ff000000, %l6 = 000000000000ff00 | |
17713 | lduwa [%i0+%o5]0x80,%l6 ! %l6 = 00000000ff000000 | |
17714 | ! Mem[00000000100c1400] = ff000000, %f4 = 0000005e | |
17715 | lda [%i3+%g0]0x88,%f4 ! %f4 = ff000000 | |
17716 | ! Starting 10 instruction Store Burst | |
17717 | ! Mem[0000000010001400] = 00000000, %l3 = 0000000000000000 | |
17718 | ldstuba [%i0+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
17719 | ||
17720 | ! Check Point 83 for processor 0 | |
17721 | ||
17722 | set p0_check_pt_data_83,%g4 | |
17723 | rd %ccr,%g5 ! %g5 = 44 | |
17724 | ldx [%g4+0x08],%g2 | |
17725 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
17726 | bne %xcc,p0_reg_check_fail0 | |
17727 | mov 0xee0,%g1 | |
17728 | ldx [%g4+0x10],%g2 | |
17729 | cmp %l1,%g2 ! %l1 = ffffffffff000000 | |
17730 | bne %xcc,p0_reg_check_fail1 | |
17731 | mov 0xee1,%g1 | |
17732 | ldx [%g4+0x18],%g2 | |
17733 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
17734 | bne %xcc,p0_reg_check_fail2 | |
17735 | mov 0xee2,%g1 | |
17736 | ldx [%g4+0x20],%g2 | |
17737 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
17738 | bne %xcc,p0_reg_check_fail3 | |
17739 | mov 0xee3,%g1 | |
17740 | ldx [%g4+0x28],%g2 | |
17741 | cmp %l4,%g2 ! %l4 = 000000000000ff00 | |
17742 | bne %xcc,p0_reg_check_fail4 | |
17743 | mov 0xee4,%g1 | |
17744 | ldx [%g4+0x30],%g2 | |
17745 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
17746 | bne %xcc,p0_reg_check_fail5 | |
17747 | mov 0xee5,%g1 | |
17748 | ldx [%g4+0x38],%g2 | |
17749 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
17750 | bne %xcc,p0_reg_check_fail6 | |
17751 | mov 0xee6,%g1 | |
17752 | ldx [%g4+0x40],%g2 | |
17753 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
17754 | bne %xcc,p0_reg_check_fail7 | |
17755 | mov 0xee7,%g1 | |
17756 | ldx [%g4+0x48],%g3 | |
17757 | std %f0,[%g4] | |
17758 | ldx [%g4],%g2 | |
17759 | cmp %g3,%g2 ! %f0 = 00000000 0000001a | |
17760 | bne %xcc,p0_freg_check_fail | |
17761 | mov 0xf00,%g1 | |
17762 | ldx [%g4+0x50],%g3 | |
17763 | std %f2,[%g4] | |
17764 | ldx [%g4],%g2 | |
17765 | cmp %g3,%g2 ! %f2 = ff0027ff 0000005e | |
17766 | bne %xcc,p0_freg_check_fail | |
17767 | mov 0xf02,%g1 | |
17768 | ldx [%g4+0x58],%g3 | |
17769 | std %f4,[%g4] | |
17770 | ldx [%g4],%g2 | |
17771 | cmp %g3,%g2 ! %f4 = ff000000 032cff8e | |
17772 | bne %xcc,p0_freg_check_fail | |
17773 | mov 0xf04,%g1 | |
17774 | ldx [%g4+0x60],%g3 | |
17775 | std %f6,[%g4] | |
17776 | ldx [%g4],%g2 | |
17777 | cmp %g3,%g2 ! %f6 = 02226c6b 57119e5e | |
17778 | bne %xcc,p0_freg_check_fail | |
17779 | mov 0xf06,%g1 | |
17780 | ldx [%g4+0x68],%g3 | |
17781 | std %f8,[%g4] | |
17782 | ldx [%g4],%g2 | |
17783 | cmp %g3,%g2 ! %f8 = 925b1ad8 39aced3b | |
17784 | bne %xcc,p0_freg_check_fail | |
17785 | mov 0xf08,%g1 | |
17786 | ldx [%g4+0x70],%g3 | |
17787 | std %f10,[%g4] | |
17788 | ldx [%g4],%g2 | |
17789 | cmp %g3,%g2 ! %f10 = 64479a75 bb9180c7 | |
17790 | bne %xcc,p0_freg_check_fail | |
17791 | mov 0xf10,%g1 | |
17792 | ldx [%g4+0x78],%g3 | |
17793 | std %f12,[%g4] | |
17794 | ldx [%g4],%g2 | |
17795 | cmp %g3,%g2 ! %f12 = ffff0000 00000000 | |
17796 | bne %xcc,p0_freg_check_fail | |
17797 | mov 0xf12,%g1 | |
17798 | ldx [%g4+0x80],%g3 | |
17799 | std %f14,[%g4] | |
17800 | ldx [%g4],%g2 | |
17801 | cmp %g3,%g2 ! %f14 = ffffffff 000000ff | |
17802 | bne %xcc,p0_freg_check_fail | |
17803 | mov 0xf14,%g1 | |
17804 | ldx [%g4+0x88],%g3 | |
17805 | std %f16,[%g4] | |
17806 | ldx [%g4],%g2 | |
17807 | cmp %g3,%g2 ! %f16 = 5e000000 ff000000 | |
17808 | bne %xcc,p0_freg_check_fail | |
17809 | mov 0xf16,%g1 | |
17810 | ldx [%g4+0x90],%g3 | |
17811 | std %f18,[%g4] | |
17812 | ldx [%g4],%g2 | |
17813 | cmp %g3,%g2 ! %f18 = ffffff00 00000000 | |
17814 | bne %xcc,p0_freg_check_fail | |
17815 | mov 0xf18,%g1 | |
17816 | ldx [%g4+0x98],%g3 | |
17817 | std %f20,[%g4] | |
17818 | ldx [%g4],%g2 | |
17819 | cmp %g3,%g2 ! %f20 = 00000000 00000000 | |
17820 | bne %xcc,p0_freg_check_fail | |
17821 | mov 0xf20,%g1 | |
17822 | ldx [%g4+0xa0],%g3 | |
17823 | std %f22,[%g4] | |
17824 | ldx [%g4],%g2 | |
17825 | cmp %g3,%g2 ! %f22 = b5238e48 1293fe50 | |
17826 | bne %xcc,p0_freg_check_fail | |
17827 | mov 0xf22,%g1 | |
17828 | ldx [%g4+0xa8],%g3 | |
17829 | std %f24,[%g4] | |
17830 | ldx [%g4],%g2 | |
17831 | cmp %g3,%g2 ! %f24 = 0000009c b100901c | |
17832 | bne %xcc,p0_freg_check_fail | |
17833 | mov 0xf24,%g1 | |
17834 | ldx [%g4+0xb0],%g3 | |
17835 | std %f26,[%g4] | |
17836 | ldx [%g4],%g2 | |
17837 | cmp %g3,%g2 ! %f26 = ff00ffe4 ffff00ff | |
17838 | bne %xcc,p0_freg_check_fail | |
17839 | mov 0xf26,%g1 | |
17840 | ldx [%g4+0xb8],%g3 | |
17841 | std %f28,[%g4] | |
17842 | ldx [%g4],%g2 | |
17843 | cmp %g3,%g2 ! %f28 = 5eff6960 ff9a0036 | |
17844 | bne %xcc,p0_freg_check_fail | |
17845 | mov 0xf28,%g1 | |
17846 | ldx [%g4+0xc0],%g3 | |
17847 | std %f30,[%g4] | |
17848 | ldx [%g4],%g2 | |
17849 | cmp %g3,%g2 ! %f30 = 02226c6b 57119e5e | |
17850 | bne %xcc,p0_freg_check_fail | |
17851 | mov 0xf30,%g1 | |
17852 | ||
17853 | ! Check Point 83 completed | |
17854 | ||
17855 | ||
17856 | p0_label_416: | |
17857 | ! %l1 = ffffffffff000000, Mem[0000000010001400] = 000000ff | |
17858 | stba %l1,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 | |
17859 | ! %l6 = 00000000ff000000, Mem[0000000010041400] = 0000000000000000 | |
17860 | stxa %l6,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000ff000000 | |
17861 | ! %l5 = 0000000000000000, Mem[0000000010001430] = 000000ff, %asi = 80 | |
17862 | stwa %l5,[%i0+0x030]%asi ! Mem[0000000010001430] = 00000000 | |
17863 | ! Mem[0000000010001438] = ffff275e, %l7 = 0000000000000000 | |
17864 | ldstuba [%i0+0x038]%asi,%l7 ! %l7 = 000000ff000000ff | |
17865 | ! %f8 = 925b1ad8 39aced3b, %l7 = 00000000000000ff | |
17866 | ! Mem[0000000030141420] = 925b1ad839aced3b | |
17867 | add %i5,0x020,%g1 | |
17868 | stda %f8,[%g1+%l7]ASI_PST32_S ! Mem[0000000030141420] = 925b1ad839aced3b | |
17869 | ! %l2 = 00000000000000ff, Mem[0000000010181410] = 00000000000000ff, %asi = 80 | |
17870 | stxa %l2,[%i6+0x010]%asi ! Mem[0000000010181410] = 00000000000000ff | |
17871 | ! %l1 = ffffffffff000000, Mem[000000001008142d] = ff000000 | |
17872 | stb %l1,[%i2+0x02d] ! Mem[000000001008142c] = ff000000 | |
17873 | ! %l2 = 00000000000000ff, Mem[0000000010041408] = 0000ff00 | |
17874 | stwa %l2,[%i1+%o4]0x88 ! Mem[0000000010041408] = 000000ff | |
17875 | ! %l4 = 000000000000ff00, Mem[00000000201c0000] = ffc41669, %asi = 80 | |
17876 | stha %l4,[%o0+0x000]%asi ! Mem[00000000201c0000] = ff001669 | |
17877 | ! Starting 10 instruction Load Burst | |
17878 | ! Mem[00000000100c1408] = ff0000001a0000ff, %f18 = ffffff00 00000000 | |
17879 | ldda [%i3+%o4]0x80,%f18 ! %f18 = ff000000 1a0000ff | |
17880 | ||
17881 | p0_label_417: | |
17882 | ! Mem[0000000030101408] = ff000000, %l3 = 0000000000000000 | |
17883 | ldsha [%i4+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
17884 | ! %l4 = 000000000000ff00, Mem[0000000010001400] = 00000000 | |
17885 | stwa %l4,[%i0+%g0]0x88 ! Mem[0000000010001400] = 0000ff00 | |
17886 | ! Mem[0000000030081400] = ff0000ff, %l3 = 0000000000000000 | |
17887 | ldswa [%i2+%g0]0x89,%l3 ! %l3 = ffffffffff0000ff | |
17888 | ! Mem[0000000030141408] = ff0027ff, %l1 = ffffffffff000000 | |
17889 | lduwa [%i5+%o4]0x81,%l1 ! %l1 = 00000000ff0027ff | |
17890 | ! Mem[0000000010001408] = 000000ff, %l2 = 00000000000000ff | |
17891 | lduba [%i0+%o4]0x88,%l2 ! %l2 = 00000000000000ff | |
17892 | ! Mem[0000000030101400] = ff000000, %l5 = 0000000000000000 | |
17893 | lduha [%i4+%g0]0x81,%l5 ! %l5 = 000000000000ff00 | |
17894 | ! Mem[0000000010041400] = 000000ff, %l4 = 000000000000ff00 | |
17895 | ldsha [%i1+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
17896 | ! Mem[0000000030041408] = 00000000, %l4 = 0000000000000000 | |
17897 | lduha [%i1+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
17898 | ! Mem[0000000030101400] = 000000ff, %l4 = 0000000000000000 | |
17899 | lduha [%i4+%g0]0x89,%l4 ! %l4 = 00000000000000ff | |
17900 | ! Starting 10 instruction Store Burst | |
17901 | ! Mem[0000000010081400] = 988c3d00, %l2 = 00000000000000ff | |
17902 | ldstuba [%i2+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
17903 | ||
17904 | p0_label_418: | |
17905 | ! %f20 = 00000000, Mem[00000000100c1408] = ff000000 | |
17906 | sta %f20,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00000000 | |
17907 | ! %l4 = 000000ff, %l5 = 0000ff00, Mem[0000000030041400] = 000000ff 000000ff | |
17908 | stda %l4,[%i1+%g0]0x89 ! Mem[0000000030041400] = 000000ff 0000ff00 | |
17909 | ! %l6 = 00000000ff000000, Mem[0000000030141400] = 5e00000000000000 | |
17910 | stxa %l6,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000ff000000 | |
17911 | ! Mem[0000000010001400] = 0000ff00, %l3 = ffffffffff0000ff | |
17912 | ldstuba [%i0+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
17913 | ! Mem[0000000030101410] = 000000ff, %l4 = 00000000000000ff | |
17914 | ldstuba [%i4+%o5]0x89,%l4 ! %l4 = 000000ff000000ff | |
17915 | ! %f24 = 0000009c b100901c, Mem[0000000030181400] = 00ff0000 ff0000ff | |
17916 | stda %f24,[%i6+%g0]0x89 ! Mem[0000000030181400] = 0000009c b100901c | |
17917 | ! %f16 = 5e000000 ff000000 ff000000 1a0000ff | |
17918 | ! %f20 = 00000000 00000000 b5238e48 1293fe50 | |
17919 | ! %f24 = 0000009c b100901c ff00ffe4 ffff00ff | |
17920 | ! %f28 = 5eff6960 ff9a0036 02226c6b 57119e5e | |
17921 | stda %f16,[%i0]ASI_BLK_S ! Block Store to 0000000030001400 | |
17922 | ! Mem[00000000100c1400] = ff000000, %l4 = 00000000000000ff | |
17923 | swapa [%i3+%g0]0x88,%l4 ! %l4 = 00000000ff000000 | |
17924 | ! %l1 = 00000000ff0027ff, Mem[0000000010141408] = c4ffffff00000000 | |
17925 | stxa %l1,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000ff0027ff | |
17926 | ! Starting 10 instruction Load Burst | |
17927 | ! Mem[0000000010101400] = 6b6c2202, %l6 = 00000000ff000000 | |
17928 | ldswa [%i4+%g0]0x88,%l6 ! %l6 = 000000006b6c2202 | |
17929 | ||
17930 | p0_label_419: | |
17931 | ! %l4 = 00000000ff000000, Mem[00000000100c1410] = 00000000 | |
17932 | stwa %l4,[%i3+%o5]0x80 ! Mem[00000000100c1410] = ff000000 | |
17933 | ! Mem[0000000010041400] = ff000000, %l4 = 00000000ff000000 | |
17934 | ldsba [%i1+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
17935 | ! Mem[0000000010041408] = ff000000, %l1 = 00000000ff0027ff | |
17936 | lduwa [%i1+%o4]0x80,%l1 ! %l1 = 00000000ff000000 | |
17937 | membar #Sync ! Added by membar checker (86) | |
17938 | ! Mem[0000000030001410] = 00000000, %l3 = 0000000000000000 | |
17939 | lduba [%i0+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
17940 | ! Mem[0000000010101400] = 02226c6b, %l5 = 000000000000ff00 | |
17941 | ldsba [%i4+%g0]0x80,%l5 ! %l5 = 0000000000000002 | |
17942 | ! Mem[0000000010101410] = 00000000, %l4 = 0000000000000000 | |
17943 | ldsba [%i4+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
17944 | ! Mem[0000000010041430] = 9ce0b68a, %l6 = 000000006b6c2202 | |
17945 | ldsw [%i1+0x030],%l6 ! %l6 = ffffffff9ce0b68a | |
17946 | ! Mem[0000000030101408] = ffff0000ff000000, %f8 = 925b1ad8 39aced3b | |
17947 | ldda [%i4+%o4]0x89,%f8 ! %f8 = ffff0000 ff000000 | |
17948 | ! Mem[00000000201c0000] = ff001669, %l5 = 0000000000000002 | |
17949 | ldsh [%o0+%g0],%l5 ! %l5 = ffffffffffffff00 | |
17950 | ! Starting 10 instruction Store Burst | |
17951 | ! %l1 = 00000000ff000000, Mem[0000000010081408] = 8c002202 | |
17952 | stwa %l1,[%i2+%o4]0x80 ! Mem[0000000010081408] = ff000000 | |
17953 | ||
17954 | p0_label_420: | |
17955 | ! Mem[000000001004143c] = 0000b68a, %l0 = 000000ff, %l4 = 00000000 | |
17956 | add %i1,0x3c,%g1 | |
17957 | casa [%g1]0x80,%l0,%l4 ! %l4 = 000000000000b68a | |
17958 | ! %l2 = 0000000000000000, Mem[0000000030101400] = ff000000 | |
17959 | stba %l2,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 | |
17960 | ! %l7 = 00000000000000ff, Mem[0000000010141408] = 00000000 | |
17961 | stwa %l7,[%i5+%o4]0x80 ! Mem[0000000010141408] = 000000ff | |
17962 | ! Mem[0000000030101410] = 000000ff, %l7 = 00000000000000ff | |
17963 | ldstuba [%i4+%o5]0x89,%l7 ! %l7 = 000000ff000000ff | |
17964 | ! %f12 = ffff0000, Mem[0000000010041410] = 5e00ff00 | |
17965 | sta %f12,[%i1+%o5]0x88 ! Mem[0000000010041410] = ffff0000 | |
17966 | ! %l3 = 0000000000000000, Mem[00000000201c0000] = ff001669, %asi = 80 | |
17967 | stha %l3,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00001669 | |
17968 | ! Mem[0000000010081408] = ff000000, %l1 = 00000000ff000000 | |
17969 | swapa [%i2+%o4]0x80,%l1 ! %l1 = 00000000ff000000 | |
17970 | ! %l0 = 000000ff, %l1 = ff000000, Mem[0000000010001400] = 0000ffff ffff0000 | |
17971 | stda %l0,[%i0+%g0]0x88 ! Mem[0000000010001400] = 000000ff ff000000 | |
17972 | ! %f24 = 0000009c b100901c, %l6 = ffffffff9ce0b68a | |
17973 | ! Mem[0000000030101410] = ff000000ff000000 | |
17974 | add %i4,0x010,%g1 | |
17975 | stda %f24,[%g1+%l6]ASI_PST32_S ! Mem[0000000030101410] = 0000009cff000000 | |
17976 | ! Starting 10 instruction Load Burst | |
17977 | ! Mem[0000000030041400] = ff000000, %l2 = 0000000000000000 | |
17978 | ldsba [%i1+%g0]0x81,%l2 ! %l2 = ffffffffffffffff | |
17979 | ||
17980 | ! Check Point 84 for processor 0 | |
17981 | ||
17982 | set p0_check_pt_data_84,%g4 | |
17983 | rd %ccr,%g5 ! %g5 = 44 | |
17984 | ldx [%g4+0x08],%g2 | |
17985 | cmp %l1,%g2 ! %l1 = 00000000ff000000 | |
17986 | bne %xcc,p0_reg_check_fail1 | |
17987 | mov 0xee1,%g1 | |
17988 | ldx [%g4+0x10],%g2 | |
17989 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
17990 | bne %xcc,p0_reg_check_fail2 | |
17991 | mov 0xee2,%g1 | |
17992 | ldx [%g4+0x18],%g2 | |
17993 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
17994 | bne %xcc,p0_reg_check_fail3 | |
17995 | mov 0xee3,%g1 | |
17996 | ldx [%g4+0x20],%g2 | |
17997 | cmp %l4,%g2 ! %l4 = 000000000000b68a | |
17998 | bne %xcc,p0_reg_check_fail4 | |
17999 | mov 0xee4,%g1 | |
18000 | ldx [%g4+0x28],%g2 | |
18001 | cmp %l5,%g2 ! %l5 = ffffffffffffff00 | |
18002 | bne %xcc,p0_reg_check_fail5 | |
18003 | mov 0xee5,%g1 | |
18004 | ldx [%g4+0x30],%g2 | |
18005 | cmp %l6,%g2 ! %l6 = ffffffff9ce0b68a | |
18006 | bne %xcc,p0_reg_check_fail6 | |
18007 | mov 0xee6,%g1 | |
18008 | ldx [%g4+0x38],%g2 | |
18009 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
18010 | bne %xcc,p0_reg_check_fail7 | |
18011 | mov 0xee7,%g1 | |
18012 | ldx [%g4+0x40],%g3 | |
18013 | std %f8,[%g4] | |
18014 | ldx [%g4],%g2 | |
18015 | cmp %g3,%g2 ! %f8 = ffff0000 ff000000 | |
18016 | bne %xcc,p0_freg_check_fail | |
18017 | mov 0xf08,%g1 | |
18018 | ldx [%g4+0x48],%g3 | |
18019 | std %f18,[%g4] | |
18020 | ldx [%g4],%g2 | |
18021 | cmp %g3,%g2 ! %f18 = ff000000 1a0000ff | |
18022 | bne %xcc,p0_freg_check_fail | |
18023 | mov 0xf18,%g1 | |
18024 | ||
18025 | ! Check Point 84 completed | |
18026 | ||
18027 | ||
18028 | p0_label_421: | |
18029 | ! Mem[0000000010041400] = 00000000ff000000, %f24 = 0000009c b100901c | |
18030 | ldda [%i1+%g0]0x88,%f24 ! %f24 = 00000000 ff000000 | |
18031 | ! Mem[0000000030081410] = ffffffff, %l0 = 00000000000000ff | |
18032 | lduwa [%i2+%o5]0x81,%l0 ! %l0 = 00000000ffffffff | |
18033 | ! Mem[00000000218000c0] = 00ff4e2c, %l3 = 0000000000000000 | |
18034 | ldub [%o3+0x0c1],%l3 ! %l3 = 00000000000000ff | |
18035 | ! Mem[00000000211c0000] = fffffe0c, %l1 = 00000000ff000000 | |
18036 | ldsb [%o2+0x001],%l1 ! %l1 = ffffffffffffffff | |
18037 | ! Mem[0000000030101400] = 00000000, %l1 = ffffffffffffffff | |
18038 | ldswa [%i4+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
18039 | ! Mem[0000000010001400] = 000000ff, %l2 = ffffffffffffffff | |
18040 | ldsha [%i0+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
18041 | ! Mem[0000000010181408] = ffffffff ffffffff, %l4 = 0000b68a, %l5 = ffffff00 | |
18042 | ldda [%i6+%o4]0x80,%l4 ! %l4 = 00000000ffffffff 00000000ffffffff | |
18043 | ! Mem[0000000010101408] = 8eff2c03, %f25 = ff000000 | |
18044 | lda [%i4+%o4]0x88,%f25 ! %f25 = 8eff2c03 | |
18045 | ! Mem[0000000030141408] = ff0027ff0000005e, %l6 = ffffffff9ce0b68a | |
18046 | ldxa [%i5+%o4]0x81,%l6 ! %l6 = ff0027ff0000005e | |
18047 | ! Starting 10 instruction Store Burst | |
18048 | ! %l7 = 00000000000000ff, Mem[0000000010181410] = ff00000000000000 | |
18049 | stxa %l7,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000000000ff | |
18050 | ||
18051 | p0_label_422: | |
18052 | ! %l4 = 00000000ffffffff, Mem[0000000010041418] = 00000000000000ff, %asi = 80 | |
18053 | stxa %l4,[%i1+0x018]%asi ! Mem[0000000010041418] = 00000000ffffffff | |
18054 | ! Mem[00000000300c1410] = 00000000, %l1 = 0000000000000000 | |
18055 | ldstuba [%i3+%o5]0x89,%l1 ! %l1 = 00000000000000ff | |
18056 | ! %f0 = 00000000, Mem[0000000030101410] = 0000009c | |
18057 | sta %f0 ,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00000000 | |
18058 | ! %f18 = ff000000 1a0000ff, Mem[0000000030001408] = ff000000 1a0000ff | |
18059 | stda %f18,[%i0+%o4]0x81 ! Mem[0000000030001408] = ff000000 1a0000ff | |
18060 | ! %l6 = 0000005e, %l7 = 000000ff, Mem[0000000030041400] = ff000000 00ff0000 | |
18061 | stda %l6,[%i1+%g0]0x81 ! Mem[0000000030041400] = 0000005e 000000ff | |
18062 | ! %l7 = 00000000000000ff, Mem[0000000030181408] = 00000000ff0000ff | |
18063 | stxa %l7,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000000000ff | |
18064 | ! %l7 = 00000000000000ff, Mem[0000000030081408] = ffff0000ff000000 | |
18065 | stxa %l7,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000000000000ff | |
18066 | ! Mem[00000000100c1424] = 00000000, %f26 = ff00ffe4 | |
18067 | ld [%i3+0x024],%f26 ! %f26 = 00000000 | |
18068 | ! %l2 = 00000000000000ff, Mem[0000000030141408] = 5e000000ff2700ff | |
18069 | stxa %l2,[%i5+%o4]0x89 ! Mem[0000000030141408] = 00000000000000ff | |
18070 | ! Starting 10 instruction Load Burst | |
18071 | ! Mem[0000000010001410] = ff000000, %l6 = ff0027ff0000005e | |
18072 | lduha [%i0+%o5]0x80,%l6 ! %l6 = 000000000000ff00 | |
18073 | ||
18074 | p0_label_423: | |
18075 | ! Mem[0000000030101400] = 00000000, %l6 = 000000000000ff00 | |
18076 | lduha [%i4+%g0]0x89,%l6 ! %l6 = 0000000000000000 | |
18077 | ! Mem[0000000030141410] = 00000000, %f17 = ff000000 | |
18078 | lda [%i5+%o5]0x81,%f17 ! %f17 = 00000000 | |
18079 | ! Mem[0000000010081410] = 000000c4, %l3 = 00000000000000ff | |
18080 | ldswa [%i2+%o5]0x88,%l3 ! %l3 = 00000000000000c4 | |
18081 | ! Mem[0000000030081410] = ffffffff, %l1 = 0000000000000000 | |
18082 | lduha [%i2+%o5]0x89,%l1 ! %l1 = 000000000000ffff | |
18083 | ! Mem[00000000100c142c] = 5e000000, %l5 = 00000000ffffffff | |
18084 | ldsw [%i3+0x02c],%l5 ! %l5 = 000000005e000000 | |
18085 | ! Mem[0000000010001410] = ff00ffff000000ff, %f24 = 00000000 8eff2c03 | |
18086 | ldda [%i0+%o5]0x88,%f24 ! %f24 = ff00ffff 000000ff | |
18087 | ! Mem[0000000010181400] = ff0000ff, %l4 = 00000000ffffffff | |
18088 | ldsha [%i6+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
18089 | ! Mem[0000000010101400] = 6b6c2202, %f7 = 57119e5e | |
18090 | lda [%i4+%g0]0x88,%f7 ! %f7 = 6b6c2202 | |
18091 | ! Mem[0000000010041410] = 0000ffff, %l2 = 00000000000000ff | |
18092 | lduh [%i1+%o5],%l2 ! %l2 = 0000000000000000 | |
18093 | ! Starting 10 instruction Store Burst | |
18094 | ! %f18 = ff000000 1a0000ff, %l2 = 0000000000000000 | |
18095 | ! Mem[00000000300c1438] = 02226c6b57119e5e | |
18096 | add %i3,0x038,%g1 | |
18097 | stda %f18,[%g1+%l2]ASI_PST32_S ! Mem[00000000300c1438] = 02226c6b57119e5e | |
18098 | ||
18099 | p0_label_424: | |
18100 | ! Mem[0000000030001400] = 0000005e, %l5 = 000000005e000000 | |
18101 | ldstuba [%i0+%g0]0x89,%l5 ! %l5 = 0000005e000000ff | |
18102 | ! %l6 = 0000000000000000, Mem[0000000010081428] = ffff0000, %asi = 80 | |
18103 | stwa %l6,[%i2+0x028]%asi ! Mem[0000000010081428] = 00000000 | |
18104 | ! %l2 = 0000000000000000, Mem[000000001010143c] = 000000ff, %asi = 80 | |
18105 | stwa %l2,[%i4+0x03c]%asi ! Mem[000000001010143c] = 00000000 | |
18106 | ! %l2 = 00000000, %l3 = 000000c4, Mem[00000000100c1428] = ff270000 5e000000 | |
18107 | stda %l2,[%i3+0x028]%asi ! Mem[00000000100c1428] = 00000000 000000c4 | |
18108 | ! %l3 = 00000000000000c4, Mem[0000000020800040] = ff009ffa, %asi = 80 | |
18109 | stha %l3,[%o1+0x040]%asi ! Mem[0000000020800040] = 00c49ffa | |
18110 | ! %l0 = 00000000ffffffff, Mem[00000000100c140c] = 1a0000ff, %asi = 80 | |
18111 | stwa %l0,[%i3+0x00c]%asi ! Mem[00000000100c140c] = ffffffff | |
18112 | ! Mem[0000000010081410] = c4000000, %l4 = 00000000000000ff | |
18113 | ldstuba [%i2+%o5]0x80,%l4 ! %l4 = 000000c4000000ff | |
18114 | ! %l2 = 0000000000000000, Mem[00000000100c1410] = 000000ff | |
18115 | stwa %l2,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 00000000 | |
18116 | ! Mem[0000000030081410] = ffffffff, %l5 = 000000000000005e | |
18117 | swapa [%i2+%o5]0x89,%l5 ! %l5 = 00000000ffffffff | |
18118 | ! Starting 10 instruction Load Burst | |
18119 | ! Mem[0000000010141430] = ffffffff9ce0b68a, %f14 = ffffffff 000000ff | |
18120 | ldd [%i5+0x030],%f14 ! %f14 = ffffffff 9ce0b68a | |
18121 | ||
18122 | p0_label_425: | |
18123 | ! Mem[00000000300c1400] = 0000005e, %l7 = 00000000000000ff | |
18124 | lduha [%i3+%g0]0x89,%l7 ! %l7 = 000000000000005e | |
18125 | ! Mem[0000000010081410] = ff000000, %l3 = 00000000000000c4 | |
18126 | lduha [%i2+%o5]0x80,%l3 ! %l3 = 000000000000ff00 | |
18127 | ! Mem[0000000010001408] = ff000000, %l0 = 00000000ffffffff | |
18128 | lduwa [%i0+%o4]0x80,%l0 ! %l0 = 00000000ff000000 | |
18129 | ! Mem[0000000010181410] = ff00000000000000, %l2 = 0000000000000000 | |
18130 | ldxa [%i6+%o5]0x80,%l2 ! %l2 = ff00000000000000 | |
18131 | ! Mem[0000000010141408] = 000000ff, %l1 = 000000000000ffff | |
18132 | ldsha [%i5+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
18133 | ! Mem[000000001010143c] = 00000000, %l1 = 0000000000000000, %asi = 80 | |
18134 | swapa [%i4+0x03c]%asi,%l1 ! %l1 = 0000000000000000 | |
18135 | ! Mem[0000000030081400] = ff0000ff, %l5 = 00000000ffffffff | |
18136 | ldsha [%i2+%g0]0x89,%l5 ! %l5 = 00000000000000ff | |
18137 | ! Mem[0000000030101400] = 00000000, %f2 = ff0027ff | |
18138 | lda [%i4+%g0]0x81,%f2 ! %f2 = 00000000 | |
18139 | ! Mem[0000000030141400] = 00000000 ff000000, %l4 = 000000c4, %l5 = 000000ff | |
18140 | ldda [%i5+%g0]0x89,%l4 ! %l4 = 00000000ff000000 0000000000000000 | |
18141 | ! Starting 10 instruction Store Burst | |
18142 | ! %l7 = 000000000000005e, Mem[00000000201c0000] = 00001669, %asi = 80 | |
18143 | stba %l7,[%o0+0x000]%asi ! Mem[00000000201c0000] = 5e001669 | |
18144 | ||
18145 | ! Check Point 85 for processor 0 | |
18146 | ||
18147 | set p0_check_pt_data_85,%g4 | |
18148 | rd %ccr,%g5 ! %g5 = 44 | |
18149 | ldx [%g4+0x08],%g2 | |
18150 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
18151 | bne %xcc,p0_reg_check_fail0 | |
18152 | mov 0xee0,%g1 | |
18153 | ldx [%g4+0x10],%g2 | |
18154 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
18155 | bne %xcc,p0_reg_check_fail1 | |
18156 | mov 0xee1,%g1 | |
18157 | ldx [%g4+0x18],%g2 | |
18158 | cmp %l2,%g2 ! %l2 = ff00000000000000 | |
18159 | bne %xcc,p0_reg_check_fail2 | |
18160 | mov 0xee2,%g1 | |
18161 | ldx [%g4+0x20],%g2 | |
18162 | cmp %l3,%g2 ! %l3 = 000000000000ff00 | |
18163 | bne %xcc,p0_reg_check_fail3 | |
18164 | mov 0xee3,%g1 | |
18165 | ldx [%g4+0x28],%g2 | |
18166 | cmp %l4,%g2 ! %l4 = 00000000ff000000 | |
18167 | bne %xcc,p0_reg_check_fail4 | |
18168 | mov 0xee4,%g1 | |
18169 | ldx [%g4+0x30],%g2 | |
18170 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
18171 | bne %xcc,p0_reg_check_fail5 | |
18172 | mov 0xee5,%g1 | |
18173 | ldx [%g4+0x38],%g2 | |
18174 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
18175 | bne %xcc,p0_reg_check_fail6 | |
18176 | mov 0xee6,%g1 | |
18177 | ldx [%g4+0x40],%g2 | |
18178 | cmp %l7,%g2 ! %l7 = 000000000000005e | |
18179 | bne %xcc,p0_reg_check_fail7 | |
18180 | mov 0xee7,%g1 | |
18181 | ldx [%g4+0x48],%g3 | |
18182 | std %f2,[%g4] | |
18183 | ldx [%g4],%g2 | |
18184 | cmp %g3,%g2 ! %f2 = 00000000 0000005e | |
18185 | bne %xcc,p0_freg_check_fail | |
18186 | mov 0xf02,%g1 | |
18187 | ldx [%g4+0x50],%g3 | |
18188 | std %f4,[%g4] | |
18189 | ldx [%g4],%g2 | |
18190 | cmp %g3,%g2 ! %f4 = ff000000 032cff8e | |
18191 | bne %xcc,p0_freg_check_fail | |
18192 | mov 0xf04,%g1 | |
18193 | ldx [%g4+0x58],%g3 | |
18194 | std %f6,[%g4] | |
18195 | ldx [%g4],%g2 | |
18196 | cmp %g3,%g2 ! %f6 = 02226c6b 6b6c2202 | |
18197 | bne %xcc,p0_freg_check_fail | |
18198 | mov 0xf06,%g1 | |
18199 | ldx [%g4+0x60],%g3 | |
18200 | std %f14,[%g4] | |
18201 | ldx [%g4],%g2 | |
18202 | cmp %g3,%g2 ! %f14 = ffffffff 9ce0b68a | |
18203 | bne %xcc,p0_freg_check_fail | |
18204 | mov 0xf14,%g1 | |
18205 | ldx [%g4+0x68],%g3 | |
18206 | std %f16,[%g4] | |
18207 | ldx [%g4],%g2 | |
18208 | cmp %g3,%g2 ! %f16 = 5e000000 00000000 | |
18209 | bne %xcc,p0_freg_check_fail | |
18210 | mov 0xf16,%g1 | |
18211 | ldx [%g4+0x70],%g3 | |
18212 | std %f24,[%g4] | |
18213 | ldx [%g4],%g2 | |
18214 | cmp %g3,%g2 ! %f24 = ff00ffff 000000ff | |
18215 | bne %xcc,p0_freg_check_fail | |
18216 | mov 0xf24,%g1 | |
18217 | ldx [%g4+0x78],%g3 | |
18218 | std %f26,[%g4] | |
18219 | ldx [%g4],%g2 | |
18220 | cmp %g3,%g2 ! %f26 = 00000000 ffff00ff | |
18221 | bne %xcc,p0_freg_check_fail | |
18222 | mov 0xf26,%g1 | |
18223 | ||
18224 | ! Check Point 85 completed | |
18225 | ||
18226 | ||
18227 | p0_label_426: | |
18228 | ! %l1 = 0000000000000000, Mem[0000000030141410] = ff0000ff00000000 | |
18229 | stxa %l1,[%i5+%o5]0x89 ! Mem[0000000030141410] = 0000000000000000 | |
18230 | ! %l3 = 000000000000ff00, Mem[0000000030141410] = 00000000 | |
18231 | stwa %l3,[%i5+%o5]0x89 ! Mem[0000000030141410] = 0000ff00 | |
18232 | ! Mem[0000000030041400] = 5e000000, %l2 = ff00000000000000 | |
18233 | swapa [%i1+%g0]0x89,%l2 ! %l2 = 000000005e000000 | |
18234 | ! %f28 = 5eff6960 ff9a0036, Mem[0000000030141408] = 000000ff 00000000 | |
18235 | stda %f28,[%i5+%o4]0x89 ! Mem[0000000030141408] = 5eff6960 ff9a0036 | |
18236 | ! %l3 = 000000000000ff00, Mem[0000000010141400] = 00000000 | |
18237 | stha %l3,[%i5+%g0]0x80 ! Mem[0000000010141400] = ff000000 | |
18238 | ! %f2 = 00000000 0000005e, Mem[00000000100c1410] = 00000000 00000000 | |
18239 | stda %f2 ,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 00000000 0000005e | |
18240 | ! Mem[0000000010081410] = 000000ff, %l7 = 000000000000005e | |
18241 | swapa [%i2+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
18242 | ! %l6 = 0000000000000000, Mem[0000000030141408] = ff9a0036 | |
18243 | stha %l6,[%i5+%o4]0x89 ! Mem[0000000030141408] = ff9a0000 | |
18244 | ! Mem[0000000030041408] = 00000000, %l5 = 0000000000000000 | |
18245 | ldstuba [%i1+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
18246 | ! Starting 10 instruction Load Burst | |
18247 | ! Mem[0000000010101408] = 032cff8e, %l3 = 000000000000ff00 | |
18248 | lduwa [%i4+%o4]0x80,%l3 ! %l3 = 00000000032cff8e | |
18249 | ||
18250 | p0_label_427: | |
18251 | ! Mem[0000000010141438] = ffff275e, %l1 = 0000000000000000 | |
18252 | ldsw [%i5+0x038],%l1 ! %l1 = ffffffffffff275e | |
18253 | ! Mem[0000000030041400] = 00000000, %l2 = 000000005e000000 | |
18254 | lduwa [%i1+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
18255 | ! Mem[0000000010181400] = ff0000ff, %l6 = 0000000000000000 | |
18256 | ldsba [%i6+%g0]0x88,%l6 ! %l6 = ffffffffffffffff | |
18257 | ! Mem[0000000010081410] = 5e000000ffff00ff, %f24 = ff00ffff 000000ff | |
18258 | ldd [%i2+%o5],%f24 ! %f24 = 5e000000 ffff00ff | |
18259 | ! Mem[000000001008142c] = ff000000, %l3 = 00000000032cff8e | |
18260 | lduw [%i2+0x02c],%l3 ! %l3 = 00000000ff000000 | |
18261 | ! Mem[0000000010181400] = ff0000ff, %l5 = 0000000000000000 | |
18262 | ldsha [%i6+%g0]0x80,%l5 ! %l5 = ffffffffffffff00 | |
18263 | ! Mem[0000000030141400] = 000000ff 00000000, %l4 = ff000000, %l5 = ffffff00 | |
18264 | ldda [%i5+%g0]0x81,%l4 ! %l4 = 00000000000000ff 0000000000000000 | |
18265 | ! Mem[00000000211c0000] = fffffe0c, %l6 = ffffffffffffffff | |
18266 | lduh [%o2+%g0],%l6 ! %l6 = 000000000000ffff | |
18267 | ! Mem[0000000030141408] = 00009aff, %l2 = 0000000000000000 | |
18268 | lduha [%i5+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
18269 | ! Starting 10 instruction Store Burst | |
18270 | ! %l1 = ffffffffffff275e, Mem[0000000030001400] = ff000000ff000000 | |
18271 | stxa %l1,[%i0+%g0]0x81 ! Mem[0000000030001400] = ffffffffffff275e | |
18272 | ||
18273 | p0_label_428: | |
18274 | ! Mem[0000000010081434] = e0ffffff, %l0 = 00000000ff000000 | |
18275 | swap [%i2+0x034],%l0 ! %l0 = 00000000e0ffffff | |
18276 | ! %l1 = ffffffffffff275e, Mem[0000000030101410] = 00000000ff000000 | |
18277 | stxa %l1,[%i4+%o5]0x81 ! Mem[0000000030101410] = ffffffffffff275e | |
18278 | ! %l5 = 0000000000000000, Mem[0000000030141400] = ff000000 | |
18279 | stha %l5,[%i5+%g0]0x89 ! Mem[0000000030141400] = ff000000 | |
18280 | ! Mem[0000000010181408] = ffffffffffffffff, %l6 = 000000000000ffff, %l7 = 00000000000000ff | |
18281 | add %i6,0x08,%g1 | |
18282 | casxa [%g1]0x80,%l6,%l7 ! %l7 = ffffffffffffffff | |
18283 | ! Mem[0000000010141408] = 000000ff, %l0 = 00000000e0ffffff | |
18284 | ldstuba [%i5+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
18285 | ! %l7 = ffffffffffffffff, Mem[0000000030181400] = b100901c | |
18286 | stwa %l7,[%i6+%g0]0x89 ! Mem[0000000030181400] = ffffffff | |
18287 | ! Mem[00000000100c1402] = ff000000, %l1 = ffffffffffff275e | |
18288 | ldstub [%i3+0x002],%l1 ! %l1 = 00000000000000ff | |
18289 | ! %l2 = 00000000, %l3 = ff000000, Mem[0000000010101400] = 6b6c2202 5e9e1157 | |
18290 | stda %l2,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 ff000000 | |
18291 | ! Mem[0000000010081422] = 00000000, %l6 = 000000000000ffff | |
18292 | ldstub [%i2+0x022],%l6 ! %l6 = 00000000000000ff | |
18293 | ! Starting 10 instruction Load Burst | |
18294 | ! Mem[0000000030001410] = 00000000 00000000, %l4 = 000000ff, %l5 = 00000000 | |
18295 | ldda [%i0+%o5]0x81,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
18296 | ||
18297 | p0_label_429: | |
18298 | ! Mem[0000000010181408] = ffffffff, %l4 = 0000000000000000 | |
18299 | ldswa [%i6+%o4]0x88,%l4 ! %l4 = ffffffffffffffff | |
18300 | ! Mem[0000000030141410] = 0000ff00, %l1 = 0000000000000000 | |
18301 | ldsha [%i5+%o5]0x89,%l1 ! %l1 = ffffffffffffff00 | |
18302 | ! Mem[0000000010141410] = 00ff0000, %l0 = 0000000000000000 | |
18303 | lduha [%i5+0x010]%asi,%l0 ! %l0 = 00000000000000ff | |
18304 | ! Mem[0000000030081410] = 0000005e, %l0 = 00000000000000ff | |
18305 | lduba [%i2+%o5]0x89,%l0 ! %l0 = 000000000000005e | |
18306 | ! Mem[0000000030181400] = ffffffff, %l7 = ffffffffffffffff | |
18307 | lduwa [%i6+%g0]0x89,%l7 ! %l7 = 00000000ffffffff | |
18308 | ! Mem[0000000010041410] = 8aff0000ffff0000, %l4 = ffffffffffffffff | |
18309 | ldxa [%i1+%o5]0x88,%l4 ! %l4 = 8aff0000ffff0000 | |
18310 | ! Mem[0000000010041438] = 7a0000000000b68a, %l1 = ffffffffffffff00 | |
18311 | ldx [%i1+0x038],%l1 ! %l1 = 7a0000000000b68a | |
18312 | ! Mem[0000000030001400] = 5e27ffffffffffff, %l0 = 000000000000005e | |
18313 | ldxa [%i0+%g0]0x89,%l0 ! %l0 = 5e27ffffffffffff | |
18314 | ! Mem[0000000010041400] = ff000000, %l2 = 0000000000000000 | |
18315 | ldsba [%i1+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
18316 | ! Starting 10 instruction Store Burst | |
18317 | ! %f13 = 00000000, Mem[0000000010041400] = 000000ff | |
18318 | sta %f13,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000 | |
18319 | ||
18320 | p0_label_430: | |
18321 | ! %l6 = 0000000000000000, Mem[0000000010081410] = 5e000000 | |
18322 | stha %l6,[%i2+%o5]0x80 ! Mem[0000000010081410] = 00000000 | |
18323 | ! Mem[0000000010041429] = 00000000, %l7 = 00000000ffffffff | |
18324 | ldstub [%i1+0x029],%l7 ! %l7 = 00000000000000ff | |
18325 | ! %l0 = ffffffff, %l1 = 0000b68a, Mem[0000000030041408] = 000000ff 00000000 | |
18326 | stda %l0,[%i1+%o4]0x89 ! Mem[0000000030041408] = ffffffff 0000b68a | |
18327 | ! Mem[0000000030101408] = 000000ff, %l3 = 00000000ff000000 | |
18328 | ldstuba [%i4+%o4]0x81,%l3 ! %l3 = 00000000000000ff | |
18329 | ! %f25 = ffff00ff, Mem[0000000030101410] = ffffffff | |
18330 | sta %f25,[%i4+%o5]0x89 ! Mem[0000000030101410] = ffff00ff | |
18331 | ! Mem[0000000010141420] = 9cffb68affffffff, %l4 = 8aff0000ffff0000, %l0 = 5e27ffffffffffff | |
18332 | add %i5,0x20,%g1 | |
18333 | casxa [%g1]0x80,%l4,%l0 ! %l0 = 9cffb68affffffff | |
18334 | ! %f30 = 02226c6b 57119e5e, %l6 = 0000000000000000 | |
18335 | ! Mem[00000000300c1420] = 0000009cb100901c | |
18336 | add %i3,0x020,%g1 | |
18337 | stda %f30,[%g1+%l6]ASI_PST32_SL ! Mem[00000000300c1420] = 0000009cb100901c | |
18338 | ! %l0 = 9cffb68affffffff, Mem[0000000010141400] = 000000ff | |
18339 | stha %l0,[%i5+%g0]0x88 ! Mem[0000000010141400] = 0000ffff | |
18340 | ! Mem[00000000300c1408] = 00ffffff, %l0 = 9cffb68affffffff | |
18341 | swapa [%i3+%o4]0x89,%l0 ! %l0 = 0000000000ffffff | |
18342 | ! Starting 10 instruction Load Burst | |
18343 | ! Mem[00000000211c0000] = fffffe0c, %l0 = 0000000000ffffff | |
18344 | lduha [%o2+0x000]%asi,%l0 ! %l0 = 000000000000ffff | |
18345 | ||
18346 | ! Check Point 86 for processor 0 | |
18347 | ||
18348 | set p0_check_pt_data_86,%g4 | |
18349 | rd %ccr,%g5 ! %g5 = 44 | |
18350 | ldx [%g4+0x08],%g2 | |
18351 | cmp %l0,%g2 ! %l0 = 000000000000ffff | |
18352 | bne %xcc,p0_reg_check_fail0 | |
18353 | mov 0xee0,%g1 | |
18354 | ldx [%g4+0x10],%g2 | |
18355 | cmp %l1,%g2 ! %l1 = 7a0000000000b68a | |
18356 | bne %xcc,p0_reg_check_fail1 | |
18357 | mov 0xee1,%g1 | |
18358 | ldx [%g4+0x18],%g2 | |
18359 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
18360 | bne %xcc,p0_reg_check_fail2 | |
18361 | mov 0xee2,%g1 | |
18362 | ldx [%g4+0x20],%g2 | |
18363 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
18364 | bne %xcc,p0_reg_check_fail3 | |
18365 | mov 0xee3,%g1 | |
18366 | ldx [%g4+0x28],%g2 | |
18367 | cmp %l4,%g2 ! %l4 = 8aff0000ffff0000 | |
18368 | bne %xcc,p0_reg_check_fail4 | |
18369 | mov 0xee4,%g1 | |
18370 | ldx [%g4+0x30],%g2 | |
18371 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
18372 | bne %xcc,p0_reg_check_fail5 | |
18373 | mov 0xee5,%g1 | |
18374 | ldx [%g4+0x38],%g2 | |
18375 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
18376 | bne %xcc,p0_reg_check_fail6 | |
18377 | mov 0xee6,%g1 | |
18378 | ldx [%g4+0x40],%g2 | |
18379 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
18380 | bne %xcc,p0_reg_check_fail7 | |
18381 | mov 0xee7,%g1 | |
18382 | ldx [%g4+0x48],%g3 | |
18383 | std %f4,[%g4] | |
18384 | ldx [%g4],%g2 | |
18385 | cmp %g3,%g2 ! %f4 = ff000000 032cff8e | |
18386 | bne %xcc,p0_freg_check_fail | |
18387 | mov 0xf04,%g1 | |
18388 | ldx [%g4+0x50],%g3 | |
18389 | std %f24,[%g4] | |
18390 | ldx [%g4],%g2 | |
18391 | cmp %g3,%g2 ! %f24 = 5e000000 ffff00ff | |
18392 | bne %xcc,p0_freg_check_fail | |
18393 | mov 0xf24,%g1 | |
18394 | ||
18395 | ! Check Point 86 completed | |
18396 | ||
18397 | ||
18398 | p0_label_431: | |
18399 | ! Mem[0000000010101424] = 00ff0000, %l7 = 0000000000000000 | |
18400 | lduha [%i4+0x026]%asi,%l7 ! %l7 = 0000000000000000 | |
18401 | ! Mem[0000000010081410] = ff00ffff00000000, %l7 = 0000000000000000 | |
18402 | ldxa [%i2+%o5]0x88,%l7 ! %l7 = ff00ffff00000000 | |
18403 | ! Mem[00000000100c140c] = ffffffff, %f31 = 57119e5e | |
18404 | lda [%i3+0x00c]%asi,%f31 ! %f31 = ffffffff | |
18405 | ! Mem[0000000010041408] = ff000000, %l7 = ff00ffff00000000 | |
18406 | lduha [%i1+%o4]0x80,%l7 ! %l7 = 000000000000ff00 | |
18407 | ! Mem[00000000201c0000] = 5e001669, %l7 = 000000000000ff00 | |
18408 | ldsb [%o0+%g0],%l7 ! %l7 = 000000000000005e | |
18409 | ! Mem[0000000030001400] = 5e27ffffffffffff, %f8 = ffff0000 ff000000 | |
18410 | ldda [%i0+%g0]0x89,%f8 ! %f8 = 5e27ffff ffffffff | |
18411 | ! Mem[0000000020800040] = 00c49ffa, %l6 = 0000000000000000 | |
18412 | lduh [%o1+0x040],%l6 ! %l6 = 00000000000000c4 | |
18413 | ! Mem[0000000030101410] = 5e27ffffffff00ff, %l1 = 7a0000000000b68a | |
18414 | ldxa [%i4+%o5]0x89,%l1 ! %l1 = 5e27ffffffff00ff | |
18415 | ! Mem[0000000030181408] = ff000000, %l1 = 5e27ffffffff00ff | |
18416 | lduwa [%i6+%o4]0x81,%l1 ! %l1 = 00000000ff000000 | |
18417 | ! Starting 10 instruction Store Burst | |
18418 | ! %f9 = ffffffff, Mem[0000000030081410] = 5e000000 | |
18419 | sta %f9 ,[%i2+%o5]0x81 ! Mem[0000000030081410] = ffffffff | |
18420 | ||
18421 | p0_label_432: | |
18422 | ! Mem[0000000021800180] = ffffdb07, %l7 = 000000000000005e | |
18423 | ldstuba [%o3+0x180]%asi,%l7 ! %l7 = 000000ff000000ff | |
18424 | ! %l1 = 00000000ff000000, Mem[0000000020800040] = 00c49ffa, %asi = 80 | |
18425 | stha %l1,[%o1+0x040]%asi ! Mem[0000000020800040] = 00009ffa | |
18426 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010081428] = 00000000 ff000000 | |
18427 | stda %l2,[%i2+0x028]%asi ! Mem[0000000010081428] = 00000000 00000000 | |
18428 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000030001408] = ff000000 1a0000ff | |
18429 | stda %l2,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000 00000000 | |
18430 | ! %f2 = 00000000 0000005e, Mem[0000000010041400] = 00000000 00000000 | |
18431 | stda %f2 ,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 0000005e | |
18432 | ! Mem[0000000030101408] = ff0000ff, %l7 = 00000000000000ff | |
18433 | ldstuba [%i4+%o4]0x89,%l7 ! %l7 = 000000ff000000ff | |
18434 | ! %f0 = 00000000, Mem[0000000030001410] = 00000000 | |
18435 | sta %f0 ,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00000000 | |
18436 | ! Mem[000000001010142f] = 0000ffff, %l5 = 0000000000000000 | |
18437 | ldstuba [%i4+0x02f]%asi,%l5 ! %l5 = 000000ff000000ff | |
18438 | ! %l5 = 00000000000000ff, Mem[0000000010081400] = ff3d8c98 | |
18439 | stwa %l5,[%i2+%g0]0x80 ! Mem[0000000010081400] = 000000ff | |
18440 | ! Starting 10 instruction Load Burst | |
18441 | ! Mem[0000000030081400] = ff0000ff, %l6 = 00000000000000c4 | |
18442 | ldswa [%i2+%g0]0x81,%l6 ! %l6 = ffffffffff0000ff | |
18443 | ||
18444 | p0_label_433: | |
18445 | ! Mem[0000000010041410] = 0000ffff, %l5 = 00000000000000ff | |
18446 | ldswa [%i1+%o5]0x80,%l5 ! %l5 = 000000000000ffff | |
18447 | ! Mem[0000000030101400] = 000027ff 00000000, %l6 = ff0000ff, %l7 = 000000ff | |
18448 | ldda [%i4+%g0]0x89,%l6 ! %l6 = 0000000000000000 00000000000027ff | |
18449 | ! Mem[0000000010041400] = 5e000000, %l6 = 0000000000000000 | |
18450 | lduwa [%i1+%g0]0x80,%l6 ! %l6 = 000000005e000000 | |
18451 | membar #Sync ! Added by membar checker (87) | |
18452 | ! Mem[0000000010181400] = ff0000ff 000000ff ffffffff ffffffff | |
18453 | ! Mem[0000000010181410] = ff000000 00000000 0000ffff 00000000 | |
18454 | ! Mem[0000000010181420] = ffffff00 ff00ffff 00ff0000 ff000000 | |
18455 | ! Mem[0000000010181430] = 000000ff ff000000 00000000 0000007a | |
18456 | ldda [%i6]ASI_BLK_AIUP,%f16 ! Block Load from 0000000010181400 | |
18457 | ! Mem[000000001014140c] = ff0027ff, %l2 = 0000000000000000 | |
18458 | ldsb [%i5+0x00e],%l2 ! %l2 = 0000000000000027 | |
18459 | ! Mem[00000000300c1410] = 000000ff, %l7 = 00000000000027ff | |
18460 | lduha [%i3+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
18461 | ! Mem[00000000211c0000] = fffffe0c, %l3 = 0000000000000000 | |
18462 | ldsba [%o2+0x001]%asi,%l3 ! %l3 = ffffffffffffffff | |
18463 | ! Mem[00000000100c1438] = 0000ffff, %l4 = 8aff0000ffff0000 | |
18464 | ldswa [%i3+0x038]%asi,%l4 ! %l4 = 000000000000ffff | |
18465 | ! Mem[0000000010181400] = ff0000ff, %f7 = 6b6c2202 | |
18466 | lda [%i6+%g0]0x80,%f7 ! %f7 = ff0000ff | |
18467 | ! Starting 10 instruction Store Burst | |
18468 | ! Mem[0000000030101400] = 00000000, %l1 = 00000000ff000000 | |
18469 | swapa [%i4+%g0]0x81,%l1 ! %l1 = 0000000000000000 | |
18470 | ||
18471 | p0_label_434: | |
18472 | ! Mem[00000000300c1410] = ff000000, %l5 = 000000000000ffff | |
18473 | ldstuba [%i3+%o5]0x81,%l5 ! %l5 = 000000ff000000ff | |
18474 | ! Mem[00000000201c0000] = 5e001669, %l1 = 0000000000000000 | |
18475 | ldstub [%o0+%g0],%l1 ! %l1 = 0000005e000000ff | |
18476 | ! %l6 = 5e000000, %l7 = 000000ff, Mem[0000000010141410] = 0000ff00 00000000 | |
18477 | stda %l6,[%i5+%o5]0x88 ! Mem[0000000010141410] = 5e000000 000000ff | |
18478 | ! Mem[0000000030081410] = ffffffff, %l2 = 0000000000000027 | |
18479 | swapa [%i2+%o5]0x89,%l2 ! %l2 = 00000000ffffffff | |
18480 | ! %l6 = 5e000000, %l7 = 000000ff, Mem[0000000030101410] = ff00ffff ffff275e | |
18481 | stda %l6,[%i4+%o5]0x81 ! Mem[0000000030101410] = 5e000000 000000ff | |
18482 | membar #Sync ! Added by membar checker (88) | |
18483 | ! %l3 = ffffffffffffffff, Mem[000000001018142a] = 00ff0000 | |
18484 | sth %l3,[%i6+0x02a] ! Mem[0000000010181428] = 00ffffff | |
18485 | ! %l2 = ffffffff, %l3 = ffffffff, Mem[0000000030141408] = ff9a0000 5eff6960 | |
18486 | stda %l2,[%i5+%o4]0x89 ! Mem[0000000030141408] = ffffffff ffffffff | |
18487 | ! %f14 = ffffffff 9ce0b68a, %l3 = ffffffffffffffff | |
18488 | ! Mem[00000000100c1408] = 00000000ffffffff | |
18489 | add %i3,0x008,%g1 | |
18490 | stda %f14,[%g1+%l3]ASI_PST16_P ! Mem[00000000100c1408] = ffffffff9ce0b68a | |
18491 | ! %l2 = 00000000ffffffff, Mem[0000000010081400] = 000000ff | |
18492 | stha %l2,[%i2+%g0]0x80 ! Mem[0000000010081400] = ffff00ff | |
18493 | ! Starting 10 instruction Load Burst | |
18494 | ! Mem[0000000010101400] = 00000000, %l7 = 00000000000000ff | |
18495 | ldsba [%i4+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
18496 | ||
18497 | p0_label_435: | |
18498 | ! Mem[0000000010041408] = 000000ff000000ff, %f22 = 0000ffff 00000000 | |
18499 | ldda [%i1+%o4]0x88,%f22 ! %f22 = 000000ff 000000ff | |
18500 | ! Mem[0000000010181400] = ff0000ff 000000ff, %l2 = ffffffff, %l3 = ffffffff | |
18501 | ldda [%i6+%g0]0x80,%l2 ! %l2 = 00000000ff0000ff 00000000000000ff | |
18502 | ! Mem[0000000030141408] = ffffffff, %l1 = 000000000000005e | |
18503 | ldsba [%i5+%o4]0x89,%l1 ! %l1 = ffffffffffffffff | |
18504 | ! Mem[00000000300c1400] = 5e000000ff000000, %f14 = ffffffff 9ce0b68a | |
18505 | ldda [%i3+%g0]0x81,%f14 ! %f14 = 5e000000 ff000000 | |
18506 | ! Mem[0000000010081408] = ffffffff000000ff, %f4 = ff000000 032cff8e | |
18507 | ldda [%i2+%o4]0x88,%f4 ! %f4 = ffffffff 000000ff | |
18508 | ! Mem[0000000030041410] = 00ff0000, %l7 = 0000000000000000 | |
18509 | ldswa [%i1+%o5]0x89,%l7 ! %l7 = 0000000000ff0000 | |
18510 | ! Mem[00000000100c142d] = 000000c4, %l3 = 00000000000000ff | |
18511 | ldstub [%i3+0x02d],%l3 ! %l3 = 00000000000000ff | |
18512 | ! Mem[0000000010041408] = ff000000ff000000, %f24 = ffffff00 ff00ffff | |
18513 | ldda [%i1+%o4]0x80,%f24 ! %f24 = ff000000 ff000000 | |
18514 | ! Mem[00000000300c1400] = 5e000000ff000000, %f24 = ff000000 ff000000 | |
18515 | ldda [%i3+%g0]0x81,%f24 ! %f24 = 5e000000 ff000000 | |
18516 | ! Starting 10 instruction Store Burst | |
18517 | ! %l2 = ff0000ff, %l3 = 00000000, Mem[0000000030181400] = ffffffff 0000009c | |
18518 | stda %l2,[%i6+%g0]0x89 ! Mem[0000000030181400] = ff0000ff 00000000 | |
18519 | ||
18520 | ! Check Point 87 for processor 0 | |
18521 | ||
18522 | set p0_check_pt_data_87,%g4 | |
18523 | rd %ccr,%g5 ! %g5 = 44 | |
18524 | ldx [%g4+0x08],%g2 | |
18525 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
18526 | bne %xcc,p0_reg_check_fail1 | |
18527 | mov 0xee1,%g1 | |
18528 | ldx [%g4+0x10],%g2 | |
18529 | cmp %l2,%g2 ! %l2 = 00000000ff0000ff | |
18530 | bne %xcc,p0_reg_check_fail2 | |
18531 | mov 0xee2,%g1 | |
18532 | ldx [%g4+0x18],%g2 | |
18533 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
18534 | bne %xcc,p0_reg_check_fail3 | |
18535 | mov 0xee3,%g1 | |
18536 | ldx [%g4+0x20],%g2 | |
18537 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
18538 | bne %xcc,p0_reg_check_fail4 | |
18539 | mov 0xee4,%g1 | |
18540 | ldx [%g4+0x28],%g2 | |
18541 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
18542 | bne %xcc,p0_reg_check_fail5 | |
18543 | mov 0xee5,%g1 | |
18544 | ldx [%g4+0x30],%g2 | |
18545 | cmp %l6,%g2 ! %l6 = 000000005e000000 | |
18546 | bne %xcc,p0_reg_check_fail6 | |
18547 | mov 0xee6,%g1 | |
18548 | ldx [%g4+0x38],%g2 | |
18549 | cmp %l7,%g2 ! %l7 = 0000000000ff0000 | |
18550 | bne %xcc,p0_reg_check_fail7 | |
18551 | mov 0xee7,%g1 | |
18552 | ldx [%g4+0x40],%g3 | |
18553 | std %f2,[%g4] | |
18554 | ldx [%g4],%g2 | |
18555 | cmp %g3,%g2 ! %f2 = 00000000 0000005e | |
18556 | bne %xcc,p0_freg_check_fail | |
18557 | mov 0xf02,%g1 | |
18558 | ldx [%g4+0x48],%g3 | |
18559 | std %f4,[%g4] | |
18560 | ldx [%g4],%g2 | |
18561 | cmp %g3,%g2 ! %f4 = ffffffff 000000ff | |
18562 | bne %xcc,p0_freg_check_fail | |
18563 | mov 0xf04,%g1 | |
18564 | ldx [%g4+0x50],%g3 | |
18565 | std %f6,[%g4] | |
18566 | ldx [%g4],%g2 | |
18567 | cmp %g3,%g2 ! %f6 = 02226c6b ff0000ff | |
18568 | bne %xcc,p0_freg_check_fail | |
18569 | mov 0xf06,%g1 | |
18570 | ldx [%g4+0x58],%g3 | |
18571 | std %f8,[%g4] | |
18572 | ldx [%g4],%g2 | |
18573 | cmp %g3,%g2 ! %f8 = 5e27ffff ffffffff | |
18574 | bne %xcc,p0_freg_check_fail | |
18575 | mov 0xf08,%g1 | |
18576 | ldx [%g4+0x60],%g3 | |
18577 | std %f14,[%g4] | |
18578 | ldx [%g4],%g2 | |
18579 | cmp %g3,%g2 ! %f14 = 5e000000 ff000000 | |
18580 | bne %xcc,p0_freg_check_fail | |
18581 | mov 0xf14,%g1 | |
18582 | ldx [%g4+0x68],%g3 | |
18583 | std %f16,[%g4] | |
18584 | ldx [%g4],%g2 | |
18585 | cmp %g3,%g2 ! %f16 = ff0000ff 000000ff | |
18586 | bne %xcc,p0_freg_check_fail | |
18587 | mov 0xf16,%g1 | |
18588 | ldx [%g4+0x70],%g3 | |
18589 | std %f18,[%g4] | |
18590 | ldx [%g4],%g2 | |
18591 | cmp %g3,%g2 ! %f18 = ffffffff ffffffff | |
18592 | bne %xcc,p0_freg_check_fail | |
18593 | mov 0xf18,%g1 | |
18594 | ldx [%g4+0x78],%g3 | |
18595 | std %f20,[%g4] | |
18596 | ldx [%g4],%g2 | |
18597 | cmp %g3,%g2 ! %f20 = ff000000 00000000 | |
18598 | bne %xcc,p0_freg_check_fail | |
18599 | mov 0xf20,%g1 | |
18600 | ldx [%g4+0x80],%g3 | |
18601 | std %f22,[%g4] | |
18602 | ldx [%g4],%g2 | |
18603 | cmp %g3,%g2 ! %f22 = 000000ff 000000ff | |
18604 | bne %xcc,p0_freg_check_fail | |
18605 | mov 0xf22,%g1 | |
18606 | ldx [%g4+0x88],%g3 | |
18607 | std %f24,[%g4] | |
18608 | ldx [%g4],%g2 | |
18609 | cmp %g3,%g2 ! %f24 = 5e000000 ff000000 | |
18610 | bne %xcc,p0_freg_check_fail | |
18611 | mov 0xf24,%g1 | |
18612 | ldx [%g4+0x90],%g3 | |
18613 | std %f26,[%g4] | |
18614 | ldx [%g4],%g2 | |
18615 | cmp %g3,%g2 ! %f26 = 00ff0000 ff000000 | |
18616 | bne %xcc,p0_freg_check_fail | |
18617 | mov 0xf26,%g1 | |
18618 | ldx [%g4+0x98],%g3 | |
18619 | std %f28,[%g4] | |
18620 | ldx [%g4],%g2 | |
18621 | cmp %g3,%g2 ! %f28 = 000000ff ff000000 | |
18622 | bne %xcc,p0_freg_check_fail | |
18623 | mov 0xf28,%g1 | |
18624 | ldx [%g4+0xa0],%g3 | |
18625 | std %f30,[%g4] | |
18626 | ldx [%g4],%g2 | |
18627 | cmp %g3,%g2 ! %f30 = 00000000 0000007a | |
18628 | bne %xcc,p0_freg_check_fail | |
18629 | mov 0xf30,%g1 | |
18630 | ||
18631 | ! Check Point 87 completed | |
18632 | ||
18633 | ||
18634 | p0_label_436: | |
18635 | ! %l0 = 0000ffff, %l1 = ffffffff, Mem[0000000030181410] = 0000ff8c 0000005e | |
18636 | stda %l0,[%i6+%o5]0x89 ! Mem[0000000030181410] = 0000ffff ffffffff | |
18637 | ! %l7 = 0000000000ff0000, Mem[0000000030081410] = 27000000 | |
18638 | stwa %l7,[%i2+%o5]0x81 ! Mem[0000000030081410] = 00ff0000 | |
18639 | ! %f10 = 64479a75 bb9180c7, %l3 = 0000000000000000 | |
18640 | ! Mem[0000000030081400] = ff0000ffff0000ff | |
18641 | stda %f10,[%i2+%l3]ASI_PST8_SL ! Mem[0000000030081400] = ff0000ffff0000ff | |
18642 | ! %l0 = 000000000000ffff, Mem[0000000020800001] = 6b000db6 | |
18643 | stb %l0,[%o1+0x001] ! Mem[0000000020800000] = 6bff0db6 | |
18644 | ! Mem[0000000030081408] = 000000ff, %l7 = 0000000000ff0000 | |
18645 | swapa [%i2+%o4]0x89,%l7 ! %l7 = 00000000000000ff | |
18646 | ! Mem[0000000010081410] = 00000000, %l7 = 00000000000000ff | |
18647 | ldstuba [%i2+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
18648 | ! %f17 = 000000ff, Mem[0000000010141408] = ff0000ff | |
18649 | sta %f17,[%i5+0x008]%asi ! Mem[0000000010141408] = 000000ff | |
18650 | ! Mem[0000000030181410] = 0000ffff, %l4 = 000000000000ffff | |
18651 | ldstuba [%i6+%o5]0x89,%l4 ! %l4 = 000000ff000000ff | |
18652 | ! Mem[0000000010001408] = ff000000, %l6 = 000000005e000000 | |
18653 | swapa [%i0+%o4]0x80,%l6 ! %l6 = 00000000ff000000 | |
18654 | ! Starting 10 instruction Load Burst | |
18655 | ! Mem[0000000030081400] = ff0000ff, %l5 = 00000000000000ff | |
18656 | lduba [%i2+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
18657 | ||
18658 | p0_label_437: | |
18659 | ! Mem[00000000100c1410] = 00000000 0000005e, %l6 = ff000000, %l7 = 00000000 | |
18660 | ldda [%i3+%o5]0x80,%l6 ! %l6 = 0000000000000000 000000000000005e | |
18661 | ! Mem[00000000100c143c] = e4ff00ff, %l5 = 00000000000000ff | |
18662 | ldsb [%i3+0x03c],%l5 ! %l5 = ffffffffffffffe4 | |
18663 | ! Mem[0000000030041408] = ffffffff, %l6 = 0000000000000000 | |
18664 | lduwa [%i1+%o4]0x81,%l6 ! %l6 = 00000000ffffffff | |
18665 | ! Mem[0000000010041400] = 5e000000, %f15 = ff000000 | |
18666 | lda [%i1+%g0]0x80,%f15 ! %f15 = 5e000000 | |
18667 | ! Mem[0000000010081408] = ff000000 ffffffff, %l4 = 000000ff, %l5 = ffffffe4 | |
18668 | ldda [%i2+%o4]0x80,%l4 ! %l4 = 00000000ff000000 00000000ffffffff | |
18669 | ! Mem[00000000300c1410] = ff000000, %l0 = 000000000000ffff | |
18670 | ldswa [%i3+%o5]0x81,%l0 ! %l0 = ffffffffff000000 | |
18671 | ! Mem[0000000010041408] = 000000ff, %l4 = 00000000ff000000 | |
18672 | lduwa [%i1+%o4]0x88,%l4 ! %l4 = 00000000000000ff | |
18673 | ! Mem[00000000300c1408] = ffffffff, %l7 = 000000000000005e | |
18674 | lduha [%i3+%o4]0x81,%l7 ! %l7 = 000000000000ffff | |
18675 | ! Mem[0000000030081400] = ff0000ff, %f21 = 00000000 | |
18676 | lda [%i2+%g0]0x89,%f21 ! %f21 = ff0000ff | |
18677 | ! Starting 10 instruction Store Burst | |
18678 | ! %l7 = 000000000000ffff, Mem[0000000010001410] = 000000ff | |
18679 | stba %l7,[%i0+%o5]0x88 ! Mem[0000000010001410] = 000000ff | |
18680 | ||
18681 | p0_label_438: | |
18682 | ! %l4 = 00000000000000ff, Mem[0000000010101410] = 00000000 | |
18683 | stha %l4,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00ff0000 | |
18684 | ! %l5 = 00000000ffffffff, Mem[0000000010041400] = 0000005e | |
18685 | stba %l5,[%i1+%g0]0x88 ! Mem[0000000010041400] = 000000ff | |
18686 | ! %l6 = ffffffff, %l7 = 0000ffff, Mem[0000000010001400] = ff000000 000000ff | |
18687 | std %l6,[%i0+%g0] ! Mem[0000000010001400] = ffffffff 0000ffff | |
18688 | ! %l6 = 00000000ffffffff, Mem[0000000010001408] = 0000005e | |
18689 | stha %l6,[%i0+%o4]0x88 ! Mem[0000000010001408] = 0000ffff | |
18690 | ! %l1 = ffffffffffffffff, Mem[0000000010101400] = 00000000 | |
18691 | stba %l1,[%i4+%g0]0x80 ! Mem[0000000010101400] = ff000000 | |
18692 | ! %l5 = 00000000ffffffff, Mem[0000000010001410] = 000000ff | |
18693 | stba %l5,[%i0+%o5]0x88 ! Mem[0000000010001410] = 000000ff | |
18694 | ! %f12 = ffff0000 00000000, Mem[0000000030141400] = 000000ff 00000000 | |
18695 | stda %f12,[%i5+%g0]0x81 ! Mem[0000000030141400] = ffff0000 00000000 | |
18696 | ! %l2 = ff0000ff, %l3 = 00000000, Mem[0000000010081430] = 0fffffff ff000000 | |
18697 | stda %l2,[%i2+0x030]%asi ! Mem[0000000010081430] = ff0000ff 00000000 | |
18698 | ! %f22 = 000000ff, Mem[0000000030081410] = 00ff0000 | |
18699 | sta %f22,[%i2+%o5]0x81 ! Mem[0000000030081410] = 000000ff | |
18700 | ! Starting 10 instruction Load Burst | |
18701 | ! Mem[0000000010181408] = ffffffff, %f11 = bb9180c7 | |
18702 | lda [%i6+%o4]0x80,%f11 ! %f11 = ffffffff | |
18703 | ||
18704 | p0_label_439: | |
18705 | ! Mem[0000000030041410] = 0000ff00ff0000ff, %f14 = 5e000000 5e000000 | |
18706 | ldda [%i1+%o5]0x81,%f14 ! %f14 = 0000ff00 ff0000ff | |
18707 | ! Mem[0000000010101400] = ff000000, %l4 = 00000000000000ff | |
18708 | lduha [%i4+%g0]0x80,%l4 ! %l4 = 000000000000ff00 | |
18709 | ! Mem[0000000030001410] = 00000000, %l1 = ffffffffffffffff | |
18710 | lduba [%i0+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
18711 | ! Mem[0000000030141410] = 00ff000000000000, %l4 = 000000000000ff00 | |
18712 | ldxa [%i5+%o5]0x81,%l4 ! %l4 = 00ff000000000000 | |
18713 | ! Mem[0000000010141420] = 9cffb68affffffff, %f10 = 64479a75 ffffffff | |
18714 | ldda [%i5+0x020]%asi,%f10 ! %f10 = 9cffb68a ffffffff | |
18715 | ! Mem[00000000211c0000] = fffffe0c, %l4 = 00ff000000000000 | |
18716 | ldsh [%o2+%g0],%l4 ! %l4 = ffffffffffffffff | |
18717 | ! Mem[00000000211c0000] = fffffe0c, %l4 = ffffffffffffffff | |
18718 | lduh [%o2+%g0],%l4 ! %l4 = 000000000000ffff | |
18719 | ! Mem[0000000030181410] = ffff0000, %l0 = ffffffffff000000 | |
18720 | ldswa [%i6+%o5]0x81,%l0 ! %l0 = ffffffffffff0000 | |
18721 | ! Mem[000000001010142c] = 0000ffff, %f14 = 0000ff00 | |
18722 | ld [%i4+0x02c],%f14 ! %f14 = 0000ffff | |
18723 | ! Starting 10 instruction Store Burst | |
18724 | ! %f0 = 00000000 0000001a 00000000 0000005e | |
18725 | ! %f4 = ffffffff 000000ff 02226c6b ff0000ff | |
18726 | ! %f8 = 5e27ffff ffffffff 9cffb68a ffffffff | |
18727 | ! %f12 = ffff0000 00000000 0000ffff ff0000ff | |
18728 | stda %f0,[%i2]ASI_BLK_S ! Block Store to 0000000030081400 | |
18729 | ||
18730 | p0_label_440: | |
18731 | ! Mem[000000001004140b] = ff000000, %l1 = 0000000000000000 | |
18732 | ldstuba [%i1+0x00b]%asi,%l1 ! %l1 = 00000000000000ff | |
18733 | ! %f29 = ff000000, Mem[00000000100c1410] = 00000000 | |
18734 | sta %f29,[%i3+%o5]0x80 ! Mem[00000000100c1410] = ff000000 | |
18735 | ! %l1 = 0000000000000000, Mem[0000000010141414] = ff000000, %asi = 80 | |
18736 | stwa %l1,[%i5+0x014]%asi ! Mem[0000000010141414] = 00000000 | |
18737 | ! Mem[0000000010181410] = 000000ff, %l7 = 000000000000ffff | |
18738 | swapa [%i6+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
18739 | ! %l2 = 00000000ff0000ff, Mem[000000001014140c] = ff0027ff | |
18740 | stw %l2,[%i5+0x00c] ! Mem[000000001014140c] = ff0000ff | |
18741 | ! %l7 = 00000000000000ff, Mem[0000000010141410] = 0000005e | |
18742 | stha %l7,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00ff005e | |
18743 | membar #Sync ! Added by membar checker (89) | |
18744 | ! Mem[0000000010081420] = 0000ff00, %l3 = 00000000, %l5 = ffffffff | |
18745 | add %i2,0x20,%g1 | |
18746 | casa [%g1]0x80,%l3,%l5 ! %l5 = 000000000000ff00 | |
18747 | ! %l0 = ffff0000, %l1 = 00000000, Mem[0000000010081418] = 0000578b d9876ee7 | |
18748 | std %l0,[%i2+0x018] ! Mem[0000000010081418] = ffff0000 00000000 | |
18749 | ! Mem[0000000030181410] = 0000ffff, %l3 = 0000000000000000 | |
18750 | ldstuba [%i6+%o5]0x89,%l3 ! %l3 = 000000ff000000ff | |
18751 | ! Starting 10 instruction Load Burst | |
18752 | ! Mem[0000000010001400] = ffffffff0000ffff, %f28 = 000000ff ff000000 | |
18753 | ldda [%i0+%g0]0x80,%f28 ! %f28 = ffffffff 0000ffff | |
18754 | ||
18755 | ! Check Point 88 for processor 0 | |
18756 | ||
18757 | set p0_check_pt_data_88,%g4 | |
18758 | rd %ccr,%g5 ! %g5 = 44 | |
18759 | ldx [%g4+0x08],%g2 | |
18760 | cmp %l0,%g2 ! %l0 = ffffffffffff0000 | |
18761 | bne %xcc,p0_reg_check_fail0 | |
18762 | mov 0xee0,%g1 | |
18763 | ldx [%g4+0x10],%g2 | |
18764 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
18765 | bne %xcc,p0_reg_check_fail1 | |
18766 | mov 0xee1,%g1 | |
18767 | ldx [%g4+0x18],%g2 | |
18768 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
18769 | bne %xcc,p0_reg_check_fail3 | |
18770 | mov 0xee3,%g1 | |
18771 | ldx [%g4+0x20],%g2 | |
18772 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
18773 | bne %xcc,p0_reg_check_fail4 | |
18774 | mov 0xee4,%g1 | |
18775 | ldx [%g4+0x28],%g2 | |
18776 | cmp %l5,%g2 ! %l5 = 000000000000ff00 | |
18777 | bne %xcc,p0_reg_check_fail5 | |
18778 | mov 0xee5,%g1 | |
18779 | ldx [%g4+0x30],%g2 | |
18780 | cmp %l6,%g2 ! %l6 = 00000000ffffffff | |
18781 | bne %xcc,p0_reg_check_fail6 | |
18782 | mov 0xee6,%g1 | |
18783 | ldx [%g4+0x38],%g2 | |
18784 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
18785 | bne %xcc,p0_reg_check_fail7 | |
18786 | mov 0xee7,%g1 | |
18787 | ldx [%g4+0x40],%g3 | |
18788 | std %f4,[%g4] | |
18789 | ldx [%g4],%g2 | |
18790 | cmp %g3,%g2 ! %f4 = ffffffff 000000ff | |
18791 | bne %xcc,p0_freg_check_fail | |
18792 | mov 0xf04,%g1 | |
18793 | ldx [%g4+0x48],%g3 | |
18794 | std %f6,[%g4] | |
18795 | ldx [%g4],%g2 | |
18796 | cmp %g3,%g2 ! %f6 = 02226c6b ff0000ff | |
18797 | bne %xcc,p0_freg_check_fail | |
18798 | mov 0xf06,%g1 | |
18799 | ldx [%g4+0x50],%g3 | |
18800 | std %f10,[%g4] | |
18801 | ldx [%g4],%g2 | |
18802 | cmp %g3,%g2 ! %f10 = 9cffb68a ffffffff | |
18803 | bne %xcc,p0_freg_check_fail | |
18804 | mov 0xf10,%g1 | |
18805 | ldx [%g4+0x58],%g3 | |
18806 | std %f14,[%g4] | |
18807 | ldx [%g4],%g2 | |
18808 | cmp %g3,%g2 ! %f14 = 0000ffff ff0000ff | |
18809 | bne %xcc,p0_freg_check_fail | |
18810 | mov 0xf14,%g1 | |
18811 | ldx [%g4+0x60],%g3 | |
18812 | std %f20,[%g4] | |
18813 | ldx [%g4],%g2 | |
18814 | cmp %g3,%g2 ! %f20 = ff000000 ff0000ff | |
18815 | bne %xcc,p0_freg_check_fail | |
18816 | mov 0xf20,%g1 | |
18817 | ldx [%g4+0x68],%g3 | |
18818 | std %f28,[%g4] | |
18819 | ldx [%g4],%g2 | |
18820 | cmp %g3,%g2 ! %f28 = ffffffff 0000ffff | |
18821 | bne %xcc,p0_freg_check_fail | |
18822 | mov 0xf28,%g1 | |
18823 | ||
18824 | ! Check Point 88 completed | |
18825 | ||
18826 | ||
18827 | p0_label_441: | |
18828 | ! Mem[00000000211c0000] = fffffe0c, %l6 = 00000000ffffffff | |
18829 | ldub [%o2+%g0],%l6 ! %l6 = 00000000000000ff | |
18830 | ! Mem[0000000010081400] = ffff00ff, %l0 = ffffffffffff0000 | |
18831 | lduwa [%i2+%g0]0x80,%l0 ! %l0 = 00000000ffff00ff | |
18832 | ! Mem[0000000010041408] = ff0000ff, %l5 = 000000000000ff00 | |
18833 | lduwa [%i1+%o4]0x88,%l5 ! %l5 = 00000000ff0000ff | |
18834 | ! Mem[0000000010081410] = ff000000, %l0 = 00000000ffff00ff | |
18835 | lduha [%i2+%o5]0x80,%l0 ! %l0 = 000000000000ff00 | |
18836 | ! Mem[0000000010041410] = 0000ffff, %l4 = 000000000000ffff | |
18837 | ldswa [%i1+%o5]0x80,%l4 ! %l4 = 000000000000ffff | |
18838 | ! Mem[00000000100c142c] = 00ff00c4, %f23 = 000000ff | |
18839 | ld [%i3+0x02c],%f23 ! %f23 = 00ff00c4 | |
18840 | ! Mem[0000000010001408] = 000000000000ffff, %f26 = 00ff0000 ff000000 | |
18841 | ldda [%i0+%o4]0x88,%f26 ! %f26 = 00000000 0000ffff | |
18842 | ! Mem[0000000030181408] = ff000000, %l4 = 000000000000ffff | |
18843 | ldsba [%i6+%o4]0x81,%l4 ! %l4 = ffffffffffffffff | |
18844 | ! Mem[0000000010101410] = 000000ff 0000ff00, %l4 = ffffffff, %l5 = ff0000ff | |
18845 | ldda [%i4+%o5]0x88,%l4 ! %l4 = 000000000000ff00 00000000000000ff | |
18846 | ! Starting 10 instruction Store Burst | |
18847 | ! Mem[0000000010181408] = ffffffff, %l6 = 00000000000000ff | |
18848 | swapa [%i6+%o4]0x80,%l6 ! %l6 = 00000000ffffffff | |
18849 | ||
18850 | p0_label_442: | |
18851 | ! %l6 = ffffffff, %l7 = 000000ff, Mem[0000000030041410] = 00ff0000 ff0000ff | |
18852 | stda %l6,[%i1+%o5]0x89 ! Mem[0000000030041410] = ffffffff 000000ff | |
18853 | ! %f5 = 000000ff, Mem[0000000030181408] = ff000000 | |
18854 | sta %f5 ,[%i6+%o4]0x81 ! Mem[0000000030181408] = 000000ff | |
18855 | ! Mem[0000000030181408] = 000000ff, %l0 = 000000000000ff00 | |
18856 | swapa [%i6+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
18857 | ! Mem[0000000030081410] = ffffffff, %l3 = 00000000000000ff | |
18858 | ldstuba [%i2+%o5]0x81,%l3 ! %l3 = 000000ff000000ff | |
18859 | ! %l5 = 00000000000000ff, Mem[0000000010181400] = ff000000ff0000ff | |
18860 | stxa %l5,[%i6+%g0]0x88 ! Mem[0000000010181400] = 00000000000000ff | |
18861 | ! Mem[0000000030081400] = 1a00000000000000, %l5 = 00000000000000ff | |
18862 | ldxa [%i2+%g0]0x89,%l5 ! %l5 = 1a00000000000000 | |
18863 | ! %l4 = 0000ff00, %l5 = 00000000, Mem[0000000010041400] = 000000ff 00000000 | |
18864 | stda %l4,[%i1+%g0]0x88 ! Mem[0000000010041400] = 0000ff00 00000000 | |
18865 | ! Mem[00000000201c0000] = ff001669, %l3 = 00000000000000ff | |
18866 | ldstuba [%o0+0x000]%asi,%l3 ! %l3 = 000000ff000000ff | |
18867 | ! %f15 = ff0000ff, Mem[0000000010001400] = ffffffff | |
18868 | sta %f15,[%i0+%g0]0x88 ! Mem[0000000010001400] = ff0000ff | |
18869 | ! Starting 10 instruction Load Burst | |
18870 | ! Mem[0000000030041400] = 00000000, %l4 = 000000000000ff00 | |
18871 | lduba [%i1+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
18872 | ||
18873 | p0_label_443: | |
18874 | ! Mem[0000000030041410] = ffffffff, %l1 = 0000000000000000 | |
18875 | ldsha [%i1+%o5]0x81,%l1 ! %l1 = ffffffffffffffff | |
18876 | ! Mem[0000000010181410] = 0000ffff, %l0 = 00000000000000ff | |
18877 | ldsba [%i6+%o5]0x88,%l0 ! %l0 = ffffffffffffffff | |
18878 | ! Mem[0000000010101400] = ff000000, %l4 = 0000000000000000 | |
18879 | lduwa [%i4+%g0]0x80,%l4 ! %l4 = 00000000ff000000 | |
18880 | ! Mem[0000000010001400] = ff0000ff, %l6 = 00000000ffffffff | |
18881 | lduha [%i0+%g0]0x80,%l6 ! %l6 = 000000000000ff00 | |
18882 | ! Mem[0000000030001400] = ffffffff, %f15 = ff0000ff | |
18883 | lda [%i0+%g0]0x89,%f15 ! %f15 = ffffffff | |
18884 | ! Mem[0000000030081408] = 000000000000005e, %f26 = 00000000 0000ffff | |
18885 | ldda [%i2+%o4]0x81,%f26 ! %f26 = 00000000 0000005e | |
18886 | ! Mem[0000000010001438] = ffff275effffffff, %f28 = ffffffff 0000ffff | |
18887 | ldda [%i0+0x038]%asi,%f28 ! %f28 = ffff275e ffffffff | |
18888 | ! Mem[0000000010141428] = ff0000ff1a000000, %l2 = 00000000ff0000ff | |
18889 | ldx [%i5+0x028],%l2 ! %l2 = ff0000ff1a000000 | |
18890 | ! Mem[0000000030001410] = 00000000, %f3 = 0000005e | |
18891 | lda [%i0+%o5]0x81,%f3 ! %f3 = 00000000 | |
18892 | ! Starting 10 instruction Store Burst | |
18893 | ! Mem[0000000010081414] = ffff00ff, %l6 = 000000000000ff00, %asi = 80 | |
18894 | swapa [%i2+0x014]%asi,%l6 ! %l6 = 00000000ffff00ff | |
18895 | ||
18896 | p0_label_444: | |
18897 | ! %l6 = 00000000ffff00ff, Mem[0000000010041408] = ff0000ff | |
18898 | stba %l6,[%i1+%o4]0x88 ! Mem[0000000010041408] = ff0000ff | |
18899 | ! Mem[000000001018142c] = ff000000, %l4 = ff000000, %l1 = ffffffff | |
18900 | add %i6,0x2c,%g1 | |
18901 | casa [%g1]0x80,%l4,%l1 ! %l1 = 00000000ff000000 | |
18902 | ! Mem[0000000010081410] = ff000000, %l1 = 00000000ff000000 | |
18903 | swapa [%i2+%o5]0x80,%l1 ! %l1 = 00000000ff000000 | |
18904 | ! Mem[0000000010101408] = 032cff8e, %l5 = 1a00000000000000 | |
18905 | swap [%i4+%o4],%l5 ! %l5 = 00000000032cff8e | |
18906 | ! %f0 = 00000000 0000001a, Mem[0000000030141410] = 0000ff00 00000000 | |
18907 | stda %f0 ,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00000000 0000001a | |
18908 | ! %f12 = ffff0000 00000000, Mem[0000000030081408] = 00000000 5e000000 | |
18909 | stda %f12,[%i2+%o4]0x89 ! Mem[0000000030081408] = ffff0000 00000000 | |
18910 | ! %f18 = ffffffff ffffffff, Mem[00000000300c1410] = ff000000 00000000 | |
18911 | stda %f18,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ffffffff ffffffff | |
18912 | ! Mem[0000000030101410] = 0000005e, %l7 = 00000000000000ff | |
18913 | swapa [%i4+%o5]0x89,%l7 ! %l7 = 000000000000005e | |
18914 | ! Mem[0000000030141408] = ffffffff, %l5 = 00000000032cff8e | |
18915 | ldstuba [%i5+%o4]0x89,%l5 ! %l5 = 000000ff000000ff | |
18916 | ! Starting 10 instruction Load Burst | |
18917 | ! Mem[00000000300c1400] = 0000005e, %l7 = 000000000000005e | |
18918 | lduba [%i3+%g0]0x89,%l7 ! %l7 = 000000000000005e | |
18919 | ||
18920 | p0_label_445: | |
18921 | ! Mem[0000000010001408] = 000000000000ffff, %f4 = ffffffff 000000ff | |
18922 | ldda [%i0+%o4]0x88,%f4 ! %f4 = 00000000 0000ffff | |
18923 | ! Mem[0000000030101410] = ff000000, %f22 = 000000ff | |
18924 | lda [%i4+%o5]0x81,%f22 ! %f22 = ff000000 | |
18925 | ! Mem[0000000030101410] = ff000000000000ff, %l7 = 000000000000005e | |
18926 | ldxa [%i4+%o5]0x89,%l7 ! %l7 = ff000000000000ff | |
18927 | ! Mem[0000000020800000] = 6bff0db6, %l5 = 00000000000000ff | |
18928 | lduha [%o1+0x000]%asi,%l5 ! %l5 = 0000000000006bff | |
18929 | ! Mem[0000000010181410] = 000000000000ffff, %f20 = ff000000 ff0000ff | |
18930 | ldda [%i6+%o5]0x88,%f20 ! %f20 = 00000000 0000ffff | |
18931 | ! Mem[0000000030141410] = 1a000000, %l1 = 00000000ff000000 | |
18932 | lduba [%i5+%o5]0x81,%l1 ! %l1 = 000000000000001a | |
18933 | ! Mem[0000000030081400] = 00000000, %l0 = ffffffffffffffff | |
18934 | lduwa [%i2+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
18935 | ! Mem[0000000030181400] = ff0000ff, %l2 = ff0000ff1a000000 | |
18936 | ldswa [%i6+%g0]0x89,%l2 ! %l2 = ffffffffff0000ff | |
18937 | ! Mem[00000000100c1408] = 8ab6e09cffffffff, %l5 = 0000000000006bff | |
18938 | ldxa [%i3+%o4]0x88,%l5 ! %l5 = 8ab6e09cffffffff | |
18939 | ! Starting 10 instruction Store Burst | |
18940 | ! Mem[0000000010001400] = ff0000ff, %l6 = 00000000ffff00ff | |
18941 | ldstuba [%i0+%g0]0x80,%l6 ! %l6 = 000000ff000000ff | |
18942 | ||
18943 | ! Check Point 89 for processor 0 | |
18944 | ||
18945 | set p0_check_pt_data_89,%g4 | |
18946 | rd %ccr,%g5 ! %g5 = 44 | |
18947 | ldx [%g4+0x08],%g2 | |
18948 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
18949 | bne %xcc,p0_reg_check_fail0 | |
18950 | mov 0xee0,%g1 | |
18951 | ldx [%g4+0x10],%g2 | |
18952 | cmp %l1,%g2 ! %l1 = 000000000000001a | |
18953 | bne %xcc,p0_reg_check_fail1 | |
18954 | mov 0xee1,%g1 | |
18955 | ldx [%g4+0x18],%g2 | |
18956 | cmp %l2,%g2 ! %l2 = ffffffffff0000ff | |
18957 | bne %xcc,p0_reg_check_fail2 | |
18958 | mov 0xee2,%g1 | |
18959 | ldx [%g4+0x20],%g2 | |
18960 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
18961 | bne %xcc,p0_reg_check_fail3 | |
18962 | mov 0xee3,%g1 | |
18963 | ldx [%g4+0x28],%g2 | |
18964 | cmp %l4,%g2 ! %l4 = 00000000ff000000 | |
18965 | bne %xcc,p0_reg_check_fail4 | |
18966 | mov 0xee4,%g1 | |
18967 | ldx [%g4+0x30],%g2 | |
18968 | cmp %l5,%g2 ! %l5 = 8ab6e09cffffffff | |
18969 | bne %xcc,p0_reg_check_fail5 | |
18970 | mov 0xee5,%g1 | |
18971 | ldx [%g4+0x38],%g2 | |
18972 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
18973 | bne %xcc,p0_reg_check_fail6 | |
18974 | mov 0xee6,%g1 | |
18975 | ldx [%g4+0x40],%g2 | |
18976 | cmp %l7,%g2 ! %l7 = ff000000000000ff | |
18977 | bne %xcc,p0_reg_check_fail7 | |
18978 | mov 0xee7,%g1 | |
18979 | ldx [%g4+0x48],%g3 | |
18980 | std %f2,[%g4] | |
18981 | ldx [%g4],%g2 | |
18982 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
18983 | bne %xcc,p0_freg_check_fail | |
18984 | mov 0xf02,%g1 | |
18985 | ldx [%g4+0x50],%g3 | |
18986 | std %f4,[%g4] | |
18987 | ldx [%g4],%g2 | |
18988 | cmp %g3,%g2 ! %f4 = 00000000 0000ffff | |
18989 | bne %xcc,p0_freg_check_fail | |
18990 | mov 0xf04,%g1 | |
18991 | ldx [%g4+0x58],%g3 | |
18992 | std %f14,[%g4] | |
18993 | ldx [%g4],%g2 | |
18994 | cmp %g3,%g2 ! %f14 = 0000ffff ffffffff | |
18995 | bne %xcc,p0_freg_check_fail | |
18996 | mov 0xf14,%g1 | |
18997 | ldx [%g4+0x60],%g3 | |
18998 | std %f20,[%g4] | |
18999 | ldx [%g4],%g2 | |
19000 | cmp %g3,%g2 ! %f20 = 00000000 0000ffff | |
19001 | bne %xcc,p0_freg_check_fail | |
19002 | mov 0xf20,%g1 | |
19003 | ldx [%g4+0x68],%g3 | |
19004 | std %f22,[%g4] | |
19005 | ldx [%g4],%g2 | |
19006 | cmp %g3,%g2 ! %f22 = ff000000 00ff00c4 | |
19007 | bne %xcc,p0_freg_check_fail | |
19008 | mov 0xf22,%g1 | |
19009 | ldx [%g4+0x70],%g3 | |
19010 | std %f26,[%g4] | |
19011 | ldx [%g4],%g2 | |
19012 | cmp %g3,%g2 ! %f26 = 00000000 0000005e | |
19013 | bne %xcc,p0_freg_check_fail | |
19014 | mov 0xf26,%g1 | |
19015 | ldx [%g4+0x78],%g3 | |
19016 | std %f28,[%g4] | |
19017 | ldx [%g4],%g2 | |
19018 | cmp %g3,%g2 ! %f28 = ffff275e ffffffff | |
19019 | bne %xcc,p0_freg_check_fail | |
19020 | mov 0xf28,%g1 | |
19021 | ||
19022 | ! Check Point 89 completed | |
19023 | ||
19024 | ||
19025 | p0_label_446: | |
19026 | ! %l3 = 00000000000000ff, Mem[0000000030141408] = ffffffff | |
19027 | stba %l3,[%i5+%o4]0x89 ! Mem[0000000030141408] = ffffffff | |
19028 | ! %l0 = 00000000, %l1 = 0000001a, Mem[0000000030041400] = 00000000 ff000000 | |
19029 | stda %l0,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00000000 0000001a | |
19030 | ! %l2 = ffffffffff0000ff, Mem[00000000211c0000] = fffffe0c | |
19031 | stb %l2,[%o2+%g0] ! Mem[00000000211c0000] = fffffe0c | |
19032 | ! %f20 = 00000000 0000ffff, %l4 = 00000000ff000000 | |
19033 | ! Mem[0000000010041430] = 9ce0b68affff275e | |
19034 | add %i1,0x030,%g1 | |
19035 | stda %f20,[%g1+%l4]ASI_PST16_PL ! Mem[0000000010041430] = 9ce0b68affff275e | |
19036 | ! %f14 = 0000ffff, Mem[00000000300c1408] = ffffffff | |
19037 | sta %f14,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 0000ffff | |
19038 | ! Mem[00000000300c1410] = ffffffff, %l1 = 000000000000001a | |
19039 | ldstuba [%i3+%o5]0x81,%l1 ! %l1 = 000000ff000000ff | |
19040 | ! Mem[0000000010041408] = ff0000ff, %l0 = 0000000000000000, %asi = 80 | |
19041 | swapa [%i1+0x008]%asi,%l0 ! %l0 = 00000000ff0000ff | |
19042 | ! %l3 = 00000000000000ff, Mem[0000000030141408] = ffffffff | |
19043 | stha %l3,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00ffffff | |
19044 | ! Mem[0000000030101408] = ff0000ff, %l1 = 00000000000000ff | |
19045 | swapa [%i4+%o4]0x81,%l1 ! %l1 = 00000000ff0000ff | |
19046 | ! Starting 10 instruction Load Burst | |
19047 | ! Mem[0000000030041408] = ffffffff, %l3 = 00000000000000ff | |
19048 | ldsha [%i1+%o4]0x89,%l3 ! %l3 = ffffffffffffffff | |
19049 | ||
19050 | p0_label_447: | |
19051 | ! Mem[0000000010081400] = 0000ff00 ff00ffff, %l6 = 000000ff, %l7 = 000000ff | |
19052 | ldda [%i2+%g0]0x88,%l6 ! %l6 = 00000000ff00ffff 000000000000ff00 | |
19053 | ! Mem[0000000010101408] = 00000000, %l7 = 000000000000ff00 | |
19054 | ldsba [%i4+%o4]0x88,%l7 ! %l7 = 0000000000000000 | |
19055 | ! Mem[0000000010101410] = 000000ff 0000ff00, %l4 = ff000000, %l5 = ffffffff | |
19056 | ldda [%i4+%o5]0x88,%l4 ! %l4 = 000000000000ff00 00000000000000ff | |
19057 | ! Mem[0000000030141408] = ffffffffffffff00, %l4 = 000000000000ff00 | |
19058 | ldxa [%i5+%o4]0x89,%l4 ! %l4 = ffffffffffffff00 | |
19059 | ! Mem[0000000010101408] = 0000ff0000000000, %l2 = ffffffffff0000ff | |
19060 | ldxa [%i4+%o4]0x88,%l2 ! %l2 = 0000ff0000000000 | |
19061 | ! Mem[0000000010041430] = 9ce0b68a, %f25 = ff000000 | |
19062 | ld [%i1+0x030],%f25 ! %f25 = 9ce0b68a | |
19063 | ! Mem[0000000030101408] = 000000ff, %l4 = ffffffffffffff00 | |
19064 | ldswa [%i4+%o4]0x81,%l4 ! %l4 = 00000000000000ff | |
19065 | ! Mem[0000000010101430] = 000000ff, %l1 = 00000000ff0000ff | |
19066 | lduh [%i4+0x030],%l1 ! %l1 = 0000000000000000 | |
19067 | ! Mem[0000000030141410] = 1a000000, %l4 = 00000000000000ff | |
19068 | lduwa [%i5+%o5]0x81,%l4 ! %l4 = 000000001a000000 | |
19069 | ! Starting 10 instruction Store Burst | |
19070 | ! Mem[0000000020800040] = 00009ffa, %l3 = ffffffffffffffff | |
19071 | ldstub [%o1+0x040],%l3 ! %l3 = 00000000000000ff | |
19072 | ||
19073 | p0_label_448: | |
19074 | ! Mem[00000000300c1400] = 0000005e, %l2 = 0000ff0000000000 | |
19075 | ldstuba [%i3+%g0]0x89,%l2 ! %l2 = 0000005e000000ff | |
19076 | ! Mem[0000000010081408] = ff000000, %l5 = 00000000000000ff | |
19077 | swapa [%i2+%o4]0x80,%l5 ! %l5 = 00000000ff000000 | |
19078 | ! Mem[0000000010141408] = 000000ff, %l0 = 00000000ff0000ff | |
19079 | ldstuba [%i5+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
19080 | ! %l0 = 0000000000000000, Mem[0000000010001410] = ff000000 | |
19081 | stha %l0,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 | |
19082 | ! %l6 = ff00ffff, %l7 = 00000000, Mem[0000000010101410] = 0000ff00 000000ff | |
19083 | stda %l6,[%i4+%o5]0x88 ! Mem[0000000010101410] = ff00ffff 00000000 | |
19084 | ! %l3 = 0000000000000000, Mem[0000000030181400] = ff0000ff | |
19085 | stba %l3,[%i6+%g0]0x89 ! Mem[0000000030181400] = ff000000 | |
19086 | ! Mem[0000000030181408] = 0000ff00, %l4 = 000000001a000000 | |
19087 | ldstuba [%i6+%o4]0x81,%l4 ! %l4 = 00000000000000ff | |
19088 | ! %l5 = 00000000ff000000, Mem[0000000010101408] = 00000000 | |
19089 | stha %l5,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000 | |
19090 | ! %f24 = 5e000000 9ce0b68a, Mem[00000000100c1400] = 00ff00ff 00000000 | |
19091 | stda %f24,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 5e000000 9ce0b68a | |
19092 | ! Starting 10 instruction Load Burst | |
19093 | ! Mem[0000000010141408] = ff0000ff, %l6 = 00000000ff00ffff | |
19094 | lduba [%i5+%o4]0x88,%l6 ! %l6 = 00000000000000ff | |
19095 | ||
19096 | p0_label_449: | |
19097 | ! Mem[0000000030001410] = 00000000, %l6 = 00000000000000ff | |
19098 | ldswa [%i0+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
19099 | ! Mem[00000000300c1408] = 000000000000ffff, %f26 = 00000000 0000005e | |
19100 | ldda [%i3+%o4]0x89,%f26 ! %f26 = 00000000 0000ffff | |
19101 | ! Mem[0000000030001400] = ffffffff, %l7 = 0000000000000000 | |
19102 | ldsha [%i0+%g0]0x81,%l7 ! %l7 = ffffffffffffffff | |
19103 | ! Mem[00000000201c0000] = ff001669, %l3 = 0000000000000000 | |
19104 | ldub [%o0+0x001],%l3 ! %l3 = 0000000000000000 | |
19105 | ! Mem[0000000030181408] = 00ff00ff, %l6 = 0000000000000000 | |
19106 | ldswa [%i6+%o4]0x89,%l6 ! %l6 = 0000000000ff00ff | |
19107 | ! Mem[0000000030101400] = 000027ff000000ff, %l6 = 0000000000ff00ff | |
19108 | ldxa [%i4+%g0]0x89,%l6 ! %l6 = 000027ff000000ff | |
19109 | ! Mem[0000000010041400] = 00ff0000, %l5 = 00000000ff000000 | |
19110 | lduba [%i1+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
19111 | ! Mem[0000000021800180] = ffffdb07, %l3 = 0000000000000000 | |
19112 | ldsb [%o3+0x180],%l3 ! %l3 = ffffffffffffffff | |
19113 | ! Mem[00000000300c1400] = ff000000, %l1 = 0000000000000000 | |
19114 | lduwa [%i3+%g0]0x81,%l1 ! %l1 = 00000000ff000000 | |
19115 | ! Starting 10 instruction Store Burst | |
19116 | ! %l5 = 0000000000000000, Mem[00000000300c1410] = ffffffff | |
19117 | stha %l5,[%i3+%o5]0x89 ! Mem[00000000300c1410] = ffff0000 | |
19118 | ||
19119 | p0_label_450: | |
19120 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000030041410] = ffffffff 000000ff | |
19121 | stda %l4,[%i1+%o5]0x89 ! Mem[0000000030041410] = 00000000 00000000 | |
19122 | ! %l5 = 0000000000000000, Mem[0000000030141408] = 00ffffff | |
19123 | stwa %l5,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 | |
19124 | ! Mem[0000000010181400] = ff000000, %l3 = ffffffffffffffff | |
19125 | ldstuba [%i6+%g0]0x80,%l3 ! %l3 = 000000ff000000ff | |
19126 | ! %l7 = ffffffffffffffff, Mem[0000000010141406] = 00000000, %asi = 80 | |
19127 | stba %l7,[%i5+0x006]%asi ! Mem[0000000010141404] = 0000ff00 | |
19128 | ! %l7 = ffffffffffffffff, Mem[0000000030001400] = 5e27ffffffffffff | |
19129 | stxa %l7,[%i0+%g0]0x89 ! Mem[0000000030001400] = ffffffffffffffff | |
19130 | ! %l7 = ffffffffffffffff, Mem[0000000030181408] = ff00ff00 | |
19131 | stha %l7,[%i6+%o4]0x81 ! Mem[0000000030181408] = ffffff00 | |
19132 | ! %f28 = ffff275e ffffffff, Mem[0000000010181410] = ffff0000 00000000 | |
19133 | stda %f28,[%i6+%o5]0x80 ! Mem[0000000010181410] = ffff275e ffffffff | |
19134 | ! %l2 = 000000000000005e, Mem[00000000300c1400] = ff000000 | |
19135 | stha %l2,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 005e0000 | |
19136 | ! Mem[0000000030141400] = 0000ffff, %l1 = 00000000ff000000 | |
19137 | ldstuba [%i5+%g0]0x89,%l1 ! %l1 = 000000ff000000ff | |
19138 | ! Starting 10 instruction Load Burst | |
19139 | ! Mem[00000000100c1400] = 9ce0b68a, %f6 = 02226c6b | |
19140 | lda [%i3+%g0]0x88,%f6 ! %f6 = 9ce0b68a | |
19141 | ||
19142 | ! Check Point 90 for processor 0 | |
19143 | ||
19144 | set p0_check_pt_data_90,%g4 | |
19145 | rd %ccr,%g5 ! %g5 = 44 | |
19146 | ldx [%g4+0x08],%g2 | |
19147 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
19148 | bne %xcc,p0_reg_check_fail0 | |
19149 | mov 0xee0,%g1 | |
19150 | ldx [%g4+0x10],%g2 | |
19151 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
19152 | bne %xcc,p0_reg_check_fail1 | |
19153 | mov 0xee1,%g1 | |
19154 | ldx [%g4+0x18],%g2 | |
19155 | cmp %l2,%g2 ! %l2 = 000000000000005e | |
19156 | bne %xcc,p0_reg_check_fail2 | |
19157 | mov 0xee2,%g1 | |
19158 | ldx [%g4+0x20],%g2 | |
19159 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
19160 | bne %xcc,p0_reg_check_fail3 | |
19161 | mov 0xee3,%g1 | |
19162 | ldx [%g4+0x28],%g2 | |
19163 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
19164 | bne %xcc,p0_reg_check_fail4 | |
19165 | mov 0xee4,%g1 | |
19166 | ldx [%g4+0x30],%g2 | |
19167 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
19168 | bne %xcc,p0_reg_check_fail5 | |
19169 | mov 0xee5,%g1 | |
19170 | ldx [%g4+0x38],%g2 | |
19171 | cmp %l6,%g2 ! %l6 = 000027ff000000ff | |
19172 | bne %xcc,p0_reg_check_fail6 | |
19173 | mov 0xee6,%g1 | |
19174 | ldx [%g4+0x40],%g2 | |
19175 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
19176 | bne %xcc,p0_reg_check_fail7 | |
19177 | mov 0xee7,%g1 | |
19178 | ldx [%g4+0x48],%g3 | |
19179 | std %f4,[%g4] | |
19180 | ldx [%g4],%g2 | |
19181 | cmp %g3,%g2 ! %f4 = 00000000 0000ffff | |
19182 | bne %xcc,p0_freg_check_fail | |
19183 | mov 0xf04,%g1 | |
19184 | ldx [%g4+0x50],%g3 | |
19185 | std %f6,[%g4] | |
19186 | ldx [%g4],%g2 | |
19187 | cmp %g3,%g2 ! %f6 = 9ce0b68a ff0000ff | |
19188 | bne %xcc,p0_freg_check_fail | |
19189 | mov 0xf06,%g1 | |
19190 | ldx [%g4+0x58],%g3 | |
19191 | std %f24,[%g4] | |
19192 | ldx [%g4],%g2 | |
19193 | cmp %g3,%g2 ! %f24 = 5e000000 9ce0b68a | |
19194 | bne %xcc,p0_freg_check_fail | |
19195 | mov 0xf24,%g1 | |
19196 | ldx [%g4+0x60],%g3 | |
19197 | std %f26,[%g4] | |
19198 | ldx [%g4],%g2 | |
19199 | cmp %g3,%g2 ! %f26 = 00000000 0000ffff | |
19200 | bne %xcc,p0_freg_check_fail | |
19201 | mov 0xf26,%g1 | |
19202 | ||
19203 | ! Check Point 90 completed | |
19204 | ||
19205 | ||
19206 | p0_label_451: | |
19207 | ! Code Fragment 3 | |
19208 | p0_fragment_9: | |
19209 | ! %l0 = 0000000000000000 | |
19210 | setx 0x400446a7d1945623,%g7,%l0 ! %l0 = 400446a7d1945623 | |
19211 | ! %l1 = 00000000000000ff | |
19212 | setx 0xcc7ea147d723c661,%g7,%l1 ! %l1 = cc7ea147d723c661 | |
19213 | setx 0x1fe000, %g1, %g3 | |
19214 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
19215 | setx 0x1ffff8, %g1, %g2 | |
19216 | and %l0, %g2, %l0 | |
19217 | ta T_CHANGE_HPRIV | |
19218 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
19219 | ta T_CHANGE_NONHPRIV | |
19220 | ! %l0 = 400446a7d1945623 | |
19221 | setx 0xe7b35dffda35cb00,%g7,%l0 ! %l0 = e7b35dffda35cb00 | |
19222 | ! %l1 = cc7ea147d723c661 | |
19223 | setx 0x43b3b577eb1bf662,%g7,%l1 ! %l1 = 43b3b577eb1bf662 | |
19224 | membar #Sync ! Added by membar checker (90) | |
19225 | ! Mem[0000000030141400] = ffff0000 00000000 00000000 ffffffff | |
19226 | ! Mem[0000000030141410] = 1a000000 00000000 02226c6b 57119e5e | |
19227 | ! Mem[0000000030141420] = 925b1ad8 39aced3b 64479a75 bb9180c7 | |
19228 | ! Mem[0000000030141430] = ffffffff 365fc6fa ffffffff 000000ff | |
19229 | ldda [%i5]ASI_BLK_AIUS,%f0 ! Block Load from 0000000030141400 | |
19230 | ! Mem[0000000030141400] = 000000000000ffff, %f20 = 00000000 0000ffff | |
19231 | ldda [%i5+%g0]0x89,%f20 ! %f20 = 00000000 0000ffff | |
19232 | ! Mem[0000000030181410] = 0000ffff, %l6 = 000027ff000000ff | |
19233 | lduba [%i6+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
19234 | ! Mem[0000000010141400] = ffff00000000ff00, %l3 = 00000000000000ff | |
19235 | ldxa [%i5+%g0]0x80,%l3 ! %l3 = ffff00000000ff00 | |
19236 | ! Mem[0000000030141400] = 0000ffff, %l0 = e7b35dffda35cb00 | |
19237 | ldswa [%i5+%g0]0x89,%l0 ! %l0 = 000000000000ffff | |
19238 | ! Mem[0000000010001420] = 00000000000000ff, %f24 = 5e000000 9ce0b68a | |
19239 | ldda [%i0+0x020]%asi,%f24 ! %f24 = 00000000 000000ff | |
19240 | ! Mem[00000000100c1408] = ffffffff9ce0b68a, %f16 = ff0000ff 000000ff | |
19241 | ldda [%i3+%o4]0x80,%f16 ! %f16 = ffffffff 9ce0b68a | |
19242 | ! Mem[0000000030041408] = ffffffff, %l6 = 00000000000000ff | |
19243 | ldswa [%i1+%o4]0x81,%l6 ! %l6 = ffffffffffffffff | |
19244 | ! Starting 10 instruction Store Burst | |
19245 | ! %l0 = 000000000000ffff, Mem[0000000010081410] = ff0000000000ff00, %asi = 80 | |
19246 | stxa %l0,[%i2+0x010]%asi ! Mem[0000000010081410] = 000000000000ffff | |
19247 | ||
19248 | p0_label_452: | |
19249 | ! Mem[0000000010001410] = 00000000, %l1 = 43b3b577eb1bf662 | |
19250 | ldstuba [%i0+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
19251 | ! %f27 = 0000ffff, Mem[0000000010101410] = ff00ffff | |
19252 | sta %f27,[%i4+%o5]0x88 ! Mem[0000000010101410] = 0000ffff | |
19253 | ! Mem[00000000218000c0] = 00ff4e2c, %l5 = 0000000000000000 | |
19254 | ldstuba [%o3+0x0c0]%asi,%l5 ! %l5 = 00000000000000ff | |
19255 | ! %l5 = 0000000000000000, Mem[0000000030041400] = 00000000 | |
19256 | stba %l5,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00000000 | |
19257 | ! %l6 = ffffffffffffffff, Mem[0000000010081410] = 00000000 | |
19258 | stba %l6,[%i2+%o5]0x80 ! Mem[0000000010081410] = ff000000 | |
19259 | ! %l7 = ffffffffffffffff, Mem[00000000211c0001] = fffffe0c, %asi = 80 | |
19260 | stba %l7,[%o2+0x001]%asi ! Mem[00000000211c0000] = fffffe0c | |
19261 | ! %f28 = ffff275e ffffffff, %l0 = 000000000000ffff | |
19262 | ! Mem[0000000010081410] = ff0000000000ffff | |
19263 | add %i2,0x010,%g1 | |
19264 | stda %f28,[%g1+%l0]ASI_PST8_P ! Mem[0000000010081410] = ffff275effffffff | |
19265 | ! %l2 = 0000005e, %l3 = 0000ff00, Mem[0000000010141408] = ff0000ff ff0000ff | |
19266 | stda %l2,[%i5+%o4]0x88 ! Mem[0000000010141408] = 0000005e 0000ff00 | |
19267 | ! %l2 = 000000000000005e, immed = 00000c26, %y = 00000006 | |
19268 | sdiv %l2,0xc26,%l1 ! %l1 = 00000000007e6f9e | |
19269 | mov %l0,%y ! %y = 0000ffff | |
19270 | ! Starting 10 instruction Load Burst | |
19271 | ! Mem[0000000021800140] = 0000f8a0, %l3 = ffff00000000ff00 | |
19272 | ldsb [%o3+0x141],%l3 ! %l3 = 0000000000000000 | |
19273 | ||
19274 | p0_label_453: | |
19275 | ! Mem[00000000300c1410] = 0000ffff, %l0 = 000000000000ffff | |
19276 | ldsba [%i3+%o5]0x81,%l0 ! %l0 = 0000000000000000 | |
19277 | ! Mem[0000000030001400] = ffffffff ffffffff, %l0 = 00000000, %l1 = 007e6f9e | |
19278 | ldda [%i0+%g0]0x81,%l0 ! %l0 = 00000000ffffffff 00000000ffffffff | |
19279 | ! Mem[0000000010101408] = 0000000000ff0000, %l4 = 0000000000000000 | |
19280 | ldxa [%i4+0x008]%asi,%l4 ! %l4 = 0000000000ff0000 | |
19281 | ! Mem[0000000010001408] = 0000ffff, %l3 = 0000000000000000 | |
19282 | ldsha [%i0+%o4]0x88,%l3 ! %l3 = ffffffffffffffff | |
19283 | ! Mem[00000000201c0000] = ff001669, %l6 = ffffffffffffffff | |
19284 | lduba [%o0+0x000]%asi,%l6 ! %l6 = 00000000000000ff | |
19285 | ! Mem[0000000010181410] = 5e27ffff, %l6 = 00000000000000ff | |
19286 | lduwa [%i6+%o5]0x88,%l6 ! %l6 = 000000005e27ffff | |
19287 | ! Mem[0000000030001400] = ffffffff, %l3 = ffffffffffffffff | |
19288 | lduba [%i0+%g0]0x81,%l3 ! %l3 = 00000000000000ff | |
19289 | ! Mem[0000000030081410] = ffffffff, %l2 = 000000000000005e | |
19290 | ldsba [%i2+%o5]0x89,%l2 ! %l2 = ffffffffffffffff | |
19291 | ! Mem[0000000010101400] = 000000ff, %l4 = 0000000000ff0000 | |
19292 | ldswa [%i4+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
19293 | ! Starting 10 instruction Store Burst | |
19294 | ! Mem[0000000030001410] = 00000000, %l5 = 0000000000000000 | |
19295 | swapa [%i0+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
19296 | ||
19297 | p0_label_454: | |
19298 | ! %l6 = 5e27ffff, %l7 = ffffffff, Mem[0000000010041408] = 00000000 ff000000 | |
19299 | stda %l6,[%i1+0x008]%asi ! Mem[0000000010041408] = 5e27ffff ffffffff | |
19300 | ! Mem[0000000010001427] = 000000ff, %l5 = 0000000000000000 | |
19301 | ldstuba [%i0+0x027]%asi,%l5 ! %l5 = 000000ff000000ff | |
19302 | ! %f24 = 00000000 000000ff, Mem[0000000030101410] = ff000000 000000ff | |
19303 | stda %f24,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00000000 000000ff | |
19304 | ! Mem[0000000010001400] = ff0000ff, %l5 = 00000000000000ff | |
19305 | swapa [%i0+%g0]0x88,%l5 ! %l5 = 00000000ff0000ff | |
19306 | ! %l3 = 00000000000000ff, Mem[0000000010181400] = ff000000 | |
19307 | stwa %l3,[%i6+%g0]0x80 ! Mem[0000000010181400] = 000000ff | |
19308 | ! %l2 = ffffffffffffffff, Mem[0000000030001410] = 0000000000000000 | |
19309 | stxa %l2,[%i0+%o5]0x81 ! Mem[0000000030001410] = ffffffffffffffff | |
19310 | ! %l0 = ffffffff, %l1 = ffffffff, Mem[0000000010081418] = ffff0000 00000000 | |
19311 | stda %l0,[%i2+0x018]%asi ! Mem[0000000010081418] = ffffffff ffffffff | |
19312 | ! Mem[0000000030001410] = ffffffff, %l3 = 00000000000000ff | |
19313 | swapa [%i0+%o5]0x89,%l3 ! %l3 = 00000000ffffffff | |
19314 | ! %l4 = 00000000000000ff, Mem[0000000010101410] = 000000000000ffff | |
19315 | stxa %l4,[%i4+%o5]0x88 ! Mem[0000000010101410] = 00000000000000ff | |
19316 | ! Starting 10 instruction Load Burst | |
19317 | ! Mem[00000000218001c0] = 00fffa38, %l0 = 00000000ffffffff | |
19318 | ldub [%o3+0x1c0],%l0 ! %l0 = 0000000000000000 | |
19319 | ||
19320 | p0_label_455: | |
19321 | ! Mem[00000000100c1408] = ffffffff, %l0 = 0000000000000000 | |
19322 | ldswa [%i3+%o4]0x80,%l0 ! %l0 = ffffffffffffffff | |
19323 | ! Mem[0000000020800040] = ff009ffa, %l0 = ffffffffffffffff | |
19324 | ldsba [%o1+0x041]%asi,%l0 ! %l0 = 0000000000000000 | |
19325 | ! Mem[000000001018143c] = 0000007a, %l7 = ffffffffffffffff | |
19326 | ldsb [%i6+0x03d],%l7 ! %l7 = 0000000000000000 | |
19327 | ! Mem[00000000100c1408] = ffffffff, %l6 = 000000005e27ffff | |
19328 | ldsba [%i3+%o4]0x80,%l6 ! %l6 = ffffffffffffffff | |
19329 | ! Mem[0000000010181438] = 00000000, %l6 = ffffffffffffffff | |
19330 | ldswa [%i6+0x038]%asi,%l6 ! %l6 = 0000000000000000 | |
19331 | ! Mem[00000000300c1410] = ffffffff ffff0000, %l4 = 000000ff, %l5 = ff0000ff | |
19332 | ldda [%i3+%o5]0x89,%l4 ! %l4 = 00000000ffff0000 00000000ffffffff | |
19333 | ! Mem[0000000010081410] = ffff275e ffffffff, %l4 = ffff0000, %l5 = ffffffff | |
19334 | ldda [%i2+%o5]0x80,%l4 ! %l4 = 00000000ffff275e 00000000ffffffff | |
19335 | ! Mem[00000000300c1400] = 00005e00, %l5 = 00000000ffffffff | |
19336 | ldsha [%i3+%g0]0x89,%l5 ! %l5 = 0000000000005e00 | |
19337 | ! Mem[00000000100c1404] = 0000005e, %l5 = 0000000000005e00 | |
19338 | ldsba [%i3+0x006]%asi,%l5 ! %l5 = 0000000000000000 | |
19339 | ! Starting 10 instruction Store Burst | |
19340 | membar #Sync ! Added by membar checker (91) | |
19341 | ! %f28 = ffff275e ffffffff, Mem[0000000030141400] = ffff0000 00000000 | |
19342 | stda %f28,[%i5+%g0]0x81 ! Mem[0000000030141400] = ffff275e ffffffff | |
19343 | ||
19344 | ! Check Point 91 for processor 0 | |
19345 | ||
19346 | set p0_check_pt_data_91,%g4 | |
19347 | rd %ccr,%g5 ! %g5 = 44 | |
19348 | ldx [%g4+0x08],%g2 | |
19349 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
19350 | bne %xcc,p0_reg_check_fail0 | |
19351 | mov 0xee0,%g1 | |
19352 | ldx [%g4+0x10],%g2 | |
19353 | cmp %l1,%g2 ! %l1 = 00000000ffffffff | |
19354 | bne %xcc,p0_reg_check_fail1 | |
19355 | mov 0xee1,%g1 | |
19356 | ldx [%g4+0x18],%g2 | |
19357 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
19358 | bne %xcc,p0_reg_check_fail2 | |
19359 | mov 0xee2,%g1 | |
19360 | ldx [%g4+0x20],%g2 | |
19361 | cmp %l3,%g2 ! %l3 = 00000000ffffffff | |
19362 | bne %xcc,p0_reg_check_fail3 | |
19363 | mov 0xee3,%g1 | |
19364 | ldx [%g4+0x28],%g2 | |
19365 | cmp %l4,%g2 ! %l4 = 00000000ffff275e | |
19366 | bne %xcc,p0_reg_check_fail4 | |
19367 | mov 0xee4,%g1 | |
19368 | ldx [%g4+0x30],%g2 | |
19369 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
19370 | bne %xcc,p0_reg_check_fail5 | |
19371 | mov 0xee5,%g1 | |
19372 | ldx [%g4+0x38],%g2 | |
19373 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
19374 | bne %xcc,p0_reg_check_fail6 | |
19375 | mov 0xee6,%g1 | |
19376 | ldx [%g4+0x40],%g2 | |
19377 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
19378 | bne %xcc,p0_reg_check_fail7 | |
19379 | mov 0xee7,%g1 | |
19380 | ldx [%g4+0x48],%g3 | |
19381 | std %f0,[%g4] | |
19382 | ldx [%g4],%g2 | |
19383 | cmp %g3,%g2 ! %f0 = ffff0000 00000000 | |
19384 | bne %xcc,p0_freg_check_fail | |
19385 | mov 0xf00,%g1 | |
19386 | ldx [%g4+0x50],%g3 | |
19387 | std %f2,[%g4] | |
19388 | ldx [%g4],%g2 | |
19389 | cmp %g3,%g2 ! %f2 = 00000000 ffffffff | |
19390 | bne %xcc,p0_freg_check_fail | |
19391 | mov 0xf02,%g1 | |
19392 | ldx [%g4+0x58],%g3 | |
19393 | std %f4,[%g4] | |
19394 | ldx [%g4],%g2 | |
19395 | cmp %g3,%g2 ! %f4 = 1a000000 00000000 | |
19396 | bne %xcc,p0_freg_check_fail | |
19397 | mov 0xf04,%g1 | |
19398 | ldx [%g4+0x60],%g3 | |
19399 | std %f6,[%g4] | |
19400 | ldx [%g4],%g2 | |
19401 | cmp %g3,%g2 ! %f6 = 02226c6b 57119e5e | |
19402 | bne %xcc,p0_freg_check_fail | |
19403 | mov 0xf06,%g1 | |
19404 | ldx [%g4+0x68],%g3 | |
19405 | std %f8,[%g4] | |
19406 | ldx [%g4],%g2 | |
19407 | cmp %g3,%g2 ! %f8 = 925b1ad8 39aced3b | |
19408 | bne %xcc,p0_freg_check_fail | |
19409 | mov 0xf08,%g1 | |
19410 | ldx [%g4+0x70],%g3 | |
19411 | std %f10,[%g4] | |
19412 | ldx [%g4],%g2 | |
19413 | cmp %g3,%g2 ! %f10 = 64479a75 bb9180c7 | |
19414 | bne %xcc,p0_freg_check_fail | |
19415 | mov 0xf10,%g1 | |
19416 | ldx [%g4+0x78],%g3 | |
19417 | std %f12,[%g4] | |
19418 | ldx [%g4],%g2 | |
19419 | cmp %g3,%g2 ! %f12 = ffffffff 365fc6fa | |
19420 | bne %xcc,p0_freg_check_fail | |
19421 | mov 0xf12,%g1 | |
19422 | ldx [%g4+0x80],%g3 | |
19423 | std %f14,[%g4] | |
19424 | ldx [%g4],%g2 | |
19425 | cmp %g3,%g2 ! %f14 = ffffffff 000000ff | |
19426 | bne %xcc,p0_freg_check_fail | |
19427 | mov 0xf14,%g1 | |
19428 | ldx [%g4+0x88],%g3 | |
19429 | std %f16,[%g4] | |
19430 | ldx [%g4],%g2 | |
19431 | cmp %g3,%g2 ! %f16 = ffffffff 9ce0b68a | |
19432 | bne %xcc,p0_freg_check_fail | |
19433 | mov 0xf16,%g1 | |
19434 | ldx [%g4+0x90],%g3 | |
19435 | std %f20,[%g4] | |
19436 | ldx [%g4],%g2 | |
19437 | cmp %g3,%g2 ! %f20 = 00000000 0000ffff | |
19438 | bne %xcc,p0_freg_check_fail | |
19439 | mov 0xf20,%g1 | |
19440 | ldx [%g4+0x98],%g3 | |
19441 | std %f24,[%g4] | |
19442 | ldx [%g4],%g2 | |
19443 | cmp %g3,%g2 ! %f24 = 00000000 000000ff | |
19444 | bne %xcc,p0_freg_check_fail | |
19445 | mov 0xf24,%g1 | |
19446 | ||
19447 | ! Check Point 91 completed | |
19448 | ||
19449 | ||
19450 | p0_label_456: | |
19451 | ! %l6 = 0000000000000000, Mem[0000000010181430] = 000000ff | |
19452 | stw %l6,[%i6+0x030] ! Mem[0000000010181430] = 00000000 | |
19453 | ! %l0 = 0000000000000000, Mem[0000000030181408] = 00ffffff | |
19454 | stha %l0,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00ff0000 | |
19455 | ! %l6 = 0000000000000000, Mem[00000000211c0000] = fffffe0c, %asi = 80 | |
19456 | stba %l6,[%o2+0x000]%asi ! Mem[00000000211c0000] = 00fffe0c | |
19457 | ! %f8 = 925b1ad8 39aced3b, Mem[0000000010181400] = 000000ff 00000000 | |
19458 | stda %f8 ,[%i6+%g0]0x80 ! Mem[0000000010181400] = 925b1ad8 39aced3b | |
19459 | ! %l4 = 00000000ffff275e, Mem[0000000030001408] = 00000000 | |
19460 | stha %l4,[%i0+%o4]0x81 ! Mem[0000000030001408] = 275e0000 | |
19461 | ! %f6 = 02226c6b, Mem[00000000100c1408] = ffffffff | |
19462 | sta %f6 ,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 02226c6b | |
19463 | ! %f13 = 365fc6fa, Mem[0000000030141408] = 00000000 | |
19464 | sta %f13,[%i5+%o4]0x81 ! Mem[0000000030141408] = 365fc6fa | |
19465 | ! %l6 = 0000000000000000, Mem[00000000211c0000] = 00fffe0c, %asi = 80 | |
19466 | stha %l6,[%o2+0x000]%asi ! Mem[00000000211c0000] = 0000fe0c | |
19467 | ! %l7 = 0000000000000000, Mem[0000000010181400] = 3bedac39d81a5b92 | |
19468 | stxa %l7,[%i6+%g0]0x88 ! Mem[0000000010181400] = 0000000000000000 | |
19469 | ! Starting 10 instruction Load Burst | |
19470 | ! Mem[0000000010101438] = ff000000, %l6 = 0000000000000000 | |
19471 | ldsb [%i4+0x038],%l6 ! %l6 = ffffffffffffffff | |
19472 | ||
19473 | p0_label_457: | |
19474 | ! Mem[0000000021800140] = 0000f8a0, %l4 = 00000000ffff275e | |
19475 | lduh [%o3+0x140],%l4 ! %l4 = 0000000000000000 | |
19476 | ! Mem[0000000010081408] = ffffffff ff000000, %l6 = ffffffff, %l7 = 00000000 | |
19477 | ldda [%i2+%o4]0x88,%l6 ! %l6 = 00000000ff000000 00000000ffffffff | |
19478 | ! Mem[0000000020800040] = ff009ffa, %l4 = 0000000000000000 | |
19479 | ldsba [%o1+0x040]%asi,%l4 ! %l4 = ffffffffffffffff | |
19480 | ! Mem[0000000030041400] = 00000000, %l1 = 00000000ffffffff | |
19481 | ldsba [%i1+%g0]0x81,%l1 ! %l1 = 0000000000000000 | |
19482 | ! Mem[0000000030001400] = ffffffff, %f2 = 00000000 | |
19483 | lda [%i0+%g0]0x89,%f2 ! %f2 = ffffffff | |
19484 | ! Mem[00000000100c1420] = 00000000, %l4 = ffffffffffffffff | |
19485 | ldsh [%i3+0x022],%l4 ! %l4 = 0000000000000000 | |
19486 | ! Mem[0000000030041408] = ffffffff, %l1 = 0000000000000000 | |
19487 | ldsba [%i1+%o4]0x89,%l1 ! %l1 = ffffffffffffffff | |
19488 | ! Mem[0000000030141400] = 5e27ffff, %l3 = 00000000ffffffff | |
19489 | lduwa [%i5+%g0]0x89,%l3 ! %l3 = 000000005e27ffff | |
19490 | ! Mem[0000000010141410] = 5e00ff00, %l1 = ffffffffffffffff | |
19491 | lduwa [%i5+%o5]0x88,%l1 ! %l1 = 000000005e00ff00 | |
19492 | ! Starting 10 instruction Store Burst | |
19493 | ! %l4 = 0000000000000000, Mem[0000000010141424] = ffffffff | |
19494 | stw %l4,[%i5+0x024] ! Mem[0000000010141424] = 00000000 | |
19495 | ||
19496 | p0_label_458: | |
19497 | ! %l0 = 0000000000000000, Mem[00000000100c1410] = ff000000 | |
19498 | stha %l0,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 00000000 | |
19499 | ! %l0 = 0000000000000000, Mem[0000000030081410] = ffffffff | |
19500 | stha %l0,[%i2+%o5]0x81 ! Mem[0000000030081410] = 0000ffff | |
19501 | ! %f19 = ffffffff, Mem[0000000010181408] = 000000ff | |
19502 | sta %f19,[%i6+%o4]0x80 ! Mem[0000000010181408] = ffffffff | |
19503 | ! Mem[000000001014142a] = ff0000ff, %l3 = 000000005e27ffff | |
19504 | ldstub [%i5+0x02a],%l3 ! %l3 = 00000000000000ff | |
19505 | ! Mem[0000000010181400] = 00000000, %l4 = 0000000000000000 | |
19506 | swapa [%i6+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
19507 | ! %l4 = 0000000000000000, imm = 00000000000006fc, %l0 = 0000000000000000 | |
19508 | orn %l4,0x6fc,%l0 ! %l0 = fffffffffffff903 | |
19509 | ! Mem[0000000010141438] = ffff275e, %l5 = 0000000000000000 | |
19510 | ldstuba [%i5+0x038]%asi,%l5 ! %l5 = 000000ff000000ff | |
19511 | ! %l2 = ffffffff, %l3 = 00000000, Mem[0000000010141408] = 5e000000 00ff0000 | |
19512 | std %l2,[%i5+%o4] ! Mem[0000000010141408] = ffffffff 00000000 | |
19513 | ! %l0 = fffffffffffff903, Mem[0000000020800000] = 6bff0db6 | |
19514 | sth %l0,[%o1+%g0] ! Mem[0000000020800000] = f9030db6 | |
19515 | ! Starting 10 instruction Load Burst | |
19516 | ! Mem[0000000010141408] = ffffffff, %l1 = 000000005e00ff00 | |
19517 | lduba [%i5+%o4]0x80,%l1 ! %l1 = 00000000000000ff | |
19518 | ||
19519 | p0_label_459: | |
19520 | ! Mem[0000000010001408] = ffff0000 00000000, %l4 = 00000000, %l5 = 000000ff | |
19521 | ldda [%i0+%o4]0x80,%l4 ! %l4 = 00000000ffff0000 0000000000000000 | |
19522 | ! Mem[00000000100c1408] = 02226c6b9ce0b68a, %l3 = 0000000000000000 | |
19523 | ldxa [%i3+%o4]0x80,%l3 ! %l3 = 02226c6b9ce0b68a | |
19524 | ! Mem[0000000010141408] = ffffffff00000000, %l7 = 00000000ffffffff | |
19525 | ldxa [%i5+%o4]0x80,%l7 ! %l7 = ffffffff00000000 | |
19526 | ! Mem[0000000030001400] = ffffffff, %l0 = fffffffffffff903 | |
19527 | lduha [%i0+%g0]0x81,%l0 ! %l0 = 000000000000ffff | |
19528 | ! Mem[0000000030081400] = 00000000, %l2 = ffffffffffffffff | |
19529 | ldsha [%i2+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
19530 | ! Mem[0000000010081408] = 000000ff, %l4 = 00000000ffff0000 | |
19531 | lduha [%i2+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
19532 | ! Mem[0000000010141408] = ffffffff, %f17 = 9ce0b68a | |
19533 | lda [%i5+%o4]0x80,%f17 ! %f17 = ffffffff | |
19534 | ! Mem[0000000030081408] = 000000000000ffff, %f0 = ffff0000 00000000 | |
19535 | ldda [%i2+%o4]0x81,%f0 ! %f0 = 00000000 0000ffff | |
19536 | ! Mem[00000000300c1410] = 0000ffff ffffffff, %l4 = 00000000, %l5 = 00000000 | |
19537 | ldda [%i3+%o5]0x81,%l4 ! %l4 = 000000000000ffff 00000000ffffffff | |
19538 | ! Starting 10 instruction Store Burst | |
19539 | ! Mem[0000000030041400] = 00000000, %l7 = ffffffff00000000 | |
19540 | swapa [%i1+%g0]0x81,%l7 ! %l7 = 0000000000000000 | |
19541 | ||
19542 | p0_label_460: | |
19543 | ! Mem[0000000010101408] = 0000000000ff0000, %l7 = 0000000000000000, %l7 = 0000000000000000 | |
19544 | add %i4,0x08,%g1 | |
19545 | casxa [%g1]0x80,%l7,%l7 ! %l7 = 0000000000ff0000 | |
19546 | ! Mem[0000000030101400] = ff000000, %l7 = 0000000000ff0000 | |
19547 | swapa [%i4+%g0]0x81,%l7 ! %l7 = 00000000ff000000 | |
19548 | ! %l5 = 00000000ffffffff, Mem[00000000300c1410] = ffffffffffff0000 | |
19549 | stxa %l5,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 00000000ffffffff | |
19550 | ! Mem[0000000010041400] = 00ff0000, %l0 = 000000000000ffff | |
19551 | swapa [%i1+%g0]0x80,%l0 ! %l0 = 0000000000ff0000 | |
19552 | ! %l7 = 00000000ff000000, Mem[0000000030141410] = 0000001a | |
19553 | stwa %l7,[%i5+%o5]0x89 ! Mem[0000000030141410] = ff000000 | |
19554 | ! %l3 = 02226c6b9ce0b68a, Mem[00000000100c143e] = e4ff00ff | |
19555 | sth %l3,[%i3+0x03e] ! Mem[00000000100c143c] = e4ffb68a | |
19556 | ! %l2 = 0000000000000000, Mem[0000000030081408] = 000000000000ffff | |
19557 | stxa %l2,[%i2+%o4]0x81 ! Mem[0000000030081408] = 0000000000000000 | |
19558 | ! Mem[0000000030041400] = 00000000, %l7 = 00000000ff000000 | |
19559 | ldstuba [%i1+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
19560 | ! Mem[0000000010001428] = 00000000, %l3 = 02226c6b9ce0b68a, %asi = 80 | |
19561 | swapa [%i0+0x028]%asi,%l3 ! %l3 = 0000000000000000 | |
19562 | ! Starting 10 instruction Load Burst | |
19563 | ! Mem[00000000300c1400] = 00005e00, %l1 = 00000000000000ff | |
19564 | lduwa [%i3+%g0]0x89,%l1 ! %l1 = 0000000000005e00 | |
19565 | ||
19566 | ! Check Point 92 for processor 0 | |
19567 | ||
19568 | set p0_check_pt_data_92,%g4 | |
19569 | rd %ccr,%g5 ! %g5 = 44 | |
19570 | ldx [%g4+0x08],%g2 | |
19571 | cmp %l0,%g2 ! %l0 = 0000000000ff0000 | |
19572 | bne %xcc,p0_reg_check_fail0 | |
19573 | mov 0xee0,%g1 | |
19574 | ldx [%g4+0x10],%g2 | |
19575 | cmp %l1,%g2 ! %l1 = 0000000000005e00 | |
19576 | bne %xcc,p0_reg_check_fail1 | |
19577 | mov 0xee1,%g1 | |
19578 | ldx [%g4+0x18],%g2 | |
19579 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
19580 | bne %xcc,p0_reg_check_fail2 | |
19581 | mov 0xee2,%g1 | |
19582 | ldx [%g4+0x20],%g2 | |
19583 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
19584 | bne %xcc,p0_reg_check_fail3 | |
19585 | mov 0xee3,%g1 | |
19586 | ldx [%g4+0x28],%g2 | |
19587 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
19588 | bne %xcc,p0_reg_check_fail4 | |
19589 | mov 0xee4,%g1 | |
19590 | ldx [%g4+0x30],%g2 | |
19591 | cmp %l5,%g2 ! %l5 = 00000000ffffffff | |
19592 | bne %xcc,p0_reg_check_fail5 | |
19593 | mov 0xee5,%g1 | |
19594 | ldx [%g4+0x38],%g2 | |
19595 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
19596 | bne %xcc,p0_reg_check_fail6 | |
19597 | mov 0xee6,%g1 | |
19598 | ldx [%g4+0x40],%g2 | |
19599 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
19600 | bne %xcc,p0_reg_check_fail7 | |
19601 | mov 0xee7,%g1 | |
19602 | ldx [%g4+0x48],%g3 | |
19603 | std %f0,[%g4] | |
19604 | ldx [%g4],%g2 | |
19605 | cmp %g3,%g2 ! %f0 = 00000000 0000ffff | |
19606 | bne %xcc,p0_freg_check_fail | |
19607 | mov 0xf00,%g1 | |
19608 | ldx [%g4+0x50],%g3 | |
19609 | std %f2,[%g4] | |
19610 | ldx [%g4],%g2 | |
19611 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
19612 | bne %xcc,p0_freg_check_fail | |
19613 | mov 0xf02,%g1 | |
19614 | ldx [%g4+0x58],%g3 | |
19615 | std %f4,[%g4] | |
19616 | ldx [%g4],%g2 | |
19617 | cmp %g3,%g2 ! %f4 = 1a000000 00000000 | |
19618 | bne %xcc,p0_freg_check_fail | |
19619 | mov 0xf04,%g1 | |
19620 | ldx [%g4+0x60],%g3 | |
19621 | std %f6,[%g4] | |
19622 | ldx [%g4],%g2 | |
19623 | cmp %g3,%g2 ! %f6 = 02226c6b 57119e5e | |
19624 | bne %xcc,p0_freg_check_fail | |
19625 | mov 0xf06,%g1 | |
19626 | ldx [%g4+0x68],%g3 | |
19627 | std %f16,[%g4] | |
19628 | ldx [%g4],%g2 | |
19629 | cmp %g3,%g2 ! %f16 = ffffffff ffffffff | |
19630 | bne %xcc,p0_freg_check_fail | |
19631 | mov 0xf16,%g1 | |
19632 | ||
19633 | ! Check Point 92 completed | |
19634 | ||
19635 | ||
19636 | p0_label_461: | |
19637 | ! Mem[0000000021800100] = 00ff39e7, %l4 = 000000000000ffff | |
19638 | ldsh [%o3+0x100],%l4 ! %l4 = 00000000000000ff | |
19639 | ! %l6 = ff000000, %l7 = 00000000, Mem[0000000010101438] = ff000000 00000000 | |
19640 | stda %l6,[%i4+0x038]%asi ! Mem[0000000010101438] = ff000000 00000000 | |
19641 | ! Mem[00000000211c0000] = 0000fe0c, %l7 = 0000000000000000 | |
19642 | ldsba [%o2+0x000]%asi,%l7 ! %l7 = 0000000000000000 | |
19643 | ! Mem[00000000100c1410] = 5e00000000000000, %f30 = 00000000 0000007a | |
19644 | ldda [%i3+%o5]0x88,%f30 ! %f30 = 5e000000 00000000 | |
19645 | ! Mem[0000000010101408] = 0000ff0000000000, %f0 = 00000000 0000ffff | |
19646 | ldda [%i4+%o4]0x88,%f0 ! %f0 = 0000ff00 00000000 | |
19647 | ! Mem[0000000030081400] = 00000000, %l7 = 0000000000000000 | |
19648 | ldsba [%i2+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
19649 | ! Mem[000000001018140c] = ffffffff, %l0 = 0000000000ff0000 | |
19650 | lduba [%i6+0x00e]%asi,%l0 ! %l0 = 00000000000000ff | |
19651 | ! Mem[00000000211c0000] = 0000fe0c, %l3 = 0000000000000000 | |
19652 | ldsba [%o2+0x001]%asi,%l3 ! %l3 = 0000000000000000 | |
19653 | ! Mem[0000000010141410] = 00ff005e, %l6 = 00000000ff000000 | |
19654 | ldswa [%i5+0x010]%asi,%l6 ! %l6 = 0000000000ff005e | |
19655 | ! Starting 10 instruction Store Burst | |
19656 | ! %f6 = 02226c6b 57119e5e, %l7 = 0000000000000000 | |
19657 | ! Mem[0000000010141430] = ffffffff9ce0b68a | |
19658 | add %i5,0x030,%g1 | |
19659 | stda %f6,[%g1+%l7]ASI_PST8_P ! Mem[0000000010141430] = ffffffff9ce0b68a | |
19660 | ||
19661 | p0_label_462: | |
19662 | ! Mem[0000000030041400] = ff000000, %l1 = 0000000000005e00 | |
19663 | ldstuba [%i1+%g0]0x81,%l1 ! %l1 = 000000ff000000ff | |
19664 | ! %f16 = ffffffff ffffffff, %l4 = 00000000000000ff | |
19665 | ! Mem[0000000010081418] = ffffffffffffffff | |
19666 | add %i2,0x018,%g1 | |
19667 | stda %f16,[%g1+%l4]ASI_PST8_PL ! Mem[0000000010081418] = ffffffffffffffff | |
19668 | ! Mem[0000000010181400] = 00000000, %l2 = 0000000000000000, %asi = 80 | |
19669 | swapa [%i6+0x000]%asi,%l2 ! %l2 = 0000000000000000 | |
19670 | ! Mem[0000000021800100] = 00ff39e7, %l2 = 0000000000000000 | |
19671 | ldstuba [%o3+0x100]%asi,%l2 ! %l2 = 00000000000000ff | |
19672 | ! %f12 = ffffffff 365fc6fa, Mem[0000000030041410] = 00000000 00000000 | |
19673 | stda %f12,[%i1+%o5]0x89 ! Mem[0000000030041410] = ffffffff 365fc6fa | |
19674 | ! %l0 = 00000000000000ff, Mem[00000000300c1408] = 0000ffff | |
19675 | stba %l0,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 0000ffff | |
19676 | ! %l3 = 0000000000000000, Mem[000000001000140c] = 00000000, %asi = 80 | |
19677 | stba %l3,[%i0+0x00c]%asi ! Mem[000000001000140c] = 00000000 | |
19678 | ! Mem[00000000300c1400] = 005e0000, %l2 = 0000000000000000 | |
19679 | ldstuba [%i3+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
19680 | ! %l1 = 00000000000000ff, Mem[0000000030001408] = 275e000000000000 | |
19681 | stxa %l1,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000000000ff | |
19682 | ! Starting 10 instruction Load Burst | |
19683 | ! Mem[0000000010041410] = 0000ffff, %l2 = 0000000000000000 | |
19684 | lduwa [%i1+%o5]0x80,%l2 ! %l2 = 000000000000ffff | |
19685 | ||
19686 | p0_label_463: | |
19687 | ! Mem[00000000300c1410] = ffffffff, %l3 = 0000000000000000 | |
19688 | ldsha [%i3+%o5]0x81,%l3 ! %l3 = ffffffffffffffff | |
19689 | ! Mem[0000000030001410] = ff000000, %l4 = 00000000000000ff | |
19690 | lduba [%i0+%o5]0x81,%l4 ! %l4 = 00000000000000ff | |
19691 | ! Mem[0000000030081408] = 00000000, %l6 = 0000000000ff005e | |
19692 | ldsba [%i2+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
19693 | ! Mem[0000000030141410] = ff000000, %l5 = 00000000ffffffff | |
19694 | lduha [%i5+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
19695 | ! Mem[0000000010081404] = 00ff0000, %l0 = 00000000000000ff | |
19696 | ldsba [%i2+0x007]%asi,%l0 ! %l0 = 0000000000000000 | |
19697 | ! Mem[0000000030041400] = ff000000, %l6 = 0000000000000000 | |
19698 | lduwa [%i1+%g0]0x81,%l6 ! %l6 = 00000000ff000000 | |
19699 | ! Mem[0000000010141410] = 00ff005e, %f15 = 000000ff | |
19700 | lda [%i5+%o5]0x80,%f15 ! %f15 = 00ff005e | |
19701 | ! Mem[0000000010141410] = 00ff005e, %l1 = 00000000000000ff | |
19702 | ldsha [%i5+%o5]0x80,%l1 ! %l1 = 00000000000000ff | |
19703 | ! Mem[0000000030141410] = 000000ff, %l0 = 0000000000000000 | |
19704 | ldsha [%i5+%o5]0x81,%l0 ! %l0 = 0000000000000000 | |
19705 | ! Starting 10 instruction Store Burst | |
19706 | ! Code Fragment 3 | |
19707 | p0_fragment_10: | |
19708 | ! %l0 = 0000000000000000 | |
19709 | setx 0xa7b4b0a0193ad40a,%g7,%l0 ! %l0 = a7b4b0a0193ad40a | |
19710 | ! %l1 = 00000000000000ff | |
19711 | setx 0x4a557db7fe83e9d1,%g7,%l1 ! %l1 = 4a557db7fe83e9d1 | |
19712 | setx 0x1fe000, %g1, %g3 | |
19713 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
19714 | setx 0x1ffff8, %g1, %g2 | |
19715 | and %l0, %g2, %l0 | |
19716 | ta T_CHANGE_HPRIV | |
19717 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
19718 | ta T_CHANGE_NONHPRIV | |
19719 | ! %l0 = a7b4b0a0193ad40a | |
19720 | setx 0x81da691febda9b81,%g7,%l0 ! %l0 = 81da691febda9b81 | |
19721 | ! %l1 = 4a557db7fe83e9d1 | |
19722 | setx 0xb4a145385dcdf129,%g7,%l1 ! %l1 = b4a145385dcdf129 | |
19723 | ||
19724 | p0_label_464: | |
19725 | ! Mem[0000000010041408] = 5e27ffff, %l5 = 0000000000000000 | |
19726 | swapa [%i1+%o4]0x80,%l5 ! %l5 = 000000005e27ffff | |
19727 | ! Mem[0000000010101400] = ff000000, %l1 = b4a145385dcdf129 | |
19728 | ldstuba [%i4+%g0]0x80,%l1 ! %l1 = 000000ff000000ff | |
19729 | ! %f30 = 5e000000, Mem[0000000010001408] = ffff0000 | |
19730 | sta %f30,[%i0+%o4]0x80 ! Mem[0000000010001408] = 5e000000 | |
19731 | ! Mem[0000000030141400] = 5e27ffff, %l0 = 81da691febda9b81 | |
19732 | swapa [%i5+%g0]0x89,%l0 ! %l0 = 000000005e27ffff | |
19733 | ! Mem[0000000010041408] = 00000000ffffffff, %l0 = 000000005e27ffff, %l6 = 00000000ff000000 | |
19734 | add %i1,0x08,%g1 | |
19735 | casxa [%g1]0x80,%l0,%l6 ! %l6 = 00000000ffffffff | |
19736 | ! %f16 = ffffffff ffffffff ffffffff ffffffff | |
19737 | ! %f20 = 00000000 0000ffff ff000000 00ff00c4 | |
19738 | ! %f24 = 00000000 000000ff 00000000 0000ffff | |
19739 | ! %f28 = ffff275e ffffffff 5e000000 00000000 | |
19740 | stda %f16,[%i0]ASI_BLK_S ! Block Store to 0000000030001400 | |
19741 | ! Mem[0000000010081410] = ffff275e, %l6 = 00000000ffffffff | |
19742 | ldstuba [%i2+%o5]0x80,%l6 ! %l6 = 000000ff000000ff | |
19743 | ! %l2 = 0000ffff, %l3 = ffffffff, Mem[0000000030001410] = 00000000 ffff0000 | |
19744 | stda %l2,[%i0+%o5]0x89 ! Mem[0000000030001410] = 0000ffff ffffffff | |
19745 | ! Mem[0000000010081410] = 5e27ffff, %l2 = 000000000000ffff | |
19746 | ldstuba [%i2+%o5]0x88,%l2 ! %l2 = 000000ff000000ff | |
19747 | ! Starting 10 instruction Load Burst | |
19748 | membar #Sync ! Added by membar checker (92) | |
19749 | ! Mem[0000000010001400] = 000000ff, %l4 = 00000000000000ff | |
19750 | lduba [%i0+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
19751 | ||
19752 | p0_label_465: | |
19753 | ! Mem[0000000030101408] = 000000ff, %l3 = ffffffffffffffff | |
19754 | ldswa [%i4+%o4]0x81,%l3 ! %l3 = 00000000000000ff | |
19755 | ! Mem[0000000030041400] = ff0000001a000000, %l3 = 00000000000000ff | |
19756 | ldxa [%i1+%g0]0x81,%l3 ! %l3 = ff0000001a000000 | |
19757 | ! Mem[0000000030041400] = ff000000, %l7 = 0000000000000000 | |
19758 | ldswa [%i1+%g0]0x81,%l7 ! %l7 = ffffffffff000000 | |
19759 | ! Mem[0000000010141410] = 00ff005e00000000, %f0 = 0000ff00 00000000 | |
19760 | ldda [%i5+%o5]0x80,%f0 ! %f0 = 00ff005e 00000000 | |
19761 | ! Mem[0000000010081408] = ffffffff ff000000, %l2 = 000000ff, %l3 = 1a000000 | |
19762 | ldda [%i2+%o4]0x88,%l2 ! %l2 = 00000000ff000000 00000000ffffffff | |
19763 | ! Mem[0000000010041410] = 0000ffff, %l5 = 000000005e27ffff | |
19764 | ldsba [%i1+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
19765 | ! Mem[0000000010181410] = ffff275e, %f11 = bb9180c7 | |
19766 | lda [%i6+%o5]0x80,%f11 ! %f11 = ffff275e | |
19767 | ! Mem[00000000100c1410] = 00000000, %l5 = 0000000000000000 | |
19768 | ldsha [%i3+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
19769 | ! Mem[0000000010081410] = ffff275e ffffffff, %l6 = 000000ff, %l7 = ff000000 | |
19770 | ldda [%i2+%o5]0x80,%l6 ! %l6 = 00000000ffff275e 00000000ffffffff | |
19771 | ! Starting 10 instruction Store Burst | |
19772 | ! Mem[0000000010001400] = 000000ff, %l2 = 00000000ff000000 | |
19773 | ldstuba [%i0+%g0]0x88,%l2 ! %l2 = 000000ff000000ff | |
19774 | ||
19775 | ! Check Point 93 for processor 0 | |
19776 | ||
19777 | set p0_check_pt_data_93,%g4 | |
19778 | rd %ccr,%g5 ! %g5 = 44 | |
19779 | ldx [%g4+0x08],%g2 | |
19780 | cmp %l0,%g2 ! %l0 = 000000005e27ffff | |
19781 | bne %xcc,p0_reg_check_fail0 | |
19782 | mov 0xee0,%g1 | |
19783 | ldx [%g4+0x10],%g2 | |
19784 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
19785 | bne %xcc,p0_reg_check_fail1 | |
19786 | mov 0xee1,%g1 | |
19787 | ldx [%g4+0x18],%g2 | |
19788 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
19789 | bne %xcc,p0_reg_check_fail2 | |
19790 | mov 0xee2,%g1 | |
19791 | ldx [%g4+0x20],%g2 | |
19792 | cmp %l3,%g2 ! %l3 = 00000000ffffffff | |
19793 | bne %xcc,p0_reg_check_fail3 | |
19794 | mov 0xee3,%g1 | |
19795 | ldx [%g4+0x28],%g2 | |
19796 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
19797 | bne %xcc,p0_reg_check_fail4 | |
19798 | mov 0xee4,%g1 | |
19799 | ldx [%g4+0x30],%g2 | |
19800 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
19801 | bne %xcc,p0_reg_check_fail5 | |
19802 | mov 0xee5,%g1 | |
19803 | ldx [%g4+0x38],%g2 | |
19804 | cmp %l6,%g2 ! %l6 = 00000000ffff275e | |
19805 | bne %xcc,p0_reg_check_fail6 | |
19806 | mov 0xee6,%g1 | |
19807 | ldx [%g4+0x40],%g2 | |
19808 | cmp %l7,%g2 ! %l7 = 00000000ffffffff | |
19809 | bne %xcc,p0_reg_check_fail7 | |
19810 | mov 0xee7,%g1 | |
19811 | ldx [%g4+0x48],%g3 | |
19812 | std %f0,[%g4] | |
19813 | ldx [%g4],%g2 | |
19814 | cmp %g3,%g2 ! %f0 = 00ff005e 00000000 | |
19815 | bne %xcc,p0_freg_check_fail | |
19816 | mov 0xf00,%g1 | |
19817 | ldx [%g4+0x50],%g3 | |
19818 | std %f2,[%g4] | |
19819 | ldx [%g4],%g2 | |
19820 | cmp %g3,%g2 ! %f2 = ffffffff ffffffff | |
19821 | bne %xcc,p0_freg_check_fail | |
19822 | mov 0xf02,%g1 | |
19823 | ldx [%g4+0x58],%g3 | |
19824 | std %f6,[%g4] | |
19825 | ldx [%g4],%g2 | |
19826 | cmp %g3,%g2 ! %f6 = 02226c6b 57119e5e | |
19827 | bne %xcc,p0_freg_check_fail | |
19828 | mov 0xf06,%g1 | |
19829 | ldx [%g4+0x60],%g3 | |
19830 | std %f10,[%g4] | |
19831 | ldx [%g4],%g2 | |
19832 | cmp %g3,%g2 ! %f10 = 64479a75 ffff275e | |
19833 | bne %xcc,p0_freg_check_fail | |
19834 | mov 0xf10,%g1 | |
19835 | ldx [%g4+0x68],%g3 | |
19836 | std %f14,[%g4] | |
19837 | ldx [%g4],%g2 | |
19838 | cmp %g3,%g2 ! %f14 = ffffffff 00ff005e | |
19839 | bne %xcc,p0_freg_check_fail | |
19840 | mov 0xf14,%g1 | |
19841 | ldx [%g4+0x70],%g3 | |
19842 | std %f30,[%g4] | |
19843 | ldx [%g4],%g2 | |
19844 | cmp %g3,%g2 ! %f30 = 5e000000 00000000 | |
19845 | bne %xcc,p0_freg_check_fail | |
19846 | mov 0xf30,%g1 | |
19847 | ||
19848 | ! Check Point 93 completed | |
19849 | ||
19850 | ||
19851 | p0_label_466: | |
19852 | ! %l2 = 00000000000000ff, Mem[0000000030041410] = 365fc6fa | |
19853 | stba %l2,[%i1+%o5]0x89 ! Mem[0000000030041410] = 365fc6ff | |
19854 | ! Mem[0000000030001410] = ffff0000, %l4 = 00000000000000ff | |
19855 | ldstuba [%i0+%o5]0x81,%l4 ! %l4 = 000000ff000000ff | |
19856 | ! Mem[0000000010081408] = 000000ff, %l5 = 0000000000000000 | |
19857 | ldstuba [%i2+%o4]0x80,%l5 ! %l5 = 00000000000000ff | |
19858 | ! %l7 = 00000000ffffffff, Mem[0000000010181428] = 00ffffffffffffff, %asi = 80 | |
19859 | stxa %l7,[%i6+0x028]%asi ! Mem[0000000010181428] = 00000000ffffffff | |
19860 | ! Mem[0000000030001408] = ffffffff, %l1 = 00000000000000ff | |
19861 | swapa [%i0+%o4]0x89,%l1 ! %l1 = 00000000ffffffff | |
19862 | ! %l1 = 00000000ffffffff, Mem[0000000010081410] = ffff275e | |
19863 | sth %l1,[%i2+%o5] ! Mem[0000000010081410] = ffff275e | |
19864 | ! Mem[0000000010001400] = 000000ff, %l7 = 00000000ffffffff | |
19865 | ldstuba [%i0+%g0]0x88,%l7 ! %l7 = 000000ff000000ff | |
19866 | ! Mem[000000001004143c] = 0000b68a, %l1 = 00000000ffffffff | |
19867 | swap [%i1+0x03c],%l1 ! %l1 = 000000000000b68a | |
19868 | ! %f6 = 02226c6b 57119e5e, %l3 = 00000000ffffffff | |
19869 | ! Mem[00000000300c1418] = b5238e481293fe50 | |
19870 | add %i3,0x018,%g1 | |
19871 | stda %f6,[%g1+%l3]ASI_PST16_SL ! Mem[00000000300c1418] = 5e9e11576b6c2202 | |
19872 | ! Starting 10 instruction Load Burst | |
19873 | ! Mem[000000001014142c] = 1a000000, %l4 = 00000000000000ff | |
19874 | lduh [%i5+0x02e],%l4 ! %l4 = 0000000000000000 | |
19875 | ||
19876 | p0_label_467: | |
19877 | ! Mem[0000000030101400] = 0000ff00, %l3 = 00000000ffffffff | |
19878 | ldsba [%i4+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
19879 | ! Mem[0000000010081400] = ffff00ff, %l5 = 0000000000000000 | |
19880 | lduba [%i2+%g0]0x80,%l5 ! %l5 = 00000000000000ff | |
19881 | ! Mem[0000000010141410] = 5e00ff00, %l7 = 00000000000000ff | |
19882 | lduha [%i5+%o5]0x88,%l7 ! %l7 = 000000000000ff00 | |
19883 | ! Mem[0000000030101408] = 000000ff, %l4 = 0000000000000000 | |
19884 | ldsha [%i4+%o4]0x81,%l4 ! %l4 = 0000000000000000 | |
19885 | ! Mem[00000000211c0000] = 0000fe0c, %l0 = 000000005e27ffff | |
19886 | ldsha [%o2+0x000]%asi,%l0 ! %l0 = 0000000000000000 | |
19887 | ! Mem[0000000010101408] = 00000000, %l6 = 00000000ffff275e | |
19888 | lduwa [%i4+%o4]0x80,%l6 ! %l6 = 0000000000000000 | |
19889 | ! Mem[0000000010181428] = 00000000, %l6 = 0000000000000000 | |
19890 | ldsw [%i6+0x028],%l6 ! %l6 = 0000000000000000 | |
19891 | ! Mem[0000000030181410] = 0000ffff, %l5 = 00000000000000ff | |
19892 | ldsba [%i6+%o5]0x89,%l5 ! %l5 = ffffffffffffffff | |
19893 | ! Mem[0000000010001408] = 00000000 0000005e, %l4 = 00000000, %l5 = ffffffff | |
19894 | ldda [%i0+%o4]0x88,%l4 ! %l4 = 000000000000005e 0000000000000000 | |
19895 | ! Starting 10 instruction Store Burst | |
19896 | ! %f16 = ffffffff ffffffff ffffffff ffffffff | |
19897 | ! %f20 = 00000000 0000ffff ff000000 00ff00c4 | |
19898 | ! %f24 = 00000000 000000ff 00000000 0000ffff | |
19899 | ! %f28 = ffff275e ffffffff 5e000000 00000000 | |
19900 | stda %f16,[%i6]ASI_COMMIT_P ! Block Store to 0000000010181400 | |
19901 | ||
19902 | p0_label_468: | |
19903 | ! %l5 = 0000000000000000, Mem[0000000030041408] = ffffffff | |
19904 | stwa %l5,[%i1+%o4]0x81 ! Mem[0000000030041408] = 00000000 | |
19905 | membar #Sync ! Added by membar checker (93) | |
19906 | ! %f2 = ffffffff ffffffff, %l3 = 0000000000000000 | |
19907 | ! Mem[0000000010181400] = ffffffffffffffff | |
19908 | stda %f2,[%i6+%l3]ASI_PST32_P ! Mem[0000000010181400] = ffffffffffffffff | |
19909 | ! %f18 = ffffffff ffffffff, %l5 = 0000000000000000 | |
19910 | ! Mem[0000000030041430] = ffffffffff000000 | |
19911 | add %i1,0x030,%g1 | |
19912 | stda %f18,[%g1+%l5]ASI_PST32_SL ! Mem[0000000030041430] = ffffffffff000000 | |
19913 | ! Mem[0000000010181400] = ffffffff, %l3 = 0000000000000000 | |
19914 | swapa [%i6+%g0]0x80,%l3 ! %l3 = 00000000ffffffff | |
19915 | ! Mem[0000000020800001] = f9030db6, %l1 = 000000000000b68a | |
19916 | ldstuba [%o1+0x001]%asi,%l1 ! %l1 = 00000003000000ff | |
19917 | ! %l0 = 0000000000000000, Mem[0000000010101410] = ff00000000000000 | |
19918 | stxa %l0,[%i4+%o5]0x80 ! Mem[0000000010101410] = 0000000000000000 | |
19919 | ! %l1 = 0000000000000003, Mem[0000000030001408] = 000000ff | |
19920 | stba %l1,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00000003 | |
19921 | ! %l4 = 000000000000005e, Mem[0000000010041438] = 7a000000ffffffff, %asi = 80 | |
19922 | stxa %l4,[%i1+0x038]%asi ! Mem[0000000010041438] = 000000000000005e | |
19923 | ! Mem[0000000010181408] = ffffffff, %l2 = 00000000000000ff | |
19924 | swapa [%i6+%o4]0x80,%l2 ! %l2 = 00000000ffffffff | |
19925 | ! Starting 10 instruction Load Burst | |
19926 | ! Mem[0000000010181408] = 000000ff, %l2 = 00000000ffffffff | |
19927 | lduwa [%i6+%o4]0x80,%l2 ! %l2 = 00000000000000ff | |
19928 | ||
19929 | p0_label_469: | |
19930 | ! Mem[0000000010101438] = ff00000000000000, %l5 = 0000000000000000 | |
19931 | ldxa [%i4+0x038]%asi,%l5 ! %l5 = ff00000000000000 | |
19932 | ! Mem[00000000300c1410] = ffffffff 00000000, %l4 = 0000005e, %l5 = 00000000 | |
19933 | ldda [%i3+%o5]0x81,%l4 ! %l4 = 00000000ffffffff 0000000000000000 | |
19934 | ! Mem[00000000300c1408] = ffff0000, %l7 = 000000000000ff00 | |
19935 | ldsha [%i3+%o4]0x81,%l7 ! %l7 = ffffffffffffffff | |
19936 | ! Mem[0000000030101400] = 00ff0000, %l5 = 0000000000000000 | |
19937 | lduha [%i4+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
19938 | ! %f16 = ffffffff ffffffff ffffffff ffffffff | |
19939 | ! %f20 = 00000000 0000ffff ff000000 00ff00c4 | |
19940 | ! %f24 = 00000000 000000ff 00000000 0000ffff | |
19941 | ! %f28 = ffff275e ffffffff 5e000000 00000000 | |
19942 | stda %f16,[%i3]ASI_BLK_P ! Block Store to 00000000100c1400 | |
19943 | ! Mem[0000000010101400] = 000000ff, %f11 = ffff275e | |
19944 | lda [%i4+%g0]0x88,%f11 ! %f11 = 000000ff | |
19945 | ! Mem[0000000020800000] = f9ff0db6, %l0 = 0000000000000000 | |
19946 | lduh [%o1+%g0],%l0 ! %l0 = 000000000000f9ff | |
19947 | ! Mem[0000000010181420] = 00000000, %l6 = 0000000000000000 | |
19948 | ldswa [%i6+0x020]%asi,%l6 ! %l6 = 0000000000000000 | |
19949 | membar #Sync ! Added by membar checker (94) | |
19950 | ! Mem[00000000100c1408] = ffffffff, %l4 = 00000000ffffffff | |
19951 | ldswa [%i3+%o4]0x80,%l4 ! %l4 = ffffffffffffffff | |
19952 | ! Starting 10 instruction Store Burst | |
19953 | ! %l7 = ffffffffffffffff, Mem[0000000010181410] = 00000000 | |
19954 | stba %l7,[%i6+%o5]0x80 ! Mem[0000000010181410] = ff000000 | |
19955 | ||
19956 | p0_label_470: | |
19957 | ! %l1 = 0000000000000003, Mem[0000000030041410] = ffffffff365fc6ff | |
19958 | stxa %l1,[%i1+%o5]0x89 ! Mem[0000000030041410] = 0000000000000003 | |
19959 | ! Mem[0000000030141408] = 365fc6fa, %l2 = 00000000000000ff | |
19960 | swapa [%i5+%o4]0x81,%l2 ! %l2 = 00000000365fc6fa | |
19961 | ! %l6 = 00000000, %l7 = ffffffff, Mem[0000000030081410] = ffff0000 ff000000 | |
19962 | stda %l6,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00000000 ffffffff | |
19963 | ! Mem[000000001008141c] = ffffffff, %l1 = 0000000000000003, %asi = 80 | |
19964 | swapa [%i2+0x01c]%asi,%l1 ! %l1 = 00000000ffffffff | |
19965 | ! %l7 = ffffffffffffffff, Mem[0000000010081410] = ffff275effffffff | |
19966 | stxa %l7,[%i2+%o5]0x80 ! Mem[0000000010081410] = ffffffffffffffff | |
19967 | ! %l7 = ffffffffffffffff, Mem[00000000211c0000] = 0000fe0c, %asi = 80 | |
19968 | stha %l7,[%o2+0x000]%asi ! Mem[00000000211c0000] = fffffe0c | |
19969 | ! %l1 = 00000000ffffffff, Mem[0000000010181400] = 00000000ffffffff | |
19970 | stxa %l1,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000ffffffff | |
19971 | ! %l5 = 00000000000000ff, Mem[00000000100c140c] = ffffffff | |
19972 | stw %l5,[%i3+0x00c] ! Mem[00000000100c140c] = 000000ff | |
19973 | ! %l0 = 0000f9ff, %l1 = ffffffff, Mem[0000000010141408] = ffffffff 00000000 | |
19974 | stda %l0,[%i5+%o4]0x88 ! Mem[0000000010141408] = 0000f9ff ffffffff | |
19975 | ! Starting 10 instruction Load Burst | |
19976 | ! Mem[0000000030181408] = 0000ff00, %l4 = ffffffffffffffff | |
19977 | lduha [%i6+%o4]0x81,%l4 ! %l4 = 0000000000000000 | |
19978 | ||
19979 | ! Check Point 94 for processor 0 | |
19980 | ||
19981 | set p0_check_pt_data_94,%g4 | |
19982 | rd %ccr,%g5 ! %g5 = 44 | |
19983 | ldx [%g4+0x08],%g2 | |
19984 | cmp %l0,%g2 ! %l0 = 000000000000f9ff | |
19985 | bne %xcc,p0_reg_check_fail0 | |
19986 | mov 0xee0,%g1 | |
19987 | ldx [%g4+0x10],%g2 | |
19988 | cmp %l1,%g2 ! %l1 = 00000000ffffffff | |
19989 | bne %xcc,p0_reg_check_fail1 | |
19990 | mov 0xee1,%g1 | |
19991 | ldx [%g4+0x18],%g2 | |
19992 | cmp %l2,%g2 ! %l2 = 00000000365fc6fa | |
19993 | bne %xcc,p0_reg_check_fail2 | |
19994 | mov 0xee2,%g1 | |
19995 | ldx [%g4+0x20],%g2 | |
19996 | cmp %l3,%g2 ! %l3 = 00000000ffffffff | |
19997 | bne %xcc,p0_reg_check_fail3 | |
19998 | mov 0xee3,%g1 | |
19999 | ldx [%g4+0x28],%g2 | |
20000 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
20001 | bne %xcc,p0_reg_check_fail4 | |
20002 | mov 0xee4,%g1 | |
20003 | ldx [%g4+0x30],%g2 | |
20004 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
20005 | bne %xcc,p0_reg_check_fail5 | |
20006 | mov 0xee5,%g1 | |
20007 | ldx [%g4+0x38],%g2 | |
20008 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
20009 | bne %xcc,p0_reg_check_fail6 | |
20010 | mov 0xee6,%g1 | |
20011 | ldx [%g4+0x40],%g2 | |
20012 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
20013 | bne %xcc,p0_reg_check_fail7 | |
20014 | mov 0xee7,%g1 | |
20015 | ldx [%g4+0x48],%g3 | |
20016 | std %f4,[%g4] | |
20017 | ldx [%g4],%g2 | |
20018 | cmp %g3,%g2 ! %f4 = 1a000000 00000000 | |
20019 | bne %xcc,p0_freg_check_fail | |
20020 | mov 0xf04,%g1 | |
20021 | ldx [%g4+0x50],%g3 | |
20022 | std %f10,[%g4] | |
20023 | ldx [%g4],%g2 | |
20024 | cmp %g3,%g2 ! %f10 = 64479a75 000000ff | |
20025 | bne %xcc,p0_freg_check_fail | |
20026 | mov 0xf10,%g1 | |
20027 | ||
20028 | ! Check Point 94 completed | |
20029 | ||
20030 | ||
20031 | p0_label_471: | |
20032 | ! Mem[0000000010101410] = 00000000, %l3 = 00000000ffffffff | |
20033 | lduha [%i4+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
20034 | ! Mem[00000000211c0000] = fffffe0c, %l3 = 0000000000000000 | |
20035 | ldsha [%o2+0x000]%asi,%l3 ! %l3 = ffffffffffffffff | |
20036 | ! Mem[0000000030041408] = 00000000, %l7 = ffffffffffffffff | |
20037 | lduha [%i1+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
20038 | ! Mem[0000000030101400] = 00ff0000, %l5 = 00000000000000ff | |
20039 | ldsba [%i4+%g0]0x81,%l5 ! %l5 = 0000000000000000 | |
20040 | ! Mem[0000000030041410] = 00000000 00000003, %l2 = 365fc6fa, %l3 = ffffffff | |
20041 | ldda [%i1+%o5]0x89,%l2 ! %l2 = 0000000000000003 0000000000000000 | |
20042 | ! Mem[00000000100c1408] = ffffffff, %l7 = 0000000000000000 | |
20043 | lduba [%i3+%o4]0x80,%l7 ! %l7 = 00000000000000ff | |
20044 | ! Mem[0000000030101410] = 00000000, %l3 = 0000000000000000 | |
20045 | lduba [%i4+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
20046 | ! Mem[0000000030041400] = ff000000 1a000000, %l0 = 0000f9ff, %l1 = ffffffff | |
20047 | ldda [%i1+%g0]0x81,%l0 ! %l0 = 00000000ff000000 000000001a000000 | |
20048 | ! Mem[0000000030101400] = 0000ff00, %l3 = 0000000000000000 | |
20049 | ldsba [%i4+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
20050 | ! Starting 10 instruction Store Burst | |
20051 | ! %l5 = 0000000000000000, Mem[000000001010140b] = 00000000 | |
20052 | stb %l5,[%i4+0x00b] ! Mem[0000000010101408] = 00000000 | |
20053 | ||
20054 | p0_label_472: | |
20055 | ! %f6 = 02226c6b 57119e5e, %l2 = 0000000000000003 | |
20056 | ! Mem[0000000010101418] = ff0000ff00ff00ff | |
20057 | add %i4,0x018,%g1 | |
20058 | stda %f6,[%g1+%l2]ASI_PST16_PL ! Mem[0000000010101418] = 5e9e115700ff00ff | |
20059 | ! %l6 = 0000000000000000, Mem[0000000010141408] = 0000f9ff | |
20060 | stha %l6,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000000 | |
20061 | ! %f10 = 64479a75 000000ff, %l3 = 0000000000000000 | |
20062 | ! Mem[0000000030181420] = 000000ff0000ffff | |
20063 | add %i6,0x020,%g1 | |
20064 | stda %f10,[%g1+%l3]ASI_PST8_S ! Mem[0000000030181420] = 000000ff0000ffff | |
20065 | ! Mem[0000000030001408] = 03000000, %l0 = 00000000ff000000 | |
20066 | ldstuba [%i0+%o4]0x81,%l0 ! %l0 = 00000003000000ff | |
20067 | ! Mem[0000000010101404] = 000000ff, %l3 = 0000000000000000, %asi = 80 | |
20068 | swapa [%i4+0x004]%asi,%l3 ! %l3 = 00000000000000ff | |
20069 | ! %f20 = 00000000 0000ffff, %l1 = 000000001a000000 | |
20070 | ! Mem[0000000010141400] = ffff00000000ff00 | |
20071 | stda %f20,[%i5+%l1]ASI_PST8_PL ! Mem[0000000010141400] = ffff00000000ff00 | |
20072 | ! Mem[0000000030041410] = 00000003, %l0 = 0000000000000003 | |
20073 | swapa [%i1+%o5]0x89,%l0 ! %l0 = 0000000000000003 | |
20074 | ! Mem[0000000030041410] = 03000000, %l5 = 0000000000000000 | |
20075 | ldstuba [%i1+%o5]0x81,%l5 ! %l5 = 00000003000000ff | |
20076 | ! %f6 = 02226c6b 57119e5e, Mem[0000000010041420] = 032cffff 0000005e | |
20077 | std %f6 ,[%i1+0x020] ! Mem[0000000010041420] = 02226c6b 57119e5e | |
20078 | ! Starting 10 instruction Load Burst | |
20079 | ! Mem[0000000010141428] = ff00ffff, %l5 = 0000000000000003 | |
20080 | ldswa [%i5+0x028]%asi,%l5 ! %l5 = ffffffffff00ffff | |
20081 | ||
20082 | p0_label_473: | |
20083 | ! Mem[00000000100c1400] = ffffffff ffffffff, %l4 = 00000000, %l5 = ff00ffff | |
20084 | ldda [%i3+%g0]0x88,%l4 ! %l4 = 00000000ffffffff 00000000ffffffff | |
20085 | ! %l0 = 0000000000000003, %l2 = 0000000000000003, %y = 0000ffff | |
20086 | smul %l0,%l2,%l2 ! %l2 = 0000000000000009, %y = 00000000 | |
20087 | ! Mem[0000000010101410] = 00000000, %l2 = 0000000000000009 | |
20088 | ldsba [%i4+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
20089 | ! Mem[0000000030041400] = 000000ff, %l7 = 00000000000000ff | |
20090 | ldsba [%i1+%g0]0x89,%l7 ! %l7 = ffffffffffffffff | |
20091 | ! Mem[0000000010081408] = ff0000ff, %l0 = 0000000000000003 | |
20092 | lduwa [%i2+%o4]0x88,%l0 ! %l0 = 00000000ff0000ff | |
20093 | ! Mem[0000000030081410] = 00000000, %f17 = ffffffff | |
20094 | lda [%i2+%o5]0x81,%f17 ! %f17 = 00000000 | |
20095 | ! Mem[00000000100c1400] = ffffffff, %l0 = 00000000ff0000ff | |
20096 | ldsba [%i3+%g0]0x80,%l0 ! %l0 = ffffffffffffffff | |
20097 | ! Mem[0000000020800000] = f9ff0db6, %l1 = 000000001a000000 | |
20098 | ldsh [%o1+%g0],%l1 ! %l1 = fffffffffffff9ff | |
20099 | ! Mem[0000000010101434] = ffffff00, %l6 = 0000000000000000 | |
20100 | ldsha [%i4+0x034]%asi,%l6 ! %l6 = ffffffffffffffff | |
20101 | ! Starting 10 instruction Store Burst | |
20102 | ! %f4 = 1a000000 00000000, Mem[0000000010101410] = 00000000 00000000 | |
20103 | stda %f4 ,[%i4+%o5]0x80 ! Mem[0000000010101410] = 1a000000 00000000 | |
20104 | ||
20105 | p0_label_474: | |
20106 | ! Mem[0000000010001400] = ff000000, %l4 = ffffffff, %l4 = ffffffff | |
20107 | casa [%i0]0x80,%l4,%l4 ! %l4 = 00000000ff000000 | |
20108 | ! %l2 = 0000000000000000, Mem[0000000010041400] = ffff0000 | |
20109 | stha %l2,[%i1+%g0]0x88 ! Mem[0000000010041400] = ffff0000 | |
20110 | ! %f5 = 00000000, Mem[0000000010041408] = 00000000 | |
20111 | sta %f5 ,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00000000 | |
20112 | ! Mem[0000000030181400] = 000000ff, %l1 = fffffffffffff9ff | |
20113 | swapa [%i6+%g0]0x81,%l1 ! %l1 = 00000000000000ff | |
20114 | ! Mem[0000000010101400] = 000000ff, %l4 = 00000000ff000000 | |
20115 | ldstuba [%i4+%g0]0x88,%l4 ! %l4 = 000000ff000000ff | |
20116 | ! %l6 = ffffffff, %l7 = ffffffff, Mem[0000000010081400] = ff00ffff 0000ff00 | |
20117 | stda %l6,[%i2+%g0]0x88 ! Mem[0000000010081400] = ffffffff ffffffff | |
20118 | ! %f2 = ffffffff, Mem[0000000030101400] = 0000ff00 | |
20119 | sta %f2 ,[%i4+%g0]0x89 ! Mem[0000000030101400] = ffffffff | |
20120 | ! %l4 = 00000000000000ff, Mem[0000000030001400] = ffffffff | |
20121 | stha %l4,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00ffffff | |
20122 | ! Mem[0000000030041400] = ff000000, %l7 = ffffffffffffffff | |
20123 | ldstuba [%i1+%g0]0x81,%l7 ! %l7 = 000000ff000000ff | |
20124 | ! Starting 10 instruction Load Burst | |
20125 | ! Mem[0000000010141410] = 000000005e00ff00, %l0 = ffffffffffffffff | |
20126 | ldxa [%i5+%o5]0x88,%l0 ! %l0 = 000000005e00ff00 | |
20127 | ||
20128 | p0_label_475: | |
20129 | ! Mem[0000000010101410] = 1a000000 00000000, %l4 = 000000ff, %l5 = ffffffff | |
20130 | ldda [%i4+%o5]0x80,%l4 ! %l4 = 000000001a000000 0000000000000000 | |
20131 | ! Mem[0000000030141400] = 819bdaeb, %l1 = 00000000000000ff | |
20132 | lduha [%i5+%g0]0x81,%l1 ! %l1 = 000000000000819b | |
20133 | ! Mem[0000000030001408] = ff000000, %f3 = ffffffff | |
20134 | lda [%i0+%o4]0x81,%f3 ! %f3 = ff000000 | |
20135 | ! Mem[0000000010001400] = ff0000000000ffff, %f22 = ff000000 00ff00c4 | |
20136 | ldda [%i0+%g0]0x80,%f22 ! %f22 = ff000000 0000ffff | |
20137 | ! Mem[0000000010001408] = 0000005e, %l6 = ffffffffffffffff | |
20138 | ldsha [%i0+%o4]0x88,%l6 ! %l6 = 000000000000005e | |
20139 | ! Mem[0000000010181408] = 000000ffffffffff, %l3 = 00000000000000ff | |
20140 | ldxa [%i6+0x008]%asi,%l3 ! %l3 = 000000ffffffffff | |
20141 | ! Mem[0000000010101410] = 00000000 0000001a, %l6 = 0000005e, %l7 = 000000ff | |
20142 | ldda [%i4+%o5]0x88,%l6 ! %l6 = 000000000000001a 0000000000000000 | |
20143 | ! Mem[0000000010001400] = ff000000, %l1 = 000000000000819b | |
20144 | lduha [%i0+%g0]0x80,%l1 ! %l1 = 000000000000ff00 | |
20145 | ! Mem[0000000010101408] = 00000000, %l3 = 000000ffffffffff | |
20146 | lduba [%i4+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
20147 | ! Starting 10 instruction Store Burst | |
20148 | ! Mem[0000000030101410] = 00000000, %l4 = 000000001a000000 | |
20149 | swapa [%i4+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
20150 | ||
20151 | ! Check Point 95 for processor 0 | |
20152 | ||
20153 | set p0_check_pt_data_95,%g4 | |
20154 | rd %ccr,%g5 ! %g5 = 44 | |
20155 | ldx [%g4+0x08],%g2 | |
20156 | cmp %l0,%g2 ! %l0 = 000000005e00ff00 | |
20157 | bne %xcc,p0_reg_check_fail0 | |
20158 | mov 0xee0,%g1 | |
20159 | ldx [%g4+0x10],%g2 | |
20160 | cmp %l1,%g2 ! %l1 = 000000000000ff00 | |
20161 | bne %xcc,p0_reg_check_fail1 | |
20162 | mov 0xee1,%g1 | |
20163 | ldx [%g4+0x18],%g2 | |
20164 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
20165 | bne %xcc,p0_reg_check_fail2 | |
20166 | mov 0xee2,%g1 | |
20167 | ldx [%g4+0x20],%g2 | |
20168 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
20169 | bne %xcc,p0_reg_check_fail3 | |
20170 | mov 0xee3,%g1 | |
20171 | ldx [%g4+0x28],%g2 | |
20172 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
20173 | bne %xcc,p0_reg_check_fail4 | |
20174 | mov 0xee4,%g1 | |
20175 | ldx [%g4+0x30],%g2 | |
20176 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
20177 | bne %xcc,p0_reg_check_fail5 | |
20178 | mov 0xee5,%g1 | |
20179 | ldx [%g4+0x38],%g2 | |
20180 | cmp %l6,%g2 ! %l6 = 000000000000001a | |
20181 | bne %xcc,p0_reg_check_fail6 | |
20182 | mov 0xee6,%g1 | |
20183 | ldx [%g4+0x40],%g2 | |
20184 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
20185 | bne %xcc,p0_reg_check_fail7 | |
20186 | mov 0xee7,%g1 | |
20187 | ldx [%g4+0x48],%g3 | |
20188 | std %f0,[%g4] | |
20189 | ldx [%g4],%g2 | |
20190 | cmp %g3,%g2 ! %f0 = 00ff005e 00000000 | |
20191 | bne %xcc,p0_freg_check_fail | |
20192 | mov 0xf00,%g1 | |
20193 | ldx [%g4+0x50],%g3 | |
20194 | std %f2,[%g4] | |
20195 | ldx [%g4],%g2 | |
20196 | cmp %g3,%g2 ! %f2 = ffffffff ff000000 | |
20197 | bne %xcc,p0_freg_check_fail | |
20198 | mov 0xf02,%g1 | |
20199 | ldx [%g4+0x58],%g3 | |
20200 | std %f4,[%g4] | |
20201 | ldx [%g4],%g2 | |
20202 | cmp %g3,%g2 ! %f4 = 1a000000 00000000 | |
20203 | bne %xcc,p0_freg_check_fail | |
20204 | mov 0xf04,%g1 | |
20205 | ldx [%g4+0x60],%g3 | |
20206 | std %f6,[%g4] | |
20207 | ldx [%g4],%g2 | |
20208 | cmp %g3,%g2 ! %f6 = 02226c6b 57119e5e | |
20209 | bne %xcc,p0_freg_check_fail | |
20210 | mov 0xf06,%g1 | |
20211 | ldx [%g4+0x68],%g3 | |
20212 | std %f16,[%g4] | |
20213 | ldx [%g4],%g2 | |
20214 | cmp %g3,%g2 ! %f16 = ffffffff 00000000 | |
20215 | bne %xcc,p0_freg_check_fail | |
20216 | mov 0xf16,%g1 | |
20217 | ldx [%g4+0x70],%g3 | |
20218 | std %f22,[%g4] | |
20219 | ldx [%g4],%g2 | |
20220 | cmp %g3,%g2 ! %f22 = ff000000 0000ffff | |
20221 | bne %xcc,p0_freg_check_fail | |
20222 | mov 0xf22,%g1 | |
20223 | ||
20224 | ! Check Point 95 completed | |
20225 | ||
20226 | ||
20227 | p0_label_476: | |
20228 | ! %f25 = 000000ff, Mem[0000000010081400] = ffffffff | |
20229 | sta %f25,[%i2+%g0]0x80 ! Mem[0000000010081400] = 000000ff | |
20230 | ! %l6 = 000000000000001a, Mem[0000000010041428] = 00ff0000ff000000 | |
20231 | stx %l6,[%i1+0x028] ! Mem[0000000010041428] = 000000000000001a | |
20232 | ! %l5 = 0000000000000000, Mem[00000000100c1408] = ff000000ffffffff | |
20233 | stxa %l5,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 0000000000000000 | |
20234 | ! Mem[0000000010041410] = 0000ffff, %l1 = 000000000000ff00 | |
20235 | ldstuba [%i1+%o5]0x80,%l1 ! %l1 = 00000000000000ff | |
20236 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010181410] = ff000000 0000ffff | |
20237 | stda %l2,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00000000 00000000 | |
20238 | ! %f20 = 00000000 0000ffff, Mem[0000000010081428] = 00000000 00000000 | |
20239 | stda %f20,[%i2+0x028]%asi ! Mem[0000000010081428] = 00000000 0000ffff | |
20240 | ! %l2 = 0000000000000000, Mem[0000000030041410] = ff000000 | |
20241 | stwa %l2,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000 | |
20242 | ! %f29 = ffffffff, Mem[0000000010141410] = 5e00ff00 | |
20243 | sta %f29,[%i5+%o5]0x88 ! Mem[0000000010141410] = ffffffff | |
20244 | ! %l1 = 0000000000000000, Mem[00000000201c0000] = ff001669 | |
20245 | stb %l1,[%o0+%g0] ! Mem[00000000201c0000] = 00001669 | |
20246 | ! Starting 10 instruction Load Burst | |
20247 | ! Mem[0000000010181410] = 0000000000000000, %f4 = 1a000000 00000000 | |
20248 | ldda [%i6+0x010]%asi,%f4 ! %f4 = 00000000 00000000 | |
20249 | ||
20250 | p0_label_477: | |
20251 | ! Mem[00000000100c1408] = 0000000000000000, %f6 = 02226c6b 57119e5e | |
20252 | ldda [%i3+%o4]0x88,%f6 ! %f6 = 00000000 00000000 | |
20253 | ! Mem[0000000030081408] = 0000000000000000, %f4 = 00000000 00000000 | |
20254 | ldda [%i2+%o4]0x89,%f4 ! %f4 = 00000000 00000000 | |
20255 | ! Mem[0000000030101408] = ff000000, %l5 = 0000000000000000 | |
20256 | ldsha [%i4+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
20257 | ! Mem[00000000100c1410] = 000000000000ffff, %l5 = 0000000000000000 | |
20258 | ldxa [%i3+%o5]0x80,%l5 ! %l5 = 000000000000ffff | |
20259 | ! Mem[00000000100c1408] = 00000000, %l5 = 000000000000ffff | |
20260 | lduha [%i3+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
20261 | ! Mem[0000000030041410] = 00000000, %l4 = 0000000000000000 | |
20262 | lduba [%i1+%o5]0x81,%l4 ! %l4 = 0000000000000000 | |
20263 | ! Mem[0000000010141408] = 00000000, %l3 = 0000000000000000 | |
20264 | lduwa [%i5+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
20265 | ! Mem[0000000010041408] = 00000000, %l5 = 0000000000000000 | |
20266 | ldsba [%i1+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
20267 | ! Mem[0000000010181410] = 00000000, %l3 = 0000000000000000 | |
20268 | ldsba [%i6+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
20269 | ! Starting 10 instruction Store Burst | |
20270 | ! %l0 = 000000005e00ff00, Mem[0000000010101427] = 00ff0000 | |
20271 | stb %l0,[%i4+0x027] ! Mem[0000000010101424] = 00ff0000 | |
20272 | ||
20273 | p0_label_478: | |
20274 | ! %l1 = 0000000000000000, Mem[0000000010081410] = ffffffff | |
20275 | stwa %l1,[%i2+%o5]0x88 ! Mem[0000000010081410] = 00000000 | |
20276 | ! %f24 = 00000000, Mem[0000000030041410] = 00000000 | |
20277 | sta %f24,[%i1+%o5]0x89 ! Mem[0000000030041410] = 00000000 | |
20278 | ! %f24 = 00000000 000000ff, Mem[0000000030181408] = 00ff0000 00000000 | |
20279 | stda %f24,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000 000000ff | |
20280 | ! Mem[0000000030141400] = ebda9b81, %l3 = 0000000000000000 | |
20281 | ldstuba [%i5+%g0]0x89,%l3 ! %l3 = 00000081000000ff | |
20282 | ! Mem[0000000010001420] = 00000000000000ff, %l2 = 0000000000000000, %l5 = 0000000000000000 | |
20283 | add %i0,0x20,%g1 | |
20284 | casxa [%g1]0x80,%l2,%l5 ! %l5 = 00000000000000ff | |
20285 | ! Mem[000000001014143c] = ffffffff, %l5 = 000000ff, %l4 = 00000000 | |
20286 | add %i5,0x3c,%g1 | |
20287 | casa [%g1]0x80,%l5,%l4 ! %l4 = 00000000ffffffff | |
20288 | ! %l6 = 000000000000001a, Mem[0000000010041410] = ff00ffff | |
20289 | stba %l6,[%i1+%o5]0x80 ! Mem[0000000010041410] = 1a00ffff | |
20290 | ! %l0 = 5e00ff00, %l1 = 00000000, Mem[0000000030101408] = ff000000 ffff0000 | |
20291 | stda %l0,[%i4+%o4]0x89 ! Mem[0000000030101408] = 5e00ff00 00000000 | |
20292 | ! Mem[0000000010041408] = 00000000, %l6 = 000000000000001a | |
20293 | ldswa [%i1+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
20294 | ! Starting 10 instruction Load Burst | |
20295 | ! Mem[0000000010141400] = 00ff00000000ffff, %l2 = 0000000000000000 | |
20296 | ldxa [%i5+%g0]0x88,%l2 ! %l2 = 00ff00000000ffff | |
20297 | ||
20298 | p0_label_479: | |
20299 | ! Mem[0000000010081430] = ff0000ff 00000000, %l2 = 0000ffff, %l3 = 00000081 | |
20300 | ldda [%i2+0x030]%asi,%l2 ! %l2 = 00000000ff0000ff 0000000000000000 | |
20301 | ! Mem[0000000010181410] = 00000000, %l6 = 0000000000000000 | |
20302 | lduwa [%i6+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
20303 | ! Mem[0000000010181410] = 00000000, %l2 = 00000000ff0000ff | |
20304 | lduba [%i6+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
20305 | ! Mem[0000000010001410] = 000000ff, %l2 = 0000000000000000 | |
20306 | lduwa [%i0+%o5]0x88,%l2 ! %l2 = 00000000000000ff | |
20307 | ! Mem[0000000010141408] = 00000000, %l3 = 0000000000000000 | |
20308 | ldsha [%i5+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
20309 | ! Mem[0000000030181410] = ffff0000ffffffff, %l5 = 00000000000000ff | |
20310 | ldxa [%i6+%o5]0x81,%l5 ! %l5 = ffff0000ffffffff | |
20311 | ! Mem[0000000010141400] = ffff0000, %l7 = 0000000000000000 | |
20312 | ldsba [%i5+%g0]0x80,%l7 ! %l7 = ffffffffffffffff | |
20313 | ! Mem[0000000030101410] = ff000000 1a000000, %l4 = ffffffff, %l5 = ffffffff | |
20314 | ldda [%i4+%o5]0x89,%l4 ! %l4 = 000000001a000000 00000000ff000000 | |
20315 | ! Mem[0000000010001438] = ffff275effffffff, %l2 = 00000000000000ff | |
20316 | ldxa [%i0+0x038]%asi,%l2 ! %l2 = ffff275effffffff | |
20317 | ! Starting 10 instruction Store Burst | |
20318 | ! Mem[00000000100c1410] = 00000000, %l7 = ffffffffffffffff | |
20319 | swapa [%i3+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
20320 | ||
20321 | p0_label_480: | |
20322 | ! %f18 = ffffffff, Mem[000000001014140c] = ffffffff | |
20323 | sta %f18,[%i5+0x00c]%asi ! Mem[000000001014140c] = ffffffff | |
20324 | ! %f6 = 00000000 00000000, %l0 = 000000005e00ff00 | |
20325 | ! Mem[0000000030181408] = ff00000000000000 | |
20326 | add %i6,0x008,%g1 | |
20327 | stda %f6,[%g1+%l0]ASI_PST16_S ! Mem[0000000030181408] = ff00000000000000 | |
20328 | ! Mem[0000000010041410] = 1a00ffff, %l5 = 00000000ff000000 | |
20329 | swap [%i1+%o5],%l5 ! %l5 = 000000001a00ffff | |
20330 | ! %f14 = ffffffff 00ff005e, %l6 = 0000000000000000 | |
20331 | ! Mem[0000000030041410] = 0000000000000000 | |
20332 | add %i1,0x010,%g1 | |
20333 | stda %f14,[%g1+%l6]ASI_PST16_SL ! Mem[0000000030041410] = 0000000000000000 | |
20334 | ! Mem[0000000010001410] = 000000ff, %l2 = ffff275effffffff | |
20335 | ldstuba [%i0+%o5]0x88,%l2 ! %l2 = 000000ff000000ff | |
20336 | ! %f16 = ffffffff 00000000, %l6 = 0000000000000000 | |
20337 | ! Mem[0000000030041438] = ffffffff000000ff | |
20338 | add %i1,0x038,%g1 | |
20339 | stda %f16,[%g1+%l6]ASI_PST32_SL ! Mem[0000000030041438] = ffffffff000000ff | |
20340 | ! %f16 = ffffffff, Mem[0000000010001408] = 5e000000 | |
20341 | sta %f16,[%i0+%o4]0x80 ! Mem[0000000010001408] = ffffffff | |
20342 | ! Mem[0000000030041408] = 00000000, %l4 = 000000001a000000 | |
20343 | ldstuba [%i1+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
20344 | ! Mem[0000000010101410] = 0000001a, %l3 = 0000000000000000 | |
20345 | swapa [%i4+%o5]0x88,%l3 ! %l3 = 000000000000001a | |
20346 | ! Starting 10 instruction Load Burst | |
20347 | ! Mem[00000000300c1408] = 00000000 0000ffff, %l4 = 00000000, %l5 = 1a00ffff | |
20348 | ldda [%i3+%o4]0x89,%l4 ! %l4 = 000000000000ffff 0000000000000000 | |
20349 | ||
20350 | ! Check Point 96 for processor 0 | |
20351 | ||
20352 | set p0_check_pt_data_96,%g4 | |
20353 | rd %ccr,%g5 ! %g5 = 44 | |
20354 | ldx [%g4+0x08],%g2 | |
20355 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
20356 | bne %xcc,p0_reg_check_fail1 | |
20357 | mov 0xee1,%g1 | |
20358 | ldx [%g4+0x10],%g2 | |
20359 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
20360 | bne %xcc,p0_reg_check_fail2 | |
20361 | mov 0xee2,%g1 | |
20362 | ldx [%g4+0x18],%g2 | |
20363 | cmp %l3,%g2 ! %l3 = 000000000000001a | |
20364 | bne %xcc,p0_reg_check_fail3 | |
20365 | mov 0xee3,%g1 | |
20366 | ldx [%g4+0x20],%g2 | |
20367 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
20368 | bne %xcc,p0_reg_check_fail4 | |
20369 | mov 0xee4,%g1 | |
20370 | ldx [%g4+0x28],%g2 | |
20371 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
20372 | bne %xcc,p0_reg_check_fail5 | |
20373 | mov 0xee5,%g1 | |
20374 | ldx [%g4+0x30],%g2 | |
20375 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
20376 | bne %xcc,p0_reg_check_fail6 | |
20377 | mov 0xee6,%g1 | |
20378 | ldx [%g4+0x38],%g2 | |
20379 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
20380 | bne %xcc,p0_reg_check_fail7 | |
20381 | mov 0xee7,%g1 | |
20382 | ldx [%g4+0x40],%g3 | |
20383 | std %f2,[%g4] | |
20384 | ldx [%g4],%g2 | |
20385 | cmp %g3,%g2 ! %f2 = ffffffff ff000000 | |
20386 | bne %xcc,p0_freg_check_fail | |
20387 | mov 0xf02,%g1 | |
20388 | ldx [%g4+0x48],%g3 | |
20389 | std %f4,[%g4] | |
20390 | ldx [%g4],%g2 | |
20391 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
20392 | bne %xcc,p0_freg_check_fail | |
20393 | mov 0xf04,%g1 | |
20394 | ldx [%g4+0x50],%g3 | |
20395 | std %f6,[%g4] | |
20396 | ldx [%g4],%g2 | |
20397 | cmp %g3,%g2 ! %f6 = 00000000 00000000 | |
20398 | bne %xcc,p0_freg_check_fail | |
20399 | mov 0xf06,%g1 | |
20400 | ||
20401 | ! Check Point 96 completed | |
20402 | ||
20403 | ||
20404 | p0_label_481: | |
20405 | ! Mem[0000000030081400] = 000000000000001a, %l5 = 0000000000000000 | |
20406 | ldxa [%i2+%g0]0x81,%l5 ! %l5 = 000000000000001a | |
20407 | ! Mem[0000000030181410] = ffff0000, %l3 = 000000000000001a | |
20408 | ldswa [%i6+%o5]0x81,%l3 ! %l3 = ffffffffffff0000 | |
20409 | ! Mem[0000000030001400] = ffffff00, %l5 = 000000000000001a | |
20410 | lduwa [%i0+%g0]0x89,%l5 ! %l5 = 00000000ffffff00 | |
20411 | ! Mem[00000000300c1408] = ffff0000 00000000, %l6 = 00000000, %l7 = 00000000 | |
20412 | ldda [%i3+%o4]0x81,%l6 ! %l6 = 00000000ffff0000 0000000000000000 | |
20413 | ! Mem[0000000030141410] = 000000ff, %l0 = 000000005e00ff00 | |
20414 | ldsba [%i5+%o5]0x81,%l0 ! %l0 = 0000000000000000 | |
20415 | ! Mem[0000000030101408] = 00ff005e, %l0 = 0000000000000000 | |
20416 | ldsha [%i4+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
20417 | ! Mem[0000000030181408] = 000000ff, %l2 = 00000000000000ff | |
20418 | lduha [%i6+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
20419 | ! %l7 = 0000000000000000, immed = fffffd77, %y = 00000000 | |
20420 | smul %l7,-0x289,%l3 ! %l3 = 0000000000000000, %y = 00000000 | |
20421 | ! Mem[0000000030041408] = ff000000 8ab60000, %l0 = 000000ff, %l1 = 00000000 | |
20422 | ldda [%i1+%o4]0x81,%l0 ! %l0 = 00000000ff000000 000000008ab60000 | |
20423 | ! Starting 10 instruction Store Burst | |
20424 | ! %l5 = 00000000ffffff00, Mem[0000000030181410] = ffff0000 | |
20425 | stba %l5,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00ff0000 | |
20426 | ||
20427 | p0_label_482: | |
20428 | ! %l0 = 00000000ff000000, Mem[0000000010141410] = ffffffff | |
20429 | stha %l0,[%i5+%o5]0x80 ! Mem[0000000010141410] = 0000ffff | |
20430 | ! %l7 = 0000000000000000, Mem[0000000030181410] = 0000ff00 | |
20431 | stwa %l7,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000 | |
20432 | ! Mem[0000000030141400] = ff9bdaeb, %l0 = 00000000ff000000 | |
20433 | ldstuba [%i5+%g0]0x81,%l0 ! %l0 = 000000ff000000ff | |
20434 | ! %l2 = 000000ff, %l3 = 00000000, Mem[0000000030041410] = 00000000 00000000 | |
20435 | stda %l2,[%i1+%o5]0x81 ! Mem[0000000030041410] = 000000ff 00000000 | |
20436 | ! %l7 = 0000000000000000, Mem[0000000030081410] = 00000000 | |
20437 | stwa %l7,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00000000 | |
20438 | ! Mem[0000000030181410] = 00000000, %l7 = 0000000000000000 | |
20439 | ldstuba [%i6+%o5]0x81,%l7 ! %l7 = 00000000000000ff | |
20440 | ! %l4 = 000000000000ffff, Mem[0000000010181408] = 000000ffffffffff | |
20441 | stxa %l4,[%i6+%o4]0x80 ! Mem[0000000010181408] = 000000000000ffff | |
20442 | ! %f0 = 00ff005e 00000000, Mem[0000000010001410] = ff000000 ffff00ff | |
20443 | stda %f0 ,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00ff005e 00000000 | |
20444 | ! %l2 = 00000000000000ff, Mem[00000000100c1400] = ffffffffffffffff, %asi = 80 | |
20445 | stxa %l2,[%i3+0x000]%asi ! Mem[00000000100c1400] = 00000000000000ff | |
20446 | ! Starting 10 instruction Load Burst | |
20447 | ! Mem[0000000010001418] = 5e000000, %l1 = 000000008ab60000 | |
20448 | ldub [%i0+0x018],%l1 ! %l1 = 000000000000005e | |
20449 | ||
20450 | p0_label_483: | |
20451 | ! Mem[0000000010081400] = 000000ff, %l5 = 00000000ffffff00 | |
20452 | lduha [%i2+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
20453 | ! Mem[0000000030041410] = ff000000, %l4 = 000000000000ffff | |
20454 | lduha [%i1+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
20455 | ! Mem[00000000300c1408] = ffff000000000000, %f18 = ffffffff ffffffff | |
20456 | ldda [%i3+%o4]0x81,%f18 ! %f18 = ffff0000 00000000 | |
20457 | ! Mem[00000000211c0000] = fffffe0c, %l2 = 00000000000000ff | |
20458 | lduba [%o2+0x001]%asi,%l2 ! %l2 = 00000000000000ff | |
20459 | ! Mem[0000000010041418] = 00000000, %l7 = 0000000000000000 | |
20460 | ldswa [%i1+0x018]%asi,%l7 ! %l7 = 0000000000000000 | |
20461 | ! Mem[0000000010141430] = ffffffff, %l1 = 000000000000005e | |
20462 | ldsha [%i5+0x030]%asi,%l1 ! %l1 = ffffffffffffffff | |
20463 | ! Mem[0000000020800040] = ff009ffa, %l4 = 0000000000000000 | |
20464 | lduh [%o1+0x040],%l4 ! %l4 = 000000000000ff00 | |
20465 | ! Mem[0000000030001410] = 0000ffff, %l3 = 0000000000000000 | |
20466 | ldsha [%i0+%o5]0x89,%l3 ! %l3 = ffffffffffffffff | |
20467 | ! Mem[0000000030041408] = ff000000, %l7 = 0000000000000000 | |
20468 | lduba [%i1+%o4]0x81,%l7 ! %l7 = 00000000000000ff | |
20469 | ! Starting 10 instruction Store Burst | |
20470 | ! %l6 = 00000000ffff0000, Mem[0000000020800040] = ff009ffa | |
20471 | sth %l6,[%o1+0x040] ! Mem[0000000020800040] = 00009ffa | |
20472 | ||
20473 | p0_label_484: | |
20474 | ! %l5 = 0000000000000000, Mem[0000000021800080] = ffff0b33 | |
20475 | sth %l5,[%o3+0x080] ! Mem[0000000021800080] = 00000b33 | |
20476 | ! Mem[00000000201c0001] = 00001669, %l3 = ffffffffffffffff | |
20477 | ldstuba [%o0+0x001]%asi,%l3 ! %l3 = 00000000000000ff | |
20478 | ! %f28 = ffff275e ffffffff, %l4 = 000000000000ff00 | |
20479 | ! Mem[0000000030001438] = 5e00000000000000 | |
20480 | add %i0,0x038,%g1 | |
20481 | stda %f28,[%g1+%l4]ASI_PST8_S ! Mem[0000000030001438] = 5e00000000000000 | |
20482 | ! Mem[000000001010143c] = 00000000, %l3 = 0000000000000000 | |
20483 | lduh [%i4+0x03e],%l3 ! %l3 = 0000000000000000 | |
20484 | ! Mem[0000000010141404] = 0000ff00, %l4 = 0000ff00, %l7 = 000000ff | |
20485 | add %i5,0x04,%g1 | |
20486 | casa [%g1]0x80,%l4,%l7 ! %l7 = 000000000000ff00 | |
20487 | ! %l0 = 000000ff, %l1 = ffffffff, Mem[0000000010181420] = 00000000 000000ff | |
20488 | stda %l0,[%i6+0x020]%asi ! Mem[0000000010181420] = 000000ff ffffffff | |
20489 | ! %f29 = ffffffff, Mem[0000000010041410] = ff000000 | |
20490 | sta %f29,[%i1+%o5]0x80 ! Mem[0000000010041410] = ffffffff | |
20491 | ! %l0 = 000000ff, %l1 = ffffffff, Mem[0000000030001408] = ff000000 ffffffff | |
20492 | stda %l0,[%i0+%o4]0x81 ! Mem[0000000030001408] = 000000ff ffffffff | |
20493 | ! %l0 = 000000ff, %l1 = ffffffff, Mem[0000000030001408] = 000000ff ffffffff | |
20494 | stda %l0,[%i0+%o4]0x81 ! Mem[0000000030001408] = 000000ff ffffffff | |
20495 | ! Starting 10 instruction Load Burst | |
20496 | ! Mem[0000000010141400] = ff0000000000ffff, %f26 = 00000000 0000ffff | |
20497 | ldda [%i5+%g0]0x88,%f26 ! %f26 = ff000000 0000ffff | |
20498 | ||
20499 | p0_label_485: | |
20500 | ! Mem[0000000010181410] = 0000000000000000, %f12 = ffffffff 365fc6fa | |
20501 | ldda [%i6+0x010]%asi,%f12 ! %f12 = 00000000 00000000 | |
20502 | ! Mem[0000000010101400] = 000000ff, %f19 = 00000000 | |
20503 | lda [%i4+%g0]0x88,%f19 ! %f19 = 000000ff | |
20504 | ! Mem[0000000030081408] = 00000000 00000000, %l4 = 0000ff00, %l5 = 00000000 | |
20505 | ldda [%i2+%o4]0x81,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
20506 | ! Code Fragment 4 | |
20507 | p0_fragment_11: | |
20508 | ! %l0 = 00000000000000ff | |
20509 | setx 0x9ed65a300d497904,%g7,%l0 ! %l0 = 9ed65a300d497904 | |
20510 | ! %l1 = ffffffffffffffff | |
20511 | setx 0x3c6aed083f04b718,%g7,%l1 ! %l1 = 3c6aed083f04b718 | |
20512 | setx 0x7ff8, %g1, %g2 | |
20513 | and %l0, %g2, %l0 | |
20514 | setx 0xffffffff, %g1, %g2 | |
20515 | and %l1, %g2, %l1 | |
20516 | setx 0x100000000, %g1, %g2 | |
20517 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
20518 | ta T_CHANGE_HPRIV | |
20519 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
20520 | ta T_CHANGE_NONHPRIV | |
20521 | ! %l0 = 9ed65a300d497904 | |
20522 | setx 0x6e7a9150051041c7,%g7,%l0 ! %l0 = 6e7a9150051041c7 | |
20523 | ! %l1 = 3c6aed083f04b718 | |
20524 | setx 0x04776bc00345f46d,%g7,%l1 ! %l1 = 04776bc00345f46d | |
20525 | ! Mem[0000000010001410] = 00ff005e, %l5 = 0000000000000000 | |
20526 | ldswa [%i0+0x010]%asi,%l5 ! %l5 = 0000000000ff005e | |
20527 | ! Mem[0000000010101410] = 00000000, %f27 = 0000ffff | |
20528 | lda [%i4+%o5]0x80,%f27 ! %f27 = 00000000 | |
20529 | ! Mem[0000000010141410] = 00000000ffff0000, %l1 = 04776bc00345f46d | |
20530 | ldxa [%i5+%o5]0x88,%l1 ! %l1 = 00000000ffff0000 | |
20531 | ! Mem[0000000010101418] = 5e9e1157, %l2 = 00000000000000ff | |
20532 | lduba [%i4+0x018]%asi,%l2 ! %l2 = 000000000000005e | |
20533 | ! Mem[0000000010041420] = 02226c6b57119e5e, %f0 = 00ff005e 00000000 | |
20534 | ldda [%i1+0x020]%asi,%f0 ! %f0 = 02226c6b 57119e5e | |
20535 | ! Starting 10 instruction Store Burst | |
20536 | ! Mem[0000000020800001] = f9ff0db6, %l0 = 6e7a9150051041c7 | |
20537 | ldstub [%o1+0x001],%l0 ! %l0 = 000000ff000000ff | |
20538 | ||
20539 | ! Check Point 97 for processor 0 | |
20540 | ||
20541 | set p0_check_pt_data_97,%g4 | |
20542 | rd %ccr,%g5 ! %g5 = 44 | |
20543 | ldx [%g4+0x08],%g2 | |
20544 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
20545 | bne %xcc,p0_reg_check_fail0 | |
20546 | mov 0xee0,%g1 | |
20547 | ldx [%g4+0x10],%g2 | |
20548 | cmp %l1,%g2 ! %l1 = 00000000ffff0000 | |
20549 | bne %xcc,p0_reg_check_fail1 | |
20550 | mov 0xee1,%g1 | |
20551 | ldx [%g4+0x18],%g2 | |
20552 | cmp %l2,%g2 ! %l2 = 000000000000005e | |
20553 | bne %xcc,p0_reg_check_fail2 | |
20554 | mov 0xee2,%g1 | |
20555 | ldx [%g4+0x20],%g2 | |
20556 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
20557 | bne %xcc,p0_reg_check_fail3 | |
20558 | mov 0xee3,%g1 | |
20559 | ldx [%g4+0x28],%g2 | |
20560 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
20561 | bne %xcc,p0_reg_check_fail4 | |
20562 | mov 0xee4,%g1 | |
20563 | ldx [%g4+0x30],%g2 | |
20564 | cmp %l5,%g2 ! %l5 = 0000000000ff005e | |
20565 | bne %xcc,p0_reg_check_fail5 | |
20566 | mov 0xee5,%g1 | |
20567 | ldx [%g4+0x38],%g2 | |
20568 | cmp %l7,%g2 ! %l7 = 000000000000ff00 | |
20569 | bne %xcc,p0_reg_check_fail7 | |
20570 | mov 0xee7,%g1 | |
20571 | ldx [%g4+0x40],%g3 | |
20572 | std %f0,[%g4] | |
20573 | ldx [%g4],%g2 | |
20574 | cmp %g3,%g2 ! %f0 = 02226c6b 57119e5e | |
20575 | bne %xcc,p0_freg_check_fail | |
20576 | mov 0xf00,%g1 | |
20577 | ldx [%g4+0x48],%g3 | |
20578 | std %f4,[%g4] | |
20579 | ldx [%g4],%g2 | |
20580 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
20581 | bne %xcc,p0_freg_check_fail | |
20582 | mov 0xf04,%g1 | |
20583 | ldx [%g4+0x50],%g3 | |
20584 | std %f6,[%g4] | |
20585 | ldx [%g4],%g2 | |
20586 | cmp %g3,%g2 ! %f6 = 00000000 00000000 | |
20587 | bne %xcc,p0_freg_check_fail | |
20588 | mov 0xf06,%g1 | |
20589 | ldx [%g4+0x58],%g3 | |
20590 | std %f12,[%g4] | |
20591 | ldx [%g4],%g2 | |
20592 | cmp %g3,%g2 ! %f12 = 00000000 00000000 | |
20593 | bne %xcc,p0_freg_check_fail | |
20594 | mov 0xf12,%g1 | |
20595 | ldx [%g4+0x60],%g3 | |
20596 | std %f18,[%g4] | |
20597 | ldx [%g4],%g2 | |
20598 | cmp %g3,%g2 ! %f18 = ffff0000 000000ff | |
20599 | bne %xcc,p0_freg_check_fail | |
20600 | mov 0xf18,%g1 | |
20601 | ldx [%g4+0x68],%g3 | |
20602 | std %f26,[%g4] | |
20603 | ldx [%g4],%g2 | |
20604 | cmp %g3,%g2 ! %f26 = ff000000 00000000 | |
20605 | bne %xcc,p0_freg_check_fail | |
20606 | mov 0xf26,%g1 | |
20607 | ||
20608 | ! Check Point 97 completed | |
20609 | ||
20610 | ||
20611 | p0_label_486: | |
20612 | ! %f14 = ffffffff 00ff005e, Mem[0000000010081408] = ff0000ff ffffffff | |
20613 | stda %f14,[%i2+%o4]0x80 ! Mem[0000000010081408] = ffffffff 00ff005e | |
20614 | ! %l6 = ffff0000, %l7 = 0000ff00, Mem[0000000010101410] = 00000000 00000000 | |
20615 | stda %l6,[%i4+%o5]0x88 ! Mem[0000000010101410] = ffff0000 0000ff00 | |
20616 | ! %l6 = 00000000ffff0000, Mem[00000000100c1408] = 0000000000000000 | |
20617 | stxa %l6,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000ffff0000 | |
20618 | ! %l2 = 000000000000005e, Mem[0000000010181435] = ffffffff | |
20619 | stb %l2,[%i6+0x035] ! Mem[0000000010181434] = ff5effff | |
20620 | ! %l1 = 00000000ffff0000, Mem[0000000010081428] = 000000000000ffff | |
20621 | stx %l1,[%i2+0x028] ! Mem[0000000010081428] = 00000000ffff0000 | |
20622 | ! Mem[0000000030141408] = ff000000, %l1 = 00000000ffff0000 | |
20623 | swapa [%i5+%o4]0x89,%l1 ! %l1 = 00000000ff000000 | |
20624 | ! %l5 = 0000000000ff005e, Mem[0000000010181408] = 00000000 | |
20625 | stha %l5,[%i6+%o4]0x80 ! Mem[0000000010181408] = 005e0000 | |
20626 | ! Mem[0000000010001400] = 000000ff, %l3 = 0000000000000000 | |
20627 | ldstuba [%i0+%g0]0x88,%l3 ! %l3 = 000000ff000000ff | |
20628 | ! %f26 = ff000000 00000000, Mem[0000000030181400] = fff9ffff 00000000 | |
20629 | stda %f26,[%i6+%g0]0x89 ! Mem[0000000030181400] = ff000000 00000000 | |
20630 | ! Starting 10 instruction Load Burst | |
20631 | ! Mem[00000000300c1410] = 00000000 ffffffff, %l6 = ffff0000, %l7 = 0000ff00 | |
20632 | ldda [%i3+%o5]0x89,%l6 ! %l6 = 00000000ffffffff 0000000000000000 | |
20633 | ||
20634 | p0_label_487: | |
20635 | ! Mem[0000000010081410] = 00000000, %l6 = 00000000ffffffff | |
20636 | ldsha [%i2+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
20637 | ! Mem[0000000010041408] = 00000000, %l1 = 00000000ff000000 | |
20638 | ldsba [%i1+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
20639 | membar #Sync ! Added by membar checker (95) | |
20640 | ! Mem[0000000010001400] = ff000000 0000ffff ffffffff 00000000 | |
20641 | ! Mem[0000000010001410] = 00ff005e 00000000 5e000000 ffff0000 | |
20642 | ! Mem[0000000010001420] = 00000000 000000ff 9ce0b68a a3ffade0 | |
20643 | ! Mem[0000000010001430] = 00000000 00000000 ffff275e ffffffff | |
20644 | ldda [%i0]ASI_BLK_P,%f16 ! Block Load from 0000000010001400 | |
20645 | ! Mem[000000001010140c] = 00ff0000, %l3 = 00000000000000ff | |
20646 | ldswa [%i4+0x00c]%asi,%l3 ! %l3 = 0000000000ff0000 | |
20647 | ! Mem[0000000030041410] = ff000000, %l6 = 0000000000000000 | |
20648 | ldswa [%i1+%o5]0x89,%l6 ! %l6 = ffffffffff000000 | |
20649 | ! Mem[0000000030001400] = 00ffffff ffffffff, %l4 = 00000000, %l5 = 00ff005e | |
20650 | ldda [%i0+%g0]0x81,%l4 ! %l4 = 0000000000ffffff 00000000ffffffff | |
20651 | ! Mem[0000000010101400] = ff000000, %l1 = 0000000000000000 | |
20652 | lduha [%i4+%g0]0x80,%l1 ! %l1 = 000000000000ff00 | |
20653 | ! Mem[0000000010001428] = 9ce0b68a, %l1 = 000000000000ff00 | |
20654 | ldsha [%i0+0x028]%asi,%l1 ! %l1 = ffffffffffff9ce0 | |
20655 | ! Mem[0000000010141410] = 0000ffff, %l3 = 0000000000ff0000 | |
20656 | ldsb [%i5+0x012],%l3 ! %l3 = ffffffffffffffff | |
20657 | ! Starting 10 instruction Store Burst | |
20658 | ! Mem[000000001018140c] = 0000ffff, %l6 = ffffffffff000000 | |
20659 | swap [%i6+0x00c],%l6 ! %l6 = 000000000000ffff | |
20660 | ||
20661 | p0_label_488: | |
20662 | ! %l7 = 0000000000000000, Mem[0000000010181430] = ffff275eff5effff | |
20663 | stx %l7,[%i6+0x030] ! Mem[0000000010181430] = 0000000000000000 | |
20664 | ! %l6 = 000000000000ffff, Mem[0000000010101410] = 0000ffff | |
20665 | stha %l6,[%i4+%o5]0x80 ! Mem[0000000010101410] = ffffffff | |
20666 | ! Mem[00000000100c1408] = ffff0000, %l7 = 0000000000000000 | |
20667 | swapa [%i3+%o4]0x88,%l7 ! %l7 = 00000000ffff0000 | |
20668 | ! %l2 = 000000000000005e, Mem[0000000021800080] = 00000b33 | |
20669 | stb %l2,[%o3+0x080] ! Mem[0000000021800080] = 5e000b33 | |
20670 | ! Mem[0000000010041410] = ffffffff, %l1 = ffffffffffff9ce0 | |
20671 | swapa [%i1+%o5]0x88,%l1 ! %l1 = 00000000ffffffff | |
20672 | ! %f2 = ffffffff ff000000, Mem[0000000030001410] = 0000ffff ffffffff | |
20673 | stda %f2 ,[%i0+%o5]0x89 ! Mem[0000000030001410] = ffffffff ff000000 | |
20674 | ! Mem[0000000010081400] = ff000000, %l4 = 0000000000ffffff | |
20675 | ldstuba [%i2+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
20676 | ! Mem[0000000010001410] = 00ff005e, %l4 = 0000000000000000 | |
20677 | ldstuba [%i0+%o5]0x80,%l4 ! %l4 = 00000000000000ff | |
20678 | ! %l6 = 000000000000ffff, Mem[0000000010041410] = e09cffff | |
20679 | stha %l6,[%i1+%o5]0x80 ! Mem[0000000010041410] = ffffffff | |
20680 | ! Starting 10 instruction Load Burst | |
20681 | ! Mem[0000000010001418] = 5e000000, %l2 = 000000000000005e | |
20682 | lduw [%i0+0x018],%l2 ! %l2 = 000000005e000000 | |
20683 | ||
20684 | p0_label_489: | |
20685 | ! Mem[0000000030181410] = ffffffff000000ff, %l7 = 00000000ffff0000 | |
20686 | ldxa [%i6+%o5]0x89,%l7 ! %l7 = ffffffff000000ff | |
20687 | ! Mem[0000000030041410] = 000000ff, %l4 = 0000000000000000 | |
20688 | lduwa [%i1+%o5]0x81,%l4 ! %l4 = 00000000000000ff | |
20689 | ! Mem[0000000030081400] = 00000000 0000001a 00000000 00000000 | |
20690 | ! Mem[0000000030081410] = 00000000 ffffffff 02226c6b ff0000ff | |
20691 | ! Mem[0000000030081420] = 5e27ffff ffffffff 9cffb68a ffffffff | |
20692 | ! Mem[0000000030081430] = ffff0000 00000000 0000ffff ff0000ff | |
20693 | ldda [%i2]ASI_BLK_AIUSL,%f16 ! Block Load from 0000000030081400 | |
20694 | ! Mem[0000000030181410] = ff000000, %l6 = 000000000000ffff | |
20695 | lduba [%i6+%o5]0x81,%l6 ! %l6 = 00000000000000ff | |
20696 | ! Mem[00000000300c1400] = ff5e0000, %l1 = 00000000ffffffff | |
20697 | ldsba [%i3+%g0]0x81,%l1 ! %l1 = ffffffffffffffff | |
20698 | ! Mem[00000000100c1400] = 00000000, %l7 = ffffffff000000ff | |
20699 | ldsba [%i3+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
20700 | ! Mem[0000000010001414] = 00000000, %l3 = ffffffffffffffff | |
20701 | ldsba [%i0+0x016]%asi,%l3 ! %l3 = 0000000000000000 | |
20702 | ! Mem[0000000010081408] = ffffffff, %l3 = 0000000000000000 | |
20703 | ldswa [%i2+%o4]0x88,%l3 ! %l3 = ffffffffffffffff | |
20704 | ! Mem[0000000010041408] = 00000000, %l7 = 0000000000000000 | |
20705 | lduha [%i1+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
20706 | ! Starting 10 instruction Store Burst | |
20707 | ! %f6 = 00000000 00000000, %l3 = ffffffffffffffff | |
20708 | ! Mem[0000000010041410] = ffffffff0000ff8a | |
20709 | add %i1,0x010,%g1 | |
20710 | stda %f6,[%g1+%l3]ASI_PST32_P ! Mem[0000000010041410] = 0000000000000000 | |
20711 | ||
20712 | p0_label_490: | |
20713 | ! %f8 = 925b1ad8 39aced3b, Mem[0000000010041420] = 02226c6b 57119e5e | |
20714 | std %f8 ,[%i1+0x020] ! Mem[0000000010041420] = 925b1ad8 39aced3b | |
20715 | ! %l6 = 00000000000000ff, Mem[0000000030001410] = 000000ffffffffff | |
20716 | stxa %l6,[%i0+%o5]0x81 ! Mem[0000000030001410] = 00000000000000ff | |
20717 | ! %l6 = 000000ff, %l7 = 00000000, Mem[00000000100c1438] = 5e000000 00000000 | |
20718 | stda %l6,[%i3+0x038]%asi ! Mem[00000000100c1438] = 000000ff 00000000 | |
20719 | ! Mem[00000000100c1400] = 00000000, %l7 = 0000000000000000 | |
20720 | swapa [%i3+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
20721 | ! %l1 = ffffffffffffffff, Mem[00000000100c1410] = ffffffff0000ffff | |
20722 | stxa %l1,[%i3+%o5]0x80 ! Mem[00000000100c1410] = ffffffffffffffff | |
20723 | ! Mem[0000000030041400] = 000000ff, %l6 = 00000000000000ff | |
20724 | ldstuba [%i1+%g0]0x89,%l6 ! %l6 = 000000ff000000ff | |
20725 | ! %f11 = 000000ff, Mem[00000000100c1400] = 00000000 | |
20726 | sta %f11,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 000000ff | |
20727 | ! %l5 = 00000000ffffffff, Mem[0000000020800040] = 00009ffa, %asi = 80 | |
20728 | stha %l5,[%o1+0x040]%asi ! Mem[0000000020800040] = ffff9ffa | |
20729 | ! %f16 = 1a000000 00000000 00000000 00000000 | |
20730 | ! %f20 = ffffffff 00000000 ff0000ff 6b6c2202 | |
20731 | ! %f24 = ffffffff ffff275e ffffffff 8ab6ff9c | |
20732 | ! %f28 = 00000000 0000ffff ff0000ff ffff0000 | |
20733 | stda %f16,[%i3]ASI_BLK_AIUP ! Block Store to 00000000100c1400 | |
20734 | ! Starting 10 instruction Load Burst | |
20735 | ! Mem[0000000010041434] = ffff275e, %f14 = ffffffff | |
20736 | ld [%i1+0x034],%f14 ! %f14 = ffff275e | |
20737 | ||
20738 | ! Check Point 98 for processor 0 | |
20739 | ||
20740 | set p0_check_pt_data_98,%g4 | |
20741 | rd %ccr,%g5 ! %g5 = 44 | |
20742 | ldx [%g4+0x08],%g2 | |
20743 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
20744 | bne %xcc,p0_reg_check_fail1 | |
20745 | mov 0xee1,%g1 | |
20746 | ldx [%g4+0x10],%g2 | |
20747 | cmp %l2,%g2 ! %l2 = 000000005e000000 | |
20748 | bne %xcc,p0_reg_check_fail2 | |
20749 | mov 0xee2,%g1 | |
20750 | ldx [%g4+0x18],%g2 | |
20751 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
20752 | bne %xcc,p0_reg_check_fail3 | |
20753 | mov 0xee3,%g1 | |
20754 | ldx [%g4+0x20],%g2 | |
20755 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
20756 | bne %xcc,p0_reg_check_fail4 | |
20757 | mov 0xee4,%g1 | |
20758 | ldx [%g4+0x28],%g2 | |
20759 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
20760 | bne %xcc,p0_reg_check_fail6 | |
20761 | mov 0xee6,%g1 | |
20762 | ldx [%g4+0x30],%g2 | |
20763 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
20764 | bne %xcc,p0_reg_check_fail7 | |
20765 | mov 0xee7,%g1 | |
20766 | ldx [%g4+0x38],%g3 | |
20767 | std %f4,[%g4] | |
20768 | ldx [%g4],%g2 | |
20769 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
20770 | bne %xcc,p0_freg_check_fail | |
20771 | mov 0xf04,%g1 | |
20772 | ldx [%g4+0x40],%g3 | |
20773 | std %f6,[%g4] | |
20774 | ldx [%g4],%g2 | |
20775 | cmp %g3,%g2 ! %f6 = 00000000 00000000 | |
20776 | bne %xcc,p0_freg_check_fail | |
20777 | mov 0xf06,%g1 | |
20778 | ldx [%g4+0x48],%g3 | |
20779 | std %f14,[%g4] | |
20780 | ldx [%g4],%g2 | |
20781 | cmp %g3,%g2 ! %f14 = ffff275e 00ff005e | |
20782 | bne %xcc,p0_freg_check_fail | |
20783 | mov 0xf14,%g1 | |
20784 | ldx [%g4+0x50],%g3 | |
20785 | std %f16,[%g4] | |
20786 | ldx [%g4],%g2 | |
20787 | cmp %g3,%g2 ! %f16 = 1a000000 00000000 | |
20788 | bne %xcc,p0_freg_check_fail | |
20789 | mov 0xf16,%g1 | |
20790 | ldx [%g4+0x58],%g3 | |
20791 | std %f18,[%g4] | |
20792 | ldx [%g4],%g2 | |
20793 | cmp %g3,%g2 ! %f18 = 00000000 00000000 | |
20794 | bne %xcc,p0_freg_check_fail | |
20795 | mov 0xf18,%g1 | |
20796 | ldx [%g4+0x60],%g3 | |
20797 | std %f20,[%g4] | |
20798 | ldx [%g4],%g2 | |
20799 | cmp %g3,%g2 ! %f20 = ffffffff 00000000 | |
20800 | bne %xcc,p0_freg_check_fail | |
20801 | mov 0xf20,%g1 | |
20802 | ldx [%g4+0x68],%g3 | |
20803 | std %f22,[%g4] | |
20804 | ldx [%g4],%g2 | |
20805 | cmp %g3,%g2 ! %f22 = ff0000ff 6b6c2202 | |
20806 | bne %xcc,p0_freg_check_fail | |
20807 | mov 0xf22,%g1 | |
20808 | ldx [%g4+0x70],%g3 | |
20809 | std %f24,[%g4] | |
20810 | ldx [%g4],%g2 | |
20811 | cmp %g3,%g2 ! %f24 = ffffffff ffff275e | |
20812 | bne %xcc,p0_freg_check_fail | |
20813 | mov 0xf24,%g1 | |
20814 | ldx [%g4+0x78],%g3 | |
20815 | std %f26,[%g4] | |
20816 | ldx [%g4],%g2 | |
20817 | cmp %g3,%g2 ! %f26 = ffffffff 8ab6ff9c | |
20818 | bne %xcc,p0_freg_check_fail | |
20819 | mov 0xf26,%g1 | |
20820 | ldx [%g4+0x80],%g3 | |
20821 | std %f28,[%g4] | |
20822 | ldx [%g4],%g2 | |
20823 | cmp %g3,%g2 ! %f28 = 00000000 0000ffff | |
20824 | bne %xcc,p0_freg_check_fail | |
20825 | mov 0xf28,%g1 | |
20826 | ldx [%g4+0x88],%g3 | |
20827 | std %f30,[%g4] | |
20828 | ldx [%g4],%g2 | |
20829 | cmp %g3,%g2 ! %f30 = ff0000ff ffff0000 | |
20830 | bne %xcc,p0_freg_check_fail | |
20831 | mov 0xf30,%g1 | |
20832 | ||
20833 | ! Check Point 98 completed | |
20834 | ||
20835 | ||
20836 | p0_label_491: | |
20837 | ! Mem[0000000030141408] = ffff0000, %l2 = 000000005e000000 | |
20838 | lduha [%i5+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
20839 | membar #Sync ! Added by membar checker (96) | |
20840 | ! Mem[00000000100c1410] = ffffffff00000000, %f0 = 02226c6b 57119e5e | |
20841 | ldda [%i3+%o5]0x80,%f0 ! %f0 = ffffffff 00000000 | |
20842 | ! Mem[0000000030101408] = 5e00ff00, %l4 = 00000000000000ff | |
20843 | lduha [%i4+%o4]0x89,%l4 ! %l4 = 000000000000ff00 | |
20844 | ! Mem[0000000030181400] = ff000000 00000000, %l4 = 0000ff00, %l5 = ffffffff | |
20845 | ldda [%i6+%g0]0x89,%l4 ! %l4 = 0000000000000000 00000000ff000000 | |
20846 | ! Mem[00000000300c1408] = 0000ffff, %l3 = ffffffffffffffff | |
20847 | lduha [%i3+%o4]0x89,%l3 ! %l3 = 000000000000ffff | |
20848 | ! Mem[0000000010081400] = ff0000ff, %l3 = 000000000000ffff | |
20849 | ldsha [%i2+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
20850 | ! Mem[0000000030081400] = 00000000, %l7 = 0000000000000000 | |
20851 | lduba [%i2+%g0]0x81,%l7 ! %l7 = 0000000000000000 | |
20852 | ! Mem[0000000030141400] = ffffffffebda9bff, %f0 = ffffffff 00000000 | |
20853 | ldda [%i5+%g0]0x89,%f0 ! %f0 = ffffffff ebda9bff | |
20854 | ! Mem[0000000010141410] = ffff0000, %l7 = 0000000000000000 | |
20855 | ldsba [%i5+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
20856 | ! Starting 10 instruction Store Burst | |
20857 | ! Mem[0000000010081418] = ffffffff00000003, %l0 = 00000000000000ff, %l5 = 00000000ff000000 | |
20858 | add %i2,0x18,%g1 | |
20859 | casxa [%g1]0x80,%l0,%l5 ! %l5 = ffffffff00000003 | |
20860 | ||
20861 | p0_label_492: | |
20862 | ! %l5 = ffffffff00000003, Mem[0000000010041420] = 925b1ad8, %asi = 80 | |
20863 | stwa %l5,[%i1+0x020]%asi ! Mem[0000000010041420] = 00000003 | |
20864 | ! Mem[0000000010041400] = ffff0000, %l5 = ffffffff00000003 | |
20865 | ldstuba [%i1+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
20866 | ! Mem[0000000010001420] = 00000000, %l1 = ffffffffffffffff | |
20867 | ldstub [%i0+0x020],%l1 ! %l1 = 00000000000000ff | |
20868 | ! %l2 = 0000000000000000, Mem[0000000010141403] = ffff0000, %asi = 80 | |
20869 | stba %l2,[%i5+0x003]%asi ! Mem[0000000010141400] = ffff0000 | |
20870 | ! %l5 = 0000000000000000, Mem[0000000010101414] = 00ff0000, %asi = 80 | |
20871 | stha %l5,[%i4+0x014]%asi ! Mem[0000000010101414] = 00000000 | |
20872 | ! %f20 = ffffffff 00000000, Mem[0000000010101408] = 00000000 00ff0000 | |
20873 | stda %f20,[%i4+0x008]%asi ! Mem[0000000010101408] = ffffffff 00000000 | |
20874 | ! %l5 = 0000000000000000, Mem[0000000010001400] = ff000000 | |
20875 | stba %l5,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00000000 | |
20876 | ! Mem[0000000030081408] = 00000000, %l3 = 00000000000000ff | |
20877 | swapa [%i2+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
20878 | ! %l6 = 00000000000000ff, Mem[0000000030181408] = 000000ff | |
20879 | stwa %l6,[%i6+%o4]0x89 ! Mem[0000000030181408] = 000000ff | |
20880 | ! Starting 10 instruction Load Burst | |
20881 | ! Mem[00000000100c1400] = 1a000000, %f31 = ffff0000 | |
20882 | lda [%i3+0x000]%asi,%f31 ! %f31 = 1a000000 | |
20883 | ||
20884 | p0_label_493: | |
20885 | ! Mem[0000000010101410] = ffffffff, %l5 = 0000000000000000 | |
20886 | lduha [%i4+%o5]0x80,%l5 ! %l5 = 000000000000ffff | |
20887 | ! Mem[0000000010181400] = 00000000 ffffffff, %l4 = 00000000, %l5 = 0000ffff | |
20888 | ldda [%i6+%g0]0x80,%l4 ! %l4 = 0000000000000000 00000000ffffffff | |
20889 | ! %l3 = 0000000000000000, Mem[0000000020800000] = f9ff0db6 | |
20890 | stb %l3,[%o1+%g0] ! Mem[0000000020800000] = 00ff0db6 | |
20891 | ! Mem[0000000030141400] = ff9bdaeb ffffffff 0000ffff ffffffff | |
20892 | ! Mem[0000000030141410] = 000000ff 00000000 02226c6b 57119e5e | |
20893 | ! Mem[0000000030141420] = 925b1ad8 39aced3b 64479a75 bb9180c7 | |
20894 | ! Mem[0000000030141430] = ffffffff 365fc6fa ffffffff 000000ff | |
20895 | ldda [%i5]ASI_BLK_S,%f0 ! Block Load from 0000000030141400 | |
20896 | ! Mem[0000000030181408] = ff000000, %l7 = 0000000000000000 | |
20897 | ldswa [%i6+%o4]0x81,%l7 ! %l7 = ffffffffff000000 | |
20898 | ! Mem[0000000010001400] = 000000000000ffff, %l5 = 00000000ffffffff | |
20899 | ldxa [%i0+%g0]0x80,%l5 ! %l5 = 000000000000ffff | |
20900 | ! Mem[0000000010101410] = ffffffff 00000000, %l0 = 000000ff, %l1 = 00000000 | |
20901 | ldda [%i4+%o5]0x80,%l0 ! %l0 = 00000000ffffffff 0000000000000000 | |
20902 | ! Mem[0000000010141420] = 9cffb68a 00000000, %l4 = 00000000, %l5 = 0000ffff | |
20903 | ldd [%i5+0x020],%l4 ! %l4 = 000000009cffb68a 0000000000000000 | |
20904 | ! Mem[00000000100c1408] = 00000000, %l5 = 0000000000000000 | |
20905 | ldsba [%i3+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
20906 | ! Starting 10 instruction Store Burst | |
20907 | ! %l0 = 00000000ffffffff, Mem[0000000010181410] = 00000000 | |
20908 | stba %l0,[%i6+%o5]0x88 ! Mem[0000000010181410] = 000000ff | |
20909 | ||
20910 | p0_label_494: | |
20911 | ! Mem[0000000020800000] = 00ff0db6, %l1 = 0000000000000000 | |
20912 | ldstub [%o1+%g0],%l1 ! %l1 = 00000000000000ff | |
20913 | ! Mem[00000000300c1400] = ff5e0000, %l1 = 0000000000000000 | |
20914 | swapa [%i3+%g0]0x81,%l1 ! %l1 = 00000000ff5e0000 | |
20915 | ! %f16 = 1a000000 00000000, Mem[0000000010101408] = ffffffff 00000000 | |
20916 | stda %f16,[%i4+%o4]0x80 ! Mem[0000000010101408] = 1a000000 00000000 | |
20917 | ! Mem[0000000010001438] = ffff275e, %l1 = 00000000ff5e0000, %asi = 80 | |
20918 | swapa [%i0+0x038]%asi,%l1 ! %l1 = 00000000ffff275e | |
20919 | ! Mem[00000000100c140c] = 00000000, %l5 = 0000000000000000 | |
20920 | ldsb [%i3+0x00d],%l5 ! %l5 = 0000000000000000 | |
20921 | ! Mem[0000000010081408] = ffffffff, %l6 = 00000000000000ff | |
20922 | ldstuba [%i2+%o4]0x88,%l6 ! %l6 = 000000ff000000ff | |
20923 | ! %l5 = 0000000000000000, Mem[0000000010101408] = 1a000000 | |
20924 | stha %l5,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000 | |
20925 | ! %l2 = 0000000000000000, Mem[0000000030101400] = ffffffff | |
20926 | stha %l2,[%i4+%g0]0x81 ! Mem[0000000030101400] = 0000ffff | |
20927 | ! %l5 = 0000000000000000, Mem[0000000010001410] = 000000005e00ffff | |
20928 | stxa %l5,[%i0+%o5]0x88 ! Mem[0000000010001410] = 0000000000000000 | |
20929 | ! Starting 10 instruction Load Burst | |
20930 | ! Mem[0000000010041418] = 00000000, %l7 = ffffffffff000000 | |
20931 | ldsha [%i1+0x01a]%asi,%l7 ! %l7 = 0000000000000000 | |
20932 | ||
20933 | p0_label_495: | |
20934 | ! Mem[0000000010141410] = 0000ffff, %l3 = 0000000000000000 | |
20935 | ldsha [%i5+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
20936 | ! Mem[0000000030041410] = 000000ff00000000, %l5 = 0000000000000000 | |
20937 | ldxa [%i1+%o5]0x81,%l5 ! %l5 = 000000ff00000000 | |
20938 | ! Mem[0000000010101408] = 00000000, %l0 = 00000000ffffffff | |
20939 | lduwa [%i4+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
20940 | ! Mem[0000000010181400] = 00000000, %l2 = 0000000000000000 | |
20941 | ldsha [%i6+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
20942 | ! Mem[00000000100c1408] = 0000000000000000, %f16 = 1a000000 00000000 | |
20943 | ldda [%i3+%o4]0x80,%f16 ! %f16 = 00000000 00000000 | |
20944 | ! Mem[00000000100c1400] = 00000000 0000001a, %l0 = 00000000, %l1 = ffff275e | |
20945 | ldda [%i3+%g0]0x88,%l0 ! %l0 = 000000000000001a 0000000000000000 | |
20946 | ! Mem[0000000010181400] = 00000000ffffffff, %l0 = 000000000000001a | |
20947 | ldxa [%i6+%g0]0x80,%l0 ! %l0 = 00000000ffffffff | |
20948 | ! Mem[0000000030141400] = ffffffff ebda9bff, %l0 = ffffffff, %l1 = 00000000 | |
20949 | ldda [%i5+%g0]0x89,%l0 ! %l0 = 00000000ebda9bff 00000000ffffffff | |
20950 | ! Mem[0000000020800040] = ffff9ffa, %l4 = 000000009cffb68a | |
20951 | lduha [%o1+0x040]%asi,%l4 ! %l4 = 000000000000ffff | |
20952 | ! Starting 10 instruction Store Burst | |
20953 | ! %l5 = 000000ff00000000, %l4 = 000000000000ffff, %l0 = 00000000ebda9bff | |
20954 | sub %l5,%l4,%l0 ! %l0 = 000000feffff0001 | |
20955 | ||
20956 | ! Check Point 99 for processor 0 | |
20957 | ||
20958 | set p0_check_pt_data_99,%g4 | |
20959 | rd %ccr,%g5 ! %g5 = 44 | |
20960 | ldx [%g4+0x08],%g2 | |
20961 | cmp %l0,%g2 ! %l0 = 000000feffff0001 | |
20962 | bne %xcc,p0_reg_check_fail0 | |
20963 | mov 0xee0,%g1 | |
20964 | ldx [%g4+0x10],%g2 | |
20965 | cmp %l1,%g2 ! %l1 = 00000000ffffffff | |
20966 | bne %xcc,p0_reg_check_fail1 | |
20967 | mov 0xee1,%g1 | |
20968 | ldx [%g4+0x18],%g2 | |
20969 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
20970 | bne %xcc,p0_reg_check_fail2 | |
20971 | mov 0xee2,%g1 | |
20972 | ldx [%g4+0x20],%g2 | |
20973 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
20974 | bne %xcc,p0_reg_check_fail3 | |
20975 | mov 0xee3,%g1 | |
20976 | ldx [%g4+0x28],%g2 | |
20977 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
20978 | bne %xcc,p0_reg_check_fail4 | |
20979 | mov 0xee4,%g1 | |
20980 | ldx [%g4+0x30],%g2 | |
20981 | cmp %l5,%g2 ! %l5 = 000000ff00000000 | |
20982 | bne %xcc,p0_reg_check_fail5 | |
20983 | mov 0xee5,%g1 | |
20984 | ldx [%g4+0x38],%g2 | |
20985 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
20986 | bne %xcc,p0_reg_check_fail6 | |
20987 | mov 0xee6,%g1 | |
20988 | ldx [%g4+0x40],%g2 | |
20989 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
20990 | bne %xcc,p0_reg_check_fail7 | |
20991 | mov 0xee7,%g1 | |
20992 | ldx [%g4+0x48],%g3 | |
20993 | std %f0,[%g4] | |
20994 | ldx [%g4],%g2 | |
20995 | cmp %g3,%g2 ! %f0 = ff9bdaeb ffffffff | |
20996 | bne %xcc,p0_freg_check_fail | |
20997 | mov 0xf00,%g1 | |
20998 | ldx [%g4+0x50],%g3 | |
20999 | std %f2,[%g4] | |
21000 | ldx [%g4],%g2 | |
21001 | cmp %g3,%g2 ! %f2 = 0000ffff ffffffff | |
21002 | bne %xcc,p0_freg_check_fail | |
21003 | mov 0xf02,%g1 | |
21004 | ldx [%g4+0x58],%g3 | |
21005 | std %f4,[%g4] | |
21006 | ldx [%g4],%g2 | |
21007 | cmp %g3,%g2 ! %f4 = 000000ff 00000000 | |
21008 | bne %xcc,p0_freg_check_fail | |
21009 | mov 0xf04,%g1 | |
21010 | ldx [%g4+0x60],%g3 | |
21011 | std %f6,[%g4] | |
21012 | ldx [%g4],%g2 | |
21013 | cmp %g3,%g2 ! %f6 = 02226c6b 57119e5e | |
21014 | bne %xcc,p0_freg_check_fail | |
21015 | mov 0xf06,%g1 | |
21016 | ldx [%g4+0x68],%g3 | |
21017 | std %f8,[%g4] | |
21018 | ldx [%g4],%g2 | |
21019 | cmp %g3,%g2 ! %f8 = 925b1ad8 39aced3b | |
21020 | bne %xcc,p0_freg_check_fail | |
21021 | mov 0xf08,%g1 | |
21022 | ldx [%g4+0x70],%g3 | |
21023 | std %f10,[%g4] | |
21024 | ldx [%g4],%g2 | |
21025 | cmp %g3,%g2 ! %f10 = 64479a75 bb9180c7 | |
21026 | bne %xcc,p0_freg_check_fail | |
21027 | mov 0xf10,%g1 | |
21028 | ldx [%g4+0x78],%g3 | |
21029 | std %f12,[%g4] | |
21030 | ldx [%g4],%g2 | |
21031 | cmp %g3,%g2 ! %f12 = ffffffff 365fc6fa | |
21032 | bne %xcc,p0_freg_check_fail | |
21033 | mov 0xf12,%g1 | |
21034 | ldx [%g4+0x80],%g3 | |
21035 | std %f14,[%g4] | |
21036 | ldx [%g4],%g2 | |
21037 | cmp %g3,%g2 ! %f14 = ffffffff 000000ff | |
21038 | bne %xcc,p0_freg_check_fail | |
21039 | mov 0xf14,%g1 | |
21040 | ldx [%g4+0x88],%g3 | |
21041 | std %f16,[%g4] | |
21042 | ldx [%g4],%g2 | |
21043 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
21044 | bne %xcc,p0_freg_check_fail | |
21045 | mov 0xf16,%g1 | |
21046 | ldx [%g4+0x90],%g3 | |
21047 | std %f30,[%g4] | |
21048 | ldx [%g4],%g2 | |
21049 | cmp %g3,%g2 ! %f30 = ff0000ff 1a000000 | |
21050 | bne %xcc,p0_freg_check_fail | |
21051 | mov 0xf30,%g1 | |
21052 | ||
21053 | ! Check Point 99 completed | |
21054 | ||
21055 | ||
21056 | p0_label_496: | |
21057 | ! %l7 = 0000000000000000, Mem[0000000030041408] = 000000ff | |
21058 | stba %l7,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000000 | |
21059 | ! %l6 = 00000000000000ff, Mem[0000000030001400] = ffffffffffffff00 | |
21060 | stxa %l6,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00000000000000ff | |
21061 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010101410] = ffffffff 00000000 | |
21062 | stda %l2,[%i4+%o5]0x88 ! Mem[0000000010101410] = 00000000 00000000 | |
21063 | ! %f14 = ffffffff 000000ff, %l7 = 0000000000000000 | |
21064 | ! Mem[00000000300c1418] = 5e9e11576b6c2202 | |
21065 | add %i3,0x018,%g1 | |
21066 | stda %f14,[%g1+%l7]ASI_PST32_SL ! Mem[00000000300c1418] = 5e9e11576b6c2202 | |
21067 | ! %l3 = 0000000000000000, Mem[0000000021800081] = 5e000b33 | |
21068 | stb %l3,[%o3+0x081] ! Mem[0000000021800080] = 5e000b33 | |
21069 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010081400] = ff0000ff ffffffff | |
21070 | stda %l2,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 00000000 | |
21071 | ! Mem[0000000010181408] = 00005e00, %l0 = 000000feffff0001 | |
21072 | swapa [%i6+%o4]0x88,%l0 ! %l0 = 0000000000005e00 | |
21073 | ! %f10 = 64479a75, Mem[0000000030181408] = 000000ff | |
21074 | sta %f10,[%i6+%o4]0x89 ! Mem[0000000030181408] = 64479a75 | |
21075 | ! %f22 = ff0000ff 6b6c2202, Mem[0000000010181400] = 00000000 ffffffff | |
21076 | stda %f22,[%i6+0x000]%asi ! Mem[0000000010181400] = ff0000ff 6b6c2202 | |
21077 | ! Starting 10 instruction Load Burst | |
21078 | ! Mem[0000000010181438] = 5e000000, %l5 = 000000ff00000000 | |
21079 | ldsb [%i6+0x03b],%l5 ! %l5 = 0000000000000000 | |
21080 | ||
21081 | p0_label_497: | |
21082 | ! Mem[0000000030101408] = 5e00ff00, %l4 = 000000000000ffff | |
21083 | ldsba [%i4+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
21084 | ! Mem[0000000010101400] = 000000ff, %l6 = 00000000000000ff | |
21085 | ldsha [%i4+%g0]0x88,%l6 ! %l6 = 00000000000000ff | |
21086 | ! Mem[0000000010041410] = 0000000000000000, %l1 = 00000000ffffffff | |
21087 | ldxa [%i1+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
21088 | ! Mem[000000001010142c] = 0000ffff, %l5 = 0000000000000000 | |
21089 | lduha [%i4+0x02c]%asi,%l5 ! %l5 = 0000000000000000 | |
21090 | ! Mem[00000000300c1400] = 00000000, %f6 = 02226c6b | |
21091 | lda [%i3+%g0]0x81,%f6 ! %f6 = 00000000 | |
21092 | ! Mem[0000000010041408] = 00000000, %l3 = 0000000000000000 | |
21093 | lduwa [%i1+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
21094 | ! Mem[00000000100c1400] = 1a000000, %l6 = 00000000000000ff | |
21095 | lduba [%i3+%g0]0x80,%l6 ! %l6 = 000000000000001a | |
21096 | ! Mem[000000001010140c] = 00000000, %l4 = 0000000000000000 | |
21097 | lduha [%i4+0x00c]%asi,%l4 ! %l4 = 0000000000000000 | |
21098 | membar #Sync ! Added by membar checker (97) | |
21099 | ! Mem[0000000030001400] = ff000000 00000000 000000ff ffffffff | |
21100 | ! Mem[0000000030001410] = 00000000 000000ff ff000000 00ff00c4 | |
21101 | ! Mem[0000000030001420] = 00000000 000000ff 00000000 0000ffff | |
21102 | ! Mem[0000000030001430] = ffff275e ffffffff 5e000000 00000000 | |
21103 | ldda [%i0]ASI_BLK_SL,%f0 ! Block Load from 0000000030001400 | |
21104 | ! Starting 10 instruction Store Burst | |
21105 | ! %l3 = 0000000000000000, Mem[0000000021800000] = fff29a65 | |
21106 | sth %l3,[%o3+%g0] ! Mem[0000000021800000] = 00009a65 | |
21107 | ||
21108 | p0_label_498: | |
21109 | ! %f0 = 00000000 000000ff ffffffff ff000000 | |
21110 | ! %f4 = ff000000 00000000 c400ff00 000000ff | |
21111 | ! %f8 = ff000000 00000000 ffff0000 00000000 | |
21112 | ! %f12 = ffffffff 5e27ffff 00000000 0000005e | |
21113 | stda %f0,[%i5]ASI_COMMIT_S ! Block Store to 0000000030141400 | |
21114 | ! Mem[0000000010181400] = ff0000ff, %l4 = 0000000000000000 | |
21115 | swapa [%i6+%g0]0x80,%l4 ! %l4 = 00000000ff0000ff | |
21116 | ! %l2 = 0000000000000000, Mem[0000000010041410] = 0000000000000000 | |
21117 | stxa %l2,[%i1+%o5]0x88 ! Mem[0000000010041410] = 0000000000000000 | |
21118 | ! Mem[0000000010101410] = 00000000, %l4 = 00000000ff0000ff | |
21119 | ldstuba [%i4+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
21120 | ! Mem[0000000010081400] = 00000000, %l6 = 000000000000001a | |
21121 | ldstuba [%i2+%g0]0x88,%l6 ! %l6 = 00000000000000ff | |
21122 | ! %f19 = 00000000, Mem[00000000100c1410] = ffffffff | |
21123 | sta %f19,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 00000000 | |
21124 | ! %l2 = 0000000000000000, Mem[00000000218001c0] = 00fffa38, %asi = 80 | |
21125 | stha %l2,[%o3+0x1c0]%asi ! Mem[00000000218001c0] = 0000fa38 | |
21126 | ! %l1 = 0000000000000000, Mem[00000000100c1408] = 00000000 | |
21127 | stha %l1,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000 | |
21128 | ! Mem[0000000010001408] = ffffffff, %l1 = 0000000000000000 | |
21129 | ldstuba [%i0+%o4]0x80,%l1 ! %l1 = 000000ff000000ff | |
21130 | ! Starting 10 instruction Load Burst | |
21131 | membar #Sync ! Added by membar checker (98) | |
21132 | ! Mem[0000000010141400] = ffff0000000000ff, %l0 = 0000000000005e00 | |
21133 | ldxa [%i5+%g0]0x80,%l0 ! %l0 = ffff0000000000ff | |
21134 | ||
21135 | p0_label_499: | |
21136 | ! Mem[0000000010001408] = ffffffff, %l6 = 0000000000000000 | |
21137 | ldsha [%i0+%o4]0x80,%l6 ! %l6 = ffffffffffffffff | |
21138 | ! Mem[0000000030101400] = 0000ffff ff270000, %l6 = ffffffff, %l7 = 00000000 | |
21139 | ldda [%i4+%g0]0x81,%l6 ! %l6 = 000000000000ffff 00000000ff270000 | |
21140 | ! Mem[0000000010181408] = 0100ffff, %f2 = ffffffff | |
21141 | lda [%i6+%o4]0x80,%f2 ! %f2 = 0100ffff | |
21142 | ! Mem[0000000030181408] = 0000000064479a75, %l3 = 0000000000000000 | |
21143 | ldxa [%i6+%o4]0x89,%l3 ! %l3 = 0000000064479a75 | |
21144 | ! Mem[0000000010001400] = 00000000, %l5 = 0000000000000000 | |
21145 | ldsha [%i0+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
21146 | ! Mem[00000000100c1410] = 00000000 00000000, %l6 = 0000ffff, %l7 = ff270000 | |
21147 | ldda [%i3+0x010]%asi,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
21148 | ! Mem[0000000010001410] = 00000000, %l1 = 00000000000000ff | |
21149 | ldswa [%i0+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
21150 | ! Mem[0000000010001410] = 00000000, %l4 = 0000000000000000 | |
21151 | ldub [%i0+0x012],%l4 ! %l4 = 0000000000000000 | |
21152 | ! Mem[0000000030041410] = 000000ff, %l4 = 0000000000000000 | |
21153 | ldswa [%i1+%o5]0x81,%l4 ! %l4 = 00000000000000ff | |
21154 | ! Starting 10 instruction Store Burst | |
21155 | ! %l4 = 000000ff, %l5 = 00000000, Mem[0000000030101400] = ffff0000 000027ff | |
21156 | stda %l4,[%i4+%g0]0x89 ! Mem[0000000030101400] = 000000ff 00000000 | |
21157 | ||
21158 | p0_label_500: | |
21159 | ! %l3 = 0000000064479a75, Mem[0000000010141400] = ffff0000000000ff | |
21160 | stxa %l3,[%i5+%g0]0x80 ! Mem[0000000010141400] = 0000000064479a75 | |
21161 | ! Mem[0000000010101408] = 00000000, %l6 = 0000000000000000 | |
21162 | swapa [%i4+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
21163 | ! %l1 = 0000000000000000, Mem[0000000030141410] = ff000000 | |
21164 | stha %l1,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 | |
21165 | ! %f28 = 00000000 0000ffff, %l5 = 0000000000000000 | |
21166 | ! Mem[0000000010101418] = 5e9e115700ff00ff | |
21167 | add %i4,0x018,%g1 | |
21168 | stda %f28,[%g1+%l5]ASI_PST8_PL ! Mem[0000000010101418] = 5e9e115700ff00ff | |
21169 | ! %f10 = ffff0000 00000000, Mem[0000000030141408] = ffffffff 000000ff | |
21170 | stda %f10,[%i5+%o4]0x89 ! Mem[0000000030141408] = ffff0000 00000000 | |
21171 | ! %l0 = 000000ff, %l1 = 00000000, Mem[0000000010141420] = 9cffb68a 00000000 | |
21172 | std %l0,[%i5+0x020] ! Mem[0000000010141420] = 000000ff 00000000 | |
21173 | ! %l2 = 0000000000000000, Mem[000000001000140e] = 00000000, %asi = 80 | |
21174 | stha %l2,[%i0+0x00e]%asi ! Mem[000000001000140c] = 00000000 | |
21175 | ! %l3 = 0000000064479a75, Mem[0000000021800041] = 00005e5c | |
21176 | stb %l3,[%o3+0x041] ! Mem[0000000021800040] = 00755e5c | |
21177 | ! Mem[0000000010041408] = 00000000, %l6 = 0000000000000000 | |
21178 | ldstuba [%i1+%o4]0x80,%l6 ! %l6 = 00000000000000ff | |
21179 | ! Starting 10 instruction Load Burst | |
21180 | ! Mem[0000000030001408] = ff000000, %l0 = ffff0000000000ff | |
21181 | lduwa [%i0+%o4]0x89,%l0 ! %l0 = 00000000ff000000 | |
21182 | ||
21183 | ! Check Point 100 for processor 0 | |
21184 | ||
21185 | set p0_check_pt_data_100,%g4 | |
21186 | rd %ccr,%g5 ! %g5 = 44 | |
21187 | ldx [%g4+0x08],%g2 | |
21188 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
21189 | bne %xcc,p0_reg_check_fail0 | |
21190 | mov 0xee0,%g1 | |
21191 | ldx [%g4+0x10],%g2 | |
21192 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
21193 | bne %xcc,p0_reg_check_fail1 | |
21194 | mov 0xee1,%g1 | |
21195 | ldx [%g4+0x18],%g2 | |
21196 | cmp %l3,%g2 ! %l3 = 0000000064479a75 | |
21197 | bne %xcc,p0_reg_check_fail3 | |
21198 | mov 0xee3,%g1 | |
21199 | ldx [%g4+0x20],%g2 | |
21200 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
21201 | bne %xcc,p0_reg_check_fail4 | |
21202 | mov 0xee4,%g1 | |
21203 | ldx [%g4+0x28],%g2 | |
21204 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
21205 | bne %xcc,p0_reg_check_fail5 | |
21206 | mov 0xee5,%g1 | |
21207 | ldx [%g4+0x30],%g2 | |
21208 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
21209 | bne %xcc,p0_reg_check_fail6 | |
21210 | mov 0xee6,%g1 | |
21211 | ldx [%g4+0x38],%g3 | |
21212 | std %f0,[%g4] | |
21213 | ldx [%g4],%g2 | |
21214 | cmp %g3,%g2 ! %f0 = 00000000 000000ff | |
21215 | bne %xcc,p0_freg_check_fail | |
21216 | mov 0xf00,%g1 | |
21217 | ldx [%g4+0x40],%g3 | |
21218 | std %f2,[%g4] | |
21219 | ldx [%g4],%g2 | |
21220 | cmp %g3,%g2 ! %f2 = 0100ffff ff000000 | |
21221 | bne %xcc,p0_freg_check_fail | |
21222 | mov 0xf02,%g1 | |
21223 | ldx [%g4+0x48],%g3 | |
21224 | std %f4,[%g4] | |
21225 | ldx [%g4],%g2 | |
21226 | cmp %g3,%g2 ! %f4 = ff000000 00000000 | |
21227 | bne %xcc,p0_freg_check_fail | |
21228 | mov 0xf04,%g1 | |
21229 | ldx [%g4+0x50],%g3 | |
21230 | std %f6,[%g4] | |
21231 | ldx [%g4],%g2 | |
21232 | cmp %g3,%g2 ! %f6 = c400ff00 000000ff | |
21233 | bne %xcc,p0_freg_check_fail | |
21234 | mov 0xf06,%g1 | |
21235 | ldx [%g4+0x58],%g3 | |
21236 | std %f8,[%g4] | |
21237 | ldx [%g4],%g2 | |
21238 | cmp %g3,%g2 ! %f8 = ff000000 00000000 | |
21239 | bne %xcc,p0_freg_check_fail | |
21240 | mov 0xf08,%g1 | |
21241 | ldx [%g4+0x60],%g3 | |
21242 | std %f10,[%g4] | |
21243 | ldx [%g4],%g2 | |
21244 | cmp %g3,%g2 ! %f10 = ffff0000 00000000 | |
21245 | bne %xcc,p0_freg_check_fail | |
21246 | mov 0xf10,%g1 | |
21247 | ldx [%g4+0x68],%g3 | |
21248 | std %f12,[%g4] | |
21249 | ldx [%g4],%g2 | |
21250 | cmp %g3,%g2 ! %f12 = ffffffff 5e27ffff | |
21251 | bne %xcc,p0_freg_check_fail | |
21252 | mov 0xf12,%g1 | |
21253 | ldx [%g4+0x70],%g3 | |
21254 | std %f14,[%g4] | |
21255 | ldx [%g4],%g2 | |
21256 | cmp %g3,%g2 ! %f14 = 00000000 0000005e | |
21257 | bne %xcc,p0_freg_check_fail | |
21258 | mov 0xf14,%g1 | |
21259 | ||
21260 | ! Check Point 100 completed | |
21261 | ||
21262 | ||
21263 | p0_label_501: | |
21264 | ! Mem[0000000010141408] = ffffffff 00000000, %l0 = ff000000, %l1 = 00000000 | |
21265 | ldda [%i5+%o4]0x88,%l0 ! %l0 = 0000000000000000 00000000ffffffff | |
21266 | ! Mem[0000000010081410] = 00000000 ffffffff, %l0 = 00000000, %l1 = ffffffff | |
21267 | ldda [%i2+%o5]0x80,%l0 ! %l0 = 0000000000000000 00000000ffffffff | |
21268 | ! Mem[0000000010001430] = 00000000, %l3 = 0000000064479a75 | |
21269 | ldsw [%i0+0x030],%l3 ! %l3 = 0000000000000000 | |
21270 | ! Mem[0000000010181400] = 02226c6b 00000000, %l4 = 000000ff, %l5 = 00000000 | |
21271 | ldda [%i6+%g0]0x88,%l4 ! %l4 = 0000000000000000 0000000002226c6b | |
21272 | ! Mem[0000000010081420] = 0000ff00, %l4 = 0000000000000000 | |
21273 | ldswa [%i2+0x020]%asi,%l4 ! %l4 = 000000000000ff00 | |
21274 | ! Mem[00000000300c1408] = 0000ffff, %l3 = 0000000000000000 | |
21275 | lduwa [%i3+%o4]0x89,%l3 ! %l3 = 000000000000ffff | |
21276 | ! Mem[000000001008141c] = 00000003, %f2 = 0100ffff | |
21277 | ld [%i2+0x01c],%f2 ! %f2 = 00000003 | |
21278 | ! Mem[0000000010081410] = 00000000, %l2 = 0000000000000000 | |
21279 | ldsha [%i2+0x010]%asi,%l2 ! %l2 = 0000000000000000 | |
21280 | ! Mem[0000000010081400] = 000000ff, %l1 = 00000000ffffffff | |
21281 | ldsba [%i2+%g0]0x88,%l1 ! %l1 = ffffffffffffffff | |
21282 | ! Starting 10 instruction Store Burst | |
21283 | ! %l6 = 0000000000000000, Mem[00000000201c0000] = 00ff1669, %asi = 80 | |
21284 | stha %l6,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00001669 | |
21285 | ||
21286 | p0_label_502: | |
21287 | ! %f17 = 00000000, Mem[0000000030081410] = 00000000 | |
21288 | sta %f17,[%i2+%o5]0x81 ! Mem[0000000030081410] = 00000000 | |
21289 | ! %l4 = 0000ff00, %l5 = 02226c6b, Mem[0000000010101410] = ff000000 00000000 | |
21290 | stda %l4,[%i4+%o5]0x80 ! Mem[0000000010101410] = 0000ff00 02226c6b | |
21291 | ! Mem[0000000030101400] = 000000ff, %l7 = 0000000000000000 | |
21292 | ldstuba [%i4+%g0]0x89,%l7 ! %l7 = 000000ff000000ff | |
21293 | ! Mem[0000000021800040] = 00755e5c, %l1 = ffffffffffffffff | |
21294 | ldstuba [%o3+0x040]%asi,%l1 ! %l1 = 00000000000000ff | |
21295 | ! Mem[0000000010141400] = 00000000, %l4 = 000000000000ff00 | |
21296 | swapa [%i5+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
21297 | ! Mem[0000000030141410] = 00000000, %l4 = 0000000000000000 | |
21298 | ldstuba [%i5+%o5]0x81,%l4 ! %l4 = 00000000000000ff | |
21299 | ! %l5 = 0000000002226c6b, Mem[0000000010101400] = 000000ff | |
21300 | stha %l5,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00006c6b | |
21301 | ! %l2 = 00000000, %l3 = 0000ffff, Mem[0000000010041410] = 00000000 00000000 | |
21302 | stda %l2,[%i1+%o5]0x80 ! Mem[0000000010041410] = 00000000 0000ffff | |
21303 | ! %l4 = 00000000, %l5 = 02226c6b, Mem[0000000010081400] = 000000ff 00000000 | |
21304 | stda %l4,[%i2+%g0]0x88 ! Mem[0000000010081400] = 00000000 02226c6b | |
21305 | ! Starting 10 instruction Load Burst | |
21306 | ! Mem[0000000030041410] = 000000ff, %l7 = 00000000000000ff | |
21307 | ldsha [%i1+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
21308 | ||
21309 | p0_label_503: | |
21310 | ! Mem[0000000030141408] = 00000000, %l2 = 0000000000000000 | |
21311 | ldsba [%i5+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
21312 | ! Mem[0000000030141400] = ff000000 00000000, %l4 = 00000000, %l5 = 02226c6b | |
21313 | ldda [%i5+%g0]0x89,%l4 ! %l4 = 0000000000000000 00000000ff000000 | |
21314 | ! Mem[0000000010181400] = 00000000, %l2 = 0000000000000000 | |
21315 | ldsba [%i6+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
21316 | ! Mem[0000000010001408] = ffffffff, %l7 = 0000000000000000 | |
21317 | ldsha [%i0+%o4]0x88,%l7 ! %l7 = ffffffffffffffff | |
21318 | ! Mem[0000000010181424] = ffffffff, %f31 = 1a000000 | |
21319 | lda [%i6+0x024]%asi,%f31 ! %f31 = ffffffff | |
21320 | ! Mem[00000000201c0000] = 00001669, %l6 = 0000000000000000 | |
21321 | ldsba [%o0+0x000]%asi,%l6 ! %l6 = 0000000000000000 | |
21322 | ! Mem[0000000010001400] = 00000000, %l2 = 0000000000000000 | |
21323 | lduba [%i0+%g0]0x80,%l2 ! %l2 = 0000000000000000 | |
21324 | ! Mem[0000000030081410] = 00000000, %f17 = 00000000 | |
21325 | lda [%i2+%o5]0x89,%f17 ! %f17 = 00000000 | |
21326 | ! Mem[0000000010081400] = 00000000, %l0 = 0000000000000000 | |
21327 | lduba [%i2+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
21328 | ! Starting 10 instruction Store Burst | |
21329 | ! Mem[00000000300c1410] = ffffffff, %l1 = 0000000000000000 | |
21330 | ldstuba [%i3+%o5]0x89,%l1 ! %l1 = 000000ff000000ff | |
21331 | ||
21332 | p0_label_504: | |
21333 | ! %l6 = 00000000, %l7 = ffffffff, Mem[0000000010041400] = ff00ffff 00000000 | |
21334 | stda %l6,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000 ffffffff | |
21335 | ! %l3 = 000000000000ffff, Mem[0000000010081438] = 000000ff0000005e | |
21336 | stx %l3,[%i2+0x038] ! Mem[0000000010081438] = 000000000000ffff | |
21337 | ! Mem[0000000030101410] = 1a000000, %l4 = 0000000000000000 | |
21338 | ldstuba [%i4+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
21339 | ! %f14 = 00000000 0000005e, %l1 = 00000000000000ff | |
21340 | ! Mem[00000000100c1438] = ff0000ffffff0000 | |
21341 | add %i3,0x038,%g1 | |
21342 | stda %f14,[%g1+%l1]ASI_PST16_PL ! Mem[00000000100c1438] = 5e00000000000000 | |
21343 | ! %l1 = 00000000000000ff, Mem[00000000100c1400] = 0000001a | |
21344 | stba %l1,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 000000ff | |
21345 | ! %l6 = 00000000, %l7 = ffffffff, Mem[0000000030001410] = 00000000 000000ff | |
21346 | stda %l6,[%i0+%o5]0x81 ! Mem[0000000030001410] = 00000000 ffffffff | |
21347 | ! %l6 = 00000000, %l7 = ffffffff, Mem[0000000030081400] = 00000000 1a000000 | |
21348 | stda %l6,[%i2+%g0]0x89 ! Mem[0000000030081400] = 00000000 ffffffff | |
21349 | ! %l0 = 0000000000000000, Mem[0000000030101400] = ff000000 | |
21350 | stha %l0,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 | |
21351 | ! Mem[0000000010001410] = 00000000, %l4 = 0000000000000000 | |
21352 | swapa [%i0+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
21353 | ! Starting 10 instruction Load Burst | |
21354 | ! Mem[0000000030001400] = 000000ff, %l6 = 0000000000000000 | |
21355 | lduha [%i0+%g0]0x89,%l6 ! %l6 = 00000000000000ff | |
21356 | ||
21357 | p0_label_505: | |
21358 | ! Mem[00000000100c1410] = 00000000, %l6 = 00000000000000ff | |
21359 | ldsha [%i3+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
21360 | ! Mem[000000001000141c] = ffff0000, %l4 = 0000000000000000 | |
21361 | lduba [%i0+0x01c]%asi,%l4 ! %l4 = 00000000000000ff | |
21362 | ! Mem[0000000030001410] = 00000000 ffffffff, %l4 = 000000ff, %l5 = ff000000 | |
21363 | ldda [%i0+%o5]0x81,%l4 ! %l4 = 0000000000000000 00000000ffffffff | |
21364 | ! Mem[0000000010001428] = 9ce0b68a, %l6 = 0000000000000000 | |
21365 | ldsw [%i0+0x028],%l6 ! %l6 = ffffffff9ce0b68a | |
21366 | ! Mem[0000000010001400] = 00000000, %l2 = 0000000000000000 | |
21367 | lduwa [%i0+%g0]0x80,%l2 ! %l2 = 0000000000000000 | |
21368 | ! Mem[0000000010181400] = 02226c6b00000000, %l1 = 00000000000000ff | |
21369 | ldxa [%i6+%g0]0x88,%l1 ! %l1 = 02226c6b00000000 | |
21370 | ! Mem[00000000100c1410] = 00000000 00000000, %l6 = 9ce0b68a, %l7 = ffffffff | |
21371 | ldda [%i3+%o5]0x88,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
21372 | ! Mem[0000000010181400] = 00000000, %l3 = 000000000000ffff | |
21373 | ldsha [%i6+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
21374 | ! Mem[00000000300c1408] = 0000ffff, %l7 = 0000000000000000 | |
21375 | ldsha [%i3+%o4]0x89,%l7 ! %l7 = ffffffffffffffff | |
21376 | ! Starting 10 instruction Store Burst | |
21377 | ! %f28 = 00000000 0000ffff, Mem[0000000030141408] = 00000000 0000ffff | |
21378 | stda %f28,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 0000ffff | |
21379 | ||
21380 | ! Check Point 101 for processor 0 | |
21381 | ||
21382 | set p0_check_pt_data_101,%g4 | |
21383 | rd %ccr,%g5 ! %g5 = 44 | |
21384 | ldx [%g4+0x08],%g2 | |
21385 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
21386 | bne %xcc,p0_reg_check_fail0 | |
21387 | mov 0xee0,%g1 | |
21388 | ldx [%g4+0x10],%g2 | |
21389 | cmp %l1,%g2 ! %l1 = 02226c6b00000000 | |
21390 | bne %xcc,p0_reg_check_fail1 | |
21391 | mov 0xee1,%g1 | |
21392 | ldx [%g4+0x18],%g2 | |
21393 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
21394 | bne %xcc,p0_reg_check_fail2 | |
21395 | mov 0xee2,%g1 | |
21396 | ldx [%g4+0x20],%g2 | |
21397 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
21398 | bne %xcc,p0_reg_check_fail3 | |
21399 | mov 0xee3,%g1 | |
21400 | ldx [%g4+0x28],%g2 | |
21401 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
21402 | bne %xcc,p0_reg_check_fail4 | |
21403 | mov 0xee4,%g1 | |
21404 | ldx [%g4+0x30],%g2 | |
21405 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
21406 | bne %xcc,p0_reg_check_fail6 | |
21407 | mov 0xee6,%g1 | |
21408 | ldx [%g4+0x38],%g2 | |
21409 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
21410 | bne %xcc,p0_reg_check_fail7 | |
21411 | mov 0xee7,%g1 | |
21412 | ldx [%g4+0x40],%g3 | |
21413 | std %f0,[%g4] | |
21414 | ldx [%g4],%g2 | |
21415 | cmp %g3,%g2 ! %f0 = 00000000 000000ff | |
21416 | bne %xcc,p0_freg_check_fail | |
21417 | mov 0xf00,%g1 | |
21418 | ldx [%g4+0x48],%g3 | |
21419 | std %f2,[%g4] | |
21420 | ldx [%g4],%g2 | |
21421 | cmp %g3,%g2 ! %f2 = 00000003 ff000000 | |
21422 | bne %xcc,p0_freg_check_fail | |
21423 | mov 0xf02,%g1 | |
21424 | ldx [%g4+0x50],%g3 | |
21425 | std %f4,[%g4] | |
21426 | ldx [%g4],%g2 | |
21427 | cmp %g3,%g2 ! %f4 = ff000000 00000000 | |
21428 | bne %xcc,p0_freg_check_fail | |
21429 | mov 0xf04,%g1 | |
21430 | ldx [%g4+0x58],%g3 | |
21431 | std %f6,[%g4] | |
21432 | ldx [%g4],%g2 | |
21433 | cmp %g3,%g2 ! %f6 = c400ff00 000000ff | |
21434 | bne %xcc,p0_freg_check_fail | |
21435 | mov 0xf06,%g1 | |
21436 | ldx [%g4+0x60],%g3 | |
21437 | std %f16,[%g4] | |
21438 | ldx [%g4],%g2 | |
21439 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
21440 | bne %xcc,p0_freg_check_fail | |
21441 | mov 0xf16,%g1 | |
21442 | ldx [%g4+0x68],%g3 | |
21443 | std %f30,[%g4] | |
21444 | ldx [%g4],%g2 | |
21445 | cmp %g3,%g2 ! %f30 = ff0000ff ffffffff | |
21446 | bne %xcc,p0_freg_check_fail | |
21447 | mov 0xf30,%g1 | |
21448 | ||
21449 | ! Check Point 101 completed | |
21450 | ||
21451 | ||
21452 | p0_label_506: | |
21453 | ! %l0 = 0000000000000000, Mem[0000000030001410] = 00000000 | |
21454 | stwa %l0,[%i0+%o5]0x81 ! Mem[0000000030001410] = 00000000 | |
21455 | ! Mem[0000000030081408] = ff000000, %l2 = 0000000000000000 | |
21456 | ldstuba [%i2+%o4]0x81,%l2 ! %l2 = 000000ff000000ff | |
21457 | ! Mem[0000000010081418] = ffffffff00000003, %l1 = 02226c6b00000000, %l6 = 0000000000000000 | |
21458 | add %i2,0x18,%g1 | |
21459 | casxa [%g1]0x80,%l1,%l6 ! %l6 = ffffffff00000003 | |
21460 | ! %f10 = ffff0000 00000000, Mem[0000000030101410] = 1a0000ff ff000000 | |
21461 | stda %f10,[%i4+%o5]0x89 ! Mem[0000000030101410] = ffff0000 00000000 | |
21462 | ! Mem[00000000100c1408] = 00000000, %l4 = 0000000000000000 | |
21463 | swapa [%i3+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
21464 | ! %l2 = 000000ff, %l3 = 00000000, Mem[0000000010001408] = ffffffff 00000000 | |
21465 | stda %l2,[%i0+%o4]0x88 ! Mem[0000000010001408] = 000000ff 00000000 | |
21466 | ! %f10 = ffff0000 00000000, Mem[0000000010141430] = ffffffff 9ce0b68a | |
21467 | std %f10,[%i5+0x030] ! Mem[0000000010141430] = ffff0000 00000000 | |
21468 | ! %l4 = 0000000000000000, Mem[0000000010141432] = ffff0000 | |
21469 | stb %l4,[%i5+0x032] ! Mem[0000000010141430] = ffff0000 | |
21470 | ! %f10 = ffff0000 00000000, %l0 = 0000000000000000 | |
21471 | ! Mem[0000000010141408] = 00000000ffffffff | |
21472 | add %i5,0x008,%g1 | |
21473 | stda %f10,[%g1+%l0]ASI_PST8_P ! Mem[0000000010141408] = 00000000ffffffff | |
21474 | ! Starting 10 instruction Load Burst | |
21475 | ! Mem[0000000030081410] = 00000000, %l6 = ffffffff00000003 | |
21476 | lduba [%i2+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
21477 | ||
21478 | p0_label_507: | |
21479 | ! Mem[0000000030001410] = 00000000, %l4 = 0000000000000000 | |
21480 | lduha [%i0+%o5]0x81,%l4 ! %l4 = 0000000000000000 | |
21481 | ! Mem[0000000010101418] = 5e9e1157, %l6 = 0000000000000000 | |
21482 | ldsh [%i4+0x01a],%l6 ! %l6 = 0000000000001157 | |
21483 | ! Mem[0000000010141408] = 00000000, %l0 = 0000000000000000 | |
21484 | lduha [%i5+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
21485 | ! Mem[0000000030141408] = 00000000 0000ffff, %l2 = 000000ff, %l3 = 00000000 | |
21486 | ldda [%i5+%o4]0x81,%l2 ! %l2 = 0000000000000000 000000000000ffff | |
21487 | ! Mem[0000000030001408] = ffffffffff000000, %f24 = ffffffff ffff275e | |
21488 | ldda [%i0+%o4]0x89,%f24 ! %f24 = ffffffff ff000000 | |
21489 | ! Mem[0000000010181410] = ff000000, %l7 = ffffffffffffffff | |
21490 | lduba [%i6+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
21491 | ! Mem[00000000211c0000] = fffffe0c, %l1 = 02226c6b00000000 | |
21492 | ldsb [%o2+0x001],%l1 ! %l1 = ffffffffffffffff | |
21493 | ! Mem[0000000030141408] = 00000000, %f21 = 00000000 | |
21494 | lda [%i5+%o4]0x89,%f21 ! %f21 = 00000000 | |
21495 | ! Mem[0000000010081400] = 00000000, %l5 = 00000000ffffffff | |
21496 | lduwa [%i2+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
21497 | ! Starting 10 instruction Store Burst | |
21498 | ! %l2 = 0000000000000000, Mem[0000000030141410] = ff000000 | |
21499 | stba %l2,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 | |
21500 | ||
21501 | p0_label_508: | |
21502 | ! %l6 = 0000000000001157, Mem[00000000100c1405] = 00000000, %asi = 80 | |
21503 | stba %l6,[%i3+0x005]%asi ! Mem[00000000100c1404] = 00570000 | |
21504 | ! Mem[0000000010141410] = ffff0000, %l4 = 0000000000000000 | |
21505 | swapa [%i5+%o5]0x88,%l4 ! %l4 = 00000000ffff0000 | |
21506 | ! %l6 = 0000000000001157, Mem[0000000010141410] = 00000000 | |
21507 | stwa %l6,[%i5+%o5]0x88 ! Mem[0000000010141410] = 00001157 | |
21508 | ! %f10 = ffff0000 00000000, Mem[0000000010081400] = 00000000 02226c6b | |
21509 | stda %f10,[%i2+%g0]0x88 ! Mem[0000000010081400] = ffff0000 00000000 | |
21510 | ! %l1 = ffffffffffffffff, Mem[0000000010141408] = ffffffff00000000 | |
21511 | stxa %l1,[%i5+%o4]0x88 ! Mem[0000000010141408] = ffffffffffffffff | |
21512 | ! %f4 = ff000000 00000000, Mem[0000000030101410] = 00000000 0000ffff | |
21513 | stda %f4 ,[%i4+%o5]0x81 ! Mem[0000000030101410] = ff000000 00000000 | |
21514 | ! %l2 = 0000000000000000, Mem[00000000201c0000] = 00001669 | |
21515 | sth %l2,[%o0+%g0] ! Mem[00000000201c0000] = 00001669 | |
21516 | ! %f10 = ffff0000 00000000, Mem[0000000010101410] = 0000ff00 02226c6b | |
21517 | stda %f10,[%i4+%o5]0x80 ! Mem[0000000010101410] = ffff0000 00000000 | |
21518 | ! Mem[0000000010101400] = 00006c6b, %l7 = 00000000000000ff | |
21519 | swapa [%i4+%g0]0x88,%l7 ! %l7 = 0000000000006c6b | |
21520 | ! Starting 10 instruction Load Burst | |
21521 | ! Mem[00000000100c1400] = 000000ff, %l4 = 00000000ffff0000 | |
21522 | lduba [%i3+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
21523 | ||
21524 | p0_label_509: | |
21525 | ! Mem[0000000030001400] = ff000000, %l3 = 000000000000ffff | |
21526 | ldswa [%i0+%g0]0x81,%l3 ! %l3 = ffffffffff000000 | |
21527 | ! Mem[0000000010081410] = 00000000, %l4 = 00000000000000ff | |
21528 | ldsba [%i2+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
21529 | ! Mem[0000000010041400] = 00000000 ffffffff, %l4 = 00000000, %l5 = 00000000 | |
21530 | ldda [%i1+0x000]%asi,%l4 ! %l4 = 0000000000000000 00000000ffffffff | |
21531 | ! Mem[0000000030081408] = ff000000, %l6 = 0000000000001157 | |
21532 | lduwa [%i2+%o4]0x81,%l6 ! %l6 = 00000000ff000000 | |
21533 | ! Mem[0000000030101410] = ff000000, %l4 = 0000000000000000 | |
21534 | ldsha [%i4+%o5]0x81,%l4 ! %l4 = ffffffffffffff00 | |
21535 | ! Mem[0000000010041410] = 00000000, %l4 = ffffffffffffff00 | |
21536 | ldsba [%i1+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
21537 | ! Mem[0000000010101428] = 000000ff, %l0 = 0000000000000000 | |
21538 | ldswa [%i4+0x028]%asi,%l0 ! %l0 = 00000000000000ff | |
21539 | ! Mem[0000000010141438] = ffff275effffffff, %l3 = ffffffffff000000 | |
21540 | ldxa [%i5+0x038]%asi,%l3 ! %l3 = ffff275effffffff | |
21541 | ! Mem[0000000030181400] = 00000000 000000ff 759a4764 00000000 | |
21542 | ! Mem[0000000030181410] = ff000000 ffffffff 00000000 0000005e | |
21543 | ! Mem[0000000030181420] = 000000ff 0000ffff ff00ffff 00000000 | |
21544 | ! Mem[0000000030181430] = 0000001a ff0000ff 00ffffff ff000000 | |
21545 | ldda [%i6]ASI_BLK_AIUS,%f16 ! Block Load from 0000000030181400 | |
21546 | ! Starting 10 instruction Store Burst | |
21547 | ! %l2 = 0000000000000000, Mem[000000001008143e] = 0000ffff | |
21548 | stb %l2,[%i2+0x03e] ! Mem[000000001008143c] = 000000ff | |
21549 | ||
21550 | p0_label_510: | |
21551 | ! %f15 = 0000005e, Mem[0000000030081408] = 000000ff | |
21552 | sta %f15,[%i2+%o4]0x89 ! Mem[0000000030081408] = 0000005e | |
21553 | ! %f10 = ffff0000 00000000, Mem[0000000030001410] = 00000000 ffffffff | |
21554 | stda %f10,[%i0+%o5]0x89 ! Mem[0000000030001410] = ffff0000 00000000 | |
21555 | ! Mem[0000000010181400] = 00000000, %l1 = ffffffffffffffff | |
21556 | ldstuba [%i6+%g0]0x80,%l1 ! %l1 = 00000000000000ff | |
21557 | ! %l4 = 00000000, %l5 = ffffffff, Mem[0000000010081400] = 00000000 0000ffff | |
21558 | stda %l4,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 ffffffff | |
21559 | ! %l4 = 0000000000000000, Mem[0000000020800040] = ffff9ffa, %asi = 80 | |
21560 | stha %l4,[%o1+0x040]%asi ! Mem[0000000020800040] = 00009ffa | |
21561 | membar #Sync ! Added by membar checker (99) | |
21562 | ! %f0 = 00000000 000000ff, %l1 = 0000000000000000 | |
21563 | ! Mem[0000000030181428] = ff00ffff00000000 | |
21564 | add %i6,0x028,%g1 | |
21565 | stda %f0,[%g1+%l1]ASI_PST16_S ! Mem[0000000030181428] = ff00ffff00000000 | |
21566 | ! %l7 = 0000000000006c6b, Mem[0000000010041420] = 00000003, %asi = 80 | |
21567 | stha %l7,[%i1+0x020]%asi ! Mem[0000000010041420] = 6c6b0003 | |
21568 | ! %l6 = 00000000ff000000, Mem[0000000030101400] = 0000000000000000 | |
21569 | stxa %l6,[%i4+%g0]0x89 ! Mem[0000000030101400] = 00000000ff000000 | |
21570 | ! Mem[0000000010101410] = ffff0000, %l7 = 0000000000006c6b, %asi = 80 | |
21571 | swapa [%i4+0x010]%asi,%l7 ! %l7 = 00000000ffff0000 | |
21572 | ! Starting 10 instruction Load Burst | |
21573 | ! Mem[0000000030141410] = 00000000, %l0 = 00000000000000ff | |
21574 | lduwa [%i5+%o5]0x89,%l0 ! %l0 = 0000000000000000 | |
21575 | ||
21576 | ! Check Point 102 for processor 0 | |
21577 | ||
21578 | set p0_check_pt_data_102,%g4 | |
21579 | rd %ccr,%g5 ! %g5 = 44 | |
21580 | ldx [%g4+0x08],%g2 | |
21581 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
21582 | bne %xcc,p0_reg_check_fail0 | |
21583 | mov 0xee0,%g1 | |
21584 | ldx [%g4+0x10],%g2 | |
21585 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
21586 | bne %xcc,p0_reg_check_fail1 | |
21587 | mov 0xee1,%g1 | |
21588 | ldx [%g4+0x18],%g2 | |
21589 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
21590 | bne %xcc,p0_reg_check_fail2 | |
21591 | mov 0xee2,%g1 | |
21592 | ldx [%g4+0x20],%g2 | |
21593 | cmp %l3,%g2 ! %l3 = ffff275effffffff | |
21594 | bne %xcc,p0_reg_check_fail3 | |
21595 | mov 0xee3,%g1 | |
21596 | ldx [%g4+0x28],%g2 | |
21597 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
21598 | bne %xcc,p0_reg_check_fail4 | |
21599 | mov 0xee4,%g1 | |
21600 | ldx [%g4+0x30],%g2 | |
21601 | cmp %l5,%g2 ! %l5 = 00000000ffffffff | |
21602 | bne %xcc,p0_reg_check_fail5 | |
21603 | mov 0xee5,%g1 | |
21604 | ldx [%g4+0x38],%g2 | |
21605 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
21606 | bne %xcc,p0_reg_check_fail6 | |
21607 | mov 0xee6,%g1 | |
21608 | ldx [%g4+0x40],%g2 | |
21609 | cmp %l7,%g2 ! %l7 = 00000000ffff0000 | |
21610 | bne %xcc,p0_reg_check_fail7 | |
21611 | mov 0xee7,%g1 | |
21612 | ldx [%g4+0x48],%g3 | |
21613 | std %f2,[%g4] | |
21614 | ldx [%g4],%g2 | |
21615 | cmp %g3,%g2 ! %f2 = 00000003 ff000000 | |
21616 | bne %xcc,p0_freg_check_fail | |
21617 | mov 0xf02,%g1 | |
21618 | ldx [%g4+0x50],%g3 | |
21619 | std %f4,[%g4] | |
21620 | ldx [%g4],%g2 | |
21621 | cmp %g3,%g2 ! %f4 = ff000000 00000000 | |
21622 | bne %xcc,p0_freg_check_fail | |
21623 | mov 0xf04,%g1 | |
21624 | ldx [%g4+0x58],%g3 | |
21625 | std %f16,[%g4] | |
21626 | ldx [%g4],%g2 | |
21627 | cmp %g3,%g2 ! %f16 = 00000000 000000ff | |
21628 | bne %xcc,p0_freg_check_fail | |
21629 | mov 0xf16,%g1 | |
21630 | ldx [%g4+0x60],%g3 | |
21631 | std %f18,[%g4] | |
21632 | ldx [%g4],%g2 | |
21633 | cmp %g3,%g2 ! %f18 = 759a4764 00000000 | |
21634 | bne %xcc,p0_freg_check_fail | |
21635 | mov 0xf18,%g1 | |
21636 | ldx [%g4+0x68],%g3 | |
21637 | std %f20,[%g4] | |
21638 | ldx [%g4],%g2 | |
21639 | cmp %g3,%g2 ! %f20 = ff000000 ffffffff | |
21640 | bne %xcc,p0_freg_check_fail | |
21641 | mov 0xf20,%g1 | |
21642 | ldx [%g4+0x70],%g3 | |
21643 | std %f22,[%g4] | |
21644 | ldx [%g4],%g2 | |
21645 | cmp %g3,%g2 ! %f22 = 00000000 0000005e | |
21646 | bne %xcc,p0_freg_check_fail | |
21647 | mov 0xf22,%g1 | |
21648 | ldx [%g4+0x78],%g3 | |
21649 | std %f24,[%g4] | |
21650 | ldx [%g4],%g2 | |
21651 | cmp %g3,%g2 ! %f24 = 000000ff 0000ffff | |
21652 | bne %xcc,p0_freg_check_fail | |
21653 | mov 0xf24,%g1 | |
21654 | ldx [%g4+0x80],%g3 | |
21655 | std %f26,[%g4] | |
21656 | ldx [%g4],%g2 | |
21657 | cmp %g3,%g2 ! %f26 = ff00ffff 00000000 | |
21658 | bne %xcc,p0_freg_check_fail | |
21659 | mov 0xf26,%g1 | |
21660 | ldx [%g4+0x88],%g3 | |
21661 | std %f28,[%g4] | |
21662 | ldx [%g4],%g2 | |
21663 | cmp %g3,%g2 ! %f28 = 0000001a ff0000ff | |
21664 | bne %xcc,p0_freg_check_fail | |
21665 | mov 0xf28,%g1 | |
21666 | ldx [%g4+0x90],%g3 | |
21667 | std %f30,[%g4] | |
21668 | ldx [%g4],%g2 | |
21669 | cmp %g3,%g2 ! %f30 = 00ffffff ff000000 | |
21670 | bne %xcc,p0_freg_check_fail | |
21671 | mov 0xf30,%g1 | |
21672 | ||
21673 | ! Check Point 102 completed | |
21674 | ||
21675 | ||
21676 | p0_label_511: | |
21677 | ! Mem[0000000030001400] = ff000000, %f6 = c400ff00 | |
21678 | lda [%i0+%g0]0x81,%f6 ! %f6 = ff000000 | |
21679 | ! Mem[0000000010001410] = 0000000000000000, %l4 = 0000000000000000 | |
21680 | ldxa [%i0+0x010]%asi,%l4 ! %l4 = 0000000000000000 | |
21681 | ! Mem[0000000010001410] = 00000000, %l6 = 00000000ff000000 | |
21682 | ldswa [%i0+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
21683 | ! Mem[0000000030101408] = 00ff005e, %l6 = 0000000000000000 | |
21684 | ldsha [%i4+%o4]0x81,%l6 ! %l6 = 00000000000000ff | |
21685 | ! Mem[00000000300c1410] = ffffffff, %l7 = 00000000ffff0000 | |
21686 | lduha [%i3+%o5]0x81,%l7 ! %l7 = 000000000000ffff | |
21687 | ! Mem[0000000010141408] = ffffffff, %l0 = 0000000000000000 | |
21688 | ldsba [%i5+%o4]0x80,%l0 ! %l0 = ffffffffffffffff | |
21689 | ! Mem[0000000010181408] = ffff0001, %l4 = 0000000000000000 | |
21690 | lduwa [%i6+%o4]0x88,%l4 ! %l4 = 00000000ffff0001 | |
21691 | ! Mem[0000000030041400] = ff000000, %l5 = 00000000ffffffff | |
21692 | ldswa [%i1+%g0]0x81,%l5 ! %l5 = ffffffffff000000 | |
21693 | ! Mem[0000000010101400] = ff000000, %l4 = 00000000ffff0001 | |
21694 | ldswa [%i4+%g0]0x80,%l4 ! %l4 = ffffffffff000000 | |
21695 | ! Starting 10 instruction Store Burst | |
21696 | ! Mem[0000000010101408] = 00000000, %l7 = 000000000000ffff | |
21697 | swapa [%i4+%o4]0x88,%l7 ! %l7 = 0000000000000000 | |
21698 | ||
21699 | p0_label_512: | |
21700 | ! Mem[0000000010181408] = ffff0001, %l0 = ffffffffffffffff | |
21701 | swapa [%i6+%o4]0x88,%l0 ! %l0 = 00000000ffff0001 | |
21702 | ! Mem[00000000300c1410] = ffffffff, %l0 = 00000000ffff0001 | |
21703 | swapa [%i3+%o5]0x89,%l0 ! %l0 = 00000000ffffffff | |
21704 | ! Mem[0000000030081410] = 00000000, %l3 = ffff275effffffff | |
21705 | swapa [%i2+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
21706 | ! %l3 = 0000000000000000, Mem[0000000010001408] = ff000000 | |
21707 | stha %l3,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000000 | |
21708 | ! Mem[0000000030001410] = 00000000, %l2 = 0000000000000000 | |
21709 | swapa [%i0+%o5]0x81,%l2 ! %l2 = 0000000000000000 | |
21710 | ! Mem[0000000010041428] = 00000000, %l5 = ff000000, %l2 = 00000000 | |
21711 | add %i1,0x28,%g1 | |
21712 | casa [%g1]0x80,%l5,%l2 ! %l2 = 0000000000000000 | |
21713 | ! %l7 = 0000000000000000, Mem[00000000300c1400] = 00000000 | |
21714 | stba %l7,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 00000000 | |
21715 | ! %f16 = 00000000 000000ff, Mem[0000000010001400] = 00000000 0000ffff | |
21716 | stda %f16,[%i0+0x000]%asi ! Mem[0000000010001400] = 00000000 000000ff | |
21717 | ! Mem[000000001008140c] = 00ff005e, %l1 = 0000000000000000 | |
21718 | swap [%i2+0x00c],%l1 ! %l1 = 0000000000ff005e | |
21719 | ! Starting 10 instruction Load Burst | |
21720 | ! Mem[00000000100c1400] = 00005700000000ff, %l6 = 00000000000000ff | |
21721 | ldxa [%i3+%g0]0x88,%l6 ! %l6 = 00005700000000ff | |
21722 | ||
21723 | p0_label_513: | |
21724 | ! Mem[0000000030041408] = 00000000, %f13 = 5e27ffff | |
21725 | lda [%i1+%o4]0x89,%f13 ! %f13 = 00000000 | |
21726 | ! Mem[0000000010101410] = 6b6c0000, %f23 = 0000005e | |
21727 | lda [%i4+%o5]0x88,%f23 ! %f23 = 6b6c0000 | |
21728 | ! Mem[0000000030001408] = 000000ff, %f10 = ffff0000 | |
21729 | lda [%i0+%o4]0x81,%f10 ! %f10 = 000000ff | |
21730 | ! Mem[00000000100c1400] = 000000ff, %l6 = 00005700000000ff | |
21731 | lduha [%i3+%g0]0x88,%l6 ! %l6 = 00000000000000ff | |
21732 | ! Mem[0000000030141408] = 00000000 0000ffff, %l4 = ff000000, %l5 = ff000000 | |
21733 | ldda [%i5+%o4]0x81,%l4 ! %l4 = 0000000000000000 000000000000ffff | |
21734 | ! Mem[0000000030101408] = 5e00ff00, %l0 = 00000000ffffffff | |
21735 | ldsba [%i4+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
21736 | ! Mem[0000000030041410] = 000000ff, %l0 = 0000000000000000 | |
21737 | ldswa [%i1+%o5]0x81,%l0 ! %l0 = 00000000000000ff | |
21738 | ! Mem[0000000021800140] = 0000f8a0, %l4 = 0000000000000000 | |
21739 | ldsb [%o3+0x140],%l4 ! %l4 = 0000000000000000 | |
21740 | ! Mem[0000000030041400] = 0000001a000000ff, %f4 = ff000000 00000000 | |
21741 | ldda [%i1+%g0]0x89,%f4 ! %f4 = 0000001a 000000ff | |
21742 | ! Starting 10 instruction Store Burst | |
21743 | ! Mem[00000000300c1410] = ffff0001, %l7 = 0000000000000000 | |
21744 | ldstuba [%i3+%o5]0x89,%l7 ! %l7 = 00000001000000ff | |
21745 | ||
21746 | p0_label_514: | |
21747 | ! %l0 = 000000ff, %l1 = 00ff005e, Mem[0000000030001410] = 00000000 ffff0000 | |
21748 | stda %l0,[%i0+%o5]0x89 ! Mem[0000000030001410] = 000000ff 00ff005e | |
21749 | ! %l6 = 00000000000000ff, Mem[0000000010041426] = 39aced3b, %asi = 80 | |
21750 | stha %l6,[%i1+0x026]%asi ! Mem[0000000010041424] = 39ac00ff | |
21751 | ! %l4 = 00000000, %l5 = 0000ffff, Mem[0000000030181408] = 64479a75 00000000 | |
21752 | stda %l4,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000 0000ffff | |
21753 | ! %l4 = 00000000, %l5 = 0000ffff, Mem[00000000300c1400] = 00000000 ff000000 | |
21754 | stda %l4,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00000000 0000ffff | |
21755 | ! Mem[0000000030101410] = ff000000, %l7 = 0000000000000001 | |
21756 | swapa [%i4+%o5]0x81,%l7 ! %l7 = 00000000ff000000 | |
21757 | ! Mem[0000000010001400] = 00000000, %l5 = 000000000000ffff | |
21758 | ldstuba [%i0+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
21759 | ! %l0 = 000000ff, %l1 = 00ff005e, Mem[0000000010141418] = 5e9e1157 6b6c2202 | |
21760 | std %l0,[%i5+0x018] ! Mem[0000000010141418] = 000000ff 00ff005e | |
21761 | ! %l6 = 00000000000000ff, Mem[0000000030001410] = 000000ff | |
21762 | stba %l6,[%i0+%o5]0x89 ! Mem[0000000030001410] = 000000ff | |
21763 | ! %l5 = 0000000000000000, Mem[0000000030041410] = ff000000 | |
21764 | stwa %l5,[%i1+%o5]0x89 ! Mem[0000000030041410] = 00000000 | |
21765 | ! Starting 10 instruction Load Burst | |
21766 | ! Mem[0000000020800000] = ffff0db6, %l1 = 0000000000ff005e | |
21767 | lduh [%o1+%g0],%l1 ! %l1 = 000000000000ffff | |
21768 | ||
21769 | p0_label_515: | |
21770 | ! Mem[0000000030141408] = 00000000, %l4 = 0000000000000000 | |
21771 | lduha [%i5+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
21772 | ! Mem[0000000030101408] = 00ff005e, %l2 = 0000000000000000 | |
21773 | ldswa [%i4+%o4]0x81,%l2 ! %l2 = 0000000000ff005e | |
21774 | ! Mem[0000000010001410] = 00000000, %l6 = 00000000000000ff | |
21775 | lduba [%i0+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
21776 | ! Mem[0000000010001410] = 00000000, %f26 = ff00ffff | |
21777 | lda [%i0+%o5]0x88,%f26 ! %f26 = 00000000 | |
21778 | ! Mem[0000000030101408] = 00ff005e, %l2 = 0000000000ff005e | |
21779 | ldswa [%i4+%o4]0x81,%l2 ! %l2 = 0000000000ff005e | |
21780 | ! Mem[0000000010001410] = 00000000, %l7 = 00000000ff000000 | |
21781 | lduwa [%i0+0x010]%asi,%l7 ! %l7 = 0000000000000000 | |
21782 | ! Mem[0000000010101400] = 000000ff, %l2 = 0000000000ff005e | |
21783 | lduba [%i4+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
21784 | ! Mem[0000000030001408] = ff000000, %l3 = 0000000000000000 | |
21785 | lduwa [%i0+%o4]0x89,%l3 ! %l3 = 00000000ff000000 | |
21786 | ! Code Fragment 3 | |
21787 | p0_fragment_12: | |
21788 | ! %l0 = 00000000000000ff | |
21789 | setx 0x79b0a3d03d0bbdbf,%g7,%l0 ! %l0 = 79b0a3d03d0bbdbf | |
21790 | ! %l1 = 000000000000ffff | |
21791 | setx 0xf1131a17eaeb8957,%g7,%l1 ! %l1 = f1131a17eaeb8957 | |
21792 | setx 0x1fe000, %g1, %g3 | |
21793 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
21794 | setx 0x1ffff8, %g1, %g2 | |
21795 | and %l0, %g2, %l0 | |
21796 | ta T_CHANGE_HPRIV | |
21797 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
21798 | ta T_CHANGE_NONHPRIV | |
21799 | ! %l0 = 79b0a3d03d0bbdbf | |
21800 | setx 0xe5273a682f17583b,%g7,%l0 ! %l0 = e5273a682f17583b | |
21801 | ! %l1 = f1131a17eaeb8957 | |
21802 | setx 0x6ee5c89852fb2b0b,%g7,%l1 ! %l1 = 6ee5c89852fb2b0b | |
21803 | ! Starting 10 instruction Store Burst | |
21804 | ! %f16 = 00000000 000000ff, Mem[0000000030141410] = 00000000 00000000 | |
21805 | stda %f16,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00000000 000000ff | |
21806 | ||
21807 | ! Check Point 103 for processor 0 | |
21808 | ||
21809 | set p0_check_pt_data_103,%g4 | |
21810 | rd %ccr,%g5 ! %g5 = 44 | |
21811 | ldx [%g4+0x08],%g2 | |
21812 | cmp %l0,%g2 ! %l0 = e5273a682f17583b | |
21813 | bne %xcc,p0_reg_check_fail0 | |
21814 | mov 0xee0,%g1 | |
21815 | ldx [%g4+0x10],%g2 | |
21816 | cmp %l1,%g2 ! %l1 = 6ee5c89852fb2b0b | |
21817 | bne %xcc,p0_reg_check_fail1 | |
21818 | mov 0xee1,%g1 | |
21819 | ldx [%g4+0x18],%g2 | |
21820 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
21821 | bne %xcc,p0_reg_check_fail2 | |
21822 | mov 0xee2,%g1 | |
21823 | ldx [%g4+0x20],%g2 | |
21824 | cmp %l3,%g2 ! %l3 = 00000000ff000000 | |
21825 | bne %xcc,p0_reg_check_fail3 | |
21826 | mov 0xee3,%g1 | |
21827 | ldx [%g4+0x28],%g2 | |
21828 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
21829 | bne %xcc,p0_reg_check_fail4 | |
21830 | mov 0xee4,%g1 | |
21831 | ldx [%g4+0x30],%g2 | |
21832 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
21833 | bne %xcc,p0_reg_check_fail5 | |
21834 | mov 0xee5,%g1 | |
21835 | ldx [%g4+0x38],%g2 | |
21836 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
21837 | bne %xcc,p0_reg_check_fail6 | |
21838 | mov 0xee6,%g1 | |
21839 | ldx [%g4+0x40],%g2 | |
21840 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
21841 | bne %xcc,p0_reg_check_fail7 | |
21842 | mov 0xee7,%g1 | |
21843 | ldx [%g4+0x48],%g3 | |
21844 | std %f4,[%g4] | |
21845 | ldx [%g4],%g2 | |
21846 | cmp %g3,%g2 ! %f4 = 0000001a 000000ff | |
21847 | bne %xcc,p0_freg_check_fail | |
21848 | mov 0xf04,%g1 | |
21849 | ldx [%g4+0x50],%g3 | |
21850 | std %f6,[%g4] | |
21851 | ldx [%g4],%g2 | |
21852 | cmp %g3,%g2 ! %f6 = ff000000 000000ff | |
21853 | bne %xcc,p0_freg_check_fail | |
21854 | mov 0xf06,%g1 | |
21855 | ldx [%g4+0x58],%g3 | |
21856 | std %f10,[%g4] | |
21857 | ldx [%g4],%g2 | |
21858 | cmp %g3,%g2 ! %f10 = 000000ff 00000000 | |
21859 | bne %xcc,p0_freg_check_fail | |
21860 | mov 0xf10,%g1 | |
21861 | ldx [%g4+0x60],%g3 | |
21862 | std %f12,[%g4] | |
21863 | ldx [%g4],%g2 | |
21864 | cmp %g3,%g2 ! %f12 = ffffffff 00000000 | |
21865 | bne %xcc,p0_freg_check_fail | |
21866 | mov 0xf12,%g1 | |
21867 | ldx [%g4+0x68],%g3 | |
21868 | std %f22,[%g4] | |
21869 | ldx [%g4],%g2 | |
21870 | cmp %g3,%g2 ! %f22 = 00000000 6b6c0000 | |
21871 | bne %xcc,p0_freg_check_fail | |
21872 | mov 0xf22,%g1 | |
21873 | ldx [%g4+0x70],%g3 | |
21874 | std %f26,[%g4] | |
21875 | ldx [%g4],%g2 | |
21876 | cmp %g3,%g2 ! %f26 = 00000000 00000000 | |
21877 | bne %xcc,p0_freg_check_fail | |
21878 | mov 0xf26,%g1 | |
21879 | ||
21880 | ! Check Point 103 completed | |
21881 | ||
21882 | ||
21883 | p0_label_516: | |
21884 | ! Mem[00000000100c1408] = 00000000, %l3 = 00000000ff000000 | |
21885 | swapa [%i3+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
21886 | ! %f18 = 759a4764 00000000, %l6 = 0000000000000000 | |
21887 | ! Mem[0000000010001400] = ff000000000000ff | |
21888 | stda %f18,[%i0+%l6]ASI_PST8_PL ! Mem[0000000010001400] = ff000000000000ff | |
21889 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000030101400] = 000000ff 00000000 | |
21890 | stda %l4,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 00000000 | |
21891 | ! %l3 = 0000000000000000, Mem[0000000010181408] = ffffffffff000000 | |
21892 | stxa %l3,[%i6+%o4]0x80 ! Mem[0000000010181408] = 0000000000000000 | |
21893 | ! %l7 = 0000000000000000, Mem[0000000030101408] = 5e00ff00 | |
21894 | stwa %l7,[%i4+%o4]0x89 ! Mem[0000000030101408] = 00000000 | |
21895 | ! Mem[0000000030001408] = ff000000, %l0 = e5273a682f17583b | |
21896 | ldstuba [%i0+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
21897 | ! %f14 = 00000000 0000005e, %l4 = 0000000000000000 | |
21898 | ! Mem[0000000030181430] = 0000001aff0000ff | |
21899 | add %i6,0x030,%g1 | |
21900 | stda %f14,[%g1+%l4]ASI_PST8_SL ! Mem[0000000030181430] = 0000001aff0000ff | |
21901 | ! %l5 = 0000000000000000, Mem[0000000030181410] = 000000ff | |
21902 | stha %l5,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000 | |
21903 | ! Mem[0000000030081410] = ffffffff, %l2 = 00000000000000ff | |
21904 | swapa [%i2+%o5]0x89,%l2 ! %l2 = 00000000ffffffff | |
21905 | ! Starting 10 instruction Load Burst | |
21906 | ! Mem[0000000030181400] = 00000000, %f16 = 00000000 | |
21907 | lda [%i6+%g0]0x81,%f16 ! %f16 = 00000000 | |
21908 | ||
21909 | p0_label_517: | |
21910 | ! Mem[0000000030081410] = ff000000, %l2 = 00000000ffffffff | |
21911 | ldsba [%i2+%o5]0x81,%l2 ! %l2 = ffffffffffffffff | |
21912 | ! Mem[0000000030181410] = ffffffff 00000000, %l6 = 00000000, %l7 = 00000000 | |
21913 | ldda [%i6+%o5]0x89,%l6 ! %l6 = 0000000000000000 00000000ffffffff | |
21914 | ! Mem[0000000010181408] = 00000000, %l5 = 0000000000000000 | |
21915 | ldswa [%i6+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
21916 | ! Mem[0000000010041400] = 00000000ffffffff, %l0 = 0000000000000000 | |
21917 | ldxa [%i1+%g0]0x80,%l0 ! %l0 = 00000000ffffffff | |
21918 | ! Mem[0000000010041408] = ff000000, %l1 = 6ee5c89852fb2b0b | |
21919 | ldsha [%i1+0x00a]%asi,%l1 ! %l1 = 0000000000000000 | |
21920 | ! Mem[0000000030081400] = 00000000, %l6 = 0000000000000000 | |
21921 | ldsba [%i2+%g0]0x89,%l6 ! %l6 = 0000000000000000 | |
21922 | ! Mem[0000000010101410] = 6b6c0000, %l3 = 0000000000000000 | |
21923 | lduha [%i4+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
21924 | ! Mem[00000000201c0000] = 00001669, %l1 = 0000000000000000 | |
21925 | lduh [%o0+%g0],%l1 ! %l1 = 0000000000000000 | |
21926 | ! Mem[00000000100c1410] = 0000000000000000, %l2 = ffffffffffffffff | |
21927 | ldxa [%i3+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
21928 | ! Starting 10 instruction Store Burst | |
21929 | ! %f0 = 00000000 000000ff, Mem[0000000030041400] = ff000000 1a000000 | |
21930 | stda %f0 ,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00000000 000000ff | |
21931 | ||
21932 | p0_label_518: | |
21933 | ! Mem[0000000030001410] = ff000000, %l7 = 00000000ffffffff | |
21934 | ldstuba [%i0+%o5]0x81,%l7 ! %l7 = 000000ff000000ff | |
21935 | ! %l0 = ffffffff, %l1 = 00000000, Mem[0000000010041430] = 9ce0b68a ffff275e | |
21936 | std %l0,[%i1+0x030] ! Mem[0000000010041430] = ffffffff 00000000 | |
21937 | ! %l2 = 0000000000000000, Mem[0000000010141428] = ff00ffff1a000000 | |
21938 | stx %l2,[%i5+0x028] ! Mem[0000000010141428] = 0000000000000000 | |
21939 | ! Mem[0000000030141408] = 00000000, %l2 = 0000000000000000 | |
21940 | swapa [%i5+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
21941 | ! Mem[00000000100c1410] = 00000000, %l2 = 0000000000000000 | |
21942 | swapa [%i3+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
21943 | ! %f10 = 000000ff 00000000, Mem[0000000030101400] = 00000000 00000000 | |
21944 | stda %f10,[%i4+%g0]0x81 ! Mem[0000000030101400] = 000000ff 00000000 | |
21945 | ! %f3 = ff000000, Mem[0000000010141410] = 57110000 | |
21946 | sta %f3 ,[%i5+%o5]0x80 ! Mem[0000000010141410] = ff000000 | |
21947 | ! %l0 = 00000000ffffffff, Mem[000000001004142c] = 0000001a | |
21948 | stb %l0,[%i1+0x02c] ! Mem[000000001004142c] = ff00001a | |
21949 | ! Mem[0000000030001408] = ff0000ff, %l7 = 00000000000000ff | |
21950 | swapa [%i0+%o4]0x81,%l7 ! %l7 = 00000000ff0000ff | |
21951 | ! Starting 10 instruction Load Burst | |
21952 | ! Mem[0000000030001410] = 000000ff, %l4 = 0000000000000000 | |
21953 | ldsha [%i0+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
21954 | ||
21955 | p0_label_519: | |
21956 | ! Mem[0000000010041400] = 00000000, %f6 = ff000000 | |
21957 | lda [%i1+%g0]0x80,%f6 ! %f6 = 00000000 | |
21958 | ! Mem[0000000030081410] = 000000ff, %l3 = 0000000000000000 | |
21959 | ldswa [%i2+%o5]0x89,%l3 ! %l3 = 00000000000000ff | |
21960 | ! Mem[0000000010141410] = ff000000, %l6 = 0000000000000000 | |
21961 | ldsha [%i5+%o5]0x80,%l6 ! %l6 = ffffffffffffff00 | |
21962 | ! Mem[0000000020800040] = 00009ffa, %l3 = 00000000000000ff | |
21963 | lduh [%o1+0x040],%l3 ! %l3 = 0000000000000000 | |
21964 | ! Mem[0000000030101400] = ff000000, %l6 = ffffffffffffff00 | |
21965 | lduwa [%i4+%g0]0x89,%l6 ! %l6 = 00000000ff000000 | |
21966 | ! %l4 = 000000ff, %l5 = 00000000, Mem[0000000030081410] = 000000ff ffffffff | |
21967 | stda %l4,[%i2+%o5]0x89 ! Mem[0000000030081410] = 000000ff 00000000 | |
21968 | ! Mem[0000000010181400] = ff000000, %l3 = 0000000000000000 | |
21969 | ldswa [%i6+%g0]0x80,%l3 ! %l3 = ffffffffff000000 | |
21970 | ! Mem[00000000100c1410] = 00000000, %l4 = 00000000000000ff | |
21971 | ldswa [%i3+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
21972 | ! Mem[0000000010041410] = 00000000 0000ffff, %l2 = 00000000, %l3 = ff000000 | |
21973 | ldda [%i1+%o5]0x80,%l2 ! %l2 = 0000000000000000 000000000000ffff | |
21974 | ! Starting 10 instruction Store Burst | |
21975 | ! Mem[0000000010101430] = 000000ffffffff00, %l6 = 00000000ff000000, %l3 = 000000000000ffff | |
21976 | add %i4,0x30,%g1 | |
21977 | casxa [%g1]0x80,%l6,%l3 ! %l3 = 000000ffffffff00 | |
21978 | ||
21979 | p0_label_520: | |
21980 | ! %l4 = 0000000000000000, Mem[0000000010101400] = 00000000000000ff | |
21981 | stxa %l4,[%i4+%g0]0x88 ! Mem[0000000010101400] = 0000000000000000 | |
21982 | ! Mem[0000000030001408] = 000000ff, %l0 = 00000000ffffffff | |
21983 | ldstuba [%i0+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
21984 | ! %l1 = 0000000000000000, Mem[0000000010141410] = 00000000000000ff | |
21985 | stxa %l1,[%i5+%o5]0x88 ! Mem[0000000010141410] = 0000000000000000 | |
21986 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000010101410] = 6b6c0000 00000000 | |
21987 | stda %l4,[%i4+%o5]0x88 ! Mem[0000000010101410] = 00000000 00000000 | |
21988 | ! Mem[0000000010041438] = 00000000, %l2 = 0000000000000000, %asi = 80 | |
21989 | swapa [%i1+0x038]%asi,%l2 ! %l2 = 0000000000000000 | |
21990 | ! Mem[0000000010001400] = ff000000, %l4 = 0000000000000000 | |
21991 | swapa [%i0+%g0]0x80,%l4 ! %l4 = 00000000ff000000 | |
21992 | ! %l0 = 0000000000000000, Mem[00000000100c143c] = 00000000 | |
21993 | sth %l0,[%i3+0x03c] ! Mem[00000000100c143c] = 00000000 | |
21994 | ! %l1 = 0000000000000000, Mem[0000000030181400] = ff00000000000000 | |
21995 | stxa %l1,[%i6+%g0]0x89 ! Mem[0000000030181400] = 0000000000000000 | |
21996 | ! Mem[0000000030101400] = ff000000, %l6 = 00000000ff000000 | |
21997 | swapa [%i4+%g0]0x89,%l6 ! %l6 = 00000000ff000000 | |
21998 | ! Starting 10 instruction Load Burst | |
21999 | ! Mem[0000000030001400] = 00000000 000000ff, %l4 = ff000000, %l5 = 00000000 | |
22000 | ldda [%i0+%g0]0x89,%l4 ! %l4 = 00000000000000ff 0000000000000000 | |
22001 | ||
22002 | ! Check Point 104 for processor 0 | |
22003 | ||
22004 | set p0_check_pt_data_104,%g4 | |
22005 | rd %ccr,%g5 ! %g5 = 44 | |
22006 | ldx [%g4+0x08],%g2 | |
22007 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
22008 | bne %xcc,p0_reg_check_fail0 | |
22009 | mov 0xee0,%g1 | |
22010 | ldx [%g4+0x10],%g2 | |
22011 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
22012 | bne %xcc,p0_reg_check_fail1 | |
22013 | mov 0xee1,%g1 | |
22014 | ldx [%g4+0x18],%g2 | |
22015 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
22016 | bne %xcc,p0_reg_check_fail2 | |
22017 | mov 0xee2,%g1 | |
22018 | ldx [%g4+0x20],%g2 | |
22019 | cmp %l3,%g2 ! %l3 = 000000ffffffff00 | |
22020 | bne %xcc,p0_reg_check_fail3 | |
22021 | mov 0xee3,%g1 | |
22022 | ldx [%g4+0x28],%g2 | |
22023 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
22024 | bne %xcc,p0_reg_check_fail4 | |
22025 | mov 0xee4,%g1 | |
22026 | ldx [%g4+0x30],%g2 | |
22027 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
22028 | bne %xcc,p0_reg_check_fail5 | |
22029 | mov 0xee5,%g1 | |
22030 | ldx [%g4+0x38],%g2 | |
22031 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
22032 | bne %xcc,p0_reg_check_fail6 | |
22033 | mov 0xee6,%g1 | |
22034 | ldx [%g4+0x40],%g2 | |
22035 | cmp %l7,%g2 ! %l7 = 00000000ff0000ff | |
22036 | bne %xcc,p0_reg_check_fail7 | |
22037 | mov 0xee7,%g1 | |
22038 | ldx [%g4+0x48],%g3 | |
22039 | std %f2,[%g4] | |
22040 | ldx [%g4],%g2 | |
22041 | cmp %g3,%g2 ! %f2 = 00000003 ff000000 | |
22042 | bne %xcc,p0_freg_check_fail | |
22043 | mov 0xf02,%g1 | |
22044 | ldx [%g4+0x50],%g3 | |
22045 | std %f4,[%g4] | |
22046 | ldx [%g4],%g2 | |
22047 | cmp %g3,%g2 ! %f4 = 0000001a 000000ff | |
22048 | bne %xcc,p0_freg_check_fail | |
22049 | mov 0xf04,%g1 | |
22050 | ldx [%g4+0x58],%g3 | |
22051 | std %f6,[%g4] | |
22052 | ldx [%g4],%g2 | |
22053 | cmp %g3,%g2 ! %f6 = 00000000 000000ff | |
22054 | bne %xcc,p0_freg_check_fail | |
22055 | mov 0xf06,%g1 | |
22056 | ldx [%g4+0x60],%g3 | |
22057 | std %f16,[%g4] | |
22058 | ldx [%g4],%g2 | |
22059 | cmp %g3,%g2 ! %f16 = 00000000 000000ff | |
22060 | bne %xcc,p0_freg_check_fail | |
22061 | mov 0xf16,%g1 | |
22062 | ||
22063 | ! Check Point 104 completed | |
22064 | ||
22065 | ||
22066 | p0_label_521: | |
22067 | ! Mem[0000000010141408] = ffffffff, %l0 = 0000000000000000 | |
22068 | ldswa [%i5+%o4]0x88,%l0 ! %l0 = ffffffffffffffff | |
22069 | ! Mem[00000000300c1408] = ffff0000, %l1 = 0000000000000000 | |
22070 | ldswa [%i3+%o4]0x81,%l1 ! %l1 = ffffffffffff0000 | |
22071 | ! Mem[0000000030181400] = 00000000, %f23 = 6b6c0000 | |
22072 | lda [%i6+%g0]0x89,%f23 ! %f23 = 00000000 | |
22073 | membar #Sync ! Added by membar checker (100) | |
22074 | ! Mem[0000000030001400] = ff000000 00000000 ff0000ff ffffffff | |
22075 | ! Mem[0000000030001410] = ff000000 5e00ff00 ff000000 00ff00c4 | |
22076 | ! Mem[0000000030001420] = 00000000 000000ff 00000000 0000ffff | |
22077 | ! Mem[0000000030001430] = ffff275e ffffffff 5e000000 00000000 | |
22078 | ldda [%i0]ASI_BLK_S,%f16 ! Block Load from 0000000030001400 | |
22079 | ! Mem[0000000010041408] = 000000ff, %l3 = 000000ffffffff00 | |
22080 | ldsba [%i1+%o4]0x88,%l3 ! %l3 = ffffffffffffffff | |
22081 | ! Mem[0000000030141408] = 00000000, %l3 = ffffffffffffffff | |
22082 | lduba [%i5+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
22083 | ! Mem[0000000030081410] = ff000000, %l4 = 00000000000000ff | |
22084 | lduha [%i2+%o5]0x81,%l4 ! %l4 = 000000000000ff00 | |
22085 | ! Mem[0000000030081400] = 00000000, %l0 = ffffffffffffffff | |
22086 | lduha [%i2+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
22087 | ! Mem[00000000100c1410] = 00000000, %l6 = 00000000ff000000 | |
22088 | lduwa [%i3+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
22089 | ! Starting 10 instruction Store Burst | |
22090 | ! %f0 = 00000000 000000ff, %l2 = 0000000000000000 | |
22091 | ! Mem[0000000010001408] = 0000000000000000 | |
22092 | add %i0,0x008,%g1 | |
22093 | stda %f0,[%g1+%l2]ASI_PST32_PL ! Mem[0000000010001408] = 0000000000000000 | |
22094 | ||
22095 | p0_label_522: | |
22096 | ! %l6 = 0000000000000000, Mem[0000000010141408] = ffffffff | |
22097 | stba %l6,[%i5+%o4]0x88 ! Mem[0000000010141408] = ffffff00 | |
22098 | ! Mem[0000000030001410] = 000000ff, %l4 = 000000000000ff00 | |
22099 | ldstuba [%i0+%o5]0x89,%l4 ! %l4 = 000000ff000000ff | |
22100 | membar #Sync ! Added by membar checker (101) | |
22101 | ! %l0 = 00000000, %l1 = ffff0000, Mem[0000000030001410] = ff000000 5e00ff00 | |
22102 | stda %l0,[%i0+%o5]0x81 ! Mem[0000000030001410] = 00000000 ffff0000 | |
22103 | ! Mem[0000000030141410] = ff000000, %l6 = 0000000000000000 | |
22104 | swapa [%i5+%o5]0x81,%l6 ! %l6 = 00000000ff000000 | |
22105 | ! %l0 = 0000000000000000, Mem[0000000030041400] = 00000000 | |
22106 | stha %l0,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00000000 | |
22107 | ! Mem[0000000030141408] = 00000000, %l3 = 0000000000000000 | |
22108 | ldstuba [%i5+%o4]0x89,%l3 ! %l3 = 00000000000000ff | |
22109 | ! Mem[0000000010141410] = 00000000, %l3 = 0000000000000000 | |
22110 | swapa [%i5+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
22111 | ! Mem[0000000030181408] = 00000000, %l2 = 0000000000000000 | |
22112 | swapa [%i6+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
22113 | ! Mem[0000000010041408] = 000000ff, %l0 = 0000000000000000 | |
22114 | ldstuba [%i1+%o4]0x88,%l0 ! %l0 = 000000ff000000ff | |
22115 | ! Starting 10 instruction Load Burst | |
22116 | ! Mem[0000000030101400] = 000000ff 00000000 00000000 00000000 | |
22117 | ! Mem[0000000030101410] = 00000001 00000000 000000ff ff000000 | |
22118 | ! Mem[0000000030101420] = 3bedac39 d81a5b92 c78091bb 759a4764 | |
22119 | ! Mem[0000000030101430] = fac65f36 9ce0b68a 46ee6de4 c49410cd | |
22120 | ldda [%i4]ASI_BLK_S,%f16 ! Block Load from 0000000030101400 | |
22121 | ||
22122 | p0_label_523: | |
22123 | ! Mem[0000000010101424] = 00ff0000, %f13 = 00000000 | |
22124 | lda [%i4+0x024]%asi,%f13 ! %f13 = 00ff0000 | |
22125 | ! Mem[0000000010081408] = ffffffff00000000, %l0 = 00000000000000ff | |
22126 | ldx [%i2+%o4],%l0 ! %l0 = ffffffff00000000 | |
22127 | ! Mem[0000000010101410] = 0000000000000000, %f4 = 0000001a 000000ff | |
22128 | ldda [%i4+0x010]%asi,%f4 ! %f4 = 00000000 00000000 | |
22129 | ! Mem[00000000100c1420] = ffffffff ffff275e, %l2 = 00000000, %l3 = 00000000 | |
22130 | ldda [%i3+0x020]%asi,%l2 ! %l2 = 00000000ffffffff 00000000ffff275e | |
22131 | ! Mem[0000000010141400] = 759a4764 00ff0000, %l4 = 000000ff, %l5 = 00000000 | |
22132 | ldda [%i5+%g0]0x88,%l4 ! %l4 = 0000000000ff0000 00000000759a4764 | |
22133 | ! Mem[0000000010181400] = ff0000006b6c2202, %l0 = ffffffff00000000 | |
22134 | ldx [%i6+%g0],%l0 ! %l0 = ff0000006b6c2202 | |
22135 | ! Mem[000000001000143c] = ffffffff, %l4 = 0000000000ff0000 | |
22136 | lduha [%i0+0x03c]%asi,%l4 ! %l4 = 000000000000ffff | |
22137 | ! Mem[00000000100c1400] = 00005700000000ff, %f0 = 00000000 000000ff | |
22138 | ldda [%i3+%g0]0x88,%f0 ! %f0 = 00005700 000000ff | |
22139 | ! Mem[0000000010001410] = 00000000, %l0 = ff0000006b6c2202 | |
22140 | ldsh [%i0+0x012],%l0 ! %l0 = 0000000000000000 | |
22141 | ! Starting 10 instruction Store Burst | |
22142 | ! %f8 = ff000000 00000000, Mem[0000000010001410] = 00000000 00000000 | |
22143 | stda %f8 ,[%i0+%o5]0x88 ! Mem[0000000010001410] = ff000000 00000000 | |
22144 | ||
22145 | p0_label_524: | |
22146 | ! %f10 = 000000ff 00000000, %l3 = 00000000ffff275e | |
22147 | ! Mem[00000000300c1410] = ff00ffff00000000 | |
22148 | add %i3,0x010,%g1 | |
22149 | stda %f10,[%g1+%l3]ASI_PST32_S ! Mem[00000000300c1410] = 000000ff00000000 | |
22150 | ! %f14 = 00000000 0000005e, %l6 = 00000000ff000000 | |
22151 | ! Mem[00000000100c1430] = 000000000000ffff | |
22152 | add %i3,0x030,%g1 | |
22153 | stda %f14,[%g1+%l6]ASI_PST32_P ! Mem[00000000100c1430] = 000000000000ffff | |
22154 | ! %f13 = 00ff0000, Mem[0000000010001414] = 000000ff | |
22155 | st %f13,[%i0+0x014] ! Mem[0000000010001414] = 00ff0000 | |
22156 | ! Mem[0000000010141400] = 0000ff0064479a75, %l7 = 00000000ff0000ff, %l7 = 00000000ff0000ff | |
22157 | casxa [%i5]0x80,%l7,%l7 ! %l7 = 0000ff0064479a75 | |
22158 | ! %l0 = 0000000000000000, Mem[0000000020800000] = ffff0db6, %asi = 80 | |
22159 | stha %l0,[%o1+0x000]%asi ! Mem[0000000020800000] = 00000db6 | |
22160 | ! Mem[00000000300c1410] = ff000000, %l1 = ffffffffffff0000 | |
22161 | swapa [%i3+%o5]0x89,%l1 ! %l1 = 00000000ff000000 | |
22162 | ! Mem[0000000030141410] = 00000000, %l4 = 000000000000ffff | |
22163 | swapa [%i5+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
22164 | ! Mem[0000000010041400] = 00000000, %l1 = 00000000ff000000 | |
22165 | swapa [%i1+%g0]0x80,%l1 ! %l1 = 0000000000000000 | |
22166 | ! %l3 = 00000000ffff275e, Mem[0000000030181400] = 00000000 | |
22167 | stwa %l3,[%i6+%g0]0x89 ! Mem[0000000030181400] = ffff275e | |
22168 | ! Starting 10 instruction Load Burst | |
22169 | ! Mem[0000000010081408] = ffffffff, %l4 = 0000000000000000 | |
22170 | ldsha [%i2+%o4]0x80,%l4 ! %l4 = ffffffffffffffff | |
22171 | ||
22172 | p0_label_525: | |
22173 | ! Mem[0000000010081418] = ffffffff, %l1 = 0000000000000000 | |
22174 | ldsb [%i2+0x018],%l1 ! %l1 = ffffffffffffffff | |
22175 | ! Mem[0000000030141400] = 00000000000000ff, %l1 = ffffffffffffffff | |
22176 | ldxa [%i5+%g0]0x81,%l1 ! %l1 = 00000000000000ff | |
22177 | ! Mem[0000000010181400] = 000000ff, %l4 = ffffffffffffffff | |
22178 | lduwa [%i6+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
22179 | ! Mem[0000000010041410] = 00000000, %l0 = 0000000000000000 | |
22180 | lduba [%i1+%o5]0x88,%l0 ! %l0 = 0000000000000000 | |
22181 | ! Mem[0000000030141400] = 00000000, %l0 = 0000000000000000 | |
22182 | ldsba [%i5+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
22183 | ! Mem[0000000030101400] = 000000ff, %l0 = 0000000000000000 | |
22184 | lduha [%i4+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
22185 | ! Mem[0000000010181400] = ff000000, %l6 = 00000000ff000000 | |
22186 | lduba [%i6+%g0]0x80,%l6 ! %l6 = 00000000000000ff | |
22187 | ! Mem[0000000010001400] = 00000000, %f2 = 00000003 | |
22188 | lda [%i0+%g0]0x80,%f2 ! %f2 = 00000000 | |
22189 | ! Mem[0000000010141400] = 0000ff00 64479a75, %l6 = 000000ff, %l7 = 64479a75 | |
22190 | ldda [%i5+%g0]0x80,%l6 ! %l6 = 000000000000ff00 0000000064479a75 | |
22191 | ! Starting 10 instruction Store Burst | |
22192 | ! %l2 = ffffffff, %l3 = ffff275e, Mem[0000000010181408] = 00000000 00000000 | |
22193 | stda %l2,[%i6+%o4]0x80 ! Mem[0000000010181408] = ffffffff ffff275e | |
22194 | ||
22195 | ! Check Point 105 for processor 0 | |
22196 | ||
22197 | set p0_check_pt_data_105,%g4 | |
22198 | rd %ccr,%g5 ! %g5 = 44 | |
22199 | ldx [%g4+0x08],%g2 | |
22200 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
22201 | bne %xcc,p0_reg_check_fail0 | |
22202 | mov 0xee0,%g1 | |
22203 | ldx [%g4+0x10],%g2 | |
22204 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
22205 | bne %xcc,p0_reg_check_fail1 | |
22206 | mov 0xee1,%g1 | |
22207 | ldx [%g4+0x18],%g2 | |
22208 | cmp %l3,%g2 ! %l3 = 00000000ffff275e | |
22209 | bne %xcc,p0_reg_check_fail3 | |
22210 | mov 0xee3,%g1 | |
22211 | ldx [%g4+0x20],%g2 | |
22212 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
22213 | bne %xcc,p0_reg_check_fail4 | |
22214 | mov 0xee4,%g1 | |
22215 | ldx [%g4+0x28],%g2 | |
22216 | cmp %l6,%g2 ! %l6 = 000000000000ff00 | |
22217 | bne %xcc,p0_reg_check_fail6 | |
22218 | mov 0xee6,%g1 | |
22219 | ldx [%g4+0x30],%g3 | |
22220 | std %f0,[%g4] | |
22221 | ldx [%g4],%g2 | |
22222 | cmp %g3,%g2 ! %f0 = 00005700 000000ff | |
22223 | bne %xcc,p0_freg_check_fail | |
22224 | mov 0xf00,%g1 | |
22225 | ldx [%g4+0x38],%g3 | |
22226 | std %f2,[%g4] | |
22227 | ldx [%g4],%g2 | |
22228 | cmp %g3,%g2 ! %f2 = 00000000 ff000000 | |
22229 | bne %xcc,p0_freg_check_fail | |
22230 | mov 0xf02,%g1 | |
22231 | ldx [%g4+0x40],%g3 | |
22232 | std %f4,[%g4] | |
22233 | ldx [%g4],%g2 | |
22234 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
22235 | bne %xcc,p0_freg_check_fail | |
22236 | mov 0xf04,%g1 | |
22237 | ldx [%g4+0x48],%g3 | |
22238 | std %f6,[%g4] | |
22239 | ldx [%g4],%g2 | |
22240 | cmp %g3,%g2 ! %f6 = 00000000 000000ff | |
22241 | bne %xcc,p0_freg_check_fail | |
22242 | mov 0xf06,%g1 | |
22243 | ldx [%g4+0x50],%g3 | |
22244 | std %f12,[%g4] | |
22245 | ldx [%g4],%g2 | |
22246 | cmp %g3,%g2 ! %f12 = ffffffff 00ff0000 | |
22247 | bne %xcc,p0_freg_check_fail | |
22248 | mov 0xf12,%g1 | |
22249 | ldx [%g4+0x58],%g3 | |
22250 | std %f16,[%g4] | |
22251 | ldx [%g4],%g2 | |
22252 | cmp %g3,%g2 ! %f16 = 000000ff 00000000 | |
22253 | bne %xcc,p0_freg_check_fail | |
22254 | mov 0xf16,%g1 | |
22255 | ldx [%g4+0x60],%g3 | |
22256 | std %f18,[%g4] | |
22257 | ldx [%g4],%g2 | |
22258 | cmp %g3,%g2 ! %f18 = 00000000 00000000 | |
22259 | bne %xcc,p0_freg_check_fail | |
22260 | mov 0xf18,%g1 | |
22261 | ldx [%g4+0x68],%g3 | |
22262 | std %f20,[%g4] | |
22263 | ldx [%g4],%g2 | |
22264 | cmp %g3,%g2 ! %f20 = 00000001 00000000 | |
22265 | bne %xcc,p0_freg_check_fail | |
22266 | mov 0xf20,%g1 | |
22267 | ldx [%g4+0x70],%g3 | |
22268 | std %f22,[%g4] | |
22269 | ldx [%g4],%g2 | |
22270 | cmp %g3,%g2 ! %f22 = 000000ff ff000000 | |
22271 | bne %xcc,p0_freg_check_fail | |
22272 | mov 0xf22,%g1 | |
22273 | ldx [%g4+0x78],%g3 | |
22274 | std %f24,[%g4] | |
22275 | ldx [%g4],%g2 | |
22276 | cmp %g3,%g2 ! %f24 = 3bedac39 d81a5b92 | |
22277 | bne %xcc,p0_freg_check_fail | |
22278 | mov 0xf24,%g1 | |
22279 | ldx [%g4+0x80],%g3 | |
22280 | std %f26,[%g4] | |
22281 | ldx [%g4],%g2 | |
22282 | cmp %g3,%g2 ! %f26 = c78091bb 759a4764 | |
22283 | bne %xcc,p0_freg_check_fail | |
22284 | mov 0xf26,%g1 | |
22285 | ldx [%g4+0x88],%g3 | |
22286 | std %f28,[%g4] | |
22287 | ldx [%g4],%g2 | |
22288 | cmp %g3,%g2 ! %f28 = fac65f36 9ce0b68a | |
22289 | bne %xcc,p0_freg_check_fail | |
22290 | mov 0xf28,%g1 | |
22291 | ldx [%g4+0x90],%g3 | |
22292 | std %f30,[%g4] | |
22293 | ldx [%g4],%g2 | |
22294 | cmp %g3,%g2 ! %f30 = 46ee6de4 c49410cd | |
22295 | bne %xcc,p0_freg_check_fail | |
22296 | mov 0xf30,%g1 | |
22297 | ||
22298 | ! Check Point 105 completed | |
22299 | ||
22300 | ||
22301 | p0_label_526: | |
22302 | ! %l1 = 00000000000000ff, Mem[0000000030181400] = 5e27ffff | |
22303 | stha %l1,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00ffffff | |
22304 | ! %f30 = 46ee6de4 c49410cd, %l4 = 00000000000000ff | |
22305 | ! Mem[0000000010181428] = 000000000000ffff | |
22306 | add %i6,0x028,%g1 | |
22307 | stda %f30,[%g1+%l4]ASI_PST32_PL ! Mem[0000000010181428] = cd1094c4e46dee46 | |
22308 | ! %l2 = 00000000ffffffff, Mem[0000000020800000] = 00000db6 | |
22309 | stb %l2,[%o1+%g0] ! Mem[0000000020800000] = ff000db6 | |
22310 | ! %l5 = 00000000759a4764, Mem[0000000030081408] = 5e000000 | |
22311 | stba %l5,[%i2+%o4]0x81 ! Mem[0000000030081408] = 64000000 | |
22312 | ! Mem[00000000100c140c] = 00000000, %l4 = 00000000000000ff | |
22313 | swap [%i3+0x00c],%l4 ! %l4 = 0000000000000000 | |
22314 | ! %l4 = 0000000000000000, Mem[00000000201c0000] = 00001669, %asi = 80 | |
22315 | stha %l4,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00001669 | |
22316 | ! %l2 = ffffffff, %l3 = ffff275e, Mem[0000000030001400] = 000000ff 00000000 | |
22317 | stda %l2,[%i0+%g0]0x89 ! Mem[0000000030001400] = ffffffff ffff275e | |
22318 | ! %l6 = 0000ff00, %l7 = 64479a75, Mem[0000000010181400] = ff000000 6b6c2202 | |
22319 | stda %l6,[%i6+0x000]%asi ! Mem[0000000010181400] = 0000ff00 64479a75 | |
22320 | ! %f6 = 00000000 000000ff, Mem[0000000030001400] = ffffffff 5e27ffff | |
22321 | stda %f6 ,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00000000 000000ff | |
22322 | ! Starting 10 instruction Load Burst | |
22323 | ! Mem[00000000300c1408] = ffff0000, %l1 = 00000000000000ff | |
22324 | ldsba [%i3+%o4]0x81,%l1 ! %l1 = ffffffffffffffff | |
22325 | ||
22326 | p0_label_527: | |
22327 | ! Mem[0000000030101400] = ff000000, %l3 = 00000000ffff275e | |
22328 | lduwa [%i4+%g0]0x89,%l3 ! %l3 = 00000000ff000000 | |
22329 | membar #Sync ! Added by membar checker (102) | |
22330 | ! Mem[0000000030041400] = 00000000 000000ff 00000000 8ab60000 | |
22331 | ! Mem[0000000030041410] = 00000000 00000000 02226c6b 57119e5e | |
22332 | ! Mem[0000000030041420] = 000000ff ff000000 64479a75 bb9180c7 | |
22333 | ! Mem[0000000030041430] = ffffffff ff000000 ffffffff 000000ff | |
22334 | ldda [%i1]ASI_BLK_SL,%f16 ! Block Load from 0000000030041400 | |
22335 | ! Mem[0000000030081400] = 00000000, %l7 = 0000000064479a75 | |
22336 | ldsba [%i2+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
22337 | ! Mem[0000000010041410] = 00000000, %l4 = 0000000000000000 | |
22338 | lduha [%i1+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
22339 | ! Mem[0000000030141408] = ff000000, %l3 = 00000000ff000000 | |
22340 | ldsba [%i5+%o4]0x81,%l3 ! %l3 = ffffffffffffffff | |
22341 | ! Mem[0000000010001400] = 00000000, %l3 = ffffffffffffffff | |
22342 | ldsba [%i0+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
22343 | ! Mem[0000000030081410] = ff00000000000000, %f14 = 00000000 0000005e | |
22344 | ldda [%i2+%o5]0x81,%f14 ! %f14 = ff000000 00000000 | |
22345 | ! Mem[0000000010041408] = ff000000, %l4 = 0000000000000000 | |
22346 | ldswa [%i1+%o4]0x80,%l4 ! %l4 = ffffffffff000000 | |
22347 | ! Mem[0000000010101400] = 00000000, %l6 = 000000000000ff00 | |
22348 | lduwa [%i4+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
22349 | ! Starting 10 instruction Store Burst | |
22350 | ! %l0 = 0000000000000000, Mem[0000000010141400] = 0000ff00 | |
22351 | stha %l0,[%i5+%g0]0x80 ! Mem[0000000010141400] = 0000ff00 | |
22352 | ||
22353 | p0_label_528: | |
22354 | ! %l5 = 00000000759a4764, Mem[000000001014140c] = ffffffff, %asi = 80 | |
22355 | stba %l5,[%i5+0x00c]%asi ! Mem[000000001014140c] = 64ffffff | |
22356 | ! Mem[0000000030141400] = 00000000, %l7 = 0000000000000000 | |
22357 | ldstuba [%i5+%g0]0x89,%l7 ! %l7 = 00000000000000ff | |
22358 | ! %l4 = ffffffffff000000, Mem[0000000010141408] = ffffff00 | |
22359 | stwa %l4,[%i5+%o4]0x88 ! Mem[0000000010141408] = ff000000 | |
22360 | ! %l0 = 0000000000000000, Mem[00000000100c1400] = ff000000 | |
22361 | stwa %l0,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00000000 | |
22362 | membar #Sync ! Added by membar checker (103) | |
22363 | ! %l4 = ffffffffff000000, Mem[0000000030041400] = 00000000000000ff | |
22364 | stxa %l4,[%i1+%g0]0x81 ! Mem[0000000030041400] = ffffffffff000000 | |
22365 | ! Mem[0000000010101410] = 00000000, %l6 = 0000000000000000 | |
22366 | swapa [%i4+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
22367 | ! %f4 = 00000000 00000000, %l6 = 0000000000000000 | |
22368 | ! Mem[00000000100c1408] = 000000ff000000ff | |
22369 | add %i3,0x008,%g1 | |
22370 | stda %f4,[%g1+%l6]ASI_PST8_PL ! Mem[00000000100c1408] = 000000ff000000ff | |
22371 | ! %f28 = 000000ff, Mem[0000000010101408] = ffff0000 | |
22372 | sta %f28,[%i4+%o4]0x80 ! Mem[0000000010101408] = 000000ff | |
22373 | ! %f4 = 00000000 00000000, %l3 = 0000000000000000 | |
22374 | ! Mem[0000000030101438] = 46ee6de4c49410cd | |
22375 | add %i4,0x038,%g1 | |
22376 | stda %f4,[%g1+%l3]ASI_PST8_SL ! Mem[0000000030101438] = 46ee6de4c49410cd | |
22377 | ! Starting 10 instruction Load Burst | |
22378 | ! Mem[0000000010181408] = ffffffff, %l1 = ffffffffffffffff | |
22379 | lduba [%i6+%o4]0x80,%l1 ! %l1 = 00000000000000ff | |
22380 | ||
22381 | p0_label_529: | |
22382 | ! Mem[0000000021800180] = ffffdb07, %l2 = 00000000ffffffff | |
22383 | ldsha [%o3+0x180]%asi,%l2 ! %l2 = ffffffffffffffff | |
22384 | ! Mem[0000000030141408] = ffff0000 000000ff, %l4 = ff000000, %l5 = 759a4764 | |
22385 | ldda [%i5+%o4]0x89,%l4 ! %l4 = 00000000000000ff 00000000ffff0000 | |
22386 | ! Mem[0000000010141400] = 0000ff00 64479a75 000000ff 64ffffff | |
22387 | ! Mem[0000000010141410] = 00000000 00000000 000000ff 00ff005e | |
22388 | ! Mem[0000000010141420] = 000000ff 00000000 00000000 00000000 | |
22389 | ! Mem[0000000010141430] = ffff0000 00000000 ffff275e ffffffff | |
22390 | ldda [%i5]ASI_BLK_P,%f0 ! Block Load from 0000000010141400 | |
22391 | ! Mem[00000000300c1410] = ffff0000, %f28 = 000000ff | |
22392 | lda [%i3+%o5]0x89,%f28 ! %f28 = ffff0000 | |
22393 | ! Mem[00000000300c1400] = 00000000, %l6 = 0000000000000000 | |
22394 | lduba [%i3+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
22395 | ! Mem[00000000300c1410] = ffff0000, %l6 = 0000000000000000 | |
22396 | lduwa [%i3+%o5]0x89,%l6 ! %l6 = 00000000ffff0000 | |
22397 | ! Mem[00000000300c1408] = ffff000000000000, %f16 = ff000000 00000000 | |
22398 | ldda [%i3+%o4]0x81,%f16 ! %f16 = ffff0000 00000000 | |
22399 | ! Mem[0000000030181400] = 00ffffff, %l1 = 00000000000000ff | |
22400 | lduha [%i6+%g0]0x81,%l1 ! %l1 = 00000000000000ff | |
22401 | ! Mem[0000000030001408] = ff0000ff, %l1 = 00000000000000ff | |
22402 | ldswa [%i0+%o4]0x81,%l1 ! %l1 = ffffffffff0000ff | |
22403 | ! Starting 10 instruction Store Burst | |
22404 | membar #Sync ! Added by membar checker (104) | |
22405 | ! %l5 = 00000000ffff0000, Mem[0000000010141408] = ffffff64ff000000 | |
22406 | stxa %l5,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000000ffff0000 | |
22407 | ||
22408 | p0_label_530: | |
22409 | ! %l6 = 00000000ffff0000, Mem[0000000010181400] = 00ff0000 | |
22410 | stwa %l6,[%i6+%g0]0x88 ! Mem[0000000010181400] = ffff0000 | |
22411 | ! Mem[00000000100c1430] = 000000000000ffff, %l7 = 0000000000000000, %l5 = 00000000ffff0000 | |
22412 | add %i3,0x30,%g1 | |
22413 | casxa [%g1]0x80,%l7,%l5 ! %l5 = 000000000000ffff | |
22414 | ! %l7 = 0000000000000000, Mem[0000000030141400] = ff000000000000ff | |
22415 | stxa %l7,[%i5+%g0]0x89 ! Mem[0000000030141400] = 0000000000000000 | |
22416 | ! %f22 = 5e9e1157 6b6c2202, Mem[0000000010101428] = 000000ff 0000ffff | |
22417 | std %f22,[%i4+0x028] ! Mem[0000000010101428] = 5e9e1157 6b6c2202 | |
22418 | ! Mem[000000001014143c] = ffffffff, %l3 = 0000000000000000 | |
22419 | ldstuba [%i5+0x03c]%asi,%l3 ! %l3 = 000000ff000000ff | |
22420 | ! Mem[0000000020800000] = ff000db6, %l5 = 000000000000ffff | |
22421 | ldstub [%o1+%g0],%l5 ! %l5 = 000000ff000000ff | |
22422 | ! %f4 = 00000000 00000000, %l0 = 0000000000000000 | |
22423 | ! Mem[00000000100c1420] = ffffffffffff275e | |
22424 | add %i3,0x020,%g1 | |
22425 | stda %f4,[%g1+%l0]ASI_PST32_PL ! Mem[00000000100c1420] = ffffffffffff275e | |
22426 | ! %f29 = ffffffff, Mem[0000000010101410] = 00000000 | |
22427 | sta %f29,[%i4+%o5]0x80 ! Mem[0000000010101410] = ffffffff | |
22428 | ! Mem[000000001004142c] = ff00001a, %l5 = 000000ff, %l0 = 00000000 | |
22429 | add %i1,0x2c,%g1 | |
22430 | casa [%g1]0x80,%l5,%l0 ! %l0 = 00000000ff00001a | |
22431 | ! Starting 10 instruction Load Burst | |
22432 | ! Mem[0000000030081410] = ff000000, %l2 = ffffffffffffffff | |
22433 | ldsba [%i2+%o5]0x81,%l2 ! %l2 = ffffffffffffffff | |
22434 | ||
22435 | ! Check Point 106 for processor 0 | |
22436 | ||
22437 | set p0_check_pt_data_106,%g4 | |
22438 | rd %ccr,%g5 ! %g5 = 44 | |
22439 | ldx [%g4+0x08],%g2 | |
22440 | cmp %l1,%g2 ! %l1 = ffffffffff0000ff | |
22441 | bne %xcc,p0_reg_check_fail1 | |
22442 | mov 0xee1,%g1 | |
22443 | ldx [%g4+0x10],%g2 | |
22444 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
22445 | bne %xcc,p0_reg_check_fail2 | |
22446 | mov 0xee2,%g1 | |
22447 | ldx [%g4+0x18],%g2 | |
22448 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
22449 | bne %xcc,p0_reg_check_fail3 | |
22450 | mov 0xee3,%g1 | |
22451 | ldx [%g4+0x20],%g2 | |
22452 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
22453 | bne %xcc,p0_reg_check_fail4 | |
22454 | mov 0xee4,%g1 | |
22455 | ldx [%g4+0x28],%g2 | |
22456 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
22457 | bne %xcc,p0_reg_check_fail5 | |
22458 | mov 0xee5,%g1 | |
22459 | ldx [%g4+0x30],%g2 | |
22460 | cmp %l6,%g2 ! %l6 = 00000000ffff0000 | |
22461 | bne %xcc,p0_reg_check_fail6 | |
22462 | mov 0xee6,%g1 | |
22463 | ldx [%g4+0x38],%g2 | |
22464 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
22465 | bne %xcc,p0_reg_check_fail7 | |
22466 | mov 0xee7,%g1 | |
22467 | ldx [%g4+0x40],%g3 | |
22468 | std %f0,[%g4] | |
22469 | ldx [%g4],%g2 | |
22470 | cmp %g3,%g2 ! %f0 = 0000ff00 64479a75 | |
22471 | bne %xcc,p0_freg_check_fail | |
22472 | mov 0xf00,%g1 | |
22473 | ldx [%g4+0x48],%g3 | |
22474 | std %f2,[%g4] | |
22475 | ldx [%g4],%g2 | |
22476 | cmp %g3,%g2 ! %f2 = 000000ff 64ffffff | |
22477 | bne %xcc,p0_freg_check_fail | |
22478 | mov 0xf02,%g1 | |
22479 | ldx [%g4+0x50],%g3 | |
22480 | std %f4,[%g4] | |
22481 | ldx [%g4],%g2 | |
22482 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
22483 | bne %xcc,p0_freg_check_fail | |
22484 | mov 0xf04,%g1 | |
22485 | ldx [%g4+0x58],%g3 | |
22486 | std %f6,[%g4] | |
22487 | ldx [%g4],%g2 | |
22488 | cmp %g3,%g2 ! %f6 = 000000ff 00ff005e | |
22489 | bne %xcc,p0_freg_check_fail | |
22490 | mov 0xf06,%g1 | |
22491 | ldx [%g4+0x60],%g3 | |
22492 | std %f8,[%g4] | |
22493 | ldx [%g4],%g2 | |
22494 | cmp %g3,%g2 ! %f8 = 000000ff 00000000 | |
22495 | bne %xcc,p0_freg_check_fail | |
22496 | mov 0xf08,%g1 | |
22497 | ldx [%g4+0x68],%g3 | |
22498 | std %f10,[%g4] | |
22499 | ldx [%g4],%g2 | |
22500 | cmp %g3,%g2 ! %f10 = 00000000 00000000 | |
22501 | bne %xcc,p0_freg_check_fail | |
22502 | mov 0xf10,%g1 | |
22503 | ldx [%g4+0x70],%g3 | |
22504 | std %f12,[%g4] | |
22505 | ldx [%g4],%g2 | |
22506 | cmp %g3,%g2 ! %f12 = ffff0000 00000000 | |
22507 | bne %xcc,p0_freg_check_fail | |
22508 | mov 0xf12,%g1 | |
22509 | ldx [%g4+0x78],%g3 | |
22510 | std %f14,[%g4] | |
22511 | ldx [%g4],%g2 | |
22512 | cmp %g3,%g2 ! %f14 = ffff275e ffffffff | |
22513 | bne %xcc,p0_freg_check_fail | |
22514 | mov 0xf14,%g1 | |
22515 | ldx [%g4+0x80],%g3 | |
22516 | std %f16,[%g4] | |
22517 | ldx [%g4],%g2 | |
22518 | cmp %g3,%g2 ! %f16 = ffff0000 00000000 | |
22519 | bne %xcc,p0_freg_check_fail | |
22520 | mov 0xf16,%g1 | |
22521 | ldx [%g4+0x88],%g3 | |
22522 | std %f18,[%g4] | |
22523 | ldx [%g4],%g2 | |
22524 | cmp %g3,%g2 ! %f18 = 0000b68a 00000000 | |
22525 | bne %xcc,p0_freg_check_fail | |
22526 | mov 0xf18,%g1 | |
22527 | ldx [%g4+0x90],%g3 | |
22528 | std %f20,[%g4] | |
22529 | ldx [%g4],%g2 | |
22530 | cmp %g3,%g2 ! %f20 = 00000000 00000000 | |
22531 | bne %xcc,p0_freg_check_fail | |
22532 | mov 0xf20,%g1 | |
22533 | ldx [%g4+0x98],%g3 | |
22534 | std %f22,[%g4] | |
22535 | ldx [%g4],%g2 | |
22536 | cmp %g3,%g2 ! %f22 = 5e9e1157 6b6c2202 | |
22537 | bne %xcc,p0_freg_check_fail | |
22538 | mov 0xf22,%g1 | |
22539 | ldx [%g4+0xa0],%g3 | |
22540 | std %f24,[%g4] | |
22541 | ldx [%g4],%g2 | |
22542 | cmp %g3,%g2 ! %f24 = 000000ff ff000000 | |
22543 | bne %xcc,p0_freg_check_fail | |
22544 | mov 0xf24,%g1 | |
22545 | ldx [%g4+0xa8],%g3 | |
22546 | std %f26,[%g4] | |
22547 | ldx [%g4],%g2 | |
22548 | cmp %g3,%g2 ! %f26 = c78091bb 759a4764 | |
22549 | bne %xcc,p0_freg_check_fail | |
22550 | mov 0xf26,%g1 | |
22551 | ldx [%g4+0xb0],%g3 | |
22552 | std %f28,[%g4] | |
22553 | ldx [%g4],%g2 | |
22554 | cmp %g3,%g2 ! %f28 = ffff0000 ffffffff | |
22555 | bne %xcc,p0_freg_check_fail | |
22556 | mov 0xf28,%g1 | |
22557 | ldx [%g4+0xb8],%g3 | |
22558 | std %f30,[%g4] | |
22559 | ldx [%g4],%g2 | |
22560 | cmp %g3,%g2 ! %f30 = ff000000 ffffffff | |
22561 | bne %xcc,p0_freg_check_fail | |
22562 | mov 0xf30,%g1 | |
22563 | ||
22564 | ! Check Point 106 completed | |
22565 | ||
22566 | ||
22567 | p0_label_531: | |
22568 | ! Mem[0000000030141400] = 00000000, %l3 = 00000000000000ff | |
22569 | lduba [%i5+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
22570 | ! Mem[0000000010141400] = 0000ff00, %l6 = 00000000ffff0000 | |
22571 | lduha [%i5+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
22572 | ! Mem[000000001004143c] = 0000005e, %l3 = 0000000000000000 | |
22573 | ldsha [%i1+0x03e]%asi,%l3 ! %l3 = 000000000000005e | |
22574 | ! Mem[0000000030101410] = 00000000 01000000, %l6 = 00000000, %l7 = 00000000 | |
22575 | ldda [%i4+%o5]0x89,%l6 ! %l6 = 0000000001000000 0000000000000000 | |
22576 | ! Mem[00000000100c142c] = 8ab6ff9c, %f5 = 00000000 | |
22577 | ld [%i3+0x02c],%f5 ! %f5 = 8ab6ff9c | |
22578 | ! Mem[0000000030181408] = 0000ffff00000000, %f12 = ffff0000 00000000 | |
22579 | ldda [%i6+%o4]0x89,%f12 ! %f12 = 0000ffff 00000000 | |
22580 | ! Mem[00000000300c1408] = ffff000000000000, %f8 = 000000ff 00000000 | |
22581 | ldda [%i3+%o4]0x81,%f8 ! %f8 = ffff0000 00000000 | |
22582 | ! Mem[00000000100c1408] = 000000ff, %l0 = 00000000ff00001a | |
22583 | lduha [%i3+%o4]0x80,%l0 ! %l0 = 0000000000000000 | |
22584 | ! Mem[0000000030101408] = 00000000 00000000, %l0 = 00000000, %l1 = ff0000ff | |
22585 | ldda [%i4+%o4]0x81,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
22586 | ! Starting 10 instruction Store Burst | |
22587 | ! Mem[00000000211c0001] = fffffe0c, %l0 = 0000000000000000 | |
22588 | ldstuba [%o2+0x001]%asi,%l0 ! %l0 = 000000ff000000ff | |
22589 | ||
22590 | p0_label_532: | |
22591 | ! %l7 = 0000000000000000, Mem[000000001004142c] = ff00001a, %asi = 80 | |
22592 | stha %l7,[%i1+0x02c]%asi ! Mem[000000001004142c] = 0000001a | |
22593 | ! %l4 = 00000000000000ff, Mem[0000000030081400] = 00000000 | |
22594 | stwa %l4,[%i2+%g0]0x89 ! Mem[0000000030081400] = 000000ff | |
22595 | ! %l3 = 000000000000005e, Mem[0000000010181420] = 000000ff | |
22596 | stb %l3,[%i6+0x020] ! Mem[0000000010181420] = 5e0000ff | |
22597 | ! Mem[0000000010081410] = 00000000, %l5 = 00000000000000ff | |
22598 | swapa [%i2+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
22599 | ! Mem[00000000100c1410] = 00000000, %l0 = 00000000000000ff | |
22600 | swapa [%i3+%o5]0x88,%l0 ! %l0 = 0000000000000000 | |
22601 | ! Mem[0000000010041400] = ff000000, %l7 = 0000000000000000 | |
22602 | swapa [%i1+%g0]0x80,%l7 ! %l7 = 00000000ff000000 | |
22603 | ! Mem[000000001014140c] = 00000000, %l0 = 0000000000000000 | |
22604 | swap [%i5+0x00c],%l0 ! %l0 = 0000000000000000 | |
22605 | ! %l0 = 0000000000000000, Mem[0000000030141400] = 00000000 | |
22606 | stha %l0,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000 | |
22607 | ! %l4 = 00000000000000ff, Mem[0000000010081408] = ffffffff | |
22608 | stha %l4,[%i2+%o4]0x88 ! Mem[0000000010081408] = ffff00ff | |
22609 | ! Starting 10 instruction Load Burst | |
22610 | ! Mem[0000000021800080] = 5e000b33, %l6 = 0000000001000000 | |
22611 | ldsh [%o3+0x080],%l6 ! %l6 = 0000000000005e00 | |
22612 | ||
22613 | p0_label_533: | |
22614 | ! Mem[0000000030101408] = 0000000000000000, %f28 = ffff0000 ffffffff | |
22615 | ldda [%i4+%o4]0x89,%f28 ! %f28 = 00000000 00000000 | |
22616 | ! Mem[0000000010181430] = 00000000, %l7 = 00000000ff000000 | |
22617 | lduba [%i6+0x031]%asi,%l7 ! %l7 = 0000000000000000 | |
22618 | ! Mem[0000000030101408] = 00000000, %l2 = ffffffffffffffff | |
22619 | ldsba [%i4+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
22620 | ! Mem[0000000010041408] = ffffffff000000ff, %f22 = 5e9e1157 6b6c2202 | |
22621 | ldda [%i1+%o4]0x88,%f22 ! %f22 = ffffffff 000000ff | |
22622 | ! Mem[0000000030001410] = 00000000, %f19 = 00000000 | |
22623 | lda [%i0+%o5]0x89,%f19 ! %f19 = 00000000 | |
22624 | ! Mem[00000000201c0000] = 00001669, %l2 = 0000000000000000 | |
22625 | lduba [%o0+0x001]%asi,%l2 ! %l2 = 0000000000000000 | |
22626 | ! Mem[00000000300c1410] = 0000ffff00000000, %l5 = 0000000000000000 | |
22627 | ldxa [%i3+%o5]0x81,%l5 ! %l5 = 0000ffff00000000 | |
22628 | ! Mem[0000000030081410] = 000000ff, %l3 = 000000000000005e | |
22629 | lduha [%i2+%o5]0x89,%l3 ! %l3 = 00000000000000ff | |
22630 | ! Mem[0000000010141408] = ffff0000, %l6 = 0000000000005e00 | |
22631 | ldsba [%i5+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
22632 | ! Starting 10 instruction Store Burst | |
22633 | ! Mem[0000000030001410] = 00000000, %l6 = 0000000000000000 | |
22634 | ldstuba [%i0+%o5]0x81,%l6 ! %l6 = 00000000000000ff | |
22635 | ||
22636 | p0_label_534: | |
22637 | ! %f16 = ffff0000 00000000, %l3 = 00000000000000ff | |
22638 | ! Mem[0000000010081430] = ff0000ff00000000 | |
22639 | add %i2,0x030,%g1 | |
22640 | stda %f16,[%g1+%l3]ASI_PST8_PL ! Mem[0000000010081430] = 000000000000ffff | |
22641 | ! %f0 = 0000ff00 64479a75 000000ff 64ffffff | |
22642 | ! %f4 = 00000000 8ab6ff9c 000000ff 00ff005e | |
22643 | ! %f8 = ffff0000 00000000 00000000 00000000 | |
22644 | ! %f12 = 0000ffff 00000000 ffff275e ffffffff | |
22645 | stda %f0,[%i5]ASI_COMMIT_P ! Block Store to 0000000010141400 | |
22646 | ! %l2 = 00000000, %l3 = 000000ff, Mem[0000000030181408] = 00000000 ffff0000 | |
22647 | stda %l2,[%i6+%o4]0x81 ! Mem[0000000030181408] = 00000000 000000ff | |
22648 | ! Mem[0000000030001408] = ff0000ff, %l4 = 00000000000000ff | |
22649 | swapa [%i0+%o4]0x81,%l4 ! %l4 = 00000000ff0000ff | |
22650 | ! Mem[0000000010081426] = 000027ff, %l2 = 0000000000000000 | |
22651 | ldstub [%i2+0x026],%l2 ! %l2 = 00000027000000ff | |
22652 | ! %l6 = 00000000, %l7 = 00000000, Mem[0000000030041400] = ffffffff 000000ff | |
22653 | stda %l6,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00000000 00000000 | |
22654 | ! %f22 = ffffffff 000000ff, %l7 = 0000000000000000 | |
22655 | ! Mem[0000000010101418] = 5e9e115700ff00ff | |
22656 | add %i4,0x018,%g1 | |
22657 | stda %f22,[%g1+%l7]ASI_PST16_P ! Mem[0000000010101418] = 5e9e115700ff00ff | |
22658 | ! %l1 = 0000000000000000, Mem[0000000010101400] = 00000000 | |
22659 | stwa %l1,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 | |
22660 | ! Mem[0000000010041428] = 00000000, %l4 = ff0000ff, %l3 = 000000ff | |
22661 | add %i1,0x28,%g1 | |
22662 | casa [%g1]0x80,%l4,%l3 ! %l3 = 0000000000000000 | |
22663 | ! Starting 10 instruction Load Burst | |
22664 | ! Mem[0000000030181410] = 00000000, %l7 = 0000000000000000 | |
22665 | ldswa [%i6+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
22666 | ||
22667 | p0_label_535: | |
22668 | ! Mem[0000000030181400] = 00ffffff, %l6 = 0000000000000000 | |
22669 | lduba [%i6+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
22670 | ! Mem[00000000100c1408] = ff000000, %l6 = 0000000000000000 | |
22671 | ldsha [%i3+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
22672 | ! Mem[0000000030001408] = 000000ff, %l7 = 0000000000000000 | |
22673 | lduha [%i0+%o4]0x81,%l7 ! %l7 = 0000000000000000 | |
22674 | ! Mem[0000000010001418] = 5e000000ffff0000, %f28 = 00000000 00000000 | |
22675 | ldda [%i0+0x018]%asi,%f28 ! %f28 = 5e000000 ffff0000 | |
22676 | ! Mem[0000000030141408] = 000000ff, %l5 = 0000ffff00000000 | |
22677 | lduba [%i5+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
22678 | ! Mem[0000000030101410] = 01000000, %l3 = 0000000000000000 | |
22679 | ldsha [%i4+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
22680 | ! Mem[00000000201c0000] = 00001669, %l4 = 00000000ff0000ff | |
22681 | lduba [%o0+0x001]%asi,%l4 ! %l4 = 0000000000000000 | |
22682 | ! Mem[0000000030181400] = 00000000ffffff00, %f18 = 0000b68a 00000000 | |
22683 | ldda [%i6+%g0]0x89,%f18 ! %f18 = 00000000 ffffff00 | |
22684 | ! Mem[0000000030081408] = 0000000000000064, %l2 = 0000000000000027 | |
22685 | ldxa [%i2+%o4]0x89,%l2 ! %l2 = 0000000000000064 | |
22686 | ! Starting 10 instruction Store Burst | |
22687 | ! %f24 = 000000ff ff000000, Mem[0000000010041400] = 00000000 ffffffff | |
22688 | stda %f24,[%i1+%g0]0x88 ! Mem[0000000010041400] = 000000ff ff000000 | |
22689 | ||
22690 | ! Check Point 107 for processor 0 | |
22691 | ||
22692 | set p0_check_pt_data_107,%g4 | |
22693 | rd %ccr,%g5 ! %g5 = 44 | |
22694 | ldx [%g4+0x08],%g2 | |
22695 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
22696 | bne %xcc,p0_reg_check_fail0 | |
22697 | mov 0xee0,%g1 | |
22698 | ldx [%g4+0x10],%g2 | |
22699 | cmp %l2,%g2 ! %l2 = 0000000000000064 | |
22700 | bne %xcc,p0_reg_check_fail2 | |
22701 | mov 0xee2,%g1 | |
22702 | ldx [%g4+0x18],%g2 | |
22703 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
22704 | bne %xcc,p0_reg_check_fail3 | |
22705 | mov 0xee3,%g1 | |
22706 | ldx [%g4+0x20],%g2 | |
22707 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
22708 | bne %xcc,p0_reg_check_fail4 | |
22709 | mov 0xee4,%g1 | |
22710 | ldx [%g4+0x28],%g2 | |
22711 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
22712 | bne %xcc,p0_reg_check_fail5 | |
22713 | mov 0xee5,%g1 | |
22714 | ldx [%g4+0x30],%g2 | |
22715 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
22716 | bne %xcc,p0_reg_check_fail6 | |
22717 | mov 0xee6,%g1 | |
22718 | ldx [%g4+0x38],%g2 | |
22719 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
22720 | bne %xcc,p0_reg_check_fail7 | |
22721 | mov 0xee7,%g1 | |
22722 | ldx [%g4+0x40],%g3 | |
22723 | std %f0,[%g4] | |
22724 | ldx [%g4],%g2 | |
22725 | cmp %g3,%g2 ! %f0 = 0000ff00 64479a75 | |
22726 | bne %xcc,p0_freg_check_fail | |
22727 | mov 0xf00,%g1 | |
22728 | ldx [%g4+0x48],%g3 | |
22729 | std %f4,[%g4] | |
22730 | ldx [%g4],%g2 | |
22731 | cmp %g3,%g2 ! %f4 = 00000000 8ab6ff9c | |
22732 | bne %xcc,p0_freg_check_fail | |
22733 | mov 0xf04,%g1 | |
22734 | ldx [%g4+0x50],%g3 | |
22735 | std %f6,[%g4] | |
22736 | ldx [%g4],%g2 | |
22737 | cmp %g3,%g2 ! %f6 = 000000ff 00ff005e | |
22738 | bne %xcc,p0_freg_check_fail | |
22739 | mov 0xf06,%g1 | |
22740 | ldx [%g4+0x58],%g3 | |
22741 | std %f8,[%g4] | |
22742 | ldx [%g4],%g2 | |
22743 | cmp %g3,%g2 ! %f8 = ffff0000 00000000 | |
22744 | bne %xcc,p0_freg_check_fail | |
22745 | mov 0xf08,%g1 | |
22746 | ldx [%g4+0x60],%g3 | |
22747 | std %f12,[%g4] | |
22748 | ldx [%g4],%g2 | |
22749 | cmp %g3,%g2 ! %f12 = 0000ffff 00000000 | |
22750 | bne %xcc,p0_freg_check_fail | |
22751 | mov 0xf12,%g1 | |
22752 | ldx [%g4+0x68],%g3 | |
22753 | std %f18,[%g4] | |
22754 | ldx [%g4],%g2 | |
22755 | cmp %g3,%g2 ! %f18 = 00000000 ffffff00 | |
22756 | bne %xcc,p0_freg_check_fail | |
22757 | mov 0xf18,%g1 | |
22758 | ldx [%g4+0x70],%g3 | |
22759 | std %f22,[%g4] | |
22760 | ldx [%g4],%g2 | |
22761 | cmp %g3,%g2 ! %f22 = ffffffff 000000ff | |
22762 | bne %xcc,p0_freg_check_fail | |
22763 | mov 0xf22,%g1 | |
22764 | ldx [%g4+0x78],%g3 | |
22765 | std %f28,[%g4] | |
22766 | ldx [%g4],%g2 | |
22767 | cmp %g3,%g2 ! %f28 = 5e000000 ffff0000 | |
22768 | bne %xcc,p0_freg_check_fail | |
22769 | mov 0xf28,%g1 | |
22770 | ||
22771 | ! Check Point 107 completed | |
22772 | ||
22773 | ||
22774 | p0_label_536: | |
22775 | ! Mem[00000000100c1410] = ff00000000000000, %l1 = 0000000000000000, %l6 = 0000000000000000 | |
22776 | add %i3,0x10,%g1 | |
22777 | casxa [%g1]0x80,%l1,%l6 ! %l6 = ff00000000000000 | |
22778 | ! Mem[0000000010041400] = ff000000, %l5 = 00000000000000ff | |
22779 | swapa [%i1+%g0]0x88,%l5 ! %l5 = 00000000ff000000 | |
22780 | membar #Sync ! Added by membar checker (105) | |
22781 | ! %l5 = 00000000ff000000, Mem[0000000010141438] = ffff275effffffff | |
22782 | stx %l5,[%i5+0x038] ! Mem[0000000010141438] = 00000000ff000000 | |
22783 | ! %l3 = 0000000000000000, Mem[0000000010041400] = 000000ff | |
22784 | stha %l3,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 | |
22785 | ! Mem[0000000010141434] = 00000000, %l6 = ff00000000000000 | |
22786 | swap [%i5+0x034],%l6 ! %l6 = 0000000000000000 | |
22787 | ! %f22 = ffffffff 000000ff, %l2 = 0000000000000064 | |
22788 | ! Mem[0000000030001410] = ff000000ffff0000 | |
22789 | add %i0,0x010,%g1 | |
22790 | stda %f22,[%g1+%l2]ASI_PST8_SL ! Mem[0000000030001410] = ff000000ffffff00 | |
22791 | ! %f24 = 000000ff ff000000, Mem[0000000010141400] = 00ff0000 759a4764 | |
22792 | stda %f24,[%i5+%g0]0x88 ! Mem[0000000010141400] = 000000ff ff000000 | |
22793 | ! %l6 = 00000000, %l7 = 00000000, Mem[0000000010181400] = 0000ffff 64479a75 | |
22794 | std %l6,[%i6+%g0] ! Mem[0000000010181400] = 00000000 00000000 | |
22795 | ! Mem[0000000010101410] = ffffffff, %l6 = 0000000000000000 | |
22796 | swapa [%i4+%o5]0x80,%l6 ! %l6 = 00000000ffffffff | |
22797 | ! Starting 10 instruction Load Burst | |
22798 | ! Mem[0000000010181410] = 00000000 000000ff, %l0 = 00000000, %l1 = 00000000 | |
22799 | ldda [%i6+%o5]0x88,%l0 ! %l0 = 00000000000000ff 0000000000000000 | |
22800 | ||
22801 | p0_label_537: | |
22802 | ! Mem[0000000010101408] = ff000000, %l5 = 00000000ff000000 | |
22803 | lduwa [%i4+%o4]0x88,%l5 ! %l5 = 00000000ff000000 | |
22804 | ! Mem[0000000010101408] = ff000000, %l3 = 0000000000000000 | |
22805 | lduba [%i4+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
22806 | ! Mem[0000000010101438] = ff000000, %l5 = 00000000ff000000 | |
22807 | ldswa [%i4+0x038]%asi,%l5 ! %l5 = ffffffffff000000 | |
22808 | ! %l5 = ffffffffff000000, Mem[0000000010181400] = 00000000, %asi = 80 | |
22809 | stwa %l5,[%i6+0x000]%asi ! Mem[0000000010181400] = ff000000 | |
22810 | ! Mem[0000000010081408] = ff00ffff, %l1 = 0000000000000000 | |
22811 | ldswa [%i2+%o4]0x80,%l1 ! %l1 = ffffffffff00ffff | |
22812 | ! Mem[0000000030041408] = 00000000, %l1 = ffffffffff00ffff | |
22813 | ldswa [%i1+%o4]0x81,%l1 ! %l1 = 0000000000000000 | |
22814 | ! Mem[0000000010181408] = ffffffff, %l5 = ffffffffff000000 | |
22815 | lduba [%i6+%o4]0x88,%l5 ! %l5 = 00000000000000ff | |
22816 | ! Mem[00000000100c1408] = 000000ff, %l3 = 0000000000000000 | |
22817 | ldsha [%i3+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
22818 | ! Mem[0000000010081400] = 00000000, %l0 = 00000000000000ff | |
22819 | ldswa [%i2+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
22820 | ! Starting 10 instruction Store Burst | |
22821 | ! Mem[0000000030141400] = 00000000, %l1 = 0000000000000000 | |
22822 | ldstuba [%i5+%g0]0x81,%l1 ! %l1 = 00000000000000ff | |
22823 | ||
22824 | p0_label_538: | |
22825 | ! %l3 = 0000000000000000, Mem[00000000218000c0] = ffff4e2c, %asi = 80 | |
22826 | stba %l3,[%o3+0x0c0]%asi ! Mem[00000000218000c0] = 00ff4e2c | |
22827 | ! %f18 = 00000000 ffffff00, Mem[0000000030181400] = ffffff00 00000000 | |
22828 | stda %f18,[%i6+%g0]0x89 ! Mem[0000000030181400] = 00000000 ffffff00 | |
22829 | ! Mem[000000001008143b] = 00000000, %l6 = 00000000ffffffff | |
22830 | ldstub [%i2+0x03b],%l6 ! %l6 = 00000000000000ff | |
22831 | ! %f2 = 000000ff 64ffffff, %l2 = 0000000000000064 | |
22832 | ! Mem[0000000030181400] = 00ffffff00000000 | |
22833 | stda %f2,[%i6+%l2]ASI_PST32_SL ! Mem[0000000030181400] = 00ffffff00000000 | |
22834 | ! %l7 = 0000000000000000, Mem[0000000010101400] = 00000000 | |
22835 | stba %l7,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00000000 | |
22836 | ! %f6 = 000000ff 00ff005e, %l4 = 0000000000000000 | |
22837 | ! Mem[0000000010181430] = 0000000000000000 | |
22838 | add %i6,0x030,%g1 | |
22839 | stda %f6,[%g1+%l4]ASI_PST8_PL ! Mem[0000000010181430] = 0000000000000000 | |
22840 | ! %f0 = 0000ff00 64479a75, Mem[0000000030041410] = 00000000 00000000 | |
22841 | stda %f0 ,[%i1+%o5]0x81 ! Mem[0000000030041410] = 0000ff00 64479a75 | |
22842 | ! Mem[0000000030081408] = 64000000, %l7 = 0000000000000000 | |
22843 | ldstuba [%i2+%o4]0x81,%l7 ! %l7 = 00000064000000ff | |
22844 | ! %l6 = 00000000, %l7 = 00000064, Mem[0000000030101410] = 01000000 00000000 | |
22845 | stda %l6,[%i4+%o5]0x89 ! Mem[0000000030101410] = 00000000 00000064 | |
22846 | ! Starting 10 instruction Load Burst | |
22847 | ! Mem[00000000300c1410] = 0000ffff, %l3 = 0000000000000000 | |
22848 | ldswa [%i3+%o5]0x81,%l3 ! %l3 = 000000000000ffff | |
22849 | ||
22850 | p0_label_539: | |
22851 | ! Mem[00000000100c1430] = 000000000000ffff, %l7 = 0000000000000064 | |
22852 | ldx [%i3+0x030],%l7 ! %l7 = 000000000000ffff | |
22853 | ! Mem[0000000010141410] = 00000000, %f21 = 00000000 | |
22854 | lda [%i5+%o5]0x80,%f21 ! %f21 = 00000000 | |
22855 | ! Mem[0000000010101410] = 0000000000000000, %f8 = ffff0000 00000000 | |
22856 | ldda [%i4+%o5]0x80,%f8 ! %f8 = 00000000 00000000 | |
22857 | ! Mem[00000000100c1408] = 000000ff, %l0 = 0000000000000000 | |
22858 | lduba [%i3+%o4]0x80,%l0 ! %l0 = 0000000000000000 | |
22859 | ! Mem[0000000030181400] = 00ffffff 00000000, %l2 = 00000064, %l3 = 0000ffff | |
22860 | ldda [%i6+%g0]0x81,%l2 ! %l2 = 0000000000ffffff 0000000000000000 | |
22861 | ! Mem[0000000030001410] = 00ffffff 000000ff, %l4 = 00000000, %l5 = 000000ff | |
22862 | ldda [%i0+%o5]0x89,%l4 ! %l4 = 00000000000000ff 0000000000ffffff | |
22863 | ! Mem[0000000010041400] = 00000000, %l1 = 0000000000000000 | |
22864 | ldswa [%i1+%g0]0x80,%l1 ! %l1 = 0000000000000000 | |
22865 | ! Mem[0000000010181408] = ffffffff, %l4 = 00000000000000ff | |
22866 | ldsba [%i6+%o4]0x80,%l4 ! %l4 = ffffffffffffffff | |
22867 | ! Mem[0000000010101438] = ff00000000000000, %f12 = 0000ffff 00000000 | |
22868 | ldda [%i4+0x038]%asi,%f12 ! %f12 = ff000000 00000000 | |
22869 | ! Starting 10 instruction Store Burst | |
22870 | ! %l7 = 000000000000ffff, Mem[0000000010141400] = 000000ff | |
22871 | stha %l7,[%i5+%g0]0x80 ! Mem[0000000010141400] = ffff00ff | |
22872 | ||
22873 | p0_label_540: | |
22874 | ! %f24 = 000000ff ff000000, Mem[0000000030001400] = 00000000 000000ff | |
22875 | stda %f24,[%i0+%g0]0x81 ! Mem[0000000030001400] = 000000ff ff000000 | |
22876 | ! %l0 = 00000000, %l1 = 00000000, Mem[0000000010081400] = 00000000 ffffffff | |
22877 | std %l0,[%i2+%g0] ! Mem[0000000010081400] = 00000000 00000000 | |
22878 | ! %l3 = 0000000000000000, Mem[0000000030181410] = ffffffff00000000 | |
22879 | stxa %l3,[%i6+%o5]0x89 ! Mem[0000000030181410] = 0000000000000000 | |
22880 | ! %f6 = 000000ff 00ff005e, Mem[00000000100c1408] = ff000000 ff000000 | |
22881 | stda %f6 ,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 000000ff 00ff005e | |
22882 | ! %l2 = 00ffffff, %l3 = 00000000, Mem[0000000030101408] = 00000000 00000000 | |
22883 | stda %l2,[%i4+%o4]0x89 ! Mem[0000000030101408] = 00ffffff 00000000 | |
22884 | ! %l0 = 0000000000000000, Mem[0000000010181404] = 00000000, %asi = 80 | |
22885 | stha %l0,[%i6+0x004]%asi ! Mem[0000000010181404] = 00000000 | |
22886 | ! %f2 = 000000ff, Mem[0000000010041408] = 000000ff | |
22887 | sta %f2 ,[%i1+%o4]0x88 ! Mem[0000000010041408] = 000000ff | |
22888 | ! %l2 = 0000000000ffffff, Mem[0000000030041400] = 0000000000000000 | |
22889 | stxa %l2,[%i1+%g0]0x81 ! Mem[0000000030041400] = 0000000000ffffff | |
22890 | ! Mem[0000000010181410] = 000000ff, %l1 = 0000000000000000 | |
22891 | swapa [%i6+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
22892 | ! Starting 10 instruction Load Burst | |
22893 | ! Mem[0000000010141428] = 00000000, %l5 = 0000000000ffffff | |
22894 | lduba [%i5+0x028]%asi,%l5 ! %l5 = 0000000000000000 | |
22895 | ||
22896 | ! Check Point 108 for processor 0 | |
22897 | ||
22898 | set p0_check_pt_data_108,%g4 | |
22899 | rd %ccr,%g5 ! %g5 = 44 | |
22900 | ldx [%g4+0x08],%g2 | |
22901 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
22902 | bne %xcc,p0_reg_check_fail0 | |
22903 | mov 0xee0,%g1 | |
22904 | ldx [%g4+0x10],%g2 | |
22905 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
22906 | bne %xcc,p0_reg_check_fail1 | |
22907 | mov 0xee1,%g1 | |
22908 | ldx [%g4+0x18],%g2 | |
22909 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
22910 | bne %xcc,p0_reg_check_fail3 | |
22911 | mov 0xee3,%g1 | |
22912 | ldx [%g4+0x20],%g2 | |
22913 | cmp %l4,%g2 ! %l4 = ffffffffffffffff | |
22914 | bne %xcc,p0_reg_check_fail4 | |
22915 | mov 0xee4,%g1 | |
22916 | ldx [%g4+0x28],%g2 | |
22917 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
22918 | bne %xcc,p0_reg_check_fail5 | |
22919 | mov 0xee5,%g1 | |
22920 | ldx [%g4+0x30],%g2 | |
22921 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
22922 | bne %xcc,p0_reg_check_fail6 | |
22923 | mov 0xee6,%g1 | |
22924 | ldx [%g4+0x38],%g2 | |
22925 | cmp %l7,%g2 ! %l7 = 000000000000ffff | |
22926 | bne %xcc,p0_reg_check_fail7 | |
22927 | mov 0xee7,%g1 | |
22928 | ldx [%g4+0x40],%g3 | |
22929 | std %f0,[%g4] | |
22930 | ldx [%g4],%g2 | |
22931 | cmp %g3,%g2 ! %f0 = 0000ff00 64479a75 | |
22932 | bne %xcc,p0_freg_check_fail | |
22933 | mov 0xf00,%g1 | |
22934 | ldx [%g4+0x48],%g3 | |
22935 | std %f2,[%g4] | |
22936 | ldx [%g4],%g2 | |
22937 | cmp %g3,%g2 ! %f2 = 000000ff 64ffffff | |
22938 | bne %xcc,p0_freg_check_fail | |
22939 | mov 0xf02,%g1 | |
22940 | ldx [%g4+0x50],%g3 | |
22941 | std %f4,[%g4] | |
22942 | ldx [%g4],%g2 | |
22943 | cmp %g3,%g2 ! %f4 = 00000000 8ab6ff9c | |
22944 | bne %xcc,p0_freg_check_fail | |
22945 | mov 0xf04,%g1 | |
22946 | ldx [%g4+0x58],%g3 | |
22947 | std %f8,[%g4] | |
22948 | ldx [%g4],%g2 | |
22949 | cmp %g3,%g2 ! %f8 = 00000000 00000000 | |
22950 | bne %xcc,p0_freg_check_fail | |
22951 | mov 0xf08,%g1 | |
22952 | ldx [%g4+0x60],%g3 | |
22953 | std %f12,[%g4] | |
22954 | ldx [%g4],%g2 | |
22955 | cmp %g3,%g2 ! %f12 = ff000000 00000000 | |
22956 | bne %xcc,p0_freg_check_fail | |
22957 | mov 0xf12,%g1 | |
22958 | ldx [%g4+0x68],%g3 | |
22959 | std %f20,[%g4] | |
22960 | ldx [%g4],%g2 | |
22961 | cmp %g3,%g2 ! %f20 = 00000000 00000000 | |
22962 | bne %xcc,p0_freg_check_fail | |
22963 | mov 0xf20,%g1 | |
22964 | ||
22965 | ! Check Point 108 completed | |
22966 | ||
22967 | ||
22968 | p0_label_541: | |
22969 | ! Mem[00000000100c1410] = 000000ff, %l1 = 00000000000000ff | |
22970 | lduha [%i3+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
22971 | ! Mem[0000000010081408] = ff00ffff, %f7 = 00ff005e | |
22972 | lda [%i2+%o4]0x80,%f7 ! %f7 = ff00ffff | |
22973 | ! Mem[0000000030141400] = 00000000000000ff, %l1 = 00000000000000ff | |
22974 | ldxa [%i5+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
22975 | ! Mem[0000000030141400] = 000000ff, %l0 = 0000000000000000 | |
22976 | lduwa [%i5+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
22977 | ! Mem[0000000010041420] = 6c6b000339ac00ff, %l5 = 0000000000000000 | |
22978 | ldx [%i1+0x020],%l5 ! %l5 = 6c6b000339ac00ff | |
22979 | ! Mem[0000000010081410] = ff000000, %l1 = 00000000000000ff | |
22980 | ldsb [%i2+%o5],%l1 ! %l1 = ffffffffffffffff | |
22981 | ! Mem[0000000030101408] = ffffff00, %l1 = ffffffffffffffff | |
22982 | lduba [%i4+%o4]0x81,%l1 ! %l1 = 00000000000000ff | |
22983 | ! Mem[000000001004143c] = 0000005e, %l0 = 00000000000000ff | |
22984 | ldsh [%i1+0x03e],%l0 ! %l0 = 000000000000005e | |
22985 | ! Mem[0000000030001410] = ff000000, %l2 = 0000000000ffffff | |
22986 | ldswa [%i0+%o5]0x81,%l2 ! %l2 = ffffffffff000000 | |
22987 | ! Starting 10 instruction Store Burst | |
22988 | ! Mem[0000000010041400] = 00000000, %l2 = ffffffffff000000 | |
22989 | ldstuba [%i1+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
22990 | ||
22991 | p0_label_542: | |
22992 | ! Mem[0000000030041410] = 00ff0000, %l1 = 00000000000000ff | |
22993 | swapa [%i1+%o5]0x89,%l1 ! %l1 = 0000000000ff0000 | |
22994 | ! %l7 = 000000000000ffff, Mem[0000000010141408] = 000000ff | |
22995 | stba %l7,[%i5+%o4]0x80 ! Mem[0000000010141408] = ff0000ff | |
22996 | ! Mem[0000000030081408] = 000000ff, %l6 = 0000000000000000 | |
22997 | ldstuba [%i2+%o4]0x89,%l6 ! %l6 = 000000ff000000ff | |
22998 | ! Mem[0000000010001420] = ff000000, %l4 = ffffffffffffffff, %asi = 80 | |
22999 | swapa [%i0+0x020]%asi,%l4 ! %l4 = 00000000ff000000 | |
23000 | ! %l5 = 6c6b000339ac00ff, Mem[0000000030141400] = 000000ff | |
23001 | stha %l5,[%i5+%g0]0x89 ! Mem[0000000030141400] = 000000ff | |
23002 | ! %f4 = 00000000 8ab6ff9c, Mem[0000000010041408] = 000000ff ffffffff | |
23003 | stda %f4 ,[%i1+%o4]0x88 ! Mem[0000000010041408] = 00000000 8ab6ff9c | |
23004 | ! %f0 = 0000ff00 64479a75, %l6 = 00000000000000ff | |
23005 | ! Mem[0000000010081400] = 0000000000000000 | |
23006 | stda %f0,[%i2+%l6]ASI_PST16_P ! Mem[0000000010081400] = 0000ff0064479a75 | |
23007 | ! %f26 = c78091bb 759a4764, Mem[0000000010081410] = ff000000 ffffffff | |
23008 | std %f26,[%i2+%o5] ! Mem[0000000010081410] = c78091bb 759a4764 | |
23009 | ! Mem[0000000010181408] = ffffffff, %l3 = 0000000000000000 | |
23010 | ldstub [%i6+%o4],%l3 ! %l3 = 000000ff000000ff | |
23011 | ! Starting 10 instruction Load Burst | |
23012 | ! Mem[00000000100c1410] = ff000000, %l4 = 00000000ff000000 | |
23013 | ldswa [%i3+%o5]0x80,%l4 ! %l4 = ffffffffff000000 | |
23014 | ||
23015 | p0_label_543: | |
23016 | ! Mem[0000000010081400] = 00ff0000, %l0 = 000000000000005e | |
23017 | lduba [%i2+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
23018 | ! Mem[0000000030041400] = 00000000, %l5 = 6c6b000339ac00ff | |
23019 | ldsha [%i1+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
23020 | ! Mem[0000000030181400] = ffffff00, %l2 = 0000000000000000 | |
23021 | lduha [%i6+%g0]0x89,%l2 ! %l2 = 000000000000ff00 | |
23022 | ! Mem[0000000030141408] = ff000000, %l7 = 000000000000ffff | |
23023 | ldsha [%i5+%o4]0x81,%l7 ! %l7 = ffffffffffffff00 | |
23024 | ! Mem[00000000100c1408] = 00ff005e, %l6 = 00000000000000ff | |
23025 | ldsba [%i3+%o4]0x88,%l6 ! %l6 = 000000000000005e | |
23026 | ! Mem[0000000010141410] = 9cffb68a00000000, %l7 = ffffffffffffff00 | |
23027 | ldxa [%i5+%o5]0x88,%l7 ! %l7 = 9cffb68a00000000 | |
23028 | ! Mem[0000000030081410] = ff000000 00000000, %l0 = 00000000, %l1 = 00ff0000 | |
23029 | ldda [%i2+%o5]0x81,%l0 ! %l0 = 00000000ff000000 0000000000000000 | |
23030 | ! Mem[00000000211c0000] = fffffe0c, %l6 = 000000000000005e | |
23031 | lduha [%o2+0x000]%asi,%l6 ! %l6 = 000000000000ffff | |
23032 | ! Mem[0000000030081410] = ff000000, %l5 = 0000000000000000 | |
23033 | ldsba [%i2+%o5]0x81,%l5 ! %l5 = ffffffffffffffff | |
23034 | ! Starting 10 instruction Store Burst | |
23035 | ! Mem[000000001004142b] = 00000000, %l4 = ffffffffff000000 | |
23036 | ldstub [%i1+0x02b],%l4 ! %l4 = 00000000000000ff | |
23037 | ||
23038 | p0_label_544: | |
23039 | ! %f10 = 00000000 00000000, %l6 = 000000000000ffff | |
23040 | ! Mem[0000000010081418] = ffffffff00000003 | |
23041 | add %i2,0x018,%g1 | |
23042 | stda %f10,[%g1+%l6]ASI_PST32_P ! Mem[0000000010081418] = 0000000000000000 | |
23043 | ! Mem[0000000010141408] = ff0000ff, %l4 = 0000000000000000 | |
23044 | ldstuba [%i5+%o4]0x80,%l4 ! %l4 = 000000ff000000ff | |
23045 | ! Mem[00000000100c1400] = 00000000, %l7 = 9cffb68a00000000 | |
23046 | swapa [%i3+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
23047 | ! %l4 = 00000000000000ff, Mem[0000000030041410] = ff000000 | |
23048 | stwa %l4,[%i1+%o5]0x81 ! Mem[0000000030041410] = 000000ff | |
23049 | ! %l6 = 0000ffff, %l7 = 00000000, Mem[0000000010101408] = ff000000 00000000 | |
23050 | stda %l6,[%i4+%o4]0x88 ! Mem[0000000010101408] = 0000ffff 00000000 | |
23051 | ! Mem[0000000010041410] = 00000000, %l6 = 000000000000ffff | |
23052 | ldstuba [%i1+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
23053 | ! %l5 = ffffffffffffffff, Mem[00000000300c1410] = 0000ffff | |
23054 | stwa %l5,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ffffffff | |
23055 | ! %l6 = 0000000000000000, Mem[0000000010041400] = 000000ff | |
23056 | stha %l6,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 | |
23057 | ! %l3 = 00000000000000ff, Mem[00000000100c1408] = 5e00ff00ff000000 | |
23058 | stxa %l3,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00000000000000ff | |
23059 | ! Starting 10 instruction Load Burst | |
23060 | ! Mem[000000001004141c] = ffffffff, %l5 = ffffffffffffffff | |
23061 | ldsb [%i1+0x01f],%l5 ! %l5 = ffffffffffffffff | |
23062 | ||
23063 | p0_label_545: | |
23064 | ! Mem[0000000010181434] = 00000000, %l1 = 0000000000000000 | |
23065 | ldswa [%i6+0x034]%asi,%l1 ! %l1 = 0000000000000000 | |
23066 | ! Mem[0000000030081400] = ff000000, %l4 = 00000000000000ff | |
23067 | ldswa [%i2+%g0]0x81,%l4 ! %l4 = ffffffffff000000 | |
23068 | ! Mem[00000000300c1410] = ffffffff, %l4 = ffffffffff000000 | |
23069 | ldsba [%i3+%o5]0x89,%l4 ! %l4 = ffffffffffffffff | |
23070 | ! Mem[0000000030041408] = 000000008ab60000, %f22 = ffffffff 000000ff | |
23071 | ldda [%i1+%o4]0x81,%f22 ! %f22 = 00000000 8ab60000 | |
23072 | ! Mem[0000000030081408] = ff000000, %l6 = 0000000000000000 | |
23073 | lduwa [%i2+%o4]0x81,%l6 ! %l6 = 00000000ff000000 | |
23074 | ! Mem[000000001008140c] = 00000000, %f18 = 00000000 | |
23075 | lda [%i2+0x00c]%asi,%f18 ! %f18 = 00000000 | |
23076 | ! Mem[0000000010101410] = 00000000 00000000, %l6 = ff000000, %l7 = 00000000 | |
23077 | ldda [%i4+%o5]0x88,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
23078 | ! Mem[00000000300c1400] = ffff000000000000, %f2 = 000000ff 64ffffff | |
23079 | ldda [%i3+%g0]0x89,%f2 ! %f2 = ffff0000 00000000 | |
23080 | ! Mem[0000000010181408] = ffffffff, %l0 = 00000000ff000000 | |
23081 | ldsha [%i6+%o4]0x88,%l0 ! %l0 = ffffffffffffffff | |
23082 | ! Starting 10 instruction Store Burst | |
23083 | ! %f30 = ff000000 ffffffff, Mem[0000000010181428] = cd1094c4 e46dee46 | |
23084 | std %f30,[%i6+0x028] ! Mem[0000000010181428] = ff000000 ffffffff | |
23085 | ||
23086 | ! Check Point 109 for processor 0 | |
23087 | ||
23088 | set p0_check_pt_data_109,%g4 | |
23089 | rd %ccr,%g5 ! %g5 = 44 | |
23090 | ldx [%g4+0x08],%g2 | |
23091 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
23092 | bne %xcc,p0_reg_check_fail0 | |
23093 | mov 0xee0,%g1 | |
23094 | ldx [%g4+0x10],%g2 | |
23095 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
23096 | bne %xcc,p0_reg_check_fail1 | |
23097 | mov 0xee1,%g1 | |
23098 | ldx [%g4+0x18],%g2 | |
23099 | cmp %l2,%g2 ! %l2 = 000000000000ff00 | |
23100 | bne %xcc,p0_reg_check_fail2 | |
23101 | mov 0xee2,%g1 | |
23102 | ldx [%g4+0x20],%g2 | |
23103 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
23104 | bne %xcc,p0_reg_check_fail3 | |
23105 | mov 0xee3,%g1 | |
23106 | ldx [%g4+0x28],%g2 | |
23107 | cmp %l4,%g2 ! %l4 = ffffffffffffffff | |
23108 | bne %xcc,p0_reg_check_fail4 | |
23109 | mov 0xee4,%g1 | |
23110 | ldx [%g4+0x30],%g2 | |
23111 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
23112 | bne %xcc,p0_reg_check_fail5 | |
23113 | mov 0xee5,%g1 | |
23114 | ldx [%g4+0x38],%g2 | |
23115 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
23116 | bne %xcc,p0_reg_check_fail6 | |
23117 | mov 0xee6,%g1 | |
23118 | ldx [%g4+0x40],%g2 | |
23119 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
23120 | bne %xcc,p0_reg_check_fail7 | |
23121 | mov 0xee7,%g1 | |
23122 | ldx [%g4+0x48],%g3 | |
23123 | std %f0,[%g4] | |
23124 | ldx [%g4],%g2 | |
23125 | cmp %g3,%g2 ! %f0 = 0000ff00 64479a75 | |
23126 | bne %xcc,p0_freg_check_fail | |
23127 | mov 0xf00,%g1 | |
23128 | ldx [%g4+0x50],%g3 | |
23129 | std %f2,[%g4] | |
23130 | ldx [%g4],%g2 | |
23131 | cmp %g3,%g2 ! %f2 = ffff0000 00000000 | |
23132 | bne %xcc,p0_freg_check_fail | |
23133 | mov 0xf02,%g1 | |
23134 | ldx [%g4+0x58],%g3 | |
23135 | std %f6,[%g4] | |
23136 | ldx [%g4],%g2 | |
23137 | cmp %g3,%g2 ! %f6 = 000000ff ff00ffff | |
23138 | bne %xcc,p0_freg_check_fail | |
23139 | mov 0xf06,%g1 | |
23140 | ldx [%g4+0x60],%g3 | |
23141 | std %f18,[%g4] | |
23142 | ldx [%g4],%g2 | |
23143 | cmp %g3,%g2 ! %f18 = 00000000 ffffff00 | |
23144 | bne %xcc,p0_freg_check_fail | |
23145 | mov 0xf18,%g1 | |
23146 | ldx [%g4+0x68],%g3 | |
23147 | std %f22,[%g4] | |
23148 | ldx [%g4],%g2 | |
23149 | cmp %g3,%g2 ! %f22 = 00000000 8ab60000 | |
23150 | bne %xcc,p0_freg_check_fail | |
23151 | mov 0xf22,%g1 | |
23152 | ||
23153 | ! Check Point 109 completed | |
23154 | ||
23155 | ||
23156 | p0_label_546: | |
23157 | ! Mem[0000000030141400] = 000000ff, %l5 = ffffffffffffffff | |
23158 | ldstuba [%i5+%g0]0x89,%l5 ! %l5 = 000000ff000000ff | |
23159 | ! %f16 = ffff0000, Mem[0000000010081408] = ffff00ff | |
23160 | sta %f16,[%i2+%o4]0x88 ! Mem[0000000010081408] = ffff0000 | |
23161 | ! %l4 = ffffffffffffffff, Mem[0000000010001438] = ff5e0000ffffffff | |
23162 | stx %l4,[%i0+0x038] ! Mem[0000000010001438] = ffffffffffffffff | |
23163 | ! %l3 = 00000000000000ff, Mem[0000000030141408] = ff000000 | |
23164 | stha %l3,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00ff0000 | |
23165 | ! Mem[0000000021800100] = ffff39e7, %l0 = ffffffffffffffff | |
23166 | ldstub [%o3+0x100],%l0 ! %l0 = 000000ff000000ff | |
23167 | ! %l4 = ffffffffffffffff, Mem[0000000010101400] = 0000000000000000 | |
23168 | stxa %l4,[%i4+%g0]0x88 ! Mem[0000000010101400] = ffffffffffffffff | |
23169 | ! Mem[000000001018143c] = 00000000, %l1 = 0000000000000000 | |
23170 | ldstuba [%i6+0x03c]%asi,%l1 ! %l1 = 00000000000000ff | |
23171 | ! Mem[00000000218000c1] = 00ff4e2c, %l4 = ffffffffffffffff | |
23172 | ldstuba [%o3+0x0c1]%asi,%l4 ! %l4 = 000000ff000000ff | |
23173 | ! %f0 = 0000ff00 64479a75, %l5 = 00000000000000ff | |
23174 | ! Mem[0000000010001420] = ffffffff000000ff | |
23175 | add %i0,0x020,%g1 | |
23176 | stda %f0,[%g1+%l5]ASI_PST16_P ! Mem[0000000010001420] = 0000ff0064479a75 | |
23177 | ! Starting 10 instruction Load Burst | |
23178 | ! Mem[00000000300c1410] = ffffffff, %l3 = 00000000000000ff | |
23179 | ldsba [%i3+%o5]0x81,%l3 ! %l3 = ffffffffffffffff | |
23180 | ||
23181 | p0_label_547: | |
23182 | ! Mem[0000000010041400] = 000000ff 00000000, %l6 = 00000000, %l7 = 00000000 | |
23183 | ldda [%i1+%g0]0x88,%l6 ! %l6 = 0000000000000000 00000000000000ff | |
23184 | ! Mem[0000000010001400] = 00000000000000ff, %f2 = ffff0000 00000000 | |
23185 | ldda [%i0+%g0]0x80,%f2 ! %f2 = 00000000 000000ff | |
23186 | ! Mem[0000000010141400] = ffff00ff, %l6 = 0000000000000000 | |
23187 | ldsba [%i5+%g0]0x80,%l6 ! %l6 = ffffffffffffffff | |
23188 | ! Mem[0000000030181410] = 00000000, %l2 = 000000000000ff00 | |
23189 | ldsba [%i6+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
23190 | ! Mem[0000000010001410] = 00000000, %l1 = 0000000000000000 | |
23191 | lduha [%i0+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
23192 | ! Mem[0000000010141430] = 0000ffff, %l2 = 0000000000000000 | |
23193 | ldsba [%i5+0x033]%asi,%l2 ! %l2 = ffffffffffffffff | |
23194 | ! Mem[00000000211c0000] = fffffe0c, %l1 = 0000000000000000 | |
23195 | ldub [%o2+0x001],%l1 ! %l1 = 00000000000000ff | |
23196 | ! Mem[0000000030101410] = 00000000, %l7 = 00000000000000ff | |
23197 | ldsba [%i4+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
23198 | ! Mem[0000000010181408] = ffffffff, %l7 = 0000000000000000 | |
23199 | ldswa [%i6+%o4]0x88,%l7 ! %l7 = ffffffffffffffff | |
23200 | ! Starting 10 instruction Store Burst | |
23201 | ! %l2 = ffffffffffffffff, Mem[0000000030141400] = ff000000 | |
23202 | stwa %l2,[%i5+%g0]0x81 ! Mem[0000000030141400] = ffffffff | |
23203 | ||
23204 | p0_label_548: | |
23205 | ! Mem[0000000010081430] = 00000000, %l7 = ffffffff, %l2 = ffffffff | |
23206 | add %i2,0x30,%g1 | |
23207 | casa [%g1]0x80,%l7,%l2 ! %l2 = 0000000000000000 | |
23208 | ! %f12 = ff000000, Mem[0000000010141410] = 00000000 | |
23209 | sta %f12,[%i5+0x010]%asi ! Mem[0000000010141410] = ff000000 | |
23210 | ! %l7 = ffffffffffffffff, Mem[0000000010181400] = ff00000000000000 | |
23211 | stxa %l7,[%i6+%g0]0x80 ! Mem[0000000010181400] = ffffffffffffffff | |
23212 | ! %l1 = 00000000000000ff, Mem[0000000030001408] = 000000ffffffffff | |
23213 | stxa %l1,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000000000ff | |
23214 | ! %f7 = ff00ffff, Mem[0000000030101400] = 000000ff | |
23215 | sta %f7 ,[%i4+%g0]0x81 ! Mem[0000000030101400] = ff00ffff | |
23216 | ! Mem[0000000010081408] = ffff0000, %l6 = ffffffffffffffff | |
23217 | swapa [%i2+%o4]0x88,%l6 ! %l6 = 00000000ffff0000 | |
23218 | ! %l1 = 00000000000000ff, Mem[0000000010081400] = 0000ff0064479a75 | |
23219 | stxa %l1,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000000000ff | |
23220 | ! %l4 = 00000000000000ff, Mem[0000000030101400] = ff00ffff00000000 | |
23221 | stxa %l4,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000000000ff | |
23222 | ! %l3 = ffffffffffffffff, Mem[0000000030041410] = ff000000 | |
23223 | stwa %l3,[%i1+%o5]0x89 ! Mem[0000000030041410] = ffffffff | |
23224 | ! Starting 10 instruction Load Burst | |
23225 | ! Mem[00000000100c1400] = 00000000, %l5 = 00000000000000ff | |
23226 | ldsba [%i3+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
23227 | ||
23228 | p0_label_549: | |
23229 | ! Mem[0000000010081400] = 00000000 000000ff, %l4 = 000000ff, %l5 = 00000000 | |
23230 | ldda [%i2+%g0]0x80,%l4 ! %l4 = 0000000000000000 00000000000000ff | |
23231 | ! Mem[0000000010101410] = 00000000, %l6 = 00000000ffff0000 | |
23232 | lduwa [%i4+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
23233 | ! Mem[00000000100c1410] = ff000000, %f27 = 759a4764 | |
23234 | lda [%i3+%o5]0x80,%f27 ! %f27 = ff000000 | |
23235 | ! Mem[0000000030101400] = 00000000, %l2 = 0000000000000000 | |
23236 | lduwa [%i4+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
23237 | ! Mem[0000000010181408] = 5e27ffffffffffff, %l6 = 0000000000000000 | |
23238 | ldxa [%i6+%o4]0x88,%l6 ! %l6 = 5e27ffffffffffff | |
23239 | ! Mem[00000000100c1420] = ffffffffffff275e, %f6 = 000000ff ff00ffff | |
23240 | ldd [%i3+0x020],%f6 ! %f6 = ffffffff ffff275e | |
23241 | ! Mem[0000000010041408] = 9cffb68a, %l6 = 5e27ffffffffffff | |
23242 | ldsba [%i1+%o4]0x80,%l6 ! %l6 = ffffffffffffff9c | |
23243 | ! Mem[0000000010141408] = ffffff64ff0000ff, %f10 = 00000000 00000000 | |
23244 | ldda [%i5+%o4]0x88,%f10 ! %f10 = ffffff64 ff0000ff | |
23245 | ! Mem[00000000211c0000] = fffffe0c, %l7 = ffffffffffffffff | |
23246 | ldsb [%o2+0x001],%l7 ! %l7 = ffffffffffffffff | |
23247 | ! Starting 10 instruction Store Burst | |
23248 | ! %f14 = ffff275e ffffffff, %l2 = 0000000000000000 | |
23249 | ! Mem[0000000030141420] = ff00000000000000 | |
23250 | add %i5,0x020,%g1 | |
23251 | stda %f14,[%g1+%l2]ASI_PST16_S ! Mem[0000000030141420] = ff00000000000000 | |
23252 | ||
23253 | p0_label_550: | |
23254 | ! Mem[0000000010001428] = 9ce0b68aa3ffade0, %l6 = ffffffffffffff9c, %l6 = ffffffffffffff9c | |
23255 | add %i0,0x28,%g1 | |
23256 | casxa [%g1]0x80,%l6,%l6 ! %l6 = 9ce0b68aa3ffade0 | |
23257 | ! %f22 = 00000000 8ab60000, Mem[00000000100c1400] = 00000000 00005700 | |
23258 | stda %f22,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 00000000 8ab60000 | |
23259 | ! %f0 = 0000ff00 64479a75 00000000 000000ff | |
23260 | ! %f4 = 00000000 8ab6ff9c ffffffff ffff275e | |
23261 | ! %f8 = 00000000 00000000 ffffff64 ff0000ff | |
23262 | ! %f12 = ff000000 00000000 ffff275e ffffffff | |
23263 | stda %f0,[%i3]ASI_BLK_AIUPL ! Block Store to 00000000100c1400 | |
23264 | ! %l7 = ffffffffffffffff, Mem[00000000211c0000] = fffffe0c, %asi = 80 | |
23265 | stha %l7,[%o2+0x000]%asi ! Mem[00000000211c0000] = fffffe0c | |
23266 | ! %l2 = 0000000000000000, Mem[0000000030141400] = ffffffff | |
23267 | stba %l2,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00ffffff | |
23268 | ! Mem[0000000010001418] = 5e000000, %l5 = 00000000000000ff | |
23269 | swap [%i0+0x018],%l5 ! %l5 = 000000005e000000 | |
23270 | ! Mem[0000000010001400] = 00000000, %l0 = 00000000000000ff | |
23271 | ldstuba [%i0+%g0]0x80,%l0 ! %l0 = 00000000000000ff | |
23272 | ! %l4 = 0000000000000000, Mem[0000000030081408] = 00000000000000ff | |
23273 | stxa %l4,[%i2+%o4]0x89 ! Mem[0000000030081408] = 0000000000000000 | |
23274 | ! %l3 = ffffffffffffffff, Mem[000000001000141d] = ffff0000 | |
23275 | stb %l3,[%i0+0x01d] ! Mem[000000001000141c] = ffff0000 | |
23276 | ! Starting 10 instruction Load Burst | |
23277 | ! Mem[0000000030041400] = 00000000, %l1 = 00000000000000ff | |
23278 | ldswa [%i1+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
23279 | ||
23280 | ! Check Point 110 for processor 0 | |
23281 | ||
23282 | set p0_check_pt_data_110,%g4 | |
23283 | rd %ccr,%g5 ! %g5 = 44 | |
23284 | ldx [%g4+0x08],%g2 | |
23285 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
23286 | bne %xcc,p0_reg_check_fail0 | |
23287 | mov 0xee0,%g1 | |
23288 | ldx [%g4+0x10],%g2 | |
23289 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
23290 | bne %xcc,p0_reg_check_fail1 | |
23291 | mov 0xee1,%g1 | |
23292 | ldx [%g4+0x18],%g2 | |
23293 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
23294 | bne %xcc,p0_reg_check_fail2 | |
23295 | mov 0xee2,%g1 | |
23296 | ldx [%g4+0x20],%g2 | |
23297 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
23298 | bne %xcc,p0_reg_check_fail3 | |
23299 | mov 0xee3,%g1 | |
23300 | ldx [%g4+0x28],%g2 | |
23301 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
23302 | bne %xcc,p0_reg_check_fail4 | |
23303 | mov 0xee4,%g1 | |
23304 | ldx [%g4+0x30],%g2 | |
23305 | cmp %l5,%g2 ! %l5 = 000000005e000000 | |
23306 | bne %xcc,p0_reg_check_fail5 | |
23307 | mov 0xee5,%g1 | |
23308 | ldx [%g4+0x38],%g2 | |
23309 | cmp %l6,%g2 ! %l6 = 9ce0b68aa3ffade0 | |
23310 | bne %xcc,p0_reg_check_fail6 | |
23311 | mov 0xee6,%g1 | |
23312 | ldx [%g4+0x40],%g2 | |
23313 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
23314 | bne %xcc,p0_reg_check_fail7 | |
23315 | mov 0xee7,%g1 | |
23316 | ldx [%g4+0x48],%g3 | |
23317 | std %f2,[%g4] | |
23318 | ldx [%g4],%g2 | |
23319 | cmp %g3,%g2 ! %f2 = 00000000 000000ff | |
23320 | bne %xcc,p0_freg_check_fail | |
23321 | mov 0xf02,%g1 | |
23322 | ldx [%g4+0x50],%g3 | |
23323 | std %f4,[%g4] | |
23324 | ldx [%g4],%g2 | |
23325 | cmp %g3,%g2 ! %f4 = 00000000 8ab6ff9c | |
23326 | bne %xcc,p0_freg_check_fail | |
23327 | mov 0xf04,%g1 | |
23328 | ldx [%g4+0x58],%g3 | |
23329 | std %f6,[%g4] | |
23330 | ldx [%g4],%g2 | |
23331 | cmp %g3,%g2 ! %f6 = ffffffff ffff275e | |
23332 | bne %xcc,p0_freg_check_fail | |
23333 | mov 0xf06,%g1 | |
23334 | ldx [%g4+0x60],%g3 | |
23335 | std %f10,[%g4] | |
23336 | ldx [%g4],%g2 | |
23337 | cmp %g3,%g2 ! %f10 = ffffff64 ff0000ff | |
23338 | bne %xcc,p0_freg_check_fail | |
23339 | mov 0xf10,%g1 | |
23340 | ldx [%g4+0x68],%g3 | |
23341 | std %f26,[%g4] | |
23342 | ldx [%g4],%g2 | |
23343 | cmp %g3,%g2 ! %f26 = c78091bb ff000000 | |
23344 | bne %xcc,p0_freg_check_fail | |
23345 | mov 0xf26,%g1 | |
23346 | ||
23347 | ! Check Point 110 completed | |
23348 | ||
23349 | ||
23350 | p0_label_551: | |
23351 | ! Mem[00000000300c1410] = ffffffff 00000000, %l6 = a3ffade0, %l7 = ffffffff | |
23352 | ldda [%i3+%o5]0x81,%l6 ! %l6 = 00000000ffffffff 0000000000000000 | |
23353 | ! Mem[0000000010001428] = 9ce0b68a, %l7 = 0000000000000000 | |
23354 | ldsh [%i0+0x02a],%l7 ! %l7 = ffffffffffffb68a | |
23355 | ! Mem[0000000010141400] = 000000ff ff00ffff, %l6 = ffffffff, %l7 = ffffb68a | |
23356 | ldda [%i5+%g0]0x88,%l6 ! %l6 = 00000000ff00ffff 00000000000000ff | |
23357 | ! Mem[0000000030181400] = ffffff00, %l0 = 0000000000000000 | |
23358 | lduba [%i6+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
23359 | ! Mem[0000000010181408] = ffffffff, %l5 = 000000005e000000 | |
23360 | lduba [%i6+%o4]0x80,%l5 ! %l5 = 00000000000000ff | |
23361 | ! Mem[0000000030041408] = 00000000, %l5 = 00000000000000ff | |
23362 | lduba [%i1+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
23363 | ! Mem[0000000021800000] = 00009a65, %l2 = 0000000000000000 | |
23364 | ldsb [%o3+%g0],%l2 ! %l2 = 0000000000000000 | |
23365 | membar #Sync ! Added by membar checker (106) | |
23366 | ! Mem[00000000100c1400] = 64479a75, %l5 = 0000000000000000 | |
23367 | ldsha [%i3+%g0]0x88,%l5 ! %l5 = ffffffffffff9a75 | |
23368 | ! Mem[0000000030141400] = 00ffffff, %l0 = 0000000000000000 | |
23369 | ldsha [%i5+%g0]0x81,%l0 ! %l0 = 00000000000000ff | |
23370 | ! Starting 10 instruction Store Burst | |
23371 | ! Mem[0000000010001410] = 00000000, %l0 = 00000000000000ff | |
23372 | swapa [%i0+%o5]0x88,%l0 ! %l0 = 0000000000000000 | |
23373 | ||
23374 | p0_label_552: | |
23375 | ! %l3 = ffffffffffffffff, Mem[0000000030081408] = 00000000 | |
23376 | stwa %l3,[%i2+%o4]0x81 ! Mem[0000000030081408] = ffffffff | |
23377 | ! %f6 = ffffffff ffff275e, Mem[0000000010181408] = ffffffff ffff275e | |
23378 | stda %f6 ,[%i6+%o4]0x80 ! Mem[0000000010181408] = ffffffff ffff275e | |
23379 | ! Mem[0000000020800040] = 00009ffa, %l3 = ffffffffffffffff | |
23380 | ldstuba [%o1+0x040]%asi,%l3 ! %l3 = 00000000000000ff | |
23381 | ! Mem[0000000010001408] = 00000000, %l2 = 0000000000000000 | |
23382 | swapa [%i0+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
23383 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010041408] = 8ab6ff9c 00000000 | |
23384 | stda %l2,[%i1+%o4]0x88 ! Mem[0000000010041408] = 00000000 00000000 | |
23385 | ! Mem[00000000100c141c] = ffffffff, %l4 = 0000000000000000, %asi = 80 | |
23386 | swapa [%i3+0x01c]%asi,%l4 ! %l4 = 00000000ffffffff | |
23387 | ! Mem[0000000010001410] = 000000ff, %l2 = 0000000000000000 | |
23388 | swapa [%i0+%o5]0x88,%l2 ! %l2 = 00000000000000ff | |
23389 | ! %l0 = 0000000000000000, Mem[0000000030181408] = 00000000 | |
23390 | stha %l0,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000 | |
23391 | ! %l1 = 0000000000000000, Mem[0000000030001410] = 000000ff | |
23392 | stba %l1,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00000000 | |
23393 | ! Starting 10 instruction Load Burst | |
23394 | ! Mem[00000000300c1408] = 0000ffff, %l7 = 00000000000000ff | |
23395 | ldsha [%i3+%o4]0x89,%l7 ! %l7 = ffffffffffffffff | |
23396 | ||
23397 | p0_label_553: | |
23398 | ! Mem[0000000010081410] = c78091bb, %l3 = 0000000000000000 | |
23399 | ldsha [%i2+0x010]%asi,%l3 ! %l3 = ffffffffffffc780 | |
23400 | ! Mem[0000000010141410] = 000000ff, %l6 = 00000000ff00ffff | |
23401 | ldsha [%i5+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
23402 | ! Mem[0000000030141408] = ffff00000000ff00, %l7 = ffffffffffffffff | |
23403 | ldxa [%i5+%o4]0x89,%l7 ! %l7 = ffff00000000ff00 | |
23404 | ! Mem[0000000030141408] = 0000ff00, %l4 = 00000000ffffffff | |
23405 | ldsha [%i5+%o4]0x89,%l4 ! %l4 = ffffffffffffff00 | |
23406 | ! Mem[0000000030001408] = 00000000, %f0 = 0000ff00 | |
23407 | lda [%i0+%o4]0x89,%f0 ! %f0 = 00000000 | |
23408 | ! Mem[0000000010041408] = 00000000, %l2 = 00000000000000ff | |
23409 | lduwa [%i1+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
23410 | ! Mem[0000000010001420] = 0000ff00, %l3 = ffffffffffffc780 | |
23411 | lduwa [%i0+0x020]%asi,%l3 ! %l3 = 000000000000ff00 | |
23412 | ! Mem[0000000010081414] = 759a4764, %l1 = 0000000000000000 | |
23413 | ldsha [%i2+0x014]%asi,%l1 ! %l1 = 000000000000759a | |
23414 | ! Mem[000000001010141c] = 00ff00ff, %l4 = ffffffffffffff00 | |
23415 | ldsh [%i4+0x01e],%l4 ! %l4 = 00000000000000ff | |
23416 | ! Starting 10 instruction Store Burst | |
23417 | ! %f2 = 00000000 000000ff, Mem[0000000010181410] = 00000000 00000000 | |
23418 | stda %f2 ,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000 000000ff | |
23419 | ||
23420 | p0_label_554: | |
23421 | ! %l0 = 00000000, %l1 = 0000759a, Mem[0000000010001400] = ff000000 000000ff | |
23422 | stda %l0,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00000000 0000759a | |
23423 | ! Mem[0000000010141404] = ff000000, %l2 = 00000000, %l6 = 000000ff | |
23424 | add %i5,0x04,%g1 | |
23425 | casa [%g1]0x80,%l2,%l6 ! %l6 = 00000000ff000000 | |
23426 | ! %f16 = ffff0000 00000000 00000000 ffffff00 | |
23427 | ! %f20 = 00000000 00000000 00000000 8ab60000 | |
23428 | ! %f24 = 000000ff ff000000 c78091bb ff000000 | |
23429 | ! %f28 = 5e000000 ffff0000 ff000000 ffffffff | |
23430 | stda %f16,[%i2]ASI_BLK_S ! Block Store to 0000000030081400 | |
23431 | ! %f6 = ffffffff ffff275e, Mem[0000000030041400] = 00000000 ffffff00 | |
23432 | stda %f6 ,[%i1+%g0]0x89 ! Mem[0000000030041400] = ffffffff ffff275e | |
23433 | ! Mem[0000000030101408] = ffffff00, %l6 = 00000000ff000000 | |
23434 | swapa [%i4+%o4]0x81,%l6 ! %l6 = 00000000ffffff00 | |
23435 | ! %l0 = 0000000000000000, Mem[0000000030141408] = 00ff0000 | |
23436 | stwa %l0,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 | |
23437 | ! Mem[0000000030181400] = ffffff00, %l5 = ffffffffffff9a75 | |
23438 | ldstuba [%i6+%g0]0x89,%l5 ! %l5 = 00000000000000ff | |
23439 | ! Mem[0000000010101408] = 0000ffff, %l1 = 000000000000759a | |
23440 | swapa [%i4+%o4]0x88,%l1 ! %l1 = 000000000000ffff | |
23441 | ! %f8 = 00000000, Mem[0000000010001420] = 0000ff00 | |
23442 | st %f8 ,[%i0+0x020] ! Mem[0000000010001420] = 00000000 | |
23443 | ! Starting 10 instruction Load Burst | |
23444 | ! Mem[0000000010041410] = ff000000, %l7 = ffff00000000ff00 | |
23445 | ldsba [%i1+%o5]0x80,%l7 ! %l7 = ffffffffffffffff | |
23446 | ||
23447 | p0_label_555: | |
23448 | ! Mem[0000000010181410] = ff000000, %l0 = 0000000000000000 | |
23449 | ldswa [%i6+%o5]0x80,%l0 ! %l0 = ffffffffff000000 | |
23450 | ! Mem[0000000010101438] = ff000000 00000000, %l0 = ff000000, %l1 = 0000ffff | |
23451 | ldd [%i4+0x038],%l0 ! %l0 = 00000000ff000000 0000000000000000 | |
23452 | ! Mem[0000000010001410] = 00000000, %l5 = 0000000000000000 | |
23453 | ldswa [%i0+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
23454 | ! Mem[0000000010181410] = ff000000, %l1 = 0000000000000000 | |
23455 | lduba [%i6+%o5]0x80,%l1 ! %l1 = 00000000000000ff | |
23456 | ! Mem[0000000030181408] = ff000000 00000000, %l4 = 000000ff, %l5 = 00000000 | |
23457 | ldda [%i6+%o4]0x89,%l4 ! %l4 = 0000000000000000 00000000ff000000 | |
23458 | ! Mem[0000000030181410] = 00000000, %f14 = ffff275e | |
23459 | lda [%i6+%o5]0x89,%f14 ! %f14 = 00000000 | |
23460 | ! Mem[00000000100c143c] = 5e27ffff, %l3 = 000000000000ff00 | |
23461 | ldswa [%i3+0x03c]%asi,%l3 ! %l3 = 000000005e27ffff | |
23462 | ! Mem[0000000010041400] = 00000000, %l4 = 0000000000000000 | |
23463 | lduha [%i1+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
23464 | ! Mem[0000000020800040] = ff009ffa, %l5 = 00000000ff000000 | |
23465 | ldsba [%o1+0x041]%asi,%l5 ! %l5 = 0000000000000000 | |
23466 | ! Starting 10 instruction Store Burst | |
23467 | ! Mem[0000000010041408] = 00000000, %l4 = 0000000000000000, %asi = 80 | |
23468 | swapa [%i1+0x008]%asi,%l4 ! %l4 = 0000000000000000 | |
23469 | ||
23470 | ! Check Point 111 for processor 0 | |
23471 | ||
23472 | set p0_check_pt_data_111,%g4 | |
23473 | rd %ccr,%g5 ! %g5 = 44 | |
23474 | ldx [%g4+0x08],%g2 | |
23475 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
23476 | bne %xcc,p0_reg_check_fail0 | |
23477 | mov 0xee0,%g1 | |
23478 | ldx [%g4+0x10],%g2 | |
23479 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
23480 | bne %xcc,p0_reg_check_fail1 | |
23481 | mov 0xee1,%g1 | |
23482 | ldx [%g4+0x18],%g2 | |
23483 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
23484 | bne %xcc,p0_reg_check_fail2 | |
23485 | mov 0xee2,%g1 | |
23486 | ldx [%g4+0x20],%g2 | |
23487 | cmp %l3,%g2 ! %l3 = 000000005e27ffff | |
23488 | bne %xcc,p0_reg_check_fail3 | |
23489 | mov 0xee3,%g1 | |
23490 | ldx [%g4+0x28],%g2 | |
23491 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
23492 | bne %xcc,p0_reg_check_fail4 | |
23493 | mov 0xee4,%g1 | |
23494 | ldx [%g4+0x30],%g2 | |
23495 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
23496 | bne %xcc,p0_reg_check_fail5 | |
23497 | mov 0xee5,%g1 | |
23498 | ldx [%g4+0x38],%g2 | |
23499 | cmp %l6,%g2 ! %l6 = 00000000ffffff00 | |
23500 | bne %xcc,p0_reg_check_fail6 | |
23501 | mov 0xee6,%g1 | |
23502 | ldx [%g4+0x40],%g2 | |
23503 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
23504 | bne %xcc,p0_reg_check_fail7 | |
23505 | mov 0xee7,%g1 | |
23506 | ldx [%g4+0x48],%g3 | |
23507 | std %f0,[%g4] | |
23508 | ldx [%g4],%g2 | |
23509 | cmp %g3,%g2 ! %f0 = 00000000 64479a75 | |
23510 | bne %xcc,p0_freg_check_fail | |
23511 | mov 0xf00,%g1 | |
23512 | ldx [%g4+0x50],%g3 | |
23513 | std %f4,[%g4] | |
23514 | ldx [%g4],%g2 | |
23515 | cmp %g3,%g2 ! %f4 = 00000000 8ab6ff9c | |
23516 | bne %xcc,p0_freg_check_fail | |
23517 | mov 0xf04,%g1 | |
23518 | ldx [%g4+0x58],%g3 | |
23519 | std %f6,[%g4] | |
23520 | ldx [%g4],%g2 | |
23521 | cmp %g3,%g2 ! %f6 = ffffffff ffff275e | |
23522 | bne %xcc,p0_freg_check_fail | |
23523 | mov 0xf06,%g1 | |
23524 | ldx [%g4+0x60],%g3 | |
23525 | std %f14,[%g4] | |
23526 | ldx [%g4],%g2 | |
23527 | cmp %g3,%g2 ! %f14 = 00000000 ffffffff | |
23528 | bne %xcc,p0_freg_check_fail | |
23529 | mov 0xf14,%g1 | |
23530 | ||
23531 | ! Check Point 111 completed | |
23532 | ||
23533 | ||
23534 | p0_label_556: | |
23535 | ! %l4 = 0000000000000000, Mem[0000000030041410] = ffffffff | |
23536 | stba %l4,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00ffffff | |
23537 | ! %l1 = 00000000000000ff, Mem[0000000010081410] = bb9180c7 | |
23538 | stba %l1,[%i2+%o5]0x88 ! Mem[0000000010081410] = bb9180ff | |
23539 | ! Mem[00000000100c1408] = ff000000, %l6 = 00000000ffffff00 | |
23540 | swapa [%i3+%o4]0x80,%l6 ! %l6 = 00000000ff000000 | |
23541 | ! %l1 = 00000000000000ff, Mem[0000000010101408] = 9a75000000000000 | |
23542 | stxa %l1,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000000000ff | |
23543 | ! %l1 = 00000000000000ff, Mem[00000000300c1400] = 00000000 | |
23544 | stha %l1,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 000000ff | |
23545 | ! %l3 = 000000005e27ffff, Mem[00000000100c1410] = 8ab6ff9c | |
23546 | stha %l3,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 8ab6ffff | |
23547 | ! Mem[0000000010141400] = ff00ffff, %l3 = 000000005e27ffff | |
23548 | ldstuba [%i5+%g0]0x88,%l3 ! %l3 = 000000ff000000ff | |
23549 | ! %l3 = 00000000000000ff, Mem[0000000010041410] = ff0000000000ffff | |
23550 | stxa %l3,[%i1+%o5]0x80 ! Mem[0000000010041410] = 00000000000000ff | |
23551 | ! %l4 = 0000000000000000, Mem[000000001010141e] = 00ff00ff, %asi = 80 | |
23552 | stba %l4,[%i4+0x01e]%asi ! Mem[000000001010141c] = 00ff00ff | |
23553 | ! Starting 10 instruction Load Burst | |
23554 | ! Mem[00000000300c1400] = 000000ff, %f25 = ff000000 | |
23555 | lda [%i3+%g0]0x89,%f25 ! %f25 = 000000ff | |
23556 | ||
23557 | p0_label_557: | |
23558 | ! Mem[0000000010001420] = 00000000, %l3 = 00000000000000ff | |
23559 | lduba [%i0+0x023]%asi,%l3 ! %l3 = 0000000000000000 | |
23560 | ! Mem[0000000030181400] = 00000000ffffffff, %l7 = ffffffffffffffff | |
23561 | ldxa [%i6+%g0]0x89,%l7 ! %l7 = 00000000ffffffff | |
23562 | ! Mem[0000000010141410] = ff000000, %f27 = ff000000 | |
23563 | lda [%i5+0x010]%asi,%f27 ! %f27 = ff000000 | |
23564 | ! Mem[00000000211c0000] = fffffe0c, %l2 = 0000000000000000 | |
23565 | lduh [%o2+%g0],%l2 ! %l2 = 000000000000ffff | |
23566 | ! Mem[0000000030141408] = ffff0000 00000000, %l2 = 0000ffff, %l3 = 00000000 | |
23567 | ldda [%i5+%o4]0x89,%l2 ! %l2 = 0000000000000000 00000000ffff0000 | |
23568 | ! Mem[0000000030041400] = 5e27ffff, %l0 = 00000000ff000000 | |
23569 | ldsha [%i1+%g0]0x81,%l0 ! %l0 = 0000000000005e27 | |
23570 | ! Mem[00000000100c1408] = 0000000000ffffff, %l7 = 00000000ffffffff | |
23571 | ldxa [%i3+%o4]0x88,%l7 ! %l7 = 0000000000ffffff | |
23572 | ! Mem[00000000300c1410] = ffffffff 00000000, %l4 = 00000000, %l5 = 00000000 | |
23573 | ldda [%i3+%o5]0x81,%l4 ! %l4 = 00000000ffffffff 0000000000000000 | |
23574 | ! Mem[0000000030141410] = 0000ffff, %l7 = 0000000000ffffff | |
23575 | ldsba [%i5+%o5]0x89,%l7 ! %l7 = ffffffffffffffff | |
23576 | ! Starting 10 instruction Store Burst | |
23577 | ! %f2 = 00000000, Mem[0000000010101408] = 00000000 | |
23578 | sta %f2 ,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000 | |
23579 | ||
23580 | p0_label_558: | |
23581 | ! Mem[0000000010181434] = 00000000, %l6 = 00000000ff000000, %asi = 80 | |
23582 | swapa [%i6+0x034]%asi,%l6 ! %l6 = 0000000000000000 | |
23583 | ! Mem[0000000010101400] = ffffffff, %l0 = 0000000000005e27 | |
23584 | swapa [%i4+%g0]0x80,%l0 ! %l0 = 00000000ffffffff | |
23585 | ! Mem[0000000030041408] = 00000000, %l6 = 0000000000000000 | |
23586 | swapa [%i1+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
23587 | ! %l3 = 00000000ffff0000, Mem[0000000010041408] = 00000000 | |
23588 | stwa %l3,[%i1+%o4]0x88 ! Mem[0000000010041408] = ffff0000 | |
23589 | ! Mem[00000000211c0001] = fffffe0c, %l3 = 00000000ffff0000 | |
23590 | ldstuba [%o2+0x001]%asi,%l3 ! %l3 = 000000ff000000ff | |
23591 | ! %l3 = 00000000000000ff, Mem[00000000300c1410] = ffffffff00000000 | |
23592 | stxa %l3,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 00000000000000ff | |
23593 | ! Mem[0000000010001410] = 00000000, %l5 = 0000000000000000 | |
23594 | swapa [%i0+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
23595 | ! %l7 = ffffffffffffffff, Mem[0000000021800040] = ff755e5c | |
23596 | sth %l7,[%o3+0x040] ! Mem[0000000021800040] = ffff5e5c | |
23597 | ! %l7 = ffffffffffffffff, Mem[0000000030041400] = 5e27ffff | |
23598 | stha %l7,[%i1+%g0]0x81 ! Mem[0000000030041400] = ffffffff | |
23599 | ! Starting 10 instruction Load Burst | |
23600 | ! Mem[00000000300c1400] = ff000000, %l5 = 0000000000000000 | |
23601 | lduba [%i3+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
23602 | ||
23603 | p0_label_559: | |
23604 | ! Mem[0000000010101430] = 000000ffffffff00, %f12 = ff000000 00000000 | |
23605 | ldda [%i4+0x030]%asi,%f12 ! %f12 = 000000ff ffffff00 | |
23606 | ! Mem[0000000030181400] = ffffffff, %l6 = 0000000000000000 | |
23607 | ldswa [%i6+%g0]0x89,%l6 ! %l6 = ffffffffffffffff | |
23608 | ! Mem[0000000010041428] = 000000ff, %l7 = ffffffffffffffff | |
23609 | lduha [%i1+0x02a]%asi,%l7 ! %l7 = 00000000000000ff | |
23610 | ! Mem[0000000010041410] = 00000000 000000ff, %l0 = ffffffff, %l1 = 000000ff | |
23611 | ldda [%i1+%o5]0x80,%l0 ! %l0 = 0000000000000000 00000000000000ff | |
23612 | ! Mem[0000000030181400] = ffffffff, %l0 = 0000000000000000 | |
23613 | lduwa [%i6+%g0]0x81,%l0 ! %l0 = 00000000ffffffff | |
23614 | ! Mem[0000000021800000] = 00009a65, %l4 = 00000000ffffffff | |
23615 | ldsba [%o3+0x000]%asi,%l4 ! %l4 = 0000000000000000 | |
23616 | ! Mem[0000000010001410] = 00000000, %f16 = ffff0000 | |
23617 | lda [%i0+%o5]0x80,%f16 ! %f16 = 00000000 | |
23618 | membar #Sync ! Added by membar checker (107) | |
23619 | ! Mem[0000000010081400] = 00000000, %l1 = 00000000000000ff | |
23620 | lduba [%i2+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
23621 | ! Mem[00000000100c1410] = ffffb68a, %l0 = 00000000ffffffff | |
23622 | lduha [%i3+%o5]0x80,%l0 ! %l0 = 000000000000ffff | |
23623 | ! Starting 10 instruction Store Burst | |
23624 | ! Mem[0000000010001430] = 00000000, %l1 = 0000000000000000, %asi = 80 | |
23625 | swapa [%i0+0x030]%asi,%l1 ! %l1 = 0000000000000000 | |
23626 | ||
23627 | p0_label_560: | |
23628 | ! Mem[0000000021800080] = 5e000b33, %l6 = ffffffffffffffff | |
23629 | ldstub [%o3+0x080],%l6 ! %l6 = 0000005e000000ff | |
23630 | ! %l6 = 0000005e, %l7 = 000000ff, Mem[00000000100c1410] = ffffb68a 00000000 | |
23631 | stda %l6,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 0000005e 000000ff | |
23632 | ! %f4 = 00000000 8ab6ff9c, Mem[0000000010181418] = ff000000 00ff00c4 | |
23633 | std %f4 ,[%i6+0x018] ! Mem[0000000010181418] = 00000000 8ab6ff9c | |
23634 | ! %l0 = 000000000000ffff, Mem[0000000010001428] = 9ce0b68a, %asi = 80 | |
23635 | stwa %l0,[%i0+0x028]%asi ! Mem[0000000010001428] = 0000ffff | |
23636 | ! %f20 = 00000000, Mem[0000000010001408] = 00000000 | |
23637 | sta %f20,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000000 | |
23638 | ! %f22 = 00000000 8ab60000, Mem[0000000030001410] = 00000000 00ffffff | |
23639 | stda %f22,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00000000 8ab60000 | |
23640 | ! Mem[000000001010142c] = 6b6c2202, %l2 = 00000000, %l7 = 000000ff | |
23641 | add %i4,0x2c,%g1 | |
23642 | casa [%g1]0x80,%l2,%l7 ! %l7 = 000000006b6c2202 | |
23643 | ! Mem[0000000030181410] = 00000000, %l5 = 00000000000000ff | |
23644 | swapa [%i6+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
23645 | ! %f8 = 00000000 00000000, Mem[0000000010101418] = 5e9e1157 00ff00ff | |
23646 | stda %f8 ,[%i4+0x018]%asi ! Mem[0000000010101418] = 00000000 00000000 | |
23647 | ! Starting 10 instruction Load Burst | |
23648 | ! Mem[00000000100c1408] = 00ffffff, %f8 = 00000000 | |
23649 | lda [%i3+%o4]0x88,%f8 ! %f8 = 00ffffff | |
23650 | ||
23651 | ! Check Point 112 for processor 0 | |
23652 | ||
23653 | set p0_check_pt_data_112,%g4 | |
23654 | rd %ccr,%g5 ! %g5 = 44 | |
23655 | ldx [%g4+0x08],%g2 | |
23656 | cmp %l0,%g2 ! %l0 = 000000000000ffff | |
23657 | bne %xcc,p0_reg_check_fail0 | |
23658 | mov 0xee0,%g1 | |
23659 | ldx [%g4+0x10],%g2 | |
23660 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
23661 | bne %xcc,p0_reg_check_fail1 | |
23662 | mov 0xee1,%g1 | |
23663 | ldx [%g4+0x18],%g2 | |
23664 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
23665 | bne %xcc,p0_reg_check_fail2 | |
23666 | mov 0xee2,%g1 | |
23667 | ldx [%g4+0x20],%g2 | |
23668 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
23669 | bne %xcc,p0_reg_check_fail3 | |
23670 | mov 0xee3,%g1 | |
23671 | ldx [%g4+0x28],%g2 | |
23672 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
23673 | bne %xcc,p0_reg_check_fail4 | |
23674 | mov 0xee4,%g1 | |
23675 | ldx [%g4+0x30],%g2 | |
23676 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
23677 | bne %xcc,p0_reg_check_fail5 | |
23678 | mov 0xee5,%g1 | |
23679 | ldx [%g4+0x38],%g2 | |
23680 | cmp %l6,%g2 ! %l6 = 000000000000005e | |
23681 | bne %xcc,p0_reg_check_fail6 | |
23682 | mov 0xee6,%g1 | |
23683 | ldx [%g4+0x40],%g2 | |
23684 | cmp %l7,%g2 ! %l7 = 000000006b6c2202 | |
23685 | bne %xcc,p0_reg_check_fail7 | |
23686 | mov 0xee7,%g1 | |
23687 | ldx [%g4+0x48],%g3 | |
23688 | std %f0,[%g4] | |
23689 | ldx [%g4],%g2 | |
23690 | cmp %g3,%g2 ! %f0 = 00000000 64479a75 | |
23691 | bne %xcc,p0_freg_check_fail | |
23692 | mov 0xf00,%g1 | |
23693 | ldx [%g4+0x50],%g3 | |
23694 | std %f2,[%g4] | |
23695 | ldx [%g4],%g2 | |
23696 | cmp %g3,%g2 ! %f2 = 00000000 000000ff | |
23697 | bne %xcc,p0_freg_check_fail | |
23698 | mov 0xf02,%g1 | |
23699 | ldx [%g4+0x58],%g3 | |
23700 | std %f4,[%g4] | |
23701 | ldx [%g4],%g2 | |
23702 | cmp %g3,%g2 ! %f4 = 00000000 8ab6ff9c | |
23703 | bne %xcc,p0_freg_check_fail | |
23704 | mov 0xf04,%g1 | |
23705 | ldx [%g4+0x60],%g3 | |
23706 | std %f8,[%g4] | |
23707 | ldx [%g4],%g2 | |
23708 | cmp %g3,%g2 ! %f8 = 00ffffff 00000000 | |
23709 | bne %xcc,p0_freg_check_fail | |
23710 | mov 0xf08,%g1 | |
23711 | ldx [%g4+0x68],%g3 | |
23712 | std %f12,[%g4] | |
23713 | ldx [%g4],%g2 | |
23714 | cmp %g3,%g2 ! %f12 = 000000ff ffffff00 | |
23715 | bne %xcc,p0_freg_check_fail | |
23716 | mov 0xf12,%g1 | |
23717 | ldx [%g4+0x70],%g3 | |
23718 | std %f16,[%g4] | |
23719 | ldx [%g4],%g2 | |
23720 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
23721 | bne %xcc,p0_freg_check_fail | |
23722 | mov 0xf16,%g1 | |
23723 | ldx [%g4+0x78],%g3 | |
23724 | std %f24,[%g4] | |
23725 | ldx [%g4],%g2 | |
23726 | cmp %g3,%g2 ! %f24 = 000000ff 000000ff | |
23727 | bne %xcc,p0_freg_check_fail | |
23728 | mov 0xf24,%g1 | |
23729 | ldx [%g4+0x80],%g3 | |
23730 | std %f26,[%g4] | |
23731 | ldx [%g4],%g2 | |
23732 | cmp %g3,%g2 ! %f26 = c78091bb ff000000 | |
23733 | bne %xcc,p0_freg_check_fail | |
23734 | mov 0xf26,%g1 | |
23735 | ||
23736 | ! Check Point 112 completed | |
23737 | ||
23738 | ||
23739 | p0_label_561: | |
23740 | ! Mem[0000000010181410] = 000000ff, %l5 = 0000000000000000 | |
23741 | lduha [%i6+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
23742 | ! Mem[0000000030081410] = 0000000000000000, %f8 = 00ffffff 00000000 | |
23743 | ldda [%i2+%o5]0x89,%f8 ! %f8 = 00000000 00000000 | |
23744 | ! Mem[0000000010041400] = 00000000, %f27 = ff000000 | |
23745 | lda [%i1+%g0]0x80,%f27 ! %f27 = 00000000 | |
23746 | ! Mem[0000000010181408] = ffffffff, %l7 = 000000006b6c2202 | |
23747 | lduwa [%i6+%o4]0x80,%l7 ! %l7 = 00000000ffffffff | |
23748 | ! Mem[0000000010041400] = 00000000, %l3 = 00000000000000ff | |
23749 | ldsb [%i1+0x001],%l3 ! %l3 = 0000000000000000 | |
23750 | ! Mem[0000000030181400] = ffffffff00000000, %f6 = ffffffff ffff275e | |
23751 | ldda [%i6+%g0]0x81,%f6 ! %f6 = ffffffff 00000000 | |
23752 | ! Mem[0000000030001410] = 8ab60000, %l0 = 000000000000ffff | |
23753 | lduwa [%i0+%o5]0x89,%l0 ! %l0 = 000000008ab60000 | |
23754 | ! Mem[0000000010081410] = ff8091bb759a4764, %l2 = 0000000000000000 | |
23755 | ldx [%i2+%o5],%l2 ! %l2 = ff8091bb759a4764 | |
23756 | ! Mem[0000000010081410] = ff8091bb, %f15 = ffffffff | |
23757 | lda [%i2+%o5]0x80,%f15 ! %f15 = ff8091bb | |
23758 | ! Starting 10 instruction Store Burst | |
23759 | ! %l2 = 759a4764, %l3 = 00000000, Mem[0000000010001438] = ffffffff ffffffff | |
23760 | stda %l2,[%i0+0x038]%asi ! Mem[0000000010001438] = 759a4764 00000000 | |
23761 | ||
23762 | p0_label_562: | |
23763 | ! %l7 = 00000000ffffffff, Mem[0000000030101408] = 000000ff | |
23764 | stba %l7,[%i4+%o4]0x89 ! Mem[0000000030101408] = 000000ff | |
23765 | ! %l0 = 000000008ab60000, Mem[0000000010141400] = ffff00ff | |
23766 | stba %l0,[%i5+%g0]0x80 ! Mem[0000000010141400] = 00ff00ff | |
23767 | ! Mem[0000000010041408] = 0000ffff, %l5 = 00000000000000ff | |
23768 | swapa [%i1+%o4]0x80,%l5 ! %l5 = 000000000000ffff | |
23769 | ! %l0 = 000000008ab60000, Mem[0000000010001400] = 00000000 | |
23770 | stba %l0,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 | |
23771 | ! Mem[0000000020800041] = ff009ffa, %l6 = 000000000000005e | |
23772 | ldstub [%o1+0x041],%l6 ! %l6 = 00000000000000ff | |
23773 | ! %l5 = 000000000000ffff, Mem[0000000010041400] = 00000000 | |
23774 | stba %l5,[%i1+%g0]0x80 ! Mem[0000000010041400] = ff000000 | |
23775 | ! Mem[0000000010041410] = 00000000000000ff, %l2 = ff8091bb759a4764, %l3 = 0000000000000000 | |
23776 | add %i1,0x10,%g1 | |
23777 | casxa [%g1]0x80,%l2,%l3 ! %l3 = 00000000000000ff | |
23778 | ! %l7 = 00000000ffffffff, imm = fffffffffffff86a, %l0 = 000000008ab60000 | |
23779 | sub %l7,-0x796,%l0 ! %l0 = 0000000100000795 | |
23780 | ! Mem[0000000010141408] = ff0000ff, %l3 = 00000000000000ff | |
23781 | swapa [%i5+%o4]0x88,%l3 ! %l3 = 00000000ff0000ff | |
23782 | ! Starting 10 instruction Load Burst | |
23783 | ! Mem[0000000030001408] = 00000000, %l3 = 00000000ff0000ff | |
23784 | ldsba [%i0+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
23785 | ||
23786 | p0_label_563: | |
23787 | ! Mem[0000000010081400] = 00000000000000ff, %l5 = 000000000000ffff | |
23788 | ldxa [%i2+%g0]0x80,%l5 ! %l5 = 00000000000000ff | |
23789 | ! Mem[0000000010041408] = 00000000ff000000, %f0 = 00000000 64479a75 | |
23790 | ldda [%i1+%o4]0x88,%f0 ! %f0 = 00000000 ff000000 | |
23791 | ! Mem[0000000030141410] = ffff0000, %l1 = 0000000000000000 | |
23792 | lduba [%i5+%o5]0x81,%l1 ! %l1 = 00000000000000ff | |
23793 | ! Mem[0000000010141400] = 00ff00ff, %l2 = ff8091bb759a4764 | |
23794 | ldsba [%i5+%g0]0x80,%l2 ! %l2 = 0000000000000000 | |
23795 | ! Mem[00000000300c1400] = ffff0000000000ff, %l2 = 0000000000000000 | |
23796 | ldxa [%i3+%g0]0x89,%l2 ! %l2 = ffff0000000000ff | |
23797 | membar #Sync ! Added by membar checker (108) | |
23798 | ! Mem[0000000010141400] = 00ff00ff ff000000 ff000000 64ffffff | |
23799 | ! Mem[0000000010141410] = ff000000 8ab6ff9c 000000ff 00ff005e | |
23800 | ! Mem[0000000010141420] = ffff0000 00000000 00000000 00000000 | |
23801 | ! Mem[0000000010141430] = 0000ffff 00000000 00000000 ff000000 | |
23802 | ldda [%i5]ASI_BLK_P,%f16 ! Block Load from 0000000010141400 | |
23803 | ! Mem[0000000010041400] = 000000ff, %l7 = 00000000ffffffff | |
23804 | lduha [%i1+%g0]0x88,%l7 ! %l7 = 00000000000000ff | |
23805 | ! Mem[0000000020800040] = ffff9ffa, %l2 = ffff0000000000ff | |
23806 | ldsb [%o1+0x040],%l2 ! %l2 = ffffffffffffffff | |
23807 | ! Mem[0000000030041400] = ffffffffffffffff, %f10 = ffffff64 ff0000ff | |
23808 | ldda [%i1+%g0]0x81,%f10 ! %f10 = ffffffff ffffffff | |
23809 | ! Starting 10 instruction Store Burst | |
23810 | ! %l2 = ffffffffffffffff, Mem[0000000030141408] = 00000000 | |
23811 | stwa %l2,[%i5+%o4]0x89 ! Mem[0000000030141408] = ffffffff | |
23812 | ||
23813 | p0_label_564: | |
23814 | ! Mem[0000000010141408] = ff000000, %l0 = 0000000100000795 | |
23815 | swapa [%i5+%o4]0x80,%l0 ! %l0 = 00000000ff000000 | |
23816 | ! Mem[0000000030181410] = ff000000, %l7 = 00000000000000ff | |
23817 | swapa [%i6+%o5]0x89,%l7 ! %l7 = 00000000ff000000 | |
23818 | ! %l6 = 00000000, %l7 = ff000000, Mem[00000000300c1400] = ff000000 0000ffff | |
23819 | stda %l6,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00000000 ff000000 | |
23820 | ! Mem[0000000010141410] = 000000ff, %l0 = 00000000ff000000 | |
23821 | ldstuba [%i5+%o5]0x88,%l0 ! %l0 = 000000ff000000ff | |
23822 | ! %f14 = 00000000 ff8091bb, Mem[0000000010041420] = 6c6b0003 39ac00ff | |
23823 | stda %f14,[%i1+0x020]%asi ! Mem[0000000010041420] = 00000000 ff8091bb | |
23824 | ! %l4 = 0000000000000000, Mem[0000000030001410] = 8ab60000 | |
23825 | stha %l4,[%i0+%o5]0x89 ! Mem[0000000030001410] = 8ab60000 | |
23826 | ! Mem[0000000010141410] = ff000000, %l2 = ffffffffffffffff | |
23827 | swap [%i5+%o5],%l2 ! %l2 = 00000000ff000000 | |
23828 | ! %f4 = 00000000 8ab6ff9c, Mem[0000000010181408] = ffffffff ffff275e | |
23829 | stda %f4 ,[%i6+%o4]0x80 ! Mem[0000000010181408] = 00000000 8ab6ff9c | |
23830 | ! Mem[0000000020800000] = ff000db6, %l1 = 00000000000000ff | |
23831 | ldstuba [%o1+0x000]%asi,%l1 ! %l1 = 000000ff000000ff | |
23832 | ! Starting 10 instruction Load Burst | |
23833 | ! Mem[0000000010101400] = 00005e27, %l7 = 00000000ff000000 | |
23834 | ldsha [%i4+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
23835 | ||
23836 | p0_label_565: | |
23837 | ! Mem[0000000020800000] = ff000db6, %l1 = 00000000000000ff | |
23838 | ldsba [%o1+0x000]%asi,%l1 ! %l1 = ffffffffffffffff | |
23839 | ! Mem[0000000030001408] = 00000000, %l2 = 00000000ff000000 | |
23840 | ldsha [%i0+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
23841 | ! Mem[0000000010081430] = 00000000, %l1 = ffffffffffffffff | |
23842 | lduw [%i2+0x030],%l1 ! %l1 = 0000000000000000 | |
23843 | ! Mem[00000000100c1408] = ffffff00, %l3 = 0000000000000000 | |
23844 | lduwa [%i3+%o4]0x80,%l3 ! %l3 = 00000000ffffff00 | |
23845 | ! Mem[0000000010081410] = ff8091bb759a4764, %f14 = 00000000 ff8091bb | |
23846 | ldda [%i2+%o5]0x80,%f14 ! %f14 = ff8091bb 759a4764 | |
23847 | ! Mem[00000000300c1400] = 00000000, %l1 = 0000000000000000 | |
23848 | lduba [%i3+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
23849 | ! Mem[00000000300c1408] = 0000ffff, %l3 = 00000000ffffff00 | |
23850 | lduha [%i3+%o4]0x89,%l3 ! %l3 = 000000000000ffff | |
23851 | ! Mem[0000000010141420] = ffff0000 00000000, %l4 = 00000000, %l5 = 000000ff | |
23852 | ldda [%i5+0x020]%asi,%l4 ! %l4 = 00000000ffff0000 0000000000000000 | |
23853 | ! Mem[0000000030041410] = 759a4764ffffff00, %l2 = 0000000000000000 | |
23854 | ldxa [%i1+%o5]0x89,%l2 ! %l2 = 759a4764ffffff00 | |
23855 | ! Starting 10 instruction Store Burst | |
23856 | ! %f4 = 00000000 8ab6ff9c, %l6 = 0000000000000000 | |
23857 | ! Mem[0000000030181400] = ffffffff00000000 | |
23858 | stda %f4,[%i6+%l6]ASI_PST16_SL ! Mem[0000000030181400] = ffffffff00000000 | |
23859 | ||
23860 | ! Check Point 113 for processor 0 | |
23861 | ||
23862 | set p0_check_pt_data_113,%g4 | |
23863 | rd %ccr,%g5 ! %g5 = 44 | |
23864 | ldx [%g4+0x08],%g2 | |
23865 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
23866 | bne %xcc,p0_reg_check_fail0 | |
23867 | mov 0xee0,%g1 | |
23868 | ldx [%g4+0x10],%g2 | |
23869 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
23870 | bne %xcc,p0_reg_check_fail1 | |
23871 | mov 0xee1,%g1 | |
23872 | ldx [%g4+0x18],%g2 | |
23873 | cmp %l2,%g2 ! %l2 = 759a4764ffffff00 | |
23874 | bne %xcc,p0_reg_check_fail2 | |
23875 | mov 0xee2,%g1 | |
23876 | ldx [%g4+0x20],%g2 | |
23877 | cmp %l3,%g2 ! %l3 = 000000000000ffff | |
23878 | bne %xcc,p0_reg_check_fail3 | |
23879 | mov 0xee3,%g1 | |
23880 | ldx [%g4+0x28],%g2 | |
23881 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
23882 | bne %xcc,p0_reg_check_fail5 | |
23883 | mov 0xee5,%g1 | |
23884 | ldx [%g4+0x30],%g2 | |
23885 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
23886 | bne %xcc,p0_reg_check_fail6 | |
23887 | mov 0xee6,%g1 | |
23888 | ldx [%g4+0x38],%g2 | |
23889 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
23890 | bne %xcc,p0_reg_check_fail7 | |
23891 | mov 0xee7,%g1 | |
23892 | ldx [%g4+0x40],%g3 | |
23893 | std %f0,[%g4] | |
23894 | ldx [%g4],%g2 | |
23895 | cmp %g3,%g2 ! %f0 = 00000000 ff000000 | |
23896 | bne %xcc,p0_freg_check_fail | |
23897 | mov 0xf00,%g1 | |
23898 | ldx [%g4+0x48],%g3 | |
23899 | std %f4,[%g4] | |
23900 | ldx [%g4],%g2 | |
23901 | cmp %g3,%g2 ! %f4 = 00000000 8ab6ff9c | |
23902 | bne %xcc,p0_freg_check_fail | |
23903 | mov 0xf04,%g1 | |
23904 | ldx [%g4+0x50],%g3 | |
23905 | std %f6,[%g4] | |
23906 | ldx [%g4],%g2 | |
23907 | cmp %g3,%g2 ! %f6 = ffffffff 00000000 | |
23908 | bne %xcc,p0_freg_check_fail | |
23909 | mov 0xf06,%g1 | |
23910 | ldx [%g4+0x58],%g3 | |
23911 | std %f8,[%g4] | |
23912 | ldx [%g4],%g2 | |
23913 | cmp %g3,%g2 ! %f8 = 00000000 00000000 | |
23914 | bne %xcc,p0_freg_check_fail | |
23915 | mov 0xf08,%g1 | |
23916 | ldx [%g4+0x60],%g3 | |
23917 | std %f10,[%g4] | |
23918 | ldx [%g4],%g2 | |
23919 | cmp %g3,%g2 ! %f10 = ffffffff ffffffff | |
23920 | bne %xcc,p0_freg_check_fail | |
23921 | mov 0xf10,%g1 | |
23922 | ldx [%g4+0x68],%g3 | |
23923 | std %f14,[%g4] | |
23924 | ldx [%g4],%g2 | |
23925 | cmp %g3,%g2 ! %f14 = ff8091bb 759a4764 | |
23926 | bne %xcc,p0_freg_check_fail | |
23927 | mov 0xf14,%g1 | |
23928 | ldx [%g4+0x70],%g3 | |
23929 | std %f16,[%g4] | |
23930 | ldx [%g4],%g2 | |
23931 | cmp %g3,%g2 ! %f16 = 00ff00ff ff000000 | |
23932 | bne %xcc,p0_freg_check_fail | |
23933 | mov 0xf16,%g1 | |
23934 | ldx [%g4+0x78],%g3 | |
23935 | std %f18,[%g4] | |
23936 | ldx [%g4],%g2 | |
23937 | cmp %g3,%g2 ! %f18 = ff000000 64ffffff | |
23938 | bne %xcc,p0_freg_check_fail | |
23939 | mov 0xf18,%g1 | |
23940 | ldx [%g4+0x80],%g3 | |
23941 | std %f20,[%g4] | |
23942 | ldx [%g4],%g2 | |
23943 | cmp %g3,%g2 ! %f20 = ff000000 8ab6ff9c | |
23944 | bne %xcc,p0_freg_check_fail | |
23945 | mov 0xf20,%g1 | |
23946 | ldx [%g4+0x88],%g3 | |
23947 | std %f22,[%g4] | |
23948 | ldx [%g4],%g2 | |
23949 | cmp %g3,%g2 ! %f22 = 000000ff 00ff005e | |
23950 | bne %xcc,p0_freg_check_fail | |
23951 | mov 0xf22,%g1 | |
23952 | ldx [%g4+0x90],%g3 | |
23953 | std %f24,[%g4] | |
23954 | ldx [%g4],%g2 | |
23955 | cmp %g3,%g2 ! %f24 = ffff0000 00000000 | |
23956 | bne %xcc,p0_freg_check_fail | |
23957 | mov 0xf24,%g1 | |
23958 | ldx [%g4+0x98],%g3 | |
23959 | std %f26,[%g4] | |
23960 | ldx [%g4],%g2 | |
23961 | cmp %g3,%g2 ! %f26 = 00000000 00000000 | |
23962 | bne %xcc,p0_freg_check_fail | |
23963 | mov 0xf26,%g1 | |
23964 | ldx [%g4+0xa0],%g3 | |
23965 | std %f28,[%g4] | |
23966 | ldx [%g4],%g2 | |
23967 | cmp %g3,%g2 ! %f28 = 0000ffff 00000000 | |
23968 | bne %xcc,p0_freg_check_fail | |
23969 | mov 0xf28,%g1 | |
23970 | ldx [%g4+0xa8],%g3 | |
23971 | std %f30,[%g4] | |
23972 | ldx [%g4],%g2 | |
23973 | cmp %g3,%g2 ! %f30 = 00000000 ff000000 | |
23974 | bne %xcc,p0_freg_check_fail | |
23975 | mov 0xf30,%g1 | |
23976 | ||
23977 | ! Check Point 113 completed | |
23978 | ||
23979 | ||
23980 | p0_label_566: | |
23981 | ! %f8 = 00000000 00000000, Mem[0000000010041400] = 000000ff 000000ff | |
23982 | stda %f8 ,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 00000000 | |
23983 | ! Mem[00000000100c1408] = ffffff0000000000, %l5 = 0000000000000000, %l3 = 000000000000ffff | |
23984 | add %i3,0x08,%g1 | |
23985 | casxa [%g1]0x80,%l5,%l3 ! %l3 = ffffff0000000000 | |
23986 | ! %f30 = 00000000 ff000000, %l7 = 0000000000000000 | |
23987 | ! Mem[0000000030081430] = 5e000000ffff0000 | |
23988 | add %i2,0x030,%g1 | |
23989 | stda %f30,[%g1+%l7]ASI_PST16_S ! Mem[0000000030081430] = 5e000000ffff0000 | |
23990 | ! %f24 = ffff0000 00000000, Mem[0000000010181428] = ff000000 ffffffff | |
23991 | std %f24,[%i6+0x028] ! Mem[0000000010181428] = ffff0000 00000000 | |
23992 | ! Mem[000000001014142b] = 00000000, %l4 = 00000000ffff0000 | |
23993 | ldstuba [%i5+0x02b]%asi,%l4 ! %l4 = 00000000000000ff | |
23994 | ! %f18 = ff000000 64ffffff, Mem[00000000300c1400] = 00000000 000000ff | |
23995 | stda %f18,[%i3+%g0]0x89 ! Mem[00000000300c1400] = ff000000 64ffffff | |
23996 | ! %l2 = 759a4764ffffff00, Mem[0000000030081410] = 00000000 | |
23997 | stwa %l2,[%i2+%o5]0x81 ! Mem[0000000030081410] = ffffff00 | |
23998 | ! %f0 = 00000000, Mem[0000000010181400] = ffffffff | |
23999 | sta %f0 ,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000 | |
24000 | ! %l5 = 0000000000000000, Mem[0000000010001418] = 000000ff, %asi = 80 | |
24001 | stwa %l5,[%i0+0x018]%asi ! Mem[0000000010001418] = 00000000 | |
24002 | ! Starting 10 instruction Load Burst | |
24003 | ! Mem[0000000030141408] = ffffffff, %l6 = 0000000000000000 | |
24004 | lduha [%i5+%o4]0x89,%l6 ! %l6 = 000000000000ffff | |
24005 | ||
24006 | p0_label_567: | |
24007 | ! Mem[00000000100c1400] = 0000ff0064479a75, %f18 = ff000000 64ffffff | |
24008 | ldda [%i3+%g0]0x88,%f18 ! %f18 = 0000ff00 64479a75 | |
24009 | ! Mem[0000000030101400] = 00000000, %l0 = 00000000000000ff | |
24010 | lduba [%i4+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
24011 | ! Mem[0000000030181410] = 000000ff, %l6 = 000000000000ffff | |
24012 | lduha [%i6+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
24013 | ! Mem[0000000010141400] = ff00ff00, %l2 = 759a4764ffffff00 | |
24014 | lduha [%i5+%g0]0x88,%l2 ! %l2 = 000000000000ff00 | |
24015 | ! Mem[0000000010141410] = ffffffff8ab6ff9c, %f16 = 00ff00ff ff000000 | |
24016 | ldda [%i5+0x010]%asi,%f16 ! %f16 = ffffffff 8ab6ff9c | |
24017 | ! Mem[0000000030081410] = 00ffffff, %l6 = 00000000000000ff | |
24018 | lduha [%i2+%o5]0x89,%l6 ! %l6 = 000000000000ffff | |
24019 | ! Mem[0000000010081400] = 00000000, %l3 = ffffff0000000000 | |
24020 | ldsha [%i2+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
24021 | ! Mem[00000000201c0000] = 00001669, %l7 = 0000000000000000 | |
24022 | ldsb [%o0+0x001],%l7 ! %l7 = 0000000000000000 | |
24023 | ! Mem[0000000030001408] = 00000000, %l0 = 0000000000000000 | |
24024 | lduba [%i0+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
24025 | ! Starting 10 instruction Store Burst | |
24026 | ! %f10 = ffffffff ffffffff, Mem[0000000030141410] = 0000ffff 00000000 | |
24027 | stda %f10,[%i5+%o5]0x89 ! Mem[0000000030141410] = ffffffff ffffffff | |
24028 | ||
24029 | p0_label_568: | |
24030 | ! Mem[0000000010081404] = 000000ff, %l7 = 0000000000000000 | |
24031 | swap [%i2+0x004],%l7 ! %l7 = 00000000000000ff | |
24032 | ! %l0 = 0000000000000000, Mem[0000000010081400] = 00000000 | |
24033 | stha %l0,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 | |
24034 | ! Mem[0000000030181410] = ff000000, %l3 = 0000000000000000 | |
24035 | ldstuba [%i6+%o5]0x81,%l3 ! %l3 = 000000ff000000ff | |
24036 | ! %f22 = 000000ff 00ff005e, Mem[00000000100c1400] = 759a4764 00ff0000 | |
24037 | std %f22,[%i3+%g0] ! Mem[00000000100c1400] = 000000ff 00ff005e | |
24038 | ! Mem[00000000100c1408] = ffffff00, %l0 = 0000000000000000 | |
24039 | ldstuba [%i3+%o4]0x80,%l0 ! %l0 = 000000ff000000ff | |
24040 | ! %f12 = 000000ff ffffff00, %l3 = 00000000000000ff | |
24041 | ! Mem[0000000030101400] = 00000000000000ff | |
24042 | stda %f12,[%i4+%l3]ASI_PST8_S ! Mem[0000000030101400] = 000000ffffffff00 | |
24043 | ! Mem[0000000030081408] = 00000000, %l3 = 00000000000000ff | |
24044 | swapa [%i2+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
24045 | ! Mem[000000001004143c] = 0000005e, %l5 = 0000000000000000, %asi = 80 | |
24046 | swapa [%i1+0x03c]%asi,%l5 ! %l5 = 000000000000005e | |
24047 | ! Mem[0000000020800000] = ff000db6, %l1 = 0000000000000000 | |
24048 | ldstub [%o1+%g0],%l1 ! %l1 = 000000ff000000ff | |
24049 | ! Starting 10 instruction Load Burst | |
24050 | ! Mem[0000000010081408] = ffffffff00000000, %f10 = ffffffff ffffffff | |
24051 | ldda [%i2+%o4]0x80,%f10 ! %f10 = ffffffff 00000000 | |
24052 | ||
24053 | p0_label_569: | |
24054 | membar #Sync ! Added by membar checker (109) | |
24055 | ! Mem[0000000010001400] = 00000000 0000759a 00000000 00000000 | |
24056 | ! Mem[0000000010001410] = 00000000 00ff0000 00000000 ffff0000 | |
24057 | ! Mem[0000000010001420] = 00000000 64479a75 0000ffff a3ffade0 | |
24058 | ! Mem[0000000010001430] = 00000000 00000000 759a4764 00000000 | |
24059 | ldda [%i0]ASI_BLK_P,%f16 ! Block Load from 0000000010001400 | |
24060 | ! Mem[0000000030101410] = 00000000 64000000, %l4 = 00000000, %l5 = 0000005e | |
24061 | ldda [%i4+%o5]0x81,%l4 ! %l4 = 0000000000000000 0000000064000000 | |
24062 | ! Mem[00000000100c1400] = 000000ff, %l1 = 00000000000000ff | |
24063 | lduwa [%i3+%g0]0x80,%l1 ! %l1 = 00000000000000ff | |
24064 | ! Mem[0000000010001408] = 00000000 00000000, %l0 = 000000ff, %l1 = 000000ff | |
24065 | ldda [%i0+%o4]0x88,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
24066 | ! Mem[0000000030141400] = 00000000ffffff00, %f14 = ff8091bb 759a4764 | |
24067 | ldda [%i5+%g0]0x89,%f14 ! %f14 = 00000000 ffffff00 | |
24068 | ! Mem[0000000010041400] = 00000000, %l6 = 000000000000ffff | |
24069 | ldswa [%i1+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
24070 | ! Mem[0000000010181408] = 00000000 8ab6ff9c, %l0 = 00000000, %l1 = 00000000 | |
24071 | ldda [%i6+%o4]0x80,%l0 ! %l0 = 0000000000000000 000000008ab6ff9c | |
24072 | ! Mem[0000000030041410] = 759a4764ffffff00, %l7 = 00000000000000ff | |
24073 | ldxa [%i1+%o5]0x89,%l7 ! %l7 = 759a4764ffffff00 | |
24074 | ! Mem[00000000100c1400] = 000000ff, %l5 = 0000000064000000 | |
24075 | lduha [%i3+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
24076 | ! Starting 10 instruction Store Burst | |
24077 | ! %l2 = 000000000000ff00, Mem[0000000020800000] = ff000db6, %asi = 80 | |
24078 | stha %l2,[%o1+0x000]%asi ! Mem[0000000020800000] = ff000db6 | |
24079 | ||
24080 | p0_label_570: | |
24081 | ! %l1 = 000000008ab6ff9c, Mem[0000000020800040] = ffff9ffa | |
24082 | stb %l1,[%o1+0x040] ! Mem[0000000020800040] = 9cff9ffa | |
24083 | ! %l0 = 0000000000000000, Mem[00000000100c1400] = 000000ff | |
24084 | stba %l0,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 000000ff | |
24085 | ! %f0 = 00000000 ff000000, Mem[0000000010081408] = ffffffff 00000000 | |
24086 | stda %f0 ,[%i2+%o4]0x88 ! Mem[0000000010081408] = 00000000 ff000000 | |
24087 | ! %f4 = 00000000 8ab6ff9c, Mem[0000000030081410] = ffffff00 00000000 | |
24088 | stda %f4 ,[%i2+%o5]0x81 ! Mem[0000000030081410] = 00000000 8ab6ff9c | |
24089 | ! %f6 = ffffffff 00000000, Mem[0000000010181408] = 00000000 9cffb68a | |
24090 | stda %f6 ,[%i6+%o4]0x88 ! Mem[0000000010181408] = ffffffff 00000000 | |
24091 | ! %f4 = 00000000 8ab6ff9c, Mem[0000000030141408] = ffffffff 0000ffff | |
24092 | stda %f4 ,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 8ab6ff9c | |
24093 | ! Mem[00000000100c143c] = 5e27ffff, %l7 = 759a4764ffffff00 | |
24094 | ldstub [%i3+0x03c],%l7 ! %l7 = 0000005e000000ff | |
24095 | ! %l6 = 0000000000000000, Mem[0000000010141408] = 00000795, %asi = 80 | |
24096 | stwa %l6,[%i5+0x008]%asi ! Mem[0000000010141408] = 00000000 | |
24097 | ! %l0 = 00000000, %l1 = 8ab6ff9c, Mem[0000000030141400] = ffffff00 00000000 | |
24098 | stda %l0,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000 8ab6ff9c | |
24099 | ! Starting 10 instruction Load Burst | |
24100 | ! Mem[00000000300c1400] = ffffff64, %l5 = 0000000000000000 | |
24101 | ldswa [%i3+%g0]0x81,%l5 ! %l5 = ffffffffffffff64 | |
24102 | ||
24103 | ! Check Point 114 for processor 0 | |
24104 | ||
24105 | set p0_check_pt_data_114,%g4 | |
24106 | rd %ccr,%g5 ! %g5 = 44 | |
24107 | ldx [%g4+0x08],%g2 | |
24108 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
24109 | bne %xcc,p0_reg_check_fail0 | |
24110 | mov 0xee0,%g1 | |
24111 | ldx [%g4+0x10],%g2 | |
24112 | cmp %l1,%g2 ! %l1 = 000000008ab6ff9c | |
24113 | bne %xcc,p0_reg_check_fail1 | |
24114 | mov 0xee1,%g1 | |
24115 | ldx [%g4+0x18],%g2 | |
24116 | cmp %l2,%g2 ! %l2 = 000000000000ff00 | |
24117 | bne %xcc,p0_reg_check_fail2 | |
24118 | mov 0xee2,%g1 | |
24119 | ldx [%g4+0x20],%g2 | |
24120 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
24121 | bne %xcc,p0_reg_check_fail3 | |
24122 | mov 0xee3,%g1 | |
24123 | ldx [%g4+0x28],%g2 | |
24124 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
24125 | bne %xcc,p0_reg_check_fail4 | |
24126 | mov 0xee4,%g1 | |
24127 | ldx [%g4+0x30],%g2 | |
24128 | cmp %l5,%g2 ! %l5 = ffffffffffffff64 | |
24129 | bne %xcc,p0_reg_check_fail5 | |
24130 | mov 0xee5,%g1 | |
24131 | ldx [%g4+0x38],%g2 | |
24132 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
24133 | bne %xcc,p0_reg_check_fail6 | |
24134 | mov 0xee6,%g1 | |
24135 | ldx [%g4+0x40],%g2 | |
24136 | cmp %l7,%g2 ! %l7 = 000000000000005e | |
24137 | bne %xcc,p0_reg_check_fail7 | |
24138 | mov 0xee7,%g1 | |
24139 | ldx [%g4+0x48],%g3 | |
24140 | std %f0,[%g4] | |
24141 | ldx [%g4],%g2 | |
24142 | cmp %g3,%g2 ! %f0 = 00000000 ff000000 | |
24143 | bne %xcc,p0_freg_check_fail | |
24144 | mov 0xf00,%g1 | |
24145 | ldx [%g4+0x50],%g3 | |
24146 | std %f4,[%g4] | |
24147 | ldx [%g4],%g2 | |
24148 | cmp %g3,%g2 ! %f4 = 00000000 8ab6ff9c | |
24149 | bne %xcc,p0_freg_check_fail | |
24150 | mov 0xf04,%g1 | |
24151 | ldx [%g4+0x58],%g3 | |
24152 | std %f10,[%g4] | |
24153 | ldx [%g4],%g2 | |
24154 | cmp %g3,%g2 ! %f10 = ffffffff 00000000 | |
24155 | bne %xcc,p0_freg_check_fail | |
24156 | mov 0xf10,%g1 | |
24157 | ldx [%g4+0x60],%g3 | |
24158 | std %f14,[%g4] | |
24159 | ldx [%g4],%g2 | |
24160 | cmp %g3,%g2 ! %f14 = 00000000 ffffff00 | |
24161 | bne %xcc,p0_freg_check_fail | |
24162 | mov 0xf14,%g1 | |
24163 | ldx [%g4+0x68],%g3 | |
24164 | std %f16,[%g4] | |
24165 | ldx [%g4],%g2 | |
24166 | cmp %g3,%g2 ! %f16 = 00000000 0000759a | |
24167 | bne %xcc,p0_freg_check_fail | |
24168 | mov 0xf16,%g1 | |
24169 | ldx [%g4+0x70],%g3 | |
24170 | std %f18,[%g4] | |
24171 | ldx [%g4],%g2 | |
24172 | cmp %g3,%g2 ! %f18 = 00000000 00000000 | |
24173 | bne %xcc,p0_freg_check_fail | |
24174 | mov 0xf18,%g1 | |
24175 | ldx [%g4+0x78],%g3 | |
24176 | std %f20,[%g4] | |
24177 | ldx [%g4],%g2 | |
24178 | cmp %g3,%g2 ! %f20 = 00000000 00ff0000 | |
24179 | bne %xcc,p0_freg_check_fail | |
24180 | mov 0xf20,%g1 | |
24181 | ldx [%g4+0x80],%g3 | |
24182 | std %f22,[%g4] | |
24183 | ldx [%g4],%g2 | |
24184 | cmp %g3,%g2 ! %f22 = 00000000 ffff0000 | |
24185 | bne %xcc,p0_freg_check_fail | |
24186 | mov 0xf22,%g1 | |
24187 | ldx [%g4+0x88],%g3 | |
24188 | std %f24,[%g4] | |
24189 | ldx [%g4],%g2 | |
24190 | cmp %g3,%g2 ! %f24 = 00000000 64479a75 | |
24191 | bne %xcc,p0_freg_check_fail | |
24192 | mov 0xf24,%g1 | |
24193 | ldx [%g4+0x90],%g3 | |
24194 | std %f26,[%g4] | |
24195 | ldx [%g4],%g2 | |
24196 | cmp %g3,%g2 ! %f26 = 0000ffff a3ffade0 | |
24197 | bne %xcc,p0_freg_check_fail | |
24198 | mov 0xf26,%g1 | |
24199 | ldx [%g4+0x98],%g3 | |
24200 | std %f28,[%g4] | |
24201 | ldx [%g4],%g2 | |
24202 | cmp %g3,%g2 ! %f28 = 00000000 00000000 | |
24203 | bne %xcc,p0_freg_check_fail | |
24204 | mov 0xf28,%g1 | |
24205 | ldx [%g4+0xa0],%g3 | |
24206 | std %f30,[%g4] | |
24207 | ldx [%g4],%g2 | |
24208 | cmp %g3,%g2 ! %f30 = 759a4764 00000000 | |
24209 | bne %xcc,p0_freg_check_fail | |
24210 | mov 0xf30,%g1 | |
24211 | ||
24212 | ! Check Point 114 completed | |
24213 | ||
24214 | ||
24215 | p0_label_571: | |
24216 | ! Mem[0000000010081410] = ff8091bb, %l5 = ffffffffffffff64 | |
24217 | lduwa [%i2+0x010]%asi,%l5 ! %l5 = 00000000ff8091bb | |
24218 | ! Mem[0000000010101400] = 00005e27, %f6 = ffffffff | |
24219 | lda [%i4+%g0]0x80,%f6 ! %f6 = 00005e27 | |
24220 | ! Mem[0000000010041400] = 00000000, %l7 = 000000000000005e | |
24221 | lduha [%i1+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
24222 | ! Mem[0000000030181410] = ff000000, %l0 = 0000000000000000 | |
24223 | ldswa [%i6+%o5]0x81,%l0 ! %l0 = ffffffffff000000 | |
24224 | ! Mem[0000000010101420] = ff0000ff, %l2 = 000000000000ff00 | |
24225 | ldsh [%i4+0x022],%l2 ! %l2 = 00000000000000ff | |
24226 | ! Mem[0000000030101400] = ff000000, %l3 = 0000000000000000 | |
24227 | ldsha [%i4+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
24228 | ! Mem[0000000030001400] = 000000ff ff000000, %l4 = 00000000, %l5 = ff8091bb | |
24229 | ldda [%i0+%g0]0x81,%l4 ! %l4 = 00000000000000ff 00000000ff000000 | |
24230 | ! Mem[0000000010101400] = ffffffff 275e0000, %l2 = 000000ff, %l3 = 00000000 | |
24231 | ldda [%i4+%g0]0x88,%l2 ! %l2 = 00000000275e0000 00000000ffffffff | |
24232 | ! Mem[0000000030181410] = 000000ff, %l5 = 00000000ff000000 | |
24233 | lduba [%i6+%o5]0x89,%l5 ! %l5 = 00000000000000ff | |
24234 | ! Starting 10 instruction Store Burst | |
24235 | ! %l7 = 0000000000000000, Mem[0000000010101400] = 275e0000 | |
24236 | stwa %l7,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 | |
24237 | ||
24238 | p0_label_572: | |
24239 | membar #Sync ! Added by membar checker (110) | |
24240 | ! %l6 = 00000000, %l7 = 00000000, Mem[0000000010001410] = 00000000 00ff0000 | |
24241 | stda %l6,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 00000000 | |
24242 | ! Mem[0000000010101408] = 00000000, %l6 = 0000000000000000 | |
24243 | swapa [%i4+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
24244 | ! %l3 = 00000000ffffffff, Mem[0000000030001410] = 8ab60000 | |
24245 | stba %l3,[%i0+%o5]0x89 ! Mem[0000000030001410] = 8ab600ff | |
24246 | ! %l4 = 00000000000000ff, Mem[00000000201c0001] = 00001669 | |
24247 | stb %l4,[%o0+0x001] ! Mem[00000000201c0000] = 00ff1669 | |
24248 | ! Mem[0000000010101400] = 00000000, %l1 = 000000008ab6ff9c, %asi = 80 | |
24249 | swapa [%i4+0x000]%asi,%l1 ! %l1 = 0000000000000000 | |
24250 | ! Mem[0000000030101408] = ff000000, %l3 = 00000000ffffffff | |
24251 | swapa [%i4+%o4]0x81,%l3 ! %l3 = 00000000ff000000 | |
24252 | ! %l2 = 275e0000, %l3 = ff000000, Mem[0000000010081410] = bb9180ff 64479a75 | |
24253 | stda %l2,[%i2+%o5]0x88 ! Mem[0000000010081410] = 275e0000 ff000000 | |
24254 | ! Mem[000000001000140c] = 00000000, %l3 = 00000000ff000000 | |
24255 | lduw [%i0+0x00c],%l3 ! %l3 = 0000000000000000 | |
24256 | ! %l1 = 0000000000000000, Mem[00000000100c1408] = ffffff0000000000 | |
24257 | stxa %l1,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 0000000000000000 | |
24258 | ! Starting 10 instruction Load Burst | |
24259 | ! Mem[0000000030141410] = ffffffffffffffff, %l3 = 0000000000000000 | |
24260 | ldxa [%i5+%o5]0x81,%l3 ! %l3 = ffffffffffffffff | |
24261 | ||
24262 | p0_label_573: | |
24263 | ! Mem[0000000010001414] = 00000000, %l0 = ffffffffff000000 | |
24264 | lduw [%i0+0x014],%l0 ! %l0 = 0000000000000000 | |
24265 | ! Mem[0000000010081418] = 00000000, %l4 = 00000000000000ff | |
24266 | ldswa [%i2+0x018]%asi,%l4 ! %l4 = 0000000000000000 | |
24267 | ! Mem[0000000030081400] = 0000ffff, %l2 = 00000000275e0000 | |
24268 | lduba [%i2+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
24269 | ! Mem[0000000030081410] = 00000000, %f9 = 00000000 | |
24270 | lda [%i2+%o5]0x81,%f9 ! %f9 = 00000000 | |
24271 | ! Mem[0000000010041424] = ff8091bb, %l6 = 0000000000000000 | |
24272 | swap [%i1+0x024],%l6 ! %l6 = 00000000ff8091bb | |
24273 | ! Mem[0000000030141408] = 00000000, %l6 = 00000000ff8091bb | |
24274 | ldsba [%i5+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
24275 | ! Mem[0000000010041408] = 000000ff00000000, %l4 = 0000000000000000 | |
24276 | ldxa [%i1+%o4]0x80,%l4 ! %l4 = 000000ff00000000 | |
24277 | ! Mem[0000000030001400] = 000000ff, %l1 = 0000000000000000 | |
24278 | lduha [%i0+%g0]0x81,%l1 ! %l1 = 0000000000000000 | |
24279 | ! Mem[0000000030081410] = 00000000, %f28 = 00000000 | |
24280 | lda [%i2+%o5]0x89,%f28 ! %f28 = 00000000 | |
24281 | ! Starting 10 instruction Store Burst | |
24282 | ! %l5 = 00000000000000ff, Mem[0000000010181410] = 000000ff | |
24283 | stha %l5,[%i6+%o5]0x88 ! Mem[0000000010181410] = 000000ff | |
24284 | ||
24285 | p0_label_574: | |
24286 | ! Mem[0000000010181410] = ff00000000000000, %l5 = 00000000000000ff, %l3 = ffffffffffffffff | |
24287 | add %i6,0x10,%g1 | |
24288 | casxa [%g1]0x80,%l5,%l3 ! %l3 = ff00000000000000 | |
24289 | ! %l0 = 0000000000000000, Mem[0000000030141410] = ffffffff | |
24290 | stwa %l0,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00000000 | |
24291 | ! %f27 = a3ffade0, Mem[0000000030181400] = ffffffff | |
24292 | sta %f27,[%i6+%g0]0x89 ! Mem[0000000030181400] = a3ffade0 | |
24293 | ! %l7 = 0000000000000000, Mem[0000000010101408] = 00000000 | |
24294 | stba %l7,[%i4+%o4]0x88 ! Mem[0000000010101408] = 00000000 | |
24295 | ! %f5 = 8ab6ff9c, Mem[0000000010001400] = 00000000 | |
24296 | sta %f5 ,[%i0+%g0]0x88 ! Mem[0000000010001400] = 8ab6ff9c | |
24297 | ! Mem[0000000010081400] = 00000000, %l6 = 0000000000000000 | |
24298 | swapa [%i2+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
24299 | ! Mem[0000000010101400] = 9cffb68a, %l0 = 0000000000000000 | |
24300 | swapa [%i4+%g0]0x88,%l0 ! %l0 = 000000009cffb68a | |
24301 | ! Mem[0000000010141410] = ffffffff, %l0 = 000000009cffb68a | |
24302 | swapa [%i5+%o5]0x80,%l0 ! %l0 = 00000000ffffffff | |
24303 | ! %l4 = 000000ff00000000, Mem[0000000010101428] = 5e9e1157, %asi = 80 | |
24304 | stha %l4,[%i4+0x028]%asi ! Mem[0000000010101428] = 00001157 | |
24305 | ! Starting 10 instruction Load Burst | |
24306 | ! Mem[00000000100c1410] = 5e000000, %l2 = 00000000000000ff | |
24307 | lduba [%i3+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
24308 | ||
24309 | p0_label_575: | |
24310 | ! Mem[0000000030081400] = ffff0000, %l0 = 00000000ffffffff | |
24311 | lduba [%i2+%g0]0x81,%l0 ! %l0 = 00000000000000ff | |
24312 | ! Mem[0000000030181408] = ff00000000000000, %f16 = 00000000 0000759a | |
24313 | ldda [%i6+%o4]0x89,%f16 ! %f16 = ff000000 00000000 | |
24314 | ! Mem[00000000211c0000] = fffffe0c, %l6 = 0000000000000000 | |
24315 | lduha [%o2+0x000]%asi,%l6 ! %l6 = 000000000000ffff | |
24316 | ! Mem[0000000030181400] = e0adffa3, %l6 = 000000000000ffff | |
24317 | ldsha [%i6+%g0]0x81,%l6 ! %l6 = ffffffffffffe0ad | |
24318 | ! Mem[0000000030001408] = 00000000, %l0 = 00000000000000ff | |
24319 | lduwa [%i0+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
24320 | ! Mem[0000000010041400] = 00000000, %l0 = 0000000000000000 | |
24321 | lduw [%i1+%g0],%l0 ! %l0 = 0000000000000000 | |
24322 | ! Mem[0000000010181400] = ffffffff00000000, %l2 = 0000000000000000 | |
24323 | ldxa [%i6+%g0]0x88,%l2 ! %l2 = ffffffff00000000 | |
24324 | ! Mem[00000000211c0000] = fffffe0c, %l1 = 0000000000000000 | |
24325 | ldub [%o2+0x001],%l1 ! %l1 = 00000000000000ff | |
24326 | ! Mem[0000000010101400] = ffffffff 00000000, %l0 = 00000000, %l1 = 000000ff | |
24327 | ldda [%i4+%g0]0x88,%l0 ! %l0 = 0000000000000000 00000000ffffffff | |
24328 | ! Starting 10 instruction Store Burst | |
24329 | ! %l0 = 00000000, %l1 = ffffffff, Mem[0000000010081430] = 00000000 0000ffff | |
24330 | std %l0,[%i2+0x030] ! Mem[0000000010081430] = 00000000 ffffffff | |
24331 | ||
24332 | ! Check Point 115 for processor 0 | |
24333 | ||
24334 | set p0_check_pt_data_115,%g4 | |
24335 | rd %ccr,%g5 ! %g5 = 44 | |
24336 | ldx [%g4+0x08],%g2 | |
24337 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
24338 | bne %xcc,p0_reg_check_fail0 | |
24339 | mov 0xee0,%g1 | |
24340 | ldx [%g4+0x10],%g2 | |
24341 | cmp %l1,%g2 ! %l1 = 00000000ffffffff | |
24342 | bne %xcc,p0_reg_check_fail1 | |
24343 | mov 0xee1,%g1 | |
24344 | ldx [%g4+0x18],%g2 | |
24345 | cmp %l2,%g2 ! %l2 = ffffffff00000000 | |
24346 | bne %xcc,p0_reg_check_fail2 | |
24347 | mov 0xee2,%g1 | |
24348 | ldx [%g4+0x20],%g2 | |
24349 | cmp %l3,%g2 ! %l3 = ff00000000000000 | |
24350 | bne %xcc,p0_reg_check_fail3 | |
24351 | mov 0xee3,%g1 | |
24352 | ldx [%g4+0x28],%g2 | |
24353 | cmp %l4,%g2 ! %l4 = 000000ff00000000 | |
24354 | bne %xcc,p0_reg_check_fail4 | |
24355 | mov 0xee4,%g1 | |
24356 | ldx [%g4+0x30],%g2 | |
24357 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
24358 | bne %xcc,p0_reg_check_fail5 | |
24359 | mov 0xee5,%g1 | |
24360 | ldx [%g4+0x38],%g2 | |
24361 | cmp %l6,%g2 ! %l6 = ffffffffffffe0ad | |
24362 | bne %xcc,p0_reg_check_fail6 | |
24363 | mov 0xee6,%g1 | |
24364 | ldx [%g4+0x40],%g2 | |
24365 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
24366 | bne %xcc,p0_reg_check_fail7 | |
24367 | mov 0xee7,%g1 | |
24368 | ldx [%g4+0x48],%g3 | |
24369 | std %f0,[%g4] | |
24370 | ldx [%g4],%g2 | |
24371 | cmp %g3,%g2 ! %f0 = 00000000 ff000000 | |
24372 | bne %xcc,p0_freg_check_fail | |
24373 | mov 0xf00,%g1 | |
24374 | ldx [%g4+0x50],%g3 | |
24375 | std %f2,[%g4] | |
24376 | ldx [%g4],%g2 | |
24377 | cmp %g3,%g2 ! %f2 = 00000000 000000ff | |
24378 | bne %xcc,p0_freg_check_fail | |
24379 | mov 0xf02,%g1 | |
24380 | ldx [%g4+0x58],%g3 | |
24381 | std %f4,[%g4] | |
24382 | ldx [%g4],%g2 | |
24383 | cmp %g3,%g2 ! %f4 = 00000000 8ab6ff9c | |
24384 | bne %xcc,p0_freg_check_fail | |
24385 | mov 0xf04,%g1 | |
24386 | ldx [%g4+0x60],%g3 | |
24387 | std %f6,[%g4] | |
24388 | ldx [%g4],%g2 | |
24389 | cmp %g3,%g2 ! %f6 = 00005e27 00000000 | |
24390 | bne %xcc,p0_freg_check_fail | |
24391 | mov 0xf06,%g1 | |
24392 | ldx [%g4+0x68],%g3 | |
24393 | std %f8,[%g4] | |
24394 | ldx [%g4],%g2 | |
24395 | cmp %g3,%g2 ! %f8 = 00000000 00000000 | |
24396 | bne %xcc,p0_freg_check_fail | |
24397 | mov 0xf08,%g1 | |
24398 | ldx [%g4+0x70],%g3 | |
24399 | std %f16,[%g4] | |
24400 | ldx [%g4],%g2 | |
24401 | cmp %g3,%g2 ! %f16 = ff000000 00000000 | |
24402 | bne %xcc,p0_freg_check_fail | |
24403 | mov 0xf16,%g1 | |
24404 | ldx [%g4+0x78],%g3 | |
24405 | std %f28,[%g4] | |
24406 | ldx [%g4],%g2 | |
24407 | cmp %g3,%g2 ! %f28 = 00000000 00000000 | |
24408 | bne %xcc,p0_freg_check_fail | |
24409 | mov 0xf28,%g1 | |
24410 | ||
24411 | ! Check Point 115 completed | |
24412 | ||
24413 | ||
24414 | p0_label_576: | |
24415 | ! %l0 = 00000000, %l1 = ffffffff, Mem[0000000010001420] = 00000000 64479a75 | |
24416 | std %l0,[%i0+0x020] ! Mem[0000000010001420] = 00000000 ffffffff | |
24417 | ! %l3 = ff00000000000000, Mem[0000000010101400] = 00000000 | |
24418 | stba %l3,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00000000 | |
24419 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010001418] = 00000000 ffff0000 | |
24420 | stda %l2,[%i0+0x018]%asi ! Mem[0000000010001418] = 00000000 00000000 | |
24421 | ! %l7 = 0000000000000000, Mem[0000000030141408] = 00000000 | |
24422 | stha %l7,[%i5+%o4]0x89 ! Mem[0000000030141408] = 00000000 | |
24423 | ! %l0 = 0000000000000000, Mem[0000000010001404] = 0000759a | |
24424 | sth %l0,[%i0+0x004] ! Mem[0000000010001404] = 0000759a | |
24425 | ! Mem[0000000010081400] = 00000000, %l4 = 000000ff00000000 | |
24426 | ldstuba [%i2+%g0]0x80,%l4 ! %l4 = 00000000000000ff | |
24427 | ! %l4 = 0000000000000000, Mem[000000001010140a] = 00000000 | |
24428 | stb %l4,[%i4+0x00a] ! Mem[0000000010101408] = 00000000 | |
24429 | ! Mem[00000000100c1400] = ff000000, %l0 = 0000000000000000 | |
24430 | swapa [%i3+%g0]0x88,%l0 ! %l0 = 00000000ff000000 | |
24431 | ! %f0 = 00000000 ff000000 00000000 000000ff | |
24432 | ! %f4 = 00000000 8ab6ff9c 00005e27 00000000 | |
24433 | ! %f8 = 00000000 00000000 ffffffff 00000000 | |
24434 | ! %f12 = 000000ff ffffff00 00000000 ffffff00 | |
24435 | stda %f0,[%i5]ASI_BLK_P ! Block Store to 0000000010141400 | |
24436 | ! Starting 10 instruction Load Burst | |
24437 | ! Mem[0000000030101410] = 00000000, %l6 = ffffffffffffe0ad | |
24438 | lduha [%i4+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
24439 | ||
24440 | p0_label_577: | |
24441 | membar #Sync ! Added by membar checker (111) | |
24442 | ! Mem[0000000010141420] = 00000000, %l5 = 00000000000000ff | |
24443 | ldsb [%i5+0x020],%l5 ! %l5 = 0000000000000000 | |
24444 | ! Mem[00000000100c1408] = 00000000, %l2 = ffffffff00000000 | |
24445 | ldsha [%i3+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
24446 | ! Mem[0000000030101400] = 000000ff, %l6 = 0000000000000000 | |
24447 | lduwa [%i4+%g0]0x81,%l6 ! %l6 = 00000000000000ff | |
24448 | ! Mem[0000000021800180] = ffffdb07, %l4 = 0000000000000000 | |
24449 | ldub [%o3+0x180],%l4 ! %l4 = 00000000000000ff | |
24450 | ! Mem[00000000100c1408] = 0000000000000000, %f0 = 00000000 ff000000 | |
24451 | ldda [%i3+%o4]0x80,%f0 ! %f0 = 00000000 00000000 | |
24452 | ! Mem[00000000300c1410] = ff00000000000000, %l0 = 00000000ff000000 | |
24453 | ldxa [%i3+%o5]0x89,%l0 ! %l0 = ff00000000000000 | |
24454 | ! Mem[0000000010181410] = ff000000, %l1 = 00000000ffffffff | |
24455 | lduba [%i6+%o5]0x80,%l1 ! %l1 = 00000000000000ff | |
24456 | ! Mem[0000000030081408] = 000000ff, %l6 = 00000000000000ff | |
24457 | lduha [%i2+%o4]0x81,%l6 ! %l6 = 0000000000000000 | |
24458 | ! Mem[0000000030081410] = 00000000, %l3 = ff00000000000000 | |
24459 | lduwa [%i2+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
24460 | ! Starting 10 instruction Store Burst | |
24461 | ! Mem[00000000300c1408] = ffff0000, %l5 = 0000000000000000 | |
24462 | ldstuba [%i3+%o4]0x81,%l5 ! %l5 = 000000ff000000ff | |
24463 | ||
24464 | p0_label_578: | |
24465 | ! %l0 = 00000000, %l1 = 000000ff, Mem[0000000030101400] = 000000ff ffffff00 | |
24466 | stda %l0,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 000000ff | |
24467 | ! %l2 = 0000000000000000, Mem[00000000100c1408] = 00000000 | |
24468 | stwa %l2,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00000000 | |
24469 | ! %f2 = 00000000 000000ff, Mem[00000000100c1408] = 00000000 00000000 | |
24470 | stda %f2 ,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000 000000ff | |
24471 | ! %l4 = 000000ff, %l5 = 000000ff, Mem[0000000010041410] = 00000000 000000ff | |
24472 | stda %l4,[%i1+%o5]0x80 ! Mem[0000000010041410] = 000000ff 000000ff | |
24473 | ! Mem[0000000010041400] = 00000000, %l0 = ff00000000000000 | |
24474 | swapa [%i1+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
24475 | ! Mem[0000000010181408] = 00000000, %l1 = 00000000000000ff | |
24476 | ldstuba [%i6+%o4]0x88,%l1 ! %l1 = 00000000000000ff | |
24477 | ! Mem[0000000010141400] = 00000000ff000000, %l2 = 0000000000000000, %l4 = 00000000000000ff | |
24478 | casxa [%i5]0x80,%l2,%l4 ! %l4 = 00000000ff000000 | |
24479 | ! %f29 = 00000000, Mem[0000000030001400] = ff000000 | |
24480 | sta %f29,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00000000 | |
24481 | ! %l6 = 0000000000000000, Mem[0000000010101408] = ff00000000000000 | |
24482 | stxa %l6,[%i4+%o4]0x88 ! Mem[0000000010101408] = 0000000000000000 | |
24483 | ! Starting 10 instruction Load Burst | |
24484 | ! Mem[0000000030041400] = ffffffffffffffff, %f26 = 0000ffff a3ffade0 | |
24485 | ldda [%i1+%g0]0x81,%f26 ! %f26 = ffffffff ffffffff | |
24486 | ||
24487 | p0_label_579: | |
24488 | ! Mem[0000000030181408] = 00000000 000000ff, %l2 = 00000000, %l3 = 00000000 | |
24489 | ldda [%i6+%o4]0x81,%l2 ! %l2 = 0000000000000000 00000000000000ff | |
24490 | ! Mem[0000000010141408] = ff00000000000000, %l4 = 00000000ff000000 | |
24491 | ldxa [%i5+%o4]0x88,%l4 ! %l4 = ff00000000000000 | |
24492 | ! Mem[0000000010101418] = 00000000, %l4 = ff00000000000000 | |
24493 | ldub [%i4+0x01b],%l4 ! %l4 = 0000000000000000 | |
24494 | ! Mem[00000000300c1408] = 0000ffff, %l2 = 0000000000000000 | |
24495 | lduwa [%i3+%o4]0x89,%l2 ! %l2 = 000000000000ffff | |
24496 | ! Mem[00000000100c1408] = ff000000, %l0 = 0000000000000000 | |
24497 | ldsha [%i3+%o4]0x80,%l0 ! %l0 = ffffffffffffff00 | |
24498 | ! Mem[0000000010001408] = 00000000, %f21 = 00ff0000 | |
24499 | ld [%i0+%o4],%f21 ! %f21 = 00000000 | |
24500 | ! Mem[0000000030101410] = 0000000064000000, %l6 = 0000000000000000 | |
24501 | ldxa [%i4+%o5]0x81,%l6 ! %l6 = 0000000064000000 | |
24502 | ! Mem[0000000020800000] = ff000db6, %l4 = 0000000000000000 | |
24503 | ldsh [%o1+%g0],%l4 ! %l4 = ffffffffffffff00 | |
24504 | ! Mem[00000000300c1410] = ff00000000000000, %f30 = 759a4764 00000000 | |
24505 | ldda [%i3+%o5]0x89,%f30 ! %f30 = ff000000 00000000 | |
24506 | ! Starting 10 instruction Store Burst | |
24507 | ! %l3 = 00000000000000ff, Mem[0000000010141400] = 00000000 | |
24508 | stha %l3,[%i5+%g0]0x88 ! Mem[0000000010141400] = 000000ff | |
24509 | ||
24510 | p0_label_580: | |
24511 | ! %l4 = ffffffffffffff00, Mem[0000000030101408] = ffffffff | |
24512 | stha %l4,[%i4+%o4]0x81 ! Mem[0000000030101408] = ff00ffff | |
24513 | ! Mem[0000000010181400] = 00000000, %l5 = 00000000000000ff | |
24514 | ldstuba [%i6+%g0]0x80,%l5 ! %l5 = 00000000000000ff | |
24515 | ! %f19 = 00000000, Mem[0000000010041408] = 000000ff | |
24516 | sta %f19,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00000000 | |
24517 | ! %l6 = 0000000064000000, Mem[0000000030001400] = 00000000 | |
24518 | stba %l6,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00000000 | |
24519 | ! Mem[0000000010001408] = 00000000, %l3 = 00000000000000ff | |
24520 | swapa [%i0+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
24521 | ! %f1 = 00000000, Mem[0000000030141410] = 00000000 | |
24522 | sta %f1 ,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00000000 | |
24523 | ! Mem[0000000030101410] = 00000000, %l6 = 0000000064000000 | |
24524 | swapa [%i4+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
24525 | ! %l6 = 0000000000000000, Mem[00000000201c0001] = 00ff1669 | |
24526 | stb %l6,[%o0+0x001] ! Mem[00000000201c0000] = 00001669 | |
24527 | ! %f19 = 00000000, Mem[0000000010081408] = 000000ff | |
24528 | sta %f19,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00000000 | |
24529 | ! Starting 10 instruction Load Burst | |
24530 | ! Mem[00000000300c1400] = ffffff64, %l5 = 0000000000000000 | |
24531 | lduha [%i3+%g0]0x81,%l5 ! %l5 = 000000000000ffff | |
24532 | ||
24533 | ! Check Point 116 for processor 0 | |
24534 | ||
24535 | set p0_check_pt_data_116,%g4 | |
24536 | rd %ccr,%g5 ! %g5 = 44 | |
24537 | ldx [%g4+0x08],%g2 | |
24538 | cmp %l0,%g2 ! %l0 = ffffffffffffff00 | |
24539 | bne %xcc,p0_reg_check_fail0 | |
24540 | mov 0xee0,%g1 | |
24541 | ldx [%g4+0x10],%g2 | |
24542 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
24543 | bne %xcc,p0_reg_check_fail1 | |
24544 | mov 0xee1,%g1 | |
24545 | ldx [%g4+0x18],%g2 | |
24546 | cmp %l2,%g2 ! %l2 = 000000000000ffff | |
24547 | bne %xcc,p0_reg_check_fail2 | |
24548 | mov 0xee2,%g1 | |
24549 | ldx [%g4+0x20],%g2 | |
24550 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
24551 | bne %xcc,p0_reg_check_fail3 | |
24552 | mov 0xee3,%g1 | |
24553 | ldx [%g4+0x28],%g2 | |
24554 | cmp %l4,%g2 ! %l4 = ffffffffffffff00 | |
24555 | bne %xcc,p0_reg_check_fail4 | |
24556 | mov 0xee4,%g1 | |
24557 | ldx [%g4+0x30],%g2 | |
24558 | cmp %l5,%g2 ! %l5 = 000000000000ffff | |
24559 | bne %xcc,p0_reg_check_fail5 | |
24560 | mov 0xee5,%g1 | |
24561 | ldx [%g4+0x38],%g2 | |
24562 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
24563 | bne %xcc,p0_reg_check_fail6 | |
24564 | mov 0xee6,%g1 | |
24565 | ldx [%g4+0x40],%g3 | |
24566 | std %f0,[%g4] | |
24567 | ldx [%g4],%g2 | |
24568 | cmp %g3,%g2 ! %f0 = 00000000 00000000 | |
24569 | bne %xcc,p0_freg_check_fail | |
24570 | mov 0xf00,%g1 | |
24571 | ldx [%g4+0x48],%g3 | |
24572 | std %f2,[%g4] | |
24573 | ldx [%g4],%g2 | |
24574 | cmp %g3,%g2 ! %f2 = 00000000 000000ff | |
24575 | bne %xcc,p0_freg_check_fail | |
24576 | mov 0xf02,%g1 | |
24577 | ldx [%g4+0x50],%g3 | |
24578 | std %f20,[%g4] | |
24579 | ldx [%g4],%g2 | |
24580 | cmp %g3,%g2 ! %f20 = 00000000 00000000 | |
24581 | bne %xcc,p0_freg_check_fail | |
24582 | mov 0xf20,%g1 | |
24583 | ldx [%g4+0x58],%g3 | |
24584 | std %f26,[%g4] | |
24585 | ldx [%g4],%g2 | |
24586 | cmp %g3,%g2 ! %f26 = ffffffff ffffffff | |
24587 | bne %xcc,p0_freg_check_fail | |
24588 | mov 0xf26,%g1 | |
24589 | ldx [%g4+0x60],%g3 | |
24590 | std %f30,[%g4] | |
24591 | ldx [%g4],%g2 | |
24592 | cmp %g3,%g2 ! %f30 = ff000000 00000000 | |
24593 | bne %xcc,p0_freg_check_fail | |
24594 | mov 0xf30,%g1 | |
24595 | ||
24596 | ! Check Point 116 completed | |
24597 | ||
24598 | ||
24599 | p0_label_581: | |
24600 | ! Mem[0000000030041400] = ffffffff ffffffff, %l4 = ffffff00, %l5 = 0000ffff | |
24601 | ldda [%i1+%g0]0x81,%l4 ! %l4 = 00000000ffffffff 00000000ffffffff | |
24602 | ! Mem[0000000030181400] = e0adffa3, %l2 = 000000000000ffff | |
24603 | ldsba [%i6+%g0]0x81,%l2 ! %l2 = ffffffffffffffe0 | |
24604 | ! Mem[0000000030181400] = a3ffade0, %l1 = 0000000000000000 | |
24605 | lduwa [%i6+%g0]0x89,%l1 ! %l1 = 00000000a3ffade0 | |
24606 | ! Mem[0000000010001410] = 00000000, %l5 = 00000000ffffffff | |
24607 | lduwa [%i0+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
24608 | ! Mem[00000000211c0000] = fffffe0c, %l2 = ffffffffffffffe0 | |
24609 | ldsh [%o2+%g0],%l2 ! %l2 = ffffffffffffffff | |
24610 | ! Mem[00000000100c1414] = 000000ff, %f22 = 00000000 | |
24611 | ld [%i3+0x014],%f22 ! %f22 = 000000ff | |
24612 | ! Mem[00000000211c0000] = fffffe0c, %l3 = 0000000000000000 | |
24613 | ldsh [%o2+%g0],%l3 ! %l3 = ffffffffffffffff | |
24614 | ! Mem[00000000100c1400] = 5e00ff0000000000, %l0 = ffffffffffffff00 | |
24615 | ldxa [%i3+%g0]0x88,%l0 ! %l0 = 5e00ff0000000000 | |
24616 | ! Mem[0000000010001408] = 00000000000000ff, %f30 = ff000000 00000000 | |
24617 | ldda [%i0+%o4]0x88,%f30 ! %f30 = 00000000 000000ff | |
24618 | ! Starting 10 instruction Store Burst | |
24619 | ! Mem[0000000010001408] = 000000ff, %l1 = 00000000a3ffade0 | |
24620 | swapa [%i0+%o4]0x88,%l1 ! %l1 = 00000000000000ff | |
24621 | ||
24622 | p0_label_582: | |
24623 | ! %l6 = 0000000000000000, Mem[0000000030101410] = 6400000064000000 | |
24624 | stxa %l6,[%i4+%o5]0x81 ! Mem[0000000030101410] = 0000000000000000 | |
24625 | ! Mem[0000000030081400] = 0000ffff, %l6 = 0000000000000000 | |
24626 | ldstuba [%i2+%g0]0x89,%l6 ! %l6 = 000000ff000000ff | |
24627 | ! %f20 = 00000000, Mem[0000000010141400] = ff000000 | |
24628 | sta %f20,[%i5+%g0]0x80 ! Mem[0000000010141400] = 00000000 | |
24629 | ! Mem[00000000211c0001] = fffffe0c, %l5 = 0000000000000000 | |
24630 | ldstuba [%o2+0x001]%asi,%l5 ! %l5 = 000000ff000000ff | |
24631 | ! Mem[0000000010181410] = ff000000, %l5 = 00000000000000ff | |
24632 | swapa [%i6+%o5]0x80,%l5 ! %l5 = 00000000ff000000 | |
24633 | ! Mem[00000000300c1400] = 64ffffff, %l3 = ffffffffffffffff | |
24634 | swapa [%i3+%g0]0x89,%l3 ! %l3 = 0000000064ffffff | |
24635 | ! %l5 = 00000000ff000000, Mem[0000000030081400] = 000000000000ffff | |
24636 | stxa %l5,[%i2+%g0]0x89 ! Mem[0000000030081400] = 00000000ff000000 | |
24637 | ! Mem[000000001004143c] = 00000000, %l1 = 00000000000000ff | |
24638 | swap [%i1+0x03c],%l1 ! %l1 = 0000000000000000 | |
24639 | ! %f8 = 00000000, Mem[0000000030041408] = 00000000 | |
24640 | sta %f8 ,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000000 | |
24641 | ! Starting 10 instruction Load Burst | |
24642 | ! Mem[0000000010101408] = 00000000, %l2 = ffffffffffffffff | |
24643 | ldswa [%i4+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
24644 | ||
24645 | p0_label_583: | |
24646 | ! Mem[0000000030041400] = ffffffff, %l3 = 0000000064ffffff | |
24647 | lduwa [%i1+%g0]0x81,%l3 ! %l3 = 00000000ffffffff | |
24648 | ! Mem[0000000010101410] = 00000000, %l4 = 00000000ffffffff | |
24649 | ldswa [%i4+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
24650 | ! Mem[000000001008140c] = 00000000, %l1 = 0000000000000000 | |
24651 | lduba [%i2+0x00f]%asi,%l1 ! %l1 = 0000000000000000 | |
24652 | ! Mem[0000000030001408] = 00000000, %l4 = 0000000000000000 | |
24653 | ldswa [%i0+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
24654 | ! Mem[0000000030101408] = ffff00ff, %l0 = 5e00ff0000000000 | |
24655 | ldswa [%i4+%o4]0x89,%l0 ! %l0 = ffffffffffff00ff | |
24656 | ! Mem[0000000010101400] = 00000000ffffffff, %l5 = 00000000ff000000 | |
24657 | ldxa [%i4+%g0]0x80,%l5 ! %l5 = 00000000ffffffff | |
24658 | ! %l5 = 00000000ffffffff, %l1 = 0000000000000000, %l2 = 0000000000000000 | |
24659 | mulx %l5,%l1,%l2 ! %l2 = 0000000000000000 | |
24660 | ! Mem[0000000010141408] = 00000000, %l3 = 00000000ffffffff | |
24661 | lduwa [%i5+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
24662 | ! Mem[00000000100c1400] = 00000000, %l0 = ffffffffffff00ff | |
24663 | lduha [%i3+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
24664 | ! Starting 10 instruction Store Burst | |
24665 | ! Mem[0000000030081410] = 00000000, %l3 = 0000000000000000 | |
24666 | ldstuba [%i2+%o5]0x89,%l3 ! %l3 = 00000000000000ff | |
24667 | ||
24668 | p0_label_584: | |
24669 | ! Mem[0000000030141408] = 00000000, %l7 = 0000000000000000 | |
24670 | swapa [%i5+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
24671 | ! %l7 = 0000000000000000, Mem[0000000010081410] = 00005e27 | |
24672 | stwa %l7,[%i2+%o5]0x80 ! Mem[0000000010081410] = 00000000 | |
24673 | ! %l7 = 0000000000000000, Mem[0000000010101404] = ffffffff | |
24674 | stw %l7,[%i4+0x004] ! Mem[0000000010101404] = 00000000 | |
24675 | ! %l4 = 0000000000000000, Mem[0000000010041410] = ff000000ff000000 | |
24676 | stxa %l4,[%i1+%o5]0x88 ! Mem[0000000010041410] = 0000000000000000 | |
24677 | ! %l7 = 0000000000000000, Mem[0000000010081410] = ff00000000000000 | |
24678 | stxa %l7,[%i2+%o5]0x88 ! Mem[0000000010081410] = 0000000000000000 | |
24679 | ! %l1 = 0000000000000000, Mem[00000000100c1430] = 00000000000000ff, %asi = 80 | |
24680 | stxa %l1,[%i3+0x030]%asi ! Mem[00000000100c1430] = 0000000000000000 | |
24681 | ! %l1 = 0000000000000000, Mem[0000000010181400] = ff000000ffffffff, %asi = 80 | |
24682 | stxa %l1,[%i6+0x000]%asi ! Mem[0000000010181400] = 0000000000000000 | |
24683 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000030081408] = 000000ff ffffff00 | |
24684 | stda %l2,[%i2+%o4]0x81 ! Mem[0000000030081408] = 00000000 00000000 | |
24685 | ! %f14 = 00000000, Mem[0000000010081408] = 00000000 | |
24686 | sta %f14,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00000000 | |
24687 | ! Starting 10 instruction Load Burst | |
24688 | ! Mem[0000000030141410] = 00000000, %l1 = 0000000000000000 | |
24689 | lduwa [%i5+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
24690 | ||
24691 | p0_label_585: | |
24692 | ! Mem[00000000100c1408] = 000000ff, %l2 = 0000000000000000 | |
24693 | lduba [%i3+%o4]0x88,%l2 ! %l2 = 00000000000000ff | |
24694 | ! Mem[00000000300c1408] = 0000ffff, %l5 = 00000000ffffffff | |
24695 | ldswa [%i3+%o4]0x89,%l5 ! %l5 = 000000000000ffff | |
24696 | ! Mem[0000000010181410] = 000000ff00000000, %f18 = 00000000 00000000 | |
24697 | ldd [%i6+%o5],%f18 ! %f18 = 000000ff 00000000 | |
24698 | ! Mem[00000000300c1408] = 000000000000ffff, %f8 = 00000000 00000000 | |
24699 | ldda [%i3+%o4]0x89,%f8 ! %f8 = 00000000 0000ffff | |
24700 | ! Mem[0000000010181408] = ff000000ffffffff, %f26 = ffffffff ffffffff | |
24701 | ldda [%i6+%o4]0x80,%f26 ! %f26 = ff000000 ffffffff | |
24702 | ! Mem[0000000010001400] = 9cffb68a, %l7 = 0000000000000000 | |
24703 | ldsha [%i0+%g0]0x80,%l7 ! %l7 = ffffffffffff9cff | |
24704 | ! Mem[00000000300c1400] = ff000000ffffffff, %l1 = 0000000000000000 | |
24705 | ldxa [%i3+%g0]0x89,%l1 ! %l1 = ff000000ffffffff | |
24706 | ! Mem[0000000010001420] = 00000000, %l6 = 00000000000000ff | |
24707 | lduwa [%i0+0x020]%asi,%l6 ! %l6 = 0000000000000000 | |
24708 | ! Mem[0000000010001408] = e0adffa300000000, %f0 = 00000000 00000000 | |
24709 | ldda [%i0+%o4]0x80,%f0 ! %f0 = e0adffa3 00000000 | |
24710 | ! Starting 10 instruction Store Burst | |
24711 | ! %l1 = ff000000ffffffff, Mem[0000000030041400] = ffffffffffffffff | |
24712 | stxa %l1,[%i1+%g0]0x81 ! Mem[0000000030041400] = ff000000ffffffff | |
24713 | ||
24714 | ! Check Point 117 for processor 0 | |
24715 | ||
24716 | set p0_check_pt_data_117,%g4 | |
24717 | rd %ccr,%g5 ! %g5 = 44 | |
24718 | ldx [%g4+0x08],%g2 | |
24719 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
24720 | bne %xcc,p0_reg_check_fail0 | |
24721 | mov 0xee0,%g1 | |
24722 | ldx [%g4+0x10],%g2 | |
24723 | cmp %l1,%g2 ! %l1 = ff000000ffffffff | |
24724 | bne %xcc,p0_reg_check_fail1 | |
24725 | mov 0xee1,%g1 | |
24726 | ldx [%g4+0x18],%g2 | |
24727 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
24728 | bne %xcc,p0_reg_check_fail2 | |
24729 | mov 0xee2,%g1 | |
24730 | ldx [%g4+0x20],%g2 | |
24731 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
24732 | bne %xcc,p0_reg_check_fail3 | |
24733 | mov 0xee3,%g1 | |
24734 | ldx [%g4+0x28],%g2 | |
24735 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
24736 | bne %xcc,p0_reg_check_fail4 | |
24737 | mov 0xee4,%g1 | |
24738 | ldx [%g4+0x30],%g2 | |
24739 | cmp %l5,%g2 ! %l5 = 000000000000ffff | |
24740 | bne %xcc,p0_reg_check_fail5 | |
24741 | mov 0xee5,%g1 | |
24742 | ldx [%g4+0x38],%g2 | |
24743 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
24744 | bne %xcc,p0_reg_check_fail6 | |
24745 | mov 0xee6,%g1 | |
24746 | ldx [%g4+0x40],%g2 | |
24747 | cmp %l7,%g2 ! %l7 = ffffffffffff9cff | |
24748 | bne %xcc,p0_reg_check_fail7 | |
24749 | mov 0xee7,%g1 | |
24750 | ldx [%g4+0x48],%g3 | |
24751 | std %f0,[%g4] | |
24752 | ldx [%g4],%g2 | |
24753 | cmp %g3,%g2 ! %f0 = e0adffa3 00000000 | |
24754 | bne %xcc,p0_freg_check_fail | |
24755 | mov 0xf00,%g1 | |
24756 | ldx [%g4+0x50],%g3 | |
24757 | std %f4,[%g4] | |
24758 | ldx [%g4],%g2 | |
24759 | cmp %g3,%g2 ! %f4 = 00000000 8ab6ff9c | |
24760 | bne %xcc,p0_freg_check_fail | |
24761 | mov 0xf04,%g1 | |
24762 | ldx [%g4+0x58],%g3 | |
24763 | std %f8,[%g4] | |
24764 | ldx [%g4],%g2 | |
24765 | cmp %g3,%g2 ! %f8 = 00000000 0000ffff | |
24766 | bne %xcc,p0_freg_check_fail | |
24767 | mov 0xf08,%g1 | |
24768 | ldx [%g4+0x60],%g3 | |
24769 | std %f18,[%g4] | |
24770 | ldx [%g4],%g2 | |
24771 | cmp %g3,%g2 ! %f18 = 000000ff 00000000 | |
24772 | bne %xcc,p0_freg_check_fail | |
24773 | mov 0xf18,%g1 | |
24774 | ldx [%g4+0x68],%g3 | |
24775 | std %f22,[%g4] | |
24776 | ldx [%g4],%g2 | |
24777 | cmp %g3,%g2 ! %f22 = 000000ff ffff0000 | |
24778 | bne %xcc,p0_freg_check_fail | |
24779 | mov 0xf22,%g1 | |
24780 | ldx [%g4+0x70],%g3 | |
24781 | std %f26,[%g4] | |
24782 | ldx [%g4],%g2 | |
24783 | cmp %g3,%g2 ! %f26 = ff000000 ffffffff | |
24784 | bne %xcc,p0_freg_check_fail | |
24785 | mov 0xf26,%g1 | |
24786 | ldx [%g4+0x78],%g3 | |
24787 | std %f30,[%g4] | |
24788 | ldx [%g4],%g2 | |
24789 | cmp %g3,%g2 ! %f30 = 00000000 000000ff | |
24790 | bne %xcc,p0_freg_check_fail | |
24791 | mov 0xf30,%g1 | |
24792 | ||
24793 | ! Check Point 117 completed | |
24794 | ||
24795 | ||
24796 | p0_label_586: | |
24797 | ! %f21 = 00000000, Mem[0000000030081410] = 000000ff | |
24798 | sta %f21,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00000000 | |
24799 | ! %l1 = ff000000ffffffff, Mem[0000000030081408] = 00000000 | |
24800 | stwa %l1,[%i2+%o4]0x89 ! Mem[0000000030081408] = ffffffff | |
24801 | ! Mem[0000000030101408] = ff00ffff, %l0 = 0000000000000000 | |
24802 | swapa [%i4+%o4]0x81,%l0 ! %l0 = 00000000ff00ffff | |
24803 | ! Mem[00000000100c1400] = 00000000, %l6 = 0000000000000000 | |
24804 | swapa [%i3+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
24805 | ! Mem[0000000020800041] = 9cff9ffa, %l1 = ff000000ffffffff | |
24806 | ldstub [%o1+0x041],%l1 ! %l1 = 000000ff000000ff | |
24807 | ! %l7 = ffffffffffff9cff, Mem[0000000030001408] = 00000000 | |
24808 | stha %l7,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00009cff | |
24809 | ! Mem[0000000010181410] = ff000000, %l3 = 0000000000000000 | |
24810 | swapa [%i6+%o5]0x88,%l3 ! %l3 = 00000000ff000000 | |
24811 | ! %l5 = 000000000000ffff, Mem[00000000100c1434] = 00000000, %asi = 80 | |
24812 | stwa %l5,[%i3+0x034]%asi ! Mem[00000000100c1434] = 0000ffff | |
24813 | ! %f6 = 00005e27 00000000, Mem[0000000030041400] = 000000ff ffffffff | |
24814 | stda %f6 ,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00005e27 00000000 | |
24815 | ! Starting 10 instruction Load Burst | |
24816 | ! Mem[00000000300c1410] = 00000000, %l4 = 0000000000000000 | |
24817 | ldsha [%i3+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
24818 | ||
24819 | p0_label_587: | |
24820 | ! Mem[0000000030041400] = 00000000, %l2 = 00000000000000ff | |
24821 | ldswa [%i1+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
24822 | ! Mem[0000000010081408] = 0000000000000000, %f20 = 00000000 00000000 | |
24823 | ldda [%i2+%o4]0x88,%f20 ! %f20 = 00000000 00000000 | |
24824 | ! Mem[0000000010141404] = ff000000, %l4 = 0000000000000000 | |
24825 | ldsh [%i5+0x006],%l4 ! %l4 = 0000000000000000 | |
24826 | ! Mem[00000000300c1410] = 00000000, %l4 = 0000000000000000 | |
24827 | lduha [%i3+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
24828 | ! Mem[0000000010081420] = 0000ff00, %l7 = ffffffffffff9cff | |
24829 | ldsh [%i2+0x022],%l7 ! %l7 = ffffffffffffff00 | |
24830 | ! Mem[0000000030001410] = ff00b68a, %f16 = ff000000 | |
24831 | lda [%i0+%o5]0x81,%f16 ! %f16 = ff00b68a | |
24832 | ! Mem[00000000100c1430] = 00000000 0000ffff, %l4 = 00000000, %l5 = 0000ffff | |
24833 | ldd [%i3+0x030],%l4 ! %l4 = 0000000000000000 000000000000ffff | |
24834 | ! Mem[00000000100c1408] = ff000000, %l7 = ffffffffffffff00 | |
24835 | ldsba [%i3+0x008]%asi,%l7 ! %l7 = ffffffffffffffff | |
24836 | ! Mem[0000000010141410] = 00000000, %l1 = 00000000000000ff | |
24837 | lduha [%i5+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
24838 | ! Starting 10 instruction Store Burst | |
24839 | ! Mem[0000000030101410] = 00000000, %l3 = 00000000ff000000 | |
24840 | swapa [%i4+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
24841 | ||
24842 | p0_label_588: | |
24843 | ! %f14 = 00000000 ffffff00, Mem[0000000030181400] = a3ffade0 00000000 | |
24844 | stda %f14,[%i6+%g0]0x89 ! Mem[0000000030181400] = 00000000 ffffff00 | |
24845 | ! %l4 = 00000000, %l5 = 0000ffff, Mem[0000000010101400] = 00000000 00000000 | |
24846 | stda %l4,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 0000ffff | |
24847 | ! Mem[0000000010041434] = 00000000, %l7 = ffffffff, %l6 = 00000000 | |
24848 | add %i1,0x34,%g1 | |
24849 | casa [%g1]0x80,%l7,%l6 ! %l6 = 0000000000000000 | |
24850 | ! %l4 = 0000000000000000, Mem[0000000010001410] = 00000000 | |
24851 | stwa %l4,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00000000 | |
24852 | ! %l4 = 00000000, %l5 = 0000ffff, Mem[0000000010101400] = 00000000 0000ffff | |
24853 | stda %l4,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 0000ffff | |
24854 | ! %l4 = 0000000000000000, Mem[0000000010001438] = 759a4764, %asi = 80 | |
24855 | stwa %l4,[%i0+0x038]%asi ! Mem[0000000010001438] = 00000000 | |
24856 | ! Mem[0000000030101400] = 00000000, %l7 = ffffffffffffffff | |
24857 | swapa [%i4+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
24858 | ! Mem[0000000030081408] = ffffffff, %l4 = 0000000000000000 | |
24859 | swapa [%i2+%o4]0x81,%l4 ! %l4 = 00000000ffffffff | |
24860 | ! %l7 = 0000000000000000, Mem[0000000010001408] = a3ffade0 | |
24861 | stba %l7,[%i0+%o4]0x88 ! Mem[0000000010001408] = a3ffad00 | |
24862 | ! Starting 10 instruction Load Burst | |
24863 | ! Mem[0000000030041400] = 00005e2700000000, %l6 = 0000000000000000 | |
24864 | ldxa [%i1+%g0]0x89,%l6 ! %l6 = 00005e2700000000 | |
24865 | ||
24866 | p0_label_589: | |
24867 | ! Mem[0000000010181408] = ff000000, %l4 = 00000000ffffffff | |
24868 | lduha [%i6+%o4]0x80,%l4 ! %l4 = 000000000000ff00 | |
24869 | ! Mem[0000000010001400] = 9cffb68a, %l4 = 000000000000ff00 | |
24870 | lduha [%i0+0x002]%asi,%l4 ! %l4 = 000000000000b68a | |
24871 | ! Mem[0000000010101400] = 00000000 ffff0000, %l4 = 0000b68a, %l5 = 0000ffff | |
24872 | ldda [%i4+%g0]0x80,%l4 ! %l4 = 0000000000000000 00000000ffff0000 | |
24873 | ! Mem[00000000300c1408] = 00000000 0000ffff, %l2 = 00000000, %l3 = 00000000 | |
24874 | ldda [%i3+%o4]0x89,%l2 ! %l2 = 000000000000ffff 0000000000000000 | |
24875 | ! Mem[00000000100c1410] = 0000005e, %l7 = 0000000000000000 | |
24876 | ldsba [%i3+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
24877 | ! Mem[0000000010041408] = 00000000, %l1 = 0000000000000000 | |
24878 | lduwa [%i1+%o4]0x88,%l1 ! %l1 = 0000000000000000 | |
24879 | ! Mem[0000000030101410] = ff000000, %l5 = 00000000ffff0000 | |
24880 | ldsba [%i4+%o5]0x81,%l5 ! %l5 = ffffffffffffffff | |
24881 | ! Mem[0000000010001410] = 00000000, %f28 = 00000000 | |
24882 | lda [%i0+%o5]0x80,%f28 ! %f28 = 00000000 | |
24883 | ! Mem[0000000010081408] = 00000000, %l4 = 0000000000000000 | |
24884 | ldsha [%i2+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
24885 | ! Starting 10 instruction Store Burst | |
24886 | ! %f13 = ffffff00, Mem[00000000300c1410] = 00000000 | |
24887 | sta %f13,[%i3+%o5]0x89 ! Mem[00000000300c1410] = ffffff00 | |
24888 | ||
24889 | p0_label_590: | |
24890 | ! Mem[000000001004141a] = 00000000, %l0 = 00000000ff00ffff | |
24891 | ldstuba [%i1+0x01a]%asi,%l0 ! %l0 = 00000000000000ff | |
24892 | ! %f8 = 00000000 0000ffff, %l6 = 00005e2700000000 | |
24893 | ! Mem[0000000030141410] = 00000000ffffffff | |
24894 | add %i5,0x010,%g1 | |
24895 | stda %f8,[%g1+%l6]ASI_PST8_SL ! Mem[0000000030141410] = 00000000ffffffff | |
24896 | ! Mem[0000000010081400] = 000000ff, %l0 = 0000000000000000 | |
24897 | ldstuba [%i2+%g0]0x88,%l0 ! %l0 = 000000ff000000ff | |
24898 | ! %l4 = 0000000000000000, Mem[0000000030041400] = 00000000 | |
24899 | stha %l4,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00000000 | |
24900 | ! %l6 = 00005e2700000000, Mem[0000000010081418] = 0000000000000000, %asi = 80 | |
24901 | stxa %l6,[%i2+0x018]%asi ! Mem[0000000010081418] = 00005e2700000000 | |
24902 | ! %f10 = ffffffff 00000000, Mem[0000000010081408] = 00000000 00000000 | |
24903 | stda %f10,[%i2+%o4]0x88 ! Mem[0000000010081408] = ffffffff 00000000 | |
24904 | ! Mem[0000000030181410] = ff000000, %l6 = 00005e2700000000 | |
24905 | ldstuba [%i6+%o5]0x81,%l6 ! %l6 = 000000ff000000ff | |
24906 | ! %l4 = 00000000, %l5 = ffffffff, Mem[0000000010101438] = ff000000 00000000 | |
24907 | std %l4,[%i4+0x038] ! Mem[0000000010101438] = 00000000 ffffffff | |
24908 | ! %l2 = 000000000000ffff, Mem[0000000020800040] = 9cff9ffa | |
24909 | stb %l2,[%o1+0x040] ! Mem[0000000020800040] = ffff9ffa | |
24910 | ! Starting 10 instruction Load Burst | |
24911 | ! Mem[0000000010141400] = 00000000, %f7 = 00000000 | |
24912 | lda [%i5+%g0]0x88,%f7 ! %f7 = 00000000 | |
24913 | ||
24914 | ! Check Point 118 for processor 0 | |
24915 | ||
24916 | set p0_check_pt_data_118,%g4 | |
24917 | rd %ccr,%g5 ! %g5 = 44 | |
24918 | ldx [%g4+0x08],%g2 | |
24919 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
24920 | bne %xcc,p0_reg_check_fail0 | |
24921 | mov 0xee0,%g1 | |
24922 | ldx [%g4+0x10],%g2 | |
24923 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
24924 | bne %xcc,p0_reg_check_fail1 | |
24925 | mov 0xee1,%g1 | |
24926 | ldx [%g4+0x18],%g2 | |
24927 | cmp %l2,%g2 ! %l2 = 000000000000ffff | |
24928 | bne %xcc,p0_reg_check_fail2 | |
24929 | mov 0xee2,%g1 | |
24930 | ldx [%g4+0x20],%g2 | |
24931 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
24932 | bne %xcc,p0_reg_check_fail4 | |
24933 | mov 0xee4,%g1 | |
24934 | ldx [%g4+0x28],%g2 | |
24935 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
24936 | bne %xcc,p0_reg_check_fail5 | |
24937 | mov 0xee5,%g1 | |
24938 | ldx [%g4+0x30],%g2 | |
24939 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
24940 | bne %xcc,p0_reg_check_fail6 | |
24941 | mov 0xee6,%g1 | |
24942 | ldx [%g4+0x38],%g2 | |
24943 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
24944 | bne %xcc,p0_reg_check_fail7 | |
24945 | mov 0xee7,%g1 | |
24946 | ldx [%g4+0x40],%g3 | |
24947 | std %f2,[%g4] | |
24948 | ldx [%g4],%g2 | |
24949 | cmp %g3,%g2 ! %f2 = 00000000 000000ff | |
24950 | bne %xcc,p0_freg_check_fail | |
24951 | mov 0xf02,%g1 | |
24952 | ldx [%g4+0x48],%g3 | |
24953 | std %f4,[%g4] | |
24954 | ldx [%g4],%g2 | |
24955 | cmp %g3,%g2 ! %f4 = 00000000 8ab6ff9c | |
24956 | bne %xcc,p0_freg_check_fail | |
24957 | mov 0xf04,%g1 | |
24958 | ldx [%g4+0x50],%g3 | |
24959 | std %f6,[%g4] | |
24960 | ldx [%g4],%g2 | |
24961 | cmp %g3,%g2 ! %f6 = 00005e27 00000000 | |
24962 | bne %xcc,p0_freg_check_fail | |
24963 | mov 0xf06,%g1 | |
24964 | ldx [%g4+0x58],%g3 | |
24965 | std %f16,[%g4] | |
24966 | ldx [%g4],%g2 | |
24967 | cmp %g3,%g2 ! %f16 = ff00b68a 00000000 | |
24968 | bne %xcc,p0_freg_check_fail | |
24969 | mov 0xf16,%g1 | |
24970 | ldx [%g4+0x60],%g3 | |
24971 | std %f20,[%g4] | |
24972 | ldx [%g4],%g2 | |
24973 | cmp %g3,%g2 ! %f20 = 00000000 00000000 | |
24974 | bne %xcc,p0_freg_check_fail | |
24975 | mov 0xf20,%g1 | |
24976 | ldx [%g4+0x68],%g3 | |
24977 | std %f28,[%g4] | |
24978 | ldx [%g4],%g2 | |
24979 | cmp %g3,%g2 ! %f28 = 00000000 00000000 | |
24980 | bne %xcc,p0_freg_check_fail | |
24981 | mov 0xf28,%g1 | |
24982 | ||
24983 | ! Check Point 118 completed | |
24984 | ||
24985 | ||
24986 | p0_label_591: | |
24987 | ! Mem[0000000030041410] = 759a4764 ffffff00, %l4 = 00000000, %l5 = ffffffff | |
24988 | ldda [%i1+%o5]0x89,%l4 ! %l4 = 00000000ffffff00 00000000759a4764 | |
24989 | ! Mem[00000000100c1410] = 5e000000, %l7 = 0000000000000000 | |
24990 | ldswa [%i3+%o5]0x88,%l7 ! %l7 = 000000005e000000 | |
24991 | ! Mem[0000000010041410] = 00000000, %l0 = 00000000000000ff | |
24992 | lduba [%i1+%o5]0x88,%l0 ! %l0 = 0000000000000000 | |
24993 | ! Mem[0000000030081408] = 00000000, %f24 = 00000000 | |
24994 | lda [%i2+%o4]0x81,%f24 ! %f24 = 00000000 | |
24995 | ! Mem[00000000300c1410] = ff000000 ffffff00, %l4 = ffffff00, %l5 = 759a4764 | |
24996 | ldda [%i3+%o5]0x89,%l4 ! %l4 = 00000000ffffff00 00000000ff000000 | |
24997 | ! Mem[0000000010081408] = ffffffff00000000, %l5 = 00000000ff000000 | |
24998 | ldxa [%i2+%o4]0x88,%l5 ! %l5 = ffffffff00000000 | |
24999 | ! Mem[0000000030141400] = 000000009cffb68a, %l5 = ffffffff00000000 | |
25000 | ldxa [%i5+%g0]0x81,%l5 ! %l5 = 000000009cffb68a | |
25001 | ! Mem[0000000030081410] = 00000000, %l5 = 000000009cffb68a | |
25002 | lduha [%i2+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
25003 | ! Mem[0000000010081428] = 00000000ffff0000, %l0 = 0000000000000000 | |
25004 | ldx [%i2+0x028],%l0 ! %l0 = 00000000ffff0000 | |
25005 | ! Starting 10 instruction Store Burst | |
25006 | ! %l4 = 00000000ffffff00, Mem[0000000030141400] = 00000000 | |
25007 | stha %l4,[%i5+%g0]0x81 ! Mem[0000000030141400] = ff000000 | |
25008 | ||
25009 | p0_label_592: | |
25010 | ! Mem[0000000010101430] = 000000ff, %l6 = 00000000000000ff | |
25011 | ldstuba [%i4+0x030]%asi,%l6 ! %l6 = 00000000000000ff | |
25012 | ! %l5 = 0000000000000000, Mem[0000000030181408] = 00000000 | |
25013 | stha %l5,[%i6+%o4]0x81 ! Mem[0000000030181408] = 00000000 | |
25014 | ! %l0 = 00000000ffff0000, Mem[0000000030181408] = 00000000 | |
25015 | stha %l0,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000 | |
25016 | ! Mem[0000000010101408] = 00000000, %l2 = 000000000000ffff | |
25017 | ldub [%i4+%o4],%l2 ! %l2 = 0000000000000000 | |
25018 | ! Mem[0000000010041400] = 00000000, %l0 = 00000000ffff0000 | |
25019 | swapa [%i1+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
25020 | ! Mem[0000000010141400] = 00000000, %l2 = 0000000000000000 | |
25021 | swap [%i5+%g0],%l2 ! %l2 = 0000000000000000 | |
25022 | ! %f10 = ffffffff 00000000, Mem[0000000030081400] = 000000ff 00000000 | |
25023 | stda %f10,[%i2+%g0]0x81 ! Mem[0000000030081400] = ffffffff 00000000 | |
25024 | ! %f2 = 00000000 000000ff, %l4 = 00000000ffffff00 | |
25025 | ! Mem[0000000030101400] = ffffffff000000ff | |
25026 | stda %f2,[%i4+%l4]ASI_PST32_S ! Mem[0000000030101400] = ffffffff000000ff | |
25027 | ! Mem[00000000100c1408] = ff000000, %l6 = 0000000000000000 | |
25028 | ldstuba [%i3+%o4]0x80,%l6 ! %l6 = 000000ff000000ff | |
25029 | ! Starting 10 instruction Load Burst | |
25030 | ! Mem[0000000010101400] = 00000000ffff0000, %f26 = ff000000 ffffffff | |
25031 | ldda [%i4+0x000]%asi,%f26 ! %f26 = 00000000 ffff0000 | |
25032 | ||
25033 | p0_label_593: | |
25034 | ! Mem[0000000010041414] = 00000000, %l0 = 0000000000000000 | |
25035 | ldsba [%i1+0x016]%asi,%l0 ! %l0 = 0000000000000000 | |
25036 | ! Mem[0000000010181410] = 0000000000000000, %f4 = 00000000 8ab6ff9c | |
25037 | ldda [%i6+%o5]0x80,%f4 ! %f4 = 00000000 00000000 | |
25038 | ! Mem[00000000100c1400] = 00000000, %l6 = 00000000000000ff | |
25039 | lduha [%i3+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
25040 | ! Mem[0000000030081400] = ffffffff, %f22 = 000000ff | |
25041 | lda [%i2+%g0]0x81,%f22 ! %f22 = ffffffff | |
25042 | ! Mem[0000000010141438] = 00000000, %l6 = 0000000000000000 | |
25043 | lduw [%i5+0x038],%l6 ! %l6 = 0000000000000000 | |
25044 | ! Mem[0000000010141400] = 00000000, %l3 = 0000000000000000 | |
25045 | lduwa [%i5+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
25046 | ! Mem[0000000010101420] = ff0000ff, %l6 = 0000000000000000 | |
25047 | lduw [%i4+0x020],%l6 ! %l6 = 00000000ff0000ff | |
25048 | ! Mem[0000000010081410] = 00000000 00000000, %l6 = ff0000ff, %l7 = 5e000000 | |
25049 | ldda [%i2+%o5]0x80,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
25050 | ! Mem[0000000010041408] = 00000000, %l3 = 0000000000000000 | |
25051 | lduba [%i1+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
25052 | ! Starting 10 instruction Store Burst | |
25053 | ! %l1 = 0000000000000000, Mem[00000000201c0000] = 00001669, %asi = 80 | |
25054 | stha %l1,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00001669 | |
25055 | ||
25056 | p0_label_594: | |
25057 | ! %l1 = 0000000000000000, Mem[0000000010041408] = 00000000 | |
25058 | stba %l1,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00000000 | |
25059 | ! %f12 = 000000ff, Mem[00000000100c1410] = 0000005e | |
25060 | sta %f12,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 000000ff | |
25061 | ! %l4 = ffffff00, %l5 = 00000000, Mem[0000000030081408] = 00000000 00000000 | |
25062 | stda %l4,[%i2+%o4]0x89 ! Mem[0000000030081408] = ffffff00 00000000 | |
25063 | ! Mem[0000000010041408] = 00000000, %l1 = 0000000000000000 | |
25064 | swapa [%i1+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
25065 | ! %l7 = 0000000000000000, Mem[0000000030001408] = 00009cff | |
25066 | stha %l7,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00000000 | |
25067 | ! Mem[0000000010001410] = 00000000, %l1 = 00000000, %l0 = 00000000 | |
25068 | add %i0,0x10,%g1 | |
25069 | casa [%g1]0x80,%l1,%l0 ! %l0 = 0000000000000000 | |
25070 | ! Mem[0000000010181408] = ff000000, %l6 = 0000000000000000 | |
25071 | swapa [%i6+%o4]0x80,%l6 ! %l6 = 00000000ff000000 | |
25072 | ! Mem[0000000010101410] = 00000000, %l3 = 0000000000000000 | |
25073 | ldstuba [%i4+%o5]0x88,%l3 ! %l3 = 00000000000000ff | |
25074 | ! %f18 = 000000ff, Mem[0000000030101408] = 00000000 | |
25075 | sta %f18,[%i4+%o4]0x89 ! Mem[0000000030101408] = 000000ff | |
25076 | ! Starting 10 instruction Load Burst | |
25077 | ! Mem[0000000010041410] = 0000000000000000, %f28 = 00000000 00000000 | |
25078 | ldda [%i1+%o5]0x80,%f28 ! %f28 = 00000000 00000000 | |
25079 | ||
25080 | p0_label_595: | |
25081 | ! Mem[0000000010001424] = ffffffff, %l3 = 0000000000000000 | |
25082 | lduba [%i0+0x027]%asi,%l3 ! %l3 = 00000000000000ff | |
25083 | ! Mem[0000000010141410] = 00000000, %l0 = 0000000000000000 | |
25084 | ldsha [%i5+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
25085 | ! Mem[00000000100c143c] = ff27ffff, %l6 = 00000000ff000000 | |
25086 | lduba [%i3+0x03e]%asi,%l6 ! %l6 = 00000000000000ff | |
25087 | ! Mem[00000000100c1410] = 000000ff 000000ff, %l6 = 000000ff, %l7 = 00000000 | |
25088 | ldda [%i3+0x010]%asi,%l6 ! %l6 = 00000000000000ff 00000000000000ff | |
25089 | ! Mem[0000000010141400] = 000000ff00000000, %f2 = 00000000 000000ff | |
25090 | ldda [%i5+%g0]0x88,%f2 ! %f2 = 000000ff 00000000 | |
25091 | ! Mem[00000000218001c0] = 0000fa38, %l6 = 00000000000000ff | |
25092 | ldub [%o3+0x1c1],%l6 ! %l6 = 0000000000000000 | |
25093 | ! Mem[0000000010081410] = 00000000, %f11 = 00000000 | |
25094 | lda [%i2+%o5]0x88,%f11 ! %f11 = 00000000 | |
25095 | ! Mem[0000000030141400] = ff000000, %l7 = 00000000000000ff | |
25096 | ldsha [%i5+%g0]0x81,%l7 ! %l7 = ffffffffffffff00 | |
25097 | ! Mem[0000000010041400] = ffff0000, %l0 = 0000000000000000 | |
25098 | ldsba [%i1+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
25099 | ! Starting 10 instruction Store Burst | |
25100 | ! %f27 = ffff0000, Mem[00000000100c1430] = 00000000 | |
25101 | sta %f27,[%i3+0x030]%asi ! Mem[00000000100c1430] = ffff0000 | |
25102 | ||
25103 | ! Check Point 119 for processor 0 | |
25104 | ||
25105 | set p0_check_pt_data_119,%g4 | |
25106 | rd %ccr,%g5 ! %g5 = 44 | |
25107 | ldx [%g4+0x08],%g2 | |
25108 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
25109 | bne %xcc,p0_reg_check_fail0 | |
25110 | mov 0xee0,%g1 | |
25111 | ldx [%g4+0x10],%g2 | |
25112 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
25113 | bne %xcc,p0_reg_check_fail2 | |
25114 | mov 0xee2,%g1 | |
25115 | ldx [%g4+0x18],%g2 | |
25116 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
25117 | bne %xcc,p0_reg_check_fail3 | |
25118 | mov 0xee3,%g1 | |
25119 | ldx [%g4+0x20],%g2 | |
25120 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
25121 | bne %xcc,p0_reg_check_fail5 | |
25122 | mov 0xee5,%g1 | |
25123 | ldx [%g4+0x28],%g2 | |
25124 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
25125 | bne %xcc,p0_reg_check_fail6 | |
25126 | mov 0xee6,%g1 | |
25127 | ldx [%g4+0x30],%g2 | |
25128 | cmp %l7,%g2 ! %l7 = ffffffffffffff00 | |
25129 | bne %xcc,p0_reg_check_fail7 | |
25130 | mov 0xee7,%g1 | |
25131 | ldx [%g4+0x38],%g3 | |
25132 | std %f2,[%g4] | |
25133 | ldx [%g4],%g2 | |
25134 | cmp %g3,%g2 ! %f2 = 000000ff 00000000 | |
25135 | bne %xcc,p0_freg_check_fail | |
25136 | mov 0xf02,%g1 | |
25137 | ldx [%g4+0x40],%g3 | |
25138 | std %f4,[%g4] | |
25139 | ldx [%g4],%g2 | |
25140 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
25141 | bne %xcc,p0_freg_check_fail | |
25142 | mov 0xf04,%g1 | |
25143 | ldx [%g4+0x48],%g3 | |
25144 | std %f6,[%g4] | |
25145 | ldx [%g4],%g2 | |
25146 | cmp %g3,%g2 ! %f6 = 00005e27 00000000 | |
25147 | bne %xcc,p0_freg_check_fail | |
25148 | mov 0xf06,%g1 | |
25149 | ldx [%g4+0x50],%g3 | |
25150 | std %f10,[%g4] | |
25151 | ldx [%g4],%g2 | |
25152 | cmp %g3,%g2 ! %f10 = ffffffff 00000000 | |
25153 | bne %xcc,p0_freg_check_fail | |
25154 | mov 0xf10,%g1 | |
25155 | ldx [%g4+0x58],%g3 | |
25156 | std %f22,[%g4] | |
25157 | ldx [%g4],%g2 | |
25158 | cmp %g3,%g2 ! %f22 = ffffffff ffff0000 | |
25159 | bne %xcc,p0_freg_check_fail | |
25160 | mov 0xf22,%g1 | |
25161 | ldx [%g4+0x60],%g3 | |
25162 | std %f24,[%g4] | |
25163 | ldx [%g4],%g2 | |
25164 | cmp %g3,%g2 ! %f24 = 00000000 64479a75 | |
25165 | bne %xcc,p0_freg_check_fail | |
25166 | mov 0xf24,%g1 | |
25167 | ldx [%g4+0x68],%g3 | |
25168 | std %f26,[%g4] | |
25169 | ldx [%g4],%g2 | |
25170 | cmp %g3,%g2 ! %f26 = 00000000 ffff0000 | |
25171 | bne %xcc,p0_freg_check_fail | |
25172 | mov 0xf26,%g1 | |
25173 | ldx [%g4+0x70],%g3 | |
25174 | std %f28,[%g4] | |
25175 | ldx [%g4],%g2 | |
25176 | cmp %g3,%g2 ! %f28 = 00000000 00000000 | |
25177 | bne %xcc,p0_freg_check_fail | |
25178 | mov 0xf28,%g1 | |
25179 | ||
25180 | ! Check Point 119 completed | |
25181 | ||
25182 | ||
25183 | p0_label_596: | |
25184 | ! %f3 = 00000000, Mem[00000000100c1400] = 00000000 | |
25185 | sta %f3 ,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00000000 | |
25186 | ! %l0 = 0000000000000000, Mem[0000000030141410] = 00000000 | |
25187 | stba %l0,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 | |
25188 | ! %l2 = 0000000000000000, Mem[00000000300c1400] = ffffffff | |
25189 | stwa %l2,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 00000000 | |
25190 | ! Mem[0000000030081408] = 00ffffff, %l3 = 00000000000000ff | |
25191 | ldstuba [%i2+%o4]0x81,%l3 ! %l3 = 00000000000000ff | |
25192 | ! %l1 = 0000000000000000, Mem[00000000100c140c] = 00000000 | |
25193 | stw %l1,[%i3+0x00c] ! Mem[00000000100c140c] = 00000000 | |
25194 | ! Mem[00000000300c1408] = ffff0000, %l5 = 0000000000000000 | |
25195 | swapa [%i3+%o4]0x81,%l5 ! %l5 = 00000000ffff0000 | |
25196 | ! Mem[00000000211c0001] = fffffe0c, %l6 = 0000000000000000 | |
25197 | ldstub [%o2+0x001],%l6 ! %l6 = 000000ff000000ff | |
25198 | ! Mem[00000000100c1403] = 00000000, %l5 = 00000000ffff0000 | |
25199 | ldstub [%i3+0x003],%l5 ! %l5 = 00000000000000ff | |
25200 | ! %l0 = 0000000000000000, Mem[0000000010001410] = 00000000 | |
25201 | stba %l0,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00000000 | |
25202 | ! Starting 10 instruction Load Burst | |
25203 | ! Mem[0000000010001404] = 0000759a, %l7 = ffffffffffffff00 | |
25204 | lduw [%i0+0x004],%l7 ! %l7 = 000000000000759a | |
25205 | ||
25206 | p0_label_597: | |
25207 | ! Mem[0000000020800000] = ff000db6, %l2 = 0000000000000000 | |
25208 | ldsba [%o1+0x001]%asi,%l2 ! %l2 = 0000000000000000 | |
25209 | ! Mem[0000000010181408] = 00000000ffffffff, %f2 = 000000ff 00000000 | |
25210 | ldd [%i6+%o4],%f2 ! %f2 = 00000000 ffffffff | |
25211 | ! Mem[00000000201c0000] = 00001669, %l4 = 00000000ffffff00 | |
25212 | ldsba [%o0+0x000]%asi,%l4 ! %l4 = 0000000000000000 | |
25213 | ! Mem[0000000010001430] = 00000000, %l7 = 000000000000759a | |
25214 | lduw [%i0+0x030],%l7 ! %l7 = 0000000000000000 | |
25215 | ! Mem[00000000218000c0] = 00ff4e2c, %l5 = 0000000000000000 | |
25216 | lduba [%o3+0x0c1]%asi,%l5 ! %l5 = 00000000000000ff | |
25217 | ! Mem[0000000030041400] = 00000000, %l3 = 0000000000000000 | |
25218 | ldswa [%i1+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
25219 | ! Mem[0000000030181410] = 000000ff, %l6 = 00000000000000ff | |
25220 | lduwa [%i6+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
25221 | ! Mem[0000000010081400] = ff000000, %l5 = 00000000000000ff | |
25222 | ldsha [%i2+%g0]0x80,%l5 ! %l5 = ffffffffffffff00 | |
25223 | ! Mem[00000000201c0000] = 00001669, %l5 = ffffffffffffff00 | |
25224 | lduha [%o0+0x000]%asi,%l5 ! %l5 = 0000000000000000 | |
25225 | ! Starting 10 instruction Store Burst | |
25226 | ! %f8 = 00000000, Mem[0000000010141410] = 00000000 | |
25227 | sta %f8 ,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00000000 | |
25228 | ||
25229 | p0_label_598: | |
25230 | ! Mem[0000000030081400] = ffffffff, %l7 = 0000000000000000 | |
25231 | swapa [%i2+%g0]0x89,%l7 ! %l7 = 00000000ffffffff | |
25232 | ! Mem[0000000010001408] = a3ffad00, %l5 = 0000000000000000 | |
25233 | swapa [%i0+%o4]0x88,%l5 ! %l5 = 00000000a3ffad00 | |
25234 | ! Mem[0000000030001410] = ff00b68a, %l4 = 0000000000000000 | |
25235 | ldstuba [%i0+%o5]0x81,%l4 ! %l4 = 000000ff000000ff | |
25236 | ! %f2 = 00000000 ffffffff, Mem[00000000300c1410] = ffffff00 ff000000 | |
25237 | stda %f2 ,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 00000000 ffffffff | |
25238 | ! Mem[0000000030101408] = ff000000, %l6 = 00000000000000ff | |
25239 | swapa [%i4+%o4]0x81,%l6 ! %l6 = 00000000ff000000 | |
25240 | ! %f0 = e0adffa3, Mem[00000000300c1410] = ffffffff | |
25241 | sta %f0 ,[%i3+%o5]0x89 ! Mem[00000000300c1410] = e0adffa3 | |
25242 | ! Mem[0000000010141420] = 00000000, %l5 = 00000000a3ffad00 | |
25243 | swap [%i5+0x020],%l5 ! %l5 = 0000000000000000 | |
25244 | ! %l5 = 0000000000000000, Mem[000000001014140d] = 000000ff | |
25245 | stb %l5,[%i5+0x00d] ! Mem[000000001014140c] = 000000ff | |
25246 | ! %f6 = 00005e27 00000000, Mem[0000000010041430] = ffffffff 00000000 | |
25247 | stda %f6 ,[%i1+0x030]%asi ! Mem[0000000010041430] = 00005e27 00000000 | |
25248 | ! Starting 10 instruction Load Burst | |
25249 | ! Mem[0000000010001408] = 00000000, %l4 = 00000000000000ff | |
25250 | lduwa [%i0+%o4]0x88,%l4 ! %l4 = 0000000000000000 | |
25251 | ||
25252 | p0_label_599: | |
25253 | ! Mem[0000000030141408] = 00000000, %l4 = 0000000000000000 | |
25254 | ldsha [%i5+%o4]0x81,%l4 ! %l4 = 0000000000000000 | |
25255 | ! Mem[0000000010181400] = 00000000, %l6 = 00000000ff000000 | |
25256 | lduwa [%i6+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
25257 | ! Mem[0000000010181400] = 00000000, %l3 = 0000000000000000 | |
25258 | lduwa [%i6+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
25259 | ! Mem[0000000010101404] = ffff0000, %l2 = 0000000000000000 | |
25260 | lduha [%i4+0x004]%asi,%l2 ! %l2 = 000000000000ffff | |
25261 | ! Mem[0000000010141400] = 00000000, %l1 = 0000000000000000 | |
25262 | ldswa [%i5+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
25263 | ! Mem[00000000211c0000] = fffffe0c, %l3 = 0000000000000000 | |
25264 | ldub [%o2+%g0],%l3 ! %l3 = 00000000000000ff | |
25265 | ! Mem[0000000030101400] = ffffffff000000ff, %f26 = 00000000 ffff0000 | |
25266 | ldda [%i4+%g0]0x81,%f26 ! %f26 = ffffffff 000000ff | |
25267 | ! Mem[00000000100c1408] = ff000000, %l2 = 000000000000ffff | |
25268 | lduba [%i3+%o4]0x80,%l2 ! %l2 = 00000000000000ff | |
25269 | ! Mem[0000000030141408] = 9cffb68a00000000, %f0 = e0adffa3 00000000 | |
25270 | ldda [%i5+%o4]0x89,%f0 ! %f0 = 9cffb68a 00000000 | |
25271 | ! Starting 10 instruction Store Burst | |
25272 | ! %l7 = 00000000ffffffff, Mem[0000000010001410] = 00000000 | |
25273 | stha %l7,[%i0+%o5]0x80 ! Mem[0000000010001410] = ffff0000 | |
25274 | ||
25275 | p0_label_600: | |
25276 | ! Mem[0000000010141404] = ff000000, %l5 = 00000000, %l1 = 00000000 | |
25277 | add %i5,0x04,%g1 | |
25278 | casa [%g1]0x80,%l5,%l1 ! %l1 = 00000000ff000000 | |
25279 | ! Mem[0000000010141410] = 000000008ab6ff9c, %l4 = 0000000000000000, %l4 = 0000000000000000 | |
25280 | add %i5,0x10,%g1 | |
25281 | casxa [%g1]0x80,%l4,%l4 ! %l4 = 000000008ab6ff9c | |
25282 | ! Mem[0000000010141400] = 00000000, %l4 = 000000008ab6ff9c | |
25283 | ldstuba [%i5+%g0]0x80,%l4 ! %l4 = 00000000000000ff | |
25284 | ! %f18 = 000000ff 00000000, Mem[0000000030101400] = ffffffff 000000ff | |
25285 | stda %f18,[%i4+%g0]0x81 ! Mem[0000000030101400] = 000000ff 00000000 | |
25286 | ! Mem[0000000010181400] = 00000000, %l7 = 00000000ffffffff | |
25287 | ldstuba [%i6+%g0]0x88,%l7 ! %l7 = 00000000000000ff | |
25288 | ! %l0 = 00000000, %l1 = ff000000, Mem[0000000010041410] = 00000000 00000000 | |
25289 | stda %l0,[%i1+%o5]0x88 ! Mem[0000000010041410] = 00000000 ff000000 | |
25290 | ! %l3 = 00000000000000ff, Mem[0000000030141400] = ff000000 | |
25291 | stha %l3,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00ff0000 | |
25292 | ! %l0 = 0000000000000000, Mem[0000000010141408] = 00000000 | |
25293 | stha %l0,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000 | |
25294 | ! %l3 = 00000000000000ff, Mem[000000001004140c] = 00000000 | |
25295 | stw %l3,[%i1+0x00c] ! Mem[000000001004140c] = 000000ff | |
25296 | ! Starting 10 instruction Load Burst | |
25297 | ! Mem[0000000010101410] = ff000000 00000000, %l0 = 00000000, %l1 = ff000000 | |
25298 | ldda [%i4+%o5]0x80,%l0 ! %l0 = 00000000ff000000 0000000000000000 | |
25299 | ||
25300 | ! Check Point 120 for processor 0 | |
25301 | ||
25302 | set p0_check_pt_data_120,%g4 | |
25303 | rd %ccr,%g5 ! %g5 = 44 | |
25304 | ldx [%g4+0x08],%g2 | |
25305 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
25306 | bne %xcc,p0_reg_check_fail1 | |
25307 | mov 0xee1,%g1 | |
25308 | ldx [%g4+0x10],%g2 | |
25309 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
25310 | bne %xcc,p0_reg_check_fail2 | |
25311 | mov 0xee2,%g1 | |
25312 | ldx [%g4+0x18],%g2 | |
25313 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
25314 | bne %xcc,p0_reg_check_fail3 | |
25315 | mov 0xee3,%g1 | |
25316 | ldx [%g4+0x20],%g2 | |
25317 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
25318 | bne %xcc,p0_reg_check_fail4 | |
25319 | mov 0xee4,%g1 | |
25320 | ldx [%g4+0x28],%g2 | |
25321 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
25322 | bne %xcc,p0_reg_check_fail5 | |
25323 | mov 0xee5,%g1 | |
25324 | ldx [%g4+0x30],%g2 | |
25325 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
25326 | bne %xcc,p0_reg_check_fail6 | |
25327 | mov 0xee6,%g1 | |
25328 | ldx [%g4+0x38],%g2 | |
25329 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
25330 | bne %xcc,p0_reg_check_fail7 | |
25331 | mov 0xee7,%g1 | |
25332 | ldx [%g4+0x40],%g3 | |
25333 | std %f0,[%g4] | |
25334 | ldx [%g4],%g2 | |
25335 | cmp %g3,%g2 ! %f0 = 9cffb68a 00000000 | |
25336 | bne %xcc,p0_freg_check_fail | |
25337 | mov 0xf00,%g1 | |
25338 | ldx [%g4+0x48],%g3 | |
25339 | std %f2,[%g4] | |
25340 | ldx [%g4],%g2 | |
25341 | cmp %g3,%g2 ! %f2 = 00000000 ffffffff | |
25342 | bne %xcc,p0_freg_check_fail | |
25343 | mov 0xf02,%g1 | |
25344 | ldx [%g4+0x50],%g3 | |
25345 | std %f26,[%g4] | |
25346 | ldx [%g4],%g2 | |
25347 | cmp %g3,%g2 ! %f26 = ffffffff 000000ff | |
25348 | bne %xcc,p0_freg_check_fail | |
25349 | mov 0xf26,%g1 | |
25350 | ||
25351 | ! Check Point 120 completed | |
25352 | ||
25353 | ||
25354 | ba,a p0_not_taken_0_end | |
25355 | p0_not_taken_0: | |
25356 | ! The following code should not be executed | |
25357 | stwa %l4,[%i3+0x004]%asi | |
25358 | xnor %l3,0x393,%l0 | |
25359 | or %l1,0xff6,%l3 | |
25360 | sta %l6,[%i1+0x008]%asi | |
25361 | stha %l2,[%i4+0x010]%asi | |
25362 | sta %l4,[%i3+0x02c]%asi | |
25363 | ldxa [%i4+0x000]%asi,%l0 | |
25364 | ba,a p0_branch_failed | |
25365 | p0_not_taken_0_end: | |
25366 | ||
25367 | ||
25368 | ! End of Random Code for Thread 0 | |
25369 | ||
25370 | ||
25371 | ! Check Registers | |
25372 | ||
25373 | p0_check_registers: | |
25374 | set p0_expected_registers,%g1 | |
25375 | ||
25376 | ! The test for processor 0 has passed | |
25377 | ||
25378 | p0_passed: | |
25379 | ta GOOD_TRAP | |
25380 | nop | |
25381 | ||
25382 | p0_reg_l0_fail: | |
25383 | or %g0,0xbd0,%g1 | |
25384 | ba,a p0_failed | |
25385 | p0_reg_l1_fail: | |
25386 | or %g0,0xbd1,%g1 | |
25387 | ba,a p0_failed | |
25388 | p0_reg_l2_fail: | |
25389 | or %g0,0xbd2,%g1 | |
25390 | ba,a p0_failed | |
25391 | p0_reg_l3_fail: | |
25392 | or %g0,0xbd3,%g1 | |
25393 | ba,a p0_failed | |
25394 | p0_reg_l4_fail: | |
25395 | or %g0,0xbd4,%g1 | |
25396 | ba,a p0_failed | |
25397 | p0_reg_l5_fail: | |
25398 | or %g0,0xbd5,%g1 | |
25399 | ba,a p0_failed | |
25400 | p0_reg_l6_fail: | |
25401 | or %g0,0xbd6,%g1 | |
25402 | ba,a p0_failed | |
25403 | p0_reg_l7_fail: | |
25404 | or %g0,0xbd7,%g1 | |
25405 | ba,a p0_failed | |
25406 | p0_ccr_fail: | |
25407 | ba p0_failed | |
25408 | mov %g5,%g3 ! %g5 = %ccr | |
25409 | p0_reg_check_fail0: | |
25410 | ba p0_failed | |
25411 | mov %l0,%g3 ! Reg %l0 compare failed | |
25412 | p0_reg_check_fail1: | |
25413 | ba p0_failed | |
25414 | mov %l1,%g3 ! Reg %l1 compare failed | |
25415 | p0_reg_check_fail2: | |
25416 | ba p0_failed | |
25417 | mov %l2,%g3 ! Reg %l2 compare failed | |
25418 | p0_reg_check_fail3: | |
25419 | ba p0_failed | |
25420 | mov %l3,%g3 ! Reg %l3 compare failed | |
25421 | p0_reg_check_fail4: | |
25422 | ba p0_failed | |
25423 | mov %l4,%g3 ! Reg %l4 compare failed | |
25424 | p0_reg_check_fail5: | |
25425 | ba p0_failed | |
25426 | mov %l5,%g3 ! Reg %l5 compare failed | |
25427 | p0_reg_check_fail6: | |
25428 | ba p0_failed | |
25429 | mov %l6,%g3 ! Reg %l6 compare failed | |
25430 | p0_reg_check_fail7: | |
25431 | ba p0_failed | |
25432 | mov %l7,%g3 ! Reg %l7 compare failed | |
25433 | p0_freg_check_fail: | |
25434 | ba p0_failed | |
25435 | nop | |
25436 | ||
25437 | ! The test for processor 0 failed | |
25438 | ||
25439 | p0_failed: | |
25440 | set p0_temp,%g6 | |
25441 | stx %g1,[%g6] | |
25442 | stx %g2,[%g6+8] | |
25443 | stx %g3,[%g6+16] | |
25444 | stx %fsr,[%g6+24] | |
25445 | ta BAD_TRAP | |
25446 | ||
25447 | ||
25448 | ! The local area data for processor 0 failed | |
25449 | ||
25450 | p0_local_failed: | |
25451 | set done_flags,%g5 | |
25452 | mov 3,%g6 | |
25453 | st %g6,[%g5+0x000] ! Set processor 0 done flag | |
25454 | ||
25455 | set p0_temp,%g6 | |
25456 | add %g1,%g4,%g1 | |
25457 | stx %g4,[%g6] | |
25458 | stx %g2,[%g6+8] | |
25459 | stx %g3,[%g6+16] | |
25460 | st %fsr,[%g6+24] | |
25461 | ta BAD_TRAP | |
25462 | ||
25463 | p0_selfmod_failed: | |
25464 | ba p0_failed | |
25465 | mov 0xabc,%g1 | |
25466 | ||
25467 | p0_branch_failed: | |
25468 | mov 0xbbb,%g1 | |
25469 | rd %ccr,%g2 | |
25470 | ba p0_failed | |
25471 | mov 0x0,%g3 | |
25472 | ||
25473 | p0_trap1e: | |
25474 | swapa [%i5+%g0]ASI_AS_IF_USER_PRIMARY,%l6 ! Mem[0000000010141400] | |
25475 | done | |
25476 | ||
25477 | p0_trap1o: | |
25478 | swapa [%o5+%g0]ASI_AS_IF_USER_PRIMARY,%l6 ! Mem[0000000010141400] | |
25479 | done | |
25480 | ||
25481 | ||
25482 | p0_trap2e: | |
25483 | ldstuba [%i0+%o4]ASI_AS_IF_USER_PRIMARY,%l3 ! Mem[0000000010001408] | |
25484 | sub %l1,%l1,%l0 | |
25485 | smul %l2,0x774,%l6 | |
25486 | stxa %l2,[%i1+%o4]ASI_AS_IF_USER_PRIMARY ! Mem[0000000010041408] | |
25487 | smul %l0,0x053,%l2 | |
25488 | udivx %l1,%l7,%l7 | |
25489 | orn %l3,%l0,%l3 | |
25490 | done | |
25491 | ||
25492 | p0_trap2o: | |
25493 | ldstuba [%o0+%i4]ASI_AS_IF_USER_PRIMARY,%l3 ! Mem[0000000010001408] | |
25494 | sub %l1,%l1,%l0 | |
25495 | smul %l2,0x774,%l6 | |
25496 | stxa %l2,[%o1+%i4]ASI_AS_IF_USER_PRIMARY ! Mem[0000000010041408] | |
25497 | smul %l0,0x053,%l2 | |
25498 | udivx %l1,%l7,%l7 | |
25499 | orn %l3,%l0,%l3 | |
25500 | done | |
25501 | ||
25502 | ||
25503 | p0_trap3e: | |
25504 | sub %l0,%l1,%l0 | |
25505 | done | |
25506 | ||
25507 | p0_trap3o: | |
25508 | sub %l0,%l1,%l0 | |
25509 | done | |
25510 | ||
25511 | ! Cross Processor Interrupt Handler | |
25512 | ||
25513 | cross_intr_handler: | |
25514 | membar #Sync | |
25515 | ! Identify the recipient of the interrupt | |
25516 | mov 0x10,%g1 ! VA of Core ID Register | |
25517 | ldxa [%g1]ASI_CMP_CORE_ID,%g1 | |
25518 | and %g1,0x3f,%g4 ! Extract Core ID in %g4 | |
25519 | sll %g4,2,%g1 ! Index into intr receive array | |
25520 | set received_xintr,%g2 ! Pointer to receive counters | |
25521 | lduw [%g2+%g1],%g3 ! Get receive count | |
25522 | inc %g3 ! Incement by 1 | |
25523 | st %g3,[%g2+%g1] ! Update receive count | |
25524 | ! Reset busy bit interrupts and return | |
25525 | mov 0x40,%g1 ! Busy bit | |
25526 | stxa %g1,[%g0]ASI_INTR_RECEIVE ! Clear the busy bit | |
25527 | membar #Sync | |
25528 | retry | |
25529 | ||
25530 | inst_access_handler: | |
25531 | done | |
25532 | ||
25533 | .align 256 | |
25534 | data_access_handler: | |
25535 | 1: done | |
25536 | ||
25537 | p0_init_memory_pointers: | |
25538 | set p0_init_registers,%g1 | |
25539 | mov %g0,%g2 | |
25540 | mov %g0,%g3 | |
25541 | mov %g0,%g4 | |
25542 | mov %g0,%g5 | |
25543 | mov %g0,%g6 | |
25544 | mov %g0,%g7 | |
25545 | ||
25546 | ! Initialize memory pointers for window 0 | |
25547 | set p0_local0_start,%i0 | |
25548 | set p0_local1_start,%i1 | |
25549 | set p0_local2_start,%i2 | |
25550 | set p0_local3_start,%i3 | |
25551 | set p0_local4_start,%i4 | |
25552 | set p0_local5_start,%i5 | |
25553 | set p0_local6_start,%i6 | |
25554 | clr %i7 | |
25555 | ! Init Local Registers in Window 0 | |
25556 | ldx [%g1+0x000],%l0 ! %l0 = 104294b86f381658 | |
25557 | ldx [%g1+0x008],%l1 ! %l1 = c68c7ca02b0f7a2e | |
25558 | ldx [%g1+0x010],%l2 ! %l2 = 6c72aba8842b9a6c | |
25559 | ldx [%g1+0x018],%l3 ! %l3 = 782d602e6ef09e92 | |
25560 | ldx [%g1+0x020],%l4 ! %l4 = 58124dec8d643538 | |
25561 | ldx [%g1+0x028],%l5 ! %l5 = 6c8dd8d22c28d25d | |
25562 | ldx [%g1+0x030],%l6 ! %l6 = 02629122ea11b213 | |
25563 | ldx [%g1+0x038],%l7 ! %l7 = e57709b25cf831b4 | |
25564 | ||
25565 | ! Initialize the output register of window 0 | |
25566 | ||
25567 | set share0_start,%o0 | |
25568 | set share1_start,%o1 | |
25569 | set share2_start,%o2 | |
25570 | set share3_start,%o3 | |
25571 | mov 0x08,%o4 | |
25572 | mov 0x10,%o5 | |
25573 | mov 0x18,%o6 | |
25574 | ||
25575 | retl | |
25576 | nop | |
25577 | ||
25578 | user_text_end: | |
25579 | .seg "text" | |
25580 | .align 0x2000 | |
25581 | user_near0_start: | |
25582 | p0_near_0_le: | |
25583 | swap [%i5+0x02c],%l4 ! Mem[000000001014142c] | |
25584 | mulx %l6,-0x734,%l0 | |
25585 | or %l0,-0xf59,%l7 | |
25586 | std %l0,[%i0+0x008] ! Mem[0000000010001408] | |
25587 | jmpl %o7,%g0 | |
25588 | ldsh [%i3+0x00a],%l1 ! Mem[00000000100c140a] | |
25589 | p0_near_0_he: | |
25590 | smul %l2,%l0,%l4 | |
25591 | jmpl %o7,%g0 | |
25592 | lduw [%i3+0x018],%l7 ! Mem[00000000100c1418] | |
25593 | near0_b2b_h: | |
25594 | orn %l1,-0xf31,%l0 | |
25595 | mulx %l2,0xa01,%l2 | |
25596 | sdivx %l4,%l1,%l6 | |
25597 | jmpl %o7,%g0 | |
25598 | andn %l2,0xc01,%l0 | |
25599 | near0_b2b_l: | |
25600 | sub %l0,-0xf4e,%l0 | |
25601 | addc %l3,%l1,%l7 | |
25602 | addc %l2,%l3,%l6 | |
25603 | jmpl %o7,%g0 | |
25604 | subc %l5,-0xd43,%l6 | |
25605 | user_near0_end: | |
25606 | .seg "text" | |
25607 | .align 0x2000 | |
25608 | user_near1_start: | |
25609 | p0_near_1_le: | |
25610 | xnor %l0,%l7,%l3 | |
25611 | addc %l2,-0x203,%l4 | |
25612 | ldd [%i3+0x030],%f8 ! Mem[00000000100c1430] | |
25613 | ldx [%i1+0x000],%l4 ! Mem[0000000010041400] | |
25614 | subc %l6,-0x136,%l0 | |
25615 | sub %l4,%l4,%l6 | |
25616 | jmpl %o7,%g0 | |
25617 | umul %l0,0xc89,%l7 | |
25618 | p0_near_1_he: | |
25619 | ldsb [%i5+0x014],%l4 ! Mem[0000000010141414] | |
25620 | umul %l6,-0xdfc,%l3 | |
25621 | jmpl %o7,%g0 | |
25622 | std %f26,[%i3+0x008] ! Mem[00000000100c1408] | |
25623 | near1_b2b_h: | |
25624 | jmpl %o7,%g0 | |
25625 | sdivx %l3,%l3,%l5 | |
25626 | jmpl %o7,%g0 | |
25627 | nop | |
25628 | near1_b2b_l: | |
25629 | jmpl %o7,%g0 | |
25630 | or %l4,0x65a,%l1 | |
25631 | jmpl %o7,%g0 | |
25632 | nop | |
25633 | user_near1_end: | |
25634 | .seg "text" | |
25635 | .align 0x2000 | |
25636 | user_near2_start: | |
25637 | p0_near_2_le: | |
25638 | udivx %l7,%l5,%l1 | |
25639 | ldstub [%o2+0x001],%l6 ! Mem[00000000211c0001] | |
25640 | jmpl %o7,%g0 | |
25641 | ldd [%i6+0x028],%f6 ! Mem[0000000010181428] | |
25642 | p0_near_2_he: | |
25643 | ldsw [%i3+0x010],%l7 ! Mem[00000000100c1410] | |
25644 | jmpl %o7,%g0 | |
25645 | xor %l7,%l7,%l2 | |
25646 | near2_b2b_h: | |
25647 | jmpl %o7,%g0 | |
25648 | nop | |
25649 | jmpl %o7,%g0 | |
25650 | nop | |
25651 | near2_b2b_l: | |
25652 | jmpl %o7,%g0 | |
25653 | subc %l5,-0xafc,%l1 | |
25654 | jmpl %o7,%g0 | |
25655 | nop | |
25656 | user_near2_end: | |
25657 | .seg "text" | |
25658 | .align 0x2000 | |
25659 | user_near3_start: | |
25660 | p0_near_3_le: | |
25661 | ldd [%i1+0x030],%f6 ! Mem[0000000010041430] | |
25662 | ld [%i4+0x030],%f9 ! Mem[0000000010101430] | |
25663 | ldsw [%i5+0x038],%l4 ! Mem[0000000010141438] | |
25664 | jmpl %o7,%g0 | |
25665 | or %l1,0x50e,%l3 | |
25666 | p0_near_3_he: | |
25667 | xor %l6,-0x3b5,%l0 | |
25668 | sdivx %l6,%l6,%l7 | |
25669 | jmpl %o7,%g0 | |
25670 | orn %l2,%l6,%l3 | |
25671 | near3_b2b_h: | |
25672 | add %l2,-0x1c5,%l3 | |
25673 | or %l4,-0xc5e,%l3 | |
25674 | jmpl %o7,%g0 | |
25675 | xor %l3,%l7,%l6 | |
25676 | near3_b2b_l: | |
25677 | mulx %l5,%l1,%l3 | |
25678 | add %l0,-0xb74,%l5 | |
25679 | jmpl %o7,%g0 | |
25680 | andn %l7,0xe5b,%l7 | |
25681 | user_near3_end: | |
25682 | .seg "text" | |
25683 | .text | |
25684 | .align 0x2000 | |
25685 | user_far0_start: | |
25686 | p0_far_0_le: | |
25687 | st %f1 ,[%i1+0x020] ! Mem[0000000010041420] | |
25688 | ldsh [%i6+0x000],%l1 ! Mem[0000000010181400] | |
25689 | swap [%i6+0x014],%l2 ! Mem[0000000010181414] | |
25690 | jmpl %o7,%g0 | |
25691 | ldub [%i6+0x026],%l3 ! Mem[0000000010181426] | |
25692 | p0_far_0_lem: | |
25693 | membar #Sync | |
25694 | st %f1 ,[%i1+0x020] ! Mem[0000000010041420] | |
25695 | ldsh [%i6+0x000],%l1 ! Mem[0000000010181400] | |
25696 | swap [%i6+0x014],%l2 ! Mem[0000000010181414] | |
25697 | membar #Sync | |
25698 | jmpl %o7,%g0 | |
25699 | ldub [%i6+0x026],%l3 ! Mem[0000000010181426] | |
25700 | p0_far_0_he: | |
25701 | sub %l7,%l2,%l6 | |
25702 | orn %l4,%l5,%l0 | |
25703 | umul %l2,%l5,%l3 | |
25704 | jmpl %o7,%g0 | |
25705 | swap [%i5+0x00c],%l4 ! Mem[000000001014140c] | |
25706 | p0_far_0_hem: | |
25707 | sub %l7,%l2,%l6 | |
25708 | orn %l4,%l5,%l0 | |
25709 | umul %l2,%l5,%l3 | |
25710 | membar #Sync | |
25711 | jmpl %o7,%g0 | |
25712 | swap [%i5+0x00c],%l4 ! Mem[000000001014140c] | |
25713 | p0_loop_branch_0: | |
25714 | jmpl %o7+12,%g0 | |
25715 | add %l0,1,%l0 | |
25716 | far0_b2b_h: | |
25717 | nop | |
25718 | smul %l5,%l0,%l7 | |
25719 | mulx %l5,-0x7db,%l2 | |
25720 | smul %l4,%l1,%l4 | |
25721 | subc %l0,0xe4a,%l6 | |
25722 | add %l2,%l3,%l6 | |
25723 | jmpl %o7,%g0 | |
25724 | orn %l3,%l3,%l6 | |
25725 | far0_b2b_l: | |
25726 | subc %l3,%l6,%l4 | |
25727 | nop | |
25728 | and %l5,0xb03,%l4 | |
25729 | nop | |
25730 | or %l1,0xcf7,%l3 | |
25731 | mulx %l0,0xd65,%l5 | |
25732 | jmpl %o7,%g0 | |
25733 | sub %l4,0x359,%l6 | |
25734 | user_far0_end: | |
25735 | .seg "text" | |
25736 | .text | |
25737 | .align 0x2000 | |
25738 | user_far1_start: | |
25739 | p0_far_1_le: | |
25740 | ld [%i1+0x030],%f0 ! Mem[0000000010041430] | |
25741 | addc %l2,0x4dd,%l6 | |
25742 | nop | |
25743 | mulx %l1,%l3,%l3 | |
25744 | subc %l7,%l7,%l7 | |
25745 | andn %l1,0xb99,%l0 | |
25746 | lduw [%i0+0x004],%l7 ! Mem[0000000010001404] | |
25747 | jmpl %o7,%g0 | |
25748 | sth %l5,[%i3+0x00e] ! Mem[00000000100c140e] | |
25749 | p0_far_1_lem: | |
25750 | membar #Sync | |
25751 | ld [%i1+0x030],%f0 ! Mem[0000000010041430] | |
25752 | addc %l2,0x4dd,%l6 | |
25753 | nop | |
25754 | mulx %l1,%l3,%l3 | |
25755 | subc %l7,%l7,%l7 | |
25756 | andn %l1,0xb99,%l0 | |
25757 | lduw [%i0+0x004],%l7 ! Mem[0000000010001404] | |
25758 | membar #Sync | |
25759 | jmpl %o7,%g0 | |
25760 | sth %l5,[%i3+0x00e] ! Mem[00000000100c140e] | |
25761 | p0_far_1_he: | |
25762 | jmpl %o7,%g0 | |
25763 | swap [%i1+0x038],%l0 ! Mem[0000000010041438] | |
25764 | jmpl %o7,%g0 | |
25765 | nop | |
25766 | p0_far_1_hem: | |
25767 | membar #Sync | |
25768 | jmpl %o7,%g0 | |
25769 | swap [%i1+0x038],%l0 ! Mem[0000000010041438] | |
25770 | jmpl %o7,%g0 | |
25771 | nop | |
25772 | p0_loop_branch_1: | |
25773 | jmpl %o7+12,%g0 | |
25774 | add %l0,2,%l0 | |
25775 | far1_b2b_h: | |
25776 | add %l3,%l2,%l5 | |
25777 | sdivx %l0,-0x767,%l7 | |
25778 | jmpl %o7,%g0 | |
25779 | or %l2,%l2,%l0 | |
25780 | far1_b2b_l: | |
25781 | sdivx %l3,0x371,%l4 | |
25782 | umul %l1,0xcd0,%l3 | |
25783 | jmpl %o7,%g0 | |
25784 | addc %l1,%l3,%l2 | |
25785 | user_far1_end: | |
25786 | .seg "text" | |
25787 | .text | |
25788 | .align 0x2000 | |
25789 | user_far2_start: | |
25790 | p0_far_2_le: | |
25791 | orn %l1,%l0,%l3 | |
25792 | or %l5,%l3,%l6 | |
25793 | jmpl %o7,%g0 | |
25794 | addc %l7,-0xcba,%l3 | |
25795 | p0_far_2_lem: | |
25796 | orn %l1,%l0,%l3 | |
25797 | or %l5,%l3,%l6 | |
25798 | jmpl %o7,%g0 | |
25799 | addc %l7,-0xcba,%l3 | |
25800 | p0_far_2_he: | |
25801 | umul %l1,%l4,%l7 | |
25802 | orn %l0,0x6e9,%l5 | |
25803 | andn %l6,-0xe01,%l5 | |
25804 | or %l6,-0xd58,%l6 | |
25805 | stw %l0,[%i1+0x024] ! Mem[0000000010041424] | |
25806 | ldsb [%i5+0x012],%l1 ! Mem[0000000010141412] | |
25807 | ldsw [%i5+0x014],%l2 ! Mem[0000000010141414] | |
25808 | jmpl %o7,%g0 | |
25809 | stx %l7,[%i5+0x030] ! Mem[0000000010141430] | |
25810 | p0_far_2_hem: | |
25811 | umul %l1,%l4,%l7 | |
25812 | orn %l0,0x6e9,%l5 | |
25813 | andn %l6,-0xe01,%l5 | |
25814 | or %l6,-0xd58,%l6 | |
25815 | membar #Sync | |
25816 | stw %l0,[%i1+0x024] ! Mem[0000000010041424] | |
25817 | ldsb [%i5+0x012],%l1 ! Mem[0000000010141412] | |
25818 | ldsw [%i5+0x014],%l2 ! Mem[0000000010141414] | |
25819 | membar #Sync | |
25820 | jmpl %o7,%g0 | |
25821 | stx %l7,[%i5+0x030] ! Mem[0000000010141430] | |
25822 | p0_loop_branch_2: | |
25823 | jmpl %o7+12,%g0 | |
25824 | add %l0,3,%l0 | |
25825 | far2_b2b_h: | |
25826 | sdivx %l3,%l1,%l3 | |
25827 | xnor %l7,%l0,%l1 | |
25828 | add %l7,%l7,%l6 | |
25829 | and %l1,-0xec5,%l1 | |
25830 | mulx %l7,%l7,%l1 | |
25831 | jmpl %o7,%g0 | |
25832 | subc %l2,%l5,%l3 | |
25833 | far2_b2b_l: | |
25834 | umul %l6,0xd9d,%l1 | |
25835 | nop | |
25836 | umul %l7,%l4,%l0 | |
25837 | orn %l7,-0x2a8,%l4 | |
25838 | nop | |
25839 | jmpl %o7,%g0 | |
25840 | and %l7,-0xcc8,%l1 | |
25841 | user_far2_end: | |
25842 | .seg "text" | |
25843 | .text | |
25844 | .align 0x2000 | |
25845 | user_far3_start: | |
25846 | p0_far_3_le: | |
25847 | st %f10,[%i3+0x020] ! Mem[00000000100c1420] | |
25848 | ldsw [%i5+0x024],%l2 ! Mem[0000000010141424] | |
25849 | st %f12,[%i1+0x00c] ! Mem[000000001004140c] | |
25850 | jmpl %o7,%g0 | |
25851 | and %l4,0xe83,%l2 | |
25852 | p0_far_3_lem: | |
25853 | membar #Sync | |
25854 | st %f10,[%i3+0x020] ! Mem[00000000100c1420] | |
25855 | ldsw [%i5+0x024],%l2 ! Mem[0000000010141424] | |
25856 | st %f12,[%i1+0x00c] ! Mem[000000001004140c] | |
25857 | jmpl %o7,%g0 | |
25858 | and %l4,0xe83,%l2 | |
25859 | p0_far_3_he: | |
25860 | stw %l0,[%i2+0x038] ! Mem[0000000010081438] | |
25861 | addc %l5,0xb0f,%l0 | |
25862 | std %l6,[%i5+0x010] ! Mem[0000000010141410] | |
25863 | stb %l0,[%i0+0x02a] ! Mem[000000001000142a] | |
25864 | jmpl %o7,%g0 | |
25865 | addc %l1,%l4,%l2 | |
25866 | p0_far_3_hem: | |
25867 | membar #Sync | |
25868 | stw %l0,[%i2+0x038] ! Mem[0000000010081438] | |
25869 | addc %l5,0xb0f,%l0 | |
25870 | std %l6,[%i5+0x010] ! Mem[0000000010141410] | |
25871 | stb %l0,[%i0+0x02a] ! Mem[000000001000142a] | |
25872 | jmpl %o7,%g0 | |
25873 | addc %l1,%l4,%l2 | |
25874 | p0_loop_branch_3: | |
25875 | jmpl %o7+12,%g0 | |
25876 | add %l0,4,%l0 | |
25877 | far3_b2b_h: | |
25878 | jmpl %o7,%g0 | |
25879 | smul %l1,%l0,%l3 | |
25880 | jmpl %o7,%g0 | |
25881 | nop | |
25882 | far3_b2b_l: | |
25883 | jmpl %o7,%g0 | |
25884 | sub %l5,%l3,%l4 | |
25885 | jmpl %o7,%g0 | |
25886 | nop | |
25887 | user_far3_end: | |
25888 | .seg "text" | |
25889 | .align 0x2000 | |
25890 | user_jump0_start: | |
25891 | INIT_MEM(0, 0x0010, 1, +, 0, +, 0) | |
25892 | p0_jmpl_0_le: | |
25893 | stx %l6,[%i6+0x030] ! Mem[0000000010181430] | |
25894 | lduh [%i2+0x026],%l4 ! Mem[0000000010081426] | |
25895 | ldx [%i3+0x028],%l4 ! Mem[00000000100c1428] | |
25896 | sth %l5,[%i5+0x012] ! Mem[0000000010141412] | |
25897 | jmpl %g6+8,%g0 | |
25898 | udivx %l6,%l3,%l2 | |
25899 | p0_call_0_le: | |
25900 | addc %l6,%l0,%l2 | |
25901 | st %f14,[%i3+0x024] ! Mem[00000000100c1424] | |
25902 | std %l6,[%i1+0x038] ! Mem[0000000010041438] | |
25903 | retl | |
25904 | stw %l1,[%i4+0x014] ! Mem[0000000010101414] | |
25905 | p0_jmpl_0_lo: | |
25906 | stx %l6,[%o6+0x030] ! Mem[0000000010181430] | |
25907 | lduh [%o2+0x026],%l4 ! Mem[0000000010081426] | |
25908 | ldx [%o3+0x028],%l4 ! Mem[00000000100c1428] | |
25909 | sth %l5,[%o5+0x012] ! Mem[0000000010141412] | |
25910 | jmpl %g6+8,%g0 | |
25911 | udivx %l6,%l3,%l2 | |
25912 | p0_call_0_lo: | |
25913 | addc %l6,%l0,%l2 | |
25914 | st %f14,[%o3+0x024] ! Mem[00000000100c1424] | |
25915 | std %l6,[%o1+0x038] ! Mem[0000000010041438] | |
25916 | retl | |
25917 | stw %l1,[%o4+0x014] ! Mem[0000000010101414] | |
25918 | p0_jmpl_0_he: | |
25919 | lduh [%i6+0x016],%l0 ! Mem[0000000010181416] | |
25920 | stw %l4,[%i0+0x018] ! Mem[0000000010001418] | |
25921 | jmpl %g6+8,%g0 | |
25922 | add %l0,0x91a,%l0 | |
25923 | p0_call_0_he: | |
25924 | lduw [%i2+0x034],%l4 ! Mem[0000000010081434] | |
25925 | sth %l4,[%i5+0x000] ! Mem[0000000010141400] | |
25926 | stw %l7,[%i1+0x008] ! Mem[0000000010041408] | |
25927 | ldd [%i6+0x010],%l6 ! Mem[0000000010181410] | |
25928 | retl | |
25929 | sdivx %l3,-0x736,%l7 | |
25930 | p0_jmpl_0_ho: | |
25931 | lduh [%o6+0x016],%l0 ! Mem[0000000010181416] | |
25932 | stw %l4,[%o0+0x018] ! Mem[0000000010001418] | |
25933 | jmpl %g6+8,%g0 | |
25934 | add %l0,0x91a,%l0 | |
25935 | p0_call_0_ho: | |
25936 | lduw [%o2+0x034],%l4 ! Mem[0000000010081434] | |
25937 | sth %l4,[%o5+0x000] ! Mem[0000000010141400] | |
25938 | stw %l7,[%o1+0x008] ! Mem[0000000010041408] | |
25939 | ldd [%o6+0x010],%l6 ! Mem[0000000010181410] | |
25940 | retl | |
25941 | sdivx %l3,-0x736,%l7 | |
25942 | user_jump0_end: | |
25943 | .seg "text" | |
25944 | .align 0x2000 | |
25945 | user_jump1_start: | |
25946 | INIT_MEM(0, 0x0020, 1, +, 0, +, 0) | |
25947 | p0_jmpl_1_le: | |
25948 | jmpl %g6+8,%g0 | |
25949 | stb %l7,[%i6+0x01b] ! Mem[000000001018141b] | |
25950 | p0_call_1_le: | |
25951 | orn %l0,%l0,%l3 | |
25952 | ldsh [%i2+0x00c],%l2 ! Mem[000000001008140c] | |
25953 | retl | |
25954 | ldub [%i4+0x00b],%l1 ! Mem[000000001010140b] | |
25955 | p0_jmpl_1_lo: | |
25956 | jmpl %g6+8,%g0 | |
25957 | stb %l7,[%o6+0x01b] ! Mem[000000001018141b] | |
25958 | p0_call_1_lo: | |
25959 | orn %l0,%l0,%l3 | |
25960 | ldsh [%o2+0x00c],%l2 ! Mem[000000001008140c] | |
25961 | retl | |
25962 | ldub [%o4+0x00b],%l1 ! Mem[000000001010140b] | |
25963 | p0_jmpl_1_he: | |
25964 | nop | |
25965 | ld [%i1+0x02c],%f16 ! Mem[000000001004142c] | |
25966 | jmpl %g6+8,%g0 | |
25967 | lduw [%i3+0x030],%l0 ! Mem[00000000100c1430] | |
25968 | p0_call_1_he: | |
25969 | retl | |
25970 | xor %l0,-0x343,%l2 | |
25971 | p0_jmpl_1_ho: | |
25972 | nop | |
25973 | ld [%o1+0x02c],%f16 ! Mem[000000001004142c] | |
25974 | jmpl %g6+8,%g0 | |
25975 | lduw [%o3+0x030],%l0 ! Mem[00000000100c1430] | |
25976 | p0_call_1_ho: | |
25977 | retl | |
25978 | xor %l0,-0x343,%l2 | |
25979 | user_jump1_end: | |
25980 | .seg "text" | |
25981 | .align 0x2000 | |
25982 | user_jump2_start: | |
25983 | INIT_MEM(0, 0x0030, 1, +, 0, +, 0) | |
25984 | p0_jmpl_2_le: | |
25985 | sth %l3,[%i1+0x00e] ! Mem[000000001004140e] | |
25986 | xnor %l6,-0xd42,%l2 | |
25987 | swap [%i0+0x038],%l7 ! Mem[0000000010001438] | |
25988 | or %l1,-0x08e,%l6 | |
25989 | ldd [%i4+0x000],%f6 ! Mem[0000000010101400] | |
25990 | jmpl %g6+8,%g0 | |
25991 | orn %l6,-0xf96,%l1 | |
25992 | p0_call_2_le: | |
25993 | retl | |
25994 | orn %l3,-0x61b,%l0 | |
25995 | p0_jmpl_2_lo: | |
25996 | sth %l3,[%o1+0x00e] ! Mem[000000001004140e] | |
25997 | xnor %l6,-0xd42,%l2 | |
25998 | swap [%o0+0x038],%l7 ! Mem[0000000010001438] | |
25999 | or %l1,-0x08e,%l6 | |
26000 | ldd [%o4+0x000],%f6 ! Mem[0000000010101400] | |
26001 | jmpl %g6+8,%g0 | |
26002 | orn %l6,-0xf96,%l1 | |
26003 | p0_call_2_lo: | |
26004 | retl | |
26005 | orn %l3,-0x61b,%l0 | |
26006 | p0_jmpl_2_he: | |
26007 | jmpl %g6+8,%g0 | |
26008 | subc %l1,%l4,%l1 | |
26009 | p0_call_2_he: | |
26010 | swap [%i0+0x008],%l1 ! Mem[0000000010001408] | |
26011 | swap [%i5+0x038],%l5 ! Mem[0000000010141438] | |
26012 | retl | |
26013 | ldub [%i2+0x020],%l5 ! Mem[0000000010081420] | |
26014 | p0_jmpl_2_ho: | |
26015 | jmpl %g6+8,%g0 | |
26016 | subc %l1,%l4,%l1 | |
26017 | p0_call_2_ho: | |
26018 | swap [%o0+0x008],%l1 ! Mem[0000000010001408] | |
26019 | swap [%o5+0x038],%l5 ! Mem[0000000010141438] | |
26020 | retl | |
26021 | ldub [%o2+0x020],%l5 ! Mem[0000000010081420] | |
26022 | user_jump2_end: | |
26023 | .seg "text" | |
26024 | .align 0x2000 | |
26025 | user_jump3_start: | |
26026 | INIT_MEM(0, 0x0040, 1, +, 0, +, 0) | |
26027 | p0_jmpl_3_le: | |
26028 | ldd [%i5+0x030],%f8 ! Mem[0000000010141430] | |
26029 | mulx %l3,%l4,%l0 | |
26030 | add %l1,%l6,%l4 | |
26031 | sdivx %l2,-0xa2a,%l5 | |
26032 | add %l7,0x275,%l4 | |
26033 | umul %l4,%l6,%l0 | |
26034 | subc %l4,0xed5,%l4 | |
26035 | jmpl %g6+8,%g0 | |
26036 | swap [%i1+0x028],%l0 ! Mem[0000000010041428] | |
26037 | p0_call_3_le: | |
26038 | sub %l2,0x502,%l2 | |
26039 | std %l4,[%i2+0x000] ! Mem[0000000010081400] | |
26040 | std %f6 ,[%i6+0x008] ! Mem[0000000010181408] | |
26041 | stw %l2,[%i5+0x00c] ! Mem[000000001014140c] | |
26042 | ldstub [%o1+0x001],%l3 ! Mem[0000000020800001] | |
26043 | subc %l7,%l5,%l3 | |
26044 | retl | |
26045 | ldd [%i1+0x038],%f2 ! Mem[0000000010041438] | |
26046 | p0_jmpl_3_lo: | |
26047 | ldd [%o5+0x030],%f8 ! Mem[0000000010141430] | |
26048 | mulx %l3,%l4,%l0 | |
26049 | add %l1,%l6,%l4 | |
26050 | sdivx %l2,-0xa2a,%l5 | |
26051 | add %l7,0x275,%l4 | |
26052 | umul %l4,%l6,%l0 | |
26053 | subc %l4,0xed5,%l4 | |
26054 | jmpl %g6+8,%g0 | |
26055 | swap [%o1+0x028],%l0 ! Mem[0000000010041428] | |
26056 | p0_call_3_lo: | |
26057 | sub %l2,0x502,%l2 | |
26058 | std %l4,[%o2+0x000] ! Mem[0000000010081400] | |
26059 | std %f6 ,[%o6+0x008] ! Mem[0000000010181408] | |
26060 | stw %l2,[%o5+0x00c] ! Mem[000000001014140c] | |
26061 | ldstub [%i1+0x001],%l3 ! Mem[0000000020800001] | |
26062 | subc %l7,%l5,%l3 | |
26063 | retl | |
26064 | ldd [%o1+0x038],%f2 ! Mem[0000000010041438] | |
26065 | p0_jmpl_3_he: | |
26066 | ld [%i5+0x008],%f22 ! Mem[0000000010141408] | |
26067 | stx %l0,[%i2+0x008] ! Mem[0000000010081408] | |
26068 | ldsw [%i4+0x018],%l5 ! Mem[0000000010101418] | |
26069 | lduh [%i1+0x02c],%l0 ! Mem[000000001004142c] | |
26070 | ldsh [%i2+0x038],%l5 ! Mem[0000000010081438] | |
26071 | jmpl %g6+8,%g0 | |
26072 | stb %l7,[%i4+0x02e] ! Mem[000000001010142e] | |
26073 | p0_call_3_he: | |
26074 | std %l0,[%i1+0x010] ! Mem[0000000010041410] | |
26075 | ldd [%i6+0x000],%f16 ! Mem[0000000010181400] | |
26076 | ldsh [%i6+0x03a],%l2 ! Mem[000000001018143a] | |
26077 | retl | |
26078 | ldsh [%i2+0x01c],%l0 ! Mem[000000001008141c] | |
26079 | p0_jmpl_3_ho: | |
26080 | ld [%o5+0x008],%f22 ! Mem[0000000010141408] | |
26081 | stx %l0,[%o2+0x008] ! Mem[0000000010081408] | |
26082 | ldsw [%o4+0x018],%l5 ! Mem[0000000010101418] | |
26083 | lduh [%o1+0x02c],%l0 ! Mem[000000001004142c] | |
26084 | ldsh [%o2+0x038],%l5 ! Mem[0000000010081438] | |
26085 | jmpl %g6+8,%g0 | |
26086 | stb %l7,[%o4+0x02e] ! Mem[000000001010142e] | |
26087 | p0_call_3_ho: | |
26088 | std %l0,[%o1+0x010] ! Mem[0000000010041410] | |
26089 | ldd [%o6+0x000],%f16 ! Mem[0000000010181400] | |
26090 | ldsh [%o6+0x03a],%l2 ! Mem[000000001018143a] | |
26091 | retl | |
26092 | ldsh [%o2+0x01c],%l0 ! Mem[000000001008141c] | |
26093 | user_jump3_end: | |
26094 | ||
26095 | .seg "data" | |
26096 | .align 0x2000 | |
26097 | user_data_start: | |
26098 | done_flags: | |
26099 | .word 0 | |
26100 | .align 8 | |
26101 | done_count: | |
26102 | .word 0,0 | |
26103 | Start_Flags: | |
26104 | .word 0,0,0,0 | |
26105 | Finish_Flag: | |
26106 | .word 0,0 | |
26107 | .align 8 | |
26108 | num_processors: | |
26109 | .word 1 | |
26110 | num_agents: | |
26111 | .word 0 | |
26112 | no_membar: | |
26113 | .word 0 | |
26114 | max_ireg: | |
26115 | .word 8,0 | |
26116 | max_freg: | |
26117 | .word 32,0 | |
26118 | .align 64 | |
26119 | p0_temp: | |
26120 | .word 0,0,0,0,0,0,0,0 | |
26121 | .word 0,0,0,0,0,0,0,0 | |
26122 | .word 0,0,0,0,0,0,0,0 | |
26123 | .word 0,0,0,0,0,0,0,0 | |
26124 | p0_debug: | |
26125 | .word 0,0,0,0,0,0,0,0 | |
26126 | .word 0,0,0,0,0,0,0,0 | |
26127 | p0_fsr: | |
26128 | .word 0x00000000,0x00000000 | |
26129 | .align 8 | |
26130 | p0_loop_cnt: | |
26131 | .word 1,0 | |
26132 | max_windows: | |
26133 | .word 1,0,0,0,0,0,0,0 | |
26134 | .word 0,0,0,0,0,0,0,0 | |
26135 | .word 0,0,0,0,0,0,0,0 | |
26136 | .word 0,0,0,0,0,0,0,0 | |
26137 | .word 0,0,0,0,0,0,0,0 | |
26138 | .word 0,0,0,0,0,0,0,0 | |
26139 | .word 0,0,0,0,0,0,0,0 | |
26140 | .word 0,0,0,0,0,0,0,0 | |
26141 | .word 0,0,0,0,0,0,0,0 | |
26142 | .word 0,0,0,0,0,0,0,0 | |
26143 | .word 0,0,0,0,0,0,0,0 | |
26144 | .word 0,0,0,0,0,0,0,0 | |
26145 | .word 0,0,0,0,0,0,0,0 | |
26146 | .word 0,0,0,0,0,0,0,0 | |
26147 | .word 0,0,0,0,0,0,0,0 | |
26148 | .word 0,0,0,0,0,0,0,0 | |
26149 | .word 0,0,0,0,0,0,0,0 | |
26150 | .word 0,0,0,0,0,0,0,0 | |
26151 | .word 0,0,0,0,0,0,0,0 | |
26152 | .word 0,0,0,0,0,0,0,0 | |
26153 | .word 0,0,0,0,0,0,0,0 | |
26154 | .word 0,0,0,0,0,0,0,0 | |
26155 | .word 0,0,0,0,0,0,0,0 | |
26156 | .word 0,0,0,0,0,0,0,0 | |
26157 | .word 0,0,0,0,0,0,0,0 | |
26158 | .word 0,0,0,0,0,0,0,0 | |
26159 | .word 0,0,0,0,0,0,0,0 | |
26160 | .word 0,0,0,0,0,0,0,0 | |
26161 | .word 0,0,0,0,0,0,0,0 | |
26162 | .word 0,0,0,0,0,0,0,0 | |
26163 | .word 0,0,0,0,0,0,0,0 | |
26164 | .word 0,0,0,0,0,0,0,0 | |
26165 | ||
26166 | .align 8 | |
26167 | p0_init_registers: | |
26168 | .word 0x104294b8,0x6f381658 ! Init value for %l0 | |
26169 | .word 0xc68c7ca0,0x2b0f7a2e ! Init value for %l1 | |
26170 | .word 0x6c72aba8,0x842b9a6c ! Init value for %l2 | |
26171 | .word 0x782d602e,0x6ef09e92 ! Init value for %l3 | |
26172 | .word 0x58124dec,0x8d643538 ! Init value for %l4 | |
26173 | .word 0x6c8dd8d2,0x2c28d25d ! Init value for %l5 | |
26174 | .word 0x02629122,0xea11b213 ! Init value for %l6 | |
26175 | .word 0xe57709b2,0x5cf831b4 ! Init value for %l7 | |
26176 | .align 64 | |
26177 | p0_init_freg: | |
26178 | .word 0xac476bd0,0x09d31c41 ! Init value for %f0 | |
26179 | .word 0x1b14921f,0xa74fbc72 ! Init value for %f2 | |
26180 | .word 0x6dc55018,0x53b092e5 ! Init value for %f4 | |
26181 | .word 0x25f21a9a,0x05ccba88 ! Init value for %f6 | |
26182 | .word 0xa129439b,0x4593b975 ! Init value for %f8 | |
26183 | .word 0x45269cc7,0xdde86312 ! Init value for %f10 | |
26184 | .word 0xf19cdde6,0x7bfaa699 ! Init value for %f12 | |
26185 | .word 0x8fc7434f,0x1e45e32a ! Init value for %f14 | |
26186 | .word 0x694085e9,0x11b4cdbc ! Init value for %f16 | |
26187 | .word 0x1966b200,0x0765828c ! Init value for %f18 | |
26188 | .word 0x819eb122,0x352281ad ! Init value for %f20 | |
26189 | .word 0x6dbfc13c,0x46921a93 ! Init value for %f22 | |
26190 | .word 0xf57f1752,0x0ef50f98 ! Init value for %f24 | |
26191 | .word 0xb5b530e6,0x68d7666b ! Init value for %f26 | |
26192 | .word 0x4da374b8,0xa99b4462 ! Init value for %f28 | |
26193 | .word 0x6d163b25,0xffedc807 ! Init value for %f30 | |
26194 | .word 0x94c309f8,0xb1889df7 ! Init value for %f32 | |
26195 | .word 0xf48bcd52,0x51da7ad0 ! Init value for %f34 | |
26196 | .word 0x407f1214,0x55543911 ! Init value for %f36 | |
26197 | .word 0x634b5b93,0xfe4b4b07 ! Init value for %f38 | |
26198 | .word 0x250d3a8d,0xceebe63f ! Init value for %f40 | |
26199 | .word 0x3b474f0a,0xe777c83f ! Init value for %f42 | |
26200 | .word 0x6cbe0bce,0xeec8a94a ! Init value for %f44 | |
26201 | .word 0xb46834ce,0x51226702 ! Init value for %f46 | |
26202 | .word 0x67634574,0x5484de9f | |
26203 | .word 0x11b6e75c,0xcf71c65b | |
26204 | .word 0x6f39488e,0x4e86ba01 | |
26205 | .word 0xf3c83e10,0x1f6c22a7 | |
26206 | .word 0x98c42a88,0x7e911290 | |
26207 | .word 0x8e69cc30,0xf13af0d5 | |
26208 | .word 0x416299f1,0xb6c492b2 | |
26209 | .word 0x1b638650,0x5451dda6 | |
26210 | p0_share_mask: | |
26211 | .word 0xffff0000,0x00000000 | |
26212 | .word 0x00000000,0x00000000 | |
26213 | .word 0x00000000,0x00000000 | |
26214 | .word 0x00000000,0x00000000 | |
26215 | .word 0x00000000,0x00000000 | |
26216 | .word 0x00000000,0x00000000 | |
26217 | .word 0x00000000,0x00000000 | |
26218 | .word 0x00000000,0x00000000 | |
26219 | p0_expected_registers: | |
26220 | .word 0x00000000,0xff000000 | |
26221 | .word 0x00000000,0x00000000 | |
26222 | .word 0x00000000,0x000000ff | |
26223 | .word 0x00000000,0x000000ff | |
26224 | .word 0x00000000,0x00000000 | |
26225 | .word 0x00000000,0x00000000 | |
26226 | .word 0x00000000,0x00000000 | |
26227 | .word 0x00000000,0x00000000 | |
26228 | p0_expected_fp_regs: | |
26229 | .word 0x9cffb68a,0x00000000 | |
26230 | .word 0x00000000,0xffffffff | |
26231 | .word 0x00000000,0x00000000 | |
26232 | .word 0x00005e27,0x00000000 | |
26233 | .word 0x00000000,0x0000ffff | |
26234 | .word 0xffffffff,0x00000000 | |
26235 | .word 0x000000ff,0xffffff00 | |
26236 | .word 0x00000000,0xffffff00 | |
26237 | .word 0xff00b68a,0x00000000 | |
26238 | .word 0x000000ff,0x00000000 | |
26239 | .word 0x00000000,0x00000000 | |
26240 | .word 0xffffffff,0xffff0000 | |
26241 | .word 0x00000000,0x64479a75 | |
26242 | .word 0xffffffff,0x000000ff | |
26243 | .word 0x00000000,0x00000000 | |
26244 | .word 0x00000000,0x000000ff | |
26245 | .word 0x00000000,0x00000000 ! %fsr = 0000000000000000 | |
26246 | p0_local0_expect: | |
26247 | .word 0x9cffb68a,0x0000759a | |
26248 | .word 0x00000000,0x00000000 | |
26249 | .word 0xffff0000,0x00000000 | |
26250 | .word 0x00000000,0x00000000 | |
26251 | .word 0x00000000,0xffffffff | |
26252 | .word 0x0000ffff,0xa3ffade0 | |
26253 | .word 0x00000000,0x00000000 | |
26254 | .word 0x00000000,0x00000000 | |
26255 | p0_local0_sec_expect: | |
26256 | .word 0x00000000,0xff000000 | |
26257 | .word 0x00000000,0x000000ff | |
26258 | .word 0xff00b68a,0x00000000 | |
26259 | .word 0xff000000,0x00ff00c4 | |
26260 | .word 0x00000000,0x000000ff | |
26261 | .word 0x00000000,0x0000ffff | |
26262 | .word 0xffff275e,0xffffffff | |
26263 | .word 0x5e000000,0x00000000 | |
26264 | p0_local1_expect: | |
26265 | .word 0x0000ffff,0x00000000 | |
26266 | .word 0x00000000,0x000000ff | |
26267 | .word 0x00000000,0x000000ff | |
26268 | .word 0x0000ff00,0xffffffff | |
26269 | .word 0x00000000,0x00000000 | |
26270 | .word 0x000000ff,0x0000001a | |
26271 | .word 0x00005e27,0x00000000 | |
26272 | .word 0x00000000,0x000000ff | |
26273 | p0_local1_sec_expect: | |
26274 | .word 0x00000000,0x275e0000 | |
26275 | .word 0x00000000,0x8ab60000 | |
26276 | .word 0x00ffffff,0x64479a75 | |
26277 | .word 0x02226c6b,0x57119e5e | |
26278 | .word 0x000000ff,0xff000000 | |
26279 | .word 0x64479a75,0xbb9180c7 | |
26280 | .word 0xffffffff,0xff000000 | |
26281 | .word 0xffffffff,0x000000ff | |
26282 | p0_local2_expect: | |
26283 | .word 0xff000000,0x00000000 | |
26284 | .word 0x00000000,0xffffffff | |
26285 | .word 0x00000000,0x00000000 | |
26286 | .word 0x00005e27,0x00000000 | |
26287 | .word 0x0000ff00,0x0000ffff | |
26288 | .word 0x00000000,0xffff0000 | |
26289 | .word 0x00000000,0xffffffff | |
26290 | .word 0x000000ff,0x000000ff | |
26291 | p0_local2_sec_expect: | |
26292 | .word 0x00000000,0x00000000 | |
26293 | .word 0xffffffff,0x00000000 | |
26294 | .word 0x00000000,0x8ab6ff9c | |
26295 | .word 0x00000000,0x8ab60000 | |
26296 | .word 0x000000ff,0xff000000 | |
26297 | .word 0xc78091bb,0xff000000 | |
26298 | .word 0x5e000000,0xffff0000 | |
26299 | .word 0xff000000,0xffffffff | |
26300 | p0_local3_expect: | |
26301 | .word 0x000000ff,0x00ff005e | |
26302 | .word 0xff000000,0x00000000 | |
26303 | .word 0x000000ff,0x000000ff | |
26304 | .word 0x5e27ffff,0x00000000 | |
26305 | .word 0x00000000,0x00000000 | |
26306 | .word 0xff0000ff,0x64ffffff | |
26307 | .word 0xffff0000,0x0000ffff | |
26308 | .word 0xffffffff,0xff27ffff | |
26309 | p0_local3_sec_expect: | |
26310 | .word 0x00000000,0x000000ff | |
26311 | .word 0x00000000,0x00000000 | |
26312 | .word 0xa3ffade0,0x00000000 | |
26313 | .word 0x5e9e1157,0x6b6c2202 | |
26314 | .word 0x0000009c,0xb100901c | |
26315 | .word 0xff00ffe4,0xffff00ff | |
26316 | .word 0x5eff6960,0xff9a0036 | |
26317 | .word 0x02226c6b,0x57119e5e | |
26318 | p0_local4_expect: | |
26319 | .word 0x00000000,0xffff0000 | |
26320 | .word 0x00000000,0x00000000 | |
26321 | .word 0xff000000,0x00000000 | |
26322 | .word 0x00000000,0x00000000 | |
26323 | .word 0xff0000ff,0x00ff0000 | |
26324 | .word 0x00001157,0x6b6c2202 | |
26325 | .word 0xff0000ff,0xffffff00 | |
26326 | .word 0x00000000,0xffffffff | |
26327 | p0_local4_sec_expect: | |
26328 | .word 0x000000ff,0x00000000 | |
26329 | .word 0x000000ff,0x00000000 | |
26330 | .word 0xff000000,0x00000000 | |
26331 | .word 0x000000ff,0xff000000 | |
26332 | .word 0x3bedac39,0xd81a5b92 | |
26333 | .word 0xc78091bb,0x759a4764 | |
26334 | .word 0xfac65f36,0x9ce0b68a | |
26335 | .word 0x46ee6de4,0xc49410cd | |
26336 | p0_local5_expect: | |
26337 | .word 0xff000000,0xff000000 | |
26338 | .word 0x00000000,0x000000ff | |
26339 | .word 0x00000000,0x8ab6ff9c | |
26340 | .word 0x00005e27,0x00000000 | |
26341 | .word 0xa3ffad00,0x00000000 | |
26342 | .word 0xffffffff,0x00000000 | |
26343 | .word 0x000000ff,0xffffff00 | |
26344 | .word 0x00000000,0xffffff00 | |
26345 | p0_local5_sec_expect: | |
26346 | .word 0x00ff0000,0x9cffb68a | |
26347 | .word 0x00000000,0x8ab6ff9c | |
26348 | .word 0x00000000,0xffffffff | |
26349 | .word 0xc400ff00,0x000000ff | |
26350 | .word 0xff000000,0x00000000 | |
26351 | .word 0xffff0000,0x00000000 | |
26352 | .word 0xffffffff,0x5e27ffff | |
26353 | .word 0x00000000,0x0000005e | |
26354 | p0_local6_expect: | |
26355 | .word 0xff000000,0x00000000 | |
26356 | .word 0x00000000,0xffffffff | |
26357 | .word 0x00000000,0x00000000 | |
26358 | .word 0x00000000,0x8ab6ff9c | |
26359 | .word 0x5e0000ff,0xffffffff | |
26360 | .word 0xffff0000,0x00000000 | |
26361 | .word 0x00000000,0xff000000 | |
26362 | .word 0x5e000000,0xff000000 | |
26363 | p0_local6_sec_expect: | |
26364 | .word 0x00ffffff,0x00000000 | |
26365 | .word 0x00000000,0x000000ff | |
26366 | .word 0xff000000,0x00000000 | |
26367 | .word 0x00000000,0x0000005e | |
26368 | .word 0x000000ff,0x0000ffff | |
26369 | .word 0xff00ffff,0x00000000 | |
26370 | .word 0x0000001a,0xff0000ff | |
26371 | .word 0x00ffffff,0xff000000 | |
26372 | share0_expect: | |
26373 | .word 0x00001669,0xe0a8ae84 | |
26374 | .word 0x480f4710,0x7b105e83 | |
26375 | .word 0x3edd27e4,0xf88bb520 | |
26376 | .word 0x50070c8a,0x579e0d42 | |
26377 | .word 0x9c19b276,0xc16a2219 | |
26378 | .word 0xf4c4c1da,0xeaba29ad | |
26379 | .word 0xca259cec,0xa144b9b0 | |
26380 | .word 0x6fefe1ff,0x34babc50 | |
26381 | share1_expect: | |
26382 | .word 0xff000db6,0xcceb42c9 | |
26383 | .word 0x3b448c34,0x51a61a0f | |
26384 | .word 0xfc7f375e,0x332215a5 | |
26385 | .word 0x7f896672,0x2fc38107 | |
26386 | .word 0xc2a68005,0xc64ed6b4 | |
26387 | .word 0x7d0f8346,0xbf36d0fc | |
26388 | .word 0x3e9e64ce,0x0daf2736 | |
26389 | .word 0xe5ff1e4e,0x409dd5b7 | |
26390 | .word 0xffff9ffa,0xee7bc3ca | |
26391 | .word 0xb0d0114d,0x4d998307 | |
26392 | .word 0x443e1728,0xa9c0b7d4 | |
26393 | .word 0x9c69a293,0xf9c3d983 | |
26394 | .word 0xced5bcdb,0x5fea6277 | |
26395 | .word 0x27de3d78,0xf99a7ef3 | |
26396 | .word 0x6443fea1,0x296c76d4 | |
26397 | .word 0x93fe13ef,0xd4874f74 | |
26398 | share2_expect: | |
26399 | .word 0xfffffe0c,0xa654e638 | |
26400 | .word 0x91e16a18,0x70f78b44 | |
26401 | .word 0xac03868b,0xac29a23b | |
26402 | .word 0xb77a60f3,0x6e6ec4f7 | |
26403 | .word 0x1062bc55,0x47dc1650 | |
26404 | .word 0x8f1cf0e2,0x15245273 | |
26405 | .word 0xa995bf6d,0x89f5e893 | |
26406 | .word 0x260f1bf3,0x54663646 | |
26407 | share3_expect: | |
26408 | .word 0x00009a65,0x86f860f8 | |
26409 | .word 0x5ba3b11d,0x2f47419e | |
26410 | .word 0x9f3a17d5,0x1f050687 | |
26411 | .word 0xa23652b7,0xb0ca66d8 | |
26412 | .word 0x1e66e12c,0xabbfe959 | |
26413 | .word 0xc8a4914c,0x14770412 | |
26414 | .word 0x89a6cd74,0x978d1477 | |
26415 | .word 0xdab16bcc,0x2beb15a7 | |
26416 | .word 0xffff5e5c,0xa84deb0f | |
26417 | .word 0x7cf2f23d,0x7cc23182 | |
26418 | .word 0x1e564a86,0xf2f528db | |
26419 | .word 0xa373b907,0x29485bc9 | |
26420 | .word 0xf0a391dc,0x5d4f1502 | |
26421 | .word 0x175e084f,0x292c7a82 | |
26422 | .word 0x5f67959a,0xe039ad2b | |
26423 | .word 0x704fdc97,0xe0f4d379 | |
26424 | .word 0xff000b33,0xb3a0d66c | |
26425 | .word 0xf3fa5f76,0xdc9d5ba2 | |
26426 | .word 0xdae9aad7,0x6f7d055a | |
26427 | .word 0x875534b1,0x06969332 | |
26428 | .word 0xa7d89be6,0x73ce7d16 | |
26429 | .word 0xbc1241c9,0xaeef3418 | |
26430 | .word 0x8e910c32,0x206c9eab | |
26431 | .word 0x6e7f0417,0x7d9a953c | |
26432 | .word 0x00ff4e2c,0xfd3559fa | |
26433 | .word 0xc13820f7,0x25471c9f | |
26434 | .word 0xbb71a27a,0x4a5b7d2d | |
26435 | .word 0x6e97287c,0x9593ddb9 | |
26436 | .word 0x78fd5db3,0xa6127237 | |
26437 | .word 0x5a155e08,0x45ebfcc1 | |
26438 | .word 0xbaaac354,0x3d4fe603 | |
26439 | .word 0xa51a4150,0xe86d4435 | |
26440 | .word 0xffff39e7,0x8b87a19f | |
26441 | .word 0x06616beb,0xab3942ed | |
26442 | .word 0xb8334997,0x44ad7c52 | |
26443 | .word 0xd6238af9,0x445662f6 | |
26444 | .word 0x1397a6db,0x86ec5249 | |
26445 | .word 0xb67d123d,0xd000d61d | |
26446 | .word 0x997271b6,0xbf6bbfbc | |
26447 | .word 0x4f1580df,0xaba1dd43 | |
26448 | .word 0x0000f8a0,0x4201b5e5 | |
26449 | .word 0x10e28600,0x487fc632 | |
26450 | .word 0x599becec,0xebd520aa | |
26451 | .word 0xdd4e9c4f,0xd75cf531 | |
26452 | .word 0xb683366e,0xd6a20e2d | |
26453 | .word 0x94a61ea5,0x6132bebd | |
26454 | .word 0x7fa4c40a,0xde33e002 | |
26455 | .word 0xf62b226b,0xc9c23a90 | |
26456 | .word 0xffffdb07,0xc6b4ca97 | |
26457 | .word 0xa42a9247,0x986e079e | |
26458 | .word 0x8742924d,0x9f56a678 | |
26459 | .word 0xae3a2109,0x46211c47 | |
26460 | .word 0x3a50ef44,0x51dde5c3 | |
26461 | .word 0x55a3461f,0xfe7598c6 | |
26462 | .word 0x372b3259,0x6906bf93 | |
26463 | .word 0x8c331eee,0xac955e70 | |
26464 | .word 0x0000fa38,0xc60e0e5d | |
26465 | .word 0xeec72511,0xb93a9c92 | |
26466 | .word 0x2c6b5fa4,0x5f02fd7b | |
26467 | .word 0x57e15614,0xb3f23485 | |
26468 | .word 0x19237358,0x9de61be2 | |
26469 | .word 0x1c78e548,0x020317a1 | |
26470 | .word 0xf92fcbd1,0x74446f86 | |
26471 | .word 0x65d2ee18,0xd2468014 | |
26472 | p0_invalidate_semaphore: | |
26473 | .word 0 | |
26474 | ||
26475 | ! Data for check points | |
26476 | ||
26477 | .align 8 | |
26478 | p0_check_pt_data_1: | |
26479 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26480 | .word 0x00000000,0x08ce0e40 ! Expected data for %l0 | |
26481 | .word 0x8a11f7ce,0x1748fc23 ! Expected data for %l1 | |
26482 | .word 0xc0746fa4,0xef2c740a ! Expected data for %l2 | |
26483 | .word 0x00000000,0x4243424e ! Expected data for %l3 | |
26484 | .word 0x00000000,0x0f867c42 ! Expected data for %l5 | |
26485 | .word 0x00000000,0x0000008a ! Expected data for %l6 | |
26486 | .word 0x00000000,0x000064dd ! Expected data for %l7 | |
26487 | .word 0x00b26619,0x32c3ea98 ! Expected data for %f0 | |
26488 | .word 0x8fc7434f,0x7aa1e7c6 ! Expected data for %f14 | |
26489 | .word 0x505ebc46,0x11b4cdbc ! Expected data for %f16 | |
26490 | .word 0x6c8dcb1a,0xa695a673 ! Expected data for %f18 | |
26491 | .word 0x00000000,0x0000006e ! Expected data for %f20 | |
26492 | .word 0x186ff6e2,0xbfdc93ca ! Expected data for %f22 | |
26493 | .word 0x782a074d,0x7f5ce62c ! Expected data for %f24 | |
26494 | .word 0x13a1c433,0xe4e47a5d ! Expected data for %f26 | |
26495 | .word 0x5e27f9ff,0x46c0304d ! Expected data for %f28 | |
26496 | .word 0x7376783f,0xcb38088b ! Expected data for %f30 | |
26497 | p0_check_pt_data_2: | |
26498 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26499 | .word 0x00000000,0x000000c6 ! Expected data for %l0 | |
26500 | .word 0x00000000,0x000064dd ! Expected data for %l1 | |
26501 | .word 0xb050a390,0x9318db84 ! Expected data for %l2 | |
26502 | .word 0x00000000,0x0000005e ! Expected data for %l3 | |
26503 | .word 0x00000000,0xd9876ee7 ! Expected data for %l4 | |
26504 | .word 0x00000000,0x000008c9 ! Expected data for %l6 | |
26505 | .word 0x00000000,0x000000dd ! Expected data for %l7 | |
26506 | .word 0x00b26619,0x32c3ea98 ! Expected data for %f0 | |
26507 | .word 0xaeae3c8d,0xd9876ee7 ! Expected data for %f4 | |
26508 | .word 0xf19cdde6,0x7bfaa699 ! Expected data for %f6 | |
26509 | .word 0x83f5ff7f,0xb469a3ff ! Expected data for %f16 | |
26510 | .word 0x1c53baf3,0xf7715b3a ! Expected data for %f18 | |
26511 | .word 0x99a6fa7b,0xe6dd9cf1 ! Expected data for %f20 | |
26512 | .word 0x2396c122,0x2877d479 ! Expected data for %f22 | |
26513 | .word 0x1b849726,0xb4a1c3fe ! Expected data for %f24 | |
26514 | .word 0xcc4084ed,0xb5fce6ee ! Expected data for %f26 | |
26515 | .word 0xffb8ffb0,0x43d2e186 ! Expected data for %f28 | |
26516 | .word 0xd160e6ca,0x389968e7 ! Expected data for %f30 | |
26517 | p0_check_pt_data_3: | |
26518 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26519 | .word 0x00000000,0x238edb84 ! Expected data for %l0 | |
26520 | .word 0x00000000,0xbae3267a ! Expected data for %l1 | |
26521 | .word 0xffffffff,0xf7715b3a ! Expected data for %l2 | |
26522 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
26523 | .word 0x00000000,0x000073a6 ! Expected data for %l4 | |
26524 | .word 0x00000000,0x00006ee7 ! Expected data for %l5 | |
26525 | .word 0x00000000,0x0000006e ! Expected data for %l6 | |
26526 | .word 0x00000000,0x00000084 ! Expected data for %l7 | |
26527 | .word 0x00b26619,0x76fcdb84 ! Expected data for %f0 | |
26528 | .word 0x4e424342,0xa74fbc72 ! Expected data for %f2 | |
26529 | .word 0xa129439b,0xc03c56b3 ! Expected data for %f8 | |
26530 | .word 0xf19cdde6,0x1acb8d6c ! Expected data for %f12 | |
26531 | .word 0x90a350b0,0x7aa1e7c6 ! Expected data for %f14 | |
26532 | .word 0x4266b200,0xba8a98d7 ! Expected data for %f16 | |
26533 | .word 0xba8a98d7,0xae6e0959 ! Expected data for %f18 | |
26534 | .word 0x624810c0,0x5d2f4385 ! Expected data for %f20 | |
26535 | .word 0x16d6ce81,0x6a6a89be ! Expected data for %f22 | |
26536 | .word 0x2f13f88e,0xb83cf293 ! Expected data for %f24 | |
26537 | .word 0xc9db2797,0x4929e3d1 ! Expected data for %f26 | |
26538 | .word 0x016c83ca,0xe1f643c5 ! Expected data for %f28 | |
26539 | .word 0x11b07fb2,0x4b34ff17 ! Expected data for %f30 | |
26540 | p0_check_pt_data_4: | |
26541 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26542 | .word 0x00000000,0x6e000000 ! Expected data for %l0 | |
26543 | .word 0x00000000,0x000000c6 ! Expected data for %l1 | |
26544 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
26545 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
26546 | .word 0x00000000,0x0000006f ! Expected data for %l4 | |
26547 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
26548 | .word 0x00000000,0x1acb8d00 ! Expected data for %l6 | |
26549 | .word 0x00000000,0xb469a3ff ! Expected data for %l7 | |
26550 | .word 0x83f5ff7f,0xb469a3ff ! Expected data for %f0 | |
26551 | .word 0x1c53baf3,0xf7715bff ! Expected data for %f2 | |
26552 | .word 0x99a6fa7b,0xc6e7a17a ! Expected data for %f4 | |
26553 | .word 0x2396c122,0x2877d479 ! Expected data for %f6 | |
26554 | .word 0x1b849726,0xb4a1c3fe ! Expected data for %f8 | |
26555 | .word 0xcc4084ed,0xb5fce6ee ! Expected data for %f10 | |
26556 | .word 0x00ad14ae,0x43d2e186 ! Expected data for %f12 | |
26557 | .word 0xd160e6ca,0x389968e7 ! Expected data for %f14 | |
26558 | .word 0xff746fa4,0xefff740a ! Expected data for %f16 | |
26559 | .word 0xca836c01,0x6d1dd03f ! Expected data for %f18 | |
26560 | .word 0x4e424342,0x377d1d25 ! Expected data for %f20 | |
26561 | .word 0xb4b2c9e5,0xcd516cdb ! Expected data for %f22 | |
26562 | .word 0x25a4a400,0x81924473 ! Expected data for %f24 | |
26563 | .word 0x82183f12,0x58460382 ! Expected data for %f26 | |
26564 | .word 0x16d6ce81,0x40a3c37e ! Expected data for %f28 | |
26565 | .word 0xcc6a42fc,0x9fa18714 ! Expected data for %f30 | |
26566 | p0_check_pt_data_5: | |
26567 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26568 | .word 0x00000000,0x000000dd ! Expected data for %l0 | |
26569 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
26570 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
26571 | .word 0x00000000,0xd9876ee7 ! Expected data for %l3 | |
26572 | .word 0x00000000,0x0000e6ca ! Expected data for %l4 | |
26573 | .word 0x00000000,0xc6e7a17a ! Expected data for %l5 | |
26574 | .word 0xffffffff,0xdd000000 ! Expected data for %l6 | |
26575 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
26576 | .word 0xff2f5de4,0xf7715bff ! Expected data for %f2 | |
26577 | .word 0x1b849726,0xa695a673 ! Expected data for %f8 | |
26578 | .word 0xc6e7a17a,0x43d2e186 ! Expected data for %f12 | |
26579 | .word 0xff00006e,0x0ac97a0f ! Expected data for %f16 | |
26580 | .word 0xff000000,0x00000000 ! Expected data for %f18 | |
26581 | .word 0x000008c9,0x000000dd ! Expected data for %f20 | |
26582 | .word 0xc90a8ea5,0x3eec125e ! Expected data for %f22 | |
26583 | .word 0x0f105c1a,0xed13eb1e ! Expected data for %f24 | |
26584 | .word 0x3d8bd50d,0x767d008b ! Expected data for %f26 | |
26585 | .word 0x8ed62c03,0x37e2e09e ! Expected data for %f28 | |
26586 | .word 0x5205b393,0x20e3dee5 ! Expected data for %f30 | |
26587 | p0_check_pt_data_6: | |
26588 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26589 | .word 0x00000000,0x0000006e ! Expected data for %l0 | |
26590 | .word 0x00000000,0xd6f06643 ! Expected data for %l1 | |
26591 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
26592 | .word 0x00000000,0xefff740a ! Expected data for %l3 | |
26593 | .word 0x00000000,0x0000ff00 ! Expected data for %l4 | |
26594 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
26595 | .word 0xffffffff,0x99a6fa7b ! Expected data for %l6 | |
26596 | .word 0xffffffff,0xffffffca ! Expected data for %l7 | |
26597 | .word 0xba8a98d7,0xae6e0959 ! Expected data for %f0 | |
26598 | .word 0xff2f5de4,0xea11b213 ! Expected data for %f2 | |
26599 | .word 0x99a6fa7b,0xc6e7a17a ! Expected data for %f4 | |
26600 | .word 0x2396c122,0x6e000000 ! Expected data for %f6 | |
26601 | p0_check_pt_data_7: | |
26602 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26603 | .word 0x00000000,0x82183f12 ! Expected data for %l0 | |
26604 | .word 0x00000000,0x58460382 ! Expected data for %l1 | |
26605 | .word 0x00000000,0xff2f5de4 ! Expected data for %l2 | |
26606 | .word 0x00000000,0xea11b213 ! Expected data for %l3 | |
26607 | .word 0x00000000,0x22c19623 ! Expected data for %l4 | |
26608 | .word 0x00000000,0x0000b4a1 ! Expected data for %l5 | |
26609 | .word 0x00000000,0xd160e6ca ! Expected data for %l6 | |
26610 | .word 0x00000000,0x000000ca ! Expected data for %l7 | |
26611 | .word 0x3fd01d6d,0x000008c9 ! Expected data for %f0 | |
26612 | .word 0xf102aa77,0xe76e00ff ! Expected data for %f2 | |
26613 | .word 0xffffffca,0xca836c01 ! Expected data for %f4 | |
26614 | .word 0xed3fd1f8,0xe76e87d9 ! Expected data for %f6 | |
26615 | .word 0x986d70d5,0xe5a11290 ! Expected data for %f8 | |
26616 | .word 0xe0ad09a3,0x4df9a3fa ! Expected data for %f10 | |
26617 | .word 0xb0ffb8ff,0x5e2c8af2 ! Expected data for %f12 | |
26618 | .word 0x9c8e42d7,0xc9082d36 ! Expected data for %f14 | |
26619 | .word 0x269784ff,0x0ac97a0f ! Expected data for %f16 | |
26620 | .word 0xff746fa4,0xa58e0ac9 ! Expected data for %f20 | |
26621 | p0_check_pt_data_8: | |
26622 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26623 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
26624 | .word 0x00000000,0xf102aa77 ! Expected data for %l1 | |
26625 | .word 0x00000000,0x1651b55b ! Expected data for %l2 | |
26626 | .word 0x00000000,0x7a9afc2a ! Expected data for %l3 | |
26627 | .word 0x00000000,0x000084ff ! Expected data for %l4 | |
26628 | .word 0x00000000,0x00000093 ! Expected data for %l5 | |
26629 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
26630 | .word 0x00000000,0x00000084 ! Expected data for %l7 | |
26631 | .word 0x3fd01d6d,0x000008c9 ! Expected data for %f0 | |
26632 | .word 0xf102aa77,0xe76e00ff ! Expected data for %f2 | |
26633 | .word 0xffffffff,0x1a008d84 ! Expected data for %f4 | |
26634 | .word 0xed3fd1f8,0xe76e87d9 ! Expected data for %f6 | |
26635 | .word 0x986d70d5,0x740a1893 ! Expected data for %f8 | |
26636 | .word 0xc90a8ea5,0xa46f74ff ! Expected data for %f16 | |
26637 | .word 0x00000000,0x00000000 ! Expected data for %f22 | |
26638 | p0_check_pt_data_9: | |
26639 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26640 | .word 0x00000000,0xff740000 ! Expected data for %l0 | |
26641 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
26642 | .word 0xffffffff,0xdd000000 ! Expected data for %l2 | |
26643 | .word 0xffffffff,0xffffff00 ! Expected data for %l3 | |
26644 | .word 0x00000000,0x0000b4a1 ! Expected data for %l4 | |
26645 | .word 0x00000000,0x0000000a ! Expected data for %l5 | |
26646 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
26647 | .word 0x00000000,0x0000007a ! Expected data for %l7 | |
26648 | .word 0xc9080000,0x6d1dd03f ! Expected data for %f0 | |
26649 | .word 0xff006ee7,0x77aa02f1 ! Expected data for %f2 | |
26650 | .word 0xff8d001a,0xffffffff ! Expected data for %f4 | |
26651 | .word 0xd9876ee7,0xf8d13fed ! Expected data for %f6 | |
26652 | .word 0x93180a74,0xd5706d98 ! Expected data for %f8 | |
26653 | .word 0xfaa3f94d,0xa309ade0 ! Expected data for %f10 | |
26654 | .word 0xf28a2c5e,0xffb8ffb0 ! Expected data for %f12 | |
26655 | .word 0x362d08c9,0xd7428e9c ! Expected data for %f14 | |
26656 | .word 0x3fd01d6d,0xe45d2fff ! Expected data for %f16 | |
26657 | .word 0x0f105c1a,0xd7988aff ! Expected data for %f24 | |
26658 | p0_check_pt_data_10: | |
26659 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26660 | .word 0x00000000,0xff849726 ! Expected data for %l0 | |
26661 | .word 0xffffffff,0xffffffe0 ! Expected data for %l1 | |
26662 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
26663 | .word 0x00000000,0x000000e5 ! Expected data for %l3 | |
26664 | .word 0x00000000,0x000000e5 ! Expected data for %l4 | |
26665 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
26666 | .word 0x00000000,0x000000a0 ! Expected data for %l7 | |
26667 | .word 0xc9080000,0x000008c9 ! Expected data for %f0 | |
26668 | .word 0x8ed62c9e,0x77aa02f1 ! Expected data for %f2 | |
26669 | .word 0xd9876ee7,0xf8d13fed ! Expected data for %f6 | |
26670 | .word 0x0aff0000,0xd9876ee7 ! Expected data for %f8 | |
26671 | .word 0xf28a2c5e,0x5bb55116 ! Expected data for %f12 | |
26672 | .word 0x8ed62c03,0x00000000 ! Expected data for %f28 | |
26673 | p0_check_pt_data_11: | |
26674 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26675 | .word 0xc90a8ea5,0xa46f74ff ! Expected data for %l0 | |
26676 | .word 0x00000000,0x5bb55116 ! Expected data for %l2 | |
26677 | .word 0x00000000,0xf28a2c5e ! Expected data for %l3 | |
26678 | .word 0x00000000,0x1a5c100f ! Expected data for %l4 | |
26679 | .word 0xfaa3f94d,0xa309adff ! Expected data for %l5 | |
26680 | .word 0x00000000,0xa46f74ff ! Expected data for %l6 | |
26681 | .word 0x00000000,0x0000ff00 ! Expected data for %l7 | |
26682 | .word 0xc9080000,0x000008c9 ! Expected data for %f0 | |
26683 | .word 0x8ed62c9e,0x77aa02f1 ! Expected data for %f2 | |
26684 | .word 0xff8d001a,0xffffffff ! Expected data for %f4 | |
26685 | .word 0xd9876ee7,0xf8d13fed ! Expected data for %f6 | |
26686 | .word 0xff006ee7,0x77aa02f1 ! Expected data for %f10 | |
26687 | .word 0xff849726,0xd7428e9c ! Expected data for %f14 | |
26688 | .word 0x0000ff74,0x6d1dd03f ! Expected data for %f16 | |
26689 | .word 0xff006ee7,0x77aa02f1 ! Expected data for %f18 | |
26690 | .word 0x0a8d001a,0xffffffff ! Expected data for %f20 | |
26691 | .word 0xd9876ee7,0xf8d13fed ! Expected data for %f22 | |
26692 | .word 0x93180a74,0xd5706d98 ! Expected data for %f24 | |
26693 | .word 0xfaa3f94d,0xa309ade0 ! Expected data for %f26 | |
26694 | .word 0xf28a2c5e,0xffb8ffb0 ! Expected data for %f28 | |
26695 | .word 0x362d08c9,0xd7428e9c ! Expected data for %f30 | |
26696 | p0_check_pt_data_12: | |
26697 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26698 | .word 0x00000000,0xed3fd1f8 ! Expected data for %l0 | |
26699 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
26700 | .word 0x00000000,0x10fc9a7a ! Expected data for %l2 | |
26701 | .word 0x00000000,0xa46f74ff ! Expected data for %l3 | |
26702 | .word 0x00000000,0x0000000a ! Expected data for %l4 | |
26703 | .word 0x00000000,0x0000aa77 ! Expected data for %l5 | |
26704 | .word 0x00000000,0x0000ff96 ! Expected data for %l6 | |
26705 | .word 0x3fd01d6d,0x00000000 ! Expected data for %l7 | |
26706 | .word 0xe0ffffff,0xf28a2c5e ! Expected data for %f0 | |
26707 | .word 0x4d072a78,0x88c196ff ! Expected data for %f2 | |
26708 | .word 0x26000000,0x0000b400 ! Expected data for %f4 | |
26709 | .word 0x186ff6e2,0xbfdc93ca ! Expected data for %f6 | |
26710 | .word 0x7a000000,0x7f5ce62c ! Expected data for %f8 | |
26711 | .word 0xe5000000,0x8a000000 ! Expected data for %f10 | |
26712 | .word 0x5e27f9ff,0x46c07bfa ! Expected data for %f12 | |
26713 | .word 0x6e000000,0x00006300 ! Expected data for %f14 | |
26714 | .word 0x0000ff74,0xe0ffffff ! Expected data for %f16 | |
26715 | .word 0x6cbc4fa7,0x1f92141b ! Expected data for %f22 | |
26716 | p0_check_pt_data_13: | |
26717 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26718 | .word 0x00000000,0xa46f74ff ! Expected data for %l0 | |
26719 | .word 0x00000000,0xffad09a3 ! Expected data for %l1 | |
26720 | .word 0x00000000,0xe4746fa4 ! Expected data for %l2 | |
26721 | .word 0x00000000,0xa58e0ac9 ! Expected data for %l3 | |
26722 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
26723 | .word 0x00000000,0x000008c9 ! Expected data for %l5 | |
26724 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
26725 | .word 0x00000000,0x0000006e ! Expected data for %l7 | |
26726 | .word 0xe0ffffff,0xf28a2c5e ! Expected data for %f0 | |
26727 | .word 0x4d072a78,0x00000000 ! Expected data for %f2 | |
26728 | .word 0xed13eb1e,0x0000b400 ! Expected data for %f4 | |
26729 | .word 0x77aa02f1,0x8a708a3a ! Expected data for %f10 | |
26730 | .word 0xf28a2c5e,0xffb8ffb0 ! Expected data for %f14 | |
26731 | .word 0x0a8d001a,0xffb88e9c ! Expected data for %f20 | |
26732 | .word 0x362d08c9,0x00000000 ! Expected data for %f30 | |
26733 | p0_check_pt_data_14: | |
26734 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26735 | .word 0x00000000,0x00001b14 ! Expected data for %l0 | |
26736 | .word 0x00000000,0xfffff102 ! Expected data for %l1 | |
26737 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
26738 | .word 0x00000000,0x000000c9 ! Expected data for %l3 | |
26739 | .word 0x00000000,0x000000d7 ! Expected data for %l4 | |
26740 | .word 0x00b40000,0x1eeb13ed ! Expected data for %l5 | |
26741 | .word 0x00000000,0xed3fd1ff ! Expected data for %l6 | |
26742 | .word 0x00000000,0x269784ff ! Expected data for %l7 | |
26743 | .word 0x4d072a78,0x00000000 ! Expected data for %f2 | |
26744 | .word 0xed13eb1e,0x0000b400 ! Expected data for %f4 | |
26745 | .word 0xff746fa4,0x000008ff ! Expected data for %f10 | |
26746 | .word 0x0000ff74,0xe0ffffff ! Expected data for %f24 | |
26747 | p0_check_pt_data_15: | |
26748 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26749 | .word 0xffffffff,0x185000ff ! Expected data for %l0 | |
26750 | .word 0x00000000,0x00005b30 ! Expected data for %l1 | |
26751 | .word 0xed3fd1f8,0xe76e3fff ! Expected data for %l2 | |
26752 | .word 0x00000000,0x33c4a113 ! Expected data for %l3 | |
26753 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
26754 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
26755 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
26756 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
26757 | .word 0x00000000,0xcaffffff ! Expected data for %f0 | |
26758 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
26759 | .word 0x00c9ffff,0x269784ff ! Expected data for %f4 | |
26760 | .word 0x5e9e1157,0x6b6c2202 ! Expected data for %f6 | |
26761 | .word 0x3bedac39,0xd81a5b92 ! Expected data for %f8 | |
26762 | .word 0xc78091bb,0x759a4764 ! Expected data for %f10 | |
26763 | .word 0xfac65f36,0x9ce0b68a ! Expected data for %f12 | |
26764 | .word 0xffffffe0,0x74ff0000 ! Expected data for %f14 | |
26765 | .word 0xa58e0ac9,0x77aa02f1 ! Expected data for %f18 | |
26766 | .word 0x00000000,0xa46f74ff ! Expected data for %f26 | |
26767 | .word 0x12ffe8dd,0xc79c2645 ! Expected data for %f28 | |
26768 | p0_check_pt_data_16: | |
26769 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26770 | .word 0x8f25cdd8,0x432c3eb6 ! Expected data for %l0 | |
26771 | .word 0xf9726fef,0xe7092e9d ! Expected data for %l1 | |
26772 | .word 0x00740000,0x00000000 ! Expected data for %l2 | |
26773 | .word 0x00000000,0x0000000a ! Expected data for %l3 | |
26774 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
26775 | .word 0x00000000,0xc90a8ea5 ! Expected data for %l5 | |
26776 | .word 0x6e000000,0x00006300 ! Expected data for %l6 | |
26777 | .word 0x00000000,0xffffffff ! Expected data for %l7 | |
26778 | .word 0x00c9ffff,0x269784ff ! Expected data for %f4 | |
26779 | .word 0x00000000,0xd81a5b92 ! Expected data for %f8 | |
26780 | .word 0xc78091bb,0xd9876ee7 ! Expected data for %f10 | |
26781 | .word 0x978d001a,0xffffffe0 ! Expected data for %f16 | |
26782 | .word 0xd7988aff,0x782a074d ! Expected data for %f18 | |
26783 | .word 0xed13eb1e,0x0000b400 ! Expected data for %f20 | |
26784 | .word 0x00000000,0xfffff102 ! Expected data for %f22 | |
26785 | .word 0x2ce65c7f,0x0000007a ! Expected data for %f24 | |
26786 | .word 0x0000008a,0x000000e5 ! Expected data for %f26 | |
26787 | .word 0xfa7bc046,0xfff9275e ! Expected data for %f28 | |
26788 | .word 0x00630000,0x0000006e ! Expected data for %f30 | |
26789 | p0_check_pt_data_17: | |
26790 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26791 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
26792 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
26793 | .word 0x00000000,0x1b14921f ! Expected data for %l2 | |
26794 | .word 0x00000000,0x00000002 ! Expected data for %l3 | |
26795 | .word 0x00000000,0x1a008d97 ! Expected data for %l4 | |
26796 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
26797 | .word 0x00000000,0x00000077 ! Expected data for %l6 | |
26798 | .word 0x00000000,0xcaffffff ! Expected data for %l7 | |
26799 | .word 0x0a8d001a,0xcaffffff ! Expected data for %f0 | |
26800 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
26801 | .word 0xfffff102,0x269784ff ! Expected data for %f4 | |
26802 | .word 0x00000000,0x000000e5 ! Expected data for %f26 | |
26803 | .word 0x0f105c1a,0x00000000 ! Expected data for %f30 | |
26804 | p0_check_pt_data_18: | |
26805 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26806 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
26807 | .word 0x00000000,0x12ffe8dd ! Expected data for %l1 | |
26808 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
26809 | .word 0x00000000,0x9ce0b68a ! Expected data for %l3 | |
26810 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
26811 | .word 0xed13eb1e,0xc9000000 ! Expected data for %l5 | |
26812 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
26813 | .word 0xffffffff,0xffffffff ! Expected data for %f0 | |
26814 | .word 0x00000000,0x6b6c2202 ! Expected data for %f6 | |
26815 | .word 0x00746fa4,0x9ce0b68a ! Expected data for %f12 | |
26816 | .word 0x00740000,0x00000000 ! Expected data for %f16 | |
26817 | .word 0x00740000,0x0000007a ! Expected data for %f24 | |
26818 | .word 0x0f105c1a,0xe0ffffff ! Expected data for %f30 | |
26819 | p0_check_pt_data_19: | |
26820 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26821 | .word 0x978d001a,0xd7988a00 ! Expected data for %l0 | |
26822 | .word 0x00000000,0x77aa02f1 ! Expected data for %l1 | |
26823 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
26824 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
26825 | .word 0x00000000,0xffffffff ! Expected data for %l4 | |
26826 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
26827 | .word 0x00000000,0x0000ffff ! Expected data for %l6 | |
26828 | .word 0xffffffff,0xffffffff ! Expected data for %f0 | |
26829 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
26830 | .word 0x00746fa4,0x0a8d001a ! Expected data for %f12 | |
26831 | .word 0x0f105c1a,0x782a074d ! Expected data for %f18 | |
26832 | .word 0x13a1c433,0xffffffff ! Expected data for %f20 | |
26833 | .word 0x6e000000,0x00006300 ! Expected data for %f22 | |
26834 | .word 0x75b99345,0x9b4329a1 ! Expected data for %f26 | |
26835 | .word 0xffffffca,0x00000000 ! Expected data for %f28 | |
26836 | p0_check_pt_data_20: | |
26837 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26838 | .word 0x00000000,0x02f1ffff ! Expected data for %l0 | |
26839 | .word 0x00000000,0x00007a9a ! Expected data for %l1 | |
26840 | .word 0x00000000,0x269784ff ! Expected data for %l2 | |
26841 | .word 0x00000000,0x00000012 ! Expected data for %l3 | |
26842 | .word 0x0000000f,0xffffffff ! Expected data for %l4 | |
26843 | .word 0x00000000,0x1a5c100f ! Expected data for %l5 | |
26844 | .word 0x00000000,0x20e3dee5 ! Expected data for %l6 | |
26845 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
26846 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
26847 | .word 0x00740000,0x0000007a ! Expected data for %f10 | |
26848 | .word 0x00000000,0xffffffff ! Expected data for %f20 | |
26849 | .word 0x6e000000,0x00006300 ! Expected data for %f22 | |
26850 | p0_check_pt_data_21: | |
26851 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26852 | .word 0x00746fa4,0x1a008d97 ! Expected data for %l0 | |
26853 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
26854 | .word 0x00000000,0x75b99345 ! Expected data for %l2 | |
26855 | .word 0x00000000,0x9b4329a1 ! Expected data for %l3 | |
26856 | .word 0x00000000,0x75b99345 ! Expected data for %l4 | |
26857 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
26858 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
26859 | .word 0xffffffff,0xffffffff ! Expected data for %f0 | |
26860 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
26861 | .word 0xff849726,0x02f1ffff ! Expected data for %f4 | |
26862 | .word 0x000000e5,0x00000000 ! Expected data for %f16 | |
26863 | p0_check_pt_data_22: | |
26864 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26865 | .word 0x00000000,0x00005cff ! Expected data for %l0 | |
26866 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
26867 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
26868 | .word 0x00000000,0xffffffe0 ! Expected data for %l3 | |
26869 | .word 0x00000000,0x45936fa4 ! Expected data for %l4 | |
26870 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
26871 | .word 0x00000000,0x0000f1ff ! Expected data for %l6 | |
26872 | .word 0x00000000,0x0000ffff ! Expected data for %l7 | |
26873 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
26874 | .word 0xff849726,0x02f1ffff ! Expected data for %f4 | |
26875 | .word 0x782a074d,0x0000ffff ! Expected data for %f16 | |
26876 | .word 0xf102aa77,0x12000000 ! Expected data for %f18 | |
26877 | .word 0x00007a9a,0x00000000 ! Expected data for %f20 | |
26878 | .word 0x5a7d065e,0x8058821d ! Expected data for %f22 | |
26879 | .word 0xde6a2d8e,0x5372d306 ! Expected data for %f24 | |
26880 | .word 0xe3e2fcc3,0xd3d28b57 ! Expected data for %f26 | |
26881 | .word 0xbe16dcc0,0xb1c0060a ! Expected data for %f28 | |
26882 | .word 0xd9070248,0xb8c2204b ! Expected data for %f30 | |
26883 | p0_check_pt_data_23: | |
26884 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26885 | .word 0x00000000,0xfffff102 ! Expected data for %l0 | |
26886 | .word 0x00000000,0x4d072a78 ! Expected data for %l1 | |
26887 | .word 0x00740000,0x0000007a ! Expected data for %l2 | |
26888 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
26889 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
26890 | .word 0xffffffff,0xff000012 ! Expected data for %l5 | |
26891 | .word 0x00000000,0x0000007a ! Expected data for %l6 | |
26892 | .word 0xffffffff,0xff8d001a ! Expected data for %l7 | |
26893 | .word 0x00000000,0x00007400 ! Expected data for %f0 | |
26894 | .word 0x4d072a78,0xffffffe0 ! Expected data for %f2 | |
26895 | .word 0x00007400,0x00000000 ! Expected data for %f4 | |
26896 | .word 0x00630000,0x0000006e ! Expected data for %f6 | |
26897 | .word 0x7a000000,0x00007400 ! Expected data for %f8 | |
26898 | .word 0x00746fa4,0x0a8d001a ! Expected data for %f10 | |
26899 | .word 0x00000000,0xcaffffff ! Expected data for %f12 | |
26900 | .word 0xffffffe0,0x1a5c100f ! Expected data for %f14 | |
26901 | .word 0xff000000,0xffffffff ! Expected data for %f18 | |
26902 | .word 0xd9070248,0x1eeb13ed ! Expected data for %f20 | |
26903 | p0_check_pt_data_24: | |
26904 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26905 | .word 0x00000000,0x000000d9 ! Expected data for %l0 | |
26906 | .word 0x00000000,0xfffff1ff ! Expected data for %l1 | |
26907 | .word 0x00000000,0xf1b600ff ! Expected data for %l2 | |
26908 | .word 0x00000000,0xffffffff ! Expected data for %l3 | |
26909 | .word 0x00000000,0x8058821d ! Expected data for %l4 | |
26910 | .word 0x00000000,0xff070248 ! Expected data for %l6 | |
26911 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
26912 | .word 0x00000000,0x00007400 ! Expected data for %f0 | |
26913 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
26914 | .word 0x00007400,0x00000000 ! Expected data for %f4 | |
26915 | .word 0x925b1ad8,0x000000e7 ! Expected data for %f6 | |
26916 | .word 0xff00b6f1,0xffff275e ! Expected data for %f16 | |
26917 | .word 0xffffffff,0xffffffff ! Expected data for %f18 | |
26918 | .word 0x75b99345,0x9b4329a1 ! Expected data for %f20 | |
26919 | .word 0x5e9e1157,0x6b6c2202 ! Expected data for %f22 | |
26920 | .word 0x3bedac39,0xd81a5b92 ! Expected data for %f24 | |
26921 | .word 0xc78091bb,0x759a4764 ! Expected data for %f26 | |
26922 | .word 0xfac65f36,0x9ce0b68a ! Expected data for %f28 | |
26923 | .word 0x46ee6de4,0xc49410cd ! Expected data for %f30 | |
26924 | p0_check_pt_data_25: | |
26925 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26926 | .word 0x00000000,0x782a07ff ! Expected data for %l0 | |
26927 | .word 0x000000e7,0xd81a5b92 ! Expected data for %l1 | |
26928 | .word 0x00000000,0x2c000000 ! Expected data for %l2 | |
26929 | .word 0x00000000,0x782a07ff ! Expected data for %l3 | |
26930 | .word 0x00000000,0xffffffb4 ! Expected data for %l4 | |
26931 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
26932 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
26933 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
26934 | .word 0x00000000,0x00007400 ! Expected data for %f0 | |
26935 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
26936 | .word 0x00000000,0x00000000 ! Expected data for %f12 | |
26937 | .word 0xff000000,0xffffffff ! Expected data for %f14 | |
26938 | p0_check_pt_data_26: | |
26939 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26940 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
26941 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
26942 | .word 0x00000000,0x0000ffff ! Expected data for %l2 | |
26943 | .word 0xf102aa77,0x00000000 ! Expected data for %l3 | |
26944 | .word 0x00000000,0x000000e7 ! Expected data for %l4 | |
26945 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
26946 | .word 0x00000000,0x00000077 ! Expected data for %l6 | |
26947 | .word 0x00000000,0x0f105c1a ! Expected data for %l7 | |
26948 | .word 0x00006c6b,0x00000000 ! Expected data for %f0 | |
26949 | .word 0x00007400,0xff8a98d7 ! Expected data for %f4 | |
26950 | .word 0xffff0000,0x0a8d001a ! Expected data for %f16 | |
26951 | .word 0xc78091bb,0x02f1ffff ! Expected data for %f26 | |
26952 | .word 0x00007400,0x00000000 ! Expected data for %f28 | |
26953 | p0_check_pt_data_27: | |
26954 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26955 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
26956 | .word 0x00000000,0xed13eb1e ! Expected data for %l1 | |
26957 | .word 0xffffffff,0xffffffd7 ! Expected data for %l2 | |
26958 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
26959 | .word 0xffffffff,0xffffff00 ! Expected data for %l4 | |
26960 | .word 0x00000000,0xc48a98d7 ! Expected data for %l5 | |
26961 | .word 0x00000000,0x0000ffff ! Expected data for %l6 | |
26962 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
26963 | .word 0xffffffb4,0x6d1dd03f ! Expected data for %f0 | |
26964 | .word 0x4d072a78,0x00000000 ! Expected data for %f2 | |
26965 | .word 0xff000000,0xd81a5b92 ! Expected data for %f4 | |
26966 | .word 0xd9876ee7,0xf8d13fed ! Expected data for %f6 | |
26967 | .word 0x000000ff,0xff000000 ! Expected data for %f8 | |
26968 | .word 0x00000000,0xa309ade0 ! Expected data for %f10 | |
26969 | .word 0x0f10ff1a,0xe0ffffff ! Expected data for %f12 | |
26970 | .word 0x00000000,0x00007a9a ! Expected data for %f14 | |
26971 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
26972 | .word 0xd81a5b92,0xd81a5b92 ! Expected data for %f24 | |
26973 | .word 0xffffffff,0x02f1ffff ! Expected data for %f26 | |
26974 | p0_check_pt_data_28: | |
26975 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26976 | .word 0x00000000,0x0000ff00 ! Expected data for %l0 | |
26977 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
26978 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
26979 | .word 0x00000000,0x00009e5e ! Expected data for %l3 | |
26980 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
26981 | .word 0x00000000,0x0000004d ! Expected data for %l5 | |
26982 | .word 0x00000000,0x0000005e ! Expected data for %l6 | |
26983 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
26984 | .word 0xffffffca,0xd9870000 ! Expected data for %f0 | |
26985 | .word 0xffffffff,0x5e000000 ! Expected data for %f2 | |
26986 | .word 0x00000000,0xff27ffff ! Expected data for %f4 | |
26987 | .word 0x02226c6b,0xff119e5e ! Expected data for %f6 | |
26988 | .word 0x925b1ad8,0x00000000 ! Expected data for %f8 | |
26989 | .word 0xe76e87d9,0xbb9180c7 ! Expected data for %f10 | |
26990 | .word 0x8ab60000,0x0000007a ! Expected data for %f12 | |
26991 | .word 0x00000000,0xe0ffffff ! Expected data for %f14 | |
26992 | .word 0x02226c6b,0x57119e5e ! Expected data for %f18 | |
26993 | .word 0x00000000,0x00000000 ! Expected data for %f24 | |
26994 | p0_check_pt_data_29: | |
26995 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
26996 | .word 0x00000000,0x0000005e ! Expected data for %l0 | |
26997 | .word 0x00000000,0xffffffff ! Expected data for %l1 | |
26998 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
26999 | .word 0x00000000,0x1a008dff ! Expected data for %l3 | |
27000 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27001 | .word 0xffffffff,0xffffff00 ! Expected data for %l6 | |
27002 | .word 0x00000000,0x120000ff ! Expected data for %l7 | |
27003 | .word 0x925b1ad8,0xd9870000 ! Expected data for %f0 | |
27004 | .word 0xffffffff,0xb4ffffff ! Expected data for %f2 | |
27005 | .word 0x00000000,0x00ffffff ! Expected data for %f4 | |
27006 | .word 0x925b1ad8,0xd7428e9c ! Expected data for %f8 | |
27007 | .word 0x00000000,0xd9876ee7 ! Expected data for %f12 | |
27008 | .word 0x00000000,0xff27ffff ! Expected data for %f14 | |
27009 | .word 0xffffffff,0xffffffff ! Expected data for %f20 | |
27010 | .word 0x00000000,0xff27ffff ! Expected data for %f22 | |
27011 | .word 0x0000005e,0xffffffff ! Expected data for %f28 | |
27012 | p0_check_pt_data_30: | |
27013 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27014 | .word 0x00000000,0xff27ffff ! Expected data for %l0 | |
27015 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
27016 | .word 0x00000000,0x0000ffb9 ! Expected data for %l2 | |
27017 | .word 0x00000000,0xffffff00 ! Expected data for %l3 | |
27018 | .word 0x00000000,0x00006c6b ! Expected data for %l5 | |
27019 | .word 0x4d072a78,0x00000000 ! Expected data for %l6 | |
27020 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27021 | .word 0x00000000,0xff27ffff ! Expected data for %f0 | |
27022 | .word 0xffffffff,0xb4ffffff ! Expected data for %f2 | |
27023 | .word 0xed3fd1f8,0x007400ff ! Expected data for %f6 | |
27024 | .word 0xb4ffffff,0x00000000 ! Expected data for %f16 | |
27025 | .word 0xffffffff,0xffffff00 ! Expected data for %f18 | |
27026 | p0_check_pt_data_31: | |
27027 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27028 | .word 0x00000000,0x3f787673 ! Expected data for %l0 | |
27029 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
27030 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
27031 | .word 0x00000000,0xff072a78 ! Expected data for %l3 | |
27032 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
27033 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
27034 | .word 0x00000000,0x4593b9ff ! Expected data for %l6 | |
27035 | .word 0x00000000,0xa129439b ! Expected data for %l7 | |
27036 | .word 0x00ffffff,0xcaffffff ! Expected data for %f0 | |
27037 | .word 0xffffffd7,0x00000000 ! Expected data for %f2 | |
27038 | .word 0xffffffff,0xffffff00 ! Expected data for %f4 | |
27039 | .word 0x5e9e11ff,0x6b6c2202 ! Expected data for %f6 | |
27040 | .word 0x00000000,0xd81a5b92 ! Expected data for %f8 | |
27041 | .word 0xc780ffbb,0xd9876ee7 ! Expected data for %f10 | |
27042 | .word 0x7a000000,0x0000b68a ! Expected data for %f12 | |
27043 | .word 0xffffffe0,0x00000000 ! Expected data for %f14 | |
27044 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
27045 | .word 0xffffffff,0xffffffff ! Expected data for %f18 | |
27046 | .word 0xa129439b,0x4593b9ff ! Expected data for %f20 | |
27047 | .word 0x00000000,0xd7ffffff ! Expected data for %f22 | |
27048 | .word 0x925b1ad8,0x39aced3b ! Expected data for %f24 | |
27049 | .word 0xffff0000,0xff072a78 ! Expected data for %f26 | |
27050 | .word 0x00000000,0x00740000 ! Expected data for %f28 | |
27051 | .word 0x27ffffff,0xffffffff ! Expected data for %f30 | |
27052 | p0_check_pt_data_32: | |
27053 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27054 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27055 | .word 0x00000000,0xffffffff ! Expected data for %l1 | |
27056 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27057 | .word 0x00000000,0x4593b9ff ! Expected data for %l4 | |
27058 | .word 0x00000000,0xa129439b ! Expected data for %l5 | |
27059 | .word 0x00000000,0x00000042 ! Expected data for %l6 | |
27060 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27061 | .word 0xff00b6f1,0xffff27ff ! Expected data for %f0 | |
27062 | .word 0x00000000,0x0000004d ! Expected data for %f2 | |
27063 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
27064 | .word 0x5e9e1157,0x91000000 ! Expected data for %f6 | |
27065 | .word 0x5e000000,0xb4ffffff ! Expected data for %f8 | |
27066 | .word 0xc78091bb,0x3bedac39 ! Expected data for %f10 | |
27067 | .word 0xfac65f36,0x9ce0b68a ! Expected data for %f12 | |
27068 | .word 0x46ee6de4,0xc49410cd ! Expected data for %f14 | |
27069 | .word 0x925b1ad8,0xd7428e9c ! Expected data for %f16 | |
27070 | .word 0x00000030,0x00000000 ! Expected data for %f18 | |
27071 | .word 0xff000000,0xd7ffffff ! Expected data for %f20 | |
27072 | .word 0xd9876ee7,0xf8d13fed ! Expected data for %f22 | |
27073 | .word 0x000000ff,0xff000000 ! Expected data for %f24 | |
27074 | .word 0x00000000,0xa309ade0 ! Expected data for %f26 | |
27075 | .word 0x0f10ff1a,0xe0ffffff ! Expected data for %f28 | |
27076 | .word 0x00000000,0x00007a9a ! Expected data for %f30 | |
27077 | p0_check_pt_data_33: | |
27078 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27079 | .word 0xa129439b,0x4593b9ff ! Expected data for %l0 | |
27080 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
27081 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
27082 | .word 0x00000000,0xc49410cd ! Expected data for %l3 | |
27083 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
27084 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
27085 | .word 0x00000000,0xff94ffff ! Expected data for %l6 | |
27086 | .word 0x00000000,0x00005e9e ! Expected data for %l7 | |
27087 | .word 0x00000000,0x0000004d ! Expected data for %f2 | |
27088 | .word 0x000074ff,0xc48a98d7 ! Expected data for %f4 | |
27089 | .word 0x9ce0b68a,0x3bedac39 ! Expected data for %f10 | |
27090 | .word 0x0f10ff1a,0x9ce0b68a ! Expected data for %f12 | |
27091 | .word 0x00000000,0xd7ffffff ! Expected data for %f16 | |
27092 | .word 0xd9876ee7,0xff27ffff ! Expected data for %f22 | |
27093 | .word 0xff94ffff,0x00007a9a ! Expected data for %f30 | |
27094 | p0_check_pt_data_34: | |
27095 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27096 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27097 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27098 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27099 | .word 0x00000000,0xd81a5b92 ! Expected data for %l3 | |
27100 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
27101 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27102 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27103 | .word 0x00000000,0xc48a98ff ! Expected data for %l7 | |
27104 | .word 0x000000ff,0xcaffffff ! Expected data for %f0 | |
27105 | .word 0x00000000,0xe0ffffff ! Expected data for %f2 | |
27106 | .word 0xffffffff,0xffffff00 ! Expected data for %f4 | |
27107 | .word 0x5e9e11ff,0x6b6c2202 ! Expected data for %f6 | |
27108 | .word 0x00000000,0xd81a5b92 ! Expected data for %f8 | |
27109 | .word 0xc780ffbb,0xd9876ee7 ! Expected data for %f10 | |
27110 | .word 0x7a000000,0x0000b68a ! Expected data for %f12 | |
27111 | .word 0xffffffe0,0x00000000 ! Expected data for %f14 | |
27112 | .word 0xd9876ee7,0xff27ffff ! Expected data for %f22 | |
27113 | .word 0x5e9e1157,0x6b6c2202 ! Expected data for %f30 | |
27114 | p0_check_pt_data_35: | |
27115 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27116 | .word 0x00000000,0xffb600ff ! Expected data for %l0 | |
27117 | .word 0x00000000,0x0000ffff ! Expected data for %l1 | |
27118 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
27119 | .word 0xffffffff,0xffffffff ! Expected data for %l4 | |
27120 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27121 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
27122 | .word 0xff94ffff,0x00007a9a ! Expected data for %f0 | |
27123 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
27124 | .word 0xff988ac4,0xffffffff ! Expected data for %f4 | |
27125 | .word 0xed3fd1f8,0xe76e87d9 ! Expected data for %f6 | |
27126 | .word 0x1eeb13ed,0xff000000 ! Expected data for %f8 | |
27127 | .word 0x8b00ffe0,0x0dd58b3d ! Expected data for %f10 | |
27128 | .word 0x9ee0e237,0x032cd68e ! Expected data for %f12 | |
27129 | .word 0xe5dee320,0x93b30552 ! Expected data for %f14 | |
27130 | .word 0x9a7a0000,0x000000ff ! Expected data for %f16 | |
27131 | .word 0xffff94ff,0x00000000 ! Expected data for %f18 | |
27132 | .word 0x5e9e1157,0x6b6c2202 ! Expected data for %f20 | |
27133 | .word 0xed3fd1f8,0xe76e87d9 ! Expected data for %f22 | |
27134 | .word 0x000000ff,0xff000000 ! Expected data for %f24 | |
27135 | .word 0xe0ad09a3,0x00000000 ! Expected data for %f26 | |
27136 | .word 0xffffffe0,0x1aff100f ! Expected data for %f28 | |
27137 | .word 0x9a7a0000,0x00000000 ! Expected data for %f30 | |
27138 | p0_check_pt_data_36: | |
27139 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27140 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27141 | .word 0x00000000,0xffffffd7 ! Expected data for %l1 | |
27142 | .word 0x00000000,0x02226c6b ! Expected data for %l3 | |
27143 | .word 0x00000000,0x5f360000 ! Expected data for %l4 | |
27144 | .word 0x00000000,0xffffff00 ! Expected data for %l5 | |
27145 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
27146 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27147 | .word 0xbb9180c7,0x00007a9a ! Expected data for %f0 | |
27148 | .word 0xff988ac4,0xffffffff ! Expected data for %f4 | |
27149 | .word 0xed3fd1f8,0xe76e87d9 ! Expected data for %f6 | |
27150 | .word 0x1eeb13ed,0x0000365f ! Expected data for %f8 | |
27151 | .word 0x00000000,0x93b30552 ! Expected data for %f14 | |
27152 | .word 0xffffffff,0x00740000 ! Expected data for %f16 | |
27153 | .word 0x000000ff,0x000000ff ! Expected data for %f18 | |
27154 | .word 0xd7ffffff,0xcd1094c4 ! Expected data for %f20 | |
27155 | .word 0x1d825880,0x5e067d5a ! Expected data for %f22 | |
27156 | .word 0x06d37253,0x8e2d6ade ! Expected data for %f24 | |
27157 | .word 0x578bd2d3,0xc3fce2e3 ! Expected data for %f26 | |
27158 | .word 0xcd1094c4,0xe46dee46 ! Expected data for %f28 | |
27159 | .word 0x4b20c2b8,0x480207d9 ! Expected data for %f30 | |
27160 | p0_check_pt_data_37: | |
27161 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27162 | .word 0xffffffb4,0x0000005e ! Expected data for %l0 | |
27163 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27164 | .word 0x00000000,0x0000cd10 ! Expected data for %l2 | |
27165 | .word 0x00000000,0x5f360000 ! Expected data for %l3 | |
27166 | .word 0xffffffff,0xffffffff ! Expected data for %l4 | |
27167 | .word 0x00000000,0x000000d7 ! Expected data for %l5 | |
27168 | .word 0x00000000,0x0000007a ! Expected data for %l6 | |
27169 | .word 0xffffffff,0xffb600ff ! Expected data for %l7 | |
27170 | .word 0x000000ff,0xcaffffff ! Expected data for %f0 | |
27171 | .word 0xb8c2204b,0x0a8d001a ! Expected data for %f2 | |
27172 | .word 0x578bd2d3,0xc3fce2e3 ! Expected data for %f4 | |
27173 | .word 0x5e9e11ff,0x6b6c2202 ! Expected data for %f6 | |
27174 | .word 0x00000000,0xd81a5b92 ! Expected data for %f8 | |
27175 | .word 0xc780ffbb,0xd9876ee7 ! Expected data for %f10 | |
27176 | .word 0x7a000000,0x0000b68a ! Expected data for %f12 | |
27177 | .word 0xffffffe0,0x00000000 ! Expected data for %f14 | |
27178 | p0_check_pt_data_38: | |
27179 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27180 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
27181 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
27182 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27183 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
27184 | .word 0x00000000,0x00000091 ! Expected data for %l4 | |
27185 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27186 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27187 | .word 0x00000000,0x000000c3 ! Expected data for %l7 | |
27188 | .word 0x000000ff,0xcaffffff ! Expected data for %f0 | |
27189 | .word 0x578bd2d3,0xc3fce2e3 ! Expected data for %f4 | |
27190 | .word 0x00000000,0x000000a3 ! Expected data for %f20 | |
27191 | .word 0x4b20c2b8,0xffffffff ! Expected data for %f30 | |
27192 | p0_check_pt_data_39: | |
27193 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27194 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27195 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27196 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
27197 | .word 0x00000000,0x0000000a ! Expected data for %l3 | |
27198 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27199 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
27200 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27201 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
27202 | .word 0xffffffff,0xff00b6ff ! Expected data for %f0 | |
27203 | .word 0xffff00ff,0xffffffff ! Expected data for %f2 | |
27204 | .word 0x0000365f,0x00ffffff ! Expected data for %f4 | |
27205 | .word 0xff00b6f1,0xffff275e ! Expected data for %f6 | |
27206 | .word 0x925b1ad8,0x00000000 ! Expected data for %f8 | |
27207 | .word 0x7a000000,0x000000ff ! Expected data for %f10 | |
27208 | .word 0xffffffff,0x9b4387d9 ! Expected data for %f12 | |
27209 | .word 0x00e2ffc3,0xd3d28bff ! Expected data for %f14 | |
27210 | .word 0xffffffff,0x000000ff ! Expected data for %f26 | |
27211 | p0_check_pt_data_40: | |
27212 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27213 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
27214 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
27215 | .word 0x00000000,0x57119e5e ! Expected data for %l3 | |
27216 | .word 0x00000000,0xe0000000 ! Expected data for %l4 | |
27217 | .word 0xffffffff,0xffffe46d ! Expected data for %l5 | |
27218 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
27219 | .word 0x00000000,0xffff94ff ! Expected data for %l7 | |
27220 | .word 0xe3e2fcc3,0xd3d28b57 ! Expected data for %f0 | |
27221 | .word 0x5e9effff,0x00000000 ! Expected data for %f4 | |
27222 | .word 0xff00b6f1,0xffff275e ! Expected data for %f6 | |
27223 | .word 0x0000007a,0xd3d28bff ! Expected data for %f14 | |
27224 | .word 0x00000000,0xffffffff ! Expected data for %f20 | |
27225 | .word 0x06d37253,0x000000ff ! Expected data for %f24 | |
27226 | .word 0x00000000,0x00000000 ! Expected data for %f26 | |
27227 | p0_check_pt_data_41: | |
27228 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27229 | .word 0x00000000,0xffffffff ! Expected data for %l0 | |
27230 | .word 0x00000000,0xffffe46d ! Expected data for %l1 | |
27231 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
27232 | .word 0xffffffff,0xff000000 ! Expected data for %l3 | |
27233 | .word 0xffffffff,0xffff275e ! Expected data for %l4 | |
27234 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27235 | .word 0x00000000,0xffffffff ! Expected data for %l6 | |
27236 | .word 0x00000000,0x0000e09c ! Expected data for %l7 | |
27237 | .word 0xff8bd2d3,0xc3fce2e3 ! Expected data for %f0 | |
27238 | .word 0xffff00ff,0xffffffff ! Expected data for %f2 | |
27239 | .word 0x00000000,0xffff9e5e ! Expected data for %f4 | |
27240 | .word 0xffffffff,0xd7ffffff ! Expected data for %f6 | |
27241 | .word 0x00000000,0xd81a5b92 ! Expected data for %f14 | |
27242 | .word 0xffff1ad8,0xd7428e9c ! Expected data for %f16 | |
27243 | .word 0xffff0000,0xffffffff ! Expected data for %f18 | |
27244 | .word 0xff00b6f1,0xffff275e ! Expected data for %f20 | |
27245 | .word 0xd9876ee7,0xf8d13fed ! Expected data for %f22 | |
27246 | .word 0x000000ff,0xff000000 ! Expected data for %f24 | |
27247 | .word 0x00000000,0xa309ade0 ! Expected data for %f26 | |
27248 | .word 0x0f10ff1a,0xe0ffffff ! Expected data for %f28 | |
27249 | .word 0x8ab6e09c,0x00007a9a ! Expected data for %f30 | |
27250 | p0_check_pt_data_42: | |
27251 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27252 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
27253 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27254 | .word 0x00000000,0x0000005e ! Expected data for %l3 | |
27255 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27256 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27257 | .word 0x00000000,0xe46dee46 ! Expected data for %l7 | |
27258 | .word 0xffffffff,0x00000000 ! Expected data for %f0 | |
27259 | .word 0x00000000,0xffff275e ! Expected data for %f2 | |
27260 | .word 0x6e000000,0xffffffff ! Expected data for %f4 | |
27261 | .word 0x5a7d065e,0x8058821d ! Expected data for %f6 | |
27262 | .word 0xde6a2d8e,0x5372d306 ! Expected data for %f8 | |
27263 | .word 0xe3e2fcc3,0xd3d28b57 ! Expected data for %f10 | |
27264 | .word 0xbe16dcc0,0xb1c0060a ! Expected data for %f12 | |
27265 | .word 0xd9070248,0xb8c2204b ! Expected data for %f14 | |
27266 | .word 0xe46dee46,0xffffffff ! Expected data for %f16 | |
27267 | .word 0xffffffff,0xffffffff ! Expected data for %f18 | |
27268 | .word 0xcd1094c4,0xe46dee46 ! Expected data for %f20 | |
27269 | .word 0xff00b6f1,0xffff275e ! Expected data for %f22 | |
27270 | .word 0x925b1ad8,0x00000000 ! Expected data for %f24 | |
27271 | .word 0x7a000000,0x00007400 ! Expected data for %f26 | |
27272 | .word 0xffffffff,0x9b4387d9 ! Expected data for %f28 | |
27273 | .word 0x00e2ffc3,0xd3d28bff ! Expected data for %f30 | |
27274 | p0_check_pt_data_43: | |
27275 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27276 | .word 0xffffffff,0xffffff00 ! Expected data for %l0 | |
27277 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
27278 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27279 | .word 0x00000000,0x00007400 ! Expected data for %l4 | |
27280 | .word 0x00000000,0x0000ff00 ! Expected data for %l5 | |
27281 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27282 | .word 0x5372d306,0x00740000 ! Expected data for %l7 | |
27283 | .word 0x000000ff,0xffffffff ! Expected data for %f4 | |
27284 | .word 0x5a7d065e,0x8058821d ! Expected data for %f6 | |
27285 | .word 0x00000000,0xb1c0060a ! Expected data for %f12 | |
27286 | .word 0x00000000,0x000000ff ! Expected data for %f16 | |
27287 | .word 0x6de4ffff,0xffffff00 ! Expected data for %f18 | |
27288 | .word 0xe3e2fcc3,0xd3d28bff ! Expected data for %f20 | |
27289 | .word 0x02226c6b,0xff119e5e ! Expected data for %f22 | |
27290 | .word 0x925b1ad8,0x00000000 ! Expected data for %f24 | |
27291 | .word 0xe76e87d9,0xbbff80c7 ! Expected data for %f26 | |
27292 | .word 0x8ab60000,0x0000007a ! Expected data for %f28 | |
27293 | .word 0x00000000,0xe0ffffff ! Expected data for %f30 | |
27294 | p0_check_pt_data_44: | |
27295 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27296 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
27297 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27298 | .word 0x00000000,0x0000001a ! Expected data for %l2 | |
27299 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
27300 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27301 | .word 0x00000000,0xd7ffffff ! Expected data for %l5 | |
27302 | .word 0x00000000,0xffffffff ! Expected data for %l7 | |
27303 | .word 0xff27ffff,0x00000000 ! Expected data for %f0 | |
27304 | .word 0xc49410cd,0xff000000 ! Expected data for %f2 | |
27305 | .word 0x57000000,0x00000000 ! Expected data for %f4 | |
27306 | .word 0xed3fd1f8,0xe76e87d9 ! Expected data for %f6 | |
27307 | .word 0x000000ff,0xff000000 ! Expected data for %f8 | |
27308 | .word 0xe0ad09a3,0x00000000 ! Expected data for %f10 | |
27309 | .word 0xffffffe0,0x1aff100f ! Expected data for %f12 | |
27310 | .word 0x9a7a0000,0x00000000 ! Expected data for %f14 | |
27311 | p0_check_pt_data_45: | |
27312 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27313 | .word 0xffffffff,0xd7ffffff ! Expected data for %l0 | |
27314 | .word 0x00000000,0x5372d306 ! Expected data for %l1 | |
27315 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27316 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
27317 | .word 0x00000000,0xffffffff ! Expected data for %l4 | |
27318 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
27319 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
27320 | .word 0xffffffff,0x000000ff ! Expected data for %l7 | |
27321 | .word 0x000000ff,0x000000ff ! Expected data for %f0 | |
27322 | .word 0x00000000,0x5e9e11ff ! Expected data for %f2 | |
27323 | .word 0xffffffff,0x000000ff ! Expected data for %f4 | |
27324 | .word 0x5e9e1157,0xffffffff ! Expected data for %f6 | |
27325 | .word 0x5e000000,0xb4ffffff ! Expected data for %f8 | |
27326 | .word 0x9ce0b68a,0x3bedac39 ! Expected data for %f10 | |
27327 | .word 0x0f10ff1a,0x9ce0b68a ! Expected data for %f12 | |
27328 | .word 0x46ee6de4,0xc49410cd ! Expected data for %f14 | |
27329 | .word 0x0a8d001a,0x1a008d0a ! Expected data for %f16 | |
27330 | .word 0x0000365f,0x0a8d001a ! Expected data for %f18 | |
27331 | .word 0x0000ffff,0xfffce2e3 ! Expected data for %f20 | |
27332 | .word 0x5e9e11ff,0xff06c0b1 ! Expected data for %f22 | |
27333 | .word 0x00000000,0xd81a5b92 ! Expected data for %f24 | |
27334 | .word 0xc780ffbb,0xd9876ee7 ! Expected data for %f26 | |
27335 | .word 0x7a000000,0xe46db68a ! Expected data for %f28 | |
27336 | .word 0xffffffe0,0x00000000 ! Expected data for %f30 | |
27337 | p0_check_pt_data_46: | |
27338 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27339 | .word 0x00000000,0x46ee6dff ! Expected data for %l0 | |
27340 | .word 0x00000000,0x000000b6 ! Expected data for %l1 | |
27341 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27342 | .word 0xff0000ff,0xcaffffff ! Expected data for %l3 | |
27343 | .word 0x00000000,0xff000000 ! Expected data for %l4 | |
27344 | .word 0x00000000,0x0000005f ! Expected data for %l5 | |
27345 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27346 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27347 | .word 0x000000ff,0x000000ff ! Expected data for %f0 | |
27348 | .word 0x8ab6e09c,0xff000000 ! Expected data for %f20 | |
27349 | .word 0x00000000,0xd9876ee7 ! Expected data for %f26 | |
27350 | .word 0x7a000000,0xffffff00 ! Expected data for %f28 | |
27351 | .word 0x00000000,0x00000000 ! Expected data for %f30 | |
27352 | p0_check_pt_data_47: | |
27353 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27354 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
27355 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27356 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
27357 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27358 | .word 0x00000000,0x000000e2 ! Expected data for %l4 | |
27359 | .word 0x00000000,0x000006ff ! Expected data for %l5 | |
27360 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27361 | .word 0x00000000,0xffff275e ! Expected data for %l7 | |
27362 | .word 0x00e200ff,0x9ce0b68a ! Expected data for %f0 | |
27363 | .word 0xffffffd7,0x0a8d001a ! Expected data for %f2 | |
27364 | .word 0x925b1ad8,0x00000000 ! Expected data for %f4 | |
27365 | .word 0x5e9e11ff,0x6b6c2202 ! Expected data for %f6 | |
27366 | .word 0x00000000,0xd81a5b92 ! Expected data for %f8 | |
27367 | .word 0xc780ffbb,0xd9876ee7 ! Expected data for %f10 | |
27368 | .word 0xff00ffff,0xe400008a ! Expected data for %f12 | |
27369 | .word 0xffffffe0,0xffffffff ! Expected data for %f14 | |
27370 | .word 0xff000000,0x00000000 ! Expected data for %f30 | |
27371 | p0_check_pt_data_48: | |
27372 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27373 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
27374 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27375 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27376 | .word 0x00000000,0xff000000 ! Expected data for %l3 | |
27377 | .word 0x00000000,0xf1b600ff ! Expected data for %l4 | |
27378 | .word 0x00000000,0xd9876ee7 ! Expected data for %l5 | |
27379 | .word 0x00000000,0x000000ca ! Expected data for %l6 | |
27380 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
27381 | .word 0x925b1ad8,0x000000ff ! Expected data for %f4 | |
27382 | .word 0x00000000,0x5f3600ff ! Expected data for %f6 | |
27383 | .word 0xffffffff,0x0a8d001a ! Expected data for %f18 | |
27384 | .word 0x00000000,0x3bedac39 ! Expected data for %f26 | |
27385 | p0_check_pt_data_49: | |
27386 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27387 | .word 0xffffffff,0xff000000 ! Expected data for %l0 | |
27388 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27389 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
27390 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27391 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27392 | .word 0x00000000,0x0000e2ff ! Expected data for %l5 | |
27393 | .word 0x00000000,0x000000d9 ! Expected data for %l6 | |
27394 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27395 | .word 0x00000000,0xe0ade0ad ! Expected data for %f0 | |
27396 | .word 0xff000000,0xffffffff ! Expected data for %f2 | |
27397 | .word 0x9ce0b68a,0x032cff8e ! Expected data for %f4 | |
27398 | .word 0x02226c6b,0x57119e5e ! Expected data for %f6 | |
27399 | .word 0x925b1ad8,0x39aced3b ! Expected data for %f8 | |
27400 | .word 0x64479a75,0xbb9180c7 ! Expected data for %f10 | |
27401 | .word 0xffffffff,0x365fc6fa ! Expected data for %f12 | |
27402 | .word 0xffffffff,0x000000ff ! Expected data for %f14 | |
27403 | .word 0x8ab6e09c,0xff000000 ! Expected data for %f16 | |
27404 | .word 0x00000000,0x00000000 ! Expected data for %f18 | |
27405 | .word 0xffffffff,0x0000007a ! Expected data for %f20 | |
27406 | .word 0xd9ffffff,0x91000000 ! Expected data for %f22 | |
27407 | .word 0x5e000000,0xb4ffffff ! Expected data for %f24 | |
27408 | .word 0xc78091bb,0x759a4764 ! Expected data for %f26 | |
27409 | .word 0xffff5f36,0x9ce0b6ff ! Expected data for %f28 | |
27410 | .word 0xffffffff,0x007400ff ! Expected data for %f30 | |
27411 | p0_check_pt_data_50: | |
27412 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27413 | .word 0xe2ffffff,0xffffffff ! Expected data for %l0 | |
27414 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
27415 | .word 0x00000000,0xd3d28b8e ! Expected data for %l2 | |
27416 | .word 0x00000000,0x0000ffff ! Expected data for %l3 | |
27417 | .word 0x00000000,0xe76e87ff ! Expected data for %l4 | |
27418 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27419 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27420 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
27421 | .word 0x9ce0b68a,0x032cff8e ! Expected data for %f4 | |
27422 | .word 0x02226c6b,0x57119e5e ! Expected data for %f6 | |
27423 | .word 0x8ab6e09c,0xd81a5b92 ! Expected data for %f16 | |
27424 | .word 0xff000000,0xd9876ee7 ! Expected data for %f26 | |
27425 | p0_check_pt_data_51: | |
27426 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27427 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27428 | .word 0x652d2210,0x7b7b8500 ! Expected data for %l1 | |
27429 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
27430 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27431 | .word 0x00000000,0x000000e2 ! Expected data for %l4 | |
27432 | .word 0xffffffff,0xffffffad ! Expected data for %l5 | |
27433 | .word 0x00000000,0x0000ffff ! Expected data for %l6 | |
27434 | .word 0x00000000,0x1a008d0a ! Expected data for %l7 | |
27435 | .word 0x00000000,0x57119e5e ! Expected data for %f0 | |
27436 | .word 0x9ce0b68a,0x000000ff ! Expected data for %f4 | |
27437 | .word 0x02226c6b,0x57119e5e ! Expected data for %f6 | |
27438 | .word 0x1a008d0a,0xffffffff ! Expected data for %f16 | |
27439 | .word 0x000000ff,0x9ce0b68a ! Expected data for %f18 | |
27440 | .word 0x57000000,0x00000000 ! Expected data for %f20 | |
27441 | .word 0xed3fd1f8,0xe76e87d9 ! Expected data for %f22 | |
27442 | .word 0x000000ff,0xff000000 ! Expected data for %f24 | |
27443 | .word 0xe0ad09a3,0x00000000 ! Expected data for %f26 | |
27444 | .word 0xffffffe0,0x1aff100f ! Expected data for %f28 | |
27445 | .word 0x9a7a0000,0x00000000 ! Expected data for %f30 | |
27446 | p0_check_pt_data_52: | |
27447 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27448 | .word 0x00000000,0x000000ad ! Expected data for %l0 | |
27449 | .word 0x00000000,0x0000ffff ! Expected data for %l1 | |
27450 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27451 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
27452 | .word 0x00000000,0x000000e7 ! Expected data for %l4 | |
27453 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
27454 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
27455 | .word 0xffffffff,0xffffffd8 ! Expected data for %l7 | |
27456 | .word 0x00000000,0x57119e5e ! Expected data for %f0 | |
27457 | .word 0xff000000,0xffffffff ! Expected data for %f2 | |
27458 | .word 0x9ce0b68a,0x000000ff ! Expected data for %f4 | |
27459 | .word 0x00000000,0x57119e5e ! Expected data for %f6 | |
27460 | .word 0xff000000,0x000000ff ! Expected data for %f14 | |
27461 | .word 0x00000000,0xffe20000 ! Expected data for %f16 | |
27462 | .word 0xff000000,0x1a008d0a ! Expected data for %f18 | |
27463 | .word 0xffffffff,0xffffffff ! Expected data for %f20 | |
27464 | .word 0x5a7d065e,0x8058821d ! Expected data for %f22 | |
27465 | .word 0xde6a2d8e,0x5372d306 ! Expected data for %f24 | |
27466 | .word 0xe3e2fcc3,0xd3d28b57 ! Expected data for %f26 | |
27467 | .word 0x00000000,0xb1c0060a ! Expected data for %f28 | |
27468 | .word 0xd9070248,0xb8c2204b ! Expected data for %f30 | |
27469 | p0_check_pt_data_53: | |
27470 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27471 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
27472 | .word 0x00000000,0xffb6e09c ! Expected data for %l1 | |
27473 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
27474 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27475 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
27476 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27477 | .word 0x000000ff,0x000000e7 ! Expected data for %l6 | |
27478 | .word 0x00000000,0x0000003b ! Expected data for %l7 | |
27479 | .word 0xff000000,0xff000000 ! Expected data for %f0 | |
27480 | .word 0xffff0000,0x000000ff ! Expected data for %f2 | |
27481 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
27482 | .word 0xffffffff,0x57119e5e ! Expected data for %f6 | |
27483 | .word 0xffffffb4,0x0000005e ! Expected data for %f8 | |
27484 | .word 0x39aced3b,0x8ab6e09c ! Expected data for %f10 | |
27485 | .word 0x8ab6e09c,0x1aff100f ! Expected data for %f12 | |
27486 | .word 0xcd10ffc4,0xe46dee46 ! Expected data for %f14 | |
27487 | .word 0x9ce0b68a,0x00000000 ! Expected data for %f16 | |
27488 | .word 0x00000000,0x000000ff ! Expected data for %f18 | |
27489 | .word 0x000000e7,0xffffffff ! Expected data for %f20 | |
27490 | .word 0xe76e87d9,0x8b570000 ! Expected data for %f22 | |
27491 | .word 0xff000000,0x8ab6e09c ! Expected data for %f24 | |
27492 | .word 0xe0ade200,0x00000000 ! Expected data for %f26 | |
27493 | .word 0xffffffe0,0x1aff100f ! Expected data for %f28 | |
27494 | .word 0x1a7a0000,0x0000ff00 ! Expected data for %f30 | |
27495 | p0_check_pt_data_54: | |
27496 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27497 | .word 0x00000000,0x00000039 ! Expected data for %l0 | |
27498 | .word 0x00000000,0x0000e2ff ! Expected data for %l1 | |
27499 | .word 0x000000ff,0x0000ffff ! Expected data for %l3 | |
27500 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27501 | .word 0x00000000,0x000000d7 ! Expected data for %l5 | |
27502 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
27503 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27504 | .word 0xff000000,0xff000000 ! Expected data for %f0 | |
27505 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
27506 | .word 0xffffffff,0xffffffff ! Expected data for %f12 | |
27507 | .word 0x5e9e1157,0x00000000 ! Expected data for %f22 | |
27508 | .word 0x00ff0000,0x00000000 ! Expected data for %f26 | |
27509 | .word 0x00000057,0x0000ff00 ! Expected data for %f30 | |
27510 | p0_check_pt_data_55: | |
27511 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27512 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
27513 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
27514 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27515 | .word 0x00000000,0xffffffff ! Expected data for %l3 | |
27516 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
27517 | .word 0x00000000,0x0000d81a ! Expected data for %l5 | |
27518 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27519 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27520 | .word 0x00000000,0xff000000 ! Expected data for %f0 | |
27521 | .word 0xffffb6ff,0xffe20000 ! Expected data for %f2 | |
27522 | .word 0xff000000,0x00000000 ! Expected data for %f10 | |
27523 | .word 0x000000ff,0x00000057 ! Expected data for %f18 | |
27524 | .word 0xbb9180c7,0xff000000 ! Expected data for %f24 | |
27525 | p0_check_pt_data_56: | |
27526 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27527 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27528 | .word 0x00000000,0xffffffff ! Expected data for %l1 | |
27529 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27530 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27531 | .word 0x00000000,0x0000005e ! Expected data for %l4 | |
27532 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27533 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
27534 | .word 0x00000000,0x57115e00 ! Expected data for %l7 | |
27535 | .word 0xffffb6ff,0x0000003b ! Expected data for %f2 | |
27536 | .word 0xcd10ffc4,0x000000ff ! Expected data for %f14 | |
27537 | .word 0x7a000000,0x00000000 ! Expected data for %f16 | |
27538 | .word 0x00000000,0x00000000 ! Expected data for %f22 | |
27539 | .word 0x00000000,0x1aff100f ! Expected data for %f28 | |
27540 | p0_check_pt_data_57: | |
27541 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27542 | .word 0x00000000,0x0000ffff ! Expected data for %l0 | |
27543 | .word 0x00000000,0x0000005e ! Expected data for %l1 | |
27544 | .word 0x00000000,0xffb6ffff ! Expected data for %l2 | |
27545 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27546 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
27547 | .word 0x00000000,0x000000d7 ! Expected data for %l5 | |
27548 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
27549 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
27550 | .word 0x00000000,0xff000000 ! Expected data for %f0 | |
27551 | .word 0xd7ff0000,0x000000ff ! Expected data for %f2 | |
27552 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
27553 | .word 0xffffffff,0x57119e5e ! Expected data for %f6 | |
27554 | .word 0xffb6e09c,0xff000000 ! Expected data for %f16 | |
27555 | .word 0x1a008d0a,0xff000000 ! Expected data for %f18 | |
27556 | .word 0x0000003b,0xffd700ff ! Expected data for %f20 | |
27557 | .word 0x02226c6b,0xff119e5e ! Expected data for %f22 | |
27558 | .word 0x925b1ad8,0x00000000 ! Expected data for %f24 | |
27559 | .word 0x00000000,0xbbff80c7 ! Expected data for %f26 | |
27560 | .word 0x8a0000e4,0xffff00ff ! Expected data for %f28 | |
27561 | .word 0xffffffff,0xe0ffffff ! Expected data for %f30 | |
27562 | p0_check_pt_data_58: | |
27563 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27564 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27565 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
27566 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
27567 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
27568 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27569 | .word 0x00000057,0xa309ade0 ! Expected data for %l5 | |
27570 | .word 0x00000000,0xd81a5b92 ! Expected data for %l6 | |
27571 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27572 | .word 0xd7ff0000,0x000000ff ! Expected data for %f2 | |
27573 | .word 0x000000ff,0x00000000 ! Expected data for %f4 | |
27574 | .word 0xffffffff,0xffffffff ! Expected data for %f12 | |
27575 | .word 0x00000000,0x0000005e ! Expected data for %f18 | |
27576 | .word 0xff000000,0xffd700ff ! Expected data for %f20 | |
27577 | .word 0xffd7ffff,0xd7ffffff ! Expected data for %f26 | |
27578 | .word 0x00000000,0x000000ff ! Expected data for %f30 | |
27579 | p0_check_pt_data_59: | |
27580 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27581 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
27582 | .word 0x00000000,0xff000000 ! Expected data for %l1 | |
27583 | .word 0xff000000,0xff0000ff ! Expected data for %l2 | |
27584 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27585 | .word 0xffffffff,0xffffffff ! Expected data for %l4 | |
27586 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27587 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27588 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
27589 | .word 0x00000000,0x0000001a ! Expected data for %f0 | |
27590 | .word 0xbb9180c7,0xff000000 ! Expected data for %f2 | |
27591 | .word 0x9ce0b68a,0x032cff8e ! Expected data for %f4 | |
27592 | .word 0x02226c6b,0x57119e5e ! Expected data for %f6 | |
27593 | .word 0x925b1ad8,0x39aced3b ! Expected data for %f8 | |
27594 | .word 0x64479a75,0xbb9180c7 ! Expected data for %f10 | |
27595 | .word 0xffffffff,0x365fc6fa ! Expected data for %f12 | |
27596 | .word 0xffffffff,0x000000ff ! Expected data for %f14 | |
27597 | .word 0xffb6e09c,0x0000ffd7 ! Expected data for %f16 | |
27598 | .word 0x00000000,0x57110000 ! Expected data for %f20 | |
27599 | .word 0x00000000,0x57110000 ! Expected data for %f26 | |
27600 | .word 0xff000000,0x000000ff ! Expected data for %f30 | |
27601 | p0_check_pt_data_60: | |
27602 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27603 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27604 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27605 | .word 0x00000000,0xffffffff ! Expected data for %l3 | |
27606 | .word 0x00000000,0xffff275e ! Expected data for %l5 | |
27607 | .word 0x00000000,0xcd10ffc4 ! Expected data for %l6 | |
27608 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27609 | .word 0xbb9180c7,0xff000000 ! Expected data for %f2 | |
27610 | .word 0x9ce0b68a,0x032cff8e ! Expected data for %f4 | |
27611 | .word 0x02226c6b,0x0000ffff ! Expected data for %f6 | |
27612 | .word 0x9ce0b68a,0x032cff8e ! Expected data for %f8 | |
27613 | .word 0x1a000000,0x00000000 ! Expected data for %f16 | |
27614 | .word 0x000000ff,0x00000000 ! Expected data for %f18 | |
27615 | .word 0x8eff2c03,0x5e000000 ! Expected data for %f20 | |
27616 | .word 0x5e9e1157,0x6b6c2202 ! Expected data for %f22 | |
27617 | .word 0x3bedac39,0xd81a5b92 ! Expected data for %f24 | |
27618 | .word 0xc78091bb,0x759a4764 ! Expected data for %f26 | |
27619 | .word 0xfac65f36,0xffffffff ! Expected data for %f28 | |
27620 | .word 0xff000000,0xffffffff ! Expected data for %f30 | |
27621 | p0_check_pt_data_61: | |
27622 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27623 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
27624 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
27625 | .word 0x00000000,0x0000005e ! Expected data for %l2 | |
27626 | .word 0x00000000,0x0000005e ! Expected data for %l3 | |
27627 | .word 0x00000000,0xff000000 ! Expected data for %l4 | |
27628 | .word 0xffffffff,0xffffff00 ! Expected data for %l5 | |
27629 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27630 | .word 0x00000000,0x5e000000 ! Expected data for %l7 | |
27631 | .word 0xbb9180c7,0xff000000 ! Expected data for %f2 | |
27632 | .word 0x5e27ffff,0x0000005e ! Expected data for %f8 | |
27633 | .word 0x1a000000,0x00000000 ! Expected data for %f10 | |
27634 | .word 0xffff0000,0x000000ff ! Expected data for %f18 | |
27635 | p0_check_pt_data_62: | |
27636 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27637 | .word 0x00000000,0x3bedacff ! Expected data for %l0 | |
27638 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27639 | .word 0x00000000,0x0000275e ! Expected data for %l2 | |
27640 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27641 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27642 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27643 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27644 | .word 0x5e000000,0x000000ff ! Expected data for %f0 | |
27645 | .word 0x000000e2,0x000000ff ! Expected data for %f4 | |
27646 | .word 0x02226c6b,0x0000ffff ! Expected data for %f6 | |
27647 | .word 0xff000000,0x00000000 ! Expected data for %f16 | |
27648 | .word 0x00000000,0xff000000 ! Expected data for %f18 | |
27649 | .word 0x0000005e,0x032cff8e ! Expected data for %f20 | |
27650 | .word 0x02226c6b,0x57119e5e ! Expected data for %f22 | |
27651 | .word 0x925b1ad8,0x39aced3b ! Expected data for %f24 | |
27652 | .word 0x64479a75,0xbb9180c7 ! Expected data for %f26 | |
27653 | .word 0xffffffff,0xff000000 ! Expected data for %f28 | |
27654 | .word 0xffffffff,0x000000ff ! Expected data for %f30 | |
27655 | p0_check_pt_data_63: | |
27656 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27657 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27658 | .word 0x00000000,0xff000000 ! Expected data for %l1 | |
27659 | .word 0x00000000,0xffffffff ! Expected data for %l2 | |
27660 | .word 0x00000000,0xc4ffffff ! Expected data for %l3 | |
27661 | .word 0x00000000,0x9ce0b68a ! Expected data for %l5 | |
27662 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27663 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27664 | .word 0x5e000000,0x000000ff ! Expected data for %f0 | |
27665 | .word 0x00000000,0xffffffff ! Expected data for %f2 | |
27666 | .word 0x00000000,0xff000000 ! Expected data for %f4 | |
27667 | .word 0xff000000,0x00000000 ! Expected data for %f10 | |
27668 | .word 0xff000000,0xff000000 ! Expected data for %f12 | |
27669 | .word 0x8eff2c03,0x5e000000 ! Expected data for %f14 | |
27670 | .word 0x000000ff,0xff000000 ! Expected data for %f24 | |
27671 | p0_check_pt_data_64: | |
27672 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27673 | .word 0x8ab6e09c,0x00000000 ! Expected data for %l0 | |
27674 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
27675 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
27676 | .word 0x000000ff,0x00000000 ! Expected data for %l3 | |
27677 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
27678 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27679 | .word 0xffffffff,0xffffff8e ! Expected data for %l7 | |
27680 | .word 0x5e000000,0x000000ff ! Expected data for %f0 | |
27681 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
27682 | .word 0xff0000ff,0x00ffffff ! Expected data for %f8 | |
27683 | .word 0x000000ff,0x00000000 ! Expected data for %f10 | |
27684 | .word 0x0000b68a,0xffffffff ! Expected data for %f26 | |
27685 | p0_check_pt_data_65: | |
27686 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27687 | .word 0x00000000,0x5e270000 ! Expected data for %l0 | |
27688 | .word 0x00000000,0xff000000 ! Expected data for %l2 | |
27689 | .word 0x00000000,0x000080c7 ! Expected data for %l3 | |
27690 | .word 0x00000000,0x0000008e ! Expected data for %l4 | |
27691 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
27692 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
27693 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27694 | .word 0x5e000000,0xff000000 ! Expected data for %f0 | |
27695 | .word 0x00000000,0xffffffff ! Expected data for %f2 | |
27696 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
27697 | .word 0xd9876ee7,0x0000ffff ! Expected data for %f6 | |
27698 | .word 0xffffffff,0xff000000 ! Expected data for %f28 | |
27699 | .word 0xffffffff,0x5e27ffff ! Expected data for %f30 | |
27700 | p0_check_pt_data_66: | |
27701 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27702 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
27703 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27704 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
27705 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27706 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27707 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
27708 | .word 0x00000000,0x00005e27 ! Expected data for %l6 | |
27709 | .word 0xff000000,0x00000000 ! Expected data for %l7 | |
27710 | .word 0x00000000,0xffffffff ! Expected data for %f2 | |
27711 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
27712 | .word 0xd9876ee7,0x0000ffff ! Expected data for %f6 | |
27713 | .word 0x00000000,0x00000000 ! Expected data for %f14 | |
27714 | .word 0x000000ff,0x00000000 ! Expected data for %f24 | |
27715 | p0_check_pt_data_67: | |
27716 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27717 | .word 0x00000000,0x57119e5e ! Expected data for %l0 | |
27718 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27719 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27720 | .word 0xffffffff,0xc7800000 ! Expected data for %l3 | |
27721 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
27722 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27723 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27724 | .word 0x00000000,0xffffffff ! Expected data for %f2 | |
27725 | .word 0xd9876ee7,0x0000ffff ! Expected data for %f6 | |
27726 | .word 0x7a000000,0x0000b68a ! Expected data for %f14 | |
27727 | .word 0x0000005e,0x0000005e ! Expected data for %f18 | |
27728 | .word 0x00000000,0xff000000 ! Expected data for %f22 | |
27729 | .word 0x00000000,0x000000ff ! Expected data for %f28 | |
27730 | p0_check_pt_data_68: | |
27731 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27732 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27733 | .word 0xffffffff,0xff270000 ! Expected data for %l1 | |
27734 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27735 | .word 0xffffffff,0xff270000 ! Expected data for %l3 | |
27736 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27737 | .word 0x00000000,0xff000000 ! Expected data for %l5 | |
27738 | .word 0x00000000,0x0000ffff ! Expected data for %l6 | |
27739 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
27740 | .word 0x5e000000,0xff000000 ! Expected data for %f0 | |
27741 | .word 0x5e270000,0xff270000 ! Expected data for %f18 | |
27742 | .word 0x000000ff,0x032cff8e ! Expected data for %f20 | |
27743 | .word 0x00000000,0x00000000 ! Expected data for %f22 | |
27744 | .word 0xffffffff,0xff000000 ! Expected data for %f30 | |
27745 | p0_check_pt_data_69: | |
27746 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27747 | .word 0x00000000,0x9ce0b68a ! Expected data for %l0 | |
27748 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27749 | .word 0x00000000,0x032cff8e ! Expected data for %l2 | |
27750 | .word 0x00000000,0x0000005e ! Expected data for %l3 | |
27751 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
27752 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27753 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27754 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27755 | .word 0x00000000,0xffffffff ! Expected data for %f2 | |
27756 | .word 0x000000ff,0xff000000 ! Expected data for %f4 | |
27757 | .word 0x7a000000,0x00000000 ! Expected data for %f14 | |
27758 | .word 0x0000b68a,0xff0000ff ! Expected data for %f24 | |
27759 | .word 0xffffffff,0x00000000 ! Expected data for %f30 | |
27760 | p0_check_pt_data_70: | |
27761 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27762 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
27763 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
27764 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
27765 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27766 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
27767 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27768 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27769 | .word 0x5e000000,0xff000000 ! Expected data for %f0 | |
27770 | .word 0xff00ffff,0x00000000 ! Expected data for %f2 | |
27771 | .word 0x00000000,0xff000000 ! Expected data for %f4 | |
27772 | .word 0x00000000,0x0000ffff ! Expected data for %f6 | |
27773 | .word 0xff000000,0xff000000 ! Expected data for %f22 | |
27774 | .word 0x00ffffff,0x8ab6e09c ! Expected data for %f30 | |
27775 | p0_check_pt_data_71: | |
27776 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27777 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
27778 | .word 0xffffffff,0xffffffd9 ! Expected data for %l1 | |
27779 | .word 0x00000000,0xff000000 ! Expected data for %l2 | |
27780 | .word 0x00000000,0xe2000000 ! Expected data for %l3 | |
27781 | .word 0x5e000000,0x00000000 ! Expected data for %l4 | |
27782 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27783 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
27784 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
27785 | .word 0x5e000000,0xff000000 ! Expected data for %f0 | |
27786 | .word 0xff00ffff,0xff000000 ! Expected data for %f2 | |
27787 | .word 0x00000000,0x0000ffff ! Expected data for %f6 | |
27788 | .word 0x5e000000,0x00000000 ! Expected data for %f16 | |
27789 | .word 0xff000000,0xff0000ff ! Expected data for %f18 | |
27790 | .word 0x5e000000,0x0000ff00 ! Expected data for %f20 | |
27791 | .word 0x5e9e11ff,0x6b6c2202 ! Expected data for %f22 | |
27792 | .word 0x00000000,0x00000000 ! Expected data for %f24 | |
27793 | .word 0x0000005e,0x000027ff ! Expected data for %f26 | |
27794 | .word 0xff00ffff,0xff0000ff ! Expected data for %f28 | |
27795 | .word 0xff00ffe4,0xffff00ff ! Expected data for %f30 | |
27796 | p0_check_pt_data_72: | |
27797 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27798 | .word 0xffffffff,0xffffffc4 ! Expected data for %l0 | |
27799 | .word 0x00000000,0xffffffff ! Expected data for %l1 | |
27800 | .word 0x5e9e11ff,0x6b6c2202 ! Expected data for %l2 | |
27801 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
27802 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27803 | .word 0x00000000,0xff000000 ! Expected data for %l5 | |
27804 | .word 0x00000000,0x5e0000ff ! Expected data for %l6 | |
27805 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
27806 | .word 0xff000000,0xff0000ff ! Expected data for %f0 | |
27807 | .word 0xff00ffff,0xff0000ff ! Expected data for %f2 | |
27808 | .word 0x00000000,0x0000ffff ! Expected data for %f6 | |
27809 | .word 0x5eff0000,0x0000ff00 ! Expected data for %f16 | |
27810 | p0_check_pt_data_73: | |
27811 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27812 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
27813 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27814 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
27815 | .word 0x00000000,0x0000005e ! Expected data for %l3 | |
27816 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27817 | .word 0x00000000,0xffffffff ! Expected data for %l5 | |
27818 | .word 0xffffffff,0xffffff9c ! Expected data for %l6 | |
27819 | .word 0x00000000,0x0000ffff ! Expected data for %l7 | |
27820 | .word 0x00000000,0xff000000 ! Expected data for %f4 | |
27821 | .word 0x00000000,0xff0000ff ! Expected data for %f18 | |
27822 | p0_check_pt_data_74: | |
27823 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27824 | .word 0xff000000,0xff000000 ! Expected data for %l0 | |
27825 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27826 | .word 0x00000000,0xff000000 ! Expected data for %l2 | |
27827 | .word 0x00000000,0xff0000ff ! Expected data for %l4 | |
27828 | .word 0x00000000,0x032cff8e ! Expected data for %l5 | |
27829 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27830 | .word 0x00000000,0x00ff0000 ! Expected data for %l7 | |
27831 | .word 0xff000000,0xff000000 ! Expected data for %f0 | |
27832 | .word 0xff00ffff,0xff0000ff ! Expected data for %f2 | |
27833 | .word 0x000000ff,0x0000ffff ! Expected data for %f10 | |
27834 | .word 0x6b002202,0xffffffff ! Expected data for %f14 | |
27835 | p0_check_pt_data_75: | |
27836 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27837 | .word 0x00000000,0x0000005e ! Expected data for %l0 | |
27838 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
27839 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27840 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27841 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27842 | .word 0x00000000,0xff000000 ! Expected data for %l5 | |
27843 | .word 0x5e9e1157,0x6b6c2202 ! Expected data for %l6 | |
27844 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27845 | .word 0xff000000,0xff0000ff ! Expected data for %f0 | |
27846 | .word 0x9cffffff,0xff0000ff ! Expected data for %f2 | |
27847 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
27848 | .word 0x000000ff,0xff000000 ! Expected data for %f12 | |
27849 | .word 0x5e9e11ff,0x00000000 ! Expected data for %f22 | |
27850 | .word 0x00000000,0x00000000 ! Expected data for %f24 | |
27851 | .word 0x1a000000,0x6b6c2202 ! Expected data for %f30 | |
27852 | p0_check_pt_data_76: | |
27853 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27854 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27855 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
27856 | .word 0x00000000,0x0000ffff ! Expected data for %l3 | |
27857 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27858 | .word 0x00000000,0xffffffff ! Expected data for %l5 | |
27859 | .word 0x00000000,0x00ffffff ! Expected data for %l6 | |
27860 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27861 | .word 0xff000000,0xff0000ff ! Expected data for %f0 | |
27862 | .word 0x9cffffff,0xff0000ff ! Expected data for %f2 | |
27863 | .word 0x0000578b,0xd9876ee7 ! Expected data for %f6 | |
27864 | .word 0x000000ff,0x0000ffff ! Expected data for %f12 | |
27865 | .word 0x6b002202,0x006b0000 ! Expected data for %f14 | |
27866 | .word 0x00ff0000,0x00000000 ! Expected data for %f22 | |
27867 | .word 0x000000ff,0x00000000 ! Expected data for %f30 | |
27868 | p0_check_pt_data_77: | |
27869 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27870 | .word 0x9ce0b68a,0xff0000ff ! Expected data for %l0 | |
27871 | .word 0xffffffff,0xff000000 ! Expected data for %l1 | |
27872 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27873 | .word 0xff0000ff,0x00000000 ! Expected data for %l3 | |
27874 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
27875 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27876 | .word 0x00000000,0x8e000000 ! Expected data for %l7 | |
27877 | .word 0xff0000ff,0xff0000ff ! Expected data for %f0 | |
27878 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
27879 | .word 0xff0000ff,0x00ff00ff ! Expected data for %f6 | |
27880 | .word 0x0000005e,0x0000ff8a ! Expected data for %f20 | |
27881 | .word 0x00ff0000,0x00000000 ! Expected data for %f22 | |
27882 | .word 0xff0000ff,0x00000000 ! Expected data for %f28 | |
27883 | p0_check_pt_data_78: | |
27884 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27885 | .word 0x00000000,0x00005e00 ! Expected data for %l0 | |
27886 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27887 | .word 0x00000000,0xffffffc4 ! Expected data for %l2 | |
27888 | .word 0x00000000,0xff000000 ! Expected data for %l3 | |
27889 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27890 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27891 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
27892 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27893 | .word 0xff0000ff,0xff0000ff ! Expected data for %f2 | |
27894 | .word 0xff0000ff,0x00ff00ff ! Expected data for %f6 | |
27895 | .word 0xff0000ff,0x00ff0000 ! Expected data for %f8 | |
27896 | .word 0xff000000,0xff0000ff ! Expected data for %f14 | |
27897 | .word 0x5eff0000,0xff00ffff ! Expected data for %f16 | |
27898 | p0_check_pt_data_79: | |
27899 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27900 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
27901 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27902 | .word 0x00000000,0x8aff0000 ! Expected data for %l2 | |
27903 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27904 | .word 0x00000000,0x00006b00 ! Expected data for %l4 | |
27905 | .word 0xffffffff,0xff0000ff ! Expected data for %l5 | |
27906 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27907 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27908 | .word 0xff0000ff,0xff0000ff ! Expected data for %f2 | |
27909 | .word 0x000000ff,0xffffff00 ! Expected data for %f12 | |
27910 | .word 0x5eff0000,0x00000000 ! Expected data for %f16 | |
27911 | .word 0x00000000,0xff000000 ! Expected data for %f26 | |
27912 | .word 0xff0000ff,0x1a000000 ! Expected data for %f28 | |
27913 | p0_check_pt_data_80: | |
27914 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27915 | .word 0x00000000,0xff00ffff ! Expected data for %l0 | |
27916 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
27917 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27918 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
27919 | .word 0x00000000,0xff000000 ! Expected data for %l5 | |
27920 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
27921 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27922 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
27923 | .word 0xff0000ff,0x00ff00ff ! Expected data for %f6 | |
27924 | .word 0x00000000,0xff0000ff ! Expected data for %f18 | |
27925 | .word 0x0000ffff,0x00000000 ! Expected data for %f22 | |
27926 | .word 0xffff0000,0xff000000 ! Expected data for %f24 | |
27927 | p0_check_pt_data_81: | |
27928 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27929 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
27930 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27931 | .word 0x0000005e,0x0000ffff ! Expected data for %l2 | |
27932 | .word 0xffffff00,0x00000000 ! Expected data for %l3 | |
27933 | .word 0x00000000,0xff00ffff ! Expected data for %l4 | |
27934 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
27935 | .word 0xff0000ff,0x00000000 ! Expected data for %l6 | |
27936 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
27937 | .word 0xff0000ff,0xff0000ff ! Expected data for %f0 | |
27938 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
27939 | .word 0x00000000,0x00ff00ff ! Expected data for %f6 | |
27940 | .word 0xff000000,0x000000ff ! Expected data for %f14 | |
27941 | .word 0xff0000ff,0x000000ff ! Expected data for %f16 | |
27942 | .word 0x5e000000,0x00000000 ! Expected data for %f22 | |
27943 | p0_check_pt_data_82: | |
27944 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27945 | .word 0x00000000,0xff0000ff ! Expected data for %l0 | |
27946 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
27947 | .word 0x00000000,0x0000ff00 ! Expected data for %l3 | |
27948 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
27949 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27950 | .word 0x00000000,0x0000005e ! Expected data for %l6 | |
27951 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27952 | .word 0xff0000ff,0xff0000ff ! Expected data for %f0 | |
27953 | .word 0x00000000,0x000000ff ! Expected data for %f4 | |
27954 | .word 0x0000ff00,0x988c3d00 ! Expected data for %f6 | |
27955 | .word 0x00000000,0x0000007a ! Expected data for %f14 | |
27956 | .word 0xff0000ff,0x00ff0000 ! Expected data for %f16 | |
27957 | .word 0x000000ff,0xffffff00 ! Expected data for %f30 | |
27958 | p0_check_pt_data_83: | |
27959 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27960 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
27961 | .word 0xffffffff,0xff000000 ! Expected data for %l1 | |
27962 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
27963 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27964 | .word 0x00000000,0x0000ff00 ! Expected data for %l4 | |
27965 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
27966 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
27967 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
27968 | .word 0x00000000,0x0000001a ! Expected data for %f0 | |
27969 | .word 0xff0027ff,0x0000005e ! Expected data for %f2 | |
27970 | .word 0xff000000,0x032cff8e ! Expected data for %f4 | |
27971 | .word 0x02226c6b,0x57119e5e ! Expected data for %f6 | |
27972 | .word 0x925b1ad8,0x39aced3b ! Expected data for %f8 | |
27973 | .word 0x64479a75,0xbb9180c7 ! Expected data for %f10 | |
27974 | .word 0xffff0000,0x00000000 ! Expected data for %f12 | |
27975 | .word 0xffffffff,0x000000ff ! Expected data for %f14 | |
27976 | .word 0x5e000000,0xff000000 ! Expected data for %f16 | |
27977 | .word 0xffffff00,0x00000000 ! Expected data for %f18 | |
27978 | .word 0x00000000,0x00000000 ! Expected data for %f20 | |
27979 | .word 0xb5238e48,0x1293fe50 ! Expected data for %f22 | |
27980 | .word 0x0000009c,0xb100901c ! Expected data for %f24 | |
27981 | .word 0xff00ffe4,0xffff00ff ! Expected data for %f26 | |
27982 | .word 0x5eff6960,0xff9a0036 ! Expected data for %f28 | |
27983 | .word 0x02226c6b,0x57119e5e ! Expected data for %f30 | |
27984 | p0_check_pt_data_84: | |
27985 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27986 | .word 0x00000000,0xff000000 ! Expected data for %l1 | |
27987 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
27988 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
27989 | .word 0x00000000,0x0000b68a ! Expected data for %l4 | |
27990 | .word 0xffffffff,0xffffff00 ! Expected data for %l5 | |
27991 | .word 0xffffffff,0x9ce0b68a ! Expected data for %l6 | |
27992 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
27993 | .word 0xffff0000,0xff000000 ! Expected data for %f8 | |
27994 | .word 0xff000000,0x1a0000ff ! Expected data for %f18 | |
27995 | p0_check_pt_data_85: | |
27996 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
27997 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
27998 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
27999 | .word 0xff000000,0x00000000 ! Expected data for %l2 | |
28000 | .word 0x00000000,0x0000ff00 ! Expected data for %l3 | |
28001 | .word 0x00000000,0xff000000 ! Expected data for %l4 | |
28002 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28003 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28004 | .word 0x00000000,0x0000005e ! Expected data for %l7 | |
28005 | .word 0x00000000,0x0000005e ! Expected data for %f2 | |
28006 | .word 0xff000000,0x032cff8e ! Expected data for %f4 | |
28007 | .word 0x02226c6b,0x6b6c2202 ! Expected data for %f6 | |
28008 | .word 0xffffffff,0x9ce0b68a ! Expected data for %f14 | |
28009 | .word 0x5e000000,0x00000000 ! Expected data for %f16 | |
28010 | .word 0xff00ffff,0x000000ff ! Expected data for %f24 | |
28011 | .word 0x00000000,0xffff00ff ! Expected data for %f26 | |
28012 | p0_check_pt_data_86: | |
28013 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28014 | .word 0x00000000,0x0000ffff ! Expected data for %l0 | |
28015 | .word 0x7a000000,0x0000b68a ! Expected data for %l1 | |
28016 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28017 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28018 | .word 0x8aff0000,0xffff0000 ! Expected data for %l4 | |
28019 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28020 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28021 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28022 | .word 0xff000000,0x032cff8e ! Expected data for %f4 | |
28023 | .word 0x5e000000,0xffff00ff ! Expected data for %f24 | |
28024 | p0_check_pt_data_87: | |
28025 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28026 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
28027 | .word 0x00000000,0xff0000ff ! Expected data for %l2 | |
28028 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28029 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
28030 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
28031 | .word 0x00000000,0x5e000000 ! Expected data for %l6 | |
28032 | .word 0x00000000,0x00ff0000 ! Expected data for %l7 | |
28033 | .word 0x00000000,0x0000005e ! Expected data for %f2 | |
28034 | .word 0xffffffff,0x000000ff ! Expected data for %f4 | |
28035 | .word 0x02226c6b,0xff0000ff ! Expected data for %f6 | |
28036 | .word 0x5e27ffff,0xffffffff ! Expected data for %f8 | |
28037 | .word 0x5e000000,0xff000000 ! Expected data for %f14 | |
28038 | .word 0xff0000ff,0x000000ff ! Expected data for %f16 | |
28039 | .word 0xffffffff,0xffffffff ! Expected data for %f18 | |
28040 | .word 0xff000000,0x00000000 ! Expected data for %f20 | |
28041 | .word 0x000000ff,0x000000ff ! Expected data for %f22 | |
28042 | .word 0x5e000000,0xff000000 ! Expected data for %f24 | |
28043 | .word 0x00ff0000,0xff000000 ! Expected data for %f26 | |
28044 | .word 0x000000ff,0xff000000 ! Expected data for %f28 | |
28045 | .word 0x00000000,0x0000007a ! Expected data for %f30 | |
28046 | p0_check_pt_data_88: | |
28047 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28048 | .word 0xffffffff,0xffff0000 ! Expected data for %l0 | |
28049 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28050 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
28051 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
28052 | .word 0x00000000,0x0000ff00 ! Expected data for %l5 | |
28053 | .word 0x00000000,0xffffffff ! Expected data for %l6 | |
28054 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
28055 | .word 0xffffffff,0x000000ff ! Expected data for %f4 | |
28056 | .word 0x02226c6b,0xff0000ff ! Expected data for %f6 | |
28057 | .word 0x9cffb68a,0xffffffff ! Expected data for %f10 | |
28058 | .word 0x0000ffff,0xff0000ff ! Expected data for %f14 | |
28059 | .word 0xff000000,0xff0000ff ! Expected data for %f20 | |
28060 | .word 0xffffffff,0x0000ffff ! Expected data for %f28 | |
28061 | p0_check_pt_data_89: | |
28062 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28063 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28064 | .word 0x00000000,0x0000001a ! Expected data for %l1 | |
28065 | .word 0xffffffff,0xff0000ff ! Expected data for %l2 | |
28066 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
28067 | .word 0x00000000,0xff000000 ! Expected data for %l4 | |
28068 | .word 0x8ab6e09c,0xffffffff ! Expected data for %l5 | |
28069 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
28070 | .word 0xff000000,0x000000ff ! Expected data for %l7 | |
28071 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
28072 | .word 0x00000000,0x0000ffff ! Expected data for %f4 | |
28073 | .word 0x0000ffff,0xffffffff ! Expected data for %f14 | |
28074 | .word 0x00000000,0x0000ffff ! Expected data for %f20 | |
28075 | .word 0xff000000,0x00ff00c4 ! Expected data for %f22 | |
28076 | .word 0x00000000,0x0000005e ! Expected data for %f26 | |
28077 | .word 0xffff275e,0xffffffff ! Expected data for %f28 | |
28078 | p0_check_pt_data_90: | |
28079 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28080 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28081 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
28082 | .word 0x00000000,0x0000005e ! Expected data for %l2 | |
28083 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
28084 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28085 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28086 | .word 0x000027ff,0x000000ff ! Expected data for %l6 | |
28087 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
28088 | .word 0x00000000,0x0000ffff ! Expected data for %f4 | |
28089 | .word 0x9ce0b68a,0xff0000ff ! Expected data for %f6 | |
28090 | .word 0x5e000000,0x9ce0b68a ! Expected data for %f24 | |
28091 | .word 0x00000000,0x0000ffff ! Expected data for %f26 | |
28092 | p0_check_pt_data_91: | |
28093 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28094 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28095 | .word 0x00000000,0xffffffff ! Expected data for %l1 | |
28096 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
28097 | .word 0x00000000,0xffffffff ! Expected data for %l3 | |
28098 | .word 0x00000000,0xffff275e ! Expected data for %l4 | |
28099 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28100 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28101 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28102 | .word 0xffff0000,0x00000000 ! Expected data for %f0 | |
28103 | .word 0x00000000,0xffffffff ! Expected data for %f2 | |
28104 | .word 0x1a000000,0x00000000 ! Expected data for %f4 | |
28105 | .word 0x02226c6b,0x57119e5e ! Expected data for %f6 | |
28106 | .word 0x925b1ad8,0x39aced3b ! Expected data for %f8 | |
28107 | .word 0x64479a75,0xbb9180c7 ! Expected data for %f10 | |
28108 | .word 0xffffffff,0x365fc6fa ! Expected data for %f12 | |
28109 | .word 0xffffffff,0x000000ff ! Expected data for %f14 | |
28110 | .word 0xffffffff,0x9ce0b68a ! Expected data for %f16 | |
28111 | .word 0x00000000,0x0000ffff ! Expected data for %f20 | |
28112 | .word 0x00000000,0x000000ff ! Expected data for %f24 | |
28113 | p0_check_pt_data_92: | |
28114 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28115 | .word 0x00000000,0x00ff0000 ! Expected data for %l0 | |
28116 | .word 0x00000000,0x00005e00 ! Expected data for %l1 | |
28117 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28118 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28119 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
28120 | .word 0x00000000,0xffffffff ! Expected data for %l5 | |
28121 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
28122 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28123 | .word 0x00000000,0x0000ffff ! Expected data for %f0 | |
28124 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
28125 | .word 0x1a000000,0x00000000 ! Expected data for %f4 | |
28126 | .word 0x02226c6b,0x57119e5e ! Expected data for %f6 | |
28127 | .word 0xffffffff,0xffffffff ! Expected data for %f16 | |
28128 | p0_check_pt_data_93: | |
28129 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28130 | .word 0x00000000,0x5e27ffff ! Expected data for %l0 | |
28131 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
28132 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
28133 | .word 0x00000000,0xffffffff ! Expected data for %l3 | |
28134 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
28135 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28136 | .word 0x00000000,0xffff275e ! Expected data for %l6 | |
28137 | .word 0x00000000,0xffffffff ! Expected data for %l7 | |
28138 | .word 0x00ff005e,0x00000000 ! Expected data for %f0 | |
28139 | .word 0xffffffff,0xffffffff ! Expected data for %f2 | |
28140 | .word 0x02226c6b,0x57119e5e ! Expected data for %f6 | |
28141 | .word 0x64479a75,0xffff275e ! Expected data for %f10 | |
28142 | .word 0xffffffff,0x00ff005e ! Expected data for %f14 | |
28143 | .word 0x5e000000,0x00000000 ! Expected data for %f30 | |
28144 | p0_check_pt_data_94: | |
28145 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28146 | .word 0x00000000,0x0000f9ff ! Expected data for %l0 | |
28147 | .word 0x00000000,0xffffffff ! Expected data for %l1 | |
28148 | .word 0x00000000,0x365fc6fa ! Expected data for %l2 | |
28149 | .word 0x00000000,0xffffffff ! Expected data for %l3 | |
28150 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28151 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
28152 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28153 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
28154 | .word 0x1a000000,0x00000000 ! Expected data for %f4 | |
28155 | .word 0x64479a75,0x000000ff ! Expected data for %f10 | |
28156 | p0_check_pt_data_95: | |
28157 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28158 | .word 0x00000000,0x5e00ff00 ! Expected data for %l0 | |
28159 | .word 0x00000000,0x0000ff00 ! Expected data for %l1 | |
28160 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28161 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28162 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28163 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28164 | .word 0x00000000,0x0000001a ! Expected data for %l6 | |
28165 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28166 | .word 0x00ff005e,0x00000000 ! Expected data for %f0 | |
28167 | .word 0xffffffff,0xff000000 ! Expected data for %f2 | |
28168 | .word 0x1a000000,0x00000000 ! Expected data for %f4 | |
28169 | .word 0x02226c6b,0x57119e5e ! Expected data for %f6 | |
28170 | .word 0xffffffff,0x00000000 ! Expected data for %f16 | |
28171 | .word 0xff000000,0x0000ffff ! Expected data for %f22 | |
28172 | p0_check_pt_data_96: | |
28173 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28174 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28175 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
28176 | .word 0x00000000,0x0000001a ! Expected data for %l3 | |
28177 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
28178 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28179 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28180 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28181 | .word 0xffffffff,0xff000000 ! Expected data for %f2 | |
28182 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
28183 | .word 0x00000000,0x00000000 ! Expected data for %f6 | |
28184 | p0_check_pt_data_97: | |
28185 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28186 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
28187 | .word 0x00000000,0xffff0000 ! Expected data for %l1 | |
28188 | .word 0x00000000,0x0000005e ! Expected data for %l2 | |
28189 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28190 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28191 | .word 0x00000000,0x00ff005e ! Expected data for %l5 | |
28192 | .word 0x00000000,0x0000ff00 ! Expected data for %l7 | |
28193 | .word 0x02226c6b,0x57119e5e ! Expected data for %f0 | |
28194 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
28195 | .word 0x00000000,0x00000000 ! Expected data for %f6 | |
28196 | .word 0x00000000,0x00000000 ! Expected data for %f12 | |
28197 | .word 0xffff0000,0x000000ff ! Expected data for %f18 | |
28198 | .word 0xff000000,0x00000000 ! Expected data for %f26 | |
28199 | p0_check_pt_data_98: | |
28200 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28201 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
28202 | .word 0x00000000,0x5e000000 ! Expected data for %l2 | |
28203 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
28204 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
28205 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
28206 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28207 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
28208 | .word 0x00000000,0x00000000 ! Expected data for %f6 | |
28209 | .word 0xffff275e,0x00ff005e ! Expected data for %f14 | |
28210 | .word 0x1a000000,0x00000000 ! Expected data for %f16 | |
28211 | .word 0x00000000,0x00000000 ! Expected data for %f18 | |
28212 | .word 0xffffffff,0x00000000 ! Expected data for %f20 | |
28213 | .word 0xff0000ff,0x6b6c2202 ! Expected data for %f22 | |
28214 | .word 0xffffffff,0xffff275e ! Expected data for %f24 | |
28215 | .word 0xffffffff,0x8ab6ff9c ! Expected data for %f26 | |
28216 | .word 0x00000000,0x0000ffff ! Expected data for %f28 | |
28217 | .word 0xff0000ff,0xffff0000 ! Expected data for %f30 | |
28218 | p0_check_pt_data_99: | |
28219 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28220 | .word 0x000000fe,0xffff0001 ! Expected data for %l0 | |
28221 | .word 0x00000000,0xffffffff ! Expected data for %l1 | |
28222 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28223 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28224 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
28225 | .word 0x000000ff,0x00000000 ! Expected data for %l5 | |
28226 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
28227 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28228 | .word 0xff9bdaeb,0xffffffff ! Expected data for %f0 | |
28229 | .word 0x0000ffff,0xffffffff ! Expected data for %f2 | |
28230 | .word 0x000000ff,0x00000000 ! Expected data for %f4 | |
28231 | .word 0x02226c6b,0x57119e5e ! Expected data for %f6 | |
28232 | .word 0x925b1ad8,0x39aced3b ! Expected data for %f8 | |
28233 | .word 0x64479a75,0xbb9180c7 ! Expected data for %f10 | |
28234 | .word 0xffffffff,0x365fc6fa ! Expected data for %f12 | |
28235 | .word 0xffffffff,0x000000ff ! Expected data for %f14 | |
28236 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
28237 | .word 0xff0000ff,0x1a000000 ! Expected data for %f30 | |
28238 | p0_check_pt_data_100: | |
28239 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28240 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
28241 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28242 | .word 0x00000000,0x64479a75 ! Expected data for %l3 | |
28243 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
28244 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28245 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28246 | .word 0x00000000,0x000000ff ! Expected data for %f0 | |
28247 | .word 0x0100ffff,0xff000000 ! Expected data for %f2 | |
28248 | .word 0xff000000,0x00000000 ! Expected data for %f4 | |
28249 | .word 0xc400ff00,0x000000ff ! Expected data for %f6 | |
28250 | .word 0xff000000,0x00000000 ! Expected data for %f8 | |
28251 | .word 0xffff0000,0x00000000 ! Expected data for %f10 | |
28252 | .word 0xffffffff,0x5e27ffff ! Expected data for %f12 | |
28253 | .word 0x00000000,0x0000005e ! Expected data for %f14 | |
28254 | p0_check_pt_data_101: | |
28255 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28256 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28257 | .word 0x02226c6b,0x00000000 ! Expected data for %l1 | |
28258 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28259 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28260 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28261 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28262 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
28263 | .word 0x00000000,0x000000ff ! Expected data for %f0 | |
28264 | .word 0x00000003,0xff000000 ! Expected data for %f2 | |
28265 | .word 0xff000000,0x00000000 ! Expected data for %f4 | |
28266 | .word 0xc400ff00,0x000000ff ! Expected data for %f6 | |
28267 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
28268 | .word 0xff0000ff,0xffffffff ! Expected data for %f30 | |
28269 | p0_check_pt_data_102: | |
28270 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28271 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28272 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28273 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28274 | .word 0xffff275e,0xffffffff ! Expected data for %l3 | |
28275 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28276 | .word 0x00000000,0xffffffff ! Expected data for %l5 | |
28277 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
28278 | .word 0x00000000,0xffff0000 ! Expected data for %l7 | |
28279 | .word 0x00000003,0xff000000 ! Expected data for %f2 | |
28280 | .word 0xff000000,0x00000000 ! Expected data for %f4 | |
28281 | .word 0x00000000,0x000000ff ! Expected data for %f16 | |
28282 | .word 0x759a4764,0x00000000 ! Expected data for %f18 | |
28283 | .word 0xff000000,0xffffffff ! Expected data for %f20 | |
28284 | .word 0x00000000,0x0000005e ! Expected data for %f22 | |
28285 | .word 0x000000ff,0x0000ffff ! Expected data for %f24 | |
28286 | .word 0xff00ffff,0x00000000 ! Expected data for %f26 | |
28287 | .word 0x0000001a,0xff0000ff ! Expected data for %f28 | |
28288 | .word 0x00ffffff,0xff000000 ! Expected data for %f30 | |
28289 | p0_check_pt_data_103: | |
28290 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28291 | .word 0xe5273a68,0x2f17583b ! Expected data for %l0 | |
28292 | .word 0x6ee5c898,0x52fb2b0b ! Expected data for %l1 | |
28293 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
28294 | .word 0x00000000,0xff000000 ! Expected data for %l3 | |
28295 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28296 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28297 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28298 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28299 | .word 0x0000001a,0x000000ff ! Expected data for %f4 | |
28300 | .word 0xff000000,0x000000ff ! Expected data for %f6 | |
28301 | .word 0x000000ff,0x00000000 ! Expected data for %f10 | |
28302 | .word 0xffffffff,0x00000000 ! Expected data for %f12 | |
28303 | .word 0x00000000,0x6b6c0000 ! Expected data for %f22 | |
28304 | .word 0x00000000,0x00000000 ! Expected data for %f26 | |
28305 | p0_check_pt_data_104: | |
28306 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28307 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28308 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28309 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28310 | .word 0x000000ff,0xffffff00 ! Expected data for %l3 | |
28311 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
28312 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28313 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
28314 | .word 0x00000000,0xff0000ff ! Expected data for %l7 | |
28315 | .word 0x00000003,0xff000000 ! Expected data for %f2 | |
28316 | .word 0x0000001a,0x000000ff ! Expected data for %f4 | |
28317 | .word 0x00000000,0x000000ff ! Expected data for %f6 | |
28318 | .word 0x00000000,0x000000ff ! Expected data for %f16 | |
28319 | p0_check_pt_data_105: | |
28320 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28321 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28322 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
28323 | .word 0x00000000,0xffff275e ! Expected data for %l3 | |
28324 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
28325 | .word 0x00000000,0x0000ff00 ! Expected data for %l6 | |
28326 | .word 0x00005700,0x000000ff ! Expected data for %f0 | |
28327 | .word 0x00000000,0xff000000 ! Expected data for %f2 | |
28328 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
28329 | .word 0x00000000,0x000000ff ! Expected data for %f6 | |
28330 | .word 0xffffffff,0x00ff0000 ! Expected data for %f12 | |
28331 | .word 0x000000ff,0x00000000 ! Expected data for %f16 | |
28332 | .word 0x00000000,0x00000000 ! Expected data for %f18 | |
28333 | .word 0x00000001,0x00000000 ! Expected data for %f20 | |
28334 | .word 0x000000ff,0xff000000 ! Expected data for %f22 | |
28335 | .word 0x3bedac39,0xd81a5b92 ! Expected data for %f24 | |
28336 | .word 0xc78091bb,0x759a4764 ! Expected data for %f26 | |
28337 | .word 0xfac65f36,0x9ce0b68a ! Expected data for %f28 | |
28338 | .word 0x46ee6de4,0xc49410cd ! Expected data for %f30 | |
28339 | p0_check_pt_data_106: | |
28340 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28341 | .word 0xffffffff,0xff0000ff ! Expected data for %l1 | |
28342 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
28343 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
28344 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
28345 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
28346 | .word 0x00000000,0xffff0000 ! Expected data for %l6 | |
28347 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28348 | .word 0x0000ff00,0x64479a75 ! Expected data for %f0 | |
28349 | .word 0x000000ff,0x64ffffff ! Expected data for %f2 | |
28350 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
28351 | .word 0x000000ff,0x00ff005e ! Expected data for %f6 | |
28352 | .word 0x000000ff,0x00000000 ! Expected data for %f8 | |
28353 | .word 0x00000000,0x00000000 ! Expected data for %f10 | |
28354 | .word 0xffff0000,0x00000000 ! Expected data for %f12 | |
28355 | .word 0xffff275e,0xffffffff ! Expected data for %f14 | |
28356 | .word 0xffff0000,0x00000000 ! Expected data for %f16 | |
28357 | .word 0x0000b68a,0x00000000 ! Expected data for %f18 | |
28358 | .word 0x00000000,0x00000000 ! Expected data for %f20 | |
28359 | .word 0x5e9e1157,0x6b6c2202 ! Expected data for %f22 | |
28360 | .word 0x000000ff,0xff000000 ! Expected data for %f24 | |
28361 | .word 0xc78091bb,0x759a4764 ! Expected data for %f26 | |
28362 | .word 0xffff0000,0xffffffff ! Expected data for %f28 | |
28363 | .word 0xff000000,0xffffffff ! Expected data for %f30 | |
28364 | p0_check_pt_data_107: | |
28365 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28366 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28367 | .word 0x00000000,0x00000064 ! Expected data for %l2 | |
28368 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28369 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28370 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
28371 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28372 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28373 | .word 0x0000ff00,0x64479a75 ! Expected data for %f0 | |
28374 | .word 0x00000000,0x8ab6ff9c ! Expected data for %f4 | |
28375 | .word 0x000000ff,0x00ff005e ! Expected data for %f6 | |
28376 | .word 0xffff0000,0x00000000 ! Expected data for %f8 | |
28377 | .word 0x0000ffff,0x00000000 ! Expected data for %f12 | |
28378 | .word 0x00000000,0xffffff00 ! Expected data for %f18 | |
28379 | .word 0xffffffff,0x000000ff ! Expected data for %f22 | |
28380 | .word 0x5e000000,0xffff0000 ! Expected data for %f28 | |
28381 | p0_check_pt_data_108: | |
28382 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28383 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28384 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
28385 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28386 | .word 0xffffffff,0xffffffff ! Expected data for %l4 | |
28387 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28388 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28389 | .word 0x00000000,0x0000ffff ! Expected data for %l7 | |
28390 | .word 0x0000ff00,0x64479a75 ! Expected data for %f0 | |
28391 | .word 0x000000ff,0x64ffffff ! Expected data for %f2 | |
28392 | .word 0x00000000,0x8ab6ff9c ! Expected data for %f4 | |
28393 | .word 0x00000000,0x00000000 ! Expected data for %f8 | |
28394 | .word 0xff000000,0x00000000 ! Expected data for %f12 | |
28395 | .word 0x00000000,0x00000000 ! Expected data for %f20 | |
28396 | p0_check_pt_data_109: | |
28397 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28398 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
28399 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28400 | .word 0x00000000,0x0000ff00 ! Expected data for %l2 | |
28401 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
28402 | .word 0xffffffff,0xffffffff ! Expected data for %l4 | |
28403 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
28404 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28405 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28406 | .word 0x0000ff00,0x64479a75 ! Expected data for %f0 | |
28407 | .word 0xffff0000,0x00000000 ! Expected data for %f2 | |
28408 | .word 0x000000ff,0xff00ffff ! Expected data for %f6 | |
28409 | .word 0x00000000,0xffffff00 ! Expected data for %f18 | |
28410 | .word 0x00000000,0x8ab60000 ! Expected data for %f22 | |
28411 | p0_check_pt_data_110: | |
28412 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28413 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28414 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28415 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28416 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
28417 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28418 | .word 0x00000000,0x5e000000 ! Expected data for %l5 | |
28419 | .word 0x9ce0b68a,0xa3ffade0 ! Expected data for %l6 | |
28420 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
28421 | .word 0x00000000,0x000000ff ! Expected data for %f2 | |
28422 | .word 0x00000000,0x8ab6ff9c ! Expected data for %f4 | |
28423 | .word 0xffffffff,0xffff275e ! Expected data for %f6 | |
28424 | .word 0xffffff64,0xff0000ff ! Expected data for %f10 | |
28425 | .word 0xc78091bb,0xff000000 ! Expected data for %f26 | |
28426 | p0_check_pt_data_111: | |
28427 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28428 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
28429 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
28430 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28431 | .word 0x00000000,0x5e27ffff ! Expected data for %l3 | |
28432 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28433 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28434 | .word 0x00000000,0xffffff00 ! Expected data for %l6 | |
28435 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
28436 | .word 0x00000000,0x64479a75 ! Expected data for %f0 | |
28437 | .word 0x00000000,0x8ab6ff9c ! Expected data for %f4 | |
28438 | .word 0xffffffff,0xffff275e ! Expected data for %f6 | |
28439 | .word 0x00000000,0xffffffff ! Expected data for %f14 | |
28440 | p0_check_pt_data_112: | |
28441 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28442 | .word 0x00000000,0x0000ffff ! Expected data for %l0 | |
28443 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28444 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28445 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
28446 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28447 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28448 | .word 0x00000000,0x0000005e ! Expected data for %l6 | |
28449 | .word 0x00000000,0x6b6c2202 ! Expected data for %l7 | |
28450 | .word 0x00000000,0x64479a75 ! Expected data for %f0 | |
28451 | .word 0x00000000,0x000000ff ! Expected data for %f2 | |
28452 | .word 0x00000000,0x8ab6ff9c ! Expected data for %f4 | |
28453 | .word 0x00ffffff,0x00000000 ! Expected data for %f8 | |
28454 | .word 0x000000ff,0xffffff00 ! Expected data for %f12 | |
28455 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
28456 | .word 0x000000ff,0x000000ff ! Expected data for %f24 | |
28457 | .word 0xc78091bb,0xff000000 ! Expected data for %f26 | |
28458 | p0_check_pt_data_113: | |
28459 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28460 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
28461 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28462 | .word 0x759a4764,0xffffff00 ! Expected data for %l2 | |
28463 | .word 0x00000000,0x0000ffff ! Expected data for %l3 | |
28464 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28465 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28466 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28467 | .word 0x00000000,0xff000000 ! Expected data for %f0 | |
28468 | .word 0x00000000,0x8ab6ff9c ! Expected data for %f4 | |
28469 | .word 0xffffffff,0x00000000 ! Expected data for %f6 | |
28470 | .word 0x00000000,0x00000000 ! Expected data for %f8 | |
28471 | .word 0xffffffff,0xffffffff ! Expected data for %f10 | |
28472 | .word 0xff8091bb,0x759a4764 ! Expected data for %f14 | |
28473 | .word 0x00ff00ff,0xff000000 ! Expected data for %f16 | |
28474 | .word 0xff000000,0x64ffffff ! Expected data for %f18 | |
28475 | .word 0xff000000,0x8ab6ff9c ! Expected data for %f20 | |
28476 | .word 0x000000ff,0x00ff005e ! Expected data for %f22 | |
28477 | .word 0xffff0000,0x00000000 ! Expected data for %f24 | |
28478 | .word 0x00000000,0x00000000 ! Expected data for %f26 | |
28479 | .word 0x0000ffff,0x00000000 ! Expected data for %f28 | |
28480 | .word 0x00000000,0xff000000 ! Expected data for %f30 | |
28481 | p0_check_pt_data_114: | |
28482 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28483 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28484 | .word 0x00000000,0x8ab6ff9c ! Expected data for %l1 | |
28485 | .word 0x00000000,0x0000ff00 ! Expected data for %l2 | |
28486 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28487 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28488 | .word 0xffffffff,0xffffff64 ! Expected data for %l5 | |
28489 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28490 | .word 0x00000000,0x0000005e ! Expected data for %l7 | |
28491 | .word 0x00000000,0xff000000 ! Expected data for %f0 | |
28492 | .word 0x00000000,0x8ab6ff9c ! Expected data for %f4 | |
28493 | .word 0xffffffff,0x00000000 ! Expected data for %f10 | |
28494 | .word 0x00000000,0xffffff00 ! Expected data for %f14 | |
28495 | .word 0x00000000,0x0000759a ! Expected data for %f16 | |
28496 | .word 0x00000000,0x00000000 ! Expected data for %f18 | |
28497 | .word 0x00000000,0x00ff0000 ! Expected data for %f20 | |
28498 | .word 0x00000000,0xffff0000 ! Expected data for %f22 | |
28499 | .word 0x00000000,0x64479a75 ! Expected data for %f24 | |
28500 | .word 0x0000ffff,0xa3ffade0 ! Expected data for %f26 | |
28501 | .word 0x00000000,0x00000000 ! Expected data for %f28 | |
28502 | .word 0x759a4764,0x00000000 ! Expected data for %f30 | |
28503 | p0_check_pt_data_115: | |
28504 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28505 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28506 | .word 0x00000000,0xffffffff ! Expected data for %l1 | |
28507 | .word 0xffffffff,0x00000000 ! Expected data for %l2 | |
28508 | .word 0xff000000,0x00000000 ! Expected data for %l3 | |
28509 | .word 0x000000ff,0x00000000 ! Expected data for %l4 | |
28510 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
28511 | .word 0xffffffff,0xffffe0ad ! Expected data for %l6 | |
28512 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28513 | .word 0x00000000,0xff000000 ! Expected data for %f0 | |
28514 | .word 0x00000000,0x000000ff ! Expected data for %f2 | |
28515 | .word 0x00000000,0x8ab6ff9c ! Expected data for %f4 | |
28516 | .word 0x00005e27,0x00000000 ! Expected data for %f6 | |
28517 | .word 0x00000000,0x00000000 ! Expected data for %f8 | |
28518 | .word 0xff000000,0x00000000 ! Expected data for %f16 | |
28519 | .word 0x00000000,0x00000000 ! Expected data for %f28 | |
28520 | p0_check_pt_data_116: | |
28521 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28522 | .word 0xffffffff,0xffffff00 ! Expected data for %l0 | |
28523 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28524 | .word 0x00000000,0x0000ffff ! Expected data for %l2 | |
28525 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28526 | .word 0xffffffff,0xffffff00 ! Expected data for %l4 | |
28527 | .word 0x00000000,0x0000ffff ! Expected data for %l5 | |
28528 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28529 | .word 0x00000000,0x00000000 ! Expected data for %f0 | |
28530 | .word 0x00000000,0x000000ff ! Expected data for %f2 | |
28531 | .word 0x00000000,0x00000000 ! Expected data for %f20 | |
28532 | .word 0xffffffff,0xffffffff ! Expected data for %f26 | |
28533 | .word 0xff000000,0x00000000 ! Expected data for %f30 | |
28534 | p0_check_pt_data_117: | |
28535 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28536 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28537 | .word 0xff000000,0xffffffff ! Expected data for %l1 | |
28538 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
28539 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
28540 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28541 | .word 0x00000000,0x0000ffff ! Expected data for %l5 | |
28542 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28543 | .word 0xffffffff,0xffff9cff ! Expected data for %l7 | |
28544 | .word 0xe0adffa3,0x00000000 ! Expected data for %f0 | |
28545 | .word 0x00000000,0x8ab6ff9c ! Expected data for %f4 | |
28546 | .word 0x00000000,0x0000ffff ! Expected data for %f8 | |
28547 | .word 0x000000ff,0x00000000 ! Expected data for %f18 | |
28548 | .word 0x000000ff,0xffff0000 ! Expected data for %f22 | |
28549 | .word 0xff000000,0xffffffff ! Expected data for %f26 | |
28550 | .word 0x00000000,0x000000ff ! Expected data for %f30 | |
28551 | p0_check_pt_data_118: | |
28552 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28553 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
28554 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28555 | .word 0x00000000,0x0000ffff ! Expected data for %l2 | |
28556 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28557 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
28558 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
28559 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28560 | .word 0x00000000,0x000000ff ! Expected data for %f2 | |
28561 | .word 0x00000000,0x8ab6ff9c ! Expected data for %f4 | |
28562 | .word 0x00005e27,0x00000000 ! Expected data for %f6 | |
28563 | .word 0xff00b68a,0x00000000 ! Expected data for %f16 | |
28564 | .word 0x00000000,0x00000000 ! Expected data for %f20 | |
28565 | .word 0x00000000,0x00000000 ! Expected data for %f28 | |
28566 | p0_check_pt_data_119: | |
28567 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28568 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
28569 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
28570 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
28571 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28572 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28573 | .word 0xffffffff,0xffffff00 ! Expected data for %l7 | |
28574 | .word 0x000000ff,0x00000000 ! Expected data for %f2 | |
28575 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
28576 | .word 0x00005e27,0x00000000 ! Expected data for %f6 | |
28577 | .word 0xffffffff,0x00000000 ! Expected data for %f10 | |
28578 | .word 0xffffffff,0xffff0000 ! Expected data for %f22 | |
28579 | .word 0x00000000,0x64479a75 ! Expected data for %f24 | |
28580 | .word 0x00000000,0xffff0000 ! Expected data for %f26 | |
28581 | .word 0x00000000,0x00000000 ! Expected data for %f28 | |
28582 | p0_check_pt_data_120: | |
28583 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
28584 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
28585 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
28586 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
28587 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
28588 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
28589 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
28590 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
28591 | .word 0x9cffb68a,0x00000000 ! Expected data for %f0 | |
28592 | .word 0x00000000,0xffffffff ! Expected data for %f2 | |
28593 | .word 0xffffffff,0x000000ff ! Expected data for %f26 | |
28594 | ! Data for Cross Processor Interrupt | |
28595 | .align 8 | |
28596 | received_xintr: | |
28597 | .word 0,0,0,0,0,0,0,0 | |
28598 | .word 0,0,0,0,0,0,0,0 | |
28599 | .word 0,0,0,0,0,0,0,0 | |
28600 | .word 0,0,0,0,0,0,0,0 | |
28601 | .word 0,0,0,0,0,0,0,0 | |
28602 | .word 0,0,0,0,0,0,0,0 | |
28603 | .word 0,0,0,0,0,0,0,0 | |
28604 | .word 0,0,0,0,0,0,0,0 | |
28605 | p0_dispatch_retry: | |
28606 | .word 0,0 | |
28607 | p0_xintr_data: | |
28608 | .word 0x00000000,0x00000001 | |
28609 | .word 0xfe499488,0x23382d91 | |
28610 | .word 0x00000000,0x00000002 | |
28611 | .word 0xa62bd8d7,0xf8eace18 | |
28612 | .word 0x00000000,0x00000003 | |
28613 | .word 0xd5550137,0xe32ced24 | |
28614 | .word 0x00000000,0x00000004 | |
28615 | .word 0x05770fff,0xdefea6a5 | |
28616 | .word 0x00000000,0x00000005 | |
28617 | .word 0x35f4481f,0xe04856c4 | |
28618 | .word 0x00000000,0x00000006 | |
28619 | .word 0x2b979f17,0xf4801ac0 | |
28620 | .word 0x00000000,0x00000007 | |
28621 | .word 0xd018664f,0xc523da2c | |
28622 | .word 0x00000000,0x00000008 | |
28623 | .word 0x2f49fa9f,0xe5489ac8 | |
28624 | .align 8 | |
28625 | p0_xintr_expected: | |
28626 | .word 0 | |
28627 | .align 64 | |
28628 | xintr_data_ptrs: | |
28629 | .word p0_xintr_data | |
28630 | .align 8 | |
28631 | p0_xintr_db: | |
28632 | .skip 512 | |
28633 | p0_xintr_retry_count: | |
28634 | .word 0,0 | |
28635 | p0_reset_cnt: | |
28636 | .word 0 | |
28637 | .align 8 | |
28638 | p0_ec_timing_ctrl: | |
28639 | .word 0,0 | |
28640 | p0_ec_control: | |
28641 | .word 0,0 | |
28642 | p0_mcu_shadow: | |
28643 | .skip 80 | |
28644 | user_data_end: | |
28645 | ||
28646 | ||
28647 | SECTION .p0_local0 DATA_VA=0x000800000 | |
28648 | ||
28649 | attr_data { | |
28650 | Name = .p0_local0, | |
28651 | VA = 0x0000000000800000, | |
28652 | RA = 0x0000000010000000, | |
28653 | PA = ra2pa(0x0000000010000000,0), | |
28654 | part_0_ctx_nonzero_tsb_config_0, | |
28655 | TTE_Context=PCONTEXT, | |
28656 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28657 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28658 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28659 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28660 | } | |
28661 | ||
28662 | .data | |
28663 | .seg "data" | |
28664 | .align 0x2000 | |
28665 | .global p0_local0_start | |
28666 | p0_local0_begin: | |
28667 | .skip 0x1400 | |
28668 | p0_local0_start: | |
28669 | .word 0x127a7bb0,0xc0d9d035,0xd8168e23,0x77aa02f1 | |
28670 | .word 0x799c9206,0x522ea5b3,0xd9876ee7,0xf8d13fed | |
28671 | .word 0x9012a1e5,0xd5706d98,0xfaa3f94d,0xa309ade0 | |
28672 | .word 0xf28a2c5e,0xffb8ffb0,0x362d08c9,0xd7428e9c | |
28673 | p0_local0_end: | |
28674 | ||
28675 | SECTION .p0_local0_sec DATA_VA=0x000800000 | |
28676 | ||
28677 | attr_data { | |
28678 | Name = .p0_local0_sec, | |
28679 | VA = 0x0000000000800000, | |
28680 | RA = 0x0000000030000000, | |
28681 | PA = ra2pa(0x0000000030000000,0), | |
28682 | part_0_ctx_nonzero_tsb_config_0, | |
28683 | TTE_Context=SCONTEXT, | |
28684 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28685 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28686 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28687 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28688 | } | |
28689 | ||
28690 | .data | |
28691 | .seg "data" | |
28692 | .align 0x2000 | |
28693 | .global p0_local0_sec_start | |
28694 | p0_local0_sec_begin: | |
28695 | .skip 0x1400 | |
28696 | p0_local0_sec_start: | |
28697 | .word 0xf8fb85c4,0xcc388e65,0xdfd12e6d,0xb44d4ccc | |
28698 | .word 0x6eef2269,0xf414b062,0xde80a1fb,0xa802c4f3 | |
28699 | .word 0x78ebba96,0x0042da76,0x3cde38fb,0x9256badf | |
28700 | .word 0x90091de8,0x473f0d5e,0x52829564,0x12298feb | |
28701 | p0_local0_sec_end: | |
28702 | ||
28703 | SECTION .p0_local1 DATA_VA=0x000802000 | |
28704 | ||
28705 | attr_data { | |
28706 | Name = .p0_local1, | |
28707 | VA = 0x0000000000802000, | |
28708 | RA = 0x0000000010040000, | |
28709 | PA = ra2pa(0x0000000010040000,0), | |
28710 | part_0_ctx_nonzero_tsb_config_0, | |
28711 | TTE_Context=PCONTEXT, | |
28712 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28713 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28714 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28715 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28716 | } | |
28717 | ||
28718 | .data | |
28719 | .seg "data" | |
28720 | .align 0x2000 | |
28721 | .global p0_local1_start | |
28722 | p0_local1_begin: | |
28723 | .skip 0x1400 | |
28724 | p0_local1_start: | |
28725 | .word 0x9f80462b,0x46bc5e50,0x73a695a6,0x1acb8d6c | |
28726 | .word 0x1c0d0a3c,0x33be1e41,0xca93dcbf,0xe2f66f18 | |
28727 | .word 0x2ce65c7f,0x4d072a78,0x5d7ae4e4,0x33c4a113 | |
28728 | .word 0x4d30c046,0xfff9275e,0x8b0838cb,0x3f787673 | |
28729 | p0_local1_end: | |
28730 | ||
28731 | SECTION .p0_local1_sec DATA_VA=0x000802000 | |
28732 | ||
28733 | attr_data { | |
28734 | Name = .p0_local1_sec, | |
28735 | VA = 0x0000000000802000, | |
28736 | RA = 0x0000000030040000, | |
28737 | PA = ra2pa(0x0000000030040000,0), | |
28738 | part_0_ctx_nonzero_tsb_config_0, | |
28739 | TTE_Context=SCONTEXT, | |
28740 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28741 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28742 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28743 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28744 | } | |
28745 | ||
28746 | .data | |
28747 | .seg "data" | |
28748 | .align 0x2000 | |
28749 | .global p0_local1_sec_start | |
28750 | p0_local1_sec_begin: | |
28751 | .skip 0x1400 | |
28752 | p0_local1_sec_start: | |
28753 | .word 0x012789d9,0x0ac97a0f,0x704b95ff,0xc0974230 | |
28754 | .word 0x5e3760aa,0x49cb5c73,0xc90a8ea5,0x3eec125e | |
28755 | .word 0x0f105c1a,0xed13eb1e,0x3d8bd50d,0x767d008b | |
28756 | .word 0x8ed62c03,0x37e2e09e,0x5205b393,0x20e3dee5 | |
28757 | p0_local1_sec_end: | |
28758 | ||
28759 | SECTION .p0_local2 DATA_VA=0x000804000 | |
28760 | ||
28761 | attr_data { | |
28762 | Name = .p0_local2, | |
28763 | VA = 0x0000000000804000, | |
28764 | RA = 0x0000000010080000, | |
28765 | PA = ra2pa(0x0000000010080000,0), | |
28766 | part_0_ctx_nonzero_tsb_config_0, | |
28767 | TTE_Context=PCONTEXT, | |
28768 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28769 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28770 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28771 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28772 | } | |
28773 | ||
28774 | .data | |
28775 | .seg "data" | |
28776 | .align 0x2000 | |
28777 | .global p0_local2_start | |
28778 | p0_local2_begin: | |
28779 | .skip 0x1400 | |
28780 | p0_local2_start: | |
28781 | .word 0xad222174,0xe3e1f5ad,0x427c860f,0xfba6eeaf | |
28782 | .word 0x90f1b22e,0x0b47e6c3,0x1afa3d2e,0x4dde7717 | |
28783 | .word 0x9796d5b8,0x5ea4f686,0x7aa1e7c6,0xd985067a | |
28784 | .word 0xd034c7dc,0x32c3ea98,0x5596f2aa,0x955bb11c | |
28785 | p0_local2_end: | |
28786 | ||
28787 | SECTION .p0_local2_sec DATA_VA=0x000804000 | |
28788 | ||
28789 | attr_data { | |
28790 | Name = .p0_local2_sec, | |
28791 | VA = 0x0000000000804000, | |
28792 | RA = 0x0000000030080000, | |
28793 | PA = ra2pa(0x0000000030080000,0), | |
28794 | part_0_ctx_nonzero_tsb_config_0, | |
28795 | TTE_Context=SCONTEXT, | |
28796 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28797 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28798 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28799 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28800 | } | |
28801 | ||
28802 | .data | |
28803 | .seg "data" | |
28804 | .align 0x2000 | |
28805 | .global p0_local2_sec_start | |
28806 | p0_local2_sec_begin: | |
28807 | .skip 0x1400 | |
28808 | p0_local2_sec_start: | |
28809 | .word 0x4fc9aa51,0x84a61fd2,0x1f90ce66,0x8a708a3a | |
28810 | .word 0x772f5de4,0xfb7e5707,0x1d825880,0x5e067d5a | |
28811 | .word 0x06d37253,0x8e2d6ade,0x578bd2d3,0xc3fce2e3 | |
28812 | .word 0x0a06c0b1,0xc0dc16be,0x4b20c2b8,0x480207d9 | |
28813 | p0_local2_sec_end: | |
28814 | ||
28815 | SECTION .p0_local3 DATA_VA=0x000806000 | |
28816 | ||
28817 | attr_data { | |
28818 | Name = .p0_local3, | |
28819 | VA = 0x0000000000806000, | |
28820 | RA = 0x00000000100c0000, | |
28821 | PA = ra2pa(0x00000000100c0000,0), | |
28822 | part_0_ctx_nonzero_tsb_config_0, | |
28823 | TTE_Context=PCONTEXT, | |
28824 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28825 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28826 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28827 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28828 | } | |
28829 | ||
28830 | .data | |
28831 | .seg "data" | |
28832 | .align 0x2000 | |
28833 | .global p0_local3_start | |
28834 | p0_local3_begin: | |
28835 | .skip 0x1400 | |
28836 | p0_local3_start: | |
28837 | .word 0x3f746fa4,0xef2c740a,0x3ba4a6ce,0x6d1dd03f | |
28838 | .word 0x4e424342,0x377d1d25,0xb4b2c9e5,0xcd516cdb | |
28839 | .word 0x25a4a400,0x81924473,0x82183f12,0x58460382 | |
28840 | .word 0x36f9e0d2,0x40a3c37e,0xcc6a42fc,0x9fa18714 | |
28841 | p0_local3_end: | |
28842 | ||
28843 | SECTION .p0_local3_sec DATA_VA=0x000806000 | |
28844 | ||
28845 | attr_data { | |
28846 | Name = .p0_local3_sec, | |
28847 | VA = 0x0000000000806000, | |
28848 | RA = 0x00000000300c0000, | |
28849 | PA = ra2pa(0x00000000300c0000,0), | |
28850 | part_0_ctx_nonzero_tsb_config_0, | |
28851 | TTE_Context=SCONTEXT, | |
28852 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28853 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28854 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28855 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28856 | } | |
28857 | ||
28858 | .data | |
28859 | .seg "data" | |
28860 | .align 0x2000 | |
28861 | .global p0_local3_sec_start | |
28862 | p0_local3_sec_begin: | |
28863 | .skip 0x1400 | |
28864 | p0_local3_sec_start: | |
28865 | .word 0x55423bc3,0xce11cceb,0xc91efda2,0xc9bcefe4 | |
28866 | .word 0x22801dd2,0xcf2a6d67,0xb5238e48,0x1293fe50 | |
28867 | .word 0xfaac1c9c,0xb16e901c,0x32e87f5a,0x30df3e11 | |
28868 | .word 0xc2ff6960,0xc79a7436,0x28dd7ee6,0x855a539c | |
28869 | p0_local3_sec_end: | |
28870 | ||
28871 | SECTION .p0_local4 DATA_VA=0x000808000 | |
28872 | ||
28873 | attr_data { | |
28874 | Name = .p0_local4, | |
28875 | VA = 0x0000000000808000, | |
28876 | RA = 0x0000000010100000, | |
28877 | PA = ra2pa(0x0000000010100000,0), | |
28878 | part_0_ctx_nonzero_tsb_config_0, | |
28879 | TTE_Context=PCONTEXT, | |
28880 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28881 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28882 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28883 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28884 | } | |
28885 | ||
28886 | .data | |
28887 | .seg "data" | |
28888 | .align 0x2000 | |
28889 | .global p0_local4_start | |
28890 | p0_local4_begin: | |
28891 | .skip 0x1400 | |
28892 | p0_local4_start: | |
28893 | .word 0x400ece08,0xbc4ed19b,0x84db1893,0x90a350b0 | |
28894 | .word 0x5a438fc8,0x377bfc9c,0xe4fae13a,0xbae3267a | |
28895 | .word 0x53e63730,0xaa2bd2c4,0xb1484755,0xe3252576 | |
28896 | .word 0x1b814de4,0x6a895e31,0x5327c837,0x171eac14 | |
28897 | p0_local4_end: | |
28898 | ||
28899 | SECTION .p0_local4_sec DATA_VA=0x000808000 | |
28900 | ||
28901 | attr_data { | |
28902 | Name = .p0_local4_sec, | |
28903 | VA = 0x0000000000808000, | |
28904 | RA = 0x0000000030100000, | |
28905 | PA = ra2pa(0x0000000030100000,0), | |
28906 | part_0_ctx_nonzero_tsb_config_0, | |
28907 | TTE_Context=SCONTEXT, | |
28908 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28909 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28910 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28911 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28912 | } | |
28913 | ||
28914 | .data | |
28915 | .seg "data" | |
28916 | .align 0x2000 | |
28917 | .global p0_local4_sec_start | |
28918 | p0_local4_sec_begin: | |
28919 | .skip 0x1400 | |
28920 | p0_local4_sec_start: | |
28921 | .word 0x2b0afc76,0x9636898b,0xdaf9d8af,0x8d3caeae | |
28922 | .word 0x62568d72,0xd776c049,0x5e9e1157,0x6b6c2202 | |
28923 | .word 0x3bedac39,0xd81a5b92,0xc78091bb,0x759a4764 | |
28924 | .word 0xfac65f36,0x9ce0b68a,0x46ee6de4,0xc49410cd | |
28925 | p0_local4_sec_end: | |
28926 | ||
28927 | SECTION .p0_local5 DATA_VA=0x00080a000 | |
28928 | ||
28929 | attr_data { | |
28930 | Name = .p0_local5, | |
28931 | VA = 0x000000000080a000, | |
28932 | RA = 0x0000000010140000, | |
28933 | PA = ra2pa(0x0000000010140000,0), | |
28934 | part_0_ctx_nonzero_tsb_config_0, | |
28935 | TTE_Context=PCONTEXT, | |
28936 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28937 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28938 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28939 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28940 | } | |
28941 | ||
28942 | .data | |
28943 | .seg "data" | |
28944 | .align 0x2000 | |
28945 | .global p0_local5_start | |
28946 | p0_local5_begin: | |
28947 | .skip 0x1400 | |
28948 | p0_local5_start: | |
28949 | .word 0x8a11f7ce,0x1748fc23,0xc03c56b3,0xc681f136 | |
28950 | .word 0xf36855fb,0xa9619e92,0x1a1bfb62,0x9236627b | |
28951 | .word 0x1651b55b,0x7a9afc2a,0x7d2a31b6,0x83508fd6 | |
28952 | .word 0x7e79ac25,0x888dca7a,0xe13bcdbf,0xd6f06643 | |
28953 | p0_local5_end: | |
28954 | ||
28955 | SECTION .p0_local5_sec DATA_VA=0x00080a000 | |
28956 | ||
28957 | attr_data { | |
28958 | Name = .p0_local5_sec, | |
28959 | VA = 0x000000000080a000, | |
28960 | RA = 0x0000000030140000, | |
28961 | PA = ra2pa(0x0000000030140000,0), | |
28962 | part_0_ctx_nonzero_tsb_config_0, | |
28963 | TTE_Context=SCONTEXT, | |
28964 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28965 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28966 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28967 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28968 | } | |
28969 | ||
28970 | .data | |
28971 | .seg "data" | |
28972 | .align 0x2000 | |
28973 | .global p0_local5_sec_start | |
28974 | p0_local5_sec_begin: | |
28975 | .skip 0x1400 | |
28976 | p0_local5_sec_start: | |
28977 | .word 0xb8902d80,0x9601ff8b,0xba8a98d7,0xae6e0959 | |
28978 | .word 0x624810c0,0x5d2f4385,0x16d6ce81,0x6a6a89be | |
28979 | .word 0x2f13f88e,0xb83cf293,0xc9db2797,0x4929e3d1 | |
28980 | .word 0x016c83ca,0xe1f643c5,0x11b07fb2,0x4b34ff17 | |
28981 | p0_local5_sec_end: | |
28982 | ||
28983 | SECTION .p0_local6 DATA_VA=0x00080c000 | |
28984 | ||
28985 | attr_data { | |
28986 | Name = .p0_local6, | |
28987 | VA = 0x000000000080c000, | |
28988 | RA = 0x0000000010180000, | |
28989 | PA = ra2pa(0x0000000010180000,0), | |
28990 | part_0_ctx_nonzero_tsb_config_0, | |
28991 | TTE_Context=PCONTEXT, | |
28992 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
28993 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
28994 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
28995 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
28996 | } | |
28997 | ||
28998 | .data | |
28999 | .seg "data" | |
29000 | .align 0x2000 | |
29001 | .global p0_local6_start | |
29002 | p0_local6_begin: | |
29003 | .skip 0x1400 | |
29004 | p0_local6_start: | |
29005 | .word 0x936d694e,0xa7b42406,0x9c96eb64,0xe5468a58 | |
29006 | .word 0x4f57f82b,0xcb181e67,0xad7f7f1e,0xf9cf50c9 | |
29007 | .word 0x2b563b4d,0x4e02bb90,0xc5b9f166,0xe0da5a81 | |
29008 | .word 0xb367518c,0xe0db4e1a,0xd3c7ed6f,0x811142d1 | |
29009 | p0_local6_end: | |
29010 | ||
29011 | SECTION .p0_local6_sec DATA_VA=0x00080c000 | |
29012 | ||
29013 | attr_data { | |
29014 | Name = .p0_local6_sec, | |
29015 | VA = 0x000000000080c000, | |
29016 | RA = 0x0000000030180000, | |
29017 | PA = ra2pa(0x0000000030180000,0), | |
29018 | part_0_ctx_nonzero_tsb_config_0, | |
29019 | TTE_Context=SCONTEXT, | |
29020 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
29021 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
29022 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
29023 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
29024 | } | |
29025 | ||
29026 | .data | |
29027 | .seg "data" | |
29028 | .align 0x2000 | |
29029 | .global p0_local6_sec_start | |
29030 | p0_local6_sec_begin: | |
29031 | .skip 0x1400 | |
29032 | p0_local6_sec_start: | |
29033 | .word 0x28a369b4,0x7ffff583,0x3a5b71f7,0xf3ba531c | |
29034 | .word 0xee589899,0xa3ab1f6f,0x79d47728,0x22c19623 | |
29035 | .word 0xfec3a1b4,0x2697841b,0xeee6fcb5,0xed8440cc | |
29036 | .word 0x86e1d243,0xae14ad00,0xe7689938,0xcae660d1 | |
29037 | p0_local6_sec_end: | |
29038 | ||
29039 | SECTION .share0 DATA_VA=0x00080e000 | |
29040 | ||
29041 | attr_data { | |
29042 | Name = .share0, | |
29043 | VA = 0x000000000080e000, | |
29044 | RA = 0x00000000201c0000, | |
29045 | PA = ra2pa(0x00000000201c0000,0), | |
29046 | part_0_ctx_nonzero_tsb_config_0, | |
29047 | TTE_Context=PCONTEXT, | |
29048 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
29049 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
29050 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
29051 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
29052 | } | |
29053 | ||
29054 | .data | |
29055 | .seg "data" | |
29056 | .align 0x2000 | |
29057 | .global share0_start | |
29058 | share0_begin: | |
29059 | share0_start: | |
29060 | .word 0x419f1669,0xe0a8ae84,0x480f4710,0x7b105e83 | |
29061 | .word 0x3edd27e4,0xf88bb520,0x50070c8a,0x579e0d42 | |
29062 | .word 0x9c19b276,0xc16a2219,0xf4c4c1da,0xeaba29ad | |
29063 | .word 0xca259cec,0xa144b9b0,0x6fefe1ff,0x34babc50 | |
29064 | share0_end: | |
29065 | ||
29066 | SECTION .share1 DATA_VA=0x000810000 | |
29067 | ||
29068 | attr_data { | |
29069 | Name = .share1, | |
29070 | VA = 0x0000000000810000, | |
29071 | RA = 0x0000000020800000, | |
29072 | PA = ra2pa(0x0000000020800000,0), | |
29073 | part_0_ctx_nonzero_tsb_config_0, | |
29074 | TTE_Context=PCONTEXT, | |
29075 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
29076 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
29077 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
29078 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
29079 | } | |
29080 | ||
29081 | .data | |
29082 | .seg "data" | |
29083 | .align 0x2000 | |
29084 | .global share1_start | |
29085 | share1_begin: | |
29086 | share1_start: | |
29087 | .word 0x6f750db6,0xcceb42c9,0x3b448c34,0x51a61a0f | |
29088 | .word 0xfc7f375e,0x332215a5,0x7f896672,0x2fc38107 | |
29089 | .word 0xc2a68005,0xc64ed6b4,0x7d0f8346,0xbf36d0fc | |
29090 | .word 0x3e9e64ce,0x0daf2736,0xe5ff1e4e,0x409dd5b7 | |
29091 | .word 0x97c09ffa,0xee7bc3ca,0xb0d0114d,0x4d998307 | |
29092 | .word 0x443e1728,0xa9c0b7d4,0x9c69a293,0xf9c3d983 | |
29093 | .word 0xced5bcdb,0x5fea6277,0x27de3d78,0xf99a7ef3 | |
29094 | .word 0x6443fea1,0x296c76d4,0x93fe13ef,0xd4874f74 | |
29095 | share1_end: | |
29096 | ||
29097 | SECTION .share2 DATA_VA=0x000812000 | |
29098 | ||
29099 | attr_data { | |
29100 | Name = .share2, | |
29101 | VA = 0x0000000000812000, | |
29102 | RA = 0x00000000211c0000, | |
29103 | PA = ra2pa(0x00000000211c0000,0), | |
29104 | part_0_ctx_nonzero_tsb_config_0, | |
29105 | TTE_Context=PCONTEXT, | |
29106 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
29107 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
29108 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
29109 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
29110 | } | |
29111 | ||
29112 | .data | |
29113 | .seg "data" | |
29114 | .align 0x2000 | |
29115 | .global share2_start | |
29116 | share2_begin: | |
29117 | share2_start: | |
29118 | .word 0x64ddfe0c,0xa654e638,0x91e16a18,0x70f78b44 | |
29119 | .word 0xac03868b,0xac29a23b,0xb77a60f3,0x6e6ec4f7 | |
29120 | .word 0x1062bc55,0x47dc1650,0x8f1cf0e2,0x15245273 | |
29121 | .word 0xa995bf6d,0x89f5e893,0x260f1bf3,0x54663646 | |
29122 | share2_end: | |
29123 | ||
29124 | SECTION .share3 DATA_VA=0x000814000 | |
29125 | ||
29126 | attr_data { | |
29127 | Name = .share3, | |
29128 | VA = 0x0000000000814000, | |
29129 | RA = 0x0000000021800000, | |
29130 | PA = ra2pa(0x0000000021800000,0), | |
29131 | part_0_ctx_nonzero_tsb_config_0, | |
29132 | TTE_Context=PCONTEXT, | |
29133 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
29134 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
29135 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
29136 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
29137 | } | |
29138 | ||
29139 | .data | |
29140 | .seg "data" | |
29141 | .align 0x2000 | |
29142 | .global share3_start | |
29143 | share3_begin: | |
29144 | share3_start: | |
29145 | .word 0xd9f29a65,0x86f860f8,0x5ba3b11d,0x2f47419e | |
29146 | .word 0x9f3a17d5,0x1f050687,0xa23652b7,0xb0ca66d8 | |
29147 | .word 0x1e66e12c,0xabbfe959,0xc8a4914c,0x14770412 | |
29148 | .word 0x89a6cd74,0x978d1477,0xdab16bcc,0x2beb15a7 | |
29149 | .word 0xf3845e5c,0xa84deb0f,0x7cf2f23d,0x7cc23182 | |
29150 | .word 0x1e564a86,0xf2f528db,0xa373b907,0x29485bc9 | |
29151 | .word 0xf0a391dc,0x5d4f1502,0x175e084f,0x292c7a82 | |
29152 | .word 0x5f67959a,0xe039ad2b,0x704fdc97,0xe0f4d379 | |
29153 | .word 0x31a00b33,0xb3a0d66c,0xf3fa5f76,0xdc9d5ba2 | |
29154 | .word 0xdae9aad7,0x6f7d055a,0x875534b1,0x06969332 | |
29155 | .word 0xa7d89be6,0x73ce7d16,0xbc1241c9,0xaeef3418 | |
29156 | .word 0x8e910c32,0x206c9eab,0x6e7f0417,0x7d9a953c | |
29157 | .word 0x8ae24e2c,0xfd3559fa,0xc13820f7,0x25471c9f | |
29158 | .word 0xbb71a27a,0x4a5b7d2d,0x6e97287c,0x9593ddb9 | |
29159 | .word 0x78fd5db3,0xa6127237,0x5a155e08,0x45ebfcc1 | |
29160 | .word 0xbaaac354,0x3d4fe603,0xa51a4150,0xe86d4435 | |
29161 | .word 0x610e39e7,0x8b87a19f,0x06616beb,0xab3942ed | |
29162 | .word 0xb8334997,0x44ad7c52,0xd6238af9,0x445662f6 | |
29163 | .word 0x1397a6db,0x86ec5249,0xb67d123d,0xd000d61d | |
29164 | .word 0x997271b6,0xbf6bbfbc,0x4f1580df,0xaba1dd43 | |
29165 | .word 0x5b30f8a0,0x4201b5e5,0x10e28600,0x487fc632 | |
29166 | .word 0x599becec,0xebd520aa,0xdd4e9c4f,0xd75cf531 | |
29167 | .word 0xb683366e,0xd6a20e2d,0x94a61ea5,0x6132bebd | |
29168 | .word 0x7fa4c40a,0xde33e002,0xf62b226b,0xc9c23a90 | |
29169 | .word 0xe2cfdb07,0xc6b4ca97,0xa42a9247,0x986e079e | |
29170 | .word 0x8742924d,0x9f56a678,0xae3a2109,0x46211c47 | |
29171 | .word 0x3a50ef44,0x51dde5c3,0x55a3461f,0xfe7598c6 | |
29172 | .word 0x372b3259,0x6906bf93,0x8c331eee,0xac955e70 | |
29173 | .word 0x4a8afa38,0xc60e0e5d,0xeec72511,0xb93a9c92 | |
29174 | .word 0x2c6b5fa4,0x5f02fd7b,0x57e15614,0xb3f23485 | |
29175 | .word 0x19237358,0x9de61be2,0x1c78e548,0x020317a1 | |
29176 | .word 0xf92fcbd1,0x74446f86,0x65d2ee18,0xd2468014 | |
29177 | share3_end: |