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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: mpgen_8000l.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | ! Niagara2 UP Random Test | |
39 | ! Seed = 326120847 | |
40 | ! Riesling can be on | |
41 | ! 1 Thread, 8000 lines | |
42 | ! mpgen created on Dec 20, 2005 (16:35:03) | |
43 | ! mpgen_8000l.s created on Mar 26, 2009 (12:08:47) | |
44 | ! RC file : vij_noretry.rc | |
45 | ! cmd = /import/n2-tools/release/tools/mpgen/mpgen,1.051220 -rc vij_noretry.rc -o mpgen_8000l -p 1 -l 8000 | |
46 | ||
47 | #define H_HT0_Hw_Corrected_Error_0x63 hw_corrected_error_handler | |
48 | ||
49 | #define MAIN_PAGE_NUCLEUS_ALSO | |
50 | #define MAIN_PAGE_HV_ALSO | |
51 | #define N_CPUS 1 | |
52 | #define ENABLE_T0_Fp_exception_ieee_754_0x21 | |
53 | #define ENABLE_T0_Fp_exception_other_0x22 | |
54 | #define ENABLE_T0_Fp_disabled_0x20 | |
55 | #define ENABLE_T0_Illegal_instruction_0x10 | |
56 | #define ENABLE_T1_Illegal_instruction_0x10 | |
57 | #define ENABLE_HT0_Illegal_instruction_0x10 | |
58 | #define ENABLE_HT1_Illegal_instruction_0x10 | |
59 | #define ENABLE_T0_Clean_Window_0x24 | |
60 | #define THREAD_COUNT 1 | |
61 | #define THREAD_STRIDE 1 | |
62 | #define SKIP_TRAPCHECK | |
63 | #define USE_MPGEN_TRAPS | |
64 | ||
65 | #include "hboot.s" | |
66 | ||
67 | .text | |
68 | .global main | |
69 | main: | |
70 | ||
71 | ! Random code for Processor 0 | |
72 | ||
73 | processor_0: | |
74 | ta T_CHANGE_PRIV | |
75 | wrpr %g0,7,%cleanwin | |
76 | call p0_init_memory_pointers | |
77 | wr %g0,0x80,%asi ! Setting default asi to 80 | |
78 | ||
79 | ! Initialize the floating point registers for processor 0 | |
80 | ||
81 | wr %g0,0x4,%fprs ! Make sure fef is 1 | |
82 | set p0_init_freg,%g1 | |
83 | ! %f0 = 52bd2a08 e7dca4ad ad96aaab 51f9a49a | |
84 | ! %f4 = 0e39f730 d77b0e51 56fe427e 7d307e94 | |
85 | ! %f8 = 2c892a47 8cc97409 9c5199ef 8dbf4312 | |
86 | ! %f12 = 0723192a cb509b01 2a60f72b c2f8101a | |
87 | ldda [%g1]ASI_BLK_P,%f0 | |
88 | add %g1,64,%g1 | |
89 | ! %f16 = be3385c9 9783a018 50b85688 7dd8d224 | |
90 | ! %f20 = fcc4c676 35b08349 13e24ca8 7533e78f | |
91 | ! %f24 = 30bf20e2 13de5d10 c669c7f2 54545c27 | |
92 | ! %f28 = 7a2e5168 80182efa 7023d8e9 44a3d8e7 | |
93 | ldda [%g1]ASI_BLK_P,%f16 | |
94 | add %g1,64,%g1 | |
95 | ! %f32 = 200cb45c daf95407 4dbd3c52 55bf5d9c | |
96 | ! %f36 = 4fcf2e80 156588dd ab7c74a3 d501bd77 | |
97 | ! %f40 = 4b9b25a5 a54cf597 6fc3f3aa d2a8e3f3 | |
98 | ! %f44 = 8afb4846 43bd41a6 f0811e62 50e01762 | |
99 | ldda [%g1]ASI_BLK_P,%f32 | |
100 | ||
101 | ! Set up the Graphics Status Register | |
102 | ||
103 | setx 0x7f7db8a00000001f,%g7,%g1 ! GSR scale = 3, align = 7 | |
104 | wr %g1,%g0,%gsr ! GSR = 7f7db8a00000001f | |
105 | wr %g0,%y ! Clear Y register | |
106 | xorcc %g0,%g0,%g3 ! init %g3 and set flags | |
107 | membar #Sync ! Force the block loads to complete | |
108 | ||
109 | ba,a p0_not_taken_0_end | |
110 | p0_not_taken_0: | |
111 | ! The following code should not be executed | |
112 | ba,a p0_branch_failed | |
113 | p0_not_taken_0_end: | |
114 | ||
115 | ||
116 | ! Start of Random Code for processor 0 | |
117 | ||
118 | p0_label_1: | |
119 | ! %l2 = f752ba38, %l3 = 01a3a7b6, Mem[0000000010101430] = b7986e83 8b9a7233 | |
120 | stda %l2,[%i4+0x030]%asi ! Mem[0000000010101430] = f752ba38 01a3a7b6 | |
121 | ! %l5 = 904617026e9c2c11, Mem[00000000100c1408] = f6ea14ce020bf863 | |
122 | stxa %l5,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 904617026e9c2c11 | |
123 | ! %f3 = 51f9a49a, Mem[0000000030101400] = a83299e3 | |
124 | sta %f3 ,[%i4+%g0]0x89 ! Mem[0000000030101400] = 51f9a49a | |
125 | ! Mem[00000000100c1408] = 90461702, %l6 = 8e51e0d9ecb2d6a7 | |
126 | swapa [%i3+%o4]0x80,%l6 ! %l6 = 0000000090461702 | |
127 | ! Mem[0000000030081408] = 69976ba3 7b1c40d4, %l0 = 76e0f9a4, %l1 = 647ec0fa | |
128 | ldda [%i2+%o4]0x81,%l0 ! %l0 = 0000000069976ba3 000000007b1c40d4 | |
129 | ! %f0 = 52bd2a08 e7dca4ad, Mem[0000000030141400] = 433d2b76 9c3a0752 | |
130 | stda %f0 ,[%i5+%g0]0x81 ! Mem[0000000030141400] = 52bd2a08 e7dca4ad | |
131 | ! Mem[00000000201c0000] = 682b9457, %l6 = 0000000090461702 | |
132 | ldstub [%o0+%g0],%l6 ! %l6 = 00000068000000ff | |
133 | ! Mem[0000000010001400] = fadc9dd9, %l6 = 0000000000000068 | |
134 | swapa [%i0+%g0]0x80,%l6 ! %l6 = 00000000fadc9dd9 | |
135 | ! %l3 = b95586e601a3a7b6, Mem[0000000030141410] = e9c270a2a9477d1e | |
136 | stxa %l3,[%i5+%o5]0x81 ! Mem[0000000030141410] = b95586e601a3a7b6 | |
137 | ! Starting 10 instruction Store Burst | |
138 | ! %l2 = 1f1c6cb7f752ba38, Mem[0000000010141408] = 1058da2a | |
139 | stba %l2,[%i5+%o4]0x80 ! Mem[0000000010141408] = 3858da2a | |
140 | ||
141 | p0_label_2: | |
142 | ! Mem[00000000100c1410] = 54631bda, %l0 = 69976ba3, %l4 = 61d03f54 | |
143 | add %i3,0x10,%g1 | |
144 | casa [%g1]0x80,%l0,%l4 ! %l4 = 0000000054631bda | |
145 | ! %l3 = b95586e601a3a7b6, Mem[0000000010181410] = 1774aa74 | |
146 | stwa %l3,[%i6+%o5]0x88 ! Mem[0000000010181410] = 01a3a7b6 | |
147 | ! %f14 = 2a60f72b c2f8101a, %l1 = 000000007b1c40d4 | |
148 | ! Mem[0000000030081420] = 28dad480d2eb7d3e | |
149 | add %i2,0x020,%g1 | |
150 | stda %f14,[%g1+%l1]ASI_PST8_SL ! Mem[0000000030081420] = 28daf8802beb602a | |
151 | ! %l6 = fadc9dd9, %l7 = 19778174, Mem[0000000030041410] = 48c627eb 04997555 | |
152 | stda %l6,[%i1+%o5]0x89 ! Mem[0000000030041410] = fadc9dd9 19778174 | |
153 | ! %f4 = 0e39f730 d77b0e51, Mem[0000000030101410] = dfb96bc4 db36fb15 | |
154 | stda %f4 ,[%i4+%o5]0x81 ! Mem[0000000030101410] = 0e39f730 d77b0e51 | |
155 | ! %f28 = 7a2e5168 80182efa, Mem[0000000010141410] = 868bb8a9 9b5e2930 | |
156 | stda %f28,[%i5+%o5]0x88 ! Mem[0000000010141410] = 7a2e5168 80182efa | |
157 | ! Mem[0000000010141410] = 80182efa, %l7 = 5e5ae6f219778174 | |
158 | swapa [%i5+%o5]0x88,%l7 ! %l7 = 0000000080182efa | |
159 | ! Mem[0000000030001408] = 67f196a1, %l4 = 0000000054631bda | |
160 | ldstuba [%i0+%o4]0x81,%l4 ! %l4 = 00000067000000ff | |
161 | ! %f20 = fcc4c676, Mem[0000000010041400] = c605e54a | |
162 | st %f20,[%i1+%g0] ! Mem[0000000010041400] = fcc4c676 | |
163 | ! Starting 10 instruction Load Burst | |
164 | ! Mem[0000000010081408] = dfc18dfe, %f27 = 54545c27 | |
165 | lda [%i2+%o4]0x80,%f27 ! %f27 = dfc18dfe | |
166 | ||
167 | p0_label_3: | |
168 | ! Mem[0000000010181410] = b6a7a301, %l5 = 904617026e9c2c11 | |
169 | ldswa [%i6+%o5]0x80,%l5 ! %l5 = ffffffffb6a7a301 | |
170 | ! Mem[0000000021800080] = 74d6a433, %l5 = ffffffffb6a7a301 | |
171 | lduh [%o3+0x080],%l5 ! %l5 = 00000000000074d6 | |
172 | ! %l5 = 00000000000074d6, %l7 = 0000000080182efa, %l1 = 000000007b1c40d4 | |
173 | xnor %l5,%l7,%l1 ! %l1 = ffffffff7fe7a5d3 | |
174 | ! Mem[0000000030101408] = e69a234e, %l6 = 00000000fadc9dd9 | |
175 | ldswa [%i4+%o4]0x89,%l6 ! %l6 = ffffffffe69a234e | |
176 | ! Mem[0000000010181408] = b23ce724, %l7 = 0000000080182efa | |
177 | ldswa [%i6+%o4]0x88,%l7 ! %l7 = ffffffffb23ce724 | |
178 | ! Mem[0000000030001408] = a196f1ff, %l6 = ffffffffe69a234e | |
179 | lduwa [%i0+%o4]0x89,%l6 ! %l6 = 00000000a196f1ff | |
180 | ! Mem[0000000010041420] = a504591a, %l3 = b95586e601a3a7b6 | |
181 | ldsb [%i1+0x023],%l3 ! %l3 = 000000000000001a | |
182 | ! Mem[0000000030101408] = 4e239ae6, %l1 = ffffffff7fe7a5d3 | |
183 | ldsba [%i4+%o4]0x81,%l1 ! %l1 = 000000000000004e | |
184 | ! Mem[0000000030101400] = 9aa4f951, %l2 = 1f1c6cb7f752ba38 | |
185 | lduha [%i4+%g0]0x81,%l2 ! %l2 = 0000000000009aa4 | |
186 | ! Starting 10 instruction Store Burst | |
187 | ! Mem[0000000010041428] = 03083a4b18519713, %l7 = ffffffffb23ce724, %l0 = 0000000069976ba3 | |
188 | add %i1,0x28,%g1 | |
189 | casxa [%g1]0x80,%l7,%l0 ! %l0 = 03083a4b18519713 | |
190 | ||
191 | p0_label_4: | |
192 | ! %l6 = a196f1ff, %l7 = b23ce724, Mem[0000000010081420] = 27c90ee2 f7ec83bb | |
193 | std %l6,[%i2+0x020] ! Mem[0000000010081420] = a196f1ff b23ce724 | |
194 | ! Mem[0000000010101410] = 6bdd789c, %l5 = 00000000000074d6 | |
195 | swapa [%i4+%o5]0x80,%l5 ! %l5 = 000000006bdd789c | |
196 | ! %f10 = 9c5199ef 8dbf4312, %l3 = 000000000000001a | |
197 | ! Mem[0000000030141420] = d9417db2badad443 | |
198 | add %i5,0x020,%g1 | |
199 | stda %f10,[%g1+%l3]ASI_PST16_S ! Mem[0000000030141420] = 9c517db28dbfd443 | |
200 | ! %l6 = 00000000a196f1ff, Mem[0000000010041410] = 3262779f | |
201 | stha %l6,[%i1+%o5]0x88 ! Mem[0000000010041410] = 3262f1ff | |
202 | ! %l7 = ffffffffb23ce724, Mem[0000000030081408] = 69976ba37b1c40d4 | |
203 | stxa %l7,[%i2+%o4]0x81 ! Mem[0000000030081408] = ffffffffb23ce724 | |
204 | ! Mem[0000000010041420] = a504591a, %l3 = 000000000000001a | |
205 | swap [%i1+0x020],%l3 ! %l3 = 00000000a504591a | |
206 | ! %f14 = 2a60f72b c2f8101a, %l2 = 0000000000009aa4 | |
207 | ! Mem[0000000010101438] = e96893a4b9cc7274 | |
208 | add %i4,0x038,%g1 | |
209 | stda %f14,[%g1+%l2]ASI_PST16_PL ! Mem[0000000010101438] = e96893a42bf77274 | |
210 | ! %l1 = 000000000000004e, Mem[0000000030041410] = d99ddcfa | |
211 | stba %l1,[%i1+%o5]0x81 ! Mem[0000000030041410] = 4e9ddcfa | |
212 | ! %l7 = ffffffffb23ce724, Mem[00000000100c1408] = a7d6b2ec | |
213 | stba %l7,[%i3+%o4]0x88 ! Mem[00000000100c1408] = a7d6b224 | |
214 | ! Starting 10 instruction Load Burst | |
215 | ! Mem[0000000030181408] = 3d0f4f09, %f25 = 13de5d10 | |
216 | lda [%i6+%o4]0x81,%f25 ! %f25 = 3d0f4f09 | |
217 | ||
218 | p0_label_5: | |
219 | ! Mem[0000000010001410] = 7ff18310, %l0 = 03083a4b18519713 | |
220 | lduwa [%i0+%o5]0x80,%l0 ! %l0 = 000000007ff18310 | |
221 | ! Mem[00000000100c1420] = 4436ac72, %l2 = 0000000000009aa4 | |
222 | ldsb [%i3+0x021],%l2 ! %l2 = 0000000000000036 | |
223 | ! Mem[0000000030181410] = 14a42e74, %l2 = 0000000000000036 | |
224 | lduba [%i6+%o5]0x81,%l2 ! %l2 = 0000000000000014 | |
225 | ! Mem[0000000030101408] = 4e239ae6, %l6 = 00000000a196f1ff | |
226 | ldswa [%i4+%o4]0x81,%l6 ! %l6 = 000000004e239ae6 | |
227 | ! Mem[0000000030041410] = 4e9ddcfa, %l4 = 0000000000000067 | |
228 | lduha [%i1+%o5]0x81,%l4 ! %l4 = 0000000000004e9d | |
229 | ! Mem[00000000100c1408] = 24b2d6a7, %f12 = 0723192a | |
230 | lda [%i3+%o4]0x80,%f12 ! %f12 = 24b2d6a7 | |
231 | ! Mem[0000000010101408] = f2f43560d244b274, %f2 = ad96aaab 51f9a49a | |
232 | ldd [%i4+%o4],%f2 ! %f2 = f2f43560 d244b274 | |
233 | ! Mem[0000000030081410] = 7e00650ae239da63, %f12 = 24b2d6a7 cb509b01 | |
234 | ldda [%i2+%o5]0x89,%f12 ! %f12 = 7e00650a e239da63 | |
235 | ! Mem[0000000030001400] = db7e6dd747c758ea, %f30 = 7023d8e9 44a3d8e7 | |
236 | ldda [%i0+%g0]0x89,%f30 ! %f30 = db7e6dd7 47c758ea | |
237 | ! Starting 10 instruction Store Burst | |
238 | ! %f6 = 56fe427e 7d307e94, %l2 = 0000000000000014 | |
239 | ! Mem[00000000100c1410] = 54631bdaa57cc117 | |
240 | add %i3,0x010,%g1 | |
241 | stda %f6,[%g1+%l2]ASI_PST8_PL ! Mem[00000000100c1410] = 546330da7e7cc117 | |
242 | ||
243 | ! Check Point 1 for processor 0 | |
244 | ||
245 | set p0_check_pt_data_1,%g4 | |
246 | rd %ccr,%g5 ! %g5 = 44 | |
247 | ldx [%g4+0x08],%g2 | |
248 | cmp %l0,%g2 ! %l0 = 000000007ff18310 | |
249 | bne %xcc,p0_reg_check_fail0 | |
250 | mov 0xee0,%g1 | |
251 | ldx [%g4+0x10],%g2 | |
252 | cmp %l1,%g2 ! %l1 = 000000000000004e | |
253 | bne %xcc,p0_reg_check_fail1 | |
254 | mov 0xee1,%g1 | |
255 | ldx [%g4+0x18],%g2 | |
256 | cmp %l2,%g2 ! %l2 = 0000000000000014 | |
257 | bne %xcc,p0_reg_check_fail2 | |
258 | mov 0xee2,%g1 | |
259 | ldx [%g4+0x20],%g2 | |
260 | cmp %l3,%g2 ! %l3 = 00000000a504591a | |
261 | bne %xcc,p0_reg_check_fail3 | |
262 | mov 0xee3,%g1 | |
263 | ldx [%g4+0x28],%g2 | |
264 | cmp %l4,%g2 ! %l4 = 0000000000004e9d | |
265 | bne %xcc,p0_reg_check_fail4 | |
266 | mov 0xee4,%g1 | |
267 | ldx [%g4+0x30],%g2 | |
268 | cmp %l5,%g2 ! %l5 = 000000006bdd789c | |
269 | bne %xcc,p0_reg_check_fail5 | |
270 | mov 0xee5,%g1 | |
271 | ldx [%g4+0x38],%g2 | |
272 | cmp %l6,%g2 ! %l6 = 000000004e239ae6 | |
273 | bne %xcc,p0_reg_check_fail6 | |
274 | mov 0xee6,%g1 | |
275 | ldx [%g4+0x40],%g2 | |
276 | cmp %l7,%g2 ! %l7 = ffffffffb23ce724 | |
277 | bne %xcc,p0_reg_check_fail7 | |
278 | mov 0xee7,%g1 | |
279 | ldx [%g4+0x48],%g3 | |
280 | std %f0,[%g4] | |
281 | ldx [%g4],%g2 | |
282 | cmp %g3,%g2 ! %f0 = 52bd2a08 e7dca4ad | |
283 | bne %xcc,p0_freg_check_fail | |
284 | mov 0xf00,%g1 | |
285 | ldx [%g4+0x50],%g3 | |
286 | std %f2,[%g4] | |
287 | ldx [%g4],%g2 | |
288 | cmp %g3,%g2 ! %f2 = f2f43560 d244b274 | |
289 | bne %xcc,p0_freg_check_fail | |
290 | mov 0xf02,%g1 | |
291 | ldx [%g4+0x58],%g3 | |
292 | std %f12,[%g4] | |
293 | ldx [%g4],%g2 | |
294 | cmp %g3,%g2 ! %f12 = 7e00650a e239da63 | |
295 | bne %xcc,p0_freg_check_fail | |
296 | mov 0xf12,%g1 | |
297 | ldx [%g4+0x60],%g3 | |
298 | std %f24,[%g4] | |
299 | ldx [%g4],%g2 | |
300 | cmp %g3,%g2 ! %f24 = 30bf20e2 3d0f4f09 | |
301 | bne %xcc,p0_freg_check_fail | |
302 | mov 0xf24,%g1 | |
303 | ldx [%g4+0x68],%g3 | |
304 | std %f26,[%g4] | |
305 | ldx [%g4],%g2 | |
306 | cmp %g3,%g2 ! %f26 = c669c7f2 dfc18dfe | |
307 | bne %xcc,p0_freg_check_fail | |
308 | mov 0xf26,%g1 | |
309 | ldx [%g4+0x70],%g3 | |
310 | std %f30,[%g4] | |
311 | ldx [%g4],%g2 | |
312 | cmp %g3,%g2 ! %f30 = db7e6dd7 47c758ea | |
313 | bne %xcc,p0_freg_check_fail | |
314 | mov 0xf30,%g1 | |
315 | ||
316 | ! Check Point 1 completed | |
317 | ||
318 | ||
319 | p0_label_6: | |
320 | ! %f20 = fcc4c676 35b08349, Mem[0000000030141410] = b95586e6 01a3a7b6 | |
321 | stda %f20,[%i5+%o5]0x81 ! Mem[0000000030141410] = fcc4c676 35b08349 | |
322 | ! %l4 = 0000000000004e9d, Mem[00000000100c1408] = 24b2d6a7 | |
323 | stha %l4,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 4e9dd6a7 | |
324 | ! %l4 = 0000000000004e9d, Mem[00000000100c1410] = 546330da | |
325 | stha %l4,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 4e9d30da | |
326 | ! %l6 = 000000004e239ae6, Mem[0000000010141428] = 146cf6d9 | |
327 | stw %l6,[%i5+0x028] ! Mem[0000000010141428] = 4e239ae6 | |
328 | ! Mem[0000000030081408] = ffffffff, %l1 = 000000000000004e | |
329 | swapa [%i2+%o4]0x89,%l1 ! %l1 = 00000000ffffffff | |
330 | ! %f8 = 2c892a47 8cc97409, %l1 = 00000000ffffffff | |
331 | ! Mem[0000000010101428] = b632026c57414df0 | |
332 | add %i4,0x028,%g1 | |
333 | stda %f8,[%g1+%l1]ASI_PST16_PL ! Mem[0000000010101428] = 0974c98c472a892c | |
334 | ! Mem[0000000030001400] = 47c758ea, %l2 = 0000000000000014 | |
335 | swapa [%i0+%g0]0x89,%l2 ! %l2 = 0000000047c758ea | |
336 | ! Mem[0000000030001400] = 14000000, %l5 = 000000006bdd789c | |
337 | ldstuba [%i0+%g0]0x81,%l5 ! %l5 = 00000014000000ff | |
338 | ! %f28 = 7a2e5168 80182efa, Mem[0000000030081410] = e239da63 7e00650a | |
339 | stda %f28,[%i2+%o5]0x89 ! Mem[0000000030081410] = 7a2e5168 80182efa | |
340 | ! Starting 10 instruction Load Burst | |
341 | ! Mem[0000000010041410] = 3262f1ff, %l4 = 0000000000004e9d | |
342 | lduba [%i1+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
343 | ||
344 | p0_label_7: | |
345 | ! Mem[0000000030041408] = 40020fbc, %l0 = 000000007ff18310 | |
346 | ldsha [%i1+%o4]0x81,%l0 ! %l0 = 0000000000004002 | |
347 | ! Mem[0000000030041408] = bc0f0240, %l7 = ffffffffb23ce724 | |
348 | ldsba [%i1+%o4]0x89,%l7 ! %l7 = 0000000000000040 | |
349 | ! Mem[0000000010001400] = 68000000, %l1 = 00000000ffffffff | |
350 | lduba [%i0+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
351 | ! Mem[0000000030181408] = 3d0f4f09, %l2 = 0000000047c758ea | |
352 | lduwa [%i6+%o4]0x81,%l2 ! %l2 = 000000003d0f4f09 | |
353 | ! %l0 = 0000000000004002, Mem[0000000030141410] = 76c6c4fc | |
354 | stwa %l0,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00004002 | |
355 | ! Mem[0000000010141410] = 74817719, %l5 = 0000000000000014 | |
356 | ldsba [%i5+0x012]%asi,%l5 ! %l5 = 0000000000000077 | |
357 | ! Mem[00000000300c1400] = 76881109, %l2 = 000000003d0f4f09 | |
358 | ldsba [%i3+%g0]0x81,%l2 ! %l2 = 0000000000000076 | |
359 | ! Mem[0000000010141414] = 68512e7a, %l6 = 000000004e239ae6 | |
360 | lduha [%i5+0x016]%asi,%l6 ! %l6 = 0000000000002e7a | |
361 | ! Mem[0000000010101400] = 5a8504837b4442f4, %f18 = 50b85688 7dd8d224 | |
362 | ldda [%i4+0x000]%asi,%f18 ! %f18 = 5a850483 7b4442f4 | |
363 | ! Starting 10 instruction Store Burst | |
364 | ! Mem[0000000030001410] = 0fc60bf4, %l5 = 0000000000000077 | |
365 | swapa [%i0+%o5]0x81,%l5 ! %l5 = 000000000fc60bf4 | |
366 | ||
367 | p0_label_8: | |
368 | ! %f30 = db7e6dd7 47c758ea, %l7 = 0000000000000040 | |
369 | ! Mem[00000000100c1420] = 4436ac72bc712b90 | |
370 | add %i3,0x020,%g1 | |
371 | stda %f30,[%g1+%l7]ASI_PST32_P ! Mem[00000000100c1420] = 4436ac72bc712b90 | |
372 | ! Mem[0000000010181420] = f267dfa9, %l2 = 0000000000000076 | |
373 | swap [%i6+0x020],%l2 ! %l2 = 00000000f267dfa9 | |
374 | ! %l1 = 0000000000000000, Mem[00000000100c1400] = 63f69802 | |
375 | stwa %l1,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 00000000 | |
376 | ! %l1 = 0000000000000000, Mem[0000000010181410] = b6a7a3016c295bdb | |
377 | stxa %l1,[%i6+%o5]0x80 ! Mem[0000000010181410] = 0000000000000000 | |
378 | ! %l3 = 00000000a504591a, Mem[0000000010181400] = 7523cbf1 | |
379 | stba %l3,[%i6+%g0]0x80 ! Mem[0000000010181400] = 1a23cbf1 | |
380 | ! Mem[0000000010101428] = 0974c98c, %l7 = 00000040, %l2 = f267dfa9 | |
381 | add %i4,0x28,%g1 | |
382 | casa [%g1]0x80,%l7,%l2 ! %l2 = 000000000974c98c | |
383 | ! Mem[0000000010001400] = 68000000, %l3 = 00000000a504591a | |
384 | swapa [%i0+%g0]0x88,%l3 ! %l3 = 0000000068000000 | |
385 | ! Mem[0000000010041410] = 3262f1ff, %l4 = 00000000000000ff | |
386 | ldstuba [%i1+%o5]0x88,%l4 ! %l4 = 000000ff000000ff | |
387 | ! Mem[0000000030041400] = 0fb39725, %l1 = 0000000000000000 | |
388 | swapa [%i1+%g0]0x81,%l1 ! %l1 = 000000000fb39725 | |
389 | ! Starting 10 instruction Load Burst | |
390 | ! Mem[0000000020800040] = c9567379, %l3 = 0000000068000000 | |
391 | lduha [%o1+0x040]%asi,%l3 ! %l3 = 000000000000c956 | |
392 | ||
393 | p0_label_9: | |
394 | ! Mem[0000000030101400] = 9aa4f951, %l6 = 0000000000002e7a | |
395 | ldswa [%i4+%g0]0x81,%l6 ! %l6 = ffffffff9aa4f951 | |
396 | ! Mem[00000000100c1408] = 4e9dd6a76e9c2c11, %l1 = 000000000fb39725 | |
397 | ldxa [%i3+%o4]0x80,%l1 ! %l1 = 4e9dd6a76e9c2c11 | |
398 | ! Mem[0000000020800040] = c9567379, %l5 = 000000000fc60bf4 | |
399 | ldsha [%o1+0x040]%asi,%l5 ! %l5 = ffffffffffffc956 | |
400 | ! Mem[0000000010081400] = 4d1170cb, %l0 = 0000000000004002 | |
401 | ldsha [%i2+%g0]0x80,%l0 ! %l0 = 0000000000004d11 | |
402 | ! Mem[00000000211c0000] = 44cf1a4c, %l6 = ffffffff9aa4f951 | |
403 | lduha [%o2+0x000]%asi,%l6 ! %l6 = 00000000000044cf | |
404 | ! Mem[0000000021800180] = edffe2ae, %l1 = 4e9dd6a76e9c2c11 | |
405 | ldsh [%o3+0x180],%l1 ! %l1 = ffffffffffffedff | |
406 | ! Mem[0000000030101410] = 30f7390e, %l2 = 000000000974c98c | |
407 | ldsba [%i4+%o5]0x89,%l2 ! %l2 = 000000000000000e | |
408 | ! Mem[000000001010141c] = 752b05bc, %l0 = 0000000000004d11 | |
409 | ldsh [%i4+0x01e],%l0 ! %l0 = 00000000000005bc | |
410 | ! Mem[0000000010041400] = fcc4c676, %l2 = 000000000000000e | |
411 | lduwa [%i1+0x000]%asi,%l2 ! %l2 = 00000000fcc4c676 | |
412 | ! Starting 10 instruction Store Burst | |
413 | ! Mem[0000000010001408] = b6f16259, %l1 = ffffffffffffedff | |
414 | swapa [%i0+%o4]0x80,%l1 ! %l1 = 00000000b6f16259 | |
415 | ||
416 | p0_label_10: | |
417 | ! Mem[0000000010101408] = f2f43560, %l2 = 00000000fcc4c676 | |
418 | swapa [%i4+%o4]0x80,%l2 ! %l2 = 00000000f2f43560 | |
419 | ! %l7 = 0000000000000040, Mem[000000001000141e] = eaef3d4b | |
420 | sth %l7,[%i0+0x01e] ! Mem[000000001000141c] = eaef0040 | |
421 | ! %l5 = ffffffffffffc956, Mem[0000000010041408] = 3eb3f3774381e516 | |
422 | stxa %l5,[%i1+%o4]0x88 ! Mem[0000000010041408] = ffffffffffffc956 | |
423 | ! %l6 = 00000000000044cf, Mem[0000000030181410] = 14a42e74 | |
424 | stwa %l6,[%i6+%o5]0x81 ! Mem[0000000030181410] = 000044cf | |
425 | ! %l4 = 000000ff, %l5 = ffffc956, Mem[0000000030101408] = e69a234e 50b139a3 | |
426 | stda %l4,[%i4+%o4]0x89 ! Mem[0000000030101408] = 000000ff ffffc956 | |
427 | ! %l7 = 0000000000000040, Mem[0000000010181410] = 00000000 | |
428 | stba %l7,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000040 | |
429 | ! %l2 = 00000000f2f43560, Mem[0000000030041400] = 00000000 | |
430 | stba %l2,[%i1+%g0]0x81 ! Mem[0000000030041400] = 60000000 | |
431 | ! Mem[0000000010101420] = cd6765be446d5ace, %l7 = 0000000000000040, %l3 = 000000000000c956 | |
432 | add %i4,0x20,%g1 | |
433 | casxa [%g1]0x80,%l7,%l3 ! %l3 = cd6765be446d5ace | |
434 | ! %l2 = 00000000f2f43560, Mem[0000000030181408] = 3d0f4f09af67e00d | |
435 | stxa %l2,[%i6+%o4]0x81 ! Mem[0000000030181408] = 00000000f2f43560 | |
436 | ! Starting 10 instruction Load Burst | |
437 | ! Mem[0000000030001410] = 31b11d7877000000, %f0 = 52bd2a08 e7dca4ad | |
438 | ldda [%i0+%o5]0x89,%f0 ! %f0 = 31b11d78 77000000 | |
439 | ||
440 | ! Check Point 2 for processor 0 | |
441 | ||
442 | set p0_check_pt_data_2,%g4 | |
443 | rd %ccr,%g5 ! %g5 = 44 | |
444 | ldx [%g4+0x08],%g2 | |
445 | cmp %l0,%g2 ! %l0 = 00000000000005bc | |
446 | bne %xcc,p0_reg_check_fail0 | |
447 | mov 0xee0,%g1 | |
448 | ldx [%g4+0x10],%g2 | |
449 | cmp %l1,%g2 ! %l1 = 00000000b6f16259 | |
450 | bne %xcc,p0_reg_check_fail1 | |
451 | mov 0xee1,%g1 | |
452 | ldx [%g4+0x18],%g2 | |
453 | cmp %l2,%g2 ! %l2 = 00000000f2f43560 | |
454 | bne %xcc,p0_reg_check_fail2 | |
455 | mov 0xee2,%g1 | |
456 | ldx [%g4+0x20],%g2 | |
457 | cmp %l3,%g2 ! %l3 = cd6765be446d5ace | |
458 | bne %xcc,p0_reg_check_fail3 | |
459 | mov 0xee3,%g1 | |
460 | ldx [%g4+0x28],%g2 | |
461 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
462 | bne %xcc,p0_reg_check_fail4 | |
463 | mov 0xee4,%g1 | |
464 | ldx [%g4+0x30],%g2 | |
465 | cmp %l5,%g2 ! %l5 = ffffffffffffc956 | |
466 | bne %xcc,p0_reg_check_fail5 | |
467 | mov 0xee5,%g1 | |
468 | ldx [%g4+0x38],%g2 | |
469 | cmp %l6,%g2 ! %l6 = 00000000000044cf | |
470 | bne %xcc,p0_reg_check_fail6 | |
471 | mov 0xee6,%g1 | |
472 | ldx [%g4+0x40],%g2 | |
473 | cmp %l7,%g2 ! %l7 = 0000000000000040 | |
474 | bne %xcc,p0_reg_check_fail7 | |
475 | mov 0xee7,%g1 | |
476 | ldx [%g4+0x48],%g3 | |
477 | std %f0,[%g4] | |
478 | ldx [%g4],%g2 | |
479 | cmp %g3,%g2 ! %f0 = 31b11d78 77000000 | |
480 | bne %xcc,p0_freg_check_fail | |
481 | mov 0xf00,%g1 | |
482 | ldx [%g4+0x50],%g3 | |
483 | std %f18,[%g4] | |
484 | ldx [%g4],%g2 | |
485 | cmp %g3,%g2 ! %f18 = 5a850483 7b4442f4 | |
486 | bne %xcc,p0_freg_check_fail | |
487 | mov 0xf18,%g1 | |
488 | ||
489 | ! Check Point 2 completed | |
490 | ||
491 | ||
492 | p0_label_11: | |
493 | ! Mem[0000000010101410] = d6740000, %l5 = ffffffffffffc956 | |
494 | ldsha [%i4+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
495 | ! Mem[0000000010041410] = 6fb9b7ec3262f1ff, %f4 = 0e39f730 d77b0e51 | |
496 | ldda [%i1+%o5]0x88,%f4 ! %f4 = 6fb9b7ec 3262f1ff | |
497 | ! Mem[0000000010141400] = 8d810d7563ddd5d3, %f8 = 2c892a47 8cc97409 | |
498 | ldda [%i5+0x000]%asi,%f8 ! %f8 = 8d810d75 63ddd5d3 | |
499 | ! Mem[000000001014140c] = 018700bd, %l0 = 00000000000005bc | |
500 | lduwa [%i5+0x00c]%asi,%l0 ! %l0 = 00000000018700bd | |
501 | ! Mem[0000000030041400] = 60000000, %l7 = 0000000000000040 | |
502 | lduba [%i1+%g0]0x81,%l7 ! %l7 = 0000000000000060 | |
503 | ! Mem[0000000030181408] = 00000000, %l3 = cd6765be446d5ace | |
504 | lduba [%i6+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
505 | ! Mem[0000000030181410] = 000044cf 7d6e06da, %l2 = f2f43560, %l3 = 00000000 | |
506 | ldda [%i6+%o5]0x81,%l2 ! %l2 = 00000000000044cf 000000007d6e06da | |
507 | ! Mem[00000000100c1438] = 1babc5d7725ea756, %l7 = 0000000000000060 | |
508 | ldx [%i3+0x038],%l7 ! %l7 = 1babc5d7725ea756 | |
509 | ! Mem[0000000010041400] = fcc4c676, %l2 = 00000000000044cf | |
510 | ldswa [%i1+%g0]0x80,%l2 ! %l2 = fffffffffcc4c676 | |
511 | ! Starting 10 instruction Store Burst | |
512 | ! %f18 = 5a850483 7b4442f4, Mem[0000000010001408] = ffedffff 3a82e3fe | |
513 | stda %f18,[%i0+%o4]0x88 ! Mem[0000000010001408] = 5a850483 7b4442f4 | |
514 | ||
515 | p0_label_12: | |
516 | ! %l5 = 0000000000000000, Mem[00000000300c1400] = 76881109 | |
517 | stwa %l5,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00000000 | |
518 | ! %f10 = 9c5199ef 8dbf4312, %l6 = 00000000000044cf | |
519 | ! Mem[0000000010001418] = 718ad784eaef0040 | |
520 | add %i0,0x018,%g1 | |
521 | stda %f10,[%g1+%l6]ASI_PST16_P ! Mem[0000000010001418] = 9c5199ef8dbf4312 | |
522 | ! Mem[0000000010041410] = fff16232, %l7 = 1babc5d7725ea756 | |
523 | ldstuba [%i1+%o5]0x80,%l7 ! %l7 = 000000ff000000ff | |
524 | ! %f10 = 9c5199ef 8dbf4312, Mem[0000000030181408] = 00000000 f2f43560 | |
525 | stda %f10,[%i6+%o4]0x81 ! Mem[0000000030181408] = 9c5199ef 8dbf4312 | |
526 | ! %l5 = 0000000000000000, Mem[0000000010181410] = 00000040 | |
527 | stba %l5,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000 | |
528 | ! %f28 = 7a2e5168 80182efa, %l6 = 00000000000044cf | |
529 | ! Mem[0000000010141438] = ed4177a2900d9ef7 | |
530 | add %i5,0x038,%g1 | |
531 | stda %f28,[%g1+%l6]ASI_PST32_PL ! Mem[0000000010141438] = fa2e188068512e7a | |
532 | ! %f14 = 2a60f72b c2f8101a, Mem[0000000010181428] = 09aa98a3 fc2ceea2 | |
533 | stda %f14,[%i6+0x028]%asi ! Mem[0000000010181428] = 2a60f72b c2f8101a | |
534 | ! Mem[0000000010041435] = db25da46, %l2 = fffffffffcc4c676 | |
535 | ldstuba [%i1+0x035]%asi,%l2 ! %l2 = 00000025000000ff | |
536 | ! %f4 = 6fb9b7ec 3262f1ff, %l7 = 00000000000000ff | |
537 | ! Mem[0000000010001428] = 8d3d5da07469a694 | |
538 | add %i0,0x028,%g1 | |
539 | stda %f4,[%g1+%l7]ASI_PST16_PL ! Mem[0000000010001428] = fff16232ecb7b96f | |
540 | ! Starting 10 instruction Load Burst | |
541 | ! Mem[0000000030001410] = 00000077 781db131, %l6 = 000044cf, %l7 = 000000ff | |
542 | ldda [%i0+%o5]0x81,%l6 ! %l6 = 0000000000000077 00000000781db131 | |
543 | ||
544 | p0_label_13: | |
545 | ! Mem[0000000010041410] = 3262f1ff, %f9 = 63ddd5d3 | |
546 | lda [%i1+%o5]0x88,%f9 ! %f9 = 3262f1ff | |
547 | ! Mem[0000000030181410] = 000044cf, %l5 = 0000000000000000 | |
548 | ldswa [%i6+%o5]0x81,%l5 ! %l5 = 00000000000044cf | |
549 | ! Mem[0000000030141410] = 02400000, %f28 = 7a2e5168 | |
550 | lda [%i5+%o5]0x81,%f28 ! %f28 = 02400000 | |
551 | ! Mem[00000000100c1410] = 17c17c7eda309d4e, %f26 = c669c7f2 dfc18dfe | |
552 | ldda [%i3+%o5]0x88,%f26 ! %f26 = 17c17c7e da309d4e | |
553 | ! Mem[0000000010001410] = 7ff18310, %l4 = 00000000000000ff | |
554 | lduwa [%i0+%o5]0x80,%l4 ! %l4 = 000000007ff18310 | |
555 | ! Mem[00000000300c1400] = 00000000, %l2 = 0000000000000025 | |
556 | lduba [%i3+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
557 | ! Mem[0000000010001428] = fff16232ecb7b96f, %f30 = db7e6dd7 47c758ea | |
558 | ldd [%i0+0x028],%f30 ! %f30 = fff16232 ecb7b96f | |
559 | ! Code Fragment 3 | |
560 | p0_fragment_1: | |
561 | ! %l0 = 00000000018700bd | |
562 | setx 0x347b218f8506251d,%g7,%l0 ! %l0 = 347b218f8506251d | |
563 | ! %l1 = 00000000b6f16259 | |
564 | setx 0x6348628840bcd895,%g7,%l1 ! %l1 = 6348628840bcd895 | |
565 | setx 0x1fe000, %g1, %g3 | |
566 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
567 | setx 0x1ffff8, %g1, %g2 | |
568 | and %l0, %g2, %l0 | |
569 | ta T_CHANGE_HPRIV | |
570 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
571 | ta T_CHANGE_NONHPRIV | |
572 | ! %l0 = 347b218f8506251d | |
573 | setx 0x7ef62097979cbe03,%g7,%l0 ! %l0 = 7ef62097979cbe03 | |
574 | ! %l1 = 6348628840bcd895 | |
575 | setx 0x6d988f5fd03bf8bd,%g7,%l1 ! %l1 = 6d988f5fd03bf8bd | |
576 | ! Mem[0000000010001400] = 1a5904a5, %l7 = 00000000781db131 | |
577 | lduwa [%i0+%g0]0x80,%l7 ! %l7 = 000000001a5904a5 | |
578 | ! Starting 10 instruction Store Burst | |
579 | ! %l7 = 000000001a5904a5, Mem[0000000010181430] = 378e6d9e5454ec74, %asi = 80 | |
580 | stxa %l7,[%i6+0x030]%asi ! Mem[0000000010181430] = 000000001a5904a5 | |
581 | ||
582 | p0_label_14: | |
583 | ! Mem[0000000030081410] = 80182efa, %l2 = 0000000000000000 | |
584 | ldstuba [%i2+%o5]0x89,%l2 ! %l2 = 000000fa000000ff | |
585 | ! %f6 = 56fe427e 7d307e94, Mem[0000000010101408] = fcc4c676 d244b274 | |
586 | stda %f6 ,[%i4+%o4]0x80 ! Mem[0000000010101408] = 56fe427e 7d307e94 | |
587 | ! Mem[0000000021800180] = edffe2ae, %l6 = 0000000000000077 | |
588 | ldstuba [%o3+0x180]%asi,%l6 ! %l6 = 000000ed000000ff | |
589 | ! Mem[0000000010141418] = 5c425584, %l4 = 7ff18310, %l4 = 7ff18310 | |
590 | add %i5,0x18,%g1 | |
591 | casa [%g1]0x80,%l4,%l4 ! %l4 = 000000005c425584 | |
592 | ! %l4 = 5c425584, %l5 = 000044cf, Mem[00000000300c1410] = 1d8bd827 995cb816 | |
593 | stda %l4,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 5c425584 000044cf | |
594 | ! Mem[0000000020800041] = c9567379, %l0 = 7ef62097979cbe03 | |
595 | ldstub [%o1+0x041],%l0 ! %l0 = 00000056000000ff | |
596 | ! Mem[00000000300c1410] = 8455425c, %l6 = 00000000000000ed | |
597 | ldstuba [%i3+%o5]0x89,%l6 ! %l6 = 0000005c000000ff | |
598 | ! %l5 = 00000000000044cf, Mem[00000000100c140b] = 4e9dd6a7 | |
599 | stb %l5,[%i3+0x00b] ! Mem[00000000100c1408] = 4e9dd6cf | |
600 | ! Mem[0000000010181410] = 00000000, %l7 = 000000001a5904a5 | |
601 | ldstuba [%i6+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
602 | ! Starting 10 instruction Load Burst | |
603 | ! Mem[00000000300c1400] = 00000000, %l6 = 000000000000005c | |
604 | lduha [%i3+%g0]0x89,%l6 ! %l6 = 0000000000000000 | |
605 | ||
606 | p0_label_15: | |
607 | ! Mem[0000000010141400] = 750d818d, %f20 = fcc4c676 | |
608 | lda [%i5+%g0]0x88,%f20 ! %f20 = 750d818d | |
609 | ! Mem[0000000010041408] = 56c9ffff, %l7 = 0000000000000000 | |
610 | ldsha [%i1+%o4]0x80,%l7 ! %l7 = 00000000000056c9 | |
611 | ! Mem[0000000010181400] = 1a23cbf1d304f67d, %l2 = 00000000000000fa | |
612 | ldxa [%i6+%g0]0x80,%l2 ! %l2 = 1a23cbf1d304f67d | |
613 | ! Mem[0000000030181408] = ef99519c, %l1 = 6d988f5fd03bf8bd | |
614 | ldswa [%i6+%o4]0x89,%l1 ! %l1 = ffffffffef99519c | |
615 | ! Mem[0000000010001408] = f442447b, %l4 = 000000005c425584 | |
616 | ldswa [%i0+%o4]0x80,%l4 ! %l4 = fffffffff442447b | |
617 | ! Mem[00000000300c1408] = 6824961c bb6ed422, %l0 = 00000056, %l1 = ef99519c | |
618 | ldda [%i3+%o4]0x89,%l0 ! %l0 = 00000000bb6ed422 000000006824961c | |
619 | ! Mem[0000000010001430] = 6123c459, %l2 = 1a23cbf1d304f67d | |
620 | ldsha [%i0+0x030]%asi,%l2 ! %l2 = 0000000000006123 | |
621 | ! Mem[00000000100c1408] = 4e9dd6cf, %l5 = 00000000000044cf | |
622 | ldsha [%i3+%o4]0x80,%l5 ! %l5 = 0000000000004e9d | |
623 | membar #Sync ! Added by membar checker (1) | |
624 | ! Mem[0000000030101400] = 9aa4f951 dbc25ec6 ff000000 56c9ffff | |
625 | ! Mem[0000000030101410] = 0e39f730 d77b0e51 a26115a2 6e092edc | |
626 | ! Mem[0000000030101420] = 9c486421 76c9d21f 174573fc e9706042 | |
627 | ! Mem[0000000030101430] = 904919ff 9def9057 5e9638c2 0b931a2a | |
628 | ldda [%i4]ASI_BLK_SL,%f0 ! Block Load from 0000000030101400 | |
629 | ! Starting 10 instruction Store Burst | |
630 | ! %f16 = be3385c9 9783a018, Mem[0000000010181400] = f1cb231a 7df604d3 | |
631 | stda %f16,[%i6+%g0]0x88 ! Mem[0000000010181400] = be3385c9 9783a018 | |
632 | ||
633 | ! Check Point 3 for processor 0 | |
634 | ||
635 | set p0_check_pt_data_3,%g4 | |
636 | rd %ccr,%g5 ! %g5 = 44 | |
637 | ldx [%g4+0x08],%g2 | |
638 | cmp %l0,%g2 ! %l0 = 00000000bb6ed422 | |
639 | bne %xcc,p0_reg_check_fail0 | |
640 | mov 0xee0,%g1 | |
641 | ldx [%g4+0x10],%g2 | |
642 | cmp %l1,%g2 ! %l1 = 000000006824961c | |
643 | bne %xcc,p0_reg_check_fail1 | |
644 | mov 0xee1,%g1 | |
645 | ldx [%g4+0x18],%g2 | |
646 | cmp %l2,%g2 ! %l2 = 0000000000006123 | |
647 | bne %xcc,p0_reg_check_fail2 | |
648 | mov 0xee2,%g1 | |
649 | ldx [%g4+0x20],%g2 | |
650 | cmp %l3,%g2 ! %l3 = 000000007d6e06da | |
651 | bne %xcc,p0_reg_check_fail3 | |
652 | mov 0xee3,%g1 | |
653 | ldx [%g4+0x28],%g2 | |
654 | cmp %l4,%g2 ! %l4 = fffffffff442447b | |
655 | bne %xcc,p0_reg_check_fail4 | |
656 | mov 0xee4,%g1 | |
657 | ldx [%g4+0x30],%g2 | |
658 | cmp %l5,%g2 ! %l5 = 0000000000004e9d | |
659 | bne %xcc,p0_reg_check_fail5 | |
660 | mov 0xee5,%g1 | |
661 | ldx [%g4+0x38],%g2 | |
662 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
663 | bne %xcc,p0_reg_check_fail6 | |
664 | mov 0xee6,%g1 | |
665 | ldx [%g4+0x40],%g2 | |
666 | cmp %l7,%g2 ! %l7 = 00000000000056c9 | |
667 | bne %xcc,p0_reg_check_fail7 | |
668 | mov 0xee7,%g1 | |
669 | ldx [%g4+0x48],%g3 | |
670 | std %f0,[%g4] | |
671 | ldx [%g4],%g2 | |
672 | cmp %g3,%g2 ! %f0 = c65ec2db 51f9a49a | |
673 | bne %xcc,p0_freg_check_fail | |
674 | mov 0xf00,%g1 | |
675 | ldx [%g4+0x50],%g3 | |
676 | std %f2,[%g4] | |
677 | ldx [%g4],%g2 | |
678 | cmp %g3,%g2 ! %f2 = ffffc956 000000ff | |
679 | bne %xcc,p0_freg_check_fail | |
680 | mov 0xf02,%g1 | |
681 | ldx [%g4+0x58],%g3 | |
682 | std %f4,[%g4] | |
683 | ldx [%g4],%g2 | |
684 | cmp %g3,%g2 ! %f4 = 510e7bd7 30f7390e | |
685 | bne %xcc,p0_freg_check_fail | |
686 | mov 0xf04,%g1 | |
687 | ldx [%g4+0x60],%g3 | |
688 | std %f6,[%g4] | |
689 | ldx [%g4],%g2 | |
690 | cmp %g3,%g2 ! %f6 = dc2e096e a21561a2 | |
691 | bne %xcc,p0_freg_check_fail | |
692 | mov 0xf06,%g1 | |
693 | ldx [%g4+0x68],%g3 | |
694 | std %f8,[%g4] | |
695 | ldx [%g4],%g2 | |
696 | cmp %g3,%g2 ! %f8 = 1fd2c976 2164489c | |
697 | bne %xcc,p0_freg_check_fail | |
698 | mov 0xf08,%g1 | |
699 | ldx [%g4+0x70],%g3 | |
700 | std %f10,[%g4] | |
701 | ldx [%g4],%g2 | |
702 | cmp %g3,%g2 ! %f10 = 426070e9 fc734517 | |
703 | bne %xcc,p0_freg_check_fail | |
704 | mov 0xf10,%g1 | |
705 | ldx [%g4+0x78],%g3 | |
706 | std %f12,[%g4] | |
707 | ldx [%g4],%g2 | |
708 | cmp %g3,%g2 ! %f12 = 5790ef9d ff194990 | |
709 | bne %xcc,p0_freg_check_fail | |
710 | mov 0xf12,%g1 | |
711 | ldx [%g4+0x80],%g3 | |
712 | std %f14,[%g4] | |
713 | ldx [%g4],%g2 | |
714 | cmp %g3,%g2 ! %f14 = 2a1a930b c238965e | |
715 | bne %xcc,p0_freg_check_fail | |
716 | mov 0xf14,%g1 | |
717 | ldx [%g4+0x88],%g3 | |
718 | std %f20,[%g4] | |
719 | ldx [%g4],%g2 | |
720 | cmp %g3,%g2 ! %f20 = 750d818d 35b08349 | |
721 | bne %xcc,p0_freg_check_fail | |
722 | mov 0xf20,%g1 | |
723 | ldx [%g4+0x90],%g3 | |
724 | std %f26,[%g4] | |
725 | ldx [%g4],%g2 | |
726 | cmp %g3,%g2 ! %f26 = 17c17c7e da309d4e | |
727 | bne %xcc,p0_freg_check_fail | |
728 | mov 0xf26,%g1 | |
729 | ldx [%g4+0x98],%g3 | |
730 | std %f28,[%g4] | |
731 | ldx [%g4],%g2 | |
732 | cmp %g3,%g2 ! %f28 = 02400000 80182efa | |
733 | bne %xcc,p0_freg_check_fail | |
734 | mov 0xf28,%g1 | |
735 | ldx [%g4+0xa0],%g3 | |
736 | std %f30,[%g4] | |
737 | ldx [%g4],%g2 | |
738 | cmp %g3,%g2 ! %f30 = fff16232 ecb7b96f | |
739 | bne %xcc,p0_freg_check_fail | |
740 | mov 0xf30,%g1 | |
741 | ||
742 | ! Check Point 3 completed | |
743 | ||
744 | ||
745 | p0_label_16: | |
746 | ! %l5 = 0000000000004e9d, Mem[0000000010181410] = ff00000000000000 | |
747 | stx %l5,[%i6+%o5] ! Mem[0000000010181410] = 0000000000004e9d | |
748 | ! Mem[000000001004143e] = a34df544, %l7 = 00000000000056c9 | |
749 | ldstuba [%i1+0x03e]%asi,%l7 ! %l7 = 000000f5000000ff | |
750 | ! %l2 = 00006123, %l3 = 7d6e06da, Mem[0000000030041400] = 00000060 5b453e20 | |
751 | stda %l2,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00006123 7d6e06da | |
752 | ! %f8 = 1fd2c976 2164489c, %l5 = 0000000000004e9d | |
753 | ! Mem[0000000030001420] = db15cd8082024189 | |
754 | add %i0,0x020,%g1 | |
755 | stda %f8,[%g1+%l5]ASI_PST8_SL ! Mem[0000000030001420] = 9c1564217602411f | |
756 | ! Mem[0000000030001400] = ff000000, %l4 = fffffffff442447b | |
757 | ldstuba [%i0+%g0]0x81,%l4 ! %l4 = 000000ff000000ff | |
758 | ! Mem[0000000030101410] = 30f7390e, %l4 = 00000000000000ff | |
759 | swapa [%i4+%o5]0x89,%l4 ! %l4 = 0000000030f7390e | |
760 | ! %l6 = 0000000000000000, Mem[0000000010081408] = dfc18dfe3e0c1b36 | |
761 | stxa %l6,[%i2+%o4]0x80 ! Mem[0000000010081408] = 0000000000000000 | |
762 | ! %f18 = 5a850483 7b4442f4, %l1 = 000000006824961c | |
763 | ! Mem[0000000010141428] = 4e239ae6637cc6fe | |
764 | add %i5,0x028,%g1 | |
765 | stda %f18,[%g1+%l1]ASI_PST32_P ! Mem[0000000010141428] = 4e239ae6637cc6fe | |
766 | ! %l3 = 000000007d6e06da, Mem[0000000010001408] = 7b4442f4 | |
767 | stha %l3,[%i0+%o4]0x88 ! Mem[0000000010001408] = 7b4406da | |
768 | ! Starting 10 instruction Load Burst | |
769 | ! Mem[0000000010181410] = 00000000, %l6 = 0000000000000000 | |
770 | lduba [%i6+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
771 | ||
772 | p0_label_17: | |
773 | ! Mem[0000000020800040] = c9ff7379, %l1 = 000000006824961c | |
774 | lduha [%o1+0x040]%asi,%l1 ! %l1 = 000000000000c9ff | |
775 | ! Mem[0000000020800040] = c9ff7379, %l1 = 000000000000c9ff | |
776 | ldsb [%o1+0x040],%l1 ! %l1 = ffffffffffffffc9 | |
777 | ! Mem[0000000010141408] = 2ada5838, %l7 = 00000000000000f5 | |
778 | lduwa [%i5+%o4]0x88,%l7 ! %l7 = 000000002ada5838 | |
779 | ! Mem[0000000010101410] = d6740000, %l3 = 000000007d6e06da | |
780 | lduwa [%i4+%o5]0x88,%l3 ! %l3 = 00000000d6740000 | |
781 | ! Mem[0000000030081410] = ff2e1880, %l6 = 0000000000000000 | |
782 | ldswa [%i2+%o5]0x81,%l6 ! %l6 = ffffffffff2e1880 | |
783 | ! Mem[0000000010141410] = 7a2e516819778174, %f6 = dc2e096e a21561a2 | |
784 | ldda [%i5+%o5]0x88,%f6 ! %f6 = 7a2e5168 19778174 | |
785 | ! Mem[0000000030041408] = bc0f0240, %l4 = 0000000030f7390e | |
786 | ldsha [%i1+%o4]0x89,%l4 ! %l4 = 0000000000000240 | |
787 | ! Mem[0000000010141408] = bd008701 2ada5838, %l6 = ff2e1880, %l7 = 2ada5838 | |
788 | ldda [%i5+%o4]0x88,%l6 ! %l6 = 000000002ada5838 00000000bd008701 | |
789 | ! Mem[0000000030081408] = 4e000000, %l1 = ffffffffffffffc9 | |
790 | ldsha [%i2+%o4]0x81,%l1 ! %l1 = 0000000000004e00 | |
791 | ! Starting 10 instruction Store Burst | |
792 | ! %f24 = 30bf20e2 3d0f4f09, Mem[0000000010181400] = 18a08397 c98533be | |
793 | stda %f24,[%i6+%g0]0x80 ! Mem[0000000010181400] = 30bf20e2 3d0f4f09 | |
794 | ||
795 | p0_label_18: | |
796 | ! %l5 = 0000000000004e9d, Mem[0000000010001400] = 1a5904a5 | |
797 | stha %l5,[%i0+%g0]0x80 ! Mem[0000000010001400] = 4e9d04a5 | |
798 | ! %l2 = 00006123, %l3 = d6740000, Mem[0000000030141408] = 9677efcf ab3b564f | |
799 | stda %l2,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00006123 d6740000 | |
800 | ! %l1 = 0000000000004e00, Mem[0000000021800141] = 57761df6 | |
801 | stb %l1,[%o3+0x141] ! Mem[0000000021800140] = 57001df6 | |
802 | ! Mem[0000000010001435] = 6ff77387, %l4 = 0000000000000240 | |
803 | ldstuba [%i0+0x035]%asi,%l4 ! %l4 = 000000f7000000ff | |
804 | ! Mem[0000000030081410] = ff2e1880, %l7 = 00000000bd008701 | |
805 | swapa [%i2+%o5]0x81,%l7 ! %l7 = 00000000ff2e1880 | |
806 | ! %f22 = 13e24ca8, Mem[0000000030181410] = cf440000 | |
807 | sta %f22,[%i6+%o5]0x89 ! Mem[0000000030181410] = 13e24ca8 | |
808 | ! %l7 = 00000000ff2e1880, Mem[0000000010181410] = 9d4e000000000000 | |
809 | stxa %l7,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000ff2e1880 | |
810 | ! Mem[0000000021800000] = efa313a3, %l5 = 0000000000004e9d | |
811 | ldstuba [%o3+0x000]%asi,%l5 ! %l5 = 000000ef000000ff | |
812 | ! Mem[0000000030181408] = 9c5199ef, %l7 = 00000000ff2e1880 | |
813 | swapa [%i6+%o4]0x81,%l7 ! %l7 = 000000009c5199ef | |
814 | ! Starting 10 instruction Load Burst | |
815 | ! Mem[0000000030001410] = 00000077781db131, %f22 = 13e24ca8 7533e78f | |
816 | ldda [%i0+%o5]0x81,%f22 ! %f22 = 00000077 781db131 | |
817 | ||
818 | p0_label_19: | |
819 | ! Mem[0000000030081408] = 0000004e, %l6 = 000000002ada5838 | |
820 | lduha [%i2+%o4]0x89,%l6 ! %l6 = 000000000000004e | |
821 | ! Mem[0000000010001428] = fff16232 ecb7b96f, %l4 = 000000f7, %l5 = 000000ef | |
822 | ldda [%i0+0x028]%asi,%l4 ! %l4 = 00000000fff16232 00000000ecb7b96f | |
823 | ! Mem[00000000100c1410] = da309d4e, %f19 = 7b4442f4 | |
824 | lda [%i3+%o5]0x88,%f19 ! %f19 = da309d4e | |
825 | ! Mem[0000000010001418] = 9c5199ef, %l4 = 00000000fff16232 | |
826 | lduba [%i0+0x01b]%asi,%l4 ! %l4 = 00000000000000ef | |
827 | ! Mem[0000000010041400] = fcc4c67664663f7f, %f12 = 5790ef9d ff194990 | |
828 | ldda [%i1+0x000]%asi,%f12 ! %f12 = fcc4c676 64663f7f | |
829 | ! Mem[0000000030141400] = 082abd52, %l5 = 00000000ecb7b96f | |
830 | lduba [%i5+%g0]0x89,%l5 ! %l5 = 0000000000000052 | |
831 | ! Mem[0000000010141408] = 3858da2a, %l5 = 0000000000000052 | |
832 | ldsba [%i5+%o4]0x80,%l5 ! %l5 = 0000000000000038 | |
833 | ! Mem[0000000010081400] = 4d1170cb284795cd, %f24 = 30bf20e2 3d0f4f09 | |
834 | ldda [%i2+%g0]0x80,%f24 ! %f24 = 4d1170cb 284795cd | |
835 | ! Mem[0000000010141408] = 2ada5838, %l4 = 00000000000000ef | |
836 | lduba [%i5+%o4]0x88,%l4 ! %l4 = 0000000000000038 | |
837 | ! Starting 10 instruction Store Burst | |
838 | ! Mem[0000000030101400] = 9aa4f951, %l4 = 0000000000000038 | |
839 | ldstuba [%i4+%g0]0x81,%l4 ! %l4 = 0000009a000000ff | |
840 | ||
841 | p0_label_20: | |
842 | ! Mem[00000000201c0001] = ff2b9457, %l2 = 0000000000006123 | |
843 | ldstub [%o0+0x001],%l2 ! %l2 = 0000002b000000ff | |
844 | ! %l6 = 000000000000004e, Mem[0000000010001410] = 7ff18310 | |
845 | stwa %l6,[%i0+%o5]0x80 ! Mem[0000000010001410] = 0000004e | |
846 | ! %l3 = 00000000d6740000, Mem[0000000010041425] = 724de66c, %asi = 80 | |
847 | stba %l3,[%i1+0x025]%asi ! Mem[0000000010041424] = 7200e66c | |
848 | ! %l4 = 000000000000009a, Mem[0000000030141410] = 02400000 | |
849 | stha %l4,[%i5+%o5]0x81 ! Mem[0000000030141410] = 009a0000 | |
850 | ! Mem[0000000030001410] = 77000000, %l0 = 00000000bb6ed422 | |
851 | swapa [%i0+%o5]0x89,%l0 ! %l0 = 0000000077000000 | |
852 | ! Mem[0000000010081408] = 00000000, %l0 = 0000000077000000 | |
853 | ldstuba [%i2+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
854 | ! %l4 = 0000009a, %l5 = 00000038, Mem[0000000010041400] = fcc4c676 64663f7f | |
855 | stda %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = 0000009a 00000038 | |
856 | ! Mem[0000000010041421] = 0000001a, %l5 = 0000000000000038 | |
857 | ldstuba [%i1+0x021]%asi,%l5 ! %l5 = 00000000000000ff | |
858 | ! %l0 = 0000000000000000, Mem[0000000010041438] = 36dc01c4, %asi = 80 | |
859 | stwa %l0,[%i1+0x038]%asi ! Mem[0000000010041438] = 00000000 | |
860 | ! Starting 10 instruction Load Burst | |
861 | ! Mem[00000000100c1400] = 78a985e200000000, %f28 = 02400000 80182efa | |
862 | ldda [%i3+%g0]0x88,%f28 ! %f28 = 78a985e2 00000000 | |
863 | ||
864 | ! Check Point 4 for processor 0 | |
865 | ||
866 | set p0_check_pt_data_4,%g4 | |
867 | rd %ccr,%g5 ! %g5 = 44 | |
868 | ldx [%g4+0x08],%g2 | |
869 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
870 | bne %xcc,p0_reg_check_fail0 | |
871 | mov 0xee0,%g1 | |
872 | ldx [%g4+0x10],%g2 | |
873 | cmp %l1,%g2 ! %l1 = 0000000000004e00 | |
874 | bne %xcc,p0_reg_check_fail1 | |
875 | mov 0xee1,%g1 | |
876 | ldx [%g4+0x18],%g2 | |
877 | cmp %l2,%g2 ! %l2 = 000000000000002b | |
878 | bne %xcc,p0_reg_check_fail2 | |
879 | mov 0xee2,%g1 | |
880 | ldx [%g4+0x20],%g2 | |
881 | cmp %l3,%g2 ! %l3 = 00000000d6740000 | |
882 | bne %xcc,p0_reg_check_fail3 | |
883 | mov 0xee3,%g1 | |
884 | ldx [%g4+0x28],%g2 | |
885 | cmp %l4,%g2 ! %l4 = 000000000000009a | |
886 | bne %xcc,p0_reg_check_fail4 | |
887 | mov 0xee4,%g1 | |
888 | ldx [%g4+0x30],%g2 | |
889 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
890 | bne %xcc,p0_reg_check_fail5 | |
891 | mov 0xee5,%g1 | |
892 | ldx [%g4+0x38],%g2 | |
893 | cmp %l6,%g2 ! %l6 = 000000000000004e | |
894 | bne %xcc,p0_reg_check_fail6 | |
895 | mov 0xee6,%g1 | |
896 | ldx [%g4+0x40],%g2 | |
897 | cmp %l7,%g2 ! %l7 = 000000009c5199ef | |
898 | bne %xcc,p0_reg_check_fail7 | |
899 | mov 0xee7,%g1 | |
900 | ldx [%g4+0x48],%g3 | |
901 | std %f4,[%g4] | |
902 | ldx [%g4],%g2 | |
903 | cmp %g3,%g2 ! %f4 = 510e7bd7 30f7390e | |
904 | bne %xcc,p0_freg_check_fail | |
905 | mov 0xf04,%g1 | |
906 | ldx [%g4+0x50],%g3 | |
907 | std %f6,[%g4] | |
908 | ldx [%g4],%g2 | |
909 | cmp %g3,%g2 ! %f6 = 7a2e5168 19778174 | |
910 | bne %xcc,p0_freg_check_fail | |
911 | mov 0xf06,%g1 | |
912 | ldx [%g4+0x58],%g3 | |
913 | std %f12,[%g4] | |
914 | ldx [%g4],%g2 | |
915 | cmp %g3,%g2 ! %f12 = fcc4c676 64663f7f | |
916 | bne %xcc,p0_freg_check_fail | |
917 | mov 0xf12,%g1 | |
918 | ldx [%g4+0x60],%g3 | |
919 | std %f18,[%g4] | |
920 | ldx [%g4],%g2 | |
921 | cmp %g3,%g2 ! %f18 = 5a850483 da309d4e | |
922 | bne %xcc,p0_freg_check_fail | |
923 | mov 0xf18,%g1 | |
924 | ldx [%g4+0x68],%g3 | |
925 | std %f22,[%g4] | |
926 | ldx [%g4],%g2 | |
927 | cmp %g3,%g2 ! %f22 = 00000077 781db131 | |
928 | bne %xcc,p0_freg_check_fail | |
929 | mov 0xf22,%g1 | |
930 | ldx [%g4+0x70],%g3 | |
931 | std %f24,[%g4] | |
932 | ldx [%g4],%g2 | |
933 | cmp %g3,%g2 ! %f24 = 4d1170cb 284795cd | |
934 | bne %xcc,p0_freg_check_fail | |
935 | mov 0xf24,%g1 | |
936 | ldx [%g4+0x78],%g3 | |
937 | std %f28,[%g4] | |
938 | ldx [%g4],%g2 | |
939 | cmp %g3,%g2 ! %f28 = 78a985e2 00000000 | |
940 | bne %xcc,p0_freg_check_fail | |
941 | mov 0xf28,%g1 | |
942 | ||
943 | ! Check Point 4 completed | |
944 | ||
945 | ||
946 | p0_label_21: | |
947 | ! Mem[00000000100c1428] = 76ec22b9, %f21 = 35b08349 | |
948 | lda [%i3+0x028]%asi,%f21 ! %f21 = 76ec22b9 | |
949 | ! Mem[00000000100c1438] = 1babc5d7 725ea756, %l6 = 0000004e, %l7 = 9c5199ef | |
950 | ldd [%i3+0x038],%l6 ! %l6 = 000000001babc5d7 00000000725ea756 | |
951 | ! Mem[0000000010001410] = 0000004e f1066fbf, %l2 = 0000002b, %l3 = d6740000 | |
952 | ldda [%i0+%o5]0x80,%l2 ! %l2 = 000000000000004e 00000000f1066fbf | |
953 | ! %l6 = 000000001babc5d7, Mem[0000000010081400] = cb70114d | |
954 | stwa %l6,[%i2+%g0]0x88 ! Mem[0000000010081400] = 1babc5d7 | |
955 | ! Mem[0000000030041410] = fadc9d4e, %l7 = 00000000725ea756 | |
956 | lduba [%i1+%o5]0x89,%l7 ! %l7 = 000000000000004e | |
957 | ! Mem[00000000100c1410] = 4e9d30da, %l3 = 00000000f1066fbf | |
958 | ldsba [%i3+%o5]0x80,%l3 ! %l3 = 000000000000004e | |
959 | ! Mem[0000000010181400] = 30bf20e23d0f4f09, %f30 = fff16232 ecb7b96f | |
960 | ldda [%i6+%g0]0x80,%f30 ! %f30 = 30bf20e2 3d0f4f09 | |
961 | ! Mem[00000000100c1418] = bcb76aa3f52dc009, %l1 = 0000000000004e00 | |
962 | ldx [%i3+0x018],%l1 ! %l1 = bcb76aa3f52dc009 | |
963 | ! Mem[0000000010081400] = 1babc5d7, %l5 = 0000000000000000 | |
964 | ldsba [%i2+%g0]0x88,%l5 ! %l5 = ffffffffffffffd7 | |
965 | ! Starting 10 instruction Store Burst | |
966 | ! Mem[0000000010001408] = da06447b, %l2 = 000000000000004e | |
967 | swapa [%i0+%o4]0x80,%l2 ! %l2 = 00000000da06447b | |
968 | ||
969 | p0_label_22: | |
970 | ! %f7 = 19778174, Mem[0000000010181400] = 30bf20e2 | |
971 | st %f7 ,[%i6+%g0] ! Mem[0000000010181400] = 19778174 | |
972 | ! Mem[00000000201c0000] = ffff9457, %l5 = ffffffffffffffd7 | |
973 | ldstuba [%o0+0x000]%asi,%l5 ! %l5 = 000000ff000000ff | |
974 | ! Mem[0000000030081408] = 0000004e, %l0 = 0000000000000000 | |
975 | swapa [%i2+%o4]0x89,%l0 ! %l0 = 000000000000004e | |
976 | ! %l0 = 0000004e, %l1 = f52dc009, Mem[0000000010041418] = 532062ab 15e63fa4 | |
977 | stda %l0,[%i1+0x018]%asi ! Mem[0000000010041418] = 0000004e f52dc009 | |
978 | ! %l4 = 0000009a, %l5 = 000000ff, Mem[0000000010141400] = 8d810d75 63ddd5d3 | |
979 | stda %l4,[%i5+%g0]0x80 ! Mem[0000000010141400] = 0000009a 000000ff | |
980 | ! Mem[0000000010181410] = 80182eff, %l3 = 000000000000004e | |
981 | swapa [%i6+%o5]0x80,%l3 ! %l3 = 0000000080182eff | |
982 | ! %l1 = bcb76aa3f52dc009, Mem[0000000010181410] = 0000004e | |
983 | stba %l1,[%i6+%o5]0x80 ! Mem[0000000010181410] = 0900004e | |
984 | ! Mem[0000000010041400] = 9a000000, %l6 = 000000001babc5d7 | |
985 | swapa [%i1+%g0]0x88,%l6 ! %l6 = 000000009a000000 | |
986 | ! %f23 = 781db131, Mem[0000000010101410] = 000074d6 | |
987 | st %f23,[%i4+%o5] ! Mem[0000000010101410] = 781db131 | |
988 | ! Starting 10 instruction Load Burst | |
989 | ! Mem[0000000010101420] = cd6765be446d5ace, %l2 = 00000000da06447b | |
990 | ldxa [%i4+0x020]%asi,%l2 ! %l2 = cd6765be446d5ace | |
991 | ||
992 | p0_label_23: | |
993 | ! Mem[00000000100c1408] = cfd69d4e, %l3 = 0000000080182eff | |
994 | lduwa [%i3+%o4]0x88,%l3 ! %l3 = 00000000cfd69d4e | |
995 | ! Mem[0000000010141400] = 9a000000, %l5 = 00000000000000ff | |
996 | ldswa [%i5+%g0]0x88,%l5 ! %l5 = ffffffff9a000000 | |
997 | membar #Sync ! Added by membar checker (2) | |
998 | ! Mem[0000000010181400] = 19778174 3d0f4f09 24e73cb2 1e40a716 | |
999 | ! Mem[0000000010181410] = 0900004e 00000000 02233d7d 5209669e | |
1000 | ! Mem[0000000010181420] = 00000076 21dd459a 2a60f72b c2f8101a | |
1001 | ! Mem[0000000010181430] = 00000000 1a5904a5 0d687798 9af6877f | |
1002 | ldda [%i6]ASI_BLK_P,%f16 ! Block Load from 0000000010181400 | |
1003 | ! Mem[0000000030081410] = bd008701, %l7 = 000000000000004e | |
1004 | ldswa [%i2+%o5]0x81,%l7 ! %l7 = ffffffffbd008701 | |
1005 | ! Mem[0000000030041400] = 23610000, %l3 = 00000000cfd69d4e | |
1006 | ldsba [%i1+%g0]0x81,%l3 ! %l3 = 0000000000000023 | |
1007 | ! Mem[0000000010081424] = b23ce724, %l1 = bcb76aa3f52dc009 | |
1008 | ldswa [%i2+0x024]%asi,%l1 ! %l1 = ffffffffb23ce724 | |
1009 | ! Mem[0000000030041400] = 23610000da066e7d, %l3 = 0000000000000023 | |
1010 | ldxa [%i1+%g0]0x81,%l3 ! %l3 = 23610000da066e7d | |
1011 | ! Mem[0000000030041410] = 4e9ddcfa, %l0 = 000000000000004e | |
1012 | lduba [%i1+%o5]0x81,%l0 ! %l0 = 000000000000004e | |
1013 | ! Mem[0000000010101400] = 8304855a, %l2 = cd6765be446d5ace | |
1014 | ldswa [%i4+%g0]0x88,%l2 ! %l2 = ffffffff8304855a | |
1015 | ! Starting 10 instruction Store Burst | |
1016 | ! %f0 = c65ec2db 51f9a49a ffffc956 000000ff | |
1017 | ! %f4 = 510e7bd7 30f7390e 7a2e5168 19778174 | |
1018 | ! %f8 = 1fd2c976 2164489c 426070e9 fc734517 | |
1019 | ! %f12 = fcc4c676 64663f7f 2a1a930b c238965e | |
1020 | stda %f0,[%i6]ASI_COMMIT_P ! Block Store to 0000000010181400 | |
1021 | ||
1022 | p0_label_24: | |
1023 | ! %l0 = 0000004e, %l1 = b23ce724, Mem[0000000030041400] = 23610000 da066e7d | |
1024 | stda %l0,[%i1+%g0]0x81 ! Mem[0000000030041400] = 0000004e b23ce724 | |
1025 | ! %l1 = ffffffffb23ce724, Mem[00000000100c1408] = cfd69d4e | |
1026 | stwa %l1,[%i3+%o4]0x88 ! Mem[00000000100c1408] = b23ce724 | |
1027 | ! Mem[00000000300c1400] = 00000000, %l2 = ffffffff8304855a | |
1028 | ldstuba [%i3+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
1029 | ! %l0 = 000000000000004e, Mem[0000000010081408] = 00000000000000ff | |
1030 | stxa %l0,[%i2+%o4]0x88 ! Mem[0000000010081408] = 000000000000004e | |
1031 | ! Mem[0000000010081438] = a6ce90df, %l5 = ffffffff9a000000, %asi = 80 | |
1032 | swapa [%i2+0x038]%asi,%l5 ! %l5 = 00000000a6ce90df | |
1033 | ! %l2 = 00000000, %l3 = da066e7d, Mem[0000000010101400] = 8304855a f442447b | |
1034 | stda %l2,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 da066e7d | |
1035 | ! %l0 = 000000000000004e, Mem[00000000201c0000] = ffff9457 | |
1036 | sth %l0,[%o0+%g0] ! Mem[00000000201c0000] = 004e9457 | |
1037 | ! Mem[000000001014140e] = 018700bd, %l6 = 000000009a000000 | |
1038 | ldstuba [%i5+0x00e]%asi,%l6 ! %l6 = 00000000000000ff | |
1039 | ! Mem[00000000300c1408] = bb6ed422, %l7 = ffffffffbd008701 | |
1040 | swapa [%i3+%o4]0x89,%l7 ! %l7 = 00000000bb6ed422 | |
1041 | ! Starting 10 instruction Load Burst | |
1042 | ! Mem[0000000010041410] = fff16232, %f16 = 19778174 | |
1043 | lda [%i1+%o5]0x80,%f16 ! %f16 = fff16232 | |
1044 | ||
1045 | p0_label_25: | |
1046 | ! Mem[0000000010101400] = 00000000, %f18 = 24e73cb2 | |
1047 | lda [%i4+%g0]0x80,%f18 ! %f18 = 00000000 | |
1048 | ! Mem[00000000100c1410] = da309d4e, %f20 = 0900004e | |
1049 | lda [%i3+%o5]0x88,%f20 ! %f20 = da309d4e | |
1050 | ! Mem[0000000010001400] = a5049d4e, %l2 = 0000000000000000 | |
1051 | ldswa [%i0+%g0]0x88,%l2 ! %l2 = ffffffffa5049d4e | |
1052 | ! Mem[0000000010081408] = 0000004e, %l6 = 0000000000000000 | |
1053 | ldsba [%i2+%o4]0x88,%l6 ! %l6 = 000000000000004e | |
1054 | ! Mem[0000000030001400] = 000000ff, %l7 = 00000000bb6ed422 | |
1055 | ldswa [%i0+%g0]0x89,%l7 ! %l7 = 00000000000000ff | |
1056 | ! Mem[0000000010141408] = 2ada5838, %l3 = 23610000da066e7d | |
1057 | lduwa [%i5+%o4]0x88,%l3 ! %l3 = 000000002ada5838 | |
1058 | ! Mem[0000000030101408] = ff00000056c9ffff, %l3 = 000000002ada5838 | |
1059 | ldxa [%i4+%o4]0x81,%l3 ! %l3 = ff00000056c9ffff | |
1060 | ! Mem[0000000030041410] = 4e9ddcfa 74817719, %l0 = 0000004e, %l1 = b23ce724 | |
1061 | ldda [%i1+%o5]0x81,%l0 ! %l0 = 000000004e9ddcfa 0000000074817719 | |
1062 | ! Mem[0000000030181400] = 87f953ef, %f20 = da309d4e | |
1063 | lda [%i6+%g0]0x89,%f20 ! %f20 = 87f953ef | |
1064 | ! Starting 10 instruction Store Burst | |
1065 | ! %f20 = 87f953ef, Mem[0000000010041410] = 3262f1ff | |
1066 | sta %f20,[%i1+%o5]0x88 ! Mem[0000000010041410] = 87f953ef | |
1067 | ||
1068 | ! Check Point 5 for processor 0 | |
1069 | ||
1070 | set p0_check_pt_data_5,%g4 | |
1071 | rd %ccr,%g5 ! %g5 = 44 | |
1072 | ldx [%g4+0x08],%g2 | |
1073 | cmp %l0,%g2 ! %l0 = 000000004e9ddcfa | |
1074 | bne %xcc,p0_reg_check_fail0 | |
1075 | mov 0xee0,%g1 | |
1076 | ldx [%g4+0x10],%g2 | |
1077 | cmp %l1,%g2 ! %l1 = 0000000074817719 | |
1078 | bne %xcc,p0_reg_check_fail1 | |
1079 | mov 0xee1,%g1 | |
1080 | ldx [%g4+0x18],%g2 | |
1081 | cmp %l2,%g2 ! %l2 = ffffffffa5049d4e | |
1082 | bne %xcc,p0_reg_check_fail2 | |
1083 | mov 0xee2,%g1 | |
1084 | ldx [%g4+0x20],%g2 | |
1085 | cmp %l3,%g2 ! %l3 = ff00000056c9ffff | |
1086 | bne %xcc,p0_reg_check_fail3 | |
1087 | mov 0xee3,%g1 | |
1088 | ldx [%g4+0x28],%g2 | |
1089 | cmp %l5,%g2 ! %l5 = 00000000a6ce90df | |
1090 | bne %xcc,p0_reg_check_fail5 | |
1091 | mov 0xee5,%g1 | |
1092 | ldx [%g4+0x30],%g2 | |
1093 | cmp %l6,%g2 ! %l6 = 000000000000004e | |
1094 | bne %xcc,p0_reg_check_fail6 | |
1095 | mov 0xee6,%g1 | |
1096 | ldx [%g4+0x38],%g2 | |
1097 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
1098 | bne %xcc,p0_reg_check_fail7 | |
1099 | mov 0xee7,%g1 | |
1100 | ldx [%g4+0x40],%g3 | |
1101 | std %f0,[%g4] | |
1102 | ldx [%g4],%g2 | |
1103 | cmp %g3,%g2 ! %f0 = c65ec2db 51f9a49a | |
1104 | bne %xcc,p0_freg_check_fail | |
1105 | mov 0xf00,%g1 | |
1106 | ldx [%g4+0x48],%g3 | |
1107 | std %f2,[%g4] | |
1108 | ldx [%g4],%g2 | |
1109 | cmp %g3,%g2 ! %f2 = ffffc956 000000ff | |
1110 | bne %xcc,p0_freg_check_fail | |
1111 | mov 0xf02,%g1 | |
1112 | ldx [%g4+0x50],%g3 | |
1113 | std %f6,[%g4] | |
1114 | ldx [%g4],%g2 | |
1115 | cmp %g3,%g2 ! %f6 = 7a2e5168 19778174 | |
1116 | bne %xcc,p0_freg_check_fail | |
1117 | mov 0xf06,%g1 | |
1118 | ldx [%g4+0x58],%g3 | |
1119 | std %f16,[%g4] | |
1120 | ldx [%g4],%g2 | |
1121 | cmp %g3,%g2 ! %f16 = fff16232 3d0f4f09 | |
1122 | bne %xcc,p0_freg_check_fail | |
1123 | mov 0xf16,%g1 | |
1124 | ldx [%g4+0x60],%g3 | |
1125 | std %f18,[%g4] | |
1126 | ldx [%g4],%g2 | |
1127 | cmp %g3,%g2 ! %f18 = 00000000 1e40a716 | |
1128 | bne %xcc,p0_freg_check_fail | |
1129 | mov 0xf18,%g1 | |
1130 | ldx [%g4+0x68],%g3 | |
1131 | std %f20,[%g4] | |
1132 | ldx [%g4],%g2 | |
1133 | cmp %g3,%g2 ! %f20 = 87f953ef 00000000 | |
1134 | bne %xcc,p0_freg_check_fail | |
1135 | mov 0xf20,%g1 | |
1136 | ldx [%g4+0x70],%g3 | |
1137 | std %f22,[%g4] | |
1138 | ldx [%g4],%g2 | |
1139 | cmp %g3,%g2 ! %f22 = 02233d7d 5209669e | |
1140 | bne %xcc,p0_freg_check_fail | |
1141 | mov 0xf22,%g1 | |
1142 | ldx [%g4+0x78],%g3 | |
1143 | std %f24,[%g4] | |
1144 | ldx [%g4],%g2 | |
1145 | cmp %g3,%g2 ! %f24 = 00000076 21dd459a | |
1146 | bne %xcc,p0_freg_check_fail | |
1147 | mov 0xf24,%g1 | |
1148 | ldx [%g4+0x80],%g3 | |
1149 | std %f26,[%g4] | |
1150 | ldx [%g4],%g2 | |
1151 | cmp %g3,%g2 ! %f26 = 2a60f72b c2f8101a | |
1152 | bne %xcc,p0_freg_check_fail | |
1153 | mov 0xf26,%g1 | |
1154 | ldx [%g4+0x88],%g3 | |
1155 | std %f28,[%g4] | |
1156 | ldx [%g4],%g2 | |
1157 | cmp %g3,%g2 ! %f28 = 00000000 1a5904a5 | |
1158 | bne %xcc,p0_freg_check_fail | |
1159 | mov 0xf28,%g1 | |
1160 | ldx [%g4+0x90],%g3 | |
1161 | std %f30,[%g4] | |
1162 | ldx [%g4],%g2 | |
1163 | cmp %g3,%g2 ! %f30 = 0d687798 9af6877f | |
1164 | bne %xcc,p0_freg_check_fail | |
1165 | mov 0xf30,%g1 | |
1166 | ||
1167 | ! Check Point 5 completed | |
1168 | ||
1169 | ||
1170 | p0_label_26: | |
1171 | ! Mem[0000000030001400] = 000000ff, %l6 = 000000000000004e | |
1172 | ldstuba [%i0+%g0]0x89,%l6 ! %l6 = 000000ff000000ff | |
1173 | ! %l1 = 0000000074817719, Mem[0000000021800140] = 57001df6, %asi = 80 | |
1174 | stba %l1,[%o3+0x140]%asi ! Mem[0000000021800140] = 19001df6 | |
1175 | membar #Sync ! Added by membar checker (3) | |
1176 | ! Mem[0000000010181400] = dbc25ec6, %l4 = 000000000000009a | |
1177 | ldstuba [%i6+%g0]0x88,%l4 ! %l4 = 000000c6000000ff | |
1178 | ! %l0 = 4e9ddcfa, %l1 = 74817719, Mem[0000000030001408] = a196f1ff 79983b27 | |
1179 | stda %l0,[%i0+%o4]0x89 ! Mem[0000000030001408] = 4e9ddcfa 74817719 | |
1180 | ! %l0 = 000000004e9ddcfa, Mem[00000000201c0000] = 004e9457, %asi = 80 | |
1181 | stha %l0,[%o0+0x000]%asi ! Mem[00000000201c0000] = dcfa9457 | |
1182 | ! %l7 = 00000000000000ff, Mem[00000000100c1408] = b23ce724 | |
1183 | stwa %l7,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 000000ff | |
1184 | ! %l7 = 00000000000000ff, Mem[0000000010041410] = ef53f987 | |
1185 | stwa %l7,[%i1+%o5]0x80 ! Mem[0000000010041410] = 000000ff | |
1186 | ! %l5 = 00000000a6ce90df, Mem[0000000010001410] = bf6f06f14e000000 | |
1187 | stxa %l5,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00000000a6ce90df | |
1188 | ! Mem[0000000030181400] = 87f953ef, %l6 = 00000000000000ff | |
1189 | swapa [%i6+%g0]0x89,%l6 ! %l6 = 0000000087f953ef | |
1190 | ! Starting 10 instruction Load Burst | |
1191 | ! Mem[0000000030141408] = 23610000, %l4 = 00000000000000c6 | |
1192 | lduba [%i5+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
1193 | ||
1194 | p0_label_27: | |
1195 | ! Mem[0000000010081410] = f1ba113a, %f0 = c65ec2db | |
1196 | lda [%i2+%o5]0x80,%f0 ! %f0 = f1ba113a | |
1197 | ! Mem[00000000211c0000] = 44cf1a4c, %l3 = ff00000056c9ffff | |
1198 | lduha [%o2+0x000]%asi,%l3 ! %l3 = 00000000000044cf | |
1199 | ! Mem[0000000010001420] = 7c9650aa 6ddd37d6, %l2 = a5049d4e, %l3 = 000044cf | |
1200 | ldda [%i0+0x020]%asi,%l2 ! %l2 = 000000007c9650aa 000000006ddd37d6 | |
1201 | ! Mem[0000000030141410] = 009a0000, %f4 = 510e7bd7 | |
1202 | lda [%i5+%o5]0x81,%f4 ! %f4 = 009a0000 | |
1203 | ! Mem[0000000030041408] = 40020fbc, %l0 = 000000004e9ddcfa | |
1204 | ldsba [%i1+%o4]0x81,%l0 ! %l0 = 0000000000000040 | |
1205 | ! Mem[00000000100c1408] = 000000ff, %f10 = 426070e9 | |
1206 | lda [%i3+%o4]0x88,%f10 ! %f10 = 000000ff | |
1207 | ! Mem[0000000010101400] = 000000007d6e06da, %l6 = 0000000087f953ef | |
1208 | ldx [%i4+%g0],%l6 ! %l6 = 000000007d6e06da | |
1209 | ! Mem[0000000010001400] = a5049d4e, %l0 = 0000000000000040 | |
1210 | lduwa [%i0+%g0]0x88,%l0 ! %l0 = 00000000a5049d4e | |
1211 | ! Mem[0000000030181410] = a84ce213, %l4 = 0000000000000000 | |
1212 | ldsha [%i6+%o5]0x81,%l4 ! %l4 = ffffffffffffa84c | |
1213 | ! Starting 10 instruction Store Burst | |
1214 | ! Mem[0000000010041408] = 56c9ffff, %l7 = 00000000000000ff | |
1215 | ldstuba [%i1+%o4]0x80,%l7 ! %l7 = 00000056000000ff | |
1216 | ||
1217 | p0_label_28: | |
1218 | ! %l6 = 7d6e06da, %l7 = 00000056, Mem[00000000100c1410] = 4e9d30da 7e7cc117 | |
1219 | stda %l6,[%i3+0x010]%asi ! Mem[00000000100c1410] = 7d6e06da 00000056 | |
1220 | ! %f0 = f1ba113a 51f9a49a, Mem[0000000030181408] = 80182eff 1243bf8d | |
1221 | stda %f0 ,[%i6+%o4]0x89 ! Mem[0000000030181408] = f1ba113a 51f9a49a | |
1222 | ! %l5 = 00000000a6ce90df, Mem[0000000010041410] = 000000ff | |
1223 | stwa %l5,[%i1+%o5]0x80 ! Mem[0000000010041410] = a6ce90df | |
1224 | ! Code Fragment 3 | |
1225 | p0_fragment_2: | |
1226 | ! %l0 = 00000000a5049d4e | |
1227 | setx 0xc63707e876a4caff,%g7,%l0 ! %l0 = c63707e876a4caff | |
1228 | ! %l1 = 0000000074817719 | |
1229 | setx 0x0c156affc9a31c2e,%g7,%l1 ! %l1 = 0c156affc9a31c2e | |
1230 | setx 0x1fe000, %g1, %g3 | |
1231 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
1232 | setx 0x1ffff8, %g1, %g2 | |
1233 | and %l0, %g2, %l0 | |
1234 | ta T_CHANGE_HPRIV | |
1235 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
1236 | ta T_CHANGE_NONHPRIV | |
1237 | ! %l0 = c63707e876a4caff | |
1238 | setx 0x476484f82705dcb9,%g7,%l0 ! %l0 = 476484f82705dcb9 | |
1239 | ! %l1 = 0c156affc9a31c2e | |
1240 | setx 0x19ec2a37e07801bd,%g7,%l1 ! %l1 = 19ec2a37e07801bd | |
1241 | ! %f6 = 7a2e5168 19778174, Mem[0000000010181408] = 56c9ffff ff000000 | |
1242 | stda %f6 ,[%i6+%o4]0x88 ! Mem[0000000010181408] = 7a2e5168 19778174 | |
1243 | ! Mem[00000000300c1410] = 845542ff, %l0 = 476484f82705dcb9 | |
1244 | swapa [%i3+%o5]0x89,%l0 ! %l0 = 00000000845542ff | |
1245 | ! %l5 = 00000000a6ce90df, Mem[0000000010041400] = d7c5ab1b | |
1246 | stba %l5,[%i1+%g0]0x80 ! Mem[0000000010041400] = dfc5ab1b | |
1247 | ! %l6 = 000000007d6e06da, Mem[0000000010081400] = 1babc5d7 | |
1248 | stba %l6,[%i2+%g0]0x88 ! Mem[0000000010081400] = 1babc5da | |
1249 | ! %f12 = fcc4c676 64663f7f, Mem[00000000300c1408] = bd008701 6824961c | |
1250 | stda %f12,[%i3+%o4]0x89 ! Mem[00000000300c1408] = fcc4c676 64663f7f | |
1251 | ! Starting 10 instruction Load Burst | |
1252 | ! Mem[0000000030081410] = 7a2e5168018700bd, %f2 = ffffc956 000000ff | |
1253 | ldda [%i2+%o5]0x89,%f2 ! %f2 = 7a2e5168 018700bd | |
1254 | ||
1255 | p0_label_29: | |
1256 | ! Mem[0000000010041424] = 7200e66c, %l5 = 00000000a6ce90df | |
1257 | lduha [%i1+0x026]%asi,%l5 ! %l5 = 000000000000e66c | |
1258 | ! Mem[0000000030101408] = 000000ff, %l2 = 000000007c9650aa | |
1259 | ldswa [%i4+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
1260 | ! Mem[0000000010101410] = 781db131, %l6 = 000000007d6e06da | |
1261 | ldsha [%i4+%o5]0x80,%l6 ! %l6 = 000000000000781d | |
1262 | ! Mem[0000000010081408] = 4e00000000000000, %f2 = 7a2e5168 018700bd | |
1263 | ldda [%i2+%o4]0x80,%f2 ! %f2 = 4e000000 00000000 | |
1264 | ! Mem[0000000010101400] = da066e7d00000000, %l1 = 19ec2a37e07801bd | |
1265 | ldxa [%i4+%g0]0x88,%l1 ! %l1 = da066e7d00000000 | |
1266 | ! Mem[0000000030081408] = 00000000, %l6 = 000000000000781d | |
1267 | ldsba [%i2+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
1268 | ! Mem[0000000020800000] = 1d2e8470, %l1 = da066e7d00000000 | |
1269 | ldsba [%o1+0x001]%asi,%l1 ! %l1 = 000000000000002e | |
1270 | membar #Sync ! Added by membar checker (4) | |
1271 | ! Mem[0000000010001400] = 4e9d04a5 c7240e68 0000004e 8304855a | |
1272 | ! Mem[0000000010001410] = df90cea6 00000000 9c5199ef 8dbf4312 | |
1273 | ! Mem[0000000010001420] = 7c9650aa 6ddd37d6 fff16232 ecb7b96f | |
1274 | ! Mem[0000000010001430] = 6123c459 6fff7387 93f8cfd1 0b65ade6 | |
1275 | ldda [%i0]ASI_BLK_PL,%f16 ! Block Load from 0000000010001400 | |
1276 | ! Mem[0000000010141408] = 2ada5838, %l6 = 0000000000000000 | |
1277 | ldsba [%i5+%o4]0x88,%l6 ! %l6 = 0000000000000038 | |
1278 | ! Starting 10 instruction Store Burst | |
1279 | ! %f10 = 000000ff fc734517, Mem[0000000010181408] = 19778174 7a2e5168 | |
1280 | stda %f10,[%i6+%o4]0x88 ! Mem[0000000010181408] = 000000ff fc734517 | |
1281 | ||
1282 | p0_label_30: | |
1283 | ! %l2 = 000000ff, %l3 = 6ddd37d6, Mem[0000000010181400] = ff5ec2db 51f9a49a | |
1284 | stda %l2,[%i6+%g0]0x80 ! Mem[0000000010181400] = 000000ff 6ddd37d6 | |
1285 | ! %f11 = fc734517, Mem[0000000030141410] = 009a0000 | |
1286 | sta %f11,[%i5+%o5]0x81 ! Mem[0000000030141410] = fc734517 | |
1287 | ! %l0 = 845542ff, %l1 = 0000002e, Mem[0000000010101410] = 781db131 c5e8e712 | |
1288 | stda %l0,[%i4+%o5]0x80 ! Mem[0000000010101410] = 845542ff 0000002e | |
1289 | ! Mem[0000000010001400] = 4e9d04a5, %l4 = ffffffffffffa84c | |
1290 | ldstuba [%i0+%g0]0x80,%l4 ! %l4 = 0000004e000000ff | |
1291 | ! Mem[00000000300c1408] = 7f3f6664, %l4 = 000000000000004e | |
1292 | swapa [%i3+%o4]0x81,%l4 ! %l4 = 000000007f3f6664 | |
1293 | ! Mem[0000000010041410] = a6ce90df, %l5 = 000000000000e66c | |
1294 | ldstuba [%i1+%o5]0x80,%l5 ! %l5 = 000000a6000000ff | |
1295 | ! Mem[0000000010081400] = 1babc5da, %l5 = 00000000000000a6 | |
1296 | ldstuba [%i2+%g0]0x88,%l5 ! %l5 = 000000da000000ff | |
1297 | ! Mem[0000000030001410] = 22d46ebb, %l7 = 0000000000000056 | |
1298 | swapa [%i0+%o5]0x81,%l7 ! %l7 = 0000000022d46ebb | |
1299 | ! Mem[0000000030181400] = 000000ff, %l4 = 000000007f3f6664 | |
1300 | ldstuba [%i6+%g0]0x89,%l4 ! %l4 = 000000ff000000ff | |
1301 | ! Starting 10 instruction Load Burst | |
1302 | ! Mem[0000000010041400] = dfc5ab1b, %l1 = 000000000000002e | |
1303 | ldswa [%i1+%g0]0x80,%l1 ! %l1 = ffffffffdfc5ab1b | |
1304 | ||
1305 | ! Check Point 6 for processor 0 | |
1306 | ||
1307 | set p0_check_pt_data_6,%g4 | |
1308 | rd %ccr,%g5 ! %g5 = 44 | |
1309 | ldx [%g4+0x08],%g2 | |
1310 | cmp %l0,%g2 ! %l0 = 00000000845542ff | |
1311 | bne %xcc,p0_reg_check_fail0 | |
1312 | mov 0xee0,%g1 | |
1313 | ldx [%g4+0x10],%g2 | |
1314 | cmp %l1,%g2 ! %l1 = ffffffffdfc5ab1b | |
1315 | bne %xcc,p0_reg_check_fail1 | |
1316 | mov 0xee1,%g1 | |
1317 | ldx [%g4+0x18],%g2 | |
1318 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
1319 | bne %xcc,p0_reg_check_fail2 | |
1320 | mov 0xee2,%g1 | |
1321 | ldx [%g4+0x20],%g2 | |
1322 | cmp %l3,%g2 ! %l3 = 000000006ddd37d6 | |
1323 | bne %xcc,p0_reg_check_fail3 | |
1324 | mov 0xee3,%g1 | |
1325 | ldx [%g4+0x28],%g2 | |
1326 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
1327 | bne %xcc,p0_reg_check_fail4 | |
1328 | mov 0xee4,%g1 | |
1329 | ldx [%g4+0x30],%g2 | |
1330 | cmp %l5,%g2 ! %l5 = 00000000000000da | |
1331 | bne %xcc,p0_reg_check_fail5 | |
1332 | mov 0xee5,%g1 | |
1333 | ldx [%g4+0x38],%g2 | |
1334 | cmp %l6,%g2 ! %l6 = 0000000000000038 | |
1335 | bne %xcc,p0_reg_check_fail6 | |
1336 | mov 0xee6,%g1 | |
1337 | ldx [%g4+0x40],%g2 | |
1338 | cmp %l7,%g2 ! %l7 = 0000000022d46ebb | |
1339 | bne %xcc,p0_reg_check_fail7 | |
1340 | mov 0xee7,%g1 | |
1341 | ldx [%g4+0x48],%g3 | |
1342 | std %f0,[%g4] | |
1343 | ldx [%g4],%g2 | |
1344 | cmp %g3,%g2 ! %f0 = f1ba113a 51f9a49a | |
1345 | bne %xcc,p0_freg_check_fail | |
1346 | mov 0xf00,%g1 | |
1347 | ldx [%g4+0x50],%g3 | |
1348 | std %f2,[%g4] | |
1349 | ldx [%g4],%g2 | |
1350 | cmp %g3,%g2 ! %f2 = 4e000000 00000000 | |
1351 | bne %xcc,p0_freg_check_fail | |
1352 | mov 0xf02,%g1 | |
1353 | ldx [%g4+0x58],%g3 | |
1354 | std %f4,[%g4] | |
1355 | ldx [%g4],%g2 | |
1356 | cmp %g3,%g2 ! %f4 = 009a0000 30f7390e | |
1357 | bne %xcc,p0_freg_check_fail | |
1358 | mov 0xf04,%g1 | |
1359 | ldx [%g4+0x60],%g3 | |
1360 | std %f10,[%g4] | |
1361 | ldx [%g4],%g2 | |
1362 | cmp %g3,%g2 ! %f10 = 000000ff fc734517 | |
1363 | bne %xcc,p0_freg_check_fail | |
1364 | mov 0xf10,%g1 | |
1365 | ldx [%g4+0x68],%g3 | |
1366 | std %f16,[%g4] | |
1367 | ldx [%g4],%g2 | |
1368 | cmp %g3,%g2 ! %f16 = 680e24c7 a5049d4e | |
1369 | bne %xcc,p0_freg_check_fail | |
1370 | mov 0xf16,%g1 | |
1371 | ldx [%g4+0x70],%g3 | |
1372 | std %f18,[%g4] | |
1373 | ldx [%g4],%g2 | |
1374 | cmp %g3,%g2 ! %f18 = 5a850483 4e000000 | |
1375 | bne %xcc,p0_freg_check_fail | |
1376 | mov 0xf18,%g1 | |
1377 | ldx [%g4+0x78],%g3 | |
1378 | std %f20,[%g4] | |
1379 | ldx [%g4],%g2 | |
1380 | cmp %g3,%g2 ! %f20 = 00000000 a6ce90df | |
1381 | bne %xcc,p0_freg_check_fail | |
1382 | mov 0xf20,%g1 | |
1383 | ldx [%g4+0x80],%g3 | |
1384 | std %f22,[%g4] | |
1385 | ldx [%g4],%g2 | |
1386 | cmp %g3,%g2 ! %f22 = 1243bf8d ef99519c | |
1387 | bne %xcc,p0_freg_check_fail | |
1388 | mov 0xf22,%g1 | |
1389 | ldx [%g4+0x88],%g3 | |
1390 | std %f24,[%g4] | |
1391 | ldx [%g4],%g2 | |
1392 | cmp %g3,%g2 ! %f24 = d637dd6d aa50967c | |
1393 | bne %xcc,p0_freg_check_fail | |
1394 | mov 0xf24,%g1 | |
1395 | ldx [%g4+0x90],%g3 | |
1396 | std %f26,[%g4] | |
1397 | ldx [%g4],%g2 | |
1398 | cmp %g3,%g2 ! %f26 = 6fb9b7ec 3262f1ff | |
1399 | bne %xcc,p0_freg_check_fail | |
1400 | mov 0xf26,%g1 | |
1401 | ldx [%g4+0x98],%g3 | |
1402 | std %f28,[%g4] | |
1403 | ldx [%g4],%g2 | |
1404 | cmp %g3,%g2 ! %f28 = 8773ff6f 59c42361 | |
1405 | bne %xcc,p0_freg_check_fail | |
1406 | mov 0xf28,%g1 | |
1407 | ldx [%g4+0xa0],%g3 | |
1408 | std %f30,[%g4] | |
1409 | ldx [%g4],%g2 | |
1410 | cmp %g3,%g2 ! %f30 = e6ad650b d1cff893 | |
1411 | bne %xcc,p0_freg_check_fail | |
1412 | mov 0xf30,%g1 | |
1413 | ||
1414 | ! Check Point 6 completed | |
1415 | ||
1416 | ||
1417 | p0_label_31: | |
1418 | ! Mem[0000000030041408] = bc0f0240, %l2 = 00000000000000ff | |
1419 | swapa [%i1+%o4]0x89,%l2 ! %l2 = 00000000bc0f0240 | |
1420 | ! Mem[0000000030001400] = 000000ff, %l2 = 00000000bc0f0240 | |
1421 | lduwa [%i0+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
1422 | ! Mem[0000000030001410] = 56000000, %l4 = 00000000000000ff | |
1423 | lduwa [%i0+%o5]0x89,%l4 ! %l4 = 0000000056000000 | |
1424 | ! Mem[0000000021800180] = ffffe2ae, %l7 = 0000000022d46ebb | |
1425 | ldsb [%o3+0x180],%l7 ! %l7 = ffffffffffffffff | |
1426 | ! Mem[0000000010181408] = 174573fc, %l5 = 00000000000000da | |
1427 | lduha [%i6+%o4]0x80,%l5 ! %l5 = 0000000000001745 | |
1428 | ! Mem[0000000010001400] = ff9d04a5, %l7 = ffffffffffffffff | |
1429 | lduha [%i0+%g0]0x80,%l7 ! %l7 = 000000000000ff9d | |
1430 | ! Mem[0000000010181438] = 2a1a930b, %l0 = 00000000845542ff | |
1431 | ldsw [%i6+0x038],%l0 ! %l0 = 000000002a1a930b | |
1432 | ! Mem[0000000010181430] = fcc4c676, %l6 = 0000000000000038 | |
1433 | lduh [%i6+0x032],%l6 ! %l6 = 000000000000c676 | |
1434 | ! Mem[00000000100c1410] = 7d6e06da, %l2 = 00000000000000ff | |
1435 | lduwa [%i3+%o5]0x80,%l2 ! %l2 = 000000007d6e06da | |
1436 | ! Starting 10 instruction Store Burst | |
1437 | ! %l4 = 56000000, %l5 = 00001745, Mem[0000000010101400] = 00000000 7d6e06da | |
1438 | stda %l4,[%i4+%g0]0x80 ! Mem[0000000010101400] = 56000000 00001745 | |
1439 | ||
1440 | p0_label_32: | |
1441 | ! %f14 = 2a1a930b c238965e, Mem[0000000010101400] = 00000056 45170000 | |
1442 | stda %f14,[%i4+%g0]0x88 ! Mem[0000000010101400] = 2a1a930b c238965e | |
1443 | ! %f3 = 00000000, Mem[0000000010081408] = 4e000000 | |
1444 | sta %f3 ,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00000000 | |
1445 | ! %f10 = 000000ff, Mem[000000001004141c] = f52dc009 | |
1446 | st %f10,[%i1+0x01c] ! Mem[000000001004141c] = 000000ff | |
1447 | ! %f26 = 6fb9b7ec 3262f1ff, %l6 = 000000000000c676 | |
1448 | ! Mem[0000000010081418] = 738700e3d0f61e43 | |
1449 | add %i2,0x018,%g1 | |
1450 | stda %f26,[%g1+%l6]ASI_PST32_PL ! Mem[0000000010081418] = 738700e3ecb7b96f | |
1451 | ! Code Fragment 3 | |
1452 | p0_fragment_3: | |
1453 | ! %l0 = 000000002a1a930b | |
1454 | setx 0x2681807872e8338f,%g7,%l0 ! %l0 = 2681807872e8338f | |
1455 | ! %l1 = ffffffffdfc5ab1b | |
1456 | setx 0x122016884bd32eaa,%g7,%l1 ! %l1 = 122016884bd32eaa | |
1457 | setx 0x1fe000, %g1, %g3 | |
1458 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
1459 | setx 0x1ffff8, %g1, %g2 | |
1460 | and %l0, %g2, %l0 | |
1461 | ta T_CHANGE_HPRIV | |
1462 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
1463 | ta T_CHANGE_NONHPRIV | |
1464 | ! %l0 = 2681807872e8338f | |
1465 | setx 0x7bbd8527ad4d6902,%g7,%l0 ! %l0 = 7bbd8527ad4d6902 | |
1466 | ! %l1 = 122016884bd32eaa | |
1467 | setx 0x7e8db658728683b5,%g7,%l1 ! %l1 = 7e8db658728683b5 | |
1468 | ! %l5 = 0000000000001745, Mem[0000000030101400] = ffa4f951 | |
1469 | stba %l5,[%i4+%g0]0x81 ! Mem[0000000030101400] = 45a4f951 | |
1470 | ! %f3 = 00000000, Mem[0000000010181410] = 510e7bd7 | |
1471 | sta %f3 ,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00000000 | |
1472 | ! Mem[00000000300c1400] = ff000000, %l7 = 000000000000ff9d | |
1473 | swapa [%i3+%g0]0x81,%l7 ! %l7 = 00000000ff000000 | |
1474 | ! Mem[0000000010081400] = ffc5ab1b, %l6 = 000000000000c676 | |
1475 | swapa [%i2+%g0]0x80,%l6 ! %l6 = 00000000ffc5ab1b | |
1476 | ! Starting 10 instruction Load Burst | |
1477 | ! Mem[00000000300c1410] = 2705dcb9, %f20 = 00000000 | |
1478 | lda [%i3+%o5]0x89,%f20 ! %f20 = 2705dcb9 | |
1479 | ||
1480 | p0_label_33: | |
1481 | ! Mem[0000000010141410] = 19778174, %f14 = 2a1a930b | |
1482 | lda [%i5+%o5]0x88,%f14 ! %f14 = 19778174 | |
1483 | ! Mem[0000000030041408] = ff000000edf0a6df, %l4 = 0000000056000000 | |
1484 | ldxa [%i1+%o4]0x81,%l4 ! %l4 = ff000000edf0a6df | |
1485 | ! Mem[0000000030181408] = 9aa4f9513a11baf1, %l4 = ff000000edf0a6df | |
1486 | ldxa [%i6+%o4]0x81,%l4 ! %l4 = 9aa4f9513a11baf1 | |
1487 | ! Mem[0000000030181408] = 51f9a49a, %f20 = 2705dcb9 | |
1488 | lda [%i6+%o4]0x89,%f20 ! %f20 = 51f9a49a | |
1489 | ! Mem[0000000010141400] = 0000009a, %l1 = 7e8db658728683b5 | |
1490 | ldsha [%i5+%g0]0x80,%l1 ! %l1 = 0000000000000000 | |
1491 | ! Mem[0000000020800000] = 1d2e8470, %l4 = 9aa4f9513a11baf1 | |
1492 | lduha [%o1+0x000]%asi,%l4 ! %l4 = 0000000000001d2e | |
1493 | ! Mem[0000000010181420] = 1fd2c976, %f19 = 4e000000 | |
1494 | ld [%i6+0x020],%f19 ! %f19 = 1fd2c976 | |
1495 | ! Mem[0000000010081400] = 0000c676284795cd, %f6 = 7a2e5168 19778174 | |
1496 | ldda [%i2+%g0]0x80,%f6 ! %f6 = 0000c676 284795cd | |
1497 | ! Mem[000000001000141c] = 8dbf4312, %l0 = 7bbd8527ad4d6902 | |
1498 | ldswa [%i0+0x01c]%asi,%l0 ! %l0 = ffffffff8dbf4312 | |
1499 | ! Starting 10 instruction Store Burst | |
1500 | ! %l7 = 00000000ff000000, Mem[000000001010141a] = 50d322c9, %asi = 80 | |
1501 | stha %l7,[%i4+0x01a]%asi ! Mem[0000000010101418] = 50d30000 | |
1502 | ||
1503 | p0_label_34: | |
1504 | ! %f28 = 8773ff6f, Mem[0000000010041410] = df90ceff | |
1505 | sta %f28,[%i1+%o5]0x88 ! Mem[0000000010041410] = 8773ff6f | |
1506 | ! Mem[0000000030081410] = bd008701, %l5 = 0000000000001745 | |
1507 | ldstuba [%i2+%o5]0x81,%l5 ! %l5 = 000000bd000000ff | |
1508 | ! %l0 = ffffffff8dbf4312, Mem[0000000021800080] = 74d6a433, %asi = 80 | |
1509 | stba %l0,[%o3+0x080]%asi ! Mem[0000000021800080] = 12d6a433 | |
1510 | ! %l0 = ffffffff8dbf4312, Mem[0000000020800040] = c9ff7379, %asi = 80 | |
1511 | stha %l0,[%o1+0x040]%asi ! Mem[0000000020800040] = 43127379 | |
1512 | ! %l0 = 8dbf4312, %l1 = 00000000, Mem[0000000030181410] = 13e24ca8 da066e7d | |
1513 | stda %l0,[%i6+%o5]0x89 ! Mem[0000000030181410] = 8dbf4312 00000000 | |
1514 | ! %l0 = ffffffff8dbf4312, Mem[0000000030001408] = fadc9d4e | |
1515 | stba %l0,[%i0+%o4]0x81 ! Mem[0000000030001408] = 12dc9d4e | |
1516 | ! %f13 = 64663f7f, Mem[0000000030081410] = 018700ff | |
1517 | sta %f13,[%i2+%o5]0x89 ! Mem[0000000030081410] = 64663f7f | |
1518 | ! %l5 = 00000000000000bd, Mem[0000000030181408] = 51f9a49a | |
1519 | stba %l5,[%i6+%o4]0x89 ! Mem[0000000030181408] = 51f9a4bd | |
1520 | ! Mem[00000000300c1400] = 9dff0000, %l4 = 0000000000001d2e | |
1521 | swapa [%i3+%g0]0x89,%l4 ! %l4 = 000000009dff0000 | |
1522 | ! Starting 10 instruction Load Burst | |
1523 | ! Mem[0000000030081400] = afeb8d4f, %l3 = 000000006ddd37d6 | |
1524 | lduwa [%i2+%g0]0x81,%l3 ! %l3 = 00000000afeb8d4f | |
1525 | ||
1526 | p0_label_35: | |
1527 | ! Mem[0000000030001410] = 31b11d78 56000000, %l0 = 8dbf4312, %l1 = 00000000 | |
1528 | ldda [%i0+%o5]0x89,%l0 ! %l0 = 0000000056000000 0000000031b11d78 | |
1529 | ! Mem[0000000010101410] = 2e000000ff425584, %f24 = d637dd6d aa50967c | |
1530 | ldda [%i4+%o5]0x88,%f24 ! %f24 = 2e000000 ff425584 | |
1531 | ! Mem[0000000010141400] = 9a000000, %l1 = 0000000031b11d78 | |
1532 | ldswa [%i5+%g0]0x88,%l1 ! %l1 = ffffffff9a000000 | |
1533 | ! Mem[000000001000140c] = 8304855a, %l0 = 0000000056000000 | |
1534 | lduba [%i0+0x00d]%asi,%l0 ! %l0 = 0000000000000004 | |
1535 | ! Mem[00000000211c0000] = 44cf1a4c, %l4 = 000000009dff0000 | |
1536 | lduh [%o2+%g0],%l4 ! %l4 = 00000000000044cf | |
1537 | ! Mem[00000000100c1410] = 7d6e06da, %f28 = 8773ff6f | |
1538 | ld [%i3+%o5],%f28 ! %f28 = 7d6e06da | |
1539 | ! Mem[0000000010141434] = ac8f149b, %l7 = 00000000ff000000 | |
1540 | ldsw [%i5+0x034],%l7 ! %l7 = ffffffffac8f149b | |
1541 | ! Mem[0000000030141410] = 174573fc, %f21 = a6ce90df | |
1542 | lda [%i5+%o5]0x89,%f21 ! %f21 = 174573fc | |
1543 | ! Mem[0000000030101408] = ffffc956000000ff, %l6 = 00000000ffc5ab1b | |
1544 | ldxa [%i4+%o4]0x89,%l6 ! %l6 = ffffc956000000ff | |
1545 | ! Starting 10 instruction Store Burst | |
1546 | ! %l3 = 00000000afeb8d4f, Mem[0000000030081410] = 7f3f6664 | |
1547 | stba %l3,[%i2+%o5]0x81 ! Mem[0000000030081410] = 4f3f6664 | |
1548 | ||
1549 | ! Check Point 7 for processor 0 | |
1550 | ||
1551 | set p0_check_pt_data_7,%g4 | |
1552 | rd %ccr,%g5 ! %g5 = 44 | |
1553 | ldx [%g4+0x08],%g2 | |
1554 | cmp %l0,%g2 ! %l0 = 0000000000000004 | |
1555 | bne %xcc,p0_reg_check_fail0 | |
1556 | mov 0xee0,%g1 | |
1557 | ldx [%g4+0x10],%g2 | |
1558 | cmp %l1,%g2 ! %l1 = ffffffff9a000000 | |
1559 | bne %xcc,p0_reg_check_fail1 | |
1560 | mov 0xee1,%g1 | |
1561 | ldx [%g4+0x18],%g2 | |
1562 | cmp %l2,%g2 ! %l2 = 000000007d6e06da | |
1563 | bne %xcc,p0_reg_check_fail2 | |
1564 | mov 0xee2,%g1 | |
1565 | ldx [%g4+0x20],%g2 | |
1566 | cmp %l3,%g2 ! %l3 = 00000000afeb8d4f | |
1567 | bne %xcc,p0_reg_check_fail3 | |
1568 | mov 0xee3,%g1 | |
1569 | ldx [%g4+0x28],%g2 | |
1570 | cmp %l4,%g2 ! %l4 = 00000000000044cf | |
1571 | bne %xcc,p0_reg_check_fail4 | |
1572 | mov 0xee4,%g1 | |
1573 | ldx [%g4+0x30],%g2 | |
1574 | cmp %l5,%g2 ! %l5 = 00000000000000bd | |
1575 | bne %xcc,p0_reg_check_fail5 | |
1576 | mov 0xee5,%g1 | |
1577 | ldx [%g4+0x38],%g2 | |
1578 | cmp %l6,%g2 ! %l6 = ffffc956000000ff | |
1579 | bne %xcc,p0_reg_check_fail6 | |
1580 | mov 0xee6,%g1 | |
1581 | ldx [%g4+0x40],%g2 | |
1582 | cmp %l7,%g2 ! %l7 = ffffffffac8f149b | |
1583 | bne %xcc,p0_reg_check_fail7 | |
1584 | mov 0xee7,%g1 | |
1585 | ldx [%g4+0x48],%g3 | |
1586 | std %f0,[%g4] | |
1587 | ldx [%g4],%g2 | |
1588 | cmp %g3,%g2 ! %f0 = f1ba113a 51f9a49a | |
1589 | bne %xcc,p0_freg_check_fail | |
1590 | mov 0xf00,%g1 | |
1591 | ldx [%g4+0x50],%g3 | |
1592 | std %f6,[%g4] | |
1593 | ldx [%g4],%g2 | |
1594 | cmp %g3,%g2 ! %f6 = 0000c676 284795cd | |
1595 | bne %xcc,p0_freg_check_fail | |
1596 | mov 0xf06,%g1 | |
1597 | ldx [%g4+0x58],%g3 | |
1598 | std %f14,[%g4] | |
1599 | ldx [%g4],%g2 | |
1600 | cmp %g3,%g2 ! %f14 = 19778174 c238965e | |
1601 | bne %xcc,p0_freg_check_fail | |
1602 | mov 0xf14,%g1 | |
1603 | ldx [%g4+0x60],%g3 | |
1604 | std %f18,[%g4] | |
1605 | ldx [%g4],%g2 | |
1606 | cmp %g3,%g2 ! %f18 = 5a850483 1fd2c976 | |
1607 | bne %xcc,p0_freg_check_fail | |
1608 | mov 0xf18,%g1 | |
1609 | ldx [%g4+0x68],%g3 | |
1610 | std %f20,[%g4] | |
1611 | ldx [%g4],%g2 | |
1612 | cmp %g3,%g2 ! %f20 = 51f9a49a 174573fc | |
1613 | bne %xcc,p0_freg_check_fail | |
1614 | mov 0xf20,%g1 | |
1615 | ldx [%g4+0x70],%g3 | |
1616 | std %f24,[%g4] | |
1617 | ldx [%g4],%g2 | |
1618 | cmp %g3,%g2 ! %f24 = 2e000000 ff425584 | |
1619 | bne %xcc,p0_freg_check_fail | |
1620 | mov 0xf24,%g1 | |
1621 | ldx [%g4+0x78],%g3 | |
1622 | std %f28,[%g4] | |
1623 | ldx [%g4],%g2 | |
1624 | cmp %g3,%g2 ! %f28 = 7d6e06da 59c42361 | |
1625 | bne %xcc,p0_freg_check_fail | |
1626 | mov 0xf28,%g1 | |
1627 | ||
1628 | ! Check Point 7 completed | |
1629 | ||
1630 | ||
1631 | p0_label_36: | |
1632 | ! Mem[0000000021800181] = ffffe2ae, %l2 = 000000007d6e06da | |
1633 | ldstuba [%o3+0x181]%asi,%l2 ! %l2 = 000000ff000000ff | |
1634 | ! Mem[0000000010101410] = ff425584, %l6 = ffffc956000000ff | |
1635 | ldstuba [%i4+%o5]0x88,%l6 ! %l6 = 00000084000000ff | |
1636 | ! %l3 = 00000000afeb8d4f, Mem[0000000010041410] = 8773ff6f | |
1637 | stba %l3,[%i1+%o5]0x88 ! Mem[0000000010041410] = 8773ff4f | |
1638 | ! Mem[000000001018141b] = 7a2e5168, %l3 = 00000000afeb8d4f | |
1639 | ldstub [%i6+0x01b],%l3 ! %l3 = 00000068000000ff | |
1640 | ! %f6 = 0000c676 284795cd, %l0 = 0000000000000004 | |
1641 | ! Mem[0000000030001420] = 9c1564217602411f | |
1642 | add %i0,0x020,%g1 | |
1643 | stda %f6,[%g1+%l0]ASI_PST16_SL ! Mem[0000000030001420] = 9c15642176c6411f | |
1644 | ! %l6 = 00000084, %l7 = ac8f149b, Mem[0000000010081410] = f1ba113a 98a5f3d9 | |
1645 | stda %l6,[%i2+0x010]%asi ! Mem[0000000010081410] = 00000084 ac8f149b | |
1646 | ! %l4 = 00000000000044cf, Mem[00000000211c0000] = 44cf1a4c | |
1647 | sth %l4,[%o2+%g0] ! Mem[00000000211c0000] = 44cf1a4c | |
1648 | ! Mem[0000000030081400] = afeb8d4f, %l0 = 0000000000000004 | |
1649 | swapa [%i2+%g0]0x81,%l0 ! %l0 = 00000000afeb8d4f | |
1650 | ! %f18 = 5a850483 1fd2c976, Mem[0000000010181410] = 00000000 30f7390e | |
1651 | stda %f18,[%i6+%o5]0x80 ! Mem[0000000010181410] = 5a850483 1fd2c976 | |
1652 | ! Starting 10 instruction Load Burst | |
1653 | ! Mem[0000000030141400] = 082abd52, %l7 = ffffffffac8f149b | |
1654 | ldsba [%i5+%g0]0x89,%l7 ! %l7 = 0000000000000052 | |
1655 | ||
1656 | p0_label_37: | |
1657 | ! Mem[0000000010041408] = ffc9ffff, %l2 = 00000000000000ff | |
1658 | ldsh [%i1+0x00a],%l2 ! %l2 = ffffffffffffffff | |
1659 | ! Mem[0000000010181418] = 7a2e51ff19778174, %f14 = 19778174 c238965e | |
1660 | ldd [%i6+0x018],%f14 ! %f14 = 7a2e51ff 19778174 | |
1661 | ! Mem[0000000010141400] = 9a000000, %l7 = 0000000000000052 | |
1662 | ldsba [%i5+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
1663 | ! Mem[0000000030181400] = ff000000, %l6 = 0000000000000084 | |
1664 | ldsha [%i6+%g0]0x81,%l6 ! %l6 = ffffffffffffff00 | |
1665 | ! Mem[0000000021800140] = 19001df6, %l6 = ffffffffffffff00 | |
1666 | ldsh [%o3+0x140],%l6 ! %l6 = 0000000000001900 | |
1667 | ! Mem[0000000010141400] = 0000009a, %l7 = 0000000000000000 | |
1668 | ldsha [%i5+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
1669 | ! Mem[0000000030181410] = 8dbf4312, %l3 = 0000000000000068 | |
1670 | lduwa [%i6+%o5]0x89,%l3 ! %l3 = 000000008dbf4312 | |
1671 | ! Mem[0000000010041420] = 00ff001a, %l7 = 0000000000000000 | |
1672 | ldsha [%i1+0x022]%asi,%l7 ! %l7 = 000000000000001a | |
1673 | ! Mem[0000000010181400] = ff000000, %l0 = 00000000afeb8d4f | |
1674 | ldswa [%i6+%g0]0x88,%l0 ! %l0 = ffffffffff000000 | |
1675 | ! Starting 10 instruction Store Burst | |
1676 | ! %l2 = ffffffffffffffff, Mem[0000000030101410] = 000000ff | |
1677 | stha %l2,[%i4+%o5]0x89 ! Mem[0000000030101410] = 0000ffff | |
1678 | ||
1679 | p0_label_38: | |
1680 | ! %l2 = ffffffff, %l3 = 8dbf4312, Mem[0000000010081430] = a0f5f805 3c31c6bf | |
1681 | stda %l2,[%i2+0x030]%asi ! Mem[0000000010081430] = ffffffff 8dbf4312 | |
1682 | ! Mem[0000000010181410] = 8304855a, %l5 = 00000000000000bd | |
1683 | ldstuba [%i6+%o5]0x88,%l5 ! %l5 = 0000005a000000ff | |
1684 | ! %l7 = 000000000000001a, Mem[0000000010041408] = ffc9ffffffffffff | |
1685 | stxa %l7,[%i1+%o4]0x80 ! Mem[0000000010041408] = 000000000000001a | |
1686 | ! Mem[0000000010141408] = 3858da2a, %l4 = 00000000000044cf | |
1687 | swapa [%i5+%o4]0x80,%l4 ! %l4 = 000000003858da2a | |
1688 | ! Mem[0000000010081400] = 0000c676, %l1 = ffffffff9a000000, %asi = 80 | |
1689 | swapa [%i2+0x000]%asi,%l1 ! %l1 = 000000000000c676 | |
1690 | ! %l7 = 000000000000001a, Mem[0000000030081408] = 00000000 | |
1691 | stha %l7,[%i2+%o4]0x89 ! Mem[0000000030081408] = 0000001a | |
1692 | ! %f0 = f1ba113a, Mem[00000000300c1408] = 0000004e | |
1693 | sta %f0 ,[%i3+%o4]0x81 ! Mem[00000000300c1408] = f1ba113a | |
1694 | ! %f12 = fcc4c676 64663f7f, %l3 = 000000008dbf4312 | |
1695 | ! Mem[0000000030181430] = 58e0052f9890e1fb | |
1696 | add %i6,0x030,%g1 | |
1697 | stda %f12,[%g1+%l3]ASI_PST32_S ! Mem[0000000030181430] = fcc4c6769890e1fb | |
1698 | ! %f0 = f1ba113a 51f9a49a 4e000000 00000000 | |
1699 | ! %f4 = 009a0000 30f7390e 0000c676 284795cd | |
1700 | ! %f8 = 1fd2c976 2164489c 000000ff fc734517 | |
1701 | ! %f12 = fcc4c676 64663f7f 7a2e51ff 19778174 | |
1702 | stda %f0,[%i3]ASI_COMMIT_P ! Block Store to 00000000100c1400 | |
1703 | ! Starting 10 instruction Load Burst | |
1704 | ! Mem[0000000010141410] = 7a2e516819778174, %l6 = 0000000000001900 | |
1705 | ldxa [%i5+%o5]0x88,%l6 ! %l6 = 7a2e516819778174 | |
1706 | ||
1707 | p0_label_39: | |
1708 | ! Mem[0000000010101418] = 50d30000, %l3 = 000000008dbf4312 | |
1709 | lduwa [%i4+0x018]%asi,%l3 ! %l3 = 0000000050d30000 | |
1710 | ! Mem[0000000030181410] = 8dbf4312, %l0 = ffffffffff000000 | |
1711 | ldsha [%i6+%o5]0x89,%l0 ! %l0 = 0000000000004312 | |
1712 | ! Mem[0000000010101434] = 01a3a7b6, %l4 = 000000003858da2a | |
1713 | lduha [%i4+0x034]%asi,%l4 ! %l4 = 00000000000001a3 | |
1714 | ! Mem[0000000010101408] = 56fe427e 7d307e94, %l6 = 19778174, %l7 = 0000001a | |
1715 | ldda [%i4+%o4]0x80,%l6 ! %l6 = 0000000056fe427e 000000007d307e94 | |
1716 | ! Mem[0000000030181410] = 8dbf4312, %l0 = 0000000000004312 | |
1717 | ldswa [%i6+%o5]0x89,%l0 ! %l0 = ffffffff8dbf4312 | |
1718 | ! Mem[0000000030101408] = ff00000056c9ffff, %f18 = 5a850483 1fd2c976 | |
1719 | ldda [%i4+%o4]0x81,%f18 ! %f18 = ff000000 56c9ffff | |
1720 | ! Mem[00000000211c0000] = 44cf1a4c, %l6 = 0000000056fe427e | |
1721 | ldsba [%o2+0x000]%asi,%l6 ! %l6 = 0000000000000044 | |
1722 | ! Mem[0000000010081430] = ffffffff, %l3 = 0000000050d30000 | |
1723 | lduba [%i2+0x030]%asi,%l3 ! %l3 = 00000000000000ff | |
1724 | ! Mem[0000000010001400] = ff9d04a5, %l5 = 000000000000005a | |
1725 | ldswa [%i0+%g0]0x80,%l5 ! %l5 = ffffffffff9d04a5 | |
1726 | ! Starting 10 instruction Store Burst | |
1727 | ! %l0 = ffffffff8dbf4312, Mem[0000000010141408] = 000044cf | |
1728 | stba %l0,[%i5+%o4]0x80 ! Mem[0000000010141408] = 120044cf | |
1729 | ||
1730 | p0_label_40: | |
1731 | ! %f26 = 6fb9b7ec 3262f1ff, Mem[00000000300c1410] = 2705dcb9 cf440000 | |
1732 | stda %f26,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 6fb9b7ec 3262f1ff | |
1733 | ! %l2 = ffffffffffffffff, Mem[0000000030081410] = 4f3f6664 | |
1734 | stha %l2,[%i2+%o5]0x81 ! Mem[0000000030081410] = ffff6664 | |
1735 | ! %f0 = f1ba113a 51f9a49a 4e000000 00000000 | |
1736 | ! %f4 = 009a0000 30f7390e 0000c676 284795cd | |
1737 | ! %f8 = 1fd2c976 2164489c 000000ff fc734517 | |
1738 | ! %f12 = fcc4c676 64663f7f 7a2e51ff 19778174 | |
1739 | stda %f0,[%i1]ASI_COMMIT_P ! Block Store to 0000000010041400 | |
1740 | ! %l0 = 8dbf4312, %l1 = 0000c676, Mem[0000000030081408] = 1a000000 b23ce724 | |
1741 | stda %l0,[%i2+%o4]0x81 ! Mem[0000000030081408] = 8dbf4312 0000c676 | |
1742 | ! %f17 = a5049d4e, Mem[0000000030141400] = 52bd2a08 | |
1743 | sta %f17,[%i5+%g0]0x81 ! Mem[0000000030141400] = a5049d4e | |
1744 | ! %l2 = ffffffffffffffff, Mem[0000000030081400] = 04000000 | |
1745 | stha %l2,[%i2+%g0]0x89 ! Mem[0000000030081400] = 0400ffff | |
1746 | ! %f21 = 174573fc, Mem[0000000030041410] = 4e9ddcfa | |
1747 | sta %f21,[%i1+%o5]0x81 ! Mem[0000000030041410] = 174573fc | |
1748 | ! %l2 = ffffffffffffffff, Mem[0000000010081410] = 84000000 | |
1749 | stha %l2,[%i2+%o5]0x88 ! Mem[0000000010081410] = 8400ffff | |
1750 | ! Mem[0000000030081408] = 8dbf4312, %l2 = ffffffffffffffff | |
1751 | ldstuba [%i2+%o4]0x81,%l2 ! %l2 = 0000008d000000ff | |
1752 | ! Starting 10 instruction Load Burst | |
1753 | ! Mem[0000000030181400] = 000000ff, %l2 = 000000000000008d | |
1754 | ldswa [%i6+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
1755 | ||
1756 | ! Check Point 8 for processor 0 | |
1757 | ||
1758 | set p0_check_pt_data_8,%g4 | |
1759 | rd %ccr,%g5 ! %g5 = 44 | |
1760 | ldx [%g4+0x08],%g2 | |
1761 | cmp %l0,%g2 ! %l0 = ffffffff8dbf4312 | |
1762 | bne %xcc,p0_reg_check_fail0 | |
1763 | mov 0xee0,%g1 | |
1764 | ldx [%g4+0x10],%g2 | |
1765 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
1766 | bne %xcc,p0_reg_check_fail2 | |
1767 | mov 0xee2,%g1 | |
1768 | ldx [%g4+0x18],%g2 | |
1769 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
1770 | bne %xcc,p0_reg_check_fail3 | |
1771 | mov 0xee3,%g1 | |
1772 | ldx [%g4+0x20],%g2 | |
1773 | cmp %l4,%g2 ! %l4 = 00000000000001a3 | |
1774 | bne %xcc,p0_reg_check_fail4 | |
1775 | mov 0xee4,%g1 | |
1776 | ldx [%g4+0x28],%g2 | |
1777 | cmp %l5,%g2 ! %l5 = ffffffffff9d04a5 | |
1778 | bne %xcc,p0_reg_check_fail5 | |
1779 | mov 0xee5,%g1 | |
1780 | ldx [%g4+0x30],%g2 | |
1781 | cmp %l6,%g2 ! %l6 = 0000000000000044 | |
1782 | bne %xcc,p0_reg_check_fail6 | |
1783 | mov 0xee6,%g1 | |
1784 | ldx [%g4+0x38],%g2 | |
1785 | cmp %l7,%g2 ! %l7 = 000000007d307e94 | |
1786 | bne %xcc,p0_reg_check_fail7 | |
1787 | mov 0xee7,%g1 | |
1788 | ldx [%g4+0x40],%g3 | |
1789 | std %f6,[%g4] | |
1790 | ldx [%g4],%g2 | |
1791 | cmp %g3,%g2 ! %f6 = 0000c676 284795cd | |
1792 | bne %xcc,p0_freg_check_fail | |
1793 | mov 0xf06,%g1 | |
1794 | ldx [%g4+0x48],%g3 | |
1795 | std %f14,[%g4] | |
1796 | ldx [%g4],%g2 | |
1797 | cmp %g3,%g2 ! %f14 = 7a2e51ff 19778174 | |
1798 | bne %xcc,p0_freg_check_fail | |
1799 | mov 0xf14,%g1 | |
1800 | ldx [%g4+0x50],%g3 | |
1801 | std %f18,[%g4] | |
1802 | ldx [%g4],%g2 | |
1803 | cmp %g3,%g2 ! %f18 = ff000000 56c9ffff | |
1804 | bne %xcc,p0_freg_check_fail | |
1805 | mov 0xf18,%g1 | |
1806 | ||
1807 | ! Check Point 8 completed | |
1808 | ||
1809 | ||
1810 | p0_label_41: | |
1811 | membar #Sync ! Added by membar checker (5) | |
1812 | ! Mem[000000001004143c] = 19778174, %l4 = 00000000000001a3 | |
1813 | ldsha [%i1+0x03e]%asi,%l4 ! %l4 = ffffffffffff8174 | |
1814 | ! Mem[0000000010141408] = bdff8701cf440012, %l0 = ffffffff8dbf4312 | |
1815 | ldxa [%i5+%o4]0x88,%l0 ! %l0 = bdff8701cf440012 | |
1816 | ! Mem[0000000030001410] = 56000000, %l5 = ffffffffff9d04a5 | |
1817 | ldsba [%i0+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
1818 | ! Mem[00000000300c1400] = 2e1d0000, %l3 = 00000000000000ff | |
1819 | lduwa [%i3+%g0]0x81,%l3 ! %l3 = 000000002e1d0000 | |
1820 | ! Mem[0000000010081400] = cd9547280000009a, %l6 = 0000000000000044 | |
1821 | ldxa [%i2+%g0]0x88,%l6 ! %l6 = cd9547280000009a | |
1822 | ! Mem[00000000300c1400] = 00001d2e, %l4 = ffffffffffff8174 | |
1823 | ldswa [%i3+%g0]0x89,%l4 ! %l4 = 0000000000001d2e | |
1824 | ! Mem[0000000030001408] = 748177194e9ddc12, %l3 = 000000002e1d0000 | |
1825 | ldxa [%i0+%o4]0x89,%l3 ! %l3 = 748177194e9ddc12 | |
1826 | ! Mem[0000000010041400] = f1ba113a, %l6 = cd9547280000009a | |
1827 | lduwa [%i1+%g0]0x80,%l6 ! %l6 = 00000000f1ba113a | |
1828 | ! Mem[0000000030101400] = 51f9a445, %l6 = 00000000f1ba113a | |
1829 | lduba [%i4+%g0]0x89,%l6 ! %l6 = 0000000000000045 | |
1830 | ! Starting 10 instruction Store Burst | |
1831 | ! %l1 = 000000000000c676, Mem[0000000030081408] = ffbf4312 | |
1832 | stwa %l1,[%i2+%o4]0x81 ! Mem[0000000030081408] = 0000c676 | |
1833 | ||
1834 | p0_label_42: | |
1835 | ! Mem[000000001004143d] = 19778174, %l2 = 00000000000000ff | |
1836 | ldstub [%i1+0x03d],%l2 ! %l2 = 00000077000000ff | |
1837 | ! %f12 = fcc4c676 64663f7f, Mem[0000000030001410] = 56000000 31b11d78 | |
1838 | stda %f12,[%i0+%o5]0x89 ! Mem[0000000030001410] = fcc4c676 64663f7f | |
1839 | ! %f1 = 51f9a49a, Mem[00000000300c1410] = fff16232 | |
1840 | sta %f1 ,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 51f9a49a | |
1841 | ! Mem[00000000218000c0] = bbca8d82, %l0 = bdff8701cf440012 | |
1842 | ldstub [%o3+0x0c0],%l0 ! %l0 = 000000bb000000ff | |
1843 | ! Mem[0000000020800040] = 43127379, %l3 = 748177194e9ddc12 | |
1844 | ldstub [%o1+0x040],%l3 ! %l3 = 00000043000000ff | |
1845 | ! %l6 = 0000000000000045, Mem[0000000010181400] = 000000ff | |
1846 | stwa %l6,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000045 | |
1847 | ! %f14 = 7a2e51ff 19778174, %l3 = 0000000000000043 | |
1848 | ! Mem[0000000010041438] = 7a2e51ff19ff8174 | |
1849 | add %i1,0x038,%g1 | |
1850 | stda %f14,[%g1+%l3]ASI_PST32_P ! Mem[0000000010041438] = 7a2e51ff19778174 | |
1851 | ! Mem[000000001008142c] = 1970d394, %l7 = 000000007d307e94, %asi = 80 | |
1852 | swapa [%i2+0x02c]%asi,%l7 ! %l7 = 000000001970d394 | |
1853 | ! %f28 = 7d6e06da 59c42361, %l1 = 000000000000c676 | |
1854 | ! Mem[0000000030141428] = df22a757d0510144 | |
1855 | add %i5,0x028,%g1 | |
1856 | stda %f28,[%g1+%l1]ASI_PST32_SL ! Mem[0000000030141428] = df22a757da066e7d | |
1857 | ! Starting 10 instruction Load Burst | |
1858 | ! Mem[0000000010041428] = 000000ff, %l6 = 0000000000000045 | |
1859 | lduw [%i1+0x028],%l6 ! %l6 = 00000000000000ff | |
1860 | ||
1861 | p0_label_43: | |
1862 | ! Mem[00000000211c0000] = 44cf1a4c, %l7 = 000000001970d394 | |
1863 | ldsba [%o2+0x001]%asi,%l7 ! %l7 = ffffffffffffffcf | |
1864 | ! Mem[000000001000141c] = 8dbf4312, %l3 = 0000000000000043 | |
1865 | ldswa [%i0+0x01c]%asi,%l3 ! %l3 = ffffffff8dbf4312 | |
1866 | ! Mem[00000000300c1400] = c12830a700001d2e, %l5 = 0000000000000000 | |
1867 | ldxa [%i3+%g0]0x89,%l5 ! %l5 = c12830a700001d2e | |
1868 | ! Mem[0000000030101408] = ffffc956000000ff, %l0 = 00000000000000bb | |
1869 | ldxa [%i4+%o4]0x89,%l0 ! %l0 = ffffc956000000ff | |
1870 | ! Mem[0000000030041400] = 0000004e b23ce724 ff000000 edf0a6df | |
1871 | ! Mem[0000000030041410] = 174573fc 74817719 73200d07 b792cdbe | |
1872 | ! Mem[0000000030041420] = 665ebb76 41c3b07b 4bf8b753 b8f773a1 | |
1873 | ! Mem[0000000030041430] = 00715eb7 d1d23403 cdf93c40 557d4e6a | |
1874 | ldda [%i1]ASI_BLK_SL,%f0 ! Block Load from 0000000030041400 | |
1875 | ! Mem[0000000010181408] = 174573fc, %l5 = c12830a700001d2e | |
1876 | lduha [%i6+%o4]0x80,%l5 ! %l5 = 0000000000001745 | |
1877 | ! Mem[0000000030001400] = 000000ff, %l5 = 0000000000001745 | |
1878 | ldswa [%i0+%g0]0x89,%l5 ! %l5 = 00000000000000ff | |
1879 | ! Mem[00000000100c1408] = 0000004e, %l0 = ffffc956000000ff | |
1880 | ldsha [%i3+%o4]0x88,%l0 ! %l0 = 000000000000004e | |
1881 | ! Mem[0000000030081400] = ffff0004, %f18 = ff000000 | |
1882 | lda [%i2+%g0]0x81,%f18 ! %f18 = ffff0004 | |
1883 | ! Starting 10 instruction Store Burst | |
1884 | ! Mem[0000000010001410] = df90cea6, %l4 = 0000000000001d2e | |
1885 | swapa [%i0+%o5]0x80,%l4 ! %l4 = 00000000df90cea6 | |
1886 | ||
1887 | p0_label_44: | |
1888 | ! %l7 = ffffffffffffffcf, Mem[0000000010001400] = a5049dff | |
1889 | stba %l7,[%i0+%g0]0x88 ! Mem[0000000010001400] = a5049dcf | |
1890 | ! %l7 = ffffffffffffffcf, Mem[00000000300c1410] = 51f9a49a | |
1891 | stha %l7,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ffcfa49a | |
1892 | ! %f26 = 6fb9b7ec 3262f1ff, Mem[0000000030181408] = bda4f951 3a11baf1 | |
1893 | stda %f26,[%i6+%o4]0x81 ! Mem[0000000030181408] = 6fb9b7ec 3262f1ff | |
1894 | ! Mem[00000000100c142c] = fc734517, %l7 = ffffffffffffffcf, %asi = 80 | |
1895 | swapa [%i3+0x02c]%asi,%l7 ! %l7 = 00000000fc734517 | |
1896 | ! Mem[00000000100c142c] = ffffffcf, %l2 = 0000000000000077 | |
1897 | ldstub [%i3+0x02c],%l2 ! %l2 = 000000ff000000ff | |
1898 | ! %l3 = ffffffff8dbf4312, Mem[0000000010001410] = 2e1d0000 | |
1899 | stba %l3,[%i0+%o5]0x88 ! Mem[0000000010001410] = 2e1d0012 | |
1900 | ! %l7 = 00000000fc734517, Mem[0000000010041400] = f1ba113a51f9a49a | |
1901 | stxa %l7,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000fc734517 | |
1902 | ! %f17 = a5049d4e, Mem[0000000010041410] = 009a0000 | |
1903 | sta %f17,[%i1+%o5]0x80 ! Mem[0000000010041410] = a5049d4e | |
1904 | ! Mem[00000000300c1400] = 00001d2e, %l5 = 00000000000000ff | |
1905 | ldstuba [%i3+%g0]0x89,%l5 ! %l5 = 0000002e000000ff | |
1906 | ! Starting 10 instruction Load Burst | |
1907 | ! Mem[0000000010081428] = 9bc60b6d, %l2 = 00000000000000ff | |
1908 | lduh [%i2+0x02a],%l2 ! %l2 = 0000000000000b6d | |
1909 | ||
1910 | p0_label_45: | |
1911 | ! Mem[0000000010041400] = 00000000, %f21 = 174573fc | |
1912 | lda [%i1+%g0]0x80,%f21 ! %f21 = 00000000 | |
1913 | ! Mem[0000000010001400] = a5049dcf, %l7 = 00000000fc734517 | |
1914 | ldsha [%i0+%g0]0x88,%l7 ! %l7 = ffffffffffff9dcf | |
1915 | ! Mem[0000000010101420] = cd6765be, %l2 = 0000000000000b6d | |
1916 | lduba [%i4+0x022]%asi,%l2 ! %l2 = 0000000000000065 | |
1917 | ! Mem[0000000020800040] = ff127379, %l6 = 00000000000000ff | |
1918 | ldsha [%o1+0x040]%asi,%l6 ! %l6 = ffffffffffffff12 | |
1919 | ! Mem[0000000030181410] = 00000000 8dbf4312, %l0 = 0000004e, %l1 = 0000c676 | |
1920 | ldda [%i6+%o5]0x89,%l0 ! %l0 = 000000008dbf4312 0000000000000000 | |
1921 | ! Mem[0000000010181408] = fc734517, %l3 = ffffffff8dbf4312 | |
1922 | ldsha [%i6+%o4]0x88,%l3 ! %l3 = 0000000000004517 | |
1923 | ! Mem[0000000030141410] = 4983b035174573fc, %f20 = 51f9a49a 00000000 | |
1924 | ldda [%i5+%o5]0x89,%f20 ! %f20 = 4983b035 174573fc | |
1925 | ! Mem[00000000300c1400] = ff1d0000a73028c1, %f18 = ffff0004 56c9ffff | |
1926 | ldda [%i3+%g0]0x81,%f18 ! %f18 = ff1d0000 a73028c1 | |
1927 | ! Mem[0000000010081408] = 00000000, %l7 = ffffffffffff9dcf | |
1928 | ldswa [%i2+%o4]0x88,%l7 ! %l7 = 0000000000000000 | |
1929 | ! Starting 10 instruction Store Burst | |
1930 | ! %l4 = 00000000df90cea6, Mem[0000000021800080] = 12d6a433, %asi = 80 | |
1931 | stha %l4,[%o3+0x080]%asi ! Mem[0000000021800080] = cea6a433 | |
1932 | ||
1933 | ! Check Point 9 for processor 0 | |
1934 | ||
1935 | set p0_check_pt_data_9,%g4 | |
1936 | rd %ccr,%g5 ! %g5 = 44 | |
1937 | ldx [%g4+0x08],%g2 | |
1938 | cmp %l0,%g2 ! %l0 = 000000008dbf4312 | |
1939 | bne %xcc,p0_reg_check_fail0 | |
1940 | mov 0xee0,%g1 | |
1941 | ldx [%g4+0x10],%g2 | |
1942 | cmp %l2,%g2 ! %l2 = 0000000000000065 | |
1943 | bne %xcc,p0_reg_check_fail2 | |
1944 | mov 0xee2,%g1 | |
1945 | ldx [%g4+0x18],%g2 | |
1946 | cmp %l3,%g2 ! %l3 = 0000000000004517 | |
1947 | bne %xcc,p0_reg_check_fail3 | |
1948 | mov 0xee3,%g1 | |
1949 | ldx [%g4+0x20],%g2 | |
1950 | cmp %l4,%g2 ! %l4 = 00000000df90cea6 | |
1951 | bne %xcc,p0_reg_check_fail4 | |
1952 | mov 0xee4,%g1 | |
1953 | ldx [%g4+0x28],%g2 | |
1954 | cmp %l5,%g2 ! %l5 = 000000000000002e | |
1955 | bne %xcc,p0_reg_check_fail5 | |
1956 | mov 0xee5,%g1 | |
1957 | ldx [%g4+0x30],%g2 | |
1958 | cmp %l6,%g2 ! %l6 = ffffffffffffff12 | |
1959 | bne %xcc,p0_reg_check_fail6 | |
1960 | mov 0xee6,%g1 | |
1961 | ldx [%g4+0x38],%g2 | |
1962 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
1963 | bne %xcc,p0_reg_check_fail7 | |
1964 | mov 0xee7,%g1 | |
1965 | ldx [%g4+0x40],%g3 | |
1966 | std %f0,[%g4] | |
1967 | ldx [%g4],%g2 | |
1968 | cmp %g3,%g2 ! %f0 = 24e73cb2 4e000000 | |
1969 | bne %xcc,p0_freg_check_fail | |
1970 | mov 0xf00,%g1 | |
1971 | ldx [%g4+0x48],%g3 | |
1972 | std %f2,[%g4] | |
1973 | ldx [%g4],%g2 | |
1974 | cmp %g3,%g2 ! %f2 = dfa6f0ed 000000ff | |
1975 | bne %xcc,p0_freg_check_fail | |
1976 | mov 0xf02,%g1 | |
1977 | ldx [%g4+0x50],%g3 | |
1978 | std %f4,[%g4] | |
1979 | ldx [%g4],%g2 | |
1980 | cmp %g3,%g2 ! %f4 = 19778174 fc734517 | |
1981 | bne %xcc,p0_freg_check_fail | |
1982 | mov 0xf04,%g1 | |
1983 | ldx [%g4+0x58],%g3 | |
1984 | std %f6,[%g4] | |
1985 | ldx [%g4],%g2 | |
1986 | cmp %g3,%g2 ! %f6 = becd92b7 070d2073 | |
1987 | bne %xcc,p0_freg_check_fail | |
1988 | mov 0xf06,%g1 | |
1989 | ldx [%g4+0x60],%g3 | |
1990 | std %f8,[%g4] | |
1991 | ldx [%g4],%g2 | |
1992 | cmp %g3,%g2 ! %f8 = 7bb0c341 76bb5e66 | |
1993 | bne %xcc,p0_freg_check_fail | |
1994 | mov 0xf08,%g1 | |
1995 | ldx [%g4+0x68],%g3 | |
1996 | std %f10,[%g4] | |
1997 | ldx [%g4],%g2 | |
1998 | cmp %g3,%g2 ! %f10 = a173f7b8 53b7f84b | |
1999 | bne %xcc,p0_freg_check_fail | |
2000 | mov 0xf10,%g1 | |
2001 | ldx [%g4+0x70],%g3 | |
2002 | std %f12,[%g4] | |
2003 | ldx [%g4],%g2 | |
2004 | cmp %g3,%g2 ! %f12 = 0334d2d1 b75e7100 | |
2005 | bne %xcc,p0_freg_check_fail | |
2006 | mov 0xf12,%g1 | |
2007 | ldx [%g4+0x78],%g3 | |
2008 | std %f14,[%g4] | |
2009 | ldx [%g4],%g2 | |
2010 | cmp %g3,%g2 ! %f14 = 6a4e7d55 403cf9cd | |
2011 | bne %xcc,p0_freg_check_fail | |
2012 | mov 0xf14,%g1 | |
2013 | ldx [%g4+0x80],%g3 | |
2014 | std %f18,[%g4] | |
2015 | ldx [%g4],%g2 | |
2016 | cmp %g3,%g2 ! %f18 = ff1d0000 a73028c1 | |
2017 | bne %xcc,p0_freg_check_fail | |
2018 | mov 0xf18,%g1 | |
2019 | ldx [%g4+0x88],%g3 | |
2020 | std %f20,[%g4] | |
2021 | ldx [%g4],%g2 | |
2022 | cmp %g3,%g2 ! %f20 = 4983b035 174573fc | |
2023 | bne %xcc,p0_freg_check_fail | |
2024 | mov 0xf20,%g1 | |
2025 | ||
2026 | ! Check Point 9 completed | |
2027 | ||
2028 | ||
2029 | p0_label_46: | |
2030 | ! Mem[0000000010001410] = 2e1d0012, %l2 = 0000000000000065 | |
2031 | swapa [%i0+%o5]0x88,%l2 ! %l2 = 000000002e1d0012 | |
2032 | membar #Sync ! Added by membar checker (6) | |
2033 | ! %l6 = ffffffffffffff12, Mem[0000000030041408] = 000000ff | |
2034 | stba %l6,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000012 | |
2035 | ! %f18 = ff1d0000 a73028c1, Mem[0000000010141418] = 5c425584 5ed8104a | |
2036 | stda %f18,[%i5+0x018]%asi ! Mem[0000000010141418] = ff1d0000 a73028c1 | |
2037 | ! %l6 = ffffff12, %l7 = 00000000, Mem[0000000030041410] = 174573fc 74817719 | |
2038 | stda %l6,[%i1+%o5]0x81 ! Mem[0000000030041410] = ffffff12 00000000 | |
2039 | ! Mem[0000000030181408] = 6fb9b7ec, %l7 = 0000000000000000 | |
2040 | swapa [%i6+%o4]0x81,%l7 ! %l7 = 000000006fb9b7ec | |
2041 | ! Mem[0000000021800081] = cea6a433, %l1 = 0000000000000000 | |
2042 | ldstub [%o3+0x081],%l1 ! %l1 = 000000a6000000ff | |
2043 | ! %f0 = 24e73cb2 4e000000 dfa6f0ed 000000ff | |
2044 | ! %f4 = 19778174 fc734517 becd92b7 070d2073 | |
2045 | ! %f8 = 7bb0c341 76bb5e66 a173f7b8 53b7f84b | |
2046 | ! %f12 = 0334d2d1 b75e7100 6a4e7d55 403cf9cd | |
2047 | stda %f0,[%i3]ASI_BLK_AIUP ! Block Store to 00000000100c1400 | |
2048 | ! Mem[0000000010081400] = 0000009a, %l4 = 00000000df90cea6 | |
2049 | swapa [%i2+%g0]0x88,%l4 ! %l4 = 000000000000009a | |
2050 | ! Mem[0000000010181400] = 45000000, %l1 = 00000000000000a6 | |
2051 | ldstuba [%i6+%g0]0x88,%l1 ! %l1 = 00000000000000ff | |
2052 | ! Starting 10 instruction Load Burst | |
2053 | ! Mem[0000000030041408] = dfa6f0ed00000012, %f16 = 680e24c7 a5049d4e | |
2054 | ldda [%i1+%o4]0x89,%f16 ! %f16 = dfa6f0ed 00000012 | |
2055 | ||
2056 | p0_label_47: | |
2057 | ! Mem[0000000010181414] = 1fd2c976, %l0 = 000000008dbf4312 | |
2058 | lduh [%i6+0x016],%l0 ! %l0 = 000000000000c976 | |
2059 | ! Mem[00000000211c0000] = 44cf1a4c, %l1 = 0000000000000000 | |
2060 | ldsh [%o2+%g0],%l1 ! %l1 = 00000000000044cf | |
2061 | membar #Sync ! Added by membar checker (7) | |
2062 | ! Mem[00000000100c1400] = 0000004eb23ce724, %l5 = 000000000000002e | |
2063 | ldxa [%i3+%g0]0x88,%l5 ! %l5 = 0000004eb23ce724 | |
2064 | ! Mem[0000000010181408] = fc734517, %f16 = dfa6f0ed | |
2065 | lda [%i6+%o4]0x88,%f16 ! %f16 = fc734517 | |
2066 | ! Mem[00000000211c0000] = 44cf1a4c, %l1 = 00000000000044cf | |
2067 | lduh [%o2+%g0],%l1 ! %l1 = 00000000000044cf | |
2068 | ! Mem[0000000010141408] = cf440012, %l2 = 000000002e1d0012 | |
2069 | ldsha [%i5+%o4]0x88,%l2 ! %l2 = 0000000000000012 | |
2070 | ! Mem[0000000010081408] = 0000000000000000, %f4 = 19778174 fc734517 | |
2071 | ldda [%i2+%o4]0x88,%f4 ! %f4 = 00000000 00000000 | |
2072 | ! Mem[0000000030041408] = dfa6f0ed00000012, %l5 = 0000004eb23ce724 | |
2073 | ldxa [%i1+%o4]0x89,%l5 ! %l5 = dfa6f0ed00000012 | |
2074 | ! Mem[0000000030181400] = 000000ff, %l2 = 0000000000000012 | |
2075 | lduwa [%i6+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
2076 | ! Starting 10 instruction Store Burst | |
2077 | ! Mem[0000000010081404] = 284795cd, %l4 = 0000009a, %l5 = 00000012 | |
2078 | add %i2,0x04,%g1 | |
2079 | casa [%g1]0x80,%l4,%l5 ! %l5 = 00000000284795cd | |
2080 | ||
2081 | p0_label_48: | |
2082 | ! %f2 = dfa6f0ed 000000ff, Mem[0000000030081410] = ffff6664 68512e7a | |
2083 | stda %f2 ,[%i2+%o5]0x81 ! Mem[0000000030081410] = dfa6f0ed 000000ff | |
2084 | ! %f21 = 174573fc, Mem[0000000030081400] = 0400ffff | |
2085 | sta %f21,[%i2+%g0]0x89 ! Mem[0000000030081400] = 174573fc | |
2086 | ! Mem[0000000030181400] = 000000ff, %l6 = ffffffffffffff12 | |
2087 | ldstuba [%i6+%g0]0x89,%l6 ! %l6 = 000000ff000000ff | |
2088 | ! Mem[0000000021800001] = ffa313a3, %l4 = 000000000000009a | |
2089 | ldstub [%o3+0x001],%l4 ! %l4 = 000000a3000000ff | |
2090 | ! %l0 = 000000000000c976, Mem[0000000030041410] = ffffff12 | |
2091 | stha %l0,[%i1+%o5]0x81 ! Mem[0000000030041410] = c976ff12 | |
2092 | ! Mem[00000000300c1400] = 00001dff, %l1 = 00000000000044cf | |
2093 | ldstuba [%i3+%g0]0x89,%l1 ! %l1 = 000000ff000000ff | |
2094 | ! %l6 = 00000000000000ff, Mem[0000000030141410] = 174573fc | |
2095 | stha %l6,[%i5+%o5]0x89 ! Mem[0000000030141410] = 174500ff | |
2096 | ! Mem[0000000030181408] = 00000000, %l2 = 00000000000000ff | |
2097 | swapa [%i6+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
2098 | ! Mem[0000000010081400] = df90cea6, %l7 = 000000006fb9b7ec | |
2099 | lduwa [%i2+%g0]0x88,%l7 ! %l7 = 00000000df90cea6 | |
2100 | ! Starting 10 instruction Load Burst | |
2101 | ! Mem[0000000010141410] = 19778174, %l6 = 00000000000000ff | |
2102 | ldswa [%i5+%o5]0x88,%l6 ! %l6 = 0000000019778174 | |
2103 | ||
2104 | p0_label_49: | |
2105 | ! Mem[0000000010081400] = df90cea6, %l6 = 0000000019778174 | |
2106 | ldsba [%i2+%g0]0x88,%l6 ! %l6 = ffffffffffffffa6 | |
2107 | ! Mem[000000001000142c] = ecb7b96f, %f23 = ef99519c | |
2108 | ld [%i0+0x02c],%f23 ! %f23 = ecb7b96f | |
2109 | ! Mem[00000000100c1400] = 0000004eb23ce724, %f6 = becd92b7 070d2073 | |
2110 | ldda [%i3+%g0]0x88,%f6 ! %f6 = 0000004e b23ce724 | |
2111 | ! Mem[0000000010101408] = 7e42fe56, %l5 = 00000000284795cd | |
2112 | ldsba [%i4+%o4]0x88,%l5 ! %l5 = 0000000000000056 | |
2113 | ! Mem[0000000010041430] = fcc4c676, %l3 = 0000000000004517 | |
2114 | ldsh [%i1+0x032],%l3 ! %l3 = ffffffffffffc676 | |
2115 | ! Mem[0000000010141408] = cf440012, %l1 = 00000000000000ff | |
2116 | lduwa [%i5+%o4]0x88,%l1 ! %l1 = 00000000cf440012 | |
2117 | ! Mem[0000000010001408] = 4e000000, %l4 = 00000000000000a3 | |
2118 | lduba [%i0+%o4]0x88,%l4 ! %l4 = 0000000000000000 | |
2119 | ! Mem[0000000030101400] = 45a4f951, %l7 = 00000000df90cea6 | |
2120 | lduwa [%i4+%g0]0x81,%l7 ! %l7 = 0000000045a4f951 | |
2121 | ! Mem[0000000030141400] = a5049d4e, %l2 = 0000000000000000 | |
2122 | ldsha [%i5+%g0]0x81,%l2 ! %l2 = ffffffffffffa504 | |
2123 | ! Starting 10 instruction Store Burst | |
2124 | ! Mem[00000000201c0001] = dcfa9457, %l4 = 0000000000000000 | |
2125 | ldstuba [%o0+0x001]%asi,%l4 ! %l4 = 000000fa000000ff | |
2126 | ||
2127 | p0_label_50: | |
2128 | ! %l3 = ffffffffffffc676, Mem[0000000030081410] = dfa6f0ed | |
2129 | stba %l3,[%i2+%o5]0x81 ! Mem[0000000030081410] = 76a6f0ed | |
2130 | ! %f17 = 00000012, Mem[0000000030001410] = 7f3f6664 | |
2131 | sta %f17,[%i0+%o5]0x81 ! Mem[0000000030001410] = 00000012 | |
2132 | ! Mem[00000000100c1400] = 24e73cb2, %l2 = ffffffffffffa504 | |
2133 | ldstuba [%i3+%g0]0x80,%l2 ! %l2 = 00000024000000ff | |
2134 | ! %f28 = 7d6e06da 59c42361, Mem[0000000010141408] = cf440012 bdff8701 | |
2135 | stda %f28,[%i5+%o4]0x88 ! Mem[0000000010141408] = 7d6e06da 59c42361 | |
2136 | ! Mem[0000000010001410] = 00000065, %l5 = 0000000000000056 | |
2137 | ldstuba [%i0+%o5]0x88,%l5 ! %l5 = 00000065000000ff | |
2138 | ! Mem[0000000010001408] = 0000004e, %l0 = 000000000000c976 | |
2139 | swapa [%i0+%o4]0x80,%l0 ! %l0 = 000000000000004e | |
2140 | ! %l2 = 0000000000000024, Mem[0000000030081400] = 174573fc | |
2141 | stwa %l2,[%i2+%g0]0x89 ! Mem[0000000030081400] = 00000024 | |
2142 | ! %f31 = d1cff893, Mem[0000000010141400] = 9a000000 | |
2143 | sta %f31,[%i5+%g0]0x88 ! Mem[0000000010141400] = d1cff893 | |
2144 | ! %l1 = 00000000cf440012, Mem[0000000010001408] = 76c90000 | |
2145 | stwa %l1,[%i0+%o4]0x88 ! Mem[0000000010001408] = cf440012 | |
2146 | ! Starting 10 instruction Load Burst | |
2147 | ! Mem[000000001004141c] = 284795cd, %l0 = 000000000000004e | |
2148 | lduw [%i1+0x01c],%l0 ! %l0 = 00000000284795cd | |
2149 | ||
2150 | ! Check Point 10 for processor 0 | |
2151 | ||
2152 | set p0_check_pt_data_10,%g4 | |
2153 | rd %ccr,%g5 ! %g5 = 44 | |
2154 | ldx [%g4+0x08],%g2 | |
2155 | cmp %l0,%g2 ! %l0 = 00000000284795cd | |
2156 | bne %xcc,p0_reg_check_fail0 | |
2157 | mov 0xee0,%g1 | |
2158 | ldx [%g4+0x10],%g2 | |
2159 | cmp %l1,%g2 ! %l1 = 00000000cf440012 | |
2160 | bne %xcc,p0_reg_check_fail1 | |
2161 | mov 0xee1,%g1 | |
2162 | ldx [%g4+0x18],%g2 | |
2163 | cmp %l2,%g2 ! %l2 = 0000000000000024 | |
2164 | bne %xcc,p0_reg_check_fail2 | |
2165 | mov 0xee2,%g1 | |
2166 | ldx [%g4+0x20],%g2 | |
2167 | cmp %l3,%g2 ! %l3 = ffffffffffffc676 | |
2168 | bne %xcc,p0_reg_check_fail3 | |
2169 | mov 0xee3,%g1 | |
2170 | ldx [%g4+0x28],%g2 | |
2171 | cmp %l4,%g2 ! %l4 = 00000000000000fa | |
2172 | bne %xcc,p0_reg_check_fail4 | |
2173 | mov 0xee4,%g1 | |
2174 | ldx [%g4+0x30],%g2 | |
2175 | cmp %l5,%g2 ! %l5 = 0000000000000065 | |
2176 | bne %xcc,p0_reg_check_fail5 | |
2177 | mov 0xee5,%g1 | |
2178 | ldx [%g4+0x38],%g2 | |
2179 | cmp %l6,%g2 ! %l6 = ffffffffffffffa6 | |
2180 | bne %xcc,p0_reg_check_fail6 | |
2181 | mov 0xee6,%g1 | |
2182 | ldx [%g4+0x40],%g2 | |
2183 | cmp %l7,%g2 ! %l7 = 0000000045a4f951 | |
2184 | bne %xcc,p0_reg_check_fail7 | |
2185 | mov 0xee7,%g1 | |
2186 | ldx [%g4+0x48],%g3 | |
2187 | std %f4,[%g4] | |
2188 | ldx [%g4],%g2 | |
2189 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
2190 | bne %xcc,p0_freg_check_fail | |
2191 | mov 0xf04,%g1 | |
2192 | ldx [%g4+0x50],%g3 | |
2193 | std %f6,[%g4] | |
2194 | ldx [%g4],%g2 | |
2195 | cmp %g3,%g2 ! %f6 = 0000004e b23ce724 | |
2196 | bne %xcc,p0_freg_check_fail | |
2197 | mov 0xf06,%g1 | |
2198 | ldx [%g4+0x58],%g3 | |
2199 | std %f16,[%g4] | |
2200 | ldx [%g4],%g2 | |
2201 | cmp %g3,%g2 ! %f16 = fc734517 00000012 | |
2202 | bne %xcc,p0_freg_check_fail | |
2203 | mov 0xf16,%g1 | |
2204 | ldx [%g4+0x60],%g3 | |
2205 | std %f22,[%g4] | |
2206 | ldx [%g4],%g2 | |
2207 | cmp %g3,%g2 ! %f22 = 1243bf8d ecb7b96f | |
2208 | bne %xcc,p0_freg_check_fail | |
2209 | mov 0xf22,%g1 | |
2210 | ||
2211 | ! Check Point 10 completed | |
2212 | ||
2213 | ||
2214 | p0_label_51: | |
2215 | membar #Sync ! Added by membar checker (8) | |
2216 | ! Mem[0000000030081400] = 24000000 437ea2f2 0000c676 0000c676 | |
2217 | ! Mem[0000000030081410] = 76a6f0ed 000000ff 4ede5766 a3eab300 | |
2218 | ! Mem[0000000030081420] = 28daf880 2beb602a 1ca4efd8 dfa55c31 | |
2219 | ! Mem[0000000030081430] = 5431406a 62c6a8a2 22aff13a aefdb0b4 | |
2220 | ldda [%i2]ASI_BLK_AIUS,%f0 ! Block Load from 0000000030081400 | |
2221 | ! Mem[0000000030141408] = 23610000, %l7 = 0000000045a4f951 | |
2222 | ldsba [%i5+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
2223 | ! Mem[0000000010101410] = ff5542ff, %l7 = 0000000000000000 | |
2224 | ldsha [%i4+%o5]0x80,%l7 ! %l7 = ffffffffffffff55 | |
2225 | ! Mem[0000000030081400] = 24000000 437ea2f2 0000c676 0000c676 | |
2226 | ! Mem[0000000030081410] = 76a6f0ed 000000ff 4ede5766 a3eab300 | |
2227 | ! Mem[0000000030081420] = 28daf880 2beb602a 1ca4efd8 dfa55c31 | |
2228 | ! Mem[0000000030081430] = 5431406a 62c6a8a2 22aff13a aefdb0b4 | |
2229 | ldda [%i2]ASI_BLK_AIUSL,%f0 ! Block Load from 0000000030081400 | |
2230 | ! Mem[0000000010001408] = 120044cf, %f27 = 3262f1ff | |
2231 | lda [%i0+%o4]0x80,%f27 ! %f27 = 120044cf | |
2232 | ! Mem[0000000020800040] = ff127379, %l5 = 0000000000000065 | |
2233 | ldsba [%o1+0x040]%asi,%l5 ! %l5 = ffffffffffffffff | |
2234 | ! Mem[00000000100c1410] = 19778174, %l4 = 00000000000000fa | |
2235 | ldsha [%i3+%o5]0x80,%l4 ! %l4 = 0000000000001977 | |
2236 | ! Mem[0000000010081410] = 9b148fac8400ffff, %l3 = ffffffffffffc676 | |
2237 | ldxa [%i2+%o5]0x88,%l3 ! %l3 = 9b148fac8400ffff | |
2238 | ! Mem[0000000030081400] = 24000000 437ea2f2, %l0 = 284795cd, %l1 = cf440012 | |
2239 | ldda [%i2+%g0]0x81,%l0 ! %l0 = 0000000024000000 00000000437ea2f2 | |
2240 | ! Starting 10 instruction Store Burst | |
2241 | ! Mem[0000000010181410] = ff850483, %l3 = 9b148fac8400ffff | |
2242 | ldstuba [%i6+%o5]0x80,%l3 ! %l3 = 000000ff000000ff | |
2243 | ||
2244 | p0_label_52: | |
2245 | ! %l6 = ffffffffffffffa6, Mem[0000000030041400] = 4e000000 | |
2246 | stba %l6,[%i1+%g0]0x89 ! Mem[0000000030041400] = 4e0000a6 | |
2247 | ! %l6 = ffffffa6, %l7 = ffffff55, Mem[0000000030101400] = 51f9a445 c65ec2db | |
2248 | stda %l6,[%i4+%g0]0x89 ! Mem[0000000030101400] = ffffffa6 ffffff55 | |
2249 | ! %l4 = 00001977, %l5 = ffffffff, Mem[0000000030101410] = 0000ffff 510e7bd7 | |
2250 | stda %l4,[%i4+%o5]0x89 ! Mem[0000000030101410] = 00001977 ffffffff | |
2251 | ! Mem[0000000020800001] = 1d2e8470, %l6 = ffffffffffffffa6 | |
2252 | ldstub [%o1+0x001],%l6 ! %l6 = 0000002e000000ff | |
2253 | ! %f16 = fc734517 00000012, %l5 = ffffffffffffffff | |
2254 | ! Mem[00000000300c1420] = dd307d0632d89af4 | |
2255 | add %i3,0x020,%g1 | |
2256 | stda %f16,[%g1+%l5]ASI_PST8_SL ! Mem[00000000300c1420] = 12000000174573fc | |
2257 | ! %l5 = ffffffffffffffff, Mem[0000000010081410] = 8400ffff | |
2258 | stba %l5,[%i2+%o5]0x88 ! Mem[0000000010081410] = 8400ffff | |
2259 | ! %l6 = 0000002e, %l7 = ffffff55, Mem[0000000010101410] = ff5542ff 0000002e | |
2260 | stda %l6,[%i4+%o5]0x80 ! Mem[0000000010101410] = 0000002e ffffff55 | |
2261 | ! %l6 = 000000000000002e, Mem[00000000300c1408] = f1ba113a | |
2262 | stha %l6,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 002e113a | |
2263 | ! %l4 = 0000000000001977, Mem[0000000030141410] = ff004517 | |
2264 | stwa %l4,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00001977 | |
2265 | ! Starting 10 instruction Load Burst | |
2266 | ! Mem[00000000100c1410] = 19778174fc734517, %f22 = 1243bf8d ecb7b96f | |
2267 | ldd [%i3+%o5],%f22 ! %f22 = 19778174 fc734517 | |
2268 | ||
2269 | p0_label_53: | |
2270 | ! Mem[0000000010101408] = 56fe427e, %l0 = 0000000024000000 | |
2271 | lduwa [%i4+%o4]0x80,%l0 ! %l0 = 0000000056fe427e | |
2272 | ! Mem[0000000010081408] = 0000000000000000, %l3 = 00000000000000ff | |
2273 | ldxa [%i2+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
2274 | ! Mem[0000000010001408] = 120044cf, %l5 = ffffffffffffffff | |
2275 | ldub [%i0+0x009],%l5 ! %l5 = 0000000000000000 | |
2276 | ! Mem[0000000010181410] = ff850483, %l4 = 0000000000001977 | |
2277 | lduba [%i6+%o5]0x80,%l4 ! %l4 = 00000000000000ff | |
2278 | ! Mem[0000000010181438] = 2a1a930bc238965e, %l1 = 00000000437ea2f2 | |
2279 | ldx [%i6+0x038],%l1 ! %l1 = 2a1a930bc238965e | |
2280 | ! Mem[0000000010181410] = 76c9d21f 830485ff, %l4 = 000000ff, %l5 = 00000000 | |
2281 | ldda [%i6+%o5]0x88,%l4 ! %l4 = 00000000830485ff 0000000076c9d21f | |
2282 | ! Mem[0000000010181400] = d637dd6d 450000ff, %l0 = 56fe427e, %l1 = c238965e | |
2283 | ldda [%i6+%g0]0x88,%l0 ! %l0 = 00000000450000ff 00000000d637dd6d | |
2284 | ! Mem[0000000030001400] = db7e6dd7000000ff, %f22 = 19778174 fc734517 | |
2285 | ldda [%i0+%g0]0x89,%f22 ! %f22 = db7e6dd7 000000ff | |
2286 | ! Mem[00000000300c1408] = 002e113a, %l6 = 000000000000002e | |
2287 | lduha [%i3+%o4]0x81,%l6 ! %l6 = 000000000000002e | |
2288 | ! Starting 10 instruction Store Burst | |
2289 | ! %l2 = 00000024, %l3 = 00000000, Mem[0000000010141408] = 6123c459 da066e7d | |
2290 | stda %l2,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000024 00000000 | |
2291 | ||
2292 | p0_label_54: | |
2293 | ! Mem[0000000030001408] = 4e9ddc12, %l4 = 00000000830485ff | |
2294 | ldstuba [%i0+%o4]0x89,%l4 ! %l4 = 00000012000000ff | |
2295 | ! %l1 = 00000000d637dd6d, Mem[00000000300c1408] = 3a112e00 | |
2296 | stha %l1,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 3a11dd6d | |
2297 | ! %l6 = 0000002e, %l7 = ffffff55, Mem[0000000030101410] = 77190000 ffffffff | |
2298 | stda %l6,[%i4+%o5]0x81 ! Mem[0000000030101410] = 0000002e ffffff55 | |
2299 | ! Mem[00000000100c1400] = b23ce7ff, %l6 = 000000000000002e | |
2300 | swapa [%i3+%g0]0x88,%l6 ! %l6 = 00000000b23ce7ff | |
2301 | ! %l3 = 0000000000000000, Mem[00000000211c0000] = 44cf1a4c | |
2302 | sth %l3,[%o2+%g0] ! Mem[00000000211c0000] = 00001a4c | |
2303 | ! Mem[0000000030181410] = 8dbf4312, %l4 = 0000000000000012 | |
2304 | swapa [%i6+%o5]0x89,%l4 ! %l4 = 000000008dbf4312 | |
2305 | ! %f20 = 4983b035 174573fc, %l5 = 0000000076c9d21f | |
2306 | ! Mem[0000000010041418] = 0000c676284795cd | |
2307 | add %i1,0x018,%g1 | |
2308 | stda %f20,[%g1+%l5]ASI_PST16_PL ! Mem[0000000010041418] = fc73451735b08349 | |
2309 | ! Mem[0000000030141400] = 4e9d04a5, %l0 = 00000000450000ff | |
2310 | ldstuba [%i5+%g0]0x89,%l0 ! %l0 = 000000a5000000ff | |
2311 | ! Mem[000000001014141c] = a73028c1, %l2 = 0000000000000024 | |
2312 | swap [%i5+0x01c],%l2 ! %l2 = 00000000a73028c1 | |
2313 | ! Starting 10 instruction Load Burst | |
2314 | ! Mem[0000000010101408] = 56fe427e7d307e94, %f22 = db7e6dd7 000000ff | |
2315 | ldda [%i4+0x008]%asi,%f22 ! %f22 = 56fe427e 7d307e94 | |
2316 | ||
2317 | p0_label_55: | |
2318 | ! Mem[00000000300c1400] = ff1d0000 a73028c1, %l4 = 8dbf4312, %l5 = 76c9d21f | |
2319 | ldda [%i3+%g0]0x81,%l4 ! %l4 = 00000000ff1d0000 00000000a73028c1 | |
2320 | ! Mem[0000000010141408] = 24000000, %f28 = 7d6e06da | |
2321 | lda [%i5+%o4]0x88,%f28 ! %f28 = 24000000 | |
2322 | ! Mem[0000000030101408] = 000000ff, %l0 = 00000000000000a5 | |
2323 | ldsba [%i4+%o4]0x89,%l0 ! %l0 = ffffffffffffffff | |
2324 | ! Mem[00000000218001c0] = faf32a00, %l1 = 00000000d637dd6d | |
2325 | lduha [%o3+0x1c0]%asi,%l1 ! %l1 = 000000000000faf3 | |
2326 | ! Mem[00000000100c1408] = dfa6f0ed000000ff, %l7 = ffffffffffffff55 | |
2327 | ldxa [%i3+%o4]0x80,%l7 ! %l7 = dfa6f0ed000000ff | |
2328 | ! Mem[00000000100c1400] = 2e000000, %l3 = 0000000000000000 | |
2329 | ldsba [%i3+0x003]%asi,%l3 ! %l3 = 0000000000000000 | |
2330 | ! Mem[00000000300c1408] = 6ddd113a76c6c4fc, %l2 = 00000000a73028c1 | |
2331 | ldxa [%i3+%o4]0x81,%l2 ! %l2 = 6ddd113a76c6c4fc | |
2332 | ! Mem[00000000100c1408] = dfa6f0ed, %l4 = 00000000ff1d0000 | |
2333 | ldswa [%i3+%o4]0x80,%l4 ! %l4 = ffffffffdfa6f0ed | |
2334 | membar #Sync ! Added by membar checker (9) | |
2335 | ! Mem[0000000030041400] = a600004e b23ce724 12000000 edf0a6df | |
2336 | ! Mem[0000000030041410] = c976ff12 00000000 73200d07 b792cdbe | |
2337 | ! Mem[0000000030041420] = 665ebb76 41c3b07b 4bf8b753 b8f773a1 | |
2338 | ! Mem[0000000030041430] = 00715eb7 d1d23403 cdf93c40 557d4e6a | |
2339 | ldda [%i1]ASI_BLK_AIUSL,%f0 ! Block Load from 0000000030041400 | |
2340 | ! Starting 10 instruction Store Burst | |
2341 | ! Mem[000000001000141b] = 9c5199ef, %l3 = 0000000000000000 | |
2342 | ldstuba [%i0+0x01b]%asi,%l3 ! %l3 = 000000ef000000ff | |
2343 | ||
2344 | ! Check Point 11 for processor 0 | |
2345 | ||
2346 | set p0_check_pt_data_11,%g4 | |
2347 | rd %ccr,%g5 ! %g5 = 44 | |
2348 | ldx [%g4+0x08],%g2 | |
2349 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
2350 | bne %xcc,p0_reg_check_fail0 | |
2351 | mov 0xee0,%g1 | |
2352 | ldx [%g4+0x10],%g2 | |
2353 | cmp %l1,%g2 ! %l1 = 000000000000faf3 | |
2354 | bne %xcc,p0_reg_check_fail1 | |
2355 | mov 0xee1,%g1 | |
2356 | ldx [%g4+0x18],%g2 | |
2357 | cmp %l2,%g2 ! %l2 = 6ddd113a76c6c4fc | |
2358 | bne %xcc,p0_reg_check_fail2 | |
2359 | mov 0xee2,%g1 | |
2360 | ldx [%g4+0x20],%g2 | |
2361 | cmp %l3,%g2 ! %l3 = 00000000000000ef | |
2362 | bne %xcc,p0_reg_check_fail3 | |
2363 | mov 0xee3,%g1 | |
2364 | ldx [%g4+0x28],%g2 | |
2365 | cmp %l4,%g2 ! %l4 = ffffffffdfa6f0ed | |
2366 | bne %xcc,p0_reg_check_fail4 | |
2367 | mov 0xee4,%g1 | |
2368 | ldx [%g4+0x30],%g2 | |
2369 | cmp %l5,%g2 ! %l5 = 00000000a73028c1 | |
2370 | bne %xcc,p0_reg_check_fail5 | |
2371 | mov 0xee5,%g1 | |
2372 | ldx [%g4+0x38],%g2 | |
2373 | cmp %l6,%g2 ! %l6 = 00000000b23ce7ff | |
2374 | bne %xcc,p0_reg_check_fail6 | |
2375 | mov 0xee6,%g1 | |
2376 | ldx [%g4+0x40],%g2 | |
2377 | cmp %l7,%g2 ! %l7 = dfa6f0ed000000ff | |
2378 | bne %xcc,p0_reg_check_fail7 | |
2379 | mov 0xee7,%g1 | |
2380 | ldx [%g4+0x48],%g3 | |
2381 | std %f0,[%g4] | |
2382 | ldx [%g4],%g2 | |
2383 | cmp %g3,%g2 ! %f0 = 24e73cb2 4e0000a6 | |
2384 | bne %xcc,p0_freg_check_fail | |
2385 | mov 0xf00,%g1 | |
2386 | ldx [%g4+0x50],%g3 | |
2387 | std %f2,[%g4] | |
2388 | ldx [%g4],%g2 | |
2389 | cmp %g3,%g2 ! %f2 = dfa6f0ed 00000012 | |
2390 | bne %xcc,p0_freg_check_fail | |
2391 | mov 0xf02,%g1 | |
2392 | ldx [%g4+0x58],%g3 | |
2393 | std %f4,[%g4] | |
2394 | ldx [%g4],%g2 | |
2395 | cmp %g3,%g2 ! %f4 = 00000000 12ff76c9 | |
2396 | bne %xcc,p0_freg_check_fail | |
2397 | mov 0xf04,%g1 | |
2398 | ldx [%g4+0x60],%g3 | |
2399 | std %f6,[%g4] | |
2400 | ldx [%g4],%g2 | |
2401 | cmp %g3,%g2 ! %f6 = becd92b7 070d2073 | |
2402 | bne %xcc,p0_freg_check_fail | |
2403 | mov 0xf06,%g1 | |
2404 | ldx [%g4+0x68],%g3 | |
2405 | std %f8,[%g4] | |
2406 | ldx [%g4],%g2 | |
2407 | cmp %g3,%g2 ! %f8 = 7bb0c341 76bb5e66 | |
2408 | bne %xcc,p0_freg_check_fail | |
2409 | mov 0xf08,%g1 | |
2410 | ldx [%g4+0x70],%g3 | |
2411 | std %f10,[%g4] | |
2412 | ldx [%g4],%g2 | |
2413 | cmp %g3,%g2 ! %f10 = a173f7b8 53b7f84b | |
2414 | bne %xcc,p0_freg_check_fail | |
2415 | mov 0xf10,%g1 | |
2416 | ldx [%g4+0x78],%g3 | |
2417 | std %f12,[%g4] | |
2418 | ldx [%g4],%g2 | |
2419 | cmp %g3,%g2 ! %f12 = 0334d2d1 b75e7100 | |
2420 | bne %xcc,p0_freg_check_fail | |
2421 | mov 0xf12,%g1 | |
2422 | ldx [%g4+0x80],%g3 | |
2423 | std %f14,[%g4] | |
2424 | ldx [%g4],%g2 | |
2425 | cmp %g3,%g2 ! %f14 = 6a4e7d55 403cf9cd | |
2426 | bne %xcc,p0_freg_check_fail | |
2427 | mov 0xf14,%g1 | |
2428 | ldx [%g4+0x88],%g3 | |
2429 | std %f22,[%g4] | |
2430 | ldx [%g4],%g2 | |
2431 | cmp %g3,%g2 ! %f22 = 56fe427e 7d307e94 | |
2432 | bne %xcc,p0_freg_check_fail | |
2433 | mov 0xf22,%g1 | |
2434 | ldx [%g4+0x90],%g3 | |
2435 | std %f26,[%g4] | |
2436 | ldx [%g4],%g2 | |
2437 | cmp %g3,%g2 ! %f26 = 6fb9b7ec 120044cf | |
2438 | bne %xcc,p0_freg_check_fail | |
2439 | mov 0xf26,%g1 | |
2440 | ldx [%g4+0x98],%g3 | |
2441 | std %f28,[%g4] | |
2442 | ldx [%g4],%g2 | |
2443 | cmp %g3,%g2 ! %f28 = 24000000 59c42361 | |
2444 | bne %xcc,p0_freg_check_fail | |
2445 | mov 0xf28,%g1 | |
2446 | ||
2447 | ! Check Point 11 completed | |
2448 | ||
2449 | ||
2450 | p0_label_56: | |
2451 | ! Mem[0000000010181408] = fc734517, %l0 = ffffffffffffffff | |
2452 | ldstuba [%i6+%o4]0x88,%l0 ! %l0 = 00000017000000ff | |
2453 | ! %l3 = 00000000000000ef, Mem[0000000010081408] = 00000000 | |
2454 | stwa %l3,[%i2+%o4]0x88 ! Mem[0000000010081408] = 000000ef | |
2455 | ! %l6 = 00000000b23ce7ff, Mem[0000000010181400] = ff000045 | |
2456 | stba %l6,[%i6+%g0]0x80 ! Mem[0000000010181400] = ff000045 | |
2457 | ! Mem[0000000030001408] = ffdc9d4e, %l0 = 0000000000000017 | |
2458 | ldstuba [%i0+%o4]0x81,%l0 ! %l0 = 000000ff000000ff | |
2459 | ! Mem[0000000030141408] = 23610000, %l2 = 6ddd113a76c6c4fc | |
2460 | swapa [%i5+%o4]0x89,%l2 ! %l2 = 0000000023610000 | |
2461 | ! Mem[000000001014142b] = 4e239ae6, %l3 = 00000000000000ef | |
2462 | ldstuba [%i5+0x02b]%asi,%l3 ! %l3 = 000000e6000000ff | |
2463 | ! Mem[0000000010101404] = 0b931a2a, %l3 = 00000000000000e6, %asi = 80 | |
2464 | swapa [%i4+0x004]%asi,%l3 ! %l3 = 000000000b931a2a | |
2465 | ! Mem[0000000030081400] = 00000024, %l0 = 00000000000000ff | |
2466 | ldstuba [%i2+%g0]0x89,%l0 ! %l0 = 00000024000000ff | |
2467 | ! %f16 = fc734517 00000012, %l5 = 00000000a73028c1 | |
2468 | ! Mem[00000000300c1400] = ff1d0000a73028c1 | |
2469 | stda %f16,[%i3+%l5]ASI_PST8_SL ! Mem[00000000300c1400] = 121d0000a73073fc | |
2470 | ! Starting 10 instruction Load Burst | |
2471 | ! Mem[0000000010041408] = 4e000000, %f16 = fc734517 | |
2472 | lda [%i1+%o4]0x80,%f16 ! %f16 = 4e000000 | |
2473 | ||
2474 | p0_label_57: | |
2475 | ! Mem[0000000021800100] = f1dd11d1, %l5 = 00000000a73028c1 | |
2476 | ldsba [%o3+0x101]%asi,%l5 ! %l5 = ffffffffffffffdd | |
2477 | ! Mem[0000000030181400] = ff000000, %l3 = 000000000b931a2a | |
2478 | ldswa [%i6+%g0]0x81,%l3 ! %l3 = ffffffffff000000 | |
2479 | ! Mem[0000000010001438] = 93f8cfd1 0b65ade6, %l2 = 23610000, %l3 = ff000000 | |
2480 | ldd [%i0+0x038],%l2 ! %l2 = 0000000093f8cfd1 000000000b65ade6 | |
2481 | ! Mem[00000000300c1410] = 6fb9b7ec9aa4cfff, %l2 = 0000000093f8cfd1 | |
2482 | ldxa [%i3+%o5]0x89,%l2 ! %l2 = 6fb9b7ec9aa4cfff | |
2483 | ! Mem[00000000300c1408] = 6ddd113a76c6c4fc, %f14 = 6a4e7d55 403cf9cd | |
2484 | ldda [%i3+%o4]0x81,%f14 ! %f14 = 6ddd113a 76c6c4fc | |
2485 | ! Mem[00000000300c1408] = 6ddd113a, %f10 = a173f7b8 | |
2486 | lda [%i3+%o4]0x81,%f10 ! %f10 = 6ddd113a | |
2487 | ! Mem[0000000030041410] = c976ff12, %l1 = 000000000000faf3 | |
2488 | lduba [%i1+%o5]0x81,%l1 ! %l1 = 00000000000000c9 | |
2489 | ! Mem[0000000010001410] = ff000000, %f26 = 6fb9b7ec | |
2490 | lda [%i0+%o5]0x80,%f26 ! %f26 = ff000000 | |
2491 | ! Mem[0000000030101408] = ff000000, %l0 = 0000000000000024 | |
2492 | ldsba [%i4+%o4]0x81,%l0 ! %l0 = ffffffffffffffff | |
2493 | ! Starting 10 instruction Store Burst | |
2494 | ! %f29 = 59c42361, Mem[0000000010181400] = ff000045 | |
2495 | sta %f29,[%i6+%g0]0x80 ! Mem[0000000010181400] = 59c42361 | |
2496 | ||
2497 | p0_label_58: | |
2498 | ! %f11 = 53b7f84b, Mem[0000000010041400] = 00000000 | |
2499 | sta %f11,[%i1+%g0]0x80 ! Mem[0000000010041400] = 53b7f84b | |
2500 | ! %l4 = dfa6f0ed, %l5 = ffffffdd, Mem[0000000010041400] = 53b7f84b fc734517 | |
2501 | stda %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = dfa6f0ed ffffffdd | |
2502 | ! %f4 = 00000000 12ff76c9, Mem[0000000010101420] = cd6765be 446d5ace | |
2503 | stda %f4 ,[%i4+0x020]%asi ! Mem[0000000010101420] = 00000000 12ff76c9 | |
2504 | ! %f16 = 4e000000 00000012, %l2 = 6fb9b7ec9aa4cfff | |
2505 | ! Mem[0000000030181430] = fcc4c6769890e1fb | |
2506 | add %i6,0x030,%g1 | |
2507 | stda %f16,[%g1+%l2]ASI_PST16_S ! Mem[0000000030181430] = 4e00000000000012 | |
2508 | ! Mem[0000000030081410] = edf0a676, %l3 = 000000000b65ade6 | |
2509 | swapa [%i2+%o5]0x89,%l3 ! %l3 = 00000000edf0a676 | |
2510 | ! %l4 = ffffffffdfa6f0ed, Mem[0000000010101410] = 0000002e | |
2511 | stha %l4,[%i4+%o5]0x80 ! Mem[0000000010101410] = f0ed002e | |
2512 | ! Mem[000000001018143c] = c238965e, %l5 = ffffffffffffffdd | |
2513 | swap [%i6+0x03c],%l5 ! %l5 = 00000000c238965e | |
2514 | ! Mem[0000000010081400] = df90cea6, %l4 = ffffffffdfa6f0ed | |
2515 | ldstuba [%i2+%g0]0x88,%l4 ! %l4 = 000000a6000000ff | |
2516 | ! %f12 = 0334d2d1 b75e7100, %l7 = dfa6f0ed000000ff | |
2517 | ! Mem[0000000010001428] = fff16232ecb7b96f | |
2518 | add %i0,0x028,%g1 | |
2519 | stda %f12,[%g1+%l7]ASI_PST32_PL ! Mem[0000000010001428] = 00715eb7d1d23403 | |
2520 | ! Starting 10 instruction Load Burst | |
2521 | ! Mem[00000000300c1400] = 121d0000, %l1 = 00000000000000c9 | |
2522 | ldswa [%i3+%g0]0x81,%l1 ! %l1 = 00000000121d0000 | |
2523 | ||
2524 | p0_label_59: | |
2525 | ! Mem[0000000030101410] = 0000002e, %l5 = 00000000c238965e | |
2526 | ldswa [%i4+%o5]0x81,%l5 ! %l5 = 000000000000002e | |
2527 | ! Mem[00000000100c1410] = 19778174, %l5 = 000000000000002e | |
2528 | ldsha [%i3+%o5]0x80,%l5 ! %l5 = 0000000000001977 | |
2529 | ! Mem[0000000030141408] = 76c6c4fc, %l2 = 6fb9b7ec9aa4cfff | |
2530 | ldsha [%i5+%o4]0x89,%l2 ! %l2 = ffffffffffffc4fc | |
2531 | ! Mem[0000000030001400] = ff000000, %l4 = 00000000000000a6 | |
2532 | lduha [%i0+%g0]0x81,%l4 ! %l4 = 000000000000ff00 | |
2533 | ! Mem[0000000030141410] = 77190000, %l6 = 00000000b23ce7ff | |
2534 | ldswa [%i5+%o5]0x89,%l6 ! %l6 = 0000000077190000 | |
2535 | ! Mem[0000000010101418] = 50d30000, %l6 = 0000000077190000 | |
2536 | ldswa [%i4+0x018]%asi,%l6 ! %l6 = 0000000050d30000 | |
2537 | ! Mem[00000000300c1410] = 9aa4cfff, %l1 = 00000000121d0000 | |
2538 | ldsba [%i3+%o5]0x89,%l1 ! %l1 = ffffffffffffffff | |
2539 | ! Mem[0000000010181404] = 6ddd37d6, %l6 = 0000000050d30000 | |
2540 | ldswa [%i6+0x004]%asi,%l6 ! %l6 = 000000006ddd37d6 | |
2541 | ! Mem[0000000010141410] = 7a2e516819778174, %f10 = 6ddd113a 53b7f84b | |
2542 | ldda [%i5+%o5]0x88,%f10 ! %f10 = 7a2e5168 19778174 | |
2543 | ! Starting 10 instruction Store Burst | |
2544 | ! Mem[0000000030081410] = 0b65ade6, %l3 = 00000000edf0a676 | |
2545 | ldstuba [%i2+%o5]0x89,%l3 ! %l3 = 000000e6000000ff | |
2546 | ||
2547 | p0_label_60: | |
2548 | ! Mem[0000000010041424] = 2164489c, %l3 = 00000000000000e6 | |
2549 | swap [%i1+0x024],%l3 ! %l3 = 000000002164489c | |
2550 | ! %l2 = ffffffffffffc4fc, Mem[0000000010081400] = df90ceff | |
2551 | stwa %l2,[%i2+%g0]0x88 ! Mem[0000000010081400] = ffffc4fc | |
2552 | ! %f7 = 070d2073, Mem[0000000030141400] = 4e9d04ff | |
2553 | sta %f7 ,[%i5+%g0]0x89 ! Mem[0000000030141400] = 070d2073 | |
2554 | ! Mem[0000000010001400] = cf9d04a5, %l5 = 0000000000001977 | |
2555 | swapa [%i0+%g0]0x80,%l5 ! %l5 = 00000000cf9d04a5 | |
2556 | ! Mem[0000000030081408] = 76c60000, %l6 = 000000006ddd37d6 | |
2557 | ldstuba [%i2+%o4]0x89,%l6 ! %l6 = 00000000000000ff | |
2558 | ! %l5 = 00000000cf9d04a5, Mem[0000000010141424] = 62e08b74 | |
2559 | stw %l5,[%i5+0x024] ! Mem[0000000010141424] = cf9d04a5 | |
2560 | ! Mem[0000000010141410] = 19778174, %l4 = 000000000000ff00 | |
2561 | swapa [%i5+%o5]0x88,%l4 ! %l4 = 0000000019778174 | |
2562 | ! %l2 = ffffffffffffc4fc, Mem[0000000010141400] = d1cff893 | |
2563 | stba %l2,[%i5+%g0]0x88 ! Mem[0000000010141400] = d1cff8fc | |
2564 | ! %l2 = ffffffffffffc4fc, Mem[00000000300c1410] = ffcfa49a | |
2565 | stha %l2,[%i3+%o5]0x81 ! Mem[00000000300c1410] = c4fca49a | |
2566 | ! Starting 10 instruction Load Burst | |
2567 | ! Mem[00000000300c1408] = 6ddd113a 76c6c4fc, %l6 = 00000000, %l7 = 000000ff | |
2568 | ldda [%i3+%o4]0x81,%l6 ! %l6 = 000000006ddd113a 0000000076c6c4fc | |
2569 | ||
2570 | ! Check Point 12 for processor 0 | |
2571 | ||
2572 | set p0_check_pt_data_12,%g4 | |
2573 | rd %ccr,%g5 ! %g5 = 44 | |
2574 | ldx [%g4+0x08],%g2 | |
2575 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
2576 | bne %xcc,p0_reg_check_fail0 | |
2577 | mov 0xee0,%g1 | |
2578 | ldx [%g4+0x10],%g2 | |
2579 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
2580 | bne %xcc,p0_reg_check_fail1 | |
2581 | mov 0xee1,%g1 | |
2582 | ldx [%g4+0x18],%g2 | |
2583 | cmp %l2,%g2 ! %l2 = ffffffffffffc4fc | |
2584 | bne %xcc,p0_reg_check_fail2 | |
2585 | mov 0xee2,%g1 | |
2586 | ldx [%g4+0x20],%g2 | |
2587 | cmp %l3,%g2 ! %l3 = 000000002164489c | |
2588 | bne %xcc,p0_reg_check_fail3 | |
2589 | mov 0xee3,%g1 | |
2590 | ldx [%g4+0x28],%g2 | |
2591 | cmp %l4,%g2 ! %l4 = 0000000019778174 | |
2592 | bne %xcc,p0_reg_check_fail4 | |
2593 | mov 0xee4,%g1 | |
2594 | ldx [%g4+0x30],%g2 | |
2595 | cmp %l5,%g2 ! %l5 = 00000000cf9d04a5 | |
2596 | bne %xcc,p0_reg_check_fail5 | |
2597 | mov 0xee5,%g1 | |
2598 | ldx [%g4+0x38],%g2 | |
2599 | cmp %l6,%g2 ! %l6 = 000000006ddd113a | |
2600 | bne %xcc,p0_reg_check_fail6 | |
2601 | mov 0xee6,%g1 | |
2602 | ldx [%g4+0x40],%g3 | |
2603 | std %f2,[%g4] | |
2604 | ldx [%g4],%g2 | |
2605 | cmp %g3,%g2 ! %f2 = dfa6f0ed 00000012 | |
2606 | bne %xcc,p0_freg_check_fail | |
2607 | mov 0xf02,%g1 | |
2608 | ldx [%g4+0x48],%g3 | |
2609 | std %f6,[%g4] | |
2610 | ldx [%g4],%g2 | |
2611 | cmp %g3,%g2 ! %f6 = becd92b7 070d2073 | |
2612 | bne %xcc,p0_freg_check_fail | |
2613 | mov 0xf06,%g1 | |
2614 | ldx [%g4+0x50],%g3 | |
2615 | std %f10,[%g4] | |
2616 | ldx [%g4],%g2 | |
2617 | cmp %g3,%g2 ! %f10 = 7a2e5168 19778174 | |
2618 | bne %xcc,p0_freg_check_fail | |
2619 | mov 0xf10,%g1 | |
2620 | ldx [%g4+0x58],%g3 | |
2621 | std %f14,[%g4] | |
2622 | ldx [%g4],%g2 | |
2623 | cmp %g3,%g2 ! %f14 = 6ddd113a 76c6c4fc | |
2624 | bne %xcc,p0_freg_check_fail | |
2625 | mov 0xf14,%g1 | |
2626 | ldx [%g4+0x60],%g3 | |
2627 | std %f16,[%g4] | |
2628 | ldx [%g4],%g2 | |
2629 | cmp %g3,%g2 ! %f16 = 4e000000 00000012 | |
2630 | bne %xcc,p0_freg_check_fail | |
2631 | mov 0xf16,%g1 | |
2632 | ldx [%g4+0x68],%g3 | |
2633 | std %f26,[%g4] | |
2634 | ldx [%g4],%g2 | |
2635 | cmp %g3,%g2 ! %f26 = ff000000 120044cf | |
2636 | bne %xcc,p0_freg_check_fail | |
2637 | mov 0xf26,%g1 | |
2638 | ||
2639 | ! Check Point 12 completed | |
2640 | ||
2641 | ||
2642 | p0_label_61: | |
2643 | ! Mem[0000000010001408] = 120044cf, %l0 = ffffffffffffffff | |
2644 | ldsha [%i0+0x00a]%asi,%l0 ! %l0 = 00000000000044cf | |
2645 | ! Mem[0000000010081418] = 738700e3, %l0 = 00000000000044cf | |
2646 | lduh [%i2+0x01a],%l0 ! %l0 = 00000000000000e3 | |
2647 | ! Mem[0000000010101400] = 5e9638c2, %f5 = 12ff76c9 | |
2648 | lda [%i4+0x000]%asi,%f5 ! %f5 = 5e9638c2 | |
2649 | ! Mem[0000000030041400] = a600004e b23ce724, %l2 = ffffc4fc, %l3 = 2164489c | |
2650 | ldda [%i1+%g0]0x81,%l2 ! %l2 = 00000000a600004e 00000000b23ce724 | |
2651 | ! Mem[0000000010101408] = 7e42fe56, %l1 = ffffffffffffffff | |
2652 | ldsha [%i4+%o4]0x88,%l1 ! %l1 = fffffffffffffe56 | |
2653 | ! Mem[00000000300c1410] = c4fca49aecb7b96f, %l6 = 000000006ddd113a | |
2654 | ldxa [%i3+%o5]0x81,%l6 ! %l6 = c4fca49aecb7b96f | |
2655 | ! Mem[00000000300c1400] = 121d0000, %l1 = fffffffffffffe56 | |
2656 | ldswa [%i3+%g0]0x81,%l1 ! %l1 = 00000000121d0000 | |
2657 | ! Mem[0000000030081408] = ff00c676, %l2 = 00000000a600004e | |
2658 | lduba [%i2+%o4]0x81,%l2 ! %l2 = 00000000000000ff | |
2659 | ! Mem[00000000300c1400] = 00001d12, %f7 = 070d2073 | |
2660 | lda [%i3+%g0]0x89,%f7 ! %f7 = 00001d12 | |
2661 | ! Starting 10 instruction Store Burst | |
2662 | ! %f6 = becd92b7 00001d12, Mem[0000000030141408] = fcc4c676 d6740000 | |
2663 | stda %f6 ,[%i5+%o4]0x81 ! Mem[0000000030141408] = becd92b7 00001d12 | |
2664 | ||
2665 | p0_label_62: | |
2666 | ! %l2 = 00000000000000ff, Mem[00000000100c1428] = a173f7b8, %asi = 80 | |
2667 | stba %l2,[%i3+0x028]%asi ! Mem[00000000100c1428] = ff73f7b8 | |
2668 | ! Mem[0000000010081400] = ffffc4fc, %l0 = 00000000000000e3 | |
2669 | swapa [%i2+%g0]0x88,%l0 ! %l0 = 00000000ffffc4fc | |
2670 | ! %l1 = 00000000121d0000, Mem[0000000010001424] = 6ddd37d6, %asi = 80 | |
2671 | stba %l1,[%i0+0x024]%asi ! Mem[0000000010001424] = 00dd37d6 | |
2672 | ! %l1 = 00000000121d0000, Mem[00000000300c1408] = 6ddd113a | |
2673 | stha %l1,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 0000113a | |
2674 | ! %f26 = ff000000, Mem[0000000010101408] = 56fe427e | |
2675 | sta %f26,[%i4+%o4]0x80 ! Mem[0000000010101408] = ff000000 | |
2676 | ! %f18 = ff1d0000, Mem[0000000010181424] = 2164489c | |
2677 | st %f18,[%i6+0x024] ! Mem[0000000010181424] = ff1d0000 | |
2678 | ! %l7 = 0000000076c6c4fc, Mem[0000000030101408] = ff000000 | |
2679 | stba %l7,[%i4+%o4]0x81 ! Mem[0000000030101408] = fc000000 | |
2680 | ! %f22 = 56fe427e, Mem[00000000100c1408] = dfa6f0ed | |
2681 | sta %f22,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 56fe427e | |
2682 | ! Mem[0000000010001400] = 00001977, %l2 = 00000000000000ff | |
2683 | ldstuba [%i0+%g0]0x80,%l2 ! %l2 = 00000000000000ff | |
2684 | ! Starting 10 instruction Load Burst | |
2685 | ! Mem[0000000010141410] = 0000ff00, %l1 = 00000000121d0000 | |
2686 | lduwa [%i5+%o5]0x88,%l1 ! %l1 = 000000000000ff00 | |
2687 | ||
2688 | p0_label_63: | |
2689 | ! Mem[0000000010081428] = 9bc60b6d7d307e94, %l1 = 000000000000ff00 | |
2690 | ldxa [%i2+0x028]%asi,%l1 ! %l1 = 9bc60b6d7d307e94 | |
2691 | ! Mem[0000000021800140] = 19001df6, %l4 = 0000000019778174 | |
2692 | ldsb [%o3+0x140],%l4 ! %l4 = 0000000000000019 | |
2693 | ! Mem[0000000010001410] = ff000000, %f17 = 00000012 | |
2694 | lda [%i0+0x010]%asi,%f17 ! %f17 = ff000000 | |
2695 | ! Mem[0000000010001408] = cf440012, %l1 = 9bc60b6d7d307e94 | |
2696 | ldsha [%i0+%o4]0x88,%l1 ! %l1 = 0000000000000012 | |
2697 | ! Mem[0000000010001400] = 771900ff, %f2 = dfa6f0ed | |
2698 | lda [%i0+%g0]0x88,%f2 ! %f2 = 771900ff | |
2699 | ! Mem[0000000010181404] = 6ddd37d6, %l4 = 0000000000000019 | |
2700 | ldsb [%i6+0x004],%l4 ! %l4 = 000000000000006d | |
2701 | ! Mem[00000000100c1400] = 2e000000, %l4 = 000000000000006d | |
2702 | lduba [%i3+%g0]0x80,%l4 ! %l4 = 000000000000002e | |
2703 | ! Mem[0000000030081408] = 76c600ff, %l5 = 00000000cf9d04a5 | |
2704 | ldsba [%i2+%o4]0x89,%l5 ! %l5 = ffffffffffffffff | |
2705 | ! Mem[0000000030181400] = 4a1fbeb6000000ff, %l3 = 00000000b23ce724 | |
2706 | ldxa [%i6+%g0]0x89,%l3 ! %l3 = 4a1fbeb6000000ff | |
2707 | ! Starting 10 instruction Store Burst | |
2708 | ! %l0 = 00000000ffffc4fc, Mem[0000000030101410] = 2e000000 | |
2709 | stha %l0,[%i4+%o5]0x89 ! Mem[0000000030101410] = 2e00c4fc | |
2710 | ||
2711 | p0_label_64: | |
2712 | ! Mem[00000000218001c0] = faf32a00, %l4 = 000000000000002e | |
2713 | ldstuba [%o3+0x1c0]%asi,%l4 ! %l4 = 000000fa000000ff | |
2714 | ! Mem[00000000201c0001] = dcff9457, %l0 = 00000000ffffc4fc | |
2715 | ldstub [%o0+0x001],%l0 ! %l0 = 000000ff000000ff | |
2716 | ! %f4 = 00000000 5e9638c2, Mem[0000000010041410] = 4e9d04a5 0e39f730 | |
2717 | stda %f4 ,[%i1+%o5]0x88 ! Mem[0000000010041410] = 00000000 5e9638c2 | |
2718 | ! %l6 = c4fca49aecb7b96f, Mem[0000000030141410] = 00001977 | |
2719 | stha %l6,[%i5+%o5]0x81 ! Mem[0000000030141410] = b96f1977 | |
2720 | ! %l4 = 00000000000000fa, Mem[0000000010081400] = 000000e3 | |
2721 | stha %l4,[%i2+%g0]0x88 ! Mem[0000000010081400] = 000000fa | |
2722 | ! %l7 = 0000000076c6c4fc, Mem[0000000010081400] = fa000000 | |
2723 | stba %l7,[%i2+%g0]0x80 ! Mem[0000000010081400] = fc000000 | |
2724 | ! %l7 = 0000000076c6c4fc, Mem[00000000300c1408] = 0000113a | |
2725 | stwa %l7,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 76c6c4fc | |
2726 | ! %f4 = 00000000 5e9638c2, %l6 = c4fca49aecb7b96f | |
2727 | ! Mem[00000000300c1438] = f57273548f16a41a | |
2728 | add %i3,0x038,%g1 | |
2729 | stda %f4,[%g1+%l6]ASI_PST8_SL ! Mem[00000000300c1438] = c238965e8f00001a | |
2730 | ! %l5 = ffffffffffffffff, Mem[0000000030081400] = ff000000 | |
2731 | stba %l5,[%i2+%g0]0x81 ! Mem[0000000030081400] = ff000000 | |
2732 | ! Starting 10 instruction Load Burst | |
2733 | ! Mem[0000000030181408] = ff0000003262f1ff, %f30 = e6ad650b d1cff893 | |
2734 | ldda [%i6+%o4]0x81,%f30 ! %f30 = ff000000 3262f1ff | |
2735 | ||
2736 | p0_label_65: | |
2737 | ! Mem[0000000030041408] = dfa6f0ed00000012, %l3 = 4a1fbeb6000000ff | |
2738 | ldxa [%i1+%o4]0x89,%l3 ! %l3 = dfa6f0ed00000012 | |
2739 | ! Mem[00000000100c1410] = 19778174fc734517, %l1 = 0000000000000012 | |
2740 | ldxa [%i3+%o5]0x80,%l1 ! %l1 = 19778174fc734517 | |
2741 | ! Mem[00000000100c1400] = 2e000000, %l5 = ffffffffffffffff | |
2742 | ldswa [%i3+%g0]0x80,%l5 ! %l5 = 000000002e000000 | |
2743 | ! Mem[00000000100c1410] = 19778174, %l0 = 00000000000000ff | |
2744 | ldsha [%i3+0x010]%asi,%l0 ! %l0 = 0000000000001977 | |
2745 | ! Mem[00000000300c1400] = 00001d12, %l2 = 0000000000000000 | |
2746 | lduba [%i3+%g0]0x89,%l2 ! %l2 = 0000000000000012 | |
2747 | ! Mem[0000000030101410] = fcc4002e, %l5 = 000000002e000000 | |
2748 | lduha [%i4+%o5]0x81,%l5 ! %l5 = 000000000000fcc4 | |
2749 | ! Mem[0000000010001408] = 120044cf8304855a, %l4 = 00000000000000fa | |
2750 | ldxa [%i0+%o4]0x80,%l4 ! %l4 = 120044cf8304855a | |
2751 | ! Mem[0000000010101408] = ff000000, %l2 = 0000000000000012 | |
2752 | ldswa [%i4+%o4]0x80,%l2 ! %l2 = ffffffffff000000 | |
2753 | ! Mem[0000000010041408] = 0000004e, %l4 = 120044cf8304855a | |
2754 | lduha [%i1+%o4]0x88,%l4 ! %l4 = 000000000000004e | |
2755 | ! Starting 10 instruction Store Burst | |
2756 | ! Mem[00000000300c1408] = 76c6c4fc, %l3 = dfa6f0ed00000012 | |
2757 | swapa [%i3+%o4]0x81,%l3 ! %l3 = 0000000076c6c4fc | |
2758 | ||
2759 | ! Check Point 13 for processor 0 | |
2760 | ||
2761 | set p0_check_pt_data_13,%g4 | |
2762 | rd %ccr,%g5 ! %g5 = 44 | |
2763 | ldx [%g4+0x08],%g2 | |
2764 | cmp %l0,%g2 ! %l0 = 0000000000001977 | |
2765 | bne %xcc,p0_reg_check_fail0 | |
2766 | mov 0xee0,%g1 | |
2767 | ldx [%g4+0x10],%g2 | |
2768 | cmp %l1,%g2 ! %l1 = 19778174fc734517 | |
2769 | bne %xcc,p0_reg_check_fail1 | |
2770 | mov 0xee1,%g1 | |
2771 | ldx [%g4+0x18],%g2 | |
2772 | cmp %l2,%g2 ! %l2 = ffffffffff000000 | |
2773 | bne %xcc,p0_reg_check_fail2 | |
2774 | mov 0xee2,%g1 | |
2775 | ldx [%g4+0x20],%g2 | |
2776 | cmp %l3,%g2 ! %l3 = 0000000076c6c4fc | |
2777 | bne %xcc,p0_reg_check_fail3 | |
2778 | mov 0xee3,%g1 | |
2779 | ldx [%g4+0x28],%g2 | |
2780 | cmp %l4,%g2 ! %l4 = 000000000000004e | |
2781 | bne %xcc,p0_reg_check_fail4 | |
2782 | mov 0xee4,%g1 | |
2783 | ldx [%g4+0x30],%g2 | |
2784 | cmp %l5,%g2 ! %l5 = 000000000000fcc4 | |
2785 | bne %xcc,p0_reg_check_fail5 | |
2786 | mov 0xee5,%g1 | |
2787 | ldx [%g4+0x38],%g2 | |
2788 | cmp %l6,%g2 ! %l6 = c4fca49aecb7b96f | |
2789 | bne %xcc,p0_reg_check_fail6 | |
2790 | mov 0xee6,%g1 | |
2791 | ldx [%g4+0x40],%g3 | |
2792 | std %f2,[%g4] | |
2793 | ldx [%g4],%g2 | |
2794 | cmp %g3,%g2 ! %f2 = 771900ff 00000012 | |
2795 | bne %xcc,p0_freg_check_fail | |
2796 | mov 0xf02,%g1 | |
2797 | ldx [%g4+0x48],%g3 | |
2798 | std %f4,[%g4] | |
2799 | ldx [%g4],%g2 | |
2800 | cmp %g3,%g2 ! %f4 = 00000000 5e9638c2 | |
2801 | bne %xcc,p0_freg_check_fail | |
2802 | mov 0xf04,%g1 | |
2803 | ldx [%g4+0x50],%g3 | |
2804 | std %f6,[%g4] | |
2805 | ldx [%g4],%g2 | |
2806 | cmp %g3,%g2 ! %f6 = becd92b7 00001d12 | |
2807 | bne %xcc,p0_freg_check_fail | |
2808 | mov 0xf06,%g1 | |
2809 | ldx [%g4+0x58],%g3 | |
2810 | std %f16,[%g4] | |
2811 | ldx [%g4],%g2 | |
2812 | cmp %g3,%g2 ! %f16 = 4e000000 ff000000 | |
2813 | bne %xcc,p0_freg_check_fail | |
2814 | mov 0xf16,%g1 | |
2815 | ldx [%g4+0x60],%g3 | |
2816 | std %f30,[%g4] | |
2817 | ldx [%g4],%g2 | |
2818 | cmp %g3,%g2 ! %f30 = ff000000 3262f1ff | |
2819 | bne %xcc,p0_freg_check_fail | |
2820 | mov 0xf30,%g1 | |
2821 | ||
2822 | ! Check Point 13 completed | |
2823 | ||
2824 | ||
2825 | p0_label_66: | |
2826 | ! %l7 = 0000000076c6c4fc, Mem[0000000030001410] = 12000000 | |
2827 | stwa %l7,[%i0+%o5]0x89 ! Mem[0000000030001410] = 76c6c4fc | |
2828 | ! %l6 = ecb7b96f, %l7 = 76c6c4fc, Mem[0000000010081418] = 738700e3 ecb7b96f | |
2829 | stda %l6,[%i2+0x018]%asi ! Mem[0000000010081418] = ecb7b96f 76c6c4fc | |
2830 | ! %f6 = becd92b7 00001d12, %l5 = 000000000000fcc4 | |
2831 | ! Mem[0000000010101400] = 5e9638c2000000e6 | |
2832 | stda %f6,[%i4+%l5]ASI_PST8_P ! Mem[0000000010101400] = becd38c2000000e6 | |
2833 | ! %l5 = 000000000000fcc4, Mem[0000000030081408] = 76c600ff | |
2834 | stba %l5,[%i2+%o4]0x89 ! Mem[0000000030081408] = 76c600c4 | |
2835 | ! %l7 = 0000000076c6c4fc, Mem[0000000030081400] = 000000ff | |
2836 | stba %l7,[%i2+%g0]0x89 ! Mem[0000000030081400] = 000000fc | |
2837 | ! %f18 = ff1d0000, Mem[0000000030181408] = ff000000 | |
2838 | sta %f18,[%i6+%o4]0x81 ! Mem[0000000030181408] = ff1d0000 | |
2839 | ! Mem[0000000010181426] = ff1d0000, %l7 = 0000000076c6c4fc | |
2840 | ldstub [%i6+0x026],%l7 ! %l7 = 00000000000000ff | |
2841 | ! Mem[0000000010001408] = 120044cf, %l1 = 19778174fc734517 | |
2842 | swapa [%i0+%o4]0x80,%l1 ! %l1 = 00000000120044cf | |
2843 | ! %f11 = 19778174, Mem[000000001004143c] = 19778174 | |
2844 | st %f11,[%i1+0x03c] ! Mem[000000001004143c] = 19778174 | |
2845 | ! Starting 10 instruction Load Burst | |
2846 | ! Mem[0000000030181400] = 4a1fbeb6 000000ff, %l2 = ff000000, %l3 = 76c6c4fc | |
2847 | ldda [%i6+%g0]0x89,%l2 ! %l2 = 00000000000000ff 000000004a1fbeb6 | |
2848 | ||
2849 | p0_label_67: | |
2850 | ! Code Fragment 3 | |
2851 | p0_fragment_4: | |
2852 | ! %l0 = 0000000000001977 | |
2853 | setx 0x1eca3547f81cf297,%g7,%l0 ! %l0 = 1eca3547f81cf297 | |
2854 | ! %l1 = 00000000120044cf | |
2855 | setx 0xf29be088139de57f,%g7,%l1 ! %l1 = f29be088139de57f | |
2856 | setx 0x1fe000, %g1, %g3 | |
2857 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
2858 | setx 0x1ffff8, %g1, %g2 | |
2859 | and %l0, %g2, %l0 | |
2860 | ta T_CHANGE_HPRIV | |
2861 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
2862 | ta T_CHANGE_NONHPRIV | |
2863 | ! %l0 = 1eca3547f81cf297 | |
2864 | setx 0x7a16e0c00656c346,%g7,%l0 ! %l0 = 7a16e0c00656c346 | |
2865 | ! %l1 = f29be088139de57f | |
2866 | setx 0x0341c6a7afbc4d3f,%g7,%l1 ! %l1 = 0341c6a7afbc4d3f | |
2867 | ! %f0 = 24e73cb2 4e0000a6, %l0 = 7a16e0c00656c346 | |
2868 | ! Mem[0000000030181410] = 1200000000000000 | |
2869 | add %i6,0x010,%g1 | |
2870 | stda %f0,[%g1+%l0]ASI_PST16_SL ! Mem[0000000030181410] = 1200004eb23c0000 | |
2871 | ! Mem[00000000100c1408] = 56fe427e, %l4 = 000000000000004e | |
2872 | lduwa [%i3+%o4]0x80,%l4 ! %l4 = 0000000056fe427e | |
2873 | ! Mem[0000000030101400] = a6ffffff, %l4 = 0000000056fe427e | |
2874 | lduha [%i4+%g0]0x81,%l4 ! %l4 = 000000000000a6ff | |
2875 | ! Mem[0000000010101410] = f0ed002e, %l1 = 0341c6a7afbc4d3f | |
2876 | ldswa [%i4+%o5]0x80,%l1 ! %l1 = fffffffff0ed002e | |
2877 | ! Mem[0000000010141400] = fcf8cfd1, %f28 = 24000000 | |
2878 | lda [%i5+%g0]0x80,%f28 ! %f28 = fcf8cfd1 | |
2879 | ! Mem[0000000010001408] = fc7345178304855a, %l0 = 7a16e0c00656c346 | |
2880 | ldxa [%i0+%o4]0x80,%l0 ! %l0 = fc7345178304855a | |
2881 | ! Mem[0000000010041424] = 000000e6, %l7 = 0000000000000000 | |
2882 | ldub [%i1+0x025],%l7 ! %l7 = 0000000000000000 | |
2883 | ! Mem[00000000100c1400] = 2e000000, %l3 = 000000004a1fbeb6 | |
2884 | ldswa [%i3+%g0]0x80,%l3 ! %l3 = 000000002e000000 | |
2885 | ! Starting 10 instruction Store Burst | |
2886 | ! %l2 = 00000000000000ff, Mem[000000001008141a] = ecb7b96f, %asi = 80 | |
2887 | stha %l2,[%i2+0x01a]%asi ! Mem[0000000010081418] = ecb700ff | |
2888 | ||
2889 | p0_label_68: | |
2890 | ! %l7 = 0000000000000000, Mem[00000000300c1400] = 121d0000 | |
2891 | stba %l7,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 001d0000 | |
2892 | ! Mem[0000000010181400] = 6123c459, %l4 = 000000000000a6ff | |
2893 | ldstuba [%i6+%g0]0x88,%l4 ! %l4 = 00000059000000ff | |
2894 | ! Mem[00000000100c1414] = fc734517, %l2 = 000000ff, %l7 = 00000000 | |
2895 | add %i3,0x14,%g1 | |
2896 | casa [%g1]0x80,%l2,%l7 ! %l7 = 00000000fc734517 | |
2897 | ! Mem[0000000010081438] = 9a000000, %l7 = 00000000fc734517, %asi = 80 | |
2898 | swapa [%i2+0x038]%asi,%l7 ! %l7 = 000000009a000000 | |
2899 | ! %f6 = becd92b7 00001d12, Mem[0000000010141400] = d1cff8fc ff000000 | |
2900 | stda %f6 ,[%i5+%g0]0x88 ! Mem[0000000010141400] = becd92b7 00001d12 | |
2901 | ! %l4 = 00000059, %l5 = 0000fcc4, Mem[0000000030141410] = b96f1977 35b08349 | |
2902 | stda %l4,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000059 0000fcc4 | |
2903 | ! %l7 = 000000009a000000, Mem[0000000020800000] = 1dff8470 | |
2904 | stb %l7,[%o1+%g0] ! Mem[0000000020800000] = 00ff8470 | |
2905 | ! %l2 = 00000000000000ff, Mem[000000001014143c] = 68512e7a | |
2906 | stw %l2,[%i5+0x03c] ! Mem[000000001014143c] = 000000ff | |
2907 | ! %l3 = 000000002e000000, Mem[0000000030101400] = ffffffa6 | |
2908 | stwa %l3,[%i4+%g0]0x89 ! Mem[0000000030101400] = 2e000000 | |
2909 | ! Starting 10 instruction Load Burst | |
2910 | ! Mem[0000000020800040] = ff127379, %l7 = 000000009a000000 | |
2911 | ldsba [%o1+0x040]%asi,%l7 ! %l7 = ffffffffffffffff | |
2912 | ||
2913 | p0_label_69: | |
2914 | ! Mem[0000000010041400] = dfa6f0ed ffffffdd, %l2 = 000000ff, %l3 = 2e000000 | |
2915 | ldda [%i1+%g0]0x80,%l2 ! %l2 = 00000000dfa6f0ed 00000000ffffffdd | |
2916 | ! Mem[0000000010081400] = fc000000, %l1 = fffffffff0ed002e | |
2917 | ldswa [%i2+%g0]0x80,%l1 ! %l1 = fffffffffc000000 | |
2918 | ! Mem[0000000010001408] = fc734517, %l6 = c4fca49aecb7b96f | |
2919 | lduwa [%i0+%o4]0x80,%l6 ! %l6 = 00000000fc734517 | |
2920 | ! Mem[000000001018140c] = ff000000, %f16 = 4e000000 | |
2921 | lda [%i6+0x00c]%asi,%f16 ! %f16 = ff000000 | |
2922 | ! Mem[0000000020800000] = 00ff8470, %l6 = 00000000fc734517 | |
2923 | lduba [%o1+0x000]%asi,%l6 ! %l6 = 0000000000000000 | |
2924 | ! Mem[0000000030041410] = 00000000 12ff76c9, %l2 = dfa6f0ed, %l3 = ffffffdd | |
2925 | ldda [%i1+%o5]0x89,%l2 ! %l2 = 0000000012ff76c9 0000000000000000 | |
2926 | ! Mem[0000000030141408] = becd92b700001d12, %l4 = 0000000000000059 | |
2927 | ldxa [%i5+%o4]0x81,%l4 ! %l4 = becd92b700001d12 | |
2928 | ! Mem[0000000010181408] = ff4573fc, %l2 = 0000000012ff76c9 | |
2929 | lduwa [%i6+%o4]0x80,%l2 ! %l2 = 00000000ff4573fc | |
2930 | ! Mem[0000000010041400] = dfa6f0ed ffffffdd, %l0 = 8304855a, %l1 = fc000000 | |
2931 | ldda [%i1+%g0]0x80,%l0 ! %l0 = 00000000dfa6f0ed 00000000ffffffdd | |
2932 | ! Starting 10 instruction Store Burst | |
2933 | ! %f20 = 4983b035, Mem[0000000010041408] = 4e000000 | |
2934 | sta %f20,[%i1+0x008]%asi ! Mem[0000000010041408] = 4983b035 | |
2935 | ||
2936 | p0_label_70: | |
2937 | ! Mem[0000000010001414] = 00000000, %l1 = 00000000ffffffdd | |
2938 | swap [%i0+0x014],%l1 ! %l1 = 0000000000000000 | |
2939 | ! %l5 = 000000000000fcc4, Mem[0000000010001408] = fc734517 | |
2940 | stha %l5,[%i0+%o4]0x80 ! Mem[0000000010001408] = fcc44517 | |
2941 | ! Mem[0000000010001400] = 771900ff, %l5 = 000000000000fcc4 | |
2942 | ldstuba [%i0+%g0]0x88,%l5 ! %l5 = 000000ff000000ff | |
2943 | ! %f23 = 7d307e94, Mem[0000000010041410] = c238965e | |
2944 | st %f23,[%i1+%o5] ! Mem[0000000010041410] = 7d307e94 | |
2945 | ! Mem[0000000010041408] = 35b08349, %l0 = 00000000dfa6f0ed | |
2946 | swapa [%i1+%o4]0x88,%l0 ! %l0 = 0000000035b08349 | |
2947 | ! %l4 = becd92b700001d12, Mem[0000000010141410] = 00ff000068512e7a | |
2948 | stx %l4,[%i5+%o5] ! Mem[0000000010141410] = becd92b700001d12 | |
2949 | ! %f28 = fcf8cfd1 59c42361, Mem[00000000300c1400] = 001d0000 a73073fc | |
2950 | stda %f28,[%i3+%g0]0x81 ! Mem[00000000300c1400] = fcf8cfd1 59c42361 | |
2951 | ! Mem[0000000010041408] = dfa6f0ed, %l1 = 0000000000000000 | |
2952 | ldstuba [%i1+%o4]0x88,%l1 ! %l1 = 000000ed000000ff | |
2953 | ! %l4 = becd92b700001d12, Mem[0000000010141420] = f0295f02cf9d04a5 | |
2954 | stx %l4,[%i5+0x020] ! Mem[0000000010141420] = becd92b700001d12 | |
2955 | ! Starting 10 instruction Load Burst | |
2956 | ! Mem[00000000201c0000] = dcff9457, %l1 = 00000000000000ed | |
2957 | ldub [%o0+0x001],%l1 ! %l1 = 00000000000000ff | |
2958 | ||
2959 | ! Check Point 14 for processor 0 | |
2960 | ||
2961 | set p0_check_pt_data_14,%g4 | |
2962 | rd %ccr,%g5 ! %g5 = 44 | |
2963 | ldx [%g4+0x08],%g2 | |
2964 | cmp %l0,%g2 ! %l0 = 0000000035b08349 | |
2965 | bne %xcc,p0_reg_check_fail0 | |
2966 | mov 0xee0,%g1 | |
2967 | ldx [%g4+0x10],%g2 | |
2968 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
2969 | bne %xcc,p0_reg_check_fail1 | |
2970 | mov 0xee1,%g1 | |
2971 | ldx [%g4+0x18],%g2 | |
2972 | cmp %l2,%g2 ! %l2 = 00000000ff4573fc | |
2973 | bne %xcc,p0_reg_check_fail2 | |
2974 | mov 0xee2,%g1 | |
2975 | ldx [%g4+0x20],%g2 | |
2976 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
2977 | bne %xcc,p0_reg_check_fail3 | |
2978 | mov 0xee3,%g1 | |
2979 | ldx [%g4+0x28],%g2 | |
2980 | cmp %l4,%g2 ! %l4 = becd92b700001d12 | |
2981 | bne %xcc,p0_reg_check_fail4 | |
2982 | mov 0xee4,%g1 | |
2983 | ldx [%g4+0x30],%g2 | |
2984 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
2985 | bne %xcc,p0_reg_check_fail5 | |
2986 | mov 0xee5,%g1 | |
2987 | ldx [%g4+0x38],%g2 | |
2988 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
2989 | bne %xcc,p0_reg_check_fail6 | |
2990 | mov 0xee6,%g1 | |
2991 | ldx [%g4+0x40],%g2 | |
2992 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
2993 | bne %xcc,p0_reg_check_fail7 | |
2994 | mov 0xee7,%g1 | |
2995 | ldx [%g4+0x48],%g3 | |
2996 | std %f0,[%g4] | |
2997 | ldx [%g4],%g2 | |
2998 | cmp %g3,%g2 ! %f0 = 24e73cb2 4e0000a6 | |
2999 | bne %xcc,p0_freg_check_fail | |
3000 | mov 0xf00,%g1 | |
3001 | ldx [%g4+0x50],%g3 | |
3002 | std %f2,[%g4] | |
3003 | ldx [%g4],%g2 | |
3004 | cmp %g3,%g2 ! %f2 = 771900ff 00000012 | |
3005 | bne %xcc,p0_freg_check_fail | |
3006 | mov 0xf02,%g1 | |
3007 | ldx [%g4+0x58],%g3 | |
3008 | std %f16,[%g4] | |
3009 | ldx [%g4],%g2 | |
3010 | cmp %g3,%g2 ! %f16 = ff000000 ff000000 | |
3011 | bne %xcc,p0_freg_check_fail | |
3012 | mov 0xf16,%g1 | |
3013 | ldx [%g4+0x60],%g3 | |
3014 | std %f28,[%g4] | |
3015 | ldx [%g4],%g2 | |
3016 | cmp %g3,%g2 ! %f28 = fcf8cfd1 59c42361 | |
3017 | bne %xcc,p0_freg_check_fail | |
3018 | mov 0xf28,%g1 | |
3019 | ||
3020 | ! Check Point 14 completed | |
3021 | ||
3022 | ||
3023 | p0_label_71: | |
3024 | ! Mem[00000000300c1408] = 00000012 76c6c4fc, %l4 = 00001d12, %l5 = 000000ff | |
3025 | ldda [%i3+%o4]0x81,%l4 ! %l4 = 0000000000000012 0000000076c6c4fc | |
3026 | membar #Sync ! Added by membar checker (10) | |
3027 | ! Mem[0000000010141400] = 121d0000 b792cdbe 00000024 00000000 | |
3028 | ! Mem[0000000010141410] = becd92b7 00001d12 ff1d0000 00000024 | |
3029 | ! Mem[0000000010141420] = becd92b7 00001d12 4e239aff 637cc6fe | |
3030 | ! Mem[0000000010141430] = bbbf9dab ac8f149b fa2e1880 000000ff | |
3031 | ldda [%i5]ASI_BLK_P,%f0 ! Block Load from 0000000010141400 | |
3032 | ! Mem[00000000100c1408] = ff0000007e42fe56, %f24 = 2e000000 ff425584 | |
3033 | ldda [%i3+%o4]0x88,%f24 ! %f24 = ff000000 7e42fe56 | |
3034 | ! Mem[0000000030181408] = ff1d0000, %l7 = ffffffffffffffff | |
3035 | lduba [%i6+%o4]0x81,%l7 ! %l7 = 00000000000000ff | |
3036 | ! Mem[0000000020800000] = 00ff8470, %l4 = 0000000000000012 | |
3037 | ldsb [%o1+%g0],%l4 ! %l4 = 0000000000000000 | |
3038 | ! Mem[0000000010081410] = 9b148fac8400ffff, %l1 = 00000000000000ff | |
3039 | ldxa [%i2+%o5]0x88,%l1 ! %l1 = 9b148fac8400ffff | |
3040 | ! Mem[0000000030041410] = 12ff76c9, %l4 = 0000000000000000 | |
3041 | lduha [%i1+%o5]0x89,%l4 ! %l4 = 00000000000076c9 | |
3042 | ! Mem[0000000030001410] = 76c6c4fc, %l1 = 9b148fac8400ffff | |
3043 | ldsha [%i0+%o5]0x89,%l1 ! %l1 = ffffffffffffc4fc | |
3044 | ! Mem[0000000020800040] = ff127379, %l4 = 00000000000076c9 | |
3045 | lduh [%o1+0x040],%l4 ! %l4 = 000000000000ff12 | |
3046 | ! Starting 10 instruction Store Burst | |
3047 | ! %l5 = 0000000076c6c4fc, Mem[00000000100c1434] = b75e7100 | |
3048 | stw %l5,[%i3+0x034] ! Mem[00000000100c1434] = 76c6c4fc | |
3049 | ||
3050 | p0_label_72: | |
3051 | ! %l5 = 0000000076c6c4fc, Mem[00000000201c0000] = dcff9457, %asi = 80 | |
3052 | stha %l5,[%o0+0x000]%asi ! Mem[00000000201c0000] = c4fc9457 | |
3053 | ! %f28 = fcf8cfd1 59c42361, Mem[0000000030101408] = fc000000 56c9ffff | |
3054 | stda %f28,[%i4+%o4]0x81 ! Mem[0000000030101408] = fcf8cfd1 59c42361 | |
3055 | ! Mem[0000000010181400] = ffc42361, %l4 = 000000000000ff12 | |
3056 | swapa [%i6+%g0]0x80,%l4 ! %l4 = 00000000ffc42361 | |
3057 | ! %l5 = 0000000076c6c4fc, Mem[0000000010081400] = 000000fc | |
3058 | stba %l5,[%i2+%g0]0x88 ! Mem[0000000010081400] = 000000fc | |
3059 | ! Mem[0000000030001410] = 76c6c4fc, %l2 = 00000000ff4573fc | |
3060 | ldstuba [%i0+%o5]0x89,%l2 ! %l2 = 000000fc000000ff | |
3061 | ! %l4 = 00000000ffc42361, Mem[0000000010181410] = 830485ff | |
3062 | stha %l4,[%i6+%o5]0x88 ! Mem[0000000010181410] = 83042361 | |
3063 | ! %f22 = 56fe427e 7d307e94, Mem[0000000010181400] = 0000ff12 6ddd37d6 | |
3064 | std %f22,[%i6+%g0] ! Mem[0000000010181400] = 56fe427e 7d307e94 | |
3065 | ! %f16 = ff000000 ff000000, Mem[0000000030101400] = 2e000000 ffffff55 | |
3066 | stda %f16,[%i4+%g0]0x89 ! Mem[0000000030101400] = ff000000 ff000000 | |
3067 | ! %f28 = fcf8cfd1, Mem[0000000030041408] = 00000012 | |
3068 | sta %f28,[%i1+%o4]0x89 ! Mem[0000000030041408] = fcf8cfd1 | |
3069 | ! Starting 10 instruction Load Burst | |
3070 | ! Mem[0000000010081420] = a196f1ff, %l6 = 0000000000000000 | |
3071 | ldub [%i2+0x023],%l6 ! %l6 = 00000000000000ff | |
3072 | ||
3073 | p0_label_73: | |
3074 | ! Mem[0000000030001410] = ffc4c676, %l1 = ffffffffffffc4fc | |
3075 | lduwa [%i0+%o5]0x81,%l1 ! %l1 = 00000000ffc4c676 | |
3076 | ! Mem[00000000100c1408] = 56fe427e, %l5 = 0000000076c6c4fc | |
3077 | lduba [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000056 | |
3078 | ! %l6 = 00000000000000ff, %l4 = 00000000ffc42361, %y = 00000000 | |
3079 | umul %l6,%l4,%l5 ! %l5 = 000000fec45f3d9f, %y = 000000fe | |
3080 | ! Mem[0000000010181400] = 947e307d 7e42fe56, %l6 = 000000ff, %l7 = 000000ff | |
3081 | ldda [%i6+%g0]0x88,%l6 ! %l6 = 000000007e42fe56 00000000947e307d | |
3082 | ! Mem[0000000010181428] = 426070e9fc734517, %l2 = 00000000000000fc | |
3083 | ldx [%i6+0x028],%l2 ! %l2 = 426070e9fc734517 | |
3084 | ! Mem[0000000030181410] = 1200004e, %f28 = fcf8cfd1 | |
3085 | lda [%i6+%o5]0x81,%f28 ! %f28 = 1200004e | |
3086 | ! Mem[0000000030101400] = 000000ff 000000ff, %l0 = 35b08349, %l1 = ffc4c676 | |
3087 | ldda [%i4+%g0]0x81,%l0 ! %l0 = 00000000000000ff 00000000000000ff | |
3088 | ! Mem[0000000010141408] = 00000024, %l4 = 00000000ffc42361 | |
3089 | ldsha [%i5+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
3090 | ! Mem[0000000010141408] = 00000024, %l4 = 0000000000000000 | |
3091 | lduwa [%i5+%o4]0x80,%l4 ! %l4 = 0000000000000024 | |
3092 | ! Starting 10 instruction Store Burst | |
3093 | ! Mem[0000000010081418] = ecb700ff, %l2 = 426070e9fc734517, %asi = 80 | |
3094 | swapa [%i2+0x018]%asi,%l2 ! %l2 = 00000000ecb700ff | |
3095 | ||
3096 | p0_label_74: | |
3097 | ! %l3 = 0000000000000000, Mem[00000000201c0000] = c4fc9457 | |
3098 | sth %l3,[%o0+%g0] ! Mem[00000000201c0000] = 00009457 | |
3099 | ! %l4 = 00000024, %l5 = c45f3d9f, Mem[0000000030001408] = ffdc9d4e 19778174 | |
3100 | stda %l4,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000024 c45f3d9f | |
3101 | ! %f22 = 56fe427e 7d307e94, Mem[00000000300c1400] = fcf8cfd1 59c42361 | |
3102 | stda %f22,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 56fe427e 7d307e94 | |
3103 | membar #Sync ! Added by membar checker (11) | |
3104 | ! %l5 = 000000fec45f3d9f, Mem[0000000010141408] = 0000002400000000 | |
3105 | stxa %l5,[%i5+%o4]0x80 ! Mem[0000000010141408] = 000000fec45f3d9f | |
3106 | ! %f6 = ff1d0000 00000024, Mem[0000000030101410] = 2e00c4fc 55ffffff | |
3107 | stda %f6 ,[%i4+%o5]0x89 ! Mem[0000000030101410] = ff1d0000 00000024 | |
3108 | ! Mem[0000000030081408] = c400c676, %l7 = 00000000947e307d | |
3109 | swapa [%i2+%o4]0x81,%l7 ! %l7 = 00000000c400c676 | |
3110 | ! Mem[0000000030041400] = a600004e, %l5 = 000000fec45f3d9f | |
3111 | swapa [%i1+%g0]0x81,%l5 ! %l5 = 00000000a600004e | |
3112 | ! %l7 = 00000000c400c676, Mem[0000000010001424] = 00dd37d6, %asi = 80 | |
3113 | stwa %l7,[%i0+0x024]%asi ! Mem[0000000010001424] = c400c676 | |
3114 | ! %l2 = 00000000ecb700ff, Mem[0000000010101410] = 2e00edf0 | |
3115 | stha %l2,[%i4+%o5]0x88 ! Mem[0000000010101410] = 2e0000ff | |
3116 | ! Starting 10 instruction Load Burst | |
3117 | ! Mem[0000000010001408] = 1745c4fc, %l1 = 00000000000000ff | |
3118 | lduba [%i0+%o4]0x88,%l1 ! %l1 = 00000000000000fc | |
3119 | ||
3120 | p0_label_75: | |
3121 | ! Mem[0000000030101410] = ff1d0000 00000024, %l6 = 7e42fe56, %l7 = c400c676 | |
3122 | ldda [%i4+%o5]0x89,%l6 ! %l6 = 0000000000000024 00000000ff1d0000 | |
3123 | ! Mem[0000000010041400] = dfa6f0ed, %l6 = 0000000000000024 | |
3124 | lduha [%i1+0x002]%asi,%l6 ! %l6 = 000000000000f0ed | |
3125 | ! Mem[0000000030101408] = fcf8cfd1, %f1 = b792cdbe | |
3126 | lda [%i4+%o4]0x81,%f1 ! %f1 = fcf8cfd1 | |
3127 | ! Mem[00000000100c1408] = 7e42fe56, %l6 = 000000000000f0ed | |
3128 | lduha [%i3+%o4]0x88,%l6 ! %l6 = 000000000000fe56 | |
3129 | ! Mem[0000000010041428] = 000000ff fc734517, %l2 = ecb700ff, %l3 = 00000000 | |
3130 | ldda [%i1+0x028]%asi,%l2 ! %l2 = 00000000000000ff 00000000fc734517 | |
3131 | ! Mem[0000000030041410] = c976ff12, %l6 = 000000000000fe56 | |
3132 | ldsha [%i1+%o5]0x81,%l6 ! %l6 = ffffffffffffc976 | |
3133 | ! Mem[0000000010081410] = 9b148fac 8400ffff, %l0 = 000000ff, %l1 = 000000fc | |
3134 | ldda [%i2+%o5]0x88,%l0 ! %l0 = 000000008400ffff 000000009b148fac | |
3135 | ! Mem[00000000201c0000] = 00009457, %l2 = 00000000000000ff | |
3136 | ldsb [%o0+0x001],%l2 ! %l2 = 0000000000000000 | |
3137 | ! Mem[00000000300c1408] = 0000001276c6c4fc, %f8 = becd92b7 00001d12 | |
3138 | ldda [%i3+%o4]0x81,%f8 ! %f8 = 00000012 76c6c4fc | |
3139 | ! Starting 10 instruction Store Burst | |
3140 | ! %f3 = 00000000, Mem[00000000100c1404] = 4e000000 | |
3141 | st %f3 ,[%i3+0x004] ! Mem[00000000100c1404] = 00000000 | |
3142 | ||
3143 | ! Check Point 15 for processor 0 | |
3144 | ||
3145 | set p0_check_pt_data_15,%g4 | |
3146 | rd %ccr,%g5 ! %g5 = 44 | |
3147 | ldx [%g4+0x08],%g2 | |
3148 | cmp %l1,%g2 ! %l1 = 000000009b148fac | |
3149 | bne %xcc,p0_reg_check_fail1 | |
3150 | mov 0xee1,%g1 | |
3151 | ldx [%g4+0x10],%g2 | |
3152 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
3153 | bne %xcc,p0_reg_check_fail2 | |
3154 | mov 0xee2,%g1 | |
3155 | ldx [%g4+0x18],%g2 | |
3156 | cmp %l4,%g2 ! %l4 = 0000000000000024 | |
3157 | bne %xcc,p0_reg_check_fail4 | |
3158 | mov 0xee4,%g1 | |
3159 | ldx [%g4+0x20],%g2 | |
3160 | cmp %l5,%g2 ! %l5 = 00000000a600004e | |
3161 | bne %xcc,p0_reg_check_fail5 | |
3162 | mov 0xee5,%g1 | |
3163 | ldx [%g4+0x28],%g2 | |
3164 | cmp %l6,%g2 ! %l6 = ffffffffffffc976 | |
3165 | bne %xcc,p0_reg_check_fail6 | |
3166 | mov 0xee6,%g1 | |
3167 | ldx [%g4+0x30],%g2 | |
3168 | cmp %l7,%g2 ! %l7 = 00000000ff1d0000 | |
3169 | bne %xcc,p0_reg_check_fail7 | |
3170 | mov 0xee7,%g1 | |
3171 | ldx [%g4+0x38],%g3 | |
3172 | std %f0,[%g4] | |
3173 | ldx [%g4],%g2 | |
3174 | cmp %g3,%g2 ! %f0 = 121d0000 fcf8cfd1 | |
3175 | bne %xcc,p0_freg_check_fail | |
3176 | mov 0xf00,%g1 | |
3177 | ldx [%g4+0x40],%g3 | |
3178 | std %f2,[%g4] | |
3179 | ldx [%g4],%g2 | |
3180 | cmp %g3,%g2 ! %f2 = 00000024 00000000 | |
3181 | bne %xcc,p0_freg_check_fail | |
3182 | mov 0xf02,%g1 | |
3183 | ldx [%g4+0x48],%g3 | |
3184 | std %f4,[%g4] | |
3185 | ldx [%g4],%g2 | |
3186 | cmp %g3,%g2 ! %f4 = becd92b7 00001d12 | |
3187 | bne %xcc,p0_freg_check_fail | |
3188 | mov 0xf04,%g1 | |
3189 | ldx [%g4+0x50],%g3 | |
3190 | std %f6,[%g4] | |
3191 | ldx [%g4],%g2 | |
3192 | cmp %g3,%g2 ! %f6 = ff1d0000 00000024 | |
3193 | bne %xcc,p0_freg_check_fail | |
3194 | mov 0xf06,%g1 | |
3195 | ldx [%g4+0x58],%g3 | |
3196 | std %f8,[%g4] | |
3197 | ldx [%g4],%g2 | |
3198 | cmp %g3,%g2 ! %f8 = 00000012 76c6c4fc | |
3199 | bne %xcc,p0_freg_check_fail | |
3200 | mov 0xf08,%g1 | |
3201 | ldx [%g4+0x60],%g3 | |
3202 | std %f10,[%g4] | |
3203 | ldx [%g4],%g2 | |
3204 | cmp %g3,%g2 ! %f10 = 4e239aff 637cc6fe | |
3205 | bne %xcc,p0_freg_check_fail | |
3206 | mov 0xf10,%g1 | |
3207 | ldx [%g4+0x68],%g3 | |
3208 | std %f12,[%g4] | |
3209 | ldx [%g4],%g2 | |
3210 | cmp %g3,%g2 ! %f12 = bbbf9dab ac8f149b | |
3211 | bne %xcc,p0_freg_check_fail | |
3212 | mov 0xf12,%g1 | |
3213 | ldx [%g4+0x70],%g3 | |
3214 | std %f14,[%g4] | |
3215 | ldx [%g4],%g2 | |
3216 | cmp %g3,%g2 ! %f14 = fa2e1880 000000ff | |
3217 | bne %xcc,p0_freg_check_fail | |
3218 | mov 0xf14,%g1 | |
3219 | ldx [%g4+0x78],%g3 | |
3220 | std %f24,[%g4] | |
3221 | ldx [%g4],%g2 | |
3222 | cmp %g3,%g2 ! %f24 = ff000000 7e42fe56 | |
3223 | bne %xcc,p0_freg_check_fail | |
3224 | mov 0xf24,%g1 | |
3225 | ldx [%g4+0x80],%g3 | |
3226 | std %f28,[%g4] | |
3227 | ldx [%g4],%g2 | |
3228 | cmp %g3,%g2 ! %f28 = 1200004e 59c42361 | |
3229 | bne %xcc,p0_freg_check_fail | |
3230 | mov 0xf28,%g1 | |
3231 | ||
3232 | ! Check Point 15 completed | |
3233 | ||
3234 | ||
3235 | p0_label_76: | |
3236 | ! %f6 = ff1d0000 00000024, Mem[0000000010001410] = 000000ff ddffffff | |
3237 | stda %f6 ,[%i0+%o5]0x88 ! Mem[0000000010001410] = ff1d0000 00000024 | |
3238 | ! %f16 = ff000000, Mem[0000000030181400] = ff000000 | |
3239 | sta %f16,[%i6+%g0]0x81 ! Mem[0000000030181400] = ff000000 | |
3240 | ! %l3 = 00000000fc734517, Mem[000000001000140c] = 8304855a | |
3241 | stb %l3,[%i0+0x00c] ! Mem[000000001000140c] = 1704855a | |
3242 | ! Mem[00000000300c1410] = 9aa4fcc4, %l2 = 0000000000000000 | |
3243 | ldstuba [%i3+%o5]0x89,%l2 ! %l2 = 000000c4000000ff | |
3244 | ! %l6 = ffffffffffffc976, Mem[0000000010001410] = 2400000000001dff | |
3245 | stxa %l6,[%i0+%o5]0x80 ! Mem[0000000010001410] = ffffffffffffc976 | |
3246 | ! %l2 = 00000000000000c4, Mem[000000001000142d] = d1d23403, %asi = 80 | |
3247 | stba %l2,[%i0+0x02d]%asi ! Mem[000000001000142c] = d1c43403 | |
3248 | ! %l2 = 00000000000000c4, Mem[0000000010001415] = ffffc976 | |
3249 | stb %l2,[%i0+0x015] ! Mem[0000000010001414] = ffc4c976 | |
3250 | ! Mem[0000000030181410] = 1200004e, %l6 = ffffffffffffc976 | |
3251 | ldstuba [%i6+%o5]0x81,%l6 ! %l6 = 00000012000000ff | |
3252 | ! %f4 = becd92b7 00001d12, Mem[0000000010141400] = 121d0000 b792cdbe | |
3253 | stda %f4 ,[%i5+%g0]0x80 ! Mem[0000000010141400] = becd92b7 00001d12 | |
3254 | ! Starting 10 instruction Load Burst | |
3255 | ! Mem[0000000030081410] = ffad650b000000ff, %f4 = becd92b7 00001d12 | |
3256 | ldda [%i2+%o5]0x81,%f4 ! %f4 = ffad650b 000000ff | |
3257 | ||
3258 | p0_label_77: | |
3259 | ! Mem[0000000010141410] = becd92b7, %l7 = 00000000ff1d0000 | |
3260 | lduba [%i5+%o5]0x80,%l7 ! %l7 = 00000000000000be | |
3261 | ! Mem[0000000030181400] = ff000000, %l3 = 00000000fc734517 | |
3262 | lduba [%i6+%g0]0x81,%l3 ! %l3 = 00000000000000ff | |
3263 | ! Mem[0000000010001408] = fcc44517, %l0 = 000000008400ffff | |
3264 | ldsha [%i0+%o4]0x80,%l0 ! %l0 = fffffffffffffcc4 | |
3265 | ! Mem[0000000010181410] = 83042361, %l2 = 00000000000000c4 | |
3266 | ldsha [%i6+%o5]0x88,%l2 ! %l2 = 0000000000002361 | |
3267 | ! Mem[0000000010081410] = ffff0084, %l6 = 0000000000000012 | |
3268 | ldsba [%i2+%o5]0x80,%l6 ! %l6 = ffffffffffffffff | |
3269 | ! Mem[0000000010081410] = ffff0084 ac8f149b, %l6 = ffffffff, %l7 = 000000be | |
3270 | ldda [%i2+%o5]0x80,%l6 ! %l6 = 00000000ffff0084 00000000ac8f149b | |
3271 | ! Mem[0000000010141400] = 121d0000b792cdbe, %l1 = 000000009b148fac | |
3272 | ldxa [%i5+%g0]0x88,%l1 ! %l1 = 121d0000b792cdbe | |
3273 | ! Mem[0000000030181400] = ff000000, %l7 = 00000000ac8f149b | |
3274 | lduba [%i6+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
3275 | ! Mem[0000000030181408] = ff1d00003262f1ff, %f28 = 1200004e 59c42361 | |
3276 | ldda [%i6+%o4]0x81,%f28 ! %f28 = ff1d0000 3262f1ff | |
3277 | ! Starting 10 instruction Store Burst | |
3278 | ! Mem[0000000030101408] = fcf8cfd1, %l5 = 00000000a600004e | |
3279 | swapa [%i4+%o4]0x81,%l5 ! %l5 = 00000000fcf8cfd1 | |
3280 | ||
3281 | p0_label_78: | |
3282 | ! %f24 = ff000000 7e42fe56, Mem[00000000100c1400] = 2e000000 00000000 | |
3283 | std %f24,[%i3+%g0] ! Mem[00000000100c1400] = ff000000 7e42fe56 | |
3284 | ! %f8 = 00000012 76c6c4fc, %l2 = 0000000000002361 | |
3285 | ! Mem[0000000010081400] = fc000000284795cd | |
3286 | stda %f8,[%i2+%l2]ASI_PST32_PL ! Mem[0000000010081400] = fcc4c676284795cd | |
3287 | ! %f11 = 637cc6fe, Mem[0000000010141400] = b792cdbe | |
3288 | sta %f11,[%i5+%g0]0x88 ! Mem[0000000010141400] = 637cc6fe | |
3289 | ! Mem[0000000010101412] = ff00002e, %l0 = fffffffffffffcc4 | |
3290 | ldstuba [%i4+0x012]%asi,%l0 ! %l0 = 00000000000000ff | |
3291 | ! Code Fragment 4 | |
3292 | p0_fragment_5: | |
3293 | ! %l0 = 0000000000000000 | |
3294 | setx 0xfbbbc41f8196234b,%g7,%l0 ! %l0 = fbbbc41f8196234b | |
3295 | ! %l1 = 121d0000b792cdbe | |
3296 | setx 0xb776ebef8bafda9b,%g7,%l1 ! %l1 = b776ebef8bafda9b | |
3297 | setx 0x7ff8, %g1, %g2 | |
3298 | and %l0, %g2, %l0 | |
3299 | setx 0xffffffff, %g1, %g2 | |
3300 | and %l1, %g2, %l1 | |
3301 | setx 0x100000000, %g1, %g2 | |
3302 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
3303 | ta T_CHANGE_HPRIV | |
3304 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
3305 | ta T_CHANGE_NONHPRIV | |
3306 | ! %l0 = fbbbc41f8196234b | |
3307 | setx 0x1da0c970099ea9c8,%g7,%l0 ! %l0 = 1da0c970099ea9c8 | |
3308 | ! %l1 = b776ebef8bafda9b | |
3309 | setx 0x28e5d93862a6209e,%g7,%l1 ! %l1 = 28e5d93862a6209e | |
3310 | ! %l6 = 00000000ffff0084, Mem[0000000010001400] = ff001977 | |
3311 | stwa %l6,[%i0+%g0]0x80 ! Mem[0000000010001400] = ffff0084 | |
3312 | ! %l1 = 28e5d93862a6209e, Mem[0000000010101410] = 2eff00ff | |
3313 | stba %l1,[%i4+%o5]0x88 ! Mem[0000000010101410] = 2eff009e | |
3314 | ! %f4 = ffad650b, Mem[0000000010081438] = fc734517 | |
3315 | st %f4 ,[%i2+0x038] ! Mem[0000000010081438] = ffad650b | |
3316 | ! Mem[0000000010181410] = 61230483, %l2 = 0000000000002361 | |
3317 | ldstuba [%i6+%o5]0x80,%l2 ! %l2 = 00000061000000ff | |
3318 | ! Starting 10 instruction Load Burst | |
3319 | ! Mem[0000000010081408] = ef000000, %f10 = 4e239aff | |
3320 | lda [%i2+0x008]%asi,%f10 ! %f10 = ef000000 | |
3321 | ||
3322 | p0_label_79: | |
3323 | ! Mem[00000000201c0000] = 00009457, %l6 = 00000000ffff0084 | |
3324 | lduha [%o0+0x000]%asi,%l6 ! %l6 = 0000000000000000 | |
3325 | ! Mem[0000000020800040] = ff127379, %l5 = 00000000fcf8cfd1 | |
3326 | ldsha [%o1+0x040]%asi,%l5 ! %l5 = ffffffffffffff12 | |
3327 | ! Mem[0000000030141400] = ada4dce7070d2073, %f28 = ff1d0000 3262f1ff | |
3328 | ldda [%i5+%g0]0x89,%f28 ! %f28 = ada4dce7 070d2073 | |
3329 | ! Mem[0000000030041408] = d1cff8fc, %l2 = 0000000000000061 | |
3330 | ldsba [%i1+%o4]0x81,%l2 ! %l2 = ffffffffffffffd1 | |
3331 | ! Mem[0000000010081404] = 284795cd, %l5 = ffffffffffffff12 | |
3332 | lduba [%i2+0x005]%asi,%l5 ! %l5 = 0000000000000047 | |
3333 | ! Mem[00000000100c1400] = ff000000, %f6 = ff1d0000 | |
3334 | lda [%i3+%g0]0x80,%f6 ! %f6 = ff000000 | |
3335 | ! Mem[0000000010101428] = 0974c98c, %l2 = ffffffffffffffd1 | |
3336 | ldswa [%i4+0x028]%asi,%l2 ! %l2 = 000000000974c98c | |
3337 | ! Mem[0000000010041410] = 7d307e9400000000, %l0 = 1da0c970099ea9c8 | |
3338 | ldxa [%i1+0x010]%asi,%l0 ! %l0 = 7d307e9400000000 | |
3339 | ! Mem[0000000010041408] = fff0a6df00000000, %f4 = ffad650b 000000ff | |
3340 | ldd [%i1+%o4],%f4 ! %f4 = fff0a6df 00000000 | |
3341 | ! Starting 10 instruction Store Burst | |
3342 | ! %l2 = 000000000974c98c, Mem[0000000030001400] = 000000ff | |
3343 | stha %l2,[%i0+%g0]0x89 ! Mem[0000000030001400] = 0000c98c | |
3344 | ||
3345 | p0_label_80: | |
3346 | ! %f26 = ff000000 120044cf, %l0 = 7d307e9400000000 | |
3347 | ! Mem[00000000300c1418] = 3b3613d6ca7d96ae | |
3348 | add %i3,0x018,%g1 | |
3349 | stda %f26,[%g1+%l0]ASI_PST32_S ! Mem[00000000300c1418] = 3b3613d6ca7d96ae | |
3350 | ! %l7 = 00000000000000ff, Mem[0000000030081400] = 000000fc | |
3351 | stwa %l7,[%i2+%g0]0x89 ! Mem[0000000030081400] = 000000ff | |
3352 | ! %l2 = 000000000974c98c, Mem[0000000010141400] = 637cc6fe | |
3353 | stba %l2,[%i5+%g0]0x88 ! Mem[0000000010141400] = 637cc68c | |
3354 | ! %f3 = 00000000, Mem[0000000010081408] = ef000000 | |
3355 | sta %f3 ,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00000000 | |
3356 | ! %l6 = 0000000000000000, Mem[0000000010081418] = fc73451776c6c4fc, %asi = 80 | |
3357 | stxa %l6,[%i2+0x018]%asi ! Mem[0000000010081418] = 0000000000000000 | |
3358 | ! %l3 = 00000000000000ff, Mem[0000000010001438] = 93f8cfd1 | |
3359 | stw %l3,[%i0+0x038] ! Mem[0000000010001438] = 000000ff | |
3360 | ! %f28 = ada4dce7, Mem[0000000010001400] = 8400ffff | |
3361 | sta %f28,[%i0+%g0]0x88 ! Mem[0000000010001400] = ada4dce7 | |
3362 | ! %f24 = ff000000 7e42fe56, Mem[0000000010141400] = 637cc68c 121d0000 | |
3363 | stda %f24,[%i5+%g0]0x88 ! Mem[0000000010141400] = ff000000 7e42fe56 | |
3364 | ! %l7 = 00000000000000ff, Mem[0000000010141400] = 56fe427e | |
3365 | stba %l7,[%i5+%g0]0x80 ! Mem[0000000010141400] = fffe427e | |
3366 | ! Starting 10 instruction Load Burst | |
3367 | ! Mem[0000000010001434] = 6fff7387, %l6 = 0000000000000000 | |
3368 | ldub [%i0+0x035],%l6 ! %l6 = 00000000000000ff | |
3369 | ||
3370 | ! Check Point 16 for processor 0 | |
3371 | ||
3372 | set p0_check_pt_data_16,%g4 | |
3373 | rd %ccr,%g5 ! %g5 = 44 | |
3374 | ldx [%g4+0x08],%g2 | |
3375 | cmp %l0,%g2 ! %l0 = 7d307e9400000000 | |
3376 | bne %xcc,p0_reg_check_fail0 | |
3377 | mov 0xee0,%g1 | |
3378 | ldx [%g4+0x10],%g2 | |
3379 | cmp %l1,%g2 ! %l1 = 28e5d93862a6209e | |
3380 | bne %xcc,p0_reg_check_fail1 | |
3381 | mov 0xee1,%g1 | |
3382 | ldx [%g4+0x18],%g2 | |
3383 | cmp %l2,%g2 ! %l2 = 000000000974c98c | |
3384 | bne %xcc,p0_reg_check_fail2 | |
3385 | mov 0xee2,%g1 | |
3386 | ldx [%g4+0x20],%g2 | |
3387 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
3388 | bne %xcc,p0_reg_check_fail3 | |
3389 | mov 0xee3,%g1 | |
3390 | ldx [%g4+0x28],%g2 | |
3391 | cmp %l5,%g2 ! %l5 = 0000000000000047 | |
3392 | bne %xcc,p0_reg_check_fail5 | |
3393 | mov 0xee5,%g1 | |
3394 | ldx [%g4+0x30],%g2 | |
3395 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
3396 | bne %xcc,p0_reg_check_fail6 | |
3397 | mov 0xee6,%g1 | |
3398 | ldx [%g4+0x38],%g2 | |
3399 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
3400 | bne %xcc,p0_reg_check_fail7 | |
3401 | mov 0xee7,%g1 | |
3402 | ldx [%g4+0x40],%g3 | |
3403 | std %f4,[%g4] | |
3404 | ldx [%g4],%g2 | |
3405 | cmp %g3,%g2 ! %f4 = fff0a6df 00000000 | |
3406 | bne %xcc,p0_freg_check_fail | |
3407 | mov 0xf04,%g1 | |
3408 | ldx [%g4+0x48],%g3 | |
3409 | std %f6,[%g4] | |
3410 | ldx [%g4],%g2 | |
3411 | cmp %g3,%g2 ! %f6 = ff000000 00000024 | |
3412 | bne %xcc,p0_freg_check_fail | |
3413 | mov 0xf06,%g1 | |
3414 | ldx [%g4+0x50],%g3 | |
3415 | std %f10,[%g4] | |
3416 | ldx [%g4],%g2 | |
3417 | cmp %g3,%g2 ! %f10 = ef000000 637cc6fe | |
3418 | bne %xcc,p0_freg_check_fail | |
3419 | mov 0xf10,%g1 | |
3420 | ldx [%g4+0x58],%g3 | |
3421 | std %f28,[%g4] | |
3422 | ldx [%g4],%g2 | |
3423 | cmp %g3,%g2 ! %f28 = ada4dce7 070d2073 | |
3424 | bne %xcc,p0_freg_check_fail | |
3425 | mov 0xf28,%g1 | |
3426 | ||
3427 | ! Check Point 16 completed | |
3428 | ||
3429 | ||
3430 | p0_label_81: | |
3431 | ! Mem[00000000211c0000] = 00001a4c, %l1 = 28e5d93862a6209e | |
3432 | ldsb [%o2+%g0],%l1 ! %l1 = 0000000000000000 | |
3433 | ! Mem[0000000030101410] = 24000000 00001dff, %l0 = 00000000, %l1 = 00000000 | |
3434 | ldda [%i4+%o5]0x81,%l0 ! %l0 = 0000000024000000 0000000000001dff | |
3435 | ! Mem[000000001018143c] = ffffffdd, %l2 = 000000000974c98c | |
3436 | lduba [%i6+0x03e]%asi,%l2 ! %l2 = 00000000000000ff | |
3437 | ! Mem[0000000030141410] = 00000059, %l3 = 00000000000000ff | |
3438 | lduha [%i5+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
3439 | ! Mem[0000000010141410] = b792cdbe, %l6 = 00000000000000ff | |
3440 | lduha [%i5+%o5]0x88,%l6 ! %l6 = 000000000000cdbe | |
3441 | ! Mem[0000000010181408] = ff4573fc, %l3 = 0000000000000000 | |
3442 | ldsba [%i6+%o4]0x80,%l3 ! %l3 = ffffffffffffffff | |
3443 | ! Mem[0000000030041408] = d1cff8fc, %l2 = 00000000000000ff | |
3444 | lduba [%i1+%o4]0x81,%l2 ! %l2 = 00000000000000d1 | |
3445 | ! Mem[0000000010101408] = 947e307d000000ff, %l4 = 0000000000000024 | |
3446 | ldxa [%i4+%o4]0x88,%l4 ! %l4 = 947e307d000000ff | |
3447 | ! Mem[0000000010081408] = 00000000, %l0 = 0000000024000000 | |
3448 | lduba [%i2+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
3449 | ! Starting 10 instruction Store Burst | |
3450 | ! %l6 = 0000cdbe, %l7 = 000000ff, Mem[00000000100c1400] = ff000000 7e42fe56 | |
3451 | stda %l6,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 0000cdbe 000000ff | |
3452 | ||
3453 | p0_label_82: | |
3454 | ! %l3 = ffffffffffffffff, Mem[0000000010181400] = 56fe427e | |
3455 | stha %l3,[%i6+%g0]0x80 ! Mem[0000000010181400] = ffff427e | |
3456 | ! %l3 = ffffffffffffffff, Mem[0000000010181400] = ffff427e | |
3457 | stba %l3,[%i6+%g0]0x80 ! Mem[0000000010181400] = ffff427e | |
3458 | ! %l7 = 00000000000000ff, Mem[0000000021800180] = ffffe2ae, %asi = 80 | |
3459 | stha %l7,[%o3+0x180]%asi ! Mem[0000000021800180] = 00ffe2ae | |
3460 | ! Mem[0000000010101400] = c238cdbe, %l1 = 0000000000001dff | |
3461 | swapa [%i4+%g0]0x88,%l1 ! %l1 = 00000000c238cdbe | |
3462 | ! Mem[0000000010101400] = ff1d0000, %l6 = 000000000000cdbe | |
3463 | swapa [%i4+%g0]0x80,%l6 ! %l6 = 00000000ff1d0000 | |
3464 | ! %l6 = 00000000ff1d0000, Mem[0000000010181400] = ffff427e | |
3465 | stba %l6,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00ff427e | |
3466 | ! Mem[00000000100c1438] = 6a4e7d55, %l7 = 00000000000000ff | |
3467 | swap [%i3+0x038],%l7 ! %l7 = 000000006a4e7d55 | |
3468 | ! Mem[00000000100c1408] = 56fe427e, %l0 = 0000000000000000 | |
3469 | ldstuba [%i3+%o4]0x80,%l0 ! %l0 = 00000056000000ff | |
3470 | ! %l0 = 0000000000000056, Mem[0000000010141408] = 000000fe | |
3471 | stwa %l0,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000056 | |
3472 | ! Starting 10 instruction Load Burst | |
3473 | ! Mem[0000000010041414] = 00000000, %l2 = 00000000000000d1 | |
3474 | lduh [%i1+0x016],%l2 ! %l2 = 0000000000000000 | |
3475 | ||
3476 | p0_label_83: | |
3477 | ! Mem[0000000021800180] = 00ffe2ae, %l6 = 00000000ff1d0000 | |
3478 | ldsba [%o3+0x181]%asi,%l6 ! %l6 = ffffffffffffffff | |
3479 | ! Mem[0000000010141434] = ac8f149b, %l6 = ffffffffffffffff | |
3480 | ldsba [%i5+0x037]%asi,%l6 ! %l6 = ffffffffffffff9b | |
3481 | ! Mem[000000001014141c] = 00000024, %l0 = 0000000000000056 | |
3482 | ldswa [%i5+0x01c]%asi,%l0 ! %l0 = 0000000000000024 | |
3483 | ! Mem[0000000030001408] = 24000000, %l2 = 0000000000000000 | |
3484 | ldsha [%i0+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
3485 | ! Mem[0000000030141408] = becd92b700001d12, %f18 = ff1d0000 a73028c1 | |
3486 | ldda [%i5+%o4]0x81,%f18 ! %f18 = becd92b7 00001d12 | |
3487 | ! Mem[0000000010001418] = 9c5199ff8dbf4312, %l7 = 000000006a4e7d55 | |
3488 | ldx [%i0+0x018],%l7 ! %l7 = 9c5199ff8dbf4312 | |
3489 | ! %l0 = 0000000000000024, Mem[00000000100c1438] = 000000ff403cf9cd, %asi = 80 | |
3490 | stxa %l0,[%i3+0x038]%asi ! Mem[00000000100c1438] = 0000000000000024 | |
3491 | ! Mem[00000000211c0000] = 00001a4c, %l7 = 9c5199ff8dbf4312 | |
3492 | ldsba [%o2+0x000]%asi,%l7 ! %l7 = 0000000000000000 | |
3493 | ! Mem[0000000030141400] = 070d2073, %f4 = fff0a6df | |
3494 | lda [%i5+%g0]0x89,%f4 ! %f4 = 070d2073 | |
3495 | ! Starting 10 instruction Store Burst | |
3496 | ! Mem[0000000010001418] = 9c5199ff, %l1 = c238cdbe, %l2 = 00000000 | |
3497 | add %i0,0x18,%g1 | |
3498 | casa [%g1]0x80,%l1,%l2 ! %l2 = 000000009c5199ff | |
3499 | ||
3500 | p0_label_84: | |
3501 | ! %l6 = ffffffffffffff9b, Mem[00000000300c1410] = 6fb9b7ec9aa4fcff | |
3502 | stxa %l6,[%i3+%o5]0x89 ! Mem[00000000300c1410] = ffffffffffffff9b | |
3503 | ! Mem[0000000021800041] = 55a51df3, %l1 = 00000000c238cdbe | |
3504 | ldstub [%o3+0x041],%l1 ! %l1 = 000000a5000000ff | |
3505 | ! %f26 = ff000000 120044cf, Mem[00000000300c1400] = 7e42fe56 947e307d | |
3506 | stda %f26,[%i3+%g0]0x89 ! Mem[00000000300c1400] = ff000000 120044cf | |
3507 | ! %f1 = fcf8cfd1, Mem[0000000030101400] = 000000ff | |
3508 | sta %f1 ,[%i4+%g0]0x81 ! Mem[0000000030101400] = fcf8cfd1 | |
3509 | ! Mem[0000000010181400] = 00ff427e, %l0 = 0000000000000024 | |
3510 | swapa [%i6+%g0]0x80,%l0 ! %l0 = 0000000000ff427e | |
3511 | ! Mem[0000000030101408] = a600004e, %l2 = 000000009c5199ff | |
3512 | swapa [%i4+%o4]0x81,%l2 ! %l2 = 00000000a600004e | |
3513 | ! %l3 = ffffffffffffffff, Mem[00000000201c0000] = 00009457 | |
3514 | sth %l3,[%o0+%g0] ! Mem[00000000201c0000] = ffff9457 | |
3515 | ! %l6 = ffffffffffffff9b, Mem[0000000030101400] = d1cff8fc | |
3516 | stba %l6,[%i4+%g0]0x89 ! Mem[0000000030101400] = d1cff89b | |
3517 | ! %l1 = 00000000000000a5, Mem[00000000300c1410] = 9bffffffffffffff | |
3518 | stxa %l1,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 00000000000000a5 | |
3519 | ! Starting 10 instruction Load Burst | |
3520 | ! Mem[0000000030141400] = 73200d07e7dca4ad, %l2 = 00000000a600004e | |
3521 | ldxa [%i5+%g0]0x81,%l2 ! %l2 = 73200d07e7dca4ad | |
3522 | ||
3523 | p0_label_85: | |
3524 | ! Mem[0000000030181408] = 00001dff, %f2 = 00000024 | |
3525 | lda [%i6+%o4]0x89,%f2 ! %f2 = 00001dff | |
3526 | ! Mem[0000000010081410] = ffff0084, %l0 = 0000000000ff427e | |
3527 | lduwa [%i2+%o5]0x80,%l0 ! %l0 = 00000000ffff0084 | |
3528 | ! Mem[0000000010001408] = fcc445171704855a, %l2 = 73200d07e7dca4ad | |
3529 | ldxa [%i0+%o4]0x80,%l2 ! %l2 = fcc445171704855a | |
3530 | ! Mem[0000000010141418] = ff1d0000, %l5 = 0000000000000047 | |
3531 | lduha [%i5+0x018]%asi,%l5 ! %l5 = 000000000000ff1d | |
3532 | ! Mem[0000000010081408] = 0000000000000000, %l7 = 0000000000000000 | |
3533 | ldxa [%i2+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
3534 | ! Mem[0000000030041410] = c976ff12, %l3 = ffffffffffffffff | |
3535 | ldsba [%i1+%o5]0x81,%l3 ! %l3 = ffffffffffffffc9 | |
3536 | ! Mem[0000000010181408] = ff4573fcff000000, %l6 = ffffffffffffff9b | |
3537 | ldxa [%i6+%o4]0x80,%l6 ! %l6 = ff4573fcff000000 | |
3538 | ! Mem[0000000030081408] = 76c60000 7d307e94, %l6 = ff000000, %l7 = 00000000 | |
3539 | ldda [%i2+%o4]0x89,%l6 ! %l6 = 000000007d307e94 0000000076c60000 | |
3540 | ! Mem[00000000100c1408] = fffe427e, %f28 = ada4dce7 | |
3541 | ld [%i3+%o4],%f28 ! %f28 = fffe427e | |
3542 | ! Starting 10 instruction Store Burst | |
3543 | ! %f26 = ff000000 120044cf, Mem[0000000010041400] = edf0a6df ddffffff | |
3544 | stda %f26,[%i1+%g0]0x88 ! Mem[0000000010041400] = ff000000 120044cf | |
3545 | ||
3546 | ! Check Point 17 for processor 0 | |
3547 | ||
3548 | set p0_check_pt_data_17,%g4 | |
3549 | rd %ccr,%g5 ! %g5 = 44 | |
3550 | ldx [%g4+0x08],%g2 | |
3551 | cmp %l0,%g2 ! %l0 = 00000000ffff0084 | |
3552 | bne %xcc,p0_reg_check_fail0 | |
3553 | mov 0xee0,%g1 | |
3554 | ldx [%g4+0x10],%g2 | |
3555 | cmp %l1,%g2 ! %l1 = 00000000000000a5 | |
3556 | bne %xcc,p0_reg_check_fail1 | |
3557 | mov 0xee1,%g1 | |
3558 | ldx [%g4+0x18],%g2 | |
3559 | cmp %l2,%g2 ! %l2 = fcc445171704855a | |
3560 | bne %xcc,p0_reg_check_fail2 | |
3561 | mov 0xee2,%g1 | |
3562 | ldx [%g4+0x20],%g2 | |
3563 | cmp %l3,%g2 ! %l3 = ffffffffffffffc9 | |
3564 | bne %xcc,p0_reg_check_fail3 | |
3565 | mov 0xee3,%g1 | |
3566 | ldx [%g4+0x28],%g2 | |
3567 | cmp %l4,%g2 ! %l4 = 947e307d000000ff | |
3568 | bne %xcc,p0_reg_check_fail4 | |
3569 | mov 0xee4,%g1 | |
3570 | ldx [%g4+0x30],%g2 | |
3571 | cmp %l5,%g2 ! %l5 = 000000000000ff1d | |
3572 | bne %xcc,p0_reg_check_fail5 | |
3573 | mov 0xee5,%g1 | |
3574 | ldx [%g4+0x38],%g2 | |
3575 | cmp %l6,%g2 ! %l6 = 000000007d307e94 | |
3576 | bne %xcc,p0_reg_check_fail6 | |
3577 | mov 0xee6,%g1 | |
3578 | ldx [%g4+0x40],%g2 | |
3579 | cmp %l7,%g2 ! %l7 = 0000000076c60000 | |
3580 | bne %xcc,p0_reg_check_fail7 | |
3581 | mov 0xee7,%g1 | |
3582 | ldx [%g4+0x48],%g3 | |
3583 | std %f0,[%g4] | |
3584 | ldx [%g4],%g2 | |
3585 | cmp %g3,%g2 ! %f0 = 121d0000 fcf8cfd1 | |
3586 | bne %xcc,p0_freg_check_fail | |
3587 | mov 0xf00,%g1 | |
3588 | ldx [%g4+0x50],%g3 | |
3589 | std %f2,[%g4] | |
3590 | ldx [%g4],%g2 | |
3591 | cmp %g3,%g2 ! %f2 = 00001dff 00000000 | |
3592 | bne %xcc,p0_freg_check_fail | |
3593 | mov 0xf02,%g1 | |
3594 | ldx [%g4+0x58],%g3 | |
3595 | std %f4,[%g4] | |
3596 | ldx [%g4],%g2 | |
3597 | cmp %g3,%g2 ! %f4 = 070d2073 00000000 | |
3598 | bne %xcc,p0_freg_check_fail | |
3599 | mov 0xf04,%g1 | |
3600 | ldx [%g4+0x60],%g3 | |
3601 | std %f6,[%g4] | |
3602 | ldx [%g4],%g2 | |
3603 | cmp %g3,%g2 ! %f6 = ff000000 00000024 | |
3604 | bne %xcc,p0_freg_check_fail | |
3605 | mov 0xf06,%g1 | |
3606 | ldx [%g4+0x68],%g3 | |
3607 | std %f18,[%g4] | |
3608 | ldx [%g4],%g2 | |
3609 | cmp %g3,%g2 ! %f18 = becd92b7 00001d12 | |
3610 | bne %xcc,p0_freg_check_fail | |
3611 | mov 0xf18,%g1 | |
3612 | ldx [%g4+0x70],%g3 | |
3613 | std %f28,[%g4] | |
3614 | ldx [%g4],%g2 | |
3615 | cmp %g3,%g2 ! %f28 = fffe427e 070d2073 | |
3616 | bne %xcc,p0_freg_check_fail | |
3617 | mov 0xf28,%g1 | |
3618 | ||
3619 | ! Check Point 17 completed | |
3620 | ||
3621 | ||
3622 | p0_label_86: | |
3623 | ! %l0 = 00000000ffff0084, Mem[00000000201c0000] = ffff9457, %asi = 80 | |
3624 | stba %l0,[%o0+0x000]%asi ! Mem[00000000201c0000] = 84ff9457 | |
3625 | ! Mem[0000000030001410] = ffc4c676, %l7 = 0000000076c60000 | |
3626 | swapa [%i0+%o5]0x81,%l7 ! %l7 = 00000000ffc4c676 | |
3627 | ! %l2 = 1704855a, %l3 = ffffffc9, Mem[0000000010001410] = ffffffff 76c9c4ff | |
3628 | stda %l2,[%i0+%o5]0x88 ! Mem[0000000010001410] = 1704855a ffffffc9 | |
3629 | ! Mem[0000000010181400] = 00000024, %l0 = 00000000ffff0084 | |
3630 | ldstuba [%i6+%g0]0x80,%l0 ! %l0 = 00000000000000ff | |
3631 | ! %f27 = 120044cf, Mem[0000000010041410] = 947e307d | |
3632 | sta %f27,[%i1+%o5]0x88 ! Mem[0000000010041410] = 120044cf | |
3633 | ! %l4 = 947e307d000000ff, Mem[0000000010141408] = 56000000 | |
3634 | stha %l4,[%i5+%o4]0x88 ! Mem[0000000010141408] = 560000ff | |
3635 | ! Mem[00000000100c1418] = becd92b7, %l4 = 947e307d000000ff | |
3636 | swap [%i3+0x018],%l4 ! %l4 = 00000000becd92b7 | |
3637 | ! %l4 = 00000000becd92b7, Mem[0000000030101410] = 24000000 | |
3638 | stha %l4,[%i4+%o5]0x81 ! Mem[0000000030101410] = 92b70000 | |
3639 | ! Mem[00000000300c1400] = 120044cf, %l1 = 00000000000000a5 | |
3640 | ldstuba [%i3+%g0]0x89,%l1 ! %l1 = 000000cf000000ff | |
3641 | ! Starting 10 instruction Load Burst | |
3642 | ! Mem[0000000010101410] = 2eff009e, %l4 = 00000000becd92b7 | |
3643 | ldswa [%i4+%o5]0x88,%l4 ! %l4 = 000000002eff009e | |
3644 | ||
3645 | p0_label_87: | |
3646 | ! Mem[0000000010181408] = ff4573fc, %l6 = 000000007d307e94 | |
3647 | lduha [%i6+%o4]0x80,%l6 ! %l6 = 000000000000ff45 | |
3648 | membar #Sync ! Added by membar checker (12) | |
3649 | ! Mem[00000000100c1400] = 0000cdbe 000000ff fffe427e 000000ff | |
3650 | ! Mem[00000000100c1410] = 19778174 fc734517 000000ff 070d2073 | |
3651 | ! Mem[00000000100c1420] = 7bb0c341 76bb5e66 ff73f7b8 53b7f84b | |
3652 | ! Mem[00000000100c1430] = 0334d2d1 76c6c4fc 00000000 00000024 | |
3653 | ldda [%i3]ASI_BLK_PL,%f16 ! Block Load from 00000000100c1400 | |
3654 | ! Mem[0000000010181400] = 947e307d240000ff, %f14 = fa2e1880 000000ff | |
3655 | ldda [%i6+%g0]0x88,%f14 ! %f14 = 947e307d 240000ff | |
3656 | ! Mem[0000000030101408] = ff99519c, %f3 = 00000000 | |
3657 | lda [%i4+%o4]0x89,%f3 ! %f3 = ff99519c | |
3658 | ! Mem[00000000300c1410] = 00000000000000a5, %l4 = 000000002eff009e | |
3659 | ldxa [%i3+%o5]0x81,%l4 ! %l4 = 00000000000000a5 | |
3660 | ! Mem[0000000010181410] = 830423ff, %l3 = ffffffffffffffc9 | |
3661 | lduha [%i6+%o5]0x88,%l3 ! %l3 = 00000000000023ff | |
3662 | ! Mem[0000000010081400] = fcc4c676, %l0 = 0000000000000000 | |
3663 | ldsha [%i2+0x000]%asi,%l0 ! %l0 = fffffffffffffcc4 | |
3664 | ! Mem[0000000010141400] = fffe427e, %l3 = 00000000000023ff | |
3665 | lduba [%i5+%g0]0x80,%l3 ! %l3 = 00000000000000ff | |
3666 | ! Mem[0000000010081400] = fcc4c676, %l0 = fffffffffffffcc4 | |
3667 | lduha [%i2+%g0]0x80,%l0 ! %l0 = 000000000000fcc4 | |
3668 | ! Starting 10 instruction Store Burst | |
3669 | ! Mem[0000000010101410] = 9e00ff2e, %l4 = 00000000000000a5 | |
3670 | ldstuba [%i4+%o5]0x80,%l4 ! %l4 = 0000009e000000ff | |
3671 | ||
3672 | p0_label_88: | |
3673 | ! Mem[00000000100c1424] = 76bb5e66, %l3 = 00000000000000ff, %asi = 80 | |
3674 | swapa [%i3+0x024]%asi,%l3 ! %l3 = 0000000076bb5e66 | |
3675 | ! Mem[0000000010001410] = 1704855a, %l0 = 000000000000fcc4 | |
3676 | ldstuba [%i0+%o5]0x88,%l0 ! %l0 = 0000005a000000ff | |
3677 | ! %l4 = 000000000000009e, Mem[0000000010141410] = becd92b7 | |
3678 | stha %l4,[%i5+%o5]0x80 ! Mem[0000000010141410] = 009e92b7 | |
3679 | ! %l3 = 0000000076bb5e66, Mem[0000000030041408] = fcf8cfd1 | |
3680 | stha %l3,[%i1+%o4]0x89 ! Mem[0000000030041408] = fcf85e66 | |
3681 | membar #Sync ! Added by membar checker (13) | |
3682 | ! %l3 = 0000000076bb5e66, Mem[00000000100c140d] = 000000ff | |
3683 | stb %l3,[%i3+0x00d] ! Mem[00000000100c140c] = 006600ff | |
3684 | ! Mem[0000000030141408] = becd92b7, %l7 = 00000000ffc4c676 | |
3685 | swapa [%i5+%o4]0x81,%l7 ! %l7 = 00000000becd92b7 | |
3686 | ! Mem[0000000030001408] = 00000024, %l4 = 000000000000009e | |
3687 | ldstuba [%i0+%o4]0x81,%l4 ! %l4 = 00000000000000ff | |
3688 | ! Mem[0000000030001408] = ff000024, %l6 = 000000000000ff45 | |
3689 | swapa [%i0+%o4]0x81,%l6 ! %l6 = 00000000ff000024 | |
3690 | ! Mem[0000000030041400] = 9f3d5fc4, %l3 = 0000000076bb5e66 | |
3691 | ldstuba [%i1+%g0]0x89,%l3 ! %l3 = 000000c4000000ff | |
3692 | ! Starting 10 instruction Load Burst | |
3693 | ! Mem[00000000300c1408] = 00000012, %f23 = ff000000 | |
3694 | lda [%i3+%o4]0x81,%f23 ! %f23 = 00000012 | |
3695 | ||
3696 | p0_label_89: | |
3697 | ! Mem[00000000100c1400] = becd0000, %l7 = 00000000becd92b7 | |
3698 | ldswa [%i3+%g0]0x88,%l7 ! %l7 = ffffffffbecd0000 | |
3699 | ! Mem[0000000010081410] = ffff0084, %l0 = 000000000000005a | |
3700 | ldsba [%i2+%o5]0x80,%l0 ! %l0 = ffffffffffffffff | |
3701 | ! Mem[0000000010041404] = 000000ff, %l3 = 00000000000000c4 | |
3702 | lduw [%i1+0x004],%l3 ! %l3 = 00000000000000ff | |
3703 | ! Mem[0000000030101408] = 9c5199ff59c42361, %l7 = ffffffffbecd0000 | |
3704 | ldxa [%i4+%o4]0x81,%l7 ! %l7 = 9c5199ff59c42361 | |
3705 | ! Mem[0000000010181400] = 947e307d240000ff, %l4 = 0000000000000000 | |
3706 | ldxa [%i6+%g0]0x88,%l4 ! %l4 = 947e307d240000ff | |
3707 | ! Mem[0000000010101400] = 0000cdbe, %l4 = 947e307d240000ff | |
3708 | lduha [%i4+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
3709 | ! Mem[0000000030181408] = 00001dff, %f24 = 665ebb76 | |
3710 | lda [%i6+%o4]0x89,%f24 ! %f24 = 00001dff | |
3711 | ! Mem[0000000010081410] = 8400ffff, %l5 = 000000000000ff1d | |
3712 | ldswa [%i2+%o5]0x88,%l5 ! %l5 = ffffffff8400ffff | |
3713 | ! Mem[0000000030001408] = 0000ff45c45f3d9f, %l2 = fcc445171704855a | |
3714 | ldxa [%i0+%o4]0x81,%l2 ! %l2 = 0000ff45c45f3d9f | |
3715 | ! Starting 10 instruction Store Burst | |
3716 | ! %l3 = 00000000000000ff, Mem[00000000100c1408] = fffe427e | |
3717 | stha %l3,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00ff427e | |
3718 | ||
3719 | p0_label_90: | |
3720 | ! %f29 = d1d23403, Mem[0000000030001410] = 76c60000 | |
3721 | sta %f29,[%i0+%o5]0x81 ! Mem[0000000030001410] = d1d23403 | |
3722 | ! %f18 = ff000000 7e42feff, %l0 = ffffffffffffffff | |
3723 | ! Mem[0000000030081430] = 5431406a62c6a8a2 | |
3724 | add %i2,0x030,%g1 | |
3725 | stda %f18,[%g1+%l0]ASI_PST16_SL ! Mem[0000000030081430] = fffe427e000000ff | |
3726 | ! %f16 = ff000000 becd0000, %l6 = 00000000ff000024 | |
3727 | ! Mem[0000000030081410] = ffad650b000000ff | |
3728 | add %i2,0x010,%g1 | |
3729 | stda %f16,[%g1+%l6]ASI_PST16_SL ! Mem[0000000030081410] = ffad650b000000ff | |
3730 | ! Mem[0000000010181400] = ff000024, %l1 = 00000000000000cf | |
3731 | ldstuba [%i6+%g0]0x80,%l1 ! %l1 = 000000ff000000ff | |
3732 | ! %l4 = 00000000, %l5 = 8400ffff, Mem[0000000010181410] = 830423ff 76c9d21f | |
3733 | stda %l4,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000 8400ffff | |
3734 | ! %l6 = 00000000ff000024, Mem[0000000030181410] = ff00004eb23c0000 | |
3735 | stxa %l6,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000ff000024 | |
3736 | ! Mem[0000000030041400] = 9f3d5fff, %l0 = ffffffffffffffff | |
3737 | swapa [%i1+%g0]0x89,%l0 ! %l0 = 000000009f3d5fff | |
3738 | ! %f8 = 00000012 76c6c4fc, %l3 = 00000000000000ff | |
3739 | ! Mem[0000000030181438] = a1127d903552e771 | |
3740 | add %i6,0x038,%g1 | |
3741 | stda %f8,[%g1+%l3]ASI_PST16_SL ! Mem[0000000030181438] = fcc4c67612000000 | |
3742 | ! %f6 = ff000000 00000024, Mem[0000000010081408] = 00000000 00000000 | |
3743 | stda %f6 ,[%i2+0x008]%asi ! Mem[0000000010081408] = ff000000 00000024 | |
3744 | ! Starting 10 instruction Load Burst | |
3745 | ! Mem[0000000030101408] = 9c5199ff, %l0 = 000000009f3d5fff | |
3746 | lduwa [%i4+%o4]0x81,%l0 ! %l0 = 000000009c5199ff | |
3747 | ||
3748 | ! Check Point 18 for processor 0 | |
3749 | ||
3750 | set p0_check_pt_data_18,%g4 | |
3751 | rd %ccr,%g5 ! %g5 = 44 | |
3752 | ldx [%g4+0x08],%g2 | |
3753 | cmp %l0,%g2 ! %l0 = 000000009c5199ff | |
3754 | bne %xcc,p0_reg_check_fail0 | |
3755 | mov 0xee0,%g1 | |
3756 | ldx [%g4+0x10],%g2 | |
3757 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
3758 | bne %xcc,p0_reg_check_fail1 | |
3759 | mov 0xee1,%g1 | |
3760 | ldx [%g4+0x18],%g2 | |
3761 | cmp %l2,%g2 ! %l2 = 0000ff45c45f3d9f | |
3762 | bne %xcc,p0_reg_check_fail2 | |
3763 | mov 0xee2,%g1 | |
3764 | ldx [%g4+0x20],%g2 | |
3765 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
3766 | bne %xcc,p0_reg_check_fail3 | |
3767 | mov 0xee3,%g1 | |
3768 | ldx [%g4+0x28],%g2 | |
3769 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
3770 | bne %xcc,p0_reg_check_fail4 | |
3771 | mov 0xee4,%g1 | |
3772 | ldx [%g4+0x30],%g2 | |
3773 | cmp %l5,%g2 ! %l5 = ffffffff8400ffff | |
3774 | bne %xcc,p0_reg_check_fail5 | |
3775 | mov 0xee5,%g1 | |
3776 | ldx [%g4+0x38],%g2 | |
3777 | cmp %l6,%g2 ! %l6 = 00000000ff000024 | |
3778 | bne %xcc,p0_reg_check_fail6 | |
3779 | mov 0xee6,%g1 | |
3780 | ldx [%g4+0x40],%g2 | |
3781 | cmp %l7,%g2 ! %l7 = 9c5199ff59c42361 | |
3782 | bne %xcc,p0_reg_check_fail7 | |
3783 | mov 0xee7,%g1 | |
3784 | ldx [%g4+0x48],%g3 | |
3785 | std %f2,[%g4] | |
3786 | ldx [%g4],%g2 | |
3787 | cmp %g3,%g2 ! %f2 = 00001dff ff99519c | |
3788 | bne %xcc,p0_freg_check_fail | |
3789 | mov 0xf02,%g1 | |
3790 | ldx [%g4+0x50],%g3 | |
3791 | std %f14,[%g4] | |
3792 | ldx [%g4],%g2 | |
3793 | cmp %g3,%g2 ! %f14 = 947e307d 240000ff | |
3794 | bne %xcc,p0_freg_check_fail | |
3795 | mov 0xf14,%g1 | |
3796 | ldx [%g4+0x58],%g3 | |
3797 | std %f16,[%g4] | |
3798 | ldx [%g4],%g2 | |
3799 | cmp %g3,%g2 ! %f16 = ff000000 becd0000 | |
3800 | bne %xcc,p0_freg_check_fail | |
3801 | mov 0xf16,%g1 | |
3802 | ldx [%g4+0x60],%g3 | |
3803 | std %f18,[%g4] | |
3804 | ldx [%g4],%g2 | |
3805 | cmp %g3,%g2 ! %f18 = ff000000 7e42feff | |
3806 | bne %xcc,p0_freg_check_fail | |
3807 | mov 0xf18,%g1 | |
3808 | ldx [%g4+0x68],%g3 | |
3809 | std %f20,[%g4] | |
3810 | ldx [%g4],%g2 | |
3811 | cmp %g3,%g2 ! %f20 = 174573fc 74817719 | |
3812 | bne %xcc,p0_freg_check_fail | |
3813 | mov 0xf20,%g1 | |
3814 | ldx [%g4+0x70],%g3 | |
3815 | std %f22,[%g4] | |
3816 | ldx [%g4],%g2 | |
3817 | cmp %g3,%g2 ! %f22 = 73200d07 00000012 | |
3818 | bne %xcc,p0_freg_check_fail | |
3819 | mov 0xf22,%g1 | |
3820 | ldx [%g4+0x78],%g3 | |
3821 | std %f24,[%g4] | |
3822 | ldx [%g4],%g2 | |
3823 | cmp %g3,%g2 ! %f24 = 00001dff 41c3b07b | |
3824 | bne %xcc,p0_freg_check_fail | |
3825 | mov 0xf24,%g1 | |
3826 | ldx [%g4+0x80],%g3 | |
3827 | std %f26,[%g4] | |
3828 | ldx [%g4],%g2 | |
3829 | cmp %g3,%g2 ! %f26 = 4bf8b753 b8f773ff | |
3830 | bne %xcc,p0_freg_check_fail | |
3831 | mov 0xf26,%g1 | |
3832 | ldx [%g4+0x88],%g3 | |
3833 | std %f28,[%g4] | |
3834 | ldx [%g4],%g2 | |
3835 | cmp %g3,%g2 ! %f28 = fcc4c676 d1d23403 | |
3836 | bne %xcc,p0_freg_check_fail | |
3837 | mov 0xf28,%g1 | |
3838 | ldx [%g4+0x90],%g3 | |
3839 | std %f30,[%g4] | |
3840 | ldx [%g4],%g2 | |
3841 | cmp %g3,%g2 ! %f30 = 24000000 00000000 | |
3842 | bne %xcc,p0_freg_check_fail | |
3843 | mov 0xf30,%g1 | |
3844 | ||
3845 | ! Check Point 18 completed | |
3846 | ||
3847 | ||
3848 | p0_label_91: | |
3849 | ! Mem[0000000010101410] = 2eff00ff, %l6 = 00000000ff000024 | |
3850 | ldswa [%i4+%o5]0x88,%l6 ! %l6 = 000000002eff00ff | |
3851 | ! Mem[00000000100c1418] = 000000ff070d2073, %l4 = 0000000000000000 | |
3852 | ldxa [%i3+0x018]%asi,%l4 ! %l4 = 000000ff070d2073 | |
3853 | ! Mem[0000000020800040] = ff127379, %l7 = 9c5199ff59c42361 | |
3854 | ldsba [%o1+0x041]%asi,%l7 ! %l7 = 0000000000000012 | |
3855 | ! Mem[0000000010101408] = ff000000, %l6 = 000000002eff00ff | |
3856 | ldswa [%i4+%o4]0x80,%l6 ! %l6 = ffffffffff000000 | |
3857 | ! Mem[0000000020800040] = ff127379, %l2 = 0000ff45c45f3d9f | |
3858 | ldsb [%o1+0x041],%l2 ! %l2 = 0000000000000012 | |
3859 | ! Mem[0000000010101410] = 2eff00ff, %l2 = 0000000000000012 | |
3860 | lduha [%i4+%o5]0x88,%l2 ! %l2 = 00000000000000ff | |
3861 | ! Mem[0000000010081408] = 24000000000000ff, %l7 = 0000000000000012 | |
3862 | ldxa [%i2+%o4]0x88,%l7 ! %l7 = 24000000000000ff | |
3863 | ! Mem[0000000030181408] = ff1d0000, %f17 = becd0000 | |
3864 | lda [%i6+%o4]0x81,%f17 ! %f17 = ff1d0000 | |
3865 | ! Mem[00000000100c1430] = 0334d2d176c6c4fc, %l6 = ffffffffff000000 | |
3866 | ldxa [%i3+0x030]%asi,%l6 ! %l6 = 0334d2d176c6c4fc | |
3867 | ! Starting 10 instruction Store Burst | |
3868 | ! Mem[0000000010181420] = 1fd2c976ff1dff00, %l2 = 00000000000000ff, %l2 = 00000000000000ff | |
3869 | add %i6,0x20,%g1 | |
3870 | casxa [%g1]0x80,%l2,%l2 ! %l2 = 1fd2c976ff1dff00 | |
3871 | ||
3872 | p0_label_92: | |
3873 | ! %l6 = 76c6c4fc, %l7 = 000000ff, Mem[00000000100c1408] = 7e42ff00 ff006600 | |
3874 | stda %l6,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 76c6c4fc 000000ff | |
3875 | ! %f2 = 00001dff ff99519c, %l4 = 000000ff070d2073 | |
3876 | ! Mem[0000000010081428] = 9bc60b6d7d307e94 | |
3877 | add %i2,0x028,%g1 | |
3878 | stda %f2,[%g1+%l4]ASI_PST8_P ! Mem[0000000010081428] = 9b001dff7d30519c | |
3879 | ! %f14 = 947e307d, Mem[0000000030001400] = 0000c98c | |
3880 | sta %f14,[%i0+%g0]0x89 ! Mem[0000000030001400] = 947e307d | |
3881 | ! Mem[0000000010001410] = ff850417, %l2 = 1fd2c976ff1dff00 | |
3882 | swapa [%i0+%o5]0x80,%l2 ! %l2 = 00000000ff850417 | |
3883 | ! %f7 = 00000024, Mem[0000000010181410] = 00000000 | |
3884 | sta %f7 ,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000024 | |
3885 | ! Mem[00000000300c1400] = 120044ff, %l2 = 00000000ff850417 | |
3886 | ldstuba [%i3+%g0]0x89,%l2 ! %l2 = 000000ff000000ff | |
3887 | ! %l0 = 000000009c5199ff, Mem[0000000010101410] = 2eff00ff | |
3888 | stwa %l0,[%i4+%o5]0x88 ! Mem[0000000010101410] = 9c5199ff | |
3889 | ! %l1 = 00000000000000ff, Mem[0000000010181400] = ff000024 | |
3890 | stw %l1,[%i6+%g0] ! Mem[0000000010181400] = 000000ff | |
3891 | ! Mem[0000000010101424] = 12ff76c9, %l3 = 000000ff, %l7 = 000000ff | |
3892 | add %i4,0x24,%g1 | |
3893 | casa [%g1]0x80,%l3,%l7 ! %l7 = 0000000012ff76c9 | |
3894 | ! Starting 10 instruction Load Burst | |
3895 | ! Mem[00000000100c1410] = 19778174, %l5 = ffffffff8400ffff | |
3896 | lduwa [%i3+%o5]0x80,%l5 ! %l5 = 0000000019778174 | |
3897 | ||
3898 | p0_label_93: | |
3899 | ! Mem[0000000030081400] = ff000000, %l6 = 0334d2d176c6c4fc | |
3900 | ldsha [%i2+%g0]0x81,%l6 ! %l6 = ffffffffffffff00 | |
3901 | ! Mem[0000000010081400] = cd95472876c6c4fc, %l2 = 00000000000000ff | |
3902 | ldxa [%i2+%g0]0x88,%l2 ! %l2 = cd95472876c6c4fc | |
3903 | ! Mem[0000000030141400] = 73200d07, %l0 = 000000009c5199ff | |
3904 | ldsba [%i5+%g0]0x81,%l0 ! %l0 = 0000000000000073 | |
3905 | ! Mem[0000000010141404] = 000000ff, %l5 = 0000000019778174 | |
3906 | ldswa [%i5+0x004]%asi,%l5 ! %l5 = 00000000000000ff | |
3907 | ! Mem[0000000010041408] = fff0a6df00000000, %f30 = 24000000 00000000 | |
3908 | ldd [%i1+%o4],%f30 ! %f30 = fff0a6df 00000000 | |
3909 | ! Mem[0000000030181410] = 240000ff00000000, %l0 = 0000000000000073 | |
3910 | ldxa [%i6+%o5]0x89,%l0 ! %l0 = 240000ff00000000 | |
3911 | ! Mem[00000000100c1428] = ff73f7b8 53b7f84b, %l0 = 00000000, %l1 = 000000ff | |
3912 | ldd [%i3+0x028],%l0 ! %l0 = 00000000ff73f7b8 0000000053b7f84b | |
3913 | ! Mem[0000000010141408] = ff000056c45f3d9f, %l5 = 00000000000000ff | |
3914 | ldxa [%i5+%o4]0x80,%l5 ! %l5 = ff000056c45f3d9f | |
3915 | ! Mem[0000000010041410] = cf44001200000000, %l4 = 000000ff070d2073 | |
3916 | ldxa [%i1+%o5]0x80,%l4 ! %l4 = cf44001200000000 | |
3917 | ! Starting 10 instruction Store Burst | |
3918 | ! %l6 = ffffff00, %l7 = 12ff76c9, Mem[0000000010181430] = fcc4c676 64663f7f | |
3919 | std %l6,[%i6+0x030] ! Mem[0000000010181430] = ffffff00 12ff76c9 | |
3920 | ||
3921 | p0_label_94: | |
3922 | ! %l6 = ffffffffffffff00, Mem[000000001010142a] = 0974c98c, %asi = 80 | |
3923 | stha %l6,[%i4+0x02a]%asi ! Mem[0000000010101428] = 0974ff00 | |
3924 | ! Mem[0000000010001418] = 9c5199ff, %l6 = ffffffffffffff00 | |
3925 | ldstuba [%i0+0x018]%asi,%l6 ! %l6 = 0000009c000000ff | |
3926 | ! Mem[0000000030001410] = 0334d2d1, %l2 = cd95472876c6c4fc | |
3927 | swapa [%i0+%o5]0x89,%l2 ! %l2 = 000000000334d2d1 | |
3928 | ! Mem[0000000020800040] = ff127379, %l2 = 000000000334d2d1 | |
3929 | ldstub [%o1+0x040],%l2 ! %l2 = 000000ff000000ff | |
3930 | ! Mem[0000000020800040] = ff127379, %l2 = 00000000000000ff | |
3931 | ldstuba [%o1+0x040]%asi,%l2 ! %l2 = 000000ff000000ff | |
3932 | ! Mem[0000000010141420] = becd92b700001d12, %l7 = 0000000012ff76c9, %l5 = ff000056c45f3d9f | |
3933 | add %i5,0x20,%g1 | |
3934 | casxa [%g1]0x80,%l7,%l5 ! %l5 = becd92b700001d12 | |
3935 | ! %l2 = 000000ff, %l3 = 000000ff, Mem[0000000010181410] = 24000000 ffff0084 | |
3936 | stda %l2,[%i6+%o5]0x80 ! Mem[0000000010181410] = 000000ff 000000ff | |
3937 | ! %l3 = 00000000000000ff, Mem[0000000030181408] = fff1623200001dff | |
3938 | stxa %l3,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000000000ff | |
3939 | ! %f30 = fff0a6df 00000000, Mem[0000000030101400] = d1cff89b ff000000 | |
3940 | stda %f30,[%i4+%g0]0x89 ! Mem[0000000030101400] = fff0a6df 00000000 | |
3941 | ! Starting 10 instruction Load Burst | |
3942 | ! Mem[0000000030101408] = 9c5199ff59c42361, %l6 = 000000000000009c | |
3943 | ldxa [%i4+%o4]0x81,%l6 ! %l6 = 9c5199ff59c42361 | |
3944 | ||
3945 | p0_label_95: | |
3946 | ! Mem[0000000010141408] = ff000056, %l0 = 00000000ff73f7b8 | |
3947 | lduba [%i5+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
3948 | ! Mem[00000000300c1400] = ff000000120044ff, %l0 = 00000000000000ff | |
3949 | ldxa [%i3+%g0]0x89,%l0 ! %l0 = ff000000120044ff | |
3950 | ! Mem[0000000030141400] = 070d2073, %l5 = becd92b700001d12 | |
3951 | ldsha [%i5+%g0]0x89,%l5 ! %l5 = 0000000000002073 | |
3952 | ! Mem[0000000010141438] = fa2e1880 000000ff, %l6 = 59c42361, %l7 = 12ff76c9 | |
3953 | ldda [%i5+0x038]%asi,%l6 ! %l6 = 00000000fa2e1880 00000000000000ff | |
3954 | ! Mem[0000000010181408] = fc7345ff, %l5 = 0000000000002073 | |
3955 | ldswa [%i6+%o4]0x88,%l5 ! %l5 = fffffffffc7345ff | |
3956 | ! Mem[000000001010140c] = 7d307e94, %l0 = ff000000120044ff | |
3957 | ldsb [%i4+0x00e],%l0 ! %l0 = 000000000000007e | |
3958 | ! Mem[0000000030041408] = 665ef8fcedf0a6df, %f10 = ef000000 637cc6fe | |
3959 | ldda [%i1+%o4]0x81,%f10 ! %f10 = 665ef8fc edf0a6df | |
3960 | ! Mem[0000000010141408] = 560000ff, %l1 = 0000000053b7f84b | |
3961 | lduha [%i5+%o4]0x88,%l1 ! %l1 = 00000000000000ff | |
3962 | ! Mem[0000000010081410] = 8400ffff, %l7 = 00000000000000ff | |
3963 | lduha [%i2+%o5]0x88,%l7 ! %l7 = 000000000000ffff | |
3964 | ! Starting 10 instruction Store Burst | |
3965 | ! %f10 = 665ef8fc edf0a6df, %l7 = 000000000000ffff | |
3966 | ! Mem[0000000010101428] = 0974ff00472a892c | |
3967 | add %i4,0x028,%g1 | |
3968 | stda %f10,[%g1+%l7]ASI_PST8_P ! Mem[0000000010101428] = 665ef8fcedf0a6df | |
3969 | ||
3970 | ! Check Point 19 for processor 0 | |
3971 | ||
3972 | set p0_check_pt_data_19,%g4 | |
3973 | rd %ccr,%g5 ! %g5 = 44 | |
3974 | ldx [%g4+0x08],%g2 | |
3975 | cmp %l0,%g2 ! %l0 = 000000000000007e | |
3976 | bne %xcc,p0_reg_check_fail0 | |
3977 | mov 0xee0,%g1 | |
3978 | ldx [%g4+0x10],%g2 | |
3979 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
3980 | bne %xcc,p0_reg_check_fail1 | |
3981 | mov 0xee1,%g1 | |
3982 | ldx [%g4+0x18],%g2 | |
3983 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
3984 | bne %xcc,p0_reg_check_fail2 | |
3985 | mov 0xee2,%g1 | |
3986 | ldx [%g4+0x20],%g2 | |
3987 | cmp %l4,%g2 ! %l4 = cf44001200000000 | |
3988 | bne %xcc,p0_reg_check_fail4 | |
3989 | mov 0xee4,%g1 | |
3990 | ldx [%g4+0x28],%g2 | |
3991 | cmp %l5,%g2 ! %l5 = fffffffffc7345ff | |
3992 | bne %xcc,p0_reg_check_fail5 | |
3993 | mov 0xee5,%g1 | |
3994 | ldx [%g4+0x30],%g2 | |
3995 | cmp %l6,%g2 ! %l6 = 00000000fa2e1880 | |
3996 | bne %xcc,p0_reg_check_fail6 | |
3997 | mov 0xee6,%g1 | |
3998 | ldx [%g4+0x38],%g2 | |
3999 | cmp %l7,%g2 ! %l7 = 000000000000ffff | |
4000 | bne %xcc,p0_reg_check_fail7 | |
4001 | mov 0xee7,%g1 | |
4002 | ldx [%g4+0x40],%g3 | |
4003 | std %f0,[%g4] | |
4004 | ldx [%g4],%g2 | |
4005 | cmp %g3,%g2 ! %f0 = 121d0000 fcf8cfd1 | |
4006 | bne %xcc,p0_freg_check_fail | |
4007 | mov 0xf00,%g1 | |
4008 | ldx [%g4+0x48],%g3 | |
4009 | std %f6,[%g4] | |
4010 | ldx [%g4],%g2 | |
4011 | cmp %g3,%g2 ! %f6 = ff000000 00000024 | |
4012 | bne %xcc,p0_freg_check_fail | |
4013 | mov 0xf06,%g1 | |
4014 | ldx [%g4+0x50],%g3 | |
4015 | std %f10,[%g4] | |
4016 | ldx [%g4],%g2 | |
4017 | cmp %g3,%g2 ! %f10 = 665ef8fc edf0a6df | |
4018 | bne %xcc,p0_freg_check_fail | |
4019 | mov 0xf10,%g1 | |
4020 | ldx [%g4+0x58],%g3 | |
4021 | std %f16,[%g4] | |
4022 | ldx [%g4],%g2 | |
4023 | cmp %g3,%g2 ! %f16 = ff000000 ff1d0000 | |
4024 | bne %xcc,p0_freg_check_fail | |
4025 | mov 0xf16,%g1 | |
4026 | ldx [%g4+0x60],%g3 | |
4027 | std %f30,[%g4] | |
4028 | ldx [%g4],%g2 | |
4029 | cmp %g3,%g2 ! %f30 = fff0a6df 00000000 | |
4030 | bne %xcc,p0_freg_check_fail | |
4031 | mov 0xf30,%g1 | |
4032 | ||
4033 | ! Check Point 19 completed | |
4034 | ||
4035 | ||
4036 | p0_label_96: | |
4037 | ! Mem[0000000010181410] = ff000000, %l5 = fffffffffc7345ff | |
4038 | swapa [%i6+%o5]0x88,%l5 ! %l5 = 00000000ff000000 | |
4039 | ! %f20 = 174573fc 74817719, %l4 = cf44001200000000 | |
4040 | ! Mem[0000000030141438] = 231206e5ad3624d0 | |
4041 | add %i5,0x038,%g1 | |
4042 | stda %f20,[%g1+%l4]ASI_PST8_S ! Mem[0000000030141438] = 231206e5ad3624d0 | |
4043 | ! %l1 = 00000000000000ff, Mem[00000000211c0001] = 00001a4c, %asi = 80 | |
4044 | stba %l1,[%o2+0x001]%asi ! Mem[00000000211c0000] = 00ff1a4c | |
4045 | ! %f26 = 4bf8b753 b8f773ff, Mem[0000000030041408] = 665ef8fc edf0a6df | |
4046 | stda %f26,[%i1+%o4]0x81 ! Mem[0000000030041408] = 4bf8b753 b8f773ff | |
4047 | ! %f16 = ff000000 ff1d0000 ff000000 7e42feff | |
4048 | ! %f20 = 174573fc 74817719 73200d07 00000012 | |
4049 | ! %f24 = 00001dff 41c3b07b 4bf8b753 b8f773ff | |
4050 | ! %f28 = fcc4c676 d1d23403 fff0a6df 00000000 | |
4051 | stda %f16,[%i1]ASI_BLK_S ! Block Store to 0000000030041400 | |
4052 | ! %f10 = 665ef8fc, Mem[0000000030181408] = 000000ff | |
4053 | sta %f10,[%i6+%o4]0x89 ! Mem[0000000030181408] = 665ef8fc | |
4054 | ! Mem[0000000030101400] = 00000000, %l3 = 00000000000000ff | |
4055 | swapa [%i4+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
4056 | ! Mem[0000000010181408] = fc7345ff, %l7 = 000000000000ffff | |
4057 | swapa [%i6+%o4]0x88,%l7 ! %l7 = 00000000fc7345ff | |
4058 | ! Mem[000000001000143f] = 0b65ade6, %l3 = 0000000000000000 | |
4059 | ldstuba [%i0+0x03f]%asi,%l3 ! %l3 = 000000e6000000ff | |
4060 | ! Starting 10 instruction Load Burst | |
4061 | ! Mem[0000000010101400] = becd0000, %l0 = 000000000000007e | |
4062 | lduba [%i4+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
4063 | ||
4064 | p0_label_97: | |
4065 | ! Mem[0000000030181408] = 665ef8fc, %l2 = 00000000000000ff | |
4066 | lduha [%i6+%o4]0x89,%l2 ! %l2 = 000000000000f8fc | |
4067 | ! Mem[0000000030141410] = c4fc000059000000, %f14 = 947e307d 240000ff | |
4068 | ldda [%i5+%o5]0x89,%f14 ! %f14 = c4fc0000 59000000 | |
4069 | ! Mem[00000000300c1410] = 00000000, %f13 = ac8f149b | |
4070 | lda [%i3+%o5]0x89,%f13 ! %f13 = 00000000 | |
4071 | ! Mem[0000000030101410] = 92b70000, %l4 = cf44001200000000 | |
4072 | ldswa [%i4+%o5]0x81,%l4 ! %l4 = ffffffff92b70000 | |
4073 | ! Mem[0000000030181400] = 4a1fbeb6000000ff, %l0 = 0000000000000000 | |
4074 | ldxa [%i6+%g0]0x89,%l0 ! %l0 = 4a1fbeb6000000ff | |
4075 | ! Mem[00000000100c140c] = ff000000, %l7 = 00000000fc7345ff | |
4076 | lduba [%i3+0x00c]%asi,%l7 ! %l7 = 00000000000000ff | |
4077 | ! Mem[0000000020800040] = ff127379, %l7 = 00000000000000ff | |
4078 | ldsb [%o1+0x041],%l7 ! %l7 = 0000000000000012 | |
4079 | ! Mem[0000000030001410] = fcc4c676, %l3 = 00000000000000e6 | |
4080 | lduba [%i0+%o5]0x81,%l3 ! %l3 = 00000000000000fc | |
4081 | ! Mem[00000000300c1410] = 00000000, %f13 = 00000000 | |
4082 | lda [%i3+%o5]0x89,%f13 ! %f13 = 00000000 | |
4083 | ! Starting 10 instruction Store Burst | |
4084 | ! Mem[0000000030101400] = 000000ffdfa6f0ff, %l4 = ffffffff92b70000 | |
4085 | ldxa [%i4+%g0]0x81,%l4 ! %l4 = 000000ffdfa6f0ff | |
4086 | ||
4087 | p0_label_98: | |
4088 | ! Mem[00000000201c0000] = 84ff9457, %l3 = 00000000000000fc | |
4089 | lduba [%o0+0x001]%asi,%l3 ! %l3 = 00000000000000ff | |
4090 | ! %l0 = 000000ff, %l1 = 000000ff, Mem[0000000030141400] = 73200d07 e7dca4ad | |
4091 | stda %l0,[%i5+%g0]0x81 ! Mem[0000000030141400] = 000000ff 000000ff | |
4092 | ! %f4 = 070d2073 00000000, %l3 = 00000000000000ff | |
4093 | ! Mem[0000000010081410] = ffff0084ac8f149b | |
4094 | add %i2,0x010,%g1 | |
4095 | stda %f4,[%g1+%l3]ASI_PST8_P ! Mem[0000000010081410] = 070d207300000000 | |
4096 | membar #Sync ! Added by membar checker (14) | |
4097 | ! Mem[0000000030041400] = ff000000, %l6 = 00000000fa2e1880 | |
4098 | ldstuba [%i1+%g0]0x81,%l6 ! %l6 = 000000ff000000ff | |
4099 | ! %l2 = 000000000000f8fc, Mem[0000000020800040] = ff127379 | |
4100 | sth %l2,[%o1+0x040] ! Mem[0000000020800040] = f8fc7379 | |
4101 | ! %l3 = 00000000000000ff, Mem[0000000030141400] = 000000ff | |
4102 | stha %l3,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00ff00ff | |
4103 | ! %l2 = 000000000000f8fc, Mem[00000000300c1408] = 0000001276c6c4fc | |
4104 | stxa %l2,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 000000000000f8fc | |
4105 | ! %f8 = 00000012 76c6c4fc, Mem[0000000030081408] = 7d307e94 76c60000 | |
4106 | stda %f8 ,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000012 76c6c4fc | |
4107 | ! Mem[0000000030101400] = ff000000, %l5 = 00000000ff000000 | |
4108 | swapa [%i4+%g0]0x89,%l5 ! %l5 = 00000000ff000000 | |
4109 | ! Starting 10 instruction Load Burst | |
4110 | ! Mem[0000000030141400] = 00ff00ff, %l3 = 00000000000000ff | |
4111 | ldsba [%i5+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
4112 | ||
4113 | p0_label_99: | |
4114 | ! Mem[00000000211c0000] = 00ff1a4c, %l2 = 000000000000f8fc | |
4115 | ldsha [%o2+0x000]%asi,%l2 ! %l2 = 00000000000000ff | |
4116 | ! Mem[0000000030041400] = 000000ff, %l5 = 00000000ff000000 | |
4117 | lduwa [%i1+%g0]0x89,%l5 ! %l5 = 00000000000000ff | |
4118 | ! Mem[0000000030081410] = ffad650b 000000ff, %l2 = 000000ff, %l3 = 00000000 | |
4119 | ldda [%i2+%o5]0x81,%l2 ! %l2 = 00000000ffad650b 00000000000000ff | |
4120 | ! Mem[0000000030041400] = ff000000, %l5 = 00000000000000ff | |
4121 | lduba [%i1+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
4122 | ! Mem[00000000100c1400] = ff000000 becd0000, %l4 = dfa6f0ff, %l5 = 000000ff | |
4123 | ldda [%i3+%g0]0x88,%l4 ! %l4 = 00000000becd0000 00000000ff000000 | |
4124 | ! Mem[0000000030141400] = ff00ff00, %l2 = 00000000ffad650b | |
4125 | lduba [%i5+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
4126 | ! Mem[0000000030101408] = 9c5199ff, %l0 = 4a1fbeb6000000ff | |
4127 | ldsha [%i4+%o4]0x81,%l0 ! %l0 = ffffffffffff9c51 | |
4128 | ! Mem[00000000300c1410] = 00000000, %l1 = 00000000000000ff | |
4129 | lduba [%i3+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
4130 | ! Mem[0000000010041400] = 120044cf, %l1 = 0000000000000000 | |
4131 | lduwa [%i1+%g0]0x88,%l1 ! %l1 = 00000000120044cf | |
4132 | ! Starting 10 instruction Store Burst | |
4133 | ! %l2 = 0000000000000000, Mem[00000000300c1408] = 00000000 | |
4134 | stha %l2,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 00000000 | |
4135 | ||
4136 | p0_label_100: | |
4137 | ! %l2 = 0000000000000000, Mem[0000000010001408] = fcc445171704855a | |
4138 | stxa %l2,[%i0+%o4]0x80 ! Mem[0000000010001408] = 0000000000000000 | |
4139 | ! Mem[0000000010081410] = 73200d07, %l5 = 00000000ff000000 | |
4140 | ldstuba [%i2+%o5]0x88,%l5 ! %l5 = 00000007000000ff | |
4141 | ! %l5 = 0000000000000007, Mem[0000000030081400] = ff000000 | |
4142 | stwa %l5,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000007 | |
4143 | ! %l6 = 000000ff, %l7 = 00000012, Mem[00000000100c1408] = fcc4c676 ff000000 | |
4144 | std %l6,[%i3+%o4] ! Mem[00000000100c1408] = 000000ff 00000012 | |
4145 | ! %f24 = 00001dff 41c3b07b, Mem[0000000030081400] = 07000000 f2a27e43 | |
4146 | stda %f24,[%i2+%g0]0x89 ! Mem[0000000030081400] = 00001dff 41c3b07b | |
4147 | ! Mem[0000000030141410] = 59000000, %l5 = 0000000000000007 | |
4148 | ldstuba [%i5+%o5]0x89,%l5 ! %l5 = 00000000000000ff | |
4149 | ! %l4 = 00000000becd0000, Mem[0000000010141400] = fffe427e | |
4150 | stha %l4,[%i5+%g0]0x80 ! Mem[0000000010141400] = 0000427e | |
4151 | ! %l2 = 00000000, %l3 = 000000ff, Mem[0000000030181400] = ff000000 b6be1f4a | |
4152 | stda %l2,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00000000 000000ff | |
4153 | ! Mem[0000000010181408] = ffff0000, %l2 = 0000000000000000 | |
4154 | ldstuba [%i6+%o4]0x80,%l2 ! %l2 = 000000ff000000ff | |
4155 | ! Starting 10 instruction Load Burst | |
4156 | ! Mem[0000000030181400] = ff00000000000000, %f2 = 00001dff ff99519c | |
4157 | ldda [%i6+%g0]0x89,%f2 ! %f2 = ff000000 00000000 | |
4158 | ||
4159 | ! Check Point 20 for processor 0 | |
4160 | ||
4161 | set p0_check_pt_data_20,%g4 | |
4162 | rd %ccr,%g5 ! %g5 = 44 | |
4163 | ldx [%g4+0x08],%g2 | |
4164 | cmp %l0,%g2 ! %l0 = ffffffffffff9c51 | |
4165 | bne %xcc,p0_reg_check_fail0 | |
4166 | mov 0xee0,%g1 | |
4167 | ldx [%g4+0x10],%g2 | |
4168 | cmp %l1,%g2 ! %l1 = 00000000120044cf | |
4169 | bne %xcc,p0_reg_check_fail1 | |
4170 | mov 0xee1,%g1 | |
4171 | ldx [%g4+0x18],%g2 | |
4172 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
4173 | bne %xcc,p0_reg_check_fail2 | |
4174 | mov 0xee2,%g1 | |
4175 | ldx [%g4+0x20],%g2 | |
4176 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
4177 | bne %xcc,p0_reg_check_fail3 | |
4178 | mov 0xee3,%g1 | |
4179 | ldx [%g4+0x28],%g2 | |
4180 | cmp %l4,%g2 ! %l4 = 00000000becd0000 | |
4181 | bne %xcc,p0_reg_check_fail4 | |
4182 | mov 0xee4,%g1 | |
4183 | ldx [%g4+0x30],%g2 | |
4184 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
4185 | bne %xcc,p0_reg_check_fail5 | |
4186 | mov 0xee5,%g1 | |
4187 | ldx [%g4+0x38],%g2 | |
4188 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
4189 | bne %xcc,p0_reg_check_fail6 | |
4190 | mov 0xee6,%g1 | |
4191 | ldx [%g4+0x40],%g2 | |
4192 | cmp %l7,%g2 ! %l7 = 0000000000000012 | |
4193 | bne %xcc,p0_reg_check_fail7 | |
4194 | mov 0xee7,%g1 | |
4195 | ldx [%g4+0x48],%g3 | |
4196 | std %f2,[%g4] | |
4197 | ldx [%g4],%g2 | |
4198 | cmp %g3,%g2 ! %f2 = ff000000 00000000 | |
4199 | bne %xcc,p0_freg_check_fail | |
4200 | mov 0xf02,%g1 | |
4201 | ldx [%g4+0x50],%g3 | |
4202 | std %f4,[%g4] | |
4203 | ldx [%g4],%g2 | |
4204 | cmp %g3,%g2 ! %f4 = 070d2073 00000000 | |
4205 | bne %xcc,p0_freg_check_fail | |
4206 | mov 0xf04,%g1 | |
4207 | ldx [%g4+0x58],%g3 | |
4208 | std %f12,[%g4] | |
4209 | ldx [%g4],%g2 | |
4210 | cmp %g3,%g2 ! %f12 = bbbf9dab 00000000 | |
4211 | bne %xcc,p0_freg_check_fail | |
4212 | mov 0xf12,%g1 | |
4213 | ldx [%g4+0x60],%g3 | |
4214 | std %f14,[%g4] | |
4215 | ldx [%g4],%g2 | |
4216 | cmp %g3,%g2 ! %f14 = c4fc0000 59000000 | |
4217 | bne %xcc,p0_freg_check_fail | |
4218 | mov 0xf14,%g1 | |
4219 | ||
4220 | ! Check Point 20 completed | |
4221 | ||
4222 | ||
4223 | p0_label_101: | |
4224 | ! Mem[0000000030001410] = 76c6c4fc, %l6 = 00000000000000ff | |
4225 | lduwa [%i0+%o5]0x89,%l6 ! %l6 = 0000000076c6c4fc | |
4226 | ! Mem[00000000201c0000] = 84ff9457, %l5 = 0000000000000000 | |
4227 | ldsha [%o0+0x000]%asi,%l5 ! %l5 = ffffffffffff84ff | |
4228 | ! Mem[0000000010181438] = 2a1a930bffffffdd, %l1 = 00000000120044cf | |
4229 | ldx [%i6+0x038],%l1 ! %l1 = 2a1a930bffffffdd | |
4230 | ! Mem[0000000030181410] = 00000000, %l0 = ffffffffffff9c51 | |
4231 | ldsha [%i6+%o5]0x81,%l0 ! %l0 = 0000000000000000 | |
4232 | ! Mem[0000000010081410] = ff0d2073, %l2 = 00000000000000ff | |
4233 | ldswa [%i2+%o5]0x80,%l2 ! %l2 = ffffffffff0d2073 | |
4234 | ! Mem[0000000030001410] = fcc4c676, %l5 = ffffffffffff84ff | |
4235 | ldswa [%i0+%o5]0x81,%l5 ! %l5 = fffffffffcc4c676 | |
4236 | ! Mem[0000000010181400] = ff000000, %l7 = 0000000000000012 | |
4237 | lduha [%i6+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
4238 | ! Mem[0000000030141408] = 76c6c4ff, %l4 = 00000000becd0000 | |
4239 | lduwa [%i5+%o4]0x89,%l4 ! %l4 = 0000000076c6c4ff | |
4240 | ! Mem[00000000300c1400] = ff440012, %l7 = 0000000000000000 | |
4241 | ldsha [%i3+%g0]0x81,%l7 ! %l7 = ffffffffffffff44 | |
4242 | ! Starting 10 instruction Store Burst | |
4243 | ! %f2 = ff000000 00000000, Mem[0000000010081400] = 76c6c4fc cd954728 | |
4244 | stda %f2 ,[%i2+%g0]0x88 ! Mem[0000000010081400] = ff000000 00000000 | |
4245 | ||
4246 | p0_label_102: | |
4247 | ! %l7 = ffffffffffffff44, Mem[0000000010041402] = cf440012, %asi = 80 | |
4248 | stba %l7,[%i1+0x002]%asi ! Mem[0000000010041400] = cf444412 | |
4249 | ! %l0 = 0000000000000000, Mem[00000000300c1400] = ff440012 | |
4250 | stha %l0,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00000012 | |
4251 | ! Mem[00000000100c1400] = 0000cdbe, %l4 = 0000000076c6c4ff | |
4252 | swapa [%i3+%g0]0x80,%l4 ! %l4 = 000000000000cdbe | |
4253 | ! %f13 = 00000000, Mem[0000000010181420] = 1fd2c976 | |
4254 | sta %f13,[%i6+0x020]%asi ! Mem[0000000010181420] = 00000000 | |
4255 | ! %l2 = ffffffffff0d2073, Mem[0000000030101408] = 6123c459ff99519c | |
4256 | stxa %l2,[%i4+%o4]0x89 ! Mem[0000000030101408] = ffffffffff0d2073 | |
4257 | ! Mem[0000000030181408] = 665ef8fc, %l6 = 0000000076c6c4fc | |
4258 | ldstuba [%i6+%o4]0x89,%l6 ! %l6 = 000000fc000000ff | |
4259 | ! Mem[000000001018141b] = 7a2e51ff, %l4 = 000000000000cdbe | |
4260 | ldstub [%i6+0x01b],%l4 ! %l4 = 000000ff000000ff | |
4261 | ! Mem[0000000030001410] = fcc4c676, %l5 = fffffffffcc4c676 | |
4262 | swapa [%i0+%o5]0x81,%l5 ! %l5 = 00000000fcc4c676 | |
4263 | ! %l0 = 0000000000000000, Mem[00000000211c0000] = 00ff1a4c | |
4264 | stb %l0,[%o2+%g0] ! Mem[00000000211c0000] = 00ff1a4c | |
4265 | ! Starting 10 instruction Load Burst | |
4266 | ! Mem[0000000010001420] = 7c9650aac400c676, %l0 = 0000000000000000 | |
4267 | ldxa [%i0+0x020]%asi,%l0 ! %l0 = 7c9650aac400c676 | |
4268 | ||
4269 | p0_label_103: | |
4270 | ! Mem[0000000010181438] = 2a1a930bffffffdd, %f22 = 73200d07 00000012 | |
4271 | ldda [%i6+0x038]%asi,%f22 ! %f22 = 2a1a930b ffffffdd | |
4272 | ! Mem[0000000030181408] = fff85e6600000000, %f0 = 121d0000 fcf8cfd1 | |
4273 | ldda [%i6+%o4]0x81,%f0 ! %f0 = fff85e66 00000000 | |
4274 | ! Mem[0000000010041438] = 7a2e51ff, %f0 = fff85e66 | |
4275 | lda [%i1+0x038]%asi,%f0 ! %f0 = 7a2e51ff | |
4276 | ! Mem[0000000030141400] = 00ff00ff 000000ff, %l6 = 000000fc, %l7 = ffffff44 | |
4277 | ldda [%i5+%g0]0x81,%l6 ! %l6 = 0000000000ff00ff 00000000000000ff | |
4278 | ! Mem[0000000010041400] = cf444412, %l6 = 0000000000ff00ff | |
4279 | ldsha [%i1+%g0]0x80,%l6 ! %l6 = ffffffffffffcf44 | |
4280 | ! Mem[0000000010041408] = dfa6f0ff, %l7 = 00000000000000ff | |
4281 | ldswa [%i1+%o4]0x88,%l7 ! %l7 = ffffffffdfa6f0ff | |
4282 | ! Mem[0000000030141408] = ffc4c676 00001d12, %l2 = ff0d2073, %l3 = 000000ff | |
4283 | ldda [%i5+%o4]0x81,%l2 ! %l2 = 00000000ffc4c676 0000000000001d12 | |
4284 | ! Mem[00000000300c1408] = 000000000000f8fc, %f16 = ff000000 ff1d0000 | |
4285 | ldda [%i3+%o4]0x81,%f16 ! %f16 = 00000000 0000f8fc | |
4286 | ! Mem[0000000030141410] = ff000059, %l6 = ffffffffffffcf44 | |
4287 | ldswa [%i5+%o5]0x81,%l6 ! %l6 = ffffffffff000059 | |
4288 | ! Starting 10 instruction Store Burst | |
4289 | ! %l3 = 0000000000001d12, Mem[00000000100c1410] = 19778174fc734517 | |
4290 | stxa %l3,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 0000000000001d12 | |
4291 | ||
4292 | p0_label_104: | |
4293 | ! Mem[0000000010141400] = 0000427e, %l3 = 0000000000001d12 | |
4294 | swapa [%i5+%g0]0x80,%l3 ! %l3 = 000000000000427e | |
4295 | ! %f30 = fff0a6df 00000000, %l3 = 000000000000427e | |
4296 | ! Mem[0000000010081420] = a196f1ffb23ce724 | |
4297 | add %i2,0x020,%g1 | |
4298 | stda %f30,[%g1+%l3]ASI_PST32_PL ! Mem[0000000010081420] = a196f1ffdfa6f0ff | |
4299 | ! %f10 = 665ef8fc edf0a6df, Mem[0000000030141400] = ff00ff00 ff000000 | |
4300 | stda %f10,[%i5+%g0]0x89 ! Mem[0000000030141400] = 665ef8fc edf0a6df | |
4301 | ! %l7 = ffffffffdfa6f0ff, Mem[0000000010141410] = b7929e00 | |
4302 | stba %l7,[%i5+%o5]0x88 ! Mem[0000000010141410] = b7929eff | |
4303 | ! %l4 = 000000ff, %l5 = fcc4c676, Mem[0000000010181408] = 0000ffff 000000ff | |
4304 | stda %l4,[%i6+%o4]0x88 ! Mem[0000000010181408] = 000000ff fcc4c676 | |
4305 | ! Mem[0000000010181404] = 7d307e94, %l3 = 000000000000427e, %asi = 80 | |
4306 | swapa [%i6+0x004]%asi,%l3 ! %l3 = 000000007d307e94 | |
4307 | ! %l5 = 00000000fcc4c676, Mem[00000000100c141c] = 070d2073 | |
4308 | stw %l5,[%i3+0x01c] ! Mem[00000000100c141c] = fcc4c676 | |
4309 | ! %l7 = ffffffffdfa6f0ff, Mem[00000000100c1400] = 76c6c4ff | |
4310 | stwa %l7,[%i3+%g0]0x80 ! Mem[00000000100c1400] = dfa6f0ff | |
4311 | ! %l3 = 000000007d307e94, Mem[0000000010041418] = fc734517, %asi = 80 | |
4312 | stha %l3,[%i1+0x018]%asi ! Mem[0000000010041418] = 7e944517 | |
4313 | ! Starting 10 instruction Load Burst | |
4314 | ! Mem[0000000010181408] = ff000000, %l0 = 7c9650aac400c676 | |
4315 | lduba [%i6+0x00b]%asi,%l0 ! %l0 = 0000000000000000 | |
4316 | ||
4317 | p0_label_105: | |
4318 | ! Mem[0000000030141400] = edf0a6df, %l0 = 0000000000000000 | |
4319 | ldsba [%i5+%g0]0x89,%l0 ! %l0 = ffffffffffffffdf | |
4320 | ! Mem[0000000010141410] = 121d0000 b7929eff, %l6 = ff000059, %l7 = dfa6f0ff | |
4321 | ldda [%i5+%o5]0x88,%l6 ! %l6 = 00000000b7929eff 00000000121d0000 | |
4322 | ! Mem[0000000030081400] = 41c3b07b, %l1 = 2a1a930bffffffdd | |
4323 | lduha [%i2+%g0]0x89,%l1 ! %l1 = 000000000000b07b | |
4324 | ! Mem[0000000030001400] = 947e307d, %f4 = 070d2073 | |
4325 | lda [%i0+%g0]0x89,%f4 ! %f4 = 947e307d | |
4326 | ! Mem[0000000030041400] = 000000ff, %f14 = c4fc0000 | |
4327 | lda [%i1+%g0]0x89,%f14 ! %f14 = 000000ff | |
4328 | ! Mem[0000000030081400] = 00001dff41c3b07b, %l0 = ffffffffffffffdf | |
4329 | ldxa [%i2+%g0]0x89,%l0 ! %l0 = 00001dff41c3b07b | |
4330 | ! Mem[0000000030181400] = 00000000, %l1 = 000000000000b07b | |
4331 | ldsba [%i6+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
4332 | ! Mem[0000000010141410] = b7929eff, %l5 = 00000000fcc4c676 | |
4333 | ldsba [%i5+%o5]0x88,%l5 ! %l5 = ffffffffffffffff | |
4334 | ! Mem[0000000030001408] = 45ff0000, %l4 = 00000000000000ff | |
4335 | lduha [%i0+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
4336 | ! Starting 10 instruction Store Burst | |
4337 | ! %l7 = 00000000121d0000, Mem[0000000030181400] = 00000000 | |
4338 | stba %l7,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00000000 | |
4339 | ||
4340 | ! Check Point 21 for processor 0 | |
4341 | ||
4342 | set p0_check_pt_data_21,%g4 | |
4343 | rd %ccr,%g5 ! %g5 = 44 | |
4344 | ldx [%g4+0x08],%g2 | |
4345 | cmp %l0,%g2 ! %l0 = 00001dff41c3b07b | |
4346 | bne %xcc,p0_reg_check_fail0 | |
4347 | mov 0xee0,%g1 | |
4348 | ldx [%g4+0x10],%g2 | |
4349 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
4350 | bne %xcc,p0_reg_check_fail1 | |
4351 | mov 0xee1,%g1 | |
4352 | ldx [%g4+0x18],%g2 | |
4353 | cmp %l2,%g2 ! %l2 = 00000000ffc4c676 | |
4354 | bne %xcc,p0_reg_check_fail2 | |
4355 | mov 0xee2,%g1 | |
4356 | ldx [%g4+0x20],%g2 | |
4357 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
4358 | bne %xcc,p0_reg_check_fail4 | |
4359 | mov 0xee4,%g1 | |
4360 | ldx [%g4+0x28],%g2 | |
4361 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
4362 | bne %xcc,p0_reg_check_fail5 | |
4363 | mov 0xee5,%g1 | |
4364 | ldx [%g4+0x30],%g2 | |
4365 | cmp %l6,%g2 ! %l6 = 00000000b7929eff | |
4366 | bne %xcc,p0_reg_check_fail6 | |
4367 | mov 0xee6,%g1 | |
4368 | ldx [%g4+0x38],%g2 | |
4369 | cmp %l7,%g2 ! %l7 = 00000000121d0000 | |
4370 | bne %xcc,p0_reg_check_fail7 | |
4371 | mov 0xee7,%g1 | |
4372 | ldx [%g4+0x40],%g3 | |
4373 | std %f0,[%g4] | |
4374 | ldx [%g4],%g2 | |
4375 | cmp %g3,%g2 ! %f0 = 7a2e51ff 00000000 | |
4376 | bne %xcc,p0_freg_check_fail | |
4377 | mov 0xf00,%g1 | |
4378 | ldx [%g4+0x48],%g3 | |
4379 | std %f2,[%g4] | |
4380 | ldx [%g4],%g2 | |
4381 | cmp %g3,%g2 ! %f2 = ff000000 00000000 | |
4382 | bne %xcc,p0_freg_check_fail | |
4383 | mov 0xf02,%g1 | |
4384 | ldx [%g4+0x50],%g3 | |
4385 | std %f4,[%g4] | |
4386 | ldx [%g4],%g2 | |
4387 | cmp %g3,%g2 ! %f4 = 947e307d 00000000 | |
4388 | bne %xcc,p0_freg_check_fail | |
4389 | mov 0xf04,%g1 | |
4390 | ldx [%g4+0x58],%g3 | |
4391 | std %f6,[%g4] | |
4392 | ldx [%g4],%g2 | |
4393 | cmp %g3,%g2 ! %f6 = ff000000 00000024 | |
4394 | bne %xcc,p0_freg_check_fail | |
4395 | mov 0xf06,%g1 | |
4396 | ldx [%g4+0x60],%g3 | |
4397 | std %f14,[%g4] | |
4398 | ldx [%g4],%g2 | |
4399 | cmp %g3,%g2 ! %f14 = 000000ff 59000000 | |
4400 | bne %xcc,p0_freg_check_fail | |
4401 | mov 0xf14,%g1 | |
4402 | ldx [%g4+0x68],%g3 | |
4403 | std %f16,[%g4] | |
4404 | ldx [%g4],%g2 | |
4405 | cmp %g3,%g2 ! %f16 = 00000000 0000f8fc | |
4406 | bne %xcc,p0_freg_check_fail | |
4407 | mov 0xf16,%g1 | |
4408 | ldx [%g4+0x70],%g3 | |
4409 | std %f22,[%g4] | |
4410 | ldx [%g4],%g2 | |
4411 | cmp %g3,%g2 ! %f22 = 2a1a930b ffffffdd | |
4412 | bne %xcc,p0_freg_check_fail | |
4413 | mov 0xf22,%g1 | |
4414 | ||
4415 | ! Check Point 21 completed | |
4416 | ||
4417 | ||
4418 | p0_label_106: | |
4419 | ! %l2 = 00000000ffc4c676, Mem[0000000010181400] = ff000000 | |
4420 | stwa %l2,[%i6+%g0]0x88 ! Mem[0000000010181400] = ffc4c676 | |
4421 | ! %f28 = fcc4c676, Mem[00000000100c1410] = 00000000 | |
4422 | sta %f28,[%i3+%o5]0x88 ! Mem[00000000100c1410] = fcc4c676 | |
4423 | ! Mem[0000000010141410] = ff9e92b7, %l0 = 00001dff41c3b07b | |
4424 | swapa [%i5+%o5]0x80,%l0 ! %l0 = 00000000ff9e92b7 | |
4425 | ! %f28 = fcc4c676, Mem[00000000300c1408] = 00000000 | |
4426 | sta %f28,[%i3+%o4]0x81 ! Mem[00000000300c1408] = fcc4c676 | |
4427 | ! Code Fragment 3 | |
4428 | p0_fragment_6: | |
4429 | ! %l0 = 00000000ff9e92b7 | |
4430 | setx 0xf2aa6777f84068b9,%g7,%l0 ! %l0 = f2aa6777f84068b9 | |
4431 | ! %l1 = 0000000000000000 | |
4432 | setx 0x67bc0a5ff5a8ce8d,%g7,%l1 ! %l1 = 67bc0a5ff5a8ce8d | |
4433 | setx 0x1fe000, %g1, %g3 | |
4434 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
4435 | setx 0x1ffff8, %g1, %g2 | |
4436 | and %l0, %g2, %l0 | |
4437 | ta T_CHANGE_HPRIV | |
4438 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
4439 | ta T_CHANGE_NONHPRIV | |
4440 | ! %l0 = f2aa6777f84068b9 | |
4441 | setx 0x483a897066f65152,%g7,%l0 ! %l0 = 483a897066f65152 | |
4442 | ! %l1 = 67bc0a5ff5a8ce8d | |
4443 | setx 0xd7171617fd1e8b23,%g7,%l1 ! %l1 = d7171617fd1e8b23 | |
4444 | ! %f0 = 7a2e51ff 00000000 ff000000 00000000 | |
4445 | ! %f4 = 947e307d 00000000 ff000000 00000024 | |
4446 | ! %f8 = 00000012 76c6c4fc 665ef8fc edf0a6df | |
4447 | ! %f12 = bbbf9dab 00000000 000000ff 59000000 | |
4448 | stda %f0,[%i3]ASI_BLK_SL ! Block Store to 00000000300c1400 | |
4449 | ! %l4 = 0000000000000000, Mem[00000000211c0000] = 00ff1a4c, %asi = 80 | |
4450 | stha %l4,[%o2+0x000]%asi ! Mem[00000000211c0000] = 00001a4c | |
4451 | ! %l7 = 00000000121d0000, Mem[0000000010101408] = ff000000 | |
4452 | stba %l7,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000 | |
4453 | ! %l5 = ffffffffffffffff, Mem[0000000030141408] = ffc4c676 | |
4454 | stwa %l5,[%i5+%o4]0x81 ! Mem[0000000030141408] = ffffffff | |
4455 | ! Starting 10 instruction Load Burst | |
4456 | ! Mem[0000000010181408] = 000000ff, %l5 = ffffffffffffffff | |
4457 | lduha [%i6+%o4]0x88,%l5 ! %l5 = 00000000000000ff | |
4458 | ||
4459 | p0_label_107: | |
4460 | ! Mem[0000000030181408] = fff85e66, %l3 = 000000007d307e94 | |
4461 | ldsha [%i6+%o4]0x81,%l3 ! %l3 = fffffffffffffff8 | |
4462 | ! Mem[0000000021800000] = ffff13a3, %l1 = d7171617fd1e8b23 | |
4463 | ldsb [%o3+0x001],%l1 ! %l1 = ffffffffffffffff | |
4464 | ! Mem[0000000010081408] = ff000000 00000024, %l4 = 00000000, %l5 = 000000ff | |
4465 | ldd [%i2+%o4],%l4 ! %l4 = 00000000ff000000 0000000000000024 | |
4466 | ! Mem[0000000010081414] = 00000000, %l1 = ffffffffffffffff | |
4467 | ldsw [%i2+0x014],%l1 ! %l1 = 0000000000000000 | |
4468 | ! Mem[0000000030001408] = 0000ff45c45f3d9f, %l0 = 483a897066f65152 | |
4469 | ldxa [%i0+%o4]0x81,%l0 ! %l0 = 0000ff45c45f3d9f | |
4470 | ! Mem[0000000010081400] = 00000000000000ff, %l7 = 00000000121d0000 | |
4471 | ldxa [%i2+%g0]0x80,%l7 ! %l7 = 00000000000000ff | |
4472 | ! Mem[000000001008142c] = 7d30519c, %l6 = 00000000b7929eff | |
4473 | ldsb [%i2+0x02c],%l6 ! %l6 = 000000000000007d | |
4474 | membar #Sync ! Added by membar checker (15) | |
4475 | ! Mem[00000000100c1410] = fcc4c676, %l1 = 0000000000000000 | |
4476 | ldsba [%i3+%o5]0x88,%l1 ! %l1 = 0000000000000076 | |
4477 | ! Mem[0000000010101400] = 0000cdbe, %l1 = 0000000000000076 | |
4478 | lduh [%i4+%g0],%l1 ! %l1 = 0000000000000000 | |
4479 | ! Starting 10 instruction Store Burst | |
4480 | ! %l1 = 0000000000000000, Mem[0000000010141408] = 560000ff | |
4481 | stwa %l1,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000000 | |
4482 | ||
4483 | p0_label_108: | |
4484 | ! %l1 = 0000000000000000, Mem[0000000030141410] = c4fc0000590000ff | |
4485 | stxa %l1,[%i5+%o5]0x89 ! Mem[0000000030141410] = 0000000000000000 | |
4486 | ! %l6 = 0000007d, %l7 = 000000ff, Mem[00000000300c1408] = 00000000 ff000000 | |
4487 | stda %l6,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 0000007d 000000ff | |
4488 | ! %l3 = fffffffffffffff8, Mem[0000000010181408] = 000000ff | |
4489 | stha %l3,[%i6+%o4]0x88 ! Mem[0000000010181408] = 0000fff8 | |
4490 | ! %l4 = 00000000ff000000, Mem[0000000010001400] = e7dca4ad | |
4491 | stba %l4,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00dca4ad | |
4492 | ! %l4 = ff000000, %l5 = 00000024, Mem[0000000010081410] = 73200dff 00000000 | |
4493 | stda %l4,[%i2+%o5]0x88 ! Mem[0000000010081410] = ff000000 00000024 | |
4494 | ! %l1 = 0000000000000000, Mem[0000000010141410] = 7bb0c341 | |
4495 | stba %l1,[%i5+%o5]0x88 ! Mem[0000000010141410] = 7bb0c300 | |
4496 | ! %l0 = c45f3d9f, %l1 = 00000000, Mem[0000000010001400] = ada4dc00 680e24c7 | |
4497 | stda %l0,[%i0+%g0]0x88 ! Mem[0000000010001400] = c45f3d9f 00000000 | |
4498 | ! Mem[0000000010141410] = 7bb0c300, %l3 = fffffffffffffff8 | |
4499 | ldstuba [%i5+%o5]0x88,%l3 ! %l3 = 00000000000000ff | |
4500 | ! Mem[0000000010141408] = 00000000, %l1 = 0000000000000000 | |
4501 | ldstuba [%i5+%o4]0x88,%l1 ! %l1 = 00000000000000ff | |
4502 | ! Starting 10 instruction Load Burst | |
4503 | ! Mem[0000000030141408] = ffffffff, %l1 = 0000000000000000 | |
4504 | ldsha [%i5+%o4]0x81,%l1 ! %l1 = ffffffffffffffff | |
4505 | ||
4506 | p0_label_109: | |
4507 | ! Mem[0000000030181408] = fff85e66 00000000, %l0 = c45f3d9f, %l1 = ffffffff | |
4508 | ldda [%i6+%o4]0x81,%l0 ! %l0 = 00000000fff85e66 0000000000000000 | |
4509 | ! Mem[0000000010101410] = ff99519c, %l4 = 00000000ff000000 | |
4510 | lduha [%i4+%o5]0x80,%l4 ! %l4 = 000000000000ff99 | |
4511 | ! Mem[00000000201c0000] = 84ff9457, %l1 = 0000000000000000 | |
4512 | ldsb [%o0+0x001],%l1 ! %l1 = ffffffffffffffff | |
4513 | ! Mem[00000000100c1410] = fcc4c676, %l5 = 0000000000000024 | |
4514 | lduwa [%i3+%o5]0x88,%l5 ! %l5 = 00000000fcc4c676 | |
4515 | ! Mem[0000000030101408] = 73200dff, %l4 = 000000000000ff99 | |
4516 | lduba [%i4+%o4]0x81,%l4 ! %l4 = 0000000000000073 | |
4517 | ! Mem[0000000010101400] = 0000cdbe, %l6 = 000000000000007d | |
4518 | lduba [%i4+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
4519 | ! Mem[0000000030001408] = 0000ff45c45f3d9f, %l4 = 0000000000000073 | |
4520 | ldxa [%i0+%o4]0x81,%l4 ! %l4 = 0000ff45c45f3d9f | |
4521 | ! Mem[00000000100c1400] = dfa6f0ff, %l7 = 00000000000000ff | |
4522 | ldswa [%i3+%g0]0x80,%l7 ! %l7 = ffffffffdfa6f0ff | |
4523 | ! Mem[0000000010001410] = ffffffc900ff1dff, %f2 = ff000000 00000000 | |
4524 | ldda [%i0+%o5]0x88,%f2 ! %f2 = ffffffc9 00ff1dff | |
4525 | ! Starting 10 instruction Store Burst | |
4526 | ! %f16 = 00000000 0000f8fc ff000000 7e42feff | |
4527 | ! %f20 = 174573fc 74817719 2a1a930b ffffffdd | |
4528 | ! %f24 = 00001dff 41c3b07b 4bf8b753 b8f773ff | |
4529 | ! %f28 = fcc4c676 d1d23403 fff0a6df 00000000 | |
4530 | stda %f16,[%i5]ASI_BLK_SL ! Block Store to 0000000030141400 | |
4531 | ||
4532 | p0_label_110: | |
4533 | ! %l0 = 00000000fff85e66, Mem[0000000010101400] = becd0000 | |
4534 | stwa %l0,[%i4+%g0]0x88 ! Mem[0000000010101400] = fff85e66 | |
4535 | ! %l7 = ffffffffdfa6f0ff, Mem[0000000030081408] = fcc4c67612000000 | |
4536 | stxa %l7,[%i2+%o4]0x81 ! Mem[0000000030081408] = ffffffffdfa6f0ff | |
4537 | ! %f5 = 00000000, Mem[0000000010001410] = ff1dff00 | |
4538 | sta %f5 ,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 | |
4539 | ! %l0 = fff85e66, %l1 = ffffffff, Mem[0000000030141410] = 19778174 fc734517 | |
4540 | stda %l0,[%i5+%o5]0x81 ! Mem[0000000030141410] = fff85e66 ffffffff | |
4541 | ! %f4 = 947e307d 00000000, Mem[0000000010181400] = ffc4c676 7e420000 | |
4542 | stda %f4 ,[%i6+%g0]0x88 ! Mem[0000000010181400] = 947e307d 00000000 | |
4543 | ! Mem[0000000030081400] = 41c3b07b, %l4 = 0000ff45c45f3d9f | |
4544 | ldstuba [%i2+%g0]0x89,%l4 ! %l4 = 0000007b000000ff | |
4545 | ! %l2 = 00000000ffc4c676, Mem[0000000010081400] = 00000000 | |
4546 | stwa %l2,[%i2+%g0]0x80 ! Mem[0000000010081400] = ffc4c676 | |
4547 | ! Mem[0000000010081436] = 8dbf4312, %l6 = 0000000000000000 | |
4548 | ldstub [%i2+0x036],%l6 ! %l6 = 00000043000000ff | |
4549 | ! %f10 = 665ef8fc edf0a6df, %l0 = 00000000fff85e66 | |
4550 | ! Mem[0000000010141410] = ffc3b07b00001d12 | |
4551 | add %i5,0x010,%g1 | |
4552 | stda %f10,[%g1+%l0]ASI_PST8_P ! Mem[0000000010141410] = ff5ef87b00f0a612 | |
4553 | ! Starting 10 instruction Load Burst | |
4554 | ! Mem[0000000010001410] = 00000000, %l7 = ffffffffdfa6f0ff | |
4555 | ldsba [%i0+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
4556 | ||
4557 | ! Check Point 22 for processor 0 | |
4558 | ||
4559 | set p0_check_pt_data_22,%g4 | |
4560 | rd %ccr,%g5 ! %g5 = 44 | |
4561 | ldx [%g4+0x08],%g2 | |
4562 | cmp %l0,%g2 ! %l0 = 00000000fff85e66 | |
4563 | bne %xcc,p0_reg_check_fail0 | |
4564 | mov 0xee0,%g1 | |
4565 | ldx [%g4+0x10],%g2 | |
4566 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
4567 | bne %xcc,p0_reg_check_fail1 | |
4568 | mov 0xee1,%g1 | |
4569 | ldx [%g4+0x18],%g2 | |
4570 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
4571 | bne %xcc,p0_reg_check_fail3 | |
4572 | mov 0xee3,%g1 | |
4573 | ldx [%g4+0x20],%g2 | |
4574 | cmp %l4,%g2 ! %l4 = 000000000000007b | |
4575 | bne %xcc,p0_reg_check_fail4 | |
4576 | mov 0xee4,%g1 | |
4577 | ldx [%g4+0x28],%g2 | |
4578 | cmp %l5,%g2 ! %l5 = 00000000fcc4c676 | |
4579 | bne %xcc,p0_reg_check_fail5 | |
4580 | mov 0xee5,%g1 | |
4581 | ldx [%g4+0x30],%g2 | |
4582 | cmp %l6,%g2 ! %l6 = 0000000000000043 | |
4583 | bne %xcc,p0_reg_check_fail6 | |
4584 | mov 0xee6,%g1 | |
4585 | ldx [%g4+0x38],%g2 | |
4586 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
4587 | bne %xcc,p0_reg_check_fail7 | |
4588 | mov 0xee7,%g1 | |
4589 | ldx [%g4+0x40],%g3 | |
4590 | std %f0,[%g4] | |
4591 | ldx [%g4],%g2 | |
4592 | cmp %g3,%g2 ! %f0 = 7a2e51ff 00000000 | |
4593 | bne %xcc,p0_freg_check_fail | |
4594 | mov 0xf00,%g1 | |
4595 | ldx [%g4+0x48],%g3 | |
4596 | std %f2,[%g4] | |
4597 | ldx [%g4],%g2 | |
4598 | cmp %g3,%g2 ! %f2 = ffffffc9 00ff1dff | |
4599 | bne %xcc,p0_freg_check_fail | |
4600 | mov 0xf02,%g1 | |
4601 | ldx [%g4+0x50],%g3 | |
4602 | std %f4,[%g4] | |
4603 | ldx [%g4],%g2 | |
4604 | cmp %g3,%g2 ! %f4 = 947e307d 00000000 | |
4605 | bne %xcc,p0_freg_check_fail | |
4606 | mov 0xf04,%g1 | |
4607 | ||
4608 | ! Check Point 22 completed | |
4609 | ||
4610 | ||
4611 | p0_label_111: | |
4612 | ! Mem[0000000020800040] = f8fc7379, %l7 = 0000000000000000 | |
4613 | ldsba [%o1+0x041]%asi,%l7 ! %l7 = fffffffffffffffc | |
4614 | ! Mem[00000000300c1408] = 0000007d, %l1 = ffffffffffffffff | |
4615 | lduha [%i3+%o4]0x89,%l1 ! %l1 = 000000000000007d | |
4616 | ! Mem[0000000030081400] = 41c3b0ff, %l5 = 00000000fcc4c676 | |
4617 | lduba [%i2+%g0]0x89,%l5 ! %l5 = 00000000000000ff | |
4618 | ! Mem[0000000030181410] = 00000000, %l1 = 000000000000007d | |
4619 | lduha [%i6+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
4620 | ! Mem[0000000010081408] = 000000ff, %l4 = 000000000000007b | |
4621 | ldsba [%i2+%o4]0x88,%l4 ! %l4 = ffffffffffffffff | |
4622 | ! Mem[0000000010001400] = 9f3d5fc4, %l4 = ffffffffffffffff | |
4623 | lduba [%i0+%g0]0x80,%l4 ! %l4 = 000000000000009f | |
4624 | ! Mem[0000000010181410] = fc7345ff, %l3 = 0000000000000000 | |
4625 | ldsha [%i6+%o5]0x88,%l3 ! %l3 = 00000000000045ff | |
4626 | ! Mem[0000000030041408] = ff000000, %l6 = 0000000000000043 | |
4627 | lduha [%i1+%o4]0x81,%l6 ! %l6 = 000000000000ff00 | |
4628 | ! Mem[0000000010181408] = f8ff000076c6c4fc, %f16 = 00000000 0000f8fc | |
4629 | ldda [%i6+%o4]0x80,%f16 ! %f16 = f8ff0000 76c6c4fc | |
4630 | ! Starting 10 instruction Store Burst | |
4631 | ! %f2 = ffffffc9, Mem[0000000010181410] = ff4573fc | |
4632 | sta %f2 ,[%i6+%o5]0x80 ! Mem[0000000010181410] = ffffffc9 | |
4633 | ||
4634 | p0_label_112: | |
4635 | ! %l6 = 000000000000ff00, Mem[0000000010001420] = 7c9650aa | |
4636 | stw %l6,[%i0+0x020] ! Mem[0000000010001420] = 0000ff00 | |
4637 | ! Mem[00000000201c0001] = 84ff9457, %l0 = 00000000fff85e66 | |
4638 | ldstuba [%o0+0x001]%asi,%l0 ! %l0 = 000000ff000000ff | |
4639 | ! Mem[0000000010181410] = c9ffffff, %l5 = 00000000000000ff | |
4640 | ldstuba [%i6+%o5]0x88,%l5 ! %l5 = 000000ff000000ff | |
4641 | ! %l0 = 00000000000000ff, Mem[0000000010101418] = 50d30000752b05bc, %asi = 80 | |
4642 | stxa %l0,[%i4+0x018]%asi ! Mem[0000000010101418] = 00000000000000ff | |
4643 | ! Mem[00000000211c0000] = 00001a4c, %l3 = 00000000000045ff | |
4644 | ldstub [%o2+%g0],%l3 ! %l3 = 00000000000000ff | |
4645 | ! %f16 = f8ff0000 76c6c4fc, %l7 = fffffffffffffffc | |
4646 | ! Mem[00000000300c1418] = 24000000000000ff | |
4647 | add %i3,0x018,%g1 | |
4648 | stda %f16,[%g1+%l7]ASI_PST8_SL ! Mem[00000000300c1418] = 2400c6760000fff8 | |
4649 | ! %f24 = 00001dff 41c3b07b, %l5 = 00000000000000ff | |
4650 | ! Mem[0000000010181430] = ffffff0012ff76c9 | |
4651 | add %i6,0x030,%g1 | |
4652 | stda %f24,[%g1+%l5]ASI_PST8_P ! Mem[0000000010181430] = 00001dff41c3b07b | |
4653 | ! %l4 = 0000009f, %l5 = 000000ff, Mem[0000000010001400] = 9f3d5fc4 00000000 | |
4654 | stda %l4,[%i0+%g0]0x80 ! Mem[0000000010001400] = 0000009f 000000ff | |
4655 | ! %f16 = f8ff0000, Mem[0000000030001400] = 7d307e94 | |
4656 | sta %f16,[%i0+%g0]0x81 ! Mem[0000000030001400] = f8ff0000 | |
4657 | ! Starting 10 instruction Load Burst | |
4658 | ! Mem[0000000010041400] = 124444cf, %l6 = 000000000000ff00 | |
4659 | lduwa [%i1+%g0]0x88,%l6 ! %l6 = 00000000124444cf | |
4660 | ||
4661 | p0_label_113: | |
4662 | ! Mem[0000000010081408] = ff000000, %f25 = 41c3b07b | |
4663 | lda [%i2+%o4]0x80,%f25 ! %f25 = ff000000 | |
4664 | ! Mem[00000000100c1408] = ff000000, %l2 = 00000000ffc4c676 | |
4665 | lduba [%i3+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
4666 | ! Mem[0000000010101408] = 00000000, %l0 = 00000000000000ff | |
4667 | lduha [%i4+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
4668 | ! Mem[0000000030101408] = ff0d2073, %l1 = 0000000000000000 | |
4669 | ldsba [%i4+%o4]0x89,%l1 ! %l1 = 0000000000000073 | |
4670 | ! Mem[0000000010081408] = 000000ff, %l3 = 0000000000000000 | |
4671 | ldswa [%i2+%o4]0x88,%l3 ! %l3 = 00000000000000ff | |
4672 | ! Mem[0000000010081410] = 000000ff24000000, %l5 = 00000000000000ff | |
4673 | ldxa [%i2+%o5]0x80,%l5 ! %l5 = 000000ff24000000 | |
4674 | ! Mem[0000000010181408] = f8ff0000, %l7 = fffffffffffffffc | |
4675 | lduha [%i6+%o4]0x80,%l7 ! %l7 = 000000000000f8ff | |
4676 | ! Mem[0000000010181408] = f8ff0000, %l5 = 000000ff24000000 | |
4677 | ldsba [%i6+%o4]0x80,%l5 ! %l5 = fffffffffffffff8 | |
4678 | ! Mem[0000000010001400] = 9f000000, %l4 = 000000000000009f | |
4679 | lduwa [%i0+%g0]0x88,%l4 ! %l4 = 000000009f000000 | |
4680 | ! Starting 10 instruction Store Burst | |
4681 | membar #Sync ! Added by membar checker (16) | |
4682 | ! Mem[0000000030141400] = 0000f8fc, %l4 = 000000009f000000 | |
4683 | swapa [%i5+%g0]0x89,%l4 ! %l4 = 000000000000f8fc | |
4684 | ||
4685 | p0_label_114: | |
4686 | ! %l5 = fffffffffffffff8, Mem[0000000010081408] = 000000ff | |
4687 | stwa %l5,[%i2+%o4]0x88 ! Mem[0000000010081408] = fffffff8 | |
4688 | ! %l2 = 0000000000000000, Mem[0000000010141400] = 121d0000 | |
4689 | stwa %l2,[%i5+%g0]0x88 ! Mem[0000000010141400] = 00000000 | |
4690 | ! %l5 = fffffffffffffff8, Mem[0000000030141410] = ffffffff665ef8ff | |
4691 | stxa %l5,[%i5+%o5]0x89 ! Mem[0000000030141410] = fffffffffffffff8 | |
4692 | ! Mem[0000000030181408] = 665ef8ff, %l0 = 0000000000000000 | |
4693 | swapa [%i6+%o4]0x89,%l0 ! %l0 = 00000000665ef8ff | |
4694 | ! %l3 = 00000000000000ff, Mem[00000000211c0001] = ff001a4c, %asi = 80 | |
4695 | stba %l3,[%o2+0x001]%asi ! Mem[00000000211c0000] = ffff1a4c | |
4696 | ! Mem[0000000010141408] = ff000000, %l3 = 00000000000000ff | |
4697 | swapa [%i5+%o4]0x80,%l3 ! %l3 = 00000000ff000000 | |
4698 | ! %l2 = 0000000000000000, Mem[0000000010001408] = 00000000 | |
4699 | stha %l2,[%i0+%o4]0x88 ! Mem[0000000010001408] = 00000000 | |
4700 | ! Mem[0000000030001400] = f8ff0000, %l7 = 000000000000f8ff | |
4701 | ldstuba [%i0+%g0]0x81,%l7 ! %l7 = 000000f8000000ff | |
4702 | ! Mem[0000000010081408] = f8ffffff, %l5 = fffffffffffffff8 | |
4703 | swapa [%i2+%o4]0x80,%l5 ! %l5 = 00000000f8ffffff | |
4704 | ! Starting 10 instruction Load Burst | |
4705 | ! Mem[00000000100c1418] = 000000fffcc4c676, %f24 = 00001dff ff000000 | |
4706 | ldd [%i3+0x018],%f24 ! %f24 = 000000ff fcc4c676 | |
4707 | ||
4708 | p0_label_115: | |
4709 | ! Mem[0000000030141408] = fffe427e 000000ff, %l2 = 00000000, %l3 = ff000000 | |
4710 | ldda [%i5+%o4]0x81,%l2 ! %l2 = 00000000fffe427e 00000000000000ff | |
4711 | ! Mem[0000000010181400] = 00000000, %l2 = 00000000fffe427e | |
4712 | ldswa [%i6+%g0]0x80,%l2 ! %l2 = 0000000000000000 | |
4713 | ! Mem[000000001000141c] = 8dbf4312, %l1 = 0000000000000073 | |
4714 | lduba [%i0+0x01d]%asi,%l1 ! %l1 = 00000000000000bf | |
4715 | ! Mem[0000000010001408] = 0000000000000000, %l3 = 00000000000000ff | |
4716 | ldx [%i0+%o4],%l3 ! %l3 = 0000000000000000 | |
4717 | ! Mem[0000000010041408] = fff0a6df00000000, %l1 = 00000000000000bf | |
4718 | ldxa [%i1+%o4]0x80,%l1 ! %l1 = fff0a6df00000000 | |
4719 | ! Mem[00000000300c1400] = 00000000ff512e7a, %l4 = 000000000000f8fc | |
4720 | ldxa [%i3+%g0]0x81,%l4 ! %l4 = 00000000ff512e7a | |
4721 | ! Mem[0000000030181408] = 00000000, %l7 = 00000000000000f8 | |
4722 | ldswa [%i6+%o4]0x81,%l7 ! %l7 = 0000000000000000 | |
4723 | ! Mem[00000000300c1410] = 00000000, %l5 = 00000000f8ffffff | |
4724 | ldswa [%i3+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
4725 | ! Mem[00000000100c1400] = fff0a6df, %l1 = fff0a6df00000000 | |
4726 | lduba [%i3+%g0]0x88,%l1 ! %l1 = 00000000000000df | |
4727 | ! Starting 10 instruction Store Burst | |
4728 | ! Mem[0000000030041408] = 000000ff, %f16 = f8ff0000 | |
4729 | lda [%i1+%o4]0x89,%f16 ! %f16 = 000000ff | |
4730 | ||
4731 | ! Check Point 23 for processor 0 | |
4732 | ||
4733 | set p0_check_pt_data_23,%g4 | |
4734 | rd %ccr,%g5 ! %g5 = 44 | |
4735 | ldx [%g4+0x08],%g2 | |
4736 | cmp %l0,%g2 ! %l0 = 00000000665ef8ff | |
4737 | bne %xcc,p0_reg_check_fail0 | |
4738 | mov 0xee0,%g1 | |
4739 | ldx [%g4+0x10],%g2 | |
4740 | cmp %l1,%g2 ! %l1 = 00000000000000df | |
4741 | bne %xcc,p0_reg_check_fail1 | |
4742 | mov 0xee1,%g1 | |
4743 | ldx [%g4+0x18],%g2 | |
4744 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
4745 | bne %xcc,p0_reg_check_fail2 | |
4746 | mov 0xee2,%g1 | |
4747 | ldx [%g4+0x20],%g2 | |
4748 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
4749 | bne %xcc,p0_reg_check_fail3 | |
4750 | mov 0xee3,%g1 | |
4751 | ldx [%g4+0x28],%g2 | |
4752 | cmp %l4,%g2 ! %l4 = 00000000ff512e7a | |
4753 | bne %xcc,p0_reg_check_fail4 | |
4754 | mov 0xee4,%g1 | |
4755 | ldx [%g4+0x30],%g2 | |
4756 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
4757 | bne %xcc,p0_reg_check_fail5 | |
4758 | mov 0xee5,%g1 | |
4759 | ldx [%g4+0x38],%g2 | |
4760 | cmp %l6,%g2 ! %l6 = 00000000124444cf | |
4761 | bne %xcc,p0_reg_check_fail6 | |
4762 | mov 0xee6,%g1 | |
4763 | ldx [%g4+0x40],%g2 | |
4764 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
4765 | bne %xcc,p0_reg_check_fail7 | |
4766 | mov 0xee7,%g1 | |
4767 | ldx [%g4+0x48],%g3 | |
4768 | std %f2,[%g4] | |
4769 | ldx [%g4],%g2 | |
4770 | cmp %g3,%g2 ! %f2 = ffffffc9 00ff1dff | |
4771 | bne %xcc,p0_freg_check_fail | |
4772 | mov 0xf02,%g1 | |
4773 | ldx [%g4+0x50],%g3 | |
4774 | std %f16,[%g4] | |
4775 | ldx [%g4],%g2 | |
4776 | cmp %g3,%g2 ! %f16 = 000000ff 76c6c4fc | |
4777 | bne %xcc,p0_freg_check_fail | |
4778 | mov 0xf16,%g1 | |
4779 | ldx [%g4+0x58],%g3 | |
4780 | std %f24,[%g4] | |
4781 | ldx [%g4],%g2 | |
4782 | cmp %g3,%g2 ! %f24 = 000000ff fcc4c676 | |
4783 | bne %xcc,p0_freg_check_fail | |
4784 | mov 0xf24,%g1 | |
4785 | ||
4786 | ! Check Point 23 completed | |
4787 | ||
4788 | ||
4789 | p0_label_116: | |
4790 | ! Mem[00000000300c1400] = 00000000, %l4 = 00000000ff512e7a | |
4791 | swapa [%i3+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
4792 | ! %l5 = 0000000000000000, Mem[0000000010181400] = 947e307d00000000 | |
4793 | stxa %l5,[%i6+%g0]0x88 ! Mem[0000000010181400] = 0000000000000000 | |
4794 | ! Mem[0000000010141410] = 7bf85eff, %l4 = 0000000000000000 | |
4795 | swapa [%i5+%o5]0x88,%l4 ! %l4 = 000000007bf85eff | |
4796 | ! %f8 = 00000012 76c6c4fc, %l2 = 0000000000000000 | |
4797 | ! Mem[0000000010101438] = e96893a42bf77274 | |
4798 | add %i4,0x038,%g1 | |
4799 | stda %f8,[%g1+%l2]ASI_PST32_P ! Mem[0000000010101438] = e96893a42bf77274 | |
4800 | ! %l0 = 00000000665ef8ff, Mem[0000000010081410] = ff000000 | |
4801 | stwa %l0,[%i2+%o5]0x88 ! Mem[0000000010081410] = 665ef8ff | |
4802 | ! %l0 = 00000000665ef8ff, %l1 = 00000000000000df, %l3 = 0000000000000000 | |
4803 | xor %l0,%l1,%l3 ! %l3 = 00000000665ef820 | |
4804 | ! Mem[0000000010001410] = 00000000, %l3 = 00000000665ef820 | |
4805 | ldstuba [%i0+%o5]0x80,%l3 ! %l3 = 00000000000000ff | |
4806 | ! Mem[0000000010041430] = fcc4c676, %l2 = 00000000, %l2 = 00000000 | |
4807 | add %i1,0x30,%g1 | |
4808 | casa [%g1]0x80,%l2,%l2 ! %l2 = 00000000fcc4c676 | |
4809 | ! Mem[0000000030141400] = 9f000000, %l1 = 00000000000000df | |
4810 | ldstuba [%i5+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
4811 | ! Starting 10 instruction Load Burst | |
4812 | ! Mem[0000000010101408] = 000000007d307e94, %l1 = 0000000000000000 | |
4813 | ldxa [%i4+%o4]0x80,%l1 ! %l1 = 000000007d307e94 | |
4814 | ||
4815 | p0_label_117: | |
4816 | ! Mem[0000000010141410] = 00000000, %l4 = 000000007bf85eff | |
4817 | lduha [%i5+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
4818 | ! Mem[00000000300c1408] = 7d000000, %l6 = 00000000124444cf | |
4819 | lduwa [%i3+%o4]0x81,%l6 ! %l6 = 000000007d000000 | |
4820 | ! Mem[0000000030181410] = 00000000, %f31 = 00000000 | |
4821 | lda [%i6+%o5]0x81,%f31 ! %f31 = 00000000 | |
4822 | ! Mem[0000000020800040] = f8fc7379, %l4 = 0000000000000000 | |
4823 | ldsb [%o1+0x041],%l4 ! %l4 = fffffffffffffffc | |
4824 | ! Mem[0000000010101408] = 000000007d307e94, %f8 = 00000012 76c6c4fc | |
4825 | ldda [%i4+%o4]0x80,%f8 ! %f8 = 00000000 7d307e94 | |
4826 | ! Mem[0000000030101408] = ff0d2073, %l7 = 0000000000000000 | |
4827 | lduba [%i4+%o4]0x89,%l7 ! %l7 = 0000000000000073 | |
4828 | ! Mem[0000000030181408] = 00000000 00000000, %l4 = fffffffc, %l5 = 00000000 | |
4829 | ldda [%i6+%o4]0x81,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
4830 | ! Mem[0000000010181410] = ffffffc9, %l4 = 0000000000000000 | |
4831 | ldsha [%i6+%o5]0x80,%l4 ! %l4 = ffffffffffffffff | |
4832 | ! Mem[0000000030041400] = 00001dff 000000ff, %l0 = 665ef8ff, %l1 = 7d307e94 | |
4833 | ldda [%i1+%g0]0x89,%l0 ! %l0 = 00000000000000ff 0000000000001dff | |
4834 | ! Starting 10 instruction Store Burst | |
4835 | ! Mem[0000000030181408] = 00000000, %l6 = 000000007d000000 | |
4836 | ldsha [%i6+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
4837 | ||
4838 | p0_label_118: | |
4839 | ! %l6 = 0000000000000000, Mem[00000000201c0000] = 84ff9457, %asi = 80 | |
4840 | stha %l6,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00009457 | |
4841 | ! Mem[000000001014142b] = 4e239aff, %l7 = 0000000000000073 | |
4842 | ldstub [%i5+0x02b],%l7 ! %l7 = 000000ff000000ff | |
4843 | ! Mem[0000000010041408] = fff0a6df, %l1 = 0000000000001dff | |
4844 | swapa [%i1+%o4]0x80,%l1 ! %l1 = 00000000fff0a6df | |
4845 | ! %f17 = 76c6c4fc, Mem[0000000010081400] = ffc4c676 | |
4846 | sta %f17,[%i2+%g0]0x80 ! Mem[0000000010081400] = 76c6c4fc | |
4847 | ! %f10 = 665ef8fc, Mem[0000000010001410] = 000000ff | |
4848 | sta %f10,[%i0+%o5]0x88 ! Mem[0000000010001410] = 665ef8fc | |
4849 | ! Mem[0000000010041434] = 64663f7f, %l5 = 00000000, %l3 = 00000000 | |
4850 | add %i1,0x34,%g1 | |
4851 | casa [%g1]0x80,%l5,%l3 ! %l3 = 0000000064663f7f | |
4852 | ! %f22 = 2a1a930b, Mem[0000000030101410] = 92b70000 | |
4853 | sta %f22,[%i4+%o5]0x81 ! Mem[0000000030101410] = 2a1a930b | |
4854 | ! Mem[0000000021800000] = ffff13a3, %l7 = 00000000000000ff | |
4855 | ldstuba [%o3+0x000]%asi,%l7 ! %l7 = 000000ff000000ff | |
4856 | ! Mem[0000000030181410] = 00000000, %l3 = 0000000064663f7f | |
4857 | swapa [%i6+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
4858 | ! Starting 10 instruction Load Burst | |
4859 | ! Mem[0000000030081400] = ffb0c341ff1d0000, %f0 = 7a2e51ff 00000000 | |
4860 | ldda [%i2+%g0]0x81,%f0 ! %f0 = ffb0c341 ff1d0000 | |
4861 | ||
4862 | p0_label_119: | |
4863 | ! Mem[000000001004142c] = fc734517, %l2 = 00000000fcc4c676 | |
4864 | lduwa [%i1+0x02c]%asi,%l2 ! %l2 = 00000000fc734517 | |
4865 | membar #Sync ! Added by membar checker (17) | |
4866 | ! Mem[0000000030141400] = ff00009f 00000000 fffe427e 000000ff | |
4867 | ! Mem[0000000030141410] = f8ffffff ffffffff ddffffff 0b931a2a | |
4868 | ! Mem[0000000030141420] = 7bb0c341 ff1d0000 ff73f7b8 53b7f84b | |
4869 | ! Mem[0000000030141430] = 0334d2d1 76c6c4fc 00000000 dfa6f0ff | |
4870 | ldda [%i5]ASI_BLK_AIUSL,%f0 ! Block Load from 0000000030141400 | |
4871 | ! Mem[0000000010001408] = 00000000, %l1 = 00000000fff0a6df | |
4872 | lduba [%i0+%o4]0x88,%l1 ! %l1 = 0000000000000000 | |
4873 | ! Mem[00000000211c0000] = ffff1a4c, %l3 = 0000000000000000 | |
4874 | ldsb [%o2+%g0],%l3 ! %l3 = ffffffffffffffff | |
4875 | ! Mem[0000000030001408] = 0000ff45 c45f3d9f, %l0 = 000000ff, %l1 = 00000000 | |
4876 | ldda [%i0+%o4]0x81,%l0 ! %l0 = 000000000000ff45 00000000c45f3d9f | |
4877 | ! Mem[0000000010001400] = 0000009f 000000ff, %l6 = 00000000, %l7 = 000000ff | |
4878 | ldda [%i0+%g0]0x80,%l6 ! %l6 = 000000000000009f 00000000000000ff | |
4879 | ! Mem[0000000010041400] = ff000000124444cf, %f28 = fcc4c676 d1d23403 | |
4880 | ldda [%i1+%g0]0x88,%f28 ! %f28 = ff000000 124444cf | |
4881 | ! Mem[0000000010141400] = 00000000, %l7 = 00000000000000ff | |
4882 | lduba [%i5+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
4883 | ! Mem[0000000030101400] = 000000ff, %l6 = 000000000000009f | |
4884 | ldsba [%i4+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
4885 | ! Starting 10 instruction Store Burst | |
4886 | ! %f18 = ff000000 7e42feff, Mem[0000000010181408] = f8ff0000 76c6c4fc | |
4887 | stda %f18,[%i6+%o4]0x80 ! Mem[0000000010181408] = ff000000 7e42feff | |
4888 | ||
4889 | p0_label_120: | |
4890 | ! %l0 = 0000ff45, %l1 = c45f3d9f, Mem[0000000010001408] = 00000000 00000000 | |
4891 | stda %l0,[%i0+%o4]0x88 ! Mem[0000000010001408] = 0000ff45 c45f3d9f | |
4892 | ! %f24 = 000000ff fcc4c676, %l6 = 0000000000000000 | |
4893 | ! Mem[0000000010141418] = ff1d000000000024 | |
4894 | add %i5,0x018,%g1 | |
4895 | stda %f24,[%g1+%l6]ASI_PST16_P ! Mem[0000000010141418] = ff1d000000000024 | |
4896 | ! Mem[00000000100c1400] = fff0a6df, %l1 = 00000000c45f3d9f | |
4897 | swapa [%i3+%g0]0x88,%l1 ! %l1 = 00000000fff0a6df | |
4898 | ! %l5 = 0000000000000000, Mem[0000000021800000] = ffff13a3, %asi = 80 | |
4899 | stha %l5,[%o3+0x000]%asi ! Mem[0000000021800000] = 000013a3 | |
4900 | ! %f28 = ff000000 124444cf, Mem[0000000010101400] = 665ef8ff 000000e6 | |
4901 | std %f28,[%i4+%g0] ! Mem[0000000010101400] = ff000000 124444cf | |
4902 | ! %f18 = ff000000 7e42feff, Mem[0000000030041400] = 000000ff 00001dff | |
4903 | stda %f18,[%i1+%g0]0x89 ! Mem[0000000030041400] = ff000000 7e42feff | |
4904 | ! Mem[0000000030081408] = ffffffff, %l7 = 0000000000000000 | |
4905 | swapa [%i2+%o4]0x81,%l7 ! %l7 = 00000000ffffffff | |
4906 | ! Mem[0000000010001410] = fcf85e66, %f17 = 76c6c4fc | |
4907 | lda [%i0+%o5]0x80,%f17 ! %f17 = fcf85e66 | |
4908 | ! %f30 = fff0a6df 00000000, Mem[0000000030001408] = 0000ff45 c45f3d9f | |
4909 | stda %f30,[%i0+%o4]0x81 ! Mem[0000000030001408] = fff0a6df 00000000 | |
4910 | ! Starting 10 instruction Load Burst | |
4911 | ! Mem[0000000010181428] = 426070e9fc734517, %f16 = 000000ff fcf85e66 | |
4912 | ldd [%i6+0x028],%f16 ! %f16 = 426070e9 fc734517 | |
4913 | ||
4914 | ! Check Point 24 for processor 0 | |
4915 | ||
4916 | set p0_check_pt_data_24,%g4 | |
4917 | rd %ccr,%g5 ! %g5 = 44 | |
4918 | ldx [%g4+0x08],%g2 | |
4919 | cmp %l1,%g2 ! %l1 = 00000000fff0a6df | |
4920 | bne %xcc,p0_reg_check_fail1 | |
4921 | mov 0xee1,%g1 | |
4922 | ldx [%g4+0x10],%g2 | |
4923 | cmp %l2,%g2 ! %l2 = 00000000fc734517 | |
4924 | bne %xcc,p0_reg_check_fail2 | |
4925 | mov 0xee2,%g1 | |
4926 | ldx [%g4+0x18],%g2 | |
4927 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
4928 | bne %xcc,p0_reg_check_fail3 | |
4929 | mov 0xee3,%g1 | |
4930 | ldx [%g4+0x20],%g2 | |
4931 | cmp %l4,%g2 ! %l4 = ffffffffffffffff | |
4932 | bne %xcc,p0_reg_check_fail4 | |
4933 | mov 0xee4,%g1 | |
4934 | ldx [%g4+0x28],%g2 | |
4935 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
4936 | bne %xcc,p0_reg_check_fail6 | |
4937 | mov 0xee6,%g1 | |
4938 | ldx [%g4+0x30],%g2 | |
4939 | cmp %l7,%g2 ! %l7 = 00000000ffffffff | |
4940 | bne %xcc,p0_reg_check_fail7 | |
4941 | mov 0xee7,%g1 | |
4942 | ldx [%g4+0x38],%g3 | |
4943 | std %f0,[%g4] | |
4944 | ldx [%g4],%g2 | |
4945 | cmp %g3,%g2 ! %f0 = 00000000 9f0000ff | |
4946 | bne %xcc,p0_freg_check_fail | |
4947 | mov 0xf00,%g1 | |
4948 | ldx [%g4+0x40],%g3 | |
4949 | std %f2,[%g4] | |
4950 | ldx [%g4],%g2 | |
4951 | cmp %g3,%g2 ! %f2 = ff000000 7e42feff | |
4952 | bne %xcc,p0_freg_check_fail | |
4953 | mov 0xf02,%g1 | |
4954 | ldx [%g4+0x48],%g3 | |
4955 | std %f4,[%g4] | |
4956 | ldx [%g4],%g2 | |
4957 | cmp %g3,%g2 ! %f4 = ffffffff fffffff8 | |
4958 | bne %xcc,p0_freg_check_fail | |
4959 | mov 0xf04,%g1 | |
4960 | ldx [%g4+0x50],%g3 | |
4961 | std %f6,[%g4] | |
4962 | ldx [%g4],%g2 | |
4963 | cmp %g3,%g2 ! %f6 = 2a1a930b ffffffdd | |
4964 | bne %xcc,p0_freg_check_fail | |
4965 | mov 0xf06,%g1 | |
4966 | ldx [%g4+0x58],%g3 | |
4967 | std %f8,[%g4] | |
4968 | ldx [%g4],%g2 | |
4969 | cmp %g3,%g2 ! %f8 = 00001dff 41c3b07b | |
4970 | bne %xcc,p0_freg_check_fail | |
4971 | mov 0xf08,%g1 | |
4972 | ldx [%g4+0x60],%g3 | |
4973 | std %f10,[%g4] | |
4974 | ldx [%g4],%g2 | |
4975 | cmp %g3,%g2 ! %f10 = 4bf8b753 b8f773ff | |
4976 | bne %xcc,p0_freg_check_fail | |
4977 | mov 0xf10,%g1 | |
4978 | ldx [%g4+0x68],%g3 | |
4979 | std %f12,[%g4] | |
4980 | ldx [%g4],%g2 | |
4981 | cmp %g3,%g2 ! %f12 = fcc4c676 d1d23403 | |
4982 | bne %xcc,p0_freg_check_fail | |
4983 | mov 0xf12,%g1 | |
4984 | ldx [%g4+0x70],%g3 | |
4985 | std %f14,[%g4] | |
4986 | ldx [%g4],%g2 | |
4987 | cmp %g3,%g2 ! %f14 = fff0a6df 00000000 | |
4988 | bne %xcc,p0_freg_check_fail | |
4989 | mov 0xf14,%g1 | |
4990 | ldx [%g4+0x78],%g3 | |
4991 | std %f16,[%g4] | |
4992 | ldx [%g4],%g2 | |
4993 | cmp %g3,%g2 ! %f16 = 426070e9 fc734517 | |
4994 | bne %xcc,p0_freg_check_fail | |
4995 | mov 0xf16,%g1 | |
4996 | ldx [%g4+0x80],%g3 | |
4997 | std %f28,[%g4] | |
4998 | ldx [%g4],%g2 | |
4999 | cmp %g3,%g2 ! %f28 = ff000000 124444cf | |
5000 | bne %xcc,p0_freg_check_fail | |
5001 | mov 0xf28,%g1 | |
5002 | ldx [%g4+0x88],%g3 | |
5003 | std %f30,[%g4] | |
5004 | ldx [%g4],%g2 | |
5005 | cmp %g3,%g2 ! %f30 = fff0a6df 00000000 | |
5006 | bne %xcc,p0_freg_check_fail | |
5007 | mov 0xf30,%g1 | |
5008 | ||
5009 | ! Check Point 24 completed | |
5010 | ||
5011 | ||
5012 | p0_label_121: | |
5013 | ! Mem[0000000010041408] = 00001dff, %l7 = 00000000ffffffff | |
5014 | lduba [%i1+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
5015 | ! Mem[0000000010081410] = fff85e66, %l2 = 00000000fc734517 | |
5016 | ldsba [%i2+%o5]0x80,%l2 ! %l2 = ffffffffffffffff | |
5017 | ! Mem[0000000010181410] = ffffffc9, %l4 = ffffffffffffffff | |
5018 | ldswa [%i6+%o5]0x80,%l4 ! %l4 = ffffffffffffffc9 | |
5019 | ! Mem[0000000010181410] = ff000000c9ffffff, %l4 = ffffffffffffffc9 | |
5020 | ldxa [%i6+%o5]0x88,%l4 ! %l4 = ff000000c9ffffff | |
5021 | ! Mem[0000000010181400] = 00000000, %l1 = 00000000fff0a6df | |
5022 | ldsha [%i6+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
5023 | ! Mem[0000000021800180] = 00ffe2ae, %l3 = ffffffffffffffff | |
5024 | ldsha [%o3+0x180]%asi,%l3 ! %l3 = 00000000000000ff | |
5025 | ! Mem[0000000020800000] = 00ff8470, %l3 = 00000000000000ff | |
5026 | ldsb [%o1+%g0],%l3 ! %l3 = 0000000000000000 | |
5027 | membar #Sync ! Added by membar checker (18) | |
5028 | ! Mem[0000000030001400] = ffff0000 d76d7edb fff0a6df 00000000 | |
5029 | ! Mem[0000000030001410] = fcc4c676 76c6c4fc 23e3b364 90da2bca | |
5030 | ! Mem[0000000030001420] = 9c156421 76c6411f 5d57d4e0 3d61d89c | |
5031 | ! Mem[0000000030001430] = d9d7a7d5 10710795 022d96f8 d6ba79b1 | |
5032 | ldda [%i0]ASI_BLK_AIUSL,%f0 ! Block Load from 0000000030001400 | |
5033 | ! Mem[0000000030141410] = f8ffffffffffffff, %l3 = 0000000000000000 | |
5034 | ldxa [%i5+%o5]0x81,%l3 ! %l3 = f8ffffffffffffff | |
5035 | ! Starting 10 instruction Store Burst | |
5036 | membar #Sync ! Added by membar checker (19) | |
5037 | ! %l7 = 0000000000000000, Mem[0000000030001400] = 0000ffff | |
5038 | stha %l7,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00000000 | |
5039 | ||
5040 | p0_label_122: | |
5041 | ! Mem[0000000030181410] = 7f3f6664, %l2 = ffffffffffffffff | |
5042 | swapa [%i6+%o5]0x81,%l2 ! %l2 = 000000007f3f6664 | |
5043 | ! Mem[0000000030101400] = 000000ff, %l3 = f8ffffffffffffff | |
5044 | swapa [%i4+%g0]0x81,%l3 ! %l3 = 00000000000000ff | |
5045 | ! Mem[0000000010181410] = c9ffffff, %l0 = 000000000000ff45 | |
5046 | swapa [%i6+%o5]0x88,%l0 ! %l0 = 00000000c9ffffff | |
5047 | ! %l3 = 00000000000000ff, Mem[0000000010141410] = 00000000 | |
5048 | stwa %l3,[%i5+%o5]0x80 ! Mem[0000000010141410] = 000000ff | |
5049 | ! %l6 = 0000000000000000, Mem[0000000010141408] = ff000000 | |
5050 | stba %l6,[%i5+%o4]0x88 ! Mem[0000000010141408] = ff000000 | |
5051 | ! %l7 = 0000000000000000, Mem[0000000010081400] = 76c6c4fc000000ff | |
5052 | stxa %l7,[%i2+%g0]0x80 ! Mem[0000000010081400] = 0000000000000000 | |
5053 | ! %l7 = 0000000000000000, Mem[0000000010041400] = ff000000124444cf | |
5054 | stxa %l7,[%i1+%g0]0x88 ! Mem[0000000010041400] = 0000000000000000 | |
5055 | ! %f20 = 174573fc 74817719, Mem[0000000010181418] = 7a2e51ff 19778174 | |
5056 | stda %f20,[%i6+0x018]%asi ! Mem[0000000010181418] = 174573fc 74817719 | |
5057 | ! %l2 = 000000007f3f6664, Mem[00000000211c0000] = ffff1a4c | |
5058 | sth %l2,[%o2+%g0] ! Mem[00000000211c0000] = 66641a4c | |
5059 | ! Starting 10 instruction Load Burst | |
5060 | ! Mem[0000000010141400] = 00000000, %l2 = 000000007f3f6664 | |
5061 | ldsha [%i5+%g0]0x80,%l2 ! %l2 = 0000000000000000 | |
5062 | ||
5063 | p0_label_123: | |
5064 | ! Mem[0000000030181408] = 0000000000000000, %l6 = 0000000000000000 | |
5065 | ldxa [%i6+%o4]0x81,%l6 ! %l6 = 0000000000000000 | |
5066 | ! Mem[0000000010001408] = 0000ff45, %l4 = ff000000c9ffffff | |
5067 | ldsba [%i0+%o4]0x88,%l4 ! %l4 = 0000000000000045 | |
5068 | ! Mem[0000000010141400] = 00000000, %l3 = 00000000000000ff | |
5069 | lduha [%i5+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
5070 | ! Mem[0000000010101400] = 000000ff, %f25 = fcc4c676 | |
5071 | lda [%i4+%g0]0x88,%f25 ! %f25 = 000000ff | |
5072 | ! Mem[0000000030041400] = fffe427e, %l0 = 00000000c9ffffff | |
5073 | lduha [%i1+%g0]0x81,%l0 ! %l0 = 000000000000fffe | |
5074 | ! Mem[0000000030141400] = ff00009f, %l4 = 0000000000000045 | |
5075 | lduwa [%i5+%g0]0x81,%l4 ! %l4 = 00000000ff00009f | |
5076 | ! Mem[0000000010141410] = 000000ff 00f0a612, %l2 = 00000000, %l3 = 00000000 | |
5077 | ldda [%i5+%o5]0x80,%l2 ! %l2 = 00000000000000ff 0000000000f0a612 | |
5078 | ! Mem[0000000010141430] = bbbf9dab, %l1 = 0000000000000000 | |
5079 | lduwa [%i5+0x030]%asi,%l1 ! %l1 = 00000000bbbf9dab | |
5080 | ! Mem[0000000030081410] = ff000000 0b65adff, %l4 = ff00009f, %l5 = 00000000 | |
5081 | ldda [%i2+%o5]0x89,%l4 ! %l4 = 000000000b65adff 00000000ff000000 | |
5082 | ! Starting 10 instruction Store Burst | |
5083 | ! %l5 = 00000000ff000000, Mem[000000001000140a] = 45ff0000, %asi = 80 | |
5084 | stha %l5,[%i0+0x00a]%asi ! Mem[0000000010001408] = 45ff0000 | |
5085 | ||
5086 | p0_label_124: | |
5087 | ! %f29 = 124444cf, Mem[0000000010081400] = 00000000 | |
5088 | sta %f29,[%i2+%g0]0x88 ! Mem[0000000010081400] = 124444cf | |
5089 | ! %l1 = 00000000bbbf9dab, Mem[0000000010041410] = cf44001200000000 | |
5090 | stxa %l1,[%i1+%o5]0x80 ! Mem[0000000010041410] = 00000000bbbf9dab | |
5091 | ! Mem[0000000010141410] = ff000000, %l3 = 0000000000f0a612 | |
5092 | swapa [%i5+%o5]0x88,%l3 ! %l3 = 00000000ff000000 | |
5093 | ! %l4 = 000000000b65adff, Mem[0000000010181404] = 00000000 | |
5094 | sth %l4,[%i6+0x004] ! Mem[0000000010181404] = adff0000 | |
5095 | ! %l7 = 0000000000000000, Mem[0000000030141410] = fffffff8 | |
5096 | stba %l7,[%i5+%o5]0x89 ! Mem[0000000030141410] = ffffff00 | |
5097 | ! %f8 = 1f41c676 2164159c, Mem[0000000030101408] = 73200dff ffffffff | |
5098 | stda %f8 ,[%i4+%o4]0x81 ! Mem[0000000030101408] = 1f41c676 2164159c | |
5099 | ! %l1 = 00000000bbbf9dab, %l7 = 0000000000000000, %l1 = 00000000bbbf9dab | |
5100 | udivx %l1,%l7,%l1 ! Div by zero, %l0 = 000000000001004e | |
5101 | ! %l7 = 0000000000000000, Mem[0000000010141408] = 000000ff | |
5102 | stba %l7,[%i5+%o4]0x80 ! Mem[0000000010141408] = 000000ff | |
5103 | ! Mem[0000000010141400] = 00000000, %l7 = 0000000000000000 | |
5104 | swapa [%i5+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
5105 | ! Starting 10 instruction Load Burst | |
5106 | ! %l4 = 000000000b65adff, %l7 = 0000000000000000, %l1 = 00000000bbbf9dab | |
5107 | orn %l4,%l7,%l1 ! %l1 = ffffffffffffffff | |
5108 | ||
5109 | p0_label_125: | |
5110 | ! Mem[00000000100c1410] = 76c6c4fc, %l3 = 00000000ff000000 | |
5111 | ldsba [%i3+%o5]0x80,%l3 ! %l3 = 0000000000000076 | |
5112 | ! Mem[0000000030101408] = 76c6411f, %l3 = 0000000000000076 | |
5113 | ldswa [%i4+%o4]0x89,%l3 ! %l3 = 0000000076c6411f | |
5114 | ! Mem[0000000010081410] = 665ef8ff, %l0 = 0000000000010026 | |
5115 | lduba [%i2+%o5]0x88,%l0 ! %l0 = 00000000000000ff | |
5116 | ! Mem[0000000010141400] = 00000000, %l5 = 00000000ff000000 | |
5117 | ldsba [%i5+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
5118 | ! Mem[0000000010101400] = ff000000, %l7 = 0000000000000000 | |
5119 | ldsba [%i4+%g0]0x80,%l7 ! %l7 = ffffffffffffffff | |
5120 | ! Mem[0000000010081410] = 665ef8ff, %l3 = 0000000076c6411f | |
5121 | ldsba [%i2+%o5]0x88,%l3 ! %l3 = ffffffffffffffff | |
5122 | ! Mem[0000000010041408] = 00001dff 00000000, %l4 = 0b65adff, %l5 = 00000000 | |
5123 | ldd [%i1+%o4],%l4 ! %l4 = 0000000000001dff 0000000000000000 | |
5124 | ! Mem[0000000030041410] = 174573fc, %l1 = ffffffffffffffff | |
5125 | swapa [%i1+%o5]0x81,%l1 ! %l1 = 00000000174573fc | |
5126 | ! Mem[0000000030081410] = ffad650b 000000ff, %l4 = 00001dff, %l5 = 00000000 | |
5127 | ldda [%i2+%o5]0x81,%l4 ! %l4 = 00000000ffad650b 00000000000000ff | |
5128 | ! Starting 10 instruction Store Burst | |
5129 | ! %f0 = db7e6dd7 0000ffff, Mem[0000000010081428] = 9b001dff 7d30519c | |
5130 | stda %f0 ,[%i2+0x028]%asi ! Mem[0000000010081428] = db7e6dd7 0000ffff | |
5131 | ||
5132 | ! Check Point 25 for processor 0 | |
5133 | ||
5134 | set p0_check_pt_data_25,%g4 | |
5135 | rd %ccr,%g5 ! %g5 = 44 | |
5136 | ldx [%g4+0x08],%g2 | |
5137 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
5138 | bne %xcc,p0_reg_check_fail0 | |
5139 | mov 0xee0,%g1 | |
5140 | ldx [%g4+0x10],%g2 | |
5141 | cmp %l1,%g2 ! %l1 = 00000000174573fc | |
5142 | bne %xcc,p0_reg_check_fail1 | |
5143 | mov 0xee1,%g1 | |
5144 | ldx [%g4+0x18],%g2 | |
5145 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
5146 | bne %xcc,p0_reg_check_fail2 | |
5147 | mov 0xee2,%g1 | |
5148 | ldx [%g4+0x20],%g2 | |
5149 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
5150 | bne %xcc,p0_reg_check_fail3 | |
5151 | mov 0xee3,%g1 | |
5152 | ldx [%g4+0x28],%g2 | |
5153 | cmp %l4,%g2 ! %l4 = 00000000ffad650b | |
5154 | bne %xcc,p0_reg_check_fail4 | |
5155 | mov 0xee4,%g1 | |
5156 | ldx [%g4+0x30],%g2 | |
5157 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
5158 | bne %xcc,p0_reg_check_fail5 | |
5159 | mov 0xee5,%g1 | |
5160 | ldx [%g4+0x38],%g2 | |
5161 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
5162 | bne %xcc,p0_reg_check_fail6 | |
5163 | mov 0xee6,%g1 | |
5164 | ldx [%g4+0x40],%g2 | |
5165 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
5166 | bne %xcc,p0_reg_check_fail7 | |
5167 | mov 0xee7,%g1 | |
5168 | ldx [%g4+0x48],%g3 | |
5169 | std %f0,[%g4] | |
5170 | ldx [%g4],%g2 | |
5171 | cmp %g3,%g2 ! %f0 = db7e6dd7 0000ffff | |
5172 | bne %xcc,p0_freg_check_fail | |
5173 | mov 0xf00,%g1 | |
5174 | ldx [%g4+0x50],%g3 | |
5175 | std %f2,[%g4] | |
5176 | ldx [%g4],%g2 | |
5177 | cmp %g3,%g2 ! %f2 = 00000000 dfa6f0ff | |
5178 | bne %xcc,p0_freg_check_fail | |
5179 | mov 0xf02,%g1 | |
5180 | ldx [%g4+0x58],%g3 | |
5181 | std %f4,[%g4] | |
5182 | ldx [%g4],%g2 | |
5183 | cmp %g3,%g2 ! %f4 = fcc4c676 76c6c4fc | |
5184 | bne %xcc,p0_freg_check_fail | |
5185 | mov 0xf04,%g1 | |
5186 | ldx [%g4+0x60],%g3 | |
5187 | std %f6,[%g4] | |
5188 | ldx [%g4],%g2 | |
5189 | cmp %g3,%g2 ! %f6 = ca2bda90 64b3e323 | |
5190 | bne %xcc,p0_freg_check_fail | |
5191 | mov 0xf06,%g1 | |
5192 | ldx [%g4+0x68],%g3 | |
5193 | std %f8,[%g4] | |
5194 | ldx [%g4],%g2 | |
5195 | cmp %g3,%g2 ! %f8 = 1f41c676 2164159c | |
5196 | bne %xcc,p0_freg_check_fail | |
5197 | mov 0xf08,%g1 | |
5198 | ldx [%g4+0x70],%g3 | |
5199 | std %f10,[%g4] | |
5200 | ldx [%g4],%g2 | |
5201 | cmp %g3,%g2 ! %f10 = 9cd8613d e0d4575d | |
5202 | bne %xcc,p0_freg_check_fail | |
5203 | mov 0xf10,%g1 | |
5204 | ldx [%g4+0x78],%g3 | |
5205 | std %f12,[%g4] | |
5206 | ldx [%g4],%g2 | |
5207 | cmp %g3,%g2 ! %f12 = 95077110 d5a7d7d9 | |
5208 | bne %xcc,p0_freg_check_fail | |
5209 | mov 0xf12,%g1 | |
5210 | ldx [%g4+0x80],%g3 | |
5211 | std %f14,[%g4] | |
5212 | ldx [%g4],%g2 | |
5213 | cmp %g3,%g2 ! %f14 = b179bad6 f8962d02 | |
5214 | bne %xcc,p0_freg_check_fail | |
5215 | mov 0xf14,%g1 | |
5216 | ldx [%g4+0x88],%g3 | |
5217 | std %f24,[%g4] | |
5218 | ldx [%g4],%g2 | |
5219 | cmp %g3,%g2 ! %f24 = 000000ff 000000ff | |
5220 | bne %xcc,p0_freg_check_fail | |
5221 | mov 0xf24,%g1 | |
5222 | ||
5223 | ! Check Point 25 completed | |
5224 | ||
5225 | ||
5226 | p0_label_126: | |
5227 | ! %l6 = 0000000000000000, Mem[0000000020800000] = 00ff8470 | |
5228 | sth %l6,[%o1+%g0] ! Mem[0000000020800000] = 00008470 | |
5229 | ! %l0 = 000000ff, %l1 = 174573fc, Mem[0000000010001438] = 000000ff 0b65adff | |
5230 | stda %l0,[%i0+0x038]%asi ! Mem[0000000010001438] = 000000ff 174573fc | |
5231 | ! %l2 = 000000ff, %l3 = ffffffff, Mem[0000000030181400] = 00000000 ff000000 | |
5232 | stda %l2,[%i6+%g0]0x89 ! Mem[0000000030181400] = 000000ff ffffffff | |
5233 | ! %l6 = 0000000000000000, Mem[00000000201c0000] = 00009457 | |
5234 | sth %l6,[%o0+%g0] ! Mem[00000000201c0000] = 00009457 | |
5235 | ! %f3 = dfa6f0ff, Mem[0000000010001408] = 45ff0000 | |
5236 | sta %f3 ,[%i0+%o4]0x80 ! Mem[0000000010001408] = dfa6f0ff | |
5237 | ! %f0 = db7e6dd7 0000ffff 00000000 dfa6f0ff | |
5238 | ! %f4 = fcc4c676 76c6c4fc ca2bda90 64b3e323 | |
5239 | ! %f8 = 1f41c676 2164159c 9cd8613d e0d4575d | |
5240 | ! %f12 = 95077110 d5a7d7d9 b179bad6 f8962d02 | |
5241 | stda %f0,[%i3]ASI_BLK_PL ! Block Store to 00000000100c1400 | |
5242 | ! %l5 = 00000000000000ff, Mem[0000000010181408] = 000000ff | |
5243 | stha %l5,[%i6+%o4]0x88 ! Mem[0000000010181408] = 000000ff | |
5244 | ! Mem[0000000030181408] = 00000000, %l0 = 00000000000000ff | |
5245 | ldstuba [%i6+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
5246 | ! %l2 = 00000000000000ff, Mem[0000000010141410] = 00f0a612 | |
5247 | stwa %l2,[%i5+%o5]0x88 ! Mem[0000000010141410] = 000000ff | |
5248 | ! Starting 10 instruction Load Burst | |
5249 | ! Mem[0000000030001400] = 00000000d76d7edb, %f20 = 174573fc 74817719 | |
5250 | ldda [%i0+%g0]0x81,%f20 ! %f20 = 00000000 d76d7edb | |
5251 | ||
5252 | p0_label_127: | |
5253 | ! Mem[0000000030081410] = ff000000 0b65adff, %l2 = 000000ff, %l3 = ffffffff | |
5254 | ldda [%i2+%o5]0x89,%l2 ! %l2 = 000000000b65adff 00000000ff000000 | |
5255 | ! Mem[0000000030101410] = 0b931a2a, %l1 = 00000000174573fc | |
5256 | lduba [%i4+%o5]0x89,%l1 ! %l1 = 000000000000002a | |
5257 | ! Mem[0000000030141408] = ff000000 7e42feff, %l2 = 0b65adff, %l3 = ff000000 | |
5258 | ldda [%i5+%o4]0x89,%l2 ! %l2 = 000000007e42feff 00000000ff000000 | |
5259 | ! Mem[0000000010081400] = cf444412, %f24 = 000000ff | |
5260 | lda [%i2+%g0]0x80,%f24 ! %f24 = cf444412 | |
5261 | ! Mem[0000000010041410] = 00000000, %l3 = 00000000ff000000 | |
5262 | lduba [%i1+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
5263 | ! Mem[00000000300c1410] = 947e307d00000000, %f26 = 4bf8b753 b8f773ff | |
5264 | ldda [%i3+%o5]0x89,%f26 ! %f26 = 947e307d 00000000 | |
5265 | ! Mem[0000000030041410] = ffffffff 74817719, %l0 = 00000000, %l1 = 0000002a | |
5266 | ldda [%i1+%o5]0x81,%l0 ! %l0 = 00000000ffffffff 0000000074817719 | |
5267 | ! Mem[0000000010041408] = ff1d0000, %f24 = cf444412 | |
5268 | lda [%i1+%o4]0x88,%f24 ! %f24 = ff1d0000 | |
5269 | membar #Sync ! Added by membar checker (20) | |
5270 | ! Mem[00000000100c1408] = dfa6f0ff, %l6 = 0000000000000000 | |
5271 | lduwa [%i3+%o4]0x88,%l6 ! %l6 = 00000000dfa6f0ff | |
5272 | ! Starting 10 instruction Store Burst | |
5273 | ! %l6 = 00000000dfa6f0ff, Mem[00000000100c1410] = fcc4c67676c6c4fc | |
5274 | stxa %l6,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 00000000dfa6f0ff | |
5275 | ||
5276 | p0_label_128: | |
5277 | ! Mem[0000000010001410] = fcf85e66, %l0 = 00000000ffffffff | |
5278 | swap [%i0+%o5],%l0 ! %l0 = 00000000fcf85e66 | |
5279 | ! %f0 = db7e6dd7 0000ffff 00000000 dfa6f0ff | |
5280 | ! %f4 = fcc4c676 76c6c4fc ca2bda90 64b3e323 | |
5281 | ! %f8 = 1f41c676 2164159c 9cd8613d e0d4575d | |
5282 | ! %f12 = 95077110 d5a7d7d9 b179bad6 f8962d02 | |
5283 | stda %f0,[%i1]ASI_BLK_AIUP ! Block Store to 0000000010041400 | |
5284 | ! %l2 = 000000007e42feff, Mem[0000000010181420] = 00000000, %asi = 80 | |
5285 | stwa %l2,[%i6+0x020]%asi ! Mem[0000000010181420] = 7e42feff | |
5286 | ! Mem[0000000030141410] = 00ffffff, %l7 = ffffffffffffffff | |
5287 | ldstuba [%i5+%o5]0x81,%l7 ! %l7 = 00000000000000ff | |
5288 | ! Mem[00000000100c1408] = dfa6f0ff, %l0 = 00000000fcf85e66 | |
5289 | swapa [%i3+%o4]0x88,%l0 ! %l0 = 00000000dfa6f0ff | |
5290 | ! Mem[0000000010001400] = 0000009f, %l1 = 0000000074817719 | |
5291 | ldstuba [%i0+%g0]0x80,%l1 ! %l1 = 00000000000000ff | |
5292 | membar #Sync ! Added by membar checker (21) | |
5293 | ! Mem[0000000010041410] = fcc4c676, %l5 = 00000000000000ff | |
5294 | ldstuba [%i1+%o5]0x80,%l5 ! %l5 = 000000fc000000ff | |
5295 | ! Mem[0000000030081408] = 00000000, %l5 = 00000000000000fc | |
5296 | swapa [%i2+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
5297 | ! %f14 = b179bad6 f8962d02, Mem[0000000010041428] = 9cd8613d e0d4575d | |
5298 | std %f14,[%i1+0x028] ! Mem[0000000010041428] = b179bad6 f8962d02 | |
5299 | ! Starting 10 instruction Load Burst | |
5300 | ! Mem[0000000010041410] = ffc4c676, %l7 = 0000000000000000 | |
5301 | lduwa [%i1+%o5]0x80,%l7 ! %l7 = 00000000ffc4c676 | |
5302 | ||
5303 | p0_label_129: | |
5304 | ! Mem[00000000300c1400] = 7a2e51ff ff512e7a 7d000000 ff000000 | |
5305 | ! Mem[00000000300c1410] = 00000000 7d307e94 2400c676 0000fff8 | |
5306 | ! Mem[00000000300c1420] = fcc4c676 12000000 dfa6f0ed fcf85e66 | |
5307 | ! Mem[00000000300c1430] = 00000000 ab9dbfbb 00000059 ff000000 | |
5308 | ldda [%i3]ASI_BLK_S,%f16 ! Block Load from 00000000300c1400 | |
5309 | ! Mem[0000000010041408] = 00000000, %l7 = 00000000ffc4c676 | |
5310 | ldsha [%i1+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
5311 | ! Mem[0000000010001410] = ffffffff, %f0 = db7e6dd7 | |
5312 | lda [%i0+%o5]0x80,%f0 ! %f0 = ffffffff | |
5313 | ! Mem[0000000010141434] = ac8f149b, %l5 = 0000000000000000 | |
5314 | ldsb [%i5+0x035],%l5 ! %l5 = ffffffffffffff8f | |
5315 | ! Mem[00000000201c0000] = 00009457, %l6 = 00000000dfa6f0ff | |
5316 | lduha [%o0+0x000]%asi,%l6 ! %l6 = 0000000000000000 | |
5317 | ! Mem[0000000010041410] = ffc4c676 76c6c4fc, %l6 = 00000000, %l7 = 00000000 | |
5318 | ldda [%i1+%o5]0x80,%l6 ! %l6 = 00000000ffc4c676 0000000076c6c4fc | |
5319 | ! Mem[0000000030101408] = 1f41c676 2164159c, %l4 = ffad650b, %l5 = ffffff8f | |
5320 | ldda [%i4+%o4]0x81,%l4 ! %l4 = 000000001f41c676 000000002164159c | |
5321 | ! Mem[0000000010141410] = ff000000, %l4 = 000000001f41c676 | |
5322 | ldub [%i5+%o5],%l4 ! %l4 = 00000000000000ff | |
5323 | ! Mem[00000000218001c0] = fff32a00, %l3 = 0000000000000000 | |
5324 | lduh [%o3+0x1c0],%l3 ! %l3 = 000000000000fff3 | |
5325 | ! Starting 10 instruction Store Burst | |
5326 | ! Mem[0000000010181400] = 00000000, %l7 = 0000000076c6c4fc | |
5327 | swapa [%i6+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
5328 | ||
5329 | p0_label_130: | |
5330 | ! %l6 = ffc4c676, %l7 = 00000000, Mem[0000000010181400] = 76c6c4fc 0000ffad | |
5331 | stda %l6,[%i6+%g0]0x88 ! Mem[0000000010181400] = ffc4c676 00000000 | |
5332 | ! Mem[0000000010081435] = 8dbfff12, %l5 = 000000002164159c | |
5333 | ldstuba [%i2+0x035]%asi,%l5 ! %l5 = 000000bf000000ff | |
5334 | ! Mem[0000000010101400] = ff000000, %l3 = 000000000000fff3 | |
5335 | ldstuba [%i4+%g0]0x80,%l3 ! %l3 = 000000ff000000ff | |
5336 | ! %l0 = dfa6f0ff, %l1 = 00000000, Mem[0000000030081400] = ffb0c341 ff1d0000 | |
5337 | stda %l0,[%i2+%g0]0x81 ! Mem[0000000030081400] = dfa6f0ff 00000000 | |
5338 | ! %l2 = 000000007e42feff, Mem[00000000100c1410] = fff0a6df | |
5339 | stha %l2,[%i3+%o5]0x80 ! Mem[00000000100c1410] = feffa6df | |
5340 | ! %f0 = ffffffff, Mem[0000000010001434] = 6fff7387 | |
5341 | st %f0 ,[%i0+0x034] ! Mem[0000000010001434] = ffffffff | |
5342 | ! %l5 = 00000000000000bf, Mem[00000000100c1410] = feffa6df00000000 | |
5343 | stxa %l5,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 00000000000000bf | |
5344 | ! Mem[00000000300c1410] = 00000000, %l7 = 0000000000000000 | |
5345 | ldstuba [%i3+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
5346 | ! %l6 = 00000000ffc4c676, Mem[0000000030181410] = ffffffff | |
5347 | stba %l6,[%i6+%o5]0x89 ! Mem[0000000030181410] = ffffff76 | |
5348 | ! Starting 10 instruction Load Burst | |
5349 | ! Mem[0000000010041410] = ffc4c67676c6c4fc, %l7 = 0000000000000000 | |
5350 | ldxa [%i1+%o5]0x80,%l7 ! %l7 = ffc4c67676c6c4fc | |
5351 | ||
5352 | ! Check Point 26 for processor 0 | |
5353 | ||
5354 | set p0_check_pt_data_26,%g4 | |
5355 | rd %ccr,%g5 ! %g5 = 44 | |
5356 | ldx [%g4+0x08],%g2 | |
5357 | cmp %l0,%g2 ! %l0 = 00000000dfa6f0ff | |
5358 | bne %xcc,p0_reg_check_fail0 | |
5359 | mov 0xee0,%g1 | |
5360 | ldx [%g4+0x10],%g2 | |
5361 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
5362 | bne %xcc,p0_reg_check_fail1 | |
5363 | mov 0xee1,%g1 | |
5364 | ldx [%g4+0x18],%g2 | |
5365 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
5366 | bne %xcc,p0_reg_check_fail3 | |
5367 | mov 0xee3,%g1 | |
5368 | ldx [%g4+0x20],%g2 | |
5369 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
5370 | bne %xcc,p0_reg_check_fail4 | |
5371 | mov 0xee4,%g1 | |
5372 | ldx [%g4+0x28],%g2 | |
5373 | cmp %l5,%g2 ! %l5 = 00000000000000bf | |
5374 | bne %xcc,p0_reg_check_fail5 | |
5375 | mov 0xee5,%g1 | |
5376 | ldx [%g4+0x30],%g2 | |
5377 | cmp %l6,%g2 ! %l6 = 00000000ffc4c676 | |
5378 | bne %xcc,p0_reg_check_fail6 | |
5379 | mov 0xee6,%g1 | |
5380 | ldx [%g4+0x38],%g2 | |
5381 | cmp %l7,%g2 ! %l7 = ffc4c67676c6c4fc | |
5382 | bne %xcc,p0_reg_check_fail7 | |
5383 | mov 0xee7,%g1 | |
5384 | ldx [%g4+0x40],%g3 | |
5385 | std %f0,[%g4] | |
5386 | ldx [%g4],%g2 | |
5387 | cmp %g3,%g2 ! %f0 = ffffffff 0000ffff | |
5388 | bne %xcc,p0_freg_check_fail | |
5389 | mov 0xf00,%g1 | |
5390 | ldx [%g4+0x48],%g3 | |
5391 | std %f2,[%g4] | |
5392 | ldx [%g4],%g2 | |
5393 | cmp %g3,%g2 ! %f2 = 00000000 dfa6f0ff | |
5394 | bne %xcc,p0_freg_check_fail | |
5395 | mov 0xf02,%g1 | |
5396 | ldx [%g4+0x50],%g3 | |
5397 | std %f4,[%g4] | |
5398 | ldx [%g4],%g2 | |
5399 | cmp %g3,%g2 ! %f4 = fcc4c676 76c6c4fc | |
5400 | bne %xcc,p0_freg_check_fail | |
5401 | mov 0xf04,%g1 | |
5402 | ldx [%g4+0x58],%g3 | |
5403 | std %f6,[%g4] | |
5404 | ldx [%g4],%g2 | |
5405 | cmp %g3,%g2 ! %f6 = ca2bda90 64b3e323 | |
5406 | bne %xcc,p0_freg_check_fail | |
5407 | mov 0xf06,%g1 | |
5408 | ldx [%g4+0x60],%g3 | |
5409 | std %f16,[%g4] | |
5410 | ldx [%g4],%g2 | |
5411 | cmp %g3,%g2 ! %f16 = 7a2e51ff ff512e7a | |
5412 | bne %xcc,p0_freg_check_fail | |
5413 | mov 0xf16,%g1 | |
5414 | ldx [%g4+0x68],%g3 | |
5415 | std %f18,[%g4] | |
5416 | ldx [%g4],%g2 | |
5417 | cmp %g3,%g2 ! %f18 = 7d000000 ff000000 | |
5418 | bne %xcc,p0_freg_check_fail | |
5419 | mov 0xf18,%g1 | |
5420 | ldx [%g4+0x70],%g3 | |
5421 | std %f20,[%g4] | |
5422 | ldx [%g4],%g2 | |
5423 | cmp %g3,%g2 ! %f20 = 00000000 7d307e94 | |
5424 | bne %xcc,p0_freg_check_fail | |
5425 | mov 0xf20,%g1 | |
5426 | ldx [%g4+0x78],%g3 | |
5427 | std %f22,[%g4] | |
5428 | ldx [%g4],%g2 | |
5429 | cmp %g3,%g2 ! %f22 = 2400c676 0000fff8 | |
5430 | bne %xcc,p0_freg_check_fail | |
5431 | mov 0xf22,%g1 | |
5432 | ldx [%g4+0x80],%g3 | |
5433 | std %f24,[%g4] | |
5434 | ldx [%g4],%g2 | |
5435 | cmp %g3,%g2 ! %f24 = fcc4c676 12000000 | |
5436 | bne %xcc,p0_freg_check_fail | |
5437 | mov 0xf24,%g1 | |
5438 | ldx [%g4+0x88],%g3 | |
5439 | std %f26,[%g4] | |
5440 | ldx [%g4],%g2 | |
5441 | cmp %g3,%g2 ! %f26 = dfa6f0ed fcf85e66 | |
5442 | bne %xcc,p0_freg_check_fail | |
5443 | mov 0xf26,%g1 | |
5444 | ldx [%g4+0x90],%g3 | |
5445 | std %f28,[%g4] | |
5446 | ldx [%g4],%g2 | |
5447 | cmp %g3,%g2 ! %f28 = 00000000 ab9dbfbb | |
5448 | bne %xcc,p0_freg_check_fail | |
5449 | mov 0xf28,%g1 | |
5450 | ldx [%g4+0x98],%g3 | |
5451 | std %f30,[%g4] | |
5452 | ldx [%g4],%g2 | |
5453 | cmp %g3,%g2 ! %f30 = 00000059 ff000000 | |
5454 | bne %xcc,p0_freg_check_fail | |
5455 | mov 0xf30,%g1 | |
5456 | ||
5457 | ! Check Point 26 completed | |
5458 | ||
5459 | ||
5460 | p0_label_131: | |
5461 | ! Mem[0000000030181400] = ff000000, %f29 = ab9dbfbb | |
5462 | lda [%i6+%g0]0x81,%f29 ! %f29 = ff000000 | |
5463 | ! Mem[0000000010041400] = d76d7edb, %l6 = 00000000ffc4c676 | |
5464 | ldsba [%i1+%g0]0x88,%l6 ! %l6 = ffffffffffffffdb | |
5465 | ! Mem[00000000100c1410] = 00000000000000bf, %l6 = ffffffffffffffdb | |
5466 | ldxa [%i3+%o5]0x80,%l6 ! %l6 = 00000000000000bf | |
5467 | membar #Sync ! Added by membar checker (22) | |
5468 | ! Mem[0000000010081400] = cf444412 00000000 fffffff8 00000024 | |
5469 | ! Mem[0000000010081410] = fff85e66 24000000 00000000 00000000 | |
5470 | ! Mem[0000000010081420] = a196f1ff dfa6f0ff db7e6dd7 0000ffff | |
5471 | ! Mem[0000000010081430] = ffffffff 8dffff12 ffad650b 8c8decca | |
5472 | ldda [%i2]ASI_BLK_P,%f0 ! Block Load from 0000000010081400 | |
5473 | ! Mem[0000000010081424] = dfa6f0ff, %l4 = 00000000000000ff | |
5474 | ldswa [%i2+0x024]%asi,%l4 ! %l4 = ffffffffdfa6f0ff | |
5475 | ! Mem[0000000010001410] = ffffffff, %l3 = 00000000000000ff | |
5476 | ldsha [%i0+%o5]0x88,%l3 ! %l3 = ffffffffffffffff | |
5477 | ! Mem[00000000300c1408] = 7d000000ff000000, %f16 = 7a2e51ff ff512e7a | |
5478 | ldda [%i3+%o4]0x81,%f16 ! %f16 = 7d000000 ff000000 | |
5479 | ! Mem[00000000300c1410] = 000000ff, %l7 = ffc4c67676c6c4fc | |
5480 | lduwa [%i3+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
5481 | ! Mem[0000000010141408] = ff000000, %l1 = 0000000000000000 | |
5482 | ldsha [%i5+%o4]0x88,%l1 ! %l1 = 0000000000000000 | |
5483 | ! Starting 10 instruction Store Burst | |
5484 | ! Mem[0000000030041400] = 7e42feff, %l4 = ffffffffdfa6f0ff | |
5485 | swapa [%i1+%g0]0x89,%l4 ! %l4 = 000000007e42feff | |
5486 | ||
5487 | p0_label_132: | |
5488 | ! %l1 = 0000000000000000, Mem[0000000010101408] = 000000007d307e94 | |
5489 | stxa %l1,[%i4+%o4]0x80 ! Mem[0000000010101408] = 0000000000000000 | |
5490 | ! %l1 = 0000000000000000, Mem[0000000010001420] = 0000ff00c400c676, %asi = 80 | |
5491 | stxa %l1,[%i0+0x020]%asi ! Mem[0000000010001420] = 0000000000000000 | |
5492 | ! %l7 = 00000000000000ff, Mem[0000000010101438] = e96893a42bf77274, %asi = 80 | |
5493 | stxa %l7,[%i4+0x038]%asi ! Mem[0000000010101438] = 00000000000000ff | |
5494 | ! %l2 = 000000007e42feff, Mem[00000000211c0000] = 66641a4c, %asi = 80 | |
5495 | stha %l2,[%o2+0x000]%asi ! Mem[00000000211c0000] = feff1a4c | |
5496 | ! %f0 = cf444412 00000000 fffffff8 00000024 | |
5497 | ! %f4 = fff85e66 24000000 00000000 00000000 | |
5498 | ! %f8 = a196f1ff dfa6f0ff db7e6dd7 0000ffff | |
5499 | ! %f12 = ffffffff 8dffff12 ffad650b 8c8decca | |
5500 | stda %f0,[%i1]ASI_BLK_S ! Block Store to 0000000030041400 | |
5501 | ! %f30 = 00000059 ff000000, Mem[0000000030181410] = 76ffffff ff000024 | |
5502 | stda %f30,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000059 ff000000 | |
5503 | ! Mem[0000000021800140] = 19001df6, %l3 = ffffffffffffffff | |
5504 | ldstub [%o3+0x140],%l3 ! %l3 = 00000019000000ff | |
5505 | ! %l1 = 0000000000000000, Mem[0000000030041410] = fff85e66 | |
5506 | stba %l1,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00f85e66 | |
5507 | ! %l4 = 000000007e42feff, Mem[0000000010181428] = 426070e9, %asi = 80 | |
5508 | stha %l4,[%i6+0x028]%asi ! Mem[0000000010181428] = feff70e9 | |
5509 | ! Starting 10 instruction Load Burst | |
5510 | ! Mem[000000001010143c] = 000000ff, %l1 = 0000000000000000 | |
5511 | ldub [%i4+0x03d],%l1 ! %l1 = 0000000000000000 | |
5512 | ||
5513 | p0_label_133: | |
5514 | ! Mem[0000000030081400] = dfa6f0ff, %l0 = 00000000dfa6f0ff | |
5515 | ldswa [%i2+%g0]0x81,%l0 ! %l0 = ffffffffdfa6f0ff | |
5516 | ! Mem[0000000010181410] = 0000ff45, %l6 = 00000000000000bf | |
5517 | lduba [%i6+%o5]0x88,%l6 ! %l6 = 0000000000000045 | |
5518 | ! Mem[0000000010141400] = 00000000, %l2 = 000000007e42feff | |
5519 | ldswa [%i5+%g0]0x80,%l2 ! %l2 = 0000000000000000 | |
5520 | ! Mem[0000000010141400] = 00000000, %l0 = ffffffffdfa6f0ff | |
5521 | ldsba [%i5+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
5522 | ! Mem[0000000010081408] = 24000000 f8ffffff, %l4 = 7e42feff, %l5 = 000000bf | |
5523 | ldda [%i2+%o4]0x88,%l4 ! %l4 = 00000000f8ffffff 0000000024000000 | |
5524 | ! Mem[0000000010001408] = fff0a6df, %l1 = 0000000000000000 | |
5525 | lduba [%i0+%o4]0x88,%l1 ! %l1 = 00000000000000df | |
5526 | ! Mem[00000000201c0000] = 00009457, %l5 = 0000000024000000 | |
5527 | ldub [%o0+0x001],%l5 ! %l5 = 0000000000000000 | |
5528 | ! Mem[0000000010181400] = 00000000 ffc4c676, %l4 = f8ffffff, %l5 = 00000000 | |
5529 | ldda [%i6+%g0]0x88,%l4 ! %l4 = 00000000ffc4c676 0000000000000000 | |
5530 | ! Mem[0000000030081410] = 0b65adff, %l2 = 0000000000000000 | |
5531 | lduha [%i2+%o5]0x89,%l2 ! %l2 = 000000000000adff | |
5532 | ! Starting 10 instruction Store Burst | |
5533 | ! %l1 = 00000000000000df, Mem[0000000010101410] = 9c5199ff | |
5534 | stba %l1,[%i4+%o5]0x88 ! Mem[0000000010101410] = 9c5199df | |
5535 | ||
5536 | p0_label_134: | |
5537 | ! %l6 = 0000000000000045, Mem[0000000030041408] = fffffff8 | |
5538 | stba %l6,[%i1+%o4]0x81 ! Mem[0000000030041408] = 45fffff8 | |
5539 | ! %l4 = 00000000ffc4c676, Mem[0000000010041400] = db7e6dd7 | |
5540 | sth %l4,[%i1+%g0] ! Mem[0000000010041400] = c6766dd7 | |
5541 | ! Mem[0000000010141410] = ff000000, %l6 = 0000000000000045 | |
5542 | swapa [%i5+%o5]0x80,%l6 ! %l6 = 00000000ff000000 | |
5543 | ! %l4 = 00000000ffc4c676, Mem[00000000201c0001] = 00009457 | |
5544 | stb %l4,[%o0+0x001] ! Mem[00000000201c0000] = 00769457 | |
5545 | ! %l3 = 0000000000000019, Mem[0000000010141410] = 00000045 | |
5546 | stwa %l3,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00000019 | |
5547 | ! %l2 = 000000000000adff, Mem[0000000010181410] = 45ff0000 | |
5548 | stwa %l2,[%i6+%o5]0x80 ! Mem[0000000010181410] = 0000adff | |
5549 | ! %l4 = 00000000ffc4c676, Mem[0000000010181400] = 76c6c4ff00000000 | |
5550 | stxa %l4,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000ffc4c676 | |
5551 | ! %l7 = 00000000000000ff, Mem[0000000010041400] = c6766dd7 | |
5552 | stwa %l7,[%i1+%g0]0x80 ! Mem[0000000010041400] = 000000ff | |
5553 | ! Mem[0000000010141400] = 00000000, %l0 = 0000000000000000 | |
5554 | ldstuba [%i5+%g0]0x88,%l0 ! %l0 = 00000000000000ff | |
5555 | ! Starting 10 instruction Load Burst | |
5556 | ! Mem[0000000030141410] = ffffffff, %l6 = 00000000ff000000 | |
5557 | ldswa [%i5+%o5]0x81,%l6 ! %l6 = ffffffffffffffff | |
5558 | ||
5559 | p0_label_135: | |
5560 | ! Mem[0000000030001400] = 00000000, %l5 = 0000000000000000 | |
5561 | lduba [%i0+%g0]0x81,%l5 ! %l5 = 0000000000000000 | |
5562 | ! Mem[00000000100c1408] = fcf85e66, %l4 = 00000000ffc4c676 | |
5563 | ldsha [%i3+%o4]0x88,%l4 ! %l4 = 0000000000005e66 | |
5564 | ! Mem[0000000030081408] = fc000000dfa6f0ff, %f22 = 2400c676 0000fff8 | |
5565 | ldda [%i2+%o4]0x81,%f22 ! %f22 = fc000000 dfa6f0ff | |
5566 | membar #Sync ! Added by membar checker (23) | |
5567 | ! Mem[0000000010041400] = 000000ff0000ffff, %f30 = 00000059 ff000000 | |
5568 | ldda [%i1+%g0]0x80,%f30 ! %f30 = 000000ff 0000ffff | |
5569 | ! Mem[0000000030181408] = 000000ff, %l0 = 0000000000000000 | |
5570 | ldsha [%i6+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
5571 | ! Mem[00000000300c1400] = 7a2e51ff, %l2 = 000000000000adff | |
5572 | lduha [%i3+%g0]0x81,%l2 ! %l2 = 0000000000007a2e | |
5573 | ! Mem[00000000100c1410] = 00000000 000000bf, %l4 = 00005e66, %l5 = 00000000 | |
5574 | ldda [%i3+%o5]0x80,%l4 ! %l4 = 0000000000000000 00000000000000bf | |
5575 | ! Mem[00000000300c1408] = 000000ff0000007d, %l1 = 00000000000000df | |
5576 | ldxa [%i3+%o4]0x89,%l1 ! %l1 = 000000ff0000007d | |
5577 | ! Mem[0000000010181400] = 00000000, %l4 = 0000000000000000 | |
5578 | lduwa [%i6+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
5579 | ! Starting 10 instruction Store Burst | |
5580 | ! %f2 = fffffff8, Mem[00000000100c1410] = 00000000 | |
5581 | sta %f2 ,[%i3+%o5]0x80 ! Mem[00000000100c1410] = fffffff8 | |
5582 | ||
5583 | ! Check Point 27 for processor 0 | |
5584 | ||
5585 | set p0_check_pt_data_27,%g4 | |
5586 | rd %ccr,%g5 ! %g5 = 44 | |
5587 | ldx [%g4+0x08],%g2 | |
5588 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
5589 | bne %xcc,p0_reg_check_fail0 | |
5590 | mov 0xee0,%g1 | |
5591 | ldx [%g4+0x10],%g2 | |
5592 | cmp %l1,%g2 ! %l1 = 000000ff0000007d | |
5593 | bne %xcc,p0_reg_check_fail1 | |
5594 | mov 0xee1,%g1 | |
5595 | ldx [%g4+0x18],%g2 | |
5596 | cmp %l2,%g2 ! %l2 = 0000000000007a2e | |
5597 | bne %xcc,p0_reg_check_fail2 | |
5598 | mov 0xee2,%g1 | |
5599 | ldx [%g4+0x20],%g2 | |
5600 | cmp %l3,%g2 ! %l3 = 0000000000000019 | |
5601 | bne %xcc,p0_reg_check_fail3 | |
5602 | mov 0xee3,%g1 | |
5603 | ldx [%g4+0x28],%g2 | |
5604 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
5605 | bne %xcc,p0_reg_check_fail4 | |
5606 | mov 0xee4,%g1 | |
5607 | ldx [%g4+0x30],%g2 | |
5608 | cmp %l5,%g2 ! %l5 = 00000000000000bf | |
5609 | bne %xcc,p0_reg_check_fail5 | |
5610 | mov 0xee5,%g1 | |
5611 | ldx [%g4+0x38],%g2 | |
5612 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
5613 | bne %xcc,p0_reg_check_fail6 | |
5614 | mov 0xee6,%g1 | |
5615 | ldx [%g4+0x40],%g2 | |
5616 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
5617 | bne %xcc,p0_reg_check_fail7 | |
5618 | mov 0xee7,%g1 | |
5619 | ldx [%g4+0x48],%g3 | |
5620 | std %f0,[%g4] | |
5621 | ldx [%g4],%g2 | |
5622 | cmp %g3,%g2 ! %f0 = cf444412 00000000 | |
5623 | bne %xcc,p0_freg_check_fail | |
5624 | mov 0xf00,%g1 | |
5625 | ldx [%g4+0x50],%g3 | |
5626 | std %f2,[%g4] | |
5627 | ldx [%g4],%g2 | |
5628 | cmp %g3,%g2 ! %f2 = fffffff8 00000024 | |
5629 | bne %xcc,p0_freg_check_fail | |
5630 | mov 0xf02,%g1 | |
5631 | ldx [%g4+0x58],%g3 | |
5632 | std %f4,[%g4] | |
5633 | ldx [%g4],%g2 | |
5634 | cmp %g3,%g2 ! %f4 = fff85e66 24000000 | |
5635 | bne %xcc,p0_freg_check_fail | |
5636 | mov 0xf04,%g1 | |
5637 | ldx [%g4+0x60],%g3 | |
5638 | std %f6,[%g4] | |
5639 | ldx [%g4],%g2 | |
5640 | cmp %g3,%g2 ! %f6 = 00000000 00000000 | |
5641 | bne %xcc,p0_freg_check_fail | |
5642 | mov 0xf06,%g1 | |
5643 | ldx [%g4+0x68],%g3 | |
5644 | std %f8,[%g4] | |
5645 | ldx [%g4],%g2 | |
5646 | cmp %g3,%g2 ! %f8 = a196f1ff dfa6f0ff | |
5647 | bne %xcc,p0_freg_check_fail | |
5648 | mov 0xf08,%g1 | |
5649 | ldx [%g4+0x70],%g3 | |
5650 | std %f10,[%g4] | |
5651 | ldx [%g4],%g2 | |
5652 | cmp %g3,%g2 ! %f10 = db7e6dd7 0000ffff | |
5653 | bne %xcc,p0_freg_check_fail | |
5654 | mov 0xf10,%g1 | |
5655 | ldx [%g4+0x78],%g3 | |
5656 | std %f12,[%g4] | |
5657 | ldx [%g4],%g2 | |
5658 | cmp %g3,%g2 ! %f12 = ffffffff 8dffff12 | |
5659 | bne %xcc,p0_freg_check_fail | |
5660 | mov 0xf12,%g1 | |
5661 | ldx [%g4+0x80],%g3 | |
5662 | std %f14,[%g4] | |
5663 | ldx [%g4],%g2 | |
5664 | cmp %g3,%g2 ! %f14 = ffad650b 8c8decca | |
5665 | bne %xcc,p0_freg_check_fail | |
5666 | mov 0xf14,%g1 | |
5667 | ldx [%g4+0x88],%g3 | |
5668 | std %f16,[%g4] | |
5669 | ldx [%g4],%g2 | |
5670 | cmp %g3,%g2 ! %f16 = 7d000000 ff000000 | |
5671 | bne %xcc,p0_freg_check_fail | |
5672 | mov 0xf16,%g1 | |
5673 | ldx [%g4+0x90],%g3 | |
5674 | std %f22,[%g4] | |
5675 | ldx [%g4],%g2 | |
5676 | cmp %g3,%g2 ! %f22 = fc000000 dfa6f0ff | |
5677 | bne %xcc,p0_freg_check_fail | |
5678 | mov 0xf22,%g1 | |
5679 | ldx [%g4+0x98],%g3 | |
5680 | std %f28,[%g4] | |
5681 | ldx [%g4],%g2 | |
5682 | cmp %g3,%g2 ! %f28 = 00000000 ff000000 | |
5683 | bne %xcc,p0_freg_check_fail | |
5684 | mov 0xf28,%g1 | |
5685 | ldx [%g4+0xa0],%g3 | |
5686 | std %f30,[%g4] | |
5687 | ldx [%g4],%g2 | |
5688 | cmp %g3,%g2 ! %f30 = 000000ff 0000ffff | |
5689 | bne %xcc,p0_freg_check_fail | |
5690 | mov 0xf30,%g1 | |
5691 | ||
5692 | ! Check Point 27 completed | |
5693 | ||
5694 | ||
5695 | p0_label_136: | |
5696 | ! %l0 = 00000000000000ff, Mem[0000000010001434] = ffffffff | |
5697 | sth %l0,[%i0+0x034] ! Mem[0000000010001434] = 00ffffff | |
5698 | ! %f30 = 000000ff, Mem[0000000010081400] = 124444cf | |
5699 | sta %f30,[%i2+%g0]0x88 ! Mem[0000000010081400] = 000000ff | |
5700 | ! Mem[0000000010001438] = 000000ff174573fc, %l3 = 0000000000000019, %l2 = 0000000000007a2e | |
5701 | add %i0,0x38,%g1 | |
5702 | casxa [%g1]0x80,%l3,%l2 ! %l2 = 000000ff174573fc | |
5703 | ! Mem[0000000010001408] = dfa6f0ff, %l5 = 00000000000000bf | |
5704 | ldstuba [%i0+%o4]0x80,%l5 ! %l5 = 000000df000000ff | |
5705 | ! Mem[0000000010001402] = ff00009f, %l7 = 00000000000000ff | |
5706 | ldstub [%i0+0x002],%l7 ! %l7 = 00000000000000ff | |
5707 | ! %f2 = fffffff8 00000024, %l6 = ffffffffffffffff | |
5708 | ! Mem[0000000030041430] = ffffffff8dffff12 | |
5709 | add %i1,0x030,%g1 | |
5710 | stda %f2,[%g1+%l6]ASI_PST16_SL ! Mem[0000000030041430] = 24000000f8ffffff | |
5711 | ! %f18 = 7d000000 ff000000, %l2 = 000000ff174573fc | |
5712 | ! Mem[0000000010101430] = f752ba3801a3a7b6 | |
5713 | add %i4,0x030,%g1 | |
5714 | stda %f18,[%g1+%l2]ASI_PST16_P ! Mem[0000000010101430] = 7d00000001a3a7b6 | |
5715 | ! %l1 = 000000ff0000007d, Mem[0000000010041410] = 76c6c4ff | |
5716 | stwa %l1,[%i1+%o5]0x88 ! Mem[0000000010041410] = 0000007d | |
5717 | ! %l7 = 0000000000000000, Mem[0000000030181410] = 59000000 | |
5718 | stba %l7,[%i6+%o5]0x89 ! Mem[0000000030181410] = 59000000 | |
5719 | ! Starting 10 instruction Load Burst | |
5720 | ! Mem[0000000030181408] = 000000ff, %l0 = 00000000000000ff | |
5721 | ldsha [%i6+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
5722 | ||
5723 | p0_label_137: | |
5724 | ! Mem[0000000010081408] = fffffff8, %l5 = 00000000000000df | |
5725 | ldsha [%i2+%o4]0x80,%l5 ! %l5 = ffffffffffffffff | |
5726 | ! Mem[00000000211c0000] = feff1a4c, %l1 = 000000ff0000007d | |
5727 | ldsh [%o2+%g0],%l1 ! %l1 = fffffffffffffeff | |
5728 | ! Mem[0000000010041410] = 0000007d, %l4 = 0000000000000000 | |
5729 | lduha [%i1+%o5]0x88,%l4 ! %l4 = 000000000000007d | |
5730 | ! Mem[0000000030181400] = 000000ff, %l2 = 000000ff174573fc | |
5731 | lduha [%i6+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
5732 | ! Mem[0000000010181430] = 00001dff, %l6 = ffffffffffffffff | |
5733 | ldsha [%i6+0x030]%asi,%l6 ! %l6 = 0000000000000000 | |
5734 | ! Mem[0000000010041410] = 7d000000, %l4 = 000000000000007d | |
5735 | lduwa [%i1+%o5]0x80,%l4 ! %l4 = 000000007d000000 | |
5736 | ! Mem[0000000010101400] = ff000000, %l7 = 0000000000000000 | |
5737 | ldsba [%i4+%g0]0x80,%l7 ! %l7 = ffffffffffffffff | |
5738 | ! Mem[00000000100c1410] = fffffff8000000bf, %l7 = ffffffffffffffff | |
5739 | ldxa [%i3+%o5]0x80,%l7 ! %l7 = fffffff8000000bf | |
5740 | ! %l6 = 00000000, %l7 = 000000bf, Mem[0000000030101408] = 76c6411f 9c156421 | |
5741 | stda %l6,[%i4+%o4]0x89 ! Mem[0000000030101408] = 00000000 000000bf | |
5742 | ! Starting 10 instruction Store Burst | |
5743 | ! %l3 = 0000000000000019, Mem[0000000030081408] = 000000fc | |
5744 | stha %l3,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000019 | |
5745 | ||
5746 | p0_label_138: | |
5747 | ! %f15 = 8c8decca, Mem[0000000010181434] = 41c3b07b | |
5748 | sta %f15,[%i6+0x034]%asi ! Mem[0000000010181434] = 8c8decca | |
5749 | ! %f12 = ffffffff 8dffff12, Mem[0000000030041410] = 665ef800 00000024 | |
5750 | stda %f12,[%i1+%o5]0x89 ! Mem[0000000030041410] = ffffffff 8dffff12 | |
5751 | ! %f8 = a196f1ff dfa6f0ff, %l0 = 00000000000000ff | |
5752 | ! Mem[0000000010181428] = feff70e9fc734517 | |
5753 | add %i6,0x028,%g1 | |
5754 | stda %f8,[%g1+%l0]ASI_PST16_P ! Mem[0000000010181428] = a196f1ffdfa6f0ff | |
5755 | ! Mem[0000000010141410] = 19000000, %l4 = 000000007d000000 | |
5756 | ldsba [%i5+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
5757 | ! %l0 = 00000000000000ff, Mem[0000000030101408] = 000000bf00000000 | |
5758 | stxa %l0,[%i4+%o4]0x89 ! Mem[0000000030101408] = 00000000000000ff | |
5759 | ! %l0 = 00000000000000ff, Mem[0000000030101408] = 000000ff | |
5760 | stba %l0,[%i4+%o4]0x89 ! Mem[0000000030101408] = 000000ff | |
5761 | ! Mem[0000000030141400] = 9f0000ff, %l0 = 00000000000000ff | |
5762 | swapa [%i5+%g0]0x89,%l0 ! %l0 = 000000009f0000ff | |
5763 | ! Mem[0000000010101430] = 7d000000, %l1 = fffffffffffffeff | |
5764 | swap [%i4+0x030],%l1 ! %l1 = 000000007d000000 | |
5765 | ! Mem[0000000010081403] = ff000000, %l6 = 0000000000000000 | |
5766 | ldstuba [%i2+0x003]%asi,%l6 ! %l6 = 00000000000000ff | |
5767 | ! Starting 10 instruction Load Burst | |
5768 | ! Mem[0000000010001400] = ff00ff9f000000ff, %l4 = 0000000000000000 | |
5769 | ldxa [%i0+%g0]0x80,%l4 ! %l4 = ff00ff9f000000ff | |
5770 | ||
5771 | p0_label_139: | |
5772 | ! Mem[0000000010041410] = 7d000000 76c6c4fc, %l6 = 00000000, %l7 = 000000bf | |
5773 | ldda [%i1+%o5]0x80,%l6 ! %l6 = 000000007d000000 0000000076c6c4fc | |
5774 | ! Mem[0000000010041408] = 00000000, %l6 = 000000007d000000 | |
5775 | ldswa [%i1+%o4]0x80,%l6 ! %l6 = 0000000000000000 | |
5776 | ! Mem[0000000030181408] = 000000ff, %l4 = ff00ff9f000000ff | |
5777 | lduwa [%i6+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
5778 | ! Mem[0000000030181408] = ff000000, %f23 = dfa6f0ff | |
5779 | lda [%i6+%o4]0x81,%f23 ! %f23 = ff000000 | |
5780 | ! Mem[0000000010081410] = fff85e66, %l3 = 0000000000000019 | |
5781 | ldsba [%i2+%o5]0x80,%l3 ! %l3 = ffffffffffffffff | |
5782 | ! Mem[0000000030101408] = 000000ff, %l7 = 0000000076c6c4fc | |
5783 | ldsha [%i4+%o4]0x89,%l7 ! %l7 = 00000000000000ff | |
5784 | ! Mem[0000000010001400] = 9fff00ff, %l4 = 00000000000000ff | |
5785 | lduha [%i0+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
5786 | ! Mem[0000000010081410] = fff85e6624000000, %l3 = ffffffffffffffff | |
5787 | ldxa [%i2+%o5]0x80,%l3 ! %l3 = fff85e6624000000 | |
5788 | ! Mem[00000000300c1410] = 000000ff, %l7 = 00000000000000ff | |
5789 | ldswa [%i3+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
5790 | ! Starting 10 instruction Store Burst | |
5791 | ! Mem[0000000010041434] = d5a7d7d9, %l3 = fff85e6624000000, %asi = 80 | |
5792 | swapa [%i1+0x034]%asi,%l3 ! %l3 = 00000000d5a7d7d9 | |
5793 | ||
5794 | p0_label_140: | |
5795 | ! %l5 = ffffffffffffffff, Mem[0000000010181410] = 0000adff000000ff | |
5796 | stxa %l5,[%i6+%o5]0x80 ! Mem[0000000010181410] = ffffffffffffffff | |
5797 | ! %l1 = 000000007d000000, Mem[0000000030181410] = 59000000 | |
5798 | stha %l1,[%i6+%o5]0x89 ! Mem[0000000030181410] = 59000000 | |
5799 | ! %l3 = 00000000d5a7d7d9, Mem[0000000030001410] = fcc4c676 | |
5800 | stba %l3,[%i0+%o5]0x81 ! Mem[0000000030001410] = d9c4c676 | |
5801 | ! Mem[00000000300c1410] = ff000000, %l4 = 00000000000000ff | |
5802 | ldstuba [%i3+%o5]0x81,%l4 ! %l4 = 000000ff000000ff | |
5803 | ! Mem[00000000300c1400] = ff512e7a, %l6 = 0000000000000000 | |
5804 | ldstuba [%i3+%g0]0x89,%l6 ! %l6 = 0000007a000000ff | |
5805 | ! Code Fragment 4 | |
5806 | p0_fragment_7: | |
5807 | ! %l0 = 000000009f0000ff | |
5808 | setx 0x51785d4f9cf4e81b,%g7,%l0 ! %l0 = 51785d4f9cf4e81b | |
5809 | ! %l1 = 000000007d000000 | |
5810 | setx 0x93944a880704c7ff,%g7,%l1 ! %l1 = 93944a880704c7ff | |
5811 | setx 0x7ff8, %g1, %g2 | |
5812 | and %l0, %g2, %l0 | |
5813 | setx 0xffffffff, %g1, %g2 | |
5814 | and %l1, %g2, %l1 | |
5815 | setx 0x100000000, %g1, %g2 | |
5816 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
5817 | ta T_CHANGE_HPRIV | |
5818 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
5819 | ta T_CHANGE_NONHPRIV | |
5820 | ! %l0 = 51785d4f9cf4e81b | |
5821 | setx 0x55e00acf83b5de2c,%g7,%l0 ! %l0 = 55e00acf83b5de2c | |
5822 | ! %l1 = 93944a880704c7ff | |
5823 | setx 0xd0105b07efbeab69,%g7,%l1 ! %l1 = d0105b07efbeab69 | |
5824 | ! Mem[0000000010101400] = ff000000, %l2 = 00000000000000ff | |
5825 | ldstuba [%i4+%g0]0x80,%l2 ! %l2 = 000000ff000000ff | |
5826 | ! Mem[0000000010101404] = 124444cf, %l7 = 00000000000000ff | |
5827 | swap [%i4+0x004],%l7 ! %l7 = 00000000124444cf | |
5828 | ! Mem[00000000201c0000] = 00769457, %l7 = 00000000124444cf | |
5829 | ldstub [%o0+%g0],%l7 ! %l7 = 00000000000000ff | |
5830 | ! Starting 10 instruction Load Burst | |
5831 | ! Mem[0000000010081400] = ff0000ff, %l6 = 000000000000007a | |
5832 | ldsha [%i2+%g0]0x80,%l6 ! %l6 = ffffffffffffff00 | |
5833 | ||
5834 | ! Check Point 28 for processor 0 | |
5835 | ||
5836 | set p0_check_pt_data_28,%g4 | |
5837 | rd %ccr,%g5 ! %g5 = 44 | |
5838 | ldx [%g4+0x08],%g2 | |
5839 | cmp %l0,%g2 ! %l0 = 55e00acf83b5de2c | |
5840 | bne %xcc,p0_reg_check_fail0 | |
5841 | mov 0xee0,%g1 | |
5842 | ldx [%g4+0x10],%g2 | |
5843 | cmp %l1,%g2 ! %l1 = d0105b07efbeab69 | |
5844 | bne %xcc,p0_reg_check_fail1 | |
5845 | mov 0xee1,%g1 | |
5846 | ldx [%g4+0x18],%g2 | |
5847 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
5848 | bne %xcc,p0_reg_check_fail2 | |
5849 | mov 0xee2,%g1 | |
5850 | ldx [%g4+0x20],%g2 | |
5851 | cmp %l3,%g2 ! %l3 = 00000000d5a7d7d9 | |
5852 | bne %xcc,p0_reg_check_fail3 | |
5853 | mov 0xee3,%g1 | |
5854 | ldx [%g4+0x28],%g2 | |
5855 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
5856 | bne %xcc,p0_reg_check_fail4 | |
5857 | mov 0xee4,%g1 | |
5858 | ldx [%g4+0x30],%g2 | |
5859 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
5860 | bne %xcc,p0_reg_check_fail5 | |
5861 | mov 0xee5,%g1 | |
5862 | ldx [%g4+0x38],%g2 | |
5863 | cmp %l6,%g2 ! %l6 = ffffffffffffff00 | |
5864 | bne %xcc,p0_reg_check_fail6 | |
5865 | mov 0xee6,%g1 | |
5866 | ldx [%g4+0x40],%g2 | |
5867 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
5868 | bne %xcc,p0_reg_check_fail7 | |
5869 | mov 0xee7,%g1 | |
5870 | ldx [%g4+0x48],%g3 | |
5871 | std %f6,[%g4] | |
5872 | ldx [%g4],%g2 | |
5873 | cmp %g3,%g2 ! %f6 = 00000000 00000000 | |
5874 | bne %xcc,p0_freg_check_fail | |
5875 | mov 0xf06,%g1 | |
5876 | ldx [%g4+0x50],%g3 | |
5877 | std %f22,[%g4] | |
5878 | ldx [%g4],%g2 | |
5879 | cmp %g3,%g2 ! %f22 = fc000000 ff000000 | |
5880 | bne %xcc,p0_freg_check_fail | |
5881 | mov 0xf22,%g1 | |
5882 | ||
5883 | ! Check Point 28 completed | |
5884 | ||
5885 | ||
5886 | p0_label_141: | |
5887 | ! Mem[0000000010181408] = ff000000, %l3 = 00000000d5a7d7d9 | |
5888 | ldswa [%i6+%o4]0x80,%l3 ! %l3 = ffffffffff000000 | |
5889 | ! Mem[0000000010181408] = 000000ff, %l2 = 00000000000000ff | |
5890 | ldsha [%i6+%o4]0x88,%l2 ! %l2 = 00000000000000ff | |
5891 | ! Mem[0000000030081408] = fff0a6df00000019, %f2 = fffffff8 00000024 | |
5892 | ldda [%i2+%o4]0x89,%f2 ! %f2 = fff0a6df 00000019 | |
5893 | ! Mem[0000000030101410] = 2a1a930b, %f5 = 24000000 | |
5894 | lda [%i4+%o5]0x81,%f5 ! %f5 = 2a1a930b | |
5895 | ! Mem[0000000030001400] = 00000000, %f23 = ff000000 | |
5896 | lda [%i0+%g0]0x81,%f23 ! %f23 = 00000000 | |
5897 | ! Mem[0000000010101408] = 00000000, %l3 = ffffffffff000000 | |
5898 | ldswa [%i4+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
5899 | ! Mem[0000000010081410] = 665ef8ff, %l0 = 55e00acf83b5de2c | |
5900 | ldswa [%i2+%o5]0x88,%l0 ! %l0 = 00000000665ef8ff | |
5901 | ! Mem[00000000201c0000] = ff769457, %l2 = 00000000000000ff | |
5902 | ldsb [%o0+%g0],%l2 ! %l2 = ffffffffffffffff | |
5903 | ! Mem[0000000010141410] = 00000019, %l2 = ffffffffffffffff | |
5904 | ldswa [%i5+%o5]0x80,%l2 ! %l2 = 0000000000000019 | |
5905 | ! Starting 10 instruction Store Burst | |
5906 | ! Mem[0000000020800001] = 00008470, %l5 = ffffffffffffffff | |
5907 | ldstub [%o1+0x001],%l5 ! %l5 = 00000000000000ff | |
5908 | ||
5909 | p0_label_142: | |
5910 | ! Mem[0000000030001410] = d9c4c676, %l3 = 0000000000000000 | |
5911 | swapa [%i0+%o5]0x81,%l3 ! %l3 = 00000000d9c4c676 | |
5912 | ! Mem[0000000010081408] = fffffff8, %l2 = 0000000000000019 | |
5913 | ldstuba [%i2+%o4]0x80,%l2 ! %l2 = 000000ff000000ff | |
5914 | ! %f1 = 00000000, Mem[0000000010101420] = 00000000 | |
5915 | sta %f1 ,[%i4+0x020]%asi ! Mem[0000000010101420] = 00000000 | |
5916 | ! Mem[0000000010001410] = ffffffff, %l2 = 00000000000000ff | |
5917 | ldstuba [%i0+%o5]0x88,%l2 ! %l2 = 000000ff000000ff | |
5918 | ! %l5 = 0000000000000000, Mem[0000000010141406] = 000000ff | |
5919 | sth %l5,[%i5+0x006] ! Mem[0000000010141404] = 00000000 | |
5920 | ! %l7 = 0000000000000000, Mem[0000000010101410] = 9c5199df | |
5921 | stba %l7,[%i4+%o5]0x88 ! Mem[0000000010101410] = 9c519900 | |
5922 | ! %f16 = 7d000000, Mem[0000000010181410] = ffffffff | |
5923 | sta %f16,[%i6+%o5]0x80 ! Mem[0000000010181410] = 7d000000 | |
5924 | ! Mem[0000000010101410] = 0099519c, %l0 = 00000000665ef8ff | |
5925 | ldsba [%i4+0x013]%asi,%l0 ! %l0 = ffffffffffffff9c | |
5926 | ! Mem[0000000030181410] = 59000000, %l5 = 0000000000000000 | |
5927 | ldstuba [%i6+%o5]0x89,%l5 ! %l5 = 00000000000000ff | |
5928 | ! Starting 10 instruction Load Burst | |
5929 | ! Mem[0000000030001408] = 00000000dfa6f0ff, %l4 = 00000000000000ff | |
5930 | ldxa [%i0+%o4]0x89,%l4 ! %l4 = 00000000dfa6f0ff | |
5931 | ||
5932 | p0_label_143: | |
5933 | ! Mem[0000000030101400] = fff0a6dfffffffff, %l0 = ffffffffffffff9c | |
5934 | ldxa [%i4+%g0]0x89,%l0 ! %l0 = fff0a6dfffffffff | |
5935 | ! Mem[0000000030101400] = ffffffff, %l4 = 00000000dfa6f0ff | |
5936 | lduha [%i4+%g0]0x89,%l4 ! %l4 = 000000000000ffff | |
5937 | membar #Sync ! Added by membar checker (24) | |
5938 | ! Mem[0000000010101400] = ff000000 000000ff 00000000 00000000 | |
5939 | ! Mem[0000000010101410] = 0099519c ffffff55 00000000 000000ff | |
5940 | ! Mem[0000000010101420] = 00000000 12ff76c9 665ef8fc edf0a6df | |
5941 | ! Mem[0000000010101430] = fffffeff 01a3a7b6 00000000 000000ff | |
5942 | ldda [%i4]ASI_BLK_AIUP,%f0 ! Block Load from 0000000010101400 | |
5943 | ! Mem[0000000030101400] = ffffffff, %l5 = 0000000000000000 | |
5944 | ldsha [%i4+%g0]0x89,%l5 ! %l5 = ffffffffffffffff | |
5945 | ! Mem[00000000100c1408] = 665ef8fc, %l4 = 000000000000ffff | |
5946 | ldswa [%i3+%o4]0x80,%l4 ! %l4 = 00000000665ef8fc | |
5947 | ! Mem[0000000010081430] = ffffffff, %l0 = fff0a6dfffffffff | |
5948 | lduw [%i2+0x030],%l0 ! %l0 = 00000000ffffffff | |
5949 | ! Mem[00000000300c1410] = ff000000, %l5 = ffffffffffffffff | |
5950 | ldswa [%i3+%o5]0x81,%l5 ! %l5 = ffffffffff000000 | |
5951 | ! Mem[0000000030081410] = 0b65adff, %l5 = ffffffffff000000 | |
5952 | lduha [%i2+%o5]0x89,%l5 ! %l5 = 000000000000adff | |
5953 | ! Mem[0000000030141408] = ff0000007e42feff, %f24 = fcc4c676 12000000 | |
5954 | ldda [%i5+%o4]0x89,%f24 ! %f24 = ff000000 7e42feff | |
5955 | ! Starting 10 instruction Store Burst | |
5956 | ! Mem[0000000030101410] = 0b931a2a, %l5 = 000000000000adff | |
5957 | swapa [%i4+%o5]0x89,%l5 ! %l5 = 000000000b931a2a | |
5958 | ||
5959 | p0_label_144: | |
5960 | ! Mem[0000000030141408] = 7e42feff, %l5 = 000000000b931a2a | |
5961 | swapa [%i5+%o4]0x89,%l5 ! %l5 = 000000007e42feff | |
5962 | ! %f16 = 7d000000, Mem[0000000010181410] = 7d000000 | |
5963 | sta %f16,[%i6+%o5]0x80 ! Mem[0000000010181410] = 7d000000 | |
5964 | ! %f17 = ff000000, Mem[0000000030101400] = ffffffff | |
5965 | sta %f17,[%i4+%g0]0x89 ! Mem[0000000030101400] = ff000000 | |
5966 | ! %l3 = 00000000d9c4c676, Mem[0000000030141400] = ff00000000000000 | |
5967 | stxa %l3,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00000000d9c4c676 | |
5968 | ! %f16 = 7d000000, Mem[0000000010081400] = ff0000ff | |
5969 | sta %f16,[%i2+%g0]0x80 ! Mem[0000000010081400] = 7d000000 | |
5970 | membar #Sync ! Added by membar checker (25) | |
5971 | ! %l2 = 00000000000000ff, Mem[0000000010101410] = 9c519900 | |
5972 | stba %l2,[%i4+%o5]0x88 ! Mem[0000000010101410] = 9c5199ff | |
5973 | ! Mem[00000000201c0000] = ff769457, %l6 = ffffffffffffff00 | |
5974 | ldstub [%o0+%g0],%l6 ! %l6 = 000000ff000000ff | |
5975 | ! Mem[0000000010101424] = 12ff76c9, %l4 = 00000000665ef8fc | |
5976 | swap [%i4+0x024],%l4 ! %l4 = 0000000012ff76c9 | |
5977 | ! %f30 = 000000ff 0000ffff, %l7 = 0000000000000000 | |
5978 | ! Mem[00000000100c1438] = 022d96f8d6ba79b1 | |
5979 | add %i3,0x038,%g1 | |
5980 | stda %f30,[%g1+%l7]ASI_PST32_P ! Mem[00000000100c1438] = 022d96f8d6ba79b1 | |
5981 | ! Starting 10 instruction Load Burst | |
5982 | ! Mem[00000000211c0000] = feff1a4c, %l2 = 00000000000000ff | |
5983 | ldsba [%o2+0x000]%asi,%l2 ! %l2 = fffffffffffffffe | |
5984 | ||
5985 | p0_label_145: | |
5986 | ! Mem[0000000010181424] = ff1dff00, %l5 = 000000007e42feff | |
5987 | ldsha [%i6+0x024]%asi,%l5 ! %l5 = ffffffffffffff1d | |
5988 | ! Mem[00000000300c1400] = ff512eff, %l0 = 00000000ffffffff | |
5989 | lduba [%i3+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
5990 | ! Mem[0000000010001400] = ff00ff9f, %l6 = 00000000000000ff | |
5991 | ldsha [%i0+0x000]%asi,%l6 ! %l6 = ffffffffffffff00 | |
5992 | ! Mem[0000000010041400] = ff000000, %l5 = ffffffffffffff1d | |
5993 | lduwa [%i1+%g0]0x88,%l5 ! %l5 = 00000000ff000000 | |
5994 | ! Mem[0000000030141408] = 0b931a2a, %f25 = 7e42feff | |
5995 | lda [%i5+%o4]0x89,%f25 ! %f25 = 0b931a2a | |
5996 | ! Mem[00000000300c1400] = ff512eff, %l1 = d0105b07efbeab69 | |
5997 | ldsba [%i3+%g0]0x89,%l1 ! %l1 = ffffffffffffffff | |
5998 | ! Mem[0000000021800080] = ceffa433, %l0 = 00000000000000ff | |
5999 | lduha [%o3+0x080]%asi,%l0 ! %l0 = 000000000000ceff | |
6000 | ! Mem[0000000010101410] = ff99519c, %l1 = ffffffffffffffff | |
6001 | lduwa [%i4+%o5]0x80,%l1 ! %l1 = 00000000ff99519c | |
6002 | ! Mem[0000000030041400] = 00000000124444cf, %l4 = 0000000012ff76c9 | |
6003 | ldxa [%i1+%g0]0x89,%l4 ! %l4 = 00000000124444cf | |
6004 | ! Starting 10 instruction Store Burst | |
6005 | ! %f16 = 7d000000 ff000000 7d000000 ff000000 | |
6006 | ! %f20 = 00000000 7d307e94 fc000000 00000000 | |
6007 | ! %f24 = ff000000 0b931a2a dfa6f0ed fcf85e66 | |
6008 | ! %f28 = 00000000 ff000000 000000ff 0000ffff | |
6009 | stda %f16,[%i2]ASI_BLK_PL ! Block Store to 0000000010081400 | |
6010 | ||
6011 | ! Check Point 29 for processor 0 | |
6012 | ||
6013 | set p0_check_pt_data_29,%g4 | |
6014 | rd %ccr,%g5 ! %g5 = 44 | |
6015 | ldx [%g4+0x08],%g2 | |
6016 | cmp %l0,%g2 ! %l0 = 000000000000ceff | |
6017 | bne %xcc,p0_reg_check_fail0 | |
6018 | mov 0xee0,%g1 | |
6019 | ldx [%g4+0x10],%g2 | |
6020 | cmp %l1,%g2 ! %l1 = 00000000ff99519c | |
6021 | bne %xcc,p0_reg_check_fail1 | |
6022 | mov 0xee1,%g1 | |
6023 | ldx [%g4+0x18],%g2 | |
6024 | cmp %l2,%g2 ! %l2 = fffffffffffffffe | |
6025 | bne %xcc,p0_reg_check_fail2 | |
6026 | mov 0xee2,%g1 | |
6027 | ldx [%g4+0x20],%g2 | |
6028 | cmp %l3,%g2 ! %l3 = 00000000d9c4c676 | |
6029 | bne %xcc,p0_reg_check_fail3 | |
6030 | mov 0xee3,%g1 | |
6031 | ldx [%g4+0x28],%g2 | |
6032 | cmp %l4,%g2 ! %l4 = 00000000124444cf | |
6033 | bne %xcc,p0_reg_check_fail4 | |
6034 | mov 0xee4,%g1 | |
6035 | ldx [%g4+0x30],%g2 | |
6036 | cmp %l5,%g2 ! %l5 = 00000000ff000000 | |
6037 | bne %xcc,p0_reg_check_fail5 | |
6038 | mov 0xee5,%g1 | |
6039 | ldx [%g4+0x38],%g2 | |
6040 | cmp %l6,%g2 ! %l6 = ffffffffffffff00 | |
6041 | bne %xcc,p0_reg_check_fail6 | |
6042 | mov 0xee6,%g1 | |
6043 | ldx [%g4+0x40],%g3 | |
6044 | std %f0,[%g4] | |
6045 | ldx [%g4],%g2 | |
6046 | cmp %g3,%g2 ! %f0 = ff000000 000000ff | |
6047 | bne %xcc,p0_freg_check_fail | |
6048 | mov 0xf00,%g1 | |
6049 | ldx [%g4+0x48],%g3 | |
6050 | std %f2,[%g4] | |
6051 | ldx [%g4],%g2 | |
6052 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
6053 | bne %xcc,p0_freg_check_fail | |
6054 | mov 0xf02,%g1 | |
6055 | ldx [%g4+0x50],%g3 | |
6056 | std %f4,[%g4] | |
6057 | ldx [%g4],%g2 | |
6058 | cmp %g3,%g2 ! %f4 = 0099519c ffffff55 | |
6059 | bne %xcc,p0_freg_check_fail | |
6060 | mov 0xf04,%g1 | |
6061 | ldx [%g4+0x58],%g3 | |
6062 | std %f6,[%g4] | |
6063 | ldx [%g4],%g2 | |
6064 | cmp %g3,%g2 ! %f6 = 00000000 000000ff | |
6065 | bne %xcc,p0_freg_check_fail | |
6066 | mov 0xf06,%g1 | |
6067 | ldx [%g4+0x60],%g3 | |
6068 | std %f8,[%g4] | |
6069 | ldx [%g4],%g2 | |
6070 | cmp %g3,%g2 ! %f8 = 00000000 12ff76c9 | |
6071 | bne %xcc,p0_freg_check_fail | |
6072 | mov 0xf08,%g1 | |
6073 | ldx [%g4+0x68],%g3 | |
6074 | std %f10,[%g4] | |
6075 | ldx [%g4],%g2 | |
6076 | cmp %g3,%g2 ! %f10 = 665ef8fc edf0a6df | |
6077 | bne %xcc,p0_freg_check_fail | |
6078 | mov 0xf10,%g1 | |
6079 | ldx [%g4+0x70],%g3 | |
6080 | std %f12,[%g4] | |
6081 | ldx [%g4],%g2 | |
6082 | cmp %g3,%g2 ! %f12 = fffffeff 01a3a7b6 | |
6083 | bne %xcc,p0_freg_check_fail | |
6084 | mov 0xf12,%g1 | |
6085 | ldx [%g4+0x78],%g3 | |
6086 | std %f14,[%g4] | |
6087 | ldx [%g4],%g2 | |
6088 | cmp %g3,%g2 ! %f14 = 00000000 000000ff | |
6089 | bne %xcc,p0_freg_check_fail | |
6090 | mov 0xf14,%g1 | |
6091 | ldx [%g4+0x80],%g3 | |
6092 | std %f22,[%g4] | |
6093 | ldx [%g4],%g2 | |
6094 | cmp %g3,%g2 ! %f22 = fc000000 00000000 | |
6095 | bne %xcc,p0_freg_check_fail | |
6096 | mov 0xf22,%g1 | |
6097 | ldx [%g4+0x88],%g3 | |
6098 | std %f24,[%g4] | |
6099 | ldx [%g4],%g2 | |
6100 | cmp %g3,%g2 ! %f24 = ff000000 0b931a2a | |
6101 | bne %xcc,p0_freg_check_fail | |
6102 | mov 0xf24,%g1 | |
6103 | ||
6104 | ! Check Point 29 completed | |
6105 | ||
6106 | ||
6107 | p0_label_146: | |
6108 | ! %f30 = 000000ff 0000ffff, Mem[0000000010101408] = 00000000 00000000 | |
6109 | stda %f30,[%i4+%o4]0x88 ! Mem[0000000010101408] = 000000ff 0000ffff | |
6110 | ! Mem[00000000300c1400] = ff512eff, %l7 = 0000000000000000 | |
6111 | ldstuba [%i3+%g0]0x89,%l7 ! %l7 = 000000ff000000ff | |
6112 | ! Mem[0000000010141410] = 00000019, %l5 = 00000000ff000000 | |
6113 | ldstuba [%i5+%o5]0x80,%l5 ! %l5 = 00000000000000ff | |
6114 | ! %f26 = dfa6f0ed fcf85e66, Mem[0000000010041410] = 7d000000 76c6c4fc | |
6115 | stda %f26,[%i1+0x010]%asi ! Mem[0000000010041410] = dfa6f0ed fcf85e66 | |
6116 | ! Mem[0000000030101408] = 000000ff, %l7 = 00000000000000ff | |
6117 | swapa [%i4+%o4]0x89,%l7 ! %l7 = 00000000000000ff | |
6118 | ! Mem[0000000010101428] = 665ef8fcedf0a6df, %l4 = 00000000124444cf, %l7 = 00000000000000ff | |
6119 | add %i4,0x28,%g1 | |
6120 | casxa [%g1]0x80,%l4,%l7 ! %l7 = 665ef8fcedf0a6df | |
6121 | ! %f28 = 00000000, Mem[0000000010101418] = 00000000 | |
6122 | sta %f28,[%i4+0x018]%asi ! Mem[0000000010101418] = 00000000 | |
6123 | ! %l2 = fffffffffffffffe, Mem[0000000010181408] = ff000000 | |
6124 | stha %l2,[%i6+%o4]0x80 ! Mem[0000000010181408] = fffe0000 | |
6125 | ! %l0 = 000000000000ceff, Mem[0000000010181410] = 0000007d | |
6126 | stwa %l0,[%i6+%o5]0x88 ! Mem[0000000010181410] = 0000ceff | |
6127 | ! Starting 10 instruction Load Burst | |
6128 | ! Mem[0000000010181408] = fffe00007e42feff, %f4 = 0099519c ffffff55 | |
6129 | ldda [%i6+%o4]0x80,%f4 ! %f4 = fffe0000 7e42feff | |
6130 | ||
6131 | p0_label_147: | |
6132 | ! Mem[00000000100c1410] = bf000000f8ffffff, %f24 = ff000000 0b931a2a | |
6133 | ldda [%i3+%o5]0x88,%f24 ! %f24 = bf000000 f8ffffff | |
6134 | ! Mem[0000000030101410] = 0000adff, %l7 = 665ef8fcedf0a6df | |
6135 | lduba [%i4+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
6136 | membar #Sync ! Added by membar checker (26) | |
6137 | ! Mem[0000000010081410] = 947e307d, %l0 = 000000000000ceff | |
6138 | ldsba [%i2+%o5]0x80,%l0 ! %l0 = ffffffffffffff94 | |
6139 | ! Mem[0000000010101410] = 9c5199ff, %l1 = 00000000ff99519c | |
6140 | lduha [%i4+%o5]0x88,%l1 ! %l1 = 00000000000099ff | |
6141 | ! Mem[00000000100c1420] = 9c15642176c6411f, %f4 = fffe0000 7e42feff | |
6142 | ldda [%i3+0x020]%asi,%f4 ! %f4 = 9c156421 76c6411f | |
6143 | ! Mem[0000000010041410] = edf0a6df, %f8 = 00000000 | |
6144 | lda [%i1+%o5]0x88,%f8 ! %f8 = edf0a6df | |
6145 | ! Mem[0000000010101400] = ff000000000000ff, %l4 = 00000000124444cf | |
6146 | ldxa [%i4+%g0]0x88,%l4 ! %l4 = ff000000000000ff | |
6147 | ! Mem[0000000030181410] = ff000059, %l4 = ff000000000000ff | |
6148 | lduha [%i6+%o5]0x81,%l4 ! %l4 = 000000000000ff00 | |
6149 | ! Mem[0000000010181430] = 00001dff8c8decca, %f4 = 9c156421 76c6411f | |
6150 | ldd [%i6+0x030],%f4 ! %f4 = 00001dff 8c8decca | |
6151 | ! Starting 10 instruction Store Burst | |
6152 | ! %l7 = 00000000000000ff, Mem[0000000030141400] = 00000000 | |
6153 | stha %l7,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00ff0000 | |
6154 | ||
6155 | p0_label_148: | |
6156 | ! Mem[0000000010141408] = 000000ff, %l4 = 000000000000ff00 | |
6157 | ldstuba [%i5+%o4]0x80,%l4 ! %l4 = 00000000000000ff | |
6158 | ! %l0 = ffffffffffffff94, Mem[0000000030181400] = ff000000 | |
6159 | stba %l0,[%i6+%g0]0x81 ! Mem[0000000030181400] = 94000000 | |
6160 | ! Mem[00000000300c1400] = ff512eff, %l2 = fffffffffffffffe | |
6161 | swapa [%i3+%g0]0x89,%l2 ! %l2 = 00000000ff512eff | |
6162 | ! %l7 = 00000000000000ff, Mem[0000000010001400] = ff00ff9f | |
6163 | stha %l7,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00ffff9f | |
6164 | ! %l2 = ff512eff, %l3 = d9c4c676, Mem[0000000010001400] = 00ffff9f 000000ff | |
6165 | stda %l2,[%i0+%g0]0x80 ! Mem[0000000010001400] = ff512eff d9c4c676 | |
6166 | ! %l6 = ffffffffffffff00, Mem[0000000030101410] = ffad000000001dff | |
6167 | stxa %l6,[%i4+%o5]0x81 ! Mem[0000000030101410] = ffffffffffffff00 | |
6168 | ! %l1 = 00000000000099ff, Mem[0000000030101400] = ff000000 | |
6169 | stha %l1,[%i4+%g0]0x89 ! Mem[0000000030101400] = ff0099ff | |
6170 | ! %l3 = 00000000d9c4c676, Mem[0000000030041408] = 24000000f8ffff45 | |
6171 | stxa %l3,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000000d9c4c676 | |
6172 | ! Mem[0000000030081410] = 0b65adff, %l3 = 00000000d9c4c676 | |
6173 | ldstuba [%i2+%o5]0x89,%l3 ! %l3 = 000000ff000000ff | |
6174 | ! Starting 10 instruction Load Burst | |
6175 | ! Mem[0000000010181400] = 00000000, %l4 = 0000000000000000 | |
6176 | ldsha [%i6+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
6177 | ||
6178 | p0_label_149: | |
6179 | ! Mem[0000000010041420] = 1f41c676, %f19 = ff000000 | |
6180 | ld [%i1+0x020],%f19 ! %f19 = 1f41c676 | |
6181 | ! Mem[0000000030041400] = cf444412, %l5 = 0000000000000000 | |
6182 | lduba [%i1+%g0]0x81,%l5 ! %l5 = 00000000000000cf | |
6183 | ! Mem[0000000030041400] = cf444412, %l5 = 00000000000000cf | |
6184 | ldsba [%i1+%g0]0x81,%l5 ! %l5 = ffffffffffffffcf | |
6185 | ! Mem[00000000100c1410] = f8ffffff, %l0 = ffffffffffffff94 | |
6186 | lduwa [%i3+%o5]0x88,%l0 ! %l0 = 00000000f8ffffff | |
6187 | ! Mem[00000000211c0000] = feff1a4c, %l5 = ffffffffffffffcf | |
6188 | lduh [%o2+%g0],%l5 ! %l5 = 000000000000feff | |
6189 | ! Mem[0000000010141408] = ff0000ffc45f3d9f, %l3 = 00000000000000ff | |
6190 | ldxa [%i5+%o4]0x80,%l3 ! %l3 = ff0000ffc45f3d9f | |
6191 | ! Mem[0000000010141408] = ff0000ff, %l0 = 00000000f8ffffff | |
6192 | lduwa [%i5+%o4]0x80,%l0 ! %l0 = 00000000ff0000ff | |
6193 | ! Mem[0000000010141410] = 190000ff, %l5 = 000000000000feff | |
6194 | lduba [%i5+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
6195 | ! Mem[0000000010101410] = 9c5199ff, %l5 = 00000000000000ff | |
6196 | lduwa [%i4+%o5]0x88,%l5 ! %l5 = 000000009c5199ff | |
6197 | ! Starting 10 instruction Store Burst | |
6198 | ! %l3 = ff0000ffc45f3d9f, Mem[00000000201c0000] = ff769457, %asi = 80 | |
6199 | stba %l3,[%o0+0x000]%asi ! Mem[00000000201c0000] = 9f769457 | |
6200 | ||
6201 | p0_label_150: | |
6202 | ! %l2 = 00000000ff512eff, Mem[0000000030081410] = ffad650b000000ff | |
6203 | stxa %l2,[%i2+%o5]0x81 ! Mem[0000000030081410] = 00000000ff512eff | |
6204 | ! Mem[0000000030141400] = 0000ff00, %l5 = 000000009c5199ff | |
6205 | ldstuba [%i5+%g0]0x89,%l5 ! %l5 = 00000000000000ff | |
6206 | ! %l3 = ff0000ffc45f3d9f, Mem[00000000201c0000] = 9f769457 | |
6207 | sth %l3,[%o0+%g0] ! Mem[00000000201c0000] = 3d9f9457 | |
6208 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000030181410] = ff000059 ff000000 | |
6209 | stda %l4,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 00000000 | |
6210 | ! Mem[0000000030181410] = 00000000, %l0 = 00000000ff0000ff | |
6211 | swapa [%i6+%o5]0x89,%l0 ! %l0 = 0000000000000000 | |
6212 | ! %f4 = 00001dff, Mem[0000000030081408] = 19000000 | |
6213 | sta %f4 ,[%i2+%o4]0x81 ! Mem[0000000030081408] = 00001dff | |
6214 | ! Mem[0000000030001400] = 00000000, %l5 = 0000000000000000 | |
6215 | swapa [%i0+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
6216 | ! Mem[0000000010101434] = 01a3a7b6, %l1 = 00000000000099ff | |
6217 | swap [%i4+0x034],%l1 ! %l1 = 0000000001a3a7b6 | |
6218 | ! Mem[0000000030181400] = 94000000, %l3 = ff0000ffc45f3d9f | |
6219 | ldstuba [%i6+%g0]0x81,%l3 ! %l3 = 00000094000000ff | |
6220 | ! Starting 10 instruction Load Burst | |
6221 | ! Mem[0000000030101410] = ffffffff, %l4 = 0000000000000000 | |
6222 | lduwa [%i4+%o5]0x89,%l4 ! %l4 = 00000000ffffffff | |
6223 | ||
6224 | ! Check Point 30 for processor 0 | |
6225 | ||
6226 | set p0_check_pt_data_30,%g4 | |
6227 | rd %ccr,%g5 ! %g5 = 44 | |
6228 | ldx [%g4+0x08],%g2 | |
6229 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
6230 | bne %xcc,p0_reg_check_fail0 | |
6231 | mov 0xee0,%g1 | |
6232 | ldx [%g4+0x10],%g2 | |
6233 | cmp %l1,%g2 ! %l1 = 0000000001a3a7b6 | |
6234 | bne %xcc,p0_reg_check_fail1 | |
6235 | mov 0xee1,%g1 | |
6236 | ldx [%g4+0x18],%g2 | |
6237 | cmp %l3,%g2 ! %l3 = 0000000000000094 | |
6238 | bne %xcc,p0_reg_check_fail3 | |
6239 | mov 0xee3,%g1 | |
6240 | ldx [%g4+0x20],%g2 | |
6241 | cmp %l4,%g2 ! %l4 = 00000000ffffffff | |
6242 | bne %xcc,p0_reg_check_fail4 | |
6243 | mov 0xee4,%g1 | |
6244 | ldx [%g4+0x28],%g2 | |
6245 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
6246 | bne %xcc,p0_reg_check_fail5 | |
6247 | mov 0xee5,%g1 | |
6248 | ldx [%g4+0x30],%g2 | |
6249 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
6250 | bne %xcc,p0_reg_check_fail7 | |
6251 | mov 0xee7,%g1 | |
6252 | ldx [%g4+0x38],%g3 | |
6253 | std %f4,[%g4] | |
6254 | ldx [%g4],%g2 | |
6255 | cmp %g3,%g2 ! %f4 = 00001dff 8c8decca | |
6256 | bne %xcc,p0_freg_check_fail | |
6257 | mov 0xf04,%g1 | |
6258 | ldx [%g4+0x40],%g3 | |
6259 | std %f8,[%g4] | |
6260 | ldx [%g4],%g2 | |
6261 | cmp %g3,%g2 ! %f8 = edf0a6df 12ff76c9 | |
6262 | bne %xcc,p0_freg_check_fail | |
6263 | mov 0xf08,%g1 | |
6264 | ldx [%g4+0x48],%g3 | |
6265 | std %f18,[%g4] | |
6266 | ldx [%g4],%g2 | |
6267 | cmp %g3,%g2 ! %f18 = 7d000000 1f41c676 | |
6268 | bne %xcc,p0_freg_check_fail | |
6269 | mov 0xf18,%g1 | |
6270 | ldx [%g4+0x50],%g3 | |
6271 | std %f24,[%g4] | |
6272 | ldx [%g4],%g2 | |
6273 | cmp %g3,%g2 ! %f24 = bf000000 f8ffffff | |
6274 | bne %xcc,p0_freg_check_fail | |
6275 | mov 0xf24,%g1 | |
6276 | ||
6277 | ! Check Point 30 completed | |
6278 | ||
6279 | ||
6280 | p0_label_151: | |
6281 | ! Mem[0000000010041400] = ff000000, %l4 = 00000000ffffffff | |
6282 | ldsha [%i1+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
6283 | ! Mem[0000000030001408] = fff0a6df, %l3 = 0000000000000094 | |
6284 | ldsha [%i0+%o4]0x81,%l3 ! %l3 = fffffffffffffff0 | |
6285 | ! Mem[0000000030041408] = 76c6c4d9, %l2 = 00000000ff512eff | |
6286 | lduwa [%i1+%o4]0x81,%l2 ! %l2 = 0000000076c6c4d9 | |
6287 | ! Mem[0000000030041400] = 124444cf, %l3 = fffffffffffffff0 | |
6288 | ldswa [%i1+%g0]0x89,%l3 ! %l3 = 00000000124444cf | |
6289 | ! Mem[0000000030101400] = ff9900ff, %l7 = 00000000000000ff | |
6290 | lduha [%i4+%g0]0x81,%l7 ! %l7 = 000000000000ff99 | |
6291 | ! Mem[0000000030141410] = ffffffff, %l7 = 000000000000ff99 | |
6292 | ldsba [%i5+%o5]0x89,%l7 ! %l7 = ffffffffffffffff | |
6293 | ! Mem[00000000300c1408] = 7d000000ff000000, %f16 = 7d000000 ff000000 | |
6294 | ldda [%i3+%o4]0x81,%f16 ! %f16 = 7d000000 ff000000 | |
6295 | ! Mem[00000000300c1400] = 7a2e51fffffffffe, %l1 = 0000000001a3a7b6 | |
6296 | ldxa [%i3+%g0]0x89,%l1 ! %l1 = 7a2e51fffffffffe | |
6297 | ! Mem[0000000010181410] = 0000ceff, %l3 = 00000000124444cf | |
6298 | lduwa [%i6+%o5]0x88,%l3 ! %l3 = 000000000000ceff | |
6299 | ! Starting 10 instruction Store Burst | |
6300 | ! Mem[0000000030101408] = ff000000, %l2 = 0000000076c6c4d9 | |
6301 | ldstuba [%i4+%o4]0x81,%l2 ! %l2 = 000000ff000000ff | |
6302 | ||
6303 | p0_label_152: | |
6304 | ! %l2 = 000000ff, %l3 = 0000ceff, Mem[0000000030101400] = ff0099ff fff0a6df | |
6305 | stda %l2,[%i4+%g0]0x89 ! Mem[0000000030101400] = 000000ff 0000ceff | |
6306 | ! Mem[00000000201c0000] = 3d9f9457, %l5 = 0000000000000000 | |
6307 | ldstuba [%o0+0x000]%asi,%l5 ! %l5 = 0000003d000000ff | |
6308 | ! %l3 = 000000000000ceff, Mem[0000000010001400] = ff512effd9c4c676 | |
6309 | stxa %l3,[%i0+%g0]0x80 ! Mem[0000000010001400] = 000000000000ceff | |
6310 | ! %l4 = 0000000000000000, Mem[0000000010001408] = c45f3d9ffff0a6ff | |
6311 | stxa %l4,[%i0+%o4]0x88 ! Mem[0000000010001408] = 0000000000000000 | |
6312 | ! Mem[0000000010101408] = ffff0000, %l4 = 0000000000000000 | |
6313 | ldstuba [%i4+%o4]0x80,%l4 ! %l4 = 000000ff000000ff | |
6314 | ! Mem[00000000100c1410] = fffffff8, %l1 = 7a2e51fffffffffe | |
6315 | ldstuba [%i3+%o5]0x80,%l1 ! %l1 = 000000ff000000ff | |
6316 | ! Mem[0000000010081410] = 7d307e94, %l7 = ffffffffffffffff | |
6317 | ldstuba [%i2+%o5]0x88,%l7 ! %l7 = 00000094000000ff | |
6318 | ! Mem[0000000010041438] = b179bad6f8962d02, %l1 = 00000000000000ff | |
6319 | ldxa [%i1+0x038]%asi,%l1 ! %l1 = b179bad6f8962d02 | |
6320 | ! Mem[0000000030001400] = 00000000, %l6 = ffffffffffffff00 | |
6321 | swapa [%i0+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
6322 | ! Starting 10 instruction Load Burst | |
6323 | ! Mem[0000000010101420] = 00000000, %f16 = 7d000000 | |
6324 | lda [%i4+0x020]%asi,%f16 ! %f16 = 00000000 | |
6325 | ||
6326 | p0_label_153: | |
6327 | ! Mem[0000000010041410] = dfa6f0ed fcf85e66, %l0 = 00000000, %l1 = f8962d02 | |
6328 | ldda [%i1+%o5]0x80,%l0 ! %l0 = 00000000dfa6f0ed 00000000fcf85e66 | |
6329 | ! Mem[0000000030181400] = ff000000 ffffffff, %l0 = dfa6f0ed, %l1 = fcf85e66 | |
6330 | ldda [%i6+%g0]0x81,%l0 ! %l0 = 00000000ff000000 00000000ffffffff | |
6331 | ! Mem[0000000010001400] = 00000000, %l0 = 00000000ff000000 | |
6332 | ldswa [%i0+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
6333 | ! Mem[0000000010181410] = ffce0000, %l1 = 00000000ffffffff | |
6334 | lduba [%i6+%o5]0x80,%l1 ! %l1 = 00000000000000ff | |
6335 | ! Mem[0000000030141400] = 0000ffff, %l2 = 00000000000000ff | |
6336 | lduwa [%i5+%g0]0x89,%l2 ! %l2 = 000000000000ffff | |
6337 | ! Mem[00000000201c0000] = ff9f9457, %l3 = 000000000000ceff | |
6338 | ldub [%o0+%g0],%l3 ! %l3 = 00000000000000ff | |
6339 | ! Mem[0000000030001410] = 00000000, %l1 = 00000000000000ff | |
6340 | ldswa [%i0+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
6341 | ! Mem[0000000010081434] = 00000000, %f28 = 00000000 | |
6342 | lda [%i2+0x034]%asi,%f28 ! %f28 = 00000000 | |
6343 | ! Mem[00000000300c1400] = feffffffff512e7a, %l1 = 0000000000000000 | |
6344 | ldxa [%i3+%g0]0x81,%l1 ! %l1 = feffffffff512e7a | |
6345 | ! Starting 10 instruction Store Burst | |
6346 | ! Mem[0000000010001430] = 6123c459, %l0 = 0000000000000000 | |
6347 | swap [%i0+0x030],%l0 ! %l0 = 000000006123c459 | |
6348 | ||
6349 | p0_label_154: | |
6350 | ! %f22 = fc000000 00000000, Mem[0000000010081400] = ff000000 7d000000 | |
6351 | stda %f22,[%i2+%g0]0x88 ! Mem[0000000010081400] = fc000000 00000000 | |
6352 | ! %l1 = feffffffff512e7a, Mem[0000000020800000] = 00ff8470 | |
6353 | sth %l1,[%o1+%g0] ! Mem[0000000020800000] = 2e7a8470 | |
6354 | ! %l6 = 0000000000000000, Mem[0000000010081400] = 00000000 | |
6355 | stba %l6,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 | |
6356 | ! %l1 = feffffffff512e7a, Mem[0000000010141416] = 00f0a612, %asi = 80 | |
6357 | stba %l1,[%i5+0x016]%asi ! Mem[0000000010141414] = 00f07a12 | |
6358 | ! %f14 = 00000000 000000ff, %l6 = 0000000000000000 | |
6359 | ! Mem[0000000010141418] = ff1d000000000024 | |
6360 | add %i5,0x018,%g1 | |
6361 | stda %f14,[%g1+%l6]ASI_PST32_P ! Mem[0000000010141418] = ff1d000000000024 | |
6362 | ! %l5 = 000000000000003d, Mem[0000000030101408] = ff00000000000000 | |
6363 | stxa %l5,[%i4+%o4]0x81 ! Mem[0000000030101408] = 000000000000003d | |
6364 | ! %f14 = 00000000 000000ff, Mem[0000000010141400] = 000000ff 00000000 | |
6365 | stda %f14,[%i5+%g0]0x88 ! Mem[0000000010141400] = 00000000 000000ff | |
6366 | ! %f13 = 01a3a7b6, Mem[0000000030141400] = ffff0000 | |
6367 | sta %f13,[%i5+%g0]0x81 ! Mem[0000000030141400] = 01a3a7b6 | |
6368 | ! %l3 = 00000000000000ff, Mem[0000000010101402] = ff000000, %asi = 80 | |
6369 | stha %l3,[%i4+0x002]%asi ! Mem[0000000010101400] = ff0000ff | |
6370 | ! Starting 10 instruction Load Burst | |
6371 | ! Mem[0000000010001410] = ffffffff, %l7 = 0000000000000094 | |
6372 | lduha [%i0+%o5]0x80,%l7 ! %l7 = 000000000000ffff | |
6373 | ||
6374 | p0_label_155: | |
6375 | ! Mem[00000000300c1410] = 000000ff, %f6 = 00000000 | |
6376 | lda [%i3+%o5]0x89,%f6 ! %f6 = 000000ff | |
6377 | ! Mem[0000000030141410] = ffffffff, %l2 = 000000000000ffff | |
6378 | ldsha [%i5+%o5]0x81,%l2 ! %l2 = ffffffffffffffff | |
6379 | ! Mem[0000000021800000] = 000013a3, %l5 = 000000000000003d | |
6380 | ldsha [%o3+0x000]%asi,%l5 ! %l5 = 0000000000000000 | |
6381 | ! Mem[0000000010001410] = ffffffffc9ffffff, %l3 = 00000000000000ff | |
6382 | ldxa [%i0+%o5]0x80,%l3 ! %l3 = ffffffffc9ffffff | |
6383 | ! Mem[0000000010001410] = ffffffc9ffffffff, %l2 = ffffffffffffffff | |
6384 | ldxa [%i0+%o5]0x88,%l2 ! %l2 = ffffffc9ffffffff | |
6385 | ! Mem[0000000030181410] = ff0000ff, %l6 = 0000000000000000 | |
6386 | ldsba [%i6+%o5]0x89,%l6 ! %l6 = ffffffffffffffff | |
6387 | ! Mem[0000000030081410] = ff2e51ff00000000, %f26 = dfa6f0ed fcf85e66 | |
6388 | ldda [%i2+%o5]0x89,%f26 ! %f26 = ff2e51ff 00000000 | |
6389 | ! Mem[0000000010141400] = ff000000, %l0 = 000000006123c459 | |
6390 | lduha [%i5+%g0]0x80,%l0 ! %l0 = 000000000000ff00 | |
6391 | ! Mem[0000000010141400] = ff000000, %l7 = 000000000000ffff | |
6392 | ldswa [%i5+%g0]0x80,%l7 ! %l7 = ffffffffff000000 | |
6393 | ! Starting 10 instruction Store Burst | |
6394 | ! Mem[00000000300c1400] = feffffff, %l6 = ffffffffffffffff | |
6395 | ldstuba [%i3+%g0]0x81,%l6 ! %l6 = 000000fe000000ff | |
6396 | ||
6397 | ! Check Point 31 for processor 0 | |
6398 | ||
6399 | set p0_check_pt_data_31,%g4 | |
6400 | rd %ccr,%g5 ! %g5 = 44 | |
6401 | ldx [%g4+0x08],%g2 | |
6402 | cmp %l0,%g2 ! %l0 = 000000000000ff00 | |
6403 | bne %xcc,p0_reg_check_fail0 | |
6404 | mov 0xee0,%g1 | |
6405 | ldx [%g4+0x10],%g2 | |
6406 | cmp %l1,%g2 ! %l1 = feffffffff512e7a | |
6407 | bne %xcc,p0_reg_check_fail1 | |
6408 | mov 0xee1,%g1 | |
6409 | ldx [%g4+0x18],%g2 | |
6410 | cmp %l2,%g2 ! %l2 = ffffffc9ffffffff | |
6411 | bne %xcc,p0_reg_check_fail2 | |
6412 | mov 0xee2,%g1 | |
6413 | ldx [%g4+0x20],%g2 | |
6414 | cmp %l3,%g2 ! %l3 = ffffffffc9ffffff | |
6415 | bne %xcc,p0_reg_check_fail3 | |
6416 | mov 0xee3,%g1 | |
6417 | ldx [%g4+0x28],%g2 | |
6418 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
6419 | bne %xcc,p0_reg_check_fail4 | |
6420 | mov 0xee4,%g1 | |
6421 | ldx [%g4+0x30],%g2 | |
6422 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
6423 | bne %xcc,p0_reg_check_fail5 | |
6424 | mov 0xee5,%g1 | |
6425 | ldx [%g4+0x38],%g2 | |
6426 | cmp %l6,%g2 ! %l6 = 00000000000000fe | |
6427 | bne %xcc,p0_reg_check_fail6 | |
6428 | mov 0xee6,%g1 | |
6429 | ldx [%g4+0x40],%g2 | |
6430 | cmp %l7,%g2 ! %l7 = ffffffffff000000 | |
6431 | bne %xcc,p0_reg_check_fail7 | |
6432 | mov 0xee7,%g1 | |
6433 | ldx [%g4+0x48],%g3 | |
6434 | std %f0,[%g4] | |
6435 | ldx [%g4],%g2 | |
6436 | cmp %g3,%g2 ! %f0 = ff000000 000000ff | |
6437 | bne %xcc,p0_freg_check_fail | |
6438 | mov 0xf00,%g1 | |
6439 | ldx [%g4+0x50],%g3 | |
6440 | std %f6,[%g4] | |
6441 | ldx [%g4],%g2 | |
6442 | cmp %g3,%g2 ! %f6 = 000000ff 000000ff | |
6443 | bne %xcc,p0_freg_check_fail | |
6444 | mov 0xf06,%g1 | |
6445 | ldx [%g4+0x58],%g3 | |
6446 | std %f16,[%g4] | |
6447 | ldx [%g4],%g2 | |
6448 | cmp %g3,%g2 ! %f16 = 00000000 ff000000 | |
6449 | bne %xcc,p0_freg_check_fail | |
6450 | mov 0xf16,%g1 | |
6451 | ldx [%g4+0x60],%g3 | |
6452 | std %f26,[%g4] | |
6453 | ldx [%g4],%g2 | |
6454 | cmp %g3,%g2 ! %f26 = ff2e51ff 00000000 | |
6455 | bne %xcc,p0_freg_check_fail | |
6456 | mov 0xf26,%g1 | |
6457 | ldx [%g4+0x68],%g3 | |
6458 | std %f28,[%g4] | |
6459 | ldx [%g4],%g2 | |
6460 | cmp %g3,%g2 ! %f28 = 00000000 ff000000 | |
6461 | bne %xcc,p0_freg_check_fail | |
6462 | mov 0xf28,%g1 | |
6463 | ||
6464 | ! Check Point 31 completed | |
6465 | ||
6466 | ||
6467 | p0_label_156: | |
6468 | ! Mem[0000000010141424] = 00001d12, %l2 = ffffffc9ffffffff | |
6469 | swap [%i5+0x024],%l2 ! %l2 = 0000000000001d12 | |
6470 | ! Mem[0000000030041410] = 8dffff12, %l2 = 0000000000001d12 | |
6471 | swapa [%i1+%o5]0x89,%l2 ! %l2 = 000000008dffff12 | |
6472 | ! %l5 = 0000000000000000, Mem[0000000030041408] = 76c6c4d9 | |
6473 | stha %l5,[%i1+%o4]0x81 ! Mem[0000000030041408] = 0000c4d9 | |
6474 | ! %l4 = 00000000000000ff, Mem[0000000030081400] = fff0a6df | |
6475 | stba %l4,[%i2+%g0]0x89 ! Mem[0000000030081400] = fff0a6ff | |
6476 | ! %f30 = 000000ff, Mem[0000000010141400] = ff000000 | |
6477 | sta %f30,[%i5+%g0]0x80 ! Mem[0000000010141400] = 000000ff | |
6478 | ! %f25 = f8ffffff, Mem[0000000010181400] = 00000000 | |
6479 | sta %f25,[%i6+%g0]0x80 ! Mem[0000000010181400] = f8ffffff | |
6480 | ! Mem[0000000030141400] = 01a3a7b6, %l5 = 0000000000000000 | |
6481 | swapa [%i5+%g0]0x81,%l5 ! %l5 = 0000000001a3a7b6 | |
6482 | ! Mem[0000000021800041] = 55ff1df3, %l1 = feffffffff512e7a | |
6483 | ldstub [%o3+0x041],%l1 ! %l1 = 000000ff000000ff | |
6484 | ! Mem[0000000010081408] = ff000000, %l0 = 000000000000ff00 | |
6485 | ldstuba [%i2+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
6486 | ! Starting 10 instruction Load Burst | |
6487 | ! Mem[0000000010101408] = ffff0000, %f4 = 00001dff | |
6488 | lda [%i4+%o4]0x80,%f4 ! %f4 = ffff0000 | |
6489 | ||
6490 | p0_label_157: | |
6491 | ! Mem[0000000010141408] = ff0000ff c45f3d9f, %l2 = 8dffff12, %l3 = c9ffffff | |
6492 | ldda [%i5+%o4]0x80,%l2 ! %l2 = 00000000ff0000ff 00000000c45f3d9f | |
6493 | ! Mem[0000000010041408] = 00000000, %l3 = 00000000c45f3d9f | |
6494 | lduha [%i1+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
6495 | ! Mem[00000000300c1410] = ff000000, %l7 = ffffffffff000000 | |
6496 | lduha [%i3+%o5]0x81,%l7 ! %l7 = 000000000000ff00 | |
6497 | ! Mem[00000000300c1410] = ff0000007d307e94, %l0 = 0000000000000000 | |
6498 | ldxa [%i3+%o5]0x81,%l0 ! %l0 = ff0000007d307e94 | |
6499 | ! Mem[0000000010181424] = ff1dff00, %l5 = 0000000001a3a7b6 | |
6500 | ldswa [%i6+0x024]%asi,%l5 ! %l5 = ffffffffff1dff00 | |
6501 | ! Mem[0000000030081400] = fff0a6ff, %l1 = 00000000000000ff | |
6502 | lduha [%i2+%g0]0x89,%l1 ! %l1 = 000000000000a6ff | |
6503 | ! Mem[0000000020800000] = 2e7a8470, %l6 = 00000000000000fe | |
6504 | ldsha [%o1+0x000]%asi,%l6 ! %l6 = 0000000000002e7a | |
6505 | ! Mem[0000000010141410] = 190000ff, %l7 = 000000000000ff00 | |
6506 | lduha [%i5+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
6507 | ! Mem[00000000100c1410] = fffffff8, %l2 = 00000000ff0000ff | |
6508 | lduba [%i3+%o5]0x80,%l2 ! %l2 = 00000000000000ff | |
6509 | ! Starting 10 instruction Store Burst | |
6510 | ! %f0 = ff000000 000000ff, Mem[0000000010181410] = 0000ceff ffffffff | |
6511 | stda %f0 ,[%i6+%o5]0x88 ! Mem[0000000010181410] = ff000000 000000ff | |
6512 | ||
6513 | p0_label_158: | |
6514 | ! %l0 = ff0000007d307e94, Mem[0000000010101434] = 000099ff | |
6515 | stw %l0,[%i4+0x034] ! Mem[0000000010101434] = 7d307e94 | |
6516 | ! %l6 = 00002e7a, %l7 = 000000ff, Mem[0000000010001418] = ff5199ff 8dbf4312 | |
6517 | std %l6,[%i0+0x018] ! Mem[0000000010001418] = 00002e7a 000000ff | |
6518 | ! Mem[0000000030101400] = 000000ff, %l1 = 000000000000a6ff | |
6519 | swapa [%i4+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
6520 | ! Mem[0000000030181400] = ff000000, %l1 = 00000000000000ff | |
6521 | swapa [%i6+%g0]0x81,%l1 ! %l1 = 00000000ff000000 | |
6522 | ! Mem[0000000010101420] = 00000000665ef8fc, %l3 = 0000000000000000, %l1 = 00000000ff000000 | |
6523 | add %i4,0x20,%g1 | |
6524 | casxa [%g1]0x80,%l3,%l1 ! %l1 = 00000000665ef8fc | |
6525 | ! %l2 = 00000000000000ff, Mem[0000000010081410] = 7d307eff | |
6526 | stwa %l2,[%i2+%o5]0x88 ! Mem[0000000010081410] = 000000ff | |
6527 | ! %l3 = 0000000000000000, Mem[0000000030141410] = ffffffff | |
6528 | stha %l3,[%i5+%o5]0x81 ! Mem[0000000030141410] = 0000ffff | |
6529 | ! %f10 = 665ef8fc, Mem[0000000010041400] = 000000ff | |
6530 | sta %f10,[%i1+%g0]0x80 ! Mem[0000000010041400] = 665ef8fc | |
6531 | ! Mem[0000000010101400] = ff0000ff, %l7 = 00000000000000ff | |
6532 | ldstuba [%i4+%g0]0x88,%l7 ! %l7 = 000000ff000000ff | |
6533 | ! Starting 10 instruction Load Burst | |
6534 | ! Mem[00000000100c1410] = f8ffffff, %l2 = 00000000000000ff | |
6535 | lduwa [%i3+%o5]0x88,%l2 ! %l2 = 00000000f8ffffff | |
6536 | ||
6537 | p0_label_159: | |
6538 | ! Mem[00000000201c0000] = ff9f9457, %l5 = ffffffffff1dff00 | |
6539 | ldub [%o0+0x001],%l5 ! %l5 = 000000000000009f | |
6540 | ! Mem[0000000010001410] = ffffffc9ffffffff, %l1 = 00000000665ef8fc | |
6541 | ldxa [%i0+%o5]0x88,%l1 ! %l1 = ffffffc9ffffffff | |
6542 | ! Mem[0000000020800040] = f8fc7379, %l4 = 00000000000000ff | |
6543 | lduha [%o1+0x040]%asi,%l4 ! %l4 = 000000000000f8fc | |
6544 | ! Mem[0000000010081408] = 7d000000ff0000ff, %f16 = 00000000 ff000000 | |
6545 | ldda [%i2+%o4]0x88,%f16 ! %f16 = 7d000000 ff0000ff | |
6546 | ! Mem[0000000030081410] = ff2e51ff00000000, %l0 = ff0000007d307e94 | |
6547 | ldxa [%i2+%o5]0x89,%l0 ! %l0 = ff2e51ff00000000 | |
6548 | ! Mem[0000000010141408] = 9f3d5fc4 ff0000ff, %l6 = 00002e7a, %l7 = 000000ff | |
6549 | ldda [%i5+%o4]0x88,%l6 ! %l6 = 00000000ff0000ff 000000009f3d5fc4 | |
6550 | ! Mem[0000000030181400] = 000000ff, %l6 = 00000000ff0000ff | |
6551 | lduba [%i6+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
6552 | ! Mem[0000000010001410] = ffffffff, %l3 = 0000000000000000 | |
6553 | ldsba [%i0+%o5]0x88,%l3 ! %l3 = ffffffffffffffff | |
6554 | ! Mem[0000000010081410] = ff000000, %f1 = 000000ff | |
6555 | lda [%i2+%o5]0x80,%f1 ! %f1 = ff000000 | |
6556 | ! Starting 10 instruction Store Burst | |
6557 | ! %l0 = ff2e51ff00000000, Mem[0000000030041410] = 121d0000 | |
6558 | stha %l0,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000 | |
6559 | ||
6560 | p0_label_160: | |
6561 | ! %l6 = 00000000, %l7 = 9f3d5fc4, Mem[0000000030041400] = 124444cf 00000000 | |
6562 | stda %l6,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00000000 9f3d5fc4 | |
6563 | ! %f30 = 000000ff 0000ffff, Mem[0000000030001410] = 00000000 76c6c4fc | |
6564 | stda %f30,[%i0+%o5]0x81 ! Mem[0000000030001410] = 000000ff 0000ffff | |
6565 | ! %l2 = 00000000f8ffffff, Mem[0000000030001410] = ff000000 | |
6566 | stha %l2,[%i0+%o5]0x89 ! Mem[0000000030001410] = ff00ffff | |
6567 | ! Mem[0000000010181400] = f8ffffff, %l1 = ffffffc9ffffffff | |
6568 | lduha [%i6+%g0]0x80,%l1 ! %l1 = 000000000000f8ff | |
6569 | ! %f4 = ffff0000 8c8decca, %l7 = 000000009f3d5fc4 | |
6570 | ! Mem[0000000010001420] = 0000000000000000 | |
6571 | add %i0,0x020,%g1 | |
6572 | stda %f4,[%g1+%l7]ASI_PST8_P ! Mem[0000000010001420] = ffff0000008d0000 | |
6573 | ! Mem[0000000030001408] = fff0a6df, %l1 = 000000000000f8ff | |
6574 | swapa [%i0+%o4]0x81,%l1 ! %l1 = 00000000fff0a6df | |
6575 | ! %l2 = 00000000f8ffffff, Mem[0000000010081408] = ff0000ff | |
6576 | stha %l2,[%i2+%o4]0x80 ! Mem[0000000010081408] = ffff00ff | |
6577 | ! %l6 = 0000000000000000, Mem[0000000010101400] = ff0000ff000000ff | |
6578 | stxa %l6,[%i4+%g0]0x80 ! Mem[0000000010101400] = 0000000000000000 | |
6579 | ! Mem[0000000010141400] = ff000000, %l2 = 00000000f8ffffff | |
6580 | swapa [%i5+%g0]0x88,%l2 ! %l2 = 00000000ff000000 | |
6581 | ! Starting 10 instruction Load Burst | |
6582 | ! Mem[0000000010141410] = ff00001900f07a12, %f0 = ff000000 ff000000 | |
6583 | ldda [%i5+%o5]0x80,%f0 ! %f0 = ff000019 00f07a12 | |
6584 | ||
6585 | ! Check Point 32 for processor 0 | |
6586 | ||
6587 | set p0_check_pt_data_32,%g4 | |
6588 | rd %ccr,%g5 ! %g5 = 44 | |
6589 | ldx [%g4+0x08],%g2 | |
6590 | cmp %l0,%g2 ! %l0 = ff2e51ff00000000 | |
6591 | bne %xcc,p0_reg_check_fail0 | |
6592 | mov 0xee0,%g1 | |
6593 | ldx [%g4+0x10],%g2 | |
6594 | cmp %l1,%g2 ! %l1 = 00000000fff0a6df | |
6595 | bne %xcc,p0_reg_check_fail1 | |
6596 | mov 0xee1,%g1 | |
6597 | ldx [%g4+0x18],%g2 | |
6598 | cmp %l2,%g2 ! %l2 = 00000000ff000000 | |
6599 | bne %xcc,p0_reg_check_fail2 | |
6600 | mov 0xee2,%g1 | |
6601 | ldx [%g4+0x20],%g2 | |
6602 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
6603 | bne %xcc,p0_reg_check_fail3 | |
6604 | mov 0xee3,%g1 | |
6605 | ldx [%g4+0x28],%g2 | |
6606 | cmp %l4,%g2 ! %l4 = 000000000000f8fc | |
6607 | bne %xcc,p0_reg_check_fail4 | |
6608 | mov 0xee4,%g1 | |
6609 | ldx [%g4+0x30],%g2 | |
6610 | cmp %l5,%g2 ! %l5 = 000000000000009f | |
6611 | bne %xcc,p0_reg_check_fail5 | |
6612 | mov 0xee5,%g1 | |
6613 | ldx [%g4+0x38],%g2 | |
6614 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
6615 | bne %xcc,p0_reg_check_fail6 | |
6616 | mov 0xee6,%g1 | |
6617 | ldx [%g4+0x40],%g2 | |
6618 | cmp %l7,%g2 ! %l7 = 000000009f3d5fc4 | |
6619 | bne %xcc,p0_reg_check_fail7 | |
6620 | mov 0xee7,%g1 | |
6621 | ldx [%g4+0x48],%g3 | |
6622 | std %f0,[%g4] | |
6623 | ldx [%g4],%g2 | |
6624 | cmp %g3,%g2 ! %f0 = ff000019 00f07a12 | |
6625 | bne %xcc,p0_freg_check_fail | |
6626 | mov 0xf00,%g1 | |
6627 | ldx [%g4+0x50],%g3 | |
6628 | std %f2,[%g4] | |
6629 | ldx [%g4],%g2 | |
6630 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
6631 | bne %xcc,p0_freg_check_fail | |
6632 | mov 0xf02,%g1 | |
6633 | ldx [%g4+0x58],%g3 | |
6634 | std %f4,[%g4] | |
6635 | ldx [%g4],%g2 | |
6636 | cmp %g3,%g2 ! %f4 = ffff0000 8c8decca | |
6637 | bne %xcc,p0_freg_check_fail | |
6638 | mov 0xf04,%g1 | |
6639 | ldx [%g4+0x60],%g3 | |
6640 | std %f6,[%g4] | |
6641 | ldx [%g4],%g2 | |
6642 | cmp %g3,%g2 ! %f6 = 000000ff 000000ff | |
6643 | bne %xcc,p0_freg_check_fail | |
6644 | mov 0xf06,%g1 | |
6645 | ldx [%g4+0x68],%g3 | |
6646 | std %f16,[%g4] | |
6647 | ldx [%g4],%g2 | |
6648 | cmp %g3,%g2 ! %f16 = 7d000000 ff0000ff | |
6649 | bne %xcc,p0_freg_check_fail | |
6650 | mov 0xf16,%g1 | |
6651 | ||
6652 | ! Check Point 32 completed | |
6653 | ||
6654 | ||
6655 | p0_label_161: | |
6656 | ! Mem[0000000030001410] = ff00ffff, %l6 = 0000000000000000 | |
6657 | ldsba [%i0+%o5]0x89,%l6 ! %l6 = ffffffffffffffff | |
6658 | ! Mem[0000000030001408] = 00000000fff80000, %l5 = 000000000000009f | |
6659 | ldxa [%i0+%o4]0x89,%l5 ! %l5 = 00000000fff80000 | |
6660 | ! Mem[00000000100c1408] = 665ef8fc 00000000, %l2 = ff000000, %l3 = ffffffff | |
6661 | ldda [%i3+%o4]0x80,%l2 ! %l2 = 00000000665ef8fc 0000000000000000 | |
6662 | ! Mem[00000000100c1408] = 665ef8fc00000000, %l5 = 00000000fff80000 | |
6663 | ldxa [%i3+%o4]0x80,%l5 ! %l5 = 665ef8fc00000000 | |
6664 | ! Mem[0000000010001410] = ffffffff, %l6 = ffffffffffffffff | |
6665 | lduba [%i0+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
6666 | ! Mem[0000000030081408] = ff1d0000, %l7 = 000000009f3d5fc4 | |
6667 | ldswa [%i2+%o4]0x89,%l7 ! %l7 = ffffffffff1d0000 | |
6668 | ! Mem[0000000010181400] = f8ffffffffc4c676, %f4 = ffff0000 8c8decca | |
6669 | ldda [%i6+%g0]0x80,%f4 ! %f4 = f8ffffff ffc4c676 | |
6670 | ! Mem[0000000010041408] = 00000000, %l1 = 00000000fff0a6df | |
6671 | lduha [%i1+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
6672 | ! Mem[0000000030181410] = ff0000ff, %l6 = 00000000000000ff | |
6673 | ldswa [%i6+%o5]0x81,%l6 ! %l6 = ffffffffff0000ff | |
6674 | ! Starting 10 instruction Store Burst | |
6675 | ! %l1 = 0000000000000000, Mem[0000000010181408] = fffe0000 | |
6676 | sth %l1,[%i6+%o4] ! Mem[0000000010181408] = 00000000 | |
6677 | ||
6678 | p0_label_162: | |
6679 | ! %l0 = ff2e51ff00000000, Mem[0000000010101410] = 9c5199ff | |
6680 | stha %l0,[%i4+%o5]0x88 ! Mem[0000000010101410] = 9c510000 | |
6681 | ! Mem[0000000020800040] = f8fc7379, %l5 = 665ef8fc00000000 | |
6682 | ldstuba [%o1+0x040]%asi,%l5 ! %l5 = 000000f8000000ff | |
6683 | ! %l2 = 00000000665ef8fc, Mem[0000000030181410] = ff0000ff | |
6684 | stba %l2,[%i6+%o5]0x89 ! Mem[0000000030181410] = ff0000fc | |
6685 | ! %f0 = ff000019 00f07a12, Mem[0000000010081408] = ff00ffff 7d000000 | |
6686 | stda %f0 ,[%i2+%o4]0x88 ! Mem[0000000010081408] = ff000019 00f07a12 | |
6687 | ! Mem[0000000030041410] = 00000000, %l4 = 000000000000f8fc | |
6688 | swapa [%i1+%o5]0x81,%l4 ! %l4 = 0000000000000000 | |
6689 | ! Mem[0000000030001408] = 0000f8ff, %l0 = ff2e51ff00000000 | |
6690 | swapa [%i0+%o4]0x81,%l0 ! %l0 = 000000000000f8ff | |
6691 | ! %l1 = 0000000000000000, Mem[0000000010041436] = 24000000, %asi = 80 | |
6692 | stha %l1,[%i1+0x036]%asi ! Mem[0000000010041434] = 24000000 | |
6693 | ! %f26 = ff2e51ff 00000000, %l0 = 000000000000f8ff | |
6694 | ! Mem[0000000010181428] = a196f1ffdfa6f0ff | |
6695 | add %i6,0x028,%g1 | |
6696 | stda %f26,[%g1+%l0]ASI_PST8_P ! Mem[0000000010181428] = ff2e51ff00000000 | |
6697 | ! %f20 = 00000000 7d307e94, %l5 = 00000000000000f8 | |
6698 | ! Mem[0000000010041418] = ca2bda9064b3e323 | |
6699 | add %i1,0x018,%g1 | |
6700 | stda %f20,[%g1+%l5]ASI_PST16_P ! Mem[0000000010041418] = 0000da9064b3e323 | |
6701 | ! Starting 10 instruction Load Burst | |
6702 | ! Mem[0000000020800000] = 2e7a8470, %l5 = 00000000000000f8 | |
6703 | ldsha [%o1+0x000]%asi,%l5 ! %l5 = 0000000000002e7a | |
6704 | ||
6705 | p0_label_163: | |
6706 | ! Mem[0000000030041408] = d9c40000, %l4 = 0000000000000000 | |
6707 | ldswa [%i1+%o4]0x89,%l4 ! %l4 = ffffffffd9c40000 | |
6708 | ! Mem[0000000030181410] = fc0000ff, %l4 = ffffffffd9c40000 | |
6709 | ldsha [%i6+%o5]0x81,%l4 ! %l4 = fffffffffffffc00 | |
6710 | ! Mem[0000000010141410] = 190000ff, %l0 = 000000000000f8ff | |
6711 | lduha [%i5+%o5]0x88,%l0 ! %l0 = 00000000000000ff | |
6712 | ! Mem[0000000010101400] = 00000000, %l0 = 00000000000000ff | |
6713 | lduwa [%i4+0x000]%asi,%l0 ! %l0 = 0000000000000000 | |
6714 | ! Mem[0000000010181410] = 000000ff, %l6 = ffffffffff0000ff | |
6715 | ldswa [%i6+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
6716 | ! Mem[0000000030181400] = 000000ff, %l5 = 0000000000002e7a | |
6717 | ldsha [%i6+%g0]0x81,%l5 ! %l5 = 0000000000000000 | |
6718 | ! Mem[00000000201c0000] = ff9f9457, %l2 = 00000000665ef8fc | |
6719 | ldsb [%o0+0x001],%l2 ! %l2 = ffffffffffffff9f | |
6720 | ! Mem[0000000010101408] = ffff0000ff000000, %f2 = 00000000 00000000 | |
6721 | ldda [%i4+%o4]0x80,%f2 ! %f2 = ffff0000 ff000000 | |
6722 | ! Mem[0000000030141408] = 0b931a2a, %l0 = 0000000000000000 | |
6723 | lduha [%i5+%o4]0x89,%l0 ! %l0 = 0000000000001a2a | |
6724 | ! Starting 10 instruction Store Burst | |
6725 | ! %l4 = fffffffffffffc00, Mem[0000000010041408] = 00000000 | |
6726 | stwa %l4,[%i1+%o4]0x80 ! Mem[0000000010041408] = fffffc00 | |
6727 | ||
6728 | p0_label_164: | |
6729 | ! Mem[00000000300c1400] = ffffffff, %l3 = 0000000000000000 | |
6730 | ldstuba [%i3+%g0]0x81,%l3 ! %l3 = 000000ff000000ff | |
6731 | ! Mem[0000000010101408] = ffff0000, %l0 = 0000000000001a2a | |
6732 | ldstuba [%i4+%o4]0x80,%l0 ! %l0 = 000000ff000000ff | |
6733 | ! %l3 = 00000000000000ff, Mem[0000000030181400] = 000000ff | |
6734 | stha %l3,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00ff00ff | |
6735 | ! Mem[0000000010141408] = ff0000ff, %l1 = 0000000000000000 | |
6736 | ldstuba [%i5+%o4]0x88,%l1 ! %l1 = 000000ff000000ff | |
6737 | ! Mem[00000000100c1408] = 665ef8fc, %l3 = 00000000000000ff | |
6738 | swapa [%i3+%o4]0x80,%l3 ! %l3 = 00000000665ef8fc | |
6739 | ! Mem[0000000030081408] = 00001dff, %l6 = 00000000000000ff | |
6740 | swapa [%i2+%o4]0x81,%l6 ! %l6 = 0000000000001dff | |
6741 | ! Mem[0000000030001408] = 00000000, %l2 = ffffffffffffff9f | |
6742 | swapa [%i0+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
6743 | ! %l0 = 000000ff, %l1 = 000000ff, Mem[0000000010101408] = ffff0000 ff000000 | |
6744 | std %l0,[%i4+%o4] ! Mem[0000000010101408] = 000000ff 000000ff | |
6745 | ! %f8 = edf0a6df 12ff76c9, %l3 = 00000000665ef8fc | |
6746 | ! Mem[0000000030041410] = 0000f8fcffffffff | |
6747 | add %i1,0x010,%g1 | |
6748 | stda %f8,[%g1+%l3]ASI_PST8_S ! Mem[0000000030041410] = edf0a6df12ffffff | |
6749 | ! Starting 10 instruction Load Burst | |
6750 | ! Mem[0000000030101400] = ffa60000ffce0000, %f6 = 000000ff 000000ff | |
6751 | ldda [%i4+%g0]0x81,%f6 ! %f6 = ffa60000 ffce0000 | |
6752 | ||
6753 | p0_label_165: | |
6754 | ! Code Fragment 4 | |
6755 | p0_fragment_8: | |
6756 | ! %l0 = 00000000000000ff | |
6757 | setx 0xb17d460ff4850b65,%g7,%l0 ! %l0 = b17d460ff4850b65 | |
6758 | ! %l1 = 00000000000000ff | |
6759 | setx 0x67e5630fa00d41f8,%g7,%l1 ! %l1 = 67e5630fa00d41f8 | |
6760 | setx 0x7ff8, %g1, %g2 | |
6761 | and %l0, %g2, %l0 | |
6762 | setx 0xffffffff, %g1, %g2 | |
6763 | and %l1, %g2, %l1 | |
6764 | setx 0x100000000, %g1, %g2 | |
6765 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
6766 | ta T_CHANGE_HPRIV | |
6767 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
6768 | ta T_CHANGE_NONHPRIV | |
6769 | ! %l0 = b17d460ff4850b65 | |
6770 | setx 0xc038b31053c69e7c,%g7,%l0 ! %l0 = c038b31053c69e7c | |
6771 | ! %l1 = 67e5630fa00d41f8 | |
6772 | setx 0xc4e787c787975e86,%g7,%l1 ! %l1 = c4e787c787975e86 | |
6773 | ! Mem[000000001008140c] = 190000ff, %f15 = 000000ff | |
6774 | ld [%i2+0x00c],%f15 ! %f15 = 190000ff | |
6775 | ! Mem[0000000020800040] = fffc7379, %l5 = 0000000000000000 | |
6776 | ldsha [%o1+0x040]%asi,%l5 ! %l5 = fffffffffffffffc | |
6777 | ! Mem[00000000100c1438] = 022d96f8d6ba79b1, %l4 = fffffffffffffc00 | |
6778 | ldxa [%i3+0x038]%asi,%l4 ! %l4 = 022d96f8d6ba79b1 | |
6779 | ! Mem[00000000100c1400] = 0000ffff, %l6 = 0000000000001dff | |
6780 | ldsba [%i3+%g0]0x88,%l6 ! %l6 = ffffffffffffffff | |
6781 | ! Mem[0000000010101408] = 000000ff, %l2 = 0000000000000000 | |
6782 | lduwa [%i4+%o4]0x80,%l2 ! %l2 = 00000000000000ff | |
6783 | ! Mem[0000000030081400] = fff0a6ff, %l6 = ffffffffffffffff | |
6784 | ldsba [%i2+%g0]0x89,%l6 ! %l6 = ffffffffffffffff | |
6785 | ! Mem[0000000010101410] = 0000519c, %l3 = 00000000665ef8fc | |
6786 | lduwa [%i4+0x010]%asi,%l3 ! %l3 = 000000000000519c | |
6787 | ! Mem[0000000010181408] = 00000000, %l7 = ffffffffff1d0000 | |
6788 | lduha [%i6+%o4]0x88,%l7 ! %l7 = 0000000000000000 | |
6789 | ! Starting 10 instruction Store Burst | |
6790 | ! Mem[0000000010081400] = 00000000, %l3 = 000000000000519c | |
6791 | swapa [%i2+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
6792 | ||
6793 | ! Check Point 33 for processor 0 | |
6794 | ||
6795 | set p0_check_pt_data_33,%g4 | |
6796 | rd %ccr,%g5 ! %g5 = 44 | |
6797 | ldx [%g4+0x08],%g2 | |
6798 | cmp %l0,%g2 ! %l0 = c038b31053c69e7c | |
6799 | bne %xcc,p0_reg_check_fail0 | |
6800 | mov 0xee0,%g1 | |
6801 | ldx [%g4+0x10],%g2 | |
6802 | cmp %l1,%g2 ! %l1 = c4e787c787975e86 | |
6803 | bne %xcc,p0_reg_check_fail1 | |
6804 | mov 0xee1,%g1 | |
6805 | ldx [%g4+0x18],%g2 | |
6806 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
6807 | bne %xcc,p0_reg_check_fail2 | |
6808 | mov 0xee2,%g1 | |
6809 | ldx [%g4+0x20],%g2 | |
6810 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
6811 | bne %xcc,p0_reg_check_fail3 | |
6812 | mov 0xee3,%g1 | |
6813 | ldx [%g4+0x28],%g2 | |
6814 | cmp %l4,%g2 ! %l4 = 022d96f8d6ba79b1 | |
6815 | bne %xcc,p0_reg_check_fail4 | |
6816 | mov 0xee4,%g1 | |
6817 | ldx [%g4+0x30],%g2 | |
6818 | cmp %l5,%g2 ! %l5 = fffffffffffffffc | |
6819 | bne %xcc,p0_reg_check_fail5 | |
6820 | mov 0xee5,%g1 | |
6821 | ldx [%g4+0x38],%g2 | |
6822 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
6823 | bne %xcc,p0_reg_check_fail6 | |
6824 | mov 0xee6,%g1 | |
6825 | ldx [%g4+0x40],%g2 | |
6826 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
6827 | bne %xcc,p0_reg_check_fail7 | |
6828 | mov 0xee7,%g1 | |
6829 | ldx [%g4+0x48],%g3 | |
6830 | std %f2,[%g4] | |
6831 | ldx [%g4],%g2 | |
6832 | cmp %g3,%g2 ! %f2 = ffff0000 ff000000 | |
6833 | bne %xcc,p0_freg_check_fail | |
6834 | mov 0xf02,%g1 | |
6835 | ldx [%g4+0x50],%g3 | |
6836 | std %f4,[%g4] | |
6837 | ldx [%g4],%g2 | |
6838 | cmp %g3,%g2 ! %f4 = f8ffffff ffc4c676 | |
6839 | bne %xcc,p0_freg_check_fail | |
6840 | mov 0xf04,%g1 | |
6841 | ldx [%g4+0x58],%g3 | |
6842 | std %f6,[%g4] | |
6843 | ldx [%g4],%g2 | |
6844 | cmp %g3,%g2 ! %f6 = ffa60000 ffce0000 | |
6845 | bne %xcc,p0_freg_check_fail | |
6846 | mov 0xf06,%g1 | |
6847 | ldx [%g4+0x60],%g3 | |
6848 | std %f14,[%g4] | |
6849 | ldx [%g4],%g2 | |
6850 | cmp %g3,%g2 ! %f14 = 00000000 190000ff | |
6851 | bne %xcc,p0_freg_check_fail | |
6852 | mov 0xf14,%g1 | |
6853 | ||
6854 | ! Check Point 33 completed | |
6855 | ||
6856 | ||
6857 | p0_label_166: | |
6858 | ! %f18 = 7d000000 1f41c676, Mem[0000000030041400] = 00000000 c45f3d9f | |
6859 | stda %f18,[%i1+%g0]0x81 ! Mem[0000000030041400] = 7d000000 1f41c676 | |
6860 | ! %f26 = ff2e51ff 00000000, %l4 = 022d96f8d6ba79b1 | |
6861 | ! Mem[0000000010181428] = ff2e51ff00000000 | |
6862 | add %i6,0x028,%g1 | |
6863 | stda %f26,[%g1+%l4]ASI_PST8_PL ! Mem[0000000010181428] = 002e51ffff5100ff | |
6864 | ! %l4 = 022d96f8d6ba79b1, Mem[00000000201c0000] = ff9f9457 | |
6865 | sth %l4,[%o0+%g0] ! Mem[00000000201c0000] = 79b19457 | |
6866 | ! %l5 = fffffffffffffffc, Mem[0000000010181408] = 000000007e42feff | |
6867 | stxa %l5,[%i6+%o4]0x80 ! Mem[0000000010181408] = fffffffffffffffc | |
6868 | ! %l4 = 022d96f8d6ba79b1, Mem[00000000201c0000] = 79b19457, %asi = 80 | |
6869 | stba %l4,[%o0+0x000]%asi ! Mem[00000000201c0000] = b1b19457 | |
6870 | ! Mem[0000000010081400] = 9c510000, %l2 = 00000000000000ff | |
6871 | ldstuba [%i2+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
6872 | ! %f10 = 665ef8fc, Mem[0000000010081424] = 000000ff | |
6873 | sta %f10,[%i2+0x024]%asi ! Mem[0000000010081424] = 665ef8fc | |
6874 | ! Mem[00000000300c1408] = 0000007d, %l6 = ffffffffffffffff | |
6875 | ldstuba [%i3+%o4]0x89,%l6 ! %l6 = 0000007d000000ff | |
6876 | ! Mem[00000000100c1408] = 000000ff, %l3 = 0000000000000000 | |
6877 | swapa [%i3+%o4]0x80,%l3 ! %l3 = 00000000000000ff | |
6878 | ! Starting 10 instruction Load Burst | |
6879 | ! Mem[00000000300c1410] = 000000ff, %f0 = ff000019 | |
6880 | lda [%i3+%o5]0x89,%f0 ! %f0 = 000000ff | |
6881 | ||
6882 | p0_label_167: | |
6883 | ! Mem[000000001008141c] = 000000fc, %l7 = 0000000000000000 | |
6884 | ldsb [%i2+0x01f],%l7 ! %l7 = fffffffffffffffc | |
6885 | ! Mem[0000000010001400] = 00000000, %l0 = c038b31053c69e7c | |
6886 | lduha [%i0+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
6887 | ! Mem[0000000030081410] = 00000000, %l1 = c4e787c787975e86 | |
6888 | lduha [%i2+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
6889 | ! Mem[0000000010041410] = dfa6f0edfcf85e66, %f24 = bf000000 f8ffffff | |
6890 | ldda [%i1+0x010]%asi,%f24 ! %f24 = dfa6f0ed fcf85e66 | |
6891 | ! Mem[0000000010041420] = 1f41c6762164159c, %f14 = 00000000 190000ff | |
6892 | ldda [%i1+0x020]%asi,%f14 ! %f14 = 1f41c676 2164159c | |
6893 | ! Mem[0000000010141410] = 190000ff, %l1 = 0000000000000000 | |
6894 | lduwa [%i5+%o5]0x88,%l1 ! %l1 = 00000000190000ff | |
6895 | ! Mem[00000000100c1408] = 00000000, %f0 = 000000ff | |
6896 | ld [%i3+%o4],%f0 ! %f0 = 00000000 | |
6897 | ! Mem[0000000010041410] = edf0a6df, %l6 = 000000000000007d | |
6898 | ldsha [%i1+%o5]0x88,%l6 ! %l6 = ffffffffffffa6df | |
6899 | ! Mem[00000000100c1414] = 000000bf, %l6 = ffffffffffffa6df | |
6900 | ldswa [%i3+0x014]%asi,%l6 ! %l6 = 00000000000000bf | |
6901 | ! Starting 10 instruction Store Burst | |
6902 | ! %l6 = 00000000000000bf, Mem[0000000030141410] = 0000ffffffffffff | |
6903 | stxa %l6,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000000000bf | |
6904 | ||
6905 | p0_label_168: | |
6906 | ! %l4 = 022d96f8d6ba79b1, Mem[0000000010081408] = ff00001900f07a12 | |
6907 | stxa %l4,[%i2+%o4]0x88 ! Mem[0000000010081408] = 022d96f8d6ba79b1 | |
6908 | ! %l7 = fffffffffffffffc, Mem[00000000211c0000] = feff1a4c | |
6909 | sth %l7,[%o2+%g0] ! Mem[00000000211c0000] = fffc1a4c | |
6910 | ! %l0 = 0000000000000000, Mem[0000000030001410] = ff00ffff | |
6911 | stwa %l0,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00000000 | |
6912 | ! %f31 = 0000ffff, Mem[00000000100c1410] = fffffff8 | |
6913 | sta %f31,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 0000ffff | |
6914 | ! Mem[0000000010141408] = ff0000ff, %l5 = fffffffffffffffc | |
6915 | swapa [%i5+%o4]0x88,%l5 ! %l5 = 00000000ff0000ff | |
6916 | ! %f25 = fcf85e66, Mem[0000000010001400] = 00000000 | |
6917 | sta %f25,[%i0+%g0]0x88 ! Mem[0000000010001400] = fcf85e66 | |
6918 | ! %l1 = 00000000190000ff, Mem[0000000030041400] = 7d000000 | |
6919 | stba %l1,[%i1+%g0]0x81 ! Mem[0000000030041400] = ff000000 | |
6920 | ! %l3 = 00000000000000ff, Mem[00000000201c0000] = b1b19457 | |
6921 | stb %l3,[%o0+%g0] ! Mem[00000000201c0000] = ffb19457 | |
6922 | ! %l5 = 00000000ff0000ff, Mem[00000000201c0000] = ffb19457 | |
6923 | sth %l5,[%o0+%g0] ! Mem[00000000201c0000] = 00ff9457 | |
6924 | ! Starting 10 instruction Load Burst | |
6925 | ! Mem[0000000010141410] = ff000019, %l5 = 00000000ff0000ff | |
6926 | ldsha [%i5+%o5]0x80,%l5 ! %l5 = ffffffffffffff00 | |
6927 | ||
6928 | p0_label_169: | |
6929 | ! Mem[0000000030181408] = 000000ff, %l2 = 0000000000000000 | |
6930 | ldswa [%i6+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
6931 | ! Mem[0000000030081410] = 00000000, %l3 = 00000000000000ff | |
6932 | lduba [%i2+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
6933 | ! Mem[00000000100c1408] = 00000000, %l5 = ffffffffffffff00 | |
6934 | lduha [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
6935 | ! Mem[00000000300c1400] = ffffffff, %l0 = 0000000000000000 | |
6936 | ldsha [%i3+%g0]0x89,%l0 ! %l0 = ffffffffffffffff | |
6937 | ! Mem[0000000010181408] = ffffffff, %l2 = 00000000000000ff | |
6938 | lduha [%i6+%o4]0x80,%l2 ! %l2 = 000000000000ffff | |
6939 | ! Mem[0000000010141428] = 4e239aff, %f2 = ffff0000 | |
6940 | lda [%i5+0x028]%asi,%f2 ! %f2 = 4e239aff | |
6941 | ! Mem[0000000010181400] = f8ffffff, %f19 = 1f41c676 | |
6942 | lda [%i6+%g0]0x80,%f19 ! %f19 = f8ffffff | |
6943 | ! Mem[0000000030141400] = 00000000, %l0 = ffffffffffffffff | |
6944 | ldsba [%i5+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
6945 | ! Mem[00000000300c1408] = ff000000ff000000, %l1 = 00000000190000ff | |
6946 | ldxa [%i3+%o4]0x81,%l1 ! %l1 = ff000000ff000000 | |
6947 | ! Starting 10 instruction Store Burst | |
6948 | ! %f8 = edf0a6df 12ff76c9, Mem[0000000030001408] = 9fffffff 00000000 | |
6949 | stda %f8 ,[%i0+%o4]0x81 ! Mem[0000000030001408] = edf0a6df 12ff76c9 | |
6950 | ||
6951 | p0_label_170: | |
6952 | ! Mem[00000000300c1408] = 000000ff, %l5 = 0000000000000000 | |
6953 | ldstuba [%i3+%o4]0x89,%l5 ! %l5 = 000000ff000000ff | |
6954 | ! Mem[0000000010041418] = 0000da90, %l5 = 00000000000000ff | |
6955 | swap [%i1+0x018],%l5 ! %l5 = 000000000000da90 | |
6956 | ! Mem[0000000010181410] = ff000000, %l4 = 022d96f8d6ba79b1 | |
6957 | swapa [%i6+%o5]0x80,%l4 ! %l4 = 00000000ff000000 | |
6958 | ! Mem[0000000010141400] = fffffff8, %l4 = 00000000ff000000 | |
6959 | ldstuba [%i5+%g0]0x80,%l4 ! %l4 = 000000ff000000ff | |
6960 | ! %f18 = 7d000000 f8ffffff, %l2 = 000000000000ffff | |
6961 | ! Mem[0000000030181418] = fd5ec03121af2f00 | |
6962 | add %i6,0x018,%g1 | |
6963 | stda %f18,[%g1+%l2]ASI_PST32_SL ! Mem[0000000030181418] = fffffff80000007d | |
6964 | ! %l1 = ff000000ff000000, Mem[0000000010141408] = fffffffc | |
6965 | stha %l1,[%i5+%o4]0x88 ! Mem[0000000010141408] = ffff0000 | |
6966 | ! %l0 = 0000000000000000, Mem[0000000010141410] = ff000019 | |
6967 | stha %l0,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00000019 | |
6968 | ! Mem[0000000010041418] = 000000ff64b3e323, %l1 = ff000000ff000000, %l3 = 0000000000000000 | |
6969 | add %i1,0x18,%g1 | |
6970 | casxa [%g1]0x80,%l1,%l3 ! %l3 = 000000ff64b3e323 | |
6971 | ! %l1 = ff000000ff000000, Mem[0000000030181410] = fc0000ff00000000 | |
6972 | stxa %l1,[%i6+%o5]0x81 ! Mem[0000000030181410] = ff000000ff000000 | |
6973 | ! Starting 10 instruction Load Burst | |
6974 | ! Mem[0000000030181410] = ff000000ff000000, %f4 = f8ffffff ffc4c676 | |
6975 | ldda [%i6+%o5]0x81,%f4 ! %f4 = ff000000 ff000000 | |
6976 | ||
6977 | ! Check Point 34 for processor 0 | |
6978 | ||
6979 | set p0_check_pt_data_34,%g4 | |
6980 | rd %ccr,%g5 ! %g5 = 44 | |
6981 | ldx [%g4+0x08],%g2 | |
6982 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
6983 | bne %xcc,p0_reg_check_fail0 | |
6984 | mov 0xee0,%g1 | |
6985 | ldx [%g4+0x10],%g2 | |
6986 | cmp %l1,%g2 ! %l1 = ff000000ff000000 | |
6987 | bne %xcc,p0_reg_check_fail1 | |
6988 | mov 0xee1,%g1 | |
6989 | ldx [%g4+0x18],%g2 | |
6990 | cmp %l2,%g2 ! %l2 = 000000000000ffff | |
6991 | bne %xcc,p0_reg_check_fail2 | |
6992 | mov 0xee2,%g1 | |
6993 | ldx [%g4+0x20],%g2 | |
6994 | cmp %l3,%g2 ! %l3 = 000000ff64b3e323 | |
6995 | bne %xcc,p0_reg_check_fail3 | |
6996 | mov 0xee3,%g1 | |
6997 | ldx [%g4+0x28],%g2 | |
6998 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
6999 | bne %xcc,p0_reg_check_fail4 | |
7000 | mov 0xee4,%g1 | |
7001 | ldx [%g4+0x30],%g2 | |
7002 | cmp %l5,%g2 ! %l5 = 000000000000da90 | |
7003 | bne %xcc,p0_reg_check_fail5 | |
7004 | mov 0xee5,%g1 | |
7005 | ldx [%g4+0x38],%g2 | |
7006 | cmp %l6,%g2 ! %l6 = 00000000000000bf | |
7007 | bne %xcc,p0_reg_check_fail6 | |
7008 | mov 0xee6,%g1 | |
7009 | ldx [%g4+0x40],%g2 | |
7010 | cmp %l7,%g2 ! %l7 = fffffffffffffffc | |
7011 | bne %xcc,p0_reg_check_fail7 | |
7012 | mov 0xee7,%g1 | |
7013 | ldx [%g4+0x48],%g3 | |
7014 | std %f0,[%g4] | |
7015 | ldx [%g4],%g2 | |
7016 | cmp %g3,%g2 ! %f0 = 00000000 00f07a12 | |
7017 | bne %xcc,p0_freg_check_fail | |
7018 | mov 0xf00,%g1 | |
7019 | ldx [%g4+0x50],%g3 | |
7020 | std %f2,[%g4] | |
7021 | ldx [%g4],%g2 | |
7022 | cmp %g3,%g2 ! %f2 = 4e239aff ff000000 | |
7023 | bne %xcc,p0_freg_check_fail | |
7024 | mov 0xf02,%g1 | |
7025 | ldx [%g4+0x58],%g3 | |
7026 | std %f4,[%g4] | |
7027 | ldx [%g4],%g2 | |
7028 | cmp %g3,%g2 ! %f4 = ff000000 ff000000 | |
7029 | bne %xcc,p0_freg_check_fail | |
7030 | mov 0xf04,%g1 | |
7031 | ldx [%g4+0x60],%g3 | |
7032 | std %f14,[%g4] | |
7033 | ldx [%g4],%g2 | |
7034 | cmp %g3,%g2 ! %f14 = 1f41c676 2164159c | |
7035 | bne %xcc,p0_freg_check_fail | |
7036 | mov 0xf14,%g1 | |
7037 | ldx [%g4+0x68],%g3 | |
7038 | std %f18,[%g4] | |
7039 | ldx [%g4],%g2 | |
7040 | cmp %g3,%g2 ! %f18 = 7d000000 f8ffffff | |
7041 | bne %xcc,p0_freg_check_fail | |
7042 | mov 0xf18,%g1 | |
7043 | ldx [%g4+0x70],%g3 | |
7044 | std %f24,[%g4] | |
7045 | ldx [%g4],%g2 | |
7046 | cmp %g3,%g2 ! %f24 = dfa6f0ed fcf85e66 | |
7047 | bne %xcc,p0_freg_check_fail | |
7048 | mov 0xf24,%g1 | |
7049 | ||
7050 | ! Check Point 34 completed | |
7051 | ||
7052 | ||
7053 | p0_label_171: | |
7054 | ! Mem[0000000030081408] = fff0a6df ff000000, %l2 = 0000ffff, %l3 = 64b3e323 | |
7055 | ldda [%i2+%o4]0x89,%l2 ! %l2 = 00000000ff000000 00000000fff0a6df | |
7056 | ! Mem[00000000100c1408] = 00000000, %l6 = 00000000000000bf | |
7057 | lduba [%i3+%o4]0x80,%l6 ! %l6 = 0000000000000000 | |
7058 | ! Mem[00000000100c1408] = 00000000, %l2 = 00000000ff000000 | |
7059 | lduha [%i3+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
7060 | ! Mem[0000000010001410] = ffffffc9ffffffff, %f0 = 00000000 00f07a12 | |
7061 | ldda [%i0+%o5]0x88,%f0 ! %f0 = ffffffc9 ffffffff | |
7062 | ! Mem[0000000030041410] = dfa6f0ed, %l1 = ff000000ff000000 | |
7063 | ldsha [%i1+%o5]0x89,%l1 ! %l1 = fffffffffffff0ed | |
7064 | ! Mem[0000000030041408] = d9c40000, %l5 = 000000000000da90 | |
7065 | ldswa [%i1+%o4]0x89,%l5 ! %l5 = ffffffffd9c40000 | |
7066 | ! Mem[0000000030001408] = edf0a6df, %l6 = 0000000000000000 | |
7067 | ldsba [%i0+%o4]0x81,%l6 ! %l6 = ffffffffffffffed | |
7068 | ! Mem[0000000010181408] = ffffffff, %l5 = ffffffffd9c40000 | |
7069 | lduwa [%i6+%o4]0x80,%l5 ! %l5 = 00000000ffffffff | |
7070 | ! Mem[00000000100c1408] = 00000000, %l0 = 0000000000000000 | |
7071 | ldsha [%i3+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
7072 | ! Starting 10 instruction Store Burst | |
7073 | ! %f26 = ff2e51ff 00000000, %l7 = fffffffffffffffc | |
7074 | ! Mem[0000000030001428] = 5d57d4e03d61d89c | |
7075 | add %i0,0x028,%g1 | |
7076 | stda %f26,[%g1+%l7]ASI_PST32_SL ! Mem[0000000030001428] = 5d57d4e03d61d89c | |
7077 | ||
7078 | p0_label_172: | |
7079 | ! Mem[00000000100c1408] = 0000000000000000, %l5 = 00000000ffffffff, %l3 = 00000000fff0a6df | |
7080 | add %i3,0x08,%g1 | |
7081 | casxa [%g1]0x80,%l5,%l3 ! %l3 = 0000000000000000 | |
7082 | ! %l0 = 0000000000000000, Mem[00000000300c1400] = ffffffff | |
7083 | stwa %l0,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 00000000 | |
7084 | ! %f14 = 1f41c676, Mem[0000000030101400] = 0000a6ff | |
7085 | sta %f14,[%i4+%g0]0x89 ! Mem[0000000030101400] = 1f41c676 | |
7086 | ! %l4 = 00000000000000ff, Mem[0000000030081400] = ffa6f0ff00000000 | |
7087 | stxa %l4,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000000000000ff | |
7088 | ! Mem[0000000010081404] = 000000fc, %l7 = fffffffffffffffc, %asi = 80 | |
7089 | swapa [%i2+0x004]%asi,%l7 ! %l7 = 00000000000000fc | |
7090 | ! %f9 = 12ff76c9, Mem[0000000030141410] = 00000000 | |
7091 | sta %f9 ,[%i5+%o5]0x81 ! Mem[0000000030141410] = 12ff76c9 | |
7092 | ! %l4 = 000000ff, %l5 = ffffffff, Mem[0000000010041408] = fffffc00 dfa6f0ff | |
7093 | stda %l4,[%i1+%o4]0x80 ! Mem[0000000010041408] = 000000ff ffffffff | |
7094 | ! Mem[00000000211c0000] = fffc1a4c, %l6 = ffffffffffffffed | |
7095 | ldstub [%o2+%g0],%l6 ! %l6 = 000000ff000000ff | |
7096 | ! %f17 = ff0000ff, Mem[0000000030181408] = ff000000 | |
7097 | sta %f17,[%i6+%o4]0x81 ! Mem[0000000030181408] = ff0000ff | |
7098 | ! Starting 10 instruction Load Burst | |
7099 | ! Mem[0000000030001400] = ffffff00, %l6 = 00000000000000ff | |
7100 | lduwa [%i0+%g0]0x81,%l6 ! %l6 = 00000000ffffff00 | |
7101 | ||
7102 | p0_label_173: | |
7103 | ! Mem[0000000010181400] = 76c6c4fffffffff8, %l2 = 0000000000000000 | |
7104 | ldxa [%i6+%g0]0x88,%l2 ! %l2 = 76c6c4fffffffff8 | |
7105 | ! Mem[0000000030081410] = 00000000, %l0 = 0000000000000000 | |
7106 | lduwa [%i2+%o5]0x89,%l0 ! %l0 = 0000000000000000 | |
7107 | ! Mem[0000000030041400] = 76c6411f000000ff, %l0 = 0000000000000000 | |
7108 | ldxa [%i1+%g0]0x89,%l0 ! %l0 = 76c6411f000000ff | |
7109 | ! Mem[00000000100c1408] = 00000000, %l1 = fffffffffffff0ed | |
7110 | lduwa [%i3+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
7111 | ! Mem[0000000030141408] = ff0000000b931a2a, %l4 = 00000000000000ff | |
7112 | ldxa [%i5+%o4]0x89,%l4 ! %l4 = ff0000000b931a2a | |
7113 | ! Mem[00000000100c1434] = 10710795, %l7 = 00000000000000fc | |
7114 | ldswa [%i3+0x034]%asi,%l7 ! %l7 = 0000000010710795 | |
7115 | ! Mem[00000000100c1400] = db7e6dd7 0000ffff, %l0 = 000000ff, %l1 = 00000000 | |
7116 | ldda [%i3+%g0]0x88,%l0 ! %l0 = 000000000000ffff 00000000db7e6dd7 | |
7117 | ! Mem[0000000010101410] = 9c510000, %l3 = 0000000000000000 | |
7118 | ldsba [%i4+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
7119 | ! Mem[0000000010041410] = 665ef8fc edf0a6df, %l6 = ffffff00, %l7 = 10710795 | |
7120 | ldda [%i1+%o5]0x88,%l6 ! %l6 = 00000000edf0a6df 00000000665ef8fc | |
7121 | ! Starting 10 instruction Store Burst | |
7122 | ! Mem[0000000010101410] = 9c510000, %l3 = 0000000000000000 | |
7123 | swapa [%i4+%o5]0x88,%l3 ! %l3 = 000000009c510000 | |
7124 | ||
7125 | p0_label_174: | |
7126 | ! Mem[0000000030041408] = 0000c4d9, %l0 = 000000000000ffff | |
7127 | swapa [%i1+%o4]0x81,%l0 ! %l0 = 000000000000c4d9 | |
7128 | ! Mem[0000000010101430] = fffffeff7d307e94, %l1 = 00000000db7e6dd7, %l6 = 00000000edf0a6df | |
7129 | add %i4,0x30,%g1 | |
7130 | casxa [%g1]0x80,%l1,%l6 ! %l6 = fffffeff7d307e94 | |
7131 | ! %f30 = 000000ff 0000ffff, %l4 = ff0000000b931a2a | |
7132 | ! Mem[0000000030001438] = 022d96f8d6ba79b1 | |
7133 | add %i0,0x038,%g1 | |
7134 | stda %f30,[%g1+%l4]ASI_PST8_SL ! Mem[0000000030001438] = 02ff9600d60079b1 | |
7135 | ! %f2 = 4e239aff ff000000, Mem[0000000030081400] = 00000000 ff000000 | |
7136 | stda %f2 ,[%i2+%g0]0x89 ! Mem[0000000030081400] = 4e239aff ff000000 | |
7137 | ! Mem[0000000030001400] = 00ffffff, %l7 = 00000000665ef8fc | |
7138 | ldstuba [%i0+%g0]0x89,%l7 ! %l7 = 000000ff000000ff | |
7139 | ! %f30 = 000000ff 0000ffff, %l7 = 00000000000000ff | |
7140 | ! Mem[0000000030081428] = 1ca4efd8dfa55c31 | |
7141 | add %i2,0x028,%g1 | |
7142 | stda %f30,[%g1+%l7]ASI_PST32_S ! Mem[0000000030081428] = 000000ff0000ffff | |
7143 | ! %l0 = 000000000000c4d9, Mem[0000000030101408] = 00000000 | |
7144 | stha %l0,[%i4+%o4]0x89 ! Mem[0000000030101408] = 0000c4d9 | |
7145 | ! Mem[0000000010101420] = 00000000, %l6 = fffffeff7d307e94 | |
7146 | ldstuba [%i4+0x020]%asi,%l6 ! %l6 = 00000000000000ff | |
7147 | ! %l2 = 76c6c4fffffffff8, Mem[0000000010181400] = f8ffffffffc4c676 | |
7148 | stxa %l2,[%i6+%g0]0x80 ! Mem[0000000010181400] = 76c6c4fffffffff8 | |
7149 | ! Starting 10 instruction Load Burst | |
7150 | ! Mem[0000000030181410] = 000000ff, %l6 = 0000000000000000 | |
7151 | ldswa [%i6+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
7152 | ||
7153 | p0_label_175: | |
7154 | ! Mem[0000000010141408] = 0000ffff, %f31 = 0000ffff | |
7155 | lda [%i5+%o4]0x80,%f31 ! %f31 = 0000ffff | |
7156 | ! Mem[0000000030041410] = edf0a6df, %l7 = 00000000000000ff | |
7157 | lduwa [%i1+%o5]0x81,%l7 ! %l7 = 00000000edf0a6df | |
7158 | ! Mem[0000000030041400] = 76c6411f000000ff, %f14 = 1f41c676 2164159c | |
7159 | ldda [%i1+%g0]0x89,%f14 ! %f14 = 76c6411f 000000ff | |
7160 | ! Mem[0000000010141428] = 4e239aff, %l2 = 76c6c4fffffffff8 | |
7161 | ldswa [%i5+0x028]%asi,%l2 ! %l2 = 000000004e239aff | |
7162 | ! Mem[00000000300c1410] = ff000000, %l2 = 000000004e239aff | |
7163 | lduha [%i3+%o5]0x81,%l2 ! %l2 = 000000000000ff00 | |
7164 | ! Mem[0000000010181400] = 76c6c4ff fffffff8, %l6 = 000000ff, %l7 = edf0a6df | |
7165 | ldda [%i6+%g0]0x80,%l6 ! %l6 = 0000000076c6c4ff 00000000fffffff8 | |
7166 | ! Mem[000000001004141c] = 64b3e323, %l5 = 00000000ffffffff | |
7167 | ldsw [%i1+0x01c],%l5 ! %l5 = 0000000064b3e323 | |
7168 | ! Mem[0000000021800100] = f1dd11d1, %l2 = 000000000000ff00 | |
7169 | lduha [%o3+0x100]%asi,%l2 ! %l2 = 000000000000f1dd | |
7170 | ! Mem[0000000030001408] = c976ff12 dfa6f0ed, %l0 = 0000c4d9, %l1 = db7e6dd7 | |
7171 | ldda [%i0+%o4]0x89,%l0 ! %l0 = 00000000dfa6f0ed 00000000c976ff12 | |
7172 | ! Starting 10 instruction Store Burst | |
7173 | ! %l2 = 000000000000f1dd, Mem[00000000100c1400] = 0000ffff | |
7174 | stha %l2,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 0000f1dd | |
7175 | ||
7176 | ! Check Point 35 for processor 0 | |
7177 | ||
7178 | set p0_check_pt_data_35,%g4 | |
7179 | rd %ccr,%g5 ! %g5 = 44 | |
7180 | ldx [%g4+0x08],%g2 | |
7181 | cmp %l0,%g2 ! %l0 = 00000000dfa6f0ed | |
7182 | bne %xcc,p0_reg_check_fail0 | |
7183 | mov 0xee0,%g1 | |
7184 | ldx [%g4+0x10],%g2 | |
7185 | cmp %l1,%g2 ! %l1 = 00000000c976ff12 | |
7186 | bne %xcc,p0_reg_check_fail1 | |
7187 | mov 0xee1,%g1 | |
7188 | ldx [%g4+0x18],%g2 | |
7189 | cmp %l2,%g2 ! %l2 = 000000000000f1dd | |
7190 | bne %xcc,p0_reg_check_fail2 | |
7191 | mov 0xee2,%g1 | |
7192 | ldx [%g4+0x20],%g2 | |
7193 | cmp %l3,%g2 ! %l3 = 000000009c510000 | |
7194 | bne %xcc,p0_reg_check_fail3 | |
7195 | mov 0xee3,%g1 | |
7196 | ldx [%g4+0x28],%g2 | |
7197 | cmp %l4,%g2 ! %l4 = ff0000000b931a2a | |
7198 | bne %xcc,p0_reg_check_fail4 | |
7199 | mov 0xee4,%g1 | |
7200 | ldx [%g4+0x30],%g2 | |
7201 | cmp %l5,%g2 ! %l5 = 0000000064b3e323 | |
7202 | bne %xcc,p0_reg_check_fail5 | |
7203 | mov 0xee5,%g1 | |
7204 | ldx [%g4+0x38],%g2 | |
7205 | cmp %l6,%g2 ! %l6 = 0000000076c6c4ff | |
7206 | bne %xcc,p0_reg_check_fail6 | |
7207 | mov 0xee6,%g1 | |
7208 | ldx [%g4+0x40],%g2 | |
7209 | cmp %l7,%g2 ! %l7 = 00000000fffffff8 | |
7210 | bne %xcc,p0_reg_check_fail7 | |
7211 | mov 0xee7,%g1 | |
7212 | ldx [%g4+0x48],%g3 | |
7213 | std %f0,[%g4] | |
7214 | ldx [%g4],%g2 | |
7215 | cmp %g3,%g2 ! %f0 = ffffffc9 ffffffff | |
7216 | bne %xcc,p0_freg_check_fail | |
7217 | mov 0xf00,%g1 | |
7218 | ldx [%g4+0x50],%g3 | |
7219 | std %f2,[%g4] | |
7220 | ldx [%g4],%g2 | |
7221 | cmp %g3,%g2 ! %f2 = 4e239aff ff000000 | |
7222 | bne %xcc,p0_freg_check_fail | |
7223 | mov 0xf02,%g1 | |
7224 | ldx [%g4+0x58],%g3 | |
7225 | std %f6,[%g4] | |
7226 | ldx [%g4],%g2 | |
7227 | cmp %g3,%g2 ! %f6 = ffa60000 ffce0000 | |
7228 | bne %xcc,p0_freg_check_fail | |
7229 | mov 0xf06,%g1 | |
7230 | ldx [%g4+0x60],%g3 | |
7231 | std %f14,[%g4] | |
7232 | ldx [%g4],%g2 | |
7233 | cmp %g3,%g2 ! %f14 = 76c6411f 000000ff | |
7234 | bne %xcc,p0_freg_check_fail | |
7235 | mov 0xf14,%g1 | |
7236 | ldx [%g4+0x68],%g3 | |
7237 | std %f30,[%g4] | |
7238 | ldx [%g4],%g2 | |
7239 | cmp %g3,%g2 ! %f30 = 000000ff 0000ffff | |
7240 | bne %xcc,p0_freg_check_fail | |
7241 | mov 0xf30,%g1 | |
7242 | ||
7243 | ! Check Point 35 completed | |
7244 | ||
7245 | ||
7246 | p0_label_176: | |
7247 | ! Mem[00000000300c1408] = ff000000, %l5 = 0000000064b3e323 | |
7248 | swapa [%i3+%o4]0x81,%l5 ! %l5 = 00000000ff000000 | |
7249 | ! Mem[0000000030081408] = ff000000, %l2 = 000000000000f1dd | |
7250 | ldstuba [%i2+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
7251 | ! Mem[0000000010181408] = ffffffff, %l5 = 00000000ff000000 | |
7252 | swapa [%i6+%o4]0x80,%l5 ! %l5 = 00000000ffffffff | |
7253 | ! %l2 = 0000000000000000, Mem[0000000030081400] = 000000ff | |
7254 | stha %l2,[%i2+%g0]0x81 ! Mem[0000000030081400] = 000000ff | |
7255 | ! %l7 = 00000000fffffff8, Mem[0000000021800100] = f1dd11d1, %asi = 80 | |
7256 | stha %l7,[%o3+0x100]%asi ! Mem[0000000021800100] = fff811d1 | |
7257 | ! %l2 = 0000000000000000, Mem[00000000100c1408] = 00000000 | |
7258 | stba %l2,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00000000 | |
7259 | ! %f16 = 7d000000 ff0000ff, Mem[0000000030001408] = edf0a6df 12ff76c9 | |
7260 | stda %f16,[%i0+%o4]0x81 ! Mem[0000000030001408] = 7d000000 ff0000ff | |
7261 | ! %l7 = 00000000fffffff8, Mem[0000000010081400] = 9c5100ff | |
7262 | stba %l7,[%i2+%g0]0x88 ! Mem[0000000010081400] = 9c5100f8 | |
7263 | ! Mem[0000000030141408] = 0b931a2a, %l5 = 00000000ffffffff | |
7264 | swapa [%i5+%o4]0x89,%l5 ! %l5 = 000000000b931a2a | |
7265 | ! Starting 10 instruction Load Burst | |
7266 | ! Mem[0000000010141410] = 127af00019000000, %f0 = ffffffc9 ffffffff | |
7267 | ldda [%i5+%o5]0x88,%f0 ! %f0 = 127af000 19000000 | |
7268 | ||
7269 | p0_label_177: | |
7270 | ! Mem[0000000010101400] = 0000000000000000, %l4 = ff0000000b931a2a | |
7271 | ldxa [%i4+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
7272 | ! Mem[0000000010141414] = 00f07a12, %l5 = 000000000b931a2a | |
7273 | ldsw [%i5+0x014],%l5 ! %l5 = 0000000000f07a12 | |
7274 | ! Mem[0000000010101420] = ff000000, %l1 = 00000000c976ff12 | |
7275 | lduw [%i4+0x020],%l1 ! %l1 = 00000000ff000000 | |
7276 | ! Mem[0000000030081408] = ff0000ff dfa6f0ff, %l4 = 00000000, %l5 = 00f07a12 | |
7277 | ldda [%i2+%o4]0x81,%l4 ! %l4 = 00000000ff0000ff 00000000dfa6f0ff | |
7278 | ! Mem[0000000030001400] = ffffff00, %f9 = 12ff76c9 | |
7279 | lda [%i0+%g0]0x81,%f9 ! %f9 = ffffff00 | |
7280 | ! Mem[0000000010141410] = 0000001900f07a12, %f30 = 000000ff 0000ffff | |
7281 | ldd [%i5+%o5],%f30 ! %f30 = 00000019 00f07a12 | |
7282 | ! Mem[0000000010181408] = 000000ff, %l5 = 00000000dfa6f0ff | |
7283 | ldsba [%i6+%o4]0x88,%l5 ! %l5 = ffffffffffffffff | |
7284 | ! Mem[0000000010101410] = 00000000, %l2 = 0000000000000000 | |
7285 | lduwa [%i4+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
7286 | ! Mem[00000000211c0000] = fffc1a4c, %l0 = 00000000dfa6f0ed | |
7287 | lduba [%o2+0x001]%asi,%l0 ! %l0 = 00000000000000fc | |
7288 | ! Starting 10 instruction Store Burst | |
7289 | ! %l6 = 0000000076c6c4ff, Mem[0000000010001420] = ffff0000008d0000, %asi = 80 | |
7290 | stxa %l6,[%i0+0x020]%asi ! Mem[0000000010001420] = 0000000076c6c4ff | |
7291 | ||
7292 | p0_label_178: | |
7293 | ! Mem[00000000100c1400] = ddf10000, %l5 = ffffffffffffffff | |
7294 | swapa [%i3+%g0]0x80,%l5 ! %l5 = 00000000ddf10000 | |
7295 | ! Mem[0000000010041434] = 24000000, %l1 = 00000000ff000000 | |
7296 | swap [%i1+0x034],%l1 ! %l1 = 0000000024000000 | |
7297 | ! %l3 = 000000009c510000, Mem[0000000010081408] = d6ba79b1 | |
7298 | stwa %l3,[%i2+%o4]0x88 ! Mem[0000000010081408] = 9c510000 | |
7299 | ! %l3 = 000000009c510000, Mem[00000000100c1400] = ffffffff | |
7300 | stwa %l3,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 9c510000 | |
7301 | ! %l0 = 00000000000000fc, Mem[00000000100c1410] = 0000ffff000000bf | |
7302 | stx %l0,[%i3+%o5] ! Mem[00000000100c1410] = 00000000000000fc | |
7303 | ! %l2 = 0000000000000000, Mem[0000000010141414] = 00f07a12, %asi = 80 | |
7304 | stha %l2,[%i5+0x014]%asi ! Mem[0000000010141414] = 00007a12 | |
7305 | ! Mem[0000000030041408] = ffff0000, %l0 = 00000000000000fc | |
7306 | ldstuba [%i1+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
7307 | ! Mem[0000000010081410] = 000000ff, %l1 = 0000000024000000 | |
7308 | swapa [%i2+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
7309 | ! %l6 = 0000000076c6c4ff, Mem[0000000010101408] = ff000000 | |
7310 | stba %l6,[%i4+%o4]0x88 ! Mem[0000000010101408] = ff0000ff | |
7311 | ! Starting 10 instruction Load Burst | |
7312 | ! Mem[0000000030181408] = ff0000ff 00000000, %l6 = 76c6c4ff, %l7 = fffffff8 | |
7313 | ldda [%i6+%o4]0x81,%l6 ! %l6 = 00000000ff0000ff 0000000000000000 | |
7314 | ||
7315 | p0_label_179: | |
7316 | ! Mem[00000000100c1400] = 0000519cd76d7edb, %l2 = 0000000000000000 | |
7317 | ldxa [%i3+%g0]0x80,%l2 ! %l2 = 0000519cd76d7edb | |
7318 | ! Mem[00000000100c1418] = 23e3b364, %l1 = 00000000000000ff | |
7319 | ldsha [%i3+0x01a]%asi,%l1 ! %l1 = ffffffffffffb364 | |
7320 | ! Mem[00000000100c1408] = 00000000, %l5 = 00000000ddf10000 | |
7321 | lduha [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
7322 | ! Mem[0000000030101408] = 0000c4d9, %l0 = 0000000000000000 | |
7323 | ldsha [%i4+%o4]0x89,%l0 ! %l0 = ffffffffffffc4d9 | |
7324 | ! Mem[00000000100c140c] = 00000000, %l2 = 0000519cd76d7edb | |
7325 | lduba [%i3+0x00d]%asi,%l2 ! %l2 = 0000000000000000 | |
7326 | ! Mem[00000000100c1408] = 0000000000000000, %f10 = 665ef8fc edf0a6df | |
7327 | ldda [%i3+%o4]0x88,%f10 ! %f10 = 00000000 00000000 | |
7328 | ! Mem[0000000010181410] = d6ba79b1, %l0 = ffffffffffffc4d9 | |
7329 | ldswa [%i6+%o5]0x80,%l0 ! %l0 = ffffffffd6ba79b1 | |
7330 | ! Mem[0000000010001410] = ffffffff, %l6 = 00000000ff0000ff | |
7331 | ldsha [%i0+%o5]0x80,%l6 ! %l6 = ffffffffffffffff | |
7332 | ! Mem[00000000211c0000] = fffc1a4c, %l7 = 0000000000000000 | |
7333 | ldsha [%o2+0x000]%asi,%l7 ! %l7 = fffffffffffffffc | |
7334 | ! Starting 10 instruction Store Burst | |
7335 | ! Mem[00000000300c1400] = 00000000, %l4 = 00000000ff0000ff | |
7336 | swapa [%i3+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
7337 | ||
7338 | p0_label_180: | |
7339 | ! Code Fragment 3 | |
7340 | p0_fragment_9: | |
7341 | ! %l0 = ffffffffd6ba79b1 | |
7342 | setx 0xd14eec7067909d88,%g7,%l0 ! %l0 = d14eec7067909d88 | |
7343 | ! %l1 = ffffffffffffb364 | |
7344 | setx 0x3c307dc7b10bbf05,%g7,%l1 ! %l1 = 3c307dc7b10bbf05 | |
7345 | setx 0x1fe000, %g1, %g3 | |
7346 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
7347 | setx 0x1ffff8, %g1, %g2 | |
7348 | and %l0, %g2, %l0 | |
7349 | ta T_CHANGE_HPRIV | |
7350 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
7351 | ta T_CHANGE_NONHPRIV | |
7352 | ! %l0 = d14eec7067909d88 | |
7353 | setx 0xfb6d6a5024bad88f,%g7,%l0 ! %l0 = fb6d6a5024bad88f | |
7354 | ! %l1 = 3c307dc7b10bbf05 | |
7355 | setx 0xc749d457f0deed65,%g7,%l1 ! %l1 = c749d457f0deed65 | |
7356 | ! %l4 = 0000000000000000, Mem[0000000010101404] = 00000000, %asi = 80 | |
7357 | stwa %l4,[%i4+0x004]%asi ! Mem[0000000010101404] = 00000000 | |
7358 | ! %f7 = ffce0000, Mem[0000000010081414] = 00000000 | |
7359 | sta %f7 ,[%i2+0x014]%asi ! Mem[0000000010081414] = ffce0000 | |
7360 | ! Mem[0000000030041410] = dfa6f0ed, %l7 = fffffffffffffffc | |
7361 | swapa [%i1+%o5]0x89,%l7 ! %l7 = 00000000dfa6f0ed | |
7362 | ! %l6 = ffffffffffffffff, Mem[0000000030101410] = ffffffff | |
7363 | stwa %l6,[%i4+%o5]0x89 ! Mem[0000000030101410] = ffffffff | |
7364 | ! %l4 = 0000000000000000, Mem[0000000030181410] = ff000000 | |
7365 | stwa %l4,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 | |
7366 | ! %l3 = 000000009c510000, Mem[00000000300c1410] = 000000ff | |
7367 | stha %l3,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 00000000 | |
7368 | ! Mem[0000000030101410] = ffffffff, %l0 = fb6d6a5024bad88f | |
7369 | ldstuba [%i4+%o5]0x81,%l0 ! %l0 = 000000ff000000ff | |
7370 | ! %l5 = 0000000000000000, Mem[0000000030141408] = ffffffff | |
7371 | stwa %l5,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 | |
7372 | ! Starting 10 instruction Load Burst | |
7373 | ! Mem[00000000100c1408] = 00000000, %l2 = 0000000000000000 | |
7374 | lduba [%i3+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
7375 | ||
7376 | ! Check Point 36 for processor 0 | |
7377 | ||
7378 | set p0_check_pt_data_36,%g4 | |
7379 | rd %ccr,%g5 ! %g5 = 44 | |
7380 | ldx [%g4+0x08],%g2 | |
7381 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
7382 | bne %xcc,p0_reg_check_fail0 | |
7383 | mov 0xee0,%g1 | |
7384 | ldx [%g4+0x10],%g2 | |
7385 | cmp %l1,%g2 ! %l1 = c749d457f0deed65 | |
7386 | bne %xcc,p0_reg_check_fail1 | |
7387 | mov 0xee1,%g1 | |
7388 | ldx [%g4+0x18],%g2 | |
7389 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
7390 | bne %xcc,p0_reg_check_fail2 | |
7391 | mov 0xee2,%g1 | |
7392 | ldx [%g4+0x20],%g2 | |
7393 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
7394 | bne %xcc,p0_reg_check_fail4 | |
7395 | mov 0xee4,%g1 | |
7396 | ldx [%g4+0x28],%g2 | |
7397 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
7398 | bne %xcc,p0_reg_check_fail5 | |
7399 | mov 0xee5,%g1 | |
7400 | ldx [%g4+0x30],%g2 | |
7401 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
7402 | bne %xcc,p0_reg_check_fail6 | |
7403 | mov 0xee6,%g1 | |
7404 | ldx [%g4+0x38],%g2 | |
7405 | cmp %l7,%g2 ! %l7 = 00000000dfa6f0ed | |
7406 | bne %xcc,p0_reg_check_fail7 | |
7407 | mov 0xee7,%g1 | |
7408 | ldx [%g4+0x40],%g3 | |
7409 | std %f0,[%g4] | |
7410 | ldx [%g4],%g2 | |
7411 | cmp %g3,%g2 ! %f0 = 127af000 19000000 | |
7412 | bne %xcc,p0_freg_check_fail | |
7413 | mov 0xf00,%g1 | |
7414 | ldx [%g4+0x48],%g3 | |
7415 | std %f4,[%g4] | |
7416 | ldx [%g4],%g2 | |
7417 | cmp %g3,%g2 ! %f4 = ff000000 ff000000 | |
7418 | bne %xcc,p0_freg_check_fail | |
7419 | mov 0xf04,%g1 | |
7420 | ldx [%g4+0x50],%g3 | |
7421 | std %f6,[%g4] | |
7422 | ldx [%g4],%g2 | |
7423 | cmp %g3,%g2 ! %f6 = ffa60000 ffce0000 | |
7424 | bne %xcc,p0_freg_check_fail | |
7425 | mov 0xf06,%g1 | |
7426 | ldx [%g4+0x58],%g3 | |
7427 | std %f8,[%g4] | |
7428 | ldx [%g4],%g2 | |
7429 | cmp %g3,%g2 ! %f8 = edf0a6df ffffff00 | |
7430 | bne %xcc,p0_freg_check_fail | |
7431 | mov 0xf08,%g1 | |
7432 | ldx [%g4+0x60],%g3 | |
7433 | std %f10,[%g4] | |
7434 | ldx [%g4],%g2 | |
7435 | cmp %g3,%g2 ! %f10 = 00000000 00000000 | |
7436 | bne %xcc,p0_freg_check_fail | |
7437 | mov 0xf10,%g1 | |
7438 | ldx [%g4+0x68],%g3 | |
7439 | std %f30,[%g4] | |
7440 | ldx [%g4],%g2 | |
7441 | cmp %g3,%g2 ! %f30 = 00000019 00f07a12 | |
7442 | bne %xcc,p0_freg_check_fail | |
7443 | mov 0xf30,%g1 | |
7444 | ||
7445 | ! Check Point 36 completed | |
7446 | ||
7447 | ||
7448 | p0_label_181: | |
7449 | ! Mem[0000000010181400] = 76c6c4ff, %l6 = ffffffffffffffff | |
7450 | lduba [%i6+%g0]0x80,%l6 ! %l6 = 0000000000000076 | |
7451 | ! Mem[0000000030101408] = d9c40000, %l4 = 0000000000000000 | |
7452 | ldsha [%i4+%o4]0x81,%l4 ! %l4 = ffffffffffffd9c4 | |
7453 | ! Mem[0000000010141400] = fffffff8, %l5 = 0000000000000000 | |
7454 | ldswa [%i5+%g0]0x80,%l5 ! %l5 = fffffffffffffff8 | |
7455 | ! Mem[0000000010181408] = 000000ff, %l6 = 0000000000000076 | |
7456 | lduha [%i6+%o4]0x88,%l6 ! %l6 = 00000000000000ff | |
7457 | ! Mem[0000000020800040] = fffc7379, %l4 = ffffffffffffd9c4 | |
7458 | lduha [%o1+0x040]%asi,%l4 ! %l4 = 000000000000fffc | |
7459 | ! %l0 = 00000000000000ff, imm = 00000000000003b1, %l6 = 00000000000000ff | |
7460 | or %l0,0x3b1,%l6 ! %l6 = 00000000000003ff | |
7461 | ! Mem[0000000010181408] = 000000ff, %l6 = 00000000000003ff | |
7462 | lduha [%i6+%o4]0x88,%l6 ! %l6 = 00000000000000ff | |
7463 | ! Mem[0000000010141400] = f8ffffff, %l3 = 000000009c510000 | |
7464 | ldswa [%i5+%g0]0x88,%l3 ! %l3 = fffffffff8ffffff | |
7465 | ! Mem[0000000010041408] = 000000ff, %l1 = c749d457f0deed65 | |
7466 | ldswa [%i1+%o4]0x80,%l1 ! %l1 = 00000000000000ff | |
7467 | ! Starting 10 instruction Store Burst | |
7468 | ! Mem[00000000100c1400] = 9c510000, %l2 = 0000000000000000 | |
7469 | ldstuba [%i3+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
7470 | ||
7471 | p0_label_182: | |
7472 | ! %f17 = ff0000ff, Mem[0000000030001410] = 00000000 | |
7473 | sta %f17,[%i0+%o5]0x89 ! Mem[0000000030001410] = ff0000ff | |
7474 | ! Mem[0000000010001410] = ffffffff, %l3 = fffffffff8ffffff | |
7475 | ldstuba [%i0+%o5]0x80,%l3 ! %l3 = 000000ff000000ff | |
7476 | ! Mem[0000000010001414] = c9ffffff, %l5 = fffffffffffffff8 | |
7477 | ldstuba [%i0+0x014]%asi,%l5 ! %l5 = 000000c9000000ff | |
7478 | ! %l5 = 00000000000000c9, Mem[0000000030041410] = fcffffff12ffffff | |
7479 | stxa %l5,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000000000c9 | |
7480 | ! Mem[0000000030041400] = 000000ff, %l6 = 00000000000000ff | |
7481 | swapa [%i1+%g0]0x89,%l6 ! %l6 = 00000000000000ff | |
7482 | ! %l0 = 00000000000000ff, Mem[0000000030041408] = ff00ffff00000000 | |
7483 | stxa %l0,[%i1+%o4]0x81 ! Mem[0000000030041408] = 00000000000000ff | |
7484 | ! Mem[000000001018143c] = ffffffdd, %l5 = 00000000000000c9, %asi = 80 | |
7485 | swapa [%i6+0x03c]%asi,%l5 ! %l5 = 00000000ffffffdd | |
7486 | ! %l7 = 00000000dfa6f0ed, Mem[0000000030141408] = 00000000 | |
7487 | stha %l7,[%i5+%o4]0x89 ! Mem[0000000030141408] = 0000f0ed | |
7488 | ! Mem[0000000010001400] = 665ef8fc, %l1 = 00000000000000ff | |
7489 | ldstuba [%i0+%g0]0x80,%l1 ! %l1 = 00000066000000ff | |
7490 | ! Starting 10 instruction Load Burst | |
7491 | ! Mem[00000000100c143c] = d6ba79b1, %l2 = 0000000000000000 | |
7492 | lduwa [%i3+0x03c]%asi,%l2 ! %l2 = 00000000d6ba79b1 | |
7493 | ||
7494 | p0_label_183: | |
7495 | ! Mem[00000000100c141c] = 90da2bca, %l2 = 00000000d6ba79b1 | |
7496 | ldsw [%i3+0x01c],%l2 ! %l2 = ffffffff90da2bca | |
7497 | ! Mem[0000000010141410] = 127a000019000000, %l0 = 00000000000000ff | |
7498 | ldxa [%i5+%o5]0x88,%l0 ! %l0 = 127a000019000000 | |
7499 | ! Mem[0000000010001408] = 00000000 00000000, %l2 = 90da2bca, %l3 = 000000ff | |
7500 | ldda [%i0+%o4]0x80,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
7501 | ! Mem[0000000010181400] = 76c6c4fffffffff8, %f30 = 00000019 00f07a12 | |
7502 | ldda [%i6+%g0]0x80,%f30 ! %f30 = 76c6c4ff fffffff8 | |
7503 | ! Mem[0000000010181410] = ff000000b179bad6, %f26 = ff2e51ff 00000000 | |
7504 | ldda [%i6+%o5]0x88,%f26 ! %f26 = ff000000 b179bad6 | |
7505 | ! Mem[00000000300c1408] = 000000ff23e3b364, %f22 = fc000000 00000000 | |
7506 | ldda [%i3+%o4]0x89,%f22 ! %f22 = 000000ff 23e3b364 | |
7507 | ! Mem[00000000300c1400] = ff0000ffff512e7a, %l6 = 00000000000000ff | |
7508 | ldxa [%i3+%g0]0x81,%l6 ! %l6 = ff0000ffff512e7a | |
7509 | ! Mem[0000000030081410] = ff2e51ff00000000, %f24 = dfa6f0ed fcf85e66 | |
7510 | ldda [%i2+%o5]0x89,%f24 ! %f24 = ff2e51ff 00000000 | |
7511 | ! Mem[0000000030101400] = 76c6411f, %l5 = 00000000ffffffdd | |
7512 | lduba [%i4+%g0]0x81,%l5 ! %l5 = 0000000000000076 | |
7513 | ! Starting 10 instruction Store Burst | |
7514 | ! Mem[0000000010181408] = ff000000, %l5 = 0000000000000076 | |
7515 | swapa [%i6+%o4]0x80,%l5 ! %l5 = 00000000ff000000 | |
7516 | ||
7517 | p0_label_184: | |
7518 | ! Mem[0000000010081410] = 00000024, %l6 = ff0000ffff512e7a | |
7519 | swap [%i2+%o5],%l6 ! %l6 = 0000000000000024 | |
7520 | ! %l1 = 0000000000000066, Mem[0000000030181400] = 00ff00ff | |
7521 | stba %l1,[%i6+%g0]0x81 ! Mem[0000000030181400] = 66ff00ff | |
7522 | ! %l1 = 0000000000000066, Mem[0000000030181400] = ffffffffff00ff66 | |
7523 | stxa %l1,[%i6+%g0]0x89 ! Mem[0000000030181400] = 0000000000000066 | |
7524 | ! Mem[0000000010001400] = ff5ef8fc, %l7 = 00000000dfa6f0ed | |
7525 | swap [%i0+%g0],%l7 ! %l7 = 00000000ff5ef8fc | |
7526 | ! %f26 = ff000000 b179bad6, Mem[0000000010101418] = 00000000 000000ff | |
7527 | stda %f26,[%i4+0x018]%asi ! Mem[0000000010101418] = ff000000 b179bad6 | |
7528 | ! Mem[0000000030081400] = 000000ff, %l2 = 0000000000000000 | |
7529 | lduba [%i2+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
7530 | ! %l2 = 0000000000000000, Mem[00000000100c1408] = 00000000 | |
7531 | stha %l2,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00000000 | |
7532 | ! Mem[0000000020800040] = fffc7379, %l5 = 00000000ff000000 | |
7533 | ldstub [%o1+0x040],%l5 ! %l5 = 000000ff000000ff | |
7534 | ! %l0 = 127a000019000000, Mem[000000001004141c] = 64b3e323, %asi = 80 | |
7535 | stba %l0,[%i1+0x01c]%asi ! Mem[000000001004141c] = 00b3e323 | |
7536 | ! Starting 10 instruction Load Burst | |
7537 | ! Mem[00000000100c1430] = d9d7a7d5, %l2 = 0000000000000000 | |
7538 | lduw [%i3+0x030],%l2 ! %l2 = 00000000d9d7a7d5 | |
7539 | ||
7540 | p0_label_185: | |
7541 | ! Mem[0000000010041408] = ffffffff ff000000, %l4 = 0000fffc, %l5 = 000000ff | |
7542 | ldda [%i1+%o4]0x88,%l4 ! %l4 = 00000000ff000000 00000000ffffffff | |
7543 | ! Mem[0000000030101410] = ffffffff, %l5 = 00000000ffffffff | |
7544 | ldsha [%i4+%o5]0x81,%l5 ! %l5 = ffffffffffffffff | |
7545 | ! Mem[00000000211c0000] = fffc1a4c, %l6 = 0000000000000024 | |
7546 | lduha [%o2+0x000]%asi,%l6 ! %l6 = 000000000000fffc | |
7547 | ! Mem[0000000030001400] = ffffff00, %l3 = 0000000000000000 | |
7548 | ldsba [%i0+%g0]0x81,%l3 ! %l3 = ffffffffffffffff | |
7549 | ! Mem[0000000010041408] = 000000ff, %l0 = 127a000019000000 | |
7550 | lduwa [%i1+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
7551 | ! Mem[0000000030001408] = ff0000ff0000007d, %f24 = ff2e51ff 00000000 | |
7552 | ldda [%i0+%o4]0x89,%f24 ! %f24 = ff0000ff 0000007d | |
7553 | ! Mem[0000000010181400] = 76c6c4fffffffff8, %f4 = ff000000 ff000000 | |
7554 | ldd [%i6+%g0],%f4 ! %f4 = 76c6c4ff fffffff8 | |
7555 | ! Mem[0000000010081410] = ff512e7affce0000, %f12 = fffffeff 01a3a7b6 | |
7556 | ldda [%i2+%o5]0x80,%f12 ! %f12 = ff512e7a ffce0000 | |
7557 | ! Mem[0000000010081408] = 0000519c, %l7 = 00000000ff5ef8fc | |
7558 | ldswa [%i2+%o4]0x80,%l7 ! %l7 = 000000000000519c | |
7559 | ! Starting 10 instruction Store Burst | |
7560 | ! Mem[0000000010181428] = 002e51ff, %l4 = 00000000ff000000, %asi = 80 | |
7561 | swapa [%i6+0x028]%asi,%l4 ! %l4 = 00000000002e51ff | |
7562 | ||
7563 | ! Check Point 37 for processor 0 | |
7564 | ||
7565 | set p0_check_pt_data_37,%g4 | |
7566 | rd %ccr,%g5 ! %g5 = 44 | |
7567 | ldx [%g4+0x08],%g2 | |
7568 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
7569 | bne %xcc,p0_reg_check_fail0 | |
7570 | mov 0xee0,%g1 | |
7571 | ldx [%g4+0x10],%g2 | |
7572 | cmp %l1,%g2 ! %l1 = 0000000000000066 | |
7573 | bne %xcc,p0_reg_check_fail1 | |
7574 | mov 0xee1,%g1 | |
7575 | ldx [%g4+0x18],%g2 | |
7576 | cmp %l2,%g2 ! %l2 = 00000000d9d7a7d5 | |
7577 | bne %xcc,p0_reg_check_fail2 | |
7578 | mov 0xee2,%g1 | |
7579 | ldx [%g4+0x20],%g2 | |
7580 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
7581 | bne %xcc,p0_reg_check_fail3 | |
7582 | mov 0xee3,%g1 | |
7583 | ldx [%g4+0x28],%g2 | |
7584 | cmp %l4,%g2 ! %l4 = 00000000002e51ff | |
7585 | bne %xcc,p0_reg_check_fail4 | |
7586 | mov 0xee4,%g1 | |
7587 | ldx [%g4+0x30],%g2 | |
7588 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
7589 | bne %xcc,p0_reg_check_fail5 | |
7590 | mov 0xee5,%g1 | |
7591 | ldx [%g4+0x38],%g2 | |
7592 | cmp %l6,%g2 ! %l6 = 000000000000fffc | |
7593 | bne %xcc,p0_reg_check_fail6 | |
7594 | mov 0xee6,%g1 | |
7595 | ldx [%g4+0x40],%g2 | |
7596 | cmp %l7,%g2 ! %l7 = 000000000000519c | |
7597 | bne %xcc,p0_reg_check_fail7 | |
7598 | mov 0xee7,%g1 | |
7599 | ldx [%g4+0x48],%g3 | |
7600 | std %f2,[%g4] | |
7601 | ldx [%g4],%g2 | |
7602 | cmp %g3,%g2 ! %f2 = 4e239aff ff000000 | |
7603 | bne %xcc,p0_freg_check_fail | |
7604 | mov 0xf02,%g1 | |
7605 | ldx [%g4+0x50],%g3 | |
7606 | std %f4,[%g4] | |
7607 | ldx [%g4],%g2 | |
7608 | cmp %g3,%g2 ! %f4 = 76c6c4ff fffffff8 | |
7609 | bne %xcc,p0_freg_check_fail | |
7610 | mov 0xf04,%g1 | |
7611 | ldx [%g4+0x58],%g3 | |
7612 | std %f12,[%g4] | |
7613 | ldx [%g4],%g2 | |
7614 | cmp %g3,%g2 ! %f12 = ff512e7a ffce0000 | |
7615 | bne %xcc,p0_freg_check_fail | |
7616 | mov 0xf12,%g1 | |
7617 | ldx [%g4+0x60],%g3 | |
7618 | std %f22,[%g4] | |
7619 | ldx [%g4],%g2 | |
7620 | cmp %g3,%g2 ! %f22 = 000000ff 23e3b364 | |
7621 | bne %xcc,p0_freg_check_fail | |
7622 | mov 0xf22,%g1 | |
7623 | ldx [%g4+0x68],%g3 | |
7624 | std %f24,[%g4] | |
7625 | ldx [%g4],%g2 | |
7626 | cmp %g3,%g2 ! %f24 = ff0000ff 0000007d | |
7627 | bne %xcc,p0_freg_check_fail | |
7628 | mov 0xf24,%g1 | |
7629 | ldx [%g4+0x70],%g3 | |
7630 | std %f26,[%g4] | |
7631 | ldx [%g4],%g2 | |
7632 | cmp %g3,%g2 ! %f26 = ff000000 b179bad6 | |
7633 | bne %xcc,p0_freg_check_fail | |
7634 | mov 0xf26,%g1 | |
7635 | ldx [%g4+0x78],%g3 | |
7636 | std %f30,[%g4] | |
7637 | ldx [%g4],%g2 | |
7638 | cmp %g3,%g2 ! %f30 = 76c6c4ff fffffff8 | |
7639 | bne %xcc,p0_freg_check_fail | |
7640 | mov 0xf30,%g1 | |
7641 | ||
7642 | ! Check Point 37 completed | |
7643 | ||
7644 | ||
7645 | p0_label_186: | |
7646 | ! %f8 = edf0a6df, Mem[0000000030181410] = 00000000 | |
7647 | sta %f8 ,[%i6+%o5]0x89 ! Mem[0000000030181410] = edf0a6df | |
7648 | ! %l3 = ffffffffffffffff, Mem[0000000030001408] = 0000007d | |
7649 | stha %l3,[%i0+%o4]0x89 ! Mem[0000000030001408] = 0000ffff | |
7650 | ! %l4 = 00000000002e51ff, Mem[0000000030101408] = d9c400000000003d | |
7651 | stxa %l4,[%i4+%o4]0x81 ! Mem[0000000030101408] = 00000000002e51ff | |
7652 | ! %l3 = ffffffffffffffff, Mem[0000000030041400] = ff000000 | |
7653 | stwa %l3,[%i1+%g0]0x81 ! Mem[0000000030041400] = ffffffff | |
7654 | ! Mem[0000000030101410] = ffffffff, %l1 = 0000000000000066 | |
7655 | swapa [%i4+%o5]0x81,%l1 ! %l1 = 00000000ffffffff | |
7656 | ! %l6 = 000000000000fffc, Mem[00000000100c1408] = 00000000 | |
7657 | stwa %l6,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 0000fffc | |
7658 | ! %l7 = 000000000000519c, Mem[0000000030041408] = 00000000 | |
7659 | stwa %l7,[%i1+%o4]0x81 ! Mem[0000000030041408] = 0000519c | |
7660 | ! %f18 = 7d000000 f8ffffff, %l1 = 00000000ffffffff | |
7661 | ! Mem[00000000100c1430] = d9d7a7d510710795 | |
7662 | add %i3,0x030,%g1 | |
7663 | stda %f18,[%g1+%l1]ASI_PST8_PL ! Mem[00000000100c1430] = fffffff80000007d | |
7664 | ! Mem[0000000010181410] = b179bad6, %l2 = 00000000d9d7a7d5 | |
7665 | swapa [%i6+%o5]0x88,%l2 ! %l2 = 00000000b179bad6 | |
7666 | ! Starting 10 instruction Load Burst | |
7667 | ! Mem[0000000010081400] = f800519c, %f7 = ffce0000 | |
7668 | lda [%i2+%g0]0x80,%f7 ! %f7 = f800519c | |
7669 | ||
7670 | p0_label_187: | |
7671 | ! Mem[0000000030001400] = ffffff00, %l1 = 00000000ffffffff | |
7672 | ldsha [%i0+%g0]0x81,%l1 ! %l1 = ffffffffffffffff | |
7673 | ! Mem[0000000030181408] = ff0000ff, %l1 = ffffffffffffffff | |
7674 | ldsha [%i6+%o4]0x81,%l1 ! %l1 = ffffffffffffff00 | |
7675 | ! Mem[00000000300c1408] = 64b3e323, %l3 = ffffffffffffffff | |
7676 | ldswa [%i3+%o4]0x81,%l3 ! %l3 = 0000000064b3e323 | |
7677 | ! Mem[0000000030141410] = 12ff76c9000000bf, %l4 = 00000000002e51ff | |
7678 | ldxa [%i5+%o5]0x81,%l4 ! %l4 = 12ff76c9000000bf | |
7679 | ! Mem[0000000030041410] = 00000000, %f10 = 00000000 | |
7680 | lda [%i1+%o5]0x81,%f10 ! %f10 = 00000000 | |
7681 | membar #Sync ! Added by membar checker (27) | |
7682 | ! Mem[0000000010141400] = fffffff8 00000000 0000ffff c45f3d9f | |
7683 | ! Mem[0000000010141410] = 00000019 00007a12 ff1d0000 00000024 | |
7684 | ! Mem[0000000010141420] = becd92b7 ffffffff 4e239aff 637cc6fe | |
7685 | ! Mem[0000000010141430] = bbbf9dab ac8f149b fa2e1880 000000ff | |
7686 | ldda [%i5]ASI_BLK_AIUPL,%f0 ! Block Load from 0000000010141400 | |
7687 | ! Mem[0000000030001410] = ff0000ff, %l0 = 00000000000000ff | |
7688 | lduha [%i0+%o5]0x81,%l0 ! %l0 = 000000000000ff00 | |
7689 | ! Mem[0000000030081408] = ff0000ff, %l3 = 0000000064b3e323 | |
7690 | ldswa [%i2+%o4]0x89,%l3 ! %l3 = ffffffffff0000ff | |
7691 | ! Mem[0000000030001408] = ffff0000, %l4 = 12ff76c9000000bf | |
7692 | lduwa [%i0+%o4]0x81,%l4 ! %l4 = 00000000ffff0000 | |
7693 | ! Starting 10 instruction Store Burst | |
7694 | ! %f23 = 23e3b364, Mem[0000000010041410] = edf0a6df | |
7695 | sta %f23,[%i1+%o5]0x88 ! Mem[0000000010041410] = 23e3b364 | |
7696 | ||
7697 | p0_label_188: | |
7698 | ! Mem[0000000030041408] = 0000519c, %l5 = ffffffffffffffff | |
7699 | swapa [%i1+%o4]0x81,%l5 ! %l5 = 000000000000519c | |
7700 | ! %l6 = 000000000000fffc, Mem[0000000021800140] = ff001df6, %asi = 80 | |
7701 | stha %l6,[%o3+0x140]%asi ! Mem[0000000021800140] = fffc1df6 | |
7702 | ! Mem[0000000010041410] = 64b3e323, %l2 = 00000000b179bad6 | |
7703 | swapa [%i1+%o5]0x80,%l2 ! %l2 = 0000000064b3e323 | |
7704 | ! %l4 = ffff0000, %l5 = 0000519c, Mem[0000000030041408] = ffffffff 000000ff | |
7705 | stda %l4,[%i1+%o4]0x81 ! Mem[0000000030041408] = ffff0000 0000519c | |
7706 | ! Mem[0000000010141400] = fffffff8, %l4 = 00000000ffff0000 | |
7707 | ldstuba [%i5+%g0]0x80,%l4 ! %l4 = 000000ff000000ff | |
7708 | ! %l6 = 000000000000fffc, Mem[0000000021800080] = ceffa433, %asi = 80 | |
7709 | stba %l6,[%o3+0x080]%asi ! Mem[0000000021800080] = fcffa433 | |
7710 | ! Mem[00000000100c1410] = 00000000, %l3 = ffffffffff0000ff | |
7711 | swapa [%i3+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
7712 | ! Mem[00000000300c1408] = 23e3b364, %l0 = 000000000000ff00 | |
7713 | swapa [%i3+%o4]0x89,%l0 ! %l0 = 0000000023e3b364 | |
7714 | ! %l0 = 0000000023e3b364, Mem[0000000030081400] = 4e239affff000000 | |
7715 | stxa %l0,[%i2+%g0]0x89 ! Mem[0000000030081400] = 0000000023e3b364 | |
7716 | ! Starting 10 instruction Load Burst | |
7717 | ! Mem[0000000010141408] = ffff0000, %l5 = 000000000000519c | |
7718 | ldswa [%i5+%o4]0x88,%l5 ! %l5 = ffffffffffff0000 | |
7719 | ||
7720 | p0_label_189: | |
7721 | ! Mem[0000000030081408] = ff0000ff, %l3 = 0000000000000000 | |
7722 | ldswa [%i2+%o4]0x89,%l3 ! %l3 = ffffffffff0000ff | |
7723 | ! Mem[00000000100c1408] = fcff000000000000, %f30 = 76c6c4ff fffffff8 | |
7724 | ldda [%i3+%o4]0x80,%f30 ! %f30 = fcff0000 00000000 | |
7725 | ! Mem[0000000030041400] = ffffffff, %l0 = 0000000023e3b364 | |
7726 | ldswa [%i1+%g0]0x89,%l0 ! %l0 = ffffffffffffffff | |
7727 | ! Mem[0000000010081408] = 0000519cf8962d02, %f24 = ff0000ff 0000007d | |
7728 | ldda [%i2+%o4]0x80,%f24 ! %f24 = 0000519c f8962d02 | |
7729 | ! Mem[0000000010041424] = 2164159c, %l4 = 00000000000000ff | |
7730 | ldsw [%i1+0x024],%l4 ! %l4 = 000000002164159c | |
7731 | ! Mem[0000000010081430] = 000000ff00000000, %l0 = ffffffffffffffff | |
7732 | ldx [%i2+0x030],%l0 ! %l0 = 000000ff00000000 | |
7733 | ! Mem[0000000010101400] = 0000000000000000, %f18 = 7d000000 f8ffffff | |
7734 | ldda [%i4+%g0]0x88,%f18 ! %f18 = 00000000 00000000 | |
7735 | ! Mem[0000000010081410] = ff512e7a, %f27 = b179bad6 | |
7736 | lda [%i2+%o5]0x80,%f27 ! %f27 = ff512e7a | |
7737 | ! Mem[0000000010141414] = 00007a12, %l3 = ffffffffff0000ff | |
7738 | lduwa [%i5+0x014]%asi,%l3 ! %l3 = 0000000000007a12 | |
7739 | ! Starting 10 instruction Store Burst | |
7740 | ! %l7 = 000000000000519c, Mem[0000000010081408] = 0000519cf8962d02 | |
7741 | stxa %l7,[%i2+%o4]0x80 ! Mem[0000000010081408] = 000000000000519c | |
7742 | ||
7743 | p0_label_190: | |
7744 | ! %f0 = 00000000 f8ffffff 9f3d5fc4 ffff0000 | |
7745 | ! %f4 = 127a0000 19000000 24000000 00001dff | |
7746 | ! %f8 = ffffffff b792cdbe fec67c63 ff9a234e | |
7747 | ! %f12 = 9b148fac ab9dbfbb ff000000 80182efa | |
7748 | stda %f0,[%i2]ASI_BLK_AIUS ! Block Store to 0000000030081400 | |
7749 | ! Mem[0000000010101400] = 00000000, %l2 = 0000000064b3e323 | |
7750 | ldstuba [%i4+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
7751 | ! %f26 = ff000000 ff512e7a, Mem[0000000030001400] = 00ffffff db7e6dd7 | |
7752 | stda %f26,[%i0+%g0]0x89 ! Mem[0000000030001400] = ff000000 ff512e7a | |
7753 | ! %l6 = 000000000000fffc, Mem[0000000030181410] = edf0a6df | |
7754 | stwa %l6,[%i6+%o5]0x89 ! Mem[0000000030181410] = 0000fffc | |
7755 | ! %f22 = 000000ff, Mem[0000000030041400] = ffffffff | |
7756 | sta %f22,[%i1+%g0]0x89 ! Mem[0000000030041400] = 000000ff | |
7757 | ! %l5 = ffffffffffff0000, Mem[0000000030081408] = c45f3d9f | |
7758 | stha %l5,[%i2+%o4]0x89 ! Mem[0000000030081408] = c45f0000 | |
7759 | ! %f24 = 0000519c f8962d02, %l5 = ffffffffffff0000 | |
7760 | ! Mem[0000000010001410] = ffffffffffffffff | |
7761 | add %i0,0x010,%g1 | |
7762 | stda %f24,[%g1+%l5]ASI_PST16_PL ! Mem[0000000010001410] = ffffffffffffffff | |
7763 | ! %l2 = 00000000, %l3 = 00007a12, Mem[0000000030041408] = 0000ffff 9c510000 | |
7764 | stda %l2,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000000 00007a12 | |
7765 | ! %f18 = 00000000 00000000, Mem[00000000100c1408] = 0000fffc 00000000 | |
7766 | stda %f18,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000 00000000 | |
7767 | ! Starting 10 instruction Load Burst | |
7768 | ! Mem[00000000300c1400] = ff0000ff, %l3 = 0000000000007a12 | |
7769 | lduwa [%i3+%g0]0x81,%l3 ! %l3 = 00000000ff0000ff | |
7770 | ||
7771 | ! Check Point 38 for processor 0 | |
7772 | ||
7773 | set p0_check_pt_data_38,%g4 | |
7774 | rd %ccr,%g5 ! %g5 = 44 | |
7775 | ldx [%g4+0x08],%g2 | |
7776 | cmp %l0,%g2 ! %l0 = 000000ff00000000 | |
7777 | bne %xcc,p0_reg_check_fail0 | |
7778 | mov 0xee0,%g1 | |
7779 | ldx [%g4+0x10],%g2 | |
7780 | cmp %l1,%g2 ! %l1 = ffffffffffffff00 | |
7781 | bne %xcc,p0_reg_check_fail1 | |
7782 | mov 0xee1,%g1 | |
7783 | ldx [%g4+0x18],%g2 | |
7784 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
7785 | bne %xcc,p0_reg_check_fail2 | |
7786 | mov 0xee2,%g1 | |
7787 | ldx [%g4+0x20],%g2 | |
7788 | cmp %l3,%g2 ! %l3 = 00000000ff0000ff | |
7789 | bne %xcc,p0_reg_check_fail3 | |
7790 | mov 0xee3,%g1 | |
7791 | ldx [%g4+0x28],%g2 | |
7792 | cmp %l4,%g2 ! %l4 = 000000002164159c | |
7793 | bne %xcc,p0_reg_check_fail4 | |
7794 | mov 0xee4,%g1 | |
7795 | ldx [%g4+0x30],%g2 | |
7796 | cmp %l5,%g2 ! %l5 = ffffffffffff0000 | |
7797 | bne %xcc,p0_reg_check_fail5 | |
7798 | mov 0xee5,%g1 | |
7799 | ldx [%g4+0x38],%g3 | |
7800 | std %f0,[%g4] | |
7801 | ldx [%g4],%g2 | |
7802 | cmp %g3,%g2 ! %f0 = 00000000 f8ffffff | |
7803 | bne %xcc,p0_freg_check_fail | |
7804 | mov 0xf00,%g1 | |
7805 | ldx [%g4+0x40],%g3 | |
7806 | std %f2,[%g4] | |
7807 | ldx [%g4],%g2 | |
7808 | cmp %g3,%g2 ! %f2 = 9f3d5fc4 ffff0000 | |
7809 | bne %xcc,p0_freg_check_fail | |
7810 | mov 0xf02,%g1 | |
7811 | ldx [%g4+0x48],%g3 | |
7812 | std %f4,[%g4] | |
7813 | ldx [%g4],%g2 | |
7814 | cmp %g3,%g2 ! %f4 = 127a0000 19000000 | |
7815 | bne %xcc,p0_freg_check_fail | |
7816 | mov 0xf04,%g1 | |
7817 | ldx [%g4+0x50],%g3 | |
7818 | std %f6,[%g4] | |
7819 | ldx [%g4],%g2 | |
7820 | cmp %g3,%g2 ! %f6 = 24000000 00001dff | |
7821 | bne %xcc,p0_freg_check_fail | |
7822 | mov 0xf06,%g1 | |
7823 | ldx [%g4+0x58],%g3 | |
7824 | std %f8,[%g4] | |
7825 | ldx [%g4],%g2 | |
7826 | cmp %g3,%g2 ! %f8 = ffffffff b792cdbe | |
7827 | bne %xcc,p0_freg_check_fail | |
7828 | mov 0xf08,%g1 | |
7829 | ldx [%g4+0x60],%g3 | |
7830 | std %f10,[%g4] | |
7831 | ldx [%g4],%g2 | |
7832 | cmp %g3,%g2 ! %f10 = fec67c63 ff9a234e | |
7833 | bne %xcc,p0_freg_check_fail | |
7834 | mov 0xf10,%g1 | |
7835 | ldx [%g4+0x68],%g3 | |
7836 | std %f12,[%g4] | |
7837 | ldx [%g4],%g2 | |
7838 | cmp %g3,%g2 ! %f12 = 9b148fac ab9dbfbb | |
7839 | bne %xcc,p0_freg_check_fail | |
7840 | mov 0xf12,%g1 | |
7841 | ldx [%g4+0x70],%g3 | |
7842 | std %f14,[%g4] | |
7843 | ldx [%g4],%g2 | |
7844 | cmp %g3,%g2 ! %f14 = ff000000 80182efa | |
7845 | bne %xcc,p0_freg_check_fail | |
7846 | mov 0xf14,%g1 | |
7847 | ldx [%g4+0x78],%g3 | |
7848 | std %f18,[%g4] | |
7849 | ldx [%g4],%g2 | |
7850 | cmp %g3,%g2 ! %f18 = 00000000 00000000 | |
7851 | bne %xcc,p0_freg_check_fail | |
7852 | mov 0xf18,%g1 | |
7853 | ldx [%g4+0x80],%g3 | |
7854 | std %f24,[%g4] | |
7855 | ldx [%g4],%g2 | |
7856 | cmp %g3,%g2 ! %f24 = 0000519c f8962d02 | |
7857 | bne %xcc,p0_freg_check_fail | |
7858 | mov 0xf24,%g1 | |
7859 | ldx [%g4+0x88],%g3 | |
7860 | std %f26,[%g4] | |
7861 | ldx [%g4],%g2 | |
7862 | cmp %g3,%g2 ! %f26 = ff000000 ff512e7a | |
7863 | bne %xcc,p0_freg_check_fail | |
7864 | mov 0xf26,%g1 | |
7865 | ldx [%g4+0x90],%g3 | |
7866 | std %f30,[%g4] | |
7867 | ldx [%g4],%g2 | |
7868 | cmp %g3,%g2 ! %f30 = fcff0000 00000000 | |
7869 | bne %xcc,p0_freg_check_fail | |
7870 | mov 0xf30,%g1 | |
7871 | ||
7872 | ! Check Point 38 completed | |
7873 | ||
7874 | ||
7875 | p0_label_191: | |
7876 | membar #Sync ! Added by membar checker (28) | |
7877 | ! Mem[0000000010081410] = ff512e7a, %l2 = 0000000000000000 | |
7878 | lduba [%i2+%o5]0x80,%l2 ! %l2 = 00000000000000ff | |
7879 | ! Mem[0000000010041400] = ffff0000fcf85e66, %l0 = 000000ff00000000 | |
7880 | ldxa [%i1+%g0]0x88,%l0 ! %l0 = ffff0000fcf85e66 | |
7881 | ! Mem[00000000100c1408] = 00000000, %l2 = 00000000000000ff | |
7882 | lduwa [%i3+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
7883 | ! Mem[0000000010181404] = fffffff8, %l7 = 000000000000519c | |
7884 | ldswa [%i6+0x004]%asi,%l7 ! %l7 = fffffffffffffff8 | |
7885 | ! %l0 = fcf85e66, %l1 = ffffff00, Mem[0000000030141410] = c976ff12 bf000000 | |
7886 | stda %l0,[%i5+%o5]0x89 ! Mem[0000000030141410] = fcf85e66 ffffff00 | |
7887 | ! Mem[0000000010041424] = 2164159c, %l2 = 0000000000000000 | |
7888 | lduba [%i1+0x027]%asi,%l2 ! %l2 = 000000000000009c | |
7889 | ! Mem[0000000030081400] = fffffff8 00000000, %l6 = 0000fffc, %l7 = fffffff8 | |
7890 | ldda [%i2+%g0]0x89,%l6 ! %l6 = 0000000000000000 00000000fffffff8 | |
7891 | ! Mem[0000000010041408] = 000000ffffffffff, %l5 = ffffffffffff0000 | |
7892 | ldxa [%i1+%o4]0x80,%l5 ! %l5 = 000000ffffffffff | |
7893 | ! Mem[0000000010181400] = ffc4c676, %l3 = 00000000ff0000ff | |
7894 | ldsba [%i6+%g0]0x88,%l3 ! %l3 = 0000000000000076 | |
7895 | ! Starting 10 instruction Store Burst | |
7896 | ! %l5 = 000000ffffffffff, Mem[0000000010081408] = 00000000 | |
7897 | stha %l5,[%i2+%o4]0x80 ! Mem[0000000010081408] = ffff0000 | |
7898 | ||
7899 | p0_label_192: | |
7900 | ! %l3 = 0000000000000076, Mem[0000000030081410] = 00007a12 | |
7901 | stha %l3,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00000076 | |
7902 | ! Mem[000000001000143a] = 000000ff, %l4 = 000000002164159c | |
7903 | ldstuba [%i0+0x03a]%asi,%l4 ! %l4 = 00000000000000ff | |
7904 | ! %f18 = 00000000, Mem[0000000010001408] = 00000000 | |
7905 | sta %f18,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000000 | |
7906 | ! %l2 = 000000000000009c, Mem[0000000030181408] = ff0000ff | |
7907 | stha %l2,[%i6+%o4]0x81 ! Mem[0000000030181408] = 009c00ff | |
7908 | ! %l2 = 000000000000009c, Mem[0000000010081408] = 9c5100000000ffff | |
7909 | stxa %l2,[%i2+%o4]0x88 ! Mem[0000000010081408] = 000000000000009c | |
7910 | ! %f26 = ff000000 ff512e7a, Mem[0000000010141400] = f8ffffff 00000000 | |
7911 | stda %f26,[%i5+%g0]0x88 ! Mem[0000000010141400] = ff000000 ff512e7a | |
7912 | ! %f8 = ffffffff b792cdbe, Mem[00000000100c1418] = 23e3b364 90da2bca | |
7913 | std %f8 ,[%i3+0x018] ! Mem[00000000100c1418] = ffffffff b792cdbe | |
7914 | ! Mem[0000000010041410] = b179bad6, %l0 = ffff0000fcf85e66 | |
7915 | ldstuba [%i1+%o5]0x80,%l0 ! %l0 = 000000b1000000ff | |
7916 | ! %f24 = 0000519c f8962d02, %l5 = 000000ffffffffff | |
7917 | ! Mem[00000000100c1420] = 9c15642176c6411f | |
7918 | add %i3,0x020,%g1 | |
7919 | stda %f24,[%g1+%l5]ASI_PST8_PL ! Mem[00000000100c1420] = 022d96f89c510000 | |
7920 | ! Starting 10 instruction Load Burst | |
7921 | ! Mem[0000000010141410] = 00000019, %l3 = 0000000000000076 | |
7922 | lduha [%i5+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
7923 | ||
7924 | p0_label_193: | |
7925 | ! Mem[0000000030001408] = 0000ffff, %l2 = 000000000000009c | |
7926 | ldswa [%i0+%o4]0x89,%l2 ! %l2 = 000000000000ffff | |
7927 | ! Mem[0000000030001410] = ff0000ff0000ffff, %f8 = ffffffff b792cdbe | |
7928 | ldda [%i0+%o5]0x81,%f8 ! %f8 = ff0000ff 0000ffff | |
7929 | ! Mem[0000000010141418] = ff1d0000, %l1 = ffffffffffffff00 | |
7930 | ldsba [%i5+0x01b]%asi,%l1 ! %l1 = 0000000000000000 | |
7931 | ! Mem[0000000030181400] = 66000000 00000000, %l4 = 00000000, %l5 = ffffffff | |
7932 | ldda [%i6+%g0]0x81,%l4 ! %l4 = 0000000066000000 0000000000000000 | |
7933 | ! Mem[00000000300c1408] = 00ff0000, %l6 = 0000000000000000 | |
7934 | ldsha [%i3+%o4]0x81,%l6 ! %l6 = 00000000000000ff | |
7935 | ! Mem[000000001000142c] = d1c43403, %l6 = 00000000000000ff | |
7936 | lduba [%i0+0x02d]%asi,%l6 ! %l6 = 00000000000000c4 | |
7937 | ! Mem[0000000021800140] = fffc1df6, %l4 = 0000000066000000 | |
7938 | ldsh [%o3+0x140],%l4 ! %l4 = fffffffffffffffc | |
7939 | ! Mem[0000000010001410] = ffffffffffffffff, %f16 = 7d000000 ff0000ff | |
7940 | ldda [%i0+%o5]0x80,%f16 ! %f16 = ffffffff ffffffff | |
7941 | ! Mem[0000000010101408] = ff0000ff 000000ff, %l4 = fffffffc, %l5 = 00000000 | |
7942 | ldda [%i4+0x008]%asi,%l4 ! %l4 = 00000000ff0000ff 00000000000000ff | |
7943 | ! Starting 10 instruction Store Burst | |
7944 | ! Mem[00000000100c1408] = 00000000, %l0 = 00000000000000b1 | |
7945 | ldstuba [%i3+0x008]%asi,%l0 ! %l0 = 00000000000000ff | |
7946 | ||
7947 | p0_label_194: | |
7948 | ! Mem[00000000100c1408] = 000000ff, %l4 = 00000000ff0000ff | |
7949 | swapa [%i3+%o4]0x88,%l4 ! %l4 = 00000000000000ff | |
7950 | ! Mem[0000000030041408] = 00000000, %l2 = 000000000000ffff | |
7951 | swapa [%i1+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
7952 | ! %l7 = 00000000fffffff8, Mem[0000000010001400] = dfa6f0ed | |
7953 | stwa %l7,[%i0+%g0]0x80 ! Mem[0000000010001400] = fffffff8 | |
7954 | ! %f4 = 127a0000 19000000, Mem[0000000010041408] = 000000ff ffffffff | |
7955 | stda %f4 ,[%i1+%o4]0x80 ! Mem[0000000010041408] = 127a0000 19000000 | |
7956 | ! Mem[0000000030041410] = 00000000, %l6 = 00000000000000c4 | |
7957 | swapa [%i1+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
7958 | ! %l5 = 00000000000000ff, Mem[0000000010141408] = ffff0000 | |
7959 | stba %l5,[%i5+%o4]0x88 ! Mem[0000000010141408] = ffff00ff | |
7960 | ! Mem[0000000010141408] = ffff00ff, %l5 = 00000000000000ff | |
7961 | swapa [%i5+%o4]0x88,%l5 ! %l5 = 00000000ffff00ff | |
7962 | ! Mem[0000000030141400] = 00000000, %l4 = 00000000000000ff | |
7963 | ldstuba [%i5+%g0]0x89,%l4 ! %l4 = 00000000000000ff | |
7964 | ! %l4 = 00000000, %l5 = ffff00ff, Mem[0000000010041400] = fcf85e66 ffff0000 | |
7965 | stda %l4,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 ffff00ff | |
7966 | ! Starting 10 instruction Load Burst | |
7967 | ! Mem[0000000010081408] = 0000009c, %f21 = 7d307e94 | |
7968 | lda [%i2+%o4]0x88,%f21 ! %f21 = 0000009c | |
7969 | ||
7970 | p0_label_195: | |
7971 | ! Mem[0000000030141400] = 000000ff, %l3 = 0000000000000000 | |
7972 | ldsba [%i5+%g0]0x89,%l3 ! %l3 = ffffffffffffffff | |
7973 | ! Mem[0000000030141410] = ffffff00fcf85e66, %l0 = 0000000000000000 | |
7974 | ldxa [%i5+%o5]0x89,%l0 ! %l0 = ffffff00fcf85e66 | |
7975 | ! Mem[0000000010141408] = 000000ff, %l3 = ffffffffffffffff | |
7976 | ldsba [%i5+%o4]0x88,%l3 ! %l3 = ffffffffffffffff | |
7977 | ! Mem[0000000030101400] = 1f41c676, %l6 = 0000000000000000 | |
7978 | lduha [%i4+%g0]0x89,%l6 ! %l6 = 000000000000c676 | |
7979 | ! Mem[0000000030181408] = 009c00ff, %l6 = 000000000000c676 | |
7980 | lduwa [%i6+%o4]0x81,%l6 ! %l6 = 00000000009c00ff | |
7981 | ! Mem[0000000030181400] = 00000066, %l1 = 0000000000000000 | |
7982 | lduba [%i6+%g0]0x89,%l1 ! %l1 = 0000000000000066 | |
7983 | ! Mem[0000000010181410] = d9d7a7d5, %l3 = ffffffffffffffff | |
7984 | ldswa [%i6+%o5]0x88,%l3 ! %l3 = ffffffffd9d7a7d5 | |
7985 | ! Mem[0000000010141400] = 7a2e51ff, %f4 = 127a0000 | |
7986 | ld [%i5+%g0],%f4 ! %f4 = 7a2e51ff | |
7987 | ! Mem[0000000030081408] = 00005fc4, %f0 = 00000000 | |
7988 | lda [%i2+%o4]0x81,%f0 ! %f0 = 00005fc4 | |
7989 | ! Starting 10 instruction Store Burst | |
7990 | ! %l4 = 0000000000000000, Mem[0000000010041410] = d6ba79ff | |
7991 | stwa %l4,[%i1+%o5]0x88 ! Mem[0000000010041410] = 00000000 | |
7992 | ||
7993 | ! Check Point 39 for processor 0 | |
7994 | ||
7995 | set p0_check_pt_data_39,%g4 | |
7996 | rd %ccr,%g5 ! %g5 = 44 | |
7997 | ldx [%g4+0x08],%g2 | |
7998 | cmp %l0,%g2 ! %l0 = ffffff00fcf85e66 | |
7999 | bne %xcc,p0_reg_check_fail0 | |
8000 | mov 0xee0,%g1 | |
8001 | ldx [%g4+0x10],%g2 | |
8002 | cmp %l1,%g2 ! %l1 = 0000000000000066 | |
8003 | bne %xcc,p0_reg_check_fail1 | |
8004 | mov 0xee1,%g1 | |
8005 | ldx [%g4+0x18],%g2 | |
8006 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
8007 | bne %xcc,p0_reg_check_fail2 | |
8008 | mov 0xee2,%g1 | |
8009 | ldx [%g4+0x20],%g2 | |
8010 | cmp %l3,%g2 ! %l3 = ffffffffd9d7a7d5 | |
8011 | bne %xcc,p0_reg_check_fail3 | |
8012 | mov 0xee3,%g1 | |
8013 | ldx [%g4+0x28],%g2 | |
8014 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
8015 | bne %xcc,p0_reg_check_fail4 | |
8016 | mov 0xee4,%g1 | |
8017 | ldx [%g4+0x30],%g2 | |
8018 | cmp %l5,%g2 ! %l5 = 00000000ffff00ff | |
8019 | bne %xcc,p0_reg_check_fail5 | |
8020 | mov 0xee5,%g1 | |
8021 | ldx [%g4+0x38],%g2 | |
8022 | cmp %l6,%g2 ! %l6 = 00000000009c00ff | |
8023 | bne %xcc,p0_reg_check_fail6 | |
8024 | mov 0xee6,%g1 | |
8025 | ldx [%g4+0x40],%g2 | |
8026 | cmp %l7,%g2 ! %l7 = 00000000fffffff8 | |
8027 | bne %xcc,p0_reg_check_fail7 | |
8028 | mov 0xee7,%g1 | |
8029 | ldx [%g4+0x48],%g3 | |
8030 | std %f0,[%g4] | |
8031 | ldx [%g4],%g2 | |
8032 | cmp %g3,%g2 ! %f0 = 00005fc4 f8ffffff | |
8033 | bne %xcc,p0_freg_check_fail | |
8034 | mov 0xf00,%g1 | |
8035 | ldx [%g4+0x50],%g3 | |
8036 | std %f4,[%g4] | |
8037 | ldx [%g4],%g2 | |
8038 | cmp %g3,%g2 ! %f4 = 7a2e51ff 19000000 | |
8039 | bne %xcc,p0_freg_check_fail | |
8040 | mov 0xf04,%g1 | |
8041 | ldx [%g4+0x58],%g3 | |
8042 | std %f6,[%g4] | |
8043 | ldx [%g4],%g2 | |
8044 | cmp %g3,%g2 ! %f6 = 24000000 00001dff | |
8045 | bne %xcc,p0_freg_check_fail | |
8046 | mov 0xf06,%g1 | |
8047 | ldx [%g4+0x60],%g3 | |
8048 | std %f8,[%g4] | |
8049 | ldx [%g4],%g2 | |
8050 | cmp %g3,%g2 ! %f8 = ff0000ff 0000ffff | |
8051 | bne %xcc,p0_freg_check_fail | |
8052 | mov 0xf08,%g1 | |
8053 | ldx [%g4+0x68],%g3 | |
8054 | std %f16,[%g4] | |
8055 | ldx [%g4],%g2 | |
8056 | cmp %g3,%g2 ! %f16 = ffffffff ffffffff | |
8057 | bne %xcc,p0_freg_check_fail | |
8058 | mov 0xf16,%g1 | |
8059 | ldx [%g4+0x70],%g3 | |
8060 | std %f20,[%g4] | |
8061 | ldx [%g4],%g2 | |
8062 | cmp %g3,%g2 ! %f20 = 00000000 0000009c | |
8063 | bne %xcc,p0_freg_check_fail | |
8064 | mov 0xf20,%g1 | |
8065 | ||
8066 | ! Check Point 39 completed | |
8067 | ||
8068 | ||
8069 | p0_label_196: | |
8070 | ! %f25 = f8962d02, Mem[0000000030081400] = 00000000 | |
8071 | sta %f25,[%i2+%g0]0x89 ! Mem[0000000030081400] = f8962d02 | |
8072 | ! Mem[00000000100c1408] = ff0000ff, %l1 = 0000000000000066 | |
8073 | ldstuba [%i3+%o4]0x80,%l1 ! %l1 = 000000ff000000ff | |
8074 | ! Mem[0000000010001428] = 00715eb7, %l7 = 00000000fffffff8 | |
8075 | ldstuba [%i0+0x028]%asi,%l7 ! %l7 = 00000000000000ff | |
8076 | ! Mem[0000000030141400] = 000000ff, %l1 = 00000000000000ff | |
8077 | ldstuba [%i5+%g0]0x89,%l1 ! %l1 = 000000ff000000ff | |
8078 | ! %f26 = ff000000 ff512e7a, %l3 = ffffffffd9d7a7d5 | |
8079 | ! Mem[0000000010041410] = 00000000fcf85e66 | |
8080 | add %i1,0x010,%g1 | |
8081 | stda %f26,[%g1+%l3]ASI_PST32_PL ! Mem[0000000010041410] = 7a2e51fffcf85e66 | |
8082 | ! %f2 = 9f3d5fc4, Mem[0000000010001400] = fffffff8 | |
8083 | sta %f2 ,[%i0+%g0]0x80 ! Mem[0000000010001400] = 9f3d5fc4 | |
8084 | ! Mem[0000000030001408] = 0000ffff, %l1 = 00000000000000ff | |
8085 | ldstuba [%i0+%o4]0x89,%l1 ! %l1 = 000000ff000000ff | |
8086 | ! Mem[0000000010001400] = 9f3d5fc4, %l1 = 00000000000000ff | |
8087 | swapa [%i0+%g0]0x80,%l1 ! %l1 = 000000009f3d5fc4 | |
8088 | ! %l2 = 00000000, %l3 = d9d7a7d5, Mem[0000000030181400] = 00000066 00000000 | |
8089 | stda %l2,[%i6+%g0]0x89 ! Mem[0000000030181400] = 00000000 d9d7a7d5 | |
8090 | ! Starting 10 instruction Load Burst | |
8091 | ! Mem[0000000010001408] = 00000000, %l1 = 000000009f3d5fc4 | |
8092 | ldswa [%i0+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
8093 | ||
8094 | p0_label_197: | |
8095 | ! Mem[0000000010081400] = 9c5100f8, %l5 = 00000000ffff00ff | |
8096 | lduha [%i2+%g0]0x88,%l5 ! %l5 = 00000000000000f8 | |
8097 | ! Mem[00000000300c1410] = 00000000, %l2 = 0000000000000000 | |
8098 | lduwa [%i3+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
8099 | ! Mem[0000000030141410] = fcf85e66, %l5 = 00000000000000f8 | |
8100 | lduha [%i5+%o5]0x89,%l5 ! %l5 = 0000000000005e66 | |
8101 | ! Mem[0000000010181400] = 76c6c4ff, %l5 = 0000000000005e66 | |
8102 | lduba [%i6+%g0]0x80,%l5 ! %l5 = 0000000000000076 | |
8103 | ! Mem[0000000030001410] = ff0000ff, %l2 = 0000000000000000 | |
8104 | ldswa [%i0+%o5]0x81,%l2 ! %l2 = ffffffffff0000ff | |
8105 | ! Mem[0000000010081410] = 7a2e51ff, %f8 = ff0000ff | |
8106 | lda [%i2+%o5]0x88,%f8 ! %f8 = 7a2e51ff | |
8107 | ! Mem[0000000030001410] = ff0000ff0000ffff, %f2 = 9f3d5fc4 ffff0000 | |
8108 | ldda [%i0+%o5]0x81,%f2 ! %f2 = ff0000ff 0000ffff | |
8109 | ! Mem[0000000030101410] = 00000066ffffff00, %l4 = 0000000000000000 | |
8110 | ldxa [%i4+%o5]0x81,%l4 ! %l4 = 00000066ffffff00 | |
8111 | ! Mem[0000000010041420] = 1f41c676, %l3 = ffffffffd9d7a7d5 | |
8112 | ldsha [%i1+0x022]%asi,%l3 ! %l3 = ffffffffffffc676 | |
8113 | ! Starting 10 instruction Store Burst | |
8114 | ! Mem[0000000030081400] = f8962d02, %l3 = ffffffffffffc676 | |
8115 | ldstuba [%i2+%g0]0x89,%l3 ! %l3 = 00000002000000ff | |
8116 | ||
8117 | p0_label_198: | |
8118 | ! Mem[000000001010140b] = ff0000ff, %l7 = 0000000000000000 | |
8119 | ldstuba [%i4+0x00b]%asi,%l7 ! %l7 = 000000ff000000ff | |
8120 | ! %l2 = ff0000ff, %l3 = 00000002, Mem[0000000010041400] = 00000000 ff00ffff | |
8121 | stda %l2,[%i1+0x000]%asi ! Mem[0000000010041400] = ff0000ff 00000002 | |
8122 | ! %f8 = 7a2e51ff 0000ffff, %l4 = 00000066ffffff00 | |
8123 | ! Mem[0000000030141430] = 0334d2d176c6c4fc | |
8124 | add %i5,0x030,%g1 | |
8125 | stda %f8,[%g1+%l4]ASI_PST8_S ! Mem[0000000030141430] = 0334d2d176c6c4fc | |
8126 | ! Mem[0000000010081408] = 0000009c, %l5 = 0000000000000076 | |
8127 | swapa [%i2+%o4]0x88,%l5 ! %l5 = 000000000000009c | |
8128 | ! %f1 = f8ffffff, Mem[0000000010101408] = ff0000ff | |
8129 | sta %f1 ,[%i4+0x008]%asi ! Mem[0000000010101408] = f8ffffff | |
8130 | ! %f22 = 000000ff 23e3b364, %l7 = 00000000000000ff | |
8131 | ! Mem[0000000010081430] = 000000ff00000000 | |
8132 | add %i2,0x030,%g1 | |
8133 | stda %f22,[%g1+%l7]ASI_PST16_PL ! Mem[0000000010081430] = 64b3e323ff000000 | |
8134 | ! Mem[0000000010181410] = d5a7d7d9, %l1 = 0000000000000000 | |
8135 | swapa [%i6+%o5]0x80,%l1 ! %l1 = 00000000d5a7d7d9 | |
8136 | ! %l2 = ff0000ff, %l3 = 00000002, Mem[0000000010141408] = ff000000 c45f3d9f | |
8137 | stda %l2,[%i5+%o4]0x80 ! Mem[0000000010141408] = ff0000ff 00000002 | |
8138 | ! %l5 = 000000000000009c, Mem[0000000030001410] = ff0000ff0000ffff | |
8139 | stxa %l5,[%i0+%o5]0x81 ! Mem[0000000030001410] = 000000000000009c | |
8140 | ! Starting 10 instruction Load Burst | |
8141 | ! Mem[0000000010001400] = 000000ff, %l2 = ffffffffff0000ff | |
8142 | lduba [%i0+%g0]0x80,%l2 ! %l2 = 0000000000000000 | |
8143 | ||
8144 | p0_label_199: | |
8145 | membar #Sync ! Added by membar checker (29) | |
8146 | ! Mem[0000000010041400] = ff0000ff 00000002 127a0000 19000000 | |
8147 | ! Mem[0000000010041410] = 7a2e51ff fcf85e66 000000ff 00b3e323 | |
8148 | ! Mem[0000000010041420] = 1f41c676 2164159c b179bad6 f8962d02 | |
8149 | ! Mem[0000000010041430] = 95077110 ff000000 b179bad6 f8962d02 | |
8150 | ldda [%i1]ASI_BLK_PL,%f0 ! Block Load from 0000000010041400 | |
8151 | ! Mem[0000000010101400] = 000000ff, %f27 = ff512e7a | |
8152 | lda [%i4+%g0]0x88,%f27 ! %f27 = 000000ff | |
8153 | ! Mem[0000000010081400] = f800519c, %l2 = 0000000000000000 | |
8154 | ldsba [%i2+%g0]0x80,%l2 ! %l2 = fffffffffffffff8 | |
8155 | ! Mem[0000000010141410] = 127a000019000000, %f16 = ffffffff ffffffff | |
8156 | ldda [%i5+%o5]0x88,%f16 ! %f16 = 127a0000 19000000 | |
8157 | ! Mem[0000000030181410] = 0000fffc, %l7 = 00000000000000ff | |
8158 | lduha [%i6+%o5]0x89,%l7 ! %l7 = 000000000000fffc | |
8159 | ! Mem[0000000030141410] = 665ef8fc, %l3 = 0000000000000002 | |
8160 | lduha [%i5+%o5]0x81,%l3 ! %l3 = 000000000000665e | |
8161 | ! Mem[0000000010141400] = 7a2e51ff, %l2 = fffffffffffffff8 | |
8162 | lduha [%i5+%g0]0x80,%l2 ! %l2 = 0000000000007a2e | |
8163 | ! Mem[00000000300c1410] = 00000000, %f17 = 19000000 | |
8164 | lda [%i3+%o5]0x89,%f17 ! %f17 = 00000000 | |
8165 | ! Mem[0000000010101408] = ff000000fffffff8, %f30 = fcff0000 00000000 | |
8166 | ldda [%i4+%o4]0x88,%f30 ! %f30 = ff000000 fffffff8 | |
8167 | ! Starting 10 instruction Store Burst | |
8168 | ! %f27 = 000000ff, Mem[00000000300c1410] = 00000000 | |
8169 | sta %f27,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 000000ff | |
8170 | ||
8171 | p0_label_200: | |
8172 | ! %l0 = fcf85e66, %l1 = d5a7d7d9, Mem[0000000010081408] = 76000000 00000000 | |
8173 | stda %l0,[%i2+%o4]0x80 ! Mem[0000000010081408] = fcf85e66 d5a7d7d9 | |
8174 | ! %f24 = 0000519c, Mem[0000000010001400] = ff000000 | |
8175 | sta %f24,[%i0+%g0]0x88 ! Mem[0000000010001400] = 0000519c | |
8176 | ! Mem[0000000010081408] = 665ef8fc, %l0 = ffffff00fcf85e66 | |
8177 | swapa [%i2+%o4]0x88,%l0 ! %l0 = 00000000665ef8fc | |
8178 | ! Mem[00000000300c1410] = 000000ff, %l3 = 000000000000665e | |
8179 | ldstuba [%i3+%o5]0x81,%l3 ! %l3 = 00000000000000ff | |
8180 | ! Mem[0000000030101410] = 00000066, %l5 = 000000000000009c | |
8181 | ldstuba [%i4+%o5]0x81,%l5 ! %l5 = 00000000000000ff | |
8182 | ! %l0 = 00000000665ef8fc, Mem[0000000010101408] = f8ffffff000000ff | |
8183 | stxa %l0,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000665ef8fc | |
8184 | ! Code Fragment 3 | |
8185 | p0_fragment_10: | |
8186 | ! %l0 = 00000000665ef8fc | |
8187 | setx 0x21091a3036e85bea,%g7,%l0 ! %l0 = 21091a3036e85bea | |
8188 | ! %l1 = 00000000d5a7d7d9 | |
8189 | setx 0xf1462257f8d67849,%g7,%l1 ! %l1 = f1462257f8d67849 | |
8190 | setx 0x1fe000, %g1, %g3 | |
8191 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
8192 | setx 0x1ffff8, %g1, %g2 | |
8193 | and %l0, %g2, %l0 | |
8194 | ta T_CHANGE_HPRIV | |
8195 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
8196 | ta T_CHANGE_NONHPRIV | |
8197 | ! %l0 = 21091a3036e85bea | |
8198 | setx 0xc3f185ff93655f5c,%g7,%l0 ! %l0 = c3f185ff93655f5c | |
8199 | ! %l1 = f1462257f8d67849 | |
8200 | setx 0xc4bedf2fd6337670,%g7,%l1 ! %l1 = c4bedf2fd6337670 | |
8201 | ! Mem[0000000030081410] = 76000000, %l4 = 00000066ffffff00 | |
8202 | swapa [%i2+%o5]0x81,%l4 ! %l4 = 0000000076000000 | |
8203 | ! Mem[0000000010041410] = 7a2e51ff, %l4 = 0000000076000000 | |
8204 | ldstuba [%i1+%o5]0x80,%l4 ! %l4 = 0000007a000000ff | |
8205 | ! Starting 10 instruction Load Burst | |
8206 | ! Mem[0000000030101410] = ff000066, %l2 = 0000000000007a2e | |
8207 | lduwa [%i4+%o5]0x81,%l2 ! %l2 = 00000000ff000066 | |
8208 | ||
8209 | ! Check Point 40 for processor 0 | |
8210 | ||
8211 | set p0_check_pt_data_40,%g4 | |
8212 | rd %ccr,%g5 ! %g5 = 44 | |
8213 | ldx [%g4+0x08],%g2 | |
8214 | cmp %l0,%g2 ! %l0 = c3f185ff93655f5c | |
8215 | bne %xcc,p0_reg_check_fail0 | |
8216 | mov 0xee0,%g1 | |
8217 | ldx [%g4+0x10],%g2 | |
8218 | cmp %l1,%g2 ! %l1 = c4bedf2fd6337670 | |
8219 | bne %xcc,p0_reg_check_fail1 | |
8220 | mov 0xee1,%g1 | |
8221 | ldx [%g4+0x18],%g2 | |
8222 | cmp %l2,%g2 ! %l2 = 00000000ff000066 | |
8223 | bne %xcc,p0_reg_check_fail2 | |
8224 | mov 0xee2,%g1 | |
8225 | ldx [%g4+0x20],%g2 | |
8226 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
8227 | bne %xcc,p0_reg_check_fail3 | |
8228 | mov 0xee3,%g1 | |
8229 | ldx [%g4+0x28],%g2 | |
8230 | cmp %l4,%g2 ! %l4 = 000000000000007a | |
8231 | bne %xcc,p0_reg_check_fail4 | |
8232 | mov 0xee4,%g1 | |
8233 | ldx [%g4+0x30],%g2 | |
8234 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
8235 | bne %xcc,p0_reg_check_fail5 | |
8236 | mov 0xee5,%g1 | |
8237 | ldx [%g4+0x38],%g2 | |
8238 | cmp %l7,%g2 ! %l7 = 000000000000fffc | |
8239 | bne %xcc,p0_reg_check_fail7 | |
8240 | mov 0xee7,%g1 | |
8241 | ldx [%g4+0x40],%g3 | |
8242 | std %f0,[%g4] | |
8243 | ldx [%g4],%g2 | |
8244 | cmp %g3,%g2 ! %f0 = 02000000 ff0000ff | |
8245 | bne %xcc,p0_freg_check_fail | |
8246 | mov 0xf00,%g1 | |
8247 | ldx [%g4+0x48],%g3 | |
8248 | std %f2,[%g4] | |
8249 | ldx [%g4],%g2 | |
8250 | cmp %g3,%g2 ! %f2 = 00000019 00007a12 | |
8251 | bne %xcc,p0_freg_check_fail | |
8252 | mov 0xf02,%g1 | |
8253 | ldx [%g4+0x50],%g3 | |
8254 | std %f4,[%g4] | |
8255 | ldx [%g4],%g2 | |
8256 | cmp %g3,%g2 ! %f4 = 665ef8fc ff512e7a | |
8257 | bne %xcc,p0_freg_check_fail | |
8258 | mov 0xf04,%g1 | |
8259 | ldx [%g4+0x58],%g3 | |
8260 | std %f6,[%g4] | |
8261 | ldx [%g4],%g2 | |
8262 | cmp %g3,%g2 ! %f6 = 23e3b300 ff000000 | |
8263 | bne %xcc,p0_freg_check_fail | |
8264 | mov 0xf06,%g1 | |
8265 | ldx [%g4+0x60],%g3 | |
8266 | std %f8,[%g4] | |
8267 | ldx [%g4],%g2 | |
8268 | cmp %g3,%g2 ! %f8 = 9c156421 76c6411f | |
8269 | bne %xcc,p0_freg_check_fail | |
8270 | mov 0xf08,%g1 | |
8271 | ldx [%g4+0x68],%g3 | |
8272 | std %f10,[%g4] | |
8273 | ldx [%g4],%g2 | |
8274 | cmp %g3,%g2 ! %f10 = 022d96f8 d6ba79b1 | |
8275 | bne %xcc,p0_freg_check_fail | |
8276 | mov 0xf10,%g1 | |
8277 | ldx [%g4+0x70],%g3 | |
8278 | std %f12,[%g4] | |
8279 | ldx [%g4],%g2 | |
8280 | cmp %g3,%g2 ! %f12 = 000000ff 10710795 | |
8281 | bne %xcc,p0_freg_check_fail | |
8282 | mov 0xf12,%g1 | |
8283 | ldx [%g4+0x78],%g3 | |
8284 | std %f14,[%g4] | |
8285 | ldx [%g4],%g2 | |
8286 | cmp %g3,%g2 ! %f14 = 022d96f8 d6ba79b1 | |
8287 | bne %xcc,p0_freg_check_fail | |
8288 | mov 0xf14,%g1 | |
8289 | ldx [%g4+0x80],%g3 | |
8290 | std %f16,[%g4] | |
8291 | ldx [%g4],%g2 | |
8292 | cmp %g3,%g2 ! %f16 = 127a0000 00000000 | |
8293 | bne %xcc,p0_freg_check_fail | |
8294 | mov 0xf16,%g1 | |
8295 | ldx [%g4+0x88],%g3 | |
8296 | std %f26,[%g4] | |
8297 | ldx [%g4],%g2 | |
8298 | cmp %g3,%g2 ! %f26 = ff000000 000000ff | |
8299 | bne %xcc,p0_freg_check_fail | |
8300 | mov 0xf26,%g1 | |
8301 | ldx [%g4+0x90],%g3 | |
8302 | std %f30,[%g4] | |
8303 | ldx [%g4],%g2 | |
8304 | cmp %g3,%g2 ! %f30 = ff000000 fffffff8 | |
8305 | bne %xcc,p0_freg_check_fail | |
8306 | mov 0xf30,%g1 | |
8307 | ||
8308 | ! Check Point 40 completed | |
8309 | ||
8310 | ||
8311 | p0_label_201: | |
8312 | ! Mem[0000000010041410] = ff512eff, %l6 = 00000000009c00ff | |
8313 | ldsba [%i1+%o5]0x88,%l6 ! %l6 = ffffffffffffffff | |
8314 | ! Mem[0000000010081400] = fcffffff9c5100f8, %f18 = 00000000 00000000 | |
8315 | ldda [%i2+%g0]0x88,%f18 ! %f18 = fcffffff 9c5100f8 | |
8316 | ! Mem[0000000030001410] = 00000000, %f19 = 9c5100f8 | |
8317 | lda [%i0+%o5]0x81,%f19 ! %f19 = 00000000 | |
8318 | ! Mem[0000000010141438] = fa2e1880000000ff, %f24 = 0000519c f8962d02 | |
8319 | ldda [%i5+0x038]%asi,%f24 ! %f24 = fa2e1880 000000ff | |
8320 | ! Mem[0000000030001410] = 00000000, %l5 = 0000000000000000 | |
8321 | lduha [%i0+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
8322 | ! Mem[0000000010041410] = ff512eff, %l0 = c3f185ff93655f5c | |
8323 | ldsha [%i1+%o5]0x88,%l0 ! %l0 = 0000000000002eff | |
8324 | ! Mem[0000000010001410] = ffffffff, %l1 = c4bedf2fd6337670 | |
8325 | lduba [%i0+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
8326 | ! Mem[0000000020800000] = 2e7a8470, %l5 = 0000000000000000 | |
8327 | ldsba [%o1+0x001]%asi,%l5 ! %l5 = 000000000000007a | |
8328 | ! Mem[0000000010001408] = 00000000 00000000, %l6 = ffffffff, %l7 = 0000fffc | |
8329 | ldda [%i0+0x008]%asi,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
8330 | ! Starting 10 instruction Store Burst | |
8331 | ! Mem[0000000030181410] = fcff0000, %l2 = 00000000ff000066 | |
8332 | swapa [%i6+%o5]0x81,%l2 ! %l2 = 00000000fcff0000 | |
8333 | ||
8334 | p0_label_202: | |
8335 | ! Mem[0000000030101408] = 00000000, %l5 = 000000000000007a | |
8336 | ldsha [%i4+%o4]0x81,%l5 ! %l5 = 0000000000000000 | |
8337 | ! %l2 = 00000000fcff0000, Mem[00000000100c1400] = ff00519c | |
8338 | stba %l2,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 0000519c | |
8339 | ! %l0 = 00002eff, %l1 = 000000ff, Mem[0000000010101400] = ff000000 00000000 | |
8340 | stda %l0,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00002eff 000000ff | |
8341 | ! %l2 = 00000000fcff0000, Mem[0000000030141408] = edf00000 | |
8342 | stha %l2,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 | |
8343 | ! %l2 = 00000000fcff0000, Mem[0000000010141410] = 127a000019000000 | |
8344 | stxa %l2,[%i5+%o5]0x88 ! Mem[0000000010141410] = 00000000fcff0000 | |
8345 | ! Mem[0000000030141408] = 00000000, %l0 = 0000000000002eff | |
8346 | swapa [%i5+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
8347 | ! %f20 = 00000000 0000009c, Mem[0000000010001408] = 00000000 00000000 | |
8348 | stda %f20,[%i0+%o4]0x88 ! Mem[0000000010001408] = 00000000 0000009c | |
8349 | ! %l3 = 0000000000000000, Mem[0000000030141400] = 76c6c4d9000000ff | |
8350 | stxa %l3,[%i5+%g0]0x89 ! Mem[0000000030141400] = 0000000000000000 | |
8351 | ! Mem[0000000030081410] = 00ffffff, %l2 = 00000000fcff0000 | |
8352 | ldstuba [%i2+%o5]0x89,%l2 ! %l2 = 000000ff000000ff | |
8353 | ! Starting 10 instruction Load Burst | |
8354 | ! Mem[00000000300c1410] = ff0000ff 7d307e94, %l6 = 00000000, %l7 = 00000000 | |
8355 | ldda [%i3+%o5]0x81,%l6 ! %l6 = 00000000ff0000ff 000000007d307e94 | |
8356 | ||
8357 | p0_label_203: | |
8358 | membar #Sync ! Added by membar checker (30) | |
8359 | ! Mem[0000000010001400] = 9c510000 0000ceff 9c000000 00000000 | |
8360 | ! Mem[0000000010001410] = ffffffff ffffffff 00002e7a 000000ff | |
8361 | ! Mem[0000000010001420] = 00000000 76c6c4ff ff715eb7 d1c43403 | |
8362 | ! Mem[0000000010001430] = 00000000 00ffffff 0000ffff 174573fc | |
8363 | ldda [%i0]ASI_BLK_PL,%f0 ! Block Load from 0000000010001400 | |
8364 | ! Mem[0000000010101400] = 00002eff 000000ff 00000000 665ef8fc | |
8365 | ! Mem[0000000010101410] = 00000000 ffffff55 ff000000 b179bad6 | |
8366 | ! Mem[0000000010101420] = ff000000 665ef8fc 665ef8fc edf0a6df | |
8367 | ! Mem[0000000010101430] = fffffeff 7d307e94 00000000 000000ff | |
8368 | ldda [%i4]ASI_BLK_AIUPL,%f0 ! Block Load from 0000000010101400 | |
8369 | ! Mem[00000000100c1400] = 0000519c, %l2 = 00000000000000ff | |
8370 | lduwa [%i3+%g0]0x80,%l2 ! %l2 = 000000000000519c | |
8371 | ! Mem[0000000010001438] = 0000ffff 174573fc, %l4 = 0000007a, %l5 = 00000000 | |
8372 | ldd [%i0+0x038],%l4 ! %l4 = 000000000000ffff 00000000174573fc | |
8373 | ! Mem[00000000300c1410] = 947e307dff0000ff, %l5 = 00000000174573fc | |
8374 | ldxa [%i3+%o5]0x89,%l5 ! %l5 = 947e307dff0000ff | |
8375 | ! Mem[00000000100c1410] = ff0000ff, %l0 = 0000000000000000 | |
8376 | lduwa [%i3+%o5]0x80,%l0 ! %l0 = 00000000ff0000ff | |
8377 | ! Mem[0000000010081410] = 7a2e51ff, %l5 = 947e307dff0000ff | |
8378 | ldsha [%i2+%o5]0x88,%l5 ! %l5 = 00000000000051ff | |
8379 | ! Mem[0000000030181410] = ff000066, %l0 = 00000000ff0000ff | |
8380 | lduha [%i6+%o5]0x81,%l0 ! %l0 = 000000000000ff00 | |
8381 | ! Mem[0000000030001410] = 00000000, %f28 = 00000000 | |
8382 | lda [%i0+%o5]0x81,%f28 ! %f28 = 00000000 | |
8383 | ! Starting 10 instruction Store Burst | |
8384 | ! %l6 = 00000000ff0000ff, Mem[0000000010041422] = 1f41c676 | |
8385 | stb %l6,[%i1+0x022] ! Mem[0000000010041420] = 1f41ff76 | |
8386 | ||
8387 | p0_label_204: | |
8388 | ! Mem[00000000300c1410] = ff0000ff, %l1 = 00000000000000ff | |
8389 | swapa [%i3+%o5]0x81,%l1 ! %l1 = 00000000ff0000ff | |
8390 | membar #Sync ! Added by membar checker (31) | |
8391 | ! %f28 = 00000000 ff000000, Mem[0000000010101408] = 00000000 665ef8fc | |
8392 | stda %f28,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000 ff000000 | |
8393 | ! Mem[0000000030181410] = 660000ff, %l6 = 00000000ff0000ff | |
8394 | ldstuba [%i6+%o5]0x89,%l6 ! %l6 = 000000ff000000ff | |
8395 | ! %f29 = ff000000, Mem[0000000030181410] = ff000066 | |
8396 | sta %f29,[%i6+%o5]0x81 ! Mem[0000000030181410] = ff000000 | |
8397 | ! %l0 = 0000ff00, %l1 = ff0000ff, Mem[0000000010181428] = ff000000 ff5100ff | |
8398 | std %l0,[%i6+0x028] ! Mem[0000000010181428] = 0000ff00 ff0000ff | |
8399 | ! %l7 = 000000007d307e94, Mem[0000000030081408] = 00005fc4 | |
8400 | stba %l7,[%i2+%o4]0x81 ! Mem[0000000030081408] = 94005fc4 | |
8401 | ! %l6 = 00000000000000ff, Mem[00000000300c1410] = 000000ff | |
8402 | stha %l6,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 00ff00ff | |
8403 | ! %l5 = 00000000000051ff, Mem[0000000010041408] = 127a0000 | |
8404 | stha %l5,[%i1+%o4]0x80 ! Mem[0000000010041408] = 51ff0000 | |
8405 | ! Mem[0000000021800080] = fcffa433, %l5 = 00000000000051ff | |
8406 | ldstub [%o3+0x080],%l5 ! %l5 = 000000fc000000ff | |
8407 | ! Starting 10 instruction Load Burst | |
8408 | ! Mem[0000000030181400] = 00000000, %f18 = fcffffff | |
8409 | lda [%i6+%g0]0x89,%f18 ! %f18 = 00000000 | |
8410 | ||
8411 | p0_label_205: | |
8412 | ! Mem[0000000030141408] = 00002eff, %f10 = dfa6f0ed | |
8413 | lda [%i5+%o4]0x89,%f10 ! %f10 = 00002eff | |
8414 | ! Mem[0000000010081410] = ff512e7affce0000, %f20 = 00000000 0000009c | |
8415 | ldda [%i2+%o5]0x80,%f20 ! %f20 = ff512e7a ffce0000 | |
8416 | ! Mem[0000000010041408] = 51ff0000, %l0 = 000000000000ff00 | |
8417 | lduba [%i1+0x009]%asi,%l0 ! %l0 = 00000000000000ff | |
8418 | ! Mem[000000001008141c] = 000000fc, %l0 = 00000000000000ff | |
8419 | lduha [%i2+0x01e]%asi,%l0 ! %l0 = 00000000000000fc | |
8420 | ! Mem[0000000010101410] = 00000000, %f1 = ff2e0000 | |
8421 | lda [%i4+%o5]0x80,%f1 ! %f1 = 00000000 | |
8422 | ! Mem[0000000010081410] = 7a2e51ff, %l5 = 00000000000000fc | |
8423 | lduha [%i2+%o5]0x88,%l5 ! %l5 = 00000000000051ff | |
8424 | ! Mem[0000000030141400] = 00000000, %l6 = 00000000000000ff | |
8425 | lduba [%i5+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
8426 | ! Mem[00000000100c1408] = ff0000ff, %l7 = 000000007d307e94 | |
8427 | ldsba [%i3+%o4]0x80,%l7 ! %l7 = ffffffffffffffff | |
8428 | ! Mem[0000000010141418] = ff1d0000, %l4 = 000000000000ffff | |
8429 | ldsh [%i5+0x01a],%l4 ! %l4 = 0000000000000000 | |
8430 | ! Starting 10 instruction Store Burst | |
8431 | ! Mem[0000000010141400] = ff512e7a, %l1 = 00000000ff0000ff | |
8432 | ldstuba [%i5+%g0]0x88,%l1 ! %l1 = 0000007a000000ff | |
8433 | ||
8434 | ! Check Point 41 for processor 0 | |
8435 | ||
8436 | set p0_check_pt_data_41,%g4 | |
8437 | rd %ccr,%g5 ! %g5 = 44 | |
8438 | ldx [%g4+0x08],%g2 | |
8439 | cmp %l0,%g2 ! %l0 = 00000000000000fc | |
8440 | bne %xcc,p0_reg_check_fail0 | |
8441 | mov 0xee0,%g1 | |
8442 | ldx [%g4+0x10],%g2 | |
8443 | cmp %l1,%g2 ! %l1 = 000000000000007a | |
8444 | bne %xcc,p0_reg_check_fail1 | |
8445 | mov 0xee1,%g1 | |
8446 | ldx [%g4+0x18],%g2 | |
8447 | cmp %l2,%g2 ! %l2 = 000000000000519c | |
8448 | bne %xcc,p0_reg_check_fail2 | |
8449 | mov 0xee2,%g1 | |
8450 | ldx [%g4+0x20],%g2 | |
8451 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
8452 | bne %xcc,p0_reg_check_fail4 | |
8453 | mov 0xee4,%g1 | |
8454 | ldx [%g4+0x28],%g2 | |
8455 | cmp %l5,%g2 ! %l5 = 00000000000051ff | |
8456 | bne %xcc,p0_reg_check_fail5 | |
8457 | mov 0xee5,%g1 | |
8458 | ldx [%g4+0x30],%g2 | |
8459 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
8460 | bne %xcc,p0_reg_check_fail6 | |
8461 | mov 0xee6,%g1 | |
8462 | ldx [%g4+0x38],%g2 | |
8463 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
8464 | bne %xcc,p0_reg_check_fail7 | |
8465 | mov 0xee7,%g1 | |
8466 | ldx [%g4+0x40],%g3 | |
8467 | std %f0,[%g4] | |
8468 | ldx [%g4],%g2 | |
8469 | cmp %g3,%g2 ! %f0 = ff000000 00000000 | |
8470 | bne %xcc,p0_freg_check_fail | |
8471 | mov 0xf00,%g1 | |
8472 | ldx [%g4+0x48],%g3 | |
8473 | std %f2,[%g4] | |
8474 | ldx [%g4],%g2 | |
8475 | cmp %g3,%g2 ! %f2 = fcf85e66 00000000 | |
8476 | bne %xcc,p0_freg_check_fail | |
8477 | mov 0xf02,%g1 | |
8478 | ldx [%g4+0x50],%g3 | |
8479 | std %f4,[%g4] | |
8480 | ldx [%g4],%g2 | |
8481 | cmp %g3,%g2 ! %f4 = 55ffffff 00000000 | |
8482 | bne %xcc,p0_freg_check_fail | |
8483 | mov 0xf04,%g1 | |
8484 | ldx [%g4+0x58],%g3 | |
8485 | std %f6,[%g4] | |
8486 | ldx [%g4],%g2 | |
8487 | cmp %g3,%g2 ! %f6 = d6ba79b1 000000ff | |
8488 | bne %xcc,p0_freg_check_fail | |
8489 | mov 0xf06,%g1 | |
8490 | ldx [%g4+0x60],%g3 | |
8491 | std %f8,[%g4] | |
8492 | ldx [%g4],%g2 | |
8493 | cmp %g3,%g2 ! %f8 = fcf85e66 000000ff | |
8494 | bne %xcc,p0_freg_check_fail | |
8495 | mov 0xf08,%g1 | |
8496 | ldx [%g4+0x68],%g3 | |
8497 | std %f10,[%g4] | |
8498 | ldx [%g4],%g2 | |
8499 | cmp %g3,%g2 ! %f10 = 00002eff fcf85e66 | |
8500 | bne %xcc,p0_freg_check_fail | |
8501 | mov 0xf10,%g1 | |
8502 | ldx [%g4+0x70],%g3 | |
8503 | std %f12,[%g4] | |
8504 | ldx [%g4],%g2 | |
8505 | cmp %g3,%g2 ! %f12 = 947e307d fffeffff | |
8506 | bne %xcc,p0_freg_check_fail | |
8507 | mov 0xf12,%g1 | |
8508 | ldx [%g4+0x78],%g3 | |
8509 | std %f14,[%g4] | |
8510 | ldx [%g4],%g2 | |
8511 | cmp %g3,%g2 ! %f14 = ff000000 00000000 | |
8512 | bne %xcc,p0_freg_check_fail | |
8513 | mov 0xf14,%g1 | |
8514 | ldx [%g4+0x80],%g3 | |
8515 | std %f18,[%g4] | |
8516 | ldx [%g4],%g2 | |
8517 | cmp %g3,%g2 ! %f18 = 00000000 00000000 | |
8518 | bne %xcc,p0_freg_check_fail | |
8519 | mov 0xf18,%g1 | |
8520 | ldx [%g4+0x88],%g3 | |
8521 | std %f20,[%g4] | |
8522 | ldx [%g4],%g2 | |
8523 | cmp %g3,%g2 ! %f20 = ff512e7a ffce0000 | |
8524 | bne %xcc,p0_freg_check_fail | |
8525 | mov 0xf20,%g1 | |
8526 | ldx [%g4+0x90],%g3 | |
8527 | std %f24,[%g4] | |
8528 | ldx [%g4],%g2 | |
8529 | cmp %g3,%g2 ! %f24 = fa2e1880 000000ff | |
8530 | bne %xcc,p0_freg_check_fail | |
8531 | mov 0xf24,%g1 | |
8532 | ldx [%g4+0x98],%g3 | |
8533 | std %f28,[%g4] | |
8534 | ldx [%g4],%g2 | |
8535 | cmp %g3,%g2 ! %f28 = 00000000 ff000000 | |
8536 | bne %xcc,p0_freg_check_fail | |
8537 | mov 0xf28,%g1 | |
8538 | ||
8539 | ! Check Point 41 completed | |
8540 | ||
8541 | ||
8542 | p0_label_206: | |
8543 | ! Mem[000000001000140c] = 00000000, %l7 = ffffffff, %l0 = 000000fc | |
8544 | add %i0,0x0c,%g1 | |
8545 | casa [%g1]0x80,%l7,%l0 ! %l0 = 0000000000000000 | |
8546 | ! %l0 = 0000000000000000, Mem[00000000100c1410] = ff0000ff | |
8547 | stba %l0,[%i3+%o5]0x88 ! Mem[00000000100c1410] = ff000000 | |
8548 | ! %l6 = 00000000, %l7 = ffffffff, Mem[0000000010141400] = ff2e51ff 000000ff | |
8549 | std %l6,[%i5+%g0] ! Mem[0000000010141400] = 00000000 ffffffff | |
8550 | ! %l1 = 000000000000007a, Mem[0000000030081410] = 00ffffff | |
8551 | stha %l1,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00ff007a | |
8552 | ! Mem[0000000010041410] = ff2e51ff, %l0 = 0000000000000000 | |
8553 | ldstuba [%i1+%o5]0x80,%l0 ! %l0 = 000000ff000000ff | |
8554 | ! %l4 = 0000000000000000, Mem[0000000010041408] = 51ff0000 | |
8555 | stba %l4,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00ff0000 | |
8556 | ! %l0 = 000000ff, %l1 = 0000007a, Mem[0000000010001410] = ffffffff ffffffff | |
8557 | stda %l0,[%i0+%o5]0x80 ! Mem[0000000010001410] = 000000ff 0000007a | |
8558 | ! %l7 = ffffffffffffffff, Mem[0000000010041430] = 95077110 | |
8559 | stw %l7,[%i1+0x030] ! Mem[0000000010041430] = ffffffff | |
8560 | ! %l6 = 0000000000000000, Mem[0000000010081400] = 9c5100f8 | |
8561 | stwa %l6,[%i2+%g0]0x88 ! Mem[0000000010081400] = 00000000 | |
8562 | ! Starting 10 instruction Load Burst | |
8563 | ! Mem[0000000030101410] = 660000ff, %l0 = 00000000000000ff | |
8564 | lduwa [%i4+%o5]0x89,%l0 ! %l0 = 00000000660000ff | |
8565 | ||
8566 | p0_label_207: | |
8567 | ! Mem[0000000010141408] = ff0000ff 00000002, %l2 = 0000519c, %l3 = 00000000 | |
8568 | ldda [%i5+%o4]0x80,%l2 ! %l2 = 00000000ff0000ff 0000000000000002 | |
8569 | ! Mem[0000000030081400] = ff2d96f8, %l3 = 0000000000000002 | |
8570 | ldsha [%i2+%g0]0x81,%l3 ! %l3 = ffffffffffffff2d | |
8571 | ! Mem[0000000010041408] = 00ff0000, %l7 = ffffffffffffffff | |
8572 | ldsha [%i1+%o4]0x80,%l7 ! %l7 = 00000000000000ff | |
8573 | ! Mem[0000000010001410] = 7a000000ff000000, %f24 = fa2e1880 000000ff | |
8574 | ldda [%i0+%o5]0x88,%f24 ! %f24 = 7a000000 ff000000 | |
8575 | ! Mem[0000000010041420] = 1f41ff762164159c, %l4 = 0000000000000000 | |
8576 | ldxa [%i1+0x020]%asi,%l4 ! %l4 = 1f41ff762164159c | |
8577 | ! Mem[0000000030001410] = 9c00000000000000, %l5 = 00000000000051ff | |
8578 | ldxa [%i0+%o5]0x89,%l5 ! %l5 = 9c00000000000000 | |
8579 | ! Mem[0000000010001430] = 0000000000ffffff, %l3 = ffffffffffffff2d | |
8580 | ldxa [%i0+0x030]%asi,%l3 ! %l3 = 0000000000ffffff | |
8581 | ! Mem[0000000010181410] = 00000000, %l6 = 0000000000000000 | |
8582 | ldsha [%i6+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
8583 | ! Mem[0000000030181408] = ff009c00, %l4 = 1f41ff762164159c | |
8584 | ldsba [%i6+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
8585 | ! Starting 10 instruction Store Burst | |
8586 | ! %l1 = 000000000000007a, Mem[0000000010101424] = 665ef8fc | |
8587 | stw %l1,[%i4+0x024] ! Mem[0000000010101424] = 0000007a | |
8588 | ||
8589 | p0_label_208: | |
8590 | ! Mem[0000000030141408] = ff2e0000, %l1 = 000000000000007a | |
8591 | ldstuba [%i5+%o4]0x81,%l1 ! %l1 = 000000ff000000ff | |
8592 | ! %f28 = 00000000, Mem[0000000030041410] = 000000c4 | |
8593 | sta %f28,[%i1+%o5]0x89 ! Mem[0000000030041410] = 00000000 | |
8594 | ! %f2 = fcf85e66, Mem[00000000100c1408] = ff0000ff | |
8595 | sta %f2 ,[%i3+%o4]0x88 ! Mem[00000000100c1408] = fcf85e66 | |
8596 | ! %f24 = 7a000000 ff000000, %l5 = 9c00000000000000 | |
8597 | ! Mem[0000000010141438] = fa2e1880000000ff | |
8598 | add %i5,0x038,%g1 | |
8599 | stda %f24,[%g1+%l5]ASI_PST8_PL ! Mem[0000000010141438] = fa2e1880000000ff | |
8600 | ! %f28 = 00000000, Mem[0000000010081400] = 00000000 | |
8601 | sta %f28,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 | |
8602 | ! %l5 = 9c00000000000000, Mem[0000000030101400] = 1f41c676 | |
8603 | stha %l5,[%i4+%g0]0x89 ! Mem[0000000030101400] = 1f410000 | |
8604 | ! %l2 = 00000000ff0000ff, Mem[0000000010181438] = 2a1a930b, %asi = 80 | |
8605 | stwa %l2,[%i6+0x038]%asi ! Mem[0000000010181438] = ff0000ff | |
8606 | ! Mem[0000000010141410] = 0000fffc00000000, %l1 = 00000000000000ff, %l3 = 0000000000ffffff | |
8607 | add %i5,0x10,%g1 | |
8608 | casxa [%g1]0x80,%l1,%l3 ! %l3 = 0000fffc00000000 | |
8609 | ! %f18 = 00000000 00000000, Mem[0000000010101408] = 00000000 000000ff | |
8610 | stda %f18,[%i4+%o4]0x88 ! Mem[0000000010101408] = 00000000 00000000 | |
8611 | ! Starting 10 instruction Load Burst | |
8612 | ! Mem[0000000010041400] = ff0000ff, %l6 = 0000000000000000 | |
8613 | ldsba [%i1+%g0]0x88,%l6 ! %l6 = ffffffffffffffff | |
8614 | ||
8615 | p0_label_209: | |
8616 | ! Mem[0000000030101410] = ff000066, %l5 = 9c00000000000000 | |
8617 | ldsba [%i4+%o5]0x81,%l5 ! %l5 = ffffffffffffffff | |
8618 | ! Mem[00000000300c1408] = 00ff0000, %l6 = ffffffffffffffff | |
8619 | lduha [%i3+%o4]0x81,%l6 ! %l6 = 00000000000000ff | |
8620 | ! Mem[0000000010101400] = ff2e0000, %l1 = 00000000000000ff | |
8621 | ldsba [%i4+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
8622 | ! Mem[0000000030101408] = 00000000 002e51ff, %l2 = ff0000ff, %l3 = 00000000 | |
8623 | ldda [%i4+%o4]0x81,%l2 ! %l2 = 0000000000000000 00000000002e51ff | |
8624 | ! Mem[0000000030041408] = 0000ffff, %l6 = 00000000000000ff | |
8625 | ldsba [%i1+%o4]0x89,%l6 ! %l6 = ffffffffffffffff | |
8626 | ! Mem[0000000010141410] = 0000fffc, %l5 = ffffffffffffffff | |
8627 | lduba [%i5+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
8628 | ! Mem[00000000201c0000] = 00ff9457, %l2 = 0000000000000000 | |
8629 | ldsha [%o0+0x000]%asi,%l2 ! %l2 = 00000000000000ff | |
8630 | ! Mem[0000000030141408] = ff00000000002eff, %f20 = ff512e7a ffce0000 | |
8631 | ldda [%i5+%o4]0x89,%f20 ! %f20 = ff000000 00002eff | |
8632 | ! Mem[0000000030181410] = 000000ff000000ff, %l4 = 0000000000000000 | |
8633 | ldxa [%i6+%o5]0x89,%l4 ! %l4 = 000000ff000000ff | |
8634 | ! Starting 10 instruction Store Burst | |
8635 | ! Mem[00000000300c1400] = ff0000ff, %l7 = 00000000000000ff | |
8636 | swapa [%i3+%g0]0x81,%l7 ! %l7 = 00000000ff0000ff | |
8637 | ||
8638 | p0_label_210: | |
8639 | ! %l7 = 00000000ff0000ff, Mem[0000000030141400] = 00000000 | |
8640 | stwa %l7,[%i5+%g0]0x89 ! Mem[0000000030141400] = ff0000ff | |
8641 | ! %l4 = 000000ff000000ff, Mem[0000000030101410] = 660000ff | |
8642 | stha %l4,[%i4+%o5]0x89 ! Mem[0000000030101410] = 660000ff | |
8643 | ! %f8 = fcf85e66 000000ff, Mem[0000000010041410] = ff2e51ff fcf85e66 | |
8644 | stda %f8 ,[%i1+%o5]0x80 ! Mem[0000000010041410] = fcf85e66 000000ff | |
8645 | ! Mem[00000000300c1400] = ff000000, %l0 = 00000000660000ff | |
8646 | ldstuba [%i3+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
8647 | ! %l4 = 000000ff000000ff, Mem[0000000030101410] = ff000066 | |
8648 | stwa %l4,[%i4+%o5]0x81 ! Mem[0000000030101410] = 000000ff | |
8649 | ! %l3 = 00000000002e51ff, Mem[0000000030181410] = 000000ff | |
8650 | stba %l3,[%i6+%o5]0x89 ! Mem[0000000030181410] = 000000ff | |
8651 | ! %l7 = 00000000ff0000ff, Mem[00000000100c1403] = 0000519c, %asi = 80 | |
8652 | stba %l7,[%i3+0x003]%asi ! Mem[00000000100c1400] = 000051ff | |
8653 | ! Mem[0000000010181410] = 00000000, %l0 = 0000000000000000 | |
8654 | swapa [%i6+%o5]0x88,%l0 ! %l0 = 0000000000000000 | |
8655 | ! %f28 = 00000000 ff000000, Mem[0000000010101400] = ff2e0000 ff000000 | |
8656 | stda %f28,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 ff000000 | |
8657 | ! Starting 10 instruction Load Burst | |
8658 | ! Mem[0000000010081400] = 00000000, %f17 = 00000000 | |
8659 | lda [%i2+%g0]0x80,%f17 ! %f17 = 00000000 | |
8660 | ||
8661 | ! Check Point 42 for processor 0 | |
8662 | ||
8663 | set p0_check_pt_data_42,%g4 | |
8664 | rd %ccr,%g5 ! %g5 = 44 | |
8665 | ldx [%g4+0x08],%g2 | |
8666 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
8667 | bne %xcc,p0_reg_check_fail0 | |
8668 | mov 0xee0,%g1 | |
8669 | ldx [%g4+0x10],%g2 | |
8670 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
8671 | bne %xcc,p0_reg_check_fail1 | |
8672 | mov 0xee1,%g1 | |
8673 | ldx [%g4+0x18],%g2 | |
8674 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
8675 | bne %xcc,p0_reg_check_fail2 | |
8676 | mov 0xee2,%g1 | |
8677 | ldx [%g4+0x20],%g2 | |
8678 | cmp %l3,%g2 ! %l3 = 00000000002e51ff | |
8679 | bne %xcc,p0_reg_check_fail3 | |
8680 | mov 0xee3,%g1 | |
8681 | ldx [%g4+0x28],%g2 | |
8682 | cmp %l4,%g2 ! %l4 = 000000ff000000ff | |
8683 | bne %xcc,p0_reg_check_fail4 | |
8684 | mov 0xee4,%g1 | |
8685 | ldx [%g4+0x30],%g2 | |
8686 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
8687 | bne %xcc,p0_reg_check_fail5 | |
8688 | mov 0xee5,%g1 | |
8689 | ldx [%g4+0x38],%g2 | |
8690 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
8691 | bne %xcc,p0_reg_check_fail6 | |
8692 | mov 0xee6,%g1 | |
8693 | ldx [%g4+0x40],%g2 | |
8694 | cmp %l7,%g2 ! %l7 = 00000000ff0000ff | |
8695 | bne %xcc,p0_reg_check_fail7 | |
8696 | mov 0xee7,%g1 | |
8697 | ldx [%g4+0x48],%g3 | |
8698 | std %f2,[%g4] | |
8699 | ldx [%g4],%g2 | |
8700 | cmp %g3,%g2 ! %f2 = fcf85e66 00000000 | |
8701 | bne %xcc,p0_freg_check_fail | |
8702 | mov 0xf02,%g1 | |
8703 | ldx [%g4+0x50],%g3 | |
8704 | std %f16,[%g4] | |
8705 | ldx [%g4],%g2 | |
8706 | cmp %g3,%g2 ! %f16 = 127a0000 00000000 | |
8707 | bne %xcc,p0_freg_check_fail | |
8708 | mov 0xf16,%g1 | |
8709 | ldx [%g4+0x58],%g3 | |
8710 | std %f20,[%g4] | |
8711 | ldx [%g4],%g2 | |
8712 | cmp %g3,%g2 ! %f20 = ff000000 00002eff | |
8713 | bne %xcc,p0_freg_check_fail | |
8714 | mov 0xf20,%g1 | |
8715 | ldx [%g4+0x60],%g3 | |
8716 | std %f24,[%g4] | |
8717 | ldx [%g4],%g2 | |
8718 | cmp %g3,%g2 ! %f24 = 7a000000 ff000000 | |
8719 | bne %xcc,p0_freg_check_fail | |
8720 | mov 0xf24,%g1 | |
8721 | ||
8722 | ! Check Point 42 completed | |
8723 | ||
8724 | ||
8725 | p0_label_211: | |
8726 | ! Mem[0000000030141408] = 00002eff, %l0 = 0000000000000000 | |
8727 | lduha [%i5+%o4]0x89,%l0 ! %l0 = 0000000000002eff | |
8728 | ! Mem[0000000010041400] = 02000000ff0000ff, %l7 = 00000000ff0000ff | |
8729 | ldxa [%i1+%g0]0x88,%l7 ! %l7 = 02000000ff0000ff | |
8730 | ! Mem[0000000030141410] = fcf85e66, %l1 = 0000000000000000 | |
8731 | lduha [%i5+%o5]0x89,%l1 ! %l1 = 0000000000005e66 | |
8732 | ! Mem[0000000030181408] = 009c00ff, %f17 = 00000000 | |
8733 | lda [%i6+%o4]0x81,%f17 ! %f17 = 009c00ff | |
8734 | ! Mem[0000000010181408] = 76000000, %l5 = 0000000000000000 | |
8735 | ldsba [%i6+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
8736 | ! Mem[0000000030081400] = f8962dff, %l2 = 00000000000000ff | |
8737 | ldsba [%i2+%g0]0x89,%l2 ! %l2 = ffffffffffffffff | |
8738 | ! Mem[0000000010101420] = ff0000000000007a, %l0 = 0000000000002eff | |
8739 | ldxa [%i4+0x020]%asi,%l0 ! %l0 = ff0000000000007a | |
8740 | ! Mem[0000000030081410] = 00ff007a, %l6 = ffffffffffffffff | |
8741 | ldswa [%i2+%o5]0x89,%l6 ! %l6 = 0000000000ff007a | |
8742 | ! Mem[00000000100c1408] = 665ef8fc, %l4 = 000000ff000000ff | |
8743 | ldsba [%i3+%o4]0x80,%l4 ! %l4 = 0000000000000066 | |
8744 | ! Starting 10 instruction Store Burst | |
8745 | ! Mem[0000000010041400] = ff0000ff, %l5 = 0000000000000000 | |
8746 | swapa [%i1+%g0]0x88,%l5 ! %l5 = 00000000ff0000ff | |
8747 | ||
8748 | p0_label_212: | |
8749 | ! %l1 = 0000000000005e66, Mem[0000000010141410] = 00000000fcff0000 | |
8750 | stxa %l1,[%i5+%o5]0x88 ! Mem[0000000010141410] = 0000000000005e66 | |
8751 | ! Mem[0000000010181400] = ffc4c676, %l1 = 0000000000005e66 | |
8752 | swapa [%i6+%g0]0x88,%l1 ! %l1 = 00000000ffc4c676 | |
8753 | ! Mem[0000000030101410] = 000000ff, %l6 = 0000000000ff007a | |
8754 | swapa [%i4+%o5]0x81,%l6 ! %l6 = 00000000000000ff | |
8755 | ! %f7 = 000000ff, Mem[0000000030101410] = 7a00ff00 | |
8756 | sta %f7 ,[%i4+%o5]0x89 ! Mem[0000000030101410] = 000000ff | |
8757 | ! %f14 = ff000000, Mem[0000000010041400] = 00000000 | |
8758 | sta %f14,[%i1+%g0]0x80 ! Mem[0000000010041400] = ff000000 | |
8759 | ! %l0 = ff0000000000007a, Mem[0000000030141410] = fcf85e66 | |
8760 | stha %l0,[%i5+%o5]0x89 ! Mem[0000000030141410] = fcf8007a | |
8761 | ! %l3 = 00000000002e51ff, Mem[0000000030041400] = 000000ff | |
8762 | stwa %l3,[%i1+%g0]0x89 ! Mem[0000000030041400] = 002e51ff | |
8763 | ! Mem[0000000030101410] = 000000ff, %l6 = 00000000000000ff | |
8764 | swapa [%i4+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
8765 | ! %f0 = ff000000 00000000 fcf85e66 00000000 | |
8766 | ! %f4 = 55ffffff 00000000 d6ba79b1 000000ff | |
8767 | ! %f8 = fcf85e66 000000ff 00002eff fcf85e66 | |
8768 | ! %f12 = 947e307d fffeffff ff000000 00000000 | |
8769 | stda %f0,[%i2]ASI_BLK_AIUP ! Block Store to 0000000010081400 | |
8770 | ! Starting 10 instruction Load Burst | |
8771 | ! Mem[0000000030181400] = 00000000, %l1 = 00000000ffc4c676 | |
8772 | lduba [%i6+%g0]0x81,%l1 ! %l1 = 0000000000000000 | |
8773 | ||
8774 | p0_label_213: | |
8775 | ! Mem[00000000300c1400] = ff0000ff, %l2 = ffffffffffffffff | |
8776 | lduwa [%i3+%g0]0x81,%l2 ! %l2 = 00000000ff0000ff | |
8777 | ! Mem[0000000010041420] = 1f41ff762164159c, %f22 = 000000ff 23e3b364 | |
8778 | ldd [%i1+0x020],%f22 ! %f22 = 1f41ff76 2164159c | |
8779 | ! Mem[00000000201c0000] = 00ff9457, %l7 = 02000000ff0000ff | |
8780 | ldsba [%o0+0x000]%asi,%l7 ! %l7 = 0000000000000000 | |
8781 | ! Mem[0000000010001408] = 9c000000, %l0 = ff0000000000007a | |
8782 | ldsba [%i0+%o4]0x80,%l0 ! %l0 = ffffffffffffff9c | |
8783 | ! Mem[000000001018142c] = ff0000ff, %l6 = 00000000000000ff | |
8784 | ldsh [%i6+0x02c],%l6 ! %l6 = ffffffffffffff00 | |
8785 | ! Mem[0000000010001430] = 0000000000ffffff, %f22 = 1f41ff76 2164159c | |
8786 | ldda [%i0+0x030]%asi,%f22 ! %f22 = 00000000 00ffffff | |
8787 | membar #Sync ! Added by membar checker (32) | |
8788 | ! Mem[0000000010081400] = ff00000000000000, %l1 = 0000000000000000 | |
8789 | ldxa [%i2+%g0]0x80,%l1 ! %l1 = ff00000000000000 | |
8790 | ! Mem[0000000030141400] = ff0000ff, %l7 = 0000000000000000 | |
8791 | lduwa [%i5+%g0]0x89,%l7 ! %l7 = 00000000ff0000ff | |
8792 | ! Mem[0000000030141400] = ff0000ff, %l2 = 00000000ff0000ff | |
8793 | lduba [%i5+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
8794 | ! Starting 10 instruction Store Burst | |
8795 | ! Code Fragment 4 | |
8796 | p0_fragment_11: | |
8797 | ! %l0 = ffffffffffffff9c | |
8798 | setx 0xce6b1e986c5f8900,%g7,%l0 ! %l0 = ce6b1e986c5f8900 | |
8799 | ! %l1 = ff00000000000000 | |
8800 | setx 0x47892ce84d64beb6,%g7,%l1 ! %l1 = 47892ce84d64beb6 | |
8801 | setx 0x7ff8, %g1, %g2 | |
8802 | and %l0, %g2, %l0 | |
8803 | setx 0xffffffff, %g1, %g2 | |
8804 | and %l1, %g2, %l1 | |
8805 | setx 0x100000000, %g1, %g2 | |
8806 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
8807 | ta T_CHANGE_HPRIV | |
8808 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
8809 | ta T_CHANGE_NONHPRIV | |
8810 | ! %l0 = ce6b1e986c5f8900 | |
8811 | setx 0xa4ef1ecf90793dab,%g7,%l0 ! %l0 = a4ef1ecf90793dab | |
8812 | ! %l1 = 47892ce84d64beb6 | |
8813 | setx 0x3739e8907663a3fa,%g7,%l1 ! %l1 = 3739e8907663a3fa | |
8814 | ||
8815 | p0_label_214: | |
8816 | ! %l5 = 00000000ff0000ff, Mem[0000000010141408] = ff0000ff | |
8817 | stba %l5,[%i5+%o4]0x80 ! Mem[0000000010141408] = ff0000ff | |
8818 | ! Mem[00000000300c1400] = ff0000ff, %l7 = 00000000ff0000ff | |
8819 | swapa [%i3+%g0]0x89,%l7 ! %l7 = 00000000ff0000ff | |
8820 | ! %l0 = a4ef1ecf90793dab, Mem[0000000030181400] = d9d7a7d500000000 | |
8821 | stxa %l0,[%i6+%g0]0x89 ! Mem[0000000030181400] = a4ef1ecf90793dab | |
8822 | ! %f4 = 55ffffff 00000000, Mem[0000000010101408] = 00000000 00000000 | |
8823 | stda %f4 ,[%i4+%o4]0x80 ! Mem[0000000010101408] = 55ffffff 00000000 | |
8824 | ! %l7 = 00000000ff0000ff, Mem[0000000010141410] = 665e0000 | |
8825 | stba %l7,[%i5+%o5]0x80 ! Mem[0000000010141410] = ff5e0000 | |
8826 | ! %f29 = ff000000, Mem[00000000300c1400] = ff0000ff | |
8827 | sta %f29,[%i3+%g0]0x89 ! Mem[00000000300c1400] = ff000000 | |
8828 | ! %l1 = 3739e8907663a3fa, Mem[0000000030001408] = ffff0000ff0000ff | |
8829 | stxa %l1,[%i0+%o4]0x81 ! Mem[0000000030001408] = 3739e8907663a3fa | |
8830 | ! %l7 = 00000000ff0000ff, Mem[0000000010041408] = 0000ff00 | |
8831 | stha %l7,[%i1+%o4]0x88 ! Mem[0000000010041408] = 000000ff | |
8832 | ! %l5 = 00000000ff0000ff, Mem[0000000010101408] = ffffff55 | |
8833 | stwa %l5,[%i4+%o4]0x88 ! Mem[0000000010101408] = ff0000ff | |
8834 | ! Starting 10 instruction Load Burst | |
8835 | ! Mem[0000000030181400] = 90793dab, %l5 = 00000000ff0000ff | |
8836 | lduba [%i6+%g0]0x89,%l5 ! %l5 = 00000000000000ab | |
8837 | ||
8838 | p0_label_215: | |
8839 | ! Mem[0000000010181408] = fcffffff76000000, %l1 = 3739e8907663a3fa | |
8840 | ldxa [%i6+%o4]0x88,%l1 ! %l1 = fcffffff76000000 | |
8841 | ! Mem[0000000020800040] = fffc7379, %l2 = 00000000000000ff | |
8842 | lduh [%o1+0x040],%l2 ! %l2 = 000000000000fffc | |
8843 | ! Mem[0000000010141408] = 02000000ff0000ff, %f14 = ff000000 00000000 | |
8844 | ldda [%i5+%o4]0x88,%f14 ! %f14 = 02000000 ff0000ff | |
8845 | ! Mem[0000000010041400] = ff000000, %l7 = 00000000ff0000ff | |
8846 | lduwa [%i1+%g0]0x80,%l7 ! %l7 = 00000000ff000000 | |
8847 | ! Mem[0000000010081400] = ff00000000000000, %f26 = ff000000 000000ff | |
8848 | ldda [%i2+0x000]%asi,%f26 ! %f26 = ff000000 00000000 | |
8849 | ! Mem[0000000010041420] = 1f41ff762164159c, %l6 = ffffffffffffff00 | |
8850 | ldxa [%i1+0x020]%asi,%l6 ! %l6 = 1f41ff762164159c | |
8851 | ! Mem[00000000100c1424] = 9c510000, %l5 = 00000000000000ab | |
8852 | ldsw [%i3+0x024],%l5 ! %l5 = ffffffff9c510000 | |
8853 | ! Mem[0000000010001408] = 000000000000009c, %l7 = 00000000ff000000 | |
8854 | ldxa [%i0+%o4]0x88,%l7 ! %l7 = 000000000000009c | |
8855 | ! Mem[0000000030101408] = 00000000, %l7 = 000000000000009c | |
8856 | lduha [%i4+%o4]0x81,%l7 ! %l7 = 0000000000000000 | |
8857 | ! Starting 10 instruction Store Burst | |
8858 | ! Mem[0000000020800000] = 2e7a8470, %l4 = 0000000000000066 | |
8859 | lduh [%o1+%g0],%l4 ! %l4 = 0000000000002e7a | |
8860 | ||
8861 | ! Check Point 43 for processor 0 | |
8862 | ||
8863 | set p0_check_pt_data_43,%g4 | |
8864 | rd %ccr,%g5 ! %g5 = 44 | |
8865 | ldx [%g4+0x08],%g2 | |
8866 | cmp %l0,%g2 ! %l0 = a4ef1ecf90793dab | |
8867 | bne %xcc,p0_reg_check_fail0 | |
8868 | mov 0xee0,%g1 | |
8869 | ldx [%g4+0x10],%g2 | |
8870 | cmp %l1,%g2 ! %l1 = fcffffff76000000 | |
8871 | bne %xcc,p0_reg_check_fail1 | |
8872 | mov 0xee1,%g1 | |
8873 | ldx [%g4+0x18],%g2 | |
8874 | cmp %l2,%g2 ! %l2 = 000000000000fffc | |
8875 | bne %xcc,p0_reg_check_fail2 | |
8876 | mov 0xee2,%g1 | |
8877 | ldx [%g4+0x20],%g2 | |
8878 | cmp %l4,%g2 ! %l4 = 0000000000002e7a | |
8879 | bne %xcc,p0_reg_check_fail4 | |
8880 | mov 0xee4,%g1 | |
8881 | ldx [%g4+0x28],%g2 | |
8882 | cmp %l5,%g2 ! %l5 = ffffffff9c510000 | |
8883 | bne %xcc,p0_reg_check_fail5 | |
8884 | mov 0xee5,%g1 | |
8885 | ldx [%g4+0x30],%g2 | |
8886 | cmp %l6,%g2 ! %l6 = 1f41ff762164159c | |
8887 | bne %xcc,p0_reg_check_fail6 | |
8888 | mov 0xee6,%g1 | |
8889 | ldx [%g4+0x38],%g2 | |
8890 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
8891 | bne %xcc,p0_reg_check_fail7 | |
8892 | mov 0xee7,%g1 | |
8893 | ldx [%g4+0x40],%g3 | |
8894 | std %f14,[%g4] | |
8895 | ldx [%g4],%g2 | |
8896 | cmp %g3,%g2 ! %f14 = 02000000 ff0000ff | |
8897 | bne %xcc,p0_freg_check_fail | |
8898 | mov 0xf14,%g1 | |
8899 | ldx [%g4+0x48],%g3 | |
8900 | std %f16,[%g4] | |
8901 | ldx [%g4],%g2 | |
8902 | cmp %g3,%g2 ! %f16 = 127a0000 009c00ff | |
8903 | bne %xcc,p0_freg_check_fail | |
8904 | mov 0xf16,%g1 | |
8905 | ldx [%g4+0x50],%g3 | |
8906 | std %f22,[%g4] | |
8907 | ldx [%g4],%g2 | |
8908 | cmp %g3,%g2 ! %f22 = 00000000 00ffffff | |
8909 | bne %xcc,p0_freg_check_fail | |
8910 | mov 0xf22,%g1 | |
8911 | ldx [%g4+0x58],%g3 | |
8912 | std %f26,[%g4] | |
8913 | ldx [%g4],%g2 | |
8914 | cmp %g3,%g2 ! %f26 = ff000000 00000000 | |
8915 | bne %xcc,p0_freg_check_fail | |
8916 | mov 0xf26,%g1 | |
8917 | ||
8918 | ! Check Point 43 completed | |
8919 | ||
8920 | ||
8921 | p0_label_216: | |
8922 | ! %f16 = 127a0000 009c00ff 00000000 00000000 | |
8923 | ! %f20 = ff000000 00002eff 00000000 00ffffff | |
8924 | ! %f24 = 7a000000 ff000000 ff000000 00000000 | |
8925 | ! %f28 = 00000000 ff000000 ff000000 fffffff8 | |
8926 | stda %f16,[%i6]ASI_BLK_AIUPL ! Block Store to 0000000010181400 | |
8927 | ! %f10 = 00002eff fcf85e66, %l6 = 1f41ff762164159c | |
8928 | ! Mem[0000000010141420] = becd92b7ffffffff | |
8929 | add %i5,0x020,%g1 | |
8930 | stda %f10,[%g1+%l6]ASI_PST8_P ! Mem[0000000010141420] = 00cd92fffcf8ffff | |
8931 | ! Mem[0000000010101410] = 00000000, %l4 = 0000000000002e7a | |
8932 | ldstuba [%i4+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
8933 | ! %l4 = 00000000, %l5 = 9c510000, Mem[0000000010041408] = 000000ff 00000019 | |
8934 | stda %l4,[%i1+%o4]0x88 ! Mem[0000000010041408] = 00000000 9c510000 | |
8935 | ! Mem[0000000010101408] = ff0000ff, %l2 = 000000000000fffc | |
8936 | swapa [%i4+%o4]0x80,%l2 ! %l2 = 00000000ff0000ff | |
8937 | ! Mem[0000000030001400] = ff512e7a, %l2 = 00000000ff0000ff | |
8938 | swapa [%i0+%g0]0x89,%l2 ! %l2 = 00000000ff512e7a | |
8939 | ! Mem[0000000030001400] = ff0000ff, %l3 = 00000000002e51ff | |
8940 | ldstuba [%i0+%g0]0x89,%l3 ! %l3 = 000000ff000000ff | |
8941 | ! Mem[0000000010041400] = 000000ff, %l0 = a4ef1ecf90793dab | |
8942 | swapa [%i1+%g0]0x88,%l0 ! %l0 = 00000000000000ff | |
8943 | ! %f1 = 00000000, Mem[0000000030141400] = ff0000ff | |
8944 | sta %f1 ,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000 | |
8945 | ! Starting 10 instruction Load Burst | |
8946 | ! Mem[0000000030101408] = 00000000, %l0 = 00000000000000ff | |
8947 | ldswa [%i4+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
8948 | ||
8949 | p0_label_217: | |
8950 | ! Mem[0000000010001410] = ff000000, %l2 = 00000000ff512e7a | |
8951 | lduha [%i0+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
8952 | ! Mem[00000000201c0000] = 00ff9457, %l3 = 00000000000000ff | |
8953 | ldsb [%o0+%g0],%l3 ! %l3 = 0000000000000000 | |
8954 | ! Mem[00000000300c1408] = 0000ff00, %l0 = 0000000000000000 | |
8955 | lduwa [%i3+%o4]0x89,%l0 ! %l0 = 000000000000ff00 | |
8956 | ! Mem[0000000030101408] = 00000000, %l7 = 0000000000000000 | |
8957 | ldsha [%i4+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
8958 | ! Mem[0000000030001400] = ff0000ff000000ff, %l6 = 1f41ff762164159c | |
8959 | ldxa [%i0+%g0]0x81,%l6 ! %l6 = ff0000ff000000ff | |
8960 | membar #Sync ! Added by membar checker (33) | |
8961 | ! Mem[0000000010181430] = 000000ff, %f9 = 000000ff | |
8962 | lda [%i6+0x030]%asi,%f9 ! %f9 = 000000ff | |
8963 | ! Mem[0000000010141410] = ff5e0000, %l4 = 0000000000000000 | |
8964 | ldswa [%i5+%o5]0x80,%l4 ! %l4 = ffffffffff5e0000 | |
8965 | ! Mem[0000000010141408] = ff0000ff, %l0 = 000000000000ff00 | |
8966 | lduba [%i5+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
8967 | ! Mem[0000000030001400] = ff0000ff, %l4 = ffffffffff5e0000 | |
8968 | lduwa [%i0+%g0]0x81,%l4 ! %l4 = 00000000ff0000ff | |
8969 | ! Starting 10 instruction Store Burst | |
8970 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010181400] = ff009c00 00007a12 | |
8971 | stda %l2,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000 00000000 | |
8972 | ||
8973 | p0_label_218: | |
8974 | ! Mem[00000000100c1414] = 000000fc, %l6 = ff0000ff000000ff, %asi = 80 | |
8975 | swapa [%i3+0x014]%asi,%l6 ! %l6 = 00000000000000fc | |
8976 | ! %l4 = 00000000ff0000ff, Mem[0000000030181400] = ab3d7990 | |
8977 | stha %l4,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00ff7990 | |
8978 | ! Mem[0000000010101414] = ffffff55, %l6 = 00000000000000fc | |
8979 | swap [%i4+0x014],%l6 ! %l6 = 00000000ffffff55 | |
8980 | ! Mem[0000000010001428] = ff715eb7, %l4 = 00000000ff0000ff | |
8981 | swap [%i0+0x028],%l4 ! %l4 = 00000000ff715eb7 | |
8982 | ! Mem[0000000010081413] = 55ffffff, %l2 = 0000000000000000 | |
8983 | ldstuba [%i2+0x013]%asi,%l2 ! %l2 = 000000ff000000ff | |
8984 | ! Mem[0000000010001400] = 9c5100000000ceff, %l4 = 00000000ff715eb7, %l7 = 0000000000000000 | |
8985 | casxa [%i0]0x80,%l4,%l7 ! %l7 = 9c5100000000ceff | |
8986 | ! Mem[00000000211c0000] = fffc1a4c, %l6 = 00000000ffffff55 | |
8987 | ldstuba [%o2+0x000]%asi,%l6 ! %l6 = 000000ff000000ff | |
8988 | ! %l4 = 00000000ff715eb7, Mem[0000000010181439] = f8ffffff | |
8989 | stb %l4,[%i6+0x039] ! Mem[0000000010181438] = f8b7ffff | |
8990 | ! %f7 = 000000ff, Mem[0000000010181400] = 00000000 | |
8991 | sta %f7 ,[%i6+%g0]0x88 ! Mem[0000000010181400] = 000000ff | |
8992 | ! Starting 10 instruction Load Burst | |
8993 | ! Mem[0000000030101408] = 00000000, %l7 = 9c5100000000ceff | |
8994 | ldswa [%i4+%o4]0x81,%l7 ! %l7 = 0000000000000000 | |
8995 | ||
8996 | p0_label_219: | |
8997 | ! Mem[0000000030001408] = faa3637690e83937, %f26 = ff000000 00000000 | |
8998 | ldda [%i0+%o4]0x89,%f26 ! %f26 = faa36376 90e83937 | |
8999 | ! Mem[0000000010041410] = fcf85e66 000000ff, %l2 = 000000ff, %l3 = 00000000 | |
9000 | ldd [%i1+%o5],%l2 ! %l2 = 00000000fcf85e66 00000000000000ff | |
9001 | ! Mem[00000000100c1410] = 000000ff 000000ff, %l6 = 000000ff, %l7 = 00000000 | |
9002 | ldda [%i3+%o5]0x80,%l6 ! %l6 = 00000000000000ff 00000000000000ff | |
9003 | ! Mem[00000000100c1408] = fcf85e66, %l4 = 00000000ff715eb7 | |
9004 | ldsba [%i3+%o4]0x88,%l4 ! %l4 = 0000000000000066 | |
9005 | ! Mem[0000000030081408] = c45f0094, %l2 = 00000000fcf85e66 | |
9006 | lduha [%i2+%o4]0x89,%l2 ! %l2 = 0000000000000094 | |
9007 | ! Mem[00000000100c1408] = 665ef8fc00000000, %l4 = 0000000000000066 | |
9008 | ldxa [%i3+%o4]0x80,%l4 ! %l4 = 665ef8fc00000000 | |
9009 | ! Mem[0000000010001400] = 0000519c, %l0 = 00000000000000ff | |
9010 | lduha [%i0+%g0]0x88,%l0 ! %l0 = 000000000000519c | |
9011 | ! Mem[0000000030081410] = 00ff007a, %l5 = ffffffff9c510000 | |
9012 | lduwa [%i2+%o5]0x89,%l5 ! %l5 = 0000000000ff007a | |
9013 | ! Mem[00000000100c142c] = 3d61d89c, %l5 = 0000000000ff007a | |
9014 | ldsw [%i3+0x02c],%l5 ! %l5 = 000000003d61d89c | |
9015 | ! Starting 10 instruction Store Burst | |
9016 | ! Mem[0000000010081408] = fcf85e66, %l4 = 665ef8fc00000000 | |
9017 | swapa [%i2+%o4]0x80,%l4 ! %l4 = 00000000fcf85e66 | |
9018 | ||
9019 | p0_label_220: | |
9020 | ! Mem[0000000010041424] = 2164159c, %l6 = 000000ff, %l3 = 000000ff | |
9021 | add %i1,0x24,%g1 | |
9022 | casa [%g1]0x80,%l6,%l3 ! %l3 = 000000002164159c | |
9023 | ! %l0 = 000000000000519c, Mem[0000000021800040] = 55ff1df3 | |
9024 | stb %l0,[%o3+0x040] ! Mem[0000000021800040] = 9cff1df3 | |
9025 | ! %f24 = 7a000000 ff000000, %l6 = 00000000000000ff | |
9026 | ! Mem[0000000030001430] = d9d7a7d510710795 | |
9027 | add %i0,0x030,%g1 | |
9028 | stda %f24,[%g1+%l6]ASI_PST16_S ! Mem[0000000030001430] = 7a000000ff000000 | |
9029 | ! %f0 = ff000000 00000000 fcf85e66 00000000 | |
9030 | ! %f4 = 55ffffff 00000000 d6ba79b1 000000ff | |
9031 | ! %f8 = fcf85e66 000000ff 00002eff fcf85e66 | |
9032 | ! %f12 = 947e307d fffeffff 02000000 ff0000ff | |
9033 | stda %f0,[%i1]ASI_BLK_S ! Block Store to 0000000030041400 | |
9034 | ! %l7 = 00000000000000ff, Mem[0000000010101408] = fcff0000 | |
9035 | stha %l7,[%i4+%o4]0x88 ! Mem[0000000010101408] = fcff00ff | |
9036 | ! %l6 = 00000000000000ff, Mem[0000000010081410] = 55ffffff | |
9037 | stba %l6,[%i2+%o5]0x80 ! Mem[0000000010081410] = ffffffff | |
9038 | ! %l5 = 000000003d61d89c, Mem[00000000201c0001] = 00ff9457 | |
9039 | stb %l5,[%o0+0x001] ! Mem[00000000201c0000] = 009c9457 | |
9040 | ! %l2 = 0000000000000094, Mem[0000000010101408] = fcff00ff | |
9041 | stwa %l2,[%i4+%o4]0x88 ! Mem[0000000010101408] = 00000094 | |
9042 | ! %f28 = 00000000 ff000000, Mem[0000000010081400] = ff000000 00000000 | |
9043 | stda %f28,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 ff000000 | |
9044 | ! Starting 10 instruction Load Burst | |
9045 | membar #Sync ! Added by membar checker (34) | |
9046 | ! Mem[0000000010041408] = 000000000000519c, %l3 = 000000002164159c | |
9047 | ldxa [%i1+%o4]0x80,%l3 ! %l3 = 000000000000519c | |
9048 | ||
9049 | ! Check Point 44 for processor 0 | |
9050 | ||
9051 | set p0_check_pt_data_44,%g4 | |
9052 | rd %ccr,%g5 ! %g5 = 44 | |
9053 | ldx [%g4+0x08],%g2 | |
9054 | cmp %l0,%g2 ! %l0 = 000000000000519c | |
9055 | bne %xcc,p0_reg_check_fail0 | |
9056 | mov 0xee0,%g1 | |
9057 | ldx [%g4+0x10],%g2 | |
9058 | cmp %l2,%g2 ! %l2 = 0000000000000094 | |
9059 | bne %xcc,p0_reg_check_fail2 | |
9060 | mov 0xee2,%g1 | |
9061 | ldx [%g4+0x18],%g2 | |
9062 | cmp %l3,%g2 ! %l3 = 000000000000519c | |
9063 | bne %xcc,p0_reg_check_fail3 | |
9064 | mov 0xee3,%g1 | |
9065 | ldx [%g4+0x20],%g2 | |
9066 | cmp %l4,%g2 ! %l4 = 00000000fcf85e66 | |
9067 | bne %xcc,p0_reg_check_fail4 | |
9068 | mov 0xee4,%g1 | |
9069 | ldx [%g4+0x28],%g2 | |
9070 | cmp %l5,%g2 ! %l5 = 000000003d61d89c | |
9071 | bne %xcc,p0_reg_check_fail5 | |
9072 | mov 0xee5,%g1 | |
9073 | ldx [%g4+0x30],%g2 | |
9074 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
9075 | bne %xcc,p0_reg_check_fail6 | |
9076 | mov 0xee6,%g1 | |
9077 | ldx [%g4+0x38],%g2 | |
9078 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
9079 | bne %xcc,p0_reg_check_fail7 | |
9080 | mov 0xee7,%g1 | |
9081 | ldx [%g4+0x40],%g3 | |
9082 | std %f2,[%g4] | |
9083 | ldx [%g4],%g2 | |
9084 | cmp %g3,%g2 ! %f2 = fcf85e66 00000000 | |
9085 | bne %xcc,p0_freg_check_fail | |
9086 | mov 0xf02,%g1 | |
9087 | ldx [%g4+0x48],%g3 | |
9088 | std %f6,[%g4] | |
9089 | ldx [%g4],%g2 | |
9090 | cmp %g3,%g2 ! %f6 = d6ba79b1 000000ff | |
9091 | bne %xcc,p0_freg_check_fail | |
9092 | mov 0xf06,%g1 | |
9093 | ldx [%g4+0x50],%g3 | |
9094 | std %f8,[%g4] | |
9095 | ldx [%g4],%g2 | |
9096 | cmp %g3,%g2 ! %f8 = fcf85e66 000000ff | |
9097 | bne %xcc,p0_freg_check_fail | |
9098 | mov 0xf08,%g1 | |
9099 | ldx [%g4+0x58],%g3 | |
9100 | std %f26,[%g4] | |
9101 | ldx [%g4],%g2 | |
9102 | cmp %g3,%g2 ! %f26 = faa36376 90e83937 | |
9103 | bne %xcc,p0_freg_check_fail | |
9104 | mov 0xf26,%g1 | |
9105 | ||
9106 | ! Check Point 44 completed | |
9107 | ||
9108 | ||
9109 | p0_label_221: | |
9110 | ! Mem[0000000010081430] = 947e307d, %l1 = fcffffff76000000 | |
9111 | lduw [%i2+0x030],%l1 ! %l1 = 00000000947e307d | |
9112 | ! Mem[0000000010001400] = 9c510000, %l3 = 000000000000519c | |
9113 | lduba [%i0+%g0]0x80,%l3 ! %l3 = 000000000000009c | |
9114 | ! Mem[00000000100c1408] = 665ef8fc, %l6 = 00000000000000ff | |
9115 | lduha [%i3+%o4]0x80,%l6 ! %l6 = 000000000000665e | |
9116 | ! Mem[0000000010081410] = ffffffff 00000000, %l6 = 0000665e, %l7 = 000000ff | |
9117 | ldda [%i2+%o5]0x80,%l6 ! %l6 = 00000000ffffffff 0000000000000000 | |
9118 | ! Mem[0000000030081400] = ff2d96f8f8ffffff, %f12 = 947e307d fffeffff | |
9119 | ldda [%i2+%g0]0x81,%f12 ! %f12 = ff2d96f8 f8ffffff | |
9120 | ! Mem[0000000010181430] = 000000ff, %l1 = 00000000947e307d | |
9121 | lduha [%i6+0x032]%asi,%l1 ! %l1 = 00000000000000ff | |
9122 | ! Mem[0000000010001408] = 9c00000000000000, %f16 = 127a0000 009c00ff | |
9123 | ldd [%i0+%o4],%f16 ! %f16 = 9c000000 00000000 | |
9124 | ! Mem[0000000010041408] = 000000000000519c, %f12 = ff2d96f8 f8ffffff | |
9125 | ldda [%i1+%o4]0x80,%f12 ! %f12 = 00000000 0000519c | |
9126 | ! Mem[0000000010041400] = ab3d7990, %l0 = 000000000000519c | |
9127 | lduha [%i1+%g0]0x80,%l0 ! %l0 = 000000000000ab3d | |
9128 | ! Starting 10 instruction Store Burst | |
9129 | ! %l4 = 00000000fcf85e66, Mem[0000000030101400] = 0000411fffce0000 | |
9130 | stxa %l4,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000fcf85e66 | |
9131 | ||
9132 | p0_label_222: | |
9133 | ! Mem[0000000010181418] = ffffff0000000000, %l7 = 0000000000000000, %l7 = 0000000000000000 | |
9134 | add %i6,0x18,%g1 | |
9135 | casxa [%g1]0x80,%l7,%l7 ! %l7 = ffffff0000000000 | |
9136 | ! %l6 = ffffffff, %l7 = 00000000, Mem[0000000030001400] = ff0000ff 000000ff | |
9137 | stda %l6,[%i0+%g0]0x81 ! Mem[0000000030001400] = ffffffff 00000000 | |
9138 | ! %l2 = 0000000000000094, Mem[00000000100c1410] = 000000ff | |
9139 | stha %l2,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 009400ff | |
9140 | ! %l7 = ffffff0000000000, Mem[000000001000140c] = 00000000, %asi = 80 | |
9141 | stwa %l7,[%i0+0x00c]%asi ! Mem[000000001000140c] = 00000000 | |
9142 | ! %l4 = 00000000fcf85e66, Mem[0000000030041410] = 55ffffff | |
9143 | stha %l4,[%i1+%o5]0x81 ! Mem[0000000030041410] = 5e66ffff | |
9144 | ! %l6 = ffffffff, %l7 = 00000000, Mem[0000000010101408] = 00000094 00000000 | |
9145 | stda %l6,[%i4+%o4]0x88 ! Mem[0000000010101408] = ffffffff 00000000 | |
9146 | ! Mem[0000000010001414] = 0000007a, %l3 = 000000000000009c | |
9147 | ldstuba [%i0+0x014]%asi,%l3 ! %l3 = 00000000000000ff | |
9148 | ! %f8 = fcf85e66 000000ff, %l3 = 0000000000000000 | |
9149 | ! Mem[0000000030141408] = ff2e0000000000ff | |
9150 | add %i5,0x008,%g1 | |
9151 | stda %f8,[%g1+%l3]ASI_PST8_SL ! Mem[0000000030141408] = ff2e0000000000ff | |
9152 | ! %l5 = 000000003d61d89c, Mem[000000001000142a] = ff0000ff, %asi = 80 | |
9153 | stba %l5,[%i0+0x02a]%asi ! Mem[0000000010001428] = ff009cff | |
9154 | ! Starting 10 instruction Load Burst | |
9155 | ! Mem[0000000030081400] = ff2d96f8 f8ffffff 94005fc4 ffff0000 | |
9156 | ! Mem[0000000030081410] = 7a00ff00 19000000 24000000 00001dff | |
9157 | ! Mem[0000000030081420] = ffffffff b792cdbe fec67c63 ff9a234e | |
9158 | ! Mem[0000000030081430] = 9b148fac ab9dbfbb ff000000 80182efa | |
9159 | ldda [%i2]ASI_BLK_AIUS,%f0 ! Block Load from 0000000030081400 | |
9160 | ||
9161 | p0_label_223: | |
9162 | ! Mem[0000000010101404] = 00000000, %f18 = 00000000 | |
9163 | ld [%i4+0x004],%f18 ! %f18 = 00000000 | |
9164 | ! Mem[0000000010181408] = 00000000, %l4 = 00000000fcf85e66 | |
9165 | lduwa [%i6+%o4]0x88,%l4 ! %l4 = 0000000000000000 | |
9166 | ! Mem[00000000300c1400] = ff000000, %l2 = 0000000000000094 | |
9167 | ldswa [%i3+%g0]0x89,%l2 ! %l2 = ffffffffff000000 | |
9168 | ! Mem[0000000010181430] = 000000ff00000000, %f16 = 9c000000 00000000 | |
9169 | ldd [%i6+0x030],%f16 ! %f16 = 000000ff 00000000 | |
9170 | ! Mem[0000000030101400] = 00000000fcf85e66, %l2 = ffffffffff000000 | |
9171 | ldxa [%i4+%g0]0x81,%l2 ! %l2 = 00000000fcf85e66 | |
9172 | ! Mem[0000000030141400] = 0000000000000000, %f18 = 00000000 00000000 | |
9173 | ldda [%i5+%g0]0x89,%f18 ! %f18 = 00000000 00000000 | |
9174 | ! Mem[0000000010001438] = 0000ffff 174573fc, %l4 = 00000000, %l5 = 3d61d89c | |
9175 | ldd [%i0+0x038],%l4 ! %l4 = 000000000000ffff 00000000174573fc | |
9176 | ! Mem[0000000030081400] = ff2d96f8 f8ffffff, %l2 = fcf85e66, %l3 = 00000000 | |
9177 | ldda [%i2+%g0]0x81,%l2 ! %l2 = 00000000ff2d96f8 00000000f8ffffff | |
9178 | ! Mem[00000000100c1408] = fcf85e66, %l0 = 000000000000ab3d | |
9179 | lduwa [%i3+%o4]0x88,%l0 ! %l0 = 00000000fcf85e66 | |
9180 | ! Starting 10 instruction Store Burst | |
9181 | ! Mem[00000000300c1400] = 000000ff, %l2 = 00000000ff2d96f8 | |
9182 | ldstuba [%i3+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
9183 | ||
9184 | p0_label_224: | |
9185 | ! %l4 = 0000ffff, %l5 = 174573fc, Mem[0000000030101410] = 000000ff 00ffffff | |
9186 | stda %l4,[%i4+%o5]0x89 ! Mem[0000000030101410] = 0000ffff 174573fc | |
9187 | ! %l4 = 0000ffff, %l5 = 174573fc, Mem[0000000030001400] = ffffffff 00000000 | |
9188 | stda %l4,[%i0+%g0]0x89 ! Mem[0000000030001400] = 0000ffff 174573fc | |
9189 | ! %f22 = 00000000 00ffffff, Mem[0000000010041408] = 00000000 9c510000 | |
9190 | stda %f22,[%i1+%o4]0x88 ! Mem[0000000010041408] = 00000000 00ffffff | |
9191 | ! %l0 = 00000000fcf85e66, Mem[0000000010001434] = 00ffffff | |
9192 | sth %l0,[%i0+0x034] ! Mem[0000000010001434] = 5e66ffff | |
9193 | ! %l1 = 00000000000000ff, Mem[0000000010081410] = ffffffff | |
9194 | stha %l1,[%i2+%o5]0x88 ! Mem[0000000010081410] = ffff00ff | |
9195 | ! Mem[0000000010081408] = 00000000, %l3 = 00000000f8ffffff | |
9196 | ldstuba [%i2+%o4]0x88,%l3 ! %l3 = 00000000000000ff | |
9197 | ! %f22 = 00000000 00ffffff, Mem[0000000030181410] = 000000ff 000000ff | |
9198 | stda %f22,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000 00ffffff | |
9199 | ! Mem[00000000300c1410] = ff00ff00, %l6 = 00000000ffffffff | |
9200 | ldstuba [%i3+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
9201 | membar #Sync ! Added by membar checker (35) | |
9202 | ! %l5 = 00000000174573fc, Mem[0000000030081400] = f8962dff | |
9203 | stwa %l5,[%i2+%g0]0x89 ! Mem[0000000030081400] = 174573fc | |
9204 | ! Starting 10 instruction Load Burst | |
9205 | ! Mem[0000000030101400] = 00000000, %l6 = 0000000000000000 | |
9206 | ldswa [%i4+%g0]0x89,%l6 ! %l6 = 0000000000000000 | |
9207 | ||
9208 | p0_label_225: | |
9209 | ! Mem[0000000010001410] = 000000ff ff00007a, %l0 = fcf85e66, %l1 = 000000ff | |
9210 | ldda [%i0+0x010]%asi,%l0 ! %l0 = 00000000000000ff 00000000ff00007a | |
9211 | ! Mem[0000000030081408] = c45f0094, %l0 = 00000000000000ff | |
9212 | ldswa [%i2+%o4]0x89,%l0 ! %l0 = ffffffffc45f0094 | |
9213 | ! Mem[0000000010141408] = 02000000ff0000ff, %l4 = 000000000000ffff | |
9214 | ldxa [%i5+%o4]0x88,%l4 ! %l4 = 02000000ff0000ff | |
9215 | ! Mem[0000000030141408] = ff00000000002eff, %l5 = 00000000174573fc | |
9216 | ldxa [%i5+%o4]0x89,%l5 ! %l5 = ff00000000002eff | |
9217 | ! Mem[0000000010181410] = ff2e0000, %l2 = 0000000000000000 | |
9218 | ldswa [%i6+%o5]0x80,%l2 ! %l2 = ffffffffff2e0000 | |
9219 | ! Mem[0000000030041410] = 5e66ffff, %l4 = 02000000ff0000ff | |
9220 | lduba [%i1+%o5]0x81,%l4 ! %l4 = 000000000000005e | |
9221 | ! Mem[0000000010101410] = 000000ff, %l7 = ffffff0000000000 | |
9222 | lduha [%i4+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
9223 | ! Mem[0000000010001414] = ff00007a, %f16 = 000000ff | |
9224 | ld [%i0+0x014],%f16 ! %f16 = ff00007a | |
9225 | ! %l2 = ffffffffff2e0000, Mem[0000000010101400] = 000000ff | |
9226 | stha %l2,[%i4+%g0]0x80 ! Mem[0000000010101400] = 000000ff | |
9227 | ! Starting 10 instruction Store Burst | |
9228 | ! Mem[0000000030001400] = 0000ffff, %l5 = ff00000000002eff | |
9229 | ldstuba [%i0+%g0]0x89,%l5 ! %l5 = 000000ff000000ff | |
9230 | ||
9231 | ! Check Point 45 for processor 0 | |
9232 | ||
9233 | set p0_check_pt_data_45,%g4 | |
9234 | rd %ccr,%g5 ! %g5 = 44 | |
9235 | ldx [%g4+0x08],%g2 | |
9236 | cmp %l0,%g2 ! %l0 = ffffffffc45f0094 | |
9237 | bne %xcc,p0_reg_check_fail0 | |
9238 | mov 0xee0,%g1 | |
9239 | ldx [%g4+0x10],%g2 | |
9240 | cmp %l1,%g2 ! %l1 = 00000000ff00007a | |
9241 | bne %xcc,p0_reg_check_fail1 | |
9242 | mov 0xee1,%g1 | |
9243 | ldx [%g4+0x18],%g2 | |
9244 | cmp %l2,%g2 ! %l2 = ffffffffff2e0000 | |
9245 | bne %xcc,p0_reg_check_fail2 | |
9246 | mov 0xee2,%g1 | |
9247 | ldx [%g4+0x20],%g2 | |
9248 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
9249 | bne %xcc,p0_reg_check_fail3 | |
9250 | mov 0xee3,%g1 | |
9251 | ldx [%g4+0x28],%g2 | |
9252 | cmp %l4,%g2 ! %l4 = 000000000000005e | |
9253 | bne %xcc,p0_reg_check_fail4 | |
9254 | mov 0xee4,%g1 | |
9255 | ldx [%g4+0x30],%g2 | |
9256 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
9257 | bne %xcc,p0_reg_check_fail5 | |
9258 | mov 0xee5,%g1 | |
9259 | ldx [%g4+0x38],%g2 | |
9260 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
9261 | bne %xcc,p0_reg_check_fail6 | |
9262 | mov 0xee6,%g1 | |
9263 | ldx [%g4+0x40],%g2 | |
9264 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
9265 | bne %xcc,p0_reg_check_fail7 | |
9266 | mov 0xee7,%g1 | |
9267 | ldx [%g4+0x48],%g3 | |
9268 | std %f0,[%g4] | |
9269 | ldx [%g4],%g2 | |
9270 | cmp %g3,%g2 ! %f0 = ff2d96f8 f8ffffff | |
9271 | bne %xcc,p0_freg_check_fail | |
9272 | mov 0xf00,%g1 | |
9273 | ldx [%g4+0x50],%g3 | |
9274 | std %f2,[%g4] | |
9275 | ldx [%g4],%g2 | |
9276 | cmp %g3,%g2 ! %f2 = 94005fc4 ffff0000 | |
9277 | bne %xcc,p0_freg_check_fail | |
9278 | mov 0xf02,%g1 | |
9279 | ldx [%g4+0x58],%g3 | |
9280 | std %f4,[%g4] | |
9281 | ldx [%g4],%g2 | |
9282 | cmp %g3,%g2 ! %f4 = 7a00ff00 19000000 | |
9283 | bne %xcc,p0_freg_check_fail | |
9284 | mov 0xf04,%g1 | |
9285 | ldx [%g4+0x60],%g3 | |
9286 | std %f6,[%g4] | |
9287 | ldx [%g4],%g2 | |
9288 | cmp %g3,%g2 ! %f6 = 24000000 00001dff | |
9289 | bne %xcc,p0_freg_check_fail | |
9290 | mov 0xf06,%g1 | |
9291 | ldx [%g4+0x68],%g3 | |
9292 | std %f8,[%g4] | |
9293 | ldx [%g4],%g2 | |
9294 | cmp %g3,%g2 ! %f8 = ffffffff b792cdbe | |
9295 | bne %xcc,p0_freg_check_fail | |
9296 | mov 0xf08,%g1 | |
9297 | ldx [%g4+0x70],%g3 | |
9298 | std %f10,[%g4] | |
9299 | ldx [%g4],%g2 | |
9300 | cmp %g3,%g2 ! %f10 = fec67c63 ff9a234e | |
9301 | bne %xcc,p0_freg_check_fail | |
9302 | mov 0xf10,%g1 | |
9303 | ldx [%g4+0x78],%g3 | |
9304 | std %f12,[%g4] | |
9305 | ldx [%g4],%g2 | |
9306 | cmp %g3,%g2 ! %f12 = 9b148fac ab9dbfbb | |
9307 | bne %xcc,p0_freg_check_fail | |
9308 | mov 0xf12,%g1 | |
9309 | ldx [%g4+0x80],%g3 | |
9310 | std %f14,[%g4] | |
9311 | ldx [%g4],%g2 | |
9312 | cmp %g3,%g2 ! %f14 = ff000000 80182efa | |
9313 | bne %xcc,p0_freg_check_fail | |
9314 | mov 0xf14,%g1 | |
9315 | ldx [%g4+0x88],%g3 | |
9316 | std %f16,[%g4] | |
9317 | ldx [%g4],%g2 | |
9318 | cmp %g3,%g2 ! %f16 = ff00007a 00000000 | |
9319 | bne %xcc,p0_freg_check_fail | |
9320 | mov 0xf16,%g1 | |
9321 | ldx [%g4+0x90],%g3 | |
9322 | std %f18,[%g4] | |
9323 | ldx [%g4],%g2 | |
9324 | cmp %g3,%g2 ! %f18 = 00000000 00000000 | |
9325 | bne %xcc,p0_freg_check_fail | |
9326 | mov 0xf18,%g1 | |
9327 | ||
9328 | ! Check Point 45 completed | |
9329 | ||
9330 | ||
9331 | p0_label_226: | |
9332 | ! %f12 = 9b148fac ab9dbfbb, Mem[0000000030041410] = 5e66ffff 00000000 | |
9333 | stda %f12,[%i1+%o5]0x81 ! Mem[0000000030041410] = 9b148fac ab9dbfbb | |
9334 | ! Mem[0000000010081408] = ff00000000000000, %l5 = 00000000000000ff, %l1 = 00000000ff00007a | |
9335 | add %i2,0x08,%g1 | |
9336 | casxa [%g1]0x80,%l5,%l1 ! %l1 = ff00000000000000 | |
9337 | ! Mem[0000000030001410] = 00000000, %l0 = ffffffffc45f0094 | |
9338 | ldstuba [%i0+%o5]0x89,%l0 ! %l0 = 00000000000000ff | |
9339 | ! %l5 = 00000000000000ff, Mem[0000000030001408] = 90e83937 | |
9340 | stwa %l5,[%i0+%o4]0x89 ! Mem[0000000030001408] = 000000ff | |
9341 | ! %f14 = ff000000 80182efa, %l6 = 0000000000000000 | |
9342 | ! Mem[0000000010101428] = 665ef8fcedf0a6df | |
9343 | add %i4,0x028,%g1 | |
9344 | stda %f14,[%g1+%l6]ASI_PST16_P ! Mem[0000000010101428] = 665ef8fcedf0a6df | |
9345 | ! %l0 = 0000000000000000, Mem[00000000100c1408] = 665ef8fc | |
9346 | stha %l0,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 0000f8fc | |
9347 | ! Mem[0000000010101400] = ff000000, %l2 = ffffffffff2e0000 | |
9348 | swapa [%i4+%g0]0x88,%l2 ! %l2 = 00000000ff000000 | |
9349 | ! Mem[0000000030101400] = 00000000, %l2 = 00000000ff000000 | |
9350 | swapa [%i4+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
9351 | ! %l1 = ff00000000000000, Mem[0000000010001430] = 000000005e66ffff | |
9352 | stx %l1,[%i0+0x030] ! Mem[0000000010001430] = ff00000000000000 | |
9353 | ! Starting 10 instruction Load Burst | |
9354 | ! Mem[0000000010101400] = ff2e0000, %l4 = 000000000000005e | |
9355 | ldsba [%i4+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
9356 | ||
9357 | p0_label_227: | |
9358 | ! Mem[0000000010001400] = 0000519c, %f25 = ff000000 | |
9359 | lda [%i0+%g0]0x88,%f25 ! %f25 = 0000519c | |
9360 | ! Mem[0000000030141400] = 00000000, %f28 = 00000000 | |
9361 | lda [%i5+%g0]0x81,%f28 ! %f28 = 00000000 | |
9362 | ! Mem[0000000010001434] = 00000000, %l6 = 0000000000000000 | |
9363 | lduha [%i0+0x034]%asi,%l6 ! %l6 = 0000000000000000 | |
9364 | ! Mem[0000000010141408] = ff0000ff, %l5 = 00000000000000ff | |
9365 | lduba [%i5+%o4]0x80,%l5 ! %l5 = 00000000000000ff | |
9366 | ! Mem[0000000030081400] = fc734517f8ffffff, %f14 = ff000000 80182efa | |
9367 | ldda [%i2+%g0]0x81,%f14 ! %f14 = fc734517 f8ffffff | |
9368 | ! Mem[0000000010141438] = fa2e1880, %l7 = 00000000000000ff | |
9369 | ldsb [%i5+0x03a],%l7 ! %l7 = 0000000000000018 | |
9370 | ! Mem[0000000010181418] = ffffff00, %l5 = 00000000000000ff | |
9371 | lduha [%i6+0x018]%asi,%l5 ! %l5 = 000000000000ffff | |
9372 | ! Mem[0000000010001408] = 9c00000000000000, %f6 = 24000000 00001dff | |
9373 | ldda [%i0+%o4]0x80,%f6 ! %f6 = 9c000000 00000000 | |
9374 | ! Mem[0000000010081410] = ff00ffff, %l0 = 0000000000000000 | |
9375 | lduba [%i2+0x012]%asi,%l0 ! %l0 = 00000000000000ff | |
9376 | ! Starting 10 instruction Store Burst | |
9377 | ! %l0 = 00000000000000ff, Mem[0000000010081400] = 00000000ff000000 | |
9378 | stxa %l0,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000000000ff | |
9379 | ||
9380 | p0_label_228: | |
9381 | ! Mem[0000000010001408] = 9c000000, %l5 = 000000000000ffff | |
9382 | ldstuba [%i0+%o4]0x80,%l5 ! %l5 = 0000009c000000ff | |
9383 | ! %f26 = faa36376 90e83937, Mem[0000000010041410] = fcf85e66 000000ff | |
9384 | stda %f26,[%i1+%o5]0x80 ! Mem[0000000010041410] = faa36376 90e83937 | |
9385 | ! Mem[0000000010181408] = 0000000000000000, %l2 = 0000000000000000, %l0 = 00000000000000ff | |
9386 | add %i6,0x08,%g1 | |
9387 | casxa [%g1]0x80,%l2,%l0 ! %l0 = 0000000000000000 | |
9388 | ! %f8 = ffffffff b792cdbe, Mem[0000000030181410] = ffffff00 00000000 | |
9389 | stda %f8 ,[%i6+%o5]0x81 ! Mem[0000000030181410] = ffffffff b792cdbe | |
9390 | ! %l6 = 0000000000000000, Mem[0000000030001400] = 0000ffff | |
9391 | stha %l6,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00000000 | |
9392 | ! %f6 = 9c000000, Mem[0000000030081410] = 7a00ff00 | |
9393 | sta %f6 ,[%i2+%o5]0x81 ! Mem[0000000030081410] = 9c000000 | |
9394 | ! Mem[0000000010141438] = fa2e1880, %l2 = 00000000, %l6 = 00000000 | |
9395 | add %i5,0x38,%g1 | |
9396 | casa [%g1]0x80,%l2,%l6 ! %l6 = 00000000fa2e1880 | |
9397 | ! %l3 = 0000000000000000, Mem[0000000010181433] = 000000ff | |
9398 | stb %l3,[%i6+0x033] ! Mem[0000000010181430] = 00000000 | |
9399 | ! Mem[0000000030141400] = 00000000, %l3 = 0000000000000000 | |
9400 | swapa [%i5+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
9401 | ! Starting 10 instruction Load Burst | |
9402 | ! Mem[00000000100c1400] = 000051ff, %l5 = 000000000000009c | |
9403 | lduwa [%i3+%g0]0x80,%l5 ! %l5 = 00000000000051ff | |
9404 | ||
9405 | p0_label_229: | |
9406 | ! %l6 = fa2e1880, %l7 = 00000018, Mem[0000000030101400] = ff000000 fcf85e66 | |
9407 | stda %l6,[%i4+%g0]0x81 ! Mem[0000000030101400] = fa2e1880 00000018 | |
9408 | ! Mem[0000000030081410] = 0000009c, %l7 = 0000000000000018 | |
9409 | ldstuba [%i2+%o5]0x89,%l7 ! %l7 = 0000009c000000ff | |
9410 | ! Mem[0000000010041408] = 00ffffff, %l3 = 0000000000000000 | |
9411 | lduba [%i1+%o4]0x88,%l3 ! %l3 = 00000000000000ff | |
9412 | ! Mem[0000000030001408] = ff000000, %l0 = 0000000000000000 | |
9413 | lduha [%i0+%o4]0x81,%l0 ! %l0 = 000000000000ff00 | |
9414 | ! Mem[0000000010141400] = 00000000, %l2 = 0000000000000000 | |
9415 | ldsba [%i5+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
9416 | ! Mem[00000000211c0000] = fffc1a4c, %l0 = 000000000000ff00 | |
9417 | ldsba [%o2+0x000]%asi,%l0 ! %l0 = ffffffffffffffff | |
9418 | ! Mem[00000000201c0000] = 009c9457, %l2 = 0000000000000000 | |
9419 | ldub [%o0+%g0],%l2 ! %l2 = 0000000000000000 | |
9420 | ! Mem[0000000010181410] = ff2e0000 000000ff, %l4 = 00000000, %l5 = 000051ff | |
9421 | ldda [%i6+%o5]0x80,%l4 ! %l4 = 00000000ff2e0000 00000000000000ff | |
9422 | ! Mem[0000000030001400] = 00000000fc734517, %l2 = 0000000000000000 | |
9423 | ldxa [%i0+%g0]0x81,%l2 ! %l2 = 00000000fc734517 | |
9424 | ! Starting 10 instruction Store Burst | |
9425 | ! %l5 = 00000000000000ff, Mem[0000000030081400] = fc734517 | |
9426 | stha %l5,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00ff4517 | |
9427 | ||
9428 | p0_label_230: | |
9429 | ! Mem[00000000100c1410] = 009400ff, %l3 = 00000000000000ff | |
9430 | swapa [%i3+%o5]0x80,%l3 ! %l3 = 00000000009400ff | |
9431 | ! Mem[0000000010101410] = 000000ff, %l6 = 00000000fa2e1880 | |
9432 | swapa [%i4+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
9433 | ! %l4 = ff2e0000, %l5 = 000000ff, Mem[0000000010001410] = 000000ff ff00007a | |
9434 | std %l4,[%i0+%o5] ! Mem[0000000010001410] = ff2e0000 000000ff | |
9435 | ! Mem[00000000100c1400] = 000051ff, %l1 = ff00000000000000 | |
9436 | ldstuba [%i3+%g0]0x80,%l1 ! %l1 = 00000000000000ff | |
9437 | ! %l4 = 00000000ff2e0000, Mem[00000000300c1410] = ff00ffff | |
9438 | stha %l4,[%i3+%o5]0x89 ! Mem[00000000300c1410] = ff000000 | |
9439 | ! %f10 = fec67c63 ff9a234e, Mem[00000000300c1408] = 0000ff00 000000ff | |
9440 | stda %f10,[%i3+%o4]0x89 ! Mem[00000000300c1408] = fec67c63 ff9a234e | |
9441 | ! %f14 = fc734517 f8ffffff, %l3 = 00000000009400ff | |
9442 | ! Mem[0000000030041408] = fcf85e6600000000 | |
9443 | add %i1,0x008,%g1 | |
9444 | stda %f14,[%g1+%l3]ASI_PST16_SL ! Mem[0000000030041408] = fffffff8174573fc | |
9445 | ! %l2 = 00000000fc734517, Mem[0000000030141408] = ff2e0000 | |
9446 | stwa %l2,[%i5+%o4]0x81 ! Mem[0000000030141408] = fc734517 | |
9447 | ! Mem[0000000030181408] = 009c00ff, %l7 = 000000000000009c | |
9448 | swapa [%i6+%o4]0x81,%l7 ! %l7 = 00000000009c00ff | |
9449 | ! Starting 10 instruction Load Burst | |
9450 | ! Mem[0000000010141410] = ff5e0000 00000000, %l6 = 000000ff, %l7 = 009c00ff | |
9451 | ldda [%i5+0x010]%asi,%l6 ! %l6 = 00000000ff5e0000 0000000000000000 | |
9452 | ||
9453 | ! Check Point 46 for processor 0 | |
9454 | ||
9455 | set p0_check_pt_data_46,%g4 | |
9456 | rd %ccr,%g5 ! %g5 = 44 | |
9457 | ldx [%g4+0x08],%g2 | |
9458 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
9459 | bne %xcc,p0_reg_check_fail0 | |
9460 | mov 0xee0,%g1 | |
9461 | ldx [%g4+0x10],%g2 | |
9462 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
9463 | bne %xcc,p0_reg_check_fail1 | |
9464 | mov 0xee1,%g1 | |
9465 | ldx [%g4+0x18],%g2 | |
9466 | cmp %l2,%g2 ! %l2 = 00000000fc734517 | |
9467 | bne %xcc,p0_reg_check_fail2 | |
9468 | mov 0xee2,%g1 | |
9469 | ldx [%g4+0x20],%g2 | |
9470 | cmp %l3,%g2 ! %l3 = 00000000009400ff | |
9471 | bne %xcc,p0_reg_check_fail3 | |
9472 | mov 0xee3,%g1 | |
9473 | ldx [%g4+0x28],%g2 | |
9474 | cmp %l4,%g2 ! %l4 = 00000000ff2e0000 | |
9475 | bne %xcc,p0_reg_check_fail4 | |
9476 | mov 0xee4,%g1 | |
9477 | ldx [%g4+0x30],%g2 | |
9478 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
9479 | bne %xcc,p0_reg_check_fail5 | |
9480 | mov 0xee5,%g1 | |
9481 | ldx [%g4+0x38],%g2 | |
9482 | cmp %l6,%g2 ! %l6 = 00000000ff5e0000 | |
9483 | bne %xcc,p0_reg_check_fail6 | |
9484 | mov 0xee6,%g1 | |
9485 | ldx [%g4+0x40],%g2 | |
9486 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
9487 | bne %xcc,p0_reg_check_fail7 | |
9488 | mov 0xee7,%g1 | |
9489 | ldx [%g4+0x48],%g3 | |
9490 | std %f4,[%g4] | |
9491 | ldx [%g4],%g2 | |
9492 | cmp %g3,%g2 ! %f4 = 7a00ff00 19000000 | |
9493 | bne %xcc,p0_freg_check_fail | |
9494 | mov 0xf04,%g1 | |
9495 | ldx [%g4+0x50],%g3 | |
9496 | std %f6,[%g4] | |
9497 | ldx [%g4],%g2 | |
9498 | cmp %g3,%g2 ! %f6 = 9c000000 00000000 | |
9499 | bne %xcc,p0_freg_check_fail | |
9500 | mov 0xf06,%g1 | |
9501 | ldx [%g4+0x58],%g3 | |
9502 | std %f14,[%g4] | |
9503 | ldx [%g4],%g2 | |
9504 | cmp %g3,%g2 ! %f14 = fc734517 f8ffffff | |
9505 | bne %xcc,p0_freg_check_fail | |
9506 | mov 0xf14,%g1 | |
9507 | ldx [%g4+0x60],%g3 | |
9508 | std %f24,[%g4] | |
9509 | ldx [%g4],%g2 | |
9510 | cmp %g3,%g2 ! %f24 = 7a000000 0000519c | |
9511 | bne %xcc,p0_freg_check_fail | |
9512 | mov 0xf24,%g1 | |
9513 | ldx [%g4+0x68],%g3 | |
9514 | std %f28,[%g4] | |
9515 | ldx [%g4],%g2 | |
9516 | cmp %g3,%g2 ! %f28 = 00000000 ff000000 | |
9517 | bne %xcc,p0_freg_check_fail | |
9518 | mov 0xf28,%g1 | |
9519 | ||
9520 | ! Check Point 46 completed | |
9521 | ||
9522 | ||
9523 | p0_label_231: | |
9524 | ! Mem[0000000010101410] = 80182efa, %l7 = 0000000000000000 | |
9525 | lduwa [%i4+%o5]0x80,%l7 ! %l7 = 0000000080182efa | |
9526 | ! Mem[00000000100c1400] = ff0051ff, %l2 = 00000000fc734517 | |
9527 | lduha [%i3+%g0]0x80,%l2 ! %l2 = 000000000000ff00 | |
9528 | ! Mem[0000000010081410] = ffff00ff, %l0 = ffffffffffffffff | |
9529 | lduwa [%i2+%o5]0x88,%l0 ! %l0 = 00000000ffff00ff | |
9530 | ! Mem[0000000010181410] = ff00000000002eff, %f30 = ff000000 fffffff8 | |
9531 | ldda [%i6+%o5]0x88,%f30 ! %f30 = ff000000 00002eff | |
9532 | ! Mem[0000000010041400] = 90793dab, %l0 = 00000000ffff00ff | |
9533 | lduba [%i1+%g0]0x88,%l0 ! %l0 = 00000000000000ab | |
9534 | ! Mem[0000000030141408] = 174573fc, %l5 = 00000000000000ff | |
9535 | lduha [%i5+%o4]0x89,%l5 ! %l5 = 00000000000073fc | |
9536 | ! Mem[0000000030081408] = c45f0094, %l5 = 00000000000073fc | |
9537 | lduwa [%i2+%o4]0x89,%l5 ! %l5 = 00000000c45f0094 | |
9538 | ! Mem[0000000010101400] = ff2e0000, %l5 = 00000000c45f0094 | |
9539 | lduwa [%i4+%g0]0x88,%l5 ! %l5 = 00000000ff2e0000 | |
9540 | ! Mem[0000000010001408] = ff000000, %l1 = 0000000000000000 | |
9541 | ldsha [%i0+%o4]0x80,%l1 ! %l1 = ffffffffffffff00 | |
9542 | ! Starting 10 instruction Store Burst | |
9543 | ! Mem[0000000030181408] = 0000009c, %l5 = 00000000ff2e0000 | |
9544 | ldstuba [%i6+%o4]0x81,%l5 ! %l5 = 00000000000000ff | |
9545 | ||
9546 | p0_label_232: | |
9547 | ! Mem[00000000300c1400] = ff0000ff, %l5 = 0000000000000000 | |
9548 | swapa [%i3+%g0]0x81,%l5 ! %l5 = 00000000ff0000ff | |
9549 | ! %l5 = 00000000ff0000ff, Mem[0000000030081400] = 00ff4517f8ffffff | |
9550 | stxa %l5,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000000ff0000ff | |
9551 | ! Mem[0000000010141400] = 00000000, %l2 = 000000000000ff00 | |
9552 | swapa [%i5+%g0]0x80,%l2 ! %l2 = 0000000000000000 | |
9553 | ! Mem[0000000030101408] = 00000000, %l4 = 00000000ff2e0000 | |
9554 | ldstuba [%i4+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
9555 | ! Mem[0000000010181410] = ff2e0000, %l0 = 00000000000000ab, %asi = 80 | |
9556 | swapa [%i6+0x010]%asi,%l0 ! %l0 = 00000000ff2e0000 | |
9557 | ! Mem[0000000010081400] = 00000000, %l1 = ffffffffffffff00 | |
9558 | swapa [%i2+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
9559 | ! Mem[0000000021800141] = fffc1df6, %l0 = 00000000ff2e0000 | |
9560 | ldstuba [%o3+0x141]%asi,%l0 ! %l0 = 000000fc000000ff | |
9561 | ! %l2 = 00000000, %l3 = 009400ff, Mem[0000000010001400] = 9c510000 0000ceff | |
9562 | stda %l2,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00000000 009400ff | |
9563 | ! %l2 = 00000000, %l3 = 009400ff, Mem[0000000010141408] = ff0000ff 00000002 | |
9564 | std %l2,[%i5+%o4] ! Mem[0000000010141408] = 00000000 009400ff | |
9565 | ! Starting 10 instruction Load Burst | |
9566 | ! Mem[00000000300c1410] = ff000000, %l4 = 0000000000000000 | |
9567 | lduba [%i3+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
9568 | ||
9569 | p0_label_233: | |
9570 | ! %l3 = 00000000009400ff, Mem[0000000030101408] = ff000000 | |
9571 | stba %l3,[%i4+%o4]0x81 ! Mem[0000000030101408] = ff000000 | |
9572 | ! Mem[0000000030181400] = 9079ff00, %f30 = ff000000 | |
9573 | lda [%i6+%g0]0x89,%f30 ! %f30 = 9079ff00 | |
9574 | ! Mem[000000001014141c] = 00000024, %l2 = 0000000000000000 | |
9575 | ldsba [%i5+0x01c]%asi,%l2 ! %l2 = 0000000000000000 | |
9576 | ! Mem[0000000030181410] = ffffffff, %l7 = 0000000080182efa | |
9577 | lduha [%i6+%o5]0x81,%l7 ! %l7 = 000000000000ffff | |
9578 | ! Mem[0000000030181410] = ffffffff, %f19 = 00000000 | |
9579 | lda [%i6+%o5]0x81,%f19 ! %f19 = ffffffff | |
9580 | ! Mem[0000000010001400] = 00000000 009400ff, %l4 = 00000000, %l5 = ff0000ff | |
9581 | ldd [%i0+%g0],%l4 ! %l4 = 0000000000000000 00000000009400ff | |
9582 | membar #Sync ! Added by membar checker (36) | |
9583 | ! Mem[0000000010001400] = 00000000 009400ff ff000000 00000000 | |
9584 | ! Mem[0000000010001410] = ff2e0000 000000ff 00002e7a 000000ff | |
9585 | ! Mem[0000000010001420] = 00000000 76c6c4ff ff009cff d1c43403 | |
9586 | ! Mem[0000000010001430] = ff000000 00000000 0000ffff 174573fc | |
9587 | ldda [%i0]ASI_BLK_AIUP,%f0 ! Block Load from 0000000010001400 | |
9588 | ! Mem[0000000010141410] = 00005eff, %l6 = 00000000ff5e0000 | |
9589 | lduha [%i5+%o5]0x88,%l6 ! %l6 = 0000000000005eff | |
9590 | ! Mem[0000000010081410] = ff00ffff, %l4 = 0000000000000000 | |
9591 | ldswa [%i2+%o5]0x80,%l4 ! %l4 = ffffffffff00ffff | |
9592 | ! Starting 10 instruction Store Burst | |
9593 | ! %f28 = 00000000 ff000000, %l2 = 0000000000000000 | |
9594 | ! Mem[0000000030181428] = 10ac7b593eda2778 | |
9595 | add %i6,0x028,%g1 | |
9596 | stda %f28,[%g1+%l2]ASI_PST8_SL ! Mem[0000000030181428] = 10ac7b593eda2778 | |
9597 | ||
9598 | p0_label_234: | |
9599 | ! %l7 = 000000000000ffff, Mem[0000000030181408] = ff00009c | |
9600 | stwa %l7,[%i6+%o4]0x81 ! Mem[0000000030181408] = 0000ffff | |
9601 | ! %l1 = 0000000000000000, Mem[0000000010101410] = fc000000fa2e1880 | |
9602 | stxa %l1,[%i4+%o5]0x88 ! Mem[0000000010101410] = 0000000000000000 | |
9603 | ! Mem[00000000201c0000] = 009c9457, %l2 = 0000000000000000 | |
9604 | ldstub [%o0+%g0],%l2 ! %l2 = 00000000000000ff | |
9605 | membar #Sync ! Added by membar checker (37) | |
9606 | ! %f29 = ff000000, Mem[0000000010001408] = ff000000 | |
9607 | sta %f29,[%i0+%o4]0x80 ! Mem[0000000010001408] = ff000000 | |
9608 | ! Mem[0000000030041408] = f8ffffff, %l2 = 0000000000000000 | |
9609 | swapa [%i1+%o4]0x89,%l2 ! %l2 = 00000000f8ffffff | |
9610 | ! %f6 = 00002e7a 000000ff, Mem[0000000010101408] = ffffffff 00000000 | |
9611 | stda %f6 ,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00002e7a 000000ff | |
9612 | ! %f16 = ff00007a 00000000 00000000 ffffffff | |
9613 | ! %f20 = ff000000 00002eff 00000000 00ffffff | |
9614 | ! %f24 = 7a000000 0000519c faa36376 90e83937 | |
9615 | ! %f28 = 00000000 ff000000 9079ff00 00002eff | |
9616 | stda %f16,[%i0]ASI_BLK_SL ! Block Store to 0000000030001400 | |
9617 | ! %f4 = ff2e0000 000000ff, Mem[00000000100c1400] = ff0051ff d76d7edb | |
9618 | stda %f4 ,[%i3+%g0]0x80 ! Mem[00000000100c1400] = ff2e0000 000000ff | |
9619 | ! Mem[0000000030141400] = 00000000, %l0 = 00000000000000fc | |
9620 | ldstuba [%i5+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
9621 | ! Starting 10 instruction Load Burst | |
9622 | ! Mem[0000000030041408] = fc73451700000000, %f12 = ff000000 00000000 | |
9623 | ldda [%i1+%o4]0x89,%f12 ! %f12 = fc734517 00000000 | |
9624 | ||
9625 | p0_label_235: | |
9626 | ! Mem[0000000030181400] = 00ff7990, %f1 = 009400ff | |
9627 | lda [%i6+%g0]0x81,%f1 ! %f1 = 00ff7990 | |
9628 | ! Mem[0000000010081400] = 00ffffff, %l1 = 0000000000000000 | |
9629 | lduha [%i2+%g0]0x80,%l1 ! %l1 = 00000000000000ff | |
9630 | ! Mem[0000000010081418] = d6ba79b1, %l7 = 000000000000ffff | |
9631 | lduwa [%i2+0x018]%asi,%l7 ! %l7 = 00000000d6ba79b1 | |
9632 | ! Mem[0000000030081400] = 00000000ff0000ff, %f6 = 00002e7a 000000ff | |
9633 | ldda [%i2+%g0]0x81,%f6 ! %f6 = 00000000 ff0000ff | |
9634 | ! Mem[0000000030081410] = 000000ff, %l6 = 0000000000005eff | |
9635 | lduwa [%i2+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
9636 | ! Mem[0000000010101438] = 00000000, %l2 = 00000000f8ffffff | |
9637 | lduba [%i4+0x03b]%asi,%l2 ! %l2 = 0000000000000000 | |
9638 | ! Mem[0000000010041410] = faa36376, %l2 = 0000000000000000 | |
9639 | ldswa [%i1+%o5]0x80,%l2 ! %l2 = fffffffffaa36376 | |
9640 | ! Mem[00000000300c1410] = ff000000, %l3 = 00000000009400ff | |
9641 | lduha [%i3+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
9642 | ! Mem[0000000030141408] = fc734517000000ff, %l6 = 00000000000000ff | |
9643 | ldxa [%i5+%o4]0x81,%l6 ! %l6 = fc734517000000ff | |
9644 | ! Starting 10 instruction Store Burst | |
9645 | membar #Sync ! Added by membar checker (38) | |
9646 | ! Mem[0000000010001400] = 00000000, %l4 = ffffffffff00ffff | |
9647 | swapa [%i0+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
9648 | ||
9649 | ! Check Point 47 for processor 0 | |
9650 | ||
9651 | set p0_check_pt_data_47,%g4 | |
9652 | rd %ccr,%g5 ! %g5 = 44 | |
9653 | ldx [%g4+0x08],%g2 | |
9654 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
9655 | bne %xcc,p0_reg_check_fail0 | |
9656 | mov 0xee0,%g1 | |
9657 | ldx [%g4+0x10],%g2 | |
9658 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
9659 | bne %xcc,p0_reg_check_fail1 | |
9660 | mov 0xee1,%g1 | |
9661 | ldx [%g4+0x18],%g2 | |
9662 | cmp %l2,%g2 ! %l2 = fffffffffaa36376 | |
9663 | bne %xcc,p0_reg_check_fail2 | |
9664 | mov 0xee2,%g1 | |
9665 | ldx [%g4+0x20],%g2 | |
9666 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
9667 | bne %xcc,p0_reg_check_fail3 | |
9668 | mov 0xee3,%g1 | |
9669 | ldx [%g4+0x28],%g2 | |
9670 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
9671 | bne %xcc,p0_reg_check_fail4 | |
9672 | mov 0xee4,%g1 | |
9673 | ldx [%g4+0x30],%g2 | |
9674 | cmp %l5,%g2 ! %l5 = 00000000009400ff | |
9675 | bne %xcc,p0_reg_check_fail5 | |
9676 | mov 0xee5,%g1 | |
9677 | ldx [%g4+0x38],%g2 | |
9678 | cmp %l6,%g2 ! %l6 = fc734517000000ff | |
9679 | bne %xcc,p0_reg_check_fail6 | |
9680 | mov 0xee6,%g1 | |
9681 | ldx [%g4+0x40],%g2 | |
9682 | cmp %l7,%g2 ! %l7 = 00000000d6ba79b1 | |
9683 | bne %xcc,p0_reg_check_fail7 | |
9684 | mov 0xee7,%g1 | |
9685 | ldx [%g4+0x48],%g3 | |
9686 | std %f0,[%g4] | |
9687 | ldx [%g4],%g2 | |
9688 | cmp %g3,%g2 ! %f0 = 00000000 00ff7990 | |
9689 | bne %xcc,p0_freg_check_fail | |
9690 | mov 0xf00,%g1 | |
9691 | ldx [%g4+0x50],%g3 | |
9692 | std %f2,[%g4] | |
9693 | ldx [%g4],%g2 | |
9694 | cmp %g3,%g2 ! %f2 = ff000000 00000000 | |
9695 | bne %xcc,p0_freg_check_fail | |
9696 | mov 0xf02,%g1 | |
9697 | ldx [%g4+0x58],%g3 | |
9698 | std %f4,[%g4] | |
9699 | ldx [%g4],%g2 | |
9700 | cmp %g3,%g2 ! %f4 = ff2e0000 000000ff | |
9701 | bne %xcc,p0_freg_check_fail | |
9702 | mov 0xf04,%g1 | |
9703 | ldx [%g4+0x60],%g3 | |
9704 | std %f6,[%g4] | |
9705 | ldx [%g4],%g2 | |
9706 | cmp %g3,%g2 ! %f6 = 00000000 ff0000ff | |
9707 | bne %xcc,p0_freg_check_fail | |
9708 | mov 0xf06,%g1 | |
9709 | ldx [%g4+0x68],%g3 | |
9710 | std %f8,[%g4] | |
9711 | ldx [%g4],%g2 | |
9712 | cmp %g3,%g2 ! %f8 = 00000000 76c6c4ff | |
9713 | bne %xcc,p0_freg_check_fail | |
9714 | mov 0xf08,%g1 | |
9715 | ldx [%g4+0x70],%g3 | |
9716 | std %f10,[%g4] | |
9717 | ldx [%g4],%g2 | |
9718 | cmp %g3,%g2 ! %f10 = ff009cff d1c43403 | |
9719 | bne %xcc,p0_freg_check_fail | |
9720 | mov 0xf10,%g1 | |
9721 | ldx [%g4+0x78],%g3 | |
9722 | std %f12,[%g4] | |
9723 | ldx [%g4],%g2 | |
9724 | cmp %g3,%g2 ! %f12 = fc734517 00000000 | |
9725 | bne %xcc,p0_freg_check_fail | |
9726 | mov 0xf12,%g1 | |
9727 | ldx [%g4+0x80],%g3 | |
9728 | std %f14,[%g4] | |
9729 | ldx [%g4],%g2 | |
9730 | cmp %g3,%g2 ! %f14 = 0000ffff 174573fc | |
9731 | bne %xcc,p0_freg_check_fail | |
9732 | mov 0xf14,%g1 | |
9733 | ldx [%g4+0x88],%g3 | |
9734 | std %f18,[%g4] | |
9735 | ldx [%g4],%g2 | |
9736 | cmp %g3,%g2 ! %f18 = 00000000 ffffffff | |
9737 | bne %xcc,p0_freg_check_fail | |
9738 | mov 0xf18,%g1 | |
9739 | ldx [%g4+0x90],%g3 | |
9740 | std %f30,[%g4] | |
9741 | ldx [%g4],%g2 | |
9742 | cmp %g3,%g2 ! %f30 = 9079ff00 00002eff | |
9743 | bne %xcc,p0_freg_check_fail | |
9744 | mov 0xf30,%g1 | |
9745 | ||
9746 | ! Check Point 47 completed | |
9747 | ||
9748 | ||
9749 | p0_label_236: | |
9750 | ! Mem[0000000010181434] = 00000000, %l7 = d6ba79b1, %l2 = faa36376 | |
9751 | add %i6,0x34,%g1 | |
9752 | casa [%g1]0x80,%l7,%l2 ! %l2 = 0000000000000000 | |
9753 | ! %f26 = faa36376 90e83937, Mem[0000000010001408] = ff000000 00000000 | |
9754 | stda %f26,[%i0+%o4]0x80 ! Mem[0000000010001408] = faa36376 90e83937 | |
9755 | ! Mem[0000000010041400] = 90793dab, %l5 = 00000000009400ff | |
9756 | lduha [%i1+%g0]0x88,%l5 ! %l5 = 0000000000003dab | |
9757 | ! Mem[0000000030181410] = ffffffff, %l3 = 0000000000000000 | |
9758 | swapa [%i6+%o5]0x89,%l3 ! %l3 = 00000000ffffffff | |
9759 | ! Mem[0000000030041410] = ac8f149b, %l0 = 0000000000000000 | |
9760 | swapa [%i1+%o5]0x89,%l0 ! %l0 = 00000000ac8f149b | |
9761 | ! Mem[0000000030141400] = ff000000, %l2 = 0000000000000000 | |
9762 | ldstuba [%i5+%g0]0x81,%l2 ! %l2 = 000000ff000000ff | |
9763 | ! %l4 = 00000000, %l5 = 00003dab, Mem[0000000010141408] = 00000000 009400ff | |
9764 | stda %l4,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000 00003dab | |
9765 | ! %l4 = 0000000000000000, Mem[00000000211c0001] = fffc1a4c, %asi = 80 | |
9766 | stba %l4,[%o2+0x001]%asi ! Mem[00000000211c0000] = ff001a4c | |
9767 | ! %l4 = 0000000000000000, Mem[0000000010141410] = ff5e0000, %asi = 80 | |
9768 | stwa %l4,[%i5+0x010]%asi ! Mem[0000000010141410] = 00000000 | |
9769 | ! Starting 10 instruction Load Burst | |
9770 | ! %l0 = 00000000ac8f149b, Mem[0000000030001400] = 00000000 | |
9771 | stwa %l0,[%i0+%g0]0x89 ! Mem[0000000030001400] = ac8f149b | |
9772 | ||
9773 | p0_label_237: | |
9774 | ! Mem[0000000021800080] = ffffa433, %l6 = fc734517000000ff | |
9775 | lduba [%o3+0x080]%asi,%l6 ! %l6 = 00000000000000ff | |
9776 | ! Mem[0000000010141434] = ac8f149b, %l7 = 00000000d6ba79b1 | |
9777 | ldsha [%i5+0x034]%asi,%l7 ! %l7 = ffffffffffffac8f | |
9778 | ! Mem[0000000030141408] = fc734517, %l2 = 00000000000000ff | |
9779 | lduwa [%i5+%o4]0x81,%l2 ! %l2 = 00000000fc734517 | |
9780 | ! Mem[0000000030081400] = 00000000, %l6 = 00000000000000ff | |
9781 | lduba [%i2+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
9782 | ! Mem[0000000010181400] = 000000ff, %f17 = 00000000 | |
9783 | lda [%i6+%g0]0x88,%f17 ! %f17 = 000000ff | |
9784 | ! Mem[0000000021800080] = ffffa433, %l2 = 00000000fc734517 | |
9785 | lduha [%o3+0x080]%asi,%l2 ! %l2 = 000000000000ffff | |
9786 | ! Mem[0000000010181400] = ff00000000000000, %f22 = 00000000 00ffffff | |
9787 | ldda [%i6+%g0]0x80,%f22 ! %f22 = ff000000 00000000 | |
9788 | ! Mem[000000001004141c] = 00b3e323, %l4 = 0000000000000000 | |
9789 | ldswa [%i1+0x01c]%asi,%l4 ! %l4 = 0000000000b3e323 | |
9790 | ! Mem[0000000010041400] = ab3d7990 00000002 ffffff00 00000000 | |
9791 | ! Mem[0000000010041410] = faa36376 90e83937 000000ff 00b3e323 | |
9792 | ! Mem[0000000010041420] = 1f41ff76 2164159c b179bad6 f8962d02 | |
9793 | ! Mem[0000000010041430] = ffffffff ff000000 b179bad6 f8962d02 | |
9794 | ldda [%i1]ASI_BLK_P,%f16 ! Block Load from 0000000010041400 | |
9795 | ! Starting 10 instruction Store Burst | |
9796 | ! %l4 = 0000000000b3e323, Mem[00000000300c1400] = 7a2e51ff00000000 | |
9797 | stxa %l4,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 0000000000b3e323 | |
9798 | ||
9799 | p0_label_238: | |
9800 | ! Mem[0000000010181408] = 00000000, %l0 = 00000000ac8f149b | |
9801 | ldstuba [%i6+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
9802 | ! %l7 = ffffffffffffac8f, Mem[0000000010001408] = 7663a3fa | |
9803 | stwa %l7,[%i0+%o4]0x88 ! Mem[0000000010001408] = ffffac8f | |
9804 | ! %l3 = 00000000ffffffff, Mem[0000000010001400] = ff009400ff00ffff | |
9805 | stxa %l3,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000ffffffff | |
9806 | ! Mem[0000000030101400] = 80182efa, %l4 = 0000000000b3e323 | |
9807 | swapa [%i4+%g0]0x89,%l4 ! %l4 = 0000000080182efa | |
9808 | ! %l4 = 80182efa, %l5 = 00003dab, Mem[0000000030001400] = 9b148fac 7a0000ff | |
9809 | stda %l4,[%i0+%g0]0x81 ! Mem[0000000030001400] = 80182efa 00003dab | |
9810 | ! Mem[0000000010101424] = 0000007a, %l4 = 80182efa, %l0 = 00000000 | |
9811 | add %i4,0x24,%g1 | |
9812 | casa [%g1]0x80,%l4,%l0 ! %l0 = 000000000000007a | |
9813 | ! %f12 = fc734517 00000000, Mem[00000000100c1430] = fffffff8 0000007d | |
9814 | stda %f12,[%i3+0x030]%asi ! Mem[00000000100c1430] = fc734517 00000000 | |
9815 | ! Mem[000000001010143e] = 000000ff, %l3 = 00000000ffffffff | |
9816 | ldstuba [%i4+0x03e]%asi,%l3 ! %l3 = 00000000000000ff | |
9817 | ! %f2 = ff000000 00000000, %l6 = 0000000000000000 | |
9818 | ! Mem[0000000010181410] = 000000ab000000ff | |
9819 | add %i6,0x010,%g1 | |
9820 | stda %f2,[%g1+%l6]ASI_PST16_P ! Mem[0000000010181410] = 000000ab000000ff | |
9821 | ! Starting 10 instruction Load Burst | |
9822 | ! Mem[0000000030001410] = ff2e0000, %l1 = 00000000000000ff | |
9823 | lduwa [%i0+%o5]0x81,%l1 ! %l1 = 00000000ff2e0000 | |
9824 | ||
9825 | p0_label_239: | |
9826 | ! Mem[0000000010001408] = 8facffff, %l4 = 0000000080182efa | |
9827 | ldsba [%i0+%o4]0x80,%l4 ! %l4 = ffffffffffffff8f | |
9828 | ! Mem[0000000010081410] = ff00ffff, %l7 = ffffffffffffac8f | |
9829 | lduwa [%i2+%o5]0x80,%l7 ! %l7 = 00000000ff00ffff | |
9830 | ! Mem[0000000030181400] = 00ff7990, %l2 = 000000000000ffff | |
9831 | ldstuba [%i6+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
9832 | ! Mem[0000000010041408] = 00ffffff, %l2 = 0000000000000000 | |
9833 | lduwa [%i1+%o4]0x88,%l2 ! %l2 = 0000000000ffffff | |
9834 | ! Mem[0000000010001400] = ffffffff, %l1 = 00000000ff2e0000 | |
9835 | ldswa [%i0+%g0]0x88,%l1 ! %l1 = ffffffffffffffff | |
9836 | ! Mem[0000000010181408] = ff000000, %f15 = 174573fc | |
9837 | lda [%i6+%o4]0x80,%f15 ! %f15 = ff000000 | |
9838 | ! Mem[0000000010041410] = 7663a3fa, %f0 = 00000000 | |
9839 | lda [%i1+%o5]0x88,%f0 ! %f0 = 7663a3fa | |
9840 | ! Mem[0000000030101400] = 23e3b300, %l0 = 000000000000007a | |
9841 | ldsba [%i4+%g0]0x81,%l0 ! %l0 = 0000000000000023 | |
9842 | ! Mem[0000000030141400] = 000000ff, %l6 = 0000000000000000 | |
9843 | ldswa [%i5+%g0]0x89,%l6 ! %l6 = 00000000000000ff | |
9844 | ! Starting 10 instruction Store Burst | |
9845 | ! Mem[00000000100c143f] = d6ba79b1, %l2 = 0000000000ffffff | |
9846 | ldstub [%i3+0x03f],%l2 ! %l2 = 000000b1000000ff | |
9847 | ||
9848 | p0_label_240: | |
9849 | ! %l5 = 0000000000003dab, Mem[0000000010081410] = ff00ffff | |
9850 | stba %l5,[%i2+%o5]0x80 ! Mem[0000000010081410] = ab00ffff | |
9851 | ! %l4 = ffffffffffffff8f, Mem[0000000021800000] = 000013a3, %asi = 80 | |
9852 | stha %l4,[%o3+0x000]%asi ! Mem[0000000021800000] = ff8f13a3 | |
9853 | ! Mem[0000000010101400] = 00002eff, %l3 = 0000000000000000 | |
9854 | swapa [%i4+%g0]0x80,%l3 ! %l3 = 0000000000002eff | |
9855 | ! %f0 = 7663a3fa 00ff7990 ff000000 00000000 | |
9856 | ! %f4 = ff2e0000 000000ff 00000000 ff0000ff | |
9857 | ! %f8 = 00000000 76c6c4ff ff009cff d1c43403 | |
9858 | ! %f12 = fc734517 00000000 0000ffff ff000000 | |
9859 | stda %f0,[%i1]ASI_BLK_S ! Block Store to 0000000030041400 | |
9860 | ! %l0 = 00000023, %l1 = ffffffff, Mem[0000000010181418] = ffffff00 00000000 | |
9861 | std %l0,[%i6+0x018] ! Mem[0000000010181418] = 00000023 ffffffff | |
9862 | ! Mem[00000000211c0000] = ff001a4c, %l1 = ffffffffffffffff | |
9863 | ldstub [%o2+%g0],%l1 ! %l1 = 000000ff000000ff | |
9864 | ! %f23 = 00b3e323, Mem[0000000030141410] = fcf8007a | |
9865 | sta %f23,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00b3e323 | |
9866 | ! %f24 = 1f41ff76 2164159c, %l0 = 0000000000000023 | |
9867 | ! Mem[0000000030181420] = ed6d78fac7ec13bb | |
9868 | add %i6,0x020,%g1 | |
9869 | stda %f24,[%g1+%l0]ASI_PST16_SL ! Mem[0000000030181420] = 9c156421c7ec13bb | |
9870 | ! %l1 = 00000000000000ff, Mem[00000000300c1400] = 23e3b300 | |
9871 | stba %l1,[%i3+%g0]0x81 ! Mem[00000000300c1400] = ffe3b300 | |
9872 | ! Starting 10 instruction Load Burst | |
9873 | ! Mem[00000000100c1408] = fcf80000, %f23 = 00b3e323 | |
9874 | lda [%i3+%o4]0x88,%f23 ! %f23 = fcf80000 | |
9875 | ||
9876 | ! Check Point 48 for processor 0 | |
9877 | ||
9878 | set p0_check_pt_data_48,%g4 | |
9879 | rd %ccr,%g5 ! %g5 = 44 | |
9880 | ldx [%g4+0x08],%g2 | |
9881 | cmp %l0,%g2 ! %l0 = 0000000000000023 | |
9882 | bne %xcc,p0_reg_check_fail0 | |
9883 | mov 0xee0,%g1 | |
9884 | ldx [%g4+0x10],%g2 | |
9885 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
9886 | bne %xcc,p0_reg_check_fail1 | |
9887 | mov 0xee1,%g1 | |
9888 | ldx [%g4+0x18],%g2 | |
9889 | cmp %l2,%g2 ! %l2 = 00000000000000b1 | |
9890 | bne %xcc,p0_reg_check_fail2 | |
9891 | mov 0xee2,%g1 | |
9892 | ldx [%g4+0x20],%g2 | |
9893 | cmp %l3,%g2 ! %l3 = 0000000000002eff | |
9894 | bne %xcc,p0_reg_check_fail3 | |
9895 | mov 0xee3,%g1 | |
9896 | ldx [%g4+0x28],%g2 | |
9897 | cmp %l4,%g2 ! %l4 = ffffffffffffff8f | |
9898 | bne %xcc,p0_reg_check_fail4 | |
9899 | mov 0xee4,%g1 | |
9900 | ldx [%g4+0x30],%g2 | |
9901 | cmp %l5,%g2 ! %l5 = 0000000000003dab | |
9902 | bne %xcc,p0_reg_check_fail5 | |
9903 | mov 0xee5,%g1 | |
9904 | ldx [%g4+0x38],%g2 | |
9905 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
9906 | bne %xcc,p0_reg_check_fail6 | |
9907 | mov 0xee6,%g1 | |
9908 | ldx [%g4+0x40],%g2 | |
9909 | cmp %l7,%g2 ! %l7 = 00000000ff00ffff | |
9910 | bne %xcc,p0_reg_check_fail7 | |
9911 | mov 0xee7,%g1 | |
9912 | ldx [%g4+0x48],%g3 | |
9913 | std %f0,[%g4] | |
9914 | ldx [%g4],%g2 | |
9915 | cmp %g3,%g2 ! %f0 = 7663a3fa 00ff7990 | |
9916 | bne %xcc,p0_freg_check_fail | |
9917 | mov 0xf00,%g1 | |
9918 | ldx [%g4+0x50],%g3 | |
9919 | std %f14,[%g4] | |
9920 | ldx [%g4],%g2 | |
9921 | cmp %g3,%g2 ! %f14 = 0000ffff ff000000 | |
9922 | bne %xcc,p0_freg_check_fail | |
9923 | mov 0xf14,%g1 | |
9924 | ldx [%g4+0x58],%g3 | |
9925 | std %f16,[%g4] | |
9926 | ldx [%g4],%g2 | |
9927 | cmp %g3,%g2 ! %f16 = ab3d7990 00000002 | |
9928 | bne %xcc,p0_freg_check_fail | |
9929 | mov 0xf16,%g1 | |
9930 | ldx [%g4+0x60],%g3 | |
9931 | std %f18,[%g4] | |
9932 | ldx [%g4],%g2 | |
9933 | cmp %g3,%g2 ! %f18 = ffffff00 00000000 | |
9934 | bne %xcc,p0_freg_check_fail | |
9935 | mov 0xf18,%g1 | |
9936 | ldx [%g4+0x68],%g3 | |
9937 | std %f20,[%g4] | |
9938 | ldx [%g4],%g2 | |
9939 | cmp %g3,%g2 ! %f20 = faa36376 90e83937 | |
9940 | bne %xcc,p0_freg_check_fail | |
9941 | mov 0xf20,%g1 | |
9942 | ldx [%g4+0x70],%g3 | |
9943 | std %f22,[%g4] | |
9944 | ldx [%g4],%g2 | |
9945 | cmp %g3,%g2 ! %f22 = 000000ff fcf80000 | |
9946 | bne %xcc,p0_freg_check_fail | |
9947 | mov 0xf22,%g1 | |
9948 | ldx [%g4+0x78],%g3 | |
9949 | std %f24,[%g4] | |
9950 | ldx [%g4],%g2 | |
9951 | cmp %g3,%g2 ! %f24 = 1f41ff76 2164159c | |
9952 | bne %xcc,p0_freg_check_fail | |
9953 | mov 0xf24,%g1 | |
9954 | ldx [%g4+0x80],%g3 | |
9955 | std %f26,[%g4] | |
9956 | ldx [%g4],%g2 | |
9957 | cmp %g3,%g2 ! %f26 = b179bad6 f8962d02 | |
9958 | bne %xcc,p0_freg_check_fail | |
9959 | mov 0xf26,%g1 | |
9960 | ldx [%g4+0x88],%g3 | |
9961 | std %f28,[%g4] | |
9962 | ldx [%g4],%g2 | |
9963 | cmp %g3,%g2 ! %f28 = ffffffff ff000000 | |
9964 | bne %xcc,p0_freg_check_fail | |
9965 | mov 0xf28,%g1 | |
9966 | ldx [%g4+0x90],%g3 | |
9967 | std %f30,[%g4] | |
9968 | ldx [%g4],%g2 | |
9969 | cmp %g3,%g2 ! %f30 = b179bad6 f8962d02 | |
9970 | bne %xcc,p0_freg_check_fail | |
9971 | mov 0xf30,%g1 | |
9972 | ||
9973 | ! Check Point 48 completed | |
9974 | ||
9975 | ||
9976 | p0_label_241: | |
9977 | ! Mem[00000000201c0000] = ff9c9457, %l1 = 00000000000000ff | |
9978 | lduh [%o0+%g0],%l1 ! %l1 = 000000000000ff9c | |
9979 | ! Mem[0000000030081408] = 94005fc4, %l2 = 00000000000000b1 | |
9980 | lduwa [%i2+%o4]0x81,%l2 ! %l2 = 0000000094005fc4 | |
9981 | membar #Sync ! Added by membar checker (39) | |
9982 | ! Mem[0000000010181400] = ff000000 00000000 ff000000 000000ff | |
9983 | ! Mem[0000000010181410] = 000000ab 000000ff 00000023 ffffffff | |
9984 | ! Mem[0000000010181420] = 000000ff 0000007a 00000000 000000ff | |
9985 | ! Mem[0000000010181430] = 00000000 00000000 f8b7ffff 000000ff | |
9986 | ldda [%i6]ASI_BLK_PL,%f0 ! Block Load from 0000000010181400 | |
9987 | ! Mem[0000000030081410] = ff000000, %l7 = 00000000ff00ffff | |
9988 | lduha [%i2+%o5]0x81,%l7 ! %l7 = 000000000000ff00 | |
9989 | ! Mem[0000000030081408] = 94005fc4, %l0 = 0000000000000023 | |
9990 | lduba [%i2+%o4]0x81,%l0 ! %l0 = 0000000000000094 | |
9991 | ! Mem[0000000010181414] = 000000ff, %l3 = 0000000000002eff | |
9992 | ldsh [%i6+0x016],%l3 ! %l3 = 00000000000000ff | |
9993 | ! Mem[0000000030141400] = ff00000000000000, %l6 = 00000000000000ff | |
9994 | ldxa [%i5+%g0]0x81,%l6 ! %l6 = ff00000000000000 | |
9995 | ! Mem[0000000030001400] = 80182efa, %l5 = 0000000000003dab | |
9996 | ldsha [%i0+%g0]0x81,%l5 ! %l5 = ffffffffffff8018 | |
9997 | ! Mem[0000000030081408] = 94005fc4, %l3 = 00000000000000ff | |
9998 | ldsha [%i2+%o4]0x81,%l3 ! %l3 = ffffffffffff9400 | |
9999 | ! Starting 10 instruction Store Burst | |
10000 | ! %f30 = b179bad6 f8962d02, Mem[0000000030081410] = ff000000 19000000 | |
10001 | stda %f30,[%i2+%o5]0x81 ! Mem[0000000030081410] = b179bad6 f8962d02 | |
10002 | ||
10003 | p0_label_242: | |
10004 | membar #Sync ! Added by membar checker (40) | |
10005 | ! %l2 = 94005fc4, %l3 = ffff9400, Mem[0000000010181408] = ff000000 000000ff | |
10006 | stda %l2,[%i6+%o4]0x80 ! Mem[0000000010181408] = 94005fc4 ffff9400 | |
10007 | ! Mem[0000000030001400] = 80182efa, %l2 = 0000000094005fc4 | |
10008 | swapa [%i0+%g0]0x81,%l2 ! %l2 = 0000000080182efa | |
10009 | ! %l0 = 0000000000000094, Mem[00000000300c1400] = ffe3b30000000000 | |
10010 | stxa %l0,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 0000000000000094 | |
10011 | ! %l2 = 0000000080182efa, Mem[0000000010001400] = ffffffff | |
10012 | stba %l2,[%i0+%g0]0x88 ! Mem[0000000010001400] = fffffffa | |
10013 | ! Mem[0000000010181438] = f8b7ffff000000ff, %l2 = 0000000080182efa, %l1 = 000000000000ff9c | |
10014 | add %i6,0x38,%g1 | |
10015 | casxa [%g1]0x80,%l2,%l1 ! %l1 = f8b7ffff000000ff | |
10016 | ! %l3 = ffffffffffff9400, Mem[0000000010081408] = 00000000000000ff | |
10017 | stxa %l3,[%i2+%o4]0x88 ! Mem[0000000010081408] = ffffffffffff9400 | |
10018 | ! %l3 = ffffffffffff9400, Mem[0000000010081400] = ffffff00 | |
10019 | stha %l3,[%i2+%g0]0x88 ! Mem[0000000010081400] = ffff9400 | |
10020 | ! %l0 = 0000000000000094, Mem[0000000010001410] = ff2e0000 | |
10021 | stha %l0,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00940000 | |
10022 | ! Mem[0000000030181410] = 00000000, %l7 = 000000000000ff00 | |
10023 | ldstuba [%i6+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
10024 | ! Starting 10 instruction Load Burst | |
10025 | ! Mem[0000000010141408] = 00000000, %f7 = 23000000 | |
10026 | lda [%i5+%o4]0x88,%f7 ! %f7 = 00000000 | |
10027 | ||
10028 | p0_label_243: | |
10029 | ! Mem[0000000030141408] = fc734517000000ff, %f22 = 000000ff fcf80000 | |
10030 | ldda [%i5+%o4]0x81,%f22 ! %f22 = fc734517 000000ff | |
10031 | ! Mem[0000000010101410] = 00000000 00000000, %l2 = 80182efa, %l3 = ffff9400 | |
10032 | ldda [%i4+%o5]0x88,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
10033 | ! Mem[0000000030181400] = ffff7990, %l6 = ff00000000000000 | |
10034 | lduwa [%i6+%g0]0x81,%l6 ! %l6 = 00000000ffff7990 | |
10035 | ! Mem[00000000100c1414] = 000000ff, %l2 = 0000000000000000 | |
10036 | lduha [%i3+0x014]%asi,%l2 ! %l2 = 0000000000000000 | |
10037 | ! Mem[0000000010041410] = 7663a3fa, %l7 = 0000000000000000 | |
10038 | lduwa [%i1+%o5]0x88,%l7 ! %l7 = 000000007663a3fa | |
10039 | ! Mem[0000000030181400] = ffff7990cf1eefa4, %f30 = b179bad6 f8962d02 | |
10040 | ldda [%i6+%g0]0x81,%f30 ! %f30 = ffff7990 cf1eefa4 | |
10041 | ! Mem[00000000300c1410] = 947e307dff000000, %l4 = ffffffffffffff8f | |
10042 | ldxa [%i3+%o5]0x89,%l4 ! %l4 = 947e307dff000000 | |
10043 | ! Mem[0000000030001408] = 00000000ffffffff, %l5 = ffffffffffff8018 | |
10044 | ldxa [%i0+%o4]0x89,%l5 ! %l5 = 00000000ffffffff | |
10045 | ! Mem[0000000010041408] = ffffff00, %f17 = 00000002 | |
10046 | lda [%i1+%o4]0x80,%f17 ! %f17 = ffffff00 | |
10047 | ! Starting 10 instruction Store Burst | |
10048 | ! Mem[0000000010081408] = 0094ffff, %l5 = 00000000ffffffff | |
10049 | swapa [%i2+%o4]0x80,%l5 ! %l5 = 000000000094ffff | |
10050 | ||
10051 | p0_label_244: | |
10052 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010101400] = 00000000 00000000 | |
10053 | stda %l2,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 00000000 | |
10054 | ! Mem[00000000300c1408] = ff9a234e, %l7 = 000000007663a3fa | |
10055 | ldstuba [%i3+%o4]0x89,%l7 ! %l7 = 0000004e000000ff | |
10056 | ! %l4 = 947e307dff000000, Mem[0000000030001410] = ff2e0000 | |
10057 | stha %l4,[%i0+%o5]0x81 ! Mem[0000000030001410] = 00000000 | |
10058 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010081400] = 0094ffff 000000ff | |
10059 | stda %l2,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 00000000 | |
10060 | ! %l7 = 000000000000004e, Mem[0000000030181400] = a4ef1ecf9079ffff | |
10061 | stxa %l7,[%i6+%g0]0x89 ! Mem[0000000030181400] = 000000000000004e | |
10062 | ! %l4 = 947e307dff000000, Mem[00000000300c1408] = ff239aff | |
10063 | stba %l4,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 00239aff | |
10064 | ! %f20 = faa36376 90e83937, %l1 = f8b7ffff000000ff | |
10065 | ! Mem[0000000010041438] = b179bad6f8962d02 | |
10066 | add %i1,0x038,%g1 | |
10067 | stda %f20,[%g1+%l1]ASI_PST32_PL ! Mem[0000000010041438] = 3739e8907663a3fa | |
10068 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010141438] = fa2e1880 000000ff | |
10069 | stda %l2,[%i5+0x038]%asi ! Mem[0000000010141438] = 00000000 00000000 | |
10070 | ! %l2 = 0000000000000000, Mem[0000000021800000] = ff8f13a3, %asi = 80 | |
10071 | stba %l2,[%o3+0x000]%asi ! Mem[0000000021800000] = 008f13a3 | |
10072 | ! Starting 10 instruction Load Burst | |
10073 | ! Mem[0000000030141410] = 23e3b300 00ffffff, %l6 = ffff7990, %l7 = 0000004e | |
10074 | ldda [%i5+%o5]0x81,%l6 ! %l6 = 0000000023e3b300 0000000000ffffff | |
10075 | ||
10076 | p0_label_245: | |
10077 | ! Mem[0000000030181408] = 0000ffff00000000, %l5 = 000000000094ffff | |
10078 | ldxa [%i6+%o4]0x81,%l5 ! %l5 = 0000ffff00000000 | |
10079 | ! Mem[00000000300c1400] = 0000000000000094, %l0 = 0000000000000094 | |
10080 | ldxa [%i3+%g0]0x81,%l0 ! %l0 = 0000000000000094 | |
10081 | ! Mem[0000000030181408] = 0000ffff 00000000, %l6 = 23e3b300, %l7 = 00ffffff | |
10082 | ldda [%i6+%o4]0x81,%l6 ! %l6 = 000000000000ffff 0000000000000000 | |
10083 | ! Mem[000000001004142c] = f8962d02, %l5 = 0000ffff00000000 | |
10084 | lduh [%i1+0x02c],%l5 ! %l5 = 000000000000f896 | |
10085 | ! Mem[0000000030141410] = 23e3b30000ffffff, %f30 = ffff7990 cf1eefa4 | |
10086 | ldda [%i5+%o5]0x81,%f30 ! %f30 = 23e3b300 00ffffff | |
10087 | ! Mem[0000000010041408] = 00ffffff, %l6 = 000000000000ffff | |
10088 | ldsha [%i1+%o4]0x88,%l6 ! %l6 = ffffffffffffffff | |
10089 | ! Mem[00000000211c0000] = ff001a4c, %l5 = 000000000000f896 | |
10090 | lduba [%o2+0x000]%asi,%l5 ! %l5 = 00000000000000ff | |
10091 | ! Mem[0000000010081410] = ab00ffff, %l7 = 0000000000000000 | |
10092 | ldswa [%i2+0x010]%asi,%l7 ! %l7 = ffffffffab00ffff | |
10093 | ! Mem[0000000030081400] = 00000000, %f12 = 00000000 | |
10094 | lda [%i2+%g0]0x89,%f12 ! %f12 = 00000000 | |
10095 | ! Starting 10 instruction Store Burst | |
10096 | ! Mem[0000000010181410] = 000000ab, %l2 = 0000000000000000 | |
10097 | swapa [%i6+%o5]0x80,%l2 ! %l2 = 00000000000000ab | |
10098 | ||
10099 | ! Check Point 49 for processor 0 | |
10100 | ||
10101 | set p0_check_pt_data_49,%g4 | |
10102 | rd %ccr,%g5 ! %g5 = 44 | |
10103 | ldx [%g4+0x08],%g2 | |
10104 | cmp %l0,%g2 ! %l0 = 0000000000000094 | |
10105 | bne %xcc,p0_reg_check_fail0 | |
10106 | mov 0xee0,%g1 | |
10107 | ldx [%g4+0x10],%g2 | |
10108 | cmp %l1,%g2 ! %l1 = f8b7ffff000000ff | |
10109 | bne %xcc,p0_reg_check_fail1 | |
10110 | mov 0xee1,%g1 | |
10111 | ldx [%g4+0x18],%g2 | |
10112 | cmp %l2,%g2 ! %l2 = 00000000000000ab | |
10113 | bne %xcc,p0_reg_check_fail2 | |
10114 | mov 0xee2,%g1 | |
10115 | ldx [%g4+0x20],%g2 | |
10116 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
10117 | bne %xcc,p0_reg_check_fail3 | |
10118 | mov 0xee3,%g1 | |
10119 | ldx [%g4+0x28],%g2 | |
10120 | cmp %l4,%g2 ! %l4 = 947e307dff000000 | |
10121 | bne %xcc,p0_reg_check_fail4 | |
10122 | mov 0xee4,%g1 | |
10123 | ldx [%g4+0x30],%g2 | |
10124 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
10125 | bne %xcc,p0_reg_check_fail5 | |
10126 | mov 0xee5,%g1 | |
10127 | ldx [%g4+0x38],%g2 | |
10128 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
10129 | bne %xcc,p0_reg_check_fail6 | |
10130 | mov 0xee6,%g1 | |
10131 | ldx [%g4+0x40],%g2 | |
10132 | cmp %l7,%g2 ! %l7 = ffffffffab00ffff | |
10133 | bne %xcc,p0_reg_check_fail7 | |
10134 | mov 0xee7,%g1 | |
10135 | ldx [%g4+0x48],%g3 | |
10136 | std %f0,[%g4] | |
10137 | ldx [%g4],%g2 | |
10138 | cmp %g3,%g2 ! %f0 = 00000000 000000ff | |
10139 | bne %xcc,p0_freg_check_fail | |
10140 | mov 0xf00,%g1 | |
10141 | ldx [%g4+0x50],%g3 | |
10142 | std %f2,[%g4] | |
10143 | ldx [%g4],%g2 | |
10144 | cmp %g3,%g2 ! %f2 = ff000000 000000ff | |
10145 | bne %xcc,p0_freg_check_fail | |
10146 | mov 0xf02,%g1 | |
10147 | ldx [%g4+0x58],%g3 | |
10148 | std %f4,[%g4] | |
10149 | ldx [%g4],%g2 | |
10150 | cmp %g3,%g2 ! %f4 = ff000000 ab000000 | |
10151 | bne %xcc,p0_freg_check_fail | |
10152 | mov 0xf04,%g1 | |
10153 | ldx [%g4+0x60],%g3 | |
10154 | std %f6,[%g4] | |
10155 | ldx [%g4],%g2 | |
10156 | cmp %g3,%g2 ! %f6 = ffffffff 00000000 | |
10157 | bne %xcc,p0_freg_check_fail | |
10158 | mov 0xf06,%g1 | |
10159 | ldx [%g4+0x68],%g3 | |
10160 | std %f8,[%g4] | |
10161 | ldx [%g4],%g2 | |
10162 | cmp %g3,%g2 ! %f8 = 7a000000 ff000000 | |
10163 | bne %xcc,p0_freg_check_fail | |
10164 | mov 0xf08,%g1 | |
10165 | ldx [%g4+0x70],%g3 | |
10166 | std %f10,[%g4] | |
10167 | ldx [%g4],%g2 | |
10168 | cmp %g3,%g2 ! %f10 = ff000000 00000000 | |
10169 | bne %xcc,p0_freg_check_fail | |
10170 | mov 0xf10,%g1 | |
10171 | ldx [%g4+0x78],%g3 | |
10172 | std %f12,[%g4] | |
10173 | ldx [%g4],%g2 | |
10174 | cmp %g3,%g2 ! %f12 = 00000000 00000000 | |
10175 | bne %xcc,p0_freg_check_fail | |
10176 | mov 0xf12,%g1 | |
10177 | ldx [%g4+0x80],%g3 | |
10178 | std %f14,[%g4] | |
10179 | ldx [%g4],%g2 | |
10180 | cmp %g3,%g2 ! %f14 = ff000000 ffffb7f8 | |
10181 | bne %xcc,p0_freg_check_fail | |
10182 | mov 0xf14,%g1 | |
10183 | ldx [%g4+0x88],%g3 | |
10184 | std %f16,[%g4] | |
10185 | ldx [%g4],%g2 | |
10186 | cmp %g3,%g2 ! %f16 = ab3d7990 ffffff00 | |
10187 | bne %xcc,p0_freg_check_fail | |
10188 | mov 0xf16,%g1 | |
10189 | ldx [%g4+0x90],%g3 | |
10190 | std %f22,[%g4] | |
10191 | ldx [%g4],%g2 | |
10192 | cmp %g3,%g2 ! %f22 = fc734517 000000ff | |
10193 | bne %xcc,p0_freg_check_fail | |
10194 | mov 0xf22,%g1 | |
10195 | ldx [%g4+0x98],%g3 | |
10196 | std %f30,[%g4] | |
10197 | ldx [%g4],%g2 | |
10198 | cmp %g3,%g2 ! %f30 = 23e3b300 00ffffff | |
10199 | bne %xcc,p0_freg_check_fail | |
10200 | mov 0xf30,%g1 | |
10201 | ||
10202 | ! Check Point 49 completed | |
10203 | ||
10204 | ||
10205 | p0_label_246: | |
10206 | ! Mem[00000000201c0000] = ff9c9457, %l1 = f8b7ffff000000ff | |
10207 | ldstuba [%o0+0x000]%asi,%l1 ! %l1 = 000000ff000000ff | |
10208 | ! Mem[0000000010001400] = 00000000 fffffffa, %l6 = ffffffff, %l7 = ab00ffff | |
10209 | ldda [%i0+%g0]0x88,%l6 ! %l6 = 00000000fffffffa 0000000000000000 | |
10210 | ! Mem[0000000010181420] = 000000ff0000007a, %l4 = 947e307dff000000, %l0 = 0000000000000094 | |
10211 | add %i6,0x20,%g1 | |
10212 | casxa [%g1]0x80,%l4,%l0 ! %l0 = 000000ff0000007a | |
10213 | ! %l2 = 00000000000000ab, Mem[0000000030101408] = ff000000002e51ff | |
10214 | stxa %l2,[%i4+%o4]0x81 ! Mem[0000000030101408] = 00000000000000ab | |
10215 | ! %l4 = ff000000, %l5 = 000000ff, Mem[0000000010101410] = 00000000 00000000 | |
10216 | stda %l4,[%i4+%o5]0x80 ! Mem[0000000010101410] = ff000000 000000ff | |
10217 | ! %l5 = 00000000000000ff, Mem[000000001008142c] = fcf85e66 | |
10218 | stw %l5,[%i2+0x02c] ! Mem[000000001008142c] = 000000ff | |
10219 | ! %l4 = ff000000, %l5 = 000000ff, Mem[00000000100c1418] = ffffffff b792cdbe | |
10220 | std %l4,[%i3+0x018] ! Mem[00000000100c1418] = ff000000 000000ff | |
10221 | ! Mem[000000001000141c] = 000000ff, %l3 = 0000000000000000, %asi = 80 | |
10222 | swapa [%i0+0x01c]%asi,%l3 ! %l3 = 00000000000000ff | |
10223 | ! Mem[0000000030181410] = ff000000, %l3 = 00000000000000ff | |
10224 | swapa [%i6+%o5]0x81,%l3 ! %l3 = 00000000ff000000 | |
10225 | ! Starting 10 instruction Load Burst | |
10226 | ! Mem[0000000010141428] = 4e239aff, %l4 = 947e307dff000000 | |
10227 | ldsba [%i5+0x029]%asi,%l4 ! %l4 = 0000000000000023 | |
10228 | ||
10229 | p0_label_247: | |
10230 | ! Mem[0000000030081408] = 94005fc4, %l2 = 00000000000000ab | |
10231 | ldsha [%i2+%o4]0x81,%l2 ! %l2 = ffffffffffff9400 | |
10232 | ! Mem[0000000010101428] = 665ef8fc, %f6 = ffffffff | |
10233 | ld [%i4+0x028],%f6 ! %f6 = 665ef8fc | |
10234 | ! Mem[0000000010081408] = ffffffff, %l1 = 00000000000000ff | |
10235 | lduwa [%i2+%o4]0x88,%l1 ! %l1 = 00000000ffffffff | |
10236 | ! Mem[0000000030081400] = ff0000ff00000000, %l4 = 0000000000000023 | |
10237 | ldxa [%i2+%g0]0x89,%l4 ! %l4 = ff0000ff00000000 | |
10238 | ! Mem[0000000030041400] = 7663a3fa, %l4 = ff0000ff00000000 | |
10239 | ldsha [%i1+%g0]0x81,%l4 ! %l4 = 0000000000007663 | |
10240 | ! %f18 = ffffff00 00000000, Mem[0000000010141410] = 00000000 00000000 | |
10241 | stda %f18,[%i5+%o5]0x88 ! Mem[0000000010141410] = ffffff00 00000000 | |
10242 | ! Mem[0000000021800140] = ffff1df6, %l2 = ffffffffffff9400 | |
10243 | ldsh [%o3+0x140],%l2 ! %l2 = ffffffffffffffff | |
10244 | ! Mem[0000000030001408] = 00000000 ffffffff, %l2 = ffffffff, %l3 = ff000000 | |
10245 | ldda [%i0+%o4]0x89,%l2 ! %l2 = 00000000ffffffff 0000000000000000 | |
10246 | ! Mem[0000000030101408] = 00000000000000ab, %l5 = 00000000000000ff | |
10247 | ldxa [%i4+%o4]0x81,%l5 ! %l5 = 00000000000000ab | |
10248 | ! Starting 10 instruction Store Burst | |
10249 | ! %l6 = 00000000fffffffa, Mem[0000000010001435] = 00000000 | |
10250 | stb %l6,[%i0+0x035] ! Mem[0000000010001434] = 00fa0000 | |
10251 | ||
10252 | p0_label_248: | |
10253 | ! Mem[0000000030001408] = ffffffff, %l5 = 00000000000000ab | |
10254 | ldstuba [%i0+%o4]0x81,%l5 ! %l5 = 000000ff000000ff | |
10255 | ! %l2 = 00000000ffffffff, Mem[0000000030041410] = ff2e0000000000ff | |
10256 | stxa %l2,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000ffffffff | |
10257 | ! Mem[00000000100c1400] = 00002eff, %l4 = 0000000000007663 | |
10258 | swapa [%i3+%g0]0x88,%l4 ! %l4 = 0000000000002eff | |
10259 | ! %l7 = 0000000000000000, Mem[0000000010101410] = 000000ff | |
10260 | stwa %l7,[%i4+%o5]0x88 ! Mem[0000000010101410] = 00000000 | |
10261 | ! Mem[00000000100c1400] = 00007663, %l1 = 00000000ffffffff | |
10262 | swapa [%i3+%g0]0x88,%l1 ! %l1 = 0000000000007663 | |
10263 | ! %l2 = 00000000ffffffff, Mem[0000000030141410] = 00b3e323 | |
10264 | stha %l2,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00b3ffff | |
10265 | ! Mem[0000000030181408] = 0000ffff, %l2 = 00000000ffffffff | |
10266 | ldstuba [%i6+%o4]0x81,%l2 ! %l2 = 00000000000000ff | |
10267 | ! Code Fragment 3 | |
10268 | p0_fragment_12: | |
10269 | ! %l0 = 000000ff0000007a | |
10270 | setx 0x7b6030b8221b1424,%g7,%l0 ! %l0 = 7b6030b8221b1424 | |
10271 | ! %l1 = 0000000000007663 | |
10272 | setx 0xf3bbe07f8cfcde68,%g7,%l1 ! %l1 = f3bbe07f8cfcde68 | |
10273 | setx 0x1fe000, %g1, %g3 | |
10274 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
10275 | setx 0x1ffff8, %g1, %g2 | |
10276 | and %l0, %g2, %l0 | |
10277 | ta T_CHANGE_HPRIV | |
10278 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
10279 | ta T_CHANGE_NONHPRIV | |
10280 | ! %l0 = 7b6030b8221b1424 | |
10281 | setx 0x6dc28ab832f1564a,%g7,%l0 ! %l0 = 6dc28ab832f1564a | |
10282 | ! %l1 = f3bbe07f8cfcde68 | |
10283 | setx 0xfa7f9cd7f2637a86,%g7,%l1 ! %l1 = fa7f9cd7f2637a86 | |
10284 | ! Mem[0000000010181404] = 00000000, %l4 = 0000000000002eff, %asi = 80 | |
10285 | swapa [%i6+0x004]%asi,%l4 ! %l4 = 0000000000000000 | |
10286 | ! Starting 10 instruction Load Burst | |
10287 | ! Mem[00000000100c1408] = 0000f8fc, %l7 = 0000000000000000 | |
10288 | lduba [%i3+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
10289 | ||
10290 | p0_label_249: | |
10291 | ! Mem[0000000010141400] = 0000ff00, %f17 = ffffff00 | |
10292 | lda [%i5+%g0]0x80,%f17 ! %f17 = 0000ff00 | |
10293 | ! Mem[0000000030141410] = 00b3ffff, %l4 = 0000000000000000 | |
10294 | ldsha [%i5+%o5]0x89,%l4 ! %l4 = ffffffffffffffff | |
10295 | ! Mem[0000000010001408] = ffffac8f, %l1 = fa7f9cd7f2637a86 | |
10296 | lduha [%i0+%o4]0x88,%l1 ! %l1 = 000000000000ac8f | |
10297 | ! Mem[0000000030101400] = 00b3e323, %l4 = ffffffffffffffff | |
10298 | ldswa [%i4+%g0]0x89,%l4 ! %l4 = 0000000000b3e323 | |
10299 | ! Mem[0000000030141410] = ffffb300, %l4 = 0000000000b3e323 | |
10300 | ldsha [%i5+%o5]0x81,%l4 ! %l4 = ffffffffffffffff | |
10301 | ! Mem[0000000030101408] = 00000000, %l0 = 6dc28ab832f1564a | |
10302 | lduwa [%i4+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
10303 | ! Mem[0000000010141430] = bbbf9dab, %l0 = 0000000000000000 | |
10304 | lduha [%i5+0x032]%asi,%l0 ! %l0 = 0000000000009dab | |
10305 | ! Mem[00000000300c1408] = 00239aff, %l2 = 0000000000000000 | |
10306 | lduwa [%i3+%o4]0x81,%l2 ! %l2 = 0000000000239aff | |
10307 | ! Mem[0000000010041400] = ab3d7990 00000002, %l0 = 00009dab, %l1 = 0000ac8f | |
10308 | ldda [%i1+0x000]%asi,%l0 ! %l0 = 00000000ab3d7990 0000000000000002 | |
10309 | ! Starting 10 instruction Store Burst | |
10310 | ! %l2 = 0000000000239aff, Mem[0000000010001400] = fffffffa | |
10311 | stwa %l2,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00239aff | |
10312 | ||
10313 | p0_label_250: | |
10314 | ! Mem[00000000211c0001] = ff001a4c, %l5 = 00000000000000ff | |
10315 | ldstuba [%o2+0x001]%asi,%l5 ! %l5 = 00000000000000ff | |
10316 | ! Mem[0000000010041408] = 00ffffff, %l7 = 0000000000000000 | |
10317 | swapa [%i1+%o4]0x88,%l7 ! %l7 = 0000000000ffffff | |
10318 | ! Mem[0000000010041400] = ab3d7990, %l1 = 0000000000000002 | |
10319 | ldstuba [%i1+%g0]0x80,%l1 ! %l1 = 000000ab000000ff | |
10320 | ! %f20 = faa36376 90e83937, Mem[00000000100c1408] = fcf80000 00000000 | |
10321 | stda %f20,[%i3+%o4]0x88 ! Mem[00000000100c1408] = faa36376 90e83937 | |
10322 | ! %f23 = 000000ff, Mem[0000000010081410] = ffff00ab | |
10323 | sta %f23,[%i2+%o5]0x88 ! Mem[0000000010081410] = 000000ff | |
10324 | ! Mem[0000000010181410] = 00000000, %l0 = 00000000ab3d7990 | |
10325 | ldstuba [%i6+%o5]0x88,%l0 ! %l0 = 00000000000000ff | |
10326 | ! Mem[0000000010041408] = 00000000, %l4 = ffffffffffffffff | |
10327 | ldstuba [%i1+%o4]0x88,%l4 ! %l4 = 00000000000000ff | |
10328 | ! %l3 = 0000000000000000, Mem[0000000010141408] = 00000000 | |
10329 | stba %l3,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000 | |
10330 | ! Mem[0000000030001408] = ffffffff, %l6 = 00000000fffffffa | |
10331 | swapa [%i0+%o4]0x89,%l6 ! %l6 = 00000000ffffffff | |
10332 | ! Starting 10 instruction Load Burst | |
10333 | ! Mem[0000000010041434] = ff000000, %l1 = 00000000000000ab | |
10334 | ldub [%i1+0x036],%l1 ! %l1 = 0000000000000000 | |
10335 | ||
10336 | ! Check Point 50 for processor 0 | |
10337 | ||
10338 | set p0_check_pt_data_50,%g4 | |
10339 | rd %ccr,%g5 ! %g5 = 44 | |
10340 | ldx [%g4+0x08],%g2 | |
10341 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
10342 | bne %xcc,p0_reg_check_fail0 | |
10343 | mov 0xee0,%g1 | |
10344 | ldx [%g4+0x10],%g2 | |
10345 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
10346 | bne %xcc,p0_reg_check_fail1 | |
10347 | mov 0xee1,%g1 | |
10348 | ldx [%g4+0x18],%g2 | |
10349 | cmp %l2,%g2 ! %l2 = 0000000000239aff | |
10350 | bne %xcc,p0_reg_check_fail2 | |
10351 | mov 0xee2,%g1 | |
10352 | ldx [%g4+0x20],%g2 | |
10353 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
10354 | bne %xcc,p0_reg_check_fail4 | |
10355 | mov 0xee4,%g1 | |
10356 | ldx [%g4+0x28],%g2 | |
10357 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
10358 | bne %xcc,p0_reg_check_fail5 | |
10359 | mov 0xee5,%g1 | |
10360 | ldx [%g4+0x30],%g2 | |
10361 | cmp %l7,%g2 ! %l7 = 0000000000ffffff | |
10362 | bne %xcc,p0_reg_check_fail7 | |
10363 | mov 0xee7,%g1 | |
10364 | ldx [%g4+0x38],%g3 | |
10365 | std %f0,[%g4] | |
10366 | ldx [%g4],%g2 | |
10367 | cmp %g3,%g2 ! %f0 = 00000000 000000ff | |
10368 | bne %xcc,p0_freg_check_fail | |
10369 | mov 0xf00,%g1 | |
10370 | ldx [%g4+0x40],%g3 | |
10371 | std %f2,[%g4] | |
10372 | ldx [%g4],%g2 | |
10373 | cmp %g3,%g2 ! %f2 = ff000000 000000ff | |
10374 | bne %xcc,p0_freg_check_fail | |
10375 | mov 0xf02,%g1 | |
10376 | ldx [%g4+0x48],%g3 | |
10377 | std %f6,[%g4] | |
10378 | ldx [%g4],%g2 | |
10379 | cmp %g3,%g2 ! %f6 = 665ef8fc 00000000 | |
10380 | bne %xcc,p0_freg_check_fail | |
10381 | mov 0xf06,%g1 | |
10382 | ldx [%g4+0x50],%g3 | |
10383 | std %f16,[%g4] | |
10384 | ldx [%g4],%g2 | |
10385 | cmp %g3,%g2 ! %f16 = ab3d7990 0000ff00 | |
10386 | bne %xcc,p0_freg_check_fail | |
10387 | mov 0xf16,%g1 | |
10388 | ||
10389 | ! Check Point 50 completed | |
10390 | ||
10391 | ||
10392 | p0_label_251: | |
10393 | ! Mem[0000000010141418] = ff1d000000000024, %l3 = 0000000000000000 | |
10394 | ldxa [%i5+0x018]%asi,%l3 ! %l3 = ff1d000000000024 | |
10395 | ! Mem[0000000010041418] = 000000ff 00b3e323, %l2 = 00239aff, %l3 = 00000024 | |
10396 | ldd [%i1+0x018],%l2 ! %l2 = 00000000000000ff 0000000000b3e323 | |
10397 | ! Mem[0000000010081410] = 00000000000000ff, %l4 = 0000000000000000 | |
10398 | ldxa [%i2+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
10399 | ! Mem[0000000010081430] = 947e307d, %l2 = 00000000000000ff | |
10400 | ldsba [%i2+0x031]%asi,%l2 ! %l2 = 000000000000007e | |
10401 | ! Mem[0000000010001410] = 00009400, %l4 = 00000000000000ff | |
10402 | lduha [%i0+%o5]0x88,%l4 ! %l4 = 0000000000009400 | |
10403 | ! Mem[0000000010081400] = 0000000000000000, %f20 = faa36376 90e83937 | |
10404 | ldda [%i2+0x000]%asi,%f20 ! %f20 = 00000000 00000000 | |
10405 | ! Mem[00000000211c0000] = ffff1a4c, %l3 = 0000000000b3e323 | |
10406 | lduha [%o2+0x000]%asi,%l3 ! %l3 = 000000000000ffff | |
10407 | ! Mem[0000000010141400] = 00ff0000, %l1 = 0000000000000000 | |
10408 | lduwa [%i5+%g0]0x88,%l1 ! %l1 = 0000000000ff0000 | |
10409 | ! Mem[00000000211c0000] = ffff1a4c, %l4 = 0000000000009400 | |
10410 | ldsb [%o2+0x001],%l4 ! %l4 = ffffffffffffffff | |
10411 | ! Starting 10 instruction Store Burst | |
10412 | ! Mem[0000000030001400] = c45f0094, %l3 = 000000000000ffff | |
10413 | swapa [%i0+%g0]0x89,%l3 ! %l3 = 00000000c45f0094 | |
10414 | ||
10415 | p0_label_252: | |
10416 | ! Mem[0000000010141438] = 0000000000000000, %l2 = 000000000000007e, %l2 = 000000000000007e | |
10417 | add %i5,0x38,%g1 | |
10418 | casxa [%g1]0x80,%l2,%l2 ! %l2 = 0000000000000000 | |
10419 | ! %l0 = 0000000000000000, Mem[0000000010181410] = ff000000, %asi = 80 | |
10420 | stwa %l0,[%i6+0x010]%asi ! Mem[0000000010181410] = 00000000 | |
10421 | ! Mem[00000000201c0001] = ff9c9457, %l6 = 00000000ffffffff | |
10422 | ldstuba [%o0+0x001]%asi,%l6 ! %l6 = 0000009c000000ff | |
10423 | ! Mem[0000000030001410] = 00000000, %l3 = 00000000c45f0094 | |
10424 | ldsba [%i0+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
10425 | ! %l7 = 0000000000ffffff, Mem[00000000100c1410] = ff000000 | |
10426 | stwa %l7,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 00ffffff | |
10427 | ! Mem[0000000020800040] = fffc7379, %l7 = 0000000000ffffff | |
10428 | ldstuba [%o1+0x040]%asi,%l7 ! %l7 = 000000ff000000ff | |
10429 | ! %l4 = ffffffffffffffff, Mem[0000000010181408] = 94005fc4 | |
10430 | stha %l4,[%i6+%o4]0x80 ! Mem[0000000010181408] = ffff5fc4 | |
10431 | ! Mem[00000000300c1408] = ff9a2300, %l5 = 0000000000000000 | |
10432 | ldstuba [%i3+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
10433 | ! %f24 = 1f41ff76 2164159c, %l3 = 0000000000000000 | |
10434 | ! Mem[00000000100c1420] = 022d96f89c510000 | |
10435 | add %i3,0x020,%g1 | |
10436 | stda %f24,[%g1+%l3]ASI_PST16_P ! Mem[00000000100c1420] = 022d96f89c510000 | |
10437 | ! Starting 10 instruction Load Burst | |
10438 | ! Mem[0000000030141410] = 00b3ffff, %l2 = 0000000000000000 | |
10439 | lduba [%i5+%o5]0x89,%l2 ! %l2 = 00000000000000ff | |
10440 | ||
10441 | p0_label_253: | |
10442 | ! Mem[0000000030041400] = faa36376, %l1 = 0000000000ff0000 | |
10443 | ldswa [%i1+%g0]0x89,%l1 ! %l1 = fffffffffaa36376 | |
10444 | ! Mem[0000000010001418] = 00002e7a, %l3 = 0000000000000000 | |
10445 | lduw [%i0+0x018],%l3 ! %l3 = 0000000000002e7a | |
10446 | ! Mem[0000000010001400] = 00239aff, %l7 = 00000000000000ff | |
10447 | lduwa [%i0+%g0]0x88,%l7 ! %l7 = 0000000000239aff | |
10448 | ! Mem[000000001010140c] = 000000ff, %l6 = 000000000000009c | |
10449 | lduh [%i4+0x00e],%l6 ! %l6 = 00000000000000ff | |
10450 | ! Mem[0000000010101410] = 00000000, %f28 = ffffffff | |
10451 | lda [%i4+%o5]0x80,%f28 ! %f28 = 00000000 | |
10452 | ! Mem[0000000030101408] = 00000000, %l6 = 00000000000000ff | |
10453 | ldsha [%i4+%o4]0x81,%l6 ! %l6 = 0000000000000000 | |
10454 | ! Mem[00000000218000c0] = ffca8d82, %l2 = 00000000000000ff | |
10455 | ldsba [%o3+0x0c1]%asi,%l2 ! %l2 = ffffffffffffffca | |
10456 | ! Mem[0000000030001410] = ff000000 00000000, %l0 = 00000000, %l1 = faa36376 | |
10457 | ldda [%i0+%o5]0x89,%l0 ! %l0 = 0000000000000000 00000000ff000000 | |
10458 | ! Mem[00000000300c1408] = fec67c63ff9a23ff, %f4 = ff000000 ab000000 | |
10459 | ldda [%i3+%o4]0x89,%f4 ! %f4 = fec67c63 ff9a23ff | |
10460 | ! Starting 10 instruction Store Burst | |
10461 | ! %f0 = 00000000 000000ff ff000000 000000ff | |
10462 | ! %f4 = fec67c63 ff9a23ff 665ef8fc 00000000 | |
10463 | ! %f8 = 7a000000 ff000000 ff000000 00000000 | |
10464 | ! %f12 = 00000000 00000000 ff000000 ffffb7f8 | |
10465 | stda %f0,[%i6]ASI_BLK_AIUP ! Block Store to 0000000010181400 | |
10466 | ||
10467 | p0_label_254: | |
10468 | ! %l6 = 0000000000000000, Mem[000000001018141e] = 00000000, %asi = 80 | |
10469 | stba %l6,[%i6+0x01e]%asi ! Mem[000000001018141c] = 00000000 | |
10470 | ! Mem[0000000010141410] = 00000000, %l4 = ffffffffffffffff | |
10471 | ldstuba [%i5+%o5]0x80,%l4 ! %l4 = 00000000000000ff | |
10472 | ! %l3 = 0000000000002e7a, Mem[00000000300c1408] = ff9a23ff | |
10473 | stha %l3,[%i3+%o4]0x89 ! Mem[00000000300c1408] = ff9a2e7a | |
10474 | ! Mem[0000000021800100] = fff811d1, %l4 = 0000000000000000 | |
10475 | ldstuba [%o3+0x100]%asi,%l4 ! %l4 = 000000ff000000ff | |
10476 | ! %f30 = 23e3b300 00ffffff, Mem[0000000010181400] = 00000000 ff000000 | |
10477 | stda %f30,[%i6+%g0]0x88 ! Mem[0000000010181400] = 23e3b300 00ffffff | |
10478 | ! %l1 = 00000000ff000000, Mem[0000000020800000] = 2e7a8470 | |
10479 | sth %l1,[%o1+%g0] ! Mem[0000000020800000] = 00008470 | |
10480 | ! Mem[0000000030081408] = 94005fc4, %l2 = ffffffffffffffca | |
10481 | swapa [%i2+%o4]0x81,%l2 ! %l2 = 0000000094005fc4 | |
10482 | ! %l5 = 0000000000000000, Mem[0000000030181410] = 000000ff | |
10483 | stwa %l5,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 | |
10484 | ! Mem[0000000010101408] = 7a2e0000, %l2 = 0000000094005fc4 | |
10485 | swapa [%i4+%o4]0x88,%l2 ! %l2 = 000000007a2e0000 | |
10486 | ! Starting 10 instruction Load Burst | |
10487 | ! Mem[0000000010081408] = ffffffffffffffff, %l1 = 00000000ff000000 | |
10488 | ldxa [%i2+%o4]0x80,%l1 ! %l1 = ffffffffffffffff | |
10489 | ||
10490 | p0_label_255: | |
10491 | ! Mem[0000000010101410] = 00000000, %l7 = 0000000000239aff | |
10492 | lduba [%i4+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
10493 | ! Mem[0000000030181400] = 4e00000000000000, %f18 = ffffff00 00000000 | |
10494 | ldda [%i6+%g0]0x81,%f18 ! %f18 = 4e000000 00000000 | |
10495 | ! Mem[0000000030141410] = 00b3ffff, %l0 = 0000000000000000 | |
10496 | lduba [%i5+%o5]0x89,%l0 ! %l0 = 00000000000000ff | |
10497 | ! Mem[0000000030041410] = ffffffff00000000, %l3 = 0000000000002e7a | |
10498 | ldxa [%i1+%o5]0x89,%l3 ! %l3 = ffffffff00000000 | |
10499 | ! Mem[0000000030081408] = ffffffca, %l7 = 0000000000000000 | |
10500 | ldsba [%i2+%o4]0x81,%l7 ! %l7 = ffffffffffffffff | |
10501 | ! Mem[0000000020800000] = 00008470, %l5 = 0000000000000000 | |
10502 | ldsh [%o1+%g0],%l5 ! %l5 = 0000000000000000 | |
10503 | ! Mem[0000000030081408] = caffffff, %l2 = 000000007a2e0000 | |
10504 | ldsba [%i2+%o4]0x89,%l2 ! %l2 = ffffffffffffffff | |
10505 | ! Mem[0000000021800180] = 00ffe2ae, %l6 = 0000000000000000 | |
10506 | lduba [%o3+0x180]%asi,%l6 ! %l6 = 0000000000000000 | |
10507 | ! Mem[0000000030041400] = faa36376, %l6 = 0000000000000000 | |
10508 | lduba [%i1+%g0]0x89,%l6 ! %l6 = 0000000000000076 | |
10509 | ! Starting 10 instruction Store Burst | |
10510 | ! Mem[0000000010101410] = 00000000000000ff, %l3 = ffffffff00000000, %l3 = ffffffff00000000 | |
10511 | add %i4,0x10,%g1 | |
10512 | casxa [%g1]0x80,%l3,%l3 ! %l3 = 00000000000000ff | |
10513 | ||
10514 | ! Check Point 51 for processor 0 | |
10515 | ||
10516 | set p0_check_pt_data_51,%g4 | |
10517 | rd %ccr,%g5 ! %g5 = 44 | |
10518 | ldx [%g4+0x08],%g2 | |
10519 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
10520 | bne %xcc,p0_reg_check_fail0 | |
10521 | mov 0xee0,%g1 | |
10522 | ldx [%g4+0x10],%g2 | |
10523 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
10524 | bne %xcc,p0_reg_check_fail1 | |
10525 | mov 0xee1,%g1 | |
10526 | ldx [%g4+0x18],%g2 | |
10527 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
10528 | bne %xcc,p0_reg_check_fail2 | |
10529 | mov 0xee2,%g1 | |
10530 | ldx [%g4+0x20],%g2 | |
10531 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
10532 | bne %xcc,p0_reg_check_fail3 | |
10533 | mov 0xee3,%g1 | |
10534 | ldx [%g4+0x28],%g2 | |
10535 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
10536 | bne %xcc,p0_reg_check_fail4 | |
10537 | mov 0xee4,%g1 | |
10538 | ldx [%g4+0x30],%g2 | |
10539 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
10540 | bne %xcc,p0_reg_check_fail5 | |
10541 | mov 0xee5,%g1 | |
10542 | ldx [%g4+0x38],%g2 | |
10543 | cmp %l6,%g2 ! %l6 = 0000000000000076 | |
10544 | bne %xcc,p0_reg_check_fail6 | |
10545 | mov 0xee6,%g1 | |
10546 | ldx [%g4+0x40],%g2 | |
10547 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
10548 | bne %xcc,p0_reg_check_fail7 | |
10549 | mov 0xee7,%g1 | |
10550 | ldx [%g4+0x48],%g3 | |
10551 | std %f0,[%g4] | |
10552 | ldx [%g4],%g2 | |
10553 | cmp %g3,%g2 ! %f0 = 00000000 000000ff | |
10554 | bne %xcc,p0_freg_check_fail | |
10555 | mov 0xf00,%g1 | |
10556 | ldx [%g4+0x50],%g3 | |
10557 | std %f2,[%g4] | |
10558 | ldx [%g4],%g2 | |
10559 | cmp %g3,%g2 ! %f2 = ff000000 000000ff | |
10560 | bne %xcc,p0_freg_check_fail | |
10561 | mov 0xf02,%g1 | |
10562 | ldx [%g4+0x58],%g3 | |
10563 | std %f4,[%g4] | |
10564 | ldx [%g4],%g2 | |
10565 | cmp %g3,%g2 ! %f4 = fec67c63 ff9a23ff | |
10566 | bne %xcc,p0_freg_check_fail | |
10567 | mov 0xf04,%g1 | |
10568 | ldx [%g4+0x60],%g3 | |
10569 | std %f18,[%g4] | |
10570 | ldx [%g4],%g2 | |
10571 | cmp %g3,%g2 ! %f18 = 4e000000 00000000 | |
10572 | bne %xcc,p0_freg_check_fail | |
10573 | mov 0xf18,%g1 | |
10574 | ldx [%g4+0x68],%g3 | |
10575 | std %f20,[%g4] | |
10576 | ldx [%g4],%g2 | |
10577 | cmp %g3,%g2 ! %f20 = 00000000 00000000 | |
10578 | bne %xcc,p0_freg_check_fail | |
10579 | mov 0xf20,%g1 | |
10580 | ldx [%g4+0x70],%g3 | |
10581 | std %f28,[%g4] | |
10582 | ldx [%g4],%g2 | |
10583 | cmp %g3,%g2 ! %f28 = 00000000 ff000000 | |
10584 | bne %xcc,p0_freg_check_fail | |
10585 | mov 0xf28,%g1 | |
10586 | ||
10587 | ! Check Point 51 completed | |
10588 | ||
10589 | ||
10590 | p0_label_256: | |
10591 | ! %f30 = 23e3b300, Mem[0000000030141410] = ffffb300 | |
10592 | sta %f30,[%i5+%o5]0x81 ! Mem[0000000030141410] = 23e3b300 | |
10593 | ! %f26 = b179bad6 f8962d02, Mem[0000000010041438] = 3739e890 7663a3fa | |
10594 | stda %f26,[%i1+0x038]%asi ! Mem[0000000010041438] = b179bad6 f8962d02 | |
10595 | ! %f22 = fc734517 000000ff, %l3 = 00000000000000ff | |
10596 | ! Mem[0000000010141418] = ff1d000000000024 | |
10597 | add %i5,0x018,%g1 | |
10598 | stda %f22,[%g1+%l3]ASI_PST8_PL ! Mem[0000000010141418] = ff000000174573fc | |
10599 | ! %l4 = 00000000000000ff, Mem[0000000010101400] = 00000000 | |
10600 | stba %l4,[%i4+%g0]0x88 ! Mem[0000000010101400] = 000000ff | |
10601 | ! %l6 = 00000076, %l7 = ffffffff, Mem[0000000010041408] = 000000ff 00000000 | |
10602 | stda %l6,[%i1+%o4]0x88 ! Mem[0000000010041408] = 00000076 ffffffff | |
10603 | ! Mem[00000000100c1410] = ffffff00, %l1 = ffffffffffffffff | |
10604 | swapa [%i3+%o5]0x80,%l1 ! %l1 = 00000000ffffff00 | |
10605 | ! Mem[0000000010041430] = ffffffffff000000, %l7 = ffffffffffffffff, %l0 = 00000000000000ff | |
10606 | add %i1,0x30,%g1 | |
10607 | casxa [%g1]0x80,%l7,%l0 ! %l0 = ffffffffff000000 | |
10608 | ! %l0 = ffffffffff000000, Mem[0000000010181401] = ffffff00, %asi = 80 | |
10609 | stba %l0,[%i6+0x001]%asi ! Mem[0000000010181400] = ff00ff00 | |
10610 | ! %f6 = 665ef8fc 00000000, Mem[0000000030001400] = ffff0000 00003dab | |
10611 | stda %f6 ,[%i0+%g0]0x81 ! Mem[0000000030001400] = 665ef8fc 00000000 | |
10612 | ! Starting 10 instruction Load Burst | |
10613 | ! Mem[0000000010001410] = 00940000, %l2 = ffffffffffffffff | |
10614 | ldswa [%i0+%o5]0x80,%l2 ! %l2 = 0000000000940000 | |
10615 | ||
10616 | p0_label_257: | |
10617 | ! Mem[0000000030101410] = ffff0000, %f5 = ff9a23ff | |
10618 | lda [%i4+%o5]0x81,%f5 ! %f5 = ffff0000 | |
10619 | ! Mem[0000000030181408] = ff00ffff, %l3 = 00000000000000ff | |
10620 | ldsba [%i6+%o4]0x81,%l3 ! %l3 = ffffffffffffffff | |
10621 | ! Mem[0000000021800000] = 008f13a3, %l1 = 00000000ffffff00 | |
10622 | ldsb [%o3+%g0],%l1 ! %l1 = 0000000000000000 | |
10623 | ! Mem[00000000100c1400] = ffffffff, %l5 = 0000000000000000 | |
10624 | ldswa [%i3+%g0]0x88,%l5 ! %l5 = ffffffffffffffff | |
10625 | ! Mem[000000001010143c] = 0000ffff, %l0 = ffffffffff000000 | |
10626 | lduba [%i4+0x03e]%asi,%l0 ! %l0 = 00000000000000ff | |
10627 | ! Mem[0000000010101428] = 665ef8fcedf0a6df, %f20 = 00000000 00000000 | |
10628 | ldd [%i4+0x028],%f20 ! %f20 = 665ef8fc edf0a6df | |
10629 | membar #Sync ! Added by membar checker (41) | |
10630 | ! Mem[0000000010181408] = 000000ff, %l0 = 00000000000000ff | |
10631 | lduwa [%i6+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
10632 | ! Mem[0000000030041400] = 7663a3fa 00ff7990, %l6 = 00000076, %l7 = ffffffff | |
10633 | ldda [%i1+%g0]0x81,%l6 ! %l6 = 000000007663a3fa 0000000000ff7990 | |
10634 | ! Mem[0000000020800040] = fffc7379, %l1 = 0000000000000000 | |
10635 | ldsb [%o1+0x041],%l1 ! %l1 = fffffffffffffffc | |
10636 | ! Starting 10 instruction Store Burst | |
10637 | ! %l2 = 0000000000940000, Mem[0000000010001408] = 8facffff | |
10638 | stba %l2,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00acffff | |
10639 | ||
10640 | p0_label_258: | |
10641 | ! Mem[00000000100c1400] = ffffffff, %l1 = fffffffffffffffc | |
10642 | swapa [%i3+%g0]0x80,%l1 ! %l1 = 00000000ffffffff | |
10643 | ! %f30 = 23e3b300, Mem[0000000010101424] = 0000007a | |
10644 | st %f30,[%i4+0x024] ! Mem[0000000010101424] = 23e3b300 | |
10645 | ! Mem[000000001010141a] = ff000000, %l3 = ffffffffffffffff | |
10646 | ldstuba [%i4+0x01a]%asi,%l3 ! %l3 = 00000000000000ff | |
10647 | ! %l6 = 000000007663a3fa, Mem[0000000030081410] = b179bad6f8962d02 | |
10648 | stxa %l6,[%i2+%o5]0x81 ! Mem[0000000030081410] = 000000007663a3fa | |
10649 | ! %f14 = ff000000 ffffb7f8, Mem[0000000010081410] = ff000000 00000000 | |
10650 | stda %f14,[%i2+%o5]0x80 ! Mem[0000000010081410] = ff000000 ffffb7f8 | |
10651 | ! Mem[00000000100c1400] = fcffffff, %l6 = 000000007663a3fa | |
10652 | ldstuba [%i3+%g0]0x88,%l6 ! %l6 = 000000ff000000ff | |
10653 | ! %l3 = 0000000000000000, Mem[00000000300c1400] = 9400000000000000 | |
10654 | stxa %l3,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 0000000000000000 | |
10655 | ! Mem[00000000300c1400] = 00000000, %l2 = 0000000000940000 | |
10656 | ldstuba [%i3+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
10657 | ! %f16 = ab3d7990 0000ff00 4e000000 00000000 | |
10658 | ! %f20 = 665ef8fc edf0a6df fc734517 000000ff | |
10659 | ! %f24 = 1f41ff76 2164159c b179bad6 f8962d02 | |
10660 | ! %f28 = 00000000 ff000000 23e3b300 00ffffff | |
10661 | stda %f16,[%i4]ASI_COMMIT_P ! Block Store to 0000000010101400 | |
10662 | ! Starting 10 instruction Load Burst | |
10663 | ! Mem[0000000030001410] = 00000000, %l5 = ffffffffffffffff | |
10664 | lduwa [%i0+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
10665 | ||
10666 | p0_label_259: | |
10667 | ! Mem[0000000010181400] = 00ff00ff, %l0 = 00000000000000ff | |
10668 | lduha [%i6+%g0]0x88,%l0 ! %l0 = 00000000000000ff | |
10669 | ! Mem[00000000300c1410] = ff000000, %l3 = 0000000000000000 | |
10670 | lduha [%i3+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
10671 | ! Mem[0000000010081408] = ffffffffffffffff, %f4 = fec67c63 ffff0000 | |
10672 | ldda [%i2+%o4]0x80,%f4 ! %f4 = ffffffff ffffffff | |
10673 | ! Mem[0000000030001410] = 00000000, %l1 = 00000000ffffffff | |
10674 | lduha [%i0+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
10675 | ! Mem[000000001000140c] = 90e83937, %f0 = 00000000 | |
10676 | lda [%i0+0x00c]%asi,%f0 ! %f0 = 90e83937 | |
10677 | membar #Sync ! Added by membar checker (42) | |
10678 | ! Mem[0000000010101434] = ff000000, %l6 = 00000000000000ff | |
10679 | lduw [%i4+0x034],%l6 ! %l6 = 00000000ff000000 | |
10680 | ! Mem[0000000010081410] = ff000000, %l0 = 00000000000000ff | |
10681 | lduba [%i2+%o5]0x80,%l0 ! %l0 = 00000000000000ff | |
10682 | ! Mem[0000000010001410] = ff00000000009400, %f28 = 00000000 ff000000 | |
10683 | ldda [%i0+%o5]0x88,%f28 ! %f28 = ff000000 00009400 | |
10684 | ! Mem[0000000010101410] = 665ef8fc, %l1 = 0000000000000000 | |
10685 | lduba [%i4+%o5]0x80,%l1 ! %l1 = 0000000000000066 | |
10686 | ! Starting 10 instruction Store Burst | |
10687 | ! %f23 = 000000ff, Mem[0000000030101400] = 00b3e323 | |
10688 | sta %f23,[%i4+%g0]0x89 ! Mem[0000000030101400] = 000000ff | |
10689 | ||
10690 | p0_label_260: | |
10691 | ! Mem[0000000010081410] = ff000000, %l2 = 00000000, %l3 = 00000000 | |
10692 | add %i2,0x10,%g1 | |
10693 | casa [%g1]0x80,%l2,%l3 ! %l3 = 00000000ff000000 | |
10694 | ! %l7 = 0000000000ff7990, Mem[0000000030081410] = 00000000 | |
10695 | stba %l7,[%i2+%o5]0x81 ! Mem[0000000030081410] = 90000000 | |
10696 | ! %f16 = ab3d7990 0000ff00, Mem[0000000010101400] = ab3d7990 0000ff00 | |
10697 | std %f16,[%i4+%g0] ! Mem[0000000010101400] = ab3d7990 0000ff00 | |
10698 | ! %f27 = f8962d02, Mem[0000000030141408] = 174573fc | |
10699 | sta %f27,[%i5+%o4]0x89 ! Mem[0000000030141408] = f8962d02 | |
10700 | ! %l3 = 00000000ff000000, Mem[0000000010141410] = ff000000 | |
10701 | stwa %l3,[%i5+%o5]0x80 ! Mem[0000000010141410] = ff000000 | |
10702 | ! %l1 = 0000000000000066, Mem[0000000010041400] = 0200000090793dff | |
10703 | stxa %l1,[%i1+%g0]0x88 ! Mem[0000000010041400] = 0000000000000066 | |
10704 | ! Mem[00000000300c1400] = 000000ff, %l2 = 0000000000000000 | |
10705 | ldstuba [%i3+%g0]0x89,%l2 ! %l2 = 000000ff000000ff | |
10706 | ! %l4 = 00000000000000ff, Mem[0000000010041408] = 00000076 | |
10707 | stba %l4,[%i1+%o4]0x88 ! Mem[0000000010041408] = 000000ff | |
10708 | ! Mem[0000000010081410] = ff000000, %l5 = 0000000000000000 | |
10709 | ldstuba [%i2+%o5]0x80,%l5 ! %l5 = 000000ff000000ff | |
10710 | ! Starting 10 instruction Load Burst | |
10711 | ! Mem[0000000010101400] = 90793dab, %l6 = 00000000ff000000 | |
10712 | lduba [%i4+%g0]0x88,%l6 ! %l6 = 00000000000000ab | |
10713 | ||
10714 | ! Check Point 52 for processor 0 | |
10715 | ||
10716 | set p0_check_pt_data_52,%g4 | |
10717 | rd %ccr,%g5 ! %g5 = 44 | |
10718 | ldx [%g4+0x08],%g2 | |
10719 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
10720 | bne %xcc,p0_reg_check_fail0 | |
10721 | mov 0xee0,%g1 | |
10722 | ldx [%g4+0x10],%g2 | |
10723 | cmp %l1,%g2 ! %l1 = 0000000000000066 | |
10724 | bne %xcc,p0_reg_check_fail1 | |
10725 | mov 0xee1,%g1 | |
10726 | ldx [%g4+0x18],%g2 | |
10727 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
10728 | bne %xcc,p0_reg_check_fail2 | |
10729 | mov 0xee2,%g1 | |
10730 | ldx [%g4+0x20],%g2 | |
10731 | cmp %l3,%g2 ! %l3 = 00000000ff000000 | |
10732 | bne %xcc,p0_reg_check_fail3 | |
10733 | mov 0xee3,%g1 | |
10734 | ldx [%g4+0x28],%g2 | |
10735 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
10736 | bne %xcc,p0_reg_check_fail5 | |
10737 | mov 0xee5,%g1 | |
10738 | ldx [%g4+0x30],%g2 | |
10739 | cmp %l6,%g2 ! %l6 = 00000000000000ab | |
10740 | bne %xcc,p0_reg_check_fail6 | |
10741 | mov 0xee6,%g1 | |
10742 | ldx [%g4+0x38],%g3 | |
10743 | std %f0,[%g4] | |
10744 | ldx [%g4],%g2 | |
10745 | cmp %g3,%g2 ! %f0 = 90e83937 000000ff | |
10746 | bne %xcc,p0_freg_check_fail | |
10747 | mov 0xf00,%g1 | |
10748 | ldx [%g4+0x40],%g3 | |
10749 | std %f4,[%g4] | |
10750 | ldx [%g4],%g2 | |
10751 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
10752 | bne %xcc,p0_freg_check_fail | |
10753 | mov 0xf04,%g1 | |
10754 | ldx [%g4+0x48],%g3 | |
10755 | std %f6,[%g4] | |
10756 | ldx [%g4],%g2 | |
10757 | cmp %g3,%g2 ! %f6 = 665ef8fc 00000000 | |
10758 | bne %xcc,p0_freg_check_fail | |
10759 | mov 0xf06,%g1 | |
10760 | ldx [%g4+0x50],%g3 | |
10761 | std %f20,[%g4] | |
10762 | ldx [%g4],%g2 | |
10763 | cmp %g3,%g2 ! %f20 = 665ef8fc edf0a6df | |
10764 | bne %xcc,p0_freg_check_fail | |
10765 | mov 0xf20,%g1 | |
10766 | ldx [%g4+0x58],%g3 | |
10767 | std %f28,[%g4] | |
10768 | ldx [%g4],%g2 | |
10769 | cmp %g3,%g2 ! %f28 = ff000000 00009400 | |
10770 | bne %xcc,p0_freg_check_fail | |
10771 | mov 0xf28,%g1 | |
10772 | ||
10773 | ! Check Point 52 completed | |
10774 | ||
10775 | ||
10776 | p0_label_261: | |
10777 | ! Mem[0000000010001410] = 00940000, %l0 = 00000000000000ff | |
10778 | lduba [%i0+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
10779 | ! Mem[000000001014143c] = 00000000, %l2 = 00000000000000ff | |
10780 | lduha [%i5+0x03e]%asi,%l2 ! %l2 = 0000000000000000 | |
10781 | ! Mem[0000000010001408] = 00acffff 90e83937, %l4 = 000000ff, %l5 = 000000ff | |
10782 | ldda [%i0+%o4]0x80,%l4 ! %l4 = 0000000000acffff 0000000090e83937 | |
10783 | ! Mem[000000001018143c] = ffffb7f8, %l7 = 0000000000ff7990 | |
10784 | lduba [%i6+0x03e]%asi,%l7 ! %l7 = 00000000000000b7 | |
10785 | ! Mem[00000000100c140c] = 7663a3fa, %f31 = 00ffffff | |
10786 | ld [%i3+0x00c],%f31 ! %f31 = 7663a3fa | |
10787 | ! Mem[0000000030081408] = ffffffca, %l0 = 0000000000000000 | |
10788 | lduwa [%i2+%o4]0x81,%l0 ! %l0 = 00000000ffffffca | |
10789 | ! Mem[0000000010101400] = 00ff000090793dab, %f8 = 7a000000 ff000000 | |
10790 | ldda [%i4+%g0]0x88,%f8 ! %f8 = 00ff0000 90793dab | |
10791 | ! Mem[0000000010101400] = ab3d7990, %l4 = 0000000000acffff | |
10792 | ldswa [%i4+%g0]0x80,%l4 ! %l4 = ffffffffab3d7990 | |
10793 | ! Mem[0000000030141410] = 00b3e323, %f9 = 90793dab | |
10794 | lda [%i5+%o5]0x89,%f9 ! %f9 = 00b3e323 | |
10795 | ! Starting 10 instruction Store Burst | |
10796 | ! Mem[0000000030001410] = 00000000, %l4 = ffffffffab3d7990 | |
10797 | swapa [%i0+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
10798 | ||
10799 | p0_label_262: | |
10800 | ! %f10 = ff000000 00000000, Mem[00000000300c1400] = ff000000 00000000 | |
10801 | stda %f10,[%i3+%g0]0x81 ! Mem[00000000300c1400] = ff000000 00000000 | |
10802 | ! %l2 = 0000000000000000, Mem[0000000010101408] = 4e000000 | |
10803 | stha %l2,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000 | |
10804 | ! Mem[0000000030141400] = 000000ff, %l1 = 0000000000000066 | |
10805 | ldstuba [%i5+%g0]0x89,%l1 ! %l1 = 000000ff000000ff | |
10806 | ! %l1 = 00000000000000ff, Mem[0000000010181408] = 000000ff | |
10807 | stba %l1,[%i6+%o4]0x88 ! Mem[0000000010181408] = 000000ff | |
10808 | ! Mem[0000000010101434] = ff000000, %l1 = 00000000000000ff, %asi = 80 | |
10809 | swapa [%i4+0x034]%asi,%l1 ! %l1 = 00000000ff000000 | |
10810 | ! %f30 = 23e3b300 7663a3fa, Mem[0000000010141408] = 00000000 ab3d0000 | |
10811 | stda %f30,[%i5+%o4]0x88 ! Mem[0000000010141408] = 23e3b300 7663a3fa | |
10812 | ! Mem[0000000010181400] = ff00ff00, %l7 = 00000000000000b7 | |
10813 | ldstuba [%i6+%g0]0x80,%l7 ! %l7 = 000000ff000000ff | |
10814 | ! %l0 = ffffffca, %l1 = ff000000, Mem[0000000010081400] = 00000000 00000000 | |
10815 | stda %l0,[%i2+%g0]0x88 ! Mem[0000000010081400] = ffffffca ff000000 | |
10816 | ! %l6 = 00000000000000ab, Mem[00000000201c0000] = ffff9457, %asi = 80 | |
10817 | stha %l6,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00ab9457 | |
10818 | ! Starting 10 instruction Load Burst | |
10819 | ! Mem[00000000100c1428] = 5d57d4e03d61d89c, %f14 = ff000000 ffffb7f8 | |
10820 | ldda [%i3+0x028]%asi,%f14 ! %f14 = 5d57d4e0 3d61d89c | |
10821 | ||
10822 | p0_label_263: | |
10823 | ! Mem[0000000030141410] = 00b3e323, %l4 = 0000000000000000 | |
10824 | ldswa [%i5+%o5]0x89,%l4 ! %l4 = 0000000000b3e323 | |
10825 | ! Mem[000000001014142c] = 637cc6fe, %l4 = 0000000000b3e323 | |
10826 | lduha [%i5+0x02c]%asi,%l4 ! %l4 = 000000000000637c | |
10827 | ! Mem[0000000030081408] = ffffffca, %l7 = 00000000000000ff | |
10828 | ldswa [%i2+%o4]0x81,%l7 ! %l7 = ffffffffffffffca | |
10829 | ! Mem[0000000030041410] = 00000000, %f6 = 665ef8fc | |
10830 | lda [%i1+%o5]0x81,%f6 ! %f6 = 00000000 | |
10831 | ! Mem[0000000030081410] = 90000000, %l6 = 00000000000000ab | |
10832 | ldsha [%i2+%o5]0x81,%l6 ! %l6 = ffffffffffff9000 | |
10833 | ! Mem[0000000010141400] = 0000ff00ffffffff, %l7 = ffffffffffffffca | |
10834 | ldxa [%i5+%g0]0x80,%l7 ! %l7 = 0000ff00ffffffff | |
10835 | ! Mem[0000000010101400] = ab3d7990, %f8 = 00ff0000 | |
10836 | lda [%i4+%g0]0x80,%f8 ! %f8 = ab3d7990 | |
10837 | ! Mem[0000000010101408] = 00000000 00000000, %l2 = 00000000, %l3 = ff000000 | |
10838 | ldda [%i4+%o4]0x80,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
10839 | ! Mem[00000000100c1408] = 90e83937, %l0 = 00000000ffffffca | |
10840 | lduha [%i3+%o4]0x88,%l0 ! %l0 = 0000000000003937 | |
10841 | ! Starting 10 instruction Store Burst | |
10842 | ! %l0 = 0000000000003937, Mem[0000000010141410] = ff000000 | |
10843 | stwa %l0,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00003937 | |
10844 | ||
10845 | p0_label_264: | |
10846 | ! Mem[0000000010141410] = 00003937, %l1 = 00000000ff000000 | |
10847 | ldstuba [%i5+%o5]0x80,%l1 ! %l1 = 00000000000000ff | |
10848 | ! %f20 = 665ef8fc edf0a6df, %l1 = 0000000000000000 | |
10849 | ! Mem[0000000010181408] = ff000000000000ff | |
10850 | add %i6,0x008,%g1 | |
10851 | stda %f20,[%g1+%l1]ASI_PST16_PL ! Mem[0000000010181408] = ff000000000000ff | |
10852 | ! Mem[0000000010101400] = 90793dab, %l2 = 0000000000000000 | |
10853 | swapa [%i4+%g0]0x88,%l2 ! %l2 = 0000000090793dab | |
10854 | ! Mem[0000000010181423] = 7a000000, %l6 = ffffffffffff9000 | |
10855 | ldstub [%i6+0x023],%l6 ! %l6 = 00000000000000ff | |
10856 | ! Mem[00000000100c142c] = 3d61d89c, %l5 = 90e83937, %l6 = 00000000 | |
10857 | add %i3,0x2c,%g1 | |
10858 | casa [%g1]0x80,%l5,%l6 ! %l6 = 000000003d61d89c | |
10859 | ! %f26 = b179bad6 f8962d02, Mem[0000000010041408] = 000000ff ffffffff | |
10860 | stda %f26,[%i1+%o4]0x88 ! Mem[0000000010041408] = b179bad6 f8962d02 | |
10861 | ! %f17 = 0000ff00, Mem[0000000010001400] = 00239aff | |
10862 | sta %f17,[%i0+%g0]0x88 ! Mem[0000000010001400] = 0000ff00 | |
10863 | ! %l3 = 0000000000000000, Mem[0000000010001408] = 00acffff | |
10864 | stba %l3,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00acffff | |
10865 | ! %l4 = 000000000000637c, Mem[00000000211c0000] = ffff1a4c | |
10866 | stb %l4,[%o2+%g0] ! Mem[00000000211c0000] = 7cff1a4c | |
10867 | ! Starting 10 instruction Load Burst | |
10868 | ! Mem[00000000100c1430] = fc734517, %l2 = 0000000090793dab | |
10869 | lduba [%i3+0x030]%asi,%l2 ! %l2 = 00000000000000fc | |
10870 | ||
10871 | p0_label_265: | |
10872 | ! Mem[00000000211c0000] = 7cff1a4c, %l3 = 0000000000000000 | |
10873 | ldsh [%o2+%g0],%l3 ! %l3 = 0000000000007cff | |
10874 | ! Mem[0000000030141400] = 000000ff, %l7 = 0000ff00ffffffff | |
10875 | lduha [%i5+%g0]0x89,%l7 ! %l7 = 00000000000000ff | |
10876 | ! Mem[0000000030041408] = 000000ff, %l5 = 0000000090e83937 | |
10877 | lduha [%i1+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
10878 | ! Mem[0000000010001408] = 3739e890ffffac00, %f26 = b179bad6 f8962d02 | |
10879 | ldda [%i0+%o4]0x88,%f26 ! %f26 = 3739e890 ffffac00 | |
10880 | ! Mem[0000000010001410] = 00940000, %l4 = 000000000000637c | |
10881 | ldsba [%i0+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
10882 | ! Mem[0000000010101408] = 00000000, %l7 = 00000000000000ff | |
10883 | lduha [%i4+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
10884 | ! Mem[0000000030041400] = 7663a3fa 00ff7990, %l2 = 000000fc, %l3 = 00007cff | |
10885 | ldda [%i1+%g0]0x81,%l2 ! %l2 = 000000007663a3fa 0000000000ff7990 | |
10886 | ! Mem[0000000030001400] = 665ef8fc00000000, %l3 = 0000000000ff7990 | |
10887 | ldxa [%i0+%g0]0x81,%l3 ! %l3 = 665ef8fc00000000 | |
10888 | ! Mem[00000000100c1428] = 5d57d4e0, %l7 = 0000000000000000 | |
10889 | ldsh [%i3+0x02a],%l7 ! %l7 = ffffffffffffd4e0 | |
10890 | ! Starting 10 instruction Store Burst | |
10891 | ! %l3 = 665ef8fc00000000, Mem[0000000010081400] = ffffffca | |
10892 | stha %l3,[%i2+%g0]0x88 ! Mem[0000000010081400] = ffff0000 | |
10893 | ||
10894 | ! Check Point 53 for processor 0 | |
10895 | ||
10896 | set p0_check_pt_data_53,%g4 | |
10897 | rd %ccr,%g5 ! %g5 = 44 | |
10898 | ldx [%g4+0x08],%g2 | |
10899 | cmp %l0,%g2 ! %l0 = 0000000000003937 | |
10900 | bne %xcc,p0_reg_check_fail0 | |
10901 | mov 0xee0,%g1 | |
10902 | ldx [%g4+0x10],%g2 | |
10903 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
10904 | bne %xcc,p0_reg_check_fail1 | |
10905 | mov 0xee1,%g1 | |
10906 | ldx [%g4+0x18],%g2 | |
10907 | cmp %l2,%g2 ! %l2 = 000000007663a3fa | |
10908 | bne %xcc,p0_reg_check_fail2 | |
10909 | mov 0xee2,%g1 | |
10910 | ldx [%g4+0x20],%g2 | |
10911 | cmp %l3,%g2 ! %l3 = 665ef8fc00000000 | |
10912 | bne %xcc,p0_reg_check_fail3 | |
10913 | mov 0xee3,%g1 | |
10914 | ldx [%g4+0x28],%g2 | |
10915 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
10916 | bne %xcc,p0_reg_check_fail4 | |
10917 | mov 0xee4,%g1 | |
10918 | ldx [%g4+0x30],%g2 | |
10919 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
10920 | bne %xcc,p0_reg_check_fail5 | |
10921 | mov 0xee5,%g1 | |
10922 | ldx [%g4+0x38],%g2 | |
10923 | cmp %l6,%g2 ! %l6 = 000000003d61d89c | |
10924 | bne %xcc,p0_reg_check_fail6 | |
10925 | mov 0xee6,%g1 | |
10926 | ldx [%g4+0x40],%g2 | |
10927 | cmp %l7,%g2 ! %l7 = ffffffffffffd4e0 | |
10928 | bne %xcc,p0_reg_check_fail7 | |
10929 | mov 0xee7,%g1 | |
10930 | ldx [%g4+0x48],%g3 | |
10931 | std %f2,[%g4] | |
10932 | ldx [%g4],%g2 | |
10933 | cmp %g3,%g2 ! %f2 = ff000000 000000ff | |
10934 | bne %xcc,p0_freg_check_fail | |
10935 | mov 0xf02,%g1 | |
10936 | ldx [%g4+0x50],%g3 | |
10937 | std %f4,[%g4] | |
10938 | ldx [%g4],%g2 | |
10939 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
10940 | bne %xcc,p0_freg_check_fail | |
10941 | mov 0xf04,%g1 | |
10942 | ldx [%g4+0x58],%g3 | |
10943 | std %f6,[%g4] | |
10944 | ldx [%g4],%g2 | |
10945 | cmp %g3,%g2 ! %f6 = 00000000 00000000 | |
10946 | bne %xcc,p0_freg_check_fail | |
10947 | mov 0xf06,%g1 | |
10948 | ldx [%g4+0x60],%g3 | |
10949 | std %f8,[%g4] | |
10950 | ldx [%g4],%g2 | |
10951 | cmp %g3,%g2 ! %f8 = ab3d7990 00b3e323 | |
10952 | bne %xcc,p0_freg_check_fail | |
10953 | mov 0xf08,%g1 | |
10954 | ldx [%g4+0x68],%g3 | |
10955 | std %f14,[%g4] | |
10956 | ldx [%g4],%g2 | |
10957 | cmp %g3,%g2 ! %f14 = 5d57d4e0 3d61d89c | |
10958 | bne %xcc,p0_freg_check_fail | |
10959 | mov 0xf14,%g1 | |
10960 | ldx [%g4+0x70],%g3 | |
10961 | std %f26,[%g4] | |
10962 | ldx [%g4],%g2 | |
10963 | cmp %g3,%g2 ! %f26 = 3739e890 ffffac00 | |
10964 | bne %xcc,p0_freg_check_fail | |
10965 | mov 0xf26,%g1 | |
10966 | ldx [%g4+0x78],%g3 | |
10967 | std %f30,[%g4] | |
10968 | ldx [%g4],%g2 | |
10969 | cmp %g3,%g2 ! %f30 = 23e3b300 7663a3fa | |
10970 | bne %xcc,p0_freg_check_fail | |
10971 | mov 0xf30,%g1 | |
10972 | ||
10973 | ! Check Point 53 completed | |
10974 | ||
10975 | ||
10976 | p0_label_266: | |
10977 | ! %l0 = 0000000000003937, Mem[0000000010101408] = 00000000 | |
10978 | stha %l0,[%i4+%o4]0x88 ! Mem[0000000010101408] = 00003937 | |
10979 | ! Mem[0000000030041410] = 00000000, %l2 = 000000007663a3fa | |
10980 | ldstuba [%i1+%o5]0x81,%l2 ! %l2 = 00000000000000ff | |
10981 | ! %f28 = ff000000, Mem[00000000100c1428] = 5d57d4e0 | |
10982 | st %f28,[%i3+0x028] ! Mem[00000000100c1428] = ff000000 | |
10983 | ! %l0 = 0000000000003937, Mem[0000000030141408] = 022d96f8000000ff | |
10984 | stxa %l0,[%i5+%o4]0x81 ! Mem[0000000030141408] = 0000000000003937 | |
10985 | ! %f0 = 90e83937 000000ff, %l4 = 0000000000000000 | |
10986 | ! Mem[0000000030081438] = ff00000080182efa | |
10987 | add %i2,0x038,%g1 | |
10988 | stda %f0,[%g1+%l4]ASI_PST16_SL ! Mem[0000000030081438] = ff00000080182efa | |
10989 | ! %l4 = 00000000, %l5 = 000000ff, Mem[0000000030181410] = 00000000 b792cdbe | |
10990 | stda %l4,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 000000ff | |
10991 | ! %l0 = 0000000000003937, Mem[00000000201c0000] = 00ab9457 | |
10992 | stb %l0,[%o0+%g0] ! Mem[00000000201c0000] = 37ab9457 | |
10993 | ! Mem[00000000100c1400] = fcffffff, %l4 = 0000000000000000 | |
10994 | ldstuba [%i3+%g0]0x88,%l4 ! %l4 = 000000ff000000ff | |
10995 | ! %f6 = 00000000 00000000, %l5 = 00000000000000ff | |
10996 | ! Mem[0000000010141438] = 0000000000000000 | |
10997 | add %i5,0x038,%g1 | |
10998 | stda %f6,[%g1+%l5]ASI_PST32_PL ! Mem[0000000010141438] = 0000000000000000 | |
10999 | ! Starting 10 instruction Load Burst | |
11000 | ! Mem[0000000030081408] = ffffffca, %l0 = 0000000000003937 | |
11001 | lduba [%i2+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
11002 | ||
11003 | p0_label_267: | |
11004 | ! Mem[00000000300c1410] = ff000000, %l7 = ffffffffffffd4e0 | |
11005 | lduha [%i3+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
11006 | ! Mem[0000000030041400] = 7663a3fa00ff7990, %f12 = 00000000 00000000 | |
11007 | ldda [%i1+%g0]0x81,%f12 ! %f12 = 7663a3fa 00ff7990 | |
11008 | ! Mem[0000000030141410] = 23e3b30000ffffff, %f10 = ff000000 00000000 | |
11009 | ldda [%i5+%o5]0x81,%f10 ! %f10 = 23e3b300 00ffffff | |
11010 | ! Mem[0000000010081410] = 000000ff, %l1 = 0000000000000000 | |
11011 | lduba [%i2+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
11012 | ! Mem[00000000100c1400] = ff000000fcffffff, %f8 = ab3d7990 00b3e323 | |
11013 | ldda [%i3+%g0]0x88,%f8 ! %f8 = ff000000 fcffffff | |
11014 | ! Mem[0000000010041408] = f8962d02, %l3 = 665ef8fc00000000 | |
11015 | lduwa [%i1+%o4]0x88,%l3 ! %l3 = 00000000f8962d02 | |
11016 | ! Mem[0000000010181400] = ff00ff00, %l6 = 000000003d61d89c | |
11017 | lduba [%i6+%g0]0x80,%l6 ! %l6 = 00000000000000ff | |
11018 | ! Mem[0000000010001408] = 3739e890 ffffac00, %l6 = 000000ff, %l7 = 00000000 | |
11019 | ldda [%i0+%o4]0x88,%l6 ! %l6 = 00000000ffffac00 000000003739e890 | |
11020 | ! Mem[00000000300c1410] = ff000000, %l2 = 0000000000000000 | |
11021 | ldswa [%i3+%o5]0x89,%l2 ! %l2 = ffffffffff000000 | |
11022 | ! Starting 10 instruction Store Burst | |
11023 | ! Mem[0000000010141414] = 00ffffff, %l7 = 000000003739e890, %asi = 80 | |
11024 | swapa [%i5+0x014]%asi,%l7 ! %l7 = 0000000000ffffff | |
11025 | ||
11026 | p0_label_268: | |
11027 | ! %f16 = ab3d7990 0000ff00 4e000000 00000000 | |
11028 | ! %f20 = 665ef8fc edf0a6df fc734517 000000ff | |
11029 | ! %f24 = 1f41ff76 2164159c 3739e890 ffffac00 | |
11030 | ! %f28 = ff000000 00009400 23e3b300 7663a3fa | |
11031 | stda %f16,[%i5]ASI_COMMIT_S ! Block Store to 0000000030141400 | |
11032 | ! %f0 = 90e83937 000000ff, Mem[00000000100c1410] = ffffffff ff000000 | |
11033 | stda %f0 ,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 90e83937 000000ff | |
11034 | ! %l4 = 00000000000000ff, Mem[0000000030001408] = fffffffa | |
11035 | stba %l4,[%i0+%o4]0x89 ! Mem[0000000030001408] = ffffffff | |
11036 | ! %l6 = ffffac00, %l7 = 00ffffff, Mem[0000000030001400] = fcf85e66 00000000 | |
11037 | stda %l6,[%i0+%g0]0x89 ! Mem[0000000030001400] = ffffac00 00ffffff | |
11038 | ! %l3 = 00000000f8962d02, Mem[00000000100c1400] = fcffffff | |
11039 | stba %l3,[%i3+%g0]0x88 ! Mem[00000000100c1400] = fcffff02 | |
11040 | ! Mem[0000000010101428] = b179bad6, %l7 = 0000000000ffffff, %asi = 80 | |
11041 | swapa [%i4+0x028]%asi,%l7 ! %l7 = 00000000b179bad6 | |
11042 | ! Mem[0000000010081410] = 000000ff, %l0 = 00000000000000ff | |
11043 | swapa [%i2+%o5]0x88,%l0 ! %l0 = 00000000000000ff | |
11044 | ! %l2 = ffffffffff000000, Mem[000000001010142e] = f8962d02, %asi = 80 | |
11045 | stha %l2,[%i4+0x02e]%asi ! Mem[000000001010142c] = f8960000 | |
11046 | ! Mem[0000000030081400] = 00000000, %l0 = 00000000000000ff | |
11047 | ldstuba [%i2+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
11048 | ! Starting 10 instruction Load Burst | |
11049 | ! Mem[0000000030081410] = 90000000, %f2 = ff000000 | |
11050 | lda [%i2+%o5]0x81,%f2 ! %f2 = 90000000 | |
11051 | ||
11052 | p0_label_269: | |
11053 | ! Mem[00000000100c1400] = 02fffffc, %l6 = 00000000ffffac00 | |
11054 | lduh [%i3+0x002],%l6 ! %l6 = 000000000000fffc | |
11055 | ! Mem[0000000010101400] = 00000000, %l6 = 000000000000fffc | |
11056 | lduha [%i4+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
11057 | ! Mem[0000000030081408] = caffffff, %l5 = 00000000000000ff | |
11058 | ldsba [%i2+%o4]0x89,%l5 ! %l5 = ffffffffffffffff | |
11059 | membar #Sync ! Added by membar checker (43) | |
11060 | ! Mem[0000000010141410] = ff003937 3739e890, %l2 = ff000000, %l3 = f8962d02 | |
11061 | ldda [%i5+%o5]0x80,%l2 ! %l2 = 00000000ff003937 000000003739e890 | |
11062 | ! Mem[0000000010101410] = fcf85e66, %l1 = 00000000000000ff | |
11063 | lduwa [%i4+%o5]0x88,%l1 ! %l1 = 00000000fcf85e66 | |
11064 | ! Mem[0000000010081400] = 0000ffff, %l2 = 00000000ff003937 | |
11065 | ldswa [%i2+%g0]0x80,%l2 ! %l2 = 000000000000ffff | |
11066 | ! Mem[00000000100c1410] = 000000ff, %l1 = 00000000fcf85e66 | |
11067 | lduwa [%i3+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
11068 | ! Mem[0000000010181438] = ff000000, %l0 = 0000000000000000 | |
11069 | ldsw [%i6+0x038],%l0 ! %l0 = ffffffffff000000 | |
11070 | ! Mem[0000000030081410] = 00000090, %f1 = 000000ff | |
11071 | lda [%i2+%o5]0x89,%f1 ! %f1 = 00000090 | |
11072 | ! Starting 10 instruction Store Burst | |
11073 | ! %f12 = 7663a3fa 00ff7990, Mem[0000000010001408] = ffffac00 3739e890 | |
11074 | stda %f12,[%i0+%o4]0x88 ! Mem[0000000010001408] = 7663a3fa 00ff7990 | |
11075 | ||
11076 | p0_label_270: | |
11077 | ! %l2 = 0000ffff, %l3 = 3739e890, Mem[0000000010141420] = 00cd92ff fcf8ffff | |
11078 | stda %l2,[%i5+0x020]%asi ! Mem[0000000010141420] = 0000ffff 3739e890 | |
11079 | ! %f31 = 7663a3fa, Mem[0000000030001408] = ffffffff | |
11080 | sta %f31,[%i0+%o4]0x89 ! Mem[0000000030001408] = 7663a3fa | |
11081 | ! Mem[0000000030101408] = 00000000, %l2 = 000000000000ffff | |
11082 | swapa [%i4+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
11083 | ! Mem[0000000010141410] = 373900ff, %l7 = 00000000b179bad6 | |
11084 | ldstuba [%i5+%o5]0x88,%l7 ! %l7 = 000000ff000000ff | |
11085 | ! %l7 = 00000000000000ff, Mem[0000000010041420] = 1f41ff762164159c, %asi = 80 | |
11086 | stxa %l7,[%i1+0x020]%asi ! Mem[0000000010041420] = 00000000000000ff | |
11087 | ! %l6 = 00000000, %l7 = 000000ff, Mem[0000000010041410] = 7663a3fa 3739e890 | |
11088 | stda %l6,[%i1+%o5]0x88 ! Mem[0000000010041410] = 00000000 000000ff | |
11089 | ! Mem[0000000030001408] = faa36376, %l5 = ffffffffffffffff | |
11090 | ldstuba [%i0+%o4]0x81,%l5 ! %l5 = 000000fa000000ff | |
11091 | ! %l3 = 000000003739e890, Mem[0000000030101408] = ab000000ffff0000 | |
11092 | stxa %l3,[%i4+%o4]0x89 ! Mem[0000000030101408] = 000000003739e890 | |
11093 | ! %l3 = 000000003739e890, Mem[0000000010141424] = 3739e890 | |
11094 | stw %l3,[%i5+0x024] ! Mem[0000000010141424] = 3739e890 | |
11095 | ! Starting 10 instruction Load Burst | |
11096 | ! Mem[0000000030001410] = 90793dab000000ff, %l0 = ffffffffff000000 | |
11097 | ldxa [%i0+%o5]0x81,%l0 ! %l0 = 90793dab000000ff | |
11098 | ||
11099 | ! Check Point 54 for processor 0 | |
11100 | ||
11101 | set p0_check_pt_data_54,%g4 | |
11102 | rd %ccr,%g5 ! %g5 = 44 | |
11103 | ldx [%g4+0x08],%g2 | |
11104 | cmp %l0,%g2 ! %l0 = 90793dab000000ff | |
11105 | bne %xcc,p0_reg_check_fail0 | |
11106 | mov 0xee0,%g1 | |
11107 | ldx [%g4+0x10],%g2 | |
11108 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
11109 | bne %xcc,p0_reg_check_fail1 | |
11110 | mov 0xee1,%g1 | |
11111 | ldx [%g4+0x18],%g2 | |
11112 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
11113 | bne %xcc,p0_reg_check_fail2 | |
11114 | mov 0xee2,%g1 | |
11115 | ldx [%g4+0x20],%g2 | |
11116 | cmp %l3,%g2 ! %l3 = 000000003739e890 | |
11117 | bne %xcc,p0_reg_check_fail3 | |
11118 | mov 0xee3,%g1 | |
11119 | ldx [%g4+0x28],%g2 | |
11120 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
11121 | bne %xcc,p0_reg_check_fail4 | |
11122 | mov 0xee4,%g1 | |
11123 | ldx [%g4+0x30],%g2 | |
11124 | cmp %l5,%g2 ! %l5 = 00000000000000fa | |
11125 | bne %xcc,p0_reg_check_fail5 | |
11126 | mov 0xee5,%g1 | |
11127 | ldx [%g4+0x38],%g2 | |
11128 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
11129 | bne %xcc,p0_reg_check_fail6 | |
11130 | mov 0xee6,%g1 | |
11131 | ldx [%g4+0x40],%g2 | |
11132 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
11133 | bne %xcc,p0_reg_check_fail7 | |
11134 | mov 0xee7,%g1 | |
11135 | ldx [%g4+0x48],%g3 | |
11136 | std %f0,[%g4] | |
11137 | ldx [%g4],%g2 | |
11138 | cmp %g3,%g2 ! %f0 = 90e83937 00000090 | |
11139 | bne %xcc,p0_freg_check_fail | |
11140 | mov 0xf00,%g1 | |
11141 | ldx [%g4+0x50],%g3 | |
11142 | std %f2,[%g4] | |
11143 | ldx [%g4],%g2 | |
11144 | cmp %g3,%g2 ! %f2 = 90000000 000000ff | |
11145 | bne %xcc,p0_freg_check_fail | |
11146 | mov 0xf02,%g1 | |
11147 | ldx [%g4+0x58],%g3 | |
11148 | std %f6,[%g4] | |
11149 | ldx [%g4],%g2 | |
11150 | cmp %g3,%g2 ! %f6 = 00000000 00000000 | |
11151 | bne %xcc,p0_freg_check_fail | |
11152 | mov 0xf06,%g1 | |
11153 | ldx [%g4+0x60],%g3 | |
11154 | std %f8,[%g4] | |
11155 | ldx [%g4],%g2 | |
11156 | cmp %g3,%g2 ! %f8 = ff000000 fcffffff | |
11157 | bne %xcc,p0_freg_check_fail | |
11158 | mov 0xf08,%g1 | |
11159 | ldx [%g4+0x68],%g3 | |
11160 | std %f10,[%g4] | |
11161 | ldx [%g4],%g2 | |
11162 | cmp %g3,%g2 ! %f10 = 23e3b300 00ffffff | |
11163 | bne %xcc,p0_freg_check_fail | |
11164 | mov 0xf10,%g1 | |
11165 | ldx [%g4+0x70],%g3 | |
11166 | std %f12,[%g4] | |
11167 | ldx [%g4],%g2 | |
11168 | cmp %g3,%g2 ! %f12 = 7663a3fa 00ff7990 | |
11169 | bne %xcc,p0_freg_check_fail | |
11170 | mov 0xf12,%g1 | |
11171 | ||
11172 | ! Check Point 54 completed | |
11173 | ||
11174 | ||
11175 | p0_label_271: | |
11176 | ! Mem[0000000030141400] = 90793dab, %l1 = 00000000000000ff | |
11177 | lduba [%i5+%g0]0x89,%l1 ! %l1 = 00000000000000ab | |
11178 | ! Mem[00000000300c1410] = 947e307dff000000, %l6 = 0000000000000000 | |
11179 | ldxa [%i3+%o5]0x89,%l6 ! %l6 = 947e307dff000000 | |
11180 | ! Mem[0000000010101434] = 000000ff, %l3 = 000000003739e890 | |
11181 | ldsh [%i4+0x034],%l3 ! %l3 = 0000000000000000 | |
11182 | ! Mem[0000000010141408] = 23e3b3007663a3fa, %f16 = ab3d7990 0000ff00 | |
11183 | ldda [%i5+%o4]0x88,%f16 ! %f16 = 23e3b300 7663a3fa | |
11184 | ! Mem[0000000010181408] = ff000000, %l6 = 947e307dff000000 | |
11185 | ldsha [%i6+%o4]0x80,%l6 ! %l6 = ffffffffffffff00 | |
11186 | ! Mem[0000000030001408] = 000000007663a3ff, %l6 = ffffffffffffff00 | |
11187 | ldxa [%i0+%o4]0x89,%l6 ! %l6 = 000000007663a3ff | |
11188 | ! Mem[0000000030001400] = ffffac00, %l3 = 0000000000000000 | |
11189 | ldsba [%i0+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
11190 | ! Mem[0000000030041408] = 00000000 000000ff, %l0 = 000000ff, %l1 = 000000ab | |
11191 | ldda [%i1+%o4]0x89,%l0 ! %l0 = 00000000000000ff 0000000000000000 | |
11192 | ! Mem[00000000100c1408] = 90e83937, %l4 = 00000000000000ff | |
11193 | ldsba [%i3+%o4]0x88,%l4 ! %l4 = 0000000000000037 | |
11194 | ! Starting 10 instruction Store Burst | |
11195 | ! Mem[0000000010001428] = ff009cff, %l3 = 0000000000000000 | |
11196 | swap [%i0+0x028],%l3 ! %l3 = 00000000ff009cff | |
11197 | ||
11198 | p0_label_272: | |
11199 | ! %f0 = 90e83937 00000090 90000000 000000ff | |
11200 | ! %f4 = ffffffff ffffffff 00000000 00000000 | |
11201 | ! %f8 = ff000000 fcffffff 23e3b300 00ffffff | |
11202 | ! %f12 = 7663a3fa 00ff7990 5d57d4e0 3d61d89c | |
11203 | stda %f0,[%i3]ASI_BLK_P ! Block Store to 00000000100c1400 | |
11204 | ! Mem[0000000010181400] = 00ff00ff, %l7 = 00000000000000ff | |
11205 | swapa [%i6+%g0]0x88,%l7 ! %l7 = 0000000000ff00ff | |
11206 | ! %l0 = 00000000000000ff, Mem[0000000010081410] = f8b7ffff000000ff | |
11207 | stxa %l0,[%i2+%o5]0x88 ! Mem[0000000010081410] = 00000000000000ff | |
11208 | ! Mem[0000000030081408] = caffffff, %l3 = 00000000ff009cff | |
11209 | swapa [%i2+%o4]0x89,%l3 ! %l3 = 00000000caffffff | |
11210 | ! %f18 = 4e000000 00000000, Mem[0000000030081400] = ff000000 ff0000ff | |
11211 | stda %f18,[%i2+%g0]0x81 ! Mem[0000000030081400] = 4e000000 00000000 | |
11212 | ! %l6 = 7663a3ff, %l7 = 00ff00ff, Mem[0000000010001410] = 00940000 000000ff | |
11213 | stda %l6,[%i0+%o5]0x80 ! Mem[0000000010001410] = 7663a3ff 00ff00ff | |
11214 | ! %l6 = 000000007663a3ff, Mem[0000000021800100] = fff811d1, %asi = 80 | |
11215 | stha %l6,[%o3+0x100]%asi ! Mem[0000000021800100] = a3ff11d1 | |
11216 | ! %l1 = 0000000000000000, Mem[0000000030001400] = ffffac00 | |
11217 | stba %l1,[%i0+%g0]0x89 ! Mem[0000000030001400] = ffffac00 | |
11218 | ! %l4 = 0000000000000037, Mem[0000000020800040] = fffc7379, %asi = 80 | |
11219 | stha %l4,[%o1+0x040]%asi ! Mem[0000000020800040] = 00377379 | |
11220 | ! Starting 10 instruction Load Burst | |
11221 | ! Mem[0000000030081408] = ff9c00ff, %l0 = 00000000000000ff | |
11222 | lduba [%i2+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
11223 | ||
11224 | p0_label_273: | |
11225 | ! Mem[0000000010081410] = ff00000000000000, %l5 = 00000000000000fa | |
11226 | ldxa [%i2+%o5]0x80,%l5 ! %l5 = ff00000000000000 | |
11227 | ! Mem[0000000010001410] = 7663a3ff, %l1 = 0000000000000000 | |
11228 | lduba [%i0+%o5]0x80,%l1 ! %l1 = 0000000000000076 | |
11229 | ! Mem[0000000010101438] = 23e3b300, %l1 = 0000000000000076 | |
11230 | ldsw [%i4+0x038],%l1 ! %l1 = 0000000023e3b300 | |
11231 | ! Mem[0000000010081408] = ffffffff ffffffff, %l4 = 00000037, %l5 = 00000000 | |
11232 | ldda [%i2+%o4]0x88,%l4 ! %l4 = 00000000ffffffff 00000000ffffffff | |
11233 | ! Mem[0000000010141410] = 373900ff, %l5 = 00000000ffffffff | |
11234 | ldswa [%i5+%o5]0x88,%l5 ! %l5 = 00000000373900ff | |
11235 | ! Mem[0000000010101408] = 37390000 00000000, %l0 = 000000ff, %l1 = 23e3b300 | |
11236 | ldd [%i4+%o4],%l0 ! %l0 = 0000000037390000 0000000000000000 | |
11237 | ! Mem[0000000010101410] = fcf85e66, %l6 = 000000007663a3ff | |
11238 | ldsha [%i4+%o5]0x88,%l6 ! %l6 = 0000000000005e66 | |
11239 | membar #Sync ! Added by membar checker (44) | |
11240 | ! Mem[0000000030101400] = ff000000 00000018 90e83937 00000000 | |
11241 | ! Mem[0000000030101410] = ffff0000 fc734517 a26115a2 6e092edc | |
11242 | ! Mem[0000000030101420] = 9c486421 76c9d21f 174573fc e9706042 | |
11243 | ! Mem[0000000030101430] = 904919ff 9def9057 5e9638c2 0b931a2a | |
11244 | ldda [%i4]ASI_BLK_S,%f0 ! Block Load from 0000000030101400 | |
11245 | ! Mem[0000000010101408] = 37390000, %l7 = 0000000000ff00ff | |
11246 | lduha [%i4+%o4]0x80,%l7 ! %l7 = 0000000000003739 | |
11247 | ! Starting 10 instruction Store Burst | |
11248 | ! Mem[0000000010001410] = ffa36376, %l2 = 0000000000000000 | |
11249 | ldstuba [%i0+%o5]0x88,%l2 ! %l2 = 00000076000000ff | |
11250 | ||
11251 | p0_label_274: | |
11252 | ! %l6 = 0000000000005e66, Mem[0000000010101408] = 37390000 | |
11253 | stha %l6,[%i4+%o4]0x80 ! Mem[0000000010101408] = 5e660000 | |
11254 | ! %l7 = 0000000000003739, Mem[0000000020800040] = 00377379, %asi = 80 | |
11255 | stha %l7,[%o1+0x040]%asi ! Mem[0000000020800040] = 37397379 | |
11256 | ! %l2 = 0000000000000076, Mem[000000001000140f] = faa36376 | |
11257 | stb %l2,[%i0+0x00f] ! Mem[000000001000140c] = faa36376 | |
11258 | ! Mem[0000000030001410] = ab3d7990, %l2 = 0000000000000076 | |
11259 | ldstuba [%i0+%o5]0x89,%l2 ! %l2 = 00000090000000ff | |
11260 | ! Mem[0000000010041408] = 022d96f8, %l7 = 00003739, %l6 = 00005e66 | |
11261 | add %i1,0x08,%g1 | |
11262 | casa [%g1]0x80,%l7,%l6 ! %l6 = 00000000022d96f8 | |
11263 | ! %f24 = 1f41ff76 2164159c, Mem[0000000010001410] = ffa363ff ff00ff00 | |
11264 | stda %f24,[%i0+%o5]0x88 ! Mem[0000000010001410] = 1f41ff76 2164159c | |
11265 | ! Mem[0000000010101400] = 00000000, %l2 = 0000000000000090 | |
11266 | swapa [%i4+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
11267 | ! %l4 = 00000000ffffffff, Mem[00000000300c1410] = 000000ff | |
11268 | stha %l4,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ffff00ff | |
11269 | ! Mem[0000000030041408] = ff000000, %l4 = 00000000ffffffff | |
11270 | ldstuba [%i1+%o4]0x81,%l4 ! %l4 = 000000ff000000ff | |
11271 | ! Starting 10 instruction Load Burst | |
11272 | ! Mem[0000000030101410] = 0000ffff, %l1 = 0000000000000000 | |
11273 | lduba [%i4+%o5]0x89,%l1 ! %l1 = 00000000000000ff | |
11274 | ||
11275 | p0_label_275: | |
11276 | ! Mem[0000000010181400] = ff00000000b3e323, %f24 = 1f41ff76 2164159c | |
11277 | ldda [%i6+%g0]0x80,%f24 ! %f24 = ff000000 00b3e323 | |
11278 | ! Mem[0000000030041400] = faa36376, %l4 = 00000000000000ff | |
11279 | ldswa [%i1+%g0]0x89,%l4 ! %l4 = fffffffffaa36376 | |
11280 | ! Mem[0000000010101410] = 665ef8fc, %f18 = 4e000000 | |
11281 | lda [%i4+%o5]0x80,%f18 ! %f18 = 665ef8fc | |
11282 | ! Mem[00000000100c1410] = ffffffff, %l0 = 0000000037390000 | |
11283 | lduwa [%i3+%o5]0x80,%l0 ! %l0 = 00000000ffffffff | |
11284 | ! Mem[0000000030101408] = 3739e890, %l5 = 00000000373900ff | |
11285 | lduba [%i4+%o4]0x89,%l5 ! %l5 = 0000000000000090 | |
11286 | ! Mem[0000000010041410] = 00000000, %l7 = 0000000000003739 | |
11287 | lduba [%i1+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
11288 | ! Mem[0000000010101410] = 665ef8fc, %l4 = fffffffffaa36376 | |
11289 | lduwa [%i4+%o5]0x80,%l4 ! %l4 = 00000000665ef8fc | |
11290 | ! Mem[0000000030001400] = 00ffffff ffffac00, %l0 = ffffffff, %l1 = 000000ff | |
11291 | ldda [%i0+%g0]0x89,%l0 ! %l0 = 00000000ffffac00 0000000000ffffff | |
11292 | ! Mem[0000000010141438] = 0000000000000000, %l2 = 0000000000000000 | |
11293 | ldx [%i5+0x038],%l2 ! %l2 = 0000000000000000 | |
11294 | ! Starting 10 instruction Store Burst | |
11295 | ! %l3 = 00000000caffffff, Mem[00000000300c1408] = 7a2e9aff | |
11296 | stwa %l3,[%i3+%o4]0x81 ! Mem[00000000300c1408] = caffffff | |
11297 | ||
11298 | ! Check Point 55 for processor 0 | |
11299 | ||
11300 | set p0_check_pt_data_55,%g4 | |
11301 | rd %ccr,%g5 ! %g5 = 44 | |
11302 | ldx [%g4+0x08],%g2 | |
11303 | cmp %l0,%g2 ! %l0 = 00000000ffffac00 | |
11304 | bne %xcc,p0_reg_check_fail0 | |
11305 | mov 0xee0,%g1 | |
11306 | ldx [%g4+0x10],%g2 | |
11307 | cmp %l1,%g2 ! %l1 = 0000000000ffffff | |
11308 | bne %xcc,p0_reg_check_fail1 | |
11309 | mov 0xee1,%g1 | |
11310 | ldx [%g4+0x18],%g2 | |
11311 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
11312 | bne %xcc,p0_reg_check_fail2 | |
11313 | mov 0xee2,%g1 | |
11314 | ldx [%g4+0x20],%g2 | |
11315 | cmp %l3,%g2 ! %l3 = 00000000caffffff | |
11316 | bne %xcc,p0_reg_check_fail3 | |
11317 | mov 0xee3,%g1 | |
11318 | ldx [%g4+0x28],%g2 | |
11319 | cmp %l4,%g2 ! %l4 = 00000000665ef8fc | |
11320 | bne %xcc,p0_reg_check_fail4 | |
11321 | mov 0xee4,%g1 | |
11322 | ldx [%g4+0x30],%g2 | |
11323 | cmp %l5,%g2 ! %l5 = 0000000000000090 | |
11324 | bne %xcc,p0_reg_check_fail5 | |
11325 | mov 0xee5,%g1 | |
11326 | ldx [%g4+0x38],%g2 | |
11327 | cmp %l6,%g2 ! %l6 = 00000000022d96f8 | |
11328 | bne %xcc,p0_reg_check_fail6 | |
11329 | mov 0xee6,%g1 | |
11330 | ldx [%g4+0x40],%g2 | |
11331 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
11332 | bne %xcc,p0_reg_check_fail7 | |
11333 | mov 0xee7,%g1 | |
11334 | ldx [%g4+0x48],%g3 | |
11335 | std %f0,[%g4] | |
11336 | ldx [%g4],%g2 | |
11337 | cmp %g3,%g2 ! %f0 = ff000000 00000018 | |
11338 | bne %xcc,p0_freg_check_fail | |
11339 | mov 0xf00,%g1 | |
11340 | ldx [%g4+0x50],%g3 | |
11341 | std %f2,[%g4] | |
11342 | ldx [%g4],%g2 | |
11343 | cmp %g3,%g2 ! %f2 = 90e83937 00000000 | |
11344 | bne %xcc,p0_freg_check_fail | |
11345 | mov 0xf02,%g1 | |
11346 | ldx [%g4+0x58],%g3 | |
11347 | std %f4,[%g4] | |
11348 | ldx [%g4],%g2 | |
11349 | cmp %g3,%g2 ! %f4 = ffff0000 fc734517 | |
11350 | bne %xcc,p0_freg_check_fail | |
11351 | mov 0xf04,%g1 | |
11352 | ldx [%g4+0x60],%g3 | |
11353 | std %f6,[%g4] | |
11354 | ldx [%g4],%g2 | |
11355 | cmp %g3,%g2 ! %f6 = a26115a2 6e092edc | |
11356 | bne %xcc,p0_freg_check_fail | |
11357 | mov 0xf06,%g1 | |
11358 | ldx [%g4+0x68],%g3 | |
11359 | std %f8,[%g4] | |
11360 | ldx [%g4],%g2 | |
11361 | cmp %g3,%g2 ! %f8 = 9c486421 76c9d21f | |
11362 | bne %xcc,p0_freg_check_fail | |
11363 | mov 0xf08,%g1 | |
11364 | ldx [%g4+0x70],%g3 | |
11365 | std %f10,[%g4] | |
11366 | ldx [%g4],%g2 | |
11367 | cmp %g3,%g2 ! %f10 = 174573fc e9706042 | |
11368 | bne %xcc,p0_freg_check_fail | |
11369 | mov 0xf10,%g1 | |
11370 | ldx [%g4+0x78],%g3 | |
11371 | std %f12,[%g4] | |
11372 | ldx [%g4],%g2 | |
11373 | cmp %g3,%g2 ! %f12 = 904919ff 9def9057 | |
11374 | bne %xcc,p0_freg_check_fail | |
11375 | mov 0xf12,%g1 | |
11376 | ldx [%g4+0x80],%g3 | |
11377 | std %f14,[%g4] | |
11378 | ldx [%g4],%g2 | |
11379 | cmp %g3,%g2 ! %f14 = 5e9638c2 0b931a2a | |
11380 | bne %xcc,p0_freg_check_fail | |
11381 | mov 0xf14,%g1 | |
11382 | ldx [%g4+0x88],%g3 | |
11383 | std %f16,[%g4] | |
11384 | ldx [%g4],%g2 | |
11385 | cmp %g3,%g2 ! %f16 = 23e3b300 7663a3fa | |
11386 | bne %xcc,p0_freg_check_fail | |
11387 | mov 0xf16,%g1 | |
11388 | ldx [%g4+0x90],%g3 | |
11389 | std %f18,[%g4] | |
11390 | ldx [%g4],%g2 | |
11391 | cmp %g3,%g2 ! %f18 = 665ef8fc 00000000 | |
11392 | bne %xcc,p0_freg_check_fail | |
11393 | mov 0xf18,%g1 | |
11394 | ldx [%g4+0x98],%g3 | |
11395 | std %f24,[%g4] | |
11396 | ldx [%g4],%g2 | |
11397 | cmp %g3,%g2 ! %f24 = ff000000 00b3e323 | |
11398 | bne %xcc,p0_freg_check_fail | |
11399 | mov 0xf24,%g1 | |
11400 | ||
11401 | ! Check Point 55 completed | |
11402 | ||
11403 | ||
11404 | p0_label_276: | |
11405 | ! %l7 = 0000000000000000, Mem[0000000030181400] = 0000004e | |
11406 | stba %l7,[%i6+%g0]0x89 ! Mem[0000000030181400] = 00000000 | |
11407 | ! %l4 = 00000000665ef8fc, Mem[0000000010001410] = 9c15642176ff411f | |
11408 | stxa %l4,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000665ef8fc | |
11409 | ! %l1 = 0000000000ffffff, Mem[0000000030001400] = 00ffffffffffac00 | |
11410 | stxa %l1,[%i0+%g0]0x89 ! Mem[0000000030001400] = 0000000000ffffff | |
11411 | ! %l5 = 0000000000000090, Mem[0000000030141408] = 4e000000 | |
11412 | stwa %l5,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000090 | |
11413 | ! Mem[0000000010181408] = 000000ff, %l5 = 0000000000000090 | |
11414 | swapa [%i6+%o4]0x88,%l5 ! %l5 = 00000000000000ff | |
11415 | ! %l5 = 00000000000000ff, Mem[00000000100c1408] = 90000000 | |
11416 | stba %l5,[%i3+%o4]0x80 ! Mem[00000000100c1408] = ff000000 | |
11417 | ! Mem[0000000030081400] = 0000004e, %l4 = 00000000665ef8fc | |
11418 | ldstuba [%i2+%g0]0x89,%l4 ! %l4 = 0000004e000000ff | |
11419 | ! %l2 = 0000000000000000, Mem[0000000010041408] = 022d96f8 | |
11420 | stwa %l2,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00000000 | |
11421 | membar #Sync ! Added by membar checker (45) | |
11422 | ! %l6 = 00000000022d96f8, Mem[0000000030101410] = 0000ffff | |
11423 | stba %l6,[%i4+%o5]0x89 ! Mem[0000000030101410] = 0000fff8 | |
11424 | ! Starting 10 instruction Load Burst | |
11425 | ! Mem[0000000030181400] = 00000000 00000000 ff00ffff 00000000 | |
11426 | ! Mem[0000000030181410] = 00000000 000000ff fffffff8 0000007d | |
11427 | ! Mem[0000000030181420] = 9c156421 c7ec13bb 10ac7b59 3eda2778 | |
11428 | ! Mem[0000000030181430] = 4e000000 00000012 fcc4c676 12000000 | |
11429 | ldda [%i6]ASI_BLK_S,%f0 ! Block Load from 0000000030181400 | |
11430 | ||
11431 | p0_label_277: | |
11432 | ! Mem[0000000010041408] = 00000000, %l4 = 000000000000004e | |
11433 | ldsha [%i1+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
11434 | ! %l0 = 00000000ffffac00, Mem[0000000010081408] = ffffffff | |
11435 | stba %l0,[%i2+%o4]0x88 ! Mem[0000000010081408] = ffffff00 | |
11436 | ! Mem[0000000030001408] = 00000000 7663a3ff, %l6 = 022d96f8, %l7 = 00000000 | |
11437 | ldda [%i0+%o4]0x89,%l6 ! %l6 = 000000007663a3ff 0000000000000000 | |
11438 | ! Mem[0000000010001408] = 00ff7990, %f28 = ff000000 | |
11439 | lda [%i0+%o4]0x88,%f28 ! %f28 = 00ff7990 | |
11440 | ! Mem[0000000010041430] = ffffffff, %l3 = 00000000caffffff | |
11441 | ldswa [%i1+0x030]%asi,%l3 ! %l3 = ffffffffffffffff | |
11442 | ! Mem[0000000030101400] = 000000ff, %l3 = ffffffffffffffff | |
11443 | ldswa [%i4+%g0]0x89,%l3 ! %l3 = 00000000000000ff | |
11444 | ! Mem[0000000020800000] = 00008470, %l5 = 00000000000000ff | |
11445 | ldsba [%o1+0x000]%asi,%l5 ! %l5 = 0000000000000000 | |
11446 | membar #Sync ! Added by membar checker (46) | |
11447 | ! Mem[0000000030101400] = ff000000 00000018 90e83937 00000000 | |
11448 | ! Mem[0000000030101410] = f8ff0000 fc734517 a26115a2 6e092edc | |
11449 | ! Mem[0000000030101420] = 9c486421 76c9d21f 174573fc e9706042 | |
11450 | ! Mem[0000000030101430] = 904919ff 9def9057 5e9638c2 0b931a2a | |
11451 | ldda [%i4]ASI_BLK_AIUS,%f16 ! Block Load from 0000000030101400 | |
11452 | ! Mem[0000000010101410] = 665ef8fc, %l0 = 00000000ffffac00 | |
11453 | ldsha [%i4+%o5]0x80,%l0 ! %l0 = 000000000000665e | |
11454 | ! Starting 10 instruction Store Burst | |
11455 | ! %l3 = 00000000000000ff, Mem[0000000010081410] = 000000ff | |
11456 | stwa %l3,[%i2+%o5]0x88 ! Mem[0000000010081410] = 000000ff | |
11457 | ||
11458 | p0_label_278: | |
11459 | ! %l3 = 00000000000000ff, Mem[0000000030141410] = 665ef8fc | |
11460 | stba %l3,[%i5+%o5]0x81 ! Mem[0000000030141410] = ff5ef8fc | |
11461 | ! Mem[00000000100c1408] = ff000000, %l3 = 00000000000000ff | |
11462 | swapa [%i3+%o4]0x80,%l3 ! %l3 = 00000000ff000000 | |
11463 | membar #Sync ! Added by membar checker (47) | |
11464 | ! %l3 = 00000000ff000000, Mem[0000000030101410] = 0000fff8 | |
11465 | stba %l3,[%i4+%o5]0x89 ! Mem[0000000030101410] = 0000ff00 | |
11466 | ! Mem[0000000020800040] = 37397379, %l4 = 0000000000000000 | |
11467 | ldstub [%o1+0x040],%l4 ! %l4 = 00000037000000ff | |
11468 | ! %l7 = 0000000000000000, Mem[0000000030101408] = 000000003739e890 | |
11469 | stxa %l7,[%i4+%o4]0x89 ! Mem[0000000030101408] = 0000000000000000 | |
11470 | ! %l6 = 000000007663a3ff, Mem[0000000010001408] = 7663a3fa00ff7990 | |
11471 | stxa %l6,[%i0+%o4]0x88 ! Mem[0000000010001408] = 000000007663a3ff | |
11472 | ! Mem[0000000010181418] = 665ef8fc, %l4 = 0000000000000037, %asi = 80 | |
11473 | swapa [%i6+0x018]%asi,%l4 ! %l4 = 00000000665ef8fc | |
11474 | ! %l6 = 000000007663a3ff, Mem[0000000030141410] = ff5ef8fc | |
11475 | stha %l6,[%i5+%o5]0x81 ! Mem[0000000030141410] = a3fff8fc | |
11476 | ! %l1 = 0000000000ffffff, Mem[00000000100c1410] = ffffffffffffffff | |
11477 | stxa %l1,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 0000000000ffffff | |
11478 | ! Starting 10 instruction Load Burst | |
11479 | ! Mem[00000000211c0000] = 7cff1a4c, %l1 = 0000000000ffffff | |
11480 | lduha [%o2+0x000]%asi,%l1 ! %l1 = 0000000000007cff | |
11481 | ||
11482 | p0_label_279: | |
11483 | ! Mem[0000000010101400] = 90000000, %l5 = 0000000000000000 | |
11484 | ldsh [%i4+%g0],%l5 ! %l5 = ffffffffffff9000 | |
11485 | ! Mem[0000000030001408] = 7663a3ff, %l6 = 000000007663a3ff | |
11486 | ldsba [%i0+%o4]0x89,%l6 ! %l6 = ffffffffffffffff | |
11487 | ! Mem[0000000030081400] = ff000000, %l4 = 00000000665ef8fc | |
11488 | ldsba [%i2+%g0]0x81,%l4 ! %l4 = ffffffffffffffff | |
11489 | ! Mem[0000000030101400] = 000000ff, %l2 = 0000000000000000 | |
11490 | lduwa [%i4+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
11491 | ! Mem[00000000300c1400] = ff000000, %f22 = a26115a2 | |
11492 | lda [%i3+%g0]0x81,%f22 ! %f22 = ff000000 | |
11493 | ! Mem[0000000030181400] = 00000000, %l4 = ffffffffffffffff | |
11494 | ldswa [%i6+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
11495 | ! Mem[00000000211c0000] = 7cff1a4c, %l0 = 000000000000665e | |
11496 | ldsba [%o2+0x001]%asi,%l0 ! %l0 = ffffffffffffffff | |
11497 | ! Mem[0000000030101400] = 000000ff, %l7 = 0000000000000000 | |
11498 | lduwa [%i4+%g0]0x89,%l7 ! %l7 = 00000000000000ff | |
11499 | ! Mem[0000000030001410] = ff793dab, %f2 = ff00ffff | |
11500 | lda [%i0+%o5]0x81,%f2 ! %f2 = ff793dab | |
11501 | ! Starting 10 instruction Store Burst | |
11502 | ! Mem[0000000010101410] = 665ef8fc, %l6 = ffffffffffffffff | |
11503 | swapa [%i4+%o5]0x80,%l6 ! %l6 = 00000000665ef8fc | |
11504 | ||
11505 | p0_label_280: | |
11506 | ! %f12 = 4e000000 00000012, Mem[0000000030041400] = 7663a3fa 00ff7990 | |
11507 | stda %f12,[%i1+%g0]0x81 ! Mem[0000000030041400] = 4e000000 00000012 | |
11508 | ! Mem[0000000030081410] = 00000090, %l6 = 00000000665ef8fc | |
11509 | swapa [%i2+%o5]0x89,%l6 ! %l6 = 0000000000000090 | |
11510 | ! Mem[0000000030041410] = ff000000, %l7 = 00000000000000ff | |
11511 | swapa [%i1+%o5]0x81,%l7 ! %l7 = 00000000ff000000 | |
11512 | ! Mem[0000000030041408] = ff000000, %l3 = 00000000ff000000 | |
11513 | ldstuba [%i1+%o4]0x81,%l3 ! %l3 = 000000ff000000ff | |
11514 | ! Mem[0000000030081410] = 665ef8fc, %l3 = 00000000000000ff | |
11515 | ldstuba [%i2+%o5]0x89,%l3 ! %l3 = 000000fc000000ff | |
11516 | ! %l6 = 0000000000000090, Mem[0000000010001408] = ffa36376 | |
11517 | stwa %l6,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000090 | |
11518 | ! Mem[0000000010181410] = 637cc6fe, %l6 = 0000000000000090 | |
11519 | swapa [%i6+%o5]0x88,%l6 ! %l6 = 00000000637cc6fe | |
11520 | ! %l5 = ffffffffffff9000, Mem[0000000030101400] = 18000000000000ff | |
11521 | stxa %l5,[%i4+%g0]0x89 ! Mem[0000000030101400] = ffffffffffff9000 | |
11522 | ! %f9 = c7ec13bb, Mem[0000000030081400] = ff000000 | |
11523 | sta %f9 ,[%i2+%g0]0x81 ! Mem[0000000030081400] = c7ec13bb | |
11524 | ! Starting 10 instruction Load Burst | |
11525 | ! Mem[00000000100c141c] = 00000000, %f4 = 00000000 | |
11526 | ld [%i3+0x01c],%f4 ! %f4 = 00000000 | |
11527 | ||
11528 | ! Check Point 56 for processor 0 | |
11529 | ||
11530 | set p0_check_pt_data_56,%g4 | |
11531 | rd %ccr,%g5 ! %g5 = 44 | |
11532 | ldx [%g4+0x08],%g2 | |
11533 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
11534 | bne %xcc,p0_reg_check_fail0 | |
11535 | mov 0xee0,%g1 | |
11536 | ldx [%g4+0x10],%g2 | |
11537 | cmp %l1,%g2 ! %l1 = 0000000000007cff | |
11538 | bne %xcc,p0_reg_check_fail1 | |
11539 | mov 0xee1,%g1 | |
11540 | ldx [%g4+0x18],%g2 | |
11541 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
11542 | bne %xcc,p0_reg_check_fail2 | |
11543 | mov 0xee2,%g1 | |
11544 | ldx [%g4+0x20],%g2 | |
11545 | cmp %l3,%g2 ! %l3 = 00000000000000fc | |
11546 | bne %xcc,p0_reg_check_fail3 | |
11547 | mov 0xee3,%g1 | |
11548 | ldx [%g4+0x28],%g2 | |
11549 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
11550 | bne %xcc,p0_reg_check_fail4 | |
11551 | mov 0xee4,%g1 | |
11552 | ldx [%g4+0x30],%g2 | |
11553 | cmp %l5,%g2 ! %l5 = ffffffffffff9000 | |
11554 | bne %xcc,p0_reg_check_fail5 | |
11555 | mov 0xee5,%g1 | |
11556 | ldx [%g4+0x38],%g2 | |
11557 | cmp %l6,%g2 ! %l6 = 00000000637cc6fe | |
11558 | bne %xcc,p0_reg_check_fail6 | |
11559 | mov 0xee6,%g1 | |
11560 | ldx [%g4+0x40],%g2 | |
11561 | cmp %l7,%g2 ! %l7 = 00000000ff000000 | |
11562 | bne %xcc,p0_reg_check_fail7 | |
11563 | mov 0xee7,%g1 | |
11564 | ldx [%g4+0x48],%g3 | |
11565 | std %f0,[%g4] | |
11566 | ldx [%g4],%g2 | |
11567 | cmp %g3,%g2 ! %f0 = 00000000 00000000 | |
11568 | bne %xcc,p0_freg_check_fail | |
11569 | mov 0xf00,%g1 | |
11570 | ldx [%g4+0x50],%g3 | |
11571 | std %f2,[%g4] | |
11572 | ldx [%g4],%g2 | |
11573 | cmp %g3,%g2 ! %f2 = ff793dab 00000000 | |
11574 | bne %xcc,p0_freg_check_fail | |
11575 | mov 0xf02,%g1 | |
11576 | ldx [%g4+0x58],%g3 | |
11577 | std %f4,[%g4] | |
11578 | ldx [%g4],%g2 | |
11579 | cmp %g3,%g2 ! %f4 = 00000000 000000ff | |
11580 | bne %xcc,p0_freg_check_fail | |
11581 | mov 0xf04,%g1 | |
11582 | ldx [%g4+0x60],%g3 | |
11583 | std %f6,[%g4] | |
11584 | ldx [%g4],%g2 | |
11585 | cmp %g3,%g2 ! %f6 = fffffff8 0000007d | |
11586 | bne %xcc,p0_freg_check_fail | |
11587 | mov 0xf06,%g1 | |
11588 | ldx [%g4+0x68],%g3 | |
11589 | std %f8,[%g4] | |
11590 | ldx [%g4],%g2 | |
11591 | cmp %g3,%g2 ! %f8 = 9c156421 c7ec13bb | |
11592 | bne %xcc,p0_freg_check_fail | |
11593 | mov 0xf08,%g1 | |
11594 | ldx [%g4+0x70],%g3 | |
11595 | std %f10,[%g4] | |
11596 | ldx [%g4],%g2 | |
11597 | cmp %g3,%g2 ! %f10 = 10ac7b59 3eda2778 | |
11598 | bne %xcc,p0_freg_check_fail | |
11599 | mov 0xf10,%g1 | |
11600 | ldx [%g4+0x78],%g3 | |
11601 | std %f12,[%g4] | |
11602 | ldx [%g4],%g2 | |
11603 | cmp %g3,%g2 ! %f12 = 4e000000 00000012 | |
11604 | bne %xcc,p0_freg_check_fail | |
11605 | mov 0xf12,%g1 | |
11606 | ldx [%g4+0x80],%g3 | |
11607 | std %f14,[%g4] | |
11608 | ldx [%g4],%g2 | |
11609 | cmp %g3,%g2 ! %f14 = fcc4c676 12000000 | |
11610 | bne %xcc,p0_freg_check_fail | |
11611 | mov 0xf14,%g1 | |
11612 | ldx [%g4+0x88],%g3 | |
11613 | std %f16,[%g4] | |
11614 | ldx [%g4],%g2 | |
11615 | cmp %g3,%g2 ! %f16 = ff000000 00000018 | |
11616 | bne %xcc,p0_freg_check_fail | |
11617 | mov 0xf16,%g1 | |
11618 | ldx [%g4+0x90],%g3 | |
11619 | std %f18,[%g4] | |
11620 | ldx [%g4],%g2 | |
11621 | cmp %g3,%g2 ! %f18 = 90e83937 00000000 | |
11622 | bne %xcc,p0_freg_check_fail | |
11623 | mov 0xf18,%g1 | |
11624 | ldx [%g4+0x98],%g3 | |
11625 | std %f20,[%g4] | |
11626 | ldx [%g4],%g2 | |
11627 | cmp %g3,%g2 ! %f20 = f8ff0000 fc734517 | |
11628 | bne %xcc,p0_freg_check_fail | |
11629 | mov 0xf20,%g1 | |
11630 | ldx [%g4+0xa0],%g3 | |
11631 | std %f22,[%g4] | |
11632 | ldx [%g4],%g2 | |
11633 | cmp %g3,%g2 ! %f22 = ff000000 6e092edc | |
11634 | bne %xcc,p0_freg_check_fail | |
11635 | mov 0xf22,%g1 | |
11636 | ldx [%g4+0xa8],%g3 | |
11637 | std %f24,[%g4] | |
11638 | ldx [%g4],%g2 | |
11639 | cmp %g3,%g2 ! %f24 = 9c486421 76c9d21f | |
11640 | bne %xcc,p0_freg_check_fail | |
11641 | mov 0xf24,%g1 | |
11642 | ldx [%g4+0xb0],%g3 | |
11643 | std %f26,[%g4] | |
11644 | ldx [%g4],%g2 | |
11645 | cmp %g3,%g2 ! %f26 = 174573fc e9706042 | |
11646 | bne %xcc,p0_freg_check_fail | |
11647 | mov 0xf26,%g1 | |
11648 | ldx [%g4+0xb8],%g3 | |
11649 | std %f28,[%g4] | |
11650 | ldx [%g4],%g2 | |
11651 | cmp %g3,%g2 ! %f28 = 904919ff 9def9057 | |
11652 | bne %xcc,p0_freg_check_fail | |
11653 | mov 0xf28,%g1 | |
11654 | ldx [%g4+0xc0],%g3 | |
11655 | std %f30,[%g4] | |
11656 | ldx [%g4],%g2 | |
11657 | cmp %g3,%g2 ! %f30 = 5e9638c2 0b931a2a | |
11658 | bne %xcc,p0_freg_check_fail | |
11659 | mov 0xf30,%g1 | |
11660 | ||
11661 | ! Check Point 56 completed | |
11662 | ||
11663 | ||
11664 | p0_label_281: | |
11665 | ! Mem[0000000010181418] = 00000037 00000000, %l6 = 637cc6fe, %l7 = ff000000 | |
11666 | ldd [%i6+0x018],%l6 ! %l6 = 0000000000000037 0000000000000000 | |
11667 | ! Mem[0000000030101410] = 00ff0000, %f15 = 12000000 | |
11668 | lda [%i4+%o5]0x81,%f15 ! %f15 = 00ff0000 | |
11669 | ! Mem[00000000201c0000] = 37ab9457, %l2 = 00000000000000ff | |
11670 | ldub [%o0+0x001],%l2 ! %l2 = 00000000000000ab | |
11671 | ! Mem[00000000300c1400] = ff000000, %l0 = ffffffffffffffff | |
11672 | lduha [%i3+%g0]0x81,%l0 ! %l0 = 000000000000ff00 | |
11673 | ! Mem[0000000010101400] = 00ff0000 00000090, %l2 = 000000ab, %l3 = 000000fc | |
11674 | ldda [%i4+%g0]0x88,%l2 ! %l2 = 0000000000000090 0000000000ff0000 | |
11675 | ! Mem[0000000030041408] = 00000000000000ff, %f4 = 00000000 000000ff | |
11676 | ldda [%i1+%o4]0x89,%f4 ! %f4 = 00000000 000000ff | |
11677 | ! Mem[0000000010101410] = ffffffff, %l7 = 0000000000000000 | |
11678 | lduwa [%i4+%o5]0x80,%l7 ! %l7 = 00000000ffffffff | |
11679 | ! Mem[0000000030001408] = ffa36376, %l5 = ffffffffffff9000 | |
11680 | lduha [%i0+%o4]0x81,%l5 ! %l5 = 000000000000ffa3 | |
11681 | ! %l7 = 00000000ffffffff, %l4 = 0000000000000000, %l6 = 0000000000000037 | |
11682 | xnor %l7,%l4,%l6 ! %l6 = ffffffff00000000 | |
11683 | ! Starting 10 instruction Store Burst | |
11684 | ! Mem[000000001004143c] = f8962d02, %l1 = 00007cff, %l0 = 0000ff00 | |
11685 | add %i1,0x3c,%g1 | |
11686 | casa [%g1]0x80,%l1,%l0 ! %l0 = 00000000f8962d02 | |
11687 | ||
11688 | p0_label_282: | |
11689 | ! %f6 = fffffff8 0000007d, Mem[0000000010041438] = b179bad6 f8962d02 | |
11690 | std %f6 ,[%i1+0x038] ! Mem[0000000010041438] = fffffff8 0000007d | |
11691 | ! %f11 = 3eda2778, Mem[00000000300c1408] = ffffffca | |
11692 | sta %f11,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 3eda2778 | |
11693 | ! %l0 = 00000000f8962d02, Mem[0000000010081410] = 00000000000000ff | |
11694 | stxa %l0,[%i2+%o5]0x88 ! Mem[0000000010081410] = 00000000f8962d02 | |
11695 | ! Mem[00000000100c1400] = 3739e890, %l7 = 00000000ffffffff | |
11696 | swapa [%i3+%g0]0x88,%l7 ! %l7 = 000000003739e890 | |
11697 | ! %l1 = 0000000000007cff, Mem[0000000010001408] = 00000090 | |
11698 | stha %l1,[%i0+%o4]0x80 ! Mem[0000000010001408] = 7cff0090 | |
11699 | ! %l2 = 00000090, %l3 = 00ff0000, Mem[0000000010081428] = 00002eff 000000ff | |
11700 | std %l2,[%i2+0x028] ! Mem[0000000010081428] = 00000090 00ff0000 | |
11701 | ! Mem[00000000100c1408] = 000000ff, %l7 = 000000003739e890 | |
11702 | ldstuba [%i3+%o4]0x80,%l7 ! %l7 = 00000000000000ff | |
11703 | ! %l1 = 0000000000007cff, Mem[00000000100c1410] = 00000000 | |
11704 | stha %l1,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 7cff0000 | |
11705 | ! %f20 = f8ff0000, Mem[0000000010141400] = 0000ff00 | |
11706 | sta %f20,[%i5+%g0]0x80 ! Mem[0000000010141400] = f8ff0000 | |
11707 | ! Starting 10 instruction Load Burst | |
11708 | ! Mem[0000000021800080] = ffffa433, %l1 = 0000000000007cff | |
11709 | ldsb [%o3+0x080],%l1 ! %l1 = ffffffffffffffff | |
11710 | ||
11711 | p0_label_283: | |
11712 | ! Mem[0000000010001400] = 00ff000000000000, %f30 = 5e9638c2 0b931a2a | |
11713 | ldda [%i0+%g0]0x80,%f30 ! %f30 = 00ff0000 00000000 | |
11714 | ! Mem[00000000100c141c] = 00000000, %f7 = 0000007d | |
11715 | lda [%i3+0x01c]%asi,%f7 ! %f7 = 00000000 | |
11716 | ! Mem[0000000030001400] = 00ffffff, %l5 = 000000000000ffa3 | |
11717 | ldsba [%i0+%g0]0x89,%l5 ! %l5 = ffffffffffffffff | |
11718 | ! Mem[0000000010081410] = 022d96f800000000, %f24 = 9c486421 76c9d21f | |
11719 | ldd [%i2+%o5],%f24 ! %f24 = 022d96f8 00000000 | |
11720 | ! Mem[0000000030141408] = 00000000 90000000, %l6 = 00000000, %l7 = 00000000 | |
11721 | ldda [%i5+%o4]0x89,%l6 ! %l6 = 0000000090000000 0000000000000000 | |
11722 | ! Mem[0000000010001410] = 00000000, %l6 = 0000000090000000 | |
11723 | lduwa [%i0+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
11724 | ! Mem[0000000010081420] = fcf85e66, %l4 = 0000000000000000 | |
11725 | lduw [%i2+0x020],%l4 ! %l4 = 00000000fcf85e66 | |
11726 | ! Mem[0000000030181400] = 00000000 00000000, %l4 = fcf85e66, %l5 = ffffffff | |
11727 | ldda [%i6+%g0]0x81,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
11728 | ! Mem[0000000010041424] = 000000ff, %l0 = 00000000f8962d02 | |
11729 | lduw [%i1+0x024],%l0 ! %l0 = 00000000000000ff | |
11730 | ! Starting 10 instruction Store Burst | |
11731 | ! %f10 = 10ac7b59 3eda2778, Mem[0000000010101400] = 00000090 00ff0000 | |
11732 | stda %f10,[%i4+%g0]0x88 ! Mem[0000000010101400] = 10ac7b59 3eda2778 | |
11733 | ||
11734 | p0_label_284: | |
11735 | ! Mem[0000000030001408] = 7663a3ff, %l2 = 0000000000000090 | |
11736 | swapa [%i0+%o4]0x89,%l2 ! %l2 = 000000007663a3ff | |
11737 | ! %f2 = ff793dab 00000000, Mem[0000000010101438] = 23e3b300 00ffffff | |
11738 | stda %f2 ,[%i4+0x038]%asi ! Mem[0000000010101438] = ff793dab 00000000 | |
11739 | ! %f25 = 00000000, Mem[00000000300c1408] = 3eda2778 | |
11740 | sta %f25,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 00000000 | |
11741 | ! %l5 = 0000000000000000, Mem[0000000010001410] = 00000000 | |
11742 | stha %l5,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 | |
11743 | ! Code Fragment 4 | |
11744 | p0_fragment_13: | |
11745 | ! %l0 = 00000000000000ff | |
11746 | setx 0x2c65533072ee8492,%g7,%l0 ! %l0 = 2c65533072ee8492 | |
11747 | ! %l1 = ffffffffffffffff | |
11748 | setx 0x00a359681af6c71a,%g7,%l1 ! %l1 = 00a359681af6c71a | |
11749 | setx 0x7ff8, %g1, %g2 | |
11750 | and %l0, %g2, %l0 | |
11751 | setx 0xffffffff, %g1, %g2 | |
11752 | and %l1, %g2, %l1 | |
11753 | setx 0x100000000, %g1, %g2 | |
11754 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
11755 | ta T_CHANGE_HPRIV | |
11756 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
11757 | ta T_CHANGE_NONHPRIV | |
11758 | ! %l0 = 2c65533072ee8492 | |
11759 | setx 0x73e68347f23212ca,%g7,%l0 ! %l0 = 73e68347f23212ca | |
11760 | ! %l1 = 00a359681af6c71a | |
11761 | setx 0x009a8bb7aac1f974,%g7,%l1 ! %l1 = 009a8bb7aac1f974 | |
11762 | ! %f0 = 00000000 00000000 ff793dab 00000000 | |
11763 | ! %f4 = 00000000 000000ff fffffff8 00000000 | |
11764 | ! %f8 = 9c156421 c7ec13bb 10ac7b59 3eda2778 | |
11765 | ! %f12 = 4e000000 00000012 fcc4c676 00ff0000 | |
11766 | stda %f0,[%i5]ASI_BLK_AIUP ! Block Store to 0000000010141400 | |
11767 | ! %l1 = 009a8bb7aac1f974, Mem[0000000010081410] = f8962d02 | |
11768 | stba %l1,[%i2+%o5]0x88 ! Mem[0000000010081410] = f8962d74 | |
11769 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000030001408] = 00000090 00000000 | |
11770 | stda %l4,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00000000 00000000 | |
11771 | ! Mem[0000000030181410] = 00000000, %l7 = 0000000000000000 | |
11772 | swapa [%i6+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
11773 | ! Starting 10 instruction Load Burst | |
11774 | ! Mem[0000000010101400] = 10ac7b593eda2778, %l3 = 0000000000ff0000 | |
11775 | ldxa [%i4+%g0]0x88,%l3 ! %l3 = 10ac7b593eda2778 | |
11776 | ||
11777 | p0_label_285: | |
11778 | ! Mem[00000000100c1428] = 23e3b30000ffffff, %l0 = 73e68347f23212ca | |
11779 | ldx [%i3+0x028],%l0 ! %l0 = 23e3b30000ffffff | |
11780 | ! Mem[0000000030001400] = 00ffffff, %l6 = 0000000000000000 | |
11781 | lduha [%i0+%g0]0x89,%l6 ! %l6 = 000000000000ffff | |
11782 | membar #Sync ! Added by membar checker (48) | |
11783 | ! Mem[0000000010141408] = ff793dab, %l0 = 23e3b30000ffffff | |
11784 | lduha [%i5+%o4]0x80,%l0 ! %l0 = 000000000000ff79 | |
11785 | ! Mem[0000000030181410] = 00000000, %l7 = 0000000000000000 | |
11786 | ldswa [%i6+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
11787 | ! Mem[0000000020800000] = 00008470, %l7 = 0000000000000000 | |
11788 | lduba [%o1+0x001]%asi,%l7 ! %l7 = 0000000000000000 | |
11789 | ! Mem[0000000030001400] = 00ffffff, %l2 = 000000007663a3ff | |
11790 | ldsha [%i0+%g0]0x89,%l2 ! %l2 = ffffffffffffffff | |
11791 | ! Mem[0000000010101408] = 5e660000, %f24 = 022d96f8 | |
11792 | lda [%i4+%o4]0x80,%f24 ! %f24 = 5e660000 | |
11793 | ! Mem[0000000010001400] = 00ff0000, %f21 = fc734517 | |
11794 | ld [%i0+%g0],%f21 ! %f21 = 00ff0000 | |
11795 | ! Mem[0000000010081410] = f8962d74, %l5 = 0000000000000000 | |
11796 | lduha [%i2+%o5]0x88,%l5 ! %l5 = 0000000000002d74 | |
11797 | ! Starting 10 instruction Store Burst | |
11798 | ! Mem[0000000010101410] = ffffffff, %l7 = 0000000000000000 | |
11799 | swapa [%i4+%o5]0x88,%l7 ! %l7 = 00000000ffffffff | |
11800 | ||
11801 | ! Check Point 57 for processor 0 | |
11802 | ||
11803 | set p0_check_pt_data_57,%g4 | |
11804 | rd %ccr,%g5 ! %g5 = 44 | |
11805 | ldx [%g4+0x08],%g2 | |
11806 | cmp %l0,%g2 ! %l0 = 000000000000ff79 | |
11807 | bne %xcc,p0_reg_check_fail0 | |
11808 | mov 0xee0,%g1 | |
11809 | ldx [%g4+0x10],%g2 | |
11810 | cmp %l1,%g2 ! %l1 = 009a8bb7aac1f974 | |
11811 | bne %xcc,p0_reg_check_fail1 | |
11812 | mov 0xee1,%g1 | |
11813 | ldx [%g4+0x18],%g2 | |
11814 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
11815 | bne %xcc,p0_reg_check_fail2 | |
11816 | mov 0xee2,%g1 | |
11817 | ldx [%g4+0x20],%g2 | |
11818 | cmp %l3,%g2 ! %l3 = 10ac7b593eda2778 | |
11819 | bne %xcc,p0_reg_check_fail3 | |
11820 | mov 0xee3,%g1 | |
11821 | ldx [%g4+0x28],%g2 | |
11822 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
11823 | bne %xcc,p0_reg_check_fail4 | |
11824 | mov 0xee4,%g1 | |
11825 | ldx [%g4+0x30],%g2 | |
11826 | cmp %l5,%g2 ! %l5 = 0000000000002d74 | |
11827 | bne %xcc,p0_reg_check_fail5 | |
11828 | mov 0xee5,%g1 | |
11829 | ldx [%g4+0x38],%g2 | |
11830 | cmp %l6,%g2 ! %l6 = 000000000000ffff | |
11831 | bne %xcc,p0_reg_check_fail6 | |
11832 | mov 0xee6,%g1 | |
11833 | ldx [%g4+0x40],%g2 | |
11834 | cmp %l7,%g2 ! %l7 = 00000000ffffffff | |
11835 | bne %xcc,p0_reg_check_fail7 | |
11836 | mov 0xee7,%g1 | |
11837 | ldx [%g4+0x48],%g3 | |
11838 | std %f2,[%g4] | |
11839 | ldx [%g4],%g2 | |
11840 | cmp %g3,%g2 ! %f2 = ff793dab 00000000 | |
11841 | bne %xcc,p0_freg_check_fail | |
11842 | mov 0xf02,%g1 | |
11843 | ldx [%g4+0x50],%g3 | |
11844 | std %f4,[%g4] | |
11845 | ldx [%g4],%g2 | |
11846 | cmp %g3,%g2 ! %f4 = 00000000 000000ff | |
11847 | bne %xcc,p0_freg_check_fail | |
11848 | mov 0xf04,%g1 | |
11849 | ldx [%g4+0x58],%g3 | |
11850 | std %f6,[%g4] | |
11851 | ldx [%g4],%g2 | |
11852 | cmp %g3,%g2 ! %f6 = fffffff8 00000000 | |
11853 | bne %xcc,p0_freg_check_fail | |
11854 | mov 0xf06,%g1 | |
11855 | ldx [%g4+0x60],%g3 | |
11856 | std %f14,[%g4] | |
11857 | ldx [%g4],%g2 | |
11858 | cmp %g3,%g2 ! %f14 = fcc4c676 00ff0000 | |
11859 | bne %xcc,p0_freg_check_fail | |
11860 | mov 0xf14,%g1 | |
11861 | ldx [%g4+0x68],%g3 | |
11862 | std %f20,[%g4] | |
11863 | ldx [%g4],%g2 | |
11864 | cmp %g3,%g2 ! %f20 = f8ff0000 00ff0000 | |
11865 | bne %xcc,p0_freg_check_fail | |
11866 | mov 0xf20,%g1 | |
11867 | ldx [%g4+0x70],%g3 | |
11868 | std %f24,[%g4] | |
11869 | ldx [%g4],%g2 | |
11870 | cmp %g3,%g2 ! %f24 = 5e660000 00000000 | |
11871 | bne %xcc,p0_freg_check_fail | |
11872 | mov 0xf24,%g1 | |
11873 | ldx [%g4+0x78],%g3 | |
11874 | std %f30,[%g4] | |
11875 | ldx [%g4],%g2 | |
11876 | cmp %g3,%g2 ! %f30 = 00ff0000 00000000 | |
11877 | bne %xcc,p0_freg_check_fail | |
11878 | mov 0xf30,%g1 | |
11879 | ||
11880 | ! Check Point 57 completed | |
11881 | ||
11882 | ||
11883 | p0_label_286: | |
11884 | ! %f29 = 9def9057, Mem[0000000010141408] = ab3d79ff | |
11885 | sta %f29,[%i5+%o4]0x88 ! Mem[0000000010141408] = 9def9057 | |
11886 | ! %f10 = 10ac7b59 3eda2778, %l7 = 00000000ffffffff | |
11887 | ! Mem[0000000010181430] = 0000000000000000 | |
11888 | add %i6,0x030,%g1 | |
11889 | stda %f10,[%g1+%l7]ASI_PST16_P ! Mem[0000000010181430] = 10ac7b593eda2778 | |
11890 | ! Mem[0000000030181410] = 00000000, %l5 = 0000000000002d74 | |
11891 | swapa [%i6+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
11892 | ! Mem[0000000010181400] = 000000ff, %l6 = 000000000000ffff | |
11893 | ldstuba [%i6+%g0]0x88,%l6 ! %l6 = 000000ff000000ff | |
11894 | ! %l4 = 0000000000000000, Mem[0000000010181408] = 00000090 | |
11895 | stba %l4,[%i6+%o4]0x88 ! Mem[0000000010181408] = 00000000 | |
11896 | ! %l4 = 00000000, %l5 = 00000000, Mem[00000000300c1410] = ffff00ff 7d307e94 | |
11897 | stda %l4,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 00000000 00000000 | |
11898 | ! %f28 = 904919ff 9def9057, Mem[0000000010141410] = 00000000 000000ff | |
11899 | std %f28,[%i5+%o5] ! Mem[0000000010141410] = 904919ff 9def9057 | |
11900 | ! Mem[0000000010141408] = 5790ef9d00000000, %l7 = 00000000ffffffff | |
11901 | ldxa [%i5+%o4]0x80,%l7 ! %l7 = 5790ef9d00000000 | |
11902 | ! Mem[000000001018141f] = 00000000, %l0 = 000000000000ff79 | |
11903 | ldstuba [%i6+0x01f]%asi,%l0 ! %l0 = 00000000000000ff | |
11904 | ! Starting 10 instruction Load Burst | |
11905 | ! Mem[0000000030081410] = 665ef8ff, %f27 = e9706042 | |
11906 | lda [%i2+%o5]0x89,%f27 ! %f27 = 665ef8ff | |
11907 | ||
11908 | p0_label_287: | |
11909 | ! Mem[0000000010001408] = 9000ff7c, %l3 = 10ac7b593eda2778 | |
11910 | lduba [%i0+%o4]0x88,%l3 ! %l3 = 000000000000007c | |
11911 | ! Mem[0000000030141408] = 0000009000000000, %l4 = 0000000000000000 | |
11912 | ldxa [%i5+%o4]0x81,%l4 ! %l4 = 0000009000000000 | |
11913 | ! Mem[0000000030081410] = fff85e667663a3fa, %f0 = 00000000 00000000 | |
11914 | ldda [%i2+%o5]0x81,%f0 ! %f0 = fff85e66 7663a3fa | |
11915 | ! Mem[0000000030041400] = 4e000000 00000012 ff000000 00000000 | |
11916 | ! Mem[0000000030041410] = 000000ff ffffffff 00000000 ff0000ff | |
11917 | ! Mem[0000000030041420] = 00000000 76c6c4ff ff009cff d1c43403 | |
11918 | ! Mem[0000000030041430] = fc734517 00000000 0000ffff ff000000 | |
11919 | ldda [%i1]ASI_BLK_AIUSL,%f16 ! Block Load from 0000000030041400 | |
11920 | ! Mem[00000000100c1410] = 7cff0000, %l4 = 0000009000000000 | |
11921 | lduwa [%i3+%o5]0x80,%l4 ! %l4 = 000000007cff0000 | |
11922 | ! Mem[0000000030081408] = ff9c00ff, %l7 = 5790ef9d00000000 | |
11923 | lduwa [%i2+%o4]0x81,%l7 ! %l7 = 00000000ff9c00ff | |
11924 | ! Mem[0000000010001404] = 00000000, %l1 = 009a8bb7aac1f974 | |
11925 | ldsha [%i0+0x006]%asi,%l1 ! %l1 = 0000000000000000 | |
11926 | ! Mem[0000000010141400] = 00000000, %f2 = ff793dab | |
11927 | lda [%i5+0x000]%asi,%f2 ! %f2 = 00000000 | |
11928 | ! Mem[00000000100c1408] = ff0000ff, %l7 = 00000000ff9c00ff | |
11929 | ldsha [%i3+%o4]0x88,%l7 ! %l7 = 00000000000000ff | |
11930 | ! Starting 10 instruction Store Burst | |
11931 | ! Mem[0000000010101408] = 5e66000000000000, %l6 = 00000000000000ff, %l4 = 000000007cff0000 | |
11932 | add %i4,0x08,%g1 | |
11933 | casxa [%g1]0x80,%l6,%l4 ! %l4 = 5e66000000000000 | |
11934 | ||
11935 | p0_label_288: | |
11936 | ! Mem[0000000030041400] = 0000004e, %l1 = 0000000000000000 | |
11937 | ldstuba [%i1+%g0]0x89,%l1 ! %l1 = 0000004e000000ff | |
11938 | ! Mem[0000000010101408] = 0000665e, %l4 = 5e66000000000000 | |
11939 | ldstuba [%i4+%o4]0x88,%l4 ! %l4 = 0000005e000000ff | |
11940 | ! %l1 = 000000000000004e, Mem[0000000010141408] = 5790ef9d | |
11941 | stwa %l1,[%i5+%o4]0x80 ! Mem[0000000010141408] = 0000004e | |
11942 | ! %f2 = 00000000 00000000, Mem[0000000010141430] = 4e000000 00000012 | |
11943 | stda %f2 ,[%i5+0x030]%asi ! Mem[0000000010141430] = 00000000 00000000 | |
11944 | ! %f0 = fff85e66 7663a3fa, Mem[0000000010181410] = 00000090 ff239aff | |
11945 | stda %f0 ,[%i6+%o5]0x88 ! Mem[0000000010181410] = fff85e66 7663a3fa | |
11946 | ! %l6 = 000000ff, %l7 = 000000ff, Mem[0000000030081408] = ff9c00ff ffff0000 | |
11947 | stda %l6,[%i2+%o4]0x81 ! Mem[0000000030081408] = 000000ff 000000ff | |
11948 | ! %f14 = fcc4c676 00ff0000, Mem[0000000030001408] = 00000000 00000000 | |
11949 | stda %f14,[%i0+%o4]0x81 ! Mem[0000000030001408] = fcc4c676 00ff0000 | |
11950 | ! Mem[0000000010041422] = 00000000, %l5 = 0000000000000000 | |
11951 | ldstub [%i1+0x022],%l5 ! %l5 = 00000000000000ff | |
11952 | ! Mem[000000001018143c] = ffffb7f8, %l5 = 0000000000000000 | |
11953 | ldstuba [%i6+0x03c]%asi,%l5 ! %l5 = 000000ff000000ff | |
11954 | ! Starting 10 instruction Load Burst | |
11955 | ! Mem[0000000030141400] = ab3d7990, %l0 = 0000000000000000 | |
11956 | lduha [%i5+%g0]0x81,%l0 ! %l0 = 000000000000ab3d | |
11957 | ||
11958 | p0_label_289: | |
11959 | ! Mem[0000000010101400] = 7827da3e597bac10, %l6 = 00000000000000ff | |
11960 | ldxa [%i4+%g0]0x80,%l6 ! %l6 = 7827da3e597bac10 | |
11961 | ! Mem[00000000100c142c] = 00ffffff, %l2 = ffffffffffffffff | |
11962 | lduba [%i3+0x02c]%asi,%l2 ! %l2 = 0000000000000000 | |
11963 | ! Mem[000000001010141c] = 000000ff, %l1 = 000000000000004e | |
11964 | lduwa [%i4+0x01c]%asi,%l1 ! %l1 = 00000000000000ff | |
11965 | ! Mem[000000001018141c] = 000000ff, %f3 = 00000000 | |
11966 | lda [%i6+0x01c]%asi,%f3 ! %f3 = 000000ff | |
11967 | ! Mem[0000000010181428] = ff000000, %l7 = 00000000000000ff | |
11968 | ldub [%i6+0x028],%l7 ! %l7 = 00000000000000ff | |
11969 | ! Mem[0000000030001410] = ff000000ab3d79ff, %f4 = 00000000 000000ff | |
11970 | ldda [%i0+%o5]0x89,%f4 ! %f4 = ff000000 ab3d79ff | |
11971 | ! Mem[0000000030001410] = ff793dab000000ff, %l7 = 00000000000000ff | |
11972 | ldxa [%i0+%o5]0x81,%l7 ! %l7 = ff793dab000000ff | |
11973 | ! Mem[00000000100c1420] = ff000000, %l3 = 000000000000007c | |
11974 | lduw [%i3+0x020],%l3 ! %l3 = 00000000ff000000 | |
11975 | ! Code Fragment 4 | |
11976 | p0_fragment_14: | |
11977 | ! %l0 = 000000000000ab3d | |
11978 | setx 0x385a8c0fc452601b,%g7,%l0 ! %l0 = 385a8c0fc452601b | |
11979 | ! %l1 = 00000000000000ff | |
11980 | setx 0x22718ee05e58b95e,%g7,%l1 ! %l1 = 22718ee05e58b95e | |
11981 | setx 0x7ff8, %g1, %g2 | |
11982 | and %l0, %g2, %l0 | |
11983 | setx 0xffffffff, %g1, %g2 | |
11984 | and %l1, %g2, %l1 | |
11985 | setx 0x100000000, %g1, %g2 | |
11986 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
11987 | ta T_CHANGE_HPRIV | |
11988 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
11989 | ta T_CHANGE_NONHPRIV | |
11990 | ! %l0 = 385a8c0fc452601b | |
11991 | setx 0x47da524f8ddede37,%g7,%l0 ! %l0 = 47da524f8ddede37 | |
11992 | ! %l1 = 22718ee05e58b95e | |
11993 | setx 0xad9624f053d5cb36,%g7,%l1 ! %l1 = ad9624f053d5cb36 | |
11994 | ! Starting 10 instruction Store Burst | |
11995 | ! %f13 = 00000012, Mem[0000000010181400] = ff000000 | |
11996 | sta %f13,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000012 | |
11997 | ||
11998 | p0_label_290: | |
11999 | ! %l7 = ff793dab000000ff, Mem[0000000010041408] = 00000000 | |
12000 | stha %l7,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00ff0000 | |
12001 | ! %l2 = 00000000, %l3 = ff000000, Mem[0000000010101400] = 7827da3e 597bac10 | |
12002 | std %l2,[%i4+%g0] ! Mem[0000000010101400] = 00000000 ff000000 | |
12003 | membar #Sync ! Added by membar checker (49) | |
12004 | ! %l3 = 00000000ff000000, Mem[0000000030041408] = ff000000 | |
12005 | stwa %l3,[%i1+%o4]0x81 ! Mem[0000000030041408] = ff000000 | |
12006 | ! %f18 = 00000000 000000ff, Mem[0000000010041408] = 00ff0000 d6ba79b1 | |
12007 | stda %f18,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00000000 000000ff | |
12008 | ! %f6 = fffffff8 00000000, %l2 = 0000000000000000 | |
12009 | ! Mem[0000000030081400] = c7ec13bb00000000 | |
12010 | stda %f6,[%i2+%l2]ASI_PST16_SL ! Mem[0000000030081400] = c7ec13bb00000000 | |
12011 | ! %l7 = ff793dab000000ff, Mem[0000000030101410] = 00ff0000fc734517 | |
12012 | stxa %l7,[%i4+%o5]0x81 ! Mem[0000000030101410] = ff793dab000000ff | |
12013 | ! Mem[00000000100c1410] = 0000ff7c, %l5 = 00000000000000ff | |
12014 | ldstuba [%i3+%o5]0x88,%l5 ! %l5 = 0000007c000000ff | |
12015 | ! %f11 = 3eda2778, Mem[000000001014141c] = 00000000 | |
12016 | st %f11,[%i5+0x01c] ! Mem[000000001014141c] = 3eda2778 | |
12017 | ! %f14 = fcc4c676 00ff0000, %l4 = 000000000000005e | |
12018 | ! Mem[0000000010101418] = fc734517000000ff | |
12019 | add %i4,0x018,%g1 | |
12020 | stda %f14,[%g1+%l4]ASI_PST32_P ! Mem[0000000010101418] = fcc4c676000000ff | |
12021 | ! Starting 10 instruction Load Burst | |
12022 | ! Mem[0000000030081410] = 665ef8ff, %l2 = 0000000000000000 | |
12023 | ldsba [%i2+%o5]0x89,%l2 ! %l2 = ffffffffffffffff | |
12024 | ||
12025 | ! Check Point 58 for processor 0 | |
12026 | ||
12027 | set p0_check_pt_data_58,%g4 | |
12028 | rd %ccr,%g5 ! %g5 = 44 | |
12029 | ldx [%g4+0x08],%g2 | |
12030 | cmp %l0,%g2 ! %l0 = 47da524f8ddede37 | |
12031 | bne %xcc,p0_reg_check_fail0 | |
12032 | mov 0xee0,%g1 | |
12033 | ldx [%g4+0x10],%g2 | |
12034 | cmp %l1,%g2 ! %l1 = ad9624f053d5cb36 | |
12035 | bne %xcc,p0_reg_check_fail1 | |
12036 | mov 0xee1,%g1 | |
12037 | ldx [%g4+0x18],%g2 | |
12038 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
12039 | bne %xcc,p0_reg_check_fail2 | |
12040 | mov 0xee2,%g1 | |
12041 | ldx [%g4+0x20],%g2 | |
12042 | cmp %l3,%g2 ! %l3 = 00000000ff000000 | |
12043 | bne %xcc,p0_reg_check_fail3 | |
12044 | mov 0xee3,%g1 | |
12045 | ldx [%g4+0x28],%g2 | |
12046 | cmp %l4,%g2 ! %l4 = 000000000000005e | |
12047 | bne %xcc,p0_reg_check_fail4 | |
12048 | mov 0xee4,%g1 | |
12049 | ldx [%g4+0x30],%g2 | |
12050 | cmp %l5,%g2 ! %l5 = 000000000000007c | |
12051 | bne %xcc,p0_reg_check_fail5 | |
12052 | mov 0xee5,%g1 | |
12053 | ldx [%g4+0x38],%g2 | |
12054 | cmp %l6,%g2 ! %l6 = 7827da3e597bac10 | |
12055 | bne %xcc,p0_reg_check_fail6 | |
12056 | mov 0xee6,%g1 | |
12057 | ldx [%g4+0x40],%g2 | |
12058 | cmp %l7,%g2 ! %l7 = ff793dab000000ff | |
12059 | bne %xcc,p0_reg_check_fail7 | |
12060 | mov 0xee7,%g1 | |
12061 | ldx [%g4+0x48],%g3 | |
12062 | std %f0,[%g4] | |
12063 | ldx [%g4],%g2 | |
12064 | cmp %g3,%g2 ! %f0 = fff85e66 7663a3fa | |
12065 | bne %xcc,p0_freg_check_fail | |
12066 | mov 0xf00,%g1 | |
12067 | ldx [%g4+0x50],%g3 | |
12068 | std %f2,[%g4] | |
12069 | ldx [%g4],%g2 | |
12070 | cmp %g3,%g2 ! %f2 = 00000000 000000ff | |
12071 | bne %xcc,p0_freg_check_fail | |
12072 | mov 0xf02,%g1 | |
12073 | ldx [%g4+0x58],%g3 | |
12074 | std %f4,[%g4] | |
12075 | ldx [%g4],%g2 | |
12076 | cmp %g3,%g2 ! %f4 = ff000000 ab3d79ff | |
12077 | bne %xcc,p0_freg_check_fail | |
12078 | mov 0xf04,%g1 | |
12079 | ldx [%g4+0x60],%g3 | |
12080 | std %f16,[%g4] | |
12081 | ldx [%g4],%g2 | |
12082 | cmp %g3,%g2 ! %f16 = 12000000 0000004e | |
12083 | bne %xcc,p0_freg_check_fail | |
12084 | mov 0xf16,%g1 | |
12085 | ldx [%g4+0x68],%g3 | |
12086 | std %f18,[%g4] | |
12087 | ldx [%g4],%g2 | |
12088 | cmp %g3,%g2 ! %f18 = 00000000 000000ff | |
12089 | bne %xcc,p0_freg_check_fail | |
12090 | mov 0xf18,%g1 | |
12091 | ldx [%g4+0x70],%g3 | |
12092 | std %f20,[%g4] | |
12093 | ldx [%g4],%g2 | |
12094 | cmp %g3,%g2 ! %f20 = ffffffff ff000000 | |
12095 | bne %xcc,p0_freg_check_fail | |
12096 | mov 0xf20,%g1 | |
12097 | ldx [%g4+0x78],%g3 | |
12098 | std %f22,[%g4] | |
12099 | ldx [%g4],%g2 | |
12100 | cmp %g3,%g2 ! %f22 = ff0000ff 00000000 | |
12101 | bne %xcc,p0_freg_check_fail | |
12102 | mov 0xf22,%g1 | |
12103 | ldx [%g4+0x80],%g3 | |
12104 | std %f24,[%g4] | |
12105 | ldx [%g4],%g2 | |
12106 | cmp %g3,%g2 ! %f24 = ffc4c676 00000000 | |
12107 | bne %xcc,p0_freg_check_fail | |
12108 | mov 0xf24,%g1 | |
12109 | ldx [%g4+0x88],%g3 | |
12110 | std %f26,[%g4] | |
12111 | ldx [%g4],%g2 | |
12112 | cmp %g3,%g2 ! %f26 = 0334c4d1 ff9c00ff | |
12113 | bne %xcc,p0_freg_check_fail | |
12114 | mov 0xf26,%g1 | |
12115 | ldx [%g4+0x90],%g3 | |
12116 | std %f28,[%g4] | |
12117 | ldx [%g4],%g2 | |
12118 | cmp %g3,%g2 ! %f28 = 00000000 174573fc | |
12119 | bne %xcc,p0_freg_check_fail | |
12120 | mov 0xf28,%g1 | |
12121 | ldx [%g4+0x98],%g3 | |
12122 | std %f30,[%g4] | |
12123 | ldx [%g4],%g2 | |
12124 | cmp %g3,%g2 ! %f30 = 000000ff ffff0000 | |
12125 | bne %xcc,p0_freg_check_fail | |
12126 | mov 0xf30,%g1 | |
12127 | ||
12128 | ! Check Point 58 completed | |
12129 | ||
12130 | ||
12131 | p0_label_291: | |
12132 | ! Mem[0000000030001400] = ffffff00, %l4 = 000000000000005e | |
12133 | lduba [%i0+%g0]0x81,%l4 ! %l4 = 00000000000000ff | |
12134 | ! Mem[0000000030041400] = 12000000000000ff, %l3 = 00000000ff000000 | |
12135 | ldxa [%i1+%g0]0x89,%l3 ! %l3 = 12000000000000ff | |
12136 | ! Mem[0000000030181410] = 742d0000, %l6 = 7827da3e597bac10 | |
12137 | ldsba [%i6+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
12138 | ! Mem[0000000010101410] = 00000000, %l0 = 47da524f8ddede37 | |
12139 | lduha [%i4+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
12140 | ! Mem[0000000010041430] = ffffffff ff000000, %l2 = ffffffff, %l3 = 000000ff | |
12141 | ldd [%i1+0x030],%l2 ! %l2 = 00000000ffffffff 00000000ff000000 | |
12142 | ! Mem[0000000030101400] = 0090ffff, %f17 = 0000004e | |
12143 | lda [%i4+%g0]0x81,%f17 ! %f17 = 0090ffff | |
12144 | ! Mem[0000000020800040] = ff397379, %l4 = 00000000000000ff | |
12145 | lduba [%o1+0x041]%asi,%l4 ! %l4 = 0000000000000039 | |
12146 | ! Mem[0000000010181404] = 00b3e323, %l2 = 00000000ffffffff | |
12147 | lduba [%i6+0x004]%asi,%l2 ! %l2 = 0000000000000000 | |
12148 | ! Mem[0000000030181400] = 00000000, %l2 = 0000000000000000 | |
12149 | lduwa [%i6+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
12150 | ! Starting 10 instruction Store Burst | |
12151 | ! %f16 = 12000000 0090ffff, Mem[0000000030101400] = ffff9000 ffffffff | |
12152 | stda %f16,[%i4+%g0]0x89 ! Mem[0000000030101400] = 12000000 0090ffff | |
12153 | ||
12154 | p0_label_292: | |
12155 | ! %l1 = ad9624f053d5cb36, Mem[0000000010081410] = 742d96f8 | |
12156 | stha %l1,[%i2+%o5]0x80 ! Mem[0000000010081410] = cb3696f8 | |
12157 | ! Mem[0000000010181404] = 00b3e323, %l7 = 000000ff, %l0 = 00000000 | |
12158 | add %i6,0x04,%g1 | |
12159 | casa [%g1]0x80,%l7,%l0 ! %l0 = 0000000000b3e323 | |
12160 | ! %f4 = ff000000 ab3d79ff, %l1 = ad9624f053d5cb36 | |
12161 | ! Mem[0000000030101430] = 904919ff9def9057 | |
12162 | add %i4,0x030,%g1 | |
12163 | stda %f4,[%g1+%l1]ASI_PST8_S ! Mem[0000000030101430] = 904900009d3d7957 | |
12164 | ! %l7 = ff793dab000000ff, Mem[00000000100c1408] = ff0000ff | |
12165 | stha %l7,[%i3+%o4]0x88 ! Mem[00000000100c1408] = ff0000ff | |
12166 | ! Mem[0000000030041408] = ff000000, %l4 = 0000000000000039 | |
12167 | ldstuba [%i1+%o4]0x81,%l4 ! %l4 = 000000ff000000ff | |
12168 | ! %f16 = 12000000 0090ffff, %l1 = ad9624f053d5cb36 | |
12169 | ! Mem[0000000030181420] = 9c156421c7ec13bb | |
12170 | add %i6,0x020,%g1 | |
12171 | stda %f16,[%g1+%l1]ASI_PST16_S ! Mem[0000000030181420] = 9c150000009013bb | |
12172 | ! Mem[0000000030181410] = 00002d74, %l4 = 00000000000000ff | |
12173 | swapa [%i6+%o5]0x81,%l4 ! %l4 = 0000000000002d74 | |
12174 | ! %l2 = 0000000000000000, Mem[0000000010041400] = 00000066 | |
12175 | stwa %l2,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 | |
12176 | ! %l4 = 00002d74, %l5 = 0000007c, Mem[0000000030101408] = 00000000 00000000 | |
12177 | stda %l4,[%i4+%o4]0x81 ! Mem[0000000030101408] = 00002d74 0000007c | |
12178 | ! Starting 10 instruction Load Burst | |
12179 | ! Mem[0000000010141418] = fffffff83eda2778, %f24 = ffc4c676 00000000 | |
12180 | ldd [%i5+0x018],%f24 ! %f24 = fffffff8 3eda2778 | |
12181 | ||
12182 | p0_label_293: | |
12183 | ! Mem[0000000010081430] = 947e307d, %l4 = 0000000000002d74 | |
12184 | ldsw [%i2+0x030],%l4 ! %l4 = ffffffff947e307d | |
12185 | ! Mem[0000000030081400] = 00000000bb13ecc7, %l6 = 0000000000000000 | |
12186 | ldxa [%i2+%g0]0x89,%l6 ! %l6 = 00000000bb13ecc7 | |
12187 | ! Mem[00000000211c0000] = 7cff1a4c, %l6 = 00000000bb13ecc7 | |
12188 | lduha [%o2+0x000]%asi,%l6 ! %l6 = 0000000000007cff | |
12189 | ! Mem[0000000010101410] = 00000000, %f11 = 3eda2778 | |
12190 | lda [%i4+%o5]0x80,%f11 ! %f11 = 00000000 | |
12191 | ! Mem[0000000010041408] = 00000000, %f9 = c7ec13bb | |
12192 | lda [%i1+%o4]0x88,%f9 ! %f9 = 00000000 | |
12193 | ! Mem[0000000030081410] = faa36376665ef8ff, %l0 = 0000000000b3e323 | |
12194 | ldxa [%i2+%o5]0x89,%l0 ! %l0 = faa36376665ef8ff | |
12195 | ! Mem[0000000030041408] = ff000000 00000000, %l6 = 00007cff, %l7 = 000000ff | |
12196 | ldda [%i1+%o4]0x81,%l6 ! %l6 = 00000000ff000000 0000000000000000 | |
12197 | ! Mem[0000000030081410] = 665ef8ff, %l5 = 000000000000007c | |
12198 | ldswa [%i2+%o5]0x89,%l5 ! %l5 = 00000000665ef8ff | |
12199 | ! Mem[0000000010181410] = 7663a3fa, %l0 = faa36376665ef8ff | |
12200 | ldswa [%i6+%o5]0x88,%l0 ! %l0 = 000000007663a3fa | |
12201 | ! Starting 10 instruction Store Burst | |
12202 | ! Mem[000000001014143a] = fcc4c676, %l7 = 0000000000000000 | |
12203 | ldstuba [%i5+0x03a]%asi,%l7 ! %l7 = 000000c6000000ff | |
12204 | ||
12205 | p0_label_294: | |
12206 | ! %f12 = 4e000000 00000012, %l3 = 00000000ff000000 | |
12207 | ! Mem[0000000010181408] = 00000000000000ff | |
12208 | add %i6,0x008,%g1 | |
12209 | stda %f12,[%g1+%l3]ASI_PST32_PL ! Mem[0000000010181408] = 00000000000000ff | |
12210 | ! %f20 = ffffffff ff000000, Mem[0000000030081400] = c7ec13bb 00000000 | |
12211 | stda %f20,[%i2+%g0]0x81 ! Mem[0000000030081400] = ffffffff ff000000 | |
12212 | ! %l2 = 0000000000000000, Mem[0000000010001408] = 7cff0090 | |
12213 | stha %l2,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000090 | |
12214 | ! %l6 = 00000000ff000000, Mem[0000000010001410] = 00000000 | |
12215 | stba %l6,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00000000 | |
12216 | ! %f18 = 00000000 000000ff, %l2 = 0000000000000000 | |
12217 | ! Mem[0000000030001428] = 3739e8907663a3fa | |
12218 | add %i0,0x028,%g1 | |
12219 | stda %f18,[%g1+%l2]ASI_PST32_SL ! Mem[0000000030001428] = 3739e8907663a3fa | |
12220 | ! %l0 = 7663a3fa, %l1 = 53d5cb36, Mem[0000000030001400] = ffffff00 00000000 | |
12221 | stda %l0,[%i0+%g0]0x81 ! Mem[0000000030001400] = 7663a3fa 53d5cb36 | |
12222 | ! %l4 = ffffffff947e307d, Mem[00000000300c1408] = 00000000 | |
12223 | stwa %l4,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 947e307d | |
12224 | ! %f12 = 4e000000 00000012, Mem[0000000010041400] = 00000000 00000000 | |
12225 | stda %f12,[%i1+%g0]0x88 ! Mem[0000000010041400] = 4e000000 00000012 | |
12226 | ! %l2 = 0000000000000000, Mem[0000000010141400] = 00000000 | |
12227 | stwa %l2,[%i5+%g0]0x80 ! Mem[0000000010141400] = 00000000 | |
12228 | ! Starting 10 instruction Load Burst | |
12229 | ! Mem[0000000010041410] = 00000000, %l1 = ad9624f053d5cb36 | |
12230 | ldsba [%i1+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
12231 | ||
12232 | p0_label_295: | |
12233 | ! Mem[00000000300c1410] = 0000000000000000, %f22 = ff0000ff 00000000 | |
12234 | ldda [%i3+%o5]0x89,%f22 ! %f22 = 00000000 00000000 | |
12235 | ! Mem[0000000010181400] = 12000000, %l0 = 000000007663a3fa | |
12236 | lduba [%i6+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
12237 | ! Mem[0000000010081410] = cb3696f8 00000000, %l2 = 00000000, %l3 = ff000000 | |
12238 | ldda [%i2+%o5]0x80,%l2 ! %l2 = 00000000cb3696f8 0000000000000000 | |
12239 | ! Mem[0000000010141400] = 00000000, %l5 = 00000000665ef8ff | |
12240 | ldswa [%i5+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
12241 | ! Mem[0000000010141410] = 904919ff, %l5 = 0000000000000000 | |
12242 | ldsba [%i5+%o5]0x80,%l5 ! %l5 = ffffffffffffff90 | |
12243 | ! Mem[0000000030101410] = ab3d79ff, %l6 = 00000000ff000000 | |
12244 | lduba [%i4+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
12245 | ! Mem[00000000300c1400] = 00000000000000ff, %f14 = fcc4c676 00ff0000 | |
12246 | ldda [%i3+%g0]0x89,%f14 ! %f14 = 00000000 000000ff | |
12247 | ! Mem[0000000010001410] = 00000000, %l0 = 0000000000000000 | |
12248 | lduha [%i0+%o5]0x88,%l0 ! %l0 = 0000000000000000 | |
12249 | ! Mem[0000000010081408] = 00ffffff, %l2 = 00000000cb3696f8 | |
12250 | ldswa [%i2+%o4]0x80,%l2 ! %l2 = 0000000000ffffff | |
12251 | ! Starting 10 instruction Store Burst | |
12252 | ! %l5 = ffffffffffffff90, Mem[0000000010141408] = 4e000000 | |
12253 | stha %l5,[%i5+%o4]0x88 ! Mem[0000000010141408] = 4e00ff90 | |
12254 | ||
12255 | ! Check Point 59 for processor 0 | |
12256 | ||
12257 | set p0_check_pt_data_59,%g4 | |
12258 | rd %ccr,%g5 ! %g5 = 44 | |
12259 | ldx [%g4+0x08],%g2 | |
12260 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
12261 | bne %xcc,p0_reg_check_fail0 | |
12262 | mov 0xee0,%g1 | |
12263 | ldx [%g4+0x10],%g2 | |
12264 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
12265 | bne %xcc,p0_reg_check_fail1 | |
12266 | mov 0xee1,%g1 | |
12267 | ldx [%g4+0x18],%g2 | |
12268 | cmp %l2,%g2 ! %l2 = 0000000000ffffff | |
12269 | bne %xcc,p0_reg_check_fail2 | |
12270 | mov 0xee2,%g1 | |
12271 | ldx [%g4+0x20],%g2 | |
12272 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
12273 | bne %xcc,p0_reg_check_fail3 | |
12274 | mov 0xee3,%g1 | |
12275 | ldx [%g4+0x28],%g2 | |
12276 | cmp %l4,%g2 ! %l4 = ffffffff947e307d | |
12277 | bne %xcc,p0_reg_check_fail4 | |
12278 | mov 0xee4,%g1 | |
12279 | ldx [%g4+0x30],%g2 | |
12280 | cmp %l5,%g2 ! %l5 = ffffffffffffff90 | |
12281 | bne %xcc,p0_reg_check_fail5 | |
12282 | mov 0xee5,%g1 | |
12283 | ldx [%g4+0x38],%g2 | |
12284 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
12285 | bne %xcc,p0_reg_check_fail6 | |
12286 | mov 0xee6,%g1 | |
12287 | ldx [%g4+0x40],%g2 | |
12288 | cmp %l7,%g2 ! %l7 = 00000000000000c6 | |
12289 | bne %xcc,p0_reg_check_fail7 | |
12290 | mov 0xee7,%g1 | |
12291 | ldx [%g4+0x48],%g3 | |
12292 | std %f2,[%g4] | |
12293 | ldx [%g4],%g2 | |
12294 | cmp %g3,%g2 ! %f2 = 00000000 000000ff | |
12295 | bne %xcc,p0_freg_check_fail | |
12296 | mov 0xf02,%g1 | |
12297 | ldx [%g4+0x50],%g3 | |
12298 | std %f6,[%g4] | |
12299 | ldx [%g4],%g2 | |
12300 | cmp %g3,%g2 ! %f6 = fffffff8 00000000 | |
12301 | bne %xcc,p0_freg_check_fail | |
12302 | mov 0xf06,%g1 | |
12303 | ldx [%g4+0x58],%g3 | |
12304 | std %f8,[%g4] | |
12305 | ldx [%g4],%g2 | |
12306 | cmp %g3,%g2 ! %f8 = 9c156421 00000000 | |
12307 | bne %xcc,p0_freg_check_fail | |
12308 | mov 0xf08,%g1 | |
12309 | ldx [%g4+0x60],%g3 | |
12310 | std %f10,[%g4] | |
12311 | ldx [%g4],%g2 | |
12312 | cmp %g3,%g2 ! %f10 = 10ac7b59 00000000 | |
12313 | bne %xcc,p0_freg_check_fail | |
12314 | mov 0xf10,%g1 | |
12315 | ldx [%g4+0x68],%g3 | |
12316 | std %f14,[%g4] | |
12317 | ldx [%g4],%g2 | |
12318 | cmp %g3,%g2 ! %f14 = 00000000 000000ff | |
12319 | bne %xcc,p0_freg_check_fail | |
12320 | mov 0xf14,%g1 | |
12321 | ldx [%g4+0x70],%g3 | |
12322 | std %f16,[%g4] | |
12323 | ldx [%g4],%g2 | |
12324 | cmp %g3,%g2 ! %f16 = 12000000 0090ffff | |
12325 | bne %xcc,p0_freg_check_fail | |
12326 | mov 0xf16,%g1 | |
12327 | ldx [%g4+0x78],%g3 | |
12328 | std %f22,[%g4] | |
12329 | ldx [%g4],%g2 | |
12330 | cmp %g3,%g2 ! %f22 = 00000000 00000000 | |
12331 | bne %xcc,p0_freg_check_fail | |
12332 | mov 0xf22,%g1 | |
12333 | ldx [%g4+0x80],%g3 | |
12334 | std %f24,[%g4] | |
12335 | ldx [%g4],%g2 | |
12336 | cmp %g3,%g2 ! %f24 = fffffff8 3eda2778 | |
12337 | bne %xcc,p0_freg_check_fail | |
12338 | mov 0xf24,%g1 | |
12339 | ||
12340 | ! Check Point 59 completed | |
12341 | ||
12342 | ||
12343 | p0_label_296: | |
12344 | ! %l6 = 00000000000000ff, Mem[0000000030081400] = ffffffff | |
12345 | stwa %l6,[%i2+%g0]0x81 ! Mem[0000000030081400] = 000000ff | |
12346 | ! %l0 = 00000000, %l1 = 00000000, Mem[0000000030101400] = ffff9000 00000012 | |
12347 | stda %l0,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 00000000 | |
12348 | ! %l0 = 00000000, %l1 = 00000000, Mem[0000000010101408] = ff660000 00000000 | |
12349 | stda %l0,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000 00000000 | |
12350 | ! %l6 = 00000000000000ff, Mem[0000000030081408] = 000000ff | |
12351 | stha %l6,[%i2+%o4]0x81 ! Mem[0000000030081408] = 00ff00ff | |
12352 | ! Mem[0000000030181410] = 000000ff, %l2 = 0000000000ffffff | |
12353 | swapa [%i6+%o5]0x81,%l2 ! %l2 = 00000000000000ff | |
12354 | ! %l7 = 00000000000000c6, Mem[0000000021800141] = ffff1df6, %asi = 80 | |
12355 | stba %l7,[%o3+0x141]%asi ! Mem[0000000021800140] = ffc61df6 | |
12356 | ! Mem[0000000030041408] = ff000000, %l1 = 0000000000000000 | |
12357 | swapa [%i1+%o4]0x81,%l1 ! %l1 = 00000000ff000000 | |
12358 | ! %l5 = ffffffffffffff90, Mem[0000000010181408] = 00000000 | |
12359 | stha %l5,[%i6+%o4]0x88 ! Mem[0000000010181408] = 0000ff90 | |
12360 | ! %l6 = 00000000000000ff, Mem[0000000030101410] = ab3d79ff | |
12361 | stba %l6,[%i4+%o5]0x89 ! Mem[0000000030101410] = ab3d79ff | |
12362 | ! Starting 10 instruction Load Burst | |
12363 | ! Mem[0000000020800040] = ff397379, %l7 = 00000000000000c6 | |
12364 | lduh [%o1+0x040],%l7 ! %l7 = 000000000000ff39 | |
12365 | ||
12366 | p0_label_297: | |
12367 | ! Mem[00000000300c1408] = 7d307e94, %f11 = 00000000 | |
12368 | lda [%i3+%o4]0x81,%f11 ! %f11 = 7d307e94 | |
12369 | ! Mem[0000000030001408] = fcc4c676, %l0 = 0000000000000000 | |
12370 | ldsba [%i0+%o4]0x81,%l0 ! %l0 = fffffffffffffffc | |
12371 | ! Mem[0000000010181400] = 00000012, %l6 = 00000000000000ff | |
12372 | lduha [%i6+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
12373 | ! Mem[0000000020800040] = ff397379, %l7 = 000000000000ff39 | |
12374 | lduh [%o1+0x040],%l7 ! %l7 = 000000000000ff39 | |
12375 | ! Mem[0000000010141410] = 904919ff9def9057, %l4 = ffffffff947e307d | |
12376 | ldxa [%i5+%o5]0x80,%l4 ! %l4 = 904919ff9def9057 | |
12377 | ! Mem[0000000030041400] = ff000000, %l4 = 904919ff9def9057 | |
12378 | ldsha [%i1+%g0]0x81,%l4 ! %l4 = ffffffffffffff00 | |
12379 | ! Mem[0000000030141408] = 90000000, %l4 = ffffffffffffff00 | |
12380 | lduwa [%i5+%o4]0x89,%l4 ! %l4 = 0000000090000000 | |
12381 | ! Mem[0000000010181408] = 90ff0000 000000ff, %l0 = fffffffc, %l1 = ff000000 | |
12382 | ldda [%i6+%o4]0x80,%l0 ! %l0 = 0000000090ff0000 00000000000000ff | |
12383 | ! Mem[00000000100c1410] = ffff000000ffffff, %l3 = 0000000000000000 | |
12384 | ldxa [%i3+0x010]%asi,%l3 ! %l3 = ffff000000ffffff | |
12385 | ! Starting 10 instruction Store Burst | |
12386 | ! %l4 = 0000000090000000, Mem[000000001008141f] = 000000ff, %asi = 80 | |
12387 | stba %l4,[%i2+0x01f]%asi ! Mem[000000001008141c] = 00000000 | |
12388 | ||
12389 | p0_label_298: | |
12390 | ! %f12 = 4e000000 00000012, %l0 = 0000000090ff0000 | |
12391 | ! Mem[0000000030081400] = 000000ffff000000 | |
12392 | stda %f12,[%i2+%l0]ASI_PST16_S ! Mem[0000000030081400] = 000000ffff000000 | |
12393 | ! %f22 = 00000000, Mem[0000000030041400] = 000000ff | |
12394 | sta %f22,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00000000 | |
12395 | ! %l5 = ffffffffffffff90, Mem[0000000030181408] = ff00ffff00000000 | |
12396 | stxa %l5,[%i6+%o4]0x81 ! Mem[0000000030181408] = ffffffffffffff90 | |
12397 | ! Mem[0000000020800040] = ff397379, %l6 = 0000000000000000 | |
12398 | ldstub [%o1+0x040],%l6 ! %l6 = 000000ff000000ff | |
12399 | ! %l2 = 000000ff, %l3 = 00ffffff, Mem[0000000030041400] = 00000000 12000000 | |
12400 | stda %l2,[%i1+%g0]0x89 ! Mem[0000000030041400] = 000000ff 00ffffff | |
12401 | ! %l7 = 000000000000ff39, Mem[000000001000140c] = 00000000 | |
12402 | sth %l7,[%i0+0x00c] ! Mem[000000001000140c] = ff390000 | |
12403 | ! Mem[0000000010081410] = cb3696f8, %l7 = 000000000000ff39 | |
12404 | swapa [%i2+%o5]0x80,%l7 ! %l7 = 00000000cb3696f8 | |
12405 | ! Mem[0000000030081408] = 00ff00ff, %l2 = 00000000000000ff | |
12406 | ldstuba [%i2+%o4]0x81,%l2 ! %l2 = 00000000000000ff | |
12407 | ! %l6 = 00000000000000ff, Mem[00000000300c1400] = 000000ff | |
12408 | stwa %l6,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 000000ff | |
12409 | ! Starting 10 instruction Load Burst | |
12410 | ! Mem[0000000010081410] = 0000ff39, %l2 = 0000000000000000 | |
12411 | lduha [%i2+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
12412 | ||
12413 | p0_label_299: | |
12414 | ! Mem[0000000010081410] = 39ff0000, %l6 = 00000000000000ff | |
12415 | lduba [%i2+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
12416 | ! Mem[00000000300c1408] = 7d307e94, %l7 = 00000000cb3696f8 | |
12417 | lduwa [%i3+%o4]0x81,%l7 ! %l7 = 000000007d307e94 | |
12418 | ! Mem[0000000030001408] = 76c6c4fc, %l1 = 00000000000000ff | |
12419 | ldsha [%i0+%o4]0x89,%l1 ! %l1 = ffffffffffffc4fc | |
12420 | ! Mem[00000000300c1400] = 000000ff, %l3 = ffff000000ffffff | |
12421 | lduba [%i3+%g0]0x89,%l3 ! %l3 = 00000000000000ff | |
12422 | ! Mem[00000000100c1408] = ff0000ff, %l3 = 00000000000000ff | |
12423 | ldsha [%i3+%o4]0x80,%l3 ! %l3 = ffffffffffffff00 | |
12424 | ! Mem[0000000010181400] = 23e3b30012000000, %f18 = 00000000 000000ff | |
12425 | ldda [%i6+%g0]0x88,%f18 ! %f18 = 23e3b300 12000000 | |
12426 | ! %l0 = 0000000090ff0000, imm = fffffffffffff062, %l0 = 0000000090ff0000 | |
12427 | sub %l0,-0xf9e,%l0 ! %l0 = 0000000090ff0f9e | |
12428 | ! Mem[00000000300c1400] = ff000000, %l5 = ffffffffffffff90 | |
12429 | lduwa [%i3+%g0]0x81,%l5 ! %l5 = 00000000ff000000 | |
12430 | ! Mem[0000000030081400] = 000000ffff000000, %l5 = 00000000ff000000 | |
12431 | ldxa [%i2+%g0]0x89,%l5 ! %l5 = 000000ffff000000 | |
12432 | ! Starting 10 instruction Store Burst | |
12433 | ! %l0 = 90ff0f9e, %l1 = ffffc4fc, Mem[0000000030181408] = ffffffff ffffff90 | |
12434 | stda %l0,[%i6+%o4]0x81 ! Mem[0000000030181408] = 90ff0f9e ffffc4fc | |
12435 | ||
12436 | p0_label_300: | |
12437 | ! %l3 = ffffffffffffff00, Mem[0000000030041408] = 00000000 | |
12438 | stha %l3,[%i1+%o4]0x89 ! Mem[0000000030041408] = 0000ff00 | |
12439 | ! Mem[0000000010001410] = 00000000, %l5 = 000000ffff000000 | |
12440 | swapa [%i0+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
12441 | ! %l7 = 000000007d307e94, Mem[0000000010081420] = fcf85e66 | |
12442 | stw %l7,[%i2+0x020] ! Mem[0000000010081420] = 7d307e94 | |
12443 | ! Mem[0000000030001408] = 76c6c4fc, %l1 = ffffffffffffc4fc | |
12444 | ldstuba [%i0+%o4]0x89,%l1 ! %l1 = 000000fc000000ff | |
12445 | ! Mem[000000001004141c] = 00b3e323, %l6 = 0000000000000000, %asi = 80 | |
12446 | swapa [%i1+0x01c]%asi,%l6 ! %l6 = 0000000000b3e323 | |
12447 | ! Mem[00000000300c1408] = 7d307e94, %l5 = 0000000000000000 | |
12448 | swapa [%i3+%o4]0x81,%l5 ! %l5 = 000000007d307e94 | |
12449 | ! Mem[0000000030001410] = ab3d79ff, %l5 = 000000007d307e94 | |
12450 | ldstuba [%i0+%o5]0x89,%l5 ! %l5 = 000000ff000000ff | |
12451 | ! %l2 = 00000000, %l3 = ffffff00, Mem[0000000010141400] = 00000000 00000000 | |
12452 | stda %l2,[%i5+%g0]0x88 ! Mem[0000000010141400] = 00000000 ffffff00 | |
12453 | ! %l7 = 000000007d307e94, %l7 = 000000007d307e94, %l4 = 0000000090000000 | |
12454 | sdivx %l7,%l7,%l4 ! %l4 = 0000000000000001 | |
12455 | ! Starting 10 instruction Load Burst | |
12456 | ! Mem[0000000030181400] = 00000000, %l6 = 0000000000b3e323 | |
12457 | ldswa [%i6+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
12458 | ||
12459 | ! Check Point 60 for processor 0 | |
12460 | ||
12461 | set p0_check_pt_data_60,%g4 | |
12462 | rd %ccr,%g5 ! %g5 = 44 | |
12463 | ldx [%g4+0x08],%g2 | |
12464 | cmp %l0,%g2 ! %l0 = 0000000090ff0f9e | |
12465 | bne %xcc,p0_reg_check_fail0 | |
12466 | mov 0xee0,%g1 | |
12467 | ldx [%g4+0x10],%g2 | |
12468 | cmp %l1,%g2 ! %l1 = 00000000000000fc | |
12469 | bne %xcc,p0_reg_check_fail1 | |
12470 | mov 0xee1,%g1 | |
12471 | ldx [%g4+0x18],%g2 | |
12472 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
12473 | bne %xcc,p0_reg_check_fail2 | |
12474 | mov 0xee2,%g1 | |
12475 | ldx [%g4+0x20],%g2 | |
12476 | cmp %l3,%g2 ! %l3 = ffffffffffffff00 | |
12477 | bne %xcc,p0_reg_check_fail3 | |
12478 | mov 0xee3,%g1 | |
12479 | ldx [%g4+0x28],%g2 | |
12480 | cmp %l4,%g2 ! %l4 = 0000000000000001 | |
12481 | bne %xcc,p0_reg_check_fail4 | |
12482 | mov 0xee4,%g1 | |
12483 | ldx [%g4+0x30],%g2 | |
12484 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
12485 | bne %xcc,p0_reg_check_fail5 | |
12486 | mov 0xee5,%g1 | |
12487 | ldx [%g4+0x38],%g2 | |
12488 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
12489 | bne %xcc,p0_reg_check_fail6 | |
12490 | mov 0xee6,%g1 | |
12491 | ldx [%g4+0x40],%g2 | |
12492 | cmp %l7,%g2 ! %l7 = 000000007d307e94 | |
12493 | bne %xcc,p0_reg_check_fail7 | |
12494 | mov 0xee7,%g1 | |
12495 | ldx [%g4+0x48],%g3 | |
12496 | std %f0,[%g4] | |
12497 | ldx [%g4],%g2 | |
12498 | cmp %g3,%g2 ! %f0 = fff85e66 7663a3fa | |
12499 | bne %xcc,p0_freg_check_fail | |
12500 | mov 0xf00,%g1 | |
12501 | ldx [%g4+0x50],%g3 | |
12502 | std %f10,[%g4] | |
12503 | ldx [%g4],%g2 | |
12504 | cmp %g3,%g2 ! %f10 = 10ac7b59 7d307e94 | |
12505 | bne %xcc,p0_freg_check_fail | |
12506 | mov 0xf10,%g1 | |
12507 | ldx [%g4+0x58],%g3 | |
12508 | std %f18,[%g4] | |
12509 | ldx [%g4],%g2 | |
12510 | cmp %g3,%g2 ! %f18 = 23e3b300 12000000 | |
12511 | bne %xcc,p0_freg_check_fail | |
12512 | mov 0xf18,%g1 | |
12513 | ||
12514 | ! Check Point 60 completed | |
12515 | ||
12516 | ||
12517 | p0_label_301: | |
12518 | ! Mem[0000000010101410] = 00000000, %l6 = 0000000000000000 | |
12519 | ldswa [%i4+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
12520 | ! Mem[0000000030041408] = 0000ff00, %f27 = ff9c00ff | |
12521 | lda [%i1+%o4]0x89,%f27 ! %f27 = 0000ff00 | |
12522 | ! Mem[0000000030041410] = 000000ffffffffff, %f24 = fffffff8 3eda2778 | |
12523 | ldda [%i1+%o5]0x81,%f24 ! %f24 = 000000ff ffffffff | |
12524 | ! Mem[0000000030041410] = ff000000, %f8 = 9c156421 | |
12525 | lda [%i1+%o5]0x89,%f8 ! %f8 = ff000000 | |
12526 | ! Mem[0000000010181400] = 23e3b300 12000000, %l6 = 00000000, %l7 = 7d307e94 | |
12527 | ldda [%i6+%g0]0x88,%l6 ! %l6 = 0000000012000000 0000000023e3b300 | |
12528 | ! Mem[0000000010101434] = 000000ff, %f1 = 7663a3fa | |
12529 | lda [%i4+0x034]%asi,%f1 ! %f1 = 000000ff | |
12530 | ! Mem[00000000211c0000] = 7cff1a4c, %l5 = 00000000000000ff | |
12531 | ldsb [%o2+0x001],%l5 ! %l5 = ffffffffffffffff | |
12532 | ! Mem[0000000030081400] = 000000ff, %l4 = 0000000000000001 | |
12533 | lduba [%i2+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
12534 | ! Mem[00000000100c1410] = ffff000000ffffff, %l4 = 0000000000000000 | |
12535 | ldx [%i3+%o5],%l4 ! %l4 = ffff000000ffffff | |
12536 | ! Starting 10 instruction Store Burst | |
12537 | ! Mem[0000000010081430] = 947e307d, %l1 = 00000000000000fc, %asi = 80 | |
12538 | swapa [%i2+0x030]%asi,%l1 ! %l1 = 00000000947e307d | |
12539 | ||
12540 | p0_label_302: | |
12541 | ! Mem[0000000010001434] = 00fa0000, %l4 = ffff000000ffffff, %asi = 80 | |
12542 | swapa [%i0+0x034]%asi,%l4 ! %l4 = 0000000000fa0000 | |
12543 | ! %l5 = ffffffffffffffff, Mem[00000000100c141c] = 00000000, %asi = 80 | |
12544 | stba %l5,[%i3+0x01c]%asi ! Mem[00000000100c141c] = ff000000 | |
12545 | ! Mem[0000000030141410] = a3fff8fc, %l3 = ffffffffffffff00 | |
12546 | ldstuba [%i5+%o5]0x81,%l3 ! %l3 = 000000a3000000ff | |
12547 | ! Mem[00000000300c1400] = 000000ff, %l6 = 0000000012000000 | |
12548 | ldstuba [%i3+%g0]0x89,%l6 ! %l6 = 000000ff000000ff | |
12549 | ! Mem[0000000010101410] = 00000000, %l0 = 0000000090ff0f9e | |
12550 | ldstuba [%i4+%o5]0x80,%l0 ! %l0 = 00000000000000ff | |
12551 | ! Mem[0000000010081422] = 7d307e94, %l1 = 00000000947e307d | |
12552 | ldstub [%i2+0x022],%l1 ! %l1 = 0000007e000000ff | |
12553 | ! %f1 = 000000ff, Mem[0000000030181410] = 00ffffff | |
12554 | sta %f1 ,[%i6+%o5]0x81 ! Mem[0000000030181410] = 000000ff | |
12555 | ! Mem[00000000100c140e] = 000000ff, %l2 = 0000000000000000 | |
12556 | ldstuba [%i3+0x00e]%asi,%l2 ! %l2 = 00000000000000ff | |
12557 | ! Mem[0000000030081410] = fff85e66, %l4 = 0000000000fa0000 | |
12558 | swapa [%i2+%o5]0x81,%l4 ! %l4 = 00000000fff85e66 | |
12559 | ! Starting 10 instruction Load Burst | |
12560 | ! Mem[0000000010181410] = 7663a3fa, %l7 = 0000000023e3b300 | |
12561 | lduha [%i6+%o5]0x88,%l7 ! %l7 = 000000000000a3fa | |
12562 | ||
12563 | p0_label_303: | |
12564 | ! Mem[0000000010101410] = ff000000, %l6 = 00000000000000ff | |
12565 | lduha [%i4+%o5]0x80,%l6 ! %l6 = 000000000000ff00 | |
12566 | ! Mem[0000000010181438] = ff000000ffffb7f8, %f8 = ff000000 00000000 | |
12567 | ldda [%i6+0x038]%asi,%f8 ! %f8 = ff000000 ffffb7f8 | |
12568 | ! Mem[0000000010101410] = ff000000edf0a6df, %l2 = 0000000000000000 | |
12569 | ldxa [%i4+%o5]0x80,%l2 ! %l2 = ff000000edf0a6df | |
12570 | ! Mem[0000000030081400] = 000000ff, %l6 = 000000000000ff00 | |
12571 | ldswa [%i2+%g0]0x81,%l6 ! %l6 = 00000000000000ff | |
12572 | ! %l3 = 00000000000000a3, immd = fffffffffffffe2e, %l7 = 000000000000a3fa | |
12573 | mulx %l3,-0x1d2,%l7 ! %l7 = fffffffffffed74a | |
12574 | ! Mem[0000000030081408] = ffff00ff 000000ff, %l2 = edf0a6df, %l3 = 000000a3 | |
12575 | ldda [%i2+%o4]0x81,%l2 ! %l2 = 00000000ffff00ff 00000000000000ff | |
12576 | ! Mem[00000000300c1410] = 00000000, %l7 = fffffffffffed74a | |
12577 | lduba [%i3+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
12578 | ! Mem[0000000030001408] = 76c6c4ff, %l6 = 00000000000000ff | |
12579 | ldsha [%i0+%o4]0x89,%l6 ! %l6 = ffffffffffffc4ff | |
12580 | ! Mem[0000000010141408] = 90ff004e00000000, %l3 = 00000000000000ff | |
12581 | ldxa [%i5+%o4]0x80,%l3 ! %l3 = 90ff004e00000000 | |
12582 | ! Starting 10 instruction Store Burst | |
12583 | ! %l4 = 00000000fff85e66, Mem[00000000100c1430] = 7663a3fa00ff7990 | |
12584 | stx %l4,[%i3+0x030] ! Mem[00000000100c1430] = 00000000fff85e66 | |
12585 | ||
12586 | p0_label_304: | |
12587 | ! %l1 = 000000000000007e, Mem[0000000010001400] = 0000ff00 | |
12588 | stha %l1,[%i0+%g0]0x88 ! Mem[0000000010001400] = 0000007e | |
12589 | ! %l1 = 000000000000007e, Mem[00000000218000c0] = ffca8d82, %asi = 80 | |
12590 | stha %l1,[%o3+0x0c0]%asi ! Mem[00000000218000c0] = 007e8d82 | |
12591 | ! Mem[0000000020800000] = 00008470, %l1 = 000000000000007e | |
12592 | ldstub [%o1+%g0],%l1 ! %l1 = 00000000000000ff | |
12593 | ! Mem[0000000030101408] = 742d0000, %l2 = 00000000ffff00ff | |
12594 | swapa [%i4+%o4]0x89,%l2 ! %l2 = 00000000742d0000 | |
12595 | ! Mem[00000000211c0000] = 7cff1a4c, %l4 = 00000000fff85e66 | |
12596 | ldstub [%o2+%g0],%l4 ! %l4 = 0000007c000000ff | |
12597 | ! Mem[0000000030141408] = 00000090, %l1 = 0000000000000000 | |
12598 | swapa [%i5+%o4]0x81,%l1 ! %l1 = 0000000000000090 | |
12599 | ! Mem[0000000010141408] = 90ff004e, %l2 = 00000000742d0000 | |
12600 | ldstuba [%i5+%o4]0x80,%l2 ! %l2 = 00000090000000ff | |
12601 | ! Mem[0000000010081410] = 0000ff39, %l1 = 0000000000000090 | |
12602 | swapa [%i2+%o5]0x80,%l1 ! %l1 = 000000000000ff39 | |
12603 | ! %f30 = 000000ff ffff0000, Mem[00000000100c1408] = ff0000ff 0000ffff | |
12604 | std %f30,[%i3+%o4] ! Mem[00000000100c1408] = 000000ff ffff0000 | |
12605 | ! Starting 10 instruction Load Burst | |
12606 | ! Mem[0000000010181410] = 7663a3fa, %l4 = 000000000000007c | |
12607 | lduba [%i6+%o5]0x88,%l4 ! %l4 = 00000000000000fa | |
12608 | ||
12609 | p0_label_305: | |
12610 | ! Mem[0000000030181400] = 00000000, %f14 = 00000000 | |
12611 | lda [%i6+%g0]0x81,%f14 ! %f14 = 00000000 | |
12612 | ! Mem[00000000211c0000] = ffff1a4c, %l5 = ffffffffffffffff | |
12613 | ldsh [%o2+%g0],%l5 ! %l5 = ffffffffffffffff | |
12614 | ! Mem[0000000010101400] = 00000000, %l0 = 0000000000000000 | |
12615 | lduba [%i4+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
12616 | ! Mem[0000000010101400] = 000000ff 00000000, %l0 = 00000000, %l1 = 0000ff39 | |
12617 | ldda [%i4+%g0]0x88,%l0 ! %l0 = 0000000000000000 00000000000000ff | |
12618 | ! Mem[0000000030181408] = 90ff0f9effffc4fc, %f26 = 0334c4d1 0000ff00 | |
12619 | ldda [%i6+%o4]0x81,%f26 ! %f26 = 90ff0f9e ffffc4fc | |
12620 | ! Mem[0000000010101410] = ff000000 edf0a6df, %l0 = 00000000, %l1 = 000000ff | |
12621 | ldd [%i4+%o5],%l0 ! %l0 = 00000000ff000000 00000000edf0a6df | |
12622 | ! Mem[0000000010101400] = 00000000, %l2 = 0000000000000090 | |
12623 | ldswa [%i4+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
12624 | ! Mem[0000000010101410] = ff000000, %l2 = 0000000000000000 | |
12625 | lduba [%i4+%o5]0x80,%l2 ! %l2 = 00000000000000ff | |
12626 | ! Mem[0000000030041400] = 000000ff, %l0 = 00000000ff000000 | |
12627 | lduha [%i1+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
12628 | ! Starting 10 instruction Store Burst | |
12629 | ! %l1 = 00000000edf0a6df, Mem[00000000201c0001] = 37ab9457 | |
12630 | stb %l1,[%o0+0x001] ! Mem[00000000201c0000] = 37df9457 | |
12631 | ||
12632 | ! Check Point 61 for processor 0 | |
12633 | ||
12634 | set p0_check_pt_data_61,%g4 | |
12635 | rd %ccr,%g5 ! %g5 = 44 | |
12636 | ldx [%g4+0x08],%g2 | |
12637 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
12638 | bne %xcc,p0_reg_check_fail0 | |
12639 | mov 0xee0,%g1 | |
12640 | ldx [%g4+0x10],%g2 | |
12641 | cmp %l1,%g2 ! %l1 = 00000000edf0a6df | |
12642 | bne %xcc,p0_reg_check_fail1 | |
12643 | mov 0xee1,%g1 | |
12644 | ldx [%g4+0x18],%g2 | |
12645 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
12646 | bne %xcc,p0_reg_check_fail2 | |
12647 | mov 0xee2,%g1 | |
12648 | ldx [%g4+0x20],%g2 | |
12649 | cmp %l3,%g2 ! %l3 = 90ff004e00000000 | |
12650 | bne %xcc,p0_reg_check_fail3 | |
12651 | mov 0xee3,%g1 | |
12652 | ldx [%g4+0x28],%g2 | |
12653 | cmp %l4,%g2 ! %l4 = 00000000000000fa | |
12654 | bne %xcc,p0_reg_check_fail4 | |
12655 | mov 0xee4,%g1 | |
12656 | ldx [%g4+0x30],%g2 | |
12657 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
12658 | bne %xcc,p0_reg_check_fail5 | |
12659 | mov 0xee5,%g1 | |
12660 | ldx [%g4+0x38],%g2 | |
12661 | cmp %l6,%g2 ! %l6 = ffffffffffffc4ff | |
12662 | bne %xcc,p0_reg_check_fail6 | |
12663 | mov 0xee6,%g1 | |
12664 | ldx [%g4+0x40],%g2 | |
12665 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
12666 | bne %xcc,p0_reg_check_fail7 | |
12667 | mov 0xee7,%g1 | |
12668 | ldx [%g4+0x48],%g3 | |
12669 | std %f0,[%g4] | |
12670 | ldx [%g4],%g2 | |
12671 | cmp %g3,%g2 ! %f0 = fff85e66 000000ff | |
12672 | bne %xcc,p0_freg_check_fail | |
12673 | mov 0xf00,%g1 | |
12674 | ldx [%g4+0x50],%g3 | |
12675 | std %f2,[%g4] | |
12676 | ldx [%g4],%g2 | |
12677 | cmp %g3,%g2 ! %f2 = 00000000 000000ff | |
12678 | bne %xcc,p0_freg_check_fail | |
12679 | mov 0xf02,%g1 | |
12680 | ldx [%g4+0x58],%g3 | |
12681 | std %f6,[%g4] | |
12682 | ldx [%g4],%g2 | |
12683 | cmp %g3,%g2 ! %f6 = fffffff8 00000000 | |
12684 | bne %xcc,p0_freg_check_fail | |
12685 | mov 0xf06,%g1 | |
12686 | ldx [%g4+0x60],%g3 | |
12687 | std %f8,[%g4] | |
12688 | ldx [%g4],%g2 | |
12689 | cmp %g3,%g2 ! %f8 = ff000000 ffffb7f8 | |
12690 | bne %xcc,p0_freg_check_fail | |
12691 | mov 0xf08,%g1 | |
12692 | ldx [%g4+0x68],%g3 | |
12693 | std %f14,[%g4] | |
12694 | ldx [%g4],%g2 | |
12695 | cmp %g3,%g2 ! %f14 = 00000000 000000ff | |
12696 | bne %xcc,p0_freg_check_fail | |
12697 | mov 0xf14,%g1 | |
12698 | ldx [%g4+0x70],%g3 | |
12699 | std %f24,[%g4] | |
12700 | ldx [%g4],%g2 | |
12701 | cmp %g3,%g2 ! %f24 = 000000ff ffffffff | |
12702 | bne %xcc,p0_freg_check_fail | |
12703 | mov 0xf24,%g1 | |
12704 | ldx [%g4+0x78],%g3 | |
12705 | std %f26,[%g4] | |
12706 | ldx [%g4],%g2 | |
12707 | cmp %g3,%g2 ! %f26 = 90ff0f9e ffffc4fc | |
12708 | bne %xcc,p0_freg_check_fail | |
12709 | mov 0xf26,%g1 | |
12710 | ||
12711 | ! Check Point 61 completed | |
12712 | ||
12713 | ||
12714 | p0_label_306: | |
12715 | ! %l2 = 00000000000000ff, Mem[0000000010181410] = faa36376 | |
12716 | stwa %l2,[%i6+%o5]0x80 ! Mem[0000000010181410] = 000000ff | |
12717 | ! %l7 = 0000000000000000, Mem[0000000030081410] = 00fa0000 | |
12718 | stba %l7,[%i2+%o5]0x81 ! Mem[0000000030081410] = 00fa0000 | |
12719 | ! %l1 = 00000000edf0a6df, Mem[0000000030181400] = 00000000 | |
12720 | stha %l1,[%i6+%g0]0x89 ! Mem[0000000030181400] = 0000a6df | |
12721 | ! %f0 = fff85e66 000000ff, %l1 = 00000000edf0a6df | |
12722 | ! Mem[0000000010181418] = 00000037000000ff | |
12723 | add %i6,0x018,%g1 | |
12724 | stda %f0,[%g1+%l1]ASI_PST8_PL ! Mem[0000000010181418] = ff0000006600f8ff | |
12725 | ! %f18 = 23e3b300, Mem[0000000010181410] = ff000000 | |
12726 | sta %f18,[%i6+%o5]0x88 ! Mem[0000000010181410] = 23e3b300 | |
12727 | ! %l6 = ffffffffffffc4ff, Mem[0000000020800040] = ff397379, %asi = 80 | |
12728 | stha %l6,[%o1+0x040]%asi ! Mem[0000000020800040] = c4ff7379 | |
12729 | ! %l7 = 0000000000000000, Mem[0000000010181400] = 12000000 | |
12730 | stba %l7,[%i6+%g0]0x88 ! Mem[0000000010181400] = 12000000 | |
12731 | ! %f18 = 23e3b300 12000000, %l1 = 00000000edf0a6df | |
12732 | ! Mem[00000000300c1400] = ff00000000000000 | |
12733 | stda %f18,[%i3+%l1]ASI_PST8_S ! Mem[00000000300c1400] = 23e3000012000000 | |
12734 | ! %l0 = 000000ff, %l1 = edf0a6df, Mem[0000000010081410] = 00000090 00000000 | |
12735 | std %l0,[%i2+%o5] ! Mem[0000000010081410] = 000000ff edf0a6df | |
12736 | ! Starting 10 instruction Load Burst | |
12737 | ! Mem[0000000010141418] = fffffff8, %l7 = 0000000000000000 | |
12738 | lduh [%i5+0x018],%l7 ! %l7 = 000000000000ffff | |
12739 | ||
12740 | p0_label_307: | |
12741 | ! Mem[0000000010141408] = 00000000 4e00ffff, %l2 = 000000ff, %l3 = 00000000 | |
12742 | ldda [%i5+%o4]0x88,%l2 ! %l2 = 000000004e00ffff 0000000000000000 | |
12743 | ! Mem[0000000030101400] = 00000000, %l6 = ffffffffffffc4ff | |
12744 | ldsha [%i4+%g0]0x89,%l6 ! %l6 = 0000000000000000 | |
12745 | ! Mem[0000000010081408] = 00ffffffffffffff, %f10 = 10ac7b59 7d307e94 | |
12746 | ldda [%i2+%o4]0x80,%f10 ! %f10 = 00ffffff ffffffff | |
12747 | membar #Sync ! Added by membar checker (50) | |
12748 | ! Mem[0000000010181400] = 00000012 00b3e323 90ff0000 000000ff | |
12749 | ! Mem[0000000010181410] = 00b3e323 665ef8ff ff000000 6600f8ff | |
12750 | ! Mem[0000000010181420] = 7a0000ff ff000000 ff000000 00000000 | |
12751 | ! Mem[0000000010181430] = 10ac7b59 3eda2778 ff000000 ffffb7f8 | |
12752 | ldda [%i6]ASI_BLK_PL,%f0 ! Block Load from 0000000010181400 | |
12753 | ! Mem[00000000201c0000] = 37df9457, %l5 = ffffffffffffffff | |
12754 | ldsh [%o0+%g0],%l5 ! %l5 = 00000000000037df | |
12755 | ! Mem[0000000010181430] = 10ac7b59 3eda2778, %l2 = 4e00ffff, %l3 = 00000000 | |
12756 | ldda [%i6+0x030]%asi,%l2 ! %l2 = 0000000010ac7b59 000000003eda2778 | |
12757 | ! Mem[0000000030001408] = ffc4c676, %l1 = 00000000edf0a6df | |
12758 | ldsha [%i0+%o4]0x81,%l1 ! %l1 = ffffffffffffffc4 | |
12759 | ! Mem[0000000030001408] = ffc4c676, %l3 = 000000003eda2778 | |
12760 | lduba [%i0+%o4]0x81,%l3 ! %l3 = 00000000000000ff | |
12761 | ! Mem[0000000010081400] = 0000ffff 000000ff 00ffffff ffffffff | |
12762 | ! Mem[0000000010081410] = 000000ff edf0a6df d6ba79b1 00000000 | |
12763 | ! Mem[0000000010081420] = 7d30ff94 000000ff 00000090 00ff0000 | |
12764 | ! Mem[0000000010081430] = 000000fc fffeffff ff000000 00000000 | |
12765 | ldda [%i2]ASI_BLK_P,%f16 ! Block Load from 0000000010081400 | |
12766 | ! Starting 10 instruction Store Burst | |
12767 | ! Mem[0000000010081428] = 00000090, %l4 = 00000000000000fa | |
12768 | swap [%i2+0x028],%l4 ! %l4 = 0000000000000090 | |
12769 | ||
12770 | p0_label_308: | |
12771 | membar #Sync ! Added by membar checker (51) | |
12772 | ! %f14 = f8b7ffff, Mem[0000000010081418] = d6ba79b1 | |
12773 | st %f14,[%i2+0x018] ! Mem[0000000010081418] = f8b7ffff | |
12774 | ! %f24 = 7d30ff94, Mem[0000000010001400] = 0000007e | |
12775 | sta %f24,[%i0+%g0]0x88 ! Mem[0000000010001400] = 7d30ff94 | |
12776 | ! %l4 = 0000000000000090, Mem[000000001008140e] = ffffffff, %asi = 80 | |
12777 | stha %l4,[%i2+0x00e]%asi ! Mem[000000001008140c] = ffff0090 | |
12778 | ! %f8 = 000000ff ff00007a, %l0 = 00000000000000ff | |
12779 | ! Mem[0000000010141430] = 0000000000000000 | |
12780 | add %i5,0x030,%g1 | |
12781 | stda %f8,[%g1+%l0]ASI_PST8_PL ! Mem[0000000010141430] = 7a0000ffff000000 | |
12782 | ! %l6 = 0000000000000000, Mem[0000000010181410] = 00b3e323 | |
12783 | stha %l6,[%i6+%o5]0x80 ! Mem[0000000010181410] = 0000e323 | |
12784 | ! Mem[0000000010181400] = 00000012, %l6 = 0000000000000000 | |
12785 | swap [%i6+%g0],%l6 ! %l6 = 0000000000000012 | |
12786 | ! %l7 = 000000000000ffff, Mem[0000000010141410] = ff194990 | |
12787 | stba %l7,[%i5+%o5]0x88 ! Mem[0000000010141410] = ff1949ff | |
12788 | ! %f0 = 23e3b300 12000000, Mem[0000000010081408] = 00ffffff ffff0090 | |
12789 | stda %f0 ,[%i2+%o4]0x80 ! Mem[0000000010081408] = 23e3b300 12000000 | |
12790 | ! Mem[0000000030081400] = ff000000, %l1 = ffffffffffffffc4 | |
12791 | ldstuba [%i2+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
12792 | ! Starting 10 instruction Load Burst | |
12793 | ! Mem[0000000010041400] = 00000012, %l4 = 0000000000000090 | |
12794 | lduha [%i1+%g0]0x88,%l4 ! %l4 = 0000000000000012 | |
12795 | ||
12796 | p0_label_309: | |
12797 | ! Mem[0000000010101400] = 00000000, %l0 = 00000000000000ff | |
12798 | ldsha [%i4+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
12799 | ! Mem[0000000030141408] = 00000000, %l0 = 0000000000000000 | |
12800 | lduwa [%i5+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
12801 | ! Mem[0000000010001408] = 00000090ff390000, %l0 = 0000000000000000 | |
12802 | ldxa [%i0+%o4]0x80,%l0 ! %l0 = 00000090ff390000 | |
12803 | ! Mem[000000001018141c] = 6600f8ff, %l3 = 00000000000000ff | |
12804 | lduh [%i6+0x01e],%l3 ! %l3 = 000000000000f8ff | |
12805 | ! Mem[0000000030001410] = ff000000ab3d79ff, %l7 = 000000000000ffff | |
12806 | ldxa [%i0+%o5]0x89,%l7 ! %l7 = ff000000ab3d79ff | |
12807 | ! Mem[0000000030041410] = 000000ff, %l5 = 00000000000037df | |
12808 | ldsha [%i1+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
12809 | ! Mem[0000000010181400] = 23e3b30000000000, %l2 = 0000000010ac7b59 | |
12810 | ldxa [%i6+%g0]0x88,%l2 ! %l2 = 23e3b30000000000 | |
12811 | ! Mem[0000000010101410] = ff000000, %f11 = 000000ff | |
12812 | lda [%i4+%o5]0x80,%f11 ! %f11 = ff000000 | |
12813 | ! Mem[0000000030001410] = ff793dab 000000ff, %l2 = 00000000, %l3 = 0000f8ff | |
12814 | ldda [%i0+%o5]0x81,%l2 ! %l2 = 00000000ff793dab 00000000000000ff | |
12815 | ! Starting 10 instruction Store Burst | |
12816 | ! %l7 = ff000000ab3d79ff, Mem[0000000030181408] = fcc4ffff9e0fff90 | |
12817 | stxa %l7,[%i6+%o4]0x89 ! Mem[0000000030181408] = ff000000ab3d79ff | |
12818 | ||
12819 | p0_label_310: | |
12820 | ! %f14 = f8b7ffff 000000ff, Mem[00000000100c1408] = ff000000 0000ffff | |
12821 | stda %f14,[%i3+%o4]0x88 ! Mem[00000000100c1408] = f8b7ffff 000000ff | |
12822 | ! %l4 = 0000000000000012, Mem[00000000300c1400] = 23e30000 | |
12823 | stha %l4,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00120000 | |
12824 | ! %f1 = 12000000, Mem[0000000010001410] = 000000ff | |
12825 | sta %f1 ,[%i0+%o5]0x88 ! Mem[0000000010001410] = 12000000 | |
12826 | ! Mem[0000000030181410] = 000000ff, %l4 = 0000000000000012 | |
12827 | ldstuba [%i6+%o5]0x81,%l4 ! %l4 = 00000000000000ff | |
12828 | ! Mem[0000000030141400] = 90793dab, %l1 = 0000000000000000 | |
12829 | swapa [%i5+%g0]0x89,%l1 ! %l1 = 0000000090793dab | |
12830 | ! Mem[0000000030101408] = ff00ffff, %l5 = 0000000000000000 | |
12831 | ldstuba [%i4+%o4]0x81,%l5 ! %l5 = 000000ff000000ff | |
12832 | ! Mem[0000000010141420] = 9c156421, %l5 = 00000000000000ff | |
12833 | swap [%i5+0x020],%l5 ! %l5 = 000000009c156421 | |
12834 | ! %l2 = 00000000ff793dab, Mem[0000000030181410] = ff0000ff | |
12835 | stba %l2,[%i6+%o5]0x89 ! Mem[0000000030181410] = ff0000ab | |
12836 | ! %l7 = ff000000ab3d79ff, Mem[0000000030181408] = ff793dab | |
12837 | stwa %l7,[%i6+%o4]0x81 ! Mem[0000000030181408] = ab3d79ff | |
12838 | ! Starting 10 instruction Load Burst | |
12839 | ! Mem[00000000100c1408] = ff000000, %l7 = ff000000ab3d79ff | |
12840 | lduwa [%i3+%o4]0x80,%l7 ! %l7 = 00000000ff000000 | |
12841 | ||
12842 | ! Check Point 62 for processor 0 | |
12843 | ||
12844 | set p0_check_pt_data_62,%g4 | |
12845 | rd %ccr,%g5 ! %g5 = 44 | |
12846 | ldx [%g4+0x08],%g2 | |
12847 | cmp %l0,%g2 ! %l0 = 00000090ff390000 | |
12848 | bne %xcc,p0_reg_check_fail0 | |
12849 | mov 0xee0,%g1 | |
12850 | ldx [%g4+0x10],%g2 | |
12851 | cmp %l1,%g2 ! %l1 = 0000000090793dab | |
12852 | bne %xcc,p0_reg_check_fail1 | |
12853 | mov 0xee1,%g1 | |
12854 | ldx [%g4+0x18],%g2 | |
12855 | cmp %l2,%g2 ! %l2 = 00000000ff793dab | |
12856 | bne %xcc,p0_reg_check_fail2 | |
12857 | mov 0xee2,%g1 | |
12858 | ldx [%g4+0x20],%g2 | |
12859 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
12860 | bne %xcc,p0_reg_check_fail3 | |
12861 | mov 0xee3,%g1 | |
12862 | ldx [%g4+0x28],%g2 | |
12863 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
12864 | bne %xcc,p0_reg_check_fail4 | |
12865 | mov 0xee4,%g1 | |
12866 | ldx [%g4+0x30],%g2 | |
12867 | cmp %l5,%g2 ! %l5 = 000000009c156421 | |
12868 | bne %xcc,p0_reg_check_fail5 | |
12869 | mov 0xee5,%g1 | |
12870 | ldx [%g4+0x38],%g2 | |
12871 | cmp %l6,%g2 ! %l6 = 0000000000000012 | |
12872 | bne %xcc,p0_reg_check_fail6 | |
12873 | mov 0xee6,%g1 | |
12874 | ldx [%g4+0x40],%g2 | |
12875 | cmp %l7,%g2 ! %l7 = 00000000ff000000 | |
12876 | bne %xcc,p0_reg_check_fail7 | |
12877 | mov 0xee7,%g1 | |
12878 | ldx [%g4+0x48],%g3 | |
12879 | std %f0,[%g4] | |
12880 | ldx [%g4],%g2 | |
12881 | cmp %g3,%g2 ! %f0 = 23e3b300 12000000 | |
12882 | bne %xcc,p0_freg_check_fail | |
12883 | mov 0xf00,%g1 | |
12884 | ldx [%g4+0x50],%g3 | |
12885 | std %f2,[%g4] | |
12886 | ldx [%g4],%g2 | |
12887 | cmp %g3,%g2 ! %f2 = ff000000 0000ff90 | |
12888 | bne %xcc,p0_freg_check_fail | |
12889 | mov 0xf02,%g1 | |
12890 | ldx [%g4+0x58],%g3 | |
12891 | std %f4,[%g4] | |
12892 | ldx [%g4],%g2 | |
12893 | cmp %g3,%g2 ! %f4 = fff85e66 23e3b300 | |
12894 | bne %xcc,p0_freg_check_fail | |
12895 | mov 0xf04,%g1 | |
12896 | ldx [%g4+0x60],%g3 | |
12897 | std %f6,[%g4] | |
12898 | ldx [%g4],%g2 | |
12899 | cmp %g3,%g2 ! %f6 = fff80066 000000ff | |
12900 | bne %xcc,p0_freg_check_fail | |
12901 | mov 0xf06,%g1 | |
12902 | ldx [%g4+0x68],%g3 | |
12903 | std %f8,[%g4] | |
12904 | ldx [%g4],%g2 | |
12905 | cmp %g3,%g2 ! %f8 = 000000ff ff00007a | |
12906 | bne %xcc,p0_freg_check_fail | |
12907 | mov 0xf08,%g1 | |
12908 | ldx [%g4+0x70],%g3 | |
12909 | std %f10,[%g4] | |
12910 | ldx [%g4],%g2 | |
12911 | cmp %g3,%g2 ! %f10 = 00000000 ff000000 | |
12912 | bne %xcc,p0_freg_check_fail | |
12913 | mov 0xf10,%g1 | |
12914 | ldx [%g4+0x78],%g3 | |
12915 | std %f12,[%g4] | |
12916 | ldx [%g4],%g2 | |
12917 | cmp %g3,%g2 ! %f12 = 7827da3e 597bac10 | |
12918 | bne %xcc,p0_freg_check_fail | |
12919 | mov 0xf12,%g1 | |
12920 | ldx [%g4+0x80],%g3 | |
12921 | std %f14,[%g4] | |
12922 | ldx [%g4],%g2 | |
12923 | cmp %g3,%g2 ! %f14 = f8b7ffff 000000ff | |
12924 | bne %xcc,p0_freg_check_fail | |
12925 | mov 0xf14,%g1 | |
12926 | ldx [%g4+0x88],%g3 | |
12927 | std %f16,[%g4] | |
12928 | ldx [%g4],%g2 | |
12929 | cmp %g3,%g2 ! %f16 = 0000ffff 000000ff | |
12930 | bne %xcc,p0_freg_check_fail | |
12931 | mov 0xf16,%g1 | |
12932 | ldx [%g4+0x90],%g3 | |
12933 | std %f18,[%g4] | |
12934 | ldx [%g4],%g2 | |
12935 | cmp %g3,%g2 ! %f18 = 00ffffff ffffffff | |
12936 | bne %xcc,p0_freg_check_fail | |
12937 | mov 0xf18,%g1 | |
12938 | ldx [%g4+0x98],%g3 | |
12939 | std %f20,[%g4] | |
12940 | ldx [%g4],%g2 | |
12941 | cmp %g3,%g2 ! %f20 = 000000ff edf0a6df | |
12942 | bne %xcc,p0_freg_check_fail | |
12943 | mov 0xf20,%g1 | |
12944 | ldx [%g4+0xa0],%g3 | |
12945 | std %f22,[%g4] | |
12946 | ldx [%g4],%g2 | |
12947 | cmp %g3,%g2 ! %f22 = d6ba79b1 00000000 | |
12948 | bne %xcc,p0_freg_check_fail | |
12949 | mov 0xf22,%g1 | |
12950 | ldx [%g4+0xa8],%g3 | |
12951 | std %f24,[%g4] | |
12952 | ldx [%g4],%g2 | |
12953 | cmp %g3,%g2 ! %f24 = 7d30ff94 000000ff | |
12954 | bne %xcc,p0_freg_check_fail | |
12955 | mov 0xf24,%g1 | |
12956 | ldx [%g4+0xb0],%g3 | |
12957 | std %f26,[%g4] | |
12958 | ldx [%g4],%g2 | |
12959 | cmp %g3,%g2 ! %f26 = 00000090 00ff0000 | |
12960 | bne %xcc,p0_freg_check_fail | |
12961 | mov 0xf26,%g1 | |
12962 | ldx [%g4+0xb8],%g3 | |
12963 | std %f28,[%g4] | |
12964 | ldx [%g4],%g2 | |
12965 | cmp %g3,%g2 ! %f28 = 000000fc fffeffff | |
12966 | bne %xcc,p0_freg_check_fail | |
12967 | mov 0xf28,%g1 | |
12968 | ldx [%g4+0xc0],%g3 | |
12969 | std %f30,[%g4] | |
12970 | ldx [%g4],%g2 | |
12971 | cmp %g3,%g2 ! %f30 = ff000000 00000000 | |
12972 | bne %xcc,p0_freg_check_fail | |
12973 | mov 0xf30,%g1 | |
12974 | ||
12975 | ! Check Point 62 completed | |
12976 | ||
12977 | ||
12978 | p0_label_311: | |
12979 | ! Mem[0000000030001408] = 0000ff0076c6c4ff, %l0 = 00000090ff390000 | |
12980 | ldxa [%i0+%o4]0x89,%l0 ! %l0 = 0000ff0076c6c4ff | |
12981 | ! Mem[0000000030101408] = ff00ffff0000007c, %f16 = 0000ffff 000000ff | |
12982 | ldda [%i4+%o4]0x81,%f16 ! %f16 = ff00ffff 0000007c | |
12983 | ! Mem[0000000010181434] = 3eda2778, %l2 = 00000000ff793dab | |
12984 | lduw [%i6+0x034],%l2 ! %l2 = 000000003eda2778 | |
12985 | ! Mem[0000000010001410] = 12000000, %l4 = 0000000000000000 | |
12986 | lduha [%i0+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
12987 | ! Mem[0000000010081408] = 00b3e323, %f27 = 00ff0000 | |
12988 | lda [%i2+%o4]0x88,%f27 ! %f27 = 00b3e323 | |
12989 | ! Mem[0000000010001410] = 00000012, %f13 = 597bac10 | |
12990 | lda [%i0+%o5]0x80,%f13 ! %f13 = 00000012 | |
12991 | ! Mem[0000000020800000] = ff008470, %l0 = 0000ff0076c6c4ff | |
12992 | lduha [%o1+0x000]%asi,%l0 ! %l0 = 000000000000ff00 | |
12993 | ! Mem[0000000010041408] = 00000000, %f1 = 12000000 | |
12994 | lda [%i1+%o4]0x80,%f1 ! %f1 = 00000000 | |
12995 | ! Mem[0000000030001400] = 7663a3fa53d5cb36, %f20 = 000000ff edf0a6df | |
12996 | ldda [%i0+%g0]0x81,%f20 ! %f20 = 7663a3fa 53d5cb36 | |
12997 | ! Starting 10 instruction Store Burst | |
12998 | ! Mem[0000000030001400] = 7663a3fa, %l1 = 0000000090793dab | |
12999 | ldstuba [%i0+%g0]0x81,%l1 ! %l1 = 00000076000000ff | |
13000 | ||
13001 | p0_label_312: | |
13002 | ! %f0 = 23e3b300 00000000, %l3 = 00000000000000ff | |
13003 | ! Mem[0000000030041428] = ff009cffd1c43403 | |
13004 | add %i1,0x028,%g1 | |
13005 | stda %f0,[%g1+%l3]ASI_PST16_SL ! Mem[0000000030041428] = 0000000000b3e323 | |
13006 | ! %l6 = 00000012, %l7 = ff000000, Mem[0000000030001410] = ab3d79ff ff000000 | |
13007 | stda %l6,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00000012 ff000000 | |
13008 | ! %f2 = ff000000 0000ff90, Mem[0000000030001410] = 00000012 ff000000 | |
13009 | stda %f2 ,[%i0+%o5]0x89 ! Mem[0000000030001410] = ff000000 0000ff90 | |
13010 | ! %l5 = 000000009c156421, Mem[0000000030001410] = 90ff0000000000ff | |
13011 | stxa %l5,[%i0+%o5]0x81 ! Mem[0000000030001410] = 000000009c156421 | |
13012 | ! Mem[0000000030041408] = 00ff0000, %l3 = 00000000000000ff | |
13013 | swapa [%i1+%o4]0x81,%l3 ! %l3 = 0000000000ff0000 | |
13014 | ! Mem[0000000010141438] = fcc4ff76, %l4 = 0000000000000000, %asi = 80 | |
13015 | swapa [%i5+0x038]%asi,%l4 ! %l4 = 00000000fcc4ff76 | |
13016 | ! Mem[0000000010001424] = 76c6c4ff, %l3 = 00ff0000, %l1 = 00000076 | |
13017 | add %i0,0x24,%g1 | |
13018 | casa [%g1]0x80,%l3,%l1 ! %l1 = 0000000076c6c4ff | |
13019 | ! %f0 = 23e3b300 00000000, %l0 = 000000000000ff00 | |
13020 | ! Mem[00000000300c1418] = 2400c6760000fff8 | |
13021 | add %i3,0x018,%g1 | |
13022 | stda %f0,[%g1+%l0]ASI_PST8_S ! Mem[00000000300c1418] = 2400c6760000fff8 | |
13023 | ! %l1 = 0000000076c6c4ff, Mem[0000000010181410] = 23e30000 | |
13024 | stwa %l1,[%i6+%o5]0x88 ! Mem[0000000010181410] = 76c6c4ff | |
13025 | ! Starting 10 instruction Load Burst | |
13026 | ! Mem[0000000010041428] = b179bad6, %l2 = 000000003eda2778 | |
13027 | ldswa [%i1+0x028]%asi,%l2 ! %l2 = ffffffffb179bad6 | |
13028 | ||
13029 | p0_label_313: | |
13030 | ! Mem[0000000030101410] = ab3d79ff, %l5 = 000000009c156421 | |
13031 | lduha [%i4+%o5]0x89,%l5 ! %l5 = 00000000000079ff | |
13032 | ! Mem[00000000100c1410] = 0000ffff, %f3 = 0000ff90 | |
13033 | lda [%i3+%o5]0x88,%f3 ! %f3 = 0000ffff | |
13034 | ! Mem[0000000010001408] = 90000000, %f1 = 00000000 | |
13035 | lda [%i0+%o4]0x88,%f1 ! %f1 = 90000000 | |
13036 | ! Mem[0000000030081400] = ff0000ff, %l2 = ffffffffb179bad6 | |
13037 | lduha [%i2+%g0]0x81,%l2 ! %l2 = 000000000000ff00 | |
13038 | ! Mem[0000000010101410] = ff000000edf0a6df, %l3 = 0000000000ff0000 | |
13039 | ldx [%i4+%o5],%l3 ! %l3 = ff000000edf0a6df | |
13040 | ! Mem[0000000030041410] = 000000ffffffffff, %l5 = 00000000000079ff | |
13041 | ldxa [%i1+%o5]0x81,%l5 ! %l5 = 000000ffffffffff | |
13042 | ! Mem[00000000100c1400] = ffffffff 00000090, %l6 = 00000012, %l7 = ff000000 | |
13043 | ldda [%i3+0x000]%asi,%l6 ! %l6 = 00000000ffffffff 0000000000000090 | |
13044 | ! Mem[0000000010101410] = ff000000edf0a6df, %f4 = fff85e66 23e3b300 | |
13045 | ldd [%i4+%o5],%f4 ! %f4 = ff000000 edf0a6df | |
13046 | membar #Sync ! Added by membar checker (52) | |
13047 | ! Mem[0000000030041400] = ff000000 ffffff00 000000ff 00000000 | |
13048 | ! Mem[0000000030041410] = 000000ff ffffffff 00000000 ff0000ff | |
13049 | ! Mem[0000000030041420] = 00000000 76c6c4ff 00000000 00b3e323 | |
13050 | ! Mem[0000000030041430] = fc734517 00000000 0000ffff ff000000 | |
13051 | ldda [%i1]ASI_BLK_AIUS,%f16 ! Block Load from 0000000030041400 | |
13052 | ! Starting 10 instruction Store Burst | |
13053 | ! %l5 = 000000ffffffffff, Mem[0000000010001410] = 12000000 | |
13054 | stba %l5,[%i0+%o5]0x88 ! Mem[0000000010001410] = 120000ff | |
13055 | ||
13056 | p0_label_314: | |
13057 | ! %l1 = 0000000076c6c4ff, Mem[00000000100c1400] = 90000000ffffffff | |
13058 | stxa %l1,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 0000000076c6c4ff | |
13059 | ! %f10 = 00000000, Mem[0000000030141400] = 00000000 | |
13060 | sta %f10,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000 | |
13061 | ! Mem[0000000030101400] = 00000000, %l5 = 000000ffffffffff | |
13062 | ldstuba [%i4+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
13063 | ! %l4 = 00000000fcc4ff76, Mem[0000000010181400] = 0000000000b3e323, %asi = 80 | |
13064 | stxa %l4,[%i6+0x000]%asi ! Mem[0000000010181400] = 00000000fcc4ff76 | |
13065 | ! %l4 = 00000000fcc4ff76, Mem[0000000030141408] = 00000000 | |
13066 | stba %l4,[%i5+%o4]0x89 ! Mem[0000000030141408] = 00000076 | |
13067 | ! Mem[0000000030141410] = fcf8ffff, %l4 = 00000000fcc4ff76 | |
13068 | swapa [%i5+%o5]0x89,%l4 ! %l4 = 00000000fcf8ffff | |
13069 | ! Mem[0000000010041410] = 00000000, %l5 = 0000000000000000 | |
13070 | swapa [%i1+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
13071 | ! Mem[000000001010140c] = 00000000, %l4 = 00000000fcf8ffff | |
13072 | swap [%i4+0x00c],%l4 ! %l4 = 0000000000000000 | |
13073 | ! Mem[0000000010101408] = 00000000, %l0 = 000000000000ff00 | |
13074 | ldstuba [%i4+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
13075 | ! Starting 10 instruction Load Burst | |
13076 | ! Mem[0000000010181400] = 00000000, %f0 = 23e3b300 | |
13077 | lda [%i6+%g0]0x88,%f0 ! %f0 = 00000000 | |
13078 | ||
13079 | p0_label_315: | |
13080 | ! Mem[0000000010141410] = ff1949ff, %l0 = 0000000000000000 | |
13081 | ldsba [%i5+%o5]0x88,%l0 ! %l0 = ffffffffffffffff | |
13082 | ! Mem[0000000010041418] = 000000ff, %l6 = 00000000ffffffff | |
13083 | ldsh [%i1+0x018],%l6 ! %l6 = 0000000000000000 | |
13084 | ! Mem[0000000010041400] = 12000000, %l2 = 000000000000ff00 | |
13085 | lduba [%i1+%g0]0x80,%l2 ! %l2 = 0000000000000012 | |
13086 | ! Mem[0000000030141408] = 00000076, %f15 = 000000ff | |
13087 | lda [%i5+%o4]0x89,%f15 ! %f15 = 00000076 | |
13088 | ! Mem[0000000010081408] = 23e3b300 12000000, %l4 = 00000000, %l5 = 00000000 | |
13089 | ldda [%i2+%o4]0x80,%l4 ! %l4 = 0000000023e3b300 0000000012000000 | |
13090 | ! Mem[0000000030101408] = 7c000000 ffff00ff, %l6 = 00000000, %l7 = 00000090 | |
13091 | ldda [%i4+%o4]0x89,%l6 ! %l6 = 00000000ffff00ff 000000007c000000 | |
13092 | ! Mem[0000000030081400] = 000000ffff0000ff, %l2 = 0000000000000012 | |
13093 | ldxa [%i2+%g0]0x89,%l2 ! %l2 = 000000ffff0000ff | |
13094 | ! Mem[0000000030001410] = 00000000, %l7 = 000000007c000000 | |
13095 | lduha [%i0+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
13096 | ! Mem[0000000030041408] = 000000ff, %l7 = 0000000000000000 | |
13097 | lduba [%i1+%o4]0x81,%l7 ! %l7 = 0000000000000000 | |
13098 | ! Starting 10 instruction Store Burst | |
13099 | ! Mem[00000000100c1430] = 00000000, %l0 = ffffffffffffffff, %asi = 80 | |
13100 | swapa [%i3+0x030]%asi,%l0 ! %l0 = 0000000000000000 | |
13101 | ||
13102 | ! Check Point 63 for processor 0 | |
13103 | ||
13104 | set p0_check_pt_data_63,%g4 | |
13105 | rd %ccr,%g5 ! %g5 = 44 | |
13106 | ldx [%g4+0x08],%g2 | |
13107 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
13108 | bne %xcc,p0_reg_check_fail0 | |
13109 | mov 0xee0,%g1 | |
13110 | ldx [%g4+0x10],%g2 | |
13111 | cmp %l1,%g2 ! %l1 = 0000000076c6c4ff | |
13112 | bne %xcc,p0_reg_check_fail1 | |
13113 | mov 0xee1,%g1 | |
13114 | ldx [%g4+0x18],%g2 | |
13115 | cmp %l2,%g2 ! %l2 = 000000ffff0000ff | |
13116 | bne %xcc,p0_reg_check_fail2 | |
13117 | mov 0xee2,%g1 | |
13118 | ldx [%g4+0x20],%g2 | |
13119 | cmp %l3,%g2 ! %l3 = ff000000edf0a6df | |
13120 | bne %xcc,p0_reg_check_fail3 | |
13121 | mov 0xee3,%g1 | |
13122 | ldx [%g4+0x28],%g2 | |
13123 | cmp %l4,%g2 ! %l4 = 0000000023e3b300 | |
13124 | bne %xcc,p0_reg_check_fail4 | |
13125 | mov 0xee4,%g1 | |
13126 | ldx [%g4+0x30],%g2 | |
13127 | cmp %l5,%g2 ! %l5 = 0000000012000000 | |
13128 | bne %xcc,p0_reg_check_fail5 | |
13129 | mov 0xee5,%g1 | |
13130 | ldx [%g4+0x38],%g2 | |
13131 | cmp %l6,%g2 ! %l6 = 00000000ffff00ff | |
13132 | bne %xcc,p0_reg_check_fail6 | |
13133 | mov 0xee6,%g1 | |
13134 | ldx [%g4+0x40],%g2 | |
13135 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
13136 | bne %xcc,p0_reg_check_fail7 | |
13137 | mov 0xee7,%g1 | |
13138 | ldx [%g4+0x48],%g3 | |
13139 | std %f0,[%g4] | |
13140 | ldx [%g4],%g2 | |
13141 | cmp %g3,%g2 ! %f0 = 00000000 90000000 | |
13142 | bne %xcc,p0_freg_check_fail | |
13143 | mov 0xf00,%g1 | |
13144 | ldx [%g4+0x50],%g3 | |
13145 | std %f2,[%g4] | |
13146 | ldx [%g4],%g2 | |
13147 | cmp %g3,%g2 ! %f2 = ff000000 0000ffff | |
13148 | bne %xcc,p0_freg_check_fail | |
13149 | mov 0xf02,%g1 | |
13150 | ldx [%g4+0x58],%g3 | |
13151 | std %f4,[%g4] | |
13152 | ldx [%g4],%g2 | |
13153 | cmp %g3,%g2 ! %f4 = ff000000 edf0a6df | |
13154 | bne %xcc,p0_freg_check_fail | |
13155 | mov 0xf04,%g1 | |
13156 | ldx [%g4+0x60],%g3 | |
13157 | std %f6,[%g4] | |
13158 | ldx [%g4],%g2 | |
13159 | cmp %g3,%g2 ! %f6 = fff80066 000000ff | |
13160 | bne %xcc,p0_freg_check_fail | |
13161 | mov 0xf06,%g1 | |
13162 | ldx [%g4+0x68],%g3 | |
13163 | std %f12,[%g4] | |
13164 | ldx [%g4],%g2 | |
13165 | cmp %g3,%g2 ! %f12 = 7827da3e 00000012 | |
13166 | bne %xcc,p0_freg_check_fail | |
13167 | mov 0xf12,%g1 | |
13168 | ldx [%g4+0x70],%g3 | |
13169 | std %f14,[%g4] | |
13170 | ldx [%g4],%g2 | |
13171 | cmp %g3,%g2 ! %f14 = f8b7ffff 00000076 | |
13172 | bne %xcc,p0_freg_check_fail | |
13173 | mov 0xf14,%g1 | |
13174 | ldx [%g4+0x78],%g3 | |
13175 | std %f16,[%g4] | |
13176 | ldx [%g4],%g2 | |
13177 | cmp %g3,%g2 ! %f16 = ff000000 ffffff00 | |
13178 | bne %xcc,p0_freg_check_fail | |
13179 | mov 0xf16,%g1 | |
13180 | ldx [%g4+0x80],%g3 | |
13181 | std %f18,[%g4] | |
13182 | ldx [%g4],%g2 | |
13183 | cmp %g3,%g2 ! %f18 = 000000ff 00000000 | |
13184 | bne %xcc,p0_freg_check_fail | |
13185 | mov 0xf18,%g1 | |
13186 | ldx [%g4+0x88],%g3 | |
13187 | std %f20,[%g4] | |
13188 | ldx [%g4],%g2 | |
13189 | cmp %g3,%g2 ! %f20 = 000000ff ffffffff | |
13190 | bne %xcc,p0_freg_check_fail | |
13191 | mov 0xf20,%g1 | |
13192 | ldx [%g4+0x90],%g3 | |
13193 | std %f22,[%g4] | |
13194 | ldx [%g4],%g2 | |
13195 | cmp %g3,%g2 ! %f22 = 00000000 ff0000ff | |
13196 | bne %xcc,p0_freg_check_fail | |
13197 | mov 0xf22,%g1 | |
13198 | ldx [%g4+0x98],%g3 | |
13199 | std %f24,[%g4] | |
13200 | ldx [%g4],%g2 | |
13201 | cmp %g3,%g2 ! %f24 = 00000000 76c6c4ff | |
13202 | bne %xcc,p0_freg_check_fail | |
13203 | mov 0xf24,%g1 | |
13204 | ldx [%g4+0xa0],%g3 | |
13205 | std %f26,[%g4] | |
13206 | ldx [%g4],%g2 | |
13207 | cmp %g3,%g2 ! %f26 = 00000000 00b3e323 | |
13208 | bne %xcc,p0_freg_check_fail | |
13209 | mov 0xf26,%g1 | |
13210 | ldx [%g4+0xa8],%g3 | |
13211 | std %f28,[%g4] | |
13212 | ldx [%g4],%g2 | |
13213 | cmp %g3,%g2 ! %f28 = fc734517 00000000 | |
13214 | bne %xcc,p0_freg_check_fail | |
13215 | mov 0xf28,%g1 | |
13216 | ldx [%g4+0xb0],%g3 | |
13217 | std %f30,[%g4] | |
13218 | ldx [%g4],%g2 | |
13219 | cmp %g3,%g2 ! %f30 = 0000ffff ff000000 | |
13220 | bne %xcc,p0_freg_check_fail | |
13221 | mov 0xf30,%g1 | |
13222 | ||
13223 | ! Check Point 63 completed | |
13224 | ||
13225 | ||
13226 | p0_label_316: | |
13227 | ! %f12 = 7827da3e 00000012, Mem[0000000010081400] = ffff0000 ff000000 | |
13228 | stda %f12,[%i2+%g0]0x88 ! Mem[0000000010081400] = 7827da3e 00000012 | |
13229 | ! %l4 = 0000000023e3b300, Mem[0000000010041410] = 000000ff00000000 | |
13230 | stxa %l4,[%i1+%o5]0x88 ! Mem[0000000010041410] = 0000000023e3b300 | |
13231 | ! %f13 = 00000012, Mem[0000000010141418] = fffffff8 | |
13232 | sta %f13,[%i5+0x018]%asi ! Mem[0000000010141418] = 00000012 | |
13233 | ! %l7 = 0000000000000000, Mem[0000000030181410] = ff0000ab | |
13234 | stwa %l7,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000 | |
13235 | ! %l6 = ffff00ff, %l7 = 00000000, Mem[0000000030081408] = ffff00ff 000000ff | |
13236 | stda %l6,[%i2+%o4]0x81 ! Mem[0000000030081408] = ffff00ff 00000000 | |
13237 | ! %l0 = 00000000, %l1 = 76c6c4ff, Mem[0000000010101400] = 00000000 ff000000 | |
13238 | stda %l0,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00000000 76c6c4ff | |
13239 | ! %l3 = ff000000edf0a6df, Mem[0000000010101408] = ff000000 | |
13240 | stwa %l3,[%i4+%o4]0x80 ! Mem[0000000010101408] = edf0a6df | |
13241 | ! Mem[0000000010081400] = 12000000, %l2 = 000000ffff0000ff | |
13242 | swapa [%i2+%g0]0x80,%l2 ! %l2 = 0000000012000000 | |
13243 | ! Mem[0000000010001408] = 00000090, %l4 = 0000000023e3b300 | |
13244 | ldstuba [%i0+%o4]0x80,%l4 ! %l4 = 00000000000000ff | |
13245 | ! Starting 10 instruction Load Burst | |
13246 | ! Mem[0000000030181400] = 00000000 0000a6df, %l6 = ffff00ff, %l7 = 00000000 | |
13247 | ldda [%i6+%g0]0x89,%l6 ! %l6 = 000000000000a6df 0000000000000000 | |
13248 | ||
13249 | p0_label_317: | |
13250 | ! Mem[0000000010181410] = 76c6c4ff, %l1 = 0000000076c6c4ff | |
13251 | lduwa [%i6+%o5]0x88,%l1 ! %l1 = 0000000076c6c4ff | |
13252 | ! Mem[0000000010081408] = 00000012 00b3e323, %l2 = 12000000, %l3 = edf0a6df | |
13253 | ldda [%i2+%o4]0x88,%l2 ! %l2 = 0000000000b3e323 0000000000000012 | |
13254 | ! Mem[0000000010101400] = 00000000, %l0 = 0000000000000000 | |
13255 | lduwa [%i4+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
13256 | ! Code Fragment 4 | |
13257 | p0_fragment_15: | |
13258 | ! %l0 = 0000000000000000 | |
13259 | setx 0x006c79bfca2d4c61,%g7,%l0 ! %l0 = 006c79bfca2d4c61 | |
13260 | ! %l1 = 0000000076c6c4ff | |
13261 | setx 0x1f81715ffdb18f2b,%g7,%l1 ! %l1 = 1f81715ffdb18f2b | |
13262 | setx 0x7ff8, %g1, %g2 | |
13263 | and %l0, %g2, %l0 | |
13264 | setx 0xffffffff, %g1, %g2 | |
13265 | and %l1, %g2, %l1 | |
13266 | setx 0x100000000, %g1, %g2 | |
13267 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
13268 | ta T_CHANGE_HPRIV | |
13269 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
13270 | ta T_CHANGE_NONHPRIV | |
13271 | ! %l0 = 006c79bfca2d4c61 | |
13272 | setx 0x90b842e7f7c43c44,%g7,%l0 ! %l0 = 90b842e7f7c43c44 | |
13273 | ! %l1 = 1f81715ffdb18f2b | |
13274 | setx 0xfa9a852821e5d66e,%g7,%l1 ! %l1 = fa9a852821e5d66e | |
13275 | ! Mem[0000000030101410] = ab3d79ff, %l6 = 000000000000a6df | |
13276 | ldswa [%i4+%o5]0x89,%l6 ! %l6 = ffffffffab3d79ff | |
13277 | ! Mem[0000000030181410] = 00000000, %l7 = 0000000000000000 | |
13278 | lduba [%i6+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
13279 | ! Mem[0000000010081408] = 23e3b300 12000000, %l4 = 00000000, %l5 = 12000000 | |
13280 | ldda [%i2+%o4]0x80,%l4 ! %l4 = 0000000023e3b300 0000000012000000 | |
13281 | ! Mem[0000000020800000] = ff008470, %l0 = 90b842e7f7c43c44 | |
13282 | ldsha [%o1+0x000]%asi,%l0 ! %l0 = ffffffffffffff00 | |
13283 | ! Mem[0000000030041400] = 000000ff, %l5 = 0000000012000000 | |
13284 | ldsba [%i1+%g0]0x89,%l5 ! %l5 = ffffffffffffffff | |
13285 | ! Starting 10 instruction Store Burst | |
13286 | ! %l4 = 0000000023e3b300, Mem[00000000100c1424] = fcffffff | |
13287 | stw %l4,[%i3+0x024] ! Mem[00000000100c1424] = 23e3b300 | |
13288 | ||
13289 | p0_label_318: | |
13290 | ! %l2 = 0000000000b3e323, Mem[0000000020800000] = ff008470, %asi = 80 | |
13291 | stha %l2,[%o1+0x000]%asi ! Mem[0000000020800000] = e3238470 | |
13292 | ! %l5 = ffffffffffffffff, Mem[00000000201c0001] = 37df9457 | |
13293 | stb %l5,[%o0+0x001] ! Mem[00000000201c0000] = 37ff9457 | |
13294 | ! %f2 = ff000000 0000ffff, Mem[0000000010141400] = 00000000 00ffffff | |
13295 | stda %f2 ,[%i5+%g0]0x80 ! Mem[0000000010141400] = ff000000 0000ffff | |
13296 | ! Mem[0000000010041400] = 12000000, %l1 = fa9a852821e5d66e | |
13297 | ldstuba [%i1+%g0]0x80,%l1 ! %l1 = 00000012000000ff | |
13298 | ! Mem[0000000010181404] = fcc4ff76, %l1 = 0000000000000012, %asi = 80 | |
13299 | swapa [%i6+0x004]%asi,%l1 ! %l1 = 00000000fcc4ff76 | |
13300 | ! Mem[0000000030181408] = ab3d79ff, %l7 = 0000000000000000 | |
13301 | swapa [%i6+%o4]0x81,%l7 ! %l7 = 00000000ab3d79ff | |
13302 | ! %l2 = 0000000000b3e323, Mem[0000000030101408] = ff00ffff0000007c | |
13303 | stxa %l2,[%i4+%o4]0x81 ! Mem[0000000030101408] = 0000000000b3e323 | |
13304 | ! %l4 = 0000000023e3b300, Mem[0000000030181408] = 00000000 | |
13305 | stha %l4,[%i6+%o4]0x81 ! Mem[0000000030181408] = b3000000 | |
13306 | ! Mem[0000000030001400] = faa363ff, %l4 = 0000000023e3b300 | |
13307 | ldstuba [%i0+%g0]0x89,%l4 ! %l4 = 000000ff000000ff | |
13308 | ! Starting 10 instruction Load Burst | |
13309 | ! Mem[0000000030041408] = 000000ff00000000, %l5 = ffffffffffffffff | |
13310 | ldxa [%i1+%o4]0x81,%l5 ! %l5 = 000000ff00000000 | |
13311 | ||
13312 | p0_label_319: | |
13313 | membar #Sync ! Added by membar checker (53) | |
13314 | ! Mem[0000000030001400] = ff63a3fa 53d5cb36 ffc4c676 00ff0000 | |
13315 | ! Mem[0000000030001410] = 00000000 9c156421 ffffff00 00000000 | |
13316 | ! Mem[0000000030001420] = 9c510000 0000007a 3739e890 7663a3fa | |
13317 | ! Mem[0000000030001430] = 000000ff 00000000 ff2e0000 00ff7990 | |
13318 | ldda [%i0]ASI_BLK_S,%f16 ! Block Load from 0000000030001400 | |
13319 | ! Mem[0000000030001410] = 00000000, %l2 = 0000000000b3e323 | |
13320 | ldsba [%i0+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
13321 | ! Mem[0000000030101408] = 23e3b300 00000000, %l2 = 00000000, %l3 = 00000012 | |
13322 | ldda [%i4+%o4]0x89,%l2 ! %l2 = 0000000000000000 0000000023e3b300 | |
13323 | ! Mem[0000000010181400] = 00000000, %l0 = ffffffffffffff00 | |
13324 | ldsha [%i6+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
13325 | ! Mem[0000000010081408] = 00b3e323, %l6 = ffffffffab3d79ff | |
13326 | ldsha [%i2+%o4]0x88,%l6 ! %l6 = ffffffffffffe323 | |
13327 | ! Mem[0000000010041428] = b179bad6f8962d02, %f0 = 00000000 90000000 | |
13328 | ldda [%i1+0x028]%asi,%f0 ! %f0 = b179bad6 f8962d02 | |
13329 | ! Mem[0000000010001408] = ff000090, %l1 = 00000000fcc4ff76 | |
13330 | lduha [%i0+%o4]0x80,%l1 ! %l1 = 000000000000ff00 | |
13331 | ! Mem[0000000010181408] = 0000ff90, %l2 = 0000000000000000 | |
13332 | ldswa [%i6+%o4]0x88,%l2 ! %l2 = 000000000000ff90 | |
13333 | ! Mem[0000000010181400] = 00000000 00000012, %l0 = 00000000, %l1 = 0000ff00 | |
13334 | ldda [%i6+%g0]0x80,%l0 ! %l0 = 0000000000000000 0000000000000012 | |
13335 | ! Starting 10 instruction Store Burst | |
13336 | ! %l3 = 0000000023e3b300, Mem[0000000030181408] = 000000b3 | |
13337 | stha %l3,[%i6+%o4]0x89 ! Mem[0000000030181408] = 0000b300 | |
13338 | ||
13339 | p0_label_320: | |
13340 | membar #Sync ! Added by membar checker (54) | |
13341 | ! %l2 = 000000000000ff90, Mem[0000000030001400] = faa363ff | |
13342 | stwa %l2,[%i0+%g0]0x89 ! Mem[0000000030001400] = 0000ff90 | |
13343 | ! Mem[0000000030001410] = 00000000, %l6 = ffffffffffffe323 | |
13344 | ldsha [%i0+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
13345 | ! Mem[0000000010081408] = 00b3e323, %l6 = 0000000000000000 | |
13346 | ldstuba [%i2+%o4]0x88,%l6 ! %l6 = 00000023000000ff | |
13347 | ! %f24 = 9c510000 0000007a, %l7 = 00000000ab3d79ff | |
13348 | ! Mem[0000000030141400] = 000000000000ff00 | |
13349 | stda %f24,[%i5+%l7]ASI_PST16_S ! Mem[0000000030141400] = 9c5100000000007a | |
13350 | ! %l6 = 00000023, %l7 = ab3d79ff, Mem[0000000010101408] = dfa6f0ed fffff8fc | |
13351 | stda %l6,[%i4+%o4]0x88 ! Mem[0000000010101408] = 00000023 ab3d79ff | |
13352 | ! Mem[0000000010141400] = ff000000, %l6 = 0000000000000023 | |
13353 | swap [%i5+%g0],%l6 ! %l6 = 00000000ff000000 | |
13354 | ! %f30 = ff2e0000 00ff7990, %l5 = 000000ff00000000 | |
13355 | ! Mem[00000000300c1400] = 0012000012000000 | |
13356 | stda %f30,[%i3+%l5]ASI_PST8_S ! Mem[00000000300c1400] = 0012000012000000 | |
13357 | ! Mem[0000000030101408] = 00000000, %l1 = 0000000000000012 | |
13358 | swapa [%i4+%o4]0x89,%l1 ! %l1 = 0000000000000000 | |
13359 | ! %f29 = 00000000, Mem[00000000100c1410] = ffff0000 | |
13360 | sta %f29,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 00000000 | |
13361 | ! Starting 10 instruction Load Burst | |
13362 | ! Mem[0000000010101428] = 00fffffff8960000, %f20 = 00000000 9c156421 | |
13363 | ldda [%i4+0x028]%asi,%f20 ! %f20 = 00ffffff f8960000 | |
13364 | ||
13365 | ! Check Point 64 for processor 0 | |
13366 | ||
13367 | set p0_check_pt_data_64,%g4 | |
13368 | rd %ccr,%g5 ! %g5 = 44 | |
13369 | ldx [%g4+0x08],%g2 | |
13370 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
13371 | bne %xcc,p0_reg_check_fail0 | |
13372 | mov 0xee0,%g1 | |
13373 | ldx [%g4+0x10],%g2 | |
13374 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
13375 | bne %xcc,p0_reg_check_fail1 | |
13376 | mov 0xee1,%g1 | |
13377 | ldx [%g4+0x18],%g2 | |
13378 | cmp %l2,%g2 ! %l2 = 000000000000ff90 | |
13379 | bne %xcc,p0_reg_check_fail2 | |
13380 | mov 0xee2,%g1 | |
13381 | ldx [%g4+0x20],%g2 | |
13382 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
13383 | bne %xcc,p0_reg_check_fail4 | |
13384 | mov 0xee4,%g1 | |
13385 | ldx [%g4+0x28],%g2 | |
13386 | cmp %l5,%g2 ! %l5 = 000000ff00000000 | |
13387 | bne %xcc,p0_reg_check_fail5 | |
13388 | mov 0xee5,%g1 | |
13389 | ldx [%g4+0x30],%g2 | |
13390 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
13391 | bne %xcc,p0_reg_check_fail6 | |
13392 | mov 0xee6,%g1 | |
13393 | ldx [%g4+0x38],%g2 | |
13394 | cmp %l7,%g2 ! %l7 = 00000000ab3d79ff | |
13395 | bne %xcc,p0_reg_check_fail7 | |
13396 | mov 0xee7,%g1 | |
13397 | ldx [%g4+0x40],%g3 | |
13398 | std %f0,[%g4] | |
13399 | ldx [%g4],%g2 | |
13400 | cmp %g3,%g2 ! %f0 = b179bad6 f8962d02 | |
13401 | bne %xcc,p0_freg_check_fail | |
13402 | mov 0xf00,%g1 | |
13403 | ldx [%g4+0x48],%g3 | |
13404 | std %f2,[%g4] | |
13405 | ldx [%g4],%g2 | |
13406 | cmp %g3,%g2 ! %f2 = ff000000 0000ffff | |
13407 | bne %xcc,p0_freg_check_fail | |
13408 | mov 0xf02,%g1 | |
13409 | ldx [%g4+0x50],%g3 | |
13410 | std %f4,[%g4] | |
13411 | ldx [%g4],%g2 | |
13412 | cmp %g3,%g2 ! %f4 = ff000000 edf0a6df | |
13413 | bne %xcc,p0_freg_check_fail | |
13414 | mov 0xf04,%g1 | |
13415 | ldx [%g4+0x58],%g3 | |
13416 | std %f6,[%g4] | |
13417 | ldx [%g4],%g2 | |
13418 | cmp %g3,%g2 ! %f6 = fff80066 000000ff | |
13419 | bne %xcc,p0_freg_check_fail | |
13420 | mov 0xf06,%g1 | |
13421 | ldx [%g4+0x60],%g3 | |
13422 | std %f16,[%g4] | |
13423 | ldx [%g4],%g2 | |
13424 | cmp %g3,%g2 ! %f16 = ff63a3fa 53d5cb36 | |
13425 | bne %xcc,p0_freg_check_fail | |
13426 | mov 0xf16,%g1 | |
13427 | ldx [%g4+0x68],%g3 | |
13428 | std %f18,[%g4] | |
13429 | ldx [%g4],%g2 | |
13430 | cmp %g3,%g2 ! %f18 = ffc4c676 00ff0000 | |
13431 | bne %xcc,p0_freg_check_fail | |
13432 | mov 0xf18,%g1 | |
13433 | ldx [%g4+0x70],%g3 | |
13434 | std %f20,[%g4] | |
13435 | ldx [%g4],%g2 | |
13436 | cmp %g3,%g2 ! %f20 = 00ffffff f8960000 | |
13437 | bne %xcc,p0_freg_check_fail | |
13438 | mov 0xf20,%g1 | |
13439 | ldx [%g4+0x78],%g3 | |
13440 | std %f22,[%g4] | |
13441 | ldx [%g4],%g2 | |
13442 | cmp %g3,%g2 ! %f22 = ffffff00 00000000 | |
13443 | bne %xcc,p0_freg_check_fail | |
13444 | mov 0xf22,%g1 | |
13445 | ldx [%g4+0x80],%g3 | |
13446 | std %f24,[%g4] | |
13447 | ldx [%g4],%g2 | |
13448 | cmp %g3,%g2 ! %f24 = 9c510000 0000007a | |
13449 | bne %xcc,p0_freg_check_fail | |
13450 | mov 0xf24,%g1 | |
13451 | ldx [%g4+0x88],%g3 | |
13452 | std %f26,[%g4] | |
13453 | ldx [%g4],%g2 | |
13454 | cmp %g3,%g2 ! %f26 = 3739e890 7663a3fa | |
13455 | bne %xcc,p0_freg_check_fail | |
13456 | mov 0xf26,%g1 | |
13457 | ldx [%g4+0x90],%g3 | |
13458 | std %f28,[%g4] | |
13459 | ldx [%g4],%g2 | |
13460 | cmp %g3,%g2 ! %f28 = 000000ff 00000000 | |
13461 | bne %xcc,p0_freg_check_fail | |
13462 | mov 0xf28,%g1 | |
13463 | ldx [%g4+0x98],%g3 | |
13464 | std %f30,[%g4] | |
13465 | ldx [%g4],%g2 | |
13466 | cmp %g3,%g2 ! %f30 = ff2e0000 00ff7990 | |
13467 | bne %xcc,p0_freg_check_fail | |
13468 | mov 0xf30,%g1 | |
13469 | ||
13470 | ! Check Point 64 completed | |
13471 | ||
13472 | ||
13473 | p0_label_321: | |
13474 | ! Mem[0000000020800000] = e3238470, %l2 = 000000000000ff90 | |
13475 | ldub [%o1+0x001],%l2 ! %l2 = 0000000000000023 | |
13476 | ! Mem[00000000100c1408] = ff000000 ffffb7f8, %l2 = 00000023, %l3 = 23e3b300 | |
13477 | ldda [%i3+%o4]0x80,%l2 ! %l2 = 00000000ff000000 00000000ffffb7f8 | |
13478 | ! Mem[0000000030101410] = ff793dab, %l0 = 0000000000000000 | |
13479 | ldswa [%i4+%o5]0x81,%l0 ! %l0 = ffffffffff793dab | |
13480 | ! Mem[00000000211c0000] = ffff1a4c, %l1 = 0000000000000000 | |
13481 | ldsha [%o2+0x000]%asi,%l1 ! %l1 = ffffffffffffffff | |
13482 | ! Mem[0000000030081400] = ff0000ff, %l6 = 00000000ff000000 | |
13483 | lduba [%i2+%g0]0x89,%l6 ! %l6 = 00000000000000ff | |
13484 | ! Mem[0000000030081408] = ffff00ff, %l0 = ffffffffff793dab | |
13485 | ldsba [%i2+%o4]0x81,%l0 ! %l0 = ffffffffffffffff | |
13486 | ! Mem[00000000211c0000] = ffff1a4c, %l6 = 00000000000000ff | |
13487 | lduba [%o2+0x000]%asi,%l6 ! %l6 = 00000000000000ff | |
13488 | ! Mem[0000000010141408] = 4e00ffff, %l7 = 00000000ab3d79ff | |
13489 | lduwa [%i5+%o4]0x88,%l7 ! %l7 = 000000004e00ffff | |
13490 | ! Mem[0000000010001418] = 00002e7a 00000000, %l4 = 000000ff, %l5 = 00000000 | |
13491 | ldda [%i0+0x018]%asi,%l4 ! %l4 = 0000000000002e7a 0000000000000000 | |
13492 | ! Starting 10 instruction Store Burst | |
13493 | ! %l7 = 000000004e00ffff, Mem[0000000030141408] = 00000076 | |
13494 | stwa %l7,[%i5+%o4]0x89 ! Mem[0000000030141408] = 4e00ffff | |
13495 | ||
13496 | p0_label_322: | |
13497 | ! %l5 = 0000000000000000, Mem[00000000211c0000] = ffff1a4c | |
13498 | sth %l5,[%o2+%g0] ! Mem[00000000211c0000] = 00001a4c | |
13499 | ! %f16 = ff63a3fa 53d5cb36 ffc4c676 00ff0000 | |
13500 | ! %f20 = 00ffffff f8960000 ffffff00 00000000 | |
13501 | ! %f24 = 9c510000 0000007a 3739e890 7663a3fa | |
13502 | ! %f28 = 000000ff 00000000 ff2e0000 00ff7990 | |
13503 | stda %f16,[%i3]ASI_BLK_SL ! Block Store to 00000000300c1400 | |
13504 | ! %l6 = 000000ff, %l7 = 4e00ffff, Mem[0000000010141428] = 10ac7b59 3eda2778 | |
13505 | stda %l6,[%i5+0x028]%asi ! Mem[0000000010141428] = 000000ff 4e00ffff | |
13506 | ! Mem[0000000030001400] = 90ff0000, %l5 = 0000000000000000 | |
13507 | ldstuba [%i0+%g0]0x81,%l5 ! %l5 = 00000090000000ff | |
13508 | ! %l0 = ffffffffffffffff, Mem[0000000010041436] = ff000000 | |
13509 | stb %l0,[%i1+0x036] ! Mem[0000000010041434] = ff00ff00 | |
13510 | ! %l4 = 00002e7a, %l5 = 00000090, Mem[00000000300c1400] = 36cbd553 faa363ff | |
13511 | stda %l4,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00002e7a 00000090 | |
13512 | ! %l2 = ff000000, %l3 = ffffb7f8, Mem[0000000010041410] = 23e3b300 00000000 | |
13513 | stda %l2,[%i1+%o5]0x88 ! Mem[0000000010041410] = ff000000 ffffb7f8 | |
13514 | ! Mem[0000000010081400] = ff0000ff3eda2778, %f8 = 000000ff ff00007a | |
13515 | ldda [%i2+%g0]0x80,%f8 ! %f8 = ff0000ff 3eda2778 | |
13516 | ! %l7 = 000000004e00ffff, Mem[0000000010041410] = 000000ff | |
13517 | stha %l7,[%i1+%o5]0x80 ! Mem[0000000010041410] = ffff00ff | |
13518 | ! Starting 10 instruction Load Burst | |
13519 | ! Mem[0000000030001410] = 000000009c156421, %f0 = b179bad6 f8962d02 | |
13520 | ldda [%i0+%o5]0x81,%f0 ! %f0 = 00000000 9c156421 | |
13521 | ||
13522 | p0_label_323: | |
13523 | ! Mem[0000000030181410] = 00000000, %l0 = ffffffffffffffff | |
13524 | ldsha [%i6+%o5]0x81,%l0 ! %l0 = 0000000000000000 | |
13525 | ! Mem[000000001014140c] = 00000000, %f2 = ff000000 | |
13526 | ld [%i5+0x00c],%f2 ! %f2 = 00000000 | |
13527 | membar #Sync ! Added by membar checker (55) | |
13528 | ! Mem[00000000100c1400] = ffc4c676, %l4 = 0000000000002e7a | |
13529 | ldswa [%i3+%g0]0x80,%l4 ! %l4 = ffffffffffc4c676 | |
13530 | ! Mem[0000000030001410] = 00000000, %l6 = 00000000000000ff | |
13531 | lduba [%i0+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
13532 | ! Mem[0000000010101410] = ff000000, %l2 = 00000000ff000000 | |
13533 | ldsba [%i4+%o5]0x80,%l2 ! %l2 = ffffffffffffffff | |
13534 | ! Mem[0000000030041410] = 000000ff, %l7 = 000000004e00ffff | |
13535 | lduha [%i1+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
13536 | ! Mem[00000000300c1408] = 0000ff0076c6c4ff, %f18 = ffc4c676 00ff0000 | |
13537 | ldda [%i3+%o4]0x81,%f18 ! %f18 = 0000ff00 76c6c4ff | |
13538 | ! Mem[0000000010081430] = 000000fcfffeffff, %l1 = ffffffffffffffff | |
13539 | ldx [%i2+0x030],%l1 ! %l1 = 000000fcfffeffff | |
13540 | ! Mem[00000000211c0000] = 00001a4c, %l5 = 0000000000000090 | |
13541 | lduh [%o2+%g0],%l5 ! %l5 = 0000000000000000 | |
13542 | ! Starting 10 instruction Store Burst | |
13543 | ! %l4 = ffffffffffc4c676, Mem[0000000030041408] = ff000000 | |
13544 | stwa %l4,[%i1+%o4]0x89 ! Mem[0000000030041408] = ffc4c676 | |
13545 | ||
13546 | p0_label_324: | |
13547 | ! %f2 = 00000000, Mem[0000000030101400] = ff000000 | |
13548 | sta %f2 ,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 | |
13549 | ! Mem[0000000010081400] = ff0000ff, %l2 = ffffffffffffffff | |
13550 | ldstuba [%i2+%g0]0x80,%l2 ! %l2 = 000000ff000000ff | |
13551 | ! %l5 = 0000000000000000, Mem[0000000010141410] = ff4919ff9def9057 | |
13552 | stxa %l5,[%i5+%o5]0x80 ! Mem[0000000010141410] = 0000000000000000 | |
13553 | ! %f0 = 00000000, Mem[0000000010141408] = 4e00ffff | |
13554 | sta %f0 ,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000000 | |
13555 | ! %l1 = 000000fcfffeffff, Mem[0000000010101400] = 00000000 | |
13556 | stwa %l1,[%i4+%g0]0x88 ! Mem[0000000010101400] = fffeffff | |
13557 | ! %f26 = 3739e890 7663a3fa, %l3 = 00000000ffffb7f8 | |
13558 | ! Mem[0000000030181430] = 4e00000000000012 | |
13559 | add %i6,0x030,%g1 | |
13560 | stda %f26,[%g1+%l3]ASI_PST8_S ! Mem[0000000030181430] = 3739e89076000012 | |
13561 | ! %l7 = 0000000000000000, Mem[0000000030081400] = ff0000ff | |
13562 | stwa %l7,[%i2+%g0]0x89 ! Mem[0000000030081400] = 00000000 | |
13563 | ! Mem[0000000021800080] = ffffa433, %l1 = 000000fcfffeffff | |
13564 | ldstuba [%o3+0x080]%asi,%l1 ! %l1 = 000000ff000000ff | |
13565 | ! %f1 = 9c156421, Mem[0000000010101400] = fffeffff | |
13566 | sta %f1 ,[%i4+%g0]0x88 ! Mem[0000000010101400] = 9c156421 | |
13567 | ! Starting 10 instruction Load Burst | |
13568 | ! Mem[0000000010141400] = 00000023, %l3 = 00000000ffffb7f8 | |
13569 | ldsba [%i5+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
13570 | ||
13571 | p0_label_325: | |
13572 | ! Mem[0000000030181410] = 00000000, %l1 = 00000000000000ff | |
13573 | ldsha [%i6+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
13574 | ! Mem[00000000300c1410] = 000096f8, %f0 = 00000000 | |
13575 | lda [%i3+%o5]0x81,%f0 ! %f0 = 000096f8 | |
13576 | ! Mem[000000001010141c] = 000000ff, %l7 = 0000000000000000 | |
13577 | lduh [%i4+0x01e],%l7 ! %l7 = 00000000000000ff | |
13578 | ! Mem[00000000201c0000] = 37ff9457, %l6 = 0000000000000000 | |
13579 | ldub [%o0+0x001],%l6 ! %l6 = 00000000000000ff | |
13580 | ! Mem[0000000010101400] = 2164159c, %l1 = 0000000000000000 | |
13581 | ldsba [%i4+%g0]0x80,%l1 ! %l1 = 0000000000000021 | |
13582 | ! Mem[0000000030141400] = 7a000000 0000519c, %l4 = ffc4c676, %l5 = 00000000 | |
13583 | ldda [%i5+%g0]0x89,%l4 ! %l4 = 000000000000519c 000000007a000000 | |
13584 | ! Mem[0000000010141408] = 00000000, %l5 = 000000007a000000 | |
13585 | lduba [%i5+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
13586 | ! Mem[0000000030081408] = 00000000ff00ffff, %f26 = 3739e890 7663a3fa | |
13587 | ldda [%i2+%o4]0x89,%f26 ! %f26 = 00000000 ff00ffff | |
13588 | ! Mem[0000000010081430] = 000000fcfffeffff, %f4 = ff000000 edf0a6df | |
13589 | ldd [%i2+0x030],%f4 ! %f4 = 000000fc fffeffff | |
13590 | ! Starting 10 instruction Store Burst | |
13591 | ! Mem[00000000218000c0] = 007e8d82, %l7 = 00000000000000ff | |
13592 | ldstub [%o3+0x0c0],%l7 ! %l7 = 00000000000000ff | |
13593 | ||
13594 | ! Check Point 65 for processor 0 | |
13595 | ||
13596 | set p0_check_pt_data_65,%g4 | |
13597 | rd %ccr,%g5 ! %g5 = 44 | |
13598 | ldx [%g4+0x08],%g2 | |
13599 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
13600 | bne %xcc,p0_reg_check_fail0 | |
13601 | mov 0xee0,%g1 | |
13602 | ldx [%g4+0x10],%g2 | |
13603 | cmp %l1,%g2 ! %l1 = 0000000000000021 | |
13604 | bne %xcc,p0_reg_check_fail1 | |
13605 | mov 0xee1,%g1 | |
13606 | ldx [%g4+0x18],%g2 | |
13607 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
13608 | bne %xcc,p0_reg_check_fail2 | |
13609 | mov 0xee2,%g1 | |
13610 | ldx [%g4+0x20],%g2 | |
13611 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
13612 | bne %xcc,p0_reg_check_fail3 | |
13613 | mov 0xee3,%g1 | |
13614 | ldx [%g4+0x28],%g2 | |
13615 | cmp %l4,%g2 ! %l4 = 000000000000519c | |
13616 | bne %xcc,p0_reg_check_fail4 | |
13617 | mov 0xee4,%g1 | |
13618 | ldx [%g4+0x30],%g2 | |
13619 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
13620 | bne %xcc,p0_reg_check_fail5 | |
13621 | mov 0xee5,%g1 | |
13622 | ldx [%g4+0x38],%g2 | |
13623 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
13624 | bne %xcc,p0_reg_check_fail6 | |
13625 | mov 0xee6,%g1 | |
13626 | ldx [%g4+0x40],%g2 | |
13627 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
13628 | bne %xcc,p0_reg_check_fail7 | |
13629 | mov 0xee7,%g1 | |
13630 | ldx [%g4+0x48],%g3 | |
13631 | std %f0,[%g4] | |
13632 | ldx [%g4],%g2 | |
13633 | cmp %g3,%g2 ! %f0 = 000096f8 9c156421 | |
13634 | bne %xcc,p0_freg_check_fail | |
13635 | mov 0xf00,%g1 | |
13636 | ldx [%g4+0x50],%g3 | |
13637 | std %f2,[%g4] | |
13638 | ldx [%g4],%g2 | |
13639 | cmp %g3,%g2 ! %f2 = 00000000 0000ffff | |
13640 | bne %xcc,p0_freg_check_fail | |
13641 | mov 0xf02,%g1 | |
13642 | ldx [%g4+0x58],%g3 | |
13643 | std %f4,[%g4] | |
13644 | ldx [%g4],%g2 | |
13645 | cmp %g3,%g2 ! %f4 = 000000fc fffeffff | |
13646 | bne %xcc,p0_freg_check_fail | |
13647 | mov 0xf04,%g1 | |
13648 | ldx [%g4+0x60],%g3 | |
13649 | std %f8,[%g4] | |
13650 | ldx [%g4],%g2 | |
13651 | cmp %g3,%g2 ! %f8 = ff0000ff 3eda2778 | |
13652 | bne %xcc,p0_freg_check_fail | |
13653 | mov 0xf08,%g1 | |
13654 | ldx [%g4+0x68],%g3 | |
13655 | std %f18,[%g4] | |
13656 | ldx [%g4],%g2 | |
13657 | cmp %g3,%g2 ! %f18 = 0000ff00 76c6c4ff | |
13658 | bne %xcc,p0_freg_check_fail | |
13659 | mov 0xf18,%g1 | |
13660 | ldx [%g4+0x70],%g3 | |
13661 | std %f26,[%g4] | |
13662 | ldx [%g4],%g2 | |
13663 | cmp %g3,%g2 ! %f26 = 00000000 ff00ffff | |
13664 | bne %xcc,p0_freg_check_fail | |
13665 | mov 0xf26,%g1 | |
13666 | ||
13667 | ! Check Point 65 completed | |
13668 | ||
13669 | ||
13670 | p0_label_326: | |
13671 | ! %f14 = f8b7ffff 00000076, %l7 = 0000000000000000 | |
13672 | ! Mem[0000000010001400] = 94ff307d00000000 | |
13673 | stda %f14,[%i0+%l7]ASI_PST16_PL ! Mem[0000000010001400] = 94ff307d00000000 | |
13674 | ! Mem[0000000010081410] = ff000000, %l7 = 0000000000000000 | |
13675 | ldstuba [%i2+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
13676 | ! %l4 = 0000519c, %l5 = 00000000, Mem[0000000010181408] = 0000ff90 ff000000 | |
13677 | stda %l4,[%i6+%o4]0x88 ! Mem[0000000010181408] = 0000519c 00000000 | |
13678 | ! %l6 = 00000000000000ff, Mem[0000000010001418] = 00002e7a00000000, %asi = 80 | |
13679 | stxa %l6,[%i0+0x018]%asi ! Mem[0000000010001418] = 00000000000000ff | |
13680 | ! %l4 = 000000000000519c, Mem[0000000010041400] = 000000ff | |
13681 | stha %l4,[%i1+%g0]0x88 ! Mem[0000000010041400] = 0000519c | |
13682 | ! Mem[0000000010081410] = ff0000ff, %l2 = 00000000000000ff | |
13683 | swapa [%i2+%o5]0x88,%l2 ! %l2 = 00000000ff0000ff | |
13684 | ! %l4 = 000000000000519c, Mem[0000000030001410] = 00000000 | |
13685 | stwa %l4,[%i0+%o5]0x81 ! Mem[0000000030001410] = 0000519c | |
13686 | ! Mem[00000000100c1408] = ff000000, %l5 = 0000000000000000 | |
13687 | ldstuba [%i3+%o4]0x80,%l5 ! %l5 = 000000ff000000ff | |
13688 | ! Mem[0000000030181400] = 0000a6df, %l7 = 0000000000000000 | |
13689 | ldstuba [%i6+%g0]0x89,%l7 ! %l7 = 000000df000000ff | |
13690 | ! Starting 10 instruction Load Burst | |
13691 | ! Mem[0000000010101400] = 2164159c, %l4 = 000000000000519c | |
13692 | ldswa [%i4+%g0]0x80,%l4 ! %l4 = 000000002164159c | |
13693 | ||
13694 | p0_label_327: | |
13695 | ! Mem[0000000030001408] = 76c6c4ff, %l3 = 0000000000000000 | |
13696 | ldsha [%i0+%o4]0x89,%l3 ! %l3 = ffffffffffffc4ff | |
13697 | ! Mem[0000000030081400] = 00000000ff000000, %l4 = 000000002164159c | |
13698 | ldxa [%i2+%g0]0x81,%l4 ! %l4 = 00000000ff000000 | |
13699 | ! Mem[0000000030001410] = 0000519c, %l6 = 00000000000000ff | |
13700 | lduwa [%i0+%o5]0x81,%l6 ! %l6 = 000000000000519c | |
13701 | ! Mem[0000000010141410] = 0000000000000000, %f12 = 7827da3e 00000012 | |
13702 | ldda [%i5+%o5]0x88,%f12 ! %f12 = 00000000 00000000 | |
13703 | ! Mem[0000000030081408] = 00000000ff00ffff, %l3 = ffffffffffffc4ff | |
13704 | ldxa [%i2+%o4]0x89,%l3 ! %l3 = 00000000ff00ffff | |
13705 | ! Mem[0000000010101400] = 2164159c 76c6c4ff, %l2 = ff0000ff, %l3 = ff00ffff | |
13706 | ldda [%i4+%g0]0x80,%l2 ! %l2 = 000000002164159c 0000000076c6c4ff | |
13707 | ! Mem[000000001000143c] = 174573fc, %f23 = 00000000 | |
13708 | lda [%i0+0x03c]%asi,%f23 ! %f23 = 174573fc | |
13709 | ! Mem[0000000010101410] = 000000ff, %l4 = 00000000ff000000 | |
13710 | lduha [%i4+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
13711 | ! Mem[0000000010101400] = 2164159c, %f13 = 00000000 | |
13712 | lda [%i4+%g0]0x80,%f13 ! %f13 = 2164159c | |
13713 | ! Starting 10 instruction Store Burst | |
13714 | ! %l4 = 000000ff, %l5 = 000000ff, Mem[0000000010001418] = 00000000 000000ff | |
13715 | stda %l4,[%i0+0x018]%asi ! Mem[0000000010001418] = 000000ff 000000ff | |
13716 | ||
13717 | p0_label_328: | |
13718 | ! Mem[0000000010081400] = ff0000ff, %l6 = 000000000000519c | |
13719 | ldstuba [%i2+%g0]0x80,%l6 ! %l6 = 000000ff000000ff | |
13720 | ! %f28 = 000000ff 00000000, %l0 = 0000000000000000 | |
13721 | ! Mem[00000000300c1408] = 0000ff0076c6c4ff | |
13722 | add %i3,0x008,%g1 | |
13723 | stda %f28,[%g1+%l0]ASI_PST32_SL ! Mem[00000000300c1408] = 0000ff0076c6c4ff | |
13724 | ! %l2 = 000000002164159c, Mem[0000000010041410] = ff00ffff | |
13725 | stha %l2,[%i1+%o5]0x88 ! Mem[0000000010041410] = ff00159c | |
13726 | ! %l7 = 00000000000000df, Mem[000000001004141c] = 00000000 | |
13727 | sth %l7,[%i1+0x01c] ! Mem[000000001004141c] = 00df0000 | |
13728 | ! %f22 = ffffff00 174573fc, Mem[0000000030081400] = 00000000 000000ff | |
13729 | stda %f22,[%i2+%g0]0x89 ! Mem[0000000030081400] = ffffff00 174573fc | |
13730 | ! %f14 = f8b7ffff 00000076, Mem[0000000010101410] = ff000000 edf0a6df | |
13731 | stda %f14,[%i4+%o5]0x80 ! Mem[0000000010101410] = f8b7ffff 00000076 | |
13732 | ! Mem[00000000300c1410] = 000096f8, %l1 = 0000000000000021 | |
13733 | swapa [%i3+%o5]0x81,%l1 ! %l1 = 00000000000096f8 | |
13734 | ! Mem[0000000030101410] = ab3d79ff, %l2 = 000000002164159c | |
13735 | swapa [%i4+%o5]0x89,%l2 ! %l2 = 00000000ab3d79ff | |
13736 | ! %f17 = 53d5cb36, Mem[0000000010141408] = 00000000 | |
13737 | sta %f17,[%i5+%o4]0x80 ! Mem[0000000010141408] = 53d5cb36 | |
13738 | ! Starting 10 instruction Load Burst | |
13739 | ! Mem[0000000010101400] = 2164159c, %l6 = 00000000000000ff | |
13740 | lduwa [%i4+%g0]0x80,%l6 ! %l6 = 000000002164159c | |
13741 | ||
13742 | p0_label_329: | |
13743 | ! Mem[0000000010141400] = ffff000023000000, %f2 = 00000000 0000ffff | |
13744 | ldda [%i5+%g0]0x88,%f2 ! %f2 = ffff0000 23000000 | |
13745 | ! Mem[0000000030041410] = ffffffffff000000, %f20 = 00ffffff f8960000 | |
13746 | ldda [%i1+%o5]0x89,%f20 ! %f20 = ffffffff ff000000 | |
13747 | ! Mem[0000000010001408] = ff000090, %l3 = 0000000076c6c4ff | |
13748 | lduwa [%i0+%o4]0x80,%l3 ! %l3 = 00000000ff000090 | |
13749 | ! Mem[00000000300c1408] = ffc4c67600ff0000, %f0 = 000096f8 9c156421 | |
13750 | ldda [%i3+%o4]0x89,%f0 ! %f0 = ffc4c676 00ff0000 | |
13751 | ! Mem[0000000010101400] = 2164159c, %l4 = 00000000000000ff | |
13752 | ldswa [%i4+%g0]0x80,%l4 ! %l4 = 000000002164159c | |
13753 | ! Mem[0000000030181410] = 00000000, %l4 = 000000002164159c | |
13754 | ldsba [%i6+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
13755 | ! Mem[00000000300c1400] = 7a2e0000, %l1 = 00000000000096f8 | |
13756 | ldsba [%i3+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
13757 | ! Mem[0000000030141400] = 0000519c, %l3 = 00000000ff000090 | |
13758 | lduwa [%i5+%g0]0x89,%l3 ! %l3 = 000000000000519c | |
13759 | ! Mem[0000000030001400] = 0000ffff, %f8 = ff0000ff | |
13760 | lda [%i0+%g0]0x89,%f8 ! %f8 = 0000ffff | |
13761 | ! Starting 10 instruction Store Burst | |
13762 | ! Mem[0000000010141410] = 00000000, %l7 = 00000000000000df | |
13763 | ldstuba [%i5+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
13764 | ||
13765 | p0_label_330: | |
13766 | ! %l0 = 0000000000000000, Mem[0000000010141400] = 00000023 | |
13767 | stwa %l0,[%i5+%g0]0x80 ! Mem[0000000010141400] = 00000000 | |
13768 | ! %l4 = 0000000000000000, Mem[0000000010141408] = 0000000036cbd553 | |
13769 | stxa %l4,[%i5+%o4]0x88 ! Mem[0000000010141408] = 0000000000000000 | |
13770 | ! %l6 = 000000002164159c, Mem[0000000030001410] = 0000519c | |
13771 | stha %l6,[%i0+%o5]0x81 ! Mem[0000000030001410] = 159c519c | |
13772 | ! %l6 = 2164159c, %l7 = 00000000, Mem[00000000100c1408] = 000000ff f8b7ffff | |
13773 | stda %l6,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 2164159c 00000000 | |
13774 | ! %l6 = 000000002164159c, Mem[0000000030081410] = 0000fa00 | |
13775 | stwa %l6,[%i2+%o5]0x89 ! Mem[0000000030081410] = 2164159c | |
13776 | ! %l1 = 0000000000000000, Mem[0000000010181400] = 00000000 | |
13777 | stha %l1,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000 | |
13778 | ! %f4 = 000000fc, Mem[0000000030141410] = 76ffc4fc | |
13779 | sta %f4 ,[%i5+%o5]0x81 ! Mem[0000000030141410] = 000000fc | |
13780 | ! %f31 = 00ff7990, Mem[0000000030001408] = 76c6c4ff | |
13781 | sta %f31,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00ff7990 | |
13782 | ! %f4 = 000000fc fffeffff, %l4 = 0000000000000000 | |
13783 | ! Mem[0000000030141428] = 3739e890ffffac00 | |
13784 | add %i5,0x028,%g1 | |
13785 | stda %f4,[%g1+%l4]ASI_PST8_SL ! Mem[0000000030141428] = 3739e890ffffac00 | |
13786 | ! Starting 10 instruction Load Burst | |
13787 | ! Mem[0000000010141410] = 000000ff, %l4 = 0000000000000000 | |
13788 | lduba [%i5+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
13789 | ||
13790 | ! Check Point 66 for processor 0 | |
13791 | ||
13792 | set p0_check_pt_data_66,%g4 | |
13793 | rd %ccr,%g5 ! %g5 = 44 | |
13794 | ldx [%g4+0x08],%g2 | |
13795 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
13796 | bne %xcc,p0_reg_check_fail1 | |
13797 | mov 0xee1,%g1 | |
13798 | ldx [%g4+0x10],%g2 | |
13799 | cmp %l3,%g2 ! %l3 = 000000000000519c | |
13800 | bne %xcc,p0_reg_check_fail3 | |
13801 | mov 0xee3,%g1 | |
13802 | ldx [%g4+0x18],%g2 | |
13803 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
13804 | bne %xcc,p0_reg_check_fail4 | |
13805 | mov 0xee4,%g1 | |
13806 | ldx [%g4+0x20],%g2 | |
13807 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
13808 | bne %xcc,p0_reg_check_fail5 | |
13809 | mov 0xee5,%g1 | |
13810 | ldx [%g4+0x28],%g2 | |
13811 | cmp %l6,%g2 ! %l6 = 000000002164159c | |
13812 | bne %xcc,p0_reg_check_fail6 | |
13813 | mov 0xee6,%g1 | |
13814 | ldx [%g4+0x30],%g2 | |
13815 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
13816 | bne %xcc,p0_reg_check_fail7 | |
13817 | mov 0xee7,%g1 | |
13818 | ldx [%g4+0x38],%g3 | |
13819 | std %f0,[%g4] | |
13820 | ldx [%g4],%g2 | |
13821 | cmp %g3,%g2 ! %f0 = ffc4c676 00ff0000 | |
13822 | bne %xcc,p0_freg_check_fail | |
13823 | mov 0xf00,%g1 | |
13824 | ldx [%g4+0x40],%g3 | |
13825 | std %f2,[%g4] | |
13826 | ldx [%g4],%g2 | |
13827 | cmp %g3,%g2 ! %f2 = ffff0000 23000000 | |
13828 | bne %xcc,p0_freg_check_fail | |
13829 | mov 0xf02,%g1 | |
13830 | ldx [%g4+0x48],%g3 | |
13831 | std %f8,[%g4] | |
13832 | ldx [%g4],%g2 | |
13833 | cmp %g3,%g2 ! %f8 = 0000ffff 3eda2778 | |
13834 | bne %xcc,p0_freg_check_fail | |
13835 | mov 0xf08,%g1 | |
13836 | ldx [%g4+0x50],%g3 | |
13837 | std %f12,[%g4] | |
13838 | ldx [%g4],%g2 | |
13839 | cmp %g3,%g2 ! %f12 = 00000000 2164159c | |
13840 | bne %xcc,p0_freg_check_fail | |
13841 | mov 0xf12,%g1 | |
13842 | ldx [%g4+0x58],%g3 | |
13843 | std %f20,[%g4] | |
13844 | ldx [%g4],%g2 | |
13845 | cmp %g3,%g2 ! %f20 = ffffffff ff000000 | |
13846 | bne %xcc,p0_freg_check_fail | |
13847 | mov 0xf20,%g1 | |
13848 | ldx [%g4+0x60],%g3 | |
13849 | std %f22,[%g4] | |
13850 | ldx [%g4],%g2 | |
13851 | cmp %g3,%g2 ! %f22 = ffffff00 174573fc | |
13852 | bne %xcc,p0_freg_check_fail | |
13853 | mov 0xf22,%g1 | |
13854 | ||
13855 | ! Check Point 66 completed | |
13856 | ||
13857 | ||
13858 | p0_label_331: | |
13859 | ! Mem[00000000100c1410] = 00000000 00ffffff, %l2 = ab3d79ff, %l3 = 0000519c | |
13860 | ldda [%i3+0x010]%asi,%l2 ! %l2 = 0000000000000000 0000000000ffffff | |
13861 | ! Mem[0000000010141400] = 00000000, %l6 = 000000002164159c | |
13862 | lduba [%i5+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
13863 | ! Mem[0000000030101410] = 2164159c, %l7 = 0000000000000000 | |
13864 | lduha [%i4+%o5]0x89,%l7 ! %l7 = 000000000000159c | |
13865 | ! Mem[000000001018140c] = 00000000, %l2 = 0000000000000000 | |
13866 | ldsba [%i6+0x00e]%asi,%l2 ! %l2 = 0000000000000000 | |
13867 | ! Mem[00000000100c1410] = 0000000000ffffff, %l4 = 00000000000000ff | |
13868 | ldxa [%i3+%o5]0x80,%l4 ! %l4 = 0000000000ffffff | |
13869 | ! Mem[0000000010001410] = ff000012 665ef8fc, %l6 = 00000000, %l7 = 0000159c | |
13870 | ldda [%i0+%o5]0x80,%l6 ! %l6 = 00000000ff000012 00000000665ef8fc | |
13871 | ! Mem[0000000030141408] = 4e00ffff, %l2 = 0000000000000000 | |
13872 | lduwa [%i5+%o4]0x89,%l2 ! %l2 = 000000004e00ffff | |
13873 | ! Mem[0000000030041410] = ff000000, %l2 = 000000004e00ffff | |
13874 | ldsha [%i1+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
13875 | ! Mem[0000000030181408] = 0000b300, %l2 = 0000000000000000 | |
13876 | ldsha [%i6+%o4]0x89,%l2 ! %l2 = ffffffffffffb300 | |
13877 | ! Starting 10 instruction Store Burst | |
13878 | ! %l4 = 0000000000ffffff, Mem[0000000010081408] = ffe3b300 | |
13879 | stha %l4,[%i2+%o4]0x80 ! Mem[0000000010081408] = ffffb300 | |
13880 | ||
13881 | p0_label_332: | |
13882 | ! Mem[0000000010141408] = 00000000, %l5 = 00000000000000ff | |
13883 | ldstuba [%i5+%o4]0x80,%l5 ! %l5 = 00000000000000ff | |
13884 | ! Mem[0000000030041408] = 76c6c4ff, %l1 = 0000000000000000 | |
13885 | swapa [%i1+%o4]0x81,%l1 ! %l1 = 0000000076c6c4ff | |
13886 | ! %l1 = 0000000076c6c4ff, Mem[0000000010181408] = 9c510000 | |
13887 | stha %l1,[%i6+%o4]0x80 ! Mem[0000000010181408] = c4ff0000 | |
13888 | ! Mem[00000000100c1433] = ffffffff, %l6 = 00000000ff000012 | |
13889 | ldstuba [%i3+0x033]%asi,%l6 ! %l6 = 000000ff000000ff | |
13890 | ! Mem[00000000300c1408] = 0000ff00, %l3 = 0000000000ffffff | |
13891 | swapa [%i3+%o4]0x81,%l3 ! %l3 = 000000000000ff00 | |
13892 | ! %l0 = 0000000000000000, Mem[0000000020800001] = e3238470, %asi = 80 | |
13893 | stba %l0,[%o1+0x001]%asi ! Mem[0000000020800000] = e3008470 | |
13894 | ! %f18 = 0000ff00 76c6c4ff, %l2 = ffffffffffffb300 | |
13895 | ! Mem[0000000010101418] = fcc4c676000000ff | |
13896 | add %i4,0x018,%g1 | |
13897 | stda %f18,[%g1+%l2]ASI_PST16_PL ! Mem[0000000010101418] = fcc4c676000000ff | |
13898 | ! Mem[000000001018143c] = ffffb7f8, %l0 = 0000000000000000, %asi = 80 | |
13899 | swapa [%i6+0x03c]%asi,%l0 ! %l0 = 00000000ffffb7f8 | |
13900 | ! Mem[0000000030081400] = 174573fc, %l4 = 0000000000ffffff | |
13901 | swapa [%i2+%g0]0x89,%l4 ! %l4 = 00000000174573fc | |
13902 | ! Starting 10 instruction Load Burst | |
13903 | ! Mem[0000000030001400] = ffff0000 53d5cb36, %l0 = ffffb7f8, %l1 = 76c6c4ff | |
13904 | ldda [%i0+%g0]0x81,%l0 ! %l0 = 00000000ffff0000 0000000053d5cb36 | |
13905 | ||
13906 | p0_label_333: | |
13907 | ! Mem[0000000010081400] = ff0000ff, %l6 = 00000000000000ff | |
13908 | ldswa [%i2+%g0]0x88,%l6 ! %l6 = ffffffffff0000ff | |
13909 | ! Mem[0000000010041400] = 9c510000, %l3 = 000000000000ff00 | |
13910 | lduha [%i1+%g0]0x80,%l3 ! %l3 = 0000000000009c51 | |
13911 | ! Mem[0000000030001410] = 9c519c15, %l6 = ffffffffff0000ff | |
13912 | ldswa [%i0+%o5]0x89,%l6 ! %l6 = ffffffff9c519c15 | |
13913 | ! Mem[00000000100c1410] = 00000000, %l4 = 00000000174573fc | |
13914 | ldsha [%i3+0x010]%asi,%l4 ! %l4 = 0000000000000000 | |
13915 | ! Mem[0000000010141408] = 000000ff, %f8 = 0000ffff | |
13916 | lda [%i5+%o4]0x88,%f8 ! %f8 = 000000ff | |
13917 | ! Mem[0000000030101400] = 00000000, %l3 = 0000000000009c51 | |
13918 | lduba [%i4+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
13919 | ! Mem[0000000010041408] = ff00000000000000, %f22 = ffffff00 174573fc | |
13920 | ldda [%i1+%o4]0x88,%f22 ! %f22 = ff000000 00000000 | |
13921 | ! Mem[00000000211c0000] = 00001a4c, %l2 = ffffffffffffb300 | |
13922 | ldsb [%o2+%g0],%l2 ! %l2 = 0000000000000000 | |
13923 | ! Mem[0000000010101410] = f8b7ffff, %l4 = 0000000000000000 | |
13924 | lduha [%i4+%o5]0x80,%l4 ! %l4 = 000000000000f8b7 | |
13925 | ! Starting 10 instruction Store Burst | |
13926 | ! %l1 = 0000000053d5cb36, Mem[00000000300c1400] = 7a2e0000 | |
13927 | stwa %l1,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 53d5cb36 | |
13928 | ||
13929 | p0_label_334: | |
13930 | ! %l4 = 000000000000f8b7, Mem[0000000010041410] = 9c1500fff8b7ffff | |
13931 | stxa %l4,[%i1+%o5]0x80 ! Mem[0000000010041410] = 000000000000f8b7 | |
13932 | ! Mem[0000000030081408] = ff00ffff, %l6 = ffffffff9c519c15 | |
13933 | ldstuba [%i2+%o4]0x89,%l6 ! %l6 = 000000ff000000ff | |
13934 | ! %l4 = 000000000000f8b7, Mem[0000000030181408] = 00b30000 | |
13935 | stba %l4,[%i6+%o4]0x81 ! Mem[0000000030181408] = b7b30000 | |
13936 | ! Mem[0000000021800080] = ffffa433, %l5 = 0000000000000000 | |
13937 | ldstub [%o3+0x080],%l5 ! %l5 = 000000ff000000ff | |
13938 | ! %l5 = 00000000000000ff, Mem[00000000300c1410] = 21000000 | |
13939 | stwa %l5,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 000000ff | |
13940 | ! %l1 = 0000000053d5cb36, Mem[0000000030101408] = 00000012 | |
13941 | stha %l1,[%i4+%o4]0x89 ! Mem[0000000030101408] = 0000cb36 | |
13942 | ! %l2 = 0000000000000000, Mem[0000000030041410] = ff000000 | |
13943 | stwa %l2,[%i1+%o5]0x89 ! Mem[0000000030041410] = 00000000 | |
13944 | ! Mem[0000000010041400] = 9c510000, %l7 = 00000000665ef8fc | |
13945 | swapa [%i1+%g0]0x80,%l7 ! %l7 = 000000009c510000 | |
13946 | ! Mem[0000000010101400] = 2164159c, %l7 = 000000009c510000 | |
13947 | swapa [%i4+%g0]0x80,%l7 ! %l7 = 000000002164159c | |
13948 | ! Starting 10 instruction Load Burst | |
13949 | ! Mem[00000000300c1400] = 9000000053d5cb36, %f6 = fff80066 000000ff | |
13950 | ldda [%i3+%g0]0x89,%f6 ! %f6 = 90000000 53d5cb36 | |
13951 | ||
13952 | p0_label_335: | |
13953 | ! Mem[0000000010181408] = 00000000 0000ffc4, %l0 = ffff0000, %l1 = 53d5cb36 | |
13954 | ldda [%i6+%o4]0x88,%l0 ! %l0 = 000000000000ffc4 0000000000000000 | |
13955 | ! Mem[0000000030001410] = 2164159c9c519c15, %l4 = 000000000000f8b7 | |
13956 | ldxa [%i0+%o5]0x89,%l4 ! %l4 = 2164159c9c519c15 | |
13957 | ! Mem[0000000030181400] = 0000a6ff, %l7 = 000000002164159c | |
13958 | ldsha [%i6+%g0]0x89,%l7 ! %l7 = ffffffffffffa6ff | |
13959 | ! Mem[0000000030101408] = 36cb0000, %l4 = 2164159c9c519c15 | |
13960 | ldsha [%i4+%o4]0x81,%l4 ! %l4 = 00000000000036cb | |
13961 | ! Mem[00000000100c1408] = 2164159c, %l3 = 0000000000000000 | |
13962 | ldsba [%i3+%o4]0x88,%l3 ! %l3 = ffffffffffffff9c | |
13963 | ! Mem[0000000010141400] = 00000000, %f10 = 00000000 | |
13964 | lda [%i5+%g0]0x88,%f10 ! %f10 = 00000000 | |
13965 | ! Mem[0000000030001400] = 0000ffff, %l4 = 00000000000036cb | |
13966 | lduwa [%i0+%g0]0x89,%l4 ! %l4 = 000000000000ffff | |
13967 | ! Mem[0000000030041410] = 00000000, %f3 = 23000000 | |
13968 | lda [%i1+%o5]0x81,%f3 ! %f3 = 00000000 | |
13969 | ! Mem[0000000010101410] = f8b7ffff, %l7 = ffffffffffffa6ff | |
13970 | ldsba [%i4+%o5]0x80,%l7 ! %l7 = fffffffffffffff8 | |
13971 | ! Starting 10 instruction Store Burst | |
13972 | ! %l0 = 000000000000ffc4, Mem[00000000100c1422] = ff000000, %asi = 80 | |
13973 | stha %l0,[%i3+0x022]%asi ! Mem[00000000100c1420] = ff00ffc4 | |
13974 | ||
13975 | ! Check Point 67 for processor 0 | |
13976 | ||
13977 | set p0_check_pt_data_67,%g4 | |
13978 | rd %ccr,%g5 ! %g5 = 44 | |
13979 | ldx [%g4+0x08],%g2 | |
13980 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
13981 | bne %xcc,p0_reg_check_fail2 | |
13982 | mov 0xee2,%g1 | |
13983 | ldx [%g4+0x10],%g2 | |
13984 | cmp %l3,%g2 ! %l3 = ffffffffffffff9c | |
13985 | bne %xcc,p0_reg_check_fail3 | |
13986 | mov 0xee3,%g1 | |
13987 | ldx [%g4+0x18],%g2 | |
13988 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
13989 | bne %xcc,p0_reg_check_fail4 | |
13990 | mov 0xee4,%g1 | |
13991 | ldx [%g4+0x20],%g2 | |
13992 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
13993 | bne %xcc,p0_reg_check_fail5 | |
13994 | mov 0xee5,%g1 | |
13995 | ldx [%g4+0x28],%g2 | |
13996 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
13997 | bne %xcc,p0_reg_check_fail6 | |
13998 | mov 0xee6,%g1 | |
13999 | ldx [%g4+0x30],%g2 | |
14000 | cmp %l7,%g2 ! %l7 = fffffffffffffff8 | |
14001 | bne %xcc,p0_reg_check_fail7 | |
14002 | mov 0xee7,%g1 | |
14003 | ldx [%g4+0x38],%g3 | |
14004 | std %f0,[%g4] | |
14005 | ldx [%g4],%g2 | |
14006 | cmp %g3,%g2 ! %f0 = ffc4c676 00ff0000 | |
14007 | bne %xcc,p0_freg_check_fail | |
14008 | mov 0xf00,%g1 | |
14009 | ldx [%g4+0x40],%g3 | |
14010 | std %f2,[%g4] | |
14011 | ldx [%g4],%g2 | |
14012 | cmp %g3,%g2 ! %f2 = ffff0000 00000000 | |
14013 | bne %xcc,p0_freg_check_fail | |
14014 | mov 0xf02,%g1 | |
14015 | ldx [%g4+0x48],%g3 | |
14016 | std %f6,[%g4] | |
14017 | ldx [%g4],%g2 | |
14018 | cmp %g3,%g2 ! %f6 = 90000000 53d5cb36 | |
14019 | bne %xcc,p0_freg_check_fail | |
14020 | mov 0xf06,%g1 | |
14021 | ldx [%g4+0x50],%g3 | |
14022 | std %f8,[%g4] | |
14023 | ldx [%g4],%g2 | |
14024 | cmp %g3,%g2 ! %f8 = 000000ff 3eda2778 | |
14025 | bne %xcc,p0_freg_check_fail | |
14026 | mov 0xf08,%g1 | |
14027 | ldx [%g4+0x58],%g3 | |
14028 | std %f10,[%g4] | |
14029 | ldx [%g4],%g2 | |
14030 | cmp %g3,%g2 ! %f10 = 00000000 ff000000 | |
14031 | bne %xcc,p0_freg_check_fail | |
14032 | mov 0xf10,%g1 | |
14033 | ldx [%g4+0x60],%g3 | |
14034 | std %f22,[%g4] | |
14035 | ldx [%g4],%g2 | |
14036 | cmp %g3,%g2 ! %f22 = ff000000 00000000 | |
14037 | bne %xcc,p0_freg_check_fail | |
14038 | mov 0xf22,%g1 | |
14039 | ||
14040 | ! Check Point 67 completed | |
14041 | ||
14042 | ||
14043 | p0_label_336: | |
14044 | ! %l3 = ffffffffffffff9c, Mem[00000000211c0000] = 00001a4c | |
14045 | stb %l3,[%o2+%g0] ! Mem[00000000211c0000] = 9c001a4c | |
14046 | ! %f20 = ffffffff ff000000, %l3 = ffffffffffffff9c | |
14047 | ! Mem[0000000030041428] = 0000000000b3e323 | |
14048 | add %i1,0x028,%g1 | |
14049 | stda %f20,[%g1+%l3]ASI_PST8_SL ! Mem[0000000030041428] = 000000ffffb3e3ff | |
14050 | ! %l6 = 00000000000000ff, Mem[0000000010081400] = ff0000ff | |
14051 | stwa %l6,[%i2+%g0]0x88 ! Mem[0000000010081400] = 000000ff | |
14052 | ! Mem[0000000010181410] = 76c6c4ff, %l3 = ffffffffffffff9c | |
14053 | ldstuba [%i6+%o5]0x88,%l3 ! %l3 = 000000ff000000ff | |
14054 | ! %l2 = 0000000000000000, Mem[0000000030141400] = 0000519c | |
14055 | stwa %l2,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000 | |
14056 | ! Mem[00000000100c1410] = 00000000, %l7 = fffffffffffffff8 | |
14057 | swapa [%i3+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
14058 | ! Mem[00000000201c0000] = 37ff9457, %l6 = 00000000000000ff | |
14059 | ldstuba [%o0+0x000]%asi,%l6 ! %l6 = 00000037000000ff | |
14060 | ! %f0 = ffc4c676 00ff0000, Mem[0000000030081408] = ffff00ff 00000000 | |
14061 | stda %f0 ,[%i2+%o4]0x81 ! Mem[0000000030081408] = ffc4c676 00ff0000 | |
14062 | ! Mem[0000000030001400] = 0000ffff, %l2 = 0000000000000000 | |
14063 | ldstuba [%i0+%g0]0x89,%l2 ! %l2 = 000000ff000000ff | |
14064 | ! Starting 10 instruction Load Burst | |
14065 | ! Mem[0000000010081428] = 000000fa, %l0 = 000000000000ffc4 | |
14066 | lduw [%i2+0x028],%l0 ! %l0 = 00000000000000fa | |
14067 | ||
14068 | p0_label_337: | |
14069 | ! Mem[0000000010181408] = 0000ffc4, %f16 = ff63a3fa | |
14070 | lda [%i6+%o4]0x88,%f16 ! %f16 = 0000ffc4 | |
14071 | ! Mem[00000000100c1430] = ffffffff, %l4 = 000000000000ffff | |
14072 | ldub [%i3+0x033],%l4 ! %l4 = 00000000000000ff | |
14073 | ! Mem[0000000010001400] = 94ff307d 00000000, %l6 = 00000037, %l7 = 00000000 | |
14074 | ldd [%i0+%g0],%l6 ! %l6 = 0000000094ff307d 0000000000000000 | |
14075 | ! Mem[0000000010141400] = ffff000000000000, %f22 = ff000000 00000000 | |
14076 | ldda [%i5+%g0]0x88,%f22 ! %f22 = ffff0000 00000000 | |
14077 | ! Mem[000000001010143c] = 00000000, %l2 = 00000000000000ff | |
14078 | ldsba [%i4+0x03d]%asi,%l2 ! %l2 = 0000000000000000 | |
14079 | ! Mem[0000000021800000] = 008f13a3, %l0 = 00000000000000fa | |
14080 | ldub [%o3+0x001],%l0 ! %l0 = 000000000000008f | |
14081 | ! Mem[0000000030041408] = 00000000, %l6 = 0000000094ff307d | |
14082 | lduba [%i1+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
14083 | membar #Sync ! Added by membar checker (56) | |
14084 | ! Mem[0000000010041400] = 665ef8fc 0000004e 00000000 000000ff | |
14085 | ! Mem[0000000010041410] = 00000000 0000f8b7 000000ff 00df0000 | |
14086 | ! Mem[0000000010041420] = 0000ff00 000000ff b179bad6 f8962d02 | |
14087 | ! Mem[0000000010041430] = ffffffff ff00ff00 fffffff8 0000007d | |
14088 | ldda [%i1]ASI_BLK_P,%f0 ! Block Load from 0000000010041400 | |
14089 | ! Mem[0000000030141410] = 000000fc, %l7 = 0000000000000000 | |
14090 | ldsba [%i5+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
14091 | ! Starting 10 instruction Store Burst | |
14092 | ! %l3 = 00000000000000ff, Mem[00000000100c1420] = ff00ffc423e3b300, %asi = 80 | |
14093 | stxa %l3,[%i3+0x020]%asi ! Mem[00000000100c1420] = 00000000000000ff | |
14094 | ||
14095 | p0_label_338: | |
14096 | ! Mem[0000000010041438] = fffffff80000007d, %l0 = 000000000000008f, %l5 = 00000000000000ff | |
14097 | add %i1,0x38,%g1 | |
14098 | casxa [%g1]0x80,%l0,%l5 ! %l5 = fffffff80000007d | |
14099 | ! %l1 = 0000000000000000, Mem[00000000100c1428] = 23e3b30000ffffff, %asi = 80 | |
14100 | stxa %l1,[%i3+0x028]%asi ! Mem[00000000100c1428] = 0000000000000000 | |
14101 | ! Mem[0000000030181410] = 00000000, %l4 = 00000000000000ff | |
14102 | swapa [%i6+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
14103 | ! Mem[0000000010001410] = ff000012, %l6 = 0000000000000000 | |
14104 | ldstuba [%i0+%o5]0x80,%l6 ! %l6 = 000000ff000000ff | |
14105 | ! Mem[0000000010081424] = 000000ff, %l3 = 00000000000000ff | |
14106 | swap [%i2+0x024],%l3 ! %l3 = 00000000000000ff | |
14107 | membar #Sync ! Added by membar checker (57) | |
14108 | ! %l7 = 0000000000000000, Mem[0000000010041400] = 665ef8fc0000004e | |
14109 | stx %l7,[%i1+%g0] ! Mem[0000000010041400] = 0000000000000000 | |
14110 | ! %l2 = 0000000000000000, Mem[0000000010101408] = 23000000ff793dab, %asi = 80 | |
14111 | stxa %l2,[%i4+0x008]%asi ! Mem[0000000010101408] = 0000000000000000 | |
14112 | ! Mem[000000001008140c] = 12000000, %l4 = 0000000000000000, %asi = 80 | |
14113 | swapa [%i2+0x00c]%asi,%l4 ! %l4 = 0000000012000000 | |
14114 | ! %f29 = 00000000, Mem[0000000030081410] = 9c156421 | |
14115 | sta %f29,[%i2+%o5]0x81 ! Mem[0000000030081410] = 00000000 | |
14116 | ! Starting 10 instruction Load Burst | |
14117 | ! Mem[00000000300c1400] = 36cbd553, %l6 = 00000000000000ff | |
14118 | lduba [%i3+%g0]0x81,%l6 ! %l6 = 0000000000000036 | |
14119 | ||
14120 | p0_label_339: | |
14121 | ! Mem[0000000010101408] = 00000000 00000000, %l0 = 0000008f, %l1 = 00000000 | |
14122 | ldda [%i4+%o4]0x88,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
14123 | ! Mem[0000000030181408] = 0000b3b7, %l1 = 0000000000000000 | |
14124 | ldswa [%i6+%o4]0x89,%l1 ! %l1 = 000000000000b3b7 | |
14125 | ! Mem[0000000030181410] = ff000000000000ff, %l7 = 0000000000000000 | |
14126 | ldxa [%i6+%o5]0x89,%l7 ! %l7 = ff000000000000ff | |
14127 | ! Mem[0000000030041400] = ff000000 ffffff00 00000000 00000000 | |
14128 | ! Mem[0000000030041410] = 00000000 ffffffff 00000000 ff0000ff | |
14129 | ! Mem[0000000030041420] = 00000000 76c6c4ff 000000ff ffb3e3ff | |
14130 | ! Mem[0000000030041430] = fc734517 00000000 0000ffff ff000000 | |
14131 | ldda [%i1]ASI_BLK_AIUSL,%f0 ! Block Load from 0000000030041400 | |
14132 | ! Mem[0000000010141408] = 000000ff, %l2 = 0000000000000000 | |
14133 | lduha [%i5+%o4]0x88,%l2 ! %l2 = 00000000000000ff | |
14134 | ! Mem[0000000030001408] = 9079ff00, %l1 = 000000000000b3b7 | |
14135 | ldsha [%i0+%o4]0x81,%l1 ! %l1 = ffffffffffff9079 | |
14136 | ! Mem[0000000010101410] = f8b7ffff00000076, %f20 = ffffffff ff000000 | |
14137 | ldda [%i4+%o5]0x80,%f20 ! %f20 = f8b7ffff 00000076 | |
14138 | ! Mem[0000000030081410] = 00000000, %f29 = 00000000 | |
14139 | lda [%i2+%o5]0x89,%f29 ! %f29 = 00000000 | |
14140 | ! Mem[0000000030041408] = 0000000000000000, %f18 = 0000ff00 76c6c4ff | |
14141 | ldda [%i1+%o4]0x81,%f18 ! %f18 = 00000000 00000000 | |
14142 | ! Starting 10 instruction Store Burst | |
14143 | ! Mem[00000000100c1439] = 5d57d4e0, %l6 = 0000000000000036 | |
14144 | ldstub [%i3+0x039],%l6 ! %l6 = 00000057000000ff | |
14145 | ||
14146 | p0_label_340: | |
14147 | ! %l7 = ff000000000000ff, Mem[000000001014141c] = 3eda2778, %asi = 80 | |
14148 | stwa %l7,[%i5+0x01c]%asi ! Mem[000000001014141c] = 000000ff | |
14149 | ! %f24 = 9c510000, Mem[0000000010041414] = 0000f8b7 | |
14150 | st %f24,[%i1+0x014] ! Mem[0000000010041414] = 9c510000 | |
14151 | ! Mem[0000000010141410] = ff000000, %l7 = ff000000000000ff | |
14152 | ldstuba [%i5+%o5]0x80,%l7 ! %l7 = 000000ff000000ff | |
14153 | ! %f17 = 53d5cb36, Mem[00000000300c1400] = 53d5cb36 | |
14154 | sta %f17,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 53d5cb36 | |
14155 | ! %f28 = 000000ff 00000000, Mem[0000000010041410] = 00000000 9c510000 | |
14156 | std %f28,[%i1+%o5] ! Mem[0000000010041410] = 000000ff 00000000 | |
14157 | ! %f18 = 00000000 00000000, Mem[0000000010001410] = ff000012 665ef8fc | |
14158 | stda %f18,[%i0+0x010]%asi ! Mem[0000000010001410] = 00000000 00000000 | |
14159 | ! %l0 = 00000000, %l1 = ffff9079, Mem[0000000030141408] = ffff004e 00000000 | |
14160 | stda %l0,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 ffff9079 | |
14161 | ! Mem[0000000010001400] = 94ff307d, %l4 = 0000000012000000 | |
14162 | swapa [%i0+%g0]0x80,%l4 ! %l4 = 0000000094ff307d | |
14163 | ! %f26 = 00000000 ff00ffff, %l5 = fffffff80000007d | |
14164 | ! Mem[0000000010101400] = 9c51000076c6c4ff | |
14165 | stda %f26,[%i4+%l5]ASI_PST16_PL ! Mem[0000000010101400] = ffff000000000000 | |
14166 | ! Starting 10 instruction Load Burst | |
14167 | ! Mem[00000000300c1408] = 00ffffff76c6c4ff, %l5 = fffffff80000007d | |
14168 | ldxa [%i3+%o4]0x81,%l5 ! %l5 = 00ffffff76c6c4ff | |
14169 | ||
14170 | ! Check Point 68 for processor 0 | |
14171 | ||
14172 | set p0_check_pt_data_68,%g4 | |
14173 | rd %ccr,%g5 ! %g5 = 44 | |
14174 | ldx [%g4+0x08],%g2 | |
14175 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
14176 | bne %xcc,p0_reg_check_fail0 | |
14177 | mov 0xee0,%g1 | |
14178 | ldx [%g4+0x10],%g2 | |
14179 | cmp %l1,%g2 ! %l1 = ffffffffffff9079 | |
14180 | bne %xcc,p0_reg_check_fail1 | |
14181 | mov 0xee1,%g1 | |
14182 | ldx [%g4+0x18],%g2 | |
14183 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
14184 | bne %xcc,p0_reg_check_fail2 | |
14185 | mov 0xee2,%g1 | |
14186 | ldx [%g4+0x20],%g2 | |
14187 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
14188 | bne %xcc,p0_reg_check_fail3 | |
14189 | mov 0xee3,%g1 | |
14190 | ldx [%g4+0x28],%g2 | |
14191 | cmp %l4,%g2 ! %l4 = 0000000094ff307d | |
14192 | bne %xcc,p0_reg_check_fail4 | |
14193 | mov 0xee4,%g1 | |
14194 | ldx [%g4+0x30],%g2 | |
14195 | cmp %l5,%g2 ! %l5 = 00ffffff76c6c4ff | |
14196 | bne %xcc,p0_reg_check_fail5 | |
14197 | mov 0xee5,%g1 | |
14198 | ldx [%g4+0x38],%g2 | |
14199 | cmp %l6,%g2 ! %l6 = 0000000000000057 | |
14200 | bne %xcc,p0_reg_check_fail6 | |
14201 | mov 0xee6,%g1 | |
14202 | ldx [%g4+0x40],%g2 | |
14203 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
14204 | bne %xcc,p0_reg_check_fail7 | |
14205 | mov 0xee7,%g1 | |
14206 | ldx [%g4+0x48],%g3 | |
14207 | std %f0,[%g4] | |
14208 | ldx [%g4],%g2 | |
14209 | cmp %g3,%g2 ! %f0 = 00ffffff 000000ff | |
14210 | bne %xcc,p0_freg_check_fail | |
14211 | mov 0xf00,%g1 | |
14212 | ldx [%g4+0x50],%g3 | |
14213 | std %f2,[%g4] | |
14214 | ldx [%g4],%g2 | |
14215 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
14216 | bne %xcc,p0_freg_check_fail | |
14217 | mov 0xf02,%g1 | |
14218 | ldx [%g4+0x58],%g3 | |
14219 | std %f4,[%g4] | |
14220 | ldx [%g4],%g2 | |
14221 | cmp %g3,%g2 ! %f4 = ffffffff 00000000 | |
14222 | bne %xcc,p0_freg_check_fail | |
14223 | mov 0xf04,%g1 | |
14224 | ldx [%g4+0x60],%g3 | |
14225 | std %f6,[%g4] | |
14226 | ldx [%g4],%g2 | |
14227 | cmp %g3,%g2 ! %f6 = ff0000ff 00000000 | |
14228 | bne %xcc,p0_freg_check_fail | |
14229 | mov 0xf06,%g1 | |
14230 | ldx [%g4+0x68],%g3 | |
14231 | std %f8,[%g4] | |
14232 | ldx [%g4],%g2 | |
14233 | cmp %g3,%g2 ! %f8 = ffc4c676 00000000 | |
14234 | bne %xcc,p0_freg_check_fail | |
14235 | mov 0xf08,%g1 | |
14236 | ldx [%g4+0x70],%g3 | |
14237 | std %f10,[%g4] | |
14238 | ldx [%g4],%g2 | |
14239 | cmp %g3,%g2 ! %f10 = ffe3b3ff ff000000 | |
14240 | bne %xcc,p0_freg_check_fail | |
14241 | mov 0xf10,%g1 | |
14242 | ldx [%g4+0x78],%g3 | |
14243 | std %f12,[%g4] | |
14244 | ldx [%g4],%g2 | |
14245 | cmp %g3,%g2 ! %f12 = 00000000 174573fc | |
14246 | bne %xcc,p0_freg_check_fail | |
14247 | mov 0xf12,%g1 | |
14248 | ldx [%g4+0x80],%g3 | |
14249 | std %f14,[%g4] | |
14250 | ldx [%g4],%g2 | |
14251 | cmp %g3,%g2 ! %f14 = 000000ff ffff0000 | |
14252 | bne %xcc,p0_freg_check_fail | |
14253 | mov 0xf14,%g1 | |
14254 | ldx [%g4+0x88],%g3 | |
14255 | std %f16,[%g4] | |
14256 | ldx [%g4],%g2 | |
14257 | cmp %g3,%g2 ! %f16 = 0000ffc4 53d5cb36 | |
14258 | bne %xcc,p0_freg_check_fail | |
14259 | mov 0xf16,%g1 | |
14260 | ldx [%g4+0x90],%g3 | |
14261 | std %f18,[%g4] | |
14262 | ldx [%g4],%g2 | |
14263 | cmp %g3,%g2 ! %f18 = 00000000 00000000 | |
14264 | bne %xcc,p0_freg_check_fail | |
14265 | mov 0xf18,%g1 | |
14266 | ldx [%g4+0x98],%g3 | |
14267 | std %f20,[%g4] | |
14268 | ldx [%g4],%g2 | |
14269 | cmp %g3,%g2 ! %f20 = f8b7ffff 00000076 | |
14270 | bne %xcc,p0_freg_check_fail | |
14271 | mov 0xf20,%g1 | |
14272 | ldx [%g4+0xa0],%g3 | |
14273 | std %f22,[%g4] | |
14274 | ldx [%g4],%g2 | |
14275 | cmp %g3,%g2 ! %f22 = ffff0000 00000000 | |
14276 | bne %xcc,p0_freg_check_fail | |
14277 | mov 0xf22,%g1 | |
14278 | ldx [%g4+0xa8],%g3 | |
14279 | std %f28,[%g4] | |
14280 | ldx [%g4],%g2 | |
14281 | cmp %g3,%g2 ! %f28 = 000000ff 00000000 | |
14282 | bne %xcc,p0_freg_check_fail | |
14283 | mov 0xf28,%g1 | |
14284 | ||
14285 | ! Check Point 68 completed | |
14286 | ||
14287 | ||
14288 | p0_label_341: | |
14289 | ! Mem[0000000010041400] = 00000000, %l5 = 00ffffff76c6c4ff | |
14290 | lduba [%i1+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
14291 | ! Mem[0000000010101408] = 00000000, %f21 = 00000076 | |
14292 | lda [%i4+%o4]0x88,%f21 ! %f21 = 00000000 | |
14293 | ! Mem[0000000010001418] = 000000ff, %l1 = ffffffffffff9079 | |
14294 | ldsh [%i0+0x018],%l1 ! %l1 = 0000000000000000 | |
14295 | ! Mem[0000000030141408] = 00000000, %l5 = 0000000000000000 | |
14296 | ldswa [%i5+%o4]0x81,%l5 ! %l5 = 0000000000000000 | |
14297 | ! Mem[00000000300c1410] = ff000000, %l7 = 00000000000000ff | |
14298 | ldsha [%i3+%o5]0x81,%l7 ! %l7 = ffffffffffffff00 | |
14299 | ! Mem[0000000030041410] = 00000000, %l7 = ffffffffffffff00 | |
14300 | ldsha [%i1+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
14301 | ! Mem[0000000010001410] = 0000000000000000, %f16 = 0000ffc4 53d5cb36 | |
14302 | ldda [%i0+%o5]0x80,%f16 ! %f16 = 00000000 00000000 | |
14303 | ! Mem[0000000030041410] = 00000000, %f15 = ffff0000 | |
14304 | lda [%i1+%o5]0x81,%f15 ! %f15 = 00000000 | |
14305 | ! Mem[0000000030041410] = ffffffff 00000000, %l2 = 000000ff, %l3 = 000000ff | |
14306 | ldda [%i1+%o5]0x89,%l2 ! %l2 = 0000000000000000 00000000ffffffff | |
14307 | ! Starting 10 instruction Store Burst | |
14308 | ! %f18 = 00000000, Mem[0000000010041420] = 0000ff00 | |
14309 | st %f18,[%i1+0x020] ! Mem[0000000010041420] = 00000000 | |
14310 | ||
14311 | p0_label_342: | |
14312 | ! Mem[0000000021800180] = 00ffe2ae, %l4 = 0000000094ff307d | |
14313 | ldstub [%o3+0x180],%l4 ! %l4 = 00000000000000ff | |
14314 | ! Mem[00000000100c1408] = 2164159c, %l5 = 0000000000000000 | |
14315 | swapa [%i3+%o4]0x88,%l5 ! %l5 = 000000002164159c | |
14316 | ! %l4 = 00000000, %l5 = 2164159c, Mem[0000000030181408] = 0000b3b7 ff000000 | |
14317 | stda %l4,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000 2164159c | |
14318 | ! Mem[000000001010142c] = f8960000, %l6 = 0000000000000057, %asi = 80 | |
14319 | swapa [%i4+0x02c]%asi,%l6 ! %l6 = 00000000f8960000 | |
14320 | ! Mem[000000001014141c] = 000000ff, %l7 = 0000000000000000 | |
14321 | swap [%i5+0x01c],%l7 ! %l7 = 00000000000000ff | |
14322 | ! %l2 = 0000000000000000, Mem[0000000030181400] = ffa60000 | |
14323 | stwa %l2,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00000000 | |
14324 | ! %f27 = ff00ffff, Mem[0000000010181404] = 00000012 | |
14325 | st %f27,[%i6+0x004] ! Mem[0000000010181404] = ff00ffff | |
14326 | ! Mem[0000000010141408] = 000000ff, %l1 = 0000000000000000 | |
14327 | swapa [%i5+%o4]0x88,%l1 ! %l1 = 00000000000000ff | |
14328 | ! Mem[0000000030181410] = 000000ff, %l5 = 000000002164159c | |
14329 | swapa [%i6+%o5]0x89,%l5 ! %l5 = 00000000000000ff | |
14330 | ! Starting 10 instruction Load Burst | |
14331 | ! Mem[0000000010001420] = 00000000, %f10 = ffe3b3ff | |
14332 | ld [%i0+0x020],%f10 ! %f10 = 00000000 | |
14333 | ||
14334 | p0_label_343: | |
14335 | ! Mem[0000000010181428] = ff000000, %l1 = 00000000000000ff | |
14336 | ldsba [%i6+0x029]%asi,%l1 ! %l1 = 0000000000000000 | |
14337 | ! Mem[0000000030001400] = ffff0000, %l1 = 0000000000000000 | |
14338 | ldswa [%i0+%g0]0x81,%l1 ! %l1 = ffffffffffff0000 | |
14339 | ! Mem[0000000010141400] = 00000000, %l4 = 0000000000000000 | |
14340 | ldswa [%i5+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
14341 | ! Mem[0000000010001400] = 12000000, %l2 = 0000000000000000 | |
14342 | lduba [%i0+%g0]0x80,%l2 ! %l2 = 0000000000000012 | |
14343 | ! Mem[0000000010101408] = 00000000 00000000, %l6 = f8960000, %l7 = 000000ff | |
14344 | ldda [%i4+%o4]0x88,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
14345 | ! Mem[0000000010041404] = 00000000, %l3 = 00000000ffffffff | |
14346 | lduwa [%i1+0x004]%asi,%l3 ! %l3 = 0000000000000000 | |
14347 | ! Mem[0000000030081410] = 00000000, %l1 = ffffffffffff0000 | |
14348 | lduha [%i2+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
14349 | ! Mem[0000000010001410] = 00000000, %l0 = 0000000000000000 | |
14350 | ldsba [%i0+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
14351 | ! Mem[00000000100c1410] = f8ffffff00ffffff, %f0 = 00ffffff 000000ff | |
14352 | ldda [%i3+%o5]0x80,%f0 ! %f0 = f8ffffff 00ffffff | |
14353 | ! Starting 10 instruction Store Burst | |
14354 | ! Mem[00000000100c1410] = f8ffffff, %l2 = 0000000000000012 | |
14355 | swapa [%i3+%o5]0x80,%l2 ! %l2 = 00000000f8ffffff | |
14356 | ||
14357 | p0_label_344: | |
14358 | ! %f23 = 00000000, Mem[00000000300c1410] = 000000ff | |
14359 | sta %f23,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 00000000 | |
14360 | ! %l3 = 0000000000000000, Mem[00000000300c1408] = 00ffffff | |
14361 | stba %l3,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 00ffffff | |
14362 | ! %f0 = f8ffffff 00ffffff 00000000 00000000 | |
14363 | ! %f4 = ffffffff 00000000 ff0000ff 00000000 | |
14364 | ! %f8 = ffc4c676 00000000 00000000 ff000000 | |
14365 | ! %f12 = 00000000 174573fc 000000ff 00000000 | |
14366 | stda %f0,[%i1]ASI_BLK_AIUS ! Block Store to 0000000030041400 | |
14367 | ! %l2 = f8ffffff, %l3 = 00000000, Mem[0000000010081410] = ff000000 edf0a6df | |
14368 | stda %l2,[%i2+0x010]%asi ! Mem[0000000010081410] = f8ffffff 00000000 | |
14369 | ! Mem[00000000100c1434] = fff85e66, %l4 = 0000000000000000, %asi = 80 | |
14370 | swapa [%i3+0x034]%asi,%l4 ! %l4 = 00000000fff85e66 | |
14371 | ! %f28 = 000000ff 00000000, Mem[0000000010141408] = 00000000 00000000 | |
14372 | stda %f28,[%i5+%o4]0x80 ! Mem[0000000010141408] = 000000ff 00000000 | |
14373 | ! %l5 = 00000000000000ff, Mem[0000000010081408] = 00b3ffff | |
14374 | stha %l5,[%i2+%o4]0x88 ! Mem[0000000010081408] = 00b300ff | |
14375 | ! Mem[0000000010001410] = 00000000, %l7 = 0000000000000000 | |
14376 | ldstuba [%i0+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
14377 | ! %l0 = 0000000000000000, Mem[0000000010001400] = 00000012 | |
14378 | stwa %l0,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 | |
14379 | ! Starting 10 instruction Load Burst | |
14380 | membar #Sync ! Added by membar checker (58) | |
14381 | ! Mem[0000000030041400] = f8ffffff, %l4 = 00000000fff85e66 | |
14382 | ldswa [%i1+%g0]0x81,%l4 ! %l4 = fffffffff8ffffff | |
14383 | ||
14384 | p0_label_345: | |
14385 | ! Mem[0000000010041410] = 000000ff, %l4 = fffffffff8ffffff | |
14386 | lduwa [%i1+%o5]0x80,%l4 ! %l4 = 00000000000000ff | |
14387 | ! Mem[0000000030101400] = 00000000, %l4 = 00000000000000ff | |
14388 | ldswa [%i4+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
14389 | ! Mem[0000000010041438] = fffffff8, %l2 = 00000000f8ffffff | |
14390 | lduw [%i1+0x038],%l2 ! %l2 = 00000000fffffff8 | |
14391 | ! Mem[0000000010181400] = 00000000 ff00ffff c4ff0000 00000000 | |
14392 | ! Mem[0000000010181410] = ffc4c676 665ef8ff ff000000 6600f8ff | |
14393 | ! Mem[0000000010181420] = 7a0000ff ff000000 ff000000 00000000 | |
14394 | ! Mem[0000000010181430] = 10ac7b59 3eda2778 ff000000 00000000 | |
14395 | ldda [%i6]ASI_BLK_P,%f16 ! Block Load from 0000000010181400 | |
14396 | ! Mem[0000000010001410] = ff000000 00000000, %l4 = 00000000, %l5 = 000000ff | |
14397 | ldda [%i0+%o5]0x80,%l4 ! %l4 = 00000000ff000000 0000000000000000 | |
14398 | ! Mem[0000000030141410] = fc000000, %l4 = 00000000ff000000 | |
14399 | ldsba [%i5+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
14400 | ! Mem[0000000010141400] = ffff000000000000, %l1 = 0000000000000000 | |
14401 | ldxa [%i5+%g0]0x88,%l1 ! %l1 = ffff000000000000 | |
14402 | ! Mem[0000000010101420] = 1f41ff76, %l7 = 0000000000000000 | |
14403 | ldub [%i4+0x020],%l7 ! %l7 = 000000000000001f | |
14404 | ! Mem[0000000010181434] = 3eda2778, %l1 = ffff000000000000 | |
14405 | lduwa [%i6+0x034]%asi,%l1 ! %l1 = 000000003eda2778 | |
14406 | ! Starting 10 instruction Store Burst | |
14407 | ! %l2 = 00000000fffffff8, Mem[0000000010141408] = 000000ff | |
14408 | stba %l2,[%i5+%o4]0x80 ! Mem[0000000010141408] = f80000ff | |
14409 | ||
14410 | ! Check Point 69 for processor 0 | |
14411 | ||
14412 | set p0_check_pt_data_69,%g4 | |
14413 | rd %ccr,%g5 ! %g5 = 44 | |
14414 | ldx [%g4+0x08],%g2 | |
14415 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
14416 | bne %xcc,p0_reg_check_fail0 | |
14417 | mov 0xee0,%g1 | |
14418 | ldx [%g4+0x10],%g2 | |
14419 | cmp %l1,%g2 ! %l1 = 000000003eda2778 | |
14420 | bne %xcc,p0_reg_check_fail1 | |
14421 | mov 0xee1,%g1 | |
14422 | ldx [%g4+0x18],%g2 | |
14423 | cmp %l2,%g2 ! %l2 = 00000000fffffff8 | |
14424 | bne %xcc,p0_reg_check_fail2 | |
14425 | mov 0xee2,%g1 | |
14426 | ldx [%g4+0x20],%g2 | |
14427 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
14428 | bne %xcc,p0_reg_check_fail3 | |
14429 | mov 0xee3,%g1 | |
14430 | ldx [%g4+0x28],%g2 | |
14431 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
14432 | bne %xcc,p0_reg_check_fail4 | |
14433 | mov 0xee4,%g1 | |
14434 | ldx [%g4+0x30],%g2 | |
14435 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
14436 | bne %xcc,p0_reg_check_fail5 | |
14437 | mov 0xee5,%g1 | |
14438 | ldx [%g4+0x38],%g2 | |
14439 | cmp %l7,%g2 ! %l7 = 000000000000001f | |
14440 | bne %xcc,p0_reg_check_fail7 | |
14441 | mov 0xee7,%g1 | |
14442 | ldx [%g4+0x40],%g3 | |
14443 | std %f0,[%g4] | |
14444 | ldx [%g4],%g2 | |
14445 | cmp %g3,%g2 ! %f0 = f8ffffff 00ffffff | |
14446 | bne %xcc,p0_freg_check_fail | |
14447 | mov 0xf00,%g1 | |
14448 | ldx [%g4+0x48],%g3 | |
14449 | std %f2,[%g4] | |
14450 | ldx [%g4],%g2 | |
14451 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
14452 | bne %xcc,p0_freg_check_fail | |
14453 | mov 0xf02,%g1 | |
14454 | ldx [%g4+0x50],%g3 | |
14455 | std %f4,[%g4] | |
14456 | ldx [%g4],%g2 | |
14457 | cmp %g3,%g2 ! %f4 = ffffffff 00000000 | |
14458 | bne %xcc,p0_freg_check_fail | |
14459 | mov 0xf04,%g1 | |
14460 | ldx [%g4+0x58],%g3 | |
14461 | std %f6,[%g4] | |
14462 | ldx [%g4],%g2 | |
14463 | cmp %g3,%g2 ! %f6 = ff0000ff 00000000 | |
14464 | bne %xcc,p0_freg_check_fail | |
14465 | mov 0xf06,%g1 | |
14466 | ldx [%g4+0x60],%g3 | |
14467 | std %f10,[%g4] | |
14468 | ldx [%g4],%g2 | |
14469 | cmp %g3,%g2 ! %f10 = 00000000 ff000000 | |
14470 | bne %xcc,p0_freg_check_fail | |
14471 | mov 0xf10,%g1 | |
14472 | ldx [%g4+0x68],%g3 | |
14473 | std %f14,[%g4] | |
14474 | ldx [%g4],%g2 | |
14475 | cmp %g3,%g2 ! %f14 = 000000ff 00000000 | |
14476 | bne %xcc,p0_freg_check_fail | |
14477 | mov 0xf14,%g1 | |
14478 | ldx [%g4+0x70],%g3 | |
14479 | std %f16,[%g4] | |
14480 | ldx [%g4],%g2 | |
14481 | cmp %g3,%g2 ! %f16 = 00000000 ff00ffff | |
14482 | bne %xcc,p0_freg_check_fail | |
14483 | mov 0xf16,%g1 | |
14484 | ldx [%g4+0x78],%g3 | |
14485 | std %f18,[%g4] | |
14486 | ldx [%g4],%g2 | |
14487 | cmp %g3,%g2 ! %f18 = c4ff0000 00000000 | |
14488 | bne %xcc,p0_freg_check_fail | |
14489 | mov 0xf18,%g1 | |
14490 | ldx [%g4+0x80],%g3 | |
14491 | std %f20,[%g4] | |
14492 | ldx [%g4],%g2 | |
14493 | cmp %g3,%g2 ! %f20 = ffc4c676 665ef8ff | |
14494 | bne %xcc,p0_freg_check_fail | |
14495 | mov 0xf20,%g1 | |
14496 | ldx [%g4+0x88],%g3 | |
14497 | std %f22,[%g4] | |
14498 | ldx [%g4],%g2 | |
14499 | cmp %g3,%g2 ! %f22 = ff000000 6600f8ff | |
14500 | bne %xcc,p0_freg_check_fail | |
14501 | mov 0xf22,%g1 | |
14502 | ldx [%g4+0x90],%g3 | |
14503 | std %f24,[%g4] | |
14504 | ldx [%g4],%g2 | |
14505 | cmp %g3,%g2 ! %f24 = 7a0000ff ff000000 | |
14506 | bne %xcc,p0_freg_check_fail | |
14507 | mov 0xf24,%g1 | |
14508 | ldx [%g4+0x98],%g3 | |
14509 | std %f26,[%g4] | |
14510 | ldx [%g4],%g2 | |
14511 | cmp %g3,%g2 ! %f26 = ff000000 00000000 | |
14512 | bne %xcc,p0_freg_check_fail | |
14513 | mov 0xf26,%g1 | |
14514 | ldx [%g4+0xa0],%g3 | |
14515 | std %f28,[%g4] | |
14516 | ldx [%g4],%g2 | |
14517 | cmp %g3,%g2 ! %f28 = 10ac7b59 3eda2778 | |
14518 | bne %xcc,p0_freg_check_fail | |
14519 | mov 0xf28,%g1 | |
14520 | ldx [%g4+0xa8],%g3 | |
14521 | std %f30,[%g4] | |
14522 | ldx [%g4],%g2 | |
14523 | cmp %g3,%g2 ! %f30 = ff000000 00000000 | |
14524 | bne %xcc,p0_freg_check_fail | |
14525 | mov 0xf30,%g1 | |
14526 | ||
14527 | ! Check Point 69 completed | |
14528 | ||
14529 | ||
14530 | p0_label_346: | |
14531 | ! Mem[00000000100c141c] = ff000000, %l1 = 000000003eda2778, %asi = 80 | |
14532 | swapa [%i3+0x01c]%asi,%l1 ! %l1 = 00000000ff000000 | |
14533 | ! %f26 = ff000000 00000000, Mem[0000000010041400] = 00000000 00000000 | |
14534 | std %f26,[%i1+%g0] ! Mem[0000000010041400] = ff000000 00000000 | |
14535 | ! %l2 = 00000000fffffff8, Mem[0000000010101410] = f8b7ffff | |
14536 | stwa %l2,[%i4+%o5]0x80 ! Mem[0000000010101410] = fffffff8 | |
14537 | ! Mem[00000000218001c0] = fff32a00, %l7 = 000000000000001f | |
14538 | ldstuba [%o3+0x1c0]%asi,%l7 ! %l7 = 000000ff000000ff | |
14539 | ! %l7 = 00000000000000ff, Mem[0000000020800000] = e3008470 | |
14540 | stb %l7,[%o1+%g0] ! Mem[0000000020800000] = ff008470 | |
14541 | ! Mem[0000000010101438] = ff793dab, %l5 = 0000000000000000 | |
14542 | swap [%i4+0x038],%l5 ! %l5 = 00000000ff793dab | |
14543 | ! %l2 = 00000000fffffff8, Mem[0000000030001400] = ffff0000 | |
14544 | stha %l2,[%i0+%g0]0x81 ! Mem[0000000030001400] = fff80000 | |
14545 | ! Mem[0000000030081408] = ffc4c676, %l6 = 0000000000000000 | |
14546 | ldstuba [%i2+%o4]0x81,%l6 ! %l6 = 000000ff000000ff | |
14547 | ! Mem[0000000010101400] = 0000ffff, %l5 = 00000000ff793dab | |
14548 | ldstuba [%i4+%g0]0x88,%l5 ! %l5 = 000000ff000000ff | |
14549 | ! Starting 10 instruction Load Burst | |
14550 | ! Mem[0000000030181400] = 00000000, %f15 = 00000000 | |
14551 | lda [%i6+%g0]0x81,%f15 ! %f15 = 00000000 | |
14552 | ||
14553 | p0_label_347: | |
14554 | ! Mem[00000000211c0000] = 9c001a4c, %l5 = 00000000000000ff | |
14555 | ldsha [%o2+0x000]%asi,%l5 ! %l5 = ffffffffffff9c00 | |
14556 | ! Mem[0000000010041424] = 000000ff, %f31 = 00000000 | |
14557 | lda [%i1+0x024]%asi,%f31 ! %f31 = 000000ff | |
14558 | ! Mem[0000000010101404] = 00000000, %l2 = 00000000fffffff8 | |
14559 | ldsh [%i4+0x006],%l2 ! %l2 = 0000000000000000 | |
14560 | ! Mem[0000000030141410] = 000000fc, %l7 = 00000000000000ff | |
14561 | lduba [%i5+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
14562 | ! Mem[0000000010081400] = 000000ff, %l5 = ffffffffffff9c00 | |
14563 | ldswa [%i2+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
14564 | ! Mem[0000000010041410] = 00000000 ff000000, %l6 = 000000ff, %l7 = 00000000 | |
14565 | ldda [%i1+%o5]0x88,%l6 ! %l6 = 00000000ff000000 0000000000000000 | |
14566 | ! Mem[0000000010081410] = 00000000 fffffff8, %l6 = ff000000, %l7 = 00000000 | |
14567 | ldda [%i2+%o5]0x88,%l6 ! %l6 = 00000000fffffff8 0000000000000000 | |
14568 | ! Mem[0000000010141424] = c7ec13bb, %l7 = 0000000000000000 | |
14569 | ldsba [%i5+0x024]%asi,%l7 ! %l7 = ffffffffffffffc7 | |
14570 | ! Mem[00000000300c1408] = 00ffffff, %l1 = 00000000ff000000 | |
14571 | ldsba [%i3+%o4]0x81,%l1 ! %l1 = 0000000000000000 | |
14572 | ! Starting 10 instruction Store Burst | |
14573 | ! %l0 = 0000000000000000, Mem[00000000211c0001] = 9c001a4c, %asi = 80 | |
14574 | stba %l0,[%o2+0x001]%asi ! Mem[00000000211c0000] = 9c001a4c | |
14575 | ||
14576 | p0_label_348: | |
14577 | ! %l6 = 00000000fffffff8, Mem[00000000100c1400] = ffc4c67600000000 | |
14578 | stxa %l6,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00000000fffffff8 | |
14579 | ! %l5 = 00000000000000ff, Mem[00000000100c1400] = 00000000, %asi = 80 | |
14580 | stwa %l5,[%i3+0x000]%asi ! Mem[00000000100c1400] = 000000ff | |
14581 | ! %l3 = 0000000000000000, Mem[0000000010141408] = f80000ff00000000 | |
14582 | stxa %l3,[%i5+%o4]0x80 ! Mem[0000000010141408] = 0000000000000000 | |
14583 | ! %l5 = 00000000000000ff, Mem[0000000030001400] = 0000f8ff | |
14584 | stba %l5,[%i0+%g0]0x89 ! Mem[0000000030001400] = 0000f8ff | |
14585 | membar #Sync ! Added by membar checker (59) | |
14586 | ! %f16 = 00000000 ff00ffff, Mem[0000000010181400] = 00000000 ffff00ff | |
14587 | stda %f16,[%i6+%g0]0x88 ! Mem[0000000010181400] = 00000000 ff00ffff | |
14588 | ! Mem[00000000211c0001] = 9c001a4c, %l4 = 0000000000000000 | |
14589 | ldstub [%o2+0x001],%l4 ! %l4 = 00000000000000ff | |
14590 | ! Mem[0000000010081418] = f8b7ffff, %l3 = 0000000000000000 | |
14591 | swap [%i2+0x018],%l3 ! %l3 = 00000000f8b7ffff | |
14592 | ! %l4 = 0000000000000000, Mem[0000000010001400] = 0000000000000000 | |
14593 | stxa %l4,[%i0+%g0]0x80 ! Mem[0000000010001400] = 0000000000000000 | |
14594 | ! %f16 = 00000000, Mem[0000000030181400] = 00000000 | |
14595 | sta %f16,[%i6+%g0]0x89 ! Mem[0000000030181400] = 00000000 | |
14596 | ! Starting 10 instruction Load Burst | |
14597 | ! Mem[0000000030041408] = 00000000 00000000, %l2 = 00000000, %l3 = f8b7ffff | |
14598 | ldda [%i1+%o4]0x89,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
14599 | ||
14600 | p0_label_349: | |
14601 | ! Mem[00000000100c1410] = 00000012, %l6 = 00000000fffffff8 | |
14602 | ldswa [%i3+0x010]%asi,%l6 ! %l6 = 0000000000000012 | |
14603 | ! Mem[0000000010141438] = 00000000, %l7 = ffffffffffffffc7 | |
14604 | ldswa [%i5+0x038]%asi,%l7 ! %l7 = 0000000000000000 | |
14605 | ! Mem[00000000100c1408] = 00000000, %f11 = ff000000 | |
14606 | lda [%i3+%o4]0x80,%f11 ! %f11 = 00000000 | |
14607 | ! Mem[00000000100c1400] = ff000000, %l4 = 0000000000000000 | |
14608 | ldswa [%i3+%g0]0x88,%l4 ! %l4 = ffffffffff000000 | |
14609 | ! Mem[0000000030141400] = 00000000, %l7 = 0000000000000000 | |
14610 | lduba [%i5+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
14611 | ! Mem[0000000030041408] = 00000000, %l0 = 0000000000000000 | |
14612 | ldsha [%i1+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
14613 | ! Mem[00000000100c1410] = 00000012, %l7 = 0000000000000000 | |
14614 | ldswa [%i3+%o5]0x80,%l7 ! %l7 = 0000000000000012 | |
14615 | ! Mem[00000000100c1408] = 00000000, %l0 = 0000000000000000 | |
14616 | ldsba [%i3+%o4]0x80,%l0 ! %l0 = 0000000000000000 | |
14617 | ! Mem[0000000010041408] = 00000000, %l1 = 0000000000000000 | |
14618 | ldsba [%i1+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
14619 | ! Starting 10 instruction Store Burst | |
14620 | ! %f20 = ffc4c676, Mem[0000000010141408] = 00000000 | |
14621 | sta %f20,[%i5+%o4]0x80 ! Mem[0000000010141408] = ffc4c676 | |
14622 | ||
14623 | p0_label_350: | |
14624 | ! Mem[0000000010101418] = fcc4c676, %l7 = 0000000000000012, %asi = 80 | |
14625 | swapa [%i4+0x018]%asi,%l7 ! %l7 = 00000000fcc4c676 | |
14626 | ! %f15 = 00000000, Mem[0000000010181400] = ff00ffff | |
14627 | sta %f15,[%i6+%g0]0x88 ! Mem[0000000010181400] = 00000000 | |
14628 | ! %f28 = 10ac7b59 3eda2778, Mem[0000000010081408] = ff00b300 00000000 | |
14629 | std %f28,[%i2+%o4] ! Mem[0000000010081408] = 10ac7b59 3eda2778 | |
14630 | ! Mem[0000000030001410] = 159c519c, %l3 = 0000000000000000 | |
14631 | ldstuba [%i0+%o5]0x81,%l3 ! %l3 = 00000015000000ff | |
14632 | ! %f30 = ff000000 000000ff, Mem[0000000030101410] = 9c156421 000000ff | |
14633 | stda %f30,[%i4+%o5]0x81 ! Mem[0000000030101410] = ff000000 000000ff | |
14634 | ! %l7 = 00000000fcc4c676, Mem[0000000030141400] = 00000000 | |
14635 | stha %l7,[%i5+%g0]0x81 ! Mem[0000000030141400] = c6760000 | |
14636 | ! %l6 = 0000000000000012, Mem[0000000030001410] = 9c519cff | |
14637 | stba %l6,[%i0+%o5]0x89 ! Mem[0000000030001410] = 9c519c12 | |
14638 | ! %f19 = 00000000, Mem[0000000010041400] = 000000ff | |
14639 | sta %f19,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 | |
14640 | ! Mem[0000000010041408] = 00000000, %l3 = 0000000000000015 | |
14641 | swapa [%i1+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
14642 | ! Starting 10 instruction Load Burst | |
14643 | ! Mem[00000000100c142c] = 00000000, %l0 = 0000000000000000 | |
14644 | ldsw [%i3+0x02c],%l0 ! %l0 = 0000000000000000 | |
14645 | ||
14646 | ! Check Point 70 for processor 0 | |
14647 | ||
14648 | set p0_check_pt_data_70,%g4 | |
14649 | rd %ccr,%g5 ! %g5 = 44 | |
14650 | ldx [%g4+0x08],%g2 | |
14651 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
14652 | bne %xcc,p0_reg_check_fail0 | |
14653 | mov 0xee0,%g1 | |
14654 | ldx [%g4+0x10],%g2 | |
14655 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
14656 | bne %xcc,p0_reg_check_fail1 | |
14657 | mov 0xee1,%g1 | |
14658 | ldx [%g4+0x18],%g2 | |
14659 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
14660 | bne %xcc,p0_reg_check_fail2 | |
14661 | mov 0xee2,%g1 | |
14662 | ldx [%g4+0x20],%g2 | |
14663 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
14664 | bne %xcc,p0_reg_check_fail3 | |
14665 | mov 0xee3,%g1 | |
14666 | ldx [%g4+0x28],%g2 | |
14667 | cmp %l4,%g2 ! %l4 = ffffffffff000000 | |
14668 | bne %xcc,p0_reg_check_fail4 | |
14669 | mov 0xee4,%g1 | |
14670 | ldx [%g4+0x30],%g2 | |
14671 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
14672 | bne %xcc,p0_reg_check_fail5 | |
14673 | mov 0xee5,%g1 | |
14674 | ldx [%g4+0x38],%g2 | |
14675 | cmp %l6,%g2 ! %l6 = 0000000000000012 | |
14676 | bne %xcc,p0_reg_check_fail6 | |
14677 | mov 0xee6,%g1 | |
14678 | ldx [%g4+0x40],%g2 | |
14679 | cmp %l7,%g2 ! %l7 = 00000000fcc4c676 | |
14680 | bne %xcc,p0_reg_check_fail7 | |
14681 | mov 0xee7,%g1 | |
14682 | ldx [%g4+0x48],%g3 | |
14683 | std %f2,[%g4] | |
14684 | ldx [%g4],%g2 | |
14685 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
14686 | bne %xcc,p0_freg_check_fail | |
14687 | mov 0xf02,%g1 | |
14688 | ldx [%g4+0x50],%g3 | |
14689 | std %f6,[%g4] | |
14690 | ldx [%g4],%g2 | |
14691 | cmp %g3,%g2 ! %f6 = ff0000ff 00000000 | |
14692 | bne %xcc,p0_freg_check_fail | |
14693 | mov 0xf06,%g1 | |
14694 | ldx [%g4+0x58],%g3 | |
14695 | std %f10,[%g4] | |
14696 | ldx [%g4],%g2 | |
14697 | cmp %g3,%g2 ! %f10 = 00000000 00000000 | |
14698 | bne %xcc,p0_freg_check_fail | |
14699 | mov 0xf10,%g1 | |
14700 | ldx [%g4+0x60],%g3 | |
14701 | std %f14,[%g4] | |
14702 | ldx [%g4],%g2 | |
14703 | cmp %g3,%g2 ! %f14 = 000000ff 00000000 | |
14704 | bne %xcc,p0_freg_check_fail | |
14705 | mov 0xf14,%g1 | |
14706 | ldx [%g4+0x68],%g3 | |
14707 | std %f30,[%g4] | |
14708 | ldx [%g4],%g2 | |
14709 | cmp %g3,%g2 ! %f30 = ff000000 000000ff | |
14710 | bne %xcc,p0_freg_check_fail | |
14711 | mov 0xf30,%g1 | |
14712 | ||
14713 | ! Check Point 70 completed | |
14714 | ||
14715 | ||
14716 | p0_label_351: | |
14717 | ! Mem[0000000030141408] = 7990ffff00000000, %l2 = 0000000000000000 | |
14718 | ldxa [%i5+%o4]0x89,%l2 ! %l2 = 7990ffff00000000 | |
14719 | ! Mem[0000000010041408] = 15000000 000000ff, %l2 = 00000000, %l3 = 00000000 | |
14720 | ldda [%i1+%o4]0x80,%l2 ! %l2 = 0000000015000000 00000000000000ff | |
14721 | ! Mem[0000000010041404] = 00000000, %l1 = 0000000000000000 | |
14722 | ldsw [%i1+0x004],%l1 ! %l1 = 0000000000000000 | |
14723 | ! Mem[000000001010141c] = 000000ff, %l6 = 0000000000000012 | |
14724 | ldsba [%i4+0x01e]%asi,%l6 ! %l6 = 0000000000000000 | |
14725 | ! Mem[0000000010081418] = 00000000, %f7 = 00000000 | |
14726 | lda [%i2+0x018]%asi,%f7 ! %f7 = 00000000 | |
14727 | ! Mem[0000000010101408] = 0000000000000000, %f14 = 000000ff 00000000 | |
14728 | ldda [%i4+%o4]0x88,%f14 ! %f14 = 00000000 00000000 | |
14729 | ! Mem[0000000010181408] = c4ff000000000000, %l7 = 00000000fcc4c676 | |
14730 | ldxa [%i6+%o4]0x80,%l7 ! %l7 = c4ff000000000000 | |
14731 | ! Mem[00000000201c0000] = ffff9457, %l1 = 0000000000000000 | |
14732 | ldsb [%o0+%g0],%l1 ! %l1 = ffffffffffffffff | |
14733 | ! Mem[0000000030081410] = 00000000, %l2 = 0000000015000000 | |
14734 | lduba [%i2+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
14735 | ! Starting 10 instruction Store Burst | |
14736 | ! %l5 = 00000000000000ff, Mem[0000000010141410] = ff000000 | |
14737 | stha %l5,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00ff0000 | |
14738 | ||
14739 | p0_label_352: | |
14740 | ! Mem[0000000030141410] = fc000000, %l3 = 00000000000000ff | |
14741 | ldstuba [%i5+%o5]0x89,%l3 ! %l3 = 00000000000000ff | |
14742 | ! %l4 = ffffffffff000000, Mem[0000000030101408] = 36cb0000 | |
14743 | stba %l4,[%i4+%o4]0x81 ! Mem[0000000030101408] = 00cb0000 | |
14744 | ! %l4 = ffffffffff000000, Mem[0000000010041400] = 00000000 | |
14745 | stwa %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = ff000000 | |
14746 | ! %f1 = 00ffffff, Mem[0000000030101410] = ff000000 | |
14747 | sta %f1 ,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00ffffff | |
14748 | ! Mem[00000000300c1400] = 36cbd553, %l1 = ffffffffffffffff | |
14749 | swapa [%i3+%g0]0x81,%l1 ! %l1 = 0000000036cbd553 | |
14750 | ! Mem[00000000100c1400] = 000000ff, %l1 = 0000000036cbd553 | |
14751 | swapa [%i3+%g0]0x80,%l1 ! %l1 = 00000000000000ff | |
14752 | ! %l0 = 0000000000000000, Mem[0000000030181408] = 000000009c156421 | |
14753 | stxa %l0,[%i6+%o4]0x81 ! Mem[0000000030181408] = 0000000000000000 | |
14754 | ! %l2 = 0000000000000000, Mem[0000000010101410] = f8ffffff | |
14755 | stwa %l2,[%i4+%o5]0x88 ! Mem[0000000010101410] = 00000000 | |
14756 | ! %l1 = 00000000000000ff, Mem[0000000030081400] = ffffff00 | |
14757 | stha %l1,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00ffff00 | |
14758 | ! Starting 10 instruction Load Burst | |
14759 | ! Mem[0000000010001410] = 00000000000000ff, %l1 = 00000000000000ff | |
14760 | ldxa [%i0+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
14761 | ||
14762 | p0_label_353: | |
14763 | ! Mem[0000000010141410] = 00ff0000 00000000, %l6 = 00000000, %l7 = 00000000 | |
14764 | ldda [%i5+%o5]0x80,%l6 ! %l6 = 0000000000ff0000 0000000000000000 | |
14765 | ! Mem[00000000300c1410] = 00000000, %l1 = 00000000000000ff | |
14766 | ldsha [%i3+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
14767 | ! Mem[0000000010141410] = 00ff000000000000, %l7 = 0000000000000000 | |
14768 | ldxa [%i5+%o5]0x80,%l7 ! %l7 = 00ff000000000000 | |
14769 | ! Mem[0000000010081400] = ff000000, %l2 = 0000000000000000 | |
14770 | lduwa [%i2+%g0]0x80,%l2 ! %l2 = 00000000ff000000 | |
14771 | ! Mem[0000000010181410] = fff85e6676c6c4ff, %l6 = 0000000000ff0000 | |
14772 | ldxa [%i6+%o5]0x88,%l6 ! %l6 = fff85e6676c6c4ff | |
14773 | ! Mem[0000000010041408] = 00000015, %l3 = 0000000000000000 | |
14774 | ldsha [%i1+%o4]0x88,%l3 ! %l3 = 0000000000000015 | |
14775 | ! Mem[0000000030141408] = 00000000, %l5 = 00000000000000ff | |
14776 | ldsha [%i5+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
14777 | ! Mem[00000000300c1410] = 00000000, %l0 = 0000000000000000 | |
14778 | lduha [%i3+%o5]0x81,%l0 ! %l0 = 0000000000000000 | |
14779 | ! Mem[0000000021800000] = 008f13a3, %l2 = 00000000ff000000 | |
14780 | lduha [%o3+0x000]%asi,%l2 ! %l2 = 000000000000008f | |
14781 | ! Starting 10 instruction Store Burst | |
14782 | ! %l2 = 000000000000008f, Mem[0000000010101400] = ffff000000000000 | |
14783 | stx %l2,[%i4+%g0] ! Mem[0000000010101400] = 000000000000008f | |
14784 | ||
14785 | p0_label_354: | |
14786 | ! %l0 = 0000000000000000, Mem[0000000030181408] = 0000000000000000 | |
14787 | stxa %l0,[%i6+%o4]0x89 ! Mem[0000000030181408] = 0000000000000000 | |
14788 | ! %l6 = fff85e6676c6c4ff, Mem[0000000010001408] = 900000ff | |
14789 | stwa %l6,[%i0+%o4]0x88 ! Mem[0000000010001408] = 76c6c4ff | |
14790 | ! %f16 = 00000000 ff00ffff, Mem[00000000100c1410] = 12000000 ffffff00 | |
14791 | stda %f16,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 00000000 ff00ffff | |
14792 | ! %l4 = ffffffffff000000, Mem[00000000300c1410] = 00000000 | |
14793 | stha %l4,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 00000000 | |
14794 | ! Mem[0000000030041410] = ffffffff, %l7 = 00ff000000000000 | |
14795 | ldstuba [%i1+%o5]0x89,%l7 ! %l7 = 000000ff000000ff | |
14796 | ! Mem[0000000030001400] = fff80000, %l1 = 0000000000000000 | |
14797 | ldstuba [%i0+%g0]0x81,%l1 ! %l1 = 000000ff000000ff | |
14798 | ! %f28 = 10ac7b59 3eda2778, %l7 = 00000000000000ff | |
14799 | ! Mem[0000000030141438] = 23e3b3007663a3fa | |
14800 | add %i5,0x038,%g1 | |
14801 | stda %f28,[%g1+%l7]ASI_PST8_SL ! Mem[0000000030141438] = 7827da3e597bac10 | |
14802 | ! Mem[0000000030141408] = 00000000, %l1 = 00000000000000ff | |
14803 | swapa [%i5+%o4]0x81,%l1 ! %l1 = 0000000000000000 | |
14804 | ! %f30 = ff000000 000000ff, Mem[0000000010141400] = 00000000 0000ffff | |
14805 | stda %f30,[%i5+%g0]0x80 ! Mem[0000000010141400] = ff000000 000000ff | |
14806 | ! Starting 10 instruction Load Burst | |
14807 | ! Mem[0000000030041408] = 0000000000000000, %f20 = ffc4c676 665ef8ff | |
14808 | ldda [%i1+%o4]0x81,%f20 ! %f20 = 00000000 00000000 | |
14809 | ||
14810 | p0_label_355: | |
14811 | ! Mem[0000000010041410] = 000000ff 00000000, %l4 = ff000000, %l5 = 00000000 | |
14812 | ldd [%i1+%o5],%l4 ! %l4 = 00000000000000ff 0000000000000000 | |
14813 | ! Mem[0000000010101418] = 00000012000000ff, %l2 = 000000000000008f | |
14814 | ldxa [%i4+0x018]%asi,%l2 ! %l2 = 00000012000000ff | |
14815 | ! Mem[00000000218001c0] = fff32a00, %l3 = 0000000000000015 | |
14816 | ldsba [%o3+0x1c0]%asi,%l3 ! %l3 = ffffffffffffffff | |
14817 | ! Mem[00000000300c1408] = 00ffffff76c6c4ff, %l0 = 0000000000000000 | |
14818 | ldxa [%i3+%o4]0x81,%l0 ! %l0 = 00ffffff76c6c4ff | |
14819 | ! Mem[0000000030181400] = 00000000, %l0 = 00ffffff76c6c4ff | |
14820 | lduha [%i6+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
14821 | ! Mem[0000000010041410] = ff000000, %l4 = 00000000000000ff | |
14822 | ldswa [%i1+%o5]0x88,%l4 ! %l4 = ffffffffff000000 | |
14823 | ! Mem[0000000030001408] = 0000ff0000ff7990, %l7 = 00000000000000ff | |
14824 | ldxa [%i0+%o4]0x89,%l7 ! %l7 = 0000ff0000ff7990 | |
14825 | ! Mem[0000000010181410] = ffc4c676, %l0 = 0000000000000000 | |
14826 | lduha [%i6+%o5]0x80,%l0 ! %l0 = 000000000000ffc4 | |
14827 | ! Mem[0000000030001408] = 00ff7990, %l0 = 000000000000ffc4 | |
14828 | lduwa [%i0+%o4]0x89,%l0 ! %l0 = 0000000000ff7990 | |
14829 | ! Starting 10 instruction Store Burst | |
14830 | ! Mem[0000000010181410] = ffc4c676, %l2 = 00000012000000ff | |
14831 | ldstuba [%i6+%o5]0x80,%l2 ! %l2 = 000000ff000000ff | |
14832 | ||
14833 | ! Check Point 71 for processor 0 | |
14834 | ||
14835 | set p0_check_pt_data_71,%g4 | |
14836 | rd %ccr,%g5 ! %g5 = 44 | |
14837 | ldx [%g4+0x08],%g2 | |
14838 | cmp %l0,%g2 ! %l0 = 0000000000ff7990 | |
14839 | bne %xcc,p0_reg_check_fail0 | |
14840 | mov 0xee0,%g1 | |
14841 | ldx [%g4+0x10],%g2 | |
14842 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
14843 | bne %xcc,p0_reg_check_fail1 | |
14844 | mov 0xee1,%g1 | |
14845 | ldx [%g4+0x18],%g2 | |
14846 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
14847 | bne %xcc,p0_reg_check_fail2 | |
14848 | mov 0xee2,%g1 | |
14849 | ldx [%g4+0x20],%g2 | |
14850 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
14851 | bne %xcc,p0_reg_check_fail3 | |
14852 | mov 0xee3,%g1 | |
14853 | ldx [%g4+0x28],%g2 | |
14854 | cmp %l4,%g2 ! %l4 = ffffffffff000000 | |
14855 | bne %xcc,p0_reg_check_fail4 | |
14856 | mov 0xee4,%g1 | |
14857 | ldx [%g4+0x30],%g2 | |
14858 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
14859 | bne %xcc,p0_reg_check_fail5 | |
14860 | mov 0xee5,%g1 | |
14861 | ldx [%g4+0x38],%g2 | |
14862 | cmp %l6,%g2 ! %l6 = fff85e6676c6c4ff | |
14863 | bne %xcc,p0_reg_check_fail6 | |
14864 | mov 0xee6,%g1 | |
14865 | ldx [%g4+0x40],%g2 | |
14866 | cmp %l7,%g2 ! %l7 = 0000ff0000ff7990 | |
14867 | bne %xcc,p0_reg_check_fail7 | |
14868 | mov 0xee7,%g1 | |
14869 | ldx [%g4+0x48],%g3 | |
14870 | std %f2,[%g4] | |
14871 | ldx [%g4],%g2 | |
14872 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
14873 | bne %xcc,p0_freg_check_fail | |
14874 | mov 0xf02,%g1 | |
14875 | ldx [%g4+0x50],%g3 | |
14876 | std %f4,[%g4] | |
14877 | ldx [%g4],%g2 | |
14878 | cmp %g3,%g2 ! %f4 = ffffffff 00000000 | |
14879 | bne %xcc,p0_freg_check_fail | |
14880 | mov 0xf04,%g1 | |
14881 | ldx [%g4+0x58],%g3 | |
14882 | std %f6,[%g4] | |
14883 | ldx [%g4],%g2 | |
14884 | cmp %g3,%g2 ! %f6 = ff0000ff 00000000 | |
14885 | bne %xcc,p0_freg_check_fail | |
14886 | mov 0xf06,%g1 | |
14887 | ldx [%g4+0x60],%g3 | |
14888 | std %f14,[%g4] | |
14889 | ldx [%g4],%g2 | |
14890 | cmp %g3,%g2 ! %f14 = 00000000 00000000 | |
14891 | bne %xcc,p0_freg_check_fail | |
14892 | mov 0xf14,%g1 | |
14893 | ldx [%g4+0x68],%g3 | |
14894 | std %f20,[%g4] | |
14895 | ldx [%g4],%g2 | |
14896 | cmp %g3,%g2 ! %f20 = 00000000 00000000 | |
14897 | bne %xcc,p0_freg_check_fail | |
14898 | mov 0xf20,%g1 | |
14899 | ||
14900 | ! Check Point 71 completed | |
14901 | ||
14902 | ||
14903 | p0_label_356: | |
14904 | ! %l4 = ffffffffff000000, Mem[0000000030041410] = ffffffff | |
14905 | stha %l4,[%i1+%o5]0x81 ! Mem[0000000030041410] = 0000ffff | |
14906 | ! %l0 = 0000000000ff7990, Mem[0000000010001410] = ff00000000000000 | |
14907 | stxa %l0,[%i0+%o5]0x80 ! Mem[0000000010001410] = 0000000000ff7990 | |
14908 | ! %l5 = 0000000000000000, Mem[00000000300c1410] = 00000000 | |
14909 | stba %l5,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 00000000 | |
14910 | ! Mem[0000000030041400] = f8ffffff, %l6 = fff85e6676c6c4ff | |
14911 | swapa [%i1+%g0]0x81,%l6 ! %l6 = 00000000f8ffffff | |
14912 | ! %l1 = 0000000000000000, Mem[00000000300c1400] = ffffffff | |
14913 | stwa %l1,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 00000000 | |
14914 | ! Mem[0000000020800041] = c4ff7379, %l1 = 0000000000000000 | |
14915 | ldstub [%o1+0x041],%l1 ! %l1 = 000000ff000000ff | |
14916 | ! %l5 = 0000000000000000, Mem[00000000100c1408] = 00000000 | |
14917 | stha %l5,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000 | |
14918 | ! %l4 = ffffffffff000000, Mem[0000000010041410] = 000000ff | |
14919 | stba %l4,[%i1+%o5]0x80 ! Mem[0000000010041410] = 000000ff | |
14920 | ! %l5 = 0000000000000000, Mem[0000000010041420] = 00000000000000ff, %asi = 80 | |
14921 | stxa %l5,[%i1+0x020]%asi ! Mem[0000000010041420] = 0000000000000000 | |
14922 | ! Starting 10 instruction Load Burst | |
14923 | membar #Sync ! Added by membar checker (60) | |
14924 | ! Mem[0000000030101400] = 00000000 00000000 00cb0000 00b3e323 | |
14925 | ! Mem[0000000030101410] = 00ffffff 000000ff a26115a2 6e092edc | |
14926 | ! Mem[0000000030101420] = 9c486421 76c9d21f 174573fc e9706042 | |
14927 | ! Mem[0000000030101430] = 90490000 9d3d7957 5e9638c2 0b931a2a | |
14928 | ldda [%i4]ASI_BLK_AIUSL,%f16 ! Block Load from 0000000030101400 | |
14929 | ||
14930 | p0_label_357: | |
14931 | ! Mem[0000000010081400] = 7827da3e000000ff, %f4 = ffffffff 00000000 | |
14932 | ldda [%i2+%g0]0x88,%f4 ! %f4 = 7827da3e 000000ff | |
14933 | ! Mem[00000000100c1408] = 00000000, %l0 = 0000000000ff7990 | |
14934 | lduba [%i3+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
14935 | ! Mem[0000000030181400] = 00000000, %l4 = ffffffffff000000 | |
14936 | ldswa [%i6+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
14937 | ! Mem[0000000010001400] = 0000000000000000, %f14 = 00000000 00000000 | |
14938 | ldda [%i0+%g0]0x88,%f14 ! %f14 = 00000000 00000000 | |
14939 | ! Mem[0000000010181410] = fff85e66 76c6c4ff, %l6 = f8ffffff, %l7 = 00ff7990 | |
14940 | ldda [%i6+%o5]0x88,%l6 ! %l6 = 0000000076c6c4ff 00000000fff85e66 | |
14941 | ! Mem[0000000030141408] = 000000ff ffff9079, %l6 = 76c6c4ff, %l7 = fff85e66 | |
14942 | ldda [%i5+%o4]0x81,%l6 ! %l6 = 00000000000000ff 00000000ffff9079 | |
14943 | ! Mem[0000000010141414] = 00000000, %l5 = 0000000000000000 | |
14944 | lduh [%i5+0x016],%l5 ! %l5 = 0000000000000000 | |
14945 | ! Mem[0000000010041410] = ff000000, %l4 = 0000000000000000 | |
14946 | lduba [%i1+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
14947 | ! Mem[00000000300c1410] = 00000000, %l1 = 00000000000000ff | |
14948 | lduwa [%i3+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
14949 | ! Starting 10 instruction Store Burst | |
14950 | ! %l2 = 00000000000000ff, Mem[00000000300c1400] = 00000000 | |
14951 | stha %l2,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00ff0000 | |
14952 | ||
14953 | p0_label_358: | |
14954 | ! %l1 = 0000000000000000, Mem[0000000030081410] = faa3637600000000 | |
14955 | stxa %l1,[%i2+%o5]0x89 ! Mem[0000000030081410] = 0000000000000000 | |
14956 | ! %l5 = 0000000000000000, Mem[0000000030181408] = 00000000 | |
14957 | stba %l5,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000 | |
14958 | ! %l5 = 0000000000000000, Mem[0000000021800140] = ffc61df6 | |
14959 | stb %l5,[%o3+0x140] ! Mem[0000000021800140] = 00c61df6 | |
14960 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000030001400] = fff80000 53d5cb36 | |
14961 | stda %l4,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00000000 00000000 | |
14962 | ! %f16 = 00000000 00000000 23e3b300 0000cb00 | |
14963 | ! %f20 = ff000000 ffffff00 dc2e096e a21561a2 | |
14964 | ! %f24 = 1fd2c976 2164489c 426070e9 fc734517 | |
14965 | ! %f28 = 57793d9d 00004990 2a1a930b c238965e | |
14966 | stda %f16,[%i2]ASI_COMMIT_S ! Block Store to 0000000030081400 | |
14967 | ! %l1 = 0000000000000000, Mem[0000000010001410] = 9079ff0000000000 | |
14968 | stxa %l1,[%i0+%o5]0x88 ! Mem[0000000010001410] = 0000000000000000 | |
14969 | ! %l2 = 00000000000000ff, Mem[0000000030001408] = 9079ff0000ff0000 | |
14970 | stxa %l2,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000000000ff | |
14971 | ! %l4 = 0000000000000000, Mem[00000000100c1410] = ff00ffff | |
14972 | stha %l4,[%i3+%o5]0x88 ! Mem[00000000100c1410] = ff000000 | |
14973 | ! %l7 = 00000000ffff9079, Mem[000000001010142e] = 00000057, %asi = 80 | |
14974 | stba %l7,[%i4+0x02e]%asi ! Mem[000000001010142c] = 00007957 | |
14975 | ! Starting 10 instruction Load Burst | |
14976 | ! Mem[0000000030001410] = 9c519c12, %l7 = 00000000ffff9079 | |
14977 | lduha [%i0+%o5]0x89,%l7 ! %l7 = 0000000000009c12 | |
14978 | ||
14979 | p0_label_359: | |
14980 | ! Mem[0000000010041424] = 00000000, %l3 = ffffffffffffffff | |
14981 | lduh [%i1+0x024],%l3 ! %l3 = 0000000000000000 | |
14982 | ! Mem[0000000030041400] = 76c6c4ff00ffffff, %l1 = 0000000000000000 | |
14983 | ldxa [%i1+%g0]0x81,%l1 ! %l1 = 76c6c4ff00ffffff | |
14984 | ! Mem[0000000030041408] = 00000000 00000000, %l2 = 000000ff, %l3 = 00000000 | |
14985 | ldda [%i1+%o4]0x89,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
14986 | ! Mem[00000000100c1410] = 000000ff, %l5 = 0000000000000000 | |
14987 | lduh [%i3+%o5],%l5 ! %l5 = 0000000000000000 | |
14988 | ! Mem[0000000010001400] = 00000000, %l4 = 0000000000000000 | |
14989 | lduha [%i0+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
14990 | ! Mem[00000000201c0000] = ffff9457, %l3 = 0000000000000000 | |
14991 | ldsb [%o0+%g0],%l3 ! %l3 = ffffffffffffffff | |
14992 | ! Mem[0000000010141400] = 000000ff, %f15 = 00000000 | |
14993 | lda [%i5+%g0]0x88,%f15 ! %f15 = 000000ff | |
14994 | ! Mem[0000000010001410] = 00000000, %l2 = 0000000000000000 | |
14995 | lduwa [%i0+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
14996 | membar #Sync ! Added by membar checker (61) | |
14997 | ! Mem[0000000030081408] = 23e3b300, %l6 = 00000000000000ff | |
14998 | ldsha [%i2+%o4]0x81,%l6 ! %l6 = 00000000000023e3 | |
14999 | ! Starting 10 instruction Store Burst | |
15000 | ! %l4 = 0000000000000000, Mem[0000000010101408] = 0000000000000000 | |
15001 | stxa %l4,[%i4+%o4]0x80 ! Mem[0000000010101408] = 0000000000000000 | |
15002 | ||
15003 | p0_label_360: | |
15004 | ! %l6 = 00000000000023e3, Mem[0000000030101400] = 00000000 | |
15005 | stha %l6,[%i4+%g0]0x89 ! Mem[0000000030101400] = 000023e3 | |
15006 | ! Mem[0000000010181400] = 00000000, %l0 = 0000000000000000 | |
15007 | swapa [%i6+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
15008 | ! Mem[0000000030041400] = ffc4c676, %l4 = 0000000000000000 | |
15009 | ldstuba [%i1+%g0]0x89,%l4 ! %l4 = 00000076000000ff | |
15010 | ! %f26 = 426070e9, Mem[0000000030181400] = 00000000 | |
15011 | sta %f26,[%i6+%g0]0x89 ! Mem[0000000030181400] = 426070e9 | |
15012 | ! Mem[0000000010101400] = 00000000, %l5 = 0000000000000000 | |
15013 | swapa [%i4+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
15014 | ! Mem[00000000100c1400] = 53d5cb36, %l1 = 76c6c4ff00ffffff | |
15015 | swapa [%i3+%g0]0x88,%l1 ! %l1 = 0000000053d5cb36 | |
15016 | ! %f26 = 426070e9, Mem[0000000030101410] = 00ffffff | |
15017 | sta %f26,[%i4+%o5]0x81 ! Mem[0000000030101410] = 426070e9 | |
15018 | ! %l7 = 0000000000009c12, Mem[00000000201c0000] = ffff9457, %asi = 80 | |
15019 | stha %l7,[%o0+0x000]%asi ! Mem[00000000201c0000] = 9c129457 | |
15020 | ! %l7 = 0000000000009c12, Mem[00000000218001c0] = fff32a00 | |
15021 | stb %l7,[%o3+0x1c0] ! Mem[00000000218001c0] = 12f32a00 | |
15022 | ! Starting 10 instruction Load Burst | |
15023 | ! Mem[0000000030001400] = 00000000, %l2 = 0000000000000000 | |
15024 | lduwa [%i0+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
15025 | ||
15026 | ! Check Point 72 for processor 0 | |
15027 | ||
15028 | set p0_check_pt_data_72,%g4 | |
15029 | rd %ccr,%g5 ! %g5 = 44 | |
15030 | ldx [%g4+0x08],%g2 | |
15031 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
15032 | bne %xcc,p0_reg_check_fail0 | |
15033 | mov 0xee0,%g1 | |
15034 | ldx [%g4+0x10],%g2 | |
15035 | cmp %l1,%g2 ! %l1 = 0000000053d5cb36 | |
15036 | bne %xcc,p0_reg_check_fail1 | |
15037 | mov 0xee1,%g1 | |
15038 | ldx [%g4+0x18],%g2 | |
15039 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
15040 | bne %xcc,p0_reg_check_fail2 | |
15041 | mov 0xee2,%g1 | |
15042 | ldx [%g4+0x20],%g2 | |
15043 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
15044 | bne %xcc,p0_reg_check_fail3 | |
15045 | mov 0xee3,%g1 | |
15046 | ldx [%g4+0x28],%g2 | |
15047 | cmp %l4,%g2 ! %l4 = 0000000000000076 | |
15048 | bne %xcc,p0_reg_check_fail4 | |
15049 | mov 0xee4,%g1 | |
15050 | ldx [%g4+0x30],%g2 | |
15051 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
15052 | bne %xcc,p0_reg_check_fail5 | |
15053 | mov 0xee5,%g1 | |
15054 | ldx [%g4+0x38],%g2 | |
15055 | cmp %l6,%g2 ! %l6 = 00000000000023e3 | |
15056 | bne %xcc,p0_reg_check_fail6 | |
15057 | mov 0xee6,%g1 | |
15058 | ldx [%g4+0x40],%g2 | |
15059 | cmp %l7,%g2 ! %l7 = 0000000000009c12 | |
15060 | bne %xcc,p0_reg_check_fail7 | |
15061 | mov 0xee7,%g1 | |
15062 | ldx [%g4+0x48],%g3 | |
15063 | std %f2,[%g4] | |
15064 | ldx [%g4],%g2 | |
15065 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
15066 | bne %xcc,p0_freg_check_fail | |
15067 | mov 0xf02,%g1 | |
15068 | ldx [%g4+0x50],%g3 | |
15069 | std %f4,[%g4] | |
15070 | ldx [%g4],%g2 | |
15071 | cmp %g3,%g2 ! %f4 = 7827da3e 000000ff | |
15072 | bne %xcc,p0_freg_check_fail | |
15073 | mov 0xf04,%g1 | |
15074 | ldx [%g4+0x58],%g3 | |
15075 | std %f6,[%g4] | |
15076 | ldx [%g4],%g2 | |
15077 | cmp %g3,%g2 ! %f6 = ff0000ff 00000000 | |
15078 | bne %xcc,p0_freg_check_fail | |
15079 | mov 0xf06,%g1 | |
15080 | ldx [%g4+0x60],%g3 | |
15081 | std %f14,[%g4] | |
15082 | ldx [%g4],%g2 | |
15083 | cmp %g3,%g2 ! %f14 = 00000000 000000ff | |
15084 | bne %xcc,p0_freg_check_fail | |
15085 | mov 0xf14,%g1 | |
15086 | ldx [%g4+0x68],%g3 | |
15087 | std %f16,[%g4] | |
15088 | ldx [%g4],%g2 | |
15089 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
15090 | bne %xcc,p0_freg_check_fail | |
15091 | mov 0xf16,%g1 | |
15092 | ldx [%g4+0x70],%g3 | |
15093 | std %f18,[%g4] | |
15094 | ldx [%g4],%g2 | |
15095 | cmp %g3,%g2 ! %f18 = 23e3b300 0000cb00 | |
15096 | bne %xcc,p0_freg_check_fail | |
15097 | mov 0xf18,%g1 | |
15098 | ldx [%g4+0x78],%g3 | |
15099 | std %f20,[%g4] | |
15100 | ldx [%g4],%g2 | |
15101 | cmp %g3,%g2 ! %f20 = ff000000 ffffff00 | |
15102 | bne %xcc,p0_freg_check_fail | |
15103 | mov 0xf20,%g1 | |
15104 | ldx [%g4+0x80],%g3 | |
15105 | std %f22,[%g4] | |
15106 | ldx [%g4],%g2 | |
15107 | cmp %g3,%g2 ! %f22 = dc2e096e a21561a2 | |
15108 | bne %xcc,p0_freg_check_fail | |
15109 | mov 0xf22,%g1 | |
15110 | ldx [%g4+0x88],%g3 | |
15111 | std %f24,[%g4] | |
15112 | ldx [%g4],%g2 | |
15113 | cmp %g3,%g2 ! %f24 = 1fd2c976 2164489c | |
15114 | bne %xcc,p0_freg_check_fail | |
15115 | mov 0xf24,%g1 | |
15116 | ldx [%g4+0x90],%g3 | |
15117 | std %f26,[%g4] | |
15118 | ldx [%g4],%g2 | |
15119 | cmp %g3,%g2 ! %f26 = 426070e9 fc734517 | |
15120 | bne %xcc,p0_freg_check_fail | |
15121 | mov 0xf26,%g1 | |
15122 | ldx [%g4+0x98],%g3 | |
15123 | std %f28,[%g4] | |
15124 | ldx [%g4],%g2 | |
15125 | cmp %g3,%g2 ! %f28 = 57793d9d 00004990 | |
15126 | bne %xcc,p0_freg_check_fail | |
15127 | mov 0xf28,%g1 | |
15128 | ldx [%g4+0xa0],%g3 | |
15129 | std %f30,[%g4] | |
15130 | ldx [%g4],%g2 | |
15131 | cmp %g3,%g2 ! %f30 = 2a1a930b c238965e | |
15132 | bne %xcc,p0_freg_check_fail | |
15133 | mov 0xf30,%g1 | |
15134 | ||
15135 | ! Check Point 72 completed | |
15136 | ||
15137 | ||
15138 | p0_label_361: | |
15139 | ! Mem[0000000010041400] = ff000000, %l2 = 0000000000000000 | |
15140 | lduba [%i1+%g0]0x80,%l2 ! %l2 = 00000000000000ff | |
15141 | ! Mem[00000000100c1400] = ffffff00, %l4 = 0000000000000076 | |
15142 | ldswa [%i3+%g0]0x80,%l4 ! %l4 = ffffffffffffff00 | |
15143 | ! Mem[0000000010141400] = ff000000, %l1 = 0000000053d5cb36 | |
15144 | lduwa [%i5+%g0]0x80,%l1 ! %l1 = 00000000ff000000 | |
15145 | ! Mem[0000000030041410] = ffff0000, %l4 = ffffffffffffff00 | |
15146 | lduba [%i1+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
15147 | ! Mem[0000000030041410] = 0000ffff, %f13 = 174573fc | |
15148 | lda [%i1+%o5]0x81,%f13 ! %f13 = 0000ffff | |
15149 | ! Mem[0000000030181410] = 9c156421, %l7 = 0000000000009c12 | |
15150 | lduha [%i6+%o5]0x81,%l7 ! %l7 = 0000000000009c15 | |
15151 | ! Mem[0000000030101400] = e3230000, %l3 = ffffffffffffffff | |
15152 | lduba [%i4+%g0]0x81,%l3 ! %l3 = 00000000000000e3 | |
15153 | ! Mem[0000000021800100] = a3ff11d1, %l5 = 0000000000000000 | |
15154 | lduh [%o3+0x100],%l5 ! %l5 = 000000000000a3ff | |
15155 | ! Mem[0000000030101408] = 23e3b3000000cb00, %f12 = 00000000 0000ffff | |
15156 | ldda [%i4+%o4]0x89,%f12 ! %f12 = 23e3b300 0000cb00 | |
15157 | ! Starting 10 instruction Store Burst | |
15158 | ! Mem[0000000010181410] = ffc4c676, %l4 = 0000000000000000 | |
15159 | ldstuba [%i6+%o5]0x80,%l4 ! %l4 = 000000ff000000ff | |
15160 | ||
15161 | p0_label_362: | |
15162 | ! %l6 = 000023e3, %l7 = 00009c15, Mem[0000000010001430] = ff000000 00ffffff | |
15163 | stda %l6,[%i0+0x030]%asi ! Mem[0000000010001430] = 000023e3 00009c15 | |
15164 | ! %l6 = 000023e3, %l7 = 00009c15, Mem[0000000030101400] = 000023e3 00000000 | |
15165 | stda %l6,[%i4+%g0]0x89 ! Mem[0000000030101400] = 000023e3 00009c15 | |
15166 | ! %l5 = 000000000000a3ff, Mem[0000000010141400] = ff000000 | |
15167 | stba %l5,[%i5+%g0]0x80 ! Mem[0000000010141400] = ff000000 | |
15168 | ! %f22 = dc2e096e a21561a2, Mem[0000000030081408] = 00b3e323 00cb0000 | |
15169 | stda %f22,[%i2+%o4]0x89 ! Mem[0000000030081408] = dc2e096e a21561a2 | |
15170 | ! %l6 = 000023e3, %l7 = 00009c15, Mem[0000000010001408] = ffc4c676 ff390000 | |
15171 | stda %l6,[%i0+%o4]0x80 ! Mem[0000000010001408] = 000023e3 00009c15 | |
15172 | ! %l1 = 00000000ff000000, Mem[00000000211c0000] = 9cff1a4c | |
15173 | sth %l1,[%o2+%g0] ! Mem[00000000211c0000] = 00001a4c | |
15174 | ! Mem[0000000030041410] = ffff0000, %l5 = 000000000000a3ff | |
15175 | swapa [%i1+%o5]0x89,%l5 ! %l5 = 00000000ffff0000 | |
15176 | ! %l6 = 00000000000023e3, Mem[000000001004141e] = 00df0000 | |
15177 | stb %l6,[%i1+0x01e] ! Mem[000000001004141c] = 00dfe300 | |
15178 | ! Mem[0000000010001400] = 00000000, %l4 = 00000000000000ff | |
15179 | ldstuba [%i0+%g0]0x80,%l4 ! %l4 = 00000000000000ff | |
15180 | ! Starting 10 instruction Load Burst | |
15181 | ! Mem[0000000030001408] = 00000000, %l0 = 0000000000000000 | |
15182 | lduba [%i0+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
15183 | ||
15184 | p0_label_363: | |
15185 | ! Mem[0000000010101410] = 7600000000000000, %f14 = 00000000 000000ff | |
15186 | ldda [%i4+%o5]0x88,%f14 ! %f14 = 76000000 00000000 | |
15187 | ! Mem[00000000100c1400] = ffffff00, %l5 = 00000000ffff0000 | |
15188 | ldsw [%i3+%g0],%l5 ! %l5 = ffffffffffffff00 | |
15189 | ! Mem[0000000010081400] = ff0000003eda2778, %f28 = 57793d9d 00004990 | |
15190 | ldda [%i2+0x000]%asi,%f28 ! %f28 = ff000000 3eda2778 | |
15191 | ! Mem[0000000010101400] = 000000000000008f, %l0 = 0000000000000000 | |
15192 | ldxa [%i4+%g0]0x80,%l0 ! %l0 = 000000000000008f | |
15193 | ! Mem[0000000030041410] = 00000000 0000a3ff, %l0 = 0000008f, %l1 = ff000000 | |
15194 | ldda [%i1+%o5]0x89,%l0 ! %l0 = 000000000000a3ff 0000000000000000 | |
15195 | ! Mem[0000000010081408] = 10ac7b59, %l4 = 0000000000000000 | |
15196 | lduba [%i2+%o4]0x80,%l4 ! %l4 = 0000000000000010 | |
15197 | ! Mem[00000000100c1408] = 00000000, %l5 = ffffffffffffff00 | |
15198 | ldsha [%i3+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
15199 | ! Mem[00000000211c0000] = 00001a4c, %l5 = 0000000000000000 | |
15200 | lduba [%o2+0x001]%asi,%l5 ! %l5 = 0000000000000000 | |
15201 | ! Mem[0000000010101410] = 00000000, %f3 = 00000000 | |
15202 | lda [%i4+0x010]%asi,%f3 ! %f3 = 00000000 | |
15203 | ! Starting 10 instruction Store Burst | |
15204 | ! Mem[00000000211c0001] = 00001a4c, %l0 = 000000000000a3ff | |
15205 | ldstub [%o2+0x001],%l0 ! %l0 = 00000000000000ff | |
15206 | ||
15207 | p0_label_364: | |
15208 | ! Mem[00000000100c1420] = 00000000, %l6 = 00000000000023e3 | |
15209 | ldstuba [%i3+0x020]%asi,%l6 ! %l6 = 00000000000000ff | |
15210 | ! %l6 = 0000000000000000, Mem[0000000030101408] = 0000cb00 | |
15211 | stba %l6,[%i4+%o4]0x89 ! Mem[0000000030101408] = 0000cb00 | |
15212 | ! Mem[0000000010041400] = ff00000000000000, %l4 = 0000000000000010, %l3 = 00000000000000e3 | |
15213 | casxa [%i1]0x80,%l4,%l3 ! %l3 = ff00000000000000 | |
15214 | ! Mem[0000000010141418] = 00000012, %l7 = 00009c15, %l1 = 00000000 | |
15215 | add %i5,0x18,%g1 | |
15216 | casa [%g1]0x80,%l7,%l1 ! %l1 = 0000000000000012 | |
15217 | ! %l5 = 0000000000000000, Mem[0000000010001400] = 000000ff | |
15218 | stba %l5,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 | |
15219 | ! %f24 = 1fd2c976 2164489c, %l4 = 0000000000000010 | |
15220 | ! Mem[0000000010041428] = b179bad6f8962d02 | |
15221 | add %i1,0x028,%g1 | |
15222 | stda %f24,[%g1+%l4]ASI_PST16_PL ! Mem[0000000010041428] = b179bad6f8962d02 | |
15223 | ! Mem[0000000010041410] = 000000ff, %l1 = 0000000000000012 | |
15224 | lduwa [%i1+%o5]0x80,%l1 ! %l1 = 00000000000000ff | |
15225 | ! %f24 = 1fd2c976 2164489c, Mem[0000000030001410] = 9c519c12 2164159c | |
15226 | stda %f24,[%i0+%o5]0x89 ! Mem[0000000030001410] = 1fd2c976 2164489c | |
15227 | ! Mem[0000000010001400] = 00000000, %l2 = 00000000000000ff | |
15228 | swapa [%i0+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
15229 | ! Starting 10 instruction Load Burst | |
15230 | ! Mem[0000000030101410] = e9706042, %l0 = 0000000000000000 | |
15231 | ldswa [%i4+%o5]0x89,%l0 ! %l0 = ffffffffe9706042 | |
15232 | ||
15233 | p0_label_365: | |
15234 | ! Mem[0000000010181410] = fff85e6676c6c4ff, %l4 = 0000000000000010 | |
15235 | ldxa [%i6+%o5]0x88,%l4 ! %l4 = fff85e6676c6c4ff | |
15236 | ! Mem[00000000100c1410] = 000000ff, %l3 = ff00000000000000 | |
15237 | lduba [%i3+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
15238 | membar #Sync ! Added by membar checker (62) | |
15239 | ! Mem[0000000030041400] = ffc6c4ff 00ffffff 00000000 00000000 | |
15240 | ! Mem[0000000030041410] = ffa30000 00000000 ff0000ff 00000000 | |
15241 | ! Mem[0000000030041420] = ffc4c676 00000000 00000000 ff000000 | |
15242 | ! Mem[0000000030041430] = 00000000 174573fc 000000ff 00000000 | |
15243 | ldda [%i1]ASI_BLK_S,%f0 ! Block Load from 0000000030041400 | |
15244 | ! Mem[00000000201c0000] = 9c129457, %l2 = 0000000000000000 | |
15245 | ldsha [%o0+0x000]%asi,%l2 ! %l2 = ffffffffffff9c12 | |
15246 | ! Mem[000000001008141c] = 00000000, %l0 = ffffffffe9706042 | |
15247 | ldswa [%i2+0x01c]%asi,%l0 ! %l0 = 0000000000000000 | |
15248 | ! Mem[0000000030141400] = c6760000 0000007a 000000ff ffff9079 | |
15249 | ! Mem[0000000030141410] = ff0000fc edf0a6df fc734517 000000ff | |
15250 | ! Mem[0000000030141420] = 1f41ff76 2164159c 3739e890 ffffac00 | |
15251 | ! Mem[0000000030141430] = ff000000 00009400 7827da3e 597bac10 | |
15252 | ldda [%i5]ASI_BLK_AIUS,%f0 ! Block Load from 0000000030141400 | |
15253 | ! Mem[00000000100c1400] = f8ffffff00ffffff, %l0 = 0000000000000000 | |
15254 | ldxa [%i3+%g0]0x88,%l0 ! %l0 = f8ffffff00ffffff | |
15255 | ! Mem[0000000010181400] = 00000000 00000000, %l6 = 00000000, %l7 = 00009c15 | |
15256 | ldd [%i6+%g0],%l6 ! %l6 = 0000000000000000 0000000000000000 | |
15257 | ! Mem[00000000201c0000] = 9c129457, %l1 = 00000000000000ff | |
15258 | lduba [%o0+0x001]%asi,%l1 ! %l1 = 0000000000000012 | |
15259 | ! Starting 10 instruction Store Burst | |
15260 | ! Mem[00000000300c1408] = 00ffffff, %l5 = 0000000000000000 | |
15261 | ldstuba [%i3+%o4]0x81,%l5 ! %l5 = 00000000000000ff | |
15262 | ||
15263 | ! Check Point 73 for processor 0 | |
15264 | ||
15265 | set p0_check_pt_data_73,%g4 | |
15266 | rd %ccr,%g5 ! %g5 = 44 | |
15267 | ldx [%g4+0x08],%g2 | |
15268 | cmp %l0,%g2 ! %l0 = f8ffffff00ffffff | |
15269 | bne %xcc,p0_reg_check_fail0 | |
15270 | mov 0xee0,%g1 | |
15271 | ldx [%g4+0x10],%g2 | |
15272 | cmp %l1,%g2 ! %l1 = 0000000000000012 | |
15273 | bne %xcc,p0_reg_check_fail1 | |
15274 | mov 0xee1,%g1 | |
15275 | ldx [%g4+0x18],%g2 | |
15276 | cmp %l2,%g2 ! %l2 = ffffffffffff9c12 | |
15277 | bne %xcc,p0_reg_check_fail2 | |
15278 | mov 0xee2,%g1 | |
15279 | ldx [%g4+0x20],%g2 | |
15280 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
15281 | bne %xcc,p0_reg_check_fail3 | |
15282 | mov 0xee3,%g1 | |
15283 | ldx [%g4+0x28],%g2 | |
15284 | cmp %l4,%g2 ! %l4 = fff85e6676c6c4ff | |
15285 | bne %xcc,p0_reg_check_fail4 | |
15286 | mov 0xee4,%g1 | |
15287 | ldx [%g4+0x30],%g2 | |
15288 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
15289 | bne %xcc,p0_reg_check_fail5 | |
15290 | mov 0xee5,%g1 | |
15291 | ldx [%g4+0x38],%g2 | |
15292 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
15293 | bne %xcc,p0_reg_check_fail6 | |
15294 | mov 0xee6,%g1 | |
15295 | ldx [%g4+0x40],%g2 | |
15296 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
15297 | bne %xcc,p0_reg_check_fail7 | |
15298 | mov 0xee7,%g1 | |
15299 | ldx [%g4+0x48],%g3 | |
15300 | std %f0,[%g4] | |
15301 | ldx [%g4],%g2 | |
15302 | cmp %g3,%g2 ! %f0 = c6760000 0000007a | |
15303 | bne %xcc,p0_freg_check_fail | |
15304 | mov 0xf00,%g1 | |
15305 | ldx [%g4+0x50],%g3 | |
15306 | std %f2,[%g4] | |
15307 | ldx [%g4],%g2 | |
15308 | cmp %g3,%g2 ! %f2 = 000000ff ffff9079 | |
15309 | bne %xcc,p0_freg_check_fail | |
15310 | mov 0xf02,%g1 | |
15311 | ldx [%g4+0x58],%g3 | |
15312 | std %f4,[%g4] | |
15313 | ldx [%g4],%g2 | |
15314 | cmp %g3,%g2 ! %f4 = ff0000fc edf0a6df | |
15315 | bne %xcc,p0_freg_check_fail | |
15316 | mov 0xf04,%g1 | |
15317 | ldx [%g4+0x60],%g3 | |
15318 | std %f6,[%g4] | |
15319 | ldx [%g4],%g2 | |
15320 | cmp %g3,%g2 ! %f6 = fc734517 000000ff | |
15321 | bne %xcc,p0_freg_check_fail | |
15322 | mov 0xf06,%g1 | |
15323 | ldx [%g4+0x68],%g3 | |
15324 | std %f8,[%g4] | |
15325 | ldx [%g4],%g2 | |
15326 | cmp %g3,%g2 ! %f8 = 1f41ff76 2164159c | |
15327 | bne %xcc,p0_freg_check_fail | |
15328 | mov 0xf08,%g1 | |
15329 | ldx [%g4+0x70],%g3 | |
15330 | std %f10,[%g4] | |
15331 | ldx [%g4],%g2 | |
15332 | cmp %g3,%g2 ! %f10 = 3739e890 ffffac00 | |
15333 | bne %xcc,p0_freg_check_fail | |
15334 | mov 0xf10,%g1 | |
15335 | ldx [%g4+0x78],%g3 | |
15336 | std %f12,[%g4] | |
15337 | ldx [%g4],%g2 | |
15338 | cmp %g3,%g2 ! %f12 = ff000000 00009400 | |
15339 | bne %xcc,p0_freg_check_fail | |
15340 | mov 0xf12,%g1 | |
15341 | ldx [%g4+0x80],%g3 | |
15342 | std %f14,[%g4] | |
15343 | ldx [%g4],%g2 | |
15344 | cmp %g3,%g2 ! %f14 = 7827da3e 597bac10 | |
15345 | bne %xcc,p0_freg_check_fail | |
15346 | mov 0xf14,%g1 | |
15347 | ldx [%g4+0x88],%g3 | |
15348 | std %f28,[%g4] | |
15349 | ldx [%g4],%g2 | |
15350 | cmp %g3,%g2 ! %f28 = ff000000 3eda2778 | |
15351 | bne %xcc,p0_freg_check_fail | |
15352 | mov 0xf28,%g1 | |
15353 | ||
15354 | ! Check Point 73 completed | |
15355 | ||
15356 | ||
15357 | p0_label_366: | |
15358 | ! %l5 = 0000000000000000, Mem[00000000100c1400] = 00ffffff | |
15359 | stwa %l5,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 00000000 | |
15360 | ! %f0 = c6760000 0000007a 000000ff ffff9079 | |
15361 | ! %f4 = ff0000fc edf0a6df fc734517 000000ff | |
15362 | ! %f8 = 1f41ff76 2164159c 3739e890 ffffac00 | |
15363 | ! %f12 = ff000000 00009400 7827da3e 597bac10 | |
15364 | stda %f0,[%i0]ASI_COMMIT_S ! Block Store to 0000000030001400 | |
15365 | ! %f28 = ff000000 3eda2778, Mem[0000000010181408] = c4ff0000 00000000 | |
15366 | stda %f28,[%i6+%o4]0x80 ! Mem[0000000010181408] = ff000000 3eda2778 | |
15367 | ! %f30 = 2a1a930b c238965e, Mem[00000000300c1400] = 0000ff00 90000000 | |
15368 | stda %f30,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 2a1a930b c238965e | |
15369 | ! Mem[000000001008140b] = 10ac7b59, %l7 = 0000000000000000 | |
15370 | ldstuba [%i2+0x00b]%asi,%l7 ! %l7 = 00000059000000ff | |
15371 | ! Mem[0000000010141410] = 0000ff00, %l2 = ffffffffffff9c12 | |
15372 | ldstuba [%i5+%o5]0x88,%l2 ! %l2 = 00000000000000ff | |
15373 | ! %l0 = f8ffffff00ffffff, Mem[0000000010101400] = 00000000 | |
15374 | stwa %l0,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00ffffff | |
15375 | ! Mem[0000000020800041] = c4ff7379, %l2 = 0000000000000000 | |
15376 | ldstub [%o1+0x041],%l2 ! %l2 = 000000ff000000ff | |
15377 | ! %l6 = 0000000000000000, Mem[00000000211c0001] = 00ff1a4c | |
15378 | stb %l6,[%o2+0x001] ! Mem[00000000211c0000] = 00001a4c | |
15379 | ! Starting 10 instruction Load Burst | |
15380 | ! Mem[0000000010181438] = ff000000 00000000, %l0 = 00ffffff, %l1 = 00000012 | |
15381 | ldda [%i6+0x038]%asi,%l0 ! %l0 = 00000000ff000000 0000000000000000 | |
15382 | ||
15383 | p0_label_367: | |
15384 | ! Mem[00000000100c1400] = 00000000, %l6 = 0000000000000000 | |
15385 | ldsha [%i3+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
15386 | membar #Sync ! Added by membar checker (63) | |
15387 | ! Mem[0000000010001428] = 00000000d1c43403, %l2 = 00000000000000ff | |
15388 | ldxa [%i0+0x028]%asi,%l2 ! %l2 = 00000000d1c43403 | |
15389 | ! Mem[0000000030101410] = e9706042, %l7 = 0000000000000059 | |
15390 | lduwa [%i4+%o5]0x89,%l7 ! %l7 = 00000000e9706042 | |
15391 | ! Mem[0000000030081408] = a26115a26e092edc, %f18 = 23e3b300 0000cb00 | |
15392 | ldda [%i2+%o4]0x81,%f18 ! %f18 = a26115a2 6e092edc | |
15393 | ! Mem[00000000100c1408] = 00000000, %l0 = 00000000ff000000 | |
15394 | lduba [%i3+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
15395 | ! Mem[0000000010001400] = 000000ff, %l0 = 0000000000000000 | |
15396 | ldsha [%i0+%g0]0x88,%l0 ! %l0 = 00000000000000ff | |
15397 | ! Mem[0000000010081400] = 000000ff, %l6 = 0000000000000000 | |
15398 | ldsba [%i2+%g0]0x88,%l6 ! %l6 = ffffffffffffffff | |
15399 | ! Mem[00000000300c1400] = c238965e, %l7 = 00000000e9706042 | |
15400 | lduwa [%i3+%g0]0x89,%l7 ! %l7 = 00000000c238965e | |
15401 | ! Mem[0000000010081408] = 10ac7bff, %l3 = 0000000000000000 | |
15402 | lduba [%i2+%o4]0x80,%l3 ! %l3 = 0000000000000010 | |
15403 | ! Starting 10 instruction Store Burst | |
15404 | ! %l2 = d1c43403, %l3 = 00000010, Mem[0000000010081428] = 000000fa 00ff0000 | |
15405 | std %l2,[%i2+0x028] ! Mem[0000000010081428] = d1c43403 00000010 | |
15406 | ||
15407 | p0_label_368: | |
15408 | ! %l2 = 00000000d1c43403, Mem[0000000030081408] = a26115a2 | |
15409 | stha %l2,[%i2+%o4]0x81 ! Mem[0000000030081408] = 340315a2 | |
15410 | ! Mem[00000000300c1400] = 5e9638c2, %l2 = 00000000d1c43403 | |
15411 | ldstuba [%i3+%g0]0x81,%l2 ! %l2 = 0000005e000000ff | |
15412 | ! %l1 = 0000000000000000, Mem[000000001014143f] = 00ff0000, %asi = 80 | |
15413 | stba %l1,[%i5+0x03f]%asi ! Mem[000000001014143c] = 00ff0000 | |
15414 | ! %l4 = fff85e6676c6c4ff, Mem[0000000010041400] = ff000000 | |
15415 | stha %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = c4ff0000 | |
15416 | ! Mem[0000000010041400] = c4ff0000, %l6 = ffffffffffffffff | |
15417 | ldstuba [%i1+%g0]0x80,%l6 ! %l6 = 000000c4000000ff | |
15418 | ! Mem[0000000010141410] = ffff0000, %l2 = 000000000000005e | |
15419 | swap [%i5+%o5],%l2 ! %l2 = 00000000ffff0000 | |
15420 | ! %l3 = 0000000000000010, Mem[00000000100c1414] = 00000000, %asi = 80 | |
15421 | stha %l3,[%i3+0x014]%asi ! Mem[00000000100c1414] = 00100000 | |
15422 | ! %l7 = 00000000c238965e, Mem[0000000010101400] = 00ffffff | |
15423 | stba %l7,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00ffff5e | |
15424 | ! Mem[0000000010101400] = 5effff00, %l1 = 0000000000000000 | |
15425 | ldstuba [%i4+%g0]0x80,%l1 ! %l1 = 0000005e000000ff | |
15426 | ! Starting 10 instruction Load Burst | |
15427 | ! Mem[0000000010001408] = 159c0000e3230000, %f24 = 1fd2c976 2164489c | |
15428 | ldda [%i0+%o4]0x88,%f24 ! %f24 = 159c0000 e3230000 | |
15429 | ||
15430 | p0_label_369: | |
15431 | ! Mem[00000000300c1400] = c23896ff, %l6 = 00000000000000c4 | |
15432 | lduha [%i3+%g0]0x89,%l6 ! %l6 = 00000000000096ff | |
15433 | ! Mem[0000000030141400] = 000076c6, %l5 = 0000000000000000 | |
15434 | ldswa [%i5+%g0]0x89,%l5 ! %l5 = 00000000000076c6 | |
15435 | ! Mem[00000000100c1400] = 00000000, %l0 = 00000000000000ff | |
15436 | lduba [%i3+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
15437 | ! Mem[0000000030041410] = ffa3000000000000, %f26 = 426070e9 fc734517 | |
15438 | ldda [%i1+%o5]0x81,%f26 ! %f26 = ffa30000 00000000 | |
15439 | ! Mem[00000000300c1410] = 00000000, %f22 = dc2e096e | |
15440 | lda [%i3+%o5]0x89,%f22 ! %f22 = 00000000 | |
15441 | ! Mem[00000000100c140c] = 00000000, %l6 = 00000000000096ff | |
15442 | lduba [%i3+0x00f]%asi,%l6 ! %l6 = 0000000000000000 | |
15443 | ! Mem[0000000010081410] = f8ffffff 00000000, %l0 = 00000000, %l1 = 0000005e | |
15444 | ldda [%i2+%o5]0x80,%l0 ! %l0 = 00000000f8ffffff 0000000000000000 | |
15445 | ! Mem[0000000010081400] = 000000ff, %l5 = 00000000000076c6 | |
15446 | ldswa [%i2+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
15447 | ! Mem[00000000211c0000] = 00001a4c, %l1 = 0000000000000000 | |
15448 | ldsha [%o2+0x000]%asi,%l1 ! %l1 = 0000000000000000 | |
15449 | ! Starting 10 instruction Store Burst | |
15450 | ! Mem[0000000030081408] = a2150334, %l3 = 0000000000000010 | |
15451 | swapa [%i2+%o4]0x89,%l3 ! %l3 = 00000000a2150334 | |
15452 | ||
15453 | p0_label_370: | |
15454 | ! %l5 = 00000000000000ff, Mem[0000000010141417] = 00000000, %asi = 80 | |
15455 | stba %l5,[%i5+0x017]%asi ! Mem[0000000010141414] = 000000ff | |
15456 | ! Mem[000000001018142c] = 00000000, %l7 = 00000000c238965e, %asi = 80 | |
15457 | swapa [%i6+0x02c]%asi,%l7 ! %l7 = 0000000000000000 | |
15458 | ! %f28 = ff000000 3eda2778, Mem[00000000100c1418] = 00000000 3eda2778 | |
15459 | stda %f28,[%i3+0x018]%asi ! Mem[00000000100c1418] = ff000000 3eda2778 | |
15460 | ! %l3 = 00000000a2150334, Mem[0000000030081410] = 000000ff | |
15461 | stwa %l3,[%i2+%o5]0x89 ! Mem[0000000030081410] = a2150334 | |
15462 | ! %l6 = 0000000000000000, Mem[0000000030081400] = 00000000 | |
15463 | stwa %l6,[%i2+%g0]0x89 ! Mem[0000000030081400] = 00000000 | |
15464 | ! %l7 = 0000000000000000, Mem[0000000030141410] = ff0000fcedf0a6df | |
15465 | stxa %l7,[%i5+%o5]0x81 ! Mem[0000000030141410] = 0000000000000000 | |
15466 | ! Mem[0000000030141410] = 00000000, %l1 = 0000000000000000 | |
15467 | swapa [%i5+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
15468 | ! Mem[0000000010001400] = 000000ff, %l7 = 0000000000000000 | |
15469 | swapa [%i0+%g0]0x88,%l7 ! %l7 = 00000000000000ff | |
15470 | ! %l0 = 00000000f8ffffff, Mem[00000000218000c1] = ff7e8d82, %asi = 80 | |
15471 | stba %l0,[%o3+0x0c1]%asi ! Mem[00000000218000c0] = ffff8d82 | |
15472 | ! Starting 10 instruction Load Burst | |
15473 | ! Mem[0000000030001408] = ff000000, %l0 = 00000000f8ffffff | |
15474 | lduba [%i0+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
15475 | ||
15476 | ! Check Point 74 for processor 0 | |
15477 | ||
15478 | set p0_check_pt_data_74,%g4 | |
15479 | rd %ccr,%g5 ! %g5 = 44 | |
15480 | ldx [%g4+0x08],%g2 | |
15481 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
15482 | bne %xcc,p0_reg_check_fail0 | |
15483 | mov 0xee0,%g1 | |
15484 | ldx [%g4+0x10],%g2 | |
15485 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
15486 | bne %xcc,p0_reg_check_fail1 | |
15487 | mov 0xee1,%g1 | |
15488 | ldx [%g4+0x18],%g2 | |
15489 | cmp %l2,%g2 ! %l2 = 00000000ffff0000 | |
15490 | bne %xcc,p0_reg_check_fail2 | |
15491 | mov 0xee2,%g1 | |
15492 | ldx [%g4+0x20],%g2 | |
15493 | cmp %l3,%g2 ! %l3 = 00000000a2150334 | |
15494 | bne %xcc,p0_reg_check_fail3 | |
15495 | mov 0xee3,%g1 | |
15496 | ldx [%g4+0x28],%g2 | |
15497 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
15498 | bne %xcc,p0_reg_check_fail5 | |
15499 | mov 0xee5,%g1 | |
15500 | ldx [%g4+0x30],%g2 | |
15501 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
15502 | bne %xcc,p0_reg_check_fail6 | |
15503 | mov 0xee6,%g1 | |
15504 | ldx [%g4+0x38],%g2 | |
15505 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
15506 | bne %xcc,p0_reg_check_fail7 | |
15507 | mov 0xee7,%g1 | |
15508 | ldx [%g4+0x40],%g3 | |
15509 | std %f0,[%g4] | |
15510 | ldx [%g4],%g2 | |
15511 | cmp %g3,%g2 ! %f0 = c6760000 0000007a | |
15512 | bne %xcc,p0_freg_check_fail | |
15513 | mov 0xf00,%g1 | |
15514 | ldx [%g4+0x48],%g3 | |
15515 | std %f18,[%g4] | |
15516 | ldx [%g4],%g2 | |
15517 | cmp %g3,%g2 ! %f18 = a26115a2 6e092edc | |
15518 | bne %xcc,p0_freg_check_fail | |
15519 | mov 0xf18,%g1 | |
15520 | ldx [%g4+0x50],%g3 | |
15521 | std %f22,[%g4] | |
15522 | ldx [%g4],%g2 | |
15523 | cmp %g3,%g2 ! %f22 = 00000000 a21561a2 | |
15524 | bne %xcc,p0_freg_check_fail | |
15525 | mov 0xf22,%g1 | |
15526 | ldx [%g4+0x58],%g3 | |
15527 | std %f24,[%g4] | |
15528 | ldx [%g4],%g2 | |
15529 | cmp %g3,%g2 ! %f24 = 159c0000 e3230000 | |
15530 | bne %xcc,p0_freg_check_fail | |
15531 | mov 0xf24,%g1 | |
15532 | ldx [%g4+0x60],%g3 | |
15533 | std %f26,[%g4] | |
15534 | ldx [%g4],%g2 | |
15535 | cmp %g3,%g2 ! %f26 = ffa30000 00000000 | |
15536 | bne %xcc,p0_freg_check_fail | |
15537 | mov 0xf26,%g1 | |
15538 | ||
15539 | ! Check Point 74 completed | |
15540 | ||
15541 | ||
15542 | p0_label_371: | |
15543 | ! Mem[0000000030041408] = 00000000, %f30 = 2a1a930b | |
15544 | lda [%i1+%o4]0x81,%f30 ! %f30 = 00000000 | |
15545 | ! Mem[0000000030101410] = 426070e9, %f30 = 00000000 | |
15546 | lda [%i4+%o5]0x81,%f30 ! %f30 = 426070e9 | |
15547 | ! Mem[0000000030101400] = e3230000, %l7 = 00000000000000ff | |
15548 | lduba [%i4+%g0]0x81,%l7 ! %l7 = 00000000000000e3 | |
15549 | ! Mem[0000000030001408] = 7990ffffff000000, %l6 = 0000000000000000 | |
15550 | ldxa [%i0+%o4]0x89,%l6 ! %l6 = 7990ffffff000000 | |
15551 | ! Mem[00000000100c1400] = 00000000, %l1 = 0000000000000000 | |
15552 | lduba [%i3+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
15553 | ! Mem[000000001000140c] = 00009c15, %l2 = 00000000ffff0000 | |
15554 | ldsb [%i0+0x00c],%l2 ! %l2 = 0000000000000000 | |
15555 | ! Mem[0000000010101414] = 00000076, %l0 = 0000000000000000 | |
15556 | ldswa [%i4+0x014]%asi,%l0 ! %l0 = 0000000000000076 | |
15557 | ! Mem[00000000100c1400] = 00000000, %l0 = 0000000000000076 | |
15558 | ldsba [%i3+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
15559 | ! Mem[00000000100c142c] = 00000000, %f10 = 3739e890 | |
15560 | lda [%i3+0x02c]%asi,%f10 ! %f10 = 00000000 | |
15561 | ! Starting 10 instruction Store Burst | |
15562 | ! Mem[0000000020800041] = c4ff7379, %l0 = 0000000000000000 | |
15563 | ldstuba [%o1+0x041]%asi,%l0 ! %l0 = 000000ff000000ff | |
15564 | ||
15565 | p0_label_372: | |
15566 | ! Mem[0000000020800040] = c4ff7379, %l2 = 0000000000000000 | |
15567 | ldstub [%o1+0x040],%l2 ! %l2 = 000000c4000000ff | |
15568 | ! Mem[0000000030041408] = 0000000000000000, %f10 = 00000000 ffffac00 | |
15569 | ldda [%i1+%o4]0x81,%f10 ! %f10 = 00000000 00000000 | |
15570 | ! Mem[0000000010141434] = ff000000, %l5 = 00000000000000ff | |
15571 | swap [%i5+0x034],%l5 ! %l5 = 00000000ff000000 | |
15572 | ! %l2 = 00000000000000c4, Mem[00000000201c0000] = 9c129457 | |
15573 | stb %l2,[%o0+%g0] ! Mem[00000000201c0000] = c4129457 | |
15574 | ! Mem[00000000100c143a] = 5dffd4e0, %l4 = fff85e6676c6c4ff | |
15575 | ldstuba [%i3+0x03a]%asi,%l4 ! %l4 = 000000d4000000ff | |
15576 | ! %l4 = 00000000000000d4, Mem[0000000010041400] = ffff0000 | |
15577 | stwa %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = 000000d4 | |
15578 | ! Mem[00000000300c1408] = ffffffff, %l2 = 00000000000000c4 | |
15579 | ldsba [%i3+%o4]0x89,%l2 ! %l2 = ffffffffffffffff | |
15580 | ! %l6 = ff000000, %l7 = 000000e3, Mem[0000000010081408] = 10ac7bff 3eda2778 | |
15581 | stda %l6,[%i2+%o4]0x80 ! Mem[0000000010081408] = ff000000 000000e3 | |
15582 | ! %l4 = 00000000000000d4, Mem[0000000010141400] = ff000000000000ff | |
15583 | stxa %l4,[%i5+%g0]0x80 ! Mem[0000000010141400] = 00000000000000d4 | |
15584 | ! Starting 10 instruction Load Burst | |
15585 | ! Mem[00000000218001c0] = 12f32a00, %l5 = 00000000ff000000 | |
15586 | lduha [%o3+0x1c0]%asi,%l5 ! %l5 = 00000000000012f3 | |
15587 | ||
15588 | p0_label_373: | |
15589 | ! Mem[0000000010041408] = 15000000000000ff, %l6 = 7990ffffff000000 | |
15590 | ldxa [%i1+%o4]0x80,%l6 ! %l6 = 15000000000000ff | |
15591 | ! Mem[000000001004143c] = 0000007d, %l3 = 00000000a2150334 | |
15592 | lduwa [%i1+0x03c]%asi,%l3 ! %l3 = 000000000000007d | |
15593 | ! Mem[000000001008142c] = 00000010, %f24 = 159c0000 | |
15594 | lda [%i2+0x02c]%asi,%f24 ! %f24 = 00000010 | |
15595 | ! Mem[0000000030141408] = 000000ff, %l3 = 000000000000007d | |
15596 | ldswa [%i5+%o4]0x81,%l3 ! %l3 = 00000000000000ff | |
15597 | ! Mem[0000000030081408] = 100000006e092edc, %l7 = 00000000000000e3 | |
15598 | ldxa [%i2+%o4]0x81,%l7 ! %l7 = 100000006e092edc | |
15599 | ! Mem[0000000010101400] = 8f000000 00ffffff, %l0 = 000000ff, %l1 = 00000000 | |
15600 | ldda [%i4+%g0]0x88,%l0 ! %l0 = 0000000000ffffff 000000008f000000 | |
15601 | ! Mem[0000000030141410] = 00000000 00000000, %l4 = 000000d4, %l5 = 000012f3 | |
15602 | ldda [%i5+%o5]0x81,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
15603 | ! Mem[00000000300c1410] = 00000000, %l7 = 100000006e092edc | |
15604 | lduba [%i3+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
15605 | ! Mem[0000000010141410] = 0000005e, %l2 = ffffffffffffffff | |
15606 | lduha [%i5+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
15607 | ! Starting 10 instruction Store Burst | |
15608 | ! Mem[00000000100c1400] = 00000000, %l1 = 000000008f000000 | |
15609 | swapa [%i3+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
15610 | ||
15611 | p0_label_374: | |
15612 | ! Mem[0000000030181410] = 2164159c, %l6 = 15000000000000ff | |
15613 | ldstuba [%i6+%o5]0x89,%l6 ! %l6 = 0000009c000000ff | |
15614 | ! Mem[0000000030001410] = fc0000ff, %l5 = 0000000000000000 | |
15615 | swapa [%i0+%o5]0x89,%l5 ! %l5 = 00000000fc0000ff | |
15616 | ! %l2 = 0000000000000000, Mem[000000001000142e] = d1c43403, %asi = 80 | |
15617 | stba %l2,[%i0+0x02e]%asi ! Mem[000000001000142c] = d1c40003 | |
15618 | ! %f4 = ff0000fc edf0a6df, Mem[0000000030181408] = 00000000 00000000 | |
15619 | stda %f4 ,[%i6+%o4]0x81 ! Mem[0000000030181408] = ff0000fc edf0a6df | |
15620 | ! %l3 = 00000000000000ff, Mem[0000000010101408] = 00000000 | |
15621 | stw %l3,[%i4+%o4] ! Mem[0000000010101408] = 000000ff | |
15622 | ! %l6 = 000000000000009c, Mem[0000000010081420] = 7d30ff94000000ff, %asi = 80 | |
15623 | stxa %l6,[%i2+0x020]%asi ! Mem[0000000010081420] = 000000000000009c | |
15624 | ! %l5 = 00000000fc0000ff, Mem[0000000010101438] = 00000000 | |
15625 | stw %l5,[%i4+0x038] ! Mem[0000000010101438] = fc0000ff | |
15626 | ! %l2 = 0000000000000000, Mem[0000000010001410] = 00000000 | |
15627 | stba %l2,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 | |
15628 | ! %l3 = 00000000000000ff, Mem[00000000100c1410] = 000000ff00100000 | |
15629 | stxa %l3,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 00000000000000ff | |
15630 | ! Starting 10 instruction Load Burst | |
15631 | ! Mem[0000000010181408] = 7827da3e000000ff, %f28 = ff000000 3eda2778 | |
15632 | ldda [%i6+%o4]0x88,%f28 ! %f28 = 7827da3e 000000ff | |
15633 | ||
15634 | p0_label_375: | |
15635 | ! Mem[0000000010081400] = ff0000003eda2778, %l3 = 00000000000000ff | |
15636 | ldxa [%i2+%g0]0x80,%l3 ! %l3 = ff0000003eda2778 | |
15637 | ! Mem[0000000010101408] = 000000ff 00000000, %l2 = 00000000, %l3 = 3eda2778 | |
15638 | ldda [%i4+%o4]0x80,%l2 ! %l2 = 00000000000000ff 0000000000000000 | |
15639 | ! Mem[00000000300c1410] = 00000000, %l1 = 0000000000000000 | |
15640 | ldswa [%i3+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
15641 | ! Mem[0000000010101408] = 000000ff00000000, %l7 = 0000000000000000 | |
15642 | ldxa [%i4+%o4]0x80,%l7 ! %l7 = 000000ff00000000 | |
15643 | ! Mem[0000000010041408] = 15000000000000ff, %f2 = 000000ff ffff9079 | |
15644 | ldda [%i1+%o4]0x80,%f2 ! %f2 = 15000000 000000ff | |
15645 | ! Mem[0000000010041438] = fffffff8, %l6 = 000000000000009c | |
15646 | lduw [%i1+0x038],%l6 ! %l6 = 00000000fffffff8 | |
15647 | ! Mem[0000000030181408] = fc0000ff, %l1 = 0000000000000000 | |
15648 | ldsha [%i6+%o4]0x89,%l1 ! %l1 = 00000000000000ff | |
15649 | ! Mem[0000000010101400] = 00ffffff, %l4 = 0000000000000000 | |
15650 | ldswa [%i4+%g0]0x88,%l4 ! %l4 = 0000000000ffffff | |
15651 | ! Mem[00000000100c1420] = ff000000000000ff, %l0 = 0000000000ffffff | |
15652 | ldx [%i3+0x020],%l0 ! %l0 = ff000000000000ff | |
15653 | ! Starting 10 instruction Store Burst | |
15654 | ! %l4 = 0000000000ffffff, Mem[0000000010181408] = ff0000003eda2778 | |
15655 | stxa %l4,[%i6+%o4]0x80 ! Mem[0000000010181408] = 0000000000ffffff | |
15656 | ||
15657 | ! Check Point 75 for processor 0 | |
15658 | ||
15659 | set p0_check_pt_data_75,%g4 | |
15660 | rd %ccr,%g5 ! %g5 = 44 | |
15661 | ldx [%g4+0x08],%g2 | |
15662 | cmp %l0,%g2 ! %l0 = ff000000000000ff | |
15663 | bne %xcc,p0_reg_check_fail0 | |
15664 | mov 0xee0,%g1 | |
15665 | ldx [%g4+0x10],%g2 | |
15666 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
15667 | bne %xcc,p0_reg_check_fail1 | |
15668 | mov 0xee1,%g1 | |
15669 | ldx [%g4+0x18],%g2 | |
15670 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
15671 | bne %xcc,p0_reg_check_fail2 | |
15672 | mov 0xee2,%g1 | |
15673 | ldx [%g4+0x20],%g2 | |
15674 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
15675 | bne %xcc,p0_reg_check_fail3 | |
15676 | mov 0xee3,%g1 | |
15677 | ldx [%g4+0x28],%g2 | |
15678 | cmp %l4,%g2 ! %l4 = 0000000000ffffff | |
15679 | bne %xcc,p0_reg_check_fail4 | |
15680 | mov 0xee4,%g1 | |
15681 | ldx [%g4+0x30],%g2 | |
15682 | cmp %l5,%g2 ! %l5 = 00000000fc0000ff | |
15683 | bne %xcc,p0_reg_check_fail5 | |
15684 | mov 0xee5,%g1 | |
15685 | ldx [%g4+0x38],%g2 | |
15686 | cmp %l6,%g2 ! %l6 = 00000000fffffff8 | |
15687 | bne %xcc,p0_reg_check_fail6 | |
15688 | mov 0xee6,%g1 | |
15689 | ldx [%g4+0x40],%g2 | |
15690 | cmp %l7,%g2 ! %l7 = 000000ff00000000 | |
15691 | bne %xcc,p0_reg_check_fail7 | |
15692 | mov 0xee7,%g1 | |
15693 | ldx [%g4+0x48],%g3 | |
15694 | std %f0,[%g4] | |
15695 | ldx [%g4],%g2 | |
15696 | cmp %g3,%g2 ! %f0 = c6760000 0000007a | |
15697 | bne %xcc,p0_freg_check_fail | |
15698 | mov 0xf00,%g1 | |
15699 | ldx [%g4+0x50],%g3 | |
15700 | std %f2,[%g4] | |
15701 | ldx [%g4],%g2 | |
15702 | cmp %g3,%g2 ! %f2 = 15000000 000000ff | |
15703 | bne %xcc,p0_freg_check_fail | |
15704 | mov 0xf02,%g1 | |
15705 | ldx [%g4+0x58],%g3 | |
15706 | std %f4,[%g4] | |
15707 | ldx [%g4],%g2 | |
15708 | cmp %g3,%g2 ! %f4 = ff0000fc edf0a6df | |
15709 | bne %xcc,p0_freg_check_fail | |
15710 | mov 0xf04,%g1 | |
15711 | ldx [%g4+0x60],%g3 | |
15712 | std %f10,[%g4] | |
15713 | ldx [%g4],%g2 | |
15714 | cmp %g3,%g2 ! %f10 = 00000000 00000000 | |
15715 | bne %xcc,p0_freg_check_fail | |
15716 | mov 0xf10,%g1 | |
15717 | ldx [%g4+0x68],%g3 | |
15718 | std %f24,[%g4] | |
15719 | ldx [%g4],%g2 | |
15720 | cmp %g3,%g2 ! %f24 = 00000010 e3230000 | |
15721 | bne %xcc,p0_freg_check_fail | |
15722 | mov 0xf24,%g1 | |
15723 | ldx [%g4+0x70],%g3 | |
15724 | std %f28,[%g4] | |
15725 | ldx [%g4],%g2 | |
15726 | cmp %g3,%g2 ! %f28 = 7827da3e 000000ff | |
15727 | bne %xcc,p0_freg_check_fail | |
15728 | mov 0xf28,%g1 | |
15729 | ldx [%g4+0x78],%g3 | |
15730 | std %f30,[%g4] | |
15731 | ldx [%g4],%g2 | |
15732 | cmp %g3,%g2 ! %f30 = 426070e9 c238965e | |
15733 | bne %xcc,p0_freg_check_fail | |
15734 | mov 0xf30,%g1 | |
15735 | ||
15736 | ! Check Point 75 completed | |
15737 | ||
15738 | ||
15739 | p0_label_376: | |
15740 | ! %f28 = 7827da3e 000000ff, Mem[0000000030101410] = e9706042 ff000000 | |
15741 | stda %f28,[%i4+%o5]0x89 ! Mem[0000000030101410] = 7827da3e 000000ff | |
15742 | ! Mem[0000000030041400] = ffc6c4ff, %l3 = 0000000000000000 | |
15743 | swapa [%i1+%g0]0x81,%l3 ! %l3 = 00000000ffc6c4ff | |
15744 | ! %f9 = 2164159c, Mem[0000000030041410] = ffa30000 | |
15745 | sta %f9 ,[%i1+%o5]0x81 ! Mem[0000000030041410] = 2164159c | |
15746 | ! Mem[0000000010101408] = ff000000, %l0 = ff000000000000ff | |
15747 | swapa [%i4+%o4]0x88,%l0 ! %l0 = 00000000ff000000 | |
15748 | ! %l3 = 00000000ffc6c4ff, Mem[0000000030101410] = ff000000 | |
15749 | stba %l3,[%i4+%o5]0x81 ! Mem[0000000030101410] = ff000000 | |
15750 | ! %l7 = 000000ff00000000, Mem[0000000030101400] = 00009c15000023e3 | |
15751 | stxa %l7,[%i4+%g0]0x89 ! Mem[0000000030101400] = 000000ff00000000 | |
15752 | ! %l2 = 00000000000000ff, Mem[00000000211c0001] = 00001a4c | |
15753 | stb %l2,[%o2+0x001] ! Mem[00000000211c0000] = 00ff1a4c | |
15754 | ! %l0 = ff000000, %l1 = 000000ff, Mem[0000000030181408] = ff0000fc edf0a6df | |
15755 | stda %l0,[%i6+%o4]0x81 ! Mem[0000000030181408] = ff000000 000000ff | |
15756 | ! Mem[0000000010081413] = f8ffffff, %l2 = 00000000000000ff | |
15757 | ldstub [%i2+0x013],%l2 ! %l2 = 000000ff000000ff | |
15758 | ! Starting 10 instruction Load Burst | |
15759 | ! Mem[00000000100c1408] = 00000000 00000000, %l2 = 000000ff, %l3 = ffc6c4ff | |
15760 | ldd [%i3+%o4],%l2 ! %l2 = 0000000000000000 0000000000000000 | |
15761 | ||
15762 | p0_label_377: | |
15763 | ! Mem[0000000030081400] = 00000000, %l7 = 000000ff00000000 | |
15764 | ldswa [%i2+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
15765 | ! Mem[0000000010001408] = 000023e3, %f2 = 15000000 | |
15766 | lda [%i0+%o4]0x80,%f2 ! %f2 = 000023e3 | |
15767 | ! Mem[0000000020800000] = ff008470, %l0 = 00000000ff000000 | |
15768 | ldsb [%o1+%g0],%l0 ! %l0 = ffffffffffffffff | |
15769 | ! Mem[0000000021800180] = ffffe2ae, %l7 = 0000000000000000 | |
15770 | lduha [%o3+0x180]%asi,%l7 ! %l7 = 000000000000ffff | |
15771 | ! Mem[00000000100c1408] = 00000000, %l5 = 00000000fc0000ff | |
15772 | lduwa [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
15773 | ! Mem[000000001004140c] = 000000ff, %f16 = 00000000 | |
15774 | ld [%i1+0x00c],%f16 ! %f16 = 000000ff | |
15775 | ! Mem[0000000030141410] = 00000000, %f14 = 7827da3e | |
15776 | lda [%i5+%o5]0x89,%f14 ! %f14 = 00000000 | |
15777 | ! Mem[0000000030101400] = 00000000, %f16 = 000000ff | |
15778 | lda [%i4+%g0]0x81,%f16 ! %f16 = 00000000 | |
15779 | ! Mem[00000000100c1410] = 00000000, %f14 = 00000000 | |
15780 | lda [%i3+%o5]0x88,%f14 ! %f14 = 00000000 | |
15781 | ! Starting 10 instruction Store Burst | |
15782 | ! Mem[000000001014141c] = 00000000, %l0 = ffffffffffffffff, %asi = 80 | |
15783 | swapa [%i5+0x01c]%asi,%l0 ! %l0 = 0000000000000000 | |
15784 | ||
15785 | p0_label_378: | |
15786 | ! %l7 = 000000000000ffff, Mem[0000000030101408] = 0000cb00 | |
15787 | stba %l7,[%i4+%o4]0x89 ! Mem[0000000030101408] = 0000cbff | |
15788 | ! %l0 = 00000000, %l1 = 000000ff, Mem[0000000030041410] = 2164159c 00000000 | |
15789 | stda %l0,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000 000000ff | |
15790 | ! Mem[0000000010001410] = 00000000, %l5 = 0000000000000000 | |
15791 | swapa [%i0+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
15792 | ! Mem[0000000020800000] = ff008470, %l0 = 0000000000000000 | |
15793 | ldstuba [%o1+0x000]%asi,%l0 ! %l0 = 000000ff000000ff | |
15794 | ! %l4 = 0000000000ffffff, Mem[000000001014142e] = 4e00ffff, %asi = 80 | |
15795 | stha %l4,[%i5+0x02e]%asi ! Mem[000000001014142c] = 4e00ffff | |
15796 | ! Mem[000000001004141c] = 00dfe300, %l2 = 0000000000000000 | |
15797 | swap [%i1+0x01c],%l2 ! %l2 = 0000000000dfe300 | |
15798 | ! Mem[0000000010101410] = 00000000, %l1 = 00000000000000ff | |
15799 | ldstuba [%i4+%o5]0x80,%l1 ! %l1 = 00000000000000ff | |
15800 | ! Mem[000000001010140c] = 00000000, %l4 = 0000000000ffffff | |
15801 | swap [%i4+0x00c],%l4 ! %l4 = 0000000000000000 | |
15802 | ! %l1 = 0000000000000000, Mem[0000000030041408] = 00000000 | |
15803 | stba %l1,[%i1+%o4]0x81 ! Mem[0000000030041408] = 00000000 | |
15804 | ! Starting 10 instruction Load Burst | |
15805 | ! Mem[0000000030141408] = ff000000, %l3 = 0000000000000000 | |
15806 | ldsha [%i5+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
15807 | ||
15808 | p0_label_379: | |
15809 | ! Mem[00000000100c1428] = 00000000, %l1 = 0000000000000000 | |
15810 | ldsw [%i3+0x028],%l1 ! %l1 = 0000000000000000 | |
15811 | ! %l3 = 0000000000000000, Mem[0000000030101408] = 0000cbff | |
15812 | stba %l3,[%i4+%o4]0x89 ! Mem[0000000030101408] = 0000cb00 | |
15813 | ! Mem[0000000010041410] = ff000000, %l5 = 0000000000000000 | |
15814 | ldswa [%i1+%o5]0x88,%l5 ! %l5 = ffffffffff000000 | |
15815 | ! Mem[0000000021800040] = 9cff1df3, %l5 = ffffffffff000000 | |
15816 | lduh [%o3+0x040],%l5 ! %l5 = 0000000000009cff | |
15817 | ! Mem[0000000030141408] = ff000000, %f21 = ffffff00 | |
15818 | lda [%i5+%o4]0x89,%f21 ! %f21 = ff000000 | |
15819 | ! Mem[00000000300c1400] = ff9638c20b931a2a, %f22 = 00000000 a21561a2 | |
15820 | ldda [%i3+%g0]0x81,%f22 ! %f22 = ff9638c2 0b931a2a | |
15821 | ! Mem[0000000010141410] = 0000005e, %l4 = 0000000000000000 | |
15822 | ldswa [%i5+%o5]0x80,%l4 ! %l4 = 000000000000005e | |
15823 | ! Mem[0000000010141410] = 0000005e, %f13 = 00009400 | |
15824 | lda [%i5+0x010]%asi,%f13 ! %f13 = 0000005e | |
15825 | ! Mem[00000000300c1408] = ffc4c676ffffffff, %f30 = 426070e9 c238965e | |
15826 | ldda [%i3+%o4]0x89,%f30 ! %f30 = ffc4c676 ffffffff | |
15827 | ! Starting 10 instruction Store Burst | |
15828 | ! %l4 = 000000000000005e, Mem[0000000010081410] = f8ffffff00000000 | |
15829 | stx %l4,[%i2+%o5] ! Mem[0000000010081410] = 000000000000005e | |
15830 | ||
15831 | p0_label_380: | |
15832 | ! Mem[00000000100c1410] = 00000000, %l0 = 00000000000000ff | |
15833 | swapa [%i3+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
15834 | ! %l7 = 000000000000ffff, Mem[0000000010001400] = 0000000000000000 | |
15835 | stxa %l7,[%i0+%g0]0x88 ! Mem[0000000010001400] = 000000000000ffff | |
15836 | ! Mem[0000000010141410] = 5e000000, %l0 = 0000000000000000 | |
15837 | swapa [%i5+%o5]0x88,%l0 ! %l0 = 000000005e000000 | |
15838 | ! %l5 = 0000000000009cff, Mem[00000000201c0000] = c4129457 | |
15839 | sth %l5,[%o0+%g0] ! Mem[00000000201c0000] = 9cff9457 | |
15840 | ! Mem[0000000010181400] = 00000000, %l5 = 0000000000009cff | |
15841 | ldstuba [%i6+%g0]0x80,%l5 ! %l5 = 00000000000000ff | |
15842 | ! %f29 = 000000ff, Mem[0000000010181400] = 000000ff | |
15843 | sta %f29,[%i6+%g0]0x88 ! Mem[0000000010181400] = 000000ff | |
15844 | ! %l6 = 00000000fffffff8, Mem[0000000010041418] = 000000ff | |
15845 | stb %l6,[%i1+0x018] ! Mem[0000000010041418] = f80000ff | |
15846 | ! %f14 = 00000000 597bac10, Mem[0000000010041410] = 000000ff 00000000 | |
15847 | stda %f14,[%i1+0x010]%asi ! Mem[0000000010041410] = 00000000 597bac10 | |
15848 | ! %l0 = 000000005e000000, Mem[0000000030141400] = 000076c6 | |
15849 | stwa %l0,[%i5+%g0]0x89 ! Mem[0000000030141400] = 5e000000 | |
15850 | ! Starting 10 instruction Load Burst | |
15851 | ! Mem[0000000010181408] = 00000000, %l2 = 0000000000dfe300 | |
15852 | ldsba [%i6+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
15853 | ||
15854 | ! Check Point 76 for processor 0 | |
15855 | ||
15856 | set p0_check_pt_data_76,%g4 | |
15857 | rd %ccr,%g5 ! %g5 = 44 | |
15858 | ldx [%g4+0x08],%g2 | |
15859 | cmp %l0,%g2 ! %l0 = 000000005e000000 | |
15860 | bne %xcc,p0_reg_check_fail0 | |
15861 | mov 0xee0,%g1 | |
15862 | ldx [%g4+0x10],%g2 | |
15863 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
15864 | bne %xcc,p0_reg_check_fail1 | |
15865 | mov 0xee1,%g1 | |
15866 | ldx [%g4+0x18],%g2 | |
15867 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
15868 | bne %xcc,p0_reg_check_fail2 | |
15869 | mov 0xee2,%g1 | |
15870 | ldx [%g4+0x20],%g2 | |
15871 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
15872 | bne %xcc,p0_reg_check_fail3 | |
15873 | mov 0xee3,%g1 | |
15874 | ldx [%g4+0x28],%g2 | |
15875 | cmp %l4,%g2 ! %l4 = 000000000000005e | |
15876 | bne %xcc,p0_reg_check_fail4 | |
15877 | mov 0xee4,%g1 | |
15878 | ldx [%g4+0x30],%g2 | |
15879 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
15880 | bne %xcc,p0_reg_check_fail5 | |
15881 | mov 0xee5,%g1 | |
15882 | ldx [%g4+0x38],%g2 | |
15883 | cmp %l7,%g2 ! %l7 = 000000000000ffff | |
15884 | bne %xcc,p0_reg_check_fail7 | |
15885 | mov 0xee7,%g1 | |
15886 | ldx [%g4+0x40],%g3 | |
15887 | std %f2,[%g4] | |
15888 | ldx [%g4],%g2 | |
15889 | cmp %g3,%g2 ! %f2 = 000023e3 000000ff | |
15890 | bne %xcc,p0_freg_check_fail | |
15891 | mov 0xf02,%g1 | |
15892 | ldx [%g4+0x48],%g3 | |
15893 | std %f12,[%g4] | |
15894 | ldx [%g4],%g2 | |
15895 | cmp %g3,%g2 ! %f12 = ff000000 0000005e | |
15896 | bne %xcc,p0_freg_check_fail | |
15897 | mov 0xf12,%g1 | |
15898 | ldx [%g4+0x50],%g3 | |
15899 | std %f14,[%g4] | |
15900 | ldx [%g4],%g2 | |
15901 | cmp %g3,%g2 ! %f14 = 00000000 597bac10 | |
15902 | bne %xcc,p0_freg_check_fail | |
15903 | mov 0xf14,%g1 | |
15904 | ldx [%g4+0x58],%g3 | |
15905 | std %f16,[%g4] | |
15906 | ldx [%g4],%g2 | |
15907 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
15908 | bne %xcc,p0_freg_check_fail | |
15909 | mov 0xf16,%g1 | |
15910 | ldx [%g4+0x60],%g3 | |
15911 | std %f20,[%g4] | |
15912 | ldx [%g4],%g2 | |
15913 | cmp %g3,%g2 ! %f20 = ff000000 ff000000 | |
15914 | bne %xcc,p0_freg_check_fail | |
15915 | mov 0xf20,%g1 | |
15916 | ldx [%g4+0x68],%g3 | |
15917 | std %f22,[%g4] | |
15918 | ldx [%g4],%g2 | |
15919 | cmp %g3,%g2 ! %f22 = ff9638c2 0b931a2a | |
15920 | bne %xcc,p0_freg_check_fail | |
15921 | mov 0xf22,%g1 | |
15922 | ldx [%g4+0x70],%g3 | |
15923 | std %f30,[%g4] | |
15924 | ldx [%g4],%g2 | |
15925 | cmp %g3,%g2 ! %f30 = ffc4c676 ffffffff | |
15926 | bne %xcc,p0_freg_check_fail | |
15927 | mov 0xf30,%g1 | |
15928 | ||
15929 | ! Check Point 76 completed | |
15930 | ||
15931 | ||
15932 | p0_label_381: | |
15933 | ! Mem[0000000030001408] = 000000ff, %l1 = 0000000000000000 | |
15934 | ldsba [%i0+%o4]0x81,%l1 ! %l1 = 0000000000000000 | |
15935 | ! Mem[00000000100c1428] = 00000000 00000000, %l0 = 5e000000, %l1 = 00000000 | |
15936 | ldda [%i3+0x028]%asi,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
15937 | ! Mem[0000000030041408] = 00000000, %l0 = 0000000000000000 | |
15938 | ldstuba [%i1+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
15939 | ! Mem[0000000010001438] = 0000ffff, %l6 = 00000000fffffff8 | |
15940 | ldsba [%i0+0x03b]%asi,%l6 ! %l6 = ffffffffffffffff | |
15941 | ! Mem[0000000030181410] = ff156421, %l5 = 0000000000000000 | |
15942 | lduha [%i6+%o5]0x81,%l5 ! %l5 = 000000000000ff15 | |
15943 | ! Mem[0000000030081400] = 00000000, %l5 = 000000000000ff15 | |
15944 | ldswa [%i2+%g0]0x81,%l5 ! %l5 = 0000000000000000 | |
15945 | ! Mem[0000000030101408] = 23e3b3000000cb00, %f24 = 00000010 e3230000 | |
15946 | ldda [%i4+%o4]0x89,%f24 ! %f24 = 23e3b300 0000cb00 | |
15947 | ! Mem[00000000100c1410] = 000000ff 000000ff, %l6 = ffffffff, %l7 = 0000ffff | |
15948 | ldda [%i3+%o5]0x80,%l6 ! %l6 = 00000000000000ff 00000000000000ff | |
15949 | ! Mem[0000000030081400] = 00000000 00000000, %l2 = 00000000, %l3 = 00000000 | |
15950 | ldda [%i2+%g0]0x81,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
15951 | ! Starting 10 instruction Store Burst | |
15952 | ! Mem[0000000010001428] = 00000000, %l1 = 0000000000000000, %asi = 80 | |
15953 | swapa [%i0+0x028]%asi,%l1 ! %l1 = 0000000000000000 | |
15954 | ||
15955 | p0_label_382: | |
15956 | ! %f6 = fc734517 000000ff, %l0 = 0000000000000000 | |
15957 | ! Mem[0000000030141430] = ff00000000009400 | |
15958 | add %i5,0x030,%g1 | |
15959 | stda %f6,[%g1+%l0]ASI_PST32_S ! Mem[0000000030141430] = ff00000000009400 | |
15960 | ! Mem[00000000300c1408] = ffffffff, %l7 = 00000000000000ff | |
15961 | ldstuba [%i3+%o4]0x81,%l7 ! %l7 = 000000ff000000ff | |
15962 | ! %f20 = ff000000 ff000000, Mem[0000000030001410] = 00000000 dfa6f0ed | |
15963 | stda %f20,[%i0+%o5]0x89 ! Mem[0000000030001410] = ff000000 ff000000 | |
15964 | ! %l6 = 000000ff, %l7 = 000000ff, Mem[00000000300c1408] = ffffffff ffc4c676 | |
15965 | stda %l6,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 000000ff 000000ff | |
15966 | ! Mem[00000000300c1400] = ff9638c2, %l2 = 0000000000000000 | |
15967 | ldstuba [%i3+%g0]0x81,%l2 ! %l2 = 000000ff000000ff | |
15968 | ! %l5 = 0000000000000000, Mem[0000000010041408] = 15000000 | |
15969 | stwa %l5,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00000000 | |
15970 | ! %l5 = 0000000000000000, Mem[0000000010041400] = 000000d400000000, %asi = 80 | |
15971 | stxa %l5,[%i1+0x000]%asi ! Mem[0000000010041400] = 0000000000000000 | |
15972 | ! %f12 = ff000000 0000005e, Mem[0000000010041410] = 00000000 597bac10 | |
15973 | stda %f12,[%i1+%o5]0x80 ! Mem[0000000010041410] = ff000000 0000005e | |
15974 | ! Mem[00000000201c0000] = 9cff9457, %l0 = 0000000000000000 | |
15975 | ldstuba [%o0+0x000]%asi,%l0 ! %l0 = 0000009c000000ff | |
15976 | ! Starting 10 instruction Load Burst | |
15977 | ! Mem[0000000010081408] = ff000000, %l1 = 0000000000000000 | |
15978 | ldub [%i2+0x00a],%l1 ! %l1 = 0000000000000000 | |
15979 | ||
15980 | p0_label_383: | |
15981 | ! Mem[00000000300c1400] = ff9638c2, %l4 = 000000000000005e | |
15982 | ldsha [%i3+%g0]0x81,%l4 ! %l4 = ffffffffffffff96 | |
15983 | ! Mem[0000000030141400] = 5e000000, %f3 = 000000ff | |
15984 | lda [%i5+%g0]0x89,%f3 ! %f3 = 5e000000 | |
15985 | ! Mem[00000000100c1400] = 0000008f, %l3 = 0000000000000000 | |
15986 | ldsba [%i3+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
15987 | ! Mem[00000000100c1418] = ff000000, %l1 = 0000000000000000 | |
15988 | ldsha [%i3+0x01a]%asi,%l1 ! %l1 = 0000000000000000 | |
15989 | ! Mem[0000000030101400] = 00000000ff000000, %f10 = 00000000 00000000 | |
15990 | ldda [%i4+%g0]0x81,%f10 ! %f10 = 00000000 ff000000 | |
15991 | ! Mem[0000000030041410] = 00000000, %l2 = 00000000000000ff | |
15992 | lduwa [%i1+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
15993 | ! Mem[0000000030141410] = 00000000, %l6 = 00000000000000ff | |
15994 | ldsha [%i5+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
15995 | ! Mem[0000000030101410] = ff000000, %f10 = 00000000 | |
15996 | lda [%i4+%o5]0x81,%f10 ! %f10 = ff000000 | |
15997 | ! Mem[0000000010041430] = ffffffffff00ff00, %f4 = ff0000fc edf0a6df | |
15998 | ldd [%i1+0x030],%f4 ! %f4 = ffffffff ff00ff00 | |
15999 | ! Starting 10 instruction Store Burst | |
16000 | ! %f29 = 000000ff, Mem[0000000010041410] = 000000ff | |
16001 | sta %f29,[%i1+%o5]0x88 ! Mem[0000000010041410] = 000000ff | |
16002 | ||
16003 | p0_label_384: | |
16004 | ! %f16 = 00000000 00000000 a26115a2 6e092edc | |
16005 | ! %f20 = ff000000 ff000000 ff9638c2 0b931a2a | |
16006 | ! %f24 = 23e3b300 0000cb00 ffa30000 00000000 | |
16007 | ! %f28 = 7827da3e 000000ff ffc4c676 ffffffff | |
16008 | stda %f16,[%i1]ASI_COMMIT_P ! Block Store to 0000000010041400 | |
16009 | ! %f12 = ff000000 0000005e, %l5 = 0000000000000000 | |
16010 | ! Mem[0000000010141438] = 0000000000ff0000 | |
16011 | add %i5,0x038,%g1 | |
16012 | stda %f12,[%g1+%l5]ASI_PST16_P ! Mem[0000000010141438] = 0000000000ff0000 | |
16013 | membar #Sync ! Added by membar checker (64) | |
16014 | ! Mem[0000000010041424] = 0000cb00, %l4 = ffffffffffffff96 | |
16015 | ldstub [%i1+0x024],%l4 ! %l4 = 00000000000000ff | |
16016 | ! %f6 = fc734517, Mem[0000000010181400] = 000000ff | |
16017 | sta %f6 ,[%i6+%g0]0x88 ! Mem[0000000010181400] = fc734517 | |
16018 | ! %l1 = 0000000000000000, Mem[00000000300c1400] = c23896ff | |
16019 | stwa %l1,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 00000000 | |
16020 | ! %f17 = 00000000, Mem[0000000010101428] = 00ffffff | |
16021 | sta %f17,[%i4+0x028]%asi ! Mem[0000000010101428] = 00000000 | |
16022 | ! %l5 = 0000000000000000, Mem[0000000010181408] = 00000000 | |
16023 | stwa %l5,[%i6+%o4]0x88 ! Mem[0000000010181408] = 00000000 | |
16024 | ! %f2 = 000023e3 5e000000, Mem[00000000300c1410] = 00000000 00ffffff | |
16025 | stda %f2 ,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 000023e3 5e000000 | |
16026 | ! %l3 = 0000000000000000, Mem[0000000030001400] = 7a000000000076c6 | |
16027 | stxa %l3,[%i0+%g0]0x89 ! Mem[0000000030001400] = 0000000000000000 | |
16028 | ! Starting 10 instruction Load Burst | |
16029 | ! Mem[00000000300c1410] = 0000005e, %l4 = 0000000000000000 | |
16030 | ldsba [%i3+%o5]0x81,%l4 ! %l4 = 0000000000000000 | |
16031 | ||
16032 | p0_label_385: | |
16033 | ! Mem[0000000030141408] = ff000000, %l1 = 0000000000000000 | |
16034 | ldswa [%i5+%o4]0x89,%l1 ! %l1 = ffffffffff000000 | |
16035 | ! Mem[0000000010001408] = 000023e3, %l4 = 0000000000000000 | |
16036 | lduha [%i0+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
16037 | ! Mem[0000000030101400] = 00000000, %l2 = 0000000000000000 | |
16038 | lduba [%i4+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
16039 | membar #Sync ! Added by membar checker (65) | |
16040 | ! Mem[0000000010101400] = ffffff00 0000008f ff000000 00ffffff | |
16041 | ! Mem[0000000010101410] = ff000000 00000076 00000012 000000ff | |
16042 | ! Mem[0000000010101420] = 1f41ff76 2164159c 00000000 00007957 | |
16043 | ! Mem[0000000010101430] = 00000000 000000ff fc0000ff 00000000 | |
16044 | ldda [%i4]ASI_BLK_AIUP,%f0 ! Block Load from 0000000010101400 | |
16045 | ! Mem[0000000030181400] = 426070e9, %l6 = 0000000000000000 | |
16046 | ldsha [%i6+%g0]0x89,%l6 ! %l6 = 00000000000070e9 | |
16047 | ! Mem[0000000030101408] = 00cb0000, %l3 = 0000000000000000 | |
16048 | ldsba [%i4+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
16049 | ! Mem[0000000010101400] = ffffff00 0000008f ff000000 00ffffff | |
16050 | ! Mem[0000000010101410] = ff000000 00000076 00000012 000000ff | |
16051 | ! Mem[0000000010101420] = 1f41ff76 2164159c 00000000 00007957 | |
16052 | ! Mem[0000000010101430] = 00000000 000000ff fc0000ff 00000000 | |
16053 | ldda [%i4]ASI_BLK_P,%f0 ! Block Load from 0000000010101400 | |
16054 | ! Mem[0000000010041418] = ff9638c20b931a2a, %f28 = 7827da3e 000000ff | |
16055 | ldd [%i1+0x018],%f28 ! %f28 = ff9638c2 0b931a2a | |
16056 | ! Mem[0000000010081410] = 00000000, %l3 = 0000000000000000 | |
16057 | lduha [%i2+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
16058 | ! Starting 10 instruction Store Burst | |
16059 | ! %l1 = ffffffffff000000, Mem[0000000010081408] = 000000ff | |
16060 | stba %l1,[%i2+%o4]0x88 ! Mem[0000000010081408] = 00000000 | |
16061 | ||
16062 | ! Check Point 77 for processor 0 | |
16063 | ||
16064 | set p0_check_pt_data_77,%g4 | |
16065 | rd %ccr,%g5 ! %g5 = 44 | |
16066 | ldx [%g4+0x08],%g2 | |
16067 | cmp %l0,%g2 ! %l0 = 000000000000009c | |
16068 | bne %xcc,p0_reg_check_fail0 | |
16069 | mov 0xee0,%g1 | |
16070 | ldx [%g4+0x10],%g2 | |
16071 | cmp %l1,%g2 ! %l1 = ffffffffff000000 | |
16072 | bne %xcc,p0_reg_check_fail1 | |
16073 | mov 0xee1,%g1 | |
16074 | ldx [%g4+0x18],%g2 | |
16075 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
16076 | bne %xcc,p0_reg_check_fail2 | |
16077 | mov 0xee2,%g1 | |
16078 | ldx [%g4+0x20],%g2 | |
16079 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
16080 | bne %xcc,p0_reg_check_fail3 | |
16081 | mov 0xee3,%g1 | |
16082 | ldx [%g4+0x28],%g2 | |
16083 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
16084 | bne %xcc,p0_reg_check_fail4 | |
16085 | mov 0xee4,%g1 | |
16086 | ldx [%g4+0x30],%g2 | |
16087 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
16088 | bne %xcc,p0_reg_check_fail5 | |
16089 | mov 0xee5,%g1 | |
16090 | ldx [%g4+0x38],%g2 | |
16091 | cmp %l6,%g2 ! %l6 = 00000000000070e9 | |
16092 | bne %xcc,p0_reg_check_fail6 | |
16093 | mov 0xee6,%g1 | |
16094 | ldx [%g4+0x40],%g2 | |
16095 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
16096 | bne %xcc,p0_reg_check_fail7 | |
16097 | mov 0xee7,%g1 | |
16098 | ldx [%g4+0x48],%g3 | |
16099 | std %f0,[%g4] | |
16100 | ldx [%g4],%g2 | |
16101 | cmp %g3,%g2 ! %f0 = ffffff00 0000008f | |
16102 | bne %xcc,p0_freg_check_fail | |
16103 | mov 0xf00,%g1 | |
16104 | ldx [%g4+0x50],%g3 | |
16105 | std %f2,[%g4] | |
16106 | ldx [%g4],%g2 | |
16107 | cmp %g3,%g2 ! %f2 = ff000000 00ffffff | |
16108 | bne %xcc,p0_freg_check_fail | |
16109 | mov 0xf02,%g1 | |
16110 | ldx [%g4+0x58],%g3 | |
16111 | std %f4,[%g4] | |
16112 | ldx [%g4],%g2 | |
16113 | cmp %g3,%g2 ! %f4 = ff000000 00000076 | |
16114 | bne %xcc,p0_freg_check_fail | |
16115 | mov 0xf04,%g1 | |
16116 | ldx [%g4+0x60],%g3 | |
16117 | std %f6,[%g4] | |
16118 | ldx [%g4],%g2 | |
16119 | cmp %g3,%g2 ! %f6 = 00000012 000000ff | |
16120 | bne %xcc,p0_freg_check_fail | |
16121 | mov 0xf06,%g1 | |
16122 | ldx [%g4+0x68],%g3 | |
16123 | std %f8,[%g4] | |
16124 | ldx [%g4],%g2 | |
16125 | cmp %g3,%g2 ! %f8 = 1f41ff76 2164159c | |
16126 | bne %xcc,p0_freg_check_fail | |
16127 | mov 0xf08,%g1 | |
16128 | ldx [%g4+0x70],%g3 | |
16129 | std %f10,[%g4] | |
16130 | ldx [%g4],%g2 | |
16131 | cmp %g3,%g2 ! %f10 = 00000000 00007957 | |
16132 | bne %xcc,p0_freg_check_fail | |
16133 | mov 0xf10,%g1 | |
16134 | ldx [%g4+0x78],%g3 | |
16135 | std %f12,[%g4] | |
16136 | ldx [%g4],%g2 | |
16137 | cmp %g3,%g2 ! %f12 = 00000000 000000ff | |
16138 | bne %xcc,p0_freg_check_fail | |
16139 | mov 0xf12,%g1 | |
16140 | ldx [%g4+0x80],%g3 | |
16141 | std %f14,[%g4] | |
16142 | ldx [%g4],%g2 | |
16143 | cmp %g3,%g2 ! %f14 = fc0000ff 00000000 | |
16144 | bne %xcc,p0_freg_check_fail | |
16145 | mov 0xf14,%g1 | |
16146 | ldx [%g4+0x88],%g3 | |
16147 | std %f24,[%g4] | |
16148 | ldx [%g4],%g2 | |
16149 | cmp %g3,%g2 ! %f24 = 23e3b300 0000cb00 | |
16150 | bne %xcc,p0_freg_check_fail | |
16151 | mov 0xf24,%g1 | |
16152 | ldx [%g4+0x90],%g3 | |
16153 | std %f28,[%g4] | |
16154 | ldx [%g4],%g2 | |
16155 | cmp %g3,%g2 ! %f28 = ff9638c2 0b931a2a | |
16156 | bne %xcc,p0_freg_check_fail | |
16157 | mov 0xf28,%g1 | |
16158 | ||
16159 | ! Check Point 77 completed | |
16160 | ||
16161 | ||
16162 | p0_label_386: | |
16163 | ! Mem[00000000211c0001] = 00ff1a4c, %l1 = ffffffffff000000 | |
16164 | ldstub [%o2+0x001],%l1 ! %l1 = 000000ff000000ff | |
16165 | ! %l2 = 0000000000000000, Mem[0000000010141400] = 00000000 | |
16166 | stwa %l2,[%i5+%g0]0x88 ! Mem[0000000010141400] = 00000000 | |
16167 | ! Mem[0000000010181408] = 00000000, %l7 = 00000000000000ff | |
16168 | swapa [%i6+%o4]0x88,%l7 ! %l7 = 0000000000000000 | |
16169 | ! %f14 = fc0000ff, Mem[0000000010081434] = fffeffff | |
16170 | st %f14,[%i2+0x034] ! Mem[0000000010081434] = fc0000ff | |
16171 | ! Mem[0000000030101410] = ff000000, %l0 = 000000000000009c | |
16172 | ldstuba [%i4+%o5]0x81,%l0 ! %l0 = 000000ff000000ff | |
16173 | ! %l7 = 0000000000000000, Mem[0000000030141400] = 5e000000 | |
16174 | stba %l7,[%i5+%g0]0x89 ! Mem[0000000030141400] = 5e000000 | |
16175 | ! %l3 = 0000000000000000, Mem[0000000010001408] = 000023e3 | |
16176 | stba %l3,[%i0+%o4]0x80 ! Mem[0000000010001408] = 000023e3 | |
16177 | ! Mem[0000000010141408] = 76c6c4ff, %l4 = 0000000000000000 | |
16178 | ldstuba [%i5+%o4]0x88,%l4 ! %l4 = 000000ff000000ff | |
16179 | ! %l4 = 00000000000000ff, Mem[0000000030141400] = 5e000000 | |
16180 | stba %l4,[%i5+%g0]0x89 ! Mem[0000000030141400] = 5e0000ff | |
16181 | ! Starting 10 instruction Load Burst | |
16182 | ! Mem[0000000010001410] = 00000000, %l7 = 0000000000000000 | |
16183 | lduha [%i0+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
16184 | ||
16185 | p0_label_387: | |
16186 | ! Mem[0000000010181430] = 10ac7b59 3eda2778, %l2 = 00000000, %l3 = 00000000 | |
16187 | ldd [%i6+0x030],%l2 ! %l2 = 0000000010ac7b59 000000003eda2778 | |
16188 | ! Mem[0000000030081410] = a2150334, %l5 = 0000000000000000 | |
16189 | lduwa [%i2+%o5]0x89,%l5 ! %l5 = 00000000a2150334 | |
16190 | ! Mem[00000000211c0000] = 00ff1a4c, %l1 = 00000000000000ff | |
16191 | lduba [%o2+0x000]%asi,%l1 ! %l1 = 0000000000000000 | |
16192 | ! Mem[0000000030001400] = 00000000, %l1 = 0000000000000000 | |
16193 | lduwa [%i0+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
16194 | ! Mem[00000000218000c0] = ffff8d82, %l3 = 000000003eda2778 | |
16195 | lduh [%o3+0x0c0],%l3 ! %l3 = 000000000000ffff | |
16196 | ! Mem[0000000010001420] = 0000000076c6c4ff, %f2 = ff000000 00ffffff | |
16197 | ldda [%i0+0x020]%asi,%f2 ! %f2 = 00000000 76c6c4ff | |
16198 | ! Mem[0000000030001400] = 00000000 00000000 000000ff ffff9079 | |
16199 | ! Mem[0000000030001410] = 000000ff 000000ff fc734517 000000ff | |
16200 | ! Mem[0000000030001420] = 1f41ff76 2164159c 3739e890 ffffac00 | |
16201 | ! Mem[0000000030001430] = ff000000 00009400 7827da3e 597bac10 | |
16202 | ldda [%i0]ASI_BLK_SL,%f16 ! Block Load from 0000000030001400 | |
16203 | ! Mem[0000000010141408] = ffc4c67600000000, %f2 = 00000000 76c6c4ff | |
16204 | ldda [%i5+%o4]0x80,%f2 ! %f2 = ffc4c676 00000000 | |
16205 | ! Mem[0000000030041410] = ff00000000000000, %l4 = 00000000000000ff | |
16206 | ldxa [%i1+%o5]0x89,%l4 ! %l4 = ff00000000000000 | |
16207 | ! Starting 10 instruction Store Burst | |
16208 | ! %l6 = 00000000000070e9, Mem[0000000030101410] = 000000ff | |
16209 | stha %l6,[%i4+%o5]0x89 ! Mem[0000000030101410] = 000070e9 | |
16210 | ||
16211 | p0_label_388: | |
16212 | ! Mem[00000000100c1434] = 00000000, %l3 = 0000ffff, %l2 = 10ac7b59 | |
16213 | add %i3,0x34,%g1 | |
16214 | casa [%g1]0x80,%l3,%l2 ! %l2 = 0000000000000000 | |
16215 | ! %l0 = 00000000000000ff, Mem[0000000010041400] = 0000000000000000 | |
16216 | stxa %l0,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000000000ff | |
16217 | ! Mem[0000000030001408] = 000000ff, %l2 = 0000000000000000 | |
16218 | swapa [%i0+%o4]0x81,%l2 ! %l2 = 00000000000000ff | |
16219 | ! Mem[0000000030181408] = ff000000, %l6 = 00000000000070e9 | |
16220 | swapa [%i6+%o4]0x81,%l6 ! %l6 = 00000000ff000000 | |
16221 | ! %l5 = 00000000a2150334, Mem[0000000030141410] = 0000000000000000 | |
16222 | stxa %l5,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000a2150334 | |
16223 | ! %l1 = 0000000000000000, Mem[0000000010001428] = 00000000d1c40003 | |
16224 | stx %l1,[%i0+0x028] ! Mem[0000000010001428] = 0000000000000000 | |
16225 | ! %f0 = ffffff00 0000008f ffc4c676 00000000 | |
16226 | ! %f4 = ff000000 00000076 00000012 000000ff | |
16227 | ! %f8 = 1f41ff76 2164159c 00000000 00007957 | |
16228 | ! %f12 = 00000000 000000ff fc0000ff 00000000 | |
16229 | stda %f0,[%i2]ASI_COMMIT_P ! Block Store to 0000000010081400 | |
16230 | membar #Sync ! Added by membar checker (66) | |
16231 | ! Mem[0000000010081400] = 00ffffff, %l0 = 00000000000000ff | |
16232 | ldstuba [%i2+%g0]0x88,%l0 ! %l0 = 000000ff000000ff | |
16233 | ! Mem[0000000010041400] = ff000000, %l5 = 00000000a2150334 | |
16234 | swapa [%i1+%g0]0x80,%l5 ! %l5 = 00000000ff000000 | |
16235 | ! Starting 10 instruction Load Burst | |
16236 | ! Mem[0000000010181424] = ff000000, %l3 = 000000000000ffff | |
16237 | lduba [%i6+0x027]%asi,%l3 ! %l3 = 0000000000000000 | |
16238 | ||
16239 | p0_label_389: | |
16240 | ! Mem[0000000010141408] = 76c6c4ff, %l7 = 0000000000000000 | |
16241 | ldsha [%i5+%o4]0x88,%l7 ! %l7 = ffffffffffffc4ff | |
16242 | ! Mem[0000000010001400] = 00000000 0000ffff, %l2 = 000000ff, %l3 = 00000000 | |
16243 | ldda [%i0+%g0]0x88,%l2 ! %l2 = 000000000000ffff 0000000000000000 | |
16244 | ! Mem[0000000030081410] = a2150334, %l6 = 00000000ff000000 | |
16245 | ldsha [%i2+%o5]0x89,%l6 ! %l6 = 0000000000000334 | |
16246 | ! Mem[0000000010001408] = 000023e300009c15, %l4 = ff00000000000000 | |
16247 | ldxa [%i0+0x008]%asi,%l4 ! %l4 = 000023e300009c15 | |
16248 | ! Mem[0000000030001410] = 000000ff, %l2 = 000000000000ffff | |
16249 | ldswa [%i0+%o5]0x81,%l2 ! %l2 = 00000000000000ff | |
16250 | ! Mem[0000000030041410] = 00000000, %l2 = 00000000000000ff | |
16251 | ldsba [%i1+%o5]0x81,%l2 ! %l2 = 0000000000000000 | |
16252 | ! Mem[0000000010041410] = ff000000, %l0 = 00000000000000ff | |
16253 | lduwa [%i1+0x010]%asi,%l0 ! %l0 = 00000000ff000000 | |
16254 | ! Mem[00000000100c1410] = 000000ff, %l2 = 0000000000000000 | |
16255 | ldsw [%i3+%o5],%l2 ! %l2 = 00000000000000ff | |
16256 | ! Mem[0000000010001400] = 0000ffff, %l5 = 00000000ff000000 | |
16257 | ldswa [%i0+%g0]0x88,%l5 ! %l5 = 000000000000ffff | |
16258 | ! Starting 10 instruction Store Burst | |
16259 | ! Mem[0000000030041400] = 00000000, %l2 = 00000000000000ff | |
16260 | ldstuba [%i1+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
16261 | ||
16262 | p0_label_390: | |
16263 | ! %l5 = 000000000000ffff, Mem[00000000300c1408] = ff000000ff000000 | |
16264 | stxa %l5,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 000000000000ffff | |
16265 | ! %l6 = 00000334, %l7 = ffffc4ff, Mem[0000000010181400] = fc734517 00000000 | |
16266 | stda %l6,[%i6+%g0]0x88 ! Mem[0000000010181400] = 00000334 ffffc4ff | |
16267 | ! %l2 = 0000000000000000, Mem[0000000030001408] = 00000000 | |
16268 | stha %l2,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000 | |
16269 | ! %f18 = 7990ffff ff000000, %l0 = 00000000ff000000 | |
16270 | ! Mem[0000000030181410] = ff156421000000ff | |
16271 | add %i6,0x010,%g1 | |
16272 | stda %f18,[%g1+%l0]ASI_PST32_SL ! Mem[0000000030181410] = ff156421000000ff | |
16273 | ! Mem[0000000030001410] = ff000000, %l0 = 00000000ff000000 | |
16274 | ldstuba [%i0+%o5]0x89,%l0 ! %l0 = 00000000000000ff | |
16275 | ! %f25 = 76ff411f, Mem[0000000030181408] = e9700000 | |
16276 | sta %f25,[%i6+%o4]0x89 ! Mem[0000000030181408] = 76ff411f | |
16277 | ! %l5 = 000000000000ffff, Mem[0000000010141400] = 00000000 | |
16278 | stha %l5,[%i5+%g0]0x88 ! Mem[0000000010141400] = 0000ffff | |
16279 | ! Mem[0000000030141400] = ff00005e, %l0 = 0000000000000000 | |
16280 | ldstuba [%i5+%g0]0x81,%l0 ! %l0 = 000000ff000000ff | |
16281 | ! Mem[0000000010081428] = 0000000000007957, %l3 = 0000000000000000, %l0 = 00000000000000ff | |
16282 | add %i2,0x28,%g1 | |
16283 | casxa [%g1]0x80,%l3,%l0 ! %l0 = 0000000000007957 | |
16284 | ! Starting 10 instruction Load Burst | |
16285 | ! Mem[0000000010041408] = a26115a26e092edc, %f28 = 00940000 000000ff | |
16286 | ldda [%i1+%o4]0x80,%f28 ! %f28 = a26115a2 6e092edc | |
16287 | ||
16288 | ! Check Point 78 for processor 0 | |
16289 | ||
16290 | set p0_check_pt_data_78,%g4 | |
16291 | rd %ccr,%g5 ! %g5 = 44 | |
16292 | ldx [%g4+0x08],%g2 | |
16293 | cmp %l0,%g2 ! %l0 = 0000000000007957 | |
16294 | bne %xcc,p0_reg_check_fail0 | |
16295 | mov 0xee0,%g1 | |
16296 | ldx [%g4+0x10],%g2 | |
16297 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
16298 | bne %xcc,p0_reg_check_fail1 | |
16299 | mov 0xee1,%g1 | |
16300 | ldx [%g4+0x18],%g2 | |
16301 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
16302 | bne %xcc,p0_reg_check_fail2 | |
16303 | mov 0xee2,%g1 | |
16304 | ldx [%g4+0x20],%g2 | |
16305 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
16306 | bne %xcc,p0_reg_check_fail3 | |
16307 | mov 0xee3,%g1 | |
16308 | ldx [%g4+0x28],%g2 | |
16309 | cmp %l4,%g2 ! %l4 = 000023e300009c15 | |
16310 | bne %xcc,p0_reg_check_fail4 | |
16311 | mov 0xee4,%g1 | |
16312 | ldx [%g4+0x30],%g2 | |
16313 | cmp %l5,%g2 ! %l5 = 000000000000ffff | |
16314 | bne %xcc,p0_reg_check_fail5 | |
16315 | mov 0xee5,%g1 | |
16316 | ldx [%g4+0x38],%g2 | |
16317 | cmp %l6,%g2 ! %l6 = 0000000000000334 | |
16318 | bne %xcc,p0_reg_check_fail6 | |
16319 | mov 0xee6,%g1 | |
16320 | ldx [%g4+0x40],%g2 | |
16321 | cmp %l7,%g2 ! %l7 = ffffffffffffc4ff | |
16322 | bne %xcc,p0_reg_check_fail7 | |
16323 | mov 0xee7,%g1 | |
16324 | ldx [%g4+0x48],%g3 | |
16325 | std %f2,[%g4] | |
16326 | ldx [%g4],%g2 | |
16327 | cmp %g3,%g2 ! %f2 = ffc4c676 00000000 | |
16328 | bne %xcc,p0_freg_check_fail | |
16329 | mov 0xf02,%g1 | |
16330 | ldx [%g4+0x50],%g3 | |
16331 | std %f16,[%g4] | |
16332 | ldx [%g4],%g2 | |
16333 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
16334 | bne %xcc,p0_freg_check_fail | |
16335 | mov 0xf16,%g1 | |
16336 | ldx [%g4+0x58],%g3 | |
16337 | std %f18,[%g4] | |
16338 | ldx [%g4],%g2 | |
16339 | cmp %g3,%g2 ! %f18 = 7990ffff ff000000 | |
16340 | bne %xcc,p0_freg_check_fail | |
16341 | mov 0xf18,%g1 | |
16342 | ldx [%g4+0x60],%g3 | |
16343 | std %f20,[%g4] | |
16344 | ldx [%g4],%g2 | |
16345 | cmp %g3,%g2 ! %f20 = ff000000 ff000000 | |
16346 | bne %xcc,p0_freg_check_fail | |
16347 | mov 0xf20,%g1 | |
16348 | ldx [%g4+0x68],%g3 | |
16349 | std %f22,[%g4] | |
16350 | ldx [%g4],%g2 | |
16351 | cmp %g3,%g2 ! %f22 = ff000000 174573fc | |
16352 | bne %xcc,p0_freg_check_fail | |
16353 | mov 0xf22,%g1 | |
16354 | ldx [%g4+0x70],%g3 | |
16355 | std %f24,[%g4] | |
16356 | ldx [%g4],%g2 | |
16357 | cmp %g3,%g2 ! %f24 = 9c156421 76ff411f | |
16358 | bne %xcc,p0_freg_check_fail | |
16359 | mov 0xf24,%g1 | |
16360 | ldx [%g4+0x78],%g3 | |
16361 | std %f26,[%g4] | |
16362 | ldx [%g4],%g2 | |
16363 | cmp %g3,%g2 ! %f26 = 00acffff 90e83937 | |
16364 | bne %xcc,p0_freg_check_fail | |
16365 | mov 0xf26,%g1 | |
16366 | ldx [%g4+0x80],%g3 | |
16367 | std %f28,[%g4] | |
16368 | ldx [%g4],%g2 | |
16369 | cmp %g3,%g2 ! %f28 = a26115a2 6e092edc | |
16370 | bne %xcc,p0_freg_check_fail | |
16371 | mov 0xf28,%g1 | |
16372 | ldx [%g4+0x88],%g3 | |
16373 | std %f30,[%g4] | |
16374 | ldx [%g4],%g2 | |
16375 | cmp %g3,%g2 ! %f30 = 10ac7b59 3eda2778 | |
16376 | bne %xcc,p0_freg_check_fail | |
16377 | mov 0xf30,%g1 | |
16378 | ||
16379 | ! Check Point 78 completed | |
16380 | ||
16381 | ||
16382 | p0_label_391: | |
16383 | ! Mem[00000000300c1410] = 0000005e, %f3 = 00000000 | |
16384 | lda [%i3+%o5]0x81,%f3 ! %f3 = 0000005e | |
16385 | ! Mem[000000001014141c] = ffffffff, %f7 = 000000ff | |
16386 | ld [%i5+0x01c],%f7 ! %f7 = ffffffff | |
16387 | ! Mem[0000000010141420] = 000000ffc7ec13bb, %f14 = fc0000ff 00000000 | |
16388 | ldda [%i5+0x020]%asi,%f14 ! %f14 = 000000ff c7ec13bb | |
16389 | ! Mem[00000000100c1410] = 000000ff 000000ff, %l2 = 00000000, %l3 = 00000000 | |
16390 | ldda [%i3+%o5]0x80,%l2 ! %l2 = 00000000000000ff 00000000000000ff | |
16391 | ! Mem[0000000010141410] = ff00000000000000, %f30 = 10ac7b59 3eda2778 | |
16392 | ldda [%i5+%o5]0x88,%f30 ! %f30 = ff000000 00000000 | |
16393 | ! Mem[0000000020800000] = ff008470, %l7 = ffffffffffffc4ff | |
16394 | lduh [%o1+%g0],%l7 ! %l7 = 000000000000ff00 | |
16395 | ! Mem[0000000010081434] = 000000ff, %l0 = 0000000000007957 | |
16396 | ldsb [%i2+0x036],%l0 ! %l0 = 0000000000000000 | |
16397 | ! Mem[00000000300c1400] = 00000000, %l2 = 00000000000000ff | |
16398 | ldswa [%i3+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
16399 | ! Mem[0000000030001400] = 00000000, %l6 = 0000000000000334 | |
16400 | ldsba [%i0+%g0]0x89,%l6 ! %l6 = 0000000000000000 | |
16401 | ! Starting 10 instruction Store Burst | |
16402 | ! Mem[0000000010081410] = ff000000, %l1 = 0000000000000000 | |
16403 | swapa [%i2+%o5]0x80,%l1 ! %l1 = 00000000ff000000 | |
16404 | ||
16405 | p0_label_392: | |
16406 | ! Mem[0000000030101400] = 00000000, %l4 = 000023e300009c15 | |
16407 | swapa [%i4+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
16408 | ! Mem[0000000030181400] = 426070e9, %l7 = 000000000000ff00 | |
16409 | swapa [%i6+%g0]0x89,%l7 ! %l7 = 00000000426070e9 | |
16410 | ! Mem[0000000030081410] = a2150334, %l0 = 0000000000000000 | |
16411 | ldstuba [%i2+%o5]0x89,%l0 ! %l0 = 00000034000000ff | |
16412 | ! Mem[0000000030041400] = ff000000, %l4 = 0000000000000000 | |
16413 | swapa [%i1+%g0]0x81,%l4 ! %l4 = 00000000ff000000 | |
16414 | ! Mem[0000000010181410] = ffc4c676, %l5 = 000000000000ffff | |
16415 | ldstuba [%i6+%o5]0x80,%l5 ! %l5 = 000000ff000000ff | |
16416 | ! Mem[0000000010141410] = 00000000, %l7 = 00000000426070e9 | |
16417 | ldstuba [%i5+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
16418 | ! %l3 = 00000000000000ff, Mem[0000000030141400] = 7a0000005e0000ff | |
16419 | stxa %l3,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000000000ff | |
16420 | ! %l7 = 0000000000000000, Mem[00000000100c1410] = 000000ff | |
16421 | stba %l7,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 000000ff | |
16422 | ! %l5 = 00000000000000ff, Mem[0000000030041408] = ff00000000000000 | |
16423 | stxa %l5,[%i1+%o4]0x81 ! Mem[0000000030041408] = 00000000000000ff | |
16424 | ! Starting 10 instruction Load Burst | |
16425 | ! Mem[0000000010181408] = ff00000000ffffff, %l2 = 0000000000000000 | |
16426 | ldxa [%i6+%o4]0x80,%l2 ! %l2 = ff00000000ffffff | |
16427 | ||
16428 | p0_label_393: | |
16429 | ! Mem[0000000010141400] = d40000000000ffff, %f22 = ff000000 174573fc | |
16430 | ldda [%i5+%g0]0x88,%f22 ! %f22 = d4000000 0000ffff | |
16431 | ! Mem[0000000010141410] = ff000000, %l6 = 0000000000000000 | |
16432 | ldsba [%i5+%o5]0x80,%l6 ! %l6 = ffffffffffffffff | |
16433 | ! Mem[0000000010141410] = ff000000000000ff, %f18 = 7990ffff ff000000 | |
16434 | ldd [%i5+%o5],%f18 ! %f18 = ff000000 000000ff | |
16435 | ! Mem[0000000010081400] = ffffff00, %l2 = ff00000000ffffff | |
16436 | lduba [%i2+%g0]0x80,%l2 ! %l2 = 00000000000000ff | |
16437 | ! Mem[0000000010181400] = 34030000, %l7 = 0000000000000000 | |
16438 | lduba [%i6+%g0]0x80,%l7 ! %l7 = 0000000000000034 | |
16439 | ! Mem[0000000030041408] = 00000000, %l4 = 00000000ff000000 | |
16440 | ldswa [%i1+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
16441 | ! Mem[000000001008140c] = 00000000, %l7 = 0000000000000034 | |
16442 | ldsb [%i2+0x00c],%l7 ! %l7 = 0000000000000000 | |
16443 | ! Mem[00000000300c1408] = 00000000, %l0 = 0000000000000034 | |
16444 | lduwa [%i3+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
16445 | ! Mem[00000000100c1400] = 8f000000, %l4 = 0000000000000000 | |
16446 | lduwa [%i3+%g0]0x88,%l4 ! %l4 = 000000008f000000 | |
16447 | ! Starting 10 instruction Store Burst | |
16448 | ! %l4 = 000000008f000000, Mem[0000000010181410] = ffc4c676 | |
16449 | stba %l4,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00c4c676 | |
16450 | ||
16451 | p0_label_394: | |
16452 | ! %l4 = 000000008f000000, Mem[0000000010041420] = 23e3b300ff00cb00 | |
16453 | stx %l4,[%i1+0x020] ! Mem[0000000010041420] = 000000008f000000 | |
16454 | ! %l7 = 0000000000000000, Mem[0000000010001410] = 00000000 | |
16455 | stha %l7,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 | |
16456 | ! %l6 = ffffffff, %l7 = 00000000, Mem[0000000010141410] = ff000000 000000ff | |
16457 | stda %l6,[%i5+%o5]0x80 ! Mem[0000000010141410] = ffffffff 00000000 | |
16458 | ! Mem[00000000300c1410] = 5e000000, %l5 = 00000000000000ff | |
16459 | swapa [%i3+%o5]0x89,%l5 ! %l5 = 000000005e000000 | |
16460 | ! %l2 = 000000ff, %l3 = 000000ff, Mem[0000000010001410] = 00000000 00000000 | |
16461 | stda %l2,[%i0+%o5]0x80 ! Mem[0000000010001410] = 000000ff 000000ff | |
16462 | ! %l0 = 00000000, %l1 = ff000000, Mem[0000000010001400] = ffff0000 00000000 | |
16463 | stda %l0,[%i0+0x000]%asi ! Mem[0000000010001400] = 00000000 ff000000 | |
16464 | ! %f13 = 000000ff, Mem[0000000030141410] = 00000000 | |
16465 | sta %f13,[%i5+%o5]0x89 ! Mem[0000000030141410] = 000000ff | |
16466 | ! Mem[0000000010101400] = ffffff00, %l1 = 00000000ff000000, %asi = 80 | |
16467 | swapa [%i4+0x000]%asi,%l1 ! %l1 = 00000000ffffff00 | |
16468 | ! Mem[0000000010081400] = ffffff00, %l5 = 000000005e000000 | |
16469 | ldstuba [%i2+%g0]0x80,%l5 ! %l5 = 000000ff000000ff | |
16470 | ! Starting 10 instruction Load Burst | |
16471 | ! Mem[0000000030001400] = 0000000000000000, %l0 = 0000000000000000 | |
16472 | ldxa [%i0+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
16473 | ||
16474 | p0_label_395: | |
16475 | ! Mem[0000000010001400] = 000000ff00000000, %f4 = ff000000 00000076 | |
16476 | ldda [%i0+%g0]0x88,%f4 ! %f4 = 000000ff 00000000 | |
16477 | ! Mem[00000000100c1430] = ffffffff, %f15 = c7ec13bb | |
16478 | lda [%i3+0x030]%asi,%f15 ! %f15 = ffffffff | |
16479 | ! Mem[0000000010181410] = 00c4c676, %l5 = 00000000000000ff | |
16480 | ldsha [%i6+%o5]0x80,%l5 ! %l5 = 00000000000000c4 | |
16481 | ! Mem[0000000010081400] = 00ffffff, %f23 = 0000ffff | |
16482 | lda [%i2+%g0]0x88,%f23 ! %f23 = 00ffffff | |
16483 | ! Mem[00000000201c0000] = ffff9457, %l3 = 00000000000000ff | |
16484 | lduha [%o0+0x000]%asi,%l3 ! %l3 = 000000000000ffff | |
16485 | ! Mem[0000000030101410] = 7827da3e 000070e9, %l4 = 8f000000, %l5 = 000000c4 | |
16486 | ldda [%i4+%o5]0x89,%l4 ! %l4 = 00000000000070e9 000000007827da3e | |
16487 | ! Mem[0000000030101400] = 159c0000, %f3 = 0000005e | |
16488 | lda [%i4+%g0]0x89,%f3 ! %f3 = 159c0000 | |
16489 | ! Mem[0000000021800100] = a3ff11d1, %l6 = ffffffffffffffff | |
16490 | ldsb [%o3+0x101],%l6 ! %l6 = ffffffffffffffff | |
16491 | ! Mem[0000000030001410] = ff0000ff000000ff, %l1 = 00000000ffffff00 | |
16492 | ldxa [%i0+%o5]0x81,%l1 ! %l1 = ff0000ff000000ff | |
16493 | ! Starting 10 instruction Store Burst | |
16494 | ! %l7 = 0000000000000000, Mem[0000000030001410] = ff0000ff | |
16495 | stba %l7,[%i0+%o5]0x81 ! Mem[0000000030001410] = 000000ff | |
16496 | ||
16497 | ! Check Point 79 for processor 0 | |
16498 | ||
16499 | set p0_check_pt_data_79,%g4 | |
16500 | rd %ccr,%g5 ! %g5 = 44 | |
16501 | ldx [%g4+0x08],%g2 | |
16502 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
16503 | bne %xcc,p0_reg_check_fail0 | |
16504 | mov 0xee0,%g1 | |
16505 | ldx [%g4+0x10],%g2 | |
16506 | cmp %l1,%g2 ! %l1 = ff0000ff000000ff | |
16507 | bne %xcc,p0_reg_check_fail1 | |
16508 | mov 0xee1,%g1 | |
16509 | ldx [%g4+0x18],%g2 | |
16510 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
16511 | bne %xcc,p0_reg_check_fail2 | |
16512 | mov 0xee2,%g1 | |
16513 | ldx [%g4+0x20],%g2 | |
16514 | cmp %l3,%g2 ! %l3 = 000000000000ffff | |
16515 | bne %xcc,p0_reg_check_fail3 | |
16516 | mov 0xee3,%g1 | |
16517 | ldx [%g4+0x28],%g2 | |
16518 | cmp %l4,%g2 ! %l4 = 00000000000070e9 | |
16519 | bne %xcc,p0_reg_check_fail4 | |
16520 | mov 0xee4,%g1 | |
16521 | ldx [%g4+0x30],%g2 | |
16522 | cmp %l5,%g2 ! %l5 = 000000007827da3e | |
16523 | bne %xcc,p0_reg_check_fail5 | |
16524 | mov 0xee5,%g1 | |
16525 | ldx [%g4+0x38],%g2 | |
16526 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
16527 | bne %xcc,p0_reg_check_fail6 | |
16528 | mov 0xee6,%g1 | |
16529 | ldx [%g4+0x40],%g2 | |
16530 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
16531 | bne %xcc,p0_reg_check_fail7 | |
16532 | mov 0xee7,%g1 | |
16533 | ldx [%g4+0x48],%g3 | |
16534 | std %f2,[%g4] | |
16535 | ldx [%g4],%g2 | |
16536 | cmp %g3,%g2 ! %f2 = ffc4c676 159c0000 | |
16537 | bne %xcc,p0_freg_check_fail | |
16538 | mov 0xf02,%g1 | |
16539 | ldx [%g4+0x50],%g3 | |
16540 | std %f4,[%g4] | |
16541 | ldx [%g4],%g2 | |
16542 | cmp %g3,%g2 ! %f4 = 000000ff 00000000 | |
16543 | bne %xcc,p0_freg_check_fail | |
16544 | mov 0xf04,%g1 | |
16545 | ldx [%g4+0x58],%g3 | |
16546 | std %f6,[%g4] | |
16547 | ldx [%g4],%g2 | |
16548 | cmp %g3,%g2 ! %f6 = 00000012 ffffffff | |
16549 | bne %xcc,p0_freg_check_fail | |
16550 | mov 0xf06,%g1 | |
16551 | ldx [%g4+0x60],%g3 | |
16552 | std %f14,[%g4] | |
16553 | ldx [%g4],%g2 | |
16554 | cmp %g3,%g2 ! %f14 = 000000ff ffffffff | |
16555 | bne %xcc,p0_freg_check_fail | |
16556 | mov 0xf14,%g1 | |
16557 | ldx [%g4+0x68],%g3 | |
16558 | std %f18,[%g4] | |
16559 | ldx [%g4],%g2 | |
16560 | cmp %g3,%g2 ! %f18 = ff000000 000000ff | |
16561 | bne %xcc,p0_freg_check_fail | |
16562 | mov 0xf18,%g1 | |
16563 | ldx [%g4+0x70],%g3 | |
16564 | std %f22,[%g4] | |
16565 | ldx [%g4],%g2 | |
16566 | cmp %g3,%g2 ! %f22 = d4000000 00ffffff | |
16567 | bne %xcc,p0_freg_check_fail | |
16568 | mov 0xf22,%g1 | |
16569 | ldx [%g4+0x78],%g3 | |
16570 | std %f30,[%g4] | |
16571 | ldx [%g4],%g2 | |
16572 | cmp %g3,%g2 ! %f30 = ff000000 00000000 | |
16573 | bne %xcc,p0_freg_check_fail | |
16574 | mov 0xf30,%g1 | |
16575 | ||
16576 | ! Check Point 79 completed | |
16577 | ||
16578 | ||
16579 | p0_label_396: | |
16580 | ! Mem[000000001008141c] = 000000ff, %l7 = 0000000000000000 | |
16581 | swap [%i2+0x01c],%l7 ! %l7 = 00000000000000ff | |
16582 | ! Mem[0000000010041408] = a21561a2, %l0 = 0000000000000000 | |
16583 | ldstuba [%i1+%o4]0x88,%l0 ! %l0 = 000000a2000000ff | |
16584 | ! %l5 = 000000007827da3e, Mem[0000000010041410] = 000000ff | |
16585 | stba %l5,[%i1+%o5]0x88 ! Mem[0000000010041410] = 0000003e | |
16586 | ! Mem[00000000100c1418] = ff000000, %l4 = 00000000000070e9 | |
16587 | swap [%i3+0x018],%l4 ! %l4 = 00000000ff000000 | |
16588 | ! Mem[0000000030001400] = 00000000, %l7 = 00000000000000ff | |
16589 | ldstuba [%i0+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
16590 | ! %l5 = 000000007827da3e, Mem[0000000010141408] = 76c6c4ff | |
16591 | stwa %l5,[%i5+%o4]0x88 ! Mem[0000000010141408] = 7827da3e | |
16592 | ! Mem[0000000010181424] = ff000000, %l6 = ffffffffffffffff | |
16593 | ldstuba [%i6+0x024]%asi,%l6 ! %l6 = 000000ff000000ff | |
16594 | ! %l2 = 00000000000000ff, Mem[0000000030041400] = 00000000 | |
16595 | stwa %l2,[%i1+%g0]0x89 ! Mem[0000000030041400] = 000000ff | |
16596 | ! %f8 = 1f41ff76 2164159c, %l1 = ff0000ff000000ff | |
16597 | ! Mem[00000000100c1418] = 000070e93eda2778 | |
16598 | add %i3,0x018,%g1 | |
16599 | stda %f8,[%g1+%l1]ASI_PST16_P ! Mem[00000000100c1418] = 1f41ff762164159c | |
16600 | ! Starting 10 instruction Load Burst | |
16601 | ! Mem[0000000030101410] = e9700000, %l4 = 00000000ff000000 | |
16602 | ldswa [%i4+%o5]0x81,%l4 ! %l4 = ffffffffe9700000 | |
16603 | ||
16604 | p0_label_397: | |
16605 | ! Mem[0000000010181400] = 34030000, %l4 = ffffffffe9700000 | |
16606 | ldsha [%i6+%g0]0x80,%l4 ! %l4 = 0000000000003403 | |
16607 | ! Mem[0000000030141410] = ff000000 a2150334, %l2 = 000000ff, %l3 = 0000ffff | |
16608 | ldda [%i5+%o5]0x81,%l2 ! %l2 = 00000000ff000000 00000000a2150334 | |
16609 | ! Mem[0000000010001428] = 0000000000000000, %f10 = 00000000 00007957 | |
16610 | ldd [%i0+0x028],%f10 ! %f10 = 00000000 00000000 | |
16611 | ! Mem[0000000010001400] = 00000000, %l7 = 0000000000000000 | |
16612 | ldsba [%i0+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
16613 | ! Mem[0000000010081400] = ffffff000000008f, %f22 = d4000000 00ffffff | |
16614 | ldda [%i2+%g0]0x80,%f22 ! %f22 = ffffff00 0000008f | |
16615 | ! Mem[0000000010041428] = ffa3000000000000, %l5 = 000000007827da3e | |
16616 | ldx [%i1+0x028],%l5 ! %l5 = ffa3000000000000 | |
16617 | ! Mem[0000000021800180] = ffffe2ae, %l0 = 00000000000000a2 | |
16618 | lduba [%o3+0x180]%asi,%l0 ! %l0 = 00000000000000ff | |
16619 | ! Mem[0000000030101410] = e9700000, %l0 = 00000000000000ff | |
16620 | ldswa [%i4+%o5]0x81,%l0 ! %l0 = ffffffffe9700000 | |
16621 | ! Mem[0000000030081400] = 00000000, %l0 = ffffffffe9700000 | |
16622 | ldsba [%i2+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
16623 | ! Starting 10 instruction Store Burst | |
16624 | ! %l4 = 00003403, %l5 = 00000000, Mem[0000000010101420] = 1f41ff76 2164159c | |
16625 | std %l4,[%i4+0x020] ! Mem[0000000010101420] = 00003403 00000000 | |
16626 | ||
16627 | p0_label_398: | |
16628 | ! %l3 = 00000000a2150334, Mem[0000000030101400] = 159c0000 | |
16629 | stha %l3,[%i4+%g0]0x89 ! Mem[0000000030101400] = 159c0334 | |
16630 | ! %l7 = 0000000000000000, Mem[0000000030081408] = 00000010 | |
16631 | stba %l7,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000000 | |
16632 | ! %f0 = ffffff00, Mem[0000000010001400] = 00000000 | |
16633 | sta %f0 ,[%i0+%g0]0x88 ! Mem[0000000010001400] = ffffff00 | |
16634 | ! Mem[0000000030101400] = 159c0334, %l7 = 0000000000000000 | |
16635 | ldstuba [%i4+%g0]0x89,%l7 ! %l7 = 00000034000000ff | |
16636 | ! %f17 = 00000000, Mem[0000000030141400] = ff000000 | |
16637 | sta %f17,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00000000 | |
16638 | ! Mem[0000000030141408] = ff000000, %l3 = 00000000a2150334 | |
16639 | swapa [%i5+%o4]0x89,%l3 ! %l3 = 00000000ff000000 | |
16640 | ! Mem[0000000010101400] = 000000ff, %l5 = ffa3000000000000 | |
16641 | swapa [%i4+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
16642 | ! %f24 = 9c156421, Mem[0000000030001400] = ff000000 | |
16643 | sta %f24,[%i0+%g0]0x81 ! Mem[0000000030001400] = 9c156421 | |
16644 | ! Mem[0000000010041410] = 0000003e, %l6 = 00000000000000ff | |
16645 | ldstuba [%i1+%o5]0x88,%l6 ! %l6 = 0000003e000000ff | |
16646 | ! Starting 10 instruction Load Burst | |
16647 | membar #Sync ! Added by membar checker (67) | |
16648 | ! Mem[00000000100c1400] = 0000008f fffffff8 00000000 00000000 | |
16649 | ! Mem[00000000100c1410] = 000000ff 000000ff 1f41ff76 2164159c | |
16650 | ! Mem[00000000100c1420] = ff000000 000000ff 00000000 00000000 | |
16651 | ! Mem[00000000100c1430] = ffffffff 00000000 5dffffe0 3d61d89c | |
16652 | ldda [%i3]ASI_BLK_AIUPL,%f16 ! Block Load from 00000000100c1400 | |
16653 | ||
16654 | p0_label_399: | |
16655 | ! Mem[0000000030001408] = 00000000, %f4 = 000000ff | |
16656 | lda [%i0+%o4]0x81,%f4 ! %f4 = 00000000 | |
16657 | ! Mem[0000000030141408] = a2150334, %l1 = ff0000ff000000ff | |
16658 | lduba [%i5+%o4]0x89,%l1 ! %l1 = 0000000000000034 | |
16659 | ! Mem[0000000030081400] = 00000000 00000000 00000000 6e092edc | |
16660 | ! Mem[0000000030081410] = ff0315a2 ffffff00 dc2e096e a21561a2 | |
16661 | ! Mem[0000000030081420] = 1fd2c976 2164489c 426070e9 fc734517 | |
16662 | ! Mem[0000000030081430] = 57793d9d 00004990 2a1a930b c238965e | |
16663 | ldda [%i2]ASI_BLK_AIUS,%f16 ! Block Load from 0000000030081400 | |
16664 | ! Mem[0000000010041400] = a2150334, %l0 = 0000000000000000 | |
16665 | lduba [%i1+%g0]0x80,%l0 ! %l0 = 00000000000000a2 | |
16666 | ! Mem[0000000030141408] = a2150334, %l1 = 0000000000000034 | |
16667 | ldswa [%i5+%o4]0x89,%l1 ! %l1 = ffffffffa2150334 | |
16668 | ! Mem[0000000010081400] = ffffff00 0000008f ffc4c676 00000000 | |
16669 | ! Mem[0000000010081410] = 00000000 00000076 00000012 00000000 | |
16670 | ! Mem[0000000010081420] = 1f41ff76 2164159c 00000000 00007957 | |
16671 | ! Mem[0000000010081430] = 00000000 000000ff fc0000ff 00000000 | |
16672 | ldda [%i2]ASI_BLK_P,%f0 ! Block Load from 0000000010081400 | |
16673 | ! Mem[0000000010081410] = 0000000000000076, %f22 = dc2e096e a21561a2 | |
16674 | ldda [%i2+%o5]0x80,%f22 ! %f22 = 00000000 00000076 | |
16675 | ! Mem[0000000030081408] = 00000000, %f30 = 2a1a930b | |
16676 | lda [%i2+%o4]0x81,%f30 ! %f30 = 00000000 | |
16677 | ! Mem[0000000030081400] = 00000000, %f29 = 00004990 | |
16678 | lda [%i2+%g0]0x81,%f29 ! %f29 = 00000000 | |
16679 | ! Starting 10 instruction Store Burst | |
16680 | membar #Sync ! Added by membar checker (68) | |
16681 | ! %f26 = 426070e9 fc734517, Mem[0000000010081400] = ffffff00 0000008f | |
16682 | stda %f26,[%i2+%g0]0x80 ! Mem[0000000010081400] = 426070e9 fc734517 | |
16683 | ||
16684 | p0_label_400: | |
16685 | ! Mem[0000000021800181] = ffffe2ae, %l0 = 00000000000000a2 | |
16686 | ldstub [%o3+0x181],%l0 ! %l0 = 000000ff000000ff | |
16687 | ! Mem[0000000030101410] = e9700000, %l1 = ffffffffa2150334 | |
16688 | swapa [%i4+%o5]0x81,%l1 ! %l1 = 00000000e9700000 | |
16689 | ! Mem[00000000100c1400] = 8f000000, %l3 = 00000000ff000000 | |
16690 | ldstuba [%i3+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
16691 | ! Mem[0000000010041410] = ff000000ff000000, %l4 = 0000000000003403, %l3 = 0000000000000000 | |
16692 | add %i1,0x10,%g1 | |
16693 | casxa [%g1]0x80,%l4,%l3 ! %l3 = ff000000ff000000 | |
16694 | ! %f0 = ffffff00 0000008f, %l4 = 0000000000003403 | |
16695 | ! Mem[0000000030001400] = 9c15642100000000 | |
16696 | stda %f0,[%i0+%l4]ASI_PST8_SL ! Mem[0000000030001400] = 8f00642100000000 | |
16697 | ! %l2 = ff000000, %l3 = ff000000, Mem[0000000030081408] = 00000000 dc2e096e | |
16698 | stda %l2,[%i2+%o4]0x89 ! Mem[0000000030081408] = ff000000 ff000000 | |
16699 | ! %l5 = 00000000000000ff, Mem[0000000010081428] = 0000000000007957, %asi = 80 | |
16700 | stxa %l5,[%i2+0x028]%asi ! Mem[0000000010081428] = 00000000000000ff | |
16701 | ! Mem[0000000010141400] = ffff0000, %l1 = 00000000e9700000 | |
16702 | ldstuba [%i5+%g0]0x80,%l1 ! %l1 = 000000ff000000ff | |
16703 | ! %l3 = ff000000ff000000, Mem[00000000300c1400] = 000000000b931a2a | |
16704 | stxa %l3,[%i3+%g0]0x81 ! Mem[00000000300c1400] = ff000000ff000000 | |
16705 | ! Starting 10 instruction Load Burst | |
16706 | ! Mem[0000000010001410] = ff000000ff000000, %l2 = 00000000ff000000 | |
16707 | ldxa [%i0+%o5]0x88,%l2 ! %l2 = ff000000ff000000 | |
16708 | ||
16709 | ! Check Point 80 for processor 0 | |
16710 | ||
16711 | set p0_check_pt_data_80,%g4 | |
16712 | rd %ccr,%g5 ! %g5 = 44 | |
16713 | ldx [%g4+0x08],%g2 | |
16714 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
16715 | bne %xcc,p0_reg_check_fail0 | |
16716 | mov 0xee0,%g1 | |
16717 | ldx [%g4+0x10],%g2 | |
16718 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
16719 | bne %xcc,p0_reg_check_fail1 | |
16720 | mov 0xee1,%g1 | |
16721 | ldx [%g4+0x18],%g2 | |
16722 | cmp %l2,%g2 ! %l2 = ff000000ff000000 | |
16723 | bne %xcc,p0_reg_check_fail2 | |
16724 | mov 0xee2,%g1 | |
16725 | ldx [%g4+0x20],%g2 | |
16726 | cmp %l3,%g2 ! %l3 = ff000000ff000000 | |
16727 | bne %xcc,p0_reg_check_fail3 | |
16728 | mov 0xee3,%g1 | |
16729 | ldx [%g4+0x28],%g2 | |
16730 | cmp %l4,%g2 ! %l4 = 0000000000003403 | |
16731 | bne %xcc,p0_reg_check_fail4 | |
16732 | mov 0xee4,%g1 | |
16733 | ldx [%g4+0x30],%g2 | |
16734 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
16735 | bne %xcc,p0_reg_check_fail5 | |
16736 | mov 0xee5,%g1 | |
16737 | ldx [%g4+0x38],%g2 | |
16738 | cmp %l6,%g2 ! %l6 = 000000000000003e | |
16739 | bne %xcc,p0_reg_check_fail6 | |
16740 | mov 0xee6,%g1 | |
16741 | ldx [%g4+0x40],%g2 | |
16742 | cmp %l7,%g2 ! %l7 = 0000000000000034 | |
16743 | bne %xcc,p0_reg_check_fail7 | |
16744 | mov 0xee7,%g1 | |
16745 | ldx [%g4+0x48],%g3 | |
16746 | std %f0,[%g4] | |
16747 | ldx [%g4],%g2 | |
16748 | cmp %g3,%g2 ! %f0 = ffffff00 0000008f | |
16749 | bne %xcc,p0_freg_check_fail | |
16750 | mov 0xf00,%g1 | |
16751 | ldx [%g4+0x50],%g3 | |
16752 | std %f2,[%g4] | |
16753 | ldx [%g4],%g2 | |
16754 | cmp %g3,%g2 ! %f2 = ffc4c676 00000000 | |
16755 | bne %xcc,p0_freg_check_fail | |
16756 | mov 0xf02,%g1 | |
16757 | ldx [%g4+0x58],%g3 | |
16758 | std %f4,[%g4] | |
16759 | ldx [%g4],%g2 | |
16760 | cmp %g3,%g2 ! %f4 = 00000000 00000076 | |
16761 | bne %xcc,p0_freg_check_fail | |
16762 | mov 0xf04,%g1 | |
16763 | ldx [%g4+0x60],%g3 | |
16764 | std %f6,[%g4] | |
16765 | ldx [%g4],%g2 | |
16766 | cmp %g3,%g2 ! %f6 = 00000012 00000000 | |
16767 | bne %xcc,p0_freg_check_fail | |
16768 | mov 0xf06,%g1 | |
16769 | ldx [%g4+0x68],%g3 | |
16770 | std %f8,[%g4] | |
16771 | ldx [%g4],%g2 | |
16772 | cmp %g3,%g2 ! %f8 = 1f41ff76 2164159c | |
16773 | bne %xcc,p0_freg_check_fail | |
16774 | mov 0xf08,%g1 | |
16775 | ldx [%g4+0x70],%g3 | |
16776 | std %f10,[%g4] | |
16777 | ldx [%g4],%g2 | |
16778 | cmp %g3,%g2 ! %f10 = 00000000 00007957 | |
16779 | bne %xcc,p0_freg_check_fail | |
16780 | mov 0xf10,%g1 | |
16781 | ldx [%g4+0x78],%g3 | |
16782 | std %f12,[%g4] | |
16783 | ldx [%g4],%g2 | |
16784 | cmp %g3,%g2 ! %f12 = 00000000 000000ff | |
16785 | bne %xcc,p0_freg_check_fail | |
16786 | mov 0xf12,%g1 | |
16787 | ldx [%g4+0x80],%g3 | |
16788 | std %f14,[%g4] | |
16789 | ldx [%g4],%g2 | |
16790 | cmp %g3,%g2 ! %f14 = fc0000ff 00000000 | |
16791 | bne %xcc,p0_freg_check_fail | |
16792 | mov 0xf14,%g1 | |
16793 | ldx [%g4+0x88],%g3 | |
16794 | std %f16,[%g4] | |
16795 | ldx [%g4],%g2 | |
16796 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
16797 | bne %xcc,p0_freg_check_fail | |
16798 | mov 0xf16,%g1 | |
16799 | ldx [%g4+0x90],%g3 | |
16800 | std %f18,[%g4] | |
16801 | ldx [%g4],%g2 | |
16802 | cmp %g3,%g2 ! %f18 = 00000000 6e092edc | |
16803 | bne %xcc,p0_freg_check_fail | |
16804 | mov 0xf18,%g1 | |
16805 | ldx [%g4+0x98],%g3 | |
16806 | std %f20,[%g4] | |
16807 | ldx [%g4],%g2 | |
16808 | cmp %g3,%g2 ! %f20 = ff0315a2 ffffff00 | |
16809 | bne %xcc,p0_freg_check_fail | |
16810 | mov 0xf20,%g1 | |
16811 | ldx [%g4+0xa0],%g3 | |
16812 | std %f22,[%g4] | |
16813 | ldx [%g4],%g2 | |
16814 | cmp %g3,%g2 ! %f22 = 00000000 00000076 | |
16815 | bne %xcc,p0_freg_check_fail | |
16816 | mov 0xf22,%g1 | |
16817 | ldx [%g4+0xa8],%g3 | |
16818 | std %f24,[%g4] | |
16819 | ldx [%g4],%g2 | |
16820 | cmp %g3,%g2 ! %f24 = 1fd2c976 2164489c | |
16821 | bne %xcc,p0_freg_check_fail | |
16822 | mov 0xf24,%g1 | |
16823 | ldx [%g4+0xb0],%g3 | |
16824 | std %f26,[%g4] | |
16825 | ldx [%g4],%g2 | |
16826 | cmp %g3,%g2 ! %f26 = 426070e9 fc734517 | |
16827 | bne %xcc,p0_freg_check_fail | |
16828 | mov 0xf26,%g1 | |
16829 | ldx [%g4+0xb8],%g3 | |
16830 | std %f28,[%g4] | |
16831 | ldx [%g4],%g2 | |
16832 | cmp %g3,%g2 ! %f28 = 57793d9d 00000000 | |
16833 | bne %xcc,p0_freg_check_fail | |
16834 | mov 0xf28,%g1 | |
16835 | ldx [%g4+0xc0],%g3 | |
16836 | std %f30,[%g4] | |
16837 | ldx [%g4],%g2 | |
16838 | cmp %g3,%g2 ! %f30 = 00000000 c238965e | |
16839 | bne %xcc,p0_freg_check_fail | |
16840 | mov 0xf30,%g1 | |
16841 | ||
16842 | ! Check Point 80 completed | |
16843 | ||
16844 | ||
16845 | p0_label_401: | |
16846 | ! Mem[0000000010081410] = 0000000000000076, %f20 = ff0315a2 ffffff00 | |
16847 | ldda [%i2+0x010]%asi,%f20 ! %f20 = 00000000 00000076 | |
16848 | ! Mem[0000000010101424] = 00000000, %f8 = 1f41ff76 | |
16849 | lda [%i4+0x024]%asi,%f8 ! %f8 = 00000000 | |
16850 | ! Mem[00000000100c142c] = 00000000, %l0 = 00000000000000ff | |
16851 | ldsh [%i3+0x02c],%l0 ! %l0 = 0000000000000000 | |
16852 | ! Mem[0000000030101400] = 159c03ff, %l6 = 000000000000003e | |
16853 | ldsha [%i4+%g0]0x89,%l6 ! %l6 = 00000000000003ff | |
16854 | ! Mem[0000000021800140] = 00c61df6, %l3 = ff000000ff000000 | |
16855 | ldsh [%o3+0x140],%l3 ! %l3 = 00000000000000c6 | |
16856 | ! Mem[0000000010001410] = 000000ff, %l4 = 0000000000003403 | |
16857 | lduba [%i0+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
16858 | ! Mem[0000000010041410] = 000000ff000000ff, %f0 = ffffff00 0000008f | |
16859 | ldda [%i1+%o5]0x88,%f0 ! %f0 = 000000ff 000000ff | |
16860 | ! Mem[0000000010101400] = 00000000, %f18 = 00000000 | |
16861 | lda [%i4+%g0]0x80,%f18 ! %f18 = 00000000 | |
16862 | ! Mem[0000000030181408] = 1f41ff76, %l2 = ff000000ff000000 | |
16863 | lduba [%i6+%o4]0x81,%l2 ! %l2 = 000000000000001f | |
16864 | ! Starting 10 instruction Store Burst | |
16865 | ! %l4 = 0000000000000000, Mem[0000000010081408] = ffc4c676 | |
16866 | stw %l4,[%i2+%o4] ! Mem[0000000010081408] = 00000000 | |
16867 | ||
16868 | p0_label_402: | |
16869 | ! %f6 = 00000012 00000000, Mem[0000000030081400] = 00000000 00000000 | |
16870 | stda %f6 ,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000012 00000000 | |
16871 | ! Mem[0000000021800101] = a3ff11d1, %l1 = 00000000000000ff | |
16872 | ldstuba [%o3+0x101]%asi,%l1 ! %l1 = 000000ff000000ff | |
16873 | ! %f0 = 000000ff 000000ff ffc4c676 00000000 | |
16874 | ! %f4 = 00000000 00000076 00000012 00000000 | |
16875 | ! %f8 = 00000000 2164159c 00000000 00007957 | |
16876 | ! %f12 = 00000000 000000ff fc0000ff 00000000 | |
16877 | stda %f0,[%i2]ASI_BLK_AIUS ! Block Store to 0000000030081400 | |
16878 | ! %l3 = 00000000000000c6, Mem[0000000030001400] = 2164008f | |
16879 | stha %l3,[%i0+%g0]0x89 ! Mem[0000000030001400] = 216400c6 | |
16880 | ! Mem[0000000030041410] = 00000000, %l5 = 00000000000000ff | |
16881 | ldstuba [%i1+%o5]0x89,%l5 ! %l5 = 00000000000000ff | |
16882 | ! %l0 = 00000000, %l1 = 000000ff, Mem[0000000010101438] = fc0000ff 00000000 | |
16883 | std %l0,[%i4+0x038] ! Mem[0000000010101438] = 00000000 000000ff | |
16884 | ! Mem[0000000010141408] = 3eda2778, %l3 = 00000000000000c6 | |
16885 | swapa [%i5+%o4]0x80,%l3 ! %l3 = 000000003eda2778 | |
16886 | ! %l2 = 000000000000001f, Mem[0000000010081400] = e9706042 | |
16887 | stwa %l2,[%i2+%g0]0x88 ! Mem[0000000010081400] = 0000001f | |
16888 | ! %l6 = 000003ff, %l7 = 00000034, Mem[0000000010041408] = ff6115a2 6e092edc | |
16889 | std %l6,[%i1+%o4] ! Mem[0000000010041408] = 000003ff 00000034 | |
16890 | ! Starting 10 instruction Load Burst | |
16891 | membar #Sync ! Added by membar checker (69) | |
16892 | ! Mem[0000000030081410] = 7600000000000000, %f26 = 426070e9 fc734517 | |
16893 | ldda [%i2+%o5]0x89,%f26 ! %f26 = 76000000 00000000 | |
16894 | ||
16895 | p0_label_403: | |
16896 | ! Mem[0000000010181400] = 00000334, %l5 = 0000000000000000 | |
16897 | lduwa [%i6+%g0]0x88,%l5 ! %l5 = 0000000000000334 | |
16898 | ! Mem[0000000010041410] = 000000ff, %l0 = 0000000000000000 | |
16899 | ldsba [%i1+%o5]0x88,%l0 ! %l0 = ffffffffffffffff | |
16900 | ! Mem[0000000010081410] = 7600000000000000, %f24 = 1fd2c976 2164489c | |
16901 | ldda [%i2+%o5]0x88,%f24 ! %f24 = 76000000 00000000 | |
16902 | ! Mem[0000000010141400] = ffff0000 000000d4 000000c6 00000000 | |
16903 | ! Mem[0000000010141410] = ffffffff 00000000 00000012 ffffffff | |
16904 | ! Mem[0000000010141420] = 000000ff c7ec13bb 000000ff 4e00ffff | |
16905 | ! Mem[0000000010141430] = 7a0000ff 000000ff 00000000 00ff0000 | |
16906 | ldda [%i5]ASI_BLK_AIUPL,%f0 ! Block Load from 0000000010141400 | |
16907 | ! Mem[0000000010001400] = 00ffffff, %l3 = 000000003eda2778 | |
16908 | lduba [%i0+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
16909 | ! Mem[0000000030001410] = 000000ff000000ff, %l7 = 0000000000000034 | |
16910 | ldxa [%i0+%o5]0x81,%l7 ! %l7 = 000000ff000000ff | |
16911 | ! Mem[0000000030041408] = 00000000, %l2 = 000000000000001f | |
16912 | ldswa [%i1+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
16913 | ! Mem[0000000010181410] = 00c4c676, %l2 = 0000000000000000 | |
16914 | ldswa [%i6+%o5]0x80,%l2 ! %l2 = 0000000000c4c676 | |
16915 | ! Mem[0000000030081410] = 00000000, %l4 = 0000000000000000 | |
16916 | ldsba [%i2+%o5]0x81,%l4 ! %l4 = 0000000000000000 | |
16917 | ! Starting 10 instruction Store Burst | |
16918 | ! %f24 = 76000000, Mem[0000000010081424] = 2164159c | |
16919 | st %f24,[%i2+0x024] ! Mem[0000000010081424] = 76000000 | |
16920 | ||
16921 | p0_label_404: | |
16922 | ! %f26 = 76000000 00000000, %l0 = ffffffffffffffff | |
16923 | ! Mem[0000000010101418] = 00000012000000ff | |
16924 | add %i4,0x018,%g1 | |
16925 | stda %f26,[%g1+%l0]ASI_PST8_P ! Mem[0000000010101418] = 7600000000000000 | |
16926 | ! %l6 = 00000000000003ff, Mem[0000000010001400] = ffffff00 | |
16927 | stha %l6,[%i0+%g0]0x88 ! Mem[0000000010001400] = ffff03ff | |
16928 | ! %l7 = 000000ff000000ff, Mem[00000000300c1400] = ff000000ff000000 | |
16929 | stxa %l7,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 000000ff000000ff | |
16930 | ! %l5 = 0000000000000334, Mem[0000000010181408] = ff00000000ffffff | |
16931 | stxa %l5,[%i6+%o4]0x80 ! Mem[0000000010181408] = 0000000000000334 | |
16932 | ! Mem[0000000010101410] = 000000ff, %l5 = 0000000000000334 | |
16933 | ldstuba [%i4+%o5]0x88,%l5 ! %l5 = 000000ff000000ff | |
16934 | ! %l2 = 0000000000c4c676, Mem[0000000010001410] = ff000000 | |
16935 | stwa %l2,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00c4c676 | |
16936 | ! %l1 = 00000000000000ff, Mem[00000000300c1400] = 000000ff000000ff | |
16937 | stxa %l1,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00000000000000ff | |
16938 | ! %f28 = 57793d9d 00000000, %l1 = 00000000000000ff | |
16939 | ! Mem[0000000010101408] = ff00000000ffffff | |
16940 | add %i4,0x008,%g1 | |
16941 | stda %f28,[%g1+%l1]ASI_PST16_P ! Mem[0000000010101408] = 57793d9d00000000 | |
16942 | ! %f26 = 76000000, Mem[0000000010181420] = 7a0000ff | |
16943 | st %f26,[%i6+0x020] ! Mem[0000000010181420] = 76000000 | |
16944 | ! Starting 10 instruction Load Burst | |
16945 | ! Mem[0000000010001418] = 000000ff, %f20 = 00000000 | |
16946 | ld [%i0+0x018],%f20 ! %f20 = 000000ff | |
16947 | ||
16948 | p0_label_405: | |
16949 | ! Mem[00000000300c1408] = 00000000, %l6 = 00000000000003ff | |
16950 | lduwa [%i3+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
16951 | ! Mem[0000000010041404] = 00000000, %l2 = 0000000000c4c676 | |
16952 | ldsb [%i1+0x006],%l2 ! %l2 = 0000000000000000 | |
16953 | ! Mem[00000000100c1408] = 0000000000000000, %l1 = 00000000000000ff | |
16954 | ldxa [%i3+%o4]0x88,%l1 ! %l1 = 0000000000000000 | |
16955 | ! Mem[0000000010081400] = 1f000000, %l2 = 0000000000000000 | |
16956 | ldsha [%i2+%g0]0x80,%l2 ! %l2 = 0000000000001f00 | |
16957 | ! Mem[0000000030041410] = 000000ff, %l6 = 0000000000000000 | |
16958 | lduwa [%i1+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
16959 | ! Mem[0000000030001408] = 00000000, %l6 = 00000000000000ff | |
16960 | lduwa [%i0+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
16961 | ! Mem[00000000300c1410] = ff000000, %l5 = 00000000000000ff | |
16962 | ldsba [%i3+%o5]0x81,%l5 ! %l5 = ffffffffffffffff | |
16963 | ! Mem[0000000010141400] = d40000000000ffff, %f22 = 00000000 00000076 | |
16964 | ldda [%i5+%g0]0x88,%f22 ! %f22 = d4000000 0000ffff | |
16965 | ! Mem[0000000030101408] = 0000cb00, %l6 = 0000000000000000 | |
16966 | lduba [%i4+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
16967 | ! Starting 10 instruction Store Burst | |
16968 | ! Mem[00000000300c1408] = 00000000, %l1 = 0000000000000000 | |
16969 | ldstuba [%i3+%o4]0x89,%l1 ! %l1 = 00000000000000ff | |
16970 | ||
16971 | ! Check Point 81 for processor 0 | |
16972 | ||
16973 | set p0_check_pt_data_81,%g4 | |
16974 | rd %ccr,%g5 ! %g5 = 44 | |
16975 | ldx [%g4+0x08],%g2 | |
16976 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
16977 | bne %xcc,p0_reg_check_fail0 | |
16978 | mov 0xee0,%g1 | |
16979 | ldx [%g4+0x10],%g2 | |
16980 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
16981 | bne %xcc,p0_reg_check_fail1 | |
16982 | mov 0xee1,%g1 | |
16983 | ldx [%g4+0x18],%g2 | |
16984 | cmp %l2,%g2 ! %l2 = 0000000000001f00 | |
16985 | bne %xcc,p0_reg_check_fail2 | |
16986 | mov 0xee2,%g1 | |
16987 | ldx [%g4+0x20],%g2 | |
16988 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
16989 | bne %xcc,p0_reg_check_fail3 | |
16990 | mov 0xee3,%g1 | |
16991 | ldx [%g4+0x28],%g2 | |
16992 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
16993 | bne %xcc,p0_reg_check_fail4 | |
16994 | mov 0xee4,%g1 | |
16995 | ldx [%g4+0x30],%g2 | |
16996 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
16997 | bne %xcc,p0_reg_check_fail5 | |
16998 | mov 0xee5,%g1 | |
16999 | ldx [%g4+0x38],%g2 | |
17000 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
17001 | bne %xcc,p0_reg_check_fail6 | |
17002 | mov 0xee6,%g1 | |
17003 | ldx [%g4+0x40],%g2 | |
17004 | cmp %l7,%g2 ! %l7 = 000000ff000000ff | |
17005 | bne %xcc,p0_reg_check_fail7 | |
17006 | mov 0xee7,%g1 | |
17007 | ldx [%g4+0x48],%g3 | |
17008 | std %f0,[%g4] | |
17009 | ldx [%g4],%g2 | |
17010 | cmp %g3,%g2 ! %f0 = d4000000 0000ffff | |
17011 | bne %xcc,p0_freg_check_fail | |
17012 | mov 0xf00,%g1 | |
17013 | ldx [%g4+0x50],%g3 | |
17014 | std %f2,[%g4] | |
17015 | ldx [%g4],%g2 | |
17016 | cmp %g3,%g2 ! %f2 = 00000000 c6000000 | |
17017 | bne %xcc,p0_freg_check_fail | |
17018 | mov 0xf02,%g1 | |
17019 | ldx [%g4+0x58],%g3 | |
17020 | std %f4,[%g4] | |
17021 | ldx [%g4],%g2 | |
17022 | cmp %g3,%g2 ! %f4 = 00000000 ffffffff | |
17023 | bne %xcc,p0_freg_check_fail | |
17024 | mov 0xf04,%g1 | |
17025 | ldx [%g4+0x60],%g3 | |
17026 | std %f6,[%g4] | |
17027 | ldx [%g4],%g2 | |
17028 | cmp %g3,%g2 ! %f6 = ffffffff 12000000 | |
17029 | bne %xcc,p0_freg_check_fail | |
17030 | mov 0xf06,%g1 | |
17031 | ldx [%g4+0x68],%g3 | |
17032 | std %f8,[%g4] | |
17033 | ldx [%g4],%g2 | |
17034 | cmp %g3,%g2 ! %f8 = bb13ecc7 ff000000 | |
17035 | bne %xcc,p0_freg_check_fail | |
17036 | mov 0xf08,%g1 | |
17037 | ldx [%g4+0x70],%g3 | |
17038 | std %f10,[%g4] | |
17039 | ldx [%g4],%g2 | |
17040 | cmp %g3,%g2 ! %f10 = ffff004e ff000000 | |
17041 | bne %xcc,p0_freg_check_fail | |
17042 | mov 0xf10,%g1 | |
17043 | ldx [%g4+0x78],%g3 | |
17044 | std %f12,[%g4] | |
17045 | ldx [%g4],%g2 | |
17046 | cmp %g3,%g2 ! %f12 = ff000000 ff00007a | |
17047 | bne %xcc,p0_freg_check_fail | |
17048 | mov 0xf12,%g1 | |
17049 | ldx [%g4+0x80],%g3 | |
17050 | std %f14,[%g4] | |
17051 | ldx [%g4],%g2 | |
17052 | cmp %g3,%g2 ! %f14 = 0000ff00 00000000 | |
17053 | bne %xcc,p0_freg_check_fail | |
17054 | mov 0xf14,%g1 | |
17055 | ldx [%g4+0x88],%g3 | |
17056 | std %f18,[%g4] | |
17057 | ldx [%g4],%g2 | |
17058 | cmp %g3,%g2 ! %f18 = 00000000 6e092edc | |
17059 | bne %xcc,p0_freg_check_fail | |
17060 | mov 0xf18,%g1 | |
17061 | ldx [%g4+0x90],%g3 | |
17062 | std %f20,[%g4] | |
17063 | ldx [%g4],%g2 | |
17064 | cmp %g3,%g2 ! %f20 = 000000ff 00000076 | |
17065 | bne %xcc,p0_freg_check_fail | |
17066 | mov 0xf20,%g1 | |
17067 | ldx [%g4+0x98],%g3 | |
17068 | std %f22,[%g4] | |
17069 | ldx [%g4],%g2 | |
17070 | cmp %g3,%g2 ! %f22 = d4000000 0000ffff | |
17071 | bne %xcc,p0_freg_check_fail | |
17072 | mov 0xf22,%g1 | |
17073 | ldx [%g4+0xa0],%g3 | |
17074 | std %f24,[%g4] | |
17075 | ldx [%g4],%g2 | |
17076 | cmp %g3,%g2 ! %f24 = 76000000 00000000 | |
17077 | bne %xcc,p0_freg_check_fail | |
17078 | mov 0xf24,%g1 | |
17079 | ldx [%g4+0xa8],%g3 | |
17080 | std %f26,[%g4] | |
17081 | ldx [%g4],%g2 | |
17082 | cmp %g3,%g2 ! %f26 = 76000000 00000000 | |
17083 | bne %xcc,p0_freg_check_fail | |
17084 | mov 0xf26,%g1 | |
17085 | ||
17086 | ! Check Point 81 completed | |
17087 | ||
17088 | ||
17089 | p0_label_406: | |
17090 | membar #Sync ! Added by membar checker (70) | |
17091 | ! %f27 = 00000000, Mem[0000000010141410] = ffffffff | |
17092 | sta %f27,[%i5+%o5]0x88 ! Mem[0000000010141410] = 00000000 | |
17093 | ! %l5 = ffffffffffffffff, Mem[0000000030181410] = ff000000216415ff | |
17094 | stxa %l5,[%i6+%o5]0x89 ! Mem[0000000030181410] = ffffffffffffffff | |
17095 | ! Mem[0000000030041400] = ff000000, %l2 = 0000000000001f00 | |
17096 | swapa [%i1+%g0]0x81,%l2 ! %l2 = 00000000ff000000 | |
17097 | ! %l0 = ffffffffffffffff, imm = 0000000000000399, %l2 = 00000000ff000000 | |
17098 | orn %l0,0x399,%l2 ! %l2 = ffffffffffffffff | |
17099 | ! %l6 = 0000000000000000, Mem[0000000010081418] = 00000012, %asi = 80 | |
17100 | stwa %l6,[%i2+0x018]%asi ! Mem[0000000010081418] = 00000000 | |
17101 | ! %l0 = ffffffffffffffff, Mem[0000000030141410] = 000000ff | |
17102 | stha %l0,[%i5+%o5]0x89 ! Mem[0000000030141410] = 0000ffff | |
17103 | ! Mem[000000001018142a] = ff000000, %l3 = 0000000000000000 | |
17104 | ldstub [%i6+0x02a],%l3 ! %l3 = 00000000000000ff | |
17105 | ! %l0 = ffffffff, %l1 = 00000000, Mem[0000000030141408] = a2150334 7990ffff | |
17106 | stda %l0,[%i5+%o4]0x89 ! Mem[0000000030141408] = ffffffff 00000000 | |
17107 | ! Mem[0000000021800140] = 00c61df6, %l4 = 0000000000000000 | |
17108 | ldstuba [%o3+0x140]%asi,%l4 ! %l4 = 00000000000000ff | |
17109 | ! Starting 10 instruction Load Burst | |
17110 | ! Mem[0000000010181410] = 76c6c400, %f17 = 00000000 | |
17111 | lda [%i6+%o5]0x88,%f17 ! %f17 = 76c6c400 | |
17112 | ||
17113 | p0_label_407: | |
17114 | ! Mem[0000000030041408] = 00000000, %l7 = 000000ff000000ff | |
17115 | lduba [%i1+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
17116 | ! Mem[0000000030001400] = c6006421, %f2 = 00000000 | |
17117 | lda [%i0+%g0]0x81,%f2 ! %f2 = c6006421 | |
17118 | ! Mem[0000000030181400] = 00ff0000, %l4 = 0000000000000000 | |
17119 | ldsha [%i6+%g0]0x81,%l4 ! %l4 = 00000000000000ff | |
17120 | ! Mem[00000000100c1438] = 5dffffe0 3d61d89c, %l2 = ffffffff, %l3 = 00000000 | |
17121 | ldd [%i3+0x038],%l2 ! %l2 = 000000005dffffe0 000000003d61d89c | |
17122 | ! Mem[00000000201c0000] = ffff9457, %l1 = 0000000000000000 | |
17123 | lduh [%o0+%g0],%l1 ! %l1 = 000000000000ffff | |
17124 | ! Mem[0000000010081410] = 0000000000000076, %l6 = 0000000000000000 | |
17125 | ldxa [%i2+%o5]0x80,%l6 ! %l6 = 0000000000000076 | |
17126 | ! Mem[0000000010081410] = 00000000, %l6 = 0000000000000076 | |
17127 | ldsba [%i2+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
17128 | ! Mem[0000000030001408] = 00000000, %l3 = 000000003d61d89c | |
17129 | lduha [%i0+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
17130 | ! Mem[000000001014143c] = 00ff0000, %l5 = ffffffffffffffff | |
17131 | ldsw [%i5+0x03c],%l5 ! %l5 = 0000000000ff0000 | |
17132 | ! Starting 10 instruction Store Burst | |
17133 | ! %l4 = 00000000000000ff, Mem[0000000010181408] = 00000000 | |
17134 | stha %l4,[%i6+%o4]0x80 ! Mem[0000000010181408] = 00ff0000 | |
17135 | ||
17136 | p0_label_408: | |
17137 | ! %l4 = 00000000000000ff, Mem[0000000021800000] = 008f13a3 | |
17138 | stb %l4,[%o3+%g0] ! Mem[0000000021800000] = ff8f13a3 | |
17139 | ! %l4 = 00000000000000ff, Mem[0000000010001428] = 0000000000000000, %asi = 80 | |
17140 | stxa %l4,[%i0+0x028]%asi ! Mem[0000000010001428] = 00000000000000ff | |
17141 | ! Mem[0000000010181424] = ff000000, %l7 = 0000000000000000, %asi = 80 | |
17142 | swapa [%i6+0x024]%asi,%l7 ! %l7 = 00000000ff000000 | |
17143 | ! Mem[0000000030101400] = 159c03ff, %l3 = 0000000000000000 | |
17144 | swapa [%i4+%g0]0x89,%l3 ! %l3 = 00000000159c03ff | |
17145 | ! Mem[00000000100c1410] = 000000ff, %l5 = 0000000000ff0000 | |
17146 | swapa [%i3+%o5]0x80,%l5 ! %l5 = 00000000000000ff | |
17147 | ! Mem[0000000010001438] = 0000ffff, %l2 = 000000005dffffe0 | |
17148 | ldstub [%i0+0x038],%l2 ! %l2 = 00000000000000ff | |
17149 | ! %l2 = 00000000, %l3 = 159c03ff, Mem[0000000010181408] = 00ff0000 00000334 | |
17150 | stda %l2,[%i6+%o4]0x80 ! Mem[0000000010181408] = 00000000 159c03ff | |
17151 | ! Mem[0000000010041408] = ff030000, %l4 = 00000000000000ff | |
17152 | swapa [%i1+%o4]0x88,%l4 ! %l4 = 00000000ff030000 | |
17153 | ! %l4 = 00000000ff030000, Mem[0000000010181416] = 665ef8ff, %asi = 80 | |
17154 | stba %l4,[%i6+0x016]%asi ! Mem[0000000010181414] = 665e00ff | |
17155 | ! Starting 10 instruction Load Burst | |
17156 | ! Mem[00000000211c0000] = 00ff1a4c, %l3 = 00000000159c03ff | |
17157 | lduh [%o2+%g0],%l3 ! %l3 = 00000000000000ff | |
17158 | ||
17159 | p0_label_409: | |
17160 | ! Mem[0000000010001400] = ff03ffffff000000, %f8 = bb13ecc7 ff000000 | |
17161 | ldda [%i0+%g0]0x80,%f8 ! %f8 = ff03ffff ff000000 | |
17162 | ! Mem[0000000030081408] = ffc4c676 00000000, %l4 = ff030000, %l5 = 000000ff | |
17163 | ldda [%i2+%o4]0x81,%l4 ! %l4 = 00000000ffc4c676 0000000000000000 | |
17164 | ! Mem[0000000020800000] = ff008470, %l6 = 0000000000000000 | |
17165 | ldub [%o1+0x001],%l6 ! %l6 = 0000000000000000 | |
17166 | ! Mem[0000000030181400] = 00ff000000000000, %l5 = 0000000000000000 | |
17167 | ldxa [%i6+%g0]0x81,%l5 ! %l5 = 00ff000000000000 | |
17168 | ! Mem[0000000030181410] = ffffffff, %l0 = ffffffffffffffff | |
17169 | lduha [%i6+%o5]0x89,%l0 ! %l0 = 000000000000ffff | |
17170 | ! %l6 = 0000000000000000, imm = 0000000000000821, %l7 = 00000000ff000000 | |
17171 | add %l6,0x821,%l7 ! %l7 = 0000000000000821 | |
17172 | ! Mem[00000000218001c0] = 12f32a00, %l7 = 0000000000000821 | |
17173 | ldsha [%o3+0x1c0]%asi,%l7 ! %l7 = 00000000000012f3 | |
17174 | ! Mem[00000000211c0000] = 00ff1a4c, %l6 = 0000000000000000 | |
17175 | ldub [%o2+%g0],%l6 ! %l6 = 0000000000000000 | |
17176 | ! Mem[00000000100c1410] = 00ff0000000000ff, %f16 = 00000000 76c6c400 | |
17177 | ldda [%i3+%o5]0x80,%f16 ! %f16 = 00ff0000 000000ff | |
17178 | ! Starting 10 instruction Store Burst | |
17179 | ! %l4 = ffc4c676, %l5 = 00000000, Mem[0000000010041410] = 000000ff 000000ff | |
17180 | stda %l4,[%i1+%o5]0x88 ! Mem[0000000010041410] = ffc4c676 00000000 | |
17181 | ||
17182 | p0_label_410: | |
17183 | ! %f23 = 0000ffff, Mem[0000000010081410] = 00000000 | |
17184 | sta %f23,[%i2+%o5]0x88 ! Mem[0000000010081410] = 0000ffff | |
17185 | ! %f0 = d4000000 0000ffff c6006421 c6000000 | |
17186 | ! %f4 = 00000000 ffffffff ffffffff 12000000 | |
17187 | ! %f8 = ff03ffff ff000000 ffff004e ff000000 | |
17188 | ! %f12 = ff000000 ff00007a 0000ff00 00000000 | |
17189 | stda %f0,[%i1]ASI_BLK_AIUPL ! Block Store to 0000000010041400 | |
17190 | ! %f30 = 00000000 c238965e, %l6 = 0000000000000000 | |
17191 | ! Mem[0000000030101430] = 904900009d3d7957 | |
17192 | add %i4,0x030,%g1 | |
17193 | stda %f30,[%g1+%l6]ASI_PST8_S ! Mem[0000000030101430] = 904900009d3d7957 | |
17194 | ! %f28 = 57793d9d, Mem[000000001004143c] = 00ff0000 | |
17195 | sta %f28,[%i1+0x03c]%asi ! Mem[000000001004143c] = 57793d9d | |
17196 | ! Mem[0000000010081420] = 1f41ff7676000000, %l3 = 00000000000000ff, %l5 = 00ff000000000000 | |
17197 | add %i2,0x20,%g1 | |
17198 | casxa [%g1]0x80,%l3,%l5 ! %l5 = 1f41ff7676000000 | |
17199 | ! %l4 = 00000000ffc4c676, Mem[0000000030181400] = 00ff0000 | |
17200 | stba %l4,[%i6+%g0]0x81 ! Mem[0000000030181400] = 76ff0000 | |
17201 | ! %l0 = 0000ffff, %l1 = 0000ffff, Mem[0000000010041400] = ffff0000 000000d4 | |
17202 | stda %l0,[%i1+0x000]%asi ! Mem[0000000010041400] = 0000ffff 0000ffff | |
17203 | ! Mem[0000000030081400] = 000000ff, %l5 = 1f41ff7676000000 | |
17204 | ldstuba [%i2+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
17205 | ! Mem[0000000030081410] = 00000000, %l6 = 0000000000000000 | |
17206 | swapa [%i2+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
17207 | ! Starting 10 instruction Load Burst | |
17208 | ! Mem[0000000010181410] = 76c6c400, %l3 = 00000000000000ff | |
17209 | ldswa [%i6+%o5]0x88,%l3 ! %l3 = 0000000076c6c400 | |
17210 | ||
17211 | ! Check Point 82 for processor 0 | |
17212 | ||
17213 | set p0_check_pt_data_82,%g4 | |
17214 | rd %ccr,%g5 ! %g5 = 44 | |
17215 | ldx [%g4+0x08],%g2 | |
17216 | cmp %l0,%g2 ! %l0 = 000000000000ffff | |
17217 | bne %xcc,p0_reg_check_fail0 | |
17218 | mov 0xee0,%g1 | |
17219 | ldx [%g4+0x10],%g2 | |
17220 | cmp %l1,%g2 ! %l1 = 000000000000ffff | |
17221 | bne %xcc,p0_reg_check_fail1 | |
17222 | mov 0xee1,%g1 | |
17223 | ldx [%g4+0x18],%g2 | |
17224 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
17225 | bne %xcc,p0_reg_check_fail2 | |
17226 | mov 0xee2,%g1 | |
17227 | ldx [%g4+0x20],%g2 | |
17228 | cmp %l3,%g2 ! %l3 = 0000000076c6c400 | |
17229 | bne %xcc,p0_reg_check_fail3 | |
17230 | mov 0xee3,%g1 | |
17231 | ldx [%g4+0x28],%g2 | |
17232 | cmp %l4,%g2 ! %l4 = 00000000ffc4c676 | |
17233 | bne %xcc,p0_reg_check_fail4 | |
17234 | mov 0xee4,%g1 | |
17235 | ldx [%g4+0x30],%g2 | |
17236 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
17237 | bne %xcc,p0_reg_check_fail5 | |
17238 | mov 0xee5,%g1 | |
17239 | ldx [%g4+0x38],%g2 | |
17240 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
17241 | bne %xcc,p0_reg_check_fail6 | |
17242 | mov 0xee6,%g1 | |
17243 | ldx [%g4+0x40],%g2 | |
17244 | cmp %l7,%g2 ! %l7 = 00000000000012f3 | |
17245 | bne %xcc,p0_reg_check_fail7 | |
17246 | mov 0xee7,%g1 | |
17247 | ldx [%g4+0x48],%g3 | |
17248 | std %f2,[%g4] | |
17249 | ldx [%g4],%g2 | |
17250 | cmp %g3,%g2 ! %f2 = c6006421 c6000000 | |
17251 | bne %xcc,p0_freg_check_fail | |
17252 | mov 0xf02,%g1 | |
17253 | ldx [%g4+0x50],%g3 | |
17254 | std %f4,[%g4] | |
17255 | ldx [%g4],%g2 | |
17256 | cmp %g3,%g2 ! %f4 = 00000000 ffffffff | |
17257 | bne %xcc,p0_freg_check_fail | |
17258 | mov 0xf04,%g1 | |
17259 | ldx [%g4+0x58],%g3 | |
17260 | std %f8,[%g4] | |
17261 | ldx [%g4],%g2 | |
17262 | cmp %g3,%g2 ! %f8 = ff03ffff ff000000 | |
17263 | bne %xcc,p0_freg_check_fail | |
17264 | mov 0xf08,%g1 | |
17265 | ldx [%g4+0x60],%g3 | |
17266 | std %f16,[%g4] | |
17267 | ldx [%g4],%g2 | |
17268 | cmp %g3,%g2 ! %f16 = 00ff0000 000000ff | |
17269 | bne %xcc,p0_freg_check_fail | |
17270 | mov 0xf16,%g1 | |
17271 | ||
17272 | ! Check Point 82 completed | |
17273 | ||
17274 | ||
17275 | p0_label_411: | |
17276 | ! Mem[0000000030101408] = 00cb0000, %l3 = 0000000076c6c400 | |
17277 | lduwa [%i4+%o4]0x81,%l3 ! %l3 = 0000000000cb0000 | |
17278 | ! Mem[0000000010001408] = 000023e3, %l2 = 0000000000000000 | |
17279 | lduha [%i0+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
17280 | ! Mem[0000000030181410] = ffffffffffffffff, %l1 = 000000000000ffff | |
17281 | ldxa [%i6+%o5]0x81,%l1 ! %l1 = ffffffffffffffff | |
17282 | ! Mem[0000000010101410] = ff000000, %l7 = 00000000000012f3 | |
17283 | ldsha [%i4+%o5]0x80,%l7 ! %l7 = ffffffffffffff00 | |
17284 | ! Mem[0000000010101408] = 57793d9d 00000000, %l2 = 00000000, %l3 = 00cb0000 | |
17285 | ldda [%i4+%o4]0x80,%l2 ! %l2 = 0000000057793d9d 0000000000000000 | |
17286 | membar #Sync ! Added by membar checker (71) | |
17287 | ! Mem[0000000010041400] = 0000ffff, %f2 = c6006421 | |
17288 | lda [%i1+%g0]0x80,%f2 ! %f2 = 0000ffff | |
17289 | ! Mem[0000000030181408] = 1f41ff76000000ff, %f24 = 76000000 00000000 | |
17290 | ldda [%i6+%o4]0x81,%f24 ! %f24 = 1f41ff76 000000ff | |
17291 | ! Mem[0000000010001408] = 000023e300009c15, %f16 = 00ff0000 000000ff | |
17292 | ldda [%i0+%o4]0x80,%f16 ! %f16 = 000023e3 00009c15 | |
17293 | ! Mem[0000000010181428] = ff00ff00, %l0 = 000000000000ffff | |
17294 | ldsba [%i6+0x029]%asi,%l0 ! %l0 = 0000000000000000 | |
17295 | ! Starting 10 instruction Store Burst | |
17296 | ! %l1 = ffffffffffffffff, Mem[00000000300c1400] = 00000000 | |
17297 | stha %l1,[%i3+%g0]0x81 ! Mem[00000000300c1400] = ffff0000 | |
17298 | ||
17299 | p0_label_412: | |
17300 | ! %f16 = 000023e3 00009c15 00000000 6e092edc | |
17301 | ! %f20 = 000000ff 00000076 d4000000 0000ffff | |
17302 | ! %f24 = 1f41ff76 000000ff 76000000 00000000 | |
17303 | ! %f28 = 57793d9d 00000000 00000000 c238965e | |
17304 | stda %f16,[%i1]ASI_BLK_P ! Block Store to 0000000010041400 | |
17305 | ! Mem[0000000010181400] = 00000334, %l3 = 0000000000000000 | |
17306 | ldstuba [%i6+%g0]0x88,%l3 ! %l3 = 00000034000000ff | |
17307 | ! %f6 = ffffffff 12000000, %l7 = ffffffffffffff00 | |
17308 | ! Mem[0000000010001428] = 00000000000000ff | |
17309 | add %i0,0x028,%g1 | |
17310 | stda %f6,[%g1+%l7]ASI_PST16_P ! Mem[0000000010001428] = 00000000000000ff | |
17311 | ! %f10 = ffff004e ff000000, Mem[0000000010141410] = 00000000 00000000 | |
17312 | stda %f10,[%i5+%o5]0x88 ! Mem[0000000010141410] = ffff004e ff000000 | |
17313 | ! %l1 = ffffffffffffffff, Mem[0000000010101408] = 57793d9d | |
17314 | stba %l1,[%i4+%o4]0x80 ! Mem[0000000010101408] = ff793d9d | |
17315 | ! %l3 = 0000000000000034, Mem[0000000010001400] = ff03ffff | |
17316 | stba %l3,[%i0+%g0]0x80 ! Mem[0000000010001400] = 3403ffff | |
17317 | ! %l4 = ffc4c676, %l5 = 00000000, Mem[0000000010181408] = 00000000 159c03ff | |
17318 | stda %l4,[%i6+%o4]0x80 ! Mem[0000000010181408] = ffc4c676 00000000 | |
17319 | ! %f4 = 00000000, Mem[0000000030101410] = 340315a2 | |
17320 | sta %f4 ,[%i4+%o5]0x89 ! Mem[0000000030101410] = 00000000 | |
17321 | ! %l3 = 0000000000000034, Mem[000000001010143c] = 000000ff | |
17322 | sth %l3,[%i4+0x03c] ! Mem[000000001010143c] = 003400ff | |
17323 | ! Starting 10 instruction Load Burst | |
17324 | ! Mem[0000000030141410] = ffff0000 a2150334, %l4 = ffc4c676, %l5 = 00000000 | |
17325 | ldda [%i5+%o5]0x81,%l4 ! %l4 = 00000000ffff0000 00000000a2150334 | |
17326 | ||
17327 | p0_label_413: | |
17328 | ! Mem[0000000030141410] = 0000ffff, %l3 = 0000000000000034 | |
17329 | lduwa [%i5+%o5]0x89,%l3 ! %l3 = 000000000000ffff | |
17330 | ! Mem[0000000030101410] = 00000000, %l6 = 0000000000000000 | |
17331 | ldsha [%i4+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
17332 | ! Mem[0000000010181404] = ffc4ffff, %l3 = 000000000000ffff | |
17333 | lduha [%i6+0x006]%asi,%l3 ! %l3 = 000000000000ffff | |
17334 | ! Mem[00000000300c1410] = 000000ff, %l7 = ffffffffffffff00 | |
17335 | lduwa [%i3+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
17336 | ! Mem[0000000010141404] = 000000d4, %l5 = 00000000a2150334 | |
17337 | ldsba [%i5+0x006]%asi,%l5 ! %l5 = 0000000000000000 | |
17338 | ! Mem[0000000010081410] = 76000000 0000ffff, %l0 = 00000000, %l1 = ffffffff | |
17339 | ldda [%i2+%o5]0x88,%l0 ! %l0 = 000000000000ffff 0000000076000000 | |
17340 | ! Mem[0000000010181408] = 76c6c4ff, %l1 = 0000000076000000 | |
17341 | lduwa [%i6+%o4]0x88,%l1 ! %l1 = 0000000076c6c4ff | |
17342 | ! Mem[0000000010081408] = 00000000, %l4 = 00000000ffff0000 | |
17343 | lduba [%i2+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
17344 | ! %l3 = 000000000000ffff, Mem[0000000010141416] = 4e00ffff, %asi = 80 | |
17345 | stba %l3,[%i5+0x016]%asi ! Mem[0000000010141414] = 4e00ffff | |
17346 | ! Starting 10 instruction Store Burst | |
17347 | ! %f10 = ffff004e ff000000, %l7 = 00000000000000ff | |
17348 | ! Mem[0000000030181410] = ffffffffffffffff | |
17349 | add %i6,0x010,%g1 | |
17350 | stda %f10,[%g1+%l7]ASI_PST32_S ! Mem[0000000030181410] = ffff004eff000000 | |
17351 | ||
17352 | p0_label_414: | |
17353 | ! %l5 = 0000000000000000, Mem[000000001000142c] = 000000ff | |
17354 | stw %l5,[%i0+0x02c] ! Mem[000000001000142c] = 00000000 | |
17355 | ! Mem[0000000030081410] = 00000000, %l0 = 000000000000ffff | |
17356 | ldstuba [%i2+%o5]0x81,%l0 ! %l0 = 00000000000000ff | |
17357 | ! Mem[00000000100c1400] = ff00008f, %l7 = 00000000000000ff | |
17358 | swapa [%i3+%g0]0x80,%l7 ! %l7 = 00000000ff00008f | |
17359 | ! %l7 = 00000000ff00008f, Mem[0000000030181400] = 000000000000ff76 | |
17360 | stxa %l7,[%i6+%g0]0x89 ! Mem[0000000030181400] = 00000000ff00008f | |
17361 | ! %l0 = 0000000000000000, Mem[0000000030141400] = 0000000000000000 | |
17362 | stxa %l0,[%i5+%g0]0x89 ! Mem[0000000030141400] = 0000000000000000 | |
17363 | ! Mem[0000000030141400] = 00000000, %l7 = 00000000ff00008f | |
17364 | ldstuba [%i5+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
17365 | ! %l0 = 00000000, %l1 = 76c6c4ff, Mem[0000000030041400] = 00001f00 00ffffff | |
17366 | stda %l0,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00000000 76c6c4ff | |
17367 | ! %f14 = 0000ff00 00000000, Mem[00000000100c1400] = 000000ff fffffff8 | |
17368 | stda %f14,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 0000ff00 00000000 | |
17369 | ! %f6 = ffffffff 12000000, %l6 = 0000000000000000 | |
17370 | ! Mem[0000000010081410] = ffff000000000076 | |
17371 | add %i2,0x010,%g1 | |
17372 | stda %f6,[%g1+%l6]ASI_PST8_P ! Mem[0000000010081410] = ffff000000000076 | |
17373 | ! Starting 10 instruction Load Burst | |
17374 | ! Mem[00000000300c1400] = ff0000000000ffff, %l7 = 0000000000000000 | |
17375 | ldxa [%i3+%g0]0x89,%l7 ! %l7 = ff0000000000ffff | |
17376 | ||
17377 | p0_label_415: | |
17378 | ! Mem[0000000030101400] = 00000000, %l6 = 0000000000000000 | |
17379 | lduha [%i4+%g0]0x89,%l6 ! %l6 = 0000000000000000 | |
17380 | ! Mem[0000000010001400] = ffff0334, %l2 = 0000000057793d9d | |
17381 | ldsha [%i0+%g0]0x88,%l2 ! %l2 = 0000000000000334 | |
17382 | ! Mem[0000000020800000] = ff008470, %l6 = 0000000000000000 | |
17383 | ldub [%o1+0x001],%l6 ! %l6 = 0000000000000000 | |
17384 | ! Mem[0000000030101408] = 00cb0000 00b3e323, %l0 = 00000000, %l1 = 76c6c4ff | |
17385 | ldda [%i4+%o4]0x81,%l0 ! %l0 = 0000000000cb0000 0000000000b3e323 | |
17386 | ! Mem[0000000030081410] = ff000000, %l5 = 0000000000000000 | |
17387 | lduba [%i2+%o5]0x81,%l5 ! %l5 = 00000000000000ff | |
17388 | ! Mem[0000000030101410] = 00000000, %l5 = 00000000000000ff | |
17389 | lduba [%i4+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
17390 | ! Mem[00000000211c0000] = 00ff1a4c, %l6 = 0000000000000000 | |
17391 | lduh [%o2+%g0],%l6 ! %l6 = 00000000000000ff | |
17392 | ! Mem[0000000010001410] = 76c6c400, %l7 = ff0000000000ffff | |
17393 | ldsba [%i0+%o5]0x80,%l7 ! %l7 = 0000000000000076 | |
17394 | ! Mem[0000000030181400] = ff00008f, %l5 = 0000000000000000 | |
17395 | ldsha [%i6+%g0]0x89,%l5 ! %l5 = 000000000000008f | |
17396 | ! Starting 10 instruction Store Burst | |
17397 | membar #Sync ! Added by membar checker (72) | |
17398 | ! Mem[0000000010041400] = e3230000, %l5 = 000000000000008f | |
17399 | ldstuba [%i1+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
17400 | ||
17401 | ! Check Point 83 for processor 0 | |
17402 | ||
17403 | set p0_check_pt_data_83,%g4 | |
17404 | rd %ccr,%g5 ! %g5 = 44 | |
17405 | ldx [%g4+0x08],%g2 | |
17406 | cmp %l0,%g2 ! %l0 = 0000000000cb0000 | |
17407 | bne %xcc,p0_reg_check_fail0 | |
17408 | mov 0xee0,%g1 | |
17409 | ldx [%g4+0x10],%g2 | |
17410 | cmp %l1,%g2 ! %l1 = 0000000000b3e323 | |
17411 | bne %xcc,p0_reg_check_fail1 | |
17412 | mov 0xee1,%g1 | |
17413 | ldx [%g4+0x18],%g2 | |
17414 | cmp %l2,%g2 ! %l2 = 0000000000000334 | |
17415 | bne %xcc,p0_reg_check_fail2 | |
17416 | mov 0xee2,%g1 | |
17417 | ldx [%g4+0x20],%g2 | |
17418 | cmp %l3,%g2 ! %l3 = 000000000000ffff | |
17419 | bne %xcc,p0_reg_check_fail3 | |
17420 | mov 0xee3,%g1 | |
17421 | ldx [%g4+0x28],%g2 | |
17422 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
17423 | bne %xcc,p0_reg_check_fail4 | |
17424 | mov 0xee4,%g1 | |
17425 | ldx [%g4+0x30],%g2 | |
17426 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
17427 | bne %xcc,p0_reg_check_fail5 | |
17428 | mov 0xee5,%g1 | |
17429 | ldx [%g4+0x38],%g2 | |
17430 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
17431 | bne %xcc,p0_reg_check_fail6 | |
17432 | mov 0xee6,%g1 | |
17433 | ldx [%g4+0x40],%g2 | |
17434 | cmp %l7,%g2 ! %l7 = 0000000000000076 | |
17435 | bne %xcc,p0_reg_check_fail7 | |
17436 | mov 0xee7,%g1 | |
17437 | ldx [%g4+0x48],%g3 | |
17438 | std %f0,[%g4] | |
17439 | ldx [%g4],%g2 | |
17440 | cmp %g3,%g2 ! %f0 = d4000000 0000ffff | |
17441 | bne %xcc,p0_freg_check_fail | |
17442 | mov 0xf00,%g1 | |
17443 | ldx [%g4+0x50],%g3 | |
17444 | std %f2,[%g4] | |
17445 | ldx [%g4],%g2 | |
17446 | cmp %g3,%g2 ! %f2 = 0000ffff c6000000 | |
17447 | bne %xcc,p0_freg_check_fail | |
17448 | mov 0xf02,%g1 | |
17449 | ldx [%g4+0x58],%g3 | |
17450 | std %f4,[%g4] | |
17451 | ldx [%g4],%g2 | |
17452 | cmp %g3,%g2 ! %f4 = 00000000 ffffffff | |
17453 | bne %xcc,p0_freg_check_fail | |
17454 | mov 0xf04,%g1 | |
17455 | ldx [%g4+0x60],%g3 | |
17456 | std %f16,[%g4] | |
17457 | ldx [%g4],%g2 | |
17458 | cmp %g3,%g2 ! %f16 = 000023e3 00009c15 | |
17459 | bne %xcc,p0_freg_check_fail | |
17460 | mov 0xf16,%g1 | |
17461 | ldx [%g4+0x68],%g3 | |
17462 | std %f24,[%g4] | |
17463 | ldx [%g4],%g2 | |
17464 | cmp %g3,%g2 ! %f24 = 1f41ff76 000000ff | |
17465 | bne %xcc,p0_freg_check_fail | |
17466 | mov 0xf24,%g1 | |
17467 | ||
17468 | ! Check Point 83 completed | |
17469 | ||
17470 | ||
17471 | p0_label_416: | |
17472 | ! Mem[0000000010141400] = ffff0000, %l6 = 00000000000000ff | |
17473 | swap [%i5+%g0],%l6 ! %l6 = 00000000ffff0000 | |
17474 | ! %f12 = ff000000 ff00007a, Mem[0000000010081410] = ffff0000 00000076 | |
17475 | stda %f12,[%i2+%o5]0x80 ! Mem[0000000010081410] = ff000000 ff00007a | |
17476 | ! %l2 = 0000000000000334, Mem[0000000020800000] = ff008470, %asi = 80 | |
17477 | stha %l2,[%o1+0x000]%asi ! Mem[0000000020800000] = 03348470 | |
17478 | ! Mem[00000000100c1410] = 0000ff00, %l1 = 0000000000b3e323 | |
17479 | ldstuba [%i3+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
17480 | ! Mem[0000000030081408] = 76c6c4ff, %l7 = 0000000000000076 | |
17481 | swapa [%i2+%o4]0x89,%l7 ! %l7 = 0000000076c6c4ff | |
17482 | ! Mem[0000000010041408] = 00000000, %l5 = 0000000000000000 | |
17483 | swapa [%i1+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
17484 | ! Mem[0000000010001428] = 00000000, %l1 = 0000000000000000, %asi = 80 | |
17485 | swapa [%i0+0x028]%asi,%l1 ! %l1 = 0000000000000000 | |
17486 | ! %f5 = ffffffff, Mem[0000000030141400] = ff000000 | |
17487 | sta %f5 ,[%i5+%g0]0x81 ! Mem[0000000030141400] = ffffffff | |
17488 | ! %f12 = ff000000 ff00007a, Mem[0000000010001410] = 00c4c676 ff000000 | |
17489 | stda %f12,[%i0+%o5]0x88 ! Mem[0000000010001410] = ff000000 ff00007a | |
17490 | ! Starting 10 instruction Load Burst | |
17491 | ! Mem[0000000030041400] = 0000000076c6c4ff, %l0 = 0000000000cb0000 | |
17492 | ldxa [%i1+%g0]0x81,%l0 ! %l0 = 0000000076c6c4ff | |
17493 | ||
17494 | p0_label_417: | |
17495 | ! Mem[0000000010001410] = 7a0000ff, %l7 = 0000000076c6c4ff | |
17496 | lduwa [%i0+%o5]0x80,%l7 ! %l7 = 000000007a0000ff | |
17497 | ! Mem[0000000010141408] = 000000c6, %l5 = 0000000000000000 | |
17498 | ldsba [%i5+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
17499 | ! Mem[0000000010001434] = 00009c15, %f11 = ff000000 | |
17500 | lda [%i0+0x034]%asi,%f11 ! %f11 = 00009c15 | |
17501 | ! Mem[0000000030101400] = 00000000, %l2 = 0000000000000334 | |
17502 | ldsba [%i4+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
17503 | ! Mem[0000000010001400] = 3403ffff, %f16 = 000023e3 | |
17504 | lda [%i0+%g0]0x80,%f16 ! %f16 = 3403ffff | |
17505 | ! Mem[0000000010141410] = ff000000, %l6 = 00000000ffff0000 | |
17506 | lduba [%i5+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
17507 | ! Mem[0000000030081410] = ff000000 00000076, %l6 = 00000000, %l7 = 7a0000ff | |
17508 | ldda [%i2+%o5]0x81,%l6 ! %l6 = 00000000ff000000 0000000000000076 | |
17509 | ! Mem[00000000100c1408] = 00000000, %l3 = 000000000000ffff | |
17510 | ldsha [%i3+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
17511 | ! Mem[0000000030141400] = ffffffff, %l2 = 0000000000000000 | |
17512 | ldsba [%i5+%g0]0x89,%l2 ! %l2 = ffffffffffffffff | |
17513 | ! Starting 10 instruction Store Burst | |
17514 | ! %f26 = 76000000, Mem[0000000010081410] = ff000000 | |
17515 | sta %f26,[%i2+%o5]0x80 ! Mem[0000000010081410] = 76000000 | |
17516 | ||
17517 | p0_label_418: | |
17518 | ! %f18 = 00000000 6e092edc, Mem[0000000010001408] = e3230000 159c0000 | |
17519 | stda %f18,[%i0+%o4]0x88 ! Mem[0000000010001408] = 00000000 6e092edc | |
17520 | ! %l2 = ffffffffffffffff, Mem[0000000030001400] = c6006421 | |
17521 | stba %l2,[%i0+%g0]0x81 ! Mem[0000000030001400] = ff006421 | |
17522 | ! %l6 = 00000000ff000000, Mem[0000000010081410] = 00000076 | |
17523 | stwa %l6,[%i2+%o5]0x88 ! Mem[0000000010081410] = ff000000 | |
17524 | ! %l4 = 0000000000000000, Mem[0000000030081400] = ff0000ff | |
17525 | stwa %l4,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000000 | |
17526 | ! Mem[00000000211c0001] = 00ff1a4c, %l6 = 00000000ff000000 | |
17527 | ldstuba [%o2+0x001]%asi,%l6 ! %l6 = 000000ff000000ff | |
17528 | ! %l2 = ffffffffffffffff, Mem[0000000010181408] = 76c6c4ff | |
17529 | stba %l2,[%i6+%o4]0x88 ! Mem[0000000010181408] = 76c6c4ff | |
17530 | ! Mem[0000000010041408] = 00000000, %l5 = 0000000000000000 | |
17531 | swapa [%i1+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
17532 | ! %f12 = ff000000, Mem[0000000030001408] = 00000000 | |
17533 | sta %f12,[%i0+%o4]0x89 ! Mem[0000000030001408] = ff000000 | |
17534 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000010181410] = 00c4c676 665e00ff | |
17535 | stda %l4,[%i6+0x010]%asi ! Mem[0000000010181410] = 00000000 00000000 | |
17536 | ! Starting 10 instruction Load Burst | |
17537 | ! Mem[000000001018142c] = c238965e, %l3 = 0000000000000000 | |
17538 | ldub [%i6+0x02f],%l3 ! %l3 = 000000000000005e | |
17539 | ||
17540 | p0_label_419: | |
17541 | ! Mem[0000000010101400] = 00000000, %l1 = 0000000000000000 | |
17542 | ldswa [%i4+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
17543 | ! Mem[0000000030001410] = 000000ff, %l1 = 0000000000000000 | |
17544 | lduba [%i0+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
17545 | ! Mem[0000000010041410] = 000000ff, %l2 = ffffffffffffffff | |
17546 | lduba [%i1+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
17547 | ! Mem[0000000010101410] = ff000000, %l3 = 000000000000005e | |
17548 | ldsba [%i4+%o5]0x80,%l3 ! %l3 = ffffffffffffffff | |
17549 | ! Mem[0000000010181408] = ffc4c676, %l3 = ffffffffffffffff | |
17550 | ldub [%i6+0x009],%l3 ! %l3 = 00000000000000c4 | |
17551 | ! Mem[0000000030101410] = 7827da3e00000000, %f4 = 00000000 ffffffff | |
17552 | ldda [%i4+%o5]0x89,%f4 ! %f4 = 7827da3e 00000000 | |
17553 | ! Mem[0000000010141408] = 000000c600000000, %f18 = 00000000 6e092edc | |
17554 | ldda [%i5+%o4]0x80,%f18 ! %f18 = 000000c6 00000000 | |
17555 | ! Mem[0000000010081408] = 00000000, %l6 = 00000000000000ff | |
17556 | ldsba [%i2+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
17557 | ! Mem[0000000010041414] = 00000076, %l4 = 0000000000000000 | |
17558 | ldsw [%i1+0x014],%l4 ! %l4 = 0000000000000076 | |
17559 | ! Starting 10 instruction Store Burst | |
17560 | ! %l3 = 00000000000000c4, Mem[00000000100c1400] = 00ff0000 | |
17561 | stha %l3,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 00ff00c4 | |
17562 | ||
17563 | p0_label_420: | |
17564 | ! Mem[00000000300c1410] = 000000ff, %l4 = 0000000000000076 | |
17565 | swapa [%i3+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
17566 | ! %l2 = 0000000000000000, Mem[0000000010081410] = ff000000 | |
17567 | stwa %l2,[%i2+%o5]0x88 ! Mem[0000000010081410] = 00000000 | |
17568 | ! %f0 = d4000000, Mem[00000000300c1400] = 0000ffff | |
17569 | sta %f0 ,[%i3+%g0]0x89 ! Mem[00000000300c1400] = d4000000 | |
17570 | ! %f28 = 57793d9d, Mem[0000000010041408] = 00000000 | |
17571 | sta %f28,[%i1+%o4]0x88 ! Mem[0000000010041408] = 57793d9d | |
17572 | ! Mem[0000000030181408] = 1f41ff76, %l2 = 0000000000000000 | |
17573 | ldstuba [%i6+%o4]0x81,%l2 ! %l2 = 0000001f000000ff | |
17574 | ! %f18 = 000000c6 00000000, Mem[0000000010181410] = 00000000 00000000 | |
17575 | stda %f18,[%i6+%o5]0x88 ! Mem[0000000010181410] = 000000c6 00000000 | |
17576 | ! Mem[0000000030141408] = ffffffff, %l0 = 0000000076c6c4ff | |
17577 | ldstuba [%i5+%o4]0x81,%l0 ! %l0 = 000000ff000000ff | |
17578 | ! Mem[0000000010001400] = ffff0334, %l2 = 000000000000001f | |
17579 | ldstuba [%i0+%g0]0x88,%l2 ! %l2 = 00000034000000ff | |
17580 | ! %l7 = 0000000000000076, Mem[00000000100c1438] = 5dffffe03d61d89c | |
17581 | stx %l7,[%i3+0x038] ! Mem[00000000100c1438] = 0000000000000076 | |
17582 | ! Starting 10 instruction Load Burst | |
17583 | ! Mem[0000000010141408] = 000000c6, %f17 = 00009c15 | |
17584 | lda [%i5+%o4]0x80,%f17 ! %f17 = 000000c6 | |
17585 | ||
17586 | ! Check Point 84 for processor 0 | |
17587 | ||
17588 | set p0_check_pt_data_84,%g4 | |
17589 | rd %ccr,%g5 ! %g5 = 44 | |
17590 | ldx [%g4+0x08],%g2 | |
17591 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
17592 | bne %xcc,p0_reg_check_fail0 | |
17593 | mov 0xee0,%g1 | |
17594 | ldx [%g4+0x10],%g2 | |
17595 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
17596 | bne %xcc,p0_reg_check_fail1 | |
17597 | mov 0xee1,%g1 | |
17598 | ldx [%g4+0x18],%g2 | |
17599 | cmp %l2,%g2 ! %l2 = 0000000000000034 | |
17600 | bne %xcc,p0_reg_check_fail2 | |
17601 | mov 0xee2,%g1 | |
17602 | ldx [%g4+0x20],%g2 | |
17603 | cmp %l3,%g2 ! %l3 = 00000000000000c4 | |
17604 | bne %xcc,p0_reg_check_fail3 | |
17605 | mov 0xee3,%g1 | |
17606 | ldx [%g4+0x28],%g2 | |
17607 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
17608 | bne %xcc,p0_reg_check_fail4 | |
17609 | mov 0xee4,%g1 | |
17610 | ldx [%g4+0x30],%g2 | |
17611 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
17612 | bne %xcc,p0_reg_check_fail5 | |
17613 | mov 0xee5,%g1 | |
17614 | ldx [%g4+0x38],%g2 | |
17615 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
17616 | bne %xcc,p0_reg_check_fail6 | |
17617 | mov 0xee6,%g1 | |
17618 | ldx [%g4+0x40],%g2 | |
17619 | cmp %l7,%g2 ! %l7 = 0000000000000076 | |
17620 | bne %xcc,p0_reg_check_fail7 | |
17621 | mov 0xee7,%g1 | |
17622 | ldx [%g4+0x48],%g3 | |
17623 | std %f4,[%g4] | |
17624 | ldx [%g4],%g2 | |
17625 | cmp %g3,%g2 ! %f4 = 7827da3e 00000000 | |
17626 | bne %xcc,p0_freg_check_fail | |
17627 | mov 0xf04,%g1 | |
17628 | ldx [%g4+0x50],%g3 | |
17629 | std %f6,[%g4] | |
17630 | ldx [%g4],%g2 | |
17631 | cmp %g3,%g2 ! %f6 = ffffffff 12000000 | |
17632 | bne %xcc,p0_freg_check_fail | |
17633 | mov 0xf06,%g1 | |
17634 | ldx [%g4+0x58],%g3 | |
17635 | std %f10,[%g4] | |
17636 | ldx [%g4],%g2 | |
17637 | cmp %g3,%g2 ! %f10 = ffff004e 00009c15 | |
17638 | bne %xcc,p0_freg_check_fail | |
17639 | mov 0xf10,%g1 | |
17640 | ldx [%g4+0x60],%g3 | |
17641 | std %f16,[%g4] | |
17642 | ldx [%g4],%g2 | |
17643 | cmp %g3,%g2 ! %f16 = 3403ffff 000000c6 | |
17644 | bne %xcc,p0_freg_check_fail | |
17645 | mov 0xf16,%g1 | |
17646 | ldx [%g4+0x68],%g3 | |
17647 | std %f18,[%g4] | |
17648 | ldx [%g4],%g2 | |
17649 | cmp %g3,%g2 ! %f18 = 000000c6 00000000 | |
17650 | bne %xcc,p0_freg_check_fail | |
17651 | mov 0xf18,%g1 | |
17652 | ||
17653 | ! Check Point 84 completed | |
17654 | ||
17655 | ||
17656 | p0_label_421: | |
17657 | ! Mem[0000000030181410] = 4e00ffff, %l5 = 0000000000000000 | |
17658 | lduba [%i6+%o5]0x89,%l5 ! %l5 = 00000000000000ff | |
17659 | ! Mem[0000000030081408] = 00000076, %l0 = 00000000000000ff | |
17660 | lduha [%i2+%o4]0x89,%l0 ! %l0 = 0000000000000076 | |
17661 | ! Mem[0000000030101400] = 00000000, %l2 = 0000000000000034 | |
17662 | lduwa [%i4+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
17663 | ! Mem[0000000030081410] = ff000000 00000076, %l4 = 000000ff, %l5 = 000000ff | |
17664 | ldda [%i2+%o5]0x81,%l4 ! %l4 = 00000000ff000000 0000000000000076 | |
17665 | ! Mem[00000000300c1410] = 76000000, %l6 = 0000000000000000 | |
17666 | lduba [%i3+%o5]0x81,%l6 ! %l6 = 0000000000000076 | |
17667 | ! Mem[0000000030141400] = ffffffff, %f22 = d4000000 | |
17668 | lda [%i5+%g0]0x81,%f22 ! %f22 = ffffffff | |
17669 | ! Mem[0000000010181410] = 00000000, %l6 = 0000000000000076 | |
17670 | lduwa [%i6+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
17671 | ! Mem[0000000030081410] = 000000ff, %f10 = ffff004e | |
17672 | lda [%i2+%o5]0x89,%f10 ! %f10 = 000000ff | |
17673 | ! Mem[0000000030001410] = 000000ff, %l4 = 00000000ff000000 | |
17674 | lduwa [%i0+%o5]0x81,%l4 ! %l4 = 00000000000000ff | |
17675 | ! Starting 10 instruction Store Burst | |
17676 | ! Mem[00000000201c0001] = ffff9457, %l5 = 0000000000000076 | |
17677 | ldstuba [%o0+0x001]%asi,%l5 ! %l5 = 000000ff000000ff | |
17678 | ||
17679 | p0_label_422: | |
17680 | ! Mem[0000000010001408] = 6e092edc, %l6 = 0000000000000000 | |
17681 | swapa [%i0+%o4]0x88,%l6 ! %l6 = 000000006e092edc | |
17682 | ! %f0 = d4000000, Mem[0000000010101410] = ff000000 | |
17683 | st %f0 ,[%i4+%o5] ! Mem[0000000010101410] = d4000000 | |
17684 | ! %l0 = 00000076, %l1 = 00000000, Mem[0000000010041408] = 9d3d7957 6e092edc | |
17685 | stda %l0,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00000076 00000000 | |
17686 | ! %l7 = 0000000000000076, Mem[0000000010081410] = 00000000 | |
17687 | stba %l7,[%i2+%o5]0x80 ! Mem[0000000010081410] = 76000000 | |
17688 | ! %f30 = 00000000, Mem[0000000010001400] = ffff03ff | |
17689 | sta %f30,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 | |
17690 | ! Mem[0000000010081408] = 00000000, %l4 = 00000000000000ff | |
17691 | ldstuba [%i2+%o4]0x80,%l4 ! %l4 = 00000000000000ff | |
17692 | ! %f20 = 000000ff 00000076, Mem[0000000030001400] = 216400ff 00000000 | |
17693 | stda %f20,[%i0+%g0]0x89 ! Mem[0000000030001400] = 000000ff 00000076 | |
17694 | ! %l4 = 00000000, %l5 = 000000ff, Mem[0000000030141408] = ffffffff 00000000 | |
17695 | stda %l4,[%i5+%o4]0x89 ! Mem[0000000030141408] = 00000000 000000ff | |
17696 | ! Mem[0000000030141408] = 00000000, %l4 = 0000000000000000 | |
17697 | ldstuba [%i5+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
17698 | ! Starting 10 instruction Load Burst | |
17699 | ! Mem[0000000010081410] = 00000076, %l2 = 0000000000000000 | |
17700 | ldswa [%i2+%o5]0x88,%l2 ! %l2 = 0000000000000076 | |
17701 | ||
17702 | p0_label_423: | |
17703 | ! Mem[0000000010101408] = ff793d9d00000000, %f0 = d4000000 0000ffff | |
17704 | ldda [%i4+%o4]0x80,%f0 ! %f0 = ff793d9d 00000000 | |
17705 | ! Mem[0000000010101410] = d4000000, %l5 = 00000000000000ff | |
17706 | lduba [%i4+%o5]0x80,%l5 ! %l5 = 00000000000000d4 | |
17707 | ! Mem[0000000030181408] = ff41ff76, %l6 = 000000006e092edc | |
17708 | lduha [%i6+%o4]0x81,%l6 ! %l6 = 000000000000ff41 | |
17709 | ! Mem[00000000100c1410] = ffff0000, %l5 = 00000000000000d4 | |
17710 | ldswa [%i3+%o5]0x80,%l5 ! %l5 = ffffffffffff0000 | |
17711 | ! Mem[0000000010041400] = e32300ff, %l6 = 000000000000ff41 | |
17712 | lduwa [%i1+%g0]0x88,%l6 ! %l6 = 00000000e32300ff | |
17713 | ! Mem[000000001004143c] = c238965e, %l2 = 0000000000000076 | |
17714 | ldub [%i1+0x03d],%l2 ! %l2 = 0000000000000038 | |
17715 | ! Mem[000000001014141c] = ffffffff, %f1 = 00000000 | |
17716 | ld [%i5+0x01c],%f1 ! %f1 = ffffffff | |
17717 | ! Mem[0000000010181400] = 000003ff, %l7 = 0000000000000076 | |
17718 | lduwa [%i6+%g0]0x88,%l7 ! %l7 = 00000000000003ff | |
17719 | ! Mem[0000000030101400] = 00000000, %l5 = ffffffffffff0000 | |
17720 | ldsha [%i4+%g0]0x81,%l5 ! %l5 = 0000000000000000 | |
17721 | ! Starting 10 instruction Store Burst | |
17722 | ! Mem[00000000100c1408] = 00000000, %l2 = 0000000000000038 | |
17723 | swapa [%i3+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
17724 | ||
17725 | p0_label_424: | |
17726 | ! %l6 = e32300ff, %l7 = 000003ff, Mem[0000000010001408] = 00000000 00000000 | |
17727 | stda %l6,[%i0+%o4]0x88 ! Mem[0000000010001408] = e32300ff 000003ff | |
17728 | ! %f28 = 57793d9d, Mem[0000000030181400] = 8f0000ff | |
17729 | sta %f28,[%i6+%g0]0x81 ! Mem[0000000030181400] = 57793d9d | |
17730 | ! %l1 = 0000000000000000, Mem[00000000211c0000] = 00ff1a4c, %asi = 80 | |
17731 | stha %l1,[%o2+0x000]%asi ! Mem[00000000211c0000] = 00001a4c | |
17732 | ! %l7 = 00000000000003ff, Mem[0000000030101400] = 00000000 | |
17733 | stha %l7,[%i4+%g0]0x81 ! Mem[0000000030101400] = 03ff0000 | |
17734 | ! Mem[0000000010041410] = 000000ff, %l2 = 0000000000000000 | |
17735 | ldstuba [%i1+%o5]0x80,%l2 ! %l2 = 00000000000000ff | |
17736 | ! %l4 = 0000000000000000, Mem[0000000010081408] = ff000000 | |
17737 | stwa %l4,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00000000 | |
17738 | ! %l0 = 0000000000000076, Mem[00000000100c1400] = 0000000000ff00c4 | |
17739 | stxa %l0,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 0000000000000076 | |
17740 | ! Mem[00000000100c1408] = 00000038, %l5 = 0000000000000000 | |
17741 | swapa [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000038 | |
17742 | ! %f18 = 000000c6 00000000, %l7 = 00000000000003ff | |
17743 | ! Mem[0000000030181438] = fcc4c67612000000 | |
17744 | add %i6,0x038,%g1 | |
17745 | stda %f18,[%g1+%l7]ASI_PST32_S ! Mem[0000000030181438] = 000000c600000000 | |
17746 | ! Starting 10 instruction Load Burst | |
17747 | ! Mem[0000000010081408] = 00000000, %l1 = 0000000000000000 | |
17748 | lduwa [%i2+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
17749 | ||
17750 | p0_label_425: | |
17751 | ! Mem[00000000300c1400] = d4000000, %l4 = 0000000000000000 | |
17752 | lduba [%i3+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
17753 | ! %f0 = ff793d9d ffffffff, Mem[0000000010041410] = ff0000ff 00000076 | |
17754 | stda %f0 ,[%i1+%o5]0x80 ! Mem[0000000010041410] = ff793d9d ffffffff | |
17755 | ! Mem[000000001010140c] = 00000000, %l3 = 00000000000000c4 | |
17756 | lduba [%i4+0x00d]%asi,%l3 ! %l3 = 0000000000000000 | |
17757 | ! Mem[0000000021800100] = a3ff11d1, %l5 = 0000000000000038 | |
17758 | lduba [%o3+0x100]%asi,%l5 ! %l5 = 00000000000000a3 | |
17759 | ! Mem[0000000010141408] = 000000c6, %l4 = 0000000000000000 | |
17760 | ldsha [%i5+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
17761 | ! Mem[0000000010041404] = 00009c15, %l4 = 0000000000000000 | |
17762 | ldub [%i1+0x006],%l4 ! %l4 = 000000000000009c | |
17763 | ! Mem[0000000020800000] = 03348470, %l2 = 0000000000000000 | |
17764 | ldub [%o1+%g0],%l2 ! %l2 = 0000000000000003 | |
17765 | ! Mem[0000000010041408] = 00000076, %l7 = 00000000000003ff | |
17766 | ldsba [%i1+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
17767 | ! Mem[0000000010041400] = ff0023e3, %l4 = 000000000000009c | |
17768 | lduwa [%i1+%g0]0x80,%l4 ! %l4 = 00000000ff0023e3 | |
17769 | ! Starting 10 instruction Store Burst | |
17770 | ! Mem[0000000030041400] = 00000000, %l2 = 0000000000000003 | |
17771 | ldstuba [%i1+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
17772 | ||
17773 | ! Check Point 85 for processor 0 | |
17774 | ||
17775 | set p0_check_pt_data_85,%g4 | |
17776 | rd %ccr,%g5 ! %g5 = 44 | |
17777 | ldx [%g4+0x08],%g2 | |
17778 | cmp %l0,%g2 ! %l0 = 0000000000000076 | |
17779 | bne %xcc,p0_reg_check_fail0 | |
17780 | mov 0xee0,%g1 | |
17781 | ldx [%g4+0x10],%g2 | |
17782 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
17783 | bne %xcc,p0_reg_check_fail1 | |
17784 | mov 0xee1,%g1 | |
17785 | ldx [%g4+0x18],%g2 | |
17786 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
17787 | bne %xcc,p0_reg_check_fail2 | |
17788 | mov 0xee2,%g1 | |
17789 | ldx [%g4+0x20],%g2 | |
17790 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
17791 | bne %xcc,p0_reg_check_fail3 | |
17792 | mov 0xee3,%g1 | |
17793 | ldx [%g4+0x28],%g2 | |
17794 | cmp %l4,%g2 ! %l4 = 00000000ff0023e3 | |
17795 | bne %xcc,p0_reg_check_fail4 | |
17796 | mov 0xee4,%g1 | |
17797 | ldx [%g4+0x30],%g2 | |
17798 | cmp %l5,%g2 ! %l5 = 00000000000000a3 | |
17799 | bne %xcc,p0_reg_check_fail5 | |
17800 | mov 0xee5,%g1 | |
17801 | ldx [%g4+0x38],%g2 | |
17802 | cmp %l6,%g2 ! %l6 = 00000000e32300ff | |
17803 | bne %xcc,p0_reg_check_fail6 | |
17804 | mov 0xee6,%g1 | |
17805 | ldx [%g4+0x40],%g2 | |
17806 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
17807 | bne %xcc,p0_reg_check_fail7 | |
17808 | mov 0xee7,%g1 | |
17809 | ldx [%g4+0x48],%g3 | |
17810 | std %f0,[%g4] | |
17811 | ldx [%g4],%g2 | |
17812 | cmp %g3,%g2 ! %f0 = ff793d9d ffffffff | |
17813 | bne %xcc,p0_freg_check_fail | |
17814 | mov 0xf00,%g1 | |
17815 | ldx [%g4+0x50],%g3 | |
17816 | std %f4,[%g4] | |
17817 | ldx [%g4],%g2 | |
17818 | cmp %g3,%g2 ! %f4 = 7827da3e 00000000 | |
17819 | bne %xcc,p0_freg_check_fail | |
17820 | mov 0xf04,%g1 | |
17821 | ldx [%g4+0x58],%g3 | |
17822 | std %f10,[%g4] | |
17823 | ldx [%g4],%g2 | |
17824 | cmp %g3,%g2 ! %f10 = 000000ff 00009c15 | |
17825 | bne %xcc,p0_freg_check_fail | |
17826 | mov 0xf10,%g1 | |
17827 | ldx [%g4+0x60],%g3 | |
17828 | std %f22,[%g4] | |
17829 | ldx [%g4],%g2 | |
17830 | cmp %g3,%g2 ! %f22 = ffffffff 0000ffff | |
17831 | bne %xcc,p0_freg_check_fail | |
17832 | mov 0xf22,%g1 | |
17833 | ||
17834 | ! Check Point 85 completed | |
17835 | ||
17836 | ||
17837 | p0_label_426: | |
17838 | ! %l0 = 0000000000000076, Mem[0000000030001408] = ff000000 | |
17839 | stwa %l0,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00000076 | |
17840 | ! Mem[0000000010041408] = 00000076, %l6 = 00000000e32300ff | |
17841 | swapa [%i1+%o4]0x80,%l6 ! %l6 = 0000000000000076 | |
17842 | ! %f6 = ffffffff, Mem[0000000010181400] = 000003ff | |
17843 | sta %f6 ,[%i6+%g0]0x88 ! Mem[0000000010181400] = ffffffff | |
17844 | ! Mem[00000000300c1400] = 000000d4, %l2 = 0000000000000000 | |
17845 | ldstuba [%i3+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
17846 | ! %l5 = 00000000000000a3, Mem[0000000010141402] = 000000ff, %asi = 80 | |
17847 | stha %l5,[%i5+0x002]%asi ! Mem[0000000010141400] = 000000a3 | |
17848 | ! %f10 = 000000ff 00009c15, Mem[0000000010081420] = 1f41ff76 76000000 | |
17849 | std %f10,[%i2+0x020] ! Mem[0000000010081420] = 000000ff 00009c15 | |
17850 | ! %f4 = 7827da3e 00000000, Mem[00000000100c1410] = ffff0000 000000ff | |
17851 | stda %f4 ,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 7827da3e 00000000 | |
17852 | ! Mem[0000000021800101] = a3ff11d1, %l2 = 0000000000000000 | |
17853 | ldstuba [%o3+0x101]%asi,%l2 ! %l2 = 000000ff000000ff | |
17854 | ! Mem[0000000010141408] = c6000000, %l1 = 0000000000000000 | |
17855 | swapa [%i5+%o4]0x88,%l1 ! %l1 = 00000000c6000000 | |
17856 | ! Starting 10 instruction Load Burst | |
17857 | ! Mem[0000000030001410] = ff000000, %f8 = ff03ffff | |
17858 | lda [%i0+%o5]0x89,%f8 ! %f8 = ff000000 | |
17859 | ||
17860 | p0_label_427: | |
17861 | ! Mem[0000000020800000] = 03348470, %l1 = 00000000c6000000 | |
17862 | ldsba [%o1+0x001]%asi,%l1 ! %l1 = 0000000000000034 | |
17863 | ! Mem[0000000030081408] = 00000076, %l4 = 00000000ff0023e3 | |
17864 | ldsha [%i2+%o4]0x89,%l4 ! %l4 = 0000000000000076 | |
17865 | ! Mem[0000000030181410] = ffff004e, %l1 = 0000000000000034 | |
17866 | lduwa [%i6+%o5]0x81,%l1 ! %l1 = 00000000ffff004e | |
17867 | ! Mem[0000000020800000] = 03348470, %l3 = 0000000000000000 | |
17868 | ldsh [%o1+%g0],%l3 ! %l3 = 0000000000000334 | |
17869 | ! Mem[0000000010141408] = 00000000, %l7 = 0000000000000000 | |
17870 | lduwa [%i5+%o4]0x88,%l7 ! %l7 = 0000000000000000 | |
17871 | ! Mem[0000000010101410] = d4000000, %l3 = 0000000000000334 | |
17872 | ldsba [%i4+%o5]0x80,%l3 ! %l3 = ffffffffffffffd4 | |
17873 | ! Mem[00000000100c1400] = 00000076, %l7 = 0000000000000000 | |
17874 | ldsha [%i3+%g0]0x88,%l7 ! %l7 = 0000000000000076 | |
17875 | ! Mem[00000000300c1410] = 00000076, %f3 = c6000000 | |
17876 | lda [%i3+%o5]0x89,%f3 ! %f3 = 00000076 | |
17877 | ! Mem[0000000030041400] = ff000000, %l3 = ffffffffffffffd4 | |
17878 | ldsba [%i1+%g0]0x81,%l3 ! %l3 = ffffffffffffffff | |
17879 | ! Starting 10 instruction Store Burst | |
17880 | ! Mem[0000000010141408] = 00000000, %l0 = 0000000000000076 | |
17881 | swapa [%i5+%o4]0x80,%l0 ! %l0 = 0000000000000000 | |
17882 | ||
17883 | p0_label_428: | |
17884 | ! %l2 = 000000ff, %l3 = ffffffff, Mem[00000000300c1400] = ff0000d4 000000ff | |
17885 | stda %l2,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 000000ff ffffffff | |
17886 | ! Mem[0000000010081410] = 76000000, %l3 = ffffffffffffffff | |
17887 | ldstuba [%i2+%o5]0x80,%l3 ! %l3 = 00000076000000ff | |
17888 | ! Mem[0000000030141408] = ff000000, %l2 = 00000000000000ff | |
17889 | swapa [%i5+%o4]0x81,%l2 ! %l2 = 00000000ff000000 | |
17890 | ! %f14 = 0000ff00 00000000, Mem[00000000100c1408] = 00000000 00000000 | |
17891 | stda %f14,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 0000ff00 00000000 | |
17892 | ! %l2 = 00000000ff000000, Mem[0000000010001400] = 00000000 | |
17893 | stwa %l2,[%i0+%g0]0x80 ! Mem[0000000010001400] = ff000000 | |
17894 | ! Mem[0000000030101410] = 00000000, %l7 = 0000000000000076 | |
17895 | swapa [%i4+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
17896 | ! %f0 = ff793d9d, Mem[0000000010081410] = 000000ff | |
17897 | sta %f0 ,[%i2+%o5]0x88 ! Mem[0000000010081410] = ff793d9d | |
17898 | ! Mem[0000000010041410] = 9d3d79ff, %l3 = 0000000000000076 | |
17899 | ldstuba [%i1+%o5]0x88,%l3 ! %l3 = 000000ff000000ff | |
17900 | ! %f20 = 000000ff 00000076, Mem[00000000300c1410] = 00000076 000023e3 | |
17901 | stda %f20,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 000000ff 00000076 | |
17902 | ! Starting 10 instruction Load Burst | |
17903 | ! Mem[0000000030001408] = 76000000, %f16 = 3403ffff | |
17904 | lda [%i0+%o4]0x81,%f16 ! %f16 = 76000000 | |
17905 | ||
17906 | p0_label_429: | |
17907 | ! Mem[0000000010181408] = ffc4c676, %l6 = 0000000000000076 | |
17908 | ldswa [%i6+%o4]0x80,%l6 ! %l6 = ffffffffffc4c676 | |
17909 | ! Mem[0000000010041408] = e32300ff, %l4 = 0000000000000076 | |
17910 | ldswa [%i1+%o4]0x80,%l4 ! %l4 = ffffffffe32300ff | |
17911 | ! Mem[0000000030101408] = 00cb0000, %l4 = ffffffffe32300ff | |
17912 | ldswa [%i4+%o4]0x81,%l4 ! %l4 = 0000000000cb0000 | |
17913 | ! Mem[00000000100c1420] = ff000000, %l2 = 00000000ff000000 | |
17914 | ldswa [%i3+0x020]%asi,%l2 ! %l2 = ffffffffff000000 | |
17915 | ! Mem[0000000010101430] = 00000000 000000ff, %l4 = 00cb0000, %l5 = 000000a3 | |
17916 | ldda [%i4+0x030]%asi,%l4 ! %l4 = 0000000000000000 00000000000000ff | |
17917 | ! Mem[0000000010041410] = ff793d9d, %l7 = 0000000000000000 | |
17918 | lduha [%i1+%o5]0x80,%l7 ! %l7 = 000000000000ff79 | |
17919 | ! Mem[00000000201c0000] = ffff9457, %l3 = 00000000000000ff | |
17920 | lduba [%o0+0x001]%asi,%l3 ! %l3 = 00000000000000ff | |
17921 | ! Mem[0000000030081410] = 76000000 000000ff, %l2 = ff000000, %l3 = 000000ff | |
17922 | ldda [%i2+%o5]0x89,%l2 ! %l2 = 00000000000000ff 0000000076000000 | |
17923 | ! Mem[0000000010041410] = ffffffff9d3d79ff, %f16 = 76000000 000000c6 | |
17924 | ldda [%i1+%o5]0x88,%f16 ! %f16 = ffffffff 9d3d79ff | |
17925 | ! Starting 10 instruction Store Burst | |
17926 | ! %f21 = 00000076, Mem[0000000030181410] = 4e00ffff | |
17927 | sta %f21,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000076 | |
17928 | ||
17929 | p0_label_430: | |
17930 | ! %f14 = 0000ff00 00000000, Mem[0000000010181420] = 76000000 00000000 | |
17931 | std %f14,[%i6+0x020] ! Mem[0000000010181420] = 0000ff00 00000000 | |
17932 | ! %l7 = 000000000000ff79, Mem[0000000010101408] = ff793d9d | |
17933 | stwa %l7,[%i4+%o4]0x80 ! Mem[0000000010101408] = 0000ff79 | |
17934 | ! Mem[0000000010081438] = fc0000ff00000000, %l3 = 0000000076000000, %l6 = ffffffffffc4c676 | |
17935 | add %i2,0x38,%g1 | |
17936 | casxa [%g1]0x80,%l3,%l6 ! %l6 = fc0000ff00000000 | |
17937 | ! %l3 = 0000000076000000, Mem[00000000300c1400] = 000000ff | |
17938 | stha %l3,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 000000ff | |
17939 | ! %f0 = ff793d9d ffffffff, Mem[0000000030181408] = 76ff41ff ff000000 | |
17940 | stda %f0 ,[%i6+%o4]0x89 ! Mem[0000000030181408] = ff793d9d ffffffff | |
17941 | ! Mem[0000000010101418] = 7600000000000000, %l5 = 00000000000000ff, %l6 = fc0000ff00000000 | |
17942 | add %i4,0x18,%g1 | |
17943 | casxa [%g1]0x80,%l5,%l6 ! %l6 = 7600000000000000 | |
17944 | ! Mem[00000000100c1400] = 00000076, %l4 = 0000000000000000 | |
17945 | swapa [%i3+%g0]0x88,%l4 ! %l4 = 0000000000000076 | |
17946 | ! %l7 = 000000000000ff79, Mem[00000000201c0000] = ffff9457, %asi = 80 | |
17947 | stha %l7,[%o0+0x000]%asi ! Mem[00000000201c0000] = ff799457 | |
17948 | ! Mem[0000000010081410] = ff793d9d, %l4 = 0000000000000076 | |
17949 | swapa [%i2+%o5]0x88,%l4 ! %l4 = 00000000ff793d9d | |
17950 | ! Starting 10 instruction Load Burst | |
17951 | ! Code Fragment 4 | |
17952 | p0_fragment_16: | |
17953 | ! %l0 = 0000000000000000 | |
17954 | setx 0x7b5f05bfc4413255,%g7,%l0 ! %l0 = 7b5f05bfc4413255 | |
17955 | ! %l1 = 00000000ffff004e | |
17956 | setx 0xdb3aa2784f19180c,%g7,%l1 ! %l1 = db3aa2784f19180c | |
17957 | setx 0x7ff8, %g1, %g2 | |
17958 | and %l0, %g2, %l0 | |
17959 | setx 0xffffffff, %g1, %g2 | |
17960 | and %l1, %g2, %l1 | |
17961 | setx 0x100000000, %g1, %g2 | |
17962 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
17963 | ta T_CHANGE_HPRIV | |
17964 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
17965 | ta T_CHANGE_NONHPRIV | |
17966 | ! %l0 = 7b5f05bfc4413255 | |
17967 | setx 0xbe9277c8124a0cc3,%g7,%l0 ! %l0 = be9277c8124a0cc3 | |
17968 | ! %l1 = db3aa2784f19180c | |
17969 | setx 0x86f3d8400f502ca6,%g7,%l1 ! %l1 = 86f3d8400f502ca6 | |
17970 | ||
17971 | ! Check Point 86 for processor 0 | |
17972 | ||
17973 | set p0_check_pt_data_86,%g4 | |
17974 | rd %ccr,%g5 ! %g5 = 44 | |
17975 | ldx [%g4+0x08],%g2 | |
17976 | cmp %l0,%g2 ! %l0 = be9277c8124a0cc3 | |
17977 | bne %xcc,p0_reg_check_fail0 | |
17978 | mov 0xee0,%g1 | |
17979 | ldx [%g4+0x10],%g2 | |
17980 | cmp %l1,%g2 ! %l1 = 86f3d8400f502ca6 | |
17981 | bne %xcc,p0_reg_check_fail1 | |
17982 | mov 0xee1,%g1 | |
17983 | ldx [%g4+0x18],%g2 | |
17984 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
17985 | bne %xcc,p0_reg_check_fail2 | |
17986 | mov 0xee2,%g1 | |
17987 | ldx [%g4+0x20],%g2 | |
17988 | cmp %l3,%g2 ! %l3 = 0000000076000000 | |
17989 | bne %xcc,p0_reg_check_fail3 | |
17990 | mov 0xee3,%g1 | |
17991 | ldx [%g4+0x28],%g2 | |
17992 | cmp %l4,%g2 ! %l4 = 00000000ff793d9d | |
17993 | bne %xcc,p0_reg_check_fail4 | |
17994 | mov 0xee4,%g1 | |
17995 | ldx [%g4+0x30],%g2 | |
17996 | cmp %l6,%g2 ! %l6 = 7600000000000000 | |
17997 | bne %xcc,p0_reg_check_fail6 | |
17998 | mov 0xee6,%g1 | |
17999 | ldx [%g4+0x38],%g2 | |
18000 | cmp %l7,%g2 ! %l7 = 000000000000ff79 | |
18001 | bne %xcc,p0_reg_check_fail7 | |
18002 | mov 0xee7,%g1 | |
18003 | ldx [%g4+0x40],%g3 | |
18004 | std %f2,[%g4] | |
18005 | ldx [%g4],%g2 | |
18006 | cmp %g3,%g2 ! %f2 = 0000ffff 00000076 | |
18007 | bne %xcc,p0_freg_check_fail | |
18008 | mov 0xf02,%g1 | |
18009 | ldx [%g4+0x48],%g3 | |
18010 | std %f4,[%g4] | |
18011 | ldx [%g4],%g2 | |
18012 | cmp %g3,%g2 ! %f4 = 7827da3e 00000000 | |
18013 | bne %xcc,p0_freg_check_fail | |
18014 | mov 0xf04,%g1 | |
18015 | ldx [%g4+0x50],%g3 | |
18016 | std %f8,[%g4] | |
18017 | ldx [%g4],%g2 | |
18018 | cmp %g3,%g2 ! %f8 = ff000000 ff000000 | |
18019 | bne %xcc,p0_freg_check_fail | |
18020 | mov 0xf08,%g1 | |
18021 | ldx [%g4+0x58],%g3 | |
18022 | std %f16,[%g4] | |
18023 | ldx [%g4],%g2 | |
18024 | cmp %g3,%g2 ! %f16 = ffffffff 9d3d79ff | |
18025 | bne %xcc,p0_freg_check_fail | |
18026 | mov 0xf16,%g1 | |
18027 | ||
18028 | ! Check Point 86 completed | |
18029 | ||
18030 | ||
18031 | p0_label_431: | |
18032 | ! Mem[0000000010081408] = 00000000 00000000, %l4 = ff793d9d, %l5 = 000000ff | |
18033 | ldda [%i2+%o4]0x88,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
18034 | ! %f16 = ffffffff, Mem[0000000010141400] = a3000000 | |
18035 | sta %f16,[%i5+%g0]0x88 ! Mem[0000000010141400] = ffffffff | |
18036 | ! Mem[0000000030081400] = 00000000000000ff, %f12 = ff000000 ff00007a | |
18037 | ldda [%i2+%g0]0x81,%f12 ! %f12 = 00000000 000000ff | |
18038 | ! Mem[0000000030081408] = 00000076, %l5 = 0000000000000000 | |
18039 | lduwa [%i2+%o4]0x89,%l5 ! %l5 = 0000000000000076 | |
18040 | ! Mem[0000000010101400] = 8f000000 00000000, %l6 = 00000000, %l7 = 0000ff79 | |
18041 | ldda [%i4+%g0]0x88,%l6 ! %l6 = 0000000000000000 000000008f000000 | |
18042 | ! Mem[0000000010181400] = ffffffff, %l3 = 0000000076000000 | |
18043 | ldsha [%i6+%g0]0x80,%l3 ! %l3 = ffffffffffffffff | |
18044 | ! Mem[0000000030141400] = ffffffff, %l7 = 000000008f000000 | |
18045 | lduha [%i5+%g0]0x81,%l7 ! %l7 = 000000000000ffff | |
18046 | ! Mem[0000000030001408] = 76000000, %l2 = 00000000000000ff | |
18047 | ldsha [%i0+%o4]0x81,%l2 ! %l2 = 0000000000007600 | |
18048 | ! Mem[0000000010141408] = 76000000, %l2 = 0000000000007600 | |
18049 | lduwa [%i5+%o4]0x88,%l2 ! %l2 = 0000000076000000 | |
18050 | ! Starting 10 instruction Store Burst | |
18051 | ! %l5 = 0000000000000076, Mem[0000000030041408] = 00000000 | |
18052 | stba %l5,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000076 | |
18053 | ||
18054 | p0_label_432: | |
18055 | ! %f0 = ff793d9d ffffffff 0000ffff 00000076 | |
18056 | ! %f4 = 7827da3e 00000000 ffffffff 12000000 | |
18057 | ! %f8 = ff000000 ff000000 000000ff 00009c15 | |
18058 | ! %f12 = 00000000 000000ff 0000ff00 00000000 | |
18059 | stda %f0,[%i0]ASI_BLK_SL ! Block Store to 0000000030001400 | |
18060 | ! Mem[00000000100c1438] = 00000000, %l0 = be9277c8124a0cc3 | |
18061 | ldstub [%i3+0x038],%l0 ! %l0 = 00000000000000ff | |
18062 | ! %l3 = ffffffffffffffff, Mem[0000000030141400] = 00000000ffffffff | |
18063 | stxa %l3,[%i5+%g0]0x89 ! Mem[0000000030141400] = ffffffffffffffff | |
18064 | ! Mem[0000000030141400] = ffffffff, %l2 = 0000000076000000 | |
18065 | ldstuba [%i5+%g0]0x81,%l2 ! %l2 = 000000ff000000ff | |
18066 | ! %l3 = ffffffffffffffff, Mem[00000000100c1408] = 00000000 | |
18067 | stha %l3,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 0000ffff | |
18068 | ! Mem[0000000010141410] = ff000000, %l6 = 0000000000000000 | |
18069 | ldstuba [%i5+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
18070 | ! %l5 = 0000000000000076, immed = 00000675, %y = 000000fe | |
18071 | umul %l5,0x675,%l6 ! %l6 = 000000000002f9ee, %y = 00000000 | |
18072 | ! Mem[0000000020800001] = 03348470, %l1 = 86f3d8400f502ca6 | |
18073 | ldstuba [%o1+0x001]%asi,%l1 ! %l1 = 00000034000000ff | |
18074 | ! %f18 = 000000c6 00000000, Mem[0000000010081410] = 00000076 7a0000ff | |
18075 | stda %f18,[%i2+%o5]0x88 ! Mem[0000000010081410] = 000000c6 00000000 | |
18076 | ! Starting 10 instruction Load Burst | |
18077 | membar #Sync ! Added by membar checker (73) | |
18078 | ! Mem[0000000030001400] = ffffffff9d3d79ff, %l6 = 000000000002f9ee | |
18079 | ldxa [%i0+%g0]0x81,%l6 ! %l6 = ffffffff9d3d79ff | |
18080 | ||
18081 | p0_label_433: | |
18082 | ! Mem[0000000030101400] = 0000ff03, %l1 = 0000000000000034 | |
18083 | lduha [%i4+%g0]0x89,%l1 ! %l1 = 000000000000ff03 | |
18084 | ! Mem[0000000010141408] = 0000007600000000, %f20 = 000000ff 00000076 | |
18085 | ldda [%i5+%o4]0x80,%f20 ! %f20 = 00000076 00000000 | |
18086 | ! Mem[0000000010081400] = 1f000000, %l7 = 000000000000ffff | |
18087 | lduba [%i2+%g0]0x80,%l7 ! %l7 = 000000000000001f | |
18088 | ! Mem[0000000010081410] = 00000000, %l5 = 0000000000000076 | |
18089 | ldsba [%i2+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
18090 | ! Mem[0000000030101410] = 00000076 3eda2778, %l6 = 9d3d79ff, %l7 = 0000001f | |
18091 | ldda [%i4+%o5]0x81,%l6 ! %l6 = 0000000000000076 000000003eda2778 | |
18092 | ! Mem[0000000010081414] = c6000000, %l7 = 000000003eda2778 | |
18093 | ldub [%i2+0x015],%l7 ! %l7 = 0000000000000000 | |
18094 | ! Mem[0000000010101410] = 000000d4, %l6 = 0000000000000076 | |
18095 | ldsha [%i4+%o5]0x88,%l6 ! %l6 = 00000000000000d4 | |
18096 | ! Mem[0000000010001410] = ff00007a, %l4 = 0000000000000000 | |
18097 | ldswa [%i0+%o5]0x88,%l4 ! %l4 = ffffffffff00007a | |
18098 | ! Mem[0000000030001400] = ffffffff, %l5 = 0000000000000000 | |
18099 | lduha [%i0+%g0]0x81,%l5 ! %l5 = 000000000000ffff | |
18100 | ! Starting 10 instruction Store Burst | |
18101 | ! Mem[0000000010101400] = 00000000, %l6 = 00000000000000d4 | |
18102 | swapa [%i4+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
18103 | ||
18104 | p0_label_434: | |
18105 | ! %l0 = 0000000000000000, Mem[0000000030001408] = 76000000 | |
18106 | stba %l0,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000 | |
18107 | ! %f25 = 000000ff, Mem[0000000030101410] = 00000076 | |
18108 | sta %f25,[%i4+%o5]0x81 ! Mem[0000000030101410] = 000000ff | |
18109 | ! %l1 = 000000000000ff03, Mem[000000001014142c] = 4e00ffff | |
18110 | stw %l1,[%i5+0x02c] ! Mem[000000001014142c] = 0000ff03 | |
18111 | ! %f24 = 1f41ff76 000000ff, %l3 = ffffffffffffffff | |
18112 | ! Mem[0000000010101428] = 0000000000007957 | |
18113 | add %i4,0x028,%g1 | |
18114 | stda %f24,[%g1+%l3]ASI_PST8_PL ! Mem[0000000010101428] = ff00000076ff411f | |
18115 | ! %l1 = 000000000000ff03, Mem[0000000010141434] = 000000ff | |
18116 | stw %l1,[%i5+0x034] ! Mem[0000000010141434] = 0000ff03 | |
18117 | ! %f0 = ff793d9d, Mem[0000000030101408] = 0000cb00 | |
18118 | sta %f0 ,[%i4+%o4]0x89 ! Mem[0000000030101408] = ff793d9d | |
18119 | ! Mem[0000000030001408] = 00000000, %l1 = 000000000000ff03 | |
18120 | swapa [%i0+%o4]0x81,%l1 ! %l1 = 0000000000000000 | |
18121 | ! %l2 = 00000000000000ff, Mem[00000000211c0001] = 00001a4c | |
18122 | stb %l2,[%o2+0x001] ! Mem[00000000211c0000] = 00ff1a4c | |
18123 | ! %l6 = 0000000000000000, Mem[0000000010141408] = 00000076 | |
18124 | stwa %l6,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000 | |
18125 | ! Starting 10 instruction Load Burst | |
18126 | ! Mem[0000000030181410] = 76000000, %l3 = ffffffffffffffff | |
18127 | ldswa [%i6+%o5]0x81,%l3 ! %l3 = 0000000076000000 | |
18128 | ||
18129 | p0_label_435: | |
18130 | ! Mem[0000000010001410] = 7a0000ff000000ff, %f30 = 00000000 c238965e | |
18131 | ldda [%i0+%o5]0x80,%f30 ! %f30 = 7a0000ff 000000ff | |
18132 | ! Mem[0000000030041410] = 000000ff, %l6 = 0000000000000000 | |
18133 | lduha [%i1+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
18134 | ! Mem[0000000030101400] = 03ff0000ff000000, %f18 = 000000c6 00000000 | |
18135 | ldda [%i4+%g0]0x81,%f18 ! %f18 = 03ff0000 ff000000 | |
18136 | ! Mem[0000000020800000] = 03ff8470, %l2 = 00000000000000ff | |
18137 | lduba [%o1+0x001]%asi,%l2 ! %l2 = 00000000000000ff | |
18138 | ! Mem[0000000010181408] = ffc4c676, %l1 = 0000000000000000 | |
18139 | lduwa [%i6+%o4]0x80,%l1 ! %l1 = 00000000ffc4c676 | |
18140 | ! Mem[0000000010081408] = 00000000, %f22 = ffffffff | |
18141 | lda [%i2+%o4]0x88,%f22 ! %f22 = 00000000 | |
18142 | ! Mem[00000000300c1400] = 000000ff ffffffff, %l0 = 00000000, %l1 = ffc4c676 | |
18143 | ldda [%i3+%g0]0x81,%l0 ! %l0 = 00000000000000ff 00000000ffffffff | |
18144 | ! Mem[00000000300c1408] = ffff0000000000ff, %l4 = ffffffffff00007a | |
18145 | ldxa [%i3+%o4]0x89,%l4 ! %l4 = ffff0000000000ff | |
18146 | ! Mem[0000000030181410] = 76000000, %l4 = ffff0000000000ff | |
18147 | lduwa [%i6+%o5]0x81,%l4 ! %l4 = 0000000076000000 | |
18148 | ! Starting 10 instruction Store Burst | |
18149 | ! %l7 = 0000000000000000, Mem[0000000030081400] = 00000000 | |
18150 | stwa %l7,[%i2+%g0]0x89 ! Mem[0000000030081400] = 00000000 | |
18151 | ||
18152 | ! Check Point 87 for processor 0 | |
18153 | ||
18154 | set p0_check_pt_data_87,%g4 | |
18155 | rd %ccr,%g5 ! %g5 = 44 | |
18156 | ldx [%g4+0x08],%g2 | |
18157 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
18158 | bne %xcc,p0_reg_check_fail0 | |
18159 | mov 0xee0,%g1 | |
18160 | ldx [%g4+0x10],%g2 | |
18161 | cmp %l1,%g2 ! %l1 = 00000000ffffffff | |
18162 | bne %xcc,p0_reg_check_fail1 | |
18163 | mov 0xee1,%g1 | |
18164 | ldx [%g4+0x18],%g2 | |
18165 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
18166 | bne %xcc,p0_reg_check_fail2 | |
18167 | mov 0xee2,%g1 | |
18168 | ldx [%g4+0x20],%g2 | |
18169 | cmp %l3,%g2 ! %l3 = 0000000076000000 | |
18170 | bne %xcc,p0_reg_check_fail3 | |
18171 | mov 0xee3,%g1 | |
18172 | ldx [%g4+0x28],%g2 | |
18173 | cmp %l4,%g2 ! %l4 = 0000000076000000 | |
18174 | bne %xcc,p0_reg_check_fail4 | |
18175 | mov 0xee4,%g1 | |
18176 | ldx [%g4+0x30],%g2 | |
18177 | cmp %l5,%g2 ! %l5 = 000000000000ffff | |
18178 | bne %xcc,p0_reg_check_fail5 | |
18179 | mov 0xee5,%g1 | |
18180 | ldx [%g4+0x38],%g2 | |
18181 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
18182 | bne %xcc,p0_reg_check_fail6 | |
18183 | mov 0xee6,%g1 | |
18184 | ldx [%g4+0x40],%g2 | |
18185 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
18186 | bne %xcc,p0_reg_check_fail7 | |
18187 | mov 0xee7,%g1 | |
18188 | ldx [%g4+0x48],%g3 | |
18189 | std %f0,[%g4] | |
18190 | ldx [%g4],%g2 | |
18191 | cmp %g3,%g2 ! %f0 = ff793d9d ffffffff | |
18192 | bne %xcc,p0_freg_check_fail | |
18193 | mov 0xf00,%g1 | |
18194 | ldx [%g4+0x50],%g3 | |
18195 | std %f4,[%g4] | |
18196 | ldx [%g4],%g2 | |
18197 | cmp %g3,%g2 ! %f4 = 7827da3e 00000000 | |
18198 | bne %xcc,p0_freg_check_fail | |
18199 | mov 0xf04,%g1 | |
18200 | ldx [%g4+0x58],%g3 | |
18201 | std %f6,[%g4] | |
18202 | ldx [%g4],%g2 | |
18203 | cmp %g3,%g2 ! %f6 = ffffffff 12000000 | |
18204 | bne %xcc,p0_freg_check_fail | |
18205 | mov 0xf06,%g1 | |
18206 | ldx [%g4+0x60],%g3 | |
18207 | std %f12,[%g4] | |
18208 | ldx [%g4],%g2 | |
18209 | cmp %g3,%g2 ! %f12 = 00000000 000000ff | |
18210 | bne %xcc,p0_freg_check_fail | |
18211 | mov 0xf12,%g1 | |
18212 | ldx [%g4+0x68],%g3 | |
18213 | std %f18,[%g4] | |
18214 | ldx [%g4],%g2 | |
18215 | cmp %g3,%g2 ! %f18 = 03ff0000 ff000000 | |
18216 | bne %xcc,p0_freg_check_fail | |
18217 | mov 0xf18,%g1 | |
18218 | ldx [%g4+0x70],%g3 | |
18219 | std %f20,[%g4] | |
18220 | ldx [%g4],%g2 | |
18221 | cmp %g3,%g2 ! %f20 = 00000076 00000000 | |
18222 | bne %xcc,p0_freg_check_fail | |
18223 | mov 0xf20,%g1 | |
18224 | ldx [%g4+0x78],%g3 | |
18225 | std %f22,[%g4] | |
18226 | ldx [%g4],%g2 | |
18227 | cmp %g3,%g2 ! %f22 = 00000000 0000ffff | |
18228 | bne %xcc,p0_freg_check_fail | |
18229 | mov 0xf22,%g1 | |
18230 | ldx [%g4+0x80],%g3 | |
18231 | std %f30,[%g4] | |
18232 | ldx [%g4],%g2 | |
18233 | cmp %g3,%g2 ! %f30 = 7a0000ff 000000ff | |
18234 | bne %xcc,p0_freg_check_fail | |
18235 | mov 0xf30,%g1 | |
18236 | ||
18237 | ! Check Point 87 completed | |
18238 | ||
18239 | ||
18240 | p0_label_436: | |
18241 | ! %l1 = 00000000ffffffff, Mem[0000000020800040] = ffff7379 | |
18242 | sth %l1,[%o1+0x040] ! Mem[0000000020800040] = ffff7379 | |
18243 | ! %l2 = 000000ff, %l3 = 76000000, Mem[0000000010041410] = ff793d9d ffffffff | |
18244 | stda %l2,[%i1+%o5]0x80 ! Mem[0000000010041410] = 000000ff 76000000 | |
18245 | ! Mem[0000000030181410] = 76000000, %l1 = 00000000ffffffff | |
18246 | swapa [%i6+%o5]0x81,%l1 ! %l1 = 0000000076000000 | |
18247 | ! %l7 = 0000000000000000, Mem[0000000010101400] = d4000000 | |
18248 | stwa %l7,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00000000 | |
18249 | ! Mem[0000000010141410] = ff0000ff, %l3 = 0000000076000000 | |
18250 | ldstuba [%i5+%o5]0x88,%l3 ! %l3 = 000000ff000000ff | |
18251 | ! %f18 = 03ff0000 ff000000, %l1 = 0000000076000000 | |
18252 | ! Mem[0000000010101408] = 0000ff7900000000 | |
18253 | add %i4,0x008,%g1 | |
18254 | stda %f18,[%g1+%l1]ASI_PST16_P ! Mem[0000000010101408] = 0000ff7900000000 | |
18255 | ! %l1 = 0000000076000000, Mem[0000000030141400] = ffffffff | |
18256 | stha %l1,[%i5+%g0]0x89 ! Mem[0000000030141400] = ffff0000 | |
18257 | ! Mem[0000000030081410] = ff000000, %l2 = 00000000000000ff | |
18258 | ldstuba [%i2+%o5]0x81,%l2 ! %l2 = 000000ff000000ff | |
18259 | ! Mem[0000000030141400] = ffff0000, %l5 = 000000000000ffff | |
18260 | swapa [%i5+%g0]0x89,%l5 ! %l5 = 00000000ffff0000 | |
18261 | ! Starting 10 instruction Load Burst | |
18262 | ! Mem[0000000030141408] = 000000ffff000000, %l5 = 00000000ffff0000 | |
18263 | ldxa [%i5+%o4]0x89,%l5 ! %l5 = 000000ffff000000 | |
18264 | ||
18265 | p0_label_437: | |
18266 | ! Mem[0000000030141410] = 0000ffff, %f10 = 000000ff | |
18267 | lda [%i5+%o5]0x89,%f10 ! %f10 = 0000ffff | |
18268 | ! Mem[0000000010101408] = 79ff0000, %l5 = 000000ffff000000 | |
18269 | lduwa [%i4+%o4]0x88,%l5 ! %l5 = 0000000079ff0000 | |
18270 | ! Mem[0000000030181400] = 57793d9d, %l3 = 00000000000000ff | |
18271 | lduba [%i6+%g0]0x81,%l3 ! %l3 = 0000000000000057 | |
18272 | ! Mem[0000000010081410] = 00000000, %l1 = 0000000076000000 | |
18273 | lduha [%i2+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
18274 | ! Mem[0000000010081420] = 000000ff 00009c15, %l2 = 000000ff, %l3 = 00000057 | |
18275 | ldd [%i2+0x020],%l2 ! %l2 = 00000000000000ff 0000000000009c15 | |
18276 | ! Mem[0000000030101408] = ff793d9d, %l1 = 0000000000000000 | |
18277 | ldsba [%i4+%o4]0x89,%l1 ! %l1 = ffffffffffffff9d | |
18278 | ! Mem[0000000030081410] = 76000000 000000ff, %l6 = 000000ff, %l7 = 00000000 | |
18279 | ldda [%i2+%o5]0x89,%l6 ! %l6 = 00000000000000ff 0000000076000000 | |
18280 | ! Mem[00000000201c0000] = ff799457, %l5 = 0000000079ff0000 | |
18281 | ldsb [%o0+0x001],%l5 ! %l5 = 0000000000000079 | |
18282 | ! Mem[0000000030081408] = 7600000000000000, %f4 = 7827da3e 00000000 | |
18283 | ldda [%i2+%o4]0x81,%f4 ! %f4 = 76000000 00000000 | |
18284 | ! Starting 10 instruction Store Burst | |
18285 | ! %f24 = 1f41ff76 000000ff, %l4 = 0000000076000000 | |
18286 | ! Mem[0000000030101438] = 5e9638c20b931a2a | |
18287 | add %i4,0x038,%g1 | |
18288 | stda %f24,[%g1+%l4]ASI_PST32_SL ! Mem[0000000030101438] = 5e9638c20b931a2a | |
18289 | ||
18290 | p0_label_438: | |
18291 | ! Mem[0000000030041408] = 76000000, %l1 = ffffffffffffff9d | |
18292 | swapa [%i1+%o4]0x81,%l1 ! %l1 = 0000000076000000 | |
18293 | ! Mem[00000000100c1400] = 00000000, %l0 = 00000000000000ff | |
18294 | ldstuba [%i3+%g0]0x80,%l0 ! %l0 = 00000000000000ff | |
18295 | ! Mem[0000000030101400] = 0000ff03, %l0 = 0000000000000000 | |
18296 | swapa [%i4+%g0]0x89,%l0 ! %l0 = 000000000000ff03 | |
18297 | ! Mem[00000000300c1410] = 00000076, %l7 = 0000000076000000 | |
18298 | swapa [%i3+%o5]0x89,%l7 ! %l7 = 0000000000000076 | |
18299 | ! Mem[0000000010041410] = ff000000, %l5 = 0000000000000079 | |
18300 | swapa [%i1+%o5]0x88,%l5 ! %l5 = 00000000ff000000 | |
18301 | ! Mem[00000000300c1410] = 00000076, %l6 = 00000000000000ff | |
18302 | ldstuba [%i3+%o5]0x81,%l6 ! %l6 = 00000000000000ff | |
18303 | ! %f8 = ff000000 ff000000, Mem[0000000030081400] = 00000000 000000ff | |
18304 | stda %f8 ,[%i2+%g0]0x81 ! Mem[0000000030081400] = ff000000 ff000000 | |
18305 | ! %f27 = 00000000, Mem[0000000010101400] = 00000000 | |
18306 | sta %f27,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 | |
18307 | ! %f15 = 00000000, Mem[0000000010001410] = ff00007a | |
18308 | sta %f15,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00000000 | |
18309 | ! Starting 10 instruction Load Burst | |
18310 | ! Mem[0000000030101400] = 00000000, %l5 = 00000000ff000000 | |
18311 | lduba [%i4+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
18312 | ||
18313 | p0_label_439: | |
18314 | ! Mem[00000000100c1410] = 3eda2778, %l6 = 0000000000000000 | |
18315 | lduwa [%i3+%o5]0x88,%l6 ! %l6 = 000000003eda2778 | |
18316 | ! Mem[0000000030041400] = ff000000, %l4 = 0000000076000000 | |
18317 | lduba [%i1+%g0]0x81,%l4 ! %l4 = 00000000000000ff | |
18318 | ! Mem[0000000030141408] = ff000000, %l5 = 0000000000000000 | |
18319 | ldsha [%i5+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
18320 | ! Mem[0000000030081408] = 0000000000000076, %l1 = 0000000076000000 | |
18321 | ldxa [%i2+%o4]0x89,%l1 ! %l1 = 0000000000000076 | |
18322 | ! Mem[00000000211c0000] = 00ff1a4c, %l6 = 000000003eda2778 | |
18323 | ldub [%o2+%g0],%l6 ! %l6 = 0000000000000000 | |
18324 | ! Mem[0000000030001408] = 03ff0000, %l5 = 0000000000000000 | |
18325 | lduba [%i0+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
18326 | ! Mem[0000000020800040] = ffff7379, %l1 = 0000000000000076 | |
18327 | lduh [%o1+0x040],%l1 ! %l1 = 000000000000ffff | |
18328 | ! Mem[0000000010081408] = 00000000, %l4 = 00000000000000ff | |
18329 | ldswa [%i2+%o4]0x88,%l4 ! %l4 = 0000000000000000 | |
18330 | ! Mem[0000000010041408] = 00000000ff0023e3, %l5 = 0000000000000000 | |
18331 | ldxa [%i1+%o4]0x88,%l5 ! %l5 = 00000000ff0023e3 | |
18332 | ! Starting 10 instruction Store Burst | |
18333 | ! Mem[0000000020800000] = 03ff8470, %l4 = 0000000000000000 | |
18334 | ldstuba [%o1+0x000]%asi,%l4 ! %l4 = 00000003000000ff | |
18335 | ||
18336 | p0_label_440: | |
18337 | ! %f24 = 1f41ff76 000000ff, Mem[0000000010081400] = 0000001f 174573fc | |
18338 | stda %f24,[%i2+%g0]0x88 ! Mem[0000000010081400] = 1f41ff76 000000ff | |
18339 | ! Mem[00000000100c143f] = 00000076, %l0 = 000000000000ff03 | |
18340 | ldstuba [%i3+0x03f]%asi,%l0 ! %l0 = 00000076000000ff | |
18341 | ! Mem[0000000030181408] = ffffffff, %l3 = 0000000000009c15 | |
18342 | swapa [%i6+%o4]0x81,%l3 ! %l3 = 00000000ffffffff | |
18343 | ! %l6 = 0000000000000000, Mem[000000001008140e] = 00000000, %asi = 80 | |
18344 | stha %l6,[%i2+0x00e]%asi ! Mem[000000001008140c] = 00000000 | |
18345 | ! Mem[0000000010041439] = 00000000, %l1 = 000000000000ffff | |
18346 | ldstuba [%i1+0x039]%asi,%l1 ! %l1 = 00000000000000ff | |
18347 | ! %f26 = 76000000 00000000, %l6 = 0000000000000000 | |
18348 | ! Mem[0000000030101438] = 5e9638c20b931a2a | |
18349 | add %i4,0x038,%g1 | |
18350 | stda %f26,[%g1+%l6]ASI_PST8_S ! Mem[0000000030101438] = 5e9638c20b931a2a | |
18351 | ! %l6 = 00000000, %l7 = 00000076, Mem[0000000030001400] = ffffffff 9d3d79ff | |
18352 | stda %l6,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00000000 00000076 | |
18353 | ! %l1 = 0000000000000000, Mem[0000000010001410] = ff00000000000000 | |
18354 | stxa %l1,[%i0+%o5]0x88 ! Mem[0000000010001410] = 0000000000000000 | |
18355 | ! %l1 = 0000000000000000, Mem[0000000030101400] = 00000000 | |
18356 | stha %l1,[%i4+%g0]0x89 ! Mem[0000000030101400] = 00000000 | |
18357 | ! Starting 10 instruction Load Burst | |
18358 | ! Mem[0000000010181410] = 00000000, %l0 = 0000000000000076 | |
18359 | ldswa [%i6+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
18360 | ||
18361 | ! Check Point 88 for processor 0 | |
18362 | ||
18363 | set p0_check_pt_data_88,%g4 | |
18364 | rd %ccr,%g5 ! %g5 = 44 | |
18365 | ldx [%g4+0x08],%g2 | |
18366 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
18367 | bne %xcc,p0_reg_check_fail0 | |
18368 | mov 0xee0,%g1 | |
18369 | ldx [%g4+0x10],%g2 | |
18370 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
18371 | bne %xcc,p0_reg_check_fail1 | |
18372 | mov 0xee1,%g1 | |
18373 | ldx [%g4+0x18],%g2 | |
18374 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
18375 | bne %xcc,p0_reg_check_fail2 | |
18376 | mov 0xee2,%g1 | |
18377 | ldx [%g4+0x20],%g2 | |
18378 | cmp %l3,%g2 ! %l3 = 00000000ffffffff | |
18379 | bne %xcc,p0_reg_check_fail3 | |
18380 | mov 0xee3,%g1 | |
18381 | ldx [%g4+0x28],%g2 | |
18382 | cmp %l4,%g2 ! %l4 = 0000000000000003 | |
18383 | bne %xcc,p0_reg_check_fail4 | |
18384 | mov 0xee4,%g1 | |
18385 | ldx [%g4+0x30],%g2 | |
18386 | cmp %l5,%g2 ! %l5 = 00000000ff0023e3 | |
18387 | bne %xcc,p0_reg_check_fail5 | |
18388 | mov 0xee5,%g1 | |
18389 | ldx [%g4+0x38],%g2 | |
18390 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
18391 | bne %xcc,p0_reg_check_fail6 | |
18392 | mov 0xee6,%g1 | |
18393 | ldx [%g4+0x40],%g3 | |
18394 | std %f2,[%g4] | |
18395 | ldx [%g4],%g2 | |
18396 | cmp %g3,%g2 ! %f2 = 0000ffff 00000076 | |
18397 | bne %xcc,p0_freg_check_fail | |
18398 | mov 0xf02,%g1 | |
18399 | ldx [%g4+0x48],%g3 | |
18400 | std %f4,[%g4] | |
18401 | ldx [%g4],%g2 | |
18402 | cmp %g3,%g2 ! %f4 = 76000000 00000000 | |
18403 | bne %xcc,p0_freg_check_fail | |
18404 | mov 0xf04,%g1 | |
18405 | ldx [%g4+0x50],%g3 | |
18406 | std %f6,[%g4] | |
18407 | ldx [%g4],%g2 | |
18408 | cmp %g3,%g2 ! %f6 = ffffffff 12000000 | |
18409 | bne %xcc,p0_freg_check_fail | |
18410 | mov 0xf06,%g1 | |
18411 | ldx [%g4+0x58],%g3 | |
18412 | std %f10,[%g4] | |
18413 | ldx [%g4],%g2 | |
18414 | cmp %g3,%g2 ! %f10 = 0000ffff 00009c15 | |
18415 | bne %xcc,p0_freg_check_fail | |
18416 | mov 0xf10,%g1 | |
18417 | ||
18418 | ! Check Point 88 completed | |
18419 | ||
18420 | ||
18421 | p0_label_441: | |
18422 | ! Mem[0000000010181408] = 76c6c4ff, %l6 = 0000000000000000 | |
18423 | ldsha [%i6+%o4]0x88,%l6 ! %l6 = ffffffffffffc4ff | |
18424 | ! Mem[0000000030001410] = 000000003eda2778, %f24 = 1f41ff76 000000ff | |
18425 | ldda [%i0+%o5]0x81,%f24 ! %f24 = 00000000 3eda2778 | |
18426 | ! Mem[0000000010081410] = 00000000, %l5 = 00000000ff0023e3 | |
18427 | ldsba [%i2+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
18428 | ! Mem[00000000300c1400] = 000000ff, %l4 = 0000000000000003 | |
18429 | lduwa [%i3+%g0]0x81,%l4 ! %l4 = 00000000000000ff | |
18430 | ! Mem[0000000010101408] = 00000000 79ff0000, %l6 = ffffc4ff, %l7 = 00000076 | |
18431 | ldda [%i4+%o4]0x88,%l6 ! %l6 = 0000000079ff0000 0000000000000000 | |
18432 | ! Mem[0000000010081408] = 00000000, %l4 = 00000000000000ff | |
18433 | lduha [%i2+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
18434 | ! Mem[0000000010001420] = 00000000, %l5 = 0000000000000000 | |
18435 | ldsba [%i0+0x023]%asi,%l5 ! %l5 = 0000000000000000 | |
18436 | ! Mem[00000000100c1418] = 1f41ff76 2164159c, %l4 = 00000000, %l5 = 00000000 | |
18437 | ldda [%i3+0x018]%asi,%l4 ! %l4 = 000000001f41ff76 000000002164159c | |
18438 | membar #Sync ! Added by membar checker (74) | |
18439 | ! Mem[0000000030101400] = 00000000 ff000000 9d3d79ff 00b3e323 | |
18440 | ! Mem[0000000030101410] = 000000ff 3eda2778 a26115a2 6e092edc | |
18441 | ! Mem[0000000030101420] = 9c486421 76c9d21f 174573fc e9706042 | |
18442 | ! Mem[0000000030101430] = 90490000 9d3d7957 5e9638c2 0b931a2a | |
18443 | ldda [%i4]ASI_BLK_AIUS,%f16 ! Block Load from 0000000030101400 | |
18444 | ! Starting 10 instruction Store Burst | |
18445 | ! %f1 = ffffffff, Mem[0000000010181410] = 00000000 | |
18446 | sta %f1 ,[%i6+%o5]0x88 ! Mem[0000000010181410] = ffffffff | |
18447 | ||
18448 | p0_label_442: | |
18449 | ! Mem[0000000010101400] = 000000000000008f, %l5 = 000000002164159c, %l1 = 0000000000000000 | |
18450 | casxa [%i4]0x80,%l5,%l1 ! %l1 = 000000000000008f | |
18451 | ! %l5 = 000000002164159c, Mem[0000000021800041] = 9cff1df3 | |
18452 | stb %l5,[%o3+0x041] ! Mem[0000000021800040] = 9c9c1df3 | |
18453 | ! %l0 = 0000000000000000, Mem[0000000030141410] = 340315a20000ffff | |
18454 | stxa %l0,[%i5+%o5]0x89 ! Mem[0000000030141410] = 0000000000000000 | |
18455 | ! %l0 = 00000000, %l1 = 0000008f, Mem[0000000030001400] = 00000000 76000000 | |
18456 | stda %l0,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00000000 0000008f | |
18457 | membar #Sync ! Added by membar checker (75) | |
18458 | ! %f4 = 76000000 00000000, Mem[0000000030101408] = ff793d9d 23e3b300 | |
18459 | stda %f4 ,[%i4+%o4]0x89 ! Mem[0000000030101408] = 76000000 00000000 | |
18460 | ! %f8 = ff000000, Mem[0000000010101410] = d4000000 | |
18461 | sta %f8 ,[%i4+%o5]0x80 ! Mem[0000000010101410] = ff000000 | |
18462 | ! Mem[000000001000143c] = 174573fc, %l3 = 00000000ffffffff, %asi = 80 | |
18463 | swapa [%i0+0x03c]%asi,%l3 ! %l3 = 00000000174573fc | |
18464 | ! Mem[0000000010001408] = ff0023e3, %l1 = 000000000000008f | |
18465 | swapa [%i0+%o4]0x80,%l1 ! %l1 = 00000000ff0023e3 | |
18466 | ! %f26 = 174573fc, Mem[0000000010101410] = ff000000 | |
18467 | sta %f26,[%i4+%o5]0x80 ! Mem[0000000010101410] = 174573fc | |
18468 | ! Starting 10 instruction Load Burst | |
18469 | ! Mem[00000000100c1410] = 3eda2778, %l3 = 00000000174573fc | |
18470 | ldsba [%i3+%o5]0x88,%l3 ! %l3 = 0000000000000078 | |
18471 | ||
18472 | p0_label_443: | |
18473 | ! Mem[0000000030181408] = 159c0000, %f14 = 0000ff00 | |
18474 | lda [%i6+%o4]0x89,%f14 ! %f14 = 159c0000 | |
18475 | ! Mem[0000000030001408] = 0000ffff 03ff0000, %l2 = 000000ff, %l3 = 00000078 | |
18476 | ldda [%i0+%o4]0x89,%l2 ! %l2 = 0000000003ff0000 000000000000ffff | |
18477 | ! Mem[0000000030141400] = ffff0000 ffffffff 000000ff ff000000 | |
18478 | ! Mem[0000000030141410] = 00000000 00000000 fc734517 000000ff | |
18479 | ! Mem[0000000030141420] = 1f41ff76 2164159c 3739e890 ffffac00 | |
18480 | ! Mem[0000000030141430] = ff000000 00009400 7827da3e 597bac10 | |
18481 | ldda [%i5]ASI_BLK_AIUSL,%f16 ! Block Load from 0000000030141400 | |
18482 | ! Mem[0000000010101400] = 00000000, %l2 = 0000000003ff0000 | |
18483 | ldsba [%i4+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
18484 | ! Mem[0000000010181408] = ffc4c676, %l6 = 0000000079ff0000 | |
18485 | lduwa [%i6+%o4]0x80,%l6 ! %l6 = 00000000ffc4c676 | |
18486 | ! Mem[0000000010001400] = ff000000, %l4 = 000000001f41ff76 | |
18487 | ldswa [%i0+%g0]0x80,%l4 ! %l4 = ffffffffff000000 | |
18488 | ! Mem[00000000211c0000] = 00ff1a4c, %l0 = 0000000000000000 | |
18489 | lduha [%o2+0x000]%asi,%l0 ! %l0 = 00000000000000ff | |
18490 | ! Mem[0000000030141400] = ffff0000, %l7 = 0000000000000000 | |
18491 | ldsba [%i5+%g0]0x81,%l7 ! %l7 = ffffffffffffffff | |
18492 | ! Mem[0000000010081410] = 00000000, %l1 = 00000000ff0023e3 | |
18493 | ldswa [%i2+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
18494 | ! Starting 10 instruction Store Burst | |
18495 | ! %l4 = ffffffffff000000, Mem[0000000010181400] = ffffc4ffffffffff | |
18496 | stxa %l4,[%i6+%g0]0x88 ! Mem[0000000010181400] = ffffffffff000000 | |
18497 | ||
18498 | p0_label_444: | |
18499 | ! Mem[0000000010001410] = 00000000, %l1 = 0000000000000000 | |
18500 | swapa [%i0+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
18501 | membar #Sync ! Added by membar checker (76) | |
18502 | ! %f6 = ffffffff, Mem[0000000030141410] = 00000000 | |
18503 | sta %f6 ,[%i5+%o5]0x81 ! Mem[0000000030141410] = ffffffff | |
18504 | ! Mem[0000000010041400] = ff0023e3, %l6 = 00000000ffc4c676 | |
18505 | ldstuba [%i1+%g0]0x80,%l6 ! %l6 = 000000ff000000ff | |
18506 | ! %l0 = 000000ff, %l1 = 00000000, Mem[0000000010081408] = 00000000 00000000 | |
18507 | stda %l0,[%i2+%o4]0x80 ! Mem[0000000010081408] = 000000ff 00000000 | |
18508 | ! Mem[0000000030041410] = 000000ff, %l1 = 0000000000000000 | |
18509 | swapa [%i1+%o5]0x89,%l1 ! %l1 = 00000000000000ff | |
18510 | ! %f18 = 000000ff ff000000, %l5 = 000000002164159c | |
18511 | ! Mem[0000000010081438] = fc0000ff00000000 | |
18512 | add %i2,0x038,%g1 | |
18513 | stda %f18,[%g1+%l5]ASI_PST8_PL ! Mem[0000000010081438] = fc0000ffff000000 | |
18514 | ! %l2 = 00000000, %l3 = 0000ffff, Mem[0000000030101408] = 00000000 00000076 | |
18515 | stda %l2,[%i4+%o4]0x81 ! Mem[0000000030101408] = 00000000 0000ffff | |
18516 | ! Mem[0000000010141414] = 4e00ffff, %l7 = ffffffffffffffff | |
18517 | ldstuba [%i5+0x014]%asi,%l7 ! %l7 = 0000004e000000ff | |
18518 | ! %l2 = 0000000000000000, Mem[0000000030101400] = 00000000 | |
18519 | stwa %l2,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 | |
18520 | ! Starting 10 instruction Load Burst | |
18521 | ! Mem[00000000300c1408] = 000000ff, %l6 = 00000000000000ff | |
18522 | ldsha [%i3+%o4]0x89,%l6 ! %l6 = 00000000000000ff | |
18523 | ||
18524 | p0_label_445: | |
18525 | ! Mem[00000000100c1438] = ff000000, %l3 = 000000000000ffff | |
18526 | lduba [%i3+0x039]%asi,%l3 ! %l3 = 0000000000000000 | |
18527 | ! Mem[00000000300c1408] = ffff0000000000ff, %l2 = 0000000000000000 | |
18528 | ldxa [%i3+%o4]0x89,%l2 ! %l2 = ffff0000000000ff | |
18529 | ! Mem[0000000030081410] = 000000ff, %l2 = ffff0000000000ff | |
18530 | ldswa [%i2+%o5]0x89,%l2 ! %l2 = 00000000000000ff | |
18531 | ! Mem[0000000010001400] = 000000ff, %l2 = 00000000000000ff | |
18532 | ldsha [%i0+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
18533 | ! Mem[0000000010181408] = 0000000076c6c4ff, %f20 = 00000000 00000000 | |
18534 | ldda [%i6+%o4]0x88,%f20 ! %f20 = 00000000 76c6c4ff | |
18535 | ! Mem[00000000300c1410] = ff000076, %l5 = 000000002164159c | |
18536 | ldswa [%i3+%o5]0x81,%l5 ! %l5 = ffffffffff000076 | |
18537 | ! Mem[0000000010081410] = 00000000, %l2 = 00000000000000ff | |
18538 | ldsha [%i2+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
18539 | ! Mem[0000000010141400] = ffffffff, %l0 = 00000000000000ff | |
18540 | lduha [%i5+%g0]0x88,%l0 ! %l0 = 000000000000ffff | |
18541 | ! Mem[0000000030001410] = 00000000, %l3 = 0000000000000000 | |
18542 | ldsha [%i0+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
18543 | ! Starting 10 instruction Store Burst | |
18544 | ! %f18 = 000000ff, Mem[0000000010001410] = 00000000 | |
18545 | sta %f18,[%i0+%o5]0x80 ! Mem[0000000010001410] = 000000ff | |
18546 | ||
18547 | ! Check Point 89 for processor 0 | |
18548 | ||
18549 | set p0_check_pt_data_89,%g4 | |
18550 | rd %ccr,%g5 ! %g5 = 44 | |
18551 | ldx [%g4+0x08],%g2 | |
18552 | cmp %l0,%g2 ! %l0 = 000000000000ffff | |
18553 | bne %xcc,p0_reg_check_fail0 | |
18554 | mov 0xee0,%g1 | |
18555 | ldx [%g4+0x10],%g2 | |
18556 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
18557 | bne %xcc,p0_reg_check_fail1 | |
18558 | mov 0xee1,%g1 | |
18559 | ldx [%g4+0x18],%g2 | |
18560 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
18561 | bne %xcc,p0_reg_check_fail2 | |
18562 | mov 0xee2,%g1 | |
18563 | ldx [%g4+0x20],%g2 | |
18564 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
18565 | bne %xcc,p0_reg_check_fail3 | |
18566 | mov 0xee3,%g1 | |
18567 | ldx [%g4+0x28],%g2 | |
18568 | cmp %l4,%g2 ! %l4 = ffffffffff000000 | |
18569 | bne %xcc,p0_reg_check_fail4 | |
18570 | mov 0xee4,%g1 | |
18571 | ldx [%g4+0x30],%g2 | |
18572 | cmp %l5,%g2 ! %l5 = ffffffffff000076 | |
18573 | bne %xcc,p0_reg_check_fail5 | |
18574 | mov 0xee5,%g1 | |
18575 | ldx [%g4+0x38],%g2 | |
18576 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
18577 | bne %xcc,p0_reg_check_fail6 | |
18578 | mov 0xee6,%g1 | |
18579 | ldx [%g4+0x40],%g2 | |
18580 | cmp %l7,%g2 ! %l7 = 000000000000004e | |
18581 | bne %xcc,p0_reg_check_fail7 | |
18582 | mov 0xee7,%g1 | |
18583 | ldx [%g4+0x48],%g3 | |
18584 | std %f2,[%g4] | |
18585 | ldx [%g4],%g2 | |
18586 | cmp %g3,%g2 ! %f2 = 0000ffff 00000076 | |
18587 | bne %xcc,p0_freg_check_fail | |
18588 | mov 0xf02,%g1 | |
18589 | ldx [%g4+0x50],%g3 | |
18590 | std %f4,[%g4] | |
18591 | ldx [%g4],%g2 | |
18592 | cmp %g3,%g2 ! %f4 = 76000000 00000000 | |
18593 | bne %xcc,p0_freg_check_fail | |
18594 | mov 0xf04,%g1 | |
18595 | ldx [%g4+0x58],%g3 | |
18596 | std %f6,[%g4] | |
18597 | ldx [%g4],%g2 | |
18598 | cmp %g3,%g2 ! %f6 = ffffffff 12000000 | |
18599 | bne %xcc,p0_freg_check_fail | |
18600 | mov 0xf06,%g1 | |
18601 | ldx [%g4+0x60],%g3 | |
18602 | std %f14,[%g4] | |
18603 | ldx [%g4],%g2 | |
18604 | cmp %g3,%g2 ! %f14 = 159c0000 00000000 | |
18605 | bne %xcc,p0_freg_check_fail | |
18606 | mov 0xf14,%g1 | |
18607 | ldx [%g4+0x68],%g3 | |
18608 | std %f16,[%g4] | |
18609 | ldx [%g4],%g2 | |
18610 | cmp %g3,%g2 ! %f16 = ffffffff 0000ffff | |
18611 | bne %xcc,p0_freg_check_fail | |
18612 | mov 0xf16,%g1 | |
18613 | ldx [%g4+0x70],%g3 | |
18614 | std %f18,[%g4] | |
18615 | ldx [%g4],%g2 | |
18616 | cmp %g3,%g2 ! %f18 = 000000ff ff000000 | |
18617 | bne %xcc,p0_freg_check_fail | |
18618 | mov 0xf18,%g1 | |
18619 | ldx [%g4+0x78],%g3 | |
18620 | std %f20,[%g4] | |
18621 | ldx [%g4],%g2 | |
18622 | cmp %g3,%g2 ! %f20 = 00000000 76c6c4ff | |
18623 | bne %xcc,p0_freg_check_fail | |
18624 | mov 0xf20,%g1 | |
18625 | ldx [%g4+0x80],%g3 | |
18626 | std %f22,[%g4] | |
18627 | ldx [%g4],%g2 | |
18628 | cmp %g3,%g2 ! %f22 = ff000000 174573fc | |
18629 | bne %xcc,p0_freg_check_fail | |
18630 | mov 0xf22,%g1 | |
18631 | ldx [%g4+0x88],%g3 | |
18632 | std %f24,[%g4] | |
18633 | ldx [%g4],%g2 | |
18634 | cmp %g3,%g2 ! %f24 = 9c156421 76ff411f | |
18635 | bne %xcc,p0_freg_check_fail | |
18636 | mov 0xf24,%g1 | |
18637 | ldx [%g4+0x90],%g3 | |
18638 | std %f26,[%g4] | |
18639 | ldx [%g4],%g2 | |
18640 | cmp %g3,%g2 ! %f26 = 00acffff 90e83937 | |
18641 | bne %xcc,p0_freg_check_fail | |
18642 | mov 0xf26,%g1 | |
18643 | ldx [%g4+0x98],%g3 | |
18644 | std %f28,[%g4] | |
18645 | ldx [%g4],%g2 | |
18646 | cmp %g3,%g2 ! %f28 = 00940000 000000ff | |
18647 | bne %xcc,p0_freg_check_fail | |
18648 | mov 0xf28,%g1 | |
18649 | ldx [%g4+0xa0],%g3 | |
18650 | std %f30,[%g4] | |
18651 | ldx [%g4],%g2 | |
18652 | cmp %g3,%g2 ! %f30 = 10ac7b59 3eda2778 | |
18653 | bne %xcc,p0_freg_check_fail | |
18654 | mov 0xf30,%g1 | |
18655 | ||
18656 | ! Check Point 89 completed | |
18657 | ||
18658 | ||
18659 | p0_label_446: | |
18660 | ! %l5 = ffffffffff000076, Mem[0000000030141410] = 00000000ffffffff | |
18661 | stxa %l5,[%i5+%o5]0x89 ! Mem[0000000030141410] = ffffffffff000076 | |
18662 | ! %l1 = 00000000000000ff, Mem[00000000100c1410] = 3eda2778 | |
18663 | stha %l1,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 3eda00ff | |
18664 | ! %l0 = 0000ffff, %l1 = 000000ff, Mem[0000000010001410] = 000000ff 00000000 | |
18665 | stda %l0,[%i0+%o5]0x80 ! Mem[0000000010001410] = 0000ffff 000000ff | |
18666 | ! Mem[0000000030141408] = ff000000, %l4 = ffffffffff000000 | |
18667 | ldstuba [%i5+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
18668 | ! Mem[0000000030081410] = ff00000000000076, %l3 = 0000000000000000 | |
18669 | ldxa [%i2+%o5]0x81,%l3 ! %l3 = ff00000000000076 | |
18670 | ! %f30 = 10ac7b59, Mem[0000000030001408] = 0000ff03 | |
18671 | sta %f30,[%i0+%o4]0x81 ! Mem[0000000030001408] = 10ac7b59 | |
18672 | ! Mem[0000000030001408] = 597bac10, %l5 = ffffffffff000076 | |
18673 | swapa [%i0+%o4]0x89,%l5 ! %l5 = 00000000597bac10 | |
18674 | ! Mem[0000000030041408] = 9dffffff, %l2 = 0000000000000000 | |
18675 | swapa [%i1+%o4]0x89,%l2 ! %l2 = 000000009dffffff | |
18676 | ! %l6 = 00000000000000ff, Mem[00000000100c1408] = 0000ff000000ffff | |
18677 | stxa %l6,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000000000ff | |
18678 | ! Starting 10 instruction Load Burst | |
18679 | ! Mem[0000000030041400] = ffc4c676 000000ff, %l6 = 000000ff, %l7 = 0000004e | |
18680 | ldda [%i1+%g0]0x89,%l6 ! %l6 = 00000000000000ff 00000000ffc4c676 | |
18681 | ||
18682 | p0_label_447: | |
18683 | ! Mem[0000000010081410] = 00000000, %l7 = 00000000ffc4c676 | |
18684 | lduh [%i2+0x012],%l7 ! %l7 = 0000000000000000 | |
18685 | ! Mem[0000000030101410] = ff000000, %l0 = 000000000000ffff | |
18686 | ldsha [%i4+%o5]0x89,%l0 ! %l0 = 0000000000000000 | |
18687 | ! Mem[0000000010001400] = ff000000ff000000, %f14 = 159c0000 00000000 | |
18688 | ldd [%i0+%g0],%f14 ! %f14 = ff000000 ff000000 | |
18689 | ! Mem[0000000010041408] = ff0023e3, %l7 = 0000000000000000 | |
18690 | lduba [%i1+%o4]0x88,%l7 ! %l7 = 00000000000000e3 | |
18691 | ! Mem[0000000030041408] = 00000000, %l1 = 00000000000000ff | |
18692 | lduba [%i1+%o4]0x81,%l1 ! %l1 = 0000000000000000 | |
18693 | ! Mem[0000000010101410] = 174573fc, %l2 = 000000009dffffff | |
18694 | ldswa [%i4+%o5]0x80,%l2 ! %l2 = 00000000174573fc | |
18695 | ! Mem[0000000030181400] = 57793d9d00000000, %l0 = 0000000000000000 | |
18696 | ldxa [%i6+%g0]0x81,%l0 ! %l0 = 57793d9d00000000 | |
18697 | ! Mem[0000000010181400] = 000000ff, %l0 = 57793d9d00000000 | |
18698 | lduha [%i6+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
18699 | ! Mem[0000000010141400] = ffffffff, %l1 = 0000000000000000 | |
18700 | ldsha [%i5+%g0]0x80,%l1 ! %l1 = ffffffffffffffff | |
18701 | ! Starting 10 instruction Store Burst | |
18702 | ! %f28 = 00940000 000000ff, Mem[0000000030141400] = ffff0000 ffffffff | |
18703 | stda %f28,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00940000 000000ff | |
18704 | ||
18705 | p0_label_448: | |
18706 | ! %l4 = 00000000, %l5 = 597bac10, Mem[0000000010001408] = 0000008f ff030000 | |
18707 | stda %l4,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000000 597bac10 | |
18708 | ! %f30 = 10ac7b59 3eda2778, Mem[0000000030181400] = 57793d9d 00000000 | |
18709 | stda %f30,[%i6+%g0]0x81 ! Mem[0000000030181400] = 10ac7b59 3eda2778 | |
18710 | ! %l2 = 174573fc, %l3 = 00000076, Mem[00000000100c1428] = 00000000 00000000 | |
18711 | std %l2,[%i3+0x028] ! Mem[00000000100c1428] = 174573fc 00000076 | |
18712 | ! %f0 = ff793d9d, Mem[0000000030181410] = ffffffff | |
18713 | sta %f0 ,[%i6+%o5]0x81 ! Mem[0000000030181410] = ff793d9d | |
18714 | ! Mem[00000000100c141b] = 1f41ff76, %l0 = 0000000000000000 | |
18715 | ldstub [%i3+0x01b],%l0 ! %l0 = 00000076000000ff | |
18716 | ! %l2 = 174573fc, %l3 = 00000076, Mem[0000000030001410] = 00000000 3eda2778 | |
18717 | stda %l2,[%i0+%o5]0x81 ! Mem[0000000030001410] = 174573fc 00000076 | |
18718 | ! %f17 = 0000ffff, Mem[0000000010181400] = ff000000 | |
18719 | sta %f17,[%i6+%g0]0x88 ! Mem[0000000010181400] = 0000ffff | |
18720 | ! %l0 = 0000000000000076, imm = fffffffffffff48b, %l3 = ff00000000000076 | |
18721 | andn %l0,-0xb75,%l3 ! %l3 = 0000000000000074 | |
18722 | ! Mem[00000000201c0001] = ff799457, %l0 = 0000000000000076 | |
18723 | ldstuba [%o0+0x001]%asi,%l0 ! %l0 = 00000079000000ff | |
18724 | ! Starting 10 instruction Load Burst | |
18725 | ! Mem[0000000030181410] = ff793d9d ff000000, %l4 = 00000000, %l5 = 597bac10 | |
18726 | ldda [%i6+%o5]0x81,%l4 ! %l4 = 00000000ff793d9d 00000000ff000000 | |
18727 | ||
18728 | p0_label_449: | |
18729 | ! Mem[00000000211c0000] = 00ff1a4c, %l2 = 00000000174573fc | |
18730 | ldsh [%o2+%g0],%l2 ! %l2 = 00000000000000ff | |
18731 | ! Mem[0000000030141400] = 00940000, %l6 = 00000000000000ff | |
18732 | ldswa [%i5+%g0]0x81,%l6 ! %l6 = 0000000000940000 | |
18733 | ! Mem[0000000010101400] = 00000000, %l3 = 0000000000000074 | |
18734 | ldsba [%i4+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
18735 | ! Mem[0000000030041410] = 00000000000000ff, %l6 = 0000000000940000 | |
18736 | ldxa [%i1+%o5]0x81,%l6 ! %l6 = 00000000000000ff | |
18737 | ! Mem[0000000010181428] = ff00ff00c238965e, %f28 = 00940000 000000ff | |
18738 | ldd [%i6+0x028],%f28 ! %f28 = ff00ff00 c238965e | |
18739 | ! Mem[0000000030181400] = 10ac7b59, %l4 = 00000000ff793d9d | |
18740 | lduwa [%i6+%g0]0x81,%l4 ! %l4 = 0000000010ac7b59 | |
18741 | ! Mem[0000000030001408] = 760000ff, %l0 = 0000000000000079 | |
18742 | ldswa [%i0+%o4]0x81,%l0 ! %l0 = 00000000760000ff | |
18743 | ! Mem[00000000100c1410] = ff00da3e, %l4 = 0000000010ac7b59 | |
18744 | lduha [%i3+%o5]0x80,%l4 ! %l4 = 000000000000ff00 | |
18745 | ! Mem[0000000010101430] = 00000000, %l2 = 00000000000000ff | |
18746 | lduwa [%i4+0x030]%asi,%l2 ! %l2 = 0000000000000000 | |
18747 | ! Starting 10 instruction Store Burst | |
18748 | ! %f11 = 00009c15, Mem[0000000030081400] = ff000000 | |
18749 | sta %f11,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00009c15 | |
18750 | ||
18751 | p0_label_450: | |
18752 | ! %f2 = 0000ffff 00000076, %l2 = 0000000000000000 | |
18753 | ! Mem[0000000030141408] = ff0000ffff000000 | |
18754 | add %i5,0x008,%g1 | |
18755 | stda %f2,[%g1+%l2]ASI_PST16_S ! Mem[0000000030141408] = ff0000ffff000000 | |
18756 | ! Mem[0000000030001408] = 760000ff, %l2 = 0000000000000000 | |
18757 | ldstuba [%i0+%o4]0x81,%l2 ! %l2 = 00000076000000ff | |
18758 | ! %l7 = 00000000000000e3, Mem[0000000030041400] = ff000000 | |
18759 | stha %l7,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00e30000 | |
18760 | ! %f4 = 76000000 00000000, Mem[0000000010081438] = fc0000ff ff000000 | |
18761 | std %f4 ,[%i2+0x038] ! Mem[0000000010081438] = 76000000 00000000 | |
18762 | ! %l7 = 00000000000000e3, Mem[0000000030081408] = 7600000000000000 | |
18763 | stxa %l7,[%i2+%o4]0x81 ! Mem[0000000030081408] = 00000000000000e3 | |
18764 | ! Mem[0000000010041400] = e32300ff, %l5 = 00000000ff000000 | |
18765 | swapa [%i1+%g0]0x88,%l5 ! %l5 = 00000000e32300ff | |
18766 | ! %l1 = ffffffffffffffff, Mem[0000000030181400] = 10ac7b593eda2778 | |
18767 | stxa %l1,[%i6+%g0]0x81 ! Mem[0000000030181400] = ffffffffffffffff | |
18768 | ! %f31 = 3eda2778, Mem[0000000030041400] = 0000e300 | |
18769 | sta %f31,[%i1+%g0]0x89 ! Mem[0000000030041400] = 3eda2778 | |
18770 | ! Mem[0000000021800100] = a3ff11d1, %l7 = 00000000000000e3 | |
18771 | ldstub [%o3+0x100],%l7 ! %l7 = 000000a3000000ff | |
18772 | ! Starting 10 instruction Load Burst | |
18773 | ! Mem[0000000010081400] = 000000ff, %f16 = ffffffff | |
18774 | lda [%i2+%g0]0x88,%f16 ! %f16 = 000000ff | |
18775 | ||
18776 | ! Check Point 90 for processor 0 | |
18777 | ||
18778 | set p0_check_pt_data_90,%g4 | |
18779 | rd %ccr,%g5 ! %g5 = 44 | |
18780 | ldx [%g4+0x08],%g2 | |
18781 | cmp %l0,%g2 ! %l0 = 00000000760000ff | |
18782 | bne %xcc,p0_reg_check_fail0 | |
18783 | mov 0xee0,%g1 | |
18784 | ldx [%g4+0x10],%g2 | |
18785 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
18786 | bne %xcc,p0_reg_check_fail1 | |
18787 | mov 0xee1,%g1 | |
18788 | ldx [%g4+0x18],%g2 | |
18789 | cmp %l2,%g2 ! %l2 = 0000000000000076 | |
18790 | bne %xcc,p0_reg_check_fail2 | |
18791 | mov 0xee2,%g1 | |
18792 | ldx [%g4+0x20],%g2 | |
18793 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
18794 | bne %xcc,p0_reg_check_fail3 | |
18795 | mov 0xee3,%g1 | |
18796 | ldx [%g4+0x28],%g2 | |
18797 | cmp %l4,%g2 ! %l4 = 000000000000ff00 | |
18798 | bne %xcc,p0_reg_check_fail4 | |
18799 | mov 0xee4,%g1 | |
18800 | ldx [%g4+0x30],%g2 | |
18801 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
18802 | bne %xcc,p0_reg_check_fail6 | |
18803 | mov 0xee6,%g1 | |
18804 | ldx [%g4+0x38],%g2 | |
18805 | cmp %l7,%g2 ! %l7 = 00000000000000a3 | |
18806 | bne %xcc,p0_reg_check_fail7 | |
18807 | mov 0xee7,%g1 | |
18808 | ldx [%g4+0x40],%g3 | |
18809 | std %f4,[%g4] | |
18810 | ldx [%g4],%g2 | |
18811 | cmp %g3,%g2 ! %f4 = 76000000 00000000 | |
18812 | bne %xcc,p0_freg_check_fail | |
18813 | mov 0xf04,%g1 | |
18814 | ldx [%g4+0x48],%g3 | |
18815 | std %f6,[%g4] | |
18816 | ldx [%g4],%g2 | |
18817 | cmp %g3,%g2 ! %f6 = ffffffff 12000000 | |
18818 | bne %xcc,p0_freg_check_fail | |
18819 | mov 0xf06,%g1 | |
18820 | ldx [%g4+0x50],%g3 | |
18821 | std %f14,[%g4] | |
18822 | ldx [%g4],%g2 | |
18823 | cmp %g3,%g2 ! %f14 = ff000000 ff000000 | |
18824 | bne %xcc,p0_freg_check_fail | |
18825 | mov 0xf14,%g1 | |
18826 | ldx [%g4+0x58],%g3 | |
18827 | std %f16,[%g4] | |
18828 | ldx [%g4],%g2 | |
18829 | cmp %g3,%g2 ! %f16 = 000000ff 0000ffff | |
18830 | bne %xcc,p0_freg_check_fail | |
18831 | mov 0xf16,%g1 | |
18832 | ldx [%g4+0x60],%g3 | |
18833 | std %f28,[%g4] | |
18834 | ldx [%g4],%g2 | |
18835 | cmp %g3,%g2 ! %f28 = ff00ff00 c238965e | |
18836 | bne %xcc,p0_freg_check_fail | |
18837 | mov 0xf28,%g1 | |
18838 | ||
18839 | ! Check Point 90 completed | |
18840 | ||
18841 | ||
18842 | p0_label_451: | |
18843 | ! Mem[0000000010081408] = ff000000, %l3 = 0000000000000000 | |
18844 | ldsha [%i2+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
18845 | ! Mem[0000000030141410] = 760000ffffffffff, %l5 = 00000000e32300ff | |
18846 | ldxa [%i5+%o5]0x81,%l5 ! %l5 = 760000ffffffffff | |
18847 | ! Mem[0000000010141420] = 000000ff, %l2 = 0000000000000076 | |
18848 | ldsw [%i5+0x020],%l2 ! %l2 = 00000000000000ff | |
18849 | ! Mem[0000000010001410] = ffff0000, %l0 = 00000000760000ff | |
18850 | lduwa [%i0+%o5]0x88,%l0 ! %l0 = 00000000ffff0000 | |
18851 | ! Mem[0000000030101410] = 7827da3eff000000, %l2 = 00000000000000ff | |
18852 | ldxa [%i4+%o5]0x89,%l2 ! %l2 = 7827da3eff000000 | |
18853 | ! Mem[00000000218000c0] = ffff8d82, %l2 = 7827da3eff000000 | |
18854 | ldsh [%o3+0x0c0],%l2 ! %l2 = ffffffffffffffff | |
18855 | ! %f25 = 76ff411f, Mem[0000000010041410] = 00000079 | |
18856 | sta %f25,[%i1+%o5]0x88 ! Mem[0000000010041410] = 76ff411f | |
18857 | ! Mem[0000000030041410] = ff000000 00000000, %l6 = 000000ff, %l7 = 000000a3 | |
18858 | ldda [%i1+%o5]0x89,%l6 ! %l6 = 0000000000000000 00000000ff000000 | |
18859 | ! Mem[0000000010041410] = 1f41ff76, %l6 = 0000000000000000 | |
18860 | lduba [%i1+%o5]0x80,%l6 ! %l6 = 000000000000001f | |
18861 | ! Starting 10 instruction Store Burst | |
18862 | ! %l6 = 000000000000001f, Mem[0000000030181410] = ff793d9dff000000 | |
18863 | stxa %l6,[%i6+%o5]0x81 ! Mem[0000000030181410] = 000000000000001f | |
18864 | ||
18865 | p0_label_452: | |
18866 | ! %f2 = 0000ffff 00000076, Mem[0000000010181408] = ffc4c676 00000000 | |
18867 | stda %f2 ,[%i6+%o4]0x80 ! Mem[0000000010181408] = 0000ffff 00000076 | |
18868 | ! Mem[0000000010001413] = 0000ffff, %l5 = 760000ffffffffff | |
18869 | ldstub [%i0+0x013],%l5 ! %l5 = 000000ff000000ff | |
18870 | ! Mem[0000000010081400] = 000000ff, %l6 = 000000000000001f | |
18871 | ldstuba [%i2+%g0]0x88,%l6 ! %l6 = 000000ff000000ff | |
18872 | ! Mem[0000000030001408] = ff0000ff, %l5 = 00000000000000ff | |
18873 | swapa [%i0+%o4]0x89,%l5 ! %l5 = 00000000ff0000ff | |
18874 | ! %l5 = 00000000ff0000ff, Mem[00000000201c0000] = ffff9457 | |
18875 | sth %l5,[%o0+%g0] ! Mem[00000000201c0000] = 00ff9457 | |
18876 | ! %f22 = ff000000 174573fc, Mem[0000000010041410] = 76ff411f 00000076 | |
18877 | stda %f22,[%i1+%o5]0x88 ! Mem[0000000010041410] = ff000000 174573fc | |
18878 | ! %f2 = 0000ffff 00000076, Mem[0000000030101410] = 000000ff 3eda2778 | |
18879 | stda %f2 ,[%i4+%o5]0x81 ! Mem[0000000030101410] = 0000ffff 00000076 | |
18880 | ! %f0 = ff793d9d, Mem[0000000030181408] = 159c0000 | |
18881 | sta %f0 ,[%i6+%o4]0x89 ! Mem[0000000030181408] = ff793d9d | |
18882 | ! Mem[0000000010181410] = ffffffff, %l7 = 00000000ff000000 | |
18883 | ldstuba [%i6+%o5]0x80,%l7 ! %l7 = 000000ff000000ff | |
18884 | ! Starting 10 instruction Load Burst | |
18885 | ! Mem[0000000030041408] = 00000000, %f9 = ff000000 | |
18886 | lda [%i1+%o4]0x81,%f9 ! %f9 = 00000000 | |
18887 | ||
18888 | p0_label_453: | |
18889 | ! Mem[0000000030001400] = 00000000 8f000000, %l0 = ffff0000, %l1 = ffffffff | |
18890 | ldda [%i0+%g0]0x81,%l0 ! %l0 = 0000000000000000 000000008f000000 | |
18891 | ! Mem[0000000030081410] = ff000000 00000076, %l6 = 000000ff, %l7 = 000000ff | |
18892 | ldda [%i2+%o5]0x81,%l6 ! %l6 = 00000000ff000000 0000000000000076 | |
18893 | ! Mem[0000000010081424] = 00009c15, %f15 = ff000000 | |
18894 | ld [%i2+0x024],%f15 ! %f15 = 00009c15 | |
18895 | ! Mem[0000000030141410] = 760000ff, %l4 = 000000000000ff00 | |
18896 | lduba [%i5+%o5]0x81,%l4 ! %l4 = 0000000000000076 | |
18897 | ! Mem[00000000300c1408] = 000000ff, %l1 = 000000008f000000 | |
18898 | lduwa [%i3+%o4]0x89,%l1 ! %l1 = 00000000000000ff | |
18899 | ! Mem[0000000030101410] = ffff0000, %l7 = 0000000000000076 | |
18900 | ldsha [%i4+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
18901 | ! Mem[0000000010141408] = 00000000, %l0 = 0000000000000000 | |
18902 | lduba [%i5+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
18903 | ! Mem[0000000010081410] = 00000000c6000000, %l6 = 00000000ff000000 | |
18904 | ldxa [%i2+%o5]0x80,%l6 ! %l6 = 00000000c6000000 | |
18905 | ! Mem[0000000010081410] = 000000c600000000, %f12 = 00000000 000000ff | |
18906 | ldda [%i2+%o5]0x88,%f12 ! %f12 = 000000c6 00000000 | |
18907 | ! Starting 10 instruction Store Burst | |
18908 | ! %f13 = 00000000, Mem[0000000010041400] = ff000000 | |
18909 | sta %f13,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 | |
18910 | ||
18911 | p0_label_454: | |
18912 | ! %l6 = 00000000c6000000, Mem[00000000100c1400] = 000000ff | |
18913 | stwa %l6,[%i3+%g0]0x88 ! Mem[00000000100c1400] = c6000000 | |
18914 | ! Mem[0000000030181410] = 00000000, %l7 = 0000000000000000 | |
18915 | ldstuba [%i6+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
18916 | ! Mem[0000000030101410] = ffff0000, %l6 = 00000000c6000000 | |
18917 | swapa [%i4+%o5]0x89,%l6 ! %l6 = 00000000ffff0000 | |
18918 | ! %f12 = 000000c6 00000000, Mem[0000000010001410] = 0000ffff 000000ff | |
18919 | stda %f12,[%i0+%o5]0x80 ! Mem[0000000010001410] = 000000c6 00000000 | |
18920 | ! %l6 = 00000000ffff0000, Mem[0000000010001408] = 00000000 | |
18921 | stha %l6,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000000 | |
18922 | ! %l3 = 0000000000000000, Mem[0000000010041400] = 00000000 | |
18923 | stba %l3,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000000 | |
18924 | ! %f18 = 000000ff ff000000, Mem[0000000030081400] = 159c0000 000000ff | |
18925 | stda %f18,[%i2+%g0]0x89 ! Mem[0000000030081400] = 000000ff ff000000 | |
18926 | ! %l1 = 00000000000000ff, Mem[00000000300c1408] = 000000ff | |
18927 | stwa %l1,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 000000ff | |
18928 | ! Mem[00000000100c1410] = 3eda00ff, %l0 = 0000000000000000 | |
18929 | ldstuba [%i3+%o5]0x88,%l0 ! %l0 = 000000ff000000ff | |
18930 | ! Starting 10 instruction Load Burst | |
18931 | ! Mem[0000000010001410] = c6000000, %l0 = 00000000000000ff | |
18932 | ldswa [%i0+%o5]0x88,%l0 ! %l0 = ffffffffc6000000 | |
18933 | ||
18934 | p0_label_455: | |
18935 | ! Mem[0000000030001400] = 00000000, %l5 = 00000000ff0000ff | |
18936 | lduha [%i0+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
18937 | ! Mem[0000000030181400] = ffffffffffffffff, %f8 = ff000000 00000000 | |
18938 | ldda [%i6+%g0]0x81,%f8 ! %f8 = ffffffff ffffffff | |
18939 | ! Mem[0000000010141410] = ff0000ff, %f29 = c238965e | |
18940 | lda [%i5+%o5]0x88,%f29 ! %f29 = ff0000ff | |
18941 | ! Mem[0000000010181400] = 0000ffff, %l6 = 00000000ffff0000 | |
18942 | lduwa [%i6+%g0]0x88,%l6 ! %l6 = 000000000000ffff | |
18943 | ! Mem[00000000300c1410] = ff000076 ff000000, %l2 = ffffffff, %l3 = 00000000 | |
18944 | ldda [%i3+%o5]0x81,%l2 ! %l2 = 00000000ff000076 00000000ff000000 | |
18945 | ! Mem[0000000030001410] = 76000000fc734517, %f24 = 9c156421 76ff411f | |
18946 | ldda [%i0+%o5]0x89,%f24 ! %f24 = 76000000 fc734517 | |
18947 | ! Mem[0000000030041410] = 00000000, %l6 = 000000000000ffff | |
18948 | lduba [%i1+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
18949 | ! Mem[00000000100c1424] = 000000ff, %f31 = 3eda2778 | |
18950 | lda [%i3+0x024]%asi,%f31 ! %f31 = 000000ff | |
18951 | ! Mem[0000000010001400] = ff000000, %l4 = 0000000000000076 | |
18952 | lduha [%i0+%g0]0x80,%l4 ! %l4 = 000000000000ff00 | |
18953 | ! Starting 10 instruction Store Burst | |
18954 | ! %f11 = 00009c15, Mem[0000000010001400] = 000000ff | |
18955 | sta %f11,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00009c15 | |
18956 | ||
18957 | ! Check Point 91 for processor 0 | |
18958 | ||
18959 | set p0_check_pt_data_91,%g4 | |
18960 | rd %ccr,%g5 ! %g5 = 44 | |
18961 | ldx [%g4+0x08],%g2 | |
18962 | cmp %l0,%g2 ! %l0 = ffffffffc6000000 | |
18963 | bne %xcc,p0_reg_check_fail0 | |
18964 | mov 0xee0,%g1 | |
18965 | ldx [%g4+0x10],%g2 | |
18966 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
18967 | bne %xcc,p0_reg_check_fail1 | |
18968 | mov 0xee1,%g1 | |
18969 | ldx [%g4+0x18],%g2 | |
18970 | cmp %l2,%g2 ! %l2 = 00000000ff000076 | |
18971 | bne %xcc,p0_reg_check_fail2 | |
18972 | mov 0xee2,%g1 | |
18973 | ldx [%g4+0x20],%g2 | |
18974 | cmp %l3,%g2 ! %l3 = 00000000ff000000 | |
18975 | bne %xcc,p0_reg_check_fail3 | |
18976 | mov 0xee3,%g1 | |
18977 | ldx [%g4+0x28],%g2 | |
18978 | cmp %l4,%g2 ! %l4 = 000000000000ff00 | |
18979 | bne %xcc,p0_reg_check_fail4 | |
18980 | mov 0xee4,%g1 | |
18981 | ldx [%g4+0x30],%g2 | |
18982 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
18983 | bne %xcc,p0_reg_check_fail5 | |
18984 | mov 0xee5,%g1 | |
18985 | ldx [%g4+0x38],%g2 | |
18986 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
18987 | bne %xcc,p0_reg_check_fail6 | |
18988 | mov 0xee6,%g1 | |
18989 | ldx [%g4+0x40],%g2 | |
18990 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
18991 | bne %xcc,p0_reg_check_fail7 | |
18992 | mov 0xee7,%g1 | |
18993 | ldx [%g4+0x48],%g3 | |
18994 | std %f0,[%g4] | |
18995 | ldx [%g4],%g2 | |
18996 | cmp %g3,%g2 ! %f0 = ff793d9d ffffffff | |
18997 | bne %xcc,p0_freg_check_fail | |
18998 | mov 0xf00,%g1 | |
18999 | ldx [%g4+0x50],%g3 | |
19000 | std %f2,[%g4] | |
19001 | ldx [%g4],%g2 | |
19002 | cmp %g3,%g2 ! %f2 = 0000ffff 00000076 | |
19003 | bne %xcc,p0_freg_check_fail | |
19004 | mov 0xf02,%g1 | |
19005 | ldx [%g4+0x58],%g3 | |
19006 | std %f6,[%g4] | |
19007 | ldx [%g4],%g2 | |
19008 | cmp %g3,%g2 ! %f6 = ffffffff 12000000 | |
19009 | bne %xcc,p0_freg_check_fail | |
19010 | mov 0xf06,%g1 | |
19011 | ldx [%g4+0x60],%g3 | |
19012 | std %f8,[%g4] | |
19013 | ldx [%g4],%g2 | |
19014 | cmp %g3,%g2 ! %f8 = ffffffff ffffffff | |
19015 | bne %xcc,p0_freg_check_fail | |
19016 | mov 0xf08,%g1 | |
19017 | ldx [%g4+0x68],%g3 | |
19018 | std %f12,[%g4] | |
19019 | ldx [%g4],%g2 | |
19020 | cmp %g3,%g2 ! %f12 = 000000c6 00000000 | |
19021 | bne %xcc,p0_freg_check_fail | |
19022 | mov 0xf12,%g1 | |
19023 | ldx [%g4+0x70],%g3 | |
19024 | std %f14,[%g4] | |
19025 | ldx [%g4],%g2 | |
19026 | cmp %g3,%g2 ! %f14 = ff000000 00009c15 | |
19027 | bne %xcc,p0_freg_check_fail | |
19028 | mov 0xf14,%g1 | |
19029 | ldx [%g4+0x78],%g3 | |
19030 | std %f24,[%g4] | |
19031 | ldx [%g4],%g2 | |
19032 | cmp %g3,%g2 ! %f24 = 76000000 fc734517 | |
19033 | bne %xcc,p0_freg_check_fail | |
19034 | mov 0xf24,%g1 | |
19035 | ldx [%g4+0x80],%g3 | |
19036 | std %f28,[%g4] | |
19037 | ldx [%g4],%g2 | |
19038 | cmp %g3,%g2 ! %f28 = ff00ff00 ff0000ff | |
19039 | bne %xcc,p0_freg_check_fail | |
19040 | mov 0xf28,%g1 | |
19041 | ldx [%g4+0x88],%g3 | |
19042 | std %f30,[%g4] | |
19043 | ldx [%g4],%g2 | |
19044 | cmp %g3,%g2 ! %f30 = 10ac7b59 000000ff | |
19045 | bne %xcc,p0_freg_check_fail | |
19046 | mov 0xf30,%g1 | |
19047 | ||
19048 | ! Check Point 91 completed | |
19049 | ||
19050 | ||
19051 | p0_label_456: | |
19052 | ! %l2 = 00000000ff000076, Mem[0000000010081400] = ff000000 | |
19053 | stha %l2,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00760000 | |
19054 | ! %f0 = ff793d9d ffffffff, Mem[0000000030181408] = 9d3d79ff 9d3d79ff | |
19055 | stda %f0 ,[%i6+%o4]0x81 ! Mem[0000000030181408] = ff793d9d ffffffff | |
19056 | ! %l0 = c6000000, %l1 = 000000ff, Mem[0000000010181400] = 0000ffff ffffffff | |
19057 | stda %l0,[%i6+%g0]0x88 ! Mem[0000000010181400] = c6000000 000000ff | |
19058 | ! Mem[00000000100c1410] = 3eda00ff, %l2 = 00000000ff000076 | |
19059 | ldstuba [%i3+%o5]0x88,%l2 ! %l2 = 000000ff000000ff | |
19060 | ! Mem[0000000010141431] = 7a0000ff, %l6 = 0000000000000000 | |
19061 | ldstuba [%i5+0x031]%asi,%l6 ! %l6 = 00000000000000ff | |
19062 | ! %l0 = ffffffffc6000000, Mem[0000000010181408] = 0000ffff | |
19063 | stba %l0,[%i6+%o4]0x80 ! Mem[0000000010181408] = 0000ffff | |
19064 | ! Mem[0000000010081400] = 00760000, %l6 = 0000000000000000 | |
19065 | ldstuba [%i2+%g0]0x80,%l6 ! %l6 = 00000000000000ff | |
19066 | ! Mem[00000000100c1428] = 174573fc00000076, %l1 = 00000000000000ff, %l6 = 0000000000000000 | |
19067 | add %i3,0x28,%g1 | |
19068 | casxa [%g1]0x80,%l1,%l6 ! %l6 = 174573fc00000076 | |
19069 | ! %l0 = ffffffffc6000000, Mem[000000001008142a] = 00000000, %asi = 80 | |
19070 | stba %l0,[%i2+0x02a]%asi ! Mem[0000000010081428] = 00000000 | |
19071 | ! Starting 10 instruction Load Burst | |
19072 | ! Mem[0000000010001418] = 000000ff000000ff, %f8 = ffffffff ffffffff | |
19073 | ldda [%i0+0x018]%asi,%f8 ! %f8 = 000000ff 000000ff | |
19074 | ||
19075 | p0_label_457: | |
19076 | ! Mem[0000000030081410] = ff000000, %l6 = 174573fc00000076 | |
19077 | ldswa [%i2+%o5]0x81,%l6 ! %l6 = ffffffffff000000 | |
19078 | ! Code Fragment 3 | |
19079 | p0_fragment_17: | |
19080 | ! %l0 = ffffffffc6000000 | |
19081 | setx 0x3d178c7074ccf67e,%g7,%l0 ! %l0 = 3d178c7074ccf67e | |
19082 | ! %l1 = 00000000000000ff | |
19083 | setx 0xf1f5a677db597a9e,%g7,%l1 ! %l1 = f1f5a677db597a9e | |
19084 | setx 0x1fe000, %g1, %g3 | |
19085 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
19086 | setx 0x1ffff8, %g1, %g2 | |
19087 | and %l0, %g2, %l0 | |
19088 | ta T_CHANGE_HPRIV | |
19089 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
19090 | ta T_CHANGE_NONHPRIV | |
19091 | ! %l0 = 3d178c7074ccf67e | |
19092 | setx 0x1eb5b8e05bc63de8,%g7,%l0 ! %l0 = 1eb5b8e05bc63de8 | |
19093 | ! %l1 = f1f5a677db597a9e | |
19094 | setx 0x958ef8a7bccf36a4,%g7,%l1 ! %l1 = 958ef8a7bccf36a4 | |
19095 | ! Mem[0000000010101404] = 0000008f, %l7 = 0000000000000000 | |
19096 | ldsb [%i4+0x005],%l7 ! %l7 = 0000000000000000 | |
19097 | ! Mem[00000000211c0000] = 00ff1a4c, %l4 = 000000000000ff00 | |
19098 | lduba [%o2+0x000]%asi,%l4 ! %l4 = 0000000000000000 | |
19099 | ! Mem[00000000300c1400] = ffffffffff000000, %l3 = 00000000ff000000 | |
19100 | ldxa [%i3+%g0]0x89,%l3 ! %l3 = ffffffffff000000 | |
19101 | ! Mem[0000000010181400] = c6000000, %l5 = 0000000000000000 | |
19102 | ldsha [%i6+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
19103 | ! Mem[0000000030041410] = 00000000, %l1 = 958ef8a7bccf36a4 | |
19104 | ldsba [%i1+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
19105 | ! Mem[00000000211c0000] = 00ff1a4c, %l7 = 0000000000000000 | |
19106 | ldsha [%o2+0x000]%asi,%l7 ! %l7 = 00000000000000ff | |
19107 | ! Mem[0000000030181410] = ff000000, %l2 = 00000000000000ff | |
19108 | ldswa [%i6+%o5]0x81,%l2 ! %l2 = ffffffffff000000 | |
19109 | ! Starting 10 instruction Store Burst | |
19110 | ! Mem[0000000010101410] = fc734517, %l5 = 0000000000000000 | |
19111 | ldstuba [%i4+%o5]0x88,%l5 ! %l5 = 00000017000000ff | |
19112 | ||
19113 | p0_label_458: | |
19114 | ! %l1 = 0000000000000000, Mem[000000001014140c] = 00000000 | |
19115 | stw %l1,[%i5+0x00c] ! Mem[000000001014140c] = 00000000 | |
19116 | ! %l0 = 1eb5b8e05bc63de8, Mem[0000000030001410] = fc734517 | |
19117 | stba %l0,[%i0+%o5]0x89 ! Mem[0000000030001410] = fc7345e8 | |
19118 | ! %f1 = ffffffff, Mem[0000000010081410] = 00000000 | |
19119 | sta %f1 ,[%i2+%o5]0x80 ! Mem[0000000010081410] = ffffffff | |
19120 | ! Mem[00000000211c0001] = 00ff1a4c, %l6 = ffffffffff000000 | |
19121 | ldstuba [%o2+0x001]%asi,%l6 ! %l6 = 000000ff000000ff | |
19122 | ! %l2 = ff000000, %l3 = ff000000, Mem[0000000030001410] = e84573fc 00000076 | |
19123 | stda %l2,[%i0+%o5]0x81 ! Mem[0000000030001410] = ff000000 ff000000 | |
19124 | ! %f14 = ff000000 00009c15, Mem[0000000010041400] = 00000000 00009c15 | |
19125 | stda %f14,[%i1+%g0]0x80 ! Mem[0000000010041400] = ff000000 00009c15 | |
19126 | ! %l7 = 00000000000000ff, Mem[00000000100c1400] = 00000000c6000000 | |
19127 | stxa %l7,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 00000000000000ff | |
19128 | ! %l2 = ffffffffff000000, Mem[0000000010001400] = 000000ff00009c15 | |
19129 | stxa %l2,[%i0+%g0]0x88 ! Mem[0000000010001400] = ffffffffff000000 | |
19130 | ! Mem[0000000020800001] = ffff8470, %l3 = ffffffffff000000 | |
19131 | ldstuba [%o1+0x001]%asi,%l3 ! %l3 = 000000ff000000ff | |
19132 | ! Starting 10 instruction Load Burst | |
19133 | ! Mem[0000000010141410] = ff0000ff, %l2 = ffffffffff000000 | |
19134 | ldsba [%i5+%o5]0x88,%l2 ! %l2 = ffffffffffffffff | |
19135 | ||
19136 | p0_label_459: | |
19137 | ! Mem[00000000211c0000] = 00ff1a4c, %l3 = 00000000000000ff | |
19138 | ldsb [%o2+%g0],%l3 ! %l3 = 0000000000000000 | |
19139 | ! Mem[0000000020800000] = ffff8470, %l7 = 00000000000000ff | |
19140 | ldsb [%o1+0x001],%l7 ! %l7 = ffffffffffffffff | |
19141 | ! Mem[0000000010001410] = 00000000c6000000, %l4 = 0000000000000000 | |
19142 | ldxa [%i0+%o5]0x88,%l4 ! %l4 = 00000000c6000000 | |
19143 | ! Mem[0000000030041408] = ff00000000000000, %l3 = 0000000000000000 | |
19144 | ldxa [%i1+%o4]0x89,%l3 ! %l3 = ff00000000000000 | |
19145 | ! Mem[0000000010081410] = ffffffff, %l3 = ff00000000000000 | |
19146 | ldsha [%i2+%o5]0x80,%l3 ! %l3 = ffffffffffffffff | |
19147 | ! Mem[0000000020800040] = ffff7379, %l6 = 00000000000000ff | |
19148 | lduh [%o1+0x040],%l6 ! %l6 = 000000000000ffff | |
19149 | ! Mem[00000000211c0000] = 00ff1a4c, %l7 = ffffffffffffffff | |
19150 | ldub [%o2+%g0],%l7 ! %l7 = 0000000000000000 | |
19151 | ! Mem[0000000010001400] = ff000000, %l6 = 000000000000ffff | |
19152 | lduwa [%i0+%g0]0x88,%l6 ! %l6 = 00000000ff000000 | |
19153 | ! Mem[0000000010181400] = c6000000, %l1 = 0000000000000000 | |
19154 | ldsba [%i6+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
19155 | ! Starting 10 instruction Store Burst | |
19156 | ! %f2 = 0000ffff 00000076, Mem[0000000010001438] = ff00ffff ffffffff | |
19157 | stda %f2 ,[%i0+0x038]%asi ! Mem[0000000010001438] = 0000ffff 00000076 | |
19158 | ||
19159 | p0_label_460: | |
19160 | ! Mem[0000000010041400] = 000000ff, %l4 = 00000000c6000000 | |
19161 | ldstuba [%i1+%g0]0x88,%l4 ! %l4 = 000000ff000000ff | |
19162 | ! %f29 = ff0000ff, Mem[0000000030181410] = 000000ff | |
19163 | sta %f29,[%i6+%o5]0x89 ! Mem[0000000030181410] = ff0000ff | |
19164 | ! Mem[00000000201c0001] = 00ff9457, %l7 = 0000000000000000 | |
19165 | ldstub [%o0+0x001],%l7 ! %l7 = 000000ff000000ff | |
19166 | ! %f19 = ff000000, Mem[0000000010001400] = 000000ff | |
19167 | sta %f19,[%i0+%g0]0x80 ! Mem[0000000010001400] = ff000000 | |
19168 | ! Mem[00000000100c1430] = ffffffff00000000, %l3 = ffffffffffffffff, %l1 = 0000000000000000 | |
19169 | add %i3,0x30,%g1 | |
19170 | casxa [%g1]0x80,%l3,%l1 ! %l1 = ffffffff00000000 | |
19171 | ! %l3 = ffffffffffffffff, Mem[0000000030101410] = 000000c6 | |
19172 | stha %l3,[%i4+%o5]0x81 ! Mem[0000000030101410] = ffff00c6 | |
19173 | ! Mem[00000000100c1400] = ff000000, %l4 = 00000000000000ff | |
19174 | swapa [%i3+%g0]0x80,%l4 ! %l4 = 00000000ff000000 | |
19175 | ! %l6 = ff000000, %l7 = 000000ff, Mem[0000000010041410] = fc734517 000000ff | |
19176 | stda %l6,[%i1+%o5]0x80 ! Mem[0000000010041410] = ff000000 000000ff | |
19177 | ! %l5 = 0000000000000017, Mem[0000000030101400] = 00000000 | |
19178 | stha %l5,[%i4+%g0]0x89 ! Mem[0000000030101400] = 00000017 | |
19179 | ! Starting 10 instruction Load Burst | |
19180 | ! Mem[0000000010001410] = 000000c6, %l7 = 00000000000000ff | |
19181 | lduha [%i0+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
19182 | ||
19183 | ! Check Point 92 for processor 0 | |
19184 | ||
19185 | set p0_check_pt_data_92,%g4 | |
19186 | rd %ccr,%g5 ! %g5 = 44 | |
19187 | ldx [%g4+0x08],%g2 | |
19188 | cmp %l0,%g2 ! %l0 = 1eb5b8e05bc63de8 | |
19189 | bne %xcc,p0_reg_check_fail0 | |
19190 | mov 0xee0,%g1 | |
19191 | ldx [%g4+0x10],%g2 | |
19192 | cmp %l1,%g2 ! %l1 = ffffffff00000000 | |
19193 | bne %xcc,p0_reg_check_fail1 | |
19194 | mov 0xee1,%g1 | |
19195 | ldx [%g4+0x18],%g2 | |
19196 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
19197 | bne %xcc,p0_reg_check_fail2 | |
19198 | mov 0xee2,%g1 | |
19199 | ldx [%g4+0x20],%g2 | |
19200 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
19201 | bne %xcc,p0_reg_check_fail3 | |
19202 | mov 0xee3,%g1 | |
19203 | ldx [%g4+0x28],%g2 | |
19204 | cmp %l4,%g2 ! %l4 = 00000000ff000000 | |
19205 | bne %xcc,p0_reg_check_fail4 | |
19206 | mov 0xee4,%g1 | |
19207 | ldx [%g4+0x30],%g2 | |
19208 | cmp %l5,%g2 ! %l5 = 0000000000000017 | |
19209 | bne %xcc,p0_reg_check_fail5 | |
19210 | mov 0xee5,%g1 | |
19211 | ldx [%g4+0x38],%g2 | |
19212 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
19213 | bne %xcc,p0_reg_check_fail6 | |
19214 | mov 0xee6,%g1 | |
19215 | ldx [%g4+0x40],%g2 | |
19216 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
19217 | bne %xcc,p0_reg_check_fail7 | |
19218 | mov 0xee7,%g1 | |
19219 | ldx [%g4+0x48],%g3 | |
19220 | std %f8,[%g4] | |
19221 | ldx [%g4],%g2 | |
19222 | cmp %g3,%g2 ! %f8 = 000000ff 000000ff | |
19223 | bne %xcc,p0_freg_check_fail | |
19224 | mov 0xf08,%g1 | |
19225 | ||
19226 | ! Check Point 92 completed | |
19227 | ||
19228 | ||
19229 | p0_label_461: | |
19230 | ! Mem[0000000010001408] = 00000000, %l4 = 00000000ff000000 | |
19231 | lduba [%i0+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
19232 | ! Mem[0000000010081430] = 00000000000000ff, %f28 = ff00ff00 ff0000ff | |
19233 | ldda [%i2+0x030]%asi,%f28 ! %f28 = 00000000 000000ff | |
19234 | ! Mem[00000000100c1410] = 3eda00ff, %l6 = 00000000ff000000 | |
19235 | ldstuba [%i3+%o5]0x88,%l6 ! %l6 = 000000ff000000ff | |
19236 | ! Mem[0000000010081410] = ffffffff, %l7 = 0000000000000000 | |
19237 | ldsha [%i2+%o5]0x80,%l7 ! %l7 = ffffffffffffffff | |
19238 | ! Mem[00000000300c1400] = 000000ffffffffff, %f26 = 00acffff 90e83937 | |
19239 | ldda [%i3+%g0]0x81,%f26 ! %f26 = 000000ff ffffffff | |
19240 | ! Mem[0000000010101434] = 000000ff, %l1 = ffffffff00000000 | |
19241 | ldsb [%i4+0x036],%l1 ! %l1 = 0000000000000000 | |
19242 | ! Mem[0000000010101430] = 00000000, %l6 = 00000000000000ff | |
19243 | lduw [%i4+0x030],%l6 ! %l6 = 0000000000000000 | |
19244 | ! Mem[0000000030001408] = ff000000ffff0000, %l0 = 1eb5b8e05bc63de8 | |
19245 | ldxa [%i0+%o4]0x81,%l0 ! %l0 = ff000000ffff0000 | |
19246 | ! Mem[00000000100c1400] = 000000ff, %l3 = ffffffffffffffff | |
19247 | lduha [%i3+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
19248 | ! Starting 10 instruction Store Burst | |
19249 | ! %l2 = ffffffffffffffff, Mem[0000000010081400] = ff76000076ff411f | |
19250 | stx %l2,[%i2+%g0] ! Mem[0000000010081400] = ffffffffffffffff | |
19251 | ||
19252 | p0_label_462: | |
19253 | ! %l2 = ffffffffffffffff, Mem[00000000201c0000] = 00ff9457, %asi = 80 | |
19254 | stha %l2,[%o0+0x000]%asi ! Mem[00000000201c0000] = ffff9457 | |
19255 | ! Mem[00000000100c1410] = ff00da3e, %l1 = 0000000000000000 | |
19256 | swapa [%i3+%o5]0x80,%l1 ! %l1 = 00000000ff00da3e | |
19257 | ! %l7 = ffffffffffffffff, Mem[0000000010041410] = ff000000000000ff | |
19258 | stxa %l7,[%i1+%o5]0x80 ! Mem[0000000010041410] = ffffffffffffffff | |
19259 | ! %l5 = 0000000000000017, Mem[0000000010181410] = ffffffff | |
19260 | stwa %l5,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000017 | |
19261 | ! Mem[0000000010181400] = 000000c6, %l4 = 0000000000000000 | |
19262 | swapa [%i6+%g0]0x80,%l4 ! %l4 = 00000000000000c6 | |
19263 | ! %f22 = ff000000 174573fc, %l4 = 00000000000000c6 | |
19264 | ! Mem[0000000010141438] = 0000000000ff0000 | |
19265 | add %i5,0x038,%g1 | |
19266 | stda %f22,[%g1+%l4]ASI_PST16_PL ! Mem[0000000010141438] = 0000451700000000 | |
19267 | ! %f28 = 00000000 000000ff, Mem[0000000010041408] = ff0023e3 00000000 | |
19268 | stda %f28,[%i1+%o4]0x88 ! Mem[0000000010041408] = 00000000 000000ff | |
19269 | ! %f4 = 76000000, Mem[0000000010041400] = 000000ff | |
19270 | sta %f4 ,[%i1+%g0]0x88 ! Mem[0000000010041400] = 76000000 | |
19271 | ! Mem[0000000030081400] = ff000000, %l7 = ffffffffffffffff | |
19272 | swapa [%i2+%g0]0x89,%l7 ! %l7 = 00000000ff000000 | |
19273 | ! Starting 10 instruction Load Burst | |
19274 | ! Mem[0000000030001400] = 000000008f000000, %l5 = 0000000000000017 | |
19275 | ldxa [%i0+%g0]0x81,%l5 ! %l5 = 000000008f000000 | |
19276 | ||
19277 | p0_label_463: | |
19278 | ! Mem[000000001008142c] = 000000ff, %l2 = ffffffffffffffff | |
19279 | lduba [%i2+0x02f]%asi,%l2 ! %l2 = 00000000000000ff | |
19280 | ! Mem[0000000020800040] = ffff7379, %l4 = 00000000000000c6 | |
19281 | lduh [%o1+0x040],%l4 ! %l4 = 000000000000ffff | |
19282 | ! Mem[0000000030181408] = ffffffff 9d3d79ff, %l6 = 00000000, %l7 = ff000000 | |
19283 | ldda [%i6+%o4]0x89,%l6 ! %l6 = 000000009d3d79ff 00000000ffffffff | |
19284 | ! Mem[00000000300c1400] = ff000000, %l0 = ff000000ffff0000 | |
19285 | lduba [%i3+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
19286 | ! Mem[0000000010181400] = 00000000, %l6 = 000000009d3d79ff | |
19287 | ldsha [%i6+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
19288 | ! Mem[0000000010081400] = ffffffffffffffff, %f4 = 76000000 00000000 | |
19289 | ldda [%i2+%g0]0x88,%f4 ! %f4 = ffffffff ffffffff | |
19290 | ! Mem[0000000010041410] = ffffffff, %l3 = 0000000000000000 | |
19291 | ldswa [%i1+%o5]0x80,%l3 ! %l3 = ffffffffffffffff | |
19292 | ! Mem[0000000021800040] = 9c9c1df3, %l2 = 00000000000000ff | |
19293 | ldsba [%o3+0x040]%asi,%l2 ! %l2 = ffffffffffffff9c | |
19294 | ! Mem[00000000300c1400] = 000000ff, %l3 = ffffffffffffffff | |
19295 | ldsba [%i3+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
19296 | ! Starting 10 instruction Store Burst | |
19297 | ! Mem[0000000010141408] = 00000000, %l6 = 0000000000000000 | |
19298 | swap [%i5+%o4],%l6 ! %l6 = 0000000000000000 | |
19299 | ||
19300 | p0_label_464: | |
19301 | ! %l3 = 0000000000000000, Mem[0000000010181400] = 00000000ff000000 | |
19302 | stxa %l3,[%i6+%g0]0x80 ! Mem[0000000010181400] = 0000000000000000 | |
19303 | ! Mem[0000000010001422] = 00000000, %l1 = 00000000ff00da3e | |
19304 | ldstuba [%i0+0x022]%asi,%l1 ! %l1 = 00000000000000ff | |
19305 | ! Mem[0000000010041410] = ffffffff, %l0 = 0000000000000000 | |
19306 | ldstuba [%i1+%o5]0x88,%l0 ! %l0 = 000000ff000000ff | |
19307 | ! Mem[0000000010001400] = 000000ff, %l0 = 00000000000000ff | |
19308 | ldstuba [%i0+%g0]0x88,%l0 ! %l0 = 000000ff000000ff | |
19309 | ! %l0 = 00000000000000ff, Mem[0000000010141413] = ff0000ff, %asi = 80 | |
19310 | stba %l0,[%i5+0x013]%asi ! Mem[0000000010141410] = ff0000ff | |
19311 | ! Mem[0000000030081408] = 00000000, %l1 = 0000000000000000 | |
19312 | ldstuba [%i2+%o4]0x89,%l1 ! %l1 = 00000000000000ff | |
19313 | ! %l1 = 0000000000000000, Mem[00000000218000c0] = ffff8d82, %asi = 80 | |
19314 | stha %l1,[%o3+0x0c0]%asi ! Mem[00000000218000c0] = 00008d82 | |
19315 | ! Mem[0000000020800001] = ffff8470, %l1 = 0000000000000000 | |
19316 | ldstuba [%o1+0x001]%asi,%l1 ! %l1 = 000000ff000000ff | |
19317 | ! Mem[0000000010041410] = ffffffff, %l2 = ffffffffffffff9c | |
19318 | swapa [%i1+%o5]0x80,%l2 ! %l2 = 00000000ffffffff | |
19319 | ! Starting 10 instruction Load Burst | |
19320 | ! Mem[0000000010181400] = 00000000, %l3 = 0000000000000000 | |
19321 | ldsha [%i6+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
19322 | ||
19323 | p0_label_465: | |
19324 | ! Mem[0000000010141410] = ff0000ff ff00ffff, %l0 = 000000ff, %l1 = 000000ff | |
19325 | ldda [%i5+%o5]0x80,%l0 ! %l0 = 00000000ff0000ff 00000000ff00ffff | |
19326 | membar #Sync ! Added by membar checker (77) | |
19327 | ! Mem[0000000030141400] = 00940000 000000ff ff0000ff ff000000 | |
19328 | ! Mem[0000000030141410] = 760000ff ffffffff fc734517 000000ff | |
19329 | ! Mem[0000000030141420] = 1f41ff76 2164159c 3739e890 ffffac00 | |
19330 | ! Mem[0000000030141430] = ff000000 00009400 7827da3e 597bac10 | |
19331 | ldda [%i5]ASI_BLK_S,%f16 ! Block Load from 0000000030141400 | |
19332 | ! Mem[0000000010041410] = ffffff9cffffffff, %f12 = 000000c6 00000000 | |
19333 | ldda [%i1+%o5]0x80,%f12 ! %f12 = ffffff9c ffffffff | |
19334 | ! Mem[0000000030081408] = 000000ff, %l5 = 000000008f000000 | |
19335 | lduba [%i2+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
19336 | ! Mem[0000000030081410] = 000000ff, %f9 = 000000ff | |
19337 | lda [%i2+%o5]0x89,%f9 ! %f9 = 000000ff | |
19338 | ! Mem[0000000030141408] = ff0000ff, %l0 = 00000000ff0000ff | |
19339 | lduha [%i5+%o4]0x81,%l0 ! %l0 = 000000000000ff00 | |
19340 | ! Mem[0000000010141400] = ffffffff, %l7 = 00000000ffffffff | |
19341 | ldsba [%i5+%g0]0x88,%l7 ! %l7 = ffffffffffffffff | |
19342 | ! Mem[00000000100c1414] = 00000000, %l3 = 0000000000000000 | |
19343 | ldsb [%i3+0x016],%l3 ! %l3 = 0000000000000000 | |
19344 | ! Mem[00000000100c1408] = ff000000 00000000, %l6 = 00000000, %l7 = ffffffff | |
19345 | ldda [%i3+%o4]0x80,%l6 ! %l6 = 00000000ff000000 0000000000000000 | |
19346 | ! Starting 10 instruction Store Burst | |
19347 | ! Mem[0000000021800081] = ffffa433, %l5 = 00000000000000ff | |
19348 | ldstuba [%o3+0x081]%asi,%l5 ! %l5 = 000000ff000000ff | |
19349 | ||
19350 | ! Check Point 93 for processor 0 | |
19351 | ||
19352 | set p0_check_pt_data_93,%g4 | |
19353 | rd %ccr,%g5 ! %g5 = 44 | |
19354 | ldx [%g4+0x08],%g2 | |
19355 | cmp %l0,%g2 ! %l0 = 000000000000ff00 | |
19356 | bne %xcc,p0_reg_check_fail0 | |
19357 | mov 0xee0,%g1 | |
19358 | ldx [%g4+0x10],%g2 | |
19359 | cmp %l1,%g2 ! %l1 = 00000000ff00ffff | |
19360 | bne %xcc,p0_reg_check_fail1 | |
19361 | mov 0xee1,%g1 | |
19362 | ldx [%g4+0x18],%g2 | |
19363 | cmp %l2,%g2 ! %l2 = 00000000ffffffff | |
19364 | bne %xcc,p0_reg_check_fail2 | |
19365 | mov 0xee2,%g1 | |
19366 | ldx [%g4+0x20],%g2 | |
19367 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
19368 | bne %xcc,p0_reg_check_fail3 | |
19369 | mov 0xee3,%g1 | |
19370 | ldx [%g4+0x28],%g2 | |
19371 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
19372 | bne %xcc,p0_reg_check_fail4 | |
19373 | mov 0xee4,%g1 | |
19374 | ldx [%g4+0x30],%g2 | |
19375 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
19376 | bne %xcc,p0_reg_check_fail5 | |
19377 | mov 0xee5,%g1 | |
19378 | ldx [%g4+0x38],%g2 | |
19379 | cmp %l6,%g2 ! %l6 = 00000000ff000000 | |
19380 | bne %xcc,p0_reg_check_fail6 | |
19381 | mov 0xee6,%g1 | |
19382 | ldx [%g4+0x40],%g2 | |
19383 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
19384 | bne %xcc,p0_reg_check_fail7 | |
19385 | mov 0xee7,%g1 | |
19386 | ldx [%g4+0x48],%g3 | |
19387 | std %f0,[%g4] | |
19388 | ldx [%g4],%g2 | |
19389 | cmp %g3,%g2 ! %f0 = ff793d9d ffffffff | |
19390 | bne %xcc,p0_freg_check_fail | |
19391 | mov 0xf00,%g1 | |
19392 | ldx [%g4+0x50],%g3 | |
19393 | std %f4,[%g4] | |
19394 | ldx [%g4],%g2 | |
19395 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
19396 | bne %xcc,p0_freg_check_fail | |
19397 | mov 0xf04,%g1 | |
19398 | ldx [%g4+0x58],%g3 | |
19399 | std %f6,[%g4] | |
19400 | ldx [%g4],%g2 | |
19401 | cmp %g3,%g2 ! %f6 = ffffffff 12000000 | |
19402 | bne %xcc,p0_freg_check_fail | |
19403 | mov 0xf06,%g1 | |
19404 | ldx [%g4+0x60],%g3 | |
19405 | std %f8,[%g4] | |
19406 | ldx [%g4],%g2 | |
19407 | cmp %g3,%g2 ! %f8 = 000000ff 000000ff | |
19408 | bne %xcc,p0_freg_check_fail | |
19409 | mov 0xf08,%g1 | |
19410 | ldx [%g4+0x68],%g3 | |
19411 | std %f12,[%g4] | |
19412 | ldx [%g4],%g2 | |
19413 | cmp %g3,%g2 ! %f12 = ffffff9c ffffffff | |
19414 | bne %xcc,p0_freg_check_fail | |
19415 | mov 0xf12,%g1 | |
19416 | ldx [%g4+0x70],%g3 | |
19417 | std %f16,[%g4] | |
19418 | ldx [%g4],%g2 | |
19419 | cmp %g3,%g2 ! %f16 = 00940000 000000ff | |
19420 | bne %xcc,p0_freg_check_fail | |
19421 | mov 0xf16,%g1 | |
19422 | ldx [%g4+0x78],%g3 | |
19423 | std %f18,[%g4] | |
19424 | ldx [%g4],%g2 | |
19425 | cmp %g3,%g2 ! %f18 = ff0000ff ff000000 | |
19426 | bne %xcc,p0_freg_check_fail | |
19427 | mov 0xf18,%g1 | |
19428 | ldx [%g4+0x80],%g3 | |
19429 | std %f20,[%g4] | |
19430 | ldx [%g4],%g2 | |
19431 | cmp %g3,%g2 ! %f20 = 760000ff ffffffff | |
19432 | bne %xcc,p0_freg_check_fail | |
19433 | mov 0xf20,%g1 | |
19434 | ldx [%g4+0x88],%g3 | |
19435 | std %f22,[%g4] | |
19436 | ldx [%g4],%g2 | |
19437 | cmp %g3,%g2 ! %f22 = fc734517 000000ff | |
19438 | bne %xcc,p0_freg_check_fail | |
19439 | mov 0xf22,%g1 | |
19440 | ldx [%g4+0x90],%g3 | |
19441 | std %f24,[%g4] | |
19442 | ldx [%g4],%g2 | |
19443 | cmp %g3,%g2 ! %f24 = 1f41ff76 2164159c | |
19444 | bne %xcc,p0_freg_check_fail | |
19445 | mov 0xf24,%g1 | |
19446 | ldx [%g4+0x98],%g3 | |
19447 | std %f26,[%g4] | |
19448 | ldx [%g4],%g2 | |
19449 | cmp %g3,%g2 ! %f26 = 3739e890 ffffac00 | |
19450 | bne %xcc,p0_freg_check_fail | |
19451 | mov 0xf26,%g1 | |
19452 | ldx [%g4+0xa0],%g3 | |
19453 | std %f28,[%g4] | |
19454 | ldx [%g4],%g2 | |
19455 | cmp %g3,%g2 ! %f28 = ff000000 00009400 | |
19456 | bne %xcc,p0_freg_check_fail | |
19457 | mov 0xf28,%g1 | |
19458 | ldx [%g4+0xa8],%g3 | |
19459 | std %f30,[%g4] | |
19460 | ldx [%g4],%g2 | |
19461 | cmp %g3,%g2 ! %f30 = 7827da3e 597bac10 | |
19462 | bne %xcc,p0_freg_check_fail | |
19463 | mov 0xf30,%g1 | |
19464 | ||
19465 | ! Check Point 93 completed | |
19466 | ||
19467 | ||
19468 | p0_label_466: | |
19469 | ! %f22 = fc734517 000000ff, Mem[0000000010081410] = ffffffff 000000c6 | |
19470 | stda %f22,[%i2+%o5]0x88 ! Mem[0000000010081410] = fc734517 000000ff | |
19471 | ! Mem[0000000010001421] = 0000ff00, %l1 = 00000000ff00ffff | |
19472 | ldstub [%i0+0x021],%l1 ! %l1 = 00000000000000ff | |
19473 | ! %l4 = 000000000000ffff, Mem[00000000201c0000] = ffff9457, %asi = 80 | |
19474 | stha %l4,[%o0+0x000]%asi ! Mem[00000000201c0000] = ffff9457 | |
19475 | ! Mem[0000000030041400] = 3eda2778, %l6 = 00000000ff000000 | |
19476 | ldstuba [%i1+%g0]0x89,%l6 ! %l6 = 00000078000000ff | |
19477 | ! Mem[0000000021800140] = ffc61df6, %l2 = 00000000ffffffff | |
19478 | ldstuba [%o3+0x140]%asi,%l2 ! %l2 = 000000ff000000ff | |
19479 | ! Mem[0000000010141408] = 00000000, %l0 = 000000000000ff00 | |
19480 | swapa [%i5+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
19481 | ! %f13 = ffffffff, Mem[0000000030041410] = 00000000 | |
19482 | sta %f13,[%i1+%o5]0x81 ! Mem[0000000030041410] = ffffffff | |
19483 | ! %f2 = 0000ffff 00000076, %l0 = 0000000000000000 | |
19484 | ! Mem[0000000010081400] = ffffffffffffffff | |
19485 | stda %f2,[%i2+%l0]ASI_PST16_PL ! Mem[0000000010081400] = ffffffffffffffff | |
19486 | ! %l0 = 0000000000000000, Mem[0000000010041410] = 9cffffff | |
19487 | stwa %l0,[%i1+%o5]0x88 ! Mem[0000000010041410] = 00000000 | |
19488 | ! Starting 10 instruction Load Burst | |
19489 | ! Mem[0000000010001400] = ff000000 ffffffff, %l0 = 00000000, %l1 = 00000000 | |
19490 | ldda [%i0+%g0]0x80,%l0 ! %l0 = 00000000ff000000 00000000ffffffff | |
19491 | ||
19492 | p0_label_467: | |
19493 | ! Mem[0000000010181400] = 00000000, %l5 = 00000000000000ff | |
19494 | lduha [%i6+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
19495 | ! Mem[0000000030081400] = ffffffff, %l3 = 0000000000000000 | |
19496 | lduwa [%i2+%g0]0x81,%l3 ! %l3 = 00000000ffffffff | |
19497 | ! Mem[0000000010101408] = 0000ff79, %l0 = 00000000ff000000 | |
19498 | lduw [%i4+%o4],%l0 ! %l0 = 000000000000ff79 | |
19499 | ! Mem[0000000010181410] = 00000017, %l2 = 00000000000000ff | |
19500 | lduwa [%i6+%o5]0x88,%l2 ! %l2 = 0000000000000017 | |
19501 | ! Mem[0000000030181400] = ffffffff ffffffff, %l6 = 00000078, %l7 = 00000000 | |
19502 | ldda [%i6+%g0]0x81,%l6 ! %l6 = 00000000ffffffff 00000000ffffffff | |
19503 | ! Mem[0000000010081408] = 000000ff 00000000, %l4 = 0000ffff, %l5 = 00000000 | |
19504 | ldda [%i2+%o4]0x80,%l4 ! %l4 = 00000000000000ff 0000000000000000 | |
19505 | ! Mem[0000000010181410] = 17000000, %l7 = 00000000ffffffff | |
19506 | ldsha [%i6+0x010]%asi,%l7 ! %l7 = 0000000000001700 | |
19507 | ! Mem[0000000030141410] = ffffffffff000076, %l5 = 0000000000000000 | |
19508 | ldxa [%i5+%o5]0x89,%l5 ! %l5 = ffffffffff000076 | |
19509 | ! Mem[0000000030001410] = 000000ff 000000ff, %l6 = ffffffff, %l7 = 00001700 | |
19510 | ldda [%i0+%o5]0x89,%l6 ! %l6 = 00000000000000ff 00000000000000ff | |
19511 | ! Starting 10 instruction Store Burst | |
19512 | ! Mem[0000000030181400] = ffffffff, %l4 = 00000000000000ff | |
19513 | ldstuba [%i6+%g0]0x81,%l4 ! %l4 = 000000ff000000ff | |
19514 | ||
19515 | p0_label_468: | |
19516 | ! %f30 = 7827da3e 597bac10, Mem[0000000010041430] = 57793d9d 00000000 | |
19517 | stda %f30,[%i1+0x030]%asi ! Mem[0000000010041430] = 7827da3e 597bac10 | |
19518 | ! %f5 = ffffffff, Mem[00000000300c1410] = ff000076 | |
19519 | sta %f5 ,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ffffffff | |
19520 | ! Mem[00000000211c0001] = 00ff1a4c, %l0 = 000000000000ff79 | |
19521 | ldstuba [%o2+0x001]%asi,%l0 ! %l0 = 000000ff000000ff | |
19522 | ! %f6 = ffffffff 12000000, Mem[0000000030041400] = 3eda27ff ffc4c676 | |
19523 | stda %f6 ,[%i1+%g0]0x89 ! Mem[0000000030041400] = ffffffff 12000000 | |
19524 | ! %l0 = 00000000000000ff, %l6 = 00000000000000ff, %l4 = 00000000000000ff | |
19525 | or %l0,%l6,%l4 ! %l4 = 00000000000000ff | |
19526 | ! Mem[0000000030081400] = ffffffff, %l5 = ffffffffff000076 | |
19527 | swapa [%i2+%g0]0x89,%l5 ! %l5 = 00000000ffffffff | |
19528 | ! %l2 = 00000017, %l3 = ffffffff, Mem[00000000100c1410] = 00000000 00000000 | |
19529 | stda %l2,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 00000017 ffffffff | |
19530 | ! Mem[00000000100c140b] = ff000000, %l0 = 00000000000000ff | |
19531 | ldstuba [%i3+0x00b]%asi,%l0 ! %l0 = 00000000000000ff | |
19532 | ! Mem[0000000010181400] = 00000000, %l5 = 00000000ffffffff | |
19533 | ldstuba [%i6+%g0]0x80,%l5 ! %l5 = 00000000000000ff | |
19534 | ! Starting 10 instruction Load Burst | |
19535 | ! Mem[000000001004140c] = 00000000, %l6 = 00000000000000ff | |
19536 | ldsw [%i1+0x00c],%l6 ! %l6 = 0000000000000000 | |
19537 | ||
19538 | p0_label_469: | |
19539 | ! Mem[0000000030141408] = ff0000ff, %l6 = 0000000000000000 | |
19540 | ldsha [%i5+%o4]0x89,%l6 ! %l6 = 00000000000000ff | |
19541 | ! Mem[0000000030081408] = 000000ff, %l4 = 00000000000000ff | |
19542 | lduwa [%i2+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
19543 | ! Mem[0000000030081400] = ff000076, %l6 = 00000000000000ff | |
19544 | ldsba [%i2+%g0]0x89,%l6 ! %l6 = 0000000000000076 | |
19545 | ! Mem[0000000010041400] = 76000000, %l5 = 0000000000000000 | |
19546 | ldsba [%i1+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
19547 | ! Mem[0000000030001408] = ff000000ffff0000, %l5 = 0000000000000000 | |
19548 | ldxa [%i0+%o4]0x81,%l5 ! %l5 = ff000000ffff0000 | |
19549 | ! Mem[0000000030101400] = 17000000, %l1 = 00000000ffffffff | |
19550 | ldswa [%i4+%g0]0x81,%l1 ! %l1 = 0000000017000000 | |
19551 | ! Mem[0000000010081400] = ffffffff, %l5 = ff000000ffff0000 | |
19552 | ldsba [%i2+%g0]0x80,%l5 ! %l5 = ffffffffffffffff | |
19553 | ! Mem[0000000030041408] = ff00000000000000, %f16 = 00940000 000000ff | |
19554 | ldda [%i1+%o4]0x89,%f16 ! %f16 = ff000000 00000000 | |
19555 | ! Mem[0000000021800180] = ffffe2ae, %l4 = 00000000000000ff | |
19556 | ldsb [%o3+0x180],%l4 ! %l4 = ffffffffffffffff | |
19557 | ! Starting 10 instruction Store Burst | |
19558 | ! Mem[0000000030041400] = 00000012, %l2 = 0000000000000017 | |
19559 | ldstuba [%i1+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
19560 | ||
19561 | p0_label_470: | |
19562 | ! %l4 = ffffffff, %l5 = ffffffff, Mem[0000000030101400] = 00000017 000000ff | |
19563 | stda %l4,[%i4+%g0]0x89 ! Mem[0000000030101400] = ffffffff ffffffff | |
19564 | ! %l7 = 00000000000000ff, Mem[00000000100c1400] = 00000000ff000000 | |
19565 | stxa %l7,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 00000000000000ff | |
19566 | ! %l7 = 00000000000000ff, Mem[0000000030181410] = ff0000ff0000001f | |
19567 | stxa %l7,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000000000ff | |
19568 | ! Mem[00000000201c0000] = ffff9457, %l4 = ffffffffffffffff | |
19569 | ldstub [%o0+%g0],%l4 ! %l4 = 000000ff000000ff | |
19570 | ! %f13 = ffffffff, Mem[0000000010081410] = 000000ff | |
19571 | sta %f13,[%i2+%o5]0x88 ! Mem[0000000010081410] = ffffffff | |
19572 | ! %f18 = ff0000ff ff000000, Mem[0000000030081410] = ff000000 00000076 | |
19573 | stda %f18,[%i2+%o5]0x81 ! Mem[0000000030081410] = ff0000ff ff000000 | |
19574 | ! %l1 = 0000000017000000, Mem[0000000030081408] = 000000ff | |
19575 | stwa %l1,[%i2+%o4]0x89 ! Mem[0000000030081408] = 17000000 | |
19576 | ! %f18 = ff0000ff ff000000, Mem[0000000010041400] = 00000076 00009c15 | |
19577 | stda %f18,[%i1+0x000]%asi ! Mem[0000000010041400] = ff0000ff ff000000 | |
19578 | ! %l0 = 0000000000000000, Mem[0000000010001400] = ff000000 | |
19579 | stwa %l0,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00000000 | |
19580 | ! Starting 10 instruction Load Burst | |
19581 | ! Mem[0000000010001408] = 00000000 597bac10, %l2 = 00000000, %l3 = ffffffff | |
19582 | ldda [%i0+%o4]0x80,%l2 ! %l2 = 0000000000000000 00000000597bac10 | |
19583 | ||
19584 | ! Check Point 94 for processor 0 | |
19585 | ||
19586 | set p0_check_pt_data_94,%g4 | |
19587 | rd %ccr,%g5 ! %g5 = 44 | |
19588 | ldx [%g4+0x08],%g2 | |
19589 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
19590 | bne %xcc,p0_reg_check_fail0 | |
19591 | mov 0xee0,%g1 | |
19592 | ldx [%g4+0x10],%g2 | |
19593 | cmp %l1,%g2 ! %l1 = 0000000017000000 | |
19594 | bne %xcc,p0_reg_check_fail1 | |
19595 | mov 0xee1,%g1 | |
19596 | ldx [%g4+0x18],%g2 | |
19597 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
19598 | bne %xcc,p0_reg_check_fail2 | |
19599 | mov 0xee2,%g1 | |
19600 | ldx [%g4+0x20],%g2 | |
19601 | cmp %l3,%g2 ! %l3 = 00000000597bac10 | |
19602 | bne %xcc,p0_reg_check_fail3 | |
19603 | mov 0xee3,%g1 | |
19604 | ldx [%g4+0x28],%g2 | |
19605 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
19606 | bne %xcc,p0_reg_check_fail4 | |
19607 | mov 0xee4,%g1 | |
19608 | ldx [%g4+0x30],%g2 | |
19609 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
19610 | bne %xcc,p0_reg_check_fail5 | |
19611 | mov 0xee5,%g1 | |
19612 | ldx [%g4+0x38],%g2 | |
19613 | cmp %l6,%g2 ! %l6 = 0000000000000076 | |
19614 | bne %xcc,p0_reg_check_fail6 | |
19615 | mov 0xee6,%g1 | |
19616 | ldx [%g4+0x40],%g2 | |
19617 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
19618 | bne %xcc,p0_reg_check_fail7 | |
19619 | mov 0xee7,%g1 | |
19620 | ldx [%g4+0x48],%g3 | |
19621 | std %f0,[%g4] | |
19622 | ldx [%g4],%g2 | |
19623 | cmp %g3,%g2 ! %f0 = ff793d9d ffffffff | |
19624 | bne %xcc,p0_freg_check_fail | |
19625 | mov 0xf00,%g1 | |
19626 | ldx [%g4+0x50],%g3 | |
19627 | std %f2,[%g4] | |
19628 | ldx [%g4],%g2 | |
19629 | cmp %g3,%g2 ! %f2 = 0000ffff 00000076 | |
19630 | bne %xcc,p0_freg_check_fail | |
19631 | mov 0xf02,%g1 | |
19632 | ldx [%g4+0x58],%g3 | |
19633 | std %f4,[%g4] | |
19634 | ldx [%g4],%g2 | |
19635 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
19636 | bne %xcc,p0_freg_check_fail | |
19637 | mov 0xf04,%g1 | |
19638 | ldx [%g4+0x60],%g3 | |
19639 | std %f6,[%g4] | |
19640 | ldx [%g4],%g2 | |
19641 | cmp %g3,%g2 ! %f6 = ffffffff 12000000 | |
19642 | bne %xcc,p0_freg_check_fail | |
19643 | mov 0xf06,%g1 | |
19644 | ldx [%g4+0x68],%g3 | |
19645 | std %f16,[%g4] | |
19646 | ldx [%g4],%g2 | |
19647 | cmp %g3,%g2 ! %f16 = ff000000 00000000 | |
19648 | bne %xcc,p0_freg_check_fail | |
19649 | mov 0xf16,%g1 | |
19650 | ||
19651 | ! Check Point 94 completed | |
19652 | ||
19653 | ||
19654 | p0_label_471: | |
19655 | ! Mem[0000000010141400] = d4000000ffffffff, %l6 = 0000000000000076 | |
19656 | ldxa [%i5+%g0]0x88,%l6 ! %l6 = d4000000ffffffff | |
19657 | ! Mem[0000000010101410] = fc7345ff, %f15 = 00009c15 | |
19658 | lda [%i4+%o5]0x88,%f15 ! %f15 = fc7345ff | |
19659 | ! Mem[0000000010181408] = ffff0000, %l5 = ffffffffffffffff | |
19660 | ldsba [%i6+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
19661 | ! Mem[0000000030181410] = 00000000, %l1 = 0000000017000000 | |
19662 | lduba [%i6+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
19663 | ! Mem[0000000030141400] = 00009400, %l1 = 0000000000000000 | |
19664 | ldsba [%i5+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
19665 | ! Mem[0000000010101408] = 0000ff79, %l2 = 0000000000000000 | |
19666 | ldsba [%i4+0x008]%asi,%l2 ! %l2 = 0000000000000000 | |
19667 | ! Mem[0000000010041430] = 7827da3e, %l5 = 0000000000000000 | |
19668 | ldsha [%i1+0x030]%asi,%l5 ! %l5 = 0000000000007827 | |
19669 | ! Mem[00000000100c1408] = ff0000ff, %l1 = 0000000000000000 | |
19670 | lduwa [%i3+%o4]0x80,%l1 ! %l1 = 00000000ff0000ff | |
19671 | ! Mem[0000000010181438] = ff000000, %l1 = 00000000ff0000ff | |
19672 | lduwa [%i6+0x038]%asi,%l1 ! %l1 = 00000000ff000000 | |
19673 | ! Starting 10 instruction Store Burst | |
19674 | ! %f12 = ffffff9c ffffffff, %l3 = 00000000597bac10 | |
19675 | ! Mem[0000000010181428] = ff00ff00c238965e | |
19676 | add %i6,0x028,%g1 | |
19677 | stda %f12,[%g1+%l3]ASI_PST8_PL ! Mem[0000000010181428] = ff00ff009c38965e | |
19678 | ||
19679 | p0_label_472: | |
19680 | ! %l2 = 00000000, %l3 = 597bac10, Mem[0000000010101400] = 00000000 0000008f | |
19681 | stda %l2,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00000000 597bac10 | |
19682 | ! %l6 = d4000000ffffffff, Mem[0000000030101400] = ffffffff | |
19683 | stba %l6,[%i4+%g0]0x89 ! Mem[0000000030101400] = ffffffff | |
19684 | ! %l6 = ffffffff, %l7 = 000000ff, Mem[0000000030181410] = 00000000 000000ff | |
19685 | stda %l6,[%i6+%o5]0x81 ! Mem[0000000030181410] = ffffffff 000000ff | |
19686 | ! Mem[0000000010181408] = 0000ffff, %l7 = 00000000000000ff | |
19687 | swap [%i6+%o4],%l7 ! %l7 = 000000000000ffff | |
19688 | ! %l1 = 00000000ff000000, Mem[0000000030181408] = ffffffff9d3d79ff | |
19689 | stxa %l1,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000ff000000 | |
19690 | ! %f0 = ff793d9d ffffffff, Mem[0000000030101400] = ffffffff ffffffff | |
19691 | stda %f0 ,[%i4+%g0]0x89 ! Mem[0000000030101400] = ff793d9d ffffffff | |
19692 | ! %l2 = 00000000, %l3 = 597bac10, Mem[0000000030081400] = 760000ff ff000000 | |
19693 | stda %l2,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000000 597bac10 | |
19694 | ! Mem[0000000030041410] = ffffffff, %l5 = 0000000000007827 | |
19695 | ldstuba [%i1+%o5]0x89,%l5 ! %l5 = 000000ff000000ff | |
19696 | ! Mem[0000000030101408] = 00000000, %l5 = 00000000000000ff | |
19697 | ldstuba [%i4+%o4]0x89,%l5 ! %l5 = 00000000000000ff | |
19698 | ! Starting 10 instruction Load Burst | |
19699 | ! Mem[0000000010001408] = 00000000, %l3 = 00000000597bac10 | |
19700 | ldsba [%i0+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
19701 | ||
19702 | p0_label_473: | |
19703 | ! Mem[0000000030081408] = 17000000, %l3 = 0000000000000000 | |
19704 | lduba [%i2+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
19705 | ! Mem[0000000010141400] = ffffffff, %l7 = 000000000000ffff | |
19706 | ldswa [%i5+%g0]0x88,%l7 ! %l7 = ffffffffffffffff | |
19707 | ! Mem[0000000010081408] = 00000000 ff000000, %l4 = 000000ff, %l5 = 00000000 | |
19708 | ldda [%i2+%o4]0x88,%l4 ! %l4 = 00000000ff000000 0000000000000000 | |
19709 | ! Mem[0000000010001400] = ffffffff00000000, %f30 = 7827da3e 597bac10 | |
19710 | ldda [%i0+%g0]0x88,%f30 ! %f30 = ffffffff 00000000 | |
19711 | ! Mem[00000000100c1408] = ff0000ff, %f1 = ffffffff | |
19712 | lda [%i3+%o4]0x80,%f1 ! %f1 = ff0000ff | |
19713 | ! Mem[0000000010181400] = ff000000 00000000, %l4 = ff000000, %l5 = 00000000 | |
19714 | ldda [%i6+%g0]0x80,%l4 ! %l4 = 00000000ff000000 0000000000000000 | |
19715 | ! Mem[00000000100c1410] = 17000000, %l1 = 00000000ff000000 | |
19716 | ldsha [%i3+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
19717 | ! Mem[0000000010001410] = 000000c600000000, %f22 = fc734517 000000ff | |
19718 | ldda [%i0+%o5]0x80,%f22 ! %f22 = 000000c6 00000000 | |
19719 | ! Mem[0000000010001408] = 00000000, %l5 = 0000000000000000 | |
19720 | ldsba [%i0+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
19721 | ! Starting 10 instruction Store Burst | |
19722 | ! Mem[0000000030001400] = 00000000, %l3 = 0000000000000000 | |
19723 | swapa [%i0+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
19724 | ||
19725 | p0_label_474: | |
19726 | membar #Sync ! Added by membar checker (78) | |
19727 | ! %l2 = 0000000000000000, Mem[0000000030141408] = ff0000ff | |
19728 | stwa %l2,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 | |
19729 | ! %l5 = 0000000000000000, Mem[0000000010181408] = ff000000 | |
19730 | stba %l5,[%i6+%o4]0x88 ! Mem[0000000010181408] = ff000000 | |
19731 | ! Mem[00000000100c1410] = 00000017, %l7 = ffffffffffffffff | |
19732 | swapa [%i3+%o5]0x80,%l7 ! %l7 = 0000000000000017 | |
19733 | ! Mem[0000000010081408] = 000000ff, %l6 = d4000000ffffffff | |
19734 | ldstuba [%i2+%o4]0x80,%l6 ! %l6 = 00000000000000ff | |
19735 | ! %l6 = 0000000000000000, Mem[0000000010181408] = 000000ff | |
19736 | stba %l6,[%i6+%o4]0x80 ! Mem[0000000010181408] = 000000ff | |
19737 | ! Mem[0000000010041410] = 00000000, %l3 = 0000000000000000 | |
19738 | swapa [%i1+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
19739 | ! %l5 = 0000000000000000, Mem[0000000010181412] = 17000000 | |
19740 | sth %l5,[%i6+0x012] ! Mem[0000000010181410] = 17000000 | |
19741 | ! %l6 = 0000000000000000, Mem[0000000010101424] = 00000000 | |
19742 | sth %l6,[%i4+0x024] ! Mem[0000000010101424] = 00000000 | |
19743 | ! Mem[0000000021800080] = ffffa433, %l4 = 00000000ff000000 | |
19744 | ldstuba [%o3+0x080]%asi,%l4 ! %l4 = 000000ff000000ff | |
19745 | ! Starting 10 instruction Load Burst | |
19746 | ! Mem[0000000010081410] = ffffffff, %l5 = 0000000000000000 | |
19747 | lduba [%i2+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
19748 | ||
19749 | p0_label_475: | |
19750 | ! Mem[00000000211c0000] = 00ff1a4c, %l1 = 0000000000000000 | |
19751 | lduh [%o2+%g0],%l1 ! %l1 = 00000000000000ff | |
19752 | ! Mem[00000000201c0000] = ffff9457, %l5 = 00000000000000ff | |
19753 | ldsba [%o0+0x000]%asi,%l5 ! %l5 = ffffffffffffffff | |
19754 | ! Mem[0000000010141410] = ff0000ffff00ffff, %l0 = 0000000000000000 | |
19755 | ldxa [%i5+%o5]0x80,%l0 ! %l0 = ff0000ffff00ffff | |
19756 | ! Mem[0000000010101428] = ff000000, %l1 = 00000000000000ff | |
19757 | ldsha [%i4+0x028]%asi,%l1 ! %l1 = ffffffffffffff00 | |
19758 | ! Mem[0000000010141410] = ff0000ff, %l5 = ffffffffffffffff | |
19759 | lduba [%i5+%o5]0x80,%l5 ! %l5 = 00000000000000ff | |
19760 | ! Mem[0000000030041410] = ffffffff, %l0 = ff0000ffff00ffff | |
19761 | lduwa [%i1+%o5]0x89,%l0 ! %l0 = 00000000ffffffff | |
19762 | ! Mem[0000000010101410] = ff4573fc, %l6 = 0000000000000000 | |
19763 | lduha [%i4+%o5]0x80,%l6 ! %l6 = 000000000000ff45 | |
19764 | ! Mem[0000000010001410] = 000000c6, %l4 = 00000000000000ff | |
19765 | lduha [%i0+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
19766 | ! Mem[00000000201c0000] = ffff9457, %l0 = 00000000ffffffff | |
19767 | lduh [%o0+%g0],%l0 ! %l0 = 000000000000ffff | |
19768 | ! Starting 10 instruction Store Burst | |
19769 | ! %l4 = 00000000, %l5 = 000000ff, Mem[0000000010001400] = 00000000 ffffffff | |
19770 | stda %l4,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00000000 000000ff | |
19771 | ||
19772 | ! Check Point 95 for processor 0 | |
19773 | ||
19774 | set p0_check_pt_data_95,%g4 | |
19775 | rd %ccr,%g5 ! %g5 = 44 | |
19776 | ldx [%g4+0x08],%g2 | |
19777 | cmp %l0,%g2 ! %l0 = 000000000000ffff | |
19778 | bne %xcc,p0_reg_check_fail0 | |
19779 | mov 0xee0,%g1 | |
19780 | ldx [%g4+0x10],%g2 | |
19781 | cmp %l1,%g2 ! %l1 = ffffffffffffff00 | |
19782 | bne %xcc,p0_reg_check_fail1 | |
19783 | mov 0xee1,%g1 | |
19784 | ldx [%g4+0x18],%g2 | |
19785 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
19786 | bne %xcc,p0_reg_check_fail2 | |
19787 | mov 0xee2,%g1 | |
19788 | ldx [%g4+0x20],%g2 | |
19789 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
19790 | bne %xcc,p0_reg_check_fail3 | |
19791 | mov 0xee3,%g1 | |
19792 | ldx [%g4+0x28],%g2 | |
19793 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
19794 | bne %xcc,p0_reg_check_fail4 | |
19795 | mov 0xee4,%g1 | |
19796 | ldx [%g4+0x30],%g2 | |
19797 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
19798 | bne %xcc,p0_reg_check_fail5 | |
19799 | mov 0xee5,%g1 | |
19800 | ldx [%g4+0x38],%g2 | |
19801 | cmp %l6,%g2 ! %l6 = 000000000000ff45 | |
19802 | bne %xcc,p0_reg_check_fail6 | |
19803 | mov 0xee6,%g1 | |
19804 | ldx [%g4+0x40],%g2 | |
19805 | cmp %l7,%g2 ! %l7 = 0000000000000017 | |
19806 | bne %xcc,p0_reg_check_fail7 | |
19807 | mov 0xee7,%g1 | |
19808 | ldx [%g4+0x48],%g3 | |
19809 | std %f0,[%g4] | |
19810 | ldx [%g4],%g2 | |
19811 | cmp %g3,%g2 ! %f0 = ff793d9d ff0000ff | |
19812 | bne %xcc,p0_freg_check_fail | |
19813 | mov 0xf00,%g1 | |
19814 | ldx [%g4+0x50],%g3 | |
19815 | std %f4,[%g4] | |
19816 | ldx [%g4],%g2 | |
19817 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
19818 | bne %xcc,p0_freg_check_fail | |
19819 | mov 0xf04,%g1 | |
19820 | ldx [%g4+0x58],%g3 | |
19821 | std %f14,[%g4] | |
19822 | ldx [%g4],%g2 | |
19823 | cmp %g3,%g2 ! %f14 = ff000000 fc7345ff | |
19824 | bne %xcc,p0_freg_check_fail | |
19825 | mov 0xf14,%g1 | |
19826 | ldx [%g4+0x60],%g3 | |
19827 | std %f22,[%g4] | |
19828 | ldx [%g4],%g2 | |
19829 | cmp %g3,%g2 ! %f22 = 000000c6 00000000 | |
19830 | bne %xcc,p0_freg_check_fail | |
19831 | mov 0xf22,%g1 | |
19832 | ldx [%g4+0x68],%g3 | |
19833 | std %f30,[%g4] | |
19834 | ldx [%g4],%g2 | |
19835 | cmp %g3,%g2 ! %f30 = ffffffff 00000000 | |
19836 | bne %xcc,p0_freg_check_fail | |
19837 | mov 0xf30,%g1 | |
19838 | ||
19839 | ! Check Point 95 completed | |
19840 | ||
19841 | ||
19842 | p0_label_476: | |
19843 | ! Mem[0000000010181410] = 00000017, %l6 = 000000000000ff45 | |
19844 | swapa [%i6+%o5]0x88,%l6 ! %l6 = 0000000000000017 | |
19845 | ! %l4 = 00000000, %l5 = 000000ff, Mem[00000000100c1420] = ff000000 000000ff | |
19846 | stda %l4,[%i3+0x020]%asi ! Mem[00000000100c1420] = 00000000 000000ff | |
19847 | ! %l7 = 0000000000000017, Mem[0000000030181400] = ffffffff | |
19848 | stba %l7,[%i6+%g0]0x81 ! Mem[0000000030181400] = 17ffffff | |
19849 | ! %f24 = 1f41ff76 2164159c, Mem[0000000030181410] = ffffffff ff000000 | |
19850 | stda %f24,[%i6+%o5]0x89 ! Mem[0000000030181410] = 1f41ff76 2164159c | |
19851 | ! %f18 = ff0000ff ff000000, Mem[0000000030001410] = ff000000 ff000000 | |
19852 | stda %f18,[%i0+%o5]0x81 ! Mem[0000000030001410] = ff0000ff ff000000 | |
19853 | ! Mem[0000000030181400] = 17ffffff, %l4 = 0000000000000000 | |
19854 | ldstuba [%i6+%g0]0x81,%l4 ! %l4 = 00000017000000ff | |
19855 | ! %l0 = 0000ffff, %l1 = ffffff00, Mem[0000000030001410] = ff0000ff 000000ff | |
19856 | stda %l0,[%i0+%o5]0x89 ! Mem[0000000030001410] = 0000ffff ffffff00 | |
19857 | ! Mem[0000000030141400] = 00009400, %l6 = 0000000000000017 | |
19858 | swapa [%i5+%g0]0x89,%l6 ! %l6 = 0000000000009400 | |
19859 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000030001400] = 00000000 8f000000 | |
19860 | stda %l2,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00000000 00000000 | |
19861 | ! Starting 10 instruction Load Burst | |
19862 | ! Mem[0000000010081408] = ff0000ff, %l2 = 0000000000000000 | |
19863 | ldsha [%i2+0x00a]%asi,%l2 ! %l2 = 00000000000000ff | |
19864 | ||
19865 | p0_label_477: | |
19866 | ! Mem[0000000030141410] = 760000ffffffffff, %f14 = ff000000 fc7345ff | |
19867 | ldda [%i5+%o5]0x81,%f14 ! %f14 = 760000ff ffffffff | |
19868 | ! Mem[0000000020800040] = ffff7379, %l0 = 000000000000ffff | |
19869 | lduha [%o1+0x040]%asi,%l0 ! %l0 = 000000000000ffff | |
19870 | ! Mem[0000000010081408] = 00000000ff0000ff, %f14 = 760000ff ffffffff | |
19871 | ldda [%i2+%o4]0x88,%f14 ! %f14 = 00000000 ff0000ff | |
19872 | ! Mem[0000000010101408] = 0000000079ff0000, %f6 = ffffffff 12000000 | |
19873 | ldda [%i4+%o4]0x88,%f6 ! %f6 = 00000000 79ff0000 | |
19874 | ! Mem[00000000300c1400] = 000000ff, %l6 = 0000000000009400 | |
19875 | ldsba [%i3+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
19876 | ! Mem[00000000201c0000] = ffff9457, %l1 = ffffffffffffff00 | |
19877 | ldub [%o0+%g0],%l1 ! %l1 = 00000000000000ff | |
19878 | ! Mem[0000000010141410] = ff0000ffff00ffff, %l4 = 0000000000000017 | |
19879 | ldxa [%i5+%o5]0x80,%l4 ! %l4 = ff0000ffff00ffff | |
19880 | ! Mem[00000000300c1408] = 000000ff, %f9 = 000000ff | |
19881 | lda [%i3+%o4]0x89,%f9 ! %f9 = 000000ff | |
19882 | ! Mem[0000000030181400] = ffffffff, %l4 = ff0000ffff00ffff | |
19883 | ldsha [%i6+%g0]0x89,%l4 ! %l4 = ffffffffffffffff | |
19884 | ! Starting 10 instruction Store Burst | |
19885 | ! %f1 = ff0000ff, Mem[00000000300c1408] = 000000ff | |
19886 | sta %f1 ,[%i3+%o4]0x89 ! Mem[00000000300c1408] = ff0000ff | |
19887 | ||
19888 | p0_label_478: | |
19889 | ! %l0 = 000000000000ffff, Mem[00000000100c1410] = ffffffff | |
19890 | stba %l0,[%i3+%o5]0x80 ! Mem[00000000100c1410] = ffffffff | |
19891 | ! Mem[00000000300c1400] = 000000ff, %l2 = 00000000000000ff | |
19892 | swapa [%i3+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
19893 | ! Mem[0000000010001408] = 00000000, %l4 = ffffffffffffffff | |
19894 | lduha [%i0+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
19895 | ! %f14 = 00000000 ff0000ff, %l3 = 0000000000000000 | |
19896 | ! Mem[0000000010001438] = 0000ffff00000076 | |
19897 | add %i0,0x038,%g1 | |
19898 | stda %f14,[%g1+%l3]ASI_PST16_PL ! Mem[0000000010001438] = 0000ffff00000076 | |
19899 | ! Mem[0000000010001410] = 000000c6, %l4 = 0000000000000000 | |
19900 | swap [%i0+%o5],%l4 ! %l4 = 00000000000000c6 | |
19901 | ! Mem[0000000010041408] = ff000000, %l4 = 00000000000000c6 | |
19902 | swap [%i1+%o4],%l4 ! %l4 = 00000000ff000000 | |
19903 | ! Mem[00000000100c1408] = ff0000ff, %l4 = 00000000ff000000 | |
19904 | ldstuba [%i3+%o4]0x80,%l4 ! %l4 = 000000ff000000ff | |
19905 | ! %f20 = 760000ff ffffffff, %l0 = 000000000000ffff | |
19906 | ! Mem[0000000030141400] = 17000000000000ff | |
19907 | stda %f20,[%i5+%l0]ASI_PST8_SL ! Mem[0000000030141400] = ffffffffff000076 | |
19908 | ! %l1 = 00000000000000ff, Mem[0000000030081400] = 00000000 | |
19909 | stwa %l1,[%i2+%g0]0x81 ! Mem[0000000030081400] = 000000ff | |
19910 | ! Starting 10 instruction Load Burst | |
19911 | ! Mem[0000000030101400] = ffffffff, %l4 = 00000000000000ff | |
19912 | lduba [%i4+%g0]0x89,%l4 ! %l4 = 00000000000000ff | |
19913 | ||
19914 | p0_label_479: | |
19915 | ! Mem[0000000030181410] = 9c156421 76ff411f, %l4 = 000000ff, %l5 = 000000ff | |
19916 | ldda [%i6+%o5]0x81,%l4 ! %l4 = 000000009c156421 0000000076ff411f | |
19917 | ! Mem[0000000010081420] = 000000ff, %l0 = 000000000000ffff | |
19918 | ldsha [%i2+0x020]%asi,%l0 ! %l0 = 0000000000000000 | |
19919 | ! Mem[0000000030101410] = c600ffff, %l2 = 00000000000000ff | |
19920 | lduwa [%i4+%o5]0x89,%l2 ! %l2 = 00000000c600ffff | |
19921 | ! Mem[0000000030041400] = 120000ff, %l6 = 0000000000000000 | |
19922 | lduwa [%i1+%g0]0x89,%l6 ! %l6 = 00000000120000ff | |
19923 | ! Mem[00000000300c1410] = ffffffff ff000000, %l0 = 00000000, %l1 = 000000ff | |
19924 | ldda [%i3+%o5]0x81,%l0 ! %l0 = 00000000ffffffff 00000000ff000000 | |
19925 | ! Mem[00000000100c1414] = ffffffff, %l6 = 00000000120000ff | |
19926 | ldswa [%i3+0x014]%asi,%l6 ! %l6 = ffffffffffffffff | |
19927 | ! Mem[0000000010081408] = ff0000ff, %l6 = ffffffffffffffff | |
19928 | ldsha [%i2+%o4]0x88,%l6 ! %l6 = 00000000000000ff | |
19929 | ! Mem[0000000010141408] = 00ff000000000000, %l7 = 0000000000000017 | |
19930 | ldxa [%i5+%o4]0x80,%l7 ! %l7 = 00ff000000000000 | |
19931 | ! Mem[0000000030141400] = ffffffff, %l2 = 00000000c600ffff | |
19932 | ldsba [%i5+%g0]0x81,%l2 ! %l2 = ffffffffffffffff | |
19933 | ! Starting 10 instruction Store Burst | |
19934 | ! Mem[0000000010081410] = ffffffff, %l5 = 0000000076ff411f | |
19935 | ldstuba [%i2+%o5]0x80,%l5 ! %l5 = 000000ff000000ff | |
19936 | ||
19937 | p0_label_480: | |
19938 | ! %l2 = ffffffffffffffff, Mem[0000000030101408] = 000000ff | |
19939 | stha %l2,[%i4+%o4]0x89 ! Mem[0000000030101408] = 0000ffff | |
19940 | ! %l4 = 000000009c156421, Mem[0000000030141408] = 00000000 | |
19941 | stwa %l4,[%i5+%o4]0x81 ! Mem[0000000030141408] = 9c156421 | |
19942 | ! %l4 = 000000009c156421, Mem[0000000030001408] = ff000000 | |
19943 | stha %l4,[%i0+%o4]0x81 ! Mem[0000000030001408] = 64210000 | |
19944 | ! %f0 = ff793d9d ff0000ff 0000ffff 00000076 | |
19945 | ! %f4 = ffffffff ffffffff 00000000 79ff0000 | |
19946 | ! %f8 = 000000ff 000000ff 0000ffff 00009c15 | |
19947 | ! %f12 = ffffff9c ffffffff 00000000 ff0000ff | |
19948 | stda %f0,[%i4]ASI_COMMIT_S ! Block Store to 0000000030101400 | |
19949 | membar #Sync ! Added by membar checker (79) | |
19950 | ! Mem[0000000010101400] = 00000000, %l7 = 00ff000000000000 | |
19951 | ldstuba [%i4+%g0]0x88,%l7 ! %l7 = 00000000000000ff | |
19952 | ! Mem[00000000100c1408] = ff0000ff, %l0 = 00000000ffffffff | |
19953 | ldstuba [%i3+%o4]0x88,%l0 ! %l0 = 000000ff000000ff | |
19954 | ! %l7 = 0000000000000000, Mem[0000000010141400] = d4000000ffffffff | |
19955 | stxa %l7,[%i5+%g0]0x88 ! Mem[0000000010141400] = 0000000000000000 | |
19956 | ! Mem[0000000010181412] = 45ff0000, %l0 = 00000000000000ff | |
19957 | ldstuba [%i6+0x012]%asi,%l0 ! %l0 = 00000000000000ff | |
19958 | ! %f28 = ff000000 00009400, %l6 = 00000000000000ff | |
19959 | ! Mem[0000000030101400] = ff793d9dff0000ff | |
19960 | stda %f28,[%i4+%l6]ASI_PST8_SL ! Mem[0000000030101400] = 00940000000000ff | |
19961 | ! Starting 10 instruction Load Burst | |
19962 | ! Mem[0000000010101400] = 000000ff, %l2 = ffffffffffffffff | |
19963 | lduba [%i4+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
19964 | ||
19965 | ! Check Point 96 for processor 0 | |
19966 | ||
19967 | set p0_check_pt_data_96,%g4 | |
19968 | rd %ccr,%g5 ! %g5 = 44 | |
19969 | ldx [%g4+0x08],%g2 | |
19970 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
19971 | bne %xcc,p0_reg_check_fail0 | |
19972 | mov 0xee0,%g1 | |
19973 | ldx [%g4+0x10],%g2 | |
19974 | cmp %l1,%g2 ! %l1 = 00000000ff000000 | |
19975 | bne %xcc,p0_reg_check_fail1 | |
19976 | mov 0xee1,%g1 | |
19977 | ldx [%g4+0x18],%g2 | |
19978 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
19979 | bne %xcc,p0_reg_check_fail2 | |
19980 | mov 0xee2,%g1 | |
19981 | ldx [%g4+0x20],%g2 | |
19982 | cmp %l4,%g2 ! %l4 = 000000009c156421 | |
19983 | bne %xcc,p0_reg_check_fail4 | |
19984 | mov 0xee4,%g1 | |
19985 | ldx [%g4+0x28],%g2 | |
19986 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
19987 | bne %xcc,p0_reg_check_fail5 | |
19988 | mov 0xee5,%g1 | |
19989 | ldx [%g4+0x30],%g2 | |
19990 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
19991 | bne %xcc,p0_reg_check_fail6 | |
19992 | mov 0xee6,%g1 | |
19993 | ldx [%g4+0x38],%g2 | |
19994 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
19995 | bne %xcc,p0_reg_check_fail7 | |
19996 | mov 0xee7,%g1 | |
19997 | ldx [%g4+0x40],%g3 | |
19998 | std %f0,[%g4] | |
19999 | ldx [%g4],%g2 | |
20000 | cmp %g3,%g2 ! %f0 = ff793d9d ff0000ff | |
20001 | bne %xcc,p0_freg_check_fail | |
20002 | mov 0xf00,%g1 | |
20003 | ldx [%g4+0x48],%g3 | |
20004 | std %f4,[%g4] | |
20005 | ldx [%g4],%g2 | |
20006 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
20007 | bne %xcc,p0_freg_check_fail | |
20008 | mov 0xf04,%g1 | |
20009 | ldx [%g4+0x50],%g3 | |
20010 | std %f6,[%g4] | |
20011 | ldx [%g4],%g2 | |
20012 | cmp %g3,%g2 ! %f6 = 00000000 79ff0000 | |
20013 | bne %xcc,p0_freg_check_fail | |
20014 | mov 0xf06,%g1 | |
20015 | ldx [%g4+0x58],%g3 | |
20016 | std %f8,[%g4] | |
20017 | ldx [%g4],%g2 | |
20018 | cmp %g3,%g2 ! %f8 = 000000ff 000000ff | |
20019 | bne %xcc,p0_freg_check_fail | |
20020 | mov 0xf08,%g1 | |
20021 | ldx [%g4+0x60],%g3 | |
20022 | std %f14,[%g4] | |
20023 | ldx [%g4],%g2 | |
20024 | cmp %g3,%g2 ! %f14 = 00000000 ff0000ff | |
20025 | bne %xcc,p0_freg_check_fail | |
20026 | mov 0xf14,%g1 | |
20027 | ||
20028 | ! Check Point 96 completed | |
20029 | ||
20030 | ||
20031 | p0_label_481: | |
20032 | ! Mem[00000000100c1400] = 00000000000000ff, %f10 = 0000ffff 00009c15 | |
20033 | ldda [%i3+%g0]0x88,%f10 ! %f10 = 00000000 000000ff | |
20034 | ! Mem[0000000010081428] = 00000000, %l7 = 0000000000000000 | |
20035 | lduha [%i2+0x028]%asi,%l7 ! %l7 = 0000000000000000 | |
20036 | ! Mem[0000000010081410] = ffffffff, %l3 = 0000000000000000 | |
20037 | ldsba [%i2+%o5]0x80,%l3 ! %l3 = ffffffffffffffff | |
20038 | ! Mem[0000000010081408] = ff0000ff, %l0 = 0000000000000000 | |
20039 | ldswa [%i2+%o4]0x80,%l0 ! %l0 = ffffffffff0000ff | |
20040 | ! Mem[0000000010001408] = 00000000, %l3 = ffffffffffffffff | |
20041 | lduwa [%i0+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
20042 | ! Mem[0000000010101400] = 000000ff, %l6 = 00000000000000ff | |
20043 | lduwa [%i4+%g0]0x88,%l6 ! %l6 = 00000000000000ff | |
20044 | ! Mem[0000000010181424] = 00000000, %f14 = 00000000 | |
20045 | lda [%i6+0x024]%asi,%f14 ! %f14 = 00000000 | |
20046 | ! Mem[0000000030001410] = 0000ffff, %l4 = 000000009c156421 | |
20047 | ldswa [%i0+%o5]0x89,%l4 ! %l4 = 000000000000ffff | |
20048 | ! Mem[00000000100c1438] = ff000000, %l2 = 00000000000000ff | |
20049 | ldsba [%i3+0x03b]%asi,%l2 ! %l2 = 0000000000000000 | |
20050 | ! Starting 10 instruction Store Burst | |
20051 | ! Mem[0000000010101400] = ff000000, %l3 = 0000000000000000 | |
20052 | ldstuba [%i4+%g0]0x80,%l3 ! %l3 = 000000ff000000ff | |
20053 | ||
20054 | p0_label_482: | |
20055 | ! Mem[0000000010101408] = 0000ff79, %l0 = ffffffffff0000ff | |
20056 | swapa [%i4+%o4]0x80,%l0 ! %l0 = 000000000000ff79 | |
20057 | ! %l1 = 00000000ff000000, Mem[0000000030181408] = 000000ff | |
20058 | stha %l1,[%i6+%o4]0x81 ! Mem[0000000030181408] = 000000ff | |
20059 | ! %f14 = 00000000 ff0000ff, %l3 = 00000000000000ff | |
20060 | ! Mem[0000000030081420] = 000000002164159c | |
20061 | add %i2,0x020,%g1 | |
20062 | stda %f14,[%g1+%l3]ASI_PST32_S ! Mem[0000000030081420] = 00000000ff0000ff | |
20063 | ! %f8 = 000000ff 000000ff, Mem[00000000100c1420] = 00000000 000000ff | |
20064 | stda %f8 ,[%i3+0x020]%asi ! Mem[00000000100c1420] = 000000ff 000000ff | |
20065 | ! %l0 = 000000000000ff79, Mem[0000000010141410] = ff0000ff | |
20066 | stba %l0,[%i5+%o5]0x88 ! Mem[0000000010141410] = ff000079 | |
20067 | ! %l3 = 00000000000000ff, Mem[00000000100c1408] = ff0000ff00000000 | |
20068 | stxa %l3,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00000000000000ff | |
20069 | ! %l7 = 0000000000000000, Mem[0000000010181428] = ff00ff009c38965e, %asi = 80 | |
20070 | stxa %l7,[%i6+0x028]%asi ! Mem[0000000010181428] = 0000000000000000 | |
20071 | ! Mem[00000000100c1410] = ffffffff, %l3 = 00000000000000ff | |
20072 | ldstuba [%i3+%o5]0x80,%l3 ! %l3 = 000000ff000000ff | |
20073 | ! Mem[0000000010081408] = ff0000ff, %l5 = 00000000000000ff | |
20074 | swapa [%i2+%o4]0x80,%l5 ! %l5 = 00000000ff0000ff | |
20075 | ! Starting 10 instruction Load Burst | |
20076 | ! Mem[0000000010001410] = 0000000000000000, %f30 = ffffffff 00000000 | |
20077 | ldda [%i0+%o5]0x80,%f30 ! %f30 = 00000000 00000000 | |
20078 | ||
20079 | p0_label_483: | |
20080 | ! Mem[000000001014140c] = 00000000, %l5 = 00000000ff0000ff | |
20081 | ldsh [%i5+0x00c],%l5 ! %l5 = 0000000000000000 | |
20082 | ! Mem[0000000030181408] = 00000000 ff000000, %l4 = 0000ffff, %l5 = 00000000 | |
20083 | ldda [%i6+%o4]0x89,%l4 ! %l4 = 00000000ff000000 0000000000000000 | |
20084 | ! Mem[0000000030001408] = 64210000, %f13 = ffffffff | |
20085 | lda [%i0+%o4]0x81,%f13 ! %f13 = 64210000 | |
20086 | ! Mem[00000000300c1410] = ffffffff, %l7 = 0000000000000000 | |
20087 | lduba [%i3+%o5]0x81,%l7 ! %l7 = 00000000000000ff | |
20088 | ! Mem[00000000300c1410] = ffffffff, %f6 = 00000000 | |
20089 | lda [%i3+%o5]0x89,%f6 ! %f6 = ffffffff | |
20090 | ! Mem[0000000030001400] = 00000000, %l3 = 00000000000000ff | |
20091 | lduba [%i0+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
20092 | ! Mem[0000000030181410] = 2164159c, %l6 = 00000000000000ff | |
20093 | ldsha [%i6+%o5]0x89,%l6 ! %l6 = 000000000000159c | |
20094 | ! Mem[0000000030001408] = 64210000, %l7 = 00000000000000ff | |
20095 | ldswa [%i0+%o4]0x81,%l7 ! %l7 = 0000000064210000 | |
20096 | ! Mem[0000000010041410] = 00000000ffffffff, %l2 = 0000000000000000 | |
20097 | ldxa [%i1+%o5]0x80,%l2 ! %l2 = 00000000ffffffff | |
20098 | ! Starting 10 instruction Store Burst | |
20099 | ! Mem[0000000010181408] = ff000000, %l0 = 000000000000ff79 | |
20100 | swapa [%i6+%o4]0x88,%l0 ! %l0 = 00000000ff000000 | |
20101 | ||
20102 | p0_label_484: | |
20103 | ! Mem[0000000030101408] = 0000ffff, %l5 = 0000000000000000 | |
20104 | ldstuba [%i4+%o4]0x81,%l5 ! %l5 = 00000000000000ff | |
20105 | ! %l3 = 0000000000000000, immed = 00000e17, %y = 00000000 | |
20106 | smul %l3,0xe17,%l2 ! %l2 = 0000000000000000, %y = 00000000 | |
20107 | ! Mem[0000000010141408] = 00ff0000, %l4 = 00000000ff000000 | |
20108 | ldstuba [%i5+%o4]0x80,%l4 ! %l4 = 00000000000000ff | |
20109 | ! %l6 = 000000000000159c, Mem[00000000211c0000] = 00ff1a4c | |
20110 | stb %l6,[%o2+%g0] ! Mem[00000000211c0000] = 9cff1a4c | |
20111 | ! %l4 = 0000000000000000, Mem[0000000030181410] = 9c15642176ff411f | |
20112 | stxa %l4,[%i6+%o5]0x81 ! Mem[0000000030181410] = 0000000000000000 | |
20113 | ! %f26 = 3739e890 ffffac00, Mem[0000000010081400] = ffffffff ffffffff | |
20114 | stda %f26,[%i2+%g0]0x88 ! Mem[0000000010081400] = 3739e890 ffffac00 | |
20115 | ! Mem[0000000030101400] = 00940000, %l7 = 0000000064210000 | |
20116 | ldstuba [%i4+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
20117 | ! Mem[000000001010143f] = 003400ff, %l6 = 000000000000159c | |
20118 | ldstub [%i4+0x03f],%l6 ! %l6 = 000000ff000000ff | |
20119 | ! %l2 = 0000000000000000, Mem[0000000010001400] = ff00000000000000 | |
20120 | stxa %l2,[%i0+%g0]0x88 ! Mem[0000000010001400] = 0000000000000000 | |
20121 | ! Starting 10 instruction Load Burst | |
20122 | ! Mem[0000000030041400] = ff000012ffffffff, %f16 = ff000000 00000000 | |
20123 | ldda [%i1+%g0]0x81,%f16 ! %f16 = ff000012 ffffffff | |
20124 | ||
20125 | p0_label_485: | |
20126 | ! Mem[0000000010041414] = ffffffff, %l0 = 00000000ff000000 | |
20127 | ldsh [%i1+0x014],%l0 ! %l0 = ffffffffffffffff | |
20128 | ! Mem[0000000030141408] = 9c156421, %f13 = 64210000 | |
20129 | lda [%i5+%o4]0x81,%f13 ! %f13 = 9c156421 | |
20130 | ! Mem[0000000010101400] = ff000000, %l4 = 0000000000000000 | |
20131 | ldsha [%i4+%g0]0x80,%l4 ! %l4 = ffffffffffffff00 | |
20132 | ! Mem[00000000300c1410] = ffffffff, %l4 = ffffffffffffff00 | |
20133 | ldsha [%i3+%o5]0x81,%l4 ! %l4 = ffffffffffffffff | |
20134 | ! Mem[0000000010141410] = ff000079, %l0 = ffffffffffffffff | |
20135 | lduwa [%i5+%o5]0x88,%l0 ! %l0 = 00000000ff000079 | |
20136 | ! Mem[00000000100c1410] = ffffffff ffffffff, %l2 = 00000000, %l3 = 00000000 | |
20137 | ldda [%i3+%o5]0x88,%l2 ! %l2 = 00000000ffffffff 00000000ffffffff | |
20138 | ! Mem[0000000010001424] = 76c6c4ff, %f1 = ff0000ff | |
20139 | lda [%i0+0x024]%asi,%f1 ! %f1 = 76c6c4ff | |
20140 | ! Mem[0000000020800040] = ffff7379, %l1 = 00000000ff000000 | |
20141 | ldub [%o1+0x041],%l1 ! %l1 = 00000000000000ff | |
20142 | ! Mem[0000000010081424] = 00009c15, %l1 = 00000000000000ff | |
20143 | lduha [%i2+0x024]%asi,%l1 ! %l1 = 0000000000000000 | |
20144 | ! Starting 10 instruction Store Burst | |
20145 | ! Mem[0000000010181420] = 0000ff00, %l6 = 00000000000000ff | |
20146 | swap [%i6+0x020],%l6 ! %l6 = 000000000000ff00 | |
20147 | ||
20148 | ! Check Point 97 for processor 0 | |
20149 | ||
20150 | set p0_check_pt_data_97,%g4 | |
20151 | rd %ccr,%g5 ! %g5 = 44 | |
20152 | ldx [%g4+0x08],%g2 | |
20153 | cmp %l0,%g2 ! %l0 = 00000000ff000079 | |
20154 | bne %xcc,p0_reg_check_fail0 | |
20155 | mov 0xee0,%g1 | |
20156 | ldx [%g4+0x10],%g2 | |
20157 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
20158 | bne %xcc,p0_reg_check_fail1 | |
20159 | mov 0xee1,%g1 | |
20160 | ldx [%g4+0x18],%g2 | |
20161 | cmp %l2,%g2 ! %l2 = 00000000ffffffff | |
20162 | bne %xcc,p0_reg_check_fail2 | |
20163 | mov 0xee2,%g1 | |
20164 | ldx [%g4+0x20],%g2 | |
20165 | cmp %l3,%g2 ! %l3 = 00000000ffffffff | |
20166 | bne %xcc,p0_reg_check_fail3 | |
20167 | mov 0xee3,%g1 | |
20168 | ldx [%g4+0x28],%g2 | |
20169 | cmp %l4,%g2 ! %l4 = ffffffffffffffff | |
20170 | bne %xcc,p0_reg_check_fail4 | |
20171 | mov 0xee4,%g1 | |
20172 | ldx [%g4+0x30],%g2 | |
20173 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
20174 | bne %xcc,p0_reg_check_fail5 | |
20175 | mov 0xee5,%g1 | |
20176 | ldx [%g4+0x38],%g2 | |
20177 | cmp %l6,%g2 ! %l6 = 000000000000ff00 | |
20178 | bne %xcc,p0_reg_check_fail6 | |
20179 | mov 0xee6,%g1 | |
20180 | ldx [%g4+0x40],%g2 | |
20181 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
20182 | bne %xcc,p0_reg_check_fail7 | |
20183 | mov 0xee7,%g1 | |
20184 | ldx [%g4+0x48],%g3 | |
20185 | std %f0,[%g4] | |
20186 | ldx [%g4],%g2 | |
20187 | cmp %g3,%g2 ! %f0 = ff793d9d 76c6c4ff | |
20188 | bne %xcc,p0_freg_check_fail | |
20189 | mov 0xf00,%g1 | |
20190 | ldx [%g4+0x50],%g3 | |
20191 | std %f2,[%g4] | |
20192 | ldx [%g4],%g2 | |
20193 | cmp %g3,%g2 ! %f2 = 0000ffff 00000076 | |
20194 | bne %xcc,p0_freg_check_fail | |
20195 | mov 0xf02,%g1 | |
20196 | ldx [%g4+0x58],%g3 | |
20197 | std %f4,[%g4] | |
20198 | ldx [%g4],%g2 | |
20199 | cmp %g3,%g2 ! %f4 = ffffffff ffffffff | |
20200 | bne %xcc,p0_freg_check_fail | |
20201 | mov 0xf04,%g1 | |
20202 | ldx [%g4+0x60],%g3 | |
20203 | std %f6,[%g4] | |
20204 | ldx [%g4],%g2 | |
20205 | cmp %g3,%g2 ! %f6 = ffffffff 79ff0000 | |
20206 | bne %xcc,p0_freg_check_fail | |
20207 | mov 0xf06,%g1 | |
20208 | ldx [%g4+0x68],%g3 | |
20209 | std %f10,[%g4] | |
20210 | ldx [%g4],%g2 | |
20211 | cmp %g3,%g2 ! %f10 = 00000000 000000ff | |
20212 | bne %xcc,p0_freg_check_fail | |
20213 | mov 0xf10,%g1 | |
20214 | ldx [%g4+0x70],%g3 | |
20215 | std %f12,[%g4] | |
20216 | ldx [%g4],%g2 | |
20217 | cmp %g3,%g2 ! %f12 = ffffff9c 9c156421 | |
20218 | bne %xcc,p0_freg_check_fail | |
20219 | mov 0xf12,%g1 | |
20220 | ldx [%g4+0x78],%g3 | |
20221 | std %f14,[%g4] | |
20222 | ldx [%g4],%g2 | |
20223 | cmp %g3,%g2 ! %f14 = 00000000 ff0000ff | |
20224 | bne %xcc,p0_freg_check_fail | |
20225 | mov 0xf14,%g1 | |
20226 | ldx [%g4+0x80],%g3 | |
20227 | std %f16,[%g4] | |
20228 | ldx [%g4],%g2 | |
20229 | cmp %g3,%g2 ! %f16 = ff000012 ffffffff | |
20230 | bne %xcc,p0_freg_check_fail | |
20231 | mov 0xf16,%g1 | |
20232 | ldx [%g4+0x88],%g3 | |
20233 | std %f30,[%g4] | |
20234 | ldx [%g4],%g2 | |
20235 | cmp %g3,%g2 ! %f30 = 00000000 00000000 | |
20236 | bne %xcc,p0_freg_check_fail | |
20237 | mov 0xf30,%g1 | |
20238 | ||
20239 | ! Check Point 97 completed | |
20240 | ||
20241 | ||
20242 | p0_label_486: | |
20243 | ! %l4 = ffffffff, %l5 = 00000000, Mem[00000000100c1410] = ffffffff ffffffff | |
20244 | stda %l4,[%i3+%o5]0x88 ! Mem[00000000100c1410] = ffffffff 00000000 | |
20245 | ! %l0 = 00000000ff000079, Mem[0000000030081408] = e300000017000000 | |
20246 | stxa %l0,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000000ff000079 | |
20247 | ! Mem[0000000030001408] = 00002164, %l6 = 000000000000ff00 | |
20248 | ldstuba [%i0+%o4]0x89,%l6 ! %l6 = 00000064000000ff | |
20249 | ! Mem[0000000010181430] = 10ac7b593eda2778, %l4 = ffffffffffffffff, %l2 = 00000000ffffffff | |
20250 | add %i6,0x30,%g1 | |
20251 | casxa [%g1]0x80,%l4,%l2 ! %l2 = 10ac7b593eda2778 | |
20252 | ! Mem[00000000201c0000] = ffff9457, %l5 = 0000000000000000 | |
20253 | ldstub [%o0+%g0],%l5 ! %l5 = 000000ff000000ff | |
20254 | ! Mem[0000000030001408] = ff210000, %l7 = 0000000000000000 | |
20255 | ldstuba [%i0+%o4]0x81,%l7 ! %l7 = 000000ff000000ff | |
20256 | ! %f16 = ff000012, Mem[000000001000141c] = 000000ff | |
20257 | sta %f16,[%i0+0x01c]%asi ! Mem[000000001000141c] = ff000012 | |
20258 | ! Mem[0000000030081410] = ff0000ff, %l2 = 10ac7b593eda2778 | |
20259 | ldstuba [%i2+%o5]0x81,%l2 ! %l2 = 000000ff000000ff | |
20260 | ! Mem[0000000010001428] = 00000000, %l2 = 000000ff, %l4 = ffffffff | |
20261 | add %i0,0x28,%g1 | |
20262 | casa [%g1]0x80,%l2,%l4 ! %l4 = 0000000000000000 | |
20263 | ! Starting 10 instruction Load Burst | |
20264 | ! Mem[0000000030001400] = 00000000 00000000, %l0 = ff000079, %l1 = 00000000 | |
20265 | ldda [%i0+%g0]0x89,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
20266 | ||
20267 | p0_label_487: | |
20268 | ! Mem[0000000030001400] = 0000000000000000, %l2 = 00000000000000ff | |
20269 | ldxa [%i0+%g0]0x81,%l2 ! %l2 = 0000000000000000 | |
20270 | ! Mem[0000000030141410] = ff000076, %l4 = 0000000000000000 | |
20271 | lduha [%i5+%o5]0x89,%l4 ! %l4 = 0000000000000076 | |
20272 | ! Mem[0000000030141400] = ffffffff, %l6 = 0000000000000064 | |
20273 | lduba [%i5+%g0]0x89,%l6 ! %l6 = 00000000000000ff | |
20274 | ! Mem[0000000030001400] = 00000000, %l2 = 0000000000000000 | |
20275 | lduha [%i0+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
20276 | ! Mem[0000000010001428] = 00000000, %l3 = 00000000ffffffff | |
20277 | lduha [%i0+0x028]%asi,%l3 ! %l3 = 0000000000000000 | |
20278 | ! Mem[0000000030001410] = 0000ffff, %l5 = 00000000000000ff | |
20279 | ldsba [%i0+%o5]0x89,%l5 ! %l5 = ffffffffffffffff | |
20280 | ! Mem[00000000300c1400] = ff000000, %l0 = 0000000000000000 | |
20281 | lduba [%i3+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
20282 | ! Mem[00000000300c1400] = ffffffff ff000000, %l6 = 000000ff, %l7 = 000000ff | |
20283 | ldda [%i3+%g0]0x89,%l6 ! %l6 = 00000000ff000000 00000000ffffffff | |
20284 | ! Mem[0000000010081418] = 00000000, %l6 = 00000000ff000000 | |
20285 | ldsh [%i2+0x018],%l6 ! %l6 = 0000000000000000 | |
20286 | ! Starting 10 instruction Store Burst | |
20287 | ! Mem[0000000030041408] = 00000000, %l6 = 0000000000000000 | |
20288 | ldstuba [%i1+%o4]0x89,%l6 ! %l6 = 00000000000000ff | |
20289 | ||
20290 | p0_label_488: | |
20291 | ! %f0 = ff793d9d 76c6c4ff, Mem[0000000030041408] = ff000000 000000ff | |
20292 | stda %f0 ,[%i1+%o4]0x81 ! Mem[0000000030041408] = ff793d9d 76c6c4ff | |
20293 | ! %l0 = 00000000, %l1 = 00000000, Mem[0000000030101408] = ff00ffff 00000076 | |
20294 | stda %l0,[%i4+%o4]0x81 ! Mem[0000000030101408] = 00000000 00000000 | |
20295 | ! %f24 = 1f41ff76 2164159c, %l5 = ffffffffffffffff | |
20296 | ! Mem[0000000010101418] = 7600000000000000 | |
20297 | add %i4,0x018,%g1 | |
20298 | stda %f24,[%g1+%l5]ASI_PST32_PL ! Mem[0000000010101418] = 9c15642176ff411f | |
20299 | ! Mem[0000000010081410] = ffffffff, %l5 = ffffffffffffffff | |
20300 | ldstuba [%i2+%o5]0x88,%l5 ! %l5 = 000000ff000000ff | |
20301 | ! %f8 = 000000ff 000000ff, Mem[0000000010101410] = ff4573fc 00000076 | |
20302 | stda %f8 ,[%i4+%o5]0x80 ! Mem[0000000010101410] = 000000ff 000000ff | |
20303 | ! Mem[0000000030101410] = ffffffff, %l5 = 00000000000000ff | |
20304 | ldstuba [%i4+%o5]0x81,%l5 ! %l5 = 000000ff000000ff | |
20305 | ! %l0 = 00000000, %l1 = 00000000, Mem[0000000010001420] = 00ffff00 76c6c4ff | |
20306 | std %l0,[%i0+0x020] ! Mem[0000000010001420] = 00000000 00000000 | |
20307 | ! Mem[0000000010181400] = 000000ff, %l7 = 00000000ffffffff | |
20308 | ldstuba [%i6+%g0]0x88,%l7 ! %l7 = 000000ff000000ff | |
20309 | ! %l1 = 0000000000000000, Mem[0000000010001400] = 00000000 | |
20310 | stha %l1,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 | |
20311 | ! Starting 10 instruction Load Burst | |
20312 | ! Mem[0000000010001408] = 10ac7b59 00000000, %l0 = 00000000, %l1 = 00000000 | |
20313 | ldda [%i0+%o4]0x88,%l0 ! %l0 = 0000000000000000 0000000010ac7b59 | |
20314 | ||
20315 | p0_label_489: | |
20316 | ! Mem[0000000030181410] = 00000000, %l2 = 0000000000000000 | |
20317 | lduba [%i6+%o5]0x81,%l2 ! %l2 = 0000000000000000 | |
20318 | ! Mem[0000000010041420] = 1f41ff76 000000ff, %l2 = 00000000, %l3 = 00000000 | |
20319 | ldda [%i1+0x020]%asi,%l2 ! %l2 = 000000001f41ff76 00000000000000ff | |
20320 | ! Mem[0000000030141400] = ffffffff, %l2 = 000000001f41ff76 | |
20321 | ldsba [%i5+%g0]0x89,%l2 ! %l2 = ffffffffffffffff | |
20322 | ! Mem[00000000211c0000] = 9cff1a4c, %l0 = 0000000000000000 | |
20323 | lduh [%o2+%g0],%l0 ! %l0 = 0000000000009cff | |
20324 | ! Mem[0000000030141400] = ffffffffff000076, %f12 = ffffff9c 9c156421 | |
20325 | ldda [%i5+%g0]0x81,%f12 ! %f12 = ffffffff ff000076 | |
20326 | ! Mem[00000000100c1400] = ff000000, %l1 = 0000000010ac7b59 | |
20327 | ldub [%i3+0x003],%l1 ! %l1 = 0000000000000000 | |
20328 | ! Mem[0000000010001410] = 00000000 00000000, %l6 = 00000000, %l7 = 000000ff | |
20329 | ldda [%i0+%o5]0x88,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
20330 | ! Mem[0000000030101400] = ff940000, %l6 = 0000000000000000 | |
20331 | lduba [%i4+%g0]0x81,%l6 ! %l6 = 00000000000000ff | |
20332 | ! Mem[0000000030141410] = ff000076, %l2 = ffffffffffffffff | |
20333 | ldsba [%i5+%o5]0x89,%l2 ! %l2 = 0000000000000076 | |
20334 | ! Starting 10 instruction Store Burst | |
20335 | ! %f24 = 1f41ff76, Mem[0000000030001410] = ffff0000 | |
20336 | sta %f24,[%i0+%o5]0x81 ! Mem[0000000030001410] = 1f41ff76 | |
20337 | ||
20338 | p0_label_490: | |
20339 | ! %l2 = 00000076, %l3 = 000000ff, Mem[0000000030141408] = 2164159c 000000ff | |
20340 | stda %l2,[%i5+%o4]0x89 ! Mem[0000000030141408] = 00000076 000000ff | |
20341 | ! %f6 = ffffffff 79ff0000, %l3 = 00000000000000ff | |
20342 | ! Mem[0000000030141428] = 3739e890ffffac00 | |
20343 | add %i5,0x028,%g1 | |
20344 | stda %f6,[%g1+%l3]ASI_PST16_S ! Mem[0000000030141428] = ffffffff79ff0000 | |
20345 | ! Mem[000000001008140a] = 000000ff, %l1 = 0000000000000000 | |
20346 | ldstub [%i2+0x00a],%l1 ! %l1 = 00000000000000ff | |
20347 | ! %f8 = 000000ff 000000ff, Mem[00000000100c1428] = 174573fc 00000076 | |
20348 | std %f8 ,[%i3+0x028] ! Mem[00000000100c1428] = 000000ff 000000ff | |
20349 | ! %f30 = 00000000 00000000, Mem[00000000100c1430] = ffffffff 00000000 | |
20350 | std %f30,[%i3+0x030] ! Mem[00000000100c1430] = 00000000 00000000 | |
20351 | ! %f27 = ffffac00, Mem[0000000010001410] = 00000000 | |
20352 | sta %f27,[%i0+%o5]0x88 ! Mem[0000000010001410] = ffffac00 | |
20353 | ! %f2 = 0000ffff 00000076, %l7 = 0000000000000000 | |
20354 | ! Mem[0000000030101410] = ffffffffffffffff | |
20355 | add %i4,0x010,%g1 | |
20356 | stda %f2,[%g1+%l7]ASI_PST8_S ! Mem[0000000030101410] = ffffffffffffffff | |
20357 | ! Mem[0000000030141410] = ff000076, %l7 = 0000000000000000 | |
20358 | ldstuba [%i5+%o5]0x89,%l7 ! %l7 = 00000076000000ff | |
20359 | ! %l4 = 00000076, %l5 = 000000ff, Mem[0000000010041400] = ff0000ff 000000ff | |
20360 | stda %l4,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000076 000000ff | |
20361 | ! Starting 10 instruction Load Burst | |
20362 | ! Mem[0000000030041408] = ffc4c6769d3d79ff, %f20 = 760000ff ffffffff | |
20363 | ldda [%i1+%o4]0x89,%f20 ! %f20 = ffc4c676 9d3d79ff | |
20364 | ||
20365 | ! Check Point 98 for processor 0 | |
20366 | ||
20367 | set p0_check_pt_data_98,%g4 | |
20368 | rd %ccr,%g5 ! %g5 = 44 | |
20369 | ldx [%g4+0x08],%g2 | |
20370 | cmp %l0,%g2 ! %l0 = 0000000000009cff | |
20371 | bne %xcc,p0_reg_check_fail0 | |
20372 | mov 0xee0,%g1 | |
20373 | ldx [%g4+0x10],%g2 | |
20374 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
20375 | bne %xcc,p0_reg_check_fail1 | |
20376 | mov 0xee1,%g1 | |
20377 | ldx [%g4+0x18],%g2 | |
20378 | cmp %l2,%g2 ! %l2 = 0000000000000076 | |
20379 | bne %xcc,p0_reg_check_fail2 | |
20380 | mov 0xee2,%g1 | |
20381 | ldx [%g4+0x20],%g2 | |
20382 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
20383 | bne %xcc,p0_reg_check_fail3 | |
20384 | mov 0xee3,%g1 | |
20385 | ldx [%g4+0x28],%g2 | |
20386 | cmp %l4,%g2 ! %l4 = 0000000000000076 | |
20387 | bne %xcc,p0_reg_check_fail4 | |
20388 | mov 0xee4,%g1 | |
20389 | ldx [%g4+0x30],%g2 | |
20390 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
20391 | bne %xcc,p0_reg_check_fail5 | |
20392 | mov 0xee5,%g1 | |
20393 | ldx [%g4+0x38],%g2 | |
20394 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
20395 | bne %xcc,p0_reg_check_fail6 | |
20396 | mov 0xee6,%g1 | |
20397 | ldx [%g4+0x40],%g2 | |
20398 | cmp %l7,%g2 ! %l7 = 0000000000000076 | |
20399 | bne %xcc,p0_reg_check_fail7 | |
20400 | mov 0xee7,%g1 | |
20401 | ldx [%g4+0x48],%g3 | |
20402 | std %f0,[%g4] | |
20403 | ldx [%g4],%g2 | |
20404 | cmp %g3,%g2 ! %f0 = ff793d9d 76c6c4ff | |
20405 | bne %xcc,p0_freg_check_fail | |
20406 | mov 0xf00,%g1 | |
20407 | ldx [%g4+0x50],%g3 | |
20408 | std %f2,[%g4] | |
20409 | ldx [%g4],%g2 | |
20410 | cmp %g3,%g2 ! %f2 = 0000ffff 00000076 | |
20411 | bne %xcc,p0_freg_check_fail | |
20412 | mov 0xf02,%g1 | |
20413 | ldx [%g4+0x58],%g3 | |
20414 | std %f6,[%g4] | |
20415 | ldx [%g4],%g2 | |
20416 | cmp %g3,%g2 ! %f6 = ffffffff 79ff0000 | |
20417 | bne %xcc,p0_freg_check_fail | |
20418 | mov 0xf06,%g1 | |
20419 | ldx [%g4+0x60],%g3 | |
20420 | std %f12,[%g4] | |
20421 | ldx [%g4],%g2 | |
20422 | cmp %g3,%g2 ! %f12 = ffffffff ff000076 | |
20423 | bne %xcc,p0_freg_check_fail | |
20424 | mov 0xf12,%g1 | |
20425 | ldx [%g4+0x68],%g3 | |
20426 | std %f20,[%g4] | |
20427 | ldx [%g4],%g2 | |
20428 | cmp %g3,%g2 ! %f20 = ffc4c676 9d3d79ff | |
20429 | bne %xcc,p0_freg_check_fail | |
20430 | mov 0xf20,%g1 | |
20431 | ||
20432 | ! Check Point 98 completed | |
20433 | ||
20434 | ||
20435 | p0_label_491: | |
20436 | ! Mem[0000000010001434] = 00009c15, %l3 = 00000000000000ff | |
20437 | lduw [%i0+0x034],%l3 ! %l3 = 0000000000009c15 | |
20438 | ! %f28 = ff000000 00009400, Mem[0000000010181400] = ff000000 00000000 | |
20439 | stda %f28,[%i6+%g0]0x80 ! Mem[0000000010181400] = ff000000 00009400 | |
20440 | ! Mem[0000000030141410] = ff0000ff, %l4 = 0000000000000076 | |
20441 | ldswa [%i5+%o5]0x89,%l4 ! %l4 = ffffffffff0000ff | |
20442 | ! Mem[0000000010041408] = 000000c6, %f29 = 00009400 | |
20443 | lda [%i1+0x008]%asi,%f29 ! %f29 = 000000c6 | |
20444 | ! Mem[0000000030181408] = ff000000, %l4 = ffffffffff0000ff | |
20445 | ldsha [%i6+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
20446 | ! Mem[00000000218001c0] = 12f32a00, %l0 = 0000000000009cff | |
20447 | ldsba [%o3+0x1c0]%asi,%l0 ! %l0 = 0000000000000012 | |
20448 | ! Mem[0000000010081428] = 00000000, %l6 = 00000000000000ff | |
20449 | lduh [%i2+0x028],%l6 ! %l6 = 0000000000000000 | |
20450 | ! Mem[00000000218000c0] = 00008d82, %l2 = 0000000000000076 | |
20451 | ldsba [%o3+0x0c0]%asi,%l2 ! %l2 = 0000000000000000 | |
20452 | ! Mem[0000000010041400] = 00000076, %l4 = 0000000000000000 | |
20453 | ldsha [%i1+%g0]0x88,%l4 ! %l4 = 0000000000000076 | |
20454 | ! Starting 10 instruction Store Burst | |
20455 | ! %l0 = 00000012, %l1 = 00000000, Mem[0000000010181408] = 0000ff79 76000000 | |
20456 | stda %l0,[%i6+%o4]0x88 ! Mem[0000000010181408] = 00000012 00000000 | |
20457 | ||
20458 | p0_label_492: | |
20459 | ! %l3 = 0000000000009c15, Mem[00000000100c1400] = ff000000 | |
20460 | stwa %l3,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00009c15 | |
20461 | ! Mem[0000000030081400] = 000000ff, %l0 = 0000000000000012 | |
20462 | ldstuba [%i2+%g0]0x81,%l0 ! %l0 = 00000000000000ff | |
20463 | ! %l3 = 0000000000009c15, Mem[0000000010001408] = 00000000 | |
20464 | stha %l3,[%i0+%o4]0x88 ! Mem[0000000010001408] = 00009c15 | |
20465 | ! %l2 = 0000000000000000, Mem[0000000030041408] = ff793d9d | |
20466 | stwa %l2,[%i1+%o4]0x81 ! Mem[0000000030041408] = 00000000 | |
20467 | ! %f22 = 000000c6 00000000, Mem[0000000030081400] = ff0000ff 597bac10 | |
20468 | stda %f22,[%i2+%g0]0x81 ! Mem[0000000030081400] = 000000c6 00000000 | |
20469 | ! %f16 = ff000012 ffffffff ff0000ff ff000000 | |
20470 | ! %f20 = ffc4c676 9d3d79ff 000000c6 00000000 | |
20471 | ! %f24 = 1f41ff76 2164159c 3739e890 ffffac00 | |
20472 | ! %f28 = ff000000 000000c6 00000000 00000000 | |
20473 | stda %f16,[%i1]ASI_BLK_S ! Block Store to 0000000030041400 | |
20474 | ! %l4 = 0000000000000076, Mem[0000000010101408] = ff0000ff | |
20475 | stha %l4,[%i4+%o4]0x80 ! Mem[0000000010101408] = 007600ff | |
20476 | ! %l6 = 0000000000000000, Mem[0000000010041411] = 00000000 | |
20477 | stb %l6,[%i1+0x011] ! Mem[0000000010041410] = 00000000 | |
20478 | ! %f14 = 00000000 ff0000ff, Mem[0000000010081400] = ffffac00 3739e890 | |
20479 | stda %f14,[%i2+%g0]0x88 ! Mem[0000000010081400] = 00000000 ff0000ff | |
20480 | ! Starting 10 instruction Load Burst | |
20481 | ! Mem[0000000030081408] = ff000079, %l5 = 00000000000000ff | |
20482 | ldsba [%i2+%o4]0x89,%l5 ! %l5 = 0000000000000079 | |
20483 | ||
20484 | p0_label_493: | |
20485 | ! Mem[0000000010101410] = ff000000, %l4 = 0000000000000076 | |
20486 | lduwa [%i4+%o5]0x88,%l4 ! %l4 = 00000000ff000000 | |
20487 | ! Mem[0000000030101410] = ffffffff ffffffff, %l4 = ff000000, %l5 = 00000079 | |
20488 | ldda [%i4+%o5]0x89,%l4 ! %l4 = 00000000ffffffff 00000000ffffffff | |
20489 | ! Mem[0000000010181400] = ff000000, %l2 = 0000000000000000 | |
20490 | ldswa [%i6+%g0]0x80,%l2 ! %l2 = ffffffffff000000 | |
20491 | ! Mem[0000000030001408] = 000021ff, %l6 = 0000000000000000 | |
20492 | ldswa [%i0+%o4]0x89,%l6 ! %l6 = 00000000000021ff | |
20493 | ! Mem[00000000100c1410] = ffffffff, %l1 = 0000000000000000 | |
20494 | lduwa [%i3+%o5]0x88,%l1 ! %l1 = 00000000ffffffff | |
20495 | ! Mem[0000000010181418] = ff0000006600f8ff, %l0 = 0000000000000000 | |
20496 | ldx [%i6+0x018],%l0 ! %l0 = ff0000006600f8ff | |
20497 | ! Mem[0000000010081408] = 0000ffff, %l1 = 00000000ffffffff | |
20498 | ldswa [%i2+%o4]0x80,%l1 ! %l1 = 000000000000ffff | |
20499 | ! Mem[0000000010141408] = ffff000000000000, %l1 = 000000000000ffff | |
20500 | ldxa [%i5+%o4]0x80,%l1 ! %l1 = ffff000000000000 | |
20501 | ! Mem[0000000030101410] = ffffffffffffffff, %f12 = ffffffff ff000076 | |
20502 | ldda [%i4+%o5]0x81,%f12 ! %f12 = ffffffff ffffffff | |
20503 | ! Starting 10 instruction Store Burst | |
20504 | ! Mem[0000000010181410] = 45ffff00, %l6 = 00000000000021ff | |
20505 | ldstuba [%i6+%o5]0x80,%l6 ! %l6 = 00000045000000ff | |
20506 | ||
20507 | p0_label_494: | |
20508 | ! %f6 = ffffffff, Mem[0000000030001400] = 00000000 | |
20509 | sta %f6 ,[%i0+%g0]0x81 ! Mem[0000000030001400] = ffffffff | |
20510 | ! %l6 = 00000045, %l7 = 00000076, Mem[0000000010141400] = 00000000 00000000 | |
20511 | stda %l6,[%i5+%g0]0x88 ! Mem[0000000010141400] = 00000045 00000076 | |
20512 | ! Mem[0000000010101408] = ff007600, %l0 = ff0000006600f8ff | |
20513 | swapa [%i4+%o4]0x88,%l0 ! %l0 = 00000000ff007600 | |
20514 | ! %f13 = ffffffff, Mem[0000000030101410] = ffffffff | |
20515 | sta %f13,[%i4+%o5]0x89 ! Mem[0000000030101410] = ffffffff | |
20516 | ! %l5 = 00000000ffffffff, Mem[0000000030041400] = 120000ff | |
20517 | stha %l5,[%i1+%g0]0x89 ! Mem[0000000030041400] = 1200ffff | |
20518 | ! Mem[00000000211c0001] = 9cff1a4c, %l6 = 0000000000000045 | |
20519 | ldstub [%o2+0x001],%l6 ! %l6 = 000000ff000000ff | |
20520 | ! %f0 = ff793d9d 76c6c4ff, Mem[0000000030181408] = 000000ff 00000000 | |
20521 | stda %f0 ,[%i6+%o4]0x81 ! Mem[0000000030181408] = ff793d9d 76c6c4ff | |
20522 | ! Mem[00000000300c1408] = ff0000ff, %l4 = 00000000ffffffff | |
20523 | ldstuba [%i3+%o4]0x89,%l4 ! %l4 = 000000ff000000ff | |
20524 | ! %l4 = 00000000000000ff, Mem[0000000030141410] = ffffffffff0000ff | |
20525 | stxa %l4,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00000000000000ff | |
20526 | ! Starting 10 instruction Load Burst | |
20527 | membar #Sync ! Added by membar checker (80) | |
20528 | ! Mem[0000000010041408] = 000000c6, %l7 = 0000000000000076 | |
20529 | lduba [%i1+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
20530 | ||
20531 | p0_label_495: | |
20532 | ! Mem[0000000010101410] = 000000ff, %l1 = ffff000000000000 | |
20533 | ldsha [%i4+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
20534 | ! Mem[0000000010081408] = ffff0000, %f23 = 00000000 | |
20535 | lda [%i2+%o4]0x88,%f23 ! %f23 = ffff0000 | |
20536 | ! Mem[0000000010141410] = 790000ff ff00ffff, %l4 = 000000ff, %l5 = ffffffff | |
20537 | ldda [%i5+%o5]0x80,%l4 ! %l4 = 00000000790000ff 00000000ff00ffff | |
20538 | ! Mem[0000000010001400] = 00000000, %l1 = 0000000000000000 | |
20539 | ldsba [%i0+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
20540 | ! Mem[0000000010101408] = 6600f8ff, %l7 = 0000000000000000 | |
20541 | ldsba [%i4+%o4]0x88,%l7 ! %l7 = ffffffffffffffff | |
20542 | ! Mem[0000000030181408] = ff793d9d, %l3 = 0000000000009c15 | |
20543 | lduwa [%i6+%o4]0x81,%l3 ! %l3 = 00000000ff793d9d | |
20544 | ! Mem[0000000010141400] = 45000000 76000000 ffff0000 00000000 | |
20545 | ! Mem[0000000010141410] = 790000ff ff00ffff 00000012 ffffffff | |
20546 | ! Mem[0000000010141420] = 000000ff c7ec13bb 000000ff 0000ff03 | |
20547 | ! Mem[0000000010141430] = 7aff00ff 0000ff03 00004517 00000000 | |
20548 | ldda [%i5]ASI_BLK_P,%f0 ! Block Load from 0000000010141400 | |
20549 | ! Mem[0000000030181400] = ffffffff, %l5 = 00000000ff00ffff | |
20550 | ldsha [%i6+%g0]0x81,%l5 ! %l5 = ffffffffffffffff | |
20551 | ! Mem[0000000010101400] = ff000000 597bac10 fff80066 00000000 | |
20552 | ! Mem[0000000010101410] = 000000ff 000000ff 9c156421 76ff411f | |
20553 | ! Mem[0000000010101420] = 00003403 00000000 ff000000 76ff411f | |
20554 | ! Mem[0000000010101430] = 00000000 000000ff 00000000 003400ff | |
20555 | ldda [%i4]ASI_BLK_AIUPL,%f0 ! Block Load from 0000000010101400 | |
20556 | ! Starting 10 instruction Store Burst | |
20557 | membar #Sync ! Added by membar checker (81) | |
20558 | ! %l2 = ffffffffff000000, Mem[0000000010141408] = 0000ffff | |
20559 | stha %l2,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000000 | |
20560 | ||
20561 | ! Check Point 99 for processor 0 | |
20562 | ||
20563 | set p0_check_pt_data_99,%g4 | |
20564 | rd %ccr,%g5 ! %g5 = 44 | |
20565 | ldx [%g4+0x08],%g2 | |
20566 | cmp %l0,%g2 ! %l0 = 00000000ff007600 | |
20567 | bne %xcc,p0_reg_check_fail0 | |
20568 | mov 0xee0,%g1 | |
20569 | ldx [%g4+0x10],%g2 | |
20570 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
20571 | bne %xcc,p0_reg_check_fail1 | |
20572 | mov 0xee1,%g1 | |
20573 | ldx [%g4+0x18],%g2 | |
20574 | cmp %l2,%g2 ! %l2 = ffffffffff000000 | |
20575 | bne %xcc,p0_reg_check_fail2 | |
20576 | mov 0xee2,%g1 | |
20577 | ldx [%g4+0x20],%g2 | |
20578 | cmp %l3,%g2 ! %l3 = 00000000ff793d9d | |
20579 | bne %xcc,p0_reg_check_fail3 | |
20580 | mov 0xee3,%g1 | |
20581 | ldx [%g4+0x28],%g2 | |
20582 | cmp %l4,%g2 ! %l4 = 00000000790000ff | |
20583 | bne %xcc,p0_reg_check_fail4 | |
20584 | mov 0xee4,%g1 | |
20585 | ldx [%g4+0x30],%g2 | |
20586 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
20587 | bne %xcc,p0_reg_check_fail5 | |
20588 | mov 0xee5,%g1 | |
20589 | ldx [%g4+0x38],%g2 | |
20590 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
20591 | bne %xcc,p0_reg_check_fail6 | |
20592 | mov 0xee6,%g1 | |
20593 | ldx [%g4+0x40],%g2 | |
20594 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
20595 | bne %xcc,p0_reg_check_fail7 | |
20596 | mov 0xee7,%g1 | |
20597 | ldx [%g4+0x48],%g3 | |
20598 | std %f0,[%g4] | |
20599 | ldx [%g4],%g2 | |
20600 | cmp %g3,%g2 ! %f0 = 10ac7b59 000000ff | |
20601 | bne %xcc,p0_freg_check_fail | |
20602 | mov 0xf00,%g1 | |
20603 | ldx [%g4+0x50],%g3 | |
20604 | std %f2,[%g4] | |
20605 | ldx [%g4],%g2 | |
20606 | cmp %g3,%g2 ! %f2 = 00000000 6600f8ff | |
20607 | bne %xcc,p0_freg_check_fail | |
20608 | mov 0xf02,%g1 | |
20609 | ldx [%g4+0x58],%g3 | |
20610 | std %f4,[%g4] | |
20611 | ldx [%g4],%g2 | |
20612 | cmp %g3,%g2 ! %f4 = ff000000 ff000000 | |
20613 | bne %xcc,p0_freg_check_fail | |
20614 | mov 0xf04,%g1 | |
20615 | ldx [%g4+0x60],%g3 | |
20616 | std %f6,[%g4] | |
20617 | ldx [%g4],%g2 | |
20618 | cmp %g3,%g2 ! %f6 = 1f41ff76 2164159c | |
20619 | bne %xcc,p0_freg_check_fail | |
20620 | mov 0xf06,%g1 | |
20621 | ldx [%g4+0x68],%g3 | |
20622 | std %f8,[%g4] | |
20623 | ldx [%g4],%g2 | |
20624 | cmp %g3,%g2 ! %f8 = 00000000 03340000 | |
20625 | bne %xcc,p0_freg_check_fail | |
20626 | mov 0xf08,%g1 | |
20627 | ldx [%g4+0x70],%g3 | |
20628 | std %f10,[%g4] | |
20629 | ldx [%g4],%g2 | |
20630 | cmp %g3,%g2 ! %f10 = 1f41ff76 000000ff | |
20631 | bne %xcc,p0_freg_check_fail | |
20632 | mov 0xf10,%g1 | |
20633 | ldx [%g4+0x78],%g3 | |
20634 | std %f12,[%g4] | |
20635 | ldx [%g4],%g2 | |
20636 | cmp %g3,%g2 ! %f12 = ff000000 00000000 | |
20637 | bne %xcc,p0_freg_check_fail | |
20638 | mov 0xf12,%g1 | |
20639 | ldx [%g4+0x80],%g3 | |
20640 | std %f14,[%g4] | |
20641 | ldx [%g4],%g2 | |
20642 | cmp %g3,%g2 ! %f14 = ff003400 00000000 | |
20643 | bne %xcc,p0_freg_check_fail | |
20644 | mov 0xf14,%g1 | |
20645 | ldx [%g4+0x88],%g3 | |
20646 | std %f22,[%g4] | |
20647 | ldx [%g4],%g2 | |
20648 | cmp %g3,%g2 ! %f22 = 000000c6 ffff0000 | |
20649 | bne %xcc,p0_freg_check_fail | |
20650 | mov 0xf22,%g1 | |
20651 | ldx [%g4+0x90],%g3 | |
20652 | std %f28,[%g4] | |
20653 | ldx [%g4],%g2 | |
20654 | cmp %g3,%g2 ! %f28 = ff000000 000000c6 | |
20655 | bne %xcc,p0_freg_check_fail | |
20656 | mov 0xf28,%g1 | |
20657 | ||
20658 | ! Check Point 99 completed | |
20659 | ||
20660 | ||
20661 | p0_label_496: | |
20662 | ! %l1 = 0000000000000000, Mem[0000000030181410] = 00000000 | |
20663 | stha %l1,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 | |
20664 | ! %l4 = 00000000790000ff, Mem[0000000030101410] = ffffffff | |
20665 | stwa %l4,[%i4+%o5]0x89 ! Mem[0000000030101410] = 790000ff | |
20666 | ! %l1 = 0000000000000000, Mem[0000000010181410] = ffffff00c6000000 | |
20667 | stxa %l1,[%i6+%o5]0x80 ! Mem[0000000010181410] = 0000000000000000 | |
20668 | ! %l0 = 00000000ff007600, Mem[0000000030041408] = ff0000ff | |
20669 | stha %l0,[%i1+%o4]0x81 ! Mem[0000000030041408] = 760000ff | |
20670 | ! %l0 = 00000000ff007600, Mem[0000000010181410] = 00000000 | |
20671 | stba %l0,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00000000 | |
20672 | ! %f0 = 10ac7b59 000000ff, Mem[0000000030141400] = ffffffff 760000ff | |
20673 | stda %f0 ,[%i5+%g0]0x89 ! Mem[0000000030141400] = 10ac7b59 000000ff | |
20674 | ! %l0 = 00000000ff007600, Mem[0000000010181400] = 000000ff | |
20675 | stha %l0,[%i6+%g0]0x88 ! Mem[0000000010181400] = 00007600 | |
20676 | ! %l6 = 00000000000000ff, Mem[0000000010101424] = 00000000, %asi = 80 | |
20677 | stha %l6,[%i4+0x024]%asi ! Mem[0000000010101424] = 00ff0000 | |
20678 | ! Mem[0000000030001408] = ff210000, %l1 = 0000000000000000 | |
20679 | swapa [%i0+%o4]0x81,%l1 ! %l1 = 00000000ff210000 | |
20680 | ! Starting 10 instruction Load Burst | |
20681 | ! Mem[00000000300c1408] = ff0000ff, %l2 = ffffffffff000000 | |
20682 | ldswa [%i3+%o4]0x89,%l2 ! %l2 = ffffffffff0000ff | |
20683 | ||
20684 | p0_label_497: | |
20685 | ! Mem[0000000030101400] = 000094ff, %l2 = ffffffffff0000ff | |
20686 | ldswa [%i4+%g0]0x89,%l2 ! %l2 = 00000000000094ff | |
20687 | membar #Sync ! Added by membar checker (82) | |
20688 | ! Mem[0000000010101400] = ff000000 597bac10 fff80066 00000000 | |
20689 | ! Mem[0000000010101410] = 000000ff 000000ff 9c156421 76ff411f | |
20690 | ! Mem[0000000010101420] = 00003403 00ff0000 ff000000 76ff411f | |
20691 | ! Mem[0000000010101430] = 00000000 000000ff 00000000 003400ff | |
20692 | ldda [%i4]ASI_BLK_P,%f0 ! Block Load from 0000000010101400 | |
20693 | ! Mem[00000000201c0000] = ffff9457, %l6 = 00000000000000ff | |
20694 | lduba [%o0+0x000]%asi,%l6 ! %l6 = 00000000000000ff | |
20695 | ! Mem[0000000030041400] = ffffffff 1200ffff, %l4 = 790000ff, %l5 = ffffffff | |
20696 | ldda [%i1+%g0]0x89,%l4 ! %l4 = 000000001200ffff 00000000ffffffff | |
20697 | ! Mem[0000000010141410] = ffff00ff ff000079, %l6 = 000000ff, %l7 = ffffffff | |
20698 | ldda [%i5+%o5]0x88,%l6 ! %l6 = 00000000ff000079 00000000ffff00ff | |
20699 | ! Mem[000000001000142c] = 00000000, %l3 = 00000000ff793d9d | |
20700 | ldsba [%i0+0x02d]%asi,%l3 ! %l3 = 0000000000000000 | |
20701 | ! Mem[00000000211c0000] = 9cff1a4c, %l1 = 00000000ff210000 | |
20702 | ldsb [%o2+%g0],%l1 ! %l1 = ffffffffffffff9c | |
20703 | ! Mem[0000000010181400] = 00760000 00009400, %l2 = 000094ff, %l3 = 00000000 | |
20704 | ldda [%i6+%g0]0x80,%l2 ! %l2 = 0000000000760000 0000000000009400 | |
20705 | ! Mem[0000000030141400] = 000000ff, %l5 = 00000000ffffffff | |
20706 | lduha [%i5+%g0]0x89,%l5 ! %l5 = 00000000000000ff | |
20707 | ! Starting 10 instruction Store Burst | |
20708 | ! Mem[0000000030181400] = ffffffff, %l7 = 00000000ffff00ff | |
20709 | swapa [%i6+%g0]0x89,%l7 ! %l7 = 00000000ffffffff | |
20710 | ||
20711 | p0_label_498: | |
20712 | ! Mem[0000000010041410] = 00000000, %l3 = 0000000000009400 | |
20713 | swapa [%i1+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
20714 | ! %l6 = ff000079, %l7 = ffffffff, Mem[0000000010081430] = 00000000 000000ff | |
20715 | std %l6,[%i2+0x030] ! Mem[0000000010081430] = ff000079 ffffffff | |
20716 | ! %l4 = 000000001200ffff, Mem[0000000010081418] = 00000000, %asi = 80 | |
20717 | stha %l4,[%i2+0x018]%asi ! Mem[0000000010081418] = ffff0000 | |
20718 | ! %f18 = ff0000ff ff000000, %l5 = 00000000000000ff | |
20719 | ! Mem[0000000030001428] = 159c0000ff000000 | |
20720 | add %i0,0x028,%g1 | |
20721 | stda %f18,[%g1+%l5]ASI_PST32_SL ! Mem[0000000030001428] = 000000ffff0000ff | |
20722 | ! %l3 = 0000000000000000, Mem[0000000010181408] = 00000012 | |
20723 | stwa %l3,[%i6+%o4]0x88 ! Mem[0000000010181408] = 00000000 | |
20724 | membar #Sync ! Added by membar checker (83) | |
20725 | ! %f16 = ff000012, Mem[0000000010101438] = 00000000 | |
20726 | st %f16,[%i4+0x038] ! Mem[0000000010101438] = ff000012 | |
20727 | ! %f28 = ff000000 000000c6, Mem[0000000010001428] = 00000000 00000000 | |
20728 | std %f28,[%i0+0x028] ! Mem[0000000010001428] = ff000000 000000c6 | |
20729 | ! Mem[0000000030181400] = ffff00ff, %l0 = 00000000ff007600 | |
20730 | ldstuba [%i6+%g0]0x89,%l0 ! %l0 = 000000ff000000ff | |
20731 | ! %l5 = 00000000000000ff, Mem[00000000201c0001] = ffff9457 | |
20732 | stb %l5,[%o0+0x001] ! Mem[00000000201c0000] = ffff9457 | |
20733 | ! Starting 10 instruction Load Burst | |
20734 | ! Mem[0000000010081430] = ff000079, %f15 = 003400ff | |
20735 | ld [%i2+0x030],%f15 ! %f15 = ff000079 | |
20736 | ||
20737 | p0_label_499: | |
20738 | ! Mem[0000000010101410] = 000000ff, %l5 = 00000000000000ff | |
20739 | lduha [%i4+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
20740 | ! Mem[0000000030081400] = 000000c6, %l1 = ffffffffffffff9c | |
20741 | lduwa [%i2+%g0]0x81,%l1 ! %l1 = 00000000000000c6 | |
20742 | ! Mem[00000000300c1408] = ff0000ff0000ffff, %l5 = 0000000000000000 | |
20743 | ldxa [%i3+%o4]0x81,%l5 ! %l5 = ff0000ff0000ffff | |
20744 | ! Mem[0000000030101400] = ff000000 000094ff, %l4 = 1200ffff, %l5 = 0000ffff | |
20745 | ldda [%i4+%g0]0x89,%l4 ! %l4 = 00000000000094ff 00000000ff000000 | |
20746 | ! Mem[0000000030101408] = 00000000, %l2 = 0000000000760000 | |
20747 | ldsha [%i4+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
20748 | ! Mem[0000000010141408] = 00000000 00000000, %l2 = 00000000, %l3 = 00000000 | |
20749 | ldda [%i5+%o4]0x88,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
20750 | ! Mem[0000000010081408] = 0000ffff, %l5 = 00000000ff000000 | |
20751 | ldsh [%i2+0x00a],%l5 ! %l5 = ffffffffffffffff | |
20752 | ! Mem[00000000100c1408] = 00000000, %l5 = ffffffffffffffff | |
20753 | ldsba [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
20754 | ! Mem[0000000010001408] = 00009c15, %l6 = 00000000ff000079 | |
20755 | ldsha [%i0+%o4]0x88,%l6 ! %l6 = ffffffffffff9c15 | |
20756 | ! Starting 10 instruction Store Burst | |
20757 | ! %l7 = 00000000ffffffff, Mem[0000000010181430] = 10ac7b593eda2778 | |
20758 | stx %l7,[%i6+0x030] ! Mem[0000000010181430] = 00000000ffffffff | |
20759 | ||
20760 | p0_label_500: | |
20761 | ! %f8 = 00003403 00ff0000, Mem[0000000030041408] = ff000076 000000ff | |
20762 | stda %f8 ,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00003403 00ff0000 | |
20763 | ! Mem[0000000010181400] = 00760000, %l3 = 0000000000000000 | |
20764 | ldstuba [%i6+%g0]0x80,%l3 ! %l3 = 00000000000000ff | |
20765 | ! %f10 = ff000000 76ff411f, %l2 = 0000000000000000 | |
20766 | ! Mem[0000000010181438] = ff00000000000000 | |
20767 | add %i6,0x038,%g1 | |
20768 | stda %f10,[%g1+%l2]ASI_PST16_P ! Mem[0000000010181438] = ff00000000000000 | |
20769 | ! Mem[0000000030141408] = 00000076, %l6 = ffffffffffff9c15 | |
20770 | ldstuba [%i5+%o4]0x89,%l6 ! %l6 = 00000076000000ff | |
20771 | ! Mem[0000000010101434] = 000000ff, %l1 = 000000c6, %l0 = 000000ff | |
20772 | add %i4,0x34,%g1 | |
20773 | casa [%g1]0x80,%l1,%l0 ! %l0 = 00000000000000ff | |
20774 | ! %f14 = 00000000 ff000079, Mem[0000000030081408] = ff000079 00000000 | |
20775 | stda %f14,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000000 ff000079 | |
20776 | ! Mem[0000000010141400] = 00000045, %l3 = 0000000000000000 | |
20777 | swapa [%i5+%g0]0x88,%l3 ! %l3 = 0000000000000045 | |
20778 | ! Mem[0000000010101400] = 000000ff, %l3 = 0000000000000045 | |
20779 | ldstuba [%i4+%g0]0x88,%l3 ! %l3 = 000000ff000000ff | |
20780 | ! %f16 = ff000012 ffffffff, %l6 = 0000000000000076 | |
20781 | ! Mem[00000000300c1408] = ff0000ff0000ffff | |
20782 | add %i3,0x008,%g1 | |
20783 | stda %f16,[%g1+%l6]ASI_PST8_SL ! Mem[00000000300c1408] = ffffffff120000ff | |
20784 | ! Starting 10 instruction Load Burst | |
20785 | ! Mem[0000000010081400] = 00000000ff0000ff, %f6 = 9c156421 76ff411f | |
20786 | ldda [%i2+%g0]0x88,%f6 ! %f6 = 00000000 ff0000ff | |
20787 | ||
20788 | ! Check Point 100 for processor 0 | |
20789 | ||
20790 | set p0_check_pt_data_100,%g4 | |
20791 | rd %ccr,%g5 ! %g5 = 44 | |
20792 | ldx [%g4+0x08],%g2 | |
20793 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
20794 | bne %xcc,p0_reg_check_fail0 | |
20795 | mov 0xee0,%g1 | |
20796 | ldx [%g4+0x10],%g2 | |
20797 | cmp %l1,%g2 ! %l1 = 00000000000000c6 | |
20798 | bne %xcc,p0_reg_check_fail1 | |
20799 | mov 0xee1,%g1 | |
20800 | ldx [%g4+0x18],%g2 | |
20801 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
20802 | bne %xcc,p0_reg_check_fail2 | |
20803 | mov 0xee2,%g1 | |
20804 | ldx [%g4+0x20],%g2 | |
20805 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
20806 | bne %xcc,p0_reg_check_fail3 | |
20807 | mov 0xee3,%g1 | |
20808 | ldx [%g4+0x28],%g2 | |
20809 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
20810 | bne %xcc,p0_reg_check_fail5 | |
20811 | mov 0xee5,%g1 | |
20812 | ldx [%g4+0x30],%g2 | |
20813 | cmp %l6,%g2 ! %l6 = 0000000000000076 | |
20814 | bne %xcc,p0_reg_check_fail6 | |
20815 | mov 0xee6,%g1 | |
20816 | ldx [%g4+0x38],%g3 | |
20817 | std %f0,[%g4] | |
20818 | ldx [%g4],%g2 | |
20819 | cmp %g3,%g2 ! %f0 = ff000000 597bac10 | |
20820 | bne %xcc,p0_freg_check_fail | |
20821 | mov 0xf00,%g1 | |
20822 | ldx [%g4+0x40],%g3 | |
20823 | std %f2,[%g4] | |
20824 | ldx [%g4],%g2 | |
20825 | cmp %g3,%g2 ! %f2 = fff80066 00000000 | |
20826 | bne %xcc,p0_freg_check_fail | |
20827 | mov 0xf02,%g1 | |
20828 | ldx [%g4+0x48],%g3 | |
20829 | std %f4,[%g4] | |
20830 | ldx [%g4],%g2 | |
20831 | cmp %g3,%g2 ! %f4 = 000000ff 000000ff | |
20832 | bne %xcc,p0_freg_check_fail | |
20833 | mov 0xf04,%g1 | |
20834 | ldx [%g4+0x50],%g3 | |
20835 | std %f6,[%g4] | |
20836 | ldx [%g4],%g2 | |
20837 | cmp %g3,%g2 ! %f6 = 00000000 ff0000ff | |
20838 | bne %xcc,p0_freg_check_fail | |
20839 | mov 0xf06,%g1 | |
20840 | ldx [%g4+0x58],%g3 | |
20841 | std %f8,[%g4] | |
20842 | ldx [%g4],%g2 | |
20843 | cmp %g3,%g2 ! %f8 = 00003403 00ff0000 | |
20844 | bne %xcc,p0_freg_check_fail | |
20845 | mov 0xf08,%g1 | |
20846 | ldx [%g4+0x60],%g3 | |
20847 | std %f10,[%g4] | |
20848 | ldx [%g4],%g2 | |
20849 | cmp %g3,%g2 ! %f10 = ff000000 76ff411f | |
20850 | bne %xcc,p0_freg_check_fail | |
20851 | mov 0xf10,%g1 | |
20852 | ldx [%g4+0x68],%g3 | |
20853 | std %f12,[%g4] | |
20854 | ldx [%g4],%g2 | |
20855 | cmp %g3,%g2 ! %f12 = 00000000 000000ff | |
20856 | bne %xcc,p0_freg_check_fail | |
20857 | mov 0xf12,%g1 | |
20858 | ldx [%g4+0x70],%g3 | |
20859 | std %f14,[%g4] | |
20860 | ldx [%g4],%g2 | |
20861 | cmp %g3,%g2 ! %f14 = 00000000 ff000079 | |
20862 | bne %xcc,p0_freg_check_fail | |
20863 | mov 0xf14,%g1 | |
20864 | ||
20865 | ! Check Point 100 completed | |
20866 | ||
20867 | ||
20868 | p0_label_501: | |
20869 | ! Mem[0000000010081400] = ff0000ff, %l4 = 00000000000094ff | |
20870 | lduha [%i2+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
20871 | ! Mem[0000000010001404] = 00000000, %l2 = 0000000000000000 | |
20872 | ldsba [%i0+0x004]%asi,%l2 ! %l2 = 0000000000000000 | |
20873 | ! Mem[0000000030081400] = 000000c6, %l4 = 00000000000000ff | |
20874 | lduwa [%i2+%g0]0x81,%l4 ! %l4 = 00000000000000c6 | |
20875 | ! Mem[0000000030001408] = 00000000, %l2 = 0000000000000000 | |
20876 | lduha [%i0+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
20877 | ! Mem[0000000010181400] = 000076ff, %l3 = 00000000000000ff | |
20878 | lduha [%i6+%g0]0x88,%l3 ! %l3 = 00000000000076ff | |
20879 | ! Mem[0000000010001410] = 00acffff 00000000, %l4 = 000000c6, %l5 = 00000000 | |
20880 | ldda [%i0+0x010]%asi,%l4 ! %l4 = 0000000000acffff 0000000000000000 | |
20881 | ! Mem[0000000010141408] = 00000000 00000000, %l4 = 00acffff, %l5 = 00000000 | |
20882 | ldda [%i5+0x008]%asi,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
20883 | ! Mem[0000000010001430] = 000023e3, %l2 = 0000000000000000 | |
20884 | lduha [%i0+0x030]%asi,%l2 ! %l2 = 0000000000000000 | |
20885 | ! Mem[0000000030041408] = 0000ff00, %l4 = 0000000000000000 | |
20886 | ldswa [%i1+%o4]0x81,%l4 ! %l4 = 000000000000ff00 | |
20887 | ! Starting 10 instruction Store Burst | |
20888 | ! %l4 = 0000ff00, %l5 = 00000000, Mem[0000000010001408] = 159c0000 597bac10 | |
20889 | stda %l4,[%i0+%o4]0x80 ! Mem[0000000010001408] = 0000ff00 00000000 | |
20890 | ||
20891 | p0_label_502: | |
20892 | ! %l7 = 00000000ffffffff, Mem[0000000010101408] = fff80066 | |
20893 | stwa %l7,[%i4+%o4]0x80 ! Mem[0000000010101408] = ffffffff | |
20894 | ! %f8 = 00003403, Mem[0000000030001410] = 76ff411f | |
20895 | sta %f8 ,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00003403 | |
20896 | ! %f23 = ffff0000, Mem[0000000030041408] = 00ff0000 | |
20897 | sta %f23,[%i1+%o4]0x89 ! Mem[0000000030041408] = ffff0000 | |
20898 | ! %l0 = 00000000000000ff, Mem[0000000010001410] = 00acffff | |
20899 | stwa %l0,[%i0+%o5]0x80 ! Mem[0000000010001410] = 000000ff | |
20900 | ! Mem[0000000010041410] = 00009400, %l0 = 00000000000000ff | |
20901 | ldstuba [%i1+%o5]0x88,%l0 ! %l0 = 00000000000000ff | |
20902 | ! Mem[0000000030141410] = ff000000, %l3 = 00000000000076ff | |
20903 | ldstuba [%i5+%o5]0x81,%l3 ! %l3 = 000000ff000000ff | |
20904 | ! %l7 = 00000000ffffffff, Mem[00000000300c1408] = ff000012ffffffff | |
20905 | stxa %l7,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 00000000ffffffff | |
20906 | ! Mem[0000000030141410] = 000000ff, %l4 = 000000000000ff00 | |
20907 | swapa [%i5+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
20908 | ! Mem[00000000100c1400] = 00009c15, %l2 = 0000000000000000 | |
20909 | ldstuba [%i3+%g0]0x80,%l2 ! %l2 = 00000000000000ff | |
20910 | ! Starting 10 instruction Load Burst | |
20911 | ! Mem[00000000100c1400] = 159c00ff, %l1 = 00000000000000c6 | |
20912 | lduwa [%i3+%g0]0x88,%l1 ! %l1 = 00000000159c00ff | |
20913 | ||
20914 | p0_label_503: | |
20915 | ! Mem[00000000100c1408] = 00000000, %l3 = 00000000000000ff | |
20916 | ldswa [%i3+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
20917 | ! Mem[0000000010001410] = ff000000, %l4 = 00000000000000ff | |
20918 | ldswa [%i0+%o5]0x88,%l4 ! %l4 = ffffffffff000000 | |
20919 | ! Mem[0000000010001400] = 0000000000000000, %f14 = 00000000 ff000079 | |
20920 | ldda [%i0+%g0]0x88,%f14 ! %f14 = 00000000 00000000 | |
20921 | ! Mem[0000000010101408] = ffffffff, %l2 = 0000000000000000 | |
20922 | ldsba [%i4+%o4]0x88,%l2 ! %l2 = ffffffffffffffff | |
20923 | ! Mem[0000000010141408] = 0000000000000000, %l3 = 0000000000000000 | |
20924 | ldxa [%i5+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
20925 | ! Mem[0000000010181400] = 000076ff, %l1 = 00000000159c00ff | |
20926 | ldswa [%i6+%g0]0x88,%l1 ! %l1 = 00000000000076ff | |
20927 | ! Mem[0000000030081410] = ff0000ff, %l2 = ffffffffffffffff | |
20928 | lduha [%i2+%o5]0x89,%l2 ! %l2 = 00000000000000ff | |
20929 | ! Mem[00000000100c142c] = 000000ff, %l7 = 00000000ffffffff | |
20930 | ldsb [%i3+0x02e],%l7 ! %l7 = 0000000000000000 | |
20931 | ! Mem[00000000211c0000] = 9cff1a4c, %l4 = ffffffffff000000 | |
20932 | lduba [%o2+0x001]%asi,%l4 ! %l4 = 00000000000000ff | |
20933 | ! Starting 10 instruction Store Burst | |
20934 | ! %l4 = 00000000000000ff, Mem[0000000010041410] = ff940000 | |
20935 | stwa %l4,[%i1+%o5]0x80 ! Mem[0000000010041410] = 000000ff | |
20936 | ||
20937 | p0_label_504: | |
20938 | ! %l6 = 0000000000000076, Mem[0000000010081410] = fc734517ffffffff | |
20939 | stxa %l6,[%i2+%o5]0x88 ! Mem[0000000010081410] = 0000000000000076 | |
20940 | ! %l0 = 0000000000000000, Mem[00000000100c1438] = ff000000, %asi = 80 | |
20941 | stwa %l0,[%i3+0x038]%asi ! Mem[00000000100c1438] = 00000000 | |
20942 | ! Mem[0000000030001410] = 03340000, %l1 = 00000000000076ff | |
20943 | ldstuba [%i0+%o5]0x81,%l1 ! %l1 = 00000003000000ff | |
20944 | ! Mem[0000000030041408] = ffff0000, %l1 = 0000000000000003 | |
20945 | swapa [%i1+%o4]0x89,%l1 ! %l1 = 00000000ffff0000 | |
20946 | ! %l2 = 00000000000000ff, Mem[0000000030181400] = ff00ffff | |
20947 | stha %l2,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00ffffff | |
20948 | ! %f14 = 00000000, Mem[0000000010041400] = 76000000 | |
20949 | sta %f14,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000 | |
20950 | ! %l6 = 0000000000000076, Mem[0000000010041408] = 000000c6 | |
20951 | stba %l6,[%i1+%o4]0x80 ! Mem[0000000010041408] = 760000c6 | |
20952 | ! Mem[0000000010001408] = 0000ff00, %l4 = 00000000000000ff | |
20953 | swapa [%i0+%o4]0x80,%l4 ! %l4 = 000000000000ff00 | |
20954 | ! Mem[00000000300c1408] = ffffffff, %l6 = 0000000000000076 | |
20955 | ldstuba [%i3+%o4]0x89,%l6 ! %l6 = 000000ff000000ff | |
20956 | ! Starting 10 instruction Load Burst | |
20957 | ! Mem[0000000030141410] = 0000ff00, %l1 = 00000000ffff0000 | |
20958 | ldsba [%i5+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
20959 | ||
20960 | p0_label_505: | |
20961 | ! Mem[0000000030141400] = ff000000, %l2 = 00000000000000ff | |
20962 | ldsba [%i5+%g0]0x81,%l2 ! %l2 = ffffffffffffffff | |
20963 | ! Mem[0000000030141400] = 000000ff, %l1 = 0000000000000000 | |
20964 | ldsha [%i5+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
20965 | ! Mem[00000000100c1430] = 00000000, %l7 = 0000000000000000 | |
20966 | lduba [%i3+0x030]%asi,%l7 ! %l7 = 0000000000000000 | |
20967 | ! Mem[0000000010041410] = ffffffff ff000000, %l6 = 000000ff, %l7 = 00000000 | |
20968 | ldda [%i1+%o5]0x88,%l6 ! %l6 = 00000000ff000000 00000000ffffffff | |
20969 | ! Mem[0000000020800000] = ffff8470, %l7 = 00000000ffffffff | |
20970 | lduba [%o1+0x000]%asi,%l7 ! %l7 = 00000000000000ff | |
20971 | ! Mem[0000000030001408] = 00000000, %l6 = 00000000ff000000 | |
20972 | lduba [%i0+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
20973 | ! Mem[0000000030041410] = ff793d9d76c6c4ff, %l1 = 00000000000000ff | |
20974 | ldxa [%i1+%o5]0x89,%l1 ! %l1 = ff793d9d76c6c4ff | |
20975 | ! Mem[0000000010041410] = 000000ff ffffffff, %l4 = 0000ff00, %l5 = 00000000 | |
20976 | ldda [%i1+%o5]0x80,%l4 ! %l4 = 00000000000000ff 00000000ffffffff | |
20977 | ! Mem[0000000030181408] = 9d3d79ff, %l4 = 00000000000000ff | |
20978 | lduwa [%i6+%o4]0x89,%l4 ! %l4 = 000000009d3d79ff | |
20979 | ! Starting 10 instruction Store Burst | |
20980 | ! Mem[0000000010101400] = 000000ff, %l5 = 00000000ffffffff | |
20981 | ldstuba [%i4+%g0]0x88,%l5 ! %l5 = 000000ff000000ff | |
20982 | ||
20983 | ! Check Point 101 for processor 0 | |
20984 | ||
20985 | set p0_check_pt_data_101,%g4 | |
20986 | rd %ccr,%g5 ! %g5 = 44 | |
20987 | ldx [%g4+0x08],%g2 | |
20988 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
20989 | bne %xcc,p0_reg_check_fail0 | |
20990 | mov 0xee0,%g1 | |
20991 | ldx [%g4+0x10],%g2 | |
20992 | cmp %l1,%g2 ! %l1 = ff793d9d76c6c4ff | |
20993 | bne %xcc,p0_reg_check_fail1 | |
20994 | mov 0xee1,%g1 | |
20995 | ldx [%g4+0x18],%g2 | |
20996 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
20997 | bne %xcc,p0_reg_check_fail2 | |
20998 | mov 0xee2,%g1 | |
20999 | ldx [%g4+0x20],%g2 | |
21000 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
21001 | bne %xcc,p0_reg_check_fail3 | |
21002 | mov 0xee3,%g1 | |
21003 | ldx [%g4+0x28],%g2 | |
21004 | cmp %l4,%g2 ! %l4 = 000000009d3d79ff | |
21005 | bne %xcc,p0_reg_check_fail4 | |
21006 | mov 0xee4,%g1 | |
21007 | ldx [%g4+0x30],%g2 | |
21008 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
21009 | bne %xcc,p0_reg_check_fail5 | |
21010 | mov 0xee5,%g1 | |
21011 | ldx [%g4+0x38],%g2 | |
21012 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
21013 | bne %xcc,p0_reg_check_fail6 | |
21014 | mov 0xee6,%g1 | |
21015 | ldx [%g4+0x40],%g2 | |
21016 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
21017 | bne %xcc,p0_reg_check_fail7 | |
21018 | mov 0xee7,%g1 | |
21019 | ldx [%g4+0x48],%g3 | |
21020 | std %f4,[%g4] | |
21021 | ldx [%g4],%g2 | |
21022 | cmp %g3,%g2 ! %f4 = 000000ff 000000ff | |
21023 | bne %xcc,p0_freg_check_fail | |
21024 | mov 0xf04,%g1 | |
21025 | ldx [%g4+0x50],%g3 | |
21026 | std %f6,[%g4] | |
21027 | ldx [%g4],%g2 | |
21028 | cmp %g3,%g2 ! %f6 = 00000000 ff0000ff | |
21029 | bne %xcc,p0_freg_check_fail | |
21030 | mov 0xf06,%g1 | |
21031 | ldx [%g4+0x58],%g3 | |
21032 | std %f14,[%g4] | |
21033 | ldx [%g4],%g2 | |
21034 | cmp %g3,%g2 ! %f14 = 00000000 00000000 | |
21035 | bne %xcc,p0_freg_check_fail | |
21036 | mov 0xf14,%g1 | |
21037 | ||
21038 | ! Check Point 101 completed | |
21039 | ||
21040 | ||
21041 | p0_label_506: | |
21042 | ! %l4 = 9d3d79ff, %l5 = 000000ff, Mem[0000000010001428] = ff000000 000000c6 | |
21043 | stda %l4,[%i0+0x028]%asi ! Mem[0000000010001428] = 9d3d79ff 000000ff | |
21044 | ! Mem[0000000010101408] = ffffffff, %l0 = 0000000000000000 | |
21045 | ldstuba [%i4+%o4]0x80,%l0 ! %l0 = 000000ff000000ff | |
21046 | ! %l4 = 000000009d3d79ff, Mem[0000000030081410] = ff0000ff | |
21047 | stwa %l4,[%i2+%o5]0x81 ! Mem[0000000030081410] = 9d3d79ff | |
21048 | ! %l5 = 00000000000000ff, Mem[0000000010041407] = ff000000, %asi = 80 | |
21049 | stba %l5,[%i1+0x007]%asi ! Mem[0000000010041404] = ff0000ff | |
21050 | ! Mem[00000000201c0001] = ffff9457, %l1 = ff793d9d76c6c4ff | |
21051 | ldstuba [%o0+0x001]%asi,%l1 ! %l1 = 000000ff000000ff | |
21052 | ! %l2 = ffffffffffffffff, Mem[0000000030101408] = 00000000 | |
21053 | stwa %l2,[%i4+%o4]0x89 ! Mem[0000000030101408] = ffffffff | |
21054 | ! Mem[00000000100c1410] = ffffffff, %l6 = 0000000000000000 | |
21055 | ldstuba [%i3+%o5]0x80,%l6 ! %l6 = 000000ff000000ff | |
21056 | ! %f18 = ff0000ff, Mem[0000000010141430] = 7aff00ff | |
21057 | st %f18,[%i5+0x030] ! Mem[0000000010141430] = ff0000ff | |
21058 | ! %l4 = 9d3d79ff, %l5 = 000000ff, Mem[0000000030041408] = 00000003 00003403 | |
21059 | stda %l4,[%i1+%o4]0x89 ! Mem[0000000030041408] = 9d3d79ff 000000ff | |
21060 | ! Starting 10 instruction Load Burst | |
21061 | ! Mem[0000000030081408] = 790000ff, %l4 = 000000009d3d79ff | |
21062 | ldsba [%i2+%o4]0x81,%l4 ! %l4 = 0000000000000079 | |
21063 | ||
21064 | p0_label_507: | |
21065 | ! Mem[0000000010141430] = ff0000ff, %l0 = 00000000000000ff | |
21066 | lduha [%i5+0x032]%asi,%l0 ! %l0 = 00000000000000ff | |
21067 | ! Mem[0000000010041410] = ff000000, %l4 = 0000000000000079 | |
21068 | lduba [%i1+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
21069 | ! Mem[00000000100c1400] = 159c00ff, %l1 = 00000000000000ff | |
21070 | ldsha [%i3+%g0]0x88,%l1 ! %l1 = 00000000000000ff | |
21071 | ! Mem[00000000201c0000] = ffff9457, %l3 = 0000000000000000 | |
21072 | ldsba [%o0+0x000]%asi,%l3 ! %l3 = ffffffffffffffff | |
21073 | ! Mem[00000000300c1408] = 00000000 ffffffff, %l0 = 000000ff, %l1 = 000000ff | |
21074 | ldda [%i3+%o4]0x89,%l0 ! %l0 = 00000000ffffffff 0000000000000000 | |
21075 | ! Mem[0000000030041408] = 9d3d79ff, %l3 = ffffffffffffffff | |
21076 | ldsba [%i1+%o4]0x89,%l3 ! %l3 = ffffffffffffffff | |
21077 | ! Mem[0000000010181408] = 00000000, %l3 = ffffffffffffffff | |
21078 | ldsha [%i6+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
21079 | ! Mem[0000000030101400] = ff000000000094ff, %l6 = 00000000000000ff | |
21080 | ldxa [%i4+%g0]0x89,%l6 ! %l6 = ff000000000094ff | |
21081 | ! Mem[00000000300c1408] = 00000000 ffffffff, %l6 = 000094ff, %l7 = 000000ff | |
21082 | ldda [%i3+%o4]0x89,%l6 ! %l6 = 00000000ffffffff 0000000000000000 | |
21083 | ! Starting 10 instruction Store Burst | |
21084 | ! %l0 = 00000000ffffffff, Mem[00000000300c1410] = ffffffff | |
21085 | stwa %l0,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ffffffff | |
21086 | ||
21087 | p0_label_508: | |
21088 | ! Mem[0000000030141400] = ff000000, %l6 = 00000000ffffffff | |
21089 | ldstuba [%i5+%g0]0x81,%l6 ! %l6 = 000000ff000000ff | |
21090 | ! %f11 = 76ff411f, Mem[0000000010101408] = ffffffff | |
21091 | sta %f11,[%i4+%o4]0x88 ! Mem[0000000010101408] = 76ff411f | |
21092 | ! Mem[00000000300c1400] = 000000ff, %l7 = 0000000000000000 | |
21093 | ldstuba [%i3+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
21094 | ! %l0 = 00000000ffffffff, Mem[0000000030181400] = 00ffffff | |
21095 | stba %l0,[%i6+%g0]0x81 ! Mem[0000000030181400] = ffffffff | |
21096 | ! %f28 = ff000000 000000c6, Mem[00000000100c1410] = ffffffff 00000000 | |
21097 | stda %f28,[%i3+%o5]0x80 ! Mem[00000000100c1410] = ff000000 000000c6 | |
21098 | ! %l0 = ffffffff, %l1 = 00000000, Mem[0000000010101408] = 1f41ff76 00000000 | |
21099 | stda %l0,[%i4+%o4]0x80 ! Mem[0000000010101408] = ffffffff 00000000 | |
21100 | ! %l1 = 0000000000000000, Mem[000000001000142d] = 000000ff, %asi = 80 | |
21101 | stba %l1,[%i0+0x02d]%asi ! Mem[000000001000142c] = 000000ff | |
21102 | ! %l4 = 0000000000000000, Mem[0000000010041408] = c6000076 | |
21103 | stha %l4,[%i1+%o4]0x88 ! Mem[0000000010041408] = c6000000 | |
21104 | ! Mem[0000000010001400] = 00000000, %l7 = 0000000000000000 | |
21105 | swapa [%i0+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
21106 | ! Starting 10 instruction Load Burst | |
21107 | ! Mem[0000000030101410] = 790000ff, %l3 = 0000000000000000 | |
21108 | ldsba [%i4+%o5]0x89,%l3 ! %l3 = ffffffffffffffff | |
21109 | ||
21110 | p0_label_509: | |
21111 | ! Mem[0000000010141400] = 00000000, %l0 = 00000000ffffffff | |
21112 | ldsba [%i5+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
21113 | ! Mem[0000000010001400] = 0000000000000000, %l1 = 0000000000000000 | |
21114 | ldxa [%i0+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
21115 | ! Mem[0000000010001410] = 000000ff, %l0 = 0000000000000000 | |
21116 | lduba [%i0+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
21117 | ! Mem[0000000030041408] = ff793d9d, %l5 = 00000000000000ff | |
21118 | ldswa [%i1+%o4]0x81,%l5 ! %l5 = ffffffffff793d9d | |
21119 | ! Mem[0000000030181408] = ff793d9d, %l4 = 0000000000000000 | |
21120 | ldsba [%i6+%o4]0x81,%l4 ! %l4 = ffffffffffffffff | |
21121 | ! Mem[00000000100c1410] = ff000000, %l7 = 0000000000000000 | |
21122 | lduha [%i3+%o5]0x80,%l7 ! %l7 = 000000000000ff00 | |
21123 | ! Mem[0000000010041408] = 000000c600000000, %l4 = ffffffffffffffff | |
21124 | ldxa [%i1+%o4]0x80,%l4 ! %l4 = 000000c600000000 | |
21125 | ! Mem[0000000010001410] = 000000ff, %l1 = 0000000000000000 | |
21126 | ldsba [%i0+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
21127 | ! Mem[0000000030181410] = 0000000000000000, %l5 = ffffffffff793d9d | |
21128 | ldxa [%i6+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
21129 | ! Starting 10 instruction Store Burst | |
21130 | ! %l2 = ffffffffffffffff, Mem[0000000010101410] = 000000ff | |
21131 | stwa %l2,[%i4+%o5]0x80 ! Mem[0000000010101410] = ffffffff | |
21132 | ||
21133 | p0_label_510: | |
21134 | ! Mem[0000000021800180] = ffffe2ae, %l1 = 0000000000000000 | |
21135 | ldstuba [%o3+0x180]%asi,%l1 ! %l1 = 000000ff000000ff | |
21136 | ! %l6 = 00000000000000ff, Mem[0000000010141408] = 00000000 | |
21137 | stwa %l6,[%i5+%o4]0x80 ! Mem[0000000010141408] = 000000ff | |
21138 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000010101410] = ffffffff 000000ff | |
21139 | stda %l4,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00000000 00000000 | |
21140 | ! %l5 = 0000000000000000, Mem[0000000010081408] = ffff0000 | |
21141 | stba %l5,[%i2+%o4]0x88 ! Mem[0000000010081408] = ffff0000 | |
21142 | ! Mem[0000000010141408] = 000000ff, %l0 = 0000000000000000, %asi = 80 | |
21143 | swapa [%i5+0x008]%asi,%l0 ! %l0 = 00000000000000ff | |
21144 | ! %l1 = 00000000000000ff, Mem[00000000201c0000] = ffff9457, %asi = 80 | |
21145 | stha %l1,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00ff9457 | |
21146 | ! %f22 = 000000c6 ffff0000, Mem[0000000010001418] = 000000ff ff000012 | |
21147 | std %f22,[%i0+0x018] ! Mem[0000000010001418] = 000000c6 ffff0000 | |
21148 | ! Mem[00000000100c1410] = 000000ff, %l7 = 000000000000ff00 | |
21149 | swapa [%i3+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
21150 | ! %l1 = 00000000000000ff, Mem[00000000100c1410] = 00ff0000 | |
21151 | stba %l1,[%i3+%o5]0x80 ! Mem[00000000100c1410] = ffff0000 | |
21152 | ! Starting 10 instruction Load Burst | |
21153 | ! Mem[0000000010181410] = 0000000000000000, %f16 = ff000012 ffffffff | |
21154 | ldda [%i6+%o5]0x80,%f16 ! %f16 = 00000000 00000000 | |
21155 | ||
21156 | ! Check Point 102 for processor 0 | |
21157 | ||
21158 | set p0_check_pt_data_102,%g4 | |
21159 | rd %ccr,%g5 ! %g5 = 44 | |
21160 | ldx [%g4+0x08],%g2 | |
21161 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
21162 | bne %xcc,p0_reg_check_fail0 | |
21163 | mov 0xee0,%g1 | |
21164 | ldx [%g4+0x10],%g2 | |
21165 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
21166 | bne %xcc,p0_reg_check_fail1 | |
21167 | mov 0xee1,%g1 | |
21168 | ldx [%g4+0x18],%g2 | |
21169 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
21170 | bne %xcc,p0_reg_check_fail3 | |
21171 | mov 0xee3,%g1 | |
21172 | ldx [%g4+0x20],%g2 | |
21173 | cmp %l4,%g2 ! %l4 = 000000c600000000 | |
21174 | bne %xcc,p0_reg_check_fail4 | |
21175 | mov 0xee4,%g1 | |
21176 | ldx [%g4+0x28],%g2 | |
21177 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
21178 | bne %xcc,p0_reg_check_fail5 | |
21179 | mov 0xee5,%g1 | |
21180 | ldx [%g4+0x30],%g2 | |
21181 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
21182 | bne %xcc,p0_reg_check_fail6 | |
21183 | mov 0xee6,%g1 | |
21184 | ldx [%g4+0x38],%g2 | |
21185 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
21186 | bne %xcc,p0_reg_check_fail7 | |
21187 | mov 0xee7,%g1 | |
21188 | ldx [%g4+0x40],%g3 | |
21189 | std %f0,[%g4] | |
21190 | ldx [%g4],%g2 | |
21191 | cmp %g3,%g2 ! %f0 = ff000000 597bac10 | |
21192 | bne %xcc,p0_freg_check_fail | |
21193 | mov 0xf00,%g1 | |
21194 | ldx [%g4+0x48],%g3 | |
21195 | std %f6,[%g4] | |
21196 | ldx [%g4],%g2 | |
21197 | cmp %g3,%g2 ! %f6 = 00000000 ff0000ff | |
21198 | bne %xcc,p0_freg_check_fail | |
21199 | mov 0xf06,%g1 | |
21200 | ldx [%g4+0x50],%g3 | |
21201 | std %f16,[%g4] | |
21202 | ldx [%g4],%g2 | |
21203 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
21204 | bne %xcc,p0_freg_check_fail | |
21205 | mov 0xf16,%g1 | |
21206 | ||
21207 | ! Check Point 102 completed | |
21208 | ||
21209 | ||
21210 | p0_label_511: | |
21211 | ! Mem[0000000010081410] = 76000000, %f29 = 000000c6 | |
21212 | lda [%i2+%o5]0x80,%f29 ! %f29 = 76000000 | |
21213 | ! Mem[0000000010101438] = ff000012003400ff, %l5 = 0000000000000000 | |
21214 | ldxa [%i4+0x038]%asi,%l5 ! %l5 = ff000012003400ff | |
21215 | ! Mem[0000000010141430] = ff0000ff, %f23 = ffff0000 | |
21216 | ld [%i5+0x030],%f23 ! %f23 = ff0000ff | |
21217 | ! Mem[0000000030181400] = ffffffff ffffffff, %l6 = 000000ff, %l7 = 000000ff | |
21218 | ldda [%i6+%g0]0x81,%l6 ! %l6 = 00000000ffffffff 00000000ffffffff | |
21219 | ! Mem[0000000030041410] = ffc4c676, %l7 = 00000000ffffffff | |
21220 | lduwa [%i1+%o5]0x81,%l7 ! %l7 = 00000000ffc4c676 | |
21221 | ! Mem[0000000010181400] = ff760000, %f12 = 00000000 | |
21222 | lda [%i6+0x000]%asi,%f12 ! %f12 = ff760000 | |
21223 | ! Mem[0000000010041408] = 000000c6, %f17 = 00000000 | |
21224 | lda [%i1+%o4]0x80,%f17 ! %f17 = 000000c6 | |
21225 | ! Mem[00000000100c1410] = ffff0000 000000c6, %l4 = 00000000, %l5 = 003400ff | |
21226 | ldda [%i3+%o5]0x80,%l4 ! %l4 = 00000000ffff0000 00000000000000c6 | |
21227 | ! Mem[000000001004143d] = c238965e, %l2 = ffffffffffffffff | |
21228 | ldstuba [%i1+0x03d]%asi,%l2 ! %l2 = 00000038000000ff | |
21229 | ! Starting 10 instruction Store Burst | |
21230 | ! Mem[0000000030101400] = ff940000, %l4 = 00000000ffff0000 | |
21231 | swapa [%i4+%g0]0x81,%l4 ! %l4 = 00000000ff940000 | |
21232 | ||
21233 | p0_label_512: | |
21234 | ! %f22 = 000000c6, Mem[0000000010081418] = ffff0000 | |
21235 | sta %f22,[%i2+0x018]%asi ! Mem[0000000010081418] = 000000c6 | |
21236 | ! Mem[0000000010101410] = 00000000, %l2 = 0000000000000038 | |
21237 | swapa [%i4+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
21238 | ! %l7 = 00000000ffc4c676, Mem[0000000010141408] = 0000000000000000 | |
21239 | stxa %l7,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000ffc4c676 | |
21240 | ! Mem[0000000010141400] = 00000000, %l7 = 00000000ffc4c676 | |
21241 | swapa [%i5+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
21242 | ! %l2 = 0000000000000000, Mem[0000000010001408] = 000000ff00000000 | |
21243 | stxa %l2,[%i0+%o4]0x80 ! Mem[0000000010001408] = 0000000000000000 | |
21244 | ! %l1 = 00000000000000ff, Mem[00000000100c1400] = ff009c1500000000 | |
21245 | stxa %l1,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00000000000000ff | |
21246 | ! Mem[0000000030081408] = 790000ff, %l3 = ffffffffffffffff | |
21247 | swapa [%i2+%o4]0x81,%l3 ! %l3 = 00000000790000ff | |
21248 | ! %l4 = ff940000, %l5 = 000000c6, Mem[0000000010101410] = 00000038 00000000 | |
21249 | stda %l4,[%i4+%o5]0x88 ! Mem[0000000010101410] = ff940000 000000c6 | |
21250 | ! %l7 = 0000000000000000, Mem[0000000030081408] = ffffffff | |
21251 | stba %l7,[%i2+%o4]0x81 ! Mem[0000000030081408] = 00ffffff | |
21252 | ! Starting 10 instruction Load Burst | |
21253 | ! Mem[0000000030141408] = 000000ff, %l2 = 0000000000000000 | |
21254 | ldswa [%i5+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
21255 | ||
21256 | p0_label_513: | |
21257 | ! Mem[0000000030041408] = 9d3d79ff, %l4 = 00000000ff940000 | |
21258 | lduwa [%i1+%o4]0x89,%l4 ! %l4 = 000000009d3d79ff | |
21259 | ! Mem[0000000010081400] = ff0000ff, %f8 = 00003403 | |
21260 | lda [%i2+0x000]%asi,%f8 ! %f8 = ff0000ff | |
21261 | ! Mem[0000000010041400] = 00000000, %l2 = 00000000000000ff | |
21262 | lduba [%i1+%g0]0x80,%l2 ! %l2 = 0000000000000000 | |
21263 | membar #Sync ! Added by membar checker (84) | |
21264 | ! Mem[0000000010141400] = ffc4c676 76000000 00000000 ffc4c676 | |
21265 | ! Mem[0000000010141410] = 790000ff ff00ffff 00000012 ffffffff | |
21266 | ! Mem[0000000010141420] = 000000ff c7ec13bb 000000ff 0000ff03 | |
21267 | ! Mem[0000000010141430] = ff0000ff 0000ff03 00004517 00000000 | |
21268 | ldda [%i5]ASI_BLK_AIUP,%f0 ! Block Load from 0000000010141400 | |
21269 | ! Mem[0000000010001420] = 00000000, %l4 = 000000009d3d79ff | |
21270 | ldswa [%i0+0x020]%asi,%l4 ! %l4 = 0000000000000000 | |
21271 | ! Mem[0000000030001400] = ffffffff, %l4 = 0000000000000000 | |
21272 | ldsba [%i0+%g0]0x89,%l4 ! %l4 = ffffffffffffffff | |
21273 | ! Mem[0000000030041410] = ffc4c676, %f24 = 1f41ff76 | |
21274 | lda [%i1+%o5]0x81,%f24 ! %f24 = ffc4c676 | |
21275 | ! Mem[00000000100c1408] = 00000000, %l3 = 00000000790000ff | |
21276 | ldswa [%i3+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
21277 | ! Mem[0000000020800000] = ffff8470, %l5 = 00000000000000c6 | |
21278 | lduha [%o1+0x000]%asi,%l5 ! %l5 = 000000000000ffff | |
21279 | ! Starting 10 instruction Store Burst | |
21280 | ! %f22 = 000000c6, Mem[00000000100c1430] = 00000000 | |
21281 | st %f22,[%i3+0x030] ! Mem[00000000100c1430] = 000000c6 | |
21282 | ||
21283 | p0_label_514: | |
21284 | ! %f22 = 000000c6 ff0000ff, %l6 = 00000000ffffffff | |
21285 | ! Mem[0000000030101420] = 000000ff000000ff | |
21286 | add %i4,0x020,%g1 | |
21287 | stda %f22,[%g1+%l6]ASI_PST16_SL ! Mem[0000000030101420] = ff0000ffc6000000 | |
21288 | ! Mem[0000000020800000] = ffff8470, %l7 = 0000000000000000 | |
21289 | ldstub [%o1+%g0],%l7 ! %l7 = 000000ff000000ff | |
21290 | ! %l0 = 000000ff, %l1 = 000000ff, Mem[0000000030001408] = 00000000 0000ffff | |
21291 | stda %l0,[%i0+%o4]0x89 ! Mem[0000000030001408] = 000000ff 000000ff | |
21292 | ! %f20 = ffc4c676, Mem[0000000010041410] = 000000ff | |
21293 | sta %f20,[%i1+%o5]0x80 ! Mem[0000000010041410] = ffc4c676 | |
21294 | ! %l0 = 00000000000000ff, Mem[0000000030001408] = 000000ff | |
21295 | stha %l0,[%i0+%o4]0x89 ! Mem[0000000030001408] = 000000ff | |
21296 | ! Mem[0000000010141408] = 00000000, %l4 = ffffffffffffffff | |
21297 | ldstuba [%i5+%o4]0x80,%l4 ! %l4 = 00000000000000ff | |
21298 | ! Mem[0000000020800000] = ffff8470, %l3 = 0000000000000000 | |
21299 | ldstuba [%o1+0x000]%asi,%l3 ! %l3 = 000000ff000000ff | |
21300 | ! %l1 = 00000000000000ff, Mem[0000000030041400] = ffff0012 | |
21301 | stha %l1,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00ff0012 | |
21302 | membar #Sync ! Added by membar checker (85) | |
21303 | ! %l4 = 0000000000000000, Mem[0000000010141400] = 76c6c4ff | |
21304 | stba %l4,[%i5+%g0]0x88 ! Mem[0000000010141400] = 76c6c400 | |
21305 | ! Starting 10 instruction Load Burst | |
21306 | ! Mem[0000000010081400] = ff0000ff 00000000 0000ffff 00000000 | |
21307 | ! Mem[0000000010081410] = 76000000 00000000 000000c6 00000000 | |
21308 | ! Mem[0000000010081420] = 000000ff 00009c15 00000000 000000ff | |
21309 | ! Mem[0000000010081430] = ff000079 ffffffff 76000000 00000000 | |
21310 | ldda [%i2]ASI_BLK_AIUP,%f16 ! Block Load from 0000000010081400 | |
21311 | ||
21312 | p0_label_515: | |
21313 | ! Mem[000000001008140c] = 00000000, %l4 = 0000000000000000 | |
21314 | lduwa [%i2+0x00c]%asi,%l4 ! %l4 = 0000000000000000 | |
21315 | ! Mem[0000000030141400] = ff000000, %l7 = 00000000000000ff | |
21316 | lduba [%i5+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
21317 | ! Mem[0000000030141410] = 0000ff00, %f15 = 00000000 | |
21318 | lda [%i5+%o5]0x89,%f15 ! %f15 = 0000ff00 | |
21319 | ! Mem[0000000030041410] = ffc4c676, %l3 = 00000000000000ff | |
21320 | lduha [%i1+%o5]0x81,%l3 ! %l3 = 000000000000ffc4 | |
21321 | ! Mem[0000000010181414] = 00000000, %l0 = 00000000000000ff | |
21322 | ldub [%i6+0x014],%l0 ! %l0 = 0000000000000000 | |
21323 | ! Mem[0000000030081410] = 9d3d79ff ff000000, %l4 = 00000000, %l5 = 0000ffff | |
21324 | ldda [%i2+%o5]0x81,%l4 ! %l4 = 000000009d3d79ff 00000000ff000000 | |
21325 | ! Mem[0000000030001408] = ff000000, %l2 = 0000000000000000 | |
21326 | ldsha [%i0+%o4]0x81,%l2 ! %l2 = ffffffffffffff00 | |
21327 | ! Mem[00000000218001c0] = 12f32a00, %l3 = 000000000000ffc4 | |
21328 | ldsba [%o3+0x1c1]%asi,%l3 ! %l3 = fffffffffffffff3 | |
21329 | ! Mem[00000000100c1410] = c60000000000ffff, %f14 = 00004517 0000ff00 | |
21330 | ldda [%i3+%o5]0x88,%f14 ! %f14 = c6000000 0000ffff | |
21331 | ! Starting 10 instruction Store Burst | |
21332 | ! %l0 = 00000000, %l1 = 000000ff, Mem[00000000100c1410] = ffff0000 000000c6 | |
21333 | stda %l0,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 00000000 000000ff | |
21334 | ||
21335 | ! Check Point 103 for processor 0 | |
21336 | ||
21337 | set p0_check_pt_data_103,%g4 | |
21338 | rd %ccr,%g5 ! %g5 = 44 | |
21339 | ldx [%g4+0x08],%g2 | |
21340 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
21341 | bne %xcc,p0_reg_check_fail0 | |
21342 | mov 0xee0,%g1 | |
21343 | ldx [%g4+0x10],%g2 | |
21344 | cmp %l2,%g2 ! %l2 = ffffffffffffff00 | |
21345 | bne %xcc,p0_reg_check_fail2 | |
21346 | mov 0xee2,%g1 | |
21347 | ldx [%g4+0x18],%g2 | |
21348 | cmp %l3,%g2 ! %l3 = fffffffffffffff3 | |
21349 | bne %xcc,p0_reg_check_fail3 | |
21350 | mov 0xee3,%g1 | |
21351 | ldx [%g4+0x20],%g2 | |
21352 | cmp %l4,%g2 ! %l4 = 000000009d3d79ff | |
21353 | bne %xcc,p0_reg_check_fail4 | |
21354 | mov 0xee4,%g1 | |
21355 | ldx [%g4+0x28],%g2 | |
21356 | cmp %l5,%g2 ! %l5 = 00000000ff000000 | |
21357 | bne %xcc,p0_reg_check_fail5 | |
21358 | mov 0xee5,%g1 | |
21359 | ldx [%g4+0x30],%g2 | |
21360 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
21361 | bne %xcc,p0_reg_check_fail7 | |
21362 | mov 0xee7,%g1 | |
21363 | ldx [%g4+0x38],%g3 | |
21364 | std %f0,[%g4] | |
21365 | ldx [%g4],%g2 | |
21366 | cmp %g3,%g2 ! %f0 = ffc4c676 76000000 | |
21367 | bne %xcc,p0_freg_check_fail | |
21368 | mov 0xf00,%g1 | |
21369 | ldx [%g4+0x40],%g3 | |
21370 | std %f2,[%g4] | |
21371 | ldx [%g4],%g2 | |
21372 | cmp %g3,%g2 ! %f2 = 00000000 ffc4c676 | |
21373 | bne %xcc,p0_freg_check_fail | |
21374 | mov 0xf02,%g1 | |
21375 | ldx [%g4+0x48],%g3 | |
21376 | std %f4,[%g4] | |
21377 | ldx [%g4],%g2 | |
21378 | cmp %g3,%g2 ! %f4 = 790000ff ff00ffff | |
21379 | bne %xcc,p0_freg_check_fail | |
21380 | mov 0xf04,%g1 | |
21381 | ldx [%g4+0x50],%g3 | |
21382 | std %f6,[%g4] | |
21383 | ldx [%g4],%g2 | |
21384 | cmp %g3,%g2 ! %f6 = 00000012 ffffffff | |
21385 | bne %xcc,p0_freg_check_fail | |
21386 | mov 0xf06,%g1 | |
21387 | ldx [%g4+0x58],%g3 | |
21388 | std %f8,[%g4] | |
21389 | ldx [%g4],%g2 | |
21390 | cmp %g3,%g2 ! %f8 = 000000ff c7ec13bb | |
21391 | bne %xcc,p0_freg_check_fail | |
21392 | mov 0xf08,%g1 | |
21393 | ldx [%g4+0x60],%g3 | |
21394 | std %f10,[%g4] | |
21395 | ldx [%g4],%g2 | |
21396 | cmp %g3,%g2 ! %f10 = 000000ff 0000ff03 | |
21397 | bne %xcc,p0_freg_check_fail | |
21398 | mov 0xf10,%g1 | |
21399 | ldx [%g4+0x68],%g3 | |
21400 | std %f12,[%g4] | |
21401 | ldx [%g4],%g2 | |
21402 | cmp %g3,%g2 ! %f12 = ff0000ff 0000ff03 | |
21403 | bne %xcc,p0_freg_check_fail | |
21404 | mov 0xf12,%g1 | |
21405 | ldx [%g4+0x70],%g3 | |
21406 | std %f14,[%g4] | |
21407 | ldx [%g4],%g2 | |
21408 | cmp %g3,%g2 ! %f14 = c6000000 0000ffff | |
21409 | bne %xcc,p0_freg_check_fail | |
21410 | mov 0xf14,%g1 | |
21411 | ldx [%g4+0x78],%g3 | |
21412 | std %f16,[%g4] | |
21413 | ldx [%g4],%g2 | |
21414 | cmp %g3,%g2 ! %f16 = ff0000ff 00000000 | |
21415 | bne %xcc,p0_freg_check_fail | |
21416 | mov 0xf16,%g1 | |
21417 | ldx [%g4+0x80],%g3 | |
21418 | std %f18,[%g4] | |
21419 | ldx [%g4],%g2 | |
21420 | cmp %g3,%g2 ! %f18 = 0000ffff 00000000 | |
21421 | bne %xcc,p0_freg_check_fail | |
21422 | mov 0xf18,%g1 | |
21423 | ldx [%g4+0x88],%g3 | |
21424 | std %f20,[%g4] | |
21425 | ldx [%g4],%g2 | |
21426 | cmp %g3,%g2 ! %f20 = 76000000 00000000 | |
21427 | bne %xcc,p0_freg_check_fail | |
21428 | mov 0xf20,%g1 | |
21429 | ldx [%g4+0x90],%g3 | |
21430 | std %f22,[%g4] | |
21431 | ldx [%g4],%g2 | |
21432 | cmp %g3,%g2 ! %f22 = 000000c6 00000000 | |
21433 | bne %xcc,p0_freg_check_fail | |
21434 | mov 0xf22,%g1 | |
21435 | ldx [%g4+0x98],%g3 | |
21436 | std %f24,[%g4] | |
21437 | ldx [%g4],%g2 | |
21438 | cmp %g3,%g2 ! %f24 = 000000ff 00009c15 | |
21439 | bne %xcc,p0_freg_check_fail | |
21440 | mov 0xf24,%g1 | |
21441 | ldx [%g4+0xa0],%g3 | |
21442 | std %f26,[%g4] | |
21443 | ldx [%g4],%g2 | |
21444 | cmp %g3,%g2 ! %f26 = 00000000 000000ff | |
21445 | bne %xcc,p0_freg_check_fail | |
21446 | mov 0xf26,%g1 | |
21447 | ldx [%g4+0xa8],%g3 | |
21448 | std %f28,[%g4] | |
21449 | ldx [%g4],%g2 | |
21450 | cmp %g3,%g2 ! %f28 = ff000079 ffffffff | |
21451 | bne %xcc,p0_freg_check_fail | |
21452 | mov 0xf28,%g1 | |
21453 | ldx [%g4+0xb0],%g3 | |
21454 | std %f30,[%g4] | |
21455 | ldx [%g4],%g2 | |
21456 | cmp %g3,%g2 ! %f30 = 76000000 00000000 | |
21457 | bne %xcc,p0_freg_check_fail | |
21458 | mov 0xf30,%g1 | |
21459 | ||
21460 | ! Check Point 103 completed | |
21461 | ||
21462 | ||
21463 | p0_label_516: | |
21464 | ! Mem[0000000020800040] = ffff7379, %l0 = 0000000000000000 | |
21465 | ldstub [%o1+0x040],%l0 ! %l0 = 000000ff000000ff | |
21466 | ! %l0 = 000000ff, %l1 = 000000ff, Mem[0000000010001408] = 00000000 00000000 | |
21467 | stda %l0,[%i0+%o4]0x80 ! Mem[0000000010001408] = 000000ff 000000ff | |
21468 | ! %f10 = 000000ff, Mem[0000000010041408] = c6000000 | |
21469 | sta %f10,[%i1+%o4]0x88 ! Mem[0000000010041408] = 000000ff | |
21470 | ! %f5 = ff00ffff, Mem[0000000030101400] = 0000ffff | |
21471 | sta %f5 ,[%i4+%g0]0x89 ! Mem[0000000030101400] = ff00ffff | |
21472 | ! Mem[0000000020800001] = ffff8470, %l4 = 000000009d3d79ff | |
21473 | ldstuba [%o1+0x001]%asi,%l4 ! %l4 = 000000ff000000ff | |
21474 | ! %l7 = 00000000000000ff, Mem[00000000300c1400] = ff0000ff | |
21475 | stha %l7,[%i3+%g0]0x89 ! Mem[00000000300c1400] = ff0000ff | |
21476 | ! Mem[0000000010181400] = ff760000, %l2 = ffffffffffffff00 | |
21477 | swapa [%i6+%g0]0x80,%l2 ! %l2 = 00000000ff760000 | |
21478 | ! Mem[0000000010041418] = d4000000, %l3 = fffffff3, %l3 = fffffff3 | |
21479 | add %i1,0x18,%g1 | |
21480 | casa [%g1]0x80,%l3,%l3 ! %l3 = 00000000d4000000 | |
21481 | ! %l4 = 00000000000000ff, Mem[0000000030081408] = ffffff00 | |
21482 | stha %l4,[%i2+%o4]0x89 ! Mem[0000000030081408] = ffff00ff | |
21483 | ! Starting 10 instruction Load Burst | |
21484 | ! Mem[00000000211c0000] = 9cff1a4c, %l0 = 00000000000000ff | |
21485 | lduba [%o2+0x001]%asi,%l0 ! %l0 = 00000000000000ff | |
21486 | ||
21487 | p0_label_517: | |
21488 | ! Mem[0000000010001410] = ff000000, %l1 = 00000000000000ff | |
21489 | ldsha [%i0+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
21490 | ! Mem[00000000300c1400] = ff0000ff, %l4 = 00000000000000ff | |
21491 | lduha [%i3+%g0]0x89,%l4 ! %l4 = 00000000000000ff | |
21492 | ! Mem[0000000010181424] = 00000000, %l6 = 00000000ffffffff | |
21493 | ldsha [%i6+0x024]%asi,%l6 ! %l6 = 0000000000000000 | |
21494 | ! Mem[0000000030081410] = ff793d9d, %f10 = 000000ff | |
21495 | lda [%i2+%o5]0x89,%f10 ! %f10 = ff793d9d | |
21496 | ! Mem[0000000010041408] = 000000ff, %f27 = 000000ff | |
21497 | lda [%i1+%o4]0x88,%f27 ! %f27 = 000000ff | |
21498 | ! Mem[0000000010141400] = 00c4c676, %f5 = ff00ffff | |
21499 | ld [%i5+%g0],%f5 ! %f5 = 00c4c676 | |
21500 | ! Mem[0000000010041408] = 00000000000000ff, %f12 = ff0000ff 0000ff03 | |
21501 | ldda [%i1+%o4]0x88,%f12 ! %f12 = 00000000 000000ff | |
21502 | ! Mem[0000000010081400] = ff0000ff, %l0 = 00000000000000ff | |
21503 | lduha [%i2+%g0]0x80,%l0 ! %l0 = 000000000000ff00 | |
21504 | ! Mem[0000000030041408] = ff793d9d, %l1 = 0000000000000000 | |
21505 | lduba [%i1+%o4]0x81,%l1 ! %l1 = 00000000000000ff | |
21506 | ! Starting 10 instruction Store Burst | |
21507 | ! %f0 = ffc4c676 76000000, Mem[0000000010141410] = 790000ff ff00ffff | |
21508 | stda %f0 ,[%i5+%o5]0x80 ! Mem[0000000010141410] = ffc4c676 76000000 | |
21509 | ||
21510 | p0_label_518: | |
21511 | ! Mem[00000000100c1402] = 00000000, %l4 = 00000000000000ff | |
21512 | ldstub [%i3+0x002],%l4 ! %l4 = 00000000000000ff | |
21513 | ! %l7 = 00000000000000ff, Mem[0000000030081410] = ff793d9d | |
21514 | stba %l7,[%i2+%o5]0x89 ! Mem[0000000030081410] = ff793dff | |
21515 | ! Mem[0000000010081408] = 0000ffff, %l5 = 00000000ff000000 | |
21516 | ldstuba [%i2+%o4]0x80,%l5 ! %l5 = 00000000000000ff | |
21517 | ! Mem[0000000030101400] = ff00ffff, %l3 = 00000000d4000000 | |
21518 | swapa [%i4+%g0]0x89,%l3 ! %l3 = 00000000ff00ffff | |
21519 | ! %f2 = 00000000 ffc4c676, Mem[0000000030041400] = 1200ff00 ffffffff | |
21520 | stda %f2 ,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00000000 ffc4c676 | |
21521 | ! %l2 = 00000000ff760000, Mem[0000000030001400] = ffffffff | |
21522 | stha %l2,[%i0+%g0]0x81 ! Mem[0000000030001400] = 0000ffff | |
21523 | ! Mem[0000000010041400] = 00000000, %l4 = 0000000000000000 | |
21524 | ldstuba [%i1+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
21525 | ! Mem[0000000021800180] = ffffe2ae, %l1 = 00000000000000ff | |
21526 | ldstuba [%o3+0x180]%asi,%l1 ! %l1 = 000000ff000000ff | |
21527 | ! %f30 = 76000000, Mem[0000000030101408] = ffffffff | |
21528 | sta %f30,[%i4+%o4]0x81 ! Mem[0000000030101408] = 76000000 | |
21529 | ! Starting 10 instruction Load Burst | |
21530 | ! Mem[0000000030041408] = 9d3d79ff, %l1 = 00000000000000ff | |
21531 | ldsba [%i1+%o4]0x89,%l1 ! %l1 = ffffffffffffffff | |
21532 | ||
21533 | p0_label_519: | |
21534 | ! Mem[0000000030041410] = ffc4c6769d3d79ff, %f10 = ff793d9d 0000ff03 | |
21535 | ldda [%i1+%o5]0x81,%f10 ! %f10 = ffc4c676 9d3d79ff | |
21536 | ! Mem[0000000010001410] = ff000000, %l1 = ffffffffffffffff | |
21537 | ldsba [%i0+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
21538 | ! Mem[0000000010181408] = 00000000, %l0 = 000000000000ff00 | |
21539 | ldsba [%i6+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
21540 | ! Mem[0000000010181414] = 00000000, %l2 = 00000000ff760000 | |
21541 | lduba [%i6+0x014]%asi,%l2 ! %l2 = 0000000000000000 | |
21542 | ! Mem[0000000010041408] = ff000000, %l0 = 0000000000000000 | |
21543 | lduba [%i1+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
21544 | ! Mem[0000000030081410] = ff3d79ff, %l3 = 00000000ff00ffff | |
21545 | lduwa [%i2+%o5]0x81,%l3 ! %l3 = 00000000ff3d79ff | |
21546 | ! Mem[0000000010001400] = 00000000, %l1 = 0000000000000000 | |
21547 | lduba [%i0+%g0]0x88,%l1 ! %l1 = 0000000000000000 | |
21548 | ! Mem[0000000030041410] = 76c6c4ff, %l7 = 00000000000000ff | |
21549 | lduha [%i1+%o5]0x89,%l7 ! %l7 = 000000000000c4ff | |
21550 | ! Mem[0000000030081400] = 000000c6, %l3 = 00000000ff3d79ff | |
21551 | lduwa [%i2+%g0]0x81,%l3 ! %l3 = 00000000000000c6 | |
21552 | ! Starting 10 instruction Store Burst | |
21553 | ! Mem[0000000010081418] = 000000c6, %l3 = 00000000000000c6 | |
21554 | swap [%i2+0x018],%l3 ! %l3 = 00000000000000c6 | |
21555 | ||
21556 | p0_label_520: | |
21557 | ! %l6 = 00000000, %l7 = 0000c4ff, Mem[0000000010041410] = 76c6c4ff ffffffff | |
21558 | stda %l6,[%i1+%o5]0x88 ! Mem[0000000010041410] = 00000000 0000c4ff | |
21559 | ! Mem[00000000300c1400] = ff0000ff, %l5 = 0000000000000000 | |
21560 | swapa [%i3+%g0]0x89,%l5 ! %l5 = 00000000ff0000ff | |
21561 | ! Mem[000000001018142c] = 00000000, %l0 = 00000000000000ff | |
21562 | swap [%i6+0x02c],%l0 ! %l0 = 0000000000000000 | |
21563 | ! %l0 = 0000000000000000, Mem[0000000030041408] = 000000ff9d3d79ff | |
21564 | stxa %l0,[%i1+%o4]0x89 ! Mem[0000000030041408] = 0000000000000000 | |
21565 | ! %f26 = 00000000 000000ff, Mem[00000000100c1400] = 00ff0000 ff000000 | |
21566 | stda %f26,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 00000000 000000ff | |
21567 | ! %l5 = 00000000ff0000ff, Mem[0000000030001400] = ffff0000 | |
21568 | stwa %l5,[%i0+%g0]0x89 ! Mem[0000000030001400] = ff0000ff | |
21569 | ! %f3 = ffc4c676, Mem[0000000030141410] = 0000ff00 | |
21570 | sta %f3 ,[%i5+%o5]0x89 ! Mem[0000000030141410] = ffc4c676 | |
21571 | ! Mem[0000000030181400] = ffffffff, %l3 = 00000000000000c6 | |
21572 | swapa [%i6+%g0]0x81,%l3 ! %l3 = 00000000ffffffff | |
21573 | ! %l1 = 0000000000000000, Mem[0000000030101408] = 76000000 | |
21574 | stha %l1,[%i4+%o4]0x81 ! Mem[0000000030101408] = 00000000 | |
21575 | ! Starting 10 instruction Load Burst | |
21576 | ! Mem[0000000010141400] = 76c6c400, %l7 = 000000000000c4ff | |
21577 | lduwa [%i5+%g0]0x88,%l7 ! %l7 = 0000000076c6c400 | |
21578 | ||
21579 | ! Check Point 104 for processor 0 | |
21580 | ||
21581 | set p0_check_pt_data_104,%g4 | |
21582 | rd %ccr,%g5 ! %g5 = 44 | |
21583 | ldx [%g4+0x08],%g2 | |
21584 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
21585 | bne %xcc,p0_reg_check_fail0 | |
21586 | mov 0xee0,%g1 | |
21587 | ldx [%g4+0x10],%g2 | |
21588 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
21589 | bne %xcc,p0_reg_check_fail1 | |
21590 | mov 0xee1,%g1 | |
21591 | ldx [%g4+0x18],%g2 | |
21592 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
21593 | bne %xcc,p0_reg_check_fail2 | |
21594 | mov 0xee2,%g1 | |
21595 | ldx [%g4+0x20],%g2 | |
21596 | cmp %l3,%g2 ! %l3 = 00000000ffffffff | |
21597 | bne %xcc,p0_reg_check_fail3 | |
21598 | mov 0xee3,%g1 | |
21599 | ldx [%g4+0x28],%g2 | |
21600 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
21601 | bne %xcc,p0_reg_check_fail4 | |
21602 | mov 0xee4,%g1 | |
21603 | ldx [%g4+0x30],%g2 | |
21604 | cmp %l5,%g2 ! %l5 = 00000000ff0000ff | |
21605 | bne %xcc,p0_reg_check_fail5 | |
21606 | mov 0xee5,%g1 | |
21607 | ldx [%g4+0x38],%g2 | |
21608 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
21609 | bne %xcc,p0_reg_check_fail6 | |
21610 | mov 0xee6,%g1 | |
21611 | ldx [%g4+0x40],%g2 | |
21612 | cmp %l7,%g2 ! %l7 = 0000000076c6c400 | |
21613 | bne %xcc,p0_reg_check_fail7 | |
21614 | mov 0xee7,%g1 | |
21615 | ldx [%g4+0x48],%g3 | |
21616 | std %f4,[%g4] | |
21617 | ldx [%g4],%g2 | |
21618 | cmp %g3,%g2 ! %f4 = 790000ff 00c4c676 | |
21619 | bne %xcc,p0_freg_check_fail | |
21620 | mov 0xf04,%g1 | |
21621 | ldx [%g4+0x50],%g3 | |
21622 | std %f10,[%g4] | |
21623 | ldx [%g4],%g2 | |
21624 | cmp %g3,%g2 ! %f10 = ffc4c676 9d3d79ff | |
21625 | bne %xcc,p0_freg_check_fail | |
21626 | mov 0xf10,%g1 | |
21627 | ldx [%g4+0x58],%g3 | |
21628 | std %f12,[%g4] | |
21629 | ldx [%g4],%g2 | |
21630 | cmp %g3,%g2 ! %f12 = 00000000 000000ff | |
21631 | bne %xcc,p0_freg_check_fail | |
21632 | mov 0xf12,%g1 | |
21633 | ldx [%g4+0x60],%g3 | |
21634 | std %f26,[%g4] | |
21635 | ldx [%g4],%g2 | |
21636 | cmp %g3,%g2 ! %f26 = 00000000 000000ff | |
21637 | bne %xcc,p0_freg_check_fail | |
21638 | mov 0xf26,%g1 | |
21639 | ||
21640 | ! Check Point 104 completed | |
21641 | ||
21642 | ||
21643 | p0_label_521: | |
21644 | ! Mem[0000000010081408] = ffff00ff, %f3 = ffc4c676 | |
21645 | lda [%i2+%o4]0x88,%f3 ! %f3 = ffff00ff | |
21646 | ! Mem[0000000010181408] = 0000000000000000, %l7 = 0000000076c6c400 | |
21647 | ldx [%i6+%o4],%l7 ! %l7 = 0000000000000000 | |
21648 | ! Mem[0000000030181408] = ffc4c6769d3d79ff, %l7 = 0000000000000000 | |
21649 | ldxa [%i6+%o4]0x89,%l7 ! %l7 = ffc4c6769d3d79ff | |
21650 | ! Mem[00000000100c1400] = 000000ff, %l1 = 0000000000000000 | |
21651 | ldswa [%i3+%g0]0x88,%l1 ! %l1 = 00000000000000ff | |
21652 | ! Mem[0000000010041410] = 00000000, %l5 = 00000000ff0000ff | |
21653 | ldsha [%i1+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
21654 | ! Mem[0000000010081410] = 0000000000000076, %l1 = 00000000000000ff | |
21655 | ldxa [%i2+%o5]0x88,%l1 ! %l1 = 0000000000000076 | |
21656 | ! Mem[0000000010141408] = ff000000, %l7 = ffc4c6769d3d79ff | |
21657 | lduwa [%i5+%o4]0x80,%l7 ! %l7 = 00000000ff000000 | |
21658 | ! Mem[0000000030001408] = 000000ff, %f27 = 000000ff | |
21659 | lda [%i0+%o4]0x89,%f27 ! %f27 = 000000ff | |
21660 | ! Mem[0000000030081400] = 000000c6, %l1 = 0000000000000076 | |
21661 | ldsha [%i2+%g0]0x81,%l1 ! %l1 = 0000000000000000 | |
21662 | ! Starting 10 instruction Store Burst | |
21663 | ! %f12 = 00000000, Mem[0000000030141410] = ffc4c676 | |
21664 | sta %f12,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00000000 | |
21665 | ||
21666 | p0_label_522: | |
21667 | ! %l0 = 00000000, %l1 = 00000000, Mem[0000000030041410] = ffc4c676 9d3d79ff | |
21668 | stda %l0,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000 00000000 | |
21669 | ! %f0 = ffc4c676 76000000, %l0 = 0000000000000000 | |
21670 | ! Mem[0000000010101410] = 000094ffc6000000 | |
21671 | add %i4,0x010,%g1 | |
21672 | stda %f0,[%g1+%l0]ASI_PST32_P ! Mem[0000000010101410] = 000094ffc6000000 | |
21673 | ! Mem[0000000010041400] = 000000ff, %l3 = 00000000ffffffff | |
21674 | ldstuba [%i1+%g0]0x88,%l3 ! %l3 = 000000ff000000ff | |
21675 | ! %l1 = 0000000000000000, Mem[0000000010181410] = 00000000 | |
21676 | stwa %l1,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000 | |
21677 | ! Mem[0000000030141408] = 000000ff, %l4 = 0000000000000000 | |
21678 | ldstuba [%i5+%o4]0x89,%l4 ! %l4 = 000000ff000000ff | |
21679 | ! Mem[0000000030041408] = 00000000, %l6 = 0000000000000000 | |
21680 | swapa [%i1+%o4]0x81,%l6 ! %l6 = 0000000000000000 | |
21681 | ! Mem[00000000300c1408] = ffffffff, %l0 = 0000000000000000 | |
21682 | ldstuba [%i3+%o4]0x81,%l0 ! %l0 = 000000ff000000ff | |
21683 | ! Mem[0000000010081408] = ffff00ff, %l3 = 00000000000000ff | |
21684 | ldstuba [%i2+%o4]0x88,%l3 ! %l3 = 000000ff000000ff | |
21685 | ! %l6 = 00000000, %l7 = ff000000, Mem[0000000010041408] = 000000ff 00000000 | |
21686 | stda %l6,[%i1+%o4]0x88 ! Mem[0000000010041408] = 00000000 ff000000 | |
21687 | ! Starting 10 instruction Load Burst | |
21688 | ! Mem[0000000010001408] = 000000ff, %l5 = 0000000000000000 | |
21689 | lduwa [%i0+%o4]0x80,%l5 ! %l5 = 00000000000000ff | |
21690 | ||
21691 | p0_label_523: | |
21692 | ! Mem[0000000030081410] = ff3d79ffff000000, %f12 = 00000000 000000ff | |
21693 | ldda [%i2+%o5]0x81,%f12 ! %f12 = ff3d79ff ff000000 | |
21694 | ! Mem[0000000030041400] = 76c6c4ff, %l0 = 00000000000000ff | |
21695 | lduha [%i1+%g0]0x81,%l0 ! %l0 = 00000000000076c6 | |
21696 | ! Mem[0000000010081400] = ff0000ff, %l2 = 0000000000000000 | |
21697 | lduba [%i2+%g0]0x80,%l2 ! %l2 = 00000000000000ff | |
21698 | ! Mem[0000000010181400] = ffffff00 00009400, %l0 = 000076c6, %l1 = 00000000 | |
21699 | ldd [%i6+%g0],%l0 ! %l0 = 00000000ffffff00 0000000000009400 | |
21700 | ! Mem[0000000030101410] = ff000079ffffffff, %l2 = 00000000000000ff | |
21701 | ldxa [%i4+%o5]0x81,%l2 ! %l2 = ff000079ffffffff | |
21702 | ! Mem[000000001010141c] = 76ff411f, %f18 = 0000ffff | |
21703 | ld [%i4+0x01c],%f18 ! %f18 = 76ff411f | |
21704 | membar #Sync ! Added by membar checker (86) | |
21705 | ! Mem[0000000010001400] = 00000000 00000000 000000ff 000000ff | |
21706 | ! Mem[0000000010001410] = 000000ff 00000000 000000c6 ffff0000 | |
21707 | ! Mem[0000000010001420] = 00000000 00000000 9d3d79ff 000000ff | |
21708 | ! Mem[0000000010001430] = 000023e3 00009c15 0000ffff 00000076 | |
21709 | ldda [%i0]ASI_BLK_AIUPL,%f16 ! Block Load from 0000000010001400 | |
21710 | ! Mem[00000000100c1410] = ff00000000000000, %l6 = 0000000000000000 | |
21711 | ldxa [%i3+%o5]0x88,%l6 ! %l6 = ff00000000000000 | |
21712 | ! Mem[0000000030141408] = 000000ff000000ff, %l2 = ff000079ffffffff | |
21713 | ldxa [%i5+%o4]0x89,%l2 ! %l2 = 000000ff000000ff | |
21714 | ! Starting 10 instruction Store Burst | |
21715 | ! Mem[00000000100c141e] = 2164159c, %l1 = 0000000000009400 | |
21716 | ldstub [%i3+0x01e],%l1 ! %l1 = 00000015000000ff | |
21717 | ||
21718 | p0_label_524: | |
21719 | ! %f11 = 9d3d79ff, Mem[0000000010041410] = 00000000 | |
21720 | sta %f11,[%i1+%o5]0x80 ! Mem[0000000010041410] = 9d3d79ff | |
21721 | ! %l0 = 00000000ffffff00, Mem[00000000211c0001] = 9cff1a4c, %asi = 80 | |
21722 | stba %l0,[%o2+0x001]%asi ! Mem[00000000211c0000] = 9c001a4c | |
21723 | ! Mem[00000000100c143c] = 000000ff, %l5 = 00000000000000ff | |
21724 | swap [%i3+0x03c],%l5 ! %l5 = 00000000000000ff | |
21725 | ! Mem[0000000030181410] = 00000000, %l5 = 00000000000000ff | |
21726 | ldstuba [%i6+%o5]0x81,%l5 ! %l5 = 00000000000000ff | |
21727 | ! Mem[0000000030101408] = 00000000, %l3 = 00000000000000ff | |
21728 | swapa [%i4+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
21729 | ! %f7 = ffffffff, Mem[0000000010101400] = ff000000 | |
21730 | sta %f7 ,[%i4+%g0]0x80 ! Mem[0000000010101400] = ffffffff | |
21731 | ! %f10 = ffc4c676 9d3d79ff, Mem[0000000010041408] = 00000000 ff000000 | |
21732 | stda %f10,[%i1+%o4]0x88 ! Mem[0000000010041408] = ffc4c676 9d3d79ff | |
21733 | ! %f10 = ffc4c676, Mem[0000000030081400] = c6000000 | |
21734 | sta %f10,[%i2+%g0]0x89 ! Mem[0000000030081400] = ffc4c676 | |
21735 | ! Mem[0000000010041400] = ff000000, %l4 = 00000000000000ff | |
21736 | ldstuba [%i1+%g0]0x80,%l4 ! %l4 = 000000ff000000ff | |
21737 | ! Starting 10 instruction Load Burst | |
21738 | ! Mem[0000000010041408] = ff793d9d, %l7 = 00000000ff000000 | |
21739 | lduha [%i1+%o4]0x80,%l7 ! %l7 = 000000000000ff79 | |
21740 | ||
21741 | p0_label_525: | |
21742 | ! Mem[0000000030041410] = 00000000, %f11 = 9d3d79ff | |
21743 | lda [%i1+%o5]0x81,%f11 ! %f11 = 00000000 | |
21744 | ! Mem[0000000010041400] = ff0000ff 000000ff, %l4 = 000000ff, %l5 = 00000000 | |
21745 | ldda [%i1+%g0]0x88,%l4 ! %l4 = 00000000000000ff 00000000ff0000ff | |
21746 | ! Mem[000000001000140c] = 000000ff, %l0 = 00000000ffffff00 | |
21747 | ldub [%i0+0x00c],%l0 ! %l0 = 0000000000000000 | |
21748 | ! Mem[0000000030141410] = 00000000, %l5 = 00000000ff0000ff | |
21749 | ldsba [%i5+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
21750 | ! Mem[0000000010141410] = ffc4c676 76000000, %l2 = 000000ff, %l3 = 00000000 | |
21751 | ldda [%i5+%o5]0x80,%l2 ! %l2 = 00000000ffc4c676 0000000076000000 | |
21752 | ! Mem[0000000010001400] = 00000000, %l7 = 000000000000ff79 | |
21753 | lduba [%i0+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
21754 | ! Mem[0000000010001410] = 000000ff, %l0 = 0000000000000000 | |
21755 | ldswa [%i0+%o5]0x80,%l0 ! %l0 = 00000000000000ff | |
21756 | ! Mem[0000000010081400] = ff0000ff00000000, %l6 = ff00000000000000 | |
21757 | ldxa [%i2+%g0]0x80,%l6 ! %l6 = ff0000ff00000000 | |
21758 | ! Mem[0000000010081410] = 00000076, %l1 = 0000000000000015 | |
21759 | ldsba [%i2+%o5]0x88,%l1 ! %l1 = 0000000000000076 | |
21760 | ! Starting 10 instruction Store Burst | |
21761 | ! Mem[0000000030141400] = 000000ff, %l1 = 0000000000000076 | |
21762 | swapa [%i5+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
21763 | ||
21764 | ! Check Point 105 for processor 0 | |
21765 | ||
21766 | set p0_check_pt_data_105,%g4 | |
21767 | rd %ccr,%g5 ! %g5 = 44 | |
21768 | ldx [%g4+0x08],%g2 | |
21769 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
21770 | bne %xcc,p0_reg_check_fail0 | |
21771 | mov 0xee0,%g1 | |
21772 | ldx [%g4+0x10],%g2 | |
21773 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
21774 | bne %xcc,p0_reg_check_fail1 | |
21775 | mov 0xee1,%g1 | |
21776 | ldx [%g4+0x18],%g2 | |
21777 | cmp %l2,%g2 ! %l2 = 00000000ffc4c676 | |
21778 | bne %xcc,p0_reg_check_fail2 | |
21779 | mov 0xee2,%g1 | |
21780 | ldx [%g4+0x20],%g2 | |
21781 | cmp %l3,%g2 ! %l3 = 0000000076000000 | |
21782 | bne %xcc,p0_reg_check_fail3 | |
21783 | mov 0xee3,%g1 | |
21784 | ldx [%g4+0x28],%g2 | |
21785 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
21786 | bne %xcc,p0_reg_check_fail4 | |
21787 | mov 0xee4,%g1 | |
21788 | ldx [%g4+0x30],%g2 | |
21789 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
21790 | bne %xcc,p0_reg_check_fail5 | |
21791 | mov 0xee5,%g1 | |
21792 | ldx [%g4+0x38],%g2 | |
21793 | cmp %l6,%g2 ! %l6 = ff0000ff00000000 | |
21794 | bne %xcc,p0_reg_check_fail6 | |
21795 | mov 0xee6,%g1 | |
21796 | ldx [%g4+0x40],%g2 | |
21797 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
21798 | bne %xcc,p0_reg_check_fail7 | |
21799 | mov 0xee7,%g1 | |
21800 | ldx [%g4+0x48],%g3 | |
21801 | std %f0,[%g4] | |
21802 | ldx [%g4],%g2 | |
21803 | cmp %g3,%g2 ! %f0 = ffc4c676 76000000 | |
21804 | bne %xcc,p0_freg_check_fail | |
21805 | mov 0xf00,%g1 | |
21806 | ldx [%g4+0x50],%g3 | |
21807 | std %f2,[%g4] | |
21808 | ldx [%g4],%g2 | |
21809 | cmp %g3,%g2 ! %f2 = 00000000 ffff00ff | |
21810 | bne %xcc,p0_freg_check_fail | |
21811 | mov 0xf02,%g1 | |
21812 | ldx [%g4+0x58],%g3 | |
21813 | std %f4,[%g4] | |
21814 | ldx [%g4],%g2 | |
21815 | cmp %g3,%g2 ! %f4 = 790000ff 00c4c676 | |
21816 | bne %xcc,p0_freg_check_fail | |
21817 | mov 0xf04,%g1 | |
21818 | ldx [%g4+0x60],%g3 | |
21819 | std %f10,[%g4] | |
21820 | ldx [%g4],%g2 | |
21821 | cmp %g3,%g2 ! %f10 = ffc4c676 00000000 | |
21822 | bne %xcc,p0_freg_check_fail | |
21823 | mov 0xf10,%g1 | |
21824 | ldx [%g4+0x68],%g3 | |
21825 | std %f12,[%g4] | |
21826 | ldx [%g4],%g2 | |
21827 | cmp %g3,%g2 ! %f12 = ff3d79ff ff000000 | |
21828 | bne %xcc,p0_freg_check_fail | |
21829 | mov 0xf12,%g1 | |
21830 | ldx [%g4+0x70],%g3 | |
21831 | std %f16,[%g4] | |
21832 | ldx [%g4],%g2 | |
21833 | cmp %g3,%g2 ! %f16 = 00000000 00000000 | |
21834 | bne %xcc,p0_freg_check_fail | |
21835 | mov 0xf16,%g1 | |
21836 | ldx [%g4+0x78],%g3 | |
21837 | std %f18,[%g4] | |
21838 | ldx [%g4],%g2 | |
21839 | cmp %g3,%g2 ! %f18 = ff000000 ff000000 | |
21840 | bne %xcc,p0_freg_check_fail | |
21841 | mov 0xf18,%g1 | |
21842 | ldx [%g4+0x80],%g3 | |
21843 | std %f20,[%g4] | |
21844 | ldx [%g4],%g2 | |
21845 | cmp %g3,%g2 ! %f20 = 00000000 ff000000 | |
21846 | bne %xcc,p0_freg_check_fail | |
21847 | mov 0xf20,%g1 | |
21848 | ldx [%g4+0x88],%g3 | |
21849 | std %f22,[%g4] | |
21850 | ldx [%g4],%g2 | |
21851 | cmp %g3,%g2 ! %f22 = 0000ffff c6000000 | |
21852 | bne %xcc,p0_freg_check_fail | |
21853 | mov 0xf22,%g1 | |
21854 | ldx [%g4+0x90],%g3 | |
21855 | std %f24,[%g4] | |
21856 | ldx [%g4],%g2 | |
21857 | cmp %g3,%g2 ! %f24 = 00000000 00000000 | |
21858 | bne %xcc,p0_freg_check_fail | |
21859 | mov 0xf24,%g1 | |
21860 | ldx [%g4+0x98],%g3 | |
21861 | std %f26,[%g4] | |
21862 | ldx [%g4],%g2 | |
21863 | cmp %g3,%g2 ! %f26 = ff000000 ff793d9d | |
21864 | bne %xcc,p0_freg_check_fail | |
21865 | mov 0xf26,%g1 | |
21866 | ldx [%g4+0xa0],%g3 | |
21867 | std %f28,[%g4] | |
21868 | ldx [%g4],%g2 | |
21869 | cmp %g3,%g2 ! %f28 = 159c0000 e3230000 | |
21870 | bne %xcc,p0_freg_check_fail | |
21871 | mov 0xf28,%g1 | |
21872 | ldx [%g4+0xa8],%g3 | |
21873 | std %f30,[%g4] | |
21874 | ldx [%g4],%g2 | |
21875 | cmp %g3,%g2 ! %f30 = 76000000 ffff0000 | |
21876 | bne %xcc,p0_freg_check_fail | |
21877 | mov 0xf30,%g1 | |
21878 | ||
21879 | ! Check Point 105 completed | |
21880 | ||
21881 | ||
21882 | p0_label_526: | |
21883 | ! %l3 = 0000000076000000, Mem[000000001008143c] = 00000000, %asi = 80 | |
21884 | stwa %l3,[%i2+0x03c]%asi ! Mem[000000001008143c] = 76000000 | |
21885 | ! Mem[0000000010181410] = 00000000, %l6 = ff0000ff00000000 | |
21886 | ldstuba [%i6+%o5]0x80,%l6 ! %l6 = 00000000000000ff | |
21887 | ! %l1 = 00000000000000ff, Mem[0000000010041400] = ff000000ff0000ff | |
21888 | stxa %l1,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000000000ff | |
21889 | ! %f0 = ffc4c676 76000000 00000000 ffff00ff | |
21890 | ! %f4 = 790000ff 00c4c676 00000012 ffffffff | |
21891 | ! %f8 = 000000ff c7ec13bb ffc4c676 00000000 | |
21892 | ! %f12 = ff3d79ff ff000000 c6000000 0000ffff | |
21893 | stda %f0,[%i3]ASI_BLK_AIUP ! Block Store to 00000000100c1400 | |
21894 | ! %f18 = ff000000 ff000000, %l3 = 0000000076000000 | |
21895 | ! Mem[0000000030101420] = ff0000ffc6000000 | |
21896 | add %i4,0x020,%g1 | |
21897 | stda %f18,[%g1+%l3]ASI_PST8_SL ! Mem[0000000030101420] = ff0000ffc6000000 | |
21898 | ! Mem[0000000030041408] = 00000000, %l6 = 0000000000000000 | |
21899 | ldstuba [%i1+%o4]0x81,%l6 ! %l6 = 00000000000000ff | |
21900 | ! Mem[0000000010041400] = 00000000, %l0 = 00000000000000ff | |
21901 | ldstuba [%i1+%g0]0x80,%l0 ! %l0 = 00000000000000ff | |
21902 | ! %l4 = 00000000000000ff, Mem[0000000010181429] = 00000000, %asi = 80 | |
21903 | stba %l4,[%i6+0x029]%asi ! Mem[0000000010181428] = 00ff0000 | |
21904 | ! %l5 = 0000000000000000, Mem[0000000010141408] = 000000ff | |
21905 | stha %l5,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000000 | |
21906 | ! Starting 10 instruction Load Burst | |
21907 | ! %l5 = 0000000000000000, Mem[0000000010041400] = ff000000 | |
21908 | stba %l5,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000 | |
21909 | ||
21910 | p0_label_527: | |
21911 | ! Mem[00000000300c1408] = 00000000 ffffffff, %l2 = ffc4c676, %l3 = 76000000 | |
21912 | ldda [%i3+%o4]0x89,%l2 ! %l2 = 00000000ffffffff 0000000000000000 | |
21913 | ! Mem[000000001000142c] = 000000ff, %l6 = 0000000000000000, %asi = 80 | |
21914 | swapa [%i0+0x02c]%asi,%l6 ! %l6 = 00000000000000ff | |
21915 | ! Mem[0000000030041408] = ff000000, %l0 = 0000000000000000 | |
21916 | lduba [%i1+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
21917 | ! Mem[00000000300c1410] = ffffffff, %f27 = ff793d9d | |
21918 | lda [%i3+%o5]0x89,%f27 ! %f27 = ffffffff | |
21919 | ! Mem[0000000010001438] = 0000ffff00000076, %l0 = 00000000000000ff | |
21920 | ldxa [%i0+0x038]%asi,%l0 ! %l0 = 0000ffff00000076 | |
21921 | ! Mem[0000000010181400] = 00ffffff, %l2 = 00000000ffffffff | |
21922 | ldsba [%i6+%g0]0x88,%l2 ! %l2 = ffffffffffffffff | |
21923 | ! Mem[0000000030101408] = 000000ff, %l0 = 0000ffff00000076 | |
21924 | ldsba [%i4+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
21925 | ! Mem[0000000010001408] = 000000ff, %l5 = 0000000000000000 | |
21926 | lduha [%i0+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
21927 | ! Mem[0000000010181410] = ff000000, %l2 = ffffffffffffffff | |
21928 | lduwa [%i6+%o5]0x80,%l2 ! %l2 = 00000000ff000000 | |
21929 | ! Starting 10 instruction Store Burst | |
21930 | ! %l7 = 0000000000000000, Mem[0000000030081410] = ff3d79ff | |
21931 | stha %l7,[%i2+%o5]0x81 ! Mem[0000000030081410] = 000079ff | |
21932 | ||
21933 | p0_label_528: | |
21934 | ! %l7 = 0000000000000000, Mem[0000000010081400] = ff0000ff00000000, %asi = 80 | |
21935 | stxa %l7,[%i2+0x000]%asi ! Mem[0000000010081400] = 0000000000000000 | |
21936 | ! %f30 = 76000000, Mem[0000000010141424] = c7ec13bb | |
21937 | st %f30,[%i5+0x024] ! Mem[0000000010141424] = 76000000 | |
21938 | ! %l4 = 00000000000000ff, Mem[0000000030181410] = 000000ff | |
21939 | stwa %l4,[%i6+%o5]0x89 ! Mem[0000000030181410] = 000000ff | |
21940 | ! %l2 = 00000000ff000000, Mem[0000000010141408] = 00000000 | |
21941 | stwa %l2,[%i5+%o4]0x80 ! Mem[0000000010141408] = ff000000 | |
21942 | ! %l1 = 00000000000000ff, Mem[0000000030141410] = 0000000000000000 | |
21943 | stxa %l1,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00000000000000ff | |
21944 | ! Code Fragment 4 | |
21945 | p0_fragment_18: | |
21946 | ! %l0 = 0000000000000000 | |
21947 | setx 0x72658df0106f37cf,%g7,%l0 ! %l0 = 72658df0106f37cf | |
21948 | ! %l1 = 00000000000000ff | |
21949 | setx 0xacb75a18119c7566,%g7,%l1 ! %l1 = acb75a18119c7566 | |
21950 | setx 0x7ff8, %g1, %g2 | |
21951 | and %l0, %g2, %l0 | |
21952 | setx 0xffffffff, %g1, %g2 | |
21953 | and %l1, %g2, %l1 | |
21954 | setx 0x100000000, %g1, %g2 | |
21955 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
21956 | ta T_CHANGE_HPRIV | |
21957 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
21958 | ta T_CHANGE_NONHPRIV | |
21959 | ! %l0 = 72658df0106f37cf | |
21960 | setx 0x7cf6280fd5fdf886,%g7,%l0 ! %l0 = 7cf6280fd5fdf886 | |
21961 | ! %l1 = acb75a18119c7566 | |
21962 | setx 0x3f9bb4e7ab49f370,%g7,%l1 ! %l1 = 3f9bb4e7ab49f370 | |
21963 | ! %f17 = 00000000, Mem[00000000100c1410] = ff000079 | |
21964 | sta %f17,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 00000000 | |
21965 | ! Mem[0000000020800000] = ffff8470, %l3 = 0000000000000000 | |
21966 | ldstuba [%o1+0x000]%asi,%l3 ! %l3 = 000000ff000000ff | |
21967 | ! %l6 = 00000000000000ff, Mem[0000000030081408] = 00000000ffff00ff | |
21968 | stxa %l6,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000000000000ff | |
21969 | ! Starting 10 instruction Load Burst | |
21970 | ! Mem[0000000010041410] = ff793d9d, %l5 = 0000000000000000 | |
21971 | ldsha [%i1+%o5]0x88,%l5 ! %l5 = 0000000000003d9d | |
21972 | ||
21973 | p0_label_529: | |
21974 | ! Mem[0000000010001410] = ff000000, %l7 = 0000000000000000 | |
21975 | lduha [%i0+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
21976 | membar #Sync ! Added by membar checker (87) | |
21977 | ! Mem[00000000100c1400] = ffc4c676, %l6 = 00000000000000ff | |
21978 | ldsba [%i3+%g0]0x80,%l6 ! %l6 = ffffffffffffffff | |
21979 | ! Mem[0000000030001408] = ff000000 ff000000, %l0 = d5fdf886, %l1 = ab49f370 | |
21980 | ldda [%i0+%o4]0x81,%l0 ! %l0 = 00000000ff000000 00000000ff000000 | |
21981 | ! Mem[0000000010101400] = ffffffff, %l2 = 00000000ff000000 | |
21982 | ldsba [%i4+%g0]0x80,%l2 ! %l2 = ffffffffffffffff | |
21983 | ! Mem[0000000030101410] = 790000ff, %l2 = ffffffffffffffff | |
21984 | ldsha [%i4+%o5]0x89,%l2 ! %l2 = 00000000000000ff | |
21985 | ! Mem[0000000010041400] = 00000000 000000ff, %l0 = ff000000, %l1 = ff000000 | |
21986 | ldd [%i1+%g0],%l0 ! %l0 = 0000000000000000 00000000000000ff | |
21987 | ! Mem[0000000010001410] = ff000000, %l0 = 0000000000000000 | |
21988 | lduwa [%i0+%o5]0x88,%l0 ! %l0 = 00000000ff000000 | |
21989 | ! Mem[0000000021800040] = 9c9c1df3, %l5 = 0000000000003d9d | |
21990 | lduha [%o3+0x040]%asi,%l5 ! %l5 = 0000000000009c9c | |
21991 | ! Mem[00000000201c0000] = 00ff9457, %l3 = 00000000000000ff | |
21992 | lduba [%o0+0x000]%asi,%l3 ! %l3 = 0000000000000000 | |
21993 | ! Starting 10 instruction Store Burst | |
21994 | ! Mem[0000000010101408] = ffffffff, %l6 = ffffffffffffffff | |
21995 | ldstuba [%i4+%o4]0x80,%l6 ! %l6 = 000000ff000000ff | |
21996 | ||
21997 | p0_label_530: | |
21998 | ! Mem[0000000030081410] = 000079ff, %l4 = 00000000000000ff | |
21999 | lduba [%i2+%o5]0x81,%l4 ! %l4 = 0000000000000000 | |
22000 | ! Mem[0000000020800001] = ffff8470, %l7 = 0000000000000000 | |
22001 | ldstub [%o1+0x001],%l7 ! %l7 = 000000ff000000ff | |
22002 | ! %l2 = 00000000000000ff, Mem[0000000030101410] = 790000ff | |
22003 | stwa %l2,[%i4+%o5]0x89 ! Mem[0000000030101410] = 000000ff | |
22004 | ! Mem[0000000030141400] = 76000000, %l2 = 00000000000000ff | |
22005 | swapa [%i5+%g0]0x81,%l2 ! %l2 = 0000000076000000 | |
22006 | ! %f8 = 000000ff c7ec13bb, %l3 = 0000000000000000 | |
22007 | ! Mem[0000000010041408] = ff793d9d76c6c4ff | |
22008 | add %i1,0x008,%g1 | |
22009 | stda %f8,[%g1+%l3]ASI_PST8_P ! Mem[0000000010041408] = ff793d9d76c6c4ff | |
22010 | ! %l0 = ff000000, %l1 = 000000ff, Mem[0000000010101400] = ffffffff 597bac10 | |
22011 | stda %l0,[%i4+%g0]0x80 ! Mem[0000000010101400] = ff000000 000000ff | |
22012 | ! %l4 = 00000000, %l5 = 00009c9c, Mem[0000000010041400] = 00000000 000000ff | |
22013 | stda %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000 00009c9c | |
22014 | ! Mem[0000000010081400] = 00000000, %l3 = 0000000000000000 | |
22015 | swapa [%i2+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
22016 | ! %l6 = 00000000000000ff, Mem[0000000010101410] = 000094ff | |
22017 | stwa %l6,[%i4+%o5]0x80 ! Mem[0000000010101410] = 000000ff | |
22018 | ! Starting 10 instruction Load Burst | |
22019 | ! Mem[0000000010041410] = 9d3d79ff, %l3 = 0000000000000000 | |
22020 | ldsba [%i1+%o5]0x80,%l3 ! %l3 = ffffffffffffff9d | |
22021 | ||
22022 | ! Check Point 106 for processor 0 | |
22023 | ||
22024 | set p0_check_pt_data_106,%g4 | |
22025 | rd %ccr,%g5 ! %g5 = 44 | |
22026 | ldx [%g4+0x08],%g2 | |
22027 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
22028 | bne %xcc,p0_reg_check_fail0 | |
22029 | mov 0xee0,%g1 | |
22030 | ldx [%g4+0x10],%g2 | |
22031 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
22032 | bne %xcc,p0_reg_check_fail1 | |
22033 | mov 0xee1,%g1 | |
22034 | ldx [%g4+0x18],%g2 | |
22035 | cmp %l2,%g2 ! %l2 = 0000000076000000 | |
22036 | bne %xcc,p0_reg_check_fail2 | |
22037 | mov 0xee2,%g1 | |
22038 | ldx [%g4+0x20],%g2 | |
22039 | cmp %l3,%g2 ! %l3 = ffffffffffffff9d | |
22040 | bne %xcc,p0_reg_check_fail3 | |
22041 | mov 0xee3,%g1 | |
22042 | ldx [%g4+0x28],%g2 | |
22043 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
22044 | bne %xcc,p0_reg_check_fail4 | |
22045 | mov 0xee4,%g1 | |
22046 | ldx [%g4+0x30],%g2 | |
22047 | cmp %l5,%g2 ! %l5 = 0000000000009c9c | |
22048 | bne %xcc,p0_reg_check_fail5 | |
22049 | mov 0xee5,%g1 | |
22050 | ldx [%g4+0x38],%g2 | |
22051 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
22052 | bne %xcc,p0_reg_check_fail6 | |
22053 | mov 0xee6,%g1 | |
22054 | ldx [%g4+0x40],%g2 | |
22055 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
22056 | bne %xcc,p0_reg_check_fail7 | |
22057 | mov 0xee7,%g1 | |
22058 | ldx [%g4+0x48],%g3 | |
22059 | std %f0,[%g4] | |
22060 | ldx [%g4],%g2 | |
22061 | cmp %g3,%g2 ! %f0 = ffc4c676 76000000 | |
22062 | bne %xcc,p0_freg_check_fail | |
22063 | mov 0xf00,%g1 | |
22064 | ldx [%g4+0x50],%g3 | |
22065 | std %f2,[%g4] | |
22066 | ldx [%g4],%g2 | |
22067 | cmp %g3,%g2 ! %f2 = 00000000 ffff00ff | |
22068 | bne %xcc,p0_freg_check_fail | |
22069 | mov 0xf02,%g1 | |
22070 | ldx [%g4+0x58],%g3 | |
22071 | std %f26,[%g4] | |
22072 | ldx [%g4],%g2 | |
22073 | cmp %g3,%g2 ! %f26 = ff000000 ffffffff | |
22074 | bne %xcc,p0_freg_check_fail | |
22075 | mov 0xf26,%g1 | |
22076 | ||
22077 | ! Check Point 106 completed | |
22078 | ||
22079 | ||
22080 | p0_label_531: | |
22081 | ! Mem[00000000100c1418] = 00000012, %l3 = ffffffffffffff9d | |
22082 | ldsba [%i3+0x019]%asi,%l3 ! %l3 = 0000000000000000 | |
22083 | ! Mem[0000000030141408] = ff000000, %l1 = 00000000000000ff | |
22084 | lduwa [%i5+%o4]0x81,%l1 ! %l1 = 00000000ff000000 | |
22085 | ! Mem[00000000300c1410] = 000000ffffffffff, %f6 = 00000012 ffffffff | |
22086 | ldda [%i3+%o5]0x89,%f6 ! %f6 = 000000ff ffffffff | |
22087 | ! Mem[0000000010041400] = 0000000000009c9c, %l7 = 00000000000000ff | |
22088 | ldxa [%i1+%g0]0x80,%l7 ! %l7 = 0000000000009c9c | |
22089 | ! Mem[0000000010101400] = ff000000 000000ff, %l4 = 00000000, %l5 = 00009c9c | |
22090 | ldda [%i4+%g0]0x80,%l4 ! %l4 = 00000000ff000000 00000000000000ff | |
22091 | ! %f16 = 00000000 00000000, %l7 = 0000000000009c9c | |
22092 | ! Mem[0000000010101428] = ff00000076ff411f | |
22093 | add %i4,0x028,%g1 | |
22094 | stda %f16,[%g1+%l7]ASI_PST32_P ! Mem[0000000010101428] = ff00000076ff411f | |
22095 | ! Mem[0000000010141410] = ffc4c67676000000, %f2 = 00000000 ffff00ff | |
22096 | ldda [%i5+%o5]0x80,%f2 ! %f2 = ffc4c676 76000000 | |
22097 | ! Mem[0000000030181410] = ff000000, %l5 = 00000000000000ff | |
22098 | lduwa [%i6+%o5]0x81,%l5 ! %l5 = 00000000ff000000 | |
22099 | ! Mem[0000000010141410] = ffc4c67676000000, %l4 = 00000000ff000000 | |
22100 | ldxa [%i5+%o5]0x80,%l4 ! %l4 = ffc4c67676000000 | |
22101 | ! Starting 10 instruction Store Burst | |
22102 | ! Mem[00000000100c140b] = 00000000, %l0 = 00000000ff000000 | |
22103 | ldstub [%i3+0x00b],%l0 ! %l0 = 00000000000000ff | |
22104 | ||
22105 | p0_label_532: | |
22106 | ! Mem[0000000030101400] = 000000d4, %l3 = 0000000000000000 | |
22107 | swapa [%i4+%g0]0x81,%l3 ! %l3 = 00000000000000d4 | |
22108 | ! Mem[0000000030141400] = 000000ff, %l0 = 0000000000000000 | |
22109 | swapa [%i5+%g0]0x81,%l0 ! %l0 = 00000000000000ff | |
22110 | ! %l6 = 000000ff, %l7 = 00009c9c, Mem[0000000030041400] = 76c6c4ff 00000000 | |
22111 | stda %l6,[%i1+%g0]0x81 ! Mem[0000000030041400] = 000000ff 00009c9c | |
22112 | ! Mem[0000000010181404] = 00009400, %l6 = 000000ff, %l5 = ff000000 | |
22113 | add %i6,0x04,%g1 | |
22114 | casa [%g1]0x80,%l6,%l5 ! %l5 = 0000000000009400 | |
22115 | ! Mem[0000000010101400] = ff000000, %l1 = 00000000ff000000 | |
22116 | ldstuba [%i4+%g0]0x80,%l1 ! %l1 = 000000ff000000ff | |
22117 | ! %l5 = 0000000000009400, Mem[0000000030181410] = 000000ff | |
22118 | stba %l5,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000 | |
22119 | ! %l4 = ffc4c67676000000, Mem[0000000020800040] = ffff7379, %asi = 80 | |
22120 | stba %l4,[%o1+0x040]%asi ! Mem[0000000020800040] = 00ff7379 | |
22121 | ! %l5 = 0000000000009400, Mem[0000000010001400] = 00000000 | |
22122 | stwa %l5,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00009400 | |
22123 | ! Mem[0000000010101408] = ffffffff, %l2 = 0000000076000000 | |
22124 | swapa [%i4+%o4]0x80,%l2 ! %l2 = 00000000ffffffff | |
22125 | ! Starting 10 instruction Load Burst | |
22126 | ! Mem[0000000010101400] = ff000000 000000ff, %l4 = 76000000, %l5 = 00009400 | |
22127 | ldda [%i4+%g0]0x80,%l4 ! %l4 = 00000000ff000000 00000000000000ff | |
22128 | ||
22129 | p0_label_533: | |
22130 | ! Mem[0000000010141408] = 000000ff, %l5 = 00000000000000ff | |
22131 | ldsba [%i5+%o4]0x88,%l5 ! %l5 = ffffffffffffffff | |
22132 | ! Mem[0000000030181410] = 00000000, %l3 = 00000000000000d4 | |
22133 | lduha [%i6+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
22134 | ! Mem[00000000211c0000] = 9c001a4c, %l2 = 00000000ffffffff | |
22135 | ldsha [%o2+0x000]%asi,%l2 ! %l2 = ffffffffffff9c00 | |
22136 | ! Mem[0000000020800000] = ffff8470, %l5 = ffffffffffffffff | |
22137 | ldsh [%o1+%g0],%l5 ! %l5 = ffffffffffffffff | |
22138 | ! Mem[0000000010101408] = 76000000, %l0 = 00000000000000ff | |
22139 | ldsha [%i4+%o4]0x80,%l0 ! %l0 = 0000000000007600 | |
22140 | ! Mem[0000000030081400] = 76c6c4ff, %l5 = ffffffffffffffff | |
22141 | lduwa [%i2+%g0]0x81,%l5 ! %l5 = 0000000076c6c4ff | |
22142 | ! Mem[0000000010041400] = 00000000, %f24 = 00000000 | |
22143 | lda [%i1+%g0]0x80,%f24 ! %f24 = 00000000 | |
22144 | ! Mem[0000000030101408] = 00000000 ff000000, %l0 = 00007600, %l1 = 000000ff | |
22145 | ldda [%i4+%o4]0x89,%l0 ! %l0 = 00000000ff000000 0000000000000000 | |
22146 | ! Mem[0000000010101400] = ff000000, %l5 = 0000000076c6c4ff | |
22147 | lduba [%i4+%g0]0x80,%l5 ! %l5 = 00000000000000ff | |
22148 | ! Starting 10 instruction Store Burst | |
22149 | ! %l0 = 00000000ff000000, Mem[0000000030041410] = 0000000000000000 | |
22150 | stxa %l0,[%i1+%o5]0x89 ! Mem[0000000030041410] = 00000000ff000000 | |
22151 | ||
22152 | p0_label_534: | |
22153 | ! %f0 = ffc4c676, Mem[0000000030181410] = 00000000 | |
22154 | sta %f0 ,[%i6+%o5]0x81 ! Mem[0000000030181410] = ffc4c676 | |
22155 | ! %l7 = 0000000000009c9c, Mem[0000000010041420] = 1f41ff76000000ff | |
22156 | stx %l7,[%i1+0x020] ! Mem[0000000010041420] = 0000000000009c9c | |
22157 | ! Mem[000000001018142c] = 000000ff, %l2 = ffffffffffff9c00 | |
22158 | swap [%i6+0x02c],%l2 ! %l2 = 00000000000000ff | |
22159 | ! %f30 = 76000000 ffff0000, Mem[00000000100c1408] = 000000ff ffff00ff | |
22160 | stda %f30,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 76000000 ffff0000 | |
22161 | ! %l4 = ff000000, %l5 = 000000ff, Mem[0000000030081400] = 76c6c4ff 00000000 | |
22162 | stda %l4,[%i2+%g0]0x81 ! Mem[0000000030081400] = ff000000 000000ff | |
22163 | ! Mem[0000000030001408] = ff000000, %l0 = 00000000ff000000 | |
22164 | ldswa [%i0+%o4]0x81,%l0 ! %l0 = ffffffffff000000 | |
22165 | ! %l6 = 000000ff, %l7 = 00009c9c, Mem[0000000010001430] = 000023e3 00009c15 | |
22166 | std %l6,[%i0+0x030] ! Mem[0000000010001430] = 000000ff 00009c9c | |
22167 | ! %f30 = 76000000, Mem[0000000010041408] = ff793d9d | |
22168 | sta %f30,[%i1+%o4]0x80 ! Mem[0000000010041408] = 76000000 | |
22169 | ! %l0 = ffffffffff000000, Mem[000000001018143e] = 00000000, %asi = 80 | |
22170 | stha %l0,[%i6+0x03e]%asi ! Mem[000000001018143c] = 00000000 | |
22171 | ! Starting 10 instruction Load Burst | |
22172 | ! Mem[00000000300c1410] = ffffffff, %f31 = ffff0000 | |
22173 | lda [%i3+%o5]0x89,%f31 ! %f31 = ffffffff | |
22174 | ||
22175 | p0_label_535: | |
22176 | ! Mem[0000000010081408] = ff00ffff, %l7 = 0000000000009c9c | |
22177 | ldsha [%i2+%o4]0x80,%l7 ! %l7 = ffffffffffffff00 | |
22178 | ! Mem[00000000300c1408] = ffffffff, %l2 = 00000000000000ff | |
22179 | ldswa [%i3+%o4]0x81,%l2 ! %l2 = ffffffffffffffff | |
22180 | ! Mem[00000000201c0000] = 00ff9457, %l2 = ffffffffffffffff | |
22181 | lduba [%o0+0x000]%asi,%l2 ! %l2 = 0000000000000000 | |
22182 | ! Mem[0000000010141408] = 000000ff, %l5 = 00000000000000ff | |
22183 | ldsha [%i5+%o4]0x88,%l5 ! %l5 = 00000000000000ff | |
22184 | ! Mem[00000000201c0000] = 00ff9457, %l5 = 00000000000000ff | |
22185 | ldub [%o0+0x001],%l5 ! %l5 = 00000000000000ff | |
22186 | ! Mem[0000000030181400] = 000000c6, %l5 = 00000000000000ff | |
22187 | ldsha [%i6+%g0]0x81,%l5 ! %l5 = 0000000000000000 | |
22188 | ! Mem[0000000010001410] = 000000ff00000000, %l3 = 0000000000000000 | |
22189 | ldxa [%i0+0x010]%asi,%l3 ! %l3 = 000000ff00000000 | |
22190 | ! Mem[0000000010101408] = 00000000 00000076, %l2 = 00000000, %l3 = 00000000 | |
22191 | ldda [%i4+%o4]0x88,%l2 ! %l2 = 0000000000000076 0000000000000000 | |
22192 | membar #Sync ! Added by membar checker (88) | |
22193 | ! Mem[0000000030041400] = 000000ff 00009c9c ff000000 00000000 | |
22194 | ! Mem[0000000030041410] = 000000ff 00000000 000000c6 00000000 | |
22195 | ! Mem[0000000030041420] = 1f41ff76 2164159c 3739e890 ffffac00 | |
22196 | ! Mem[0000000030041430] = ff000000 000000c6 00000000 00000000 | |
22197 | ldda [%i1]ASI_BLK_S,%f16 ! Block Load from 0000000030041400 | |
22198 | ! Starting 10 instruction Store Burst | |
22199 | ! %l7 = ffffffffffffff00, Mem[00000000100c1400] = 0000007676c6c4ff | |
22200 | stxa %l7,[%i3+%g0]0x88 ! Mem[00000000100c1400] = ffffffffffffff00 | |
22201 | ||
22202 | ! Check Point 107 for processor 0 | |
22203 | ||
22204 | set p0_check_pt_data_107,%g4 | |
22205 | rd %ccr,%g5 ! %g5 = 44 | |
22206 | ldx [%g4+0x08],%g2 | |
22207 | cmp %l0,%g2 ! %l0 = ffffffffff000000 | |
22208 | bne %xcc,p0_reg_check_fail0 | |
22209 | mov 0xee0,%g1 | |
22210 | ldx [%g4+0x10],%g2 | |
22211 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
22212 | bne %xcc,p0_reg_check_fail1 | |
22213 | mov 0xee1,%g1 | |
22214 | ldx [%g4+0x18],%g2 | |
22215 | cmp %l2,%g2 ! %l2 = 0000000000000076 | |
22216 | bne %xcc,p0_reg_check_fail2 | |
22217 | mov 0xee2,%g1 | |
22218 | ldx [%g4+0x20],%g2 | |
22219 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
22220 | bne %xcc,p0_reg_check_fail3 | |
22221 | mov 0xee3,%g1 | |
22222 | ldx [%g4+0x28],%g2 | |
22223 | cmp %l4,%g2 ! %l4 = 00000000ff000000 | |
22224 | bne %xcc,p0_reg_check_fail4 | |
22225 | mov 0xee4,%g1 | |
22226 | ldx [%g4+0x30],%g2 | |
22227 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
22228 | bne %xcc,p0_reg_check_fail5 | |
22229 | mov 0xee5,%g1 | |
22230 | ldx [%g4+0x38],%g2 | |
22231 | cmp %l7,%g2 ! %l7 = ffffffffffffff00 | |
22232 | bne %xcc,p0_reg_check_fail7 | |
22233 | mov 0xee7,%g1 | |
22234 | ldx [%g4+0x40],%g3 | |
22235 | std %f0,[%g4] | |
22236 | ldx [%g4],%g2 | |
22237 | cmp %g3,%g2 ! %f0 = ffc4c676 76000000 | |
22238 | bne %xcc,p0_freg_check_fail | |
22239 | mov 0xf00,%g1 | |
22240 | ldx [%g4+0x48],%g3 | |
22241 | std %f2,[%g4] | |
22242 | ldx [%g4],%g2 | |
22243 | cmp %g3,%g2 ! %f2 = ffc4c676 76000000 | |
22244 | bne %xcc,p0_freg_check_fail | |
22245 | mov 0xf02,%g1 | |
22246 | ldx [%g4+0x50],%g3 | |
22247 | std %f4,[%g4] | |
22248 | ldx [%g4],%g2 | |
22249 | cmp %g3,%g2 ! %f4 = 790000ff 00c4c676 | |
22250 | bne %xcc,p0_freg_check_fail | |
22251 | mov 0xf04,%g1 | |
22252 | ldx [%g4+0x58],%g3 | |
22253 | std %f6,[%g4] | |
22254 | ldx [%g4],%g2 | |
22255 | cmp %g3,%g2 ! %f6 = 000000ff ffffffff | |
22256 | bne %xcc,p0_freg_check_fail | |
22257 | mov 0xf06,%g1 | |
22258 | ldx [%g4+0x60],%g3 | |
22259 | std %f16,[%g4] | |
22260 | ldx [%g4],%g2 | |
22261 | cmp %g3,%g2 ! %f16 = 000000ff 00009c9c | |
22262 | bne %xcc,p0_freg_check_fail | |
22263 | mov 0xf16,%g1 | |
22264 | ldx [%g4+0x68],%g3 | |
22265 | std %f18,[%g4] | |
22266 | ldx [%g4],%g2 | |
22267 | cmp %g3,%g2 ! %f18 = ff000000 00000000 | |
22268 | bne %xcc,p0_freg_check_fail | |
22269 | mov 0xf18,%g1 | |
22270 | ldx [%g4+0x70],%g3 | |
22271 | std %f20,[%g4] | |
22272 | ldx [%g4],%g2 | |
22273 | cmp %g3,%g2 ! %f20 = 000000ff 00000000 | |
22274 | bne %xcc,p0_freg_check_fail | |
22275 | mov 0xf20,%g1 | |
22276 | ldx [%g4+0x78],%g3 | |
22277 | std %f22,[%g4] | |
22278 | ldx [%g4],%g2 | |
22279 | cmp %g3,%g2 ! %f22 = 000000c6 00000000 | |
22280 | bne %xcc,p0_freg_check_fail | |
22281 | mov 0xf22,%g1 | |
22282 | ldx [%g4+0x80],%g3 | |
22283 | std %f24,[%g4] | |
22284 | ldx [%g4],%g2 | |
22285 | cmp %g3,%g2 ! %f24 = 1f41ff76 2164159c | |
22286 | bne %xcc,p0_freg_check_fail | |
22287 | mov 0xf24,%g1 | |
22288 | ldx [%g4+0x88],%g3 | |
22289 | std %f26,[%g4] | |
22290 | ldx [%g4],%g2 | |
22291 | cmp %g3,%g2 ! %f26 = 3739e890 ffffac00 | |
22292 | bne %xcc,p0_freg_check_fail | |
22293 | mov 0xf26,%g1 | |
22294 | ldx [%g4+0x90],%g3 | |
22295 | std %f28,[%g4] | |
22296 | ldx [%g4],%g2 | |
22297 | cmp %g3,%g2 ! %f28 = ff000000 000000c6 | |
22298 | bne %xcc,p0_freg_check_fail | |
22299 | mov 0xf28,%g1 | |
22300 | ldx [%g4+0x98],%g3 | |
22301 | std %f30,[%g4] | |
22302 | ldx [%g4],%g2 | |
22303 | cmp %g3,%g2 ! %f30 = 00000000 00000000 | |
22304 | bne %xcc,p0_freg_check_fail | |
22305 | mov 0xf30,%g1 | |
22306 | ||
22307 | ! Check Point 107 completed | |
22308 | ||
22309 | ||
22310 | p0_label_536: | |
22311 | ! Randomly selected nop | |
22312 | nop | |
22313 | ! %l3 = 0000000000000000, Mem[0000000030001410] = 000034ff | |
22314 | stwa %l3,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00000000 | |
22315 | ! %l4 = 00000000ff000000, Mem[0000000010001400] = 00009400 | |
22316 | stba %l4,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00009400 | |
22317 | ! %l2 = 00000076, %l3 = 00000000, Mem[0000000010001410] = ff000000 00000000 | |
22318 | stda %l2,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00000076 00000000 | |
22319 | ! %l3 = 0000000000000000, Mem[00000000300c1400] = 00000000 | |
22320 | stwa %l3,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00000000 | |
22321 | ! %l2 = 0000000000000076, Mem[0000000030001400] = ff0000ff | |
22322 | stwa %l2,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00000076 | |
22323 | ! Mem[00000000201c0001] = 00ff9457, %l7 = ffffffffffffff00 | |
22324 | ldstuba [%o0+0x001]%asi,%l7 ! %l7 = 000000ff000000ff | |
22325 | ! Mem[0000000010081410] = 00000076, %l6 = 00000000000000ff | |
22326 | ldstuba [%i2+%o5]0x88,%l6 ! %l6 = 00000076000000ff | |
22327 | ! Mem[0000000010101410] = 000000ff, %l3 = 0000000000000000 | |
22328 | swapa [%i4+%o5]0x80,%l3 ! %l3 = 00000000000000ff | |
22329 | ! Starting 10 instruction Load Burst | |
22330 | ! Mem[000000001018143c] = 00000000, %l0 = ffffffffff000000 | |
22331 | ldsba [%i6+0x03c]%asi,%l0 ! %l0 = 0000000000000000 | |
22332 | ||
22333 | p0_label_537: | |
22334 | ! Mem[0000000010081400] = 00000000, %f13 = ff000000 | |
22335 | lda [%i2+%g0]0x88,%f13 ! %f13 = 00000000 | |
22336 | ! Mem[0000000030041408] = 000000ff, %l4 = 00000000ff000000 | |
22337 | ldswa [%i1+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
22338 | ! Mem[0000000010181400] = 0094000000ffffff, %l7 = 00000000000000ff | |
22339 | ldxa [%i6+%g0]0x88,%l7 ! %l7 = 0094000000ffffff | |
22340 | ! Mem[00000000300c1400] = 00000000, %l5 = 0000000000000000 | |
22341 | ldswa [%i3+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
22342 | ! Mem[0000000010081400] = 00000000, %l7 = 0094000000ffffff | |
22343 | ldswa [%i2+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
22344 | ! Mem[00000000100c1434] = ff000000, %l3 = 00000000000000ff | |
22345 | lduwa [%i3+0x034]%asi,%l3 ! %l3 = 00000000ff000000 | |
22346 | ! Mem[0000000030001400] = 7600000000000000, %l4 = 00000000000000ff | |
22347 | ldxa [%i0+%g0]0x81,%l4 ! %l4 = 7600000000000000 | |
22348 | ! Mem[0000000030101400] = 00000000, %l4 = 7600000000000000 | |
22349 | ldsha [%i4+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
22350 | ! Mem[00000000100c1400] = ffffff00, %l4 = 0000000000000000 | |
22351 | lduha [%i3+%g0]0x88,%l4 ! %l4 = 000000000000ff00 | |
22352 | ! Starting 10 instruction Store Burst | |
22353 | ! %l3 = 00000000ff000000, Mem[0000000010001430] = 000000ff | |
22354 | stw %l3,[%i0+0x030] ! Mem[0000000010001430] = ff000000 | |
22355 | ||
22356 | p0_label_538: | |
22357 | ! %l7 = 0000000000000000, Mem[0000000021800140] = ffc61df6 | |
22358 | sth %l7,[%o3+0x140] ! Mem[0000000021800140] = 00001df6 | |
22359 | membar #Sync ! Added by membar checker (89) | |
22360 | ! %l4 = 000000000000ff00, Mem[0000000030041408] = ff000000 | |
22361 | stwa %l4,[%i1+%o4]0x81 ! Mem[0000000030041408] = 0000ff00 | |
22362 | ! %l5 = 0000000000000000, Mem[0000000010001408] = ff000000 | |
22363 | stba %l5,[%i0+%o4]0x88 ! Mem[0000000010001408] = ff000000 | |
22364 | ! %l5 = 0000000000000000, Mem[0000000010181400] = ffffff00 | |
22365 | stwa %l5,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000 | |
22366 | ! Mem[0000000010101400] = ff000000, %l5 = 0000000000000000 | |
22367 | swapa [%i4+%g0]0x80,%l5 ! %l5 = 00000000ff000000 | |
22368 | ! Mem[00000000100c1418] = 00000012ffffffff, %l4 = 000000000000ff00, %l4 = 000000000000ff00 | |
22369 | add %i3,0x18,%g1 | |
22370 | casxa [%g1]0x80,%l4,%l4 ! %l4 = 00000012ffffffff | |
22371 | ! Code Fragment 4 | |
22372 | p0_fragment_19: | |
22373 | ! %l0 = 0000000000000000 | |
22374 | setx 0x29212ab8373e32f0,%g7,%l0 ! %l0 = 29212ab8373e32f0 | |
22375 | ! %l1 = 0000000000000000 | |
22376 | setx 0x2ea029cfbdb1338c,%g7,%l1 ! %l1 = 2ea029cfbdb1338c | |
22377 | setx 0x7ff8, %g1, %g2 | |
22378 | and %l0, %g2, %l0 | |
22379 | setx 0xffffffff, %g1, %g2 | |
22380 | and %l1, %g2, %l1 | |
22381 | setx 0x100000000, %g1, %g2 | |
22382 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
22383 | ta T_CHANGE_HPRIV | |
22384 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
22385 | ta T_CHANGE_NONHPRIV | |
22386 | ! %l0 = 29212ab8373e32f0 | |
22387 | setx 0xb13f6707961628fa,%g7,%l0 ! %l0 = b13f6707961628fa | |
22388 | ! %l1 = 2ea029cfbdb1338c | |
22389 | setx 0x317aa3dfda01c788,%g7,%l1 ! %l1 = 317aa3dfda01c788 | |
22390 | ! %l2 = 0000000000000076, Mem[0000000030081400] = ff000000000000ff | |
22391 | stxa %l2,[%i2+%g0]0x81 ! Mem[0000000030081400] = 0000000000000076 | |
22392 | ! %f22 = 000000c6 00000000, Mem[0000000010041410] = 9d3d79ff ffc40000 | |
22393 | stda %f22,[%i1+%o5]0x80 ! Mem[0000000010041410] = 000000c6 00000000 | |
22394 | ! Starting 10 instruction Load Burst | |
22395 | ! Mem[0000000010101400] = ff000000 00000000, %l2 = 00000076, %l3 = ff000000 | |
22396 | ldda [%i4+%g0]0x88,%l2 ! %l2 = 0000000000000000 00000000ff000000 | |
22397 | ||
22398 | p0_label_539: | |
22399 | ! Mem[0000000030141410] = ff00000000000000, %f6 = 000000ff ffffffff | |
22400 | ldda [%i5+%o5]0x81,%f6 ! %f6 = ff000000 00000000 | |
22401 | ! Mem[0000000021800040] = 9c9c1df3, %l5 = 00000000ff000000 | |
22402 | lduh [%o3+0x040],%l5 ! %l5 = 0000000000009c9c | |
22403 | ! Mem[0000000010001400] = 00000000 00009400, %l6 = 00000076, %l7 = 00000000 | |
22404 | ldda [%i0+%g0]0x88,%l6 ! %l6 = 0000000000009400 0000000000000000 | |
22405 | ! Mem[0000000010101400] = 00000000, %l2 = 0000000000000000 | |
22406 | lduba [%i4+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
22407 | ! Mem[0000000010181438] = ff000000 00000000, %l2 = 00000000, %l3 = ff000000 | |
22408 | ldd [%i6+0x038],%l2 ! %l2 = 00000000ff000000 0000000000000000 | |
22409 | ! Mem[00000000300c1408] = ffffffff, %l2 = 00000000ff000000 | |
22410 | ldsha [%i3+%o4]0x81,%l2 ! %l2 = ffffffffffffffff | |
22411 | ! Mem[0000000030041400] = 000000ff, %l5 = 0000000000009c9c | |
22412 | lduwa [%i1+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
22413 | ! Mem[0000000010041418] = d4000000 0000ffff, %l4 = ffffffff, %l5 = 000000ff | |
22414 | ldda [%i1+0x018]%asi,%l4 ! %l4 = 00000000d4000000 000000000000ffff | |
22415 | ! Mem[0000000030141408] = ff000000, %l3 = 0000000000000000 | |
22416 | lduha [%i5+%o4]0x81,%l3 ! %l3 = 000000000000ff00 | |
22417 | ! Starting 10 instruction Store Burst | |
22418 | ! %l7 = 0000000000000000, Mem[0000000030081410] = 000079ff | |
22419 | stha %l7,[%i2+%o5]0x81 ! Mem[0000000030081410] = 000079ff | |
22420 | ||
22421 | p0_label_540: | |
22422 | ! %l1 = 317aa3dfda01c788, Mem[0000000010101420] = 00003403, %asi = 80 | |
22423 | stha %l1,[%i4+0x020]%asi ! Mem[0000000010101420] = c7883403 | |
22424 | ! Mem[0000000030181410] = 76c6c4ff, %l2 = ffffffffffffffff | |
22425 | ldstuba [%i6+%o5]0x89,%l2 ! %l2 = 000000ff000000ff | |
22426 | ! %l5 = 000000000000ffff, Mem[0000000010081408] = 00000000ffff00ff | |
22427 | stxa %l5,[%i2+%o4]0x88 ! Mem[0000000010081408] = 000000000000ffff | |
22428 | ! Mem[0000000010001410] = 76000000, %l3 = 000000000000ff00 | |
22429 | ldstuba [%i0+%o5]0x80,%l3 ! %l3 = 00000076000000ff | |
22430 | ! Mem[0000000010141400] = 76c6c400, %l1 = 317aa3dfda01c788 | |
22431 | swapa [%i5+%g0]0x88,%l1 ! %l1 = 0000000076c6c400 | |
22432 | ! %l4 = d4000000, %l5 = 0000ffff, Mem[00000000100c1410] = 00000000 00c4c676 | |
22433 | stda %l4,[%i3+%o5]0x80 ! Mem[00000000100c1410] = d4000000 0000ffff | |
22434 | ! Mem[0000000030181400] = c6000000, %l7 = 0000000000000000 | |
22435 | swapa [%i6+%g0]0x89,%l7 ! %l7 = 00000000c6000000 | |
22436 | ! %f28 = ff000000 000000c6, Mem[0000000030141410] = ff000000 00000000 | |
22437 | stda %f28,[%i5+%o5]0x81 ! Mem[0000000030141410] = ff000000 000000c6 | |
22438 | ! %l2 = 000000ff, %l3 = 00000076, Mem[00000000100c1408] = 00000076 0000ffff | |
22439 | stda %l2,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 000000ff 00000076 | |
22440 | ! Starting 10 instruction Load Burst | |
22441 | ! Mem[00000000211c0000] = 9c001a4c, %l6 = 0000000000009400 | |
22442 | ldub [%o2+0x001],%l6 ! %l6 = 0000000000000000 | |
22443 | ||
22444 | ! Check Point 108 for processor 0 | |
22445 | ||
22446 | set p0_check_pt_data_108,%g4 | |
22447 | rd %ccr,%g5 ! %g5 = 44 | |
22448 | ldx [%g4+0x08],%g2 | |
22449 | cmp %l0,%g2 ! %l0 = b13f6707961628fa | |
22450 | bne %xcc,p0_reg_check_fail0 | |
22451 | mov 0xee0,%g1 | |
22452 | ldx [%g4+0x10],%g2 | |
22453 | cmp %l1,%g2 ! %l1 = 0000000076c6c400 | |
22454 | bne %xcc,p0_reg_check_fail1 | |
22455 | mov 0xee1,%g1 | |
22456 | ldx [%g4+0x18],%g2 | |
22457 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
22458 | bne %xcc,p0_reg_check_fail2 | |
22459 | mov 0xee2,%g1 | |
22460 | ldx [%g4+0x20],%g2 | |
22461 | cmp %l3,%g2 ! %l3 = 0000000000000076 | |
22462 | bne %xcc,p0_reg_check_fail3 | |
22463 | mov 0xee3,%g1 | |
22464 | ldx [%g4+0x28],%g2 | |
22465 | cmp %l4,%g2 ! %l4 = 00000000d4000000 | |
22466 | bne %xcc,p0_reg_check_fail4 | |
22467 | mov 0xee4,%g1 | |
22468 | ldx [%g4+0x30],%g2 | |
22469 | cmp %l5,%g2 ! %l5 = 000000000000ffff | |
22470 | bne %xcc,p0_reg_check_fail5 | |
22471 | mov 0xee5,%g1 | |
22472 | ldx [%g4+0x38],%g2 | |
22473 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
22474 | bne %xcc,p0_reg_check_fail6 | |
22475 | mov 0xee6,%g1 | |
22476 | ldx [%g4+0x40],%g2 | |
22477 | cmp %l7,%g2 ! %l7 = 00000000c6000000 | |
22478 | bne %xcc,p0_reg_check_fail7 | |
22479 | mov 0xee7,%g1 | |
22480 | ldx [%g4+0x48],%g3 | |
22481 | std %f2,[%g4] | |
22482 | ldx [%g4],%g2 | |
22483 | cmp %g3,%g2 ! %f2 = ffc4c676 76000000 | |
22484 | bne %xcc,p0_freg_check_fail | |
22485 | mov 0xf02,%g1 | |
22486 | ldx [%g4+0x50],%g3 | |
22487 | std %f4,[%g4] | |
22488 | ldx [%g4],%g2 | |
22489 | cmp %g3,%g2 ! %f4 = 790000ff 00c4c676 | |
22490 | bne %xcc,p0_freg_check_fail | |
22491 | mov 0xf04,%g1 | |
22492 | ldx [%g4+0x58],%g3 | |
22493 | std %f6,[%g4] | |
22494 | ldx [%g4],%g2 | |
22495 | cmp %g3,%g2 ! %f6 = ff000000 00000000 | |
22496 | bne %xcc,p0_freg_check_fail | |
22497 | mov 0xf06,%g1 | |
22498 | ldx [%g4+0x60],%g3 | |
22499 | std %f12,[%g4] | |
22500 | ldx [%g4],%g2 | |
22501 | cmp %g3,%g2 ! %f12 = ff3d79ff 00000000 | |
22502 | bne %xcc,p0_freg_check_fail | |
22503 | mov 0xf12,%g1 | |
22504 | ||
22505 | ! Check Point 108 completed | |
22506 | ||
22507 | ||
22508 | p0_label_541: | |
22509 | ! Mem[0000000010141410] = 76c6c4ff, %l6 = 0000000000000000 | |
22510 | ldsha [%i5+%o5]0x88,%l6 ! %l6 = ffffffffffffc4ff | |
22511 | ! Mem[0000000010081400] = 00000000, %l1 = 0000000076c6c400 | |
22512 | ldsba [%i2+0x000]%asi,%l1 ! %l1 = 0000000000000000 | |
22513 | ! Mem[0000000010081408] = 0000ffff, %f15 = 0000ffff | |
22514 | lda [%i2+%o4]0x88,%f15 ! %f15 = 0000ffff | |
22515 | ! Mem[0000000030101410] = ff000000ffffffff, %l4 = 00000000d4000000 | |
22516 | ldxa [%i4+%o5]0x81,%l4 ! %l4 = ff000000ffffffff | |
22517 | ! Mem[00000000100c1400] = 00ffffff, %l3 = 0000000000000076 | |
22518 | ldswa [%i3+%g0]0x80,%l3 ! %l3 = 0000000000ffffff | |
22519 | ! Mem[0000000010141410] = ffc4c676, %l0 = b13f6707961628fa | |
22520 | lduha [%i5+%o5]0x80,%l0 ! %l0 = 000000000000ffc4 | |
22521 | ! Mem[0000000010181400] = 00000000, %l6 = ffffffffffffc4ff | |
22522 | ldswa [%i6+%g0]0x80,%l6 ! %l6 = 0000000000000000 | |
22523 | ! Mem[0000000010181400] = 00000000, %l0 = 000000000000ffc4 | |
22524 | ldsba [%i6+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
22525 | ! Mem[0000000010101428] = ff00000076ff411f, %l3 = 0000000000ffffff | |
22526 | ldx [%i4+0x028],%l3 ! %l3 = ff00000076ff411f | |
22527 | ! Starting 10 instruction Store Burst | |
22528 | ! %l2 = 000000ff, %l3 = 76ff411f, Mem[0000000010081410] = ff000000 00000000 | |
22529 | stda %l2,[%i2+%o5]0x80 ! Mem[0000000010081410] = 000000ff 76ff411f | |
22530 | ||
22531 | p0_label_542: | |
22532 | ! %l3 = ff00000076ff411f, Mem[0000000010081400] = 0000000000000000 | |
22533 | stxa %l3,[%i2+%g0]0x88 ! Mem[0000000010081400] = ff00000076ff411f | |
22534 | ! Mem[0000000010141412] = ffc4c676, %l6 = 0000000000000000 | |
22535 | ldstuba [%i5+0x012]%asi,%l6 ! %l6 = 000000c6000000ff | |
22536 | ! Mem[0000000010141408] = ff000000, %l2 = 00000000000000ff | |
22537 | swapa [%i5+%o4]0x80,%l2 ! %l2 = 00000000ff000000 | |
22538 | ! Mem[0000000010001408] = ff000000, %l0 = 0000000000000000 | |
22539 | swapa [%i0+%o4]0x88,%l0 ! %l0 = 00000000ff000000 | |
22540 | ! Mem[00000000100c1414] = 0000ffff, %l2 = ff000000, %l4 = ffffffff | |
22541 | add %i3,0x14,%g1 | |
22542 | casa [%g1]0x80,%l2,%l4 ! %l4 = 000000000000ffff | |
22543 | ! %f22 = 000000c6 00000000, %l5 = 000000000000ffff | |
22544 | ! Mem[0000000010141420] = 000000ff76000000 | |
22545 | add %i5,0x020,%g1 | |
22546 | stda %f22,[%g1+%l5]ASI_PST32_P ! Mem[0000000010141420] = 000000c600000000 | |
22547 | ! Code Fragment 4 | |
22548 | p0_fragment_20: | |
22549 | ! %l0 = 00000000ff000000 | |
22550 | setx 0xc8d9ac900ad397c1,%g7,%l0 ! %l0 = c8d9ac900ad397c1 | |
22551 | ! %l1 = 0000000000000000 | |
22552 | setx 0x468317e003657ccb,%g7,%l1 ! %l1 = 468317e003657ccb | |
22553 | setx 0x7ff8, %g1, %g2 | |
22554 | and %l0, %g2, %l0 | |
22555 | setx 0xffffffff, %g1, %g2 | |
22556 | and %l1, %g2, %l1 | |
22557 | setx 0x100000000, %g1, %g2 | |
22558 | or %l1, %g2, %l1 ! Set bit 32 - perrinj | |
22559 | ta T_CHANGE_HPRIV | |
22560 | stxa %l1, [%l0]ASI_ICACHE_INSTR | |
22561 | ta T_CHANGE_NONHPRIV | |
22562 | ! %l0 = c8d9ac900ad397c1 | |
22563 | setx 0x303d505012a0252f,%g7,%l0 ! %l0 = 303d505012a0252f | |
22564 | ! %l1 = 468317e003657ccb | |
22565 | setx 0x9c37e877f7aa17da,%g7,%l1 ! %l1 = 9c37e877f7aa17da | |
22566 | ! Mem[0000000010001408] = 00000000, %l4 = 000000000000ffff | |
22567 | ldstuba [%i0+%o4]0x88,%l4 ! %l4 = 00000000000000ff | |
22568 | ! %l5 = 000000000000ffff, Mem[0000000030081400] = 00000000 | |
22569 | stwa %l5,[%i2+%g0]0x89 ! Mem[0000000030081400] = 0000ffff | |
22570 | ! Starting 10 instruction Load Burst | |
22571 | ! Mem[0000000010041434] = 597bac10, %l5 = 000000000000ffff | |
22572 | lduha [%i1+0x034]%asi,%l5 ! %l5 = 000000000000597b | |
22573 | ||
22574 | p0_label_543: | |
22575 | ! Mem[0000000010081418] = 000000c6 00000000, %l0 = 12a0252f, %l1 = f7aa17da | |
22576 | ldda [%i2+0x018]%asi,%l0 ! %l0 = 00000000000000c6 0000000000000000 | |
22577 | ! Mem[0000000010141400] = da01c788, %l2 = 00000000ff000000 | |
22578 | ldsha [%i5+%g0]0x88,%l2 ! %l2 = ffffffffffffc788 | |
22579 | ! Mem[0000000030101410] = 000000ff, %l7 = 00000000c6000000 | |
22580 | ldsha [%i4+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
22581 | ! Mem[0000000010041410] = 000000c600000000, %f26 = 3739e890 ffffac00 | |
22582 | ldda [%i1+%o5]0x80,%f26 ! %f26 = 000000c6 00000000 | |
22583 | ! Mem[0000000010081400] = 1f41ff76, %l1 = 0000000000000000 | |
22584 | lduba [%i2+%g0]0x80,%l1 ! %l1 = 000000000000001f | |
22585 | ! Mem[00000000100c1400] = ffffff00, %l4 = 0000000000000000 | |
22586 | lduba [%i3+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
22587 | ! Mem[0000000010141408] = 000000ff, %l6 = 00000000000000c6 | |
22588 | ldsha [%i5+%o4]0x80,%l6 ! %l6 = 0000000000000000 | |
22589 | ! Mem[000000001008141c] = 00000000, %l6 = 0000000000000000 | |
22590 | lduh [%i2+0x01c],%l6 ! %l6 = 0000000000000000 | |
22591 | ! Mem[00000000201c0000] = 00ff9457, %l1 = 000000000000001f | |
22592 | ldub [%o0+0x001],%l1 ! %l1 = 00000000000000ff | |
22593 | ! Starting 10 instruction Store Burst | |
22594 | ! Mem[00000000100c1410] = d4000000, %l2 = ffffffffffffc788 | |
22595 | swapa [%i3+%o5]0x80,%l2 ! %l2 = 00000000d4000000 | |
22596 | ||
22597 | p0_label_544: | |
22598 | ! Mem[0000000010181410] = ff000000, %l6 = 0000000000000000 | |
22599 | ldstuba [%i6+%o5]0x80,%l6 ! %l6 = 000000ff000000ff | |
22600 | ! %l0 = 00000000000000c6, Mem[00000000300c1408] = ffffffff00000000 | |
22601 | stxa %l0,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 00000000000000c6 | |
22602 | ! Mem[0000000010181428] = 00ff0000ffff9c00, %l1 = 00000000000000ff, %l7 = 00000000000000ff | |
22603 | add %i6,0x28,%g1 | |
22604 | casxa [%g1]0x80,%l1,%l7 ! %l7 = 00ff0000ffff9c00 | |
22605 | ! Mem[0000000030141410] = 000000ff, %l6 = 00000000000000ff | |
22606 | ldstuba [%i5+%o5]0x89,%l6 ! %l6 = 000000ff000000ff | |
22607 | ! Mem[0000000010181408] = 0000000000000000, %l7 = 00ff0000ffff9c00, %l4 = 0000000000000000 | |
22608 | add %i6,0x08,%g1 | |
22609 | casxa [%g1]0x80,%l7,%l4 ! %l4 = 0000000000000000 | |
22610 | ! %l1 = 00000000000000ff, Mem[0000000010141410] = ffc4ff7676000000 | |
22611 | stxa %l1,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00000000000000ff | |
22612 | ! Mem[0000000010101410] = 00000000, %l7 = 00ff0000ffff9c00 | |
22613 | ldstuba [%i4+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
22614 | ! %l4 = 0000000000000000, Mem[0000000030001408] = 000000ff000000ff | |
22615 | stxa %l4,[%i0+%o4]0x89 ! Mem[0000000030001408] = 0000000000000000 | |
22616 | ! Mem[0000000010141408] = ff000000, %l4 = 0000000000000000 | |
22617 | swapa [%i5+%o4]0x88,%l4 ! %l4 = 00000000ff000000 | |
22618 | ! Starting 10 instruction Load Burst | |
22619 | membar #Sync ! Added by membar checker (90) | |
22620 | ! Mem[0000000030001400] = 76000000 00000000 00000000 00000000 | |
22621 | ! Mem[0000000030001410] = 00000000 00ffffff 00000012 ffffffff | |
22622 | ! Mem[0000000030001420] = 000000ff 000000ff 000000ff ff0000ff | |
22623 | ! Mem[0000000030001430] = ff000000 00000000 00000000 00ff0000 | |
22624 | ldda [%i0]ASI_BLK_S,%f0 ! Block Load from 0000000030001400 | |
22625 | ||
22626 | p0_label_545: | |
22627 | ! Mem[000000001000140c] = 000000ff, %l5 = 000000000000597b | |
22628 | lduha [%i0+0x00e]%asi,%l5 ! %l5 = 00000000000000ff | |
22629 | ! Mem[0000000010181428] = 00ff0000 ffff9c00, %l0 = 000000c6, %l1 = 000000ff | |
22630 | ldda [%i6+0x028]%asi,%l0 ! %l0 = 0000000000ff0000 00000000ffff9c00 | |
22631 | ! Mem[0000000010001400] = 00000000 00009400, %l0 = 00ff0000, %l1 = ffff9c00 | |
22632 | ldda [%i0+%g0]0x88,%l0 ! %l0 = 0000000000009400 0000000000000000 | |
22633 | ! Mem[0000000030101400] = 00000000, %f20 = 000000ff | |
22634 | lda [%i4+%g0]0x89,%f20 ! %f20 = 00000000 | |
22635 | ! Mem[00000000300c1408] = 00000000, %l6 = 00000000000000ff | |
22636 | ldsha [%i3+%o4]0x81,%l6 ! %l6 = 0000000000000000 | |
22637 | ! Mem[0000000030081408] = 000000ff, %l1 = 0000000000000000 | |
22638 | lduha [%i2+%o4]0x89,%l1 ! %l1 = 00000000000000ff | |
22639 | ! Mem[0000000030001410] = 00000000, %l3 = ff00000076ff411f | |
22640 | ldswa [%i0+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
22641 | ! Mem[0000000030081410] = 000079ffff000000, %f24 = 1f41ff76 2164159c | |
22642 | ldda [%i2+%o5]0x81,%f24 ! %f24 = 000079ff ff000000 | |
22643 | ! Mem[0000000010001400] = 00009400, %l1 = 00000000000000ff | |
22644 | lduha [%i0+%g0]0x88,%l1 ! %l1 = 0000000000009400 | |
22645 | ! Starting 10 instruction Store Burst | |
22646 | ! Mem[0000000030181400] = 00000000, %l0 = 0000000000009400 | |
22647 | ldstuba [%i6+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
22648 | ||
22649 | ! Check Point 109 for processor 0 | |
22650 | ||
22651 | set p0_check_pt_data_109,%g4 | |
22652 | rd %ccr,%g5 ! %g5 = 44 | |
22653 | ldx [%g4+0x08],%g2 | |
22654 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
22655 | bne %xcc,p0_reg_check_fail0 | |
22656 | mov 0xee0,%g1 | |
22657 | ldx [%g4+0x10],%g2 | |
22658 | cmp %l1,%g2 ! %l1 = 0000000000009400 | |
22659 | bne %xcc,p0_reg_check_fail1 | |
22660 | mov 0xee1,%g1 | |
22661 | ldx [%g4+0x18],%g2 | |
22662 | cmp %l2,%g2 ! %l2 = 00000000d4000000 | |
22663 | bne %xcc,p0_reg_check_fail2 | |
22664 | mov 0xee2,%g1 | |
22665 | ldx [%g4+0x20],%g2 | |
22666 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
22667 | bne %xcc,p0_reg_check_fail3 | |
22668 | mov 0xee3,%g1 | |
22669 | ldx [%g4+0x28],%g2 | |
22670 | cmp %l4,%g2 ! %l4 = 00000000ff000000 | |
22671 | bne %xcc,p0_reg_check_fail4 | |
22672 | mov 0xee4,%g1 | |
22673 | ldx [%g4+0x30],%g2 | |
22674 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
22675 | bne %xcc,p0_reg_check_fail5 | |
22676 | mov 0xee5,%g1 | |
22677 | ldx [%g4+0x38],%g2 | |
22678 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
22679 | bne %xcc,p0_reg_check_fail6 | |
22680 | mov 0xee6,%g1 | |
22681 | ldx [%g4+0x40],%g2 | |
22682 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
22683 | bne %xcc,p0_reg_check_fail7 | |
22684 | mov 0xee7,%g1 | |
22685 | ldx [%g4+0x48],%g3 | |
22686 | std %f0,[%g4] | |
22687 | ldx [%g4],%g2 | |
22688 | cmp %g3,%g2 ! %f0 = 76000000 00000000 | |
22689 | bne %xcc,p0_freg_check_fail | |
22690 | mov 0xf00,%g1 | |
22691 | ldx [%g4+0x50],%g3 | |
22692 | std %f2,[%g4] | |
22693 | ldx [%g4],%g2 | |
22694 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
22695 | bne %xcc,p0_freg_check_fail | |
22696 | mov 0xf02,%g1 | |
22697 | ldx [%g4+0x58],%g3 | |
22698 | std %f4,[%g4] | |
22699 | ldx [%g4],%g2 | |
22700 | cmp %g3,%g2 ! %f4 = 00000000 00ffffff | |
22701 | bne %xcc,p0_freg_check_fail | |
22702 | mov 0xf04,%g1 | |
22703 | ldx [%g4+0x60],%g3 | |
22704 | std %f6,[%g4] | |
22705 | ldx [%g4],%g2 | |
22706 | cmp %g3,%g2 ! %f6 = 00000012 ffffffff | |
22707 | bne %xcc,p0_freg_check_fail | |
22708 | mov 0xf06,%g1 | |
22709 | ldx [%g4+0x68],%g3 | |
22710 | std %f8,[%g4] | |
22711 | ldx [%g4],%g2 | |
22712 | cmp %g3,%g2 ! %f8 = 000000ff 000000ff | |
22713 | bne %xcc,p0_freg_check_fail | |
22714 | mov 0xf08,%g1 | |
22715 | ldx [%g4+0x70],%g3 | |
22716 | std %f10,[%g4] | |
22717 | ldx [%g4],%g2 | |
22718 | cmp %g3,%g2 ! %f10 = 000000ff ff0000ff | |
22719 | bne %xcc,p0_freg_check_fail | |
22720 | mov 0xf10,%g1 | |
22721 | ldx [%g4+0x78],%g3 | |
22722 | std %f12,[%g4] | |
22723 | ldx [%g4],%g2 | |
22724 | cmp %g3,%g2 ! %f12 = ff000000 00000000 | |
22725 | bne %xcc,p0_freg_check_fail | |
22726 | mov 0xf12,%g1 | |
22727 | ldx [%g4+0x80],%g3 | |
22728 | std %f14,[%g4] | |
22729 | ldx [%g4],%g2 | |
22730 | cmp %g3,%g2 ! %f14 = 00000000 00ff0000 | |
22731 | bne %xcc,p0_freg_check_fail | |
22732 | mov 0xf14,%g1 | |
22733 | ldx [%g4+0x88],%g3 | |
22734 | std %f20,[%g4] | |
22735 | ldx [%g4],%g2 | |
22736 | cmp %g3,%g2 ! %f20 = 00000000 00000000 | |
22737 | bne %xcc,p0_freg_check_fail | |
22738 | mov 0xf20,%g1 | |
22739 | ldx [%g4+0x90],%g3 | |
22740 | std %f24,[%g4] | |
22741 | ldx [%g4],%g2 | |
22742 | cmp %g3,%g2 ! %f24 = 000079ff ff000000 | |
22743 | bne %xcc,p0_freg_check_fail | |
22744 | mov 0xf24,%g1 | |
22745 | ldx [%g4+0x98],%g3 | |
22746 | std %f26,[%g4] | |
22747 | ldx [%g4],%g2 | |
22748 | cmp %g3,%g2 ! %f26 = 000000c6 00000000 | |
22749 | bne %xcc,p0_freg_check_fail | |
22750 | mov 0xf26,%g1 | |
22751 | ||
22752 | ! Check Point 109 completed | |
22753 | ||
22754 | ||
22755 | p0_label_546: | |
22756 | ! Mem[0000000010041410] = 000000c6, %l4 = 00000000ff000000 | |
22757 | swapa [%i1+%o5]0x80,%l4 ! %l4 = 00000000000000c6 | |
22758 | ! Mem[0000000010141410] = 00000000, %l2 = 00000000d4000000 | |
22759 | ldstuba [%i5+%o5]0x88,%l2 ! %l2 = 00000000000000ff | |
22760 | ! Mem[0000000030141408] = ff000000, %l6 = 0000000000000000 | |
22761 | swapa [%i5+%o4]0x81,%l6 ! %l6 = 00000000ff000000 | |
22762 | ! %f10 = 000000ff ff0000ff, Mem[00000000100c1400] = 00ffffff ffffffff | |
22763 | stda %f10,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 000000ff ff0000ff | |
22764 | ! %l2 = 0000000000000000, Mem[0000000020800001] = ffff8470, %asi = 80 | |
22765 | stba %l2,[%o1+0x001]%asi ! Mem[0000000020800000] = ff008470 | |
22766 | ! Mem[0000000030041408] = 00ff0000, %l3 = 0000000000000000 | |
22767 | swapa [%i1+%o4]0x89,%l3 ! %l3 = 0000000000ff0000 | |
22768 | ! Mem[00000000100c1408] = ff000000, %l1 = 00009400, %l4 = 000000c6 | |
22769 | add %i3,0x08,%g1 | |
22770 | casa [%g1]0x80,%l1,%l4 ! %l4 = 00000000ff000000 | |
22771 | ! %l4 = ff000000, %l5 = 000000ff, Mem[0000000010181418] = ff000000 6600f8ff | |
22772 | stda %l4,[%i6+0x018]%asi ! Mem[0000000010181418] = ff000000 000000ff | |
22773 | ! Mem[0000000010081408] = 0000ffff, %l0 = 0000000000000000 | |
22774 | swapa [%i2+%o4]0x88,%l0 ! %l0 = 000000000000ffff | |
22775 | ! Starting 10 instruction Load Burst | |
22776 | ! Mem[0000000030141400] = 00000000597bac10, %l2 = 0000000000000000 | |
22777 | ldxa [%i5+%g0]0x81,%l2 ! %l2 = 00000000597bac10 | |
22778 | ||
22779 | p0_label_547: | |
22780 | ! Mem[0000000010041424] = 00009c9c, %f29 = 000000c6 | |
22781 | ld [%i1+0x024],%f29 ! %f29 = 00009c9c | |
22782 | ! Mem[0000000030101408] = 000000ff, %l2 = 00000000597bac10 | |
22783 | ldstuba [%i4+%o4]0x81,%l2 ! %l2 = 00000000000000ff | |
22784 | ! Mem[0000000010081410] = 000000ff76ff411f, %f22 = 000000c6 00000000 | |
22785 | ldda [%i2+%o5]0x80,%f22 ! %f22 = 000000ff 76ff411f | |
22786 | ! Mem[0000000030041408] = 0000000000000000, %f0 = 76000000 00000000 | |
22787 | ldda [%i1+%o4]0x89,%f0 ! %f0 = 00000000 00000000 | |
22788 | ! Mem[0000000030141408] = 00000000, %f11 = ff0000ff | |
22789 | lda [%i5+%o4]0x81,%f11 ! %f11 = 00000000 | |
22790 | ! Mem[0000000030041400] = 9c9c0000 ff000000, %l0 = 0000ffff, %l1 = 00009400 | |
22791 | ldda [%i1+%g0]0x89,%l0 ! %l0 = 00000000ff000000 000000009c9c0000 | |
22792 | ! Mem[0000000010041408] = ffc4c67600000076, %l7 = 0000000000000000 | |
22793 | ldxa [%i1+%o4]0x88,%l7 ! %l7 = ffc4c67600000076 | |
22794 | ! Mem[0000000010001418] = 000000c6, %l5 = 00000000000000ff | |
22795 | ldsw [%i0+0x018],%l5 ! %l5 = 00000000000000c6 | |
22796 | ! Mem[0000000030041400] = ff000000, %l4 = 00000000ff000000 | |
22797 | lduha [%i1+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
22798 | ! Starting 10 instruction Store Burst | |
22799 | ! %l6 = 00000000ff000000, Mem[0000000010001410] = 000000ff | |
22800 | stha %l6,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00000000 | |
22801 | ||
22802 | p0_label_548: | |
22803 | ! Mem[0000000010081410] = ff000000, %l0 = 00000000ff000000 | |
22804 | swapa [%i2+%o5]0x88,%l0 ! %l0 = 00000000ff000000 | |
22805 | ! Mem[0000000030141400] = 00000000, %l4 = 0000000000000000 | |
22806 | ldstuba [%i5+%g0]0x89,%l4 ! %l4 = 00000000000000ff | |
22807 | ! Mem[0000000010081400] = 1f41ff76, %l2 = 0000000000000000 | |
22808 | swapa [%i2+%g0]0x80,%l2 ! %l2 = 000000001f41ff76 | |
22809 | ! %f10 = 000000ff 00000000, %l1 = 000000009c9c0000 | |
22810 | ! Mem[0000000010181420] = 000000ff00000000 | |
22811 | add %i6,0x020,%g1 | |
22812 | stda %f10,[%g1+%l1]ASI_PST16_PL ! Mem[0000000010181420] = 000000ff00000000 | |
22813 | ! %l2 = 000000001f41ff76, Mem[000000001010141c] = 76ff411f, %asi = 80 | |
22814 | stba %l2,[%i4+0x01c]%asi ! Mem[000000001010141c] = 76ff411f | |
22815 | ! %l4 = 00000000, %l5 = 000000c6, Mem[0000000010001400] = 00940000 00000000 | |
22816 | stda %l4,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00000000 000000c6 | |
22817 | ! Mem[0000000010081400] = 00000000, %l7 = ffc4c67600000076 | |
22818 | ldstuba [%i2+%g0]0x80,%l7 ! %l7 = 00000000000000ff | |
22819 | ! %f8 = 000000ff 000000ff, %l1 = 000000009c9c0000 | |
22820 | ! Mem[0000000010141408] = 00000000ffc4c676 | |
22821 | add %i5,0x008,%g1 | |
22822 | stda %f8,[%g1+%l1]ASI_PST8_P ! Mem[0000000010141408] = 00000000ffc4c676 | |
22823 | ! %l5 = 00000000000000c6, Mem[0000000030181410] = 0000000076c6c4ff | |
22824 | stxa %l5,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000000000c6 | |
22825 | ! Starting 10 instruction Load Burst | |
22826 | ! Mem[0000000030041400] = ff000000, %l2 = 000000001f41ff76 | |
22827 | ldswa [%i1+%g0]0x89,%l2 ! %l2 = ffffffffff000000 | |
22828 | ||
22829 | p0_label_549: | |
22830 | ! Mem[00000000211c0000] = 9c001a4c, %l2 = ffffffffff000000 | |
22831 | lduh [%o2+%g0],%l2 ! %l2 = 0000000000009c00 | |
22832 | ! Mem[0000000030101408] = 00000000 ff0000ff, %l2 = 00009c00, %l3 = 00ff0000 | |
22833 | ldda [%i4+%o4]0x89,%l2 ! %l2 = 00000000ff0000ff 0000000000000000 | |
22834 | ! Mem[0000000010141408] = 00000000, %l3 = 0000000000000000 | |
22835 | lduwa [%i5+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
22836 | ! Mem[0000000010041408] = 76000000, %l5 = 00000000000000c6 | |
22837 | ldsba [%i1+%o4]0x80,%l5 ! %l5 = 0000000000000076 | |
22838 | ! Mem[0000000030081410] = 000079ff ff000000, %l0 = ff000000, %l1 = 9c9c0000 | |
22839 | ldda [%i2+%o5]0x81,%l0 ! %l0 = 00000000000079ff 00000000ff000000 | |
22840 | ! Mem[0000000010041400] = 00000000, %f6 = 00000012 | |
22841 | lda [%i1+%g0]0x88,%f6 ! %f6 = 00000000 | |
22842 | membar #Sync ! Added by membar checker (91) | |
22843 | ! Mem[0000000030101400] = 00000000 000000ff ff0000ff 00000000 | |
22844 | ! Mem[0000000030101410] = ff000000 ffffffff 00000000 79ff0000 | |
22845 | ! Mem[0000000030101420] = ff0000ff c6000000 0000ffff 00009c15 | |
22846 | ! Mem[0000000030101430] = ffffff9c ffffffff 00000000 ff0000ff | |
22847 | ldda [%i4]ASI_BLK_AIUSL,%f16 ! Block Load from 0000000030101400 | |
22848 | ! Mem[0000000010101408] = 76000000, %l0 = 00000000000079ff | |
22849 | lduba [%i4+%o4]0x80,%l0 ! %l0 = 0000000000000076 | |
22850 | ! Mem[0000000030041400] = 000000ff, %l0 = 0000000000000076 | |
22851 | lduha [%i1+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
22852 | ! Starting 10 instruction Store Burst | |
22853 | ! %l0 = 0000000000000000, Mem[0000000030181400] = ff000000ffffffff | |
22854 | stxa %l0,[%i6+%g0]0x81 ! Mem[0000000030181400] = 0000000000000000 | |
22855 | ||
22856 | p0_label_550: | |
22857 | ! %l1 = 00000000ff000000, Mem[0000000010141410] = 000000ff | |
22858 | stwa %l1,[%i5+%o5]0x88 ! Mem[0000000010141410] = ff000000 | |
22859 | ! Mem[0000000030001408] = 00000000, %l5 = 0000000000000076 | |
22860 | ldsba [%i0+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
22861 | ! Mem[0000000010081410] = ff000000, %l6 = 00000000ff000000 | |
22862 | swapa [%i2+%o5]0x88,%l6 ! %l6 = 00000000ff000000 | |
22863 | ! Mem[0000000010041400] = 00000000, %l4 = 0000000000000000 | |
22864 | swapa [%i1+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
22865 | ! Mem[0000000020800001] = ff008470, %l5 = 0000000000000000 | |
22866 | ldstub [%o1+0x001],%l5 ! %l5 = 00000000000000ff | |
22867 | ! %l0 = 0000000000000000, Mem[0000000010101410] = ff000000 | |
22868 | stwa %l0,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00000000 | |
22869 | ! %l5 = 0000000000000000, Mem[0000000030001410] = 0000000000ffffff | |
22870 | stxa %l5,[%i0+%o5]0x81 ! Mem[0000000030001410] = 0000000000000000 | |
22871 | ! Mem[0000000010141430] = ff0000ff0000ff03, %l0 = 0000000000000000, %l2 = 00000000ff0000ff | |
22872 | add %i5,0x30,%g1 | |
22873 | casxa [%g1]0x80,%l0,%l2 ! %l2 = ff0000ff0000ff03 | |
22874 | ! %l2 = ff0000ff0000ff03, Mem[0000000030141410] = 000000ff | |
22875 | stwa %l2,[%i5+%o5]0x89 ! Mem[0000000030141410] = 0000ff03 | |
22876 | ! Starting 10 instruction Load Burst | |
22877 | ! Mem[0000000010101404] = 000000ff, %l4 = 0000000000000000 | |
22878 | lduh [%i4+0x004],%l4 ! %l4 = 0000000000000000 | |
22879 | ||
22880 | ! Check Point 110 for processor 0 | |
22881 | ||
22882 | set p0_check_pt_data_110,%g4 | |
22883 | rd %ccr,%g5 ! %g5 = 44 | |
22884 | ldx [%g4+0x08],%g2 | |
22885 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
22886 | bne %xcc,p0_reg_check_fail0 | |
22887 | mov 0xee0,%g1 | |
22888 | ldx [%g4+0x10],%g2 | |
22889 | cmp %l2,%g2 ! %l2 = ff0000ff0000ff03 | |
22890 | bne %xcc,p0_reg_check_fail2 | |
22891 | mov 0xee2,%g1 | |
22892 | ldx [%g4+0x18],%g2 | |
22893 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
22894 | bne %xcc,p0_reg_check_fail3 | |
22895 | mov 0xee3,%g1 | |
22896 | ldx [%g4+0x20],%g2 | |
22897 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
22898 | bne %xcc,p0_reg_check_fail4 | |
22899 | mov 0xee4,%g1 | |
22900 | ldx [%g4+0x28],%g2 | |
22901 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
22902 | bne %xcc,p0_reg_check_fail5 | |
22903 | mov 0xee5,%g1 | |
22904 | ldx [%g4+0x30],%g2 | |
22905 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
22906 | bne %xcc,p0_reg_check_fail7 | |
22907 | mov 0xee7,%g1 | |
22908 | ldx [%g4+0x38],%g3 | |
22909 | std %f0,[%g4] | |
22910 | ldx [%g4],%g2 | |
22911 | cmp %g3,%g2 ! %f0 = 00000000 00000000 | |
22912 | bne %xcc,p0_freg_check_fail | |
22913 | mov 0xf00,%g1 | |
22914 | ldx [%g4+0x40],%g3 | |
22915 | std %f2,[%g4] | |
22916 | ldx [%g4],%g2 | |
22917 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
22918 | bne %xcc,p0_freg_check_fail | |
22919 | mov 0xf02,%g1 | |
22920 | ldx [%g4+0x48],%g3 | |
22921 | std %f6,[%g4] | |
22922 | ldx [%g4],%g2 | |
22923 | cmp %g3,%g2 ! %f6 = 00000000 ffffffff | |
22924 | bne %xcc,p0_freg_check_fail | |
22925 | mov 0xf06,%g1 | |
22926 | ldx [%g4+0x50],%g3 | |
22927 | std %f10,[%g4] | |
22928 | ldx [%g4],%g2 | |
22929 | cmp %g3,%g2 ! %f10 = 000000ff 00000000 | |
22930 | bne %xcc,p0_freg_check_fail | |
22931 | mov 0xf10,%g1 | |
22932 | ldx [%g4+0x58],%g3 | |
22933 | std %f16,[%g4] | |
22934 | ldx [%g4],%g2 | |
22935 | cmp %g3,%g2 ! %f16 = ff000000 00000000 | |
22936 | bne %xcc,p0_freg_check_fail | |
22937 | mov 0xf16,%g1 | |
22938 | ldx [%g4+0x60],%g3 | |
22939 | std %f18,[%g4] | |
22940 | ldx [%g4],%g2 | |
22941 | cmp %g3,%g2 ! %f18 = 00000000 ff0000ff | |
22942 | bne %xcc,p0_freg_check_fail | |
22943 | mov 0xf18,%g1 | |
22944 | ldx [%g4+0x68],%g3 | |
22945 | std %f20,[%g4] | |
22946 | ldx [%g4],%g2 | |
22947 | cmp %g3,%g2 ! %f20 = ffffffff 000000ff | |
22948 | bne %xcc,p0_freg_check_fail | |
22949 | mov 0xf20,%g1 | |
22950 | ldx [%g4+0x70],%g3 | |
22951 | std %f22,[%g4] | |
22952 | ldx [%g4],%g2 | |
22953 | cmp %g3,%g2 ! %f22 = 0000ff79 00000000 | |
22954 | bne %xcc,p0_freg_check_fail | |
22955 | mov 0xf22,%g1 | |
22956 | ldx [%g4+0x78],%g3 | |
22957 | std %f24,[%g4] | |
22958 | ldx [%g4],%g2 | |
22959 | cmp %g3,%g2 ! %f24 = 000000c6 ff0000ff | |
22960 | bne %xcc,p0_freg_check_fail | |
22961 | mov 0xf24,%g1 | |
22962 | ldx [%g4+0x80],%g3 | |
22963 | std %f26,[%g4] | |
22964 | ldx [%g4],%g2 | |
22965 | cmp %g3,%g2 ! %f26 = 159c0000 ffff0000 | |
22966 | bne %xcc,p0_freg_check_fail | |
22967 | mov 0xf26,%g1 | |
22968 | ldx [%g4+0x88],%g3 | |
22969 | std %f28,[%g4] | |
22970 | ldx [%g4],%g2 | |
22971 | cmp %g3,%g2 ! %f28 = ffffffff 9cffffff | |
22972 | bne %xcc,p0_freg_check_fail | |
22973 | mov 0xf28,%g1 | |
22974 | ldx [%g4+0x90],%g3 | |
22975 | std %f30,[%g4] | |
22976 | ldx [%g4],%g2 | |
22977 | cmp %g3,%g2 ! %f30 = ff0000ff 00000000 | |
22978 | bne %xcc,p0_freg_check_fail | |
22979 | mov 0xf30,%g1 | |
22980 | ||
22981 | ! Check Point 110 completed | |
22982 | ||
22983 | ||
22984 | p0_label_551: | |
22985 | ! Mem[00000000100c1418] = 00000012ffffffff, %f0 = 00000000 00000000 | |
22986 | ldd [%i3+0x018],%f0 ! %f0 = 00000012 ffffffff | |
22987 | ! Mem[0000000010101410] = 000000c600000000, %f4 = 00000000 00ffffff | |
22988 | ldda [%i4+%o5]0x88,%f4 ! %f4 = 000000c6 00000000 | |
22989 | ! Mem[00000000100c140c] = 76000000, %l6 = 00000000ff000000 | |
22990 | lduba [%i3+0x00e]%asi,%l6 ! %l6 = 0000000000000000 | |
22991 | ! Mem[00000000201c0000] = 00ff9457, %l4 = 0000000000000000 | |
22992 | lduba [%o0+0x001]%asi,%l4 ! %l4 = 00000000000000ff | |
22993 | ! Mem[0000000030101400] = 00000000, %l5 = 0000000000000000 | |
22994 | lduha [%i4+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
22995 | ! Mem[0000000030141400] = ff000000597bac10, %l5 = 0000000000000000 | |
22996 | ldxa [%i5+%g0]0x81,%l5 ! %l5 = ff000000597bac10 | |
22997 | ! Mem[0000000010141410] = ff000000, %l1 = 00000000ff000000 | |
22998 | ldsba [%i5+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
22999 | ! Mem[0000000030141400] = ff000000 597bac10, %l4 = 000000ff, %l5 = 597bac10 | |
23000 | ldda [%i5+%g0]0x81,%l4 ! %l4 = 00000000ff000000 00000000597bac10 | |
23001 | ! Mem[0000000010181430] = 00000000, %l3 = 0000000000000000 | |
23002 | ldsha [%i6+0x032]%asi,%l3 ! %l3 = 0000000000000000 | |
23003 | ! Starting 10 instruction Store Burst | |
23004 | ! %l7 = 0000000000000000, Mem[0000000030141408] = 00000000 | |
23005 | stha %l7,[%i5+%o4]0x89 ! Mem[0000000030141408] = 00000000 | |
23006 | ||
23007 | p0_label_552: | |
23008 | ! %f0 = 00000012 ffffffff 00000000 00000000 | |
23009 | ! %f4 = 000000c6 00000000 00000000 ffffffff | |
23010 | ! %f8 = 000000ff 000000ff 000000ff 00000000 | |
23011 | ! %f12 = ff000000 00000000 00000000 00ff0000 | |
23012 | stda %f0,[%i2]ASI_BLK_PL ! Block Store to 0000000010081400 | |
23013 | ! %f30 = ff0000ff 00000000, Mem[0000000030181408] = ff793d9d 76c6c4ff | |
23014 | stda %f30,[%i6+%o4]0x81 ! Mem[0000000030181408] = ff0000ff 00000000 | |
23015 | ! %f16 = ff000000 00000000 00000000 ff0000ff | |
23016 | ! %f20 = ffffffff 000000ff 0000ff79 00000000 | |
23017 | ! %f24 = 000000c6 ff0000ff 159c0000 ffff0000 | |
23018 | ! %f28 = ffffffff 9cffffff ff0000ff 00000000 | |
23019 | stda %f16,[%i3]ASI_BLK_AIUSL ! Block Store to 00000000300c1400 | |
23020 | membar #Sync ! Added by membar checker (92) | |
23021 | ! Mem[0000000010081400] = ffffffff, %l1 = 0000000000000000 | |
23022 | swapa [%i2+%g0]0x88,%l1 ! %l1 = 00000000ffffffff | |
23023 | ! Mem[0000000010041400] = 00000000, %l6 = 0000000000000000 | |
23024 | ldstuba [%i1+%g0]0x88,%l6 ! %l6 = 00000000000000ff | |
23025 | ! %l7 = 0000000000000000, Mem[0000000010181408] = 0000000000000000 | |
23026 | stxa %l7,[%i6+%o4]0x88 ! Mem[0000000010181408] = 0000000000000000 | |
23027 | ! Mem[0000000010081427] = ff000000, %l2 = ff0000ff0000ff03 | |
23028 | ldstub [%i2+0x027],%l2 ! %l2 = 00000000000000ff | |
23029 | ! Mem[0000000030041408] = 00000000, %l7 = 0000000000000000 | |
23030 | swapa [%i1+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
23031 | ! Mem[0000000010001422] = 00000000, %l1 = 00000000ffffffff | |
23032 | ldstub [%i0+0x022],%l1 ! %l1 = 00000000000000ff | |
23033 | ! Starting 10 instruction Load Burst | |
23034 | ! Mem[0000000030141400] = ff000000597bac10, %l4 = 00000000ff000000 | |
23035 | ldxa [%i5+%g0]0x81,%l4 ! %l4 = ff000000597bac10 | |
23036 | ||
23037 | p0_label_553: | |
23038 | ! Mem[0000000010041400] = ff000000 00009c9c, %l0 = 00000000, %l1 = 00000000 | |
23039 | ldda [%i1+%g0]0x80,%l0 ! %l0 = 00000000ff000000 0000000000009c9c | |
23040 | ! Mem[0000000010041400] = 000000ff, %l7 = 0000000000000000 | |
23041 | lduba [%i1+%g0]0x88,%l7 ! %l7 = 00000000000000ff | |
23042 | ! Mem[0000000020800040] = 00ff7379, %l7 = 00000000000000ff | |
23043 | lduha [%o1+0x040]%asi,%l7 ! %l7 = 00000000000000ff | |
23044 | ! Mem[0000000010001408] = ff000000, %f3 = 00000000 | |
23045 | lda [%i0+%o4]0x80,%f3 ! %f3 = ff000000 | |
23046 | ! Mem[00000000100c1408] = 000000ff, %l4 = ff000000597bac10 | |
23047 | ldswa [%i3+%o4]0x88,%l4 ! %l4 = 00000000000000ff | |
23048 | ! Mem[0000000010141438] = 0000451700000000, %f12 = ff000000 00000000 | |
23049 | ldd [%i5+0x038],%f12 ! %f12 = 00004517 00000000 | |
23050 | ! Mem[0000000030141400] = ff000000, %l3 = 0000000000000000 | |
23051 | ldsha [%i5+%g0]0x81,%l3 ! %l3 = ffffffffffffff00 | |
23052 | ! Mem[00000000218001c0] = 12f32a00, %l3 = ffffffffffffff00 | |
23053 | ldsha [%o3+0x1c0]%asi,%l3 ! %l3 = 00000000000012f3 | |
23054 | ! Mem[0000000030081410] = ff790000, %l5 = 00000000597bac10 | |
23055 | lduba [%i2+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
23056 | ! Starting 10 instruction Store Burst | |
23057 | ! %l3 = 00000000000012f3, Mem[0000000010181400] = 00000000 | |
23058 | stwa %l3,[%i6+%g0]0x80 ! Mem[0000000010181400] = 000012f3 | |
23059 | ||
23060 | p0_label_554: | |
23061 | ! %l1 = 0000000000009c9c, Mem[0000000010081410] = 00000000 | |
23062 | stha %l1,[%i2+%o5]0x88 ! Mem[0000000010081410] = 00009c9c | |
23063 | ! Mem[0000000010181410] = 000000ff, %l0 = 00000000ff000000 | |
23064 | ldstuba [%i6+%o5]0x88,%l0 ! %l0 = 000000ff000000ff | |
23065 | ! %l0 = 00000000000000ff, Mem[0000000010181428] = 00ff0000 | |
23066 | stw %l0,[%i6+0x028] ! Mem[0000000010181428] = 000000ff | |
23067 | ! Mem[0000000030181400] = 00000000, %l7 = 00000000000000ff | |
23068 | ldstuba [%i6+%g0]0x89,%l7 ! %l7 = 00000000000000ff | |
23069 | ! Mem[0000000010141408] = 00000000, %l7 = 0000000000000000 | |
23070 | swapa [%i5+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
23071 | ! %l0 = 00000000000000ff, Mem[0000000030181410] = 000000c6 | |
23072 | stba %l0,[%i6+%o5]0x89 ! Mem[0000000030181410] = 000000ff | |
23073 | ! %f26 = 159c0000 ffff0000, Mem[0000000010101408] = 00000076 00000000 | |
23074 | stda %f26,[%i4+%o4]0x88 ! Mem[0000000010101408] = 159c0000 ffff0000 | |
23075 | ! %l6 = 0000000000000000, Mem[00000000201c0000] = 00ff9457, %asi = 80 | |
23076 | stha %l6,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00009457 | |
23077 | ! %l1 = 0000000000009c9c, Mem[00000000218001c0] = 12f32a00, %asi = 80 | |
23078 | stha %l1,[%o3+0x1c0]%asi ! Mem[00000000218001c0] = 9c9c2a00 | |
23079 | ! Starting 10 instruction Load Burst | |
23080 | ! Mem[0000000030041400] = 000000ff, %l3 = 00000000000012f3 | |
23081 | ldsba [%i1+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
23082 | ||
23083 | p0_label_555: | |
23084 | ! Mem[0000000010181400] = 00940000f3120000, %f20 = ffffffff 000000ff | |
23085 | ldda [%i6+%g0]0x88,%f20 ! %f20 = 00940000 f3120000 | |
23086 | ! Mem[0000000030001408] = 00000000, %l2 = 0000000000000000 | |
23087 | lduba [%i0+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
23088 | ! Mem[0000000030181408] = ff0000ff, %l1 = 0000000000009c9c | |
23089 | ldsba [%i6+%o4]0x81,%l1 ! %l1 = ffffffffffffffff | |
23090 | ! Mem[00000000100c1408] = ff00000076000000, %l7 = 0000000000000000 | |
23091 | ldxa [%i3+%o4]0x80,%l7 ! %l7 = ff00000076000000 | |
23092 | ! Mem[0000000030081408] = 00000000 000000ff, %l2 = 00000000, %l3 = 00000000 | |
23093 | ldda [%i2+%o4]0x89,%l2 ! %l2 = 00000000000000ff 0000000000000000 | |
23094 | ! Mem[00000000100c1410] = ffff000088c7ffff, %l0 = 00000000000000ff | |
23095 | ldxa [%i3+%o5]0x88,%l0 ! %l0 = ffff000088c7ffff | |
23096 | ! Mem[0000000030081410] = 000079ff, %l3 = 0000000000000000 | |
23097 | lduha [%i2+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
23098 | ! Mem[0000000010181400] = 000012f3, %l7 = ff00000076000000 | |
23099 | lduha [%i6+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
23100 | ! Mem[00000000211c0000] = 9c001a4c, %l2 = 00000000000000ff | |
23101 | ldsh [%o2+%g0],%l2 ! %l2 = ffffffffffff9c00 | |
23102 | ! Starting 10 instruction Store Burst | |
23103 | ! Mem[0000000010001400] = 00000000, %l0 = ffff000088c7ffff | |
23104 | ldstuba [%i0+%g0]0x88,%l0 ! %l0 = 00000000000000ff | |
23105 | ||
23106 | ! Check Point 111 for processor 0 | |
23107 | ||
23108 | set p0_check_pt_data_111,%g4 | |
23109 | rd %ccr,%g5 ! %g5 = 44 | |
23110 | ldx [%g4+0x08],%g2 | |
23111 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
23112 | bne %xcc,p0_reg_check_fail0 | |
23113 | mov 0xee0,%g1 | |
23114 | ldx [%g4+0x10],%g2 | |
23115 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
23116 | bne %xcc,p0_reg_check_fail1 | |
23117 | mov 0xee1,%g1 | |
23118 | ldx [%g4+0x18],%g2 | |
23119 | cmp %l2,%g2 ! %l2 = ffffffffffff9c00 | |
23120 | bne %xcc,p0_reg_check_fail2 | |
23121 | mov 0xee2,%g1 | |
23122 | ldx [%g4+0x20],%g2 | |
23123 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
23124 | bne %xcc,p0_reg_check_fail3 | |
23125 | mov 0xee3,%g1 | |
23126 | ldx [%g4+0x28],%g2 | |
23127 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
23128 | bne %xcc,p0_reg_check_fail4 | |
23129 | mov 0xee4,%g1 | |
23130 | ldx [%g4+0x30],%g2 | |
23131 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
23132 | bne %xcc,p0_reg_check_fail5 | |
23133 | mov 0xee5,%g1 | |
23134 | ldx [%g4+0x38],%g2 | |
23135 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
23136 | bne %xcc,p0_reg_check_fail6 | |
23137 | mov 0xee6,%g1 | |
23138 | ldx [%g4+0x40],%g2 | |
23139 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
23140 | bne %xcc,p0_reg_check_fail7 | |
23141 | mov 0xee7,%g1 | |
23142 | ldx [%g4+0x48],%g3 | |
23143 | std %f0,[%g4] | |
23144 | ldx [%g4],%g2 | |
23145 | cmp %g3,%g2 ! %f0 = 00000012 ffffffff | |
23146 | bne %xcc,p0_freg_check_fail | |
23147 | mov 0xf00,%g1 | |
23148 | ldx [%g4+0x50],%g3 | |
23149 | std %f2,[%g4] | |
23150 | ldx [%g4],%g2 | |
23151 | cmp %g3,%g2 ! %f2 = 00000000 ff000000 | |
23152 | bne %xcc,p0_freg_check_fail | |
23153 | mov 0xf02,%g1 | |
23154 | ldx [%g4+0x58],%g3 | |
23155 | std %f4,[%g4] | |
23156 | ldx [%g4],%g2 | |
23157 | cmp %g3,%g2 ! %f4 = 000000c6 00000000 | |
23158 | bne %xcc,p0_freg_check_fail | |
23159 | mov 0xf04,%g1 | |
23160 | ldx [%g4+0x60],%g3 | |
23161 | std %f12,[%g4] | |
23162 | ldx [%g4],%g2 | |
23163 | cmp %g3,%g2 ! %f12 = 00004517 00000000 | |
23164 | bne %xcc,p0_freg_check_fail | |
23165 | mov 0xf12,%g1 | |
23166 | ldx [%g4+0x68],%g3 | |
23167 | std %f20,[%g4] | |
23168 | ldx [%g4],%g2 | |
23169 | cmp %g3,%g2 ! %f20 = 00940000 f3120000 | |
23170 | bne %xcc,p0_freg_check_fail | |
23171 | mov 0xf20,%g1 | |
23172 | ||
23173 | ! Check Point 111 completed | |
23174 | ||
23175 | ||
23176 | p0_label_556: | |
23177 | ! %l4 = 00000000000000ff, Mem[0000000030041400] = 000000ff00009c9c | |
23178 | stxa %l4,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00000000000000ff | |
23179 | ! %f16 = ff000000 00000000 00000000 ff0000ff | |
23180 | ! %f20 = 00940000 f3120000 0000ff79 00000000 | |
23181 | ! %f24 = 000000c6 ff0000ff 159c0000 ffff0000 | |
23182 | ! %f28 = ffffffff 9cffffff ff0000ff 00000000 | |
23183 | stda %f16,[%i2]ASI_BLK_PL ! Block Store to 0000000010081400 | |
23184 | ! Mem[00000000100c142c] = 00000000, %l0 = 00000000, %l4 = 000000ff | |
23185 | add %i3,0x2c,%g1 | |
23186 | casa [%g1]0x80,%l0,%l4 ! %l4 = 0000000000000000 | |
23187 | ! %l6 = 0000000000000000, Mem[00000000211c0001] = 9c001a4c | |
23188 | stb %l6,[%o2+0x001] ! Mem[00000000211c0000] = 9c001a4c | |
23189 | ! %l0 = 00000000, %l1 = ffffffff, Mem[0000000030141408] = 00000000 ff000000 | |
23190 | stda %l0,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 ffffffff | |
23191 | ! %f2 = 00000000 ff000000, %l5 = 0000000000000000 | |
23192 | ! Mem[0000000030001408] = 0000000000000000 | |
23193 | add %i0,0x008,%g1 | |
23194 | stda %f2,[%g1+%l5]ASI_PST16_SL ! Mem[0000000030001408] = 0000000000000000 | |
23195 | ! Mem[0000000010181430] = 00000000ffffffff, %l2 = ffffffffffff9c00, %l6 = 0000000000000000 | |
23196 | add %i6,0x30,%g1 | |
23197 | casxa [%g1]0x80,%l2,%l6 ! %l6 = 00000000ffffffff | |
23198 | ! Mem[0000000030141410] = 0000ff03, %l2 = ffffffffffff9c00 | |
23199 | ldstuba [%i5+%o5]0x89,%l2 ! %l2 = 00000003000000ff | |
23200 | ! Mem[0000000020800040] = 00ff7379, %l3 = 0000000000000000 | |
23201 | ldstub [%o1+0x040],%l3 ! %l3 = 00000000000000ff | |
23202 | ! Starting 10 instruction Load Burst | |
23203 | ! Mem[0000000030001400] = 7600000000000000, %l5 = 0000000000000000 | |
23204 | ldxa [%i0+%g0]0x81,%l5 ! %l5 = 7600000000000000 | |
23205 | ||
23206 | p0_label_557: | |
23207 | ! Mem[0000000030001408] = 00000000, %l0 = 0000000000000000 | |
23208 | lduba [%i0+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
23209 | membar #Sync ! Added by membar checker (93) | |
23210 | ! Mem[0000000010081410] = f3120000, %l0 = 0000000000000000 | |
23211 | ldswa [%i2+%o5]0x88,%l0 ! %l0 = fffffffff3120000 | |
23212 | ! Mem[0000000010081400] = 00000000 000000ff ff0000ff 00000000 | |
23213 | ! Mem[0000000010081410] = 000012f3 00009400 00000000 79ff0000 | |
23214 | ! Mem[0000000010081420] = ff0000ff c6000000 0000ffff 00009c15 | |
23215 | ! Mem[0000000010081430] = ffffff9c ffffffff 00000000 ff0000ff | |
23216 | ldda [%i2]ASI_BLK_P,%f0 ! Block Load from 0000000010081400 | |
23217 | ! Mem[0000000030141400] = 000000ff, %f30 = ff0000ff | |
23218 | lda [%i5+%g0]0x89,%f30 ! %f30 = 000000ff | |
23219 | ! Mem[0000000010081408] = ff0000ff, %l7 = 0000000000000000 | |
23220 | lduwa [%i2+%o4]0x88,%l7 ! %l7 = 00000000ff0000ff | |
23221 | ! Mem[00000000211c0000] = 9c001a4c, %l3 = 0000000000000000 | |
23222 | ldub [%o2+%g0],%l3 ! %l3 = 000000000000009c | |
23223 | ! Mem[0000000030181400] = ff00000000000000, %l3 = 000000000000009c | |
23224 | ldxa [%i6+%g0]0x81,%l3 ! %l3 = ff00000000000000 | |
23225 | ! Mem[0000000030181400] = 000000ff, %l7 = 00000000ff0000ff | |
23226 | ldsha [%i6+%g0]0x89,%l7 ! %l7 = 00000000000000ff | |
23227 | ! Mem[0000000020800000] = ffff8470, %l4 = 0000000000000000 | |
23228 | ldsb [%o1+0x001],%l4 ! %l4 = ffffffffffffffff | |
23229 | ! Starting 10 instruction Store Burst | |
23230 | ! Mem[0000000030101408] = ff0000ff, %l6 = 00000000ffffffff | |
23231 | swapa [%i4+%o4]0x81,%l6 ! %l6 = 00000000ff0000ff | |
23232 | ||
23233 | p0_label_558: | |
23234 | ! %l4 = ffffffffffffffff, Mem[0000000010101402] = 00000000, %asi = 80 | |
23235 | stha %l4,[%i4+0x002]%asi ! Mem[0000000010101400] = 0000ffff | |
23236 | ! %l7 = 00000000000000ff, Mem[0000000010101414] = c6000000, %asi = 80 | |
23237 | stwa %l7,[%i4+0x014]%asi ! Mem[0000000010101414] = 000000ff | |
23238 | ! %l6 = 00000000ff0000ff, Mem[0000000010101400] = ffff0000 | |
23239 | stha %l6,[%i4+%g0]0x88 ! Mem[0000000010101400] = ffff00ff | |
23240 | ! %l2 = 0000000000000003, Mem[0000000030001400] = 76000000 | |
23241 | stha %l2,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00030000 | |
23242 | ! %f24 = 000000c6, Mem[0000000010141400] = da01c788 | |
23243 | sta %f24,[%i5+%g0]0x88 ! Mem[0000000010141400] = 000000c6 | |
23244 | ! Mem[0000000030001408] = 00000000, %l0 = fffffffff3120000 | |
23245 | ldstuba [%i0+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
23246 | ! %l4 = ffffffffffffffff, Mem[0000000010181410] = ff000000 | |
23247 | stha %l4,[%i6+%o5]0x80 ! Mem[0000000010181410] = ffff0000 | |
23248 | ! Mem[00000000100c1400] = ff000000, %l5 = 7600000000000000 | |
23249 | swapa [%i3+%g0]0x88,%l5 ! %l5 = 00000000ff000000 | |
23250 | ! %l6 = 00000000ff0000ff, Mem[0000000030081408] = 000000ff | |
23251 | stha %l6,[%i2+%o4]0x89 ! Mem[0000000030081408] = 000000ff | |
23252 | ! Starting 10 instruction Load Burst | |
23253 | ! Mem[0000000010141418] = 00000012ffffffff, %l4 = ffffffffffffffff | |
23254 | ldxa [%i5+0x018]%asi,%l4 ! %l4 = 00000012ffffffff | |
23255 | ||
23256 | p0_label_559: | |
23257 | ! Mem[00000000201c0000] = 00009457, %l6 = 00000000ff0000ff | |
23258 | ldsb [%o0+%g0],%l6 ! %l6 = 0000000000000000 | |
23259 | ! Mem[0000000020800000] = ffff8470, %l3 = ff00000000000000 | |
23260 | ldsba [%o1+0x000]%asi,%l3 ! %l3 = ffffffffffffffff | |
23261 | ! Mem[0000000010041408] = 76000000, %l0 = 0000000000000000 | |
23262 | ldsha [%i1+%o4]0x80,%l0 ! %l0 = 0000000000007600 | |
23263 | ! Mem[0000000010001400] = ff000000 000000c6 ff000000 000000ff | |
23264 | ! Mem[0000000010001410] = 00000000 00000000 000000c6 ffff0000 | |
23265 | ! Mem[0000000010001420] = 0000ff00 00000000 9d3d79ff 00000000 | |
23266 | ! Mem[0000000010001430] = ff000000 00009c9c 0000ffff 00000076 | |
23267 | ldda [%i0]ASI_BLK_AIUP,%f16 ! Block Load from 0000000010001400 | |
23268 | ! Mem[00000000300c1410] = ff000000, %l5 = 00000000ff000000 | |
23269 | lduba [%i3+%o5]0x81,%l5 ! %l5 = 00000000000000ff | |
23270 | ! Mem[0000000030101400] = 00000000000000ff, %l5 = 00000000000000ff | |
23271 | ldxa [%i4+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
23272 | ! Mem[0000000010001408] = ff000000000000ff, %l6 = 0000000000000000 | |
23273 | ldxa [%i0+%o4]0x80,%l6 ! %l6 = ff000000000000ff | |
23274 | ! Mem[0000000030041410] = ff000000, %l1 = ffffffffffffffff | |
23275 | lduha [%i1+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
23276 | ! Mem[000000001008140c] = 00000000, %l6 = ff000000000000ff | |
23277 | lduh [%i2+0x00e],%l6 ! %l6 = 0000000000000000 | |
23278 | ! Starting 10 instruction Store Burst | |
23279 | ! %l1 = 0000000000000000, Mem[0000000030081408] = 000000ff | |
23280 | stha %l1,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000000 | |
23281 | ||
23282 | p0_label_560: | |
23283 | ! %l0 = 0000000000007600, Mem[0000000030101408] = ffffffff | |
23284 | stba %l0,[%i4+%o4]0x89 ! Mem[0000000030101408] = ffffff00 | |
23285 | ! %l7 = 00000000000000ff, Mem[0000000030181410] = 000000ff | |
23286 | stha %l7,[%i6+%o5]0x89 ! Mem[0000000030181410] = 000000ff | |
23287 | ! %l4 = 00000012ffffffff, Mem[00000000211c0000] = 9c001a4c | |
23288 | sth %l4,[%o2+%g0] ! Mem[00000000211c0000] = ffff1a4c | |
23289 | ! %l2 = 0000000000000003, Mem[0000000030001408] = 000000ff | |
23290 | stha %l2,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00000003 | |
23291 | membar #Sync ! Added by membar checker (94) | |
23292 | ! %l2 = 00000003, %l3 = ffffffff, Mem[0000000010001408] = ff000000 000000ff | |
23293 | stda %l2,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000003 ffffffff | |
23294 | ! %f4 = 000012f3 00009400, Mem[0000000030001400] = 00030000 00000000 | |
23295 | stda %f4 ,[%i0+%g0]0x81 ! Mem[0000000030001400] = 000012f3 00009400 | |
23296 | ! %l6 = 0000000000000000, Mem[0000000020800000] = ffff8470, %asi = 80 | |
23297 | stha %l6,[%o1+0x000]%asi ! Mem[0000000020800000] = 00008470 | |
23298 | ! Mem[0000000030101400] = 00000000, %l7 = 00000000000000ff | |
23299 | swapa [%i4+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
23300 | ! Mem[0000000010081400] = 00000000, %l0 = 0000000000007600 | |
23301 | ldstuba [%i2+%g0]0x80,%l0 ! %l0 = 00000000000000ff | |
23302 | ! Starting 10 instruction Load Burst | |
23303 | ! Mem[0000000030041408] = 00000000, %l6 = 0000000000000000 | |
23304 | lduha [%i1+%o4]0x81,%l6 ! %l6 = 0000000000000000 | |
23305 | ||
23306 | ! Check Point 112 for processor 0 | |
23307 | ||
23308 | set p0_check_pt_data_112,%g4 | |
23309 | rd %ccr,%g5 ! %g5 = 44 | |
23310 | ldx [%g4+0x08],%g2 | |
23311 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
23312 | bne %xcc,p0_reg_check_fail0 | |
23313 | mov 0xee0,%g1 | |
23314 | ldx [%g4+0x10],%g2 | |
23315 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
23316 | bne %xcc,p0_reg_check_fail1 | |
23317 | mov 0xee1,%g1 | |
23318 | ldx [%g4+0x18],%g2 | |
23319 | cmp %l2,%g2 ! %l2 = 0000000000000003 | |
23320 | bne %xcc,p0_reg_check_fail2 | |
23321 | mov 0xee2,%g1 | |
23322 | ldx [%g4+0x20],%g2 | |
23323 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
23324 | bne %xcc,p0_reg_check_fail3 | |
23325 | mov 0xee3,%g1 | |
23326 | ldx [%g4+0x28],%g2 | |
23327 | cmp %l4,%g2 ! %l4 = 00000012ffffffff | |
23328 | bne %xcc,p0_reg_check_fail4 | |
23329 | mov 0xee4,%g1 | |
23330 | ldx [%g4+0x30],%g2 | |
23331 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
23332 | bne %xcc,p0_reg_check_fail5 | |
23333 | mov 0xee5,%g1 | |
23334 | ldx [%g4+0x38],%g2 | |
23335 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
23336 | bne %xcc,p0_reg_check_fail6 | |
23337 | mov 0xee6,%g1 | |
23338 | ldx [%g4+0x40],%g2 | |
23339 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
23340 | bne %xcc,p0_reg_check_fail7 | |
23341 | mov 0xee7,%g1 | |
23342 | ldx [%g4+0x48],%g3 | |
23343 | std %f0,[%g4] | |
23344 | ldx [%g4],%g2 | |
23345 | cmp %g3,%g2 ! %f0 = 00000000 000000ff | |
23346 | bne %xcc,p0_freg_check_fail | |
23347 | mov 0xf00,%g1 | |
23348 | ldx [%g4+0x50],%g3 | |
23349 | std %f2,[%g4] | |
23350 | ldx [%g4],%g2 | |
23351 | cmp %g3,%g2 ! %f2 = ff0000ff 00000000 | |
23352 | bne %xcc,p0_freg_check_fail | |
23353 | mov 0xf02,%g1 | |
23354 | ldx [%g4+0x58],%g3 | |
23355 | std %f4,[%g4] | |
23356 | ldx [%g4],%g2 | |
23357 | cmp %g3,%g2 ! %f4 = 000012f3 00009400 | |
23358 | bne %xcc,p0_freg_check_fail | |
23359 | mov 0xf04,%g1 | |
23360 | ldx [%g4+0x60],%g3 | |
23361 | std %f6,[%g4] | |
23362 | ldx [%g4],%g2 | |
23363 | cmp %g3,%g2 ! %f6 = 00000000 79ff0000 | |
23364 | bne %xcc,p0_freg_check_fail | |
23365 | mov 0xf06,%g1 | |
23366 | ldx [%g4+0x68],%g3 | |
23367 | std %f8,[%g4] | |
23368 | ldx [%g4],%g2 | |
23369 | cmp %g3,%g2 ! %f8 = ff0000ff c6000000 | |
23370 | bne %xcc,p0_freg_check_fail | |
23371 | mov 0xf08,%g1 | |
23372 | ldx [%g4+0x70],%g3 | |
23373 | std %f10,[%g4] | |
23374 | ldx [%g4],%g2 | |
23375 | cmp %g3,%g2 ! %f10 = 0000ffff 00009c15 | |
23376 | bne %xcc,p0_freg_check_fail | |
23377 | mov 0xf10,%g1 | |
23378 | ldx [%g4+0x78],%g3 | |
23379 | std %f12,[%g4] | |
23380 | ldx [%g4],%g2 | |
23381 | cmp %g3,%g2 ! %f12 = ffffff9c ffffffff | |
23382 | bne %xcc,p0_freg_check_fail | |
23383 | mov 0xf12,%g1 | |
23384 | ldx [%g4+0x80],%g3 | |
23385 | std %f14,[%g4] | |
23386 | ldx [%g4],%g2 | |
23387 | cmp %g3,%g2 ! %f14 = 00000000 ff0000ff | |
23388 | bne %xcc,p0_freg_check_fail | |
23389 | mov 0xf14,%g1 | |
23390 | ldx [%g4+0x88],%g3 | |
23391 | std %f16,[%g4] | |
23392 | ldx [%g4],%g2 | |
23393 | cmp %g3,%g2 ! %f16 = ff000000 000000c6 | |
23394 | bne %xcc,p0_freg_check_fail | |
23395 | mov 0xf16,%g1 | |
23396 | ldx [%g4+0x90],%g3 | |
23397 | std %f18,[%g4] | |
23398 | ldx [%g4],%g2 | |
23399 | cmp %g3,%g2 ! %f18 = ff000000 000000ff | |
23400 | bne %xcc,p0_freg_check_fail | |
23401 | mov 0xf18,%g1 | |
23402 | ldx [%g4+0x98],%g3 | |
23403 | std %f20,[%g4] | |
23404 | ldx [%g4],%g2 | |
23405 | cmp %g3,%g2 ! %f20 = 00000000 00000000 | |
23406 | bne %xcc,p0_freg_check_fail | |
23407 | mov 0xf20,%g1 | |
23408 | ldx [%g4+0xa0],%g3 | |
23409 | std %f22,[%g4] | |
23410 | ldx [%g4],%g2 | |
23411 | cmp %g3,%g2 ! %f22 = 000000c6 ffff0000 | |
23412 | bne %xcc,p0_freg_check_fail | |
23413 | mov 0xf22,%g1 | |
23414 | ldx [%g4+0xa8],%g3 | |
23415 | std %f24,[%g4] | |
23416 | ldx [%g4],%g2 | |
23417 | cmp %g3,%g2 ! %f24 = 0000ff00 00000000 | |
23418 | bne %xcc,p0_freg_check_fail | |
23419 | mov 0xf24,%g1 | |
23420 | ldx [%g4+0xb0],%g3 | |
23421 | std %f26,[%g4] | |
23422 | ldx [%g4],%g2 | |
23423 | cmp %g3,%g2 ! %f26 = 9d3d79ff 00000000 | |
23424 | bne %xcc,p0_freg_check_fail | |
23425 | mov 0xf26,%g1 | |
23426 | ldx [%g4+0xb8],%g3 | |
23427 | std %f28,[%g4] | |
23428 | ldx [%g4],%g2 | |
23429 | cmp %g3,%g2 ! %f28 = ff000000 00009c9c | |
23430 | bne %xcc,p0_freg_check_fail | |
23431 | mov 0xf28,%g1 | |
23432 | ldx [%g4+0xc0],%g3 | |
23433 | std %f30,[%g4] | |
23434 | ldx [%g4],%g2 | |
23435 | cmp %g3,%g2 ! %f30 = 0000ffff 00000076 | |
23436 | bne %xcc,p0_freg_check_fail | |
23437 | mov 0xf30,%g1 | |
23438 | ||
23439 | ! Check Point 112 completed | |
23440 | ||
23441 | ||
23442 | p0_label_561: | |
23443 | ! Mem[0000000010001428] = 9d3d79ff00000000, %f28 = ff000000 00009c9c | |
23444 | ldda [%i0+0x028]%asi,%f28 ! %f28 = 9d3d79ff 00000000 | |
23445 | ! Mem[0000000010041400] = 000000ff, %l4 = 00000012ffffffff | |
23446 | ldswa [%i1+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
23447 | ! Mem[0000000010181410] = ffff0000, %l7 = 0000000000000000 | |
23448 | lduha [%i6+%o5]0x80,%l7 ! %l7 = 000000000000ffff | |
23449 | ! Mem[00000000100c1408] = ff000000, %l1 = 0000000000000000 | |
23450 | lduwa [%i3+%o4]0x80,%l1 ! %l1 = 00000000ff000000 | |
23451 | ! Mem[00000000100c1400] = 00000000, %l3 = ffffffffffffffff | |
23452 | ldsba [%i3+%g0]0x80,%l3 ! %l3 = 0000000000000000 | |
23453 | ! Mem[0000000010181410] = ffff0000, %l3 = 0000000000000000 | |
23454 | lduha [%i6+%o5]0x80,%l3 ! %l3 = 000000000000ffff | |
23455 | ! Mem[0000000030181410] = 000000ff, %l7 = 000000000000ffff | |
23456 | lduha [%i6+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
23457 | ! Mem[0000000010081408] = ff0000ff, %l7 = 00000000000000ff | |
23458 | lduba [%i2+%o4]0x88,%l7 ! %l7 = 00000000000000ff | |
23459 | ! Mem[0000000010001410] = 0000000000000000, %l5 = 00000000000000ff | |
23460 | ldxa [%i0+%o5]0x88,%l5 ! %l5 = 0000000000000000 | |
23461 | ! Starting 10 instruction Store Burst | |
23462 | ! %l4 = 000000ff, %l5 = 00000000, Mem[0000000010141408] = 00000000 76c6c4ff | |
23463 | stda %l4,[%i5+%o4]0x88 ! Mem[0000000010141408] = 000000ff 00000000 | |
23464 | ||
23465 | p0_label_562: | |
23466 | ! Mem[00000000100c1430] = ff3d79ffff000000, %l4 = 00000000000000ff, %l2 = 0000000000000003 | |
23467 | add %i3,0x30,%g1 | |
23468 | casxa [%g1]0x80,%l4,%l2 ! %l2 = ff3d79ffff000000 | |
23469 | ! %f9 = c6000000, Mem[000000001018141c] = 000000ff | |
23470 | sta %f9 ,[%i6+0x01c]%asi ! Mem[000000001018141c] = c6000000 | |
23471 | ! Mem[0000000010041420] = 00000000, %l4 = 00000000000000ff, %asi = 80 | |
23472 | swapa [%i1+0x020]%asi,%l4 ! %l4 = 0000000000000000 | |
23473 | ! %l3 = 000000000000ffff, Mem[000000001014141b] = 00000012 | |
23474 | stb %l3,[%i5+0x01b] ! Mem[0000000010141418] = 000000ff | |
23475 | ! %l5 = 0000000000000000, Mem[0000000030101410] = 000000ff | |
23476 | stha %l5,[%i4+%o5]0x89 ! Mem[0000000030101410] = 00000000 | |
23477 | ! Mem[0000000010101431] = 00000000, %l6 = 0000000000000000 | |
23478 | ldstub [%i4+0x031],%l6 ! %l6 = 00000000000000ff | |
23479 | ! Mem[0000000010141400] = 000000c6, %l5 = 0000000000000000 | |
23480 | ldstuba [%i5+%g0]0x88,%l5 ! %l5 = 000000c6000000ff | |
23481 | ! Mem[0000000030181408] = ff0000ff, %l7 = 00000000000000ff | |
23482 | ldstuba [%i6+%o4]0x89,%l7 ! %l7 = 000000ff000000ff | |
23483 | ! Mem[0000000010041408] = 76000000, %l4 = 0000000000000000 | |
23484 | swapa [%i1+%o4]0x80,%l4 ! %l4 = 0000000076000000 | |
23485 | ! Starting 10 instruction Load Burst | |
23486 | ! Mem[0000000010181400] = 000012f3, %f31 = 00000076 | |
23487 | lda [%i6+%g0]0x80,%f31 ! %f31 = 000012f3 | |
23488 | ||
23489 | p0_label_563: | |
23490 | ! Mem[0000000010001408] = 03000000, %l2 = ff3d79ffff000000 | |
23491 | ldswa [%i0+%o4]0x88,%l2 ! %l2 = 0000000003000000 | |
23492 | ! Mem[0000000010001408] = 00000003, %l2 = 0000000003000000 | |
23493 | lduwa [%i0+%o4]0x80,%l2 ! %l2 = 0000000000000003 | |
23494 | ! Mem[00000000300c1400] = 00000000, %l5 = 00000000000000c6 | |
23495 | ldswa [%i3+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
23496 | ! Mem[0000000030041410] = 000000ff00000000, %l0 = 0000000000000000 | |
23497 | ldxa [%i1+%o5]0x81,%l0 ! %l0 = 000000ff00000000 | |
23498 | ! Mem[00000000300c1400] = 00000000, %f27 = 00000000 | |
23499 | lda [%i3+%g0]0x89,%f27 ! %f27 = 00000000 | |
23500 | ! Mem[0000000030081400] = ffff0000 00000076 00000000 00000000 | |
23501 | ! Mem[0000000030081410] = 000079ff ff000000 00000012 00000000 | |
23502 | ! Mem[0000000030081420] = 00000000 ff0000ff 00000000 00007957 | |
23503 | ! Mem[0000000030081430] = 00000000 000000ff fc0000ff 00000000 | |
23504 | ldda [%i2]ASI_BLK_AIUSL,%f0 ! Block Load from 0000000030081400 | |
23505 | ! Mem[0000000010001410] = 00000000, %l0 = 000000ff00000000 | |
23506 | lduwa [%i0+%o5]0x88,%l0 ! %l0 = 0000000000000000 | |
23507 | ! Mem[0000000010041408] = ffc4c67600000000, %l4 = 0000000076000000 | |
23508 | ldxa [%i1+%o4]0x88,%l4 ! %l4 = ffc4c67600000000 | |
23509 | ! Mem[0000000010141428] = 000000ff, %l7 = 00000000000000ff | |
23510 | ldsw [%i5+0x028],%l7 ! %l7 = 00000000000000ff | |
23511 | ! Starting 10 instruction Store Burst | |
23512 | ! Mem[0000000010101400] = ffff00ff, %l0 = 0000000000000000 | |
23513 | swapa [%i4+%g0]0x88,%l0 ! %l0 = 00000000ffff00ff | |
23514 | ||
23515 | p0_label_564: | |
23516 | ! %f16 = ff000000 000000c6 ff000000 000000ff | |
23517 | ! %f20 = 00000000 00000000 000000c6 ffff0000 | |
23518 | ! %f24 = 0000ff00 00000000 9d3d79ff 00000000 | |
23519 | ! %f28 = 9d3d79ff 00000000 0000ffff 000012f3 | |
23520 | stda %f16,[%i2]ASI_BLK_P ! Block Store to 0000000010081400 | |
23521 | ! %l7 = 00000000000000ff, Mem[00000000100c1400] = 00000000 | |
23522 | stha %l7,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00ff0000 | |
23523 | ! %l6 = 00000000, %l7 = 000000ff, Mem[0000000010041408] = 00000000 ffc4c676 | |
23524 | stda %l6,[%i1+%o4]0x88 ! Mem[0000000010041408] = 00000000 000000ff | |
23525 | ! %l7 = 00000000000000ff, Mem[0000000030141410] = c60000000000ffff | |
23526 | stxa %l7,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00000000000000ff | |
23527 | ! %f14 = 00000000 ff0000fc, Mem[0000000010081408] = 000000ff ff000000 | |
23528 | stda %f14,[%i2+%o4]0x88 ! Mem[0000000010081408] = 00000000 ff0000fc | |
23529 | ! Mem[0000000020800001] = 00008470, %l4 = ffc4c67600000000 | |
23530 | ldstuba [%o1+0x001]%asi,%l4 ! %l4 = 00000000000000ff | |
23531 | ! %l4 = 0000000000000000, Mem[0000000010001406] = 000000c6, %asi = 80 | |
23532 | stba %l4,[%i0+0x006]%asi ! Mem[0000000010001404] = 000000c6 | |
23533 | ! Mem[0000000030101400] = ff000000, %l2 = 0000000000000003 | |
23534 | ldstuba [%i4+%g0]0x81,%l2 ! %l2 = 000000ff000000ff | |
23535 | ! %f10 = 57790000 00000000, Mem[0000000030101410] = 00000000 ffffffff | |
23536 | stda %f10,[%i4+%o5]0x89 ! Mem[0000000030101410] = 57790000 00000000 | |
23537 | ! Starting 10 instruction Load Burst | |
23538 | ! Mem[0000000030001410] = 0000000000000000, %l6 = 0000000000000000 | |
23539 | ldxa [%i0+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
23540 | ||
23541 | p0_label_565: | |
23542 | ! Mem[00000000300c1410] = ff000000, %l5 = 0000000000000000 | |
23543 | lduba [%i3+%o5]0x81,%l5 ! %l5 = 00000000000000ff | |
23544 | ! Mem[0000000030081410] = 000079ff, %f2 = 00000000 | |
23545 | lda [%i2+%o5]0x81,%f2 ! %f2 = 000079ff | |
23546 | ! Mem[00000000211c0000] = ffff1a4c, %l0 = 00000000ffff00ff | |
23547 | ldub [%o2+0x001],%l0 ! %l0 = 00000000000000ff | |
23548 | ! Mem[0000000030181408] = ff0000ff, %l5 = 00000000000000ff | |
23549 | lduwa [%i6+%o4]0x89,%l5 ! %l5 = 00000000ff0000ff | |
23550 | ! Mem[0000000021800180] = ffffe2ae, %l7 = 00000000000000ff | |
23551 | ldsb [%o3+0x181],%l7 ! %l7 = ffffffffffffffff | |
23552 | ! Mem[0000000030001410] = 00000000, %l5 = 00000000ff0000ff | |
23553 | lduwa [%i0+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
23554 | ! Mem[0000000010001400] = ff000000, %l2 = 00000000000000ff | |
23555 | ldsba [%i0+%g0]0x80,%l2 ! %l2 = ffffffffffffffff | |
23556 | ! Mem[0000000010001438] = 0000ffff 00000076, %l6 = 00000000, %l7 = ffffffff | |
23557 | ldda [%i0+0x038]%asi,%l6 ! %l6 = 000000000000ffff 0000000000000076 | |
23558 | membar #Sync ! Added by membar checker (95) | |
23559 | ! Mem[0000000010081408] = fc0000ff, %l0 = 00000000000000ff | |
23560 | ldsha [%i2+%o4]0x80,%l0 ! %l0 = fffffffffffffc00 | |
23561 | ! Starting 10 instruction Store Burst | |
23562 | ! %f12 = ff000000 00000000, Mem[0000000010141400] = ff000000 76000000 | |
23563 | stda %f12,[%i5+%g0]0x80 ! Mem[0000000010141400] = ff000000 00000000 | |
23564 | ||
23565 | ! Check Point 113 for processor 0 | |
23566 | ||
23567 | set p0_check_pt_data_113,%g4 | |
23568 | rd %ccr,%g5 ! %g5 = 44 | |
23569 | ldx [%g4+0x08],%g2 | |
23570 | cmp %l0,%g2 ! %l0 = fffffffffffffc00 | |
23571 | bne %xcc,p0_reg_check_fail0 | |
23572 | mov 0xee0,%g1 | |
23573 | ldx [%g4+0x10],%g2 | |
23574 | cmp %l1,%g2 ! %l1 = 00000000ff000000 | |
23575 | bne %xcc,p0_reg_check_fail1 | |
23576 | mov 0xee1,%g1 | |
23577 | ldx [%g4+0x18],%g2 | |
23578 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
23579 | bne %xcc,p0_reg_check_fail2 | |
23580 | mov 0xee2,%g1 | |
23581 | ldx [%g4+0x20],%g2 | |
23582 | cmp %l3,%g2 ! %l3 = 000000000000ffff | |
23583 | bne %xcc,p0_reg_check_fail3 | |
23584 | mov 0xee3,%g1 | |
23585 | ldx [%g4+0x28],%g2 | |
23586 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
23587 | bne %xcc,p0_reg_check_fail4 | |
23588 | mov 0xee4,%g1 | |
23589 | ldx [%g4+0x30],%g2 | |
23590 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
23591 | bne %xcc,p0_reg_check_fail5 | |
23592 | mov 0xee5,%g1 | |
23593 | ldx [%g4+0x38],%g2 | |
23594 | cmp %l6,%g2 ! %l6 = 000000000000ffff | |
23595 | bne %xcc,p0_reg_check_fail6 | |
23596 | mov 0xee6,%g1 | |
23597 | ldx [%g4+0x40],%g2 | |
23598 | cmp %l7,%g2 ! %l7 = 0000000000000076 | |
23599 | bne %xcc,p0_reg_check_fail7 | |
23600 | mov 0xee7,%g1 | |
23601 | ldx [%g4+0x48],%g3 | |
23602 | std %f0,[%g4] | |
23603 | ldx [%g4],%g2 | |
23604 | cmp %g3,%g2 ! %f0 = 76000000 0000ffff | |
23605 | bne %xcc,p0_freg_check_fail | |
23606 | mov 0xf00,%g1 | |
23607 | ldx [%g4+0x50],%g3 | |
23608 | std %f2,[%g4] | |
23609 | ldx [%g4],%g2 | |
23610 | cmp %g3,%g2 ! %f2 = 000079ff 00000000 | |
23611 | bne %xcc,p0_freg_check_fail | |
23612 | mov 0xf02,%g1 | |
23613 | ldx [%g4+0x58],%g3 | |
23614 | std %f4,[%g4] | |
23615 | ldx [%g4],%g2 | |
23616 | cmp %g3,%g2 ! %f4 = 000000ff ff790000 | |
23617 | bne %xcc,p0_freg_check_fail | |
23618 | mov 0xf04,%g1 | |
23619 | ldx [%g4+0x60],%g3 | |
23620 | std %f6,[%g4] | |
23621 | ldx [%g4],%g2 | |
23622 | cmp %g3,%g2 ! %f6 = 00000000 12000000 | |
23623 | bne %xcc,p0_freg_check_fail | |
23624 | mov 0xf06,%g1 | |
23625 | ldx [%g4+0x68],%g3 | |
23626 | std %f8,[%g4] | |
23627 | ldx [%g4],%g2 | |
23628 | cmp %g3,%g2 ! %f8 = ff0000ff 00000000 | |
23629 | bne %xcc,p0_freg_check_fail | |
23630 | mov 0xf08,%g1 | |
23631 | ldx [%g4+0x70],%g3 | |
23632 | std %f10,[%g4] | |
23633 | ldx [%g4],%g2 | |
23634 | cmp %g3,%g2 ! %f10 = 57790000 00000000 | |
23635 | bne %xcc,p0_freg_check_fail | |
23636 | mov 0xf10,%g1 | |
23637 | ldx [%g4+0x78],%g3 | |
23638 | std %f12,[%g4] | |
23639 | ldx [%g4],%g2 | |
23640 | cmp %g3,%g2 ! %f12 = ff000000 00000000 | |
23641 | bne %xcc,p0_freg_check_fail | |
23642 | mov 0xf12,%g1 | |
23643 | ldx [%g4+0x80],%g3 | |
23644 | std %f14,[%g4] | |
23645 | ldx [%g4],%g2 | |
23646 | cmp %g3,%g2 ! %f14 = 00000000 ff0000fc | |
23647 | bne %xcc,p0_freg_check_fail | |
23648 | mov 0xf14,%g1 | |
23649 | ldx [%g4+0x88],%g3 | |
23650 | std %f26,[%g4] | |
23651 | ldx [%g4],%g2 | |
23652 | cmp %g3,%g2 ! %f26 = 9d3d79ff 00000000 | |
23653 | bne %xcc,p0_freg_check_fail | |
23654 | mov 0xf26,%g1 | |
23655 | ldx [%g4+0x90],%g3 | |
23656 | std %f28,[%g4] | |
23657 | ldx [%g4],%g2 | |
23658 | cmp %g3,%g2 ! %f28 = 9d3d79ff 00000000 | |
23659 | bne %xcc,p0_freg_check_fail | |
23660 | mov 0xf28,%g1 | |
23661 | ldx [%g4+0x98],%g3 | |
23662 | std %f30,[%g4] | |
23663 | ldx [%g4],%g2 | |
23664 | cmp %g3,%g2 ! %f30 = 0000ffff 000012f3 | |
23665 | bne %xcc,p0_freg_check_fail | |
23666 | mov 0xf30,%g1 | |
23667 | ||
23668 | ! Check Point 113 completed | |
23669 | ||
23670 | ||
23671 | p0_label_566: | |
23672 | ! %l7 = 0000000000000076, Mem[00000000100c1408] = 000000ff | |
23673 | stha %l7,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000076 | |
23674 | ! Mem[0000000010041410] = ff000000, %l7 = 0000000000000076 | |
23675 | swapa [%i1+%o5]0x80,%l7 ! %l7 = 00000000ff000000 | |
23676 | ! %l6 = 000000000000ffff, Mem[0000000030141400] = ff000000597bac10 | |
23677 | stxa %l6,[%i5+%g0]0x81 ! Mem[0000000030141400] = 000000000000ffff | |
23678 | ! %l2 = ffffffffffffffff, Mem[000000001000142a] = 9d3d79ff, %asi = 80 | |
23679 | stha %l2,[%i0+0x02a]%asi ! Mem[0000000010001428] = 9d3dffff | |
23680 | ! Mem[0000000021800040] = 9c9c1df3, %l5 = 0000000000000000 | |
23681 | ldstub [%o3+0x040],%l5 ! %l5 = 0000009c000000ff | |
23682 | ! Mem[0000000010101410] = 00000000, %l7 = 00000000ff000000 | |
23683 | swapa [%i4+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
23684 | ! Mem[0000000010081408] = ff0000fc, %l2 = ffffffffffffffff | |
23685 | swapa [%i2+%o4]0x88,%l2 ! %l2 = 00000000ff0000fc | |
23686 | ! %l6 = 0000ffff, %l7 = 00000000, Mem[00000000100c1400] = 00ff0000 ff0000ff | |
23687 | stda %l6,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 0000ffff 00000000 | |
23688 | ! %f0 = 76000000 0000ffff, %l1 = 00000000ff000000 | |
23689 | ! Mem[0000000010101420] = c788340300ff0000 | |
23690 | add %i4,0x020,%g1 | |
23691 | stda %f0,[%g1+%l1]ASI_PST8_PL ! Mem[0000000010101420] = c788340300ff0000 | |
23692 | ! Starting 10 instruction Load Burst | |
23693 | ! Mem[0000000030101408] = 00000000ffffff00, %f26 = 9d3d79ff 00000000 | |
23694 | ldda [%i4+%o4]0x89,%f26 ! %f26 = 00000000 ffffff00 | |
23695 | ||
23696 | p0_label_567: | |
23697 | ! Mem[00000000300c1410] = ffffffff 000000ff, %l2 = ff0000fc, %l3 = 0000ffff | |
23698 | ldda [%i3+%o5]0x89,%l2 ! %l2 = 00000000000000ff 00000000ffffffff | |
23699 | ! Mem[0000000030081408] = 00000000, %l6 = 000000000000ffff | |
23700 | lduwa [%i2+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
23701 | ! Mem[0000000010181400] = 000012f3, %l4 = 0000000000000000 | |
23702 | lduha [%i6+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
23703 | ! Mem[00000000300c1408] = ff0000ff, %l4 = 0000000000000000 | |
23704 | lduwa [%i3+%o4]0x81,%l4 ! %l4 = 00000000ff0000ff | |
23705 | ! Mem[0000000010141400] = 000000ff, %f21 = 00000000 | |
23706 | lda [%i5+%g0]0x88,%f21 ! %f21 = 000000ff | |
23707 | ! Mem[000000001004142c] = 00000000, %l4 = 00000000ff0000ff | |
23708 | lduba [%i1+0x02f]%asi,%l4 ! %l4 = 0000000000000000 | |
23709 | ! Mem[0000000010101400] = 00000000, %l2 = 00000000000000ff | |
23710 | lduha [%i4+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
23711 | ! Mem[0000000030001410] = 0000000000000000, %l1 = 00000000ff000000 | |
23712 | ldxa [%i0+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
23713 | ! Mem[0000000030101400] = ff000000, %l3 = 00000000ffffffff | |
23714 | ldsha [%i4+%g0]0x81,%l3 ! %l3 = ffffffffffffff00 | |
23715 | ! Starting 10 instruction Store Burst | |
23716 | ! %l0 = fffffffffffffc00, Mem[0000000030181410] = 000000ff | |
23717 | stba %l0,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000 | |
23718 | ||
23719 | p0_label_568: | |
23720 | ! %l0 = fffffffffffffc00, Mem[00000000100c1430] = ff3d79ffff000000, %asi = 80 | |
23721 | stxa %l0,[%i3+0x030]%asi ! Mem[00000000100c1430] = fffffffffffffc00 | |
23722 | ! %f22 = 000000c6 ffff0000, Mem[0000000010081408] = ffffffff 00000000 | |
23723 | stda %f22,[%i2+%o4]0x80 ! Mem[0000000010081408] = 000000c6 ffff0000 | |
23724 | ! Mem[0000000010181400] = 000012f3, %l5 = 000000000000009c | |
23725 | ldstuba [%i6+%g0]0x80,%l5 ! %l5 = 00000000000000ff | |
23726 | ! %l6 = 0000000000000000, Mem[0000000030081410] = ff790000 | |
23727 | stba %l6,[%i2+%o5]0x89 ! Mem[0000000030081410] = ff790000 | |
23728 | ! %f30 = 0000ffff 000012f3, %l0 = fffffffffffffc00 | |
23729 | ! Mem[0000000030181430] = 3739e89076000012 | |
23730 | add %i6,0x030,%g1 | |
23731 | stda %f30,[%g1+%l0]ASI_PST32_SL ! Mem[0000000030181430] = 3739e89076000012 | |
23732 | ! Mem[0000000030041410] = ff000000, %l7 = 0000000000000000 | |
23733 | ldstuba [%i1+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
23734 | ! %l4 = 0000000000000000, Mem[0000000030101408] = ffffff00 | |
23735 | stwa %l4,[%i4+%o4]0x89 ! Mem[0000000030101408] = 00000000 | |
23736 | ! %l1 = 0000000000000000, Mem[0000000030081410] = 000079ff | |
23737 | stba %l1,[%i2+%o5]0x81 ! Mem[0000000030081410] = 000079ff | |
23738 | ! %l7 = 0000000000000000, Mem[00000000300c1408] = ff0000ff | |
23739 | stwa %l7,[%i3+%o4]0x81 ! Mem[00000000300c1408] = 00000000 | |
23740 | ! Starting 10 instruction Load Burst | |
23741 | ! Mem[0000000030081410] = 000079ffff000000, %f22 = 000000c6 ffff0000 | |
23742 | ldda [%i2+%o5]0x81,%f22 ! %f22 = 000079ff ff000000 | |
23743 | ||
23744 | p0_label_569: | |
23745 | ! Mem[0000000010141400] = ff000000, %l3 = ffffffffffffff00 | |
23746 | ldsha [%i5+%g0]0x80,%l3 ! %l3 = ffffffffffffff00 | |
23747 | ! Mem[0000000010141408] = 000000ff, %f16 = ff000000 | |
23748 | lda [%i5+%o4]0x88,%f16 ! %f16 = 000000ff | |
23749 | ! Mem[0000000030001408] = 00000003, %l4 = 0000000000000000 | |
23750 | lduba [%i0+%o4]0x89,%l4 ! %l4 = 0000000000000003 | |
23751 | ! Mem[0000000030141408] = 00000000ffffffff, %f2 = 000079ff 00000000 | |
23752 | ldda [%i5+%o4]0x81,%f2 ! %f2 = 00000000 ffffffff | |
23753 | ! Mem[0000000010041410] = 00000076, %l2 = 0000000000000000 | |
23754 | ldswa [%i1+%o5]0x80,%l2 ! %l2 = 0000000000000076 | |
23755 | ! Mem[0000000020800000] = 00ff8470, %l6 = 0000000000000000 | |
23756 | ldsh [%o1+%g0],%l6 ! %l6 = 00000000000000ff | |
23757 | ! Mem[0000000010081408] = 000000c6ffff0000, %f14 = 00000000 ff0000fc | |
23758 | ldda [%i2+%o4]0x80,%f14 ! %f14 = 000000c6 ffff0000 | |
23759 | ! Mem[0000000010141410] = 000000ff, %f29 = 00000000 | |
23760 | ld [%i5+%o5],%f29 ! %f29 = 000000ff | |
23761 | ! Mem[0000000010181408] = 00000000, %l6 = 00000000000000ff | |
23762 | lduwa [%i6+%o4]0x80,%l6 ! %l6 = 0000000000000000 | |
23763 | ! Starting 10 instruction Store Burst | |
23764 | ! %l7 = 0000000000000000, Mem[0000000030141408] = 00000000 | |
23765 | stha %l7,[%i5+%o4]0x89 ! Mem[0000000030141408] = 00000000 | |
23766 | ||
23767 | p0_label_570: | |
23768 | ! Mem[0000000010001418] = 000000c6, %l0 = fffffffffffffc00, %asi = 80 | |
23769 | swapa [%i0+0x018]%asi,%l0 ! %l0 = 00000000000000c6 | |
23770 | ! %l2 = 0000000000000076, Mem[000000001018142a] = 000000ff, %asi = 80 | |
23771 | stha %l2,[%i6+0x02a]%asi ! Mem[0000000010181428] = 00000076 | |
23772 | ! %f0 = 76000000 0000ffff, Mem[00000000100c1430] = ffffffff fffffc00 | |
23773 | std %f0 ,[%i3+0x030] ! Mem[00000000100c1430] = 76000000 0000ffff | |
23774 | ! Mem[0000000010101400] = 00000000, %l3 = ffffffffffffff00 | |
23775 | swapa [%i4+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
23776 | ! %l1 = 0000000000000000, Mem[0000000010141410] = 000000ff | |
23777 | stwa %l1,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00000000 | |
23778 | ! %l5 = 0000000000000000, Mem[0000000030081408] = 00000000 | |
23779 | stwa %l5,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000000 | |
23780 | ! %l7 = 0000000000000000, Mem[0000000010041415] = 00000000 | |
23781 | stb %l7,[%i1+0x015] ! Mem[0000000010041414] = 00000000 | |
23782 | ! %f0 = 76000000 0000ffff 00000000 ffffffff | |
23783 | ! %f4 = 000000ff ff790000 00000000 12000000 | |
23784 | ! %f8 = ff0000ff 00000000 57790000 00000000 | |
23785 | ! %f12 = ff000000 00000000 000000c6 ffff0000 | |
23786 | stda %f0,[%i1]ASI_BLK_P ! Block Store to 0000000010041400 | |
23787 | ! %l7 = 0000000000000000, Mem[0000000010001410] = 0000000000000000 | |
23788 | stxa %l7,[%i0+%o5]0x88 ! Mem[0000000010001410] = 0000000000000000 | |
23789 | ! Starting 10 instruction Load Burst | |
23790 | ! Mem[00000000300c1400] = 00000000, %l6 = 0000000000000000 | |
23791 | lduba [%i3+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
23792 | ||
23793 | ! Check Point 114 for processor 0 | |
23794 | ||
23795 | set p0_check_pt_data_114,%g4 | |
23796 | rd %ccr,%g5 ! %g5 = 44 | |
23797 | ldx [%g4+0x08],%g2 | |
23798 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
23799 | bne %xcc,p0_reg_check_fail1 | |
23800 | mov 0xee1,%g1 | |
23801 | ldx [%g4+0x10],%g2 | |
23802 | cmp %l2,%g2 ! %l2 = 0000000000000076 | |
23803 | bne %xcc,p0_reg_check_fail2 | |
23804 | mov 0xee2,%g1 | |
23805 | ldx [%g4+0x18],%g2 | |
23806 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
23807 | bne %xcc,p0_reg_check_fail3 | |
23808 | mov 0xee3,%g1 | |
23809 | ldx [%g4+0x20],%g2 | |
23810 | cmp %l4,%g2 ! %l4 = 0000000000000003 | |
23811 | bne %xcc,p0_reg_check_fail4 | |
23812 | mov 0xee4,%g1 | |
23813 | ldx [%g4+0x28],%g2 | |
23814 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
23815 | bne %xcc,p0_reg_check_fail5 | |
23816 | mov 0xee5,%g1 | |
23817 | ldx [%g4+0x30],%g2 | |
23818 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
23819 | bne %xcc,p0_reg_check_fail6 | |
23820 | mov 0xee6,%g1 | |
23821 | ldx [%g4+0x38],%g2 | |
23822 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
23823 | bne %xcc,p0_reg_check_fail7 | |
23824 | mov 0xee7,%g1 | |
23825 | nop ! Wait out %f2 latency | |
23826 | nop ! Wait out %f2 latency | |
23827 | nop ! Wait out %f2 latency | |
23828 | ldx [%g4+0x40],%g3 | |
23829 | std %f2,[%g4] | |
23830 | ldx [%g4],%g2 | |
23831 | cmp %g3,%g2 ! %f2 = 00000000 ffffffff | |
23832 | bne %xcc,p0_freg_check_fail | |
23833 | mov 0xf02,%g1 | |
23834 | nop ! Wait out %f14 latency | |
23835 | nop ! Wait out %f14 latency | |
23836 | ldx [%g4+0x48],%g3 | |
23837 | std %f14,[%g4] | |
23838 | ldx [%g4],%g2 | |
23839 | cmp %g3,%g2 ! %f14 = 000000c6 ffff0000 | |
23840 | bne %xcc,p0_freg_check_fail | |
23841 | mov 0xf14,%g1 | |
23842 | ldx [%g4+0x50],%g3 | |
23843 | std %f16,[%g4] | |
23844 | ldx [%g4],%g2 | |
23845 | cmp %g3,%g2 ! %f16 = 000000ff 000000c6 | |
23846 | bne %xcc,p0_freg_check_fail | |
23847 | mov 0xf16,%g1 | |
23848 | ldx [%g4+0x58],%g3 | |
23849 | std %f20,[%g4] | |
23850 | ldx [%g4],%g2 | |
23851 | cmp %g3,%g2 ! %f20 = 00000000 000000ff | |
23852 | bne %xcc,p0_freg_check_fail | |
23853 | mov 0xf20,%g1 | |
23854 | ldx [%g4+0x60],%g3 | |
23855 | std %f22,[%g4] | |
23856 | ldx [%g4],%g2 | |
23857 | cmp %g3,%g2 ! %f22 = 000079ff ff000000 | |
23858 | bne %xcc,p0_freg_check_fail | |
23859 | mov 0xf22,%g1 | |
23860 | ldx [%g4+0x68],%g3 | |
23861 | std %f26,[%g4] | |
23862 | ldx [%g4],%g2 | |
23863 | cmp %g3,%g2 ! %f26 = 00000000 ffffff00 | |
23864 | bne %xcc,p0_freg_check_fail | |
23865 | mov 0xf26,%g1 | |
23866 | ldx [%g4+0x70],%g3 | |
23867 | std %f28,[%g4] | |
23868 | ldx [%g4],%g2 | |
23869 | cmp %g3,%g2 ! %f28 = 9d3d79ff 000000ff | |
23870 | bne %xcc,p0_freg_check_fail | |
23871 | mov 0xf28,%g1 | |
23872 | ||
23873 | ! Check Point 114 completed | |
23874 | ||
23875 | ||
23876 | p0_label_571: | |
23877 | ! Mem[0000000010141418] = 000000ff, %l5 = 0000000000000000 | |
23878 | ldsw [%i5+0x018],%l5 ! %l5 = 00000000000000ff | |
23879 | ! Mem[0000000010141400] = ff000000 00000000, %l0 = 000000c6, %l1 = 00000000 | |
23880 | ldda [%i5+%g0]0x80,%l0 ! %l0 = 00000000ff000000 0000000000000000 | |
23881 | ! Mem[0000000030081408] = 00000000 00000000, %l0 = ff000000, %l1 = 00000000 | |
23882 | ldda [%i2+%o4]0x81,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
23883 | ! Mem[0000000030081400] = ffff000000000076, %f2 = 00000000 ffffffff | |
23884 | ldda [%i2+%g0]0x81,%f2 ! %f2 = ffff0000 00000076 | |
23885 | ! Mem[0000000010181410] = 0000ffff, %l1 = 0000000000000000 | |
23886 | lduba [%i6+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
23887 | ! Mem[0000000010101410] = 000000ff000000ff, %l5 = 00000000000000ff | |
23888 | ldxa [%i4+%o5]0x80,%l5 ! %l5 = 000000ff000000ff | |
23889 | ! Mem[0000000020800040] = ffff7379, %l2 = 0000000000000076 | |
23890 | ldub [%o1+0x040],%l2 ! %l2 = 00000000000000ff | |
23891 | ! Mem[0000000010101410] = 000000ff, %l5 = 000000ff000000ff | |
23892 | lduha [%i4+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
23893 | ! Mem[0000000030101408] = 00000000 00000000, %l0 = 00000000, %l1 = 000000ff | |
23894 | ldda [%i4+%o4]0x89,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
23895 | ! Starting 10 instruction Store Burst | |
23896 | ! %f13 = 00000000, Mem[0000000010081438] = 0000ffff | |
23897 | sta %f13,[%i2+0x038]%asi ! Mem[0000000010081438] = 00000000 | |
23898 | ||
23899 | p0_label_572: | |
23900 | ! %f8 = ff0000ff 00000000, %l0 = 0000000000000000 | |
23901 | ! Mem[0000000030141428] = ffffffff79ff0000 | |
23902 | add %i5,0x028,%g1 | |
23903 | stda %f8,[%g1+%l0]ASI_PST16_SL ! Mem[0000000030141428] = ffffffff79ff0000 | |
23904 | ! Mem[0000000010181410] = ffff000000000000, %l7 = 0000000000000000, %l2 = 00000000000000ff | |
23905 | add %i6,0x10,%g1 | |
23906 | casxa [%g1]0x80,%l7,%l2 ! %l2 = ffff000000000000 | |
23907 | ! %l4 = 0000000000000003, Mem[0000000010101428] = ff00000076ff411f | |
23908 | stx %l4,[%i4+0x028] ! Mem[0000000010101428] = 0000000000000003 | |
23909 | ! %f6 = 00000000 12000000, %l0 = 0000000000000000 | |
23910 | ! Mem[0000000010101408] = 0000ffff00009c15 | |
23911 | add %i4,0x008,%g1 | |
23912 | stda %f6,[%g1+%l0]ASI_PST32_P ! Mem[0000000010101408] = 0000ffff00009c15 | |
23913 | ! %l2 = ffff000000000000, Mem[0000000020800000] = 00ff8470, %asi = 80 | |
23914 | stha %l2,[%o1+0x000]%asi ! Mem[0000000020800000] = 00008470 | |
23915 | ! %l5 = 0000000000000000, Mem[00000000300c1408] = 00000000 | |
23916 | stwa %l5,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 00000000 | |
23917 | ! Mem[00000000300c1410] = ff000000, %l2 = ffff000000000000 | |
23918 | swapa [%i3+%o5]0x81,%l2 ! %l2 = 00000000ff000000 | |
23919 | ! %l6 = 00000000, %l7 = 00000000, Mem[00000000300c1410] = 00000000 ffffffff | |
23920 | stda %l6,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 00000000 00000000 | |
23921 | ! %f30 = 0000ffff 000012f3, %l6 = 0000000000000000 | |
23922 | ! Mem[0000000030101420] = ff0000ffc6000000 | |
23923 | add %i4,0x020,%g1 | |
23924 | stda %f30,[%g1+%l6]ASI_PST16_S ! Mem[0000000030101420] = ff0000ffc6000000 | |
23925 | ! Starting 10 instruction Load Burst | |
23926 | ! Mem[000000001018143c] = 00000000, %l7 = 0000000000000000 | |
23927 | lduw [%i6+0x03c],%l7 ! %l7 = 0000000000000000 | |
23928 | ||
23929 | p0_label_573: | |
23930 | ! Mem[00000000100c1408] = 00000076, %l4 = 0000000000000003 | |
23931 | ldsha [%i3+%o4]0x88,%l4 ! %l4 = 0000000000000076 | |
23932 | ! Mem[0000000010141424] = 00000000, %l0 = 0000000000000000 | |
23933 | lduba [%i5+0x027]%asi,%l0 ! %l0 = 0000000000000000 | |
23934 | ! Mem[00000000100c1410] = 88c7ffff, %l6 = 0000000000000000 | |
23935 | lduba [%i3+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
23936 | ! Mem[0000000030181408] = 00000000ff0000ff, %f24 = 0000ff00 00000000 | |
23937 | ldda [%i6+%o4]0x89,%f24 ! %f24 = 00000000 ff0000ff | |
23938 | ! Mem[00000000201c0000] = 00009457, %l1 = 0000000000000000 | |
23939 | ldsb [%o0+0x001],%l1 ! %l1 = 0000000000000000 | |
23940 | ! Mem[0000000010101408] = ffff0000, %l2 = 00000000ff000000 | |
23941 | lduba [%i4+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
23942 | ! Mem[0000000010181408] = 00000000, %l6 = 00000000000000ff | |
23943 | ldsba [%i6+0x00a]%asi,%l6 ! %l6 = 0000000000000000 | |
23944 | ! Mem[00000000100c1408] = 76000000, %l2 = 0000000000000000 | |
23945 | ldub [%i3+0x00b],%l2 ! %l2 = 0000000000000000 | |
23946 | ! Mem[0000000010141400] = 00000000000000ff, %f8 = ff0000ff 00000000 | |
23947 | ldda [%i5+%g0]0x88,%f8 ! %f8 = 00000000 000000ff | |
23948 | ! Starting 10 instruction Store Burst | |
23949 | ! %f20 = 00000000 000000ff, %l2 = 0000000000000000 | |
23950 | ! Mem[0000000010141408] = ff00000000000000 | |
23951 | add %i5,0x008,%g1 | |
23952 | stda %f20,[%g1+%l2]ASI_PST32_PL ! Mem[0000000010141408] = ff00000000000000 | |
23953 | ||
23954 | p0_label_574: | |
23955 | ! %l1 = 0000000000000000, Mem[0000000030101400] = ff000000 | |
23956 | stwa %l1,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 | |
23957 | ! Mem[00000000100c142f] = 000000ff, %l4 = 0000000000000076 | |
23958 | ldstub [%i3+0x02f],%l4 ! %l4 = 000000ff000000ff | |
23959 | ! %f30 = 0000ffff 000012f3, Mem[0000000030081410] = ff790000 000000ff | |
23960 | stda %f30,[%i2+%o5]0x89 ! Mem[0000000030081410] = 0000ffff 000012f3 | |
23961 | ! %f29 = 000000ff, Mem[0000000010181430] = 00000000 | |
23962 | sta %f29,[%i6+0x030]%asi ! Mem[0000000010181430] = 000000ff | |
23963 | ! %f26 = 00000000, Mem[0000000030101400] = 00000000 | |
23964 | sta %f26,[%i4+%g0]0x81 ! Mem[0000000030101400] = 00000000 | |
23965 | ! %l1 = 0000000000000000, Mem[0000000030041410] = ff0000ff | |
23966 | stwa %l1,[%i1+%o5]0x89 ! Mem[0000000030041410] = 00000000 | |
23967 | ! %l2 = 0000000000000000, Mem[0000000010181410] = 000000000000ffff | |
23968 | stxa %l2,[%i6+%o5]0x88 ! Mem[0000000010181410] = 0000000000000000 | |
23969 | ! %f0 = 76000000 0000ffff, Mem[0000000010041408] = 00000000 ffffffff | |
23970 | stda %f0 ,[%i1+%o4]0x80 ! Mem[0000000010041408] = 76000000 0000ffff | |
23971 | ! %f28 = 9d3d79ff, Mem[0000000010101410] = ff000000 | |
23972 | sta %f28,[%i4+%o5]0x88 ! Mem[0000000010101410] = 9d3d79ff | |
23973 | ! Starting 10 instruction Load Burst | |
23974 | ! Mem[0000000030141410] = ff000000, %l0 = 0000000000000000 | |
23975 | ldswa [%i5+%o5]0x81,%l0 ! %l0 = ffffffffff000000 | |
23976 | ||
23977 | p0_label_575: | |
23978 | ! Mem[000000001008141c] = ffff0000, %l6 = 0000000000000000 | |
23979 | ldsha [%i2+0x01c]%asi,%l6 ! %l6 = ffffffffffffffff | |
23980 | ! Mem[0000000030181400] = 000000ff, %l7 = 0000000000000000 | |
23981 | lduha [%i6+%g0]0x89,%l7 ! %l7 = 00000000000000ff | |
23982 | ! Mem[0000000010081410] = 00000000, %l0 = ffffffffff000000 | |
23983 | lduwa [%i2+%o5]0x88,%l0 ! %l0 = 0000000000000000 | |
23984 | ! Mem[0000000010181408] = 00000000, %l0 = 0000000000000000 | |
23985 | lduwa [%i6+%o4]0x80,%l0 ! %l0 = 0000000000000000 | |
23986 | ! Mem[0000000010081410] = 00000000, %l3 = 0000000000000000 | |
23987 | lduha [%i2+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
23988 | ! Mem[00000000211c0000] = ffff1a4c, %l2 = 0000000000000000 | |
23989 | lduh [%o2+%g0],%l2 ! %l2 = 000000000000ffff | |
23990 | ! Mem[0000000030101408] = 00000000, %l1 = 0000000000000000 | |
23991 | ldsba [%i4+%o4]0x89,%l1 ! %l1 = 0000000000000000 | |
23992 | ! Mem[0000000010181408] = 00000000, %f20 = 00000000 | |
23993 | lda [%i6+%o4]0x88,%f20 ! %f20 = 00000000 | |
23994 | ! Mem[0000000030101400] = ff000000 00000000, %l0 = 00000000, %l1 = 00000000 | |
23995 | ldda [%i4+%g0]0x89,%l0 ! %l0 = 0000000000000000 00000000ff000000 | |
23996 | ! Starting 10 instruction Store Burst | |
23997 | ! Mem[0000000030101400] = 00000000, %l7 = 00000000000000ff | |
23998 | ldstuba [%i4+%g0]0x89,%l7 ! %l7 = 00000000000000ff | |
23999 | ||
24000 | ! Check Point 115 for processor 0 | |
24001 | ||
24002 | set p0_check_pt_data_115,%g4 | |
24003 | rd %ccr,%g5 ! %g5 = 44 | |
24004 | ldx [%g4+0x08],%g2 | |
24005 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
24006 | bne %xcc,p0_reg_check_fail0 | |
24007 | mov 0xee0,%g1 | |
24008 | ldx [%g4+0x10],%g2 | |
24009 | cmp %l1,%g2 ! %l1 = 00000000ff000000 | |
24010 | bne %xcc,p0_reg_check_fail1 | |
24011 | mov 0xee1,%g1 | |
24012 | ldx [%g4+0x18],%g2 | |
24013 | cmp %l2,%g2 ! %l2 = 000000000000ffff | |
24014 | bne %xcc,p0_reg_check_fail2 | |
24015 | mov 0xee2,%g1 | |
24016 | ldx [%g4+0x20],%g2 | |
24017 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
24018 | bne %xcc,p0_reg_check_fail3 | |
24019 | mov 0xee3,%g1 | |
24020 | ldx [%g4+0x28],%g2 | |
24021 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
24022 | bne %xcc,p0_reg_check_fail4 | |
24023 | mov 0xee4,%g1 | |
24024 | ldx [%g4+0x30],%g2 | |
24025 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
24026 | bne %xcc,p0_reg_check_fail5 | |
24027 | mov 0xee5,%g1 | |
24028 | ldx [%g4+0x38],%g2 | |
24029 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
24030 | bne %xcc,p0_reg_check_fail6 | |
24031 | mov 0xee6,%g1 | |
24032 | ldx [%g4+0x40],%g2 | |
24033 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
24034 | bne %xcc,p0_reg_check_fail7 | |
24035 | mov 0xee7,%g1 | |
24036 | ldx [%g4+0x48],%g3 | |
24037 | std %f0,[%g4] | |
24038 | ldx [%g4],%g2 | |
24039 | cmp %g3,%g2 ! %f0 = 76000000 0000ffff | |
24040 | bne %xcc,p0_freg_check_fail | |
24041 | mov 0xf00,%g1 | |
24042 | ldx [%g4+0x50],%g3 | |
24043 | std %f2,[%g4] | |
24044 | ldx [%g4],%g2 | |
24045 | cmp %g3,%g2 ! %f2 = ffff0000 00000076 | |
24046 | bne %xcc,p0_freg_check_fail | |
24047 | mov 0xf02,%g1 | |
24048 | ldx [%g4+0x58],%g3 | |
24049 | std %f8,[%g4] | |
24050 | ldx [%g4],%g2 | |
24051 | cmp %g3,%g2 ! %f8 = 00000000 000000ff | |
24052 | bne %xcc,p0_freg_check_fail | |
24053 | mov 0xf08,%g1 | |
24054 | ldx [%g4+0x60],%g3 | |
24055 | std %f20,[%g4] | |
24056 | ldx [%g4],%g2 | |
24057 | cmp %g3,%g2 ! %f20 = 00000000 000000ff | |
24058 | bne %xcc,p0_freg_check_fail | |
24059 | mov 0xf20,%g1 | |
24060 | ldx [%g4+0x68],%g3 | |
24061 | std %f24,[%g4] | |
24062 | ldx [%g4],%g2 | |
24063 | cmp %g3,%g2 ! %f24 = 00000000 ff0000ff | |
24064 | bne %xcc,p0_freg_check_fail | |
24065 | mov 0xf24,%g1 | |
24066 | ||
24067 | ! Check Point 115 completed | |
24068 | ||
24069 | ||
24070 | p0_label_576: | |
24071 | ! Mem[0000000030181400] = 000000ff, %l1 = 00000000ff000000 | |
24072 | swapa [%i6+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
24073 | ! %f18 = ff000000 000000ff, Mem[0000000010101438] = ff000012 003400ff | |
24074 | std %f18,[%i4+0x038] ! Mem[0000000010101438] = ff000000 000000ff | |
24075 | ! %f6 = 00000000 12000000, %l2 = 000000000000ffff | |
24076 | ! Mem[0000000030041438] = 0000000000000000 | |
24077 | add %i1,0x038,%g1 | |
24078 | stda %f6,[%g1+%l2]ASI_PST32_SL ! Mem[0000000030041438] = 0000001200000000 | |
24079 | ! %f8 = 00000000 000000ff, %l0 = 0000000000000000 | |
24080 | ! Mem[00000000300c1438] = 00000000ff0000ff | |
24081 | add %i3,0x038,%g1 | |
24082 | stda %f8,[%g1+%l0]ASI_PST8_S ! Mem[00000000300c1438] = 00000000ff0000ff | |
24083 | ! %l5 = 0000000000000000, Mem[0000000010081408] = 000000c6ffff0000 | |
24084 | stxa %l5,[%i2+%o4]0x80 ! Mem[0000000010081408] = 0000000000000000 | |
24085 | ! %l0 = 00000000, %l1 = 000000ff, Mem[0000000010141430] = ff0000ff 0000ff03 | |
24086 | std %l0,[%i5+0x030] ! Mem[0000000010141430] = 00000000 000000ff | |
24087 | ! Mem[0000000030101408] = 00000000, %l4 = 00000000000000ff | |
24088 | ldstuba [%i4+%o4]0x81,%l4 ! %l4 = 00000000000000ff | |
24089 | ! Mem[0000000030001400] = f3120000, %l0 = 0000000000000000 | |
24090 | ldstuba [%i0+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
24091 | ! %l7 = 0000000000000000, Mem[0000000030081410] = 000012f3 | |
24092 | stwa %l7,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00000000 | |
24093 | ! Starting 10 instruction Load Burst | |
24094 | ! Mem[0000000030041400] = 00000000, %l2 = 000000000000ffff | |
24095 | ldswa [%i1+%g0]0x89,%l2 ! %l2 = 0000000000000000 | |
24096 | ||
24097 | p0_label_577: | |
24098 | ! Mem[00000000218000c0] = 00008d82, %l3 = 0000000000000000 | |
24099 | ldub [%o3+0x0c0],%l3 ! %l3 = 0000000000000000 | |
24100 | ! Mem[00000000300c1408] = 00000000, %l7 = 0000000000000000 | |
24101 | ldsba [%i3+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
24102 | ! Mem[00000000211c0000] = ffff1a4c, %l4 = 0000000000000000 | |
24103 | ldsb [%o2+%g0],%l4 ! %l4 = ffffffffffffffff | |
24104 | ! Mem[0000000010001434] = 00009c9c, %l3 = 0000000000000000 | |
24105 | lduha [%i0+0x036]%asi,%l3 ! %l3 = 0000000000009c9c | |
24106 | ! Mem[0000000030041410] = 00000000, %l1 = 00000000000000ff | |
24107 | ldsba [%i1+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
24108 | membar #Sync ! Added by membar checker (96) | |
24109 | ! Mem[0000000030141400] = 00000000 0000ffff 00000000 ffffffff | |
24110 | ! Mem[0000000030141410] = ff000000 00000000 fc734517 000000ff | |
24111 | ! Mem[0000000030141420] = 1f41ff76 2164159c ffffffff 79ff0000 | |
24112 | ! Mem[0000000030141430] = ff000000 00009400 7827da3e 597bac10 | |
24113 | ldda [%i5]ASI_BLK_SL,%f16 ! Block Load from 0000000030141400 | |
24114 | ! Mem[0000000030041410] = 00000000, %l0 = 0000000000000000 | |
24115 | lduha [%i1+%o5]0x89,%l0 ! %l0 = 0000000000000000 | |
24116 | ! Mem[00000000300c1410] = 00000000, %l1 = 0000000000000000 | |
24117 | lduba [%i3+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
24118 | ! Mem[00000000201c0000] = 00009457, %l2 = 0000000000000000 | |
24119 | ldub [%o0+0x001],%l2 ! %l2 = 0000000000000000 | |
24120 | ! Starting 10 instruction Store Burst | |
24121 | ! %f6 = 00000000, Mem[0000000030101408] = 000000ff | |
24122 | sta %f6 ,[%i4+%o4]0x89 ! Mem[0000000030101408] = 00000000 | |
24123 | ||
24124 | p0_label_578: | |
24125 | ! Mem[0000000030001410] = 00000000, %l2 = 0000000000000000 | |
24126 | swapa [%i0+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
24127 | ! %f8 = 00000000 000000ff, %l3 = 0000000000009c9c | |
24128 | ! Mem[0000000010001430] = ff00000000009c9c | |
24129 | add %i0,0x030,%g1 | |
24130 | stda %f8,[%g1+%l3]ASI_PST16_PL ! Mem[0000000010001430] = ff00000000000000 | |
24131 | ! Mem[0000000030041408] = 00000000, %l4 = ffffffffffffffff | |
24132 | ldstuba [%i1+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
24133 | ! %l2 = 0000000000000000, Mem[0000000010181410] = 0000000000000000 | |
24134 | stx %l2,[%i6+%o5] ! Mem[0000000010181410] = 0000000000000000 | |
24135 | ! Mem[0000000010141424] = 00000000, %l4 = 0000000000000000 | |
24136 | ldstub [%i5+0x024],%l4 ! %l4 = 00000000000000ff | |
24137 | ! %f6 = 00000000 12000000, Mem[00000000100c1408] = 00000076 00000076 | |
24138 | stda %f6 ,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000 12000000 | |
24139 | ! %f5 = ff790000, Mem[0000000030181408] = ff0000ff | |
24140 | sta %f5 ,[%i6+%o4]0x81 ! Mem[0000000030181408] = ff790000 | |
24141 | ! %l2 = 0000000000000000, Mem[0000000010041410] = 000000ffff790000 | |
24142 | stx %l2,[%i1+%o5] ! Mem[0000000010041410] = 0000000000000000 | |
24143 | ! Mem[0000000021800040] = ff9c1df3, %l2 = 0000000000000000 | |
24144 | ldstub [%o3+0x040],%l2 ! %l2 = 000000ff000000ff | |
24145 | ! Starting 10 instruction Load Burst | |
24146 | ! Mem[0000000010181400] = ff0012f3, %l5 = 0000000000000000 | |
24147 | ldsba [%i6+%g0]0x80,%l5 ! %l5 = ffffffffffffffff | |
24148 | ||
24149 | p0_label_579: | |
24150 | ! Mem[0000000030081400] = 0000ffff, %f11 = 00000000 | |
24151 | lda [%i2+%g0]0x89,%f11 ! %f11 = 0000ffff | |
24152 | ! Mem[000000001010142c] = 00000003, %l1 = 0000000000000000 | |
24153 | ldswa [%i4+0x02c]%asi,%l1 ! %l1 = 0000000000000003 | |
24154 | ! Mem[0000000010041410] = 00000000, %l6 = ffffffffffffffff | |
24155 | ldsba [%i1+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
24156 | ! Mem[0000000010041410] = 00000000, %l2 = 00000000000000ff | |
24157 | lduha [%i1+%o5]0x80,%l2 ! %l2 = 0000000000000000 | |
24158 | membar #Sync ! Added by membar checker (97) | |
24159 | ! Mem[0000000010041400] = 76000000 0000ffff 76000000 0000ffff | |
24160 | ! Mem[0000000010041410] = 00000000 00000000 00000000 12000000 | |
24161 | ! Mem[0000000010041420] = ff0000ff 00000000 57790000 00000000 | |
24162 | ! Mem[0000000010041430] = ff000000 00000000 000000c6 ffff0000 | |
24163 | ldda [%i1]ASI_BLK_PL,%f0 ! Block Load from 0000000010041400 | |
24164 | ! Mem[0000000030041410] = 00000000, %l4 = 0000000000000000 | |
24165 | lduba [%i1+%o5]0x81,%l4 ! %l4 = 0000000000000000 | |
24166 | ! Mem[00000000100c1400] = 0000ffff, %l5 = ffffffffffffffff | |
24167 | ldsba [%i3+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
24168 | ! Mem[0000000030001408] = 00000003, %l4 = 0000000000000000 | |
24169 | ldsba [%i0+%o4]0x89,%l4 ! %l4 = 0000000000000003 | |
24170 | ! Mem[0000000010181408] = 00000000, %f31 = 3eda2778 | |
24171 | lda [%i6+%o4]0x88,%f31 ! %f31 = 00000000 | |
24172 | ! Starting 10 instruction Store Burst | |
24173 | ! %f16 = ffff0000 00000000, %l3 = 0000000000009c9c | |
24174 | ! Mem[0000000010001410] = 0000000000000000 | |
24175 | add %i0,0x010,%g1 | |
24176 | stda %f16,[%g1+%l3]ASI_PST32_P ! Mem[0000000010001410] = 0000000000000000 | |
24177 | ||
24178 | p0_label_580: | |
24179 | ! Mem[0000000010041410] = 00000000, %l1 = 0000000000000003 | |
24180 | swapa [%i1+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
24181 | ! Mem[0000000010141434] = 000000ff, %l7 = 0000000000000000 | |
24182 | swap [%i5+0x034],%l7 ! %l7 = 00000000000000ff | |
24183 | ! Mem[00000000300c1400] = 00000000, %l4 = 0000000000000003 | |
24184 | swapa [%i3+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
24185 | ! %f25 = 76ff411f, Mem[0000000030101400] = ff000000 | |
24186 | sta %f25,[%i4+%g0]0x81 ! Mem[0000000030101400] = 76ff411f | |
24187 | ! %l2 = 0000000000000000, Mem[0000000030001410] = 00000000 | |
24188 | stba %l2,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00000000 | |
24189 | ! %l5 = 0000000000000000, Mem[0000000010081400] = 000000ff | |
24190 | stha %l5,[%i2+%g0]0x88 ! Mem[0000000010081400] = 00000000 | |
24191 | ! %l4 = 0000000000000000, Mem[0000000030041410] = 0000000000000000 | |
24192 | stxa %l4,[%i1+%o5]0x81 ! Mem[0000000030041410] = 0000000000000000 | |
24193 | ! Mem[0000000030101408] = 00000000, %l3 = 0000000000009c9c | |
24194 | swapa [%i4+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
24195 | ! Mem[0000000030001400] = ff0012f3, %l3 = 0000000000000000 | |
24196 | swapa [%i0+%g0]0x81,%l3 ! %l3 = 00000000ff0012f3 | |
24197 | ! Starting 10 instruction Load Burst | |
24198 | ! Mem[0000000010001408] = 00000003, %l3 = 00000000ff0012f3 | |
24199 | ldswa [%i0+0x008]%asi,%l3 ! %l3 = 0000000000000003 | |
24200 | ||
24201 | ! Check Point 116 for processor 0 | |
24202 | ||
24203 | set p0_check_pt_data_116,%g4 | |
24204 | rd %ccr,%g5 ! %g5 = 44 | |
24205 | ldx [%g4+0x08],%g2 | |
24206 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
24207 | bne %xcc,p0_reg_check_fail0 | |
24208 | mov 0xee0,%g1 | |
24209 | ldx [%g4+0x10],%g2 | |
24210 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
24211 | bne %xcc,p0_reg_check_fail1 | |
24212 | mov 0xee1,%g1 | |
24213 | ldx [%g4+0x18],%g2 | |
24214 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
24215 | bne %xcc,p0_reg_check_fail2 | |
24216 | mov 0xee2,%g1 | |
24217 | ldx [%g4+0x20],%g2 | |
24218 | cmp %l3,%g2 ! %l3 = 0000000000000003 | |
24219 | bne %xcc,p0_reg_check_fail3 | |
24220 | mov 0xee3,%g1 | |
24221 | ldx [%g4+0x28],%g2 | |
24222 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
24223 | bne %xcc,p0_reg_check_fail4 | |
24224 | mov 0xee4,%g1 | |
24225 | ldx [%g4+0x30],%g2 | |
24226 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
24227 | bne %xcc,p0_reg_check_fail5 | |
24228 | mov 0xee5,%g1 | |
24229 | ldx [%g4+0x38],%g2 | |
24230 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
24231 | bne %xcc,p0_reg_check_fail6 | |
24232 | mov 0xee6,%g1 | |
24233 | ldx [%g4+0x40],%g2 | |
24234 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
24235 | bne %xcc,p0_reg_check_fail7 | |
24236 | mov 0xee7,%g1 | |
24237 | ldx [%g4+0x48],%g3 | |
24238 | std %f0,[%g4] | |
24239 | ldx [%g4],%g2 | |
24240 | cmp %g3,%g2 ! %f0 = ffff0000 00000076 | |
24241 | bne %xcc,p0_freg_check_fail | |
24242 | mov 0xf00,%g1 | |
24243 | ldx [%g4+0x50],%g3 | |
24244 | std %f2,[%g4] | |
24245 | ldx [%g4],%g2 | |
24246 | cmp %g3,%g2 ! %f2 = ffff0000 00000076 | |
24247 | bne %xcc,p0_freg_check_fail | |
24248 | mov 0xf02,%g1 | |
24249 | ldx [%g4+0x58],%g3 | |
24250 | std %f4,[%g4] | |
24251 | ldx [%g4],%g2 | |
24252 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
24253 | bne %xcc,p0_freg_check_fail | |
24254 | mov 0xf04,%g1 | |
24255 | ldx [%g4+0x60],%g3 | |
24256 | std %f6,[%g4] | |
24257 | ldx [%g4],%g2 | |
24258 | cmp %g3,%g2 ! %f6 = 00000012 00000000 | |
24259 | bne %xcc,p0_freg_check_fail | |
24260 | mov 0xf06,%g1 | |
24261 | ldx [%g4+0x68],%g3 | |
24262 | std %f8,[%g4] | |
24263 | ldx [%g4],%g2 | |
24264 | cmp %g3,%g2 ! %f8 = 00000000 ff0000ff | |
24265 | bne %xcc,p0_freg_check_fail | |
24266 | mov 0xf08,%g1 | |
24267 | ldx [%g4+0x70],%g3 | |
24268 | std %f10,[%g4] | |
24269 | ldx [%g4],%g2 | |
24270 | cmp %g3,%g2 ! %f10 = 00000000 00007957 | |
24271 | bne %xcc,p0_freg_check_fail | |
24272 | mov 0xf10,%g1 | |
24273 | ldx [%g4+0x78],%g3 | |
24274 | std %f12,[%g4] | |
24275 | ldx [%g4],%g2 | |
24276 | cmp %g3,%g2 ! %f12 = 00000000 000000ff | |
24277 | bne %xcc,p0_freg_check_fail | |
24278 | mov 0xf12,%g1 | |
24279 | ldx [%g4+0x80],%g3 | |
24280 | std %f14,[%g4] | |
24281 | ldx [%g4],%g2 | |
24282 | cmp %g3,%g2 ! %f14 = 0000ffff c6000000 | |
24283 | bne %xcc,p0_freg_check_fail | |
24284 | mov 0xf14,%g1 | |
24285 | ldx [%g4+0x88],%g3 | |
24286 | std %f16,[%g4] | |
24287 | ldx [%g4],%g2 | |
24288 | cmp %g3,%g2 ! %f16 = ffff0000 00000000 | |
24289 | bne %xcc,p0_freg_check_fail | |
24290 | mov 0xf16,%g1 | |
24291 | ldx [%g4+0x90],%g3 | |
24292 | std %f18,[%g4] | |
24293 | ldx [%g4],%g2 | |
24294 | cmp %g3,%g2 ! %f18 = ffffffff 00000000 | |
24295 | bne %xcc,p0_freg_check_fail | |
24296 | mov 0xf18,%g1 | |
24297 | ldx [%g4+0x98],%g3 | |
24298 | std %f20,[%g4] | |
24299 | ldx [%g4],%g2 | |
24300 | cmp %g3,%g2 ! %f20 = 00000000 000000ff | |
24301 | bne %xcc,p0_freg_check_fail | |
24302 | mov 0xf20,%g1 | |
24303 | ldx [%g4+0xa0],%g3 | |
24304 | std %f22,[%g4] | |
24305 | ldx [%g4],%g2 | |
24306 | cmp %g3,%g2 ! %f22 = ff000000 174573fc | |
24307 | bne %xcc,p0_freg_check_fail | |
24308 | mov 0xf22,%g1 | |
24309 | ldx [%g4+0xa8],%g3 | |
24310 | std %f24,[%g4] | |
24311 | ldx [%g4],%g2 | |
24312 | cmp %g3,%g2 ! %f24 = 9c156421 76ff411f | |
24313 | bne %xcc,p0_freg_check_fail | |
24314 | mov 0xf24,%g1 | |
24315 | ldx [%g4+0xb0],%g3 | |
24316 | std %f26,[%g4] | |
24317 | ldx [%g4],%g2 | |
24318 | cmp %g3,%g2 ! %f26 = 0000ff79 ffffffff | |
24319 | bne %xcc,p0_freg_check_fail | |
24320 | mov 0xf26,%g1 | |
24321 | ldx [%g4+0xb8],%g3 | |
24322 | std %f28,[%g4] | |
24323 | ldx [%g4],%g2 | |
24324 | cmp %g3,%g2 ! %f28 = 00940000 000000ff | |
24325 | bne %xcc,p0_freg_check_fail | |
24326 | mov 0xf28,%g1 | |
24327 | ldx [%g4+0xc0],%g3 | |
24328 | std %f30,[%g4] | |
24329 | ldx [%g4],%g2 | |
24330 | cmp %g3,%g2 ! %f30 = 10ac7b59 00000000 | |
24331 | bne %xcc,p0_freg_check_fail | |
24332 | mov 0xf30,%g1 | |
24333 | ||
24334 | ! Check Point 116 completed | |
24335 | ||
24336 | ||
24337 | p0_label_581: | |
24338 | ! Mem[0000000010041408] = 76000000, %l6 = 0000000000000000 | |
24339 | lduba [%i1+%o4]0x80,%l6 ! %l6 = 0000000000000076 | |
24340 | ! Mem[0000000030041410] = 00000000, %l0 = 0000000000000000 | |
24341 | ldsha [%i1+%o5]0x89,%l0 ! %l0 = 0000000000000000 | |
24342 | ! Mem[0000000010041410] = 0000000300000000, %l3 = 0000000000000003 | |
24343 | ldxa [%i1+%o5]0x80,%l3 ! %l3 = 0000000300000000 | |
24344 | ! Mem[0000000010041400] = ffff000000000076, %f24 = 9c156421 76ff411f | |
24345 | ldda [%i1+%g0]0x88,%f24 ! %f24 = ffff0000 00000076 | |
24346 | ! Mem[0000000030081408] = 00000000, %f19 = 00000000 | |
24347 | lda [%i2+%o4]0x89,%f19 ! %f19 = 00000000 | |
24348 | ! Mem[0000000010141430] = 0000000000000000, %f14 = 0000ffff c6000000 | |
24349 | ldd [%i5+0x030],%f14 ! %f14 = 00000000 00000000 | |
24350 | ! Mem[0000000030081408] = 00000000 00000000, %l6 = 00000076, %l7 = 000000ff | |
24351 | ldda [%i2+%o4]0x81,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
24352 | ! Mem[0000000010141408] = ff00000000000000, %l3 = 0000000300000000 | |
24353 | ldxa [%i5+%o4]0x80,%l3 ! %l3 = ff00000000000000 | |
24354 | membar #Sync ! Added by membar checker (98) | |
24355 | ! %f28 = 00940000 000000ff, %l3 = ff00000000000000 | |
24356 | ! Mem[0000000010041408] = 760000000000ffff | |
24357 | add %i1,0x008,%g1 | |
24358 | stda %f28,[%g1+%l3]ASI_PST8_PL ! Mem[0000000010041408] = 760000000000ffff | |
24359 | ! Starting 10 instruction Store Burst | |
24360 | ! %l6 = 00000000, %l7 = 00000000, Mem[0000000010181410] = 00000000 00000000 | |
24361 | stda %l6,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00000000 00000000 | |
24362 | ||
24363 | p0_label_582: | |
24364 | ! Mem[00000000100c1410] = 88c7ffff, %l3 = ff00000000000000 | |
24365 | swapa [%i3+%o5]0x88,%l3 ! %l3 = 0000000088c7ffff | |
24366 | ! Mem[000000001010143d] = 000000ff, %l3 = 0000000088c7ffff | |
24367 | ldstuba [%i4+0x03d]%asi,%l3 ! %l3 = 00000000000000ff | |
24368 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010001428] = 9d3dffff 00000000 | |
24369 | std %l2,[%i0+0x028] ! Mem[0000000010001428] = 00000000 00000000 | |
24370 | ! Mem[0000000010081408] = 00000000, %l0 = 0000000000000000 | |
24371 | ldstuba [%i2+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
24372 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000030081400] = 0000ffff 76000000 | |
24373 | stda %l2,[%i2+%g0]0x89 ! Mem[0000000030081400] = 00000000 00000000 | |
24374 | ! Mem[00000000300c1400] = 03000000, %l0 = 0000000000000000 | |
24375 | ldstuba [%i3+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
24376 | ! Mem[0000000010041400] = 76000000, %l1 = 0000000000000000 | |
24377 | ldstuba [%i1+%g0]0x80,%l1 ! %l1 = 00000076000000ff | |
24378 | ! Mem[00000000300c1410] = 00000000, %l6 = 0000000000000000 | |
24379 | swapa [%i3+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
24380 | ! Mem[0000000010001424] = 00000000, %l5 = 0000000000000000 | |
24381 | swap [%i0+0x024],%l5 ! %l5 = 0000000000000000 | |
24382 | ! Starting 10 instruction Load Burst | |
24383 | ! Mem[00000000300c1408] = 00000000, %l4 = 0000000000000000 | |
24384 | lduha [%i3+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
24385 | ||
24386 | p0_label_583: | |
24387 | ! Mem[0000000030001410] = 00000000, %l3 = 0000000000000000 | |
24388 | lduwa [%i0+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
24389 | ! Mem[0000000030001410] = 00000000, %l0 = 0000000000000000 | |
24390 | ldsha [%i0+%o5]0x81,%l0 ! %l0 = 0000000000000000 | |
24391 | ! Mem[0000000030001408] = 00000003, %l0 = 0000000000000000 | |
24392 | lduha [%i0+%o4]0x89,%l0 ! %l0 = 0000000000000003 | |
24393 | ! Mem[0000000030101400] = 76ff411f, %f19 = 00000000 | |
24394 | lda [%i4+%g0]0x81,%f19 ! %f19 = 76ff411f | |
24395 | ! Mem[0000000030181400] = 000000ff, %l0 = 0000000000000003 | |
24396 | lduwa [%i6+%g0]0x81,%l0 ! %l0 = 00000000000000ff | |
24397 | ! Mem[0000000021800040] = ff9c1df3, %l7 = 0000000000000000 | |
24398 | ldsha [%o3+0x040]%asi,%l7 ! %l7 = ffffffffffffff9c | |
24399 | ! Mem[00000000100c1400] = 0000ffff00000000, %f10 = 00000000 00007957 | |
24400 | ldda [%i3+%g0]0x80,%f10 ! %f10 = 0000ffff 00000000 | |
24401 | ! Mem[0000000010081408] = ff000000, %l7 = ffffffffffffff9c | |
24402 | lduha [%i2+%o4]0x80,%l7 ! %l7 = 000000000000ff00 | |
24403 | ! Mem[0000000010141408] = 000000ff, %l0 = 00000000000000ff | |
24404 | ldswa [%i5+%o4]0x88,%l0 ! %l0 = 00000000000000ff | |
24405 | ! Starting 10 instruction Store Burst | |
24406 | ! Mem[00000000201c0000] = 00009457, %l1 = 0000000000000076 | |
24407 | ldstub [%o0+%g0],%l1 ! %l1 = 00000000000000ff | |
24408 | ||
24409 | p0_label_584: | |
24410 | ! %l1 = 0000000000000000, Mem[0000000010141410] = 00000000 | |
24411 | stha %l1,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00000000 | |
24412 | ! %f28 = 00940000, Mem[0000000030001410] = 00000000 | |
24413 | sta %f28,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00940000 | |
24414 | ! %l0 = 00000000000000ff, Mem[0000000010001400] = c6000000000000ff | |
24415 | stxa %l0,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000000000ff | |
24416 | ! %l0 = 000000ff, %l1 = 00000000, Mem[0000000010141400] = ff000000 00000000 | |
24417 | stda %l0,[%i5+%g0]0x80 ! Mem[0000000010141400] = 000000ff 00000000 | |
24418 | ! %l6 = 00000000, %l7 = 0000ff00, Mem[00000000100c1400] = 0000ffff 00000000 | |
24419 | stda %l6,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00000000 0000ff00 | |
24420 | ! %f4 = 00000000, Mem[00000000100c140c] = 00000000 | |
24421 | st %f4 ,[%i3+0x00c] ! Mem[00000000100c140c] = 00000000 | |
24422 | ! Mem[00000000300c1408] = 00000000, %l0 = 00000000000000ff | |
24423 | ldstuba [%i3+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
24424 | ! %l7 = 000000000000ff00, Mem[0000000010141438] = 00004517, %asi = 80 | |
24425 | stwa %l7,[%i5+0x038]%asi ! Mem[0000000010141438] = 0000ff00 | |
24426 | ! %l0 = 00000000, %l1 = 00000000, Mem[0000000010101438] = ff000000 00ff00ff | |
24427 | std %l0,[%i4+0x038] ! Mem[0000000010101438] = 00000000 00000000 | |
24428 | ! Starting 10 instruction Load Burst | |
24429 | ! Mem[0000000010001408] = 00000003, %l3 = 0000000000000000 | |
24430 | ldsha [%i0+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
24431 | ||
24432 | p0_label_585: | |
24433 | ! Mem[0000000030141408] = ffffffff00000000, %f12 = 00000000 000000ff | |
24434 | ldda [%i5+%o4]0x89,%f12 ! %f12 = ffffffff 00000000 | |
24435 | ! Mem[0000000010141434] = 00000000, %l3 = 0000000000000000 | |
24436 | lduh [%i5+0x034],%l3 ! %l3 = 0000000000000000 | |
24437 | ! Mem[0000000010141410] = 00000000000000ff, %l4 = 0000000000000000 | |
24438 | ldxa [%i5+%o5]0x80,%l4 ! %l4 = 00000000000000ff | |
24439 | ! Mem[0000000030101410] = 00000000, %l6 = 0000000000000000 | |
24440 | lduwa [%i4+%o5]0x89,%l6 ! %l6 = 0000000000000000 | |
24441 | ! Mem[0000000030101410] = 57790000 00000000, %l2 = 00000000, %l3 = 00000000 | |
24442 | ldda [%i4+%o5]0x89,%l2 ! %l2 = 0000000000000000 0000000057790000 | |
24443 | ! Mem[0000000010101410] = 9d3d79ff, %l0 = 0000000000000000 | |
24444 | ldsha [%i4+%o5]0x88,%l0 ! %l0 = 00000000000079ff | |
24445 | ! Mem[0000000010181420] = 000000ff, %l4 = 00000000000000ff | |
24446 | lduh [%i6+0x022],%l4 ! %l4 = 00000000000000ff | |
24447 | ! Mem[00000000211c0000] = ffff1a4c, %l0 = 00000000000079ff | |
24448 | ldub [%o2+%g0],%l0 ! %l0 = 00000000000000ff | |
24449 | ! Mem[0000000010001400] = ff000000, %l5 = 0000000000000000 | |
24450 | ldswa [%i0+%g0]0x80,%l5 ! %l5 = ffffffffff000000 | |
24451 | ! Starting 10 instruction Store Burst | |
24452 | ! %l1 = 0000000000000000, Mem[00000000300c1400] = ff000003000000ff | |
24453 | stxa %l1,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 0000000000000000 | |
24454 | ||
24455 | ! Check Point 117 for processor 0 | |
24456 | ||
24457 | set p0_check_pt_data_117,%g4 | |
24458 | rd %ccr,%g5 ! %g5 = 44 | |
24459 | ldx [%g4+0x08],%g2 | |
24460 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
24461 | bne %xcc,p0_reg_check_fail0 | |
24462 | mov 0xee0,%g1 | |
24463 | ldx [%g4+0x10],%g2 | |
24464 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
24465 | bne %xcc,p0_reg_check_fail1 | |
24466 | mov 0xee1,%g1 | |
24467 | ldx [%g4+0x18],%g2 | |
24468 | cmp %l3,%g2 ! %l3 = 0000000057790000 | |
24469 | bne %xcc,p0_reg_check_fail3 | |
24470 | mov 0xee3,%g1 | |
24471 | ldx [%g4+0x20],%g2 | |
24472 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
24473 | bne %xcc,p0_reg_check_fail4 | |
24474 | mov 0xee4,%g1 | |
24475 | ldx [%g4+0x28],%g2 | |
24476 | cmp %l5,%g2 ! %l5 = ffffffffff000000 | |
24477 | bne %xcc,p0_reg_check_fail5 | |
24478 | mov 0xee5,%g1 | |
24479 | ldx [%g4+0x30],%g2 | |
24480 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
24481 | bne %xcc,p0_reg_check_fail6 | |
24482 | mov 0xee6,%g1 | |
24483 | ldx [%g4+0x38],%g2 | |
24484 | cmp %l7,%g2 ! %l7 = 000000000000ff00 | |
24485 | bne %xcc,p0_reg_check_fail7 | |
24486 | mov 0xee7,%g1 | |
24487 | ldx [%g4+0x40],%g3 | |
24488 | std %f2,[%g4] | |
24489 | ldx [%g4],%g2 | |
24490 | cmp %g3,%g2 ! %f2 = ffff0000 00000076 | |
24491 | bne %xcc,p0_freg_check_fail | |
24492 | mov 0xf02,%g1 | |
24493 | ldx [%g4+0x48],%g3 | |
24494 | std %f6,[%g4] | |
24495 | ldx [%g4],%g2 | |
24496 | cmp %g3,%g2 ! %f6 = 00000012 00000000 | |
24497 | bne %xcc,p0_freg_check_fail | |
24498 | mov 0xf06,%g1 | |
24499 | ldx [%g4+0x50],%g3 | |
24500 | std %f10,[%g4] | |
24501 | ldx [%g4],%g2 | |
24502 | cmp %g3,%g2 ! %f10 = 0000ffff 00000000 | |
24503 | bne %xcc,p0_freg_check_fail | |
24504 | mov 0xf10,%g1 | |
24505 | ldx [%g4+0x58],%g3 | |
24506 | std %f12,[%g4] | |
24507 | ldx [%g4],%g2 | |
24508 | cmp %g3,%g2 ! %f12 = ffffffff 00000000 | |
24509 | bne %xcc,p0_freg_check_fail | |
24510 | mov 0xf12,%g1 | |
24511 | ldx [%g4+0x60],%g3 | |
24512 | std %f14,[%g4] | |
24513 | ldx [%g4],%g2 | |
24514 | cmp %g3,%g2 ! %f14 = 00000000 00000000 | |
24515 | bne %xcc,p0_freg_check_fail | |
24516 | mov 0xf14,%g1 | |
24517 | ldx [%g4+0x68],%g3 | |
24518 | std %f18,[%g4] | |
24519 | ldx [%g4],%g2 | |
24520 | cmp %g3,%g2 ! %f18 = ffffffff 76ff411f | |
24521 | bne %xcc,p0_freg_check_fail | |
24522 | mov 0xf18,%g1 | |
24523 | ldx [%g4+0x70],%g3 | |
24524 | std %f24,[%g4] | |
24525 | ldx [%g4],%g2 | |
24526 | cmp %g3,%g2 ! %f24 = ffff0000 00000076 | |
24527 | bne %xcc,p0_freg_check_fail | |
24528 | mov 0xf24,%g1 | |
24529 | ||
24530 | ! Check Point 117 completed | |
24531 | ||
24532 | ||
24533 | p0_label_586: | |
24534 | ! Mem[0000000010041410] = 00000003, %l7 = 000000000000ff00 | |
24535 | ldstuba [%i1+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
24536 | ! %f22 = ff000000, Mem[0000000030001400] = 00000000 | |
24537 | sta %f22,[%i0+%g0]0x81 ! Mem[0000000030001400] = ff000000 | |
24538 | ! %l1 = 0000000000000000, %l7 = 0000000000000000, %l3 = 0000000057790000 | |
24539 | mulx %l1,%l7,%l3 ! %l3 = 0000000000000000 | |
24540 | ! %l2 = 0000000000000000, Mem[0000000010101410] = ff793d9d000000ff | |
24541 | stxa %l2,[%i4+%o5]0x80 ! Mem[0000000010101410] = 0000000000000000 | |
24542 | ! %l2 = 0000000000000000, Mem[0000000010001404] = 00000000, %asi = 80 | |
24543 | stwa %l2,[%i0+0x004]%asi ! Mem[0000000010001404] = 00000000 | |
24544 | ! Mem[0000000030181410] = 00000000, %l1 = 0000000000000000 | |
24545 | swapa [%i6+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
24546 | ! Mem[0000000010001400] = ff000000, %l4 = 00000000000000ff | |
24547 | ldstuba [%i0+%g0]0x80,%l4 ! %l4 = 000000ff000000ff | |
24548 | ! Mem[0000000010181408] = 00000000, %l2 = 00000000, %l4 = 000000ff | |
24549 | add %i6,0x08,%g1 | |
24550 | casa [%g1]0x80,%l2,%l4 ! %l4 = 0000000000000000 | |
24551 | ! %l0 = 00000000000000ff, Mem[0000000030181408] = 000079ff | |
24552 | stba %l0,[%i6+%o4]0x89 ! Mem[0000000030181408] = 000079ff | |
24553 | ! Starting 10 instruction Load Burst | |
24554 | ! Mem[0000000030081410] = 0000ffff00000000, %l2 = 0000000000000000 | |
24555 | ldxa [%i2+%o5]0x89,%l2 ! %l2 = 0000ffff00000000 | |
24556 | ||
24557 | p0_label_587: | |
24558 | ! Mem[0000000030141408] = 00000000, %l0 = 00000000000000ff | |
24559 | lduba [%i5+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
24560 | ! Mem[00000000100c1410] = 00000000, %f9 = ff0000ff | |
24561 | lda [%i3+0x010]%asi,%f9 ! %f9 = 00000000 | |
24562 | ! Mem[00000000100c1410] = 00000000, %l6 = 0000000000000000 | |
24563 | ldswa [%i3+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
24564 | ! Mem[0000000030181400] = 000000ff, %l6 = 0000000000000000 | |
24565 | ldsba [%i6+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
24566 | ! Mem[0000000030101400] = 76ff411f000000ff, %f26 = 0000ff79 ffffffff | |
24567 | ldda [%i4+%g0]0x81,%f26 ! %f26 = 76ff411f 000000ff | |
24568 | ! Mem[00000000100c1408] = 00000012, %l5 = ffffffffff000000 | |
24569 | lduha [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
24570 | ! Mem[0000000010101400] = ff000000 ffffff00, %l0 = 00000000, %l1 = 00000000 | |
24571 | ldda [%i4+%g0]0x88,%l0 ! %l0 = 00000000ffffff00 00000000ff000000 | |
24572 | ! Mem[0000000030041400] = 00000000000000ff, %f6 = 00000012 00000000 | |
24573 | ldda [%i1+%g0]0x81,%f6 ! %f6 = 00000000 000000ff | |
24574 | ! Mem[0000000010001400] = ff000000, %l3 = 0000000000000000 | |
24575 | lduba [%i0+%g0]0x80,%l3 ! %l3 = 00000000000000ff | |
24576 | ! Starting 10 instruction Store Burst | |
24577 | ! Mem[0000000030041410] = 00000000, %l7 = 0000000000000000 | |
24578 | ldstuba [%i1+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
24579 | ||
24580 | p0_label_588: | |
24581 | ! %f30 = 10ac7b59 00000000, Mem[00000000100c1400] = 00000000 00ff0000 | |
24582 | stda %f30,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 10ac7b59 00000000 | |
24583 | ! Mem[0000000030141408] = 00000000, %l0 = 00000000ffffff00 | |
24584 | ldstuba [%i5+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
24585 | ! Mem[0000000030181410] = 00000000, %l1 = 00000000ff000000 | |
24586 | swapa [%i6+%o5]0x81,%l1 ! %l1 = 0000000000000000 | |
24587 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000010081408] = ff000000 00000000 | |
24588 | stda %l4,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00000000 00000000 | |
24589 | ! %f4 = 00000000, Mem[00000000100c1410] = 00000000 | |
24590 | sta %f4 ,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 00000000 | |
24591 | ! Mem[0000000020800041] = ffff7379, %l4 = 0000000000000000 | |
24592 | ldstuba [%o1+0x041]%asi,%l4 ! %l4 = 000000ff000000ff | |
24593 | ! %f16 = ffff0000 00000000, Mem[0000000030001410] = 00940000 00000000 | |
24594 | stda %f16,[%i0+%o5]0x89 ! Mem[0000000030001410] = ffff0000 00000000 | |
24595 | ! %f2 = ffff0000 00000076, Mem[0000000010141410] = 00000000 ff000000 | |
24596 | stda %f2 ,[%i5+%o5]0x88 ! Mem[0000000010141410] = ffff0000 00000076 | |
24597 | ! Mem[0000000010001404] = 00000000, %l7 = 0000000000000000 | |
24598 | swap [%i0+0x004],%l7 ! %l7 = 0000000000000000 | |
24599 | ! Starting 10 instruction Load Burst | |
24600 | ! Mem[0000000010081410] = 00000000, %l2 = 0000ffff00000000 | |
24601 | ldswa [%i2+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
24602 | ||
24603 | p0_label_589: | |
24604 | ! Mem[0000000010101410] = 00000000, %f23 = 174573fc | |
24605 | lda [%i4+%o5]0x88,%f23 ! %f23 = 00000000 | |
24606 | ! Mem[0000000021800140] = 00001df6, %l7 = 0000000000000000 | |
24607 | ldsba [%o3+0x141]%asi,%l7 ! %l7 = 0000000000000000 | |
24608 | ! Mem[0000000030141400] = 00000000, %l4 = 00000000000000ff | |
24609 | ldsha [%i5+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
24610 | ! Mem[0000000030181400] = ff000000, %l3 = 00000000000000ff | |
24611 | lduha [%i6+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
24612 | ! Mem[0000000030001400] = ff000000, %l0 = 0000000000000000 | |
24613 | ldsba [%i0+%g0]0x81,%l0 ! %l0 = ffffffffffffffff | |
24614 | ! Mem[0000000010041408] = 76000000, %l7 = 0000000000000000 | |
24615 | lduba [%i1+%o4]0x80,%l7 ! %l7 = 0000000000000076 | |
24616 | ! Mem[0000000010001400] = ff000000, %l3 = 0000000000000000 | |
24617 | ldswa [%i0+%g0]0x80,%l3 ! %l3 = ffffffffff000000 | |
24618 | ! Mem[00000000300c1408] = 00000000000000ff, %f22 = ff000000 00000000 | |
24619 | ldda [%i3+%o4]0x89,%f22 ! %f22 = 00000000 000000ff | |
24620 | ! Mem[0000000010181410] = 00000000, %l0 = ffffffffffffffff | |
24621 | lduha [%i6+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
24622 | ! Starting 10 instruction Store Burst | |
24623 | ! Mem[0000000010141400] = 000000ff, %l2 = 0000000000000000 | |
24624 | ldstuba [%i5+%g0]0x80,%l2 ! %l2 = 00000000000000ff | |
24625 | ||
24626 | p0_label_590: | |
24627 | ! Mem[00000000100c1408] = 00000012, %l0 = 0000000000000000 | |
24628 | swapa [%i3+%o4]0x80,%l0 ! %l0 = 0000000000000012 | |
24629 | ! Mem[0000000010081410] = 00000000, %l5 = 0000000000000000 | |
24630 | ldstuba [%i2+%o5]0x80,%l5 ! %l5 = 00000000000000ff | |
24631 | ! Mem[0000000021800100] = ffff11d1, %l3 = ffffffffff000000 | |
24632 | ldstuba [%o3+0x100]%asi,%l3 ! %l3 = 000000ff000000ff | |
24633 | ! %l6 = 0000000000000000, Mem[00000000211c0000] = ffff1a4c | |
24634 | stb %l6,[%o2+%g0] ! Mem[00000000211c0000] = 00ff1a4c | |
24635 | ! Mem[0000000010041408] = 76000000, %l4 = 0000000000000000 | |
24636 | swapa [%i1+%o4]0x80,%l4 ! %l4 = 0000000076000000 | |
24637 | ! Mem[0000000030041410] = 000000ff, %l6 = 0000000000000000 | |
24638 | swapa [%i1+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
24639 | ! Mem[0000000030001410] = 00000000, %l7 = 0000000000000076 | |
24640 | ldstuba [%i0+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
24641 | ! %l2 = 0000000000000000, Mem[0000000021800100] = ffff11d1 | |
24642 | sth %l2,[%o3+0x100] ! Mem[0000000021800100] = 000011d1 | |
24643 | ! Code Fragment 3 | |
24644 | p0_fragment_21: | |
24645 | ! %l0 = 0000000000000012 | |
24646 | setx 0x427dd2dfb69f4721,%g7,%l0 ! %l0 = 427dd2dfb69f4721 | |
24647 | ! %l1 = 0000000000000000 | |
24648 | setx 0x785f6817d8df9347,%g7,%l1 ! %l1 = 785f6817d8df9347 | |
24649 | setx 0x1fe000, %g1, %g3 | |
24650 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
24651 | setx 0x1ffff8, %g1, %g2 | |
24652 | and %l0, %g2, %l0 | |
24653 | ta T_CHANGE_HPRIV | |
24654 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
24655 | ta T_CHANGE_NONHPRIV | |
24656 | ! %l0 = 427dd2dfb69f4721 | |
24657 | setx 0x150b41f045c90c9f,%g7,%l0 ! %l0 = 150b41f045c90c9f | |
24658 | ! %l1 = 785f6817d8df9347 | |
24659 | setx 0xb299b6d86f3c4094,%g7,%l1 ! %l1 = b299b6d86f3c4094 | |
24660 | ! Starting 10 instruction Load Burst | |
24661 | ! Mem[00000000100c1408] = 0000000000000000, %l7 = 0000000000000000 | |
24662 | ldxa [%i3+%o4]0x88,%l7 ! %l7 = 0000000000000000 | |
24663 | ||
24664 | ! Check Point 118 for processor 0 | |
24665 | ||
24666 | set p0_check_pt_data_118,%g4 | |
24667 | rd %ccr,%g5 ! %g5 = 44 | |
24668 | ldx [%g4+0x08],%g2 | |
24669 | cmp %l0,%g2 ! %l0 = 150b41f045c90c9f | |
24670 | bne %xcc,p0_reg_check_fail0 | |
24671 | mov 0xee0,%g1 | |
24672 | ldx [%g4+0x10],%g2 | |
24673 | cmp %l1,%g2 ! %l1 = b299b6d86f3c4094 | |
24674 | bne %xcc,p0_reg_check_fail1 | |
24675 | mov 0xee1,%g1 | |
24676 | ldx [%g4+0x18],%g2 | |
24677 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
24678 | bne %xcc,p0_reg_check_fail2 | |
24679 | mov 0xee2,%g1 | |
24680 | ldx [%g4+0x20],%g2 | |
24681 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
24682 | bne %xcc,p0_reg_check_fail3 | |
24683 | mov 0xee3,%g1 | |
24684 | ldx [%g4+0x28],%g2 | |
24685 | cmp %l4,%g2 ! %l4 = 0000000076000000 | |
24686 | bne %xcc,p0_reg_check_fail4 | |
24687 | mov 0xee4,%g1 | |
24688 | ldx [%g4+0x30],%g2 | |
24689 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
24690 | bne %xcc,p0_reg_check_fail5 | |
24691 | mov 0xee5,%g1 | |
24692 | ldx [%g4+0x38],%g2 | |
24693 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
24694 | bne %xcc,p0_reg_check_fail6 | |
24695 | mov 0xee6,%g1 | |
24696 | ldx [%g4+0x40],%g2 | |
24697 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
24698 | bne %xcc,p0_reg_check_fail7 | |
24699 | mov 0xee7,%g1 | |
24700 | ldx [%g4+0x48],%g3 | |
24701 | std %f0,[%g4] | |
24702 | ldx [%g4],%g2 | |
24703 | cmp %g3,%g2 ! %f0 = ffff0000 00000076 | |
24704 | bne %xcc,p0_freg_check_fail | |
24705 | mov 0xf00,%g1 | |
24706 | ldx [%g4+0x50],%g3 | |
24707 | std %f6,[%g4] | |
24708 | ldx [%g4],%g2 | |
24709 | cmp %g3,%g2 ! %f6 = 00000000 000000ff | |
24710 | bne %xcc,p0_freg_check_fail | |
24711 | mov 0xf06,%g1 | |
24712 | ldx [%g4+0x58],%g3 | |
24713 | std %f8,[%g4] | |
24714 | ldx [%g4],%g2 | |
24715 | cmp %g3,%g2 ! %f8 = 00000000 00000000 | |
24716 | bne %xcc,p0_freg_check_fail | |
24717 | mov 0xf08,%g1 | |
24718 | ldx [%g4+0x60],%g3 | |
24719 | std %f22,[%g4] | |
24720 | ldx [%g4],%g2 | |
24721 | cmp %g3,%g2 ! %f22 = 00000000 000000ff | |
24722 | bne %xcc,p0_freg_check_fail | |
24723 | mov 0xf22,%g1 | |
24724 | ldx [%g4+0x68],%g3 | |
24725 | std %f26,[%g4] | |
24726 | ldx [%g4],%g2 | |
24727 | cmp %g3,%g2 ! %f26 = 76ff411f 000000ff | |
24728 | bne %xcc,p0_freg_check_fail | |
24729 | mov 0xf26,%g1 | |
24730 | ||
24731 | ! Check Point 118 completed | |
24732 | ||
24733 | ||
24734 | p0_label_591: | |
24735 | ! Mem[0000000010081400] = 00000000, %l7 = 0000000000000000 | |
24736 | ldswa [%i2+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
24737 | ! Mem[0000000010081408] = 00000000, %f22 = 00000000 | |
24738 | lda [%i2+%o4]0x80,%f22 ! %f22 = 00000000 | |
24739 | ! Mem[0000000010141434] = 00000000, %f5 = 00000000 | |
24740 | ld [%i5+0x034],%f5 ! %f5 = 00000000 | |
24741 | ! Mem[0000000010101410] = 00000000, %l4 = 0000000076000000 | |
24742 | lduba [%i4+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
24743 | ! Mem[0000000030081408] = 00000000, %l1 = b299b6d86f3c4094 | |
24744 | ldsba [%i2+%o4]0x89,%l1 ! %l1 = 0000000000000000 | |
24745 | ! Mem[0000000010141410] = 76000000, %l5 = 0000000000000000 | |
24746 | ldub [%i5+%o5],%l5 ! %l5 = 0000000000000076 | |
24747 | ! Mem[00000000100c1410] = 00000000, %l3 = 00000000000000ff | |
24748 | lduba [%i3+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
24749 | ! Mem[00000000201c0000] = ff009457, %l1 = 0000000000000000 | |
24750 | lduha [%o0+0x000]%asi,%l1 ! %l1 = 000000000000ff00 | |
24751 | ! Mem[0000000030041408] = ff000000, %l6 = 00000000000000ff | |
24752 | ldsba [%i1+%o4]0x81,%l6 ! %l6 = ffffffffffffffff | |
24753 | ! Starting 10 instruction Store Burst | |
24754 | ! %f26 = 76ff411f 000000ff, %l0 = 150b41f045c90c9f | |
24755 | ! Mem[0000000010001438] = 0000ffff00000076 | |
24756 | add %i0,0x038,%g1 | |
24757 | stda %f26,[%g1+%l0]ASI_PST8_PL ! Mem[0000000010001438] = ff0000001f000076 | |
24758 | ||
24759 | p0_label_592: | |
24760 | ! %f16 = ffff0000 00000000, Mem[0000000030081408] = 00000000 00000000 | |
24761 | stda %f16,[%i2+%o4]0x81 ! Mem[0000000030081408] = ffff0000 00000000 | |
24762 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000030041400] = 00000000 ff000000 | |
24763 | stda %l2,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00000000 00000000 | |
24764 | ! Mem[0000000030081408] = ffff0000, %l7 = 0000000000000000 | |
24765 | ldstuba [%i2+%o4]0x81,%l7 ! %l7 = 000000ff000000ff | |
24766 | ! Mem[0000000010101400] = ffffff00, %l7 = 00000000000000ff | |
24767 | ldstuba [%i4+%g0]0x88,%l7 ! %l7 = 00000000000000ff | |
24768 | ! %l6 = ffffffffffffffff, Mem[0000000010041419] = 00000000 | |
24769 | stb %l6,[%i1+0x019] ! Mem[0000000010041418] = 00ff0000 | |
24770 | ! %f0 = ffff0000 00000076 ffff0000 00000076 | |
24771 | ! %f4 = 00000000 00000000 00000000 000000ff | |
24772 | ! %f8 = 00000000 00000000 0000ffff 00000000 | |
24773 | ! %f12 = ffffffff 00000000 00000000 00000000 | |
24774 | stda %f0,[%i3]ASI_BLK_SL ! Block Store to 00000000300c1400 | |
24775 | membar #Sync ! Added by membar checker (99) | |
24776 | ! Mem[00000000300c1400] = 00000076, %l1 = 000000000000ff00 | |
24777 | swapa [%i3+%g0]0x89,%l1 ! %l1 = 0000000000000076 | |
24778 | ! Mem[0000000010101410] = 00000000, %l5 = 0000000000000076 | |
24779 | ldstuba [%i4+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
24780 | ! Mem[0000000030001400] = 000000ff, %l6 = ffffffffffffffff | |
24781 | swapa [%i0+%g0]0x89,%l6 ! %l6 = 00000000000000ff | |
24782 | ! Starting 10 instruction Load Burst | |
24783 | ! Mem[0000000010101410] = ff00000000000000, %f14 = 00000000 00000000 | |
24784 | ldda [%i4+%o5]0x80,%f14 ! %f14 = ff000000 00000000 | |
24785 | ||
24786 | p0_label_593: | |
24787 | ! Mem[0000000030181410] = 000000ff, %l0 = 150b41f045c90c9f | |
24788 | lduwa [%i6+%o5]0x89,%l0 ! %l0 = 00000000000000ff | |
24789 | ! Mem[0000000010141408] = 00000000000000ff, %f0 = ffff0000 00000076 | |
24790 | ldda [%i5+%o4]0x88,%f0 ! %f0 = 00000000 000000ff | |
24791 | ! Mem[0000000010141408] = 00000000 000000ff, %l0 = 000000ff, %l1 = 00000076 | |
24792 | ldda [%i5+%o4]0x88,%l0 ! %l0 = 00000000000000ff 0000000000000000 | |
24793 | ! Mem[0000000030141410] = ff000000, %l4 = 0000000000000000 | |
24794 | ldswa [%i5+%o5]0x81,%l4 ! %l4 = ffffffffff000000 | |
24795 | ! Mem[0000000010081418] = 000000c6 ffff0000, %l4 = ff000000, %l5 = 00000000 | |
24796 | ldda [%i2+0x018]%asi,%l4 ! %l4 = 00000000000000c6 00000000ffff0000 | |
24797 | ! Mem[0000000020800000] = 00008470, %l0 = 00000000000000ff | |
24798 | ldsha [%o1+0x000]%asi,%l0 ! %l0 = 0000000000000000 | |
24799 | ! Mem[0000000030101408] = 00009c9c, %l4 = 00000000000000c6 | |
24800 | ldsba [%i4+%o4]0x81,%l4 ! %l4 = 0000000000000000 | |
24801 | ! Mem[0000000010001410] = 00000000, %l1 = 0000000000000000 | |
24802 | lduba [%i0+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
24803 | ! Mem[0000000030181408] = 000079ff, %l0 = 0000000000000000 | |
24804 | lduha [%i6+%o4]0x89,%l0 ! %l0 = 00000000000079ff | |
24805 | ! Starting 10 instruction Store Burst | |
24806 | ! %f14 = ff000000 00000000, Mem[0000000030141400] = 00000000 ffff0000 | |
24807 | stda %f14,[%i5+%g0]0x89 ! Mem[0000000030141400] = ff000000 00000000 | |
24808 | ||
24809 | p0_label_594: | |
24810 | ! %l3 = 0000000000000000, Mem[0000000010081400] = 00000000 | |
24811 | stwa %l3,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 | |
24812 | ! Mem[0000000010001410] = 00000000, %l1 = 0000000000000000 | |
24813 | ldstuba [%i0+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
24814 | ! %f20 = 00000000 000000ff, %l5 = 00000000ffff0000 | |
24815 | ! Mem[0000000010181400] = ff0012f300009400 | |
24816 | stda %f20,[%i6+%l5]ASI_PST8_P ! Mem[0000000010181400] = ff0012f300009400 | |
24817 | ! Mem[00000000218000c1] = 00008d82, %l3 = 0000000000000000 | |
24818 | ldstuba [%o3+0x0c1]%asi,%l3 ! %l3 = 00000000000000ff | |
24819 | ! %l0 = 00000000000079ff, Mem[000000001004140c] = 0000ffff | |
24820 | sth %l0,[%i1+0x00c] ! Mem[000000001004140c] = 79ffffff | |
24821 | ! %f22 = 00000000 000000ff, %l4 = 0000000000000000 | |
24822 | ! Mem[0000000010041420] = ff0000ff00000000 | |
24823 | add %i1,0x020,%g1 | |
24824 | stda %f22,[%g1+%l4]ASI_PST8_P ! Mem[0000000010041420] = ff0000ff00000000 | |
24825 | ! Mem[00000000300c1400] = 00ff0000, %l7 = 0000000000000000 | |
24826 | swapa [%i3+%g0]0x81,%l7 ! %l7 = 0000000000ff0000 | |
24827 | ! %l0 = 00000000000079ff, Mem[00000000100c142c] = 000000ff, %asi = 80 | |
24828 | stwa %l0,[%i3+0x02c]%asi ! Mem[00000000100c142c] = 000079ff | |
24829 | ! Mem[0000000030081410] = 00000000, %l6 = 00000000000000ff | |
24830 | ldstuba [%i2+%o5]0x81,%l6 ! %l6 = 00000000000000ff | |
24831 | ! Starting 10 instruction Load Burst | |
24832 | ! Mem[0000000030041408] = ff000000, %l0 = 00000000000079ff | |
24833 | lduba [%i1+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
24834 | ||
24835 | p0_label_595: | |
24836 | ! Mem[0000000010181424] = 00000000, %f17 = 00000000 | |
24837 | ld [%i6+0x024],%f17 ! %f17 = 00000000 | |
24838 | ! Mem[0000000030101410] = 00000000, %l7 = 0000000000ff0000 | |
24839 | lduha [%i4+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
24840 | ! Mem[00000000100c141c] = ffffffff, %l0 = 00000000000000ff | |
24841 | ldsha [%i3+0x01c]%asi,%l0 ! %l0 = ffffffffffffffff | |
24842 | ! Mem[0000000010001408] = 00000003, %l6 = 0000000000000000 | |
24843 | lduba [%i0+%o4]0x80,%l6 ! %l6 = 0000000000000000 | |
24844 | ! Mem[00000000300c1408] = 76000000, %l4 = 0000000000000000 | |
24845 | ldswa [%i3+%o4]0x81,%l4 ! %l4 = 0000000076000000 | |
24846 | ! Mem[0000000030141410] = 00000000000000ff, %f6 = 00000000 000000ff | |
24847 | ldda [%i5+%o5]0x89,%f6 ! %f6 = 00000000 000000ff | |
24848 | ! Mem[00000000218000c0] = 00ff8d82, %l4 = 0000000076000000 | |
24849 | ldsba [%o3+0x0c0]%asi,%l4 ! %l4 = 0000000000000000 | |
24850 | ! Mem[0000000010041430] = ff000000 00000000, %l4 = 00000000, %l5 = ffff0000 | |
24851 | ldda [%i1+0x030]%asi,%l4 ! %l4 = 00000000ff000000 0000000000000000 | |
24852 | ! Mem[0000000010081410] = 000000ff, %l0 = ffffffffffffffff | |
24853 | lduba [%i2+%o5]0x88,%l0 ! %l0 = 00000000000000ff | |
24854 | ! Starting 10 instruction Store Burst | |
24855 | ! Mem[0000000030101410] = 00000000, %l4 = 00000000ff000000 | |
24856 | swapa [%i4+%o5]0x81,%l4 ! %l4 = 0000000000000000 | |
24857 | ||
24858 | ! Check Point 119 for processor 0 | |
24859 | ||
24860 | set p0_check_pt_data_119,%g4 | |
24861 | rd %ccr,%g5 ! %g5 = 44 | |
24862 | ldx [%g4+0x08],%g2 | |
24863 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
24864 | bne %xcc,p0_reg_check_fail0 | |
24865 | mov 0xee0,%g1 | |
24866 | ldx [%g4+0x10],%g2 | |
24867 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
24868 | bne %xcc,p0_reg_check_fail1 | |
24869 | mov 0xee1,%g1 | |
24870 | ldx [%g4+0x18],%g2 | |
24871 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
24872 | bne %xcc,p0_reg_check_fail3 | |
24873 | mov 0xee3,%g1 | |
24874 | ldx [%g4+0x20],%g2 | |
24875 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
24876 | bne %xcc,p0_reg_check_fail4 | |
24877 | mov 0xee4,%g1 | |
24878 | ldx [%g4+0x28],%g2 | |
24879 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
24880 | bne %xcc,p0_reg_check_fail5 | |
24881 | mov 0xee5,%g1 | |
24882 | ldx [%g4+0x30],%g2 | |
24883 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
24884 | bne %xcc,p0_reg_check_fail6 | |
24885 | mov 0xee6,%g1 | |
24886 | ldx [%g4+0x38],%g2 | |
24887 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
24888 | bne %xcc,p0_reg_check_fail7 | |
24889 | mov 0xee7,%g1 | |
24890 | ldx [%g4+0x40],%g3 | |
24891 | std %f0,[%g4] | |
24892 | ldx [%g4],%g2 | |
24893 | cmp %g3,%g2 ! %f0 = 00000000 000000ff | |
24894 | bne %xcc,p0_freg_check_fail | |
24895 | mov 0xf00,%g1 | |
24896 | ldx [%g4+0x48],%g3 | |
24897 | std %f4,[%g4] | |
24898 | ldx [%g4],%g2 | |
24899 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
24900 | bne %xcc,p0_freg_check_fail | |
24901 | mov 0xf04,%g1 | |
24902 | ldx [%g4+0x50],%g3 | |
24903 | std %f6,[%g4] | |
24904 | ldx [%g4],%g2 | |
24905 | cmp %g3,%g2 ! %f6 = 00000000 000000ff | |
24906 | bne %xcc,p0_freg_check_fail | |
24907 | mov 0xf06,%g1 | |
24908 | ldx [%g4+0x58],%g3 | |
24909 | std %f14,[%g4] | |
24910 | ldx [%g4],%g2 | |
24911 | cmp %g3,%g2 ! %f14 = ff000000 00000000 | |
24912 | bne %xcc,p0_freg_check_fail | |
24913 | mov 0xf14,%g1 | |
24914 | ldx [%g4+0x60],%g3 | |
24915 | std %f16,[%g4] | |
24916 | ldx [%g4],%g2 | |
24917 | cmp %g3,%g2 ! %f16 = ffff0000 00000000 | |
24918 | bne %xcc,p0_freg_check_fail | |
24919 | mov 0xf16,%g1 | |
24920 | ldx [%g4+0x68],%g3 | |
24921 | std %f22,[%g4] | |
24922 | ldx [%g4],%g2 | |
24923 | cmp %g3,%g2 ! %f22 = 00000000 000000ff | |
24924 | bne %xcc,p0_freg_check_fail | |
24925 | mov 0xf22,%g1 | |
24926 | ||
24927 | ! Check Point 119 completed | |
24928 | ||
24929 | ||
24930 | p0_label_596: | |
24931 | ! Mem[0000000030181410] = ff000000, %l2 = 0000000000000000 | |
24932 | swapa [%i6+%o5]0x81,%l2 ! %l2 = 00000000ff000000 | |
24933 | ! %f30 = 10ac7b59, Mem[0000000030041410] = 00000000 | |
24934 | sta %f30,[%i1+%o5]0x89 ! Mem[0000000030041410] = 10ac7b59 | |
24935 | ! %l0 = 000000ff, %l1 = 00000000, Mem[0000000010141410] = 76000000 0000ffff | |
24936 | stda %l0,[%i5+%o5]0x80 ! Mem[0000000010141410] = 000000ff 00000000 | |
24937 | ! %l5 = 0000000000000000, Mem[0000000030101410] = ff000000 | |
24938 | stba %l5,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00000000 | |
24939 | ! %l7 = 0000000000000000, Mem[0000000010101410] = 000000ff | |
24940 | stha %l7,[%i4+%o5]0x88 ! Mem[0000000010101410] = 00000000 | |
24941 | ! %f0 = 00000000 000000ff, %l7 = 0000000000000000 | |
24942 | ! Mem[0000000010081430] = 9d3d79ff00000000 | |
24943 | add %i2,0x030,%g1 | |
24944 | stda %f0,[%g1+%l7]ASI_PST16_P ! Mem[0000000010081430] = 9d3d79ff00000000 | |
24945 | ! %l7 = 0000000000000000, Mem[00000000100c143c] = 0000ffff | |
24946 | stw %l7,[%i3+0x03c] ! Mem[00000000100c143c] = 00000000 | |
24947 | ! %l1 = 0000000000000000, Mem[0000000010001400] = ff00000000000000 | |
24948 | stxa %l1,[%i0+%g0]0x80 ! Mem[0000000010001400] = 0000000000000000 | |
24949 | ! %l1 = 0000000000000000, Mem[0000000010141410] = 000000ff | |
24950 | stha %l1,[%i5+%o5]0x80 ! Mem[0000000010141410] = 000000ff | |
24951 | ! Starting 10 instruction Load Burst | |
24952 | ! %f23 = 000000ff, Mem[0000000010041420] = ff0000ff | |
24953 | sta %f23,[%i1+0x020]%asi ! Mem[0000000010041420] = 000000ff | |
24954 | ||
24955 | p0_label_597: | |
24956 | ! Mem[0000000010041400] = ff000000, %l6 = 0000000000000000 | |
24957 | lduwa [%i1+%g0]0x80,%l6 ! %l6 = 00000000ff000000 | |
24958 | ! Mem[0000000020800040] = ffff7379, %l1 = 0000000000000000 | |
24959 | ldsha [%o1+0x040]%asi,%l1 ! %l1 = ffffffffffffffff | |
24960 | membar #Sync ! Added by membar checker (100) | |
24961 | ! Mem[0000000010101400] = ffffffff 000000ff 0000ffff 00009c15 | |
24962 | ! Mem[0000000010101410] = 00000000 00000000 9c156421 76ff411f | |
24963 | ! Mem[0000000010101420] = c7883403 00ff0000 00000000 00000003 | |
24964 | ! Mem[0000000010101430] = 00ff0000 000000ff 00000000 00000000 | |
24965 | ldda [%i4]ASI_BLK_AIUPL,%f0 ! Block Load from 0000000010101400 | |
24966 | ! Mem[0000000021800000] = ff8f13a3, %l4 = 0000000000000000 | |
24967 | ldsba [%o3+0x001]%asi,%l4 ! %l4 = ffffffffffffff8f | |
24968 | ! Mem[00000000300c1408] = 76000000, %l7 = 0000000000000000 | |
24969 | ldsha [%i3+%o4]0x81,%l7 ! %l7 = 0000000000007600 | |
24970 | ! Mem[0000000010181400] = f31200ff, %f27 = 000000ff | |
24971 | lda [%i6+%g0]0x88,%f27 ! %f27 = f31200ff | |
24972 | ! Mem[0000000010001410] = 000000ff, %l4 = ffffffffffffff8f | |
24973 | lduba [%i0+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
24974 | ! Mem[0000000010141400] = 00000000ff0000ff, %f28 = 00940000 000000ff | |
24975 | ldda [%i5+%g0]0x88,%f28 ! %f28 = 00000000 ff0000ff | |
24976 | ! Mem[0000000010141410] = ff000000, %l1 = ffffffffffffffff | |
24977 | ldsba [%i5+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
24978 | ! Starting 10 instruction Store Burst | |
24979 | ! %l4 = 00000000000000ff, Mem[0000000010181410] = 00000000 | |
24980 | stwa %l4,[%i6+%o5]0x88 ! Mem[0000000010181410] = 000000ff | |
24981 | ||
24982 | p0_label_598: | |
24983 | ! %f18 = ffffffff, Mem[0000000010041408] = 00000000 | |
24984 | sta %f18,[%i1+%o4]0x80 ! Mem[0000000010041408] = ffffffff | |
24985 | ! %l6 = ff000000, %l7 = 00007600, Mem[0000000030181408] = 000079ff 00000000 | |
24986 | stda %l6,[%i6+%o4]0x89 ! Mem[0000000030181408] = ff000000 00007600 | |
24987 | membar #Sync ! Added by membar checker (101) | |
24988 | ! %l4 = 00000000000000ff, Mem[0000000010101410] = 0000000000000000 | |
24989 | stxa %l4,[%i4+%o5]0x88 ! Mem[0000000010101410] = 00000000000000ff | |
24990 | ! %f17 = 00000000, Mem[0000000010101400] = ffffffff | |
24991 | sta %f17,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 | |
24992 | ! Mem[0000000021800041] = ff9c1df3, %l4 = 00000000000000ff | |
24993 | ldstuba [%o3+0x041]%asi,%l4 ! %l4 = 0000009c000000ff | |
24994 | ! Mem[0000000010101400] = 00000000, %l0 = 00000000000000ff | |
24995 | swapa [%i4+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
24996 | ! %f0 = ff000000 ffffffff 159c0000 ffff0000 | |
24997 | ! %f4 = 00000000 00000000 1f41ff76 2164159c | |
24998 | ! %f8 = 0000ff00 033488c7 03000000 00000000 | |
24999 | ! %f12 = ff000000 0000ff00 00000000 00000000 | |
25000 | stda %f0,[%i2]ASI_BLK_PL ! Block Store to 0000000010081400 | |
25001 | ! Mem[00000000100c1400] = 00000000, %l2 = 00000000ff000000 | |
25002 | ldstuba [%i3+%g0]0x80,%l2 ! %l2 = 00000000000000ff | |
25003 | ! %l1 = 0000000000000000, Mem[0000000010101402] = 000000ff | |
25004 | sth %l1,[%i4+0x002] ! Mem[0000000010101400] = 00000000 | |
25005 | ! Starting 10 instruction Load Burst | |
25006 | ! Mem[00000000100c1410] = 00000000, %l2 = 0000000000000000 | |
25007 | lduwa [%i3+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
25008 | ||
25009 | p0_label_599: | |
25010 | ! Mem[0000000010041430] = ff000000 00000000, %l6 = ff000000, %l7 = 00007600 | |
25011 | ldda [%i1+0x030]%asi,%l6 ! %l6 = 00000000ff000000 0000000000000000 | |
25012 | ! Mem[0000000030001408] = 0000000000000003, %l4 = 000000000000009c | |
25013 | ldxa [%i0+%o4]0x89,%l4 ! %l4 = 0000000000000003 | |
25014 | ! Mem[00000000300c1408] = 00000076, %l3 = 0000000000000000 | |
25015 | lduha [%i3+%o4]0x89,%l3 ! %l3 = 0000000000000076 | |
25016 | ! Mem[00000000100c1400] = 10ac7b59000000ff, %l2 = 0000000000000000 | |
25017 | ldxa [%i3+%g0]0x88,%l2 ! %l2 = 10ac7b59000000ff | |
25018 | ! Mem[00000000100c1428] = ffc4c676 000079ff, %l4 = 00000003, %l5 = 00000000 | |
25019 | ldda [%i3+0x028]%asi,%l4 ! %l4 = 00000000ffc4c676 00000000000079ff | |
25020 | ! Mem[0000000030141408] = 000000ff, %f28 = 00000000 | |
25021 | lda [%i5+%o4]0x89,%f28 ! %f28 = 000000ff | |
25022 | ! Mem[0000000030101410] = 00000000, %l2 = 10ac7b59000000ff | |
25023 | lduba [%i4+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
25024 | ! Mem[0000000010041408] = ffffffff, %l2 = 0000000000000000 | |
25025 | lduha [%i1+%o4]0x80,%l2 ! %l2 = 000000000000ffff | |
25026 | ! Mem[0000000030181410] = 0000000000000000, %l7 = 0000000000000000 | |
25027 | ldxa [%i6+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
25028 | ! Starting 10 instruction Store Burst | |
25029 | ! Mem[00000000300c1408] = 76000000, %l2 = 000000000000ffff | |
25030 | ldstuba [%i3+%o4]0x81,%l2 ! %l2 = 00000076000000ff | |
25031 | ||
25032 | p0_label_600: | |
25033 | ! %f24 = ffff0000, Mem[0000000030141400] = 00000000 | |
25034 | sta %f24,[%i5+%g0]0x89 ! Mem[0000000030141400] = ffff0000 | |
25035 | ! %l0 = 0000000000000000, Mem[0000000010041408] = ffffffff | |
25036 | stba %l0,[%i1+%o4]0x88 ! Mem[0000000010041408] = ffffff00 | |
25037 | ! %l1 = 0000000000000000, Mem[0000000010081400] = ff000000ffffffff | |
25038 | stxa %l1,[%i2+%g0]0x88 ! Mem[0000000010081400] = 0000000000000000 | |
25039 | ! Mem[0000000010041400] = 000000ff, %l0 = 0000000000000000 | |
25040 | swapa [%i1+%g0]0x88,%l0 ! %l0 = 00000000000000ff | |
25041 | ! %f28 = 000000ff, Mem[0000000030041410] = 597bac10 | |
25042 | sta %f28,[%i1+%o5]0x81 ! Mem[0000000030041410] = 000000ff | |
25043 | ! %l2 = 0000000000000076, Mem[0000000010041400] = 00000000 | |
25044 | stha %l2,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00000076 | |
25045 | ! %f16 = ffff0000 00000000, Mem[0000000010101408] = 0000ffff 00009c15 | |
25046 | std %f16,[%i4+%o4] ! Mem[0000000010101408] = ffff0000 00000000 | |
25047 | ! %l3 = 0000000000000076, Mem[00000000100c1400] = 000000ff | |
25048 | stha %l3,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 00000076 | |
25049 | ! %f28 = 000000ff, Mem[0000000010001400] = 00000000 | |
25050 | sta %f28,[%i0+%g0]0x88 ! Mem[0000000010001400] = 000000ff | |
25051 | ! Starting 10 instruction Load Burst | |
25052 | ! Mem[0000000010041424] = 00000000, %l6 = 00000000ff000000 | |
25053 | ldsh [%i1+0x026],%l6 ! %l6 = 0000000000000000 | |
25054 | ||
25055 | ! Check Point 120 for processor 0 | |
25056 | ||
25057 | set p0_check_pt_data_120,%g4 | |
25058 | rd %ccr,%g5 ! %g5 = 44 | |
25059 | ldx [%g4+0x08],%g2 | |
25060 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
25061 | bne %xcc,p0_reg_check_fail1 | |
25062 | mov 0xee1,%g1 | |
25063 | ldx [%g4+0x10],%g2 | |
25064 | cmp %l2,%g2 ! %l2 = 0000000000000076 | |
25065 | bne %xcc,p0_reg_check_fail2 | |
25066 | mov 0xee2,%g1 | |
25067 | ldx [%g4+0x18],%g2 | |
25068 | cmp %l3,%g2 ! %l3 = 0000000000000076 | |
25069 | bne %xcc,p0_reg_check_fail3 | |
25070 | mov 0xee3,%g1 | |
25071 | ldx [%g4+0x20],%g2 | |
25072 | cmp %l4,%g2 ! %l4 = 00000000ffc4c676 | |
25073 | bne %xcc,p0_reg_check_fail4 | |
25074 | mov 0xee4,%g1 | |
25075 | ldx [%g4+0x28],%g2 | |
25076 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
25077 | bne %xcc,p0_reg_check_fail6 | |
25078 | mov 0xee6,%g1 | |
25079 | ldx [%g4+0x30],%g2 | |
25080 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
25081 | bne %xcc,p0_reg_check_fail7 | |
25082 | mov 0xee7,%g1 | |
25083 | ldx [%g4+0x38],%g3 | |
25084 | std %f0,[%g4] | |
25085 | ldx [%g4],%g2 | |
25086 | cmp %g3,%g2 ! %f0 = ff000000 ffffffff | |
25087 | bne %xcc,p0_freg_check_fail | |
25088 | mov 0xf00,%g1 | |
25089 | ldx [%g4+0x40],%g3 | |
25090 | std %f2,[%g4] | |
25091 | ldx [%g4],%g2 | |
25092 | cmp %g3,%g2 ! %f2 = 159c0000 ffff0000 | |
25093 | bne %xcc,p0_freg_check_fail | |
25094 | mov 0xf02,%g1 | |
25095 | ldx [%g4+0x48],%g3 | |
25096 | std %f4,[%g4] | |
25097 | ldx [%g4],%g2 | |
25098 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
25099 | bne %xcc,p0_freg_check_fail | |
25100 | mov 0xf04,%g1 | |
25101 | ldx [%g4+0x50],%g3 | |
25102 | std %f6,[%g4] | |
25103 | ldx [%g4],%g2 | |
25104 | cmp %g3,%g2 ! %f6 = 1f41ff76 2164159c | |
25105 | bne %xcc,p0_freg_check_fail | |
25106 | mov 0xf06,%g1 | |
25107 | ldx [%g4+0x58],%g3 | |
25108 | std %f8,[%g4] | |
25109 | ldx [%g4],%g2 | |
25110 | cmp %g3,%g2 ! %f8 = 0000ff00 033488c7 | |
25111 | bne %xcc,p0_freg_check_fail | |
25112 | mov 0xf08,%g1 | |
25113 | ldx [%g4+0x60],%g3 | |
25114 | std %f10,[%g4] | |
25115 | ldx [%g4],%g2 | |
25116 | cmp %g3,%g2 ! %f10 = 03000000 00000000 | |
25117 | bne %xcc,p0_freg_check_fail | |
25118 | mov 0xf10,%g1 | |
25119 | ldx [%g4+0x68],%g3 | |
25120 | std %f12,[%g4] | |
25121 | ldx [%g4],%g2 | |
25122 | cmp %g3,%g2 ! %f12 = ff000000 0000ff00 | |
25123 | bne %xcc,p0_freg_check_fail | |
25124 | mov 0xf12,%g1 | |
25125 | ldx [%g4+0x70],%g3 | |
25126 | std %f14,[%g4] | |
25127 | ldx [%g4],%g2 | |
25128 | cmp %g3,%g2 ! %f14 = 00000000 00000000 | |
25129 | bne %xcc,p0_freg_check_fail | |
25130 | mov 0xf14,%g1 | |
25131 | ldx [%g4+0x78],%g3 | |
25132 | std %f26,[%g4] | |
25133 | ldx [%g4],%g2 | |
25134 | cmp %g3,%g2 ! %f26 = 76ff411f f31200ff | |
25135 | bne %xcc,p0_freg_check_fail | |
25136 | mov 0xf26,%g1 | |
25137 | ldx [%g4+0x80],%g3 | |
25138 | std %f28,[%g4] | |
25139 | ldx [%g4],%g2 | |
25140 | cmp %g3,%g2 ! %f28 = 000000ff ff0000ff | |
25141 | bne %xcc,p0_freg_check_fail | |
25142 | mov 0xf28,%g1 | |
25143 | ||
25144 | ! Check Point 120 completed | |
25145 | ||
25146 | ||
25147 | p0_label_601: | |
25148 | ! Mem[0000000010041424] = 00000000, %l0 = 00000000000000ff | |
25149 | ldsba [%i1+0x025]%asi,%l0 ! %l0 = 0000000000000000 | |
25150 | ! Mem[0000000030181400] = 00000000 ff000000, %l2 = 00000076, %l3 = 00000076 | |
25151 | ldda [%i6+%g0]0x89,%l2 ! %l2 = 00000000ff000000 0000000000000000 | |
25152 | ! Mem[0000000030081408] = ffff0000 00000000, %l0 = 00000000, %l1 = 00000000 | |
25153 | ldda [%i2+%o4]0x81,%l0 ! %l0 = 00000000ffff0000 0000000000000000 | |
25154 | ! Mem[0000000030041408] = 00000000000000ff, %l2 = 00000000ff000000 | |
25155 | ldxa [%i1+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
25156 | ! Mem[0000000030041408] = ff000000, %l4 = 00000000ffc4c676 | |
25157 | lduwa [%i1+%o4]0x81,%l4 ! %l4 = 00000000ff000000 | |
25158 | ! Mem[0000000030101400] = 76ff411f, %l3 = 0000000000000000 | |
25159 | lduwa [%i4+%g0]0x81,%l3 ! %l3 = 0000000076ff411f | |
25160 | membar #Sync ! Added by membar checker (102) | |
25161 | ! Mem[0000000010081400] = 00000000, %f9 = 033488c7 | |
25162 | lda [%i2+%g0]0x80,%f9 ! %f9 = 00000000 | |
25163 | ! Mem[00000000100c1434] = 0000ffff, %l4 = 00000000ff000000 | |
25164 | ldsh [%i3+0x034],%l4 ! %l4 = 0000000000000000 | |
25165 | ! Mem[0000000030001400] = ffffffff, %l7 = 0000000000000000 | |
25166 | lduwa [%i0+%g0]0x89,%l7 ! %l7 = 00000000ffffffff | |
25167 | ! Starting 10 instruction Store Burst | |
25168 | ! %l4 = 00000000, %l5 = 000079ff, Mem[0000000030001400] = ffffffff 00940000 | |
25169 | stda %l4,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00000000 000079ff | |
25170 | ||
25171 | p0_label_602: | |
25172 | ! Mem[0000000030041410] = 000000ff, %l4 = 0000000000000000 | |
25173 | swapa [%i1+%o5]0x81,%l4 ! %l4 = 00000000000000ff | |
25174 | ! %f24 = ffff0000 00000076, Mem[0000000010041400] = 00000076 ffff0000 | |
25175 | stda %f24,[%i1+%g0]0x88 ! Mem[0000000010041400] = ffff0000 00000076 | |
25176 | ! Mem[0000000030181408] = 000000ff, %l6 = 0000000000000000 | |
25177 | swapa [%i6+%o4]0x81,%l6 ! %l6 = 00000000000000ff | |
25178 | ! %l4 = 00000000000000ff, Mem[0000000010141410] = ff000000 | |
25179 | stha %l4,[%i5+%o5]0x88 ! Mem[0000000010141410] = ff0000ff | |
25180 | ! %l4 = 000000ff, %l5 = 000079ff, Mem[0000000010001400] = 000000ff 00000000 | |
25181 | stda %l4,[%i0+%g0]0x88 ! Mem[0000000010001400] = 000000ff 000079ff | |
25182 | ! Mem[0000000030101410] = 00000000, %l1 = 0000000000000000 | |
25183 | ldstuba [%i4+%o5]0x81,%l1 ! %l1 = 00000000000000ff | |
25184 | ! %f14 = 00000000 00000000, %l0 = 00000000ffff0000 | |
25185 | ! Mem[0000000010081420] = c788340300ff0000 | |
25186 | add %i2,0x020,%g1 | |
25187 | stda %f14,[%g1+%l0]ASI_PST32_P ! Mem[0000000010081420] = c788340300ff0000 | |
25188 | ! %f4 = 00000000 00000000, Mem[0000000030181410] = 00000000 00000000 | |
25189 | stda %f4 ,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 00000000 | |
25190 | ! %f26 = 76ff411f f31200ff, Mem[0000000030101410] = ff000000 00007957 | |
25191 | stda %f26,[%i4+%o5]0x81 ! Mem[0000000030101410] = 76ff411f f31200ff | |
25192 | ! Starting 10 instruction Load Burst | |
25193 | ! Mem[00000000218001c0] = 9c9c2a00, %l4 = 00000000000000ff | |
25194 | lduh [%o3+0x1c0],%l4 ! %l4 = 0000000000009c9c | |
25195 | ||
25196 | p0_label_603: | |
25197 | ! Mem[0000000010141410] = ff0000ff, %f8 = 0000ff00 | |
25198 | lda [%i5+%o5]0x88,%f8 ! %f8 = ff0000ff | |
25199 | ! Mem[0000000030001400] = 000079ff00000000, %f6 = 1f41ff76 2164159c | |
25200 | ldda [%i0+%g0]0x89,%f6 ! %f6 = 000079ff 00000000 | |
25201 | ! Mem[0000000010181408] = 000000ff 00000000, %l0 = ffff0000, %l1 = 00000000 | |
25202 | ldda [%i6+%o4]0x80,%l0 ! %l0 = 00000000000000ff 0000000000000000 | |
25203 | ! Mem[00000000300c1410] = 00000000, %l1 = 0000000000000000 | |
25204 | ldsba [%i3+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
25205 | ! Mem[0000000010001408] = 00000003 ffffffff, %l6 = 000000ff, %l7 = ffffffff | |
25206 | ldda [%i0+%o4]0x80,%l6 ! %l6 = 0000000000000003 00000000ffffffff | |
25207 | ! Mem[0000000030141408] = ff000000, %l7 = 00000000ffffffff | |
25208 | lduba [%i5+%o4]0x81,%l7 ! %l7 = 00000000000000ff | |
25209 | ! Mem[0000000010001414] = 00000000, %l5 = 00000000000079ff | |
25210 | ldsh [%i0+0x014],%l5 ! %l5 = 0000000000000000 | |
25211 | ! Mem[00000000300c1408] = ff000000, %l6 = 0000000000000003 | |
25212 | ldswa [%i3+%o4]0x81,%l6 ! %l6 = ffffffffff000000 | |
25213 | ! Mem[0000000030181408] = 00000000, %l2 = 00000000000000ff | |
25214 | ldsba [%i6+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
25215 | ! Starting 10 instruction Store Burst | |
25216 | ! %l0 = 000000ff, %l1 = 00000000, Mem[0000000030001400] = 00000000 000079ff | |
25217 | stda %l0,[%i0+%g0]0x89 ! Mem[0000000030001400] = 000000ff 00000000 | |
25218 | ||
25219 | p0_label_604: | |
25220 | ! Mem[0000000030101400] = 1f41ff76, %l5 = 0000000000000000 | |
25221 | ldstuba [%i4+%g0]0x89,%l5 ! %l5 = 00000076000000ff | |
25222 | ! %l2 = 0000000000000000, Mem[0000000010141410] = ff0000ff00000000 | |
25223 | stxa %l2,[%i5+%o5]0x80 ! Mem[0000000010141410] = 0000000000000000 | |
25224 | ! %l1 = 0000000000000000, Mem[0000000010181410] = 000000ff | |
25225 | stba %l1,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000 | |
25226 | ! Mem[0000000030041408] = ff000000, %l7 = 00000000000000ff | |
25227 | swapa [%i1+%o4]0x81,%l7 ! %l7 = 00000000ff000000 | |
25228 | ! %l7 = 00000000ff000000, Mem[0000000010141408] = ff00000000000000 | |
25229 | stxa %l7,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000ff000000 | |
25230 | ! Mem[0000000010041400] = 76000000, %l7 = 00000000ff000000 | |
25231 | swapa [%i1+%g0]0x80,%l7 ! %l7 = 0000000076000000 | |
25232 | ! %f26 = 76ff411f f31200ff, Mem[0000000010041430] = ff000000 00000000 | |
25233 | stda %f26,[%i1+0x030]%asi ! Mem[0000000010041430] = 76ff411f f31200ff | |
25234 | ! %l3 = 0000000076ff411f, Mem[0000000030181410] = 00000000 | |
25235 | stha %l3,[%i6+%o5]0x81 ! Mem[0000000030181410] = 411f0000 | |
25236 | ! %f0 = ff000000 ffffffff 159c0000 ffff0000 | |
25237 | ! %f4 = 00000000 00000000 000079ff 00000000 | |
25238 | ! %f8 = ff0000ff 00000000 03000000 00000000 | |
25239 | ! %f12 = ff000000 0000ff00 00000000 00000000 | |
25240 | stda %f0,[%i0]ASI_BLK_AIUSL ! Block Store to 0000000030001400 | |
25241 | ! Starting 10 instruction Load Burst | |
25242 | ! Mem[0000000010181400] = f31200ff, %l2 = 0000000000000000 | |
25243 | lduba [%i6+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
25244 | ||
25245 | p0_label_605: | |
25246 | ! Mem[0000000010041410] = 030000ff, %l4 = 0000000000009c9c | |
25247 | lduba [%i1+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
25248 | ! Mem[0000000030101410] = 1f41ff76, %l2 = 00000000000000ff | |
25249 | ldswa [%i4+%o5]0x89,%l2 ! %l2 = 000000001f41ff76 | |
25250 | membar #Sync ! Added by membar checker (103) | |
25251 | ! Mem[0000000030001400] = ffffffff, %l3 = 0000000076ff411f | |
25252 | ldsba [%i0+%g0]0x81,%l3 ! %l3 = ffffffffffffffff | |
25253 | ! Mem[0000000030141400] = 0000ffff 000000ff ff000000 ffffffff | |
25254 | ! Mem[0000000030141410] = ff000000 00000000 fc734517 000000ff | |
25255 | ! Mem[0000000030141420] = 1f41ff76 2164159c ffffffff 79ff0000 | |
25256 | ! Mem[0000000030141430] = ff000000 00009400 7827da3e 597bac10 | |
25257 | ldda [%i5]ASI_BLK_S,%f0 ! Block Load from 0000000030141400 | |
25258 | ! Mem[00000000100c1430] = 76000000, %l1 = 0000000000000000 | |
25259 | lduw [%i3+0x030],%l1 ! %l1 = 0000000076000000 | |
25260 | ! Mem[0000000010141410] = 00000000, %l4 = 00000000000000ff | |
25261 | lduwa [%i5+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
25262 | ! Mem[0000000010101408] = 00000000 0000ffff, %l0 = 000000ff, %l1 = 76000000 | |
25263 | ldda [%i4+%o4]0x88,%l0 ! %l0 = 000000000000ffff 0000000000000000 | |
25264 | ! Mem[0000000030181408] = 00000000, %l7 = 0000000076000000 | |
25265 | lduha [%i6+%o4]0x81,%l7 ! %l7 = 0000000000000000 | |
25266 | ! Mem[00000000300c1408] = ff000000, %f21 = 000000ff | |
25267 | lda [%i3+%o4]0x81,%f21 ! %f21 = ff000000 | |
25268 | ! Starting 10 instruction Store Burst | |
25269 | ! %l4 = 0000000000000000, Mem[0000000010141430] = 0000000000000000, %asi = 80 | |
25270 | stxa %l4,[%i5+0x030]%asi ! Mem[0000000010141430] = 0000000000000000 | |
25271 | ||
25272 | ! Check Point 121 for processor 0 | |
25273 | ||
25274 | set p0_check_pt_data_121,%g4 | |
25275 | rd %ccr,%g5 ! %g5 = 44 | |
25276 | ldx [%g4+0x08],%g2 | |
25277 | cmp %l0,%g2 ! %l0 = 000000000000ffff | |
25278 | bne %xcc,p0_reg_check_fail0 | |
25279 | mov 0xee0,%g1 | |
25280 | ldx [%g4+0x10],%g2 | |
25281 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
25282 | bne %xcc,p0_reg_check_fail1 | |
25283 | mov 0xee1,%g1 | |
25284 | ldx [%g4+0x18],%g2 | |
25285 | cmp %l2,%g2 ! %l2 = 000000001f41ff76 | |
25286 | bne %xcc,p0_reg_check_fail2 | |
25287 | mov 0xee2,%g1 | |
25288 | ldx [%g4+0x20],%g2 | |
25289 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
25290 | bne %xcc,p0_reg_check_fail3 | |
25291 | mov 0xee3,%g1 | |
25292 | ldx [%g4+0x28],%g2 | |
25293 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
25294 | bne %xcc,p0_reg_check_fail4 | |
25295 | mov 0xee4,%g1 | |
25296 | ldx [%g4+0x30],%g2 | |
25297 | cmp %l5,%g2 ! %l5 = 0000000000000076 | |
25298 | bne %xcc,p0_reg_check_fail5 | |
25299 | mov 0xee5,%g1 | |
25300 | ldx [%g4+0x38],%g2 | |
25301 | cmp %l6,%g2 ! %l6 = ffffffffff000000 | |
25302 | bne %xcc,p0_reg_check_fail6 | |
25303 | mov 0xee6,%g1 | |
25304 | ldx [%g4+0x40],%g2 | |
25305 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
25306 | bne %xcc,p0_reg_check_fail7 | |
25307 | mov 0xee7,%g1 | |
25308 | ldx [%g4+0x48],%g3 | |
25309 | std %f0,[%g4] | |
25310 | ldx [%g4],%g2 | |
25311 | cmp %g3,%g2 ! %f0 = 0000ffff 000000ff | |
25312 | bne %xcc,p0_freg_check_fail | |
25313 | mov 0xf00,%g1 | |
25314 | ldx [%g4+0x50],%g3 | |
25315 | std %f2,[%g4] | |
25316 | ldx [%g4],%g2 | |
25317 | cmp %g3,%g2 ! %f2 = ff000000 ffffffff | |
25318 | bne %xcc,p0_freg_check_fail | |
25319 | mov 0xf02,%g1 | |
25320 | ldx [%g4+0x58],%g3 | |
25321 | std %f4,[%g4] | |
25322 | ldx [%g4],%g2 | |
25323 | cmp %g3,%g2 ! %f4 = ff000000 00000000 | |
25324 | bne %xcc,p0_freg_check_fail | |
25325 | mov 0xf04,%g1 | |
25326 | ldx [%g4+0x60],%g3 | |
25327 | std %f6,[%g4] | |
25328 | ldx [%g4],%g2 | |
25329 | cmp %g3,%g2 ! %f6 = fc734517 000000ff | |
25330 | bne %xcc,p0_freg_check_fail | |
25331 | mov 0xf06,%g1 | |
25332 | ldx [%g4+0x68],%g3 | |
25333 | std %f8,[%g4] | |
25334 | ldx [%g4],%g2 | |
25335 | cmp %g3,%g2 ! %f8 = 1f41ff76 2164159c | |
25336 | bne %xcc,p0_freg_check_fail | |
25337 | mov 0xf08,%g1 | |
25338 | ldx [%g4+0x70],%g3 | |
25339 | std %f10,[%g4] | |
25340 | ldx [%g4],%g2 | |
25341 | cmp %g3,%g2 ! %f10 = ffffffff 79ff0000 | |
25342 | bne %xcc,p0_freg_check_fail | |
25343 | mov 0xf10,%g1 | |
25344 | ldx [%g4+0x78],%g3 | |
25345 | std %f12,[%g4] | |
25346 | ldx [%g4],%g2 | |
25347 | cmp %g3,%g2 ! %f12 = ff000000 00009400 | |
25348 | bne %xcc,p0_freg_check_fail | |
25349 | mov 0xf12,%g1 | |
25350 | ldx [%g4+0x80],%g3 | |
25351 | std %f14,[%g4] | |
25352 | ldx [%g4],%g2 | |
25353 | cmp %g3,%g2 ! %f14 = 7827da3e 597bac10 | |
25354 | bne %xcc,p0_freg_check_fail | |
25355 | mov 0xf14,%g1 | |
25356 | ldx [%g4+0x88],%g3 | |
25357 | std %f20,[%g4] | |
25358 | ldx [%g4],%g2 | |
25359 | cmp %g3,%g2 ! %f20 = 00000000 ff000000 | |
25360 | bne %xcc,p0_freg_check_fail | |
25361 | mov 0xf20,%g1 | |
25362 | ||
25363 | ! Check Point 121 completed | |
25364 | ||
25365 | ||
25366 | p0_label_606: | |
25367 | ! %l1 = 0000000000000000, Mem[0000000030041410] = 0000000000000000 | |
25368 | stxa %l1,[%i1+%o5]0x89 ! Mem[0000000030041410] = 0000000000000000 | |
25369 | ! Mem[000000001000140d] = ffffffff, %l5 = 0000000000000076 | |
25370 | ldstuba [%i0+0x00d]%asi,%l5 ! %l5 = 000000ff000000ff | |
25371 | ! %f26 = 76ff411f f31200ff, Mem[0000000030041400] = 00000000 00000000 | |
25372 | stda %f26,[%i1+%g0]0x89 ! Mem[0000000030041400] = 76ff411f f31200ff | |
25373 | ! %f13 = 00009400, Mem[0000000010001408] = 03000000 | |
25374 | sta %f13,[%i0+%o4]0x88 ! Mem[0000000010001408] = 00009400 | |
25375 | ! Mem[0000000010001408] = 00940000, %l3 = ffffffffffffffff | |
25376 | swapa [%i0+%o4]0x80,%l3 ! %l3 = 0000000000940000 | |
25377 | ! Mem[00000000100c1400] = 00000076, %l7 = 0000000000000000 | |
25378 | ldstuba [%i3+%g0]0x88,%l7 ! %l7 = 00000076000000ff | |
25379 | ! Mem[0000000030101408] = 00009c9c, %l5 = 00000000000000ff | |
25380 | swapa [%i4+%o4]0x81,%l5 ! %l5 = 0000000000009c9c | |
25381 | ! %l1 = 0000000000000000, Mem[0000000010101408] = 0000ffff | |
25382 | stha %l1,[%i4+%o4]0x88 ! Mem[0000000010101408] = 00000000 | |
25383 | ! Mem[0000000010041410] = ff000003, %l6 = ffffffffff000000 | |
25384 | swapa [%i1+%o5]0x80,%l6 ! %l6 = 00000000ff000003 | |
25385 | ! Starting 10 instruction Load Burst | |
25386 | ! Mem[0000000030001410] = 00000000, %l5 = 0000000000009c9c | |
25387 | ldsha [%i0+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
25388 | ||
25389 | p0_label_607: | |
25390 | ! Mem[0000000010001408] = ffffffffffffffff, %l1 = 0000000000000000 | |
25391 | ldxa [%i0+%o4]0x80,%l1 ! %l1 = ffffffffffffffff | |
25392 | ! Mem[0000000010001410] = 000000ff, %l5 = 0000000000000000 | |
25393 | ldsba [%i0+%o5]0x88,%l5 ! %l5 = ffffffffffffffff | |
25394 | ! Mem[0000000030041410] = 00000000, %l7 = 0000000000000076 | |
25395 | ldswa [%i1+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
25396 | ! Mem[0000000030041408] = 000000ff, %l3 = 0000000000940000 | |
25397 | ldsba [%i1+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
25398 | ! Mem[0000000010001410] = ff000000 00000000, %l0 = 0000ffff, %l1 = ffffffff | |
25399 | ldda [%i0+%o5]0x80,%l0 ! %l0 = 00000000ff000000 0000000000000000 | |
25400 | ! Mem[0000000030181400] = ff000000, %l5 = ffffffffffffffff | |
25401 | ldswa [%i6+%g0]0x89,%l5 ! %l5 = ffffffffff000000 | |
25402 | ! Mem[0000000010141430] = 00000000, %l3 = 0000000000000000 | |
25403 | ldswa [%i5+0x030]%asi,%l3 ! %l3 = 0000000000000000 | |
25404 | ! Mem[0000000030141400] = 0000ffff000000ff, %l2 = 000000001f41ff76 | |
25405 | ldxa [%i5+%g0]0x81,%l2 ! %l2 = 0000ffff000000ff | |
25406 | ! Mem[0000000010041410] = ff00000000000000, %f14 = 7827da3e 597bac10 | |
25407 | ldda [%i1+%o5]0x80,%f14 ! %f14 = ff000000 00000000 | |
25408 | ! Starting 10 instruction Store Burst | |
25409 | ! Mem[0000000010181400] = 00940000 f31200ff, %l6 = ff000003, %l7 = 00000000 | |
25410 | ldda [%i6+%g0]0x88,%l6 ! %l6 = 00000000f31200ff 0000000000940000 | |
25411 | ||
25412 | p0_label_608: | |
25413 | ! %l4 = 0000000000000000, Mem[0000000030041400] = ff0012f31f41ff76 | |
25414 | stxa %l4,[%i1+%g0]0x81 ! Mem[0000000030041400] = 0000000000000000 | |
25415 | ! %l6 = 00000000f31200ff, Mem[0000000030101408] = 000000ff | |
25416 | stba %l6,[%i4+%o4]0x81 ! Mem[0000000030101408] = ff0000ff | |
25417 | ! %l0 = ff000000, %l1 = 00000000, Mem[0000000010101410] = 000000ff 00000000 | |
25418 | stda %l0,[%i4+%o5]0x88 ! Mem[0000000010101410] = ff000000 00000000 | |
25419 | ! %l6 = f31200ff, %l7 = 00940000, Mem[0000000010101408] = 00000000 00000000 | |
25420 | stda %l6,[%i4+%o4]0x88 ! Mem[0000000010101408] = f31200ff 00940000 | |
25421 | ! %l2 = 000000ff, %l3 = 00000000, Mem[0000000010181410] = 00000000 00000000 | |
25422 | stda %l2,[%i6+%o5]0x80 ! Mem[0000000010181410] = 000000ff 00000000 | |
25423 | ! %l4 = 00000000, %l5 = ff000000, Mem[0000000010181410] = 000000ff 00000000 | |
25424 | stda %l4,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00000000 ff000000 | |
25425 | ! Mem[00000000100c1410] = 00000000, %l1 = 0000000000000000 | |
25426 | ldstuba [%i3+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
25427 | ! Mem[0000000030141410] = ff000000, %l4 = 0000000000000000 | |
25428 | ldstuba [%i5+%o5]0x81,%l4 ! %l4 = 000000ff000000ff | |
25429 | ! Mem[0000000030081410] = ff000000, %l7 = 0000000000940000 | |
25430 | ldstuba [%i2+%o5]0x81,%l7 ! %l7 = 000000ff000000ff | |
25431 | ! Starting 10 instruction Load Burst | |
25432 | ! Mem[0000000030001410] = 00000000, %l0 = 00000000ff000000 | |
25433 | ldswa [%i0+%o5]0x89,%l0 ! %l0 = 0000000000000000 | |
25434 | ||
25435 | p0_label_609: | |
25436 | ! Mem[0000000030181410] = 411f0000 00000000, %l6 = f31200ff, %l7 = 000000ff | |
25437 | ldda [%i6+%o5]0x81,%l6 ! %l6 = 00000000411f0000 0000000000000000 | |
25438 | ! Mem[00000000300c1410] = 0000000000000000, %l0 = 0000000000000000 | |
25439 | ldxa [%i3+%o5]0x89,%l0 ! %l0 = 0000000000000000 | |
25440 | ! Mem[0000000030101408] = ff0000ff, %l4 = 00000000000000ff | |
25441 | lduwa [%i4+%o4]0x81,%l4 ! %l4 = 00000000ff0000ff | |
25442 | membar #Sync ! Added by membar checker (104) | |
25443 | ! Mem[0000000010181400] = ff0012f3 00009400 000000ff 00000000 | |
25444 | ! Mem[0000000010181410] = 00000000 ff000000 ff000000 c6000000 | |
25445 | ! Mem[0000000010181420] = 000000ff 00000000 00000076 ffff9c00 | |
25446 | ! Mem[0000000010181430] = 000000ff ffffffff ff000000 00000000 | |
25447 | ldda [%i6]ASI_BLK_P,%f16 ! Block Load from 0000000010181400 | |
25448 | ! Mem[0000000030101408] = ff0000ff, %l5 = ffffffffff000000 | |
25449 | lduwa [%i4+%o4]0x89,%l5 ! %l5 = 00000000ff0000ff | |
25450 | ! Mem[00000000300c1400] = 000000000000ffff, %l3 = 0000000000000000 | |
25451 | ldxa [%i3+%g0]0x81,%l3 ! %l3 = 000000000000ffff | |
25452 | ! Mem[0000000010181400] = ff0012f300009400, %f2 = ff000000 ffffffff | |
25453 | ldda [%i6+%g0]0x80,%f2 ! %f2 = ff0012f3 00009400 | |
25454 | ! Mem[0000000010081414] = 00000000, %l2 = 0000ffff000000ff | |
25455 | ldsha [%i2+0x014]%asi,%l2 ! %l2 = 0000000000000000 | |
25456 | ! Mem[0000000010181428] = 00000076 ffff9c00, %l4 = ff0000ff, %l5 = ff0000ff | |
25457 | ldda [%i6+0x028]%asi,%l4 ! %l4 = 0000000000000076 00000000ffff9c00 | |
25458 | ! Starting 10 instruction Store Burst | |
25459 | ! %l7 = 0000000000000000, Mem[0000000010041414] = 00000000 | |
25460 | stw %l7,[%i1+0x014] ! Mem[0000000010041414] = 00000000 | |
25461 | ||
25462 | p0_label_610: | |
25463 | ! %l6 = 411f0000, %l7 = 00000000, Mem[0000000010141410] = 00000000 00000000 | |
25464 | stda %l6,[%i5+%o5]0x88 ! Mem[0000000010141410] = 411f0000 00000000 | |
25465 | ! %l3 = 000000000000ffff, Mem[0000000020800001] = 00008470, %asi = 80 | |
25466 | stba %l3,[%o1+0x001]%asi ! Mem[0000000020800000] = 00ff8470 | |
25467 | ! Mem[0000000021800181] = ffffe2ae, %l6 = 00000000411f0000 | |
25468 | ldstuba [%o3+0x181]%asi,%l6 ! %l6 = 000000ff000000ff | |
25469 | ! Mem[0000000010141404] = 00000000, %l4 = 0000000000000076 | |
25470 | swap [%i5+0x004],%l4 ! %l4 = 0000000000000000 | |
25471 | ! %l1 = 0000000000000000, Mem[000000001010143a] = 00000000 | |
25472 | sth %l1,[%i4+0x03a] ! Mem[0000000010101438] = 00000000 | |
25473 | ! Mem[0000000030041410] = 00000000, %l7 = 0000000000000000 | |
25474 | swapa [%i1+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
25475 | ! Mem[00000000300c1408] = 000000ff, %l3 = 000000000000ffff | |
25476 | swapa [%i3+%o4]0x89,%l3 ! %l3 = 00000000000000ff | |
25477 | ! %f8 = 1f41ff76, Mem[0000000010041400] = 000000ff | |
25478 | sta %f8 ,[%i1+%g0]0x88 ! Mem[0000000010041400] = 1f41ff76 | |
25479 | ! Mem[0000000030001400] = ffffffff, %l7 = 0000000000000000 | |
25480 | swapa [%i0+%g0]0x89,%l7 ! %l7 = 00000000ffffffff | |
25481 | ! Starting 10 instruction Load Burst | |
25482 | ! Mem[0000000010001408] = ffffffff, %l5 = 00000000ffff9c00 | |
25483 | ldsha [%i0+%o4]0x80,%l5 ! %l5 = ffffffffffffffff | |
25484 | ||
25485 | ! Check Point 122 for processor 0 | |
25486 | ||
25487 | set p0_check_pt_data_122,%g4 | |
25488 | rd %ccr,%g5 ! %g5 = 44 | |
25489 | ldx [%g4+0x08],%g2 | |
25490 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
25491 | bne %xcc,p0_reg_check_fail0 | |
25492 | mov 0xee0,%g1 | |
25493 | ldx [%g4+0x10],%g2 | |
25494 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
25495 | bne %xcc,p0_reg_check_fail1 | |
25496 | mov 0xee1,%g1 | |
25497 | ldx [%g4+0x18],%g2 | |
25498 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
25499 | bne %xcc,p0_reg_check_fail2 | |
25500 | mov 0xee2,%g1 | |
25501 | ldx [%g4+0x20],%g2 | |
25502 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
25503 | bne %xcc,p0_reg_check_fail3 | |
25504 | mov 0xee3,%g1 | |
25505 | ldx [%g4+0x28],%g2 | |
25506 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
25507 | bne %xcc,p0_reg_check_fail4 | |
25508 | mov 0xee4,%g1 | |
25509 | ldx [%g4+0x30],%g2 | |
25510 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
25511 | bne %xcc,p0_reg_check_fail5 | |
25512 | mov 0xee5,%g1 | |
25513 | ldx [%g4+0x38],%g2 | |
25514 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
25515 | bne %xcc,p0_reg_check_fail6 | |
25516 | mov 0xee6,%g1 | |
25517 | ldx [%g4+0x40],%g2 | |
25518 | cmp %l7,%g2 ! %l7 = 00000000ffffffff | |
25519 | bne %xcc,p0_reg_check_fail7 | |
25520 | mov 0xee7,%g1 | |
25521 | ldx [%g4+0x48],%g3 | |
25522 | std %f0,[%g4] | |
25523 | ldx [%g4],%g2 | |
25524 | cmp %g3,%g2 ! %f0 = 0000ffff 000000ff | |
25525 | bne %xcc,p0_freg_check_fail | |
25526 | mov 0xf00,%g1 | |
25527 | ldx [%g4+0x50],%g3 | |
25528 | std %f2,[%g4] | |
25529 | ldx [%g4],%g2 | |
25530 | cmp %g3,%g2 ! %f2 = ff0012f3 00009400 | |
25531 | bne %xcc,p0_freg_check_fail | |
25532 | mov 0xf02,%g1 | |
25533 | ldx [%g4+0x58],%g3 | |
25534 | std %f4,[%g4] | |
25535 | ldx [%g4],%g2 | |
25536 | cmp %g3,%g2 ! %f4 = ff000000 00000000 | |
25537 | bne %xcc,p0_freg_check_fail | |
25538 | mov 0xf04,%g1 | |
25539 | ldx [%g4+0x60],%g3 | |
25540 | std %f6,[%g4] | |
25541 | ldx [%g4],%g2 | |
25542 | cmp %g3,%g2 ! %f6 = fc734517 000000ff | |
25543 | bne %xcc,p0_freg_check_fail | |
25544 | mov 0xf06,%g1 | |
25545 | ldx [%g4+0x68],%g3 | |
25546 | std %f14,[%g4] | |
25547 | ldx [%g4],%g2 | |
25548 | cmp %g3,%g2 ! %f14 = ff000000 00000000 | |
25549 | bne %xcc,p0_freg_check_fail | |
25550 | mov 0xf14,%g1 | |
25551 | ldx [%g4+0x70],%g3 | |
25552 | std %f16,[%g4] | |
25553 | ldx [%g4],%g2 | |
25554 | cmp %g3,%g2 ! %f16 = ff0012f3 00009400 | |
25555 | bne %xcc,p0_freg_check_fail | |
25556 | mov 0xf16,%g1 | |
25557 | ldx [%g4+0x78],%g3 | |
25558 | std %f18,[%g4] | |
25559 | ldx [%g4],%g2 | |
25560 | cmp %g3,%g2 ! %f18 = 000000ff 00000000 | |
25561 | bne %xcc,p0_freg_check_fail | |
25562 | mov 0xf18,%g1 | |
25563 | ldx [%g4+0x80],%g3 | |
25564 | std %f20,[%g4] | |
25565 | ldx [%g4],%g2 | |
25566 | cmp %g3,%g2 ! %f20 = 00000000 ff000000 | |
25567 | bne %xcc,p0_freg_check_fail | |
25568 | mov 0xf20,%g1 | |
25569 | ldx [%g4+0x88],%g3 | |
25570 | std %f22,[%g4] | |
25571 | ldx [%g4],%g2 | |
25572 | cmp %g3,%g2 ! %f22 = ff000000 c6000000 | |
25573 | bne %xcc,p0_freg_check_fail | |
25574 | mov 0xf22,%g1 | |
25575 | ldx [%g4+0x90],%g3 | |
25576 | std %f24,[%g4] | |
25577 | ldx [%g4],%g2 | |
25578 | cmp %g3,%g2 ! %f24 = 000000ff 00000000 | |
25579 | bne %xcc,p0_freg_check_fail | |
25580 | mov 0xf24,%g1 | |
25581 | ldx [%g4+0x98],%g3 | |
25582 | std %f26,[%g4] | |
25583 | ldx [%g4],%g2 | |
25584 | cmp %g3,%g2 ! %f26 = 00000076 ffff9c00 | |
25585 | bne %xcc,p0_freg_check_fail | |
25586 | mov 0xf26,%g1 | |
25587 | ldx [%g4+0xa0],%g3 | |
25588 | std %f28,[%g4] | |
25589 | ldx [%g4],%g2 | |
25590 | cmp %g3,%g2 ! %f28 = 000000ff ffffffff | |
25591 | bne %xcc,p0_freg_check_fail | |
25592 | mov 0xf28,%g1 | |
25593 | ldx [%g4+0xa8],%g3 | |
25594 | std %f30,[%g4] | |
25595 | ldx [%g4],%g2 | |
25596 | cmp %g3,%g2 ! %f30 = ff000000 00000000 | |
25597 | bne %xcc,p0_freg_check_fail | |
25598 | mov 0xf30,%g1 | |
25599 | ||
25600 | ! Check Point 122 completed | |
25601 | ||
25602 | ||
25603 | p0_label_611: | |
25604 | ! Mem[0000000010141408] = 00000000, %l3 = 00000000000000ff | |
25605 | lduba [%i5+%o4]0x80,%l3 ! %l3 = 0000000000000000 | |
25606 | ! Mem[0000000030001400] = ff000000 00000000, %l6 = 000000ff, %l7 = ffffffff | |
25607 | ldda [%i0+%g0]0x89,%l6 ! %l6 = 0000000000000000 00000000ff000000 | |
25608 | ! Mem[00000000300c1410] = 00000000, %l5 = ffffffffffffffff | |
25609 | lduha [%i3+%o5]0x89,%l5 ! %l5 = 0000000000000000 | |
25610 | ! Mem[0000000030101400] = ffff411f, %l2 = 0000000000000000 | |
25611 | lduha [%i4+%g0]0x81,%l2 ! %l2 = 000000000000ffff | |
25612 | ! Mem[000000001000141c] = ffff0000, %l1 = 0000000000000000 | |
25613 | ldsb [%i0+0x01c],%l1 ! %l1 = ffffffffffffffff | |
25614 | ! Mem[0000000010101400] = 00000000000000ff, %l6 = 0000000000000000 | |
25615 | ldxa [%i4+%g0]0x80,%l6 ! %l6 = 00000000000000ff | |
25616 | ! Mem[00000000100c1404] = 597bac10, %l7 = 00000000ff000000 | |
25617 | ldsw [%i3+0x004],%l7 ! %l7 = 00000000597bac10 | |
25618 | ! Mem[0000000010181408] = 00000000 ff000000, %l2 = 0000ffff, %l3 = 00000000 | |
25619 | ldda [%i6+%o4]0x88,%l2 ! %l2 = 00000000ff000000 0000000000000000 | |
25620 | ! Mem[0000000030101408] = ff0000ff 00000000, %l2 = ff000000, %l3 = 00000000 | |
25621 | ldda [%i4+%o4]0x81,%l2 ! %l2 = 00000000ff0000ff 0000000000000000 | |
25622 | ! Starting 10 instruction Store Burst | |
25623 | ! Mem[00000000211c0000] = 00ff1a4c, %l6 = 00000000000000ff | |
25624 | ldstub [%o2+%g0],%l6 ! %l6 = 00000000000000ff | |
25625 | ||
25626 | p0_label_612: | |
25627 | ! %l6 = 00000000, %l7 = 597bac10, Mem[0000000030181408] = 00000000 00760000 | |
25628 | stda %l6,[%i6+%o4]0x81 ! Mem[0000000030181408] = 00000000 597bac10 | |
25629 | membar #Sync ! Added by membar checker (105) | |
25630 | ! %l7 = 00000000597bac10, Mem[0000000010181400] = ff0012f300009400 | |
25631 | stxa %l7,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000597bac10 | |
25632 | ! %l4 = 0000000000000000, Mem[0000000010181410] = 00000000 | |
25633 | stba %l4,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000 | |
25634 | ! Mem[0000000030081400] = 00000000, %l1 = ffffffffffffffff | |
25635 | swapa [%i2+%g0]0x81,%l1 ! %l1 = 0000000000000000 | |
25636 | ! %f2 = ff0012f3, Mem[0000000030041408] = ff000000 | |
25637 | sta %f2 ,[%i1+%o4]0x89 ! Mem[0000000030041408] = ff0012f3 | |
25638 | ! %f6 = fc734517 000000ff, Mem[0000000010041400] = 76ff411f 0000ffff | |
25639 | stda %f6 ,[%i1+0x000]%asi ! Mem[0000000010041400] = fc734517 000000ff | |
25640 | ! Mem[0000000030001408] = 0000ffff, %l3 = 0000000000000000 | |
25641 | ldstuba [%i0+%o4]0x81,%l3 ! %l3 = 00000000000000ff | |
25642 | ! %l6 = 0000000000000000, Mem[0000000030041400] = 00000000 | |
25643 | stha %l6,[%i1+%g0]0x89 ! Mem[0000000030041400] = 00000000 | |
25644 | ! %l6 = 0000000000000000, Mem[0000000010041410] = ff000000 | |
25645 | stba %l6,[%i1+%o5]0x80 ! Mem[0000000010041410] = 00000000 | |
25646 | ! Starting 10 instruction Load Burst | |
25647 | ! Mem[0000000030041408] = ff0012f3, %l1 = 0000000000000000 | |
25648 | ldswa [%i1+%o4]0x89,%l1 ! %l1 = ffffffffff0012f3 | |
25649 | ||
25650 | p0_label_613: | |
25651 | ! Mem[00000000300c1410] = 00000000, %l2 = 00000000ff0000ff | |
25652 | lduha [%i3+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
25653 | ! %f29 = ffffffff, Mem[0000000010101410] = 000000ff | |
25654 | sta %f29,[%i4+%o5]0x80 ! Mem[0000000010101410] = ffffffff | |
25655 | ! Mem[000000001010142c] = 00000003, %l4 = 0000000000000000 | |
25656 | ldsh [%i4+0x02e],%l4 ! %l4 = 0000000000000003 | |
25657 | ! Mem[00000000201c0000] = ff009457, %l0 = 0000000000000000 | |
25658 | lduha [%o0+0x000]%asi,%l0 ! %l0 = 000000000000ff00 | |
25659 | ! Mem[0000000010181410] = 00000000ff000000, %f20 = 00000000 ff000000 | |
25660 | ldda [%i6+0x010]%asi,%f20 ! %f20 = 00000000 ff000000 | |
25661 | ! Mem[0000000010001400] = ff000000, %l7 = 00000000597bac10 | |
25662 | lduha [%i0+0x002]%asi,%l7 ! %l7 = 0000000000000000 | |
25663 | ! Mem[0000000030141410] = 00000000 000000ff, %l4 = 00000003, %l5 = 00000000 | |
25664 | ldda [%i5+%o5]0x89,%l4 ! %l4 = 00000000000000ff 0000000000000000 | |
25665 | ! Mem[0000000010081408] = 0000ffff, %l7 = 0000000000000000 | |
25666 | lduha [%i2+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
25667 | ! Mem[0000000030081410] = 0000ffff 000000ff, %l4 = 000000ff, %l5 = 00000000 | |
25668 | ldda [%i2+%o5]0x89,%l4 ! %l4 = 00000000000000ff 000000000000ffff | |
25669 | ! Starting 10 instruction Store Burst | |
25670 | ! %l1 = ffffffffff0012f3, Mem[0000000010141408] = 00000000 | |
25671 | stwa %l1,[%i5+%o4]0x88 ! Mem[0000000010141408] = ff0012f3 | |
25672 | ||
25673 | p0_label_614: | |
25674 | ! %f6 = fc734517 000000ff, Mem[0000000010141400] = ff0000ff 76000000 | |
25675 | stda %f6 ,[%i5+%g0]0x88 ! Mem[0000000010141400] = fc734517 000000ff | |
25676 | ! %l3 = 0000000000000000, Mem[0000000030081408] = ffff0000 | |
25677 | stba %l3,[%i2+%o4]0x81 ! Mem[0000000030081408] = 00ff0000 | |
25678 | ! Mem[0000000010041438] = 000000c6ffff0000, %l7 = 0000000000000000, %l6 = 0000000000000000 | |
25679 | add %i1,0x38,%g1 | |
25680 | casxa [%g1]0x80,%l7,%l6 ! %l6 = 000000c6ffff0000 | |
25681 | ! %f28 = 000000ff ffffffff, %l7 = 0000000000000000 | |
25682 | ! Mem[0000000030001410] = 0000000000000000 | |
25683 | add %i0,0x010,%g1 | |
25684 | stda %f28,[%g1+%l7]ASI_PST32_SL ! Mem[0000000030001410] = 0000000000000000 | |
25685 | ! Mem[0000000030041408] = f31200ff, %l1 = ffffffffff0012f3 | |
25686 | ldstuba [%i1+%o4]0x81,%l1 ! %l1 = 000000f3000000ff | |
25687 | ! Mem[0000000010081400] = 00000000, %l0 = 000000000000ff00 | |
25688 | swapa [%i2+%g0]0x80,%l0 ! %l0 = 0000000000000000 | |
25689 | ! %f0 = 0000ffff 000000ff, Mem[0000000030041410] = 00000000 00000000 | |
25690 | stda %f0 ,[%i1+%o5]0x81 ! Mem[0000000030041410] = 0000ffff 000000ff | |
25691 | ! %f1 = 000000ff, Mem[0000000010081410] = 00000000 | |
25692 | sta %f1 ,[%i2+%o5]0x88 ! Mem[0000000010081410] = 000000ff | |
25693 | ! %f2 = ff0012f3, Mem[0000000010181400] = 00000000 | |
25694 | sta %f2 ,[%i6+%g0]0x88 ! Mem[0000000010181400] = ff0012f3 | |
25695 | ! Starting 10 instruction Load Burst | |
25696 | ! Mem[0000000030181410] = 411f0000, %l0 = 0000000000000000 | |
25697 | lduha [%i6+%o5]0x81,%l0 ! %l0 = 000000000000411f | |
25698 | ||
25699 | p0_label_615: | |
25700 | ! Mem[00000000100c1400] = ff000000, %l4 = 00000000000000ff | |
25701 | ldsha [%i3+%g0]0x80,%l4 ! %l4 = ffffffffffffff00 | |
25702 | ! Mem[0000000010141400] = 000000ff, %l3 = 0000000000000000 | |
25703 | lduha [%i5+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
25704 | ! Mem[0000000010101420] = c788340300ff0000, %l7 = 0000000000000000 | |
25705 | ldxa [%i4+0x020]%asi,%l7 ! %l7 = c788340300ff0000 | |
25706 | ! Mem[0000000030101408] = ff0000ff 00000000, %l0 = 0000411f, %l1 = 000000f3 | |
25707 | ldda [%i4+%o4]0x81,%l0 ! %l0 = 00000000ff0000ff 0000000000000000 | |
25708 | ! Mem[000000001010143c] = 00000000, %l5 = 000000000000ffff | |
25709 | ldsh [%i4+0x03e],%l5 ! %l5 = 0000000000000000 | |
25710 | ! Mem[0000000020800000] = 00ff8470, %l0 = 00000000ff0000ff | |
25711 | lduha [%o1+0x000]%asi,%l0 ! %l0 = 00000000000000ff | |
25712 | ! Mem[0000000010101428] = 0000000000000003, %f8 = 1f41ff76 2164159c | |
25713 | ldda [%i4+0x028]%asi,%f8 ! %f8 = 00000000 00000003 | |
25714 | ! Mem[0000000010181400] = 10ac7b59ff0012f3, %l7 = c788340300ff0000 | |
25715 | ldxa [%i6+%g0]0x88,%l7 ! %l7 = 10ac7b59ff0012f3 | |
25716 | ! Mem[0000000021800180] = ffffe2ae, %l2 = 0000000000000000 | |
25717 | lduba [%o3+0x180]%asi,%l2 ! %l2 = 00000000000000ff | |
25718 | ! Starting 10 instruction Store Burst | |
25719 | ! %l2 = 00000000000000ff, Mem[00000000300c1400] = 00000000 | |
25720 | stha %l2,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 000000ff | |
25721 | ||
25722 | ! Check Point 123 for processor 0 | |
25723 | ||
25724 | set p0_check_pt_data_123,%g4 | |
25725 | rd %ccr,%g5 ! %g5 = 44 | |
25726 | ldx [%g4+0x08],%g2 | |
25727 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
25728 | bne %xcc,p0_reg_check_fail0 | |
25729 | mov 0xee0,%g1 | |
25730 | ldx [%g4+0x10],%g2 | |
25731 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
25732 | bne %xcc,p0_reg_check_fail1 | |
25733 | mov 0xee1,%g1 | |
25734 | ldx [%g4+0x18],%g2 | |
25735 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
25736 | bne %xcc,p0_reg_check_fail2 | |
25737 | mov 0xee2,%g1 | |
25738 | ldx [%g4+0x20],%g2 | |
25739 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
25740 | bne %xcc,p0_reg_check_fail3 | |
25741 | mov 0xee3,%g1 | |
25742 | ldx [%g4+0x28],%g2 | |
25743 | cmp %l4,%g2 ! %l4 = ffffffffffffff00 | |
25744 | bne %xcc,p0_reg_check_fail4 | |
25745 | mov 0xee4,%g1 | |
25746 | ldx [%g4+0x30],%g2 | |
25747 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
25748 | bne %xcc,p0_reg_check_fail5 | |
25749 | mov 0xee5,%g1 | |
25750 | ldx [%g4+0x38],%g2 | |
25751 | cmp %l6,%g2 ! %l6 = 000000c6ffff0000 | |
25752 | bne %xcc,p0_reg_check_fail6 | |
25753 | mov 0xee6,%g1 | |
25754 | ldx [%g4+0x40],%g2 | |
25755 | cmp %l7,%g2 ! %l7 = 10ac7b59ff0012f3 | |
25756 | bne %xcc,p0_reg_check_fail7 | |
25757 | mov 0xee7,%g1 | |
25758 | ldx [%g4+0x48],%g3 | |
25759 | std %f0,[%g4] | |
25760 | ldx [%g4],%g2 | |
25761 | cmp %g3,%g2 ! %f0 = 0000ffff 000000ff | |
25762 | bne %xcc,p0_freg_check_fail | |
25763 | mov 0xf00,%g1 | |
25764 | ldx [%g4+0x50],%g3 | |
25765 | std %f2,[%g4] | |
25766 | ldx [%g4],%g2 | |
25767 | cmp %g3,%g2 ! %f2 = ff0012f3 00009400 | |
25768 | bne %xcc,p0_freg_check_fail | |
25769 | mov 0xf02,%g1 | |
25770 | ldx [%g4+0x58],%g3 | |
25771 | std %f4,[%g4] | |
25772 | ldx [%g4],%g2 | |
25773 | cmp %g3,%g2 ! %f4 = ff000000 00000000 | |
25774 | bne %xcc,p0_freg_check_fail | |
25775 | mov 0xf04,%g1 | |
25776 | ldx [%g4+0x60],%g3 | |
25777 | std %f6,[%g4] | |
25778 | ldx [%g4],%g2 | |
25779 | cmp %g3,%g2 ! %f6 = fc734517 000000ff | |
25780 | bne %xcc,p0_freg_check_fail | |
25781 | mov 0xf06,%g1 | |
25782 | ldx [%g4+0x68],%g3 | |
25783 | std %f8,[%g4] | |
25784 | ldx [%g4],%g2 | |
25785 | cmp %g3,%g2 ! %f8 = 00000000 00000003 | |
25786 | bne %xcc,p0_freg_check_fail | |
25787 | mov 0xf08,%g1 | |
25788 | ldx [%g4+0x70],%g3 | |
25789 | std %f20,[%g4] | |
25790 | ldx [%g4],%g2 | |
25791 | cmp %g3,%g2 ! %f20 = 00000000 ff000000 | |
25792 | bne %xcc,p0_freg_check_fail | |
25793 | mov 0xf20,%g1 | |
25794 | ||
25795 | ! Check Point 123 completed | |
25796 | ||
25797 | ||
25798 | p0_label_616: | |
25799 | ! Mem[00000000100c1400] = 000000ff, %l7 = 10ac7b59ff0012f3 | |
25800 | ldstuba [%i3+%g0]0x88,%l7 ! %l7 = 000000ff000000ff | |
25801 | ! %l0 = 00000000000000ff, Mem[0000000010001410] = ff000000 | |
25802 | stba %l0,[%i0+%o5]0x80 ! Mem[0000000010001410] = ff000000 | |
25803 | ! %f6 = fc734517, Mem[0000000010101410] = ffffffff | |
25804 | sta %f6 ,[%i4+%o5]0x80 ! Mem[0000000010101410] = fc734517 | |
25805 | ! Mem[0000000010081410] = ff00000000000000, %l5 = 0000000000000000, %l1 = 0000000000000000 | |
25806 | add %i2,0x10,%g1 | |
25807 | casxa [%g1]0x80,%l5,%l1 ! %l1 = ff00000000000000 | |
25808 | ! Mem[0000000010041410] = 00000000, %l3 = 00000000000000ff | |
25809 | ldstuba [%i1+%o5]0x88,%l3 ! %l3 = 00000000000000ff | |
25810 | ! Mem[00000000100c1410] = ff000000, %l2 = 00000000000000ff | |
25811 | swapa [%i3+%o5]0x80,%l2 ! %l2 = 00000000ff000000 | |
25812 | ! Mem[0000000030081400] = ffffffff, %l7 = 00000000000000ff | |
25813 | ldstuba [%i2+%g0]0x81,%l7 ! %l7 = 000000ff000000ff | |
25814 | ! Mem[0000000030101408] = ff0000ff, %l4 = ffffffffffffff00 | |
25815 | swapa [%i4+%o4]0x89,%l4 ! %l4 = 00000000ff0000ff | |
25816 | ! %l5 = 0000000000000000, Mem[00000000201c0000] = ff009457, %asi = 80 | |
25817 | stba %l5,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00009457 | |
25818 | ! Starting 10 instruction Load Burst | |
25819 | ! Mem[0000000010041400] = ff000000 174573fc, %l2 = ff000000, %l3 = 00000000 | |
25820 | ldda [%i1+%g0]0x88,%l2 ! %l2 = 00000000174573fc 00000000ff000000 | |
25821 | ||
25822 | p0_label_617: | |
25823 | ! Mem[0000000010101424] = 00ff0000, %l5 = 0000000000000000 | |
25824 | ldsb [%i4+0x024],%l5 ! %l5 = 0000000000000000 | |
25825 | ! Mem[0000000010001410] = ff000000, %l6 = 000000c6ffff0000 | |
25826 | ldsba [%i0+%o5]0x80,%l6 ! %l6 = ffffffffffffffff | |
25827 | ! Mem[0000000030181410] = 411f0000, %l1 = ff00000000000000 | |
25828 | lduwa [%i6+%o5]0x81,%l1 ! %l1 = 00000000411f0000 | |
25829 | ! Mem[00000000300c1400] = 000000ff, %l6 = ffffffffffffffff | |
25830 | ldsba [%i3+%g0]0x89,%l6 ! %l6 = ffffffffffffffff | |
25831 | ! Mem[0000000010081410] = 000000ff, %l7 = 00000000000000ff | |
25832 | ldsha [%i2+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
25833 | ! Mem[0000000010181408] = 000000ff, %f7 = 000000ff | |
25834 | lda [%i6+%o4]0x80,%f7 ! %f7 = 000000ff | |
25835 | ! Mem[00000000300c1408] = ffff0000, %l0 = 00000000000000ff | |
25836 | ldsha [%i3+%o4]0x81,%l0 ! %l0 = ffffffffffffffff | |
25837 | membar #Sync ! Added by membar checker (106) | |
25838 | ! Mem[0000000010101400] = 00000000 000000ff ff0012f3 00009400 | |
25839 | ! Mem[0000000010101410] = fc734517 00000000 9c156421 76ff411f | |
25840 | ! Mem[0000000010101420] = c7883403 00ff0000 00000000 00000003 | |
25841 | ! Mem[0000000010101430] = 00ff0000 000000ff 00000000 00000000 | |
25842 | ldda [%i4]ASI_BLK_PL,%f0 ! Block Load from 0000000010101400 | |
25843 | ! Mem[0000000030041408] = ff1200ff, %f26 = 00000076 | |
25844 | lda [%i1+%o4]0x81,%f26 ! %f26 = ff1200ff | |
25845 | ! Starting 10 instruction Store Burst | |
25846 | ! Mem[0000000021800081] = ffffa433, %l0 = ffffffffffffffff | |
25847 | ldstuba [%o3+0x081]%asi,%l0 ! %l0 = 000000ff000000ff | |
25848 | ||
25849 | p0_label_618: | |
25850 | ! %l7 = 00000000000000ff, Mem[0000000010001408] = ffffffffffffffff | |
25851 | stxa %l7,[%i0+%o4]0x88 ! Mem[0000000010001408] = 00000000000000ff | |
25852 | membar #Sync ! Added by membar checker (107) | |
25853 | ! %l5 = 0000000000000000, Mem[0000000010101400] = 00000000 | |
25854 | stha %l5,[%i4+%g0]0x88 ! Mem[0000000010101400] = 00000000 | |
25855 | ! Mem[0000000030141410] = 00000000000000ff, %f30 = ff000000 00000000 | |
25856 | ldda [%i5+%o5]0x89,%f30 ! %f30 = 00000000 000000ff | |
25857 | ! Mem[0000000030181410] = 411f0000, %l4 = 00000000ff0000ff | |
25858 | ldstuba [%i6+%o5]0x81,%l4 ! %l4 = 00000041000000ff | |
25859 | ! Mem[0000000030041410] = 0000ffff, %l1 = 00000000411f0000 | |
25860 | swapa [%i1+%o5]0x81,%l1 ! %l1 = 000000000000ffff | |
25861 | ! Mem[0000000010001408] = ff000000, %l7 = 00000000000000ff | |
25862 | ldstuba [%i0+0x008]%asi,%l7 ! %l7 = 000000ff000000ff | |
25863 | ! %f22 = ff000000 c6000000, Mem[0000000010101400] = 00000000 000000ff | |
25864 | stda %f22,[%i4+0x000]%asi ! Mem[0000000010101400] = ff000000 c6000000 | |
25865 | ! Mem[0000000010001400] = ff000000, %l1 = 000000000000ffff, %asi = 80 | |
25866 | swapa [%i0+0x000]%asi,%l1 ! %l1 = 00000000ff000000 | |
25867 | ! Mem[00000000211c0000] = ffff1a4c, %l7 = 00000000000000ff | |
25868 | ldstub [%o2+%g0],%l7 ! %l7 = 000000ff000000ff | |
25869 | ! Starting 10 instruction Load Burst | |
25870 | ! Mem[0000000010041400] = ff000000174573fc, %l1 = 00000000ff000000 | |
25871 | ldxa [%i1+%g0]0x88,%l1 ! %l1 = ff000000174573fc | |
25872 | ||
25873 | p0_label_619: | |
25874 | ! Mem[0000000010141410] = 00001f41, %l2 = 00000000174573fc | |
25875 | lduwa [%i5+%o5]0x80,%l2 ! %l2 = 0000000000001f41 | |
25876 | ! Mem[0000000030101410] = 76ff411f, %l5 = 0000000000000000 | |
25877 | lduba [%i4+%o5]0x81,%l5 ! %l5 = 0000000000000076 | |
25878 | ! Mem[0000000010141418] = 000000ff, %f24 = 000000ff | |
25879 | lda [%i5+0x018]%asi,%f24 ! %f24 = 000000ff | |
25880 | ! Mem[0000000030041400] = 00000000, %l0 = 00000000000000ff | |
25881 | lduha [%i1+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
25882 | ! Mem[00000000300c1408] = ffff0000, %l1 = ff000000174573fc | |
25883 | ldsha [%i3+%o4]0x81,%l1 ! %l1 = ffffffffffffffff | |
25884 | ! Mem[0000000010181400] = ff0012f3, %l3 = 00000000ff000000 | |
25885 | lduba [%i6+%g0]0x88,%l3 ! %l3 = 00000000000000f3 | |
25886 | ! Mem[0000000030041410] = 411f0000000000ff, %l5 = 0000000000000076 | |
25887 | ldxa [%i1+%o5]0x81,%l5 ! %l5 = 411f0000000000ff | |
25888 | ! Mem[0000000030141400] = 0000ffff, %l0 = 0000000000000000 | |
25889 | ldswa [%i5+%g0]0x81,%l0 ! %l0 = 000000000000ffff | |
25890 | ! Mem[0000000030141400] = ff000000ffff0000, %l1 = ffffffffffffffff | |
25891 | ldxa [%i5+%g0]0x89,%l1 ! %l1 = ff000000ffff0000 | |
25892 | ! Starting 10 instruction Store Burst | |
25893 | ! %f10 = 03000000 00000000, Mem[0000000030041408] = ff0012ff 00000000 | |
25894 | stda %f10,[%i1+%o4]0x89 ! Mem[0000000030041408] = 03000000 00000000 | |
25895 | ||
25896 | p0_label_620: | |
25897 | ! %f30 = 00000000, Mem[0000000010081428] = 00000000 | |
25898 | sta %f30,[%i2+0x028]%asi ! Mem[0000000010081428] = 00000000 | |
25899 | ! %f26 = ff1200ff ffff9c00, Mem[0000000010181408] = 000000ff 00000000 | |
25900 | std %f26,[%i6+%o4] ! Mem[0000000010181408] = ff1200ff ffff9c00 | |
25901 | ! Mem[0000000030141400] = 0000ffff, %l1 = ff000000ffff0000 | |
25902 | ldstuba [%i5+%g0]0x81,%l1 ! %l1 = 00000000000000ff | |
25903 | ! %f30 = 00000000 000000ff, Mem[0000000010081400] = 0000ff00 00000000 | |
25904 | std %f30,[%i2+%g0] ! Mem[0000000010081400] = 00000000 000000ff | |
25905 | ! Mem[0000000030141400] = ffff00ff, %l4 = 0000000000000041 | |
25906 | swapa [%i5+%g0]0x89,%l4 ! %l4 = 00000000ffff00ff | |
25907 | ! %l0 = 000000000000ffff, Mem[0000000030141400] = 00000041 | |
25908 | stwa %l0,[%i5+%g0]0x89 ! Mem[0000000030141400] = 0000ffff | |
25909 | ! %l3 = 00000000000000f3, Mem[0000000030181400] = 000000ff | |
25910 | stba %l3,[%i6+%g0]0x81 ! Mem[0000000030181400] = f30000ff | |
25911 | ! %l0 = 0000ffff, %l1 = 00000000, Mem[00000000300c1408] = 0000ffff ffff0000 | |
25912 | stda %l0,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 0000ffff 00000000 | |
25913 | ! %f28 = 000000ff, Mem[0000000010101410] = fc734517 | |
25914 | st %f28,[%i4+%o5] ! Mem[0000000010101410] = 000000ff | |
25915 | ! Starting 10 instruction Load Burst | |
25916 | ! Mem[0000000030081408] = 0000ff00, %l5 = 411f0000000000ff | |
25917 | ldswa [%i2+%o4]0x89,%l5 ! %l5 = 000000000000ff00 | |
25918 | ||
25919 | ! Check Point 124 for processor 0 | |
25920 | ||
25921 | set p0_check_pt_data_124,%g4 | |
25922 | rd %ccr,%g5 ! %g5 = 44 | |
25923 | ldx [%g4+0x08],%g2 | |
25924 | cmp %l0,%g2 ! %l0 = 000000000000ffff | |
25925 | bne %xcc,p0_reg_check_fail0 | |
25926 | mov 0xee0,%g1 | |
25927 | ldx [%g4+0x10],%g2 | |
25928 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
25929 | bne %xcc,p0_reg_check_fail1 | |
25930 | mov 0xee1,%g1 | |
25931 | ldx [%g4+0x18],%g2 | |
25932 | cmp %l2,%g2 ! %l2 = 0000000000001f41 | |
25933 | bne %xcc,p0_reg_check_fail2 | |
25934 | mov 0xee2,%g1 | |
25935 | ldx [%g4+0x20],%g2 | |
25936 | cmp %l3,%g2 ! %l3 = 00000000000000f3 | |
25937 | bne %xcc,p0_reg_check_fail3 | |
25938 | mov 0xee3,%g1 | |
25939 | ldx [%g4+0x28],%g2 | |
25940 | cmp %l4,%g2 ! %l4 = 00000000ffff00ff | |
25941 | bne %xcc,p0_reg_check_fail4 | |
25942 | mov 0xee4,%g1 | |
25943 | ldx [%g4+0x30],%g2 | |
25944 | cmp %l5,%g2 ! %l5 = 000000000000ff00 | |
25945 | bne %xcc,p0_reg_check_fail5 | |
25946 | mov 0xee5,%g1 | |
25947 | ldx [%g4+0x38],%g2 | |
25948 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
25949 | bne %xcc,p0_reg_check_fail6 | |
25950 | mov 0xee6,%g1 | |
25951 | ldx [%g4+0x40],%g2 | |
25952 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
25953 | bne %xcc,p0_reg_check_fail7 | |
25954 | mov 0xee7,%g1 | |
25955 | ldx [%g4+0x48],%g3 | |
25956 | std %f0,[%g4] | |
25957 | ldx [%g4],%g2 | |
25958 | cmp %g3,%g2 ! %f0 = ff000000 00000000 | |
25959 | bne %xcc,p0_freg_check_fail | |
25960 | mov 0xf00,%g1 | |
25961 | ldx [%g4+0x50],%g3 | |
25962 | std %f2,[%g4] | |
25963 | ldx [%g4],%g2 | |
25964 | cmp %g3,%g2 ! %f2 = 00940000 f31200ff | |
25965 | bne %xcc,p0_freg_check_fail | |
25966 | mov 0xf02,%g1 | |
25967 | ldx [%g4+0x58],%g3 | |
25968 | std %f4,[%g4] | |
25969 | ldx [%g4],%g2 | |
25970 | cmp %g3,%g2 ! %f4 = 00000000 174573fc | |
25971 | bne %xcc,p0_freg_check_fail | |
25972 | mov 0xf04,%g1 | |
25973 | ldx [%g4+0x60],%g3 | |
25974 | std %f6,[%g4] | |
25975 | ldx [%g4],%g2 | |
25976 | cmp %g3,%g2 ! %f6 = 1f41ff76 2164159c | |
25977 | bne %xcc,p0_freg_check_fail | |
25978 | mov 0xf06,%g1 | |
25979 | ldx [%g4+0x68],%g3 | |
25980 | std %f8,[%g4] | |
25981 | ldx [%g4],%g2 | |
25982 | cmp %g3,%g2 ! %f8 = 0000ff00 033488c7 | |
25983 | bne %xcc,p0_freg_check_fail | |
25984 | mov 0xf08,%g1 | |
25985 | ldx [%g4+0x70],%g3 | |
25986 | std %f10,[%g4] | |
25987 | ldx [%g4],%g2 | |
25988 | cmp %g3,%g2 ! %f10 = 03000000 00000000 | |
25989 | bne %xcc,p0_freg_check_fail | |
25990 | mov 0xf10,%g1 | |
25991 | ldx [%g4+0x78],%g3 | |
25992 | std %f12,[%g4] | |
25993 | ldx [%g4],%g2 | |
25994 | cmp %g3,%g2 ! %f12 = ff000000 0000ff00 | |
25995 | bne %xcc,p0_freg_check_fail | |
25996 | mov 0xf12,%g1 | |
25997 | ldx [%g4+0x80],%g3 | |
25998 | std %f14,[%g4] | |
25999 | ldx [%g4],%g2 | |
26000 | cmp %g3,%g2 ! %f14 = 00000000 00000000 | |
26001 | bne %xcc,p0_freg_check_fail | |
26002 | mov 0xf14,%g1 | |
26003 | ldx [%g4+0x88],%g3 | |
26004 | std %f24,[%g4] | |
26005 | ldx [%g4],%g2 | |
26006 | cmp %g3,%g2 ! %f24 = 000000ff 00000000 | |
26007 | bne %xcc,p0_freg_check_fail | |
26008 | mov 0xf24,%g1 | |
26009 | ldx [%g4+0x90],%g3 | |
26010 | std %f26,[%g4] | |
26011 | ldx [%g4],%g2 | |
26012 | cmp %g3,%g2 ! %f26 = ff1200ff ffff9c00 | |
26013 | bne %xcc,p0_freg_check_fail | |
26014 | mov 0xf26,%g1 | |
26015 | ldx [%g4+0x98],%g3 | |
26016 | std %f30,[%g4] | |
26017 | ldx [%g4],%g2 | |
26018 | cmp %g3,%g2 ! %f30 = 00000000 000000ff | |
26019 | bne %xcc,p0_freg_check_fail | |
26020 | mov 0xf30,%g1 | |
26021 | ||
26022 | ! Check Point 124 completed | |
26023 | ||
26024 | ||
26025 | p0_label_621: | |
26026 | ! Mem[00000000100c1400] = ff000000, %l2 = 0000000000001f41 | |
26027 | lduha [%i3+%g0]0x80,%l2 ! %l2 = 000000000000ff00 | |
26028 | ! Mem[0000000010041408] = ffffff00, %l0 = 000000000000ffff | |
26029 | lduba [%i1+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
26030 | ! Mem[0000000030001400] = 00000000000000ff, %l2 = 000000000000ff00 | |
26031 | ldxa [%i0+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
26032 | ! Mem[0000000010181408] = ff1200ff, %l5 = 000000000000ff00 | |
26033 | lduwa [%i6+%o4]0x80,%l5 ! %l5 = 00000000ff1200ff | |
26034 | ! Mem[0000000030181408] = 00000000, %l4 = 00000000ffff00ff | |
26035 | lduba [%i6+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
26036 | ! Mem[0000000010081420] = c7883403, %l5 = 00000000ff1200ff | |
26037 | ldub [%i2+0x022],%l5 ! %l5 = 0000000000000034 | |
26038 | ! Mem[0000000010181408] = ff1200ff, %l1 = 0000000000000000 | |
26039 | lduha [%i6+%o4]0x80,%l1 ! %l1 = 000000000000ff12 | |
26040 | ! Mem[0000000010001438] = ff000000, %l5 = 0000000000000034 | |
26041 | lduw [%i0+0x038],%l5 ! %l5 = 00000000ff000000 | |
26042 | ! Mem[00000000300c1408] = ffff0000, %l7 = 00000000000000ff | |
26043 | lduha [%i3+%o4]0x81,%l7 ! %l7 = 000000000000ffff | |
26044 | ! Starting 10 instruction Store Burst | |
26045 | ! %l3 = 00000000000000f3, Mem[0000000010001410] = ff00000000000000, %asi = 80 | |
26046 | stxa %l3,[%i0+0x010]%asi ! Mem[0000000010001410] = 00000000000000f3 | |
26047 | ||
26048 | p0_label_622: | |
26049 | ! Mem[0000000030181408] = 00000000, %l2 = 00000000000000ff | |
26050 | swapa [%i6+%o4]0x89,%l2 ! %l2 = 0000000000000000 | |
26051 | ! %f27 = ffff9c00, Mem[00000000100c1410] = ff000000 | |
26052 | sta %f27,[%i3+%o5]0x88 ! Mem[00000000100c1410] = ffff9c00 | |
26053 | ! Mem[0000000010081408] = 0000ffff, %l6 = ffffffffffffffff | |
26054 | swapa [%i2+%o4]0x80,%l6 ! %l6 = 000000000000ffff | |
26055 | ! %f16 = ff0012f3 00009400, Mem[0000000010181408] = ff1200ff ffff9c00 | |
26056 | stda %f16,[%i6+0x008]%asi ! Mem[0000000010181408] = ff0012f3 00009400 | |
26057 | ! Mem[0000000010001410] = 00000000, %l0 = 0000000000000000 | |
26058 | ldstuba [%i0+%o5]0x80,%l0 ! %l0 = 00000000000000ff | |
26059 | ! %l0 = 0000000000000000, Mem[0000000010181421] = 000000ff, %asi = 80 | |
26060 | stba %l0,[%i6+0x021]%asi ! Mem[0000000010181420] = 000000ff | |
26061 | ! %l6 = 0000ffff, %l7 = 0000ffff, Mem[00000000300c1400] = ff000000 0000ffff | |
26062 | stda %l6,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 0000ffff 0000ffff | |
26063 | ! Mem[0000000010081408] = ffffffff, %l6 = 000000000000ffff | |
26064 | ldstuba [%i2+%o4]0x80,%l6 ! %l6 = 000000ff000000ff | |
26065 | ! %f16 = ff0012f3 00009400 000000ff 00000000 | |
26066 | ! %f20 = 00000000 ff000000 ff000000 c6000000 | |
26067 | ! %f24 = 000000ff 00000000 ff1200ff ffff9c00 | |
26068 | ! %f28 = 000000ff ffffffff 00000000 000000ff | |
26069 | stda %f16,[%i6]ASI_COMMIT_S ! Block Store to 0000000030181400 | |
26070 | ! Starting 10 instruction Load Burst | |
26071 | ! Mem[0000000010041408] = ffffff00, %l1 = 000000000000ff12 | |
26072 | lduba [%i1+%o4]0x88,%l1 ! %l1 = 0000000000000000 | |
26073 | ||
26074 | p0_label_623: | |
26075 | ! Mem[00000000300c1410] = 00000000, %l2 = 0000000000000000 | |
26076 | ldswa [%i3+%o5]0x81,%l2 ! %l2 = 0000000000000000 | |
26077 | ! Mem[0000000030141410] = ff00000000000000, %f4 = 00000000 174573fc | |
26078 | ldda [%i5+%o5]0x81,%f4 ! %f4 = ff000000 00000000 | |
26079 | ! Mem[0000000030041410] = 00001f41, %l2 = 0000000000000000 | |
26080 | ldswa [%i1+%o5]0x89,%l2 ! %l2 = 0000000000001f41 | |
26081 | ! Mem[0000000010041400] = 174573fc, %l2 = 0000000000001f41 | |
26082 | lduha [%i1+%g0]0x88,%l2 ! %l2 = 00000000000073fc | |
26083 | ! Mem[0000000030001410] = 00000000, %l7 = 000000000000ffff | |
26084 | ldsba [%i0+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
26085 | ! Mem[0000000010041410] = ff00000000000000, %l1 = 0000000000000000 | |
26086 | ldx [%i1+%o5],%l1 ! %l1 = ff00000000000000 | |
26087 | ! Mem[0000000030101410] = 76ff411f f31200ff, %l6 = 000000ff, %l7 = 00000000 | |
26088 | ldda [%i4+%o5]0x81,%l6 ! %l6 = 0000000076ff411f 00000000f31200ff | |
26089 | ! Mem[0000000030041410] = 00001f41, %l2 = 00000000000073fc | |
26090 | lduba [%i1+%o5]0x89,%l2 ! %l2 = 0000000000000041 | |
26091 | ! Mem[0000000030001410] = 00000000 00000000, %l4 = 00000000, %l5 = ff000000 | |
26092 | ldda [%i0+%o5]0x81,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
26093 | ! Starting 10 instruction Store Burst | |
26094 | ! %l0 = 0000000000000000, Mem[0000000030141400] = ffff0000 | |
26095 | stwa %l0,[%i5+%g0]0x81 ! Mem[0000000030141400] = 00000000 | |
26096 | ||
26097 | p0_label_624: | |
26098 | ! %l4 = 0000000000000000, Mem[0000000010041414] = 00000000 | |
26099 | sth %l4,[%i1+0x014] ! Mem[0000000010041414] = 00000000 | |
26100 | ! %l0 = 0000000000000000, Mem[0000000030081408] = 00ff000000000000 | |
26101 | stxa %l0,[%i2+%o4]0x81 ! Mem[0000000030081408] = 0000000000000000 | |
26102 | ! %l7 = 00000000f31200ff, Mem[0000000021800000] = ff8f13a3 | |
26103 | sth %l7,[%o3+%g0] ! Mem[0000000021800000] = 00ff13a3 | |
26104 | ! Mem[0000000030081400] = ffffffff, %l2 = 0000000000000041 | |
26105 | swapa [%i2+%g0]0x81,%l2 ! %l2 = 00000000ffffffff | |
26106 | ! %l6 = 0000000076ff411f, Mem[0000000030081400] = 0000004100000000 | |
26107 | stxa %l6,[%i2+%g0]0x81 ! Mem[0000000030081400] = 0000000076ff411f | |
26108 | ! Mem[0000000030001408] = ffff00ff, %l2 = 00000000ffffffff | |
26109 | swapa [%i0+%o4]0x89,%l2 ! %l2 = 00000000ffff00ff | |
26110 | membar #Sync ! Added by membar checker (108) | |
26111 | ! Mem[0000000010181400] = ff0012f3, %l2 = 00000000ffff00ff | |
26112 | swapa [%i6+%g0]0x88,%l2 ! %l2 = 00000000ff0012f3 | |
26113 | ! Mem[00000000211c0000] = ffff1a4c, %l5 = 0000000000000000 | |
26114 | ldstub [%o2+%g0],%l5 ! %l5 = 000000ff000000ff | |
26115 | ! %l1 = ff00000000000000, Mem[0000000030001400] = 00000000 | |
26116 | stwa %l1,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00000000 | |
26117 | ! Starting 10 instruction Load Burst | |
26118 | ! Mem[0000000010141408] = f31200ffff000000, %f4 = ff000000 00000000 | |
26119 | ldda [%i5+%o4]0x80,%f4 ! %f4 = f31200ff ff000000 | |
26120 | ||
26121 | p0_label_625: | |
26122 | ! Mem[000000001000143c] = 1f000076, %l3 = 00000000000000f3 | |
26123 | ldsb [%i0+0x03e],%l3 ! %l3 = 0000000000000000 | |
26124 | ! Mem[0000000010041400] = fc734517000000ff, %f20 = 00000000 ff000000 | |
26125 | ldda [%i1+0x000]%asi,%f20 ! %f20 = fc734517 000000ff | |
26126 | ! Mem[00000000300c1400] = 0000ffff, %l3 = 0000000000000000 | |
26127 | lduwa [%i3+%g0]0x81,%l3 ! %l3 = 000000000000ffff | |
26128 | ! Mem[0000000010041438] = 000000c6ffff0000, %f28 = 000000ff ffffffff | |
26129 | ldd [%i1+0x038],%f28 ! %f28 = 000000c6 ffff0000 | |
26130 | ! Mem[0000000030001408] = ffffffff, %l3 = 000000000000ffff | |
26131 | ldsha [%i0+%o4]0x81,%l3 ! %l3 = ffffffffffffffff | |
26132 | ! Mem[0000000030141410] = 00000000 000000ff, %l2 = ff0012f3, %l3 = ffffffff | |
26133 | ldda [%i5+%o5]0x89,%l2 ! %l2 = 00000000000000ff 0000000000000000 | |
26134 | ! Mem[00000000100c1410] = ffff0000ffff9c00, %l4 = 0000000000000000 | |
26135 | ldxa [%i3+%o5]0x88,%l4 ! %l4 = ffff0000ffff9c00 | |
26136 | ! Mem[0000000030181400] = f31200ff, %l4 = ffff0000ffff9c00 | |
26137 | ldswa [%i6+%g0]0x89,%l4 ! %l4 = fffffffff31200ff | |
26138 | ! Mem[0000000010141410] = 411f0000, %l6 = 0000000076ff411f | |
26139 | lduha [%i5+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
26140 | ! Starting 10 instruction Store Burst | |
26141 | ! Mem[00000000100c1410] = 009cffff, %l0 = 0000000000000000 | |
26142 | ldstuba [%i3+%o5]0x80,%l0 ! %l0 = 00000000000000ff | |
26143 | ||
26144 | ! Check Point 125 for processor 0 | |
26145 | ||
26146 | set p0_check_pt_data_125,%g4 | |
26147 | rd %ccr,%g5 ! %g5 = 44 | |
26148 | ldx [%g4+0x08],%g2 | |
26149 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
26150 | bne %xcc,p0_reg_check_fail0 | |
26151 | mov 0xee0,%g1 | |
26152 | ldx [%g4+0x10],%g2 | |
26153 | cmp %l1,%g2 ! %l1 = ff00000000000000 | |
26154 | bne %xcc,p0_reg_check_fail1 | |
26155 | mov 0xee1,%g1 | |
26156 | ldx [%g4+0x18],%g2 | |
26157 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
26158 | bne %xcc,p0_reg_check_fail2 | |
26159 | mov 0xee2,%g1 | |
26160 | ldx [%g4+0x20],%g2 | |
26161 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
26162 | bne %xcc,p0_reg_check_fail3 | |
26163 | mov 0xee3,%g1 | |
26164 | ldx [%g4+0x28],%g2 | |
26165 | cmp %l4,%g2 ! %l4 = fffffffff31200ff | |
26166 | bne %xcc,p0_reg_check_fail4 | |
26167 | mov 0xee4,%g1 | |
26168 | ldx [%g4+0x30],%g2 | |
26169 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
26170 | bne %xcc,p0_reg_check_fail5 | |
26171 | mov 0xee5,%g1 | |
26172 | ldx [%g4+0x38],%g2 | |
26173 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
26174 | bne %xcc,p0_reg_check_fail6 | |
26175 | mov 0xee6,%g1 | |
26176 | ldx [%g4+0x40],%g2 | |
26177 | cmp %l7,%g2 ! %l7 = 00000000f31200ff | |
26178 | bne %xcc,p0_reg_check_fail7 | |
26179 | mov 0xee7,%g1 | |
26180 | ldx [%g4+0x48],%g3 | |
26181 | std %f2,[%g4] | |
26182 | ldx [%g4],%g2 | |
26183 | cmp %g3,%g2 ! %f2 = 00940000 f31200ff | |
26184 | bne %xcc,p0_freg_check_fail | |
26185 | mov 0xf02,%g1 | |
26186 | ldx [%g4+0x50],%g3 | |
26187 | std %f4,[%g4] | |
26188 | ldx [%g4],%g2 | |
26189 | cmp %g3,%g2 ! %f4 = f31200ff ff000000 | |
26190 | bne %xcc,p0_freg_check_fail | |
26191 | mov 0xf04,%g1 | |
26192 | ldx [%g4+0x58],%g3 | |
26193 | std %f6,[%g4] | |
26194 | ldx [%g4],%g2 | |
26195 | cmp %g3,%g2 ! %f6 = 1f41ff76 2164159c | |
26196 | bne %xcc,p0_freg_check_fail | |
26197 | mov 0xf06,%g1 | |
26198 | ldx [%g4+0x60],%g3 | |
26199 | std %f20,[%g4] | |
26200 | ldx [%g4],%g2 | |
26201 | cmp %g3,%g2 ! %f20 = fc734517 000000ff | |
26202 | bne %xcc,p0_freg_check_fail | |
26203 | mov 0xf20,%g1 | |
26204 | ldx [%g4+0x68],%g3 | |
26205 | std %f28,[%g4] | |
26206 | ldx [%g4],%g2 | |
26207 | cmp %g3,%g2 ! %f28 = 000000c6 ffff0000 | |
26208 | bne %xcc,p0_freg_check_fail | |
26209 | mov 0xf28,%g1 | |
26210 | ||
26211 | ! Check Point 125 completed | |
26212 | ||
26213 | ||
26214 | p0_label_626: | |
26215 | ! Mem[0000000010041410] = ff000000, %l3 = 0000000000000000 | |
26216 | ldstuba [%i1+%o5]0x80,%l3 ! %l3 = 000000ff000000ff | |
26217 | ! %l7 = 00000000f31200ff, Mem[0000000030001400] = 00000000 | |
26218 | stba %l7,[%i0+%g0]0x81 ! Mem[0000000030001400] = ff000000 | |
26219 | ! %l6 = 0000000000000000, Mem[000000001014143c] = 00000000 | |
26220 | stb %l6,[%i5+0x03c] ! Mem[000000001014143c] = 00000000 | |
26221 | ! %l7 = 00000000f31200ff, Mem[0000000010041430] = 76ff411f, %asi = 80 | |
26222 | stba %l7,[%i1+0x030]%asi ! Mem[0000000010041430] = ffff411f | |
26223 | ! %l4 = fffffffff31200ff, Mem[0000000010081408] = ffffffff | |
26224 | stwa %l4,[%i2+%o4]0x80 ! Mem[0000000010081408] = f31200ff | |
26225 | ! %l2 = 00000000000000ff, Mem[0000000030081400] = 0000000076ff411f | |
26226 | stxa %l2,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000000000000ff | |
26227 | ! %l2 = 000000ff, %l3 = 000000ff, Mem[0000000010081400] = 00000000 ff000000 | |
26228 | stda %l2,[%i2+%g0]0x88 ! Mem[0000000010081400] = 000000ff 000000ff | |
26229 | ! Mem[00000000100c1433] = 76000000, %l0 = 0000000000000000 | |
26230 | ldstuba [%i3+0x033]%asi,%l0 ! %l0 = 00000000000000ff | |
26231 | ! %l1 = ff00000000000000, Mem[0000000020800040] = ffff7379 | |
26232 | stb %l1,[%o1+0x040] ! Mem[0000000020800040] = 00ff7379 | |
26233 | ! Starting 10 instruction Load Burst | |
26234 | ! Mem[0000000021800180] = ffffe2ae, %l0 = 0000000000000000 | |
26235 | ldsha [%o3+0x180]%asi,%l0 ! %l0 = ffffffffffffffff | |
26236 | ||
26237 | p0_label_627: | |
26238 | ! Mem[0000000030101410] = 1f41ff76, %l5 = 00000000000000ff | |
26239 | ldsba [%i4+%o5]0x89,%l5 ! %l5 = 0000000000000076 | |
26240 | ! Mem[0000000010081410] = ff000000, %l3 = 00000000000000ff | |
26241 | lduwa [%i2+%o5]0x80,%l3 ! %l3 = 00000000ff000000 | |
26242 | ! Mem[00000000100c142c] = 000079ff, %l7 = 00000000f31200ff | |
26243 | lduha [%i3+0x02c]%asi,%l7 ! %l7 = 0000000000000000 | |
26244 | ! Mem[0000000030101400] = ffff411f, %l1 = ff00000000000000 | |
26245 | ldsha [%i4+%g0]0x81,%l1 ! %l1 = ffffffffffffffff | |
26246 | ! Mem[0000000030181408] = 000000ff00000000, %f6 = 1f41ff76 2164159c | |
26247 | ldda [%i6+%o4]0x81,%f6 ! %f6 = 000000ff 00000000 | |
26248 | ! Mem[0000000010001418] = fffffc00, %l7 = 0000000000000000 | |
26249 | lduw [%i0+0x018],%l7 ! %l7 = 00000000fffffc00 | |
26250 | ! Mem[0000000030041408] = 0300000000000000, %f0 = ff000000 00000000 | |
26251 | ldda [%i1+%o4]0x89,%f0 ! %f0 = 03000000 00000000 | |
26252 | ! Mem[0000000010141400] = 000000ff, %l5 = 0000000000000076 | |
26253 | lduha [%i5+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
26254 | ! Mem[0000000030041408] = 00000000, %l0 = ffffffffffffffff | |
26255 | lduha [%i1+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
26256 | ! Starting 10 instruction Store Burst | |
26257 | ! Mem[0000000030141408] = ff000000, %l3 = 00000000ff000000 | |
26258 | ldstuba [%i5+%o4]0x81,%l3 ! %l3 = 000000ff000000ff | |
26259 | ||
26260 | p0_label_628: | |
26261 | ! %l7 = 00000000fffffc00, Mem[0000000010181410] = 00000000ff000000 | |
26262 | stxa %l7,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00000000fffffc00 | |
26263 | ! Mem[0000000010181410] = 00000000, %l2 = 00000000000000ff | |
26264 | ldstuba [%i6+%o5]0x88,%l2 ! %l2 = 00000000000000ff | |
26265 | ! Mem[0000000010141400] = ff000000, %l5 = 00000000000000ff | |
26266 | swapa [%i5+%g0]0x80,%l5 ! %l5 = 00000000ff000000 | |
26267 | ! Mem[00000000218000c1] = 00ff8d82, %l0 = 0000000000000000 | |
26268 | ldstuba [%o3+0x0c1]%asi,%l0 ! %l0 = 000000ff000000ff | |
26269 | ! %f20 = fc734517, Mem[0000000010101408] = f31200ff | |
26270 | sta %f20,[%i4+%o4]0x88 ! Mem[0000000010101408] = fc734517 | |
26271 | ! Mem[0000000010101430] = 00ff0000, %l7 = 00000000fffffc00 | |
26272 | swap [%i4+0x030],%l7 ! %l7 = 0000000000ff0000 | |
26273 | ! %f27 = ffff9c00, Mem[0000000030181400] = ff0012f3 | |
26274 | sta %f27,[%i6+%g0]0x81 ! Mem[0000000030181400] = ffff9c00 | |
26275 | ! Mem[0000000030081408] = 00000000, %l3 = 00000000000000ff | |
26276 | swapa [%i2+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
26277 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000030041400] = 00000000 00000000 | |
26278 | stda %l2,[%i1+%g0]0x81 ! Mem[0000000030041400] = 00000000 00000000 | |
26279 | ! Starting 10 instruction Load Burst | |
26280 | ! Mem[00000000100c1420] = 000000ff, %l2 = 0000000000000000 | |
26281 | ldsb [%i3+0x023],%l2 ! %l2 = ffffffffffffffff | |
26282 | ||
26283 | p0_label_629: | |
26284 | ! Mem[00000000100c1408] = 00000000, %l3 = 0000000000000000 | |
26285 | lduh [%i3+%o4],%l3 ! %l3 = 0000000000000000 | |
26286 | ! Mem[0000000030141400] = 00000000, %l1 = ffffffffffffffff | |
26287 | lduwa [%i5+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
26288 | ! Mem[00000000300c1410] = 00000000 00000000, %l2 = ffffffff, %l3 = 00000000 | |
26289 | ldda [%i3+%o5]0x89,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
26290 | ! Mem[0000000010101420] = c7883403, %f12 = ff000000 | |
26291 | ld [%i4+0x020],%f12 ! %f12 = c7883403 | |
26292 | ! Mem[0000000010001404] = ff790000, %l6 = 0000000000000000 | |
26293 | lduha [%i0+0x004]%asi,%l6 ! %l6 = 000000000000ff79 | |
26294 | ! Mem[0000000010101404] = c6000000, %f15 = 00000000 | |
26295 | lda [%i4+0x004]%asi,%f15 ! %f15 = c6000000 | |
26296 | ! Mem[0000000010141410] = 411f0000, %l0 = 00000000000000ff | |
26297 | ldswa [%i5+%o5]0x88,%l0 ! %l0 = 00000000411f0000 | |
26298 | ! Mem[00000000100c1428] = ffc4c676 000079ff, %l4 = f31200ff, %l5 = ff000000 | |
26299 | ldd [%i3+0x028],%l4 ! %l4 = 00000000ffc4c676 00000000000079ff | |
26300 | ! Mem[0000000020800040] = 00ff7379, %l7 = 0000000000ff0000 | |
26301 | ldub [%o1+0x041],%l7 ! %l7 = 00000000000000ff | |
26302 | ! Starting 10 instruction Store Burst | |
26303 | ! %l6 = 000000000000ff79, Mem[0000000030101400] = 1f41ffff | |
26304 | stha %l6,[%i4+%g0]0x89 ! Mem[0000000030101400] = 1f41ff79 | |
26305 | ||
26306 | p0_label_630: | |
26307 | ! %l7 = 00000000000000ff, Mem[00000000211c0000] = ffff1a4c | |
26308 | sth %l7,[%o2+%g0] ! Mem[00000000211c0000] = 00ff1a4c | |
26309 | ! %f10 = 03000000 00000000, Mem[0000000030041400] = 00000000 00000000 | |
26310 | stda %f10,[%i1+%g0]0x89 ! Mem[0000000030041400] = 03000000 00000000 | |
26311 | ! %l3 = 0000000000000000, Mem[0000000021800040] = ffff1df3, %asi = 80 | |
26312 | stha %l3,[%o3+0x040]%asi ! Mem[0000000021800040] = 00001df3 | |
26313 | ! %l2 = 0000000000000000, Mem[0000000010101410] = 000000ff | |
26314 | stwa %l2,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00000000 | |
26315 | ! %l6 = 0000ff79, %l7 = 000000ff, Mem[0000000010181410] = 000000ff 00fcffff | |
26316 | stda %l6,[%i6+%o5]0x88 ! Mem[0000000010181410] = 0000ff79 000000ff | |
26317 | ! %l0 = 411f0000, %l1 = 00000000, Mem[0000000010141400] = ff000000 fc734517 | |
26318 | stda %l0,[%i5+%g0]0x88 ! Mem[0000000010141400] = 411f0000 00000000 | |
26319 | ! %l2 = 0000000000000000, Mem[00000000201c0001] = 00009457, %asi = 80 | |
26320 | stba %l2,[%o0+0x001]%asi ! Mem[00000000201c0000] = 00009457 | |
26321 | ! %l6 = 000000000000ff79, Mem[00000000300c1400] = ffff0000ffff0000 | |
26322 | stxa %l6,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 000000000000ff79 | |
26323 | ! %l7 = 00000000000000ff, Mem[0000000030181410] = 000000ff00000000 | |
26324 | stxa %l7,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000000000ff | |
26325 | ! Starting 10 instruction Load Burst | |
26326 | ! Mem[0000000010081434] = 000000ff, %l7 = 00000000000000ff | |
26327 | lduba [%i2+0x036]%asi,%l7 ! %l7 = 0000000000000000 | |
26328 | ||
26329 | ! Check Point 126 for processor 0 | |
26330 | ||
26331 | set p0_check_pt_data_126,%g4 | |
26332 | rd %ccr,%g5 ! %g5 = 44 | |
26333 | ldx [%g4+0x08],%g2 | |
26334 | cmp %l0,%g2 ! %l0 = 00000000411f0000 | |
26335 | bne %xcc,p0_reg_check_fail0 | |
26336 | mov 0xee0,%g1 | |
26337 | ldx [%g4+0x10],%g2 | |
26338 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
26339 | bne %xcc,p0_reg_check_fail1 | |
26340 | mov 0xee1,%g1 | |
26341 | ldx [%g4+0x18],%g2 | |
26342 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
26343 | bne %xcc,p0_reg_check_fail2 | |
26344 | mov 0xee2,%g1 | |
26345 | ldx [%g4+0x20],%g2 | |
26346 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
26347 | bne %xcc,p0_reg_check_fail3 | |
26348 | mov 0xee3,%g1 | |
26349 | ldx [%g4+0x28],%g2 | |
26350 | cmp %l5,%g2 ! %l5 = 00000000000079ff | |
26351 | bne %xcc,p0_reg_check_fail5 | |
26352 | mov 0xee5,%g1 | |
26353 | ldx [%g4+0x30],%g2 | |
26354 | cmp %l6,%g2 ! %l6 = 000000000000ff79 | |
26355 | bne %xcc,p0_reg_check_fail6 | |
26356 | mov 0xee6,%g1 | |
26357 | ldx [%g4+0x38],%g2 | |
26358 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
26359 | bne %xcc,p0_reg_check_fail7 | |
26360 | mov 0xee7,%g1 | |
26361 | ldx [%g4+0x40],%g3 | |
26362 | std %f0,[%g4] | |
26363 | ldx [%g4],%g2 | |
26364 | cmp %g3,%g2 ! %f0 = 03000000 00000000 | |
26365 | bne %xcc,p0_freg_check_fail | |
26366 | mov 0xf00,%g1 | |
26367 | ldx [%g4+0x48],%g3 | |
26368 | std %f2,[%g4] | |
26369 | ldx [%g4],%g2 | |
26370 | cmp %g3,%g2 ! %f2 = 00940000 f31200ff | |
26371 | bne %xcc,p0_freg_check_fail | |
26372 | mov 0xf02,%g1 | |
26373 | ldx [%g4+0x50],%g3 | |
26374 | std %f4,[%g4] | |
26375 | ldx [%g4],%g2 | |
26376 | cmp %g3,%g2 ! %f4 = f31200ff ff000000 | |
26377 | bne %xcc,p0_freg_check_fail | |
26378 | mov 0xf04,%g1 | |
26379 | ldx [%g4+0x58],%g3 | |
26380 | std %f6,[%g4] | |
26381 | ldx [%g4],%g2 | |
26382 | cmp %g3,%g2 ! %f6 = 000000ff 00000000 | |
26383 | bne %xcc,p0_freg_check_fail | |
26384 | mov 0xf06,%g1 | |
26385 | ldx [%g4+0x60],%g3 | |
26386 | std %f12,[%g4] | |
26387 | ldx [%g4],%g2 | |
26388 | cmp %g3,%g2 ! %f12 = c7883403 0000ff00 | |
26389 | bne %xcc,p0_freg_check_fail | |
26390 | mov 0xf12,%g1 | |
26391 | ldx [%g4+0x68],%g3 | |
26392 | std %f14,[%g4] | |
26393 | ldx [%g4],%g2 | |
26394 | cmp %g3,%g2 ! %f14 = 00000000 c6000000 | |
26395 | bne %xcc,p0_freg_check_fail | |
26396 | mov 0xf14,%g1 | |
26397 | ||
26398 | ! Check Point 126 completed | |
26399 | ||
26400 | ||
26401 | p0_label_631: | |
26402 | ! Mem[00000000300c1400] = 79ff0000, %l5 = 00000000000079ff | |
26403 | lduba [%i3+%g0]0x81,%l5 ! %l5 = 0000000000000079 | |
26404 | ! Mem[0000000010181400] = ffff00ff, %l3 = 0000000000000000 | |
26405 | lduba [%i6+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
26406 | ! Mem[0000000010141400] = 00001f4100000000, %f14 = 00000000 c6000000 | |
26407 | ldda [%i5+%g0]0x80,%f14 ! %f14 = 00001f41 00000000 | |
26408 | ! Mem[0000000030001408] = ffffffff, %l0 = 00000000411f0000 | |
26409 | lduba [%i0+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
26410 | ! Mem[00000000300c1408] = 000000000000ffff, %f30 = 00000000 000000ff | |
26411 | ldda [%i3+%o4]0x89,%f30 ! %f30 = 00000000 0000ffff | |
26412 | ! Mem[00000000100c1410] = ff9cffff, %l3 = 00000000000000ff | |
26413 | ldsw [%i3+%o5],%l3 ! %l3 = ffffffffff9cffff | |
26414 | ! Mem[0000000010081400] = 000000ff, %l5 = 0000000000000079 | |
26415 | lduba [%i2+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
26416 | ! Mem[0000000030141410] = ff000000, %l3 = ffffffffff9cffff | |
26417 | ldswa [%i5+%o5]0x81,%l3 ! %l3 = ffffffffff000000 | |
26418 | ! Mem[00000000300c1410] = 0000000000000000, %l7 = 0000000000000000 | |
26419 | ldxa [%i3+%o5]0x89,%l7 ! %l7 = 0000000000000000 | |
26420 | ! Starting 10 instruction Store Burst | |
26421 | ! Mem[0000000010001400] = ffff0000, %l3 = ffffffffff000000 | |
26422 | ldstuba [%i0+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
26423 | ||
26424 | p0_label_632: | |
26425 | ! %f24 = 000000ff 00000000, Mem[0000000010141408] = ff0012f3 000000ff | |
26426 | stda %f24,[%i5+%o4]0x88 ! Mem[0000000010141408] = 000000ff 00000000 | |
26427 | ! %l4 = 00000000ffc4c676, Mem[0000000021800100] = 000011d1, %asi = 80 | |
26428 | stha %l4,[%o3+0x100]%asi ! Mem[0000000021800100] = c67611d1 | |
26429 | ! Mem[0000000030101408] = ffffff00, %l0 = 00000000000000ff | |
26430 | swapa [%i4+%o4]0x89,%l0 ! %l0 = 00000000ffffff00 | |
26431 | ! Mem[0000000010081408] = f31200ff, %l3 = 0000000000000000 | |
26432 | ldstuba [%i2+%o4]0x80,%l3 ! %l3 = 000000f3000000ff | |
26433 | ! %l3 = 00000000000000f3, Mem[0000000030141400] = 00000000 | |
26434 | stha %l3,[%i5+%g0]0x89 ! Mem[0000000030141400] = 000000f3 | |
26435 | ! %f18 = 000000ff 00000000, Mem[0000000010181400] = ff00ffff 597bac10 | |
26436 | stda %f18,[%i6+%g0]0x80 ! Mem[0000000010181400] = 000000ff 00000000 | |
26437 | ! Mem[00000000201c0001] = 00009457, %l1 = 0000000000000000 | |
26438 | ldstub [%o0+0x001],%l1 ! %l1 = 00000000000000ff | |
26439 | ! %l7 = 0000000000000000, Mem[0000000020800000] = 00ff8470, %asi = 80 | |
26440 | stha %l7,[%o1+0x000]%asi ! Mem[0000000020800000] = 00008470 | |
26441 | ! Mem[00000000100c1410] = ff9cffff, %l5 = 00000000000000ff, %asi = 80 | |
26442 | swapa [%i3+0x010]%asi,%l5 ! %l5 = 00000000ff9cffff | |
26443 | ! Starting 10 instruction Load Burst | |
26444 | ! Mem[00000000201c0000] = 00ff9457, %l3 = 00000000000000f3 | |
26445 | ldsba [%o0+0x000]%asi,%l3 ! %l3 = 0000000000000000 | |
26446 | ||
26447 | p0_label_633: | |
26448 | ! Mem[0000000030181400] = 009cffff, %l6 = 000000000000ff79 | |
26449 | ldsha [%i6+%g0]0x89,%l6 ! %l6 = ffffffffffffffff | |
26450 | ! Mem[00000000300c1400] = 79ff000000000000, %f18 = 000000ff 00000000 | |
26451 | ldda [%i3+%g0]0x81,%f18 ! %f18 = 79ff0000 00000000 | |
26452 | ! Mem[00000000100c142c] = 000079ff, %l5 = 00000000ff9cffff | |
26453 | ldsba [%i3+0x02f]%asi,%l5 ! %l5 = ffffffffffffffff | |
26454 | ! Mem[0000000030101410] = 1f41ff76, %l5 = ffffffffffffffff | |
26455 | lduba [%i4+%o5]0x89,%l5 ! %l5 = 0000000000000076 | |
26456 | ! Mem[00000000100c1408] = 00000000, %l2 = 0000000000000000 | |
26457 | ldsba [%i3+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
26458 | ! Mem[0000000010181408] = ff0012f3, %f25 = 00000000 | |
26459 | lda [%i6+%o4]0x80,%f25 ! %f25 = ff0012f3 | |
26460 | ! Mem[0000000030081408] = ff000000, %l5 = 0000000000000076 | |
26461 | ldsha [%i2+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
26462 | ! Mem[0000000010081414] = 00000000, %l5 = 0000000000000000 | |
26463 | lduh [%i2+0x014],%l5 ! %l5 = 0000000000000000 | |
26464 | ! Mem[0000000030001400] = 000000ff, %l0 = 00000000ffffff00 | |
26465 | lduba [%i0+%g0]0x89,%l0 ! %l0 = 00000000000000ff | |
26466 | ! Starting 10 instruction Store Burst | |
26467 | ! %l2 = 0000000000000000, Mem[0000000030001400] = ff000000000000ff | |
26468 | stxa %l2,[%i0+%g0]0x89 ! Mem[0000000030001400] = 0000000000000000 | |
26469 | ||
26470 | p0_label_634: | |
26471 | ! %f22 = ff000000 c6000000, Mem[0000000030081400] = 00000000 ff000000 | |
26472 | stda %f22,[%i2+%g0]0x89 ! Mem[0000000030081400] = ff000000 c6000000 | |
26473 | ! %l1 = 0000000000000000, Mem[00000000300c1400] = 000000000000ff79 | |
26474 | stxa %l1,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 0000000000000000 | |
26475 | ! %f0 = 03000000 00000000 00940000 f31200ff | |
26476 | ! %f4 = f31200ff ff000000 000000ff 00000000 | |
26477 | ! %f8 = 0000ff00 033488c7 03000000 00000000 | |
26478 | ! %f12 = c7883403 0000ff00 00001f41 00000000 | |
26479 | stda %f0,[%i6]ASI_COMMIT_S ! Block Store to 0000000030181400 | |
26480 | ! %f29 = ffff0000, Mem[0000000030041408] = 00000000 | |
26481 | sta %f29,[%i1+%o4]0x89 ! Mem[0000000030041408] = ffff0000 | |
26482 | ! Mem[0000000030101410] = 1f41ff76, %l1 = 0000000000000000 | |
26483 | ldstuba [%i4+%o5]0x89,%l1 ! %l1 = 00000076000000ff | |
26484 | ! %l6 = ffffffffffffffff, immed = fffff358, %y = 00000000 | |
26485 | sdiv %l6,-0xca8,%l7 ! %l7 = ffffffffffebc5d9 | |
26486 | mov %l0,%y ! %y = 000000ff | |
26487 | ! %l3 = 0000000000000000, Mem[0000000010001410] = ff000000 | |
26488 | stwa %l3,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 | |
26489 | ! %l3 = 0000000000000000, Mem[0000000010001410] = 00000000 | |
26490 | stwa %l3,[%i0+%o5]0x80 ! Mem[0000000010001410] = 00000000 | |
26491 | ! Mem[00000000100c1408] = 00000000, %l4 = 00000000ffc4c676 | |
26492 | swapa [%i3+%o4]0x88,%l4 ! %l4 = 0000000000000000 | |
26493 | ! Starting 10 instruction Load Burst | |
26494 | ! Mem[0000000010001400] = ff00ffffff790000, %l4 = 0000000000000000 | |
26495 | ldxa [%i0+%g0]0x80,%l4 ! %l4 = ff00ffffff790000 | |
26496 | ||
26497 | p0_label_635: | |
26498 | ! Mem[00000000100c1410] = ff000000, %l7 = ffffffffffebc5d9 | |
26499 | lduba [%i3+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
26500 | ! Mem[0000000030081410] = ff000000ffff0000, %l0 = 00000000000000ff | |
26501 | ldxa [%i2+%o5]0x81,%l0 ! %l0 = ff000000ffff0000 | |
26502 | ! Mem[00000000201c0000] = 00ff9457, %l5 = 0000000000000000 | |
26503 | lduh [%o0+%g0],%l5 ! %l5 = 00000000000000ff | |
26504 | ! Mem[00000000300c1408] = 0000ffff, %l2 = 0000000000000000 | |
26505 | lduha [%i3+%o4]0x89,%l2 ! %l2 = 000000000000ffff | |
26506 | ! Mem[0000000010081430] = 00ff0000000000ff, %f16 = ff0012f3 00009400 | |
26507 | ldd [%i2+0x030],%f16 ! %f16 = 00ff0000 000000ff | |
26508 | membar #Sync ! Added by membar checker (109) | |
26509 | ! Mem[0000000010181410] = 79ff0000ff000000, %f26 = ff1200ff ffff9c00 | |
26510 | ldda [%i6+%o5]0x80,%f26 ! %f26 = 79ff0000 ff000000 | |
26511 | ! Mem[0000000010181410] = 0000ff79, %l0 = ff000000ffff0000 | |
26512 | ldswa [%i6+%o5]0x88,%l0 ! %l0 = 000000000000ff79 | |
26513 | ! Mem[0000000030041408] = 03000000ffff0000, %l7 = 0000000000000000 | |
26514 | ldxa [%i1+%o4]0x89,%l7 ! %l7 = 03000000ffff0000 | |
26515 | ! Mem[00000000100c1418] = 00000012, %l5 = 00000000000000ff | |
26516 | lduha [%i3+0x018]%asi,%l5 ! %l5 = 0000000000000000 | |
26517 | ! Starting 10 instruction Store Burst | |
26518 | ! %l2 = 000000000000ffff, Mem[0000000010041410] = 000000ff | |
26519 | stha %l2,[%i1+%o5]0x88 ! Mem[0000000010041410] = 0000ffff | |
26520 | ||
26521 | ! Check Point 127 for processor 0 | |
26522 | ||
26523 | set p0_check_pt_data_127,%g4 | |
26524 | rd %ccr,%g5 ! %g5 = 44 | |
26525 | ldx [%g4+0x08],%g2 | |
26526 | cmp %l0,%g2 ! %l0 = 000000000000ff79 | |
26527 | bne %xcc,p0_reg_check_fail0 | |
26528 | mov 0xee0,%g1 | |
26529 | ldx [%g4+0x10],%g2 | |
26530 | cmp %l1,%g2 ! %l1 = 0000000000000076 | |
26531 | bne %xcc,p0_reg_check_fail1 | |
26532 | mov 0xee1,%g1 | |
26533 | ldx [%g4+0x18],%g2 | |
26534 | cmp %l2,%g2 ! %l2 = 000000000000ffff | |
26535 | bne %xcc,p0_reg_check_fail2 | |
26536 | mov 0xee2,%g1 | |
26537 | ldx [%g4+0x20],%g2 | |
26538 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
26539 | bne %xcc,p0_reg_check_fail3 | |
26540 | mov 0xee3,%g1 | |
26541 | ldx [%g4+0x28],%g2 | |
26542 | cmp %l4,%g2 ! %l4 = ff00ffffff790000 | |
26543 | bne %xcc,p0_reg_check_fail4 | |
26544 | mov 0xee4,%g1 | |
26545 | ldx [%g4+0x30],%g2 | |
26546 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
26547 | bne %xcc,p0_reg_check_fail5 | |
26548 | mov 0xee5,%g1 | |
26549 | ldx [%g4+0x38],%g2 | |
26550 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
26551 | bne %xcc,p0_reg_check_fail6 | |
26552 | mov 0xee6,%g1 | |
26553 | ldx [%g4+0x40],%g2 | |
26554 | cmp %l7,%g2 ! %l7 = 03000000ffff0000 | |
26555 | bne %xcc,p0_reg_check_fail7 | |
26556 | mov 0xee7,%g1 | |
26557 | ldx [%g4+0x48],%g3 | |
26558 | std %f14,[%g4] | |
26559 | ldx [%g4],%g2 | |
26560 | cmp %g3,%g2 ! %f14 = 00001f41 00000000 | |
26561 | bne %xcc,p0_freg_check_fail | |
26562 | mov 0xf14,%g1 | |
26563 | ldx [%g4+0x50],%g3 | |
26564 | std %f16,[%g4] | |
26565 | ldx [%g4],%g2 | |
26566 | cmp %g3,%g2 ! %f16 = 00ff0000 000000ff | |
26567 | bne %xcc,p0_freg_check_fail | |
26568 | mov 0xf16,%g1 | |
26569 | ldx [%g4+0x58],%g3 | |
26570 | std %f18,[%g4] | |
26571 | ldx [%g4],%g2 | |
26572 | cmp %g3,%g2 ! %f18 = 79ff0000 00000000 | |
26573 | bne %xcc,p0_freg_check_fail | |
26574 | mov 0xf18,%g1 | |
26575 | ldx [%g4+0x60],%g3 | |
26576 | std %f24,[%g4] | |
26577 | ldx [%g4],%g2 | |
26578 | cmp %g3,%g2 ! %f24 = 000000ff ff0012f3 | |
26579 | bne %xcc,p0_freg_check_fail | |
26580 | mov 0xf24,%g1 | |
26581 | ldx [%g4+0x68],%g3 | |
26582 | std %f26,[%g4] | |
26583 | ldx [%g4],%g2 | |
26584 | cmp %g3,%g2 ! %f26 = 79ff0000 ff000000 | |
26585 | bne %xcc,p0_freg_check_fail | |
26586 | mov 0xf26,%g1 | |
26587 | ldx [%g4+0x70],%g3 | |
26588 | std %f30,[%g4] | |
26589 | ldx [%g4],%g2 | |
26590 | cmp %g3,%g2 ! %f30 = 00000000 0000ffff | |
26591 | bne %xcc,p0_freg_check_fail | |
26592 | mov 0xf30,%g1 | |
26593 | ||
26594 | ! Check Point 127 completed | |
26595 | ||
26596 | ||
26597 | p0_label_636: | |
26598 | ! Mem[0000000010101408] = fc734517, %l5 = 0000000000000000 | |
26599 | swapa [%i4+%o4]0x88,%l5 ! %l5 = 00000000fc734517 | |
26600 | ! %f8 = 0000ff00 033488c7, %l6 = ffffffffffffffff | |
26601 | ! Mem[0000000030101420] = ff0000ffc6000000 | |
26602 | add %i4,0x020,%g1 | |
26603 | stda %f8,[%g1+%l6]ASI_PST8_S ! Mem[0000000030101420] = 0000ff00033488c7 | |
26604 | ! %l1 = 0000000000000076, Mem[0000000010001408] = ff000000 | |
26605 | stwa %l1,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000076 | |
26606 | ! %f2 = 00940000 f31200ff, Mem[0000000030081408] = ff000000 00000000 | |
26607 | stda %f2 ,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00940000 f31200ff | |
26608 | ! %f20 = fc734517 000000ff, Mem[0000000030181400] = 03000000 00000000 | |
26609 | stda %f20,[%i6+%g0]0x81 ! Mem[0000000030181400] = fc734517 000000ff | |
26610 | ! %l4 = ff00ffffff790000, Mem[00000000300c1400] = 00000000 | |
26611 | stwa %l4,[%i3+%g0]0x81 ! Mem[00000000300c1400] = ff790000 | |
26612 | ! Mem[0000000010101418] = 9c156421, %l2 = 000000000000ffff, %asi = 80 | |
26613 | swapa [%i4+0x018]%asi,%l2 ! %l2 = 000000009c156421 | |
26614 | ! %l5 = 00000000fc734517, Mem[0000000010101400] = ff000000 | |
26615 | stba %l5,[%i4+%g0]0x80 ! Mem[0000000010101400] = 17000000 | |
26616 | ! Mem[0000000010081418] = 9c156421, %l3 = 00000000, %l7 = ffff0000 | |
26617 | add %i2,0x18,%g1 | |
26618 | casa [%g1]0x80,%l3,%l7 ! %l7 = 000000009c156421 | |
26619 | ! Starting 10 instruction Load Burst | |
26620 | ! Mem[0000000010001400] = ff00ffffff790000, %f0 = 03000000 00000000 | |
26621 | ldda [%i0+%g0]0x80,%f0 ! %f0 = ff00ffff ff790000 | |
26622 | ||
26623 | p0_label_637: | |
26624 | ! Mem[0000000030081400] = ff000000 c6000000, %l4 = ff790000, %l5 = fc734517 | |
26625 | ldda [%i2+%g0]0x89,%l4 ! %l4 = 00000000c6000000 00000000ff000000 | |
26626 | ! Mem[00000000300c1410] = 00000000 00000000, %l0 = 0000ff79, %l1 = 00000076 | |
26627 | ldda [%i3+%o5]0x89,%l0 ! %l0 = 0000000000000000 0000000000000000 | |
26628 | ! Mem[0000000010001400] = ff00ffffff790000, %f14 = 00001f41 00000000 | |
26629 | ldda [%i0+%g0]0x80,%f14 ! %f14 = ff00ffff ff790000 | |
26630 | ! Mem[0000000010181400] = ff000000, %l5 = 00000000ff000000 | |
26631 | ldswa [%i6+%g0]0x88,%l5 ! %l5 = ffffffffff000000 | |
26632 | ! Mem[0000000030041410] = 00001f41, %f15 = ff790000 | |
26633 | lda [%i1+%o5]0x89,%f15 ! %f15 = 00001f41 | |
26634 | ! Mem[0000000030041408] = ffff0000, %l3 = 0000000000000000 | |
26635 | lduha [%i1+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
26636 | ! Mem[0000000010181408] = ff0012f3, %l3 = 0000000000000000 | |
26637 | ldsha [%i6+%o4]0x80,%l3 ! %l3 = ffffffffffffff00 | |
26638 | ! Mem[00000000211c0000] = 00ff1a4c, %l6 = ffffffffffffffff | |
26639 | lduba [%o2+0x001]%asi,%l6 ! %l6 = 00000000000000ff | |
26640 | ! Mem[0000000010041408] = ffffff00, %f30 = 00000000 | |
26641 | lda [%i1+%o4]0x88,%f30 ! %f30 = ffffff00 | |
26642 | ! Starting 10 instruction Store Burst | |
26643 | ! %l1 = 0000000000000000, Mem[00000000100c1408] = 76c6c4ff | |
26644 | stba %l1,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00c6c4ff | |
26645 | ||
26646 | p0_label_638: | |
26647 | ! Mem[00000000100c1408] = ffc4c600, %l1 = 0000000000000000 | |
26648 | ldstuba [%i3+%o4]0x88,%l1 ! %l1 = 00000000000000ff | |
26649 | ! Mem[0000000010081400] = ff000000, %l5 = ffffffffff000000 | |
26650 | swapa [%i2+%g0]0x80,%l5 ! %l5 = 00000000ff000000 | |
26651 | ! %f18 = 79ff0000 00000000, Mem[0000000010181408] = ff0012f3 00009400 | |
26652 | std %f18,[%i6+%o4] ! Mem[0000000010181408] = 79ff0000 00000000 | |
26653 | ! Mem[0000000010041410] = 0000ffff, %l4 = 00000000c6000000 | |
26654 | swapa [%i1+%o5]0x88,%l4 ! %l4 = 000000000000ffff | |
26655 | ! %l7 = 000000009c156421, Mem[0000000030141410] = 000000ff | |
26656 | stha %l7,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00006421 | |
26657 | ! %l2 = 000000009c156421, Mem[0000000030081400] = 000000c6 | |
26658 | stba %l2,[%i2+%g0]0x81 ! Mem[0000000030081400] = 210000c6 | |
26659 | ! %l1 = 0000000000000000, Mem[0000000010041412] = 000000c6 | |
26660 | sth %l1,[%i1+0x012] ! Mem[0000000010041410] = 00000000 | |
26661 | ! %l0 = 0000000000000000, Mem[0000000010041414] = 00000000, %asi = 80 | |
26662 | stwa %l0,[%i1+0x014]%asi ! Mem[0000000010041414] = 00000000 | |
26663 | ! Mem[0000000010181410] = 79ff0000, %l4 = 000000000000ffff | |
26664 | swapa [%i6+%o5]0x80,%l4 ! %l4 = 0000000079ff0000 | |
26665 | ! Starting 10 instruction Load Burst | |
26666 | ! Mem[0000000010101424] = 00ff0000, %l0 = 0000000000000000 | |
26667 | ldsw [%i4+0x024],%l0 ! %l0 = 0000000000ff0000 | |
26668 | ||
26669 | p0_label_639: | |
26670 | ! Mem[0000000010041410] = 00000000, %l1 = 0000000000000000 | |
26671 | lduwa [%i1+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
26672 | ! Mem[0000000010181410] = 0000ffff, %f3 = f31200ff | |
26673 | lda [%i6+%o5]0x80,%f3 ! %f3 = 0000ffff | |
26674 | ! Mem[0000000030181410] = f31200ff ff000000, %l0 = 00ff0000, %l1 = 00000000 | |
26675 | ldda [%i6+%o5]0x81,%l0 ! %l0 = 00000000f31200ff 00000000ff000000 | |
26676 | ! Mem[0000000020800000] = 00008470, %l2 = 000000009c156421 | |
26677 | lduba [%o1+0x001]%asi,%l2 ! %l2 = 0000000000000000 | |
26678 | ! Mem[0000000010081408] = ff1200ff 00009c15, %l6 = 000000ff, %l7 = 9c156421 | |
26679 | ldda [%i2+%o4]0x80,%l6 ! %l6 = 00000000ff1200ff 0000000000009c15 | |
26680 | ! Mem[0000000030081408] = f31200ff, %l7 = 0000000000009c15 | |
26681 | ldswa [%i2+%o4]0x89,%l7 ! %l7 = fffffffff31200ff | |
26682 | ! Mem[0000000010081400] = ff000000, %l4 = 0000000079ff0000 | |
26683 | lduba [%i2+0x000]%asi,%l4 ! %l4 = 00000000000000ff | |
26684 | ! Mem[0000000010101410] = 00000000 00000000, %l6 = ff1200ff, %l7 = f31200ff | |
26685 | ldda [%i4+%o5]0x88,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
26686 | ! Mem[0000000030081410] = ff000000, %l0 = 00000000f31200ff | |
26687 | lduha [%i2+%o5]0x81,%l0 ! %l0 = 000000000000ff00 | |
26688 | ! Starting 10 instruction Store Burst | |
26689 | ! Mem[0000000010181400] = 000000ff00000000, %l3 = ffffffffffffff00, %l0 = 000000000000ff00 | |
26690 | casxa [%i6]0x80,%l3,%l0 ! %l0 = 000000ff00000000 | |
26691 | ||
26692 | p0_label_640: | |
26693 | ! %f0 = ff00ffff ff790000 00940000 0000ffff | |
26694 | ! %f4 = f31200ff ff000000 000000ff 00000000 | |
26695 | ! %f8 = 0000ff00 033488c7 03000000 00000000 | |
26696 | ! %f12 = c7883403 0000ff00 ff00ffff 00001f41 | |
26697 | stda %f0,[%i6]ASI_BLK_AIUPL ! Block Store to 0000000010181400 | |
26698 | ! %l0 = 00000000, %l1 = ff000000, Mem[0000000010041408] = 00ffffff 79ffffff | |
26699 | std %l0,[%i1+%o4] ! Mem[0000000010041408] = 00000000 ff000000 | |
26700 | ! Mem[0000000010001408] = 00000076, %l5 = 00000000ff000000 | |
26701 | ldstuba [%i0+%o4]0x80,%l5 ! %l5 = 00000000000000ff | |
26702 | ! %l7 = 0000000000000000, Mem[0000000010181408] = 0000ffff | |
26703 | stwa %l7,[%i6+%o4]0x88 ! Mem[0000000010181408] = 00000000 | |
26704 | ! Mem[0000000010081420] = c7883403, %l6 = 00000000, %l2 = 00000000 | |
26705 | add %i2,0x20,%g1 | |
26706 | casa [%g1]0x80,%l6,%l2 ! %l2 = 00000000c7883403 | |
26707 | ! %f24 = 000000ff ff0012f3, %l4 = 00000000000000ff | |
26708 | ! Mem[00000000100c1428] = ffc4c676000079ff | |
26709 | add %i3,0x028,%g1 | |
26710 | stda %f24,[%g1+%l4]ASI_PST32_PL ! Mem[00000000100c1428] = f31200ffff000000 | |
26711 | ! %l2 = 00000000c7883403, Mem[0000000030081400] = 210000c6000000ff | |
26712 | stxa %l2,[%i2+%g0]0x81 ! Mem[0000000030081400] = 00000000c7883403 | |
26713 | ! %l2 = 00000000c7883403, Mem[0000000030001400] = 00000000 | |
26714 | stwa %l2,[%i0+%g0]0x81 ! Mem[0000000030001400] = c7883403 | |
26715 | ! %f28 = 000000c6 ffff0000, Mem[0000000010001430] = ff000000 00000000 | |
26716 | stda %f28,[%i0+0x030]%asi ! Mem[0000000010001430] = 000000c6 ffff0000 | |
26717 | ! Starting 10 instruction Load Burst | |
26718 | ! Mem[0000000021800080] = ffffa433, %l0 = 000000ff00000000 | |
26719 | ldsba [%o3+0x081]%asi,%l0 ! %l0 = ffffffffffffffff | |
26720 | ||
26721 | ! Check Point 128 for processor 0 | |
26722 | ||
26723 | set p0_check_pt_data_128,%g4 | |
26724 | rd %ccr,%g5 ! %g5 = 44 | |
26725 | ldx [%g4+0x08],%g2 | |
26726 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
26727 | bne %xcc,p0_reg_check_fail0 | |
26728 | mov 0xee0,%g1 | |
26729 | ldx [%g4+0x10],%g2 | |
26730 | cmp %l1,%g2 ! %l1 = 00000000ff000000 | |
26731 | bne %xcc,p0_reg_check_fail1 | |
26732 | mov 0xee1,%g1 | |
26733 | ldx [%g4+0x18],%g2 | |
26734 | cmp %l2,%g2 ! %l2 = 00000000c7883403 | |
26735 | bne %xcc,p0_reg_check_fail2 | |
26736 | mov 0xee2,%g1 | |
26737 | ldx [%g4+0x20],%g2 | |
26738 | cmp %l3,%g2 ! %l3 = ffffffffffffff00 | |
26739 | bne %xcc,p0_reg_check_fail3 | |
26740 | mov 0xee3,%g1 | |
26741 | ldx [%g4+0x28],%g2 | |
26742 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
26743 | bne %xcc,p0_reg_check_fail4 | |
26744 | mov 0xee4,%g1 | |
26745 | ldx [%g4+0x30],%g2 | |
26746 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
26747 | bne %xcc,p0_reg_check_fail5 | |
26748 | mov 0xee5,%g1 | |
26749 | ldx [%g4+0x38],%g2 | |
26750 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
26751 | bne %xcc,p0_reg_check_fail6 | |
26752 | mov 0xee6,%g1 | |
26753 | ldx [%g4+0x40],%g2 | |
26754 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
26755 | bne %xcc,p0_reg_check_fail7 | |
26756 | mov 0xee7,%g1 | |
26757 | ldx [%g4+0x48],%g3 | |
26758 | std %f0,[%g4] | |
26759 | ldx [%g4],%g2 | |
26760 | cmp %g3,%g2 ! %f0 = ff00ffff ff790000 | |
26761 | bne %xcc,p0_freg_check_fail | |
26762 | mov 0xf00,%g1 | |
26763 | ldx [%g4+0x50],%g3 | |
26764 | std %f2,[%g4] | |
26765 | ldx [%g4],%g2 | |
26766 | cmp %g3,%g2 ! %f2 = 00940000 0000ffff | |
26767 | bne %xcc,p0_freg_check_fail | |
26768 | mov 0xf02,%g1 | |
26769 | ldx [%g4+0x58],%g3 | |
26770 | std %f4,[%g4] | |
26771 | ldx [%g4],%g2 | |
26772 | cmp %g3,%g2 ! %f4 = f31200ff ff000000 | |
26773 | bne %xcc,p0_freg_check_fail | |
26774 | mov 0xf04,%g1 | |
26775 | ldx [%g4+0x60],%g3 | |
26776 | std %f6,[%g4] | |
26777 | ldx [%g4],%g2 | |
26778 | cmp %g3,%g2 ! %f6 = 000000ff 00000000 | |
26779 | bne %xcc,p0_freg_check_fail | |
26780 | mov 0xf06,%g1 | |
26781 | ldx [%g4+0x68],%g3 | |
26782 | std %f14,[%g4] | |
26783 | ldx [%g4],%g2 | |
26784 | cmp %g3,%g2 ! %f14 = ff00ffff 00001f41 | |
26785 | bne %xcc,p0_freg_check_fail | |
26786 | mov 0xf14,%g1 | |
26787 | ldx [%g4+0x70],%g3 | |
26788 | std %f30,[%g4] | |
26789 | ldx [%g4],%g2 | |
26790 | cmp %g3,%g2 ! %f30 = ffffff00 0000ffff | |
26791 | bne %xcc,p0_freg_check_fail | |
26792 | mov 0xf30,%g1 | |
26793 | ||
26794 | ! Check Point 128 completed | |
26795 | ||
26796 | ||
26797 | p0_label_641: | |
26798 | ! Mem[0000000010001410] = 00000000, %l4 = 00000000000000ff | |
26799 | lduha [%i0+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
26800 | ! Mem[0000000010041400] = ff000000174573fc, %l6 = 0000000000000000 | |
26801 | ldxa [%i1+%g0]0x88,%l6 ! %l6 = ff000000174573fc | |
26802 | ! Mem[0000000030141408] = ff000000, %l1 = 00000000ff000000 | |
26803 | ldsba [%i5+%o4]0x81,%l1 ! %l1 = ffffffffffffffff | |
26804 | ! Mem[0000000030181410] = ff0012f3, %f9 = 033488c7 | |
26805 | lda [%i6+%o5]0x89,%f9 ! %f9 = ff0012f3 | |
26806 | ! Mem[00000000300c1410] = 00000000 00000000, %l6 = 174573fc, %l7 = 00000000 | |
26807 | ldda [%i3+%o5]0x89,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
26808 | ! Mem[0000000030141400] = 000000f3, %l6 = 0000000000000000 | |
26809 | lduba [%i5+%g0]0x89,%l6 ! %l6 = 00000000000000f3 | |
26810 | ! Mem[000000001008142c] = 00000003, %l5 = 0000000000000000 | |
26811 | lduwa [%i2+0x02c]%asi,%l5 ! %l5 = 0000000000000003 | |
26812 | ! Mem[0000000030101410] = 1f41ffff, %l5 = 0000000000000003 | |
26813 | lduha [%i4+%o5]0x89,%l5 ! %l5 = 000000000000ffff | |
26814 | ! Mem[0000000030001408] = ffffffff, %f4 = f31200ff | |
26815 | lda [%i0+%o4]0x89,%f4 ! %f4 = ffffffff | |
26816 | ! Starting 10 instruction Store Burst | |
26817 | ! Mem[0000000010141400] = 00001f41, %l3 = ffffffffffffff00 | |
26818 | swapa [%i5+%g0]0x80,%l3 ! %l3 = 0000000000001f41 | |
26819 | ||
26820 | p0_label_642: | |
26821 | ! Mem[0000000020800001] = 00008470, %l0 = ffffffffffffffff | |
26822 | ldstub [%o1+0x001],%l0 ! %l0 = 00000000000000ff | |
26823 | ! %f0 = ff00ffff ff790000 00940000 0000ffff | |
26824 | ! %f4 = ffffffff ff000000 000000ff 00000000 | |
26825 | ! %f8 = 0000ff00 ff0012f3 03000000 00000000 | |
26826 | ! %f12 = c7883403 0000ff00 ff00ffff 00001f41 | |
26827 | stda %f0,[%i1]ASI_BLK_AIUSL ! Block Store to 0000000030041400 | |
26828 | ! %l3 = 0000000000001f41, Mem[000000001008142a] = 00000000, %asi = 80 | |
26829 | stha %l3,[%i2+0x02a]%asi ! Mem[0000000010081428] = 00001f41 | |
26830 | ! Mem[00000000300c1400] = ff790000, %l2 = 00000000c7883403 | |
26831 | swapa [%i3+%g0]0x81,%l2 ! %l2 = 00000000ff790000 | |
26832 | membar #Sync ! Added by membar checker (110) | |
26833 | ! Mem[0000000030041408] = 0000ffff, %l4 = 0000000000000000 | |
26834 | ldstuba [%i1+%o4]0x89,%l4 ! %l4 = 000000ff000000ff | |
26835 | ! Mem[0000000030001408] = ffffffff, %l7 = 0000000000000000 | |
26836 | swapa [%i0+%o4]0x89,%l7 ! %l7 = 00000000ffffffff | |
26837 | ! Mem[00000000218000c1] = 00ff8d82, %l3 = 0000000000001f41 | |
26838 | ldstub [%o3+0x0c1],%l3 ! %l3 = 000000ff000000ff | |
26839 | ! %l4 = 00000000000000ff, Mem[00000000100c1400] = ff000000597bac10 | |
26840 | stx %l4,[%i3+%g0] ! Mem[00000000100c1400] = 00000000000000ff | |
26841 | ! %l0 = 0000000000000000, Mem[000000001010141c] = 76ff411f | |
26842 | stw %l0,[%i4+0x01c] ! Mem[000000001010141c] = 00000000 | |
26843 | ! Starting 10 instruction Load Burst | |
26844 | ! Mem[0000000030141410] = 2164000000000000, %f8 = 0000ff00 ff0012f3 | |
26845 | ldda [%i5+%o5]0x81,%f8 ! %f8 = 21640000 00000000 | |
26846 | ||
26847 | p0_label_643: | |
26848 | ! Mem[00000000300c1410] = 00000000, %l1 = ffffffffffffffff | |
26849 | lduha [%i3+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
26850 | ! Mem[0000000030181410] = f31200ff, %f14 = ff00ffff | |
26851 | lda [%i6+%o5]0x81,%f14 ! %f14 = f31200ff | |
26852 | ! Mem[0000000010141408] = 00000000ff000000, %l1 = 0000000000000000 | |
26853 | ldxa [%i5+%o4]0x80,%l1 ! %l1 = 00000000ff000000 | |
26854 | ! Mem[00000000100c1410] = ff000000, %f18 = 79ff0000 | |
26855 | lda [%i3+%o5]0x88,%f18 ! %f18 = ff000000 | |
26856 | ! Mem[0000000010001408] = 760000ff, %l3 = 00000000000000ff | |
26857 | ldsba [%i0+%o4]0x88,%l3 ! %l3 = ffffffffffffffff | |
26858 | ! Mem[0000000010141408] = 00000000, %l5 = 000000000000ffff | |
26859 | lduba [%i5+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
26860 | ! Mem[0000000010001400] = ff00ffff, %l1 = 00000000ff000000 | |
26861 | lduba [%i0+%g0]0x80,%l1 ! %l1 = 00000000000000ff | |
26862 | ! Mem[0000000010081408] = ff1200ff00009c15, %f24 = 000000ff ff0012f3 | |
26863 | ldda [%i2+%o4]0x80,%f24 ! %f24 = ff1200ff 00009c15 | |
26864 | ! Mem[0000000010181408] = 00000000, %l1 = 00000000000000ff | |
26865 | lduwa [%i6+%o4]0x80,%l1 ! %l1 = 0000000000000000 | |
26866 | ! Starting 10 instruction Store Burst | |
26867 | ! Mem[000000001000141c] = ffff0000, %l2 = 00000000ff790000 | |
26868 | swap [%i0+0x01c],%l2 ! %l2 = 00000000ffff0000 | |
26869 | ||
26870 | p0_label_644: | |
26871 | ! Mem[0000000020800000] = 00ff8470, %l7 = 00000000ffffffff | |
26872 | ldstub [%o1+%g0],%l7 ! %l7 = 00000000000000ff | |
26873 | ! Mem[00000000211c0000] = 00ff1a4c, %l1 = 0000000000000000 | |
26874 | ldstuba [%o2+0x000]%asi,%l1 ! %l1 = 00000000000000ff | |
26875 | ! %f24 = ff1200ff 00009c15, %l1 = 0000000000000000 | |
26876 | ! Mem[0000000010101438] = 0000000000000000 | |
26877 | add %i4,0x038,%g1 | |
26878 | stda %f24,[%g1+%l1]ASI_PST16_PL ! Mem[0000000010101438] = 0000000000000000 | |
26879 | ! Mem[0000000030101408] = 000000ff, %l4 = 00000000000000ff | |
26880 | swapa [%i4+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
26881 | ! Mem[00000000100c1426] = c7ec13bb, %l0 = 0000000000000000 | |
26882 | ldstuba [%i3+0x026]%asi,%l0 ! %l0 = 00000013000000ff | |
26883 | ! %l1 = 0000000000000000, Mem[00000000100c1408] = ffc6c4ff | |
26884 | stha %l1,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 0000c4ff | |
26885 | ! Mem[0000000030001408] = 00000000, %l4 = 00000000000000ff | |
26886 | ldstuba [%i0+%o4]0x81,%l4 ! %l4 = 00000000000000ff | |
26887 | ! Mem[0000000020800000] = ffff8470, %l2 = 00000000ffff0000 | |
26888 | lduba [%o1+0x000]%asi,%l2 ! %l2 = 00000000000000ff | |
26889 | ! Mem[000000001004141c] = 12000000, %l2 = 000000ff, %l7 = 00000000 | |
26890 | add %i1,0x1c,%g1 | |
26891 | casa [%g1]0x80,%l2,%l7 ! %l7 = 0000000012000000 | |
26892 | ! Starting 10 instruction Load Burst | |
26893 | ! Mem[00000000100c140c] = 00000000, %l4 = 0000000000000000 | |
26894 | ldub [%i3+0x00f],%l4 ! %l4 = 0000000000000000 | |
26895 | ||
26896 | p0_label_645: | |
26897 | ! Mem[0000000030101400] = 79ff411f, %l5 = 0000000000000000 | |
26898 | lduha [%i4+%g0]0x81,%l5 ! %l5 = 00000000000079ff | |
26899 | ! Mem[0000000010101410] = 00000000 00000000, %l4 = 00000000, %l5 = 000079ff | |
26900 | ldda [%i4+%o5]0x88,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
26901 | ! Mem[0000000010101438] = 00000000, %l1 = 0000000000000000 | |
26902 | lduw [%i4+0x038],%l1 ! %l1 = 0000000000000000 | |
26903 | ! Mem[0000000030081410] = ff000000, %l0 = 0000000000000013 | |
26904 | lduha [%i2+%o5]0x81,%l0 ! %l0 = 000000000000ff00 | |
26905 | ! Mem[0000000010041408] = 00000000, %l7 = 0000000012000000 | |
26906 | ldsha [%i1+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
26907 | ! Mem[0000000010141410] = 00001f41, %l0 = 000000000000ff00 | |
26908 | ldsha [%i5+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
26909 | ! Mem[0000000010141418] = 000000ff, %l4 = 0000000000000000 | |
26910 | lduha [%i5+0x01a]%asi,%l4 ! %l4 = 00000000000000ff | |
26911 | ! Mem[0000000010141420] = 000000c6, %l1 = 0000000000000000 | |
26912 | ldsb [%i5+0x021],%l1 ! %l1 = 0000000000000000 | |
26913 | ! Mem[0000000030081410] = ff000000, %l1 = 0000000000000000 | |
26914 | ldswa [%i2+%o5]0x81,%l1 ! %l1 = ffffffffff000000 | |
26915 | ! Starting 10 instruction Store Burst | |
26916 | ! Mem[000000001004142c] = 00000000, %l5 = 0000000000000000 | |
26917 | swap [%i1+0x02c],%l5 ! %l5 = 0000000000000000 | |
26918 | ||
26919 | ! Check Point 129 for processor 0 | |
26920 | ||
26921 | set p0_check_pt_data_129,%g4 | |
26922 | rd %ccr,%g5 ! %g5 = 44 | |
26923 | ldx [%g4+0x08],%g2 | |
26924 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
26925 | bne %xcc,p0_reg_check_fail0 | |
26926 | mov 0xee0,%g1 | |
26927 | ldx [%g4+0x10],%g2 | |
26928 | cmp %l1,%g2 ! %l1 = ffffffffff000000 | |
26929 | bne %xcc,p0_reg_check_fail1 | |
26930 | mov 0xee1,%g1 | |
26931 | ldx [%g4+0x18],%g2 | |
26932 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
26933 | bne %xcc,p0_reg_check_fail2 | |
26934 | mov 0xee2,%g1 | |
26935 | ldx [%g4+0x20],%g2 | |
26936 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
26937 | bne %xcc,p0_reg_check_fail3 | |
26938 | mov 0xee3,%g1 | |
26939 | ldx [%g4+0x28],%g2 | |
26940 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
26941 | bne %xcc,p0_reg_check_fail4 | |
26942 | mov 0xee4,%g1 | |
26943 | ldx [%g4+0x30],%g2 | |
26944 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
26945 | bne %xcc,p0_reg_check_fail5 | |
26946 | mov 0xee5,%g1 | |
26947 | ldx [%g4+0x38],%g2 | |
26948 | cmp %l6,%g2 ! %l6 = 00000000000000f3 | |
26949 | bne %xcc,p0_reg_check_fail6 | |
26950 | mov 0xee6,%g1 | |
26951 | ldx [%g4+0x40],%g2 | |
26952 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
26953 | bne %xcc,p0_reg_check_fail7 | |
26954 | mov 0xee7,%g1 | |
26955 | ldx [%g4+0x48],%g3 | |
26956 | std %f4,[%g4] | |
26957 | ldx [%g4],%g2 | |
26958 | cmp %g3,%g2 ! %f4 = ffffffff ff000000 | |
26959 | bne %xcc,p0_freg_check_fail | |
26960 | mov 0xf04,%g1 | |
26961 | ldx [%g4+0x50],%g3 | |
26962 | std %f6,[%g4] | |
26963 | ldx [%g4],%g2 | |
26964 | cmp %g3,%g2 ! %f6 = 000000ff 00000000 | |
26965 | bne %xcc,p0_freg_check_fail | |
26966 | mov 0xf06,%g1 | |
26967 | ldx [%g4+0x58],%g3 | |
26968 | std %f8,[%g4] | |
26969 | ldx [%g4],%g2 | |
26970 | cmp %g3,%g2 ! %f8 = 21640000 00000000 | |
26971 | bne %xcc,p0_freg_check_fail | |
26972 | mov 0xf08,%g1 | |
26973 | ldx [%g4+0x60],%g3 | |
26974 | std %f14,[%g4] | |
26975 | ldx [%g4],%g2 | |
26976 | cmp %g3,%g2 ! %f14 = f31200ff 00001f41 | |
26977 | bne %xcc,p0_freg_check_fail | |
26978 | mov 0xf14,%g1 | |
26979 | ldx [%g4+0x68],%g3 | |
26980 | std %f18,[%g4] | |
26981 | ldx [%g4],%g2 | |
26982 | cmp %g3,%g2 ! %f18 = ff000000 00000000 | |
26983 | bne %xcc,p0_freg_check_fail | |
26984 | mov 0xf18,%g1 | |
26985 | ldx [%g4+0x70],%g3 | |
26986 | std %f24,[%g4] | |
26987 | ldx [%g4],%g2 | |
26988 | cmp %g3,%g2 ! %f24 = ff1200ff 00009c15 | |
26989 | bne %xcc,p0_freg_check_fail | |
26990 | mov 0xf24,%g1 | |
26991 | ||
26992 | ! Check Point 129 completed | |
26993 | ||
26994 | ||
26995 | p0_label_646: | |
26996 | ! %l4 = 00000000000000ff, Mem[0000000010041400] = fc734517 | |
26997 | stha %l4,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00ff4517 | |
26998 | ! Mem[0000000030001400] = c7883403, %l6 = 00000000000000f3 | |
26999 | swapa [%i0+%g0]0x81,%l6 ! %l6 = 00000000c7883403 | |
27000 | ! %l5 = 0000000000000000, Mem[0000000030141400] = 000000f3 | |
27001 | stba %l5,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000 | |
27002 | ! %l4 = 00000000000000ff, Mem[0000000010081430] = 00ff0000 | |
27003 | sth %l4,[%i2+0x030] ! Mem[0000000010081430] = 00ff0000 | |
27004 | ! %f16 = 00ff0000 000000ff, Mem[0000000010041400] = 1745ff00 ff000000 | |
27005 | stda %f16,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00ff0000 000000ff | |
27006 | ! %f7 = 00000000, Mem[0000000030041410] = 000000ff | |
27007 | sta %f7 ,[%i1+%o5]0x81 ! Mem[0000000030041410] = 00000000 | |
27008 | ! Mem[0000000030041400] = 000079ff, %l5 = 0000000000000000 | |
27009 | ldstuba [%i1+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
27010 | ! %l7 = 0000000000000000, Mem[0000000010181408] = 00000000 | |
27011 | stba %l7,[%i6+%o4]0x88 ! Mem[0000000010181408] = 00000000 | |
27012 | ! %l7 = 0000000000000000, Mem[0000000010001408] = ff000076 | |
27013 | stwa %l7,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000000 | |
27014 | ! Starting 10 instruction Load Burst | |
27015 | ! Mem[00000000218001c0] = 9c9c2a00, %l5 = 0000000000000000 | |
27016 | lduh [%o3+0x1c0],%l5 ! %l5 = 0000000000009c9c | |
27017 | ||
27018 | p0_label_647: | |
27019 | ! Mem[0000000010141410] = 00001f41, %l7 = 0000000000000000 | |
27020 | ldswa [%i5+0x010]%asi,%l7 ! %l7 = 0000000000001f41 | |
27021 | ! Mem[00000000300c1408] = 000000000000ffff, %f24 = ff1200ff 00009c15 | |
27022 | ldda [%i3+%o4]0x89,%f24 ! %f24 = 00000000 0000ffff | |
27023 | ! Mem[0000000010141400] = ffffff00, %l7 = 0000000000001f41 | |
27024 | ldsha [%i5+%g0]0x80,%l7 ! %l7 = ffffffffffffffff | |
27025 | ! Mem[0000000030001408] = ff000000, %f0 = ff00ffff | |
27026 | lda [%i0+%o4]0x81,%f0 ! %f0 = ff000000 | |
27027 | ! Mem[0000000010101400] = 00000017, %l0 = 0000000000000000 | |
27028 | ldsha [%i4+%g0]0x88,%l0 ! %l0 = 0000000000000017 | |
27029 | ! Mem[00000000300c1400] = 033488c7, %l5 = 0000000000009c9c | |
27030 | ldsha [%i3+%g0]0x89,%l5 ! %l5 = ffffffffffff88c7 | |
27031 | ! Mem[0000000030101410] = ffff411f, %l2 = 00000000000000ff | |
27032 | lduba [%i4+%o5]0x81,%l2 ! %l2 = 00000000000000ff | |
27033 | ! Mem[0000000030141408] = ffffffff 000000ff, %l6 = c7883403, %l7 = ffffffff | |
27034 | ldda [%i5+%o4]0x89,%l6 ! %l6 = 00000000000000ff 00000000ffffffff | |
27035 | ! Mem[0000000010141410] = 00001f41, %l0 = 0000000000000017 | |
27036 | lduha [%i5+0x010]%asi,%l0 ! %l0 = 0000000000000000 | |
27037 | ! Starting 10 instruction Store Burst | |
27038 | ! %l5 = ffffffffffff88c7, Mem[0000000010141400] = 00ffffff | |
27039 | stwa %l5,[%i5+%g0]0x88 ! Mem[0000000010141400] = ffff88c7 | |
27040 | ||
27041 | p0_label_648: | |
27042 | ! Mem[0000000010181400] = ff790000, %l4 = 00000000000000ff | |
27043 | swapa [%i6+%g0]0x88,%l4 ! %l4 = 00000000ff790000 | |
27044 | ! %f8 = 21640000 00000000, %l3 = ffffffffffffffff | |
27045 | ! Mem[0000000010101418] = 0000ffff00000000 | |
27046 | add %i4,0x018,%g1 | |
27047 | stda %f8,[%g1+%l3]ASI_PST32_P ! Mem[0000000010101418] = 2164000000000000 | |
27048 | ! Mem[0000000010081408] = ff1200ff, %l3 = ffffffffffffffff | |
27049 | swapa [%i2+%o4]0x80,%l3 ! %l3 = 00000000ff1200ff | |
27050 | ! %l0 = 00000000, %l1 = ff000000, Mem[0000000010041400] = ff000000 0000ff00 | |
27051 | stda %l0,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000 ff000000 | |
27052 | ! %l6 = 000000ff, %l7 = ffffffff, Mem[0000000010141410] = 00001f41 00000000 | |
27053 | stda %l6,[%i5+0x010]%asi ! Mem[0000000010141410] = 000000ff ffffffff | |
27054 | ! Mem[0000000010041410] = 00000000, %l0 = 0000000000000000 | |
27055 | swapa [%i1+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
27056 | ! %l1 = ffffffffff000000, Mem[0000000010101414] = 00000000 | |
27057 | sth %l1,[%i4+0x014] ! Mem[0000000010101414] = 00000000 | |
27058 | ! %l2 = 000000ff, %l3 = ff1200ff, Mem[0000000030101400] = 1f41ff79 ff000000 | |
27059 | stda %l2,[%i4+%g0]0x89 ! Mem[0000000030101400] = 000000ff ff1200ff | |
27060 | ! %l7 = 00000000ffffffff, Mem[0000000010101400] = 00000017 | |
27061 | stwa %l7,[%i4+%g0]0x88 ! Mem[0000000010101400] = ffffffff | |
27062 | ! Starting 10 instruction Load Burst | |
27063 | ! Mem[00000000100c1408] = 0000c4ff, %l5 = ffffffffffff88c7 | |
27064 | lduha [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
27065 | ||
27066 | p0_label_649: | |
27067 | ! Mem[0000000030141408] = 000000ff, %l0 = 0000000000000000 | |
27068 | lduba [%i5+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
27069 | ! Mem[0000000030141410] = 2164000000000000, %f2 = 00940000 0000ffff | |
27070 | ldda [%i5+%o5]0x81,%f2 ! %f2 = 21640000 00000000 | |
27071 | ! Mem[0000000010101400] = 000000c6ffffffff, %f18 = ff000000 00000000 | |
27072 | ldda [%i4+%g0]0x88,%f18 ! %f18 = 000000c6 ffffffff | |
27073 | ! Mem[00000000300c1410] = 00000000, %l0 = 00000000000000ff | |
27074 | ldsba [%i3+%o5]0x89,%l0 ! %l0 = 0000000000000000 | |
27075 | ! Mem[0000000030101400] = ff000000ff0012ff, %l5 = 0000000000000000 | |
27076 | ldxa [%i4+%g0]0x81,%l5 ! %l5 = ff000000ff0012ff | |
27077 | ! Mem[0000000030001408] = 000000ff, %l6 = 00000000000000ff | |
27078 | ldsba [%i0+%o4]0x89,%l6 ! %l6 = ffffffffffffffff | |
27079 | ! Mem[0000000030181400] = fc734517, %l7 = 00000000ffffffff | |
27080 | ldsha [%i6+%g0]0x81,%l7 ! %l7 = fffffffffffffc73 | |
27081 | ! Mem[0000000010101400] = ffffffff, %l5 = ff000000ff0012ff | |
27082 | lduwa [%i4+%g0]0x88,%l5 ! %l5 = 00000000ffffffff | |
27083 | ! Mem[0000000010001410] = 00000000000000f3, %l4 = 00000000ff790000 | |
27084 | ldxa [%i0+%o5]0x80,%l4 ! %l4 = 00000000000000f3 | |
27085 | ! Starting 10 instruction Store Burst | |
27086 | ! Mem[00000000300c1400] = 033488c7, %l2 = 00000000000000ff | |
27087 | ldstuba [%i3+%g0]0x89,%l2 ! %l2 = 000000c7000000ff | |
27088 | ||
27089 | p0_label_650: | |
27090 | ! Mem[0000000010141401] = c788ffff, %l4 = 00000000000000f3 | |
27091 | ldstuba [%i5+0x001]%asi,%l4 ! %l4 = 00000088000000ff | |
27092 | ! %l2 = 00000000000000c7, Mem[0000000010081408] = ffffffff | |
27093 | stwa %l2,[%i2+%o4]0x80 ! Mem[0000000010081408] = 000000c7 | |
27094 | ! Mem[00000000100c1410] = 000000ff, %l5 = 00000000ffffffff | |
27095 | ldstuba [%i3+%o5]0x80,%l5 ! %l5 = 00000000000000ff | |
27096 | ! Mem[0000000010041400] = 00000000, %l7 = fffffc73, %l7 = fffffc73 | |
27097 | casa [%i1]0x80,%l7,%l7 ! %l7 = 0000000000000000 | |
27098 | ! %f12 = c7883403, Mem[000000001004143c] = ffff0000 | |
27099 | st %f12,[%i1+0x03c] ! Mem[000000001004143c] = c7883403 | |
27100 | ! Mem[0000000010081430] = 00ff0000, %l0 = 0000000000000000, %asi = 80 | |
27101 | swapa [%i2+0x030]%asi,%l0 ! %l0 = 0000000000ff0000 | |
27102 | ! Mem[0000000030101410] = ffff411f, %l1 = ffffffffff000000 | |
27103 | ldstuba [%i4+%o5]0x81,%l1 ! %l1 = 000000ff000000ff | |
27104 | ! Mem[0000000010081408] = c7000000, %l6 = ffffffffffffffff | |
27105 | lduba [%i2+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
27106 | ! Mem[0000000010141408] = 00000000ff000000, %l5 = 0000000000000000, %l5 = 0000000000000000 | |
27107 | add %i5,0x08,%g1 | |
27108 | casxa [%g1]0x80,%l5,%l5 ! %l5 = 00000000ff000000 | |
27109 | ! Starting 10 instruction Load Burst | |
27110 | ! Mem[0000000030181400] = 174573fc, %l7 = 0000000000000000 | |
27111 | lduwa [%i6+%g0]0x89,%l7 ! %l7 = 00000000174573fc | |
27112 | ||
27113 | ! Check Point 130 for processor 0 | |
27114 | ||
27115 | set p0_check_pt_data_130,%g4 | |
27116 | rd %ccr,%g5 ! %g5 = 44 | |
27117 | ldx [%g4+0x08],%g2 | |
27118 | cmp %l0,%g2 ! %l0 = 0000000000ff0000 | |
27119 | bne %xcc,p0_reg_check_fail0 | |
27120 | mov 0xee0,%g1 | |
27121 | ldx [%g4+0x10],%g2 | |
27122 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
27123 | bne %xcc,p0_reg_check_fail1 | |
27124 | mov 0xee1,%g1 | |
27125 | ldx [%g4+0x18],%g2 | |
27126 | cmp %l2,%g2 ! %l2 = 00000000000000c7 | |
27127 | bne %xcc,p0_reg_check_fail2 | |
27128 | mov 0xee2,%g1 | |
27129 | ldx [%g4+0x20],%g2 | |
27130 | cmp %l4,%g2 ! %l4 = 0000000000000088 | |
27131 | bne %xcc,p0_reg_check_fail4 | |
27132 | mov 0xee4,%g1 | |
27133 | ldx [%g4+0x28],%g2 | |
27134 | cmp %l5,%g2 ! %l5 = 00000000ff000000 | |
27135 | bne %xcc,p0_reg_check_fail5 | |
27136 | mov 0xee5,%g1 | |
27137 | ldx [%g4+0x30],%g2 | |
27138 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
27139 | bne %xcc,p0_reg_check_fail6 | |
27140 | mov 0xee6,%g1 | |
27141 | ldx [%g4+0x38],%g2 | |
27142 | cmp %l7,%g2 ! %l7 = 00000000174573fc | |
27143 | bne %xcc,p0_reg_check_fail7 | |
27144 | mov 0xee7,%g1 | |
27145 | ldx [%g4+0x40],%g3 | |
27146 | std %f0,[%g4] | |
27147 | ldx [%g4],%g2 | |
27148 | cmp %g3,%g2 ! %f0 = ff000000 ff790000 | |
27149 | bne %xcc,p0_freg_check_fail | |
27150 | mov 0xf00,%g1 | |
27151 | ldx [%g4+0x48],%g3 | |
27152 | std %f2,[%g4] | |
27153 | ldx [%g4],%g2 | |
27154 | cmp %g3,%g2 ! %f2 = 21640000 00000000 | |
27155 | bne %xcc,p0_freg_check_fail | |
27156 | mov 0xf02,%g1 | |
27157 | ldx [%g4+0x50],%g3 | |
27158 | std %f6,[%g4] | |
27159 | ldx [%g4],%g2 | |
27160 | cmp %g3,%g2 ! %f6 = 000000ff 00000000 | |
27161 | bne %xcc,p0_freg_check_fail | |
27162 | mov 0xf06,%g1 | |
27163 | ldx [%g4+0x58],%g3 | |
27164 | std %f18,[%g4] | |
27165 | ldx [%g4],%g2 | |
27166 | cmp %g3,%g2 ! %f18 = 000000c6 ffffffff | |
27167 | bne %xcc,p0_freg_check_fail | |
27168 | mov 0xf18,%g1 | |
27169 | ldx [%g4+0x60],%g3 | |
27170 | std %f24,[%g4] | |
27171 | ldx [%g4],%g2 | |
27172 | cmp %g3,%g2 ! %f24 = 00000000 0000ffff | |
27173 | bne %xcc,p0_freg_check_fail | |
27174 | mov 0xf24,%g1 | |
27175 | ||
27176 | ! Check Point 130 completed | |
27177 | ||
27178 | ||
27179 | p0_label_651: | |
27180 | ! Mem[0000000010141400] = ffffffc7, %l7 = 00000000174573fc | |
27181 | ldswa [%i5+%g0]0x88,%l7 ! %l7 = ffffffffffffffc7 | |
27182 | ! Mem[0000000010181408] = 00000000 00009400, %l2 = 000000c7, %l3 = ff1200ff | |
27183 | ldd [%i6+%o4],%l2 ! %l2 = 0000000000000000 0000000000009400 | |
27184 | ! Mem[00000000211c0000] = ffff1a4c, %l2 = 0000000000000000 | |
27185 | lduha [%o2+0x000]%asi,%l2 ! %l2 = 000000000000ffff | |
27186 | ! Mem[0000000021800180] = ffffe2ae, %l0 = 0000000000ff0000 | |
27187 | ldsh [%o3+0x180],%l0 ! %l0 = ffffffffffffffff | |
27188 | ! Mem[00000000300c1410] = 0000000000000000, %f14 = f31200ff 00001f41 | |
27189 | ldda [%i3+%o5]0x81,%f14 ! %f14 = 00000000 00000000 | |
27190 | ! Mem[0000000010001410] = 00000000, %l7 = ffffffffffffffc7 | |
27191 | lduwa [%i0+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
27192 | ! Mem[0000000010001400] = ff00ffff, %l5 = 00000000ff000000 | |
27193 | ldsba [%i0+%g0]0x80,%l5 ! %l5 = ffffffffffffffff | |
27194 | ! Mem[0000000010001408] = 00000000, %l5 = ffffffffffffffff | |
27195 | lduwa [%i0+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
27196 | ! Mem[0000000030181408] = 00940000f31200ff, %f24 = 00000000 0000ffff | |
27197 | ldda [%i6+%o4]0x81,%f24 ! %f24 = 00940000 f31200ff | |
27198 | ! Starting 10 instruction Store Burst | |
27199 | ! Mem[00000000100c1430] = 760000ff0000ffff, %l3 = 0000000000009400, %l3 = 0000000000009400 | |
27200 | add %i3,0x30,%g1 | |
27201 | casxa [%g1]0x80,%l3,%l3 ! %l3 = 760000ff0000ffff | |
27202 | ||
27203 | p0_label_652: | |
27204 | ! Mem[0000000010041400] = 00000000, %l0 = ffffffffffffffff | |
27205 | ldstuba [%i1+%g0]0x88,%l0 ! %l0 = 00000000000000ff | |
27206 | ! %f1 = ff790000, Mem[0000000010001408] = 00000000 | |
27207 | sta %f1 ,[%i0+%o4]0x88 ! Mem[0000000010001408] = ff790000 | |
27208 | ! Mem[0000000030041408] = ffff0000, %l0 = 0000000000000000 | |
27209 | swapa [%i1+%o4]0x81,%l0 ! %l0 = 00000000ffff0000 | |
27210 | ! %l7 = 0000000000000000, Mem[00000000100c1417] = 0000ffff, %asi = 80 | |
27211 | stba %l7,[%i3+0x017]%asi ! Mem[00000000100c1414] = 0000ff00 | |
27212 | ! %f4 = ffffffff ff000000, Mem[0000000030141410] = 00006421 00000000 | |
27213 | stda %f4 ,[%i5+%o5]0x89 ! Mem[0000000030141410] = ffffffff ff000000 | |
27214 | ! %l0 = ffff0000, %l1 = 000000ff, Mem[0000000010041408] = 00000000 000000ff | |
27215 | stda %l0,[%i1+%o4]0x88 ! Mem[0000000010041408] = ffff0000 000000ff | |
27216 | ! %l0 = 00000000ffff0000, Mem[00000000300c1400] = ff883403 | |
27217 | stba %l0,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00883403 | |
27218 | ! %l0 = 00000000ffff0000, Mem[0000000010101408] = 00000000 | |
27219 | stba %l0,[%i4+%o4]0x88 ! Mem[0000000010101408] = 00000000 | |
27220 | ! %l2 = 000000000000ffff, Mem[0000000010001418] = fffffc00, %asi = 80 | |
27221 | stwa %l2,[%i0+0x018]%asi ! Mem[0000000010001418] = 0000ffff | |
27222 | ! Starting 10 instruction Load Burst | |
27223 | ! Mem[0000000020800040] = 00ff7379, %l7 = 0000000000000000 | |
27224 | ldsb [%o1+0x040],%l7 ! %l7 = 0000000000000000 | |
27225 | ||
27226 | p0_label_653: | |
27227 | ! Mem[0000000030101400] = ff000000, %l7 = 0000000000000000 | |
27228 | lduwa [%i4+%g0]0x81,%l7 ! %l7 = 00000000ff000000 | |
27229 | ! Mem[0000000020800040] = 00ff7379, %l7 = 00000000ff000000 | |
27230 | lduh [%o1+0x040],%l7 ! %l7 = 00000000000000ff | |
27231 | ! Mem[0000000010001408] = ff790000, %f6 = 000000ff | |
27232 | lda [%i0+%o4]0x88,%f6 ! %f6 = ff790000 | |
27233 | ! Mem[0000000010041408] = 0000ffff, %l7 = 00000000000000ff | |
27234 | lduba [%i1+%o4]0x80,%l7 ! %l7 = 0000000000000000 | |
27235 | ! Mem[0000000030101408] = ff000000, %l4 = 0000000000000088 | |
27236 | ldsba [%i4+%o4]0x81,%l4 ! %l4 = ffffffffffffffff | |
27237 | ! Mem[0000000010181408] = 0000000000009400, %l1 = 00000000000000ff | |
27238 | ldxa [%i6+%o4]0x80,%l1 ! %l1 = 0000000000009400 | |
27239 | ! Mem[0000000010081408] = 000000c7, %l1 = 0000000000009400 | |
27240 | ldswa [%i2+%o4]0x80,%l1 ! %l1 = 00000000000000c7 | |
27241 | ! Mem[0000000021800040] = 00001df3, %l1 = 00000000000000c7 | |
27242 | ldsba [%o3+0x040]%asi,%l1 ! %l1 = 0000000000000000 | |
27243 | ! Mem[0000000030001400] = 000000f3, %l0 = 00000000ffff0000 | |
27244 | ldsba [%i0+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
27245 | ! Starting 10 instruction Store Burst | |
27246 | ! %l7 = 0000000000000000, Mem[0000000010101410] = 00000000 | |
27247 | stba %l7,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00000000 | |
27248 | ||
27249 | p0_label_654: | |
27250 | ! %f26 = 79ff0000 ff000000, Mem[0000000030101400] = ff000000 ff0012ff | |
27251 | stda %f26,[%i4+%g0]0x81 ! Mem[0000000030101400] = 79ff0000 ff000000 | |
27252 | ! Mem[0000000030041410] = 00000000, %l3 = 760000ff0000ffff | |
27253 | swapa [%i1+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
27254 | ! %l6 = 0000000000000000, Mem[0000000010001400] = ff00ffff | |
27255 | stwa %l6,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00000000 | |
27256 | ! Mem[0000000010101408] = 00000000, %l1 = 0000000000000000 | |
27257 | ldstuba [%i4+%o4]0x80,%l1 ! %l1 = 00000000000000ff | |
27258 | ! %f29 = ffff0000, Mem[0000000030101408] = ff000000 | |
27259 | sta %f29,[%i4+%o4]0x81 ! Mem[0000000030101408] = ffff0000 | |
27260 | ! Mem[0000000010001410] = 00000000, %l4 = ffffffffffffffff | |
27261 | ldstuba [%i0+%o5]0x80,%l4 ! %l4 = 00000000000000ff | |
27262 | ! Mem[00000000100c1400] = 00000000, %l4 = 0000000000000000 | |
27263 | swapa [%i3+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
27264 | ! %l1 = 0000000000000000, Mem[0000000010141410] = 000000ffffffffff | |
27265 | stxa %l1,[%i5+%o5]0x80 ! Mem[0000000010141410] = 0000000000000000 | |
27266 | ! %l1 = 0000000000000000, Mem[0000000010141408] = 00000000 | |
27267 | stba %l1,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000000 | |
27268 | ! Starting 10 instruction Load Burst | |
27269 | ! Mem[0000000010081408] = c7000000, %l2 = 000000000000ffff | |
27270 | lduba [%i2+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
27271 | ||
27272 | p0_label_655: | |
27273 | ! Mem[0000000030001408] = ff000000, %l2 = 0000000000000000 | |
27274 | ldsba [%i0+%o4]0x81,%l2 ! %l2 = ffffffffffffffff | |
27275 | ! Mem[0000000010101400] = ffffffff, %l4 = 0000000000000000 | |
27276 | ldswa [%i4+%g0]0x88,%l4 ! %l4 = ffffffffffffffff | |
27277 | ! Mem[0000000010181410] = f31200ffff000000, %f26 = 79ff0000 ff000000 | |
27278 | ldda [%i6+%o5]0x88,%f26 ! %f26 = f31200ff ff000000 | |
27279 | ! Mem[0000000010101400] = 000000c6ffffffff, %f0 = ff000000 ff790000 | |
27280 | ldda [%i4+%g0]0x88,%f0 ! %f0 = 000000c6 ffffffff | |
27281 | ! Mem[0000000010081400] = ff000000 ff000000, %l6 = 00000000, %l7 = 00000000 | |
27282 | ldda [%i2+0x000]%asi,%l6 ! %l6 = 00000000ff000000 00000000ff000000 | |
27283 | ! Mem[0000000010081410] = 000000ff, %l0 = 0000000000000000 | |
27284 | ldsba [%i2+%o5]0x88,%l0 ! %l0 = ffffffffffffffff | |
27285 | ! Mem[0000000030001400] = f3000000, %f4 = ffffffff | |
27286 | lda [%i0+%g0]0x89,%f4 ! %f4 = f3000000 | |
27287 | ! Mem[0000000010101418] = 2164000000000000, %l7 = 00000000ff000000 | |
27288 | ldx [%i4+0x018],%l7 ! %l7 = 2164000000000000 | |
27289 | ! Mem[0000000010101408] = 000000ff, %l1 = 0000000000000000 | |
27290 | ldsba [%i4+%o4]0x88,%l1 ! %l1 = ffffffffffffffff | |
27291 | ! Starting 10 instruction Store Burst | |
27292 | ! %l3 = 0000000000000000, Mem[0000000030181408] = 00009400 | |
27293 | stba %l3,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00009400 | |
27294 | ||
27295 | ! Check Point 131 for processor 0 | |
27296 | ||
27297 | set p0_check_pt_data_131,%g4 | |
27298 | rd %ccr,%g5 ! %g5 = 44 | |
27299 | ldx [%g4+0x08],%g2 | |
27300 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
27301 | bne %xcc,p0_reg_check_fail0 | |
27302 | mov 0xee0,%g1 | |
27303 | ldx [%g4+0x10],%g2 | |
27304 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
27305 | bne %xcc,p0_reg_check_fail1 | |
27306 | mov 0xee1,%g1 | |
27307 | ldx [%g4+0x18],%g2 | |
27308 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
27309 | bne %xcc,p0_reg_check_fail2 | |
27310 | mov 0xee2,%g1 | |
27311 | ldx [%g4+0x20],%g2 | |
27312 | cmp %l4,%g2 ! %l4 = ffffffffffffffff | |
27313 | bne %xcc,p0_reg_check_fail4 | |
27314 | mov 0xee4,%g1 | |
27315 | ldx [%g4+0x28],%g2 | |
27316 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
27317 | bne %xcc,p0_reg_check_fail5 | |
27318 | mov 0xee5,%g1 | |
27319 | ldx [%g4+0x30],%g2 | |
27320 | cmp %l7,%g2 ! %l7 = 2164000000000000 | |
27321 | bne %xcc,p0_reg_check_fail7 | |
27322 | mov 0xee7,%g1 | |
27323 | ldx [%g4+0x38],%g3 | |
27324 | std %f0,[%g4] | |
27325 | ldx [%g4],%g2 | |
27326 | cmp %g3,%g2 ! %f0 = 000000c6 ffffffff | |
27327 | bne %xcc,p0_freg_check_fail | |
27328 | mov 0xf00,%g1 | |
27329 | ldx [%g4+0x40],%g3 | |
27330 | std %f2,[%g4] | |
27331 | ldx [%g4],%g2 | |
27332 | cmp %g3,%g2 ! %f2 = 21640000 00000000 | |
27333 | bne %xcc,p0_freg_check_fail | |
27334 | mov 0xf02,%g1 | |
27335 | ldx [%g4+0x48],%g3 | |
27336 | std %f4,[%g4] | |
27337 | ldx [%g4],%g2 | |
27338 | cmp %g3,%g2 ! %f4 = f3000000 ff000000 | |
27339 | bne %xcc,p0_freg_check_fail | |
27340 | mov 0xf04,%g1 | |
27341 | ldx [%g4+0x50],%g3 | |
27342 | std %f6,[%g4] | |
27343 | ldx [%g4],%g2 | |
27344 | cmp %g3,%g2 ! %f6 = ff790000 00000000 | |
27345 | bne %xcc,p0_freg_check_fail | |
27346 | mov 0xf06,%g1 | |
27347 | ldx [%g4+0x58],%g3 | |
27348 | std %f14,[%g4] | |
27349 | ldx [%g4],%g2 | |
27350 | cmp %g3,%g2 ! %f14 = 00000000 00000000 | |
27351 | bne %xcc,p0_freg_check_fail | |
27352 | mov 0xf14,%g1 | |
27353 | ldx [%g4+0x60],%g3 | |
27354 | std %f24,[%g4] | |
27355 | ldx [%g4],%g2 | |
27356 | cmp %g3,%g2 ! %f24 = 00940000 f31200ff | |
27357 | bne %xcc,p0_freg_check_fail | |
27358 | mov 0xf24,%g1 | |
27359 | ldx [%g4+0x68],%g3 | |
27360 | std %f26,[%g4] | |
27361 | ldx [%g4],%g2 | |
27362 | cmp %g3,%g2 ! %f26 = f31200ff ff000000 | |
27363 | bne %xcc,p0_freg_check_fail | |
27364 | mov 0xf26,%g1 | |
27365 | ||
27366 | ! Check Point 131 completed | |
27367 | ||
27368 | ||
27369 | p0_label_656: | |
27370 | ! %l2 = ffffffffffffffff, Mem[00000000300c1410] = 0000000000000000 | |
27371 | stxa %l2,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ffffffffffffffff | |
27372 | ! %l1 = ffffffffffffffff, Mem[00000000100c1400] = 00000000 | |
27373 | stba %l1,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 000000ff | |
27374 | ! %l2 = ffffffffffffffff, Mem[0000000010141430] = 0000000000000000, %asi = 80 | |
27375 | stxa %l2,[%i5+0x030]%asi ! Mem[0000000010141430] = ffffffffffffffff | |
27376 | ! Mem[00000000300c1400] = 03348800, %l2 = ffffffffffffffff | |
27377 | ldstuba [%i3+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
27378 | ! %l0 = ffffffffffffffff, Mem[00000000300c1400] = ff88340300000000 | |
27379 | stxa %l0,[%i3+%g0]0x81 ! Mem[00000000300c1400] = ffffffffffffffff | |
27380 | ! %l1 = ffffffffffffffff, Mem[0000000030101410] = ffff411ff31200ff | |
27381 | stxa %l1,[%i4+%o5]0x81 ! Mem[0000000030101410] = ffffffffffffffff | |
27382 | ! %l1 = ffffffffffffffff, Mem[0000000010041408] = 0000ffff | |
27383 | stba %l1,[%i1+%o4]0x80 ! Mem[0000000010041408] = ff00ffff | |
27384 | ! %l3 = 0000000000000000, Mem[00000000300c1400] = ffffffff | |
27385 | stha %l3,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 0000ffff | |
27386 | ! %f24 = 00940000 f31200ff, Mem[0000000010081438] = 00000000 00000000 | |
27387 | std %f24,[%i2+0x038] ! Mem[0000000010081438] = 00940000 f31200ff | |
27388 | ! Starting 10 instruction Load Burst | |
27389 | ! Mem[0000000030001408] = 000000ff, %l2 = 0000000000000000 | |
27390 | lduwa [%i0+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
27391 | ||
27392 | p0_label_657: | |
27393 | ! Mem[00000000100c1410] = ff0000ff, %f20 = fc734517 | |
27394 | lda [%i3+%o5]0x80,%f20 ! %f20 = ff0000ff | |
27395 | ! Mem[0000000030101408] = ffff0000 00000000, %l0 = ffffffff, %l1 = ffffffff | |
27396 | ldda [%i4+%o4]0x81,%l0 ! %l0 = 00000000ffff0000 0000000000000000 | |
27397 | ! Mem[0000000030181408] = 00940000 f31200ff, %l2 = 000000ff, %l3 = 00000000 | |
27398 | ldda [%i6+%o4]0x81,%l2 ! %l2 = 0000000000940000 00000000f31200ff | |
27399 | ! Mem[0000000030041408] = 00000000, %l0 = 00000000ffff0000 | |
27400 | lduwa [%i1+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
27401 | ! Mem[0000000030181408] = 00940000, %l4 = ffffffffffffffff | |
27402 | ldsba [%i6+%o4]0x81,%l4 ! %l4 = 0000000000000000 | |
27403 | ! Mem[0000000030041408] = 0094000000000000, %f4 = f3000000 ff000000 | |
27404 | ldda [%i1+%o4]0x89,%f4 ! %f4 = 00940000 00000000 | |
27405 | ! Mem[0000000010181410] = f31200ffff000000, %f24 = 00940000 f31200ff | |
27406 | ldda [%i6+%o5]0x88,%f24 ! %f24 = f31200ff ff000000 | |
27407 | ! Mem[0000000010101408] = ff000000, %l5 = 0000000000000000 | |
27408 | ldsba [%i4+%o4]0x80,%l5 ! %l5 = ffffffffffffffff | |
27409 | ! Mem[000000001008142c] = 00000003, %f16 = 00ff0000 | |
27410 | lda [%i2+0x02c]%asi,%f16 ! %f16 = 00000003 | |
27411 | ! Starting 10 instruction Store Burst | |
27412 | ! Mem[0000000030101410] = ffffffff, %l5 = ffffffffffffffff | |
27413 | ldstuba [%i4+%o5]0x81,%l5 ! %l5 = 000000ff000000ff | |
27414 | ||
27415 | p0_label_658: | |
27416 | ! Mem[0000000010081438] = 00940000, %l2 = 0000000000940000 | |
27417 | swap [%i2+0x038],%l2 ! %l2 = 0000000000940000 | |
27418 | ! Mem[0000000010181418] = 00000000, %l4 = 0000000000000000 | |
27419 | ldstuba [%i6+0x018]%asi,%l4 ! %l4 = 00000000000000ff | |
27420 | ! %f16 = 00000003 000000ff, %l3 = 00000000f31200ff | |
27421 | ! Mem[0000000030101408] = ffff000000000000 | |
27422 | add %i4,0x008,%g1 | |
27423 | stda %f16,[%g1+%l3]ASI_PST8_SL ! Mem[0000000030101408] = ff00000003000000 | |
27424 | ! %l6 = 00000000ff000000, Mem[000000001008143a] = 00940000 | |
27425 | sth %l6,[%i2+0x03a] ! Mem[0000000010081438] = 00940000 | |
27426 | ! %l5 = 00000000000000ff, Mem[0000000010041408] = ff00ffff | |
27427 | stha %l5,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00ffffff | |
27428 | ! %l7 = 2164000000000000, Mem[0000000030001400] = 000000f3 | |
27429 | stba %l7,[%i0+%g0]0x81 ! Mem[0000000030001400] = 000000f3 | |
27430 | ! %l2 = 0000000000940000, Mem[0000000010041428] = 57790000, %asi = 80 | |
27431 | stha %l2,[%i1+0x028]%asi ! Mem[0000000010041428] = 00000000 | |
27432 | ! %l4 = 0000000000000000, Mem[00000000100c1419] = 00000012, %asi = 80 | |
27433 | stba %l4,[%i3+0x019]%asi ! Mem[00000000100c1418] = 00000012 | |
27434 | ! %l6 = 00000000ff000000, Mem[0000000010081422] = c7883403, %asi = 80 | |
27435 | stha %l6,[%i2+0x022]%asi ! Mem[0000000010081420] = c7880000 | |
27436 | ! Starting 10 instruction Load Burst | |
27437 | ! Mem[00000000100c1410] = ff0000ff, %l7 = 2164000000000000 | |
27438 | ldswa [%i3+%o5]0x80,%l7 ! %l7 = ffffffffff0000ff | |
27439 | ||
27440 | p0_label_659: | |
27441 | ! Mem[0000000010001414] = 000000f3, %l2 = 0000000000940000 | |
27442 | lduba [%i0+0x015]%asi,%l2 ! %l2 = 0000000000000000 | |
27443 | ! Mem[00000000201c0000] = 00ff9457, %l3 = 00000000f31200ff | |
27444 | lduha [%o0+0x000]%asi,%l3 ! %l3 = 00000000000000ff | |
27445 | ! Mem[0000000010041408] = ffffff00, %l6 = 00000000ff000000 | |
27446 | lduha [%i1+%o4]0x88,%l6 ! %l6 = 000000000000ff00 | |
27447 | ! Mem[0000000030181408] = 00009400, %l0 = 0000000000000000 | |
27448 | ldswa [%i6+%o4]0x89,%l0 ! %l0 = 0000000000009400 | |
27449 | ! Mem[0000000010001410] = ff000000000000f3, %l3 = 00000000000000ff | |
27450 | ldxa [%i0+%o5]0x80,%l3 ! %l3 = ff000000000000f3 | |
27451 | ! Mem[00000000100c1410] = ff0000ff, %l4 = 0000000000000000 | |
27452 | lduha [%i3+%o5]0x80,%l4 ! %l4 = 000000000000ff00 | |
27453 | ! Mem[0000000010041400] = 000000ff, %l1 = 0000000000000000 | |
27454 | ldsba [%i1+%g0]0x88,%l1 ! %l1 = ffffffffffffffff | |
27455 | ! Mem[0000000010101400] = ffffffff, %f9 = 00000000 | |
27456 | lda [%i4+%g0]0x88,%f9 ! %f9 = ffffffff | |
27457 | ! Mem[0000000010001434] = ffff0000, %l0 = 0000000000009400 | |
27458 | lduh [%i0+0x036],%l0 ! %l0 = 0000000000000000 | |
27459 | ! Starting 10 instruction Store Burst | |
27460 | ! %l4 = 000000000000ff00, Mem[0000000010101410] = 0000000000000000 | |
27461 | stxa %l4,[%i4+%o5]0x88 ! Mem[0000000010101410] = 000000000000ff00 | |
27462 | ||
27463 | p0_label_660: | |
27464 | ! %l4 = 000000000000ff00, Mem[0000000030041400] = ff7900ff | |
27465 | stba %l4,[%i1+%g0]0x89 ! Mem[0000000030041400] = ff790000 | |
27466 | ! Mem[0000000010041438] = 000000c6c7883403, %l5 = 00000000000000ff, %l1 = ffffffffffffffff | |
27467 | add %i1,0x38,%g1 | |
27468 | casxa [%g1]0x80,%l5,%l1 ! %l1 = 000000c6c7883403 | |
27469 | ! Mem[0000000010001410] = 000000ff, %l6 = 000000000000ff00 | |
27470 | swapa [%i0+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
27471 | ! %l5 = 00000000000000ff, %l5 = 00000000000000ff, %l6 = 00000000000000ff | |
27472 | or %l5,%l5,%l6 ! %l6 = 00000000000000ff | |
27473 | ! %l4 = 0000ff00, %l5 = 000000ff, Mem[0000000010081410] = 000000ff 00000000 | |
27474 | stda %l4,[%i2+%o5]0x88 ! Mem[0000000010081410] = 0000ff00 000000ff | |
27475 | ! %f31 = 0000ffff, Mem[0000000010181404] = ffff00ff | |
27476 | st %f31,[%i6+0x004] ! Mem[0000000010181404] = 0000ffff | |
27477 | ! Mem[00000000201c0000] = 00ff9457, %l1 = 000000c6c7883403 | |
27478 | ldstub [%o0+%g0],%l1 ! %l1 = 00000000000000ff | |
27479 | ! %f6 = ff790000 00000000, Mem[0000000030181410] = ff0012f3 000000ff | |
27480 | stda %f6 ,[%i6+%o5]0x89 ! Mem[0000000030181410] = ff790000 00000000 | |
27481 | ! %l3 = ff000000000000f3, Mem[0000000010081429] = 00001f41 | |
27482 | stb %l3,[%i2+0x029] ! Mem[0000000010081428] = 00f31f41 | |
27483 | ! Starting 10 instruction Load Burst | |
27484 | ! Mem[0000000030141400] = 00000000, %l5 = 00000000000000ff | |
27485 | ldsha [%i5+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
27486 | ||
27487 | ! Check Point 132 for processor 0 | |
27488 | ||
27489 | set p0_check_pt_data_132,%g4 | |
27490 | rd %ccr,%g5 ! %g5 = 44 | |
27491 | ldx [%g4+0x08],%g2 | |
27492 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
27493 | bne %xcc,p0_reg_check_fail0 | |
27494 | mov 0xee0,%g1 | |
27495 | ldx [%g4+0x10],%g2 | |
27496 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
27497 | bne %xcc,p0_reg_check_fail1 | |
27498 | mov 0xee1,%g1 | |
27499 | ldx [%g4+0x18],%g2 | |
27500 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
27501 | bne %xcc,p0_reg_check_fail2 | |
27502 | mov 0xee2,%g1 | |
27503 | ldx [%g4+0x20],%g2 | |
27504 | cmp %l3,%g2 ! %l3 = ff000000000000f3 | |
27505 | bne %xcc,p0_reg_check_fail3 | |
27506 | mov 0xee3,%g1 | |
27507 | ldx [%g4+0x28],%g2 | |
27508 | cmp %l4,%g2 ! %l4 = 000000000000ff00 | |
27509 | bne %xcc,p0_reg_check_fail4 | |
27510 | mov 0xee4,%g1 | |
27511 | ldx [%g4+0x30],%g2 | |
27512 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
27513 | bne %xcc,p0_reg_check_fail5 | |
27514 | mov 0xee5,%g1 | |
27515 | ldx [%g4+0x38],%g2 | |
27516 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
27517 | bne %xcc,p0_reg_check_fail6 | |
27518 | mov 0xee6,%g1 | |
27519 | ldx [%g4+0x40],%g2 | |
27520 | cmp %l7,%g2 ! %l7 = ffffffffff0000ff | |
27521 | bne %xcc,p0_reg_check_fail7 | |
27522 | mov 0xee7,%g1 | |
27523 | ldx [%g4+0x48],%g3 | |
27524 | std %f0,[%g4] | |
27525 | ldx [%g4],%g2 | |
27526 | cmp %g3,%g2 ! %f0 = 000000c6 ffffffff | |
27527 | bne %xcc,p0_freg_check_fail | |
27528 | mov 0xf00,%g1 | |
27529 | ldx [%g4+0x50],%g3 | |
27530 | std %f2,[%g4] | |
27531 | ldx [%g4],%g2 | |
27532 | cmp %g3,%g2 ! %f2 = 21640000 00000000 | |
27533 | bne %xcc,p0_freg_check_fail | |
27534 | mov 0xf02,%g1 | |
27535 | ldx [%g4+0x58],%g3 | |
27536 | std %f4,[%g4] | |
27537 | ldx [%g4],%g2 | |
27538 | cmp %g3,%g2 ! %f4 = 00940000 00000000 | |
27539 | bne %xcc,p0_freg_check_fail | |
27540 | mov 0xf04,%g1 | |
27541 | ldx [%g4+0x60],%g3 | |
27542 | std %f8,[%g4] | |
27543 | ldx [%g4],%g2 | |
27544 | cmp %g3,%g2 ! %f8 = 21640000 ffffffff | |
27545 | bne %xcc,p0_freg_check_fail | |
27546 | mov 0xf08,%g1 | |
27547 | ldx [%g4+0x68],%g3 | |
27548 | std %f16,[%g4] | |
27549 | ldx [%g4],%g2 | |
27550 | cmp %g3,%g2 ! %f16 = 00000003 000000ff | |
27551 | bne %xcc,p0_freg_check_fail | |
27552 | mov 0xf16,%g1 | |
27553 | ldx [%g4+0x70],%g3 | |
27554 | std %f20,[%g4] | |
27555 | ldx [%g4],%g2 | |
27556 | cmp %g3,%g2 ! %f20 = ff0000ff 000000ff | |
27557 | bne %xcc,p0_freg_check_fail | |
27558 | mov 0xf20,%g1 | |
27559 | ldx [%g4+0x78],%g3 | |
27560 | std %f24,[%g4] | |
27561 | ldx [%g4],%g2 | |
27562 | cmp %g3,%g2 ! %f24 = f31200ff ff000000 | |
27563 | bne %xcc,p0_freg_check_fail | |
27564 | mov 0xf24,%g1 | |
27565 | ||
27566 | ! Check Point 132 completed | |
27567 | ||
27568 | ||
27569 | p0_label_661: | |
27570 | membar #Sync ! Added by membar checker (111) | |
27571 | ! Mem[0000000010001400] = 00000000 ff790000 000079ff 00000000 | |
27572 | ! Mem[0000000010001410] = 00ff0000 000000f3 0000ffff ff790000 | |
27573 | ! Mem[0000000010001420] = 0000ff00 00000000 00000000 00000000 | |
27574 | ! Mem[0000000010001430] = 000000c6 ffff0000 ff000000 1f000076 | |
27575 | ldda [%i0]ASI_BLK_P,%f16 ! Block Load from 0000000010001400 | |
27576 | ! Mem[0000000030081400] = 00000000 c7883403, %l2 = 00000000, %l3 = 000000f3 | |
27577 | ldda [%i2+%g0]0x81,%l2 ! %l2 = 0000000000000000 00000000c7883403 | |
27578 | ! Mem[0000000030181408] = 00009400, %l5 = 0000000000000000 | |
27579 | lduha [%i6+%o4]0x89,%l5 ! %l5 = 0000000000009400 | |
27580 | ! Mem[0000000010001408] = 000079ff, %l5 = 0000000000009400 | |
27581 | ldsba [%i0+0x00a]%asi,%l5 ! %l5 = 0000000000000079 | |
27582 | ! Mem[0000000030001400] = 000000f3, %l0 = 0000000000000000 | |
27583 | ldsha [%i0+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
27584 | ! Mem[0000000030081410] = ff000000ffff0000, %l4 = 000000000000ff00 | |
27585 | ldxa [%i2+%o5]0x81,%l4 ! %l4 = ff000000ffff0000 | |
27586 | ! Mem[0000000010141400] = ffffffc7, %l2 = 0000000000000000 | |
27587 | ldsba [%i5+%g0]0x88,%l2 ! %l2 = ffffffffffffffc7 | |
27588 | ! Mem[0000000010181408] = 00000000, %l6 = 00000000000000ff | |
27589 | lduba [%i6+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
27590 | ! Mem[0000000030001400] = f3000000, %l0 = 0000000000000000 | |
27591 | ldsba [%i0+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
27592 | ! Starting 10 instruction Store Burst | |
27593 | membar #Sync ! Added by membar checker (112) | |
27594 | ! %f14 = 00000000, Mem[0000000010001408] = 000079ff | |
27595 | sta %f14,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00000000 | |
27596 | ||
27597 | p0_label_662: | |
27598 | ! %f13 = 0000ff00, Mem[00000000100c1400] = 000000ff | |
27599 | sta %f13,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 0000ff00 | |
27600 | ! %l0 = 0000000000000000, Mem[000000001000140c] = 00000000 | |
27601 | sth %l0,[%i0+0x00c] ! Mem[000000001000140c] = 00000000 | |
27602 | ! %l2 = ffffffc7, %l3 = c7883403, Mem[0000000030001410] = 00000000 00000000 | |
27603 | stda %l2,[%i0+%o5]0x89 ! Mem[0000000030001410] = ffffffc7 c7883403 | |
27604 | ! Mem[0000000020800001] = ffff8470, %l3 = 00000000c7883403 | |
27605 | ldstuba [%o1+0x001]%asi,%l3 ! %l3 = 000000ff000000ff | |
27606 | ! %l7 = ffffffffff0000ff, Mem[0000000030081408] = f31200ff | |
27607 | stba %l7,[%i2+%o4]0x89 ! Mem[0000000030081408] = f31200ff | |
27608 | ! %f26 = 00000000, Mem[0000000010181410] = ff000000 | |
27609 | sta %f26,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00000000 | |
27610 | ! Mem[0000000030081410] = ff000000, %l2 = ffffffffffffffc7 | |
27611 | ldstuba [%i2+%o5]0x81,%l2 ! %l2 = 000000ff000000ff | |
27612 | ! %l3 = 00000000000000ff, Mem[0000000010101408] = 00940000000000ff | |
27613 | stxa %l3,[%i4+%o4]0x88 ! Mem[0000000010101408] = 00000000000000ff | |
27614 | ! %f6 = ff790000 00000000, %l7 = ffffffffff0000ff | |
27615 | ! Mem[0000000030181400] = fc734517000000ff | |
27616 | stda %f6,[%i6+%l7]ASI_PST8_SL ! Mem[0000000030181400] = 00000000000079ff | |
27617 | ! Starting 10 instruction Load Burst | |
27618 | ! Mem[0000000010141410] = 0000000000000000, %f6 = ff790000 00000000 | |
27619 | ldda [%i5+%o5]0x80,%f6 ! %f6 = 00000000 00000000 | |
27620 | ||
27621 | p0_label_663: | |
27622 | ! Mem[0000000030141410] = 000000ff, %l6 = 0000000000000000 | |
27623 | lduba [%i5+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
27624 | ! Mem[0000000030141410] = 000000ff, %l7 = ffffffffff0000ff | |
27625 | lduba [%i5+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
27626 | ! Mem[0000000010181408] = 0000000000009400, %f12 = c7883403 0000ff00 | |
27627 | ldda [%i6+%o4]0x80,%f12 ! %f12 = 00000000 00009400 | |
27628 | ! Mem[0000000010141410] = 0000000000000000, %l7 = 0000000000000000 | |
27629 | ldxa [%i5+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
27630 | ! Mem[0000000010141400] = c7ffffff00000000, %f4 = 00940000 00000000 | |
27631 | ldda [%i5+%g0]0x80,%f4 ! %f4 = c7ffffff 00000000 | |
27632 | ! Mem[0000000030181408] = 00009400, %l2 = 00000000000000ff | |
27633 | lduwa [%i6+%o4]0x89,%l2 ! %l2 = 0000000000009400 | |
27634 | ! Mem[0000000030001408] = 000000ff, %l1 = 0000000000000000 | |
27635 | lduha [%i0+%o4]0x89,%l1 ! %l1 = 00000000000000ff | |
27636 | ! Mem[0000000010101438] = 00000000 00000000, %l6 = 00000000, %l7 = 00000000 | |
27637 | ldd [%i4+0x038],%l6 ! %l6 = 0000000000000000 0000000000000000 | |
27638 | ! Mem[00000000211c0000] = ffff1a4c, %l3 = 00000000000000ff | |
27639 | ldub [%o2+%g0],%l3 ! %l3 = 00000000000000ff | |
27640 | ! Starting 10 instruction Store Burst | |
27641 | ! %f12 = 00000000 00009400, Mem[0000000030001410] = ffffffc7 c7883403 | |
27642 | stda %f12,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00000000 00009400 | |
27643 | ||
27644 | p0_label_664: | |
27645 | ! %l3 = 00000000000000ff, Mem[0000000010041408] = 00ffffff | |
27646 | stha %l3,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00ffffff | |
27647 | ! %l5 = 0000000000000079, Mem[0000000010001410] = 00ff0000000000f3 | |
27648 | stxa %l5,[%i0+%o5]0x80 ! Mem[0000000010001410] = 0000000000000079 | |
27649 | ! Mem[0000000010141423] = 000000c6, %l4 = ff000000ffff0000 | |
27650 | ldstub [%i5+0x023],%l4 ! %l4 = 000000c6000000ff | |
27651 | ! Mem[0000000010101400] = ffffffff, %l5 = 0000000000000079 | |
27652 | ldstuba [%i4+%g0]0x88,%l5 ! %l5 = 000000ff000000ff | |
27653 | ! %l6 = 00000000, %l7 = 00000000, Mem[0000000010101410] = 00ff0000 00000000 | |
27654 | stda %l6,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00000000 00000000 | |
27655 | ! Mem[0000000030141400] = 00000000, %l7 = 0000000000000000 | |
27656 | swapa [%i5+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
27657 | ! Mem[0000000020800041] = 00ff7379, %l0 = 0000000000000000 | |
27658 | ldstub [%o1+0x041],%l0 ! %l0 = 000000ff000000ff | |
27659 | ! %l7 = 0000000000000000, Mem[0000000030181410] = 00000000000079ff | |
27660 | stxa %l7,[%i6+%o5]0x81 ! Mem[0000000030181410] = 0000000000000000 | |
27661 | ! Mem[0000000030141410] = 000000ff, %l1 = 00000000000000ff | |
27662 | swapa [%i5+%o5]0x81,%l1 ! %l1 = 00000000000000ff | |
27663 | ! Starting 10 instruction Load Burst | |
27664 | ! Mem[0000000010081434] = 000000ff, %l7 = 0000000000000000 | |
27665 | lduh [%i2+0x034],%l7 ! %l7 = 0000000000000000 | |
27666 | ||
27667 | p0_label_665: | |
27668 | ! Mem[0000000010081400] = 000000ff, %l1 = 00000000000000ff | |
27669 | lduwa [%i2+%g0]0x88,%l1 ! %l1 = 00000000000000ff | |
27670 | ! Mem[0000000021800140] = 00001df6, %l3 = 00000000000000ff | |
27671 | ldsba [%o3+0x141]%asi,%l3 ! %l3 = 0000000000000000 | |
27672 | ! Mem[00000000100c1400] = 00ff0000, %f2 = 21640000 | |
27673 | lda [%i3+%g0]0x80,%f2 ! %f2 = 00ff0000 | |
27674 | ! Mem[0000000030141400] = 00000000000000ff, %f12 = 00000000 00009400 | |
27675 | ldda [%i5+%g0]0x81,%f12 ! %f12 = 00000000 000000ff | |
27676 | ! Mem[0000000030041410] = ffff0000, %l0 = 00000000000000ff | |
27677 | lduba [%i1+%o5]0x81,%l0 ! %l0 = 00000000000000ff | |
27678 | ! Mem[0000000010041424] = 00000000, %l2 = 0000000000009400 | |
27679 | ldswa [%i1+0x024]%asi,%l2 ! %l2 = 0000000000000000 | |
27680 | ! Mem[0000000010141400] = c7ffffff 00000000, %l6 = 00000000, %l7 = 00000000 | |
27681 | ldda [%i5+%g0]0x80,%l6 ! %l6 = 00000000c7ffffff 0000000000000000 | |
27682 | ! Mem[0000000010181400] = 000000ff, %l6 = 00000000c7ffffff | |
27683 | ldsba [%i6+%g0]0x88,%l6 ! %l6 = ffffffffffffffff | |
27684 | ! Mem[0000000010101428] = 00000000, %l5 = 00000000000000ff | |
27685 | ldsb [%i4+0x02a],%l5 ! %l5 = 0000000000000000 | |
27686 | ! Starting 10 instruction Store Burst | |
27687 | ! %f22 = 0000ffff ff790000, Mem[00000000100c1400] = 00ff0000 000000ff | |
27688 | std %f22,[%i3+%g0] ! Mem[00000000100c1400] = 0000ffff ff790000 | |
27689 | ||
27690 | ! Check Point 133 for processor 0 | |
27691 | ||
27692 | set p0_check_pt_data_133,%g4 | |
27693 | rd %ccr,%g5 ! %g5 = 44 | |
27694 | ldx [%g4+0x08],%g2 | |
27695 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
27696 | bne %xcc,p0_reg_check_fail0 | |
27697 | mov 0xee0,%g1 | |
27698 | ldx [%g4+0x10],%g2 | |
27699 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
27700 | bne %xcc,p0_reg_check_fail1 | |
27701 | mov 0xee1,%g1 | |
27702 | ldx [%g4+0x18],%g2 | |
27703 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
27704 | bne %xcc,p0_reg_check_fail2 | |
27705 | mov 0xee2,%g1 | |
27706 | ldx [%g4+0x20],%g2 | |
27707 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
27708 | bne %xcc,p0_reg_check_fail3 | |
27709 | mov 0xee3,%g1 | |
27710 | ldx [%g4+0x28],%g2 | |
27711 | cmp %l4,%g2 ! %l4 = 00000000000000c6 | |
27712 | bne %xcc,p0_reg_check_fail4 | |
27713 | mov 0xee4,%g1 | |
27714 | ldx [%g4+0x30],%g2 | |
27715 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
27716 | bne %xcc,p0_reg_check_fail5 | |
27717 | mov 0xee5,%g1 | |
27718 | ldx [%g4+0x38],%g2 | |
27719 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
27720 | bne %xcc,p0_reg_check_fail6 | |
27721 | mov 0xee6,%g1 | |
27722 | ldx [%g4+0x40],%g2 | |
27723 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
27724 | bne %xcc,p0_reg_check_fail7 | |
27725 | mov 0xee7,%g1 | |
27726 | ldx [%g4+0x48],%g3 | |
27727 | std %f2,[%g4] | |
27728 | ldx [%g4],%g2 | |
27729 | cmp %g3,%g2 ! %f2 = 00ff0000 00000000 | |
27730 | bne %xcc,p0_freg_check_fail | |
27731 | mov 0xf02,%g1 | |
27732 | ldx [%g4+0x50],%g3 | |
27733 | std %f4,[%g4] | |
27734 | ldx [%g4],%g2 | |
27735 | cmp %g3,%g2 ! %f4 = c7ffffff 00000000 | |
27736 | bne %xcc,p0_freg_check_fail | |
27737 | mov 0xf04,%g1 | |
27738 | ldx [%g4+0x58],%g3 | |
27739 | std %f6,[%g4] | |
27740 | ldx [%g4],%g2 | |
27741 | cmp %g3,%g2 ! %f6 = 00000000 00000000 | |
27742 | bne %xcc,p0_freg_check_fail | |
27743 | mov 0xf06,%g1 | |
27744 | ldx [%g4+0x60],%g3 | |
27745 | std %f12,[%g4] | |
27746 | ldx [%g4],%g2 | |
27747 | cmp %g3,%g2 ! %f12 = 00000000 000000ff | |
27748 | bne %xcc,p0_freg_check_fail | |
27749 | mov 0xf12,%g1 | |
27750 | ldx [%g4+0x68],%g3 | |
27751 | std %f16,[%g4] | |
27752 | ldx [%g4],%g2 | |
27753 | cmp %g3,%g2 ! %f16 = 00000000 ff790000 | |
27754 | bne %xcc,p0_freg_check_fail | |
27755 | mov 0xf16,%g1 | |
27756 | ldx [%g4+0x70],%g3 | |
27757 | std %f18,[%g4] | |
27758 | ldx [%g4],%g2 | |
27759 | cmp %g3,%g2 ! %f18 = 000079ff 00000000 | |
27760 | bne %xcc,p0_freg_check_fail | |
27761 | mov 0xf18,%g1 | |
27762 | ldx [%g4+0x78],%g3 | |
27763 | std %f20,[%g4] | |
27764 | ldx [%g4],%g2 | |
27765 | cmp %g3,%g2 ! %f20 = 00ff0000 000000f3 | |
27766 | bne %xcc,p0_freg_check_fail | |
27767 | mov 0xf20,%g1 | |
27768 | ldx [%g4+0x80],%g3 | |
27769 | std %f22,[%g4] | |
27770 | ldx [%g4],%g2 | |
27771 | cmp %g3,%g2 ! %f22 = 0000ffff ff790000 | |
27772 | bne %xcc,p0_freg_check_fail | |
27773 | mov 0xf22,%g1 | |
27774 | ldx [%g4+0x88],%g3 | |
27775 | std %f24,[%g4] | |
27776 | ldx [%g4],%g2 | |
27777 | cmp %g3,%g2 ! %f24 = 0000ff00 00000000 | |
27778 | bne %xcc,p0_freg_check_fail | |
27779 | mov 0xf24,%g1 | |
27780 | ldx [%g4+0x90],%g3 | |
27781 | std %f26,[%g4] | |
27782 | ldx [%g4],%g2 | |
27783 | cmp %g3,%g2 ! %f26 = 00000000 00000000 | |
27784 | bne %xcc,p0_freg_check_fail | |
27785 | mov 0xf26,%g1 | |
27786 | ldx [%g4+0x98],%g3 | |
27787 | std %f28,[%g4] | |
27788 | ldx [%g4],%g2 | |
27789 | cmp %g3,%g2 ! %f28 = 000000c6 ffff0000 | |
27790 | bne %xcc,p0_freg_check_fail | |
27791 | mov 0xf28,%g1 | |
27792 | ldx [%g4+0xa0],%g3 | |
27793 | std %f30,[%g4] | |
27794 | ldx [%g4],%g2 | |
27795 | cmp %g3,%g2 ! %f30 = ff000000 1f000076 | |
27796 | bne %xcc,p0_freg_check_fail | |
27797 | mov 0xf30,%g1 | |
27798 | ||
27799 | ! Check Point 133 completed | |
27800 | ||
27801 | ||
27802 | p0_label_666: | |
27803 | ! Mem[0000000010141400] = ffffffc7, %l2 = 0000000000000000 | |
27804 | ldstuba [%i5+%g0]0x88,%l2 ! %l2 = 000000c7000000ff | |
27805 | ! %l0 = 00000000000000ff, Mem[0000000030041400] = ff790000 | |
27806 | stwa %l0,[%i1+%g0]0x89 ! Mem[0000000030041400] = 000000ff | |
27807 | ! Mem[000000001014141c] = ffffffff, %l3 = 0000000000000000 | |
27808 | swap [%i5+0x01c],%l3 ! %l3 = 00000000ffffffff | |
27809 | ! Mem[0000000010081410] = 0000ff00, %l7 = 0000000000000000 | |
27810 | ldstuba [%i2+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
27811 | ! %l4 = 000000c6, %l5 = 00000000, Mem[0000000010181408] = 00000000 00940000 | |
27812 | stda %l4,[%i6+%o4]0x88 ! Mem[0000000010181408] = 000000c6 00000000 | |
27813 | ! %f30 = ff000000, Mem[0000000010041408] = 00ffffff | |
27814 | sta %f30,[%i1+%o4]0x80 ! Mem[0000000010041408] = ff000000 | |
27815 | ! %f6 = 00000000 00000000, Mem[0000000030101400] = 0000ff79 000000ff | |
27816 | stda %f6 ,[%i4+%g0]0x89 ! Mem[0000000030101400] = 00000000 00000000 | |
27817 | ! %l4 = 000000c6, %l5 = 00000000, Mem[0000000010041410] = 00000000 00000000 | |
27818 | stda %l4,[%i1+%o5]0x80 ! Mem[0000000010041410] = 000000c6 00000000 | |
27819 | ! %l4 = 000000c6, %l5 = 00000000, Mem[00000000300c1400] = ffff0000 ffffffff | |
27820 | stda %l4,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 000000c6 00000000 | |
27821 | ! Starting 10 instruction Load Burst | |
27822 | ! Mem[0000000030101400] = 0000000000000000, %f0 = 000000c6 ffffffff | |
27823 | ldda [%i4+%g0]0x81,%f0 ! %f0 = 00000000 00000000 | |
27824 | ||
27825 | p0_label_667: | |
27826 | ! Mem[0000000010081424] = 00ff0000, %l3 = 00000000ffffffff | |
27827 | lduwa [%i2+0x024]%asi,%l3 ! %l3 = 0000000000ff0000 | |
27828 | ! Mem[0000000010101408] = ff000000, %l5 = 0000000000000000 | |
27829 | ldsba [%i4+%o4]0x80,%l5 ! %l5 = ffffffffffffffff | |
27830 | ! Mem[00000000201c0000] = ffff9457, %l7 = 0000000000000000 | |
27831 | ldsb [%o0+0x001],%l7 ! %l7 = ffffffffffffffff | |
27832 | ! Mem[0000000010001410] = 00000000, %l5 = ffffffffffffffff | |
27833 | lduba [%i0+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
27834 | ! Mem[0000000030101400] = 00000000, %l1 = 00000000000000ff | |
27835 | lduha [%i4+%g0]0x89,%l1 ! %l1 = 0000000000000000 | |
27836 | ! Mem[000000001014142c] = 0000ff03, %f7 = 00000000 | |
27837 | ld [%i5+0x02c],%f7 ! %f7 = 0000ff03 | |
27838 | ! Mem[00000000300c1408] = ffff0000, %l7 = ffffffffffffffff | |
27839 | ldsha [%i3+%o4]0x81,%l7 ! %l7 = ffffffffffffffff | |
27840 | ! Mem[00000000300c1408] = ffff0000, %l0 = 00000000000000ff | |
27841 | lduha [%i3+%o4]0x81,%l0 ! %l0 = 000000000000ffff | |
27842 | ! Mem[0000000030181400] = 00000000000079ff, %f2 = 00ff0000 00000000 | |
27843 | ldda [%i6+%g0]0x81,%f2 ! %f2 = 00000000 000079ff | |
27844 | ! Starting 10 instruction Store Burst | |
27845 | ! Mem[00000000100c1400] = 0000ffff, %l4 = 00000000000000c6, %asi = 80 | |
27846 | swapa [%i3+0x000]%asi,%l4 ! %l4 = 000000000000ffff | |
27847 | ||
27848 | p0_label_668: | |
27849 | ! %f17 = ff790000, Mem[0000000010141438] = 0000ff00 | |
27850 | sta %f17,[%i5+0x038]%asi ! Mem[0000000010141438] = ff790000 | |
27851 | ! %l4 = 0000ffff, %l5 = 00000000, Mem[0000000010001410] = 00000000 79000000 | |
27852 | stda %l4,[%i0+%o5]0x88 ! Mem[0000000010001410] = 0000ffff 00000000 | |
27853 | ! Mem[0000000010141418] = 000000ff, %l4 = 000000000000ffff | |
27854 | swap [%i5+0x018],%l4 ! %l4 = 00000000000000ff | |
27855 | ! %l4 = 00000000000000ff, Mem[0000000030001400] = 000000f3 | |
27856 | stwa %l4,[%i0+%g0]0x81 ! Mem[0000000030001400] = 000000ff | |
27857 | ! Mem[0000000030081400] = 00000000, %l2 = 00000000000000c7 | |
27858 | ldstuba [%i2+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
27859 | ! %f7 = 0000ff03, Mem[00000000300c1410] = ffffffff | |
27860 | sta %f7 ,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 0000ff03 | |
27861 | ! %f23 = ff790000, Mem[0000000010001400] = 00000000 | |
27862 | sta %f23,[%i0+%g0]0x88 ! Mem[0000000010001400] = ff790000 | |
27863 | ! Mem[0000000010001408] = 00000000, %l4 = 00000000000000ff | |
27864 | ldstuba [%i0+%o4]0x80,%l4 ! %l4 = 00000000000000ff | |
27865 | ! %f10 = 03000000 00000000, Mem[0000000030181400] = 00000000 000079ff | |
27866 | stda %f10,[%i6+%g0]0x81 ! Mem[0000000030181400] = 03000000 00000000 | |
27867 | ! Starting 10 instruction Load Burst | |
27868 | ! Mem[0000000030141400] = 00000000, %l5 = 0000000000000000 | |
27869 | ldsba [%i5+%g0]0x89,%l5 ! %l5 = 0000000000000000 | |
27870 | ||
27871 | p0_label_669: | |
27872 | ! Mem[00000000300c1408] = 0000ffff, %l4 = 0000000000000000 | |
27873 | lduha [%i3+%o4]0x89,%l4 ! %l4 = 000000000000ffff | |
27874 | ! Mem[0000000030001408] = 000000ff, %l2 = 0000000000000000 | |
27875 | ldsha [%i0+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
27876 | ! Mem[0000000030141410] = 000000ff ffffffff, %l6 = ffffffff, %l7 = ffffffff | |
27877 | ldda [%i5+%o5]0x81,%l6 ! %l6 = 00000000000000ff 00000000ffffffff | |
27878 | ! Mem[0000000010181400] = ff000000, %l2 = 00000000000000ff | |
27879 | lduha [%i6+%g0]0x80,%l2 ! %l2 = 000000000000ff00 | |
27880 | ! Mem[0000000020800000] = ffff8470, %l1 = 0000000000000000 | |
27881 | lduba [%o1+0x001]%asi,%l1 ! %l1 = 00000000000000ff | |
27882 | ! Mem[00000000100c1408] = 0000c4ff, %l5 = 0000000000000000 | |
27883 | ldsba [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
27884 | ! Mem[0000000030101410] = ffffffff, %l4 = 000000000000ffff | |
27885 | lduwa [%i4+%o5]0x89,%l4 ! %l4 = 00000000ffffffff | |
27886 | ! Mem[0000000010141408] = 00000000, %l4 = 00000000ffffffff | |
27887 | ldswa [%i5+%o4]0x88,%l4 ! %l4 = 0000000000000000 | |
27888 | ! Mem[0000000030141408] = 000000ff, %l7 = 00000000ffffffff | |
27889 | lduba [%i5+%o4]0x89,%l7 ! %l7 = 00000000000000ff | |
27890 | ! Starting 10 instruction Store Burst | |
27891 | ! %f20 = 00ff0000, Mem[0000000010141410] = 00000000 | |
27892 | sta %f20,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00ff0000 | |
27893 | ||
27894 | p0_label_670: | |
27895 | ! %l6 = 00000000000000ff, Mem[000000001000141c] = ff790000, %asi = 80 | |
27896 | stwa %l6,[%i0+0x01c]%asi ! Mem[000000001000141c] = 000000ff | |
27897 | ! Mem[0000000030081400] = ff000000, %l0 = 000000000000ffff | |
27898 | swapa [%i2+%g0]0x81,%l0 ! %l0 = 00000000ff000000 | |
27899 | ! Mem[0000000010101428] = 00000000, %l7 = 00000000000000ff | |
27900 | ldstuba [%i4+0x028]%asi,%l7 ! %l7 = 00000000000000ff | |
27901 | ! %l4 = 0000000000000000, Mem[0000000030101408] = ff000000 | |
27902 | stba %l4,[%i4+%o4]0x81 ! Mem[0000000030101408] = 00000000 | |
27903 | ! %f26 = 00000000 00000000, %l2 = 000000000000ff00 | |
27904 | ! Mem[0000000030001420] = 00000000ff0000ff | |
27905 | add %i0,0x020,%g1 | |
27906 | stda %f26,[%g1+%l2]ASI_PST8_S ! Mem[0000000030001420] = 00000000ff0000ff | |
27907 | ! Mem[0000000010141400] = ffffffff, %l7 = 0000000000000000 | |
27908 | ldstuba [%i5+%g0]0x80,%l7 ! %l7 = 000000ff000000ff | |
27909 | ! %l2 = 000000000000ff00, Mem[00000000100c1400] = 000000c6 | |
27910 | stwa %l2,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 0000ff00 | |
27911 | ! %f24 = 0000ff00 00000000, %l4 = 0000000000000000 | |
27912 | ! Mem[0000000030041428] = 0000000000000003 | |
27913 | add %i1,0x028,%g1 | |
27914 | stda %f24,[%g1+%l4]ASI_PST8_SL ! Mem[0000000030041428] = 0000000000000003 | |
27915 | ! Mem[0000000010081404] = ff000000, %l0 = 00000000ff000000, %asi = 80 | |
27916 | swapa [%i2+0x004]%asi,%l0 ! %l0 = 00000000ff000000 | |
27917 | ! Starting 10 instruction Load Burst | |
27918 | ! Mem[0000000010141408] = 000000ff 00000000, %l4 = 00000000, %l5 = 00000000 | |
27919 | ldda [%i5+%o4]0x88,%l4 ! %l4 = 0000000000000000 00000000000000ff | |
27920 | ||
27921 | ! Check Point 134 for processor 0 | |
27922 | ||
27923 | set p0_check_pt_data_134,%g4 | |
27924 | rd %ccr,%g5 ! %g5 = 44 | |
27925 | ldx [%g4+0x08],%g2 | |
27926 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
27927 | bne %xcc,p0_reg_check_fail0 | |
27928 | mov 0xee0,%g1 | |
27929 | ldx [%g4+0x10],%g2 | |
27930 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
27931 | bne %xcc,p0_reg_check_fail1 | |
27932 | mov 0xee1,%g1 | |
27933 | ldx [%g4+0x18],%g2 | |
27934 | cmp %l2,%g2 ! %l2 = 000000000000ff00 | |
27935 | bne %xcc,p0_reg_check_fail2 | |
27936 | mov 0xee2,%g1 | |
27937 | ldx [%g4+0x20],%g2 | |
27938 | cmp %l3,%g2 ! %l3 = 0000000000ff0000 | |
27939 | bne %xcc,p0_reg_check_fail3 | |
27940 | mov 0xee3,%g1 | |
27941 | ldx [%g4+0x28],%g2 | |
27942 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
27943 | bne %xcc,p0_reg_check_fail4 | |
27944 | mov 0xee4,%g1 | |
27945 | ldx [%g4+0x30],%g2 | |
27946 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
27947 | bne %xcc,p0_reg_check_fail5 | |
27948 | mov 0xee5,%g1 | |
27949 | ldx [%g4+0x38],%g2 | |
27950 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
27951 | bne %xcc,p0_reg_check_fail7 | |
27952 | mov 0xee7,%g1 | |
27953 | ldx [%g4+0x40],%g3 | |
27954 | std %f0,[%g4] | |
27955 | ldx [%g4],%g2 | |
27956 | cmp %g3,%g2 ! %f0 = 00000000 00000000 | |
27957 | bne %xcc,p0_freg_check_fail | |
27958 | mov 0xf00,%g1 | |
27959 | ldx [%g4+0x48],%g3 | |
27960 | std %f2,[%g4] | |
27961 | ldx [%g4],%g2 | |
27962 | cmp %g3,%g2 ! %f2 = 00000000 000079ff | |
27963 | bne %xcc,p0_freg_check_fail | |
27964 | mov 0xf02,%g1 | |
27965 | ldx [%g4+0x50],%g3 | |
27966 | std %f4,[%g4] | |
27967 | ldx [%g4],%g2 | |
27968 | cmp %g3,%g2 ! %f4 = c7ffffff 00000000 | |
27969 | bne %xcc,p0_freg_check_fail | |
27970 | mov 0xf04,%g1 | |
27971 | ldx [%g4+0x58],%g3 | |
27972 | std %f6,[%g4] | |
27973 | ldx [%g4],%g2 | |
27974 | cmp %g3,%g2 ! %f6 = 00000000 0000ff03 | |
27975 | bne %xcc,p0_freg_check_fail | |
27976 | mov 0xf06,%g1 | |
27977 | ||
27978 | ! Check Point 134 completed | |
27979 | ||
27980 | ||
27981 | p0_label_671: | |
27982 | ! Mem[00000000300c1410] = 03ff0000ffffffff, %l7 = 00000000000000ff | |
27983 | ldxa [%i3+%o5]0x81,%l7 ! %l7 = 03ff0000ffffffff | |
27984 | ! Mem[0000000010041408] = ff000000ff000000, %f12 = 00000000 000000ff | |
27985 | ldda [%i1+%o4]0x80,%f12 ! %f12 = ff000000 ff000000 | |
27986 | ! Mem[0000000030181400] = 00000003, %l1 = 00000000000000ff | |
27987 | ldsha [%i6+%g0]0x89,%l1 ! %l1 = 0000000000000003 | |
27988 | ! Mem[0000000010181410] = 00000000ff0012f3, %f28 = 000000c6 ffff0000 | |
27989 | ldda [%i6+%o5]0x80,%f28 ! %f28 = 00000000 ff0012f3 | |
27990 | ! %f31 = 1f000076, Mem[000000001008142c] = 00000003 | |
27991 | sta %f31,[%i2+0x02c]%asi ! Mem[000000001008142c] = 1f000076 | |
27992 | ! Mem[0000000010001424] = 00000000, %l3 = 0000000000ff0000 | |
27993 | lduw [%i0+0x024],%l3 ! %l3 = 0000000000000000 | |
27994 | ! Mem[00000000300c1408] = ffff0000, %l2 = 000000000000ff00 | |
27995 | ldswa [%i3+%o4]0x81,%l2 ! %l2 = ffffffffffff0000 | |
27996 | ! Mem[00000000100c1434] = 0000ffff, %l7 = 03ff0000ffffffff | |
27997 | ldsw [%i3+0x034],%l7 ! %l7 = 000000000000ffff | |
27998 | ! Mem[0000000010041410] = c6000000, %f29 = ff0012f3 | |
27999 | lda [%i1+%o5]0x88,%f29 ! %f29 = c6000000 | |
28000 | ! Starting 10 instruction Store Burst | |
28001 | ! %f16 = 00000000 ff790000 000079ff 00000000 | |
28002 | ! %f20 = 00ff0000 000000f3 0000ffff ff790000 | |
28003 | ! %f24 = 0000ff00 00000000 00000000 00000000 | |
28004 | ! %f28 = 00000000 c6000000 ff000000 1f000076 | |
28005 | stda %f16,[%i5]ASI_BLK_PL ! Block Store to 0000000010141400 | |
28006 | ||
28007 | p0_label_672: | |
28008 | ! %l6 = 00000000000000ff, Mem[0000000030001410] = 0000000000009400 | |
28009 | stxa %l6,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00000000000000ff | |
28010 | ! Mem[00000000100c1408] = 0000c4ff, %l5 = 00000000000000ff | |
28011 | ldsha [%i3+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
28012 | ! %l7 = 000000000000ffff, Mem[0000000030141400] = 00000000 | |
28013 | stha %l7,[%i5+%g0]0x89 ! Mem[0000000030141400] = 0000ffff | |
28014 | ! %l6 = 00000000000000ff, Mem[0000000010041414] = 00000000, %asi = 80 | |
28015 | stha %l6,[%i1+0x014]%asi ! Mem[0000000010041414] = 00ff0000 | |
28016 | ! %l2 = ffffffffffff0000, Mem[0000000030101400] = 00000000 | |
28017 | stwa %l2,[%i4+%g0]0x81 ! Mem[0000000030101400] = ffff0000 | |
28018 | ! %l1 = 0000000000000003, Mem[0000000010101408] = 000000ff | |
28019 | stha %l1,[%i4+%o4]0x88 ! Mem[0000000010101408] = 00000003 | |
28020 | ! Mem[0000000010001400] = ff790000, %l1 = 0000000000000003 | |
28021 | ldswa [%i0+%g0]0x88,%l1 ! %l1 = ffffffffff790000 | |
28022 | ! %l2 = ffffffffffff0000, Mem[0000000030081410] = 000000ff | |
28023 | stwa %l2,[%i2+%o5]0x89 ! Mem[0000000030081410] = ffff0000 | |
28024 | ! Mem[0000000010081408] = c7000000, %l7 = 000000000000ffff | |
28025 | swapa [%i2+%o4]0x88,%l7 ! %l7 = 00000000c7000000 | |
28026 | ! Starting 10 instruction Load Burst | |
28027 | ! Mem[0000000010081400] = 000000ff, %l3 = 0000000000000000 | |
28028 | ldswa [%i2+%g0]0x88,%l3 ! %l3 = 00000000000000ff | |
28029 | ||
28030 | p0_label_673: | |
28031 | ! Mem[0000000010001400] = 000079ff ff790000, %l6 = 000000ff, %l7 = c7000000 | |
28032 | ldda [%i0+%g0]0x80,%l6 ! %l6 = 00000000000079ff 00000000ff790000 | |
28033 | ! Mem[0000000030141400] = ffff0000000000ff, %l0 = 00000000ff000000 | |
28034 | ldxa [%i5+%g0]0x81,%l0 ! %l0 = ffff0000000000ff | |
28035 | ! Mem[0000000030041400] = 000000ff, %l3 = 00000000000000ff | |
28036 | ldswa [%i1+%g0]0x89,%l3 ! %l3 = 00000000000000ff | |
28037 | ! Mem[0000000010101400] = ffffffffc6000000, %f14 = 00000000 00000000 | |
28038 | ldda [%i4+%g0]0x80,%f14 ! %f14 = ffffffff c6000000 | |
28039 | ! Mem[0000000010101410] = 00000000, %l3 = 00000000000000ff | |
28040 | lduba [%i4+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
28041 | ! Mem[00000000100c1400] = 0000ff00ff790000, %l4 = 0000000000000000 | |
28042 | ldxa [%i3+%g0]0x80,%l4 ! %l4 = 0000ff00ff790000 | |
28043 | ! Mem[0000000030101410] = ffffffffffffffff, %f0 = 00000000 00000000 | |
28044 | ldda [%i4+%o5]0x81,%f0 ! %f0 = ffffffff ffffffff | |
28045 | ! Mem[0000000010181400] = ff000000 0000ffff, %l4 = ff790000, %l5 = 00000000 | |
28046 | ldda [%i6+%g0]0x80,%l4 ! %l4 = 00000000ff000000 000000000000ffff | |
28047 | membar #Sync ! Added by membar checker (113) | |
28048 | ! Mem[0000000030141400] = ffff0000 000000ff ff000000 ffffffff | |
28049 | ! Mem[0000000030141410] = 000000ff ffffffff fc734517 000000ff | |
28050 | ! Mem[0000000030141420] = 1f41ff76 2164159c ffffffff 79ff0000 | |
28051 | ! Mem[0000000030141430] = ff000000 00009400 7827da3e 597bac10 | |
28052 | ldda [%i5]ASI_BLK_S,%f16 ! Block Load from 0000000030141400 | |
28053 | ! Starting 10 instruction Store Burst | |
28054 | ! %f3 = 000079ff, Mem[00000000100c1400] = 00ff0000 | |
28055 | sta %f3 ,[%i3+%g0]0x88 ! Mem[00000000100c1400] = 000079ff | |
28056 | ||
28057 | p0_label_674: | |
28058 | ! Mem[00000000201c0000] = ffff9457, %l6 = 00000000000079ff | |
28059 | ldstub [%o0+%g0],%l6 ! %l6 = 000000ff000000ff | |
28060 | ! Mem[0000000030101400] = 0000ffff, %l6 = 00000000000000ff | |
28061 | ldstuba [%i4+%g0]0x89,%l6 ! %l6 = 000000ff000000ff | |
28062 | ! Mem[00000000100c1438] = c600000000000000, %l3 = 0000000000000000, %l7 = 00000000ff790000 | |
28063 | add %i3,0x38,%g1 | |
28064 | casxa [%g1]0x80,%l3,%l7 ! %l7 = c600000000000000 | |
28065 | ! %l0 = 000000ff, %l1 = ff790000, Mem[0000000010141400] = 000079ff 00000000 | |
28066 | stda %l0,[%i5+%g0]0x80 ! Mem[0000000010141400] = 000000ff ff790000 | |
28067 | ! Mem[0000000010141410] = 000000f3, %l3 = 0000000000000000 | |
28068 | swapa [%i5+%o5]0x88,%l3 ! %l3 = 00000000000000f3 | |
28069 | ! Mem[0000000030081400] = 0000ffff, %l0 = ffff0000000000ff | |
28070 | ldstuba [%i2+%g0]0x81,%l0 ! %l0 = 00000000000000ff | |
28071 | ! %f0 = ffffffff, Mem[0000000030001400] = 000000ff | |
28072 | sta %f0 ,[%i0+%g0]0x81 ! Mem[0000000030001400] = ffffffff | |
28073 | ! %f4 = c7ffffff 00000000, Mem[0000000010081408] = 0000ffff 159c0000 | |
28074 | stda %f4 ,[%i2+%o4]0x88 ! Mem[0000000010081408] = c7ffffff 00000000 | |
28075 | ! %l0 = 0000000000000000, Mem[0000000010081410] = ffff0000 | |
28076 | stha %l0,[%i2+%o5]0x80 ! Mem[0000000010081410] = 00000000 | |
28077 | ! Starting 10 instruction Load Burst | |
28078 | ! Mem[0000000010081408] = 00000000, %l4 = 00000000ff000000 | |
28079 | ldsha [%i2+0x00a]%asi,%l4 ! %l4 = 0000000000000000 | |
28080 | ||
28081 | p0_label_675: | |
28082 | ! Mem[00000000300c1400] = c6000000 00000000, %l4 = 00000000, %l5 = 0000ffff | |
28083 | ldda [%i3+%g0]0x81,%l4 ! %l4 = 00000000c6000000 0000000000000000 | |
28084 | ! Mem[00000000100c1400] = ff790000, %l4 = 00000000c6000000 | |
28085 | ldsb [%i3+0x001],%l4 ! %l4 = 0000000000000079 | |
28086 | ! Mem[0000000010041424] = 00000000, %l0 = 0000000000000000 | |
28087 | lduw [%i1+0x024],%l0 ! %l0 = 0000000000000000 | |
28088 | ! Mem[0000000010041410] = 000000c6, %l5 = 0000000000000000 | |
28089 | ldsha [%i1+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
28090 | ! Mem[0000000030101408] = 00000000, %l4 = 0000000000000079 | |
28091 | lduha [%i4+%o4]0x81,%l4 ! %l4 = 0000000000000000 | |
28092 | ! Mem[0000000010081410] = 00000000, %l3 = 00000000000000f3 | |
28093 | ldsba [%i2+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
28094 | ! Mem[0000000010181408] = c6000000, %l5 = 0000000000000000 | |
28095 | lduwa [%i6+%o4]0x80,%l5 ! %l5 = 00000000c6000000 | |
28096 | ! Mem[0000000010041408] = ff000000, %l7 = c600000000000000 | |
28097 | ldsha [%i1+%o4]0x80,%l7 ! %l7 = ffffffffffffff00 | |
28098 | ! Mem[0000000010101410] = 00000000, %l3 = 0000000000000000 | |
28099 | ldsba [%i4+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
28100 | ! Starting 10 instruction Store Burst | |
28101 | ! Mem[000000001014141c] = ffff0000, %l6 = 00000000000000ff | |
28102 | swap [%i5+0x01c],%l6 ! %l6 = 00000000ffff0000 | |
28103 | ||
28104 | ! Check Point 135 for processor 0 | |
28105 | ||
28106 | set p0_check_pt_data_135,%g4 | |
28107 | rd %ccr,%g5 ! %g5 = 44 | |
28108 | ldx [%g4+0x08],%g2 | |
28109 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
28110 | bne %xcc,p0_reg_check_fail0 | |
28111 | mov 0xee0,%g1 | |
28112 | ldx [%g4+0x10],%g2 | |
28113 | cmp %l1,%g2 ! %l1 = ffffffffff790000 | |
28114 | bne %xcc,p0_reg_check_fail1 | |
28115 | mov 0xee1,%g1 | |
28116 | ldx [%g4+0x18],%g2 | |
28117 | cmp %l2,%g2 ! %l2 = ffffffffffff0000 | |
28118 | bne %xcc,p0_reg_check_fail2 | |
28119 | mov 0xee2,%g1 | |
28120 | ldx [%g4+0x20],%g2 | |
28121 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
28122 | bne %xcc,p0_reg_check_fail3 | |
28123 | mov 0xee3,%g1 | |
28124 | ldx [%g4+0x28],%g2 | |
28125 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
28126 | bne %xcc,p0_reg_check_fail4 | |
28127 | mov 0xee4,%g1 | |
28128 | ldx [%g4+0x30],%g2 | |
28129 | cmp %l5,%g2 ! %l5 = 00000000c6000000 | |
28130 | bne %xcc,p0_reg_check_fail5 | |
28131 | mov 0xee5,%g1 | |
28132 | ldx [%g4+0x38],%g2 | |
28133 | cmp %l6,%g2 ! %l6 = 00000000ffff0000 | |
28134 | bne %xcc,p0_reg_check_fail6 | |
28135 | mov 0xee6,%g1 | |
28136 | ldx [%g4+0x40],%g2 | |
28137 | cmp %l7,%g2 ! %l7 = ffffffffffffff00 | |
28138 | bne %xcc,p0_reg_check_fail7 | |
28139 | mov 0xee7,%g1 | |
28140 | ldx [%g4+0x48],%g3 | |
28141 | std %f0,[%g4] | |
28142 | ldx [%g4],%g2 | |
28143 | cmp %g3,%g2 ! %f0 = ffffffff ffffffff | |
28144 | bne %xcc,p0_freg_check_fail | |
28145 | mov 0xf00,%g1 | |
28146 | ldx [%g4+0x50],%g3 | |
28147 | std %f4,[%g4] | |
28148 | ldx [%g4],%g2 | |
28149 | cmp %g3,%g2 ! %f4 = c7ffffff 00000000 | |
28150 | bne %xcc,p0_freg_check_fail | |
28151 | mov 0xf04,%g1 | |
28152 | ldx [%g4+0x58],%g3 | |
28153 | std %f6,[%g4] | |
28154 | ldx [%g4],%g2 | |
28155 | cmp %g3,%g2 ! %f6 = 00000000 0000ff03 | |
28156 | bne %xcc,p0_freg_check_fail | |
28157 | mov 0xf06,%g1 | |
28158 | ldx [%g4+0x60],%g3 | |
28159 | std %f12,[%g4] | |
28160 | ldx [%g4],%g2 | |
28161 | cmp %g3,%g2 ! %f12 = ff000000 ff000000 | |
28162 | bne %xcc,p0_freg_check_fail | |
28163 | mov 0xf12,%g1 | |
28164 | ldx [%g4+0x68],%g3 | |
28165 | std %f14,[%g4] | |
28166 | ldx [%g4],%g2 | |
28167 | cmp %g3,%g2 ! %f14 = ffffffff c6000000 | |
28168 | bne %xcc,p0_freg_check_fail | |
28169 | mov 0xf14,%g1 | |
28170 | ldx [%g4+0x70],%g3 | |
28171 | std %f16,[%g4] | |
28172 | ldx [%g4],%g2 | |
28173 | cmp %g3,%g2 ! %f16 = ffff0000 000000ff | |
28174 | bne %xcc,p0_freg_check_fail | |
28175 | mov 0xf16,%g1 | |
28176 | ldx [%g4+0x78],%g3 | |
28177 | std %f18,[%g4] | |
28178 | ldx [%g4],%g2 | |
28179 | cmp %g3,%g2 ! %f18 = ff000000 ffffffff | |
28180 | bne %xcc,p0_freg_check_fail | |
28181 | mov 0xf18,%g1 | |
28182 | ldx [%g4+0x80],%g3 | |
28183 | std %f20,[%g4] | |
28184 | ldx [%g4],%g2 | |
28185 | cmp %g3,%g2 ! %f20 = 000000ff ffffffff | |
28186 | bne %xcc,p0_freg_check_fail | |
28187 | mov 0xf20,%g1 | |
28188 | ldx [%g4+0x88],%g3 | |
28189 | std %f22,[%g4] | |
28190 | ldx [%g4],%g2 | |
28191 | cmp %g3,%g2 ! %f22 = fc734517 000000ff | |
28192 | bne %xcc,p0_freg_check_fail | |
28193 | mov 0xf22,%g1 | |
28194 | ldx [%g4+0x90],%g3 | |
28195 | std %f24,[%g4] | |
28196 | ldx [%g4],%g2 | |
28197 | cmp %g3,%g2 ! %f24 = 1f41ff76 2164159c | |
28198 | bne %xcc,p0_freg_check_fail | |
28199 | mov 0xf24,%g1 | |
28200 | ldx [%g4+0x98],%g3 | |
28201 | std %f26,[%g4] | |
28202 | ldx [%g4],%g2 | |
28203 | cmp %g3,%g2 ! %f26 = ffffffff 79ff0000 | |
28204 | bne %xcc,p0_freg_check_fail | |
28205 | mov 0xf26,%g1 | |
28206 | ldx [%g4+0xa0],%g3 | |
28207 | std %f28,[%g4] | |
28208 | ldx [%g4],%g2 | |
28209 | cmp %g3,%g2 ! %f28 = ff000000 00009400 | |
28210 | bne %xcc,p0_freg_check_fail | |
28211 | mov 0xf28,%g1 | |
28212 | ldx [%g4+0xa8],%g3 | |
28213 | std %f30,[%g4] | |
28214 | ldx [%g4],%g2 | |
28215 | cmp %g3,%g2 ! %f30 = 7827da3e 597bac10 | |
28216 | bne %xcc,p0_freg_check_fail | |
28217 | mov 0xf30,%g1 | |
28218 | ||
28219 | ! Check Point 135 completed | |
28220 | ||
28221 | ||
28222 | p0_label_676: | |
28223 | ! Mem[0000000010001408] = 000000ff, %l3 = 0000000000000000 | |
28224 | swapa [%i0+%o4]0x88,%l3 ! %l3 = 00000000000000ff | |
28225 | ! %f15 = c6000000, Mem[000000001018143c] = ffff00ff | |
28226 | sta %f15,[%i6+0x03c]%asi ! Mem[000000001018143c] = c6000000 | |
28227 | ! %l2 = ffffffffffff0000, Mem[0000000010181418] = ff000000ff000000 | |
28228 | stx %l2,[%i6+0x018] ! Mem[0000000010181418] = ffffffffffff0000 | |
28229 | ! %f28 = ff000000 00009400, Mem[0000000010181410] = 00000000 ff0012f3 | |
28230 | stda %f28,[%i6+0x010]%asi ! Mem[0000000010181410] = ff000000 00009400 | |
28231 | ! Mem[0000000010001400] = 000079ffff790000, %l2 = ffffffffffff0000, %l4 = 0000000000000000 | |
28232 | casxa [%i0]0x80,%l2,%l4 ! %l4 = 000079ffff790000 | |
28233 | membar #Sync ! Added by membar checker (114) | |
28234 | ! %f20 = 000000ff ffffffff, %l1 = ffffffffff790000 | |
28235 | ! Mem[0000000030141428] = ffffffff79ff0000 | |
28236 | add %i5,0x028,%g1 | |
28237 | stda %f20,[%g1+%l1]ASI_PST16_S ! Mem[0000000030141428] = ffffffff79ff0000 | |
28238 | ! Mem[0000000010141400] = 000000ff, %l2 = ffffffffffff0000, %asi = 80 | |
28239 | swapa [%i5+0x000]%asi,%l2 ! %l2 = 00000000000000ff | |
28240 | ! %l2 = 000000ff, %l3 = 000000ff, Mem[0000000030181410] = 00000000 00000000 | |
28241 | stda %l2,[%i6+%o5]0x89 ! Mem[0000000030181410] = 000000ff 000000ff | |
28242 | ! Mem[0000000010001400] = ff790000, %l0 = 0000000000000000 | |
28243 | swapa [%i0+%g0]0x88,%l0 ! %l0 = 00000000ff790000 | |
28244 | ! Starting 10 instruction Load Burst | |
28245 | ! Mem[0000000010081414] = ff000000, %l4 = 000079ffff790000 | |
28246 | lduha [%i2+0x016]%asi,%l4 ! %l4 = 0000000000000000 | |
28247 | ||
28248 | p0_label_677: | |
28249 | ! Mem[0000000030181408] = 00009400, %l0 = 00000000ff790000 | |
28250 | ldswa [%i6+%o4]0x89,%l0 ! %l0 = 0000000000009400 | |
28251 | ! Mem[000000001010141c] = 00000000, %l2 = 00000000000000ff | |
28252 | ldswa [%i4+0x01c]%asi,%l2 ! %l2 = 0000000000000000 | |
28253 | ! Mem[0000000030141400] = 0000ffff, %f25 = 2164159c | |
28254 | lda [%i5+%g0]0x89,%f25 ! %f25 = 0000ffff | |
28255 | ! Mem[0000000010001410] = ffff0000, %l6 = 00000000ffff0000 | |
28256 | ldsba [%i0+%o5]0x80,%l6 ! %l6 = ffffffffffffffff | |
28257 | ! Mem[000000001000141c] = 000000ff, %l1 = ffffffffff790000 | |
28258 | ldsha [%i0+0x01e]%asi,%l1 ! %l1 = 00000000000000ff | |
28259 | ! Mem[00000000100c1408] = 0000c4ff, %f8 = 21640000 | |
28260 | lda [%i3+0x008]%asi,%f8 ! %f8 = 0000c4ff | |
28261 | ! Mem[0000000010041434] = f31200ff, %l2 = 0000000000000000 | |
28262 | lduwa [%i1+0x034]%asi,%l2 ! %l2 = 00000000f31200ff | |
28263 | ! Mem[0000000010081408] = 00000000, %l5 = 00000000c6000000 | |
28264 | lduba [%i2+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
28265 | ! Mem[0000000030081410] = 0000ffffffff0000, %f14 = ffffffff c6000000 | |
28266 | ldda [%i2+%o5]0x81,%f14 ! %f14 = 0000ffff ffff0000 | |
28267 | ! Starting 10 instruction Store Burst | |
28268 | ! Mem[000000001008140c] = ffffffc7, %l6 = ffffffffffffffff | |
28269 | ldstuba [%i2+0x00c]%asi,%l6 ! %l6 = 000000ff000000ff | |
28270 | ||
28271 | p0_label_678: | |
28272 | ! %l6 = 00000000000000ff, Mem[0000000010041408] = 000000ff | |
28273 | stha %l6,[%i1+%o4]0x88 ! Mem[0000000010041408] = 000000ff | |
28274 | ! %l4 = 0000000000000000, Mem[0000000030141408] = ff000000 | |
28275 | stha %l4,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 | |
28276 | ! %l6 = 00000000000000ff, Mem[0000000010081400] = 000000ff | |
28277 | stba %l6,[%i2+%g0]0x88 ! Mem[0000000010081400] = 000000ff | |
28278 | ! %l4 = 0000000000000000, Mem[0000000010101410] = 00000000 | |
28279 | stwa %l4,[%i4+%o5]0x80 ! Mem[0000000010101410] = 00000000 | |
28280 | ! %l2 = 00000000f31200ff, Mem[0000000030141400] = ffff0000 | |
28281 | stwa %l2,[%i5+%g0]0x81 ! Mem[0000000030141400] = f31200ff | |
28282 | ! %l1 = 00000000000000ff, Mem[0000000030081408] = ff0012f3 | |
28283 | stha %l1,[%i2+%o4]0x81 ! Mem[0000000030081408] = 00ff12f3 | |
28284 | ! Mem[0000000030101400] = 0000ffff, %l0 = 0000000000009400 | |
28285 | swapa [%i4+%g0]0x89,%l0 ! %l0 = 000000000000ffff | |
28286 | ! %f29 = 00009400, Mem[0000000030001408] = ff000000 | |
28287 | sta %f29,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00009400 | |
28288 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000010041418] = 00ff0000 12000000 | |
28289 | stda %l4,[%i1+0x018]%asi ! Mem[0000000010041418] = 00000000 00000000 | |
28290 | ! Starting 10 instruction Load Burst | |
28291 | ! Mem[00000000100c141c] = ffffffff, %l5 = 0000000000000000 | |
28292 | lduw [%i3+0x01c],%l5 ! %l5 = 00000000ffffffff | |
28293 | ||
28294 | p0_label_679: | |
28295 | ! Mem[0000000010141410] = 00000000, %l4 = 0000000000000000 | |
28296 | lduwa [%i5+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
28297 | ! Mem[0000000010141408] = 000079ff 00000000, %l6 = 000000ff, %l7 = ffffff00 | |
28298 | ldda [%i5+%o4]0x88,%l6 ! %l6 = 0000000000000000 00000000000079ff | |
28299 | ! Mem[0000000010181420] = c788340300ff0000, %f8 = 0000c4ff ffffffff | |
28300 | ldda [%i6+0x020]%asi,%f8 ! %f8 = c7883403 00ff0000 | |
28301 | ! Mem[0000000030101400] = 0094000000000000, %l0 = 000000000000ffff | |
28302 | ldxa [%i4+%g0]0x81,%l0 ! %l0 = 0094000000000000 | |
28303 | ! Mem[0000000030041408] = 0094000000000000, %f6 = 00000000 0000ff03 | |
28304 | ldda [%i1+%o4]0x89,%f6 ! %f6 = 00940000 00000000 | |
28305 | ! Mem[0000000010101410] = 00000000, %l1 = 00000000000000ff | |
28306 | lduh [%i4+%o5],%l1 ! %l1 = 0000000000000000 | |
28307 | ! Mem[0000000030041408] = 00000000, %l7 = 00000000000079ff | |
28308 | ldsba [%i1+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
28309 | ! Mem[0000000030181400] = 0300000000000000, %l7 = 0000000000000000 | |
28310 | ldxa [%i6+%g0]0x81,%l7 ! %l7 = 0300000000000000 | |
28311 | ! Mem[0000000030101400] = 00009400, %l6 = 0000000000000000 | |
28312 | ldsha [%i4+%g0]0x89,%l6 ! %l6 = ffffffffffff9400 | |
28313 | ! Starting 10 instruction Store Burst | |
28314 | ! Mem[00000000211c0000] = ffff1a4c, %l7 = 0300000000000000 | |
28315 | ldstub [%o2+%g0],%l7 ! %l7 = 000000ff000000ff | |
28316 | ||
28317 | p0_label_680: | |
28318 | ! Mem[0000000030141400] = f31200ff, %l5 = 00000000ffffffff | |
28319 | swapa [%i5+%g0]0x81,%l5 ! %l5 = 00000000f31200ff | |
28320 | ! %f6 = 00940000 00000000, Mem[00000000100c1408] = ffc40000 00000000 | |
28321 | stda %f6 ,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00940000 00000000 | |
28322 | ! Mem[0000000030181408] = 00940000, %l2 = 00000000f31200ff | |
28323 | swapa [%i6+%o4]0x81,%l2 ! %l2 = 0000000000940000 | |
28324 | ! Mem[0000000010081411] = 00000000, %l1 = 0000000000000000 | |
28325 | ldstub [%i2+0x011],%l1 ! %l1 = 00000000000000ff | |
28326 | ! Mem[0000000010041408] = 000000ff, %l2 = 0000000000940000 | |
28327 | swapa [%i1+%o4]0x88,%l2 ! %l2 = 00000000000000ff | |
28328 | ! %l6 = ffffffffffff9400, Mem[000000001008140c] = ffffffc7, %asi = 80 | |
28329 | stba %l6,[%i2+0x00c]%asi ! Mem[000000001008140c] = 00ffffc7 | |
28330 | ! %f8 = c7883403 00ff0000, Mem[0000000030001410] = 000000ff 00000000 | |
28331 | stda %f8 ,[%i0+%o5]0x89 ! Mem[0000000030001410] = c7883403 00ff0000 | |
28332 | ! %l7 = 00000000000000ff, Mem[0000000010181408] = c6000000, %asi = 80 | |
28333 | stha %l7,[%i6+0x008]%asi ! Mem[0000000010181408] = 00ff0000 | |
28334 | ! Mem[0000000021800080] = ffffa433, %l3 = 00000000000000ff | |
28335 | ldstub [%o3+0x080],%l3 ! %l3 = 000000ff000000ff | |
28336 | ! Starting 10 instruction Load Burst | |
28337 | ! Mem[00000000218000c0] = 00ff8d82, %l1 = 0000000000000000 | |
28338 | ldub [%o3+0x0c0],%l1 ! %l1 = 0000000000000000 | |
28339 | ||
28340 | ! Check Point 136 for processor 0 | |
28341 | ||
28342 | set p0_check_pt_data_136,%g4 | |
28343 | rd %ccr,%g5 ! %g5 = 44 | |
28344 | ldx [%g4+0x08],%g2 | |
28345 | cmp %l0,%g2 ! %l0 = 0094000000000000 | |
28346 | bne %xcc,p0_reg_check_fail0 | |
28347 | mov 0xee0,%g1 | |
28348 | ldx [%g4+0x10],%g2 | |
28349 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
28350 | bne %xcc,p0_reg_check_fail1 | |
28351 | mov 0xee1,%g1 | |
28352 | ldx [%g4+0x18],%g2 | |
28353 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
28354 | bne %xcc,p0_reg_check_fail2 | |
28355 | mov 0xee2,%g1 | |
28356 | ldx [%g4+0x20],%g2 | |
28357 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
28358 | bne %xcc,p0_reg_check_fail3 | |
28359 | mov 0xee3,%g1 | |
28360 | ldx [%g4+0x28],%g2 | |
28361 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
28362 | bne %xcc,p0_reg_check_fail4 | |
28363 | mov 0xee4,%g1 | |
28364 | ldx [%g4+0x30],%g2 | |
28365 | cmp %l5,%g2 ! %l5 = 00000000f31200ff | |
28366 | bne %xcc,p0_reg_check_fail5 | |
28367 | mov 0xee5,%g1 | |
28368 | ldx [%g4+0x38],%g2 | |
28369 | cmp %l6,%g2 ! %l6 = ffffffffffff9400 | |
28370 | bne %xcc,p0_reg_check_fail6 | |
28371 | mov 0xee6,%g1 | |
28372 | ldx [%g4+0x40],%g2 | |
28373 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
28374 | bne %xcc,p0_reg_check_fail7 | |
28375 | mov 0xee7,%g1 | |
28376 | ldx [%g4+0x48],%g3 | |
28377 | std %f6,[%g4] | |
28378 | ldx [%g4],%g2 | |
28379 | cmp %g3,%g2 ! %f6 = 00940000 00000000 | |
28380 | bne %xcc,p0_freg_check_fail | |
28381 | mov 0xf06,%g1 | |
28382 | ldx [%g4+0x50],%g3 | |
28383 | std %f8,[%g4] | |
28384 | ldx [%g4],%g2 | |
28385 | cmp %g3,%g2 ! %f8 = c7883403 00ff0000 | |
28386 | bne %xcc,p0_freg_check_fail | |
28387 | mov 0xf08,%g1 | |
28388 | ldx [%g4+0x58],%g3 | |
28389 | std %f14,[%g4] | |
28390 | ldx [%g4],%g2 | |
28391 | cmp %g3,%g2 ! %f14 = 0000ffff ffff0000 | |
28392 | bne %xcc,p0_freg_check_fail | |
28393 | mov 0xf14,%g1 | |
28394 | ldx [%g4+0x60],%g3 | |
28395 | std %f24,[%g4] | |
28396 | ldx [%g4],%g2 | |
28397 | cmp %g3,%g2 ! %f24 = 1f41ff76 0000ffff | |
28398 | bne %xcc,p0_freg_check_fail | |
28399 | mov 0xf24,%g1 | |
28400 | ||
28401 | ! Check Point 136 completed | |
28402 | ||
28403 | ||
28404 | p0_label_681: | |
28405 | ! Mem[0000000010001400] = 00000000, %l2 = 00000000000000ff | |
28406 | lduba [%i0+0x002]%asi,%l2 ! %l2 = 0000000000000000 | |
28407 | ! Mem[0000000030081400] = 033488c7ffff00ff, %l4 = 0000000000000000 | |
28408 | ldxa [%i2+%g0]0x89,%l4 ! %l4 = 033488c7ffff00ff | |
28409 | ! Mem[0000000030141410] = 000000ff, %l0 = 0094000000000000 | |
28410 | ldsha [%i5+%o5]0x81,%l0 ! %l0 = 0000000000000000 | |
28411 | ! Mem[0000000030041410] = ffff0000 ffffffff, %l6 = ffff9400, %l7 = 000000ff | |
28412 | ldda [%i1+%o5]0x81,%l6 ! %l6 = 00000000ffff0000 00000000ffffffff | |
28413 | ! Mem[0000000010041410] = 000000c600ff0000, %l1 = 0000000000000000 | |
28414 | ldx [%i1+%o5],%l1 ! %l1 = 000000c600ff0000 | |
28415 | ! Mem[00000000218000c0] = 00ff8d82, %l3 = 00000000000000ff | |
28416 | ldsb [%o3+0x0c0],%l3 ! %l3 = 0000000000000000 | |
28417 | ! Mem[000000001000140c] = 00000000, %l3 = 0000000000000000 | |
28418 | lduwa [%i0+0x00c]%asi,%l3 ! %l3 = 0000000000000000 | |
28419 | ! Mem[00000000300c1408] = 000000000000ffff, %l7 = 00000000ffffffff | |
28420 | ldxa [%i3+%o4]0x89,%l7 ! %l7 = 000000000000ffff | |
28421 | ! Mem[0000000010001420] = 0000ff00 00000000, %l0 = 00000000, %l1 = 00ff0000 | |
28422 | ldd [%i0+0x020],%l0 ! %l0 = 000000000000ff00 0000000000000000 | |
28423 | ! Starting 10 instruction Store Burst | |
28424 | ! Mem[00000000100c141c] = ffffffff, %l6 = ffff0000, %l5 = f31200ff | |
28425 | add %i3,0x1c,%g1 | |
28426 | casa [%g1]0x80,%l6,%l5 ! %l5 = 00000000ffffffff | |
28427 | ||
28428 | p0_label_682: | |
28429 | ! Mem[0000000010141410] = 00000000, %l3 = 0000000000000000 | |
28430 | ldstuba [%i5+%o5]0x80,%l3 ! %l3 = 00000000000000ff | |
28431 | ! %l1 = 0000000000000000, Mem[0000000010101410] = 00000000 | |
28432 | stba %l1,[%i4+%o5]0x88 ! Mem[0000000010101410] = 00000000 | |
28433 | ! %l3 = 0000000000000000, Mem[0000000010101434] = 000000ff, %asi = 80 | |
28434 | stha %l3,[%i4+0x034]%asi ! Mem[0000000010101434] = 000000ff | |
28435 | ! %l7 = 000000000000ffff, Mem[0000000030141408] = 00000000 | |
28436 | stha %l7,[%i5+%o4]0x81 ! Mem[0000000030141408] = ffff0000 | |
28437 | ! Mem[0000000030001408] = 00940000, %l3 = 0000000000000000 | |
28438 | swapa [%i0+%o4]0x89,%l3 ! %l3 = 0000000000940000 | |
28439 | ! %l1 = 0000000000000000, Mem[0000000010181410] = ff000000 | |
28440 | stba %l1,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00000000 | |
28441 | ! %l5 = 00000000ffffffff, Mem[0000000030141400] = ffffffff | |
28442 | stba %l5,[%i5+%g0]0x81 ! Mem[0000000030141400] = ffffffff | |
28443 | ! %f22 = fc734517 000000ff, Mem[00000000300c1400] = 000000c6 00000000 | |
28444 | stda %f22,[%i3+%g0]0x89 ! Mem[00000000300c1400] = fc734517 000000ff | |
28445 | ! %f24 = 1f41ff76 0000ffff, Mem[0000000010081408] = 00000000 00ffffc7 | |
28446 | stda %f24,[%i2+%o4]0x80 ! Mem[0000000010081408] = 1f41ff76 0000ffff | |
28447 | ! Starting 10 instruction Load Burst | |
28448 | ! Mem[0000000030181400] = 03000000, %l5 = 00000000ffffffff | |
28449 | ldsba [%i6+%g0]0x81,%l5 ! %l5 = 0000000000000003 | |
28450 | ||
28451 | p0_label_683: | |
28452 | ! Mem[0000000010141420] = 00000000, %l3 = 0000000000940000 | |
28453 | lduwa [%i5+0x020]%asi,%l3 ! %l3 = 0000000000000000 | |
28454 | ! Mem[0000000030081400] = ff00ffff c7883403, %l6 = ffff0000, %l7 = 0000ffff | |
28455 | ldda [%i2+%g0]0x81,%l6 ! %l6 = 00000000ff00ffff 00000000c7883403 | |
28456 | ! Mem[0000000020800000] = ffff8470, %l2 = 0000000000000000 | |
28457 | lduba [%o1+0x000]%asi,%l2 ! %l2 = 00000000000000ff | |
28458 | ! %l1 = 0000000000000000, imm = fffffffffffff024, %l5 = 0000000000000003 | |
28459 | xnor %l1,-0xfdc,%l5 ! %l5 = 0000000000000fdb | |
28460 | ! Mem[0000000030041408] = 00000000, %l4 = 033488c7ffff00ff | |
28461 | lduha [%i1+%o4]0x81,%l4 ! %l4 = 0000000000000000 | |
28462 | ! Mem[0000000030001408] = 00000000, %l1 = 0000000000000000 | |
28463 | ldswa [%i0+%o4]0x89,%l1 ! %l1 = 0000000000000000 | |
28464 | membar #Sync ! Added by membar checker (115) | |
28465 | ! Mem[0000000030141400] = ffffffff 000000ff ffff0000 ffffffff | |
28466 | ! Mem[0000000030141410] = 000000ff ffffffff fc734517 000000ff | |
28467 | ! Mem[0000000030141420] = 1f41ff76 2164159c ffffffff 79ff0000 | |
28468 | ! Mem[0000000030141430] = ff000000 00009400 7827da3e 597bac10 | |
28469 | ldda [%i5]ASI_BLK_S,%f16 ! Block Load from 0000000030141400 | |
28470 | ! Mem[00000000100c1410] = ff0000ff, %l5 = 0000000000000fdb | |
28471 | lduwa [%i3+%o5]0x80,%l5 ! %l5 = 00000000ff0000ff | |
28472 | ! Mem[0000000030101400] = 00009400, %l1 = 0000000000000000 | |
28473 | lduha [%i4+%g0]0x89,%l1 ! %l1 = 0000000000009400 | |
28474 | ! Starting 10 instruction Store Burst | |
28475 | ! %l6 = 00000000ff00ffff, Mem[0000000020800000] = ffff8470, %asi = 80 | |
28476 | stha %l6,[%o1+0x000]%asi ! Mem[0000000020800000] = ffff8470 | |
28477 | ||
28478 | p0_label_684: | |
28479 | ! %l2 = 00000000000000ff, Mem[0000000010081408] = 1f41ff76 | |
28480 | sth %l2,[%i2+%o4] ! Mem[0000000010081408] = 00ffff76 | |
28481 | ! Mem[0000000010001410] = ffff0000, %l1 = 0000000000009400 | |
28482 | swapa [%i0+%o5]0x80,%l1 ! %l1 = 00000000ffff0000 | |
28483 | ! Mem[0000000010001408] = 00000000, %l0 = 000000000000ff00 | |
28484 | swapa [%i0+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
28485 | ! %l3 = 0000000000000000, Mem[0000000010081400] = ff000000 | |
28486 | stha %l3,[%i2+%g0]0x80 ! Mem[0000000010081400] = 00000000 | |
28487 | ! Mem[0000000030181408] = ff0012f3, %l3 = 0000000000000000 | |
28488 | swapa [%i6+%o4]0x89,%l3 ! %l3 = 00000000ff0012f3 | |
28489 | ! Mem[000000001008140c] = 0000ffff, %l1 = 00000000ffff0000 | |
28490 | swap [%i2+0x00c],%l1 ! %l1 = 000000000000ffff | |
28491 | ! Mem[0000000010101424] = 00ff0000, %l1 = 000000000000ffff, %asi = 80 | |
28492 | swapa [%i4+0x024]%asi,%l1 ! %l1 = 0000000000ff0000 | |
28493 | ! Mem[00000000100c1410] = ff0000ff, %l7 = 00000000c7883403 | |
28494 | ldstuba [%i3+%o5]0x88,%l7 ! %l7 = 000000ff000000ff | |
28495 | ! %l0 = 00000000, %l1 = 00ff0000, Mem[0000000010001408] = 0000ff00 00000000 | |
28496 | stda %l0,[%i0+%o4]0x88 ! Mem[0000000010001408] = 00000000 00ff0000 | |
28497 | ! Starting 10 instruction Load Burst | |
28498 | ! Mem[0000000030181410] = 000000ff, %l4 = 0000000000000000 | |
28499 | lduwa [%i6+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
28500 | ||
28501 | p0_label_685: | |
28502 | ! Mem[0000000010181410] = 00000000, %l1 = 0000000000ff0000 | |
28503 | ldsba [%i6+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
28504 | ! Mem[0000000030101410] = ffffffff, %l3 = 00000000ff0012f3 | |
28505 | lduwa [%i4+%o5]0x81,%l3 ! %l3 = 00000000ffffffff | |
28506 | ! Mem[0000000030001400] = 00000000ffffffff, %l4 = 00000000000000ff | |
28507 | ldxa [%i0+%g0]0x89,%l4 ! %l4 = 00000000ffffffff | |
28508 | ! Mem[0000000010181420] = c7883403, %f10 = 03000000 | |
28509 | lda [%i6+0x020]%asi,%f10 ! %f10 = c7883403 | |
28510 | ! Mem[0000000010001408] = 00000000, %l4 = 00000000ffffffff | |
28511 | ldswa [%i0+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
28512 | ! Mem[0000000021800000] = 00ff13a3, %l7 = 00000000000000ff | |
28513 | ldsh [%o3+%g0],%l7 ! %l7 = 00000000000000ff | |
28514 | ! Mem[000000001004140c] = ff000000, %l3 = 00000000ffffffff | |
28515 | ldsb [%i1+0x00d],%l3 ! %l3 = 0000000000000000 | |
28516 | ! Mem[0000000010181410] = 00000000, %l2 = 00000000000000ff | |
28517 | ldswa [%i6+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
28518 | ! Mem[0000000030081400] = 033488c7 ffff00ff, %l0 = 00000000, %l1 = 00000000 | |
28519 | ldda [%i2+%g0]0x89,%l0 ! %l0 = 00000000ffff00ff 00000000033488c7 | |
28520 | ! Starting 10 instruction Store Burst | |
28521 | ! Mem[0000000020800040] = 00ff7379, %l7 = 00000000000000ff | |
28522 | ldstuba [%o1+0x040]%asi,%l7 ! %l7 = 00000000000000ff | |
28523 | ||
28524 | ! Check Point 137 for processor 0 | |
28525 | ||
28526 | set p0_check_pt_data_137,%g4 | |
28527 | rd %ccr,%g5 ! %g5 = 44 | |
28528 | ldx [%g4+0x08],%g2 | |
28529 | cmp %l0,%g2 ! %l0 = 00000000ffff00ff | |
28530 | bne %xcc,p0_reg_check_fail0 | |
28531 | mov 0xee0,%g1 | |
28532 | ldx [%g4+0x10],%g2 | |
28533 | cmp %l1,%g2 ! %l1 = 00000000033488c7 | |
28534 | bne %xcc,p0_reg_check_fail1 | |
28535 | mov 0xee1,%g1 | |
28536 | ldx [%g4+0x18],%g2 | |
28537 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
28538 | bne %xcc,p0_reg_check_fail2 | |
28539 | mov 0xee2,%g1 | |
28540 | ldx [%g4+0x20],%g2 | |
28541 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
28542 | bne %xcc,p0_reg_check_fail3 | |
28543 | mov 0xee3,%g1 | |
28544 | ldx [%g4+0x28],%g2 | |
28545 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
28546 | bne %xcc,p0_reg_check_fail4 | |
28547 | mov 0xee4,%g1 | |
28548 | ldx [%g4+0x30],%g2 | |
28549 | cmp %l5,%g2 ! %l5 = 00000000ff0000ff | |
28550 | bne %xcc,p0_reg_check_fail5 | |
28551 | mov 0xee5,%g1 | |
28552 | ldx [%g4+0x38],%g2 | |
28553 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
28554 | bne %xcc,p0_reg_check_fail7 | |
28555 | mov 0xee7,%g1 | |
28556 | ldx [%g4+0x40],%g3 | |
28557 | std %f0,[%g4] | |
28558 | ldx [%g4],%g2 | |
28559 | cmp %g3,%g2 ! %f0 = ffffffff ffffffff | |
28560 | bne %xcc,p0_freg_check_fail | |
28561 | mov 0xf00,%g1 | |
28562 | ldx [%g4+0x48],%g3 | |
28563 | std %f6,[%g4] | |
28564 | ldx [%g4],%g2 | |
28565 | cmp %g3,%g2 ! %f6 = 00940000 00000000 | |
28566 | bne %xcc,p0_freg_check_fail | |
28567 | mov 0xf06,%g1 | |
28568 | ldx [%g4+0x50],%g3 | |
28569 | std %f10,[%g4] | |
28570 | ldx [%g4],%g2 | |
28571 | cmp %g3,%g2 ! %f10 = c7883403 00000000 | |
28572 | bne %xcc,p0_freg_check_fail | |
28573 | mov 0xf10,%g1 | |
28574 | ldx [%g4+0x58],%g3 | |
28575 | std %f16,[%g4] | |
28576 | ldx [%g4],%g2 | |
28577 | cmp %g3,%g2 ! %f16 = ffffffff 000000ff | |
28578 | bne %xcc,p0_freg_check_fail | |
28579 | mov 0xf16,%g1 | |
28580 | ldx [%g4+0x60],%g3 | |
28581 | std %f18,[%g4] | |
28582 | ldx [%g4],%g2 | |
28583 | cmp %g3,%g2 ! %f18 = ffff0000 ffffffff | |
28584 | bne %xcc,p0_freg_check_fail | |
28585 | mov 0xf18,%g1 | |
28586 | ldx [%g4+0x68],%g3 | |
28587 | std %f20,[%g4] | |
28588 | ldx [%g4],%g2 | |
28589 | cmp %g3,%g2 ! %f20 = 000000ff ffffffff | |
28590 | bne %xcc,p0_freg_check_fail | |
28591 | mov 0xf20,%g1 | |
28592 | ldx [%g4+0x70],%g3 | |
28593 | std %f22,[%g4] | |
28594 | ldx [%g4],%g2 | |
28595 | cmp %g3,%g2 ! %f22 = fc734517 000000ff | |
28596 | bne %xcc,p0_freg_check_fail | |
28597 | mov 0xf22,%g1 | |
28598 | ldx [%g4+0x78],%g3 | |
28599 | std %f24,[%g4] | |
28600 | ldx [%g4],%g2 | |
28601 | cmp %g3,%g2 ! %f24 = 1f41ff76 2164159c | |
28602 | bne %xcc,p0_freg_check_fail | |
28603 | mov 0xf24,%g1 | |
28604 | ldx [%g4+0x80],%g3 | |
28605 | std %f26,[%g4] | |
28606 | ldx [%g4],%g2 | |
28607 | cmp %g3,%g2 ! %f26 = ffffffff 79ff0000 | |
28608 | bne %xcc,p0_freg_check_fail | |
28609 | mov 0xf26,%g1 | |
28610 | ldx [%g4+0x88],%g3 | |
28611 | std %f28,[%g4] | |
28612 | ldx [%g4],%g2 | |
28613 | cmp %g3,%g2 ! %f28 = ff000000 00009400 | |
28614 | bne %xcc,p0_freg_check_fail | |
28615 | mov 0xf28,%g1 | |
28616 | ldx [%g4+0x90],%g3 | |
28617 | std %f30,[%g4] | |
28618 | ldx [%g4],%g2 | |
28619 | cmp %g3,%g2 ! %f30 = 7827da3e 597bac10 | |
28620 | bne %xcc,p0_freg_check_fail | |
28621 | mov 0xf30,%g1 | |
28622 | ||
28623 | ! Check Point 137 completed | |
28624 | ||
28625 | ||
28626 | p0_label_686: | |
28627 | ! Mem[0000000020800041] = ffff7379, %l5 = 00000000ff0000ff | |
28628 | ldstuba [%o1+0x041]%asi,%l5 ! %l5 = 000000ff000000ff | |
28629 | ! %l0 = ffff00ff, %l1 = 033488c7, Mem[0000000030041408] = 00000000 00940000 | |
28630 | stda %l0,[%i1+%o4]0x89 ! Mem[0000000030041408] = ffff00ff 033488c7 | |
28631 | ! %l6 = ff00ffff, %l7 = 00000000, Mem[0000000030101400] = 00940000 00000000 | |
28632 | stda %l6,[%i4+%g0]0x81 ! Mem[0000000030101400] = ff00ffff 00000000 | |
28633 | ! %f26 = ffffffff 79ff0000, %l7 = 0000000000000000 | |
28634 | ! Mem[0000000030001438] = 0000000000000000 | |
28635 | add %i0,0x038,%g1 | |
28636 | stda %f26,[%g1+%l7]ASI_PST8_S ! Mem[0000000030001438] = 0000000000000000 | |
28637 | ! Mem[0000000010141408] = 00000000ff790000, %l2 = 0000000000000000 | |
28638 | ldxa [%i5+%o4]0x80,%l2 ! %l2 = 00000000ff790000 | |
28639 | membar #Sync ! Added by membar checker (116) | |
28640 | ! %f24 = 1f41ff76, Mem[0000000030141400] = ffffffff | |
28641 | sta %f24,[%i5+%g0]0x81 ! Mem[0000000030141400] = 1f41ff76 | |
28642 | ! Mem[00000000100c1410] = ff0000ff, %l7 = 0000000000000000 | |
28643 | swapa [%i3+%o5]0x80,%l7 ! %l7 = 00000000ff0000ff | |
28644 | ! %l1 = 00000000033488c7, Mem[0000000030001408] = 00000000 | |
28645 | stha %l1,[%i0+%o4]0x89 ! Mem[0000000030001408] = 000088c7 | |
28646 | ! %f4 = c7ffffff 00000000, %l4 = 0000000000000000 | |
28647 | ! Mem[0000000010101418] = 2164000000000000 | |
28648 | add %i4,0x018,%g1 | |
28649 | stda %f4,[%g1+%l4]ASI_PST8_PL ! Mem[0000000010101418] = 2164000000000000 | |
28650 | ! Starting 10 instruction Load Burst | |
28651 | ! Mem[00000000300c1410] = 03ff0000, %l2 = 00000000ff790000 | |
28652 | ldsba [%i3+%o5]0x81,%l2 ! %l2 = 0000000000000003 | |
28653 | ||
28654 | p0_label_687: | |
28655 | ! Mem[00000000100c1424] = c7ecffbb, %l7 = 00000000ff0000ff | |
28656 | lduba [%i3+0x025]%asi,%l7 ! %l7 = 00000000000000ec | |
28657 | ! Mem[0000000030041400] = ff00ffff000000ff, %f30 = 7827da3e 597bac10 | |
28658 | ldda [%i1+%g0]0x89,%f30 ! %f30 = ff00ffff 000000ff | |
28659 | ! Mem[0000000030081408] = 00ff12f3, %l2 = 0000000000000003 | |
28660 | lduwa [%i2+%o4]0x81,%l2 ! %l2 = 0000000000ff12f3 | |
28661 | ! Mem[0000000010041428] = 0000000000000000, %f12 = ff000000 ff000000 | |
28662 | ldd [%i1+0x028],%f12 ! %f12 = 00000000 00000000 | |
28663 | ! Mem[00000000100c1408] = 00000000 00009400, %l0 = ffff00ff, %l1 = 033488c7 | |
28664 | ldda [%i3+%o4]0x80,%l0 ! %l0 = 0000000000000000 0000000000009400 | |
28665 | ! Mem[0000000030101400] = ffff00ff, %l2 = 0000000000ff12f3 | |
28666 | lduba [%i4+%g0]0x89,%l2 ! %l2 = 00000000000000ff | |
28667 | ! Mem[00000000100c1408] = 00000000, %l2 = 00000000000000ff | |
28668 | ldsba [%i3+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
28669 | ! Mem[0000000010101410] = 00000000, %l1 = 0000000000009400 | |
28670 | lduba [%i4+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
28671 | ! Mem[0000000010101410] = 0000000000000000, %l7 = 00000000000000ec | |
28672 | ldxa [%i4+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
28673 | ! Starting 10 instruction Store Burst | |
28674 | ! %l3 = 0000000000000000, Mem[0000000030141408] = ffff0000 | |
28675 | stba %l3,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00ff0000 | |
28676 | ||
28677 | p0_label_688: | |
28678 | ! %l7 = 0000000000000000, Mem[0000000010041408] = 00009400, %asi = 80 | |
28679 | stwa %l7,[%i1+0x008]%asi ! Mem[0000000010041408] = 00000000 | |
28680 | ! %f30 = ff00ffff 000000ff, Mem[0000000010141400] = ffff0000 ff790000 | |
28681 | stda %f30,[%i5+%g0]0x80 ! Mem[0000000010141400] = ff00ffff 000000ff | |
28682 | ! Mem[000000001008143c] = f31200ff, %l0 = 0000000000000000, %asi = 80 | |
28683 | swapa [%i2+0x03c]%asi,%l0 ! %l0 = 00000000f31200ff | |
28684 | ! Mem[00000000300c1408] = 0000ffff, %l2 = 0000000000000000 | |
28685 | lduwa [%i3+%o4]0x89,%l2 ! %l2 = 000000000000ffff | |
28686 | ! %f14 = 0000ffff ffff0000, Mem[0000000010041400] = 000000ff 000000ff | |
28687 | stda %f14,[%i1+%g0]0x88 ! Mem[0000000010041400] = 0000ffff ffff0000 | |
28688 | ! %l2 = 000000000000ffff, Mem[000000001008142e] = 1f000076, %asi = 80 | |
28689 | stba %l2,[%i2+0x02e]%asi ! Mem[000000001008142c] = 1f00ff76 | |
28690 | ! %l5 = 00000000000000ff, Mem[0000000030141408] = 00ff0000 | |
28691 | stha %l5,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00ff0000 | |
28692 | ! %f22 = fc734517 000000ff, %l0 = 00000000f31200ff | |
28693 | ! Mem[0000000010081438] = 0094000000000000 | |
28694 | add %i2,0x038,%g1 | |
28695 | stda %f22,[%g1+%l0]ASI_PST32_PL ! Mem[0000000010081438] = ff000000174573fc | |
28696 | ! %f22 = fc734517 000000ff, Mem[0000000010181400] = ff000000 0000ffff | |
28697 | stda %f22,[%i6+%g0]0x80 ! Mem[0000000010181400] = fc734517 000000ff | |
28698 | ! Starting 10 instruction Load Burst | |
28699 | ! Mem[0000000010001408] = 00ff000000000000, %l3 = 0000000000000000 | |
28700 | ldxa [%i0+%o4]0x88,%l3 ! %l3 = 00ff000000000000 | |
28701 | ||
28702 | p0_label_689: | |
28703 | ! Mem[00000000300c1400] = 000000ff, %f4 = c7ffffff | |
28704 | lda [%i3+%g0]0x89,%f4 ! %f4 = 000000ff | |
28705 | ! Mem[0000000010001408] = 000000000000ff00, %l2 = 000000000000ffff | |
28706 | ldxa [%i0+%o4]0x80,%l2 ! %l2 = 000000000000ff00 | |
28707 | ! Mem[0000000010001410] = 00009400, %l0 = 00000000f31200ff | |
28708 | lduba [%i0+%o5]0x80,%l0 ! %l0 = 0000000000000000 | |
28709 | ! Mem[00000000201c0000] = ffff9457, %l6 = 00000000ff00ffff | |
28710 | lduha [%o0+0x000]%asi,%l6 ! %l6 = 000000000000ffff | |
28711 | ! Mem[0000000010041418] = 0000000000000000, %f24 = 1f41ff76 2164159c | |
28712 | ldda [%i1+0x018]%asi,%f24 ! %f24 = 00000000 00000000 | |
28713 | ! Mem[00000000100c1424] = c7ecffbb, %l5 = 00000000000000ff | |
28714 | ldsha [%i3+0x024]%asi,%l5 ! %l5 = ffffffffffffc7ec | |
28715 | ! Mem[0000000010101408] = 0300000000000000, %f18 = ffff0000 ffffffff | |
28716 | ldda [%i4+%o4]0x80,%f18 ! %f18 = 03000000 00000000 | |
28717 | ! Mem[0000000030101410] = ffffffffffffffff, %f30 = ff00ffff 000000ff | |
28718 | ldda [%i4+%o5]0x89,%f30 ! %f30 = ffffffff ffffffff | |
28719 | ! Mem[0000000010001410] = 0000000000940000, %f14 = 0000ffff ffff0000 | |
28720 | ldda [%i0+%o5]0x88,%f14 ! %f14 = 00000000 00940000 | |
28721 | ! Starting 10 instruction Store Burst | |
28722 | ! %l5 = ffffffffffffc7ec, Mem[00000000100c1410] = 00000000 | |
28723 | stwa %l5,[%i3+%o5]0x80 ! Mem[00000000100c1410] = ffffc7ec | |
28724 | ||
28725 | p0_label_690: | |
28726 | ! Mem[00000000211c0001] = ffff1a4c, %l6 = 000000000000ffff | |
28727 | ldstub [%o2+0x001],%l6 ! %l6 = 000000ff000000ff | |
28728 | ! %l4 = 00000000, %l5 = ffffc7ec, Mem[0000000010081418] = 9c156421 76ff411f | |
28729 | stda %l4,[%i2+0x018]%asi ! Mem[0000000010081418] = 00000000 ffffc7ec | |
28730 | ! Mem[000000001004143c] = c7883403, %l2 = 000000000000ff00, %asi = 80 | |
28731 | swapa [%i1+0x03c]%asi,%l2 ! %l2 = 00000000c7883403 | |
28732 | ! Mem[0000000010141410] = 000000ff, %l0 = 0000000000000000 | |
28733 | ldstuba [%i5+%o5]0x88,%l0 ! %l0 = 000000ff000000ff | |
28734 | ! %f10 = c7883403 00000000, Mem[00000000300c1408] = 0000ffff 00000000 | |
28735 | stda %f10,[%i3+%o4]0x89 ! Mem[00000000300c1408] = c7883403 00000000 | |
28736 | ! %l0 = 00000000000000ff, Mem[0000000010141408] = 00000000 | |
28737 | stha %l0,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00ff0000 | |
28738 | ! %l7 = 0000000000000000, Mem[0000000030141410] = 000000ff | |
28739 | stwa %l7,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 | |
28740 | ! Mem[0000000010181438] = 411f0000, %l5 = ffffc7ec, %l4 = 00000000 | |
28741 | add %i6,0x38,%g1 | |
28742 | casa [%g1]0x80,%l5,%l4 ! %l4 = 00000000411f0000 | |
28743 | ! %l0 = 00000000000000ff, Mem[0000000010081400] = 00000000 | |
28744 | stwa %l0,[%i2+%g0]0x88 ! Mem[0000000010081400] = 000000ff | |
28745 | ! Starting 10 instruction Load Burst | |
28746 | ! Mem[0000000030141410] = 00000000ffffffff, %f22 = fc734517 000000ff | |
28747 | ldda [%i5+%o5]0x81,%f22 ! %f22 = 00000000 ffffffff | |
28748 | ||
28749 | ! Check Point 138 for processor 0 | |
28750 | ||
28751 | set p0_check_pt_data_138,%g4 | |
28752 | rd %ccr,%g5 ! %g5 = 44 | |
28753 | ldx [%g4+0x08],%g2 | |
28754 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
28755 | bne %xcc,p0_reg_check_fail0 | |
28756 | mov 0xee0,%g1 | |
28757 | ldx [%g4+0x10],%g2 | |
28758 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
28759 | bne %xcc,p0_reg_check_fail1 | |
28760 | mov 0xee1,%g1 | |
28761 | ldx [%g4+0x18],%g2 | |
28762 | cmp %l2,%g2 ! %l2 = 00000000c7883403 | |
28763 | bne %xcc,p0_reg_check_fail2 | |
28764 | mov 0xee2,%g1 | |
28765 | ldx [%g4+0x20],%g2 | |
28766 | cmp %l3,%g2 ! %l3 = 00ff000000000000 | |
28767 | bne %xcc,p0_reg_check_fail3 | |
28768 | mov 0xee3,%g1 | |
28769 | ldx [%g4+0x28],%g2 | |
28770 | cmp %l5,%g2 ! %l5 = ffffffffffffc7ec | |
28771 | bne %xcc,p0_reg_check_fail5 | |
28772 | mov 0xee5,%g1 | |
28773 | ldx [%g4+0x30],%g2 | |
28774 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
28775 | bne %xcc,p0_reg_check_fail6 | |
28776 | mov 0xee6,%g1 | |
28777 | ldx [%g4+0x38],%g2 | |
28778 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
28779 | bne %xcc,p0_reg_check_fail7 | |
28780 | mov 0xee7,%g1 | |
28781 | ldx [%g4+0x40],%g3 | |
28782 | std %f0,[%g4] | |
28783 | ldx [%g4],%g2 | |
28784 | cmp %g3,%g2 ! %f0 = ffffffff ffffffff | |
28785 | bne %xcc,p0_freg_check_fail | |
28786 | mov 0xf00,%g1 | |
28787 | ldx [%g4+0x48],%g3 | |
28788 | std %f4,[%g4] | |
28789 | ldx [%g4],%g2 | |
28790 | cmp %g3,%g2 ! %f4 = 000000ff 00000000 | |
28791 | bne %xcc,p0_freg_check_fail | |
28792 | mov 0xf04,%g1 | |
28793 | ldx [%g4+0x50],%g3 | |
28794 | std %f12,[%g4] | |
28795 | ldx [%g4],%g2 | |
28796 | cmp %g3,%g2 ! %f12 = 00000000 00000000 | |
28797 | bne %xcc,p0_freg_check_fail | |
28798 | mov 0xf12,%g1 | |
28799 | ldx [%g4+0x58],%g3 | |
28800 | std %f14,[%g4] | |
28801 | ldx [%g4],%g2 | |
28802 | cmp %g3,%g2 ! %f14 = 00000000 00940000 | |
28803 | bne %xcc,p0_freg_check_fail | |
28804 | mov 0xf14,%g1 | |
28805 | ldx [%g4+0x60],%g3 | |
28806 | std %f18,[%g4] | |
28807 | ldx [%g4],%g2 | |
28808 | cmp %g3,%g2 ! %f18 = 03000000 00000000 | |
28809 | bne %xcc,p0_freg_check_fail | |
28810 | mov 0xf18,%g1 | |
28811 | ldx [%g4+0x68],%g3 | |
28812 | std %f22,[%g4] | |
28813 | ldx [%g4],%g2 | |
28814 | cmp %g3,%g2 ! %f22 = 00000000 ffffffff | |
28815 | bne %xcc,p0_freg_check_fail | |
28816 | mov 0xf22,%g1 | |
28817 | ldx [%g4+0x70],%g3 | |
28818 | std %f24,[%g4] | |
28819 | ldx [%g4],%g2 | |
28820 | cmp %g3,%g2 ! %f24 = 00000000 00000000 | |
28821 | bne %xcc,p0_freg_check_fail | |
28822 | mov 0xf24,%g1 | |
28823 | ldx [%g4+0x78],%g3 | |
28824 | std %f30,[%g4] | |
28825 | ldx [%g4],%g2 | |
28826 | cmp %g3,%g2 ! %f30 = ffffffff ffffffff | |
28827 | bne %xcc,p0_freg_check_fail | |
28828 | mov 0xf30,%g1 | |
28829 | ||
28830 | ! Check Point 138 completed | |
28831 | ||
28832 | ||
28833 | p0_label_691: | |
28834 | ! Mem[0000000030101408] = 00000000 03000000, %l0 = 000000ff, %l1 = 00000000 | |
28835 | ldda [%i4+%o4]0x81,%l0 ! %l0 = 0000000000000000 0000000003000000 | |
28836 | ! Mem[0000000010101410] = 00000000, %l7 = 0000000000000000 | |
28837 | lduba [%i4+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
28838 | ! Mem[0000000010181410] = 00000000, %l5 = ffffffffffffc7ec | |
28839 | ldsba [%i6+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
28840 | ! Mem[0000000030001410] = 00ff0000, %l1 = 0000000003000000 | |
28841 | lduwa [%i0+%o5]0x89,%l1 ! %l1 = 0000000000ff0000 | |
28842 | ! Mem[0000000030041408] = ff00ffff, %f3 = 000079ff | |
28843 | lda [%i1+%o4]0x81,%f3 ! %f3 = ff00ffff | |
28844 | ! Mem[0000000030101410] = ffffffffffffffff, %f16 = ffffffff 000000ff | |
28845 | ldda [%i4+%o5]0x89,%f16 ! %f16 = ffffffff ffffffff | |
28846 | ! Mem[0000000030041408] = 033488c7 ffff00ff, %l6 = 000000ff, %l7 = 00000000 | |
28847 | ldda [%i1+%o4]0x89,%l6 ! %l6 = 00000000ffff00ff 00000000033488c7 | |
28848 | ! Mem[0000000030181410] = ff000000, %l3 = 00ff000000000000 | |
28849 | ldsba [%i6+%o5]0x81,%l3 ! %l3 = ffffffffffffffff | |
28850 | ! Mem[0000000030081408] = 00ff12f3, %l2 = 00000000c7883403 | |
28851 | ldsba [%i2+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
28852 | ! Starting 10 instruction Store Burst | |
28853 | ! Mem[0000000010041408] = 00000000, %l0 = 0000000000000000 | |
28854 | swapa [%i1+%o4]0x88,%l0 ! %l0 = 0000000000000000 | |
28855 | ||
28856 | p0_label_692: | |
28857 | ! %f30 = ffffffff ffffffff, %l3 = ffffffffffffffff | |
28858 | ! Mem[0000000010141438] = 7600001f000000ff | |
28859 | add %i5,0x038,%g1 | |
28860 | stda %f30,[%g1+%l3]ASI_PST16_PL ! Mem[0000000010141438] = ffffffffffffffff | |
28861 | ! %l7 = 00000000033488c7, Mem[00000000100c1410] = ffffc7ec | |
28862 | stwa %l7,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 033488c7 | |
28863 | ! %f3 = ff00ffff, Mem[0000000010081408] = 00ffff76 | |
28864 | sta %f3 ,[%i2+%o4]0x80 ! Mem[0000000010081408] = ff00ffff | |
28865 | ! Mem[0000000030081408] = 00ff12f3, %l1 = 0000000000ff0000 | |
28866 | swapa [%i2+%o4]0x81,%l1 ! %l1 = 0000000000ff12f3 | |
28867 | ! Mem[0000000030181408] = 00000000, %l7 = 00000000033488c7 | |
28868 | ldstuba [%i6+%o4]0x81,%l7 ! %l7 = 00000000000000ff | |
28869 | ! Mem[00000000100c142a] = f31200ff, %l2 = 0000000000000000 | |
28870 | ldstuba [%i3+0x02a]%asi,%l2 ! %l2 = 00000000000000ff | |
28871 | ! %l3 = ffffffffffffffff, Mem[0000000010081400] = ff000000ff000000 | |
28872 | stx %l3,[%i2+%g0] ! Mem[0000000010081400] = ffffffffffffffff | |
28873 | ! %l6 = 00000000ffff00ff, Mem[0000000030041400] = ff000000 | |
28874 | stwa %l6,[%i1+%g0]0x81 ! Mem[0000000030041400] = ffff00ff | |
28875 | ! Mem[00000000100c1400] = 000079ff, %l6 = 00000000ffff00ff | |
28876 | ldstuba [%i3+%g0]0x88,%l6 ! %l6 = 000000ff000000ff | |
28877 | ! Starting 10 instruction Load Burst | |
28878 | ! Mem[0000000010041408] = 00000000, %f19 = 00000000 | |
28879 | lda [%i1+%o4]0x88,%f19 ! %f19 = 00000000 | |
28880 | ||
28881 | p0_label_693: | |
28882 | ! Mem[0000000030101410] = ffffffff, %l5 = 0000000000000000 | |
28883 | ldswa [%i4+%o5]0x89,%l5 ! %l5 = ffffffffffffffff | |
28884 | ! Mem[0000000010101410] = 00000000, %l4 = 00000000411f0000 | |
28885 | ldsha [%i4+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
28886 | ! Mem[0000000010101410] = 00000000, %l1 = 0000000000ff12f3 | |
28887 | lduha [%i4+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
28888 | ! Mem[00000000100c1410] = c7883403, %l6 = 00000000000000ff | |
28889 | lduba [%i3+%o5]0x88,%l6 ! %l6 = 0000000000000003 | |
28890 | ! Mem[0000000010041410] = 000000c6, %l6 = 0000000000000003 | |
28891 | ldsha [%i1+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
28892 | ! Mem[0000000030041410] = 0000ffff, %l7 = 0000000000000000 | |
28893 | ldsba [%i1+%o5]0x89,%l7 ! %l7 = ffffffffffffffff | |
28894 | ! Mem[0000000010181410] = 00000000, %l4 = 0000000000000000 | |
28895 | ldsba [%i6+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
28896 | ! Mem[0000000030001400] = 00000000ffffffff, %f14 = 00000000 00940000 | |
28897 | ldda [%i0+%g0]0x89,%f14 ! %f14 = 00000000 ffffffff | |
28898 | ! Mem[00000000100c1408] = 00940000 00000000, %l4 = 00000000, %l5 = ffffffff | |
28899 | ldda [%i3+%o4]0x88,%l4 ! %l4 = 0000000000000000 0000000000940000 | |
28900 | ! Starting 10 instruction Store Burst | |
28901 | ! Mem[0000000030081410] = 0000ffff, %l3 = ffffffffffffffff | |
28902 | lduba [%i2+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
28903 | ||
28904 | p0_label_694: | |
28905 | ! %f7 = 00000000, Mem[0000000010081408] = ffff00ff | |
28906 | sta %f7 ,[%i2+%o4]0x88 ! Mem[0000000010081408] = 00000000 | |
28907 | ! %l0 = 00000000, %l1 = 00000000, Mem[0000000030141408] = 00ff0000 ffffffff | |
28908 | stda %l0,[%i5+%o4]0x81 ! Mem[0000000030141408] = 00000000 00000000 | |
28909 | ! %f24 = 00000000 00000000, Mem[0000000010141408] = 00ff0000 ff790000 | |
28910 | stda %f24,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000 00000000 | |
28911 | ! %l2 = 0000000000000000, Mem[0000000010041400] = 0000ffffffff0000 | |
28912 | stxa %l2,[%i1+%g0]0x88 ! Mem[0000000010041400] = 0000000000000000 | |
28913 | ! %l0 = 0000000000000000, Mem[0000000030001400] = ffffffff | |
28914 | stba %l0,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00ffffff | |
28915 | ! %f9 = 00ff0000, Mem[0000000010141410] = ff000000 | |
28916 | sta %f9 ,[%i5+%o5]0x80 ! Mem[0000000010141410] = 00ff0000 | |
28917 | ! %f16 = ffffffff ffffffff, Mem[0000000010041410] = c6000000 0000ff00 | |
28918 | stda %f16,[%i1+%o5]0x88 ! Mem[0000000010041410] = ffffffff ffffffff | |
28919 | ! %l2 = 0000000000000000, Mem[0000000010041400] = 00000000 | |
28920 | sth %l2,[%i1+%g0] ! Mem[0000000010041400] = 00000000 | |
28921 | ! %l6 = 0000000000000000, Mem[0000000010001414] = 00000000 | |
28922 | stb %l6,[%i0+0x014] ! Mem[0000000010001414] = 00000000 | |
28923 | ! Starting 10 instruction Load Burst | |
28924 | ! Mem[0000000010181400] = fc734517, %l0 = 0000000000000000 | |
28925 | ldsba [%i6+%g0]0x80,%l0 ! %l0 = fffffffffffffffc | |
28926 | ||
28927 | p0_label_695: | |
28928 | ! Mem[0000000010181414] = 00009400, %l3 = 0000000000000000 | |
28929 | ldub [%i6+0x014],%l3 ! %l3 = 0000000000000000 | |
28930 | ! Mem[0000000010141420] = 0000000000ff0000, %l1 = 0000000000000000 | |
28931 | ldx [%i5+0x020],%l1 ! %l1 = 0000000000ff0000 | |
28932 | ! Mem[0000000010141408] = 00000000, %l2 = 0000000000000000 | |
28933 | ldsba [%i5+%o4]0x88,%l2 ! %l2 = 0000000000000000 | |
28934 | ! Mem[0000000030081410] = 0000ffffffff0000, %f22 = 00000000 ffffffff | |
28935 | ldda [%i2+%o5]0x89,%f22 ! %f22 = 0000ffff ffff0000 | |
28936 | ! Mem[0000000030141410] = 00000000, %l1 = 0000000000ff0000 | |
28937 | ldsba [%i5+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
28938 | ! Mem[0000000010001410] = 00940000, %l3 = 0000000000000000 | |
28939 | lduba [%i0+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
28940 | ! Mem[0000000020800040] = ffff7379, %l2 = 0000000000000000 | |
28941 | ldsh [%o1+0x040],%l2 ! %l2 = ffffffffffffffff | |
28942 | ! Mem[0000000010181400] = fc734517000000ff, %l5 = 0000000000940000 | |
28943 | ldxa [%i6+%g0]0x80,%l5 ! %l5 = fc734517000000ff | |
28944 | ! Mem[0000000030081400] = ffff00ff, %l0 = fffffffffffffffc | |
28945 | ldswa [%i2+%g0]0x89,%l0 ! %l0 = ffffffffffff00ff | |
28946 | ! Starting 10 instruction Store Burst | |
28947 | ! %f20 = 000000ff ffffffff, %l1 = 0000000000000000 | |
28948 | ! Mem[0000000030081408] = 00ff000000009400 | |
28949 | add %i2,0x008,%g1 | |
28950 | stda %f20,[%g1+%l1]ASI_PST16_S ! Mem[0000000030081408] = 00ff000000009400 | |
28951 | ||
28952 | ! Check Point 139 for processor 0 | |
28953 | ||
28954 | set p0_check_pt_data_139,%g4 | |
28955 | rd %ccr,%g5 ! %g5 = 44 | |
28956 | ldx [%g4+0x08],%g2 | |
28957 | cmp %l0,%g2 ! %l0 = ffffffffffff00ff | |
28958 | bne %xcc,p0_reg_check_fail0 | |
28959 | mov 0xee0,%g1 | |
28960 | ldx [%g4+0x10],%g2 | |
28961 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
28962 | bne %xcc,p0_reg_check_fail1 | |
28963 | mov 0xee1,%g1 | |
28964 | ldx [%g4+0x18],%g2 | |
28965 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
28966 | bne %xcc,p0_reg_check_fail2 | |
28967 | mov 0xee2,%g1 | |
28968 | ldx [%g4+0x20],%g2 | |
28969 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
28970 | bne %xcc,p0_reg_check_fail3 | |
28971 | mov 0xee3,%g1 | |
28972 | ldx [%g4+0x28],%g2 | |
28973 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
28974 | bne %xcc,p0_reg_check_fail4 | |
28975 | mov 0xee4,%g1 | |
28976 | ldx [%g4+0x30],%g2 | |
28977 | cmp %l5,%g2 ! %l5 = fc734517000000ff | |
28978 | bne %xcc,p0_reg_check_fail5 | |
28979 | mov 0xee5,%g1 | |
28980 | ldx [%g4+0x38],%g2 | |
28981 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
28982 | bne %xcc,p0_reg_check_fail6 | |
28983 | mov 0xee6,%g1 | |
28984 | ldx [%g4+0x40],%g2 | |
28985 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
28986 | bne %xcc,p0_reg_check_fail7 | |
28987 | mov 0xee7,%g1 | |
28988 | ldx [%g4+0x48],%g3 | |
28989 | std %f0,[%g4] | |
28990 | ldx [%g4],%g2 | |
28991 | cmp %g3,%g2 ! %f0 = ffffffff ffffffff | |
28992 | bne %xcc,p0_freg_check_fail | |
28993 | mov 0xf00,%g1 | |
28994 | ldx [%g4+0x50],%g3 | |
28995 | std %f2,[%g4] | |
28996 | ldx [%g4],%g2 | |
28997 | cmp %g3,%g2 ! %f2 = 00000000 ff00ffff | |
28998 | bne %xcc,p0_freg_check_fail | |
28999 | mov 0xf02,%g1 | |
29000 | ldx [%g4+0x58],%g3 | |
29001 | std %f4,[%g4] | |
29002 | ldx [%g4],%g2 | |
29003 | cmp %g3,%g2 ! %f4 = 000000ff 00000000 | |
29004 | bne %xcc,p0_freg_check_fail | |
29005 | mov 0xf04,%g1 | |
29006 | ldx [%g4+0x60],%g3 | |
29007 | std %f6,[%g4] | |
29008 | ldx [%g4],%g2 | |
29009 | cmp %g3,%g2 ! %f6 = 00940000 00000000 | |
29010 | bne %xcc,p0_freg_check_fail | |
29011 | mov 0xf06,%g1 | |
29012 | ldx [%g4+0x68],%g3 | |
29013 | std %f14,[%g4] | |
29014 | ldx [%g4],%g2 | |
29015 | cmp %g3,%g2 ! %f14 = 00000000 ffffffff | |
29016 | bne %xcc,p0_freg_check_fail | |
29017 | mov 0xf14,%g1 | |
29018 | ldx [%g4+0x70],%g3 | |
29019 | std %f16,[%g4] | |
29020 | ldx [%g4],%g2 | |
29021 | cmp %g3,%g2 ! %f16 = ffffffff ffffffff | |
29022 | bne %xcc,p0_freg_check_fail | |
29023 | mov 0xf16,%g1 | |
29024 | ldx [%g4+0x78],%g3 | |
29025 | std %f18,[%g4] | |
29026 | ldx [%g4],%g2 | |
29027 | cmp %g3,%g2 ! %f18 = 03000000 00000000 | |
29028 | bne %xcc,p0_freg_check_fail | |
29029 | mov 0xf18,%g1 | |
29030 | ldx [%g4+0x80],%g3 | |
29031 | std %f22,[%g4] | |
29032 | ldx [%g4],%g2 | |
29033 | cmp %g3,%g2 ! %f22 = 0000ffff ffff0000 | |
29034 | bne %xcc,p0_freg_check_fail | |
29035 | mov 0xf22,%g1 | |
29036 | ||
29037 | ! Check Point 139 completed | |
29038 | ||
29039 | ||
29040 | p0_label_696: | |
29041 | ! %l4 = 0000000000000000, Mem[0000000010001418] = 0000ffff | |
29042 | stw %l4,[%i0+0x018] ! Mem[0000000010001418] = 00000000 | |
29043 | ! Mem[0000000010041408] = 00000000, %l6 = 0000000000000000 | |
29044 | ldstuba [%i1+%o4]0x88,%l6 ! %l6 = 00000000000000ff | |
29045 | ! %f12 = 00000000 00000000, Mem[0000000030181410] = ff000000 ff000000 | |
29046 | stda %f12,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 00000000 | |
29047 | ! %l7 = ffffffffffffffff, Mem[00000000201c0000] = ffff9457 | |
29048 | sth %l7,[%o0+%g0] ! Mem[00000000201c0000] = ffff9457 | |
29049 | ! %f20 = 000000ff ffffffff, Mem[0000000010141410] = 00ff0000 0000ff00 | |
29050 | stda %f20,[%i5+0x010]%asi ! Mem[0000000010141410] = 000000ff ffffffff | |
29051 | ! %l2 = ffffffffffffffff, Mem[0000000010101400] = ffffffff | |
29052 | stba %l2,[%i4+%g0]0x80 ! Mem[0000000010101400] = ffffffff | |
29053 | ! Mem[0000000010141408] = 00000000, %l0 = ffffffffffff00ff | |
29054 | ldstuba [%i5+%o4]0x80,%l0 ! %l0 = 00000000000000ff | |
29055 | ! %l4 = 0000000000000000, Mem[0000000010141400] = ff00ffff | |
29056 | stha %l4,[%i5+%g0]0x80 ! Mem[0000000010141400] = 0000ffff | |
29057 | ! Mem[0000000010141408] = 000000ff, %l1 = 0000000000000000 | |
29058 | ldstuba [%i5+%o4]0x88,%l1 ! %l1 = 000000ff000000ff | |
29059 | ! Starting 10 instruction Load Burst | |
29060 | ! Mem[00000000300c1408] = 00000000, %l5 = fc734517000000ff | |
29061 | ldswa [%i3+%o4]0x81,%l5 ! %l5 = 0000000000000000 | |
29062 | ||
29063 | p0_label_697: | |
29064 | ! Mem[0000000010041408] = 000000ff 000000ff, %l2 = ffffffff, %l3 = 00000000 | |
29065 | ldda [%i1+%o4]0x88,%l2 ! %l2 = 00000000000000ff 00000000000000ff | |
29066 | ! Mem[0000000010101418] = 21640000, %f21 = ffffffff | |
29067 | ld [%i4+0x018],%f21 ! %f21 = 21640000 | |
29068 | ! Mem[0000000010081408] = 00000000, %l4 = 0000000000000000 | |
29069 | ldswa [%i2+%o4]0x88,%l4 ! %l4 = 0000000000000000 | |
29070 | ! Mem[00000000100c1414] = 0000ff00, %l2 = 00000000000000ff | |
29071 | lduba [%i3+0x014]%asi,%l2 ! %l2 = 0000000000000000 | |
29072 | membar #Sync ! Added by membar checker (117) | |
29073 | ! Mem[0000000010001400] = 00000000 ff790000 00000000 0000ff00 | |
29074 | ! Mem[0000000010001410] = 00009400 00000000 00000000 000000ff | |
29075 | ! Mem[0000000010001420] = 0000ff00 00000000 00000000 00000000 | |
29076 | ! Mem[0000000010001430] = 000000c6 ffff0000 ff000000 1f000076 | |
29077 | ldda [%i0]ASI_BLK_AIUP,%f0 ! Block Load from 0000000010001400 | |
29078 | ! Mem[0000000010181400] = 174573fc, %l1 = 00000000000000ff | |
29079 | ldsha [%i6+%g0]0x88,%l1 ! %l1 = 00000000000073fc | |
29080 | ! Mem[0000000010101410] = 00000000, %l3 = 00000000000000ff | |
29081 | lduba [%i4+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
29082 | ! Mem[0000000010141400] = ffff0000, %l3 = 0000000000000000 | |
29083 | ldsba [%i5+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
29084 | ! Mem[0000000030181400] = 03000000 00000000 ff000000 f31200ff | |
29085 | ! Mem[0000000030181410] = 00000000 00000000 000000ff 00000000 | |
29086 | ! Mem[0000000030181420] = 0000ff00 033488c7 03000000 00000000 | |
29087 | ! Mem[0000000030181430] = c7883403 0000ff00 00001f41 00000000 | |
29088 | ldda [%i6]ASI_BLK_SL,%f0 ! Block Load from 0000000030181400 | |
29089 | ! Starting 10 instruction Store Burst | |
29090 | ! %f16 = ffffffff ffffffff 03000000 00000000 | |
29091 | ! %f20 = 000000ff 21640000 0000ffff ffff0000 | |
29092 | ! %f24 = 00000000 00000000 ffffffff 79ff0000 | |
29093 | ! %f28 = ff000000 00009400 ffffffff ffffffff | |
29094 | stda %f16,[%i3]ASI_BLK_SL ! Block Store to 00000000300c1400 | |
29095 | ||
29096 | p0_label_698: | |
29097 | ! Mem[0000000030141400] = 76ff411f, %l3 = 0000000000000000 | |
29098 | ldstuba [%i5+%g0]0x89,%l3 ! %l3 = 0000001f000000ff | |
29099 | ! %f1 = 00000003, Mem[0000000010181400] = 174573fc | |
29100 | sta %f1 ,[%i6+%g0]0x88 ! Mem[0000000010181400] = 00000003 | |
29101 | ! %l4 = 0000000000000000, Mem[0000000030101410] = ffffffff | |
29102 | stba %l4,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00ffffff | |
29103 | ! %f12 = 00ff0000, Mem[0000000030141400] = 76ff41ff | |
29104 | sta %f12,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00ff0000 | |
29105 | ! Mem[0000000010041410] = ffffffff, %l4 = 0000000000000000 | |
29106 | ldstuba [%i1+%o5]0x88,%l4 ! %l4 = 000000ff000000ff | |
29107 | membar #Sync ! Added by membar checker (118) | |
29108 | ! %l4 = 000000ff, %l5 = 00000000, Mem[0000000010001400] = 00000000 ff790000 | |
29109 | stda %l4,[%i0+0x000]%asi ! Mem[0000000010001400] = 000000ff 00000000 | |
29110 | ! %l6 = 0000000000000000, Mem[0000000010041410] = ffffffff | |
29111 | stwa %l6,[%i1+%o5]0x80 ! Mem[0000000010041410] = 00000000 | |
29112 | ! Mem[000000001008143b] = ff000000, %l3 = 000000000000001f | |
29113 | ldstuba [%i2+0x03b]%asi,%l3 ! %l3 = 00000000000000ff | |
29114 | ! %f20 = 000000ff 21640000, Mem[0000000010081408] = 00000000 0000ffff | |
29115 | stda %f20,[%i2+%o4]0x88 ! Mem[0000000010081408] = 000000ff 21640000 | |
29116 | ! Starting 10 instruction Load Burst | |
29117 | ! Mem[00000000100c1408] = 0000000000009400, %l7 = ffffffffffffffff | |
29118 | ldx [%i3+%o4],%l7 ! %l7 = 0000000000009400 | |
29119 | ||
29120 | p0_label_699: | |
29121 | ! Mem[0000000010081400] = ffffffff ffffffff, %l0 = 00000000, %l1 = 000073fc | |
29122 | ldda [%i2+%g0]0x80,%l0 ! %l0 = 00000000ffffffff 00000000ffffffff | |
29123 | ! Mem[0000000030141410] = 00000000, %l3 = 0000000000000000 | |
29124 | ldsba [%i5+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
29125 | ! Mem[0000000010041410] = ffffffff00000000, %l7 = 0000000000009400 | |
29126 | ldxa [%i1+%o5]0x88,%l7 ! %l7 = ffffffff00000000 | |
29127 | ! Mem[0000000030101400] = ff00ffff, %l0 = 00000000ffffffff | |
29128 | lduha [%i4+%g0]0x81,%l0 ! %l0 = 000000000000ff00 | |
29129 | ! Mem[0000000010041410] = 00000000, %l5 = 0000000000000000 | |
29130 | lduba [%i1+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
29131 | ! Mem[0000000030001410] = 0000ff00, %l6 = 0000000000000000 | |
29132 | ldsba [%i0+%o5]0x81,%l6 ! %l6 = 0000000000000000 | |
29133 | ! Mem[0000000030041400] = ff00ffff, %l7 = ffffffff00000000 | |
29134 | lduha [%i1+%g0]0x89,%l7 ! %l7 = 000000000000ffff | |
29135 | ! Mem[00000000211c0000] = ffff1a4c, %l1 = 00000000ffffffff | |
29136 | ldsba [%o2+0x001]%asi,%l1 ! %l1 = ffffffffffffffff | |
29137 | ! Mem[0000000010181400] = 03000000, %l1 = ffffffffffffffff | |
29138 | lduwa [%i6+%g0]0x80,%l1 ! %l1 = 0000000003000000 | |
29139 | ! Starting 10 instruction Store Burst | |
29140 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010001400] = ff000000 00000000 | |
29141 | stda %l2,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 00000000 | |
29142 | ||
29143 | p0_label_700: | |
29144 | ! %l6 = 00000000, %l7 = 0000ffff, Mem[00000000100c1430] = 760000ff 0000ffff | |
29145 | stda %l6,[%i3+0x030]%asi ! Mem[00000000100c1430] = 00000000 0000ffff | |
29146 | ! %f16 = ffffffff ffffffff, %l5 = 0000000000000000 | |
29147 | ! Mem[0000000010141420] = 0000000000ff0000 | |
29148 | add %i5,0x020,%g1 | |
29149 | stda %f16,[%g1+%l5]ASI_PST8_PL ! Mem[0000000010141420] = 0000000000ff0000 | |
29150 | ! Mem[0000000010141408] = ff00000000000000, %l1 = 0000000003000000 | |
29151 | ldxa [%i5+%o4]0x80,%l1 ! %l1 = ff00000000000000 | |
29152 | ! %l6 = 0000000000000000, Mem[0000000010101400] = ffffffff | |
29153 | stba %l6,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00ffffff | |
29154 | ! %l4 = 00000000000000ff, Mem[00000000300c1408] = 00000000 | |
29155 | stha %l4,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 000000ff | |
29156 | ! Mem[00000000201c0000] = ffff9457, %l4 = 00000000000000ff | |
29157 | ldstuba [%o0+0x000]%asi,%l4 ! %l4 = 000000ff000000ff | |
29158 | ! %l6 = 0000000000000000, Mem[0000000030101408] = 00000000 | |
29159 | stba %l6,[%i4+%o4]0x81 ! Mem[0000000030101408] = 00000000 | |
29160 | ! %f24 = 00000000 00000000, %l1 = ff00000000000000 | |
29161 | ! Mem[0000000010181428] = 0000000000000003 | |
29162 | add %i6,0x028,%g1 | |
29163 | stda %f24,[%g1+%l1]ASI_PST16_P ! Mem[0000000010181428] = 0000000000000003 | |
29164 | ! %f27 = 79ff0000, Mem[00000000100c143c] = 00000000 | |
29165 | st %f27,[%i3+0x03c] ! Mem[00000000100c143c] = 79ff0000 | |
29166 | ! Starting 10 instruction Load Burst | |
29167 | ! Mem[0000000030041400] = ff00ffff, %l0 = 000000000000ff00 | |
29168 | ldsba [%i1+%g0]0x89,%l0 ! %l0 = ffffffffffffffff | |
29169 | ||
29170 | ! Check Point 140 for processor 0 | |
29171 | ||
29172 | set p0_check_pt_data_140,%g4 | |
29173 | rd %ccr,%g5 ! %g5 = 44 | |
29174 | ldx [%g4+0x08],%g2 | |
29175 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
29176 | bne %xcc,p0_reg_check_fail0 | |
29177 | mov 0xee0,%g1 | |
29178 | ldx [%g4+0x10],%g2 | |
29179 | cmp %l1,%g2 ! %l1 = ff00000000000000 | |
29180 | bne %xcc,p0_reg_check_fail1 | |
29181 | mov 0xee1,%g1 | |
29182 | ldx [%g4+0x18],%g2 | |
29183 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
29184 | bne %xcc,p0_reg_check_fail2 | |
29185 | mov 0xee2,%g1 | |
29186 | ldx [%g4+0x20],%g2 | |
29187 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
29188 | bne %xcc,p0_reg_check_fail3 | |
29189 | mov 0xee3,%g1 | |
29190 | ldx [%g4+0x28],%g2 | |
29191 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
29192 | bne %xcc,p0_reg_check_fail4 | |
29193 | mov 0xee4,%g1 | |
29194 | ldx [%g4+0x30],%g2 | |
29195 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
29196 | bne %xcc,p0_reg_check_fail5 | |
29197 | mov 0xee5,%g1 | |
29198 | ldx [%g4+0x38],%g2 | |
29199 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
29200 | bne %xcc,p0_reg_check_fail6 | |
29201 | mov 0xee6,%g1 | |
29202 | ldx [%g4+0x40],%g2 | |
29203 | cmp %l7,%g2 ! %l7 = 000000000000ffff | |
29204 | bne %xcc,p0_reg_check_fail7 | |
29205 | mov 0xee7,%g1 | |
29206 | ldx [%g4+0x48],%g3 | |
29207 | std %f0,[%g4] | |
29208 | ldx [%g4],%g2 | |
29209 | cmp %g3,%g2 ! %f0 = 00000000 00000003 | |
29210 | bne %xcc,p0_freg_check_fail | |
29211 | mov 0xf00,%g1 | |
29212 | ldx [%g4+0x50],%g3 | |
29213 | std %f2,[%g4] | |
29214 | ldx [%g4],%g2 | |
29215 | cmp %g3,%g2 ! %f2 = ff0012f3 000000ff | |
29216 | bne %xcc,p0_freg_check_fail | |
29217 | mov 0xf02,%g1 | |
29218 | ldx [%g4+0x58],%g3 | |
29219 | std %f4,[%g4] | |
29220 | ldx [%g4],%g2 | |
29221 | cmp %g3,%g2 ! %f4 = 00000000 00000000 | |
29222 | bne %xcc,p0_freg_check_fail | |
29223 | mov 0xf04,%g1 | |
29224 | ldx [%g4+0x60],%g3 | |
29225 | std %f6,[%g4] | |
29226 | ldx [%g4],%g2 | |
29227 | cmp %g3,%g2 ! %f6 = 00000000 ff000000 | |
29228 | bne %xcc,p0_freg_check_fail | |
29229 | mov 0xf06,%g1 | |
29230 | ldx [%g4+0x68],%g3 | |
29231 | std %f8,[%g4] | |
29232 | ldx [%g4],%g2 | |
29233 | cmp %g3,%g2 ! %f8 = c7883403 00ff0000 | |
29234 | bne %xcc,p0_freg_check_fail | |
29235 | mov 0xf08,%g1 | |
29236 | ldx [%g4+0x70],%g3 | |
29237 | std %f10,[%g4] | |
29238 | ldx [%g4],%g2 | |
29239 | cmp %g3,%g2 ! %f10 = 00000000 00000003 | |
29240 | bne %xcc,p0_freg_check_fail | |
29241 | mov 0xf10,%g1 | |
29242 | ldx [%g4+0x78],%g3 | |
29243 | std %f12,[%g4] | |
29244 | ldx [%g4],%g2 | |
29245 | cmp %g3,%g2 ! %f12 = 00ff0000 033488c7 | |
29246 | bne %xcc,p0_freg_check_fail | |
29247 | mov 0xf12,%g1 | |
29248 | ldx [%g4+0x80],%g3 | |
29249 | std %f14,[%g4] | |
29250 | ldx [%g4],%g2 | |
29251 | cmp %g3,%g2 ! %f14 = 00000000 411f0000 | |
29252 | bne %xcc,p0_freg_check_fail | |
29253 | mov 0xf14,%g1 | |
29254 | ldx [%g4+0x88],%g3 | |
29255 | std %f20,[%g4] | |
29256 | ldx [%g4],%g2 | |
29257 | cmp %g3,%g2 ! %f20 = 000000ff 21640000 | |
29258 | bne %xcc,p0_freg_check_fail | |
29259 | mov 0xf20,%g1 | |
29260 | ||
29261 | ! Check Point 140 completed | |
29262 | ||
29263 | ||
29264 | p0_label_701: | |
29265 | ! Mem[0000000010141410] = 000000ff, %l5 = 0000000000000000 | |
29266 | ldswa [%i5+%o5]0x80,%l5 ! %l5 = 00000000000000ff | |
29267 | ! Mem[0000000030141408] = 00000000, %l1 = ff00000000000000 | |
29268 | ldsba [%i5+%o4]0x81,%l1 ! %l1 = 0000000000000000 | |
29269 | ! Mem[0000000030081408] = 00ff0000, %l3 = 0000000000000000 | |
29270 | ldswa [%i2+%o4]0x81,%l3 ! %l3 = 0000000000ff0000 | |
29271 | ! Mem[00000000300c1410] = 21640000, %l3 = 0000000000ff0000 | |
29272 | lduwa [%i3+%o5]0x89,%l3 ! %l3 = 0000000021640000 | |
29273 | ! Mem[0000000010041420] = 000000ff 00000000, %l2 = 00000000, %l3 = 21640000 | |
29274 | ldd [%i1+0x020],%l2 ! %l2 = 00000000000000ff 0000000000000000 | |
29275 | ! Mem[0000000030141400] = 0000ff00, %l1 = 0000000000000000 | |
29276 | ldsba [%i5+%g0]0x81,%l1 ! %l1 = 0000000000000000 | |
29277 | ! Mem[0000000030101400] = ffff00ff, %l0 = ffffffffffffffff | |
29278 | ldswa [%i4+%g0]0x89,%l0 ! %l0 = ffffffffffff00ff | |
29279 | ! Mem[00000000100c1424] = c7ecffbb, %l4 = 00000000000000ff | |
29280 | lduba [%i3+0x027]%asi,%l4 ! %l4 = 00000000000000bb | |
29281 | ! Mem[0000000010041408] = 000000ff, %l2 = 00000000000000ff | |
29282 | lduwa [%i1+%o4]0x88,%l2 ! %l2 = 00000000000000ff | |
29283 | ! Starting 10 instruction Store Burst | |
29284 | ! Mem[0000000030181408] = ff000000, %l3 = 0000000000000000 | |
29285 | ldstuba [%i6+%o4]0x81,%l3 ! %l3 = 000000ff000000ff | |
29286 | ||
29287 | p0_label_702: | |
29288 | ! Mem[0000000010041400] = 00000000, %l5 = 00000000000000ff | |
29289 | swapa [%i1+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
29290 | ! %f19 = 00000000, Mem[0000000010141410] = ff000000 | |
29291 | sta %f19,[%i5+%o5]0x88 ! Mem[0000000010141410] = 00000000 | |
29292 | ! %l7 = 000000000000ffff, Mem[0000000010081434] = 000000ff, %asi = 80 | |
29293 | stwa %l7,[%i2+0x034]%asi ! Mem[0000000010081434] = 0000ffff | |
29294 | ! %f4 = 00000000 00000000, Mem[0000000030041408] = ff00ffff c7883403 | |
29295 | stda %f4 ,[%i1+%o4]0x81 ! Mem[0000000030041408] = 00000000 00000000 | |
29296 | ! %l0 = ffffffffffff00ff, Mem[0000000030181410] = 00000000 | |
29297 | stba %l0,[%i6+%o5]0x89 ! Mem[0000000030181410] = 000000ff | |
29298 | ! %l6 = 0000000000000000, Mem[00000000100c1430] = 000000000000ffff | |
29299 | stx %l6,[%i3+0x030] ! Mem[00000000100c1430] = 0000000000000000 | |
29300 | ! Mem[0000000010041408] = ff000000, %l0 = ffffffffffff00ff | |
29301 | ldstuba [%i1+0x008]%asi,%l0 ! %l0 = 000000ff000000ff | |
29302 | ! Mem[0000000021800001] = 00ff13a3, %l1 = 0000000000000000 | |
29303 | ldstub [%o3+0x001],%l1 ! %l1 = 000000ff000000ff | |
29304 | ! Mem[0000000030181400] = 03000000, %f1 = 00000003 | |
29305 | lda [%i6+%g0]0x81,%f1 ! %f1 = 03000000 | |
29306 | ! Starting 10 instruction Load Burst | |
29307 | ! Mem[0000000030101408] = 0000000003000000, %l4 = 00000000000000bb | |
29308 | ldxa [%i4+%o4]0x81,%l4 ! %l4 = 0000000003000000 | |
29309 | ||
29310 | p0_label_703: | |
29311 | ! Mem[0000000010181408] = 0000ff00, %f31 = ffffffff | |
29312 | lda [%i6+%o4]0x88,%f31 ! %f31 = 0000ff00 | |
29313 | ! Mem[0000000010181408] = 00ff0000, %l2 = 00000000000000ff | |
29314 | ldswa [%i6+%o4]0x80,%l2 ! %l2 = 0000000000ff0000 | |
29315 | ! Mem[0000000030181410] = 000000ff, %l4 = 0000000003000000 | |
29316 | lduwa [%i6+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
29317 | ! Mem[0000000010041410] = ffffffff00000000, %l5 = 0000000000000000 | |
29318 | ldxa [%i1+%o5]0x88,%l5 ! %l5 = ffffffff00000000 | |
29319 | ! Mem[0000000010081400] = ffffffff, %l2 = 0000000000ff0000 | |
29320 | ldsha [%i2+%g0]0x80,%l2 ! %l2 = ffffffffffffffff | |
29321 | ! Mem[0000000020800000] = ffff8470, %l2 = ffffffffffffffff | |
29322 | lduh [%o1+%g0],%l2 ! %l2 = 000000000000ffff | |
29323 | membar #Sync ! Added by membar checker (119) | |
29324 | ! Mem[0000000010101400] = 00ffffff c6000000 03000000 00000000 | |
29325 | ! Mem[0000000010101410] = 00000000 00000000 21640000 00000000 | |
29326 | ! Mem[0000000010101420] = c7883403 0000ffff ff000000 00000003 | |
29327 | ! Mem[0000000010101430] = fffffc00 000000ff 00000000 00000000 | |
29328 | ldda [%i4]ASI_BLK_P,%f0 ! Block Load from 0000000010101400 | |
29329 | ! Mem[0000000010181400] = 03000000000000ff, %l6 = 0000000000000000 | |
29330 | ldxa [%i6+0x000]%asi,%l6 ! %l6 = 03000000000000ff | |
29331 | ! Mem[0000000030081408] = 00ff0000 00009400, %l4 = 000000ff, %l5 = 00000000 | |
29332 | ldda [%i2+%o4]0x81,%l4 ! %l4 = 0000000000ff0000 0000000000009400 | |
29333 | ! Starting 10 instruction Store Burst | |
29334 | ! Mem[0000000010141422] = 00000000, %l1 = 00000000000000ff | |
29335 | ldstuba [%i5+0x022]%asi,%l1 ! %l1 = 00000000000000ff | |
29336 | ||
29337 | p0_label_704: | |
29338 | ! %f16 = ffffffff ffffffff, Mem[0000000010041410] = 00000000 ffffffff | |
29339 | stda %f16,[%i1+%o5]0x88 ! Mem[0000000010041410] = ffffffff ffffffff | |
29340 | ! Mem[00000000100c1400] = 000079ff, %l1 = 0000000000000000 | |
29341 | ldstuba [%i3+%g0]0x88,%l1 ! %l1 = 000000ff000000ff | |
29342 | ! Mem[0000000030081408] = 0000ff00, %l2 = 000000000000ffff | |
29343 | ldstuba [%i2+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
29344 | ! %f0 = 00ffffff c6000000 03000000 00000000 | |
29345 | ! %f4 = 00000000 00000000 21640000 00000000 | |
29346 | ! %f8 = c7883403 0000ffff ff000000 00000003 | |
29347 | ! %f12 = fffffc00 000000ff 00000000 00000000 | |
29348 | stda %f0,[%i4]ASI_BLK_P ! Block Store to 0000000010101400 | |
29349 | ! %l2 = 00000000, %l3 = 000000ff, Mem[00000000100c1410] = c7883403 00ff0000 | |
29350 | stda %l2,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 00000000 000000ff | |
29351 | ! %l1 = 00000000000000ff, Mem[0000000010081408] = 00006421 | |
29352 | stha %l1,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00ff6421 | |
29353 | ! %f23 = ffff0000, Mem[0000000010001400] = 00000000 | |
29354 | sta %f23,[%i0+%g0]0x88 ! Mem[0000000010001400] = ffff0000 | |
29355 | ! Mem[0000000030081408] = 0000ffff, %l4 = 0000000000ff0000 | |
29356 | ldstuba [%i2+%o4]0x89,%l4 ! %l4 = 000000ff000000ff | |
29357 | ! Mem[0000000010141434] = 00000000, %l2 = 0000000000000000 | |
29358 | ldstuba [%i5+0x034]%asi,%l2 ! %l2 = 00000000000000ff | |
29359 | ! Starting 10 instruction Load Burst | |
29360 | ! Mem[0000000010001434] = ffff0000, %l6 = 03000000000000ff | |
29361 | ldsba [%i0+0x034]%asi,%l6 ! %l6 = ffffffffffffffff | |
29362 | ||
29363 | p0_label_705: | |
29364 | ! Mem[00000000211c0000] = ffff1a4c, %l2 = 0000000000000000 | |
29365 | ldsha [%o2+0x000]%asi,%l2 ! %l2 = ffffffffffffffff | |
29366 | ! Mem[0000000010041404] = 00000000, %l2 = ffffffffffffffff | |
29367 | ldub [%i1+0x007],%l2 ! %l2 = 0000000000000000 | |
29368 | membar #Sync ! Added by membar checker (120) | |
29369 | ! Mem[0000000010101410] = 00000000, %l2 = 0000000000000000 | |
29370 | lduha [%i4+%o5]0x88,%l2 ! %l2 = 0000000000000000 | |
29371 | ! Mem[0000000021800000] = 00ff13a3, %l2 = 0000000000000000 | |
29372 | ldsba [%o3+0x001]%asi,%l2 ! %l2 = ffffffffffffffff | |
29373 | ! Mem[0000000030181410] = ff000000, %l4 = 00000000000000ff | |
29374 | lduha [%i6+%o5]0x81,%l4 ! %l4 = 000000000000ff00 | |
29375 | ! Mem[0000000010141400] = 0000ffff000000ff, %f18 = 03000000 00000000 | |
29376 | ldda [%i5+0x000]%asi,%f18 ! %f18 = 0000ffff 000000ff | |
29377 | ! Mem[00000000300c1400] = ffffffff ffffffff ff000000 00000003 | |
29378 | ! Mem[00000000300c1410] = 00006421 ff000000 0000ffff ffff0000 | |
29379 | ! Mem[00000000300c1420] = 00000000 00000000 0000ff79 ffffffff | |
29380 | ! Mem[00000000300c1430] = 00940000 000000ff ffffffff ffffffff | |
29381 | ldda [%i3]ASI_BLK_AIUS,%f0 ! Block Load from 00000000300c1400 | |
29382 | ! Mem[00000000100c1408] = 0000000000009400, %l2 = ffffffffffffffff | |
29383 | ldxa [%i3+%o4]0x80,%l2 ! %l2 = 0000000000009400 | |
29384 | ! Mem[00000000100c1408] = 00000000 00009400, %l2 = 00009400, %l3 = 000000ff | |
29385 | ldda [%i3+%o4]0x80,%l2 ! %l2 = 0000000000000000 0000000000009400 | |
29386 | ! Starting 10 instruction Store Burst | |
29387 | membar #Sync ! Added by membar checker (121) | |
29388 | ! %l5 = 0000000000009400, Mem[00000000300c1410] = 00006421ff000000 | |
29389 | stxa %l5,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 0000000000009400 | |
29390 | ||
29391 | ! Check Point 141 for processor 0 | |
29392 | ||
29393 | set p0_check_pt_data_141,%g4 | |
29394 | rd %ccr,%g5 ! %g5 = 44 | |
29395 | ldx [%g4+0x08],%g2 | |
29396 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
29397 | bne %xcc,p0_reg_check_fail0 | |
29398 | mov 0xee0,%g1 | |
29399 | ldx [%g4+0x10],%g2 | |
29400 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
29401 | bne %xcc,p0_reg_check_fail1 | |
29402 | mov 0xee1,%g1 | |
29403 | ldx [%g4+0x18],%g2 | |
29404 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
29405 | bne %xcc,p0_reg_check_fail2 | |
29406 | mov 0xee2,%g1 | |
29407 | ldx [%g4+0x20],%g2 | |
29408 | cmp %l3,%g2 ! %l3 = 0000000000009400 | |
29409 | bne %xcc,p0_reg_check_fail3 | |
29410 | mov 0xee3,%g1 | |
29411 | ldx [%g4+0x28],%g2 | |
29412 | cmp %l4,%g2 ! %l4 = 000000000000ff00 | |
29413 | bne %xcc,p0_reg_check_fail4 | |
29414 | mov 0xee4,%g1 | |
29415 | ldx [%g4+0x30],%g2 | |
29416 | cmp %l5,%g2 ! %l5 = 0000000000009400 | |
29417 | bne %xcc,p0_reg_check_fail5 | |
29418 | mov 0xee5,%g1 | |
29419 | ldx [%g4+0x38],%g2 | |
29420 | cmp %l6,%g2 ! %l6 = ffffffffffffffff | |
29421 | bne %xcc,p0_reg_check_fail6 | |
29422 | mov 0xee6,%g1 | |
29423 | ldx [%g4+0x40],%g3 | |
29424 | std %f0,[%g4] | |
29425 | ldx [%g4],%g2 | |
29426 | cmp %g3,%g2 ! %f0 = ffffffff ffffffff | |
29427 | bne %xcc,p0_freg_check_fail | |
29428 | mov 0xf00,%g1 | |
29429 | ldx [%g4+0x48],%g3 | |
29430 | std %f2,[%g4] | |
29431 | ldx [%g4],%g2 | |
29432 | cmp %g3,%g2 ! %f2 = ff000000 00000003 | |
29433 | bne %xcc,p0_freg_check_fail | |
29434 | mov 0xf02,%g1 | |
29435 | ldx [%g4+0x50],%g3 | |
29436 | std %f4,[%g4] | |
29437 | ldx [%g4],%g2 | |
29438 | cmp %g3,%g2 ! %f4 = 00006421 ff000000 | |
29439 | bne %xcc,p0_freg_check_fail | |
29440 | mov 0xf04,%g1 | |
29441 | ldx [%g4+0x58],%g3 | |
29442 | std %f6,[%g4] | |
29443 | ldx [%g4],%g2 | |
29444 | cmp %g3,%g2 ! %f6 = 0000ffff ffff0000 | |
29445 | bne %xcc,p0_freg_check_fail | |
29446 | mov 0xf06,%g1 | |
29447 | ldx [%g4+0x60],%g3 | |
29448 | std %f8,[%g4] | |
29449 | ldx [%g4],%g2 | |
29450 | cmp %g3,%g2 ! %f8 = 00000000 00000000 | |
29451 | bne %xcc,p0_freg_check_fail | |
29452 | mov 0xf08,%g1 | |
29453 | ldx [%g4+0x68],%g3 | |
29454 | std %f10,[%g4] | |
29455 | ldx [%g4],%g2 | |
29456 | cmp %g3,%g2 ! %f10 = 0000ff79 ffffffff | |
29457 | bne %xcc,p0_freg_check_fail | |
29458 | mov 0xf10,%g1 | |
29459 | ldx [%g4+0x70],%g3 | |
29460 | std %f12,[%g4] | |
29461 | ldx [%g4],%g2 | |
29462 | cmp %g3,%g2 ! %f12 = 00940000 000000ff | |
29463 | bne %xcc,p0_freg_check_fail | |
29464 | mov 0xf12,%g1 | |
29465 | ldx [%g4+0x78],%g3 | |
29466 | std %f14,[%g4] | |
29467 | ldx [%g4],%g2 | |
29468 | cmp %g3,%g2 ! %f14 = ffffffff ffffffff | |
29469 | bne %xcc,p0_freg_check_fail | |
29470 | mov 0xf14,%g1 | |
29471 | ldx [%g4+0x80],%g3 | |
29472 | std %f18,[%g4] | |
29473 | ldx [%g4],%g2 | |
29474 | cmp %g3,%g2 ! %f18 = 0000ffff 000000ff | |
29475 | bne %xcc,p0_freg_check_fail | |
29476 | mov 0xf18,%g1 | |
29477 | ldx [%g4+0x88],%g3 | |
29478 | std %f30,[%g4] | |
29479 | ldx [%g4],%g2 | |
29480 | cmp %g3,%g2 ! %f30 = ffffffff 0000ff00 | |
29481 | bne %xcc,p0_freg_check_fail | |
29482 | mov 0xf30,%g1 | |
29483 | ||
29484 | ! Check Point 141 completed | |
29485 | ||
29486 | ||
29487 | p0_label_706: | |
29488 | ! Mem[0000000010181400] = 00000003, %l7 = 000000000000ffff | |
29489 | swapa [%i6+%g0]0x88,%l7 ! %l7 = 0000000000000003 | |
29490 | ! %l6 = ffffffff, %l7 = 00000003, Mem[0000000010141400] = 0000ffff 000000ff | |
29491 | stda %l6,[%i5+%g0]0x80 ! Mem[0000000010141400] = ffffffff 00000003 | |
29492 | ! Mem[0000000010001400] = 0000ffff, %l4 = 000000000000ff00 | |
29493 | swapa [%i0+%g0]0x80,%l4 ! %l4 = 000000000000ffff | |
29494 | ! Mem[000000001008141f] = ffffc7ec, %l1 = 00000000000000ff | |
29495 | ldstub [%i2+0x01f],%l1 ! %l1 = 000000ec000000ff | |
29496 | ! %f10 = 0000ff79, Mem[0000000010041408] = ff000000 | |
29497 | sta %f10,[%i1+0x008]%asi ! Mem[0000000010041408] = 0000ff79 | |
29498 | ! Mem[0000000010081410] = 0000ff00, %l1 = 00000000000000ec | |
29499 | swapa [%i2+%o5]0x88,%l1 ! %l1 = 000000000000ff00 | |
29500 | ! Mem[0000000010181410] = 00000000, %l7 = 0000000000000003 | |
29501 | ldstuba [%i6+%o5]0x88,%l7 ! %l7 = 00000000000000ff | |
29502 | ! Mem[0000000010141428] = 0000000000000000, %l3 = 0000000000009400, %l2 = 0000000000000000 | |
29503 | add %i5,0x28,%g1 | |
29504 | casxa [%g1]0x80,%l3,%l2 ! %l2 = 0000000000000000 | |
29505 | ! %f9 = 00000000, Mem[0000000030181410] = 000000ff | |
29506 | sta %f9 ,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000 | |
29507 | ! Starting 10 instruction Load Burst | |
29508 | ! Mem[0000000010101400] = 000000c6ffffff00, %l2 = 0000000000000000 | |
29509 | ldxa [%i4+%g0]0x88,%l2 ! %l2 = 000000c6ffffff00 | |
29510 | ||
29511 | p0_label_707: | |
29512 | ! Mem[0000000010041400] = 000000ff, %l5 = 0000000000009400 | |
29513 | lduba [%i1+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
29514 | ! Mem[0000000010001408] = 00000000, %l2 = 000000c6ffffff00 | |
29515 | ldsba [%i0+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
29516 | ! Mem[0000000010041408] = 000000ff 79ff0000, %l6 = ffffffff, %l7 = 00000000 | |
29517 | ldda [%i1+%o4]0x88,%l6 ! %l6 = 0000000079ff0000 00000000000000ff | |
29518 | ! Mem[0000000010101410] = 00000000 00000000, %l6 = 79ff0000, %l7 = 000000ff | |
29519 | ldda [%i4+%o5]0x80,%l6 ! %l6 = 0000000000000000 0000000000000000 | |
29520 | ! Mem[0000000030181410] = 00000000 00000000, %l2 = 00000000, %l3 = 00009400 | |
29521 | ldda [%i6+%o5]0x81,%l2 ! %l2 = 0000000000000000 0000000000000000 | |
29522 | ! Mem[0000000010181400] = ffff0000, %l3 = 0000000000000000 | |
29523 | lduba [%i6+%g0]0x80,%l3 ! %l3 = 00000000000000ff | |
29524 | ! Mem[0000000030181400] = 0300000000000000, %l0 = 00000000000000ff | |
29525 | ldxa [%i6+%g0]0x81,%l0 ! %l0 = 0300000000000000 | |
29526 | ! Mem[00000000300c1408] = 000000ff, %f11 = ffffffff | |
29527 | lda [%i3+%o4]0x89,%f11 ! %f11 = 000000ff | |
29528 | ! Mem[00000000100c1434] = 00000000, %l6 = 0000000000000000 | |
29529 | lduha [%i3+0x034]%asi,%l6 ! %l6 = 0000000000000000 | |
29530 | ! Starting 10 instruction Store Burst | |
29531 | ! %l4 = 000000000000ffff, Mem[0000000030001408] = c7880000 | |
29532 | stwa %l4,[%i0+%o4]0x81 ! Mem[0000000030001408] = 0000ffff | |
29533 | ||
29534 | p0_label_708: | |
29535 | ! %f14 = ffffffff ffffffff, Mem[0000000010001408] = 00000000 0000ff00 | |
29536 | std %f14,[%i0+%o4] ! Mem[0000000010001408] = ffffffff ffffffff | |
29537 | ! %l5 = 0000000000000000, Mem[0000000030001408] = ffff0000 | |
29538 | stwa %l5,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00000000 | |
29539 | ! Mem[0000000010041430] = ffff411f, %l3 = 00000000000000ff, %asi = 80 | |
29540 | swapa [%i1+0x030]%asi,%l3 ! %l3 = 00000000ffff411f | |
29541 | ! Mem[0000000010001400] = 0000ff00, %l5 = 0000000000000000 | |
29542 | ldstuba [%i0+%g0]0x80,%l5 ! %l5 = 00000000000000ff | |
29543 | ! %f27 = 79ff0000, Mem[0000000010181418] = ffffffff | |
29544 | st %f27,[%i6+0x018] ! Mem[0000000010181418] = 79ff0000 | |
29545 | ! %l0 = 00000000, %l1 = 0000ff00, Mem[0000000010181408] = 00ff0000 00000000 | |
29546 | stda %l0,[%i6+%o4]0x80 ! Mem[0000000010181408] = 00000000 0000ff00 | |
29547 | ! Mem[0000000020800000] = ffff8470, %l2 = 0000000000000000 | |
29548 | ldstuba [%o1+0x000]%asi,%l2 ! %l2 = 000000ff000000ff | |
29549 | ! Mem[0000000030181410] = 00000000, %l3 = 00000000ffff411f | |
29550 | swapa [%i6+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
29551 | ! Mem[0000000030141400] = 0000ff00, %l4 = 000000000000ffff | |
29552 | ldstuba [%i5+%g0]0x81,%l4 ! %l4 = 00000000000000ff | |
29553 | ! Starting 10 instruction Load Burst | |
29554 | ! Mem[0000000030181408] = ff000000 f31200ff, %l4 = 00000000, %l5 = 00000000 | |
29555 | ldda [%i6+%o4]0x81,%l4 ! %l4 = 00000000ff000000 00000000f31200ff | |
29556 | ||
29557 | p0_label_709: | |
29558 | ! Mem[000000001008142c] = 1f00ff76, %l3 = 0000000000000000 | |
29559 | lduwa [%i2+0x02c]%asi,%l3 ! %l3 = 000000001f00ff76 | |
29560 | ! Mem[0000000030101400] = ff00ffff, %l4 = 00000000ff000000 | |
29561 | lduba [%i4+%g0]0x81,%l4 ! %l4 = 00000000000000ff | |
29562 | ! Mem[0000000030001400] = 00ffffff00000000, %l3 = 000000001f00ff76 | |
29563 | ldxa [%i0+%g0]0x81,%l3 ! %l3 = 00ffffff00000000 | |
29564 | ! Mem[0000000010001400] = ff00ff00, %l3 = 00ffffff00000000 | |
29565 | lduba [%i0+%g0]0x80,%l3 ! %l3 = 00000000000000ff | |
29566 | ! Mem[0000000010081410] = ec000000, %l3 = 00000000000000ff | |
29567 | swapa [%i2+%o5]0x80,%l3 ! %l3 = 00000000ec000000 | |
29568 | ! Mem[0000000030141400] = 00ff00ff, %l5 = 00000000f31200ff | |
29569 | lduha [%i5+%g0]0x89,%l5 ! %l5 = 00000000000000ff | |
29570 | ! Mem[0000000030181410] = 1f41ffff, %l1 = 000000000000ff00 | |
29571 | ldsha [%i6+%o5]0x89,%l1 ! %l1 = ffffffffffffffff | |
29572 | ! Mem[0000000010001400] = ff00ff00, %l3 = 00000000ec000000 | |
29573 | ldsb [%i0+0x002],%l3 ! %l3 = ffffffffffffffff | |
29574 | ! Mem[0000000010181408] = 00000000, %l3 = ffffffffffffffff | |
29575 | ldsba [%i6+%o4]0x88,%l3 ! %l3 = 0000000000000000 | |
29576 | ! Starting 10 instruction Store Burst | |
29577 | ! Mem[0000000030181410] = 1f41ffff, %l4 = 00000000000000ff | |
29578 | swapa [%i6+%o5]0x89,%l4 ! %l4 = 000000001f41ffff | |
29579 | ||
29580 | p0_label_710: | |
29581 | ! %f2 = ff000000 00000003, Mem[0000000010001400] = 00ff00ff 00000000 | |
29582 | stda %f2 ,[%i0+%g0]0x88 ! Mem[0000000010001400] = ff000000 00000003 | |
29583 | ! %l1 = ffffffffffffffff, Mem[0000000010141400] = ffffffff | |
29584 | stwa %l1,[%i5+%g0]0x80 ! Mem[0000000010141400] = ffffffff | |
29585 | ! %l7 = 0000000000000000, Mem[0000000010041400] = 000000ff00000000 | |
29586 | stx %l7,[%i1+%g0] ! Mem[0000000010041400] = 0000000000000000 | |
29587 | ! Mem[0000000030081408] = ffff0000, %l7 = 0000000000000000 | |
29588 | swapa [%i2+%o4]0x81,%l7 ! %l7 = 00000000ffff0000 | |
29589 | ! %f2 = ff000000 00000003, %l6 = 0000000000000000 | |
29590 | ! Mem[0000000010141408] = ff00000000000000 | |
29591 | add %i5,0x008,%g1 | |
29592 | stda %f2,[%g1+%l6]ASI_PST8_P ! Mem[0000000010141408] = ff00000000000000 | |
29593 | ! Mem[0000000020800040] = ffff7379, %l6 = 0000000000000000 | |
29594 | ldstuba [%o1+0x040]%asi,%l6 ! %l6 = 000000ff000000ff | |
29595 | ! %l6 = 000000ff, %l7 = ffff0000, Mem[0000000030001400] = 00ffffff 00000000 | |
29596 | stda %l6,[%i0+%g0]0x81 ! Mem[0000000030001400] = 000000ff ffff0000 | |
29597 | ! %f16 = ffffffff ffffffff, %l5 = 00000000000000ff | |
29598 | ! Mem[0000000010141428] = 0000000000000000 | |
29599 | add %i5,0x028,%g1 | |
29600 | stda %f16,[%g1+%l5]ASI_PST32_PL ! Mem[0000000010141428] = ffffffffffffffff | |
29601 | ! %l7 = 00000000ffff0000, Mem[0000000010081400] = ffffffffffffffff | |
29602 | stxa %l7,[%i2+%g0]0x88 ! Mem[0000000010081400] = 00000000ffff0000 | |
29603 | ! Starting 10 instruction Load Burst | |
29604 | ! Mem[00000000211c0000] = ffff1a4c, %l0 = 0300000000000000 | |
29605 | lduh [%o2+%g0],%l0 ! %l0 = 000000000000ffff | |
29606 | ||
29607 | ! Check Point 142 for processor 0 | |
29608 | ||
29609 | set p0_check_pt_data_142,%g4 | |
29610 | rd %ccr,%g5 ! %g5 = 44 | |
29611 | ldx [%g4+0x08],%g2 | |
29612 | cmp %l0,%g2 ! %l0 = 000000000000ffff | |
29613 | bne %xcc,p0_reg_check_fail0 | |
29614 | mov 0xee0,%g1 | |
29615 | ldx [%g4+0x10],%g2 | |
29616 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
29617 | bne %xcc,p0_reg_check_fail1 | |
29618 | mov 0xee1,%g1 | |
29619 | ldx [%g4+0x18],%g2 | |
29620 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
29621 | bne %xcc,p0_reg_check_fail2 | |
29622 | mov 0xee2,%g1 | |
29623 | ldx [%g4+0x20],%g2 | |
29624 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
29625 | bne %xcc,p0_reg_check_fail3 | |
29626 | mov 0xee3,%g1 | |
29627 | ldx [%g4+0x28],%g2 | |
29628 | cmp %l4,%g2 ! %l4 = 000000001f41ffff | |
29629 | bne %xcc,p0_reg_check_fail4 | |
29630 | mov 0xee4,%g1 | |
29631 | ldx [%g4+0x30],%g2 | |
29632 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
29633 | bne %xcc,p0_reg_check_fail5 | |
29634 | mov 0xee5,%g1 | |
29635 | ldx [%g4+0x38],%g2 | |
29636 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
29637 | bne %xcc,p0_reg_check_fail6 | |
29638 | mov 0xee6,%g1 | |
29639 | ldx [%g4+0x40],%g2 | |
29640 | cmp %l7,%g2 ! %l7 = 00000000ffff0000 | |
29641 | bne %xcc,p0_reg_check_fail7 | |
29642 | mov 0xee7,%g1 | |
29643 | ldx [%g4+0x48],%g3 | |
29644 | std %f2,[%g4] | |
29645 | ldx [%g4],%g2 | |
29646 | cmp %g3,%g2 ! %f2 = ff000000 00000003 | |
29647 | bne %xcc,p0_freg_check_fail | |
29648 | mov 0xf02,%g1 | |
29649 | ldx [%g4+0x50],%g3 | |
29650 | std %f4,[%g4] | |
29651 | ldx [%g4],%g2 | |
29652 | cmp %g3,%g2 ! %f4 = 00006421 ff000000 | |
29653 | bne %xcc,p0_freg_check_fail | |
29654 | mov 0xf04,%g1 | |
29655 | ldx [%g4+0x58],%g3 | |
29656 | std %f6,[%g4] | |
29657 | ldx [%g4],%g2 | |
29658 | cmp %g3,%g2 ! %f6 = 0000ffff ffff0000 | |
29659 | bne %xcc,p0_freg_check_fail | |
29660 | mov 0xf06,%g1 | |
29661 | ldx [%g4+0x60],%g3 | |
29662 | std %f10,[%g4] | |
29663 | ldx [%g4],%g2 | |
29664 | cmp %g3,%g2 ! %f10 = 0000ff79 000000ff | |
29665 | bne %xcc,p0_freg_check_fail | |
29666 | mov 0xf10,%g1 | |
29667 | ||
29668 | ! Check Point 142 completed | |
29669 | ||
29670 | ||
29671 | p0_label_711: | |
29672 | membar #Sync ! Added by membar checker (122) | |
29673 | ! Mem[0000000010181400] = ffff0000 000000ff 00000000 0000ff00 | |
29674 | ! Mem[0000000010181410] = ff000000 00009400 79ff0000 ffff0000 | |
29675 | ! Mem[0000000010181420] = c7883403 00ff0000 00000000 00000003 | |
29676 | ! Mem[0000000010181430] = 00ff0000 033488c7 411f0000 c6000000 | |
29677 | ldda [%i6]ASI_BLK_AIUPL,%f16 ! Block Load from 0000000010181400 | |
29678 | ! Mem[00000000211c0000] = ffff1a4c, %l3 = 0000000000000000 | |
29679 | ldsh [%o2+%g0],%l3 ! %l3 = ffffffffffffffff | |
29680 | ! Mem[0000000030181408] = ff0012f3000000ff, %l6 = 00000000000000ff | |
29681 | ldxa [%i6+%o4]0x89,%l6 ! %l6 = ff0012f3000000ff | |
29682 | ! Mem[000000001000143c] = 1f000076, %l5 = 00000000000000ff | |
29683 | ldswa [%i0+0x03c]%asi,%l5 ! %l5 = 000000001f000076 | |
29684 | ! Mem[00000000100c1424] = c7ecffbb, %l4 = 000000001f41ffff | |
29685 | lduw [%i3+0x024],%l4 ! %l4 = 00000000c7ecffbb | |
29686 | ! Mem[0000000010101408] = 00000003, %l4 = 00000000c7ecffbb | |
29687 | lduba [%i4+%o4]0x88,%l4 ! %l4 = 0000000000000003 | |
29688 | ! Mem[00000000300c1400] = ffffffff, %l7 = 00000000ffff0000 | |
29689 | lduha [%i3+%g0]0x89,%l7 ! %l7 = 000000000000ffff | |
29690 | ! Mem[0000000010101400] = ffffff00, %l0 = 000000000000ffff | |
29691 | lduba [%i4+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
29692 | ! Mem[0000000030081408] = 00000000, %l0 = 0000000000000000 | |
29693 | ldswa [%i2+%o4]0x81,%l0 ! %l0 = 0000000000000000 | |
29694 | ! Starting 10 instruction Store Burst | |
29695 | ! %l4 = 0000000000000003, Mem[0000000030141408] = 0000000000000000 | |
29696 | stxa %l4,[%i5+%o4]0x89 ! Mem[0000000030141408] = 0000000000000003 | |
29697 | ||
29698 | p0_label_712: | |
29699 | ! Mem[0000000010081434] = 0000ffff, %l4 = 0000000000000003 | |
29700 | swap [%i2+0x034],%l4 ! %l4 = 000000000000ffff | |
29701 | ! Mem[00000000300c1400] = ffffffff, %l7 = 000000000000ffff | |
29702 | swapa [%i3+%g0]0x89,%l7 ! %l7 = 00000000ffffffff | |
29703 | ! %l2 = 00000000000000ff, Mem[0000000021800081] = ffffa433 | |
29704 | stb %l2,[%o3+0x081] ! Mem[0000000021800080] = ffffa433 | |
29705 | ! %l6 = ff0012f3000000ff, Mem[0000000030101408] = 00000000 | |
29706 | stha %l6,[%i4+%o4]0x89 ! Mem[0000000030101408] = 000000ff | |
29707 | ! %f10 = 0000ff79 000000ff, %l2 = 00000000000000ff | |
29708 | ! Mem[0000000030081420] = 00000000ff0000ff | |
29709 | add %i2,0x020,%g1 | |
29710 | stda %f10,[%g1+%l2]ASI_PST8_SL ! Mem[0000000030081420] = ff00000079ff0000 | |
29711 | ! Mem[0000000010081416] = ff000000, %l3 = ffffffffffffffff | |
29712 | ldstuba [%i2+0x016]%asi,%l3 ! %l3 = 00000000000000ff | |
29713 | ! %f16 = ff000000 0000ffff 00ff0000 00000000 | |
29714 | ! %f20 = 00940000 000000ff 0000ffff 0000ff79 | |
29715 | ! %f24 = 0000ff00 033488c7 03000000 00000000 | |
29716 | ! %f28 = c7883403 0000ff00 000000c6 00001f41 | |
29717 | stda %f16,[%i2]ASI_BLK_P ! Block Store to 0000000010081400 | |
29718 | membar #Sync ! Added by membar checker (123) | |
29719 | ! Mem[0000000010081430] = c78834030000ff00, %l1 = ffffffffffffffff, %l6 = ff0012f3000000ff | |
29720 | add %i2,0x30,%g1 | |
29721 | casxa [%g1]0x80,%l1,%l6 ! %l6 = c78834030000ff00 | |
29722 | ! Mem[0000000010181404] = 000000ff, %l2 = 00000000000000ff | |
29723 | swap [%i6+0x004],%l2 ! %l2 = 00000000000000ff | |
29724 | ! Starting 10 instruction Load Burst | |
29725 | ! Mem[0000000030101410] = 00ffffff, %l3 = 0000000000000000 | |
29726 | lduha [%i4+%o5]0x81,%l3 ! %l3 = 00000000000000ff | |
29727 | ||
29728 | p0_label_713: | |
29729 | ! Mem[0000000030041400] = ffff00ff, %l2 = 00000000000000ff | |
29730 | ldsha [%i1+%g0]0x81,%l2 ! %l2 = ffffffffffffffff | |
29731 | ! Mem[0000000030081408] = 00000000, %f5 = ff000000 | |
29732 | lda [%i2+%o4]0x81,%f5 ! %f5 = 00000000 | |
29733 | ! Mem[0000000010101400] = ffffff00, %l0 = 0000000000000000 | |
29734 | lduha [%i4+%g0]0x88,%l0 ! %l0 = 000000000000ff00 | |
29735 | ! Mem[0000000030181400] = 0000000000000003, %l1 = ffffffffffffffff | |
29736 | ldxa [%i6+%g0]0x89,%l1 ! %l1 = 0000000000000003 | |
29737 | ! Mem[0000000030101410] = 00ffffff ffffffff, %l4 = 0000ffff, %l5 = 1f000076 | |
29738 | ldda [%i4+%o5]0x81,%l4 ! %l4 = 0000000000ffffff 00000000ffffffff | |
29739 | ! Mem[00000000100c1410] = 00000000, %l3 = 00000000000000ff | |
29740 | ldswa [%i3+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
29741 | ! Mem[00000000100c1414] = ff000000, %f24 = 0000ff00 | |
29742 | ld [%i3+0x014],%f24 ! %f24 = ff000000 | |
29743 | ! Mem[0000000010041410] = ffffffff, %l5 = 00000000ffffffff | |
29744 | lduw [%i1+%o5],%l5 ! %l5 = 00000000ffffffff | |
29745 | ! Mem[00000000100c1410] = 000000ff00000000, %l5 = 00000000ffffffff | |
29746 | ldxa [%i3+%o5]0x88,%l5 ! %l5 = 000000ff00000000 | |
29747 | ! Starting 10 instruction Store Burst | |
29748 | ! Mem[0000000010001410] = 00009400, %l7 = 00000000ffffffff | |
29749 | swapa [%i0+%o5]0x80,%l7 ! %l7 = 0000000000009400 | |
29750 | ||
29751 | p0_label_714: | |
29752 | ! %f29 = 0000ff00, Mem[0000000010101408] = 00000003 | |
29753 | sta %f29,[%i4+%o4]0x88 ! Mem[0000000010101408] = 0000ff00 | |
29754 | ! %l5 = 000000ff00000000, Mem[0000000010181420] = c788340300ff0000 | |
29755 | stx %l5,[%i6+0x020] ! Mem[0000000010181420] = 000000ff00000000 | |
29756 | ! %l6 = 0000ff00, %l7 = 00009400, Mem[00000000100c1410] = 00000000 ff000000 | |
29757 | stda %l6,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 0000ff00 00009400 | |
29758 | ! %f16 = ff000000, Mem[0000000010141408] = 000000ff | |
29759 | sta %f16,[%i5+%o4]0x88 ! Mem[0000000010141408] = ff000000 | |
29760 | ! Mem[0000000010081400] = 000000ff, %l5 = 000000ff00000000 | |
29761 | ldstuba [%i2+%g0]0x88,%l5 ! %l5 = 000000ff000000ff | |
29762 | ! %l6 = c78834030000ff00, Mem[00000000201c0000] = ffff9457, %asi = 80 | |
29763 | stha %l6,[%o0+0x000]%asi ! Mem[00000000201c0000] = ff009457 | |
29764 | ! %l5 = 00000000000000ff, Mem[0000000030141400] = ff00000000ff00ff | |
29765 | stxa %l5,[%i5+%g0]0x89 ! Mem[0000000030141400] = 00000000000000ff | |
29766 | ! %f12 = 00940000 000000ff, %l6 = c78834030000ff00 | |
29767 | ! Mem[0000000010141438] = ffffffffffffffff | |
29768 | add %i5,0x038,%g1 | |
29769 | stda %f12,[%g1+%l6]ASI_PST32_PL ! Mem[0000000010141438] = ffffffffffffffff | |
29770 | ! Mem[000000001018140c] = 0000ff00, %l5 = 000000ff, %l3 = 00000000 | |
29771 | add %i6,0x0c,%g1 | |
29772 | casa [%g1]0x80,%l5,%l3 ! %l3 = 000000000000ff00 | |
29773 | ! Starting 10 instruction Load Burst | |
29774 | ! Mem[0000000030081400] = ffff00ff, %l4 = 0000000000ffffff | |
29775 | lduha [%i2+%g0]0x89,%l4 ! %l4 = 00000000000000ff | |
29776 | ||
29777 | p0_label_715: | |
29778 | ! Mem[0000000010181438] = 411f0000, %f11 = 000000ff | |
29779 | lda [%i6+0x038]%asi,%f11 ! %f11 = 411f0000 | |
29780 | ! Mem[00000000211c0000] = ffff1a4c, %l3 = 000000000000ff00 | |
29781 | ldub [%o2+%g0],%l3 ! %l3 = 00000000000000ff | |
29782 | ! Mem[0000000010141410] = 00000000, %l3 = 00000000000000ff | |
29783 | ldswa [%i5+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
29784 | ! Mem[0000000010041410] = ffffffff, %l1 = 0000000000000003 | |
29785 | lduha [%i1+%o5]0x80,%l1 ! %l1 = 000000000000ffff | |
29786 | ! Mem[0000000030041400] = ffff00ffffff00ff, %l2 = ffffffffffffffff | |
29787 | ldxa [%i1+%g0]0x81,%l2 ! %l2 = ffff00ffffff00ff | |
29788 | ! Mem[0000000010181408] = 00000000, %l5 = 00000000000000ff | |
29789 | ldswa [%i6+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
29790 | ! Mem[0000000010101410] = 00000000, %l6 = c78834030000ff00 | |
29791 | lduba [%i4+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
29792 | ! Mem[0000000010081430] = c7883403 0000ff00, %l6 = 00000000, %l7 = 00009400 | |
29793 | ldd [%i2+0x030],%l6 ! %l6 = 00000000c7883403 000000000000ff00 | |
29794 | ! Mem[0000000010081400] = ff000000, %l2 = ffff00ffffff00ff | |
29795 | lduwa [%i2+0x000]%asi,%l2 ! %l2 = 00000000ff000000 | |
29796 | ! Starting 10 instruction Store Burst | |
29797 | ! %l7 = 000000000000ff00, Mem[0000000010001410] = ffffffff | |
29798 | stwa %l7,[%i0+%o5]0x88 ! Mem[0000000010001410] = 0000ff00 | |
29799 | ||
29800 | ! Check Point 143 for processor 0 | |
29801 | ||
29802 | set p0_check_pt_data_143,%g4 | |
29803 | rd %ccr,%g5 ! %g5 = 44 | |
29804 | ldx [%g4+0x08],%g2 | |
29805 | cmp %l0,%g2 ! %l0 = 000000000000ff00 | |
29806 | bne %xcc,p0_reg_check_fail0 | |
29807 | mov 0xee0,%g1 | |
29808 | ldx [%g4+0x10],%g2 | |
29809 | cmp %l1,%g2 ! %l1 = 000000000000ffff | |
29810 | bne %xcc,p0_reg_check_fail1 | |
29811 | mov 0xee1,%g1 | |
29812 | ldx [%g4+0x18],%g2 | |
29813 | cmp %l2,%g2 ! %l2 = 00000000ff000000 | |
29814 | bne %xcc,p0_reg_check_fail2 | |
29815 | mov 0xee2,%g1 | |
29816 | ldx [%g4+0x20],%g2 | |
29817 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
29818 | bne %xcc,p0_reg_check_fail3 | |
29819 | mov 0xee3,%g1 | |
29820 | ldx [%g4+0x28],%g2 | |
29821 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
29822 | bne %xcc,p0_reg_check_fail4 | |
29823 | mov 0xee4,%g1 | |
29824 | ldx [%g4+0x30],%g2 | |
29825 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
29826 | bne %xcc,p0_reg_check_fail5 | |
29827 | mov 0xee5,%g1 | |
29828 | ldx [%g4+0x38],%g2 | |
29829 | cmp %l6,%g2 ! %l6 = 00000000c7883403 | |
29830 | bne %xcc,p0_reg_check_fail6 | |
29831 | mov 0xee6,%g1 | |
29832 | ldx [%g4+0x40],%g2 | |
29833 | cmp %l7,%g2 ! %l7 = 000000000000ff00 | |
29834 | bne %xcc,p0_reg_check_fail7 | |
29835 | mov 0xee7,%g1 | |
29836 | ldx [%g4+0x48],%g3 | |
29837 | std %f4,[%g4] | |
29838 | ldx [%g4],%g2 | |
29839 | cmp %g3,%g2 ! %f4 = 00006421 00000000 | |
29840 | bne %xcc,p0_freg_check_fail | |
29841 | mov 0xf04,%g1 | |
29842 | ldx [%g4+0x50],%g3 | |
29843 | std %f6,[%g4] | |
29844 | ldx [%g4],%g2 | |
29845 | cmp %g3,%g2 ! %f6 = 0000ffff ffff0000 | |
29846 | bne %xcc,p0_freg_check_fail | |
29847 | mov 0xf06,%g1 | |
29848 | ldx [%g4+0x58],%g3 | |
29849 | std %f10,[%g4] | |
29850 | ldx [%g4],%g2 | |
29851 | cmp %g3,%g2 ! %f10 = 0000ff79 411f0000 | |
29852 | bne %xcc,p0_freg_check_fail | |
29853 | mov 0xf10,%g1 | |
29854 | ldx [%g4+0x60],%g3 | |
29855 | std %f16,[%g4] | |
29856 | ldx [%g4],%g2 | |
29857 | cmp %g3,%g2 ! %f16 = ff000000 0000ffff | |
29858 | bne %xcc,p0_freg_check_fail | |
29859 | mov 0xf16,%g1 | |
29860 | ldx [%g4+0x68],%g3 | |
29861 | std %f18,[%g4] | |
29862 | ldx [%g4],%g2 | |
29863 | cmp %g3,%g2 ! %f18 = 00ff0000 00000000 | |
29864 | bne %xcc,p0_freg_check_fail | |
29865 | mov 0xf18,%g1 | |
29866 | ldx [%g4+0x70],%g3 | |
29867 | std %f20,[%g4] | |
29868 | ldx [%g4],%g2 | |
29869 | cmp %g3,%g2 ! %f20 = 00940000 000000ff | |
29870 | bne %xcc,p0_freg_check_fail | |
29871 | mov 0xf20,%g1 | |
29872 | ldx [%g4+0x78],%g3 | |
29873 | std %f22,[%g4] | |
29874 | ldx [%g4],%g2 | |
29875 | cmp %g3,%g2 ! %f22 = 0000ffff 0000ff79 | |
29876 | bne %xcc,p0_freg_check_fail | |
29877 | mov 0xf22,%g1 | |
29878 | ldx [%g4+0x80],%g3 | |
29879 | std %f24,[%g4] | |
29880 | ldx [%g4],%g2 | |
29881 | cmp %g3,%g2 ! %f24 = ff000000 033488c7 | |
29882 | bne %xcc,p0_freg_check_fail | |
29883 | mov 0xf24,%g1 | |
29884 | ldx [%g4+0x88],%g3 | |
29885 | std %f26,[%g4] | |
29886 | ldx [%g4],%g2 | |
29887 | cmp %g3,%g2 ! %f26 = 03000000 00000000 | |
29888 | bne %xcc,p0_freg_check_fail | |
29889 | mov 0xf26,%g1 | |
29890 | ldx [%g4+0x90],%g3 | |
29891 | std %f28,[%g4] | |
29892 | ldx [%g4],%g2 | |
29893 | cmp %g3,%g2 ! %f28 = c7883403 0000ff00 | |
29894 | bne %xcc,p0_freg_check_fail | |
29895 | mov 0xf28,%g1 | |
29896 | ldx [%g4+0x98],%g3 | |
29897 | std %f30,[%g4] | |
29898 | ldx [%g4],%g2 | |
29899 | cmp %g3,%g2 ! %f30 = 000000c6 00001f41 | |
29900 | bne %xcc,p0_freg_check_fail | |
29901 | mov 0xf30,%g1 | |
29902 | ||
29903 | ! Check Point 143 completed | |
29904 | ||
29905 | ||
29906 | p0_label_716: | |
29907 | ! Mem[00000000211c0001] = ffff1a4c, %l5 = 0000000000000000 | |
29908 | ldstub [%o2+0x001],%l5 ! %l5 = 000000ff000000ff | |
29909 | ! Mem[0000000021800140] = 00001df6, %l1 = 000000000000ffff | |
29910 | ldstuba [%o3+0x140]%asi,%l1 ! %l1 = 00000000000000ff | |
29911 | ! Mem[0000000020800001] = ffff8470, %l5 = 00000000000000ff | |
29912 | ldstub [%o1+0x001],%l5 ! %l5 = 000000ff000000ff | |
29913 | ! %f6 = 0000ffff ffff0000, Mem[0000000010081400] = ff000000 0000ffff | |
29914 | stda %f6 ,[%i2+%g0]0x80 ! Mem[0000000010081400] = 0000ffff ffff0000 | |
29915 | ! %l4 = 000000ff, %l5 = 000000ff, Mem[0000000030141400] = 000000ff 00000000 | |
29916 | stda %l4,[%i5+%g0]0x89 ! Mem[0000000030141400] = 000000ff 000000ff | |
29917 | ! Mem[0000000030101408] = ff000000, %l4 = 00000000000000ff | |
29918 | ldstuba [%i4+%o4]0x81,%l4 ! %l4 = 000000ff000000ff | |
29919 | ! %l4 = 00000000000000ff, Mem[00000000300c1410] = 00000000 | |
29920 | stha %l4,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 00ff0000 | |
29921 | ! Mem[00000000100c1408] = 00000000, %l5 = 00000000000000ff | |
29922 | swapa [%i3+%o4]0x88,%l5 ! %l5 = 0000000000000000 | |
29923 | ! Mem[0000000030081410] = 0000ffff, %l5 = 0000000000000000 | |
29924 | swapa [%i2+%o5]0x81,%l5 ! %l5 = 000000000000ffff | |
29925 | ! Starting 10 instruction Load Burst | |
29926 | ! Mem[00000000211c0000] = ffff1a4c, %l2 = 00000000ff000000 | |
29927 | lduba [%o2+0x000]%asi,%l2 ! %l2 = 00000000000000ff | |
29928 | ||
29929 | p0_label_717: | |
29930 | ! Mem[00000000100c1408] = ff00000000009400, %f0 = ffffffff ffffffff | |
29931 | ldda [%i3+%o4]0x80,%f0 ! %f0 = ff000000 00009400 | |
29932 | ! Mem[0000000030041408] = 00000000, %l7 = 000000000000ff00 | |
29933 | ldsha [%i1+%o4]0x89,%l7 ! %l7 = 0000000000000000 | |
29934 | ! Mem[0000000010041410] = ffffffffffffffff, %f22 = 0000ffff 0000ff79 | |
29935 | ldda [%i1+0x010]%asi,%f22 ! %f22 = ffffffff ffffffff | |
29936 | ! Mem[0000000010041410] = ffffffff ffffffff, %l0 = 0000ff00, %l1 = 00000000 | |
29937 | ldda [%i1+%o5]0x88,%l0 ! %l0 = 00000000ffffffff 00000000ffffffff | |
29938 | ! Mem[0000000030101410] = ffffff00, %l7 = 0000000000000000 | |
29939 | lduwa [%i4+%o5]0x89,%l7 ! %l7 = 00000000ffffff00 | |
29940 | ! Mem[0000000010181410] = ff00000000009400, %f20 = 00940000 000000ff | |
29941 | ldda [%i6+%o5]0x80,%f20 ! %f20 = ff000000 00009400 | |
29942 | ! Mem[0000000010181408] = 00ff0000 00000000, %l2 = 000000ff, %l3 = 00000000 | |
29943 | ldda [%i6+%o4]0x88,%l2 ! %l2 = 0000000000000000 0000000000ff0000 | |
29944 | ! Mem[0000000010181400] = ffff0000, %l2 = 0000000000000000 | |
29945 | ldswa [%i6+0x000]%asi,%l2 ! %l2 = ffffffffffff0000 | |
29946 | ! Mem[0000000030001410] = 00ff0000, %l4 = 00000000000000ff | |
29947 | ldsba [%i0+%o5]0x89,%l4 ! %l4 = 0000000000000000 | |
29948 | ! Starting 10 instruction Store Burst | |
29949 | ! Mem[0000000021800180] = ffffe2ae, %l2 = ffffffffffff0000 | |
29950 | ldstub [%o3+0x180],%l2 ! %l2 = 000000ff000000ff | |
29951 | ||
29952 | p0_label_718: | |
29953 | ! %l4 = 0000000000000000, Mem[0000000030181410] = ff00000000000000 | |
29954 | stxa %l4,[%i6+%o5]0x81 ! Mem[0000000030181410] = 0000000000000000 | |
29955 | ! %l4 = 0000000000000000, Mem[00000000300c1400] = ffff0000 | |
29956 | stha %l4,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00000000 | |
29957 | ! %l7 = 00000000ffffff00, Mem[0000000010141408] = ff000000 | |
29958 | stwa %l7,[%i5+%o4]0x88 ! Mem[0000000010141408] = ffffff00 | |
29959 | ! Mem[0000000030141400] = 000000ff, %l1 = 00000000ffffffff | |
29960 | ldstuba [%i5+%g0]0x89,%l1 ! %l1 = 000000ff000000ff | |
29961 | ! %l0 = 00000000ffffffff, Mem[00000000100c1432] = 00000000 | |
29962 | sth %l0,[%i3+0x032] ! Mem[00000000100c1430] = 0000ffff | |
29963 | ! %l4 = 0000000000000000, Mem[0000000030001408] = 00000000 | |
29964 | stba %l4,[%i0+%o4]0x81 ! Mem[0000000030001408] = 00000000 | |
29965 | ! %f8 = 00000000 00000000, Mem[0000000010041418] = 00000000 00000000 | |
29966 | std %f8 ,[%i1+0x018] ! Mem[0000000010041418] = 00000000 00000000 | |
29967 | ! %f31 = 00001f41, Mem[0000000010041400] = 00000000 | |
29968 | sta %f31,[%i1+%g0]0x88 ! Mem[0000000010041400] = 00001f41 | |
29969 | ! %l7 = 00000000ffffff00, Mem[0000000010001400] = 03000000 | |
29970 | sth %l7,[%i0+%g0] ! Mem[0000000010001400] = ff000000 | |
29971 | ! Starting 10 instruction Load Burst | |
29972 | ! Mem[0000000010041400] = 00000000 00001f41, %l4 = 00000000, %l5 = 0000ffff | |
29973 | ldda [%i1+%g0]0x88,%l4 ! %l4 = 0000000000001f41 0000000000000000 | |
29974 | ||
29975 | p0_label_719: | |
29976 | ! Mem[0000000030041410] = 0000ffff, %l2 = 00000000000000ff | |
29977 | ldsha [%i1+%o5]0x89,%l2 ! %l2 = ffffffffffffffff | |
29978 | ! Mem[0000000010041400] = 00001f41, %l0 = 00000000ffffffff | |
29979 | lduwa [%i1+%g0]0x88,%l0 ! %l0 = 0000000000001f41 | |
29980 | ! Mem[0000000020800040] = ffff7379, %l1 = 00000000000000ff | |
29981 | ldsha [%o1+0x040]%asi,%l1 ! %l1 = ffffffffffffffff | |
29982 | ! Mem[0000000010101400] = 00ffffff, %l2 = ffffffffffffffff | |
29983 | ldswa [%i4+%g0]0x80,%l2 ! %l2 = 0000000000ffffff | |
29984 | ! Mem[0000000030181410] = 00000000 00000000, %l4 = 00001f41, %l5 = 00000000 | |
29985 | ldda [%i6+%o5]0x81,%l4 ! %l4 = 0000000000000000 0000000000000000 | |
29986 | ! Mem[0000000010101400] = 000000c6 ffffff00, %l2 = 00ffffff, %l3 = 00ff0000 | |
29987 | ldda [%i4+%g0]0x88,%l2 ! %l2 = 00000000ffffff00 00000000000000c6 | |
29988 | ! Mem[00000000100c142c] = ff000000, %l0 = 0000000000001f41 | |
29989 | lduw [%i3+0x02c],%l0 ! %l0 = 00000000ff000000 | |
29990 | ! Mem[0000000030041400] = ffff00ff, %f12 = 00940000 | |
29991 | lda [%i1+%g0]0x81,%f12 ! %f12 = ffff00ff | |
29992 | ! Mem[00000000300c1410] = 0000ff00, %l5 = 0000000000000000 | |
29993 | lduha [%i3+%o5]0x89,%l5 ! %l5 = 000000000000ff00 | |
29994 | ! Starting 10 instruction Store Burst | |
29995 | ! Mem[00000000300c1400] = 00000000, %l3 = 00000000000000c6 | |
29996 | swapa [%i3+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
29997 | ||
29998 | p0_label_720: | |
29999 | ! %f12 = ffff00ff 000000ff, %l4 = 0000000000000000 | |
30000 | ! Mem[0000000030041420] = f31200ff00ff0000 | |
30001 | add %i1,0x020,%g1 | |
30002 | stda %f12,[%g1+%l4]ASI_PST32_S ! Mem[0000000030041420] = f31200ff00ff0000 | |
30003 | ! %l6 = 00000000c7883403, Mem[0000000010141400] = ffffffff | |
30004 | stba %l6,[%i5+%g0]0x88 ! Mem[0000000010141400] = ffffff03 | |
30005 | ! Mem[0000000030181400] = 03000000, %l2 = 00000000ffffff00 | |
30006 | ldstuba [%i6+%g0]0x81,%l2 ! %l2 = 00000003000000ff | |
30007 | ! Mem[0000000010001400] = 000000ff, %l2 = 0000000000000003 | |
30008 | swapa [%i0+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
30009 | ! %f16 = ff000000 0000ffff 00ff0000 00000000 | |
30010 | ! %f20 = ff000000 00009400 ffffffff ffffffff | |
30011 | ! %f24 = ff000000 033488c7 03000000 00000000 | |
30012 | ! %f28 = c7883403 0000ff00 000000c6 00001f41 | |
30013 | stda %f16,[%i4]ASI_BLK_S ! Block Store to 0000000030101400 | |
30014 | ! Mem[00000000100c1400] = 000079ff, %l2 = 00000000000000ff | |
30015 | ldstuba [%i3+%g0]0x88,%l2 ! %l2 = 000000ff000000ff | |
30016 | ! %l7 = 00000000ffffff00, Mem[0000000010181418] = 79ff0000ffff0000, %asi = 80 | |
30017 | stxa %l7,[%i6+0x018]%asi ! Mem[0000000010181418] = 00000000ffffff00 | |
30018 | ! %l2 = 00000000000000ff, Mem[0000000020800000] = ffff8470 | |
30019 | stb %l2,[%o1+%g0] ! Mem[0000000020800000] = ffff8470 | |
30020 | ! %l7 = 00000000ffffff00, Mem[00000000100c1400] = ff790000 | |
30021 | stba %l7,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00790000 | |
30022 | ! Starting 10 instruction Load Burst | |
30023 | ! Mem[0000000030001408] = 00000000, %l5 = 000000000000ff00 | |
30024 | ldswa [%i0+%o4]0x81,%l5 ! %l5 = 0000000000000000 | |
30025 | ||
30026 | ! Check Point 144 for processor 0 | |
30027 | ||
30028 | set p0_check_pt_data_144,%g4 | |
30029 | rd %ccr,%g5 ! %g5 = 44 | |
30030 | ldx [%g4+0x08],%g2 | |
30031 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
30032 | bne %xcc,p0_reg_check_fail0 | |
30033 | mov 0xee0,%g1 | |
30034 | ldx [%g4+0x10],%g2 | |
30035 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
30036 | bne %xcc,p0_reg_check_fail1 | |
30037 | mov 0xee1,%g1 | |
30038 | ldx [%g4+0x18],%g2 | |
30039 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
30040 | bne %xcc,p0_reg_check_fail2 | |
30041 | mov 0xee2,%g1 | |
30042 | ldx [%g4+0x20],%g2 | |
30043 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
30044 | bne %xcc,p0_reg_check_fail4 | |
30045 | mov 0xee4,%g1 | |
30046 | ldx [%g4+0x28],%g2 | |
30047 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
30048 | bne %xcc,p0_reg_check_fail5 | |
30049 | mov 0xee5,%g1 | |
30050 | ldx [%g4+0x30],%g2 | |
30051 | cmp %l7,%g2 ! %l7 = 00000000ffffff00 | |
30052 | bne %xcc,p0_reg_check_fail7 | |
30053 | mov 0xee7,%g1 | |
30054 | ldx [%g4+0x38],%g3 | |
30055 | std %f0,[%g4] | |
30056 | ldx [%g4],%g2 | |
30057 | cmp %g3,%g2 ! %f0 = ff000000 00009400 | |
30058 | bne %xcc,p0_freg_check_fail | |
30059 | mov 0xf00,%g1 | |
30060 | ldx [%g4+0x40],%g3 | |
30061 | std %f2,[%g4] | |
30062 | ldx [%g4],%g2 | |
30063 | cmp %g3,%g2 ! %f2 = ff000000 00000003 | |
30064 | bne %xcc,p0_freg_check_fail | |
30065 | mov 0xf02,%g1 | |
30066 | ldx [%g4+0x48],%g3 | |
30067 | std %f4,[%g4] | |
30068 | ldx [%g4],%g2 | |
30069 | cmp %g3,%g2 ! %f4 = 00006421 00000000 | |
30070 | bne %xcc,p0_freg_check_fail | |
30071 | mov 0xf04,%g1 | |
30072 | ldx [%g4+0x50],%g3 | |
30073 | std %f12,[%g4] | |
30074 | ldx [%g4],%g2 | |
30075 | cmp %g3,%g2 ! %f12 = ffff00ff 000000ff | |
30076 | bne %xcc,p0_freg_check_fail | |
30077 | mov 0xf12,%g1 | |
30078 | ldx [%g4+0x58],%g3 | |
30079 | std %f20,[%g4] | |
30080 | ldx [%g4],%g2 | |
30081 | cmp %g3,%g2 ! %f20 = ff000000 00009400 | |
30082 | bne %xcc,p0_freg_check_fail | |
30083 | mov 0xf20,%g1 | |
30084 | ldx [%g4+0x60],%g3 | |
30085 | std %f22,[%g4] | |
30086 | ldx [%g4],%g2 | |
30087 | cmp %g3,%g2 ! %f22 = ffffffff ffffffff | |
30088 | bne %xcc,p0_freg_check_fail | |
30089 | mov 0xf22,%g1 | |
30090 | ||
30091 | ! Check Point 144 completed | |
30092 | ||
30093 | ||
30094 | p0_label_721: | |
30095 | ! Mem[0000000010041408] = 0000ff79, %l2 = 00000000000000ff | |
30096 | ldsha [%i1+%o4]0x80,%l2 ! %l2 = 0000000000000000 | |
30097 | ! Mem[00000000100c1410] = 00ff0000, %f6 = 0000ffff | |
30098 | lda [%i3+%o5]0x88,%f6 ! %f6 = 00ff0000 | |
30099 | ! Mem[000000001008141c] = 0000ff79, %l2 = 0000000000000000 | |
30100 | ldsha [%i2+0x01c]%asi,%l2 ! %l2 = 0000000000000000 | |
30101 | membar #Sync ! Added by membar checker (124) | |
30102 | ! Mem[0000000010101400] = 00ffffff, %f21 = 00009400 | |
30103 | lda [%i4+%g0]0x80,%f21 ! %f21 = 00ffffff | |
30104 | ! Mem[0000000030141408] = 00000003, %f28 = c7883403 | |
30105 | lda [%i5+%o4]0x89,%f28 ! %f28 = 00000003 | |
30106 | ! Mem[0000000010001410] = 00000000 0000ff00, %l0 = ff000000, %l1 = ffffffff | |
30107 | ldda [%i0+%o5]0x88,%l0 ! %l0 = 000000000000ff00 0000000000000000 | |
30108 | ! Mem[0000000010101410] = 0000000000000000, %f12 = ffff00ff 000000ff | |
30109 | ldda [%i4+0x010]%asi,%f12 ! %f12 = 00000000 00000000 | |
30110 | ! Mem[00000000100c1408] = ff000000 00009400, %l2 = 00000000, %l3 = 00000000 | |
30111 | ldda [%i3+%o4]0x80,%l2 ! %l2 = 00000000ff000000 0000000000009400 | |
30112 | ! Mem[00000000100c1410] = 0000ff00, %l4 = 0000000000000000 | |
30113 | lduha [%i3+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
30114 | ! Starting 10 instruction Store Burst | |
30115 | ! %l0 = 000000000000ff00, immed = fffff5e7, %y = 000000ff | |
30116 | sdiv %l0,-0xa19,%l1 ! %l1 = ffffffffe6bf2212 | |
30117 | mov %l0,%y ! %y = 0000ff00 | |
30118 | ||
30119 | p0_label_722: | |
30120 | ! Mem[0000000030081408] = 00000000, %l6 = 00000000c7883403 | |
30121 | swapa [%i2+%o4]0x89,%l6 ! %l6 = 0000000000000000 | |
30122 | ! %l2 = 00000000ff000000, Mem[00000000218001c1] = 9c9c2a00, %asi = 80 | |
30123 | stba %l2,[%o3+0x1c1]%asi ! Mem[00000000218001c0] = 9c002a00 | |
30124 | ! %l3 = 0000000000009400, Mem[00000000300c1408] = 000000ff | |
30125 | stba %l3,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 00000000 | |
30126 | ! Mem[0000000010181400] = ffff0000, %l5 = 0000000000000000 | |
30127 | ldstuba [%i6+%g0]0x80,%l5 ! %l5 = 000000ff000000ff | |
30128 | ! Mem[0000000010181400] = 0000ffff, %l2 = 00000000ff000000 | |
30129 | swapa [%i6+%g0]0x88,%l2 ! %l2 = 000000000000ffff | |
30130 | ! Mem[00000000100c1410] = 0000ff00, %l4 = 0000000000000000 | |
30131 | swapa [%i3+%o5]0x80,%l4 ! %l4 = 000000000000ff00 | |
30132 | ! %f18 = 00ff0000 00000000, Mem[00000000300c1400] = c6000000 ffffffff | |
30133 | stda %f18,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 00ff0000 00000000 | |
30134 | ! Mem[0000000020800001] = ffff8470, %l3 = 0000000000009400 | |
30135 | ldstub [%o1+0x001],%l3 ! %l3 = 000000ff000000ff | |
30136 | ! %l4 = 000000000000ff00, Mem[0000000010181408] = 00ff000000000000 | |
30137 | stxa %l4,[%i6+%o4]0x88 ! Mem[0000000010181408] = 000000000000ff00 | |
30138 | ! Starting 10 instruction Load Burst | |
30139 | ! Mem[0000000010081408] = 0000ff00, %l4 = 000000000000ff00 | |
30140 | ldsha [%i2+%o4]0x88,%l4 ! %l4 = ffffffffffffff00 | |
30141 | ||
30142 | p0_label_723: | |
30143 | ! Mem[0000000030181408] = ff000000f31200ff, %f18 = 00ff0000 00000000 | |
30144 | ldda [%i6+%o4]0x81,%f18 ! %f18 = ff000000 f31200ff | |
30145 | ! Mem[0000000030101400] = ffff0000000000ff, %f14 = ffffffff ffffffff | |
30146 | ldda [%i4+%g0]0x89,%f14 ! %f14 = ffff0000 000000ff | |
30147 | ! Mem[0000000010081408] = 0000ff00, %f23 = ffffffff | |
30148 | lda [%i2+%o4]0x88,%f23 ! %f23 = 0000ff00 | |
30149 | ! Mem[0000000030141410] = 00000000, %l5 = 00000000000000ff | |
30150 | ldswa [%i5+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
30151 | ! Mem[0000000030141408] = 0000000000000003, %f6 = 00ff0000 ffff0000 | |
30152 | ldda [%i5+%o4]0x89,%f6 ! %f6 = 00000000 00000003 | |
30153 | ! Mem[0000000010081430] = c7883403, %l3 = 00000000000000ff | |
30154 | lduwa [%i2+0x030]%asi,%l3 ! %l3 = 00000000c7883403 | |
30155 | ! Mem[0000000010101410] = 00000000, %l3 = 00000000c7883403 | |
30156 | lduba [%i4+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
30157 | ! Mem[0000000030141400] = ff000000 ff000000 03000000 00000000 | |
30158 | ! Mem[0000000030141410] = 00000000 ffffffff fc734517 000000ff | |
30159 | ! Mem[0000000030141420] = 1f41ff76 2164159c ffffffff 79ff0000 | |
30160 | ! Mem[0000000030141430] = ff000000 00009400 7827da3e 597bac10 | |
30161 | ldda [%i5]ASI_BLK_S,%f0 ! Block Load from 0000000030141400 | |
30162 | ! Mem[00000000201c0000] = ff009457, %l6 = 0000000000000000 | |
30163 | ldub [%o0+%g0],%l6 ! %l6 = 00000000000000ff | |
30164 | ! Starting 10 instruction Store Burst | |
30165 | ! %f18 = ff000000 f31200ff, %l5 = 0000000000000000 | |
30166 | ! Mem[0000000010101428] = ff00000000000003 | |
30167 | add %i4,0x028,%g1 | |
30168 | stda %f18,[%g1+%l5]ASI_PST16_PL ! Mem[0000000010101428] = ff00000000000003 | |
30169 | ||
30170 | p0_label_724: | |
30171 | ! %l1 = ffffffffe6bf2212, Mem[0000000030001408] = 0000000000009c15 | |
30172 | stxa %l1,[%i0+%o4]0x81 ! Mem[0000000030001408] = ffffffffe6bf2212 | |
30173 | ! %l6 = 00000000000000ff, Mem[0000000010181410] = 000000ff | |
30174 | stba %l6,[%i6+%o5]0x88 ! Mem[0000000010181410] = 000000ff | |
30175 | ! %f26 = 03000000 00000000, Mem[0000000030101408] = 0000ff00 00000000 | |
30176 | stda %f26,[%i4+%o4]0x89 ! Mem[0000000030101408] = 03000000 00000000 | |
30177 | ! Mem[000000001010141c] = 00000000, %l3 = 0000000000000000 | |
30178 | swap [%i4+0x01c],%l3 ! %l3 = 0000000000000000 | |
30179 | ! %l0 = 000000000000ff00, Mem[00000000100c1410] = 0000000000009400 | |
30180 | stxa %l0,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 000000000000ff00 | |
30181 | ! %f20 = ff000000 00ffffff, Mem[00000000100c1400] = 00790000 ff790000 | |
30182 | stda %f20,[%i3+%g0]0x80 ! Mem[00000000100c1400] = ff000000 00ffffff | |
30183 | ! Mem[0000000010041410] = ffffffff, %l5 = 0000000000000000 | |
30184 | lduba [%i1+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
30185 | ! Mem[0000000030181410] = 00000000, %l7 = 00000000ffffff00 | |
30186 | ldstuba [%i6+%o5]0x81,%l7 ! %l7 = 00000000000000ff | |
30187 | ! %l0 = 000000000000ff00, Mem[0000000010141400] = 03ffffff | |
30188 | stwa %l0,[%i5+%g0]0x80 ! Mem[0000000010141400] = 0000ff00 | |
30189 | ! Starting 10 instruction Load Burst | |
30190 | ! Mem[0000000010141408] = ffffff00, %l2 = 000000000000ffff | |
30191 | lduwa [%i5+%o4]0x88,%l2 ! %l2 = 00000000ffffff00 | |
30192 | ||
30193 | p0_label_725: | |
30194 | ! Mem[0000000021800040] = 00001df3, %l1 = ffffffffe6bf2212 | |
30195 | ldsh [%o3+0x040],%l1 ! %l1 = 0000000000000000 | |
30196 | ! Mem[0000000030181410] = 00000000000000ff, %l7 = 0000000000000000 | |
30197 | ldxa [%i6+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
30198 | ! Mem[0000000030101400] = ff0000000000ffff, %f18 = ff000000 f31200ff | |
30199 | ldda [%i4+%g0]0x81,%f18 ! %f18 = ff000000 0000ffff | |
30200 | ! Mem[0000000030181410] = 000000ff, %l1 = 0000000000000000 | |
30201 | ldsha [%i6+%o5]0x89,%l1 ! %l1 = 00000000000000ff | |
30202 | ! Mem[0000000010141424] = 00ff0000, %l0 = 000000000000ff00 | |
30203 | lduh [%i5+0x026],%l0 ! %l0 = 0000000000000000 | |
30204 | ! Mem[0000000030181408] = 000000ff, %l0 = 0000000000000000 | |
30205 | lduwa [%i6+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
30206 | ! Mem[0000000010001400] = 00000003, %l4 = ffffffffffffff00 | |
30207 | lduwa [%i0+%g0]0x88,%l4 ! %l4 = 0000000000000003 | |
30208 | ! Mem[00000000100c1408] = ff000000, %l0 = 00000000000000ff | |
30209 | lduwa [%i3+%o4]0x80,%l0 ! %l0 = 00000000ff000000 | |
30210 | ! Mem[00000000211c0000] = ffff1a4c, %l7 = 00000000000000ff | |
30211 | ldsba [%o2+0x000]%asi,%l7 ! %l7 = ffffffffffffffff | |
30212 | ! Starting 10 instruction Store Burst | |
30213 | ! Mem[0000000030141408] = 00000003, %l5 = 00000000000000ff | |
30214 | ldstuba [%i5+%o4]0x89,%l5 ! %l5 = 00000003000000ff | |
30215 | ||
30216 | ! Check Point 145 for processor 0 | |
30217 | ||
30218 | set p0_check_pt_data_145,%g4 | |
30219 | rd %ccr,%g5 ! %g5 = 44 | |
30220 | ldx [%g4+0x08],%g2 | |
30221 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
30222 | bne %xcc,p0_reg_check_fail0 | |
30223 | mov 0xee0,%g1 | |
30224 | ldx [%g4+0x10],%g2 | |
30225 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
30226 | bne %xcc,p0_reg_check_fail1 | |
30227 | mov 0xee1,%g1 | |
30228 | ldx [%g4+0x18],%g2 | |
30229 | cmp %l2,%g2 ! %l2 = 00000000ffffff00 | |
30230 | bne %xcc,p0_reg_check_fail2 | |
30231 | mov 0xee2,%g1 | |
30232 | ldx [%g4+0x20],%g2 | |
30233 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
30234 | bne %xcc,p0_reg_check_fail3 | |
30235 | mov 0xee3,%g1 | |
30236 | ldx [%g4+0x28],%g2 | |
30237 | cmp %l4,%g2 ! %l4 = 0000000000000003 | |
30238 | bne %xcc,p0_reg_check_fail4 | |
30239 | mov 0xee4,%g1 | |
30240 | ldx [%g4+0x30],%g2 | |
30241 | cmp %l5,%g2 ! %l5 = 0000000000000003 | |
30242 | bne %xcc,p0_reg_check_fail5 | |
30243 | mov 0xee5,%g1 | |
30244 | ldx [%g4+0x38],%g2 | |
30245 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
30246 | bne %xcc,p0_reg_check_fail6 | |
30247 | mov 0xee6,%g1 | |
30248 | ldx [%g4+0x40],%g2 | |
30249 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
30250 | bne %xcc,p0_reg_check_fail7 | |
30251 | mov 0xee7,%g1 | |
30252 | ldx [%g4+0x48],%g3 | |
30253 | std %f0,[%g4] | |
30254 | ldx [%g4],%g2 | |
30255 | cmp %g3,%g2 ! %f0 = ff000000 ff000000 | |
30256 | bne %xcc,p0_freg_check_fail | |
30257 | mov 0xf00,%g1 | |
30258 | ldx [%g4+0x50],%g3 | |
30259 | std %f2,[%g4] | |
30260 | ldx [%g4],%g2 | |
30261 | cmp %g3,%g2 ! %f2 = 03000000 00000000 | |
30262 | bne %xcc,p0_freg_check_fail | |
30263 | mov 0xf02,%g1 | |
30264 | ldx [%g4+0x58],%g3 | |
30265 | std %f4,[%g4] | |
30266 | ldx [%g4],%g2 | |
30267 | cmp %g3,%g2 ! %f4 = 00000000 ffffffff | |
30268 | bne %xcc,p0_freg_check_fail | |
30269 | mov 0xf04,%g1 | |
30270 | ldx [%g4+0x60],%g3 | |
30271 | std %f6,[%g4] | |
30272 | ldx [%g4],%g2 | |
30273 | cmp %g3,%g2 ! %f6 = fc734517 000000ff | |
30274 | bne %xcc,p0_freg_check_fail | |
30275 | mov 0xf06,%g1 | |
30276 | ldx [%g4+0x68],%g3 | |
30277 | std %f8,[%g4] | |
30278 | ldx [%g4],%g2 | |
30279 | cmp %g3,%g2 ! %f8 = 1f41ff76 2164159c | |
30280 | bne %xcc,p0_freg_check_fail | |
30281 | mov 0xf08,%g1 | |
30282 | ldx [%g4+0x70],%g3 | |
30283 | std %f10,[%g4] | |
30284 | ldx [%g4],%g2 | |
30285 | cmp %g3,%g2 ! %f10 = ffffffff 79ff0000 | |
30286 | bne %xcc,p0_freg_check_fail | |
30287 | mov 0xf10,%g1 | |
30288 | ldx [%g4+0x78],%g3 | |
30289 | std %f12,[%g4] | |
30290 | ldx [%g4],%g2 | |
30291 | cmp %g3,%g2 ! %f12 = ff000000 00009400 | |
30292 | bne %xcc,p0_freg_check_fail | |
30293 | mov 0xf12,%g1 | |
30294 | ldx [%g4+0x80],%g3 | |
30295 | std %f14,[%g4] | |
30296 | ldx [%g4],%g2 | |
30297 | cmp %g3,%g2 ! %f14 = 7827da3e 597bac10 | |
30298 | bne %xcc,p0_freg_check_fail | |
30299 | mov 0xf14,%g1 | |
30300 | ldx [%g4+0x88],%g3 | |
30301 | std %f18,[%g4] | |
30302 | ldx [%g4],%g2 | |
30303 | cmp %g3,%g2 ! %f18 = ff000000 0000ffff | |
30304 | bne %xcc,p0_freg_check_fail | |
30305 | mov 0xf18,%g1 | |
30306 | ldx [%g4+0x90],%g3 | |
30307 | std %f20,[%g4] | |
30308 | ldx [%g4],%g2 | |
30309 | cmp %g3,%g2 ! %f20 = ff000000 00ffffff | |
30310 | bne %xcc,p0_freg_check_fail | |
30311 | mov 0xf20,%g1 | |
30312 | ldx [%g4+0x98],%g3 | |
30313 | std %f22,[%g4] | |
30314 | ldx [%g4],%g2 | |
30315 | cmp %g3,%g2 ! %f22 = ffffffff 0000ff00 | |
30316 | bne %xcc,p0_freg_check_fail | |
30317 | mov 0xf22,%g1 | |
30318 | ldx [%g4+0xa0],%g3 | |
30319 | std %f28,[%g4] | |
30320 | ldx [%g4],%g2 | |
30321 | cmp %g3,%g2 ! %f28 = 00000003 0000ff00 | |
30322 | bne %xcc,p0_freg_check_fail | |
30323 | mov 0xf28,%g1 | |
30324 | ||
30325 | ! Check Point 145 completed | |
30326 | ||
30327 | ||
30328 | p0_label_726: | |
30329 | ! %l6 = 00000000000000ff, Mem[0000000010041400] = 411f0000 | |
30330 | stwa %l6,[%i1+%g0]0x80 ! Mem[0000000010041400] = 000000ff | |
30331 | ! Mem[0000000030101400] = ff000000, %l4 = 0000000000000003 | |
30332 | ldstuba [%i4+%g0]0x81,%l4 ! %l4 = 000000ff000000ff | |
30333 | ! Mem[0000000010141418] = 000079ff000000ff, %l4 = 00000000000000ff, %l7 = ffffffffffffffff | |
30334 | add %i5,0x18,%g1 | |
30335 | casxa [%g1]0x80,%l4,%l7 ! %l7 = 000079ff000000ff | |
30336 | ! %l1 = 00000000000000ff, Mem[0000000020800001] = ffff8470 | |
30337 | stb %l1,[%o1+0x001] ! Mem[0000000020800000] = ffff8470 | |
30338 | ! %l6 = 00000000000000ff, Mem[00000000100c1408] = 000000ff | |
30339 | stha %l6,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 000000ff | |
30340 | ! Mem[0000000010141426] = 00ff0000, %l3 = 0000000000000000 | |
30341 | ldstuba [%i5+0x026]%asi,%l3 ! %l3 = 00000000000000ff | |
30342 | ! Mem[0000000030181408] = ff000000, %l5 = 0000000000000003 | |
30343 | ldstuba [%i6+%o4]0x81,%l5 ! %l5 = 000000ff000000ff | |
30344 | ! Mem[0000000010081400] = ffff0000, %l2 = 00000000ffffff00 | |
30345 | swapa [%i2+%g0]0x88,%l2 ! %l2 = 00000000ffff0000 | |
30346 | ! %f0 = ff000000 ff000000 03000000 00000000 | |
30347 | ! %f4 = 00000000 ffffffff fc734517 000000ff | |
30348 | ! %f8 = 1f41ff76 2164159c ffffffff 79ff0000 | |
30349 | ! %f12 = ff000000 00009400 7827da3e 597bac10 | |
30350 | stda %f0,[%i0]ASI_BLK_AIUP ! Block Store to 0000000010001400 | |
30351 | ! Starting 10 instruction Load Burst | |
30352 | ! Mem[0000000030081410] = 00000000, %l1 = 00000000000000ff | |
30353 | lduba [%i2+%o5]0x89,%l1 ! %l1 = 0000000000000000 | |
30354 | ||
30355 | p0_label_727: | |
30356 | ! Mem[0000000010141400] = 00ff0000, %l7 = 000079ff000000ff | |
30357 | ldswa [%i5+%g0]0x88,%l7 ! %l7 = 0000000000ff0000 | |
30358 | ! Mem[0000000030001408] = ffffffff, %l5 = 00000000000000ff | |
30359 | ldswa [%i0+%o4]0x81,%l5 ! %l5 = ffffffffffffffff | |
30360 | ! Mem[0000000030041408] = 00000000, %l4 = 00000000000000ff | |
30361 | ldsba [%i1+%o4]0x89,%l4 ! %l4 = 0000000000000000 | |
30362 | ! Mem[0000000010041408] = 79ff0000, %l6 = 00000000000000ff | |
30363 | ldsba [%i1+%o4]0x88,%l6 ! %l6 = 0000000000000000 | |
30364 | ! Mem[0000000010101408] = 0000ff00, %l6 = 0000000000000000 | |
30365 | lduha [%i4+%o4]0x88,%l6 ! %l6 = 000000000000ff00 | |
30366 | ! Mem[0000000030141408] = 000000ff, %l2 = 00000000ffff0000 | |
30367 | ldsha [%i5+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
30368 | ! Mem[0000000010081400] = 00ffffff, %l2 = 00000000000000ff | |
30369 | ldsha [%i2+%g0]0x80,%l2 ! %l2 = 00000000000000ff | |
30370 | ! Mem[0000000020800040] = ffff7379, %l7 = 0000000000ff0000 | |
30371 | ldsha [%o1+0x040]%asi,%l7 ! %l7 = ffffffffffffffff | |
30372 | ! Mem[0000000030041400] = ff00ffff, %l1 = 0000000000000000 | |
30373 | ldsha [%i1+%g0]0x89,%l1 ! %l1 = ffffffffffffffff | |
30374 | ! Starting 10 instruction Store Burst | |
30375 | ! %l6 = 0000ff00, %l7 = ffffffff, Mem[0000000010141410] = 00000000 ffffffff | |
30376 | stda %l6,[%i5+%o5]0x80 ! Mem[0000000010141410] = 0000ff00 ffffffff | |
30377 | ||
30378 | p0_label_728: | |
30379 | ! Mem[0000000010101400] = 00ffffff, %l6 = 000000000000ff00 | |
30380 | swapa [%i4+%g0]0x80,%l6 ! %l6 = 0000000000ffffff | |
30381 | ! Mem[0000000010081408] = 00ff0000, %l0 = 00000000ff000000 | |
30382 | swapa [%i2+%o4]0x80,%l0 ! %l0 = 0000000000ff0000 | |
30383 | ! %f30 = 000000c6, Mem[0000000030041408] = 00000000 | |
30384 | sta %f30,[%i1+%o4]0x81 ! Mem[0000000030041408] = 000000c6 | |
30385 | ! Mem[0000000010081410] = 00940000, %l2 = 00000000000000ff | |
30386 | ldstuba [%i2+%o5]0x80,%l2 ! %l2 = 00000000000000ff | |
30387 | ! %l5 = ffffffffffffffff, Mem[0000000010041408] = 000000ff79ff0000 | |
30388 | stxa %l5,[%i1+%o4]0x88 ! Mem[0000000010041408] = ffffffffffffffff | |
30389 | ! %l6 = 0000000000ffffff, Mem[00000000300c1408] = 0300000000000000 | |
30390 | stxa %l6,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 0000000000ffffff | |
30391 | ! Mem[00000000100c1400] = 000000ff, %l4 = 0000000000000000 | |
30392 | swapa [%i3+%g0]0x88,%l4 ! %l4 = 00000000000000ff | |
30393 | ! Mem[0000000030041408] = c6000000, %l4 = 00000000000000ff | |
30394 | ldstuba [%i1+%o4]0x89,%l4 ! %l4 = 00000000000000ff | |
30395 | ! %l1 = ffffffffffffffff, Mem[0000000010041408] = ffffffffffffffff | |
30396 | stxa %l1,[%i1+%o4]0x80 ! Mem[0000000010041408] = ffffffffffffffff | |
30397 | ! Starting 10 instruction Load Burst | |
30398 | ! Mem[0000000010101408] = 00ff0000, %f22 = ffffffff | |
30399 | lda [%i4+%o4]0x80,%f22 ! %f22 = 00ff0000 | |
30400 | ||
30401 | p0_label_729: | |
30402 | ! Mem[0000000030101400] = 000000ff, %l3 = 0000000000000000 | |
30403 | lduba [%i4+%g0]0x89,%l3 ! %l3 = 00000000000000ff | |
30404 | membar #Sync ! Added by membar checker (125) | |
30405 | ! Mem[0000000010181400] = 000000ff 000000ff 00ff0000 00000000 | |
30406 | ! Mem[0000000010181410] = ff000000 00009400 00000000 ffffff00 | |
30407 | ! Mem[0000000010181420] = 000000ff 00000000 00000000 00000003 | |
30408 | ! Mem[0000000010181430] = 00ff0000 033488c7 411f0000 c6000000 | |
30409 | ldda [%i6]ASI_BLK_P,%f0 ! Block Load from 0000000010181400 | |
30410 | ! Mem[0000000010101408] = 0000ff00, %l0 = 0000000000ff0000 | |
30411 | ldswa [%i4+%o4]0x88,%l0 ! %l0 = 000000000000ff00 | |
30412 | ! Mem[0000000010001408] = 0000000000000003, %f24 = ff000000 033488c7 | |
30413 | ldda [%i0+%o4]0x88,%f24 ! %f24 = 00000000 00000003 | |
30414 | ! Mem[00000000100c1400] = 0000000000ffffff, %l4 = 0000000000000000 | |
30415 | ldx [%i3+%g0],%l4 ! %l4 = 0000000000ffffff | |
30416 | ! Mem[00000000300c1410] = 0000ff00, %l3 = 00000000000000ff | |
30417 | lduba [%i3+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
30418 | ! Mem[0000000010101410] = 0000000000000000, %f16 = ff000000 0000ffff | |
30419 | ldda [%i4+%o5]0x88,%f16 ! %f16 = 00000000 00000000 | |
30420 | ! Mem[00000000300c1408] = 00ffffff, %l0 = 000000000000ff00 | |
30421 | ldsba [%i3+%o4]0x89,%l0 ! %l0 = ffffffffffffffff | |
30422 | ! Mem[0000000010081400] = 00ffffff, %f16 = 00000000 | |
30423 | lda [%i2+%g0]0x80,%f16 ! %f16 = 00ffffff | |
30424 | ! Starting 10 instruction Store Burst | |
30425 | ! Mem[0000000030181400] = ff000000, %l5 = ffffffffffffffff | |
30426 | swapa [%i6+%g0]0x81,%l5 ! %l5 = 00000000ff000000 | |
30427 | ||
30428 | p0_label_730: | |
30429 | ! Mem[00000000100c1404] = 00ffffff, %l3 = 0000000000000000 | |
30430 | swap [%i3+0x004],%l3 ! %l3 = 0000000000ffffff | |
30431 | ! %f27 = 00000000, Mem[00000000300c1400] = 0000ff00 | |
30432 | sta %f27,[%i3+%g0]0x89 ! Mem[00000000300c1400] = 00000000 | |
30433 | ! Mem[0000000010141408] = ffffff00, %l3 = 0000000000ffffff | |
30434 | ldstuba [%i5+%o4]0x88,%l3 ! %l3 = 00000000000000ff | |
30435 | ! Mem[00000000100c1400] = 00000000, %l3 = 0000000000000000 | |
30436 | swapa [%i3+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
30437 | ! Mem[0000000030141410] = 00000000, %l5 = 00000000ff000000 | |
30438 | ldstuba [%i5+%o5]0x89,%l5 ! %l5 = 00000000000000ff | |
30439 | membar #Sync ! Added by membar checker (126) | |
30440 | ! %l2 = 0000000000000000, Mem[0000000010181408] = 000000000000ff00 | |
30441 | stxa %l2,[%i6+%o4]0x88 ! Mem[0000000010181408] = 0000000000000000 | |
30442 | ! Mem[0000000010181400] = ff000000, %l2 = 0000000000000000 | |
30443 | ldstuba [%i6+%g0]0x88,%l2 ! %l2 = 00000000000000ff | |
30444 | ! Mem[0000000010101408] = 0000ff00, %f25 = 00000003 | |
30445 | lda [%i4+%o4]0x88,%f25 ! %f25 = 0000ff00 | |
30446 | ! %f30 = 000000c6 00001f41, Mem[0000000030181410] = ff000000 00000000 | |
30447 | stda %f30,[%i6+%o5]0x81 ! Mem[0000000030181410] = 000000c6 00001f41 | |
30448 | ! Starting 10 instruction Load Burst | |
30449 | ! Mem[00000000218001c0] = 9c002a00, %l4 = 0000000000ffffff | |
30450 | ldsb [%o3+0x1c0],%l4 ! %l4 = ffffffffffffff9c | |
30451 | ||
30452 | ! Check Point 146 for processor 0 | |
30453 | ||
30454 | set p0_check_pt_data_146,%g4 | |
30455 | rd %ccr,%g5 ! %g5 = 44 | |
30456 | ldx [%g4+0x08],%g2 | |
30457 | cmp %l0,%g2 ! %l0 = ffffffffffffffff | |
30458 | bne %xcc,p0_reg_check_fail0 | |
30459 | mov 0xee0,%g1 | |
30460 | ldx [%g4+0x10],%g2 | |
30461 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
30462 | bne %xcc,p0_reg_check_fail1 | |
30463 | mov 0xee1,%g1 | |
30464 | ldx [%g4+0x18],%g2 | |
30465 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
30466 | bne %xcc,p0_reg_check_fail2 | |
30467 | mov 0xee2,%g1 | |
30468 | ldx [%g4+0x20],%g2 | |
30469 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
30470 | bne %xcc,p0_reg_check_fail3 | |
30471 | mov 0xee3,%g1 | |
30472 | ldx [%g4+0x28],%g2 | |
30473 | cmp %l4,%g2 ! %l4 = ffffffffffffff9c | |
30474 | bne %xcc,p0_reg_check_fail4 | |
30475 | mov 0xee4,%g1 | |
30476 | ldx [%g4+0x30],%g2 | |
30477 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
30478 | bne %xcc,p0_reg_check_fail5 | |
30479 | mov 0xee5,%g1 | |
30480 | ldx [%g4+0x38],%g2 | |
30481 | cmp %l6,%g2 ! %l6 = 0000000000ffffff | |
30482 | bne %xcc,p0_reg_check_fail6 | |
30483 | mov 0xee6,%g1 | |
30484 | ldx [%g4+0x40],%g2 | |
30485 | cmp %l7,%g2 ! %l7 = ffffffffffffffff | |
30486 | bne %xcc,p0_reg_check_fail7 | |
30487 | mov 0xee7,%g1 | |
30488 | ldx [%g4+0x48],%g3 | |
30489 | std %f0,[%g4] | |
30490 | ldx [%g4],%g2 | |
30491 | cmp %g3,%g2 ! %f0 = 000000ff 000000ff | |
30492 | bne %xcc,p0_freg_check_fail | |
30493 | mov 0xf00,%g1 | |
30494 | ldx [%g4+0x50],%g3 | |
30495 | std %f2,[%g4] | |
30496 | ldx [%g4],%g2 | |
30497 | cmp %g3,%g2 ! %f2 = 00ff0000 00000000 | |
30498 | bne %xcc,p0_freg_check_fail | |
30499 | mov 0xf02,%g1 | |
30500 | ldx [%g4+0x58],%g3 | |
30501 | std %f4,[%g4] | |
30502 | ldx [%g4],%g2 | |
30503 | cmp %g3,%g2 ! %f4 = ff000000 00009400 | |
30504 | bne %xcc,p0_freg_check_fail | |
30505 | mov 0xf04,%g1 | |
30506 | ldx [%g4+0x60],%g3 | |
30507 | std %f6,[%g4] | |
30508 | ldx [%g4],%g2 | |
30509 | cmp %g3,%g2 ! %f6 = 00000000 ffffff00 | |
30510 | bne %xcc,p0_freg_check_fail | |
30511 | mov 0xf06,%g1 | |
30512 | ldx [%g4+0x68],%g3 | |
30513 | std %f8,[%g4] | |
30514 | ldx [%g4],%g2 | |
30515 | cmp %g3,%g2 ! %f8 = 000000ff 00000000 | |
30516 | bne %xcc,p0_freg_check_fail | |
30517 | mov 0xf08,%g1 | |
30518 | ldx [%g4+0x70],%g3 | |
30519 | std %f10,[%g4] | |
30520 | ldx [%g4],%g2 | |
30521 | cmp %g3,%g2 ! %f10 = 00000000 00000003 | |
30522 | bne %xcc,p0_freg_check_fail | |
30523 | mov 0xf10,%g1 | |
30524 | ldx [%g4+0x78],%g3 | |
30525 | std %f12,[%g4] | |
30526 | ldx [%g4],%g2 | |
30527 | cmp %g3,%g2 ! %f12 = 00ff0000 033488c7 | |
30528 | bne %xcc,p0_freg_check_fail | |
30529 | mov 0xf12,%g1 | |
30530 | ldx [%g4+0x80],%g3 | |
30531 | std %f14,[%g4] | |
30532 | ldx [%g4],%g2 | |
30533 | cmp %g3,%g2 ! %f14 = 411f0000 c6000000 | |
30534 | bne %xcc,p0_freg_check_fail | |
30535 | mov 0xf14,%g1 | |
30536 | ldx [%g4+0x88],%g3 | |
30537 | std %f16,[%g4] | |
30538 | ldx [%g4],%g2 | |
30539 | cmp %g3,%g2 ! %f16 = 00ffffff 00000000 | |
30540 | bne %xcc,p0_freg_check_fail | |
30541 | mov 0xf16,%g1 | |
30542 | ldx [%g4+0x90],%g3 | |
30543 | std %f22,[%g4] | |
30544 | ldx [%g4],%g2 | |
30545 | cmp %g3,%g2 ! %f22 = 00ff0000 0000ff00 | |
30546 | bne %xcc,p0_freg_check_fail | |
30547 | mov 0xf22,%g1 | |
30548 | ldx [%g4+0x98],%g3 | |
30549 | std %f24,[%g4] | |
30550 | ldx [%g4],%g2 | |
30551 | cmp %g3,%g2 ! %f24 = 00000000 0000ff00 | |
30552 | bne %xcc,p0_freg_check_fail | |
30553 | mov 0xf24,%g1 | |
30554 | ||
30555 | ! Check Point 146 completed | |
30556 | ||
30557 | ||
30558 | p0_label_731: | |
30559 | ! Mem[0000000010101408] = 0000ff00, %f7 = ffffff00 | |
30560 | lda [%i4+%o4]0x88,%f7 ! %f7 = 0000ff00 | |
30561 | ! Mem[0000000030001408] = ffffffff, %l7 = ffffffffffffffff | |
30562 | lduba [%i0+%o4]0x81,%l7 ! %l7 = 00000000000000ff | |
30563 | ! Mem[00000000300c1410] = 00ff000000009400, %l1 = ffffffffffffffff | |
30564 | ldxa [%i3+%o5]0x81,%l1 ! %l1 = 00ff000000009400 | |
30565 | ! %l6 = 00ffffff, %l7 = 000000ff, Mem[0000000030101410] = 000000ff 00940000 | |
30566 | stda %l6,[%i4+%o5]0x89 ! Mem[0000000030101410] = 00ffffff 000000ff | |
30567 | ! Mem[00000000300c1400] = 0000000000000000, %l6 = 0000000000ffffff | |
30568 | ldxa [%i3+%g0]0x89,%l6 ! %l6 = 0000000000000000 | |
30569 | ! Mem[0000000010101410] = 00000000, %l3 = 0000000000000000 | |
30570 | ldswa [%i4+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
30571 | ! Mem[0000000010101410] = 00000000, %l4 = ffffffffffffff9c | |
30572 | ldsba [%i4+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
30573 | ! Mem[000000001008140c] = 00000000, %l5 = 0000000000000000 | |
30574 | lduha [%i2+0x00c]%asi,%l5 ! %l5 = 0000000000000000 | |
30575 | ! Mem[0000000010101408] = 00ff0000 00000000, %l0 = ffffffff, %l1 = 00009400 | |
30576 | ldda [%i4+%o4]0x80,%l0 ! %l0 = 0000000000ff0000 0000000000000000 | |
30577 | ! Starting 10 instruction Store Burst | |
30578 | ! %l7 = 00000000000000ff, Mem[0000000010101408] = 00ff0000 | |
30579 | stw %l7,[%i4+%o4] ! Mem[0000000010101408] = 000000ff | |
30580 | ||
30581 | p0_label_732: | |
30582 | ! %f18 = ff000000 0000ffff, Mem[0000000030101410] = ffffff00 ff000000 | |
30583 | stda %f18,[%i4+%o5]0x81 ! Mem[0000000030101410] = ff000000 0000ffff | |
30584 | ! %l2 = 0000000000000000, Mem[0000000010181400] = ff0000ff | |
30585 | stha %l2,[%i6+%g0]0x88 ! Mem[0000000010181400] = ff000000 | |
30586 | ! %l7 = 00000000000000ff, Mem[0000000030101408] = 00000000 | |
30587 | stwa %l7,[%i4+%o4]0x81 ! Mem[0000000030101408] = 000000ff | |
30588 | ! Mem[0000000010141408] = ffffffff, %l2 = 0000000000000000 | |
30589 | ldstuba [%i5+%o4]0x80,%l2 ! %l2 = 000000ff000000ff | |
30590 | ! %l5 = 0000000000000000, Mem[0000000010101408] = 000000ff | |
30591 | stwa %l5,[%i4+%o4]0x80 ! Mem[0000000010101408] = 00000000 | |
30592 | ! Mem[00000000100c1430] = 0000ffff, %l3 = 0000000000000000, %asi = 80 | |
30593 | swapa [%i3+0x030]%asi,%l3 ! %l3 = 000000000000ffff | |
30594 | ! %l4 = 0000000000000000, Mem[00000000100c1410] = 00000000 | |
30595 | stwa %l4,[%i3+%o5]0x88 ! Mem[00000000100c1410] = 00000000 | |
30596 | ! Mem[00000000300c1400] = 00000000, %l1 = 0000000000000000 | |
30597 | ldstuba [%i3+%g0]0x81,%l1 ! %l1 = 00000000000000ff | |
30598 | ! %f22 = 00ff0000 0000ff00, Mem[0000000010181428] = 00000000 00000003 | |
30599 | std %f22,[%i6+0x028] ! Mem[0000000010181428] = 00ff0000 0000ff00 | |
30600 | ! Starting 10 instruction Load Burst | |
30601 | ! Mem[00000000100c1400] = 00000000, %l2 = 00000000000000ff | |
30602 | lduwa [%i3+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
30603 | ||
30604 | p0_label_733: | |
30605 | ! Mem[0000000010001410] = 00000000, %l7 = 00000000000000ff | |
30606 | lduba [%i0+%o5]0x88,%l7 ! %l7 = 0000000000000000 | |
30607 | ! Mem[0000000030181408] = 000000ff, %l6 = 0000000000000000 | |
30608 | ldsha [%i6+%o4]0x89,%l6 ! %l6 = 00000000000000ff | |
30609 | ! Mem[00000000100c1410] = 00000000 0000ff00, %l0 = 00ff0000, %l1 = 00000000 | |
30610 | ldd [%i3+%o5],%l0 ! %l0 = 0000000000000000 000000000000ff00 | |
30611 | ! Mem[0000000030181408] = ff000000, %l7 = 0000000000000000 | |
30612 | lduwa [%i6+%o4]0x81,%l7 ! %l7 = 00000000ff000000 | |
30613 | ! Mem[0000000010001410] = 00000000, %l0 = 0000000000000000 | |
30614 | ldsh [%i0+%o5],%l0 ! %l0 = 0000000000000000 | |
30615 | ! Mem[00000000211c0000] = ffff1a4c, %l5 = 0000000000000000 | |
30616 | lduha [%o2+0x000]%asi,%l5 ! %l5 = 000000000000ffff | |
30617 | ! Mem[00000000201c0000] = ff009457, %l2 = 0000000000000000 | |
30618 | lduba [%o0+0x000]%asi,%l2 ! %l2 = 00000000000000ff | |
30619 | ! Mem[0000000010041400] = 000000ff00000000, %f18 = ff000000 0000ffff | |
30620 | ldda [%i1+%g0]0x80,%f18 ! %f18 = 000000ff 00000000 | |
30621 | ! Mem[00000000300c1408] = ffffff00, %f31 = 00001f41 | |
30622 | lda [%i3+%o4]0x81,%f31 ! %f31 = ffffff00 | |
30623 | ! Starting 10 instruction Store Burst | |
30624 | ! Mem[0000000030141410] = ff000000, %l6 = 00000000000000ff | |
30625 | swapa [%i5+%o5]0x81,%l6 ! %l6 = 00000000ff000000 | |
30626 | ||
30627 | p0_label_734: | |
30628 | ! Mem[00000000300c1400] = 000000ff, %l3 = 000000000000ffff | |
30629 | ldstuba [%i3+%g0]0x89,%l3 ! %l3 = 000000ff000000ff | |
30630 | ! Mem[0000000010141400] = 0000ff00, %l7 = 00000000ff000000, %asi = 80 | |
30631 | swapa [%i5+0x000]%asi,%l7 ! %l7 = 000000000000ff00 | |
30632 | ! %l6 = 00000000ff000000, Mem[0000000010001400] = 000000ff | |
30633 | stha %l6,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 | |
30634 | ! Mem[0000000010101400] = 0000ff00, %f10 = 00000000 | |
30635 | lda [%i4+%g0]0x80,%f10 ! %f10 = 0000ff00 | |
30636 | ! %l3 = 00000000000000ff, Mem[00000000201c0000] = ff009457, %asi = 80 | |
30637 | stha %l3,[%o0+0x000]%asi ! Mem[00000000201c0000] = 00ff9457 | |
30638 | ! %f18 = 000000ff 00000000, Mem[0000000010101410] = 00000000 00000000 | |
30639 | stda %f18,[%i4+%o5]0x88 ! Mem[0000000010101410] = 000000ff 00000000 | |
30640 | ! %f0 = 000000ff 000000ff 00ff0000 00000000 | |
30641 | ! %f4 = ff000000 00009400 00000000 0000ff00 | |
30642 | ! %f8 = 000000ff 00000000 0000ff00 00000003 | |
30643 | ! %f12 = 00ff0000 033488c7 411f0000 c6000000 | |
30644 | stda %f0,[%i5]ASI_COMMIT_S ! Block Store to 0000000030141400 | |
30645 | ! Mem[0000000010081408] = ff000000, %l2 = 00000000000000ff | |
30646 | ldstuba [%i2+%o4]0x80,%l2 ! %l2 = 000000ff000000ff | |
30647 | ! Mem[0000000030001400] = ff000000, %l6 = 00000000ff000000 | |
30648 | lduwa [%i0+%g0]0x89,%l6 ! %l6 = 00000000ff000000 | |
30649 | ! Starting 10 instruction Load Burst | |
30650 | ! %l2 = 00000000000000ff, Mem[000000001000142e] = 79ff0000 | |
30651 | sth %l2,[%i0+0x02e] ! Mem[000000001000142c] = 79ff00ff | |
30652 | ||
30653 | p0_label_735: | |
30654 | ! Mem[0000000010081410] = ff940000000000ff, %f16 = 00ffffff 00000000 | |
30655 | ldd [%i2+%o5],%f16 ! %f16 = ff940000 000000ff | |
30656 | ! Mem[00000000100c1428] = f312ffff, %l3 = 00000000000000ff | |
30657 | ldsha [%i3+0x02a]%asi,%l3 ! %l3 = ffffffffffffffff | |
30658 | ! Mem[0000000010041410] = ffffffff, %l4 = 0000000000000000 | |
30659 | ldsba [%i1+%o5]0x88,%l4 ! %l4 = ffffffffffffffff | |
30660 | ! Mem[0000000030081400] = 033488c7ffff00ff, %l0 = 0000000000000000 | |
30661 | ldxa [%i2+%g0]0x89,%l0 ! %l0 = 033488c7ffff00ff | |
30662 | ! Mem[0000000030181408] = 000000ff, %l0 = 033488c7ffff00ff | |
30663 | ldswa [%i6+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
30664 | ! Mem[00000000201c0000] = 00ff9457, %l1 = 000000000000ff00 | |
30665 | ldsb [%o0+0x001],%l1 ! %l1 = ffffffffffffffff | |
30666 | ! Mem[0000000010001420] = 1f41ff76, %l6 = 00000000ff000000 | |
30667 | ldub [%i0+0x021],%l6 ! %l6 = 0000000000000041 | |
30668 | ! Mem[0000000010181410] = ff000000, %l0 = 00000000000000ff | |
30669 | ldswa [%i6+%o5]0x80,%l0 ! %l0 = ffffffffff000000 | |
30670 | ! Mem[0000000030041410] = 0000ffff, %l2 = 00000000000000ff | |
30671 | ldswa [%i1+%o5]0x89,%l2 ! %l2 = 000000000000ffff | |
30672 | ! Starting 10 instruction Store Burst | |
30673 | membar #Sync ! Added by membar checker (127) | |
30674 | ! %l2 = 000000000000ffff, Mem[0000000010141402] = ff000000, %asi = 80 | |
30675 | stha %l2,[%i5+0x002]%asi ! Mem[0000000010141400] = ff00ffff | |
30676 | ||
30677 | ! Check Point 147 for processor 0 | |
30678 | ||
30679 | set p0_check_pt_data_147,%g4 | |
30680 | rd %ccr,%g5 ! %g5 = 44 | |
30681 | ldx [%g4+0x08],%g2 | |
30682 | cmp %l0,%g2 ! %l0 = ffffffffff000000 | |
30683 | bne %xcc,p0_reg_check_fail0 | |
30684 | mov 0xee0,%g1 | |
30685 | ldx [%g4+0x10],%g2 | |
30686 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
30687 | bne %xcc,p0_reg_check_fail1 | |
30688 | mov 0xee1,%g1 | |
30689 | ldx [%g4+0x18],%g2 | |
30690 | cmp %l2,%g2 ! %l2 = 000000000000ffff | |
30691 | bne %xcc,p0_reg_check_fail2 | |
30692 | mov 0xee2,%g1 | |
30693 | ldx [%g4+0x20],%g2 | |
30694 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
30695 | bne %xcc,p0_reg_check_fail3 | |
30696 | mov 0xee3,%g1 | |
30697 | ldx [%g4+0x28],%g2 | |
30698 | cmp %l4,%g2 ! %l4 = ffffffffffffffff | |
30699 | bne %xcc,p0_reg_check_fail4 | |
30700 | mov 0xee4,%g1 | |
30701 | ldx [%g4+0x30],%g2 | |
30702 | cmp %l5,%g2 ! %l5 = 000000000000ffff | |
30703 | bne %xcc,p0_reg_check_fail5 | |
30704 | mov 0xee5,%g1 | |
30705 | ldx [%g4+0x38],%g2 | |
30706 | cmp %l6,%g2 ! %l6 = 0000000000000041 | |
30707 | bne %xcc,p0_reg_check_fail6 | |
30708 | mov 0xee6,%g1 | |
30709 | ldx [%g4+0x40],%g2 | |
30710 | cmp %l7,%g2 ! %l7 = 000000000000ff00 | |
30711 | bne %xcc,p0_reg_check_fail7 | |
30712 | mov 0xee7,%g1 | |
30713 | ldx [%g4+0x48],%g3 | |
30714 | std %f0,[%g4] | |
30715 | ldx [%g4],%g2 | |
30716 | cmp %g3,%g2 ! %f0 = 000000ff 000000ff | |
30717 | bne %xcc,p0_freg_check_fail | |
30718 | mov 0xf00,%g1 | |
30719 | ldx [%g4+0x50],%g3 | |
30720 | std %f6,[%g4] | |
30721 | ldx [%g4],%g2 | |
30722 | cmp %g3,%g2 ! %f6 = 00000000 0000ff00 | |
30723 | bne %xcc,p0_freg_check_fail | |
30724 | mov 0xf06,%g1 | |
30725 | ldx [%g4+0x58],%g3 | |
30726 | std %f10,[%g4] | |
30727 | ldx [%g4],%g2 | |
30728 | cmp %g3,%g2 ! %f10 = 0000ff00 00000003 | |
30729 | bne %xcc,p0_freg_check_fail | |
30730 | mov 0xf10,%g1 | |
30731 | ldx [%g4+0x60],%g3 | |
30732 | std %f16,[%g4] | |
30733 | ldx [%g4],%g2 | |
30734 | cmp %g3,%g2 ! %f16 = ff940000 000000ff | |
30735 | bne %xcc,p0_freg_check_fail | |
30736 | mov 0xf16,%g1 | |
30737 | ldx [%g4+0x68],%g3 | |
30738 | std %f18,[%g4] | |
30739 | ldx [%g4],%g2 | |
30740 | cmp %g3,%g2 ! %f18 = 000000ff 00000000 | |
30741 | bne %xcc,p0_freg_check_fail | |
30742 | mov 0xf18,%g1 | |
30743 | ldx [%g4+0x70],%g3 | |
30744 | std %f30,[%g4] | |
30745 | ldx [%g4],%g2 | |
30746 | cmp %g3,%g2 ! %f30 = 000000c6 ffffff00 | |
30747 | bne %xcc,p0_freg_check_fail | |
30748 | mov 0xf30,%g1 | |
30749 | ||
30750 | ! Check Point 147 completed | |
30751 | ||
30752 | ||
30753 | p0_label_736: | |
30754 | ! %l6 = 00000041, %l7 = 0000ff00, Mem[0000000010081408] = 000000ff 00000000 | |
30755 | stda %l6,[%i2+%o4]0x88 ! Mem[0000000010081408] = 00000041 0000ff00 | |
30756 | ! %l1 = ffffffffffffffff, Mem[00000000100c1408] = ff000000 | |
30757 | stha %l1,[%i3+%o4]0x80 ! Mem[00000000100c1408] = ffff0000 | |
30758 | ! Mem[0000000030101408] = ff000000, %l6 = 0000000000000041 | |
30759 | ldstuba [%i4+%o4]0x89,%l6 ! %l6 = 00000000000000ff | |
30760 | ! Mem[0000000030081408] = 033488c7, %l5 = 000000000000ffff | |
30761 | swapa [%i2+%o4]0x81,%l5 ! %l5 = 00000000033488c7 | |
30762 | ! Mem[0000000010001408] = 03000000, %l3 = ffffffffffffffff | |
30763 | swapa [%i0+%o4]0x80,%l3 ! %l3 = 0000000003000000 | |
30764 | ! Mem[0000000010081408] = 41000000, %l6 = 0000000000000000 | |
30765 | ldstuba [%i2+%o4]0x80,%l6 ! %l6 = 00000041000000ff | |
30766 | ! %l1 = ffffffffffffffff, Mem[0000000030081400] = ffff00ff | |
30767 | stwa %l1,[%i2+%g0]0x89 ! Mem[0000000030081400] = ffffffff | |
30768 | ! Mem[0000000010181410] = ff000000, %l7 = 000000000000ff00 | |
30769 | ldstuba [%i6+%o5]0x80,%l7 ! %l7 = 000000ff000000ff | |
30770 | ! %l5 = 00000000033488c7, Mem[0000000010141410] = ffffffff00ff0000 | |
30771 | stxa %l5,[%i5+%o5]0x88 ! Mem[0000000010141410] = 00000000033488c7 | |
30772 | ! Starting 10 instruction Load Burst | |
30773 | ! Mem[0000000010181410] = 000000ff, %l5 = 00000000033488c7 | |
30774 | lduwa [%i6+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
30775 | ||
30776 | p0_label_737: | |
30777 | ! Mem[0000000010081400] = 00ffffff, %l4 = ffffffffffffffff | |
30778 | ldsba [%i2+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
30779 | ! Mem[0000000030001410] = 00ff0000, %l3 = 0000000003000000 | |
30780 | lduwa [%i0+%o5]0x89,%l3 ! %l3 = 0000000000ff0000 | |
30781 | ! Mem[0000000010001400] = 00000000, %l7 = 00000000000000ff | |
30782 | ldswa [%i0+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
30783 | ! Mem[0000000030001408] = ffffffffe6bf2212, %f2 = 00ff0000 00000000 | |
30784 | ldda [%i0+%o4]0x81,%f2 ! %f2 = ffffffff e6bf2212 | |
30785 | ! Mem[0000000010101400] = 0000ff00, %l1 = ffffffffffffffff | |
30786 | lduha [%i4+%g0]0x80,%l1 ! %l1 = 0000000000000000 | |
30787 | ! Mem[0000000010001400] = 00000000, %l4 = 0000000000000000 | |
30788 | ldsha [%i0+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
30789 | ! Mem[0000000010101400] = 000000c6 00ff0000, %l0 = ff000000, %l1 = 00000000 | |
30790 | ldda [%i4+%g0]0x88,%l0 ! %l0 = 0000000000ff0000 00000000000000c6 | |
30791 | ! Mem[0000000010081410] = ff000000000094ff, %l4 = 0000000000000000 | |
30792 | ldxa [%i2+%o5]0x88,%l4 ! %l4 = ff000000000094ff | |
30793 | ! Mem[0000000030181408] = 000000ff, %l7 = 0000000000000000 | |
30794 | ldsba [%i6+%o4]0x89,%l7 ! %l7 = ffffffffffffffff | |
30795 | ! Starting 10 instruction Store Burst | |
30796 | ! %l3 = 0000000000ff0000, Mem[0000000030101408] = ff0000ff00000003 | |
30797 | stxa %l3,[%i4+%o4]0x81 ! Mem[0000000030101408] = 0000000000ff0000 | |
30798 | ||
30799 | p0_label_738: | |
30800 | ! Mem[00000000100c1418] = 00000012, %l6 = 0000000000000041 | |
30801 | swap [%i3+0x018],%l6 ! %l6 = 0000000000000012 | |
30802 | ! %l0 = 00ff0000, %l1 = 000000c6, Mem[0000000010081410] = ff940000 000000ff | |
30803 | stda %l0,[%i2+%o5]0x80 ! Mem[0000000010081410] = 00ff0000 000000c6 | |
30804 | ! %l3 = 0000000000ff0000, Mem[0000000010141410] = 033488c7 | |
30805 | stba %l3,[%i5+%o5]0x88 ! Mem[0000000010141410] = 03348800 | |
30806 | ! Mem[00000000100c1408] = ffff0000, %l3 = 0000000000ff0000 | |
30807 | ldstuba [%i3+0x008]%asi,%l3 ! %l3 = 000000ff000000ff | |
30808 | ! %f26 = 03000000 00000000, Mem[00000000300c1400] = ff000000 00000000 | |
30809 | stda %f26,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 03000000 00000000 | |
30810 | ! Mem[0000000010001410] = 00000000, %l3 = 00000000000000ff | |
30811 | swapa [%i0+%o5]0x88,%l3 ! %l3 = 0000000000000000 | |
30812 | ! Mem[0000000010001408] = ffffffff, %l6 = 0000000000000012 | |
30813 | swapa [%i0+%o4]0x80,%l6 ! %l6 = 00000000ffffffff | |
30814 | ! Mem[0000000010101420] = c7883403, %l5 = 00000000000000ff | |
30815 | swap [%i4+0x020],%l5 ! %l5 = 00000000c7883403 | |
30816 | ! Mem[0000000030141410] = ff000000, %l7 = ffffffffffffffff | |
30817 | ldstuba [%i5+%o5]0x81,%l7 ! %l7 = 000000ff000000ff | |
30818 | ! Starting 10 instruction Load Burst | |
30819 | ! Mem[0000000010081410] = 00ff0000, %l2 = 000000000000ffff | |
30820 | ldswa [%i2+%o5]0x80,%l2 ! %l2 = 0000000000ff0000 | |
30821 | ||
30822 | p0_label_739: | |
30823 | ! Mem[0000000030041400] = ffff00ff, %l6 = 00000000ffffffff | |
30824 | ldswa [%i1+%g0]0x81,%l6 ! %l6 = ffffffffffff00ff | |
30825 | ! Mem[0000000010081410] = 00ff0000, %l4 = ff000000000094ff | |
30826 | lduwa [%i2+%o5]0x80,%l4 ! %l4 = 0000000000ff0000 | |
30827 | ! Mem[00000000300c1400] = 00000003, %l0 = 0000000000ff0000 | |
30828 | lduha [%i3+%g0]0x89,%l0 ! %l0 = 0000000000000003 | |
30829 | ! Mem[0000000010081400] = ffffff00, %l4 = 0000000000ff0000 | |
30830 | lduba [%i2+%g0]0x88,%l4 ! %l4 = 0000000000000000 | |
30831 | ! Mem[0000000010081430] = c7883403, %l5 = 00000000c7883403 | |
30832 | ldsh [%i2+0x032],%l5 ! %l5 = 0000000000003403 | |
30833 | ! Mem[0000000030181400] = ffffffff, %l4 = 0000000000000000 | |
30834 | lduha [%i6+%g0]0x81,%l4 ! %l4 = 000000000000ffff | |
30835 | ! Mem[00000000100c1410] = 00ff000000000000, %f6 = 00000000 0000ff00 | |
30836 | ldda [%i3+%o5]0x88,%f6 ! %f6 = 00ff0000 00000000 | |
30837 | ! Mem[00000000100c1400] = 00000000, %f16 = ff940000 | |
30838 | lda [%i3+%g0]0x88,%f16 ! %f16 = 00000000 | |
30839 | ! Mem[0000000010101400] = 0000ff00c6000000, %l5 = 0000000000003403 | |
30840 | ldxa [%i4+%g0]0x80,%l5 ! %l5 = 0000ff00c6000000 | |
30841 | ! Starting 10 instruction Store Burst | |
30842 | ! %f14 = 411f0000 c6000000, %l2 = 0000000000ff0000 | |
30843 | ! Mem[00000000300c1420] = 0000000000000000 | |
30844 | add %i3,0x020,%g1 | |
30845 | stda %f14,[%g1+%l2]ASI_PST8_S ! Mem[00000000300c1420] = 0000000000000000 | |
30846 | ||
30847 | p0_label_740: | |
30848 | ! %l0 = 0000000000000003, Mem[0000000010081400] = 00ffffff | |
30849 | stha %l0,[%i2+%g0]0x80 ! Mem[0000000010081400] = 0003ffff | |
30850 | ! %l5 = 0000ff00c6000000, Mem[0000000030101408] = 00000000 | |
30851 | stha %l5,[%i4+%o4]0x89 ! Mem[0000000030101408] = 00000000 | |
30852 | ! %l0 = 0000000000000003, Mem[0000000010001408] = 0000001200000000 | |
30853 | stxa %l0,[%i0+%o4]0x80 ! Mem[0000000010001408] = 0000000000000003 | |
30854 | ! Mem[000000001000140f] = 00000003, %l2 = 0000000000ff0000 | |
30855 | ldstuba [%i0+0x00f]%asi,%l2 ! %l2 = 00000003000000ff | |
30856 | ! Mem[00000000100c1408] = ffff0000, %l7 = 00000000000000ff | |
30857 | swapa [%i3+%o4]0x80,%l7 ! %l7 = 00000000ffff0000 | |
30858 | ! %f8 = 000000ff, Mem[0000000030081400] = ffffffff | |
30859 | sta %f8 ,[%i2+%g0]0x89 ! Mem[0000000030081400] = 000000ff | |
30860 | ! %l2 = 0000000000000003, Mem[0000000010181408] = 0000000000000000 | |
30861 | stxa %l2,[%i6+%o4]0x88 ! Mem[0000000010181408] = 0000000000000003 | |
30862 | ! Mem[0000000030081400] = 000000ff, %l7 = 00000000ffff0000 | |
30863 | swapa [%i2+%g0]0x89,%l7 ! %l7 = 00000000000000ff | |
30864 | ! %f24 = 00000000 0000ff00, %l0 = 0000000000000003 | |
30865 | ! Mem[0000000030041428] = 0000000000000003 | |
30866 | add %i1,0x028,%g1 | |
30867 | stda %f24,[%g1+%l0]ASI_PST16_S ! Mem[0000000030041428] = 000000000000ff00 | |
30868 | ! Starting 10 instruction Load Burst | |
30869 | ! Mem[0000000030081400] = 0000ffffc7883403, %f28 = 00000003 0000ff00 | |
30870 | ldda [%i2+%g0]0x81,%f28 ! %f28 = 0000ffff c7883403 | |
30871 | ||
30872 | ! Check Point 148 for processor 0 | |
30873 | ||
30874 | set p0_check_pt_data_148,%g4 | |
30875 | rd %ccr,%g5 ! %g5 = 44 | |
30876 | ldx [%g4+0x08],%g2 | |
30877 | cmp %l0,%g2 ! %l0 = 0000000000000003 | |
30878 | bne %xcc,p0_reg_check_fail0 | |
30879 | mov 0xee0,%g1 | |
30880 | ldx [%g4+0x10],%g2 | |
30881 | cmp %l1,%g2 ! %l1 = 00000000000000c6 | |
30882 | bne %xcc,p0_reg_check_fail1 | |
30883 | mov 0xee1,%g1 | |
30884 | ldx [%g4+0x18],%g2 | |
30885 | cmp %l2,%g2 ! %l2 = 0000000000000003 | |
30886 | bne %xcc,p0_reg_check_fail2 | |
30887 | mov 0xee2,%g1 | |
30888 | ldx [%g4+0x20],%g2 | |
30889 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
30890 | bne %xcc,p0_reg_check_fail3 | |
30891 | mov 0xee3,%g1 | |
30892 | ldx [%g4+0x28],%g2 | |
30893 | cmp %l4,%g2 ! %l4 = 000000000000ffff | |
30894 | bne %xcc,p0_reg_check_fail4 | |
30895 | mov 0xee4,%g1 | |
30896 | ldx [%g4+0x30],%g2 | |
30897 | cmp %l5,%g2 ! %l5 = 0000ff00c6000000 | |
30898 | bne %xcc,p0_reg_check_fail5 | |
30899 | mov 0xee5,%g1 | |
30900 | ldx [%g4+0x38],%g2 | |
30901 | cmp %l6,%g2 ! %l6 = ffffffffffff00ff | |
30902 | bne %xcc,p0_reg_check_fail6 | |
30903 | mov 0xee6,%g1 | |
30904 | ldx [%g4+0x40],%g2 | |
30905 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
30906 | bne %xcc,p0_reg_check_fail7 | |
30907 | mov 0xee7,%g1 | |
30908 | ldx [%g4+0x48],%g3 | |
30909 | std %f0,[%g4] | |
30910 | ldx [%g4],%g2 | |
30911 | cmp %g3,%g2 ! %f0 = 000000ff 000000ff | |
30912 | bne %xcc,p0_freg_check_fail | |
30913 | mov 0xf00,%g1 | |
30914 | ldx [%g4+0x50],%g3 | |
30915 | std %f2,[%g4] | |
30916 | ldx [%g4],%g2 | |
30917 | cmp %g3,%g2 ! %f2 = ffffffff e6bf2212 | |
30918 | bne %xcc,p0_freg_check_fail | |
30919 | mov 0xf02,%g1 | |
30920 | ldx [%g4+0x58],%g3 | |
30921 | std %f6,[%g4] | |
30922 | ldx [%g4],%g2 | |
30923 | cmp %g3,%g2 ! %f6 = 00ff0000 00000000 | |
30924 | bne %xcc,p0_freg_check_fail | |
30925 | mov 0xf06,%g1 | |
30926 | ldx [%g4+0x60],%g3 | |
30927 | std %f16,[%g4] | |
30928 | ldx [%g4],%g2 | |
30929 | cmp %g3,%g2 ! %f16 = 00000000 000000ff | |
30930 | bne %xcc,p0_freg_check_fail | |
30931 | mov 0xf16,%g1 | |
30932 | ldx [%g4+0x68],%g3 | |
30933 | std %f28,[%g4] | |
30934 | ldx [%g4],%g2 | |
30935 | cmp %g3,%g2 ! %f28 = 0000ffff c7883403 | |
30936 | bne %xcc,p0_freg_check_fail | |
30937 | mov 0xf28,%g1 | |
30938 | ||
30939 | ! Check Point 148 completed | |
30940 | ||
30941 | ||
30942 | p0_label_741: | |
30943 | ! Mem[0000000010141408] = ffffffff, %l7 = 00000000000000ff | |
30944 | ldsha [%i5+%o4]0x80,%l7 ! %l7 = ffffffffffffffff | |
30945 | ! Mem[00000000300c1408] = ffffff00, %l3 = 0000000000000000 | |
30946 | lduba [%i3+%o4]0x81,%l3 ! %l3 = 00000000000000ff | |
30947 | ! Mem[00000000201c0000] = 00ff9457, %l4 = 000000000000ffff | |
30948 | lduha [%o0+0x000]%asi,%l4 ! %l4 = 00000000000000ff | |
30949 | ! Mem[0000000030181410] = 000000c6, %f24 = 00000000 | |
30950 | lda [%i6+%o5]0x81,%f24 ! %f24 = 000000c6 | |
30951 | ! Mem[0000000030141400] = ff000000, %l0 = 0000000000000003 | |
30952 | lduha [%i5+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
30953 | ! Mem[00000000100c1410] = 00000000, %l4 = 00000000000000ff | |
30954 | lduwa [%i3+%o5]0x80,%l4 ! %l4 = 0000000000000000 | |
30955 | ! Mem[0000000010101408] = 00000000, %l4 = 0000000000000000 | |
30956 | lduha [%i4+%o4]0x80,%l4 ! %l4 = 0000000000000000 | |
30957 | ! Mem[0000000010081400] = ffff0300, %l4 = 0000000000000000 | |
30958 | lduwa [%i2+%g0]0x88,%l4 ! %l4 = 00000000ffff0300 | |
30959 | ! Mem[00000000211c0000] = ffff1a4c, %l7 = ffffffffffffffff | |
30960 | ldsba [%o2+0x001]%asi,%l7 ! %l7 = ffffffffffffffff | |
30961 | ! Starting 10 instruction Store Burst | |
30962 | ! Mem[0000000010141430] = 000000c6, %l7 = ffffffffffffffff | |
30963 | swap [%i5+0x030],%l7 ! %l7 = 00000000000000c6 | |
30964 | ||
30965 | p0_label_742: | |
30966 | ! %f6 = 00ff0000 00000000, Mem[0000000010181410] = 000000ff 00940000 | |
30967 | stda %f6 ,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00ff0000 00000000 | |
30968 | ! %l5 = 0000ff00c6000000, Mem[0000000010041400] = ff000000 | |
30969 | stwa %l5,[%i1+%g0]0x88 ! Mem[0000000010041400] = c6000000 | |
30970 | ! %l2 = 0000000000000003, Mem[00000000201c0000] = 00ff9457 | |
30971 | sth %l2,[%o0+%g0] ! Mem[00000000201c0000] = 00039457 | |
30972 | ! Mem[0000000010041408] = ffffffff, %l6 = ffffffffffff00ff | |
30973 | swapa [%i1+%o4]0x80,%l6 ! %l6 = 00000000ffffffff | |
30974 | ! %f24 = 000000c6 0000ff00, %l2 = 0000000000000003 | |
30975 | ! Mem[0000000010081438] = 000000c600001f41 | |
30976 | add %i2,0x038,%g1 | |
30977 | stda %f24,[%g1+%l2]ASI_PST32_PL ! Mem[0000000010081438] = 00ff0000c6000000 | |
30978 | ! Mem[00000000100c1400] = 00000000, %l7 = 00000000000000c6 | |
30979 | ldstuba [%i3+%g0]0x88,%l7 ! %l7 = 00000000000000ff | |
30980 | ! %l5 = 0000ff00c6000000, Mem[0000000030141410] = ff000000 | |
30981 | stba %l5,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 | |
30982 | ! %l0 = 00000000, %l1 = 000000c6, Mem[0000000010041400] = 000000c6 00000000 | |
30983 | stda %l0,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000000 000000c6 | |
30984 | ! %f22 = 00ff0000 0000ff00, %l1 = 00000000000000c6 | |
30985 | ! Mem[00000000300c1408] = ffffff0000000000 | |
30986 | add %i3,0x008,%g1 | |
30987 | stda %f22,[%g1+%l1]ASI_PST32_S ! Mem[00000000300c1408] = 00ff000000000000 | |
30988 | ! Starting 10 instruction Load Burst | |
30989 | ! Mem[0000000030101400] = 000000ff, %l4 = 00000000ffff0300 | |
30990 | ldswa [%i4+%g0]0x89,%l4 ! %l4 = 00000000000000ff | |
30991 | ||
30992 | p0_label_743: | |
30993 | ! Mem[0000000030001400] = 000000ff, %f8 = 000000ff | |
30994 | lda [%i0+%g0]0x81,%f8 ! %f8 = 000000ff | |
30995 | ! Mem[0000000010101400] = 0000ff00c6000000, %l2 = 0000000000000003 | |
30996 | ldxa [%i4+%g0]0x80,%l2 ! %l2 = 0000ff00c6000000 | |
30997 | ! Mem[0000000030041408] = ff0000c6, %l0 = 0000000000000000 | |
30998 | ldswa [%i1+%o4]0x81,%l0 ! %l0 = ffffffffff0000c6 | |
30999 | ! Mem[0000000030041410] = ffffffff0000ffff, %l7 = 0000000000000000 | |
31000 | ldxa [%i1+%o5]0x89,%l7 ! %l7 = ffffffff0000ffff | |
31001 | ! Mem[00000000201c0000] = 00039457, %l5 = 0000ff00c6000000 | |
31002 | ldsh [%o0+%g0],%l5 ! %l5 = 0000000000000003 | |
31003 | ! Mem[0000000010001410] = 000000ff, %f25 = 0000ff00 | |
31004 | lda [%i0+%o5]0x88,%f25 ! %f25 = 000000ff | |
31005 | ! Mem[00000000100c1408] = 00940000 ff000000, %l2 = c6000000, %l3 = 000000ff | |
31006 | ldda [%i3+%o4]0x88,%l2 ! %l2 = 00000000ff000000 0000000000940000 | |
31007 | ! Mem[00000000300c1410] = 00ff0000, %l5 = 0000000000000003 | |
31008 | ldsba [%i3+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
31009 | ! Mem[0000000030001410] = 0000ff00, %l3 = 0000000000940000 | |
31010 | lduha [%i0+%o5]0x81,%l3 ! %l3 = 0000000000000000 | |
31011 | ! Starting 10 instruction Store Burst | |
31012 | ! %f6 = 00ff0000 00000000, Mem[0000000010001400] = 00000000 ff000000 | |
31013 | stda %f6 ,[%i0+%g0]0x80 ! Mem[0000000010001400] = 00ff0000 00000000 | |
31014 | ||
31015 | p0_label_744: | |
31016 | ! Mem[00000000300c1410] = 00ff0000, %l3 = 0000000000000000 | |
31017 | ldstuba [%i3+%o5]0x81,%l3 ! %l3 = 00000000000000ff | |
31018 | ! %l3 = 0000000000000000, Mem[0000000010141430] = ffffffffff000000, %asi = 80 | |
31019 | stxa %l3,[%i5+0x030]%asi ! Mem[0000000010141430] = 0000000000000000 | |
31020 | ! %f10 = 0000ff00 00000003, %l4 = 00000000000000ff | |
31021 | ! Mem[0000000010101418] = 2164000000000000 | |
31022 | add %i4,0x018,%g1 | |
31023 | stda %f10,[%g1+%l4]ASI_PST32_P ! Mem[0000000010101418] = 0000ff0000000003 | |
31024 | ! %l4 = 000000ff, %l5 = 00000000, Mem[0000000010001408] = 00000000 ff000000 | |
31025 | stda %l4,[%i0+%o4]0x88 ! Mem[0000000010001408] = 000000ff 00000000 | |
31026 | ! %f18 = 000000ff 00000000, Mem[00000000300c1410] = 0000ffff 00940000 | |
31027 | stda %f18,[%i3+%o5]0x89 ! Mem[00000000300c1410] = 000000ff 00000000 | |
31028 | ! %l1 = 00000000000000c6, Mem[0000000010081408] = ff000000 | |
31029 | stba %l1,[%i2+%o4]0x80 ! Mem[0000000010081408] = c6000000 | |
31030 | ! Mem[0000000010101418] = 0000ff00, %l4 = 00000000000000ff | |
31031 | swap [%i4+0x018],%l4 ! %l4 = 000000000000ff00 | |
31032 | ! Mem[0000000010101414] = ff000000, %l3 = 0000000000000000, %asi = 80 | |
31033 | swapa [%i4+0x014]%asi,%l3 ! %l3 = 00000000ff000000 | |
31034 | ! %l4 = 000000000000ff00, Mem[0000000010041410] = ffffffffffffffff | |
31035 | stxa %l4,[%i1+%o5]0x88 ! Mem[0000000010041410] = 000000000000ff00 | |
31036 | ! Starting 10 instruction Load Burst | |
31037 | ! Mem[0000000010101410] = 00000000, %l4 = 000000000000ff00 | |
31038 | ldsha [%i4+%o5]0x88,%l4 ! %l4 = 0000000000000000 | |
31039 | ||
31040 | p0_label_745: | |
31041 | ! Mem[0000000030001410] = 00ff0000, %l6 = 00000000ffffffff | |
31042 | ldswa [%i0+%o5]0x89,%l6 ! %l6 = 0000000000ff0000 | |
31043 | ! Mem[0000000030101400] = ff000000, %f1 = 000000ff | |
31044 | lda [%i4+%g0]0x81,%f1 ! %f1 = ff000000 | |
31045 | ! Mem[0000000030101408] = 00000000, %l3 = 00000000ff000000 | |
31046 | lduba [%i4+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
31047 | ! Mem[0000000010141410] = 00883403, %l5 = 0000000000000000 | |
31048 | ldsha [%i5+%o5]0x80,%l5 ! %l5 = 0000000000000088 | |
31049 | ! Mem[0000000030141408] = 0000ff00, %l2 = 00000000ff000000 | |
31050 | ldswa [%i5+%o4]0x89,%l2 ! %l2 = 000000000000ff00 | |
31051 | ! Mem[0000000030181408] = ff000000, %l3 = 0000000000000000 | |
31052 | ldsha [%i6+%o4]0x81,%l3 ! %l3 = ffffffffffffff00 | |
31053 | ! Mem[00000000100c1410] = 00000000, %l5 = 0000000000000088 | |
31054 | ldsba [%i3+%o5]0x80,%l5 ! %l5 = 0000000000000000 | |
31055 | ! Mem[0000000030081400] = 0000ffff, %l5 = 0000000000000000 | |
31056 | lduba [%i2+%g0]0x81,%l5 ! %l5 = 0000000000000000 | |
31057 | ! Mem[000000001008142c] = 00000000, %f29 = c7883403 | |
31058 | ld [%i2+0x02c],%f29 ! %f29 = 00000000 | |
31059 | ! Starting 10 instruction Store Burst | |
31060 | ! %f22 = 00ff0000 0000ff00, %l0 = ffffffffff0000c6 | |
31061 | ! Mem[0000000010001418] = fc734517000000ff | |
31062 | add %i0,0x018,%g1 | |
31063 | stda %f22,[%g1+%l0]ASI_PST8_P ! Mem[0000000010001418] = 00ff45170000ffff | |
31064 | ||
31065 | ! Check Point 149 for processor 0 | |
31066 | ||
31067 | set p0_check_pt_data_149,%g4 | |
31068 | rd %ccr,%g5 ! %g5 = 44 | |
31069 | ldx [%g4+0x08],%g2 | |
31070 | cmp %l0,%g2 ! %l0 = ffffffffff0000c6 | |
31071 | bne %xcc,p0_reg_check_fail0 | |
31072 | mov 0xee0,%g1 | |
31073 | ldx [%g4+0x10],%g2 | |
31074 | cmp %l2,%g2 ! %l2 = 000000000000ff00 | |
31075 | bne %xcc,p0_reg_check_fail2 | |
31076 | mov 0xee2,%g1 | |
31077 | ldx [%g4+0x18],%g2 | |
31078 | cmp %l3,%g2 ! %l3 = ffffffffffffff00 | |
31079 | bne %xcc,p0_reg_check_fail3 | |
31080 | mov 0xee3,%g1 | |
31081 | ldx [%g4+0x20],%g2 | |
31082 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
31083 | bne %xcc,p0_reg_check_fail4 | |
31084 | mov 0xee4,%g1 | |
31085 | ldx [%g4+0x28],%g2 | |
31086 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
31087 | bne %xcc,p0_reg_check_fail5 | |
31088 | mov 0xee5,%g1 | |
31089 | ldx [%g4+0x30],%g2 | |
31090 | cmp %l6,%g2 ! %l6 = 0000000000ff0000 | |
31091 | bne %xcc,p0_reg_check_fail6 | |
31092 | mov 0xee6,%g1 | |
31093 | ldx [%g4+0x38],%g2 | |
31094 | cmp %l7,%g2 ! %l7 = ffffffff0000ffff | |
31095 | bne %xcc,p0_reg_check_fail7 | |
31096 | mov 0xee7,%g1 | |
31097 | ldx [%g4+0x40],%g3 | |
31098 | std %f0,[%g4] | |
31099 | ldx [%g4],%g2 | |
31100 | cmp %g3,%g2 ! %f0 = 000000ff ff000000 | |
31101 | bne %xcc,p0_freg_check_fail | |
31102 | mov 0xf00,%g1 | |
31103 | ldx [%g4+0x48],%g3 | |
31104 | std %f2,[%g4] | |
31105 | ldx [%g4],%g2 | |
31106 | cmp %g3,%g2 ! %f2 = ffffffff e6bf2212 | |
31107 | bne %xcc,p0_freg_check_fail | |
31108 | mov 0xf02,%g1 | |
31109 | ldx [%g4+0x50],%g3 | |
31110 | std %f8,[%g4] | |
31111 | ldx [%g4],%g2 | |
31112 | cmp %g3,%g2 ! %f8 = 000000ff 00000000 | |
31113 | bne %xcc,p0_freg_check_fail | |
31114 | mov 0xf08,%g1 | |
31115 | ldx [%g4+0x58],%g3 | |
31116 | std %f24,[%g4] | |
31117 | ldx [%g4],%g2 | |
31118 | cmp %g3,%g2 ! %f24 = 000000c6 000000ff | |
31119 | bne %xcc,p0_freg_check_fail | |
31120 | mov 0xf24,%g1 | |
31121 | ldx [%g4+0x60],%g3 | |
31122 | std %f28,[%g4] | |
31123 | ldx [%g4],%g2 | |
31124 | cmp %g3,%g2 ! %f28 = 0000ffff 00000000 | |
31125 | bne %xcc,p0_freg_check_fail | |
31126 | mov 0xf28,%g1 | |
31127 | ||
31128 | ! Check Point 149 completed | |
31129 | ||
31130 | ||
31131 | p0_label_746: | |
31132 | ! %l6 = 0000000000ff0000, Mem[0000000030001410] = 0000ff00 | |
31133 | stwa %l6,[%i0+%o5]0x81 ! Mem[0000000030001410] = 00ff0000 | |
31134 | ! %f2 = ffffffff e6bf2212, Mem[0000000030001410] = 0000ff00 c7883403 | |
31135 | stda %f2 ,[%i0+%o5]0x89 ! Mem[0000000030001410] = ffffffff e6bf2212 | |
31136 | ! Mem[0000000010101420] = 000000ff0000ffff, %f24 = 000000c6 000000ff | |
31137 | ldda [%i4+0x020]%asi,%f24 ! %f24 = 000000ff 0000ffff | |
31138 | ! %l0 = ff0000c6, %l1 = 000000c6, Mem[0000000010081400] = 0003ffff ffff0000 | |
31139 | stda %l0,[%i2+%g0]0x80 ! Mem[0000000010081400] = ff0000c6 000000c6 | |
31140 | ! Mem[0000000010141414] = 00000000, %l3 = ffffffffffffff00, %asi = 80 | |
31141 | swapa [%i5+0x014]%asi,%l3 ! %l3 = 0000000000000000 | |
31142 | ! %l6 = 00ff0000, %l7 = 0000ffff, Mem[0000000010141400] = ffff00ff 03000000 | |
31143 | stda %l6,[%i5+%g0]0x88 ! Mem[0000000010141400] = 00ff0000 0000ffff | |
31144 | ! %l2 = 000000000000ff00, Mem[0000000020800040] = ffff7379, %asi = 80 | |
31145 | stha %l2,[%o1+0x040]%asi ! Mem[0000000020800040] = ff007379 | |
31146 | ! Mem[000000001018143a] = 411f0000, %l3 = 0000000000000000 | |
31147 | ldstuba [%i6+0x03a]%asi,%l3 ! %l3 = 00000000000000ff | |
31148 | ! Mem[0000000010141410] = 00883403, %l1 = 00000000000000c6 | |
31149 | swapa [%i5+%o5]0x80,%l1 ! %l1 = 0000000000883403 | |
31150 | ! Starting 10 instruction Load Burst | |
31151 | ! Mem[0000000030181408] = ff000000, %f0 = 000000ff | |
31152 | lda [%i6+%o4]0x81,%f0 ! %f0 = ff000000 | |
31153 | ||
31154 | p0_label_747: | |
31155 | ! Mem[0000000010141410] = 000000c6 ffffff00, %l2 = 0000ff00, %l3 = 00000000 | |
31156 | ldda [%i5+%o5]0x80,%l2 ! %l2 = 00000000000000c6 00000000ffffff00 | |
31157 | ! Mem[0000000010001418] = 00ff4517, %l2 = 00000000000000c6 | |
31158 | ldswa [%i0+0x018]%asi,%l2 ! %l2 = 0000000000ff4517 | |
31159 | ! Mem[0000000021800100] = c67611d1, %l5 = 0000000000000000 | |
31160 | lduh [%o3+0x100],%l5 ! %l5 = 000000000000c676 | |
31161 | ! Mem[0000000010041410] = 00000000 0000ff00, %l2 = 00ff4517, %l3 = ffffff00 | |
31162 | ldda [%i1+%o5]0x88,%l2 ! %l2 = 000000000000ff00 0000000000000000 | |
31163 | ! Mem[0000000010041430] = 000000fff31200ff, %f24 = 000000ff 0000ffff | |
31164 | ldd [%i1+0x030],%f24 ! %f24 = 000000ff f31200ff | |
31165 | ! Mem[0000000010081420] = 0000ff00033488c7, %l6 = 0000000000ff0000 | |
31166 | ldx [%i2+0x020],%l6 ! %l6 = 0000ff00033488c7 | |
31167 | ! Mem[0000000010001400] = 0000ff00, %l0 = ffffffffff0000c6 | |
31168 | ldsba [%i0+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
31169 | ! Mem[00000000300c1410] = 00000000, %l7 = ffffffff0000ffff | |
31170 | ldswa [%i3+%o5]0x81,%l7 ! %l7 = 0000000000000000 | |
31171 | ! Mem[0000000030041410] = ffff0000, %l3 = 0000000000000000 | |
31172 | lduba [%i1+%o5]0x81,%l3 ! %l3 = 00000000000000ff | |
31173 | ! Starting 10 instruction Store Burst | |
31174 | ! %f10 = 0000ff00, Mem[0000000010101410] = 00000000 | |
31175 | sta %f10,[%i4+%o5]0x88 ! Mem[0000000010101410] = 0000ff00 | |
31176 | ||
31177 | p0_label_748: | |
31178 | ! %f20 = ff000000, Mem[0000000030041400] = ff00ffff | |
31179 | sta %f20,[%i1+%g0]0x89 ! Mem[0000000030041400] = ff000000 | |
31180 | ! %l1 = 0000000000883403, Mem[00000000100c1420] = 000000ff, %asi = 80 | |
31181 | stba %l1,[%i3+0x020]%asi ! Mem[00000000100c1420] = 030000ff | |
31182 | ! %f30 = 000000c6 ffffff00, Mem[0000000010101408] = 00000000 00000000 | |
31183 | stda %f30,[%i4+%o4]0x80 ! Mem[0000000010101408] = 000000c6 ffffff00 | |
31184 | ! %l4 = 00000000, %l5 = 0000c676, Mem[0000000010001400] = 00ff0000 00000000 | |
31185 | stda %l4,[%i0+0x000]%asi ! Mem[0000000010001400] = 00000000 0000c676 | |
31186 | ! Mem[00000000300c1408] = 0000ff00, %l0 = 0000000000000000 | |
31187 | ldstuba [%i3+%o4]0x89,%l0 ! %l0 = 00000000000000ff | |
31188 | ! %l1 = 0000000000883403, Mem[00000000211c0000] = ffff1a4c, %asi = 80 | |
31189 | stba %l1,[%o2+0x000]%asi ! Mem[00000000211c0000] = 03ff1a4c | |
31190 | ! %l2 = 0000ff00, %l3 = 000000ff, Mem[00000000300c1410] = 00000000 ff000000 | |
31191 | stda %l2,[%i3+%o5]0x81 ! Mem[00000000300c1410] = 0000ff00 000000ff | |
31192 | ! Mem[0000000030181408] = ff000000, %l0 = 0000000000000000 | |
31193 | swapa [%i6+%o4]0x81,%l0 ! %l0 = 00000000ff000000 | |
31194 | ! %l0 = 00000000ff000000, Mem[0000000030041408] = c60000ff | |
31195 | stwa %l0,[%i1+%o4]0x89 ! Mem[0000000030041408] = ff000000 | |
31196 | ! Starting 10 instruction Load Burst | |
31197 | ! Mem[0000000030041408] = 000000ff00000000, %f14 = 411f0000 c6000000 | |
31198 | ldda [%i1+%o4]0x81,%f14 ! %f14 = 000000ff 00000000 | |
31199 | ||
31200 | p0_label_749: | |
31201 | ! Mem[0000000010081408] = 0000ff00000000c6, %f8 = 000000ff 00000000 | |
31202 | ldda [%i2+%o4]0x88,%f8 ! %f8 = 0000ff00 000000c6 | |
31203 | ! Mem[00000000300c1408] = ffff0000, %l5 = 000000000000c676 | |
31204 | ldsha [%i3+%o4]0x81,%l5 ! %l5 = ffffffffffffffff | |
31205 | ! Mem[0000000030101410] = ffff0000000000ff, %l4 = 0000000000000000 | |
31206 | ldxa [%i4+%o5]0x89,%l4 ! %l4 = ffff0000000000ff | |
31207 | ! Mem[0000000030081408] = ffff0000, %l3 = 00000000000000ff | |
31208 | lduba [%i2+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
31209 | ! Mem[0000000010141410] = 000000c6ffffff00, %l2 = 000000000000ff00 | |
31210 | ldxa [%i5+0x010]%asi,%l2 ! %l2 = 000000c6ffffff00 | |
31211 | ! Mem[00000000300c1408] = ffff0000, %f30 = 000000c6 | |
31212 | lda [%i3+%o4]0x81,%f30 ! %f30 = ffff0000 | |
31213 | ! Mem[00000000100c1404] = 00000000, %l1 = 0000000000883403 | |
31214 | ldsw [%i3+0x004],%l1 ! %l1 = 0000000000000000 | |
31215 | ! Mem[0000000010081408] = c600000000ff0000, %l4 = ffff0000000000ff | |
31216 | ldxa [%i2+%o4]0x80,%l4 ! %l4 = c600000000ff0000 | |
31217 | ! Mem[0000000010181400] = 000000ff, %f12 = 00ff0000 | |
31218 | lda [%i6+%g0]0x80,%f12 ! %f12 = 000000ff | |
31219 | ! Starting 10 instruction Store Burst | |
31220 | ! Mem[000000001014141c] = 000000ff, %l0 = 00000000ff000000, %asi = 80 | |
31221 | swapa [%i5+0x01c]%asi,%l0 ! %l0 = 00000000000000ff | |
31222 | ||
31223 | p0_label_750: | |
31224 | ! Mem[0000000030001410] = e6bf2212, %l4 = c600000000ff0000 | |
31225 | ldstuba [%i0+%o5]0x89,%l4 ! %l4 = 00000012000000ff | |
31226 | ! %l6 = 033488c7, %l7 = 00000000, Mem[0000000010001410] = 000000ff ffffffff | |
31227 | stda %l6,[%i0+%o5]0x88 ! Mem[0000000010001410] = 033488c7 00000000 | |
31228 | ! %l3 = 0000000000000000, Mem[0000000010181410] = 000000000000ff00 | |
31229 | stx %l3,[%i6+%o5] ! Mem[0000000010181410] = 0000000000000000 | |
31230 | ! %f26 = 03000000 00000000, %l1 = 0000000000000000 | |
31231 | ! Mem[0000000010041408] = ffff00ffffffffff | |
31232 | add %i1,0x008,%g1 | |
31233 | stda %f26,[%g1+%l1]ASI_PST32_PL ! Mem[0000000010041408] = ffff00ffffffffff | |
31234 | ! %f20 = ff000000 00ffffff, Mem[0000000030041410] = ffff0000 ffffffff | |
31235 | stda %f20,[%i1+%o5]0x81 ! Mem[0000000030041410] = ff000000 00ffffff | |
31236 | ! Mem[0000000030081400] = ffff0000, %l6 = 0000ff00033488c7 | |
31237 | swapa [%i2+%g0]0x89,%l6 ! %l6 = 00000000ffff0000 | |
31238 | ! %l2 = 000000c6ffffff00, Mem[0000000030041400] = ff000000 | |
31239 | stba %l2,[%i1+%g0]0x89 ! Mem[0000000030041400] = ff000000 | |
31240 | ! %l4 = 0000000000000012, Mem[0000000010041400] = 00000000000000c6, %asi = 80 | |
31241 | stxa %l4,[%i1+0x000]%asi ! Mem[0000000010041400] = 0000000000000012 | |
31242 | ! %l2 = ffffff00, %l3 = 00000000, Mem[0000000010101410] = 0000ff00 00000000 | |
31243 | stda %l2,[%i4+%o5]0x88 ! Mem[0000000010101410] = ffffff00 00000000 | |
31244 | ! Starting 10 instruction Load Burst | |
31245 | ! Mem[0000000010101400] = 0000ff00, %f15 = 00000000 | |
31246 | lda [%i4+%g0]0x80,%f15 ! %f15 = 0000ff00 | |
31247 | ||
31248 | ! Check Point 150 for processor 0 | |
31249 | ||
31250 | set p0_check_pt_data_150,%g4 | |
31251 | rd %ccr,%g5 ! %g5 = 44 | |
31252 | ldx [%g4+0x08],%g2 | |
31253 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
31254 | bne %xcc,p0_reg_check_fail0 | |
31255 | mov 0xee0,%g1 | |
31256 | ldx [%g4+0x10],%g2 | |
31257 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
31258 | bne %xcc,p0_reg_check_fail1 | |
31259 | mov 0xee1,%g1 | |
31260 | ldx [%g4+0x18],%g2 | |
31261 | cmp %l2,%g2 ! %l2 = 000000c6ffffff00 | |
31262 | bne %xcc,p0_reg_check_fail2 | |
31263 | mov 0xee2,%g1 | |
31264 | ldx [%g4+0x20],%g2 | |
31265 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
31266 | bne %xcc,p0_reg_check_fail3 | |
31267 | mov 0xee3,%g1 | |
31268 | ldx [%g4+0x28],%g2 | |
31269 | cmp %l4,%g2 ! %l4 = 0000000000000012 | |
31270 | bne %xcc,p0_reg_check_fail4 | |
31271 | mov 0xee4,%g1 | |
31272 | ldx [%g4+0x30],%g2 | |
31273 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
31274 | bne %xcc,p0_reg_check_fail5 | |
31275 | mov 0xee5,%g1 | |
31276 | ldx [%g4+0x38],%g2 | |
31277 | cmp %l6,%g2 ! %l6 = 00000000ffff0000 | |
31278 | bne %xcc,p0_reg_check_fail6 | |
31279 | mov 0xee6,%g1 | |
31280 | ldx [%g4+0x40],%g2 | |
31281 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
31282 | bne %xcc,p0_reg_check_fail7 | |
31283 | mov 0xee7,%g1 | |
31284 | ldx [%g4+0x48],%g3 | |
31285 | std %f0,[%g4] | |
31286 | ldx [%g4],%g2 | |
31287 | cmp %g3,%g2 ! %f0 = ff000000 ff000000 | |
31288 | bne %xcc,p0_freg_check_fail | |
31289 | mov 0xf00,%g1 | |
31290 | ldx [%g4+0x50],%g3 | |
31291 | std %f2,[%g4] | |
31292 | ldx [%g4],%g2 | |
31293 | cmp %g3,%g2 ! %f2 = ffffffff e6bf2212 | |
31294 | bne %xcc,p0_freg_check_fail | |
31295 | mov 0xf02,%g1 | |
31296 | ldx [%g4+0x58],%g3 | |
31297 | std %f8,[%g4] | |
31298 | ldx [%g4],%g2 | |
31299 | cmp %g3,%g2 ! %f8 = 0000ff00 000000c6 | |
31300 | bne %xcc,p0_freg_check_fail | |
31301 | mov 0xf08,%g1 | |
31302 | ldx [%g4+0x60],%g3 | |
31303 | std %f12,[%g4] | |
31304 | ldx [%g4],%g2 | |
31305 | cmp %g3,%g2 ! %f12 = 000000ff 033488c7 | |
31306 | bne %xcc,p0_freg_check_fail | |
31307 | mov 0xf12,%g1 | |
31308 | ldx [%g4+0x68],%g3 | |
31309 | std %f14,[%g4] | |
31310 | ldx [%g4],%g2 | |
31311 | cmp %g3,%g2 ! %f14 = 000000ff 0000ff00 | |
31312 | bne %xcc,p0_freg_check_fail | |
31313 | mov 0xf14,%g1 | |
31314 | ldx [%g4+0x70],%g3 | |
31315 | std %f24,[%g4] | |
31316 | ldx [%g4],%g2 | |
31317 | cmp %g3,%g2 ! %f24 = 000000ff f31200ff | |
31318 | bne %xcc,p0_freg_check_fail | |
31319 | mov 0xf24,%g1 | |
31320 | ldx [%g4+0x78],%g3 | |
31321 | std %f30,[%g4] | |
31322 | ldx [%g4],%g2 | |
31323 | cmp %g3,%g2 ! %f30 = ffff0000 ffffff00 | |
31324 | bne %xcc,p0_freg_check_fail | |
31325 | mov 0xf30,%g1 | |
31326 | ||
31327 | ! Check Point 150 completed | |
31328 | ||
31329 | ||
31330 | p0_label_751: | |
31331 | ! Mem[0000000010001438] = 7827da3e, %l0 = 00000000000000ff | |
31332 | ldsha [%i0+0x03a]%asi,%l0 ! %l0 = ffffffffffffda3e | |
31333 | ! Mem[0000000030001408] = ffffffff, %l5 = ffffffffffffffff | |
31334 | ldsha [%i0+%o4]0x81,%l5 ! %l5 = ffffffffffffffff | |
31335 | ! Mem[0000000010041410] = 0000ff00, %l4 = 0000000000000012 | |
31336 | lduha [%i1+%o5]0x88,%l4 ! %l4 = 000000000000ff00 | |
31337 | ! Mem[0000000010181430] = 00ff0000033488c7, %l4 = 000000000000ff00 | |
31338 | ldx [%i6+0x030],%l4 ! %l4 = 00ff0000033488c7 | |
31339 | ! Mem[0000000030001410] = e6bf22ff, %l7 = 0000000000000000 | |
31340 | ldswa [%i0+%o5]0x89,%l7 ! %l7 = ffffffffe6bf22ff | |
31341 | ! Mem[0000000030101410] = ff000000 0000ffff, %l2 = ffffff00, %l3 = 00000000 | |
31342 | ldda [%i4+%o5]0x81,%l2 ! %l2 = 00000000ff000000 000000000000ffff | |
31343 | ! Mem[0000000030041408] = 000000ff, %l6 = 00000000ffff0000 | |
31344 | ldsba [%i1+%o4]0x81,%l6 ! %l6 = 0000000000000000 | |
31345 | ! Mem[0000000010101438] = 00000000 00000000, %l2 = ff000000, %l3 = 0000ffff | |
31346 | ldd [%i4+0x038],%l2 ! %l2 = 0000000000000000 0000000000000000 | |
31347 | ! Mem[0000000021800100] = c67611d1, %l0 = ffffffffffffda3e | |
31348 | lduha [%o3+0x100]%asi,%l0 ! %l0 = 000000000000c676 | |
31349 | ! Starting 10 instruction Store Burst | |
31350 | ! %f6 = 00ff0000 00000000, Mem[0000000010181438] = 411fff00 c6000000 | |
31351 | std %f6 ,[%i6+0x038] ! Mem[0000000010181438] = 00ff0000 00000000 | |
31352 | ||
31353 | p0_label_752: | |
31354 | ! %l2 = 0000000000000000, Mem[0000000030181400] = ffffffff | |
31355 | stba %l2,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00ffffff | |
31356 | ! %l7 = ffffffffe6bf22ff, Mem[0000000030081408] = 0000ffff | |
31357 | stba %l7,[%i2+%o4]0x81 ! Mem[0000000030081408] = ff00ffff | |
31358 | ! %l5 = ffffffffffffffff, Mem[0000000030181400] = 00ffffff00000000 | |
31359 | stxa %l5,[%i6+%g0]0x81 ! Mem[0000000030181400] = ffffffffffffffff | |
31360 | ! Mem[0000000010141410] = 000000c6, %l3 = 0000000000000000 | |
31361 | swap [%i5+%o5],%l3 ! %l3 = 00000000000000c6 | |
31362 | ! %l2 = 0000000000000000, Mem[0000000010181418] = 00000000ffffff00, %asi = 80 | |
31363 | stxa %l2,[%i6+0x018]%asi ! Mem[0000000010181418] = 0000000000000000 | |
31364 | ! %l0 = 0000c676, %l1 = 00000000, Mem[0000000010001410] = c7883403 00000000 | |
31365 | stda %l0,[%i0+0x010]%asi ! Mem[0000000010001410] = 0000c676 00000000 | |
31366 | ! %f0 = ff000000 ff000000 ffffffff e6bf2212 | |
31367 | ! %f4 = ff000000 00009400 00ff0000 00000000 | |
31368 | ! %f8 = 0000ff00 000000c6 0000ff00 00000003 | |
31369 | ! %f12 = 000000ff 033488c7 000000ff 0000ff00 | |
31370 | stda %f0,[%i6]ASI_BLK_SL ! Block Store to 0000000030181400 | |
31371 | ! %f20 = ff000000 00ffffff, %l1 = 0000000000000000 | |
31372 | ! Mem[0000000030041420] = f31200ff00ff0000 | |
31373 | add %i1,0x020,%g1 | |
31374 | stda %f20,[%g1+%l1]ASI_PST16_SL ! Mem[0000000030041420] = f31200ff00ff0000 | |
31375 | ! %l0 = 000000000000c676, Mem[00000000300c1408] = 0000ffff | |
31376 | stha %l0,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 0000c676 | |
31377 | ! Starting 10 instruction Load Burst | |
31378 | membar #Sync ! Added by membar checker (128) | |
31379 | ! Mem[0000000030181408] = ffffffffe6bf2212, %l4 = 00ff0000033488c7 | |
31380 | ldxa [%i6+%o4]0x89,%l4 ! %l4 = ffffffffe6bf2212 | |
31381 | ||
31382 | p0_label_753: | |
31383 | ! Mem[0000000010141400] = 00ff0000, %l2 = 0000000000000000 | |
31384 | lduba [%i5+%g0]0x88,%l2 ! %l2 = 0000000000000000 | |
31385 | ! Mem[0000000030181408] = e6bf2212, %f5 = 00009400 | |
31386 | lda [%i6+%o4]0x89,%f5 ! %f5 = e6bf2212 | |
31387 | ! Mem[0000000010141400] = 00ff0000, %f22 = 00ff0000 | |
31388 | lda [%i5+%g0]0x88,%f22 ! %f22 = 00ff0000 | |
31389 | ! Mem[0000000021800080] = ffffa433, %l1 = 0000000000000000 | |
31390 | ldub [%o3+0x080],%l1 ! %l1 = 00000000000000ff | |
31391 | ! Mem[0000000030001410] = ffffffffe6bf22ff, %l5 = ffffffffffffffff | |
31392 | ldxa [%i0+%o5]0x89,%l5 ! %l5 = ffffffffe6bf22ff | |
31393 | ! Mem[0000000030101400] = ff000000 0000ffff, %l6 = 00000000, %l7 = e6bf22ff | |
31394 | ldda [%i4+%g0]0x81,%l6 ! %l6 = 00000000ff000000 000000000000ffff | |
31395 | ! Mem[0000000010181400] = 000000ff, %l7 = 000000000000ffff | |
31396 | ldsha [%i6+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
31397 | ! Mem[0000000030001408] = ffffffff, %l3 = 00000000000000c6 | |
31398 | ldswa [%i0+%o4]0x81,%l3 ! %l3 = ffffffffffffffff | |
31399 | ! Mem[00000000100c1408] = 00940000 ff000000, %l6 = ff000000, %l7 = 00000000 | |
31400 | ldda [%i3+%o4]0x88,%l6 ! %l6 = 00000000ff000000 0000000000940000 | |
31401 | ! Starting 10 instruction Store Burst | |
31402 | ! %l4 = e6bf2212, %l5 = e6bf22ff, Mem[00000000100c1408] = 000000ff 00009400 | |
31403 | stda %l4,[%i3+%o4]0x80 ! Mem[00000000100c1408] = e6bf2212 e6bf22ff | |
31404 | ||
31405 | p0_label_754: | |
31406 | ! Mem[0000000030141400] = ff000000, %l2 = 0000000000000000 | |
31407 | swapa [%i5+%g0]0x89,%l2 ! %l2 = 00000000ff000000 | |
31408 | ! %l0 = 000000000000c676, Mem[0000000030141400] = 00000000000000ff | |
31409 | stxa %l0,[%i5+%g0]0x81 ! Mem[0000000030141400] = 000000000000c676 | |
31410 | ! Mem[0000000010041424] = 00000000, %l2 = 00000000ff000000, %asi = 80 | |
31411 | swapa [%i1+0x024]%asi,%l2 ! %l2 = 0000000000000000 | |
31412 | ! %f2 = ffffffff e6bf2212, Mem[00000000100c1408] = 1222bfe6 ff22bfe6 | |
31413 | stda %f2 ,[%i3+%o4]0x88 ! Mem[00000000100c1408] = ffffffff e6bf2212 | |
31414 | ! %f8 = 0000ff00 000000c6, Mem[0000000010001400] = 00000000 0000c676 | |
31415 | stda %f8 ,[%i0+%g0]0x80 ! Mem[0000000010001400] = 0000ff00 000000c6 | |
31416 | ! %f12 = 000000ff, Mem[0000000030181408] = e6bf2212 | |
31417 | sta %f12,[%i6+%o4]0x89 ! Mem[0000000030181408] = 000000ff | |
31418 | ! %f20 = ff000000 00ffffff, %l0 = 000000000000c676 | |
31419 | ! Mem[0000000010001420] = 1f41ff762164159c | |
31420 | add %i0,0x020,%g1 | |
31421 | stda %f20,[%g1+%l0]ASI_PST16_PL ! Mem[0000000010001420] = 1f41ff000000159c | |
31422 | ! %l3 = ffffffffffffffff, Mem[0000000010041418] = 00000000, %asi = 80 | |
31423 | stha %l3,[%i1+0x018]%asi ! Mem[0000000010041418] = ffff0000 | |
31424 | ! %l6 = ff000000, %l7 = 00940000, Mem[00000000100c1410] = 00000000 0000ff00 | |
31425 | stda %l6,[%i3+%o5]0x80 ! Mem[00000000100c1410] = ff000000 00940000 | |
31426 | ! Starting 10 instruction Load Burst | |
31427 | ! Mem[0000000010041418] = ffff0000, %l0 = 000000000000c676 | |
31428 | lduha [%i1+0x018]%asi,%l0 ! %l0 = 000000000000ffff | |
31429 | ||
31430 | p0_label_755: | |
31431 | ! Mem[0000000030001400] = 000000ff, %l3 = ffffffffffffffff | |
31432 | lduba [%i0+%g0]0x81,%l3 ! %l3 = 0000000000000000 | |
31433 | ! Mem[0000000010181408] = 0000000000000003, %f26 = 03000000 00000000 | |
31434 | ldda [%i6+%o4]0x88,%f26 ! %f26 = 00000000 00000003 | |
31435 | ! Mem[00000000100c1410] = 00009400 000000ff, %l6 = ff000000, %l7 = 00940000 | |
31436 | ldda [%i3+%o5]0x88,%l6 ! %l6 = 00000000000000ff 0000000000009400 | |
31437 | ! Mem[0000000030001410] = e6bf22ff, %l0 = 000000000000ffff | |
31438 | lduha [%i0+%o5]0x89,%l0 ! %l0 = 00000000000022ff | |
31439 | ! Mem[00000000100c1410] = ff000000, %l4 = ffffffffe6bf2212 | |
31440 | ldsha [%i3+%o5]0x80,%l4 ! %l4 = ffffffffffffff00 | |
31441 | ! Mem[00000000100c1408] = 1222bfe6, %l4 = ffffffffffffff00 | |
31442 | ldswa [%i3+%o4]0x80,%l4 ! %l4 = 000000001222bfe6 | |
31443 | ! Mem[0000000030001400] = 000000ff, %l5 = ffffffffe6bf22ff | |
31444 | lduha [%i0+%g0]0x81,%l5 ! %l5 = 0000000000000000 | |
31445 | ! Mem[00000000300c1410] = 0000ff00000000ff, %l3 = 0000000000000000 | |
31446 | ldxa [%i3+%o5]0x81,%l3 ! %l3 = 0000ff00000000ff | |
31447 | ! Mem[0000000010141400] = 0000ff00, %l5 = 0000000000000000 | |
31448 | lduba [%i5+%g0]0x80,%l5 ! %l5 = 0000000000000000 | |
31449 | ! Starting 10 instruction Store Burst | |
31450 | ! Mem[0000000030181400] = 000000ff, %l5 = 0000000000000000 | |
31451 | ldstuba [%i6+%g0]0x81,%l5 ! %l5 = 00000000000000ff | |
31452 | ||
31453 | ! Check Point 151 for processor 0 | |
31454 | ||
31455 | set p0_check_pt_data_151,%g4 | |
31456 | rd %ccr,%g5 ! %g5 = 44 | |
31457 | ldx [%g4+0x08],%g2 | |
31458 | cmp %l0,%g2 ! %l0 = 00000000000022ff | |
31459 | bne %xcc,p0_reg_check_fail0 | |
31460 | mov 0xee0,%g1 | |
31461 | ldx [%g4+0x10],%g2 | |
31462 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
31463 | bne %xcc,p0_reg_check_fail1 | |
31464 | mov 0xee1,%g1 | |
31465 | ldx [%g4+0x18],%g2 | |
31466 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
31467 | bne %xcc,p0_reg_check_fail2 | |
31468 | mov 0xee2,%g1 | |
31469 | ldx [%g4+0x20],%g2 | |
31470 | cmp %l3,%g2 ! %l3 = 0000ff00000000ff | |
31471 | bne %xcc,p0_reg_check_fail3 | |
31472 | mov 0xee3,%g1 | |
31473 | ldx [%g4+0x28],%g2 | |
31474 | cmp %l4,%g2 ! %l4 = 000000001222bfe6 | |
31475 | bne %xcc,p0_reg_check_fail4 | |
31476 | mov 0xee4,%g1 | |
31477 | ldx [%g4+0x30],%g2 | |
31478 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
31479 | bne %xcc,p0_reg_check_fail5 | |
31480 | mov 0xee5,%g1 | |
31481 | ldx [%g4+0x38],%g2 | |
31482 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
31483 | bne %xcc,p0_reg_check_fail6 | |
31484 | mov 0xee6,%g1 | |
31485 | ldx [%g4+0x40],%g2 | |
31486 | cmp %l7,%g2 ! %l7 = 0000000000009400 | |
31487 | bne %xcc,p0_reg_check_fail7 | |
31488 | mov 0xee7,%g1 | |
31489 | ldx [%g4+0x48],%g3 | |
31490 | std %f2,[%g4] | |
31491 | ldx [%g4],%g2 | |
31492 | cmp %g3,%g2 ! %f2 = ffffffff e6bf2212 | |
31493 | bne %xcc,p0_freg_check_fail | |
31494 | mov 0xf02,%g1 | |
31495 | ldx [%g4+0x50],%g3 | |
31496 | std %f4,[%g4] | |
31497 | ldx [%g4],%g2 | |
31498 | cmp %g3,%g2 ! %f4 = ff000000 e6bf2212 | |
31499 | bne %xcc,p0_freg_check_fail | |
31500 | mov 0xf04,%g1 | |
31501 | ldx [%g4+0x58],%g3 | |
31502 | std %f6,[%g4] | |
31503 | ldx [%g4],%g2 | |
31504 | cmp %g3,%g2 ! %f6 = 00ff0000 00000000 | |
31505 | bne %xcc,p0_freg_check_fail | |
31506 | mov 0xf06,%g1 | |
31507 | ldx [%g4+0x60],%g3 | |
31508 | std %f22,[%g4] | |
31509 | ldx [%g4],%g2 | |
31510 | cmp %g3,%g2 ! %f22 = 00ff0000 0000ff00 | |
31511 | bne %xcc,p0_freg_check_fail | |
31512 | mov 0xf22,%g1 | |
31513 | ldx [%g4+0x68],%g3 | |
31514 | std %f26,[%g4] | |
31515 | ldx [%g4],%g2 | |
31516 | cmp %g3,%g2 ! %f26 = 00000000 00000003 | |
31517 | bne %xcc,p0_freg_check_fail | |
31518 | mov 0xf26,%g1 | |
31519 | ||
31520 | ! Check Point 151 completed | |
31521 | ||
31522 | ||
31523 | p0_label_756: | |
31524 | ! Mem[00000000211c0000] = 03ff1a4c, %l4 = 000000001222bfe6 | |
31525 | ldstuba [%o2+0x000]%asi,%l4 ! %l4 = 00000003000000ff | |
31526 | ! %l2 = 0000000000000000, Mem[0000000030001400] = 000000ff | |
31527 | stwa %l2,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00000000 | |
31528 | ! Mem[0000000010181408] = 03000000, %l6 = 00000000000000ff | |
31529 | swapa [%i6+%o4]0x80,%l6 ! %l6 = 0000000003000000 | |
31530 | ! %l4 = 0000000000000003, Mem[0000000010081410] = 0000ff00 | |
31531 | stha %l4,[%i2+%o5]0x88 ! Mem[0000000010081410] = 00000003 | |
31532 | ! %l1 = 00000000000000ff, Mem[0000000030181408] = 000000ff | |
31533 | stwa %l1,[%i6+%o4]0x89 ! Mem[0000000030181408] = 000000ff | |
31534 | ! Mem[0000000010141430] = 00000000, %l1 = 00000000000000ff, %asi = 80 | |
31535 | swapa [%i5+0x030]%asi,%l1 ! %l1 = 0000000000000000 | |
31536 | ! Mem[00000000100c1420] = 030000ff, %l6 = 0000000003000000, %asi = 80 | |
31537 | swapa [%i3+0x020]%asi,%l6 ! %l6 = 00000000030000ff | |
31538 | ! Mem[0000000030081400] = c7883403, %l5 = 0000000000000000 | |
31539 | ldstuba [%i2+%g0]0x81,%l5 ! %l5 = 000000c7000000ff | |
31540 | ! %f12 = 000000ff 033488c7, Mem[0000000010181410] = 00000000 00000000 | |
31541 | stda %f12,[%i6+%o5]0x88 ! Mem[0000000010181410] = 000000ff 033488c7 | |
31542 | ! Starting 10 instruction Load Burst | |
31543 | ! Mem[0000000010081430] = c7883403 0000ff00, %l4 = 00000003, %l5 = 000000c7 | |
31544 | ldda [%i2+0x030]%asi,%l4 ! %l4 = 00000000c7883403 000000000000ff00 | |
31545 | ||
31546 | p0_label_757: | |
31547 | ! Mem[0000000030081408] = ff00ffff, %l3 = 0000ff00000000ff | |
31548 | ldsba [%i2+%o4]0x81,%l3 ! %l3 = ffffffffffffffff | |
31549 | ! Mem[00000000218001c0] = 9c002a00, %l0 = 00000000000022ff | |
31550 | lduha [%o3+0x1c0]%asi,%l0 ! %l0 = 0000000000009c00 | |
31551 | ! Mem[0000000010041408] = ffff00ff ffffffff, %l4 = c7883403, %l5 = 0000ff00 | |
31552 | ldda [%i1+%o4]0x80,%l4 ! %l4 = 00000000ffff00ff 00000000ffffffff | |
31553 | ! Mem[0000000010141410] = 00000000, %l1 = 0000000000000000 | |
31554 | lduw [%i5+%o5],%l1 ! %l1 = 0000000000000000 | |
31555 | ! Mem[0000000010101400] = 00ff0000, %l3 = ffffffffffffffff | |
31556 | ldsba [%i4+%g0]0x88,%l3 ! %l3 = 0000000000000000 | |
31557 | ! Mem[0000000010041408] = ffff00ff ffffffff, %l6 = 030000ff, %l7 = 00009400 | |
31558 | ldda [%i1+%o4]0x80,%l6 ! %l6 = 00000000ffff00ff 00000000ffffffff | |
31559 | ! Mem[0000000010081408] = 000000c6, %l2 = 0000000000000000 | |
31560 | lduwa [%i2+%o4]0x88,%l2 ! %l2 = 00000000000000c6 | |
31561 | ! Mem[0000000010181410] = c7883403, %f26 = 00000000 | |
31562 | lda [%i6+%o5]0x80,%f26 ! %f26 = c7883403 | |
31563 | ! Mem[00000000201c0000] = 00039457, %l1 = 0000000000000000 | |
31564 | lduh [%o0+%g0],%l1 ! %l1 = 0000000000000003 | |
31565 | ! Starting 10 instruction Store Burst | |
31566 | ! %l5 = 00000000ffffffff, Mem[0000000010041438] = 000000c6, %asi = 80 | |
31567 | stha %l5,[%i1+0x038]%asi ! Mem[0000000010041438] = ffff00c6 | |
31568 | ||
31569 | p0_label_758: | |
31570 | ! Mem[0000000030181400] = ff0000ff, %l3 = 0000000000000000 | |
31571 | swapa [%i6+%g0]0x89,%l3 ! %l3 = 00000000ff0000ff | |
31572 | ! %f28 = 0000ffff 00000000, Mem[0000000010001400] = 00ff0000 c6000000 | |
31573 | stda %f28,[%i0+%g0]0x88 ! Mem[0000000010001400] = 0000ffff 00000000 | |
31574 | ! Mem[0000000030181410] = 00009400, %l4 = 00000000ffff00ff | |
31575 | swapa [%i6+%o5]0x89,%l4 ! %l4 = 0000000000009400 | |
31576 | ! Mem[0000000030001400] = 00000000, %l7 = 00000000ffffffff | |
31577 | swapa [%i0+%g0]0x81,%l7 ! %l7 = 0000000000000000 | |
31578 | ! Mem[0000000010081410] = 00000003, %l3 = 00000000ff0000ff | |
31579 | swapa [%i2+%o5]0x88,%l3 ! %l3 = 0000000000000003 | |
31580 | ! %l3 = 0000000000000003, Mem[00000000218000c1] = 00ff8d82 | |
31581 | stb %l3,[%o3+0x0c1] ! Mem[00000000218000c0] = 00038d82 | |
31582 | ! Mem[0000000010101408] = c6000000, %l2 = 00000000000000c6 | |
31583 | swapa [%i4+%o4]0x88,%l2 ! %l2 = 00000000c6000000 | |
31584 | ! %f2 = ffffffff e6bf2212, %l3 = 0000000000000003 | |
31585 | ! Mem[0000000010081410] = ff0000ff000000c6 | |
31586 | add %i2,0x010,%g1 | |
31587 | stda %f2,[%g1+%l3]ASI_PST16_PL ! Mem[0000000010081410] = 1222bfe6000000c6 | |
31588 | ! Mem[0000000010141408] = ffffffff, %l6 = 00000000ffff00ff | |
31589 | ldstuba [%i5+%o4]0x80,%l6 ! %l6 = 000000ff000000ff | |
31590 | ! Starting 10 instruction Load Burst | |
31591 | ! Mem[0000000010141414] = ffffff00, %f7 = 00000000 | |
31592 | lda [%i5+0x014]%asi,%f7 ! %f7 = ffffff00 | |
31593 | ||
31594 | p0_label_759: | |
31595 | ! Mem[0000000030141410] = 00000000, %f0 = ff000000 | |
31596 | lda [%i5+%o5]0x81,%f0 ! %f0 = 00000000 | |
31597 | ! Mem[0000000010001410] = 0000000076c60000, %f24 = 000000ff f31200ff | |
31598 | ldda [%i0+%o5]0x88,%f24 ! %f24 = 00000000 76c60000 | |
31599 | ! Mem[0000000030101400] = 000000ff, %l1 = 0000000000000003 | |
31600 | lduha [%i4+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
31601 | ! Mem[0000000010001430] = ff00000000009400, %f26 = c7883403 00000003 | |
31602 | ldd [%i0+0x030],%f26 ! %f26 = ff000000 00009400 | |
31603 | ! Mem[0000000030141410] = 00000000, %l3 = 0000000000000003 | |
31604 | lduwa [%i5+%o5]0x89,%l3 ! %l3 = 0000000000000000 | |
31605 | ! Mem[0000000030081410] = 00000000ffff0000, %f30 = ffff0000 ffffff00 | |
31606 | ldda [%i2+%o5]0x81,%f30 ! %f30 = 00000000 ffff0000 | |
31607 | ! Mem[0000000030181400] = 00000000, %l7 = 0000000000000000 | |
31608 | lduba [%i6+%g0]0x89,%l7 ! %l7 = 0000000000000000 | |
31609 | ! Mem[0000000010001424] = 0000159c, %l7 = 0000000000000000 | |
31610 | lduha [%i0+0x024]%asi,%l7 ! %l7 = 0000000000000000 | |
31611 | ! Mem[00000000100c142c] = ff000000, %l5 = 00000000ffffffff | |
31612 | ldsba [%i3+0x02c]%asi,%l5 ! %l5 = ffffffffffffffff | |
31613 | ! Starting 10 instruction Store Burst | |
31614 | ! Mem[0000000030001400] = ffffffff, %l5 = ffffffffffffffff | |
31615 | ldstuba [%i0+%g0]0x89,%l5 ! %l5 = 000000ff000000ff | |
31616 | ||
31617 | p0_label_760: | |
31618 | ! %f0 = 00000000 ff000000, Mem[0000000010041408] = ffff00ff ffffffff | |
31619 | stda %f0 ,[%i1+%o4]0x80 ! Mem[0000000010041408] = 00000000 ff000000 | |
31620 | ! Mem[0000000010141410] = 00000000, %l3 = 0000000000000000, %asi = 80 | |
31621 | swapa [%i5+0x010]%asi,%l3 ! %l3 = 0000000000000000 | |
31622 | ! Mem[00000000211c0000] = ffff1a4c, %l0 = 0000000000009c00 | |
31623 | ldstuba [%o2+0x000]%asi,%l0 ! %l0 = 000000ff000000ff | |
31624 | ! Mem[0000000010001410] = 0000c676, %l5 = 00000000000000ff | |
31625 | swapa [%i0+%o5]0x80,%l5 ! %l5 = 000000000000c676 | |
31626 | ! %l4 = 00009400, %l5 = 0000c676, Mem[0000000030181408] = ff000000 ffffffff | |
31627 | stda %l4,[%i6+%o4]0x81 ! Mem[0000000030181408] = 00009400 0000c676 | |
31628 | ! %f16 = 00000000 000000ff 000000ff 00000000 | |
31629 | ! %f20 = ff000000 00ffffff 00ff0000 0000ff00 | |
31630 | ! %f24 = 00000000 76c60000 ff000000 00009400 | |
31631 | ! %f28 = 0000ffff 00000000 00000000 ffff0000 | |
31632 | stda %f16,[%i0]ASI_BLK_SL ! Block Store to 0000000030001400 | |
31633 | ! Mem[0000000010141400] = 00ff0000, %l6 = 00000000000000ff | |
31634 | ldstuba [%i5+%g0]0x88,%l6 ! %l6 = 00000000000000ff | |
31635 | ! %f12 = 000000ff 033488c7, Mem[0000000030181410] = ff00ffff 000000ff | |
31636 | stda %f12,[%i6+%o5]0x81 ! Mem[0000000030181410] = 000000ff 033488c7 | |
31637 | ! %l0 = 00000000000000ff, Mem[0000000030001400] = ff000000 | |
31638 | stha %l0,[%i0+%g0]0x81 ! Mem[0000000030001400] = 00ff0000 | |
31639 | ! Starting 10 instruction Load Burst | |
31640 | ! Mem[0000000030041410] = 000000ff, %l4 = 0000000000009400 | |
31641 | ldsha [%i1+%o5]0x89,%l4 ! %l4 = 00000000000000ff | |
31642 | ||
31643 | ! Check Point 152 for processor 0 | |
31644 | ||
31645 | set p0_check_pt_data_152,%g4 | |
31646 | rd %ccr,%g5 ! %g5 = 44 | |
31647 | ldx [%g4+0x08],%g2 | |
31648 | cmp %l0,%g2 ! %l0 = 00000000000000ff | |
31649 | bne %xcc,p0_reg_check_fail0 | |
31650 | mov 0xee0,%g1 | |
31651 | ldx [%g4+0x10],%g2 | |
31652 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
31653 | bne %xcc,p0_reg_check_fail1 | |
31654 | mov 0xee1,%g1 | |
31655 | ldx [%g4+0x18],%g2 | |
31656 | cmp %l2,%g2 ! %l2 = 00000000c6000000 | |
31657 | bne %xcc,p0_reg_check_fail2 | |
31658 | mov 0xee2,%g1 | |
31659 | ldx [%g4+0x20],%g2 | |
31660 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
31661 | bne %xcc,p0_reg_check_fail3 | |
31662 | mov 0xee3,%g1 | |
31663 | ldx [%g4+0x28],%g2 | |
31664 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
31665 | bne %xcc,p0_reg_check_fail4 | |
31666 | mov 0xee4,%g1 | |
31667 | ldx [%g4+0x30],%g2 | |
31668 | cmp %l5,%g2 ! %l5 = 000000000000c676 | |
31669 | bne %xcc,p0_reg_check_fail5 | |
31670 | mov 0xee5,%g1 | |
31671 | ldx [%g4+0x38],%g2 | |
31672 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
31673 | bne %xcc,p0_reg_check_fail6 | |
31674 | mov 0xee6,%g1 | |
31675 | ldx [%g4+0x40],%g2 | |
31676 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
31677 | bne %xcc,p0_reg_check_fail7 | |
31678 | mov 0xee7,%g1 | |
31679 | ldx [%g4+0x48],%g3 | |
31680 | std %f0,[%g4] | |
31681 | ldx [%g4],%g2 | |
31682 | cmp %g3,%g2 ! %f0 = 00000000 ff000000 | |
31683 | bne %xcc,p0_freg_check_fail | |
31684 | mov 0xf00,%g1 | |
31685 | ldx [%g4+0x50],%g3 | |
31686 | std %f4,[%g4] | |
31687 | ldx [%g4],%g2 | |
31688 | cmp %g3,%g2 ! %f4 = ff000000 e6bf2212 | |
31689 | bne %xcc,p0_freg_check_fail | |
31690 | mov 0xf04,%g1 | |
31691 | ldx [%g4+0x58],%g3 | |
31692 | std %f6,[%g4] | |
31693 | ldx [%g4],%g2 | |
31694 | cmp %g3,%g2 ! %f6 = 00ff0000 ffffff00 | |
31695 | bne %xcc,p0_freg_check_fail | |
31696 | mov 0xf06,%g1 | |
31697 | ldx [%g4+0x60],%g3 | |
31698 | std %f24,[%g4] | |
31699 | ldx [%g4],%g2 | |
31700 | cmp %g3,%g2 ! %f24 = 00000000 76c60000 | |
31701 | bne %xcc,p0_freg_check_fail | |
31702 | mov 0xf24,%g1 | |
31703 | ldx [%g4+0x68],%g3 | |
31704 | std %f26,[%g4] | |
31705 | ldx [%g4],%g2 | |
31706 | cmp %g3,%g2 ! %f26 = ff000000 00009400 | |
31707 | bne %xcc,p0_freg_check_fail | |
31708 | mov 0xf26,%g1 | |
31709 | ldx [%g4+0x70],%g3 | |
31710 | std %f30,[%g4] | |
31711 | ldx [%g4],%g2 | |
31712 | cmp %g3,%g2 ! %f30 = 00000000 ffff0000 | |
31713 | bne %xcc,p0_freg_check_fail | |
31714 | mov 0xf30,%g1 | |
31715 | ||
31716 | ! Check Point 152 completed | |
31717 | ||
31718 | ||
31719 | p0_label_761: | |
31720 | ! Mem[00000000100c1410] = ff000000, %l2 = 00000000c6000000 | |
31721 | ldstuba [%i3+%o5]0x80,%l2 ! %l2 = 000000ff000000ff | |
31722 | ! Mem[0000000030141408] = 0000ff00, %l4 = 00000000000000ff | |
31723 | lduwa [%i5+%o4]0x89,%l4 ! %l4 = 000000000000ff00 | |
31724 | ! Mem[0000000010141410] = 00000000, %l7 = 0000000000000000 | |
31725 | lduwa [%i5+%o5]0x80,%l7 ! %l7 = 0000000000000000 | |
31726 | ! Mem[0000000010141400] = 00ff00ff, %l6 = 0000000000000000 | |
31727 | ldsha [%i5+%g0]0x88,%l6 ! %l6 = 00000000000000ff | |
31728 | ! Mem[0000000010141438] = ffffffffffffffff, %f8 = 0000ff00 000000c6 | |
31729 | ldd [%i5+0x038],%f8 ! %f8 = ffffffff ffffffff | |
31730 | ! Mem[0000000010101400] = 00ff0000, %l7 = 0000000000000000 | |
31731 | lduba [%i4+%g0]0x88,%l7 ! %l7 = 0000000000000000 | |
31732 | membar #Sync ! Added by membar checker (129) | |
31733 | ! Mem[0000000010001410] = ff000000, %l7 = 0000000000000000 | |
31734 | lduwa [%i0+%o5]0x88,%l7 ! %l7 = 00000000ff000000 | |
31735 | ! Mem[00000000300c1408] = 76c6000000000000, %l2 = 00000000000000ff | |
31736 | ldxa [%i3+%o4]0x81,%l2 ! %l2 = 76c6000000000000 | |
31737 | ! Mem[0000000030101408] = 00000000, %l3 = 0000000000000000 | |
31738 | ldswa [%i4+%o4]0x89,%l3 ! %l3 = 0000000000000000 | |
31739 | ! Starting 10 instruction Store Burst | |
31740 | ! %l7 = 00000000ff000000, Mem[0000000010041408] = 00000000 | |
31741 | stba %l7,[%i1+%o4]0x88 ! Mem[0000000010041408] = 00000000 | |
31742 | ||
31743 | p0_label_762: | |
31744 | ! %f30 = 00000000 ffff0000, Mem[0000000030181408] = 00940000 76c60000 | |
31745 | stda %f30,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000 ffff0000 | |
31746 | ! Mem[0000000030001410] = 00ffffff, %l3 = 0000000000000000 | |
31747 | ldstuba [%i0+%o5]0x89,%l3 ! %l3 = 000000ff000000ff | |
31748 | ! %f24 = 00000000 76c60000, %l7 = 00000000ff000000 | |
31749 | ! Mem[0000000030041438] = 411f0000ffff00ff | |
31750 | add %i1,0x038,%g1 | |
31751 | stda %f24,[%g1+%l7]ASI_PST32_SL ! Mem[0000000030041438] = 411f0000ffff00ff | |
31752 | ! %f16 = 00000000 000000ff 000000ff 00000000 | |
31753 | ! %f20 = ff000000 00ffffff 00ff0000 0000ff00 | |
31754 | ! %f24 = 00000000 76c60000 ff000000 00009400 | |
31755 | ! %f28 = 0000ffff 00000000 00000000 ffff0000 | |
31756 | stda %f16,[%i0]ASI_BLK_SL ! Block Store to 0000000030001400 | |
31757 | ! Mem[0000000030081410] = 00000000, %l5 = 000000000000c676 | |
31758 | swapa [%i2+%o5]0x81,%l5 ! %l5 = 0000000000000000 | |
31759 | ! Mem[0000000010081400] = ff0000c6, %l7 = 00000000ff000000, %asi = 80 | |
31760 | swapa [%i2+0x000]%asi,%l7 ! %l7 = 00000000ff0000c6 | |
31761 | ! Mem[00000000201c0000] = 00039457, %l1 = 00000000000000ff | |
31762 | ldstuba [%o0+0x000]%asi,%l1 ! %l1 = 00000000000000ff | |
31763 | ! Mem[0000000030041400] = 000000ff, %l3 = 00000000000000ff | |
31764 | ldstuba [%i1+%g0]0x81,%l3 ! %l3 = 00000000000000ff | |
31765 | ! %l6 = 00000000000000ff, Mem[0000000010041400] = 00000000 | |
31766 | stha %l6,[%i1+%g0]0x88 ! Mem[0000000010041400] = 000000ff | |
31767 | ! Starting 10 instruction Load Burst | |
31768 | ! Mem[0000000010181410] = 000000ff033488c7, %f0 = 00000000 ff000000 | |
31769 | ldda [%i6+%o5]0x88,%f0 ! %f0 = 000000ff 033488c7 | |
31770 | ||
31771 | p0_label_763: | |
31772 | ! Mem[0000000010141410] = 00000000, %l1 = 0000000000000000 | |
31773 | lduwa [%i5+%o5]0x88,%l1 ! %l1 = 0000000000000000 | |
31774 | ! Mem[0000000030101400] = 000000ff, %l0 = 00000000000000ff | |
31775 | ldsba [%i4+%g0]0x89,%l0 ! %l0 = ffffffffffffffff | |
31776 | ! Mem[0000000030181410] = 000000ff, %f1 = 033488c7 | |
31777 | lda [%i6+%o5]0x81,%f1 ! %f1 = 000000ff | |
31778 | ! Mem[00000000211c0000] = ffff1a4c, %l0 = ffffffffffffffff | |
31779 | lduh [%o2+%g0],%l0 ! %l0 = 000000000000ffff | |
31780 | ! Mem[0000000010041410] = 00ff0000, %l3 = 0000000000000000 | |
31781 | ldsba [%i1+%o5]0x80,%l3 ! %l3 = 0000000000000000 | |
31782 | membar #Sync ! Added by membar checker (130) | |
31783 | ! Mem[0000000010001400] = 00000000, %l1 = 0000000000000000 | |
31784 | ldsba [%i0+%g0]0x80,%l1 ! %l1 = 0000000000000000 | |
31785 | ! Mem[0000000010141408] = ffffffff, %l6 = 00000000000000ff | |
31786 | lduwa [%i5+%o4]0x88,%l6 ! %l6 = 00000000ffffffff | |
31787 | ! Mem[0000000010141410] = 00000000 ffffff00, %l2 = 00000000, %l3 = 00000000 | |
31788 | ldda [%i5+%o5]0x80,%l2 ! %l2 = 0000000000000000 00000000ffffff00 | |
31789 | ! Mem[0000000030041408] = ff000000, %l5 = 0000000000000000 | |
31790 | lduwa [%i1+%o4]0x89,%l5 ! %l5 = 00000000ff000000 | |
31791 | ! Starting 10 instruction Store Burst | |
31792 | ! %l7 = 00000000ff0000c6, Mem[0000000010181408] = 000000ff00000000 | |
31793 | stxa %l7,[%i6+%o4]0x80 ! Mem[0000000010181408] = 00000000ff0000c6 | |
31794 | ||
31795 | p0_label_764: | |
31796 | ! %l5 = 00000000ff000000, Mem[00000000100c1400] = ff00000000000000 | |
31797 | stxa %l5,[%i3+%g0]0x80 ! Mem[00000000100c1400] = 00000000ff000000 | |
31798 | ! %l0 = 000000000000ffff, Mem[0000000030041400] = ff00ffffff0000ff | |
31799 | stxa %l0,[%i1+%g0]0x89 ! Mem[0000000030041400] = 000000000000ffff | |
31800 | ! %l1 = 0000000000000000, Mem[0000000010181410] = c7883403 | |
31801 | stba %l1,[%i6+%o5]0x80 ! Mem[0000000010181410] = 00883403 | |
31802 | ! Mem[0000000010001428] = ffffffff, %l5 = 00000000ff000000 | |
31803 | ldstub [%i0+0x028],%l5 ! %l5 = 000000ff000000ff | |
31804 | ! Mem[0000000010081408] = 000000c6, %l5 = 00000000000000ff | |
31805 | ldstuba [%i2+%o4]0x88,%l5 ! %l5 = 000000c6000000ff | |
31806 | ! Mem[000000001010142f] = 00000003, %l0 = 000000000000ffff | |
31807 | ldstuba [%i4+0x02f]%asi,%l0 ! %l0 = 00000003000000ff | |
31808 | ! %l2 = 00000000, %l3 = ffffff00, Mem[0000000010181400] = 000000ff 000000ff | |
31809 | stda %l2,[%i6+%g0]0x80 ! Mem[0000000010181400] = 00000000 ffffff00 | |
31810 | ! %l7 = 00000000ff0000c6, Mem[0000000010141410] = 00000000 | |
31811 | stwa %l7,[%i5+%o5]0x88 ! Mem[0000000010141410] = ff0000c6 | |
31812 | ! Mem[0000000010041404] = 00000012, %l1 = 0000000000000000 | |
31813 | swap [%i1+0x004],%l1 ! %l1 = 0000000000000012 | |
31814 | ! Starting 10 instruction Load Burst | |
31815 | ! Mem[0000000010101400] = 000000c6 00ff0000, %l6 = ffffffff, %l7 = ff0000c6 | |
31816 | ldda [%i4+%g0]0x88,%l6 ! %l6 = 0000000000ff0000 00000000000000c6 | |
31817 | ||
31818 | p0_label_765: | |
31819 | ! Mem[0000000010181400] = 00000000, %f0 = 000000ff | |
31820 | lda [%i6+%g0]0x80,%f0 ! %f0 = 00000000 | |
31821 | ! Mem[0000000010001430] = ff00000000009400, %l5 = 00000000000000c6 | |
31822 | ldx [%i0+0x030],%l5 ! %l5 = ff00000000009400 | |
31823 | ! Mem[0000000020800040] = ff007379, %l1 = 0000000000000012 | |
31824 | ldsb [%o1+0x040],%l1 ! %l1 = ffffffffffffffff | |
31825 | ! Mem[0000000010101410] = 00ffffff, %l6 = 0000000000ff0000 | |
31826 | lduba [%i4+%o5]0x80,%l6 ! %l6 = 0000000000000000 | |
31827 | ! Mem[0000000010141400] = 00ff00ff, %l5 = ff00000000009400 | |
31828 | ldsba [%i5+%g0]0x88,%l5 ! %l5 = ffffffffffffffff | |
31829 | ! Mem[00000000100c1408] = e6bf2212, %l6 = 0000000000000000 | |
31830 | lduba [%i3+%o4]0x88,%l6 ! %l6 = 0000000000000012 | |
31831 | ! Mem[0000000030081410] = 0000c676ffff0000, %f24 = 00000000 76c60000 | |
31832 | ldda [%i2+%o5]0x81,%f24 ! %f24 = 0000c676 ffff0000 | |
31833 | ! Mem[0000000030001400] = ff000000, %l3 = 00000000ffffff00 | |
31834 | lduba [%i0+%g0]0x81,%l3 ! %l3 = 00000000000000ff | |
31835 | ! Mem[0000000030081400] = 033488ff, %f23 = 0000ff00 | |
31836 | lda [%i2+%g0]0x89,%f23 ! %f23 = 033488ff | |
31837 | ! Starting 10 instruction Store Burst | |
31838 | ! %f29 = 00000000, Mem[0000000010141408] = ffffffff | |
31839 | sta %f29,[%i5+%o4]0x80 ! Mem[0000000010141408] = 00000000 | |
31840 | ||
31841 | ! Check Point 153 for processor 0 | |
31842 | ||
31843 | set p0_check_pt_data_153,%g4 | |
31844 | rd %ccr,%g5 ! %g5 = 44 | |
31845 | ldx [%g4+0x08],%g2 | |
31846 | cmp %l0,%g2 ! %l0 = 0000000000000003 | |
31847 | bne %xcc,p0_reg_check_fail0 | |
31848 | mov 0xee0,%g1 | |
31849 | ldx [%g4+0x10],%g2 | |
31850 | cmp %l1,%g2 ! %l1 = ffffffffffffffff | |
31851 | bne %xcc,p0_reg_check_fail1 | |
31852 | mov 0xee1,%g1 | |
31853 | ldx [%g4+0x18],%g2 | |
31854 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
31855 | bne %xcc,p0_reg_check_fail2 | |
31856 | mov 0xee2,%g1 | |
31857 | ldx [%g4+0x20],%g2 | |
31858 | cmp %l3,%g2 ! %l3 = 00000000000000ff | |
31859 | bne %xcc,p0_reg_check_fail3 | |
31860 | mov 0xee3,%g1 | |
31861 | ldx [%g4+0x28],%g2 | |
31862 | cmp %l4,%g2 ! %l4 = 000000000000ff00 | |
31863 | bne %xcc,p0_reg_check_fail4 | |
31864 | mov 0xee4,%g1 | |
31865 | ldx [%g4+0x30],%g2 | |
31866 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
31867 | bne %xcc,p0_reg_check_fail5 | |
31868 | mov 0xee5,%g1 | |
31869 | ldx [%g4+0x38],%g2 | |
31870 | cmp %l6,%g2 ! %l6 = 0000000000000012 | |
31871 | bne %xcc,p0_reg_check_fail6 | |
31872 | mov 0xee6,%g1 | |
31873 | ldx [%g4+0x40],%g2 | |
31874 | cmp %l7,%g2 ! %l7 = 00000000000000c6 | |
31875 | bne %xcc,p0_reg_check_fail7 | |
31876 | mov 0xee7,%g1 | |
31877 | ldx [%g4+0x48],%g3 | |
31878 | std %f0,[%g4] | |
31879 | ldx [%g4],%g2 | |
31880 | cmp %g3,%g2 ! %f0 = 00000000 000000ff | |
31881 | bne %xcc,p0_freg_check_fail | |
31882 | mov 0xf00,%g1 | |
31883 | ldx [%g4+0x50],%g3 | |
31884 | std %f2,[%g4] | |
31885 | ldx [%g4],%g2 | |
31886 | cmp %g3,%g2 ! %f2 = ffffffff e6bf2212 | |
31887 | bne %xcc,p0_freg_check_fail | |
31888 | mov 0xf02,%g1 | |
31889 | ldx [%g4+0x58],%g3 | |
31890 | std %f6,[%g4] | |
31891 | ldx [%g4],%g2 | |
31892 | cmp %g3,%g2 ! %f6 = 00ff0000 ffffff00 | |
31893 | bne %xcc,p0_freg_check_fail | |
31894 | mov 0xf06,%g1 | |
31895 | ldx [%g4+0x60],%g3 | |
31896 | std %f8,[%g4] | |
31897 | ldx [%g4],%g2 | |
31898 | cmp %g3,%g2 ! %f8 = ffffffff ffffffff | |
31899 | bne %xcc,p0_freg_check_fail | |
31900 | mov 0xf08,%g1 | |
31901 | ldx [%g4+0x68],%g3 | |
31902 | std %f22,[%g4] | |
31903 | ldx [%g4],%g2 | |
31904 | cmp %g3,%g2 ! %f22 = 00ff0000 033488ff | |
31905 | bne %xcc,p0_freg_check_fail | |
31906 | mov 0xf22,%g1 | |
31907 | ldx [%g4+0x70],%g3 | |
31908 | std %f24,[%g4] | |
31909 | ldx [%g4],%g2 | |
31910 | cmp %g3,%g2 ! %f24 = 0000c676 ffff0000 | |
31911 | bne %xcc,p0_freg_check_fail | |
31912 | mov 0xf24,%g1 | |
31913 | ||
31914 | ! Check Point 153 completed | |
31915 | ||
31916 | ||
31917 | p0_label_766: | |
31918 | ! Mem[00000000300c1408] = 0000c676, %l0 = 0000000000000003 | |
31919 | ldstuba [%i3+%o4]0x89,%l0 ! %l0 = 00000076000000ff | |
31920 | ! Mem[0000000010141410] = c60000ff, %l6 = 0000000000000012 | |
31921 | ldstuba [%i5+%o5]0x80,%l6 ! %l6 = 000000c6000000ff | |
31922 | ! Mem[0000000010041430] = 000000fff31200ff, %l3 = 00000000000000ff, %l1 = ffffffffffffffff | |
31923 | add %i1,0x30,%g1 | |
31924 | casxa [%g1]0x80,%l3,%l1 ! %l1 = 000000fff31200ff | |
31925 | ! Mem[0000000030141408] = 00ff0000, %l0 = 0000000000000076 | |
31926 | ldstuba [%i5+%o4]0x81,%l0 ! %l0 = 00000000000000ff | |
31927 | ! Mem[00000000300c1408] = 0000c6ff, %l5 = ffffffffffffffff | |
31928 | ldstuba [%i3+%o4]0x89,%l5 ! %l5 = 000000ff000000ff | |
31929 | ! Mem[0000000010001410] = 000000ff, %l7 = 00000000000000c6 | |
31930 | ldstuba [%i0+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
31931 | ! %l4 = 000000000000ff00, Mem[0000000010141408] = 00000000 | |
31932 | stha %l4,[%i5+%o4]0x80 ! Mem[0000000010141408] = ff000000 | |
31933 | ! %l0 = 0000000000000000, Mem[0000000030181408] = 0000ffff00000000 | |
31934 | stxa %l0,[%i6+%o4]0x81 ! Mem[0000000030181408] = 0000000000000000 | |
31935 | ! %l5 = 00000000000000ff, Mem[00000000300c1408] = 0000c6ff | |
31936 | stwa %l5,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 000000ff | |
31937 | ! Starting 10 instruction Load Burst | |
31938 | ! Mem[0000000010181410] = 00883403ff000000, %f28 = 0000ffff 00000000 | |
31939 | ldda [%i6+%o5]0x80,%f28 ! %f28 = 00883403 ff000000 | |
31940 | ||
31941 | p0_label_767: | |
31942 | ! Mem[0000000010041410] = 00ff0000, %l6 = 00000000000000c6 | |
31943 | lduwa [%i1+%o5]0x80,%l6 ! %l6 = 0000000000ff0000 | |
31944 | ! Mem[0000000010141430] = 000000ff, %l5 = 00000000000000ff | |
31945 | ldsh [%i5+0x030],%l5 ! %l5 = 0000000000000000 | |
31946 | ! Mem[0000000030041408] = 000000ff, %l2 = 0000000000000000 | |
31947 | lduba [%i1+%o4]0x81,%l2 ! %l2 = 0000000000000000 | |
31948 | ! Mem[0000000010181410] = 03348800, %l6 = 0000000000ff0000 | |
31949 | lduba [%i6+%o5]0x88,%l6 ! %l6 = 0000000000000000 | |
31950 | ! Mem[0000000030181400] = 00000000, %l3 = 00000000000000ff | |
31951 | ldswa [%i6+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
31952 | ! Mem[0000000030081408] = ff00ffff00009400, %f0 = 00000000 000000ff | |
31953 | ldda [%i2+%o4]0x81,%f0 ! %f0 = ff00ffff 00009400 | |
31954 | ! Mem[0000000010041410] = 00000000 0000ff00, %l0 = 00000000, %l1 = f31200ff | |
31955 | ldda [%i1+%o5]0x88,%l0 ! %l0 = 000000000000ff00 0000000000000000 | |
31956 | ! Mem[0000000030181400] = 00000000, %l0 = 000000000000ff00 | |
31957 | lduba [%i6+%g0]0x89,%l0 ! %l0 = 0000000000000000 | |
31958 | ! Mem[0000000030001400] = ff000000 00000000 00000000 ff000000 | |
31959 | ! Mem[0000000030001410] = ffffff00 000000ff 00ff0000 0000ff00 | |
31960 | ! Mem[0000000030001420] = 0000c676 00000000 00940000 000000ff | |
31961 | ! Mem[0000000030001430] = 00000000 ffff0000 0000ffff 00000000 | |
31962 | ldda [%i0]ASI_BLK_AIUS,%f0 ! Block Load from 0000000030001400 | |
31963 | ! Starting 10 instruction Store Burst | |
31964 | ! %f31 = ffff0000, Mem[0000000030141410] = 00000000 | |
31965 | sta %f31,[%i5+%o5]0x89 ! Mem[0000000030141410] = ffff0000 | |
31966 | ||
31967 | p0_label_768: | |
31968 | ! Mem[0000000010101410] = ffffff00, %l3 = 0000000000000000 | |
31969 | ldstuba [%i4+%o5]0x88,%l3 ! %l3 = 00000000000000ff | |
31970 | ! %l6 = 0000000000000000, Mem[0000000010101400] = 0000ff00 | |
31971 | stwa %l6,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00000000 | |
31972 | ! %l2 = 00000000, %l3 = 00000000, Mem[0000000010001400] = 00000000 0000ffff | |
31973 | stda %l2,[%i0+%g0]0x88 ! Mem[0000000010001400] = 00000000 00000000 | |
31974 | ! %l0 = 0000000000000000, Mem[00000000211c0000] = ffff1a4c, %asi = 80 | |
31975 | stha %l0,[%o2+0x000]%asi ! Mem[00000000211c0000] = 00001a4c | |
31976 | ! %l1 = 0000000000000000, Mem[0000000010101410] = ffffffff | |
31977 | stba %l1,[%i4+%o5]0x88 ! Mem[0000000010101410] = ffffff00 | |
31978 | membar #Sync ! Added by membar checker (131) | |
31979 | ! %f27 = 00009400, Mem[0000000030001400] = 000000ff | |
31980 | sta %f27,[%i0+%g0]0x89 ! Mem[0000000030001400] = 00009400 | |
31981 | ! %f12 = 00000000 ffff0000, Mem[0000000030181410] = ff000000 c7883403 | |
31982 | stda %f12,[%i6+%o5]0x89 ! Mem[0000000030181410] = 00000000 ffff0000 | |
31983 | ! Mem[000000001008141a] = 0000ffff, %l5 = 0000000000000000 | |
31984 | ldstub [%i2+0x01a],%l5 ! %l5 = 000000ff000000ff | |
31985 | ! %l2 = 0000000000000000, Mem[00000000211c0000] = 00001a4c, %asi = 80 | |
31986 | stha %l2,[%o2+0x000]%asi ! Mem[00000000211c0000] = 00001a4c | |
31987 | ! Starting 10 instruction Load Burst | |
31988 | ! Mem[0000000030181408] = 0000000000000000, %l0 = 0000000000000000 | |
31989 | ldxa [%i6+%o4]0x89,%l0 ! %l0 = 0000000000000000 | |
31990 | ||
31991 | p0_label_769: | |
31992 | ! Mem[0000000030181408] = 0000000000000000, %f8 = 0000c676 00000000 | |
31993 | ldda [%i6+%o4]0x81,%f8 ! %f8 = 00000000 00000000 | |
31994 | ! Mem[0000000010181408] = c60000ff 00000000, %l4 = 0000ff00, %l5 = 000000ff | |
31995 | ldda [%i6+%o4]0x88,%l4 ! %l4 = 0000000000000000 00000000c60000ff | |
31996 | ! Mem[00000000100c1408] = 1222bfe6 ffffffff, %l6 = 00000000, %l7 = 00000000 | |
31997 | ldda [%i3+0x008]%asi,%l6 ! %l6 = 000000001222bfe6 00000000ffffffff | |
31998 | ! Mem[0000000030101400] = 000000ff, %f28 = 00883403 | |
31999 | lda [%i4+%g0]0x89,%f28 ! %f28 = 000000ff | |
32000 | ! Mem[0000000030081408] = 00940000ffff00ff, %f24 = 0000c676 ffff0000 | |
32001 | ldda [%i2+%o4]0x89,%f24 ! %f24 = 00940000 ffff00ff | |
32002 | ! Mem[0000000010141408] = ff000000, %f19 = 00000000 | |
32003 | lda [%i5+%o4]0x80,%f19 ! %f19 = ff000000 | |
32004 | ! Mem[0000000020800040] = ff007379, %l1 = 0000000000000000 | |
32005 | lduba [%o1+0x041]%asi,%l1 ! %l1 = 0000000000000000 | |
32006 | ! Mem[00000000201c0000] = ff039457, %l3 = 0000000000000000 | |
32007 | ldsh [%o0+%g0],%l3 ! %l3 = ffffffffffffff03 | |
32008 | ! Mem[00000000100c1410] = 00009400000000ff, %f14 = 0000ffff 00000000 | |
32009 | ldda [%i3+%o5]0x88,%f14 ! %f14 = 00009400 000000ff | |
32010 | ! Starting 10 instruction Store Burst | |
32011 | ! Mem[0000000010001425] = 0000159c, %l0 = 0000000000000000 | |
32012 | ldstub [%i0+0x025],%l0 ! %l0 = 00000000000000ff | |
32013 | ||
32014 | p0_label_770: | |
32015 | ! %f0 = ff000000 00000000, %l1 = 0000000000000000 | |
32016 | ! Mem[00000000100c1410] = ff00000000940000 | |
32017 | add %i3,0x010,%g1 | |
32018 | stda %f0,[%g1+%l1]ASI_PST8_PL ! Mem[00000000100c1410] = ff00000000940000 | |
32019 | ! Mem[00000000100c1400] = 00000000, %l5 = 00000000c60000ff | |
32020 | ldstuba [%i3+%g0]0x88,%l5 ! %l5 = 00000000000000ff | |
32021 | ! %f7 = 0000ff00, Mem[0000000010001400] = 00000000 | |
32022 | sta %f7 ,[%i0+%g0]0x88 ! Mem[0000000010001400] = 0000ff00 | |
32023 | ! %f22 = 00ff0000, Mem[0000000010101430] = fffffc00 | |
32024 | st %f22,[%i4+0x030] ! Mem[0000000010101430] = 00ff0000 | |
32025 | ! %l1 = 0000000000000000, Mem[00000000211c0001] = 00001a4c, %asi = 80 | |
32026 | stba %l1,[%o2+0x001]%asi ! Mem[00000000211c0000] = 00001a4c | |
32027 | ! %f8 = 00000000 00000000, Mem[0000000010081410] = 1222bfe6 000000c6 | |
32028 | stda %f8 ,[%i2+%o5]0x80 ! Mem[0000000010081410] = 00000000 00000000 | |
32029 | ! %l0 = 0000000000000000, Mem[00000000211c0000] = 00001a4c | |
32030 | sth %l0,[%o2+%g0] ! Mem[00000000211c0000] = 00001a4c | |
32031 | ! Mem[00000000100c1400] = ff000000, %l0 = 0000000000000000 | |
32032 | swapa [%i3+%g0]0x80,%l0 ! %l0 = 00000000ff000000 | |
32033 | ! %f22 = 00ff0000 033488ff, Mem[0000000010181410] = 03348800 000000ff | |
32034 | stda %f22,[%i6+%o5]0x88 ! Mem[0000000010181410] = 00ff0000 033488ff | |
32035 | ! Starting 10 instruction Load Burst | |
32036 | ! Mem[0000000030141400] = 000000000000c676, %l2 = 0000000000000000 | |
32037 | ldxa [%i5+%g0]0x81,%l2 ! %l2 = 000000000000c676 | |
32038 | ||
32039 | ! Check Point 154 for processor 0 | |
32040 | ||
32041 | set p0_check_pt_data_154,%g4 | |
32042 | rd %ccr,%g5 ! %g5 = 44 | |
32043 | ldx [%g4+0x08],%g2 | |
32044 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
32045 | bne %xcc,p0_reg_check_fail0 | |
32046 | mov 0xee0,%g1 | |
32047 | ldx [%g4+0x10],%g2 | |
32048 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
32049 | bne %xcc,p0_reg_check_fail1 | |
32050 | mov 0xee1,%g1 | |
32051 | ldx [%g4+0x18],%g2 | |
32052 | cmp %l2,%g2 ! %l2 = 000000000000c676 | |
32053 | bne %xcc,p0_reg_check_fail2 | |
32054 | mov 0xee2,%g1 | |
32055 | ldx [%g4+0x20],%g2 | |
32056 | cmp %l3,%g2 ! %l3 = ffffffffffffff03 | |
32057 | bne %xcc,p0_reg_check_fail3 | |
32058 | mov 0xee3,%g1 | |
32059 | ldx [%g4+0x28],%g2 | |
32060 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
32061 | bne %xcc,p0_reg_check_fail5 | |
32062 | mov 0xee5,%g1 | |
32063 | ldx [%g4+0x30],%g2 | |
32064 | cmp %l6,%g2 ! %l6 = 000000001222bfe6 | |
32065 | bne %xcc,p0_reg_check_fail6 | |
32066 | mov 0xee6,%g1 | |
32067 | ldx [%g4+0x38],%g2 | |
32068 | cmp %l7,%g2 ! %l7 = 00000000ffffffff | |
32069 | bne %xcc,p0_reg_check_fail7 | |
32070 | mov 0xee7,%g1 | |
32071 | ldx [%g4+0x40],%g3 | |
32072 | std %f0,[%g4] | |
32073 | ldx [%g4],%g2 | |
32074 | cmp %g3,%g2 ! %f0 = ff000000 00000000 | |
32075 | bne %xcc,p0_freg_check_fail | |
32076 | mov 0xf00,%g1 | |
32077 | ldx [%g4+0x48],%g3 | |
32078 | std %f2,[%g4] | |
32079 | ldx [%g4],%g2 | |
32080 | cmp %g3,%g2 ! %f2 = 00000000 ff000000 | |
32081 | bne %xcc,p0_freg_check_fail | |
32082 | mov 0xf02,%g1 | |
32083 | ldx [%g4+0x50],%g3 | |
32084 | std %f4,[%g4] | |
32085 | ldx [%g4],%g2 | |
32086 | cmp %g3,%g2 ! %f4 = ffffff00 000000ff | |
32087 | bne %xcc,p0_freg_check_fail | |
32088 | mov 0xf04,%g1 | |
32089 | ldx [%g4+0x58],%g3 | |
32090 | std %f6,[%g4] | |
32091 | ldx [%g4],%g2 | |
32092 | cmp %g3,%g2 ! %f6 = 00ff0000 0000ff00 | |
32093 | bne %xcc,p0_freg_check_fail | |
32094 | mov 0xf06,%g1 | |
32095 | ldx [%g4+0x60],%g3 | |
32096 | std %f8,[%g4] | |
32097 | ldx [%g4],%g2 | |
32098 | cmp %g3,%g2 ! %f8 = 00000000 00000000 | |
32099 | bne %xcc,p0_freg_check_fail | |
32100 | mov 0xf08,%g1 | |
32101 | ldx [%g4+0x68],%g3 | |
32102 | std %f10,[%g4] | |
32103 | ldx [%g4],%g2 | |
32104 | cmp %g3,%g2 ! %f10 = 00940000 000000ff | |
32105 | bne %xcc,p0_freg_check_fail | |
32106 | mov 0xf10,%g1 | |
32107 | ldx [%g4+0x70],%g3 | |
32108 | std %f12,[%g4] | |
32109 | ldx [%g4],%g2 | |
32110 | cmp %g3,%g2 ! %f12 = 00000000 ffff0000 | |
32111 | bne %xcc,p0_freg_check_fail | |
32112 | mov 0xf12,%g1 | |
32113 | ldx [%g4+0x78],%g3 | |
32114 | std %f14,[%g4] | |
32115 | ldx [%g4],%g2 | |
32116 | cmp %g3,%g2 ! %f14 = 00009400 000000ff | |
32117 | bne %xcc,p0_freg_check_fail | |
32118 | mov 0xf14,%g1 | |
32119 | ldx [%g4+0x80],%g3 | |
32120 | std %f18,[%g4] | |
32121 | ldx [%g4],%g2 | |
32122 | cmp %g3,%g2 ! %f18 = 000000ff ff000000 | |
32123 | bne %xcc,p0_freg_check_fail | |
32124 | mov 0xf18,%g1 | |
32125 | ldx [%g4+0x88],%g3 | |
32126 | std %f24,[%g4] | |
32127 | ldx [%g4],%g2 | |
32128 | cmp %g3,%g2 ! %f24 = 00940000 ffff00ff | |
32129 | bne %xcc,p0_freg_check_fail | |
32130 | mov 0xf24,%g1 | |
32131 | ldx [%g4+0x90],%g3 | |
32132 | std %f28,[%g4] | |
32133 | ldx [%g4],%g2 | |
32134 | cmp %g3,%g2 ! %f28 = 000000ff ff000000 | |
32135 | bne %xcc,p0_freg_check_fail | |
32136 | mov 0xf28,%g1 | |
32137 | ||
32138 | ! Check Point 154 completed | |
32139 | ||
32140 | ||
32141 | p0_label_771: | |
32142 | ! Mem[0000000010101418] = 000000ff, %l3 = ffffffffffffff03 | |
32143 | ldsha [%i4+0x018]%asi,%l3 ! %l3 = 0000000000000000 | |
32144 | ! Mem[0000000030001400] = 00940000, %l4 = 0000000000000000 | |
32145 | ldsba [%i0+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
32146 | ! Mem[0000000010081408] = 000000ff, %l3 = 0000000000000000 | |
32147 | ldsha [%i2+%o4]0x88,%l3 ! %l3 = 00000000000000ff | |
32148 | ! Mem[0000000010141400] = 0000ffff00ff00ff, %f24 = 00940000 ffff00ff | |
32149 | ldda [%i5+%g0]0x88,%f24 ! %f24 = 0000ffff 00ff00ff | |
32150 | ! Mem[00000000100c1408] = ffffffffe6bf2212, %f8 = 00000000 00000000 | |
32151 | ldda [%i3+%o4]0x88,%f8 ! %f8 = ffffffff e6bf2212 | |
32152 | ! Mem[0000000010101400] = 00000000, %f17 = 000000ff | |
32153 | lda [%i4+%g0]0x88,%f17 ! %f17 = 00000000 | |
32154 | ! Mem[0000000010141400] = ff00ff00, %l6 = 000000001222bfe6 | |
32155 | ldsba [%i5+%g0]0x80,%l6 ! %l6 = ffffffffffffffff | |
32156 | ! Mem[0000000010181428] = 00ff0000, %l7 = 00000000ffffffff | |
32157 | ldsba [%i6+0x029]%asi,%l7 ! %l7 = ffffffffffffffff | |
32158 | ! Mem[00000000100c1408] = e6bf2212, %l1 = 0000000000000000 | |
32159 | lduwa [%i3+%o4]0x88,%l1 ! %l1 = 00000000e6bf2212 | |
32160 | ! Starting 10 instruction Store Burst | |
32161 | ! %l2 = 000000000000c676, Mem[0000000030001408] = 00000000ff000000 | |
32162 | stxa %l2,[%i0+%o4]0x81 ! Mem[0000000030001408] = 000000000000c676 | |
32163 | ||
32164 | p0_label_772: | |
32165 | ! %l2 = 000000000000c676, Mem[0000000010101408] = 000000c6 | |
32166 | stha %l2,[%i4+%o4]0x88 ! Mem[0000000010101408] = 0000c676 | |
32167 | ! Mem[000000001014143c] = ffffffff, %l3 = 00000000000000ff, %asi = 80 | |
32168 | swapa [%i5+0x03c]%asi,%l3 ! %l3 = 00000000ffffffff | |
32169 | ! Mem[0000000030081410] = 0000c676, %l1 = 00000000e6bf2212 | |
32170 | ldstuba [%i2+%o5]0x81,%l1 ! %l1 = 00000000000000ff | |
32171 | ! %l7 = ffffffffffffffff, Mem[00000000300c1408] = 000000ff | |
32172 | stba %l7,[%i3+%o4]0x89 ! Mem[00000000300c1408] = 000000ff | |
32173 | ! Mem[0000000030001400] = 00940000, %l7 = ffffffffffffffff | |
32174 | ldstuba [%i0+%g0]0x81,%l7 ! %l7 = 00000000000000ff | |
32175 | ! %l4 = 0000000000000000, Mem[00000000218001c0] = 9c002a00, %asi = 80 | |
32176 | stha %l4,[%o3+0x1c0]%asi ! Mem[00000000218001c0] = 00002a00 | |
32177 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000010001408] = ff000000 00000000 | |
32178 | std %l4,[%i0+%o4] ! Mem[0000000010001408] = 00000000 00000000 | |
32179 | ! %l6 = ffffffff, %l7 = 00000000, Mem[0000000010081400] = ff000000 000000c6 | |
32180 | stda %l6,[%i2+%g0]0x80 ! Mem[0000000010081400] = ffffffff 00000000 | |
32181 | ! %l4 = 0000000000000000, Mem[00000000100c1420] = 03000000, %asi = 80 | |
32182 | stwa %l4,[%i3+0x020]%asi ! Mem[00000000100c1420] = 00000000 | |
32183 | ! Starting 10 instruction Load Burst | |
32184 | ! Mem[00000000300c1410] = ff00000000ff0000, %f18 = 000000ff ff000000 | |
32185 | ldda [%i3+%o5]0x89,%f18 ! %f18 = ff000000 00ff0000 | |
32186 | ||
32187 | p0_label_773: | |
32188 | ! Mem[0000000010081434] = 0000ff00, %l0 = 00000000ff000000 | |
32189 | ldsha [%i2+0x034]%asi,%l0 ! %l0 = 0000000000000000 | |
32190 | ! Mem[0000000010041400] = ff000000, %l3 = 00000000ffffffff | |
32191 | lduha [%i1+%g0]0x80,%l3 ! %l3 = 000000000000ff00 | |
32192 | ! %f14 = 00009400 000000ff, Mem[0000000030081410] = 76c600ff 0000ffff | |
32193 | stda %f14,[%i2+%o5]0x89 ! Mem[0000000030081410] = 00009400 000000ff | |
32194 | ! Mem[0000000030041408] = 000000ff, %l4 = 0000000000000000 | |
32195 | lduba [%i1+%o4]0x81,%l4 ! %l4 = 0000000000000000 | |
32196 | ! Mem[0000000030041400] = ffff0000 00000000 000000ff 00000000 | |
32197 | ! Mem[0000000030041410] = ff000000 00ffffff 00000000 ff000000 | |
32198 | ! Mem[0000000030041420] = f31200ff 00ff0000 00000000 0000ff00 | |
32199 | ! Mem[0000000030041430] = 00ff0000 033488c7 411f0000 ffff00ff | |
32200 | ldda [%i1]ASI_BLK_S,%f16 ! Block Load from 0000000030041400 | |
32201 | ! Mem[0000000010181400] = 00ffffff00000000, %l4 = 0000000000000000 | |
32202 | ldxa [%i6+%g0]0x88,%l4 ! %l4 = 00ffffff00000000 | |
32203 | ! Mem[0000000010101410] = 00ffffff, %f9 = e6bf2212 | |
32204 | lda [%i4+0x010]%asi,%f9 ! %f9 = 00ffffff | |
32205 | ! Mem[0000000010081408] = ff00000000ff0000, %f4 = ffffff00 000000ff | |
32206 | ldda [%i2+%o4]0x80,%f4 ! %f4 = ff000000 00ff0000 | |
32207 | ! Mem[0000000030001408] = 000000000000c676, %f4 = ff000000 00ff0000 | |
32208 | ldda [%i0+%o4]0x81,%f4 ! %f4 = 00000000 0000c676 | |
32209 | ! Starting 10 instruction Store Burst | |
32210 | ! Mem[00000000218000c1] = 00038d82, %l7 = 0000000000000000 | |
32211 | ldstuba [%o3+0x0c1]%asi,%l7 ! %l7 = 00000003000000ff | |
32212 | ||
32213 | p0_label_774: | |
32214 | ! Mem[0000000030001400] = ff940000, %l6 = ffffffffffffffff | |
32215 | ldstuba [%i0+%g0]0x81,%l6 ! %l6 = 000000ff000000ff | |
32216 | ! %l3 = 000000000000ff00, Mem[0000000030141410] = 0000ffff | |
32217 | stba %l3,[%i5+%o5]0x81 ! Mem[0000000030141410] = 0000ffff | |
32218 | ! %f4 = 00000000 0000c676, Mem[0000000010081408] = ff000000 00ff0000 | |
32219 | stda %f4 ,[%i2+%o4]0x80 ! Mem[0000000010081408] = 00000000 0000c676 | |
32220 | ! Mem[0000000030041410] = 000000ff, %l2 = 000000000000c676 | |
32221 | ldstuba [%i1+%o5]0x89,%l2 ! %l2 = 000000ff000000ff | |
32222 | ! Mem[0000000010181408] = 00000000, %l7 = 0000000000000003 | |
32223 | ldstuba [%i6+%o4]0x80,%l7 ! %l7 = 00000000000000ff | |
32224 | ! %f6 = 00ff0000 0000ff00, %l7 = 0000000000000000 | |
32225 | ! Mem[0000000010101410] = 00ffffff00000000 | |
32226 | add %i4,0x010,%g1 | |
32227 | stda %f6,[%g1+%l7]ASI_PST32_P ! Mem[0000000010101410] = 00ffffff00000000 | |
32228 | ! %l5 = 0000000000000000, Mem[00000000300c1400] = 0300000000000000 | |
32229 | stxa %l5,[%i3+%g0]0x81 ! Mem[00000000300c1400] = 0000000000000000 | |
32230 | ! %l1 = 0000000000000000, Mem[0000000010041400] = ff00000000000000 | |
32231 | stxa %l1,[%i1+%g0]0x80 ! Mem[0000000010041400] = 0000000000000000 | |
32232 | ! %f2 = 00000000 ff000000, Mem[0000000010101410] = 00ffffff 00000000 | |
32233 | std %f2 ,[%i4+%o5] ! Mem[0000000010101410] = 00000000 ff000000 | |
32234 | ! Starting 10 instruction Load Burst | |
32235 | ! Mem[0000000030041400] = 000000000000ffff, %l1 = 0000000000000000 | |
32236 | ldxa [%i1+%g0]0x89,%l1 ! %l1 = 000000000000ffff | |
32237 | ||
32238 | p0_label_775: | |
32239 | ! Mem[0000000010081400] = ffffffff, %f9 = 00ffffff | |
32240 | lda [%i2+%g0]0x88,%f9 ! %f9 = ffffffff | |
32241 | ! Mem[0000000010001400] = 000000000000ff00, %l5 = 0000000000000000 | |
32242 | ldxa [%i0+%g0]0x88,%l5 ! %l5 = 000000000000ff00 | |
32243 | ! Mem[0000000010141400] = ff00ff00, %l4 = 00ffffff00000000 | |
32244 | lduwa [%i5+%g0]0x80,%l4 ! %l4 = 00000000ff00ff00 | |
32245 | ! Mem[000000001000142c] = 79ff00ff, %l4 = 00000000ff00ff00 | |
32246 | lduw [%i0+0x02c],%l4 ! %l4 = 0000000079ff00ff | |
32247 | ! Mem[00000000100c1408] = e6bf2212, %f1 = 00000000 | |
32248 | lda [%i3+%o4]0x88,%f1 ! %f1 = e6bf2212 | |
32249 | ! Mem[0000000010081408] = 00000000, %l5 = 000000000000ff00 | |
32250 | lduba [%i2+%o4]0x80,%l5 ! %l5 = 0000000000000000 | |
32251 | ! Mem[0000000030141400] = 00000000, %l0 = 0000000000000000 | |
32252 | ldsha [%i5+%g0]0x81,%l0 ! %l0 = 0000000000000000 | |
32253 | ! Mem[0000000030181410] = ffff0000, %l2 = 00000000000000ff | |
32254 | ldsba [%i6+%o5]0x89,%l2 ! %l2 = 0000000000000000 | |
32255 | ! Mem[0000000030081400] = ff883403, %l4 = 0000000079ff00ff | |
32256 | lduwa [%i2+%g0]0x81,%l4 ! %l4 = 00000000ff883403 | |
32257 | ! Starting 10 instruction Store Burst | |
32258 | ! %l3 = 000000000000ff00, Mem[000000001008141d] = 0000ff79 | |
32259 | stb %l3,[%i2+0x01d] ! Mem[000000001008141c] = 0000ff79 | |
32260 | ||
32261 | ! Check Point 155 for processor 0 | |
32262 | ||
32263 | set p0_check_pt_data_155,%g4 | |
32264 | rd %ccr,%g5 ! %g5 = 44 | |
32265 | ldx [%g4+0x08],%g2 | |
32266 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
32267 | bne %xcc,p0_reg_check_fail0 | |
32268 | mov 0xee0,%g1 | |
32269 | ldx [%g4+0x10],%g2 | |
32270 | cmp %l1,%g2 ! %l1 = 000000000000ffff | |
32271 | bne %xcc,p0_reg_check_fail1 | |
32272 | mov 0xee1,%g1 | |
32273 | ldx [%g4+0x18],%g2 | |
32274 | cmp %l2,%g2 ! %l2 = 0000000000000000 | |
32275 | bne %xcc,p0_reg_check_fail2 | |
32276 | mov 0xee2,%g1 | |
32277 | ldx [%g4+0x20],%g2 | |
32278 | cmp %l3,%g2 ! %l3 = 000000000000ff00 | |
32279 | bne %xcc,p0_reg_check_fail3 | |
32280 | mov 0xee3,%g1 | |
32281 | ldx [%g4+0x28],%g2 | |
32282 | cmp %l4,%g2 ! %l4 = 00000000ff883403 | |
32283 | bne %xcc,p0_reg_check_fail4 | |
32284 | mov 0xee4,%g1 | |
32285 | ldx [%g4+0x30],%g2 | |
32286 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
32287 | bne %xcc,p0_reg_check_fail5 | |
32288 | mov 0xee5,%g1 | |
32289 | ldx [%g4+0x38],%g2 | |
32290 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
32291 | bne %xcc,p0_reg_check_fail6 | |
32292 | mov 0xee6,%g1 | |
32293 | ldx [%g4+0x40],%g2 | |
32294 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
32295 | bne %xcc,p0_reg_check_fail7 | |
32296 | mov 0xee7,%g1 | |
32297 | ldx [%g4+0x48],%g3 | |
32298 | std %f0,[%g4] | |
32299 | ldx [%g4],%g2 | |
32300 | cmp %g3,%g2 ! %f0 = ff000000 e6bf2212 | |
32301 | bne %xcc,p0_freg_check_fail | |
32302 | mov 0xf00,%g1 | |
32303 | ldx [%g4+0x50],%g3 | |
32304 | std %f4,[%g4] | |
32305 | ldx [%g4],%g2 | |
32306 | cmp %g3,%g2 ! %f4 = 00000000 0000c676 | |
32307 | bne %xcc,p0_freg_check_fail | |
32308 | mov 0xf04,%g1 | |
32309 | ldx [%g4+0x58],%g3 | |
32310 | std %f8,[%g4] | |
32311 | ldx [%g4],%g2 | |
32312 | cmp %g3,%g2 ! %f8 = ffffffff ffffffff | |
32313 | bne %xcc,p0_freg_check_fail | |
32314 | mov 0xf08,%g1 | |
32315 | ldx [%g4+0x60],%g3 | |
32316 | std %f16,[%g4] | |
32317 | ldx [%g4],%g2 | |
32318 | cmp %g3,%g2 ! %f16 = ffff0000 00000000 | |
32319 | bne %xcc,p0_freg_check_fail | |
32320 | mov 0xf16,%g1 | |
32321 | ldx [%g4+0x68],%g3 | |
32322 | std %f18,[%g4] | |
32323 | ldx [%g4],%g2 | |
32324 | cmp %g3,%g2 ! %f18 = 000000ff 00000000 | |
32325 | bne %xcc,p0_freg_check_fail | |
32326 | mov 0xf18,%g1 | |
32327 | ldx [%g4+0x70],%g3 | |
32328 | std %f20,[%g4] | |
32329 | ldx [%g4],%g2 | |
32330 | cmp %g3,%g2 ! %f20 = ff000000 00ffffff | |
32331 | bne %xcc,p0_freg_check_fail | |
32332 | mov 0xf20,%g1 | |
32333 | ldx [%g4+0x78],%g3 | |
32334 | std %f22,[%g4] | |
32335 | ldx [%g4],%g2 | |
32336 | cmp %g3,%g2 ! %f22 = 00000000 ff000000 | |
32337 | bne %xcc,p0_freg_check_fail | |
32338 | mov 0xf22,%g1 | |
32339 | ldx [%g4+0x80],%g3 | |
32340 | std %f24,[%g4] | |
32341 | ldx [%g4],%g2 | |
32342 | cmp %g3,%g2 ! %f24 = f31200ff 00ff0000 | |
32343 | bne %xcc,p0_freg_check_fail | |
32344 | mov 0xf24,%g1 | |
32345 | ldx [%g4+0x88],%g3 | |
32346 | std %f26,[%g4] | |
32347 | ldx [%g4],%g2 | |
32348 | cmp %g3,%g2 ! %f26 = 00000000 0000ff00 | |
32349 | bne %xcc,p0_freg_check_fail | |
32350 | mov 0xf26,%g1 | |
32351 | ldx [%g4+0x90],%g3 | |
32352 | std %f28,[%g4] | |
32353 | ldx [%g4],%g2 | |
32354 | cmp %g3,%g2 ! %f28 = 00ff0000 033488c7 | |
32355 | bne %xcc,p0_freg_check_fail | |
32356 | mov 0xf28,%g1 | |
32357 | ldx [%g4+0x98],%g3 | |
32358 | std %f30,[%g4] | |
32359 | ldx [%g4],%g2 | |
32360 | cmp %g3,%g2 ! %f30 = 411f0000 ffff00ff | |
32361 | bne %xcc,p0_freg_check_fail | |
32362 | mov 0xf30,%g1 | |
32363 | ||
32364 | ! Check Point 155 completed | |
32365 | ||
32366 | ||
32367 | p0_label_776: | |
32368 | ! %l2 = 0000000000000000, Mem[0000000010141400] = ff00ff00 | |
32369 | stba %l2,[%i5+%g0]0x80 ! Mem[0000000010141400] = 0000ff00 | |
32370 | ! %l0 = 0000000000000000, Mem[0000000030181408] = 00000000 | |
32371 | stha %l0,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000000 | |
32372 | ! %l7 = 0000000000000000, Mem[0000000030141410] = 0000ffff | |
32373 | stwa %l7,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 | |
32374 | ! %l5 = 0000000000000000, Mem[0000000010081428] = 03000000, %asi = 80 | |
32375 | stba %l5,[%i2+0x028]%asi ! Mem[0000000010081428] = 00000000 | |
32376 | ! %l2 = 0000000000000000, Mem[0000000021800180] = ffffe2ae, %asi = 80 | |
32377 | stba %l2,[%o3+0x180]%asi ! Mem[0000000021800180] = 00ffe2ae | |
32378 | ! Mem[0000000030101410] = ff000000, %l1 = 000000000000ffff | |
32379 | ldstuba [%i4+%o5]0x81,%l1 ! %l1 = 000000ff000000ff | |
32380 | ! %l6 = 00000000000000ff, Mem[0000000030001410] = 00ffffff | |
32381 | stha %l6,[%i0+%o5]0x89 ! Mem[0000000030001410] = 00ff00ff | |
32382 | ! %l5 = 0000000000000000, Mem[0000000030141408] = 0000ffff | |
32383 | stha %l5,[%i5+%o4]0x89 ! Mem[0000000030141408] = 00000000 | |
32384 | ! Mem[0000000030081408] = ff00ffff, %l6 = 00000000000000ff | |
32385 | ldstuba [%i2+%o4]0x81,%l6 ! %l6 = 000000ff000000ff | |
32386 | ! Starting 10 instruction Load Burst | |
32387 | ! Mem[0000000010001400] = 0000ff00, %l5 = 0000000000000000 | |
32388 | lduha [%i0+%g0]0x88,%l5 ! %l5 = 000000000000ff00 | |
32389 | ||
32390 | p0_label_777: | |
32391 | ! Mem[00000000201c0000] = ff039457, %l0 = 0000000000000000 | |
32392 | lduha [%o0+0x000]%asi,%l0 ! %l0 = 000000000000ff03 | |
32393 | ! Mem[0000000030141410] = 00940000 00000000, %l4 = ff883403, %l5 = 0000ff00 | |
32394 | ldda [%i5+%o5]0x89,%l4 ! %l4 = 0000000000000000 0000000000940000 | |
32395 | ! Mem[0000000010081400] = ffffffff, %l3 = 000000000000ff00 | |
32396 | lduha [%i2+%g0]0x80,%l3 ! %l3 = 000000000000ffff | |
32397 | ! Mem[0000000030101410] = ff0000000000ffff, %l3 = 000000000000ffff | |
32398 | ldxa [%i4+%o5]0x81,%l3 ! %l3 = ff0000000000ffff | |
32399 | ! Mem[0000000010001400] = 0000ff00, %l5 = 0000000000940000 | |
32400 | ldsba [%i0+%g0]0x88,%l5 ! %l5 = 0000000000000000 | |
32401 | ! Mem[0000000030001400] = ff940000, %l2 = 0000000000000000 | |
32402 | lduba [%i0+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
32403 | ! Mem[00000000300c1400] = 00000000, %l3 = ff0000000000ffff | |
32404 | ldsba [%i3+%g0]0x89,%l3 ! %l3 = 0000000000000000 | |
32405 | ! Mem[0000000030081410] = ff000000, %f8 = ffffffff | |
32406 | lda [%i2+%o5]0x81,%f8 ! %f8 = ff000000 | |
32407 | ! Mem[0000000020800040] = ff007379, %l5 = 0000000000000000 | |
32408 | ldub [%o1+0x040],%l5 ! %l5 = 00000000000000ff | |
32409 | ! Starting 10 instruction Store Burst | |
32410 | ! %l0 = 000000000000ff03, Mem[0000000030101400] = ffff0000000000ff | |
32411 | stxa %l0,[%i4+%g0]0x89 ! Mem[0000000030101400] = 000000000000ff03 | |
32412 | ||
32413 | p0_label_778: | |
32414 | ! %l6 = 000000ff, %l7 = 00000000, Mem[0000000030141408] = 00000000 00000000 | |
32415 | stda %l6,[%i5+%o4]0x89 ! Mem[0000000030141408] = 000000ff 00000000 | |
32416 | membar #Sync ! Added by membar checker (132) | |
32417 | ! %l6 = 000000ff, %l7 = 00000000, Mem[0000000030041400] = 0000ffff 00000000 | |
32418 | stda %l6,[%i1+%g0]0x89 ! Mem[0000000030041400] = 000000ff 00000000 | |
32419 | ! Mem[0000000010101408] = 76c60000, %l6 = 00000000000000ff | |
32420 | ldstuba [%i4+%o4]0x80,%l6 ! %l6 = 00000076000000ff | |
32421 | ! %f12 = 00000000, Mem[0000000030001408] = 00000000 | |
32422 | sta %f12,[%i0+%o4]0x89 ! Mem[0000000030001408] = 00000000 | |
32423 | ! Mem[0000000030181408] = 00000000, %l4 = 0000000000000000 | |
32424 | ldstuba [%i6+%o4]0x81,%l4 ! %l4 = 00000000000000ff | |
32425 | ! Mem[0000000010041400] = 00000000, %l7 = 0000000000000000 | |
32426 | ldstuba [%i1+%g0]0x88,%l7 ! %l7 = 00000000000000ff | |
32427 | ! %l6 = 00000076, %l7 = 00000000, Mem[0000000010141408] = 000000ff 00000000 | |
32428 | stda %l6,[%i5+%o4]0x88 ! Mem[0000000010141408] = 00000076 00000000 | |
32429 | ! %l1 = 00000000000000ff, Mem[0000000010101438] = 0000000000000000 | |
32430 | stx %l1,[%i4+0x038] ! Mem[0000000010101438] = 00000000000000ff | |
32431 | ! Mem[0000000010181400] = 00000000ffffff00, %l3 = 0000000000000000, %l4 = 0000000000000000 | |
32432 | casxa [%i6]0x80,%l3,%l4 ! %l4 = 00000000ffffff00 | |
32433 | ! Starting 10 instruction Load Burst | |
32434 | ! Mem[0000000010141410] = ff0000ff, %f6 = 00ff0000 | |
32435 | lda [%i5+%o5]0x88,%f6 ! %f6 = ff0000ff | |
32436 | ||
32437 | p0_label_779: | |
32438 | ! Mem[0000000010141410] = ff0000ff, %l4 = 00000000ffffff00 | |
32439 | lduba [%i5+%o5]0x88,%l4 ! %l4 = 00000000000000ff | |
32440 | ! Mem[0000000010181410] = ff883403, %f27 = 0000ff00 | |
32441 | lda [%i6+%o5]0x80,%f27 ! %f27 = ff883403 | |
32442 | ! Mem[0000000030001408] = 000000000000c676, %f16 = ffff0000 00000000 | |
32443 | ldda [%i0+%o4]0x81,%f16 ! %f16 = 00000000 0000c676 | |
32444 | ! %l6 = 00000076, %l7 = 00000000, Mem[0000000030041408] = ff000000 00000000 | |
32445 | stda %l6,[%i1+%o4]0x89 ! Mem[0000000030041408] = 00000076 00000000 | |
32446 | ! Mem[0000000010001400] = 00ff0000, %f28 = 00ff0000 | |
32447 | lda [%i0+%g0]0x80,%f28 ! %f28 = 00ff0000 | |
32448 | ! Mem[0000000010081414] = 00000000, %l3 = 0000000000000000 | |
32449 | lduha [%i2+0x016]%asi,%l3 ! %l3 = 0000000000000000 | |
32450 | ! Mem[0000000010181408] = ff000000, %l3 = 0000000000000000 | |
32451 | ldsh [%i6+0x00a],%l3 ! %l3 = 0000000000000000 | |
32452 | ! Mem[0000000010141408] = 0000000000000076, %l0 = 000000000000ff03 | |
32453 | ldxa [%i5+%o4]0x88,%l0 ! %l0 = 0000000000000076 | |
32454 | ! Mem[0000000010001438] = 7827da3e 597bac10, %l2 = 000000ff, %l3 = 00000000 | |
32455 | ldd [%i0+0x038],%l2 ! %l2 = 000000007827da3e 00000000597bac10 | |
32456 | ! Starting 10 instruction Store Burst | |
32457 | ! %f14 = 00009400, Mem[0000000010181428] = 00ff0000 | |
32458 | sta %f14,[%i6+0x028]%asi ! Mem[0000000010181428] = 00009400 | |
32459 | ||
32460 | p0_label_780: | |
32461 | ! %f28 = 00ff0000, Mem[0000000030181408] = 000000ff | |
32462 | sta %f28,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00ff0000 | |
32463 | ! Mem[0000000010001400] = 0000ff00, %l2 = 000000007827da3e | |
32464 | swapa [%i0+%g0]0x88,%l2 ! %l2 = 000000000000ff00 | |
32465 | ! %l7 = 0000000000000000, Mem[0000000010081400] = ffffffff | |
32466 | stwa %l7,[%i2+%g0]0x88 ! Mem[0000000010081400] = 00000000 | |
32467 | ! %l2 = 000000000000ff00, Mem[0000000010181408] = ff000000 | |
32468 | stwa %l2,[%i6+%o4]0x80 ! Mem[0000000010181408] = 0000ff00 | |
32469 | ! %l2 = 0000ff00, %l3 = 597bac10, Mem[0000000010141410] = ff0000ff 00ffffff | |
32470 | stda %l2,[%i5+%o5]0x88 ! Mem[0000000010141410] = 0000ff00 597bac10 | |
32471 | ! %l6 = 00000076, %l7 = 00000000, Mem[0000000010041400] = ff000000 00000000 | |
32472 | stda %l6,[%i1+%g0]0x80 ! Mem[0000000010041400] = 00000076 00000000 | |
32473 | ! %l4 = 000000ff, %l5 = 000000ff, Mem[0000000030001400] = ff940000 00000000 | |
32474 | stda %l4,[%i0+%g0]0x81 ! Mem[0000000030001400] = 000000ff 000000ff | |
32475 | ! %l2 = 000000000000ff00, Mem[0000000030041410] = 000000ff | |
32476 | stwa %l2,[%i1+%o5]0x89 ! Mem[0000000030041410] = 0000ff00 | |
32477 | ! Mem[00000000100c1410] = 000000ff, %l5 = 00000000000000ff | |
32478 | swapa [%i3+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
32479 | ! Starting 10 instruction Load Burst | |
32480 | ! Mem[0000000010081404] = 00000000, %l3 = 00000000597bac10 | |
32481 | ldsb [%i2+0x004],%l3 ! %l3 = 0000000000000000 | |
32482 | ||
32483 | ! Check Point 156 for processor 0 | |
32484 | ||
32485 | set p0_check_pt_data_156,%g4 | |
32486 | rd %ccr,%g5 ! %g5 = 44 | |
32487 | ldx [%g4+0x08],%g2 | |
32488 | cmp %l0,%g2 ! %l0 = 0000000000000076 | |
32489 | bne %xcc,p0_reg_check_fail0 | |
32490 | mov 0xee0,%g1 | |
32491 | ldx [%g4+0x10],%g2 | |
32492 | cmp %l1,%g2 ! %l1 = 00000000000000ff | |
32493 | bne %xcc,p0_reg_check_fail1 | |
32494 | mov 0xee1,%g1 | |
32495 | ldx [%g4+0x18],%g2 | |
32496 | cmp %l2,%g2 ! %l2 = 000000000000ff00 | |
32497 | bne %xcc,p0_reg_check_fail2 | |
32498 | mov 0xee2,%g1 | |
32499 | ldx [%g4+0x20],%g2 | |
32500 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
32501 | bne %xcc,p0_reg_check_fail3 | |
32502 | mov 0xee3,%g1 | |
32503 | ldx [%g4+0x28],%g2 | |
32504 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
32505 | bne %xcc,p0_reg_check_fail4 | |
32506 | mov 0xee4,%g1 | |
32507 | ldx [%g4+0x30],%g2 | |
32508 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
32509 | bne %xcc,p0_reg_check_fail5 | |
32510 | mov 0xee5,%g1 | |
32511 | ldx [%g4+0x38],%g2 | |
32512 | cmp %l6,%g2 ! %l6 = 0000000000000076 | |
32513 | bne %xcc,p0_reg_check_fail6 | |
32514 | mov 0xee6,%g1 | |
32515 | ldx [%g4+0x40],%g2 | |
32516 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
32517 | bne %xcc,p0_reg_check_fail7 | |
32518 | mov 0xee7,%g1 | |
32519 | ldx [%g4+0x48],%g3 | |
32520 | std %f2,[%g4] | |
32521 | ldx [%g4],%g2 | |
32522 | cmp %g3,%g2 ! %f2 = 00000000 ff000000 | |
32523 | bne %xcc,p0_freg_check_fail | |
32524 | mov 0xf02,%g1 | |
32525 | ldx [%g4+0x50],%g3 | |
32526 | std %f4,[%g4] | |
32527 | ldx [%g4],%g2 | |
32528 | cmp %g3,%g2 ! %f4 = 00000000 0000c676 | |
32529 | bne %xcc,p0_freg_check_fail | |
32530 | mov 0xf04,%g1 | |
32531 | ldx [%g4+0x58],%g3 | |
32532 | std %f6,[%g4] | |
32533 | ldx [%g4],%g2 | |
32534 | cmp %g3,%g2 ! %f6 = ff0000ff 0000ff00 | |
32535 | bne %xcc,p0_freg_check_fail | |
32536 | mov 0xf06,%g1 | |
32537 | ldx [%g4+0x60],%g3 | |
32538 | std %f8,[%g4] | |
32539 | ldx [%g4],%g2 | |
32540 | cmp %g3,%g2 ! %f8 = ff000000 ffffffff | |
32541 | bne %xcc,p0_freg_check_fail | |
32542 | mov 0xf08,%g1 | |
32543 | ldx [%g4+0x68],%g3 | |
32544 | std %f16,[%g4] | |
32545 | ldx [%g4],%g2 | |
32546 | cmp %g3,%g2 ! %f16 = 00000000 0000c676 | |
32547 | bne %xcc,p0_freg_check_fail | |
32548 | mov 0xf16,%g1 | |
32549 | ldx [%g4+0x70],%g3 | |
32550 | std %f26,[%g4] | |
32551 | ldx [%g4],%g2 | |
32552 | cmp %g3,%g2 ! %f26 = 00000000 ff883403 | |
32553 | bne %xcc,p0_freg_check_fail | |
32554 | mov 0xf26,%g1 | |
32555 | ldx [%g4+0x78],%g3 | |
32556 | std %f28,[%g4] | |
32557 | ldx [%g4],%g2 | |
32558 | cmp %g3,%g2 ! %f28 = 00ff0000 033488c7 | |
32559 | bne %xcc,p0_freg_check_fail | |
32560 | mov 0xf28,%g1 | |
32561 | ||
32562 | ! Check Point 156 completed | |
32563 | ||
32564 | ||
32565 | p0_label_781: | |
32566 | ! Mem[0000000010081400] = 00000000, %l7 = 0000000000000000 | |
32567 | ldswa [%i2+%g0]0x80,%l7 ! %l7 = 0000000000000000 | |
32568 | ! Mem[00000000100c1410] = ff000000, %l4 = 00000000000000ff | |
32569 | lduwa [%i3+%o5]0x80,%l4 ! %l4 = 00000000ff000000 | |
32570 | ! Mem[0000000010141408] = 76000000, %l2 = 000000000000ff00 | |
32571 | ldsh [%i5+0x00a],%l2 ! %l2 = 0000000000000000 | |
32572 | ! Mem[0000000030101400] = 0000ff03, %l6 = 0000000000000076 | |
32573 | ldsba [%i4+%g0]0x89,%l6 ! %l6 = 0000000000000003 | |
32574 | ! Mem[0000000030101400] = 0000ff03, %l1 = 00000000000000ff | |
32575 | lduha [%i4+%g0]0x89,%l1 ! %l1 = 000000000000ff03 | |
32576 | ! Mem[00000000211c0000] = 00001a4c, %l5 = 00000000000000ff | |
32577 | ldsha [%o2+0x000]%asi,%l5 ! %l5 = 0000000000000000 | |
32578 | ! Mem[0000000010041408] = 00000000ff000000, %l4 = 00000000ff000000 | |
32579 | ldxa [%i1+%o4]0x80,%l4 ! %l4 = 00000000ff000000 | |
32580 | ! Mem[0000000030041408] = 00000076, %l6 = 0000000000000003 | |
32581 | lduha [%i1+%o4]0x89,%l6 ! %l6 = 0000000000000076 | |
32582 | ! Mem[0000000010101408] = ffc60000, %l5 = 0000000000000000 | |
32583 | ldsba [%i4+%o4]0x80,%l5 ! %l5 = ffffffffffffffff | |
32584 | ! Starting 10 instruction Store Burst | |
32585 | ! Mem[0000000030081408] = ff00ffff, %l3 = 0000000000000000 | |
32586 | ldstuba [%i2+%o4]0x81,%l3 ! %l3 = 000000ff000000ff | |
32587 | ||
32588 | p0_label_782: | |
32589 | ! %l7 = 0000000000000000, Mem[0000000030141410] = 00000000 | |
32590 | stha %l7,[%i5+%o5]0x81 ! Mem[0000000030141410] = 00000000 | |
32591 | ! %l5 = ffffffffffffffff, Mem[0000000030041400] = ff00000000000000 | |
32592 | stxa %l5,[%i1+%g0]0x81 ! Mem[0000000030041400] = ffffffffffffffff | |
32593 | ! %f0 = ff000000, Mem[0000000010001410] = ff0000ff | |
32594 | sta %f0 ,[%i0+%o5]0x80 ! Mem[0000000010001410] = ff000000 | |
32595 | ! %l6 = 0000000000000076, Mem[0000000030101400] = 03ff000000000000 | |
32596 | stxa %l6,[%i4+%g0]0x81 ! Mem[0000000030101400] = 0000000000000076 | |
32597 | ! %f4 = 00000000 0000c676, %l5 = ffffffffffffffff | |
32598 | ! Mem[0000000030141410] = 0000000000009400 | |
32599 | add %i5,0x010,%g1 | |
32600 | stda %f4,[%g1+%l5]ASI_PST32_SL ! Mem[0000000030141410] = 76c6000000000000 | |
32601 | ! Mem[0000000021800040] = 00001df3, %l2 = 0000000000000000 | |
32602 | ldstuba [%o3+0x040]%asi,%l2 ! %l2 = 00000000000000ff | |
32603 | ! Mem[0000000030041410] = 0000ff00, %l7 = 0000000000000000 | |
32604 | ldstuba [%i1+%o5]0x89,%l7 ! %l7 = 00000000000000ff | |
32605 | ! %f13 = ffff0000, Mem[0000000010041408] = 00000000 | |
32606 | sta %f13,[%i1+%o4]0x80 ! Mem[0000000010041408] = ffff0000 | |
32607 | ! Mem[0000000010101410] = 00000000, %l7 = 0000000000000000 | |
32608 | ldstuba [%i4+%o5]0x80,%l7 ! %l7 = 00000000000000ff | |
32609 | ! Starting 10 instruction Load Burst | |
32610 | ! Mem[0000000010101420] = 000000ff, %l6 = 0000000000000076 | |
32611 | ldsw [%i4+0x020],%l6 ! %l6 = 00000000000000ff | |
32612 | ||
32613 | p0_label_783: | |
32614 | ! Mem[0000000030141400] = 000000000000c676, %l6 = 00000000000000ff | |
32615 | ldxa [%i5+%g0]0x81,%l6 ! %l6 = 000000000000c676 | |
32616 | ! Mem[00000000300c1408] = ff000000 00000000, %l0 = 00000076, %l1 = 0000ff03 | |
32617 | ldda [%i3+%o4]0x81,%l0 ! %l0 = 00000000ff000000 0000000000000000 | |
32618 | ! Mem[00000000100c1410] = 00009400 000000ff, %l2 = 00000000, %l3 = 000000ff | |
32619 | ldda [%i3+%o5]0x88,%l2 ! %l2 = 00000000000000ff 0000000000009400 | |
32620 | ! Mem[0000000020800000] = ffff8470, %l3 = 0000000000009400 | |
32621 | ldsh [%o1+%g0],%l3 ! %l3 = ffffffffffffffff | |
32622 | ! Mem[0000000010101408] = 00ffffff0000c6ff, %l2 = 00000000000000ff | |
32623 | ldxa [%i4+%o4]0x88,%l2 ! %l2 = 00ffffff0000c6ff | |
32624 | ! Mem[0000000010001410] = 000000ff, %l6 = 000000000000c676 | |
32625 | ldsha [%i0+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
32626 | ! Mem[0000000030101410] = 000000ff, %l6 = 00000000000000ff | |
32627 | lduwa [%i4+%o5]0x89,%l6 ! %l6 = 00000000000000ff | |
32628 | ! Mem[0000000010001424] = 00ff159c, %f8 = ff000000 | |
32629 | ld [%i0+0x024],%f8 ! %f8 = 00ff159c | |
32630 | ! Mem[0000000030101408] = 0000000000ff0000, %f20 = ff000000 00ffffff | |
32631 | ldda [%i4+%o4]0x81,%f20 ! %f20 = 00000000 00ff0000 | |
32632 | ! Starting 10 instruction Store Burst | |
32633 | ! %f0 = ff000000 e6bf2212, Mem[0000000010041418] = ffff0000 00000000 | |
32634 | stda %f0 ,[%i1+0x018]%asi ! Mem[0000000010041418] = ff000000 e6bf2212 | |
32635 | ||
32636 | p0_label_784: | |
32637 | ! %f0 = ff000000 e6bf2212, Mem[0000000010001418] = 00ff4517 0000ffff | |
32638 | stda %f0 ,[%i0+0x018]%asi ! Mem[0000000010001418] = ff000000 e6bf2212 | |
32639 | ! Mem[0000000030081408] = ff00ffff, %l3 = ffffffffffffffff | |
32640 | swapa [%i2+%o4]0x81,%l3 ! %l3 = 00000000ff00ffff | |
32641 | ! %l1 = 0000000000000000, Mem[0000000010101400] = 00000000 | |
32642 | stwa %l1,[%i4+%g0]0x80 ! Mem[0000000010101400] = 00000000 | |
32643 | ! %l3 = 00000000ff00ffff, Mem[00000000100c1408] = ffffffffe6bf2212 | |
32644 | stxa %l3,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00000000ff00ffff | |
32645 | ! Mem[0000000010141408] = 00000076, %l0 = 00000000ff000000 | |
32646 | swapa [%i5+%o4]0x88,%l0 ! %l0 = 0000000000000076 | |
32647 | ! Mem[00000000100c1430] = 00000000, %l1 = 0000000000000000 | |
32648 | swap [%i3+0x030],%l1 ! %l1 = 0000000000000000 | |
32649 | ! Mem[0000000010001400] = 7827da3e, %l0 = 0000000000000076 | |
32650 | swapa [%i0+%g0]0x88,%l0 ! %l0 = 000000007827da3e | |
32651 | ! %f10 = 00940000, Mem[0000000010141400] = 00ff0000 | |
32652 | sta %f10,[%i5+%g0]0x88 ! Mem[0000000010141400] = 00940000 | |
32653 | ! %l2 = 00ffffff0000c6ff, Mem[0000000030101410] = ff000000 | |
32654 | stwa %l2,[%i4+%o5]0x81 ! Mem[0000000030101410] = 0000c6ff | |
32655 | ! Starting 10 instruction Load Burst | |
32656 | ! Mem[0000000030141408] = 00000000000000ff, %f22 = 00000000 ff000000 | |
32657 | ldda [%i5+%o4]0x89,%f22 ! %f22 = 00000000 000000ff | |
32658 | ||
32659 | p0_label_785: | |
32660 | ! Mem[0000000010181410] = 033488ff, %f0 = ff000000 | |
32661 | lda [%i6+%o5]0x88,%f0 ! %f0 = 033488ff | |
32662 | ! Mem[0000000010001408] = 0000000000000000, %f24 = f31200ff 00ff0000 | |
32663 | ldda [%i0+0x008]%asi,%f24 ! %f24 = 00000000 00000000 | |
32664 | ! Mem[0000000010041410] = 00ff0000, %l2 = 00ffffff0000c6ff | |
32665 | lduwa [%i1+%o5]0x80,%l2 ! %l2 = 0000000000ff0000 | |
32666 | ! Mem[0000000010041408] = 0000ffff, %f1 = e6bf2212 | |
32667 | lda [%i1+%o4]0x88,%f1 ! %f1 = 0000ffff | |
32668 | ! Mem[0000000010041410] = 00ff0000, %l1 = 0000000000000000 | |
32669 | ldsba [%i1+%o5]0x80,%l1 ! %l1 = 0000000000000000 | |
32670 | ! Mem[0000000020800040] = ff007379, %l2 = 0000000000ff0000 | |
32671 | ldub [%o1+0x040],%l2 ! %l2 = 00000000000000ff | |
32672 | ! Mem[000000001008142c] = 00000000, %l3 = 00000000ff00ffff | |
32673 | ldsw [%i2+0x02c],%l3 ! %l3 = 0000000000000000 | |
32674 | ! Mem[0000000010041400] = 0000007600000000, %l3 = 0000000000000000 | |
32675 | ldxa [%i1+%g0]0x80,%l3 ! %l3 = 0000007600000000 | |
32676 | ! Mem[0000000010041400] = 00000076, %l0 = 000000007827da3e | |
32677 | lduwa [%i1+%g0]0x80,%l0 ! %l0 = 0000000000000076 | |
32678 | ! Starting 10 instruction Store Burst | |
32679 | ! %f8 = 00ff159c ffffffff, Mem[00000000100c1408] = ff00ffff 00000000 | |
32680 | stda %f8 ,[%i3+%o4]0x88 ! Mem[00000000100c1408] = 00ff159c ffffffff | |
32681 | ||
32682 | ! Check Point 157 for processor 0 | |
32683 | ||
32684 | set p0_check_pt_data_157,%g4 | |
32685 | rd %ccr,%g5 ! %g5 = 44 | |
32686 | ldx [%g4+0x08],%g2 | |
32687 | cmp %l0,%g2 ! %l0 = 0000000000000076 | |
32688 | bne %xcc,p0_reg_check_fail0 | |
32689 | mov 0xee0,%g1 | |
32690 | ldx [%g4+0x10],%g2 | |
32691 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
32692 | bne %xcc,p0_reg_check_fail1 | |
32693 | mov 0xee1,%g1 | |
32694 | ldx [%g4+0x18],%g2 | |
32695 | cmp %l2,%g2 ! %l2 = 00000000000000ff | |
32696 | bne %xcc,p0_reg_check_fail2 | |
32697 | mov 0xee2,%g1 | |
32698 | ldx [%g4+0x20],%g2 | |
32699 | cmp %l3,%g2 ! %l3 = 0000007600000000 | |
32700 | bne %xcc,p0_reg_check_fail3 | |
32701 | mov 0xee3,%g1 | |
32702 | ldx [%g4+0x28],%g2 | |
32703 | cmp %l4,%g2 ! %l4 = 00000000ff000000 | |
32704 | bne %xcc,p0_reg_check_fail4 | |
32705 | mov 0xee4,%g1 | |
32706 | ldx [%g4+0x30],%g2 | |
32707 | cmp %l5,%g2 ! %l5 = ffffffffffffffff | |
32708 | bne %xcc,p0_reg_check_fail5 | |
32709 | mov 0xee5,%g1 | |
32710 | ldx [%g4+0x38],%g2 | |
32711 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
32712 | bne %xcc,p0_reg_check_fail6 | |
32713 | mov 0xee6,%g1 | |
32714 | ldx [%g4+0x40],%g2 | |
32715 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
32716 | bne %xcc,p0_reg_check_fail7 | |
32717 | mov 0xee7,%g1 | |
32718 | ldx [%g4+0x48],%g3 | |
32719 | std %f0,[%g4] | |
32720 | ldx [%g4],%g2 | |
32721 | cmp %g3,%g2 ! %f0 = 033488ff 0000ffff | |
32722 | bne %xcc,p0_freg_check_fail | |
32723 | mov 0xf00,%g1 | |
32724 | ldx [%g4+0x50],%g3 | |
32725 | std %f2,[%g4] | |
32726 | ldx [%g4],%g2 | |
32727 | cmp %g3,%g2 ! %f2 = 00000000 ff000000 | |
32728 | bne %xcc,p0_freg_check_fail | |
32729 | mov 0xf02,%g1 | |
32730 | ldx [%g4+0x58],%g3 | |
32731 | std %f8,[%g4] | |
32732 | ldx [%g4],%g2 | |
32733 | cmp %g3,%g2 ! %f8 = 00ff159c ffffffff | |
32734 | bne %xcc,p0_freg_check_fail | |
32735 | mov 0xf08,%g1 | |
32736 | ldx [%g4+0x60],%g3 | |
32737 | std %f20,[%g4] | |
32738 | ldx [%g4],%g2 | |
32739 | cmp %g3,%g2 ! %f20 = 00000000 00ff0000 | |
32740 | bne %xcc,p0_freg_check_fail | |
32741 | mov 0xf20,%g1 | |
32742 | ldx [%g4+0x68],%g3 | |
32743 | std %f22,[%g4] | |
32744 | ldx [%g4],%g2 | |
32745 | cmp %g3,%g2 ! %f22 = 00000000 000000ff | |
32746 | bne %xcc,p0_freg_check_fail | |
32747 | mov 0xf22,%g1 | |
32748 | ldx [%g4+0x70],%g3 | |
32749 | std %f24,[%g4] | |
32750 | ldx [%g4],%g2 | |
32751 | cmp %g3,%g2 ! %f24 = 00000000 00000000 | |
32752 | bne %xcc,p0_freg_check_fail | |
32753 | mov 0xf24,%g1 | |
32754 | ||
32755 | ! Check Point 157 completed | |
32756 | ||
32757 | ||
32758 | p0_label_786: | |
32759 | ! %f8 = 00ff159c, Mem[00000000100c1408] = ffffffff | |
32760 | sta %f8 ,[%i3+%o4]0x80 ! Mem[00000000100c1408] = 00ff159c | |
32761 | ! %l4 = 00000000ff000000, Mem[0000000010101432] = 00ff0000 | |
32762 | sth %l4,[%i4+0x032] ! Mem[0000000010101430] = 00ff0000 | |
32763 | ! %l2 = 00000000000000ff, Mem[0000000030101410] = 0000c6ff0000ffff | |
32764 | stxa %l2,[%i4+%o5]0x81 ! Mem[0000000030101410] = 00000000000000ff | |
32765 | ! %l1 = 0000000000000000, Mem[00000000201c0001] = ff039457 | |
32766 | stb %l1,[%o0+0x001] ! Mem[00000000201c0000] = ff009457 | |
32767 | ! Code Fragment 3 | |
32768 | p0_fragment_22: | |
32769 | ! %l0 = 0000000000000076 | |
32770 | setx 0x7a5d9677eb77979e,%g7,%l0 ! %l0 = 7a5d9677eb77979e | |
32771 | ! %l1 = 0000000000000000 | |
32772 | setx 0x095457b01cfe43fe,%g7,%l1 ! %l1 = 095457b01cfe43fe | |
32773 | setx 0x1fe000, %g1, %g3 | |
32774 | or %l0, %g3, %l0 ! always set perrmask = 0xff | |
32775 | setx 0x1ffff8, %g1, %g2 | |
32776 | and %l0, %g2, %l0 | |
32777 | ta T_CHANGE_HPRIV | |
32778 | stxa %l1, [%l0]ASI_DCACHE_DATA | |
32779 | ta T_CHANGE_NONHPRIV | |
32780 | ! %l0 = 7a5d9677eb77979e | |
32781 | setx 0x8eb6afbfd8eb07d0,%g7,%l0 ! %l0 = 8eb6afbfd8eb07d0 | |
32782 | ! %l1 = 095457b01cfe43fe | |
32783 | setx 0x1b5756b7c06fed69,%g7,%l1 ! %l1 = 1b5756b7c06fed69 | |
32784 | ! Mem[0000000010001410] = 000000ff, %l5 = ffffffffffffffff | |
32785 | ldstuba [%i0+%o5]0x88,%l5 ! %l5 = 000000ff000000ff | |
32786 | ! Mem[00000000100c1410] = 000000ff, %l5 = 00000000000000ff | |
32787 | swapa [%i3+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
32788 | ! %l4 = 00000000ff000000, Mem[0000000030141410] = 0000c676 | |
32789 | stha %l4,[%i5+%o5]0x89 ! Mem[0000000030141410] = 00000000 | |
32790 | ! Mem[0000000010041428] = 00000000, %l3 = 0000007600000000 | |
32791 | swap [%i1+0x028],%l3 ! %l3 = 0000000000000000 | |
32792 | ! Starting 10 instruction Load Burst | |
32793 | ! Mem[0000000010181424] = 00000000, %f2 = 00000000 | |
32794 | lda [%i6+0x024]%asi,%f2 ! %f2 = 00000000 | |
32795 | ||
32796 | p0_label_787: | |
32797 | ! Mem[0000000010081400] = 0000000000000000, %l6 = 00000000000000ff | |
32798 | ldxa [%i2+%g0]0x88,%l6 ! %l6 = 0000000000000000 | |
32799 | ! Mem[0000000010001408] = 00000000, %l0 = 8eb6afbfd8eb07d0 | |
32800 | ldsba [%i0+%o4]0x80,%l0 ! %l0 = 0000000000000000 | |
32801 | ! Mem[0000000010001420] = 1f41ff00, %l7 = 0000000000000000 | |
32802 | ldsw [%i0+0x020],%l7 ! %l7 = 000000001f41ff00 | |
32803 | ! Mem[0000000030081400] = 033488c7033488ff, %l0 = 0000000000000000 | |
32804 | ldxa [%i2+%g0]0x89,%l0 ! %l0 = 033488c7033488ff | |
32805 | ! Mem[0000000010081400] = 00000000, %l4 = 00000000ff000000 | |
32806 | lduwa [%i2+%g0]0x80,%l4 ! %l4 = 0000000000000000 | |
32807 | ! Mem[0000000010041418] = ff000000, %l7 = 000000001f41ff00 | |
32808 | ldsw [%i1+0x018],%l7 ! %l7 = ffffffffff000000 | |
32809 | ! Mem[00000000300c1400] = 00000000, %l4 = 0000000000000000 | |
32810 | lduha [%i3+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
32811 | ! Mem[0000000010141410] = 00ff0000, %l5 = 00000000000000ff | |
32812 | ldsba [%i5+0x011]%asi,%l5 ! %l5 = ffffffffffffffff | |
32813 | ! Mem[00000000300c1408] = 000000ff, %l2 = 00000000000000ff | |
32814 | lduba [%i3+%o4]0x89,%l2 ! %l2 = 00000000000000ff | |
32815 | ! Starting 10 instruction Store Burst | |
32816 | ! Mem[0000000010081418] = 0000ffff, %l6 = 0000000000000000 | |
32817 | swap [%i2+0x018],%l6 ! %l6 = 000000000000ffff | |
32818 | ||
32819 | p0_label_788: | |
32820 | ! Mem[0000000010101400] = 00000000, %l2 = 00000000000000ff | |
32821 | ldstuba [%i4+%g0]0x80,%l2 ! %l2 = 00000000000000ff | |
32822 | ! Mem[000000001014143e] = 000000ff, %l1 = 1b5756b7c06fed69 | |
32823 | ldstub [%i5+0x03e],%l1 ! %l1 = 00000000000000ff | |
32824 | ! %f13 = ffff0000, Mem[000000001018143c] = 00000000 | |
32825 | sta %f13,[%i6+0x03c]%asi ! Mem[000000001018143c] = ffff0000 | |
32826 | ! Mem[0000000030081408] = ffffffff, %l7 = ffffffffff000000 | |
32827 | swapa [%i2+%o4]0x89,%l7 ! %l7 = 00000000ffffffff | |
32828 | ! %l5 = ffffffffffffffff, Mem[0000000010001408] = 00000000 | |
32829 | stba %l5,[%i0+%o4]0x88 ! Mem[0000000010001408] = 000000ff | |
32830 | ! Mem[0000000030181410] = 0000ffff, %l5 = ffffffffffffffff | |
32831 | swapa [%i6+%o5]0x81,%l5 ! %l5 = 000000000000ffff | |
32832 | ! %l2 = 0000000000000000, %l0 = 033488c7033488ff, %l2 = 0000000000000000 | |
32833 | sdivx %l2,%l0,%l2 ! %l2 = 0000000000000000 | |
32834 | ! %l5 = 000000000000ffff, Mem[0000000010181410] = 00ff0000033488ff | |
32835 | stxa %l5,[%i6+%o5]0x88 ! Mem[0000000010181410] = 000000000000ffff | |
32836 | ! Mem[0000000030101400] = 00000000, %l2 = 0000000000000000 | |
32837 | ldstuba [%i4+%g0]0x81,%l2 ! %l2 = 00000000000000ff | |
32838 | ! Starting 10 instruction Load Burst | |
32839 | ! Mem[0000000010041438] = ffff00c60000ff00, %l7 = 00000000ffffffff | |
32840 | ldxa [%i1+0x038]%asi,%l7 ! %l7 = ffff00c60000ff00 | |
32841 | ||
32842 | p0_label_789: | |
32843 | ! Mem[0000000010041428] = 00000000, %l7 = ffff00c60000ff00 | |
32844 | ldub [%i1+0x02b],%l7 ! %l7 = 0000000000000000 | |
32845 | ! %l4 = 0000000000000000, %l4 = 0000000000000000, %l3 = 0000000000000000 | |
32846 | udivx %l4,%l4,%l3 ! Div by zero, %l0 = 033488c70334894f | |
32847 | ! Mem[0000000030101400] = 000000ff, %l1 = 0000000000000000 | |
32848 | lduha [%i4+%g0]0x89,%l1 ! %l1 = 00000000000000ff | |
32849 | ! Mem[0000000010181408] = 0000ff00, %l6 = 000000000000ffff | |
32850 | ldsba [%i6+%o4]0x80,%l6 ! %l6 = 0000000000000000 | |
32851 | ! Mem[0000000010141410] = 00ff0000, %f11 = 000000ff | |
32852 | lda [%i5+%o5]0x80,%f11 ! %f11 = 00ff0000 | |
32853 | ! Mem[0000000010001400] = 00000076, %l1 = 00000000000000ff | |
32854 | lduba [%i0+%g0]0x88,%l1 ! %l1 = 0000000000000076 | |
32855 | ! Mem[00000000201c0000] = ff009457, %l2 = 0000000000000000 | |
32856 | ldsh [%o0+%g0],%l2 ! %l2 = ffffffffffffff00 | |
32857 | ! Mem[0000000010141410] = 00ff0000, %l6 = 0000000000000000 | |
32858 | lduha [%i5+%o5]0x80,%l6 ! %l6 = 00000000000000ff | |
32859 | ! Mem[000000001014143c] = 0000ffff, %l2 = ffffffffffffff00 | |
32860 | ldsw [%i5+0x03c],%l2 ! %l2 = 000000000000ffff | |
32861 | ! Starting 10 instruction Store Burst | |
32862 | ! Mem[0000000010141400] = 00009400, %l7 = 0000000000000000 | |
32863 | ldstuba [%i5+%g0]0x80,%l7 ! %l7 = 00000000000000ff | |
32864 | ||
32865 | p0_label_790: | |
32866 | ! %l6 = 00000000000000ff, imm = 0000000000000263, %l3 = 0000000000000000 | |
32867 | or %l6,0x263,%l3 ! %l3 = 00000000000002ff | |
32868 | ! Mem[00000000100c1408] = 00ff159c9c15ff00, %l1 = 0000000000000076, %l6 = 00000000000000ff | |
32869 | add %i3,0x08,%g1 | |
32870 | casxa [%g1]0x80,%l1,%l6 ! %l6 = 00ff159c9c15ff00 | |
32871 | ! %f0 = 033488ff 0000ffff 00000000 ff000000 | |
32872 | ! %f4 = 00000000 0000c676 ff0000ff 0000ff00 | |
32873 | ! %f8 = 00ff159c ffffffff 00940000 00ff0000 | |
32874 | ! %f12 = 00000000 ffff0000 00009400 000000ff | |
32875 | stda %f0,[%i6]ASI_COMMIT_P ! Block Store to 0000000010181400 | |
32876 | ! Mem[0000000020800001] = ffff8470, %l7 = 0000000000000000 | |
32877 | ldstuba [%o1+0x001]%asi,%l7 ! %l7 = 000000ff000000ff | |
32878 | ! %f30 = 411f0000 ffff00ff, Mem[0000000010141408] = ff000000 00000000 | |
32879 | stda %f30,[%i5+%o4]0x88 ! Mem[0000000010141408] = 411f0000 ffff00ff | |
32880 | ! %f30 = 411f0000 ffff00ff, Mem[0000000010101400] = 000000ff 000000c6 | |
32881 | stda %f30,[%i4+%g0]0x88 ! Mem[0000000010101400] = 411f0000 ffff00ff | |
32882 | ! Mem[0000000010001408] = 000000ff, %l5 = 000000000000ffff | |
32883 | ldstuba [%i0+%o4]0x88,%l5 ! %l5 = 000000ff000000ff | |
32884 | ! %f17 = 0000c676, Mem[0000000010001414] = 00000000 | |
32885 | st %f17,[%i0+0x014] ! Mem[0000000010001414] = 0000c676 | |
32886 | ! Mem[0000000030181410] = ffffffff, %l5 = 00000000000000ff | |
32887 | swapa [%i6+%o5]0x89,%l5 ! %l5 = 00000000ffffffff | |
32888 | ! Starting 10 instruction Load Burst | |
32889 | ! Mem[0000000010081408] = 00000000, %l1 = 0000000000000076 | |
32890 | lduh [%i2+0x00a],%l1 ! %l1 = 0000000000000000 | |
32891 | ||
32892 | ! Check Point 158 for processor 0 | |
32893 | ||
32894 | set p0_check_pt_data_158,%g4 | |
32895 | rd %ccr,%g5 ! %g5 = 44 | |
32896 | ldx [%g4+0x08],%g2 | |
32897 | cmp %l0,%g2 ! %l0 = 033488c703348927 | |
32898 | bne %xcc,p0_reg_check_fail0 | |
32899 | mov 0xee0,%g1 | |
32900 | ldx [%g4+0x10],%g2 | |
32901 | cmp %l1,%g2 ! %l1 = 0000000000000000 | |
32902 | bne %xcc,p0_reg_check_fail1 | |
32903 | mov 0xee1,%g1 | |
32904 | ldx [%g4+0x18],%g2 | |
32905 | cmp %l2,%g2 ! %l2 = 000000000000ffff | |
32906 | bne %xcc,p0_reg_check_fail2 | |
32907 | mov 0xee2,%g1 | |
32908 | ldx [%g4+0x20],%g2 | |
32909 | cmp %l3,%g2 ! %l3 = 00000000000002ff | |
32910 | bne %xcc,p0_reg_check_fail3 | |
32911 | mov 0xee3,%g1 | |
32912 | ldx [%g4+0x28],%g2 | |
32913 | cmp %l4,%g2 ! %l4 = 0000000000000000 | |
32914 | bne %xcc,p0_reg_check_fail4 | |
32915 | mov 0xee4,%g1 | |
32916 | ldx [%g4+0x30],%g2 | |
32917 | cmp %l5,%g2 ! %l5 = 00000000ffffffff | |
32918 | bne %xcc,p0_reg_check_fail5 | |
32919 | mov 0xee5,%g1 | |
32920 | ldx [%g4+0x38],%g2 | |
32921 | cmp %l6,%g2 ! %l6 = 00ff159c9c15ff00 | |
32922 | bne %xcc,p0_reg_check_fail6 | |
32923 | mov 0xee6,%g1 | |
32924 | ldx [%g4+0x40],%g2 | |
32925 | cmp %l7,%g2 ! %l7 = 00000000000000ff | |
32926 | bne %xcc,p0_reg_check_fail7 | |
32927 | mov 0xee7,%g1 | |
32928 | ldx [%g4+0x48],%g3 | |
32929 | std %f2,[%g4] | |
32930 | ldx [%g4],%g2 | |
32931 | cmp %g3,%g2 ! %f2 = 00000000 ff000000 | |
32932 | bne %xcc,p0_freg_check_fail | |
32933 | mov 0xf02,%g1 | |
32934 | ldx [%g4+0x50],%g3 | |
32935 | std %f10,[%g4] | |
32936 | ldx [%g4],%g2 | |
32937 | cmp %g3,%g2 ! %f10 = 00940000 00ff0000 | |
32938 | bne %xcc,p0_freg_check_fail | |
32939 | mov 0xf10,%g1 | |
32940 | ||
32941 | ! Check Point 158 completed | |
32942 | ||
32943 | ||
32944 | p0_label_791: | |
32945 | ! Mem[0000000010101400] = 411f0000 ffff00ff, %l6 = 9c15ff00, %l7 = 000000ff | |
32946 | ldda [%i4+%g0]0x88,%l6 ! %l6 = 00000000ffff00ff 00000000411f0000 | |
32947 | ! Mem[0000000030101400] = 76000000000000ff, %l0 = 033488c703348927 | |
32948 | ldxa [%i4+%g0]0x89,%l0 ! %l0 = 76000000000000ff | |
32949 | ! Mem[0000000030001410] = ff00ff00000000ff, %l5 = 00000000ffffffff | |
32950 | ldxa [%i0+%o5]0x81,%l5 ! %l5 = ff00ff00000000ff | |
32951 | ! Mem[0000000010081410] = 0000000000000000, %l3 = 00000000000002ff | |
32952 | ldx [%i2+%o5],%l3 ! %l3 = 0000000000000000 | |
32953 | ! Mem[0000000010141408] = ff00ffff00001f41, %f22 = 00000000 000000ff | |
32954 | ldda [%i5+%o4]0x80,%f22 ! %f22 = ff00ffff 00001f41 | |
32955 | ! Mem[0000000030001408] = 00000000, %l6 = 00000000ffff00ff | |
32956 | lduha [%i0+%o4]0x81,%l6 ! %l6 = 0000000000000000 | |
32957 | ! Mem[00000000100c1410] = ff000000, %l6 = 0000000000000000 | |
32958 | ldsha [%i3+0x012]%asi,%l6 ! %l6 = 0000000000000000 | |
32959 | ! Mem[0000000030101408] = 00000000, %l3 = 0000000000000000 | |
32960 | ldsha [%i4+%o4]0x81,%l3 ! %l3 = 0000000000000000 | |
32961 | ! Mem[00000000100c1410] = 000000ff, %l3 = 0000000000000000 | |
32962 | lduha [%i3+%o5]0x88,%l3 ! %l3 = 00000000000000ff | |
32963 | ! Starting 10 instruction Store Burst | |
32964 | ! %l6 = 0000000000000000, Mem[0000000030141410] = 0000000000000000 | |
32965 | stxa %l6,[%i5+%o5]0x89 ! Mem[0000000030141410] = 0000000000000000 | |
32966 | ||
32967 | p0_label_792: | |
32968 | ! Mem[0000000030041400] = ffffffff, %l3 = 00000000000000ff | |
32969 | ldstuba [%i1+%g0]0x81,%l3 ! %l3 = 000000ff000000ff | |
32970 | ! %l0 = 76000000000000ff, Mem[0000000010001420] = 1f41ff0000ff159c, %asi = 80 | |
32971 | stxa %l0,[%i0+0x020]%asi ! Mem[0000000010001420] = 76000000000000ff | |
32972 | ! %l0 = 76000000000000ff, Mem[0000000030141410] = 0000000000000000 | |
32973 | stxa %l0,[%i5+%o5]0x81 ! Mem[0000000030141410] = 76000000000000ff | |
32974 | ! %l3 = 00000000000000ff, Mem[0000000030181408] = 0000ff00 | |
32975 | stha %l3,[%i6+%o4]0x81 ! Mem[0000000030181408] = 00ffff00 | |
32976 | ! Mem[0000000010001400] = 7600000000000000, %l7 = 00000000411f0000, %l4 = 0000000000000000 | |
32977 | casxa [%i0]0x80,%l7,%l4 ! %l4 = 7600000000000000 | |
32978 | ! %l6 = 0000000000000000, Mem[00000000100c1410] = ff00000000940000 | |
32979 | stxa %l6,[%i3+%o5]0x80 ! Mem[00000000100c1410] = 0000000000000000 | |
32980 | ! Mem[0000000010081410] = 00000000, %l5 = ff00ff00000000ff | |
32981 | ldstuba [%i2+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
32982 | ! Mem[0000000010001414] = 0000c676, %l4 = 00000000, %l0 = 000000ff | |
32983 | add %i0,0x14,%g1 | |
32984 | casa [%g1]0x80,%l4,%l0 ! %l0 = 000000000000c676 | |
32985 | membar #Sync ! Added by membar checker (133) | |
32986 | ! %l3 = 00000000000000ff, Mem[0000000010181439] = 00009400, %asi = 80 | |
32987 | stba %l3,[%i6+0x039]%asi ! Mem[0000000010181438] = 00ff9400 | |
32988 | ! Starting 10 instruction Load Burst | |
32989 | ! Mem[0000000010041430] = 000000ff, %l7 = 00000000411f0000 | |
32990 | ldsw [%i1+0x030],%l7 ! %l7 = 00000000000000ff | |
32991 | ||
32992 | p0_label_793: | |
32993 | ! Mem[0000000030081410] = ff000000, %l4 = 7600000000000000 | |
32994 | lduba [%i2+%o5]0x81,%l4 ! %l4 = 00000000000000ff | |
32995 | ! Mem[0000000030101410] = 00000000, %f28 = 00ff0000 | |
32996 | lda [%i4+%o5]0x89,%f28 ! %f28 = 00000000 | |
32997 | ! Mem[0000000010081424] = 033488c7, %l2 = 000000000000ffff | |
32998 | ldsb [%i2+0x024],%l2 ! %l2 = 0000000000000003 | |
32999 | ! Mem[0000000010141410] = 597bac100000ff00, %l2 = 0000000000000003 | |
33000 | ldxa [%i5+%o5]0x88,%l2 ! %l2 = 597bac100000ff00 | |
33001 | ! Mem[00000000100c1400] = 000000ff00000000, %l4 = 00000000000000ff | |
33002 | ldxa [%i3+%g0]0x88,%l4 ! %l4 = 000000ff00000000 | |
33003 | ! Mem[0000000030181400] = 00000000, %l4 = 000000ff00000000 | |
33004 | lduha [%i6+%g0]0x89,%l4 ! %l4 = 0000000000000000 | |
33005 | ! Mem[0000000030101408] = 0000ff00 00000000, %l0 = 0000c676, %l1 = 00000000 | |
33006 | ldda [%i4+%o4]0x89,%l0 ! %l0 = 0000000000000000 000000000000ff00 | |
33007 | ! Mem[0000000030181400] = 00000000, %l4 = 0000000000000000 | |
33008 | lduwa [%i6+%g0]0x81,%l4 ! %l4 = 0000000000000000 | |
33009 | ! Mem[0000000030181408] = 00ffff00 00000000, %l6 = 00000000, %l7 = 000000ff | |
33010 | ldda [%i6+%o4]0x81,%l6 ! %l6 = 0000000000ffff00 0000000000000000 | |
33011 | ! Starting 10 instruction Store Burst | |
33012 | ! %l6 = 00ffff00, %l7 = 00000000, Mem[0000000030081410] = ff000000 00940000 | |
33013 | stda %l6,[%i2+%o5]0x81 ! Mem[0000000030081410] = 00ffff00 00000000 | |
33014 | ||
33015 | p0_label_794: | |
33016 | ! Mem[00000000218000c1] = 00ff8d82, %l5 = 0000000000000000 | |
33017 | ldstuba [%o3+0x0c1]%asi,%l5 ! %l5 = 000000ff000000ff | |
33018 | ! %l6 = 00ffff00, %l7 = 00000000, Mem[0000000010001410] = 000000ff 76c60000 | |
33019 | stda %l6,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00ffff00 00000000 | |
33020 | ! %f30 = 411f0000 ffff00ff, %l0 = 0000000000000000 | |
33021 | ! Mem[0000000030181418] = 000000000000ff00 | |
33022 | add %i6,0x018,%g1 | |
33023 | stda %f30,[%g1+%l0]ASI_PST16_S ! Mem[0000000030181418] = 000000000000ff00 | |
33024 | ! %l4 = 0000000000000000, Mem[0000000030181400] = 00000000 | |
33025 | stha %l4,[%i6+%g0]0x81 ! Mem[0000000030181400] = 00000000 | |
33026 | ! %f16 = 00000000 0000c676, Mem[00000000100c1410] = 00000000 00000000 | |
33027 | std %f16,[%i3+%o5] ! Mem[00000000100c1410] = 00000000 0000c676 | |
33028 | ! Mem[00000000211c0001] = 00001a4c, %l2 = 597bac100000ff00 | |
33029 | ldstuba [%o2+0x001]%asi,%l2 ! %l2 = 00000000000000ff | |
33030 | ! %f16 = 00000000 0000c676, Mem[0000000010141420] = 0000ff00 00ffff00 | |
33031 | std %f16,[%i5+0x020] ! Mem[0000000010141420] = 00000000 0000c676 | |
33032 | ! %f28 = 00000000 033488c7, %l5 = 00000000000000ff | |
33033 | ! Mem[0000000030181428] = 0300000000ff0000 | |
33034 | add %i6,0x028,%g1 | |
33035 | stda %f28,[%g1+%l5]ASI_PST16_SL ! Mem[0000000030181428] = c788340300000000 | |
33036 | ! %f22 = ff00ffff 00001f41, Mem[0000000010041408] = ffff0000 ff000000 | |
33037 | stda %f22,[%i1+%o4]0x80 ! Mem[0000000010041408] = ff00ffff 00001f41 | |
33038 | ! Starting 10 instruction Load Burst | |
33039 | ! Mem[0000000020800000] = ffff8470, %l2 = 0000000000000000 | |
33040 | ldsh [%o1+%g0],%l2 ! %l2 = ffffffffffffffff | |
33041 | ||
33042 | p0_label_795: | |
33043 | ! Mem[0000000010081424] = 033488c7, %l7 = 0000000000000000 | |
33044 | lduba [%i2+0x026]%asi,%l7 ! %l7 = 0000000000000088 | |
33045 | ! Mem[0000000030081410] = 00ffff00, %l5 = 00000000000000ff | |
33046 | ldswa [%i2+%o5]0x81,%l5 ! %l5 = 0000000000ffff00 | |
33047 | ! Mem[0000000030141400] = 000000000000c676, %f26 = 00000000 ff883403 | |
33048 | ldda [%i5+%g0]0x81,%f26 ! %f26 = 00000000 0000c676 | |
33049 | ! Mem[000000001000140c] = 00000000, %f3 = ff000000 | |
33050 | ld [%i0+0x00c],%f3 ! %f3 = 00000000 | |
33051 | ! Mem[0000000020800000] = ffff8470, %l4 = 0000000000000000 | |
33052 | lduba [%o1+0x000]%asi,%l4 ! %l4 = 00000000000000ff | |
33053 | ! Mem[0000000010101410] = 000000ff, %l6 = 0000000000ffff00 | |
33054 | lduha [%i4+%o5]0x88,%l6 ! %l6 = 00000000000000ff | |
33055 | ! Mem[0000000010181408] = 00000000ff000000, %l0 = 0000000000000000 | |
33056 | ldxa [%i6+%o4]0x80,%l0 ! %l0 = 00000000ff000000 | |
33057 | ! Mem[0000000010181424] = ffffffff, %l3 = 00000000000000ff | |
33058 | ldsh [%i6+0x026],%l3 ! %l3 = ffffffffffffffff | |
33059 | ! Mem[0000000010081410] = 000000ff, %l5 = 0000000000ffff00 | |
33060 | lduwa [%i2+%o5]0x88,%l5 ! %l5 = 00000000000000ff | |
33061 | ! Starting 10 instruction Store Burst | |
33062 | ! %l0 = 00000000ff000000, Mem[0000000010181414] = 0000c676, %asi = 80 | |
33063 | stwa %l0,[%i6+0x014]%asi ! Mem[0000000010181414] = ff000000 | |
33064 | ||
33065 | ! Check Point 159 for processor 0 | |
33066 | ||
33067 | set p0_check_pt_data_159,%g4 | |
33068 | rd %ccr,%g5 ! %g5 = 44 | |
33069 | ldx [%g4+0x08],%g2 | |
33070 | cmp %l0,%g2 ! %l0 = 00000000ff000000 | |
33071 | bne %xcc,p0_reg_check_fail0 | |
33072 | mov 0xee0,%g1 | |
33073 | ldx [%g4+0x10],%g2 | |
33074 | cmp %l2,%g2 ! %l2 = ffffffffffffffff | |
33075 | bne %xcc,p0_reg_check_fail2 | |
33076 | mov 0xee2,%g1 | |
33077 | ldx [%g4+0x18],%g2 | |
33078 | cmp %l3,%g2 ! %l3 = ffffffffffffffff | |
33079 | bne %xcc,p0_reg_check_fail3 | |
33080 | mov 0xee3,%g1 | |
33081 | ldx [%g4+0x20],%g2 | |
33082 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
33083 | bne %xcc,p0_reg_check_fail4 | |
33084 | mov 0xee4,%g1 | |
33085 | ldx [%g4+0x28],%g2 | |
33086 | cmp %l5,%g2 ! %l5 = 00000000000000ff | |
33087 | bne %xcc,p0_reg_check_fail5 | |
33088 | mov 0xee5,%g1 | |
33089 | ldx [%g4+0x30],%g2 | |
33090 | cmp %l6,%g2 ! %l6 = 00000000000000ff | |
33091 | bne %xcc,p0_reg_check_fail6 | |
33092 | mov 0xee6,%g1 | |
33093 | ldx [%g4+0x38],%g2 | |
33094 | cmp %l7,%g2 ! %l7 = 0000000000000088 | |
33095 | bne %xcc,p0_reg_check_fail7 | |
33096 | mov 0xee7,%g1 | |
33097 | ldx [%g4+0x40],%g3 | |
33098 | std %f0,[%g4] | |
33099 | ldx [%g4],%g2 | |
33100 | cmp %g3,%g2 ! %f0 = 033488ff 0000ffff | |
33101 | bne %xcc,p0_freg_check_fail | |
33102 | mov 0xf00,%g1 | |
33103 | ldx [%g4+0x48],%g3 | |
33104 | std %f2,[%g4] | |
33105 | ldx [%g4],%g2 | |
33106 | cmp %g3,%g2 ! %f2 = 00000000 00000000 | |
33107 | bne %xcc,p0_freg_check_fail | |
33108 | mov 0xf02,%g1 | |
33109 | ldx [%g4+0x50],%g3 | |
33110 | std %f6,[%g4] | |
33111 | ldx [%g4],%g2 | |
33112 | cmp %g3,%g2 ! %f6 = ff0000ff 0000ff00 | |
33113 | bne %xcc,p0_freg_check_fail | |
33114 | mov 0xf06,%g1 | |
33115 | ldx [%g4+0x58],%g3 | |
33116 | std %f22,[%g4] | |
33117 | ldx [%g4],%g2 | |
33118 | cmp %g3,%g2 ! %f22 = ff00ffff 00001f41 | |
33119 | bne %xcc,p0_freg_check_fail | |
33120 | mov 0xf22,%g1 | |
33121 | ldx [%g4+0x60],%g3 | |
33122 | std %f26,[%g4] | |
33123 | ldx [%g4],%g2 | |
33124 | cmp %g3,%g2 ! %f26 = 00000000 0000c676 | |
33125 | bne %xcc,p0_freg_check_fail | |
33126 | mov 0xf26,%g1 | |
33127 | ldx [%g4+0x68],%g3 | |
33128 | std %f28,[%g4] | |
33129 | ldx [%g4],%g2 | |
33130 | cmp %g3,%g2 ! %f28 = 00000000 033488c7 | |
33131 | bne %xcc,p0_freg_check_fail | |
33132 | mov 0xf28,%g1 | |
33133 | ||
33134 | ! Check Point 159 completed | |
33135 | ||
33136 | ||
33137 | p0_label_796: | |
33138 | ! %l2 = ffffffff, %l3 = ffffffff, Mem[0000000010141408] = ff00ffff 00001f41 | |
33139 | stda %l2,[%i5+%o4]0x80 ! Mem[0000000010141408] = ffffffff ffffffff | |
33140 | ! Mem[0000000010001400] = 76000000, %l0 = 00000000ff000000 | |
33141 | swapa [%i0+%g0]0x80,%l0 ! %l0 = 0000000076000000 | |
33142 | ! Mem[0000000010041410] = 0000ff00, %l1 = 000000000000ff00 | |
33143 | ldstuba [%i1+%o5]0x88,%l1 ! %l1 = 00000000000000ff | |
33144 | ! Mem[0000000010001400] = ff000000, %l1 = 0000000000000000 | |
33145 | swapa [%i0+%g0]0x80,%l1 ! %l1 = 00000000ff000000 | |
33146 | ! %l4 = 000000ff, %l5 = 000000ff, Mem[0000000030081410] = 00ffff00 00000000 | |
33147 | stda %l4,[%i2+%o5]0x81 ! Mem[0000000030081410] = 000000ff 000000ff | |
33148 | ! %l1 = 00000000ff000000, Mem[0000000030001408] = 00000000 | |
33149 | stwa %l1,[%i0+%o4]0x81 ! Mem[0000000030001408] = ff000000 | |
33150 | ! Mem[0000000010181408] = 00000000, %l4 = 00000000000000ff | |
33151 | ldstuba [%i6+%o4]0x88,%l4 ! %l4 = 00000000000000ff | |
33152 | ! %l3 = ffffffffffffffff, Mem[00000000100c1400] = 00000000 | |
33153 | stha %l3,[%i3+%g0]0x80 ! Mem[00000000100c1400] = ffff0000 | |
33154 | ! %f14 = 00009400 000000ff, %l0 = 0000000076000000 | |
33155 | ! Mem[0000000030181420] = c600000000ff0000 | |
33156 | add %i6,0x020,%g1 | |
33157 | stda %f14,[%g1+%l0]ASI_PST8_S ! Mem[0000000030181420] = c600000000ff0000 | |
33158 | ! Starting 10 instruction Load Burst | |
33159 | ! Mem[0000000010041430] = 000000ff, %f3 = 00000000 | |
33160 | lda [%i1+0x030]%asi,%f3 ! %f3 = 000000ff | |
33161 | ||
33162 | p0_label_797: | |
33163 | ! Mem[0000000010181428] = 00940000, %l0 = 0000000076000000 | |
33164 | ldub [%i6+0x028],%l0 ! %l0 = 0000000000000000 | |
33165 | ! Mem[0000000030141408] = ff000000 00000000, %l0 = 00000000, %l1 = ff000000 | |
33166 | ldda [%i5+%o4]0x81,%l0 ! %l0 = 00000000ff000000 0000000000000000 | |
33167 | ! Mem[0000000030141410] = 00000076, %l5 = 00000000000000ff | |
33168 | lduba [%i5+%o5]0x89,%l5 ! %l5 = 0000000000000076 | |
33169 | ! Mem[0000000010101400] = ff00ffff, %f21 = 00ff0000 | |
33170 | lda [%i4+%g0]0x80,%f21 ! %f21 = ff00ffff | |
33171 | ! Mem[0000000030001410] = ff00000000ff00ff, %l6 = 00000000000000ff | |
33172 | ldxa [%i0+%o5]0x89,%l6 ! %l6 = ff00000000ff00ff | |
33173 | ! Mem[00000000201c0000] = ff009457, %l5 = 0000000000000076 | |
33174 | ldsb [%o0+0x001],%l5 ! %l5 = 0000000000000000 | |
33175 | ! Mem[0000000010141400] = ff009400, %l1 = 0000000000000000 | |
33176 | ldswa [%i5+%g0]0x80,%l1 ! %l1 = ffffffffff009400 | |
33177 | ! Mem[0000000030141410] = 00000076, %l0 = 00000000ff000000 | |
33178 | lduha [%i5+%o5]0x89,%l0 ! %l0 = 0000000000000076 | |
33179 | ! Mem[0000000010001420] = 76000000, %l7 = 0000000000000088 | |
33180 | ldsh [%i0+0x022],%l7 ! %l7 = 0000000000000000 | |
33181 | ! Starting 10 instruction Store Burst | |
33182 | ! Mem[00000000100c1428] = f312ffffff000000, %l4 = 0000000000000000, %l1 = ffffffffff009400 | |
33183 | add %i3,0x28,%g1 | |
33184 | casxa [%g1]0x80,%l4,%l1 ! %l1 = f312ffffff000000 | |
33185 | ||
33186 | p0_label_798: | |
33187 | ! %l4 = 00000000, %l5 = 00000000, Mem[0000000030081408] = ff000000 00940000 | |
33188 | stda %l4,[%i2+%o4]0x89 ! Mem[0000000030081408] = 00000000 00000000 | |
33189 | ! %l0 = 0000000000000076, Mem[0000000030181408] = 00ffff00 | |
33190 | stwa %l0,[%i6+%o4]0x89 ! Mem[0000000030181408] = 00000076 | |
33191 | ! %l2 = ffffffffffffffff, Mem[0000000010181400] = 033488ff | |
33192 | stha %l2,[%i6+%g0]0x80 ! Mem[0000000010181400] = ffff88ff | |
33193 | ! %f26 = 00000000 0000c676, Mem[0000000010041400] = 00000076 00000000 | |
33194 | std %f26,[%i1+%g0] ! Mem[0000000010041400] = 00000000 0000c676 | |
33195 | ! %f8 = 00ff159c, Mem[0000000010001408] = ff000000 | |
33196 | sta %f8 ,[%i0+%o4]0x80 ! Mem[0000000010001408] = 00ff159c | |
33197 | ! %l2 = ffffffffffffffff, Mem[0000000020800040] = ff007379, %asi = 80 | |
33198 | stha %l2,[%o1+0x040]%asi ! Mem[0000000020800040] = ffff7379 | |
33199 | ! Mem[0000000010081400] = 00000000, %l0 = 0000000000000076 | |
33200 | swapa [%i2+%g0]0x88,%l0 ! %l0 = 0000000000000000 | |
33201 | ! %f9 = ffffffff, Mem[00000000300c1410] = 0000ff00 | |
33202 | sta %f9 ,[%i3+%o5]0x81 ! Mem[00000000300c1410] = ffffffff | |
33203 | ! Mem[0000000010181400] = ffff88ff, %l6 = ff00000000ff00ff, %asi = 80 | |
33204 | swapa [%i6+0x000]%asi,%l6 ! %l6 = 00000000ffff88ff | |
33205 | ! Starting 10 instruction Load Burst | |
33206 | ! Mem[0000000010001408] = 00ff159c00000000, %f18 = 000000ff 00000000 | |
33207 | ldda [%i0+%o4]0x80,%f18 ! %f18 = 00ff159c 00000000 | |
33208 | ||
33209 | p0_label_799: | |
33210 | ! Mem[00000000100c1400] = 0000ffff, %f30 = 411f0000 | |
33211 | lda [%i3+%g0]0x88,%f30 ! %f30 = 0000ffff | |
33212 | ! Mem[00000000201c0000] = ff009457, %l6 = 00000000ffff88ff | |
33213 | ldsha [%o0+0x000]%asi,%l6 ! %l6 = ffffffffffffff00 | |
33214 | ! Mem[0000000030181400] = 00000000, %l6 = ffffffffffffff00 | |
33215 | lduba [%i6+%g0]0x81,%l6 ! %l6 = 0000000000000000 | |
33216 | ! Mem[0000000010181400] = 00ff00ff, %l5 = 0000000000000000 | |
33217 | lduba [%i6+0x002]%asi,%l5 ! %l5 = 0000000000000000 | |
33218 | ! Mem[0000000010081400] = 76000000, %l3 = ffffffffffffffff | |
33219 | lduh [%i2+0x002],%l3 ! %l3 = 0000000000000000 | |
33220 | ! Mem[0000000010181408] = ff000000, %l1 = f312ffffff000000 | |
33221 | lduba [%i6+%o4]0x80,%l1 ! %l1 = 00000000000000ff | |
33222 | ! Mem[0000000030041408] = 76000000, %l1 = 00000000000000ff | |
33223 | ldsha [%i1+%o4]0x81,%l1 ! %l1 = 0000000000007600 | |
33224 | membar #Sync ! Added by membar checker (134) | |
33225 | ! Mem[0000000030001400] = 000000ff 000000ff ff000000 0000c676 | |
33226 | ! Mem[0000000030001410] = ff00ff00 000000ff 00ff0000 0000ff00 | |
33227 | ! Mem[0000000030001420] = 0000c676 00000000 00940000 000000ff | |
33228 | ! Mem[0000000030001430] = 00000000 ffff0000 0000ffff 00000000 | |
33229 | ldda [%i0]ASI_BLK_S,%f0 ! Block Load from 0000000030001400 | |
33230 | ! Mem[0000000030041400] = ffffffffffffffff, %l4 = 0000000000000000 | |
33231 | ldxa [%i1+%g0]0x89,%l4 ! %l4 = ffffffffffffffff | |
33232 | ! Starting 10 instruction Store Burst | |
33233 | ! %f19 = 00000000, Mem[0000000010141434] = 00000000 | |
33234 | st %f19,[%i5+0x034] ! Mem[0000000010141434] = 00000000 | |
33235 | ||
33236 | p0_label_800: | |
33237 | ! %f26 = 00000000 0000c676, Mem[0000000010001410] = 00ffff00 00000000 | |
33238 | stda %f26,[%i0+%o5]0x88 ! Mem[0000000010001410] = 00000000 0000c676 | |
33239 | ! %l3 = 0000000000000000, Mem[0000000010181408] = ff000000 | |
33240 | stha %l3,[%i6+%o4]0x80 ! Mem[0000000010181408] = 00000000 | |
33241 | ! %f20 = 00000000 ff00ffff, Mem[0000000010001408] = 00ff159c 00000000 | |
33242 | stda %f20,[%i0+0x008]%asi ! Mem[0000000010001408] = 00000000 ff00ffff | |
33243 | ! %f16 = 00000000, Mem[000000001010143c] = 000000ff | |
33244 | st %f16,[%i4+0x03c] ! Mem[000000001010143c] = 00000000 | |
33245 | ! Mem[0000000020800041] = ffff7379, %l4 = ffffffffffffffff | |
33246 | ldstub [%o1+0x041],%l4 ! %l4 = 000000ff000000ff | |
33247 | ! %l7 = 0000000000000000, Mem[0000000010141410] = 0000ff00 | |
33248 | stwa %l7,[%i5+%o5]0x88 ! Mem[0000000010141410] = 00000000 | |
33249 | ! Mem[00000000100c1408] = 00ff159c, %l2 = ffffffffffffffff | |
33250 | swap [%i3+%o4],%l2 ! %l2 = 0000000000ff159c | |
33251 | ! %f24 = 00000000 00000000, Mem[0000000030181410] = ff000000 00000000 | |
33252 | stda %f24,[%i6+%o5]0x81 ! Mem[0000000030181410] = 00000000 00000000 | |
33253 | ! Mem[0000000010041410] = 0000ffff, %l1 = 0000000000007600 | |
33254 | swapa [%i1+%o5]0x88,%l1 ! %l1 = 000000000000ffff | |
33255 | ! Starting 10 instruction Load Burst | |
33256 | ! Mem[0000000030081408] = 00000000, %l5 = 0000000000000000 | |
33257 | ldsba [%i2+%o4]0x89,%l5 ! %l5 = 0000000000000000 | |
33258 | ||
33259 | ! Check Point 160 for processor 0 | |
33260 | ||
33261 | set p0_check_pt_data_160,%g4 | |
33262 | rd %ccr,%g5 ! %g5 = 44 | |
33263 | ldx [%g4+0x08],%g2 | |
33264 | cmp %l0,%g2 ! %l0 = 0000000000000000 | |
33265 | bne %xcc,p0_reg_check_fail0 | |
33266 | mov 0xee0,%g1 | |
33267 | ldx [%g4+0x10],%g2 | |
33268 | cmp %l1,%g2 ! %l1 = 000000000000ffff | |
33269 | bne %xcc,p0_reg_check_fail1 | |
33270 | mov 0xee1,%g1 | |
33271 | ldx [%g4+0x18],%g2 | |
33272 | cmp %l3,%g2 ! %l3 = 0000000000000000 | |
33273 | bne %xcc,p0_reg_check_fail3 | |
33274 | mov 0xee3,%g1 | |
33275 | ldx [%g4+0x20],%g2 | |
33276 | cmp %l4,%g2 ! %l4 = 00000000000000ff | |
33277 | bne %xcc,p0_reg_check_fail4 | |
33278 | mov 0xee4,%g1 | |
33279 | ldx [%g4+0x28],%g2 | |
33280 | cmp %l5,%g2 ! %l5 = 0000000000000000 | |
33281 | bne %xcc,p0_reg_check_fail5 | |
33282 | mov 0xee5,%g1 | |
33283 | ldx [%g4+0x30],%g2 | |
33284 | cmp %l6,%g2 ! %l6 = 0000000000000000 | |
33285 | bne %xcc,p0_reg_check_fail6 | |
33286 | mov 0xee6,%g1 | |
33287 | ldx [%g4+0x38],%g2 | |
33288 | cmp %l7,%g2 ! %l7 = 0000000000000000 | |
33289 | bne %xcc,p0_reg_check_fail7 | |
33290 | mov 0xee7,%g1 | |
33291 | ldx [%g4+0x40],%g3 | |
33292 | std %f0,[%g4] | |
33293 | ldx [%g4],%g2 | |
33294 | cmp %g3,%g2 ! %f0 = 000000ff 000000ff | |
33295 | bne %xcc,p0_freg_check_fail | |
33296 | mov 0xf00,%g1 | |
33297 | ldx [%g4+0x48],%g3 | |
33298 | std %f2,[%g4] | |
33299 | ldx [%g4],%g2 | |
33300 | cmp %g3,%g2 ! %f2 = ff000000 0000c676 | |
33301 | bne %xcc,p0_freg_check_fail | |
33302 | mov 0xf02,%g1 | |
33303 | ldx [%g4+0x50],%g3 | |
33304 | std %f4,[%g4] | |
33305 | ldx [%g4],%g2 | |
33306 | cmp %g3,%g2 ! %f4 = ff00ff00 000000ff | |
33307 | bne %xcc,p0_freg_check_fail | |
33308 | mov 0xf04,%g1 | |
33309 | ldx [%g4+0x58],%g3 | |
33310 | std %f6,[%g4] | |
33311 | ldx [%g4],%g2 | |
33312 | cmp %g3,%g2 ! %f6 = 00ff0000 0000ff00 | |
33313 | bne %xcc,p0_freg_check_fail | |
33314 | mov 0xf06,%g1 | |
33315 | ldx [%g4+0x60],%g3 | |
33316 | std %f8,[%g4] | |
33317 | ldx [%g4],%g2 | |
33318 | cmp %g3,%g2 ! %f8 = 0000c676 00000000 | |
33319 | bne %xcc,p0_freg_check_fail | |
33320 | mov 0xf08,%g1 | |
33321 | ldx [%g4+0x68],%g3 | |
33322 | std %f10,[%g4] | |
33323 | ldx [%g4],%g2 | |
33324 | cmp %g3,%g2 ! %f10 = 00940000 000000ff | |
33325 | bne %xcc,p0_freg_check_fail | |
33326 | mov 0xf10,%g1 | |
33327 | ldx [%g4+0x70],%g3 | |
33328 | std %f12,[%g4] | |
33329 | ldx [%g4],%g2 | |
33330 | cmp %g3,%g2 ! %f12 = 00000000 ffff0000 | |
33331 | bne %xcc,p0_freg_check_fail | |
33332 | mov 0xf12,%g1 | |
33333 | ldx [%g4+0x78],%g3 | |
33334 | std %f14,[%g4] | |
33335 | ldx [%g4],%g2 | |
33336 | cmp %g3,%g2 ! %f14 = 0000ffff 00000000 | |
33337 | bne %xcc,p0_freg_check_fail | |
33338 | mov 0xf14,%g1 | |
33339 | ldx [%g4+0x80],%g3 | |
33340 | std %f18,[%g4] | |
33341 | ldx [%g4],%g2 | |
33342 | cmp %g3,%g2 ! %f18 = 00ff159c 00000000 | |
33343 | bne %xcc,p0_freg_check_fail | |
33344 | mov 0xf18,%g1 | |
33345 | ldx [%g4+0x88],%g3 | |
33346 | std %f20,[%g4] | |
33347 | ldx [%g4],%g2 | |
33348 | cmp %g3,%g2 ! %f20 = 00000000 ff00ffff | |
33349 | bne %xcc,p0_freg_check_fail | |
33350 | mov 0xf20,%g1 | |
33351 | ldx [%g4+0x90],%g3 | |
33352 | std %f30,[%g4] | |
33353 | ldx [%g4],%g2 | |
33354 | cmp %g3,%g2 ! %f30 = 0000ffff ffff00ff | |
33355 | bne %xcc,p0_freg_check_fail | |
33356 | mov 0xf30,%g1 | |
33357 | ||
33358 | ! Check Point 160 completed | |
33359 | ||
33360 | ||
33361 | ! End of Random Code for Thread 0 | |
33362 | ||
33363 | 1: membar #Sync ! Force all stores to complete | |
33364 | ||
33365 | ||
33366 | ! Self Check Disabled | |
33367 | ||
33368 | p0_check_registers: | |
33369 | ||
33370 | ! The test for processor 0 has passed | |
33371 | ||
33372 | p0_passed: | |
33373 | ta GOOD_TRAP | |
33374 | nop | |
33375 | ||
33376 | p0_reg_l0_fail: | |
33377 | or %g0,0xbd0,%g1 | |
33378 | ba,a p0_failed | |
33379 | p0_reg_l1_fail: | |
33380 | or %g0,0xbd1,%g1 | |
33381 | ba,a p0_failed | |
33382 | p0_reg_l2_fail: | |
33383 | or %g0,0xbd2,%g1 | |
33384 | ba,a p0_failed | |
33385 | p0_reg_l3_fail: | |
33386 | or %g0,0xbd3,%g1 | |
33387 | ba,a p0_failed | |
33388 | p0_reg_l4_fail: | |
33389 | or %g0,0xbd4,%g1 | |
33390 | ba,a p0_failed | |
33391 | p0_reg_l5_fail: | |
33392 | or %g0,0xbd5,%g1 | |
33393 | ba,a p0_failed | |
33394 | p0_reg_l6_fail: | |
33395 | or %g0,0xbd6,%g1 | |
33396 | ba,a p0_failed | |
33397 | p0_reg_l7_fail: | |
33398 | or %g0,0xbd7,%g1 | |
33399 | ba,a p0_failed | |
33400 | p0_ccr_fail: | |
33401 | ba p0_failed | |
33402 | mov %g5,%g3 ! %g5 = %ccr | |
33403 | p0_reg_check_fail0: | |
33404 | ba p0_failed | |
33405 | mov %l0,%g3 ! Reg %l0 compare failed | |
33406 | p0_reg_check_fail1: | |
33407 | ba p0_failed | |
33408 | mov %l1,%g3 ! Reg %l1 compare failed | |
33409 | p0_reg_check_fail2: | |
33410 | ba p0_failed | |
33411 | mov %l2,%g3 ! Reg %l2 compare failed | |
33412 | p0_reg_check_fail3: | |
33413 | ba p0_failed | |
33414 | mov %l3,%g3 ! Reg %l3 compare failed | |
33415 | p0_reg_check_fail4: | |
33416 | ba p0_failed | |
33417 | mov %l4,%g3 ! Reg %l4 compare failed | |
33418 | p0_reg_check_fail5: | |
33419 | ba p0_failed | |
33420 | mov %l5,%g3 ! Reg %l5 compare failed | |
33421 | p0_reg_check_fail6: | |
33422 | ba p0_failed | |
33423 | mov %l6,%g3 ! Reg %l6 compare failed | |
33424 | p0_reg_check_fail7: | |
33425 | ba p0_failed | |
33426 | mov %l7,%g3 ! Reg %l7 compare failed | |
33427 | p0_freg_check_fail: | |
33428 | ba p0_failed | |
33429 | nop | |
33430 | ||
33431 | ! The test for processor 0 failed | |
33432 | ||
33433 | p0_failed: | |
33434 | set p0_temp,%g6 | |
33435 | stx %g1,[%g6] | |
33436 | stx %g2,[%g6+8] | |
33437 | stx %g3,[%g6+16] | |
33438 | stx %fsr,[%g6+24] | |
33439 | ta BAD_TRAP | |
33440 | ||
33441 | ||
33442 | ! The local area data for processor 0 failed | |
33443 | ||
33444 | p0_local_failed: | |
33445 | set done_flags,%g5 | |
33446 | mov 3,%g6 | |
33447 | st %g6,[%g5+0x000] ! Set processor 0 done flag | |
33448 | ||
33449 | set p0_temp,%g6 | |
33450 | add %g1,%g4,%g1 | |
33451 | stx %g4,[%g6] | |
33452 | stx %g2,[%g6+8] | |
33453 | stx %g3,[%g6+16] | |
33454 | st %fsr,[%g6+24] | |
33455 | ta BAD_TRAP | |
33456 | ||
33457 | p0_selfmod_failed: | |
33458 | ba p0_failed | |
33459 | mov 0xabc,%g1 | |
33460 | ||
33461 | p0_branch_failed: | |
33462 | mov 0xbbb,%g1 | |
33463 | rd %ccr,%g2 | |
33464 | ba p0_failed | |
33465 | mov 0x0,%g3 | |
33466 | ||
33467 | p0_trap1e: | |
33468 | subc %l1,-0x9a4,%l2 | |
33469 | done | |
33470 | ||
33471 | p0_trap1o: | |
33472 | subc %l1,-0x9a4,%l2 | |
33473 | done | |
33474 | ||
33475 | ||
33476 | p0_trap2e: | |
33477 | orn %l0,0x0e2,%l6 | |
33478 | membar #Sync | |
33479 | stda %f0,[%i5]ASI_BLK_AIUP | |
33480 | membar #Sync | |
33481 | ldswa [%i4+%o5]ASI_AS_IF_USER_PRIMARY,%l0 ! Mem[0000000010101410] | |
33482 | xor %l3,%l1,%l4 | |
33483 | ldsba [%i0+%g0]ASI_AS_IF_USER_PRIMARY,%l0 ! Mem[0000000010001400] | |
33484 | done | |
33485 | ||
33486 | p0_trap2o: | |
33487 | orn %l0,0x0e2,%l6 | |
33488 | membar #Sync | |
33489 | stda %f0,[%o5]ASI_BLK_AIUP | |
33490 | membar #Sync | |
33491 | ldswa [%o4+%i5]ASI_AS_IF_USER_PRIMARY,%l0 ! Mem[0000000010101410] | |
33492 | xor %l3,%l1,%l4 | |
33493 | ldsba [%o0+%g0]ASI_AS_IF_USER_PRIMARY,%l0 ! Mem[0000000010001400] | |
33494 | done | |
33495 | ||
33496 | ||
33497 | p0_trap3e: | |
33498 | sub %l6,-0xc1e,%l5 | |
33499 | or %l2,-0xdcf,%l4 | |
33500 | xnor %l4,%l6,%l5 | |
33501 | subc %l2,-0xb70,%l3 | |
33502 | done | |
33503 | ||
33504 | p0_trap3o: | |
33505 | sub %l6,-0xc1e,%l5 | |
33506 | or %l2,-0xdcf,%l4 | |
33507 | xnor %l4,%l6,%l5 | |
33508 | subc %l2,-0xb70,%l3 | |
33509 | done | |
33510 | ||
33511 | ! Cross Processor Interrupt Handler | |
33512 | ||
33513 | cross_intr_handler: | |
33514 | membar #Sync | |
33515 | ! Identify the recipient of the interrupt | |
33516 | mov 0x10,%g1 ! VA of Core ID Register | |
33517 | ldxa [%g1]ASI_CMP_CORE_ID,%g1 | |
33518 | and %g1,0x3f,%g4 ! Extract Core ID in %g4 | |
33519 | sll %g4,2,%g1 ! Index into intr receive array | |
33520 | set received_xintr,%g2 ! Pointer to receive counters | |
33521 | lduw [%g2+%g1],%g3 ! Get receive count | |
33522 | inc %g3 ! Incement by 1 | |
33523 | st %g3,[%g2+%g1] ! Update receive count | |
33524 | ! Reset busy bit interrupts and return | |
33525 | mov 0x40,%g1 ! Busy bit | |
33526 | stxa %g1,[%g0]ASI_INTR_RECEIVE ! Clear the busy bit | |
33527 | membar #Sync | |
33528 | retry | |
33529 | ||
33530 | inst_access_handler: | |
33531 | done | |
33532 | ||
33533 | .align 256 | |
33534 | data_access_handler: | |
33535 | 1: done | |
33536 | ||
33537 | p0_init_memory_pointers: | |
33538 | set p0_init_registers,%g1 | |
33539 | mov %g0,%g2 | |
33540 | mov %g0,%g3 | |
33541 | mov %g0,%g4 | |
33542 | mov %g0,%g5 | |
33543 | mov %g0,%g6 | |
33544 | mov %g0,%g7 | |
33545 | ||
33546 | ! Initialize memory pointers for window 0 | |
33547 | set p0_local0_start,%i0 | |
33548 | set p0_local1_start,%i1 | |
33549 | set p0_local2_start,%i2 | |
33550 | set p0_local3_start,%i3 | |
33551 | set p0_local4_start,%i4 | |
33552 | set p0_local5_start,%i5 | |
33553 | set p0_local6_start,%i6 | |
33554 | clr %i7 | |
33555 | ! Init Local Registers in Window 0 | |
33556 | ldx [%g1+0x000],%l0 ! %l0 = 8d1f914076e0f9a4 | |
33557 | ldx [%g1+0x008],%l1 ! %l1 = b3c64d10647ec0fa | |
33558 | ldx [%g1+0x010],%l2 ! %l2 = 1f1c6cb7f752ba38 | |
33559 | ldx [%g1+0x018],%l3 ! %l3 = b95586e601a3a7b6 | |
33560 | ldx [%g1+0x020],%l4 ! %l4 = e4ed81c461d03f54 | |
33561 | ldx [%g1+0x028],%l5 ! %l5 = 904617026e9c2c11 | |
33562 | ldx [%g1+0x030],%l6 ! %l6 = 8e51e0d9ecb2d6a7 | |
33563 | ldx [%g1+0x038],%l7 ! %l7 = 5e5ae6f219778174 | |
33564 | ||
33565 | ! Initialize the output register of window 0 | |
33566 | ||
33567 | set share0_start,%o0 | |
33568 | set share1_start,%o1 | |
33569 | set share2_start,%o2 | |
33570 | set share3_start,%o3 | |
33571 | mov 0x08,%o4 | |
33572 | mov 0x10,%o5 | |
33573 | mov 0x18,%o6 | |
33574 | ||
33575 | retl | |
33576 | nop | |
33577 | ||
33578 | user_text_end: | |
33579 | .seg "text" | |
33580 | .align 0x2000 | |
33581 | user_near0_start: | |
33582 | p0_near_0_le: | |
33583 | jmpl %o7,%g0 | |
33584 | subc %l1,-0x9a4,%l2 | |
33585 | jmpl %o7,%g0 | |
33586 | nop | |
33587 | p0_near_0_he: | |
33588 | orn %l0,0x0e2,%l6 | |
33589 | stb %l2,[%i4+0x001] ! Mem[0000000010101401] | |
33590 | ldsh [%i2+0x010],%l0 ! Mem[0000000010081410] | |
33591 | sdivx %l3,0x8e2,%l4 | |
33592 | ldub [%i4+0x03b],%l0 ! Mem[000000001010143b] | |
33593 | jmpl %o7,%g0 | |
33594 | smul %l7,0xfda,%l2 | |
33595 | near0_b2b_h: | |
33596 | and %l1,0x688,%l7 | |
33597 | sdivx %l1,0x21a,%l1 | |
33598 | jmpl %o7,%g0 | |
33599 | add %l5,%l1,%l0 | |
33600 | near0_b2b_l: | |
33601 | umul %l7,0x127,%l4 | |
33602 | or %l7,%l1,%l2 | |
33603 | jmpl %o7,%g0 | |
33604 | udivx %l1,-0xcc1,%l6 | |
33605 | user_near0_end: | |
33606 | .seg "text" | |
33607 | .align 0x2000 | |
33608 | user_near1_start: | |
33609 | p0_near_1_le: | |
33610 | lduh [%i1+0x02c],%l2 ! Mem[000000001004142c] | |
33611 | lduw [%i5+0x028],%l6 ! Mem[0000000010141428] | |
33612 | udivx %l6,-0x261,%l3 | |
33613 | stw %l0,[%i5+0x01c] ! Mem[000000001014141c] | |
33614 | jmpl %o7,%g0 | |
33615 | std %l4,[%i4+0x038] ! Mem[0000000010101438] | |
33616 | p0_near_1_he: | |
33617 | andn %l5,0xcfc,%l6 | |
33618 | ldsb [%i6+0x005],%l6 ! Mem[0000000010181405] | |
33619 | ldsw [%i4+0x010],%l0 ! Mem[0000000010101410] | |
33620 | st %f19,[%i2+0x034] ! Mem[0000000010081434] | |
33621 | jmpl %o7,%g0 | |
33622 | sth %l0,[%i3+0x016] ! Mem[00000000100c1416] | |
33623 | near1_b2b_h: | |
33624 | and %l4,0xf0f,%l1 | |
33625 | nop | |
33626 | subc %l2,-0xdda,%l1 | |
33627 | mulx %l0,-0xc7d,%l0 | |
33628 | and %l3,-0x4c7,%l1 | |
33629 | jmpl %o7,%g0 | |
33630 | smul %l0,%l3,%l1 | |
33631 | near1_b2b_l: | |
33632 | orn %l2,%l6,%l7 | |
33633 | sdivx %l6,%l2,%l4 | |
33634 | sub %l3,%l1,%l3 | |
33635 | mulx %l7,0xdf3,%l5 | |
33636 | udivx %l5,%l1,%l0 | |
33637 | jmpl %o7,%g0 | |
33638 | xnor %l6,%l0,%l3 | |
33639 | user_near1_end: | |
33640 | .seg "text" | |
33641 | .align 0x2000 | |
33642 | user_near2_start: | |
33643 | p0_near_2_le: | |
33644 | ldstub [%i5+0x001],%l0 ! Mem[0000000010141401] | |
33645 | ldstub [%o2+0x001],%l6 ! Mem[00000000211c0001] | |
33646 | std %l4,[%i5+0x020] ! Mem[0000000010141420] | |
33647 | stw %l3,[%i1+0x024] ! Mem[0000000010041424] | |
33648 | or %l1,%l4,%l1 | |
33649 | jmpl %o7,%g0 | |
33650 | sth %l4,[%i0+0x016] ! Mem[0000000010001416] | |
33651 | p0_near_2_he: | |
33652 | umul %l6,0xf33,%l6 | |
33653 | jmpl %o7,%g0 | |
33654 | subc %l3,%l2,%l7 | |
33655 | near2_b2b_h: | |
33656 | jmpl %o7,%g0 | |
33657 | subc %l2,%l0,%l4 | |
33658 | jmpl %o7,%g0 | |
33659 | nop | |
33660 | near2_b2b_l: | |
33661 | jmpl %o7,%g0 | |
33662 | umul %l7,-0x451,%l4 | |
33663 | jmpl %o7,%g0 | |
33664 | nop | |
33665 | user_near2_end: | |
33666 | .seg "text" | |
33667 | .align 0x2000 | |
33668 | user_near3_start: | |
33669 | p0_near_3_le: | |
33670 | sth %l2,[%i5+0x02a] ! Mem[000000001014142a] | |
33671 | ldstub [%o2+0x001],%l3 ! Mem[00000000211c0001] | |
33672 | subc %l1,%l2,%l4 | |
33673 | jmpl %o7,%g0 | |
33674 | or %l1,-0x1ea,%l0 | |
33675 | p0_near_3_he: | |
33676 | or %l1,0x024,%l7 | |
33677 | addc %l2,0x1f6,%l2 | |
33678 | ldstub [%o3+0x101],%l7 ! Mem[0000000021800101] | |
33679 | jmpl %o7,%g0 | |
33680 | std %f16,[%i0+0x000] ! Mem[0000000010001400] | |
33681 | near3_b2b_h: | |
33682 | xor %l2,-0x37c,%l0 | |
33683 | smul %l0,0x0e5,%l0 | |
33684 | and %l5,%l5,%l6 | |
33685 | or %l4,%l1,%l4 | |
33686 | and %l4,-0x36b,%l6 | |
33687 | nop | |
33688 | sub %l2,%l6,%l5 | |
33689 | jmpl %o7,%g0 | |
33690 | smul %l3,%l0,%l4 | |
33691 | near3_b2b_l: | |
33692 | andn %l5,-0x266,%l1 | |
33693 | mulx %l0,%l1,%l0 | |
33694 | andn %l2,-0xce5,%l7 | |
33695 | orn %l7,%l5,%l0 | |
33696 | nop | |
33697 | umul %l0,0x633,%l3 | |
33698 | udivx %l7,0xa90,%l4 | |
33699 | jmpl %o7,%g0 | |
33700 | umul %l3,%l0,%l2 | |
33701 | user_near3_end: | |
33702 | .seg "text" | |
33703 | .text | |
33704 | .align 0x2000 | |
33705 | user_far0_start: | |
33706 | p0_far_0_le: | |
33707 | andn %l3,-0x326,%l3 | |
33708 | and %l0,%l4,%l1 | |
33709 | addc %l5,-0x97f,%l2 | |
33710 | stb %l1,[%i6+0x017] ! Mem[0000000010181417] | |
33711 | and %l5,-0x227,%l1 | |
33712 | umul %l4,%l6,%l2 | |
33713 | swap [%i5+0x03c],%l1 ! Mem[000000001014143c] | |
33714 | jmpl %o7,%g0 | |
33715 | ldsw [%i4+0x034],%l5 ! Mem[0000000010101434] | |
33716 | p0_far_0_lem: | |
33717 | andn %l3,-0x326,%l3 | |
33718 | and %l0,%l4,%l1 | |
33719 | addc %l5,-0x97f,%l2 | |
33720 | membar #Sync | |
33721 | stb %l1,[%i6+0x017] ! Mem[0000000010181417] | |
33722 | and %l5,-0x227,%l1 | |
33723 | umul %l4,%l6,%l2 | |
33724 | swap [%i5+0x03c],%l1 ! Mem[000000001014143c] | |
33725 | membar #Sync | |
33726 | jmpl %o7,%g0 | |
33727 | ldsw [%i4+0x034],%l5 ! Mem[0000000010101434] | |
33728 | p0_far_0_he: | |
33729 | nop | |
33730 | ldstub [%o0+0x000],%l4 ! Mem[00000000201c0000] | |
33731 | lduh [%i1+0x000],%l2 ! Mem[0000000010041400] | |
33732 | mulx %l2,%l3,%l0 | |
33733 | sub %l4,0xb12,%l5 | |
33734 | sub %l2,-0x02d,%l6 | |
33735 | swap [%i4+0x004],%l3 ! Mem[0000000010101404] | |
33736 | jmpl %o7,%g0 | |
33737 | st %f28,[%i6+0x020] ! Mem[0000000010181420] | |
33738 | p0_far_0_hem: | |
33739 | nop | |
33740 | ldstub [%o0+0x000],%l4 ! Mem[00000000201c0000] | |
33741 | membar #Sync | |
33742 | lduh [%i1+0x000],%l2 ! Mem[0000000010041400] | |
33743 | mulx %l2,%l3,%l0 | |
33744 | sub %l4,0xb12,%l5 | |
33745 | sub %l2,-0x02d,%l6 | |
33746 | swap [%i4+0x004],%l3 ! Mem[0000000010101404] | |
33747 | membar #Sync | |
33748 | jmpl %o7,%g0 | |
33749 | st %f28,[%i6+0x020] ! Mem[0000000010181420] | |
33750 | p0_loop_branch_0: | |
33751 | jmpl %o7+12,%g0 | |
33752 | add %l0,1,%l0 | |
33753 | far0_b2b_h: | |
33754 | jmpl %o7,%g0 | |
33755 | xnor %l6,-0x708,%l6 | |
33756 | jmpl %o7,%g0 | |
33757 | nop | |
33758 | far0_b2b_l: | |
33759 | jmpl %o7,%g0 | |
33760 | xor %l3,%l5,%l6 | |
33761 | jmpl %o7,%g0 | |
33762 | nop | |
33763 | user_far0_end: | |
33764 | .seg "text" | |
33765 | .text | |
33766 | .align 0x2000 | |
33767 | user_far1_start: | |
33768 | p0_far_1_le: | |
33769 | addc %l4,%l3,%l5 | |
33770 | stw %l1,[%i1+0x030] ! Mem[0000000010041430] | |
33771 | udivx %l4,0xa7e,%l1 | |
33772 | nop | |
33773 | xnor %l4,%l1,%l1 | |
33774 | sub %l6,-0xcb8,%l7 | |
33775 | stx %l1,[%i1+0x030] ! Mem[0000000010041430] | |
33776 | jmpl %o7,%g0 | |
33777 | sdivx %l1,%l3,%l2 | |
33778 | p0_far_1_lem: | |
33779 | addc %l4,%l3,%l5 | |
33780 | membar #Sync | |
33781 | stw %l1,[%i1+0x030] ! Mem[0000000010041430] | |
33782 | udivx %l4,0xa7e,%l1 | |
33783 | nop | |
33784 | xnor %l4,%l1,%l1 | |
33785 | sub %l6,-0xcb8,%l7 | |
33786 | stx %l1,[%i1+0x030] ! Mem[0000000010041430] | |
33787 | jmpl %o7,%g0 | |
33788 | sdivx %l1,%l3,%l2 | |
33789 | p0_far_1_he: | |
33790 | xnor %l0,%l1,%l3 | |
33791 | add %l0,0x75c,%l1 | |
33792 | jmpl %o7,%g0 | |
33793 | sdivx %l6,0x65f,%l4 | |
33794 | p0_far_1_hem: | |
33795 | xnor %l0,%l1,%l3 | |
33796 | add %l0,0x75c,%l1 | |
33797 | jmpl %o7,%g0 | |
33798 | sdivx %l6,0x65f,%l4 | |
33799 | p0_loop_branch_1: | |
33800 | jmpl %o7+12,%g0 | |
33801 | add %l0,2,%l0 | |
33802 | far1_b2b_h: | |
33803 | subc %l5,%l6,%l5 | |
33804 | jmpl %o7,%g0 | |
33805 | or %l3,-0x08e,%l2 | |
33806 | far1_b2b_l: | |
33807 | xor %l0,0xe8e,%l2 | |
33808 | jmpl %o7,%g0 | |
33809 | sdivx %l5,%l3,%l6 | |
33810 | user_far1_end: | |
33811 | .seg "text" | |
33812 | .text | |
33813 | .align 0x2000 | |
33814 | user_far2_start: | |
33815 | p0_far_2_le: | |
33816 | xnor %l4,0x9c2,%l2 | |
33817 | swap [%i5+0x024],%l4 ! Mem[0000000010141424] | |
33818 | std %l6,[%i0+0x028] ! Mem[0000000010001428] | |
33819 | jmpl %o7,%g0 | |
33820 | std %l6,[%i3+0x028] ! Mem[00000000100c1428] | |
33821 | p0_far_2_lem: | |
33822 | xnor %l4,0x9c2,%l2 | |
33823 | membar #Sync | |
33824 | swap [%i5+0x024],%l4 ! Mem[0000000010141424] | |
33825 | std %l6,[%i0+0x028] ! Mem[0000000010001428] | |
33826 | membar #Sync | |
33827 | jmpl %o7,%g0 | |
33828 | std %l6,[%i3+0x028] ! Mem[00000000100c1428] | |
33829 | p0_far_2_he: | |
33830 | ldstub [%o0+0x001],%l6 ! Mem[00000000201c0001] | |
33831 | ldsb [%i6+0x023],%l3 ! Mem[0000000010181423] | |
33832 | mulx %l7,%l1,%l5 | |
33833 | nop | |
33834 | sdivx %l5,%l1,%l6 | |
33835 | stb %l7,[%i5+0x034] ! Mem[0000000010141434] | |
33836 | jmpl %o7,%g0 | |
33837 | subc %l4,-0xfcd,%l5 | |
33838 | p0_far_2_hem: | |
33839 | ldstub [%o0+0x001],%l6 ! Mem[00000000201c0001] | |
33840 | membar #Sync | |
33841 | ldsb [%i6+0x023],%l3 ! Mem[0000000010181423] | |
33842 | mulx %l7,%l1,%l5 | |
33843 | nop | |
33844 | sdivx %l5,%l1,%l6 | |
33845 | stb %l7,[%i5+0x034] ! Mem[0000000010141434] | |
33846 | jmpl %o7,%g0 | |
33847 | subc %l4,-0xfcd,%l5 | |
33848 | p0_loop_branch_2: | |
33849 | jmpl %o7+12,%g0 | |
33850 | add %l0,3,%l0 | |
33851 | far2_b2b_h: | |
33852 | or %l4,-0x18f,%l5 | |
33853 | add %l5,%l2,%l5 | |
33854 | addc %l7,-0x117,%l4 | |
33855 | xor %l6,0xf3e,%l4 | |
33856 | jmpl %o7,%g0 | |
33857 | sub %l5,-0x491,%l7 | |
33858 | far2_b2b_l: | |
33859 | umul %l6,-0x2e7,%l7 | |
33860 | sub %l5,0x5a7,%l4 | |
33861 | andn %l0,0x930,%l3 | |
33862 | subc %l2,%l1,%l1 | |
33863 | jmpl %o7,%g0 | |
33864 | smul %l6,%l1,%l5 | |
33865 | user_far2_end: | |
33866 | .seg "text" | |
33867 | .text | |
33868 | .align 0x2000 | |
33869 | user_far3_start: | |
33870 | p0_far_3_le: | |
33871 | lduh [%i6+0x00c],%l3 ! Mem[000000001018140c] | |
33872 | ldstub [%i0+0x023],%l1 ! Mem[0000000010001423] | |
33873 | swap [%i2+0x038],%l5 ! Mem[0000000010081438] | |
33874 | ldsh [%i6+0x022],%l1 ! Mem[0000000010181422] | |
33875 | add %l3,%l1,%l4 | |
33876 | ldd [%i6+0x020],%f4 ! Mem[0000000010181420] | |
33877 | jmpl %o7,%g0 | |
33878 | nop | |
33879 | p0_far_3_lem: | |
33880 | membar #Sync | |
33881 | lduh [%i6+0x00c],%l3 ! Mem[000000001018140c] | |
33882 | ldstub [%i0+0x023],%l1 ! Mem[0000000010001423] | |
33883 | swap [%i2+0x038],%l5 ! Mem[0000000010081438] | |
33884 | ldsh [%i6+0x022],%l1 ! Mem[0000000010181422] | |
33885 | add %l3,%l1,%l4 | |
33886 | ldd [%i6+0x020],%f4 ! Mem[0000000010181420] | |
33887 | jmpl %o7,%g0 | |
33888 | nop | |
33889 | p0_far_3_he: | |
33890 | ldx [%i1+0x020],%l0 ! Mem[0000000010041420] | |
33891 | udivx %l0,0x492,%l5 | |
33892 | jmpl %o7,%g0 | |
33893 | addc %l3,-0x79e,%l6 | |
33894 | p0_far_3_hem: | |
33895 | membar #Sync | |
33896 | ldx [%i1+0x020],%l0 ! Mem[0000000010041420] | |
33897 | udivx %l0,0x492,%l5 | |
33898 | jmpl %o7,%g0 | |
33899 | addc %l3,-0x79e,%l6 | |
33900 | p0_loop_branch_3: | |
33901 | jmpl %o7+12,%g0 | |
33902 | add %l0,4,%l0 | |
33903 | far3_b2b_h: | |
33904 | xor %l4,%l7,%l2 | |
33905 | mulx %l2,%l1,%l3 | |
33906 | mulx %l1,-0x611,%l0 | |
33907 | xor %l7,%l2,%l5 | |
33908 | and %l3,%l7,%l2 | |
33909 | jmpl %o7,%g0 | |
33910 | and %l7,%l7,%l0 | |
33911 | far3_b2b_l: | |
33912 | smul %l1,%l2,%l6 | |
33913 | and %l4,0x944,%l4 | |
33914 | umul %l0,0x3d8,%l1 | |
33915 | sdivx %l1,0x7c7,%l0 | |
33916 | sdivx %l2,%l0,%l7 | |
33917 | jmpl %o7,%g0 | |
33918 | or %l1,0xf63,%l3 | |
33919 | user_far3_end: | |
33920 | .seg "text" | |
33921 | .align 0x2000 | |
33922 | user_jump0_start: | |
33923 | INIT_MEM(0, 0x0010, 1, +, 0, +, 0) | |
33924 | p0_jmpl_0_le: | |
33925 | jmpl %g6+8,%g0 | |
33926 | subc %l4,-0xc29,%l3 | |
33927 | p0_call_0_le: | |
33928 | add %l0,%l5,%l4 | |
33929 | ldd [%i3+0x028],%f8 ! Mem[00000000100c1428] | |
33930 | nop | |
33931 | andn %l7,%l0,%l4 | |
33932 | retl | |
33933 | sdivx %l6,%l3,%l3 | |
33934 | p0_jmpl_0_lo: | |
33935 | jmpl %g6+8,%g0 | |
33936 | subc %l4,-0xc29,%l3 | |
33937 | p0_call_0_lo: | |
33938 | add %l0,%l5,%l4 | |
33939 | ldd [%o3+0x028],%f8 ! Mem[00000000100c1428] | |
33940 | nop | |
33941 | andn %l7,%l0,%l4 | |
33942 | retl | |
33943 | sdivx %l6,%l3,%l3 | |
33944 | p0_jmpl_0_he: | |
33945 | ldub [%i4+0x01a],%l6 ! Mem[000000001010141a] | |
33946 | std %l2,[%i5+0x038] ! Mem[0000000010141438] | |
33947 | or %l5,0x8a6,%l3 | |
33948 | nop | |
33949 | ldstub [%o1+0x040],%l1 ! Mem[0000000020800040] | |
33950 | jmpl %g6+8,%g0 | |
33951 | xor %l0,-0x9b0,%l4 | |
33952 | p0_call_0_he: | |
33953 | ldstub [%o2+0x000],%l2 ! Mem[00000000211c0000] | |
33954 | stb %l3,[%i1+0x00f] ! Mem[000000001004140f] | |
33955 | retl | |
33956 | stb %l6,[%i4+0x033] ! Mem[0000000010101433] | |
33957 | p0_jmpl_0_ho: | |
33958 | ldub [%o4+0x01a],%l6 ! Mem[000000001010141a] | |
33959 | std %l2,[%o5+0x038] ! Mem[0000000010141438] | |
33960 | or %l5,0x8a6,%l3 | |
33961 | nop | |
33962 | ldstub [%i1+0x040],%l1 ! Mem[0000000020800040] | |
33963 | jmpl %g6+8,%g0 | |
33964 | xor %l0,-0x9b0,%l4 | |
33965 | p0_call_0_ho: | |
33966 | ldstub [%i2+0x000],%l2 ! Mem[00000000211c0000] | |
33967 | stb %l3,[%o1+0x00f] ! Mem[000000001004140f] | |
33968 | retl | |
33969 | stb %l6,[%o4+0x033] ! Mem[0000000010101433] | |
33970 | user_jump0_end: | |
33971 | .seg "text" | |
33972 | .align 0x2000 | |
33973 | user_jump1_start: | |
33974 | INIT_MEM(0, 0x0020, 1, +, 0, +, 0) | |
33975 | p0_jmpl_1_le: | |
33976 | stw %l2,[%i4+0x014] ! Mem[0000000010101414] | |
33977 | ldstub [%o1+0x001],%l3 ! Mem[0000000020800001] | |
33978 | jmpl %g6+8,%g0 | |
33979 | ldub [%i0+0x018],%l2 ! Mem[0000000010001418] | |
33980 | p0_call_1_le: | |
33981 | orn %l1,%l3,%l4 | |
33982 | xor %l3,%l3,%l3 | |
33983 | sdivx %l3,0x485,%l5 | |
33984 | ldstub [%o3+0x1c0],%l2 ! Mem[00000000218001c0] | |
33985 | ldub [%i1+0x031],%l5 ! Mem[0000000010041431] | |
33986 | retl | |
33987 | sub %l0,%l7,%l1 | |
33988 | p0_jmpl_1_lo: | |
33989 | stw %l2,[%o4+0x014] ! Mem[0000000010101414] | |
33990 | ldstub [%i1+0x001],%l3 ! Mem[0000000020800001] | |
33991 | jmpl %g6+8,%g0 | |
33992 | ldub [%o0+0x018],%l2 ! Mem[0000000010001418] | |
33993 | p0_call_1_lo: | |
33994 | orn %l1,%l3,%l4 | |
33995 | xor %l3,%l3,%l3 | |
33996 | sdivx %l3,0x485,%l5 | |
33997 | ldstub [%i3+0x1c0],%l2 ! Mem[00000000218001c0] | |
33998 | ldub [%o1+0x031],%l5 ! Mem[0000000010041431] | |
33999 | retl | |
34000 | sub %l0,%l7,%l1 | |
34001 | p0_jmpl_1_he: | |
34002 | std %f26,[%i4+0x010] ! Mem[0000000010101410] | |
34003 | smul %l6,0x4bc,%l0 | |
34004 | mulx %l4,0x821,%l2 | |
34005 | ldd [%i6+0x000],%l0 ! Mem[0000000010181400] | |
34006 | stb %l0,[%i1+0x033] ! Mem[0000000010041433] | |
34007 | nop | |
34008 | swap [%i2+0x028],%l5 ! Mem[0000000010081428] | |
34009 | jmpl %g6+8,%g0 | |
34010 | xor %l6,-0x4dc,%l0 | |
34011 | p0_call_1_he: | |
34012 | nop | |
34013 | lduh [%i4+0x010],%l6 ! Mem[0000000010101410] | |
34014 | ldsb [%i3+0x004],%l7 ! Mem[00000000100c1404] | |
34015 | smul %l0,%l2,%l7 | |
34016 | stb %l1,[%i1+0x01d] ! Mem[000000001004141d] | |
34017 | retl | |
34018 | ldd [%i6+0x020],%l4 ! Mem[0000000010181420] | |
34019 | p0_jmpl_1_ho: | |
34020 | std %f26,[%o4+0x010] ! Mem[0000000010101410] | |
34021 | smul %l6,0x4bc,%l0 | |
34022 | mulx %l4,0x821,%l2 | |
34023 | ldd [%o6+0x000],%l0 ! Mem[0000000010181400] | |
34024 | stb %l0,[%o1+0x033] ! Mem[0000000010041433] | |
34025 | nop | |
34026 | swap [%o2+0x028],%l5 ! Mem[0000000010081428] | |
34027 | jmpl %g6+8,%g0 | |
34028 | xor %l6,-0x4dc,%l0 | |
34029 | p0_call_1_ho: | |
34030 | nop | |
34031 | lduh [%o4+0x010],%l6 ! Mem[0000000010101410] | |
34032 | ldsb [%o3+0x004],%l7 ! Mem[00000000100c1404] | |
34033 | smul %l0,%l2,%l7 | |
34034 | stb %l1,[%o1+0x01d] ! Mem[000000001004141d] | |
34035 | retl | |
34036 | ldd [%o6+0x020],%l4 ! Mem[0000000010181420] | |
34037 | user_jump1_end: | |
34038 | .seg "text" | |
34039 | .align 0x2000 | |
34040 | user_jump2_start: | |
34041 | INIT_MEM(0, 0x0030, 1, +, 0, +, 0) | |
34042 | p0_jmpl_2_le: | |
34043 | std %l2,[%i3+0x028] ! Mem[00000000100c1428] | |
34044 | jmpl %g6+8,%g0 | |
34045 | ldsb [%i0+0x017],%l7 ! Mem[0000000010001417] | |
34046 | p0_call_2_le: | |
34047 | subc %l5,0xdd3,%l4 | |
34048 | sdivx %l1,%l0,%l4 | |
34049 | mulx %l3,%l2,%l7 | |
34050 | xor %l7,0x245,%l5 | |
34051 | add %l4,-0xc33,%l6 | |
34052 | swap [%i0+0x014],%l3 ! Mem[0000000010001414] | |
34053 | retl | |
34054 | lduh [%i4+0x006],%l3 ! Mem[0000000010101406] | |
34055 | p0_jmpl_2_lo: | |
34056 | std %l2,[%o3+0x028] ! Mem[00000000100c1428] | |
34057 | jmpl %g6+8,%g0 | |
34058 | ldsb [%o0+0x017],%l7 ! Mem[0000000010001417] | |
34059 | p0_call_2_lo: | |
34060 | subc %l5,0xdd3,%l4 | |
34061 | sdivx %l1,%l0,%l4 | |
34062 | mulx %l3,%l2,%l7 | |
34063 | xor %l7,0x245,%l5 | |
34064 | add %l4,-0xc33,%l6 | |
34065 | swap [%o0+0x014],%l3 ! Mem[0000000010001414] | |
34066 | retl | |
34067 | lduh [%o4+0x006],%l3 ! Mem[0000000010101406] | |
34068 | p0_jmpl_2_he: | |
34069 | sth %l0,[%i5+0x036] ! Mem[0000000010141436] | |
34070 | ldstub [%o3+0x100],%l3 ! Mem[0000000021800100] | |
34071 | jmpl %g6+8,%g0 | |
34072 | udivx %l7,0x966,%l4 | |
34073 | p0_call_2_he: | |
34074 | ldd [%i0+0x028],%f30 ! Mem[0000000010001428] | |
34075 | retl | |
34076 | smul %l4,0x3a8,%l7 | |
34077 | p0_jmpl_2_ho: | |
34078 | sth %l0,[%o5+0x036] ! Mem[0000000010141436] | |
34079 | ldstub [%i3+0x100],%l3 ! Mem[0000000021800100] | |
34080 | jmpl %g6+8,%g0 | |
34081 | udivx %l7,0x966,%l4 | |
34082 | p0_call_2_ho: | |
34083 | ldd [%o0+0x028],%f30 ! Mem[0000000010001428] | |
34084 | retl | |
34085 | smul %l4,0x3a8,%l7 | |
34086 | user_jump2_end: | |
34087 | .seg "text" | |
34088 | .align 0x2000 | |
34089 | user_jump3_start: | |
34090 | INIT_MEM(0, 0x0040, 1, +, 0, +, 0) | |
34091 | p0_jmpl_3_le: | |
34092 | std %f10,[%i6+0x028] ! Mem[0000000010181428] | |
34093 | jmpl %g6+8,%g0 | |
34094 | udivx %l4,-0xe0b,%l7 | |
34095 | p0_call_3_le: | |
34096 | mulx %l2,-0xadf,%l4 | |
34097 | sth %l0,[%i4+0x02c] ! Mem[000000001010142c] | |
34098 | retl | |
34099 | xnor %l1,-0x86d,%l7 | |
34100 | p0_jmpl_3_lo: | |
34101 | std %f10,[%o6+0x028] ! Mem[0000000010181428] | |
34102 | jmpl %g6+8,%g0 | |
34103 | udivx %l4,-0xe0b,%l7 | |
34104 | p0_call_3_lo: | |
34105 | mulx %l2,-0xadf,%l4 | |
34106 | sth %l0,[%o4+0x02c] ! Mem[000000001010142c] | |
34107 | retl | |
34108 | xnor %l1,-0x86d,%l7 | |
34109 | p0_jmpl_3_he: | |
34110 | add %l3,%l4,%l2 | |
34111 | andn %l3,%l0,%l7 | |
34112 | ldd [%i3+0x008],%l0 ! Mem[00000000100c1408] | |
34113 | ldub [%i5+0x01f],%l0 ! Mem[000000001014141f] | |
34114 | jmpl %g6+8,%g0 | |
34115 | xor %l3,%l1,%l6 | |
34116 | p0_call_3_he: | |
34117 | sdivx %l2,%l4,%l2 | |
34118 | swap [%i2+0x014],%l4 ! Mem[0000000010081414] | |
34119 | mulx %l7,-0x207,%l2 | |
34120 | st %f26,[%i4+0x01c] ! Mem[000000001010141c] | |
34121 | retl | |
34122 | or %l3,%l4,%l4 | |
34123 | p0_jmpl_3_ho: | |
34124 | add %l3,%l4,%l2 | |
34125 | andn %l3,%l0,%l7 | |
34126 | ldd [%o3+0x008],%l0 ! Mem[00000000100c1408] | |
34127 | ldub [%o5+0x01f],%l0 ! Mem[000000001014141f] | |
34128 | jmpl %g6+8,%g0 | |
34129 | xor %l3,%l1,%l6 | |
34130 | p0_call_3_ho: | |
34131 | sdivx %l2,%l4,%l2 | |
34132 | swap [%o2+0x014],%l4 ! Mem[0000000010081414] | |
34133 | mulx %l7,-0x207,%l2 | |
34134 | st %f26,[%o4+0x01c] ! Mem[000000001010141c] | |
34135 | retl | |
34136 | or %l3,%l4,%l4 | |
34137 | user_jump3_end: | |
34138 | ||
34139 | .seg "data" | |
34140 | .align 0x2000 | |
34141 | user_data_start: | |
34142 | done_flags: | |
34143 | .word 0 | |
34144 | .align 8 | |
34145 | done_count: | |
34146 | .word 0,0 | |
34147 | Start_Flags: | |
34148 | .word 0,0,0,0 | |
34149 | Finish_Flag: | |
34150 | .word 0,0 | |
34151 | .align 8 | |
34152 | num_processors: | |
34153 | .word 1 | |
34154 | num_agents: | |
34155 | .word 0 | |
34156 | no_membar: | |
34157 | .word 0 | |
34158 | max_ireg: | |
34159 | .word 8,0 | |
34160 | max_freg: | |
34161 | .word 32,0 | |
34162 | .align 64 | |
34163 | p0_temp: | |
34164 | .word 0,0,0,0,0,0,0,0 | |
34165 | .word 0,0,0,0,0,0,0,0 | |
34166 | .word 0,0,0,0,0,0,0,0 | |
34167 | .word 0,0,0,0,0,0,0,0 | |
34168 | p0_debug: | |
34169 | .word 0,0,0,0,0,0,0,0 | |
34170 | .word 0,0,0,0,0,0,0,0 | |
34171 | p0_fsr: | |
34172 | .word 0x00000000,0x00000000 | |
34173 | .align 8 | |
34174 | p0_loop_cnt: | |
34175 | .word 1,0 | |
34176 | max_windows: | |
34177 | .word 1,0,0,0,0,0,0,0 | |
34178 | .word 0,0,0,0,0,0,0,0 | |
34179 | .word 0,0,0,0,0,0,0,0 | |
34180 | .word 0,0,0,0,0,0,0,0 | |
34181 | .word 0,0,0,0,0,0,0,0 | |
34182 | .word 0,0,0,0,0,0,0,0 | |
34183 | .word 0,0,0,0,0,0,0,0 | |
34184 | .word 0,0,0,0,0,0,0,0 | |
34185 | .word 0,0,0,0,0,0,0,0 | |
34186 | .word 0,0,0,0,0,0,0,0 | |
34187 | .word 0,0,0,0,0,0,0,0 | |
34188 | .word 0,0,0,0,0,0,0,0 | |
34189 | .word 0,0,0,0,0,0,0,0 | |
34190 | .word 0,0,0,0,0,0,0,0 | |
34191 | .word 0,0,0,0,0,0,0,0 | |
34192 | .word 0,0,0,0,0,0,0,0 | |
34193 | .word 0,0,0,0,0,0,0,0 | |
34194 | .word 0,0,0,0,0,0,0,0 | |
34195 | .word 0,0,0,0,0,0,0,0 | |
34196 | .word 0,0,0,0,0,0,0,0 | |
34197 | .word 0,0,0,0,0,0,0,0 | |
34198 | .word 0,0,0,0,0,0,0,0 | |
34199 | .word 0,0,0,0,0,0,0,0 | |
34200 | .word 0,0,0,0,0,0,0,0 | |
34201 | .word 0,0,0,0,0,0,0,0 | |
34202 | .word 0,0,0,0,0,0,0,0 | |
34203 | .word 0,0,0,0,0,0,0,0 | |
34204 | .word 0,0,0,0,0,0,0,0 | |
34205 | .word 0,0,0,0,0,0,0,0 | |
34206 | .word 0,0,0,0,0,0,0,0 | |
34207 | .word 0,0,0,0,0,0,0,0 | |
34208 | .word 0,0,0,0,0,0,0,0 | |
34209 | ||
34210 | .align 8 | |
34211 | p0_init_registers: | |
34212 | .word 0x8d1f9140,0x76e0f9a4 ! Init value for %l0 | |
34213 | .word 0xb3c64d10,0x647ec0fa ! Init value for %l1 | |
34214 | .word 0x1f1c6cb7,0xf752ba38 ! Init value for %l2 | |
34215 | .word 0xb95586e6,0x01a3a7b6 ! Init value for %l3 | |
34216 | .word 0xe4ed81c4,0x61d03f54 ! Init value for %l4 | |
34217 | .word 0x90461702,0x6e9c2c11 ! Init value for %l5 | |
34218 | .word 0x8e51e0d9,0xecb2d6a7 ! Init value for %l6 | |
34219 | .word 0x5e5ae6f2,0x19778174 ! Init value for %l7 | |
34220 | .align 64 | |
34221 | p0_init_freg: | |
34222 | .word 0x52bd2a08,0xe7dca4ad ! Init value for %f0 | |
34223 | .word 0xad96aaab,0x51f9a49a ! Init value for %f2 | |
34224 | .word 0x0e39f730,0xd77b0e51 ! Init value for %f4 | |
34225 | .word 0x56fe427e,0x7d307e94 ! Init value for %f6 | |
34226 | .word 0x2c892a47,0x8cc97409 ! Init value for %f8 | |
34227 | .word 0x9c5199ef,0x8dbf4312 ! Init value for %f10 | |
34228 | .word 0x0723192a,0xcb509b01 ! Init value for %f12 | |
34229 | .word 0x2a60f72b,0xc2f8101a ! Init value for %f14 | |
34230 | .word 0xbe3385c9,0x9783a018 ! Init value for %f16 | |
34231 | .word 0x50b85688,0x7dd8d224 ! Init value for %f18 | |
34232 | .word 0xfcc4c676,0x35b08349 ! Init value for %f20 | |
34233 | .word 0x13e24ca8,0x7533e78f ! Init value for %f22 | |
34234 | .word 0x30bf20e2,0x13de5d10 ! Init value for %f24 | |
34235 | .word 0xc669c7f2,0x54545c27 ! Init value for %f26 | |
34236 | .word 0x7a2e5168,0x80182efa ! Init value for %f28 | |
34237 | .word 0x7023d8e9,0x44a3d8e7 ! Init value for %f30 | |
34238 | .word 0x200cb45c,0xdaf95407 ! Init value for %f32 | |
34239 | .word 0x4dbd3c52,0x55bf5d9c ! Init value for %f34 | |
34240 | .word 0x4fcf2e80,0x156588dd ! Init value for %f36 | |
34241 | .word 0xab7c74a3,0xd501bd77 ! Init value for %f38 | |
34242 | .word 0x4b9b25a5,0xa54cf597 ! Init value for %f40 | |
34243 | .word 0x6fc3f3aa,0xd2a8e3f3 ! Init value for %f42 | |
34244 | .word 0x8afb4846,0x43bd41a6 ! Init value for %f44 | |
34245 | .word 0xf0811e62,0x50e01762 ! Init value for %f46 | |
34246 | .word 0xa57dd26c,0x80508583 | |
34247 | .word 0x0d3aed34,0x3d0118a7 | |
34248 | .word 0x5e18ae26,0x2ec9f49d | |
34249 | .word 0xf6eac030,0xb29a8e6f | |
34250 | .word 0x35aee2bc,0x31c44c2c | |
34251 | .word 0x5ddcc0e4,0xac504e79 | |
34252 | .word 0x4d73240d,0x7ee3995a | |
34253 | .word 0xab17e60c,0x5402c38e | |
34254 | p0_share_mask: | |
34255 | .word 0xffff0000,0x00000000 | |
34256 | .word 0x00000000,0x00000000 | |
34257 | .word 0x00000000,0x00000000 | |
34258 | .word 0x00000000,0x00000000 | |
34259 | .word 0x00000000,0x00000000 | |
34260 | .word 0x00000000,0x00000000 | |
34261 | .word 0x00000000,0x00000000 | |
34262 | .word 0x00000000,0x00000000 | |
34263 | p0_expected_registers: | |
34264 | .word 0x00000000,0x00000000 | |
34265 | .word 0x00000000,0x0000ffff | |
34266 | .word 0x00000000,0x00ff159c | |
34267 | .word 0x00000000,0x00000000 | |
34268 | .word 0x00000000,0x000000ff | |
34269 | .word 0x00000000,0x00000000 | |
34270 | .word 0x00000000,0x00000000 | |
34271 | .word 0x00000000,0x00000000 | |
34272 | p0_expected_fp_regs: | |
34273 | .word 0x000000ff,0x000000ff | |
34274 | .word 0xff000000,0x0000c676 | |
34275 | .word 0xff00ff00,0x000000ff | |
34276 | .word 0x00ff0000,0x0000ff00 | |
34277 | .word 0x0000c676,0x00000000 | |
34278 | .word 0x00940000,0x000000ff | |
34279 | .word 0x00000000,0xffff0000 | |
34280 | .word 0x0000ffff,0x00000000 | |
34281 | .word 0x00000000,0x0000c676 | |
34282 | .word 0x00ff159c,0x00000000 | |
34283 | .word 0x00000000,0xff00ffff | |
34284 | .word 0xff00ffff,0x00001f41 | |
34285 | .word 0x00000000,0x00000000 | |
34286 | .word 0x00000000,0x0000c676 | |
34287 | .word 0x00000000,0x033488c7 | |
34288 | .word 0x0000ffff,0xffff00ff | |
34289 | .word 0x00000000,0x00000000 ! %fsr = 0000000000000000 | |
34290 | p0_local0_expect: | |
34291 | .word 0x00000000,0x00000000 | |
34292 | .word 0x00000000,0xff00ffff | |
34293 | .word 0x76c60000,0x00000000 | |
34294 | .word 0xff000000,0xe6bf2212 | |
34295 | .word 0x76000000,0x000000ff | |
34296 | .word 0xffffffff,0x79ff00ff | |
34297 | .word 0xff000000,0x00009400 | |
34298 | .word 0x7827da3e,0x597bac10 | |
34299 | p0_local0_sec_expect: | |
34300 | .word 0x000000ff,0x000000ff | |
34301 | .word 0xff000000,0x0000c676 | |
34302 | .word 0xff00ff00,0x000000ff | |
34303 | .word 0x00ff0000,0x0000ff00 | |
34304 | .word 0x0000c676,0x00000000 | |
34305 | .word 0x00940000,0x000000ff | |
34306 | .word 0x00000000,0xffff0000 | |
34307 | .word 0x0000ffff,0x00000000 | |
34308 | p0_local1_expect: | |
34309 | .word 0x00000000,0x0000c676 | |
34310 | .word 0xff00ffff,0x00001f41 | |
34311 | .word 0x00760000,0x00000000 | |
34312 | .word 0xff000000,0xe6bf2212 | |
34313 | .word 0x000000ff,0xff000000 | |
34314 | .word 0x00000000,0x00000000 | |
34315 | .word 0x000000ff,0xf31200ff | |
34316 | .word 0xffff00c6,0x0000ff00 | |
34317 | p0_local1_sec_expect: | |
34318 | .word 0xffffffff,0xffffffff | |
34319 | .word 0x76000000,0x00000000 | |
34320 | .word 0xffff0000,0x00ffffff | |
34321 | .word 0x00000000,0xff000000 | |
34322 | .word 0xf31200ff,0x00ff0000 | |
34323 | .word 0x00000000,0x0000ff00 | |
34324 | .word 0x00ff0000,0x033488c7 | |
34325 | .word 0x411f0000,0xffff00ff | |
34326 | p0_local2_expect: | |
34327 | .word 0x76000000,0x00000000 | |
34328 | .word 0x00000000,0x0000c676 | |
34329 | .word 0xff000000,0x00000000 | |
34330 | .word 0x00000000,0x0000ff79 | |
34331 | .word 0x0000ff00,0x033488c7 | |
34332 | .word 0x00000000,0x00000000 | |
34333 | .word 0xc7883403,0x0000ff00 | |
34334 | .word 0x00ff0000,0xc6000000 | |
34335 | p0_local2_sec_expect: | |
34336 | .word 0xff883403,0xc7883403 | |
34337 | .word 0x00000000,0x00000000 | |
34338 | .word 0x000000ff,0x000000ff | |
34339 | .word 0x00000012,0x00000000 | |
34340 | .word 0xff000000,0x79ff0000 | |
34341 | .word 0x00000000,0x00007957 | |
34342 | .word 0x00000000,0x000000ff | |
34343 | .word 0xfc0000ff,0x00000000 | |
34344 | p0_local3_expect: | |
34345 | .word 0xffff0000,0xff000000 | |
34346 | .word 0xffffffff,0x9c15ff00 | |
34347 | .word 0x00000000,0x0000c676 | |
34348 | .word 0x00000041,0xffffffff | |
34349 | .word 0x00000000,0xc7ecffbb | |
34350 | .word 0xf312ffff,0xff000000 | |
34351 | .word 0x00000000,0x00000000 | |
34352 | .word 0xc6000000,0x79ff0000 | |
34353 | p0_local3_sec_expect: | |
34354 | .word 0x00000000,0x00000000 | |
34355 | .word 0xff000000,0x00000000 | |
34356 | .word 0xffffffff,0x000000ff | |
34357 | .word 0x0000ffff,0xffff0000 | |
34358 | .word 0x00000000,0x00000000 | |
34359 | .word 0x0000ff79,0xffffffff | |
34360 | .word 0x00940000,0x000000ff | |
34361 | .word 0xffffffff,0xffffffff | |
34362 | p0_local4_expect: | |
34363 | .word 0xff00ffff,0x00001f41 | |
34364 | .word 0xffc60000,0xffffff00 | |
34365 | .word 0xff000000,0xff000000 | |
34366 | .word 0x000000ff,0x00000003 | |
34367 | .word 0x000000ff,0x0000ffff | |
34368 | .word 0xff000000,0x000000ff | |
34369 | .word 0x00ff0000,0x000000ff | |
34370 | .word 0x00000000,0x00000000 | |
34371 | p0_local4_sec_expect: | |
34372 | .word 0xff000000,0x00000076 | |
34373 | .word 0x00000000,0x00ff0000 | |
34374 | .word 0x00000000,0x000000ff | |
34375 | .word 0xffffffff,0xffffffff | |
34376 | .word 0xff000000,0x033488c7 | |
34377 | .word 0x03000000,0x00000000 | |
34378 | .word 0xc7883403,0x0000ff00 | |
34379 | .word 0x000000c6,0x00001f41 | |
34380 | p0_local5_expect: | |
34381 | .word 0xff009400,0xffff0000 | |
34382 | .word 0xffffffff,0xffffffff | |
34383 | .word 0x00000000,0x10ac7b59 | |
34384 | .word 0x000079ff,0xff000000 | |
34385 | .word 0x00000000,0x0000c676 | |
34386 | .word 0xffffffff,0xffffffff | |
34387 | .word 0x000000ff,0x00000000 | |
34388 | .word 0xffffffff,0x0000ffff | |
34389 | p0_local5_sec_expect: | |
34390 | .word 0x00000000,0x0000c676 | |
34391 | .word 0xff000000,0x00000000 | |
34392 | .word 0x76000000,0x000000ff | |
34393 | .word 0x00000000,0x0000ff00 | |
34394 | .word 0x000000ff,0x00000000 | |
34395 | .word 0x0000ff00,0x00000003 | |
34396 | .word 0x00ff0000,0x033488c7 | |
34397 | .word 0x411f0000,0xc6000000 | |
34398 | p0_local6_expect: | |
34399 | .word 0x00ff00ff,0x0000ffff | |
34400 | .word 0x00000000,0xff000000 | |
34401 | .word 0x00000000,0xff000000 | |
34402 | .word 0xff0000ff,0x0000ff00 | |
34403 | .word 0x00ff159c,0xffffffff | |
34404 | .word 0x00940000,0x00ff0000 | |
34405 | .word 0x00000000,0xffff0000 | |
34406 | .word 0x00ff9400,0x000000ff | |
34407 | p0_local6_sec_expect: | |
34408 | .word 0x00000000,0x000000ff | |
34409 | .word 0x76000000,0x00000000 | |
34410 | .word 0x00000000,0x00000000 | |
34411 | .word 0x00000000,0x0000ff00 | |
34412 | .word 0xc6000000,0x00ff0000 | |
34413 | .word 0xc7883403,0x00000000 | |
34414 | .word 0xc7883403,0xff000000 | |
34415 | .word 0x00ff0000,0xff000000 | |
34416 | share0_expect: | |
34417 | .word 0xff009457,0xf0aa8010 | |
34418 | .word 0x5272e85b,0xd9862e60 | |
34419 | .word 0x629ba907,0xc7ca88e1 | |
34420 | .word 0x76c4d234,0x4355bb73 | |
34421 | .word 0xac78a0bc,0xe1dc78ec | |
34422 | .word 0x0b19e0ad,0x11082ecd | |
34423 | .word 0xdf0edb50,0x9b214b04 | |
34424 | .word 0x780bab43,0xde05daf8 | |
34425 | share1_expect: | |
34426 | .word 0xffff8470,0xefc20dda | |
34427 | .word 0x10149626,0x3e6cd51a | |
34428 | .word 0xaea9a1b5,0xf84ea446 | |
34429 | .word 0xcc83445d,0xaa5afd38 | |
34430 | .word 0xda4e3988,0x9f4f39ef | |
34431 | .word 0xd589ae48,0xd92b34f2 | |
34432 | .word 0xc32c3d85,0x9ca5e138 | |
34433 | .word 0xdada768b,0x0970adc2 | |
34434 | .word 0xffff7379,0x73c369c6 | |
34435 | .word 0xef0ab8f7,0x084a778d | |
34436 | .word 0x7a428ffc,0x69bd7e16 | |
34437 | .word 0xabf28e0c,0xf914af32 | |
34438 | .word 0x90d5f312,0x8436e0aa | |
34439 | .word 0x459b835f,0xe49647d2 | |
34440 | .word 0x33e0d112,0xa62ac12d | |
34441 | .word 0xdc73d73b,0xdfeada38 | |
34442 | share2_expect: | |
34443 | .word 0x00ff1a4c,0x6a5a67d3 | |
34444 | .word 0xe74b12df,0xd3f6a30f | |
34445 | .word 0xa23c2d33,0x0670c194 | |
34446 | .word 0xdbc8aa13,0xb554d795 | |
34447 | .word 0x69a67428,0xb878fdbf | |
34448 | .word 0x2e19649c,0x6332e16c | |
34449 | .word 0x127e073c,0xab8e3c0c | |
34450 | .word 0x2a5e9d08,0x7f9fb4cb | |
34451 | share3_expect: | |
34452 | .word 0x00ff13a3,0x7a92d757 | |
34453 | .word 0x559b83bf,0x268cb9fd | |
34454 | .word 0x44d6f96c,0x8a134ff2 | |
34455 | .word 0xce188677,0x236d55e5 | |
34456 | .word 0x6b98f967,0xc35bfb07 | |
34457 | .word 0xce799a76,0x65192191 | |
34458 | .word 0x6a90ecec,0x11facb09 | |
34459 | .word 0x984ea482,0xb102a5c9 | |
34460 | .word 0xff001df3,0xa9f19307 | |
34461 | .word 0x5551e1c8,0x18daf724 | |
34462 | .word 0xe417ec15,0x23362514 | |
34463 | .word 0xfa047f1e,0x6f8b3b4c | |
34464 | .word 0x92eb68ff,0xd9fcf768 | |
34465 | .word 0x73364407,0x8c6640c8 | |
34466 | .word 0x05d46677,0x946891c9 | |
34467 | .word 0x7b90c206,0x1a94d81e | |
34468 | .word 0xffffa433,0xa0b63b6b | |
34469 | .word 0x5686baa9,0xfecbd8b0 | |
34470 | .word 0x674f9b26,0xbc4225eb | |
34471 | .word 0xbad3ce9e,0x7f7b496a | |
34472 | .word 0x441d3e8b,0x33729b73 | |
34473 | .word 0xb25b912d,0xcdf04247 | |
34474 | .word 0xfc975c4c,0x03f0595e | |
34475 | .word 0x2d450202,0xd5ab3beb | |
34476 | .word 0x00ff8d82,0x9ed0db31 | |
34477 | .word 0x8cea82c6,0x03a51d4a | |
34478 | .word 0x50194506,0x34207eb1 | |
34479 | .word 0x6aa26ccc,0x1991cae2 | |
34480 | .word 0x1f425a0f,0x328657eb | |
34481 | .word 0x638a9490,0x6e7dd6e0 | |
34482 | .word 0x14fa2802,0x86bd960f | |
34483 | .word 0x8b7bb53b,0x36eef05a | |
34484 | .word 0xc67611d1,0x72852788 | |
34485 | .word 0x0544eaad,0xd05888e3 | |
34486 | .word 0xbf2fe427,0x9b01d938 | |
34487 | .word 0xf843c4d1,0xaa43cb4c | |
34488 | .word 0x5530db6f,0xfc1a415c | |
34489 | .word 0x05b29829,0x1f8fc1db | |
34490 | .word 0x0483f13b,0x82ba3e4f | |
34491 | .word 0x7bd7e8a5,0xb247de53 | |
34492 | .word 0xff001df6,0x4ab6c98d | |
34493 | .word 0x3615ecee,0xdfcc1e57 | |
34494 | .word 0x25a186e5,0xd2563089 | |
34495 | .word 0xbbb65629,0x95e05356 | |
34496 | .word 0x10d505cc,0x429f2497 | |
34497 | .word 0xb7083caf,0x1f5c37a0 | |
34498 | .word 0x3aa05c1d,0x2775f280 | |
34499 | .word 0x5cb6475a,0xbef286f8 | |
34500 | .word 0x00ffe2ae,0x2d6e0573 | |
34501 | .word 0x92089695,0x2453a552 | |
34502 | .word 0xc4937579,0x27bed091 | |
34503 | .word 0x6a192eb1,0xb4eb225a | |
34504 | .word 0xc4c7d03a,0x4f148273 | |
34505 | .word 0xa3f2ba44,0xa0b61a73 | |
34506 | .word 0x551abb03,0xb46d4ee3 | |
34507 | .word 0xca331786,0xabe80bed | |
34508 | .word 0x00002a00,0x2e9e7231 | |
34509 | .word 0x2ed8762b,0x671cab70 | |
34510 | .word 0x992d1f3f,0xbcafe1e7 | |
34511 | .word 0x49c9beea,0x2eefd80d | |
34512 | .word 0x01c7c3b3,0x2fcf3e2e | |
34513 | .word 0x2f954034,0x2e1ecb78 | |
34514 | .word 0xf6f87035,0x815c6355 | |
34515 | .word 0x7caaef96,0xce5c8f90 | |
34516 | p0_invalidate_semaphore: | |
34517 | .word 0 | |
34518 | ||
34519 | ! Data for check points | |
34520 | ||
34521 | .align 8 | |
34522 | p0_check_pt_data_1: | |
34523 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34524 | .word 0x00000000,0x7ff18310 ! Expected data for %l0 | |
34525 | .word 0x00000000,0x0000004e ! Expected data for %l1 | |
34526 | .word 0x00000000,0x00000014 ! Expected data for %l2 | |
34527 | .word 0x00000000,0xa504591a ! Expected data for %l3 | |
34528 | .word 0x00000000,0x00004e9d ! Expected data for %l4 | |
34529 | .word 0x00000000,0x6bdd789c ! Expected data for %l5 | |
34530 | .word 0x00000000,0x4e239ae6 ! Expected data for %l6 | |
34531 | .word 0xffffffff,0xb23ce724 ! Expected data for %l7 | |
34532 | .word 0x52bd2a08,0xe7dca4ad ! Expected data for %f0 | |
34533 | .word 0xf2f43560,0xd244b274 ! Expected data for %f2 | |
34534 | .word 0x7e00650a,0xe239da63 ! Expected data for %f12 | |
34535 | .word 0x30bf20e2,0x3d0f4f09 ! Expected data for %f24 | |
34536 | .word 0xc669c7f2,0xdfc18dfe ! Expected data for %f26 | |
34537 | .word 0xdb7e6dd7,0x47c758ea ! Expected data for %f30 | |
34538 | p0_check_pt_data_2: | |
34539 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34540 | .word 0x00000000,0x000005bc ! Expected data for %l0 | |
34541 | .word 0x00000000,0xb6f16259 ! Expected data for %l1 | |
34542 | .word 0x00000000,0xf2f43560 ! Expected data for %l2 | |
34543 | .word 0xcd6765be,0x446d5ace ! Expected data for %l3 | |
34544 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
34545 | .word 0xffffffff,0xffffc956 ! Expected data for %l5 | |
34546 | .word 0x00000000,0x000044cf ! Expected data for %l6 | |
34547 | .word 0x00000000,0x00000040 ! Expected data for %l7 | |
34548 | .word 0x31b11d78,0x77000000 ! Expected data for %f0 | |
34549 | .word 0x5a850483,0x7b4442f4 ! Expected data for %f18 | |
34550 | p0_check_pt_data_3: | |
34551 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34552 | .word 0x00000000,0xbb6ed422 ! Expected data for %l0 | |
34553 | .word 0x00000000,0x6824961c ! Expected data for %l1 | |
34554 | .word 0x00000000,0x00006123 ! Expected data for %l2 | |
34555 | .word 0x00000000,0x7d6e06da ! Expected data for %l3 | |
34556 | .word 0xffffffff,0xf442447b ! Expected data for %l4 | |
34557 | .word 0x00000000,0x00004e9d ! Expected data for %l5 | |
34558 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
34559 | .word 0x00000000,0x000056c9 ! Expected data for %l7 | |
34560 | .word 0xc65ec2db,0x51f9a49a ! Expected data for %f0 | |
34561 | .word 0xffffc956,0x000000ff ! Expected data for %f2 | |
34562 | .word 0x510e7bd7,0x30f7390e ! Expected data for %f4 | |
34563 | .word 0xdc2e096e,0xa21561a2 ! Expected data for %f6 | |
34564 | .word 0x1fd2c976,0x2164489c ! Expected data for %f8 | |
34565 | .word 0x426070e9,0xfc734517 ! Expected data for %f10 | |
34566 | .word 0x5790ef9d,0xff194990 ! Expected data for %f12 | |
34567 | .word 0x2a1a930b,0xc238965e ! Expected data for %f14 | |
34568 | .word 0x750d818d,0x35b08349 ! Expected data for %f20 | |
34569 | .word 0x17c17c7e,0xda309d4e ! Expected data for %f26 | |
34570 | .word 0x02400000,0x80182efa ! Expected data for %f28 | |
34571 | .word 0xfff16232,0xecb7b96f ! Expected data for %f30 | |
34572 | p0_check_pt_data_4: | |
34573 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34574 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
34575 | .word 0x00000000,0x00004e00 ! Expected data for %l1 | |
34576 | .word 0x00000000,0x0000002b ! Expected data for %l2 | |
34577 | .word 0x00000000,0xd6740000 ! Expected data for %l3 | |
34578 | .word 0x00000000,0x0000009a ! Expected data for %l4 | |
34579 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
34580 | .word 0x00000000,0x0000004e ! Expected data for %l6 | |
34581 | .word 0x00000000,0x9c5199ef ! Expected data for %l7 | |
34582 | .word 0x510e7bd7,0x30f7390e ! Expected data for %f4 | |
34583 | .word 0x7a2e5168,0x19778174 ! Expected data for %f6 | |
34584 | .word 0xfcc4c676,0x64663f7f ! Expected data for %f12 | |
34585 | .word 0x5a850483,0xda309d4e ! Expected data for %f18 | |
34586 | .word 0x00000077,0x781db131 ! Expected data for %f22 | |
34587 | .word 0x4d1170cb,0x284795cd ! Expected data for %f24 | |
34588 | .word 0x78a985e2,0x00000000 ! Expected data for %f28 | |
34589 | p0_check_pt_data_5: | |
34590 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34591 | .word 0x00000000,0x4e9ddcfa ! Expected data for %l0 | |
34592 | .word 0x00000000,0x74817719 ! Expected data for %l1 | |
34593 | .word 0xffffffff,0xa5049d4e ! Expected data for %l2 | |
34594 | .word 0xff000000,0x56c9ffff ! Expected data for %l3 | |
34595 | .word 0x00000000,0xa6ce90df ! Expected data for %l5 | |
34596 | .word 0x00000000,0x0000004e ! Expected data for %l6 | |
34597 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
34598 | .word 0xc65ec2db,0x51f9a49a ! Expected data for %f0 | |
34599 | .word 0xffffc956,0x000000ff ! Expected data for %f2 | |
34600 | .word 0x7a2e5168,0x19778174 ! Expected data for %f6 | |
34601 | .word 0xfff16232,0x3d0f4f09 ! Expected data for %f16 | |
34602 | .word 0x00000000,0x1e40a716 ! Expected data for %f18 | |
34603 | .word 0x87f953ef,0x00000000 ! Expected data for %f20 | |
34604 | .word 0x02233d7d,0x5209669e ! Expected data for %f22 | |
34605 | .word 0x00000076,0x21dd459a ! Expected data for %f24 | |
34606 | .word 0x2a60f72b,0xc2f8101a ! Expected data for %f26 | |
34607 | .word 0x00000000,0x1a5904a5 ! Expected data for %f28 | |
34608 | .word 0x0d687798,0x9af6877f ! Expected data for %f30 | |
34609 | p0_check_pt_data_6: | |
34610 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34611 | .word 0x00000000,0x845542ff ! Expected data for %l0 | |
34612 | .word 0xffffffff,0xdfc5ab1b ! Expected data for %l1 | |
34613 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
34614 | .word 0x00000000,0x6ddd37d6 ! Expected data for %l3 | |
34615 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
34616 | .word 0x00000000,0x000000da ! Expected data for %l5 | |
34617 | .word 0x00000000,0x00000038 ! Expected data for %l6 | |
34618 | .word 0x00000000,0x22d46ebb ! Expected data for %l7 | |
34619 | .word 0xf1ba113a,0x51f9a49a ! Expected data for %f0 | |
34620 | .word 0x4e000000,0x00000000 ! Expected data for %f2 | |
34621 | .word 0x009a0000,0x30f7390e ! Expected data for %f4 | |
34622 | .word 0x000000ff,0xfc734517 ! Expected data for %f10 | |
34623 | .word 0x680e24c7,0xa5049d4e ! Expected data for %f16 | |
34624 | .word 0x5a850483,0x4e000000 ! Expected data for %f18 | |
34625 | .word 0x00000000,0xa6ce90df ! Expected data for %f20 | |
34626 | .word 0x1243bf8d,0xef99519c ! Expected data for %f22 | |
34627 | .word 0xd637dd6d,0xaa50967c ! Expected data for %f24 | |
34628 | .word 0x6fb9b7ec,0x3262f1ff ! Expected data for %f26 | |
34629 | .word 0x8773ff6f,0x59c42361 ! Expected data for %f28 | |
34630 | .word 0xe6ad650b,0xd1cff893 ! Expected data for %f30 | |
34631 | p0_check_pt_data_7: | |
34632 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34633 | .word 0x00000000,0x00000004 ! Expected data for %l0 | |
34634 | .word 0xffffffff,0x9a000000 ! Expected data for %l1 | |
34635 | .word 0x00000000,0x7d6e06da ! Expected data for %l2 | |
34636 | .word 0x00000000,0xafeb8d4f ! Expected data for %l3 | |
34637 | .word 0x00000000,0x000044cf ! Expected data for %l4 | |
34638 | .word 0x00000000,0x000000bd ! Expected data for %l5 | |
34639 | .word 0xffffc956,0x000000ff ! Expected data for %l6 | |
34640 | .word 0xffffffff,0xac8f149b ! Expected data for %l7 | |
34641 | .word 0xf1ba113a,0x51f9a49a ! Expected data for %f0 | |
34642 | .word 0x0000c676,0x284795cd ! Expected data for %f6 | |
34643 | .word 0x19778174,0xc238965e ! Expected data for %f14 | |
34644 | .word 0x5a850483,0x1fd2c976 ! Expected data for %f18 | |
34645 | .word 0x51f9a49a,0x174573fc ! Expected data for %f20 | |
34646 | .word 0x2e000000,0xff425584 ! Expected data for %f24 | |
34647 | .word 0x7d6e06da,0x59c42361 ! Expected data for %f28 | |
34648 | p0_check_pt_data_8: | |
34649 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34650 | .word 0xffffffff,0x8dbf4312 ! Expected data for %l0 | |
34651 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
34652 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
34653 | .word 0x00000000,0x000001a3 ! Expected data for %l4 | |
34654 | .word 0xffffffff,0xff9d04a5 ! Expected data for %l5 | |
34655 | .word 0x00000000,0x00000044 ! Expected data for %l6 | |
34656 | .word 0x00000000,0x7d307e94 ! Expected data for %l7 | |
34657 | .word 0x0000c676,0x284795cd ! Expected data for %f6 | |
34658 | .word 0x7a2e51ff,0x19778174 ! Expected data for %f14 | |
34659 | .word 0xff000000,0x56c9ffff ! Expected data for %f18 | |
34660 | p0_check_pt_data_9: | |
34661 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34662 | .word 0x00000000,0x8dbf4312 ! Expected data for %l0 | |
34663 | .word 0x00000000,0x00000065 ! Expected data for %l2 | |
34664 | .word 0x00000000,0x00004517 ! Expected data for %l3 | |
34665 | .word 0x00000000,0xdf90cea6 ! Expected data for %l4 | |
34666 | .word 0x00000000,0x0000002e ! Expected data for %l5 | |
34667 | .word 0xffffffff,0xffffff12 ! Expected data for %l6 | |
34668 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
34669 | .word 0x24e73cb2,0x4e000000 ! Expected data for %f0 | |
34670 | .word 0xdfa6f0ed,0x000000ff ! Expected data for %f2 | |
34671 | .word 0x19778174,0xfc734517 ! Expected data for %f4 | |
34672 | .word 0xbecd92b7,0x070d2073 ! Expected data for %f6 | |
34673 | .word 0x7bb0c341,0x76bb5e66 ! Expected data for %f8 | |
34674 | .word 0xa173f7b8,0x53b7f84b ! Expected data for %f10 | |
34675 | .word 0x0334d2d1,0xb75e7100 ! Expected data for %f12 | |
34676 | .word 0x6a4e7d55,0x403cf9cd ! Expected data for %f14 | |
34677 | .word 0xff1d0000,0xa73028c1 ! Expected data for %f18 | |
34678 | .word 0x4983b035,0x174573fc ! Expected data for %f20 | |
34679 | p0_check_pt_data_10: | |
34680 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34681 | .word 0x00000000,0x284795cd ! Expected data for %l0 | |
34682 | .word 0x00000000,0xcf440012 ! Expected data for %l1 | |
34683 | .word 0x00000000,0x00000024 ! Expected data for %l2 | |
34684 | .word 0xffffffff,0xffffc676 ! Expected data for %l3 | |
34685 | .word 0x00000000,0x000000fa ! Expected data for %l4 | |
34686 | .word 0x00000000,0x00000065 ! Expected data for %l5 | |
34687 | .word 0xffffffff,0xffffffa6 ! Expected data for %l6 | |
34688 | .word 0x00000000,0x45a4f951 ! Expected data for %l7 | |
34689 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
34690 | .word 0x0000004e,0xb23ce724 ! Expected data for %f6 | |
34691 | .word 0xfc734517,0x00000012 ! Expected data for %f16 | |
34692 | .word 0x1243bf8d,0xecb7b96f ! Expected data for %f22 | |
34693 | p0_check_pt_data_11: | |
34694 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34695 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
34696 | .word 0x00000000,0x0000faf3 ! Expected data for %l1 | |
34697 | .word 0x6ddd113a,0x76c6c4fc ! Expected data for %l2 | |
34698 | .word 0x00000000,0x000000ef ! Expected data for %l3 | |
34699 | .word 0xffffffff,0xdfa6f0ed ! Expected data for %l4 | |
34700 | .word 0x00000000,0xa73028c1 ! Expected data for %l5 | |
34701 | .word 0x00000000,0xb23ce7ff ! Expected data for %l6 | |
34702 | .word 0xdfa6f0ed,0x000000ff ! Expected data for %l7 | |
34703 | .word 0x24e73cb2,0x4e0000a6 ! Expected data for %f0 | |
34704 | .word 0xdfa6f0ed,0x00000012 ! Expected data for %f2 | |
34705 | .word 0x00000000,0x12ff76c9 ! Expected data for %f4 | |
34706 | .word 0xbecd92b7,0x070d2073 ! Expected data for %f6 | |
34707 | .word 0x7bb0c341,0x76bb5e66 ! Expected data for %f8 | |
34708 | .word 0xa173f7b8,0x53b7f84b ! Expected data for %f10 | |
34709 | .word 0x0334d2d1,0xb75e7100 ! Expected data for %f12 | |
34710 | .word 0x6a4e7d55,0x403cf9cd ! Expected data for %f14 | |
34711 | .word 0x56fe427e,0x7d307e94 ! Expected data for %f22 | |
34712 | .word 0x6fb9b7ec,0x120044cf ! Expected data for %f26 | |
34713 | .word 0x24000000,0x59c42361 ! Expected data for %f28 | |
34714 | p0_check_pt_data_12: | |
34715 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34716 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
34717 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
34718 | .word 0xffffffff,0xffffc4fc ! Expected data for %l2 | |
34719 | .word 0x00000000,0x2164489c ! Expected data for %l3 | |
34720 | .word 0x00000000,0x19778174 ! Expected data for %l4 | |
34721 | .word 0x00000000,0xcf9d04a5 ! Expected data for %l5 | |
34722 | .word 0x00000000,0x6ddd113a ! Expected data for %l6 | |
34723 | .word 0xdfa6f0ed,0x00000012 ! Expected data for %f2 | |
34724 | .word 0xbecd92b7,0x070d2073 ! Expected data for %f6 | |
34725 | .word 0x7a2e5168,0x19778174 ! Expected data for %f10 | |
34726 | .word 0x6ddd113a,0x76c6c4fc ! Expected data for %f14 | |
34727 | .word 0x4e000000,0x00000012 ! Expected data for %f16 | |
34728 | .word 0xff000000,0x120044cf ! Expected data for %f26 | |
34729 | p0_check_pt_data_13: | |
34730 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34731 | .word 0x00000000,0x00001977 ! Expected data for %l0 | |
34732 | .word 0x19778174,0xfc734517 ! Expected data for %l1 | |
34733 | .word 0xffffffff,0xff000000 ! Expected data for %l2 | |
34734 | .word 0x00000000,0x76c6c4fc ! Expected data for %l3 | |
34735 | .word 0x00000000,0x0000004e ! Expected data for %l4 | |
34736 | .word 0x00000000,0x0000fcc4 ! Expected data for %l5 | |
34737 | .word 0xc4fca49a,0xecb7b96f ! Expected data for %l6 | |
34738 | .word 0x771900ff,0x00000012 ! Expected data for %f2 | |
34739 | .word 0x00000000,0x5e9638c2 ! Expected data for %f4 | |
34740 | .word 0xbecd92b7,0x00001d12 ! Expected data for %f6 | |
34741 | .word 0x4e000000,0xff000000 ! Expected data for %f16 | |
34742 | .word 0xff000000,0x3262f1ff ! Expected data for %f30 | |
34743 | p0_check_pt_data_14: | |
34744 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34745 | .word 0x00000000,0x35b08349 ! Expected data for %l0 | |
34746 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
34747 | .word 0x00000000,0xff4573fc ! Expected data for %l2 | |
34748 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
34749 | .word 0xbecd92b7,0x00001d12 ! Expected data for %l4 | |
34750 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
34751 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
34752 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
34753 | .word 0x24e73cb2,0x4e0000a6 ! Expected data for %f0 | |
34754 | .word 0x771900ff,0x00000012 ! Expected data for %f2 | |
34755 | .word 0xff000000,0xff000000 ! Expected data for %f16 | |
34756 | .word 0xfcf8cfd1,0x59c42361 ! Expected data for %f28 | |
34757 | p0_check_pt_data_15: | |
34758 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34759 | .word 0x00000000,0x9b148fac ! Expected data for %l1 | |
34760 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
34761 | .word 0x00000000,0x00000024 ! Expected data for %l4 | |
34762 | .word 0x00000000,0xa600004e ! Expected data for %l5 | |
34763 | .word 0xffffffff,0xffffc976 ! Expected data for %l6 | |
34764 | .word 0x00000000,0xff1d0000 ! Expected data for %l7 | |
34765 | .word 0x121d0000,0xfcf8cfd1 ! Expected data for %f0 | |
34766 | .word 0x00000024,0x00000000 ! Expected data for %f2 | |
34767 | .word 0xbecd92b7,0x00001d12 ! Expected data for %f4 | |
34768 | .word 0xff1d0000,0x00000024 ! Expected data for %f6 | |
34769 | .word 0x00000012,0x76c6c4fc ! Expected data for %f8 | |
34770 | .word 0x4e239aff,0x637cc6fe ! Expected data for %f10 | |
34771 | .word 0xbbbf9dab,0xac8f149b ! Expected data for %f12 | |
34772 | .word 0xfa2e1880,0x000000ff ! Expected data for %f14 | |
34773 | .word 0xff000000,0x7e42fe56 ! Expected data for %f24 | |
34774 | .word 0x1200004e,0x59c42361 ! Expected data for %f28 | |
34775 | p0_check_pt_data_16: | |
34776 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34777 | .word 0x7d307e94,0x00000000 ! Expected data for %l0 | |
34778 | .word 0x28e5d938,0x62a6209e ! Expected data for %l1 | |
34779 | .word 0x00000000,0x0974c98c ! Expected data for %l2 | |
34780 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
34781 | .word 0x00000000,0x00000047 ! Expected data for %l5 | |
34782 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
34783 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
34784 | .word 0xfff0a6df,0x00000000 ! Expected data for %f4 | |
34785 | .word 0xff000000,0x00000024 ! Expected data for %f6 | |
34786 | .word 0xef000000,0x637cc6fe ! Expected data for %f10 | |
34787 | .word 0xada4dce7,0x070d2073 ! Expected data for %f28 | |
34788 | p0_check_pt_data_17: | |
34789 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34790 | .word 0x00000000,0xffff0084 ! Expected data for %l0 | |
34791 | .word 0x00000000,0x000000a5 ! Expected data for %l1 | |
34792 | .word 0xfcc44517,0x1704855a ! Expected data for %l2 | |
34793 | .word 0xffffffff,0xffffffc9 ! Expected data for %l3 | |
34794 | .word 0x947e307d,0x000000ff ! Expected data for %l4 | |
34795 | .word 0x00000000,0x0000ff1d ! Expected data for %l5 | |
34796 | .word 0x00000000,0x7d307e94 ! Expected data for %l6 | |
34797 | .word 0x00000000,0x76c60000 ! Expected data for %l7 | |
34798 | .word 0x121d0000,0xfcf8cfd1 ! Expected data for %f0 | |
34799 | .word 0x00001dff,0x00000000 ! Expected data for %f2 | |
34800 | .word 0x070d2073,0x00000000 ! Expected data for %f4 | |
34801 | .word 0xff000000,0x00000024 ! Expected data for %f6 | |
34802 | .word 0xbecd92b7,0x00001d12 ! Expected data for %f18 | |
34803 | .word 0xfffe427e,0x070d2073 ! Expected data for %f28 | |
34804 | p0_check_pt_data_18: | |
34805 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34806 | .word 0x00000000,0x9c5199ff ! Expected data for %l0 | |
34807 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
34808 | .word 0x0000ff45,0xc45f3d9f ! Expected data for %l2 | |
34809 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
34810 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
34811 | .word 0xffffffff,0x8400ffff ! Expected data for %l5 | |
34812 | .word 0x00000000,0xff000024 ! Expected data for %l6 | |
34813 | .word 0x9c5199ff,0x59c42361 ! Expected data for %l7 | |
34814 | .word 0x00001dff,0xff99519c ! Expected data for %f2 | |
34815 | .word 0x947e307d,0x240000ff ! Expected data for %f14 | |
34816 | .word 0xff000000,0xbecd0000 ! Expected data for %f16 | |
34817 | .word 0xff000000,0x7e42feff ! Expected data for %f18 | |
34818 | .word 0x174573fc,0x74817719 ! Expected data for %f20 | |
34819 | .word 0x73200d07,0x00000012 ! Expected data for %f22 | |
34820 | .word 0x00001dff,0x41c3b07b ! Expected data for %f24 | |
34821 | .word 0x4bf8b753,0xb8f773ff ! Expected data for %f26 | |
34822 | .word 0xfcc4c676,0xd1d23403 ! Expected data for %f28 | |
34823 | .word 0x24000000,0x00000000 ! Expected data for %f30 | |
34824 | p0_check_pt_data_19: | |
34825 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34826 | .word 0x00000000,0x0000007e ! Expected data for %l0 | |
34827 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
34828 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
34829 | .word 0xcf440012,0x00000000 ! Expected data for %l4 | |
34830 | .word 0xffffffff,0xfc7345ff ! Expected data for %l5 | |
34831 | .word 0x00000000,0xfa2e1880 ! Expected data for %l6 | |
34832 | .word 0x00000000,0x0000ffff ! Expected data for %l7 | |
34833 | .word 0x121d0000,0xfcf8cfd1 ! Expected data for %f0 | |
34834 | .word 0xff000000,0x00000024 ! Expected data for %f6 | |
34835 | .word 0x665ef8fc,0xedf0a6df ! Expected data for %f10 | |
34836 | .word 0xff000000,0xff1d0000 ! Expected data for %f16 | |
34837 | .word 0xfff0a6df,0x00000000 ! Expected data for %f30 | |
34838 | p0_check_pt_data_20: | |
34839 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34840 | .word 0xffffffff,0xffff9c51 ! Expected data for %l0 | |
34841 | .word 0x00000000,0x120044cf ! Expected data for %l1 | |
34842 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
34843 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
34844 | .word 0x00000000,0xbecd0000 ! Expected data for %l4 | |
34845 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
34846 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
34847 | .word 0x00000000,0x00000012 ! Expected data for %l7 | |
34848 | .word 0xff000000,0x00000000 ! Expected data for %f2 | |
34849 | .word 0x070d2073,0x00000000 ! Expected data for %f4 | |
34850 | .word 0xbbbf9dab,0x00000000 ! Expected data for %f12 | |
34851 | .word 0xc4fc0000,0x59000000 ! Expected data for %f14 | |
34852 | p0_check_pt_data_21: | |
34853 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34854 | .word 0x00001dff,0x41c3b07b ! Expected data for %l0 | |
34855 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
34856 | .word 0x00000000,0xffc4c676 ! Expected data for %l2 | |
34857 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
34858 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
34859 | .word 0x00000000,0xb7929eff ! Expected data for %l6 | |
34860 | .word 0x00000000,0x121d0000 ! Expected data for %l7 | |
34861 | .word 0x7a2e51ff,0x00000000 ! Expected data for %f0 | |
34862 | .word 0xff000000,0x00000000 ! Expected data for %f2 | |
34863 | .word 0x947e307d,0x00000000 ! Expected data for %f4 | |
34864 | .word 0xff000000,0x00000024 ! Expected data for %f6 | |
34865 | .word 0x000000ff,0x59000000 ! Expected data for %f14 | |
34866 | .word 0x00000000,0x0000f8fc ! Expected data for %f16 | |
34867 | .word 0x2a1a930b,0xffffffdd ! Expected data for %f22 | |
34868 | p0_check_pt_data_22: | |
34869 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34870 | .word 0x00000000,0xfff85e66 ! Expected data for %l0 | |
34871 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
34872 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
34873 | .word 0x00000000,0x0000007b ! Expected data for %l4 | |
34874 | .word 0x00000000,0xfcc4c676 ! Expected data for %l5 | |
34875 | .word 0x00000000,0x00000043 ! Expected data for %l6 | |
34876 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
34877 | .word 0x7a2e51ff,0x00000000 ! Expected data for %f0 | |
34878 | .word 0xffffffc9,0x00ff1dff ! Expected data for %f2 | |
34879 | .word 0x947e307d,0x00000000 ! Expected data for %f4 | |
34880 | p0_check_pt_data_23: | |
34881 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34882 | .word 0x00000000,0x665ef8ff ! Expected data for %l0 | |
34883 | .word 0x00000000,0x000000df ! Expected data for %l1 | |
34884 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
34885 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
34886 | .word 0x00000000,0xff512e7a ! Expected data for %l4 | |
34887 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
34888 | .word 0x00000000,0x124444cf ! Expected data for %l6 | |
34889 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
34890 | .word 0xffffffc9,0x00ff1dff ! Expected data for %f2 | |
34891 | .word 0x000000ff,0x76c6c4fc ! Expected data for %f16 | |
34892 | .word 0x000000ff,0xfcc4c676 ! Expected data for %f24 | |
34893 | p0_check_pt_data_24: | |
34894 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34895 | .word 0x00000000,0xfff0a6df ! Expected data for %l1 | |
34896 | .word 0x00000000,0xfc734517 ! Expected data for %l2 | |
34897 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
34898 | .word 0xffffffff,0xffffffff ! Expected data for %l4 | |
34899 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
34900 | .word 0x00000000,0xffffffff ! Expected data for %l7 | |
34901 | .word 0x00000000,0x9f0000ff ! Expected data for %f0 | |
34902 | .word 0xff000000,0x7e42feff ! Expected data for %f2 | |
34903 | .word 0xffffffff,0xfffffff8 ! Expected data for %f4 | |
34904 | .word 0x2a1a930b,0xffffffdd ! Expected data for %f6 | |
34905 | .word 0x00001dff,0x41c3b07b ! Expected data for %f8 | |
34906 | .word 0x4bf8b753,0xb8f773ff ! Expected data for %f10 | |
34907 | .word 0xfcc4c676,0xd1d23403 ! Expected data for %f12 | |
34908 | .word 0xfff0a6df,0x00000000 ! Expected data for %f14 | |
34909 | .word 0x426070e9,0xfc734517 ! Expected data for %f16 | |
34910 | .word 0xff000000,0x124444cf ! Expected data for %f28 | |
34911 | .word 0xfff0a6df,0x00000000 ! Expected data for %f30 | |
34912 | p0_check_pt_data_25: | |
34913 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34914 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
34915 | .word 0x00000000,0x174573fc ! Expected data for %l1 | |
34916 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
34917 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
34918 | .word 0x00000000,0xffad650b ! Expected data for %l4 | |
34919 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
34920 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
34921 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
34922 | .word 0xdb7e6dd7,0x0000ffff ! Expected data for %f0 | |
34923 | .word 0x00000000,0xdfa6f0ff ! Expected data for %f2 | |
34924 | .word 0xfcc4c676,0x76c6c4fc ! Expected data for %f4 | |
34925 | .word 0xca2bda90,0x64b3e323 ! Expected data for %f6 | |
34926 | .word 0x1f41c676,0x2164159c ! Expected data for %f8 | |
34927 | .word 0x9cd8613d,0xe0d4575d ! Expected data for %f10 | |
34928 | .word 0x95077110,0xd5a7d7d9 ! Expected data for %f12 | |
34929 | .word 0xb179bad6,0xf8962d02 ! Expected data for %f14 | |
34930 | .word 0x000000ff,0x000000ff ! Expected data for %f24 | |
34931 | p0_check_pt_data_26: | |
34932 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34933 | .word 0x00000000,0xdfa6f0ff ! Expected data for %l0 | |
34934 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
34935 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
34936 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
34937 | .word 0x00000000,0x000000bf ! Expected data for %l5 | |
34938 | .word 0x00000000,0xffc4c676 ! Expected data for %l6 | |
34939 | .word 0xffc4c676,0x76c6c4fc ! Expected data for %l7 | |
34940 | .word 0xffffffff,0x0000ffff ! Expected data for %f0 | |
34941 | .word 0x00000000,0xdfa6f0ff ! Expected data for %f2 | |
34942 | .word 0xfcc4c676,0x76c6c4fc ! Expected data for %f4 | |
34943 | .word 0xca2bda90,0x64b3e323 ! Expected data for %f6 | |
34944 | .word 0x7a2e51ff,0xff512e7a ! Expected data for %f16 | |
34945 | .word 0x7d000000,0xff000000 ! Expected data for %f18 | |
34946 | .word 0x00000000,0x7d307e94 ! Expected data for %f20 | |
34947 | .word 0x2400c676,0x0000fff8 ! Expected data for %f22 | |
34948 | .word 0xfcc4c676,0x12000000 ! Expected data for %f24 | |
34949 | .word 0xdfa6f0ed,0xfcf85e66 ! Expected data for %f26 | |
34950 | .word 0x00000000,0xab9dbfbb ! Expected data for %f28 | |
34951 | .word 0x00000059,0xff000000 ! Expected data for %f30 | |
34952 | p0_check_pt_data_27: | |
34953 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34954 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
34955 | .word 0x000000ff,0x0000007d ! Expected data for %l1 | |
34956 | .word 0x00000000,0x00007a2e ! Expected data for %l2 | |
34957 | .word 0x00000000,0x00000019 ! Expected data for %l3 | |
34958 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
34959 | .word 0x00000000,0x000000bf ! Expected data for %l5 | |
34960 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
34961 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
34962 | .word 0xcf444412,0x00000000 ! Expected data for %f0 | |
34963 | .word 0xfffffff8,0x00000024 ! Expected data for %f2 | |
34964 | .word 0xfff85e66,0x24000000 ! Expected data for %f4 | |
34965 | .word 0x00000000,0x00000000 ! Expected data for %f6 | |
34966 | .word 0xa196f1ff,0xdfa6f0ff ! Expected data for %f8 | |
34967 | .word 0xdb7e6dd7,0x0000ffff ! Expected data for %f10 | |
34968 | .word 0xffffffff,0x8dffff12 ! Expected data for %f12 | |
34969 | .word 0xffad650b,0x8c8decca ! Expected data for %f14 | |
34970 | .word 0x7d000000,0xff000000 ! Expected data for %f16 | |
34971 | .word 0xfc000000,0xdfa6f0ff ! Expected data for %f22 | |
34972 | .word 0x00000000,0xff000000 ! Expected data for %f28 | |
34973 | .word 0x000000ff,0x0000ffff ! Expected data for %f30 | |
34974 | p0_check_pt_data_28: | |
34975 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34976 | .word 0x55e00acf,0x83b5de2c ! Expected data for %l0 | |
34977 | .word 0xd0105b07,0xefbeab69 ! Expected data for %l1 | |
34978 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
34979 | .word 0x00000000,0xd5a7d7d9 ! Expected data for %l3 | |
34980 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
34981 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
34982 | .word 0xffffffff,0xffffff00 ! Expected data for %l6 | |
34983 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
34984 | .word 0x00000000,0x00000000 ! Expected data for %f6 | |
34985 | .word 0xfc000000,0xff000000 ! Expected data for %f22 | |
34986 | p0_check_pt_data_29: | |
34987 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
34988 | .word 0x00000000,0x0000ceff ! Expected data for %l0 | |
34989 | .word 0x00000000,0xff99519c ! Expected data for %l1 | |
34990 | .word 0xffffffff,0xfffffffe ! Expected data for %l2 | |
34991 | .word 0x00000000,0xd9c4c676 ! Expected data for %l3 | |
34992 | .word 0x00000000,0x124444cf ! Expected data for %l4 | |
34993 | .word 0x00000000,0xff000000 ! Expected data for %l5 | |
34994 | .word 0xffffffff,0xffffff00 ! Expected data for %l6 | |
34995 | .word 0xff000000,0x000000ff ! Expected data for %f0 | |
34996 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
34997 | .word 0x0099519c,0xffffff55 ! Expected data for %f4 | |
34998 | .word 0x00000000,0x000000ff ! Expected data for %f6 | |
34999 | .word 0x00000000,0x12ff76c9 ! Expected data for %f8 | |
35000 | .word 0x665ef8fc,0xedf0a6df ! Expected data for %f10 | |
35001 | .word 0xfffffeff,0x01a3a7b6 ! Expected data for %f12 | |
35002 | .word 0x00000000,0x000000ff ! Expected data for %f14 | |
35003 | .word 0xfc000000,0x00000000 ! Expected data for %f22 | |
35004 | .word 0xff000000,0x0b931a2a ! Expected data for %f24 | |
35005 | p0_check_pt_data_30: | |
35006 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35007 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35008 | .word 0x00000000,0x01a3a7b6 ! Expected data for %l1 | |
35009 | .word 0x00000000,0x00000094 ! Expected data for %l3 | |
35010 | .word 0x00000000,0xffffffff ! Expected data for %l4 | |
35011 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35012 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
35013 | .word 0x00001dff,0x8c8decca ! Expected data for %f4 | |
35014 | .word 0xedf0a6df,0x12ff76c9 ! Expected data for %f8 | |
35015 | .word 0x7d000000,0x1f41c676 ! Expected data for %f18 | |
35016 | .word 0xbf000000,0xf8ffffff ! Expected data for %f24 | |
35017 | p0_check_pt_data_31: | |
35018 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35019 | .word 0x00000000,0x0000ff00 ! Expected data for %l0 | |
35020 | .word 0xfeffffff,0xff512e7a ! Expected data for %l1 | |
35021 | .word 0xffffffc9,0xffffffff ! Expected data for %l2 | |
35022 | .word 0xffffffff,0xc9ffffff ! Expected data for %l3 | |
35023 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
35024 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35025 | .word 0x00000000,0x000000fe ! Expected data for %l6 | |
35026 | .word 0xffffffff,0xff000000 ! Expected data for %l7 | |
35027 | .word 0xff000000,0x000000ff ! Expected data for %f0 | |
35028 | .word 0x000000ff,0x000000ff ! Expected data for %f6 | |
35029 | .word 0x00000000,0xff000000 ! Expected data for %f16 | |
35030 | .word 0xff2e51ff,0x00000000 ! Expected data for %f26 | |
35031 | .word 0x00000000,0xff000000 ! Expected data for %f28 | |
35032 | p0_check_pt_data_32: | |
35033 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35034 | .word 0xff2e51ff,0x00000000 ! Expected data for %l0 | |
35035 | .word 0x00000000,0xfff0a6df ! Expected data for %l1 | |
35036 | .word 0x00000000,0xff000000 ! Expected data for %l2 | |
35037 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
35038 | .word 0x00000000,0x0000f8fc ! Expected data for %l4 | |
35039 | .word 0x00000000,0x0000009f ! Expected data for %l5 | |
35040 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
35041 | .word 0x00000000,0x9f3d5fc4 ! Expected data for %l7 | |
35042 | .word 0xff000019,0x00f07a12 ! Expected data for %f0 | |
35043 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
35044 | .word 0xffff0000,0x8c8decca ! Expected data for %f4 | |
35045 | .word 0x000000ff,0x000000ff ! Expected data for %f6 | |
35046 | .word 0x7d000000,0xff0000ff ! Expected data for %f16 | |
35047 | p0_check_pt_data_33: | |
35048 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35049 | .word 0xc038b310,0x53c69e7c ! Expected data for %l0 | |
35050 | .word 0xc4e787c7,0x87975e86 ! Expected data for %l1 | |
35051 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35052 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35053 | .word 0x022d96f8,0xd6ba79b1 ! Expected data for %l4 | |
35054 | .word 0xffffffff,0xfffffffc ! Expected data for %l5 | |
35055 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
35056 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35057 | .word 0xffff0000,0xff000000 ! Expected data for %f2 | |
35058 | .word 0xf8ffffff,0xffc4c676 ! Expected data for %f4 | |
35059 | .word 0xffa60000,0xffce0000 ! Expected data for %f6 | |
35060 | .word 0x00000000,0x190000ff ! Expected data for %f14 | |
35061 | p0_check_pt_data_34: | |
35062 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35063 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35064 | .word 0xff000000,0xff000000 ! Expected data for %l1 | |
35065 | .word 0x00000000,0x0000ffff ! Expected data for %l2 | |
35066 | .word 0x000000ff,0x64b3e323 ! Expected data for %l3 | |
35067 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
35068 | .word 0x00000000,0x0000da90 ! Expected data for %l5 | |
35069 | .word 0x00000000,0x000000bf ! Expected data for %l6 | |
35070 | .word 0xffffffff,0xfffffffc ! Expected data for %l7 | |
35071 | .word 0x00000000,0x00f07a12 ! Expected data for %f0 | |
35072 | .word 0x4e239aff,0xff000000 ! Expected data for %f2 | |
35073 | .word 0xff000000,0xff000000 ! Expected data for %f4 | |
35074 | .word 0x1f41c676,0x2164159c ! Expected data for %f14 | |
35075 | .word 0x7d000000,0xf8ffffff ! Expected data for %f18 | |
35076 | .word 0xdfa6f0ed,0xfcf85e66 ! Expected data for %f24 | |
35077 | p0_check_pt_data_35: | |
35078 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35079 | .word 0x00000000,0xdfa6f0ed ! Expected data for %l0 | |
35080 | .word 0x00000000,0xc976ff12 ! Expected data for %l1 | |
35081 | .word 0x00000000,0x0000f1dd ! Expected data for %l2 | |
35082 | .word 0x00000000,0x9c510000 ! Expected data for %l3 | |
35083 | .word 0xff000000,0x0b931a2a ! Expected data for %l4 | |
35084 | .word 0x00000000,0x64b3e323 ! Expected data for %l5 | |
35085 | .word 0x00000000,0x76c6c4ff ! Expected data for %l6 | |
35086 | .word 0x00000000,0xfffffff8 ! Expected data for %l7 | |
35087 | .word 0xffffffc9,0xffffffff ! Expected data for %f0 | |
35088 | .word 0x4e239aff,0xff000000 ! Expected data for %f2 | |
35089 | .word 0xffa60000,0xffce0000 ! Expected data for %f6 | |
35090 | .word 0x76c6411f,0x000000ff ! Expected data for %f14 | |
35091 | .word 0x000000ff,0x0000ffff ! Expected data for %f30 | |
35092 | p0_check_pt_data_36: | |
35093 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35094 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
35095 | .word 0xc749d457,0xf0deed65 ! Expected data for %l1 | |
35096 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35097 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35098 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35099 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
35100 | .word 0x00000000,0xdfa6f0ed ! Expected data for %l7 | |
35101 | .word 0x127af000,0x19000000 ! Expected data for %f0 | |
35102 | .word 0xff000000,0xff000000 ! Expected data for %f4 | |
35103 | .word 0xffa60000,0xffce0000 ! Expected data for %f6 | |
35104 | .word 0xedf0a6df,0xffffff00 ! Expected data for %f8 | |
35105 | .word 0x00000000,0x00000000 ! Expected data for %f10 | |
35106 | .word 0x00000019,0x00f07a12 ! Expected data for %f30 | |
35107 | p0_check_pt_data_37: | |
35108 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35109 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
35110 | .word 0x00000000,0x00000066 ! Expected data for %l1 | |
35111 | .word 0x00000000,0xd9d7a7d5 ! Expected data for %l2 | |
35112 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
35113 | .word 0x00000000,0x002e51ff ! Expected data for %l4 | |
35114 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
35115 | .word 0x00000000,0x0000fffc ! Expected data for %l6 | |
35116 | .word 0x00000000,0x0000519c ! Expected data for %l7 | |
35117 | .word 0x4e239aff,0xff000000 ! Expected data for %f2 | |
35118 | .word 0x76c6c4ff,0xfffffff8 ! Expected data for %f4 | |
35119 | .word 0xff512e7a,0xffce0000 ! Expected data for %f12 | |
35120 | .word 0x000000ff,0x23e3b364 ! Expected data for %f22 | |
35121 | .word 0xff0000ff,0x0000007d ! Expected data for %f24 | |
35122 | .word 0xff000000,0xb179bad6 ! Expected data for %f26 | |
35123 | .word 0x76c6c4ff,0xfffffff8 ! Expected data for %f30 | |
35124 | p0_check_pt_data_38: | |
35125 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35126 | .word 0x000000ff,0x00000000 ! Expected data for %l0 | |
35127 | .word 0xffffffff,0xffffff00 ! Expected data for %l1 | |
35128 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35129 | .word 0x00000000,0xff0000ff ! Expected data for %l3 | |
35130 | .word 0x00000000,0x2164159c ! Expected data for %l4 | |
35131 | .word 0xffffffff,0xffff0000 ! Expected data for %l5 | |
35132 | .word 0x00000000,0xf8ffffff ! Expected data for %f0 | |
35133 | .word 0x9f3d5fc4,0xffff0000 ! Expected data for %f2 | |
35134 | .word 0x127a0000,0x19000000 ! Expected data for %f4 | |
35135 | .word 0x24000000,0x00001dff ! Expected data for %f6 | |
35136 | .word 0xffffffff,0xb792cdbe ! Expected data for %f8 | |
35137 | .word 0xfec67c63,0xff9a234e ! Expected data for %f10 | |
35138 | .word 0x9b148fac,0xab9dbfbb ! Expected data for %f12 | |
35139 | .word 0xff000000,0x80182efa ! Expected data for %f14 | |
35140 | .word 0x00000000,0x00000000 ! Expected data for %f18 | |
35141 | .word 0x0000519c,0xf8962d02 ! Expected data for %f24 | |
35142 | .word 0xff000000,0xff512e7a ! Expected data for %f26 | |
35143 | .word 0xfcff0000,0x00000000 ! Expected data for %f30 | |
35144 | p0_check_pt_data_39: | |
35145 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35146 | .word 0xffffff00,0xfcf85e66 ! Expected data for %l0 | |
35147 | .word 0x00000000,0x00000066 ! Expected data for %l1 | |
35148 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35149 | .word 0xffffffff,0xd9d7a7d5 ! Expected data for %l3 | |
35150 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35151 | .word 0x00000000,0xffff00ff ! Expected data for %l5 | |
35152 | .word 0x00000000,0x009c00ff ! Expected data for %l6 | |
35153 | .word 0x00000000,0xfffffff8 ! Expected data for %l7 | |
35154 | .word 0x00005fc4,0xf8ffffff ! Expected data for %f0 | |
35155 | .word 0x7a2e51ff,0x19000000 ! Expected data for %f4 | |
35156 | .word 0x24000000,0x00001dff ! Expected data for %f6 | |
35157 | .word 0xff0000ff,0x0000ffff ! Expected data for %f8 | |
35158 | .word 0xffffffff,0xffffffff ! Expected data for %f16 | |
35159 | .word 0x00000000,0x0000009c ! Expected data for %f20 | |
35160 | p0_check_pt_data_40: | |
35161 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35162 | .word 0xc3f185ff,0x93655f5c ! Expected data for %l0 | |
35163 | .word 0xc4bedf2f,0xd6337670 ! Expected data for %l1 | |
35164 | .word 0x00000000,0xff000066 ! Expected data for %l2 | |
35165 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35166 | .word 0x00000000,0x0000007a ! Expected data for %l4 | |
35167 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35168 | .word 0x00000000,0x0000fffc ! Expected data for %l7 | |
35169 | .word 0x02000000,0xff0000ff ! Expected data for %f0 | |
35170 | .word 0x00000019,0x00007a12 ! Expected data for %f2 | |
35171 | .word 0x665ef8fc,0xff512e7a ! Expected data for %f4 | |
35172 | .word 0x23e3b300,0xff000000 ! Expected data for %f6 | |
35173 | .word 0x9c156421,0x76c6411f ! Expected data for %f8 | |
35174 | .word 0x022d96f8,0xd6ba79b1 ! Expected data for %f10 | |
35175 | .word 0x000000ff,0x10710795 ! Expected data for %f12 | |
35176 | .word 0x022d96f8,0xd6ba79b1 ! Expected data for %f14 | |
35177 | .word 0x127a0000,0x00000000 ! Expected data for %f16 | |
35178 | .word 0xff000000,0x000000ff ! Expected data for %f26 | |
35179 | .word 0xff000000,0xfffffff8 ! Expected data for %f30 | |
35180 | p0_check_pt_data_41: | |
35181 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35182 | .word 0x00000000,0x000000fc ! Expected data for %l0 | |
35183 | .word 0x00000000,0x0000007a ! Expected data for %l1 | |
35184 | .word 0x00000000,0x0000519c ! Expected data for %l2 | |
35185 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35186 | .word 0x00000000,0x000051ff ! Expected data for %l5 | |
35187 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
35188 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
35189 | .word 0xff000000,0x00000000 ! Expected data for %f0 | |
35190 | .word 0xfcf85e66,0x00000000 ! Expected data for %f2 | |
35191 | .word 0x55ffffff,0x00000000 ! Expected data for %f4 | |
35192 | .word 0xd6ba79b1,0x000000ff ! Expected data for %f6 | |
35193 | .word 0xfcf85e66,0x000000ff ! Expected data for %f8 | |
35194 | .word 0x00002eff,0xfcf85e66 ! Expected data for %f10 | |
35195 | .word 0x947e307d,0xfffeffff ! Expected data for %f12 | |
35196 | .word 0xff000000,0x00000000 ! Expected data for %f14 | |
35197 | .word 0x00000000,0x00000000 ! Expected data for %f18 | |
35198 | .word 0xff512e7a,0xffce0000 ! Expected data for %f20 | |
35199 | .word 0xfa2e1880,0x000000ff ! Expected data for %f24 | |
35200 | .word 0x00000000,0xff000000 ! Expected data for %f28 | |
35201 | p0_check_pt_data_42: | |
35202 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35203 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35204 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35205 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35206 | .word 0x00000000,0x002e51ff ! Expected data for %l3 | |
35207 | .word 0x000000ff,0x000000ff ! Expected data for %l4 | |
35208 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35209 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
35210 | .word 0x00000000,0xff0000ff ! Expected data for %l7 | |
35211 | .word 0xfcf85e66,0x00000000 ! Expected data for %f2 | |
35212 | .word 0x127a0000,0x00000000 ! Expected data for %f16 | |
35213 | .word 0xff000000,0x00002eff ! Expected data for %f20 | |
35214 | .word 0x7a000000,0xff000000 ! Expected data for %f24 | |
35215 | p0_check_pt_data_43: | |
35216 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35217 | .word 0xa4ef1ecf,0x90793dab ! Expected data for %l0 | |
35218 | .word 0xfcffffff,0x76000000 ! Expected data for %l1 | |
35219 | .word 0x00000000,0x0000fffc ! Expected data for %l2 | |
35220 | .word 0x00000000,0x00002e7a ! Expected data for %l4 | |
35221 | .word 0xffffffff,0x9c510000 ! Expected data for %l5 | |
35222 | .word 0x1f41ff76,0x2164159c ! Expected data for %l6 | |
35223 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35224 | .word 0x02000000,0xff0000ff ! Expected data for %f14 | |
35225 | .word 0x127a0000,0x009c00ff ! Expected data for %f16 | |
35226 | .word 0x00000000,0x00ffffff ! Expected data for %f22 | |
35227 | .word 0xff000000,0x00000000 ! Expected data for %f26 | |
35228 | p0_check_pt_data_44: | |
35229 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35230 | .word 0x00000000,0x0000519c ! Expected data for %l0 | |
35231 | .word 0x00000000,0x00000094 ! Expected data for %l2 | |
35232 | .word 0x00000000,0x0000519c ! Expected data for %l3 | |
35233 | .word 0x00000000,0xfcf85e66 ! Expected data for %l4 | |
35234 | .word 0x00000000,0x3d61d89c ! Expected data for %l5 | |
35235 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
35236 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
35237 | .word 0xfcf85e66,0x00000000 ! Expected data for %f2 | |
35238 | .word 0xd6ba79b1,0x000000ff ! Expected data for %f6 | |
35239 | .word 0xfcf85e66,0x000000ff ! Expected data for %f8 | |
35240 | .word 0xfaa36376,0x90e83937 ! Expected data for %f26 | |
35241 | p0_check_pt_data_45: | |
35242 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35243 | .word 0xffffffff,0xc45f0094 ! Expected data for %l0 | |
35244 | .word 0x00000000,0xff00007a ! Expected data for %l1 | |
35245 | .word 0xffffffff,0xff2e0000 ! Expected data for %l2 | |
35246 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35247 | .word 0x00000000,0x0000005e ! Expected data for %l4 | |
35248 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35249 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
35250 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
35251 | .word 0xff2d96f8,0xf8ffffff ! Expected data for %f0 | |
35252 | .word 0x94005fc4,0xffff0000 ! Expected data for %f2 | |
35253 | .word 0x7a00ff00,0x19000000 ! Expected data for %f4 | |
35254 | .word 0x24000000,0x00001dff ! Expected data for %f6 | |
35255 | .word 0xffffffff,0xb792cdbe ! Expected data for %f8 | |
35256 | .word 0xfec67c63,0xff9a234e ! Expected data for %f10 | |
35257 | .word 0x9b148fac,0xab9dbfbb ! Expected data for %f12 | |
35258 | .word 0xff000000,0x80182efa ! Expected data for %f14 | |
35259 | .word 0xff00007a,0x00000000 ! Expected data for %f16 | |
35260 | .word 0x00000000,0x00000000 ! Expected data for %f18 | |
35261 | p0_check_pt_data_46: | |
35262 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35263 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
35264 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35265 | .word 0x00000000,0xfc734517 ! Expected data for %l2 | |
35266 | .word 0x00000000,0x009400ff ! Expected data for %l3 | |
35267 | .word 0x00000000,0xff2e0000 ! Expected data for %l4 | |
35268 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35269 | .word 0x00000000,0xff5e0000 ! Expected data for %l6 | |
35270 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35271 | .word 0x7a00ff00,0x19000000 ! Expected data for %f4 | |
35272 | .word 0x9c000000,0x00000000 ! Expected data for %f6 | |
35273 | .word 0xfc734517,0xf8ffffff ! Expected data for %f14 | |
35274 | .word 0x7a000000,0x0000519c ! Expected data for %f24 | |
35275 | .word 0x00000000,0xff000000 ! Expected data for %f28 | |
35276 | p0_check_pt_data_47: | |
35277 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35278 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35279 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
35280 | .word 0xffffffff,0xfaa36376 ! Expected data for %l2 | |
35281 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35282 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35283 | .word 0x00000000,0x009400ff ! Expected data for %l5 | |
35284 | .word 0xfc734517,0x000000ff ! Expected data for %l6 | |
35285 | .word 0x00000000,0xd6ba79b1 ! Expected data for %l7 | |
35286 | .word 0x00000000,0x00ff7990 ! Expected data for %f0 | |
35287 | .word 0xff000000,0x00000000 ! Expected data for %f2 | |
35288 | .word 0xff2e0000,0x000000ff ! Expected data for %f4 | |
35289 | .word 0x00000000,0xff0000ff ! Expected data for %f6 | |
35290 | .word 0x00000000,0x76c6c4ff ! Expected data for %f8 | |
35291 | .word 0xff009cff,0xd1c43403 ! Expected data for %f10 | |
35292 | .word 0xfc734517,0x00000000 ! Expected data for %f12 | |
35293 | .word 0x0000ffff,0x174573fc ! Expected data for %f14 | |
35294 | .word 0x00000000,0xffffffff ! Expected data for %f18 | |
35295 | .word 0x9079ff00,0x00002eff ! Expected data for %f30 | |
35296 | p0_check_pt_data_48: | |
35297 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35298 | .word 0x00000000,0x00000023 ! Expected data for %l0 | |
35299 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
35300 | .word 0x00000000,0x000000b1 ! Expected data for %l2 | |
35301 | .word 0x00000000,0x00002eff ! Expected data for %l3 | |
35302 | .word 0xffffffff,0xffffff8f ! Expected data for %l4 | |
35303 | .word 0x00000000,0x00003dab ! Expected data for %l5 | |
35304 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
35305 | .word 0x00000000,0xff00ffff ! Expected data for %l7 | |
35306 | .word 0x7663a3fa,0x00ff7990 ! Expected data for %f0 | |
35307 | .word 0x0000ffff,0xff000000 ! Expected data for %f14 | |
35308 | .word 0xab3d7990,0x00000002 ! Expected data for %f16 | |
35309 | .word 0xffffff00,0x00000000 ! Expected data for %f18 | |
35310 | .word 0xfaa36376,0x90e83937 ! Expected data for %f20 | |
35311 | .word 0x000000ff,0xfcf80000 ! Expected data for %f22 | |
35312 | .word 0x1f41ff76,0x2164159c ! Expected data for %f24 | |
35313 | .word 0xb179bad6,0xf8962d02 ! Expected data for %f26 | |
35314 | .word 0xffffffff,0xff000000 ! Expected data for %f28 | |
35315 | .word 0xb179bad6,0xf8962d02 ! Expected data for %f30 | |
35316 | p0_check_pt_data_49: | |
35317 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35318 | .word 0x00000000,0x00000094 ! Expected data for %l0 | |
35319 | .word 0xf8b7ffff,0x000000ff ! Expected data for %l1 | |
35320 | .word 0x00000000,0x000000ab ! Expected data for %l2 | |
35321 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35322 | .word 0x947e307d,0xff000000 ! Expected data for %l4 | |
35323 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35324 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
35325 | .word 0xffffffff,0xab00ffff ! Expected data for %l7 | |
35326 | .word 0x00000000,0x000000ff ! Expected data for %f0 | |
35327 | .word 0xff000000,0x000000ff ! Expected data for %f2 | |
35328 | .word 0xff000000,0xab000000 ! Expected data for %f4 | |
35329 | .word 0xffffffff,0x00000000 ! Expected data for %f6 | |
35330 | .word 0x7a000000,0xff000000 ! Expected data for %f8 | |
35331 | .word 0xff000000,0x00000000 ! Expected data for %f10 | |
35332 | .word 0x00000000,0x00000000 ! Expected data for %f12 | |
35333 | .word 0xff000000,0xffffb7f8 ! Expected data for %f14 | |
35334 | .word 0xab3d7990,0xffffff00 ! Expected data for %f16 | |
35335 | .word 0xfc734517,0x000000ff ! Expected data for %f22 | |
35336 | .word 0x23e3b300,0x00ffffff ! Expected data for %f30 | |
35337 | p0_check_pt_data_50: | |
35338 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35339 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35340 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35341 | .word 0x00000000,0x00239aff ! Expected data for %l2 | |
35342 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35343 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35344 | .word 0x00000000,0x00ffffff ! Expected data for %l7 | |
35345 | .word 0x00000000,0x000000ff ! Expected data for %f0 | |
35346 | .word 0xff000000,0x000000ff ! Expected data for %f2 | |
35347 | .word 0x665ef8fc,0x00000000 ! Expected data for %f6 | |
35348 | .word 0xab3d7990,0x0000ff00 ! Expected data for %f16 | |
35349 | p0_check_pt_data_51: | |
35350 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35351 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
35352 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
35353 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
35354 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
35355 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
35356 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35357 | .word 0x00000000,0x00000076 ! Expected data for %l6 | |
35358 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
35359 | .word 0x00000000,0x000000ff ! Expected data for %f0 | |
35360 | .word 0xff000000,0x000000ff ! Expected data for %f2 | |
35361 | .word 0xfec67c63,0xff9a23ff ! Expected data for %f4 | |
35362 | .word 0x4e000000,0x00000000 ! Expected data for %f18 | |
35363 | .word 0x00000000,0x00000000 ! Expected data for %f20 | |
35364 | .word 0x00000000,0xff000000 ! Expected data for %f28 | |
35365 | p0_check_pt_data_52: | |
35366 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35367 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
35368 | .word 0x00000000,0x00000066 ! Expected data for %l1 | |
35369 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35370 | .word 0x00000000,0xff000000 ! Expected data for %l3 | |
35371 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35372 | .word 0x00000000,0x000000ab ! Expected data for %l6 | |
35373 | .word 0x90e83937,0x000000ff ! Expected data for %f0 | |
35374 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
35375 | .word 0x665ef8fc,0x00000000 ! Expected data for %f6 | |
35376 | .word 0x665ef8fc,0xedf0a6df ! Expected data for %f20 | |
35377 | .word 0xff000000,0x00009400 ! Expected data for %f28 | |
35378 | p0_check_pt_data_53: | |
35379 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35380 | .word 0x00000000,0x00003937 ! Expected data for %l0 | |
35381 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35382 | .word 0x00000000,0x7663a3fa ! Expected data for %l2 | |
35383 | .word 0x665ef8fc,0x00000000 ! Expected data for %l3 | |
35384 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35385 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35386 | .word 0x00000000,0x3d61d89c ! Expected data for %l6 | |
35387 | .word 0xffffffff,0xffffd4e0 ! Expected data for %l7 | |
35388 | .word 0xff000000,0x000000ff ! Expected data for %f2 | |
35389 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
35390 | .word 0x00000000,0x00000000 ! Expected data for %f6 | |
35391 | .word 0xab3d7990,0x00b3e323 ! Expected data for %f8 | |
35392 | .word 0x5d57d4e0,0x3d61d89c ! Expected data for %f14 | |
35393 | .word 0x3739e890,0xffffac00 ! Expected data for %f26 | |
35394 | .word 0x23e3b300,0x7663a3fa ! Expected data for %f30 | |
35395 | p0_check_pt_data_54: | |
35396 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35397 | .word 0x90793dab,0x000000ff ! Expected data for %l0 | |
35398 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
35399 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35400 | .word 0x00000000,0x3739e890 ! Expected data for %l3 | |
35401 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
35402 | .word 0x00000000,0x000000fa ! Expected data for %l5 | |
35403 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
35404 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
35405 | .word 0x90e83937,0x00000090 ! Expected data for %f0 | |
35406 | .word 0x90000000,0x000000ff ! Expected data for %f2 | |
35407 | .word 0x00000000,0x00000000 ! Expected data for %f6 | |
35408 | .word 0xff000000,0xfcffffff ! Expected data for %f8 | |
35409 | .word 0x23e3b300,0x00ffffff ! Expected data for %f10 | |
35410 | .word 0x7663a3fa,0x00ff7990 ! Expected data for %f12 | |
35411 | p0_check_pt_data_55: | |
35412 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35413 | .word 0x00000000,0xffffac00 ! Expected data for %l0 | |
35414 | .word 0x00000000,0x00ffffff ! Expected data for %l1 | |
35415 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35416 | .word 0x00000000,0xcaffffff ! Expected data for %l3 | |
35417 | .word 0x00000000,0x665ef8fc ! Expected data for %l4 | |
35418 | .word 0x00000000,0x00000090 ! Expected data for %l5 | |
35419 | .word 0x00000000,0x022d96f8 ! Expected data for %l6 | |
35420 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35421 | .word 0xff000000,0x00000018 ! Expected data for %f0 | |
35422 | .word 0x90e83937,0x00000000 ! Expected data for %f2 | |
35423 | .word 0xffff0000,0xfc734517 ! Expected data for %f4 | |
35424 | .word 0xa26115a2,0x6e092edc ! Expected data for %f6 | |
35425 | .word 0x9c486421,0x76c9d21f ! Expected data for %f8 | |
35426 | .word 0x174573fc,0xe9706042 ! Expected data for %f10 | |
35427 | .word 0x904919ff,0x9def9057 ! Expected data for %f12 | |
35428 | .word 0x5e9638c2,0x0b931a2a ! Expected data for %f14 | |
35429 | .word 0x23e3b300,0x7663a3fa ! Expected data for %f16 | |
35430 | .word 0x665ef8fc,0x00000000 ! Expected data for %f18 | |
35431 | .word 0xff000000,0x00b3e323 ! Expected data for %f24 | |
35432 | p0_check_pt_data_56: | |
35433 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35434 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
35435 | .word 0x00000000,0x00007cff ! Expected data for %l1 | |
35436 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35437 | .word 0x00000000,0x000000fc ! Expected data for %l3 | |
35438 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35439 | .word 0xffffffff,0xffff9000 ! Expected data for %l5 | |
35440 | .word 0x00000000,0x637cc6fe ! Expected data for %l6 | |
35441 | .word 0x00000000,0xff000000 ! Expected data for %l7 | |
35442 | .word 0x00000000,0x00000000 ! Expected data for %f0 | |
35443 | .word 0xff793dab,0x00000000 ! Expected data for %f2 | |
35444 | .word 0x00000000,0x000000ff ! Expected data for %f4 | |
35445 | .word 0xfffffff8,0x0000007d ! Expected data for %f6 | |
35446 | .word 0x9c156421,0xc7ec13bb ! Expected data for %f8 | |
35447 | .word 0x10ac7b59,0x3eda2778 ! Expected data for %f10 | |
35448 | .word 0x4e000000,0x00000012 ! Expected data for %f12 | |
35449 | .word 0xfcc4c676,0x12000000 ! Expected data for %f14 | |
35450 | .word 0xff000000,0x00000018 ! Expected data for %f16 | |
35451 | .word 0x90e83937,0x00000000 ! Expected data for %f18 | |
35452 | .word 0xf8ff0000,0xfc734517 ! Expected data for %f20 | |
35453 | .word 0xff000000,0x6e092edc ! Expected data for %f22 | |
35454 | .word 0x9c486421,0x76c9d21f ! Expected data for %f24 | |
35455 | .word 0x174573fc,0xe9706042 ! Expected data for %f26 | |
35456 | .word 0x904919ff,0x9def9057 ! Expected data for %f28 | |
35457 | .word 0x5e9638c2,0x0b931a2a ! Expected data for %f30 | |
35458 | p0_check_pt_data_57: | |
35459 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35460 | .word 0x00000000,0x0000ff79 ! Expected data for %l0 | |
35461 | .word 0x009a8bb7,0xaac1f974 ! Expected data for %l1 | |
35462 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
35463 | .word 0x10ac7b59,0x3eda2778 ! Expected data for %l3 | |
35464 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35465 | .word 0x00000000,0x00002d74 ! Expected data for %l5 | |
35466 | .word 0x00000000,0x0000ffff ! Expected data for %l6 | |
35467 | .word 0x00000000,0xffffffff ! Expected data for %l7 | |
35468 | .word 0xff793dab,0x00000000 ! Expected data for %f2 | |
35469 | .word 0x00000000,0x000000ff ! Expected data for %f4 | |
35470 | .word 0xfffffff8,0x00000000 ! Expected data for %f6 | |
35471 | .word 0xfcc4c676,0x00ff0000 ! Expected data for %f14 | |
35472 | .word 0xf8ff0000,0x00ff0000 ! Expected data for %f20 | |
35473 | .word 0x5e660000,0x00000000 ! Expected data for %f24 | |
35474 | .word 0x00ff0000,0x00000000 ! Expected data for %f30 | |
35475 | p0_check_pt_data_58: | |
35476 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35477 | .word 0x47da524f,0x8ddede37 ! Expected data for %l0 | |
35478 | .word 0xad9624f0,0x53d5cb36 ! Expected data for %l1 | |
35479 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
35480 | .word 0x00000000,0xff000000 ! Expected data for %l3 | |
35481 | .word 0x00000000,0x0000005e ! Expected data for %l4 | |
35482 | .word 0x00000000,0x0000007c ! Expected data for %l5 | |
35483 | .word 0x7827da3e,0x597bac10 ! Expected data for %l6 | |
35484 | .word 0xff793dab,0x000000ff ! Expected data for %l7 | |
35485 | .word 0xfff85e66,0x7663a3fa ! Expected data for %f0 | |
35486 | .word 0x00000000,0x000000ff ! Expected data for %f2 | |
35487 | .word 0xff000000,0xab3d79ff ! Expected data for %f4 | |
35488 | .word 0x12000000,0x0000004e ! Expected data for %f16 | |
35489 | .word 0x00000000,0x000000ff ! Expected data for %f18 | |
35490 | .word 0xffffffff,0xff000000 ! Expected data for %f20 | |
35491 | .word 0xff0000ff,0x00000000 ! Expected data for %f22 | |
35492 | .word 0xffc4c676,0x00000000 ! Expected data for %f24 | |
35493 | .word 0x0334c4d1,0xff9c00ff ! Expected data for %f26 | |
35494 | .word 0x00000000,0x174573fc ! Expected data for %f28 | |
35495 | .word 0x000000ff,0xffff0000 ! Expected data for %f30 | |
35496 | p0_check_pt_data_59: | |
35497 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35498 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35499 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35500 | .word 0x00000000,0x00ffffff ! Expected data for %l2 | |
35501 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35502 | .word 0xffffffff,0x947e307d ! Expected data for %l4 | |
35503 | .word 0xffffffff,0xffffff90 ! Expected data for %l5 | |
35504 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
35505 | .word 0x00000000,0x000000c6 ! Expected data for %l7 | |
35506 | .word 0x00000000,0x000000ff ! Expected data for %f2 | |
35507 | .word 0xfffffff8,0x00000000 ! Expected data for %f6 | |
35508 | .word 0x9c156421,0x00000000 ! Expected data for %f8 | |
35509 | .word 0x10ac7b59,0x00000000 ! Expected data for %f10 | |
35510 | .word 0x00000000,0x000000ff ! Expected data for %f14 | |
35511 | .word 0x12000000,0x0090ffff ! Expected data for %f16 | |
35512 | .word 0x00000000,0x00000000 ! Expected data for %f22 | |
35513 | .word 0xfffffff8,0x3eda2778 ! Expected data for %f24 | |
35514 | p0_check_pt_data_60: | |
35515 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35516 | .word 0x00000000,0x90ff0f9e ! Expected data for %l0 | |
35517 | .word 0x00000000,0x000000fc ! Expected data for %l1 | |
35518 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35519 | .word 0xffffffff,0xffffff00 ! Expected data for %l3 | |
35520 | .word 0x00000000,0x00000001 ! Expected data for %l4 | |
35521 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35522 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
35523 | .word 0x00000000,0x7d307e94 ! Expected data for %l7 | |
35524 | .word 0xfff85e66,0x7663a3fa ! Expected data for %f0 | |
35525 | .word 0x10ac7b59,0x7d307e94 ! Expected data for %f10 | |
35526 | .word 0x23e3b300,0x12000000 ! Expected data for %f18 | |
35527 | p0_check_pt_data_61: | |
35528 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35529 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
35530 | .word 0x00000000,0xedf0a6df ! Expected data for %l1 | |
35531 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35532 | .word 0x90ff004e,0x00000000 ! Expected data for %l3 | |
35533 | .word 0x00000000,0x000000fa ! Expected data for %l4 | |
35534 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
35535 | .word 0xffffffff,0xffffc4ff ! Expected data for %l6 | |
35536 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35537 | .word 0xfff85e66,0x000000ff ! Expected data for %f0 | |
35538 | .word 0x00000000,0x000000ff ! Expected data for %f2 | |
35539 | .word 0xfffffff8,0x00000000 ! Expected data for %f6 | |
35540 | .word 0xff000000,0xffffb7f8 ! Expected data for %f8 | |
35541 | .word 0x00000000,0x000000ff ! Expected data for %f14 | |
35542 | .word 0x000000ff,0xffffffff ! Expected data for %f24 | |
35543 | .word 0x90ff0f9e,0xffffc4fc ! Expected data for %f26 | |
35544 | p0_check_pt_data_62: | |
35545 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35546 | .word 0x00000090,0xff390000 ! Expected data for %l0 | |
35547 | .word 0x00000000,0x90793dab ! Expected data for %l1 | |
35548 | .word 0x00000000,0xff793dab ! Expected data for %l2 | |
35549 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
35550 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35551 | .word 0x00000000,0x9c156421 ! Expected data for %l5 | |
35552 | .word 0x00000000,0x00000012 ! Expected data for %l6 | |
35553 | .word 0x00000000,0xff000000 ! Expected data for %l7 | |
35554 | .word 0x23e3b300,0x12000000 ! Expected data for %f0 | |
35555 | .word 0xff000000,0x0000ff90 ! Expected data for %f2 | |
35556 | .word 0xfff85e66,0x23e3b300 ! Expected data for %f4 | |
35557 | .word 0xfff80066,0x000000ff ! Expected data for %f6 | |
35558 | .word 0x000000ff,0xff00007a ! Expected data for %f8 | |
35559 | .word 0x00000000,0xff000000 ! Expected data for %f10 | |
35560 | .word 0x7827da3e,0x597bac10 ! Expected data for %f12 | |
35561 | .word 0xf8b7ffff,0x000000ff ! Expected data for %f14 | |
35562 | .word 0x0000ffff,0x000000ff ! Expected data for %f16 | |
35563 | .word 0x00ffffff,0xffffffff ! Expected data for %f18 | |
35564 | .word 0x000000ff,0xedf0a6df ! Expected data for %f20 | |
35565 | .word 0xd6ba79b1,0x00000000 ! Expected data for %f22 | |
35566 | .word 0x7d30ff94,0x000000ff ! Expected data for %f24 | |
35567 | .word 0x00000090,0x00ff0000 ! Expected data for %f26 | |
35568 | .word 0x000000fc,0xfffeffff ! Expected data for %f28 | |
35569 | .word 0xff000000,0x00000000 ! Expected data for %f30 | |
35570 | p0_check_pt_data_63: | |
35571 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35572 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35573 | .word 0x00000000,0x76c6c4ff ! Expected data for %l1 | |
35574 | .word 0x000000ff,0xff0000ff ! Expected data for %l2 | |
35575 | .word 0xff000000,0xedf0a6df ! Expected data for %l3 | |
35576 | .word 0x00000000,0x23e3b300 ! Expected data for %l4 | |
35577 | .word 0x00000000,0x12000000 ! Expected data for %l5 | |
35578 | .word 0x00000000,0xffff00ff ! Expected data for %l6 | |
35579 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35580 | .word 0x00000000,0x90000000 ! Expected data for %f0 | |
35581 | .word 0xff000000,0x0000ffff ! Expected data for %f2 | |
35582 | .word 0xff000000,0xedf0a6df ! Expected data for %f4 | |
35583 | .word 0xfff80066,0x000000ff ! Expected data for %f6 | |
35584 | .word 0x7827da3e,0x00000012 ! Expected data for %f12 | |
35585 | .word 0xf8b7ffff,0x00000076 ! Expected data for %f14 | |
35586 | .word 0xff000000,0xffffff00 ! Expected data for %f16 | |
35587 | .word 0x000000ff,0x00000000 ! Expected data for %f18 | |
35588 | .word 0x000000ff,0xffffffff ! Expected data for %f20 | |
35589 | .word 0x00000000,0xff0000ff ! Expected data for %f22 | |
35590 | .word 0x00000000,0x76c6c4ff ! Expected data for %f24 | |
35591 | .word 0x00000000,0x00b3e323 ! Expected data for %f26 | |
35592 | .word 0xfc734517,0x00000000 ! Expected data for %f28 | |
35593 | .word 0x0000ffff,0xff000000 ! Expected data for %f30 | |
35594 | p0_check_pt_data_64: | |
35595 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35596 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35597 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35598 | .word 0x00000000,0x0000ff90 ! Expected data for %l2 | |
35599 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
35600 | .word 0x000000ff,0x00000000 ! Expected data for %l5 | |
35601 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
35602 | .word 0x00000000,0xab3d79ff ! Expected data for %l7 | |
35603 | .word 0xb179bad6,0xf8962d02 ! Expected data for %f0 | |
35604 | .word 0xff000000,0x0000ffff ! Expected data for %f2 | |
35605 | .word 0xff000000,0xedf0a6df ! Expected data for %f4 | |
35606 | .word 0xfff80066,0x000000ff ! Expected data for %f6 | |
35607 | .word 0xff63a3fa,0x53d5cb36 ! Expected data for %f16 | |
35608 | .word 0xffc4c676,0x00ff0000 ! Expected data for %f18 | |
35609 | .word 0x00ffffff,0xf8960000 ! Expected data for %f20 | |
35610 | .word 0xffffff00,0x00000000 ! Expected data for %f22 | |
35611 | .word 0x9c510000,0x0000007a ! Expected data for %f24 | |
35612 | .word 0x3739e890,0x7663a3fa ! Expected data for %f26 | |
35613 | .word 0x000000ff,0x00000000 ! Expected data for %f28 | |
35614 | .word 0xff2e0000,0x00ff7990 ! Expected data for %f30 | |
35615 | p0_check_pt_data_65: | |
35616 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35617 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35618 | .word 0x00000000,0x00000021 ! Expected data for %l1 | |
35619 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35620 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35621 | .word 0x00000000,0x0000519c ! Expected data for %l4 | |
35622 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35623 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
35624 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35625 | .word 0x000096f8,0x9c156421 ! Expected data for %f0 | |
35626 | .word 0x00000000,0x0000ffff ! Expected data for %f2 | |
35627 | .word 0x000000fc,0xfffeffff ! Expected data for %f4 | |
35628 | .word 0xff0000ff,0x3eda2778 ! Expected data for %f8 | |
35629 | .word 0x0000ff00,0x76c6c4ff ! Expected data for %f18 | |
35630 | .word 0x00000000,0xff00ffff ! Expected data for %f26 | |
35631 | p0_check_pt_data_66: | |
35632 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35633 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35634 | .word 0x00000000,0x0000519c ! Expected data for %l3 | |
35635 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
35636 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35637 | .word 0x00000000,0x2164159c ! Expected data for %l6 | |
35638 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35639 | .word 0xffc4c676,0x00ff0000 ! Expected data for %f0 | |
35640 | .word 0xffff0000,0x23000000 ! Expected data for %f2 | |
35641 | .word 0x0000ffff,0x3eda2778 ! Expected data for %f8 | |
35642 | .word 0x00000000,0x2164159c ! Expected data for %f12 | |
35643 | .word 0xffffffff,0xff000000 ! Expected data for %f20 | |
35644 | .word 0xffffff00,0x174573fc ! Expected data for %f22 | |
35645 | p0_check_pt_data_67: | |
35646 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35647 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35648 | .word 0xffffffff,0xffffff9c ! Expected data for %l3 | |
35649 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
35650 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35651 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
35652 | .word 0xffffffff,0xfffffff8 ! Expected data for %l7 | |
35653 | .word 0xffc4c676,0x00ff0000 ! Expected data for %f0 | |
35654 | .word 0xffff0000,0x00000000 ! Expected data for %f2 | |
35655 | .word 0x90000000,0x53d5cb36 ! Expected data for %f6 | |
35656 | .word 0x000000ff,0x3eda2778 ! Expected data for %f8 | |
35657 | .word 0x00000000,0xff000000 ! Expected data for %f10 | |
35658 | .word 0xff000000,0x00000000 ! Expected data for %f22 | |
35659 | p0_check_pt_data_68: | |
35660 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35661 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35662 | .word 0xffffffff,0xffff9079 ! Expected data for %l1 | |
35663 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35664 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
35665 | .word 0x00000000,0x94ff307d ! Expected data for %l4 | |
35666 | .word 0x00ffffff,0x76c6c4ff ! Expected data for %l5 | |
35667 | .word 0x00000000,0x00000057 ! Expected data for %l6 | |
35668 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
35669 | .word 0x00ffffff,0x000000ff ! Expected data for %f0 | |
35670 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
35671 | .word 0xffffffff,0x00000000 ! Expected data for %f4 | |
35672 | .word 0xff0000ff,0x00000000 ! Expected data for %f6 | |
35673 | .word 0xffc4c676,0x00000000 ! Expected data for %f8 | |
35674 | .word 0xffe3b3ff,0xff000000 ! Expected data for %f10 | |
35675 | .word 0x00000000,0x174573fc ! Expected data for %f12 | |
35676 | .word 0x000000ff,0xffff0000 ! Expected data for %f14 | |
35677 | .word 0x0000ffc4,0x53d5cb36 ! Expected data for %f16 | |
35678 | .word 0x00000000,0x00000000 ! Expected data for %f18 | |
35679 | .word 0xf8b7ffff,0x00000076 ! Expected data for %f20 | |
35680 | .word 0xffff0000,0x00000000 ! Expected data for %f22 | |
35681 | .word 0x000000ff,0x00000000 ! Expected data for %f28 | |
35682 | p0_check_pt_data_69: | |
35683 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35684 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35685 | .word 0x00000000,0x3eda2778 ! Expected data for %l1 | |
35686 | .word 0x00000000,0xfffffff8 ! Expected data for %l2 | |
35687 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35688 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35689 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35690 | .word 0x00000000,0x0000001f ! Expected data for %l7 | |
35691 | .word 0xf8ffffff,0x00ffffff ! Expected data for %f0 | |
35692 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
35693 | .word 0xffffffff,0x00000000 ! Expected data for %f4 | |
35694 | .word 0xff0000ff,0x00000000 ! Expected data for %f6 | |
35695 | .word 0x00000000,0xff000000 ! Expected data for %f10 | |
35696 | .word 0x000000ff,0x00000000 ! Expected data for %f14 | |
35697 | .word 0x00000000,0xff00ffff ! Expected data for %f16 | |
35698 | .word 0xc4ff0000,0x00000000 ! Expected data for %f18 | |
35699 | .word 0xffc4c676,0x665ef8ff ! Expected data for %f20 | |
35700 | .word 0xff000000,0x6600f8ff ! Expected data for %f22 | |
35701 | .word 0x7a0000ff,0xff000000 ! Expected data for %f24 | |
35702 | .word 0xff000000,0x00000000 ! Expected data for %f26 | |
35703 | .word 0x10ac7b59,0x3eda2778 ! Expected data for %f28 | |
35704 | .word 0xff000000,0x00000000 ! Expected data for %f30 | |
35705 | p0_check_pt_data_70: | |
35706 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35707 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35708 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35709 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35710 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35711 | .word 0xffffffff,0xff000000 ! Expected data for %l4 | |
35712 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35713 | .word 0x00000000,0x00000012 ! Expected data for %l6 | |
35714 | .word 0x00000000,0xfcc4c676 ! Expected data for %l7 | |
35715 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
35716 | .word 0xff0000ff,0x00000000 ! Expected data for %f6 | |
35717 | .word 0x00000000,0x00000000 ! Expected data for %f10 | |
35718 | .word 0x000000ff,0x00000000 ! Expected data for %f14 | |
35719 | .word 0xff000000,0x000000ff ! Expected data for %f30 | |
35720 | p0_check_pt_data_71: | |
35721 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35722 | .word 0x00000000,0x00ff7990 ! Expected data for %l0 | |
35723 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35724 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35725 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
35726 | .word 0xffffffff,0xff000000 ! Expected data for %l4 | |
35727 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35728 | .word 0xfff85e66,0x76c6c4ff ! Expected data for %l6 | |
35729 | .word 0x0000ff00,0x00ff7990 ! Expected data for %l7 | |
35730 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
35731 | .word 0xffffffff,0x00000000 ! Expected data for %f4 | |
35732 | .word 0xff0000ff,0x00000000 ! Expected data for %f6 | |
35733 | .word 0x00000000,0x00000000 ! Expected data for %f14 | |
35734 | .word 0x00000000,0x00000000 ! Expected data for %f20 | |
35735 | p0_check_pt_data_72: | |
35736 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35737 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35738 | .word 0x00000000,0x53d5cb36 ! Expected data for %l1 | |
35739 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35740 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
35741 | .word 0x00000000,0x00000076 ! Expected data for %l4 | |
35742 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35743 | .word 0x00000000,0x000023e3 ! Expected data for %l6 | |
35744 | .word 0x00000000,0x00009c12 ! Expected data for %l7 | |
35745 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
35746 | .word 0x7827da3e,0x000000ff ! Expected data for %f4 | |
35747 | .word 0xff0000ff,0x00000000 ! Expected data for %f6 | |
35748 | .word 0x00000000,0x000000ff ! Expected data for %f14 | |
35749 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
35750 | .word 0x23e3b300,0x0000cb00 ! Expected data for %f18 | |
35751 | .word 0xff000000,0xffffff00 ! Expected data for %f20 | |
35752 | .word 0xdc2e096e,0xa21561a2 ! Expected data for %f22 | |
35753 | .word 0x1fd2c976,0x2164489c ! Expected data for %f24 | |
35754 | .word 0x426070e9,0xfc734517 ! Expected data for %f26 | |
35755 | .word 0x57793d9d,0x00004990 ! Expected data for %f28 | |
35756 | .word 0x2a1a930b,0xc238965e ! Expected data for %f30 | |
35757 | p0_check_pt_data_73: | |
35758 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35759 | .word 0xf8ffffff,0x00ffffff ! Expected data for %l0 | |
35760 | .word 0x00000000,0x00000012 ! Expected data for %l1 | |
35761 | .word 0xffffffff,0xffff9c12 ! Expected data for %l2 | |
35762 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35763 | .word 0xfff85e66,0x76c6c4ff ! Expected data for %l4 | |
35764 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35765 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
35766 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35767 | .word 0xc6760000,0x0000007a ! Expected data for %f0 | |
35768 | .word 0x000000ff,0xffff9079 ! Expected data for %f2 | |
35769 | .word 0xff0000fc,0xedf0a6df ! Expected data for %f4 | |
35770 | .word 0xfc734517,0x000000ff ! Expected data for %f6 | |
35771 | .word 0x1f41ff76,0x2164159c ! Expected data for %f8 | |
35772 | .word 0x3739e890,0xffffac00 ! Expected data for %f10 | |
35773 | .word 0xff000000,0x00009400 ! Expected data for %f12 | |
35774 | .word 0x7827da3e,0x597bac10 ! Expected data for %f14 | |
35775 | .word 0xff000000,0x3eda2778 ! Expected data for %f28 | |
35776 | p0_check_pt_data_74: | |
35777 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35778 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35779 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35780 | .word 0x00000000,0xffff0000 ! Expected data for %l2 | |
35781 | .word 0x00000000,0xa2150334 ! Expected data for %l3 | |
35782 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35783 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
35784 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
35785 | .word 0xc6760000,0x0000007a ! Expected data for %f0 | |
35786 | .word 0xa26115a2,0x6e092edc ! Expected data for %f18 | |
35787 | .word 0x00000000,0xa21561a2 ! Expected data for %f22 | |
35788 | .word 0x159c0000,0xe3230000 ! Expected data for %f24 | |
35789 | .word 0xffa30000,0x00000000 ! Expected data for %f26 | |
35790 | p0_check_pt_data_75: | |
35791 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35792 | .word 0xff000000,0x000000ff ! Expected data for %l0 | |
35793 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
35794 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35795 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35796 | .word 0x00000000,0x00ffffff ! Expected data for %l4 | |
35797 | .word 0x00000000,0xfc0000ff ! Expected data for %l5 | |
35798 | .word 0x00000000,0xfffffff8 ! Expected data for %l6 | |
35799 | .word 0x000000ff,0x00000000 ! Expected data for %l7 | |
35800 | .word 0xc6760000,0x0000007a ! Expected data for %f0 | |
35801 | .word 0x15000000,0x000000ff ! Expected data for %f2 | |
35802 | .word 0xff0000fc,0xedf0a6df ! Expected data for %f4 | |
35803 | .word 0x00000000,0x00000000 ! Expected data for %f10 | |
35804 | .word 0x00000010,0xe3230000 ! Expected data for %f24 | |
35805 | .word 0x7827da3e,0x000000ff ! Expected data for %f28 | |
35806 | .word 0x426070e9,0xc238965e ! Expected data for %f30 | |
35807 | p0_check_pt_data_76: | |
35808 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35809 | .word 0x00000000,0x5e000000 ! Expected data for %l0 | |
35810 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35811 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35812 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35813 | .word 0x00000000,0x0000005e ! Expected data for %l4 | |
35814 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35815 | .word 0x00000000,0x0000ffff ! Expected data for %l7 | |
35816 | .word 0x000023e3,0x000000ff ! Expected data for %f2 | |
35817 | .word 0xff000000,0x0000005e ! Expected data for %f12 | |
35818 | .word 0x00000000,0x597bac10 ! Expected data for %f14 | |
35819 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
35820 | .word 0xff000000,0xff000000 ! Expected data for %f20 | |
35821 | .word 0xff9638c2,0x0b931a2a ! Expected data for %f22 | |
35822 | .word 0xffc4c676,0xffffffff ! Expected data for %f30 | |
35823 | p0_check_pt_data_77: | |
35824 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35825 | .word 0x00000000,0x0000009c ! Expected data for %l0 | |
35826 | .word 0xffffffff,0xff000000 ! Expected data for %l1 | |
35827 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35828 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35829 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35830 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35831 | .word 0x00000000,0x000070e9 ! Expected data for %l6 | |
35832 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
35833 | .word 0xffffff00,0x0000008f ! Expected data for %f0 | |
35834 | .word 0xff000000,0x00ffffff ! Expected data for %f2 | |
35835 | .word 0xff000000,0x00000076 ! Expected data for %f4 | |
35836 | .word 0x00000012,0x000000ff ! Expected data for %f6 | |
35837 | .word 0x1f41ff76,0x2164159c ! Expected data for %f8 | |
35838 | .word 0x00000000,0x00007957 ! Expected data for %f10 | |
35839 | .word 0x00000000,0x000000ff ! Expected data for %f12 | |
35840 | .word 0xfc0000ff,0x00000000 ! Expected data for %f14 | |
35841 | .word 0x23e3b300,0x0000cb00 ! Expected data for %f24 | |
35842 | .word 0xff9638c2,0x0b931a2a ! Expected data for %f28 | |
35843 | p0_check_pt_data_78: | |
35844 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35845 | .word 0x00000000,0x00007957 ! Expected data for %l0 | |
35846 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35847 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35848 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35849 | .word 0x000023e3,0x00009c15 ! Expected data for %l4 | |
35850 | .word 0x00000000,0x0000ffff ! Expected data for %l5 | |
35851 | .word 0x00000000,0x00000334 ! Expected data for %l6 | |
35852 | .word 0xffffffff,0xffffc4ff ! Expected data for %l7 | |
35853 | .word 0xffc4c676,0x00000000 ! Expected data for %f2 | |
35854 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
35855 | .word 0x7990ffff,0xff000000 ! Expected data for %f18 | |
35856 | .word 0xff000000,0xff000000 ! Expected data for %f20 | |
35857 | .word 0xff000000,0x174573fc ! Expected data for %f22 | |
35858 | .word 0x9c156421,0x76ff411f ! Expected data for %f24 | |
35859 | .word 0x00acffff,0x90e83937 ! Expected data for %f26 | |
35860 | .word 0xa26115a2,0x6e092edc ! Expected data for %f28 | |
35861 | .word 0x10ac7b59,0x3eda2778 ! Expected data for %f30 | |
35862 | p0_check_pt_data_79: | |
35863 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35864 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
35865 | .word 0xff0000ff,0x000000ff ! Expected data for %l1 | |
35866 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35867 | .word 0x00000000,0x0000ffff ! Expected data for %l3 | |
35868 | .word 0x00000000,0x000070e9 ! Expected data for %l4 | |
35869 | .word 0x00000000,0x7827da3e ! Expected data for %l5 | |
35870 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
35871 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35872 | .word 0xffc4c676,0x159c0000 ! Expected data for %f2 | |
35873 | .word 0x000000ff,0x00000000 ! Expected data for %f4 | |
35874 | .word 0x00000012,0xffffffff ! Expected data for %f6 | |
35875 | .word 0x000000ff,0xffffffff ! Expected data for %f14 | |
35876 | .word 0xff000000,0x000000ff ! Expected data for %f18 | |
35877 | .word 0xd4000000,0x00ffffff ! Expected data for %f22 | |
35878 | .word 0xff000000,0x00000000 ! Expected data for %f30 | |
35879 | p0_check_pt_data_80: | |
35880 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35881 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
35882 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
35883 | .word 0xff000000,0xff000000 ! Expected data for %l2 | |
35884 | .word 0xff000000,0xff000000 ! Expected data for %l3 | |
35885 | .word 0x00000000,0x00003403 ! Expected data for %l4 | |
35886 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
35887 | .word 0x00000000,0x0000003e ! Expected data for %l6 | |
35888 | .word 0x00000000,0x00000034 ! Expected data for %l7 | |
35889 | .word 0xffffff00,0x0000008f ! Expected data for %f0 | |
35890 | .word 0xffc4c676,0x00000000 ! Expected data for %f2 | |
35891 | .word 0x00000000,0x00000076 ! Expected data for %f4 | |
35892 | .word 0x00000012,0x00000000 ! Expected data for %f6 | |
35893 | .word 0x1f41ff76,0x2164159c ! Expected data for %f8 | |
35894 | .word 0x00000000,0x00007957 ! Expected data for %f10 | |
35895 | .word 0x00000000,0x000000ff ! Expected data for %f12 | |
35896 | .word 0xfc0000ff,0x00000000 ! Expected data for %f14 | |
35897 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
35898 | .word 0x00000000,0x6e092edc ! Expected data for %f18 | |
35899 | .word 0xff0315a2,0xffffff00 ! Expected data for %f20 | |
35900 | .word 0x00000000,0x00000076 ! Expected data for %f22 | |
35901 | .word 0x1fd2c976,0x2164489c ! Expected data for %f24 | |
35902 | .word 0x426070e9,0xfc734517 ! Expected data for %f26 | |
35903 | .word 0x57793d9d,0x00000000 ! Expected data for %f28 | |
35904 | .word 0x00000000,0xc238965e ! Expected data for %f30 | |
35905 | p0_check_pt_data_81: | |
35906 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35907 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
35908 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35909 | .word 0x00000000,0x00001f00 ! Expected data for %l2 | |
35910 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35911 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35912 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
35913 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
35914 | .word 0x000000ff,0x000000ff ! Expected data for %l7 | |
35915 | .word 0xd4000000,0x0000ffff ! Expected data for %f0 | |
35916 | .word 0x00000000,0xc6000000 ! Expected data for %f2 | |
35917 | .word 0x00000000,0xffffffff ! Expected data for %f4 | |
35918 | .word 0xffffffff,0x12000000 ! Expected data for %f6 | |
35919 | .word 0xbb13ecc7,0xff000000 ! Expected data for %f8 | |
35920 | .word 0xffff004e,0xff000000 ! Expected data for %f10 | |
35921 | .word 0xff000000,0xff00007a ! Expected data for %f12 | |
35922 | .word 0x0000ff00,0x00000000 ! Expected data for %f14 | |
35923 | .word 0x00000000,0x6e092edc ! Expected data for %f18 | |
35924 | .word 0x000000ff,0x00000076 ! Expected data for %f20 | |
35925 | .word 0xd4000000,0x0000ffff ! Expected data for %f22 | |
35926 | .word 0x76000000,0x00000000 ! Expected data for %f24 | |
35927 | .word 0x76000000,0x00000000 ! Expected data for %f26 | |
35928 | p0_check_pt_data_82: | |
35929 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35930 | .word 0x00000000,0x0000ffff ! Expected data for %l0 | |
35931 | .word 0x00000000,0x0000ffff ! Expected data for %l1 | |
35932 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35933 | .word 0x00000000,0x76c6c400 ! Expected data for %l3 | |
35934 | .word 0x00000000,0xffc4c676 ! Expected data for %l4 | |
35935 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35936 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
35937 | .word 0x00000000,0x000012f3 ! Expected data for %l7 | |
35938 | .word 0xc6006421,0xc6000000 ! Expected data for %f2 | |
35939 | .word 0x00000000,0xffffffff ! Expected data for %f4 | |
35940 | .word 0xff03ffff,0xff000000 ! Expected data for %f8 | |
35941 | .word 0x00ff0000,0x000000ff ! Expected data for %f16 | |
35942 | p0_check_pt_data_83: | |
35943 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35944 | .word 0x00000000,0x00cb0000 ! Expected data for %l0 | |
35945 | .word 0x00000000,0x00b3e323 ! Expected data for %l1 | |
35946 | .word 0x00000000,0x00000334 ! Expected data for %l2 | |
35947 | .word 0x00000000,0x0000ffff ! Expected data for %l3 | |
35948 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
35949 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35950 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
35951 | .word 0x00000000,0x00000076 ! Expected data for %l7 | |
35952 | .word 0xd4000000,0x0000ffff ! Expected data for %f0 | |
35953 | .word 0x0000ffff,0xc6000000 ! Expected data for %f2 | |
35954 | .word 0x00000000,0xffffffff ! Expected data for %f4 | |
35955 | .word 0x000023e3,0x00009c15 ! Expected data for %f16 | |
35956 | .word 0x1f41ff76,0x000000ff ! Expected data for %f24 | |
35957 | p0_check_pt_data_84: | |
35958 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35959 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
35960 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35961 | .word 0x00000000,0x00000034 ! Expected data for %l2 | |
35962 | .word 0x00000000,0x000000c4 ! Expected data for %l3 | |
35963 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
35964 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
35965 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
35966 | .word 0x00000000,0x00000076 ! Expected data for %l7 | |
35967 | .word 0x7827da3e,0x00000000 ! Expected data for %f4 | |
35968 | .word 0xffffffff,0x12000000 ! Expected data for %f6 | |
35969 | .word 0xffff004e,0x00009c15 ! Expected data for %f10 | |
35970 | .word 0x3403ffff,0x000000c6 ! Expected data for %f16 | |
35971 | .word 0x000000c6,0x00000000 ! Expected data for %f18 | |
35972 | p0_check_pt_data_85: | |
35973 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35974 | .word 0x00000000,0x00000076 ! Expected data for %l0 | |
35975 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
35976 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
35977 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
35978 | .word 0x00000000,0xff0023e3 ! Expected data for %l4 | |
35979 | .word 0x00000000,0x000000a3 ! Expected data for %l5 | |
35980 | .word 0x00000000,0xe32300ff ! Expected data for %l6 | |
35981 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
35982 | .word 0xff793d9d,0xffffffff ! Expected data for %f0 | |
35983 | .word 0x7827da3e,0x00000000 ! Expected data for %f4 | |
35984 | .word 0x000000ff,0x00009c15 ! Expected data for %f10 | |
35985 | .word 0xffffffff,0x0000ffff ! Expected data for %f22 | |
35986 | p0_check_pt_data_86: | |
35987 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
35988 | .word 0xbe9277c8,0x124a0cc3 ! Expected data for %l0 | |
35989 | .word 0x86f3d840,0x0f502ca6 ! Expected data for %l1 | |
35990 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
35991 | .word 0x00000000,0x76000000 ! Expected data for %l3 | |
35992 | .word 0x00000000,0xff793d9d ! Expected data for %l4 | |
35993 | .word 0x76000000,0x00000000 ! Expected data for %l6 | |
35994 | .word 0x00000000,0x0000ff79 ! Expected data for %l7 | |
35995 | .word 0x0000ffff,0x00000076 ! Expected data for %f2 | |
35996 | .word 0x7827da3e,0x00000000 ! Expected data for %f4 | |
35997 | .word 0xff000000,0xff000000 ! Expected data for %f8 | |
35998 | .word 0xffffffff,0x9d3d79ff ! Expected data for %f16 | |
35999 | p0_check_pt_data_87: | |
36000 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36001 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
36002 | .word 0x00000000,0xffffffff ! Expected data for %l1 | |
36003 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
36004 | .word 0x00000000,0x76000000 ! Expected data for %l3 | |
36005 | .word 0x00000000,0x76000000 ! Expected data for %l4 | |
36006 | .word 0x00000000,0x0000ffff ! Expected data for %l5 | |
36007 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36008 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36009 | .word 0xff793d9d,0xffffffff ! Expected data for %f0 | |
36010 | .word 0x7827da3e,0x00000000 ! Expected data for %f4 | |
36011 | .word 0xffffffff,0x12000000 ! Expected data for %f6 | |
36012 | .word 0x00000000,0x000000ff ! Expected data for %f12 | |
36013 | .word 0x03ff0000,0xff000000 ! Expected data for %f18 | |
36014 | .word 0x00000076,0x00000000 ! Expected data for %f20 | |
36015 | .word 0x00000000,0x0000ffff ! Expected data for %f22 | |
36016 | .word 0x7a0000ff,0x000000ff ! Expected data for %f30 | |
36017 | p0_check_pt_data_88: | |
36018 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36019 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36020 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36021 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
36022 | .word 0x00000000,0xffffffff ! Expected data for %l3 | |
36023 | .word 0x00000000,0x00000003 ! Expected data for %l4 | |
36024 | .word 0x00000000,0xff0023e3 ! Expected data for %l5 | |
36025 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36026 | .word 0x0000ffff,0x00000076 ! Expected data for %f2 | |
36027 | .word 0x76000000,0x00000000 ! Expected data for %f4 | |
36028 | .word 0xffffffff,0x12000000 ! Expected data for %f6 | |
36029 | .word 0x0000ffff,0x00009c15 ! Expected data for %f10 | |
36030 | p0_check_pt_data_89: | |
36031 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36032 | .word 0x00000000,0x0000ffff ! Expected data for %l0 | |
36033 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
36034 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36035 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36036 | .word 0xffffffff,0xff000000 ! Expected data for %l4 | |
36037 | .word 0xffffffff,0xff000076 ! Expected data for %l5 | |
36038 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36039 | .word 0x00000000,0x0000004e ! Expected data for %l7 | |
36040 | .word 0x0000ffff,0x00000076 ! Expected data for %f2 | |
36041 | .word 0x76000000,0x00000000 ! Expected data for %f4 | |
36042 | .word 0xffffffff,0x12000000 ! Expected data for %f6 | |
36043 | .word 0x159c0000,0x00000000 ! Expected data for %f14 | |
36044 | .word 0xffffffff,0x0000ffff ! Expected data for %f16 | |
36045 | .word 0x000000ff,0xff000000 ! Expected data for %f18 | |
36046 | .word 0x00000000,0x76c6c4ff ! Expected data for %f20 | |
36047 | .word 0xff000000,0x174573fc ! Expected data for %f22 | |
36048 | .word 0x9c156421,0x76ff411f ! Expected data for %f24 | |
36049 | .word 0x00acffff,0x90e83937 ! Expected data for %f26 | |
36050 | .word 0x00940000,0x000000ff ! Expected data for %f28 | |
36051 | .word 0x10ac7b59,0x3eda2778 ! Expected data for %f30 | |
36052 | p0_check_pt_data_90: | |
36053 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36054 | .word 0x00000000,0x760000ff ! Expected data for %l0 | |
36055 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
36056 | .word 0x00000000,0x00000076 ! Expected data for %l2 | |
36057 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36058 | .word 0x00000000,0x0000ff00 ! Expected data for %l4 | |
36059 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36060 | .word 0x00000000,0x000000a3 ! Expected data for %l7 | |
36061 | .word 0x76000000,0x00000000 ! Expected data for %f4 | |
36062 | .word 0xffffffff,0x12000000 ! Expected data for %f6 | |
36063 | .word 0xff000000,0xff000000 ! Expected data for %f14 | |
36064 | .word 0x000000ff,0x0000ffff ! Expected data for %f16 | |
36065 | .word 0xff00ff00,0xc238965e ! Expected data for %f28 | |
36066 | p0_check_pt_data_91: | |
36067 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36068 | .word 0xffffffff,0xc6000000 ! Expected data for %l0 | |
36069 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
36070 | .word 0x00000000,0xff000076 ! Expected data for %l2 | |
36071 | .word 0x00000000,0xff000000 ! Expected data for %l3 | |
36072 | .word 0x00000000,0x0000ff00 ! Expected data for %l4 | |
36073 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36074 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36075 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36076 | .word 0xff793d9d,0xffffffff ! Expected data for %f0 | |
36077 | .word 0x0000ffff,0x00000076 ! Expected data for %f2 | |
36078 | .word 0xffffffff,0x12000000 ! Expected data for %f6 | |
36079 | .word 0xffffffff,0xffffffff ! Expected data for %f8 | |
36080 | .word 0x000000c6,0x00000000 ! Expected data for %f12 | |
36081 | .word 0xff000000,0x00009c15 ! Expected data for %f14 | |
36082 | .word 0x76000000,0xfc734517 ! Expected data for %f24 | |
36083 | .word 0xff00ff00,0xff0000ff ! Expected data for %f28 | |
36084 | .word 0x10ac7b59,0x000000ff ! Expected data for %f30 | |
36085 | p0_check_pt_data_92: | |
36086 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36087 | .word 0x1eb5b8e0,0x5bc63de8 ! Expected data for %l0 | |
36088 | .word 0xffffffff,0x00000000 ! Expected data for %l1 | |
36089 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
36090 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
36091 | .word 0x00000000,0xff000000 ! Expected data for %l4 | |
36092 | .word 0x00000000,0x00000017 ! Expected data for %l5 | |
36093 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
36094 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36095 | .word 0x000000ff,0x000000ff ! Expected data for %f8 | |
36096 | p0_check_pt_data_93: | |
36097 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36098 | .word 0x00000000,0x0000ff00 ! Expected data for %l0 | |
36099 | .word 0x00000000,0xff00ffff ! Expected data for %l1 | |
36100 | .word 0x00000000,0xffffffff ! Expected data for %l2 | |
36101 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36102 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
36103 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
36104 | .word 0x00000000,0xff000000 ! Expected data for %l6 | |
36105 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36106 | .word 0xff793d9d,0xffffffff ! Expected data for %f0 | |
36107 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
36108 | .word 0xffffffff,0x12000000 ! Expected data for %f6 | |
36109 | .word 0x000000ff,0x000000ff ! Expected data for %f8 | |
36110 | .word 0xffffff9c,0xffffffff ! Expected data for %f12 | |
36111 | .word 0x00940000,0x000000ff ! Expected data for %f16 | |
36112 | .word 0xff0000ff,0xff000000 ! Expected data for %f18 | |
36113 | .word 0x760000ff,0xffffffff ! Expected data for %f20 | |
36114 | .word 0xfc734517,0x000000ff ! Expected data for %f22 | |
36115 | .word 0x1f41ff76,0x2164159c ! Expected data for %f24 | |
36116 | .word 0x3739e890,0xffffac00 ! Expected data for %f26 | |
36117 | .word 0xff000000,0x00009400 ! Expected data for %f28 | |
36118 | .word 0x7827da3e,0x597bac10 ! Expected data for %f30 | |
36119 | p0_check_pt_data_94: | |
36120 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36121 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36122 | .word 0x00000000,0x17000000 ! Expected data for %l1 | |
36123 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36124 | .word 0x00000000,0x597bac10 ! Expected data for %l3 | |
36125 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
36126 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
36127 | .word 0x00000000,0x00000076 ! Expected data for %l6 | |
36128 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
36129 | .word 0xff793d9d,0xffffffff ! Expected data for %f0 | |
36130 | .word 0x0000ffff,0x00000076 ! Expected data for %f2 | |
36131 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
36132 | .word 0xffffffff,0x12000000 ! Expected data for %f6 | |
36133 | .word 0xff000000,0x00000000 ! Expected data for %f16 | |
36134 | p0_check_pt_data_95: | |
36135 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36136 | .word 0x00000000,0x0000ffff ! Expected data for %l0 | |
36137 | .word 0xffffffff,0xffffff00 ! Expected data for %l1 | |
36138 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36139 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36140 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36141 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
36142 | .word 0x00000000,0x0000ff45 ! Expected data for %l6 | |
36143 | .word 0x00000000,0x00000017 ! Expected data for %l7 | |
36144 | .word 0xff793d9d,0xff0000ff ! Expected data for %f0 | |
36145 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
36146 | .word 0xff000000,0xfc7345ff ! Expected data for %f14 | |
36147 | .word 0x000000c6,0x00000000 ! Expected data for %f22 | |
36148 | .word 0xffffffff,0x00000000 ! Expected data for %f30 | |
36149 | p0_check_pt_data_96: | |
36150 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36151 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36152 | .word 0x00000000,0xff000000 ! Expected data for %l1 | |
36153 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
36154 | .word 0x00000000,0x9c156421 ! Expected data for %l4 | |
36155 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
36156 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36157 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36158 | .word 0xff793d9d,0xff0000ff ! Expected data for %f0 | |
36159 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
36160 | .word 0x00000000,0x79ff0000 ! Expected data for %f6 | |
36161 | .word 0x000000ff,0x000000ff ! Expected data for %f8 | |
36162 | .word 0x00000000,0xff0000ff ! Expected data for %f14 | |
36163 | p0_check_pt_data_97: | |
36164 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36165 | .word 0x00000000,0xff000079 ! Expected data for %l0 | |
36166 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36167 | .word 0x00000000,0xffffffff ! Expected data for %l2 | |
36168 | .word 0x00000000,0xffffffff ! Expected data for %l3 | |
36169 | .word 0xffffffff,0xffffffff ! Expected data for %l4 | |
36170 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36171 | .word 0x00000000,0x0000ff00 ! Expected data for %l6 | |
36172 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36173 | .word 0xff793d9d,0x76c6c4ff ! Expected data for %f0 | |
36174 | .word 0x0000ffff,0x00000076 ! Expected data for %f2 | |
36175 | .word 0xffffffff,0xffffffff ! Expected data for %f4 | |
36176 | .word 0xffffffff,0x79ff0000 ! Expected data for %f6 | |
36177 | .word 0x00000000,0x000000ff ! Expected data for %f10 | |
36178 | .word 0xffffff9c,0x9c156421 ! Expected data for %f12 | |
36179 | .word 0x00000000,0xff0000ff ! Expected data for %f14 | |
36180 | .word 0xff000012,0xffffffff ! Expected data for %f16 | |
36181 | .word 0x00000000,0x00000000 ! Expected data for %f30 | |
36182 | p0_check_pt_data_98: | |
36183 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36184 | .word 0x00000000,0x00009cff ! Expected data for %l0 | |
36185 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36186 | .word 0x00000000,0x00000076 ! Expected data for %l2 | |
36187 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
36188 | .word 0x00000000,0x00000076 ! Expected data for %l4 | |
36189 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
36190 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36191 | .word 0x00000000,0x00000076 ! Expected data for %l7 | |
36192 | .word 0xff793d9d,0x76c6c4ff ! Expected data for %f0 | |
36193 | .word 0x0000ffff,0x00000076 ! Expected data for %f2 | |
36194 | .word 0xffffffff,0x79ff0000 ! Expected data for %f6 | |
36195 | .word 0xffffffff,0xff000076 ! Expected data for %f12 | |
36196 | .word 0xffc4c676,0x9d3d79ff ! Expected data for %f20 | |
36197 | p0_check_pt_data_99: | |
36198 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36199 | .word 0x00000000,0xff007600 ! Expected data for %l0 | |
36200 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36201 | .word 0xffffffff,0xff000000 ! Expected data for %l2 | |
36202 | .word 0x00000000,0xff793d9d ! Expected data for %l3 | |
36203 | .word 0x00000000,0x790000ff ! Expected data for %l4 | |
36204 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
36205 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36206 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
36207 | .word 0x10ac7b59,0x000000ff ! Expected data for %f0 | |
36208 | .word 0x00000000,0x6600f8ff ! Expected data for %f2 | |
36209 | .word 0xff000000,0xff000000 ! Expected data for %f4 | |
36210 | .word 0x1f41ff76,0x2164159c ! Expected data for %f6 | |
36211 | .word 0x00000000,0x03340000 ! Expected data for %f8 | |
36212 | .word 0x1f41ff76,0x000000ff ! Expected data for %f10 | |
36213 | .word 0xff000000,0x00000000 ! Expected data for %f12 | |
36214 | .word 0xff003400,0x00000000 ! Expected data for %f14 | |
36215 | .word 0x000000c6,0xffff0000 ! Expected data for %f22 | |
36216 | .word 0xff000000,0x000000c6 ! Expected data for %f28 | |
36217 | p0_check_pt_data_100: | |
36218 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36219 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
36220 | .word 0x00000000,0x000000c6 ! Expected data for %l1 | |
36221 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36222 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
36223 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36224 | .word 0x00000000,0x00000076 ! Expected data for %l6 | |
36225 | .word 0xff000000,0x597bac10 ! Expected data for %f0 | |
36226 | .word 0xfff80066,0x00000000 ! Expected data for %f2 | |
36227 | .word 0x000000ff,0x000000ff ! Expected data for %f4 | |
36228 | .word 0x00000000,0xff0000ff ! Expected data for %f6 | |
36229 | .word 0x00003403,0x00ff0000 ! Expected data for %f8 | |
36230 | .word 0xff000000,0x76ff411f ! Expected data for %f10 | |
36231 | .word 0x00000000,0x000000ff ! Expected data for %f12 | |
36232 | .word 0x00000000,0xff000079 ! Expected data for %f14 | |
36233 | p0_check_pt_data_101: | |
36234 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36235 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36236 | .word 0xff793d9d,0x76c6c4ff ! Expected data for %l1 | |
36237 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
36238 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36239 | .word 0x00000000,0x9d3d79ff ! Expected data for %l4 | |
36240 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
36241 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36242 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
36243 | .word 0x000000ff,0x000000ff ! Expected data for %f4 | |
36244 | .word 0x00000000,0xff0000ff ! Expected data for %f6 | |
36245 | .word 0x00000000,0x00000000 ! Expected data for %f14 | |
36246 | p0_check_pt_data_102: | |
36247 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36248 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
36249 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
36250 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
36251 | .word 0x000000c6,0x00000000 ! Expected data for %l4 | |
36252 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36253 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36254 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
36255 | .word 0xff000000,0x597bac10 ! Expected data for %f0 | |
36256 | .word 0x00000000,0xff0000ff ! Expected data for %f6 | |
36257 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
36258 | p0_check_pt_data_103: | |
36259 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36260 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36261 | .word 0xffffffff,0xffffff00 ! Expected data for %l2 | |
36262 | .word 0xffffffff,0xfffffff3 ! Expected data for %l3 | |
36263 | .word 0x00000000,0x9d3d79ff ! Expected data for %l4 | |
36264 | .word 0x00000000,0xff000000 ! Expected data for %l5 | |
36265 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
36266 | .word 0xffc4c676,0x76000000 ! Expected data for %f0 | |
36267 | .word 0x00000000,0xffc4c676 ! Expected data for %f2 | |
36268 | .word 0x790000ff,0xff00ffff ! Expected data for %f4 | |
36269 | .word 0x00000012,0xffffffff ! Expected data for %f6 | |
36270 | .word 0x000000ff,0xc7ec13bb ! Expected data for %f8 | |
36271 | .word 0x000000ff,0x0000ff03 ! Expected data for %f10 | |
36272 | .word 0xff0000ff,0x0000ff03 ! Expected data for %f12 | |
36273 | .word 0xc6000000,0x0000ffff ! Expected data for %f14 | |
36274 | .word 0xff0000ff,0x00000000 ! Expected data for %f16 | |
36275 | .word 0x0000ffff,0x00000000 ! Expected data for %f18 | |
36276 | .word 0x76000000,0x00000000 ! Expected data for %f20 | |
36277 | .word 0x000000c6,0x00000000 ! Expected data for %f22 | |
36278 | .word 0x000000ff,0x00009c15 ! Expected data for %f24 | |
36279 | .word 0x00000000,0x000000ff ! Expected data for %f26 | |
36280 | .word 0xff000079,0xffffffff ! Expected data for %f28 | |
36281 | .word 0x76000000,0x00000000 ! Expected data for %f30 | |
36282 | p0_check_pt_data_104: | |
36283 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36284 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36285 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36286 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36287 | .word 0x00000000,0xffffffff ! Expected data for %l3 | |
36288 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36289 | .word 0x00000000,0xff0000ff ! Expected data for %l5 | |
36290 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36291 | .word 0x00000000,0x76c6c400 ! Expected data for %l7 | |
36292 | .word 0x790000ff,0x00c4c676 ! Expected data for %f4 | |
36293 | .word 0xffc4c676,0x9d3d79ff ! Expected data for %f10 | |
36294 | .word 0x00000000,0x000000ff ! Expected data for %f12 | |
36295 | .word 0x00000000,0x000000ff ! Expected data for %f26 | |
36296 | p0_check_pt_data_105: | |
36297 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36298 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
36299 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
36300 | .word 0x00000000,0xffc4c676 ! Expected data for %l2 | |
36301 | .word 0x00000000,0x76000000 ! Expected data for %l3 | |
36302 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
36303 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36304 | .word 0xff0000ff,0x00000000 ! Expected data for %l6 | |
36305 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36306 | .word 0xffc4c676,0x76000000 ! Expected data for %f0 | |
36307 | .word 0x00000000,0xffff00ff ! Expected data for %f2 | |
36308 | .word 0x790000ff,0x00c4c676 ! Expected data for %f4 | |
36309 | .word 0xffc4c676,0x00000000 ! Expected data for %f10 | |
36310 | .word 0xff3d79ff,0xff000000 ! Expected data for %f12 | |
36311 | .word 0x00000000,0x00000000 ! Expected data for %f16 | |
36312 | .word 0xff000000,0xff000000 ! Expected data for %f18 | |
36313 | .word 0x00000000,0xff000000 ! Expected data for %f20 | |
36314 | .word 0x0000ffff,0xc6000000 ! Expected data for %f22 | |
36315 | .word 0x00000000,0x00000000 ! Expected data for %f24 | |
36316 | .word 0xff000000,0xff793d9d ! Expected data for %f26 | |
36317 | .word 0x159c0000,0xe3230000 ! Expected data for %f28 | |
36318 | .word 0x76000000,0xffff0000 ! Expected data for %f30 | |
36319 | p0_check_pt_data_106: | |
36320 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36321 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
36322 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
36323 | .word 0x00000000,0x76000000 ! Expected data for %l2 | |
36324 | .word 0xffffffff,0xffffff9d ! Expected data for %l3 | |
36325 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36326 | .word 0x00000000,0x00009c9c ! Expected data for %l5 | |
36327 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36328 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
36329 | .word 0xffc4c676,0x76000000 ! Expected data for %f0 | |
36330 | .word 0x00000000,0xffff00ff ! Expected data for %f2 | |
36331 | .word 0xff000000,0xffffffff ! Expected data for %f26 | |
36332 | p0_check_pt_data_107: | |
36333 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36334 | .word 0xffffffff,0xff000000 ! Expected data for %l0 | |
36335 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36336 | .word 0x00000000,0x00000076 ! Expected data for %l2 | |
36337 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36338 | .word 0x00000000,0xff000000 ! Expected data for %l4 | |
36339 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36340 | .word 0xffffffff,0xffffff00 ! Expected data for %l7 | |
36341 | .word 0xffc4c676,0x76000000 ! Expected data for %f0 | |
36342 | .word 0xffc4c676,0x76000000 ! Expected data for %f2 | |
36343 | .word 0x790000ff,0x00c4c676 ! Expected data for %f4 | |
36344 | .word 0x000000ff,0xffffffff ! Expected data for %f6 | |
36345 | .word 0x000000ff,0x00009c9c ! Expected data for %f16 | |
36346 | .word 0xff000000,0x00000000 ! Expected data for %f18 | |
36347 | .word 0x000000ff,0x00000000 ! Expected data for %f20 | |
36348 | .word 0x000000c6,0x00000000 ! Expected data for %f22 | |
36349 | .word 0x1f41ff76,0x2164159c ! Expected data for %f24 | |
36350 | .word 0x3739e890,0xffffac00 ! Expected data for %f26 | |
36351 | .word 0xff000000,0x000000c6 ! Expected data for %f28 | |
36352 | .word 0x00000000,0x00000000 ! Expected data for %f30 | |
36353 | p0_check_pt_data_108: | |
36354 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36355 | .word 0xb13f6707,0x961628fa ! Expected data for %l0 | |
36356 | .word 0x00000000,0x76c6c400 ! Expected data for %l1 | |
36357 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
36358 | .word 0x00000000,0x00000076 ! Expected data for %l3 | |
36359 | .word 0x00000000,0xd4000000 ! Expected data for %l4 | |
36360 | .word 0x00000000,0x0000ffff ! Expected data for %l5 | |
36361 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36362 | .word 0x00000000,0xc6000000 ! Expected data for %l7 | |
36363 | .word 0xffc4c676,0x76000000 ! Expected data for %f2 | |
36364 | .word 0x790000ff,0x00c4c676 ! Expected data for %f4 | |
36365 | .word 0xff000000,0x00000000 ! Expected data for %f6 | |
36366 | .word 0xff3d79ff,0x00000000 ! Expected data for %f12 | |
36367 | p0_check_pt_data_109: | |
36368 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36369 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36370 | .word 0x00000000,0x00009400 ! Expected data for %l1 | |
36371 | .word 0x00000000,0xd4000000 ! Expected data for %l2 | |
36372 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36373 | .word 0x00000000,0xff000000 ! Expected data for %l4 | |
36374 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
36375 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36376 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36377 | .word 0x76000000,0x00000000 ! Expected data for %f0 | |
36378 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
36379 | .word 0x00000000,0x00ffffff ! Expected data for %f4 | |
36380 | .word 0x00000012,0xffffffff ! Expected data for %f6 | |
36381 | .word 0x000000ff,0x000000ff ! Expected data for %f8 | |
36382 | .word 0x000000ff,0xff0000ff ! Expected data for %f10 | |
36383 | .word 0xff000000,0x00000000 ! Expected data for %f12 | |
36384 | .word 0x00000000,0x00ff0000 ! Expected data for %f14 | |
36385 | .word 0x00000000,0x00000000 ! Expected data for %f20 | |
36386 | .word 0x000079ff,0xff000000 ! Expected data for %f24 | |
36387 | .word 0x000000c6,0x00000000 ! Expected data for %f26 | |
36388 | p0_check_pt_data_110: | |
36389 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36390 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36391 | .word 0xff0000ff,0x0000ff03 ! Expected data for %l2 | |
36392 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36393 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36394 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36395 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36396 | .word 0x00000000,0x00000000 ! Expected data for %f0 | |
36397 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
36398 | .word 0x00000000,0xffffffff ! Expected data for %f6 | |
36399 | .word 0x000000ff,0x00000000 ! Expected data for %f10 | |
36400 | .word 0xff000000,0x00000000 ! Expected data for %f16 | |
36401 | .word 0x00000000,0xff0000ff ! Expected data for %f18 | |
36402 | .word 0xffffffff,0x000000ff ! Expected data for %f20 | |
36403 | .word 0x0000ff79,0x00000000 ! Expected data for %f22 | |
36404 | .word 0x000000c6,0xff0000ff ! Expected data for %f24 | |
36405 | .word 0x159c0000,0xffff0000 ! Expected data for %f26 | |
36406 | .word 0xffffffff,0x9cffffff ! Expected data for %f28 | |
36407 | .word 0xff0000ff,0x00000000 ! Expected data for %f30 | |
36408 | p0_check_pt_data_111: | |
36409 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36410 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36411 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
36412 | .word 0xffffffff,0xffff9c00 ! Expected data for %l2 | |
36413 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36414 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
36415 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36416 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36417 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36418 | .word 0x00000012,0xffffffff ! Expected data for %f0 | |
36419 | .word 0x00000000,0xff000000 ! Expected data for %f2 | |
36420 | .word 0x000000c6,0x00000000 ! Expected data for %f4 | |
36421 | .word 0x00004517,0x00000000 ! Expected data for %f12 | |
36422 | .word 0x00940000,0xf3120000 ! Expected data for %f20 | |
36423 | p0_check_pt_data_112: | |
36424 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36425 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36426 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36427 | .word 0x00000000,0x00000003 ! Expected data for %l2 | |
36428 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
36429 | .word 0x00000012,0xffffffff ! Expected data for %l4 | |
36430 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
36431 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36432 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36433 | .word 0x00000000,0x000000ff ! Expected data for %f0 | |
36434 | .word 0xff0000ff,0x00000000 ! Expected data for %f2 | |
36435 | .word 0x000012f3,0x00009400 ! Expected data for %f4 | |
36436 | .word 0x00000000,0x79ff0000 ! Expected data for %f6 | |
36437 | .word 0xff0000ff,0xc6000000 ! Expected data for %f8 | |
36438 | .word 0x0000ffff,0x00009c15 ! Expected data for %f10 | |
36439 | .word 0xffffff9c,0xffffffff ! Expected data for %f12 | |
36440 | .word 0x00000000,0xff0000ff ! Expected data for %f14 | |
36441 | .word 0xff000000,0x000000c6 ! Expected data for %f16 | |
36442 | .word 0xff000000,0x000000ff ! Expected data for %f18 | |
36443 | .word 0x00000000,0x00000000 ! Expected data for %f20 | |
36444 | .word 0x000000c6,0xffff0000 ! Expected data for %f22 | |
36445 | .word 0x0000ff00,0x00000000 ! Expected data for %f24 | |
36446 | .word 0x9d3d79ff,0x00000000 ! Expected data for %f26 | |
36447 | .word 0xff000000,0x00009c9c ! Expected data for %f28 | |
36448 | .word 0x0000ffff,0x00000076 ! Expected data for %f30 | |
36449 | p0_check_pt_data_113: | |
36450 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36451 | .word 0xffffffff,0xfffffc00 ! Expected data for %l0 | |
36452 | .word 0x00000000,0xff000000 ! Expected data for %l1 | |
36453 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
36454 | .word 0x00000000,0x0000ffff ! Expected data for %l3 | |
36455 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36456 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36457 | .word 0x00000000,0x0000ffff ! Expected data for %l6 | |
36458 | .word 0x00000000,0x00000076 ! Expected data for %l7 | |
36459 | .word 0x76000000,0x0000ffff ! Expected data for %f0 | |
36460 | .word 0x000079ff,0x00000000 ! Expected data for %f2 | |
36461 | .word 0x000000ff,0xff790000 ! Expected data for %f4 | |
36462 | .word 0x00000000,0x12000000 ! Expected data for %f6 | |
36463 | .word 0xff0000ff,0x00000000 ! Expected data for %f8 | |
36464 | .word 0x57790000,0x00000000 ! Expected data for %f10 | |
36465 | .word 0xff000000,0x00000000 ! Expected data for %f12 | |
36466 | .word 0x00000000,0xff0000fc ! Expected data for %f14 | |
36467 | .word 0x9d3d79ff,0x00000000 ! Expected data for %f26 | |
36468 | .word 0x9d3d79ff,0x00000000 ! Expected data for %f28 | |
36469 | .word 0x0000ffff,0x000012f3 ! Expected data for %f30 | |
36470 | p0_check_pt_data_114: | |
36471 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36472 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36473 | .word 0x00000000,0x00000076 ! Expected data for %l2 | |
36474 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36475 | .word 0x00000000,0x00000003 ! Expected data for %l4 | |
36476 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36477 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36478 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36479 | .word 0x00000000,0xffffffff ! Expected data for %f2 | |
36480 | .word 0x000000c6,0xffff0000 ! Expected data for %f14 | |
36481 | .word 0x000000ff,0x000000c6 ! Expected data for %f16 | |
36482 | .word 0x00000000,0x000000ff ! Expected data for %f20 | |
36483 | .word 0x000079ff,0xff000000 ! Expected data for %f22 | |
36484 | .word 0x00000000,0xffffff00 ! Expected data for %f26 | |
36485 | .word 0x9d3d79ff,0x000000ff ! Expected data for %f28 | |
36486 | p0_check_pt_data_115: | |
36487 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36488 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36489 | .word 0x00000000,0xff000000 ! Expected data for %l1 | |
36490 | .word 0x00000000,0x0000ffff ! Expected data for %l2 | |
36491 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36492 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
36493 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36494 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
36495 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36496 | .word 0x76000000,0x0000ffff ! Expected data for %f0 | |
36497 | .word 0xffff0000,0x00000076 ! Expected data for %f2 | |
36498 | .word 0x00000000,0x000000ff ! Expected data for %f8 | |
36499 | .word 0x00000000,0x000000ff ! Expected data for %f20 | |
36500 | .word 0x00000000,0xff0000ff ! Expected data for %f24 | |
36501 | p0_check_pt_data_116: | |
36502 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36503 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36504 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36505 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36506 | .word 0x00000000,0x00000003 ! Expected data for %l3 | |
36507 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36508 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36509 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36510 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
36511 | .word 0xffff0000,0x00000076 ! Expected data for %f0 | |
36512 | .word 0xffff0000,0x00000076 ! Expected data for %f2 | |
36513 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
36514 | .word 0x00000012,0x00000000 ! Expected data for %f6 | |
36515 | .word 0x00000000,0xff0000ff ! Expected data for %f8 | |
36516 | .word 0x00000000,0x00007957 ! Expected data for %f10 | |
36517 | .word 0x00000000,0x000000ff ! Expected data for %f12 | |
36518 | .word 0x0000ffff,0xc6000000 ! Expected data for %f14 | |
36519 | .word 0xffff0000,0x00000000 ! Expected data for %f16 | |
36520 | .word 0xffffffff,0x00000000 ! Expected data for %f18 | |
36521 | .word 0x00000000,0x000000ff ! Expected data for %f20 | |
36522 | .word 0xff000000,0x174573fc ! Expected data for %f22 | |
36523 | .word 0x9c156421,0x76ff411f ! Expected data for %f24 | |
36524 | .word 0x0000ff79,0xffffffff ! Expected data for %f26 | |
36525 | .word 0x00940000,0x000000ff ! Expected data for %f28 | |
36526 | .word 0x10ac7b59,0x00000000 ! Expected data for %f30 | |
36527 | p0_check_pt_data_117: | |
36528 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36529 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
36530 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36531 | .word 0x00000000,0x57790000 ! Expected data for %l3 | |
36532 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
36533 | .word 0xffffffff,0xff000000 ! Expected data for %l5 | |
36534 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36535 | .word 0x00000000,0x0000ff00 ! Expected data for %l7 | |
36536 | .word 0xffff0000,0x00000076 ! Expected data for %f2 | |
36537 | .word 0x00000012,0x00000000 ! Expected data for %f6 | |
36538 | .word 0x0000ffff,0x00000000 ! Expected data for %f10 | |
36539 | .word 0xffffffff,0x00000000 ! Expected data for %f12 | |
36540 | .word 0x00000000,0x00000000 ! Expected data for %f14 | |
36541 | .word 0xffffffff,0x76ff411f ! Expected data for %f18 | |
36542 | .word 0xffff0000,0x00000076 ! Expected data for %f24 | |
36543 | p0_check_pt_data_118: | |
36544 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36545 | .word 0x150b41f0,0x45c90c9f ! Expected data for %l0 | |
36546 | .word 0xb299b6d8,0x6f3c4094 ! Expected data for %l1 | |
36547 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36548 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
36549 | .word 0x00000000,0x76000000 ! Expected data for %l4 | |
36550 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36551 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36552 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36553 | .word 0xffff0000,0x00000076 ! Expected data for %f0 | |
36554 | .word 0x00000000,0x000000ff ! Expected data for %f6 | |
36555 | .word 0x00000000,0x00000000 ! Expected data for %f8 | |
36556 | .word 0x00000000,0x000000ff ! Expected data for %f22 | |
36557 | .word 0x76ff411f,0x000000ff ! Expected data for %f26 | |
36558 | p0_check_pt_data_119: | |
36559 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36560 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
36561 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36562 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36563 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36564 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36565 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36566 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36567 | .word 0x00000000,0x000000ff ! Expected data for %f0 | |
36568 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
36569 | .word 0x00000000,0x000000ff ! Expected data for %f6 | |
36570 | .word 0xff000000,0x00000000 ! Expected data for %f14 | |
36571 | .word 0xffff0000,0x00000000 ! Expected data for %f16 | |
36572 | .word 0x00000000,0x000000ff ! Expected data for %f22 | |
36573 | p0_check_pt_data_120: | |
36574 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36575 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36576 | .word 0x00000000,0x00000076 ! Expected data for %l2 | |
36577 | .word 0x00000000,0x00000076 ! Expected data for %l3 | |
36578 | .word 0x00000000,0xffc4c676 ! Expected data for %l4 | |
36579 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36580 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36581 | .word 0xff000000,0xffffffff ! Expected data for %f0 | |
36582 | .word 0x159c0000,0xffff0000 ! Expected data for %f2 | |
36583 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
36584 | .word 0x1f41ff76,0x2164159c ! Expected data for %f6 | |
36585 | .word 0x0000ff00,0x033488c7 ! Expected data for %f8 | |
36586 | .word 0x03000000,0x00000000 ! Expected data for %f10 | |
36587 | .word 0xff000000,0x0000ff00 ! Expected data for %f12 | |
36588 | .word 0x00000000,0x00000000 ! Expected data for %f14 | |
36589 | .word 0x76ff411f,0xf31200ff ! Expected data for %f26 | |
36590 | .word 0x000000ff,0xff0000ff ! Expected data for %f28 | |
36591 | p0_check_pt_data_121: | |
36592 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36593 | .word 0x00000000,0x0000ffff ! Expected data for %l0 | |
36594 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36595 | .word 0x00000000,0x1f41ff76 ! Expected data for %l2 | |
36596 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
36597 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36598 | .word 0x00000000,0x00000076 ! Expected data for %l5 | |
36599 | .word 0xffffffff,0xff000000 ! Expected data for %l6 | |
36600 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36601 | .word 0x0000ffff,0x000000ff ! Expected data for %f0 | |
36602 | .word 0xff000000,0xffffffff ! Expected data for %f2 | |
36603 | .word 0xff000000,0x00000000 ! Expected data for %f4 | |
36604 | .word 0xfc734517,0x000000ff ! Expected data for %f6 | |
36605 | .word 0x1f41ff76,0x2164159c ! Expected data for %f8 | |
36606 | .word 0xffffffff,0x79ff0000 ! Expected data for %f10 | |
36607 | .word 0xff000000,0x00009400 ! Expected data for %f12 | |
36608 | .word 0x7827da3e,0x597bac10 ! Expected data for %f14 | |
36609 | .word 0x00000000,0xff000000 ! Expected data for %f20 | |
36610 | p0_check_pt_data_122: | |
36611 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36612 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36613 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36614 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36615 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
36616 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36617 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
36618 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36619 | .word 0x00000000,0xffffffff ! Expected data for %l7 | |
36620 | .word 0x0000ffff,0x000000ff ! Expected data for %f0 | |
36621 | .word 0xff0012f3,0x00009400 ! Expected data for %f2 | |
36622 | .word 0xff000000,0x00000000 ! Expected data for %f4 | |
36623 | .word 0xfc734517,0x000000ff ! Expected data for %f6 | |
36624 | .word 0xff000000,0x00000000 ! Expected data for %f14 | |
36625 | .word 0xff0012f3,0x00009400 ! Expected data for %f16 | |
36626 | .word 0x000000ff,0x00000000 ! Expected data for %f18 | |
36627 | .word 0x00000000,0xff000000 ! Expected data for %f20 | |
36628 | .word 0xff000000,0xc6000000 ! Expected data for %f22 | |
36629 | .word 0x000000ff,0x00000000 ! Expected data for %f24 | |
36630 | .word 0x00000076,0xffff9c00 ! Expected data for %f26 | |
36631 | .word 0x000000ff,0xffffffff ! Expected data for %f28 | |
36632 | .word 0xff000000,0x00000000 ! Expected data for %f30 | |
36633 | p0_check_pt_data_123: | |
36634 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36635 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
36636 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36637 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
36638 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
36639 | .word 0xffffffff,0xffffff00 ! Expected data for %l4 | |
36640 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36641 | .word 0x000000c6,0xffff0000 ! Expected data for %l6 | |
36642 | .word 0x10ac7b59,0xff0012f3 ! Expected data for %l7 | |
36643 | .word 0x0000ffff,0x000000ff ! Expected data for %f0 | |
36644 | .word 0xff0012f3,0x00009400 ! Expected data for %f2 | |
36645 | .word 0xff000000,0x00000000 ! Expected data for %f4 | |
36646 | .word 0xfc734517,0x000000ff ! Expected data for %f6 | |
36647 | .word 0x00000000,0x00000003 ! Expected data for %f8 | |
36648 | .word 0x00000000,0xff000000 ! Expected data for %f20 | |
36649 | p0_check_pt_data_124: | |
36650 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36651 | .word 0x00000000,0x0000ffff ! Expected data for %l0 | |
36652 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36653 | .word 0x00000000,0x00001f41 ! Expected data for %l2 | |
36654 | .word 0x00000000,0x000000f3 ! Expected data for %l3 | |
36655 | .word 0x00000000,0xffff00ff ! Expected data for %l4 | |
36656 | .word 0x00000000,0x0000ff00 ! Expected data for %l5 | |
36657 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
36658 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
36659 | .word 0xff000000,0x00000000 ! Expected data for %f0 | |
36660 | .word 0x00940000,0xf31200ff ! Expected data for %f2 | |
36661 | .word 0x00000000,0x174573fc ! Expected data for %f4 | |
36662 | .word 0x1f41ff76,0x2164159c ! Expected data for %f6 | |
36663 | .word 0x0000ff00,0x033488c7 ! Expected data for %f8 | |
36664 | .word 0x03000000,0x00000000 ! Expected data for %f10 | |
36665 | .word 0xff000000,0x0000ff00 ! Expected data for %f12 | |
36666 | .word 0x00000000,0x00000000 ! Expected data for %f14 | |
36667 | .word 0x000000ff,0x00000000 ! Expected data for %f24 | |
36668 | .word 0xff1200ff,0xffff9c00 ! Expected data for %f26 | |
36669 | .word 0x00000000,0x000000ff ! Expected data for %f30 | |
36670 | p0_check_pt_data_125: | |
36671 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36672 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36673 | .word 0xff000000,0x00000000 ! Expected data for %l1 | |
36674 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
36675 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36676 | .word 0xffffffff,0xf31200ff ! Expected data for %l4 | |
36677 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
36678 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36679 | .word 0x00000000,0xf31200ff ! Expected data for %l7 | |
36680 | .word 0x00940000,0xf31200ff ! Expected data for %f2 | |
36681 | .word 0xf31200ff,0xff000000 ! Expected data for %f4 | |
36682 | .word 0x1f41ff76,0x2164159c ! Expected data for %f6 | |
36683 | .word 0xfc734517,0x000000ff ! Expected data for %f20 | |
36684 | .word 0x000000c6,0xffff0000 ! Expected data for %f28 | |
36685 | p0_check_pt_data_126: | |
36686 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36687 | .word 0x00000000,0x411f0000 ! Expected data for %l0 | |
36688 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36689 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36690 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36691 | .word 0x00000000,0x000079ff ! Expected data for %l5 | |
36692 | .word 0x00000000,0x0000ff79 ! Expected data for %l6 | |
36693 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36694 | .word 0x03000000,0x00000000 ! Expected data for %f0 | |
36695 | .word 0x00940000,0xf31200ff ! Expected data for %f2 | |
36696 | .word 0xf31200ff,0xff000000 ! Expected data for %f4 | |
36697 | .word 0x000000ff,0x00000000 ! Expected data for %f6 | |
36698 | .word 0xc7883403,0x0000ff00 ! Expected data for %f12 | |
36699 | .word 0x00000000,0xc6000000 ! Expected data for %f14 | |
36700 | p0_check_pt_data_127: | |
36701 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36702 | .word 0x00000000,0x0000ff79 ! Expected data for %l0 | |
36703 | .word 0x00000000,0x00000076 ! Expected data for %l1 | |
36704 | .word 0x00000000,0x0000ffff ! Expected data for %l2 | |
36705 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36706 | .word 0xff00ffff,0xff790000 ! Expected data for %l4 | |
36707 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36708 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
36709 | .word 0x03000000,0xffff0000 ! Expected data for %l7 | |
36710 | .word 0x00001f41,0x00000000 ! Expected data for %f14 | |
36711 | .word 0x00ff0000,0x000000ff ! Expected data for %f16 | |
36712 | .word 0x79ff0000,0x00000000 ! Expected data for %f18 | |
36713 | .word 0x000000ff,0xff0012f3 ! Expected data for %f24 | |
36714 | .word 0x79ff0000,0xff000000 ! Expected data for %f26 | |
36715 | .word 0x00000000,0x0000ffff ! Expected data for %f30 | |
36716 | p0_check_pt_data_128: | |
36717 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36718 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
36719 | .word 0x00000000,0xff000000 ! Expected data for %l1 | |
36720 | .word 0x00000000,0xc7883403 ! Expected data for %l2 | |
36721 | .word 0xffffffff,0xffffff00 ! Expected data for %l3 | |
36722 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
36723 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36724 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36725 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36726 | .word 0xff00ffff,0xff790000 ! Expected data for %f0 | |
36727 | .word 0x00940000,0x0000ffff ! Expected data for %f2 | |
36728 | .word 0xf31200ff,0xff000000 ! Expected data for %f4 | |
36729 | .word 0x000000ff,0x00000000 ! Expected data for %f6 | |
36730 | .word 0xff00ffff,0x00001f41 ! Expected data for %f14 | |
36731 | .word 0xffffff00,0x0000ffff ! Expected data for %f30 | |
36732 | p0_check_pt_data_129: | |
36733 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36734 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36735 | .word 0xffffffff,0xff000000 ! Expected data for %l1 | |
36736 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
36737 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
36738 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
36739 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36740 | .word 0x00000000,0x000000f3 ! Expected data for %l6 | |
36741 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36742 | .word 0xffffffff,0xff000000 ! Expected data for %f4 | |
36743 | .word 0x000000ff,0x00000000 ! Expected data for %f6 | |
36744 | .word 0x21640000,0x00000000 ! Expected data for %f8 | |
36745 | .word 0xf31200ff,0x00001f41 ! Expected data for %f14 | |
36746 | .word 0xff000000,0x00000000 ! Expected data for %f18 | |
36747 | .word 0xff1200ff,0x00009c15 ! Expected data for %f24 | |
36748 | p0_check_pt_data_130: | |
36749 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36750 | .word 0x00000000,0x00ff0000 ! Expected data for %l0 | |
36751 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
36752 | .word 0x00000000,0x000000c7 ! Expected data for %l2 | |
36753 | .word 0x00000000,0x00000088 ! Expected data for %l4 | |
36754 | .word 0x00000000,0xff000000 ! Expected data for %l5 | |
36755 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36756 | .word 0x00000000,0x174573fc ! Expected data for %l7 | |
36757 | .word 0xff000000,0xff790000 ! Expected data for %f0 | |
36758 | .word 0x21640000,0x00000000 ! Expected data for %f2 | |
36759 | .word 0x000000ff,0x00000000 ! Expected data for %f6 | |
36760 | .word 0x000000c6,0xffffffff ! Expected data for %f18 | |
36761 | .word 0x00000000,0x0000ffff ! Expected data for %f24 | |
36762 | p0_check_pt_data_131: | |
36763 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36764 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
36765 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
36766 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
36767 | .word 0xffffffff,0xffffffff ! Expected data for %l4 | |
36768 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36769 | .word 0x21640000,0x00000000 ! Expected data for %l7 | |
36770 | .word 0x000000c6,0xffffffff ! Expected data for %f0 | |
36771 | .word 0x21640000,0x00000000 ! Expected data for %f2 | |
36772 | .word 0xf3000000,0xff000000 ! Expected data for %f4 | |
36773 | .word 0xff790000,0x00000000 ! Expected data for %f6 | |
36774 | .word 0x00000000,0x00000000 ! Expected data for %f14 | |
36775 | .word 0x00940000,0xf31200ff ! Expected data for %f24 | |
36776 | .word 0xf31200ff,0xff000000 ! Expected data for %f26 | |
36777 | p0_check_pt_data_132: | |
36778 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36779 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36780 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36781 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36782 | .word 0xff000000,0x000000f3 ! Expected data for %l3 | |
36783 | .word 0x00000000,0x0000ff00 ! Expected data for %l4 | |
36784 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36785 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36786 | .word 0xffffffff,0xff0000ff ! Expected data for %l7 | |
36787 | .word 0x000000c6,0xffffffff ! Expected data for %f0 | |
36788 | .word 0x21640000,0x00000000 ! Expected data for %f2 | |
36789 | .word 0x00940000,0x00000000 ! Expected data for %f4 | |
36790 | .word 0x21640000,0xffffffff ! Expected data for %f8 | |
36791 | .word 0x00000003,0x000000ff ! Expected data for %f16 | |
36792 | .word 0xff0000ff,0x000000ff ! Expected data for %f20 | |
36793 | .word 0xf31200ff,0xff000000 ! Expected data for %f24 | |
36794 | p0_check_pt_data_133: | |
36795 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36796 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
36797 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
36798 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36799 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36800 | .word 0x00000000,0x000000c6 ! Expected data for %l4 | |
36801 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36802 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
36803 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36804 | .word 0x00ff0000,0x00000000 ! Expected data for %f2 | |
36805 | .word 0xc7ffffff,0x00000000 ! Expected data for %f4 | |
36806 | .word 0x00000000,0x00000000 ! Expected data for %f6 | |
36807 | .word 0x00000000,0x000000ff ! Expected data for %f12 | |
36808 | .word 0x00000000,0xff790000 ! Expected data for %f16 | |
36809 | .word 0x000079ff,0x00000000 ! Expected data for %f18 | |
36810 | .word 0x00ff0000,0x000000f3 ! Expected data for %f20 | |
36811 | .word 0x0000ffff,0xff790000 ! Expected data for %f22 | |
36812 | .word 0x0000ff00,0x00000000 ! Expected data for %f24 | |
36813 | .word 0x00000000,0x00000000 ! Expected data for %f26 | |
36814 | .word 0x000000c6,0xffff0000 ! Expected data for %f28 | |
36815 | .word 0xff000000,0x1f000076 ! Expected data for %f30 | |
36816 | p0_check_pt_data_134: | |
36817 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36818 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
36819 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
36820 | .word 0x00000000,0x0000ff00 ! Expected data for %l2 | |
36821 | .word 0x00000000,0x00ff0000 ! Expected data for %l3 | |
36822 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36823 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
36824 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
36825 | .word 0x00000000,0x00000000 ! Expected data for %f0 | |
36826 | .word 0x00000000,0x000079ff ! Expected data for %f2 | |
36827 | .word 0xc7ffffff,0x00000000 ! Expected data for %f4 | |
36828 | .word 0x00000000,0x0000ff03 ! Expected data for %f6 | |
36829 | p0_check_pt_data_135: | |
36830 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36831 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
36832 | .word 0xffffffff,0xff790000 ! Expected data for %l1 | |
36833 | .word 0xffffffff,0xffff0000 ! Expected data for %l2 | |
36834 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36835 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36836 | .word 0x00000000,0xc6000000 ! Expected data for %l5 | |
36837 | .word 0x00000000,0xffff0000 ! Expected data for %l6 | |
36838 | .word 0xffffffff,0xffffff00 ! Expected data for %l7 | |
36839 | .word 0xffffffff,0xffffffff ! Expected data for %f0 | |
36840 | .word 0xc7ffffff,0x00000000 ! Expected data for %f4 | |
36841 | .word 0x00000000,0x0000ff03 ! Expected data for %f6 | |
36842 | .word 0xff000000,0xff000000 ! Expected data for %f12 | |
36843 | .word 0xffffffff,0xc6000000 ! Expected data for %f14 | |
36844 | .word 0xffff0000,0x000000ff ! Expected data for %f16 | |
36845 | .word 0xff000000,0xffffffff ! Expected data for %f18 | |
36846 | .word 0x000000ff,0xffffffff ! Expected data for %f20 | |
36847 | .word 0xfc734517,0x000000ff ! Expected data for %f22 | |
36848 | .word 0x1f41ff76,0x2164159c ! Expected data for %f24 | |
36849 | .word 0xffffffff,0x79ff0000 ! Expected data for %f26 | |
36850 | .word 0xff000000,0x00009400 ! Expected data for %f28 | |
36851 | .word 0x7827da3e,0x597bac10 ! Expected data for %f30 | |
36852 | p0_check_pt_data_136: | |
36853 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36854 | .word 0x00940000,0x00000000 ! Expected data for %l0 | |
36855 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36856 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
36857 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
36858 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36859 | .word 0x00000000,0xf31200ff ! Expected data for %l5 | |
36860 | .word 0xffffffff,0xffff9400 ! Expected data for %l6 | |
36861 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
36862 | .word 0x00940000,0x00000000 ! Expected data for %f6 | |
36863 | .word 0xc7883403,0x00ff0000 ! Expected data for %f8 | |
36864 | .word 0x0000ffff,0xffff0000 ! Expected data for %f14 | |
36865 | .word 0x1f41ff76,0x0000ffff ! Expected data for %f24 | |
36866 | p0_check_pt_data_137: | |
36867 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36868 | .word 0x00000000,0xffff00ff ! Expected data for %l0 | |
36869 | .word 0x00000000,0x033488c7 ! Expected data for %l1 | |
36870 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36871 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36872 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36873 | .word 0x00000000,0xff0000ff ! Expected data for %l5 | |
36874 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36875 | .word 0xffffffff,0xffffffff ! Expected data for %f0 | |
36876 | .word 0x00940000,0x00000000 ! Expected data for %f6 | |
36877 | .word 0xc7883403,0x00000000 ! Expected data for %f10 | |
36878 | .word 0xffffffff,0x000000ff ! Expected data for %f16 | |
36879 | .word 0xffff0000,0xffffffff ! Expected data for %f18 | |
36880 | .word 0x000000ff,0xffffffff ! Expected data for %f20 | |
36881 | .word 0xfc734517,0x000000ff ! Expected data for %f22 | |
36882 | .word 0x1f41ff76,0x2164159c ! Expected data for %f24 | |
36883 | .word 0xffffffff,0x79ff0000 ! Expected data for %f26 | |
36884 | .word 0xff000000,0x00009400 ! Expected data for %f28 | |
36885 | .word 0x7827da3e,0x597bac10 ! Expected data for %f30 | |
36886 | p0_check_pt_data_138: | |
36887 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36888 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
36889 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36890 | .word 0x00000000,0xc7883403 ! Expected data for %l2 | |
36891 | .word 0x00ff0000,0x00000000 ! Expected data for %l3 | |
36892 | .word 0xffffffff,0xffffc7ec ! Expected data for %l5 | |
36893 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36894 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
36895 | .word 0xffffffff,0xffffffff ! Expected data for %f0 | |
36896 | .word 0x000000ff,0x00000000 ! Expected data for %f4 | |
36897 | .word 0x00000000,0x00000000 ! Expected data for %f12 | |
36898 | .word 0x00000000,0x00940000 ! Expected data for %f14 | |
36899 | .word 0x03000000,0x00000000 ! Expected data for %f18 | |
36900 | .word 0x00000000,0xffffffff ! Expected data for %f22 | |
36901 | .word 0x00000000,0x00000000 ! Expected data for %f24 | |
36902 | .word 0xffffffff,0xffffffff ! Expected data for %f30 | |
36903 | p0_check_pt_data_139: | |
36904 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36905 | .word 0xffffffff,0xffff00ff ! Expected data for %l0 | |
36906 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
36907 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
36908 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36909 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
36910 | .word 0xfc734517,0x000000ff ! Expected data for %l5 | |
36911 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36912 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
36913 | .word 0xffffffff,0xffffffff ! Expected data for %f0 | |
36914 | .word 0x00000000,0xff00ffff ! Expected data for %f2 | |
36915 | .word 0x000000ff,0x00000000 ! Expected data for %f4 | |
36916 | .word 0x00940000,0x00000000 ! Expected data for %f6 | |
36917 | .word 0x00000000,0xffffffff ! Expected data for %f14 | |
36918 | .word 0xffffffff,0xffffffff ! Expected data for %f16 | |
36919 | .word 0x03000000,0x00000000 ! Expected data for %f18 | |
36920 | .word 0x0000ffff,0xffff0000 ! Expected data for %f22 | |
36921 | p0_check_pt_data_140: | |
36922 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36923 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
36924 | .word 0xff000000,0x00000000 ! Expected data for %l1 | |
36925 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36926 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36927 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
36928 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36929 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
36930 | .word 0x00000000,0x0000ffff ! Expected data for %l7 | |
36931 | .word 0x00000000,0x00000003 ! Expected data for %f0 | |
36932 | .word 0xff0012f3,0x000000ff ! Expected data for %f2 | |
36933 | .word 0x00000000,0x00000000 ! Expected data for %f4 | |
36934 | .word 0x00000000,0xff000000 ! Expected data for %f6 | |
36935 | .word 0xc7883403,0x00ff0000 ! Expected data for %f8 | |
36936 | .word 0x00000000,0x00000003 ! Expected data for %f10 | |
36937 | .word 0x00ff0000,0x033488c7 ! Expected data for %f12 | |
36938 | .word 0x00000000,0x411f0000 ! Expected data for %f14 | |
36939 | .word 0x000000ff,0x21640000 ! Expected data for %f20 | |
36940 | p0_check_pt_data_141: | |
36941 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36942 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
36943 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
36944 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
36945 | .word 0x00000000,0x00009400 ! Expected data for %l3 | |
36946 | .word 0x00000000,0x0000ff00 ! Expected data for %l4 | |
36947 | .word 0x00000000,0x00009400 ! Expected data for %l5 | |
36948 | .word 0xffffffff,0xffffffff ! Expected data for %l6 | |
36949 | .word 0xffffffff,0xffffffff ! Expected data for %f0 | |
36950 | .word 0xff000000,0x00000003 ! Expected data for %f2 | |
36951 | .word 0x00006421,0xff000000 ! Expected data for %f4 | |
36952 | .word 0x0000ffff,0xffff0000 ! Expected data for %f6 | |
36953 | .word 0x00000000,0x00000000 ! Expected data for %f8 | |
36954 | .word 0x0000ff79,0xffffffff ! Expected data for %f10 | |
36955 | .word 0x00940000,0x000000ff ! Expected data for %f12 | |
36956 | .word 0xffffffff,0xffffffff ! Expected data for %f14 | |
36957 | .word 0x0000ffff,0x000000ff ! Expected data for %f18 | |
36958 | .word 0xffffffff,0x0000ff00 ! Expected data for %f30 | |
36959 | p0_check_pt_data_142: | |
36960 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36961 | .word 0x00000000,0x0000ffff ! Expected data for %l0 | |
36962 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
36963 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
36964 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36965 | .word 0x00000000,0x1f41ffff ! Expected data for %l4 | |
36966 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
36967 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
36968 | .word 0x00000000,0xffff0000 ! Expected data for %l7 | |
36969 | .word 0xff000000,0x00000003 ! Expected data for %f2 | |
36970 | .word 0x00006421,0xff000000 ! Expected data for %f4 | |
36971 | .word 0x0000ffff,0xffff0000 ! Expected data for %f6 | |
36972 | .word 0x0000ff79,0x000000ff ! Expected data for %f10 | |
36973 | p0_check_pt_data_143: | |
36974 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36975 | .word 0x00000000,0x0000ff00 ! Expected data for %l0 | |
36976 | .word 0x00000000,0x0000ffff ! Expected data for %l1 | |
36977 | .word 0x00000000,0xff000000 ! Expected data for %l2 | |
36978 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
36979 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
36980 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
36981 | .word 0x00000000,0xc7883403 ! Expected data for %l6 | |
36982 | .word 0x00000000,0x0000ff00 ! Expected data for %l7 | |
36983 | .word 0x00006421,0x00000000 ! Expected data for %f4 | |
36984 | .word 0x0000ffff,0xffff0000 ! Expected data for %f6 | |
36985 | .word 0x0000ff79,0x411f0000 ! Expected data for %f10 | |
36986 | .word 0xff000000,0x0000ffff ! Expected data for %f16 | |
36987 | .word 0x00ff0000,0x00000000 ! Expected data for %f18 | |
36988 | .word 0x00940000,0x000000ff ! Expected data for %f20 | |
36989 | .word 0x0000ffff,0x0000ff79 ! Expected data for %f22 | |
36990 | .word 0xff000000,0x033488c7 ! Expected data for %f24 | |
36991 | .word 0x03000000,0x00000000 ! Expected data for %f26 | |
36992 | .word 0xc7883403,0x0000ff00 ! Expected data for %f28 | |
36993 | .word 0x000000c6,0x00001f41 ! Expected data for %f30 | |
36994 | p0_check_pt_data_144: | |
36995 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
36996 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
36997 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
36998 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
36999 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
37000 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
37001 | .word 0x00000000,0xffffff00 ! Expected data for %l7 | |
37002 | .word 0xff000000,0x00009400 ! Expected data for %f0 | |
37003 | .word 0xff000000,0x00000003 ! Expected data for %f2 | |
37004 | .word 0x00006421,0x00000000 ! Expected data for %f4 | |
37005 | .word 0xffff00ff,0x000000ff ! Expected data for %f12 | |
37006 | .word 0xff000000,0x00009400 ! Expected data for %f20 | |
37007 | .word 0xffffffff,0xffffffff ! Expected data for %f22 | |
37008 | p0_check_pt_data_145: | |
37009 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37010 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
37011 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
37012 | .word 0x00000000,0xffffff00 ! Expected data for %l2 | |
37013 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
37014 | .word 0x00000000,0x00000003 ! Expected data for %l4 | |
37015 | .word 0x00000000,0x00000003 ! Expected data for %l5 | |
37016 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
37017 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
37018 | .word 0xff000000,0xff000000 ! Expected data for %f0 | |
37019 | .word 0x03000000,0x00000000 ! Expected data for %f2 | |
37020 | .word 0x00000000,0xffffffff ! Expected data for %f4 | |
37021 | .word 0xfc734517,0x000000ff ! Expected data for %f6 | |
37022 | .word 0x1f41ff76,0x2164159c ! Expected data for %f8 | |
37023 | .word 0xffffffff,0x79ff0000 ! Expected data for %f10 | |
37024 | .word 0xff000000,0x00009400 ! Expected data for %f12 | |
37025 | .word 0x7827da3e,0x597bac10 ! Expected data for %f14 | |
37026 | .word 0xff000000,0x0000ffff ! Expected data for %f18 | |
37027 | .word 0xff000000,0x00ffffff ! Expected data for %f20 | |
37028 | .word 0xffffffff,0x0000ff00 ! Expected data for %f22 | |
37029 | .word 0x00000003,0x0000ff00 ! Expected data for %f28 | |
37030 | p0_check_pt_data_146: | |
37031 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37032 | .word 0xffffffff,0xffffffff ! Expected data for %l0 | |
37033 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
37034 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
37035 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
37036 | .word 0xffffffff,0xffffff9c ! Expected data for %l4 | |
37037 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
37038 | .word 0x00000000,0x00ffffff ! Expected data for %l6 | |
37039 | .word 0xffffffff,0xffffffff ! Expected data for %l7 | |
37040 | .word 0x000000ff,0x000000ff ! Expected data for %f0 | |
37041 | .word 0x00ff0000,0x00000000 ! Expected data for %f2 | |
37042 | .word 0xff000000,0x00009400 ! Expected data for %f4 | |
37043 | .word 0x00000000,0xffffff00 ! Expected data for %f6 | |
37044 | .word 0x000000ff,0x00000000 ! Expected data for %f8 | |
37045 | .word 0x00000000,0x00000003 ! Expected data for %f10 | |
37046 | .word 0x00ff0000,0x033488c7 ! Expected data for %f12 | |
37047 | .word 0x411f0000,0xc6000000 ! Expected data for %f14 | |
37048 | .word 0x00ffffff,0x00000000 ! Expected data for %f16 | |
37049 | .word 0x00ff0000,0x0000ff00 ! Expected data for %f22 | |
37050 | .word 0x00000000,0x0000ff00 ! Expected data for %f24 | |
37051 | p0_check_pt_data_147: | |
37052 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37053 | .word 0xffffffff,0xff000000 ! Expected data for %l0 | |
37054 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
37055 | .word 0x00000000,0x0000ffff ! Expected data for %l2 | |
37056 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
37057 | .word 0xffffffff,0xffffffff ! Expected data for %l4 | |
37058 | .word 0x00000000,0x0000ffff ! Expected data for %l5 | |
37059 | .word 0x00000000,0x00000041 ! Expected data for %l6 | |
37060 | .word 0x00000000,0x0000ff00 ! Expected data for %l7 | |
37061 | .word 0x000000ff,0x000000ff ! Expected data for %f0 | |
37062 | .word 0x00000000,0x0000ff00 ! Expected data for %f6 | |
37063 | .word 0x0000ff00,0x00000003 ! Expected data for %f10 | |
37064 | .word 0xff940000,0x000000ff ! Expected data for %f16 | |
37065 | .word 0x000000ff,0x00000000 ! Expected data for %f18 | |
37066 | .word 0x000000c6,0xffffff00 ! Expected data for %f30 | |
37067 | p0_check_pt_data_148: | |
37068 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37069 | .word 0x00000000,0x00000003 ! Expected data for %l0 | |
37070 | .word 0x00000000,0x000000c6 ! Expected data for %l1 | |
37071 | .word 0x00000000,0x00000003 ! Expected data for %l2 | |
37072 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
37073 | .word 0x00000000,0x0000ffff ! Expected data for %l4 | |
37074 | .word 0x0000ff00,0xc6000000 ! Expected data for %l5 | |
37075 | .word 0xffffffff,0xffff00ff ! Expected data for %l6 | |
37076 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
37077 | .word 0x000000ff,0x000000ff ! Expected data for %f0 | |
37078 | .word 0xffffffff,0xe6bf2212 ! Expected data for %f2 | |
37079 | .word 0x00ff0000,0x00000000 ! Expected data for %f6 | |
37080 | .word 0x00000000,0x000000ff ! Expected data for %f16 | |
37081 | .word 0x0000ffff,0xc7883403 ! Expected data for %f28 | |
37082 | p0_check_pt_data_149: | |
37083 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37084 | .word 0xffffffff,0xff0000c6 ! Expected data for %l0 | |
37085 | .word 0x00000000,0x0000ff00 ! Expected data for %l2 | |
37086 | .word 0xffffffff,0xffffff00 ! Expected data for %l3 | |
37087 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
37088 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
37089 | .word 0x00000000,0x00ff0000 ! Expected data for %l6 | |
37090 | .word 0xffffffff,0x0000ffff ! Expected data for %l7 | |
37091 | .word 0x000000ff,0xff000000 ! Expected data for %f0 | |
37092 | .word 0xffffffff,0xe6bf2212 ! Expected data for %f2 | |
37093 | .word 0x000000ff,0x00000000 ! Expected data for %f8 | |
37094 | .word 0x000000c6,0x000000ff ! Expected data for %f24 | |
37095 | .word 0x0000ffff,0x00000000 ! Expected data for %f28 | |
37096 | p0_check_pt_data_150: | |
37097 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37098 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
37099 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
37100 | .word 0x000000c6,0xffffff00 ! Expected data for %l2 | |
37101 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
37102 | .word 0x00000000,0x00000012 ! Expected data for %l4 | |
37103 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
37104 | .word 0x00000000,0xffff0000 ! Expected data for %l6 | |
37105 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
37106 | .word 0xff000000,0xff000000 ! Expected data for %f0 | |
37107 | .word 0xffffffff,0xe6bf2212 ! Expected data for %f2 | |
37108 | .word 0x0000ff00,0x000000c6 ! Expected data for %f8 | |
37109 | .word 0x000000ff,0x033488c7 ! Expected data for %f12 | |
37110 | .word 0x000000ff,0x0000ff00 ! Expected data for %f14 | |
37111 | .word 0x000000ff,0xf31200ff ! Expected data for %f24 | |
37112 | .word 0xffff0000,0xffffff00 ! Expected data for %f30 | |
37113 | p0_check_pt_data_151: | |
37114 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37115 | .word 0x00000000,0x000022ff ! Expected data for %l0 | |
37116 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
37117 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
37118 | .word 0x0000ff00,0x000000ff ! Expected data for %l3 | |
37119 | .word 0x00000000,0x1222bfe6 ! Expected data for %l4 | |
37120 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
37121 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
37122 | .word 0x00000000,0x00009400 ! Expected data for %l7 | |
37123 | .word 0xffffffff,0xe6bf2212 ! Expected data for %f2 | |
37124 | .word 0xff000000,0xe6bf2212 ! Expected data for %f4 | |
37125 | .word 0x00ff0000,0x00000000 ! Expected data for %f6 | |
37126 | .word 0x00ff0000,0x0000ff00 ! Expected data for %f22 | |
37127 | .word 0x00000000,0x00000003 ! Expected data for %f26 | |
37128 | p0_check_pt_data_152: | |
37129 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37130 | .word 0x00000000,0x000000ff ! Expected data for %l0 | |
37131 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
37132 | .word 0x00000000,0xc6000000 ! Expected data for %l2 | |
37133 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
37134 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
37135 | .word 0x00000000,0x0000c676 ! Expected data for %l5 | |
37136 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
37137 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
37138 | .word 0x00000000,0xff000000 ! Expected data for %f0 | |
37139 | .word 0xff000000,0xe6bf2212 ! Expected data for %f4 | |
37140 | .word 0x00ff0000,0xffffff00 ! Expected data for %f6 | |
37141 | .word 0x00000000,0x76c60000 ! Expected data for %f24 | |
37142 | .word 0xff000000,0x00009400 ! Expected data for %f26 | |
37143 | .word 0x00000000,0xffff0000 ! Expected data for %f30 | |
37144 | p0_check_pt_data_153: | |
37145 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37146 | .word 0x00000000,0x00000003 ! Expected data for %l0 | |
37147 | .word 0xffffffff,0xffffffff ! Expected data for %l1 | |
37148 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
37149 | .word 0x00000000,0x000000ff ! Expected data for %l3 | |
37150 | .word 0x00000000,0x0000ff00 ! Expected data for %l4 | |
37151 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
37152 | .word 0x00000000,0x00000012 ! Expected data for %l6 | |
37153 | .word 0x00000000,0x000000c6 ! Expected data for %l7 | |
37154 | .word 0x00000000,0x000000ff ! Expected data for %f0 | |
37155 | .word 0xffffffff,0xe6bf2212 ! Expected data for %f2 | |
37156 | .word 0x00ff0000,0xffffff00 ! Expected data for %f6 | |
37157 | .word 0xffffffff,0xffffffff ! Expected data for %f8 | |
37158 | .word 0x00ff0000,0x033488ff ! Expected data for %f22 | |
37159 | .word 0x0000c676,0xffff0000 ! Expected data for %f24 | |
37160 | p0_check_pt_data_154: | |
37161 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37162 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
37163 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
37164 | .word 0x00000000,0x0000c676 ! Expected data for %l2 | |
37165 | .word 0xffffffff,0xffffff03 ! Expected data for %l3 | |
37166 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
37167 | .word 0x00000000,0x1222bfe6 ! Expected data for %l6 | |
37168 | .word 0x00000000,0xffffffff ! Expected data for %l7 | |
37169 | .word 0xff000000,0x00000000 ! Expected data for %f0 | |
37170 | .word 0x00000000,0xff000000 ! Expected data for %f2 | |
37171 | .word 0xffffff00,0x000000ff ! Expected data for %f4 | |
37172 | .word 0x00ff0000,0x0000ff00 ! Expected data for %f6 | |
37173 | .word 0x00000000,0x00000000 ! Expected data for %f8 | |
37174 | .word 0x00940000,0x000000ff ! Expected data for %f10 | |
37175 | .word 0x00000000,0xffff0000 ! Expected data for %f12 | |
37176 | .word 0x00009400,0x000000ff ! Expected data for %f14 | |
37177 | .word 0x000000ff,0xff000000 ! Expected data for %f18 | |
37178 | .word 0x00940000,0xffff00ff ! Expected data for %f24 | |
37179 | .word 0x000000ff,0xff000000 ! Expected data for %f28 | |
37180 | p0_check_pt_data_155: | |
37181 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37182 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
37183 | .word 0x00000000,0x0000ffff ! Expected data for %l1 | |
37184 | .word 0x00000000,0x00000000 ! Expected data for %l2 | |
37185 | .word 0x00000000,0x0000ff00 ! Expected data for %l3 | |
37186 | .word 0x00000000,0xff883403 ! Expected data for %l4 | |
37187 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
37188 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
37189 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
37190 | .word 0xff000000,0xe6bf2212 ! Expected data for %f0 | |
37191 | .word 0x00000000,0x0000c676 ! Expected data for %f4 | |
37192 | .word 0xffffffff,0xffffffff ! Expected data for %f8 | |
37193 | .word 0xffff0000,0x00000000 ! Expected data for %f16 | |
37194 | .word 0x000000ff,0x00000000 ! Expected data for %f18 | |
37195 | .word 0xff000000,0x00ffffff ! Expected data for %f20 | |
37196 | .word 0x00000000,0xff000000 ! Expected data for %f22 | |
37197 | .word 0xf31200ff,0x00ff0000 ! Expected data for %f24 | |
37198 | .word 0x00000000,0x0000ff00 ! Expected data for %f26 | |
37199 | .word 0x00ff0000,0x033488c7 ! Expected data for %f28 | |
37200 | .word 0x411f0000,0xffff00ff ! Expected data for %f30 | |
37201 | p0_check_pt_data_156: | |
37202 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37203 | .word 0x00000000,0x00000076 ! Expected data for %l0 | |
37204 | .word 0x00000000,0x000000ff ! Expected data for %l1 | |
37205 | .word 0x00000000,0x0000ff00 ! Expected data for %l2 | |
37206 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
37207 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
37208 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
37209 | .word 0x00000000,0x00000076 ! Expected data for %l6 | |
37210 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
37211 | .word 0x00000000,0xff000000 ! Expected data for %f2 | |
37212 | .word 0x00000000,0x0000c676 ! Expected data for %f4 | |
37213 | .word 0xff0000ff,0x0000ff00 ! Expected data for %f6 | |
37214 | .word 0xff000000,0xffffffff ! Expected data for %f8 | |
37215 | .word 0x00000000,0x0000c676 ! Expected data for %f16 | |
37216 | .word 0x00000000,0xff883403 ! Expected data for %f26 | |
37217 | .word 0x00ff0000,0x033488c7 ! Expected data for %f28 | |
37218 | p0_check_pt_data_157: | |
37219 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37220 | .word 0x00000000,0x00000076 ! Expected data for %l0 | |
37221 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
37222 | .word 0x00000000,0x000000ff ! Expected data for %l2 | |
37223 | .word 0x00000076,0x00000000 ! Expected data for %l3 | |
37224 | .word 0x00000000,0xff000000 ! Expected data for %l4 | |
37225 | .word 0xffffffff,0xffffffff ! Expected data for %l5 | |
37226 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
37227 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
37228 | .word 0x033488ff,0x0000ffff ! Expected data for %f0 | |
37229 | .word 0x00000000,0xff000000 ! Expected data for %f2 | |
37230 | .word 0x00ff159c,0xffffffff ! Expected data for %f8 | |
37231 | .word 0x00000000,0x00ff0000 ! Expected data for %f20 | |
37232 | .word 0x00000000,0x000000ff ! Expected data for %f22 | |
37233 | .word 0x00000000,0x00000000 ! Expected data for %f24 | |
37234 | p0_check_pt_data_158: | |
37235 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37236 | .word 0x033488c7,0x03348927 ! Expected data for %l0 | |
37237 | .word 0x00000000,0x00000000 ! Expected data for %l1 | |
37238 | .word 0x00000000,0x0000ffff ! Expected data for %l2 | |
37239 | .word 0x00000000,0x000002ff ! Expected data for %l3 | |
37240 | .word 0x00000000,0x00000000 ! Expected data for %l4 | |
37241 | .word 0x00000000,0xffffffff ! Expected data for %l5 | |
37242 | .word 0x00ff159c,0x9c15ff00 ! Expected data for %l6 | |
37243 | .word 0x00000000,0x000000ff ! Expected data for %l7 | |
37244 | .word 0x00000000,0xff000000 ! Expected data for %f2 | |
37245 | .word 0x00940000,0x00ff0000 ! Expected data for %f10 | |
37246 | p0_check_pt_data_159: | |
37247 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37248 | .word 0x00000000,0xff000000 ! Expected data for %l0 | |
37249 | .word 0xffffffff,0xffffffff ! Expected data for %l2 | |
37250 | .word 0xffffffff,0xffffffff ! Expected data for %l3 | |
37251 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
37252 | .word 0x00000000,0x000000ff ! Expected data for %l5 | |
37253 | .word 0x00000000,0x000000ff ! Expected data for %l6 | |
37254 | .word 0x00000000,0x00000088 ! Expected data for %l7 | |
37255 | .word 0x033488ff,0x0000ffff ! Expected data for %f0 | |
37256 | .word 0x00000000,0x00000000 ! Expected data for %f2 | |
37257 | .word 0xff0000ff,0x0000ff00 ! Expected data for %f6 | |
37258 | .word 0xff00ffff,0x00001f41 ! Expected data for %f22 | |
37259 | .word 0x00000000,0x0000c676 ! Expected data for %f26 | |
37260 | .word 0x00000000,0x033488c7 ! Expected data for %f28 | |
37261 | p0_check_pt_data_160: | |
37262 | .word 0x00000000,0x00000000 ! FPU Reg ld/st area | |
37263 | .word 0x00000000,0x00000000 ! Expected data for %l0 | |
37264 | .word 0x00000000,0x0000ffff ! Expected data for %l1 | |
37265 | .word 0x00000000,0x00000000 ! Expected data for %l3 | |
37266 | .word 0x00000000,0x000000ff ! Expected data for %l4 | |
37267 | .word 0x00000000,0x00000000 ! Expected data for %l5 | |
37268 | .word 0x00000000,0x00000000 ! Expected data for %l6 | |
37269 | .word 0x00000000,0x00000000 ! Expected data for %l7 | |
37270 | .word 0x000000ff,0x000000ff ! Expected data for %f0 | |
37271 | .word 0xff000000,0x0000c676 ! Expected data for %f2 | |
37272 | .word 0xff00ff00,0x000000ff ! Expected data for %f4 | |
37273 | .word 0x00ff0000,0x0000ff00 ! Expected data for %f6 | |
37274 | .word 0x0000c676,0x00000000 ! Expected data for %f8 | |
37275 | .word 0x00940000,0x000000ff ! Expected data for %f10 | |
37276 | .word 0x00000000,0xffff0000 ! Expected data for %f12 | |
37277 | .word 0x0000ffff,0x00000000 ! Expected data for %f14 | |
37278 | .word 0x00ff159c,0x00000000 ! Expected data for %f18 | |
37279 | .word 0x00000000,0xff00ffff ! Expected data for %f20 | |
37280 | .word 0x0000ffff,0xffff00ff ! Expected data for %f30 | |
37281 | ! Data for Cross Processor Interrupt | |
37282 | .align 8 | |
37283 | received_xintr: | |
37284 | .word 0,0,0,0,0,0,0,0 | |
37285 | .word 0,0,0,0,0,0,0,0 | |
37286 | .word 0,0,0,0,0,0,0,0 | |
37287 | .word 0,0,0,0,0,0,0,0 | |
37288 | .word 0,0,0,0,0,0,0,0 | |
37289 | .word 0,0,0,0,0,0,0,0 | |
37290 | .word 0,0,0,0,0,0,0,0 | |
37291 | .word 0,0,0,0,0,0,0,0 | |
37292 | p0_dispatch_retry: | |
37293 | .word 0,0 | |
37294 | p0_xintr_data: | |
37295 | .word 0x00000000,0x00000001 | |
37296 | .word 0x72d4f34f,0xcb3255e2 | |
37297 | .word 0x00000000,0x00000002 | |
37298 | .word 0xa21b661f,0xa60657ee | |
37299 | .word 0x00000000,0x00000003 | |
37300 | .word 0x014fe4f0,0x2f420f05 | |
37301 | .word 0x00000000,0x00000004 | |
37302 | .word 0x232bb63f,0xc010756e | |
37303 | .word 0x00000000,0x00000005 | |
37304 | .word 0xa967aae8,0x60694f1d | |
37305 | .word 0x00000000,0x00000006 | |
37306 | .word 0xdc1444bf,0xeb83f09c | |
37307 | .word 0x00000000,0x00000007 | |
37308 | .word 0xe988d250,0x5214aa45 | |
37309 | .word 0x00000000,0x00000008 | |
37310 | .word 0xa54d3768,0x134c47e2 | |
37311 | .align 8 | |
37312 | p0_xintr_expected: | |
37313 | .word 0 | |
37314 | .align 64 | |
37315 | xintr_data_ptrs: | |
37316 | .word p0_xintr_data | |
37317 | .align 8 | |
37318 | p0_xintr_db: | |
37319 | .skip 512 | |
37320 | p0_xintr_retry_count: | |
37321 | .word 0,0 | |
37322 | p0_reset_cnt: | |
37323 | .word 0 | |
37324 | .align 8 | |
37325 | p0_ec_timing_ctrl: | |
37326 | .word 0,0 | |
37327 | p0_ec_control: | |
37328 | .word 0,0 | |
37329 | p0_mcu_shadow: | |
37330 | .skip 80 | |
37331 | user_data_end: | |
37332 | ||
37333 | ||
37334 | SECTION .p0_local0 DATA_VA=0x000800000 | |
37335 | ||
37336 | attr_data { | |
37337 | Name = .p0_local0, | |
37338 | VA = 0x0000000000800000, | |
37339 | RA = 0x0000000010000000, | |
37340 | PA = ra2pa(0x0000000010000000,0), | |
37341 | part_0_ctx_nonzero_tsb_config_0, | |
37342 | TTE_Context=PCONTEXT, | |
37343 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37344 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37345 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37346 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37347 | } | |
37348 | ||
37349 | .data | |
37350 | .seg "data" | |
37351 | .align 0x2000 | |
37352 | .global p0_local0_start | |
37353 | p0_local0_begin: | |
37354 | .skip 0x1400 | |
37355 | p0_local0_start: | |
37356 | .word 0xfadc9dd9,0xc7240e68,0xb6f16259,0xfee3823a | |
37357 | .word 0x7ff18310,0xf1066fbf,0x718ad784,0xeaef3d4b | |
37358 | .word 0x7c9650aa,0x6ddd37d6,0x8d3d5da0,0x7469a694 | |
37359 | .word 0x6123c459,0x6ff77387,0x93f8cfd1,0x0b65ade6 | |
37360 | p0_local0_end: | |
37361 | ||
37362 | SECTION .p0_local0_sec DATA_VA=0x000800000 | |
37363 | ||
37364 | attr_data { | |
37365 | Name = .p0_local0_sec, | |
37366 | VA = 0x0000000000800000, | |
37367 | RA = 0x0000000030000000, | |
37368 | PA = ra2pa(0x0000000030000000,0), | |
37369 | part_0_ctx_nonzero_tsb_config_0, | |
37370 | TTE_Context=SCONTEXT, | |
37371 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37372 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37373 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37374 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37375 | } | |
37376 | ||
37377 | .data | |
37378 | .seg "data" | |
37379 | .align 0x2000 | |
37380 | .global p0_local0_sec_start | |
37381 | p0_local0_sec_begin: | |
37382 | .skip 0x1400 | |
37383 | p0_local0_sec_start: | |
37384 | .word 0xea58c747,0xd76d7edb,0x67f196a1,0x273b9879 | |
37385 | .word 0x0fc60bf4,0x781db131,0x23e3b364,0x90da2bca | |
37386 | .word 0xdb15cd80,0x82024189,0x5d57d4e0,0x3d61d89c | |
37387 | .word 0xd9d7a7d5,0x10710795,0x022d96f8,0xd6ba79b1 | |
37388 | p0_local0_sec_end: | |
37389 | ||
37390 | SECTION .p0_local1 DATA_VA=0x000802000 | |
37391 | ||
37392 | attr_data { | |
37393 | Name = .p0_local1, | |
37394 | VA = 0x0000000000802000, | |
37395 | RA = 0x0000000010040000, | |
37396 | PA = ra2pa(0x0000000010040000,0), | |
37397 | part_0_ctx_nonzero_tsb_config_0, | |
37398 | TTE_Context=PCONTEXT, | |
37399 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37400 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37401 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37402 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37403 | } | |
37404 | ||
37405 | .data | |
37406 | .seg "data" | |
37407 | .align 0x2000 | |
37408 | .global p0_local1_start | |
37409 | p0_local1_begin: | |
37410 | .skip 0x1400 | |
37411 | p0_local1_start: | |
37412 | .word 0xc605e54a,0x64663f7f,0x16e58143,0x77f3b33e | |
37413 | .word 0x9f776232,0xecb7b96f,0x532062ab,0x15e63fa4 | |
37414 | .word 0xa504591a,0x724de66c,0x03083a4b,0x18519713 | |
37415 | .word 0x756543ac,0xdb25da46,0x36dc01c4,0xa34df544 | |
37416 | p0_local1_end: | |
37417 | ||
37418 | SECTION .p0_local1_sec DATA_VA=0x000802000 | |
37419 | ||
37420 | attr_data { | |
37421 | Name = .p0_local1_sec, | |
37422 | VA = 0x0000000000802000, | |
37423 | RA = 0x0000000030040000, | |
37424 | PA = ra2pa(0x0000000030040000,0), | |
37425 | part_0_ctx_nonzero_tsb_config_0, | |
37426 | TTE_Context=SCONTEXT, | |
37427 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37428 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37429 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37430 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37431 | } | |
37432 | ||
37433 | .data | |
37434 | .seg "data" | |
37435 | .align 0x2000 | |
37436 | .global p0_local1_sec_start | |
37437 | p0_local1_sec_begin: | |
37438 | .skip 0x1400 | |
37439 | p0_local1_sec_start: | |
37440 | .word 0x0fb39725,0x203e455b,0x40020fbc,0xedf0a6df | |
37441 | .word 0xeb27c648,0x55759904,0x73200d07,0xb792cdbe | |
37442 | .word 0x665ebb76,0x41c3b07b,0x4bf8b753,0xb8f773a1 | |
37443 | .word 0x00715eb7,0xd1d23403,0xcdf93c40,0x557d4e6a | |
37444 | p0_local1_sec_end: | |
37445 | ||
37446 | SECTION .p0_local2 DATA_VA=0x000804000 | |
37447 | ||
37448 | attr_data { | |
37449 | Name = .p0_local2, | |
37450 | VA = 0x0000000000804000, | |
37451 | RA = 0x0000000010080000, | |
37452 | PA = ra2pa(0x0000000010080000,0), | |
37453 | part_0_ctx_nonzero_tsb_config_0, | |
37454 | TTE_Context=PCONTEXT, | |
37455 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37456 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37457 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37458 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37459 | } | |
37460 | ||
37461 | .data | |
37462 | .seg "data" | |
37463 | .align 0x2000 | |
37464 | .global p0_local2_start | |
37465 | p0_local2_begin: | |
37466 | .skip 0x1400 | |
37467 | p0_local2_start: | |
37468 | .word 0x4d1170cb,0x284795cd,0xdfc18dfe,0x3e0c1b36 | |
37469 | .word 0xf1ba113a,0x98a5f3d9,0x738700e3,0xd0f61e43 | |
37470 | .word 0x27c90ee2,0xf7ec83bb,0x9bc60b6d,0x1970d394 | |
37471 | .word 0xa0f5f805,0x3c31c6bf,0xa6ce90df,0x8c8decca | |
37472 | p0_local2_end: | |
37473 | ||
37474 | SECTION .p0_local2_sec DATA_VA=0x000804000 | |
37475 | ||
37476 | attr_data { | |
37477 | Name = .p0_local2_sec, | |
37478 | VA = 0x0000000000804000, | |
37479 | RA = 0x0000000030080000, | |
37480 | PA = ra2pa(0x0000000030080000,0), | |
37481 | part_0_ctx_nonzero_tsb_config_0, | |
37482 | TTE_Context=SCONTEXT, | |
37483 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37484 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37485 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37486 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37487 | } | |
37488 | ||
37489 | .data | |
37490 | .seg "data" | |
37491 | .align 0x2000 | |
37492 | .global p0_local2_sec_start | |
37493 | p0_local2_sec_begin: | |
37494 | .skip 0x1400 | |
37495 | p0_local2_sec_start: | |
37496 | .word 0xafeb8d4f,0x437ea2f2,0x69976ba3,0x7b1c40d4 | |
37497 | .word 0x63da39e2,0x0a65007e,0x4ede5766,0xa3eab300 | |
37498 | .word 0x28dad480,0xd2eb7d3e,0x1ca4efd8,0xdfa55c31 | |
37499 | .word 0x5431406a,0x62c6a8a2,0x22aff13a,0xaefdb0b4 | |
37500 | p0_local2_sec_end: | |
37501 | ||
37502 | SECTION .p0_local3 DATA_VA=0x000806000 | |
37503 | ||
37504 | attr_data { | |
37505 | Name = .p0_local3, | |
37506 | VA = 0x0000000000806000, | |
37507 | RA = 0x00000000100c0000, | |
37508 | PA = ra2pa(0x00000000100c0000,0), | |
37509 | part_0_ctx_nonzero_tsb_config_0, | |
37510 | TTE_Context=PCONTEXT, | |
37511 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37512 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37513 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37514 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37515 | } | |
37516 | ||
37517 | .data | |
37518 | .seg "data" | |
37519 | .align 0x2000 | |
37520 | .global p0_local3_start | |
37521 | p0_local3_begin: | |
37522 | .skip 0x1400 | |
37523 | p0_local3_start: | |
37524 | .word 0x0298f663,0xe285a978,0xf6ea14ce,0x020bf863 | |
37525 | .word 0x54631bda,0xa57cc117,0xbcb76aa3,0xf52dc009 | |
37526 | .word 0x4436ac72,0xbc712b90,0x76ec22b9,0x44d46da8 | |
37527 | .word 0x3a88f692,0x1154128e,0x1babc5d7,0x725ea756 | |
37528 | p0_local3_end: | |
37529 | ||
37530 | SECTION .p0_local3_sec DATA_VA=0x000806000 | |
37531 | ||
37532 | attr_data { | |
37533 | Name = .p0_local3_sec, | |
37534 | VA = 0x0000000000806000, | |
37535 | RA = 0x00000000300c0000, | |
37536 | PA = ra2pa(0x00000000300c0000,0), | |
37537 | part_0_ctx_nonzero_tsb_config_0, | |
37538 | TTE_Context=SCONTEXT, | |
37539 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37540 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37541 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37542 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37543 | } | |
37544 | ||
37545 | .data | |
37546 | .seg "data" | |
37547 | .align 0x2000 | |
37548 | .global p0_local3_sec_start | |
37549 | p0_local3_sec_begin: | |
37550 | .skip 0x1400 | |
37551 | p0_local3_sec_start: | |
37552 | .word 0x76881109,0xa73028c1,0x22d46ebb,0x1c962468 | |
37553 | .word 0x1d8bd827,0x995cb816,0x3b3613d6,0xca7d96ae | |
37554 | .word 0xdd307d06,0x32d89af4,0xa5121d40,0x7c5f7823 | |
37555 | .word 0x3b5b48a7,0xfb9d2d1e,0xf5727354,0x8f16a41a | |
37556 | p0_local3_sec_end: | |
37557 | ||
37558 | SECTION .p0_local4 DATA_VA=0x000808000 | |
37559 | ||
37560 | attr_data { | |
37561 | Name = .p0_local4, | |
37562 | VA = 0x0000000000808000, | |
37563 | RA = 0x0000000010100000, | |
37564 | PA = ra2pa(0x0000000010100000,0), | |
37565 | part_0_ctx_nonzero_tsb_config_0, | |
37566 | TTE_Context=PCONTEXT, | |
37567 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37568 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37569 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37570 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37571 | } | |
37572 | ||
37573 | .data | |
37574 | .seg "data" | |
37575 | .align 0x2000 | |
37576 | .global p0_local4_start | |
37577 | p0_local4_begin: | |
37578 | .skip 0x1400 | |
37579 | p0_local4_start: | |
37580 | .word 0x5a850483,0x7b4442f4,0xf2f43560,0xd244b274 | |
37581 | .word 0x6bdd789c,0xc5e8e712,0x50d322c9,0x752b05bc | |
37582 | .word 0xcd6765be,0x446d5ace,0xb632026c,0x57414df0 | |
37583 | .word 0xb7986e83,0x8b9a7233,0xe96893a4,0xb9cc7274 | |
37584 | p0_local4_end: | |
37585 | ||
37586 | SECTION .p0_local4_sec DATA_VA=0x000808000 | |
37587 | ||
37588 | attr_data { | |
37589 | Name = .p0_local4_sec, | |
37590 | VA = 0x0000000000808000, | |
37591 | RA = 0x0000000030100000, | |
37592 | PA = ra2pa(0x0000000030100000,0), | |
37593 | part_0_ctx_nonzero_tsb_config_0, | |
37594 | TTE_Context=SCONTEXT, | |
37595 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37596 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37597 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37598 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37599 | } | |
37600 | ||
37601 | .data | |
37602 | .seg "data" | |
37603 | .align 0x2000 | |
37604 | .global p0_local4_sec_start | |
37605 | p0_local4_sec_begin: | |
37606 | .skip 0x1400 | |
37607 | p0_local4_sec_start: | |
37608 | .word 0xe39932a8,0xdbc25ec6,0x4e239ae6,0xa339b150 | |
37609 | .word 0xdfb96bc4,0xdb36fb15,0xa26115a2,0x6e092edc | |
37610 | .word 0x9c486421,0x76c9d21f,0x174573fc,0xe9706042 | |
37611 | .word 0x904919ff,0x9def9057,0x5e9638c2,0x0b931a2a | |
37612 | p0_local4_sec_end: | |
37613 | ||
37614 | SECTION .p0_local5 DATA_VA=0x00080a000 | |
37615 | ||
37616 | attr_data { | |
37617 | Name = .p0_local5, | |
37618 | VA = 0x000000000080a000, | |
37619 | RA = 0x0000000010140000, | |
37620 | PA = ra2pa(0x0000000010140000,0), | |
37621 | part_0_ctx_nonzero_tsb_config_0, | |
37622 | TTE_Context=PCONTEXT, | |
37623 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37624 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37625 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37626 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37627 | } | |
37628 | ||
37629 | .data | |
37630 | .seg "data" | |
37631 | .align 0x2000 | |
37632 | .global p0_local5_start | |
37633 | p0_local5_begin: | |
37634 | .skip 0x1400 | |
37635 | p0_local5_start: | |
37636 | .word 0x8d810d75,0x63ddd5d3,0x1058da2a,0x018700bd | |
37637 | .word 0xa9b88b86,0x30295e9b,0x5c425584,0x5ed8104a | |
37638 | .word 0xf0295f02,0x62e08b74,0x146cf6d9,0x637cc6fe | |
37639 | .word 0xbbbf9dab,0xac8f149b,0xed4177a2,0x900d9ef7 | |
37640 | p0_local5_end: | |
37641 | ||
37642 | SECTION .p0_local5_sec DATA_VA=0x00080a000 | |
37643 | ||
37644 | attr_data { | |
37645 | Name = .p0_local5_sec, | |
37646 | VA = 0x000000000080a000, | |
37647 | RA = 0x0000000030140000, | |
37648 | PA = ra2pa(0x0000000030140000,0), | |
37649 | part_0_ctx_nonzero_tsb_config_0, | |
37650 | TTE_Context=SCONTEXT, | |
37651 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37652 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37653 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37654 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37655 | } | |
37656 | ||
37657 | .data | |
37658 | .seg "data" | |
37659 | .align 0x2000 | |
37660 | .global p0_local5_sec_start | |
37661 | p0_local5_sec_begin: | |
37662 | .skip 0x1400 | |
37663 | p0_local5_sec_start: | |
37664 | .word 0x433d2b76,0x9c3a0752,0x9677efcf,0xab3b564f | |
37665 | .word 0xe9c270a2,0xa9477d1e,0x2aa7d642,0x8a72324d | |
37666 | .word 0xd9417db2,0xbadad443,0xdf22a757,0xd0510144 | |
37667 | .word 0x43cec797,0xb9444bcf,0x231206e5,0xad3624d0 | |
37668 | p0_local5_sec_end: | |
37669 | ||
37670 | SECTION .p0_local6 DATA_VA=0x00080c000 | |
37671 | ||
37672 | attr_data { | |
37673 | Name = .p0_local6, | |
37674 | VA = 0x000000000080c000, | |
37675 | RA = 0x0000000010180000, | |
37676 | PA = ra2pa(0x0000000010180000,0), | |
37677 | part_0_ctx_nonzero_tsb_config_0, | |
37678 | TTE_Context=PCONTEXT, | |
37679 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37680 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37681 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37682 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37683 | } | |
37684 | ||
37685 | .data | |
37686 | .seg "data" | |
37687 | .align 0x2000 | |
37688 | .global p0_local6_start | |
37689 | p0_local6_begin: | |
37690 | .skip 0x1400 | |
37691 | p0_local6_start: | |
37692 | .word 0x7523cbf1,0xd304f67d,0x24e73cb2,0x1e40a716 | |
37693 | .word 0x74aa7417,0x6c295bdb,0x02233d7d,0x5209669e | |
37694 | .word 0xf267dfa9,0x21dd459a,0x09aa98a3,0xfc2ceea2 | |
37695 | .word 0x378e6d9e,0x5454ec74,0x0d687798,0x9af6877f | |
37696 | p0_local6_end: | |
37697 | ||
37698 | SECTION .p0_local6_sec DATA_VA=0x00080c000 | |
37699 | ||
37700 | attr_data { | |
37701 | Name = .p0_local6_sec, | |
37702 | VA = 0x000000000080c000, | |
37703 | RA = 0x0000000030180000, | |
37704 | PA = ra2pa(0x0000000030180000,0), | |
37705 | part_0_ctx_nonzero_tsb_config_0, | |
37706 | TTE_Context=SCONTEXT, | |
37707 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37708 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37709 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37710 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37711 | } | |
37712 | ||
37713 | .data | |
37714 | .seg "data" | |
37715 | .align 0x2000 | |
37716 | .global p0_local6_sec_start | |
37717 | p0_local6_sec_begin: | |
37718 | .skip 0x1400 | |
37719 | p0_local6_sec_start: | |
37720 | .word 0xef53f987,0xb6be1f4a,0x3d0f4f09,0xaf67e00d | |
37721 | .word 0x14a42e74,0x7d6e06da,0xfd5ec031,0x21af2f00 | |
37722 | .word 0xed6d78fa,0xc7ec13bb,0x10ac7b59,0x3eda2778 | |
37723 | .word 0x58e0052f,0x9890e1fb,0xa1127d90,0x3552e771 | |
37724 | p0_local6_sec_end: | |
37725 | ||
37726 | SECTION .share0 DATA_VA=0x00080e000 | |
37727 | ||
37728 | attr_data { | |
37729 | Name = .share0, | |
37730 | VA = 0x000000000080e000, | |
37731 | RA = 0x00000000201c0000, | |
37732 | PA = ra2pa(0x00000000201c0000,0), | |
37733 | part_0_ctx_nonzero_tsb_config_0, | |
37734 | TTE_Context=PCONTEXT, | |
37735 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37736 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37737 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37738 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37739 | } | |
37740 | ||
37741 | .data | |
37742 | .seg "data" | |
37743 | .align 0x2000 | |
37744 | .global share0_start | |
37745 | share0_begin: | |
37746 | share0_start: | |
37747 | .word 0x682b9457,0xf0aa8010,0x5272e85b,0xd9862e60 | |
37748 | .word 0x629ba907,0xc7ca88e1,0x76c4d234,0x4355bb73 | |
37749 | .word 0xac78a0bc,0xe1dc78ec,0x0b19e0ad,0x11082ecd | |
37750 | .word 0xdf0edb50,0x9b214b04,0x780bab43,0xde05daf8 | |
37751 | share0_end: | |
37752 | ||
37753 | SECTION .share1 DATA_VA=0x000810000 | |
37754 | ||
37755 | attr_data { | |
37756 | Name = .share1, | |
37757 | VA = 0x0000000000810000, | |
37758 | RA = 0x0000000020800000, | |
37759 | PA = ra2pa(0x0000000020800000,0), | |
37760 | part_0_ctx_nonzero_tsb_config_0, | |
37761 | TTE_Context=PCONTEXT, | |
37762 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37763 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37764 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37765 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37766 | } | |
37767 | ||
37768 | .data | |
37769 | .seg "data" | |
37770 | .align 0x2000 | |
37771 | .global share1_start | |
37772 | share1_begin: | |
37773 | share1_start: | |
37774 | .word 0x1d2e8470,0xefc20dda,0x10149626,0x3e6cd51a | |
37775 | .word 0xaea9a1b5,0xf84ea446,0xcc83445d,0xaa5afd38 | |
37776 | .word 0xda4e3988,0x9f4f39ef,0xd589ae48,0xd92b34f2 | |
37777 | .word 0xc32c3d85,0x9ca5e138,0xdada768b,0x0970adc2 | |
37778 | .word 0xc9567379,0x73c369c6,0xef0ab8f7,0x084a778d | |
37779 | .word 0x7a428ffc,0x69bd7e16,0xabf28e0c,0xf914af32 | |
37780 | .word 0x90d5f312,0x8436e0aa,0x459b835f,0xe49647d2 | |
37781 | .word 0x33e0d112,0xa62ac12d,0xdc73d73b,0xdfeada38 | |
37782 | share1_end: | |
37783 | ||
37784 | SECTION .share2 DATA_VA=0x000812000 | |
37785 | ||
37786 | attr_data { | |
37787 | Name = .share2, | |
37788 | VA = 0x0000000000812000, | |
37789 | RA = 0x00000000211c0000, | |
37790 | PA = ra2pa(0x00000000211c0000,0), | |
37791 | part_0_ctx_nonzero_tsb_config_0, | |
37792 | TTE_Context=PCONTEXT, | |
37793 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37794 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37795 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37796 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37797 | } | |
37798 | ||
37799 | .data | |
37800 | .seg "data" | |
37801 | .align 0x2000 | |
37802 | .global share2_start | |
37803 | share2_begin: | |
37804 | share2_start: | |
37805 | .word 0x44cf1a4c,0x6a5a67d3,0xe74b12df,0xd3f6a30f | |
37806 | .word 0xa23c2d33,0x0670c194,0xdbc8aa13,0xb554d795 | |
37807 | .word 0x69a67428,0xb878fdbf,0x2e19649c,0x6332e16c | |
37808 | .word 0x127e073c,0xab8e3c0c,0x2a5e9d08,0x7f9fb4cb | |
37809 | share2_end: | |
37810 | ||
37811 | SECTION .share3 DATA_VA=0x000814000 | |
37812 | ||
37813 | attr_data { | |
37814 | Name = .share3, | |
37815 | VA = 0x0000000000814000, | |
37816 | RA = 0x0000000021800000, | |
37817 | PA = ra2pa(0x0000000021800000,0), | |
37818 | part_0_ctx_nonzero_tsb_config_0, | |
37819 | TTE_Context=PCONTEXT, | |
37820 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, | |
37821 | TTE_Diag=0, TTE_L=0, TTE_EP=1, | |
37822 | TTE_CP=1, TTE_E=0, TTE_P=0, TTE_W=1, | |
37823 | TTE_V=1, TTE_SW0=0, TTE_SW1=0, TTE_X=0 | |
37824 | } | |
37825 | ||
37826 | .data | |
37827 | .seg "data" | |
37828 | .align 0x2000 | |
37829 | .global share3_start | |
37830 | share3_begin: | |
37831 | share3_start: | |
37832 | .word 0xefa313a3,0x7a92d757,0x559b83bf,0x268cb9fd | |
37833 | .word 0x44d6f96c,0x8a134ff2,0xce188677,0x236d55e5 | |
37834 | .word 0x6b98f967,0xc35bfb07,0xce799a76,0x65192191 | |
37835 | .word 0x6a90ecec,0x11facb09,0x984ea482,0xb102a5c9 | |
37836 | .word 0x55a51df3,0xa9f19307,0x5551e1c8,0x18daf724 | |
37837 | .word 0xe417ec15,0x23362514,0xfa047f1e,0x6f8b3b4c | |
37838 | .word 0x92eb68ff,0xd9fcf768,0x73364407,0x8c6640c8 | |
37839 | .word 0x05d46677,0x946891c9,0x7b90c206,0x1a94d81e | |
37840 | .word 0x74d6a433,0xa0b63b6b,0x5686baa9,0xfecbd8b0 | |
37841 | .word 0x674f9b26,0xbc4225eb,0xbad3ce9e,0x7f7b496a | |
37842 | .word 0x441d3e8b,0x33729b73,0xb25b912d,0xcdf04247 | |
37843 | .word 0xfc975c4c,0x03f0595e,0x2d450202,0xd5ab3beb | |
37844 | .word 0xbbca8d82,0x9ed0db31,0x8cea82c6,0x03a51d4a | |
37845 | .word 0x50194506,0x34207eb1,0x6aa26ccc,0x1991cae2 | |
37846 | .word 0x1f425a0f,0x328657eb,0x638a9490,0x6e7dd6e0 | |
37847 | .word 0x14fa2802,0x86bd960f,0x8b7bb53b,0x36eef05a | |
37848 | .word 0xf1dd11d1,0x72852788,0x0544eaad,0xd05888e3 | |
37849 | .word 0xbf2fe427,0x9b01d938,0xf843c4d1,0xaa43cb4c | |
37850 | .word 0x5530db6f,0xfc1a415c,0x05b29829,0x1f8fc1db | |
37851 | .word 0x0483f13b,0x82ba3e4f,0x7bd7e8a5,0xb247de53 | |
37852 | .word 0x57761df6,0x4ab6c98d,0x3615ecee,0xdfcc1e57 | |
37853 | .word 0x25a186e5,0xd2563089,0xbbb65629,0x95e05356 | |
37854 | .word 0x10d505cc,0x429f2497,0xb7083caf,0x1f5c37a0 | |
37855 | .word 0x3aa05c1d,0x2775f280,0x5cb6475a,0xbef286f8 | |
37856 | .word 0xedffe2ae,0x2d6e0573,0x92089695,0x2453a552 | |
37857 | .word 0xc4937579,0x27bed091,0x6a192eb1,0xb4eb225a | |
37858 | .word 0xc4c7d03a,0x4f148273,0xa3f2ba44,0xa0b61a73 | |
37859 | .word 0x551abb03,0xb46d4ee3,0xca331786,0xabe80bed | |
37860 | .word 0xfaf32a00,0x2e9e7231,0x2ed8762b,0x671cab70 | |
37861 | .word 0x992d1f3f,0xbcafe1e7,0x49c9beea,0x2eefd80d | |
37862 | .word 0x01c7c3b3,0x2fcf3e2e,0x2f954034,0x2e1ecb78 | |
37863 | .word 0xf6f87035,0x815c6355,0x7caaef96,0xce5c8f90 | |
37864 | share3_end: |