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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / niu / Indra / template / NIU_Tx / FcNiuBasicTxRand.j
CommitLineData
86530b38
AT		 1template main ();
2
3%%section c_declarations
4 int myrand ;
5%%section init
6
7 myrand = random()&0xff;
8
9#ij ifdef MT
10 IJ_bind_thread_group(th_rand,myrand);
11
12 IJ_bind_thread_group(th_all, 0xff);
13
14 IJ_bind_thread_group(th_0, 0x01);
15 IJ_bind_thread_group(th_1, 0x02);
16 IJ_bind_thread_group(th_2, 0x04);
17 IJ_bind_thread_group(th_3, 0x08);
18 IJ_bind_thread_group(th_4, 0x10);
19 IJ_bind_thread_group(th_5, 0x20);
20 IJ_bind_thread_group(th_6, 0x40);
21 IJ_bind_thread_group(th_7, 0x80);
22#ij else
23 IJ_bind_thread_group(th_all, 0x01);
24 IJ_bind_thread_group(th_A, 0x01);
25 IJ_bind_thread_group(th_B,0x01);
26#ij endif
27
28#ij ifdef TX_DMA_CH_NO
29 IJ_set_rvar(NIU_TX_DMA_CH_NO, "{0,15}");
30#ij else
31 IJ_set_rvar(NIU_TX_DMA_CH_NO, "4'h0"); /* IJ_set_rvar(NIU_TX_DMA_CH_NO, "{0..23}"); */
32#ij endif
33
34#ij ifdef TX_PKT_CNT
35 IJ_set_rvar(NIU_TX_PKT_CNT, "16'h00rr");
36#ij else
37 IJ_set_rvar(NIU_TX_PKT_CNT, "16'h0010"); /* IJ_set_rvar(NIU_TX_PKT_CNT, "16'hrrrr"); */
38#ij endif
39
40#ij ifdef TX_PKT_LEN
41 IJ_set_rvar(NIU_TX_PKT_LEN, "{64,100,1500}");
42#ij else
43 IJ_set_rvar(NIU_TX_PKT_LEN, "16'h0040");
44#ij endif
45
46#ij ifdef TX_DESC_START_ADDR
47 IJ_set_rvar(NIU_TX_DESC_START_ADDR, "64'h0000_0001_rrrr_0000");
48#ij else
49 IJ_set_rvar(NIU_TX_DESC_START_ADDR, "64'h0000_0001_0000_0000");
50#ij endif
51
52%asm{
53#define MAIN_PAGE_HV_ALSO
54
55#include "hboot.s"
56#include "niu_defines.h"
57
58.text
59.global main
60
61main:
62 ta T_CHANGE_HPRIV
63 nop
64
65
66%}
67
68 IJ_printf (th_A, "!\n");
69 IJ_printf (th_A, "! Thread 0 Start\n");
70 IJ_printf (th_A, "!\n");
71 IJ_printf (th_A, "!\n");
72 IJ_printf (th_A, "!thread_0:\n");
73
74 IJ_printf (th_A, "\nInit_flow:");
75 IJ_printf (th_A, "\n\tnop");
76 IJ_printf (th_A, "\t ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow)) -> pktGenConfig(MAC_ID, FRAME_TYPE, FRAME_CLASS, %0ll16x)\n",(IJ_get_rvar_val32(NIU_TX_PKT_LEN)));
77
78 IJ_printf (th_A, "\nP_TxDMAActivate:");
79 IJ_printf (th_A, "\n\tsetx MAC_ID, %%g1, %%o0");
80 IJ_printf (th_A, "\n\tsetx 0x%0ll16x, %%g1, %%o1", (1<<(IJ_get_rvar_val32(NIU_TX_DMA_CH_NO))));
81 IJ_printf (th_A, "\n\tcall SetTxDMAActive");
82 IJ_printf (th_A, "\n\tnop");
83 IJ_printf (th_A, "\t ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate)) -> NIU_TxDMAActivate (MAC_ID, %0ll16x)\n \n",(1<<(IJ_get_rvar_val32(NIU_TX_DMA_CH_NO))));
84 IJ_printf (th_A, "\n\tsetx XMAC0_MAX_addr, %%g7, %%g2");
85
86 IJ_printf (th_A, "\nP_AddTxChannels:");
87 IJ_printf (th_A, "\n\tnop");
88 IJ_printf (th_A, "\t ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels)) -> NIU_AddTxChannels(MAC_ID, %0ll4x)\n", (IJ_get_rvar_val32(NIU_TX_DMA_CH_NO)));
89 IJ_printf (th_A, "\tldxa [%%g2]ASI_PRIMARY_LITTLE, %%g5");
90 IJ_printf (th_A, "\n\tnop\n");
91
92 IJ_printf (th_A, "\nP_SetTxMaxBurst:");
93 IJ_printf (th_A, "\n\tsetx 0x%0ll16x, %%g1, %%o0", (IJ_get_rvar_val32(NIU_TX_DMA_CH_NO)));
94 IJ_printf (th_A, "\n\tsetx SetTxMaxBurst_Data, %%g1, %%o1");
95 IJ_printf (th_A, "\n\tcall SetTxMaxBurst");
96 IJ_printf (th_A, "\n\tnop");
97 IJ_printf (th_A, "\t ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (MAC_ID, %0ll4x, TxMaxBurst_Data)\n", (IJ_get_rvar_val32(NIU_TX_DMA_CH_NO)));
98 IJ_printf (th_A, "\tldxa [%%g2]ASI_PRIMARY_LITTLE, %%g5");
99 IJ_printf (th_A, "\n\tnop\n");
100
101 IJ_printf (th_A, "\nP_InitTxDma:");
102 IJ_printf (th_A, "\n\tsetx 0x%0ll4x, %%g1, %%o0", (IJ_get_rvar_val32(NIU_TX_DMA_CH_NO)));
103 IJ_printf (th_A, "\n\tnop");
104 IJ_printf (th_A, "\t ! $EV trig_pc_d(1, @VA(.MAIN.P_InitTxDma)) -> NIU_InitTxDma (MAC_ID, %0ll4x, NIU_Xlate_On)\n", (IJ_get_rvar_val32(NIU_TX_DMA_CH_NO)));
105 IJ_printf (th_A, "\tcall InitTxDma");
106 IJ_printf (th_A, "\n\tnop");
107 IJ_printf (th_A, "\n\tldxa [%%g2]ASI_PRIMARY_LITTLE, %%g5");
108 IJ_printf (th_A, "\n\tnop\n");
109
110 IJ_printf (th_A, "\nGen_Packet:\n");
111 IJ_printf (th_A, "\tnop");
112 IJ_printf (th_A, "\t ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet)) -> TxPktGen(MAC_ID, %0ll4x, 0x%0ll8x,0,0)\n", (IJ_get_rvar_val32(NIU_TX_DMA_CH_NO)), (IJ_get_rvar_val32(NIU_TX_PKT_CNT)));
113 IJ_printf (th_A, "\tnop\n\n");
114
115%asm{
116 setx 0x5, %g1, %g4
117delay_loop_tmp:
118 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
119 nop
120 nop
121 nop
122 nop
123 dec %g4
124 brnz %g4, delay_loop_tmp
125 nop
126%}
127
128 IJ_printf (th_A, "\nSetTxRingKick:");
129 IJ_printf (th_A, "\n\tsetx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %%g1, %%g2");
130 IJ_printf (th_A, "\t ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick)) -> NIU_SetTxRingKick(MAC_ID, %0ll4x)\n", (IJ_get_rvar_val32(NIU_TX_DMA_CH_NO)));
131 IJ_printf (th_A, "\tsetx 0x%0ll4x, %%g1, %%o0", (IJ_get_rvar_val32(NIU_TX_DMA_CH_NO)));
132 IJ_printf (th_A, "\n\tldx [%%g2] , %%g3");
133 IJ_printf (th_A, "\n\tnop");
134 IJ_printf (th_A, "\n\tmulx %%o0, 0x200, %%g5");
135 IJ_printf (th_A, "\n\tsetx TX_RING_KICK_Addr, %%g1, %%g2");
136 IJ_printf (th_A, "\n\tadd %%g2, %%g5, %%g2");
137 IJ_printf (th_A, "\n\tstxa %%g3, [%%g2]ASI_PRIMARY_LITTLE");
138 IJ_printf (th_A, "\n\tnop\n");
139
140 IJ_printf (th_A, "\nSetTxCs:");
141 IJ_printf (th_A, "\n\tsetx 0x%0ll4x, %%g1, %%o0", (IJ_get_rvar_val32(NIU_TX_DMA_CH_NO)));
142 IJ_printf (th_A, "\n\tsetx TX_CS_Data, %%g1, %%g3");
143 IJ_printf (th_A, "\n\tmulx %%o0, 0x200, %%g5");
144 IJ_printf (th_A, "\n\tsetx TX_CS_Addr, %%g1, %%g2");
145 IJ_printf (th_A, "\n\tadd %%g2, %%g5, %%g2");
146 IJ_printf (th_A, "\n\tstxa %%g3, [%%g2]ASI_PRIMARY_LITTLE");
147 IJ_printf (th_A, "\n\tnop\n\n");
148
149
150%asm{
151#ifdef JUMBO_FRAME_EN
152 setx loop_count, %g1, %g4
153delay_loop:
154 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
155 nop
156 nop
157 nop
158 nop
159 dec %g4
160 brnz %g4, delay_loop
161 nop
162#endif
163
164%}
165 IJ_printf (th_A, "\nNIUTx_Pkt_Cnt_Chk:");
166 IJ_printf (th_A, "\n\tsetx MAC_ID, %%g1, %%o0");
167 IJ_printf (th_A, "\n\tsetx 0x%0ll4x, %%g1, %%o1", (IJ_get_rvar_val32(NIU_TX_PKT_CNT)));
168 IJ_printf (th_A, "\n\tcall NiuTx_check_pkt_cnt");
169 IJ_printf (th_A, "\n\tnop\n\n");
170
171%asm{
172 setx loop_count, %g1, %g4
173delay_loop_end:
174 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
175 nop
176 nop
177 nop
178 nop
179 dec %g4
180 brnz %g4, delay_loop_end
181 nop
182%}
183%% !section init
184
185%%section finish
186
187 IJ_printf (th_A, "\ntest_passed:");
188 IJ_printf (th_A, "\n\tnop");
189 IJ_printf (th_A, "\t ! $EV trig_pc_d(1, @VA(.MAIN.test_passed)) -> NIU_EXIT_chk(MAC_ID)\n");
190
191%asm{
192 EXIT_GOOD
193
194%}
195
196 IJ_printf (th_A, "\n/************************************************************************");
197 IJ_printf (th_A, "\n Test case data start");
198 IJ_printf (th_A, "\n************************************************************************/\n");
199
200
201%asm{
202SECTION SetRngConfig_init data_va=0x100000000
203attr_data {
204 Name = SetRngConfig_init,
205 hypervisor,
206 compressimage
207 }
208.data
209SetRngConfig_init:
210 .xword 0x0060452301000484
211
212SECTION SetTxRingKick_init data_va=0x100000100
213attr_data {
214 Name = SetTxRingKick_init,
215 hypervisor,
216 compressimage
217 }
218.data
219SetTxRingKick_init:
220 .xword 0x0060452301000484
221
222SECTION SetTxLPMask1_init data_va=0x100000200
223attr_data {
224 Name = SetTxLPMask1_init,
225 hypervisor,
226 compressimage
227 }
228.data
229SetTxLPMask1_init:
230 .xword 0x0060452301000484
231
232SECTION SetTxLPValue1_init data_va=0x100000300
233attr_data {
234 Name = SetTxLPValue1_init,
235 hypervisor,
236 compressimage
237 }
238.data
239SetTxLPValue1_init:
240 .xword 0x0060452301000484
241
242SECTION SetTxLPRELOC1_init data_va=0x100000400
243attr_data {
244 Name = SetTxLPRELOC1_init,
245 hypervisor,
246 compressimage
247 }
248.data
249SetTxLPRELOC1_init:
250 .xword 0x0060452301000484
251SECTION SetTxLPMask2_init data_va=0x100000500
252attr_data {
253 Name = SetTxLPMask2_init,
254 hypervisor,
255 compressimage
256 }
257.data
258SetTxLPMask2_init:
259 .xword 0x0060452301000484
260SECTION SetTxLPValue2_init data_va=0x100000600
261attr_data {
262 Name = SetTxLPValue2_init,
263 hypervisor,
264 compressimage
265 }
266.data
267SetTxLPValue2_init:
268 .xword 0x0060452301000484
269
270SECTION SetTxLPRELOC2_init data_va=0x100000700
271attr_data {
272 Name = SetTxLPRELOC2_init,
273 hypervisor,
274 compressimage
275 }
276.data
277SetTxLPRELOC2_init:
278 .xword 0x0060452301000484
279
280SECTION SetTxLPValid_init data_va=0x100000800
281attr_data {
282 Name = SetTxLPValid_init,
283 hypervisor,
284 compressimage
285 }
286.data
287SetTxLPValid_init:
288 .xword 0x0060452301000484
289
290
291%}
292%% !section finish
293
294%%section null_grammar
295
296endtemplate
Full OpenSPARC design & verification tarball including full HDL.