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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / niu / NIU_Tx_Rx / FcNiuBasicTxRx.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: FcNiuBasicTxRx.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_HV_ALSO
39
40#include "hboot.s"
41#include "niu_defines.h"
42
43/************************************************************************
44 Test case code start
45 ************************************************************************/
46.text
47.global main
48
49main:
50 ta T_CHANGE_HPRIV
51 nop
52
53 mov 0x1, %g4
54
55 ta T_RD_THID
56 nop
57 cmp %g4, %o1 ! Check if its thread1
58 be thread_1 !
59 nop
60 brz %o1, thread_Tx ! Execute thread_0
61 nop
62 cmp %g4, %o1 ! Send the remaining threads to good-end, if any.
63 bne test_passed !
64 nop
65
66!
67! Thread 0 Start
68!
69!
70thread_Tx:
71!#include "niu_init.h"
72!thread_0:
73 nop
74 wr %g0, ASI_CMP_CORE, %asi
75 mov 0x2, %g4
76 stxa %g4, [ASI_CMP_CORE_RUNNING_W1S]%asi ! Start Thread_1
77 nop
78
79Init_flow:
80 nop ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow)) -> pktGenConfig(MAC_ID, FRAME_TYPE, FRAME_CLASS, TX_PKT_LEN)
81
82P_TxDMAActivate:
83 setx MAC_ID, %g1, %o0 ! 1st Parameter
84 setx SetTxDMAActive_list, %g1, %o1 ! 2st parameter
85 call SetTxDMAActive
86 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate)) -> NIU_TxDMAActivate (MAC_ID, TxDmaActive_list)
87
88P_AddTxChannels :
89 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels)) -> NIU_AddTxChannels(MAC_ID, NIU_TxDmaNoUE)
90
91 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
92 nop
93
94P_SetTxMaxBurst :
95 setx NIU_TxDmaNo, %g1, %o0 ! 1st parameter :
96 setx SetTxMaxBurst_Data, %g1, %o1 ! 2nd parameter
97 call SetTxMaxBurst
98 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (MAC_ID, NIU_TxDmaNoUE, TxMaxBurst_Data)
99
100 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
101 nop
102
103P_InitTxDma:
104 setx NIU_TxDmaNo, %g1, %o0 ! 1st parameter :
105 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_InitTxDma)) -> NIU_InitTxDma (MAC_ID, NIU_TxDmaNoUE, NIU_Xlate_On)
106 call InitTxDma
107 nop
108
109 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
110 nop
111
112Gen_Packet:
113 nop ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet)) -> TxPktGen(MAC_ID, NIU_TxDmaNoUE,NIU_TX_PKT_CNT,0,0)
114 nop
115
116 setx 0x5, %g1, %g4
117delay_loop_tmp:
118 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
119 nop
120 nop
121 nop
122 nop
123 dec %g4
124 brnz %g4, delay_loop_tmp
125 nop
126
127
128SetTxRingKick:
129 setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick)) -> NIU_SetTxRingKick(MAC_ID, NIU_TxDmaNoUE)
130 setx NIU_TxDmaNo, %g1, %o0
131 ldx [%g2] , %g3
132 nop
133 mulx %o0, 0x200, %g5
134 setx TX_RING_KICK_Addr, %g1, %g2
135 add %g2, %g5, %g2
136 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
137 nop
138
139SetTxCs :
140 setx NIU_TxDmaNo, %g1, %o0
141 setx TX_CS_Data, %g1, %g3
142 mulx %o0, 0x200, %g5
143 setx TX_CS_Addr, %g1, %g2
144 add %g2, %g5, %g2
145 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
146 nop
147
148
149#ifdef JUMBO_FRAME_EN /* Extra Delay for Jumbo packets to go out */
150 setx loop_count, %g1, %g4
151delay_loop:
152 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
153 nop
154 nop
155 nop
156 nop
157 dec %g4
158 brnz %g4, delay_loop
159 nop
160#endif
161
162NIUTx_Pkt_Cnt_Chk:
163 setx MAC_ID, %g1, %o0
164 setx NIU_TX_PKT_CNT, %g1, %o1
165 call NiuTx_check_pkt_cnt
166 nop
167
168 setx loop_count, %g1, %g4
169delay_loop_end:
170 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
171 nop
172 nop
173 nop
174 nop
175 dec %g4
176 brnz %g4, delay_loop_end
177 nop
178
179test_passed_tx:
180 nop ! $EV trig_pc_d(1, @VA(.MAIN.test_passed_tx)) -> NIU_EXIT_chk(MAC_ID)
181 EXIT_GOOD
182
183!.global test_failed
184!test_failed:
185! nop
186! EXIT_BAD
187
188
189!
190! Thread 1 Start
191!
192!
193thread_1:
194
195/************************************************************************
196 First call the Vera, so that values are updated in Memory and
197 then read those values from assembly and program the registers
198 ************************************************************************/
199P_NIU_RxInitDma:
200 nop !$EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma)) -> NIU_InitRxDma(RXDMA_CHNL, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA_UE, RX_INITIAL_KICK, NIU_Xlate_On, RX_NIU_MULTI_DMA)
201
202 setx 0x5, %g1, %g4 ! Delay for Vera to complete
203delay_loop_Rx:
204 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
205 nop
206 nop
207 nop
208 nop
209 dec %g4
210 brnz %g4, delay_loop_Rx
211 nop
212
213 nop
214 setx RXDMA_CHNL, %g1, %o0
215 setx RX_DESC_RING_LENGTH, %g1, %o1
216 setx RX_COMPL_RING_LEN, %g1, %o2
217 setx RBR_CONFIG_B_DATA, %g1, %o3
218 setx RX_INITIAL_KICK, %g1, %o4
219 call NiuInitRxDma
220 nop
221
222P_NIU_RxPkt_Conf:
223 nop !$EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxPkt_Conf)) -> NIU_RxPktConf(RXMAC_PKTCNT, MAC_ID)
224 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for Delay
225 nop
226
227
228 setx 0x5, %g1, %g4
229delay_loop_b4_pktgen:
230 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
231 nop
232 nop
233 nop
234 nop
235 dec %g4
236 brnz %g4, delay_loop_b4_pktgen
237 nop
238
239P_NIU_Rx_GenPkt:
240 setx RXMAC_PKTCNT, %g1, %g6 ! Packet count
241 nop
242Rx_pktcnt_loop:
243 nop !$EV trig_pc_d(1, @VA(.MAIN.Rx_pktcnt_loop)) -> NIU_RxGenPkt(MAC_ID, RXDMA_CHNL, 1, MAC_PKT_LEN,0x0, RX_NIU_MULTI_DMA, 1)
244 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! just for delay
245 nop
246 dec %g6
247 brnz %g6, Rx_pktcnt_loop
248 nop
249
250 setx loop_count, %g1, %g4
251delay_loop:
252 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
253 nop
254 nop
255 nop
256 nop
257 dec %g4
258 brnz %g4, delay_loop
259 nop
260
261
262test_passed:
263 nop
264 EXIT_GOOD
265
266
267/************************************************************************/
268
269SECTION SetRxLogMask1_init data_va=0x200000100
270attr_data {
271 Name = SetRxLogMask1_init,
272 hypervisor,
273 compressimage
274 }
275.data
276SetRxLogMask1_init:
277 .xword 0x0060452301000484
278/************************************************************************/
279
280SECTION SetRxLogVal1_init data_va=0x200000200
281attr_data {
282 Name = SetRxLogVal1_init,
283 hypervisor,
284 compressimage
285 }
286.data
287SetRxLogVal1_init:
288 .xword 0x0060452301000484
289/************************************************************************/
290
291SECTION SetRxLogRelo1_init data_va=0x200000300
292attr_data {
293 Name = SetRxLogRelo1_init,
294 hypervisor,
295 compressimage
296 }
297.data
298SetRxLogRelo1_init:
299 .xword 0x0060452301000484
300/************************************************************************/
301
302SECTION SetRxLogPgVld_init data_va=0x200000400
303attr_data {
304 Name = SetRxLogPgVld_init,
305 hypervisor,
306 compressimage
307 }
308.data
309SetRxLogPgVld_init:
310 .xword 0x0060452301000484
311/************************************************************************/
312SECTION SetRbrConfig_A_init data_va=0x200000500
313attr_data {
314 Name = SetRbrConfig_A_init,
315 hypervisor,
316 compressimage
317 }
318.data
319SetRbrConfig_A_init:
320 .xword 0x0060452301000484
321/************************************************************************/
322SECTION SetRbrConfig_B_init data_va=0x200000600
323attr_data {
324 Name = SetRbrConfig_B_init,
325 hypervisor,
326 compressimage
327 }
328.data
329SetRbrConfig_B_init:
330 .xword 0x0060452301000484
331/************************************************************************/
332SECTION SetRcrConfig_A_init data_va=0x200000700
333attr_data {
334 Name = SetRcrConfig_A_init,
335 hypervisor,
336 compressimage
337 }
338.data
339SetRcrConfig_A_init:
340 .xword 0x0060452301000484
341/************************************************************************/
342SECTION SetRxDmaCfig_1_0_init data_va=0x200000800
343attr_data {
344 Name = SetRxDmaCfig_1_0_init,
345 hypervisor,
346 compressimage
347 }
348.data
349SetRxDmaCfig_1_0_init:
350 .xword 0x0060452301000484
351/************************************************************************/
352SECTION SetRxdmaCfig2Start_init data_va=0x200000900
353attr_data {
354 Name = SetRxdmaCfig2Start_init,
355 hypervisor,
356 compressimage
357 }
358.data
359SetRxdmaCfig2Start_init:
360 .xword 0x0060452301000484
361/************************************************************************/
362SECTION SetRxDmaCfig_1_1_init data_va=0x200000a00
363attr_data {
364 Name = SetRxDmaCfig_1_1_init,
365 hypervisor,
366 compressimage
367 }
368.data
369SetRxDmaCfig_1_1_init:
370 .xword 0x0060452301000484
371
372/************************************************************************/
373
374SECTION SetRxRingKick_init data_va=0x200000b00
375attr_data {
376 Name = SetRxRingKick_init,
377 hypervisor,
378 compressimage
379 }
380.data
381SetRxRingKick_init:
382 .xword 0x0060452301000484
383/************************************************************************/
384
385SECTION SetRxLogMask2_init data_va=0x200000c00
386attr_data {
387 Name = SetRxLogMask2_init,
388 hypervisor,
389 compressimage
390 }
391.data
392SetRxLogMask2_init:
393 .xword 0x0060452301000484
394/************************************************************************/
395
396SECTION SetRxLogVal2_init data_va=0x200000d00
397attr_data {
398 Name = SetRxLogVal2_init,
399 hypervisor,
400 compressimage
401 }
402.data
403SetRxLogVal2_init:
404 .xword 0x0060452301000484
405/************************************************************************/
406
407SECTION SetRxLogRelo2_init data_va=0x200000e00
408attr_data {
409 Name = SetRxLogRelo2_init,
410 hypervisor,
411 compressimage
412 }
413.data
414SetRxLogRelo2_init:
415 .xword 0x0060452301000484
416
417/************************************************************************/
418
419/************************************************************************
420 Test case data start
421 ************************************************************************/
422/* These initialization is temporary, as there looks some bug in mempli */
423
424SECTION SetRngConfig_init data_va=0x100000000
425attr_data {
426 Name = SetRngConfig_init,
427 hypervisor,
428 compressimage
429 }
430.data
431SetRngConfig_init:
432 .xword 0x0060452301000484
433/************************************************************************/
434
435SECTION SetTxRingKick_init data_va=0x100000100
436attr_data {
437 Name = SetTxRingKick_init,
438 hypervisor,
439 compressimage
440 }
441.data
442SetTxRingKick_init:
443 .xword 0x0060452301000484
444/************************************************************************/
445
446SECTION SetTxLPMask1_init data_va=0x100000200
447attr_data {
448 Name = SetTxLPMask1_init,
449 hypervisor,
450 compressimage
451 }
452.data
453SetTxLPMask1_init:
454 .xword 0x0060452301000484
455/************************************************************************/
456
457SECTION SetTxLPValue1_init data_va=0x100000300
458attr_data {
459 Name = SetTxLPValue1_init,
460 hypervisor,
461 compressimage
462 }
463.data
464SetTxLPValue1_init:
465 .xword 0x0060452301000484
466/************************************************************************/
467
468SECTION SetTxLPRELOC1_init data_va=0x100000400
469attr_data {
470 Name = SetTxLPRELOC1_init,
471 hypervisor,
472 compressimage
473 }
474.data
475SetTxLPRELOC1_init:
476 .xword 0x0060452301000484
477/************************************************************************/
478SECTION SetTxLPMask2_init data_va=0x100000500
479attr_data {
480 Name = SetTxLPMask2_init,
481 hypervisor,
482 compressimage
483 }
484.data
485SetTxLPMask2_init:
486 .xword 0x0060452301000484
487/************************************************************************/
488SECTION SetTxLPValue2_init data_va=0x100000600
489attr_data {
490 Name = SetTxLPValue2_init,
491 hypervisor,
492 compressimage
493 }
494.data
495SetTxLPValue2_init:
496 .xword 0x0060452301000484
497
498/************************************************************************/
499SECTION SetTxLPRELOC2_init data_va=0x100000700
500attr_data {
501 Name = SetTxLPRELOC2_init,
502 hypervisor,
503 compressimage
504 }
505.data
506SetTxLPRELOC2_init:
507 .xword 0x0060452301000484
508
509/************************************************************************/
510SECTION SetTxLPValid_init data_va=0x100000800
511attr_data {
512 Name = SetTxLPValid_init,
513 hypervisor,
514 compressimage
515 }
516.data
517SetTxLPValid_init:
518 .xword 0x0060452301000484
519
520/************************************************************************/
521
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