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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: FcNiuBasicTxRx_MULTI_1DMA_Rx64_Tx64.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define MAIN_PAGE_HV_ALSO | |
39 | ||
40 | #include "hboot.s" | |
41 | #include "niu_defines.h" | |
42 | #define TX_FAIR_PKT_CNT (NIU_TX_PKT_CNT / 2) | |
43 | #define FAIR_PKT_COUNT ((RXMAC_PKTCNT) - (RXMAC_PKTCNT%8)) | |
44 | ||
45 | /************************************************************************ | |
46 | Test case code start | |
47 | ************************************************************************/ | |
48 | .text | |
49 | .global main | |
50 | ||
51 | main: | |
52 | ta T_CHANGE_HPRIV | |
53 | nop | |
54 | ||
55 | mov 0x1, %g4 | |
56 | ||
57 | ta T_RD_THID | |
58 | nop | |
59 | cmp %g4, %o1 ! Check if its thread1 | |
60 | be thread_1 ! | |
61 | nop | |
62 | brz %o1, thread_Tx ! Execute thread_0 | |
63 | nop | |
64 | cmp %g4, %o1 ! Send the remaining threads to good-end, if any. | |
65 | bne RX_test_passed ! | |
66 | nop | |
67 | ||
68 | ! | |
69 | ! Thread 0 Start | |
70 | ! | |
71 | ! | |
72 | thread_Tx: | |
73 | !#include "niu_init.h" | |
74 | !thread_0: | |
75 | nop | |
76 | wr %g0, ASI_CMP_CORE, %asi | |
77 | mov 0x2, %g4 | |
78 | stxa %g4, [ASI_CMP_CORE_RUNNING_W1S]%asi ! Start Thread_1 | |
79 | nop | |
80 | ||
81 | Init_flow: | |
82 | nop ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow)) -> pktGenConfig(MAC_ID, FRAME_TYPE, FRAME_CLASS, NIU_TX_PKT_LEN_P0, NIU_TX_MULTI_PORT, NIU_TX_PKT_LEN_P1) | |
83 | ||
84 | P_TxDMAActivate: | |
85 | setx MAC_ID, %g1, %o0 ! 1st Parameter | |
86 | setx SetTxDMAActive_list, %g1, %o1 ! 2st parameter | |
87 | setx NIU_TX_MULTI_PORT, %g1, %o2 | |
88 | setx NIU_TX_MULTI_DMA_P0, %g1, %o3 | |
89 | setx NIU_TX_MULTI_DMA_P1, %g1, %o4 | |
90 | call SetTxDMAActive | |
91 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate)) -> NIU_TxDMAActivate (MAC_ID, TxDmaActive_list, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) | |
92 | ||
93 | P_AddTxChannels : | |
94 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels)) -> NIU_AddTxChannels(MAC_ID, NIU_TxDmaNoUE, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) | |
95 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay | |
96 | nop | |
97 | ||
98 | P_SetTxMaxBurst : | |
99 | setx NIU_TxDmaNo, %g1, %o0 ! 1st parameter : | |
100 | setx SetTxMaxBurst_Data, %g1, %o1 ! 2nd parameter | |
101 | setx NIU_TX_MULTI_PORT, %g1, %o2 | |
102 | setx NIU_TX_MULTI_DMA_P0, %g1, %o3 | |
103 | setx NIU_TX_MULTI_DMA_P1, %g1, %o4 | |
104 | call SetTxMaxBurst | |
105 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (MAC_ID, NIU_TxDmaNoUE, TxMaxBurst_Data, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) | |
106 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay | |
107 | nop | |
108 | ||
109 | nop | |
110 | setx NIU_TX_MULTI_PORT, %g1, %o2 | |
111 | setx NIU_TX_MULTI_DMA_P0, %g1, %o3 | |
112 | setx NIU_TX_MULTI_DMA_P1, %g1, %o4 | |
113 | call InitTxDma | |
114 | nop | |
115 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay | |
116 | nop | |
117 | ||
118 | Gen_Packet: | |
119 | nop ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet)) -> TxPktGen(MAC_ID, NIU_TxDmaNoUE,NIU_TX_PKT_CNT, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) | |
120 | nop | |
121 | ||
122 | setx 0x50, %g1, %g4 | |
123 | delay_loop_tmp: | |
124 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 | |
125 | nop | |
126 | nop | |
127 | nop | |
128 | nop | |
129 | dec %g4 | |
130 | brnz %g4, delay_loop_tmp | |
131 | nop | |
132 | ||
133 | SetTxRingKick_0: | |
134 | setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick_0)) -> NIU_SetTxRingKick(0, 0, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) | |
135 | setx 0x0, %g1, %o0 | |
136 | ldx [%g2] , %g3 | |
137 | nop | |
138 | mulx %o0, 0x200, %g5 | |
139 | setx TX_RING_KICK_Addr, %g1, %g2 | |
140 | add %g2, %g5, %g2 | |
141 | setx 0x800, %g1, %g3 | |
142 | stxa %g3, [%g2]ASI_PRIMARY_LITTLE | |
143 | nop | |
144 | ||
145 | SetTxCs_0 : | |
146 | setx 0x0, %g1, %o0 | |
147 | setx TX_CS_Data, %g1, %g3 | |
148 | mulx %o0, 0x200, %g5 | |
149 | setx TX_CS_Addr, %g1, %g2 | |
150 | add %g2, %g5, %g2 | |
151 | stxa %g3, [%g2]ASI_PRIMARY_LITTLE | |
152 | nop | |
153 | ||
154 | SetTxRingKick_1: | |
155 | setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick_1)) -> NIU_SetTxRingKick(1, 8, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) | |
156 | setx 0x8, %g1, %o0 | |
157 | ldx [%g2] , %g3 | |
158 | nop | |
159 | mulx %o0, 0x200, %g5 | |
160 | setx TX_RING_KICK_Addr, %g1, %g2 | |
161 | add %g2, %g5, %g2 | |
162 | setx 0x800, %g1, %g3 | |
163 | stxa %g3, [%g2]ASI_PRIMARY_LITTLE | |
164 | nop | |
165 | ||
166 | SetTxCs_1 : | |
167 | setx 0x8, %g1, %o0 | |
168 | setx TX_CS_Data, %g1, %g3 | |
169 | mulx %o0, 0x200, %g5 | |
170 | setx TX_CS_Addr, %g1, %g2 | |
171 | add %g2, %g5, %g2 | |
172 | stxa %g3, [%g2]ASI_PRIMARY_LITTLE | |
173 | nop | |
174 | ||
175 | ||
176 | #ifdef JUMBO_FRAME_EN /* Extra Delay for Jumbo packets to go out */ | |
177 | setx loop_count, %g1, %g4 | |
178 | delay_loop: | |
179 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 | |
180 | nop | |
181 | nop | |
182 | nop | |
183 | nop | |
184 | dec %g4 | |
185 | brnz %g4, delay_loop | |
186 | nop | |
187 | #endif | |
188 | ||
189 | NIUTx_Pkt_Cnt_Chk_P0: | |
190 | setx 0x0, %g1, %o0 ! MAC PORT | |
191 | ! setx 0x8, %g1, %o1 ! PKT CNT | |
192 | setx TX_FAIR_PKT_CNT, %g1, %o1 ! PKT CNT | |
193 | call NiuTx_check_pkt_cnt | |
194 | nop | |
195 | ||
196 | setx loop_count, %g1, %g4 | |
197 | delay_loop_end_p0: | |
198 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 | |
199 | nop | |
200 | nop | |
201 | nop | |
202 | nop | |
203 | dec %g4 | |
204 | brnz %g4, delay_loop_end_p0 | |
205 | nop | |
206 | ||
207 | NIUTx_Pkt_Cnt_Chk_P1: | |
208 | setx 0x1, %g1, %o0 ! MAC PORT | |
209 | ! setx 0x8, %g1, %o1 ! PKT CNT | |
210 | setx TX_FAIR_PKT_CNT, %g1, %o1 ! PKT CNT | |
211 | call NiuTx_check_pkt_cnt | |
212 | nop | |
213 | ||
214 | setx loop_count, %g1, %g4 | |
215 | delay_loop_end_p1: | |
216 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 | |
217 | nop | |
218 | nop | |
219 | nop | |
220 | nop | |
221 | dec %g4 | |
222 | brnz %g4, delay_loop_end_p1 | |
223 | nop | |
224 | ||
225 | TX_test_passed: | |
226 | nop ! $EV trig_pc_d(1, @VA(.MAIN.TX_test_passed)) -> NIU_EXIT_chk(0) | |
227 | nop ! $EV trig_pc_d(1, @VA(.MAIN.TX_test_passed)) -> NIU_EXIT_chk(1) | |
228 | EXIT_GOOD | |
229 | ||
230 | !.global test_failed | |
231 | !test_failed: | |
232 | ! nop | |
233 | ! EXIT_BAD | |
234 | ||
235 | ||
236 | ! | |
237 | ! Thread 1 Start | |
238 | ! | |
239 | ! | |
240 | thread_1: | |
241 | ||
242 | /************************************************************************ | |
243 | NIU RX Template Port 0 ---> DMA 0 | |
244 | Port 1 ---> DMA 1 | |
245 | ************************************************************************/ | |
246 | ||
247 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ | |
248 | ! Init DMA Channel 0 @@@@@@@@@@@@@@@@@@@@@@@@@@@@ | |
249 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ | |
250 | ||
251 | P_NIU_RxInitDma_0: | |
252 | setx TX_CS, %g1, %g2 | |
253 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_0)) -> NIU_InitRxDma(0, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA) | |
254 | setx 0x5, %g1, %g4 | |
255 | delay_loop_Rx_0: | |
256 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 | |
257 | nop | |
258 | nop | |
259 | nop | |
260 | nop | |
261 | dec %g4 | |
262 | brnz %g4, delay_loop_Rx_0 | |
263 | nop | |
264 | ||
265 | nop | |
266 | setx 0x0, %g1, %o0 | |
267 | setx 0x0, %g1, %o1 | |
268 | setx RX_DESC_RING_LENGTH, %g1, %o2 | |
269 | setx RX_COMPL_RING_LEN, %g1, %o3 | |
270 | setx RBR_CONFIG_B_DATA, %g1, %o4 | |
271 | setx RX_INITIAL_KICK, %g1, %o5 | |
272 | call NiuInitRxDma | |
273 | nop | |
274 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ | |
275 | ! Init DMA Channel 1 @@@@@@@@@@@@@@@@@@@@@@@@@@@@ | |
276 | !@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ | |
277 | ||
278 | P_NIU_RxInitDma_1: | |
279 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_1)) -> NIU_InitRxDma(1, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA) | |
280 | setx 0x5, %g1, %g4 | |
281 | delay_loop_Rx_1: | |
282 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 | |
283 | nop | |
284 | nop | |
285 | nop | |
286 | nop | |
287 | dec %g4 | |
288 | brnz %g4, delay_loop_Rx_1 | |
289 | nop | |
290 | ||
291 | nop | |
292 | setx 0x1, %g1, %o0 | |
293 | setx RX_DESC_RING_LENGTH, %g1, %o2 | |
294 | setx RX_COMPL_RING_LEN, %g1, %o3 | |
295 | setx RBR_CONFIG_B_DATA, %g1, %o4 | |
296 | setx RX_INITIAL_KICK, %g1, %o5 | |
297 | setx NIU_RX_MULTI_DMA, %g1, %o6 | |
298 | call NiuInitRxDma | |
299 | nop | |
300 | P0_NIU_RxPkt_Conf: | |
301 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P0_NIU_RxPkt_Conf)) -> NIU_RxPktConf(RXMAC_PKTCNT,0) | |
302 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 | |
303 | nop | |
304 | P1_NIU_RxPkt_Conf: | |
305 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P1_NIU_RxPkt_Conf)) -> NIU_RxPktConf(RXMAC_PKTCNT,1) | |
306 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 | |
307 | nop | |
308 | P_NIU_Rx_GenPkt: | |
309 | setx RXMAC_PKTCNT, %g1, %g6 | |
310 | nop | |
311 | Rx_pktcnt_loop: | |
312 | nop ! $EV trig_pc_d(1, @VA(.MAIN.Rx_pktcnt_loop)) -> NIU_RxGenPkt(MAC_ID, 0, RXMAC_PKTCNT, 0x40,0x1, NIU_RX_MULTI_DMA, 1) | |
313 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 | |
314 | nop | |
315 | nop | |
316 | nop | |
317 | nop | |
318 | ||
319 | delay_loop0: | |
320 | mulx %o1, 0x200, %g4 | |
321 | setx RCR_STAT_A, %g7, %g2 | |
322 | add %g2, %g4, %g2 | |
323 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g4 | |
324 | ||
325 | mulx %o0, 0x200, %g5 | |
326 | setx RCR_STAT_A, %g7, %g2 | |
327 | add %g2, %g5, %g2 | |
328 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 | |
329 | ||
330 | add %g5, %g4, %g5 | |
331 | cmp %g5, FAIR_PKT_COUNT | |
332 | bne delay_loop0 | |
333 | nop | |
334 | ||
335 | ||
336 | RX_test_passed: | |
337 | nop | |
338 | EXIT_GOOD | |
339 | ||
340 | ||
341 | /************************************************************************/ | |
342 | ||
343 | SECTION SetRxLogMask1_init data_va=0x200000100 | |
344 | attr_data { | |
345 | Name = SetRxLogMask1_init, | |
346 | hypervisor, | |
347 | compressimage | |
348 | } | |
349 | .data | |
350 | SetRxLogMask1_init: | |
351 | .xword 0x0060452301000484 | |
352 | /************************************************************************/ | |
353 | ||
354 | SECTION SetRxLogVal1_init data_va=0x200000200 | |
355 | attr_data { | |
356 | Name = SetRxLogVal1_init, | |
357 | hypervisor, | |
358 | compressimage | |
359 | } | |
360 | .data | |
361 | SetRxLogVal1_init: | |
362 | .xword 0x0060452301000484 | |
363 | /************************************************************************/ | |
364 | ||
365 | SECTION SetRxLogRelo1_init data_va=0x200000300 | |
366 | attr_data { | |
367 | Name = SetRxLogRelo1_init, | |
368 | hypervisor, | |
369 | compressimage | |
370 | } | |
371 | .data | |
372 | SetRxLogRelo1_init: | |
373 | .xword 0x0060452301000484 | |
374 | /************************************************************************/ | |
375 | ||
376 | SECTION SetRxLogPgVld_init data_va=0x200000400 | |
377 | attr_data { | |
378 | Name = SetRxLogPgVld_init, | |
379 | hypervisor, | |
380 | compressimage | |
381 | } | |
382 | .data | |
383 | SetRxLogPgVld_init: | |
384 | .xword 0x0060452301000484 | |
385 | /************************************************************************/ | |
386 | SECTION SetRbrConfig_A_init data_va=0x200000500 | |
387 | attr_data { | |
388 | Name = SetRbrConfig_A_init, | |
389 | hypervisor, | |
390 | compressimage | |
391 | } | |
392 | .data | |
393 | SetRbrConfig_A_init: | |
394 | .xword 0x0060452301000484 | |
395 | /************************************************************************/ | |
396 | SECTION SetRbrConfig_B_init data_va=0x200000600 | |
397 | attr_data { | |
398 | Name = SetRbrConfig_B_init, | |
399 | hypervisor, | |
400 | compressimage | |
401 | } | |
402 | .data | |
403 | SetRbrConfig_B_init: | |
404 | .xword 0x0060452301000484 | |
405 | /************************************************************************/ | |
406 | SECTION SetRcrConfig_A_init data_va=0x200000700 | |
407 | attr_data { | |
408 | Name = SetRcrConfig_A_init, | |
409 | hypervisor, | |
410 | compressimage | |
411 | } | |
412 | .data | |
413 | SetRcrConfig_A_init: | |
414 | .xword 0x0060452301000484 | |
415 | /************************************************************************/ | |
416 | SECTION SetRxDmaCfig_1_0_init data_va=0x200000800 | |
417 | attr_data { | |
418 | Name = SetRxDmaCfig_1_0_init, | |
419 | hypervisor, | |
420 | compressimage | |
421 | } | |
422 | .data | |
423 | SetRxDmaCfig_1_0_init: | |
424 | .xword 0x0060452301000484 | |
425 | /************************************************************************/ | |
426 | SECTION SetRxdmaCfig2Start_init data_va=0x200000900 | |
427 | attr_data { | |
428 | Name = SetRxdmaCfig2Start_init, | |
429 | hypervisor, | |
430 | compressimage | |
431 | } | |
432 | .data | |
433 | SetRxdmaCfig2Start_init: | |
434 | .xword 0x0060452301000484 | |
435 | /************************************************************************/ | |
436 | SECTION SetRxDmaCfig_1_1_init data_va=0x200000a00 | |
437 | attr_data { | |
438 | Name = SetRxDmaCfig_1_1_init, | |
439 | hypervisor, | |
440 | compressimage | |
441 | } | |
442 | .data | |
443 | SetRxDmaCfig_1_1_init: | |
444 | .xword 0x0060452301000484 | |
445 | ||
446 | /************************************************************************/ | |
447 | ||
448 | SECTION SetRxRingKick_init data_va=0x200000b00 | |
449 | attr_data { | |
450 | Name = SetRxRingKick_init, | |
451 | hypervisor, | |
452 | compressimage | |
453 | } | |
454 | .data | |
455 | SetRxRingKick_init: | |
456 | .xword 0x0060452301000484 | |
457 | /************************************************************************/ | |
458 | ||
459 | SECTION SetRxLogMask2_init data_va=0x200000c00 | |
460 | attr_data { | |
461 | Name = SetRxLogMask2_init, | |
462 | hypervisor, | |
463 | compressimage | |
464 | } | |
465 | .data | |
466 | SetRxLogMask2_init: | |
467 | .xword 0x0060452301000484 | |
468 | /************************************************************************/ | |
469 | ||
470 | SECTION SetRxLogVal2_init data_va=0x200000d00 | |
471 | attr_data { | |
472 | Name = SetRxLogVal2_init, | |
473 | hypervisor, | |
474 | compressimage | |
475 | } | |
476 | .data | |
477 | SetRxLogVal2_init: | |
478 | .xword 0x0060452301000484 | |
479 | /************************************************************************/ | |
480 | ||
481 | SECTION SetRxLogRelo2_init data_va=0x200000e00 | |
482 | attr_data { | |
483 | Name = SetRxLogRelo2_init, | |
484 | hypervisor, | |
485 | compressimage | |
486 | } | |
487 | .data | |
488 | SetRxLogRelo2_init: | |
489 | .xword 0x0060452301000484 | |
490 | ||
491 | /************************************************************************/ | |
492 | ||
493 | /************************************************************************ | |
494 | Test case data start | |
495 | ************************************************************************/ | |
496 | /* These initialization is temporary, as there looks some bug in mempli */ | |
497 | ||
498 | SECTION SetRngConfig_init data_va=0x100000000 | |
499 | attr_data { | |
500 | Name = SetRngConfig_init, | |
501 | hypervisor, | |
502 | compressimage | |
503 | } | |
504 | .data | |
505 | SetRngConfig_init: | |
506 | .xword 0x0060452301000484 | |
507 | /************************************************************************/ | |
508 | ||
509 | SECTION SetTxRingKick_init data_va=0x100000100 | |
510 | attr_data { | |
511 | Name = SetTxRingKick_init, | |
512 | hypervisor, | |
513 | compressimage | |
514 | } | |
515 | .data | |
516 | SetTxRingKick_init: | |
517 | .xword 0x0060452301000484 | |
518 | /************************************************************************/ | |
519 | ||
520 | SECTION SetTxLPMask1_init data_va=0x100000200 | |
521 | attr_data { | |
522 | Name = SetTxLPMask1_init, | |
523 | hypervisor, | |
524 | compressimage | |
525 | } | |
526 | .data | |
527 | SetTxLPMask1_init: | |
528 | .xword 0x0060452301000484 | |
529 | /************************************************************************/ | |
530 | ||
531 | SECTION SetTxLPValue1_init data_va=0x100000300 | |
532 | attr_data { | |
533 | Name = SetTxLPValue1_init, | |
534 | hypervisor, | |
535 | compressimage | |
536 | } | |
537 | .data | |
538 | SetTxLPValue1_init: | |
539 | .xword 0x0060452301000484 | |
540 | /************************************************************************/ | |
541 | ||
542 | SECTION SetTxLPRELOC1_init data_va=0x100000400 | |
543 | attr_data { | |
544 | Name = SetTxLPRELOC1_init, | |
545 | hypervisor, | |
546 | compressimage | |
547 | } | |
548 | .data | |
549 | SetTxLPRELOC1_init: | |
550 | .xword 0x0060452301000484 | |
551 | /************************************************************************/ | |
552 | SECTION SetTxLPMask2_init data_va=0x100000500 | |
553 | attr_data { | |
554 | Name = SetTxLPMask2_init, | |
555 | hypervisor, | |
556 | compressimage | |
557 | } | |
558 | .data | |
559 | SetTxLPMask2_init: | |
560 | .xword 0x0060452301000484 | |
561 | /************************************************************************/ | |
562 | SECTION SetTxLPValue2_init data_va=0x100000600 | |
563 | attr_data { | |
564 | Name = SetTxLPValue2_init, | |
565 | hypervisor, | |
566 | compressimage | |
567 | } | |
568 | .data | |
569 | SetTxLPValue2_init: | |
570 | .xword 0x0060452301000484 | |
571 | ||
572 | /************************************************************************/ | |
573 | SECTION SetTxLPRELOC2_init data_va=0x100000700 | |
574 | attr_data { | |
575 | Name = SetTxLPRELOC2_init, | |
576 | hypervisor, | |
577 | compressimage | |
578 | } | |
579 | .data | |
580 | SetTxLPRELOC2_init: | |
581 | .xword 0x0060452301000484 | |
582 | ||
583 | /************************************************************************/ | |
584 | SECTION SetTxLPValid_init data_va=0x100000800 | |
585 | attr_data { | |
586 | Name = SetTxLPValid_init, | |
587 | hypervisor, | |
588 | compressimage | |
589 | } | |
590 | .data | |
591 | SetTxLPValid_init: | |
592 | .xword 0x0060452301000484 | |
593 | ||
594 | /************************************************************************/ |