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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / niu / NIU_Tx_Rx / txrxrand_wrm_macp.s
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86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: txrxrand_wrm_macp.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_HV_ALSO
39#define RCRSTAT_A_Addr mpeval(DMC_ADDRESS_RANGE+0x00050)
40#define RBR_STAT_Addr mpeval(DMC_ADDRESS_RANGE+0x00028)
41#define SSYS_RESET_Addr 0x8900000838
42
43#include "hboot.s"
44#include "niu_defines.h"
45.text
46.global main
47main:
48 ta T_CHANGE_HPRIV
49 nop
50! branch to main by comparing thread id.
51
52 ta T_RD_THID
53 mov 0x1, %g2
54
55 setx 0x0000000000000001, %o0, %g3 ! thread-group bits for the template
56 cmp %g2, %o1
57 be _FcN1_main
58 nop
59
60 setx 0x0000000000000010, %o0, %g3 ! thread-group bits for the template
61 brz %o1, _FcN0_main
62 and %o1, %g3, %g1
63 nop
64
65!
66! Thread 0 Start
67!
68!
69_FcN0_main:
70
71Init_flow:
72 nop ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow)) -> pktGenConfig(MAC_ID, FRAME_TYPE, FRAME_CLASS, c8)
73
74P_TxDMAActivate:
75 setx MAC_ID, %g1, %o0
76 setx 0x8000, %g1, %o1
77 call SetTxDMAActive
78 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate)) -> NIU_TxDMAActivate (MAC_ID, 8000)
79 setx XMAC0_MAX_addr, %g7, %g2
80
81
82P_AddTxChannels:
83 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels)) -> NIU_AddTxChannels(MAC_ID, f)
84 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
85 nop
86
87P_SetTxMaxBurst:
88 setx 0xf, %g1, %o0
89 setx SetTxMaxBurst_Data, %g1, %o1
90 call SetTxMaxBurst
91 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (MAC_ID, f, TxMaxBurst_Data)
92 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
93 nop
94
95P_InitTxDma:
96 setx 0xf, %g1, %o0
97 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_InitTxDma)) -> NIU_InitTxDma (MAC_ID, f, NIU_Xlate_On)
98 call InitTxDma
99 nop
100 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
101 nop
102
103Gen_Packet:
104 nop ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet)) -> TxPktGen(MAC_ID, f, 0x40,0,0,0)
105 nop
106
107 setx 0x5, %g1, %g4
108delay_loop_tmp:
109 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
110 nop
111 nop
112 nop
113 nop
114 dec %g4
115 brnz %g4, delay_loop_tmp
116 nop
117
118SetTxRingKick:
119 setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick)) -> NIU_SetTxRingKick(MAC_ID, f)
120 setx 0xf, %g1, %o0
121 ldx [%g2] , %g3
122 nop
123 mulx %o0, 0x200, %g5
124 setx TX_RING_KICK_Addr, %g1, %g2
125 add %g2, %g5, %g2
126 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
127 nop
128
129SetTxCs:
130 setx 0xf, %g1, %o0
131 setx TX_CS_Data, %g1, %g3
132 mulx %o0, 0x200, %g5
133 setx TX_CS_Addr, %g1, %g2
134 add %g2, %g5, %g2
135 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
136 nop
137
138#ifdef JUMBO_FRAME_EN
139 setx loop_count, %g1, %g4
140delay_loop:
141 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
142 nop
143 nop
144 nop
145 nop
146 dec %g4
147 brnz %g4, delay_loop
148 nop
149#endif
150
151
152NIUTx_Pkt_Cnt_Chk:
153 setx MAC_ID, %g1, %o0
154 setx 0x40, %g1, %o1
155 call NiuTx_check_pkt_cnt
156 nop
157
158 setx loop_count, %g1, %g4
159delay_loop_end:
160 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
161 nop
162 nop
163 nop
164 nop
165 dec %g4
166 brnz %g4, delay_loop_end
167 nop
168
169 setx user_data_start, %g1, %g2
170 ldx [%g2], %g3
171 cmp %g3, 0x1
172 nop
173 be test_passed_tx
174 nop
175 setx xmac_config0, %g7, %g2
176niu_warm_reset:
177 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
178 and 0x00000100, %g3, %g3
179 brnz %g3,niu_warm_reset
180 nop
181 setx SSYS_RESET_Addr, %g7, %g2
182 setx 0x40, %g7, %g3
183 stx %g3, [%g2]
184 setx 0x41, %g7, %g3
185 stx %g3, [%g2]
186 setx 0x3, %g1, %g4
187delay_loop_warm:
188 ldx [%g2], %g3
189 dec %g4
190 brnz %g4, delay_loop_warm
191 nop
192 #call N2_NIU_INIT
193 #setx xpcs0_control1_addr, %g7, %g2
194 #setx xpcs0_control1_data, %g7, %g3
195 #stxa %g3, [%g2]ASI_PRIMARY_LITTLE
196 #add %g2, %l2, %g2
197 #stxa %g3, [%g2]ASI_PRIMARY_LITTLE
198 setx ipp_config0_addr, %g7, %g2
199 setx ipp_config_data, %g7, %g3
200 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
201 best_set_reg(0x8000, %l1, %l2)
202 or %g2, %l2, %g2
203 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
204 setx txc_dma_maxburst_addr, %g7, %g2
205 best_set_reg(txc_dma_maxburst_data, %g7, %g3)
206 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
207
208 setx txc_port0_control_addr, %g7, %g2
209 best_set_reg(txc_port0_control_data, %g7, %g3)
210 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
211 add %g2, 0x100, %g2
212 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
213
214 setx txc_control_addr, %g7, %g2
215 best_set_reg(txc_control_data, %g7, %g3)
216 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
217 nop
218 setx xmac_config0, %g7, %g2
219 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
220 setx 0x00000100, %g7, %g4
221 or %g4, %g3, %g3
222 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
223
224 nop
225 setx user_data_start, %g1, %g2
226 setx 0x1, %g7, %g3
227 stx %g3, [%g2]
228 #ba _FcN0_main
229 nop
230Init_flow_1:
231 nop ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow_1)) -> pktGenConfig(MAC_ID, FRAME_TYPE, FRAME_CLASS, c8)
232
233P_TxDMAActivate_1:
234 setx MAC_ID, %g1, %o0
235 setx 0x8000, %g1, %o1
236 call SetTxDMAActive
237 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate_1)) -> NIU_TxDMAActivate (MAC_ID, 8000)
238
239
240P_AddTxChannels_1:
241 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels_1)) -> NIU_AddTxChannels(MAC_ID, f)
242 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
243 nop
244
245P_SetTxMaxBurst_1:
246 setx 0xf, %g1, %o0
247 setx SetTxMaxBurst_Data, %g1, %o1
248 call SetTxMaxBurst
249 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst_1)) -> NIU_SetTxMaxBurst (MAC_ID, f, TxMaxBurst_Data)
250 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
251 nop
252
253P_InitTxDma_1:
254 setx 0xf, %g1, %o0
255 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_InitTxDma_1)) -> NIU_InitTxDma (MAC_ID, f, NIU_Xlate_On)
256 call InitTxDma
257 nop
258 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
259 nop
260
261Gen_Packet_1:
262 nop ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet_1)) -> TxPktGen(MAC_ID, f, 0x40,0,0,0)
263 nop
264
265 setx 0x5, %g1, %g4
266delay_loop_tmp_1:
267 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
268 nop
269 nop
270 nop
271 nop
272 dec %g4
273 brnz %g4, delay_loop_tmp_1
274 nop
275
276SetTxRingKick_1:
277 setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick_1)) -> NIU_SetTxRingKick(MAC_ID, f)
278 setx 0xf, %g1, %o0
279 ldx [%g2] , %g3
280 nop
281 mulx %o0, 0x200, %g5
282 setx TX_RING_KICK_Addr, %g1, %g2
283 add %g2, %g5, %g2
284 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
285 nop
286
287SetTxCs_1:
288 setx 0xf, %g1, %o0
289 setx TX_CS_Data, %g1, %g3
290 mulx %o0, 0x200, %g5
291 setx TX_CS_Addr, %g1, %g2
292 add %g2, %g5, %g2
293 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
294 nop
295
296#ifdef JUMBO_FRAME_EN
297 setx loop_count, %g1, %g4
298delay_loop_1:
299 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
300 nop
301 nop
302 nop
303 nop
304 dec %g4
305 brnz %g4, delay_loop_1
306 nop
307#endif
308
309
310NIUTx_Pkt_Cnt_Chk_1:
311 setx MAC_ID, %g1, %o0
312 setx 0x40, %g1, %o1
313 call NiuTx_check_pkt_cnt
314 nop
315
316 setx loop_count, %g1, %g4
317delay_loop_end_1:
318 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
319 nop
320 nop
321 nop
322 nop
323 dec %g4
324 brnz %g4, delay_loop_end_1
325 nop
326
327test_passed_tx:
328 nop ! $EV trig_pc_d(1, @VA(.MAIN.test_passed_tx)) -> NIU_EXIT_chk(MAC_ID)
329 EXIT_GOOD
330
331
332_FcN1_main:
333
334P_NIU_RxInitDma:
335 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma)) -> NIU_InitRxDma(1, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, NIU_Xlate_On)
336 setx NIU_PKTGEN_CSR_EV2A_RBR_KICK, %g7, %g2
337delay_loop_Rx:
338 ldx [%g2], %g5
339 cmp %g5, RX_INITIAL_KICK
340 bne delay_loop_Rx
341 nop
342
343 setx 0x1, %g1, %o0
344 setx RX_DESC_RING_LENGTH, %g1, %o1
345 setx RX_COMPL_RING_LEN, %g1, %o2
346 setx RBR_CONFIG_B_DATA, %g1, %o3
347 setx RX_INITIAL_KICK, %g1, %o4
348 call NiuInitRxDma
349 nop
350P_NIU_RxPkt_Conf:
351 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxPkt_Conf)) -> NIU_RxPktConf(RXMAC_PKTCNT)
352 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
353 nop
354 setx RXMAC_PKTCNT, %g1, %g6
355 mulx %o0, 0x200, %g5
356 setx RBR_STAT_Addr, %g7, %g2
357 add %g2, %g5, %g2
358P_NIU_Rx_GenPkt:
359 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
360 brz %g5, P_NIU_Rx_GenPkt
361 nop
362#ifdef NIU_SYSTEMC_T2
363 brnz %g5, Rx_pktcnt_loop
364 nop
365#endif
366 cmp %g5, %o4
367 be P_NIU_Rx_GenPkt
368 nop
369Rx_pktcnt_loop:
370 nop ! $EV trig_pc_d(1, @VA(.MAIN.Rx_pktcnt_loop)) -> NIU_RxGenPkt(MAC_ID, 1, RXMAC_PKTCNT, 0x64, 0x0, RX_NIU_MULTI_DMA, 1)
371 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
372 nop
373
374 mulx %o0, 0x200, %g5
375 setx RCRSTAT_A_Addr, %g7, %g2
376 add %g2, %g5, %g2
377delay_loop:
378 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
379 cmp %g5, RXMAC_PKTCNT - RXMAC_PKTCNT%8
380 bne delay_loop
381 nop
382
383disable_mac0:
384 setx xmac_config0, %g7, %g2
385 ldxa [%g2]ASI_PRIMARY_LITTLE, %g3
386 setx 0xfffffeff, %g7, %g4
387 and %g4, %g3, %g3
388 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
389
390 setx user_data_start, %g1, %g2
391wait_wrm_done:
392 ldx [%g2], %g3
393 cmp %g3, 0x1
394 nop
395 bne wait_wrm_done
396 nop
397# ba _FcN1_main
398# nop
399P_NIU_RxInitDma_1:
400 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_1)) -> NIU_InitRxDma(1, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, NIU_Xlate_On)
401 setx NIU_PKTGEN_CSR_EV2A_RBR_KICK, %g7, %g2
402delay_loop_Rx_1:
403 ldx [%g2], %g5
404 cmp %g5, RX_INITIAL_KICK
405 bne delay_loop_Rx_1
406 nop
407
408 setx 0x1, %g1, %o0
409 setx RX_DESC_RING_LENGTH, %g1, %o1
410 setx RX_COMPL_RING_LEN, %g1, %o2
411 setx RBR_CONFIG_B_DATA, %g1, %o3
412 setx RX_INITIAL_KICK, %g1, %o4
413 call NiuInitRxDma
414 nop
415P_NIU_RxPkt_Conf_1:
416 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxPkt_Conf_1)) -> NIU_RxPktConf(RXMAC_PKTCNT)
417 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
418 nop
419 setx RXMAC_PKTCNT, %g1, %g6
420 mulx %o0, 0x200, %g5
421 setx RBR_STAT_Addr, %g7, %g2
422 add %g2, %g5, %g2
423P_NIU_Rx_GenPkt_1:
424 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
425 brz %g5, P_NIU_Rx_GenPkt_1
426 nop
427 cmp %g5, %o4
428 be P_NIU_Rx_GenPkt_1
429 nop
430Rx_pktcnt_loop_1:
431 nop ! $EV trig_pc_d(1, @VA(.MAIN.Rx_pktcnt_loop_1)) -> NIU_RxGenPkt(MAC_ID, 1, RXMAC_PKTCNT, 0x64, 0x0, RX_NIU_MULTI_DMA, 1)
432 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
433 nop
434
435 mulx %o0, 0x200, %g5
436 setx RCRSTAT_A_Addr, %g7, %g2
437 add %g2, %g5, %g2
438Rxdelay_loop_1:
439 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
440 cmp %g5, RXMAC_PKTCNT - RXMAC_PKTCNT%8
441 bne Rxdelay_loop_1
442 nop
443
444
445test_passed:
446 nop
447 EXIT_GOOD
448# 247 "diag.j.pp"
449
450#if 0
451#endif
452/************************************************************************
453 Test case data start
454************************************************************************/
455
456.align 1024
457.data
458user_data_start:
459intr_expect:
460 .byte 0x0
461 .byte 0x0
462 .byte 0x0
463 .byte 0x0
464 .byte 0x0
465 .byte 0x0
466 .byte 0x0
467 .byte 0x0
468user_data_end:
469.end
Full OpenSPARC design & verification tarball including full HDL.