[OpenSPARC-T2-DV] / verif / diag / assembly / niu / niu_fflp_regs.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: niu_fflp_regs.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define MAIN_PAGE_NUCLEUS_ALSO
#define MAIN_PAGE_HV_ALSO

#include "hboot.s"
!#include "asi_s.h"

#define FFLP_L2_CLS_2           0x00000
#define FFLP_L2_CLS_3           0x00008
#define FFLP_L2_CLS_4           0x00010
#define FFLP_L3_CLS_5           0x00018
#define FFLP_L3_CLS_6           0x00020
#define FFLP_L3_CLS_7           0x00028
#define FFLP_CAM_KEY_REG0                20'h0_0090
#define FFLP_CAM_KEY_REG1                20'h0_0098
#define FFLP_CAM_KEY_REG2                20'h0_00a0
#define FFLP_CAM_KEY_REG3                20'h0_00a8
#define FFLP_CAM_KEY_MASK_REG0           20'h0_00b0
#define FFLP_CAM_KEY_MASK_REG1           20'h0_00b8
#define FFLP_CAM_KEY_MASK_REG2           20'h0_00c0
#define FFLP_CAM_KEY_MASK_REG3           20'h0_00c8
#define FFLP_CAM_CONTROL                 20'h0_00d0


#define FFLP_CONFIG             0x00100
#define FFLP_TCP_CFLAG_MASK     0x00108
#define FFLP_FCRAM_REF_TMR      0x00110
#define FZC_FFLP_BASE_OFFSET    0x020000
#define FZC_FFLP_BASE_ADDRESS   0x380000
#define NIU_BASE_ADDRESS        0x8100000000
#define FFLP_ADDRESS_RANGE      mpeval(NIU_BASE_ADDRESS + FZC_FFLP_BASE_ADDRESS + FZC_FFLP_BASE_OFFSET)
#define config                	mpeval(FFLP_ADDRESS_RANGE + FFLP_CONFIG)
#define tcp_cflag_mask          mpeval(FFLP_ADDRESS_RANGE + FFLP_TCP_CFLAG_MASK)
#define fcram_ref_tmr           mpeval(FFLP_ADDRESS_RANGE + FFLP_FCRAM_REF_TMR)
#define l2_cls_2                mpeval(FFLP_ADDRESS_RANGE + FFLP_L2_CLS_2)
#define l2_cls_3                mpeval(FFLP_ADDRESS_RANGE + FFLP_L2_CLS_3)
#define l2_cls_4                mpeval(FFLP_ADDRESS_RANGE + FFLP_L2_CLS_4)
#define cam_key_reg0            mpeval(FFLP_ADDRESS_RANGE + FFLP_CAM_KEY_REG0)
#define cam_key_reg1            mpeval(FFLP_ADDRESS_RANGE + FFLP_CAM_KEY_REG1)
#define cam_key_mask_reg0            mpeval(FFLP_ADDRESS_RANGE + FFLP_CAM_KEY_MASK_REG0)
#define cam_key_mask_reg1            mpeval(FFLP_ADDRESS_RANGE + FFLP_CAM_KEY_MASK_REG1)

#define FFLP_CONFIG_DATA_MASK   	0x0000000007ffffff
#define FFLP_TCP_CFLAG_MASK_DATA_MASK   0x0000000000000fff
#define FFLP_FCRAM_REF_TMR_DATA_MASK 	0x00000000ffffffff
#define FFLP_L2_CLS_2_DATA_MASK	  	0x000000000001ffff
#define FFLP_L2_CLS_4_DATA_MASK	  	0x0000000003ffffff
#define FFLP_CAM_KEY_REG0_DATA_MASK  	0x00000000000000ff
#define FFLP_CAM_KEY_REG1_DATA_MASK  	0xffffffffffffffff

.text
.global	 main


main:
    ta   T_CHANGE_HPRIV

get_th_id:
    ta   T_RD_THID

//    cmp  %o1,0x0
//    bne  test_pass
    nop
/*

!Write then read data of  FFLP_CONFIG   
 setx config,%g7,%g1
    setx wdata,%g7,%g2
    set  0x05,%g3


loop1:
    ldx  [%g2],%g4
    stxa  %g4,[%g1]ASI_PRIMARY_LITTLE

    ldxa [%g1]ASI_PRIMARY_LITTLE, %g5

    setx FFLP_CONFIG_DATA_MASK, %g7, %g6 
    and %g4, %g6, %g4	
    cmp %g4, %g5
  
    bne %xcc, test_fail


    add  %g2,8,%g2
    sub  %g3,1,%g3
    cmp  %g3,%g0
    bne  loop1
    nop


!Write then read data of  FFLP_TCP_CFLAG_MASK   
 setx tcp_cflag_mask,%g7,%g1
    setx wdata,%g7,%g2
    set  0x05,%g3

loop2:
    ldx  [%g2],%g4
    stxa  %g4,[%g1]ASI_PRIMARY_LITTLE

    ldxa [%g1]ASI_PRIMARY_LITTLE, %g5

    setx FFLP_TCP_CFLAG_MASK_DATA_MASK, %g7, %g6 
    and %g4, %g6, %g4	
    cmp %g4, %g5
  
    bne %xcc, test_fail


    add  %g2,8,%g2
    sub  %g3,1,%g3
    cmp  %g3,%g0
    bne  loop2
    nop


!Write then read data of  FFLP_FCRAM_REF_TMR   
 setx fcram_ref_tmr,%g7,%g1
    setx wdata,%g7,%g2
    set  0x05,%g3

loop3:
    ldx  [%g2],%g4
    stxa  %g4,[%g1]ASI_PRIMARY_LITTLE

    ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
    setx FFLP_FCRAM_REF_TMR_DATA_MASK, %g7, %g6 
    and %g4, %g6, %g4	

    cmp %g4, %g5
  
    bne %xcc, test_fail


    add  %g2,8,%g2
    sub  %g3,1,%g3
    cmp  %g3,%g0
    bne  loop3
    nop


!Write then read data of  FFLP_L2_CLS_2   
 setx l2_cls_2,%g7,%g1
    setx wdata,%g7,%g2
    set  0x05,%g3

loop4:
    ldx  [%g2],%g4
    stxa  %g4,[%g1]ASI_PRIMARY_LITTLE

    ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
    setx FFLP_L2_CLS_2_DATA_MASK, %g7, %g6 
    and %g4, %g6, %g4	

    cmp %g4, %g5
  
    bne %xcc, test_fail


    add  %g2,8,%g2
    sub  %g3,1,%g3
    cmp  %g3,%g0
    bne  loop4
    nop


!Write then read data of  FFLP_L2_CLS_3   
 setx l2_cls_3,%g7,%g1
    setx wdata,%g7,%g2
    set  0x05,%g3

loop5:
    ldx  [%g2],%g4
    stxa  %g4,[%g1]ASI_PRIMARY_LITTLE

    ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
    setx FFLP_L2_CLS_2_DATA_MASK, %g7, %g6 
    and %g4, %g6, %g4	

    cmp %g4, %g5
  
    bne %xcc, test_fail


    add  %g2,8,%g2
    sub  %g3,1,%g3
    cmp  %g3,%g0
    bne  loop5
    nop


!Write then read data of  FFLP_L2_CLS_4   ~ FFLP_L2_CLS_7
    setx l2_cls_4,%g7,%g1
    setx wdata,%g7,%g2
    set  0x04,%g8

loop6:
    set  0x05,%g3
loop7:
    ldx  [%g2],%g4
    stxa  %g4,[%g1]ASI_PRIMARY_LITTLE

    ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
    setx FFLP_L2_CLS_4_DATA_MASK, %g7, %g6 
    and %g4, %g6, %g4	

    cmp %g4, %g5
  
    bne %xcc, test_fail


    add  %g2,8,%g2
    sub  %g3,1,%g3
    cmp  %g3,%g0
    bne  loop7
    nop
    add  %g1,8,%g1
    sub  %g8,1,%g8
    cmp  %g8,%g0
    bne  loop6	 
    nop
*/

!Write then read data of  FFLP_CAM_KEY_REG0~ FFLP_CAM_KEY_REG3,
 setx cam_key_reg0,%g7,%g1
    setx wdata,%g7,%g2
    set  0x04,%g8

loop8:
    set  0x05,%g3
loop9:
    ldx  [%g2],%g4
    stxa  %g4,[%g1]ASI_PRIMARY_LITTLE

    ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
    setx FFLP_CAM_KEY_REG1_DATA_MASK, %g7, %g6 
    and %g4, %g6, %g4	

    cmp %g4, %g5
  
    bne %xcc, test_fail


    add  %g2,8,%g2
    sub  %g3,1,%g3
    cmp  %g3,%g0
    bne  loop9
    nop
    add  %g1,8,%g1
    sub  %g8,1,%g8
    cmp  %g8,%g0
    bne  loop8	 
    nop


!Write then read data of   FFLP_CAM_KEY_MASK_REG1~FFLP_CAM_KEY_MASK_REG3 
 setx cam_key_mask_reg1,%g7,%g1
    setx wdata,%g7,%g2
    set  0x04,%g8

loop11:
    set  0x05,%g3
loop12:
    ldx  [%g2],%g4
    stxa  %g4,[%g1]ASI_PRIMARY_LITTLE

    ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
    setx FFLP_CAM_KEY_REG1_DATA_MASK, %g7, %g6 
    and %g4, %g6, %g4	

    cmp %g4, %g5
  
    bne %xcc, test_fail


    add  %g2,8,%g2
    sub  %g3,1,%g3
    cmp  %g3,%g0
    bne  loop12
    nop
    add  %g1,8,%g1
    sub  %g8,1,%g8
    cmp  %g8,%g0
    bne  loop11	 
    nop


/******************************************************
 * Exit code
 *******************************************************/

test_pass:
EXIT_GOOD

test_fail:
EXIT_BAD


.data
.align 0x100
wdata:
    .xword 0xffffffffffffffff
    .xword 0xaaaaaaaaaaaaaaaa
    .xword 0x0000000000000000
    .xword 0x5555555555555555
    .xword 0x0123456789abcdef

.end
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: niu_fflp_regs.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define MAIN_PAGE_NUCLEUS_ALSO
	39	#define MAIN_PAGE_HV_ALSO
	40
	41	#include "hboot.s"
	42	!#include "asi_s.h"
	43
	44	#define FFLP_L2_CLS_2 0x00000
	45	#define FFLP_L2_CLS_3 0x00008
	46	#define FFLP_L2_CLS_4 0x00010
	47	#define FFLP_L3_CLS_5 0x00018
	48	#define FFLP_L3_CLS_6 0x00020
	49	#define FFLP_L3_CLS_7 0x00028
	50	#define FFLP_CAM_KEY_REG0 20'h0_0090
	51	#define FFLP_CAM_KEY_REG1 20'h0_0098
	52	#define FFLP_CAM_KEY_REG2 20'h0_00a0
	53	#define FFLP_CAM_KEY_REG3 20'h0_00a8
	54	#define FFLP_CAM_KEY_MASK_REG0 20'h0_00b0
	55	#define FFLP_CAM_KEY_MASK_REG1 20'h0_00b8
	56	#define FFLP_CAM_KEY_MASK_REG2 20'h0_00c0
	57	#define FFLP_CAM_KEY_MASK_REG3 20'h0_00c8
	58	#define FFLP_CAM_CONTROL 20'h0_00d0
	59
	60
	61	#define FFLP_CONFIG 0x00100
	62	#define FFLP_TCP_CFLAG_MASK 0x00108
	63	#define FFLP_FCRAM_REF_TMR 0x00110
	64	#define FZC_FFLP_BASE_OFFSET 0x020000
65	#define FZC_FFLP_BASE_ADDRESS 0x380000
66	#define NIU_BASE_ADDRESS 0x8100000000
67	#define FFLP_ADDRESS_RANGE mpeval(NIU_BASE_ADDRESS + FZC_FFLP_BASE_ADDRESS + FZC_FFLP_BASE_OFFSET)
68	#define config mpeval(FFLP_ADDRESS_RANGE + FFLP_CONFIG)
69	#define tcp_cflag_mask mpeval(FFLP_ADDRESS_RANGE + FFLP_TCP_CFLAG_MASK)
70	#define fcram_ref_tmr mpeval(FFLP_ADDRESS_RANGE + FFLP_FCRAM_REF_TMR)
71	#define l2_cls_2 mpeval(FFLP_ADDRESS_RANGE + FFLP_L2_CLS_2)
72	#define l2_cls_3 mpeval(FFLP_ADDRESS_RANGE + FFLP_L2_CLS_3)
73	#define l2_cls_4 mpeval(FFLP_ADDRESS_RANGE + FFLP_L2_CLS_4)
74	#define cam_key_reg0 mpeval(FFLP_ADDRESS_RANGE + FFLP_CAM_KEY_REG0)
75	#define cam_key_reg1 mpeval(FFLP_ADDRESS_RANGE + FFLP_CAM_KEY_REG1)
76	#define cam_key_mask_reg0 mpeval(FFLP_ADDRESS_RANGE + FFLP_CAM_KEY_MASK_REG0)
77	#define cam_key_mask_reg1 mpeval(FFLP_ADDRESS_RANGE + FFLP_CAM_KEY_MASK_REG1)
78
79	#define FFLP_CONFIG_DATA_MASK 0x0000000007ffffff
80	#define FFLP_TCP_CFLAG_MASK_DATA_MASK 0x0000000000000fff
81	#define FFLP_FCRAM_REF_TMR_DATA_MASK 0x00000000ffffffff
82	#define FFLP_L2_CLS_2_DATA_MASK 0x000000000001ffff
83	#define FFLP_L2_CLS_4_DATA_MASK 0x0000000003ffffff
84	#define FFLP_CAM_KEY_REG0_DATA_MASK 0x00000000000000ff
85	#define FFLP_CAM_KEY_REG1_DATA_MASK 0xffffffffffffffff
86
87	.text
88	.global main
89
90
91	main:
92	ta T_CHANGE_HPRIV
93
94	get_th_id:
95	ta T_RD_THID
96
97	// cmp %o1,0x0
98	// bne test_pass
99	nop
100	/*
101
102	!Write then read data of FFLP_CONFIG
103	setx config,%g7,%g1
104	setx wdata,%g7,%g2
105	set 0x05,%g3
106
107
108	loop1:
109	ldx [%g2],%g4
110	stxa %g4,[%g1]ASI_PRIMARY_LITTLE
111
112	ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
113
114	setx FFLP_CONFIG_DATA_MASK, %g7, %g6
115	and %g4, %g6, %g4
116	cmp %g4, %g5
117
118	bne %xcc, test_fail
119
120
121	add %g2,8,%g2
122	sub %g3,1,%g3
123	cmp %g3,%g0
124	bne loop1
125	nop
126
127
128
129	!Write then read data of FFLP_TCP_CFLAG_MASK
130	setx tcp_cflag_mask,%g7,%g1
131	setx wdata,%g7,%g2
132	set 0x05,%g3
133
134	loop2:
135	ldx [%g2],%g4
136	stxa %g4,[%g1]ASI_PRIMARY_LITTLE
137
138	ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
139
140	setx FFLP_TCP_CFLAG_MASK_DATA_MASK, %g7, %g6
141	and %g4, %g6, %g4
142	cmp %g4, %g5
143
144	bne %xcc, test_fail
145
146
147	add %g2,8,%g2
148	sub %g3,1,%g3
149	cmp %g3,%g0
150	bne loop2
151	nop
152
153
154	!Write then read data of FFLP_FCRAM_REF_TMR
155	setx fcram_ref_tmr,%g7,%g1
156	setx wdata,%g7,%g2
157	set 0x05,%g3
158
159	loop3:
160	ldx [%g2],%g4
161	stxa %g4,[%g1]ASI_PRIMARY_LITTLE
162
163	ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
164	setx FFLP_FCRAM_REF_TMR_DATA_MASK, %g7, %g6
165	and %g4, %g6, %g4
166
167	cmp %g4, %g5
168
169	bne %xcc, test_fail
170
171
172	add %g2,8,%g2
173	sub %g3,1,%g3
174	cmp %g3,%g0
175	bne loop3
176	nop
177
178
179	!Write then read data of FFLP_L2_CLS_2
180	setx l2_cls_2,%g7,%g1
181	setx wdata,%g7,%g2
182	set 0x05,%g3
183
184	loop4:
185	ldx [%g2],%g4
186	stxa %g4,[%g1]ASI_PRIMARY_LITTLE
187
188	ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
189	setx FFLP_L2_CLS_2_DATA_MASK, %g7, %g6
190	and %g4, %g6, %g4
191
192	cmp %g4, %g5
193
194	bne %xcc, test_fail
195
196
197	add %g2,8,%g2
198	sub %g3,1,%g3
199	cmp %g3,%g0
200	bne loop4
201	nop
202
203
204	!Write then read data of FFLP_L2_CLS_3
205	setx l2_cls_3,%g7,%g1
206	setx wdata,%g7,%g2
207	set 0x05,%g3
208
209	loop5:
210	ldx [%g2],%g4
211	stxa %g4,[%g1]ASI_PRIMARY_LITTLE
212
213	ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
214	setx FFLP_L2_CLS_2_DATA_MASK, %g7, %g6
215	and %g4, %g6, %g4
216
217	cmp %g4, %g5
218
219	bne %xcc, test_fail
220
221
222	add %g2,8,%g2
223	sub %g3,1,%g3
224	cmp %g3,%g0
225	bne loop5
226	nop
227
228
229	!Write then read data of FFLP_L2_CLS_4 ~ FFLP_L2_CLS_7
230	setx l2_cls_4,%g7,%g1
231	setx wdata,%g7,%g2
232	set 0x04,%g8
233
234	loop6:
235	set 0x05,%g3
236	loop7:
237	ldx [%g2],%g4
238	stxa %g4,[%g1]ASI_PRIMARY_LITTLE
239
240	ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
241	setx FFLP_L2_CLS_4_DATA_MASK, %g7, %g6
242	and %g4, %g6, %g4
243
244	cmp %g4, %g5
245
246	bne %xcc, test_fail
247
248
249	add %g2,8,%g2
250	sub %g3,1,%g3
251	cmp %g3,%g0
252	bne loop7
253	nop
254	add %g1,8,%g1
255	sub %g8,1,%g8
256	cmp %g8,%g0
257	bne loop6
258	nop
259	*/
260
261	!Write then read data of FFLP_CAM_KEY_REG0~ FFLP_CAM_KEY_REG3,
262	setx cam_key_reg0,%g7,%g1
263	setx wdata,%g7,%g2
264	set 0x04,%g8
265
266	loop8:
267	set 0x05,%g3
268	loop9:
269	ldx [%g2],%g4
270	stxa %g4,[%g1]ASI_PRIMARY_LITTLE
271
272	ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
273	setx FFLP_CAM_KEY_REG1_DATA_MASK, %g7, %g6
274	and %g4, %g6, %g4
275
276	cmp %g4, %g5
277
278	bne %xcc, test_fail
279
280
281	add %g2,8,%g2
282	sub %g3,1,%g3
283	cmp %g3,%g0
284	bne loop9
285	nop
286	add %g1,8,%g1
287	sub %g8,1,%g8
288	cmp %g8,%g0
289	bne loop8
290	nop
291
292
293
294
295	!Write then read data of FFLP_CAM_KEY_MASK_REG1~FFLP_CAM_KEY_MASK_REG3
296	setx cam_key_mask_reg1,%g7,%g1
297	setx wdata,%g7,%g2
298	set 0x04,%g8
299
300	loop11:
301	set 0x05,%g3
302	loop12:
303	ldx [%g2],%g4
304	stxa %g4,[%g1]ASI_PRIMARY_LITTLE
305
306	ldxa [%g1]ASI_PRIMARY_LITTLE, %g5
307	setx FFLP_CAM_KEY_REG1_DATA_MASK, %g7, %g6
308	and %g4, %g6, %g4
309
310	cmp %g4, %g5
311
312	bne %xcc, test_fail
313
314
315	add %g2,8,%g2
316	sub %g3,1,%g3
317	cmp %g3,%g0
318	bne loop12
319	nop
320	add %g1,8,%g1
321	sub %g8,1,%g8
322	cmp %g8,%g0
323	bne loop11
324	nop
325
326
327
328
329	/******************************************************
330	* Exit code
331	*******************************************************/
332
333	test_pass:
334	EXIT_GOOD
335
336	test_fail:
337	EXIT_BAD
338
339
340	.data
341	.align 0x100
342	wdata:
343	.xword 0xffffffffffffffff
344	.xword 0xaaaaaaaaaaaaaaaa
345	.xword 0x0000000000000000
346	.xword 0x5555555555555555
347	.xword 0x0123456789abcdef
348
349	.end