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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / peu / PCIeBadPIOAccess.s
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86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: PCIeBadPIOAccess.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_HV_ALSO
39
40#define H_HT0_Data_access_error_0x32
41#define SUN_H_HT0_Data_access_error_0x32 \
42 inc %l4; \
43 done;
44
45#include "hboot.s"
46
47/************************************************************************
48 Test case code start
49 ************************************************************************/
50.text
51.global main
52main:
53 ta T_CHANGE_HPRIV
54 nop
55
56 mov 0, %l4 ! zero the interrupt count
57
58/************************************************************************
59 Read & Write - within 8MB noncacheable region, but not in the range
60 60.0000 - 6f.ffff
61 ************************************************************************/
62
63 setx 0x0000008800000000, %g1, %g2
64 stx %g3, [%g2]
65 ldx [%g2], %g4
66
67 setx 0x0000008800100000, %g1, %g2
68 stx %g3, [%g2]
69 ldx [%g2], %g4
70
71 setx 0x0000008800200000, %g1, %g2
72 stx %g3, [%g2]
73 ldx [%g2], %g4
74
75 setx 0x0000008800300000, %g1, %g2
76 stx %g3, [%g2]
77 ldx [%g2], %g4
78
79 setx 0x0000008800400000, %g1, %g2
80 stx %g3, [%g2]
81 ldx [%g2], %g4
82
83 setx 0x0000008800500000, %g1, %g2
84 stx %g3, [%g2]
85 ldx [%g2], %g4
86
87 setx 0x0000008800700000, %g1, %g2
88 stx %g3, [%g2]
89 ldx [%g2], %g4
90
91/************************************************************************
92 Read & Write - within 8MB noncacheable region, and in the range
93 60.0000 - 6f.ffff, but not mapped to any CSRs. Try to hit most
94 of the gaps in the addressing range.
95 ************************************************************************/
96
97 setx 0x0000008800600000, %g1, %g2
98 stx %g3, [%g2]
99 ldx [%g2], %g4
100
101 setx 0x00000088006011e0, %g1, %g2
102 stx %g3, [%g2]
103 ldx [%g2], %g4
104
105 setx 0x0000008800601200, %g1, %g2
106 stx %g3, [%g2]
107 ldx [%g2], %g4
108
109 setx 0x00000088006015e0, %g1, %g2
110 stx %g3, [%g2]
111 ldx [%g2], %g4
112
113 setx 0x0000008800601600, %g1, %g2
114 stx %g3, [%g2]
115 ldx [%g2], %g4
116
117 setx 0x0000008800601b00, %g1, %g2
118 stx %g3, [%g2]
119 ldx [%g2], %g4
120
121 setx 0x0000008800602000, %g1, %g2
122 stx %g3, [%g2]
123 ldx [%g2], %g4
124
125 setx 0x0000008800603000, %g1, %g2
126 stx %g3, [%g2]
127 ldx [%g2], %g4
128
129 setx 0x0000008800609000, %g1, %g2
130 stx %g3, [%g2]
131 ldx [%g2], %g4
132
133 setx 0x000000880060c000, %g1, %g2
134 stx %g3, [%g2]
135 ldx [%g2], %g4
136
137 setx 0x0000008800610ff0, %g1, %g2
138 stx %g3, [%g2]
139 ldx [%g2], %g4
140
141 setx 0x0000008800612000, %g1, %g2
142 stx %g3, [%g2]
143 ldx [%g2], %g4
144
145 setx 0x0000008800630030, %g1, %g2
146 stx %g3, [%g2]
147 ldx [%g2], %g4
148
149 setx 0x000000880062d000, %g1, %g2
150 stx %g3, [%g2]
151 ldx [%g2], %g4
152
153 setx 0x0000008800634020, %g1, %g2
154 stx %g3, [%g2]
155 ldx [%g2], %g4
156
157 setx 0x0000008800649000, %g1, %g2
158
159 ! try a good address followed by a bad one
160 stx %g3, [%g2 + 0x78] !! good address
161 stx %g4, [%g2 + 0x80] !! bad address
162 stx %g5, [%g2 + 0x88]
163 ldx [%g2 + 0x78], %g4 !! good address
164 ldx [%g2 + 0x80], %g5 !! bad address
165 ldx [%g2 + 0x88], %g6
166
167 ! try a good address followed by a bad one
168 stx %g3, [%g2 + 0x1f8] !! good address
169 stx %g4, [%g2 + 0x200] !! bad address
170 stx %g5, [%g2 + 0x208]
171 stx %g6, [%g2 + 0x210]
172 ldx [%g2 + 0x1f8], %g4 !! good address
173 ldx [%g2 + 0x200], %g5 !! bad address
174 ldx [%g2 + 0x208], %g6
175 ldx [%g2 + 0x210], %g7
176
177 setx 0x0000008800653110, %g1, %g2
178 stx %g3, [%g2]
179 ldx [%g2], %g4
180
181 setx 0x0000008800665000, %g1, %g2
182 stx %g3, [%g2]
183 ldx [%g2], %g4
184
185 setx 0x0000008800671000, %g1, %g2
186 stx %g3, [%g2]
187 ldx [%g2], %g4
188
189 setx 0x0000008800683100, %g1, %g2
190 stx %g3, [%g2]
191 ldx [%g2], %g4
192
193 setx 0x0000008800692000, %g1, %g2
194 stx %g3, [%g2]
195 ldx [%g2], %g4
196
197 setx 0x00000088006aaaa0, %g1, %g2
198 stx %g3, [%g2]
199 ldx [%g2], %g4
200
201 setx 0x00000088006bbbb0, %g1, %g2
202 stx %g3, [%g2]
203 ldx [%g2], %g4
204
205 setx 0x00000088006ccc00, %g1, %g2
206 stx %g3, [%g2]
207 ldx [%g2], %g4
208
209 setx 0x00000088006dddd0, %g1, %g2
210 stx %g3, [%g2]
211 ldx [%g2], %g4
212
213 setx 0x00000088006e3000, %g1, %g2
214 stx %g3, [%g2]
215 ldx [%g2], %g4
216
217 setx 0x00000088006f0000, %g1, %g2
218 stx %g3, [%g2]
219 ldx [%g2], %g4
220
221 setx 0x00000088006ffff0, %g1, %g2
222 stx %g3, [%g2]
223 ldx [%g2], %g4
224
225 ! test whether enough exceptions were taken
226 sub %l4, 39, %l4
227 brnz %l4, test_failed
228 nop
229
230test_passed:
231 EXIT_GOOD
232
233test_failed:
234 EXIT_BAD
235
Full OpenSPARC design & verification tarball including full HDL.