Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / peu / PCIeCFGWr.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: PCIeCFGWr.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
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14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
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21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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23* For the avoidance of doubt, and except that if any non-GPL license
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36* ========== Copyright Header End ============================================
37*/
38#define ENABLE_PCIE_LINK_TRAINING
39/* #define MAIN_PAGE_NUCLEUS_ALSO */ /* Access main in priviledge mode */
40#define MAIN_PAGE_HV_ALSO
41
42#include "hboot.s"
43#include "peu_defines.h"
44!#include "dmu_peu_regs.h"
45
46#define CFG0_WR_ADDR mpeval(N2_PCIE_BASE_ADDR + IOCFG_OFFSET_BASE_REG_DATA)
47#define CFG1_WR_ADDR mpeval((N2_PCIE_BASE_ADDR + IOCFG_OFFSET_BASE_REG_DATA) | CFG1_ACCESS_PA)
48
49!#define CFG_WR_ADDR mpeval(N2_PCIE_BASE_ADDR + IOCFG_OFFSET_BASE_REG_DATA)
50
51! ignore lower 2-bits of address. these are used for byte enables.
52! only bits [27: 0] are used for CFG accesses. zero out other bits
53! IOCFG_OFFSET_MASK_REG_DATA = 0x0000000d0ef00210
54! IOCFG_OFFSET_MASK_REG_DATA >>2 = 0x003bc0084
55! align it to 8-byte boundary, else midas will complain
56!#define CFG_WR_ADDR mpeval(N2_PCIE_BASE_ADDR + 0x003bc0080)
57
58!#define CFGA_UE 0ef000000
59#define CFGA_UE substr(CFG1_WR_ADDR, 2)
60#define CFGA_DAT eval(CFGA_UE, 16)
61
62/************************************************************************
63 Test case code start
64 ************************************************************************/
65.text
66.global main
67
68main:
69 ta T_CHANGE_HPRIV
70 nop
71
72XmtCmd:
73 ! select a CFG address in PCI address range and transmit the command to NCU
74
75 ! store byte
76 setx CFG1_WR_ADDR, %g1, %g2
77 setx 0x23222120, %g1, %l0
78 stb %l0, [%g2]
79
80 ! store half-word
81 setx CFG1_WR_ADDR, %g1, %g2
82 setx 0x33323130, %g1, %l0
83 sth %l0, [%g2]
84
85 ! store word
86 setx CFG1_WR_ADDR, %g1, %g2
87 setx 0x7f7e7d7c, %g1, %l0
88 stw %l0, [%g2]
89
90
91test_passed:
92 EXIT_GOOD
93
94test_failed:
95 EXIT_BAD
96
97
98
99/************************************************************************
100 Test case data start
101************************************************************************/
102
103SECTION .DATA DATA_VA=CFG1_WR_ADDR
104attr_data {
105 Name = .DATA,
106 hypervisor,
107 compressimage
108}
109
110.data
111.global PCIAddr9
112
113data0: .word 0xccccdddd
114data1: .word 0xeeeeffff
115/************************************************************************/