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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / peu / PCIeDMARdMPS128Rcb.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: PCIeDMARdMPS128Rcb.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define ENABLE_PCIE_LINK_TRAINING
39!!#define ENABLE_PCIE_MPS_256
40!!#define ENABLE_PCIE_MPS_512
41#define MAIN_PAGE_HV_ALSO
42
43#include "hboot.s"
44#include "peu_defines.h"
45
46#define MEM32_RD_ADDR mpeval(N2_PCIE_BASE_ADDR + MEM32_OFFSET_BASE_REG_DATA)
47
48#define DMA_DATA_ADDR 0x0000000123456700
49#define DMA_DATA_BYP_ADDR mpeval(IOMMU_BYP_SADDR + DMA_DATA_ADDR)
50
51#define DMA_ADDR_1 mpeval(DMA_DATA_BYP_ADDR + 6*256, 16, 16)
52#define DMA_ADDR_2 mpeval(DMA_DATA_BYP_ADDR + 9*256, 16, 16)
53#define DMA_ADDR_3 mpeval(DMA_DATA_BYP_ADDR + 9*256, 16, 16)
54#define DMA_ADDR_4 mpeval(DMA_DATA_BYP_ADDR +10*256, 16, 16)
55#define DMA_ADDR_5 mpeval(DMA_DATA_BYP_ADDR +11*256, 16, 16)
56#define DMA_ADDR_6 mpeval(DMA_DATA_BYP_ADDR +12*256, 16, 16)
57#define DMA_ADDR_7 mpeval(DMA_DATA_BYP_ADDR +13*256, 16, 16)
58#define DMA_ADDR_8 mpeval(DMA_DATA_BYP_ADDR +14*256, 16, 16)
59
60
61/************************************************************************
62 Test case code start
63 ************************************************************************/
64.text
65.global main
66
67main:
68 ta T_CHANGE_HPRIV
69 nop
70
71! set the Traffic Class for all the DMA R&W TLPs to 0, so denali doesn't
72! send them out of order
73settc: nop ! $EV trig_pc_d(1, @VA(.MAIN.settc)) -> EnablePCIeIgCmd ("SET_TC", 0, 0, 0, 1 )
74
75! Trigger some DMA Reads of various lengths
76
77Xmt1: nop
78! $EV trig_pc_d(1, @VA(.MAIN.Xmt1)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h088", 1 )
79 nop
80 nop
81Xmt2: nop
82! $EV trig_pc_d(1, @VA(.MAIN.Xmt2)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h096", 1 )
83 nop
84 nop
85Xmt3: nop
86! $EV trig_pc_d(1, @VA(.MAIN.Xmt3)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h0aa", 1 )
87 nop
88 nop
89Xmt4: nop
90! $EV trig_pc_d(1, @VA(.MAIN.Xmt4)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h0bb", 1 )
91 nop
92 nop
93Xmt5: nop
94! $EV trig_pc_d(1, @VA(.MAIN.Xmt5)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h0cc", 1 )
95 nop
96 nop
97Xmt6: nop
98! $EV trig_pc_d(1, @VA(.MAIN.Xmt6)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h0dd", 1 )
99 nop
100 nop
101Xmt7: nop
102! $EV trig_pc_d(1, @VA(.MAIN.Xmt7)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h0ee", 1 )
103 nop
104 nop
105Xmt8: nop
106! $EV trig_pc_d(1, @VA(.MAIN.Xmt8)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h0fc", 1 )
107 nop
108 nop
109Xmt9: nop
110! $EV trig_pc_d(1, @VA(.MAIN.Xmt9)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h100", 1 )
111 nop
112 nop
113Xmt10: nop
114! $EV trig_pc_d(1, @VA(.MAIN.Xmt10)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h111", 1 )
115 nop
116 nop
117Xmt11: nop
118! $EV trig_pc_d(1, @VA(.MAIN.Xmt11)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h1ff", 1 )
119 nop
120 nop
121Xmt12: nop
122! $EV trig_pc_d(1, @VA(.MAIN.Xmt12)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h104", 1 )
123 nop
124 nop
125Xmt13: nop
126! $EV trig_pc_d(1, @VA(.MAIN.Xmt13)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h108", 1 )
127 nop
128 nop
129Xmt14: nop
130! $EV trig_pc_d(1, @VA(.MAIN.Xmt14)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h1ff", 1 )
131 nop
132 nop
133Xmt15: nop
134! $EV trig_pc_d(1, @VA(.MAIN.Xmt15)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h200", 1 )
135 nop
136 nop
137Xmt16: nop
138! $EV trig_pc_d(1, @VA(.MAIN.Xmt16)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h140", 1 )
139 nop
140 nop
141Xmt17: nop
142! $EV trig_pc_d(1, @VA(.MAIN.Xmt17)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h180", 1 )
143 nop
144 nop
145Xmt18: nop
146! $EV trig_pc_d(1, @VA(.MAIN.Xmt18)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_2, "64'h1cc", 1 )
147 nop
148 nop
149
150
151 !!! pick coverage points for a few specific # DWs: 168, 205, 339, 36, 432, 579, 657, 987
152
153Xmt19: nop
154! $EV trig_pc_d(1, @VA(.MAIN.Xmt19)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_1, DMA_ADDR_1, "64'h2a0", 1 )
155 nop
156 nop
157 nop
158Xmt20: nop
159! $EV trig_pc_d(1, @VA(.MAIN.Xmt20)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_2, DMA_ADDR_2, "64'h334", 1 )
160 nop
161 nop
162 nop
163Xmt21: nop
164! $EV trig_pc_d(1, @VA(.MAIN.Xmt21)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_3, DMA_ADDR_3, "64'h54c", 1 )
165 nop
166 nop
167Xmt22: nop
168! $EV trig_pc_d(1, @VA(.MAIN.Xmt22)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_4, DMA_ADDR_4, "64'h090", 1 )
169 nop
170 nop
171 nop
172Xmt23: nop
173! $EV trig_pc_d(1, @VA(.MAIN.Xmt23)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_5, DMA_ADDR_5, "64'h6c0", 1 )
174 nop
175 nop
176 nop
177Xmt24: nop
178! $EV trig_pc_d(1, @VA(.MAIN.Xmt24)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_6, DMA_ADDR_6, "64'h90c", 1 )
179 nop
180 nop
181Xmt25: nop
182! $EV trig_pc_d(1, @VA(.MAIN.Xmt25)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_7, DMA_ADDR_7, "64'ha44", 1 )
183 nop
184 nop
185 nop
186Xmt26: nop
187! $EV trig_pc_d(1, @VA(.MAIN.Xmt26)) -> EnablePCIeIgCmd ("DMARD", DMA_ADDR_8, DMA_ADDR_8, "64'hf6c", 1 )
188 nop
189 nop
190
191
192
193 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_ADDR, %g1, %g3
194 setx 0x030, %g1, %g4 ! loop 48 times
195
196delay_loop:
197 ldx [%g3], %l1 ! PIU CSR READ
198 !add %g2, 8, %g2 ! increment PIO address
199
200 dec %g4 ! decrement counter
201 brnz %g4, delay_loop ! loop if not zero
202 nop
203
204
205test_passed:
206 EXIT_GOOD
207
208test_failed:
209 EXIT_BAD
210
211
212/************************************************************************
213 Test case data start
214************************************************************************/
215
216SECTION .DATA DATA_VA=DMA_DATA_ADDR
217attr_data {
218 Name = .DATA,
219 hypervisor,
220 compressimage
221}
222.data
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Full OpenSPARC design & verification tarball including full HDL.