projects / OpenSPARC-T2-DV / blame
| Commit | Line | Data |
|---|---|---|
| 86530b38 AT |
1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * OpenSPARC T2 Processor File: PCIeDMAWrAllCacheLineOffsets.s | |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 7 | * | |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License as published by | |
| 12 | * the Free Software Foundation; version 2 of the License. | |
| 13 | * | |
| 14 | * This program is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU General Public License | |
| 20 | * along with this program; if not, write to the Free Software | |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 22 | * | |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license | |
| 24 | * choice is available it will apply instead, Sun elects to use only | |
| 25 | * the General Public License version 2 (GPLv2) at this time for any | |
| 26 | * software where a choice of GPL license versions is made | |
| 27 | * available with the language indicating that GPLv2 or any later version | |
| 28 | * may be used, or where a choice of which version of the GPL is applied is | |
| 29 | * otherwise unspecified. | |
| 30 | * | |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 33 | * have any questions. | |
| 34 | * | |
| 35 | * | |
| 36 | * ========== Copyright Header End ============================================ | |
| 37 | */ | |
| 38 | #define ENABLE_PCIE_LINK_TRAINING | |
| 39 | #define MAIN_PAGE_HV_ALSO | |
| 40 | ||
| 41 | #include "hboot.s" | |
| 42 | #include "peu_defines.h" | |
| 43 | ||
| 44 | /************************************************************************ | |
| 45 | Test case code start | |
| 46 | ************************************************************************/ | |
| 47 | .text | |
| 48 | .global main | |
| 49 | ||
| 50 | main: | |
| 51 | ta T_CHANGE_HPRIV | |
| 52 | nop | |
| 53 | ||
| 54 | ! enable bypass in IOMMU | |
| 55 | setx FIRE_DLC_MMU_CSR_A_CTL_ADDR, %g1, %g2 | |
| 56 | setx FIRE_DLC_MMU_CSR_A_CTL__BYPASS_EN, %g1, %g3 | |
| 57 | stx %g3, [%g2] | |
| 58 | ldx [%g2], %g3 | |
| 59 | ||
| 60 | DMA0: nop; nop; nop; nop; nop | |
| 61 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA0)) -> EnablePCIeIgCmd("DMAWR", fffc000076543000, fffc000076543000, "64'h041",1) | |
| 62 | ||
| 63 | DMA1: nop; nop; nop; nop; nop | |
| 64 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA1)) -> EnablePCIeIgCmd("DMAWR", fffc000076543081, fffc000076543081, "64'h041",1) | |
| 65 | ||
| 66 | DMA2: nop; nop; nop; nop; nop | |
| 67 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA2)) -> EnablePCIeIgCmd("DMAWR", fffc000076543102, fffc000076543102, "64'h041",1) | |
| 68 | ||
| 69 | DMA3: nop; nop; nop; nop; nop | |
| 70 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA3)) -> EnablePCIeIgCmd("DMAWR", fffc000076543183, fffc000076543183, "64'h041",1) | |
| 71 | ||
| 72 | DMA4: nop; nop; nop; nop; nop | |
| 73 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA4)) -> EnablePCIeIgCmd("DMAWR", fffc000076543204, fffc000076543204, "64'h041",1) | |
| 74 | ||
| 75 | DMA5: nop; nop; nop; nop; nop | |
| 76 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA5)) -> EnablePCIeIgCmd("DMAWR", fffc000076543285, fffc000076543285, "64'h041",1) | |
| 77 | ||
| 78 | DMA6: nop; nop; nop; nop; nop | |
| 79 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA6)) -> EnablePCIeIgCmd("DMAWR", fffc000076543306, fffc000076543306, "64'h041",1) | |
| 80 | ||
| 81 | DMA7: nop; nop; nop; nop; nop | |
| 82 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA7)) -> EnablePCIeIgCmd("DMAWR", fffc000076543387, fffc000076543387, "64'h041",1) | |
| 83 | ||
| 84 | DMA8: nop; nop; nop; nop; nop | |
| 85 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA8)) -> EnablePCIeIgCmd("DMAWR", fffc000076543408, fffc000076543408, "64'h041",1) | |
| 86 | ||
| 87 | DMA9: nop; nop; nop; nop; nop | |
| 88 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA9)) -> EnablePCIeIgCmd("DMAWR", fffc000076543489, fffc000076543489, "64'h041",1) | |
| 89 | ||
| 90 | DMA10: nop; nop; nop; nop; nop | |
| 91 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA10)) -> EnablePCIeIgCmd("DMAWR", fffc00007654350a, fffc00007654350a, "64'h041",1) | |
| 92 | ||
| 93 | DMA11: nop; nop; nop; nop; nop | |
| 94 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA11)) -> EnablePCIeIgCmd("DMAWR", fffc00007654358b, fffc00007654358b, "64'h041",1) | |
| 95 | ||
| 96 | DMA12: nop; nop; nop; nop; nop | |
| 97 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA12)) -> EnablePCIeIgCmd("DMAWR", fffc00007654360c, fffc00007654360c, "64'h041",1) | |
| 98 | ||
| 99 | DMA13: nop; nop; nop; nop; nop | |
| 100 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA13)) -> EnablePCIeIgCmd("DMAWR", fffc00007654368d, fffc00007654368d, "64'h041",1) | |
| 101 | ||
| 102 | DMA14: nop; nop; nop; nop; nop | |
| 103 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA14)) -> EnablePCIeIgCmd("DMAWR", fffc00007654370e, fffc00007654370e, "64'h041",1) | |
| 104 | ||
| 105 | DMA15: nop; nop; nop; nop; nop | |
| 106 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA15)) -> EnablePCIeIgCmd("DMAWR", fffc00007654378f, fffc00007654378f, "64'h041",1) | |
| 107 | ||
| 108 | DMA16: nop; nop; nop; nop; nop | |
| 109 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA16)) -> EnablePCIeIgCmd("DMAWR", fffc000076543810, fffc000076543810, "64'h041",1) | |
| 110 | ||
| 111 | DMA17: nop; nop; nop; nop; nop | |
| 112 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA17)) -> EnablePCIeIgCmd("DMAWR", fffc000076543891, fffc000076543891, "64'h041",1) | |
| 113 | ||
| 114 | DMA18: nop; nop; nop; nop; nop | |
| 115 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA18)) -> EnablePCIeIgCmd("DMAWR", fffc000076543912, fffc000076543912, "64'h041",1) | |
| 116 | ||
| 117 | DMA19: nop; nop; nop; nop; nop | |
| 118 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA19)) -> EnablePCIeIgCmd("DMAWR", fffc000076543993, fffc000076543993, "64'h041",1) | |
| 119 | ||
| 120 | DMA20: nop; nop; nop; nop; nop | |
| 121 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA20)) -> EnablePCIeIgCmd("DMAWR", fffc000076543a14, fffc000076543a14, "64'h041",1) | |
| 122 | ||
| 123 | DMA21: nop; nop; nop; nop; nop | |
| 124 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA21)) -> EnablePCIeIgCmd("DMAWR", fffc000076543a95, fffc000076543a95, "64'h041",1) | |
| 125 | ||
| 126 | DMA22: nop; nop; nop; nop; nop | |
| 127 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA22)) -> EnablePCIeIgCmd("DMAWR", fffc000076543b16, fffc000076543b16, "64'h041",1) | |
| 128 | ||
| 129 | DMA23: nop; nop; nop; nop; nop | |
| 130 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA23)) -> EnablePCIeIgCmd("DMAWR", fffc000076543b97, fffc000076543b97, "64'h041",1) | |
| 131 | ||
| 132 | DMA24: nop; nop; nop; nop; nop | |
| 133 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA24)) -> EnablePCIeIgCmd("DMAWR", fffc000076543c18, fffc000076543c18, "64'h041",1) | |
| 134 | ||
| 135 | DMA25: nop; nop; nop; nop; nop | |
| 136 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA25)) -> EnablePCIeIgCmd("DMAWR", fffc000076543c99, fffc000076543c99, "64'h041",1) | |
| 137 | ||
| 138 | DMA26: nop; nop; nop; nop; nop | |
| 139 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA26)) -> EnablePCIeIgCmd("DMAWR", fffc000076543d1a, fffc000076543d1a, "64'h041",1) | |
| 140 | ||
| 141 | DMA27: nop; nop; nop; nop; nop | |
| 142 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA27)) -> EnablePCIeIgCmd("DMAWR", fffc000076543d9b, fffc000076543d9b, "64'h041",1) | |
| 143 | ||
| 144 | DMA28: nop; nop; nop; nop; nop | |
| 145 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA28)) -> EnablePCIeIgCmd("DMAWR", fffc000076543e1c, fffc000076543e1c, "64'h041",1) | |
| 146 | ||
| 147 | DMA29: nop; nop; nop; nop; nop | |
| 148 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA29)) -> EnablePCIeIgCmd("DMAWR", fffc000076543e9d, fffc000076543e9d, "64'h041",1) | |
| 149 | ||
| 150 | DMA30: nop; nop; nop; nop; nop | |
| 151 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA30)) -> EnablePCIeIgCmd("DMAWR", fffc000076543f1e, fffc000076543f1e, "64'h041",1) | |
| 152 | ||
| 153 | DMA31: nop; nop; nop; nop; nop | |
| 154 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA31)) -> EnablePCIeIgCmd("DMAWR", fffc00007654401f, fffc00007654401f, "64'h041",1) | |
| 155 | ||
| 156 | DMA32: nop; nop; nop; nop; nop | |
| 157 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA32)) -> EnablePCIeIgCmd("DMAWR", fffc0000765440a0, fffc0000765440a0, "64'h041",1) | |
| 158 | ||
| 159 | DMA33: nop; nop; nop; nop; nop | |
| 160 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA33)) -> EnablePCIeIgCmd("DMAWR", fffc000076544121, fffc000076544121, "64'h041",1) | |
| 161 | ||
| 162 | DMA34: nop; nop; nop; nop; nop | |
| 163 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA34)) -> EnablePCIeIgCmd("DMAWR", fffc0000765441a2, fffc0000765441a2, "64'h041",1) | |
| 164 | ||
| 165 | DMA35: nop; nop; nop; nop; nop | |
| 166 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA35)) -> EnablePCIeIgCmd("DMAWR", fffc000076544223, fffc000076544223, "64'h041",1) | |
| 167 | ||
| 168 | DMA36: nop; nop; nop; nop; nop | |
| 169 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA36)) -> EnablePCIeIgCmd("DMAWR", fffc0000765442a4, fffc0000765442a4, "64'h041",1) | |
| 170 | ||
| 171 | DMA37: nop; nop; nop; nop; nop | |
| 172 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA37)) -> EnablePCIeIgCmd("DMAWR", fffc000076544325, fffc000076544325, "64'h041",1) | |
| 173 | ||
| 174 | DMA38: nop; nop; nop; nop; nop | |
| 175 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA38)) -> EnablePCIeIgCmd("DMAWR", fffc0000765443a6, fffc0000765443a6, "64'h041",1) | |
| 176 | ||
| 177 | DMA39: nop; nop; nop; nop; nop | |
| 178 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA39)) -> EnablePCIeIgCmd("DMAWR", fffc000076544427, fffc000076544427, "64'h041",1) | |
| 179 | ||
| 180 | DMA40: nop; nop; nop; nop; nop | |
| 181 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA40)) -> EnablePCIeIgCmd("DMAWR", fffc0000765444a8, fffc0000765444a8, "64'h041",1) | |
| 182 | ||
| 183 | DMA41: nop; nop; nop; nop; nop | |
| 184 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA41)) -> EnablePCIeIgCmd("DMAWR", fffc000076544529, fffc000076544529, "64'h041",1) | |
| 185 | ||
| 186 | DMA42: nop; nop; nop; nop; nop | |
| 187 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA42)) -> EnablePCIeIgCmd("DMAWR", fffc0000765445aa, fffc0000765445aa, "64'h041",1) | |
| 188 | ||
| 189 | DMA43: nop; nop; nop; nop; nop | |
| 190 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA43)) -> EnablePCIeIgCmd("DMAWR", fffc00007654462b, fffc00007654462b, "64'h041",1) | |
| 191 | ||
| 192 | DMA44: nop; nop; nop; nop; nop | |
| 193 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA44)) -> EnablePCIeIgCmd("DMAWR", fffc0000765446ac, fffc0000765446ac, "64'h041",1) | |
| 194 | ||
| 195 | DMA45: nop; nop; nop; nop; nop | |
| 196 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA45)) -> EnablePCIeIgCmd("DMAWR", fffc00007654472d, fffc00007654472d, "64'h041",1) | |
| 197 | ||
| 198 | DMA46: nop; nop; nop; nop; nop | |
| 199 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA46)) -> EnablePCIeIgCmd("DMAWR", fffc0000765447ae, fffc0000765447ae, "64'h041",1) | |
| 200 | ||
| 201 | DMA47: nop; nop; nop; nop; nop | |
| 202 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA47)) -> EnablePCIeIgCmd("DMAWR", fffc00007654482f, fffc00007654482f, "64'h041",1) | |
| 203 | ||
| 204 | DMA48: nop; nop; nop; nop; nop | |
| 205 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA48)) -> EnablePCIeIgCmd("DMAWR", fffc0000765448b0, fffc0000765448b0, "64'h041",1) | |
| 206 | ||
| 207 | DMA49: nop; nop; nop; nop; nop | |
| 208 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA49)) -> EnablePCIeIgCmd("DMAWR", fffc000076544931, fffc000076544931, "64'h041",1) | |
| 209 | ||
| 210 | DMA50: nop; nop; nop; nop; nop | |
| 211 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA50)) -> EnablePCIeIgCmd("DMAWR", fffc0000765449b2, fffc0000765449b2, "64'h041",1) | |
| 212 | ||
| 213 | DMA51: nop; nop; nop; nop; nop | |
| 214 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA51)) -> EnablePCIeIgCmd("DMAWR", fffc000076544a33, fffc000076544a33, "64'h041",1) | |
| 215 | ||
| 216 | DMA52: nop; nop; nop; nop; nop | |
| 217 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA52)) -> EnablePCIeIgCmd("DMAWR", fffc000076544ab4, fffc000076544ab4, "64'h041",1) | |
| 218 | ||
| 219 | DMA53: nop; nop; nop; nop; nop | |
| 220 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA53)) -> EnablePCIeIgCmd("DMAWR", fffc000076544b35, fffc000076544b35, "64'h041",1) | |
| 221 | ||
| 222 | DMA54: nop; nop; nop; nop; nop | |
| 223 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA54)) -> EnablePCIeIgCmd("DMAWR", fffc000076544bb6, fffc000076544bb6, "64'h041",1) | |
| 224 | ||
| 225 | DMA55: nop; nop; nop; nop; nop | |
| 226 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA55)) -> EnablePCIeIgCmd("DMAWR", fffc000076544c37, fffc000076544c37, "64'h041",1) | |
| 227 | ||
| 228 | DMA56: nop; nop; nop; nop; nop | |
| 229 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA56)) -> EnablePCIeIgCmd("DMAWR", fffc000076544cb8, fffc000076544cb8, "64'h041",1) | |
| 230 | ||
| 231 | DMA57: nop; nop; nop; nop; nop | |
| 232 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA57)) -> EnablePCIeIgCmd("DMAWR", fffc000076544d39, fffc000076544d39, "64'h041",1) | |
| 233 | ||
| 234 | DMA58: nop; nop; nop; nop; nop | |
| 235 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA58)) -> EnablePCIeIgCmd("DMAWR", fffc000076544dba, fffc000076544dba, "64'h041",1) | |
| 236 | ||
| 237 | DMA59: nop; nop; nop; nop; nop | |
| 238 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA59)) -> EnablePCIeIgCmd("DMAWR", fffc000076544e3b, fffc000076544e3b, "64'h041",1) | |
| 239 | ||
| 240 | DMA60: nop; nop; nop; nop; nop | |
| 241 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA60)) -> EnablePCIeIgCmd("DMAWR", fffc000076544ebc, fffc000076544ebc, "64'h041",1) | |
| 242 | ||
| 243 | DMA61: nop; nop; nop; nop; nop | |
| 244 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA61)) -> EnablePCIeIgCmd("DMAWR", fffc000076544f3d, fffc000076544f3d, "64'h041",1) | |
| 245 | ||
| 246 | DMA62: nop; nop; nop; nop; nop | |
| 247 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA62)) -> EnablePCIeIgCmd("DMAWR", fffc00007654503e, fffc00007654503e, "64'h041",1) | |
| 248 | ||
| 249 | DMA63: nop; nop; nop; nop; nop | |
| 250 | ! $EV trig_pc_d(1,@VA(.MAIN.DMA63)) -> EnablePCIeIgCmd("DMAWR", fffc0000765450bf, fffc0000765450bf, "64'h041",1) | |
| 251 | ||
| 252 | ||
| 253 | ||
| 254 | ! select a CSR in the PIU and transmit the command to NCU | |
| 255 | ||
| 256 | setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_ADDR, %g1, %g2 | |
| 257 | setx 0x020, %g1, %g4 | |
| 258 | ||
| 259 | delay_loop: | |
| 260 | ldx [%g2], %g5 | |
| 261 | nop | |
| 262 | nop | |
| 263 | nop | |
| 264 | nop | |
| 265 | dec %g4 | |
| 266 | brnz %g4, delay_loop | |
| 267 | nop | |
| 268 | ||
| 269 | test_passed: | |
| 270 | EXIT_GOOD | |
| 271 | ||
| 272 | test_failed: | |
| 273 | EXIT_BAD | |
| 274 |