projects / OpenSPARC-T2-DV / blame
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| 86530b38 AT |
1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * OpenSPARC T2 Processor File: PCIeMem64AdrCov.s | |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 7 | * | |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License as published by | |
| 12 | * the Free Software Foundation; version 2 of the License. | |
| 13 | * | |
| 14 | * This program is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU General Public License | |
| 20 | * along with this program; if not, write to the Free Software | |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 22 | * | |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license | |
| 24 | * choice is available it will apply instead, Sun elects to use only | |
| 25 | * the General Public License version 2 (GPLv2) at this time for any | |
| 26 | * software where a choice of GPL license versions is made | |
| 27 | * available with the language indicating that GPLv2 or any later version | |
| 28 | * may be used, or where a choice of which version of the GPL is applied is | |
| 29 | * otherwise unspecified. | |
| 30 | * | |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 33 | * have any questions. | |
| 34 | * | |
| 35 | * | |
| 36 | * ========== Copyright Header End ============================================ | |
| 37 | */ | |
| 38 | #define ENABLE_PCIE_LINK_TRAINING | |
| 39 | #define MAIN_PAGE_HV_ALSO | |
| 40 | ||
| 41 | #include "hboot.s" | |
| 42 | #include "peu_defines.h" | |
| 43 | ||
| 44 | #define MEM64_BASE mpeval(N2_PCIE_BASE_ADDR + (MEM64_OFFSET_BASE_REG_DATA & 0x7fffffffffffffff)) | |
| 45 | ||
| 46 | #define MEM64_RD_ADDR0 MEM64_BASE | |
| 47 | ||
| 48 | !! For MEM64, the pcie spec says you need a bit set in 63-32 | |
| 49 | ||
| 50 | #define MEM64_OFFSET_WALK1 0x0100000001000000 | |
| 51 | ||
| 52 | #ifndef NO_SELF_CHECK | |
| 53 | #define BNE_TEST_FAIL bne test_failed | |
| 54 | #else | |
| 55 | #define BNE_TEST_FAIL nop | |
| 56 | #endif | |
| 57 | ||
| 58 | /************************************************************************ | |
| 59 | Test case code start | |
| 60 | ************************************************************************/ | |
| 61 | .text | |
| 62 | .global main | |
| 63 | ||
| 64 | main: | |
| 65 | ta T_CHANGE_HPRIV | |
| 66 | nop | |
| 67 | ||
| 68 | ! Load the PCIE MEM64 OFFSET Register address | |
| 69 | ||
| 70 | setx FIRE_DLC_IMU_ICS_CSR_A_MEM_64_PCIE_OFFSET_REG_ADDR, %g1, %g2 | |
| 71 | ||
| 72 | ! Get the initial walking 1 and 0 values | |
| 73 | ||
| 74 | setx MEM64_OFFSET_WALK1, %g1, %g3 | |
| 75 | ||
| 76 | mov 32, %g5 ! loop count | |
| 77 | ||
| 78 | setx MEM64_RD_ADDR0, %g1, %g6 ! PIO MEM64 address | |
| 79 | setx 0x0102030405060708, %g1, %g7 ! data value | |
| 80 | setx 0x1020304050607080, %g1, %l0 ! data value | |
| 81 | setx 0x0101010101010101, %g1, %o0 ! data increment value | |
| 82 | ||
| 83 | SetMem64Offset: | |
| 84 | stx %g3, [%g2] ! set the walking 1 mem 64 offset value | |
| 85 | ldx [%g2], %g4 ! make sure write has completed | |
| 86 | ||
| 87 | stx %g7,[%g6 + 0] ! pio mem 64 write | |
| 88 | stx %l0,[%g6 + 8] ! pio mem 64 write | |
| 89 | ||
| 90 | ||
| 91 | ldx [%g6], %l1 ! pio mem 64 read | |
| 92 | cmp %l1, %g7 | |
| 93 | BNE_TEST_FAIL | |
| 94 | nop | |
| 95 | ||
| 96 | ldx [%g6 + 8], %l2 ! pio mem 64 read | |
| 97 | cmp %l2, %l0 | |
| 98 | BNE_TEST_FAIL | |
| 99 | nop | |
| 100 | ||
| 101 | ! loop code | |
| 102 | sllx %g3, 1, %g3 ! shift walking 1 value left by 1 | |
| 103 | ||
| 104 | add %g7, %o0, %g7 ! increment data patterns | |
| 105 | add %l0, %o0, %l0 | |
| 106 | ||
| 107 | dec %g5 ! decrement counter | |
| 108 | brnz %g5, SetMem64Offset ! loop if not zero | |
| 109 | nop | |
| 110 | ||
| 111 | ||
| 112 | test_passed: | |
| 113 | EXIT_GOOD | |
| 114 | ||
| 115 | test_failed: | |
| 116 | EXIT_BAD |