projects / OpenSPARC-T2-DV / blame
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1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * OpenSPARC T2 Processor File: PCIeMemWr.s | |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 7 | * | |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License as published by | |
| 12 | * the Free Software Foundation; version 2 of the License. | |
| 13 | * | |
| 14 | * This program is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU General Public License | |
| 20 | * along with this program; if not, write to the Free Software | |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 22 | * | |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license | |
| 24 | * choice is available it will apply instead, Sun elects to use only | |
| 25 | * the General Public License version 2 (GPLv2) at this time for any | |
| 26 | * software where a choice of GPL license versions is made | |
| 27 | * available with the language indicating that GPLv2 or any later version | |
| 28 | * may be used, or where a choice of which version of the GPL is applied is | |
| 29 | * otherwise unspecified. | |
| 30 | * | |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 33 | * have any questions. | |
| 34 | * | |
| 35 | * | |
| 36 | * ========== Copyright Header End ============================================ | |
| 37 | */ | |
| 38 | #define ENABLE_PCIE_LINK_TRAINING | |
| 39 | /* #define MAIN_PAGE_NUCLEUS_ALSO */ /* Access main in priviledge mode */ | |
| 40 | #define MAIN_PAGE_HV_ALSO | |
| 41 | ||
| 42 | #include "hboot.s" | |
| 43 | #include "peu_defines.h" | |
| 44 | ||
| 45 | #define MEM_WR_ADDR mpeval(N2_PCIE_BASE_ADDR + MEM32_OFFSET_BASE_REG_DATA) | |
| 46 | ||
| 47 | /************************************************************************ | |
| 48 | Test case code start | |
| 49 | ************************************************************************/ | |
| 50 | .text | |
| 51 | .global main | |
| 52 | ||
| 53 | main: | |
| 54 | ta T_CHANGE_HPRIV | |
| 55 | nop | |
| 56 | ||
| 57 | ! select a Mem address in PCI address range and transmit the command to NCU | |
| 58 | ||
| 59 | ! store byte | |
| 60 | setx MEM_WR_ADDR, %g1, %g2 | |
| 61 | setx 0x23222120, %g1, %l0 | |
| 62 | stb %l0, [%g2] | |
| 63 | ||
| 64 | ! store half-word | |
| 65 | setx MEM_WR_ADDR, %g1, %g2 | |
| 66 | setx 0x33323130, %g1, %l0 | |
| 67 | sth %l0, [%g2] | |
| 68 | ||
| 69 | ! store word | |
| 70 | setx MEM_WR_ADDR, %g1, %g2 | |
| 71 | setx 0x7f7e7d7c, %g1, %l0 | |
| 72 | stw %l0, [%g2] | |
| 73 | ||
| 74 | ! store dword | |
| 75 | setx MEM_WR_ADDR, %g1, %g2 | |
| 76 | setx 0x3335373992828384, %g1, %l0 | |
| 77 | stx %l0, [%g2] | |
| 78 | ||
| 79 | ||
| 80 | test_passed: | |
| 81 | EXIT_GOOD | |
| 82 | ||
| 83 | test_failed: | |
| 84 | EXIT_BAD | |
| 85 | ||
| 86 | ||
| 87 |