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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: PCIeRFE6298418.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define ENABLE_PCIE_LINK_TRAINING | |
39 | #define MAIN_PAGE_HV_ALSO | |
40 | ||
41 | #include "hboot.s" | |
42 | #include "peu_defines.h" | |
43 | ||
44 | /************************************************************************ | |
45 | Test case code start | |
46 | ************************************************************************/ | |
47 | .text | |
48 | .global main | |
49 | ||
50 | main: | |
51 | ta T_CHANGE_HPRIV | |
52 | nop | |
53 | ||
54 | !!! scenerio 1 | |
55 | ||
56 | ! write "AA" into REQ_ID field of "DMC PCI Express Configuration Register". | |
57 | scenerio1: | |
58 | setx FIRE_DLC_CRU_CSR_A_DMC_PCIE_CFG_ADDR, %g1, %g2 | |
59 | set 0x0AAA, %g3 | |
60 | stx %g3, [%g2] | |
61 | ldx [%g2], %g6 | |
62 | ||
63 | ! update the PEU Slot Capabilities Register to gen "set_slot_power_limit" message | |
64 | setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_ADDR, %g1, %g4 | |
65 | set 0, %g5 | |
66 | stx %g5, [%g4] | |
67 | ldx [%g4], %g7 | |
68 | ||
69 | !!! scenerio 2 | |
70 | ||
71 | ! write "55" into REQ_ID field of "DMC PCI Express Configuration Register". | |
72 | scenerio2: | |
73 | setx FIRE_DLC_CRU_CSR_A_DMC_PCIE_CFG_ADDR, %g1, %g2 | |
74 | set 0x0555, %g3 | |
75 | stx %g3, [%g2] | |
76 | ldx [%g2], %g6 | |
77 | ||
78 | ! write the PTO field of the PEU PME Turn Off Generate Register, to generate | |
79 | ! a "PME_turn_off" message | |
80 | setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_ADDR, %g1, %g4 | |
81 | set 1, %g5 | |
82 | stx %g5, [%g4] | |
83 | ldx [%g4], %g7 | |
84 | ||
85 | ! write "ffff" into REQ_ID field of "DMC PCI Express Configuration Register". | |
86 | scenerio3: | |
87 | !setx FIRE_DLC_CRU_CSR_A_DMC_PCIE_CFG_ADDR, %g1, %g2 | |
88 | set 0xffff, %g3 | |
89 | stx %g3, [%g2] | |
90 | ldx [%g2], %g6 | |
91 | ||
92 | ! update the PEU Slot Capabilities Register to gen "set_slot_power_limit" message | |
93 | !setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_ADDR, %g1, %g4 | |
94 | set 0, %g5 | |
95 | stx %g5, [%g4] | |
96 | ldx [%g4], %g7 | |
97 | ||
98 | ! write "012d" into REQ_ID field of "DMC PCI Express Configuration Register". | |
99 | ! (for strange functional coverage object) | |
100 | scenerio4: | |
101 | !setx FIRE_DLC_CRU_CSR_A_DMC_PCIE_CFG_ADDR, %g1, %g2 | |
102 | set 0x012d, %g3 | |
103 | stx %g3, [%g2] | |
104 | ldx [%g2], %g6 | |
105 | ||
106 | ! write the PTO field of the PEU PME Turn Off Generate Register, to generate | |
107 | ! a "PME_turn_off" message | |
108 | !setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_ADDR, %g1, %g4 | |
109 | set 1, %g5 | |
110 | stx %g5, [%g4] | |
111 | ldx [%g4], %g7 | |
112 | ||
113 | ldx [%g4], %g7 | |
114 | ldx [%g4], %g7 | |
115 | ldx [%g4], %g7 | |
116 | ldx [%g4], %g7 | |
117 | ||
118 | test_passed: | |
119 | EXIT_GOOD | |
120 | ||
121 | test_failed: | |
122 | EXIT_BAD | |
123 | ||
124 |