[OpenSPARC-T2-DV] / verif / diag / assembly / spc / spc_mul_ldst.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: spc_mul_ldst.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#include "defines.h"
#include "nmacros.h"
#include "old_boot.s"


.text
.global main

main:
	ta	T_RD_THID
	mov	%o1, %l6
	umul	%l6, 256, %l7
	setx	DIAG_DATA_AREA, %g1, %g3
	add	%l7, %g3, %l7

	!# Float Registers
	INIT_TH_FP_REG(%l7, %f0, 0x55555555aaaaaaaa)
	INIT_TH_FP_REG(%l7, %f2, 0xaaaaaaaa55555555)
	INIT_TH_FP_REG(%l7, %f4, 0xfedcba9876543210)
	INIT_TH_FP_REG(%l7, %f6, 0x0123456789abcdef)
	INIT_TH_FP_REG(%l7, %f8, 0x55aa55aaff00ff00)
	INIT_TH_FP_REG(%l7, %f10, 0x1111111111111111)
	INIT_TH_FP_REG(%l7, %f12, 0x8888888888888888)
	INIT_TH_FP_REG(%l7, %f14, 0xfedcba9876543210)

!!	wr %g0, 4, %fprs
/*
 ********************************
 *  Multiply and Divide 
 ********************************
 */
!!-----------------------
!!	mulx
!!-----------------------
	set	0x0,	%l0

	set	0x3,	%l3
	set	0x9,	%l4
	set	0x1b,	%l5
mulx_start:
	mulx	%l3,	%l4,	%l6
mulx_end:
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0001,	%l1

	mulx	%l3,	0x9,	%l6
	sub	%l6,	%l5,	%l7
branch_nt_annul_start:	
	brnz,a	%l7,	diag_fail
	set	0xeeee0001,	%l1
branch_nt_annul_end:

	sub	%l0,	3,	%l3
	sub	%l0,	9,	%l4
	mulx	%l3,	%l4,	%l6
	sub	%l6,	%l5,	%l7
branch_nt_no_annul_start:
	! remove annull bit since it does not affect diag correctness
	! and it gives me an extra performance case to test - JSG
	brnz	%l7,	diag_fail
branch_nt_no_annul_end:
	set	0xeeee0001,	%l1

	mulx	%l3,	-9,	%l6
branch_nt_annul_icache_start:
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0001,	%l1
branch_nt_annul_icache_end:

	sub	%l0,	3,	%l3
	sub	%l0,	27,	%l6
	set	0x9,	%l4

	mulx	%l3,	%l4,	%l7
	sub	%l6,	%l7,	%l2
	brnz,a	%l2,	diag_fail	
	set	0xeeee0001,	%l1

	mulx	%l3,	0x9,	%l7
	sub	%l6,	%l7,	%l2
	brnz,a	%l2,	diag_fail	
	set	0xeeee0001,	%l1

!!------------------------------------
!!	sdivx	( signed divide )
!!------------------------------------
	set	0x0,	%l0
	set	0x3,	%l3
	set	0x9,	%l4
	set	0x1b,	%l5
	
	sdivx	%l5,	%l3,	%l6
	sub	%l6,	%l4,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0002,	%l1

	sdivx	%l5,	0x3,	%l6
	sub	%l6,	%l4,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0002,	%l1

	sub	%l0,	3,	%l3	/* l3 = -3 */
	sdivx	%l5,	%l3,	%l6
	add	%l6,	%l4,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0002,	%l1

	sub	%l0,	3,	%l3	/* l3 = -3 */
	sub	%l0,	27,	%l5	/* l5 = -27 */

	sdivx	%l5,	%l3,	%l6
	sub	%l6,	%l4,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0002,	%l1
	
	sdivx	%l5,	-3,	%l6
	sub	%l6,	%l4,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0002,	%l1

!!------------------------------------
!!	udivx	( divide )
!!------------------------------------
	set	0x0,	%l0
	set	0x3,	%l3
	set	0x9,	%l4
	set	0x1b,	%l5
	
	udivx	%l5,	%l3,	%l6
	sub	%l6,	%l4,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0002,	%l1

	udivx	%l5,	0x3,	%l6
	sub	%l6,	%l4,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0002,	%l1

	sub	%l0,	3,	%l3	/* l3 = 0xfffffffffffffffd */
	udivx	%l5,	%l3,	%l6	/* l6 = l5/l3 = 0 round */
	brnz,a	%l6,	diag_fail
	set	0xeeee0002,	%l1

	sub	%l0,	3,	%l3	/* l3 = 0xfffffffffffffffd */
	sub	%l0,	27,	%l5	/* l5 = 0xffffffffffffffe5 */

	udivx	%l5,	%l3,	%l6	/* l6 = l5/l3 = 0 rounded */
	brnz,a	%l6,	diag_fail
	set	0xeeee0002,	%l1
	
	udivx	%l5,	-3,	%l6
	brnz,a	%l6,	diag_fail
	set	0xeeee0002,	%l1

!!-----------------------
!!	umul
!!-----------------------
	set	0x0,	%l0

	set	0x3,	%l3
	set	0x9,	%l4
	set	0x1b,	%l5

	umul	%l3,	%l4,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0003,	%l1

	umul	%l3,	0x9,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0003,	%l1

!!-----------------------
!!	smul
!!-----------------------
	set	0x0,	%l0

	set	0x3,	%l3
	set	0x9,	%l4
	set	0x1b,	%l5

	smul	%l3,	%l4,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0004,	%l1

	smul	%l3,	0x9,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0004,	%l1

	sub	%l0,	3,	%l3
	sub	%l0,	9,	%l4
	smul	%l3,	%l4,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0004,	%l1

	smul	%l3,	-9,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0004,	%l1

	sub	%l0,	3,	%l3
	sub	%l0,	27,	%l6
	set	0x9,	%l4

	smul	%l3,	%l4,	%l7
	sub	%l6,	%l7,	%l2
	brnz,a	%l2,	diag_fail	
	set	0xeeee0004,	%l1

	smul	%l3,	0x9,	%l7
	sub	%l6,	%l7,	%l2
	brnz,a	%l2,	diag_fail	
	set	0xeeee0004,	%l1

!!-----------------------
!!	umulcc
!!-----------------------
	set	0x0,	%l0

	set	0x3,	%l3
	set	0x9,	%l4
	set	0x1b,	%l5

	umulcc	%l3,	%l4,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0005,	%l1

	umulcc	%l3,	0x9,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0005,	%l1

	umulcc	%l3,	%l0,	%l2	/* Z set */
	bne,a	%icc,	diag_fail
	set	0xeeee0005,	%l1

	bne,a	%xcc,	diag_fail
	set	0xeeee0005,	%l1

	set	0x40000000,	%l3
	set	0x2,	%l4
	umulcc	%l3,	%l4,	%l2	/* icc.N set */
	bpos,a	%icc,	diag_fail
	set	0xeeee0005,	%l1
	
	set	0x0,	%l0	
	set	0xffffffff, 	%l3
	set	0xffffffff, 	%l4
	umulcc	%l3,	%l4,	%l2	/* XCC.N set */
	bpos,a	%xcc,	diag_fail
	set	0xeeee0005,	%l1
		
!!-----------------------
!!	smulcc
!!-----------------------
	set	0x0,	%l0

	set	0x3,	%l3
	set	0x9,	%l4
	set	0x1b,	%l5

	smulcc	%l3,	%l4,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0006,	%l1

	smulcc	%l3,	0x9,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0006,	%l1

	sub	%l0,	3,	%l3
	sub	%l0,	9,	%l4
	smulcc	%l3,	%l4,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0006,	%l1

	smulcc	%l3,	-9,	%l6
	sub	%l6,	%l5,	%l7
	brnz,a	%l7,	diag_fail
	set	0xeeee0006,	%l1

	sub	%l0,	3,	%l3
	sub	%l0,	27,	%l6
	set	0x9,	%l4

	smulcc	%l3,	%l4,	%l7
	sub	%l6,	%l7,	%l2
	brnz,a	%l2,	diag_fail	
	set	0xeeee0006,	%l1

	smulcc	%l3,	0x9,	%l7
	sub	%l6,	%l7,	%l2
	brnz,a	%l2,	diag_fail	
	set	0xeeee0006,	%l1

	set	0x0,	%l0
	smulcc	%l3,	%l0,	%l2	/* Z set */
	bne,a	%icc,	diag_fail
	set	0xeeee0005,	%l1

	bne,a	%xcc,	diag_fail
	set	0xeeee0005,	%l1

	set	0x40000000,	%l3
	set	0x2,	%l4
	smulcc	%l3,	%l4,	%l2	/* icc.N set */
	bpos,a	%icc,	diag_fail
	set	0xeeee0005,	%l1
		
	set	0x0,	%l0	
	set	0xffffffff,	%l3
	set	0x7fffffff,	%l4
	smulcc	%l3,	%l4,	%l2	/* XCC.N set */
	bpos,a	%xcc,	diag_fail
	set	0xeeee0005,	%l1

	/* smul signed value */
	set	0x0,	%l0
	set	0x4,	%l3
	set	0x2,	%l4

	sub	%l0,	%l3,	%l5
	smulcc	%l3,	%l5,	%l6	/* icc.N set */
	bpos,a	%icc,	diag_fail
	set	0xeeee0005,	%l1
		
	bpos,a	%xcc,	diag_fail
	set	0xeeee0005,	%l1
	
/*
 *********************************
 *	SETHI
 *********************************
 */
	sethi	0x3faacc,	%l1
	set	0x3faacc,	%l2
	sll	%l2,	10,	%l4
	sub	%l1,	%l4,	%l3
	brnz,a	%l3,	diag_fail
	set	0xffffdd00,	%l1

	sethi	%hi(0xabcd1234), %l1
	or	%l1,	0x234,	%l1
	set	0xabcd1234,	%l2
	sub	%l1,	%l2,	%l3
	brnz,a	%l3,	diag_fail
	set	0xffffdd00,	%l1

	set	0x1,	%l0
	sethi	0x0,	%l0	/* like a nop */

/*
 *********************************
 *	SHIFT 
 *********************************
 */
!!----------------------
!!	shift left 32b
!!----------------------
	set	0xffffffff,	%l0
	sll	%l0,	31,	%l1
	set	0x0,	%l0
	setx	0x7fffffff80000000, %l0, %l2
	sub	%l2,	%l1,	%l3
	brnz,a	%l3,	diag_fail
	set	0xfffeee01,	%l1	

	set	0x1,	%l0
	set	4,	%l1
	sll	%l0,	%l1,	%l2
	set	0x10,	%l3
	sub	%l3,	%l2,	%l4
	brnz,a	%l4,	diag_fail
	set	0xfffeee01,	%l1

!!----------------------
!!	shift left 64b
!!----------------------
	set	0xffffffff,	%l0
	sllx	%l0,	32,	%l1
	set	0x0,	%l0
	setx	0xffffffff00000000, %l0, %l2	
	sub	%l1,	%l2,	%l3
	brnz,a	%l3,	diag_fail
	set	0xfffeee01,	%l1	

	set	0xffffffff,	%l0
	sllx	%l0,	63,	%l1
	set	0x0,	%l0
	setx	0x8000000000000000, %l0, %l2	
	sub	%l1,	%l2,	%l3
	brnz,a	%l3,	diag_fail
	set	0xfffeee01,	%l1	

	set	0x1,	%l0
	set	4,	%l1
	sllx	%l0,	%l1,	%l2
	set	0x10,	%l3
	sub	%l3,	%l2,	%l4
	brnz,a	%l4,	diag_fail
	set	0xfffeee01,	%l1

!!----------------------
!!	shift right 32b
!!----------------------
	set	0x80000000,	%l0
	srl	%l0,	31,	%l1
	srl	%l1,	1,	%l2
	brnz,a	%l2,	diag_fail
	set	0xfffeee02,	%l1	

	set	0x800,	%l0
	set	4,	%l1
	srl	%l0,	%l1,	%l2
	set	0x80,	%l3
	sub	%l3,	%l2,	%l4
	brnz,a	%l4,	diag_fail
	set	0xfffeee02,	%l1

!!----------------------
!!	shift right 64b
!!----------------------
	set	0x0,	%l0
	setx	0x8000000000000000, %l0, %l1
	srlx	%l1,	63,	%l2
	srlx	%l2,	1,	%l3
	brnz,a	%l3,	diag_fail
	set	0xfffeee03,	%l1	

	set	0x0,	%l0
	setx	0x8000000000000000, %l0, %l1
	set	16,	%l2
	srlx	%l1,	%l2,	%l3
	srlx	%l3,	%l2,	%l4

	set	0x80000000,	%l5
	sub	%l5,	%l4,	%l6
	brnz,a	%l6,	diag_fail
	set	0xfffeee03,	%l1

!!----------------------
!!	shift right 32b
!!	  arithmetic
!!----------------------
	set	0x80000000,	%l0
	sra	%l0,	31,	%l1
	sra	%l1,	1,	%l2

	set	0x0,	%l3
	setx	0xffffffffffffffff, %l3, %l4	
	sub	%l2,	%l4,	%l5
	brnz,a	%l5,	diag_fail
	set	0xfffeee02,	%l1	

	set	0x800,	%l0
	set	4,	%l1
	sra	%l0,	%l1,	%l2
	set	0x80,	%l3
	sub	%l3,	%l2,	%l4
	brnz,a	%l4,	diag_fail
	set	0xfffeee02,	%l1

!!----------------------
!!	shift right 64b
!!----------------------
	set	0x0,	%l0
	setx	0x8000000000000000, %l0, %l1
	srax	%l1,	63,	%l2
	srax	%l2,	1,	%l3
	
	set	0x0,	%l0
	setx	0xffffffffffffffff, %l0, %l4	
	sub	%l4,	%l3,	%l5
	brnz,a	%l5,	diag_fail
	set	0xfffeee03,	%l1	

	set	0x0,	%l0
	setx	0x8000000000000000, %l0, %l1
	set	16,	%l2
	srax	%l1,	%l2,	%l3
	srax	%l3,	%l2,	%l4

	set	0x0,	%l0
	setx	0xffffffff80000000, %l0, %l5
	sub	%l5,	%l4,	%l6
	brnz,a	%l6,	diag_fail
	set	0xfffeee03,	%l1

/*
 ***************************
 * Load FSR from Memory 
 ***************************
 */
!!------------------------
!! LDFSR 
!!------------------------
	setx	ldfsr_sdata,	%l0,	%l2
	set	0x0,	%l0
	ld	[%l2+%l0],	%i5

	ld	[%l2+%l0],	%fsr	/* %fcc0 = 10 fs1 > fs2 */

	fble	%fcc0,	diag_fail

	add	%l0,	0x4,	%l0
	set	0xffff0005,	%l1

	ld	[%l2+%l0],	%fsr	/* %fcc0 = 01 fs1 < fs2 */

	fbge	%fcc0,	diag_fail

	add	%l0,	0x4,	%l0
	set	0xffff0005,	%l1

	ld	[%l2+%l0],	%fsr	/* %fcc0 = 00 fs1 = fs2 */

	add	%l0,	0x4,	%l0
	fbne	%fcc0,	diag_fail

	set	0xffff0005,	%l1

!!------------------------
!! LDXFSR 
!!------------------------
	setx	ldfsr_ddata,	%l0,	%l2
	set	0x0,	%l0

	ldx	[%l2+%l0],	%fsr	/* %fcc0 = 10 fs1 > fs2 */
	add	%l0,	0x8,	%l0

	fble	%fcc0,	diag_fail
	set	0xffff0006,	%l1

	ldx	[%l2+%l0],	%fsr	/* %fcc0 = 01 fs1 < fs2 */
	add	%l0,	0x8,	%l0

	fbge	%fcc0,	diag_fail
	set	0xffff0006,	%l1

	ldx	[%l2+%l0],	%fsr	/* %fcc0 = 00 fs1 = fs2 */
	add	%l0,	0x8,	%l0

	fbne	%fcc0,	diag_fail
	set	0xffff0006,	%l1

/*
 *********************************
 *  Store Floating Point
 *********************************
 */
        /* load the fp data from the memory */
        /* load single fp */
        setx    fps_cvt_nmd1,   %l0,    %l1
        set     0x0,    %l0

        ld      [%l1+%l0],      %f0     /* f0 = 2 * (1+1/2) */
        add     %l0,    0x4,    %l0

        ld      [%l1+%l0],      %f2     /* f2 = 4 * (1+1/2) */
        add     %l0,    0x4,    %l0

        ld      [%l1+%l0],      %f4     /* f4 = 8 * (1+1/8) */

        /* load double fp */
        set     0x0,    %l0
        setx    fpd_cvt_nmd1,   %l0,    %l1

        ldd     [%l1+%l0],      %f6     /* f6 = 2 * (1+1/2) */
        add     %l0,    0x8,    %l0

        ldd     [%l1+%l0],      %f8     /* f8 = 4 * (1+1/2) */
        add     %l0,    0x8,    %l0

        ldd     [%l1+%l0],      %f10     /* f10 = 8 * (1+1/8) */
        add     %l0,    0x8,    %l0

        ldd     [%l1+%l0],      %f12     /* f12 = 32 * (1+1/8) = 36 */
        nop

	/* 
	 * store single
	 */
!!--------------------------
!!  st freg, [addr]	
!!--------------------------
	setx	stfsr_sdata,	%l0,	%l2		
	set	0x0,	%l0

	st	%f0,	[%l2+%l0]
	add	%l0,	0x4,	%l0

	st	%f2,	[%l2+%l0]
	add	%l0,	0x4,	%l0

	set	0x0,	%l0	
	ld	[%l2+%l0],	%f14	/* f14 should = f0 */
	add	%l0,	0x4,	%l0
	fcmps	%fcc0,	%f14,	%f0
	fbne,a	diag_fail
	set	0xffeeff01,	%l1

	ld	[%l2+%l0],	%f16	/* f16 should = f2 */
	nop
	fcmps	%fcc0,	%f16,	%f2
	fbne,a	diag_fail
	set	0xffeeff01,	%l1

	/* 
	 * store double
	 */
!!--------------------------
!!  std freg, [addr]	
!!--------------------------
	setx	stfsr_ddata,	%l0,	%l2		
	set	0x0,	%l0

	std	%f8,	[%l2+%l0]
	add	%l0,	0x8,	%l0

	std	%f10,	[%l2+%l0]
	add	%l0,	0x8,	%l0

	set	0x0,	%l0	
	ldd	[%l2+%l0],	%f14	/* f14 should = f8 */
	add	%l0,	0x8,	%l0

	fcmpd	%fcc0,	%f14,	%f8
	fbne,a	diag_fail
	set	0xffeeff81,	%l1

	ldd	[%l2+%l0],	%f16	/* f16 should = f10 */
	nop
	fcmpd	%fcc0,	%f16,	%f10
	fbne,a	diag_fail
	set	0xffeeff81,	%l1

	/* 
	 * store fsr : single
	 */
!!--------------------------
!!  st %fsr, [addr]	
!!--------------------------
        setx    ldfsr_sdata,    %l0,    %l2
        set     0x0,    %l0
        ld      [%l2+%l0],      %fsr    /* %fcc0 = 10 fs1 > fs2 */
        add     %l0,    0x4,    %l0

	set	0x0,	%l0
	setx	stfsr_sdata,	%l0,	%l2
	st	%fsr,	[%l2+%l0]
	nop

	ld	[%l2+%l0],	%fsr
	nop
        fble    %fcc0,  diag_fail
        set     0xffff5000,     %l1

	/* 
	 * store fsr : double
	 */
!!--------------------------
!!  stx %fsr, [addr]	
!!--------------------------
        setx    ldfsr_ddata,    %l0,    %l2
        set     0x0,    %l0
        ldx     [%l2+%l0],      %fsr    /* %fcc0 = 10 fs1 > fs2 */

	setx	stfsr_ddata,	%l0,	%l2
	set	0x0,	%l0
	stx	%fsr,	[%l2+%l0]
	nop

	ldx	[%l2+%l0],	%fsr
	nop
        fble    %fcc0,  diag_fail
        set     0xffff6000,     %l1

/*
 ********************************
 *      Diag PASSED !           *
 ********************************
 */
diag_pass:
        set     0xaaddcafe,     %l0
        EXIT_GOOD
        nop

/*
 ********************************
 *      Diag FAILED !           *
 ********************************
 */
diag_fail:
        set     0xdeadcafe,     %l0
        EXIT_BAD
        nop

.data	

ldint_1:	.word	0x55aa11bb
		.word	0xaa5577ff
		.word	0x77aa55bb
		.word	0xaa55ff44

fst_data:       .xword  0x700f000000000000
                .xword  0x700f000000000000
                .xword  0x700ff00000000000
                .xword  0x700ff00000000000

stfsr_sdata:    .word   0x00000000
                .word   0x00000000
                .word   0x00000000
                .word   0x00000000

stfsr_ddata:    .xword  0x0000000000000000
                .xword  0x0000000000000000
                .xword  0x0000000000000000
                .xword  0x0000000000000000

stfps_nmdata:   .word   0x00000000
                .word   0x00000000
                .word   0x00000000
                .word   0x00000000

stfpd_nmdata:   .xword  0x0000000000000000
                .xword  0x0000000000000000
                .xword  0x0000000000000000
                .xword  0x0000000000000000

stint_1:        .word   0x00000000
                .word   0x00000000
                .word   0x00000000
                .word   0x00000000

stint_asi1:     .word   0x00000000
                .word   0x00000000
                .word   0x00000000
                .word   0x00000000

stint_asi2:     .word   0x00000000
                .word   0x00000000
                .word   0x00000000
                .word   0x00000000


ldfsr_sdata:    .word   0x00000800
                .word   0x00000400
                .word   0x00000000
                .word   0x00000c00

ldfsr_ddata:    .xword  0x0000000000000800
                .xword  0x0000000000000400
                .xword  0x0000000000000000
                .xword  0x0000000000000c00

fps_data:       .word   0x00200000
                .word   0x00400000
                .word   0x00600000
                .word   0x00a00000

fps_nmdata:     .word   0x70200000
                .word   0x70400000
                .word   0x70b00000
                .word   0x70b00000

fpd_data:       .xword  0x0002000000000000
                .xword  0x0004000000000000
                .xword  0x0006000000000000
                .xword  0x0008000000000000

fpd_nmdata:     .xword  0x7002000000000000
                .xword  0x7004000000000000
                .xword  0x700b000000000000
                .xword  0x700b000000000000

fpquad_data:    .xword  0x0000200000000000
                .xword  0x0000000000000000
                .xword  0x0000400000000000
                .xword  0x0000000000000000
                .xword  0x0000600000000000
                .xword  0x0000000000000000
                .xword  0x0000800000000000
                .xword  0x0000000000000000

fpquad_nmdata:  .xword  0x7000200000000000
                .xword  0x0000000000000000
                .xword  0x7000400000000000
                .xword  0x0000000000000000
                .xword  0x7000b00000000000
                .xword  0x0000000000000000
                .xword  0x7000b00000000000
                .xword  0x0000000000000000

fps_cvt_data1:	.word	0x00200000
		.word	0x00400000
		.word	0x00600000
		.word	0x00a00000

fps_cvt_nmd1:	.word	0x40400000	/* 3 */
		.word	0x40c00000	/* 6 */
		.word	0x41100000	/* 9 */
		.word	0x42100000	/* 36 */ 

fpd_cvt_data1:	.xword 	0x0002000000000000
		.xword 	0x0004000000000000
		.xword 	0x0006000000000000
		.xword 	0x0008000000000000

fpd_cvt_nmd1:	.xword 	0x4008000000000000	/* 3 */
		.xword 	0x4018000000000000	/* 6 */
		.xword 	0x4022000000000000	/* 9 */
		.xword 	0x4042000000000000	/* 36 */

int2fps_nmd1: 	.word	0x00000003
		.word	0x00000006
		.word	0x00000009
		.word	0x00000000

int2fpd_nmd1: 	.xword	0x0000000000000003
		.xword	0x0000000000000006
		.xword	0x0000000000000009
		.xword	0x0000000000000000

fps_muldv_nmd1:	.word	0x40400000	/* 3 */
		.word	0x40c00000	/* 6 */
		.word	0x41900000	/* 18 = 16*(1+1/8) */
		.word	0x42100000	/* 36 */

fpd_muldv_nmd1:	.xword 	0x4008000000000000	/* 3 */
		.xword 	0x4018000000000000	/* 6 */
		.xword 	0x4032000000000000	/* 18 */
		.xword 	0x4042000000000000	/* 36 */	 

fps_sqr_nmd1:	.word	0x40400000	/* 3 */
		.word	0x40c00000	/* 6 */
		.word	0x41100000	/* 9 = 8*(1+1/8) */
		.word	0x42100000	/* 36 = 32*(1+1/8) */

fpd_sqr_nmd1:	.xword 	0x4008000000000000	/* 3 */
		.xword 	0x4018000000000000	/* 6 */
		.xword 	0x4022000000000000	/* 9 */
		.xword 	0x4042000000000000	/* 36 */	 

.end
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: spc_mul_ldst.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#include "defines.h"
	39	#include "nmacros.h"
	40	#include "old_boot.s"
	41
	42
	43	.text
	44	.global main
	45
	46	main:
	47	ta T_RD_THID
	48	mov %o1, %l6
	49	umul %l6, 256, %l7
	50	setx DIAG_DATA_AREA, %g1, %g3
	51	add %l7, %g3, %l7
	52
	53	!# Float Registers
	54	INIT_TH_FP_REG(%l7, %f0, 0x55555555aaaaaaaa)
	55	INIT_TH_FP_REG(%l7, %f2, 0xaaaaaaaa55555555)
	56	INIT_TH_FP_REG(%l7, %f4, 0xfedcba9876543210)
	57	INIT_TH_FP_REG(%l7, %f6, 0x0123456789abcdef)
	58	INIT_TH_FP_REG(%l7, %f8, 0x55aa55aaff00ff00)
	59	INIT_TH_FP_REG(%l7, %f10, 0x1111111111111111)
	60	INIT_TH_FP_REG(%l7, %f12, 0x8888888888888888)
	61	INIT_TH_FP_REG(%l7, %f14, 0xfedcba9876543210)
	62
	63	!! wr %g0, 4, %fprs
	64	/*
65	********************************
66	* Multiply and Divide
67	********************************
68	*/
69	!!-----------------------
70	!! mulx
71	!!-----------------------
72	set 0x0, %l0
73
74	set 0x3, %l3
75	set 0x9, %l4
76	set 0x1b, %l5
77	mulx_start:
78	mulx %l3, %l4, %l6
79	mulx_end:
80	sub %l6, %l5, %l7
81	brnz,a %l7, diag_fail
82	set 0xeeee0001, %l1
83
84	mulx %l3, 0x9, %l6
85	sub %l6, %l5, %l7
86	branch_nt_annul_start:
87	brnz,a %l7, diag_fail
88	set 0xeeee0001, %l1
89	branch_nt_annul_end:
90
91	sub %l0, 3, %l3
92	sub %l0, 9, %l4
93	mulx %l3, %l4, %l6
94	sub %l6, %l5, %l7
95	branch_nt_no_annul_start:
96	! remove annull bit since it does not affect diag correctness
97	! and it gives me an extra performance case to test - JSG
98	brnz %l7, diag_fail
99	branch_nt_no_annul_end:
100	set 0xeeee0001, %l1
101
102	mulx %l3, -9, %l6
103	branch_nt_annul_icache_start:
104	sub %l6, %l5, %l7
105	brnz,a %l7, diag_fail
106	set 0xeeee0001, %l1
107	branch_nt_annul_icache_end:
108
109	sub %l0, 3, %l3
110	sub %l0, 27, %l6
111	set 0x9, %l4
112
113	mulx %l3, %l4, %l7
114	sub %l6, %l7, %l2
115	brnz,a %l2, diag_fail
116	set 0xeeee0001, %l1
117
118	mulx %l3, 0x9, %l7
119	sub %l6, %l7, %l2
120	brnz,a %l2, diag_fail
121	set 0xeeee0001, %l1
122
123	!!------------------------------------
124	!! sdivx ( signed divide )
125	!!------------------------------------
126	set 0x0, %l0
127	set 0x3, %l3
128	set 0x9, %l4
129	set 0x1b, %l5
130
131	sdivx %l5, %l3, %l6
132	sub %l6, %l4, %l7
133	brnz,a %l7, diag_fail
134	set 0xeeee0002, %l1
135
136	sdivx %l5, 0x3, %l6
137	sub %l6, %l4, %l7
138	brnz,a %l7, diag_fail
139	set 0xeeee0002, %l1
140
141	sub %l0, 3, %l3 /* l3 = -3 */
142	sdivx %l5, %l3, %l6
143	add %l6, %l4, %l7
144	brnz,a %l7, diag_fail
145	set 0xeeee0002, %l1
146
147	sub %l0, 3, %l3 /* l3 = -3 */
148	sub %l0, 27, %l5 /* l5 = -27 */
149
150	sdivx %l5, %l3, %l6
151	sub %l6, %l4, %l7
152	brnz,a %l7, diag_fail
153	set 0xeeee0002, %l1
154
155	sdivx %l5, -3, %l6
156	sub %l6, %l4, %l7
157	brnz,a %l7, diag_fail
158	set 0xeeee0002, %l1
159
160	!!------------------------------------
161	!! udivx ( divide )
162	!!------------------------------------
163	set 0x0, %l0
164	set 0x3, %l3
165	set 0x9, %l4
166	set 0x1b, %l5
167
168	udivx %l5, %l3, %l6
169	sub %l6, %l4, %l7
170	brnz,a %l7, diag_fail
171	set 0xeeee0002, %l1
172
173	udivx %l5, 0x3, %l6
174	sub %l6, %l4, %l7
175	brnz,a %l7, diag_fail
176	set 0xeeee0002, %l1
177
178	sub %l0, 3, %l3 /* l3 = 0xfffffffffffffffd */
179	udivx %l5, %l3, %l6 /* l6 = l5/l3 = 0 round */
180	brnz,a %l6, diag_fail
181	set 0xeeee0002, %l1
182
183	sub %l0, 3, %l3 /* l3 = 0xfffffffffffffffd */
184	sub %l0, 27, %l5 /* l5 = 0xffffffffffffffe5 */
185
186	udivx %l5, %l3, %l6 /* l6 = l5/l3 = 0 rounded */
187	brnz,a %l6, diag_fail
188	set 0xeeee0002, %l1
189
190	udivx %l5, -3, %l6
191	brnz,a %l6, diag_fail
192	set 0xeeee0002, %l1
193
194	!!-----------------------
195	!! umul
196	!!-----------------------
197	set 0x0, %l0
198
199	set 0x3, %l3
200	set 0x9, %l4
201	set 0x1b, %l5
202
203	umul %l3, %l4, %l6
204	sub %l6, %l5, %l7
205	brnz,a %l7, diag_fail
206	set 0xeeee0003, %l1
207
208	umul %l3, 0x9, %l6
209	sub %l6, %l5, %l7
210	brnz,a %l7, diag_fail
211	set 0xeeee0003, %l1
212
213	!!-----------------------
214	!! smul
215	!!-----------------------
216	set 0x0, %l0
217
218	set 0x3, %l3
219	set 0x9, %l4
220	set 0x1b, %l5
221
222	smul %l3, %l4, %l6
223	sub %l6, %l5, %l7
224	brnz,a %l7, diag_fail
225	set 0xeeee0004, %l1
226
227	smul %l3, 0x9, %l6
228	sub %l6, %l5, %l7
229	brnz,a %l7, diag_fail
230	set 0xeeee0004, %l1
231
232	sub %l0, 3, %l3
233	sub %l0, 9, %l4
234	smul %l3, %l4, %l6
235	sub %l6, %l5, %l7
236	brnz,a %l7, diag_fail
237	set 0xeeee0004, %l1
238
239	smul %l3, -9, %l6
240	sub %l6, %l5, %l7
241	brnz,a %l7, diag_fail
242	set 0xeeee0004, %l1
243
244	sub %l0, 3, %l3
245	sub %l0, 27, %l6
246	set 0x9, %l4
247
248	smul %l3, %l4, %l7
249	sub %l6, %l7, %l2
250	brnz,a %l2, diag_fail
251	set 0xeeee0004, %l1
252
253	smul %l3, 0x9, %l7
254	sub %l6, %l7, %l2
255	brnz,a %l2, diag_fail
256	set 0xeeee0004, %l1
257
258	!!-----------------------
259	!! umulcc
260	!!-----------------------
261	set 0x0, %l0
262
263	set 0x3, %l3
264	set 0x9, %l4
265	set 0x1b, %l5
266
267	umulcc %l3, %l4, %l6
268	sub %l6, %l5, %l7
269	brnz,a %l7, diag_fail
270	set 0xeeee0005, %l1
271
272	umulcc %l3, 0x9, %l6
273	sub %l6, %l5, %l7
274	brnz,a %l7, diag_fail
275	set 0xeeee0005, %l1
276
277	umulcc %l3, %l0, %l2 /* Z set */
278	bne,a %icc, diag_fail
279	set 0xeeee0005, %l1
280
281	bne,a %xcc, diag_fail
282	set 0xeeee0005, %l1
283
284	set 0x40000000, %l3
285	set 0x2, %l4
286	umulcc %l3, %l4, %l2 /* icc.N set */
287	bpos,a %icc, diag_fail
288	set 0xeeee0005, %l1
289
290	set 0x0, %l0
291	set 0xffffffff, %l3
292	set 0xffffffff, %l4
293	umulcc %l3, %l4, %l2 /* XCC.N set */
294	bpos,a %xcc, diag_fail
295	set 0xeeee0005, %l1
296
297	!!-----------------------
298	!! smulcc
299	!!-----------------------
300	set 0x0, %l0
301
302	set 0x3, %l3
303	set 0x9, %l4
304	set 0x1b, %l5
305
306	smulcc %l3, %l4, %l6
307	sub %l6, %l5, %l7
308	brnz,a %l7, diag_fail
309	set 0xeeee0006, %l1
310
311	smulcc %l3, 0x9, %l6
312	sub %l6, %l5, %l7
313	brnz,a %l7, diag_fail
314	set 0xeeee0006, %l1
315
316	sub %l0, 3, %l3
317	sub %l0, 9, %l4
318	smulcc %l3, %l4, %l6
319	sub %l6, %l5, %l7
320	brnz,a %l7, diag_fail
321	set 0xeeee0006, %l1
322
323	smulcc %l3, -9, %l6
324	sub %l6, %l5, %l7
325	brnz,a %l7, diag_fail
326	set 0xeeee0006, %l1
327
328	sub %l0, 3, %l3
329	sub %l0, 27, %l6
330	set 0x9, %l4
331
332	smulcc %l3, %l4, %l7
333	sub %l6, %l7, %l2
334	brnz,a %l2, diag_fail
335	set 0xeeee0006, %l1
336
337	smulcc %l3, 0x9, %l7
338	sub %l6, %l7, %l2
339	brnz,a %l2, diag_fail
340	set 0xeeee0006, %l1
341
342	set 0x0, %l0
343	smulcc %l3, %l0, %l2 /* Z set */
344	bne,a %icc, diag_fail
345	set 0xeeee0005, %l1
346
347	bne,a %xcc, diag_fail
348	set 0xeeee0005, %l1
349
350	set 0x40000000, %l3
351	set 0x2, %l4
352	smulcc %l3, %l4, %l2 /* icc.N set */
353	bpos,a %icc, diag_fail
354	set 0xeeee0005, %l1
355
356	set 0x0, %l0
357	set 0xffffffff, %l3
358	set 0x7fffffff, %l4
359	smulcc %l3, %l4, %l2 /* XCC.N set */
360	bpos,a %xcc, diag_fail
361	set 0xeeee0005, %l1
362
363	/* smul signed value */
364	set 0x0, %l0
365	set 0x4, %l3
366	set 0x2, %l4
367
368	sub %l0, %l3, %l5
369	smulcc %l3, %l5, %l6 /* icc.N set */
370	bpos,a %icc, diag_fail
371	set 0xeeee0005, %l1
372
373	bpos,a %xcc, diag_fail
374	set 0xeeee0005, %l1
375
376	/*
377	*********************************
378	* SETHI
379	*********************************
380	*/
381	sethi 0x3faacc, %l1
382	set 0x3faacc, %l2
383	sll %l2, 10, %l4
384	sub %l1, %l4, %l3
385	brnz,a %l3, diag_fail
386	set 0xffffdd00, %l1
387
388	sethi %hi(0xabcd1234), %l1
389	or %l1, 0x234, %l1
390	set 0xabcd1234, %l2
391	sub %l1, %l2, %l3
392	brnz,a %l3, diag_fail
393	set 0xffffdd00, %l1
394
395	set 0x1, %l0
396	sethi 0x0, %l0 /* like a nop */
397
398	/*
399	*********************************
400	* SHIFT
401	*********************************
402	*/
403	!!----------------------
404	!! shift left 32b
405	!!----------------------
406	set 0xffffffff, %l0
407	sll %l0, 31, %l1
408	set 0x0, %l0
409	setx 0x7fffffff80000000, %l0, %l2
410	sub %l2, %l1, %l3
411	brnz,a %l3, diag_fail
412	set 0xfffeee01, %l1
413
414	set 0x1, %l0
415	set 4, %l1
416	sll %l0, %l1, %l2
417	set 0x10, %l3
418	sub %l3, %l2, %l4
419	brnz,a %l4, diag_fail
420	set 0xfffeee01, %l1
421
422	!!----------------------
423	!! shift left 64b
424	!!----------------------
425	set 0xffffffff, %l0
426	sllx %l0, 32, %l1
427	set 0x0, %l0
428	setx 0xffffffff00000000, %l0, %l2
429	sub %l1, %l2, %l3
430	brnz,a %l3, diag_fail
431	set 0xfffeee01, %l1
432
433	set 0xffffffff, %l0
434	sllx %l0, 63, %l1
435	set 0x0, %l0
436	setx 0x8000000000000000, %l0, %l2
437	sub %l1, %l2, %l3
438	brnz,a %l3, diag_fail
439	set 0xfffeee01, %l1
440
441	set 0x1, %l0
442	set 4, %l1
443	sllx %l0, %l1, %l2
444	set 0x10, %l3
445	sub %l3, %l2, %l4
446	brnz,a %l4, diag_fail
447	set 0xfffeee01, %l1
448
449	!!----------------------
450	!! shift right 32b
451	!!----------------------
452	set 0x80000000, %l0
453	srl %l0, 31, %l1
454	srl %l1, 1, %l2
455	brnz,a %l2, diag_fail
456	set 0xfffeee02, %l1
457
458	set 0x800, %l0
459	set 4, %l1
460	srl %l0, %l1, %l2
461	set 0x80, %l3
462	sub %l3, %l2, %l4
463	brnz,a %l4, diag_fail
464	set 0xfffeee02, %l1
465
466	!!----------------------
467	!! shift right 64b
468	!!----------------------
469	set 0x0, %l0
470	setx 0x8000000000000000, %l0, %l1
471	srlx %l1, 63, %l2
472	srlx %l2, 1, %l3
473	brnz,a %l3, diag_fail
474	set 0xfffeee03, %l1
475
476	set 0x0, %l0
477	setx 0x8000000000000000, %l0, %l1
478	set 16, %l2
479	srlx %l1, %l2, %l3
480	srlx %l3, %l2, %l4
481
482	set 0x80000000, %l5
483	sub %l5, %l4, %l6
484	brnz,a %l6, diag_fail
485	set 0xfffeee03, %l1
486
487	!!----------------------
488	!! shift right 32b
489	!! arithmetic
490	!!----------------------
491	set 0x80000000, %l0
492	sra %l0, 31, %l1
493	sra %l1, 1, %l2
494
495	set 0x0, %l3
496	setx 0xffffffffffffffff, %l3, %l4
497	sub %l2, %l4, %l5
498	brnz,a %l5, diag_fail
499	set 0xfffeee02, %l1
500
501	set 0x800, %l0
502	set 4, %l1
503	sra %l0, %l1, %l2
504	set 0x80, %l3
505	sub %l3, %l2, %l4
506	brnz,a %l4, diag_fail
507	set 0xfffeee02, %l1
508
509	!!----------------------
510	!! shift right 64b
511	!!----------------------
512	set 0x0, %l0
513	setx 0x8000000000000000, %l0, %l1
514	srax %l1, 63, %l2
515	srax %l2, 1, %l3
516
517	set 0x0, %l0
518	setx 0xffffffffffffffff, %l0, %l4
519	sub %l4, %l3, %l5
520	brnz,a %l5, diag_fail
521	set 0xfffeee03, %l1
522
523	set 0x0, %l0
524	setx 0x8000000000000000, %l0, %l1
525	set 16, %l2
526	srax %l1, %l2, %l3
527	srax %l3, %l2, %l4
528
529	set 0x0, %l0
530	setx 0xffffffff80000000, %l0, %l5
531	sub %l5, %l4, %l6
532	brnz,a %l6, diag_fail
533	set 0xfffeee03, %l1
534
535	/*
536	***************************
537	* Load FSR from Memory
538	***************************
539	*/
540	!!------------------------
541	!! LDFSR
542	!!------------------------
543	setx ldfsr_sdata, %l0, %l2
544	set 0x0, %l0
545	ld [%l2+%l0], %i5
546
547	ld [%l2+%l0], %fsr /* %fcc0 = 10 fs1 > fs2 */
548
549	fble %fcc0, diag_fail
550
551	add %l0, 0x4, %l0
552	set 0xffff0005, %l1
553
554	ld [%l2+%l0], %fsr /* %fcc0 = 01 fs1 < fs2 */
555
556	fbge %fcc0, diag_fail
557
558	add %l0, 0x4, %l0
559	set 0xffff0005, %l1
560
561	ld [%l2+%l0], %fsr /* %fcc0 = 00 fs1 = fs2 */
562
563	add %l0, 0x4, %l0
564	fbne %fcc0, diag_fail
565
566	set 0xffff0005, %l1
567
568	!!------------------------
569	!! LDXFSR
570	!!------------------------
571	setx ldfsr_ddata, %l0, %l2
572	set 0x0, %l0
573
574	ldx [%l2+%l0], %fsr /* %fcc0 = 10 fs1 > fs2 */
575	add %l0, 0x8, %l0
576
577	fble %fcc0, diag_fail
578	set 0xffff0006, %l1
579
580	ldx [%l2+%l0], %fsr /* %fcc0 = 01 fs1 < fs2 */
581	add %l0, 0x8, %l0
582
583	fbge %fcc0, diag_fail
584	set 0xffff0006, %l1
585
586	ldx [%l2+%l0], %fsr /* %fcc0 = 00 fs1 = fs2 */
587	add %l0, 0x8, %l0
588
589	fbne %fcc0, diag_fail
590	set 0xffff0006, %l1
591
592	/*
593	*********************************
594	* Store Floating Point
595	*********************************
596	*/
597	/* load the fp data from the memory */
598	/* load single fp */
599	setx fps_cvt_nmd1, %l0, %l1
600	set 0x0, %l0
601
602	ld [%l1+%l0], %f0 /* f0 = 2 * (1+1/2) */
603	add %l0, 0x4, %l0
604
605	ld [%l1+%l0], %f2 /* f2 = 4 * (1+1/2) */
606	add %l0, 0x4, %l0
607
608	ld [%l1+%l0], %f4 /* f4 = 8 * (1+1/8) */
609
610	/* load double fp */
611	set 0x0, %l0
612	setx fpd_cvt_nmd1, %l0, %l1
613
614	ldd [%l1+%l0], %f6 /* f6 = 2 * (1+1/2) */
615	add %l0, 0x8, %l0
616
617	ldd [%l1+%l0], %f8 /* f8 = 4 * (1+1/2) */
618	add %l0, 0x8, %l0
619
620	ldd [%l1+%l0], %f10 /* f10 = 8 * (1+1/8) */
621	add %l0, 0x8, %l0
622
623	ldd [%l1+%l0], %f12 /* f12 = 32 * (1+1/8) = 36 */
624	nop
625
626	/*
627	* store single
628	*/
629	!!--------------------------
630	!! st freg, [addr]
631	!!--------------------------
632	setx stfsr_sdata, %l0, %l2
633	set 0x0, %l0
634
635	st %f0, [%l2+%l0]
636	add %l0, 0x4, %l0
637
638	st %f2, [%l2+%l0]
639	add %l0, 0x4, %l0
640
641	set 0x0, %l0
642	ld [%l2+%l0], %f14 /* f14 should = f0 */
643	add %l0, 0x4, %l0
644	fcmps %fcc0, %f14, %f0
645	fbne,a diag_fail
646	set 0xffeeff01, %l1
647
648	ld [%l2+%l0], %f16 /* f16 should = f2 */
649	nop
650	fcmps %fcc0, %f16, %f2
651	fbne,a diag_fail
652	set 0xffeeff01, %l1
653
654	/*
655	* store double
656	*/
657	!!--------------------------
658	!! std freg, [addr]
659	!!--------------------------
660	setx stfsr_ddata, %l0, %l2
661	set 0x0, %l0
662
663	std %f8, [%l2+%l0]
664	add %l0, 0x8, %l0
665
666	std %f10, [%l2+%l0]
667	add %l0, 0x8, %l0
668
669	set 0x0, %l0
670	ldd [%l2+%l0], %f14 /* f14 should = f8 */
671	add %l0, 0x8, %l0
672
673	fcmpd %fcc0, %f14, %f8
674	fbne,a diag_fail
675	set 0xffeeff81, %l1
676
677	ldd [%l2+%l0], %f16 /* f16 should = f10 */
678	nop
679	fcmpd %fcc0, %f16, %f10
680	fbne,a diag_fail
681	set 0xffeeff81, %l1
682
683	/*
684	* store fsr : single
685	*/
686	!!--------------------------
687	!! st %fsr, [addr]
688	!!--------------------------
689	setx ldfsr_sdata, %l0, %l2
690	set 0x0, %l0
691	ld [%l2+%l0], %fsr /* %fcc0 = 10 fs1 > fs2 */
692	add %l0, 0x4, %l0
693
694	set 0x0, %l0
695	setx stfsr_sdata, %l0, %l2
696	st %fsr, [%l2+%l0]
697	nop
698
699	ld [%l2+%l0], %fsr
700	nop
701	fble %fcc0, diag_fail
702	set 0xffff5000, %l1
703
704	/*
705	* store fsr : double
706	*/
707	!!--------------------------
708	!! stx %fsr, [addr]
709	!!--------------------------
710	setx ldfsr_ddata, %l0, %l2
711	set 0x0, %l0
712	ldx [%l2+%l0], %fsr /* %fcc0 = 10 fs1 > fs2 */
713
714	setx stfsr_ddata, %l0, %l2
715	set 0x0, %l0
716	stx %fsr, [%l2+%l0]
717	nop
718
719	ldx [%l2+%l0], %fsr
720	nop
721	fble %fcc0, diag_fail
722	set 0xffff6000, %l1
723
724	/*
725	********************************
726	* Diag PASSED ! *
727	********************************
728	*/
729	diag_pass:
730	set 0xaaddcafe, %l0
731	EXIT_GOOD
732	nop
733
734	/*
735	********************************
736	* Diag FAILED ! *
737	********************************
738	*/
739	diag_fail:
740	set 0xdeadcafe, %l0
741	EXIT_BAD
742	nop
743
744	.data
745
746	ldint_1: .word 0x55aa11bb
747	.word 0xaa5577ff
748	.word 0x77aa55bb
749	.word 0xaa55ff44
750
751	fst_data: .xword 0x700f000000000000
752	.xword 0x700f000000000000
753	.xword 0x700ff00000000000
754	.xword 0x700ff00000000000
755
756	stfsr_sdata: .word 0x00000000
757	.word 0x00000000
758	.word 0x00000000
759	.word 0x00000000
760
761	stfsr_ddata: .xword 0x0000000000000000
762	.xword 0x0000000000000000
763	.xword 0x0000000000000000
764	.xword 0x0000000000000000
765
766	stfps_nmdata: .word 0x00000000
767	.word 0x00000000
768	.word 0x00000000
769	.word 0x00000000
770
771	stfpd_nmdata: .xword 0x0000000000000000
772	.xword 0x0000000000000000
773	.xword 0x0000000000000000
774	.xword 0x0000000000000000
775
776	stint_1: .word 0x00000000
777	.word 0x00000000
778	.word 0x00000000
779	.word 0x00000000
780
781	stint_asi1: .word 0x00000000
782	.word 0x00000000
783	.word 0x00000000
784	.word 0x00000000
785
786	stint_asi2: .word 0x00000000
787	.word 0x00000000
788	.word 0x00000000
789	.word 0x00000000
790
791
792	ldfsr_sdata: .word 0x00000800
793	.word 0x00000400
794	.word 0x00000000
795	.word 0x00000c00
796
797	ldfsr_ddata: .xword 0x0000000000000800
798	.xword 0x0000000000000400
799	.xword 0x0000000000000000
800	.xword 0x0000000000000c00
801
802	fps_data: .word 0x00200000
803	.word 0x00400000
804	.word 0x00600000
805	.word 0x00a00000
806
807	fps_nmdata: .word 0x70200000
808	.word 0x70400000
809	.word 0x70b00000
810	.word 0x70b00000
811
812	fpd_data: .xword 0x0002000000000000
813	.xword 0x0004000000000000
814	.xword 0x0006000000000000
815	.xword 0x0008000000000000
816
817	fpd_nmdata: .xword 0x7002000000000000
818	.xword 0x7004000000000000
819	.xword 0x700b000000000000
820	.xword 0x700b000000000000
821
822	fpquad_data: .xword 0x0000200000000000
823	.xword 0x0000000000000000
824	.xword 0x0000400000000000
825	.xword 0x0000000000000000
826	.xword 0x0000600000000000
827	.xword 0x0000000000000000
828	.xword 0x0000800000000000
829	.xword 0x0000000000000000
830
831	fpquad_nmdata: .xword 0x7000200000000000
832	.xword 0x0000000000000000
833	.xword 0x7000400000000000
834	.xword 0x0000000000000000
835	.xword 0x7000b00000000000
836	.xword 0x0000000000000000
837	.xword 0x7000b00000000000
838	.xword 0x0000000000000000
839
840	fps_cvt_data1: .word 0x00200000
841	.word 0x00400000
842	.word 0x00600000
843	.word 0x00a00000
844
845	fps_cvt_nmd1: .word 0x40400000 /* 3 */
846	.word 0x40c00000 /* 6 */
847	.word 0x41100000 /* 9 */
848	.word 0x42100000 /* 36 */
849
850	fpd_cvt_data1: .xword 0x0002000000000000
851	.xword 0x0004000000000000
852	.xword 0x0006000000000000
853	.xword 0x0008000000000000
854
855	fpd_cvt_nmd1: .xword 0x4008000000000000 /* 3 */
856	.xword 0x4018000000000000 /* 6 */
857	.xword 0x4022000000000000 /* 9 */
858	.xword 0x4042000000000000 /* 36 */
859
860	int2fps_nmd1: .word 0x00000003
861	.word 0x00000006
862	.word 0x00000009
863	.word 0x00000000
864
865	int2fpd_nmd1: .xword 0x0000000000000003
866	.xword 0x0000000000000006
867	.xword 0x0000000000000009
868	.xword 0x0000000000000000
869
870	fps_muldv_nmd1: .word 0x40400000 /* 3 */
871	.word 0x40c00000 /* 6 */
872	.word 0x41900000 /* 18 = 16(1+1/8) /
873	.word 0x42100000 /* 36 */
874
875	fpd_muldv_nmd1: .xword 0x4008000000000000 /* 3 */
876	.xword 0x4018000000000000 /* 6 */
877	.xword 0x4032000000000000 /* 18 */
878	.xword 0x4042000000000000 /* 36 */
879
880	fps_sqr_nmd1: .word 0x40400000 /* 3 */
881	.word 0x40c00000 /* 6 */
882	.word 0x41100000 /* 9 = 8(1+1/8) /
883	.word 0x42100000 /* 36 = 32(1+1/8) /
884
885	fpd_sqr_nmd1: .xword 0x4008000000000000 /* 3 */
886	.xword 0x4018000000000000 /* 6 */
887	.xword 0x4022000000000000 /* 9 */
888	.xword 0x4042000000000000 /* 36 */
889
890	.end
891