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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / uarch / tlu / diag / fcrand05_rand_88.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: fcrand05_rand_88.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38# 528 "diag.j.pp"
39#define IMMU_SKIP_IF_NO_TTE
40#define DMMU_SKIP_IF_NO_TTE
41#define PORTABLE_CORE
42#define MAIN_PAGE_NUCLEUS_ALSO
43#define MAIN_PAGE_HV_ALSO
44#define MAIN_PAGE_VA_IS_RA_ALSO
45#define DISABLE_PART_LIMIT_CHECK
46#define MAIN_PAGE_USE_CONFIG 3
47#define PART0_Z_TSB_SIZE_3 10
48#define PART0_Z_PAGE_SIZE_3 1
49#define PART0_NZ_TSB_SIZE_3 10
50#define PART0_NZ_PAGE_SIZE_3 1
51#define PART0_Z_TSB_SIZE_1 3
52#define PART0_NZ_TSB_SIZE_1 3
53
54#define PART_0_BASE 0x0
55#define USER_PAGE_CUSTOM_MAP
56#define MAIN_BASE_TEXT_VA 0x333000000
57#define MAIN_BASE_TEXT_RA 0x033000000
58#define MAIN_BASE_DATA_VA 0x379400000
59#define MAIN_BASE_DATA_RA 0x079400000
60#define HIGHVA_HIGHNUM 0x3
61
62#d
63# 554 "diag.j.pp"
64#undef H_HT0_Instruction_Access_MMU_Error_0x71
65#define H_HT0_Instruction_Access_MMU_Error_0x71 inst_access_mmu_error_handler
66#undef H_HT0_Instruction_access_error_0x0a
67#define H_HT0_Instruction_access_error_0x0a inst_access_error_handler
68#undef H_HT0_Internal_Processor_Error_0x29
69#define H_HT0_Internal_Processor_Error_0x29 int_proc_err_handler
70#undef H_HT0_Data_Access_MMU_Error_0x72
71#define H_HT0_Data_Access_MMU_Error_0x72 data_access_mmu_error_handler
72#undef H_HT0_Data_access_error_0x32
73#define H_HT0_Data_access_error_0x32 data_access_error_handler
74#undef H_HT0_Hw_Corrected_Error_0x63
75#define H_HT0_Hw_Corrected_Error_0x63 hw_corrected_error_handler
76#undef H_HT0_Sw_Recoverable_Error_0x40
77#define H_HT0_Sw_Recoverable_Error_0x40 sw_recoverable_error_handler
78#undef H_HT0_Store_Error_0x07
79#define H_HT0_Store_Error_0x07 store_error_handler
80
81#define DAE_SKIP_IF_SOCU_ERROR
82# 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
83#ifndef T_HANDLER_RAND4_1
84#define T_HANDLER_RAND4_1 b .+16;\
85 sdiv %r1, %r0, %l4;nop;nop
86#endif
87#ifndef T_HANDLER_RAND7_1
88#define T_HANDLER_RAND7_1 b .+28;\
89 pdist %f4, %f6, %f20; \
90 nop; nop ; nop; nop; illtrap
91#endif
92#ifndef T_HANDLER_RAND4_2
93#define T_HANDLER_RAND4_2 save %i7, %g0, %i7; \
94 save %i7, %g0, %i7; \
95 restore %i7, %g0, %i7;\
96 restore %i7, %g0, %i7;
97#endif
98#ifndef T_HANDLER_RAND7_2
99#define T_HANDLER_RAND7_2 b .+8 ;\
100 rdpr %pstate, %l2;\
101 b .+8 ;\
102 rdpr %tstate, %l3;\
103 b .+12 ;\
104 wrpr %l3, %r0, %tstate; nop
105#endif
106#ifndef T_HANDLER_RAND4_3
107#define T_HANDLER_RAND4_3 save %i7, %g0, %i7;\
108 restore %i7, %g0, %i7;\
109 save %i7, %g0, %i7; \
110 restore %i7, %g0, %i7;
111#endif
112#ifndef T_HANDLER_RAND7_3
113#define T_HANDLER_RAND7_3 b .+8 ;\
114 rdpr %tnpc, %l2;\
115 and %l2, 0xfc0, %l2;\
116 add %i7, %l2, %l2;\
117 stda %f16,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY ;\
118 b .+8 ;\
119 stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ;
120#endif
121#ifndef T_HANDLER_RAND4_4
122#define T_HANDLER_RAND4_4 b .+4 ; b .+4; b .+4; b .+4
123#endif
124#ifndef T_HANDLER_RAND7_4
125#define T_HANDLER_RAND7_4 b .+8;\
126 save %i7, %g0, %i7; \
127 b,a .+8;\
128 b .+12;\
129 stw %i7, [%i7];\
130 b .-8;;\
131 restore %i7, %g0, %i7;
132
133#endif
134#ifndef T_HANDLER_RAND4_5
135#define T_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\
136 sdiv %l4, %l5, %l7;\
137 add %r31, 128, %l5;\
138 stda %l4, [%i7]ASI_BLOCK_PRIMARY_LITTLE;
139#endif
140#ifndef T_HANDLER_RAND7_5
141#define T_HANDLER_RAND7_5 save %i7, %g0, %i7;\
142 rdpr %tnpc, %l2;\
143 wrpr %l2, %tpc;\
144 add %l2, 4, %l2;\
145 wrpr %l2, %tnpc;\
146 restore %i7, %g0, %i7;\
147 retry;
148#endif
149#ifndef T_HANDLER_RAND4_6
150#define T_HANDLER_RAND4_6 ldda [%r31]ASI_BLOCK_AS_IF_USER_PRIMARY, %l2;\
151 rd %fprs, %l2; \
152 wr %l2, 0x4, %fprs ;\
153 stda %f0,[%r31]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE;
154#endif
155#ifndef T_HANDLER_RAND7_6
156#define T_HANDLER_RAND7_6 umul %o4, 2, %o5;\
157 rdpr %tnpc, %l2;\
158 wrpr %l2, %tpc;\
159 add %l2, 4, %l2;\
160 wrpr %l2, %tnpc;\
161 stw %l2, [%i7];\
162 retry;
163#endif
164!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
165#ifndef HT_HANDLER_RAND4_1
166#define HT_HANDLER_RAND4_1 mov 0x80, %l3;\
167 b .+12;\
168 stxa %l3, [%l3]0x57 ;\
169 nop
170#endif
171#ifndef HT_HANDLER_RAND7_1
172#define HT_HANDLER_RAND7_1 b .+28;\
173 pdist %f4, %f4, %f20;\
174 nop; nop ; nop; nop; illtrap
175#endif
176#ifndef HT_HANDLER_RAND4_2
177#define HT_HANDLER_RAND4_2 rdpr %tstate, %l2;\
178 b .+12;\
179 wrpr %l2, 0x800, %tstate;\
180 nop;
181#endif
182#ifndef HT_HANDLER_RAND7_2
183#define HT_HANDLER_RAND7_2 b .+8 ;\
184 rdhpr %hpstate, %l2;\
185 b .+8 ;\
186 rdhpr %htstate, %l3;\
187 b .+12 ;\
188 wrhpr %l3, %r0, %htstate; nop
189#endif
190#ifndef HT_HANDLER_RAND4_3
191#define HT_HANDLER_RAND4_3 stxa %l4, [%r31]ASI_AS_IF_USER_PRIMARY;\
192 mov 0x80, %l3;\
193 stxa %l3, [%l3]0x5f ;\
194 b .+8 ;\
195 ldxa [%r31]ASI_AS_IF_USER_PRIMARY, %l4;
196#endif
197#ifndef HT_HANDLER_RAND7_3
198#define HT_HANDLER_RAND7_3 b .+8 ;\
199 rdpr %tnpc, %l2;\
200 and %l2, 0xfc0, %l2;\
201 add %i7, %l2, %l2;\
202 stda %f16,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY ;\
203 b .+8 ;\
204 stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ;
205#endif
206#ifndef HT_HANDLER_RAND4_4
207#define HT_HANDLER_RAND4_4 ldda [%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE, %l3;\
208 b .+12 ;\
209 stxa %l3, [%g0]ASI_LSU_CONTROL; nop
210#endif
211#ifndef HT_HANDLER_RAND7_4
212#define HT_HANDLER_RAND7_4 rdpr %tnpc, %l3;\
213 and %l3, 0xff, %l3;\
214 sllx %l3, 26, %l3;\
215 ldxa [%g0]0x45, %l4;\
216 or %l3, %l4, %l3 ;\
217 stxa %l3, [%g0]0x45 ;\
218 nop;
219#endif
220#ifndef HT_HANDLER_RAND4_5
221#define HT_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\
222 sdiv %l4, %l5, %l6;\
223 sdiv %l3, %l6, %l7;\
224 stda %f32, [%r31]ASI_BLOCK_PRIMARY_LITTLE;
225#endif
226#ifndef HT_HANDLER_RAND7_5
227#define HT_HANDLER_RAND7_5 save %i7, %g0, %i7;\
228 rdpr %tnpc, %l2;\
229 wrpr %l2, %tpc;\
230 add %l2, 4, %l2;\
231 wrpr %l2, %tnpc;\
232 restore %i7, %g0, %i7;\
233 retry;
234#endif
235#ifndef HT_HANDLER_RAND4_6
236#define HT_HANDLER_RAND4_6 ld [%r31], %l2;\
237 rd %fprs, %l2; \
238 wr %l2, 0x4, %fprs ;\
239 stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE;
240#endif
241#ifndef HT_HANDLER_RAND7_6
242#define HT_HANDLER_RAND7_6 rdhpr %htstate, %o4;\
243 rdpr %tnpc, %l2;\
244 wrpr %l2, %tpc;\
245 add %l2, 4, %l2;\
246 wrpr %l2, %tnpc;\
247 wrhpr %o4, %r0, %htstate;\
248 retry;
249#endif
250
251!!!!!!!!!!!!!!!!!!!!!!!!!
252!! Disable trap checking
253#define NO_TRAPCHECK
254
255! Enable Traps
256#define ENABLE_T1_Privileged_Opcode_0x11
257#define ENABLE_T1_Fp_Disabled_0x20
258#define ENABLE_HT0_Watchdog_Reset_0x02
259
260#define FILL_TRAP_RETRY
261#define SPILL_TRAP_RETRY
262#define CLEAN_WIN_RETRY
263
264#define My_RED_Mode_Other_Reset
265#define My_RED_Mode_Other_Reset \
266 ba red_other_ext;\
267 nop;retry;nop;nop;nop;nop;nop
268
269#define H_HT0_Software_Initiated_Reset_0x04
270#define SUN_H_HT0_Software_Initiated_Reset_0x04 \
271 setx Software_Reset_Handler, %g1, %g2 ;\
272 jmp %g2 ;\
273 nop
274# 198 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
275#define H_T1_Clean_Window_0x24
276#define SUN_H_T1_Clean_Window_0x24 \
277 rdpr %cleanwin, %l1;\
278 add %l1,1,%l1;\
279 wrpr %l1, %g0, %cleanwin;\
280 retry; nop; nop; nop; nop
281
282#define H_T1_Clean_Window_0x25
283#define SUN_H_T1_Clean_Window_0x25 \
284 rdpr %cleanwin, %l1;\
285 add %l1,1,%l1;\
286 wrpr %l1, %g0, %cleanwin;\
287 retry; nop; nop; nop; nop
288
289#define H_T1_Clean_Window_0x26
290#define SUN_H_T1_Clean_Window_0x26 \
291 rdpr %cleanwin, %l1;\
292 add %l1,1,%l1;\
293 wrpr %l1, %g0, %cleanwin;\
294 retry; nop; nop; nop; nop
295
296#define H_T1_Clean_Window_0x27
297#define SUN_H_T1_Clean_Window_0x27 \
298 rdpr %cleanwin, %l1;\
299 add %l1,1,%l1;\
300 wrpr %l1, %g0, %cleanwin;\
301 retry; nop; nop; nop; nop
302# 227 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
303#define H_HT0_Tag_Overflow
304#define My_HT0_Tag_Overflow \
305 HT_HANDLER_RAND7_1 ;\
306 done
307
308#define H_T0_Tag_Overflow
309#define My_T0_Tag_Overflow \
310 T_HANDLER_RAND7_2 ;\
311 done
312
313#define H_T1_Tag_Overflow_0x23
314#define SUN_H_T1_Tag_Overflow_0x23 \
315 T_HANDLER_RAND7_3 ;\
316 done
317
318#define H_T0_Window_Spill_0_Normal_Trap
319#define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
320
321#define H_T0_Window_Spill_1_Normal_Trap
322#define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
323
324#define H_T0_Window_Spill_2_Normal_Trap
325#define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
326
327#define H_T0_Window_Spill_3_Normal_Trap
328#define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
329
330#define H_T0_Window_Spill_4_Normal_Trap
331#define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
332
333#define H_T0_Window_Spill_5_Normal_Trap
334#define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
335
336#define H_T0_Window_Spill_6_Normal_Trap
337#define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
338
339#define H_T0_Window_Spill_7_Normal_Trap
340#define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
341
342#define H_T0_Window_Spill_0_Other_Trap
343#define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
344
345#define H_T0_Window_Spill_1_Other_Trap
346#define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
347
348#define H_T0_Window_Spill_2_Other_Trap
349#define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
350
351#define H_T0_Window_Spill_3_Other_Trap
352#define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
353
354#define H_T0_Window_Spill_4_Other_Trap
355#define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
356
357#define H_T0_Window_Spill_5_Other_Trap
358#define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
359
360#define H_T0_Window_Spill_6_Other_Trap
361#define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
362
363#define H_T0_Window_Spill_7_Other_Trap
364#define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
365
366#define H_T0_Window_Fill_0_Normal_Trap
367#define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
368
369#define H_T0_Window_Fill_1_Normal_Trap
370#define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
371
372#define H_T0_Window_Fill_2_Normal_Trap
373#define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
374
375#define H_T0_Window_Fill_3_Normal_Trap
376#define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
377
378#define H_T0_Window_Fill_4_Normal_Trap
379#define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
380
381#define H_T0_Window_Fill_5_Normal_Trap
382#define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
383
384#define H_T0_Window_Fill_6_Normal_Trap
385#define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
386
387#define H_T0_Window_Fill_7_Normal_Trap
388#define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
389
390#define H_T0_Window_Fill_0_Other_Trap
391#define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
392
393#define H_T0_Window_Fill_1_Other_Trap
394#define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
395
396#define H_T0_Window_Fill_2_Other_Trap
397#define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
398
399#define H_T0_Window_Fill_3_Other_Trap
400#define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
401
402#define H_T0_Window_Fill_4_Other_Trap
403#define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
404
405#define H_T0_Window_Fill_5_Other_Trap
406#define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
407
408#define H_T0_Window_Fill_6_Other_Trap
409#define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
410
411#define H_T0_Window_Fill_7_Other_Trap
412#define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
413# 339 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
414#define H_T1_Window_Spill_0_Normal_Trap
415#define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
416
417#define H_T1_Window_Spill_1_Normal_Trap
418#define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
419
420#define H_T1_Window_Spill_2_Normal_Trap
421#define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
422
423#define H_T1_Window_Spill_3_Normal_Trap
424#define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
425
426#define H_T1_Window_Spill_4_Normal_Trap
427#define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
428
429#define H_T1_Window_Spill_5_Normal_Trap
430#define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
431
432#define H_T1_Window_Spill_6_Normal_Trap
433#define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
434
435#define H_T1_Window_Spill_7_Normal_Trap
436#define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
437
438#define H_T1_Window_Spill_0_Other_Trap
439#define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
440
441#define H_T1_Window_Spill_1_Other_Trap
442#define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
443
444#define H_T1_Window_Spill_2_Other_Trap
445#define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
446
447#define H_T1_Window_Spill_3_Other_Trap
448#define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
449
450#define H_T1_Window_Spill_4_Other_Trap
451#define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
452
453#define H_T1_Window_Spill_5_Other_Trap
454#define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
455
456#define H_T1_Window_Spill_6_Other_Trap
457#define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
458
459#define H_T1_Window_Spill_7_Other_Trap
460#define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
461
462#define H_T1_Window_Fill_0_Normal_Trap
463#define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
464
465#define H_T1_Window_Fill_1_Normal_Trap
466#define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
467
468#define H_T1_Window_Fill_2_Normal_Trap
469#define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
470
471#define H_T1_Window_Fill_3_Normal_Trap
472#define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
473
474#define H_T1_Window_Fill_4_Normal_Trap
475#define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
476
477#define H_T1_Window_Fill_5_Normal_Trap
478#define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
479
480#define H_T1_Window_Fill_6_Normal_Trap
481#define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
482
483#define H_T1_Window_Fill_7_Normal_Trap
484#define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
485
486#define H_T1_Window_Fill_0_Other_Trap
487#define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
488
489#define H_T1_Window_Fill_1_Other_Trap
490#define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
491
492#define H_T1_Window_Fill_2_Other_Trap
493#define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
494
495#define H_T1_Window_Fill_3_Other_Trap
496#define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
497
498#define H_T1_Window_Fill_4_Other_Trap
499#define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
500
501#define H_T1_Window_Fill_5_Other_Trap
502#define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
503
504#define H_T1_Window_Fill_6_Other_Trap
505#define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
506
507#define H_T1_Window_Fill_7_Other_Trap
508#define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
509
510#define H_T0_Trap_Instruction_0
511#define My_T0_Trap_Instruction_0 \
512 T_HANDLER_RAND7_5 ;\
513 done;
514
515#define H_T0_Trap_Instruction_1
516#define My_T0_Trap_Instruction_1 \
517 T_HANDLER_RAND7_6 ;\
518 done;
519
520#define H_T0_Trap_Instruction_2
521#define My_T0_Trap_Instruction_2 \
522 inc %o3;\
523 umul %o3, 2, %o4;\
524 ba 1f; \
525 save %i7, %g0, %i7; \
526 2: done; \
527 nop; \
528 1: ba 2b; \
529 restore %i7, %g0, %i7
530#define H_T0_Trap_Instruction_3
531#define My_T0_Trap_Instruction_3 \
532 save %i7, %g0, %i7 ;\
533 T_HANDLER_RAND4_5;\
534 stw %o4, [%i7];\
535 restore %i7, %g0, %i7 ;\
536 done
537#define H_T0_Trap_Instruction_4
538#define My_T0_Trap_Instruction_4 \
539 T_HANDLER_RAND7_6 ;\
540 done;
541
542#define H_T0_Trap_Instruction_5
543#define My_T0_Trap_Instruction_5 \
544 T_HANDLER_RAND4_5;\
545 done;
546
547#define H_T1_Trap_Instruction_0
548#define My_T1_Trap_Instruction_0 \
549 inc %o4;\
550 umul %o4, 2, %o5;\
551 ba 3f; \
552 save %i7, %g0, %i7; \
553 4: done; \
554 nop; \
555 3: ba 4b; \
556 restore %i7, %g0, %i7
557#define H_T1_Trap_Instruction_1
558#define My_T1_Trap_Instruction_1 \
559 T_HANDLER_RAND7_3;\
560 done
561#define H_T1_Trap_Instruction_2
562#define My_T1_Trap_Instruction_2 \
563 inc %o3;\
564 umul %o3, 2, %o4;\
565 ba 5f; \
566 save %i7, %g0, %i7; \
567 6: done; \
568 nop; \
569 5: ba 6b; \
570 restore %i7, %g0, %i7
571#define H_T1_Trap_Instruction_3
572#define My_T1_Trap_Instruction_3 \
573 T_HANDLER_RAND4_1;\
574 done;
575
576#define H_T1_Trap_Instruction_4
577#define My_T1_Trap_Instruction_4 \
578 T_HANDLER_RAND7_1;\
579 done;
580#define H_T1_Trap_Instruction_5
581#define My_T1_Trap_Instruction_5 \
582 T_HANDLER_RAND7_2;\
583 done
584#define H_HT0_Trap_Instruction_0
585#define My_HT0_Trap_Instruction_0 \
586 HT_HANDLER_RAND4_1 ;\
587 done;
588#define H_HT0_Trap_Instruction_1
589#define My_HT0_Trap_Instruction_1 \
590 HT_HANDLER_RAND4_3 ;\
591 done
592#define H_HT0_Trap_Instruction_2
593#define My_HT0_Trap_Instruction_2 \
594 HT_HANDLER_RAND7_5 ;\
595 done;
596#define H_HT0_Trap_Instruction_3
597#define My_HT0_Trap_Instruction_3 \
598 HT_HANDLER_RAND4_5 ;\
599 done
600#define H_HT0_Trap_Instruction_4
601#define My_HT0_Trap_Instruction_4 \
602 HT_HANDLER_RAND7_4 ;\
603 done
604#define H_HT0_Trap_Instruction_5
605#define My_HT0_Trap_Instruction_5 \
606 ba htrap_5_ext;\
607 nop; retry;\
608 nop; nop; nop; nop; nop
609
610#define H_HT0_Mem_Address_Not_Aligned_0x34
611#define My_HT0_Mem_Address_Not_Aligned_0x34 \
612 HT_HANDLER_RAND4_2 ;\
613 done ;
614#define H_HT0_Illegal_instruction_0x10
615#define My_HT0_Illegal_instruction_0x10 \
616 HT_HANDLER_RAND4_2 ;\
617 done;
618
619#define H_HT0_DAE_so_page_0x30
620#define My_HT0_DAE_so_page_0x30 \
621 HT_HANDLER_RAND4_2;\
622 done;
623#define H_HT0_DAE_invalid_asi_0x14
624#define SUN_H_HT0_DAE_invalid_asi_0x14 \
625 HT_HANDLER_RAND4_3 ;\
626 done
627#define H_HT0_DAE_privilege_violation_0x15
628#define SUN_H_HT0_DAE_privilege_violation_0x15 \
629 HT_HANDLER_RAND4_4 ;\
630 done;
631#define H_HT0_Privileged_Action_0x37
632#define My_HT0_Privileged_Action_0x37 \
633 done; \
634 nop; nop
635#define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35
636#define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \
637 HT_HANDLER_RAND4_3 ;\
638 done
639#define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36
640#define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \
641 HT_HANDLER_RAND7_1;\
642 done
643#define H_HT0_Fp_exception_ieee_754_0x21
644#define My_HT0_Fp_exception_ieee_754_0x21 \
645 HT_HANDLER_RAND4_2 ;\
646 done
647#define H_HT0_Fp_exception_other_0x22
648#define My_HT0_Fp_exception_other_0x22 \
649 HT_HANDLER_RAND7_2 ;\
650 done
651#define H_HT0_Division_By_Zero
652#define My_HT0_Division_By_Zero \
653 HT_HANDLER_RAND4_6;\
654 done
655#define H_T0_Division_By_Zero
656#define My_T0_Division_By_Zero \
657 T_HANDLER_RAND4_3;\
658 done
659#define H_T1_Division_By_Zero_0x28
660#define My_H_T1_Division_By_Zero_0x28 \
661 T_HANDLER_RAND4_3;\
662 done
663#define H_T0_Division_By_Zero
664#define My_T0_Division_By_Zero\
665 T_HANDLER_RAND4_4 ;\
666 done
667#define H_T0_Fp_exception_ieee_754_0x21
668#define My_T0_Fp_exception_ieee_754_0x21 \
669 T_HANDLER_RAND4_3 ;\
670 done
671#define H_T1_Fp_Exception_Ieee_754_0x21
672#define My_H_T1_Fp_Exception_Ieee_754_0x21 \
673 T_HANDLER_RAND4_4 ;\
674 done
675#define H_T1_Fp_Exception_Other_0x22
676#define My_H_T1_Fp_Exception_Other_0x22 \
677 T_HANDLER_RAND4_5 ;\
678 done
679#define H_T1_Privileged_Opcode_0x11
680#define SUN_H_T1_Privileged_Opcode_0x11 \
681 T_HANDLER_RAND4_6 ;\
682 done
683
684#define H_HT0_Privileged_opcode_0x11
685#define My_HT0_Privileged_opcode_0x11 \
686 HT_HANDLER_RAND4_1;\
687 done;
688
689#define H_HT0_Fp_disabled_0x20
690#define My_HT0_Fp_disabled_0x20 \
691 mov 0x4, %l2 ;\
692 wr %l2, 0x0, %fprs ;\
693 sllx %l2, 10, %l3; \
694 rdpr %tstate, %l2;\
695 or %l2, %l3, %l2 ;\
696 stw %l2, [%i7];\
697 wrpr %l2, 0x0, %tstate;\
698 retry;
699
700#define H_T0_Fp_disabled_0x20
701#define My_T0_Fp_disabled_0x20 \
702 mov 0x4, %l2 ;\
703 wr %l2, 0x0, %fprs ;\
704 sllx %l2, 10, %l3; \
705 rdpr %tstate, %l2;\
706 or %l2, %l3, %l2 ;\
707 wrpr %l2, 0x0, %tstate;\
708 retry; nop
709
710#define H_T1_Fp_Disabled_0x20
711#define My_H_T1_Fp_Disabled_0x20 \
712 mov 0x4, %l2 ;\
713 wr %l2, 0x0, %fprs ;\
714 sllx %l2, 10, %l3; \
715 rdpr %tstate, %l2;\
716 or %l2, %l3, %l2 ;\
717 wrpr %l2, 0x0, %tstate;\
718 stw %l2, [%i7];\
719 retry
720
721#define H_HT0_Watchdog_Reset_0x02
722#define My_HT0_Watchdog_Reset_0x02 \
723 ba wdog_2_ext;\
724 nop;retry;nop;nop;nop;nop;nop
725
726#define H_T0_Privileged_opcode_0x11
727#define My_T0_Privileged_opcode_0x11 \
728 T_HANDLER_RAND4_4;\
729 done
730
731#define H_T1_Fp_exception_other_0x22
732#define My_T1_Fp_exception_other_0x22 \
733 T_HANDLER_RAND7_3 ;\
734 done;
735
736#define H_T0_Fp_exception_other_0x22
737#define My_T0_Fp_exception_other_0x22 \
738 T_HANDLER_RAND7_4;\
739 done
740
741#define H_HT0_Trap_Level_Zero_0x5f
742#define My_HT0_Trap_Level_Zero_0x5f \
743 not %g0, %r13; \
744 rdhpr %hpstate, %l3;\
745 jmp %r13;\
746 rdhpr %htstate, %l3;\
747 and %l3, 0xfe, %l3;\
748 wrhpr %l3, 0, %htstate;\
749 stw %r13, [%i7];\
750 retry
751
752#define My_Watchdog_Reset
753#define My_Watchdog_Reset \
754 ba wdog_red_ext;\
755 nop;retry;nop;nop;nop;nop;nop
756
757#define H_HT0_Control_Transfer_Instr_0x74
758#define My_H_HT0_Control_Transfer_Instr_0x74 \
759 rdpr %tstate, %l3;\
760 mov 1, %l4;\
761 sllx %l4, 20, %l4;\
762 wrpr %l3, %l4, %tstate ;\
763 retry;nop;
764
765#define H_T0_Control_Transfer_Instr_0x74
766#define My_H_T0_Control_Transfer_Instr_0x74 \
767 rdpr %tstate, %l3;\
768 mov 1, %l4;\
769 sllx %l4, 20, %l4;\
770 wrpr %l3, %l4, %tstate ;\
771 retry;nop;
772
773#define H_T1_Control_Transfer_Instr_0x74
774#define My_H_T1_Control_Transfer_Instr_0x74 \
775 rdpr %tstate, %l3;\
776 mov 1, %l4;\
777 sllx %l4, 20, %l4;\
778 wrpr %l3, %l4, %tstate ;\
779 retry;nop;
780# 707 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
781#define H_HT0_data_access_protection_0x6c
782#define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop
783
784#define H_HT0_PA_Watchpoint_0x61
785#define My_H_HT0_PA_Watchpoint_0x61 \
786 HT_HANDLER_RAND7_4;\
787 done
788
789#ifndef H_HT0_Data_access_error_0x32
790#define H_HT0_Data_access_error_0x32
791#define SUN_H_HT0_Data_access_error_0x32 \
792 done;nop
793#endif
794# 722 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
795#define H_T0_VA_Watchpoint_0x62
796#define My_T0_VA_Watchpoint_0x62 \
797 T_HANDLER_RAND7_5;\
798 done
799
800#define H_T1_VA_Watchpoint_0x62
801#define SUN_H_T1_VA_Watchpoint_0x62 \
802 T_HANDLER_RAND7_3;\
803 done
804
805#define H_HT0_VA_Watchpoint_0x62
806#define My_H_HT0_VA_Watchpoint_0x62 \
807 HT_HANDLER_RAND7_5;\
808 done
809
810#define H_HT0_Instruction_VA_Watchpoint_0x75
811#define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \
812 done;
813
814#define H_HT0_Instruction_Breakpoint_0x76
815#define SUN_H_HT0_Instruction_Breakpoint_0x76 \
816 rdhpr %htstate, %g1;\
817 wrhpr %g1, 0x400, %htstate;\
818 retry;nop
819# 748 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
820#define H_HT0_Instruction_address_range_0x0d
821#define SUN_H_HT0_Instruction_address_range_0x0d \
822 HT_HANDLER_RAND4_1;\
823 done;
824
825#define H_HT0_Instruction_real_range_0x0e
826#define SUN_H_HT0_Instruction_real_range_0x0e \
827 HT_HANDLER_RAND4_1;\
828 done;
829
830#define H_HT0_mem_real_range_0x2d
831#define SUN_H_HT0_mem_real_range_0x2d \
832 HT_HANDLER_RAND4_2;\
833 done;
834# 764 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
835#define H_HT0_mem_address_range_0x2e
836#define SUN_H_HT0_mem_address_range_0x2e \
837 HT_HANDLER_RAND4_3;\
838 done;
839
840#define H_HT0_DAE_nc_page_0x16
841#define SUN_H_HT0_DAE_nc_page_0x16 \
842 HT_HANDLER_RAND4_4;\
843 done;
844
845#define H_HT0_DAE_nfo_page_0x17
846#define SUN_H_HT0_DAE_nfo_page_0x17 \
847 HT_HANDLER_RAND4_5;\
848 done;
849# 780 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
850#define H_HT0_IAE_unauth_access_0x0b
851#define SUN_H_HT0_IAE_unauth_access_0x0b \
852 HT_HANDLER_RAND7_3;\
853 done;
854# 786 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
855#define H_HT0_IAE_nfo_page_0x0c
856#define SUN_H_HT0_IAE_nfo_page_0x0c \
857 HT_HANDLER_RAND7_6;\
858 done;
859# 792 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
860#define H_HT0_Reserved_0x3b
861#define SUN_H_HT0_Reserved_0x3b \
862 mov 0x80, %l3;\
863 stxa %l3, [%l3]0x5f ;\
864 stxa %l3, [%l3]0x57 ;\
865 done;
866# 802 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_handlers.s"
867#define H_HT0_IAE_privilege_violation_0x08
868#define My_HT0_IAE_privilege_violation_0x08 \
869 HT_HANDLER_RAND7_2;\
870 done;
871
872#ifndef H_HT0_Instruction_Access_MMU_Error_0x71
873#define H_HT0_Instruction_Access_MMU_Error_0x71
874#define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \
875 mov 0x80, %l3;\
876 stxa %l3, [%l3]0x5f ;\
877 stxa %l3, [%l3]0x57 ;\
878 retry;
879#endif
880
881#ifndef H_HT0_Data_Access_MMU_Error_0x72
882#define H_HT0_Data_Access_MMU_Error_0x72
883#define SUN_H_HT0_Data_Access_MMU_Error_0x72 \
884 mov 0x80, %l3;\
885 stxa %l3, [%l3]0x5f ;\
886 stxa %l3, [%l3]0x57 ;\
887 retry;
888#endif
889
890!!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!!
891# 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s"
892!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
893!!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!!
894
895#ifndef INT_HANDLER_RAND4_1
896#define INT_HANDLER_RAND4_1 retry; nop; nop; nop
897#endif
898#ifndef INT_HANDLER_RAND7_1
899#define INT_HANDLER_RAND7_1 mov 0x20,%g1; mov 1, %g2;stxa %g2,[%g1]0x40
900#endif
901#ifndef INT_HANDLER_RAND4_2
902#define INT_HANDLER_RAND4_2 retry; nop; nop; nop
903#endif
904#ifndef INT_HANDLER_RAND7_2
905#define INT_HANDLER_RAND7_2 mov 0x80,%g1;stxa %g0,[%g1]0x40
906#endif
907#ifndef INT_HANDLER_RAND4_3
908#define INT_HANDLER_RAND4_3 retry; nop; nop; nop
909#endif
910#ifndef INT_HANDLER_RAND7_3
911#define INT_HANDLER_RAND7_3 retry; nop; nop; nop ; nop; nop; nop
912#endif
913#define H_HT0_Externally_Initiated_Reset_0x03
914#define SUN_H_HT0_Externally_Initiated_Reset_0x03 \
915 ldxa [%g0] ASI_LSU_CTL_REG, %g1; \
916 set cregs_lsu_ctl_reg_r64, %g1; \
917 stxa %g1, [%g0] ASI_LSU_CTL_REG; \
918 retry;nop
919
920#define My_External_Reset \
921 ldxa [%g0] ASI_LSU_CTL_REG, %l5; \
922 set cregs_lsu_ctl_reg_r64, %l5; \
923 stxa %l5, [%g0] ASI_LSU_CTL_REG; \
924 retry;nop
925
926!!!!! SPU Interrupt Handlers
927
928#define H_HT0_Control_Word_Queue_Interrupt_0x3c
929#define My_HT0_Control_Word_Queue_Interrupt_0x3c \
930 INT_HANDLER_RAND7_1 ;\
931 retry ;
932
933#define H_HT0_Modular_Arithmetic_Interrupt_0x3d
934#define My_H_HT0_Modular_Arithmetic_Interrupt_0x3d \
935 INT_HANDLER_RAND7_2 ;\
936 retry ;
937# 59 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s"
938!!!!! HW interrupt handlers
939
940#define H_HT0_Interrupt_0x60
941#define My_HT0_Interrupt_0x60 \
942 ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g5 ;\
943 ldxa [%g0] ASI_SWVR_INTR_R, %g4 ;\
944 ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\
945 INT_HANDLER_RAND4_1 ;\
946 retry;
947
948!!!!! Queue interrupt handler
949# 72 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s"
950#define H_T0_Cpu_Mondo_Trap_0x7c
951#define My_T0_Cpu_Mondo_Trap_0x7c \
952 mov 0x3c8, %g3; \
953 ldxa [%g3] 0x25, %g5; \
954 mov 0x3c0, %g3; \
955 stxa %g5, [%g3] 0x25; \
956 retry; \
957 nop; \
958 nop; \
959 nop
960
961#define H_T0_Dev_Mondo_Trap_0x7d
962#define My_T0_Dev_Mondo_Trap_0x7d \
963 mov 0x3d8, %g3; \
964 ldxa [%g3] 0x25, %g5; \
965 mov 0x3d0, %g3; \
966 stxa %g5, [%g3] 0x25; \
967 retry; \
968 nop; \
969 nop; \
970 nop
971
972#define H_T0_Resumable_Error_0x7e
973#define My_T0_Resumable_Error_0x7e \
974 mov 0x3e8, %g3; \
975 ldxa [%g3] 0x25, %g5; \
976 mov 0x3e0, %g3; \
977 stxa %g5, [%g3] 0x25; \
978 retry; \
979 nop; \
980 nop; \
981 nop
982
983#define H_T1_Cpu_Mondo_Trap_0x7c
984#define My_T1_Cpu_Mondo_Trap_0x7c \
985 mov 0x3c8, %g3; \
986 ldxa [%g3] 0x25, %g5; \
987 mov 0x3c0, %g3; \
988 stxa %g5, [%g3] 0x25; \
989 retry; \
990 nop; \
991 nop; \
992 nop
993
994#define H_T1_Dev_Mondo_Trap_0x7d
995#define My_T1_Dev_Mondo_Trap_0x7d \
996 mov 0x3d8, %g3; \
997 ldxa [%g3] 0x25, %g5; \
998 mov 0x3d0, %g3; \
999 stxa %g5, [%g3] 0x25; \
1000 retry; \
1001 nop; \
1002 nop; \
1003 nop
1004
1005#define H_T1_Resumable_Error_0x7e
1006#define My_T1_Resumable_Error_0x7e \
1007 mov 0x3e8, %g3; \
1008 ldxa [%g3] 0x25, %g5; \
1009 mov 0x3e0, %g3; \
1010 stxa %g5, [%g3] 0x25; \
1011 retry; \
1012 nop; \
1013 nop; \
1014 nop
1015
1016#define H_HT0_Reserved_0x7c
1017#define SUN_H_HT0_Reserved_0x7c \
1018 mov 0x3c8, %g3; \
1019 ldxa [%g3] 0x25, %g5; \
1020 mov 0x3c0, %g3; \
1021 stxa %g5, [%g3] 0x25; \
1022 retry; \
1023 nop; \
1024 nop; \
1025 nop
1026
1027#define H_HT0_Reserved_0x7d
1028#define SUN_H_HT0_Reserved_0x7d \
1029 mov 0x3d8, %g3; \
1030 ldxa [%g3] 0x25, %g5; \
1031 mov 0x3d0, %g3; \
1032 stxa %g5, [%g3] 0x25; \
1033 retry; \
1034 nop; \
1035 nop; \
1036 nop
1037
1038#define H_HT0_Reserved_0x7e
1039#define SUN_H_HT0_Reserved_0x7e \
1040 mov 0x3e8, %g3; \
1041 ldxa [%g3] 0x25, %g5; \
1042 mov 0x3e0, %g3; \
1043 stxa %g5, [%g3] 0x25; \
1044 retry; \
1045 nop; \
1046 nop; \
1047 nop
1048# 172 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s"
1049!!!!! Hstick-match trap handler
1050# 175 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s"
1051#define H_T0_Reserved_0x5e
1052#define My_T0_Reserved_0x5e \
1053 rdhpr %hintp, %g3; \
1054 wrhpr %g3, %g3, %hintp; \
1055 retry; \
1056 nop; \
1057 nop; \
1058 nop; \
1059 nop; \
1060 nop
1061
1062#define H_HT0_Hstick_Match_0x5e
1063#define My_HT0_Hstick_Match_0x5e \
1064 rdhpr %hintp, %g3; \
1065 wrhpr %g3, %g3, %hintp; \
1066 retry; \
1067 nop; \
1068 nop; \
1069 nop; \
1070 nop; \
1071 nop
1072
1073#define H_T0_Reserved_0x5e
1074#define My_T0_Reserved_0x5e \
1075 rdhpr %hintp, %g3; \
1076 wrhpr %g3, %g3, %hintp; \
1077 retry; \
1078 nop; \
1079 nop; \
1080 nop; \
1081 nop; \
1082 nop
1083
1084#define H_T1_Reserved_0x5e
1085#define My_T1_Reserved_0x5e \
1086 rdhpr %hintp, %g3; \
1087 wrhpr %g3, %g3, %hintp; \
1088 retry; \
1089 nop; \
1090 nop; \
1091 nop; \
1092 nop; \
1093 nop
1094# 220 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s"
1095!!!!! SW interuupt handlers
1096# 223 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s"
1097#define H_T0_Interrupt_Level_14_0x4e
1098#define My_T0_Interrupt_Level_14_0x4e \
1099 rd %softint, %g3; \
1100 sethi %hi(0x14000), %g3; \
1101 or %g3, 0x1, %g3; \
1102 wr %g3, %g0, %clear_softint; \
1103 retry; \
1104 nop; \
1105 nop; \
1106 nop
1107
1108#define H_T0_Interrupt_Level_1_0x41
1109#define My_T0_Interrupt_Level_1_0x41 \
1110 rd %softint, %g3; \
1111 or %g0, 0x2, %g3; \
1112 wr %g3, %g0, %clear_softint; \
1113 retry; \
1114 nop; \
1115 nop; \
1116 nop; \
1117 nop
1118
1119#define H_T0_Interrupt_Level_2_0x42
1120#define My_T0_Interrupt_Level_2_0x42 \
1121 rd %softint, %g3; \
1122 or %g0, 0x4, %g3; \
1123 wr %g3, %g0, %clear_softint; \
1124 retry; \
1125 nop; \
1126 nop; \
1127 nop; \
1128 nop
1129
1130#define H_T0_Interrupt_Level_3_0x43
1131#define My_T0_Interrupt_Level_3_0x43 \
1132 rd %softint, %g3; \
1133 or %g0, 0x8, %g3; \
1134 wr %g3, %g0, %clear_softint; \
1135 retry; \
1136 nop; \
1137 nop; \
1138 nop; \
1139 nop
1140
1141#define H_T0_Interrupt_Level_4_0x44
1142#define My_T0_Interrupt_Level_4_0x44 \
1143 rd %softint, %g3; \
1144 or %g0, 0x10, %g3; \
1145 wr %g3, %g0, %clear_softint; \
1146 retry; \
1147 nop; \
1148 nop; \
1149 nop; \
1150 nop
1151
1152#define H_T0_Interrupt_Level_5_0x45
1153#define My_T0_Interrupt_Level_5_0x45 \
1154 rd %softint, %g3; \
1155 or %g0, 0x20, %g3; \
1156 wr %g3, %g0, %clear_softint; \
1157 retry; \
1158 nop; \
1159 nop; \
1160 nop; \
1161 nop
1162
1163#define H_T0_Interrupt_Level_6_0x46
1164#define My_T0_Interrupt_Level_6_0x46 \
1165 rd %softint, %g3; \
1166 or %g0, 0x40, %g3; \
1167 wr %g3, %g0, %clear_softint; \
1168 retry; \
1169 nop; \
1170 nop; \
1171 nop; \
1172 nop
1173
1174#define H_T0_Interrupt_Level_7_0x47
1175#define My_T0_Interrupt_Level_7_0x47 \
1176 rd %softint, %g3; \
1177 or %g0, 0x80, %g3; \
1178 wr %g3, %g0, %clear_softint; \
1179 retry; \
1180 nop; \
1181 nop; \
1182 nop; \
1183 nop
1184
1185#define H_T0_Interrupt_Level_8_0x48
1186#define My_T0_Interrupt_Level_8_0x48 \
1187 rd %softint, %g3; \
1188 or %g0, 0x100, %g3; \
1189 wr %g3, %g0, %clear_softint; \
1190 retry; \
1191 nop; \
1192 nop; \
1193 nop; \
1194 nop
1195
1196#define H_T0_Interrupt_Level_9_0x49
1197#define My_T0_Interrupt_Level_9_0x49 \
1198 rd %softint, %g3; \
1199 or %g0, 0x200, %g3; \
1200 wr %g3, %g0, %clear_softint; \
1201 retry; \
1202 nop; \
1203 nop; \
1204 nop; \
1205 nop
1206
1207#define H_T0_Interrupt_Level_10_0x4a
1208#define My_T0_Interrupt_Level_10_0x4a \
1209 rd %softint, %g3; \
1210 or %g0, 0x400, %g3; \
1211 wr %g3, %g0, %clear_softint; \
1212 retry; \
1213 nop; \
1214 nop; \
1215 nop; \
1216 nop
1217
1218#define H_T0_Interrupt_Level_11_0x4b
1219#define My_T0_Interrupt_Level_11_0x4b \
1220 rd %softint, %g3; \
1221 or %g0, 0x800, %g3; \
1222 wr %g3, %g0, %clear_softint; \
1223 retry; \
1224 nop; \
1225 nop; \
1226 nop; \
1227 nop
1228
1229#define H_T0_Interrupt_Level_12_0x4c
1230#define My_T0_Interrupt_Level_12_0x4c \
1231 rd %softint, %g3; \
1232 sethi %hi(0x1000), %g3; \
1233 wr %g3, %g0, %clear_softint; \
1234 retry; \
1235 nop; \
1236 nop; \
1237 nop; \
1238 nop
1239
1240#define H_T0_Interrupt_Level_13_0x4d
1241#define My_T0_Interrupt_Level_13_0x4d \
1242 rd %softint, %g3; \
1243 sethi %hi(0x2000), %g3; \
1244 wr %g3, %g0, %clear_softint; \
1245 retry; \
1246 nop; \
1247 nop; \
1248 nop; \
1249 nop
1250
1251#define H_T0_Interrupt_Level_15_0x4f
1252#define My_T0_Interrupt_Level_15_0x4f \
1253 sethi %hi(0x8000), %g3; \
1254 wr %g3, %g0, %clear_softint; \
1255 wr %g0, %g0, %pic;\
1256 sethi %hi(0x80040000), %g2;\
1257 rd %pcr, %g3;\
1258 andn %g3, %g2, %g3;\
1259 wr %g3, %g0, %pcr;\
1260 retry;
1261
1262
1263#define H_T1_Interrupt_Level_14_0x4e
1264#define My_T1_Interrupt_Level_14_0x4e \
1265 rd %softint, %g3; \
1266 sethi %hi(0x14000), %g3; \
1267 or %g3, 0x1, %g3; \
1268 wr %g3, %g0, %clear_softint; \
1269 retry; \
1270 nop; \
1271 nop; \
1272 nop
1273
1274#define H_T1_Interrupt_Level_1_0x41
1275#define My_T1_Interrupt_Level_1_0x41 \
1276 rd %softint, %g3; \
1277 or %g0, 0x2, %g3; \
1278 wr %g3, %g0, %clear_softint; \
1279 retry; \
1280 nop; \
1281 nop; \
1282 nop; \
1283 nop
1284
1285#define H_T1_Interrupt_Level_2_0x42
1286#define My_T1_Interrupt_Level_2_0x42 \
1287 rd %softint, %g3; \
1288 or %g0, 0x4, %g3; \
1289 wr %g3, %g0, %clear_softint; \
1290 retry; \
1291 nop; \
1292 nop; \
1293 nop; \
1294 nop
1295
1296#define H_T1_Interrupt_Level_3_0x43
1297#define My_T1_Interrupt_Level_3_0x43 \
1298 rd %softint, %g3; \
1299 or %g0, 0x8, %g3; \
1300 wr %g3, %g0, %clear_softint; \
1301 retry; \
1302 nop; \
1303 nop; \
1304 nop; \
1305 nop
1306
1307#define H_T1_Interrupt_Level_4_0x44
1308#define My_T1_Interrupt_Level_4_0x44 \
1309 rd %softint, %g3; \
1310 or %g0, 0x10, %g3; \
1311 wr %g3, %g0, %clear_softint; \
1312 retry; \
1313 nop; \
1314 nop; \
1315 nop; \
1316 nop
1317
1318#define H_T1_Interrupt_Level_5_0x45
1319#define My_T1_Interrupt_Level_5_0x45 \
1320 rd %softint, %g3; \
1321 or %g0, 0x20, %g3; \
1322 wr %g3, %g0, %clear_softint; \
1323 retry; \
1324 nop; \
1325 nop; \
1326 nop; \
1327 nop
1328
1329#define H_T1_Interrupt_Level_6_0x46
1330#define My_T1_Interrupt_Level_6_0x46 \
1331 rd %softint, %g3; \
1332 or %g0, 0x40, %g3; \
1333 wr %g3, %g0, %clear_softint; \
1334 retry; \
1335 nop; \
1336 nop; \
1337 nop; \
1338 nop
1339
1340#define H_T1_Interrupt_Level_7_0x47
1341#define My_T1_Interrupt_Level_7_0x47 \
1342 rd %softint, %g3; \
1343 or %g0, 0x80, %g3; \
1344 wr %g3, %g0, %clear_softint; \
1345 retry; \
1346 nop; \
1347 nop; \
1348 nop; \
1349 nop
1350
1351#define H_T1_Interrupt_Level_8_0x48
1352#define My_T1_Interrupt_Level_8_0x48 \
1353 rd %softint, %g3; \
1354 or %g0, 0x100, %g3; \
1355 wr %g3, %g0, %clear_softint; \
1356 retry; \
1357 nop; \
1358 nop; \
1359 nop; \
1360 nop
1361
1362#define H_T1_Interrupt_Level_9_0x49
1363#define My_T1_Interrupt_Level_9_0x49 \
1364 rd %softint, %g3; \
1365 or %g0, 0x200, %g3; \
1366 wr %g3, %g0, %clear_softint; \
1367 retry; \
1368 nop; \
1369 nop; \
1370 nop; \
1371 nop
1372
1373#define H_T1_Interrupt_Level_10_0x4a
1374#define My_T1_Interrupt_Level_10_0x4a \
1375 rd %softint, %g3; \
1376 or %g0, 0x400, %g3; \
1377 wr %g3, %g0, %clear_softint; \
1378 retry; \
1379 nop; \
1380 nop; \
1381 nop; \
1382 nop
1383
1384#define H_T1_Interrupt_Level_11_0x4b
1385#define My_T1_Interrupt_Level_11_0x4b \
1386 rd %softint, %g3; \
1387 or %g0, 0x800, %g3; \
1388 wr %g3, %g0, %clear_softint; \
1389 retry; \
1390 nop; \
1391 nop; \
1392 nop; \
1393 nop
1394
1395#define H_T1_Interrupt_Level_12_0x4c
1396#define My_T1_Interrupt_Level_12_0x4c \
1397 rd %softint, %g3; \
1398 sethi %hi(0x1000), %g3; \
1399 wr %g3, %g0, %clear_softint; \
1400 retry; \
1401 nop; \
1402 nop; \
1403 nop; \
1404 nop
1405
1406#define H_T1_Interrupt_Level_13_0x4d
1407#define My_T1_Interrupt_Level_13_0x4d \
1408 rd %softint, %g3; \
1409 sethi %hi(0x2000), %g3; \
1410 wr %g3, %g0, %clear_softint; \
1411 retry; \
1412 nop; \
1413 nop; \
1414 nop; \
1415 nop
1416
1417#define H_T1_Interrupt_Level_15_0x4f
1418#define My_T1_Interrupt_Level_15_0x4f \
1419 sethi %hi(0x8000), %g3; \
1420 wr %g3, %g0, %clear_softint; \
1421 wr %g0, %g0, %pic;\
1422 sethi %hi(0x80040000), %g2;\
1423 rd %pcr, %g3;\
1424 andn %g3, %g2, %g3;\
1425 wr %g3, %g0, %pcr;\
1426 retry;
1427
1428
1429#define H_HT0_Interrupt_Level_14_0x4e
1430#define My_HT0_Interrupt_Level_14_0x4e \
1431 rd %softint, %g3; \
1432 sethi %hi(0x14000), %g3; \
1433 or %g3, 0x1, %g3; \
1434 wr %g3, %g0, %clear_softint; \
1435 retry; \
1436 nop; \
1437 nop; \
1438 nop
1439
1440#define H_HT0_Interrupt_Level_1_0x41
1441#define My_HT0_Interrupt_Level_1_0x41 \
1442 rd %softint, %g3; \
1443 or %g0, 0x2, %g3; \
1444 wr %g3, %g0, %clear_softint; \
1445 retry; \
1446 nop; \
1447 nop; \
1448 nop; \
1449 nop
1450
1451#define H_HT0_Interrupt_Level_2_0x42
1452#define My_HT0_Interrupt_Level_2_0x42 \
1453 rd %softint, %g3; \
1454 or %g0, 0x4, %g3; \
1455 wr %g3, %g0, %clear_softint; \
1456 retry; \
1457 nop; \
1458 nop; \
1459 nop; \
1460 nop
1461
1462#define H_HT0_Interrupt_Level_3_0x43
1463#define My_HT0_Interrupt_Level_3_0x43 \
1464 rd %softint, %g3; \
1465 or %g0, 0x8, %g3; \
1466 wr %g3, %g0, %clear_softint; \
1467 retry; \
1468 nop; \
1469 nop; \
1470 nop; \
1471 nop
1472
1473#define H_HT0_Interrupt_Level_4_0x44
1474#define My_HT0_Interrupt_Level_4_0x44 \
1475 rd %softint, %g3; \
1476 or %g0, 0x10, %g3; \
1477 wr %g3, %g0, %clear_softint; \
1478 retry; \
1479 nop; \
1480 nop; \
1481 nop; \
1482 nop
1483
1484#define H_HT0_Interrupt_Level_5_0x45
1485#define My_HT0_Interrupt_Level_5_0x45 \
1486 rd %softint, %g3; \
1487 or %g0, 0x20, %g3; \
1488 wr %g3, %g0, %clear_softint; \
1489 retry; \
1490 nop; \
1491 nop; \
1492 nop; \
1493 nop
1494
1495#define H_HT0_Interrupt_Level_6_0x46
1496#define My_HT0_Interrupt_Level_6_0x46 \
1497 rd %softint, %g3; \
1498 or %g0, 0x40, %g3; \
1499 wr %g3, %g0, %clear_softint; \
1500 retry; \
1501 nop; \
1502 nop; \
1503 nop; \
1504 nop
1505
1506#define H_HT0_Interrupt_Level_7_0x47
1507#define My_HT0_Interrupt_Level_7_0x47 \
1508 rd %softint, %g3; \
1509 or %g0, 0x80, %g3; \
1510 wr %g3, %g0, %clear_softint; \
1511 retry; \
1512 nop; \
1513 nop; \
1514 nop; \
1515 nop
1516
1517#define H_HT0_Interrupt_Level_8_0x48
1518#define My_HT0_Interrupt_Level_8_0x48 \
1519 rd %softint, %g3; \
1520 or %g0, 0x100, %g3; \
1521 wr %g3, %g0, %clear_softint; \
1522 retry; \
1523 nop; \
1524 nop; \
1525 nop; \
1526 nop
1527
1528#define H_HT0_Interrupt_Level_9_0x49
1529#define My_HT0_Interrupt_Level_9_0x49 \
1530 rd %softint, %g3; \
1531 or %g0, 0x200, %g3; \
1532 wr %g3, %g0, %clear_softint; \
1533 retry; \
1534 nop; \
1535 nop; \
1536 nop; \
1537 nop
1538
1539#define H_HT0_Interrupt_Level_10_0x4a
1540#define My_HT0_Interrupt_Level_10_0x4a \
1541 rd %softint, %g3; \
1542 or %g0, 0x400, %g3; \
1543 wr %g3, %g0, %clear_softint; \
1544 retry; \
1545 nop; \
1546 nop; \
1547 nop; \
1548 nop
1549
1550#define H_HT0_Interrupt_Level_11_0x4b
1551#define My_HT0_Interrupt_Level_11_0x4b \
1552 rd %softint, %g3; \
1553 or %g0, 0x800, %g3; \
1554 wr %g3, %g0, %clear_softint; \
1555 retry; \
1556 nop; \
1557 nop; \
1558 nop; \
1559 nop
1560
1561#define H_HT0_Interrupt_Level_12_0x4c
1562#define My_HT0_Interrupt_Level_12_0x4c \
1563 rd %softint, %g3; \
1564 sethi %hi(0x1000), %g3; \
1565 wr %g3, %g0, %clear_softint; \
1566 retry; \
1567 nop; \
1568 nop; \
1569 nop; \
1570 nop
1571
1572#define H_HT0_Interrupt_Level_13_0x4d
1573#define My_HT0_Interrupt_Level_13_0x4d \
1574 rd %softint, %g3; \
1575 sethi %hi(0x2000), %g3; \
1576 wr %g3, %g0, %clear_softint; \
1577 retry; \
1578 nop; \
1579 nop; \
1580 nop; \
1581 nop
1582
1583#define H_HT0_Interrupt_Level_15_0x4f
1584#define My_HT0_Interrupt_Level_15_0x4f \
1585 sethi %hi(0x8000), %g3; \
1586 wr %g3, %g0, %clear_softint; \
1587 wr %g0, %g0, %pic;\
1588 sethi %hi(0x80040000), %g2;\
1589 rd %pcr, %g3;\
1590 andn %g3, %g2, %g3;\
1591 wr %g3, %g0, %pcr;\
1592 retry;
1593
1594# 710 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_intr_handlers.s"
1595!!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!!
1596# 576 "diag.j.pp"
1597!# Steer towards main TBA on these errors ..
1598!# These are redefines ...
1599#undef SUN_H_HT0_DAE_nc_page_0x16
1600#define SUN_H_HT0_DAE_nc_page_0x16 \
1601 best_set_reg(0x120000, %r1, %r2);\
1602 wrpr %r0, %r2, %tba; \
1603 done;nop
1604
1605#undef SUN_H_HT0_DAE_nfo_page_0x17
1606#define SUN_H_HT0_DAE_nfo_page_0x17 \
1607 best_set_reg(0x120000, %r1, %r2);\
1608 wrpr %r0, %r2, %tba; \
1609 done;nop
1610
1611#undef SUN_H_HT0_IAE_unauth_access_0x0b
1612#define SUN_H_HT0_IAE_unauth_access_0x0b \
1613 set resolve_bad_tte, %g3;\
1614 jmp %g3;\
1615 nop
1616
1617#undef My_HT0_IAE_privilege_violation_0x08
1618#define My_HT0_IAE_privilege_violation_0x08 \
1619 set resolve_bad_tte, %g3;\
1620 jmp %g3;\
1621 nop
1622
1623#define H_HT0_Instruction_address_range_0x0d
1624#define SUN_H_HT0_Instruction_address_range_0x0d \
1625 rdpr %tpc, %g1;\
1626 rdpr %tnpc, %g2;\
1627 stw %g1, [%i7];\
1628 stw %g2, [%i7+4];\
1629 jmpl %r27+8, %r27;\
1630 fdivd %f0, %f4, %f4;\
1631 nop;
1632
1633#define H_HT0_Instruction_real_range_0x0e
1634#define SUN_H_HT0_Instruction_real_range_0x0e \
1635 rdpr %tpc, %g1;\
1636 rdpr %tnpc, %g2;\
1637 stw %g1, [%i7];\
1638 stw %g2, [%i7+4];\
1639 jmpl %r27+8, %r27;\
1640 fdivd %f0, %f4, %f4;\
1641 nop;
1642
1643#undef SUN_H_HT0_IAE_nfo_page_0x0c
1644#define SUN_H_HT0_IAE_nfo_page_0x0c \
1645 set resolve_bad_tte, %g3;\
1646 jmp %g3;\
1647 nop
1648
1649#define H_HT0_Instruction_Invalid_TSB_Entry_0x2a
1650#define SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a \
1651 set restore_range_regs, %g3;\
1652 jmp %g3;\
1653 nop
1654
1655#define H_HT0_Data_Invalid_TSB_Entry_0x2b
1656#define SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b \
1657 set restore_range_regs, %g3;\
1658 jmp %g3;\
1659 nop
1660
1661#undef FAST_BOOT
1662#include "hboot.s"
1663
1664#ifndef MULTIPASS
1665#define MULTIPASS 0
1666#endif
1667# 648 "diag.j.pp"
1668#define LOMEIN_TEXT_VA [0x]mpeval(MAIN_BASE_TEXT_VA&0xffffffff,16)
1669#define LOMEIN_DATA_VA [0x]mpeval(MAIN_BASE_DATA_VA&0xffffffff,16)
1670changequote([, ])dnl
1671SECTION .LOMEIN TEXT_VA=LOMEIN_TEXT_VA, DATA_VA=LOMEIN_DATA_VA
1672attr_text {
1673 Name = .LOMEIN,
1674 VA= LOMEIN_TEXT_VA,
1675 RA= MAIN_BASE_TEXT_RA,
1676 PA= ra2pa2(MAIN_BASE_TEXT_RA, 0),
1677 part_0_ctx_nonzero_tsb_config_1,
1678 part_0_ctx_zero_tsb_config_1,
1679 TTE_G=1, TTE_Context=0x44, TTE_V=1,
1680 TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1681 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1,
1682 tsbonly
1683 }
1684attr_data {
1685 Name = .LOMEIN,
1686 VA= LOMEIN_DATA_VA,
1687 RA= MAIN_BASE_DATA_RA,
1688 PA= ra2pa2(MAIN_BASE_DATA_RA, 0),
1689 part_0_ctx_nonzero_tsb_config_2,
1690 part_0_ctx_zero_tsb_config_2
1691 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
1692 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1693 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
1694 tsbonly
1695 }
1696attr_data {
1697 Name = .LOMEIN,
1698 VA= LOMEIN_DATA_VA,
1699 RA= MAIN_BASE_DATA_RA,
1700 PA= ra2pa2(MAIN_BASE_DATA_RA, 0),
1701 part_0_ctx_nonzero_tsb_config_3,
1702 part_0_ctx_zero_tsb_config_3
1703 TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0,
1704 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1705 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
1706 tsbonly
1707 }
1708.text
1709.align 0x100000
1710 nop
1711.data
1712 .word 0x0
1713
1714SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA
1715attr_text {
1716 Name = .MAIN,
1717 VA=MAIN_BASE_TEXT_VA,
1718 RA= LOMEIN_TEXT_VA,
1719 PA= LOMEIN_TEXT_VA,
1720 part_0_ctx_nonzero_tsb_config_2,
1721 part_0_ctx_zero_tsb_config_2,
1722 TTE_G=1, TTE_Context=0x44, TTE_V=1,
1723 TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1724 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1,
1725 }
1726
1727attr_data {
1728 Name = .MAIN,
1729 VA=MAIN_BASE_DATA_VA
1730 RA= LOMEIN_DATA_VA,
1731 PA= LOMEIN_DATA_VA,
1732 part_0_ctx_nonzero_tsb_config_1,
1733 part_0_ctx_zero_tsb_config_1
1734 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
1735 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1736 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
1737 }
1738
1739attr_data {
1740 Name = .MAIN,
1741 VA=MAIN_BASE_DATA_VA
1742 RA= LOMEIN_DATA_VA,
1743 PA= LOMEIN_DATA_VA,
1744 part_0_ctx_nonzero_tsb_config_3,
1745 part_0_ctx_zero_tsb_config_3
1746 TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0,
1747 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1748 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
1749 tsbonly
1750 }
1751
1752attr_text {
1753 Name = .MAIN,
1754 VA=MAIN_BASE_TEXT_VA,
1755 hypervisor
1756}
1757
1758attr_data {
1759 Name = .MAIN,
1760 VA=MAIN_BASE_DATA_VA
1761 hypervisor
1762}
1763changequote(`,')dnl'
1764
1765.text
1766.global main
1767main:
1768
1769 ! Set up ld/st area per thread
1770 ta T_CHANGE_HPRIV
1771 ldxa [%g0]0x63, %o2
1772 and %o2, 0x7, %o1
1773 brnz %o1, init_start
1774 mov 0xff, %r11
1775lock_sync_thds:
1776 set sync_thr_counter4, %r23
1777#ifndef SPC
1778 and %o2, 0x38, %o2
1779 add %o2,%r23,%r23 !Core's sync counter
1780#endif
1781 st %r11, [%r23] !lock sync_thr_counter4
1782 add %r23, 64, %r23
1783 st %r11, [%r23] !lock sync_thr_counter5
1784 add %r23, 64, %r23
1785 st %r11, [%r23] !lock sync_thr_counter6
1786init_start:
1787 ta T_CHANGE_NONHPRIV
1788 umul %r9, 256, %r31
1789 setx user_data_start, %r1, %r3
1790 add %r31, %r3, %r31
1791 wr %r0, 0x4, %asi
1792
1793!Initializing integer registers
1794 ldx [%r31+0], %r0
1795 ldx [%r31+8], %r1
1796 ldx [%r31+16], %r2
1797 ldx [%r31+24], %r3
1798 ldx [%r31+32], %r4
1799 ldx [%r31+40], %r5
1800 ldx [%r31+48], %r6
1801 ldx [%r31+56], %r7
1802 ldx [%r31+64], %r8
1803 ldx [%r31+72], %r9
1804 ldx [%r31+80], %r10
1805 ldx [%r31+88], %r11
1806 ldx [%r31+96], %r12
1807 ldx [%r31+104], %r13
1808 ldx [%r31+112], %r14
1809 mov %r31, %r15
1810 ldx [%r31+128], %r16
1811 ldx [%r31+136], %r17
1812 ldx [%r31+144], %r18
1813 ldx [%r31+152], %r19
1814 ldx [%r31+160], %r20
1815 ldx [%r31+168], %r21
1816 ldx [%r31+176], %r22
1817 ldx [%r31+184], %r23
1818 ldx [%r31+192], %r24
1819 ldx [%r31+200], %r25
1820 ldx [%r31+208], %r26
1821 ldx [%r31+216], %r27
1822 ldx [%r31+224], %r28
1823 ldx [%r31+232], %r29
1824 mov 0x35, %r14
1825 mov 0xb0, %r30
1826 save %r31, %r0, %r31
1827 ldx [%r31+0], %r0
1828 ldx [%r31+8], %r1
1829 ldx [%r31+16], %r2
1830 ldx [%r31+24], %r3
1831 ldx [%r31+32], %r4
1832 ldx [%r31+40], %r5
1833 ldx [%r31+48], %r6
1834 ldx [%r31+56], %r7
1835 ldx [%r31+64], %r8
1836 ldx [%r31+72], %r9
1837 ldx [%r31+80], %r10
1838 ldx [%r31+88], %r11
1839 ldx [%r31+96], %r12
1840 ldx [%r31+104], %r13
1841 ldx [%r31+112], %r14
1842 mov %r31, %r15
1843 ldx [%r31+128], %r16
1844 ldx [%r31+136], %r17
1845 ldx [%r31+144], %r18
1846 ldx [%r31+152], %r19
1847 ldx [%r31+160], %r20
1848 ldx [%r31+168], %r21
1849 ldx [%r31+176], %r22
1850 ldx [%r31+184], %r23
1851 ldx [%r31+192], %r24
1852 ldx [%r31+200], %r25
1853 ldx [%r31+208], %r26
1854 ldx [%r31+216], %r27
1855 ldx [%r31+224], %r28
1856 ldx [%r31+232], %r29
1857 mov 0x32, %r14
1858 mov 0x32, %r30
1859 save %r31, %r0, %r31
1860 ldx [%r31+0], %r0
1861 ldx [%r31+8], %r1
1862 ldx [%r31+16], %r2
1863 ldx [%r31+24], %r3
1864 ldx [%r31+32], %r4
1865 ldx [%r31+40], %r5
1866 ldx [%r31+48], %r6
1867 ldx [%r31+56], %r7
1868 ldx [%r31+64], %r8
1869 ldx [%r31+72], %r9
1870 ldx [%r31+80], %r10
1871 ldx [%r31+88], %r11
1872 ldx [%r31+96], %r12
1873 ldx [%r31+104], %r13
1874 ldx [%r31+112], %r14
1875 mov %r31, %r15
1876 ldx [%r31+128], %r16
1877 ldx [%r31+136], %r17
1878 ldx [%r31+144], %r18
1879 ldx [%r31+152], %r19
1880 ldx [%r31+160], %r20
1881 ldx [%r31+168], %r21
1882 ldx [%r31+176], %r22
1883 ldx [%r31+184], %r23
1884 ldx [%r31+192], %r24
1885 ldx [%r31+200], %r25
1886 ldx [%r31+208], %r26
1887 ldx [%r31+216], %r27
1888 ldx [%r31+224], %r28
1889 ldx [%r31+232], %r29
1890 mov 0x33, %r14
1891 mov 0xb5, %r30
1892 save %r31, %r0, %r31
1893 ldx [%r31+0], %r0
1894 ldx [%r31+8], %r1
1895 ldx [%r31+16], %r2
1896 ldx [%r31+24], %r3
1897 ldx [%r31+32], %r4
1898 ldx [%r31+40], %r5
1899 ldx [%r31+48], %r6
1900 ldx [%r31+56], %r7
1901 ldx [%r31+64], %r8
1902 ldx [%r31+72], %r9
1903 ldx [%r31+80], %r10
1904 ldx [%r31+88], %r11
1905 ldx [%r31+96], %r12
1906 ldx [%r31+104], %r13
1907 ldx [%r31+112], %r14
1908 mov %r31, %r15
1909 ldx [%r31+128], %r16
1910 ldx [%r31+136], %r17
1911 ldx [%r31+144], %r18
1912 ldx [%r31+152], %r19
1913 ldx [%r31+160], %r20
1914 ldx [%r31+168], %r21
1915 ldx [%r31+176], %r22
1916 ldx [%r31+184], %r23
1917 ldx [%r31+192], %r24
1918 ldx [%r31+200], %r25
1919 ldx [%r31+208], %r26
1920 ldx [%r31+216], %r27
1921 ldx [%r31+224], %r28
1922 ldx [%r31+232], %r29
1923 mov 0x35, %r14
1924 mov 0xb0, %r30
1925 save %r31, %r0, %r31
1926 ldx [%r31+0], %r0
1927 ldx [%r31+8], %r1
1928 ldx [%r31+16], %r2
1929 ldx [%r31+24], %r3
1930 ldx [%r31+32], %r4
1931 ldx [%r31+40], %r5
1932 ldx [%r31+48], %r6
1933 ldx [%r31+56], %r7
1934 ldx [%r31+64], %r8
1935 ldx [%r31+72], %r9
1936 ldx [%r31+80], %r10
1937 ldx [%r31+88], %r11
1938 ldx [%r31+96], %r12
1939 ldx [%r31+104], %r13
1940 ldx [%r31+112], %r14
1941 mov %r31, %r15
1942 ldx [%r31+128], %r16
1943 ldx [%r31+136], %r17
1944 ldx [%r31+144], %r18
1945 ldx [%r31+152], %r19
1946 ldx [%r31+160], %r20
1947 ldx [%r31+168], %r21
1948 ldx [%r31+176], %r22
1949 ldx [%r31+184], %r23
1950 ldx [%r31+192], %r24
1951 ldx [%r31+200], %r25
1952 ldx [%r31+208], %r26
1953 ldx [%r31+216], %r27
1954 ldx [%r31+224], %r28
1955 ldx [%r31+232], %r29
1956 mov 0x32, %r14
1957 mov 0x30, %r30
1958 save %r31, %r0, %r31
1959 ldx [%r31+0], %r0
1960 ldx [%r31+8], %r1
1961 ldx [%r31+16], %r2
1962 ldx [%r31+24], %r3
1963 ldx [%r31+32], %r4
1964 ldx [%r31+40], %r5
1965 ldx [%r31+48], %r6
1966 ldx [%r31+56], %r7
1967 ldx [%r31+64], %r8
1968 ldx [%r31+72], %r9
1969 ldx [%r31+80], %r10
1970 ldx [%r31+88], %r11
1971 ldx [%r31+96], %r12
1972 ldx [%r31+104], %r13
1973 ldx [%r31+112], %r14
1974 mov %r31, %r15
1975 ldx [%r31+128], %r16
1976 ldx [%r31+136], %r17
1977 ldx [%r31+144], %r18
1978 ldx [%r31+152], %r19
1979 ldx [%r31+160], %r20
1980 ldx [%r31+168], %r21
1981 ldx [%r31+176], %r22
1982 ldx [%r31+184], %r23
1983 ldx [%r31+192], %r24
1984 ldx [%r31+200], %r25
1985 ldx [%r31+208], %r26
1986 ldx [%r31+216], %r27
1987 ldx [%r31+224], %r28
1988 ldx [%r31+232], %r29
1989 mov 0xb0, %r14
1990 mov 0xb1, %r30
1991 save %r31, %r0, %r31
1992 ldx [%r31+0], %r0
1993 ldx [%r31+8], %r1
1994 ldx [%r31+16], %r2
1995 ldx [%r31+24], %r3
1996 ldx [%r31+32], %r4
1997 ldx [%r31+40], %r5
1998 ldx [%r31+48], %r6
1999 ldx [%r31+56], %r7
2000 ldx [%r31+64], %r8
2001 ldx [%r31+72], %r9
2002 ldx [%r31+80], %r10
2003 ldx [%r31+88], %r11
2004 ldx [%r31+96], %r12
2005 ldx [%r31+104], %r13
2006 ldx [%r31+112], %r14
2007 mov %r31, %r15
2008 ldx [%r31+128], %r16
2009 ldx [%r31+136], %r17
2010 ldx [%r31+144], %r18
2011 ldx [%r31+152], %r19
2012 ldx [%r31+160], %r20
2013 ldx [%r31+168], %r21
2014 ldx [%r31+176], %r22
2015 ldx [%r31+184], %r23
2016 ldx [%r31+192], %r24
2017 ldx [%r31+200], %r25
2018 ldx [%r31+208], %r26
2019 ldx [%r31+216], %r27
2020 ldx [%r31+224], %r28
2021 ldx [%r31+232], %r29
2022 mov 0xb1, %r14
2023 mov 0xb0, %r30
2024 save %r31, %r0, %r31
2025 restore
2026 restore
2027 restore
2028!Initializing float registers
2029 ldd [%r31+0], %f0
2030 ldd [%r31+16], %f2
2031 ldd [%r31+32], %f4
2032 ldd [%r31+48], %f6
2033 ldd [%r31+64], %f8
2034 ldd [%r31+80], %f10
2035 ldd [%r31+96], %f12
2036 ldd [%r31+112], %f14
2037 ldd [%r31+128], %f16
2038 ldd [%r31+144], %f18
2039 ldd [%r31+160], %f20
2040 ldd [%r31+176], %f22
2041 ldd [%r31+192], %f24
2042 ldd [%r31+208], %f26
2043 ldd [%r31+224], %f28
2044 ldd [%r31+240], %f30
2045 !! Set TPC/TNPC to diag-finish in case we get to a strange TL ..
2046 ta T_CHANGE_HPRIV
2047 setx diag_finish, %r29, %r28
2048 add %r28, 4, %r29
2049 wrpr %g0, 1, %tl
2050 wrpr %r28, %tpc
2051 wrpr %r29, %tnpc
2052 wrpr %g0, 2, %tl
2053 wrpr %r28, %tpc
2054 wrpr %r29, %tnpc
2055 wrpr %g0, 3, %tl
2056 wrpr %r28, %tpc
2057 wrpr %r29, %tnpc
2058 wrpr %g0, 4, %tl
2059 wrpr %r28, %tpc
2060 wrpr %r29, %tnpc
2061 wrpr %g0, 5, %tl
2062 wrpr %r28, %tpc
2063 wrpr %r29, %tnpc
2064 wrpr %g0, 6, %tl
2065 wrpr %r28, %tpc
2066 wrpr %r29, %tnpc
2067 wrpr %g0, 0, %tl
2068
2069 !Initializing Tick Cmprs
2070 mov 1, %g2
2071 sllx %g2, 63, %g2
2072 or %g1, %g2, %g1
2073 wrhpr %g1, %g0, %hsys_tick_cmpr
2074 wr %g1, %g0, %tick_cmpr
2075 wr %g1, %g0, %sys_tick_cmpr
2076
2077#if (MULTIPASS > 0)
2078 mov 0x38, %g1
2079 stxa %r0, [%g1]ASI_SCRATCHPAD
2080#endif
2081
2082 ! Set up fpr PMU traps
2083 set 0x2b409973, %g2
2084 b fork_threads
2085 wr %g2, %g0, %pcr
2086
2087common_target:
2088 nop
2089 sub %r27, 8, %r27
2090 and %r27, 8, %r12
2091 mov HIGHVA_HIGHNUM, %r11
2092 sllx %r11, 32, %r11
2093 or %r27, %r11, %r27
2094 brz,a %r12, .+8
2095 lduw [%r27], %r12 ! load jmp dest into dcache - xinval
2096 jmp %r27
2097 .word 0xc30fc000 ! 1: LDXFSR_R ld-fsr [%r31, %r0], %f1
2098 nop
2099 jmp %r27
2100 nop
2101fork_threads:
2102 rd %tick, %r17
2103 mov 0x40, %g1
2104setup_hwtw_config:
2105 stxa %r17, [%g1]0x58
2106 ta %icc, T_RD_THID
2107! fork: source strm = 0xffffffffffffffff; target strm = 0x1
2108 cmp %o1, 0
2109 setx fork_lbl_0_1, %g2, %g3
2110 be,a .+8
2111 jmp %g3
2112 nop
2113! fork: source strm = 0xffffffffffffffff; target strm = 0x2
2114 cmp %o1, 1
2115 setx fork_lbl_0_2, %g2, %g3
2116 be,a .+8
2117 jmp %g3
2118 nop
2119! fork: source strm = 0xffffffffffffffff; target strm = 0x4
2120 cmp %o1, 2
2121 setx fork_lbl_0_3, %g2, %g3
2122 be,a .+8
2123 jmp %g3
2124 nop
2125! fork: source strm = 0xffffffffffffffff; target strm = 0x8
2126 cmp %o1, 3
2127 setx fork_lbl_0_4, %g2, %g3
2128 be,a .+8
2129 jmp %g3
2130 nop
2131! fork: source strm = 0xffffffffffffffff; target strm = 0x10
2132 cmp %o1, 4
2133 setx fork_lbl_0_5, %g2, %g3
2134 be,a .+8
2135 jmp %g3
2136 nop
2137! fork: source strm = 0xffffffffffffffff; target strm = 0x20
2138 cmp %o1, 5
2139 setx fork_lbl_0_6, %g2, %g3
2140 be,a .+8
2141 jmp %g3
2142 nop
2143! fork: source strm = 0xffffffffffffffff; target strm = 0x40
2144 cmp %o1, 6
2145 setx fork_lbl_0_7, %g2, %g3
2146 be,a .+8
2147 jmp %g3
2148 nop
2149! fork: source strm = 0xffffffffffffffff; target strm = 0x80
2150 cmp %o1, 7
2151 setx fork_lbl_0_8, %g2, %g3
2152 be,a .+8
2153 jmp %g3
2154 nop
2155.text
2156 setx join_lbl_0_0, %g1, %g2
2157 jmp %g2
2158 nop
2159.text
2160 setx join_lbl_0_0, %g1, %g2
2161 jmp %g2
2162 nop
2163fork_lbl_0_8:
2164 ta T_CHANGE_NONHPRIV
2165 .word 0x91920012 ! 1: WRPR_PIL_R wrpr %r8, %r18, %pil
2166 nop
2167 mov 0x80, %g3
2168 stxa %g3, [%g3] 0x57
2169 .word 0xd65fc000 ! 5: LDX_R ldx [%r31 + %r0], %r11
2170 .word 0x93a489b0 ! 9: FDIVs fdivs %f18, %f16, %f9
2171 .word 0xc1bfc2c0 ! 13: STDFA_R stda %f0, [%r0, %r31]
2172 .word 0xc1bfc3e0 ! 17: STDFA_R stda %f0, [%r0, %r31]
2173 .word 0xe22fe1c1 ! 21: STB_I stb %r17, [%r31 + 0x01c1]
2174 rd %tick, %r28
2175#if (MAX_THREADS == 8)
2176 sethi %hi(0x33800), %r27
2177#else
2178 sethi %hi(0x30000), %r27
2179#endif
2180 andn %r28, %r27, %r28
2181 ta T_CHANGE_HPRIV
2182 stxa %r28, [%g0] 0x73
2183 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
2184intvec_80_7:
2185 .word 0x95a509d2 ! 25: FDIVd fdivd %f20, %f18, %f10
2186 .word 0x2cca0001 ! 1: BRGZ brgz,a,pt %r8,<label_0xa0001>
2187 .word 0x8d902209 ! 29: WRPR_PSTATE_I wrpr %r0, 0x0209, %pstate
2188fpinit_80_10:
2189 nop
2190 setx fp_data_quads, %r19, %r20
2191 ldd [%r20], %f0
2192 ldd [%r20+8], %f4
2193 ld [%r20+16], %fsr
2194 ld [%r20+24], %r19
2195 wr %r19, %g0, %gsr
2196 .word 0x91b00484 ! 33: FCMPLE32 fcmple32 %d0, %d4, %r8
2197memptr_80_13:
2198 set 0x60340000, %r31
2199 .word 0x85847c94 ! 37: WRCCR_I wr %r17, 0x1c94, %ccr
2200 .word 0x91950004 ! 41: WRPR_PIL_R wrpr %r20, %r4, %pil
2201fpinit_80_18:
2202 nop
2203 setx fp_data_quads, %r19, %r20
2204 ldd [%r20], %f0
2205 ldd [%r20+8], %f4
2206 ld [%r20+16], %fsr
2207 ld [%r20+24], %r19
2208 wr %r19, %g0, %gsr
2209 .word 0x8da009a4 ! 45: FDIVs fdivs %f0, %f4, %f6
2210dvapa_80_19:
2211 nop
2212 ta T_CHANGE_HPRIV
2213 mov 0xf41, %r20
2214 mov 0x1f, %r19
2215 sllx %r20, 23, %r20
2216 or %r19, %r20, %r19
2217 stxa %r19, [%g0] ASI_LSU_CONTROL
2218 mov 0x38, %r18
2219 stxa %r31, [%r18]0x58
2220 ta T_CHANGE_NONHPRIV
2221 .word 0x87ac8a51 ! 49: FCMPd fcmpd %fcc<n>, %f18, %f48
2222brcommon3_80_20:
2223 nop
2224 setx common_target, %r12, %r27
2225 lduw [%r27], %r12 ! Load common dest into dcache ..
2226 ba,a .+12
2227 .word 0xd7e7c02a ! 1: CASA_I casa [%r31] 0x 1, %r10, %r11
2228 ba,a .+8
2229 jmpl %r27+0, %r27
2230 .word 0xd6dfc02c ! 53: LDXA_R ldxa [%r31, %r12] 0x01, %r11
2231br_longdelay4_80_22:
2232 nop
2233 not %g0, %r27
2234 jmpl %r27+0, %r27
2235 .word 0x9d902002 ! 57: WRPR_WSTATE_I wrpr %r0, 0x0002, %wstate
2236 .word 0xd7e7c020 ! 61: CASA_I casa [%r31] 0x 1, %r0, %r11
2237splash_hpstate_80_27:
2238 .word 0x8198248d ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x048d, %hpstate
2239 .word 0x22800001 ! 1: BE be,a <label_0x1>
2240 .word 0x8d9023d6 ! 69: WRPR_PSTATE_I wrpr %r0, 0x03d6, %pstate
2241 nop
2242 ta T_CHANGE_HPRIV
2243 mov 0x80, %r10
2244 set sync_thr_counter6, %r23
2245#ifndef SPC
2246 ldxa [%g0]0x63, %o1
2247 and %o1, 0x38, %o1
2248 add %o1, %r23, %r23
2249#endif
2250 cas [%r23],%g0,%r10 !lock
2251 brnz %r10, sma_80_30
2252 rd %asi, %r12
2253 wr %g0, 0x40, %asi
2254 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
2255 set 0x001a1fff, %l7
2256 stxa %l7, [%g0 + 0x80] %asi
2257 wr %r12, %g0, %asi
2258 st %g0, [%r23]
2259sma_80_30:
2260 ta T_CHANGE_NONHPRIV
2261 .word 0xd1e7e014 ! 73: CASA_R casa [%r31] %asi, %r20, %r8
2262 .word 0xd137e118 ! 77: STQF_I - %f8, [0x0118, %r31]
2263 nop
2264 ta T_CHANGE_HPRIV
2265 mov 0x80, %r10
2266 set sync_thr_counter6, %r23
2267#ifndef SPC
2268 ldxa [%g0]0x63, %o1
2269 and %o1, 0x38, %o1
2270 add %o1, %r23, %r23
2271#endif
2272 cas [%r23],%g0,%r10 !lock
2273 brnz %r10, sma_80_34
2274 rd %asi, %r12
2275 wr %g0, 0x40, %asi
2276 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
2277 set 0x000e1fff, %l7
2278 stxa %l7, [%g0 + 0x80] %asi
2279 wr %r12, %g0, %asi
2280 st %g0, [%r23]
2281sma_80_34:
2282 ta T_CHANGE_NONHPRIV
2283 .word 0xd9e7e014 ! 81: CASA_R casa [%r31] %asi, %r20, %r12
2284memptr_80_36:
2285 set user_data_start, %r31
2286 .word 0x85847d69 ! 85: WRCCR_I wr %r17, 0x1d69, %ccr
2287pmu_80_39:
2288 nop
2289 ta T_CHANGE_PRIV
2290 setx 0xffffffb7ffffffa2, %g1, %g7
2291 .word 0xa3800007 ! 89: WR_PERF_COUNTER_R wr %r0, %r7, %-
2292 .word 0xd0ffc02b ! 93: SWAPA_R swapa %r8, [%r31 + %r11] 0x01
2293#if (defined SPC || defined CMP)
2294!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_43)+0, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
2295!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_43)&0xffffffff) + 48, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
2296xir_80_43:
2297#else
2298#if (defined FC)
2299!! Generate XIR via RESET_GEN register
2300!! ta T_CHANGE_HPRIV
2301!! rdpr %pstate, %r18
2302!! andn %r18, 0x208, %r18 ! Reset pstate.am,cle
2303!! wrpr %r18, %pstate
2304#ifndef XIR_RND_CORES
2305!! ldxa [%g0] 0x63, %o1
2306!! mov 1, %r18
2307!! sllx %r18, %o1, %r18
2308#endif
2309!! mov 0x30, %r19
2310!! setx 0x8900000808, %r16, %r17
2311!! mov 0x2, %r16
2312!!xir_80_43:
2313!! stxa %r18, [%r19] 0x41
2314!! stx %r16, [%r17]
2315#endif
2316#endif
2317 .word 0xa985291b ! 97: WR_SET_SOFTINT_I wr %r20, 0x091b, %set_softint
2318fpinit_80_45:
2319 nop
2320 setx fp_data_quads, %r19, %r20
2321 ldd [%r20], %f0
2322 ldd [%r20+8], %f4
2323 ld [%r20+16], %fsr
2324 ld [%r20+24], %r19
2325 wr %r19, %g0, %gsr
2326 .word 0x91a009c4 ! 101: FDIVd fdivd %f0, %f4, %f8
2327 .word 0x8d802004 ! 105: WRFPRS_I wr %r0, 0x0004, %fprs
2328 .word 0xe857e188 ! 109: LDSH_I ldsh [%r31 + 0x0188], %r20
2329pmu_80_48:
2330 nop
2331 ta T_CHANGE_PRIV
2332 setx 0xffffffb8ffffffa8, %g1, %g7
2333 .word 0xa3800007 ! 113: WR_PERF_COUNTER_R wr %r0, %r7, %-
2334 .word 0xe737e038 ! 117: STQF_I - %f19, [0x0038, %r31]
2335 .word 0x89800011 ! 121: WRTICK_R wr %r0, %r17, %tick
2336 .word 0xa9a40d2c ! 125: FsMULd fsmuld %f16, %f12, %f20
2337iaw_80_54:
2338 nop
2339 ta T_CHANGE_HPRIV
2340 mov 8, %r18
2341 rd %asi, %r12
2342 wr %r0, 0x41, %asi
2343 set sync_thr_counter4, %r23
2344#ifndef SPC
2345 ldxa [%g0]0x63, %r8
2346 and %r8, 0x38, %r8 ! Core ID
2347 add %r8, %r23, %r23
2348#else
2349 mov 0, %r8
2350#endif
2351 mov 0x80, %r16
2352iaw_startwait80_54:
2353 cas [%r23],%g0,%r16 !lock
2354 brz,a %r16, continue_iaw_80_54
2355 mov (~0x80&0xf0), %r16
2356 ld [%r23], %r16
2357iaw_wait80_54:
2358 brnz %r16, iaw_wait80_54
2359 ld [%r23], %r16
2360 ba iaw_startwait80_54
2361 mov 0x80, %r16
2362continue_iaw_80_54:
2363 sllx %r16, %r8, %r16 !Mask for my core only
2364 ldxa [0x58]%asi, %r17 !Running_status
2365wait_for_stat_80_54:
2366 ldxa [0x50]%asi, %r13 !Running_rw
2367 cmp %r13, %r17
2368 bne,a %xcc, wait_for_stat_80_54
2369 ldxa [0x58]%asi, %r17 !Running_status
2370 stxa %r16, [0x68]%asi !Park (W1C)
2371 ldxa [0x50]%asi, %r14 !Running_rw
2372wait_for_iaw_80_54:
2373 ldxa [0x58]%asi, %r17 !Running_status
2374 cmp %r14, %r17
2375 bne,a %xcc, wait_for_iaw_80_54
2376 ldxa [0x50]%asi, %r14 !Running_rw
2377iaw_doit80_54:
2378 mov 0x38, %r18
2379iaw4_80_54:
2380 setx common_target, %r20, %r19
2381 or %r19, 0x1, %r19
2382 stxa %r19, [%r18]0x50
2383 stxa %r16, [0x60] %asi ! Unpark (W1S)
2384 st %g0, [%r23] !clear lock
2385 wr %r0, %r12, %asi ! restore %asi
2386 ta T_CHANGE_NONHPRIV
2387 .word 0xc3e90024 ! 129: PREFETCHA_R prefetcha [%r4, %r4] 0x01, #one_read
2388splash_lsu_80_56:
2389 nop
2390 ta T_CHANGE_HPRIV
2391 set 0x9fd1f32f, %r2
2392 mov 0x4, %r1
2393 sllx %r1, 32, %r1
2394 or %r1, %r2, %r2
2395 stxa %r2, [%r0] ASI_LSU_CONTROL
2396 .word 0x3d400001 ! 133: FBPULE fbule,a,pn %fcc0, <label_0x1>
2397brcommon3_80_58:
2398 nop
2399 setx common_target, %r12, %r27
2400 lduw [%r27], %r12 ! Load common dest into dcache ..
2401 ba,a .+12
2402 .word 0xe7e7c02c ! 1: CASA_I casa [%r31] 0x 1, %r12, %r19
2403 ba,a .+8
2404 jmpl %r27+0, %r27
2405 .word 0x8d903d7f ! 137: WRPR_PSTATE_I wrpr %r0, 0x1d7f, %pstate
2406 .word 0xe937e150 ! 141: STQF_I - %f20, [0x0150, %r31]
2407 .word 0xa7b400f1 ! 145: EDGE16LN edge16ln %r16, %r17, %r19
2408brcommon3_80_64:
2409 nop
2410 setx common_target, %r12, %r27
2411 lduw [%r27], %r12 ! Load common dest into dcache ..
2412 ba,a .+12
2413 .word 0xd26fe0f0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00f0]
2414 ba,a .+8
2415 jmpl %r27+0, %r27
2416 .word 0x8d903acd ! 149: WRPR_PSTATE_I wrpr %r0, 0x1acd, %pstate
2417#if (defined SPC || defined CMP)
2418!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_65)+48, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
2419!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_65)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
2420xir_80_65:
2421#else
2422#if (defined FC)
2423!! Generate XIR via RESET_GEN register
2424!! ta T_CHANGE_HPRIV
2425!! rdpr %pstate, %r18
2426!! andn %r18, 0x208, %r18 ! Reset pstate.am,cle
2427!! wrpr %r18, %pstate
2428#ifndef XIR_RND_CORES
2429!! ldxa [%g0] 0x63, %o1
2430!! mov 1, %r18
2431!! sllx %r18, %o1, %r18
2432#endif
2433!! mov 0x30, %r19
2434!! setx 0x8900000808, %r16, %r17
2435!! mov 0x2, %r16
2436!!xir_80_65:
2437!! stxa %r18, [%r19] 0x41
2438!! stx %r16, [%r17]
2439#endif
2440#endif
2441 .word 0xa984f7d9 ! 153: WR_SET_SOFTINT_I wr %r19, 0x17d9, %set_softint
2442splash_hpstate_80_66:
2443 .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1>
2444 .word 0x8198260d ! 157: WRHPR_HPSTATE_I wrhpr %r0, 0x060d, %hpstate
2445pmu_80_67:
2446 nop
2447 ta T_CHANGE_PRIV
2448 setx 0xffffffb5ffffffa7, %g1, %g7
2449 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
2450 rd %tick, %r28
2451#if (MAX_THREADS == 8)
2452 sethi %hi(0x33800), %r27
2453#else
2454 sethi %hi(0x30000), %r27
2455#endif
2456 andn %r28, %r27, %r28
2457 ta T_CHANGE_HPRIV
2458 stxa %r28, [%g0] 0x73
2459 .word 0x97b444c9 ! 1: FCMPNE32 fcmpne32 %d48, %d40, %r11
2460intvec_80_69:
2461 .word 0xa3b4c4d4 ! 165: FCMPNE32 fcmpne32 %d50, %d20, %r17
2462brcommon2_80_71:
2463 nop
2464 setx common_target, %r12, %r27
2465 ba,a .+12
2466 .word 0xa1a00548 ! 1: FSQRTd fsqrt
2467 ba,a .+8
2468 jmpl %r27+0, %r27
2469 .word 0xe1bfe020 ! 169: STDFA_I stda %f16, [0x0020, %r31]
2470 .word 0xc36caef0 ! 173: PREFETCH_I prefetch [%r18 + 0x0ef0], #one_read
2471 .word 0xd337e090 ! 177: STQF_I - %f9, [0x0090, %r31]
2472splash_lsu_80_78:
2473 nop
2474 ta T_CHANGE_HPRIV
2475 set 0xec4d2346, %r2
2476 mov 0x6, %r1
2477 sllx %r1, 32, %r1
2478 or %r1, %r2, %r2
2479 .word 0x3e800001 ! 1: BVC bvc,a <label_0x1>
2480 stxa %r2, [%r0] ASI_LSU_CONTROL
2481 .word 0x3d400001 ! 181: FBPULE fbule,a,pn %fcc0, <label_0x1>
2482splash_lsu_80_79:
2483 nop
2484 ta T_CHANGE_HPRIV
2485 set 0xae247064, %r2
2486 mov 0x7, %r1
2487 sllx %r1, 32, %r1
2488 or %r1, %r2, %r2
2489 stxa %r2, [%r0] ASI_LSU_CONTROL
2490 .word 0x3d400001 ! 185: FBPULE fbule,a,pn %fcc0, <label_0x1>
2491jmptr_80_82:
2492 nop
2493 best_set_reg(0xe0a00000, %r20, %r27)
2494 .word 0xb7c6c000 ! 189: JMPL_R jmpl %r27 + %r0, %r27
2495 .word 0x89800011 ! 193: WRTICK_R wr %r0, %r17, %tick
2496 .word 0xd33fe03d ! 197: STDF_I std %f9, [0x003d, %r31]
2497 nop
2498 nop
2499 ta T_CHANGE_PRIV
2500 wrpr %g0, %g0, %gl
2501 nop
2502 nop
2503.text
2504 setx join_lbl_0_0, %g1, %g2
2505 jmp %g2
2506 nop
2507fork_lbl_0_7:
2508setup_tick:
2509 setx 0xa4e1892ce8a5255f, %r1, %r17
2510 wrpr %g0, %r17, %tick
2511
2512 rd %asi, %r12
2513#ifdef XIR_RND_CORES
2514setup_xir_40:
2515 setx 0x0fead1642680e98e, %r1, %r28
2516 mov 0x30, %r17
2517 stxa %r28, [%r17] 0x41
2518#endif
2519#ifdef SPLASH_HIDECR
2520 mov 8, %r1
2521 set SPLASH_HIDECR, %r2
2522 sllx %r2, 32, %r2
2523 stxa %r2, [%r1] 0x45
2524#endif
2525#if (MULTIPASS > 0)
2526 mov 0x38, %g1
2527 ldxa [%g1]ASI_SCRATCHPAD, %r10
2528 brnz %g1, unlock_sync_thds_40
2529 wrpr %g0, %g0, %pstate
2530#endif
2531setup_spu_40:
2532 wr %g0, 0x40, %asi
2533 !# allocate control word queue (e.g., setup head/tail/first/last registers)
2534 set CWQ_BASE, %l6
2535
2536#ifndef SPC
2537 ldxa [%g0]0x63, %o2
2538 and %o2, 0x38, %o2
2539 sllx %o2, 5, %o2 !(CID*256)
2540 add %l6, %o2, %l6
2541#endif
2542# 901 "diag.j.pp"
2543 !# write base addr to first, head, and tail ptr
2544 !# first store to first
2545 stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi !# first store to first
2546
2547 stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi !# then to head
2548 stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# then to tail
2549 setx CWQ_LAST, %g1, %l5 !# then end of CWQ region to LAST
2550#ifndef SPC
2551 add %l5, %o2, %l5
2552#endif
2553 stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi
2554
2555 !# set CWQ control word ([39:37] is strand ID ..)
2556 best_set_reg(0x206100f0, %l1, %l2) !# Control Word
2557 sllx %l2, 32, %l2
2558
2559 !# write CWQ entry (%l6 points to CWQ)
2560 stx %l2, [%l6 + 0x0]
2561
2562 setx msg, %g1, %l2
2563 stx %l2, [%l6 + 0x8] !# source address
2564
2565 stx %g0, [%l6 + 0x10] !# Authentication Key Address (40-bit)
2566 stx %g0, [%l6 + 0x18] !# Authentication IV Address (40-bit)
2567 stx %g0, [%l6 + 0x20] !# Authentication FSAS Address (40-bit)
2568 stx %g0, [%l6 + 0x28] !# Encryption Key Address (40-bit)
2569 stx %g0, [%l6 + 0x30] !# Encryption Initialization Vector Address (40-bit)
2570
2571 setx results, %g1, %o3
2572 stx %o3, [%l6 + 0x38] !# Destination Address (40-bit)
2573
2574 membar #Sync
2575
2576 ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2
2577 add %l2, 0x40, %l2
2578 stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi
2579
2580 !# Kick off the CWQ operation by writing to the CWQ_CSR
2581 !# Set the enabled bit and reset the other bits
2582 or %g0, 0x1, %g1
2583 stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi
2584
2585unlock_sync_thds_40:
2586 set sync_thr_counter6, %r23
2587#ifndef SPC
2588 ldxa [%g0]0x63, %o2
2589 and %o2, 0x38, %o2
2590 add %o2, %r23, %r23
2591#endif
2592 st %r0, [%r23] !unlock sync_thr_counter6
2593 sub %r23, 64, %r23
2594 st %r0, [%r23] !unlock sync_thr_counter5
2595 sub %r23, 64, %r23
2596 st %r0, [%r23] !unlock sync_thr_counter4
2597
2598 wr %r0, %r12, %asi
2599 ta T_CHANGE_NONHPRIV
2600cmp_40_0:
2601 nop
2602 ta T_CHANGE_HPRIV
2603 rd %asi, %r12
2604 wr %r0, 0x41, %asi
2605 set sync_thr_counter4, %r23
2606#ifndef SPC
2607 ldxa [%g0]0x63, %r8
2608 and %r8, 0x38, %r8 ! Core ID
2609 add %r8, %r23, %r23
2610 mov 0xff, %r9
2611 xor %r9, 0x40, %r9
2612 sllx %r9, %r8, %r9 ! My core mask
2613#else
2614 mov 0, %r8
2615 mov 0xff, %r9
2616 xor %r9, 0x40, %r9 ! My core mask
2617#endif
2618 mov 0x40, %r10
2619cmp_startwait40_0:
2620 cas [%r23],%g0,%r10 !lock
2621 brz,a %r10, continue_cmp_40_0
2622 ldxa [0x50]%asi, %r13 !Running_rw
2623 ld [%r23], %r10
2624cmp_wait40_0:
2625 brnz,a %r10, cmp_wait40_0
2626 ld [%r23], %r10
2627 ba cmp_startwait40_0
2628 mov 0x40, %r10
2629continue_cmp_40_0:
2630 ldxa [0x58]%asi, %r14 !Running_status
2631 xnor %r14, %r13, %r14 !Bits equal
2632 brz,a %r8, cmp_multi_core_40_0
2633 mov 0xa7, %r17
2634 best_set_reg(0x644a623b2d4de0f0, %r16, %r17)
2635cmp_multi_core_40_0:
2636 and %r14, %r17, %r14 !Apply set/clear mask to bits equal
2637 and %r14, %r9, %r14 !Apply core-mask
2638 stxa %r14, [0x60]%asi
2639 st %g0, [%r23] !clear lock
2640 wr %g0, %r12, %asi
2641 .word 0x91908003 ! 1: WRPR_PIL_R wrpr %r2, %r3, %pil
2642 nop
2643 mov 0x80, %g3
2644 stxa %g3, [%g3] 0x5f
2645 .word 0xd65fc000 ! 5: LDX_R ldx [%r31 + %r0], %r11
2646 .word 0x91a0c9b1 ! 9: FDIVs fdivs %f3, %f17, %f8
2647 .word 0xe1bfc3e0 ! 13: STDFA_R stda %f16, [%r0, %r31]
2648 .word 0xc1bfd920 ! 17: STDFA_R stda %f0, [%r0, %r31]
2649 .word 0xe22fe181 ! 21: STB_I stb %r17, [%r31 + 0x0181]
2650 rd %tick, %r28
2651#if (MAX_THREADS == 8)
2652 sethi %hi(0x33800), %r27
2653#else
2654 sethi %hi(0x30000), %r27
2655#endif
2656 andn %r28, %r27, %r28
2657 ta T_CHANGE_HPRIV
2658 stxa %r28, [%g0] 0x73
2659 .word 0xa1b304c6 ! 1: FCMPNE32 fcmpne32 %d12, %d6, %r16
2660intvec_40_7:
2661 .word 0xc36979b1 ! 25: PREFETCH_I prefetch [%r5 + 0xfffff9b1], #one_read
2662 .word 0x26c90001 ! 1: BRLZ brlz,a,pt %r4,<label_0x90001>
2663 .word 0x8d9034cf ! 29: WRPR_PSTATE_I wrpr %r0, 0x14cf, %pstate
2664fpinit_40_10:
2665 nop
2666 setx fp_data_quads, %r19, %r20
2667 ldd [%r20], %f0
2668 ldd [%r20+8], %f4
2669 ld [%r20+16], %fsr
2670 ld [%r20+24], %r19
2671 wr %r19, %g0, %gsr
2672 .word 0x87a80a44 ! 33: FCMPd fcmpd %fcc<n>, %f0, %f4
2673memptr_40_13:
2674 set 0x60540000, %r31
2675 .word 0x85812329 ! 37: WRCCR_I wr %r4, 0x0329, %ccr
2676cmp_40_16:
2677 nop
2678 ta T_CHANGE_HPRIV
2679 rd %asi, %r12
2680 wr %r0, 0x41, %asi
2681 set sync_thr_counter4, %r23
2682#ifndef SPC
2683 ldxa [%g0]0x63, %r8
2684 and %r8, 0x38, %r8 ! Core ID
2685 add %r8, %r23, %r23
2686 mov 0xff, %r9
2687 xor %r9, 0x40, %r9
2688 sllx %r9, %r8, %r9 ! My core mask
2689#else
2690 mov 0, %r8
2691 mov 0xff, %r9
2692 xor %r9, 0x40, %r9 ! My core mask
2693#endif
2694 mov 0x40, %r10
2695cmp_startwait40_16:
2696 cas [%r23],%g0,%r10 !lock
2697 brz,a %r10, continue_cmp_40_16
2698 ldxa [0x50]%asi, %r13 !Running_rw
2699 ld [%r23], %r10
2700cmp_wait40_16:
2701 brnz,a %r10, cmp_wait40_16
2702 ld [%r23], %r10
2703 ba cmp_startwait40_16
2704 mov 0x40, %r10
2705continue_cmp_40_16:
2706 ldxa [0x58]%asi, %r14 !Running_status
2707 xnor %r14, %r13, %r14 !Bits equal
2708 brz,a %r8, cmp_multi_core_40_16
2709 mov 0xad, %r17
2710 best_set_reg(0x5a9c5ee5fa172e30, %r16, %r17)
2711cmp_multi_core_40_16:
2712 and %r14, %r17, %r14 !Apply set/clear mask to bits equal
2713 and %r14, %r9, %r14 !Apply core-mask
2714 stxa %r14, [0x60]%asi
2715 st %g0, [%r23] !clear lock
2716 wr %g0, %r12, %asi
2717 .word 0x9193000d ! 41: WRPR_PIL_R wrpr %r12, %r13, %pil
2718fpinit_40_18:
2719 nop
2720 setx fp_data_quads, %r19, %r20
2721 ldd [%r20], %f0
2722 ldd [%r20+8], %f4
2723 ld [%r20+16], %fsr
2724 ld [%r20+24], %r19
2725 wr %r19, %g0, %gsr
2726 .word 0x87a80a44 ! 45: FCMPd fcmpd %fcc<n>, %f0, %f4
2727dvapa_40_19:
2728 nop
2729 ta T_CHANGE_HPRIV
2730 mov 0xd13, %r20
2731 mov 0x18, %r19
2732 sllx %r20, 23, %r20
2733 or %r19, %r20, %r19
2734 stxa %r19, [%g0] ASI_LSU_CONTROL
2735 mov 0x38, %r18
2736 stxa %r31, [%r18]0x58
2737 ta T_CHANGE_NONHPRIV
2738 .word 0xa1a449ab ! 49: FDIVs fdivs %f17, %f11, %f16
2739brcommon3_40_20:
2740 nop
2741 setx common_target, %r12, %r27
2742 lduw [%r27], %r12 ! Load common dest into dcache ..
2743 ba,a .+12
2744 .word 0xd7e7c029 ! 1: CASA_I casa [%r31] 0x 1, %r9, %r11
2745 ba,a .+8
2746 jmpl %r27+0, %r27
2747 .word 0xd69fe120 ! 53: LDDA_I ldda [%r31, + 0x0120] %asi, %r11
2748br_longdelay4_40_22:
2749 nop
2750 not %g0, %r27
2751 jmpl %r27+0, %r27
2752 .word 0x9d902005 ! 57: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate
2753 .word 0xd7e7c020 ! 61: CASA_I casa [%r31] 0x 1, %r0, %r11
2754splash_hpstate_40_27:
2755 .word 0x81982a58 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x0a58, %hpstate
2756 .word 0x34800001 ! 1: BG bg,a <label_0x1>
2757 .word 0x8d902671 ! 69: WRPR_PSTATE_I wrpr %r0, 0x0671, %pstate
2758 nop
2759 ta T_CHANGE_HPRIV
2760 mov 0x40, %r10
2761 set sync_thr_counter6, %r23
2762#ifndef SPC
2763 ldxa [%g0]0x63, %o1
2764 and %o1, 0x38, %o1
2765 add %o1, %r23, %r23
2766#endif
2767 cas [%r23],%g0,%r10 !lock
2768 brnz %r10, sma_40_30
2769 rd %asi, %r12
2770 wr %g0, 0x40, %asi
2771 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
2772 set 0x001a1fff, %l7
2773 stxa %l7, [%g0 + 0x80] %asi
2774 wr %r12, %g0, %asi
2775 st %g0, [%r23]
2776sma_40_30:
2777 ta T_CHANGE_NONHPRIV
2778 .word 0xd1e7e00c ! 73: CASA_R casa [%r31] %asi, %r12, %r8
2779 .word 0xd137e16c ! 77: STQF_I - %f8, [0x016c, %r31]
2780 nop
2781 ta T_CHANGE_HPRIV
2782 mov 0x40, %r10
2783 set sync_thr_counter6, %r23
2784#ifndef SPC
2785 ldxa [%g0]0x63, %o1
2786 and %o1, 0x38, %o1
2787 add %o1, %r23, %r23
2788#endif
2789 cas [%r23],%g0,%r10 !lock
2790 brnz %r10, sma_40_34
2791 rd %asi, %r12
2792 wr %g0, 0x40, %asi
2793 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
2794 set 0x001e1fff, %l7
2795 stxa %l7, [%g0 + 0x80] %asi
2796 wr %r12, %g0, %asi
2797 st %g0, [%r23]
2798sma_40_34:
2799 ta T_CHANGE_NONHPRIV
2800 .word 0xd9e7e00c ! 81: CASA_R casa [%r31] %asi, %r12, %r12
2801memptr_40_36:
2802 set user_data_start, %r31
2803 .word 0x858525b0 ! 85: WRCCR_I wr %r20, 0x05b0, %ccr
2804pmu_40_39:
2805 nop
2806 ta T_CHANGE_PRIV
2807 setx 0xffffffbcffffffa8, %g1, %g7
2808 .word 0xa3800007 ! 89: WR_PERF_COUNTER_R wr %r0, %r7, %-
2809 .word 0xd0ffc032 ! 93: SWAPA_R swapa %r8, [%r31 + %r18] 0x01
2810#if (defined SPC || defined CMP)
2811!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_43)+8, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
2812!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_43)&0xffffffff) + 24, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
2813xir_40_43:
2814#else
2815#if (defined FC)
2816!! Generate XIR via RESET_GEN register
2817!! ta T_CHANGE_HPRIV
2818!! rdpr %pstate, %r18
2819!! andn %r18, 0x208, %r18 ! Reset pstate.am,cle
2820!! wrpr %r18, %pstate
2821#ifndef XIR_RND_CORES
2822!! ldxa [%g0] 0x63, %o1
2823!! mov 1, %r18
2824!! sllx %r18, %o1, %r18
2825#endif
2826!! mov 0x30, %r19
2827!! setx 0x8900000808, %r16, %r17
2828!! mov 0x2, %r16
2829!!xir_40_43:
2830!! stxa %r18, [%r19] 0x41
2831!! stx %r16, [%r17]
2832#endif
2833#endif
2834 .word 0xa984e191 ! 97: WR_SET_SOFTINT_I wr %r19, 0x0191, %set_softint
2835fpinit_40_45:
2836 nop
2837 setx fp_data_quads, %r19, %r20
2838 ldd [%r20], %f0
2839 ldd [%r20+8], %f4
2840 ld [%r20+16], %fsr
2841 ld [%r20+24], %r19
2842 wr %r19, %g0, %gsr
2843 .word 0x87a80a44 ! 101: FCMPd fcmpd %fcc<n>, %f0, %f4
2844 .word 0x8d802000 ! 105: WRFPRS_I wr %r0, 0x0000, %fprs
2845 .word 0xe857e028 ! 109: LDSH_I ldsh [%r31 + 0x0028], %r20
2846pmu_40_48:
2847 nop
2848 ta T_CHANGE_PRIV
2849 setx 0xffffffbfffffffaf, %g1, %g7
2850 .word 0xa3800007 ! 113: WR_PERF_COUNTER_R wr %r0, %r7, %-
2851 .word 0xe737e110 ! 117: STQF_I - %f19, [0x0110, %r31]
2852splash_tick_40_51:
2853 nop
2854 ta T_CHANGE_HPRIV
2855 best_set_reg(0x6837daf8aa58777e, %r16, %r17)
2856 .word 0x89800011 ! 121: WRTICK_R wr %r0, %r17, %tick
2857 .word 0xa7a20d22 ! 125: FsMULd fsmuld %f8, %f2, %f50
2858 .word 0x97a489a7 ! 129: FDIVs fdivs %f18, %f7, %f11
2859splash_lsu_40_56:
2860 nop
2861 ta T_CHANGE_HPRIV
2862 set 0x6828717c, %r2
2863 mov 0x5, %r1
2864 sllx %r1, 32, %r1
2865 or %r1, %r2, %r2
2866 stxa %r2, [%r0] ASI_LSU_CONTROL
2867 .word 0x3d400001 ! 133: FBPULE fbule,a,pn %fcc0, <label_0x1>
2868brcommon3_40_58:
2869 nop
2870 setx common_target, %r12, %r27
2871 lduw [%r27], %r12 ! Load common dest into dcache ..
2872 ba,a .+12
2873 .word 0xe7e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r19
2874 ba,a .+8
2875 jmpl %r27+0, %r27
2876 .word 0x8d902380 ! 137: WRPR_PSTATE_I wrpr %r0, 0x0380, %pstate
2877 .word 0xe937e020 ! 141: STQF_I - %f20, [0x0020, %r31]
2878ticken_40_61:
2879 nop
2880 ta T_CHANGE_HPRIV
2881 rd %asi, %r12
2882 wr %r0, 0x41, %asi
2883 stxa %g0, [0x38]%asi
2884 best_set_reg(0x5ac0b6ab8d9c3dc3, %r16, %r17)
2885 wrpr %g0, %r17, %tick
2886 mov 1, %r16
2887 stxa %r16, [0x38]%asi
2888 wr %g0, %r12, %asi
2889 .word 0xa7b2c0e5 ! 145: EDGE16LN edge16ln %r11, %r5, %r19
2890brcommon3_40_64:
2891 nop
2892 setx common_target, %r12, %r27
2893 lduw [%r27], %r12 ! Load common dest into dcache ..
2894 ba,a .+12
2895 .word 0xd26fe0d0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x00d0]
2896 ba,a .+8
2897 jmpl %r27+0, %r27
2898 .word 0x81983dcb ! 149: WRHPR_HPSTATE_I wrhpr %r0, 0x1dcb, %hpstate
2899#if (defined SPC || defined CMP)
2900!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_65)+32, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
2901!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_65)&0xffffffff) + 40, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
2902xir_40_65:
2903#else
2904#if (defined FC)
2905!! Generate XIR via RESET_GEN register
2906!! ta T_CHANGE_HPRIV
2907!! rdpr %pstate, %r18
2908!! andn %r18, 0x208, %r18 ! Reset pstate.am,cle
2909!! wrpr %r18, %pstate
2910#ifndef XIR_RND_CORES
2911!! ldxa [%g0] 0x63, %o1
2912!! mov 1, %r18
2913!! sllx %r18, %o1, %r18
2914#endif
2915!! mov 0x30, %r19
2916!! setx 0x8900000808, %r16, %r17
2917!! mov 0x2, %r16
2918!!xir_40_65:
2919!! stxa %r18, [%r19] 0x41
2920!! stx %r16, [%r17]
2921#endif
2922#endif
2923 .word 0xa9833436 ! 153: WR_SET_SOFTINT_I wr %r12, 0x1436, %set_softint
2924splash_hpstate_40_66:
2925 .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1>
2926 .word 0x81983187 ! 157: WRHPR_HPSTATE_I wrhpr %r0, 0x1187, %hpstate
2927pmu_40_67:
2928 nop
2929 ta T_CHANGE_PRIV
2930 setx 0xffffffbcffffffa9, %g1, %g7
2931 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
2932 rd %tick, %r28
2933#if (MAX_THREADS == 8)
2934 sethi %hi(0x33800), %r27
2935#else
2936 sethi %hi(0x30000), %r27
2937#endif
2938 andn %r28, %r27, %r28
2939 ta T_CHANGE_HPRIV
2940 stxa %r28, [%g0] 0x73
2941 .word 0xa1b4c4c2 ! 1: FCMPNE32 fcmpne32 %d50, %d2, %r16
2942intvec_40_69:
2943 .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
2944brcommon2_40_71:
2945 nop
2946 setx common_target, %r12, %r27
2947 ba,a .+12
2948 .word 0xa1a7c973 ! 1: FMULq dis not found
2949
2950 ba,a .+8
2951 jmpl %r27+0, %r27
2952 .word 0xc19fe140 ! 169: LDDFA_I ldda [%r31, 0x0140], %f0
2953 .word 0x87ab0a51 ! 173: FCMPd fcmpd %fcc<n>, %f12, %f48
2954 .word 0xd337e060 ! 177: STQF_I - %f9, [0x0060, %r31]
2955splash_lsu_40_78:
2956 nop
2957 ta T_CHANGE_HPRIV
2958 set 0x38edee0b, %r2
2959 mov 0x6, %r1
2960 sllx %r1, 32, %r1
2961 or %r1, %r2, %r2
2962 .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1>
2963 stxa %r2, [%r0] ASI_LSU_CONTROL
2964 .word 0x3d400001 ! 181: FBPULE fbule,a,pn %fcc0, <label_0x1>
2965splash_lsu_40_79:
2966 nop
2967 ta T_CHANGE_HPRIV
2968 set 0x7a818ee1, %r2
2969 mov 0x3, %r1
2970 sllx %r1, 32, %r1
2971 or %r1, %r2, %r2
2972 stxa %r2, [%r0] ASI_LSU_CONTROL
2973 .word 0x3d400001 ! 185: FBPULE fbule,a,pn %fcc0, <label_0x1>
2974jmptr_40_82:
2975 nop
2976 best_set_reg(0xe1200000, %r20, %r27)
2977 .word 0xb7c6c000 ! 189: JMPL_R jmpl %r27 + %r0, %r27
2978splash_tick_40_84:
2979 nop
2980 ta T_CHANGE_HPRIV
2981 best_set_reg(0x85c67737d87e2ba7, %r16, %r17)
2982 .word 0x89800011 ! 193: WRTICK_R wr %r0, %r17, %tick
2983 .word 0xd33fe1b5 ! 197: STDF_I std %f9, [0x01b5, %r31]
2984# 975 "diag.j.pp"
2985cmpenall_40_86:
2986 nop
2987 nop
2988 ta T_CHANGE_HPRIV
2989 rd %asi, %r12
2990 wr %r0, 0x41, %asi
2991 set sync_thr_counter4, %r23
2992#ifndef SPC
2993 ldxa [%g0]0x63, %r8
2994 and %r8, 0x38, %r8 ! Core ID
2995 add %r8, %r23, %r23
2996 mov 0xff, %r9
2997 sllx %r9, %r8, %r9 ! My core mask
2998#else
2999 mov 0xff, %r9 ! My core mask
3000#endif
3001cmpenall_startwait40_86:
3002 mov 0x40, %r10
3003 cas [%r23],%g0,%r10 !lock
3004 brz,a %r10, continue_cmpenall_40_86
3005 nop
3006cmpenall_wait40_86:
3007 ld [%r23], %r10
3008 brnz %r10, cmpenall_wait40_86
3009 nop
3010 ba,a cmpenall_startwait40_86
3011continue_cmpenall_40_86:
3012 ldxa [0x58]%asi, %r14 !Running_status
3013wait_for_cmpstat_40_86:
3014 ldxa [0x50]%asi, %r13 !Running_rw
3015 cmp %r13, %r14
3016 bne,a %xcc, wait_for_cmpstat_40_86
3017 ldxa [0x58]%asi, %r14 !Running_status
3018 ldxa [0x10]%asi, %r14 !Get enabled threads
3019 and %r14, %r9, %r14 !My core mask
3020 stxa %r14, [0x60]%asi !W1S
3021 ldxa [0x58]%asi, %r16 !Running_status
3022wait_for_cmpstat2_40_86:
3023 and %r16, %r9, %r16 !My core mask
3024 cmp %r14, %r16
3025 bne,a %xcc, wait_for_cmpstat2_40_86
3026 ldxa [0x58]%asi, %r16 !Running_status
3027 st %g0, [%r23] !clear lock
3028#if (MULTIPASS > 0)
3029multipass_check_mt:
3030 rd %asi, %r12
3031 wr %g0, ASI_SCRATCHPAD, %asi
3032 ldxa [0x38]%asi, %r10
3033 cmp %r10, MULTIPASS
3034 inc %r10
3035 stxa %r10, [0x38]%asi
3036 be finish_diag
3037 wr %g0, %r12, %asi
3038lock_sync_thds_again:
3039 mov 0xff, %r10
3040 set sync_thr_counter4, %r23
3041#ifndef SPC
3042 add %r23,%r8,%r23 !Core's sync counter
3043#endif
3044 st %r10, [%r23] !lock sync_thr_counter4
3045 add %r23, 64, %r23
3046 st %r10, [%r23] !lock sync_thr_counter5
3047 add %r23, 64, %r23
3048 st %r10, [%r23] !lock sync_thr_counter6
3049 ba fork_threads
3050 wrpr %g0, %g0, %gl
3051#endif
3052 nop
3053 nop
3054 ta T_CHANGE_PRIV
3055 wrpr %g0, %g0, %gl
3056 nop
3057 nop
3058.text
3059 setx join_lbl_0_0, %g1, %g2
3060 jmp %g2
3061 nop
3062fork_lbl_0_6:
3063 rd %tick, %r28
3064#if (MAX_THREADS == 8)
3065 sethi %hi(0x33800), %r27
3066#else
3067 sethi %hi(0x30000), %r27
3068#endif
3069 andn %r28, %r27, %r28
3070 ta T_CHANGE_HPRIV
3071 stxa %r28, [%g0] 0x73
3072intvec_20_1:
3073#if (defined SPC || defined CMP1)
3074!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_2) + 48, 16, 16)) -> intp(1,0,14,,,,,1)
3075!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_2)&0xffffffff) + 48, 16, 16)) -> intp(1,0,9,,,,,1)
3076#else
3077 set 0x27e01f3e, %r28
3078#if (MAX_THREADS == 8)
3079 and %r28, 0x7ff, %r28
3080#endif
3081 stxa %r28, [%g0] 0x73
3082#endif
3083intvec_20_2:
3084 .word 0xc36cf3d7 ! 2: PREFETCH_I prefetch [%r19 + 0xfffff3d7], #one_read
3085 .word 0xd5e7c029 ! 3: CASA_I casa [%r31] 0x 1, %r9, %r10
3086 .word 0x9f803e24 ! 4: SIR sir 0x1e24
3087 .word 0x97b504d1 ! 5: FCMPNE32 fcmpne32 %d20, %d48, %r11
3088 .word 0xd63fe060 ! 5: STD_I std %r11, [%r31 + 0x0060]
3089 .word 0xc19fe140 ! 6: LDDFA_I ldda [%r31, 0x0140], %f0
3090 .word 0xd63fe160 ! 7: STD_I std %r11, [%r31 + 0x0160]
3091 .word 0xe1bfe060 ! 8: STDFA_I stda %f16, [0x0060, %r31]
3092 .word 0xe19fe140 ! 9: LDDFA_I ldda [%r31, 0x0140], %f16
3093 .word 0xd7e7c02d ! 9: CASA_I casa [%r31] 0x 1, %r13, %r11
3094 .word 0xd1e7c02a ! 10: CASA_I casa [%r31] 0x 1, %r10, %r8
3095 .word 0xe1bfe160 ! 11: STDFA_I stda %f16, [0x0160, %r31]
3096 .word 0xe19fe140 ! 12: LDDFA_I ldda [%r31, 0x0140], %f16
3097 .word 0xd11fe0a0 ! 13: LDDF_I ldd [%r31, 0x00a0], %f8
3098 .word 0xc19fe1a0 ! 13: LDDFA_I ldda [%r31, 0x01a0], %f0
3099memptr_20_3:
3100 set user_data_start, %r31
3101 .word 0xe19fe000 ! 14: LDDFA_I ldda [%r31, 0x0000], %f16
3102 .word 0x8584feaa ! 15: WRCCR_I wr %r19, 0x1eaa, %ccr
3103 .word 0xe19fe080 ! 16: LDDFA_I ldda [%r31, 0x0080], %f16
3104 .word 0xe1bfe0c0 ! 17: STDFA_I stda %f16, [0x00c0, %r31]
3105 .word 0xc1bfe000 ! 17: STDFA_I stda %f0, [0x0000, %r31]
3106memptr_20_4:
3107 set 0x60340000, %r31
3108 rd %tick, %r28
3109#if (MAX_THREADS == 8)
3110 sethi %hi(0x33800), %r27
3111#else
3112 sethi %hi(0x30000), %r27
3113#endif
3114 andn %r28, %r27, %r28
3115 ta T_CHANGE_HPRIV
3116 stxa %r28, [%g0] 0x73
3117intvec_20_5:
3118 .word 0x9f802130 ! 18: SIR sir 0x0130
3119 .word 0x85833f38 ! 19: WRCCR_I wr %r12, 0x1f38, %ccr
3120 .word 0x95a4c9cc ! 20: FDIVd fdivd %f50, %f12, %f10
3121 .word 0x9f802050 ! 21: SIR sir 0x0050
3122 .word 0x858233d7 ! 21: WRCCR_I wr %r8, 0x13d7, %ccr
3123memptr_20_6:
3124 set user_data_start, %r31
3125 .word 0xe1bfe080 ! 22: STDFA_I stda %f16, [0x0080, %r31]
3126 .word 0x85846886 ! 23: WRCCR_I wr %r17, 0x0886, %ccr
3127 .word 0xe31fe0e0 ! 24: LDDF_I ldd [%r31, 0x00e0], %f17
3128 .word 0xc19fe100 ! 25: LDDFA_I ldda [%r31, 0x0100], %f0
3129 .word 0xe31fe000 ! 25: LDDF_I ldd [%r31, 0x0000], %f17
3130#if (defined SPC || defined CMP1)
3131!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_8) + 32, 16, 16)) -> intp(1,0,11,,,,,1)
3132!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_8)&0xffffffff) + 24, 16, 16)) -> intp(4,0,16,,,,,1)
3133#else
3134 set 0x5a4057c7, %r28
3135#if (MAX_THREADS == 8)
3136 and %r28, 0x7ff, %r28
3137#endif
3138 stxa %r28, [%g0] 0x73
3139#endif
3140 .word 0x99a489d2 ! 1: FDIVd fdivd %f18, %f18, %f12
3141intvec_20_8:
3142 .word 0x97b344c2 ! 26: FCMPNE32 fcmpne32 %d44, %d2, %r11
3143 .word 0xe23fe1d0 ! 27: STD_I std %r17, [%r31 + 0x01d0]
3144 .word 0xc1bfe1a0 ! 28: STDFA_I stda %f0, [0x01a0, %r31]
3145 .word 0xc36c2834 ! 29: PREFETCH_I prefetch [%r16 + 0x0834], #one_read
3146 .word 0xe1bfe0a0 ! 29: STDFA_I stda %f16, [0x00a0, %r31]
3147 .word 0xe2dfc031 ! 30: LDXA_R ldxa [%r31, %r17] 0x01, %r17
3148 .word 0x87afca4d ! 31: FCMPd fcmpd %fcc<n>, %f62, %f44
3149 .word 0xc19fe1c0 ! 32: LDDFA_I ldda [%r31, 0x01c0], %f0
3150 .word 0xe29fe090 ! 33: LDDA_I ldda [%r31, + 0x0090] %asi, %r17
3151 .word 0xe23fe150 ! 33: STD_I std %r17, [%r31 + 0x0150]
3152 rd %tick, %r28
3153#if (MAX_THREADS == 8)
3154 sethi %hi(0x33800), %r27
3155#else
3156 sethi %hi(0x30000), %r27
3157#endif
3158 andn %r28, %r27, %r28
3159 ta T_CHANGE_HPRIV
3160 stxa %r28, [%g0] 0x73
3161 .word 0xc36cb2ae ! 1: PREFETCH_I prefetch [%r18 + 0xfffff2ae], #one_read
3162intvec_20_11:
3163#if (defined SPC || defined CMP1)
3164!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_12) + 56, 16, 16)) -> intp(1,0,16,,,,,1)
3165!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_12)&0xffffffff) + 16, 16, 16)) -> intp(5,0,24,,,,,1)
3166#else
3167 set 0x55504502, %r28
3168#if (MAX_THREADS == 8)
3169 and %r28, 0x7ff, %r28
3170#endif
3171 stxa %r28, [%g0] 0x73
3172#endif
3173intvec_20_12:
3174 .word 0x39400001 ! 34: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3175 .word 0xe19fe060 ! 35: LDDFA_I ldda [%r31, 0x0060], %f16
3176 .word 0x39400001 ! 36: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3177 .word 0xa9b484c3 ! 37: FCMPNE32 fcmpne32 %d18, %d34, %r20
3178 .word 0xc36aa2b1 ! 37: PREFETCH_I prefetch [%r10 + 0x02b1], #one_read
3179memptr_20_14:
3180 set 0x60140000, %r31
3181 rd %tick, %r28
3182#if (MAX_THREADS == 8)
3183 sethi %hi(0x33800), %r27
3184#else
3185 sethi %hi(0x30000), %r27
3186#endif
3187 andn %r28, %r27, %r28
3188 ta T_CHANGE_HPRIV
3189 stxa %r28, [%g0] 0x73
3190intvec_20_15:
3191 .word 0xe19fe100 ! 38: LDDFA_I ldda [%r31, 0x0100], %f16
3192 .word 0x85853df9 ! 39: WRCCR_I wr %r20, 0x1df9, %ccr
3193 .word 0xc36966ad ! 40: PREFETCH_I prefetch [%r5 + 0x06ad], #one_read
3194 .word 0xc19fe100 ! 41: LDDFA_I ldda [%r31, 0x0100], %f0
3195 .word 0x39400001 ! 41: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3196 rd %tick, %r28
3197#if (MAX_THREADS == 8)
3198 sethi %hi(0x33800), %r27
3199#else
3200 sethi %hi(0x30000), %r27
3201#endif
3202 andn %r28, %r27, %r28
3203 ta T_CHANGE_HPRIV
3204 stxa %r28, [%g0] 0x73
3205intvec_20_17:
3206 .word 0xe71fe080 ! 42: LDDF_I ldd [%r31, 0x0080], %f19
3207 .word 0xa7b7c4c8 ! 43: FCMPNE32 fcmpne32 %d62, %d8, %r19
3208 .word 0x95b084c4 ! 44: FCMPNE32 fcmpne32 %d2, %d4, %r10
3209 .word 0xdb1fe0f0 ! 45: LDDF_I ldd [%r31, 0x00f0], %f13
3210 .word 0x24cfc001 ! 45: BRLEZ brlez,a,pt %r31,<label_0xfc001>
3211 .word 0xda97e0d0 ! 46: LDUHA_I lduha [%r31, + 0x00d0] %asi, %r13
3212 .word 0x9bb7c4ca ! 47: FCMPNE32 fcmpne32 %d62, %d10, %r13
3213 .word 0x9f8020d0 ! 48: SIR sir 0x00d0
3214 .word 0xdb1fc00c ! 49: LDDF_R ldd [%r31, %r12], %f13
3215 .word 0xda3fe060 ! 49: STD_I std %r13, [%r31 + 0x0060]
3216 .word 0xd697e1f0 ! 50: LDUHA_I lduha [%r31, + 0x01f0] %asi, %r11
3217 .word 0xe19fe080 ! 51: LDDFA_I ldda [%r31, 0x0080], %f16
3218 .word 0xe19fe1a0 ! 52: LDDFA_I ldda [%r31, 0x01a0], %f16
3219 .word 0xd69fe040 ! 53: LDDA_I ldda [%r31, + 0x0040] %asi, %r11
3220 .word 0xc1bfe100 ! 53: STDFA_I stda %f0, [0x0100, %r31]
3221memptr_20_21:
3222 set user_data_start, %r31
3223 .word 0xc19fe060 ! 54: LDDFA_I ldda [%r31, 0x0060], %f0
3224 .word 0x8582381f ! 55: WRCCR_I wr %r8, 0x181f, %ccr
3225 .word 0xd69fe120 ! 56: LDDA_I ldda [%r31, + 0x0120] %asi, %r11
3226 .word 0xc1bfe120 ! 57: STDFA_I stda %f0, [0x0120, %r31]
3227 .word 0x8584601b ! 57: WRCCR_I wr %r17, 0x001b, %ccr
3228 .word 0xd71fe040 ! 58: LDDF_I ldd [%r31, 0x0040], %f11
3229 .word 0xc19fe100 ! 59: LDDFA_I ldda [%r31, 0x0100], %f0
3230 .word 0xd7e7c02d ! 60: CASA_I casa [%r31] 0x 1, %r13, %r11
3231 .word 0x9f802030 ! 61: SIR sir 0x0030
3232 .word 0xd71fc013 ! 61: LDDF_R ldd [%r31, %r19], %f11
3233#if (defined SPC || defined CMP1)
3234!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_24) + 16, 16, 16)) -> intp(5,0,11,,,,,1)
3235!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_24)&0xffffffff) + 32, 16, 16)) -> intp(1,0,31,,,,,1)
3236#else
3237 set 0x2570c27b, %r28
3238#if (MAX_THREADS == 8)
3239 and %r28, 0x7ff, %r28
3240#endif
3241 stxa %r28, [%g0] 0x73
3242#endif
3243intvec_20_24:
3244memptr_20_25:
3245 set 0x60540000, %r31
3246#if (defined SPC || defined CMP1)
3247!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_26) + 32, 16, 16)) -> intp(2,0,17,,,,,1)
3248!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_26)&0xffffffff) + 0, 16, 16)) -> intp(4,0,5,,,,,1)
3249#else
3250 set 0xff50f70a, %r28
3251#if (MAX_THREADS == 8)
3252 and %r28, 0x7ff, %r28
3253#endif
3254 stxa %r28, [%g0] 0x73
3255#endif
3256 .word 0x9f802a7f ! 1: SIR sir 0x0a7f
3257intvec_20_26:
3258 .word 0x39400001 ! 62: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3259 .word 0x8584ad0b ! 63: WRCCR_I wr %r18, 0x0d0b, %ccr
3260 .word 0x39400001 ! 64: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3261 .word 0xc36afd7b ! 65: PREFETCH_I prefetch [%r11 + 0xfffffd7b], #one_read
3262 .word 0x9f802a5d ! 65: SIR sir 0x0a5d
3263memptr_20_28:
3264 set 0x60740000, %r31
3265 .word 0xd0dfc028 ! 66: LDXA_R ldxa [%r31, %r8] 0x01, %r8
3266 .word 0x8580e125 ! 67: WRCCR_I wr %r3, 0x0125, %ccr
3267 .word 0xe19fe080 ! 68: LDDFA_I ldda [%r31, 0x0080], %f16
3268 .word 0xc32fe050 ! 69: STXFSR_I st-sfr %f1, [0x0050, %r31]
3269 .word 0xc19fe0c0 ! 69: LDDFA_I ldda [%r31, 0x00c0], %f0
3270 .word 0xd11fe010 ! 70: LDDF_I ldd [%r31, 0x0010], %f8
3271 .word 0xc36fe130 ! 71: PREFETCH_I prefetch [%r31 + 0x0130], #one_read
3272 .word 0xe19fe060 ! 72: LDDFA_I ldda [%r31, 0x0060], %f16
3273 .word 0xd0dfc02d ! 73: LDXA_R ldxa [%r31, %r13] 0x01, %r8
3274 .word 0xe19fe100 ! 73: LDDFA_I ldda [%r31, 0x0100], %f16
3275memptr_20_31:
3276 set 0x60740000, %r31
3277 .word 0xc1bfe0c0 ! 74: STDFA_I stda %f0, [0x00c0, %r31]
3278 .word 0x85846166 ! 75: WRCCR_I wr %r17, 0x0166, %ccr
3279 .word 0xd13fe070 ! 76: STDF_I std %f8, [0x0070, %r31]
3280 .word 0xe19fe140 ! 77: LDDFA_I ldda [%r31, 0x0140], %f16
3281 .word 0x8581eac1 ! 77: WRCCR_I wr %r7, 0x0ac1, %ccr
3282memptr_20_32:
3283 set 0x60340000, %r31
3284 rd %tick, %r28
3285#if (MAX_THREADS == 8)
3286 sethi %hi(0x33800), %r27
3287#else
3288 sethi %hi(0x30000), %r27
3289#endif
3290 andn %r28, %r27, %r28
3291 ta T_CHANGE_HPRIV
3292 stxa %r28, [%g0] 0x73
3293intvec_20_33:
3294 .word 0xd11fe130 ! 78: LDDF_I ldd [%r31, 0x0130], %f8
3295 .word 0x858136ce ! 79: WRCCR_I wr %r4, 0x16ce, %ccr
3296 .word 0xc368efeb ! 80: PREFETCH_I prefetch [%r3 + 0x0feb], #one_read
3297 .word 0xd51fe0c0 ! 81: LDDF_I ldd [%r31, 0x00c0], %f10
3298 .word 0x9ba049d4 ! 81: FDIVd fdivd %f32, %f20, %f44
3299 rd %tick, %r28
3300#if (MAX_THREADS == 8)
3301 sethi %hi(0x33800), %r27
3302#else
3303 sethi %hi(0x30000), %r27
3304#endif
3305 andn %r28, %r27, %r28
3306 ta T_CHANGE_HPRIV
3307 stxa %r28, [%g0] 0x73
3308 .word 0x99a049d1 ! 1: FDIVd fdivd %f32, %f48, %f12
3309intvec_20_35:
3310 .word 0xa1b084c1 ! 82: FCMPNE32 fcmpne32 %d2, %d32, %r16
3311 .word 0xd7e7c032 ! 83: CASA_I casa [%r31] 0x 1, %r18, %r11
3312 .word 0xd69fe060 ! 84: LDDA_I ldda [%r31, + 0x0060] %asi, %r11
3313 .word 0xa5a4c9ca ! 85: FDIVd fdivd %f50, %f10, %f18
3314 .word 0xe49fe1e0 ! 85: LDDA_I ldda [%r31, + 0x01e0] %asi, %r18
3315 rd %tick, %r28
3316#if (MAX_THREADS == 8)
3317 sethi %hi(0x33800), %r27
3318#else
3319 sethi %hi(0x30000), %r27
3320#endif
3321 andn %r28, %r27, %r28
3322 ta T_CHANGE_HPRIV
3323 stxa %r28, [%g0] 0x73
3324intvec_20_37:
3325memptr_20_38:
3326 set 0x60540000, %r31
3327 .word 0x39400001 ! 86: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3328 .word 0x85853117 ! 87: WRCCR_I wr %r20, 0x1117, %ccr
3329 .word 0xe1bfe060 ! 88: STDFA_I stda %f16, [0x0060, %r31]
3330 .word 0xa9b504d0 ! 89: FCMPNE32 fcmpne32 %d20, %d16, %r20
3331 .word 0xe19fe180 ! 89: LDDFA_I ldda [%r31, 0x0180], %f16
3332#if (defined SPC || defined CMP1)
3333!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_40) + 56, 16, 16)) -> intp(7,0,10,,,,,1)
3334!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_40)&0xffffffff) + 56, 16, 16)) -> intp(0,0,23,,,,,1)
3335#else
3336 set 0xcff0007f, %r28
3337#if (MAX_THREADS == 8)
3338 and %r28, 0x7ff, %r28
3339#endif
3340 stxa %r28, [%g0] 0x73
3341#endif
3342 .word 0xc36b7c92 ! 1: PREFETCH_I prefetch [%r13 + 0xfffffc92], #one_read
3343intvec_20_40:
3344 .word 0x39400001 ! 90: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3345 .word 0xe19fe0e0 ! 91: LDDFA_I ldda [%r31, 0x00e0], %f16
3346 .word 0xe11fe0a0 ! 92: LDDF_I ldd [%r31, 0x00a0], %f16
3347 .word 0xa7b504d3 ! 93: FCMPNE32 fcmpne32 %d20, %d50, %r19
3348 .word 0xc19fe0c0 ! 93: LDDFA_I ldda [%r31, 0x00c0], %f0
3349memptr_20_41:
3350 set 0x60740000, %r31
3351#if (defined SPC || defined CMP1)
3352!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_42) + 40, 16, 16)) -> intp(1,0,3,,,,,1)
3353!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_42)&0xffffffff) + 16, 16, 16)) -> intp(3,0,4,,,,,1)
3354#else
3355 set 0xf9e04119, %r28
3356#if (MAX_THREADS == 8)
3357 and %r28, 0x7ff, %r28
3358#endif
3359 stxa %r28, [%g0] 0x73
3360#endif
3361intvec_20_42:
3362 .word 0xe1bfe020 ! 94: STDFA_I stda %f16, [0x0020, %r31]
3363 .word 0x85822e48 ! 95: WRCCR_I wr %r8, 0x0e48, %ccr
3364 .word 0x9f802521 ! 96: SIR sir 0x0521
3365 .word 0xe19fe180 ! 97: LDDFA_I ldda [%r31, 0x0180], %f16
3366 .word 0xa3a189d2 ! 97: FDIVd fdivd %f6, %f18, %f48
3367#if (defined SPC || defined CMP1)
3368!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_44) + 48, 16, 16)) -> intp(6,0,3,,,,,1)
3369!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_44)&0xffffffff) + 16, 16, 16)) -> intp(6,0,20,,,,,1)
3370#else
3371 set 0x3b0c0db, %r28
3372#if (MAX_THREADS == 8)
3373 and %r28, 0x7ff, %r28
3374#endif
3375 stxa %r28, [%g0] 0x73
3376#endif
3377 .word 0x9f8031e5 ! 1: SIR sir 0x11e5
3378intvec_20_44:
3379 .word 0xe91fe0a0 ! 98: LDDF_I ldd [%r31, 0x00a0], %f20
3380 .word 0xe19fe0e0 ! 99: LDDFA_I ldda [%r31, 0x00e0], %f16
3381 .word 0x39400001 ! 100: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3382 .word 0xe91fe070 ! 101: LDDF_I ldd [%r31, 0x0070], %f20
3383 .word 0xc36a2bb8 ! 101: PREFETCH_I prefetch [%r8 + 0x0bb8], #one_read
3384#if (defined SPC || defined CMP1)
3385!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_46) + 32, 16, 16)) -> intp(5,0,0,,,,,1)
3386!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_46)&0xffffffff) + 32, 16, 16)) -> intp(2,0,20,,,,,1)
3387#else
3388 set 0x38d0de7b, %r28
3389#if (MAX_THREADS == 8)
3390 and %r28, 0x7ff, %r28
3391#endif
3392 stxa %r28, [%g0] 0x73
3393#endif
3394intvec_20_46:
3395 .word 0x39400001 ! 102: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3396 .word 0x39400001 ! 103: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3397 .word 0xe19fe020 ! 104: LDDFA_I ldda [%r31, 0x0020], %f16
3398 .word 0x39400001 ! 105: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3399 .word 0xe19fe040 ! 105: LDDFA_I ldda [%r31, 0x0040], %f16
3400 .word 0xe93fe1a0 ! 106: STDF_I std %f20, [0x01a0, %r31]
3401 .word 0xc1bfe120 ! 107: STDFA_I stda %f0, [0x0120, %r31]
3402 .word 0xe1bfe140 ! 108: STDFA_I stda %f16, [0x0140, %r31]
3403 .word 0xe8bfe170 ! 109: STDA_I stda %r20, [%r31 + 0x0170] %asi
3404 .word 0xe19fe0c0 ! 109: LDDFA_I ldda [%r31, 0x00c0], %f16
3405memptr_20_47:
3406 set 0x60740000, %r31
3407 .word 0xe89fe000 ! 110: LDDA_I ldda [%r31, + 0x0000] %asi, %r20
3408 .word 0x8582a300 ! 111: WRCCR_I wr %r10, 0x0300, %ccr
3409 .word 0xe89fe070 ! 112: LDDA_I ldda [%r31, + 0x0070] %asi, %r20
3410 .word 0xe8bfe0c0 ! 113: STDA_I stda %r20, [%r31 + 0x00c0] %asi
3411 .word 0x8584648f ! 113: WRCCR_I wr %r17, 0x048f, %ccr
3412 rd %tick, %r28
3413#if (MAX_THREADS == 8)
3414 sethi %hi(0x33800), %r27
3415#else
3416 sethi %hi(0x30000), %r27
3417#endif
3418 andn %r28, %r27, %r28
3419 ta T_CHANGE_HPRIV
3420 stxa %r28, [%g0] 0x73
3421intvec_20_49:
3422 .word 0xc1bfe0a0 ! 114: STDFA_I stda %f0, [0x00a0, %r31]
3423 .word 0x87afca4d ! 115: FCMPd fcmpd %fcc<n>, %f62, %f44
3424 .word 0x97a109d4 ! 116: FDIVd fdivd %f4, %f20, %f42
3425 .word 0xe1bfe0e0 ! 117: STDFA_I stda %f16, [0x00e0, %r31]
3426 .word 0xa7b504d3 ! 117: FCMPNE32 fcmpne32 %d20, %d50, %r19
3427#if (defined SPC || defined CMP1)
3428!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_50) + 24, 16, 16)) -> intp(5,0,28,,,,,1)
3429!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_50)&0xffffffff) + 40, 16, 16)) -> intp(7,0,12,,,,,1)
3430#else
3431 set 0xf640519e, %r28
3432#if (MAX_THREADS == 8)
3433 and %r28, 0x7ff, %r28
3434#endif
3435 stxa %r28, [%g0] 0x73
3436#endif
3437intvec_20_50:
3438 .word 0xc36cfa56 ! 118: PREFETCH_I prefetch [%r19 + 0xfffffa56], #one_read
3439 .word 0xc19fe1c0 ! 119: LDDFA_I ldda [%r31, 0x01c0], %f0
3440 .word 0xc32fe0a0 ! 120: STXFSR_I st-sfr %f1, [0x00a0, %r31]
3441 .word 0x9f802a30 ! 121: SIR sir 0x0a30
3442 .word 0xe5e7c033 ! 121: CASA_I casa [%r31] 0x 1, %r19, %r18
3443memptr_20_52:
3444 set 0x60540000, %r31
3445 .word 0xe51fe130 ! 122: LDDF_I ldd [%r31, 0x0130], %f18
3446 .word 0x8584fab6 ! 123: WRCCR_I wr %r19, 0x1ab6, %ccr
3447 .word 0xc19fe140 ! 124: LDDFA_I ldda [%r31, 0x0140], %f0
3448 .word 0xe49fe1d0 ! 125: LDDA_I ldda [%r31, + 0x01d0] %asi, %r18
3449 .word 0xe1bfe1a0 ! 125: STDFA_I stda %f16, [0x01a0, %r31]
3450 rd %tick, %r28
3451#if (MAX_THREADS == 8)
3452 sethi %hi(0x33800), %r27
3453#else
3454 sethi %hi(0x30000), %r27
3455#endif
3456 andn %r28, %r27, %r28
3457 ta T_CHANGE_HPRIV
3458 stxa %r28, [%g0] 0x73
3459intvec_20_53:
3460 .word 0x9f802463 ! 126: SIR sir 0x0463
3461 .word 0x87afca4d ! 127: FCMPd fcmpd %fcc<n>, %f62, %f44
3462 .word 0xe1bfe160 ! 128: STDFA_I stda %f16, [0x0160, %r31]
3463 .word 0xa7b104d4 ! 129: FCMPNE32 fcmpne32 %d4, %d20, %r19
3464 .word 0xc19fe020 ! 129: LDDFA_I ldda [%r31, 0x0020], %f0
3465memptr_20_55:
3466 set 0x60540000, %r31
3467 .word 0xe19fe0e0 ! 130: LDDFA_I ldda [%r31, 0x00e0], %f16
3468 .word 0x85822699 ! 131: WRCCR_I wr %r8, 0x0699, %ccr
3469 .word 0xe1bfe180 ! 132: STDFA_I stda %f16, [0x0180, %r31]
3470 .word 0xc19fe1a0 ! 133: LDDFA_I ldda [%r31, 0x01a0], %f0
3471 .word 0xc19fe100 ! 133: LDDFA_I ldda [%r31, 0x0100], %f0
3472memptr_20_57:
3473 set user_data_start, %r31
3474 .word 0xe6dfc02c ! 134: LDXA_R ldxa [%r31, %r12] 0x01, %r19
3475 .word 0x8582e51c ! 135: WRCCR_I wr %r11, 0x051c, %ccr
3476 .word 0xe1bfe180 ! 136: STDFA_I stda %f16, [0x0180, %r31]
3477 .word 0xc32fe030 ! 137: STXFSR_I st-sfr %f1, [0x0030, %r31]
3478 .word 0x8582bb28 ! 137: WRCCR_I wr %r10, 0x1b28, %ccr
3479 rd %tick, %r28
3480#if (MAX_THREADS == 8)
3481 sethi %hi(0x33800), %r27
3482#else
3483 sethi %hi(0x30000), %r27
3484#endif
3485 andn %r28, %r27, %r28
3486 ta T_CHANGE_HPRIV
3487 stxa %r28, [%g0] 0x73
3488intvec_20_59:
3489#if (defined SPC || defined CMP1)
3490!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_60) + 40, 16, 16)) -> intp(0,0,26,,,,,1)
3491!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_60)&0xffffffff) + 56, 16, 16)) -> intp(1,0,30,,,,,1)
3492#else
3493 set 0xfbc0a96e, %r28
3494#if (MAX_THREADS == 8)
3495 and %r28, 0x7ff, %r28
3496#endif
3497 stxa %r28, [%g0] 0x73
3498#endif
3499intvec_20_60:
3500 .word 0x39400001 ! 138: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3501 .word 0xe43fe060 ! 139: STD_I std %r18, [%r31 + 0x0060]
3502 .word 0xa9b104cb ! 140: FCMPNE32 fcmpne32 %d4, %d42, %r20
3503 .word 0x97b304d1 ! 141: FCMPNE32 fcmpne32 %d12, %d48, %r11
3504 .word 0xc36fe1d0 ! 141: PREFETCH_I prefetch [%r31 + 0x01d0], #one_read
3505 .word 0xe91fe0d0 ! 142: LDDF_I ldd [%r31, 0x00d0], %f20
3506 .word 0x39400001 ! 143: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3507 .word 0xc19fe1e0 ! 144: LDDFA_I ldda [%r31, 0x01e0], %f0
3508 .word 0xe8dfc028 ! 145: LDXA_R ldxa [%r31, %r8] 0x01, %r20
3509 .word 0x39400001 ! 145: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3510#if (defined SPC || defined CMP1)
3511!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_62) + 8, 16, 16)) -> intp(3,0,9,,,,,1)
3512!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_62)&0xffffffff) + 56, 16, 16)) -> intp(4,0,30,,,,,1)
3513#else
3514 set 0xdd009873, %r28
3515#if (MAX_THREADS == 8)
3516 and %r28, 0x7ff, %r28
3517#endif
3518 stxa %r28, [%g0] 0x73
3519#endif
3520 .word 0xc36a79b6 ! 1: PREFETCH_I prefetch [%r9 + 0xfffff9b6], #one_read
3521intvec_20_62:
3522 rd %tick, %r28
3523#if (MAX_THREADS == 8)
3524 sethi %hi(0x33800), %r27
3525#else
3526 sethi %hi(0x30000), %r27
3527#endif
3528 andn %r28, %r27, %r28
3529 ta T_CHANGE_HPRIV
3530 stxa %r28, [%g0] 0x73
3531 .word 0x9f802616 ! 1: SIR sir 0x0616
3532intvec_20_63:
3533 .word 0x97b484c3 ! 146: FCMPNE32 fcmpne32 %d18, %d34, %r11
3534 .word 0xe19fe1e0 ! 147: LDDFA_I ldda [%r31, 0x01e0], %f16
3535 .word 0xa7b084c5 ! 148: FCMPNE32 fcmpne32 %d2, %d36, %r19
3536 .word 0x9f803140 ! 149: SIR sir 0x1140
3537 .word 0xe1bfe1a0 ! 149: STDFA_I stda %f16, [0x01a0, %r31]
3538 .word 0xc1bfe180 ! 150: STDFA_I stda %f0, [0x0180, %r31]
3539 .word 0xd23fe050 ! 151: STD_I std %r9, [%r31 + 0x0050]
3540 .word 0xc32fe080 ! 152: STXFSR_I st-sfr %f1, [0x0080, %r31]
3541 .word 0xe1bfe020 ! 153: STDFA_I stda %f16, [0x0020, %r31]
3542 .word 0xd31fe190 ! 153: LDDF_I ldd [%r31, 0x0190], %f9
3543 .word 0xc19fe140 ! 154: LDDFA_I ldda [%r31, 0x0140], %f0
3544 .word 0xc19fe0e0 ! 155: LDDFA_I ldda [%r31, 0x00e0], %f0
3545 .word 0xe19fe0a0 ! 156: LDDFA_I ldda [%r31, 0x00a0], %f16
3546 .word 0xc1bfe020 ! 157: STDFA_I stda %f0, [0x0020, %r31]
3547 .word 0xe19fe060 ! 157: LDDFA_I ldda [%r31, 0x0060], %f16
3548 .word 0xe1bfe140 ! 158: STDFA_I stda %f16, [0x0140, %r31]
3549 .word 0x93a7c9d4 ! 159: FDIVd fdivd %f62, %f20, %f40
3550 .word 0xd29fe0f0 ! 160: LDDA_I ldda [%r31, + 0x00f0] %asi, %r9
3551 .word 0xc19fe000 ! 161: LDDFA_I ldda [%r31, 0x0000], %f0
3552 .word 0xd33fe0a0 ! 161: STDF_I std %f9, [0x00a0, %r31]
3553#if (defined SPC || defined CMP1)
3554!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_68) + 8, 16, 16)) -> intp(5,0,4,,,,,1)
3555!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_68)&0xffffffff) + 40, 16, 16)) -> intp(7,0,4,,,,,1)
3556#else
3557 set 0x6c08a47, %r28
3558#if (MAX_THREADS == 8)
3559 and %r28, 0x7ff, %r28
3560#endif
3561 stxa %r28, [%g0] 0x73
3562#endif
3563 .word 0x9f802d3a ! 1: SIR sir 0x0d3a
3564intvec_20_68:
3565 .word 0x39400001 ! 162: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3566 .word 0xe1bfe060 ! 163: STDFA_I stda %f16, [0x0060, %r31]
3567 .word 0xe19fe1a0 ! 164: LDDFA_I ldda [%r31, 0x01a0], %f16
3568 .word 0xa3a409ca ! 165: FDIVd fdivd %f16, %f10, %f48
3569 .word 0xe1bfe020 ! 165: STDFA_I stda %f16, [0x0020, %r31]
3570#if (defined SPC || defined CMP1)
3571!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_70) + 40, 16, 16)) -> intp(7,0,19,,,,,1)
3572!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_70)&0xffffffff) + 40, 16, 16)) -> intp(2,0,5,,,,,1)
3573#else
3574 set 0xdb4023f4, %r28
3575#if (MAX_THREADS == 8)
3576 and %r28, 0x7ff, %r28
3577#endif
3578 stxa %r28, [%g0] 0x73
3579#endif
3580 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3581intvec_20_70:
3582 .word 0xd097e1a0 ! 166: LDUHA_I lduha [%r31, + 0x01a0] %asi, %r8
3583 .word 0xe1bfe1e0 ! 167: STDFA_I stda %f16, [0x01e0, %r31]
3584 .word 0xc36c3eff ! 168: PREFETCH_I prefetch [%r16 + 0xfffffeff], #one_read
3585 .word 0xe1e7c033 ! 169: CASA_I casa [%r31] 0x 1, %r19, %r16
3586 .word 0xe19fe120 ! 169: LDDFA_I ldda [%r31, 0x0120], %f16
3587 .word 0xa9a0054a ! 1: FSQRTd fsqrt
3588memptr_20_72:
3589 set user_data_start, %r31
3590 rd %tick, %r28
3591#if (MAX_THREADS == 8)
3592 sethi %hi(0x33800), %r27
3593#else
3594 sethi %hi(0x30000), %r27
3595#endif
3596 andn %r28, %r27, %r28
3597 ta T_CHANGE_HPRIV
3598 stxa %r28, [%g0] 0x73
3599intvec_20_73:
3600 .word 0xe19fe0c0 ! 170: LDDFA_I ldda [%r31, 0x00c0], %f16
3601 .word 0x85817557 ! 171: WRCCR_I wr %r5, 0x1557, %ccr
3602 .word 0x39400001 ! 172: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3603 .word 0xc19fe180 ! 173: LDDFA_I ldda [%r31, 0x0180], %f0
3604 .word 0xa1b504d1 ! 173: FCMPNE32 fcmpne32 %d20, %d48, %r16
3605memptr_20_75:
3606 set user_data_start, %r31
3607#if (defined SPC || defined CMP1)
3608!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_76) + 56, 16, 16)) -> intp(2,0,30,,,,,1)
3609!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_76)&0xffffffff) + 56, 16, 16)) -> intp(4,0,21,,,,,1)
3610#else
3611 set 0xa0c001de, %r28
3612#if (MAX_THREADS == 8)
3613 and %r28, 0x7ff, %r28
3614#endif
3615 stxa %r28, [%g0] 0x73
3616#endif
3617 .word 0x95b284cc ! 1: FCMPNE32 fcmpne32 %d10, %d12, %r10
3618intvec_20_76:
3619 .word 0xc32fe150 ! 174: STXFSR_I st-sfr %f1, [0x0150, %r31]
3620 .word 0x85846fa2 ! 175: WRCCR_I wr %r17, 0x0fa2, %ccr
3621 .word 0xa5b184cb ! 176: FCMPNE32 fcmpne32 %d6, %d42, %r18
3622 .word 0xda9fe170 ! 177: LDDA_I ldda [%r31, + 0x0170] %asi, %r13
3623 .word 0xc36d3496 ! 177: PREFETCH_I prefetch [%r20 + 0xfffff496], #one_read
3624memptr_20_77:
3625 set 0x60140000, %r31
3626 .word 0xd29fe020 ! 178: LDDA_I ldda [%r31, + 0x0020] %asi, %r9
3627 .word 0x858523b4 ! 179: WRCCR_I wr %r20, 0x03b4, %ccr
3628 .word 0x9f8020c0 ! 180: SIR sir 0x00c0
3629 .word 0xc32fe0d0 ! 181: STXFSR_I st-sfr %f1, [0x00d0, %r31]
3630 .word 0x85847163 ! 181: WRCCR_I wr %r17, 0x1163, %ccr
3631 .word 0xd31fe1b0 ! 182: LDDF_I ldd [%r31, 0x01b0], %f9
3632 .word 0x93b7c4d0 ! 183: FCMPNE32 fcmpne32 %d62, %d16, %r9
3633 .word 0xd33fe070 ! 184: STDF_I std %f9, [0x0070, %r31]
3634 .word 0xd29fe0d0 ! 185: LDDA_I ldda [%r31, + 0x00d0] %asi, %r9
3635 .word 0xd23fe0a0 ! 185: STD_I std %r9, [%r31 + 0x00a0]
3636#if (defined SPC || defined CMP1)
3637!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_80) + 0, 16, 16)) -> intp(1,0,22,,,,,1)
3638!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_80)&0xffffffff) + 32, 16, 16)) -> intp(4,0,7,,,,,1)
3639#else
3640 set 0x5fb06be3, %r28
3641#if (MAX_THREADS == 8)
3642 and %r28, 0x7ff, %r28
3643#endif
3644 stxa %r28, [%g0] 0x73
3645#endif
3646 .word 0x9f802b27 ! 1: SIR sir 0x0b27
3647intvec_20_80:
3648 rd %tick, %r28
3649#if (MAX_THREADS == 8)
3650 sethi %hi(0x33800), %r27
3651#else
3652 sethi %hi(0x30000), %r27
3653#endif
3654 andn %r28, %r27, %r28
3655 ta T_CHANGE_HPRIV
3656 stxa %r28, [%g0] 0x73
3657intvec_20_81:
3658 .word 0x39400001 ! 186: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3659 .word 0xa7a7c9d0 ! 187: FDIVd fdivd %f62, %f16, %f50
3660 .word 0xa3a0c9cb ! 188: FDIVd fdivd %f34, %f42, %f48
3661 .word 0x91a4c9ca ! 189: FDIVd fdivd %f50, %f10, %f8
3662 .word 0x39400001 ! 189: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3663 rd %tick, %r28
3664#if (MAX_THREADS == 8)
3665 sethi %hi(0x33800), %r27
3666#else
3667 sethi %hi(0x30000), %r27
3668#endif
3669 andn %r28, %r27, %r28
3670 ta T_CHANGE_HPRIV
3671 stxa %r28, [%g0] 0x73
3672 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3673intvec_20_83:
3674 .word 0xa7b444d2 ! 190: FCMPNE32 fcmpne32 %d48, %d18, %r19
3675 .word 0xe19fe1c0 ! 191: LDDFA_I ldda [%r31, 0x01c0], %f16
3676 .word 0xe19fe040 ! 192: LDDFA_I ldda [%r31, 0x0040], %f16
3677 .word 0x39400001 ! 193: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3678 .word 0xe19fe0e0 ! 193: LDDFA_I ldda [%r31, 0x00e0], %f16
3679memptr_20_85:
3680 set 0x60740000, %r31
3681 .word 0xd23fe140 ! 194: STD_I std %r9, [%r31 + 0x0140]
3682 .word 0x8585233b ! 195: WRCCR_I wr %r20, 0x033b, %ccr
3683 .word 0xd31fe040 ! 196: LDDF_I ldd [%r31, 0x0040], %f9
3684 .word 0xd29fe020 ! 197: LDDA_I ldda [%r31, + 0x0020] %asi, %r9
3685 .word 0x8581f6f3 ! 197: WRCCR_I wr %r7, 0x16f3, %ccr
3686 .word 0xc19fe080 ! 198: LDDFA_I ldda [%r31, 0x0080], %f0
3687 .word 0xc36fe070 ! 199: PREFETCH_I prefetch [%r31 + 0x0070], #one_read
3688 .word 0xd3e7c028 ! 200: CASA_I casa [%r31] 0x 1, %r8, %r9
3689 .word 0xc19fe080 ! 201: LDDFA_I ldda [%r31, 0x0080], %f0
3690 .word 0xd3e7c030 ! 201: CASA_I casa [%r31] 0x 1, %r16, %r9
3691.text
3692 setx join_lbl_0_0, %g1, %g2
3693 jmp %g2
3694 nop
3695fork_lbl_0_5:
3696 rd %tick, %r28
3697#if (MAX_THREADS == 8)
3698 sethi %hi(0x33800), %r27
3699#else
3700 sethi %hi(0x30000), %r27
3701#endif
3702 andn %r28, %r27, %r28
3703 ta T_CHANGE_HPRIV
3704 stxa %r28, [%g0] 0x73
3705intvec_10_1:
3706#if (defined SPC || defined CMP1)
3707!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_2) + 8, 16, 16)) -> intp(3,0,13,,,,,1)
3708!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_2)&0xffffffff) + 56, 16, 16)) -> intp(2,0,8,,,,,1)
3709#else
3710 set 0xe390b578, %r28
3711#if (MAX_THREADS == 8)
3712 and %r28, 0x7ff, %r28
3713#endif
3714 stxa %r28, [%g0] 0x73
3715#endif
3716intvec_10_2:
3717 .word 0xc36ce712 ! 2: PREFETCH_I prefetch [%r19 + 0x0712], #one_read
3718 .word 0xd43fe110 ! 3: STD_I std %r10, [%r31 + 0x0110]
3719 .word 0x9ba249c2 ! 4: FDIVd fdivd %f40, %f2, %f44
3720 .word 0x39400001 ! 5: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3721 .word 0xc36fe080 ! 5: PREFETCH_I prefetch [%r31 + 0x0080], #one_read
3722 .word 0xc19fe080 ! 6: LDDFA_I ldda [%r31, 0x0080], %f0
3723 .word 0x97a7c9d2 ! 7: FDIVd fdivd %f62, %f18, %f42
3724 .word 0xe1bfe1a0 ! 8: STDFA_I stda %f16, [0x01a0, %r31]
3725 .word 0xc1bfe000 ! 9: STDFA_I stda %f0, [0x0000, %r31]
3726 .word 0xd63fe010 ! 9: STD_I std %r11, [%r31 + 0x0010]
3727 .word 0xd0bfe050 ! 10: STDA_I stda %r8, [%r31 + 0x0050] %asi
3728 .word 0xc1bfe0a0 ! 11: STDFA_I stda %f0, [0x00a0, %r31]
3729 .word 0xe1bfe1c0 ! 12: STDFA_I stda %f16, [0x01c0, %r31]
3730 .word 0xc32fe110 ! 13: STXFSR_I st-sfr %f1, [0x0110, %r31]
3731 .word 0xc1bfe1e0 ! 13: STDFA_I stda %f0, [0x01e0, %r31]
3732memptr_10_3:
3733 set user_data_start, %r31
3734 .word 0xe19fe080 ! 14: LDDFA_I ldda [%r31, 0x0080], %f16
3735 .word 0x85853cc9 ! 15: WRCCR_I wr %r20, 0x1cc9, %ccr
3736 .word 0xc19fe140 ! 16: LDDFA_I ldda [%r31, 0x0140], %f0
3737 .word 0xc1bfe180 ! 17: STDFA_I stda %f0, [0x0180, %r31]
3738 .word 0xe1bfe020 ! 17: STDFA_I stda %f16, [0x0020, %r31]
3739memptr_10_4:
3740 set 0x60140000, %r31
3741 rd %tick, %r28
3742#if (MAX_THREADS == 8)
3743 sethi %hi(0x33800), %r27
3744#else
3745 sethi %hi(0x30000), %r27
3746#endif
3747 andn %r28, %r27, %r28
3748 ta T_CHANGE_HPRIV
3749 stxa %r28, [%g0] 0x73
3750intvec_10_5:
3751 .word 0xd13fe010 ! 18: STDF_I std %f8, [0x0010, %r31]
3752 .word 0x85827096 ! 19: WRCCR_I wr %r9, 0x1096, %ccr
3753 .word 0x9f80224f ! 20: SIR sir 0x024f
3754 .word 0xe33fe1d0 ! 21: STDF_I std %f17, [0x01d0, %r31]
3755 .word 0x85846d33 ! 21: WRCCR_I wr %r17, 0x0d33, %ccr
3756memptr_10_6:
3757 set user_data_start, %r31
3758 .word 0xc19fe0a0 ! 22: LDDFA_I ldda [%r31, 0x00a0], %f0
3759 .word 0x858278d5 ! 23: WRCCR_I wr %r9, 0x18d5, %ccr
3760 .word 0xe3e7c031 ! 24: CASA_I casa [%r31] 0x 1, %r17, %r17
3761 .word 0xc1bfe120 ! 25: STDFA_I stda %f0, [0x0120, %r31]
3762 .word 0xe23fe010 ! 25: STD_I std %r17, [%r31 + 0x0010]
3763#if (defined SPC || defined CMP1)
3764!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_8) + 0, 16, 16)) -> intp(7,0,22,,,,,1)
3765!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_8)&0xffffffff) + 24, 16, 16)) -> intp(4,0,8,,,,,1)
3766#else
3767 set 0x59a04750, %r28
3768#if (MAX_THREADS == 8)
3769 and %r28, 0x7ff, %r28
3770#endif
3771 stxa %r28, [%g0] 0x73
3772#endif
3773 .word 0x9f803b90 ! 1: SIR sir 0x1b90
3774intvec_10_8:
3775 .word 0xa3b404d0 ! 26: FCMPNE32 fcmpne32 %d16, %d16, %r17
3776 .word 0x24cfc001 ! 27: BRLEZ brlez,a,pt %r31,<label_0xfc001>
3777 .word 0xe19fe1c0 ! 28: LDDFA_I ldda [%r31, 0x01c0], %f16
3778 .word 0xa3b444d4 ! 29: FCMPNE32 fcmpne32 %d48, %d20, %r17
3779 .word 0xc19fe0a0 ! 29: LDDFA_I ldda [%r31, 0x00a0], %f0
3780 .word 0xe2dfc028 ! 30: LDXA_R ldxa [%r31, %r8] 0x01, %r17
3781 .word 0xe23fe150 ! 31: STD_I std %r17, [%r31 + 0x0150]
3782 .word 0xc1bfe0a0 ! 32: STDFA_I stda %f0, [0x00a0, %r31]
3783 .word 0xe31fc008 ! 33: LDDF_R ldd [%r31, %r8], %f17
3784 .word 0x24cfc001 ! 33: BRLEZ brlez,a,pt %r31,<label_0xfc001>
3785 rd %tick, %r28
3786#if (MAX_THREADS == 8)
3787 sethi %hi(0x33800), %r27
3788#else
3789 sethi %hi(0x30000), %r27
3790#endif
3791 andn %r28, %r27, %r28
3792 ta T_CHANGE_HPRIV
3793 stxa %r28, [%g0] 0x73
3794 .word 0xa9b484d4 ! 1: FCMPNE32 fcmpne32 %d18, %d20, %r20
3795intvec_10_11:
3796#if (defined SPC || defined CMP1)
3797!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_12) + 24, 16, 16)) -> intp(0,0,13,,,,,1)
3798!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_12)&0xffffffff) + 32, 16, 16)) -> intp(7,0,5,,,,,1)
3799#else
3800 set 0x77d0a20b, %r28
3801#if (MAX_THREADS == 8)
3802 and %r28, 0x7ff, %r28
3803#endif
3804 stxa %r28, [%g0] 0x73
3805#endif
3806intvec_10_12:
3807 .word 0xa3b0c4c5 ! 34: FCMPNE32 fcmpne32 %d34, %d36, %r17
3808 .word 0xc1bfe140 ! 35: STDFA_I stda %f0, [0x0140, %r31]
3809 .word 0x9f803d54 ! 36: SIR sir 0x1d54
3810 .word 0x9f802f75 ! 37: SIR sir 0x0f75
3811 .word 0x9f803ec0 ! 37: SIR sir 0x1ec0
3812memptr_10_14:
3813 set 0x60540000, %r31
3814 rd %tick, %r28
3815#if (MAX_THREADS == 8)
3816 sethi %hi(0x33800), %r27
3817#else
3818 sethi %hi(0x30000), %r27
3819#endif
3820 andn %r28, %r27, %r28
3821 ta T_CHANGE_HPRIV
3822 stxa %r28, [%g0] 0x73
3823intvec_10_15:
3824 .word 0xe1bfe1a0 ! 38: STDFA_I stda %f16, [0x01a0, %r31]
3825 .word 0x858534ad ! 39: WRCCR_I wr %r20, 0x14ad, %ccr
3826 .word 0xa1b444d3 ! 40: FCMPNE32 fcmpne32 %d48, %d50, %r16
3827 .word 0xe19fe0c0 ! 41: LDDFA_I ldda [%r31, 0x00c0], %f16
3828 .word 0xc36c38d6 ! 41: PREFETCH_I prefetch [%r16 + 0xfffff8d6], #one_read
3829 rd %tick, %r28
3830#if (MAX_THREADS == 8)
3831 sethi %hi(0x33800), %r27
3832#else
3833 sethi %hi(0x30000), %r27
3834#endif
3835 andn %r28, %r27, %r28
3836 ta T_CHANGE_HPRIV
3837 stxa %r28, [%g0] 0x73
3838intvec_10_17:
3839 .word 0xe6bfe050 ! 42: STDA_I stda %r19, [%r31 + 0x0050] %asi
3840 .word 0xa7a7c9d2 ! 43: FDIVd fdivd %f62, %f18, %f50
3841 .word 0x9bb484d2 ! 44: FCMPNE32 fcmpne32 %d18, %d18, %r13
3842 .word 0x9f802050 ! 45: SIR sir 0x0050
3843 .word 0x39400001 ! 45: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3844 .word 0xc32fe0f0 ! 46: STXFSR_I st-sfr %f1, [0x00f0, %r31]
3845 .word 0xda3fe1b0 ! 47: STD_I std %r13, [%r31 + 0x01b0]
3846 .word 0xda3fe190 ! 48: STD_I std %r13, [%r31 + 0x0190]
3847 .word 0xdbe7c031 ! 49: CASA_I casa [%r31] 0x 1, %r17, %r13
3848 .word 0x9bb7c4c8 ! 49: FCMPNE32 fcmpne32 %d62, %d8, %r13
3849 .word 0xd7e7c029 ! 50: CASA_I casa [%r31] 0x 1, %r9, %r11
3850 .word 0xc19fe180 ! 51: LDDFA_I ldda [%r31, 0x0180], %f0
3851 .word 0xc1bfe1a0 ! 52: STDFA_I stda %f0, [0x01a0, %r31]
3852 .word 0xd63fe0c0 ! 53: STD_I std %r11, [%r31 + 0x00c0]
3853 .word 0xc1bfe100 ! 53: STDFA_I stda %f0, [0x0100, %r31]
3854memptr_10_21:
3855 set user_data_start, %r31
3856 .word 0xc1bfe080 ! 54: STDFA_I stda %f0, [0x0080, %r31]
3857 .word 0x8582a1c1 ! 55: WRCCR_I wr %r10, 0x01c1, %ccr
3858 .word 0xd71fe1f0 ! 56: LDDF_I ldd [%r31, 0x01f0], %f11
3859 .word 0xe1bfe040 ! 57: STDFA_I stda %f16, [0x0040, %r31]
3860 .word 0x858421b9 ! 57: WRCCR_I wr %r16, 0x01b9, %ccr
3861 .word 0xd73fe180 ! 58: STDF_I std %f11, [0x0180, %r31]
3862 .word 0xc19fe1a0 ! 59: LDDFA_I ldda [%r31, 0x01a0], %f0
3863 .word 0x9f8020f0 ! 60: SIR sir 0x00f0
3864 .word 0x9f802190 ! 61: SIR sir 0x0190
3865 .word 0xc32fe080 ! 61: STXFSR_I st-sfr %f1, [0x0080, %r31]
3866#if (defined SPC || defined CMP1)
3867!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_24) + 32, 16, 16)) -> intp(2,0,24,,,,,1)
3868!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_24)&0xffffffff) + 48, 16, 16)) -> intp(3,0,30,,,,,1)
3869#else
3870 set 0x6106d6e, %r28
3871#if (MAX_THREADS == 8)
3872 and %r28, 0x7ff, %r28
3873#endif
3874 stxa %r28, [%g0] 0x73
3875#endif
3876intvec_10_24:
3877memptr_10_25:
3878 set 0x60540000, %r31
3879#if (defined SPC || defined CMP1)
3880!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_26) + 16, 16, 16)) -> intp(4,0,29,,,,,1)
3881!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_26)&0xffffffff) + 24, 16, 16)) -> intp(7,0,25,,,,,1)
3882#else
3883 set 0x7a0e4c5, %r28
3884#if (MAX_THREADS == 8)
3885 and %r28, 0x7ff, %r28
3886#endif
3887 stxa %r28, [%g0] 0x73
3888#endif
3889 .word 0xc36b2b57 ! 1: PREFETCH_I prefetch [%r12 + 0x0b57], #one_read
3890intvec_10_26:
3891 .word 0x91b484c7 ! 62: FCMPNE32 fcmpne32 %d18, %d38, %r8
3892 .word 0x8584633c ! 63: WRCCR_I wr %r17, 0x033c, %ccr
3893 .word 0x9f802cce ! 64: SIR sir 0x0cce
3894 .word 0x95a449c1 ! 65: FDIVd fdivd %f48, %f32, %f10
3895 .word 0x9f803f04 ! 65: SIR sir 0x1f04
3896memptr_10_28:
3897 set 0x60740000, %r31
3898 .word 0xd0bfe050 ! 66: STDA_I stda %r8, [%r31 + 0x0050] %asi
3899 .word 0x858475cd ! 67: WRCCR_I wr %r17, 0x15cd, %ccr
3900 .word 0xe1bfe1c0 ! 68: STDFA_I stda %f16, [0x01c0, %r31]
3901 .word 0xd097e000 ! 69: LDUHA_I lduha [%r31, + 0x0000] %asi, %r8
3902 .word 0xe19fe000 ! 69: LDDFA_I ldda [%r31, 0x0000], %f16
3903 .word 0xd0dfc034 ! 70: LDXA_R ldxa [%r31, %r20] 0x01, %r8
3904 .word 0xd03fe1c0 ! 71: STD_I std %r8, [%r31 + 0x01c0]
3905 .word 0xc1bfe020 ! 72: STDFA_I stda %f0, [0x0020, %r31]
3906 .word 0xd11fe120 ! 73: LDDF_I ldd [%r31, 0x0120], %f8
3907 .word 0xc1bfe100 ! 73: STDFA_I stda %f0, [0x0100, %r31]
3908memptr_10_31:
3909 set 0x60140000, %r31
3910 .word 0xc19fe1a0 ! 74: LDDFA_I ldda [%r31, 0x01a0], %f0
3911 .word 0x85816953 ! 75: WRCCR_I wr %r5, 0x0953, %ccr
3912 .word 0xd11fe030 ! 76: LDDF_I ldd [%r31, 0x0030], %f8
3913 .word 0xe1bfe0a0 ! 77: STDFA_I stda %f16, [0x00a0, %r31]
3914 .word 0x8582a9bc ! 77: WRCCR_I wr %r10, 0x09bc, %ccr
3915memptr_10_32:
3916 set 0x60540000, %r31
3917 rd %tick, %r28
3918#if (MAX_THREADS == 8)
3919 sethi %hi(0x33800), %r27
3920#else
3921 sethi %hi(0x30000), %r27
3922#endif
3923 andn %r28, %r27, %r28
3924 ta T_CHANGE_HPRIV
3925 stxa %r28, [%g0] 0x73
3926intvec_10_33:
3927 .word 0xd1e7c02d ! 78: CASA_I casa [%r31] 0x 1, %r13, %r8
3928 .word 0x858468fb ! 79: WRCCR_I wr %r17, 0x08fb, %ccr
3929 .word 0x95a509c5 ! 80: FDIVd fdivd %f20, %f36, %f10
3930 .word 0xd4bfe0a0 ! 81: STDA_I stda %r10, [%r31 + 0x00a0] %asi
3931 .word 0x39400001 ! 81: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3932 rd %tick, %r28
3933#if (MAX_THREADS == 8)
3934 sethi %hi(0x33800), %r27
3935#else
3936 sethi %hi(0x30000), %r27
3937#endif
3938 andn %r28, %r27, %r28
3939 ta T_CHANGE_HPRIV
3940 stxa %r28, [%g0] 0x73
3941 .word 0xc36caa6d ! 1: PREFETCH_I prefetch [%r18 + 0x0a6d], #one_read
3942intvec_10_35:
3943 .word 0x9f802feb ! 82: SIR sir 0x0feb
3944 .word 0x39400001 ! 83: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3945 .word 0xd71fe1e0 ! 84: LDDF_I ldd [%r31, 0x01e0], %f11
3946 .word 0x9f8037ad ! 85: SIR sir 0x17ad
3947 .word 0xe51fe1d0 ! 85: LDDF_I ldd [%r31, 0x01d0], %f18
3948 rd %tick, %r28
3949#if (MAX_THREADS == 8)
3950 sethi %hi(0x33800), %r27
3951#else
3952 sethi %hi(0x30000), %r27
3953#endif
3954 andn %r28, %r27, %r28
3955 ta T_CHANGE_HPRIV
3956 stxa %r28, [%g0] 0x73
3957intvec_10_37:
3958memptr_10_38:
3959 set 0x60340000, %r31
3960 .word 0x9f8039a1 ! 86: SIR sir 0x19a1
3961 .word 0x858527bb ! 87: WRCCR_I wr %r20, 0x07bb, %ccr
3962 .word 0xe1bfe160 ! 88: STDFA_I stda %f16, [0x0160, %r31]
3963 .word 0x9bb084c8 ! 89: FCMPNE32 fcmpne32 %d2, %d8, %r13
3964 .word 0xc19fe0e0 ! 89: LDDFA_I ldda [%r31, 0x00e0], %f0
3965#if (defined SPC || defined CMP1)
3966!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_40) + 32, 16, 16)) -> intp(2,0,7,,,,,1)
3967!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_40)&0xffffffff) + 48, 16, 16)) -> intp(6,0,31,,,,,1)
3968#else
3969 set 0xae02251, %r28
3970#if (MAX_THREADS == 8)
3971 and %r28, 0x7ff, %r28
3972#endif
3973 stxa %r28, [%g0] 0x73
3974#endif
3975 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3976intvec_10_40:
3977 .word 0xa1b204d3 ! 90: FCMPNE32 fcmpne32 %d8, %d50, %r16
3978 .word 0xc1bfe040 ! 91: STDFA_I stda %f0, [0x0040, %r31]
3979 .word 0xe0dfc033 ! 92: LDXA_R ldxa [%r31, %r19] 0x01, %r16
3980 .word 0x9f80251e ! 93: SIR sir 0x051e
3981 .word 0xc19fe1a0 ! 93: LDDFA_I ldda [%r31, 0x01a0], %f0
3982memptr_10_41:
3983 set 0x60140000, %r31
3984#if (defined SPC || defined CMP1)
3985!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_42) + 24, 16, 16)) -> intp(5,0,13,,,,,1)
3986!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_42)&0xffffffff) + 16, 16, 16)) -> intp(7,0,2,,,,,1)
3987#else
3988 set 0x35c0fcd0, %r28
3989#if (MAX_THREADS == 8)
3990 and %r28, 0x7ff, %r28
3991#endif
3992 stxa %r28, [%g0] 0x73
3993#endif
3994intvec_10_42:
3995 .word 0xe19fe020 ! 94: LDDFA_I ldda [%r31, 0x0020], %f16
3996 .word 0x858364e2 ! 95: WRCCR_I wr %r13, 0x04e2, %ccr
3997 .word 0xc36d2462 ! 96: PREFETCH_I prefetch [%r20 + 0x0462], #one_read
3998 .word 0xc19fe1c0 ! 97: LDDFA_I ldda [%r31, 0x01c0], %f0
3999 .word 0x9bb2c4d0 ! 97: FCMPNE32 fcmpne32 %d42, %d16, %r13
4000#if (defined SPC || defined CMP1)
4001!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_44) + 24, 16, 16)) -> intp(7,0,30,,,,,1)
4002!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_44)&0xffffffff) + 40, 16, 16)) -> intp(7,0,31,,,,,1)
4003#else
4004 set 0x1d8065eb, %r28
4005#if (MAX_THREADS == 8)
4006 and %r28, 0x7ff, %r28
4007#endif
4008 stxa %r28, [%g0] 0x73
4009#endif
4010 .word 0xa9a049d3 ! 1: FDIVd fdivd %f32, %f50, %f20
4011intvec_10_44:
4012 .word 0xe89fe140 ! 98: LDDA_I ldda [%r31, + 0x0140] %asi, %r20
4013 .word 0xc1bfe180 ! 99: STDFA_I stda %f0, [0x0180, %r31]
4014 .word 0x9f803b27 ! 100: SIR sir 0x1b27
4015 .word 0xe897e0c0 ! 101: LDUHA_I lduha [%r31, + 0x00c0] %asi, %r20
4016 .word 0xa5a409d4 ! 101: FDIVd fdivd %f16, %f20, %f18
4017#if (defined SPC || defined CMP1)
4018!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_46) + 16, 16, 16)) -> intp(2,0,24,,,,,1)
4019!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_46)&0xffffffff) + 56, 16, 16)) -> intp(1,0,17,,,,,1)
4020#else
4021 set 0x4c6054f6, %r28
4022#if (MAX_THREADS == 8)
4023 and %r28, 0x7ff, %r28
4024#endif
4025 stxa %r28, [%g0] 0x73
4026#endif
4027intvec_10_46:
4028 .word 0x39400001 ! 102: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4029 .word 0x95a7c9d0 ! 103: FDIVd fdivd %f62, %f16, %f10
4030 .word 0xc1bfe040 ! 104: STDFA_I stda %f0, [0x0040, %r31]
4031 .word 0x9f803029 ! 105: SIR sir 0x1029
4032 .word 0xc1bfe0c0 ! 105: STDFA_I stda %f0, [0x00c0, %r31]
4033 .word 0xe91fe150 ! 106: LDDF_I ldd [%r31, 0x0150], %f20
4034 .word 0xe19fe0e0 ! 107: LDDFA_I ldda [%r31, 0x00e0], %f16
4035 .word 0xc19fe0c0 ! 108: LDDFA_I ldda [%r31, 0x00c0], %f0
4036 .word 0xe93fe160 ! 109: STDF_I std %f20, [0x0160, %r31]
4037 .word 0xe1bfe020 ! 109: STDFA_I stda %f16, [0x0020, %r31]
4038memptr_10_47:
4039 set 0x60140000, %r31
4040 .word 0xe83fe080 ! 110: STD_I std %r20, [%r31 + 0x0080]
4041 .word 0x8584f1f2 ! 111: WRCCR_I wr %r19, 0x11f2, %ccr
4042 .word 0xe89fe0a0 ! 112: LDDA_I ldda [%r31, + 0x00a0] %asi, %r20
4043 .word 0xe91fe0f0 ! 113: LDDF_I ldd [%r31, 0x00f0], %f20
4044 .word 0x85827f8b ! 113: WRCCR_I wr %r9, 0x1f8b, %ccr
4045 rd %tick, %r28
4046#if (MAX_THREADS == 8)
4047 sethi %hi(0x33800), %r27
4048#else
4049 sethi %hi(0x30000), %r27
4050#endif
4051 andn %r28, %r27, %r28
4052 ta T_CHANGE_HPRIV
4053 stxa %r28, [%g0] 0x73
4054intvec_10_49:
4055 .word 0xe19fe060 ! 114: LDDFA_I ldda [%r31, 0x0060], %f16
4056 .word 0xa9b7c4d0 ! 115: FCMPNE32 fcmpne32 %d62, %d16, %r20
4057 .word 0x39400001 ! 116: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4058 .word 0xe1bfe100 ! 117: STDFA_I stda %f16, [0x0100, %r31]
4059 .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4060#if (defined SPC || defined CMP1)
4061!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_50) + 32, 16, 16)) -> intp(3,0,14,,,,,1)
4062!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_50)&0xffffffff) + 24, 16, 16)) -> intp(5,0,27,,,,,1)
4063#else
4064 set 0x5400710c, %r28
4065#if (MAX_THREADS == 8)
4066 and %r28, 0x7ff, %r28
4067#endif
4068 stxa %r28, [%g0] 0x73
4069#endif
4070intvec_10_50:
4071 .word 0xc369f40c ! 118: PREFETCH_I prefetch [%r7 + 0xfffff40c], #one_read
4072 .word 0xc1bfe060 ! 119: STDFA_I stda %f0, [0x0060, %r31]
4073 .word 0xe23fe190 ! 120: STD_I std %r17, [%r31 + 0x0190]
4074 .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4075 .word 0xe49fe030 ! 121: LDDA_I ldda [%r31, + 0x0030] %asi, %r18
4076memptr_10_52:
4077 set 0x60140000, %r31
4078 .word 0xc32fe070 ! 122: STXFSR_I st-sfr %f1, [0x0070, %r31]
4079 .word 0x858238da ! 123: WRCCR_I wr %r8, 0x18da, %ccr
4080 .word 0xc19fe160 ! 124: LDDFA_I ldda [%r31, 0x0160], %f0
4081 .word 0xe51fe090 ! 125: LDDF_I ldd [%r31, 0x0090], %f18
4082 .word 0xe1bfe0a0 ! 125: STDFA_I stda %f16, [0x00a0, %r31]
4083 rd %tick, %r28
4084#if (MAX_THREADS == 8)
4085 sethi %hi(0x33800), %r27
4086#else
4087 sethi %hi(0x30000), %r27
4088#endif
4089 andn %r28, %r27, %r28
4090 ta T_CHANGE_HPRIV
4091 stxa %r28, [%g0] 0x73
4092intvec_10_53:
4093 .word 0x39400001 ! 126: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4094 .word 0x91b7c4cc ! 127: FCMPNE32 fcmpne32 %d62, %d12, %r8
4095 .word 0xc19fe020 ! 128: LDDFA_I ldda [%r31, 0x0020], %f0
4096 .word 0x99a509c8 ! 129: FDIVd fdivd %f20, %f8, %f12
4097 .word 0xe19fe0c0 ! 129: LDDFA_I ldda [%r31, 0x00c0], %f16
4098memptr_10_55:
4099 set 0x60340000, %r31
4100 .word 0xe19fe0a0 ! 130: LDDFA_I ldda [%r31, 0x00a0], %f16
4101 .word 0x858372a6 ! 131: WRCCR_I wr %r13, 0x12a6, %ccr
4102 .word 0xe1bfe000 ! 132: STDFA_I stda %f16, [0x0000, %r31]
4103 .word 0xc19fe000 ! 133: LDDFA_I ldda [%r31, 0x0000], %f0
4104 .word 0xc1bfe120 ! 133: STDFA_I stda %f0, [0x0120, %r31]
4105memptr_10_57:
4106 set user_data_start, %r31
4107 .word 0xe697e010 ! 134: LDUHA_I lduha [%r31, + 0x0010] %asi, %r19
4108 .word 0x8581e91e ! 135: WRCCR_I wr %r7, 0x091e, %ccr
4109 .word 0xc1bfe040 ! 136: STDFA_I stda %f0, [0x0040, %r31]
4110 .word 0xe71fc00a ! 137: LDDF_R ldd [%r31, %r10], %f19
4111 .word 0x858472a1 ! 137: WRCCR_I wr %r17, 0x12a1, %ccr
4112 rd %tick, %r28
4113#if (MAX_THREADS == 8)
4114 sethi %hi(0x33800), %r27
4115#else
4116 sethi %hi(0x30000), %r27
4117#endif
4118 andn %r28, %r27, %r28
4119 ta T_CHANGE_HPRIV
4120 stxa %r28, [%g0] 0x73
4121intvec_10_59:
4122#if (defined SPC || defined CMP1)
4123!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_60) + 0, 16, 16)) -> intp(3,0,31,,,,,1)
4124!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_60)&0xffffffff) + 40, 16, 16)) -> intp(1,0,31,,,,,1)
4125#else
4126 set 0x5e901d03, %r28
4127#if (MAX_THREADS == 8)
4128 and %r28, 0x7ff, %r28
4129#endif
4130 stxa %r28, [%g0] 0x73
4131#endif
4132intvec_10_60:
4133 .word 0x9f802c06 ! 138: SIR sir 0x0c06
4134 .word 0xc36fe150 ! 139: PREFETCH_I prefetch [%r31 + 0x0150], #one_read
4135 .word 0xa3a489c7 ! 140: FDIVd fdivd %f18, %f38, %f48
4136 .word 0xc369fd0f ! 141: PREFETCH_I prefetch [%r7 + 0xfffffd0f], #one_read
4137 .word 0xa9b7c4c9 ! 141: FCMPNE32 fcmpne32 %d62, %d40, %r20
4138 .word 0x9f802070 ! 142: SIR sir 0x0070
4139 .word 0xa9a7c9cd ! 143: FDIVd fdivd %f62, %f44, %f20
4140 .word 0xe1bfe160 ! 144: STDFA_I stda %f16, [0x0160, %r31]
4141 .word 0xe91fc00d ! 145: LDDF_R ldd [%r31, %r13], %f20
4142 .word 0xe83fe1b0 ! 145: STD_I std %r20, [%r31 + 0x01b0]
4143#if (defined SPC || defined CMP1)
4144!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_62) + 16, 16, 16)) -> intp(0,0,7,,,,,1)
4145!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_62)&0xffffffff) + 0, 16, 16)) -> intp(7,0,11,,,,,1)
4146#else
4147 set 0xe140946d, %r28
4148#if (MAX_THREADS == 8)
4149 and %r28, 0x7ff, %r28
4150#endif
4151 stxa %r28, [%g0] 0x73
4152#endif
4153 .word 0x97a449cc ! 1: FDIVd fdivd %f48, %f12, %f42
4154intvec_10_62:
4155 rd %tick, %r28
4156#if (MAX_THREADS == 8)
4157 sethi %hi(0x33800), %r27
4158#else
4159 sethi %hi(0x30000), %r27
4160#endif
4161 andn %r28, %r27, %r28
4162 ta T_CHANGE_HPRIV
4163 stxa %r28, [%g0] 0x73
4164 .word 0x9f802d86 ! 1: SIR sir 0x0d86
4165intvec_10_63:
4166 .word 0xa1b504c7 ! 146: FCMPNE32 fcmpne32 %d20, %d38, %r16
4167 .word 0xe1bfe020 ! 147: STDFA_I stda %f16, [0x0020, %r31]
4168 .word 0x9ba1c9d2 ! 148: FDIVd fdivd %f38, %f18, %f44
4169 .word 0x39400001 ! 149: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4170 .word 0xe1bfe1a0 ! 149: STDFA_I stda %f16, [0x01a0, %r31]
4171 .word 0xc1bfe040 ! 150: STDFA_I stda %f0, [0x0040, %r31]
4172 .word 0xd23fe1e0 ! 151: STD_I std %r9, [%r31 + 0x01e0]
4173 .word 0xd31fc014 ! 152: LDDF_R ldd [%r31, %r20], %f9
4174 .word 0xe1bfe160 ! 153: STDFA_I stda %f16, [0x0160, %r31]
4175 .word 0xd2dfc033 ! 153: LDXA_R ldxa [%r31, %r19] 0x01, %r9
4176 .word 0xe19fe040 ! 154: LDDFA_I ldda [%r31, 0x0040], %f16
4177 .word 0xe19fe060 ! 155: LDDFA_I ldda [%r31, 0x0060], %f16
4178 .word 0xc1bfe080 ! 156: STDFA_I stda %f0, [0x0080, %r31]
4179 .word 0xc19fe140 ! 157: LDDFA_I ldda [%r31, 0x0140], %f0
4180 .word 0xe19fe140 ! 157: LDDFA_I ldda [%r31, 0x0140], %f16
4181 .word 0xc1bfe1a0 ! 158: STDFA_I stda %f0, [0x01a0, %r31]
4182 .word 0xc36fe0b0 ! 159: PREFETCH_I prefetch [%r31 + 0x00b0], #one_read
4183 .word 0xd297e1f0 ! 160: LDUHA_I lduha [%r31, + 0x01f0] %asi, %r9
4184 .word 0xe19fe020 ! 161: LDDFA_I ldda [%r31, 0x0020], %f16
4185 .word 0xd2dfc033 ! 161: LDXA_R ldxa [%r31, %r19] 0x01, %r9
4186#if (defined SPC || defined CMP1)
4187!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_68) + 48, 16, 16)) -> intp(5,0,25,,,,,1)
4188!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_68)&0xffffffff) + 56, 16, 16)) -> intp(1,0,9,,,,,1)
4189#else
4190 set 0x3250db9a, %r28
4191#if (MAX_THREADS == 8)
4192 and %r28, 0x7ff, %r28
4193#endif
4194 stxa %r28, [%g0] 0x73
4195#endif
4196 .word 0x93a489d1 ! 1: FDIVd fdivd %f18, %f48, %f40
4197intvec_10_68:
4198 .word 0x93a449d0 ! 162: FDIVd fdivd %f48, %f16, %f40
4199 .word 0xc1bfe100 ! 163: STDFA_I stda %f0, [0x0100, %r31]
4200 .word 0xc1bfe1c0 ! 164: STDFA_I stda %f0, [0x01c0, %r31]
4201 .word 0x9f80300f ! 165: SIR sir 0x100f
4202 .word 0xe1bfe0c0 ! 165: STDFA_I stda %f16, [0x00c0, %r31]
4203#if (defined SPC || defined CMP1)
4204!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_70) + 32, 16, 16)) -> intp(0,0,23,,,,,1)
4205!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_70)&0xffffffff) + 8, 16, 16)) -> intp(4,0,5,,,,,1)
4206#else
4207 set 0x60e0e1a7, %r28
4208#if (MAX_THREADS == 8)
4209 and %r28, 0x7ff, %r28
4210#endif
4211 stxa %r28, [%g0] 0x73
4212#endif
4213 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4214intvec_10_70:
4215 .word 0xd0dfc02b ! 166: LDXA_R ldxa [%r31, %r11] 0x01, %r8
4216 .word 0xe19fe020 ! 167: LDDFA_I ldda [%r31, 0x0020], %f16
4217 .word 0x9f802496 ! 168: SIR sir 0x0496
4218 .word 0xe11fc012 ! 169: LDDF_R ldd [%r31, %r18], %f16
4219 .word 0xe1bfe1c0 ! 169: STDFA_I stda %f16, [0x01c0, %r31]
4220 .word 0xa1a7c971 ! 1: FMULq dis not found
4221
4222memptr_10_72:
4223 set user_data_start, %r31
4224 rd %tick, %r28
4225#if (MAX_THREADS == 8)
4226 sethi %hi(0x33800), %r27
4227#else
4228 sethi %hi(0x30000), %r27
4229#endif
4230 andn %r28, %r27, %r28
4231 ta T_CHANGE_HPRIV
4232 stxa %r28, [%g0] 0x73
4233intvec_10_73:
4234 .word 0xe19fe180 ! 170: LDDFA_I ldda [%r31, 0x0180], %f16
4235 .word 0x85826128 ! 171: WRCCR_I wr %r9, 0x0128, %ccr
4236 .word 0xc36cad90 ! 172: PREFETCH_I prefetch [%r18 + 0x0d90], #one_read
4237 .word 0xc19fe100 ! 173: LDDFA_I ldda [%r31, 0x0100], %f0
4238 .word 0xc36ceda2 ! 173: PREFETCH_I prefetch [%r19 + 0x0da2], #one_read
4239memptr_10_75:
4240 set user_data_start, %r31
4241#if (defined SPC || defined CMP1)
4242!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_76) + 8, 16, 16)) -> intp(5,0,6,,,,,1)
4243!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_76)&0xffffffff) + 16, 16, 16)) -> intp(0,0,27,,,,,1)
4244#else
4245 set 0x36a0a412, %r28
4246#if (MAX_THREADS == 8)
4247 and %r28, 0x7ff, %r28
4248#endif
4249 stxa %r28, [%g0] 0x73
4250#endif
4251 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4252intvec_10_76:
4253 .word 0xe63fe160 ! 174: STD_I std %r19, [%r31 + 0x0160]
4254 .word 0x858360ce ! 175: WRCCR_I wr %r13, 0x00ce, %ccr
4255 .word 0x9bb404c1 ! 176: FCMPNE32 fcmpne32 %d16, %d32, %r13
4256 .word 0xdb1fe060 ! 177: LDDF_I ldd [%r31, 0x0060], %f13
4257 .word 0x93a089cd ! 177: FDIVd fdivd %f2, %f44, %f40
4258memptr_10_77:
4259 set 0x60140000, %r31
4260 .word 0xd297e190 ! 178: LDUHA_I lduha [%r31, + 0x0190] %asi, %r9
4261 .word 0x8584fdc8 ! 179: WRCCR_I wr %r19, 0x1dc8, %ccr
4262 .word 0xc32fe100 ! 180: STXFSR_I st-sfr %f1, [0x0100, %r31]
4263 .word 0xd31fe190 ! 181: LDDF_I ldd [%r31, 0x0190], %f9
4264 .word 0x8582a077 ! 181: WRCCR_I wr %r10, 0x0077, %ccr
4265 .word 0xd31fc013 ! 182: LDDF_R ldd [%r31, %r19], %f9
4266 .word 0x87afca52 ! 183: FCMPd fcmpd %fcc<n>, %f62, %f18
4267 .word 0xd33fe1c0 ! 184: STDF_I std %f9, [0x01c0, %r31]
4268 .word 0xd297e110 ! 185: LDUHA_I lduha [%r31, + 0x0110] %asi, %r9
4269 .word 0x24cfc001 ! 185: BRLEZ brlez,a,pt %r31,<label_0xfc001>
4270#if (defined SPC || defined CMP1)
4271!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_80) + 0, 16, 16)) -> intp(2,0,13,,,,,1)
4272!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_80)&0xffffffff) + 32, 16, 16)) -> intp(6,0,5,,,,,1)
4273#else
4274 set 0xb10a375, %r28
4275#if (MAX_THREADS == 8)
4276 and %r28, 0x7ff, %r28
4277#endif
4278 stxa %r28, [%g0] 0x73
4279#endif
4280 .word 0xa7a449d0 ! 1: FDIVd fdivd %f48, %f16, %f50
4281intvec_10_80:
4282 rd %tick, %r28
4283#if (MAX_THREADS == 8)
4284 sethi %hi(0x33800), %r27
4285#else
4286 sethi %hi(0x30000), %r27
4287#endif
4288 andn %r28, %r27, %r28
4289 ta T_CHANGE_HPRIV
4290 stxa %r28, [%g0] 0x73
4291intvec_10_81:
4292 .word 0x39400001 ! 186: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4293 .word 0x24cfc001 ! 187: BRLEZ brlez,a,pt %r31,<label_0xfc001>
4294 .word 0xc36c6d0d ! 188: PREFETCH_I prefetch [%r17 + 0x0d0d], #one_read
4295 .word 0x99b404cd ! 189: FCMPNE32 fcmpne32 %d16, %d44, %r12
4296 .word 0x87afca48 ! 189: FCMPd fcmpd %fcc<n>, %f62, %f8
4297 rd %tick, %r28
4298#if (MAX_THREADS == 8)
4299 sethi %hi(0x33800), %r27
4300#else
4301 sethi %hi(0x30000), %r27
4302#endif
4303 andn %r28, %r27, %r28
4304 ta T_CHANGE_HPRIV
4305 stxa %r28, [%g0] 0x73
4306 .word 0x9f803682 ! 1: SIR sir 0x1682
4307intvec_10_83:
4308 .word 0x9f80226a ! 190: SIR sir 0x026a
4309 .word 0xc1bfe080 ! 191: STDFA_I stda %f0, [0x0080, %r31]
4310 .word 0xc19fe160 ! 192: LDDFA_I ldda [%r31, 0x0160], %f0
4311 .word 0x93b284c3 ! 193: FCMPNE32 fcmpne32 %d10, %d34, %r9
4312 .word 0xe1bfe1a0 ! 193: STDFA_I stda %f16, [0x01a0, %r31]
4313memptr_10_85:
4314 set 0x60540000, %r31
4315 .word 0xd31fe1a0 ! 194: LDDF_I ldd [%r31, 0x01a0], %f9
4316 .word 0x8582f489 ! 195: WRCCR_I wr %r11, 0x1489, %ccr
4317 .word 0xd33fe020 ! 196: STDF_I std %f9, [0x0020, %r31]
4318 .word 0xd31fc014 ! 197: LDDF_R ldd [%r31, %r20], %f9
4319 .word 0x8581387e ! 197: WRCCR_I wr %r4, 0x187e, %ccr
4320 .word 0xe1bfe000 ! 198: STDFA_I stda %f16, [0x0000, %r31]
4321 .word 0x39400001 ! 199: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4322 .word 0xd2dfc028 ! 200: LDXA_R ldxa [%r31, %r8] 0x01, %r9
4323 .word 0xc1bfe100 ! 201: STDFA_I stda %f0, [0x0100, %r31]
4324 .word 0xd3e7c034 ! 201: CASA_I casa [%r31] 0x 1, %r20, %r9
4325.text
4326 setx join_lbl_0_0, %g1, %g2
4327 jmp %g2
4328 nop
4329fork_lbl_0_4:
4330 rd %tick, %r28
4331#if (MAX_THREADS == 8)
4332 sethi %hi(0x33800), %r27
4333#else
4334 sethi %hi(0x30000), %r27
4335#endif
4336 andn %r28, %r27, %r28
4337 ta T_CHANGE_HPRIV
4338 stxa %r28, [%g0] 0x73
4339intvec_8_1:
4340#if (defined SPC || defined CMP1)
4341!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_2) + 32, 16, 16)) -> intp(6,0,31,,,,,1)
4342!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_2)&0xffffffff) + 16, 16, 16)) -> intp(5,0,26,,,,,1)
4343#else
4344 set 0x26c0c46a, %r28
4345#if (MAX_THREADS == 8)
4346 and %r28, 0x7ff, %r28
4347#endif
4348 stxa %r28, [%g0] 0x73
4349#endif
4350intvec_8_2:
4351 .word 0xc36a288a ! 2: PREFETCH_I prefetch [%r8 + 0x088a], #one_read
4352 .word 0x87afca53 ! 3: FCMPd fcmpd %fcc<n>, %f62, %f50
4353 .word 0xc3686ec5 ! 4: PREFETCH_I prefetch [%r1 + 0x0ec5], #one_read
4354 .word 0x39400001 ! 5: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4355 .word 0xc36fe0f0 ! 5: PREFETCH_I prefetch [%r31 + 0x00f0], #one_read
4356 .word 0xc1bfe120 ! 6: STDFA_I stda %f0, [0x0120, %r31]
4357 .word 0xd7e7c033 ! 7: CASA_I casa [%r31] 0x 1, %r19, %r11
4358 .word 0xc19fe160 ! 8: LDDFA_I ldda [%r31, 0x0160], %f0
4359 .word 0xc1bfe1e0 ! 9: STDFA_I stda %f0, [0x01e0, %r31]
4360 .word 0x87afca49 ! 9: FCMPd fcmpd %fcc<n>, %f62, %f40
4361 .word 0xd0dfc02d ! 10: LDXA_R ldxa [%r31, %r13] 0x01, %r8
4362 .word 0xe1bfe0a0 ! 11: STDFA_I stda %f16, [0x00a0, %r31]
4363 .word 0xe1bfe160 ! 12: STDFA_I stda %f16, [0x0160, %r31]
4364 .word 0xd1e7c02c ! 13: CASA_I casa [%r31] 0x 1, %r12, %r8
4365 .word 0xc1bfe020 ! 13: STDFA_I stda %f0, [0x0020, %r31]
4366memptr_8_3:
4367 set user_data_start, %r31
4368 .word 0xe19fe060 ! 14: LDDFA_I ldda [%r31, 0x0060], %f16
4369 .word 0x858428f1 ! 15: WRCCR_I wr %r16, 0x08f1, %ccr
4370 .word 0xe19fe060 ! 16: LDDFA_I ldda [%r31, 0x0060], %f16
4371 .word 0xe19fe100 ! 17: LDDFA_I ldda [%r31, 0x0100], %f16
4372 .word 0xe1bfe0e0 ! 17: STDFA_I stda %f16, [0x00e0, %r31]
4373memptr_8_4:
4374 set 0x60740000, %r31
4375 rd %tick, %r28
4376#if (MAX_THREADS == 8)
4377 sethi %hi(0x33800), %r27
4378#else
4379 sethi %hi(0x30000), %r27
4380#endif
4381 andn %r28, %r27, %r28
4382 ta T_CHANGE_HPRIV
4383 stxa %r28, [%g0] 0x73
4384intvec_8_5:
4385 .word 0xd09fe020 ! 18: LDDA_I ldda [%r31, + 0x0020] %asi, %r8
4386 .word 0x85827aae ! 19: WRCCR_I wr %r9, 0x1aae, %ccr
4387 .word 0xa3a449d4 ! 20: FDIVd fdivd %f48, %f20, %f48
4388 .word 0xe2dfc034 ! 21: LDXA_R ldxa [%r31, %r20] 0x01, %r17
4389 .word 0x8584771d ! 21: WRCCR_I wr %r17, 0x171d, %ccr
4390memptr_8_6:
4391 set user_data_start, %r31
4392 .word 0xc19fe060 ! 22: LDDFA_I ldda [%r31, 0x0060], %f0
4393 .word 0x85807aa8 ! 23: WRCCR_I wr %r1, 0x1aa8, %ccr
4394 .word 0xe31fc00b ! 24: LDDF_R ldd [%r31, %r11], %f17
4395 .word 0xc1bfe140 ! 25: STDFA_I stda %f0, [0x0140, %r31]
4396 .word 0xe2dfc033 ! 25: LDXA_R ldxa [%r31, %r19] 0x01, %r17
4397#if (defined SPC || defined CMP1)
4398!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_8) + 56, 16, 16)) -> intp(2,0,21,,,,,1)
4399!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_8)&0xffffffff) + 16, 16, 16)) -> intp(4,0,16,,,,,1)
4400#else
4401 set 0xf0603ce8, %r28
4402#if (MAX_THREADS == 8)
4403 and %r28, 0x7ff, %r28
4404#endif
4405 stxa %r28, [%g0] 0x73
4406#endif
4407 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4408intvec_8_8:
4409 .word 0x9f802673 ! 26: SIR sir 0x0673
4410 .word 0x39400001 ! 27: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4411 .word 0xc19fe0c0 ! 28: LDDFA_I ldda [%r31, 0x00c0], %f0
4412 .word 0xc368ecbd ! 29: PREFETCH_I prefetch [%r3 + 0x0cbd], #one_read
4413 .word 0xe19fe140 ! 29: LDDFA_I ldda [%r31, 0x0140], %f16
4414 .word 0xe29fe030 ! 30: LDDA_I ldda [%r31, + 0x0030] %asi, %r17
4415 .word 0xe3e7c02c ! 31: CASA_I casa [%r31] 0x 1, %r12, %r17
4416 .word 0xc19fe1e0 ! 32: LDDFA_I ldda [%r31, 0x01e0], %f0
4417 .word 0xc32fe120 ! 33: STXFSR_I st-sfr %f1, [0x0120, %r31]
4418 .word 0xe3e7c030 ! 33: CASA_I casa [%r31] 0x 1, %r16, %r17
4419 rd %tick, %r28
4420#if (MAX_THREADS == 8)
4421 sethi %hi(0x33800), %r27
4422#else
4423 sethi %hi(0x30000), %r27
4424#endif
4425 andn %r28, %r27, %r28
4426 ta T_CHANGE_HPRIV
4427 stxa %r28, [%g0] 0x73
4428 .word 0xc36b3f02 ! 1: PREFETCH_I prefetch [%r12 + 0xffffff02], #one_read
4429intvec_8_11:
4430#if (defined SPC || defined CMP1)
4431!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_12) + 0, 16, 16)) -> intp(5,0,31,,,,,1)
4432!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_12)&0xffffffff) + 16, 16, 16)) -> intp(2,0,30,,,,,1)
4433#else
4434 set 0x2d3027b7, %r28
4435#if (MAX_THREADS == 8)
4436 and %r28, 0x7ff, %r28
4437#endif
4438 stxa %r28, [%g0] 0x73
4439#endif
4440intvec_8_12:
4441 .word 0xc36cad2d ! 34: PREFETCH_I prefetch [%r18 + 0x0d2d], #one_read
4442 .word 0xe19fe100 ! 35: LDDFA_I ldda [%r31, 0x0100], %f16
4443 .word 0xc36c2262 ! 36: PREFETCH_I prefetch [%r16 + 0x0262], #one_read
4444 .word 0x95a1c9c3 ! 37: FDIVd fdivd %f38, %f34, %f10
4445 .word 0x95a249d2 ! 37: FDIVd fdivd %f40, %f18, %f10
4446memptr_8_14:
4447 set 0x60140000, %r31
4448 rd %tick, %r28
4449#if (MAX_THREADS == 8)
4450 sethi %hi(0x33800), %r27
4451#else
4452 sethi %hi(0x30000), %r27
4453#endif
4454 andn %r28, %r27, %r28
4455 ta T_CHANGE_HPRIV
4456 stxa %r28, [%g0] 0x73
4457intvec_8_15:
4458 .word 0xc19fe160 ! 38: LDDFA_I ldda [%r31, 0x0160], %f0
4459 .word 0x85852266 ! 39: WRCCR_I wr %r20, 0x0266, %ccr
4460 .word 0xa7a449c1 ! 40: FDIVd fdivd %f48, %f32, %f50
4461 .word 0xc1bfe060 ! 41: STDFA_I stda %f0, [0x0060, %r31]
4462 .word 0xc36ae08e ! 41: PREFETCH_I prefetch [%r11 + 0x008e], #one_read
4463 rd %tick, %r28
4464#if (MAX_THREADS == 8)
4465 sethi %hi(0x33800), %r27
4466#else
4467 sethi %hi(0x30000), %r27
4468#endif
4469 andn %r28, %r27, %r28
4470 ta T_CHANGE_HPRIV
4471 stxa %r28, [%g0] 0x73
4472intvec_8_17:
4473 .word 0xe71fe1f0 ! 42: LDDF_I ldd [%r31, 0x01f0], %f19
4474 .word 0xa7a7c9d3 ! 43: FDIVd fdivd %f62, %f50, %f50
4475 .word 0x39400001 ! 44: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4476 .word 0xdb1fe010 ! 45: LDDF_I ldd [%r31, 0x0010], %f13
4477 .word 0xdbe7c033 ! 45: CASA_I casa [%r31] 0x 1, %r19, %r13
4478 .word 0xdabfe000 ! 46: STDA_I stda %r13, [%r31 + 0x0000] %asi
4479 .word 0x24cfc001 ! 47: BRLEZ brlez,a,pt %r31,<label_0xfc001>
4480 .word 0xdbe7c030 ! 48: CASA_I casa [%r31] 0x 1, %r16, %r13
4481 .word 0xda9fe070 ! 49: LDDA_I ldda [%r31, + 0x0070] %asi, %r13
4482 .word 0xdbe7c031 ! 49: CASA_I casa [%r31] 0x 1, %r17, %r13
4483 .word 0xc32fe0e0 ! 50: STXFSR_I st-sfr %f1, [0x00e0, %r31]
4484 .word 0xc19fe040 ! 51: LDDFA_I ldda [%r31, 0x0040], %f0
4485 .word 0xe19fe000 ! 52: LDDFA_I ldda [%r31, 0x0000], %f16
4486 .word 0xd6dfc034 ! 53: LDXA_R ldxa [%r31, %r20] 0x01, %r11
4487 .word 0xc1bfe080 ! 53: STDFA_I stda %f0, [0x0080, %r31]
4488memptr_8_21:
4489 set user_data_start, %r31
4490 .word 0xc19fe160 ! 54: LDDFA_I ldda [%r31, 0x0160], %f0
4491 .word 0x85843a6e ! 55: WRCCR_I wr %r16, 0x1a6e, %ccr
4492 .word 0xd71fe1a0 ! 56: LDDF_I ldd [%r31, 0x01a0], %f11
4493 .word 0xe1bfe060 ! 57: STDFA_I stda %f16, [0x0060, %r31]
4494 .word 0x85853967 ! 57: WRCCR_I wr %r20, 0x1967, %ccr
4495 .word 0xd6bfe1f0 ! 58: STDA_I stda %r11, [%r31 + 0x01f0] %asi
4496 .word 0xc1bfe0c0 ! 59: STDFA_I stda %f0, [0x00c0, %r31]
4497 .word 0xd73fe1b0 ! 60: STDF_I std %f11, [0x01b0, %r31]
4498 .word 0xd6dfc031 ! 61: LDXA_R ldxa [%r31, %r17] 0x01, %r11
4499 .word 0x9f8020c0 ! 61: SIR sir 0x00c0
4500#if (defined SPC || defined CMP1)
4501!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_24) + 32, 16, 16)) -> intp(3,0,13,,,,,1)
4502!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_24)&0xffffffff) + 48, 16, 16)) -> intp(0,0,2,,,,,1)
4503#else
4504 set 0x6dc040db, %r28
4505#if (MAX_THREADS == 8)
4506 and %r28, 0x7ff, %r28
4507#endif
4508 stxa %r28, [%g0] 0x73
4509#endif
4510intvec_8_24:
4511memptr_8_25:
4512 set 0x60340000, %r31
4513#if (defined SPC || defined CMP1)
4514!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_26) + 16, 16, 16)) -> intp(3,0,18,,,,,1)
4515!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_26)&0xffffffff) + 56, 16, 16)) -> intp(5,0,6,,,,,1)
4516#else
4517 set 0xf24086f6, %r28
4518#if (MAX_THREADS == 8)
4519 and %r28, 0x7ff, %r28
4520#endif
4521 stxa %r28, [%g0] 0x73
4522#endif
4523 .word 0x9f80281f ! 1: SIR sir 0x081f
4524intvec_8_26:
4525 .word 0x9f803aca ! 62: SIR sir 0x1aca
4526 .word 0x85847a3e ! 63: WRCCR_I wr %r17, 0x1a3e, %ccr
4527 .word 0x9f80332f ! 64: SIR sir 0x132f
4528 .word 0x91b404cd ! 65: FCMPNE32 fcmpne32 %d16, %d44, %r8
4529 .word 0xc36c785b ! 65: PREFETCH_I prefetch [%r17 + 0xfffff85b], #one_read
4530memptr_8_28:
4531 set 0x60540000, %r31
4532 .word 0xd13fe060 ! 66: STDF_I std %f8, [0x0060, %r31]
4533 .word 0x8581a26a ! 67: WRCCR_I wr %r6, 0x026a, %ccr
4534 .word 0xe19fe1a0 ! 68: LDDFA_I ldda [%r31, 0x01a0], %f16
4535 .word 0xd11fc012 ! 69: LDDF_R ldd [%r31, %r18], %f8
4536 .word 0xc19fe160 ! 69: LDDFA_I ldda [%r31, 0x0160], %f0
4537 .word 0x9f8020f0 ! 70: SIR sir 0x00f0
4538 .word 0x87afca48 ! 71: FCMPd fcmpd %fcc<n>, %f62, %f8
4539 .word 0xc19fe040 ! 72: LDDFA_I ldda [%r31, 0x0040], %f0
4540 .word 0xd097e130 ! 73: LDUHA_I lduha [%r31, + 0x0130] %asi, %r8
4541 .word 0xe1bfe180 ! 73: STDFA_I stda %f16, [0x0180, %r31]
4542memptr_8_31:
4543 set 0x60740000, %r31
4544 .word 0xc19fe120 ! 74: LDDFA_I ldda [%r31, 0x0120], %f0
4545 .word 0x8581abe5 ! 75: WRCCR_I wr %r6, 0x0be5, %ccr
4546 .word 0xd09fe170 ! 76: LDDA_I ldda [%r31, + 0x0170] %asi, %r8
4547 .word 0xe1bfe060 ! 77: STDFA_I stda %f16, [0x0060, %r31]
4548 .word 0x8584a989 ! 77: WRCCR_I wr %r18, 0x0989, %ccr
4549memptr_8_32:
4550 set 0x60540000, %r31
4551 rd %tick, %r28
4552#if (MAX_THREADS == 8)
4553 sethi %hi(0x33800), %r27
4554#else
4555 sethi %hi(0x30000), %r27
4556#endif
4557 andn %r28, %r27, %r28
4558 ta T_CHANGE_HPRIV
4559 stxa %r28, [%g0] 0x73
4560intvec_8_33:
4561 .word 0xd11fe0e0 ! 78: LDDF_I ldd [%r31, 0x00e0], %f8
4562 .word 0x8584af93 ! 79: WRCCR_I wr %r18, 0x0f93, %ccr
4563 .word 0x9f803127 ! 80: SIR sir 0x1127
4564 .word 0xd5e7c02a ! 81: CASA_I casa [%r31] 0x 1, %r10, %r10
4565 .word 0x91b484c4 ! 81: FCMPNE32 fcmpne32 %d18, %d4, %r8
4566 rd %tick, %r28
4567#if (MAX_THREADS == 8)
4568 sethi %hi(0x33800), %r27
4569#else
4570 sethi %hi(0x30000), %r27
4571#endif
4572 andn %r28, %r27, %r28
4573 ta T_CHANGE_HPRIV
4574 stxa %r28, [%g0] 0x73
4575 .word 0xc36ae453 ! 1: PREFETCH_I prefetch [%r11 + 0x0453], #one_read
4576intvec_8_35:
4577 .word 0x97a149d4 ! 82: FDIVd fdivd %f36, %f20, %f42
4578 .word 0x39400001 ! 83: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4579 .word 0xd7e7c030 ! 84: CASA_I casa [%r31] 0x 1, %r16, %r11
4580 .word 0x39400001 ! 85: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4581 .word 0xc32fe040 ! 85: STXFSR_I st-sfr %f1, [0x0040, %r31]
4582 rd %tick, %r28
4583#if (MAX_THREADS == 8)
4584 sethi %hi(0x33800), %r27
4585#else
4586 sethi %hi(0x30000), %r27
4587#endif
4588 andn %r28, %r27, %r28
4589 ta T_CHANGE_HPRIV
4590 stxa %r28, [%g0] 0x73
4591intvec_8_37:
4592memptr_8_38:
4593 set 0x60140000, %r31
4594 .word 0x97a489c7 ! 86: FDIVd fdivd %f18, %f38, %f42
4595 .word 0x858532c1 ! 87: WRCCR_I wr %r20, 0x12c1, %ccr
4596 .word 0xc19fe0a0 ! 88: LDDFA_I ldda [%r31, 0x00a0], %f0
4597 .word 0x9f8036cc ! 89: SIR sir 0x16cc
4598 .word 0xe1bfe140 ! 89: STDFA_I stda %f16, [0x0140, %r31]
4599#if (defined SPC || defined CMP1)
4600!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_40) + 16, 16, 16)) -> intp(3,0,16,,,,,1)
4601!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_40)&0xffffffff) + 32, 16, 16)) -> intp(7,0,14,,,,,1)
4602#else
4603 set 0x2b001d41, %r28
4604#if (MAX_THREADS == 8)
4605 and %r28, 0x7ff, %r28
4606#endif
4607 stxa %r28, [%g0] 0x73
4608#endif
4609 .word 0x9ba049d3 ! 1: FDIVd fdivd %f32, %f50, %f44
4610intvec_8_40:
4611 .word 0x39400001 ! 90: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4612 .word 0xe19fe1e0 ! 91: LDDFA_I ldda [%r31, 0x01e0], %f16
4613 .word 0xe0bfe020 ! 92: STDA_I stda %r16, [%r31 + 0x0020] %asi
4614 .word 0x91b104d0 ! 93: FCMPNE32 fcmpne32 %d4, %d16, %r8
4615 .word 0xc1bfe1e0 ! 93: STDFA_I stda %f0, [0x01e0, %r31]
4616memptr_8_41:
4617 set 0x60540000, %r31
4618#if (defined SPC || defined CMP1)
4619!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_42) + 32, 16, 16)) -> intp(4,0,25,,,,,1)
4620!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_42)&0xffffffff) + 16, 16, 16)) -> intp(6,0,5,,,,,1)
4621#else
4622 set 0x88a02dd4, %r28
4623#if (MAX_THREADS == 8)
4624 and %r28, 0x7ff, %r28
4625#endif
4626 stxa %r28, [%g0] 0x73
4627#endif
4628intvec_8_42:
4629 .word 0xc19fe020 ! 94: LDDFA_I ldda [%r31, 0x0020], %f0
4630 .word 0x85847148 ! 95: WRCCR_I wr %r17, 0x1148, %ccr
4631 .word 0x97b504d2 ! 96: FCMPNE32 fcmpne32 %d20, %d18, %r11
4632 .word 0xe1bfe0e0 ! 97: STDFA_I stda %f16, [0x00e0, %r31]
4633 .word 0x9f8035f9 ! 97: SIR sir 0x15f9
4634#if (defined SPC || defined CMP1)
4635!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_44) + 56, 16, 16)) -> intp(5,0,12,,,,,1)
4636!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_44)&0xffffffff) + 0, 16, 16)) -> intp(3,0,16,,,,,1)
4637#else
4638 set 0x7cb00fd5, %r28
4639#if (MAX_THREADS == 8)
4640 and %r28, 0x7ff, %r28
4641#endif
4642 stxa %r28, [%g0] 0x73
4643#endif
4644 .word 0xc36ab6e8 ! 1: PREFETCH_I prefetch [%r10 + 0xfffff6e8], #one_read
4645intvec_8_44:
4646 .word 0xe89fe060 ! 98: LDDA_I ldda [%r31, + 0x0060] %asi, %r20
4647 .word 0xc1bfe140 ! 99: STDFA_I stda %f0, [0x0140, %r31]
4648 .word 0x39400001 ! 100: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4649 .word 0xe91fe130 ! 101: LDDF_I ldd [%r31, 0x0130], %f20
4650 .word 0x39400001 ! 101: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4651#if (defined SPC || defined CMP1)
4652!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_46) + 32, 16, 16)) -> intp(4,0,30,,,,,1)
4653!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_46)&0xffffffff) + 40, 16, 16)) -> intp(2,0,12,,,,,1)
4654#else
4655 set 0xa6a06482, %r28
4656#if (MAX_THREADS == 8)
4657 and %r28, 0x7ff, %r28
4658#endif
4659 stxa %r28, [%g0] 0x73
4660#endif
4661intvec_8_46:
4662 .word 0x95a449c9 ! 102: FDIVd fdivd %f48, %f40, %f10
4663 .word 0x95a7c9ca ! 103: FDIVd fdivd %f62, %f10, %f10
4664 .word 0xc1bfe1a0 ! 104: STDFA_I stda %f0, [0x01a0, %r31]
4665 .word 0xa9b444cd ! 105: FCMPNE32 fcmpne32 %d48, %d44, %r20
4666 .word 0xe19fe0a0 ! 105: LDDFA_I ldda [%r31, 0x00a0], %f16
4667 .word 0xe89fe0f0 ! 106: LDDA_I ldda [%r31, + 0x00f0] %asi, %r20
4668 .word 0xe19fe140 ! 107: LDDFA_I ldda [%r31, 0x0140], %f16
4669 .word 0xc19fe1c0 ! 108: LDDFA_I ldda [%r31, 0x01c0], %f0
4670 .word 0xe91fe0b0 ! 109: LDDF_I ldd [%r31, 0x00b0], %f20
4671 .word 0xe1bfe1e0 ! 109: STDFA_I stda %f16, [0x01e0, %r31]
4672memptr_8_47:
4673 set 0x60340000, %r31
4674 .word 0xe89fe140 ! 110: LDDA_I ldda [%r31, + 0x0140] %asi, %r20
4675 .word 0x8581b063 ! 111: WRCCR_I wr %r6, 0x1063, %ccr
4676 .word 0xe89fe1f0 ! 112: LDDA_I ldda [%r31, + 0x01f0] %asi, %r20
4677 .word 0xe89fe0e0 ! 113: LDDA_I ldda [%r31, + 0x00e0] %asi, %r20
4678 .word 0x85816d64 ! 113: WRCCR_I wr %r5, 0x0d64, %ccr
4679 rd %tick, %r28
4680#if (MAX_THREADS == 8)
4681 sethi %hi(0x33800), %r27
4682#else
4683 sethi %hi(0x30000), %r27
4684#endif
4685 andn %r28, %r27, %r28
4686 ta T_CHANGE_HPRIV
4687 stxa %r28, [%g0] 0x73
4688intvec_8_49:
4689 .word 0xc1bfe180 ! 114: STDFA_I stda %f0, [0x0180, %r31]
4690 .word 0x39400001 ! 115: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4691 .word 0x9f803147 ! 116: SIR sir 0x1147
4692 .word 0xc19fe1c0 ! 117: LDDFA_I ldda [%r31, 0x01c0], %f0
4693 .word 0xc36ce772 ! 117: PREFETCH_I prefetch [%r19 + 0x0772], #one_read
4694#if (defined SPC || defined CMP1)
4695!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_50) + 24, 16, 16)) -> intp(5,0,31,,,,,1)
4696!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_50)&0xffffffff) + 56, 16, 16)) -> intp(1,0,20,,,,,1)
4697#else
4698 set 0xf5b0f3f4, %r28
4699#if (MAX_THREADS == 8)
4700 and %r28, 0x7ff, %r28
4701#endif
4702 stxa %r28, [%g0] 0x73
4703#endif
4704intvec_8_50:
4705 .word 0xa3a4c9d3 ! 118: FDIVd fdivd %f50, %f50, %f48
4706 .word 0xe1bfe0a0 ! 119: STDFA_I stda %f16, [0x00a0, %r31]
4707 .word 0xe31fe140 ! 120: LDDF_I ldd [%r31, 0x0140], %f17
4708 .word 0xa5a509c9 ! 121: FDIVd fdivd %f20, %f40, %f18
4709 .word 0xe49fe110 ! 121: LDDA_I ldda [%r31, + 0x0110] %asi, %r18
4710memptr_8_52:
4711 set 0x60140000, %r31
4712 .word 0xe4bfe1d0 ! 122: STDA_I stda %r18, [%r31 + 0x01d0] %asi
4713 .word 0x85846211 ! 123: WRCCR_I wr %r17, 0x0211, %ccr
4714 .word 0xe1bfe060 ! 124: STDFA_I stda %f16, [0x0060, %r31]
4715 .word 0xe49fe1a0 ! 125: LDDA_I ldda [%r31, + 0x01a0] %asi, %r18
4716 .word 0xc19fe140 ! 125: LDDFA_I ldda [%r31, 0x0140], %f0
4717 rd %tick, %r28
4718#if (MAX_THREADS == 8)
4719 sethi %hi(0x33800), %r27
4720#else
4721 sethi %hi(0x30000), %r27
4722#endif
4723 andn %r28, %r27, %r28
4724 ta T_CHANGE_HPRIV
4725 stxa %r28, [%g0] 0x73
4726intvec_8_53:
4727 .word 0x9f802d04 ! 126: SIR sir 0x0d04
4728 .word 0xc36fe000 ! 127: PREFETCH_I prefetch [%r31 + 0x0000], #one_read
4729 .word 0xc1bfe0e0 ! 128: STDFA_I stda %f0, [0x00e0, %r31]
4730 .word 0x9f8029e0 ! 129: SIR sir 0x09e0
4731 .word 0xe1bfe120 ! 129: STDFA_I stda %f16, [0x0120, %r31]
4732memptr_8_55:
4733 set 0x60740000, %r31
4734 .word 0xe19fe0e0 ! 130: LDDFA_I ldda [%r31, 0x00e0], %f16
4735 .word 0x8580fb51 ! 131: WRCCR_I wr %r3, 0x1b51, %ccr
4736 .word 0xc19fe1e0 ! 132: LDDFA_I ldda [%r31, 0x01e0], %f0
4737 .word 0xc1bfe1e0 ! 133: STDFA_I stda %f0, [0x01e0, %r31]
4738 .word 0xc1bfe140 ! 133: STDFA_I stda %f0, [0x0140, %r31]
4739memptr_8_57:
4740 set user_data_start, %r31
4741 .word 0xe6bfe0a0 ! 134: STDA_I stda %r19, [%r31 + 0x00a0] %asi
4742 .word 0x85847a89 ! 135: WRCCR_I wr %r17, 0x1a89, %ccr
4743 .word 0xc1bfe0c0 ! 136: STDFA_I stda %f0, [0x00c0, %r31]
4744 .word 0xe7e7c034 ! 137: CASA_I casa [%r31] 0x 1, %r20, %r19
4745 .word 0x8584b869 ! 137: WRCCR_I wr %r18, 0x1869, %ccr
4746 rd %tick, %r28
4747#if (MAX_THREADS == 8)
4748 sethi %hi(0x33800), %r27
4749#else
4750 sethi %hi(0x30000), %r27
4751#endif
4752 andn %r28, %r27, %r28
4753 ta T_CHANGE_HPRIV
4754 stxa %r28, [%g0] 0x73
4755intvec_8_59:
4756#if (defined SPC || defined CMP1)
4757!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_60) + 48, 16, 16)) -> intp(4,0,29,,,,,1)
4758!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_60)&0xffffffff) + 24, 16, 16)) -> intp(7,0,17,,,,,1)
4759#else
4760 set 0x38704fde, %r28
4761#if (MAX_THREADS == 8)
4762 and %r28, 0x7ff, %r28
4763#endif
4764 stxa %r28, [%g0] 0x73
4765#endif
4766intvec_8_60:
4767 .word 0xa5b304cc ! 138: FCMPNE32 fcmpne32 %d12, %d12, %r18
4768 .word 0x24cfc001 ! 139: BRLEZ brlez,a,pt %r31,<label_0xfc001>
4769 .word 0x9ba209d0 ! 140: FDIVd fdivd %f8, %f16, %f44
4770 .word 0xa9b484c7 ! 141: FCMPNE32 fcmpne32 %d18, %d38, %r20
4771 .word 0xc36fe050 ! 141: PREFETCH_I prefetch [%r31 + 0x0050], #one_read
4772 .word 0xe91fe000 ! 142: LDDF_I ldd [%r31, 0x0000], %f20
4773 .word 0xe9e7c028 ! 143: CASA_I casa [%r31] 0x 1, %r8, %r20
4774 .word 0xc1bfe000 ! 144: STDFA_I stda %f0, [0x0000, %r31]
4775 .word 0xe89fe1f0 ! 145: LDDA_I ldda [%r31, + 0x01f0] %asi, %r20
4776 .word 0xc36fe1f0 ! 145: PREFETCH_I prefetch [%r31 + 0x01f0], #one_read
4777#if (defined SPC || defined CMP1)
4778!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_62) + 32, 16, 16)) -> intp(1,0,5,,,,,1)
4779!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_62)&0xffffffff) + 40, 16, 16)) -> intp(3,0,7,,,,,1)
4780#else
4781 set 0xbeb0a238, %r28
4782#if (MAX_THREADS == 8)
4783 and %r28, 0x7ff, %r28
4784#endif
4785 stxa %r28, [%g0] 0x73
4786#endif
4787 .word 0x9ba149c2 ! 1: FDIVd fdivd %f36, %f2, %f44
4788intvec_8_62:
4789 rd %tick, %r28
4790#if (MAX_THREADS == 8)
4791 sethi %hi(0x33800), %r27
4792#else
4793 sethi %hi(0x30000), %r27
4794#endif
4795 andn %r28, %r27, %r28
4796 ta T_CHANGE_HPRIV
4797 stxa %r28, [%g0] 0x73
4798 .word 0x9f803d13 ! 1: SIR sir 0x1d13
4799intvec_8_63:
4800 .word 0x39400001 ! 146: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4801 .word 0xc1bfe180 ! 147: STDFA_I stda %f0, [0x0180, %r31]
4802 .word 0xa7a289d1 ! 148: FDIVd fdivd %f10, %f48, %f50
4803 .word 0x93a4c9d1 ! 149: FDIVd fdivd %f50, %f48, %f40
4804 .word 0xc19fe160 ! 149: LDDFA_I ldda [%r31, 0x0160], %f0
4805 .word 0xc19fe080 ! 150: LDDFA_I ldda [%r31, 0x0080], %f0
4806 .word 0x93b7c4d2 ! 151: FCMPNE32 fcmpne32 %d62, %d18, %r9
4807 .word 0xd31fc014 ! 152: LDDF_R ldd [%r31, %r20], %f9
4808 .word 0xc1bfe0e0 ! 153: STDFA_I stda %f0, [0x00e0, %r31]
4809 .word 0xd297e070 ! 153: LDUHA_I lduha [%r31, + 0x0070] %asi, %r9
4810 .word 0xe1bfe1e0 ! 154: STDFA_I stda %f16, [0x01e0, %r31]
4811 .word 0xc1bfe140 ! 155: STDFA_I stda %f0, [0x0140, %r31]
4812 .word 0xc1bfe100 ! 156: STDFA_I stda %f0, [0x0100, %r31]
4813 .word 0xc19fe040 ! 157: LDDFA_I ldda [%r31, 0x0040], %f0
4814 .word 0xc19fe040 ! 157: LDDFA_I ldda [%r31, 0x0040], %f0
4815 .word 0xe1bfe1c0 ! 158: STDFA_I stda %f16, [0x01c0, %r31]
4816 .word 0xd3e7c031 ! 159: CASA_I casa [%r31] 0x 1, %r17, %r9
4817 .word 0xd31fe170 ! 160: LDDF_I ldd [%r31, 0x0170], %f9
4818 .word 0xc1bfe160 ! 161: STDFA_I stda %f0, [0x0160, %r31]
4819 .word 0xd23fe190 ! 161: STD_I std %r9, [%r31 + 0x0190]
4820#if (defined SPC || defined CMP1)
4821!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_68) + 32, 16, 16)) -> intp(7,0,29,,,,,1)
4822!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_68)&0xffffffff) + 56, 16, 16)) -> intp(2,0,22,,,,,1)
4823#else
4824 set 0xb3108f2d, %r28
4825#if (MAX_THREADS == 8)
4826 and %r28, 0x7ff, %r28
4827#endif
4828 stxa %r28, [%g0] 0x73
4829#endif
4830 .word 0xa5a449d3 ! 1: FDIVd fdivd %f48, %f50, %f18
4831intvec_8_68:
4832 .word 0x9f802888 ! 162: SIR sir 0x0888
4833 .word 0xe1bfe160 ! 163: STDFA_I stda %f16, [0x0160, %r31]
4834 .word 0xe1bfe1c0 ! 164: STDFA_I stda %f16, [0x01c0, %r31]
4835 .word 0x9f8038ea ! 165: SIR sir 0x18ea
4836 .word 0xe19fe0a0 ! 165: LDDFA_I ldda [%r31, 0x00a0], %f16
4837#if (defined SPC || defined CMP1)
4838!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_70) + 8, 16, 16)) -> intp(6,0,2,,,,,1)
4839!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_70)&0xffffffff) + 56, 16, 16)) -> intp(7,0,6,,,,,1)
4840#else
4841 set 0x4ea07ca6, %r28
4842#if (MAX_THREADS == 8)
4843 and %r28, 0x7ff, %r28
4844#endif
4845 stxa %r28, [%g0] 0x73
4846#endif
4847 .word 0x9f802606 ! 1: SIR sir 0x0606
4848intvec_8_70:
4849 .word 0xc32fe140 ! 166: STXFSR_I st-sfr %f1, [0x0140, %r31]
4850 .word 0xc19fe0c0 ! 167: LDDFA_I ldda [%r31, 0x00c0], %f0
4851 .word 0xa1a449d3 ! 168: FDIVd fdivd %f48, %f50, %f16
4852 .word 0xe1e7c031 ! 169: CASA_I casa [%r31] 0x 1, %r17, %r16
4853 .word 0xc19fe1c0 ! 169: LDDFA_I ldda [%r31, 0x01c0], %f0
4854 .word 0xa5a00554 ! 1: FSQRTd fsqrt
4855memptr_8_72:
4856 set user_data_start, %r31
4857 rd %tick, %r28
4858#if (MAX_THREADS == 8)
4859 sethi %hi(0x33800), %r27
4860#else
4861 sethi %hi(0x30000), %r27
4862#endif
4863 andn %r28, %r27, %r28
4864 ta T_CHANGE_HPRIV
4865 stxa %r28, [%g0] 0x73
4866intvec_8_73:
4867 .word 0xe19fe1a0 ! 170: LDDFA_I ldda [%r31, 0x01a0], %f16
4868 .word 0x85853412 ! 171: WRCCR_I wr %r20, 0x1412, %ccr
4869 .word 0xa9a409c7 ! 172: FDIVd fdivd %f16, %f38, %f20
4870 .word 0xc1bfe080 ! 173: STDFA_I stda %f0, [0x0080, %r31]
4871 .word 0x97b504d1 ! 173: FCMPNE32 fcmpne32 %d20, %d48, %r11
4872memptr_8_75:
4873 set user_data_start, %r31
4874#if (defined SPC || defined CMP1)
4875!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_76) + 48, 16, 16)) -> intp(3,0,26,,,,,1)
4876!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_76)&0xffffffff) + 8, 16, 16)) -> intp(5,0,29,,,,,1)
4877#else
4878 set 0xdc80c648, %r28
4879#if (MAX_THREADS == 8)
4880 and %r28, 0x7ff, %r28
4881#endif
4882 stxa %r28, [%g0] 0x73
4883#endif
4884 .word 0xa9a1c9d4 ! 1: FDIVd fdivd %f38, %f20, %f20
4885intvec_8_76:
4886 .word 0xe69fe1a0 ! 174: LDDA_I ldda [%r31, + 0x01a0] %asi, %r19
4887 .word 0x8581b9f2 ! 175: WRCCR_I wr %r6, 0x19f2, %ccr
4888 .word 0xc36cb56a ! 176: PREFETCH_I prefetch [%r18 + 0xfffff56a], #one_read
4889 .word 0xdb1fe1d0 ! 177: LDDF_I ldd [%r31, 0x01d0], %f13
4890 .word 0x39400001 ! 177: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4891memptr_8_77:
4892 set 0x60540000, %r31
4893 .word 0xc32fe150 ! 178: STXFSR_I st-sfr %f1, [0x0150, %r31]
4894 .word 0x8584f597 ! 179: WRCCR_I wr %r19, 0x1597, %ccr
4895 .word 0xc32fe1c0 ! 180: STXFSR_I st-sfr %f1, [0x01c0, %r31]
4896 .word 0xd3e7c028 ! 181: CASA_I casa [%r31] 0x 1, %r8, %r9
4897 .word 0x85853a14 ! 181: WRCCR_I wr %r20, 0x1a14, %ccr
4898 .word 0xd2dfc028 ! 182: LDXA_R ldxa [%r31, %r8] 0x01, %r9
4899 .word 0x93a7c9cc ! 183: FDIVd fdivd %f62, %f12, %f40
4900 .word 0xd31fe0d0 ! 184: LDDF_I ldd [%r31, 0x00d0], %f9
4901 .word 0xd297e090 ! 185: LDUHA_I lduha [%r31, + 0x0090] %asi, %r9
4902 .word 0xd3e7c033 ! 185: CASA_I casa [%r31] 0x 1, %r19, %r9
4903#if (defined SPC || defined CMP1)
4904!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_80) + 56, 16, 16)) -> intp(7,0,26,,,,,1)
4905!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_80)&0xffffffff) + 16, 16, 16)) -> intp(2,0,24,,,,,1)
4906#else
4907 set 0x5b206d4a, %r28
4908#if (MAX_THREADS == 8)
4909 and %r28, 0x7ff, %r28
4910#endif
4911 stxa %r28, [%g0] 0x73
4912#endif
4913 .word 0xc36ca76c ! 1: PREFETCH_I prefetch [%r18 + 0x076c], #one_read
4914intvec_8_80:
4915 rd %tick, %r28
4916#if (MAX_THREADS == 8)
4917 sethi %hi(0x33800), %r27
4918#else
4919 sethi %hi(0x30000), %r27
4920#endif
4921 andn %r28, %r27, %r28
4922 ta T_CHANGE_HPRIV
4923 stxa %r28, [%g0] 0x73
4924intvec_8_81:
4925 .word 0x9f802406 ! 186: SIR sir 0x0406
4926 .word 0x24cfc001 ! 187: BRLEZ brlez,a,pt %r31,<label_0xfc001>
4927 .word 0x39400001 ! 188: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4928 .word 0x9f8039f0 ! 189: SIR sir 0x19f0
4929 .word 0xd9e7c033 ! 189: CASA_I casa [%r31] 0x 1, %r19, %r12
4930 rd %tick, %r28
4931#if (MAX_THREADS == 8)
4932 sethi %hi(0x33800), %r27
4933#else
4934 sethi %hi(0x30000), %r27
4935#endif
4936 andn %r28, %r27, %r28
4937 ta T_CHANGE_HPRIV
4938 stxa %r28, [%g0] 0x73
4939 .word 0x91a4c9d0 ! 1: FDIVd fdivd %f50, %f16, %f8
4940intvec_8_83:
4941 .word 0x9f80350d ! 190: SIR sir 0x150d
4942 .word 0xc1bfe0a0 ! 191: STDFA_I stda %f0, [0x00a0, %r31]
4943 .word 0xe1bfe0c0 ! 192: STDFA_I stda %f16, [0x00c0, %r31]
4944 .word 0xc36c664d ! 193: PREFETCH_I prefetch [%r17 + 0x064d], #one_read
4945 .word 0xc1bfe040 ! 193: STDFA_I stda %f0, [0x0040, %r31]
4946memptr_8_85:
4947 set 0x60140000, %r31
4948 .word 0xd23fe080 ! 194: STD_I std %r9, [%r31 + 0x0080]
4949 .word 0x8584f13f ! 195: WRCCR_I wr %r19, 0x113f, %ccr
4950 .word 0xd297e100 ! 196: LDUHA_I lduha [%r31, + 0x0100] %asi, %r9
4951 .word 0xd33fe0f0 ! 197: STDF_I std %f9, [0x00f0, %r31]
4952 .word 0x8581ff9a ! 197: WRCCR_I wr %r7, 0x1f9a, %ccr
4953 .word 0xc1bfe0e0 ! 198: STDFA_I stda %f0, [0x00e0, %r31]
4954 .word 0xc36fe120 ! 199: PREFETCH_I prefetch [%r31 + 0x0120], #one_read
4955 .word 0xd2bfe0a0 ! 200: STDA_I stda %r9, [%r31 + 0x00a0] %asi
4956 .word 0xe1bfe140 ! 201: STDFA_I stda %f16, [0x0140, %r31]
4957 .word 0xd2dfc029 ! 201: LDXA_R ldxa [%r31, %r9] 0x01, %r9
4958.text
4959 setx join_lbl_0_0, %g1, %g2
4960 jmp %g2
4961 nop
4962fork_lbl_0_3:
4963 ta T_CHANGE_NONHPRIV
4964 .word 0x91930001 ! 1: WRPR_PIL_R wrpr %r12, %r1, %pil
4965 nop
4966 mov 0x80, %g3
4967 stxa %r7, [%r0] ASI_LSU_CONTROL
4968 stxa %g3, [%g3] 0x57
4969 .word 0xd65fc000 ! 5: LDX_R ldx [%r31 + %r0], %r11
4970 .word 0xa9a1c9a9 ! 9: FDIVs fdivs %f7, %f9, %f20
4971 .word 0xc1bfdb60 ! 13: STDFA_R stda %f0, [%r0, %r31]
4972 .word 0xc1bfc2c0 ! 17: STDFA_R stda %f0, [%r0, %r31]
4973 .word 0xe22fe043 ! 21: STB_I stb %r17, [%r31 + 0x0043]
4974 rd %tick, %r28
4975#if (MAX_THREADS == 8)
4976 sethi %hi(0x33800), %r27
4977#else
4978 sethi %hi(0x30000), %r27
4979#endif
4980 andn %r28, %r27, %r28
4981 ta T_CHANGE_HPRIV
4982 stxa %r28, [%g0] 0x73
4983 .word 0xc36b29f3 ! 1: PREFETCH_I prefetch [%r12 + 0x09f3], #one_read
4984intvec_4_7:
4985 .word 0x9f802a00 ! 25: SIR sir 0x0a00
4986 .word 0x22cd0001 ! 1: BRZ brz,a,pt %r20,<label_0xd0001>
4987 .word 0x8d902177 ! 29: WRPR_PSTATE_I wrpr %r0, 0x0177, %pstate
4988fpinit_4_10:
4989 nop
4990 setx fp_data_quads, %r19, %r20
4991 ldd [%r20], %f0
4992 ldd [%r20+8], %f4
4993 ld [%r20+16], %fsr
4994 ld [%r20+24], %r19
4995 wr %r19, %g0, %gsr
4996 .word 0xc3e83f02 ! 33: PREFETCHA_I prefetcha [%r0, + 0xffffff02] %asi, #one_read
4997memptr_4_13:
4998 set 0x60740000, %r31
4999 .word 0x8584fec3 ! 37: WRCCR_I wr %r19, 0x1ec3, %ccr
5000 .word 0x91948011 ! 41: WRPR_PIL_R wrpr %r18, %r17, %pil
5001fpinit_4_18:
5002 nop
5003 setx fp_data_quads, %r19, %r20
5004 ldd [%r20], %f0
5005 ldd [%r20+8], %f4
5006 ld [%r20+16], %fsr
5007 ld [%r20+24], %r19
5008 wr %r19, %g0, %gsr
5009 .word 0x89a009a4 ! 45: FDIVs fdivs %f0, %f4, %f4
5010dvapa_4_19:
5011 nop
5012 ta T_CHANGE_HPRIV
5013 mov 0xc8c, %r20
5014 mov 0x10, %r19
5015 sllx %r20, 23, %r20
5016 or %r19, %r20, %r19
5017 stxa %r19, [%g0] ASI_LSU_CONTROL
5018 mov 0x38, %r18
5019 stxa %r31, [%r18]0x58
5020 ta T_CHANGE_NONHPRIV
5021 .word 0xa570236b ! 49: POPC_I popc 0x036b, %r18
5022brcommon3_4_20:
5023 nop
5024 setx common_target, %r12, %r27
5025 lduw [%r27], %r12 ! Load common dest into dcache ..
5026 ba,a .+12
5027 .word 0xd7e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r11
5028 ba,a .+8
5029 jmpl %r27+0, %r27
5030 .word 0xd697e030 ! 53: LDUHA_I lduha [%r31, + 0x0030] %asi, %r11
5031br_longdelay4_4_22:
5032 nop
5033 not %g0, %r27
5034 jmpl %r27+0, %r27
5035 .word 0x9d902005 ! 57: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate
5036 fbg skip_4_23
5037 stxa %r13, [%r0] ASI_LSU_CONTROL
5038 .word 0x87a8ca4b ! 1: FCMPd fcmpd %fcc<n>, %f34, %f42
5039 stxa %r13, [%r0] ASI_LSU_CONTROL
5040.align 32
5041skip_4_23:
5042 .word 0xd63fe0f1 ! 61: STD_I std %r11, [%r31 + 0x00f1]
5043splash_hpstate_4_27:
5044 .word 0x81982e8c ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x0e8c, %hpstate
5045 .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1>
5046 .word 0x8d9025e3 ! 69: WRPR_PSTATE_I wrpr %r0, 0x05e3, %pstate
5047 nop
5048 ta T_CHANGE_HPRIV
5049 mov 0x4, %r10
5050 set sync_thr_counter6, %r23
5051#ifndef SPC
5052 ldxa [%g0]0x63, %o1
5053 and %o1, 0x38, %o1
5054 add %o1, %r23, %r23
5055#endif
5056 cas [%r23],%g0,%r10 !lock
5057 brnz %r10, sma_4_30
5058 rd %asi, %r12
5059 wr %g0, 0x40, %asi
5060 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
5061 set 0x000e1fff, %l7
5062 stxa %l7, [%g0 + 0x80] %asi
5063 wr %r12, %g0, %asi
5064 st %g0, [%r23]
5065sma_4_30:
5066 ta T_CHANGE_NONHPRIV
5067 .word 0xd1e7e012 ! 73: CASA_R casa [%r31] %asi, %r18, %r8
5068 .word 0xd137e1a8 ! 77: STQF_I - %f8, [0x01a8, %r31]
5069 nop
5070 ta T_CHANGE_HPRIV
5071 mov 0x4, %r10
5072 set sync_thr_counter6, %r23
5073#ifndef SPC
5074 ldxa [%g0]0x63, %o1
5075 and %o1, 0x38, %o1
5076 add %o1, %r23, %r23
5077#endif
5078 cas [%r23],%g0,%r10 !lock
5079 brnz %r10, sma_4_34
5080 rd %asi, %r12
5081 wr %g0, 0x40, %asi
5082 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
5083 set 0x00121fff, %l7
5084 stxa %l7, [%g0 + 0x80] %asi
5085 wr %r12, %g0, %asi
5086 st %g0, [%r23]
5087sma_4_34:
5088 ta T_CHANGE_NONHPRIV
5089 .word 0xd9e7e010 ! 81: CASA_R casa [%r31] %asi, %r16, %r12
5090memptr_4_36:
5091 set user_data_start, %r31
5092 .word 0x858075c7 ! 85: WRCCR_I wr %r1, 0x15c7, %ccr
5093pmu_4_39:
5094 nop
5095 ta T_CHANGE_PRIV
5096 setx 0xffffffbdffffffa7, %g1, %g7
5097 .word 0xa3800007 ! 89: WR_PERF_COUNTER_R wr %r0, %r7, %-
5098 .word 0xd0ffc02d ! 93: SWAPA_R swapa %r8, [%r31 + %r13] 0x01
5099#if (defined SPC || defined CMP)
5100!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_43)+24, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
5101!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_43)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
5102xir_4_43:
5103#else
5104#if (defined FC)
5105!! Generate XIR via RESET_GEN register
5106!! ta T_CHANGE_HPRIV
5107!! rdpr %pstate, %r18
5108!! andn %r18, 0x208, %r18 ! Reset pstate.am,cle
5109!! wrpr %r18, %pstate
5110#ifndef XIR_RND_CORES
5111!! ldxa [%g0] 0x63, %o1
5112!! mov 1, %r18
5113!! sllx %r18, %o1, %r18
5114#endif
5115!! mov 0x30, %r19
5116!! setx 0x8900000808, %r16, %r17
5117!! mov 0x2, %r16
5118!!xir_4_43:
5119!! stxa %r18, [%r19] 0x41
5120!! stx %r16, [%r17]
5121#endif
5122#endif
5123 .word 0xa982737f ! 97: WR_SET_SOFTINT_I wr %r9, 0x137f, %set_softint
5124fpinit_4_45:
5125 nop
5126 setx fp_data_quads, %r19, %r20
5127 ldd [%r20], %f0
5128 ldd [%r20+8], %f4
5129 ld [%r20+16], %fsr
5130 ld [%r20+24], %r19
5131 wr %r19, %g0, %gsr
5132 .word 0x89b00484 ! 101: FCMPLE32 fcmple32 %d0, %d4, %r4
5133 .word 0x8d802000 ! 105: WRFPRS_I wr %r0, 0x0000, %fprs
5134 .word 0xe857e0e8 ! 109: LDSH_I ldsh [%r31 + 0x00e8], %r20
5135pmu_4_48:
5136 nop
5137 ta T_CHANGE_PRIV
5138 setx 0xffffffb9ffffffab, %g1, %g7
5139 .word 0xa3800007 ! 113: WR_PERF_COUNTER_R wr %r0, %r7, %-
5140 .word 0xe737e060 ! 117: STQF_I - %f19, [0x0060, %r31]
5141 .word 0x89800011 ! 121: WRTICK_R wr %r0, %r17, %tick
5142 .word 0xa7a40d32 ! 125: FsMULd fsmuld %f16, %f18, %f50
5143 .word 0xa97022fc ! 129: POPC_I popc 0x02fc, %r20
5144splash_lsu_4_56:
5145 nop
5146 ta T_CHANGE_HPRIV
5147 set 0x8dc786dc, %r2
5148 mov 0x7, %r1
5149 sllx %r1, 32, %r1
5150 or %r1, %r2, %r2
5151 stxa %r2, [%r0] ASI_LSU_CONTROL
5152 .word 0x3d400001 ! 133: FBPULE fbule,a,pn %fcc0, <label_0x1>
5153brcommon3_4_58:
5154 nop
5155 setx common_target, %r12, %r27
5156 lduw [%r27], %r12 ! Load common dest into dcache ..
5157 ba,a .+12
5158 .word 0xe7e7c02b ! 1: CASA_I casa [%r31] 0x 1, %r11, %r19
5159 ba,a .+8
5160 jmpl %r27+0, %r27
5161 .word 0x8d90255f ! 137: WRPR_PSTATE_I wrpr %r0, 0x055f, %pstate
5162 .word 0xe937e104 ! 141: STQF_I - %f20, [0x0104, %r31]
5163 .word 0xa1b440f1 ! 145: EDGE16LN edge16ln %r17, %r17, %r16
5164brcommon3_4_64:
5165 nop
5166 setx common_target, %r12, %r27
5167 lduw [%r27], %r12 ! Load common dest into dcache ..
5168 ba,a .+12
5169 .word 0xd26fe090 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0090]
5170 ba,a .+8
5171 jmpl %r27+0, %r27
5172 .word 0x81982c95 ! 149: WRHPR_HPSTATE_I wrhpr %r0, 0x0c95, %hpstate
5173#if (defined SPC || defined CMP)
5174!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_65)+0, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
5175!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_65)&0xffffffff) + 40, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
5176xir_4_65:
5177#else
5178#if (defined FC)
5179!! Generate XIR via RESET_GEN register
5180!! ta T_CHANGE_HPRIV
5181!! rdpr %pstate, %r18
5182!! andn %r18, 0x208, %r18 ! Reset pstate.am,cle
5183!! wrpr %r18, %pstate
5184#ifndef XIR_RND_CORES
5185!! ldxa [%g0] 0x63, %o1
5186!! mov 1, %r18
5187!! sllx %r18, %o1, %r18
5188#endif
5189!! mov 0x30, %r19
5190!! setx 0x8900000808, %r16, %r17
5191!! mov 0x2, %r16
5192!!xir_4_65:
5193!! stxa %r18, [%r19] 0x41
5194!! stx %r16, [%r17]
5195#endif
5196#endif
5197 .word 0xa982af90 ! 153: WR_SET_SOFTINT_I wr %r10, 0x0f90, %set_softint
5198splash_hpstate_4_66:
5199 .word 0x2ac9c001 ! 1: BRNZ brnz,a,pt %r7,<label_0x9c001>
5200 .word 0x81983555 ! 157: WRHPR_HPSTATE_I wrhpr %r0, 0x1555, %hpstate
5201pmu_4_67:
5202 nop
5203 ta T_CHANGE_PRIV
5204 setx 0xffffffbfffffffad, %g1, %g7
5205 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
5206 rd %tick, %r28
5207#if (MAX_THREADS == 8)
5208 sethi %hi(0x33800), %r27
5209#else
5210 sethi %hi(0x30000), %r27
5211#endif
5212 andn %r28, %r27, %r28
5213 ta T_CHANGE_HPRIV
5214 stxa %r28, [%g0] 0x73
5215 .word 0x9ba249c9 ! 1: FDIVd fdivd %f40, %f40, %f44
5216intvec_4_69:
5217 .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
5218brcommon2_4_71:
5219 nop
5220 setx common_target, %r12, %r27
5221 ba,a .+12
5222 .word 0xa1a7c971 ! 1: FMULq dis not found
5223
5224 ba,a .+8
5225 jmpl %r27+0, %r27
5226 .word 0xc19fe040 ! 169: LDDFA_I ldda [%r31, 0x0040], %f0
5227 fbue,a,pn %fcc0, skip_4_74
5228 fbuge skip_4_74
5229.align 32
5230skip_4_74:
5231 .word 0xa7a4c9d0 ! 173: FDIVd fdivd %f50, %f16, %f50
5232 .word 0xd337e146 ! 177: STQF_I - %f9, [0x0146, %r31]
5233splash_lsu_4_78:
5234 nop
5235 ta T_CHANGE_HPRIV
5236 set 0x8c370ae7, %r2
5237 mov 0x2, %r1
5238 sllx %r1, 32, %r1
5239 or %r1, %r2, %r2
5240 .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1>
5241 stxa %r2, [%r0] ASI_LSU_CONTROL
5242 .word 0x3d400001 ! 181: FBPULE fbule,a,pn %fcc0, <label_0x1>
5243splash_lsu_4_79:
5244 nop
5245 ta T_CHANGE_HPRIV
5246 set 0x2bf83217, %r2
5247 mov 0x4, %r1
5248 sllx %r1, 32, %r1
5249 or %r1, %r2, %r2
5250 stxa %r2, [%r0] ASI_LSU_CONTROL
5251 .word 0x3d400001 ! 185: FBPULE fbule,a,pn %fcc0, <label_0x1>
5252jmptr_4_82:
5253 nop
5254 best_set_reg(0xe1a00000, %r20, %r27)
5255 .word 0xb7c6c000 ! 189: JMPL_R jmpl %r27 + %r0, %r27
5256 .word 0x89800011 ! 193: WRTICK_R wr %r0, %r17, %tick
5257 .word 0xd33fe170 ! 197: STDF_I std %f9, [0x0170, %r31]
5258 nop
5259 nop
5260 ta T_CHANGE_PRIV
5261 wrpr %g0, %g0, %gl
5262 nop
5263 nop
5264.text
5265 setx join_lbl_0_0, %g1, %g2
5266 jmp %g2
5267 nop
5268fork_lbl_0_2:
5269 ta T_CHANGE_NONHPRIV
5270 .word 0x91940014 ! 1: WRPR_PIL_R wrpr %r16, %r20, %pil
5271 nop
5272 mov 0x80, %g3
5273 stxa %r6, [%r0] ASI_LSU_CONTROL
5274 stxa %g3, [%g3] 0x5f
5275 .word 0xd65fc000 ! 5: LDX_R ldx [%r31 + %r0], %r11
5276 .word 0x99a509b2 ! 9: FDIVs fdivs %f20, %f18, %f12
5277 .word 0xc1bfdb60 ! 13: STDFA_R stda %f0, [%r0, %r31]
5278 .word 0xe1bfda00 ! 17: STDFA_R stda %f16, [%r0, %r31]
5279 .word 0xe22fe1fc ! 21: STB_I stb %r17, [%r31 + 0x01fc]
5280 rd %tick, %r28
5281#if (MAX_THREADS == 8)
5282 sethi %hi(0x33800), %r27
5283#else
5284 sethi %hi(0x30000), %r27
5285#endif
5286 andn %r28, %r27, %r28
5287 ta T_CHANGE_HPRIV
5288 stxa %r28, [%g0] 0x73
5289 .word 0xa1b504c5 ! 1: FCMPNE32 fcmpne32 %d20, %d36, %r16
5290intvec_2_7:
5291 .word 0x91b084d2 ! 25: FCMPNE32 fcmpne32 %d2, %d18, %r8
5292 .word 0x26c98001 ! 1: BRLZ brlz,a,pt %r6,<label_0x98001>
5293 .word 0x8d9035bf ! 29: WRPR_PSTATE_I wrpr %r0, 0x15bf, %pstate
5294fpinit_2_10:
5295 nop
5296 setx fp_data_quads, %r19, %r20
5297 ldd [%r20], %f0
5298 ldd [%r20+8], %f4
5299 ld [%r20+16], %fsr
5300 ld [%r20+24], %r19
5301 wr %r19, %g0, %gsr
5302 .word 0x87a80a44 ! 33: FCMPd fcmpd %fcc<n>, %f0, %f4
5303memptr_2_13:
5304 set 0x60340000, %r31
5305 .word 0x8580b944 ! 37: WRCCR_I wr %r2, 0x1944, %ccr
5306 .word 0x91920012 ! 41: WRPR_PIL_R wrpr %r8, %r18, %pil
5307fpinit_2_18:
5308 nop
5309 setx fp_data_quads, %r19, %r20
5310 ldd [%r20], %f0
5311 ldd [%r20+8], %f4
5312 ld [%r20+16], %fsr
5313 ld [%r20+24], %r19
5314 wr %r19, %g0, %gsr
5315 .word 0xc3e8208e ! 45: PREFETCHA_I prefetcha [%r0, + 0x008e] %asi, #one_read
5316dvapa_2_19:
5317 nop
5318 ta T_CHANGE_HPRIV
5319 mov 0xe53, %r20
5320 mov 0x1e, %r19
5321 sllx %r20, 23, %r20
5322 or %r19, %r20, %r19
5323 stxa %r19, [%g0] ASI_LSU_CONTROL
5324 mov 0x38, %r18
5325 stxa %r31, [%r18]0x58
5326 ta T_CHANGE_NONHPRIV
5327 .word 0x87a94a49 ! 49: FCMPd fcmpd %fcc<n>, %f36, %f40
5328brcommon3_2_20:
5329 nop
5330 setx common_target, %r12, %r27
5331 lduw [%r27], %r12 ! Load common dest into dcache ..
5332 ba,a .+12
5333 .word 0xd7e7c033 ! 1: CASA_I casa [%r31] 0x 1, %r19, %r11
5334 ba,a .+8
5335 jmpl %r27+0, %r27
5336 .word 0xd69fe100 ! 53: LDDA_I ldda [%r31, + 0x0100] %asi, %r11
5337br_longdelay4_2_22:
5338 nop
5339 not %g0, %r27
5340 jmpl %r27+0, %r27
5341 .word 0x9d902005 ! 57: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate
5342 brgz,a,pt %r17, skip_2_23
5343 stxa %r12, [%r0] ASI_LSU_CONTROL
5344 .word 0xc36d2e44 ! 1: PREFETCH_I prefetch [%r20 + 0x0e44], #one_read
5345 stxa %r12, [%r0] ASI_LSU_CONTROL
5346.align 32
5347skip_2_23:
5348 .word 0xd63fe1b9 ! 61: STD_I std %r11, [%r31 + 0x01b9]
5349splash_hpstate_2_27:
5350 .word 0x81982d1a ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x0d1a, %hpstate
5351 .word 0x2cc98001 ! 1: BRGZ brgz,a,pt %r6,<label_0x98001>
5352 .word 0x8d9037ef ! 69: WRPR_PSTATE_I wrpr %r0, 0x17ef, %pstate
5353 nop
5354 ta T_CHANGE_HPRIV
5355 mov 0x2, %r10
5356 set sync_thr_counter6, %r23
5357#ifndef SPC
5358 ldxa [%g0]0x63, %o1
5359 and %o1, 0x38, %o1
5360 add %o1, %r23, %r23
5361#endif
5362 cas [%r23],%g0,%r10 !lock
5363 brnz %r10, sma_2_30
5364 rd %asi, %r12
5365 wr %g0, 0x40, %asi
5366 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
5367 set 0x000a1fff, %l7
5368 stxa %l7, [%g0 + 0x80] %asi
5369 wr %r12, %g0, %asi
5370 st %g0, [%r23]
5371sma_2_30:
5372 ta T_CHANGE_NONHPRIV
5373 .word 0xd1e7e014 ! 73: CASA_R casa [%r31] %asi, %r20, %r8
5374 .word 0xd137e163 ! 77: STQF_I - %f8, [0x0163, %r31]
5375 nop
5376 ta T_CHANGE_HPRIV
5377 mov 0x2, %r10
5378 set sync_thr_counter6, %r23
5379#ifndef SPC
5380 ldxa [%g0]0x63, %o1
5381 and %o1, 0x38, %o1
5382 add %o1, %r23, %r23
5383#endif
5384 cas [%r23],%g0,%r10 !lock
5385 brnz %r10, sma_2_34
5386 rd %asi, %r12
5387 wr %g0, 0x40, %asi
5388 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
5389 set 0x000e1fff, %l7
5390 stxa %l7, [%g0 + 0x80] %asi
5391 wr %r12, %g0, %asi
5392 st %g0, [%r23]
5393sma_2_34:
5394 ta T_CHANGE_NONHPRIV
5395 .word 0xd9e7e00b ! 81: CASA_R casa [%r31] %asi, %r11, %r12
5396memptr_2_36:
5397 set user_data_start, %r31
5398 .word 0x85852355 ! 85: WRCCR_I wr %r20, 0x0355, %ccr
5399pmu_2_39:
5400 nop
5401 ta T_CHANGE_PRIV
5402 setx 0xffffffb2ffffffaa, %g1, %g7
5403 .word 0xa3800007 ! 89: WR_PERF_COUNTER_R wr %r0, %r7, %-
5404 .word 0xd0ffc028 ! 93: SWAPA_R swapa %r8, [%r31 + %r8] 0x01
5405#if (defined SPC || defined CMP)
5406!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_43)+24, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
5407!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_43)&0xffffffff) + 8, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
5408xir_2_43:
5409#else
5410#if (defined FC)
5411!! Generate XIR via RESET_GEN register
5412!! ta T_CHANGE_HPRIV
5413!! rdpr %pstate, %r18
5414!! andn %r18, 0x208, %r18 ! Reset pstate.am,cle
5415!! wrpr %r18, %pstate
5416#ifndef XIR_RND_CORES
5417!! ldxa [%g0] 0x63, %o1
5418!! mov 1, %r18
5419!! sllx %r18, %o1, %r18
5420#endif
5421!! mov 0x30, %r19
5422!! setx 0x8900000808, %r16, %r17
5423!! mov 0x2, %r16
5424!!xir_2_43:
5425!! stxa %r18, [%r19] 0x41
5426!! stx %r16, [%r17]
5427#endif
5428#endif
5429 .word 0xa984af22 ! 97: WR_SET_SOFTINT_I wr %r18, 0x0f22, %set_softint
5430fpinit_2_45:
5431 nop
5432 setx fp_data_quads, %r19, %r20
5433 ldd [%r20], %f0
5434 ldd [%r20+8], %f4
5435 ld [%r20+16], %fsr
5436 ld [%r20+24], %r19
5437 wr %r19, %g0, %gsr
5438 .word 0x87a80a44 ! 101: FCMPd fcmpd %fcc<n>, %f0, %f4
5439 .word 0x8d802004 ! 105: WRFPRS_I wr %r0, 0x0004, %fprs
5440 .word 0xe857e188 ! 109: LDSH_I ldsh [%r31 + 0x0188], %r20
5441pmu_2_48:
5442 nop
5443 ta T_CHANGE_PRIV
5444 setx 0xffffffbfffffffa4, %g1, %g7
5445 .word 0xa3800007 ! 113: WR_PERF_COUNTER_R wr %r0, %r7, %-
5446 .word 0xe737e163 ! 117: STQF_I - %f19, [0x0163, %r31]
5447 .word 0x89800011 ! 121: WRTICK_R wr %r0, %r17, %tick
5448 .word 0x93a44d22 ! 125: FsMULd fsmuld %f17, %f2, %f40
5449 .word 0x91b207d1 ! 129: PDIST pdistn %d8, %d48, %d8
5450splash_lsu_2_56:
5451 nop
5452 ta T_CHANGE_HPRIV
5453 set 0x1a51d933, %r2
5454 mov 0x3, %r1
5455 sllx %r1, 32, %r1
5456 or %r1, %r2, %r2
5457 stxa %r2, [%r0] ASI_LSU_CONTROL
5458 .word 0x3d400001 ! 133: FBPULE fbule,a,pn %fcc0, <label_0x1>
5459brcommon3_2_58:
5460 nop
5461 setx common_target, %r12, %r27
5462 lduw [%r27], %r12 ! Load common dest into dcache ..
5463 ba,a .+12
5464 .word 0xe7e7c034 ! 1: CASA_I casa [%r31] 0x 1, %r20, %r19
5465 ba,a .+8
5466 jmpl %r27+0, %r27
5467 .word 0x8198328d ! 137: WRHPR_HPSTATE_I wrhpr %r0, 0x128d, %hpstate
5468 .word 0xe937e18c ! 141: STQF_I - %f20, [0x018c, %r31]
5469 .word 0xa3b500f1 ! 145: EDGE16LN edge16ln %r20, %r17, %r17
5470brcommon3_2_64:
5471 nop
5472 setx common_target, %r12, %r27
5473 lduw [%r27], %r12 ! Load common dest into dcache ..
5474 ba,a .+12
5475 .word 0xd26fe1e0 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x01e0]
5476 ba,a .+8
5477 jmpl %r27+0, %r27
5478 .word 0x8d903441 ! 149: WRPR_PSTATE_I wrpr %r0, 0x1441, %pstate
5479#if (defined SPC || defined CMP)
5480!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_65)+40, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
5481!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_65)&0xffffffff) + 16, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
5482xir_2_65:
5483#else
5484#if (defined FC)
5485!! Generate XIR via RESET_GEN register
5486!! ta T_CHANGE_HPRIV
5487!! rdpr %pstate, %r18
5488!! andn %r18, 0x208, %r18 ! Reset pstate.am,cle
5489!! wrpr %r18, %pstate
5490#ifndef XIR_RND_CORES
5491!! ldxa [%g0] 0x63, %o1
5492!! mov 1, %r18
5493!! sllx %r18, %o1, %r18
5494#endif
5495!! mov 0x30, %r19
5496!! setx 0x8900000808, %r16, %r17
5497!! mov 0x2, %r16
5498!!xir_2_65:
5499!! stxa %r18, [%r19] 0x41
5500!! stx %r16, [%r17]
5501#endif
5502#endif
5503 .word 0xa9837e20 ! 153: WR_SET_SOFTINT_I wr %r13, 0x1e20, %set_softint
5504splash_hpstate_2_66:
5505 .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1>
5506 .word 0x81983c13 ! 157: WRHPR_HPSTATE_I wrhpr %r0, 0x1c13, %hpstate
5507pmu_2_67:
5508 nop
5509 ta T_CHANGE_PRIV
5510 setx 0xffffffb5ffffffa5, %g1, %g7
5511 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
5512 rd %tick, %r28
5513#if (MAX_THREADS == 8)
5514 sethi %hi(0x33800), %r27
5515#else
5516 sethi %hi(0x30000), %r27
5517#endif
5518 andn %r28, %r27, %r28
5519 ta T_CHANGE_HPRIV
5520 stxa %r28, [%g0] 0x73
5521 .word 0xc368712b ! 1: PREFETCH_I prefetch [%r1 + 0xfffff12b], #one_read
5522intvec_2_69:
5523 .word 0x9f8020a1 ! 165: SIR sir 0x00a1
5524brcommon2_2_71:
5525 nop
5526 setx common_target, %r12, %r27
5527 ba,a .+12
5528 .word 0xa1a0054a ! 1: FSQRTd fsqrt
5529 ba,a .+8
5530 jmpl %r27+0, %r27
5531 .word 0xe1bfe1c0 ! 169: STDFA_I stda %f16, [0x01c0, %r31]
5532 brz,pn %r11, skip_2_74
5533 bcc skip_2_74
5534.align 32
5535skip_2_74:
5536 .word 0xc36ab1e7 ! 173: PREFETCH_I prefetch [%r10 + 0xfffff1e7], #one_read
5537 .word 0xd337e112 ! 177: STQF_I - %f9, [0x0112, %r31]
5538splash_lsu_2_78:
5539 nop
5540 ta T_CHANGE_HPRIV
5541 set 0x43f948d3, %r2
5542 mov 0x6, %r1
5543 sllx %r1, 32, %r1
5544 or %r1, %r2, %r2
5545 .word 0x22c94001 ! 1: BRZ brz,a,pt %r5,<label_0x94001>
5546 stxa %r2, [%r0] ASI_LSU_CONTROL
5547 .word 0x3d400001 ! 181: FBPULE fbule,a,pn %fcc0, <label_0x1>
5548splash_lsu_2_79:
5549 nop
5550 ta T_CHANGE_HPRIV
5551 set 0x3a9eb831, %r2
5552 mov 0x2, %r1
5553 sllx %r1, 32, %r1
5554 or %r1, %r2, %r2
5555 stxa %r2, [%r0] ASI_LSU_CONTROL
5556 .word 0x3d400001 ! 185: FBPULE fbule,a,pn %fcc0, <label_0x1>
5557jmptr_2_82:
5558 nop
5559 best_set_reg(0xe0200000, %r20, %r27)
5560 .word 0xb7c6c000 ! 189: JMPL_R jmpl %r27 + %r0, %r27
5561 .word 0x89800011 ! 193: WRTICK_R wr %r0, %r17, %tick
5562 .word 0xd33fe10c ! 197: STDF_I std %f9, [0x010c, %r31]
5563 nop
5564 nop
5565 ta T_CHANGE_PRIV
5566 wrpr %g0, %g0, %gl
5567 nop
5568 nop
5569.text
5570 setx join_lbl_0_0, %g1, %g2
5571 jmp %g2
5572 nop
5573fork_lbl_0_1:
5574 ta T_CHANGE_NONHPRIV
5575 .word 0x91924010 ! 1: WRPR_PIL_R wrpr %r9, %r16, %pil
5576 nop
5577 mov 0x80, %g3
5578 stxa %r7, [%r0] ASI_LSU_CONTROL
5579 stxa %g3, [%g3] 0x5f
5580 .word 0xd65fc000 ! 5: LDX_R ldx [%r31 + %r0], %r11
5581 .word 0x91a509b2 ! 9: FDIVs fdivs %f20, %f18, %f8
5582 .word 0xc1bfc2c0 ! 13: STDFA_R stda %f0, [%r0, %r31]
5583 .word 0xe1bfc2c0 ! 17: STDFA_R stda %f16, [%r0, %r31]
5584 .word 0xe22fe005 ! 21: STB_I stb %r17, [%r31 + 0x0005]
5585 rd %tick, %r28
5586#if (MAX_THREADS == 8)
5587 sethi %hi(0x33800), %r27
5588#else
5589 sethi %hi(0x30000), %r27
5590#endif
5591 andn %r28, %r27, %r28
5592 ta T_CHANGE_HPRIV
5593 stxa %r28, [%g0] 0x73
5594 .word 0x93a309c1 ! 1: FDIVd fdivd %f12, %f32, %f40
5595intvec_1_7:
5596 .word 0x9f802c33 ! 25: SIR sir 0x0c33
5597 .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1>
5598 .word 0x8d903f87 ! 29: WRPR_PSTATE_I wrpr %r0, 0x1f87, %pstate
5599fpinit_1_10:
5600 nop
5601 setx fp_data_quads, %r19, %r20
5602 ldd [%r20], %f0
5603 ldd [%r20+8], %f4
5604 ld [%r20+16], %fsr
5605 ld [%r20+24], %r19
5606 wr %r19, %g0, %gsr
5607 .word 0x87a80a44 ! 33: FCMPd fcmpd %fcc<n>, %f0, %f4
5608memptr_1_13:
5609 set 0x60140000, %r31
5610 .word 0x8581efb6 ! 37: WRCCR_I wr %r7, 0x0fb6, %ccr
5611 .word 0x91908012 ! 41: WRPR_PIL_R wrpr %r2, %r18, %pil
5612fpinit_1_18:
5613 nop
5614 setx fp_data_quads, %r19, %r20
5615 ldd [%r20], %f0
5616 ldd [%r20+8], %f4
5617 ld [%r20+16], %fsr
5618 ld [%r20+24], %r19
5619 wr %r19, %g0, %gsr
5620 .word 0x91a009a4 ! 45: FDIVs fdivs %f0, %f4, %f8
5621dvapa_1_19:
5622 nop
5623 ta T_CHANGE_HPRIV
5624 mov 0xd4a, %r20
5625 mov 0x13, %r19
5626 sllx %r20, 23, %r20
5627 or %r19, %r20, %r19
5628 stxa %r19, [%g0] ASI_LSU_CONTROL
5629 mov 0x38, %r18
5630 stxa %r31, [%r18]0x58
5631 ta T_CHANGE_NONHPRIV
5632 .word 0x97703ec9 ! 49: POPC_I popc 0x1ec9, %r11
5633brcommon3_1_20:
5634 nop
5635 setx common_target, %r12, %r27
5636 lduw [%r27], %r12 ! Load common dest into dcache ..
5637 ba,a .+12
5638 .word 0xd7e7c029 ! 1: CASA_I casa [%r31] 0x 1, %r9, %r11
5639 ba,a .+8
5640 jmpl %r27+0, %r27
5641 .word 0xd69fe140 ! 53: LDDA_I ldda [%r31, + 0x0140] %asi, %r11
5642br_longdelay4_1_22:
5643 nop
5644 not %g0, %r27
5645 jmpl %r27+0, %r27
5646 .word 0x9d902005 ! 57: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate
5647 fbg skip_1_23
5648 stxa %r10, [%r0] ASI_LSU_CONTROL
5649 .word 0x91a0c9c2 ! 1: FDIVd fdivd %f34, %f2, %f8
5650 stxa %r6, [%r0] ASI_LSU_CONTROL
5651.align 32
5652skip_1_23:
5653 .word 0xc32fc000 ! 61: STXFSR_R st-sfr %f1, [%r0, %r31]
5654splash_hpstate_1_27:
5655 .word 0x81983fc7 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x1fc7, %hpstate
5656 .word 0x24cd0001 ! 1: BRLEZ brlez,a,pt %r20,<label_0xd0001>
5657 .word 0x8d903651 ! 69: WRPR_PSTATE_I wrpr %r0, 0x1651, %pstate
5658 nop
5659 ta T_CHANGE_HPRIV
5660 mov 0x1, %r10
5661 set sync_thr_counter6, %r23
5662#ifndef SPC
5663 ldxa [%g0]0x63, %o1
5664 and %o1, 0x38, %o1
5665 add %o1, %r23, %r23
5666#endif
5667 cas [%r23],%g0,%r10 !lock
5668 brnz %r10, sma_1_30
5669 rd %asi, %r12
5670 wr %g0, 0x40, %asi
5671 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
5672 set 0x00061fff, %l7
5673 stxa %l7, [%g0 + 0x80] %asi
5674 wr %r12, %g0, %asi
5675 st %g0, [%r23]
5676sma_1_30:
5677 ta T_CHANGE_NONHPRIV
5678 .word 0xd1e7e00c ! 73: CASA_R casa [%r31] %asi, %r12, %r8
5679 .word 0xd137e0a8 ! 77: STQF_I - %f8, [0x00a8, %r31]
5680 nop
5681 ta T_CHANGE_HPRIV
5682 mov 0x1, %r10
5683 set sync_thr_counter6, %r23
5684#ifndef SPC
5685 ldxa [%g0]0x63, %o1
5686 and %o1, 0x38, %o1
5687 add %o1, %r23, %r23
5688#endif
5689 cas [%r23],%g0,%r10 !lock
5690 brnz %r10, sma_1_34
5691 rd %asi, %r12
5692 wr %g0, 0x40, %asi
5693 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
5694 set 0x000e1fff, %l7
5695 stxa %l7, [%g0 + 0x80] %asi
5696 wr %r12, %g0, %asi
5697 st %g0, [%r23]
5698sma_1_34:
5699 ta T_CHANGE_NONHPRIV
5700 .word 0xd9e7e009 ! 81: CASA_R casa [%r31] %asi, %r9, %r12
5701memptr_1_36:
5702 set user_data_start, %r31
5703 .word 0x8582a45f ! 85: WRCCR_I wr %r10, 0x045f, %ccr
5704pmu_1_39:
5705 nop
5706 ta T_CHANGE_PRIV
5707 setx 0xffffffbbffffffa5, %g1, %g7
5708 .word 0xa3800007 ! 89: WR_PERF_COUNTER_R wr %r0, %r7, %-
5709 .word 0xd0ffc030 ! 93: SWAPA_R swapa %r8, [%r31 + %r16] 0x01
5710#if (defined SPC || defined CMP)
5711!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_43)+40, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
5712!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_43)&0xffffffff) + 40, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
5713xir_1_43:
5714#else
5715#if (defined FC)
5716!! Generate XIR via RESET_GEN register
5717!! ta T_CHANGE_HPRIV
5718!! rdpr %pstate, %r18
5719!! andn %r18, 0x208, %r18 ! Reset pstate.am,cle
5720!! wrpr %r18, %pstate
5721#ifndef XIR_RND_CORES
5722!! ldxa [%g0] 0x63, %o1
5723!! mov 1, %r18
5724!! sllx %r18, %o1, %r18
5725#endif
5726!! mov 0x30, %r19
5727!! setx 0x8900000808, %r16, %r17
5728!! mov 0x2, %r16
5729!!xir_1_43:
5730!! stxa %r18, [%r19] 0x41
5731!! stx %r16, [%r17]
5732#endif
5733#endif
5734 .word 0xa98175a9 ! 97: WR_SET_SOFTINT_I wr %r5, 0x15a9, %set_softint
5735fpinit_1_45:
5736 nop
5737 setx fp_data_quads, %r19, %r20
5738 ldd [%r20], %f0
5739 ldd [%r20+8], %f4
5740 ld [%r20+16], %fsr
5741 ld [%r20+24], %r19
5742 wr %r19, %g0, %gsr
5743 .word 0x87a80a44 ! 101: FCMPd fcmpd %fcc<n>, %f0, %f4
5744 .word 0x8d802004 ! 105: WRFPRS_I wr %r0, 0x0004, %fprs
5745 .word 0xe857e0b8 ! 109: LDSH_I ldsh [%r31 + 0x00b8], %r20
5746pmu_1_48:
5747 nop
5748 ta T_CHANGE_PRIV
5749 setx 0xffffffbcffffffab, %g1, %g7
5750 .word 0xa3800007 ! 113: WR_PERF_COUNTER_R wr %r0, %r7, %-
5751 .word 0xe737e150 ! 117: STQF_I - %f19, [0x0150, %r31]
5752 .word 0x89800011 ! 121: WRTICK_R wr %r0, %r17, %tick
5753 .word 0x91a50d29 ! 125: FsMULd fsmuld %f20, %f40, %f8
5754iaw_1_54:
5755 nop
5756 ta T_CHANGE_HPRIV
5757 mov 8, %r18
5758 rd %asi, %r12
5759 wr %r0, 0x41, %asi
5760 set sync_thr_counter4, %r23
5761#ifndef SPC
5762 ldxa [%g0]0x63, %r8
5763 and %r8, 0x38, %r8 ! Core ID
5764 add %r8, %r23, %r23
5765#else
5766 mov 0, %r8
5767#endif
5768 mov 0x1, %r16
5769iaw_startwait1_54:
5770 cas [%r23],%g0,%r16 !lock
5771 brz,a %r16, continue_iaw_1_54
5772 mov (~0x1&0xf), %r16
5773 ld [%r23], %r16
5774iaw_wait1_54:
5775 brnz %r16, iaw_wait1_54
5776 ld [%r23], %r16
5777 ba iaw_startwait1_54
5778 mov 0x1, %r16
5779continue_iaw_1_54:
5780 sllx %r16, %r8, %r16 !Mask for my core only
5781 ldxa [0x58]%asi, %r17 !Running_status
5782wait_for_stat_1_54:
5783 ldxa [0x50]%asi, %r13 !Running_rw
5784 cmp %r13, %r17
5785 bne,a %xcc, wait_for_stat_1_54
5786 ldxa [0x58]%asi, %r17 !Running_status
5787 stxa %r16, [0x68]%asi !Park (W1C)
5788 ldxa [0x50]%asi, %r14 !Running_rw
5789wait_for_iaw_1_54:
5790 ldxa [0x58]%asi, %r17 !Running_status
5791 cmp %r14, %r17
5792 bne,a %xcc, wait_for_iaw_1_54
5793 ldxa [0x50]%asi, %r14 !Running_rw
5794iaw_doit1_54:
5795 mov 0x38, %r18
5796iaw4_1_54:
5797 setx common_target, %r20, %r19
5798 or %r19, 0x1, %r19
5799 stxa %r19, [%r18]0x50
5800 stxa %r16, [0x60] %asi ! Unpark (W1S)
5801 st %g0, [%r23] !clear lock
5802 wr %r0, %r12, %asi ! restore %asi
5803 ta T_CHANGE_NONHPRIV
5804 .word 0xa7b50494 ! 129: FCMPLE32 fcmple32 %d20, %d20, %r19
5805splash_lsu_1_56:
5806 nop
5807 ta T_CHANGE_HPRIV
5808 set 0x4732dfa0, %r2
5809 mov 0x6, %r1
5810 sllx %r1, 32, %r1
5811 or %r1, %r2, %r2
5812 stxa %r2, [%r0] ASI_LSU_CONTROL
5813 .word 0x3d400001 ! 133: FBPULE fbule,a,pn %fcc0, <label_0x1>
5814brcommon3_1_58:
5815 nop
5816 setx common_target, %r12, %r27
5817 lduw [%r27], %r12 ! Load common dest into dcache ..
5818 ba,a .+12
5819 .word 0xe7e7c02b ! 1: CASA_I casa [%r31] 0x 1, %r11, %r19
5820 ba,a .+8
5821 jmpl %r27+0, %r27
5822 .word 0x8198375d ! 137: WRHPR_HPSTATE_I wrhpr %r0, 0x175d, %hpstate
5823 .word 0xe937e168 ! 141: STQF_I - %f20, [0x0168, %r31]
5824 .word 0x99b480f1 ! 145: EDGE16LN edge16ln %r18, %r17, %r12
5825brcommon3_1_64:
5826 nop
5827 setx common_target, %r12, %r27
5828 lduw [%r27], %r12 ! Load common dest into dcache ..
5829 ba,a .+12
5830 .word 0xd26fe030 ! 1: LDSTUB_I ldstub %r9, [%r31 + 0x0030]
5831 ba,a .+8
5832 jmpl %r27+0, %r27
5833 .word 0x8d903fc7 ! 149: WRPR_PSTATE_I wrpr %r0, 0x1fc7, %pstate
5834#if (defined SPC || defined CMP)
5835!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_65)+0, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
5836!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_65)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
5837xir_1_65:
5838#else
5839#if (defined FC)
5840!! Generate XIR via RESET_GEN register
5841!! ta T_CHANGE_HPRIV
5842!! rdpr %pstate, %r18
5843!! andn %r18, 0x208, %r18 ! Reset pstate.am,cle
5844!! wrpr %r18, %pstate
5845#ifndef XIR_RND_CORES
5846!! ldxa [%g0] 0x63, %o1
5847!! mov 1, %r18
5848!! sllx %r18, %o1, %r18
5849#endif
5850!! mov 0x30, %r19
5851!! setx 0x8900000808, %r16, %r17
5852!! mov 0x2, %r16
5853!!xir_1_65:
5854!! stxa %r18, [%r19] 0x41
5855!! stx %r16, [%r17]
5856#endif
5857#endif
5858 .word 0xa98176d8 ! 153: WR_SET_SOFTINT_I wr %r5, 0x16d8, %set_softint
5859splash_hpstate_1_66:
5860 .word 0x22800001 ! 1: BE be,a <label_0x1>
5861 .word 0x81983d05 ! 157: WRHPR_HPSTATE_I wrhpr %r0, 0x1d05, %hpstate
5862pmu_1_67:
5863 nop
5864 ta T_CHANGE_PRIV
5865 setx 0xffffffb1ffffffab, %g1, %g7
5866 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
5867 rd %tick, %r28
5868#if (MAX_THREADS == 8)
5869 sethi %hi(0x33800), %r27
5870#else
5871 sethi %hi(0x30000), %r27
5872#endif
5873 andn %r28, %r27, %r28
5874 ta T_CHANGE_HPRIV
5875 stxa %r28, [%g0] 0x73
5876 .word 0xc36d34f5 ! 1: PREFETCH_I prefetch [%r20 + 0xfffff4f5], #one_read
5877intvec_1_69:
5878 .word 0x91a489d4 ! 165: FDIVd fdivd %f18, %f20, %f8
5879brcommon2_1_71:
5880 nop
5881 setx common_target, %r12, %r27
5882 ba,a .+12
5883 .word 0xa1a7c96d ! 1: FMULq dis not found
5884
5885 ba,a .+8
5886 jmpl %r27+0, %r27
5887 .word 0xc19fe1a0 ! 169: LDDFA_I ldda [%r31, 0x01a0], %f0
5888 bne,a skip_1_74
5889 fbue,a,pn %fcc0, skip_1_74
5890.align 32
5891skip_1_74:
5892 .word 0x24cc8001 ! 173: BRLEZ brlez,a,pt %r18,<label_0xc8001>
5893 .word 0xd337e1a2 ! 177: STQF_I - %f9, [0x01a2, %r31]
5894splash_lsu_1_78:
5895 nop
5896 ta T_CHANGE_HPRIV
5897 set 0x43decb13, %r2
5898 mov 0x4, %r1
5899 sllx %r1, 32, %r1
5900 or %r1, %r2, %r2
5901 .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1>
5902 stxa %r2, [%r0] ASI_LSU_CONTROL
5903 .word 0x3d400001 ! 181: FBPULE fbule,a,pn %fcc0, <label_0x1>
5904splash_lsu_1_79:
5905 nop
5906 ta T_CHANGE_HPRIV
5907 set 0xcce89410, %r2
5908 mov 0x5, %r1
5909 sllx %r1, 32, %r1
5910 or %r1, %r2, %r2
5911 stxa %r2, [%r0] ASI_LSU_CONTROL
5912 .word 0x3d400001 ! 185: FBPULE fbule,a,pn %fcc0, <label_0x1>
5913jmptr_1_82:
5914 nop
5915 best_set_reg(0xe0a00000, %r20, %r27)
5916 .word 0xb7c6c000 ! 189: JMPL_R jmpl %r27 + %r0, %r27
5917 .word 0x89800011 ! 193: WRTICK_R wr %r0, %r17, %tick
5918 .word 0xd33fe11c ! 197: STDF_I std %f9, [0x011c, %r31]
5919 nop
5920 nop
5921 ta T_CHANGE_PRIV
5922 wrpr %g0, %g0, %gl
5923 nop
5924 nop
5925
5926join_lbl_0_0:
5927SECTION .MAIN
5928.text
5929diag_finish:
5930 nop
5931 nop
5932 nop
5933 ta T_CHANGE_HPRIV
5934#if (MULTIPASS > 0)
5935multipass_check:
5936 rd %asi, %r12
5937 wr %g0, ASI_SCRATCHPAD, %asi
5938 ldxa [0x38]%asi, %r10
5939 cmp %r10, MULTIPASS
5940 inc %r10
5941 stxa %r10, [0x38]%asi
5942 wr %g0, %r12, %asi
5943 bne fork_threads
5944 wrpr %g0, %g0, %gl
5945#endif
5946finish_diag:
5947 best_set_reg(HV_TRAP_BASE_PA, %r1, %r2)
5948 wrhpr %g2, %g0, %htba
5949 ta T_GOOD_TRAP
5950 nop
5951 nop
5952 nop
5953.data
5954 .xword 0x0
5955 ! fp data rs1, rs2, fsr, gsr quads ..
5956.global fp_data_quads
5957fp_data_quads:
5958 .xword 0x0044000000000000
5959 .xword 0x4028000000000000
5960 .xword 0x0fc0400400000000
5961 .xword 0x0000000000000000
5962 .xword 0x0041000000000000
5963 .xword 0x4022000000000000
5964 .xword 0x0600800000000000
5965 .xword 0x0000000000000000
5966 .xword 0x0220000000000000
5967 .xword 0x4140000000000000
5968 .xword 0x4fc0400400000000
5969 .xword 0x0000000000000000
5970 .xword 0x4090000000000000
5971 .xword 0x0090000000000000
5972 .xword 0x0f80400800000000
5973 .xword 0x0a00000000000000
5974.align 128
5975.global user_data_start
5976.data
5977user_data_start:
5978
5979 .xword 0xee5fb12eadb27577
5980 .xword 0xa644ecb0149b50ac
5981 .xword 0x1edc3e065d307083
5982 .xword 0x5c8b9251a1b8bd17
5983 .xword 0x21b37cc9d9532d14
5984 .xword 0x70ac77ff3366c7c7
5985 .xword 0xdcecebf360f0dae8
5986 .xword 0x322cb53de3ad4d09
5987 .xword 0xb9565b1a36694a68
5988 .xword 0xe390efde9d20cc7e
5989 .xword 0x87c2cd431aebd7f8
5990 .xword 0xfc2bb80b29ecb3dd
5991 .xword 0xc0b6002d2e30dd08
5992 .xword 0x5d87b9a10c8568b9
5993 .xword 0x1d3b3898ad23619e
5994 .xword 0xc3f80615b7fcabb4
5995 .xword 0x612a94faeeeb00bf
5996 .xword 0x6365361a8682a1a0
5997 .xword 0x2bc88ca1c633b0f2
5998 .xword 0x3a39b5a4c8ad6349
5999 .xword 0x849dab0d617c5db8
6000 .xword 0x0e4b61e5a209f0d7
6001 .xword 0x275778e89b028abc
6002 .xword 0x16a3b2f0dc82d835
6003 .xword 0xd39e194f3f62bb32
6004 .xword 0xd0c14471c68fb1a9
6005 .xword 0xd5c762ffd42bc98a
6006 .xword 0x9302d68a3340d9d8
6007 .xword 0x5ae5a223c78a867e
6008 .xword 0x7a75989d7b4761d1
6009 .xword 0x67d60bf43b6e1f8e
6010 .xword 0xcc1cbb050d71ba01
6011 .xword 0x265b319b9424c7ff
6012 .xword 0x4c8d099799e16446
6013 .xword 0xaa704ce40edf7ec8
6014 .xword 0x90b6b66ed6987697
6015 .xword 0x6102e2ceccffb160
6016 .xword 0x4a5e70c9ed3f28fd
6017 .xword 0xebb7334070d65306
6018 .xword 0x2c4e636270daa770
6019 .xword 0x2669d902073b2d27
6020 .xword 0x359de2cba0b9eae4
6021 .xword 0xbff774a0277519b6
6022 .xword 0x8d8e57d9384e834f
6023 .xword 0x94bca09fa8109ef8
6024 .xword 0xf2d38e97731430a2
6025 .xword 0xd733120ca5a98e5e
6026 .xword 0x9edd9f15fa4f4e32
6027 .xword 0xdb2ba8278c8f3e7d
6028 .xword 0xcbc6a8d3fb5f322e
6029 .xword 0xb67928cec2bffb49
6030 .xword 0xe9e20f0a26b32bad
6031 .xword 0x7d2841bb79505a84
6032 .xword 0x8562463e2288d1ae
6033 .xword 0xf0ff5c64702f12f9
6034 .xword 0x5563124bd23c1abc
6035 .xword 0x8215e1819a15b741
6036 .xword 0x23df42298a508d80
6037 .xword 0x6d827d51c0521012
6038 .xword 0x2a345fd587278141
6039 .xword 0xc1e3d7a27d733f66
6040 .xword 0xa7722fcd142eb1c0
6041 .xword 0xf7d18390e0059c86
6042 .xword 0x9ee4f5161143ce53
6043 .xword 0xf7eb7f828ba536e3
6044 .xword 0x1830317c7eb2d6fa
6045 .xword 0x989a30ff781d01e9
6046 .xword 0x57633429ac93f3f9
6047 .xword 0x1573d996dc06925d
6048 .xword 0xf6f7577444473312
6049 .xword 0x4c6dfcfbf0f0c0f4
6050 .xword 0x7aa96b4a822d995f
6051 .xword 0x66d77c0c38eabdfa
6052 .xword 0x2db2589367bb5342
6053 .xword 0x56d55c57fce51825
6054 .xword 0xd21ea2c7b5a988de
6055 .xword 0x16f648e692dabcf0
6056 .xword 0x3b8cf255678afa4c
6057 .xword 0x3230c6533b927902
6058 .xword 0xda044e55c9aadb21
6059 .xword 0xc331d50e0e01ad0a
6060 .xword 0x2e7e4a1c31d872e9
6061 .xword 0xea3e710aacdf51c2
6062 .xword 0xf8531113a8a4cc48
6063 .xword 0x1d9ea839c5b8fc76
6064 .xword 0x495179b2d28f8e67
6065 .xword 0xdb6d23915138542e
6066 .xword 0xb3b5fad598af793c
6067 .xword 0x506100c5c6dee448
6068 .xword 0x0c58a4e45629aab9
6069 .xword 0xc5101dc1a0ca8acc
6070 .xword 0x3593a209d360ed26
6071 .xword 0x527f361880a177fa
6072 .xword 0x3bc1058abc9b456b
6073 .xword 0x6242d3dadc8f6d94
6074 .xword 0xbb27766c693eb739
6075 .xword 0x2708c1b2dbc6a1d5
6076 .xword 0xb5bb959c7ceefb60
6077 .xword 0xfb6e46fc954a3531
6078 .xword 0x3e7a8e1be2f2685b
6079 .xword 0x39c5901996da9e0e
6080 .xword 0x489f3c981badb88a
6081 .xword 0xfc0d9e6dac0ad0bd
6082 .xword 0x6aa26319bd4c2b4a
6083 .xword 0xd777a413a430666d
6084 .xword 0x6f382902fae5ff04
6085 .xword 0x0327ff3451efeeaa
6086 .xword 0x2e219e83b2fdc0b3
6087 .xword 0xac27b347508cab68
6088 .xword 0x16edcc05bc45ced6
6089 .xword 0xe8da1204b469d2d8
6090 .xword 0xd737f5037e71951b
6091 .xword 0x7d12c5a38e99d2e1
6092 .xword 0xa0eea92a70c567fb
6093 .xword 0xa910706b7e511767
6094 .xword 0x449dd172ce0b4815
6095 .xword 0xbf40a52a3f9d095e
6096 .xword 0x8b56b6bb8a8d220f
6097 .xword 0x2c756adef16942fb
6098 .xword 0x34c3c634e20a6ba8
6099 .xword 0x0ae4f05ef60509e4
6100 .xword 0xdc2bb93e56dff3d6
6101 .xword 0xeece674c55fd3401
6102 .xword 0xf06017c5f3adf638
6103 .xword 0x35f33e4391437f7a
6104 .xword 0x56f41feac9464cd1
6105 .xword 0xb3f205b334e899cb
6106 .xword 0xc991dc11bac5b10b
6107 .xword 0xf4f0213abf7096a5
6108 .xword 0x2ce77968acac1391
6109 .xword 0x6fef680cf1845ffa
6110 .xword 0xf346d8ccef9d2425
6111 .xword 0x1372905b847863e2
6112 .xword 0x5fad8c070b1b10f0
6113 .xword 0xbcc355cbccea794b
6114 .xword 0x76d265aa42e7e367
6115 .xword 0x36c5d9a6ad6198b9
6116 .xword 0x9496bd90eb82566a
6117 .xword 0xe06730d999baece3
6118 .xword 0x470317cd015ce0a0
6119 .xword 0xde87b12d29361264
6120 .xword 0x2aa54b77fffb5d94
6121 .xword 0xdc9cffd195c9641c
6122 .xword 0x9c919684cb4ac7f0
6123 .xword 0x0758d5429230bf42
6124 .xword 0xedf9f30858ab0c7f
6125 .xword 0x11f9463d4647d42e
6126 .xword 0x77931bf6860ab05e
6127 .xword 0x17ac2051ae845ef8
6128 .xword 0x8ec88dffdbd1500a
6129 .xword 0x68e88cf231ffb207
6130 .xword 0x7f85fc8db90ed432
6131 .xword 0x9e52ad44029cf7df
6132 .xword 0x9914d88ade338345
6133 .xword 0x3decefd2870646dd
6134 .xword 0xdea5c803d79559b1
6135 .xword 0xcab4a40342f15a3a
6136 .xword 0x9019da3505944632
6137 .xword 0xc1b57e32dbd1e59e
6138 .xword 0xd18a72c639641499
6139 .xword 0x587c9ee7436f460d
6140 .xword 0x4b9a7c305c5f9681
6141 .xword 0x55f16f806544c705
6142 .xword 0xd4e42223747337e8
6143 .xword 0x28e1a7f0f86a19c0
6144 .xword 0x454215942dd8ed5a
6145 .xword 0xf13a1f4d4eab404e
6146 .xword 0xd88a206de09da6e1
6147 .xword 0x11b6155ef579b811
6148 .xword 0x84b0a65b1c4f4da9
6149 .xword 0x5b3c5a7f625dc5ec
6150 .xword 0x14564a56932b3fcd
6151 .xword 0x3e37bcae61d0df57
6152 .xword 0x3c8c121f7c38b67d
6153 .xword 0xa4669242a3a2c787
6154 .xword 0x2f021d09df336a6a
6155 .xword 0x0bbae949d8a7be14
6156 .xword 0xe3d20c7982e26ff0
6157 .xword 0x69a39c7c6ac36464
6158 .xword 0xd57f61f844032087
6159 .xword 0xfecdfdf4b832f810
6160 .xword 0x659f96236622758f
6161 .xword 0xc631cf69329fce85
6162 .xword 0x90b65d9059f863eb
6163 .xword 0xd13b4825743e8c61
6164 .xword 0xb62fcf2008e6fcc6
6165 .xword 0x85bbb70432e7f3f7
6166 .xword 0xdf03d4489d554fed
6167 .xword 0xddc5160f135a26f6
6168 .xword 0xb3040cca57f35d07
6169 .xword 0x3f62d646c47a2a0b
6170 .xword 0xc4511abb801de421
6171 .xword 0x8816d23be4637d2d
6172 .xword 0xb0bc6536d68e8f71
6173 .xword 0x63adb91c4a225fee
6174 .xword 0x37b5bc1d2c2e0b6a
6175 .xword 0x58d966297f09c943
6176 .xword 0x6ddc05b1f32f2240
6177 .xword 0xc19e53afcc7eb495
6178 .xword 0x24ba7410f69d3bbc
6179 .xword 0x631f7d28abf18897
6180 .xword 0xe914433e45d7b395
6181 .xword 0xdc871b7797fab402
6182 .xword 0xbcdabb41f57265d7
6183 .xword 0x7ae0c9e03beceb19
6184 .xword 0x2662beb64ca0fa5b
6185 .xword 0x9ff5da8a0399543c
6186 .xword 0x074f7121739852be
6187 .xword 0x2fcd309ebeb37088
6188 .xword 0xda293bb0e65b86ab
6189 .xword 0xc7031996479715c3
6190 .xword 0x0198100d05d53731
6191 .xword 0x7e4271d1bbcd35e0
6192 .xword 0x51c658f45eb11649
6193 .xword 0x77cf831475fedcce
6194 .xword 0xe975cd9251ce3068
6195 .xword 0x4c66d4497e619456
6196 .xword 0xf68bb29a87a2cf31
6197 .xword 0x4ad33eb2947cb041
6198 .xword 0x8f7036e4058618df
6199 .xword 0xf9be3aaae52d6e7c
6200 .xword 0x35c7c6e8d26f8b08
6201 .xword 0x5f39429a8be44e95
6202 .xword 0xc784d3d8d146c7a8
6203 .xword 0x9af57a6f581c7da3
6204 .xword 0x9c3801f0eda7fc12
6205 .xword 0xff031c870bbb99f9
6206 .xword 0xe20832c2a1e977e7
6207 .xword 0xb5cc74711ed8583c
6208 .xword 0x901849a530869c90
6209 .xword 0x70bfe54451579ada
6210 .xword 0x06737f024c9cf7cd
6211 .xword 0x9c900f57cfd3e65a
6212 .xword 0x603b9fdc1757c901
6213 .xword 0xbc46223bb095e19c
6214 .xword 0xf96bdb5751667dc1
6215 .xword 0xe5a08439687f359e
6216 .xword 0x8b665ccfb4e8bf3d
6217 .xword 0x83668367b1a2fbf8
6218 .xword 0x3c63594bb8e4da52
6219 .xword 0xc9a28c00cc41f9cc
6220 .xword 0x5aea89402eb6e426
6221 .xword 0xd6947077a15f500c
6222 .xword 0xc74a3785111c3b78
6223 .xword 0x8ffb525e5d36d8f1
6224 .xword 0x61b362c66ed0794a
6225 .xword 0xc46f72700d2f25e7
6226 .xword 0xdaad218f87fc93fc
6227 .xword 0x08709e4242012b44
6228 .xword 0xddbb9ab1dc7d5073
6229 .xword 0x6c4844888ab18e8f
6230 .xword 0x3ebb41a6d5f7e817
6231 .xword 0x612d22410269dac1
6232 .xword 0x3d336ff7eac271eb
6233 .xword 0x563af5c03881ad35
6234 .xword 0xdc0363de141d0220
6235
6236SECTION .HTRAPS
6237.text
6238.global restore_range_regs
6239restore_range_regs:
6240 wr %g0, ASI_MMU_REAL_RANGE, %asi
6241 mov 1, %g1
6242 sllx %g1, 63, %g1
6243 ldxa [ASI_MMU_REAL_RANGE_0] %asi, %g2
6244 or %g2 ,%g1, %g2
6245 stxa %g2, [ASI_MMU_REAL_RANGE_0] %asi
6246 ldxa [ASI_MMU_REAL_RANGE_1] %asi, %g2
6247 or %g2 ,%g1, %g2
6248 stxa %g2, [ASI_MMU_REAL_RANGE_1] %asi
6249 ldxa [ASI_MMU_REAL_RANGE_2] %asi, %g2
6250 or %g2 ,%g1, %g2
6251 stxa %g2, [ASI_MMU_REAL_RANGE_2] %asi
6252 ldxa [ASI_MMU_REAL_RANGE_3] %asi, %g2
6253 or %g2 ,%g1, %g2
6254 stxa %g2, [ASI_MMU_REAL_RANGE_3] %asi
6255 retry
6256
6257.global wdog_2_ext
6258# 10 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_extensions.s"
6259SECTION .HTRAPS
6260.global wdog_2_ext
6261.global retry_with_base_tba
6262.global resolve_bad_tte
6263
6264.text
6265resolve_bad_tte:
6266 !if pc[13:5]==0, then assume not a relocated handler
6267 rdpr %tpc, %r4
6268 andn %r4, 0xf, %r5
6269 sllx %r5, 49, %r5
6270 brnz,a %r5, retry_with_base_tba
6271 !assume %r27 is where we came from ..
6272 fdivd %f0, %f4, %f12
6273 jmpl %r27+8, %r0
6274 fdivs %f0, %f4, %f12
6275retry_with_base_tba:
6276 best_set_reg(TRAP_BASE_VA, %r3, %r5)
6277 cmp %r4, %r5
6278 bz htrap_5_ext_done
6279 set 0x7fff, %r3
6280 and %r4, %r3, %r4
6281 or %r5, %r4, %r4
6282 wrpr %r4, %tpc
6283 rdpr %tnpc, %r4
6284 and %r4, %r3, %r4
6285 or %r5, %r4, %r4
6286 wrpr %r4, %tnpc
6287 retry
6288
6289htrap_5_ext:
6290 rd %pc, %l2
6291 inc %l3
6292 add %l2, htrap_5_ext_done-htrap_5_ext, %l2
6293 rdpr %tl, %l3
6294 rdpr %tstate, %l4
6295 rdhpr %htstate, %l5
6296 or %l5, 0x4, %l5
6297 inc %l3
6298 wrpr %l3, %tl
6299 wrpr %l2, %tpc
6300 add %l2, 4, %l2
6301 wrpr %l2, %tnpc
6302 wrpr %l4, %tstate
6303 wrhpr %l5, %htstate
6304 retry
6305htrap_5_ext_done:
6306 done
6307
6308wdog_2_ext:
6309 mov 0x1f, %l1
6310 stxa %l1, [%g0] ASI_LSU_CTL_REG
6311 ! If TT != 2, then goto trap handler
6312 rdpr %tt, %l1
6313 cmp %l1, 0x2
6314 bne wdog_2_goto_handler
6315 nop
6316 ! else done
6317 done
6318wdog_2_goto_handler:
6319 rdhpr %htstate, %l3
6320 and %l3, 0x4, %l3 ! If previously in hpriv mode, go to hpriv
6321 brnz,a %l3, wdog_2_goto_handler_1
6322 rdhpr %htba, %l3
6323 srlx %l1, 7, %l3 ! Send priv sw traps to priv mode ..
6324 cmp %l3, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap ..
6325 be,a wdog_2_goto_handler_1
6326 rdpr %tba, %l3
6327 rdhpr %htba, %l3
6328wdog_2_goto_handler_1:
6329 sllx %l1, 5, %l1
6330 add %l1, %l3, %l3
6331 jmp %l3
6332 nop
6333# 86 "/import/n2-aus-localdir1/somePerson/n2cdmspp2/verif/diag/assembly/include/tlu_custom_trap_extensions.s"
6334! Red mode other reset handler
6335! Get htba, and tt and make trap address
6336! Jump to trap handler ..
6337
6338SECTION .RED_SEC
6339.global red_other_ext
6340.global wdog_red_ext
6341.text
6342red_other_ext:
6343 ! IF TL=6, shift stack by one ..
6344 rdpr %tl, %l1
6345 cmp %l1, 6
6346 be start_tsa_shift
6347 nop
6348
6349continue_red_other:
6350 mov 0x1f, %l1
6351 stxa %l1, [%g0] ASI_LSU_CTL_REG
6352
6353 rdpr %tt, %l1
6354
6355 rdhpr %htstate, %l2
6356 and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv
6357 brnz,a %l2, red_goto_handler
6358 rdhpr %htba, %l2
6359 srlx %l1, 7, %l2 ! Send priv sw traps to priv mode ..
6360 cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap ..
6361 be,a red_goto_handler
6362 rdpr %tba, %l2
6363 rdhpr %htba, %l2
6364red_goto_handler:
6365
6366 sllx %l1, 5, %l1
6367 add %l1, %l2, %l2
6368 rdhpr %hpstate, %l1
6369 jmp %l2
6370 wrhpr %l1, 0x20, %hpstate
6371 nop
6372
6373wdog_red_ext:
6374 ! Shift stack down by 1 ...
6375 rdpr %tl, %l1
6376 cmp %l1, 6
6377 bl wdog_end
6378start_tsa_shift:
6379 mov 0x2, %l2
6380
6381tsa_shift:
6382 wrpr %l2, %tl
6383 rdpr %tt, %l3
6384 rdpr %tpc, %l4
6385 rdpr %tnpc, %l5
6386 rdpr %tstate, %l6
6387 rdhpr %htstate, %l7
6388 dec %l2
6389 wrpr %l2, %tl
6390 wrpr %l3, %tt
6391 wrpr %l4, %tpc
6392 wrpr %l5, %tnpc
6393 wrpr %l6, %tstate
6394 wrhpr %l7, %htstate
6395 add %l2, 2, %l2
6396 cmp %l2, %l1
6397 ble tsa_shift
6398 nop
6399tsa_shift_done:
6400 dec %l1
6401 wrpr %l1, %tl
6402
6403wdog_end:
6404 ! If TT != 2, then goto trap handler
6405 rdpr %tt, %l1
6406
6407 cmp %l1, 0x2
6408 bne continue_red_other
6409 nop
6410 ! else done
6411 mov 0x1f, %l1
6412 stxa %l1, [%g0] ASI_LSU_CTL_REG
6413 done
6414# 1133 "diag.j.pp"
6415
6416SECTION .CWQ_DATA DATA_VA =0x4000
6417attr_data {
6418 Name = .CWQ_DATA
6419 hypervisor
6420}
6421
6422.data
6423.align 16
6424.global msg
6425msg:
6426.xword 0xad32fa52374cc6ba
6427.xword 0x4cbf52280549003a
6428
6429.align 16
6430.global results
6431results:
6432.xword 0xDEADBEEFDEADBEEF
6433.xword 0xDEADBEEFDEADBEEF
6434!# CWQ data area
6435!# CWQ_BASE for core N is CWQ_BASE+(N*256)
6436!# CWQ_LAST for core N is CWQ_LAST+(N*256)
6437.align 64
6438.global CWQ_BASE
6439CWQ_BASE:
6440.xword 0xAAAAAAAAAAAAAAA
6441.xword 0xAAAAAAAAAAAAAAA
6442.xword 0xAAAAAAAAAAAAAAA
6443.xword 0xAAAAAAAAAAAAAAA
6444.xword 0xAAAAAAAAAAAAAAA
6445.xword 0xAAAAAAAAAAAAAAA
6446.xword 0xAAAAAAAAAAAAAAA
6447.xword 0xAAAAAAAAAAAAAAA
6448.xword 0xAAAAAAAAAAAAAAA
6449.xword 0xAAAAAAAAAAAAAAA
6450.xword 0xAAAAAAAAAAAAAAA
6451.xword 0xAAAAAAAAAAAAAAA
6452.xword 0xAAAAAAAAAAAAAAA
6453.xword 0xAAAAAAAAAAAAAAA
6454.xword 0xAAAAAAAAAAAAAAA
6455.xword 0xAAAAAAAAAAAAAAA
6456.xword 0xAAAAAAAAAAAAAAA
6457.xword 0xAAAAAAAAAAAAAAA
6458.xword 0xAAAAAAAAAAAAAAA
6459.xword 0xAAAAAAAAAAAAAAA
6460.xword 0xAAAAAAAAAAAAAAA
6461.xword 0xAAAAAAAAAAAAAAA
6462.xword 0xAAAAAAAAAAAAAAA
6463.xword 0xAAAAAAAAAAAAAAA
6464.global CWQ_LAST
6465.align 64
6466CWQ_LAST:
6467.word 0x0
6468.align 64
6469cwq_base1:
6470.xword 0xAAAAAAAAAAAAAAA
6471.xword 0xAAAAAAAAAAAAAAA
6472.xword 0xAAAAAAAAAAAAAAA
6473.xword 0xAAAAAAAAAAAAAAA
6474.xword 0xAAAAAAAAAAAAAAA
6475.xword 0xAAAAAAAAAAAAAAA
6476.xword 0xAAAAAAAAAAAAAAA
6477.xword 0xAAAAAAAAAAAAAAA
6478.xword 0xAAAAAAAAAAAAAAA
6479.xword 0xAAAAAAAAAAAAAAA
6480.xword 0xAAAAAAAAAAAAAAA
6481.xword 0xAAAAAAAAAAAAAAA
6482.xword 0xAAAAAAAAAAAAAAA
6483.xword 0xAAAAAAAAAAAAAAA
6484.xword 0xAAAAAAAAAAAAAAA
6485.xword 0xAAAAAAAAAAAAAAA
6486.xword 0xAAAAAAAAAAAAAAA
6487.xword 0xAAAAAAAAAAAAAAA
6488.xword 0xAAAAAAAAAAAAAAA
6489.xword 0xAAAAAAAAAAAAAAA
6490.xword 0xAAAAAAAAAAAAAAA
6491.xword 0xAAAAAAAAAAAAAAA
6492.xword 0xAAAAAAAAAAAAAAA
6493.xword 0xAAAAAAAAAAAAAAA
6494.align 64
6495cwq_last1:
6496.word 0x0
6497.align 64
6498.xword 0xAAAAAAAAAAAAAAA
6499.xword 0xAAAAAAAAAAAAAAA
6500.xword 0xAAAAAAAAAAAAAAA
6501.xword 0xAAAAAAAAAAAAAAA
6502.xword 0xAAAAAAAAAAAAAAA
6503.xword 0xAAAAAAAAAAAAAAA
6504.xword 0xAAAAAAAAAAAAAAA
6505.xword 0xAAAAAAAAAAAAAAA
6506.xword 0xAAAAAAAAAAAAAAA
6507.xword 0xAAAAAAAAAAAAAAA
6508.xword 0xAAAAAAAAAAAAAAA
6509.xword 0xAAAAAAAAAAAAAAA
6510.xword 0xAAAAAAAAAAAAAAA
6511.xword 0xAAAAAAAAAAAAAAA
6512.xword 0xAAAAAAAAAAAAAAA
6513.xword 0xAAAAAAAAAAAAAAA
6514.xword 0xAAAAAAAAAAAAAAA
6515.xword 0xAAAAAAAAAAAAAAA
6516.xword 0xAAAAAAAAAAAAAAA
6517.xword 0xAAAAAAAAAAAAAAA
6518.xword 0xAAAAAAAAAAAAAAA
6519.xword 0xAAAAAAAAAAAAAAA
6520.xword 0xAAAAAAAAAAAAAAA
6521.xword 0xAAAAAAAAAAAAAAA
6522.align 64
6523.word 0x0
6524.align 64
6525.xword 0xAAAAAAAAAAAAAAA
6526.xword 0xAAAAAAAAAAAAAAA
6527.xword 0xAAAAAAAAAAAAAAA
6528.xword 0xAAAAAAAAAAAAAAA
6529.xword 0xAAAAAAAAAAAAAAA
6530.xword 0xAAAAAAAAAAAAAAA
6531.xword 0xAAAAAAAAAAAAAAA
6532.xword 0xAAAAAAAAAAAAAAA
6533.xword 0xAAAAAAAAAAAAAAA
6534.xword 0xAAAAAAAAAAAAAAA
6535.xword 0xAAAAAAAAAAAAAAA
6536.xword 0xAAAAAAAAAAAAAAA
6537.xword 0xAAAAAAAAAAAAAAA
6538.xword 0xAAAAAAAAAAAAAAA
6539.xword 0xAAAAAAAAAAAAAAA
6540.xword 0xAAAAAAAAAAAAAAA
6541.xword 0xAAAAAAAAAAAAAAA
6542.xword 0xAAAAAAAAAAAAAAA
6543.xword 0xAAAAAAAAAAAAAAA
6544.xword 0xAAAAAAAAAAAAAAA
6545.xword 0xAAAAAAAAAAAAAAA
6546.xword 0xAAAAAAAAAAAAAAA
6547.xword 0xAAAAAAAAAAAAAAA
6548.xword 0xAAAAAAAAAAAAAAA
6549.align 64
6550.word 0x0
6551.align 64
6552.xword 0xAAAAAAAAAAAAAAA
6553.xword 0xAAAAAAAAAAAAAAA
6554.xword 0xAAAAAAAAAAAAAAA
6555.xword 0xAAAAAAAAAAAAAAA
6556.xword 0xAAAAAAAAAAAAAAA
6557.xword 0xAAAAAAAAAAAAAAA
6558.xword 0xAAAAAAAAAAAAAAA
6559.xword 0xAAAAAAAAAAAAAAA
6560.xword 0xAAAAAAAAAAAAAAA
6561.xword 0xAAAAAAAAAAAAAAA
6562.xword 0xAAAAAAAAAAAAAAA
6563.xword 0xAAAAAAAAAAAAAAA
6564.xword 0xAAAAAAAAAAAAAAA
6565.xword 0xAAAAAAAAAAAAAAA
6566.xword 0xAAAAAAAAAAAAAAA
6567.xword 0xAAAAAAAAAAAAAAA
6568.xword 0xAAAAAAAAAAAAAAA
6569.xword 0xAAAAAAAAAAAAAAA
6570.xword 0xAAAAAAAAAAAAAAA
6571.xword 0xAAAAAAAAAAAAAAA
6572.xword 0xAAAAAAAAAAAAAAA
6573.xword 0xAAAAAAAAAAAAAAA
6574.xword 0xAAAAAAAAAAAAAAA
6575.xword 0xAAAAAAAAAAAAAAA
6576.align 64
6577.word 0x0
6578.align 64
6579.xword 0xAAAAAAAAAAAAAAA
6580.xword 0xAAAAAAAAAAAAAAA
6581.xword 0xAAAAAAAAAAAAAAA
6582.xword 0xAAAAAAAAAAAAAAA
6583.xword 0xAAAAAAAAAAAAAAA
6584.xword 0xAAAAAAAAAAAAAAA
6585.xword 0xAAAAAAAAAAAAAAA
6586.xword 0xAAAAAAAAAAAAAAA
6587.xword 0xAAAAAAAAAAAAAAA
6588.xword 0xAAAAAAAAAAAAAAA
6589.xword 0xAAAAAAAAAAAAAAA
6590.xword 0xAAAAAAAAAAAAAAA
6591.xword 0xAAAAAAAAAAAAAAA
6592.xword 0xAAAAAAAAAAAAAAA
6593.xword 0xAAAAAAAAAAAAAAA
6594.xword 0xAAAAAAAAAAAAAAA
6595.xword 0xAAAAAAAAAAAAAAA
6596.xword 0xAAAAAAAAAAAAAAA
6597.xword 0xAAAAAAAAAAAAAAA
6598.xword 0xAAAAAAAAAAAAAAA
6599.xword 0xAAAAAAAAAAAAAAA
6600.xword 0xAAAAAAAAAAAAAAA
6601.xword 0xAAAAAAAAAAAAAAA
6602.xword 0xAAAAAAAAAAAAAAA
6603.align 64
6604.word 0x0
6605.align 64
6606.xword 0xAAAAAAAAAAAAAAA
6607.xword 0xAAAAAAAAAAAAAAA
6608.xword 0xAAAAAAAAAAAAAAA
6609.xword 0xAAAAAAAAAAAAAAA
6610.xword 0xAAAAAAAAAAAAAAA
6611.xword 0xAAAAAAAAAAAAAAA
6612.xword 0xAAAAAAAAAAAAAAA
6613.xword 0xAAAAAAAAAAAAAAA
6614.xword 0xAAAAAAAAAAAAAAA
6615.xword 0xAAAAAAAAAAAAAAA
6616.xword 0xAAAAAAAAAAAAAAA
6617.xword 0xAAAAAAAAAAAAAAA
6618.xword 0xAAAAAAAAAAAAAAA
6619.xword 0xAAAAAAAAAAAAAAA
6620.xword 0xAAAAAAAAAAAAAAA
6621.xword 0xAAAAAAAAAAAAAAA
6622.xword 0xAAAAAAAAAAAAAAA
6623.xword 0xAAAAAAAAAAAAAAA
6624.xword 0xAAAAAAAAAAAAAAA
6625.xword 0xAAAAAAAAAAAAAAA
6626.xword 0xAAAAAAAAAAAAAAA
6627.xword 0xAAAAAAAAAAAAAAA
6628.xword 0xAAAAAAAAAAAAAAA
6629.xword 0xAAAAAAAAAAAAAAA
6630.align 64
6631.word 0x0
6632.align 64
6633.xword 0xAAAAAAAAAAAAAAA
6634.xword 0xAAAAAAAAAAAAAAA
6635.xword 0xAAAAAAAAAAAAAAA
6636.xword 0xAAAAAAAAAAAAAAA
6637.xword 0xAAAAAAAAAAAAAAA
6638.xword 0xAAAAAAAAAAAAAAA
6639.xword 0xAAAAAAAAAAAAAAA
6640.xword 0xAAAAAAAAAAAAAAA
6641.xword 0xAAAAAAAAAAAAAAA
6642.xword 0xAAAAAAAAAAAAAAA
6643.xword 0xAAAAAAAAAAAAAAA
6644.xword 0xAAAAAAAAAAAAAAA
6645.xword 0xAAAAAAAAAAAAAAA
6646.xword 0xAAAAAAAAAAAAAAA
6647.xword 0xAAAAAAAAAAAAAAA
6648.xword 0xAAAAAAAAAAAAAAA
6649.xword 0xAAAAAAAAAAAAAAA
6650.xword 0xAAAAAAAAAAAAAAA
6651.xword 0xAAAAAAAAAAAAAAA
6652.xword 0xAAAAAAAAAAAAAAA
6653.xword 0xAAAAAAAAAAAAAAA
6654.xword 0xAAAAAAAAAAAAAAA
6655.xword 0xAAAAAAAAAAAAAAA
6656.xword 0xAAAAAAAAAAAAAAA
6657.align 64
6658.word 0x0
6659
6660
6661
6662SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000280000, DATA_VA = 0x00000000002c0000
6663attr_text {
6664 Name = .MyHTRAPS_0,
6665 RA = 0x0000000000280000,
6666 PA = ra2pa(0x0000000000280000,0),
6667 part_0_ctx_zero_tsb_config_3,
6668 part_0_ctx_nonzero_tsb_config_3,
6669 TTE_G = 1,
6670 TTE_Context = 0,
6671 TTE_V = 1,
6672 TTE_Size = PART0_Z_PAGE_SIZE_3,
6673 TTE_NFO = 0,
6674 TTE_IE = 0,
6675 TTE_Soft2 = 0,
6676 TTE_Diag = 0,
6677 TTE_Soft = 0,
6678 TTE_L = 0,
6679 TTE_CP = 0,
6680 TTE_CV = 0,
6681 TTE_E = 0,
6682 TTE_P = 1,
6683 TTE_W = 0,
6684 TTE_X = 0
6685}
6686
6687
6688attr_data {
6689 Name = .MyHTRAPS_0,
6690 RA = 0x00000000002c0000,
6691 PA = ra2pa(0x00000000002c0000,0),
6692 part_0_ctx_zero_tsb_config_3,
6693 part_0_ctx_nonzero_tsb_config_3,
6694 TTE_G = 1,
6695 TTE_Context = 0,
6696 TTE_V = 1,
6697 TTE_Size = PART0_Z_PAGE_SIZE_3,
6698 TTE_NFO = 0,
6699 TTE_IE = 0,
6700 TTE_Soft2 = 0,
6701 TTE_Diag = 0,
6702 TTE_Soft = 0,
6703 TTE_L = 0,
6704 TTE_CP = 0,
6705 TTE_CV = 1,
6706 TTE_E = 0,
6707 TTE_P = 1,
6708 TTE_W = 0
6709}
6710
6711.text
6712#include "htraps.s"
6713#include "tlu_htraps_ext.s"
6714
6715
6716
6717SECTION .MyHTRAPS_1 TEXT_VA = 0x00000000002a0000, DATA_VA = 0x00000000002e0000
6718attr_text {
6719 Name = .MyHTRAPS_1,
6720 RA = 0x00000000002a0000,
6721 PA = ra2pa(0x00000000002a0000,0),
6722 part_0_ctx_zero_tsb_config_3,
6723 part_0_ctx_nonzero_tsb_config_3,
6724 TTE_G = 1,
6725 TTE_Context = 0,
6726 TTE_V = 1,
6727 TTE_Size = PART0_Z_PAGE_SIZE_3,
6728 TTE_NFO = 0,
6729 TTE_IE = 0,
6730 TTE_Soft2 = 0,
6731 TTE_Diag = 0,
6732 TTE_Soft = 0,
6733 TTE_L = 0,
6734 TTE_CP = 1,
6735 TTE_CV = 1,
6736 TTE_E = 1,
6737 TTE_P = 1,
6738 TTE_W = 0,
6739 TTE_X = 0
6740}
6741
6742
6743attr_data {
6744 Name = .MyHTRAPS_1,
6745 RA = 0x00000000002e0000,
6746 PA = ra2pa(0x00000000002e0000,0),
6747 part_0_ctx_zero_tsb_config_3,
6748 part_0_ctx_nonzero_tsb_config_3,
6749 TTE_G = 1,
6750 TTE_Context = 0,
6751 TTE_V = 1,
6752 TTE_Size = PART0_Z_PAGE_SIZE_3,
6753 TTE_NFO = 0,
6754 TTE_IE = 0,
6755 TTE_Soft2 = 0,
6756 TTE_Diag = 0,
6757 TTE_Soft = 0,
6758 TTE_L = 0,
6759 TTE_CP = 0,
6760 TTE_CV = 0,
6761 TTE_E = 0,
6762 TTE_P = 1,
6763 TTE_W = 0
6764}
6765
6766.text
6767#include "htraps.s"
6768#include "tlu_htraps_ext.s"
6769
6770
6771
6772SECTION .MyHTRAPS_2 TEXT_VA = 0x0000000200280000, DATA_VA = 0x00000002002c0000
6773attr_text {
6774 Name = .MyHTRAPS_2,
6775 RA = 0x0000000200280000,
6776 PA = ra2pa(0x0000000200280000,0),
6777 part_0_ctx_zero_tsb_config_3,
6778 part_0_ctx_nonzero_tsb_config_3,
6779 TTE_G = 1,
6780 TTE_Context = 0,
6781 TTE_V = 1,
6782 TTE_Size = PART0_Z_PAGE_SIZE_3,
6783 TTE_NFO = 0,
6784 TTE_IE = 0,
6785 TTE_Soft2 = 0,
6786 TTE_Diag = 0,
6787 TTE_Soft = 0,
6788 TTE_L = 0,
6789 TTE_CP = 1,
6790 TTE_CV = 1,
6791 TTE_E = 0,
6792 TTE_P = 1,
6793 TTE_W = 0,
6794 TTE_X = 0
6795}
6796
6797
6798attr_data {
6799 Name = .MyHTRAPS_2,
6800 RA = 0x00000002002c0000,
6801 PA = ra2pa(0x00000002002c0000,0),
6802 part_0_ctx_zero_tsb_config_3,
6803 part_0_ctx_nonzero_tsb_config_3,
6804 TTE_G = 1,
6805 TTE_Context = 0,
6806 TTE_V = 1,
6807 TTE_Size = PART0_Z_PAGE_SIZE_3,
6808 TTE_NFO = 0,
6809 TTE_IE = 0,
6810 TTE_Soft2 = 0,
6811 TTE_Diag = 0,
6812 TTE_Soft = 0,
6813 TTE_L = 0,
6814 TTE_CP = 1,
6815 TTE_CV = 1,
6816 TTE_E = 0,
6817 TTE_P = 1,
6818 TTE_W = 0
6819}
6820
6821.text
6822#include "htraps.s"
6823#include "tlu_htraps_ext.s"
6824
6825
6826
6827SECTION .MyHTRAPS_3 TEXT_VA = 0x00000002002a0000, DATA_VA = 0x00000002002e0000
6828attr_text {
6829 Name = .MyHTRAPS_3,
6830 RA = 0x00000002002a0000,
6831 PA = ra2pa(0x00000002002a0000,0),
6832 part_0_ctx_zero_tsb_config_3,
6833 part_0_ctx_nonzero_tsb_config_3,
6834 TTE_G = 1,
6835 TTE_Context = 0,
6836 TTE_V = 1,
6837 TTE_Size = PART0_Z_PAGE_SIZE_3,
6838 TTE_NFO = 0,
6839 TTE_IE = 0,
6840 TTE_Soft2 = 0,
6841 TTE_Diag = 0,
6842 TTE_Soft = 0,
6843 TTE_L = 0,
6844 TTE_CP = 1,
6845 TTE_CV = 0,
6846 TTE_E = 0,
6847 TTE_P = 1,
6848 TTE_W = 0,
6849 TTE_X = 0
6850}
6851
6852
6853attr_data {
6854 Name = .MyHTRAPS_3,
6855 RA = 0x00000002002e0000,
6856 PA = ra2pa(0x00000002002e0000,0),
6857 part_0_ctx_zero_tsb_config_3,
6858 part_0_ctx_nonzero_tsb_config_3,
6859 TTE_G = 1,
6860 TTE_Context = 0,
6861 TTE_V = 1,
6862 TTE_Size = PART0_Z_PAGE_SIZE_3,
6863 TTE_NFO = 0,
6864 TTE_IE = 0,
6865 TTE_Soft2 = 0,
6866 TTE_Diag = 0,
6867 TTE_Soft = 0,
6868 TTE_L = 0,
6869 TTE_CP = 0,
6870 TTE_CV = 0,
6871 TTE_E = 0,
6872 TTE_P = 1,
6873 TTE_W = 0
6874}
6875
6876.text
6877#include "htraps.s"
6878#include "tlu_htraps_ext.s"
6879
6880
6881
6882
6883
6884SECTION .MyTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x00000000003c0000
6885attr_text {
6886 Name = .MyTRAPS_0,
6887 RA = 0x0000000000380000,
6888 PA = ra2pa(0x0000000000380000,0),
6889 part_0_ctx_zero_tsb_config_3,
6890 part_0_ctx_nonzero_tsb_config_3,
6891 TTE_G = 1,
6892 TTE_Context = 0,
6893 TTE_V = 1,
6894 TTE_Size = PART0_Z_PAGE_SIZE_3,
6895 TTE_NFO = 0,
6896 TTE_IE = 0,
6897 TTE_Soft2 = 0,
6898 TTE_Diag = 0,
6899 TTE_Soft = 0,
6900 TTE_L = 0,
6901 TTE_CP = 1,
6902 TTE_CV = 1,
6903 TTE_E = 1,
6904 TTE_P = 1,
6905 TTE_W = 1,
6906 TTE_X = 0
6907}
6908
6909
6910attr_data {
6911 Name = .MyTRAPS_0,
6912 RA = 0x00000000003c0000,
6913 PA = ra2pa(0x00000000003c0000,0),
6914 part_0_ctx_zero_tsb_config_3,
6915 part_0_ctx_nonzero_tsb_config_3,
6916 TTE_G = 1,
6917 TTE_Context = 0,
6918 TTE_V = 1,
6919 TTE_Size = PART0_Z_PAGE_SIZE_3,
6920 TTE_NFO = 0,
6921 TTE_IE = 1,
6922 TTE_Soft2 = 0,
6923 TTE_Diag = 0,
6924 TTE_Soft = 0,
6925 TTE_L = 0,
6926 TTE_CP = 0,
6927 TTE_CV = 0,
6928 TTE_E = 0,
6929 TTE_P = 1,
6930 TTE_W = 1
6931}
6932
6933#include "traps.s"
6934
6935
6936
6937SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003e0000
6938attr_text {
6939 Name = .MyTRAPS_1,
6940 RA = 0x00000000003a0000,
6941 PA = ra2pa(0x00000000003a0000,0),
6942 part_0_ctx_zero_tsb_config_3,
6943 part_0_ctx_nonzero_tsb_config_3,
6944 TTE_G = 1,
6945 TTE_Context = 0,
6946 TTE_V = 1,
6947 TTE_Size = PART0_Z_PAGE_SIZE_3,
6948 TTE_NFO = 0,
6949 TTE_IE = 1,
6950 TTE_Soft2 = 0,
6951 TTE_Diag = 0,
6952 TTE_Soft = 0,
6953 TTE_L = 0,
6954 TTE_CP = 1,
6955 TTE_CV = 0,
6956 TTE_E = 0,
6957 TTE_P = 1,
6958 TTE_W = 1,
6959 TTE_X = 1
6960}
6961
6962
6963attr_data {
6964 Name = .MyTRAPS_1,
6965 RA = 0x00000000003e0000,
6966 PA = ra2pa(0x00000000003e0000,0),
6967 part_0_ctx_zero_tsb_config_3,
6968 part_0_ctx_nonzero_tsb_config_3,
6969 TTE_G = 1,
6970 TTE_Context = 0,
6971 TTE_V = 1,
6972 TTE_Size = PART0_Z_PAGE_SIZE_3,
6973 TTE_NFO = 0,
6974 TTE_IE = 0,
6975 TTE_Soft2 = 0,
6976 TTE_Diag = 0,
6977 TTE_Soft = 0,
6978 TTE_L = 0,
6979 TTE_CP = 0,
6980 TTE_CV = 1,
6981 TTE_E = 0,
6982 TTE_P = 1,
6983 TTE_W = 1
6984}
6985
6986#include "traps.s"
6987
6988
6989
6990SECTION .MyTRAPS_2 TEXT_VA = 0x0000000400380000, DATA_VA = 0x00000004003c0000
6991attr_text {
6992 Name = .MyTRAPS_2,
6993 RA = 0x0000000400380000,
6994 PA = ra2pa(0x0000000400380000,0),
6995 part_0_ctx_zero_tsb_config_3,
6996 part_0_ctx_nonzero_tsb_config_3,
6997 TTE_G = 1,
6998 TTE_Context = 0,
6999 TTE_V = 1,
7000 TTE_Size = PART0_Z_PAGE_SIZE_3,
7001 TTE_NFO = 1,
7002 TTE_IE = 0,
7003 TTE_Soft2 = 0,
7004 TTE_Diag = 0,
7005 TTE_Soft = 0,
7006 TTE_L = 0,
7007 TTE_CP = 1,
7008 TTE_CV = 0,
7009 TTE_E = 1,
7010 TTE_P = 1,
7011 TTE_W = 1,
7012 TTE_X = 1
7013}
7014
7015
7016attr_data {
7017 Name = .MyTRAPS_2,
7018 RA = 0x00000004003c0000,
7019 PA = ra2pa(0x00000004003c0000,0),
7020 part_0_ctx_zero_tsb_config_3,
7021 part_0_ctx_nonzero_tsb_config_3,
7022 TTE_G = 1,
7023 TTE_Context = 0,
7024 TTE_V = 1,
7025 TTE_Size = PART0_Z_PAGE_SIZE_3,
7026 TTE_NFO = 1,
7027 TTE_IE = 1,
7028 TTE_Soft2 = 0,
7029 TTE_Diag = 0,
7030 TTE_Soft = 0,
7031 TTE_L = 0,
7032 TTE_CP = 0,
7033 TTE_CV = 1,
7034 TTE_E = 0,
7035 TTE_P = 1,
7036 TTE_W = 1
7037}
7038
7039#include "traps.s"
7040
7041
7042
7043SECTION .MyTRAPS_3 TEXT_VA = 0x00000004003a0000, DATA_VA = 0x00000004003e0000
7044attr_text {
7045 Name = .MyTRAPS_3,
7046 RA = 0x00000004003a0000,
7047 PA = ra2pa(0x00000004003a0000,0),
7048 part_0_ctx_zero_tsb_config_3,
7049 part_0_ctx_nonzero_tsb_config_3,
7050 TTE_G = 1,
7051 TTE_Context = 0,
7052 TTE_V = 1,
7053 TTE_Size = PART0_Z_PAGE_SIZE_3,
7054 TTE_NFO = 0,
7055 TTE_IE = 1,
7056 TTE_Soft2 = 0,
7057 TTE_Diag = 0,
7058 TTE_Soft = 0,
7059 TTE_L = 0,
7060 TTE_CP = 0,
7061 TTE_CV = 0,
7062 TTE_E = 0,
7063 TTE_P = 1,
7064 TTE_W = 1,
7065 TTE_X = 1
7066}
7067
7068
7069attr_data {
7070 Name = .MyTRAPS_3,
7071 RA = 0x00000004003e0000,
7072 PA = ra2pa(0x00000004003e0000,0),
7073 part_0_ctx_zero_tsb_config_3,
7074 part_0_ctx_nonzero_tsb_config_3,
7075 TTE_G = 1,
7076 TTE_Context = 0,
7077 TTE_V = 1,
7078 TTE_Size = PART0_Z_PAGE_SIZE_3,
7079 TTE_NFO = 1,
7080 TTE_IE = 0,
7081 TTE_Soft2 = 0,
7082 TTE_Diag = 0,
7083 TTE_Soft = 0,
7084 TTE_L = 0,
7085 TTE_CP = 0,
7086 TTE_CV = 0,
7087 TTE_E = 0,
7088 TTE_P = 1,
7089 TTE_W = 1
7090}
7091
7092#include "traps.s"
7093
7094
7095
7096
7097
7098SECTION .MyDATA_0 TEXT_VA = 0x00000000e0140000, DATA_VA = 0x0000000060140000
7099attr_text {
7100 Name = .MyDATA_0,
7101 RA = 0x0000000170100000,
7102 PA = ra2pa(0x0000000170100000,0),
7103 part_0_ctx_zero_tsb_config_0,
7104 part_0_ctx_nonzero_tsb_config_0,
7105 TTE_G = 1,
7106 TTE_Context = PCONTEXT,
7107 TTE_V = 1,
7108 TTE_Size = 5,
7109 TTE_NFO = 0,
7110 TTE_IE = 1,
7111 TTE_Soft2 = 0,
7112 TTE_Diag = 0,
7113 TTE_Soft = 0,
7114 TTE_L = 0,
7115 TTE_CP = 1,
7116 TTE_CV = 1,
7117 TTE_E = 1,
7118 TTE_P = 0,
7119 TTE_W = 0
7120}
7121
7122
7123attr_data {
7124 Name = .MyDATA_0,
7125 RA = 0x0000000170100000,
7126 PA = ra2pa(0x0000000170100000,0),
7127 part_0_ctx_zero_tsb_config_1,
7128 part_0_ctx_nonzero_tsb_config_1,
7129 TTE_G = 1,
7130 TTE_Context = SCONTEXT,
7131 TTE_V = 1,
7132 TTE_Size = 0,
7133 TTE_NFO = 1,
7134 TTE_IE = 0,
7135 TTE_Soft2 = 0,
7136 TTE_Diag = 0,
7137 TTE_Soft = 0,
7138 TTE_L = 0,
7139 TTE_CP = 1,
7140 TTE_CV = 1,
7141 TTE_E = 0,
7142 TTE_P = 1,
7143 TTE_W = 0,
7144 tsbonly
7145}
7146
7147
7148attr_data {
7149 Name = .MyDATA_0,
7150 hypervisor
7151}
7152
7153
7154attr_text {
7155 Name = .MyDATA_0,
7156 hypervisor
7157}
7158
7159.data
7160 .xword 0xab25f2b39b15f5f4
7161 .xword 0x970623f10d97500e
7162 .xword 0x140641b6f5d47adc
7163 .xword 0xba157de4da6e3421
7164 .xword 0xdbd6787e1597d552
7165 .xword 0xa9f4700cdeaf2ae1
7166 .xword 0x420dcf5c521905b7
7167 .xword 0x2581e84bcb2a8b38
7168 .xword 0xb9812381055bfd05
7169 .xword 0xc859c26121830bf2
7170 .xword 0x6369863f46c12c7d
7171 .xword 0x5ff20715d1a05298
7172 .xword 0x789b42228a97b2dc
7173 .xword 0xcd1ec9aee70fe6a1
7174 .xword 0xcf03423d65360217
7175 .xword 0x12dc2ecbdbf1f045
7176 .xword 0x675fbc12804bfb44
7177 .xword 0xba243da81bf6770a
7178 .xword 0xc7173b14dcd14429
7179 .xword 0xc67bc0ffeee8bec9
7180 .xword 0x8701edc2d48e64d5
7181 .xword 0xbfd64ad060830ca2
7182 .xword 0xfd79684361f5d5ff
7183 .xword 0xadce0fb8ad69aef4
7184 .xword 0x6e3d1908cf238747
7185 .xword 0x86c05393c1d3e924
7186 .xword 0x8020b314bf7a8531
7187 .xword 0x97e217d9b660b289
7188 .xword 0xa09fc4f1da60b8fa
7189 .xword 0x1c223c62b1f0e40c
7190 .xword 0x33266d421acedd47
7191 .xword 0x682ba02829bd80a9
7192
7193
7194
7195SECTION .MyDATA_1 TEXT_VA = 0x00000000e0340000, DATA_VA = 0x0000000060340000
7196attr_text {
7197 Name = .MyDATA_1,
7198 RA = 0x0000000170300000,
7199 PA = ra2pa(0x0000000170300000,0),
7200 part_0_ctx_zero_tsb_config_0,
7201 part_0_ctx_nonzero_tsb_config_0,
7202 TTE_G = 1,
7203 TTE_Context = PCONTEXT,
7204 TTE_V = 1,
7205 TTE_Size = 3,
7206 TTE_NFO = 0,
7207 TTE_IE = 0,
7208 TTE_Soft2 = 0,
7209 TTE_Diag = 0,
7210 TTE_Soft = 0,
7211 TTE_L = 0,
7212 TTE_CP = 1,
7213 TTE_CV = 1,
7214 TTE_E = 0,
7215 TTE_P = 1,
7216 TTE_W = 0
7217}
7218
7219
7220attr_data {
7221 Name = .MyDATA_1,
7222 RA = 0x0000000170300000,
7223 PA = ra2pa(0x0000000170300000,0),
7224 part_0_ctx_zero_tsb_config_1,
7225 part_0_ctx_nonzero_tsb_config_1,
7226 TTE_G = 1,
7227 TTE_Context = SCONTEXT,
7228 TTE_V = 1,
7229 TTE_Size = 5,
7230 TTE_NFO = 1,
7231 TTE_IE = 0,
7232 TTE_Soft2 = 0,
7233 TTE_Diag = 0,
7234 TTE_Soft = 0,
7235 TTE_L = 0,
7236 TTE_CP = 1,
7237 TTE_CV = 1,
7238 TTE_E = 0,
7239 TTE_P = 1,
7240 TTE_W = 0,
7241 tsbonly
7242}
7243
7244
7245attr_data {
7246 Name = .MyDATA_1,
7247 hypervisor
7248}
7249
7250
7251attr_text {
7252 Name = .MyDATA_1,
7253 hypervisor
7254}
7255
7256.data
7257 .xword 0x121c788c5aeb6d0e
7258 .xword 0xd00d38c9f53e57e5
7259 .xword 0xd8543686e24a12a4
7260 .xword 0x782629c61304b2de
7261 .xword 0x4ab7732999e248a2
7262 .xword 0xe1617b4548203bce
7263 .xword 0x9b94c820a4e1776e
7264 .xword 0x8d0ea2acec361010
7265 .xword 0xb80da65292c7b0e9
7266 .xword 0x0a15d4d9c78e0448
7267 .xword 0xc12a8e34531d4d1c
7268 .xword 0x1b8b06f2f3fb0de4
7269 .xword 0x56b7249611c9f808
7270 .xword 0x58b33d88e2cec630
7271 .xword 0x30d024db9ca7d953
7272 .xword 0x9bdc6923a7478a0f
7273 .xword 0x816d502aa271d80d
7274 .xword 0x4318fa16daaa5948
7275 .xword 0x0fc33d485569b447
7276 .xword 0x2aa109c5e173703f
7277 .xword 0x4175f5e46fa8489a
7278 .xword 0x3b5295353b6c3d6e
7279 .xword 0xb0be0e5cf51c96ff
7280 .xword 0x2f67f0654229978c
7281 .xword 0xd08ca7b50f87efe5
7282 .xword 0xdb4f4c016fbedfc3
7283 .xword 0xfb6980cf9ade6bcd
7284 .xword 0xb199b327e37ddd39
7285 .xword 0x4beba6223a2dbbc8
7286 .xword 0x77950696847b1908
7287 .xword 0x2937117eeebce1cf
7288 .xword 0xd72a89b50ab2542d
7289
7290
7291
7292SECTION .MyDATA_2 TEXT_VA = 0x00000000e0540000, DATA_VA = 0x0000000060540000
7293attr_text {
7294 Name = .MyDATA_2,
7295 RA = 0x0000000170500000,
7296 PA = ra2pa(0x0000000170500000,0),
7297 part_0_ctx_zero_tsb_config_0,
7298 part_0_ctx_nonzero_tsb_config_0,
7299 TTE_G = 1,
7300 TTE_Context = PCONTEXT,
7301 TTE_V = 1,
7302 TTE_Size = 5,
7303 TTE_NFO = 1,
7304 TTE_IE = 1,
7305 TTE_Soft2 = 0,
7306 TTE_Diag = 0,
7307 TTE_Soft = 0,
7308 TTE_L = 0,
7309 TTE_CP = 0,
7310 TTE_CV = 1,
7311 TTE_E = 1,
7312 TTE_P = 0,
7313 TTE_W = 0
7314}
7315
7316
7317attr_data {
7318 Name = .MyDATA_2,
7319 RA = 0x0000000170500000,
7320 PA = ra2pa(0x0000000170500000,0),
7321 part_0_ctx_zero_tsb_config_1,
7322 part_0_ctx_nonzero_tsb_config_1,
7323 TTE_G = 1,
7324 TTE_Context = SCONTEXT,
7325 TTE_V = 1,
7326 TTE_Size = 5,
7327 TTE_NFO = 1,
7328 TTE_IE = 0,
7329 TTE_Soft2 = 0,
7330 TTE_Diag = 0,
7331 TTE_Soft = 0,
7332 TTE_L = 0,
7333 TTE_CP = 1,
7334 TTE_CV = 1,
7335 TTE_E = 1,
7336 TTE_P = 1,
7337 TTE_W = 0,
7338 tsbonly
7339}
7340
7341
7342attr_data {
7343 Name = .MyDATA_2,
7344 hypervisor
7345}
7346
7347
7348attr_text {
7349 Name = .MyDATA_2,
7350 hypervisor
7351}
7352
7353.data
7354 .xword 0x06edaddb742ae499
7355 .xword 0x85f730841d1e3cff
7356 .xword 0xf2d21e817232a90b
7357 .xword 0x4d95597d8aa85b07
7358 .xword 0xb48cabb9f8e45c09
7359 .xword 0x46bf7219e5bdb18f
7360 .xword 0xa76a1b7edcae2949
7361 .xword 0x95d2d8af411acd4f
7362 .xword 0xc88efe6af12ea6c1
7363 .xword 0x1bef9f2a482ece6b
7364 .xword 0x0175dd5d366fd089
7365 .xword 0x1a9433388dcf4352
7366 .xword 0x89748af723eb2639
7367 .xword 0xdca8227d7b117cb4
7368 .xword 0xf618b10426e5e776
7369 .xword 0xfccce1319168a2a9
7370 .xword 0x5f96a3c88d37532d
7371 .xword 0x67b5ba733d3166eb
7372 .xword 0x7c142821bb8added
7373 .xword 0xaa330b6dc229792d
7374 .xword 0xb708caf3c0a2a7a3
7375 .xword 0x7c34d690c3d61405
7376 .xword 0x35b00427f2acd421
7377 .xword 0xace746ed00f811ad
7378 .xword 0x4d57d906fa5e3e25
7379 .xword 0xd806ac7c18b190b3
7380 .xword 0x68ac14951ef787f2
7381 .xword 0x2540cd86fc8e9472
7382 .xword 0xba51bda777f30259
7383 .xword 0x394a1d26464976ab
7384 .xword 0xc664edf81c315a08
7385 .xword 0xf52ad4387ba87edc
7386
7387
7388
7389SECTION .MyDATA_3 TEXT_VA = 0x00000000e0740000, DATA_VA = 0x0000000060740000
7390attr_text {
7391 Name = .MyDATA_3,
7392 RA = 0x0000000170700000,
7393 PA = ra2pa(0x0000000170700000,0),
7394 part_0_ctx_zero_tsb_config_0,
7395 part_0_ctx_nonzero_tsb_config_0,
7396 TTE_G = 1,
7397 TTE_Context = PCONTEXT,
7398 TTE_V = 1,
7399 TTE_Size = 5,
7400 TTE_NFO = 1,
7401 TTE_IE = 0,
7402 TTE_Soft2 = 0,
7403 TTE_Diag = 0,
7404 TTE_Soft = 0,
7405 TTE_L = 0,
7406 TTE_CP = 1,
7407 TTE_CV = 1,
7408 TTE_E = 1,
7409 TTE_P = 1,
7410 TTE_W = 0
7411}
7412
7413
7414attr_data {
7415 Name = .MyDATA_3,
7416 RA = 0x0000000170700000,
7417 PA = ra2pa(0x0000000170700000,0),
7418 part_0_ctx_zero_tsb_config_1,
7419 part_0_ctx_nonzero_tsb_config_1,
7420 TTE_G = 1,
7421 TTE_Context = SCONTEXT,
7422 TTE_V = 1,
7423 TTE_Size = 3,
7424 TTE_NFO = 1,
7425 TTE_IE = 0,
7426 TTE_Soft2 = 0,
7427 TTE_Diag = 0,
7428 TTE_Soft = 0,
7429 TTE_L = 0,
7430 TTE_CP = 1,
7431 TTE_CV = 1,
7432 TTE_E = 0,
7433 TTE_P = 1,
7434 TTE_W = 0,
7435 tsbonly
7436}
7437
7438
7439attr_data {
7440 Name = .MyDATA_3,
7441 hypervisor
7442}
7443
7444
7445attr_text {
7446 Name = .MyDATA_3,
7447 hypervisor
7448}
7449
7450.data
7451 .xword 0x14ecdad3691f2718
7452 .xword 0x5bda7dc5689a4b1c
7453 .xword 0xf48c771c01dc6c16
7454 .xword 0xaf6ab3886714e60b
7455 .xword 0x538f002490aab009
7456 .xword 0x507cd1ea434c95cd
7457 .xword 0xd5291ac78cc7fe47
7458 .xword 0x7b19563ab17d55b0
7459 .xword 0xd82febb605bd4083
7460 .xword 0x2f767e8fd382e786
7461 .xword 0x463e08ed590bf5b0
7462 .xword 0x0470c64221589352
7463 .xword 0x40478f18fccbf854
7464 .xword 0x9ae43b6b27b78f04
7465 .xword 0x34275aa5de107cbb
7466 .xword 0xf981c829ce0ac52b
7467 .xword 0x782d0b2f1985f8e7
7468 .xword 0x4f259aee579b067c
7469 .xword 0x42f6b1e4c5d963dc
7470 .xword 0xbfaf553628fb727b
7471 .xword 0x2fdd9568a797ab43
7472 .xword 0xb478553fa8342320
7473 .xword 0x1dde4ffb5c33f41e
7474 .xword 0x4d2df1ebb7b2e9fc
7475 .xword 0x7b565c9256314281
7476 .xword 0xacc87a380b676c7a
7477 .xword 0xcb9c3778f7b86fb1
7478 .xword 0xaf3ae1ddbc66524c
7479 .xword 0xe03d185275a780a7
7480 .xword 0x1cb97bbf0d0d43a8
7481 .xword 0x31ebfc8327f9decf
7482 .xword 0xb20a22f709ded152
7483
7484
7485
7486
7487
7488SECTION .MyTEXT_0 TEXT_VA = 0x00000000e0200000
7489attr_text {
7490 Name = .MyTEXT_0,
7491 RA = 0x00000000e0200000,
7492 PA = ra2pa(0x00000000e0200000,0),
7493 part_0_ctx_zero_tsb_config_1,
7494 part_0_ctx_nonzero_tsb_config_1,
7495 TTE_G = 1,
7496 TTE_Context = PCONTEXT,
7497 TTE_V = 1,
7498 TTE_Size = 0,
7499 TTE_NFO = 0,
7500 TTE_IE = 1,
7501 TTE_Soft2 = 0,
7502 TTE_Diag = 0,
7503 TTE_Soft = 0,
7504 TTE_L = 0,
7505 TTE_CP = 1,
7506 TTE_CV = 0,
7507 TTE_E = 1,
7508 TTE_P = 0,
7509 TTE_W = 0
7510}
7511
7512.text
7513nuff_said_0:
7514 fdivd %f0, %f4, %f4
7515 mov HIGHVA_HIGHNUM, %r11
7516 sllx %r11, 32, %r11
7517 or %r27, %r11, %r27
7518 jmpl %r27+8, %r0
7519 jmpl %r27+8, %r0
7520 jmpl %r27+8, %r0
7521 jmpl %r27+8, %r0
7522 fdivs %f0, %f4, %f4
7523
7524
7525
7526SECTION .MyTEXT_1 TEXT_VA = 0x00000000e0a00000
7527attr_text {
7528 Name = .MyTEXT_1,
7529 RA = 0x00000000e0a00000,
7530 PA = ra2pa(0x00000000e0a00000,0),
7531 part_0_ctx_zero_tsb_config_1,
7532 part_0_ctx_nonzero_tsb_config_1,
7533 TTE_G = 1,
7534 TTE_Context = PCONTEXT,
7535 TTE_V = 1,
7536 TTE_Size = 3,
7537 TTE_NFO = 0,
7538 TTE_IE = 1,
7539 TTE_Soft2 = 0,
7540 TTE_Diag = 0,
7541 TTE_Soft = 0,
7542 TTE_L = 0,
7543 TTE_CP = 1,
7544 TTE_CV = 1,
7545 TTE_E = 1,
7546 TTE_P = 1,
7547 TTE_W = 1
7548}
7549
7550.text
7551nuff_said_1:
7552 fdivs %f0, %f4, %f8
7553 mov HIGHVA_HIGHNUM, %r11
7554 sllx %r11, 32, %r11
7555 or %r27, %r11, %r27
7556 jmpl %r27+8, %r0
7557 jmpl %r27+8, %r0
7558 jmpl %r27+8, %r0
7559 jmpl %r27+8, %r0
7560 fdivd %f0, %f4, %f4
7561
7562
7563
7564SECTION .MyTEXT_2 TEXT_VA = 0x00000000e1200000
7565attr_text {
7566 Name = .MyTEXT_2,
7567 RA = 0x00000000e1200000,
7568 PA = ra2pa(0x00000000e1200000,0),
7569 part_0_ctx_zero_tsb_config_1,
7570 part_0_ctx_nonzero_tsb_config_1,
7571 TTE_G = 1,
7572 TTE_Context = PCONTEXT,
7573 TTE_V = 1,
7574 TTE_Size = 5,
7575 TTE_NFO = 0,
7576 TTE_IE = 1,
7577 TTE_Soft2 = 0,
7578 TTE_Diag = 0,
7579 TTE_Soft = 0,
7580 TTE_L = 0,
7581 TTE_CP = 1,
7582 TTE_CV = 1,
7583 TTE_E = 1,
7584 TTE_P = 0,
7585 TTE_W = 0
7586}
7587
7588.text
7589nuff_said_2:
7590 fdivd %f0, %f4, %f4
7591 mov HIGHVA_HIGHNUM, %r11
7592 sllx %r11, 32, %r11
7593 or %r27, %r11, %r27
7594 jmpl %r27+8, %r0
7595 jmpl %r27+8, %r0
7596 jmpl %r27+8, %r0
7597 jmpl %r27+8, %r0
7598 fdivs %f0, %f4, %f8
7599
7600
7601
7602SECTION .MyTEXT_3 TEXT_VA = 0x00000000e1a00000
7603attr_text {
7604 Name = .MyTEXT_3,
7605 RA = 0x00000000e1a00000,
7606 PA = ra2pa(0x00000000e1a00000,0),
7607 part_0_ctx_zero_tsb_config_1,
7608 part_0_ctx_nonzero_tsb_config_1,
7609 TTE_G = 1,
7610 TTE_Context = PCONTEXT,
7611 TTE_V = 1,
7612 TTE_Size = 0,
7613 TTE_NFO = 0,
7614 TTE_IE = 1,
7615 TTE_Soft2 = 0,
7616 TTE_Diag = 0,
7617 TTE_Soft = 0,
7618 TTE_L = 0,
7619 TTE_CP = 1,
7620 TTE_CV = 0,
7621 TTE_E = 1,
7622 TTE_P = 1,
7623 TTE_W = 0
7624}
7625
7626.text
7627nuff_said_3:
7628 fdivs %f0, %f4, %f8
7629 mov HIGHVA_HIGHNUM, %r11
7630 sllx %r11, 32, %r11
7631 or %r27, %r11, %r27
7632 jmpl %r27+8, %r0
7633 jmpl %r27+8, %r0
7634 jmpl %r27+8, %r0
7635 jmpl %r27+8, %r0
7636 fdivd %f0, %f4, %f6
7637
7638
7639
7640
7641
7642SECTION .VaHOLE_0 TEXT_VA = 0x00007fffffffe000
7643attr_text {
7644 Name = .VaHOLE_0,
7645 RA = 0x00000000ffffe000,
7646 PA = ra2pa(0x00000000ffffe000,0),
7647 part_0_ctx_zero_tsb_config_1,
7648 part_0_ctx_nonzero_tsb_config_1,
7649 TTE_G = 1,
7650 TTE_Context = PCONTEXT,
7651 TTE_V = 1,
7652 TTE_Size = 0,
7653 TTE_NFO = 0,
7654 TTE_IE = 0,
7655 TTE_Soft2 = 0,
7656 TTE_Diag = 0,
7657 TTE_Soft = 0,
7658 TTE_L = 0,
7659 TTE_CP = 0,
7660 TTE_CV = 1,
7661 TTE_E = 0,
7662 TTE_P = 0,
7663 TTE_W = 0,
7664 TTE_X = 1
7665}
7666
7667.text
7668.global vahole_target0
7669.text
7670.global vahole_target1
7671.text
7672.global vahole_target2
7673.text
7674.global vahole_target3
7675 nop
7676.align 4096
7677 nop
7678.align 2048
7679 nop
7680.align 1024
7681 nop
7682.align 512
7683 nop
7684.align 256
7685 nop
7686.align 128
7687 nop
7688.align 64
7689 nop
7690 nop
7691.align 16
7692 nop;nop;nop
7693vahole_target0: nop;nop
7694vahole_target1: nop
7695vahole_target2: nop;nop;nop
7696vahole_target3: nop;nop;nop
7697
7698
7699
7700
7701
7702SECTION .VaHOLEL_0 TEXT_VA = 0x00000000ffffe000
7703attr_text {
7704 Name = .VaHOLEL_0,
7705 RA = 0x00000000ffffe000,
7706 PA = ra2pa(0x00000000ffffe000,0),
7707 part_0_ctx_zero_tsb_config_0,
7708 part_0_ctx_nonzero_tsb_config_0,
7709 TTE_G = 1,
7710 TTE_Context = PCONTEXT,
7711 TTE_V = 1,
7712 TTE_Size = 1,
7713 TTE_NFO = 0,
7714 TTE_IE = 0,
7715 TTE_Soft2 = 0,
7716 TTE_Diag = 0,
7717 TTE_Soft = 0,
7718 TTE_L = 0,
7719 TTE_CP = 0,
7720 TTE_CV = 0,
7721 TTE_E = 1,
7722 TTE_P = 0,
7723 TTE_W = 0,
7724 TTE_X = 1,
7725 tsbonly
7726}
7727
7728.text
7729 nop
7730
7731
7732
7733
7734
7735SECTION .ZERO_0 TEXT_VA = 0x0000000000000000
7736attr_text {
7737 Name = .ZERO_0,
7738 RA = 0x0000000000000000,
7739 PA = ra2pa(0x0000000000000000,0),
7740 part_0_ctx_zero_tsb_config_1,
7741 part_0_ctx_nonzero_tsb_config_1,
7742 TTE_G = 1,
7743 TTE_Context = 0x44,
7744 TTE_V = 1,
7745 TTE_Size = 1,
7746 TTE_NFO = 0,
7747 TTE_IE = 0,
7748 TTE_Soft2 = 0,
7749 TTE_Diag = 0,
7750 TTE_Soft = 0,
7751 TTE_L = 0,
7752 TTE_CP = 0,
7753 TTE_CV = 0,
7754 TTE_E = 1,
7755 TTE_P = 0,
7756 TTE_W = 1,
7757 TTE_X = 1
7758}
7759
7760
7761.text
7762 mov HIGHVA_HIGHNUM, %r11
7763 sllx %r11, 32, %r11
7764 or %r27, %r11, %r27
7765 jmpl %r27+8, %r0
7766 nop
7767 nop
7768 jmpl %r27+8, %r0
7769 nop
7770
7771Power_On_Reset:
7772 setx HRedmode_Reset_Handler, %g1, %g2
7773 jmp %g2
7774 nop
7775.align 32
7776
7777Watchdog_Reset:
7778 setx wdog_red_ext, %g1, %g2
7779 jmp %g2
7780 nop
7781.align 32
7782
7783External_Reset:
7784 My_External_Reset
7785
7786.align 32
7787
7788Software_Initiated_Reset:
7789 setx Software_Reset_Handler, %g1, %g2
7790 jmp %g2
7791 nop
7792
7793.align 32
7794
7795RED_Mode_Other_Reset:
7796 ! IF TL=6, shift stack by one ..
7797 rdpr %tl, %l1
7798 cmp %l1, 6
7799 be start_tsa_shift
7800 nop
7801
7802continue_red_other:
7803 mov 0x1f, %l1
7804 stxa %l1, [%g0] ASI_LSU_CTL_REG
7805
7806 rdpr %tt, %l1
7807
7808 rdhpr %htstate, %l2
7809 and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv
7810 brnz,a %l2, red_goto_handler
7811 rdhpr %htba, %l2
7812 srlx %l1, 7, %l2 ! Send priv sw traps to priv mode ..
7813 cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap ..
7814 be,a red_goto_handler
7815 rdpr %tba, %l2
7816 rdhpr %htba, %l2
7817red_goto_handler:
7818
7819 sllx %l1, 5, %l1
7820 add %l1, %l2, %l2
7821 rdhpr %hpstate, %l1
7822 jmp %l2
7823 wrhpr %l1, 0x20, %hpstate
7824 nop
7825
7826wdog_red_ext:
7827 ! Shift stack down by 1 ...
7828 rdpr %tl, %l1
7829 cmp %l1, 6
7830 bl wdog_end
7831start_tsa_shift:
7832 mov 0x2, %l2
7833
7834tsa_shift:
7835 wrpr %l2, %tl
7836 rdpr %tt, %l3
7837 rdpr %tpc, %l4
7838 rdpr %tnpc, %l5
7839 rdpr %tstate, %l6
7840 rdhpr %htstate, %l7
7841 dec %l2
7842 wrpr %l2, %tl
7843 wrpr %l3, %tt
7844 wrpr %l4, %tpc
7845 wrpr %l5, %tnpc
7846 wrpr %l6, %tstate
7847 wrhpr %l7, %htstate
7848 add %l2, 2, %l2
7849 cmp %l2, %l1
7850 ble tsa_shift
7851 nop
7852tsa_shift_done:
7853 dec %l1
7854 wrpr %l1, %tl
7855
7856wdog_end:
7857 ! If TT != 2, then goto trap handler
7858 rdpr %tt, %l1
7859
7860 cmp %l1, 0x2
7861 bne continue_red_other
7862 nop
7863 ! else done
7864 mov 0x1f, %l1
7865 stxa %l1, [%g0] ASI_LSU_CTL_REG
7866 done
7867
7868
7869
7870
7871
7872SECTION .VaHOLE_PA_0 TEXT_VA = 0x000000ffffffe000
7873attr_text {
7874 Name = .VAHOLE_PA_0,
7875 hypervisor
7876}
7877
7878 nop
7879.align 4096
7880 nop
7881.align 2048
7882 nop
7883.align 1024
7884 nop
7885.align 512
7886 nop
7887.align 256
7888 nop
7889.align 128
7890 nop
7891.align 64
7892 nop
7893 nop
7894.align 16
7895 nop;nop;nop
7896 nop
7897 nop
7898 jmpl %r27+8, %r0
7899 nop
7900 nop
7901 nop
7902 jmpl %r27+8, %r0
7903 nop
7904
7905
7906
7907
7908
7909SECTION .MASKEDHOLE_0 TEXT_VA = 0x0000000100000000
7910attr_text {
7911 Name = .MASKEDHOLE_0,
7912 RA = 0x0000000000000000,
7913 PA = ra2pa(0x0000000000000000,0),
7914 part_0_ctx_zero_tsb_config_3,
7915 part_0_ctx_nonzero_tsb_config_3,
7916 TTE_G = 1,
7917 TTE_Context = 0x44,
7918 TTE_V = 1,
7919 TTE_Size = 1,
7920 TTE_NFO = 0,
7921 TTE_IE = 1,
7922 TTE_Soft2 = 0,
7923 TTE_Diag = 0,
7924 TTE_Soft = 0,
7925 TTE_L = 0,
7926 TTE_CP = 0,
7927 TTE_CV = 0,
7928 TTE_E = 0,
7929 TTE_P = 0,
7930 TTE_W = 0,
7931 TTE_X = 1,
7932 tsbonly
7933}
7934
7935
7936attr_text {
7937 Name = .MASKEDHOLE_0,
7938 hypervisor
7939}
7940
7941 mov HIGHVA_HIGHNUM, %r11
7942 sllx %r11, 32, %r11
7943 or %r27, %r11, %r27
7944 jmpl %r27+8, %r0
7945 nop
7946
7947
7948
7949#if 0
7950#endif
Full OpenSPARC design & verification tarball including full HDL.