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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: tlu_fcrand05_ind_15.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define IMMU_SKIP_IF_NO_TTE | |
39 | #define DMMU_SKIP_IF_NO_TTE | |
40 | #define MAIN_PAGE_NUCLEUS_ALSO | |
41 | #define MAIN_PAGE_HV_ALSO | |
42 | #define MAIN_PAGE_VA_IS_RA_ALSO | |
43 | #define DISABLE_PART_LIMIT_CHECK | |
44 | #define MAIN_PAGE_USE_CONFIG 3 | |
45 | #define PART0_Z_TSB_SIZE_3 10 | |
46 | #define PART0_Z_PAGE_SIZE_3 1 | |
47 | #define PART0_NZ_TSB_SIZE_3 10 | |
48 | #define PART0_NZ_PAGE_SIZE_3 1 | |
49 | #define PART0_Z_TSB_SIZE_1 3 | |
50 | #define PART0_NZ_TSB_SIZE_1 3 | |
51 | ||
52 | #define PART_0_BASE 0x0 | |
53 | #define USER_PAGE_CUSTOM_MAP | |
54 | #define MAIN_BASE_TEXT_VA 0x333000000 | |
55 | #define MAIN_BASE_TEXT_RA 0x033000000 | |
56 | #define MAIN_BASE_DATA_VA 0x379400000 | |
57 | #define MAIN_BASE_DATA_RA 0x079400000 | |
58 | ||
59 | #d | |
60 | # 474 "diag.j" | |
61 | #define H_HT0_Instruction_Access_MMU_Error_0x71 inst_access_mmu_error_handler | |
62 | #define H_HT0_Instruction_access_error_0x0a inst_access_error_handler | |
63 | #define H_HT0_Internal_Processor_Error_0x29 int_proc_err_handler | |
64 | #define H_HT0_Data_Access_MMU_Error_0x72 data_access_mmu_error_handler | |
65 | #define H_HT0_Data_access_error_0x32 data_access_error_handler | |
66 | #define H_HT0_Hw_Corrected_Error_0x63 hw_corrected_error_handler | |
67 | #define H_HT0_Sw_Recoverable_Error_0x40 sw_recoverable_error_handler | |
68 | #define H_HT0_Store_Error_0x07 store_error_handler | |
69 | ||
70 | #define DAE_SKIP_IF_SOCU_ERROR | |
71 | # 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
72 | #ifndef T_HANDLER_RAND4_1 | |
73 | #define T_HANDLER_RAND4_1 b .+16;\ | |
74 | sdiv %r1, %r0, %l4;nop;nop | |
75 | #endif | |
76 | #ifndef T_HANDLER_RAND7_1 | |
77 | #define T_HANDLER_RAND7_1 b .+28;\ | |
78 | pdist %f4, %f6, %f20; \ | |
79 | nop; nop ; nop; nop; illtrap | |
80 | #endif | |
81 | #ifndef T_HANDLER_RAND4_2 | |
82 | #define T_HANDLER_RAND4_2 save %i7, %g0, %i7; \ | |
83 | save %i7, %g0, %i7; \ | |
84 | restore %i7, %g0, %i7;\ | |
85 | restore %i7, %g0, %i7; | |
86 | #endif | |
87 | #ifndef T_HANDLER_RAND7_2 | |
88 | #define T_HANDLER_RAND7_2 b .+8 ;\ | |
89 | rdpr %pstate, %l2;\ | |
90 | b .+8 ;\ | |
91 | rdpr %tstate, %l3;\ | |
92 | b .+12 ;\ | |
93 | wrpr %l3, %r0, %tstate; nop | |
94 | #endif | |
95 | #ifndef T_HANDLER_RAND4_3 | |
96 | #define T_HANDLER_RAND4_3 save %i7, %g0, %i7;\ | |
97 | restore %i7, %g0, %i7;\ | |
98 | save %i7, %g0, %i7; \ | |
99 | restore %i7, %g0, %i7; | |
100 | #endif | |
101 | #ifndef T_HANDLER_RAND7_3 | |
102 | #define T_HANDLER_RAND7_3 b .+8 ;\ | |
103 | rdpr %tnpc, %l2;\ | |
104 | and %l2, 0xfc0, %l2;\ | |
105 | add %i7, %l2, %l2;\ | |
106 | stda %f16,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ | |
107 | b .+8 ;\ | |
108 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; | |
109 | #endif | |
110 | #ifndef T_HANDLER_RAND4_4 | |
111 | #define T_HANDLER_RAND4_4 b .+4 ; b .+4; b .+4; b .+4 | |
112 | #endif | |
113 | #ifndef T_HANDLER_RAND7_4 | |
114 | #define T_HANDLER_RAND7_4 b .+8;\ | |
115 | save %i7, %g0, %i7; \ | |
116 | b,a .+8;\ | |
117 | b .+12;\ | |
118 | stw %i7, [%i7];\ | |
119 | b .-8;;\ | |
120 | restore %i7, %g0, %i7; | |
121 | ||
122 | #endif | |
123 | #ifndef T_HANDLER_RAND4_5 | |
124 | #define T_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\ | |
125 | sdiv %l4, %l5, %l7;\ | |
126 | add %r31, 128, %l5;\ | |
127 | stda %l4, [%l5]ASI_BLOCK_PRIMARY_LITTLE; | |
128 | #endif | |
129 | #ifndef T_HANDLER_RAND7_5 | |
130 | #define T_HANDLER_RAND7_5 save %i7, %g0, %i7;\ | |
131 | rdpr %tnpc, %l2;\ | |
132 | wrpr %l2, %tpc;\ | |
133 | add %l2, 4, %l2;\ | |
134 | wrpr %l2, %tnpc;\ | |
135 | restore %i7, %g0, %i7;\ | |
136 | retry; | |
137 | #endif | |
138 | #ifndef T_HANDLER_RAND4_6 | |
139 | #define T_HANDLER_RAND4_6 ldda [%r31]ASI_BLOCK_AS_IF_USER_PRIMARY, %l2;\ | |
140 | rd %fprs, %l2; \ | |
141 | wr %l2, 0x4, %fprs ;\ | |
142 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; | |
143 | #endif | |
144 | #ifndef T_HANDLER_RAND7_6 | |
145 | #define T_HANDLER_RAND7_6 umul %o4, 2, %o5;\ | |
146 | rdpr %tnpc, %l2;\ | |
147 | wrpr %l2, %tpc;\ | |
148 | add %l2, 4, %l2;\ | |
149 | wrpr %l2, %tnpc;\ | |
150 | stw %l2, [%i7];\ | |
151 | retry; | |
152 | #endif | |
153 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
154 | #ifndef HT_HANDLER_RAND4_1 | |
155 | #define HT_HANDLER_RAND4_1 mov 0x80, %l3;\ | |
156 | b .+12;\ | |
157 | stxa %l3, [%l3]0x57 ;\ | |
158 | nop | |
159 | #endif | |
160 | #ifndef HT_HANDLER_RAND7_1 | |
161 | #define HT_HANDLER_RAND7_1 b .+28;\ | |
162 | pdist %f4, %f4, %f20;\ | |
163 | nop; nop ; nop; nop; illtrap | |
164 | #endif | |
165 | #ifndef HT_HANDLER_RAND4_2 | |
166 | #define HT_HANDLER_RAND4_2 save %i7, %g0, %i7; \ | |
167 | save %i7, %g0, %i7; \ | |
168 | restore %i7, %g0, %i7;\ | |
169 | restore %i7, %g0, %i7; | |
170 | #endif | |
171 | #ifndef HT_HANDLER_RAND7_2 | |
172 | #define HT_HANDLER_RAND7_2 b .+8 ;\ | |
173 | rdhpr %hpstate, %l2;\ | |
174 | b .+8 ;\ | |
175 | rdhpr %htstate, %l3;\ | |
176 | b .+12 ;\ | |
177 | wrhpr %l3, %r0, %htstate; nop | |
178 | #endif | |
179 | #ifndef HT_HANDLER_RAND4_3 | |
180 | #define HT_HANDLER_RAND4_3 stxa %l4, [%r31]ASI_AS_IF_USER_PRIMARY;\ | |
181 | mov 0x80, %l3;\ | |
182 | stxa %l3, [%l3]0x5f ;\ | |
183 | b .+8 ;\ | |
184 | ldxa [%r31]ASI_AS_IF_USER_PRIMARY, %l4; | |
185 | #endif | |
186 | #ifndef HT_HANDLER_RAND7_3 | |
187 | #define HT_HANDLER_RAND7_3 b .+8 ;\ | |
188 | rdpr %tnpc, %l2;\ | |
189 | and %l2, 0xfc0, %l2;\ | |
190 | add %i7, %l2, %l2;\ | |
191 | stda %f16,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ | |
192 | b .+8 ;\ | |
193 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; | |
194 | #endif | |
195 | #ifndef HT_HANDLER_RAND4_4 | |
196 | #define HT_HANDLER_RAND4_4 ldda [%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE, %l3;\ | |
197 | b .+12 ;\ | |
198 | stxa %l3, [%g0]ASI_LSU_CONTROL; nop | |
199 | #endif | |
200 | #ifndef HT_HANDLER_RAND7_4 | |
201 | #define HT_HANDLER_RAND7_4 rdpr %tnpc, %l3;\ | |
202 | mov ASI_DMMU_VA_WATCHPOINT_VAL, %l4 ;\ | |
203 | stxa %l3, [%l4]ASI_DMMU_VA_WATCHPOINT ;\ | |
204 | mov 1, %l4;\ | |
205 | sllx %l4, 33, %l4 ;\ | |
206 | not %l4, %l3 ;\ | |
207 | stxa %l3, [%g0]ASI_LSU_CONTROL; | |
208 | #endif | |
209 | #ifndef HT_HANDLER_RAND4_5 | |
210 | #define HT_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\ | |
211 | sdiv %l4, %l5, %l6;\ | |
212 | sdiv %l3, %l6, %l7;\ | |
213 | stda %f32, [%r31]ASI_BLOCK_PRIMARY_LITTLE; | |
214 | #endif | |
215 | #ifndef HT_HANDLER_RAND7_5 | |
216 | #define HT_HANDLER_RAND7_5 save %i7, %g0, %i7;\ | |
217 | rdpr %tnpc, %l2;\ | |
218 | wrpr %l2, %tpc;\ | |
219 | add %l2, 4, %l2;\ | |
220 | wrpr %l2, %tnpc;\ | |
221 | restore %i7, %g0, %i7;\ | |
222 | retry; | |
223 | #endif | |
224 | #ifndef HT_HANDLER_RAND4_6 | |
225 | #define HT_HANDLER_RAND4_6 ld [%r31], %l2;\ | |
226 | rd %fprs, %l2; \ | |
227 | wr %l2, 0x4, %fprs ;\ | |
228 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; | |
229 | #endif | |
230 | #ifndef HT_HANDLER_RAND7_6 | |
231 | #define HT_HANDLER_RAND7_6 rdhpr %htstate, %o4;\ | |
232 | rdpr %tnpc, %l2;\ | |
233 | wrpr %l2, %tpc;\ | |
234 | add %l2, 4, %l2;\ | |
235 | wrpr %l2, %tnpc;\ | |
236 | wrhpr %o4, %r0, %htstate;\ | |
237 | retry; | |
238 | #endif | |
239 | ||
240 | !!!!!!!!!!!!!!!!!!!!!!!!! | |
241 | !! Disable trap checking | |
242 | #define NO_TRAPCHECK | |
243 | ||
244 | ! Enable Traps | |
245 | #define ENABLE_T1_Privileged_Opcode_0x11 | |
246 | #define ENABLE_T1_Fp_Disabled_0x20 | |
247 | #define ENABLE_HT0_Watchdog_Reset_0x02 | |
248 | ||
249 | #define FILL_TRAP_RETRY | |
250 | #define SPILL_TRAP_RETRY | |
251 | #define CLEAN_WIN_RETRY | |
252 | ||
253 | #define My_RED_Mode_Other_Reset | |
254 | #define My_RED_Mode_Other_Reset \ | |
255 | ba red_other_ext;\ | |
256 | nop;retry;nop;nop;nop;nop;nop | |
257 | ||
258 | #define H_HT0_Software_Initiated_Reset_0x04 | |
259 | #define SUN_H_HT0_Software_Initiated_Reset_0x04 \ | |
260 | setx Software_Reset_Handler, %g1, %g2 ;\ | |
261 | jmp %g2 ;\ | |
262 | nop | |
263 | # 198 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
264 | #define H_T1_Clean_Window_0x24 | |
265 | #define SUN_H_T1_Clean_Window_0x24 \ | |
266 | rdpr %cleanwin, %l1;\ | |
267 | add %l1,1,%l1;\ | |
268 | wrpr %l1, %g0, %cleanwin;\ | |
269 | retry; nop; nop; nop; nop | |
270 | ||
271 | #define H_T1_Clean_Window_0x25 | |
272 | #define SUN_H_T1_Clean_Window_0x25 \ | |
273 | rdpr %cleanwin, %l1;\ | |
274 | add %l1,1,%l1;\ | |
275 | wrpr %l1, %g0, %cleanwin;\ | |
276 | retry; nop; nop; nop; nop | |
277 | ||
278 | #define H_T1_Clean_Window_0x26 | |
279 | #define SUN_H_T1_Clean_Window_0x26 \ | |
280 | rdpr %cleanwin, %l1;\ | |
281 | add %l1,1,%l1;\ | |
282 | wrpr %l1, %g0, %cleanwin;\ | |
283 | retry; nop; nop; nop; nop | |
284 | ||
285 | #define H_T1_Clean_Window_0x27 | |
286 | #define SUN_H_T1_Clean_Window_0x27 \ | |
287 | rdpr %cleanwin, %l1;\ | |
288 | add %l1,1,%l1;\ | |
289 | wrpr %l1, %g0, %cleanwin;\ | |
290 | retry; nop; nop; nop; nop | |
291 | # 227 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
292 | #define H_HT0_Tag_Overflow | |
293 | #define My_HT0_Tag_Overflow \ | |
294 | HT_HANDLER_RAND7_1 ;\ | |
295 | done | |
296 | ||
297 | #define H_T0_Tag_Overflow | |
298 | #define My_T0_Tag_Overflow \ | |
299 | T_HANDLER_RAND7_2 ;\ | |
300 | done | |
301 | ||
302 | #define H_T1_Tag_Overflow_0x23 | |
303 | #define SUN_H_T1_Tag_Overflow_0x23 \ | |
304 | T_HANDLER_RAND7_3 ;\ | |
305 | done | |
306 | ||
307 | #define H_T0_Window_Spill_0_Normal_Trap | |
308 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
309 | ||
310 | #define H_T0_Window_Spill_1_Normal_Trap | |
311 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
312 | ||
313 | #define H_T0_Window_Spill_2_Normal_Trap | |
314 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
315 | ||
316 | #define H_T0_Window_Spill_3_Normal_Trap | |
317 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
318 | ||
319 | #define H_T0_Window_Spill_4_Normal_Trap | |
320 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
321 | ||
322 | #define H_T0_Window_Spill_5_Normal_Trap | |
323 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
324 | ||
325 | #define H_T0_Window_Spill_6_Normal_Trap | |
326 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
327 | ||
328 | #define H_T0_Window_Spill_7_Normal_Trap | |
329 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
330 | ||
331 | #define H_T0_Window_Spill_0_Other_Trap | |
332 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
333 | ||
334 | #define H_T0_Window_Spill_1_Other_Trap | |
335 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
336 | ||
337 | #define H_T0_Window_Spill_2_Other_Trap | |
338 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
339 | ||
340 | #define H_T0_Window_Spill_3_Other_Trap | |
341 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
342 | ||
343 | #define H_T0_Window_Spill_4_Other_Trap | |
344 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
345 | ||
346 | #define H_T0_Window_Spill_5_Other_Trap | |
347 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
348 | ||
349 | #define H_T0_Window_Spill_6_Other_Trap | |
350 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
351 | ||
352 | #define H_T0_Window_Spill_7_Other_Trap | |
353 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
354 | ||
355 | #define H_T0_Window_Fill_0_Normal_Trap | |
356 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
357 | ||
358 | #define H_T0_Window_Fill_1_Normal_Trap | |
359 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
360 | ||
361 | #define H_T0_Window_Fill_2_Normal_Trap | |
362 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
363 | ||
364 | #define H_T0_Window_Fill_3_Normal_Trap | |
365 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
366 | ||
367 | #define H_T0_Window_Fill_4_Normal_Trap | |
368 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
369 | ||
370 | #define H_T0_Window_Fill_5_Normal_Trap | |
371 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
372 | ||
373 | #define H_T0_Window_Fill_6_Normal_Trap | |
374 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
375 | ||
376 | #define H_T0_Window_Fill_7_Normal_Trap | |
377 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
378 | ||
379 | #define H_T0_Window_Fill_0_Other_Trap | |
380 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
381 | ||
382 | #define H_T0_Window_Fill_1_Other_Trap | |
383 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
384 | ||
385 | #define H_T0_Window_Fill_2_Other_Trap | |
386 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
387 | ||
388 | #define H_T0_Window_Fill_3_Other_Trap | |
389 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
390 | ||
391 | #define H_T0_Window_Fill_4_Other_Trap | |
392 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
393 | ||
394 | #define H_T0_Window_Fill_5_Other_Trap | |
395 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
396 | ||
397 | #define H_T0_Window_Fill_6_Other_Trap | |
398 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
399 | ||
400 | #define H_T0_Window_Fill_7_Other_Trap | |
401 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
402 | # 339 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
403 | #define H_T1_Window_Spill_0_Normal_Trap | |
404 | #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
405 | ||
406 | #define H_T1_Window_Spill_1_Normal_Trap | |
407 | #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
408 | ||
409 | #define H_T1_Window_Spill_2_Normal_Trap | |
410 | #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
411 | ||
412 | #define H_T1_Window_Spill_3_Normal_Trap | |
413 | #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
414 | ||
415 | #define H_T1_Window_Spill_4_Normal_Trap | |
416 | #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
417 | ||
418 | #define H_T1_Window_Spill_5_Normal_Trap | |
419 | #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
420 | ||
421 | #define H_T1_Window_Spill_6_Normal_Trap | |
422 | #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
423 | ||
424 | #define H_T1_Window_Spill_7_Normal_Trap | |
425 | #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
426 | ||
427 | #define H_T1_Window_Spill_0_Other_Trap | |
428 | #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
429 | ||
430 | #define H_T1_Window_Spill_1_Other_Trap | |
431 | #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
432 | ||
433 | #define H_T1_Window_Spill_2_Other_Trap | |
434 | #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
435 | ||
436 | #define H_T1_Window_Spill_3_Other_Trap | |
437 | #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
438 | ||
439 | #define H_T1_Window_Spill_4_Other_Trap | |
440 | #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
441 | ||
442 | #define H_T1_Window_Spill_5_Other_Trap | |
443 | #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
444 | ||
445 | #define H_T1_Window_Spill_6_Other_Trap | |
446 | #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
447 | ||
448 | #define H_T1_Window_Spill_7_Other_Trap | |
449 | #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
450 | ||
451 | #define H_T1_Window_Fill_0_Normal_Trap | |
452 | #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
453 | ||
454 | #define H_T1_Window_Fill_1_Normal_Trap | |
455 | #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
456 | ||
457 | #define H_T1_Window_Fill_2_Normal_Trap | |
458 | #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
459 | ||
460 | #define H_T1_Window_Fill_3_Normal_Trap | |
461 | #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
462 | ||
463 | #define H_T1_Window_Fill_4_Normal_Trap | |
464 | #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
465 | ||
466 | #define H_T1_Window_Fill_5_Normal_Trap | |
467 | #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
468 | ||
469 | #define H_T1_Window_Fill_6_Normal_Trap | |
470 | #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
471 | ||
472 | #define H_T1_Window_Fill_7_Normal_Trap | |
473 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
474 | ||
475 | #define H_T1_Window_Fill_0_Other_Trap | |
476 | #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
477 | ||
478 | #define H_T1_Window_Fill_1_Other_Trap | |
479 | #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
480 | ||
481 | #define H_T1_Window_Fill_2_Other_Trap | |
482 | #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
483 | ||
484 | #define H_T1_Window_Fill_3_Other_Trap | |
485 | #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
486 | ||
487 | #define H_T1_Window_Fill_4_Other_Trap | |
488 | #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
489 | ||
490 | #define H_T1_Window_Fill_5_Other_Trap | |
491 | #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
492 | ||
493 | #define H_T1_Window_Fill_6_Other_Trap | |
494 | #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
495 | ||
496 | #define H_T1_Window_Fill_7_Other_Trap | |
497 | #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
498 | ||
499 | #define H_T0_Trap_Instruction_0 | |
500 | #define My_T0_Trap_Instruction_0 \ | |
501 | T_HANDLER_RAND7_5 ;\ | |
502 | done; | |
503 | ||
504 | #define H_T0_Trap_Instruction_1 | |
505 | #define My_T0_Trap_Instruction_1 \ | |
506 | T_HANDLER_RAND7_6 ;\ | |
507 | done; | |
508 | ||
509 | #define H_T0_Trap_Instruction_2 | |
510 | #define My_T0_Trap_Instruction_2 \ | |
511 | inc %o3;\ | |
512 | umul %o3, 2, %o4;\ | |
513 | ba 1f; \ | |
514 | save %i7, %g0, %i7; \ | |
515 | 2: done; \ | |
516 | nop; \ | |
517 | 1: ba 2b; \ | |
518 | restore %i7, %g0, %i7 | |
519 | #define H_T0_Trap_Instruction_3 | |
520 | #define My_T0_Trap_Instruction_3 \ | |
521 | save %i7, %g0, %i7 ;\ | |
522 | T_HANDLER_RAND4_5;\ | |
523 | stw %o4, [%i7];\ | |
524 | restore %i7, %g0, %i7 ;\ | |
525 | done | |
526 | #define H_T0_Trap_Instruction_4 | |
527 | #define My_T0_Trap_Instruction_4 \ | |
528 | T_HANDLER_RAND7_6 ;\ | |
529 | done; | |
530 | ||
531 | #define H_T0_Trap_Instruction_5 | |
532 | #define My_T0_Trap_Instruction_5 \ | |
533 | T_HANDLER_RAND4_5;\ | |
534 | done; | |
535 | ||
536 | #define H_T1_Trap_Instruction_0 | |
537 | #define My_T1_Trap_Instruction_0 \ | |
538 | inc %o4;\ | |
539 | umul %o4, 2, %o5;\ | |
540 | ba 3f; \ | |
541 | save %i7, %g0, %i7; \ | |
542 | 4: done; \ | |
543 | nop; \ | |
544 | 3: ba 4b; \ | |
545 | restore %i7, %g0, %i7 | |
546 | #define H_T1_Trap_Instruction_1 | |
547 | #define My_T1_Trap_Instruction_1 \ | |
548 | T_HANDLER_RAND7_3;\ | |
549 | done | |
550 | #define H_T1_Trap_Instruction_2 | |
551 | #define My_T1_Trap_Instruction_2 \ | |
552 | inc %o3;\ | |
553 | umul %o3, 2, %o4;\ | |
554 | ba 5f; \ | |
555 | save %i7, %g0, %i7; \ | |
556 | 6: done; \ | |
557 | nop; \ | |
558 | 5: ba 6b; \ | |
559 | restore %i7, %g0, %i7 | |
560 | #define H_T1_Trap_Instruction_3 | |
561 | #define My_T1_Trap_Instruction_3 \ | |
562 | T_HANDLER_RAND4_1;\ | |
563 | done; | |
564 | ||
565 | #define H_T1_Trap_Instruction_4 | |
566 | #define My_T1_Trap_Instruction_4 \ | |
567 | T_HANDLER_RAND7_1;\ | |
568 | done; | |
569 | #define H_T1_Trap_Instruction_5 | |
570 | #define My_T1_Trap_Instruction_5 \ | |
571 | T_HANDLER_RAND7_2;\ | |
572 | done | |
573 | #define H_HT0_Trap_Instruction_0 | |
574 | #define My_HT0_Trap_Instruction_0 \ | |
575 | HT_HANDLER_RAND4_1 ;\ | |
576 | done; | |
577 | #define H_HT0_Trap_Instruction_1 | |
578 | #define My_HT0_Trap_Instruction_1 \ | |
579 | HT_HANDLER_RAND4_3 ;\ | |
580 | done | |
581 | #define H_HT0_Trap_Instruction_2 | |
582 | #define My_HT0_Trap_Instruction_2 \ | |
583 | HT_HANDLER_RAND7_5 ;\ | |
584 | done; | |
585 | #define H_HT0_Trap_Instruction_3 | |
586 | #define My_HT0_Trap_Instruction_3 \ | |
587 | HT_HANDLER_RAND4_5 ;\ | |
588 | done | |
589 | #define H_HT0_Trap_Instruction_4 | |
590 | #define My_HT0_Trap_Instruction_4 \ | |
591 | HT_HANDLER_RAND7_4 ;\ | |
592 | done | |
593 | #define H_HT0_Trap_Instruction_5 | |
594 | #define My_HT0_Trap_Instruction_5 \ | |
595 | ba htrap_5_ext;\ | |
596 | nop; retry;\ | |
597 | nop; nop; nop; nop; nop | |
598 | ||
599 | #define H_HT0_Mem_Address_Not_Aligned_0x34 | |
600 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ | |
601 | HT_HANDLER_RAND4_4 ;\ | |
602 | done ; | |
603 | #define H_HT0_Illegal_instruction_0x10 | |
604 | #define My_HT0_Illegal_instruction_0x10 \ | |
605 | HT_HANDLER_RAND7_6 ;\ | |
606 | done; | |
607 | ||
608 | #define H_HT0_DAE_so_page_0x30 | |
609 | #define My_HT0_DAE_so_page_0x30 \ | |
610 | HT_HANDLER_RAND4_2;\ | |
611 | done; | |
612 | #define H_HT0_DAE_invalid_asi_0x14 | |
613 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ | |
614 | HT_HANDLER_RAND4_3 ;\ | |
615 | done | |
616 | #define H_HT0_DAE_privilege_violation_0x15 | |
617 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ | |
618 | HT_HANDLER_RAND4_4 ;\ | |
619 | done; | |
620 | #define H_HT0_Privileged_Action_0x37 | |
621 | #define My_HT0_Privileged_Action_0x37 \ | |
622 | done; \ | |
623 | nop; nop | |
624 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
625 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ | |
626 | HT_HANDLER_RAND7_4 ;\ | |
627 | done | |
628 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
629 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ | |
630 | HT_HANDLER_RAND7_1;\ | |
631 | done | |
632 | #define H_HT0_Fp_exception_ieee_754_0x21 | |
633 | #define My_HT0_Fp_exception_ieee_754_0x21 \ | |
634 | HT_HANDLER_RAND4_2 ;\ | |
635 | done | |
636 | #define H_HT0_Fp_exception_other_0x22 | |
637 | #define My_HT0_Fp_exception_other_0x22 \ | |
638 | HT_HANDLER_RAND7_2 ;\ | |
639 | done | |
640 | #define H_HT0_Division_By_Zero | |
641 | #define My_HT0_Division_By_Zero \ | |
642 | HT_HANDLER_RAND4_6;\ | |
643 | done | |
644 | #define H_T0_Division_By_Zero | |
645 | #define My_T0_Division_By_Zero \ | |
646 | T_HANDLER_RAND4_3;\ | |
647 | done | |
648 | #define H_T1_Division_By_Zero_0x28 | |
649 | #define My_H_T1_Division_By_Zero_0x28 \ | |
650 | T_HANDLER_RAND4_3;\ | |
651 | done | |
652 | #define H_T0_Division_By_Zero | |
653 | #define My_T0_Division_By_Zero\ | |
654 | T_HANDLER_RAND4_4 ;\ | |
655 | done | |
656 | #define H_T0_Fp_exception_ieee_754_0x21 | |
657 | #define My_T0_Fp_exception_ieee_754_0x21 \ | |
658 | T_HANDLER_RAND4_3 ;\ | |
659 | done | |
660 | #define H_T1_Fp_Exception_Ieee_754_0x21 | |
661 | #define My_H_T1_Fp_Exception_Ieee_754_0x21 \ | |
662 | T_HANDLER_RAND4_4 ;\ | |
663 | done | |
664 | #define H_T1_Fp_Exception_Other_0x22 | |
665 | #define My_H_T1_Fp_Exception_Other_0x22 \ | |
666 | T_HANDLER_RAND4_5 ;\ | |
667 | done | |
668 | #define H_T1_Privileged_Opcode_0x11 | |
669 | #define SUN_H_T1_Privileged_Opcode_0x11 \ | |
670 | T_HANDLER_RAND4_6 ;\ | |
671 | done | |
672 | ||
673 | #define H_HT0_Privileged_opcode_0x11 | |
674 | #define My_HT0_Privileged_opcode_0x11 \ | |
675 | HT_HANDLER_RAND4_1;\ | |
676 | done; | |
677 | ||
678 | #define H_HT0_Fp_disabled_0x20 | |
679 | #define My_HT0_Fp_disabled_0x20 \ | |
680 | mov 0x4, %l2 ;\ | |
681 | wr %l2, 0x0, %fprs ;\ | |
682 | sllx %l2, 10, %l3; \ | |
683 | rdpr %tstate, %l2;\ | |
684 | or %l2, %l3, %l2 ;\ | |
685 | stw %l2, [%i7];\ | |
686 | wrpr %l2, 0x0, %tstate;\ | |
687 | retry; | |
688 | ||
689 | #define H_T0_Fp_disabled_0x20 | |
690 | #define My_T0_Fp_disabled_0x20 \ | |
691 | mov 0x4, %l2 ;\ | |
692 | wr %l2, 0x0, %fprs ;\ | |
693 | sllx %l2, 10, %l3; \ | |
694 | rdpr %tstate, %l2;\ | |
695 | or %l2, %l3, %l2 ;\ | |
696 | wrpr %l2, 0x0, %tstate;\ | |
697 | retry; nop | |
698 | ||
699 | #define H_T1_Fp_Disabled_0x20 | |
700 | #define My_H_T1_Fp_Disabled_0x20 \ | |
701 | mov 0x4, %l2 ;\ | |
702 | wr %l2, 0x0, %fprs ;\ | |
703 | sllx %l2, 10, %l3; \ | |
704 | rdpr %tstate, %l2;\ | |
705 | or %l2, %l3, %l2 ;\ | |
706 | wrpr %l2, 0x0, %tstate;\ | |
707 | stw %l2, [%i7];\ | |
708 | retry | |
709 | ||
710 | #define H_HT0_Watchdog_Reset_0x02 | |
711 | #define My_HT0_Watchdog_Reset_0x02 \ | |
712 | ba wdog_2_ext;\ | |
713 | nop;retry;nop;nop;nop;nop;nop | |
714 | ||
715 | #define H_T0_Privileged_opcode_0x11 | |
716 | #define My_T0_Privileged_opcode_0x11 \ | |
717 | T_HANDLER_RAND4_4;\ | |
718 | done | |
719 | ||
720 | #define H_T1_Fp_exception_other_0x22 | |
721 | #define My_T1_Fp_exception_other_0x22 \ | |
722 | T_HANDLER_RAND7_3 ;\ | |
723 | done; | |
724 | ||
725 | #define H_T0_Fp_exception_other_0x22 | |
726 | #define My_T0_Fp_exception_other_0x22 \ | |
727 | T_HANDLER_RAND7_4;\ | |
728 | done | |
729 | ||
730 | #define H_HT0_Trap_Level_Zero_0x5f | |
731 | #define My_HT0_Trap_Level_Zero_0x5f \ | |
732 | not %g0, %r13; \ | |
733 | rdhpr %hpstate, %l3;\ | |
734 | jmp %r13;\ | |
735 | rdhpr %htstate, %l3;\ | |
736 | and %l3, 0xfe, %l3;\ | |
737 | wrhpr %l3, 0, %htstate;\ | |
738 | stw %r13, [%i7];\ | |
739 | retry | |
740 | ||
741 | #define My_Watchdog_Reset | |
742 | #define My_Watchdog_Reset \ | |
743 | ba wdog_red_ext;\ | |
744 | nop;retry;nop;nop;nop;nop;nop | |
745 | ||
746 | #define H_HT0_Control_Transfer_Instr_0x74 | |
747 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ | |
748 | rdpr %tstate, %l3;\ | |
749 | mov 1, %l4;\ | |
750 | sllx %l4, 20, %l4;\ | |
751 | wrpr %l3, %l4, %tstate ;\ | |
752 | retry;nop; | |
753 | ||
754 | #define H_T0_Control_Transfer_Instr_0x74 | |
755 | #define My_H_T0_Control_Transfer_Instr_0x74 \ | |
756 | rdpr %tstate, %l3;\ | |
757 | mov 1, %l4;\ | |
758 | sllx %l4, 20, %l4;\ | |
759 | wrpr %l3, %l4, %tstate ;\ | |
760 | retry;nop; | |
761 | ||
762 | #define H_T1_Control_Transfer_Instr_0x74 | |
763 | #define My_H_T1_Control_Transfer_Instr_0x74 \ | |
764 | rdpr %tstate, %l3;\ | |
765 | mov 1, %l4;\ | |
766 | sllx %l4, 20, %l4;\ | |
767 | wrpr %l3, %l4, %tstate ;\ | |
768 | retry;nop; | |
769 | # 707 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
770 | #define H_HT0_data_access_protection_0x6c | |
771 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop | |
772 | ||
773 | #define H_HT0_PA_Watchpoint_0x61 | |
774 | #define My_H_HT0_PA_Watchpoint_0x61 \ | |
775 | HT_HANDLER_RAND7_4;\ | |
776 | done | |
777 | ||
778 | #define H_HT0_Data_access_error_0x32 | |
779 | #define SUN_H_HT0_Data_access_error_0x32 \ | |
780 | done;nop | |
781 | ||
782 | #define H_T0_VA_Watchpoint_0x62 | |
783 | #define My_T0_VA_Watchpoint_0x62 \ | |
784 | T_HANDLER_RAND7_5;\ | |
785 | done | |
786 | ||
787 | #define H_T1_VA_Watchpoint_0x62 | |
788 | #define SUN_H_T1_VA_Watchpoint_0x62 \ | |
789 | T_HANDLER_RAND7_3;\ | |
790 | done | |
791 | ||
792 | #define H_HT0_VA_Watchpoint_0x62 | |
793 | #define My_H_HT0_VA_Watchpoint_0x62 \ | |
794 | HT_HANDLER_RAND7_5;\ | |
795 | done | |
796 | ||
797 | #define H_T0_Instruction_VA_Watchpoint_0x75 | |
798 | #define SUN_H_T0_Instruction_VA_Watchpoint_0x75 \ | |
799 | T_HANDLER_RAND7_4;\ | |
800 | done; | |
801 | ||
802 | #define H_T1_Instruction_VA_Watchpoint_0x75 | |
803 | #define SUN_H_T1_Instruction_VA_Watchpoint_0x75 \ | |
804 | T_HANDLER_RAND7_5;\ | |
805 | done; | |
806 | ||
807 | #define H_HT0_Instruction_VA_Watchpoint_0x75 | |
808 | #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ | |
809 | HT_HANDLER_RAND7_6;\ | |
810 | done; | |
811 | ||
812 | #define H_HT0_Instruction_Breakpoint_0x76 | |
813 | #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ | |
814 | rdhpr %htstate, %g1;\ | |
815 | wrhpr %g1, 0x400, %htstate;\ | |
816 | retry;nop | |
817 | # 756 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
818 | #define H_HT0_Instruction_address_range_0x0d | |
819 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
820 | HT_HANDLER_RAND4_1;\ | |
821 | done; | |
822 | ||
823 | #define H_HT0_mem_real_range_0x2d | |
824 | #define SUN_H_HT0_mem_real_range_0x2d \ | |
825 | HT_HANDLER_RAND4_2;\ | |
826 | done; | |
827 | # 767 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
828 | #define H_HT0_mem_address_range_0x2e | |
829 | #define SUN_H_HT0_mem_address_range_0x2e \ | |
830 | HT_HANDLER_RAND4_3;\ | |
831 | done; | |
832 | ||
833 | #define H_HT0_DAE_nc_page_0x16 | |
834 | #define SUN_H_HT0_DAE_nc_page_0x16 \ | |
835 | HT_HANDLER_RAND4_4;\ | |
836 | done; | |
837 | ||
838 | #define H_HT0_DAE_nfo_page_0x17 | |
839 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ | |
840 | HT_HANDLER_RAND4_5;\ | |
841 | done; | |
842 | # 783 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
843 | #define H_HT0_IAE_unauth_access_0x0b | |
844 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
845 | HT_HANDLER_RAND7_3;\ | |
846 | done; | |
847 | # 789 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
848 | #define H_HT0_IAE_nfo_page_0x0c | |
849 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ | |
850 | HT_HANDLER_RAND7_6;\ | |
851 | done; | |
852 | # 795 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
853 | #define H_HT0_Reserved_0x3b | |
854 | #define SUN_H_HT0_Reserved_0x3b \ | |
855 | mov 0x80, %l3;\ | |
856 | stxa %l3, [%l3]0x5f ;\ | |
857 | stxa %l3, [%l3]0x57 ;\ | |
858 | done; | |
859 | # 805 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
860 | #define H_HT0_IAE_privilege_violation_0x08 | |
861 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
862 | HT_HANDLER_RAND7_2;\ | |
863 | done; | |
864 | ||
865 | #define H_HT0_Instruction_Access_MMU_Error_0x71 | |
866 | #define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \ | |
867 | mov 0x80, %l3;\ | |
868 | stxa %l3, [%l3]0x5f ;\ | |
869 | stxa %l3, [%l3]0x57 ;\ | |
870 | retry; | |
871 | ||
872 | #define H_HT0_Data_Access_MMU_Error_0x72 | |
873 | #define SUN_H_HT0_Data_Access_MMU_Error_0x72 \ | |
874 | mov 0x80, %l3;\ | |
875 | stxa %l3, [%l3]0x5f ;\ | |
876 | stxa %l3, [%l3]0x57 ;\ | |
877 | retry; | |
878 | # 825 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
879 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
880 | # 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
881 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
882 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! | |
883 | ||
884 | #ifndef INT_HANDLER_RAND4_1 | |
885 | #define INT_HANDLER_RAND4_1 retry; nop; nop; nop | |
886 | #endif | |
887 | #ifndef INT_HANDLER_RAND7_1 | |
888 | #define INT_HANDLER_RAND7_1 mov 0x20,%g1; mov 1, %g2;stxa %g2,[%g1]0x40 | |
889 | #endif | |
890 | #ifndef INT_HANDLER_RAND4_2 | |
891 | #define INT_HANDLER_RAND4_2 retry; nop; nop; nop | |
892 | #endif | |
893 | #ifndef INT_HANDLER_RAND7_2 | |
894 | #define INT_HANDLER_RAND7_2 mov 0x80,%g1;stxa %g0,[%g1]0x40 | |
895 | #endif | |
896 | #ifndef INT_HANDLER_RAND4_3 | |
897 | #define INT_HANDLER_RAND4_3 retry; nop; nop; nop | |
898 | #endif | |
899 | #ifndef INT_HANDLER_RAND7_3 | |
900 | #define INT_HANDLER_RAND7_3 retry; nop; nop; nop ; nop; nop; nop | |
901 | #endif | |
902 | #define H_HT0_Externally_Initiated_Reset_0x03 | |
903 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ | |
904 | ldxa [%g0] ASI_LSU_CTL_REG, %g1; \ | |
905 | set cregs_lsu_ctl_reg_r64, %g1; \ | |
906 | stxa %g1, [%g0] ASI_LSU_CTL_REG; \ | |
907 | retry;nop | |
908 | ||
909 | #define My_External_Reset \ | |
910 | ldxa [%g0] ASI_LSU_CTL_REG, %l5; \ | |
911 | set cregs_lsu_ctl_reg_r64, %l5; \ | |
912 | stxa %l5, [%g0] ASI_LSU_CTL_REG; \ | |
913 | retry;nop | |
914 | ||
915 | !!!!! SPU Interrupt Handlers | |
916 | ||
917 | #define H_HT0_Control_Word_Queue_Interrupt_0x3c | |
918 | #define My_HT0_Control_Word_Queue_Interrupt_0x3c \ | |
919 | INT_HANDLER_RAND7_1 ;\ | |
920 | retry ; | |
921 | ||
922 | #define H_HT0_Modular_Arithmetic_Interrupt_0x3d | |
923 | #define My_H_HT0_Modular_Arithmetic_Interrupt_0x3d \ | |
924 | INT_HANDLER_RAND7_2 ;\ | |
925 | retry ; | |
926 | # 59 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
927 | !!!!! HW interrupt handlers | |
928 | ||
929 | #define H_HT0_Interrupt_0x60 | |
930 | #define My_HT0_Interrupt_0x60 \ | |
931 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g5 ;\ | |
932 | ldxa [%g0] ASI_SWVR_INTR_R, %g4 ;\ | |
933 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ | |
934 | INT_HANDLER_RAND4_1 ;\ | |
935 | retry; | |
936 | ||
937 | !!!!! Queue interrupt handler | |
938 | # 72 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
939 | #define H_T0_Cpu_Mondo_Trap_0x7c | |
940 | #define My_T0_Cpu_Mondo_Trap_0x7c \ | |
941 | mov 0x3c8, %g3; \ | |
942 | ldxa [%g3] 0x25, %g5; \ | |
943 | mov 0x3c0, %g3; \ | |
944 | stxa %g5, [%g3] 0x25; \ | |
945 | retry; \ | |
946 | nop; \ | |
947 | nop; \ | |
948 | nop | |
949 | ||
950 | #define H_T0_Dev_Mondo_Trap_0x7d | |
951 | #define My_T0_Dev_Mondo_Trap_0x7d \ | |
952 | mov 0x3d8, %g3; \ | |
953 | ldxa [%g3] 0x25, %g5; \ | |
954 | mov 0x3d0, %g3; \ | |
955 | stxa %g5, [%g3] 0x25; \ | |
956 | retry; \ | |
957 | nop; \ | |
958 | nop; \ | |
959 | nop | |
960 | ||
961 | #define H_T0_Resumable_Error_0x7e | |
962 | #define My_T0_Resumable_Error_0x7e \ | |
963 | mov 0x3e8, %g3; \ | |
964 | ldxa [%g3] 0x25, %g5; \ | |
965 | mov 0x3e0, %g3; \ | |
966 | stxa %g5, [%g3] 0x25; \ | |
967 | retry; \ | |
968 | nop; \ | |
969 | nop; \ | |
970 | nop | |
971 | ||
972 | #define H_T1_Cpu_Mondo_Trap_0x7c | |
973 | #define My_T1_Cpu_Mondo_Trap_0x7c \ | |
974 | mov 0x3c8, %g3; \ | |
975 | ldxa [%g3] 0x25, %g5; \ | |
976 | mov 0x3c0, %g3; \ | |
977 | stxa %g5, [%g3] 0x25; \ | |
978 | retry; \ | |
979 | nop; \ | |
980 | nop; \ | |
981 | nop | |
982 | ||
983 | #define H_T1_Dev_Mondo_Trap_0x7d | |
984 | #define My_T1_Dev_Mondo_Trap_0x7d \ | |
985 | mov 0x3d8, %g3; \ | |
986 | ldxa [%g3] 0x25, %g5; \ | |
987 | mov 0x3d0, %g3; \ | |
988 | stxa %g5, [%g3] 0x25; \ | |
989 | retry; \ | |
990 | nop; \ | |
991 | nop; \ | |
992 | nop | |
993 | ||
994 | #define H_T1_Resumable_Error_0x7e | |
995 | #define My_T1_Resumable_Error_0x7e \ | |
996 | mov 0x3e8, %g3; \ | |
997 | ldxa [%g3] 0x25, %g5; \ | |
998 | mov 0x3e0, %g3; \ | |
999 | stxa %g5, [%g3] 0x25; \ | |
1000 | retry; \ | |
1001 | nop; \ | |
1002 | nop; \ | |
1003 | nop | |
1004 | ||
1005 | #define H_HT0_Reserved_0x7c | |
1006 | #define SUN_H_HT0_Reserved_0x7c \ | |
1007 | mov 0x3c8, %g3; \ | |
1008 | ldxa [%g3] 0x25, %g5; \ | |
1009 | mov 0x3c0, %g3; \ | |
1010 | stxa %g5, [%g3] 0x25; \ | |
1011 | retry; \ | |
1012 | nop; \ | |
1013 | nop; \ | |
1014 | nop | |
1015 | ||
1016 | #define H_HT0_Reserved_0x7d | |
1017 | #define SUN_H_HT0_Reserved_0x7d \ | |
1018 | mov 0x3d8, %g3; \ | |
1019 | ldxa [%g3] 0x25, %g5; \ | |
1020 | mov 0x3d0, %g3; \ | |
1021 | stxa %g5, [%g3] 0x25; \ | |
1022 | retry; \ | |
1023 | nop; \ | |
1024 | nop; \ | |
1025 | nop | |
1026 | ||
1027 | #define H_HT0_Reserved_0x7e | |
1028 | #define SUN_H_HT0_Reserved_0x7e \ | |
1029 | mov 0x3e8, %g3; \ | |
1030 | ldxa [%g3] 0x25, %g5; \ | |
1031 | mov 0x3e0, %g3; \ | |
1032 | stxa %g5, [%g3] 0x25; \ | |
1033 | retry; \ | |
1034 | nop; \ | |
1035 | nop; \ | |
1036 | nop | |
1037 | # 172 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1038 | !!!!! Hstick-match trap handler | |
1039 | # 175 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1040 | #define H_T0_Reserved_0x5e | |
1041 | #define My_T0_Reserved_0x5e \ | |
1042 | rdhpr %hintp, %g3; \ | |
1043 | wrhpr %g3, %g3, %hintp; \ | |
1044 | retry; \ | |
1045 | nop; \ | |
1046 | nop; \ | |
1047 | nop; \ | |
1048 | nop; \ | |
1049 | nop | |
1050 | ||
1051 | #define H_HT0_Hstick_Match_0x5e | |
1052 | #define My_HT0_Hstick_Match_0x5e \ | |
1053 | rdhpr %hintp, %g3; \ | |
1054 | wrhpr %g3, %g3, %hintp; \ | |
1055 | retry; \ | |
1056 | nop; \ | |
1057 | nop; \ | |
1058 | nop; \ | |
1059 | nop; \ | |
1060 | nop | |
1061 | ||
1062 | #define H_T0_Reserved_0x5e | |
1063 | #define My_T0_Reserved_0x5e \ | |
1064 | rdhpr %hintp, %g3; \ | |
1065 | wrhpr %g3, %g3, %hintp; \ | |
1066 | retry; \ | |
1067 | nop; \ | |
1068 | nop; \ | |
1069 | nop; \ | |
1070 | nop; \ | |
1071 | nop | |
1072 | ||
1073 | #define H_T1_Reserved_0x5e | |
1074 | #define My_T1_Reserved_0x5e \ | |
1075 | rdhpr %hintp, %g3; \ | |
1076 | wrhpr %g3, %g3, %hintp; \ | |
1077 | retry; \ | |
1078 | nop; \ | |
1079 | nop; \ | |
1080 | nop; \ | |
1081 | nop; \ | |
1082 | nop | |
1083 | # 220 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1084 | !!!!! SW interuupt handlers | |
1085 | # 223 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1086 | #define H_T0_Interrupt_Level_14_0x4e | |
1087 | #define My_T0_Interrupt_Level_14_0x4e \ | |
1088 | rd %softint, %g3; \ | |
1089 | sethi %hi(0x14000), %g3; \ | |
1090 | or %g3, 0x1, %g3; \ | |
1091 | wr %g3, %g0, %clear_softint; \ | |
1092 | retry; \ | |
1093 | nop; \ | |
1094 | nop; \ | |
1095 | nop | |
1096 | ||
1097 | #define H_T0_Interrupt_Level_1_0x41 | |
1098 | #define My_T0_Interrupt_Level_1_0x41 \ | |
1099 | rd %softint, %g3; \ | |
1100 | or %g0, 0x2, %g3; \ | |
1101 | wr %g3, %g0, %clear_softint; \ | |
1102 | retry; \ | |
1103 | nop; \ | |
1104 | nop; \ | |
1105 | nop; \ | |
1106 | nop | |
1107 | ||
1108 | #define H_T0_Interrupt_Level_2_0x42 | |
1109 | #define My_T0_Interrupt_Level_2_0x42 \ | |
1110 | rd %softint, %g3; \ | |
1111 | or %g0, 0x4, %g3; \ | |
1112 | wr %g3, %g0, %clear_softint; \ | |
1113 | retry; \ | |
1114 | nop; \ | |
1115 | nop; \ | |
1116 | nop; \ | |
1117 | nop | |
1118 | ||
1119 | #define H_T0_Interrupt_Level_3_0x43 | |
1120 | #define My_T0_Interrupt_Level_3_0x43 \ | |
1121 | rd %softint, %g3; \ | |
1122 | or %g0, 0x8, %g3; \ | |
1123 | wr %g3, %g0, %clear_softint; \ | |
1124 | retry; \ | |
1125 | nop; \ | |
1126 | nop; \ | |
1127 | nop; \ | |
1128 | nop | |
1129 | ||
1130 | #define H_T0_Interrupt_Level_4_0x44 | |
1131 | #define My_T0_Interrupt_Level_4_0x44 \ | |
1132 | rd %softint, %g3; \ | |
1133 | or %g0, 0x10, %g3; \ | |
1134 | wr %g3, %g0, %clear_softint; \ | |
1135 | retry; \ | |
1136 | nop; \ | |
1137 | nop; \ | |
1138 | nop; \ | |
1139 | nop | |
1140 | ||
1141 | #define H_T0_Interrupt_Level_5_0x45 | |
1142 | #define My_T0_Interrupt_Level_5_0x45 \ | |
1143 | rd %softint, %g3; \ | |
1144 | or %g0, 0x20, %g3; \ | |
1145 | wr %g3, %g0, %clear_softint; \ | |
1146 | retry; \ | |
1147 | nop; \ | |
1148 | nop; \ | |
1149 | nop; \ | |
1150 | nop | |
1151 | ||
1152 | #define H_T0_Interrupt_Level_6_0x46 | |
1153 | #define My_T0_Interrupt_Level_6_0x46 \ | |
1154 | rd %softint, %g3; \ | |
1155 | or %g0, 0x40, %g3; \ | |
1156 | wr %g3, %g0, %clear_softint; \ | |
1157 | retry; \ | |
1158 | nop; \ | |
1159 | nop; \ | |
1160 | nop; \ | |
1161 | nop | |
1162 | ||
1163 | #define H_T0_Interrupt_Level_7_0x47 | |
1164 | #define My_T0_Interrupt_Level_7_0x47 \ | |
1165 | rd %softint, %g3; \ | |
1166 | or %g0, 0x80, %g3; \ | |
1167 | wr %g3, %g0, %clear_softint; \ | |
1168 | retry; \ | |
1169 | nop; \ | |
1170 | nop; \ | |
1171 | nop; \ | |
1172 | nop | |
1173 | ||
1174 | #define H_T0_Interrupt_Level_8_0x48 | |
1175 | #define My_T0_Interrupt_Level_8_0x48 \ | |
1176 | rd %softint, %g3; \ | |
1177 | or %g0, 0x100, %g3; \ | |
1178 | wr %g3, %g0, %clear_softint; \ | |
1179 | retry; \ | |
1180 | nop; \ | |
1181 | nop; \ | |
1182 | nop; \ | |
1183 | nop | |
1184 | ||
1185 | #define H_T0_Interrupt_Level_9_0x49 | |
1186 | #define My_T0_Interrupt_Level_9_0x49 \ | |
1187 | rd %softint, %g3; \ | |
1188 | or %g0, 0x200, %g3; \ | |
1189 | wr %g3, %g0, %clear_softint; \ | |
1190 | retry; \ | |
1191 | nop; \ | |
1192 | nop; \ | |
1193 | nop; \ | |
1194 | nop | |
1195 | ||
1196 | #define H_T0_Interrupt_Level_10_0x4a | |
1197 | #define My_T0_Interrupt_Level_10_0x4a \ | |
1198 | rd %softint, %g3; \ | |
1199 | or %g0, 0x400, %g3; \ | |
1200 | wr %g3, %g0, %clear_softint; \ | |
1201 | retry; \ | |
1202 | nop; \ | |
1203 | nop; \ | |
1204 | nop; \ | |
1205 | nop | |
1206 | ||
1207 | #define H_T0_Interrupt_Level_11_0x4b | |
1208 | #define My_T0_Interrupt_Level_11_0x4b \ | |
1209 | rd %softint, %g3; \ | |
1210 | or %g0, 0x800, %g3; \ | |
1211 | wr %g3, %g0, %clear_softint; \ | |
1212 | retry; \ | |
1213 | nop; \ | |
1214 | nop; \ | |
1215 | nop; \ | |
1216 | nop | |
1217 | ||
1218 | #define H_T0_Interrupt_Level_12_0x4c | |
1219 | #define My_T0_Interrupt_Level_12_0x4c \ | |
1220 | rd %softint, %g3; \ | |
1221 | sethi %hi(0x1000), %g3; \ | |
1222 | wr %g3, %g0, %clear_softint; \ | |
1223 | retry; \ | |
1224 | nop; \ | |
1225 | nop; \ | |
1226 | nop; \ | |
1227 | nop | |
1228 | ||
1229 | #define H_T0_Interrupt_Level_13_0x4d | |
1230 | #define My_T0_Interrupt_Level_13_0x4d \ | |
1231 | rd %softint, %g3; \ | |
1232 | sethi %hi(0x2000), %g3; \ | |
1233 | wr %g3, %g0, %clear_softint; \ | |
1234 | retry; \ | |
1235 | nop; \ | |
1236 | nop; \ | |
1237 | nop; \ | |
1238 | nop | |
1239 | ||
1240 | #define H_T0_Interrupt_Level_15_0x4f | |
1241 | #define My_T0_Interrupt_Level_15_0x4f \ | |
1242 | sethi %hi(0x8000), %g3; \ | |
1243 | wr %g3, %g0, %clear_softint; \ | |
1244 | wr %g0, %g0, %pic;\ | |
1245 | set 0x1ff8bfff, %g4;\ | |
1246 | wr %g4, %g0, %pcr;\ | |
1247 | retry; | |
1248 | ||
1249 | #define H_T1_Interrupt_Level_14_0x4e | |
1250 | #define My_T1_Interrupt_Level_14_0x4e \ | |
1251 | rd %softint, %g3; \ | |
1252 | sethi %hi(0x14000), %g3; \ | |
1253 | or %g3, 0x1, %g3; \ | |
1254 | wr %g3, %g0, %clear_softint; \ | |
1255 | retry; \ | |
1256 | nop; \ | |
1257 | nop; \ | |
1258 | nop | |
1259 | ||
1260 | #define H_T1_Interrupt_Level_1_0x41 | |
1261 | #define My_T1_Interrupt_Level_1_0x41 \ | |
1262 | rd %softint, %g3; \ | |
1263 | or %g0, 0x2, %g3; \ | |
1264 | wr %g3, %g0, %clear_softint; \ | |
1265 | retry; \ | |
1266 | nop; \ | |
1267 | nop; \ | |
1268 | nop; \ | |
1269 | nop | |
1270 | ||
1271 | #define H_T1_Interrupt_Level_2_0x42 | |
1272 | #define My_T1_Interrupt_Level_2_0x42 \ | |
1273 | rd %softint, %g3; \ | |
1274 | or %g0, 0x4, %g3; \ | |
1275 | wr %g3, %g0, %clear_softint; \ | |
1276 | retry; \ | |
1277 | nop; \ | |
1278 | nop; \ | |
1279 | nop; \ | |
1280 | nop | |
1281 | ||
1282 | #define H_T1_Interrupt_Level_3_0x43 | |
1283 | #define My_T1_Interrupt_Level_3_0x43 \ | |
1284 | rd %softint, %g3; \ | |
1285 | or %g0, 0x8, %g3; \ | |
1286 | wr %g3, %g0, %clear_softint; \ | |
1287 | retry; \ | |
1288 | nop; \ | |
1289 | nop; \ | |
1290 | nop; \ | |
1291 | nop | |
1292 | ||
1293 | #define H_T1_Interrupt_Level_4_0x44 | |
1294 | #define My_T1_Interrupt_Level_4_0x44 \ | |
1295 | rd %softint, %g3; \ | |
1296 | or %g0, 0x10, %g3; \ | |
1297 | wr %g3, %g0, %clear_softint; \ | |
1298 | retry; \ | |
1299 | nop; \ | |
1300 | nop; \ | |
1301 | nop; \ | |
1302 | nop | |
1303 | ||
1304 | #define H_T1_Interrupt_Level_5_0x45 | |
1305 | #define My_T1_Interrupt_Level_5_0x45 \ | |
1306 | rd %softint, %g3; \ | |
1307 | or %g0, 0x20, %g3; \ | |
1308 | wr %g3, %g0, %clear_softint; \ | |
1309 | retry; \ | |
1310 | nop; \ | |
1311 | nop; \ | |
1312 | nop; \ | |
1313 | nop | |
1314 | ||
1315 | #define H_T1_Interrupt_Level_6_0x46 | |
1316 | #define My_T1_Interrupt_Level_6_0x46 \ | |
1317 | rd %softint, %g3; \ | |
1318 | or %g0, 0x40, %g3; \ | |
1319 | wr %g3, %g0, %clear_softint; \ | |
1320 | retry; \ | |
1321 | nop; \ | |
1322 | nop; \ | |
1323 | nop; \ | |
1324 | nop | |
1325 | ||
1326 | #define H_T1_Interrupt_Level_7_0x47 | |
1327 | #define My_T1_Interrupt_Level_7_0x47 \ | |
1328 | rd %softint, %g3; \ | |
1329 | or %g0, 0x80, %g3; \ | |
1330 | wr %g3, %g0, %clear_softint; \ | |
1331 | retry; \ | |
1332 | nop; \ | |
1333 | nop; \ | |
1334 | nop; \ | |
1335 | nop | |
1336 | ||
1337 | #define H_T1_Interrupt_Level_8_0x48 | |
1338 | #define My_T1_Interrupt_Level_8_0x48 \ | |
1339 | rd %softint, %g3; \ | |
1340 | or %g0, 0x100, %g3; \ | |
1341 | wr %g3, %g0, %clear_softint; \ | |
1342 | retry; \ | |
1343 | nop; \ | |
1344 | nop; \ | |
1345 | nop; \ | |
1346 | nop | |
1347 | ||
1348 | #define H_T1_Interrupt_Level_9_0x49 | |
1349 | #define My_T1_Interrupt_Level_9_0x49 \ | |
1350 | rd %softint, %g3; \ | |
1351 | or %g0, 0x200, %g3; \ | |
1352 | wr %g3, %g0, %clear_softint; \ | |
1353 | retry; \ | |
1354 | nop; \ | |
1355 | nop; \ | |
1356 | nop; \ | |
1357 | nop | |
1358 | ||
1359 | #define H_T1_Interrupt_Level_10_0x4a | |
1360 | #define My_T1_Interrupt_Level_10_0x4a \ | |
1361 | rd %softint, %g3; \ | |
1362 | or %g0, 0x400, %g3; \ | |
1363 | wr %g3, %g0, %clear_softint; \ | |
1364 | retry; \ | |
1365 | nop; \ | |
1366 | nop; \ | |
1367 | nop; \ | |
1368 | nop | |
1369 | ||
1370 | #define H_T1_Interrupt_Level_11_0x4b | |
1371 | #define My_T1_Interrupt_Level_11_0x4b \ | |
1372 | rd %softint, %g3; \ | |
1373 | or %g0, 0x800, %g3; \ | |
1374 | wr %g3, %g0, %clear_softint; \ | |
1375 | retry; \ | |
1376 | nop; \ | |
1377 | nop; \ | |
1378 | nop; \ | |
1379 | nop | |
1380 | ||
1381 | #define H_T1_Interrupt_Level_12_0x4c | |
1382 | #define My_T1_Interrupt_Level_12_0x4c \ | |
1383 | rd %softint, %g3; \ | |
1384 | sethi %hi(0x1000), %g3; \ | |
1385 | wr %g3, %g0, %clear_softint; \ | |
1386 | retry; \ | |
1387 | nop; \ | |
1388 | nop; \ | |
1389 | nop; \ | |
1390 | nop | |
1391 | ||
1392 | #define H_T1_Interrupt_Level_13_0x4d | |
1393 | #define My_T1_Interrupt_Level_13_0x4d \ | |
1394 | rd %softint, %g3; \ | |
1395 | sethi %hi(0x2000), %g3; \ | |
1396 | wr %g3, %g0, %clear_softint; \ | |
1397 | retry; \ | |
1398 | nop; \ | |
1399 | nop; \ | |
1400 | nop; \ | |
1401 | nop | |
1402 | ||
1403 | #define H_T1_Interrupt_Level_15_0x4f | |
1404 | #define My_T1_Interrupt_Level_15_0x4f \ | |
1405 | sethi %hi(0x8000), %g3; \ | |
1406 | wr %g3, %g0, %clear_softint; \ | |
1407 | wr %g0, %g0, %pic;\ | |
1408 | set 0x1ff8bfff, %g4;\ | |
1409 | wr %g4, %g0, %pcr;\ | |
1410 | retry; | |
1411 | ||
1412 | #define H_HT0_Interrupt_Level_14_0x4e | |
1413 | #define My_HT0_Interrupt_Level_14_0x4e \ | |
1414 | rd %softint, %g3; \ | |
1415 | sethi %hi(0x14000), %g3; \ | |
1416 | or %g3, 0x1, %g3; \ | |
1417 | wr %g3, %g0, %clear_softint; \ | |
1418 | retry; \ | |
1419 | nop; \ | |
1420 | nop; \ | |
1421 | nop | |
1422 | ||
1423 | #define H_HT0_Interrupt_Level_1_0x41 | |
1424 | #define My_HT0_Interrupt_Level_1_0x41 \ | |
1425 | rd %softint, %g3; \ | |
1426 | or %g0, 0x2, %g3; \ | |
1427 | wr %g3, %g0, %clear_softint; \ | |
1428 | retry; \ | |
1429 | nop; \ | |
1430 | nop; \ | |
1431 | nop; \ | |
1432 | nop | |
1433 | ||
1434 | #define H_HT0_Interrupt_Level_2_0x42 | |
1435 | #define My_HT0_Interrupt_Level_2_0x42 \ | |
1436 | rd %softint, %g3; \ | |
1437 | or %g0, 0x4, %g3; \ | |
1438 | wr %g3, %g0, %clear_softint; \ | |
1439 | retry; \ | |
1440 | nop; \ | |
1441 | nop; \ | |
1442 | nop; \ | |
1443 | nop | |
1444 | ||
1445 | #define H_HT0_Interrupt_Level_3_0x43 | |
1446 | #define My_HT0_Interrupt_Level_3_0x43 \ | |
1447 | rd %softint, %g3; \ | |
1448 | or %g0, 0x8, %g3; \ | |
1449 | wr %g3, %g0, %clear_softint; \ | |
1450 | retry; \ | |
1451 | nop; \ | |
1452 | nop; \ | |
1453 | nop; \ | |
1454 | nop | |
1455 | ||
1456 | #define H_HT0_Interrupt_Level_4_0x44 | |
1457 | #define My_HT0_Interrupt_Level_4_0x44 \ | |
1458 | rd %softint, %g3; \ | |
1459 | or %g0, 0x10, %g3; \ | |
1460 | wr %g3, %g0, %clear_softint; \ | |
1461 | retry; \ | |
1462 | nop; \ | |
1463 | nop; \ | |
1464 | nop; \ | |
1465 | nop | |
1466 | ||
1467 | #define H_HT0_Interrupt_Level_5_0x45 | |
1468 | #define My_HT0_Interrupt_Level_5_0x45 \ | |
1469 | rd %softint, %g3; \ | |
1470 | or %g0, 0x20, %g3; \ | |
1471 | wr %g3, %g0, %clear_softint; \ | |
1472 | retry; \ | |
1473 | nop; \ | |
1474 | nop; \ | |
1475 | nop; \ | |
1476 | nop | |
1477 | ||
1478 | #define H_HT0_Interrupt_Level_6_0x46 | |
1479 | #define My_HT0_Interrupt_Level_6_0x46 \ | |
1480 | rd %softint, %g3; \ | |
1481 | or %g0, 0x40, %g3; \ | |
1482 | wr %g3, %g0, %clear_softint; \ | |
1483 | retry; \ | |
1484 | nop; \ | |
1485 | nop; \ | |
1486 | nop; \ | |
1487 | nop | |
1488 | ||
1489 | #define H_HT0_Interrupt_Level_7_0x47 | |
1490 | #define My_HT0_Interrupt_Level_7_0x47 \ | |
1491 | rd %softint, %g3; \ | |
1492 | or %g0, 0x80, %g3; \ | |
1493 | wr %g3, %g0, %clear_softint; \ | |
1494 | retry; \ | |
1495 | nop; \ | |
1496 | nop; \ | |
1497 | nop; \ | |
1498 | nop | |
1499 | ||
1500 | #define H_HT0_Interrupt_Level_8_0x48 | |
1501 | #define My_HT0_Interrupt_Level_8_0x48 \ | |
1502 | rd %softint, %g3; \ | |
1503 | or %g0, 0x100, %g3; \ | |
1504 | wr %g3, %g0, %clear_softint; \ | |
1505 | retry; \ | |
1506 | nop; \ | |
1507 | nop; \ | |
1508 | nop; \ | |
1509 | nop | |
1510 | ||
1511 | #define H_HT0_Interrupt_Level_9_0x49 | |
1512 | #define My_HT0_Interrupt_Level_9_0x49 \ | |
1513 | rd %softint, %g3; \ | |
1514 | or %g0, 0x200, %g3; \ | |
1515 | wr %g3, %g0, %clear_softint; \ | |
1516 | retry; \ | |
1517 | nop; \ | |
1518 | nop; \ | |
1519 | nop; \ | |
1520 | nop | |
1521 | ||
1522 | #define H_HT0_Interrupt_Level_10_0x4a | |
1523 | #define My_HT0_Interrupt_Level_10_0x4a \ | |
1524 | rd %softint, %g3; \ | |
1525 | or %g0, 0x400, %g3; \ | |
1526 | wr %g3, %g0, %clear_softint; \ | |
1527 | retry; \ | |
1528 | nop; \ | |
1529 | nop; \ | |
1530 | nop; \ | |
1531 | nop | |
1532 | ||
1533 | #define H_HT0_Interrupt_Level_11_0x4b | |
1534 | #define My_HT0_Interrupt_Level_11_0x4b \ | |
1535 | rd %softint, %g3; \ | |
1536 | or %g0, 0x800, %g3; \ | |
1537 | wr %g3, %g0, %clear_softint; \ | |
1538 | retry; \ | |
1539 | nop; \ | |
1540 | nop; \ | |
1541 | nop; \ | |
1542 | nop | |
1543 | ||
1544 | #define H_HT0_Interrupt_Level_12_0x4c | |
1545 | #define My_HT0_Interrupt_Level_12_0x4c \ | |
1546 | rd %softint, %g3; \ | |
1547 | sethi %hi(0x1000), %g3; \ | |
1548 | wr %g3, %g0, %clear_softint; \ | |
1549 | retry; \ | |
1550 | nop; \ | |
1551 | nop; \ | |
1552 | nop; \ | |
1553 | nop | |
1554 | ||
1555 | #define H_HT0_Interrupt_Level_13_0x4d | |
1556 | #define My_HT0_Interrupt_Level_13_0x4d \ | |
1557 | rd %softint, %g3; \ | |
1558 | sethi %hi(0x2000), %g3; \ | |
1559 | wr %g3, %g0, %clear_softint; \ | |
1560 | retry; \ | |
1561 | nop; \ | |
1562 | nop; \ | |
1563 | nop; \ | |
1564 | nop | |
1565 | ||
1566 | #define H_HT0_Interrupt_Level_15_0x4f | |
1567 | #define My_HT0_Interrupt_Level_15_0x4f \ | |
1568 | sethi %hi(0x8000), %g3; \ | |
1569 | wr %g3, %g0, %clear_softint; \ | |
1570 | wr %g0, %g0, %pic;\ | |
1571 | set 0x1ff8bfff, %g4;\ | |
1572 | wr %g4, %g0, %pcr;\ | |
1573 | retry; | |
1574 | # 713 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1575 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
1576 | # 488 "diag.j" | |
1577 | !# Steer towards main TBA on these errors .. | |
1578 | !# These are redefines ... | |
1579 | #undef SUN_H_HT0_DAE_nc_page_0x16 | |
1580 | #define SUN_H_HT0_DAE_nc_page_0x16 \ | |
1581 | best_set_reg(0x120000, %r1, %r2);\ | |
1582 | wrpr %r0, %r2, %tba; \ | |
1583 | done;nop | |
1584 | ||
1585 | #undef SUN_H_HT0_DAE_nfo_page_0x17 | |
1586 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ | |
1587 | best_set_reg(0x120000, %r1, %r2);\ | |
1588 | wrpr %r0, %r2, %tba; \ | |
1589 | done;nop | |
1590 | ||
1591 | #undef SUN_H_HT0_IAE_unauth_access_0x0b | |
1592 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
1593 | set resolve_bad_tte, %g3;\ | |
1594 | jmp %g3;\ | |
1595 | nop | |
1596 | ||
1597 | #undef My_HT0_IAE_privilege_violation_0x08 | |
1598 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
1599 | set resolve_bad_tte, %g3;\ | |
1600 | jmp %g3;\ | |
1601 | nop | |
1602 | ||
1603 | #define H_HT0_Instruction_address_range_0x0d | |
1604 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
1605 | rdpr %tpc, %g1;\ | |
1606 | rdpr %tnpc, %g2;\ | |
1607 | stw %g1, [%i7];\ | |
1608 | stw %g2, [%i7+4];\ | |
1609 | jmpl %r27+8, %r27;\ | |
1610 | fdivd %f0, %f4, %f4;\ | |
1611 | nop; | |
1612 | ||
1613 | #define H_HT0_Instruction_real_range_0x0e | |
1614 | #define SUN_H_HT0_Instruction_real_range_0x0e \ | |
1615 | rdpr %tpc, %g1;\ | |
1616 | rdpr %tnpc, %g2;\ | |
1617 | stw %g1, [%i7];\ | |
1618 | stw %g2, [%i7+4];\ | |
1619 | jmpl %r27+8, %r27;\ | |
1620 | fdivd %f0, %f4, %f4;\ | |
1621 | nop; | |
1622 | ||
1623 | #undef SUN_H_HT0_IAE_nfo_page_0x0c | |
1624 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ | |
1625 | set resolve_bad_tte, %g3;\ | |
1626 | jmp %g3;\ | |
1627 | nop | |
1628 | ||
1629 | #define H_HT0_Instruction_Invalid_TSB_Entry_0x2a | |
1630 | #define SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a \ | |
1631 | set restore_range_regs, %g3;\ | |
1632 | jmp %g3;\ | |
1633 | nop | |
1634 | ||
1635 | #define H_HT0_Data_Invalid_TSB_Entry_0x2b | |
1636 | #define SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b \ | |
1637 | set restore_range_regs, %g3;\ | |
1638 | jmp %g3;\ | |
1639 | nop | |
1640 | ||
1641 | #undef FAST_BOOT | |
1642 | #include "hboot.s" | |
1643 | # 556 "diag.j" | |
1644 | #define LOMEIN_TEXT_VA [0x]mpeval(MAIN_BASE_TEXT_VA&0xffffffff,16) | |
1645 | #define LOMEIN_DATA_VA [0x]mpeval(MAIN_BASE_DATA_VA&0xffffffff,16) | |
1646 | changequote([, ])dnl | |
1647 | SECTION .LOMEIN TEXT_VA=LOMEIN_TEXT_VA, DATA_VA=LOMEIN_DATA_VA | |
1648 | attr_text { | |
1649 | Name = .LOMEIN, | |
1650 | VA= LOMEIN_TEXT_VA, | |
1651 | RA= MAIN_BASE_TEXT_RA, | |
1652 | PA= ra2pa2(MAIN_BASE_TEXT_RA, 0), | |
1653 | part_0_ctx_nonzero_tsb_config_1, | |
1654 | part_0_ctx_zero_tsb_config_1, | |
1655 | TTE_G=1, TTE_Context=0x44, TTE_V=1, | |
1656 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1657 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, | |
1658 | tsbonly | |
1659 | } | |
1660 | attr_data { | |
1661 | Name = .LOMEIN, | |
1662 | VA= LOMEIN_DATA_VA, | |
1663 | RA= MAIN_BASE_DATA_RA, | |
1664 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), | |
1665 | part_0_ctx_nonzero_tsb_config_2, | |
1666 | part_0_ctx_zero_tsb_config_2 | |
1667 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1668 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1669 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1670 | tsbonly | |
1671 | } | |
1672 | attr_data { | |
1673 | Name = .LOMEIN, | |
1674 | VA= LOMEIN_DATA_VA, | |
1675 | RA= MAIN_BASE_DATA_RA, | |
1676 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), | |
1677 | part_0_ctx_nonzero_tsb_config_3, | |
1678 | part_0_ctx_zero_tsb_config_3 | |
1679 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1680 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1681 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1682 | tsbonly | |
1683 | } | |
1684 | .text | |
1685 | .align 0x100000 | |
1686 | nop | |
1687 | .data | |
1688 | .word 0x0 | |
1689 | ||
1690 | SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA | |
1691 | attr_text { | |
1692 | Name = .MAIN, | |
1693 | VA=MAIN_BASE_TEXT_VA, | |
1694 | RA= LOMEIN_TEXT_VA, | |
1695 | PA= LOMEIN_TEXT_VA, | |
1696 | part_0_ctx_nonzero_tsb_config_2, | |
1697 | part_0_ctx_zero_tsb_config_2, | |
1698 | TTE_G=1, TTE_Context=0x44, TTE_V=1, | |
1699 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1700 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, | |
1701 | } | |
1702 | ||
1703 | attr_data { | |
1704 | Name = .MAIN, | |
1705 | VA=MAIN_BASE_DATA_VA | |
1706 | RA= LOMEIN_DATA_VA, | |
1707 | PA= LOMEIN_DATA_VA, | |
1708 | part_0_ctx_nonzero_tsb_config_1, | |
1709 | part_0_ctx_zero_tsb_config_1 | |
1710 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1711 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1712 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1713 | } | |
1714 | ||
1715 | attr_data { | |
1716 | Name = .MAIN, | |
1717 | VA=MAIN_BASE_DATA_VA | |
1718 | RA= LOMEIN_DATA_VA, | |
1719 | PA= LOMEIN_DATA_VA, | |
1720 | part_0_ctx_nonzero_tsb_config_3, | |
1721 | part_0_ctx_zero_tsb_config_3 | |
1722 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1723 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1724 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1725 | tsbonly | |
1726 | } | |
1727 | ||
1728 | attr_text { | |
1729 | Name = .MAIN, | |
1730 | VA=MAIN_BASE_TEXT_VA, | |
1731 | hypervisor | |
1732 | } | |
1733 | ||
1734 | attr_data { | |
1735 | Name = .MAIN, | |
1736 | VA=MAIN_BASE_DATA_VA | |
1737 | hypervisor | |
1738 | } | |
1739 | changequote(`,')dnl' | |
1740 | ||
1741 | .text | |
1742 | .global main | |
1743 | main: | |
1744 | ||
1745 | ! Set up ld/st area per thread | |
1746 | ta T_CHANGE_HPRIV | |
1747 | ldxa [%g0]0x63, %o2 | |
1748 | and %o2, 0x7, %o1 | |
1749 | brnz %o1, init_start | |
1750 | mov 0xff, %r10 | |
1751 | lock_sync_thds: | |
1752 | set sync_thr_counter4, %r23 | |
1753 | #ifndef SPC | |
1754 | and %o2, 0x38, %o2 | |
1755 | add %o2,%r23,%r23 !Core's sync counter | |
1756 | #endif | |
1757 | st %r10, [%r23] !lock sync_thr_counter4 | |
1758 | add %r23, 64, %r23 | |
1759 | st %r10, [%r23] !lock sync_thr_counter5 | |
1760 | add %r23, 64, %r23 | |
1761 | st %r10, [%r23] !lock sync_thr_counter6 | |
1762 | init_start: | |
1763 | ta T_CHANGE_NONHPRIV | |
1764 | umul %r9, 256, %r31 | |
1765 | setx user_data_start, %r1, %r3 | |
1766 | add %r31, %r3, %r31 | |
1767 | wr %r0, 0x4, %asi | |
1768 | ||
1769 | !Initializing integer registers | |
1770 | ldx [%r31+0], %r0 | |
1771 | ldx [%r31+8], %r1 | |
1772 | ldx [%r31+16], %r2 | |
1773 | ldx [%r31+24], %r3 | |
1774 | ldx [%r31+32], %r4 | |
1775 | ldx [%r31+40], %r5 | |
1776 | ldx [%r31+48], %r6 | |
1777 | ldx [%r31+56], %r7 | |
1778 | ldx [%r31+64], %r8 | |
1779 | ldx [%r31+72], %r9 | |
1780 | ldx [%r31+80], %r10 | |
1781 | ldx [%r31+88], %r11 | |
1782 | ldx [%r31+96], %r12 | |
1783 | ldx [%r31+104], %r13 | |
1784 | ldx [%r31+112], %r14 | |
1785 | mov %r31, %r15 | |
1786 | ldx [%r31+128], %r16 | |
1787 | ldx [%r31+136], %r17 | |
1788 | ldx [%r31+144], %r18 | |
1789 | ldx [%r31+152], %r19 | |
1790 | ldx [%r31+160], %r20 | |
1791 | ldx [%r31+168], %r21 | |
1792 | ldx [%r31+176], %r22 | |
1793 | ldx [%r31+184], %r23 | |
1794 | ldx [%r31+192], %r24 | |
1795 | ldx [%r31+200], %r25 | |
1796 | ldx [%r31+208], %r26 | |
1797 | ldx [%r31+216], %r27 | |
1798 | ldx [%r31+224], %r28 | |
1799 | ldx [%r31+232], %r29 | |
1800 | mov 0x34, %r14 | |
1801 | mov 0xb5, %r30 | |
1802 | save %r31, %r0, %r31 | |
1803 | ldx [%r31+0], %r0 | |
1804 | ldx [%r31+8], %r1 | |
1805 | ldx [%r31+16], %r2 | |
1806 | ldx [%r31+24], %r3 | |
1807 | ldx [%r31+32], %r4 | |
1808 | ldx [%r31+40], %r5 | |
1809 | ldx [%r31+48], %r6 | |
1810 | ldx [%r31+56], %r7 | |
1811 | ldx [%r31+64], %r8 | |
1812 | ldx [%r31+72], %r9 | |
1813 | ldx [%r31+80], %r10 | |
1814 | ldx [%r31+88], %r11 | |
1815 | ldx [%r31+96], %r12 | |
1816 | ldx [%r31+104], %r13 | |
1817 | ldx [%r31+112], %r14 | |
1818 | mov %r31, %r15 | |
1819 | ldx [%r31+128], %r16 | |
1820 | ldx [%r31+136], %r17 | |
1821 | ldx [%r31+144], %r18 | |
1822 | ldx [%r31+152], %r19 | |
1823 | ldx [%r31+160], %r20 | |
1824 | ldx [%r31+168], %r21 | |
1825 | ldx [%r31+176], %r22 | |
1826 | ldx [%r31+184], %r23 | |
1827 | ldx [%r31+192], %r24 | |
1828 | ldx [%r31+200], %r25 | |
1829 | ldx [%r31+208], %r26 | |
1830 | ldx [%r31+216], %r27 | |
1831 | ldx [%r31+224], %r28 | |
1832 | ldx [%r31+232], %r29 | |
1833 | mov 0x35, %r14 | |
1834 | mov 0x33, %r30 | |
1835 | save %r31, %r0, %r31 | |
1836 | ldx [%r31+0], %r0 | |
1837 | ldx [%r31+8], %r1 | |
1838 | ldx [%r31+16], %r2 | |
1839 | ldx [%r31+24], %r3 | |
1840 | ldx [%r31+32], %r4 | |
1841 | ldx [%r31+40], %r5 | |
1842 | ldx [%r31+48], %r6 | |
1843 | ldx [%r31+56], %r7 | |
1844 | ldx [%r31+64], %r8 | |
1845 | ldx [%r31+72], %r9 | |
1846 | ldx [%r31+80], %r10 | |
1847 | ldx [%r31+88], %r11 | |
1848 | ldx [%r31+96], %r12 | |
1849 | ldx [%r31+104], %r13 | |
1850 | ldx [%r31+112], %r14 | |
1851 | mov %r31, %r15 | |
1852 | ldx [%r31+128], %r16 | |
1853 | ldx [%r31+136], %r17 | |
1854 | ldx [%r31+144], %r18 | |
1855 | ldx [%r31+152], %r19 | |
1856 | ldx [%r31+160], %r20 | |
1857 | ldx [%r31+168], %r21 | |
1858 | ldx [%r31+176], %r22 | |
1859 | ldx [%r31+184], %r23 | |
1860 | ldx [%r31+192], %r24 | |
1861 | ldx [%r31+200], %r25 | |
1862 | ldx [%r31+208], %r26 | |
1863 | ldx [%r31+216], %r27 | |
1864 | ldx [%r31+224], %r28 | |
1865 | ldx [%r31+232], %r29 | |
1866 | mov 0xb1, %r14 | |
1867 | mov 0xb2, %r30 | |
1868 | save %r31, %r0, %r31 | |
1869 | ldx [%r31+0], %r0 | |
1870 | ldx [%r31+8], %r1 | |
1871 | ldx [%r31+16], %r2 | |
1872 | ldx [%r31+24], %r3 | |
1873 | ldx [%r31+32], %r4 | |
1874 | ldx [%r31+40], %r5 | |
1875 | ldx [%r31+48], %r6 | |
1876 | ldx [%r31+56], %r7 | |
1877 | ldx [%r31+64], %r8 | |
1878 | ldx [%r31+72], %r9 | |
1879 | ldx [%r31+80], %r10 | |
1880 | ldx [%r31+88], %r11 | |
1881 | ldx [%r31+96], %r12 | |
1882 | ldx [%r31+104], %r13 | |
1883 | ldx [%r31+112], %r14 | |
1884 | mov %r31, %r15 | |
1885 | ldx [%r31+128], %r16 | |
1886 | ldx [%r31+136], %r17 | |
1887 | ldx [%r31+144], %r18 | |
1888 | ldx [%r31+152], %r19 | |
1889 | ldx [%r31+160], %r20 | |
1890 | ldx [%r31+168], %r21 | |
1891 | ldx [%r31+176], %r22 | |
1892 | ldx [%r31+184], %r23 | |
1893 | ldx [%r31+192], %r24 | |
1894 | ldx [%r31+200], %r25 | |
1895 | ldx [%r31+208], %r26 | |
1896 | ldx [%r31+216], %r27 | |
1897 | ldx [%r31+224], %r28 | |
1898 | ldx [%r31+232], %r29 | |
1899 | mov 0x30, %r14 | |
1900 | mov 0xb1, %r30 | |
1901 | save %r31, %r0, %r31 | |
1902 | ldx [%r31+0], %r0 | |
1903 | ldx [%r31+8], %r1 | |
1904 | ldx [%r31+16], %r2 | |
1905 | ldx [%r31+24], %r3 | |
1906 | ldx [%r31+32], %r4 | |
1907 | ldx [%r31+40], %r5 | |
1908 | ldx [%r31+48], %r6 | |
1909 | ldx [%r31+56], %r7 | |
1910 | ldx [%r31+64], %r8 | |
1911 | ldx [%r31+72], %r9 | |
1912 | ldx [%r31+80], %r10 | |
1913 | ldx [%r31+88], %r11 | |
1914 | ldx [%r31+96], %r12 | |
1915 | ldx [%r31+104], %r13 | |
1916 | ldx [%r31+112], %r14 | |
1917 | mov %r31, %r15 | |
1918 | ldx [%r31+128], %r16 | |
1919 | ldx [%r31+136], %r17 | |
1920 | ldx [%r31+144], %r18 | |
1921 | ldx [%r31+152], %r19 | |
1922 | ldx [%r31+160], %r20 | |
1923 | ldx [%r31+168], %r21 | |
1924 | ldx [%r31+176], %r22 | |
1925 | ldx [%r31+184], %r23 | |
1926 | ldx [%r31+192], %r24 | |
1927 | ldx [%r31+200], %r25 | |
1928 | ldx [%r31+208], %r26 | |
1929 | ldx [%r31+216], %r27 | |
1930 | ldx [%r31+224], %r28 | |
1931 | ldx [%r31+232], %r29 | |
1932 | mov 0xb2, %r14 | |
1933 | mov 0x35, %r30 | |
1934 | save %r31, %r0, %r31 | |
1935 | ldx [%r31+0], %r0 | |
1936 | ldx [%r31+8], %r1 | |
1937 | ldx [%r31+16], %r2 | |
1938 | ldx [%r31+24], %r3 | |
1939 | ldx [%r31+32], %r4 | |
1940 | ldx [%r31+40], %r5 | |
1941 | ldx [%r31+48], %r6 | |
1942 | ldx [%r31+56], %r7 | |
1943 | ldx [%r31+64], %r8 | |
1944 | ldx [%r31+72], %r9 | |
1945 | ldx [%r31+80], %r10 | |
1946 | ldx [%r31+88], %r11 | |
1947 | ldx [%r31+96], %r12 | |
1948 | ldx [%r31+104], %r13 | |
1949 | ldx [%r31+112], %r14 | |
1950 | mov %r31, %r15 | |
1951 | ldx [%r31+128], %r16 | |
1952 | ldx [%r31+136], %r17 | |
1953 | ldx [%r31+144], %r18 | |
1954 | ldx [%r31+152], %r19 | |
1955 | ldx [%r31+160], %r20 | |
1956 | ldx [%r31+168], %r21 | |
1957 | ldx [%r31+176], %r22 | |
1958 | ldx [%r31+184], %r23 | |
1959 | ldx [%r31+192], %r24 | |
1960 | ldx [%r31+200], %r25 | |
1961 | ldx [%r31+208], %r26 | |
1962 | ldx [%r31+216], %r27 | |
1963 | ldx [%r31+224], %r28 | |
1964 | ldx [%r31+232], %r29 | |
1965 | mov 0xb0, %r14 | |
1966 | mov 0x32, %r30 | |
1967 | save %r31, %r0, %r31 | |
1968 | ldx [%r31+0], %r0 | |
1969 | ldx [%r31+8], %r1 | |
1970 | ldx [%r31+16], %r2 | |
1971 | ldx [%r31+24], %r3 | |
1972 | ldx [%r31+32], %r4 | |
1973 | ldx [%r31+40], %r5 | |
1974 | ldx [%r31+48], %r6 | |
1975 | ldx [%r31+56], %r7 | |
1976 | ldx [%r31+64], %r8 | |
1977 | ldx [%r31+72], %r9 | |
1978 | ldx [%r31+80], %r10 | |
1979 | ldx [%r31+88], %r11 | |
1980 | ldx [%r31+96], %r12 | |
1981 | ldx [%r31+104], %r13 | |
1982 | ldx [%r31+112], %r14 | |
1983 | mov %r31, %r15 | |
1984 | ldx [%r31+128], %r16 | |
1985 | ldx [%r31+136], %r17 | |
1986 | ldx [%r31+144], %r18 | |
1987 | ldx [%r31+152], %r19 | |
1988 | ldx [%r31+160], %r20 | |
1989 | ldx [%r31+168], %r21 | |
1990 | ldx [%r31+176], %r22 | |
1991 | ldx [%r31+184], %r23 | |
1992 | ldx [%r31+192], %r24 | |
1993 | ldx [%r31+200], %r25 | |
1994 | ldx [%r31+208], %r26 | |
1995 | ldx [%r31+216], %r27 | |
1996 | ldx [%r31+224], %r28 | |
1997 | ldx [%r31+232], %r29 | |
1998 | mov 0x31, %r14 | |
1999 | mov 0x34, %r30 | |
2000 | save %r31, %r0, %r31 | |
2001 | restore | |
2002 | restore | |
2003 | restore | |
2004 | !Initializing float registers | |
2005 | ldd [%r31+0], %f0 | |
2006 | ldd [%r31+16], %f2 | |
2007 | ldd [%r31+32], %f4 | |
2008 | ldd [%r31+48], %f6 | |
2009 | ldd [%r31+64], %f8 | |
2010 | ldd [%r31+80], %f10 | |
2011 | ldd [%r31+96], %f12 | |
2012 | ldd [%r31+112], %f14 | |
2013 | ldd [%r31+128], %f16 | |
2014 | ldd [%r31+144], %f18 | |
2015 | ldd [%r31+160], %f20 | |
2016 | ldd [%r31+176], %f22 | |
2017 | ldd [%r31+192], %f24 | |
2018 | ldd [%r31+208], %f26 | |
2019 | ldd [%r31+224], %f28 | |
2020 | ldd [%r31+240], %f30 | |
2021 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. | |
2022 | ta T_CHANGE_HPRIV | |
2023 | setx diag_finish, %r29, %r28 | |
2024 | add %r28, 4, %r29 | |
2025 | wrpr %g0, 1, %tl | |
2026 | wrpr %r28, %tpc | |
2027 | wrpr %r29, %tnpc | |
2028 | wrpr %g0, 2, %tl | |
2029 | wrpr %r28, %tpc | |
2030 | wrpr %r29, %tnpc | |
2031 | wrpr %g0, 3, %tl | |
2032 | wrpr %r28, %tpc | |
2033 | wrpr %r29, %tnpc | |
2034 | wrpr %g0, 4, %tl | |
2035 | wrpr %r28, %tpc | |
2036 | wrpr %r29, %tnpc | |
2037 | wrpr %g0, 5, %tl | |
2038 | wrpr %r28, %tpc | |
2039 | wrpr %r29, %tnpc | |
2040 | wrpr %g0, 6, %tl | |
2041 | wrpr %r28, %tpc | |
2042 | wrpr %r29, %tnpc | |
2043 | wrpr %g0, 0, %tl | |
2044 | ||
2045 | !Initializing Tick Cmprs | |
2046 | mov 1, %g2 | |
2047 | sllx %g2, 63, %g2 | |
2048 | or %g1, %g2, %g1 | |
2049 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2050 | wr %g1, %g0, %tick_cmpr | |
2051 | wr %g1, %g0, %sys_tick_cmpr | |
2052 | ||
2053 | ! Set up fpr PMU traps | |
2054 | set 0x1ff8bfff, %g2 | |
2055 | b fork_threads | |
2056 | wr %g2, %g0, %pcr | |
2057 | ||
2058 | common_target: | |
2059 | nop | |
2060 | sub %r27, 8, %r27 | |
2061 | and %r27, 8, %r12 | |
2062 | brz,a %r12, .+8 | |
2063 | lduw [%r27], %r12 ! load jmp dest into dcache - xinval | |
2064 | jmp %r27 | |
2065 | .word 0xc36fe1eb ! 1: PREFETCH_I prefetch [%r31 + 0x01eb], #one_read | |
2066 | nop | |
2067 | jmp %r27 | |
2068 | nop | |
2069 | fork_threads: | |
2070 | ta %icc, T_RD_THID | |
2071 | ! fork: source strm = 0xffffffff; target strm = 0x1 | |
2072 | cmp %o1, 0 | |
2073 | setx fork_lbl_0_1, %g2, %g3 | |
2074 | be,a .+8 | |
2075 | jmp %g3 | |
2076 | nop | |
2077 | ! fork: source strm = 0xffffffff; target strm = 0x2 | |
2078 | cmp %o1, 1 | |
2079 | setx fork_lbl_0_2, %g2, %g3 | |
2080 | be,a .+8 | |
2081 | jmp %g3 | |
2082 | nop | |
2083 | ! fork: source strm = 0xffffffff; target strm = 0x4 | |
2084 | cmp %o1, 2 | |
2085 | setx fork_lbl_0_3, %g2, %g3 | |
2086 | be,a .+8 | |
2087 | jmp %g3 | |
2088 | nop | |
2089 | ! fork: source strm = 0xffffffff; target strm = 0x8 | |
2090 | cmp %o1, 3 | |
2091 | setx fork_lbl_0_4, %g2, %g3 | |
2092 | be,a .+8 | |
2093 | jmp %g3 | |
2094 | nop | |
2095 | ! fork: source strm = 0xffffffff; target strm = 0x10 | |
2096 | cmp %o1, 4 | |
2097 | setx fork_lbl_0_5, %g2, %g3 | |
2098 | be,a .+8 | |
2099 | jmp %g3 | |
2100 | nop | |
2101 | ! fork: source strm = 0xffffffff; target strm = 0x20 | |
2102 | cmp %o1, 5 | |
2103 | setx fork_lbl_0_6, %g2, %g3 | |
2104 | be,a .+8 | |
2105 | jmp %g3 | |
2106 | nop | |
2107 | ! fork: source strm = 0xffffffff; target strm = 0x40 | |
2108 | cmp %o1, 6 | |
2109 | setx fork_lbl_0_7, %g2, %g3 | |
2110 | be,a .+8 | |
2111 | jmp %g3 | |
2112 | nop | |
2113 | ! fork: source strm = 0xffffffff; target strm = 0x80 | |
2114 | cmp %o1, 7 | |
2115 | setx fork_lbl_0_8, %g2, %g3 | |
2116 | be,a .+8 | |
2117 | jmp %g3 | |
2118 | nop | |
2119 | setx join_lbl_0_0, %g1, %g2 | |
2120 | jmp %g2 | |
2121 | nop | |
2122 | setx join_lbl_0_0, %g1, %g2 | |
2123 | jmp %g2 | |
2124 | nop | |
2125 | fork_lbl_0_8: | |
2126 | rd %asi, %r12 | |
2127 | #ifdef XIR_RND_CORES | |
2128 | setup_xir_80: | |
2129 | setx 0xc7ff2d486581d478, %r1, %r28 | |
2130 | mov 0x30, %r17 | |
2131 | stxa %r28, [%r17] 0x41 | |
2132 | #endif | |
2133 | setup_spu_80: | |
2134 | wr %g0, 0x40, %asi | |
2135 | !# allocate control word queue (e.g., setup head/tail/first/last registers) | |
2136 | set CWQ_BASE, %l6 | |
2137 | ||
2138 | #ifndef SPC | |
2139 | ldxa [%g0]0x63, %o2 | |
2140 | and %o2, 0x38, %o2 | |
2141 | sllx %o2, 5, %o2 !(CID*256) | |
2142 | add %l6, %o2, %l6 | |
2143 | #endif | |
2144 | # 780 "diag.j" | |
2145 | !# write base addr to first, head, and tail ptr | |
2146 | !# first store to first | |
2147 | stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi !# first store to first | |
2148 | ||
2149 | stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi !# then to head | |
2150 | stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# then to tail | |
2151 | setx CWQ_LAST, %g1, %l5 !# then end of CWQ region to LAST | |
2152 | #ifndef SPC | |
2153 | add %l5, %o2, %l5 | |
2154 | #endif | |
2155 | stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi | |
2156 | ||
2157 | !# set CWQ control word ([38:36] is strand ID ..) | |
2158 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
2159 | sllx %l2, 32, %l2 | |
2160 | ||
2161 | !# write CWQ entry (%l6 points to CWQ) | |
2162 | stx %l2, [%l6 + 0x0] | |
2163 | ||
2164 | setx msg, %g1, %l2 | |
2165 | stx %l2, [%l6 + 0x8] !# source address | |
2166 | ||
2167 | stx %g0, [%l6 + 0x10] !# Authentication Key Address (40-bit) | |
2168 | stx %g0, [%l6 + 0x18] !# Authentication IV Address (40-bit) | |
2169 | stx %g0, [%l6 + 0x20] !# Authentication FSAS Address (40-bit) | |
2170 | stx %g0, [%l6 + 0x28] !# Encryption Key Address (40-bit) | |
2171 | stx %g0, [%l6 + 0x30] !# Encryption Initialization Vector Address (40-bit) | |
2172 | ||
2173 | setx results, %g1, %o3 | |
2174 | stx %o3, [%l6 + 0x38] !# Destination Address (40-bit) | |
2175 | ||
2176 | membar #Sync | |
2177 | ||
2178 | ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2 | |
2179 | add %l2, 0x40, %l2 | |
2180 | stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi | |
2181 | ||
2182 | !# Kick off the CWQ operation by writing to the CWQ_CSR | |
2183 | !# Set the enabled bit and reset the other bits | |
2184 | or %g0, 0x1, %g1 | |
2185 | stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
2186 | ||
2187 | unlock_sync_thds_80: | |
2188 | set sync_thr_counter6, %r23 | |
2189 | #ifndef SPC | |
2190 | ldxa [%g0]0x63, %o2 | |
2191 | and %o2, 0x38, %o2 | |
2192 | add %o2, %r23, %r23 | |
2193 | #endif | |
2194 | st %r0, [%r23] !unlock sync_thr_counter6 | |
2195 | sub %r23, 64, %r23 | |
2196 | st %r0, [%r23] !unlock sync_thr_counter5 | |
2197 | sub %r23, 64, %r23 | |
2198 | st %r0, [%r23] !unlock sync_thr_counter4 | |
2199 | ||
2200 | wr %r0, %r12, %asi | |
2201 | ta T_CHANGE_NONHPRIV | |
2202 | splash_lsu_80_0: | |
2203 | nop | |
2204 | ta T_CHANGE_HPRIV | |
2205 | set 0x7030b4a6, %r2 | |
2206 | mov 0x4, %r1 | |
2207 | sllx %r1, 32, %r1 | |
2208 | or %r1, %r2, %r2 | |
2209 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2210 | ta T_CHANGE_NONHPRIV | |
2211 | ibp_80_1: | |
2212 | nop | |
2213 | ta T_CHANGE_HPRIV | |
2214 | mov 8, %r18 | |
2215 | rd %asi, %r12 | |
2216 | wr %r0, 0x41, %asi | |
2217 | set sync_thr_counter4, %r23 | |
2218 | #ifndef SPC | |
2219 | ldxa [%g0]0x63, %r8 | |
2220 | and %r8, 0x38, %r8 ! Core ID | |
2221 | add %r8, %r23, %r23 | |
2222 | #else | |
2223 | mov 0, %r8 | |
2224 | #endif | |
2225 | mov 0x80, %r16 | |
2226 | ibp_startwait80_1: | |
2227 | cas [%r23],%g0,%r16 !lock | |
2228 | brz,a %r16, continue_ibp_80_1 | |
2229 | mov (~0x80&0xf0), %r16 | |
2230 | ld [%r23], %r16 | |
2231 | ibp_wait80_1: | |
2232 | brnz %r16, ibp_wait80_1 | |
2233 | ld [%r23], %r16 | |
2234 | ba ibp_startwait80_1 | |
2235 | mov 0x80, %r16 | |
2236 | continue_ibp_80_1: | |
2237 | sllx %r16, %r8, %r16 !Mask for my core only | |
2238 | ldxa [0x58]%asi, %r17 !Running_status | |
2239 | wait_for_stat_80_1: | |
2240 | ldxa [0x50]%asi, %r13 !Running_rw | |
2241 | cmp %r13, %r17 | |
2242 | bne,a %xcc, wait_for_stat_80_1 | |
2243 | ldxa [0x58]%asi, %r17 !Running_status | |
2244 | stxa %r16, [0x68]%asi !Park (W1C) | |
2245 | ldxa [0x50]%asi, %r14 !Running_rw | |
2246 | wait_for_ibp_80_1: | |
2247 | ldxa [0x58]%asi, %r17 !Running_status | |
2248 | cmp %r14, %r17 | |
2249 | bne,a %xcc, wait_for_ibp_80_1 | |
2250 | ldxa [0x50]%asi, %r14 !Running_rw | |
2251 | ibp_doit80_1: | |
2252 | best_set_reg(0x00000040c9c00097,%r19, %r20) | |
2253 | stxa %r20, [%r18]0x42 | |
2254 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
2255 | st %g0, [%r23] !clear lock | |
2256 | wr %r0, %r12, %asi !restore %asi | |
2257 | ta T_CHANGE_NONHPRIV | |
2258 | .word 0xc19fe040 ! 1: LDDFA_I ldda [%r31, 0x0040], %f0 | |
2259 | splash_lsu_80_2: | |
2260 | nop | |
2261 | ta T_CHANGE_HPRIV | |
2262 | set 0xfba2e3dd, %r2 | |
2263 | mov 0x2, %r1 | |
2264 | sllx %r1, 32, %r1 | |
2265 | or %r1, %r2, %r2 | |
2266 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2267 | ta T_CHANGE_NONHPRIV | |
2268 | .word 0x3d400001 ! 2: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2269 | splash_lsu_80_3: | |
2270 | nop | |
2271 | ta T_CHANGE_HPRIV | |
2272 | set 0xa4b3eeb6, %r2 | |
2273 | mov 0x7, %r1 | |
2274 | sllx %r1, 32, %r1 | |
2275 | or %r1, %r2, %r2 | |
2276 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2277 | .word 0x3d400001 ! 3: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2278 | .word 0xe277e060 ! 4: STX_I stx %r17, [%r31 + 0x0060] | |
2279 | .word 0x30780001 ! 5: BPA <illegal instruction> | |
2280 | .word 0x93d020b4 ! 6: Tcc_I tne icc_or_xcc, %r0 + 180 | |
2281 | splash_tick_80_4: | |
2282 | nop | |
2283 | ta T_CHANGE_HPRIV | |
2284 | best_set_reg(0x6c9acb8405f1bea3, %r16, %r17) | |
2285 | .word 0x89800011 ! 7: WRTICK_R wr %r0, %r17, %tick | |
2286 | splash_htba_80_5: | |
2287 | nop | |
2288 | ta T_CHANGE_HPRIV | |
2289 | setx 0x00000000002a0000, %r11, %r12 | |
2290 | .word 0x8b98000c ! 8: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
2291 | .word 0xe2800c20 ! 9: LDUWA_R lduwa [%r0, %r0] 0x61, %r17 | |
2292 | .word 0xe23fc000 ! 10: STD_R std %r17, [%r31 + %r0] | |
2293 | splash_hpstate_80_7: | |
2294 | ta T_CHANGE_NONHPRIV | |
2295 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> | |
2296 | .word 0x819835cd ! 11: WRHPR_HPSTATE_I wrhpr %r0, 0x15cd, %hpstate | |
2297 | .word 0x9ba409a1 ! 12: FDIVs fdivs %f16, %f1, %f13 | |
2298 | .word 0xd48008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
2299 | setx 0x4f1ed9c7108ca24d, %r1, %r28 | |
2300 | stxa %r28, [%g0] 0x73 | |
2301 | intvec_80_9: | |
2302 | .word 0x39400001 ! 14: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2303 | trapasi_80_10: | |
2304 | nop | |
2305 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
2306 | .word 0xd4d84a00 ! 15: LDXA_R ldxa [%r1, %r0] 0x50, %r10 | |
2307 | ibp_80_11: | |
2308 | nop | |
2309 | ta T_CHANGE_HPRIV | |
2310 | mov 8, %r18 | |
2311 | rd %asi, %r12 | |
2312 | wr %r0, 0x41, %asi | |
2313 | set sync_thr_counter4, %r23 | |
2314 | #ifndef SPC | |
2315 | ldxa [%g0]0x63, %r8 | |
2316 | and %r8, 0x38, %r8 ! Core ID | |
2317 | add %r8, %r23, %r23 | |
2318 | #else | |
2319 | mov 0, %r8 | |
2320 | #endif | |
2321 | mov 0x80, %r16 | |
2322 | ibp_startwait80_11: | |
2323 | cas [%r23],%g0,%r16 !lock | |
2324 | brz,a %r16, continue_ibp_80_11 | |
2325 | mov (~0x80&0xf0), %r16 | |
2326 | ld [%r23], %r16 | |
2327 | ibp_wait80_11: | |
2328 | brnz %r16, ibp_wait80_11 | |
2329 | ld [%r23], %r16 | |
2330 | ba ibp_startwait80_11 | |
2331 | mov 0x80, %r16 | |
2332 | continue_ibp_80_11: | |
2333 | sllx %r16, %r8, %r16 !Mask for my core only | |
2334 | ldxa [0x58]%asi, %r17 !Running_status | |
2335 | wait_for_stat_80_11: | |
2336 | ldxa [0x50]%asi, %r13 !Running_rw | |
2337 | cmp %r13, %r17 | |
2338 | bne,a %xcc, wait_for_stat_80_11 | |
2339 | ldxa [0x58]%asi, %r17 !Running_status | |
2340 | stxa %r16, [0x68]%asi !Park (W1C) | |
2341 | ldxa [0x50]%asi, %r14 !Running_rw | |
2342 | wait_for_ibp_80_11: | |
2343 | ldxa [0x58]%asi, %r17 !Running_status | |
2344 | cmp %r14, %r17 | |
2345 | bne,a %xcc, wait_for_ibp_80_11 | |
2346 | ldxa [0x50]%asi, %r14 !Running_rw | |
2347 | ibp_doit80_11: | |
2348 | best_set_reg(0x00000040e7c0976f,%r19, %r20) | |
2349 | stxa %r20, [%r18]0x42 | |
2350 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
2351 | st %g0, [%r23] !clear lock | |
2352 | wr %r0, %r12, %asi !restore %asi | |
2353 | .word 0x91a0c9b3 ! 16: FDIVs fdivs %f3, %f19, %f8 | |
2354 | .word 0xe69fc380 ! 17: LDDA_R ldda [%r31, %r0] 0x1c, %r19 | |
2355 | brcommon3_80_12: | |
2356 | nop | |
2357 | setx common_target, %r12, %r27 | |
2358 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
2359 | ba,a .+12 | |
2360 | .word 0xe737e0c0 ! 1: STQF_I - %f19, [0x00c0, %r31] | |
2361 | ba,a .+8 | |
2362 | jmpl %r27+0, %r27 | |
2363 | .word 0xe71fe1d0 ! 18: LDDF_I ldd [%r31, 0x01d0], %f19 | |
2364 | nop | |
2365 | mov 0x80, %g3 | |
2366 | stxa %g3, [%g3] 0x57 | |
2367 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
2368 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
2369 | .word 0xe65fc000 ! 19: LDX_R ldx [%r31 + %r0], %r19 | |
2370 | splash_hpstate_80_13: | |
2371 | .word 0x8198319d ! 20: WRHPR_HPSTATE_I wrhpr %r0, 0x119d, %hpstate | |
2372 | intveclr_80_14: | |
2373 | nop | |
2374 | ta T_CHANGE_HPRIV | |
2375 | setx 0xdcec39f8249a4419, %r1, %r28 | |
2376 | stxa %r28, [%g0] 0x72 | |
2377 | ta T_CHANGE_NONHPRIV | |
2378 | .word 0x25400001 ! 21: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2379 | nop | |
2380 | ta T_CHANGE_HPRIV | |
2381 | mov 0x80+1, %r10 | |
2382 | set sync_thr_counter5, %r23 | |
2383 | #ifndef SPC | |
2384 | ldxa [%g0]0x63, %o1 | |
2385 | and %o1, 0x38, %o1 | |
2386 | add %o1, %r23, %r23 | |
2387 | sllx %o1, 5, %o3 !(CID*256) | |
2388 | #endif | |
2389 | cas [%r23],%g0,%r10 !lock | |
2390 | brnz %r10, cwq_80_15 | |
2391 | rd %asi, %r12 | |
2392 | wr %g0, 0x40, %asi | |
2393 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
2394 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
2395 | cmp %l1, 1 | |
2396 | bne cwq_80_15 | |
2397 | set CWQ_BASE, %l6 | |
2398 | #ifndef SPC | |
2399 | add %l6, %o3, %l6 | |
2400 | #endif | |
2401 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
2402 | best_set_reg(0x20610050, %l1, %l2) !# Control Word | |
2403 | sllx %l2, 32, %l2 | |
2404 | stx %l2, [%l6 + 0x0] | |
2405 | membar #Sync | |
2406 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
2407 | sub %l2, 0x40, %l2 | |
2408 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
2409 | wr %r12, %g0, %asi | |
2410 | st %g0, [%r23] | |
2411 | cwq_80_15: | |
2412 | ta T_CHANGE_NONHPRIV | |
2413 | .word 0xa7414000 ! 22: RDPC rd %pc, %r19 | |
2414 | .word 0xd8d7e0c0 ! 23: LDSHA_I ldsha [%r31, + 0x00c0] %asi, %r12 | |
2415 | .word 0xe19fda00 ! 24: LDDFA_R ldda [%r31, %r0], %f16 | |
2416 | #if (defined SPC || defined CMP1) | |
2417 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_16) + 32, 16, 16)) -> intp(0,0,5) | |
2418 | #else | |
2419 | setx 0x691813c27f2b41c8, %r1, %r28 | |
2420 | stxa %r28, [%g0] 0x73 | |
2421 | #endif | |
2422 | intvec_80_16: | |
2423 | .word 0x39400001 ! 25: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2424 | splash_tba_80_17: | |
2425 | nop | |
2426 | ta T_CHANGE_PRIV | |
2427 | setx 0x00000000003a0000, %r11, %r12 | |
2428 | .word 0x8b90000c ! 26: WRPR_TBA_R wrpr %r0, %r12, %tba | |
2429 | nop | |
2430 | mov 0x80, %g3 | |
2431 | stxa %g3, [%g3] 0x57 | |
2432 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
2433 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
2434 | .word 0xd85fc000 ! 27: LDX_R ldx [%r31 + %r0], %r12 | |
2435 | .word 0xb182c004 ! 28: WR_STICK_REG_R wr %r11, %r4, %- | |
2436 | .word 0xd877e150 ! 29: STX_I stx %r12, [%r31 + 0x0150] | |
2437 | tagged_80_18: | |
2438 | tsubcctv %r12, 0x1fa8, %r19 | |
2439 | .word 0xd807e03c ! 30: LDUW_I lduw [%r31 + 0x003c], %r12 | |
2440 | splash_tick_80_19: | |
2441 | nop | |
2442 | ta T_CHANGE_HPRIV | |
2443 | best_set_reg(0x7d443303f193c292, %r16, %r17) | |
2444 | .word 0x89800011 ! 31: WRTICK_R wr %r0, %r17, %tick | |
2445 | trapasi_80_20: | |
2446 | nop | |
2447 | mov 0x38, %r1 ! (VA for ASI 0x5b) | |
2448 | .word 0xd8d04b60 ! 32: LDSHA_R ldsha [%r1, %r0] 0x5b, %r12 | |
2449 | fpinit_80_21: | |
2450 | nop | |
2451 | setx fp_data_quads, %r19, %r20 | |
2452 | ldd [%r20], %f0 | |
2453 | ldd [%r20+8], %f4 | |
2454 | ld [%r20+16], %fsr | |
2455 | ld [%r20+24], %r19 | |
2456 | wr %r19, %g0, %gsr | |
2457 | .word 0x8da009c4 ! 33: FDIVd fdivd %f0, %f4, %f6 | |
2458 | nop | |
2459 | ta T_CHANGE_HPRIV | |
2460 | mov 0x80+1, %r10 | |
2461 | set sync_thr_counter5, %r23 | |
2462 | #ifndef SPC | |
2463 | ldxa [%g0]0x63, %o1 | |
2464 | and %o1, 0x38, %o1 | |
2465 | add %o1, %r23, %r23 | |
2466 | sllx %o1, 5, %o3 !(CID*256) | |
2467 | #endif | |
2468 | cas [%r23],%g0,%r10 !lock | |
2469 | brnz %r10, cwq_80_22 | |
2470 | rd %asi, %r12 | |
2471 | wr %g0, 0x40, %asi | |
2472 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
2473 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
2474 | cmp %l1, 1 | |
2475 | bne cwq_80_22 | |
2476 | set CWQ_BASE, %l6 | |
2477 | #ifndef SPC | |
2478 | add %l6, %o3, %l6 | |
2479 | #endif | |
2480 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
2481 | best_set_reg(0x20610060, %l1, %l2) !# Control Word | |
2482 | sllx %l2, 32, %l2 | |
2483 | stx %l2, [%l6 + 0x0] | |
2484 | membar #Sync | |
2485 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
2486 | sub %l2, 0x40, %l2 | |
2487 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
2488 | wr %r12, %g0, %asi | |
2489 | st %g0, [%r23] | |
2490 | cwq_80_22: | |
2491 | ta T_CHANGE_NONHPRIV | |
2492 | .word 0xa1414000 ! 34: RDPC rd %pc, %r16 | |
2493 | jmptr_80_23: | |
2494 | nop | |
2495 | best_set_reg(0xe0a00000, %r20, %r27) | |
2496 | .word 0xb7c6c000 ! 35: JMPL_R jmpl %r27 + %r0, %r27 | |
2497 | nop | |
2498 | ta T_CHANGE_HPRIV ! macro | |
2499 | donret_80_24: | |
2500 | rd %pc, %r12 | |
2501 | add %r12, (donretarg_80_24-donret_80_24+4), %r12 | |
2502 | add %r12, 0x4, %r11 ! seq tnpc | |
2503 | wrpr %g0, 0x2, %tl | |
2504 | wrpr %g0, %r12, %tpc | |
2505 | wrpr %g0, %r11, %tnpc | |
2506 | set (0x00621000 | (0x8a << 24)), %r13 | |
2507 | and %r12, 0xfff, %r14 | |
2508 | sllx %r14, 30, %r14 | |
2509 | or %r13, %r14, %r20 | |
2510 | wrpr %r20, %g0, %tstate | |
2511 | wrhpr %g0, 0xf47, %htstate | |
2512 | ta T_CHANGE_NONHPRIV ! rand=1 (80) | |
2513 | retry | |
2514 | donretarg_80_24: | |
2515 | .word 0xd66fe12f ! 36: LDSTUB_I ldstub %r11, [%r31 + 0x012f] | |
2516 | nop | |
2517 | ta T_CHANGE_HPRIV ! macro | |
2518 | donret_80_25: | |
2519 | rd %pc, %r12 | |
2520 | add %r12, (donretarg_80_25-donret_80_25+4), %r12 | |
2521 | add %r12, 0x4, %r11 ! seq tnpc | |
2522 | wrpr %g0, 0x2, %tl | |
2523 | wrpr %g0, %r12, %tpc | |
2524 | wrpr %g0, %r11, %tnpc | |
2525 | set (0x006a0600 | (0x58 << 24)), %r13 | |
2526 | and %r12, 0xfff, %r14 | |
2527 | sllx %r14, 30, %r14 | |
2528 | or %r13, %r14, %r20 | |
2529 | wrpr %r20, %g0, %tstate | |
2530 | wrhpr %g0, 0x1f15, %htstate | |
2531 | ta T_CHANGE_NONHPRIV ! rand=1 (80) | |
2532 | done | |
2533 | donretarg_80_25: | |
2534 | .word 0x3d400001 ! 37: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2535 | fpinit_80_26: | |
2536 | nop | |
2537 | setx fp_data_quads, %r19, %r20 | |
2538 | ldd [%r20], %f0 | |
2539 | ldd [%r20+8], %f4 | |
2540 | ld [%r20+16], %fsr | |
2541 | ld [%r20+24], %r19 | |
2542 | wr %r19, %g0, %gsr | |
2543 | .word 0x89a009a4 ! 38: FDIVs fdivs %f0, %f4, %f4 | |
2544 | nop | |
2545 | mov 0x80, %g3 | |
2546 | stxa %g3, [%g3] 0x5f | |
2547 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
2548 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
2549 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
2550 | .word 0xd65fc000 ! 39: LDX_R ldx [%r31 + %r0], %r11 | |
2551 | nop | |
2552 | mov 0x80, %g3 | |
2553 | stxa %g3, [%g3] 0x57 | |
2554 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
2555 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
2556 | .word 0xd65fc000 ! 40: LDX_R ldx [%r31 + %r0], %r11 | |
2557 | mondo_80_27: | |
2558 | nop | |
2559 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2560 | ta T_CHANGE_PRIV | |
2561 | stxa %r19, [%r0+0x3e0] %asi | |
2562 | .word 0x9d92c013 ! 41: WRPR_WSTATE_R wrpr %r11, %r19, %wstate | |
2563 | ibp_80_28: | |
2564 | nop | |
2565 | ta T_CHANGE_HPRIV | |
2566 | mov 8, %r18 | |
2567 | rd %asi, %r12 | |
2568 | wr %r0, 0x41, %asi | |
2569 | set sync_thr_counter4, %r23 | |
2570 | #ifndef SPC | |
2571 | ldxa [%g0]0x63, %r8 | |
2572 | and %r8, 0x38, %r8 ! Core ID | |
2573 | add %r8, %r23, %r23 | |
2574 | #else | |
2575 | mov 0, %r8 | |
2576 | #endif | |
2577 | mov 0x80, %r16 | |
2578 | ibp_startwait80_28: | |
2579 | cas [%r23],%g0,%r16 !lock | |
2580 | brz,a %r16, continue_ibp_80_28 | |
2581 | mov (~0x80&0xf0), %r16 | |
2582 | ld [%r23], %r16 | |
2583 | ibp_wait80_28: | |
2584 | brnz %r16, ibp_wait80_28 | |
2585 | ld [%r23], %r16 | |
2586 | ba ibp_startwait80_28 | |
2587 | mov 0x80, %r16 | |
2588 | continue_ibp_80_28: | |
2589 | sllx %r16, %r8, %r16 !Mask for my core only | |
2590 | ldxa [0x58]%asi, %r17 !Running_status | |
2591 | wait_for_stat_80_28: | |
2592 | ldxa [0x50]%asi, %r13 !Running_rw | |
2593 | cmp %r13, %r17 | |
2594 | bne,a %xcc, wait_for_stat_80_28 | |
2595 | ldxa [0x58]%asi, %r17 !Running_status | |
2596 | stxa %r16, [0x68]%asi !Park (W1C) | |
2597 | ldxa [0x50]%asi, %r14 !Running_rw | |
2598 | wait_for_ibp_80_28: | |
2599 | ldxa [0x58]%asi, %r17 !Running_status | |
2600 | cmp %r14, %r17 | |
2601 | bne,a %xcc, wait_for_ibp_80_28 | |
2602 | ldxa [0x50]%asi, %r14 !Running_rw | |
2603 | ibp_doit80_28: | |
2604 | best_set_reg(0x00000040cfd76f0c,%r19, %r20) | |
2605 | stxa %r20, [%r18]0x42 | |
2606 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
2607 | st %g0, [%r23] !clear lock | |
2608 | wr %r0, %r12, %asi !restore %asi | |
2609 | ta T_CHANGE_NONHPRIV | |
2610 | .word 0xd71fc014 ! 42: LDDF_R ldd [%r31, %r20], %f11 | |
2611 | fpinit_80_29: | |
2612 | nop | |
2613 | setx fp_data_quads, %r19, %r20 | |
2614 | ldd [%r20], %f0 | |
2615 | ldd [%r20+8], %f4 | |
2616 | ld [%r20+16], %fsr | |
2617 | ld [%r20+24], %r19 | |
2618 | wr %r19, %g0, %gsr | |
2619 | .word 0x89a009a4 ! 43: FDIVs fdivs %f0, %f4, %f4 | |
2620 | nop | |
2621 | ta T_CHANGE_HPRIV | |
2622 | mov 0x80+1, %r10 | |
2623 | set sync_thr_counter5, %r23 | |
2624 | #ifndef SPC | |
2625 | ldxa [%g0]0x63, %o1 | |
2626 | and %o1, 0x38, %o1 | |
2627 | add %o1, %r23, %r23 | |
2628 | sllx %o1, 5, %o3 !(CID*256) | |
2629 | #endif | |
2630 | cas [%r23],%g0,%r10 !lock | |
2631 | brnz %r10, cwq_80_30 | |
2632 | rd %asi, %r12 | |
2633 | wr %g0, 0x40, %asi | |
2634 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
2635 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
2636 | cmp %l1, 1 | |
2637 | bne cwq_80_30 | |
2638 | set CWQ_BASE, %l6 | |
2639 | #ifndef SPC | |
2640 | add %l6, %o3, %l6 | |
2641 | #endif | |
2642 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
2643 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word | |
2644 | sllx %l2, 32, %l2 | |
2645 | stx %l2, [%l6 + 0x0] | |
2646 | membar #Sync | |
2647 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
2648 | sub %l2, 0x40, %l2 | |
2649 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
2650 | wr %r12, %g0, %asi | |
2651 | st %g0, [%r23] | |
2652 | cwq_80_30: | |
2653 | ta T_CHANGE_NONHPRIV | |
2654 | .word 0xa5414000 ! 44: RDPC rd %pc, %r18 | |
2655 | .word 0xe4dfe0d0 ! 45: LDXA_I ldxa [%r31, + 0x00d0] %asi, %r18 | |
2656 | .word 0x87a84a52 ! 46: FCMPd fcmpd %fcc<n>, %f32, %f18 | |
2657 | ibp_80_32: | |
2658 | nop | |
2659 | ta T_CHANGE_HPRIV | |
2660 | mov 8, %r18 | |
2661 | rd %asi, %r12 | |
2662 | wr %r0, 0x41, %asi | |
2663 | set sync_thr_counter4, %r23 | |
2664 | #ifndef SPC | |
2665 | ldxa [%g0]0x63, %r8 | |
2666 | and %r8, 0x38, %r8 ! Core ID | |
2667 | add %r8, %r23, %r23 | |
2668 | #else | |
2669 | mov 0, %r8 | |
2670 | #endif | |
2671 | mov 0x80, %r16 | |
2672 | ibp_startwait80_32: | |
2673 | cas [%r23],%g0,%r16 !lock | |
2674 | brz,a %r16, continue_ibp_80_32 | |
2675 | mov (~0x80&0xf0), %r16 | |
2676 | ld [%r23], %r16 | |
2677 | ibp_wait80_32: | |
2678 | brnz %r16, ibp_wait80_32 | |
2679 | ld [%r23], %r16 | |
2680 | ba ibp_startwait80_32 | |
2681 | mov 0x80, %r16 | |
2682 | continue_ibp_80_32: | |
2683 | sllx %r16, %r8, %r16 !Mask for my core only | |
2684 | ldxa [0x58]%asi, %r17 !Running_status | |
2685 | wait_for_stat_80_32: | |
2686 | ldxa [0x50]%asi, %r13 !Running_rw | |
2687 | cmp %r13, %r17 | |
2688 | bne,a %xcc, wait_for_stat_80_32 | |
2689 | ldxa [0x58]%asi, %r17 !Running_status | |
2690 | stxa %r16, [0x68]%asi !Park (W1C) | |
2691 | ldxa [0x50]%asi, %r14 !Running_rw | |
2692 | wait_for_ibp_80_32: | |
2693 | ldxa [0x58]%asi, %r17 !Running_status | |
2694 | cmp %r14, %r17 | |
2695 | bne,a %xcc, wait_for_ibp_80_32 | |
2696 | ldxa [0x50]%asi, %r14 !Running_rw | |
2697 | ibp_doit80_32: | |
2698 | best_set_reg(0x0000004015ef0ce8,%r19, %r20) | |
2699 | stxa %r20, [%r18]0x42 | |
2700 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
2701 | st %g0, [%r23] !clear lock | |
2702 | wr %r0, %r12, %asi !restore %asi | |
2703 | .word 0xa3b48485 ! 47: FCMPLE32 fcmple32 %d18, %d36, %r17 | |
2704 | nop | |
2705 | ta T_CHANGE_HPRIV | |
2706 | mov 0x80, %r10 | |
2707 | set sync_thr_counter6, %r23 | |
2708 | #ifndef SPC | |
2709 | ldxa [%g0]0x63, %o1 | |
2710 | and %o1, 0x38, %o1 | |
2711 | add %o1, %r23, %r23 | |
2712 | #endif | |
2713 | cas [%r23],%g0,%r10 !lock | |
2714 | brnz %r10, sma_80_33 | |
2715 | rd %asi, %r12 | |
2716 | wr %g0, 0x40, %asi | |
2717 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
2718 | set 0x000e1fff, %g1 | |
2719 | stxa %g1, [%g0 + 0x80] %asi | |
2720 | wr %r12, %g0, %asi | |
2721 | st %g0, [%r23] | |
2722 | sma_80_33: | |
2723 | ta T_CHANGE_NONHPRIV | |
2724 | .word 0xe5e7e00a ! 48: CASA_R casa [%r31] %asi, %r10, %r18 | |
2725 | change_to_randtl_80_34: | |
2726 | ta T_CHANGE_PRIV ! macro | |
2727 | done_change_to_randtl_80_34: | |
2728 | .word 0x8f902000 ! 49: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
2729 | .word 0xe1bfdc00 ! 50: STDFA_R stda %f16, [%r0, %r31] | |
2730 | pmu_80_35: | |
2731 | nop | |
2732 | setx 0xfffffdfdfffff2cd, %g1, %g7 | |
2733 | .word 0xa3800007 ! 51: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
2734 | splash_cmpr_80_36: | |
2735 | mov 0, %r18 | |
2736 | sllx %r18, 63, %r18 | |
2737 | rd %tick, %r17 | |
2738 | add %r17, 0x50, %r17 | |
2739 | or %r17, %r18, %r17 | |
2740 | ta T_CHANGE_HPRIV | |
2741 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
2742 | ta T_CHANGE_PRIV | |
2743 | .word 0xaf800011 ! 52: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
2744 | nop | |
2745 | ta T_CHANGE_HPRIV ! macro | |
2746 | donret_80_37: | |
2747 | rd %pc, %r12 | |
2748 | add %r12, (donretarg_80_37-donret_80_37), %r12 | |
2749 | add %r12, 0x4, %r11 ! seq tnpc | |
2750 | wrpr %g0, 0x2, %tl | |
2751 | wrpr %g0, %r12, %tpc | |
2752 | wrpr %g0, %r11, %tnpc | |
2753 | set (0x004b6000 | (22 << 24)), %r13 | |
2754 | and %r12, 0xfff, %r14 | |
2755 | sllx %r14, 30, %r14 | |
2756 | or %r13, %r14, %r20 | |
2757 | wrpr %r20, %g0, %tstate | |
2758 | wrhpr %g0, 0xd95, %htstate | |
2759 | ta T_CHANGE_NONPRIV ! rand=0 (80) | |
2760 | done | |
2761 | donretarg_80_37: | |
2762 | .word 0xe4ffe15d ! 53: SWAPA_I swapa %r18, [%r31 + 0x015d] %asi | |
2763 | .word 0xa5508000 ! 54: RDPR_TSTATE <illegal instruction> | |
2764 | brcommon1_80_38: | |
2765 | nop | |
2766 | setx common_target, %r12, %r27 | |
2767 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
2768 | ba,a .+12 | |
2769 | .word 0xc32fe1b0 ! 1: STXFSR_I st-sfr %f1, [0x01b0, %r31] | |
2770 | ba,a .+8 | |
2771 | jmpl %r27+0, %r27 | |
2772 | .word 0xa7a2c9d2 ! 55: FDIVd fdivd %f42, %f18, %f50 | |
2773 | trapasi_80_39: | |
2774 | nop | |
2775 | mov 0x8, %r1 ! (VA for ASI 0x4c) | |
2776 | .word 0xd8c04980 ! 56: LDSWA_R ldswa [%r1, %r0] 0x4c, %r12 | |
2777 | nop | |
2778 | ta T_CHANGE_HPRIV | |
2779 | mov 0x80, %r10 | |
2780 | set sync_thr_counter6, %r23 | |
2781 | #ifndef SPC | |
2782 | ldxa [%g0]0x63, %o1 | |
2783 | and %o1, 0x38, %o1 | |
2784 | add %o1, %r23, %r23 | |
2785 | #endif | |
2786 | cas [%r23],%g0,%r10 !lock | |
2787 | brnz %r10, sma_80_40 | |
2788 | rd %asi, %r12 | |
2789 | wr %g0, 0x40, %asi | |
2790 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
2791 | set 0x00161fff, %g1 | |
2792 | stxa %g1, [%g0 + 0x80] %asi | |
2793 | wr %r12, %g0, %asi | |
2794 | st %g0, [%r23] | |
2795 | sma_80_40: | |
2796 | ta T_CHANGE_NONHPRIV | |
2797 | .word 0xd9e7e00c ! 57: CASA_R casa [%r31] %asi, %r12, %r12 | |
2798 | .word 0xd83fc000 ! 58: STD_R std %r12, [%r31 + %r0] | |
2799 | nop | |
2800 | ta T_CHANGE_HPRIV ! macro | |
2801 | donret_80_42: | |
2802 | rd %pc, %r12 | |
2803 | add %r12, (donretarg_80_42-donret_80_42+4), %r12 | |
2804 | add %r12, 0x4, %r11 ! seq tnpc | |
2805 | wrpr %g0, 0x1, %tl | |
2806 | wrpr %g0, %r12, %tpc | |
2807 | wrpr %g0, %r11, %tnpc | |
2808 | set (0x0071b000 | (0x80 << 24)), %r13 | |
2809 | and %r12, 0xfff, %r14 | |
2810 | sllx %r14, 30, %r14 | |
2811 | or %r13, %r14, %r20 | |
2812 | wrpr %r20, %g0, %tstate | |
2813 | wrhpr %g0, 0x4d6, %htstate | |
2814 | ta T_CHANGE_NONHPRIV ! rand=1 (80) | |
2815 | .word 0x24cd0001 ! 1: BRLEZ brlez,a,pt %r20,<label_0xd0001> | |
2816 | retry | |
2817 | donretarg_80_42: | |
2818 | .word 0xd86fe131 ! 59: LDSTUB_I ldstub %r12, [%r31 + 0x0131] | |
2819 | .word 0x97a489ac ! 60: FDIVs fdivs %f18, %f12, %f11 | |
2820 | splash_hpstate_80_44: | |
2821 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> | |
2822 | .word 0x8198354f ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x154f, %hpstate | |
2823 | nop | |
2824 | ta T_CHANGE_HPRIV ! macro | |
2825 | donret_80_45: | |
2826 | rd %pc, %r12 | |
2827 | add %r12, (donretarg_80_45-donret_80_45), %r12 | |
2828 | add %r12, 0x4, %r11 ! seq tnpc | |
2829 | wrpr %g0, 0x1, %tl | |
2830 | wrpr %g0, %r12, %tpc | |
2831 | wrpr %g0, %r11, %tnpc | |
2832 | set (0x001db900 | (16 << 24)), %r13 | |
2833 | and %r12, 0xfff, %r14 | |
2834 | sllx %r14, 30, %r14 | |
2835 | or %r13, %r14, %r20 | |
2836 | wrpr %r20, %g0, %tstate | |
2837 | wrhpr %g0, 0xa4d, %htstate | |
2838 | ta T_CHANGE_NONHPRIV ! rand=1 (80) | |
2839 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> | |
2840 | done | |
2841 | donretarg_80_45: | |
2842 | .word 0x27400001 ! 62: FBPUL fbul,a,pn %fcc0, <label_0x1> | |
2843 | .word 0xe0c7e020 ! 63: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r16 | |
2844 | trapasi_80_46: | |
2845 | nop | |
2846 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
2847 | .word 0xe0c84e60 ! 64: LDSBA_R ldsba [%r1, %r0] 0x73, %r16 | |
2848 | jmptr_80_47: | |
2849 | nop | |
2850 | best_set_reg(0xe0a00000, %r20, %r27) | |
2851 | .word 0xb7c6c000 ! 65: JMPL_R jmpl %r27 + %r0, %r27 | |
2852 | pmu_80_48: | |
2853 | nop | |
2854 | setx 0xfffffaa1fffffb26, %g1, %g7 | |
2855 | .word 0xa3800007 ! 66: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
2856 | ibp_80_49: | |
2857 | nop | |
2858 | ta T_CHANGE_HPRIV | |
2859 | mov 8, %r18 | |
2860 | rd %asi, %r12 | |
2861 | wr %r0, 0x41, %asi | |
2862 | set sync_thr_counter4, %r23 | |
2863 | #ifndef SPC | |
2864 | ldxa [%g0]0x63, %r8 | |
2865 | and %r8, 0x38, %r8 ! Core ID | |
2866 | add %r8, %r23, %r23 | |
2867 | #else | |
2868 | mov 0, %r8 | |
2869 | #endif | |
2870 | mov 0x80, %r16 | |
2871 | ibp_startwait80_49: | |
2872 | cas [%r23],%g0,%r16 !lock | |
2873 | brz,a %r16, continue_ibp_80_49 | |
2874 | mov (~0x80&0xf0), %r16 | |
2875 | ld [%r23], %r16 | |
2876 | ibp_wait80_49: | |
2877 | brnz %r16, ibp_wait80_49 | |
2878 | ld [%r23], %r16 | |
2879 | ba ibp_startwait80_49 | |
2880 | mov 0x80, %r16 | |
2881 | continue_ibp_80_49: | |
2882 | sllx %r16, %r8, %r16 !Mask for my core only | |
2883 | ldxa [0x58]%asi, %r17 !Running_status | |
2884 | wait_for_stat_80_49: | |
2885 | ldxa [0x50]%asi, %r13 !Running_rw | |
2886 | cmp %r13, %r17 | |
2887 | bne,a %xcc, wait_for_stat_80_49 | |
2888 | ldxa [0x58]%asi, %r17 !Running_status | |
2889 | stxa %r16, [0x68]%asi !Park (W1C) | |
2890 | ldxa [0x50]%asi, %r14 !Running_rw | |
2891 | wait_for_ibp_80_49: | |
2892 | ldxa [0x58]%asi, %r17 !Running_status | |
2893 | cmp %r14, %r17 | |
2894 | bne,a %xcc, wait_for_ibp_80_49 | |
2895 | ldxa [0x50]%asi, %r14 !Running_rw | |
2896 | ibp_doit80_49: | |
2897 | best_set_reg(0x0000004000cce802,%r19, %r20) | |
2898 | stxa %r20, [%r18]0x42 | |
2899 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
2900 | st %g0, [%r23] !clear lock | |
2901 | wr %r0, %r12, %asi !restore %asi | |
2902 | .word 0x9f802190 ! 67: SIR sir 0x0190 | |
2903 | fpinit_80_50: | |
2904 | nop | |
2905 | setx fp_data_quads, %r19, %r20 | |
2906 | ldd [%r20], %f0 | |
2907 | ldd [%r20+8], %f4 | |
2908 | ld [%r20+16], %fsr | |
2909 | ld [%r20+24], %r19 | |
2910 | wr %r19, %g0, %gsr | |
2911 | .word 0x91a009a4 ! 68: FDIVs fdivs %f0, %f4, %f8 | |
2912 | splash_tba_80_51: | |
2913 | nop | |
2914 | ta T_CHANGE_PRIV | |
2915 | setx 0x00000000003a0000, %r11, %r12 | |
2916 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
2917 | nop | |
2918 | mov 0x80, %g3 | |
2919 | stxa %g3, [%g3] 0x5f | |
2920 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
2921 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
2922 | .word 0xe05fc000 ! 70: LDX_R ldx [%r31 + %r0], %r16 | |
2923 | .word 0xe0800ae0 ! 71: LDUWA_R lduwa [%r0, %r0] 0x57, %r16 | |
2924 | .word 0xa17038f0 ! 72: POPC_I popc 0x18f0, %r16 | |
2925 | .word 0xd48008a0 ! 73: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
2926 | fpinit_80_53: | |
2927 | nop | |
2928 | setx fp_data_quads, %r19, %r20 | |
2929 | ldd [%r20], %f0 | |
2930 | ldd [%r20+8], %f4 | |
2931 | ld [%r20+16], %fsr | |
2932 | ld [%r20+24], %r19 | |
2933 | wr %r19, %g0, %gsr | |
2934 | .word 0x91a009c4 ! 74: FDIVd fdivd %f0, %f4, %f8 | |
2935 | nop | |
2936 | ta T_CHANGE_HPRIV | |
2937 | mov 0x80+1, %r10 | |
2938 | set sync_thr_counter5, %r23 | |
2939 | #ifndef SPC | |
2940 | ldxa [%g0]0x63, %o1 | |
2941 | and %o1, 0x38, %o1 | |
2942 | add %o1, %r23, %r23 | |
2943 | sllx %o1, 5, %o3 !(CID*256) | |
2944 | #endif | |
2945 | cas [%r23],%g0,%r10 !lock | |
2946 | brnz %r10, cwq_80_54 | |
2947 | rd %asi, %r12 | |
2948 | wr %g0, 0x40, %asi | |
2949 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
2950 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
2951 | cmp %l1, 1 | |
2952 | bne cwq_80_54 | |
2953 | set CWQ_BASE, %l6 | |
2954 | #ifndef SPC | |
2955 | add %l6, %o3, %l6 | |
2956 | #endif | |
2957 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
2958 | best_set_reg(0x20610030, %l1, %l2) !# Control Word | |
2959 | sllx %l2, 32, %l2 | |
2960 | stx %l2, [%l6 + 0x0] | |
2961 | membar #Sync | |
2962 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
2963 | sub %l2, 0x40, %l2 | |
2964 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
2965 | wr %r12, %g0, %asi | |
2966 | st %g0, [%r23] | |
2967 | cwq_80_54: | |
2968 | ta T_CHANGE_NONHPRIV | |
2969 | .word 0x91414000 ! 75: RDPC rd %pc, %r8 | |
2970 | cmp_80_55: | |
2971 | nop | |
2972 | ta T_CHANGE_HPRIV | |
2973 | rd %asi, %r12 | |
2974 | wr %r0, 0x41, %asi | |
2975 | set sync_thr_counter4, %r23 | |
2976 | #ifndef SPC | |
2977 | ldxa [%g0]0x63, %r8 | |
2978 | and %r8, 0x38, %r8 ! Core ID | |
2979 | add %r8, %r23, %r23 | |
2980 | mov 0xff, %r9 | |
2981 | xor %r9, 0x80, %r9 | |
2982 | sllx %r9, %r8, %r9 ! My core mask | |
2983 | #else | |
2984 | mov 0, %r8 | |
2985 | mov 0xff, %r9 | |
2986 | xor %r9, 0x80, %r9 ! My core mask | |
2987 | #endif | |
2988 | mov 0x80, %r10 | |
2989 | cmp_startwait80_55: | |
2990 | cas [%r23],%g0,%r10 !lock | |
2991 | brz,a %r10, continue_cmp_80_55 | |
2992 | ldxa [0x50]%asi, %r13 !Running_rw | |
2993 | ld [%r23], %r10 | |
2994 | cmp_wait80_55: | |
2995 | brnz,a %r10, cmp_wait80_55 | |
2996 | ld [%r23], %r10 | |
2997 | ba cmp_startwait80_55 | |
2998 | mov 0x80, %r10 | |
2999 | continue_cmp_80_55: | |
3000 | ldxa [0x58]%asi, %r14 !Running_status | |
3001 | xnor %r14, %r13, %r14 !Bits equal | |
3002 | brz,a %r8, cmp_multi_core_80_55 | |
3003 | mov 0x6b, %r17 | |
3004 | best_set_reg(0xf41a1a79d922006d, %r16, %r17) | |
3005 | cmp_multi_core_80_55: | |
3006 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
3007 | and %r14, %r9, %r14 !Apply core-mask | |
3008 | stxa %r14, [0x68]%asi | |
3009 | st %g0, [%r23] !clear lock | |
3010 | wr %g0, %r12, %asi | |
3011 | .word 0x91920009 ! 76: WRPR_PIL_R wrpr %r8, %r9, %pil | |
3012 | #if (defined SPC || defined CMP1) | |
3013 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_56) + 24, 16, 16)) -> intp(4,0,0) | |
3014 | #else | |
3015 | setx 0x1a3a2bbd98cd655c, %r1, %r28 | |
3016 | stxa %r28, [%g0] 0x73 | |
3017 | #endif | |
3018 | intvec_80_56: | |
3019 | .word 0x39400001 ! 77: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3020 | intveclr_80_57: | |
3021 | nop | |
3022 | ta T_CHANGE_HPRIV | |
3023 | setx 0x290b7689cabf06e7, %r1, %r28 | |
3024 | stxa %r28, [%g0] 0x72 | |
3025 | ta T_CHANGE_NONHPRIV | |
3026 | .word 0x25400001 ! 78: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3027 | .word 0xd6bfe011 ! 79: STDA_I stda %r11, [%r31 + 0x0011] %asi | |
3028 | .word 0xd737c000 ! 80: STQF_R - %f11, [%r0, %r31] | |
3029 | ceter_80_58: | |
3030 | nop | |
3031 | ta T_CHANGE_HPRIV | |
3032 | mov 7, %r17 | |
3033 | sllx %r17, 60, %r17 | |
3034 | mov 0x18, %r16 | |
3035 | stxa %r17, [%r16]0x4c | |
3036 | ta T_CHANGE_NONHPRIV | |
3037 | .word 0xa3410000 ! 81: RDTICK rd %tick, %r17 | |
3038 | brcommon3_80_59: | |
3039 | nop | |
3040 | setx common_target, %r12, %r27 | |
3041 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
3042 | ba,a .+12 | |
3043 | .word 0xd66fe170 ! 1: LDSTUB_I ldstub %r11, [%r31 + 0x0170] | |
3044 | ba,a .+8 | |
3045 | jmpl %r27+0, %r27 | |
3046 | .word 0xd71fe1e0 ! 82: LDDF_I ldd [%r31, 0x01e0], %f11 | |
3047 | .word 0xd68008a0 ! 83: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
3048 | jmptr_80_60: | |
3049 | nop | |
3050 | best_set_reg(0xe0a00000, %r20, %r27) | |
3051 | .word 0xb7c6c000 ! 84: JMPL_R jmpl %r27 + %r0, %r27 | |
3052 | setx 0x9e1e5c263ed5421c, %r1, %r28 | |
3053 | stxa %r28, [%g0] 0x73 | |
3054 | intvec_80_61: | |
3055 | .word 0x39400001 ! 85: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3056 | nop | |
3057 | ta T_CHANGE_HPRIV | |
3058 | mov 0x80+1, %r10 | |
3059 | set sync_thr_counter5, %r23 | |
3060 | #ifndef SPC | |
3061 | ldxa [%g0]0x63, %o1 | |
3062 | and %o1, 0x38, %o1 | |
3063 | add %o1, %r23, %r23 | |
3064 | sllx %o1, 5, %o3 !(CID*256) | |
3065 | #endif | |
3066 | cas [%r23],%g0,%r10 !lock | |
3067 | brnz %r10, cwq_80_62 | |
3068 | rd %asi, %r12 | |
3069 | wr %g0, 0x40, %asi | |
3070 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
3071 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
3072 | cmp %l1, 1 | |
3073 | bne cwq_80_62 | |
3074 | set CWQ_BASE, %l6 | |
3075 | #ifndef SPC | |
3076 | add %l6, %o3, %l6 | |
3077 | #endif | |
3078 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
3079 | best_set_reg(0x20610060, %l1, %l2) !# Control Word | |
3080 | sllx %l2, 32, %l2 | |
3081 | stx %l2, [%l6 + 0x0] | |
3082 | membar #Sync | |
3083 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
3084 | sub %l2, 0x40, %l2 | |
3085 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
3086 | wr %r12, %g0, %asi | |
3087 | st %g0, [%r23] | |
3088 | cwq_80_62: | |
3089 | ta T_CHANGE_NONHPRIV | |
3090 | .word 0x93414000 ! 86: RDPC rd %pc, %r9 | |
3091 | .word 0xe2800b00 ! 87: LDUWA_R lduwa [%r0, %r0] 0x58, %r17 | |
3092 | ibp_80_63: | |
3093 | nop | |
3094 | ta T_CHANGE_HPRIV | |
3095 | mov 8, %r18 | |
3096 | rd %asi, %r12 | |
3097 | wr %r0, 0x41, %asi | |
3098 | set sync_thr_counter4, %r23 | |
3099 | #ifndef SPC | |
3100 | ldxa [%g0]0x63, %r8 | |
3101 | and %r8, 0x38, %r8 ! Core ID | |
3102 | add %r8, %r23, %r23 | |
3103 | #else | |
3104 | mov 0, %r8 | |
3105 | #endif | |
3106 | mov 0x80, %r16 | |
3107 | ibp_startwait80_63: | |
3108 | cas [%r23],%g0,%r16 !lock | |
3109 | brz,a %r16, continue_ibp_80_63 | |
3110 | mov (~0x80&0xf0), %r16 | |
3111 | ld [%r23], %r16 | |
3112 | ibp_wait80_63: | |
3113 | brnz %r16, ibp_wait80_63 | |
3114 | ld [%r23], %r16 | |
3115 | ba ibp_startwait80_63 | |
3116 | mov 0x80, %r16 | |
3117 | continue_ibp_80_63: | |
3118 | sllx %r16, %r8, %r16 !Mask for my core only | |
3119 | ldxa [0x58]%asi, %r17 !Running_status | |
3120 | wait_for_stat_80_63: | |
3121 | ldxa [0x50]%asi, %r13 !Running_rw | |
3122 | cmp %r13, %r17 | |
3123 | bne,a %xcc, wait_for_stat_80_63 | |
3124 | ldxa [0x58]%asi, %r17 !Running_status | |
3125 | stxa %r16, [0x68]%asi !Park (W1C) | |
3126 | ldxa [0x50]%asi, %r14 !Running_rw | |
3127 | wait_for_ibp_80_63: | |
3128 | ldxa [0x58]%asi, %r17 !Running_status | |
3129 | cmp %r14, %r17 | |
3130 | bne,a %xcc, wait_for_ibp_80_63 | |
3131 | ldxa [0x50]%asi, %r14 !Running_rw | |
3132 | ibp_doit80_63: | |
3133 | best_set_reg(0x0000004083e8020d,%r19, %r20) | |
3134 | stxa %r20, [%r18]0x42 | |
3135 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3136 | st %g0, [%r23] !clear lock | |
3137 | wr %r0, %r12, %asi !restore %asi | |
3138 | .word 0xe19fe040 ! 88: LDDFA_I ldda [%r31, 0x0040], %f16 | |
3139 | ibp_80_64: | |
3140 | nop | |
3141 | ta T_CHANGE_HPRIV | |
3142 | mov 8, %r18 | |
3143 | rd %asi, %r12 | |
3144 | wr %r0, 0x41, %asi | |
3145 | set sync_thr_counter4, %r23 | |
3146 | #ifndef SPC | |
3147 | ldxa [%g0]0x63, %r8 | |
3148 | and %r8, 0x38, %r8 ! Core ID | |
3149 | add %r8, %r23, %r23 | |
3150 | #else | |
3151 | mov 0, %r8 | |
3152 | #endif | |
3153 | mov 0x80, %r16 | |
3154 | ibp_startwait80_64: | |
3155 | cas [%r23],%g0,%r16 !lock | |
3156 | brz,a %r16, continue_ibp_80_64 | |
3157 | mov (~0x80&0xf0), %r16 | |
3158 | ld [%r23], %r16 | |
3159 | ibp_wait80_64: | |
3160 | brnz %r16, ibp_wait80_64 | |
3161 | ld [%r23], %r16 | |
3162 | ba ibp_startwait80_64 | |
3163 | mov 0x80, %r16 | |
3164 | continue_ibp_80_64: | |
3165 | sllx %r16, %r8, %r16 !Mask for my core only | |
3166 | ldxa [0x58]%asi, %r17 !Running_status | |
3167 | wait_for_stat_80_64: | |
3168 | ldxa [0x50]%asi, %r13 !Running_rw | |
3169 | cmp %r13, %r17 | |
3170 | bne,a %xcc, wait_for_stat_80_64 | |
3171 | ldxa [0x58]%asi, %r17 !Running_status | |
3172 | stxa %r16, [0x68]%asi !Park (W1C) | |
3173 | ldxa [0x50]%asi, %r14 !Running_rw | |
3174 | wait_for_ibp_80_64: | |
3175 | ldxa [0x58]%asi, %r17 !Running_status | |
3176 | cmp %r14, %r17 | |
3177 | bne,a %xcc, wait_for_ibp_80_64 | |
3178 | ldxa [0x50]%asi, %r14 !Running_rw | |
3179 | ibp_doit80_64: | |
3180 | best_set_reg(0x00000040b5c20da5,%r19, %r20) | |
3181 | stxa %r20, [%r18]0x42 | |
3182 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3183 | st %g0, [%r23] !clear lock | |
3184 | wr %r0, %r12, %asi !restore %asi | |
3185 | ta T_CHANGE_NONHPRIV | |
3186 | .word 0xe31fe0d0 ! 89: LDDF_I ldd [%r31, 0x00d0], %f17 | |
3187 | jmptr_80_65: | |
3188 | nop | |
3189 | best_set_reg(0xe0a00000, %r20, %r27) | |
3190 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
3191 | .word 0xe22fe162 ! 91: STB_I stb %r17, [%r31 + 0x0162] | |
3192 | .word 0xc19fde00 ! 92: LDDFA_R ldda [%r31, %r0], %f0 | |
3193 | splash_tick_80_66: | |
3194 | nop | |
3195 | ta T_CHANGE_HPRIV | |
3196 | best_set_reg(0x77f289edbc5c8786, %r16, %r17) | |
3197 | .word 0x89800011 ! 93: WRTICK_R wr %r0, %r17, %tick | |
3198 | .word 0xe3e7c02b ! 94: CASA_I casa [%r31] 0x 1, %r11, %r17 | |
3199 | setx 0x20ea68bf6fef8fb0, %r1, %r28 | |
3200 | stxa %r28, [%g0] 0x73 | |
3201 | intvec_80_67: | |
3202 | .word 0x39400001 ! 95: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3203 | nop | |
3204 | mov 0x80, %g3 | |
3205 | stxa %g3, [%g3] 0x5f | |
3206 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
3207 | .word 0xe25fc000 ! 96: LDX_R ldx [%r31 + %r0], %r17 | |
3208 | mondo_80_68: | |
3209 | nop | |
3210 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3211 | ta T_CHANGE_PRIV | |
3212 | stxa %r6, [%r0+0x3e8] %asi | |
3213 | .word 0x9d92c00a ! 97: WRPR_WSTATE_R wrpr %r11, %r10, %wstate | |
3214 | fpinit_80_69: | |
3215 | nop | |
3216 | setx fp_data_quads, %r19, %r20 | |
3217 | ldd [%r20], %f0 | |
3218 | ldd [%r20+8], %f4 | |
3219 | ld [%r20+16], %fsr | |
3220 | ld [%r20+24], %r19 | |
3221 | wr %r19, %g0, %gsr | |
3222 | .word 0x87a80a44 ! 98: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
3223 | .word 0xa190200d ! 99: WRPR_GL_I wrpr %r0, 0x000d, %- | |
3224 | mondo_80_70: | |
3225 | nop | |
3226 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3227 | ta T_CHANGE_PRIV | |
3228 | stxa %r19, [%r0+0x3d0] %asi | |
3229 | .word 0x9d920012 ! 100: WRPR_WSTATE_R wrpr %r8, %r18, %wstate | |
3230 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3231 | reduce_priv_lvl_80_71: | |
3232 | ta T_CHANGE_NONHPRIV ! macro | |
3233 | splash_tick_80_72: | |
3234 | nop | |
3235 | ta T_CHANGE_HPRIV | |
3236 | best_set_reg(0x49c123958a8eba26, %r16, %r17) | |
3237 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
3238 | .word 0x8d802004 ! 103: WRFPRS_I wr %r0, 0x0004, %fprs | |
3239 | splash_hpstate_80_73: | |
3240 | ta T_CHANGE_NONHPRIV | |
3241 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> | |
3242 | .word 0x819836b5 ! 104: WRHPR_HPSTATE_I wrhpr %r0, 0x16b5, %hpstate | |
3243 | splash_hpstate_80_74: | |
3244 | ta T_CHANGE_NONHPRIV | |
3245 | .word 0x26cd0001 ! 1: BRLZ brlz,a,pt %r20,<label_0xd0001> | |
3246 | .word 0x8198389d ! 105: WRHPR_HPSTATE_I wrhpr %r0, 0x189d, %hpstate | |
3247 | cmp_80_75: | |
3248 | nop | |
3249 | ta T_CHANGE_HPRIV | |
3250 | rd %asi, %r12 | |
3251 | wr %r0, 0x41, %asi | |
3252 | set sync_thr_counter4, %r23 | |
3253 | #ifndef SPC | |
3254 | ldxa [%g0]0x63, %r8 | |
3255 | and %r8, 0x38, %r8 ! Core ID | |
3256 | add %r8, %r23, %r23 | |
3257 | mov 0xff, %r9 | |
3258 | xor %r9, 0x80, %r9 | |
3259 | sllx %r9, %r8, %r9 ! My core mask | |
3260 | #else | |
3261 | mov 0, %r8 | |
3262 | mov 0xff, %r9 | |
3263 | xor %r9, 0x80, %r9 ! My core mask | |
3264 | #endif | |
3265 | mov 0x80, %r10 | |
3266 | cmp_startwait80_75: | |
3267 | cas [%r23],%g0,%r10 !lock | |
3268 | brz,a %r10, continue_cmp_80_75 | |
3269 | ldxa [0x50]%asi, %r13 !Running_rw | |
3270 | ld [%r23], %r10 | |
3271 | cmp_wait80_75: | |
3272 | brnz,a %r10, cmp_wait80_75 | |
3273 | ld [%r23], %r10 | |
3274 | ba cmp_startwait80_75 | |
3275 | mov 0x80, %r10 | |
3276 | continue_cmp_80_75: | |
3277 | ldxa [0x58]%asi, %r14 !Running_status | |
3278 | xnor %r14, %r13, %r14 !Bits equal | |
3279 | brz,a %r8, cmp_multi_core_80_75 | |
3280 | mov 0xce, %r17 | |
3281 | best_set_reg(0x15378feeee0ad93c, %r16, %r17) | |
3282 | cmp_multi_core_80_75: | |
3283 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
3284 | and %r14, %r9, %r14 !Apply core-mask | |
3285 | stxa %r14, [0x68]%asi | |
3286 | st %g0, [%r23] !clear lock | |
3287 | wr %g0, %r12, %asi | |
3288 | .word 0x9194c010 ! 106: WRPR_PIL_R wrpr %r19, %r16, %pil | |
3289 | trapasi_80_76: | |
3290 | nop | |
3291 | mov 0x10, %r1 ! (VA for ASI 0x5a) | |
3292 | .word 0xe2c04b40 ! 107: LDSWA_R ldswa [%r1, %r0] 0x5a, %r17 | |
3293 | mondo_80_77: | |
3294 | nop | |
3295 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3296 | stxa %r17, [%r0+0x3d0] %asi | |
3297 | .word 0x9d920001 ! 108: WRPR_WSTATE_R wrpr %r8, %r1, %wstate | |
3298 | dvapa_80_78: | |
3299 | nop | |
3300 | ta T_CHANGE_HPRIV | |
3301 | mov 0x97e, %r20 | |
3302 | mov 0x1a, %r19 | |
3303 | sllx %r20, 23, %r20 | |
3304 | or %r19, %r20, %r19 | |
3305 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
3306 | mov 0x38, %r18 | |
3307 | stxa %r31, [%r18]0x58 | |
3308 | ta T_CHANGE_NONHPRIV | |
3309 | .word 0xa5a1c9d0 ! 109: FDIVd fdivd %f38, %f16, %f18 | |
3310 | .word 0xe727c000 ! 110: STF_R st %f19, [%r0, %r31] | |
3311 | ibp_80_79: | |
3312 | nop | |
3313 | ta T_CHANGE_HPRIV | |
3314 | mov 8, %r18 | |
3315 | rd %asi, %r12 | |
3316 | wr %r0, 0x41, %asi | |
3317 | set sync_thr_counter4, %r23 | |
3318 | #ifndef SPC | |
3319 | ldxa [%g0]0x63, %r8 | |
3320 | and %r8, 0x38, %r8 ! Core ID | |
3321 | add %r8, %r23, %r23 | |
3322 | #else | |
3323 | mov 0, %r8 | |
3324 | #endif | |
3325 | mov 0x80, %r16 | |
3326 | ibp_startwait80_79: | |
3327 | cas [%r23],%g0,%r16 !lock | |
3328 | brz,a %r16, continue_ibp_80_79 | |
3329 | mov (~0x80&0xf0), %r16 | |
3330 | ld [%r23], %r16 | |
3331 | ibp_wait80_79: | |
3332 | brnz %r16, ibp_wait80_79 | |
3333 | ld [%r23], %r16 | |
3334 | ba ibp_startwait80_79 | |
3335 | mov 0x80, %r16 | |
3336 | continue_ibp_80_79: | |
3337 | sllx %r16, %r8, %r16 !Mask for my core only | |
3338 | ldxa [0x58]%asi, %r17 !Running_status | |
3339 | wait_for_stat_80_79: | |
3340 | ldxa [0x50]%asi, %r13 !Running_rw | |
3341 | cmp %r13, %r17 | |
3342 | bne,a %xcc, wait_for_stat_80_79 | |
3343 | ldxa [0x58]%asi, %r17 !Running_status | |
3344 | stxa %r16, [0x68]%asi !Park (W1C) | |
3345 | ldxa [0x50]%asi, %r14 !Running_rw | |
3346 | wait_for_ibp_80_79: | |
3347 | ldxa [0x58]%asi, %r17 !Running_status | |
3348 | cmp %r14, %r17 | |
3349 | bne,a %xcc, wait_for_ibp_80_79 | |
3350 | ldxa [0x50]%asi, %r14 !Running_rw | |
3351 | ibp_doit80_79: | |
3352 | best_set_reg(0x0000005008cda553,%r19, %r20) | |
3353 | stxa %r20, [%r18]0x42 | |
3354 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3355 | st %g0, [%r23] !clear lock | |
3356 | wr %r0, %r12, %asi !restore %asi | |
3357 | ta T_CHANGE_NONHPRIV | |
3358 | .word 0xe71fe0c0 ! 111: LDDF_I ldd [%r31, 0x00c0], %f19 | |
3359 | splash_lsu_80_80: | |
3360 | nop | |
3361 | ta T_CHANGE_HPRIV | |
3362 | set 0x1c2134bb, %r2 | |
3363 | mov 0x4, %r1 | |
3364 | sllx %r1, 32, %r1 | |
3365 | or %r1, %r2, %r2 | |
3366 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3367 | .word 0x3d400001 ! 112: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3368 | jmptr_80_81: | |
3369 | nop | |
3370 | best_set_reg(0xe0a00000, %r20, %r27) | |
3371 | .word 0xb7c6c000 ! 113: JMPL_R jmpl %r27 + %r0, %r27 | |
3372 | intveclr_80_82: | |
3373 | nop | |
3374 | ta T_CHANGE_HPRIV | |
3375 | setx 0xd30adb5c17b37dc0, %r1, %r28 | |
3376 | stxa %r28, [%g0] 0x72 | |
3377 | ta T_CHANGE_NONHPRIV | |
3378 | .word 0x25400001 ! 114: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3379 | intveclr_80_83: | |
3380 | nop | |
3381 | ta T_CHANGE_HPRIV | |
3382 | setx 0xb8635350486402b2, %r1, %r28 | |
3383 | stxa %r28, [%g0] 0x72 | |
3384 | .word 0x25400001 ! 115: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3385 | .word 0xa1902005 ! 116: WRPR_GL_I wrpr %r0, 0x0005, %- | |
3386 | nop | |
3387 | ta T_CHANGE_HPRIV | |
3388 | mov 0x80+1, %r10 | |
3389 | set sync_thr_counter5, %r23 | |
3390 | #ifndef SPC | |
3391 | ldxa [%g0]0x63, %o1 | |
3392 | and %o1, 0x38, %o1 | |
3393 | add %o1, %r23, %r23 | |
3394 | sllx %o1, 5, %o3 !(CID*256) | |
3395 | #endif | |
3396 | cas [%r23],%g0,%r10 !lock | |
3397 | brnz %r10, cwq_80_84 | |
3398 | rd %asi, %r12 | |
3399 | wr %g0, 0x40, %asi | |
3400 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
3401 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
3402 | cmp %l1, 1 | |
3403 | bne cwq_80_84 | |
3404 | set CWQ_BASE, %l6 | |
3405 | #ifndef SPC | |
3406 | add %l6, %o3, %l6 | |
3407 | #endif | |
3408 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
3409 | best_set_reg(0x20610040, %l1, %l2) !# Control Word | |
3410 | sllx %l2, 32, %l2 | |
3411 | stx %l2, [%l6 + 0x0] | |
3412 | membar #Sync | |
3413 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
3414 | sub %l2, 0x40, %l2 | |
3415 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
3416 | wr %r12, %g0, %asi | |
3417 | st %g0, [%r23] | |
3418 | cwq_80_84: | |
3419 | ta T_CHANGE_NONHPRIV | |
3420 | .word 0x93414000 ! 117: RDPC rd %pc, %r9 | |
3421 | fpinit_80_85: | |
3422 | nop | |
3423 | setx fp_data_quads, %r19, %r20 | |
3424 | ldd [%r20], %f0 | |
3425 | ldd [%r20+8], %f4 | |
3426 | ld [%r20+16], %fsr | |
3427 | ld [%r20+24], %r19 | |
3428 | wr %r19, %g0, %gsr | |
3429 | .word 0x87a80a44 ! 118: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
3430 | ibp_80_86: | |
3431 | nop | |
3432 | ta T_CHANGE_HPRIV | |
3433 | mov 8, %r18 | |
3434 | rd %asi, %r12 | |
3435 | wr %r0, 0x41, %asi | |
3436 | set sync_thr_counter4, %r23 | |
3437 | #ifndef SPC | |
3438 | ldxa [%g0]0x63, %r8 | |
3439 | and %r8, 0x38, %r8 ! Core ID | |
3440 | add %r8, %r23, %r23 | |
3441 | #else | |
3442 | mov 0, %r8 | |
3443 | #endif | |
3444 | mov 0x80, %r16 | |
3445 | ibp_startwait80_86: | |
3446 | cas [%r23],%g0,%r16 !lock | |
3447 | brz,a %r16, continue_ibp_80_86 | |
3448 | mov (~0x80&0xf0), %r16 | |
3449 | ld [%r23], %r16 | |
3450 | ibp_wait80_86: | |
3451 | brnz %r16, ibp_wait80_86 | |
3452 | ld [%r23], %r16 | |
3453 | ba ibp_startwait80_86 | |
3454 | mov 0x80, %r16 | |
3455 | continue_ibp_80_86: | |
3456 | sllx %r16, %r8, %r16 !Mask for my core only | |
3457 | ldxa [0x58]%asi, %r17 !Running_status | |
3458 | wait_for_stat_80_86: | |
3459 | ldxa [0x50]%asi, %r13 !Running_rw | |
3460 | cmp %r13, %r17 | |
3461 | bne,a %xcc, wait_for_stat_80_86 | |
3462 | ldxa [0x58]%asi, %r17 !Running_status | |
3463 | stxa %r16, [0x68]%asi !Park (W1C) | |
3464 | ldxa [0x50]%asi, %r14 !Running_rw | |
3465 | wait_for_ibp_80_86: | |
3466 | ldxa [0x58]%asi, %r17 !Running_status | |
3467 | cmp %r14, %r17 | |
3468 | bne,a %xcc, wait_for_ibp_80_86 | |
3469 | ldxa [0x50]%asi, %r14 !Running_rw | |
3470 | ibp_doit80_86: | |
3471 | best_set_reg(0x0000005006e55359,%r19, %r20) | |
3472 | stxa %r20, [%r18]0x42 | |
3473 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3474 | st %g0, [%r23] !clear lock | |
3475 | wr %r0, %r12, %asi !restore %asi | |
3476 | .word 0xd31fe070 ! 119: LDDF_I ldd [%r31, 0x0070], %f9 | |
3477 | setx 0x11495e0cdec2bb9d, %r1, %r28 | |
3478 | stxa %r28, [%g0] 0x73 | |
3479 | intvec_80_87: | |
3480 | .word 0x39400001 ! 120: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3481 | #if (defined SPC || defined CMP1) | |
3482 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_88) + 0, 16, 16)) -> intp(0,0,16) | |
3483 | #else | |
3484 | setx 0x2e83b9a978ff9b8b, %r1, %r28 | |
3485 | stxa %r28, [%g0] 0x73 | |
3486 | #endif | |
3487 | intvec_80_88: | |
3488 | .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3489 | splash_tick_80_89: | |
3490 | nop | |
3491 | ta T_CHANGE_HPRIV | |
3492 | best_set_reg(0xce97839a1f0dca6c, %r16, %r17) | |
3493 | .word 0x89800011 ! 122: WRTICK_R wr %r0, %r17, %tick | |
3494 | .word 0x99b2c4d1 ! 123: FCMPNE32 fcmpne32 %d42, %d48, %r12 | |
3495 | mondo_80_91: | |
3496 | nop | |
3497 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3498 | stxa %r19, [%r0+0x3d0] %asi | |
3499 | .word 0x9d90c012 ! 124: WRPR_WSTATE_R wrpr %r3, %r18, %wstate | |
3500 | .word 0x8d802004 ! 125: WRFPRS_I wr %r0, 0x0004, %fprs | |
3501 | ibp_80_92: | |
3502 | nop | |
3503 | ta T_CHANGE_HPRIV | |
3504 | mov 8, %r18 | |
3505 | rd %asi, %r12 | |
3506 | wr %r0, 0x41, %asi | |
3507 | set sync_thr_counter4, %r23 | |
3508 | #ifndef SPC | |
3509 | ldxa [%g0]0x63, %r8 | |
3510 | and %r8, 0x38, %r8 ! Core ID | |
3511 | add %r8, %r23, %r23 | |
3512 | #else | |
3513 | mov 0, %r8 | |
3514 | #endif | |
3515 | mov 0x80, %r16 | |
3516 | ibp_startwait80_92: | |
3517 | cas [%r23],%g0,%r16 !lock | |
3518 | brz,a %r16, continue_ibp_80_92 | |
3519 | mov (~0x80&0xf0), %r16 | |
3520 | ld [%r23], %r16 | |
3521 | ibp_wait80_92: | |
3522 | brnz %r16, ibp_wait80_92 | |
3523 | ld [%r23], %r16 | |
3524 | ba ibp_startwait80_92 | |
3525 | mov 0x80, %r16 | |
3526 | continue_ibp_80_92: | |
3527 | sllx %r16, %r8, %r16 !Mask for my core only | |
3528 | ldxa [0x58]%asi, %r17 !Running_status | |
3529 | wait_for_stat_80_92: | |
3530 | ldxa [0x50]%asi, %r13 !Running_rw | |
3531 | cmp %r13, %r17 | |
3532 | bne,a %xcc, wait_for_stat_80_92 | |
3533 | ldxa [0x58]%asi, %r17 !Running_status | |
3534 | stxa %r16, [0x68]%asi !Park (W1C) | |
3535 | ldxa [0x50]%asi, %r14 !Running_rw | |
3536 | wait_for_ibp_80_92: | |
3537 | ldxa [0x58]%asi, %r17 !Running_status | |
3538 | cmp %r14, %r17 | |
3539 | bne,a %xcc, wait_for_ibp_80_92 | |
3540 | ldxa [0x50]%asi, %r14 !Running_rw | |
3541 | ibp_doit80_92: | |
3542 | best_set_reg(0x000000508bd35957,%r19, %r20) | |
3543 | stxa %r20, [%r18]0x42 | |
3544 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3545 | st %g0, [%r23] !clear lock | |
3546 | wr %r0, %r12, %asi !restore %asi | |
3547 | ta T_CHANGE_NONHPRIV | |
3548 | .word 0xc3ecc02a ! 126: PREFETCHA_R prefetcha [%r19, %r10] 0x01, #one_read | |
3549 | .word 0x8d802004 ! 127: WRFPRS_I wr %r0, 0x0004, %fprs | |
3550 | .word 0x8d802004 ! 128: WRFPRS_I wr %r0, 0x0004, %fprs | |
3551 | .word 0x91a509aa ! 129: FDIVs fdivs %f20, %f10, %f8 | |
3552 | invalw | |
3553 | mov 0xb3, %r30 | |
3554 | .word 0x91d0001e ! 130: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3555 | fpinit_80_94: | |
3556 | nop | |
3557 | setx fp_data_quads, %r19, %r20 | |
3558 | ldd [%r20], %f0 | |
3559 | ldd [%r20+8], %f4 | |
3560 | ld [%r20+16], %fsr | |
3561 | ld [%r20+24], %r19 | |
3562 | wr %r19, %g0, %gsr | |
3563 | .word 0x91b00484 ! 131: FCMPLE32 fcmple32 %d0, %d4, %r8 | |
3564 | intveclr_80_95: | |
3565 | nop | |
3566 | ta T_CHANGE_HPRIV | |
3567 | setx 0xb7d3e9af8fad6c99, %r1, %r28 | |
3568 | stxa %r28, [%g0] 0x72 | |
3569 | ta T_CHANGE_NONHPRIV | |
3570 | .word 0x25400001 ! 132: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3571 | intveclr_80_96: | |
3572 | nop | |
3573 | ta T_CHANGE_HPRIV | |
3574 | setx 0xb50526e1a23d80d1, %r1, %r28 | |
3575 | stxa %r28, [%g0] 0x72 | |
3576 | .word 0x25400001 ! 133: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3577 | setx 0x819f19acb4da980c, %r1, %r28 | |
3578 | stxa %r28, [%g0] 0x73 | |
3579 | intvec_80_97: | |
3580 | .word 0x39400001 ! 134: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3581 | cmp_80_98: | |
3582 | nop | |
3583 | ta T_CHANGE_HPRIV | |
3584 | rd %asi, %r12 | |
3585 | wr %r0, 0x41, %asi | |
3586 | set sync_thr_counter4, %r23 | |
3587 | #ifndef SPC | |
3588 | ldxa [%g0]0x63, %r8 | |
3589 | and %r8, 0x38, %r8 ! Core ID | |
3590 | add %r8, %r23, %r23 | |
3591 | mov 0xff, %r9 | |
3592 | xor %r9, 0x80, %r9 | |
3593 | sllx %r9, %r8, %r9 ! My core mask | |
3594 | #else | |
3595 | mov 0, %r8 | |
3596 | mov 0xff, %r9 | |
3597 | xor %r9, 0x80, %r9 ! My core mask | |
3598 | #endif | |
3599 | mov 0x80, %r10 | |
3600 | cmp_startwait80_98: | |
3601 | cas [%r23],%g0,%r10 !lock | |
3602 | brz,a %r10, continue_cmp_80_98 | |
3603 | ldxa [0x50]%asi, %r13 !Running_rw | |
3604 | ld [%r23], %r10 | |
3605 | cmp_wait80_98: | |
3606 | brnz,a %r10, cmp_wait80_98 | |
3607 | ld [%r23], %r10 | |
3608 | ba cmp_startwait80_98 | |
3609 | mov 0x80, %r10 | |
3610 | continue_cmp_80_98: | |
3611 | ldxa [0x58]%asi, %r14 !Running_status | |
3612 | xnor %r14, %r13, %r14 !Bits equal | |
3613 | brz,a %r8, cmp_multi_core_80_98 | |
3614 | mov 0x97, %r17 | |
3615 | best_set_reg(0x289ccc438951c163, %r16, %r17) | |
3616 | cmp_multi_core_80_98: | |
3617 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
3618 | and %r14, %r9, %r14 !Apply core-mask | |
3619 | stxa %r14, [0x60]%asi | |
3620 | st %g0, [%r23] !clear lock | |
3621 | wr %g0, %r12, %asi | |
3622 | .word 0x91944005 ! 135: WRPR_PIL_R wrpr %r17, %r5, %pil | |
3623 | cmp_80_99: | |
3624 | nop | |
3625 | ta T_CHANGE_HPRIV | |
3626 | rd %asi, %r12 | |
3627 | wr %r0, 0x41, %asi | |
3628 | set sync_thr_counter4, %r23 | |
3629 | #ifndef SPC | |
3630 | ldxa [%g0]0x63, %r8 | |
3631 | and %r8, 0x38, %r8 ! Core ID | |
3632 | add %r8, %r23, %r23 | |
3633 | mov 0xff, %r9 | |
3634 | xor %r9, 0x80, %r9 | |
3635 | sllx %r9, %r8, %r9 ! My core mask | |
3636 | #else | |
3637 | mov 0, %r8 | |
3638 | mov 0xff, %r9 | |
3639 | xor %r9, 0x80, %r9 ! My core mask | |
3640 | #endif | |
3641 | mov 0x80, %r10 | |
3642 | cmp_startwait80_99: | |
3643 | cas [%r23],%g0,%r10 !lock | |
3644 | brz,a %r10, continue_cmp_80_99 | |
3645 | ldxa [0x50]%asi, %r13 !Running_rw | |
3646 | ld [%r23], %r10 | |
3647 | cmp_wait80_99: | |
3648 | brnz,a %r10, cmp_wait80_99 | |
3649 | ld [%r23], %r10 | |
3650 | ba cmp_startwait80_99 | |
3651 | mov 0x80, %r10 | |
3652 | continue_cmp_80_99: | |
3653 | ldxa [0x58]%asi, %r14 !Running_status | |
3654 | xnor %r14, %r13, %r14 !Bits equal | |
3655 | brz,a %r8, cmp_multi_core_80_99 | |
3656 | mov 0x78, %r17 | |
3657 | best_set_reg(0xfa96086abacd60b6, %r16, %r17) | |
3658 | cmp_multi_core_80_99: | |
3659 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
3660 | and %r14, %r9, %r14 !Apply core-mask | |
3661 | stxa %r14, [0x68]%asi | |
3662 | st %g0, [%r23] !clear lock | |
3663 | wr %g0, %r12, %asi | |
3664 | ta T_CHANGE_NONHPRIV | |
3665 | .word 0xa9a0016a ! 136: FABSq dis not found | |
3666 | ||
3667 | mondo_80_100: | |
3668 | nop | |
3669 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3670 | ta T_CHANGE_PRIV | |
3671 | stxa %r17, [%r0+0x3c8] %asi | |
3672 | .word 0x9d944012 ! 137: WRPR_WSTATE_R wrpr %r17, %r18, %wstate | |
3673 | splash_cmpr_80_101: | |
3674 | mov 1, %r18 | |
3675 | sllx %r18, 63, %r18 | |
3676 | rd %tick, %r17 | |
3677 | add %r17, 0x100, %r17 | |
3678 | or %r17, %r18, %r17 | |
3679 | ta T_CHANGE_PRIV | |
3680 | .word 0xaf800011 ! 138: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
3681 | .word 0xc32fc000 ! 139: STXFSR_R st-sfr %f1, [%r0, %r31] | |
3682 | intveclr_80_103: | |
3683 | nop | |
3684 | ta T_CHANGE_HPRIV | |
3685 | setx 0xc7db102bf261e2d3, %r1, %r28 | |
3686 | stxa %r28, [%g0] 0x72 | |
3687 | .word 0x25400001 ! 140: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3688 | .word 0xa78530e0 ! 141: WR_GRAPHICS_STATUS_REG_I wr %r20, 0x10e0, %- | |
3689 | .word 0x91d020b5 ! 142: Tcc_I ta icc_or_xcc, %r0 + 181 | |
3690 | cmp_80_104: | |
3691 | nop | |
3692 | ta T_CHANGE_HPRIV | |
3693 | rd %asi, %r12 | |
3694 | wr %r0, 0x41, %asi | |
3695 | set sync_thr_counter4, %r23 | |
3696 | #ifndef SPC | |
3697 | ldxa [%g0]0x63, %r8 | |
3698 | and %r8, 0x38, %r8 ! Core ID | |
3699 | add %r8, %r23, %r23 | |
3700 | mov 0xff, %r9 | |
3701 | xor %r9, 0x80, %r9 | |
3702 | sllx %r9, %r8, %r9 ! My core mask | |
3703 | #else | |
3704 | mov 0, %r8 | |
3705 | mov 0xff, %r9 | |
3706 | xor %r9, 0x80, %r9 ! My core mask | |
3707 | #endif | |
3708 | mov 0x80, %r10 | |
3709 | cmp_startwait80_104: | |
3710 | cas [%r23],%g0,%r10 !lock | |
3711 | brz,a %r10, continue_cmp_80_104 | |
3712 | ldxa [0x50]%asi, %r13 !Running_rw | |
3713 | ld [%r23], %r10 | |
3714 | cmp_wait80_104: | |
3715 | brnz,a %r10, cmp_wait80_104 | |
3716 | ld [%r23], %r10 | |
3717 | ba cmp_startwait80_104 | |
3718 | mov 0x80, %r10 | |
3719 | continue_cmp_80_104: | |
3720 | ldxa [0x58]%asi, %r14 !Running_status | |
3721 | xnor %r14, %r13, %r14 !Bits equal | |
3722 | brz,a %r8, cmp_multi_core_80_104 | |
3723 | mov 6, %r17 | |
3724 | best_set_reg(0x195992ac7133d30b, %r16, %r17) | |
3725 | cmp_multi_core_80_104: | |
3726 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
3727 | and %r14, %r9, %r14 !Apply core-mask | |
3728 | stxa %r14, [0x60]%asi | |
3729 | st %g0, [%r23] !clear lock | |
3730 | wr %g0, %r12, %asi | |
3731 | .word 0x99a00170 ! 143: FABSq dis not found | |
3732 | ||
3733 | splash_cmpr_80_105: | |
3734 | mov 0, %r18 | |
3735 | sllx %r18, 63, %r18 | |
3736 | rd %tick, %r17 | |
3737 | add %r17, 0x60, %r17 | |
3738 | or %r17, %r18, %r17 | |
3739 | .word 0xaf800011 ! 144: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
3740 | cwp_80_106: | |
3741 | set user_data_start, %o7 | |
3742 | .word 0x93902004 ! 145: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
3743 | mondo_80_107: | |
3744 | nop | |
3745 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3746 | ta T_CHANGE_PRIV | |
3747 | stxa %r17, [%r0+0x3d8] %asi | |
3748 | .word 0x9d944009 ! 146: WRPR_WSTATE_R wrpr %r17, %r9, %wstate | |
3749 | brcommon3_80_108: | |
3750 | nop | |
3751 | setx common_target, %r12, %r27 | |
3752 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
3753 | ba,a .+12 | |
3754 | .word 0xe86fe0f0 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x00f0] | |
3755 | ba,a .+8 | |
3756 | jmpl %r27+0, %r27 | |
3757 | .word 0xe897c032 ! 147: LDUHA_R lduha [%r31, %r18] 0x01, %r20 | |
3758 | ibp_80_109: | |
3759 | nop | |
3760 | ta T_CHANGE_HPRIV | |
3761 | mov 8, %r18 | |
3762 | rd %asi, %r12 | |
3763 | wr %r0, 0x41, %asi | |
3764 | set sync_thr_counter4, %r23 | |
3765 | #ifndef SPC | |
3766 | ldxa [%g0]0x63, %r8 | |
3767 | and %r8, 0x38, %r8 ! Core ID | |
3768 | add %r8, %r23, %r23 | |
3769 | #else | |
3770 | mov 0, %r8 | |
3771 | #endif | |
3772 | mov 0x80, %r16 | |
3773 | ibp_startwait80_109: | |
3774 | cas [%r23],%g0,%r16 !lock | |
3775 | brz,a %r16, continue_ibp_80_109 | |
3776 | mov (~0x80&0xf0), %r16 | |
3777 | ld [%r23], %r16 | |
3778 | ibp_wait80_109: | |
3779 | brnz %r16, ibp_wait80_109 | |
3780 | ld [%r23], %r16 | |
3781 | ba ibp_startwait80_109 | |
3782 | mov 0x80, %r16 | |
3783 | continue_ibp_80_109: | |
3784 | sllx %r16, %r8, %r16 !Mask for my core only | |
3785 | ldxa [0x58]%asi, %r17 !Running_status | |
3786 | wait_for_stat_80_109: | |
3787 | ldxa [0x50]%asi, %r13 !Running_rw | |
3788 | cmp %r13, %r17 | |
3789 | bne,a %xcc, wait_for_stat_80_109 | |
3790 | ldxa [0x58]%asi, %r17 !Running_status | |
3791 | stxa %r16, [0x68]%asi !Park (W1C) | |
3792 | ldxa [0x50]%asi, %r14 !Running_rw | |
3793 | wait_for_ibp_80_109: | |
3794 | ldxa [0x58]%asi, %r17 !Running_status | |
3795 | cmp %r14, %r17 | |
3796 | bne,a %xcc, wait_for_ibp_80_109 | |
3797 | ldxa [0x50]%asi, %r14 !Running_rw | |
3798 | ibp_doit80_109: | |
3799 | best_set_reg(0x00000040c0d95790,%r19, %r20) | |
3800 | stxa %r20, [%r18]0x42 | |
3801 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3802 | st %g0, [%r23] !clear lock | |
3803 | wr %r0, %r12, %asi !restore %asi | |
3804 | .word 0xa1a449aa ! 148: FDIVs fdivs %f17, %f10, %f16 | |
3805 | trapasi_80_110: | |
3806 | nop | |
3807 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
3808 | .word 0xd4c04a00 ! 149: LDSWA_R ldswa [%r1, %r0] 0x50, %r10 | |
3809 | setx 0xd9b28fd21a68638b, %r1, %r28 | |
3810 | stxa %r28, [%g0] 0x73 | |
3811 | intvec_80_111: | |
3812 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3813 | splash_cmpr_80_112: | |
3814 | mov 0, %r18 | |
3815 | sllx %r18, 63, %r18 | |
3816 | rd %tick, %r17 | |
3817 | add %r17, 0x100, %r17 | |
3818 | or %r17, %r18, %r17 | |
3819 | ta T_CHANGE_PRIV | |
3820 | .word 0xaf800011 ! 151: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
3821 | splash_lsu_80_113: | |
3822 | nop | |
3823 | ta T_CHANGE_HPRIV | |
3824 | set 0x434acde1, %r2 | |
3825 | mov 0x3, %r1 | |
3826 | sllx %r1, 32, %r1 | |
3827 | or %r1, %r2, %r2 | |
3828 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3829 | .word 0x3d400001 ! 152: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3830 | .word 0x81510000 ! 153: RDPR_TICK rdpr %tick, %r0 | |
3831 | splash_lsu_80_114: | |
3832 | nop | |
3833 | ta T_CHANGE_HPRIV | |
3834 | set 0x772ea67f, %r2 | |
3835 | mov 0x3, %r1 | |
3836 | sllx %r1, 32, %r1 | |
3837 | or %r1, %r2, %r2 | |
3838 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3839 | .word 0x3d400001 ! 154: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3840 | pmu_80_115: | |
3841 | nop | |
3842 | setx 0xfffffda8fffffc77, %g1, %g7 | |
3843 | .word 0xa3800007 ! 155: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
3844 | #if (defined SPC || defined CMP1) | |
3845 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_116) + 56, 16, 16)) -> intp(5,0,17) | |
3846 | #else | |
3847 | setx 0xa8d44594dc2c461c, %r1, %r28 | |
3848 | stxa %r28, [%g0] 0x73 | |
3849 | #endif | |
3850 | intvec_80_116: | |
3851 | .word 0x39400001 ! 156: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3852 | .word 0xa984c001 ! 157: WR_SET_SOFTINT_R wr %r19, %r1, %set_softint | |
3853 | .word 0x95a409c6 ! 158: FDIVd fdivd %f16, %f6, %f10 | |
3854 | .word 0x9bb08593 ! 159: FCMPGT32 fcmpgt32 %d2, %d50, %r13 | |
3855 | cerer_80_118: | |
3856 | nop | |
3857 | ta T_CHANGE_HPRIV | |
3858 | best_set_reg(0x57582495ff4edd52, %r26, %r27) | |
3859 | sethi %hi(0x20008000), %r26 ! Set ITTM/DTTM | |
3860 | sllx %r26, 32, %r26 | |
3861 | or %r26, %r27, %r27 | |
3862 | mov 0x10, %r26 | |
3863 | stxa %r27, [%r26]0x4c | |
3864 | ta T_CHANGE_NONHPRIV | |
3865 | .word 0x8143e011 ! 160: MEMBAR membar #LoadLoad | #Lookaside | |
3866 | splash_hpstate_80_119: | |
3867 | ta T_CHANGE_NONHPRIV | |
3868 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> | |
3869 | .word 0x81983f9d ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1f9d, %hpstate | |
3870 | .word 0x8d90339e ! 162: WRPR_PSTATE_I wrpr %r0, 0x139e, %pstate | |
3871 | otherw | |
3872 | mov 0xb1, %r30 | |
3873 | .word 0x91d0001e ! 163: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3874 | .word 0xc19fdb60 ! 164: LDDFA_R ldda [%r31, %r0], %f0 | |
3875 | setx 0x8dac5c481152a52d, %r1, %r28 | |
3876 | stxa %r28, [%g0] 0x73 | |
3877 | intvec_80_121: | |
3878 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3879 | ibp_80_122: | |
3880 | nop | |
3881 | ta T_CHANGE_HPRIV | |
3882 | mov 8, %r18 | |
3883 | rd %asi, %r12 | |
3884 | wr %r0, 0x41, %asi | |
3885 | set sync_thr_counter4, %r23 | |
3886 | #ifndef SPC | |
3887 | ldxa [%g0]0x63, %r8 | |
3888 | and %r8, 0x38, %r8 ! Core ID | |
3889 | add %r8, %r23, %r23 | |
3890 | #else | |
3891 | mov 0, %r8 | |
3892 | #endif | |
3893 | mov 0x80, %r16 | |
3894 | ibp_startwait80_122: | |
3895 | cas [%r23],%g0,%r16 !lock | |
3896 | brz,a %r16, continue_ibp_80_122 | |
3897 | mov (~0x80&0xf0), %r16 | |
3898 | ld [%r23], %r16 | |
3899 | ibp_wait80_122: | |
3900 | brnz %r16, ibp_wait80_122 | |
3901 | ld [%r23], %r16 | |
3902 | ba ibp_startwait80_122 | |
3903 | mov 0x80, %r16 | |
3904 | continue_ibp_80_122: | |
3905 | sllx %r16, %r8, %r16 !Mask for my core only | |
3906 | ldxa [0x58]%asi, %r17 !Running_status | |
3907 | wait_for_stat_80_122: | |
3908 | ldxa [0x50]%asi, %r13 !Running_rw | |
3909 | cmp %r13, %r17 | |
3910 | bne,a %xcc, wait_for_stat_80_122 | |
3911 | ldxa [0x58]%asi, %r17 !Running_status | |
3912 | stxa %r16, [0x68]%asi !Park (W1C) | |
3913 | ldxa [0x50]%asi, %r14 !Running_rw | |
3914 | wait_for_ibp_80_122: | |
3915 | ldxa [0x58]%asi, %r17 !Running_status | |
3916 | cmp %r14, %r17 | |
3917 | bne,a %xcc, wait_for_ibp_80_122 | |
3918 | ldxa [0x50]%asi, %r14 !Running_rw | |
3919 | ibp_doit80_122: | |
3920 | best_set_reg(0x00000040e5d79093,%r19, %r20) | |
3921 | stxa %r20, [%r18]0x42 | |
3922 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3923 | st %g0, [%r23] !clear lock | |
3924 | wr %r0, %r12, %asi !restore %asi | |
3925 | .word 0xe1bfd920 ! 166: STDFA_R stda %f16, [%r0, %r31] | |
3926 | splash_lsu_80_123: | |
3927 | nop | |
3928 | ta T_CHANGE_HPRIV | |
3929 | set 0x4eb5b762, %r2 | |
3930 | mov 0x5, %r1 | |
3931 | sllx %r1, 32, %r1 | |
3932 | or %r1, %r2, %r2 | |
3933 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3934 | ta T_CHANGE_NONHPRIV | |
3935 | .word 0x3d400001 ! 167: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3936 | nop | |
3937 | mov 0x80, %g3 | |
3938 | stxa %g3, [%g3] 0x57 | |
3939 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
3940 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
3941 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
3942 | .word 0xd05fc000 ! 168: LDX_R ldx [%r31 + %r0], %r8 | |
3943 | jmptr_80_124: | |
3944 | nop | |
3945 | best_set_reg(0xe0a00000, %r20, %r27) | |
3946 | .word 0xb7c6c000 ! 169: JMPL_R jmpl %r27 + %r0, %r27 | |
3947 | nop | |
3948 | ta T_CHANGE_HPRIV ! macro | |
3949 | donret_80_125: | |
3950 | rd %pc, %r12 | |
3951 | add %r12, (donretarg_80_125-donret_80_125), %r12 | |
3952 | add %r12, 0x8, %r11 ! nonseq tnpc | |
3953 | wrpr %g0, 0x1, %tl | |
3954 | wrpr %g0, %r12, %tpc | |
3955 | wrpr %g0, %r11, %tnpc | |
3956 | set (0x003b8500 | (28 << 24)), %r13 | |
3957 | and %r12, 0xfff, %r14 | |
3958 | sllx %r14, 30, %r14 | |
3959 | or %r13, %r14, %r20 | |
3960 | wrpr %r20, %g0, %tstate | |
3961 | wrhpr %g0, 0x1bdb, %htstate | |
3962 | ta T_CHANGE_NONHPRIV ! rand=1 (80) | |
3963 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> | |
3964 | done | |
3965 | donretarg_80_125: | |
3966 | .word 0x3a800001 ! 170: BCC bcc,a <label_0x1> | |
3967 | .word 0xc19fe040 ! 171: LDDFA_I ldda [%r31, 0x0040], %f0 | |
3968 | trapasi_80_127: | |
3969 | nop | |
3970 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
3971 | .word 0xd0884e60 ! 172: LDUBA_R lduba [%r1, %r0] 0x73, %r8 | |
3972 | splash_tick_80_128: | |
3973 | nop | |
3974 | ta T_CHANGE_HPRIV | |
3975 | best_set_reg(0x34d7dedc8c6def3b, %r16, %r17) | |
3976 | .word 0x89800011 ! 173: WRTICK_R wr %r0, %r17, %tick | |
3977 | fpinit_80_129: | |
3978 | nop | |
3979 | setx fp_data_quads, %r19, %r20 | |
3980 | ldd [%r20], %f0 | |
3981 | ldd [%r20+8], %f4 | |
3982 | ld [%r20+16], %fsr | |
3983 | ld [%r20+24], %r19 | |
3984 | wr %r19, %g0, %gsr | |
3985 | .word 0x91a009c4 ! 174: FDIVd fdivd %f0, %f4, %f8 | |
3986 | splash_tick_80_130: | |
3987 | nop | |
3988 | ta T_CHANGE_HPRIV | |
3989 | best_set_reg(0x123f23cb3496f922, %r16, %r17) | |
3990 | .word 0x89800011 ! 175: WRTICK_R wr %r0, %r17, %tick | |
3991 | .word 0xd127e0fc ! 176: STF_I st %f8, [0x00fc, %r31] | |
3992 | splash_tick_80_131: | |
3993 | nop | |
3994 | ta T_CHANGE_HPRIV | |
3995 | best_set_reg(0xc560eced460ee0c5, %r16, %r17) | |
3996 | .word 0x89800011 ! 177: WRTICK_R wr %r0, %r17, %tick | |
3997 | .word 0xd077e008 ! 178: STX_I stx %r8, [%r31 + 0x0008] | |
3998 | #if (defined SPC || defined CMP1) | |
3999 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_132) + 56, 16, 16)) -> intp(1,0,30) | |
4000 | #else | |
4001 | setx 0x29b2bc46f262fa4b, %r1, %r28 | |
4002 | stxa %r28, [%g0] 0x73 | |
4003 | #endif | |
4004 | intvec_80_132: | |
4005 | .word 0x39400001 ! 179: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4006 | .word 0x8780208a ! 180: WRASI_I wr %r0, 0x008a, %asi | |
4007 | setx 0xd62686ce7e4a868e, %r1, %r28 | |
4008 | stxa %r28, [%g0] 0x73 | |
4009 | intvec_80_133: | |
4010 | .word 0x39400001 ! 181: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4011 | .word 0xd037e1af ! 182: STH_I sth %r8, [%r31 + 0x01af] | |
4012 | .word 0xd0dfc034 ! 183: LDXA_R ldxa [%r31, %r20] 0x01, %r8 | |
4013 | br_badelay2_80_135: | |
4014 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4015 | allclean | |
4016 | .word 0xa5b04306 ! 184: ALIGNADDRESS alignaddr %r1, %r6, %r18 | |
4017 | splash_tba_80_136: | |
4018 | nop | |
4019 | ta T_CHANGE_PRIV | |
4020 | set 0x120000, %r12 | |
4021 | .word 0x8b90000c ! 185: WRPR_TBA_R wrpr %r0, %r12, %tba | |
4022 | trapasi_80_137: | |
4023 | nop | |
4024 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
4025 | .word 0xe2d04a00 ! 186: LDSHA_R ldsha [%r1, %r0] 0x50, %r17 | |
4026 | ceter_80_138: | |
4027 | nop | |
4028 | ta T_CHANGE_HPRIV | |
4029 | mov 7, %r17 | |
4030 | sllx %r17, 60, %r17 | |
4031 | mov 0x18, %r16 | |
4032 | stxa %r17, [%r16]0x4c | |
4033 | ta T_CHANGE_NONHPRIV | |
4034 | .word 0x99410000 ! 187: RDTICK rd %tick, %r12 | |
4035 | intveclr_80_139: | |
4036 | nop | |
4037 | ta T_CHANGE_HPRIV | |
4038 | setx 0x932865ec282a38d6, %r1, %r28 | |
4039 | stxa %r28, [%g0] 0x72 | |
4040 | .word 0x25400001 ! 188: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4041 | brcommon2_80_140: | |
4042 | nop | |
4043 | setx common_target, %r12, %r27 | |
4044 | ba,a .+12 | |
4045 | .word 0xe310c00b ! 1: LDQF_R - [%r3, %r11], %f17 | |
4046 | ba,a .+8 | |
4047 | jmpl %r27+0, %r27 | |
4048 | .word 0xe19fe080 ! 189: LDDFA_I ldda [%r31, 0x0080], %f16 | |
4049 | trapasi_80_141: | |
4050 | nop | |
4051 | mov 0x8, %r1 ! (VA for ASI 0x5a) | |
4052 | .word 0xe6d84b40 ! 190: LDXA_R ldxa [%r1, %r0] 0x5a, %r19 | |
4053 | ibp_80_142: | |
4054 | nop | |
4055 | ta T_CHANGE_HPRIV | |
4056 | mov 8, %r18 | |
4057 | rd %asi, %r12 | |
4058 | wr %r0, 0x41, %asi | |
4059 | set sync_thr_counter4, %r23 | |
4060 | #ifndef SPC | |
4061 | ldxa [%g0]0x63, %r8 | |
4062 | and %r8, 0x38, %r8 ! Core ID | |
4063 | add %r8, %r23, %r23 | |
4064 | #else | |
4065 | mov 0, %r8 | |
4066 | #endif | |
4067 | mov 0x80, %r16 | |
4068 | ibp_startwait80_142: | |
4069 | cas [%r23],%g0,%r16 !lock | |
4070 | brz,a %r16, continue_ibp_80_142 | |
4071 | mov (~0x80&0xf0), %r16 | |
4072 | ld [%r23], %r16 | |
4073 | ibp_wait80_142: | |
4074 | brnz %r16, ibp_wait80_142 | |
4075 | ld [%r23], %r16 | |
4076 | ba ibp_startwait80_142 | |
4077 | mov 0x80, %r16 | |
4078 | continue_ibp_80_142: | |
4079 | sllx %r16, %r8, %r16 !Mask for my core only | |
4080 | ldxa [0x58]%asi, %r17 !Running_status | |
4081 | wait_for_stat_80_142: | |
4082 | ldxa [0x50]%asi, %r13 !Running_rw | |
4083 | cmp %r13, %r17 | |
4084 | bne,a %xcc, wait_for_stat_80_142 | |
4085 | ldxa [0x58]%asi, %r17 !Running_status | |
4086 | stxa %r16, [0x68]%asi !Park (W1C) | |
4087 | ldxa [0x50]%asi, %r14 !Running_rw | |
4088 | wait_for_ibp_80_142: | |
4089 | ldxa [0x58]%asi, %r17 !Running_status | |
4090 | cmp %r14, %r17 | |
4091 | bne,a %xcc, wait_for_ibp_80_142 | |
4092 | ldxa [0x50]%asi, %r14 !Running_rw | |
4093 | ibp_doit80_142: | |
4094 | best_set_reg(0x0000004036d093ab,%r19, %r20) | |
4095 | stxa %r20, [%r18]0x42 | |
4096 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
4097 | st %g0, [%r23] !clear lock | |
4098 | wr %r0, %r12, %asi !restore %asi | |
4099 | .word 0xa5b507d4 ! 191: PDIST pdistn %d20, %d20, %d18 | |
4100 | .word 0xd737e1b0 ! 192: STQF_I - %f11, [0x01b0, %r31] | |
4101 | splash_cmpr_80_143: | |
4102 | mov 0, %r18 | |
4103 | sllx %r18, 63, %r18 | |
4104 | rd %tick, %r17 | |
4105 | add %r17, 0x80, %r17 | |
4106 | or %r17, %r18, %r17 | |
4107 | ta T_CHANGE_HPRIV | |
4108 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
4109 | .word 0xaf800011 ! 193: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
4110 | tagged_80_144: | |
4111 | tsubcctv %r16, 0x1910, %r17 | |
4112 | .word 0xd607e1a8 ! 194: LDUW_I lduw [%r31 + 0x01a8], %r11 | |
4113 | .word 0xa6ab4011 ! 195: ANDNcc_R andncc %r13, %r17, %r19 | |
4114 | .word 0xd4bfc020 ! 196: STDA_R stda %r10, [%r31 + %r0] 0x01 | |
4115 | intveclr_80_145: | |
4116 | nop | |
4117 | ta T_CHANGE_HPRIV | |
4118 | setx 0xc7c99c3341c60889, %r1, %r28 | |
4119 | stxa %r28, [%g0] 0x72 | |
4120 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4121 | dvapa_80_146: | |
4122 | nop | |
4123 | ta T_CHANGE_HPRIV | |
4124 | mov 0xa44, %r20 | |
4125 | mov 0xe, %r19 | |
4126 | sllx %r20, 23, %r20 | |
4127 | or %r19, %r20, %r19 | |
4128 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
4129 | mov 0x38, %r18 | |
4130 | stxa %r31, [%r18]0x58 | |
4131 | ta T_CHANGE_NONHPRIV | |
4132 | .word 0x99a1c9ca ! 198: FDIVd fdivd %f38, %f10, %f12 | |
4133 | ibp_80_147: | |
4134 | nop | |
4135 | ta T_CHANGE_HPRIV | |
4136 | mov 8, %r18 | |
4137 | rd %asi, %r12 | |
4138 | wr %r0, 0x41, %asi | |
4139 | set sync_thr_counter4, %r23 | |
4140 | #ifndef SPC | |
4141 | ldxa [%g0]0x63, %r8 | |
4142 | and %r8, 0x38, %r8 ! Core ID | |
4143 | add %r8, %r23, %r23 | |
4144 | #else | |
4145 | mov 0, %r8 | |
4146 | #endif | |
4147 | mov 0x80, %r16 | |
4148 | ibp_startwait80_147: | |
4149 | cas [%r23],%g0,%r16 !lock | |
4150 | brz,a %r16, continue_ibp_80_147 | |
4151 | mov (~0x80&0xf0), %r16 | |
4152 | ld [%r23], %r16 | |
4153 | ibp_wait80_147: | |
4154 | brnz %r16, ibp_wait80_147 | |
4155 | ld [%r23], %r16 | |
4156 | ba ibp_startwait80_147 | |
4157 | mov 0x80, %r16 | |
4158 | continue_ibp_80_147: | |
4159 | sllx %r16, %r8, %r16 !Mask for my core only | |
4160 | ldxa [0x58]%asi, %r17 !Running_status | |
4161 | wait_for_stat_80_147: | |
4162 | ldxa [0x50]%asi, %r13 !Running_rw | |
4163 | cmp %r13, %r17 | |
4164 | bne,a %xcc, wait_for_stat_80_147 | |
4165 | ldxa [0x58]%asi, %r17 !Running_status | |
4166 | stxa %r16, [0x68]%asi !Park (W1C) | |
4167 | ldxa [0x50]%asi, %r14 !Running_rw | |
4168 | wait_for_ibp_80_147: | |
4169 | ldxa [0x58]%asi, %r17 !Running_status | |
4170 | cmp %r14, %r17 | |
4171 | bne,a %xcc, wait_for_ibp_80_147 | |
4172 | ldxa [0x50]%asi, %r14 !Running_rw | |
4173 | ibp_doit80_147: | |
4174 | best_set_reg(0x00000050c8d3ab9c,%r19, %r20) | |
4175 | stxa %r20, [%r18]0x42 | |
4176 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
4177 | st %g0, [%r23] !clear lock | |
4178 | wr %r0, %r12, %asi !restore %asi | |
4179 | ta T_CHANGE_NONHPRIV | |
4180 | .word 0xd83fe1c0 ! 199: STD_I std %r12, [%r31 + 0x01c0] | |
4181 | splash_tick_80_148: | |
4182 | nop | |
4183 | ta T_CHANGE_HPRIV | |
4184 | best_set_reg(0x30f5a49016a185de, %r16, %r17) | |
4185 | .word 0x89800011 ! 200: WRTICK_R wr %r0, %r17, %tick | |
4186 | jmptr_80_149: | |
4187 | nop | |
4188 | best_set_reg(0xe0a00000, %r20, %r27) | |
4189 | .word 0xb7c6c000 ! 201: JMPL_R jmpl %r27 + %r0, %r27 | |
4190 | cmpenall_80_150: | |
4191 | nop | |
4192 | nop | |
4193 | ta T_CHANGE_HPRIV | |
4194 | rd %asi, %r12 | |
4195 | wr %r0, 0x41, %asi | |
4196 | set sync_thr_counter4, %r23 | |
4197 | #ifndef SPC | |
4198 | ldxa [%g0]0x63, %r8 | |
4199 | and %r8, 0x38, %r8 ! Core ID | |
4200 | add %r8, %r23, %r23 | |
4201 | mov 0xff, %r9 | |
4202 | sllx %r9, %r8, %r9 ! My core mask | |
4203 | #else | |
4204 | mov 0xff, %r9 ! My core mask | |
4205 | #endif | |
4206 | cmpenall_startwait80_150: | |
4207 | mov 0x80, %r10 | |
4208 | cas [%r23],%g0,%r10 !lock | |
4209 | brz,a %r10, continue_cmpenall_80_150 | |
4210 | nop | |
4211 | cmpenall_wait80_150: | |
4212 | ld [%r23], %r10 | |
4213 | brnz %r10, cmpenall_wait80_150 | |
4214 | nop | |
4215 | ba,a cmpenall_startwait80_150 | |
4216 | continue_cmpenall_80_150: | |
4217 | ldxa [0x58]%asi, %r14 !Running_status | |
4218 | wait_for_cmpstat_80_150: | |
4219 | ldxa [0x50]%asi, %r13 !Running_rw | |
4220 | cmp %r13, %r14 | |
4221 | bne,a %xcc, wait_for_cmpstat_80_150 | |
4222 | ldxa [0x58]%asi, %r14 !Running_status | |
4223 | ldxa [0x10]%asi, %r14 !Get enabled threads | |
4224 | and %r14, %r9, %r14 !My core mask | |
4225 | stxa %r14, [0x60]%asi !W1S | |
4226 | ldxa [0x58]%asi, %r16 !Running_status | |
4227 | wait_for_cmpstat2_80_150: | |
4228 | and %r16, %r9, %r16 !My core mask | |
4229 | cmp %r14, %r16 | |
4230 | bne,a %xcc, wait_for_cmpstat2_80_150 | |
4231 | ldxa [0x58]%asi, %r16 !Running_status | |
4232 | st %g0, [%r23] !clear lock | |
4233 | nop | |
4234 | nop | |
4235 | ta T_CHANGE_PRIV | |
4236 | wrpr %g0, %g0, %gl | |
4237 | nop | |
4238 | nop | |
4239 | setx join_lbl_0_0, %g1, %g2 | |
4240 | jmp %g2 | |
4241 | nop | |
4242 | fork_lbl_0_7: | |
4243 | ta T_CHANGE_NONHPRIV | |
4244 | splash_lsu_40_0: | |
4245 | nop | |
4246 | ta T_CHANGE_HPRIV | |
4247 | set 0x936250c0, %r2 | |
4248 | mov 0x2, %r1 | |
4249 | sllx %r1, 32, %r1 | |
4250 | or %r1, %r2, %r2 | |
4251 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4252 | ta T_CHANGE_NONHPRIV | |
4253 | ibp_40_1: | |
4254 | nop | |
4255 | ta T_CHANGE_NONHPRIV | |
4256 | .word 0xe1bfe0a0 ! 1: STDFA_I stda %f16, [0x00a0, %r31] | |
4257 | splash_lsu_40_2: | |
4258 | nop | |
4259 | ta T_CHANGE_HPRIV | |
4260 | set 0x25f8dbd1, %r2 | |
4261 | mov 0x1, %r1 | |
4262 | sllx %r1, 32, %r1 | |
4263 | or %r1, %r2, %r2 | |
4264 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4265 | ta T_CHANGE_NONHPRIV | |
4266 | .word 0x3d400001 ! 2: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4267 | splash_lsu_40_3: | |
4268 | nop | |
4269 | ta T_CHANGE_HPRIV | |
4270 | set 0x17d237a3, %r2 | |
4271 | mov 0x4, %r1 | |
4272 | sllx %r1, 32, %r1 | |
4273 | or %r1, %r2, %r2 | |
4274 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4275 | .word 0x3d400001 ! 3: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4276 | .word 0xe277e034 ! 4: STX_I stx %r17, [%r31 + 0x0034] | |
4277 | .word 0x30780001 ! 5: BPA <illegal instruction> | |
4278 | .word 0x83d020b2 ! 6: Tcc_I te icc_or_xcc, %r0 + 178 | |
4279 | .word 0x89800011 ! 7: WRTICK_R wr %r0, %r17, %tick | |
4280 | splash_htba_40_5: | |
4281 | nop | |
4282 | ta T_CHANGE_HPRIV | |
4283 | setx 0x0000000200280000, %r11, %r12 | |
4284 | .word 0x8b98000c ! 8: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
4285 | .word 0xe2800c00 ! 9: LDUWA_R lduwa [%r0, %r0] 0x60, %r17 | |
4286 | .word 0xc30fc000 ! 10: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
4287 | splash_hpstate_40_7: | |
4288 | ta T_CHANGE_NONHPRIV | |
4289 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> | |
4290 | .word 0x819828cd ! 11: WRHPR_HPSTATE_I wrhpr %r0, 0x08cd, %hpstate | |
4291 | .word 0x87ac8a53 ! 12: FCMPd fcmpd %fcc<n>, %f18, %f50 | |
4292 | .word 0xd48008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
4293 | setx 0xfbe593763ffa76cf, %r1, %r28 | |
4294 | stxa %r28, [%g0] 0x73 | |
4295 | intvec_40_9: | |
4296 | .word 0x39400001 ! 14: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4297 | trapasi_40_10: | |
4298 | nop | |
4299 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
4300 | .word 0xd4884a00 ! 15: LDUBA_R lduba [%r1, %r0] 0x50, %r10 | |
4301 | ibp_40_11: | |
4302 | nop | |
4303 | .word 0xc3eac02a ! 16: PREFETCHA_R prefetcha [%r11, %r10] 0x01, #one_read | |
4304 | .word 0xe69fc380 ! 17: LDDA_R ldda [%r31, %r0] 0x1c, %r19 | |
4305 | brcommon3_40_12: | |
4306 | nop | |
4307 | setx common_target, %r12, %r27 | |
4308 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
4309 | ba,a .+12 | |
4310 | .word 0xe737e1f0 ! 1: STQF_I - %f19, [0x01f0, %r31] | |
4311 | ba,a .+8 | |
4312 | jmpl %r27+0, %r27 | |
4313 | .word 0xe69fc02b ! 18: LDDA_R ldda [%r31, %r11] 0x01, %r19 | |
4314 | nop | |
4315 | mov 0x80, %g3 | |
4316 | stxa %g3, [%g3] 0x57 | |
4317 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
4318 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
4319 | .word 0xe65fc000 ! 19: LDX_R ldx [%r31 + %r0], %r19 | |
4320 | splash_hpstate_40_13: | |
4321 | .word 0x81982507 ! 20: WRHPR_HPSTATE_I wrhpr %r0, 0x0507, %hpstate | |
4322 | intveclr_40_14: | |
4323 | nop | |
4324 | ta T_CHANGE_HPRIV | |
4325 | setx 0x4dc4390214bcd865, %r1, %r28 | |
4326 | stxa %r28, [%g0] 0x72 | |
4327 | ta T_CHANGE_NONHPRIV | |
4328 | .word 0x25400001 ! 21: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4329 | nop | |
4330 | ta T_CHANGE_HPRIV | |
4331 | mov 0x40+1, %r10 | |
4332 | set sync_thr_counter5, %r23 | |
4333 | #ifndef SPC | |
4334 | ldxa [%g0]0x63, %o1 | |
4335 | and %o1, 0x38, %o1 | |
4336 | add %o1, %r23, %r23 | |
4337 | sllx %o1, 5, %o3 !(CID*256) | |
4338 | #endif | |
4339 | cas [%r23],%g0,%r10 !lock | |
4340 | brnz %r10, cwq_40_15 | |
4341 | rd %asi, %r12 | |
4342 | wr %g0, 0x40, %asi | |
4343 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
4344 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
4345 | cmp %l1, 1 | |
4346 | bne cwq_40_15 | |
4347 | set CWQ_BASE, %l6 | |
4348 | #ifndef SPC | |
4349 | add %l6, %o3, %l6 | |
4350 | #endif | |
4351 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
4352 | best_set_reg(0x20610000, %l1, %l2) !# Control Word | |
4353 | sllx %l2, 32, %l2 | |
4354 | stx %l2, [%l6 + 0x0] | |
4355 | membar #Sync | |
4356 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
4357 | sub %l2, 0x40, %l2 | |
4358 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
4359 | wr %r12, %g0, %asi | |
4360 | st %g0, [%r23] | |
4361 | cwq_40_15: | |
4362 | ta T_CHANGE_NONHPRIV | |
4363 | .word 0x91414000 ! 22: RDPC rd %pc, %r8 | |
4364 | .word 0xd8d7e028 ! 23: LDSHA_I ldsha [%r31, + 0x0028] %asi, %r12 | |
4365 | .word 0xe19fc3e0 ! 24: LDDFA_R ldda [%r31, %r0], %f16 | |
4366 | #if (defined SPC || defined CMP1) | |
4367 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_16) + 16, 16, 16)) -> intp(4,0,11) | |
4368 | #else | |
4369 | setx 0xf24212a1b07a9edc, %r1, %r28 | |
4370 | stxa %r28, [%g0] 0x73 | |
4371 | #endif | |
4372 | intvec_40_16: | |
4373 | .word 0x39400001 ! 25: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4374 | splash_tba_40_17: | |
4375 | nop | |
4376 | ta T_CHANGE_PRIV | |
4377 | setx 0x0000000400380000, %r11, %r12 | |
4378 | .word 0x8b90000c ! 26: WRPR_TBA_R wrpr %r0, %r12, %tba | |
4379 | nop | |
4380 | mov 0x80, %g3 | |
4381 | stxa %g3, [%g3] 0x5f | |
4382 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
4383 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
4384 | .word 0xd85fc000 ! 27: LDX_R ldx [%r31 + %r0], %r12 | |
4385 | .word 0xb1850007 ! 28: WR_STICK_REG_R wr %r20, %r7, %- | |
4386 | .word 0xd877e0c8 ! 29: STX_I stx %r12, [%r31 + 0x00c8] | |
4387 | tagged_40_18: | |
4388 | tsubcctv %r0, 0x16fa, %r8 | |
4389 | .word 0xd807e0b4 ! 30: LDUW_I lduw [%r31 + 0x00b4], %r12 | |
4390 | .word 0x89800011 ! 31: WRTICK_R wr %r0, %r17, %tick | |
4391 | trapasi_40_20: | |
4392 | nop | |
4393 | mov 0x30, %r1 ! (VA for ASI 0x5b) | |
4394 | .word 0xd8d84b60 ! 32: LDXA_R ldxa [%r1, %r0] 0x5b, %r12 | |
4395 | fpinit_40_21: | |
4396 | nop | |
4397 | setx fp_data_quads, %r19, %r20 | |
4398 | ldd [%r20], %f0 | |
4399 | ldd [%r20+8], %f4 | |
4400 | ld [%r20+16], %fsr | |
4401 | ld [%r20+24], %r19 | |
4402 | wr %r19, %g0, %gsr | |
4403 | .word 0xc3e83df7 ! 33: PREFETCHA_I prefetcha [%r0, + 0xfffffdf7] %asi, #one_read | |
4404 | nop | |
4405 | ta T_CHANGE_HPRIV | |
4406 | mov 0x40+1, %r10 | |
4407 | set sync_thr_counter5, %r23 | |
4408 | #ifndef SPC | |
4409 | ldxa [%g0]0x63, %o1 | |
4410 | and %o1, 0x38, %o1 | |
4411 | add %o1, %r23, %r23 | |
4412 | sllx %o1, 5, %o3 !(CID*256) | |
4413 | #endif | |
4414 | cas [%r23],%g0,%r10 !lock | |
4415 | brnz %r10, cwq_40_22 | |
4416 | rd %asi, %r12 | |
4417 | wr %g0, 0x40, %asi | |
4418 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
4419 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
4420 | cmp %l1, 1 | |
4421 | bne cwq_40_22 | |
4422 | set CWQ_BASE, %l6 | |
4423 | #ifndef SPC | |
4424 | add %l6, %o3, %l6 | |
4425 | #endif | |
4426 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
4427 | best_set_reg(0x20610000, %l1, %l2) !# Control Word | |
4428 | sllx %l2, 32, %l2 | |
4429 | stx %l2, [%l6 + 0x0] | |
4430 | membar #Sync | |
4431 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
4432 | sub %l2, 0x40, %l2 | |
4433 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
4434 | wr %r12, %g0, %asi | |
4435 | st %g0, [%r23] | |
4436 | cwq_40_22: | |
4437 | ta T_CHANGE_NONHPRIV | |
4438 | .word 0xa7414000 ! 34: RDPC rd %pc, %r19 | |
4439 | jmptr_40_23: | |
4440 | nop | |
4441 | best_set_reg(0xe1200000, %r20, %r27) | |
4442 | .word 0xb7c6c000 ! 35: JMPL_R jmpl %r27 + %r0, %r27 | |
4443 | nop | |
4444 | ta T_CHANGE_HPRIV ! macro | |
4445 | donret_40_24: | |
4446 | rd %pc, %r12 | |
4447 | add %r12, (donretarg_40_24-donret_40_24+4), %r12 | |
4448 | add %r12, 0x4, %r11 ! seq tnpc | |
4449 | wrpr %g0, 0x1, %tl | |
4450 | wrpr %g0, %r12, %tpc | |
4451 | wrpr %g0, %r11, %tnpc | |
4452 | set (0x007f8100 | (28 << 24)), %r13 | |
4453 | and %r12, 0xfff, %r14 | |
4454 | sllx %r14, 30, %r14 | |
4455 | or %r13, %r14, %r20 | |
4456 | wrpr %r20, %g0, %tstate | |
4457 | wrhpr %g0, 0x1e8e, %htstate | |
4458 | ta T_CHANGE_NONHPRIV ! rand=1 (40) | |
4459 | retry | |
4460 | donretarg_40_24: | |
4461 | .word 0xd66fe018 ! 36: LDSTUB_I ldstub %r11, [%r31 + 0x0018] | |
4462 | nop | |
4463 | ta T_CHANGE_HPRIV ! macro | |
4464 | donret_40_25: | |
4465 | rd %pc, %r12 | |
4466 | add %r12, (donretarg_40_25-donret_40_25+4), %r12 | |
4467 | add %r12, 0x4, %r11 ! seq tnpc | |
4468 | wrpr %g0, 0x2, %tl | |
4469 | wrpr %g0, %r12, %tpc | |
4470 | wrpr %g0, %r11, %tnpc | |
4471 | set (0x007faa00 | (0x82 << 24)), %r13 | |
4472 | and %r12, 0xfff, %r14 | |
4473 | sllx %r14, 30, %r14 | |
4474 | or %r13, %r14, %r20 | |
4475 | wrpr %r20, %g0, %tstate | |
4476 | wrhpr %g0, 0xddd, %htstate | |
4477 | ta T_CHANGE_NONHPRIV ! rand=1 (40) | |
4478 | done | |
4479 | donretarg_40_25: | |
4480 | .word 0x26800001 ! 37: BL bl,a <label_0x1> | |
4481 | fpinit_40_26: | |
4482 | nop | |
4483 | setx fp_data_quads, %r19, %r20 | |
4484 | ldd [%r20], %f0 | |
4485 | ldd [%r20+8], %f4 | |
4486 | ld [%r20+16], %fsr | |
4487 | ld [%r20+24], %r19 | |
4488 | wr %r19, %g0, %gsr | |
4489 | .word 0x89a009a4 ! 38: FDIVs fdivs %f0, %f4, %f4 | |
4490 | nop | |
4491 | mov 0x80, %g3 | |
4492 | stxa %g3, [%g3] 0x5f | |
4493 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
4494 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
4495 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
4496 | .word 0xd65fc000 ! 39: LDX_R ldx [%r31 + %r0], %r11 | |
4497 | nop | |
4498 | mov 0x80, %g3 | |
4499 | stxa %g3, [%g3] 0x5f | |
4500 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
4501 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
4502 | .word 0xd65fc000 ! 40: LDX_R ldx [%r31 + %r0], %r11 | |
4503 | mondo_40_27: | |
4504 | nop | |
4505 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4506 | ta T_CHANGE_PRIV | |
4507 | stxa %r10, [%r0+0x3c0] %asi | |
4508 | .word 0x9d91400c ! 41: WRPR_WSTATE_R wrpr %r5, %r12, %wstate | |
4509 | ibp_40_28: | |
4510 | nop | |
4511 | ta T_CHANGE_NONHPRIV | |
4512 | .word 0xd697c028 ! 42: LDUHA_R lduha [%r31, %r8] 0x01, %r11 | |
4513 | fpinit_40_29: | |
4514 | nop | |
4515 | setx fp_data_quads, %r19, %r20 | |
4516 | ldd [%r20], %f0 | |
4517 | ldd [%r20+8], %f4 | |
4518 | ld [%r20+16], %fsr | |
4519 | ld [%r20+24], %r19 | |
4520 | wr %r19, %g0, %gsr | |
4521 | .word 0x8da009a4 ! 43: FDIVs fdivs %f0, %f4, %f6 | |
4522 | nop | |
4523 | ta T_CHANGE_HPRIV | |
4524 | mov 0x40+1, %r10 | |
4525 | set sync_thr_counter5, %r23 | |
4526 | #ifndef SPC | |
4527 | ldxa [%g0]0x63, %o1 | |
4528 | and %o1, 0x38, %o1 | |
4529 | add %o1, %r23, %r23 | |
4530 | sllx %o1, 5, %o3 !(CID*256) | |
4531 | #endif | |
4532 | cas [%r23],%g0,%r10 !lock | |
4533 | brnz %r10, cwq_40_30 | |
4534 | rd %asi, %r12 | |
4535 | wr %g0, 0x40, %asi | |
4536 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
4537 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
4538 | cmp %l1, 1 | |
4539 | bne cwq_40_30 | |
4540 | set CWQ_BASE, %l6 | |
4541 | #ifndef SPC | |
4542 | add %l6, %o3, %l6 | |
4543 | #endif | |
4544 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
4545 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word | |
4546 | sllx %l2, 32, %l2 | |
4547 | stx %l2, [%l6 + 0x0] | |
4548 | membar #Sync | |
4549 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
4550 | sub %l2, 0x40, %l2 | |
4551 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
4552 | wr %r12, %g0, %asi | |
4553 | st %g0, [%r23] | |
4554 | cwq_40_30: | |
4555 | ta T_CHANGE_NONHPRIV | |
4556 | .word 0xa7414000 ! 44: RDPC rd %pc, %r19 | |
4557 | .word 0xe4dfe060 ! 45: LDXA_I ldxa [%r31, + 0x0060] %asi, %r18 | |
4558 | iaw_40_31: | |
4559 | nop | |
4560 | ta T_CHANGE_HPRIV | |
4561 | mov 8, %r18 | |
4562 | rd %asi, %r12 | |
4563 | wr %r0, 0x41, %asi | |
4564 | set sync_thr_counter4, %r23 | |
4565 | #ifndef SPC | |
4566 | ldxa [%g0]0x63, %r8 | |
4567 | and %r8, 0x38, %r8 ! Core ID | |
4568 | add %r8, %r23, %r23 | |
4569 | #else | |
4570 | mov 0, %r8 | |
4571 | #endif | |
4572 | mov 0x40, %r16 | |
4573 | iaw_startwait40_31: | |
4574 | cas [%r23],%g0,%r16 !lock | |
4575 | brz,a %r16, continue_iaw_40_31 | |
4576 | mov (~0x40&0xf0), %r16 | |
4577 | ld [%r23], %r16 | |
4578 | iaw_wait40_31: | |
4579 | brnz %r16, iaw_wait40_31 | |
4580 | ld [%r23], %r16 | |
4581 | ba iaw_startwait40_31 | |
4582 | mov 0x40, %r16 | |
4583 | continue_iaw_40_31: | |
4584 | sllx %r16, %r8, %r16 !Mask for my core only | |
4585 | ldxa [0x58]%asi, %r17 !Running_status | |
4586 | wait_for_stat_40_31: | |
4587 | ldxa [0x50]%asi, %r13 !Running_rw | |
4588 | cmp %r13, %r17 | |
4589 | bne,a %xcc, wait_for_stat_40_31 | |
4590 | ldxa [0x58]%asi, %r17 !Running_status | |
4591 | stxa %r16, [0x68]%asi !Park (W1C) | |
4592 | ldxa [0x50]%asi, %r14 !Running_rw | |
4593 | wait_for_iaw_40_31: | |
4594 | ldxa [0x58]%asi, %r17 !Running_status | |
4595 | cmp %r14, %r17 | |
4596 | bne,a %xcc, wait_for_iaw_40_31 | |
4597 | ldxa [0x50]%asi, %r14 !Running_rw | |
4598 | iaw_doit40_31: | |
4599 | mov 0x38, %r18 | |
4600 | iaw4_40_31: | |
4601 | setx common_target, %r20, %r19 | |
4602 | or %r19, 0x1, %r19 | |
4603 | stxa %r19, [%r18]0x50 | |
4604 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
4605 | st %g0, [%r23] !clear lock | |
4606 | wr %r0, %r12, %asi ! restore %asi | |
4607 | ta T_CHANGE_NONHPRIV | |
4608 | .word 0xa7a4c9b0 ! 46: FDIVs fdivs %f19, %f16, %f19 | |
4609 | ibp_40_32: | |
4610 | nop | |
4611 | .word 0x95a449b2 ! 47: FDIVs fdivs %f17, %f18, %f10 | |
4612 | nop | |
4613 | ta T_CHANGE_HPRIV | |
4614 | mov 0x40, %r10 | |
4615 | set sync_thr_counter6, %r23 | |
4616 | #ifndef SPC | |
4617 | ldxa [%g0]0x63, %o1 | |
4618 | and %o1, 0x38, %o1 | |
4619 | add %o1, %r23, %r23 | |
4620 | #endif | |
4621 | cas [%r23],%g0,%r10 !lock | |
4622 | brnz %r10, sma_40_33 | |
4623 | rd %asi, %r12 | |
4624 | wr %g0, 0x40, %asi | |
4625 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
4626 | set 0x00161fff, %g1 | |
4627 | stxa %g1, [%g0 + 0x80] %asi | |
4628 | wr %r12, %g0, %asi | |
4629 | st %g0, [%r23] | |
4630 | sma_40_33: | |
4631 | ta T_CHANGE_NONHPRIV | |
4632 | .word 0xe5e7e010 ! 48: CASA_R casa [%r31] %asi, %r16, %r18 | |
4633 | change_to_randtl_40_34: | |
4634 | ta T_CHANGE_PRIV ! macro | |
4635 | done_change_to_randtl_40_34: | |
4636 | .word 0x8f902000 ! 49: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
4637 | .word 0xc1bfdb60 ! 50: STDFA_R stda %f0, [%r0, %r31] | |
4638 | pmu_40_35: | |
4639 | nop | |
4640 | setx 0xfffffd3dfffff54e, %g1, %g7 | |
4641 | .word 0xa3800007 ! 51: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
4642 | splash_cmpr_40_36: | |
4643 | mov 0, %r18 | |
4644 | sllx %r18, 63, %r18 | |
4645 | rd %tick, %r17 | |
4646 | add %r17, 0x50, %r17 | |
4647 | or %r17, %r18, %r17 | |
4648 | ta T_CHANGE_HPRIV | |
4649 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
4650 | ta T_CHANGE_PRIV | |
4651 | .word 0xb3800011 ! 52: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
4652 | nop | |
4653 | ta T_CHANGE_HPRIV ! macro | |
4654 | donret_40_37: | |
4655 | rd %pc, %r12 | |
4656 | add %r12, (donretarg_40_37-donret_40_37), %r12 | |
4657 | add %r12, 0x4, %r11 ! seq tnpc | |
4658 | wrpr %g0, 0x2, %tl | |
4659 | wrpr %g0, %r12, %tpc | |
4660 | wrpr %g0, %r11, %tnpc | |
4661 | set (0x00b7da00 | (32 << 24)), %r13 | |
4662 | and %r12, 0xfff, %r14 | |
4663 | sllx %r14, 30, %r14 | |
4664 | or %r13, %r14, %r20 | |
4665 | wrpr %r20, %g0, %tstate | |
4666 | wrhpr %g0, 0xd0d, %htstate | |
4667 | ta T_CHANGE_NONPRIV ! rand=0 (40) | |
4668 | done | |
4669 | donretarg_40_37: | |
4670 | .word 0xe4ffe00c ! 53: SWAPA_I swapa %r18, [%r31 + 0x000c] %asi | |
4671 | .word 0x91508000 ! 54: RDPR_TSTATE <illegal instruction> | |
4672 | brcommon1_40_38: | |
4673 | nop | |
4674 | setx common_target, %r12, %r27 | |
4675 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
4676 | ba,a .+12 | |
4677 | .word 0xc32fe100 ! 1: STXFSR_I st-sfr %f1, [0x0100, %r31] | |
4678 | ba,a .+8 | |
4679 | jmpl %r27+0, %r27 | |
4680 | .word 0x93b187c3 ! 55: PDIST pdistn %d6, %d34, %d40 | |
4681 | trapasi_40_39: | |
4682 | nop | |
4683 | mov 0x18, %r1 ! (VA for ASI 0x4c) | |
4684 | .word 0xd8c84980 ! 56: LDSBA_R ldsba [%r1, %r0] 0x4c, %r12 | |
4685 | nop | |
4686 | ta T_CHANGE_HPRIV | |
4687 | mov 0x40, %r10 | |
4688 | set sync_thr_counter6, %r23 | |
4689 | #ifndef SPC | |
4690 | ldxa [%g0]0x63, %o1 | |
4691 | and %o1, 0x38, %o1 | |
4692 | add %o1, %r23, %r23 | |
4693 | #endif | |
4694 | cas [%r23],%g0,%r10 !lock | |
4695 | brnz %r10, sma_40_40 | |
4696 | rd %asi, %r12 | |
4697 | wr %g0, 0x40, %asi | |
4698 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
4699 | set 0x000a1fff, %g1 | |
4700 | stxa %g1, [%g0 + 0x80] %asi | |
4701 | wr %r12, %g0, %asi | |
4702 | st %g0, [%r23] | |
4703 | sma_40_40: | |
4704 | ta T_CHANGE_NONHPRIV | |
4705 | .word 0xd9e7e009 ! 57: CASA_R casa [%r31] %asi, %r9, %r12 | |
4706 | .word 0xd9e7c020 ! 58: CASA_I casa [%r31] 0x 1, %r0, %r12 | |
4707 | nop | |
4708 | ta T_CHANGE_HPRIV ! macro | |
4709 | donret_40_42: | |
4710 | rd %pc, %r12 | |
4711 | add %r12, (donretarg_40_42-donret_40_42+4), %r12 | |
4712 | add %r12, 0x4, %r11 ! seq tnpc | |
4713 | wrpr %g0, 0x2, %tl | |
4714 | wrpr %g0, %r12, %tpc | |
4715 | wrpr %g0, %r11, %tnpc | |
4716 | set (0x00617200 | (0x88 << 24)), %r13 | |
4717 | and %r12, 0xfff, %r14 | |
4718 | sllx %r14, 30, %r14 | |
4719 | or %r13, %r14, %r20 | |
4720 | wrpr %r20, %g0, %tstate | |
4721 | wrhpr %g0, 0x1d0b, %htstate | |
4722 | ta T_CHANGE_NONHPRIV ! rand=1 (40) | |
4723 | .word 0x26ccc001 ! 1: BRLZ brlz,a,pt %r19,<label_0xcc001> | |
4724 | retry | |
4725 | donretarg_40_42: | |
4726 | .word 0xd86fe192 ! 59: LDSTUB_I ldstub %r12, [%r31 + 0x0192] | |
4727 | .word 0xc3ea802b ! 60: PREFETCHA_R prefetcha [%r10, %r11] 0x01, #one_read | |
4728 | splash_hpstate_40_44: | |
4729 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> | |
4730 | .word 0x81983714 ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x1714, %hpstate | |
4731 | nop | |
4732 | ta T_CHANGE_HPRIV ! macro | |
4733 | donret_40_45: | |
4734 | rd %pc, %r12 | |
4735 | add %r12, (donretarg_40_45-donret_40_45), %r12 | |
4736 | add %r12, 0x4, %r11 ! seq tnpc | |
4737 | wrpr %g0, 0x2, %tl | |
4738 | wrpr %g0, %r12, %tpc | |
4739 | wrpr %g0, %r11, %tnpc | |
4740 | set (0x00528200 | (4 << 24)), %r13 | |
4741 | and %r12, 0xfff, %r14 | |
4742 | sllx %r14, 30, %r14 | |
4743 | or %r13, %r14, %r20 | |
4744 | wrpr %r20, %g0, %tstate | |
4745 | wrhpr %g0, 0x1d9b, %htstate | |
4746 | ta T_CHANGE_NONHPRIV ! rand=1 (40) | |
4747 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4748 | done | |
4749 | donretarg_40_45: | |
4750 | .word 0x25400001 ! 62: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4751 | .word 0xe0c7e160 ! 63: LDSWA_I ldswa [%r31, + 0x0160] %asi, %r16 | |
4752 | trapasi_40_46: | |
4753 | nop | |
4754 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
4755 | .word 0xe0904e60 ! 64: LDUHA_R lduha [%r1, %r0] 0x73, %r16 | |
4756 | jmptr_40_47: | |
4757 | nop | |
4758 | best_set_reg(0xe1200000, %r20, %r27) | |
4759 | .word 0xb7c6c000 ! 65: JMPL_R jmpl %r27 + %r0, %r27 | |
4760 | pmu_40_48: | |
4761 | nop | |
4762 | setx 0xfffff486fffffaf4, %g1, %g7 | |
4763 | .word 0xa3800007 ! 66: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
4764 | ibp_40_49: | |
4765 | nop | |
4766 | .word 0xe09fc02d ! 67: LDDA_R ldda [%r31, %r13] 0x01, %r16 | |
4767 | fpinit_40_50: | |
4768 | nop | |
4769 | setx fp_data_quads, %r19, %r20 | |
4770 | ldd [%r20], %f0 | |
4771 | ldd [%r20+8], %f4 | |
4772 | ld [%r20+16], %fsr | |
4773 | ld [%r20+24], %r19 | |
4774 | wr %r19, %g0, %gsr | |
4775 | .word 0x89b00484 ! 68: FCMPLE32 fcmple32 %d0, %d4, %r4 | |
4776 | splash_tba_40_51: | |
4777 | nop | |
4778 | ta T_CHANGE_PRIV | |
4779 | setx 0x0000000400380000, %r11, %r12 | |
4780 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
4781 | nop | |
4782 | mov 0x80, %g3 | |
4783 | stxa %g3, [%g3] 0x57 | |
4784 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
4785 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
4786 | .word 0xe05fc000 ! 70: LDX_R ldx [%r31 + %r0], %r16 | |
4787 | .word 0xe08008a0 ! 71: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
4788 | iaw_40_52: | |
4789 | nop | |
4790 | ta T_CHANGE_HPRIV | |
4791 | mov 8, %r18 | |
4792 | rd %asi, %r12 | |
4793 | wr %r0, 0x41, %asi | |
4794 | set sync_thr_counter4, %r23 | |
4795 | #ifndef SPC | |
4796 | ldxa [%g0]0x63, %r8 | |
4797 | and %r8, 0x38, %r8 ! Core ID | |
4798 | add %r8, %r23, %r23 | |
4799 | #else | |
4800 | mov 0, %r8 | |
4801 | #endif | |
4802 | mov 0x40, %r16 | |
4803 | iaw_startwait40_52: | |
4804 | cas [%r23],%g0,%r16 !lock | |
4805 | brz,a %r16, continue_iaw_40_52 | |
4806 | mov (~0x40&0xf0), %r16 | |
4807 | ld [%r23], %r16 | |
4808 | iaw_wait40_52: | |
4809 | brnz %r16, iaw_wait40_52 | |
4810 | ld [%r23], %r16 | |
4811 | ba iaw_startwait40_52 | |
4812 | mov 0x40, %r16 | |
4813 | continue_iaw_40_52: | |
4814 | sllx %r16, %r8, %r16 !Mask for my core only | |
4815 | ldxa [0x58]%asi, %r17 !Running_status | |
4816 | wait_for_stat_40_52: | |
4817 | ldxa [0x50]%asi, %r13 !Running_rw | |
4818 | cmp %r13, %r17 | |
4819 | bne,a %xcc, wait_for_stat_40_52 | |
4820 | ldxa [0x58]%asi, %r17 !Running_status | |
4821 | stxa %r16, [0x68]%asi !Park (W1C) | |
4822 | ldxa [0x50]%asi, %r14 !Running_rw | |
4823 | wait_for_iaw_40_52: | |
4824 | ldxa [0x58]%asi, %r17 !Running_status | |
4825 | cmp %r14, %r17 | |
4826 | bne,a %xcc, wait_for_iaw_40_52 | |
4827 | ldxa [0x50]%asi, %r14 !Running_rw | |
4828 | iaw_doit40_52: | |
4829 | mov 0x38, %r18 | |
4830 | iaw2_40_52: | |
4831 | rdpr %tba, %r19 | |
4832 | mov 0x221, %r20 | |
4833 | sllx %r20, 5, %r20 | |
4834 | add %r20, %r19, %r19 | |
4835 | stxa %r19, [%r18]0x50 | |
4836 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
4837 | st %g0, [%r23] !clear lock | |
4838 | wr %r0, %r12, %asi ! restore %asi | |
4839 | ta T_CHANGE_NONHPRIV | |
4840 | .word 0xc3eac031 ! 72: PREFETCHA_R prefetcha [%r11, %r17] 0x01, #one_read | |
4841 | .word 0xd4800aa0 ! 73: LDUWA_R lduwa [%r0, %r0] 0x55, %r10 | |
4842 | fpinit_40_53: | |
4843 | nop | |
4844 | setx fp_data_quads, %r19, %r20 | |
4845 | ldd [%r20], %f0 | |
4846 | ldd [%r20+8], %f4 | |
4847 | ld [%r20+16], %fsr | |
4848 | ld [%r20+24], %r19 | |
4849 | wr %r19, %g0, %gsr | |
4850 | .word 0xc3e838fc ! 74: PREFETCHA_I prefetcha [%r0, + 0xfffff8fc] %asi, #one_read | |
4851 | nop | |
4852 | ta T_CHANGE_HPRIV | |
4853 | mov 0x40+1, %r10 | |
4854 | set sync_thr_counter5, %r23 | |
4855 | #ifndef SPC | |
4856 | ldxa [%g0]0x63, %o1 | |
4857 | and %o1, 0x38, %o1 | |
4858 | add %o1, %r23, %r23 | |
4859 | sllx %o1, 5, %o3 !(CID*256) | |
4860 | #endif | |
4861 | cas [%r23],%g0,%r10 !lock | |
4862 | brnz %r10, cwq_40_54 | |
4863 | rd %asi, %r12 | |
4864 | wr %g0, 0x40, %asi | |
4865 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
4866 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
4867 | cmp %l1, 1 | |
4868 | bne cwq_40_54 | |
4869 | set CWQ_BASE, %l6 | |
4870 | #ifndef SPC | |
4871 | add %l6, %o3, %l6 | |
4872 | #endif | |
4873 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
4874 | best_set_reg(0x20610040, %l1, %l2) !# Control Word | |
4875 | sllx %l2, 32, %l2 | |
4876 | stx %l2, [%l6 + 0x0] | |
4877 | membar #Sync | |
4878 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
4879 | sub %l2, 0x40, %l2 | |
4880 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
4881 | wr %r12, %g0, %asi | |
4882 | st %g0, [%r23] | |
4883 | cwq_40_54: | |
4884 | ta T_CHANGE_NONHPRIV | |
4885 | .word 0x97414000 ! 75: RDPC rd %pc, %r11 | |
4886 | .word 0x91918007 ! 76: WRPR_PIL_R wrpr %r6, %r7, %pil | |
4887 | #if (defined SPC || defined CMP1) | |
4888 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_56) + 8, 16, 16)) -> intp(7,0,22) | |
4889 | #else | |
4890 | setx 0x5580c9a66e2d7519, %r1, %r28 | |
4891 | stxa %r28, [%g0] 0x73 | |
4892 | #endif | |
4893 | intvec_40_56: | |
4894 | .word 0x39400001 ! 77: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4895 | intveclr_40_57: | |
4896 | nop | |
4897 | ta T_CHANGE_HPRIV | |
4898 | setx 0x078e48fe4550a1a4, %r1, %r28 | |
4899 | stxa %r28, [%g0] 0x72 | |
4900 | ta T_CHANGE_NONHPRIV | |
4901 | .word 0x25400001 ! 78: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4902 | .word 0xd6bfe07e ! 79: STDA_I stda %r11, [%r31 + 0x007e] %asi | |
4903 | .word 0xd737c000 ! 80: STQF_R - %f11, [%r0, %r31] | |
4904 | ceter_40_58: | |
4905 | nop | |
4906 | ta T_CHANGE_HPRIV | |
4907 | mov 7, %r17 | |
4908 | sllx %r17, 60, %r17 | |
4909 | mov 0x18, %r16 | |
4910 | stxa %r17, [%r16]0x4c | |
4911 | ta T_CHANGE_NONHPRIV | |
4912 | .word 0x99410000 ! 81: RDTICK rd %tick, %r12 | |
4913 | brcommon3_40_59: | |
4914 | nop | |
4915 | setx common_target, %r12, %r27 | |
4916 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
4917 | ba,a .+12 | |
4918 | .word 0xd66fe060 ! 1: LDSTUB_I ldstub %r11, [%r31 + 0x0060] | |
4919 | ba,a .+8 | |
4920 | jmpl %r27+0, %r27 | |
4921 | .word 0xd6dfc029 ! 82: LDXA_R ldxa [%r31, %r9] 0x01, %r11 | |
4922 | .word 0xd6800b40 ! 83: LDUWA_R lduwa [%r0, %r0] 0x5a, %r11 | |
4923 | jmptr_40_60: | |
4924 | nop | |
4925 | best_set_reg(0xe1200000, %r20, %r27) | |
4926 | .word 0xb7c6c000 ! 84: JMPL_R jmpl %r27 + %r0, %r27 | |
4927 | setx 0x2ed6eccf3309c14d, %r1, %r28 | |
4928 | stxa %r28, [%g0] 0x73 | |
4929 | intvec_40_61: | |
4930 | .word 0x39400001 ! 85: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4931 | nop | |
4932 | ta T_CHANGE_HPRIV | |
4933 | mov 0x40+1, %r10 | |
4934 | set sync_thr_counter5, %r23 | |
4935 | #ifndef SPC | |
4936 | ldxa [%g0]0x63, %o1 | |
4937 | and %o1, 0x38, %o1 | |
4938 | add %o1, %r23, %r23 | |
4939 | sllx %o1, 5, %o3 !(CID*256) | |
4940 | #endif | |
4941 | cas [%r23],%g0,%r10 !lock | |
4942 | brnz %r10, cwq_40_62 | |
4943 | rd %asi, %r12 | |
4944 | wr %g0, 0x40, %asi | |
4945 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
4946 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
4947 | cmp %l1, 1 | |
4948 | bne cwq_40_62 | |
4949 | set CWQ_BASE, %l6 | |
4950 | #ifndef SPC | |
4951 | add %l6, %o3, %l6 | |
4952 | #endif | |
4953 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
4954 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
4955 | sllx %l2, 32, %l2 | |
4956 | stx %l2, [%l6 + 0x0] | |
4957 | membar #Sync | |
4958 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
4959 | sub %l2, 0x40, %l2 | |
4960 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
4961 | wr %r12, %g0, %asi | |
4962 | st %g0, [%r23] | |
4963 | cwq_40_62: | |
4964 | ta T_CHANGE_NONHPRIV | |
4965 | .word 0x91414000 ! 86: RDPC rd %pc, %r8 | |
4966 | .word 0xe2800c00 ! 87: LDUWA_R lduwa [%r0, %r0] 0x60, %r17 | |
4967 | ibp_40_63: | |
4968 | nop | |
4969 | .word 0xe1bfdc00 ! 88: STDFA_R stda %f16, [%r0, %r31] | |
4970 | ibp_40_64: | |
4971 | nop | |
4972 | ta T_CHANGE_NONHPRIV | |
4973 | .word 0xe23fe170 ! 89: STD_I std %r17, [%r31 + 0x0170] | |
4974 | jmptr_40_65: | |
4975 | nop | |
4976 | best_set_reg(0xe1200000, %r20, %r27) | |
4977 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
4978 | .word 0xe22fe14e ! 91: STB_I stb %r17, [%r31 + 0x014e] | |
4979 | .word 0xe19fdb60 ! 92: LDDFA_R ldda [%r31, %r0], %f16 | |
4980 | .word 0x89800011 ! 93: WRTICK_R wr %r0, %r17, %tick | |
4981 | .word 0xe3e7c029 ! 94: CASA_I casa [%r31] 0x 1, %r9, %r17 | |
4982 | setx 0x0ae668796717d539, %r1, %r28 | |
4983 | stxa %r28, [%g0] 0x73 | |
4984 | intvec_40_67: | |
4985 | .word 0x39400001 ! 95: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4986 | nop | |
4987 | mov 0x80, %g3 | |
4988 | stxa %g3, [%g3] 0x5f | |
4989 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
4990 | .word 0xe25fc000 ! 96: LDX_R ldx [%r31 + %r0], %r17 | |
4991 | mondo_40_68: | |
4992 | nop | |
4993 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4994 | ta T_CHANGE_PRIV | |
4995 | stxa %r8, [%r0+0x3c0] %asi | |
4996 | .word 0x9d920010 ! 97: WRPR_WSTATE_R wrpr %r8, %r16, %wstate | |
4997 | fpinit_40_69: | |
4998 | nop | |
4999 | setx fp_data_quads, %r19, %r20 | |
5000 | ldd [%r20], %f0 | |
5001 | ldd [%r20+8], %f4 | |
5002 | ld [%r20+16], %fsr | |
5003 | ld [%r20+24], %r19 | |
5004 | wr %r19, %g0, %gsr | |
5005 | .word 0xc3e838fc ! 98: PREFETCHA_I prefetcha [%r0, + 0xfffff8fc] %asi, #one_read | |
5006 | .word 0xa190200b ! 99: WRPR_GL_I wrpr %r0, 0x000b, %- | |
5007 | mondo_40_70: | |
5008 | nop | |
5009 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5010 | ta T_CHANGE_PRIV | |
5011 | stxa %r6, [%r0+0x3d8] %asi | |
5012 | .word 0x9d950013 ! 100: WRPR_WSTATE_R wrpr %r20, %r19, %wstate | |
5013 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
5014 | reduce_priv_lvl_40_71: | |
5015 | ta T_CHANGE_NONHPRIV ! macro | |
5016 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
5017 | .word 0x8d802000 ! 103: WRFPRS_I wr %r0, 0x0000, %fprs | |
5018 | splash_hpstate_40_73: | |
5019 | ta T_CHANGE_NONHPRIV | |
5020 | .word 0x26cc8001 ! 1: BRLZ brlz,a,pt %r18,<label_0xc8001> | |
5021 | .word 0x81983cd9 ! 104: WRHPR_HPSTATE_I wrhpr %r0, 0x1cd9, %hpstate | |
5022 | splash_hpstate_40_74: | |
5023 | ta T_CHANGE_NONHPRIV | |
5024 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> | |
5025 | .word 0x8198241f ! 105: WRHPR_HPSTATE_I wrhpr %r0, 0x041f, %hpstate | |
5026 | .word 0x91940009 ! 106: WRPR_PIL_R wrpr %r16, %r9, %pil | |
5027 | trapasi_40_76: | |
5028 | nop | |
5029 | mov 0x30, %r1 ! (VA for ASI 0x5a) | |
5030 | .word 0xe2884b40 ! 107: LDUBA_R lduba [%r1, %r0] 0x5a, %r17 | |
5031 | mondo_40_77: | |
5032 | nop | |
5033 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5034 | stxa %r2, [%r0+0x3c0] %asi | |
5035 | .word 0x9d94c011 ! 108: WRPR_WSTATE_R wrpr %r19, %r17, %wstate | |
5036 | dvapa_40_78: | |
5037 | nop | |
5038 | ta T_CHANGE_HPRIV | |
5039 | mov 0xbcd, %r20 | |
5040 | mov 0x7, %r19 | |
5041 | sllx %r20, 23, %r20 | |
5042 | or %r19, %r20, %r19 | |
5043 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
5044 | mov 0x38, %r18 | |
5045 | stxa %r31, [%r18]0x58 | |
5046 | ta T_CHANGE_NONHPRIV | |
5047 | .word 0x87ac0a50 ! 109: FCMPd fcmpd %fcc<n>, %f16, %f16 | |
5048 | .word 0xe727c000 ! 110: STF_R st %f19, [%r0, %r31] | |
5049 | ibp_40_79: | |
5050 | nop | |
5051 | ta T_CHANGE_NONHPRIV | |
5052 | .word 0xe6bfc031 ! 111: STDA_R stda %r19, [%r31 + %r17] 0x01 | |
5053 | splash_lsu_40_80: | |
5054 | nop | |
5055 | ta T_CHANGE_HPRIV | |
5056 | set 0xbf75df30, %r2 | |
5057 | mov 0x4, %r1 | |
5058 | sllx %r1, 32, %r1 | |
5059 | or %r1, %r2, %r2 | |
5060 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5061 | .word 0x3d400001 ! 112: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5062 | jmptr_40_81: | |
5063 | nop | |
5064 | best_set_reg(0xe1200000, %r20, %r27) | |
5065 | .word 0xb7c6c000 ! 113: JMPL_R jmpl %r27 + %r0, %r27 | |
5066 | intveclr_40_82: | |
5067 | nop | |
5068 | ta T_CHANGE_HPRIV | |
5069 | setx 0x129af77259145d8c, %r1, %r28 | |
5070 | stxa %r28, [%g0] 0x72 | |
5071 | ta T_CHANGE_NONHPRIV | |
5072 | .word 0x25400001 ! 114: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5073 | intveclr_40_83: | |
5074 | nop | |
5075 | ta T_CHANGE_HPRIV | |
5076 | setx 0x8779259e69d4e36b, %r1, %r28 | |
5077 | stxa %r28, [%g0] 0x72 | |
5078 | .word 0x25400001 ! 115: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5079 | .word 0xa1902008 ! 116: WRPR_GL_I wrpr %r0, 0x0008, %- | |
5080 | nop | |
5081 | ta T_CHANGE_HPRIV | |
5082 | mov 0x40+1, %r10 | |
5083 | set sync_thr_counter5, %r23 | |
5084 | #ifndef SPC | |
5085 | ldxa [%g0]0x63, %o1 | |
5086 | and %o1, 0x38, %o1 | |
5087 | add %o1, %r23, %r23 | |
5088 | sllx %o1, 5, %o3 !(CID*256) | |
5089 | #endif | |
5090 | cas [%r23],%g0,%r10 !lock | |
5091 | brnz %r10, cwq_40_84 | |
5092 | rd %asi, %r12 | |
5093 | wr %g0, 0x40, %asi | |
5094 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5095 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5096 | cmp %l1, 1 | |
5097 | bne cwq_40_84 | |
5098 | set CWQ_BASE, %l6 | |
5099 | #ifndef SPC | |
5100 | add %l6, %o3, %l6 | |
5101 | #endif | |
5102 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5103 | best_set_reg(0x20610040, %l1, %l2) !# Control Word | |
5104 | sllx %l2, 32, %l2 | |
5105 | stx %l2, [%l6 + 0x0] | |
5106 | membar #Sync | |
5107 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5108 | sub %l2, 0x40, %l2 | |
5109 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5110 | wr %r12, %g0, %asi | |
5111 | st %g0, [%r23] | |
5112 | cwq_40_84: | |
5113 | ta T_CHANGE_NONHPRIV | |
5114 | .word 0x99414000 ! 117: RDPC rd %pc, %r12 | |
5115 | fpinit_40_85: | |
5116 | nop | |
5117 | setx fp_data_quads, %r19, %r20 | |
5118 | ldd [%r20], %f0 | |
5119 | ldd [%r20+8], %f4 | |
5120 | ld [%r20+16], %fsr | |
5121 | ld [%r20+24], %r19 | |
5122 | wr %r19, %g0, %gsr | |
5123 | .word 0x87a80a44 ! 118: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
5124 | ibp_40_86: | |
5125 | nop | |
5126 | .word 0xd31fc012 ! 119: LDDF_R ldd [%r31, %r18], %f9 | |
5127 | setx 0x189aec28c6ebad25, %r1, %r28 | |
5128 | stxa %r28, [%g0] 0x73 | |
5129 | intvec_40_87: | |
5130 | .word 0x39400001 ! 120: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5131 | #if (defined SPC || defined CMP1) | |
5132 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_88) + 56, 16, 16)) -> intp(6,0,16) | |
5133 | #else | |
5134 | setx 0xd9e61c95a2f03103, %r1, %r28 | |
5135 | stxa %r28, [%g0] 0x73 | |
5136 | #endif | |
5137 | intvec_40_88: | |
5138 | .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5139 | .word 0x89800011 ! 122: WRTICK_R wr %r0, %r17, %tick | |
5140 | .word 0x9bb404d4 ! 123: FCMPNE32 fcmpne32 %d16, %d20, %r13 | |
5141 | mondo_40_91: | |
5142 | nop | |
5143 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5144 | stxa %r2, [%r0+0x3e8] %asi | |
5145 | .word 0x9d930005 ! 124: WRPR_WSTATE_R wrpr %r12, %r5, %wstate | |
5146 | .word 0x8d802000 ! 125: WRFPRS_I wr %r0, 0x0000, %fprs | |
5147 | ibp_40_92: | |
5148 | nop | |
5149 | ta T_CHANGE_NONHPRIV | |
5150 | .word 0xa3b40494 ! 126: FCMPLE32 fcmple32 %d16, %d20, %r17 | |
5151 | .word 0x8d802004 ! 127: WRFPRS_I wr %r0, 0x0004, %fprs | |
5152 | .word 0x8d802000 ! 128: WRFPRS_I wr %r0, 0x0000, %fprs | |
5153 | .word 0xa5a149b3 ! 129: FDIVs fdivs %f5, %f19, %f18 | |
5154 | invalw | |
5155 | mov 0xb2, %r30 | |
5156 | .word 0x91d0001e ! 130: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
5157 | fpinit_40_94: | |
5158 | nop | |
5159 | setx fp_data_quads, %r19, %r20 | |
5160 | ldd [%r20], %f0 | |
5161 | ldd [%r20+8], %f4 | |
5162 | ld [%r20+16], %fsr | |
5163 | ld [%r20+24], %r19 | |
5164 | wr %r19, %g0, %gsr | |
5165 | .word 0x91b00484 ! 131: FCMPLE32 fcmple32 %d0, %d4, %r8 | |
5166 | intveclr_40_95: | |
5167 | nop | |
5168 | ta T_CHANGE_HPRIV | |
5169 | setx 0xec466caa0462415f, %r1, %r28 | |
5170 | stxa %r28, [%g0] 0x72 | |
5171 | ta T_CHANGE_NONHPRIV | |
5172 | .word 0x25400001 ! 132: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5173 | intveclr_40_96: | |
5174 | nop | |
5175 | ta T_CHANGE_HPRIV | |
5176 | setx 0x01426cd7764a228f, %r1, %r28 | |
5177 | stxa %r28, [%g0] 0x72 | |
5178 | .word 0x25400001 ! 133: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5179 | setx 0x3a700460d1da9f09, %r1, %r28 | |
5180 | stxa %r28, [%g0] 0x73 | |
5181 | intvec_40_97: | |
5182 | .word 0x39400001 ! 134: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5183 | .word 0x9194c012 ! 135: WRPR_PIL_R wrpr %r19, %r18, %pil | |
5184 | .word 0xa1a00174 ! 136: FABSq dis not found | |
5185 | ||
5186 | mondo_40_100: | |
5187 | nop | |
5188 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5189 | ta T_CHANGE_PRIV | |
5190 | stxa %r2, [%r0+0x3d8] %asi | |
5191 | .word 0x9d924010 ! 137: WRPR_WSTATE_R wrpr %r9, %r16, %wstate | |
5192 | splash_cmpr_40_101: | |
5193 | mov 0, %r18 | |
5194 | sllx %r18, 63, %r18 | |
5195 | rd %tick, %r17 | |
5196 | add %r17, 0x100, %r17 | |
5197 | or %r17, %r18, %r17 | |
5198 | ta T_CHANGE_PRIV | |
5199 | .word 0xb3800011 ! 138: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
5200 | .word 0xc32fc000 ! 139: STXFSR_R st-sfr %f1, [%r0, %r31] | |
5201 | intveclr_40_103: | |
5202 | nop | |
5203 | ta T_CHANGE_HPRIV | |
5204 | setx 0x1e68394873cf2534, %r1, %r28 | |
5205 | stxa %r28, [%g0] 0x72 | |
5206 | .word 0x25400001 ! 140: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5207 | .word 0xa782e08f ! 141: WR_GRAPHICS_STATUS_REG_I wr %r11, 0x008f, %- | |
5208 | .word 0x83d020b4 ! 142: Tcc_I te icc_or_xcc, %r0 + 180 | |
5209 | .word 0xa7a00171 ! 143: FABSq dis not found | |
5210 | ||
5211 | splash_cmpr_40_105: | |
5212 | mov 1, %r18 | |
5213 | sllx %r18, 63, %r18 | |
5214 | rd %tick, %r17 | |
5215 | add %r17, 0x80, %r17 | |
5216 | or %r17, %r18, %r17 | |
5217 | .word 0xaf800011 ! 144: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
5218 | cwp_40_106: | |
5219 | set user_data_start, %o7 | |
5220 | .word 0x93902000 ! 145: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
5221 | mondo_40_107: | |
5222 | nop | |
5223 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5224 | ta T_CHANGE_PRIV | |
5225 | stxa %r10, [%r0+0x3e0] %asi | |
5226 | .word 0x9d950011 ! 146: WRPR_WSTATE_R wrpr %r20, %r17, %wstate | |
5227 | brcommon3_40_108: | |
5228 | nop | |
5229 | setx common_target, %r12, %r27 | |
5230 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
5231 | ba,a .+12 | |
5232 | .word 0xe86fe130 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0130] | |
5233 | ba,a .+8 | |
5234 | jmpl %r27+0, %r27 | |
5235 | .word 0xe83fe040 ! 147: STD_I std %r20, [%r31 + 0x0040] | |
5236 | ibp_40_109: | |
5237 | nop | |
5238 | .word 0xc3ec802d ! 148: PREFETCHA_R prefetcha [%r18, %r13] 0x01, #one_read | |
5239 | trapasi_40_110: | |
5240 | nop | |
5241 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
5242 | .word 0xd4c04a00 ! 149: LDSWA_R ldswa [%r1, %r0] 0x50, %r10 | |
5243 | setx 0xb1c4310a51440d6f, %r1, %r28 | |
5244 | stxa %r28, [%g0] 0x73 | |
5245 | intvec_40_111: | |
5246 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5247 | splash_cmpr_40_112: | |
5248 | mov 0, %r18 | |
5249 | sllx %r18, 63, %r18 | |
5250 | rd %tick, %r17 | |
5251 | add %r17, 0x50, %r17 | |
5252 | or %r17, %r18, %r17 | |
5253 | ta T_CHANGE_PRIV | |
5254 | .word 0xaf800011 ! 151: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
5255 | splash_lsu_40_113: | |
5256 | nop | |
5257 | ta T_CHANGE_HPRIV | |
5258 | set 0x99c6f028, %r2 | |
5259 | mov 0x3, %r1 | |
5260 | sllx %r1, 32, %r1 | |
5261 | or %r1, %r2, %r2 | |
5262 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5263 | .word 0x3d400001 ! 152: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5264 | .word 0x81510000 ! 153: RDPR_TICK rdpr %tick, %r0 | |
5265 | splash_lsu_40_114: | |
5266 | nop | |
5267 | ta T_CHANGE_HPRIV | |
5268 | set 0x970eee2c, %r2 | |
5269 | mov 0x6, %r1 | |
5270 | sllx %r1, 32, %r1 | |
5271 | or %r1, %r2, %r2 | |
5272 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5273 | .word 0x3d400001 ! 154: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5274 | pmu_40_115: | |
5275 | nop | |
5276 | setx 0xfffff8abfffff176, %g1, %g7 | |
5277 | .word 0xa3800007 ! 155: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
5278 | #if (defined SPC || defined CMP1) | |
5279 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_116) + 8, 16, 16)) -> intp(4,0,0) | |
5280 | #else | |
5281 | setx 0x81cf3dbc13be8fea, %r1, %r28 | |
5282 | stxa %r28, [%g0] 0x73 | |
5283 | #endif | |
5284 | intvec_40_116: | |
5285 | .word 0x39400001 ! 156: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5286 | .word 0xa984000a ! 157: WR_SET_SOFTINT_R wr %r16, %r10, %set_softint | |
5287 | iaw_40_117: | |
5288 | nop | |
5289 | ta T_CHANGE_HPRIV | |
5290 | mov 8, %r18 | |
5291 | rd %asi, %r12 | |
5292 | wr %r0, 0x41, %asi | |
5293 | set sync_thr_counter4, %r23 | |
5294 | #ifndef SPC | |
5295 | ldxa [%g0]0x63, %r8 | |
5296 | and %r8, 0x38, %r8 ! Core ID | |
5297 | add %r8, %r23, %r23 | |
5298 | #else | |
5299 | mov 0, %r8 | |
5300 | #endif | |
5301 | mov 0x40, %r16 | |
5302 | iaw_startwait40_117: | |
5303 | cas [%r23],%g0,%r16 !lock | |
5304 | brz,a %r16, continue_iaw_40_117 | |
5305 | mov (~0x40&0xf0), %r16 | |
5306 | ld [%r23], %r16 | |
5307 | iaw_wait40_117: | |
5308 | brnz %r16, iaw_wait40_117 | |
5309 | ld [%r23], %r16 | |
5310 | ba iaw_startwait40_117 | |
5311 | mov 0x40, %r16 | |
5312 | continue_iaw_40_117: | |
5313 | sllx %r16, %r8, %r16 !Mask for my core only | |
5314 | ldxa [0x58]%asi, %r17 !Running_status | |
5315 | wait_for_stat_40_117: | |
5316 | ldxa [0x50]%asi, %r13 !Running_rw | |
5317 | cmp %r13, %r17 | |
5318 | bne,a %xcc, wait_for_stat_40_117 | |
5319 | ldxa [0x58]%asi, %r17 !Running_status | |
5320 | stxa %r16, [0x68]%asi !Park (W1C) | |
5321 | ldxa [0x50]%asi, %r14 !Running_rw | |
5322 | wait_for_iaw_40_117: | |
5323 | ldxa [0x58]%asi, %r17 !Running_status | |
5324 | cmp %r14, %r17 | |
5325 | bne,a %xcc, wait_for_iaw_40_117 | |
5326 | ldxa [0x50]%asi, %r14 !Running_rw | |
5327 | iaw_doit40_117: | |
5328 | mov 0x38, %r18 | |
5329 | iaw3_40_117: | |
5330 | setx vahole_target1, %r20, %r19 | |
5331 | or %r19, 0x1, %r19 | |
5332 | stxa %r19, [%r18]0x50 | |
5333 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
5334 | st %g0, [%r23] !clear lock | |
5335 | wr %r0, %r12, %asi ! restore %asi | |
5336 | ta T_CHANGE_NONHPRIV | |
5337 | .word 0x9bb40484 ! 158: FCMPLE32 fcmple32 %d16, %d4, %r13 | |
5338 | .word 0x91b0c583 ! 159: FCMPGT32 fcmpgt32 %d34, %d34, %r8 | |
5339 | ta T_CHANGE_NONHPRIV | |
5340 | .word 0x8143e011 ! 160: MEMBAR membar #LoadLoad | #Lookaside | |
5341 | splash_hpstate_40_119: | |
5342 | ta T_CHANGE_NONHPRIV | |
5343 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> | |
5344 | .word 0x81983f4c ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1f4c, %hpstate | |
5345 | .word 0x8d902cef ! 162: WRPR_PSTATE_I wrpr %r0, 0x0cef, %pstate | |
5346 | otherw | |
5347 | mov 0xb0, %r30 | |
5348 | .word 0x91d0001e ! 163: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
5349 | .word 0xe19fdf20 ! 164: LDDFA_R ldda [%r31, %r0], %f16 | |
5350 | setx 0x804dafbdb802c7f5, %r1, %r28 | |
5351 | stxa %r28, [%g0] 0x73 | |
5352 | intvec_40_121: | |
5353 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5354 | ibp_40_122: | |
5355 | nop | |
5356 | .word 0xe1bfe040 ! 166: STDFA_I stda %f16, [0x0040, %r31] | |
5357 | splash_lsu_40_123: | |
5358 | nop | |
5359 | ta T_CHANGE_HPRIV | |
5360 | set 0x98c5ffdd, %r2 | |
5361 | mov 0x3, %r1 | |
5362 | sllx %r1, 32, %r1 | |
5363 | or %r1, %r2, %r2 | |
5364 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5365 | ta T_CHANGE_NONHPRIV | |
5366 | .word 0x3d400001 ! 167: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5367 | nop | |
5368 | mov 0x80, %g3 | |
5369 | stxa %g3, [%g3] 0x5f | |
5370 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
5371 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
5372 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
5373 | .word 0xd05fc000 ! 168: LDX_R ldx [%r31 + %r0], %r8 | |
5374 | jmptr_40_124: | |
5375 | nop | |
5376 | best_set_reg(0xe1200000, %r20, %r27) | |
5377 | .word 0xb7c6c000 ! 169: JMPL_R jmpl %r27 + %r0, %r27 | |
5378 | nop | |
5379 | ta T_CHANGE_HPRIV ! macro | |
5380 | donret_40_125: | |
5381 | rd %pc, %r12 | |
5382 | add %r12, (donretarg_40_125-donret_40_125), %r12 | |
5383 | add %r12, 0x8, %r11 ! nonseq tnpc | |
5384 | wrpr %g0, 0x2, %tl | |
5385 | wrpr %g0, %r12, %tpc | |
5386 | wrpr %g0, %r11, %tnpc | |
5387 | set (0x00094700 | (0x55 << 24)), %r13 | |
5388 | and %r12, 0xfff, %r14 | |
5389 | sllx %r14, 30, %r14 | |
5390 | or %r13, %r14, %r20 | |
5391 | wrpr %r20, %g0, %tstate | |
5392 | wrhpr %g0, 0x16df, %htstate | |
5393 | ta T_CHANGE_NONHPRIV ! rand=1 (40) | |
5394 | .word 0x26cac001 ! 1: BRLZ brlz,a,pt %r11,<label_0xac001> | |
5395 | done | |
5396 | donretarg_40_125: | |
5397 | .word 0x2b400001 ! 170: FBPUG fbug,a,pn %fcc0, <label_0x1> | |
5398 | iaw_40_126: | |
5399 | nop | |
5400 | ta T_CHANGE_HPRIV | |
5401 | mov 8, %r18 | |
5402 | rd %asi, %r12 | |
5403 | wr %r0, 0x41, %asi | |
5404 | set sync_thr_counter4, %r23 | |
5405 | #ifndef SPC | |
5406 | ldxa [%g0]0x63, %r8 | |
5407 | and %r8, 0x38, %r8 ! Core ID | |
5408 | add %r8, %r23, %r23 | |
5409 | #else | |
5410 | mov 0, %r8 | |
5411 | #endif | |
5412 | mov 0x40, %r16 | |
5413 | iaw_startwait40_126: | |
5414 | cas [%r23],%g0,%r16 !lock | |
5415 | brz,a %r16, continue_iaw_40_126 | |
5416 | mov (~0x40&0xf0), %r16 | |
5417 | ld [%r23], %r16 | |
5418 | iaw_wait40_126: | |
5419 | brnz %r16, iaw_wait40_126 | |
5420 | ld [%r23], %r16 | |
5421 | ba iaw_startwait40_126 | |
5422 | mov 0x40, %r16 | |
5423 | continue_iaw_40_126: | |
5424 | sllx %r16, %r8, %r16 !Mask for my core only | |
5425 | ldxa [0x58]%asi, %r17 !Running_status | |
5426 | wait_for_stat_40_126: | |
5427 | ldxa [0x50]%asi, %r13 !Running_rw | |
5428 | cmp %r13, %r17 | |
5429 | bne,a %xcc, wait_for_stat_40_126 | |
5430 | ldxa [0x58]%asi, %r17 !Running_status | |
5431 | stxa %r16, [0x68]%asi !Park (W1C) | |
5432 | ldxa [0x50]%asi, %r14 !Running_rw | |
5433 | wait_for_iaw_40_126: | |
5434 | ldxa [0x58]%asi, %r17 !Running_status | |
5435 | cmp %r14, %r17 | |
5436 | bne,a %xcc, wait_for_iaw_40_126 | |
5437 | ldxa [0x50]%asi, %r14 !Running_rw | |
5438 | iaw_doit40_126: | |
5439 | mov 0x38, %r18 | |
5440 | iaw4_40_126: | |
5441 | setx common_target, %r20, %r19 | |
5442 | or %r19, 0x1, %r19 | |
5443 | stxa %r19, [%r18]0x50 | |
5444 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
5445 | st %g0, [%r23] !clear lock | |
5446 | wr %r0, %r12, %asi ! restore %asi | |
5447 | ta T_CHANGE_NONHPRIV | |
5448 | .word 0xe19fe1e0 ! 171: LDDFA_I ldda [%r31, 0x01e0], %f16 | |
5449 | trapasi_40_127: | |
5450 | nop | |
5451 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
5452 | .word 0xd0884e60 ! 172: LDUBA_R lduba [%r1, %r0] 0x73, %r8 | |
5453 | .word 0x89800011 ! 173: WRTICK_R wr %r0, %r17, %tick | |
5454 | fpinit_40_129: | |
5455 | nop | |
5456 | setx fp_data_quads, %r19, %r20 | |
5457 | ldd [%r20], %f0 | |
5458 | ldd [%r20+8], %f4 | |
5459 | ld [%r20+16], %fsr | |
5460 | ld [%r20+24], %r19 | |
5461 | wr %r19, %g0, %gsr | |
5462 | .word 0x89a009c4 ! 174: FDIVd fdivd %f0, %f4, %f4 | |
5463 | .word 0x89800011 ! 175: WRTICK_R wr %r0, %r17, %tick | |
5464 | .word 0xd127e079 ! 176: STF_I st %f8, [0x0079, %r31] | |
5465 | .word 0x89800011 ! 177: WRTICK_R wr %r0, %r17, %tick | |
5466 | .word 0xd077e0c8 ! 178: STX_I stx %r8, [%r31 + 0x00c8] | |
5467 | #if (defined SPC || defined CMP1) | |
5468 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_132) + 32, 16, 16)) -> intp(3,0,4) | |
5469 | #else | |
5470 | setx 0x1084dbd5eb6f9289, %r1, %r28 | |
5471 | stxa %r28, [%g0] 0x73 | |
5472 | #endif | |
5473 | intvec_40_132: | |
5474 | .word 0x39400001 ! 179: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5475 | .word 0x87802055 ! 180: WRASI_I wr %r0, 0x0055, %asi | |
5476 | setx 0x4558910f9a108296, %r1, %r28 | |
5477 | stxa %r28, [%g0] 0x73 | |
5478 | intvec_40_133: | |
5479 | .word 0x39400001 ! 181: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5480 | .word 0xd037e1dd ! 182: STH_I sth %r8, [%r31 + 0x01dd] | |
5481 | iaw_40_134: | |
5482 | nop | |
5483 | ta T_CHANGE_HPRIV | |
5484 | mov 8, %r18 | |
5485 | rd %asi, %r12 | |
5486 | wr %r0, 0x41, %asi | |
5487 | set sync_thr_counter4, %r23 | |
5488 | #ifndef SPC | |
5489 | ldxa [%g0]0x63, %r8 | |
5490 | and %r8, 0x38, %r8 ! Core ID | |
5491 | add %r8, %r23, %r23 | |
5492 | #else | |
5493 | mov 0, %r8 | |
5494 | #endif | |
5495 | mov 0x40, %r16 | |
5496 | iaw_startwait40_134: | |
5497 | cas [%r23],%g0,%r16 !lock | |
5498 | brz,a %r16, continue_iaw_40_134 | |
5499 | mov (~0x40&0xf0), %r16 | |
5500 | ld [%r23], %r16 | |
5501 | iaw_wait40_134: | |
5502 | brnz %r16, iaw_wait40_134 | |
5503 | ld [%r23], %r16 | |
5504 | ba iaw_startwait40_134 | |
5505 | mov 0x40, %r16 | |
5506 | continue_iaw_40_134: | |
5507 | sllx %r16, %r8, %r16 !Mask for my core only | |
5508 | ldxa [0x58]%asi, %r17 !Running_status | |
5509 | wait_for_stat_40_134: | |
5510 | ldxa [0x50]%asi, %r13 !Running_rw | |
5511 | cmp %r13, %r17 | |
5512 | bne,a %xcc, wait_for_stat_40_134 | |
5513 | ldxa [0x58]%asi, %r17 !Running_status | |
5514 | stxa %r16, [0x68]%asi !Park (W1C) | |
5515 | ldxa [0x50]%asi, %r14 !Running_rw | |
5516 | wait_for_iaw_40_134: | |
5517 | ldxa [0x58]%asi, %r17 !Running_status | |
5518 | cmp %r14, %r17 | |
5519 | bne,a %xcc, wait_for_iaw_40_134 | |
5520 | ldxa [0x50]%asi, %r14 !Running_rw | |
5521 | iaw_doit40_134: | |
5522 | mov 0x38, %r18 | |
5523 | iaw4_40_134: | |
5524 | setx common_target, %r20, %r19 | |
5525 | or %r19, 0x1, %r19 | |
5526 | stxa %r19, [%r18]0x50 | |
5527 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
5528 | st %g0, [%r23] !clear lock | |
5529 | wr %r0, %r12, %asi ! restore %asi | |
5530 | ta T_CHANGE_NONHPRIV | |
5531 | .word 0xc32fc011 ! 183: STXFSR_R st-sfr %f1, [%r17, %r31] | |
5532 | br_badelay2_40_135: | |
5533 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
5534 | allclean | |
5535 | .word 0x95b4c30c ! 184: ALIGNADDRESS alignaddr %r19, %r12, %r10 | |
5536 | splash_tba_40_136: | |
5537 | nop | |
5538 | ta T_CHANGE_PRIV | |
5539 | set 0x120000, %r12 | |
5540 | .word 0x8b90000c ! 185: WRPR_TBA_R wrpr %r0, %r12, %tba | |
5541 | trapasi_40_137: | |
5542 | nop | |
5543 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
5544 | .word 0xe2d04a00 ! 186: LDSHA_R ldsha [%r1, %r0] 0x50, %r17 | |
5545 | ceter_40_138: | |
5546 | nop | |
5547 | ta T_CHANGE_HPRIV | |
5548 | mov 7, %r17 | |
5549 | sllx %r17, 60, %r17 | |
5550 | mov 0x18, %r16 | |
5551 | stxa %r17, [%r16]0x4c | |
5552 | ta T_CHANGE_NONHPRIV | |
5553 | .word 0x93410000 ! 187: RDTICK rd %tick, %r9 | |
5554 | intveclr_40_139: | |
5555 | nop | |
5556 | ta T_CHANGE_HPRIV | |
5557 | setx 0x7ce2610323e7410f, %r1, %r28 | |
5558 | stxa %r28, [%g0] 0x72 | |
5559 | .word 0x25400001 ! 188: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5560 | brcommon2_40_140: | |
5561 | nop | |
5562 | setx common_target, %r12, %r27 | |
5563 | ba,a .+12 | |
5564 | .word 0xc36fe000 ! 1: PREFETCH_I prefetch [%r31 + 0x0000], #one_read | |
5565 | ba,a .+8 | |
5566 | jmpl %r27+0, %r27 | |
5567 | .word 0xc1bfda00 ! 189: STDFA_R stda %f0, [%r0, %r31] | |
5568 | trapasi_40_141: | |
5569 | nop | |
5570 | mov 0x28, %r1 ! (VA for ASI 0x5a) | |
5571 | .word 0xe6c84b40 ! 190: LDSBA_R ldsba [%r1, %r0] 0x5a, %r19 | |
5572 | ibp_40_142: | |
5573 | nop | |
5574 | .word 0xa1b4c7c9 ! 191: PDIST pdistn %d50, %d40, %d16 | |
5575 | .word 0xd737e080 ! 192: STQF_I - %f11, [0x0080, %r31] | |
5576 | splash_cmpr_40_143: | |
5577 | mov 0, %r18 | |
5578 | sllx %r18, 63, %r18 | |
5579 | rd %tick, %r17 | |
5580 | add %r17, 0x100, %r17 | |
5581 | or %r17, %r18, %r17 | |
5582 | ta T_CHANGE_HPRIV | |
5583 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
5584 | .word 0xb3800011 ! 193: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
5585 | tagged_40_144: | |
5586 | tsubcctv %r9, 0x115b, %r16 | |
5587 | .word 0xd607e0a0 ! 194: LDUW_I lduw [%r31 + 0x00a0], %r11 | |
5588 | .word 0x98a84011 ! 195: ANDNcc_R andncc %r1, %r17, %r12 | |
5589 | .word 0xd4bfc020 ! 196: STDA_R stda %r10, [%r31 + %r0] 0x01 | |
5590 | intveclr_40_145: | |
5591 | nop | |
5592 | ta T_CHANGE_HPRIV | |
5593 | setx 0x2b96e476bc98957a, %r1, %r28 | |
5594 | stxa %r28, [%g0] 0x72 | |
5595 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5596 | dvapa_40_146: | |
5597 | nop | |
5598 | ta T_CHANGE_HPRIV | |
5599 | mov 0xc89, %r20 | |
5600 | mov 0x12, %r19 | |
5601 | sllx %r20, 23, %r20 | |
5602 | or %r19, %r20, %r19 | |
5603 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
5604 | mov 0x38, %r18 | |
5605 | stxa %r31, [%r18]0x58 | |
5606 | ta T_CHANGE_NONHPRIV | |
5607 | .word 0x95b307d2 ! 198: PDIST pdistn %d12, %d18, %d10 | |
5608 | ibp_40_147: | |
5609 | nop | |
5610 | ta T_CHANGE_NONHPRIV | |
5611 | .word 0xd93fc00c ! 199: STDF_R std %f12, [%r12, %r31] | |
5612 | .word 0x89800011 ! 200: WRTICK_R wr %r0, %r17, %tick | |
5613 | jmptr_40_149: | |
5614 | nop | |
5615 | best_set_reg(0xe1200000, %r20, %r27) | |
5616 | .word 0xb7c6c000 ! 201: JMPL_R jmpl %r27 + %r0, %r27 | |
5617 | nop | |
5618 | nop | |
5619 | ta T_CHANGE_PRIV | |
5620 | wrpr %g0, %g0, %gl | |
5621 | nop | |
5622 | nop | |
5623 | setx join_lbl_0_0, %g1, %g2 | |
5624 | jmp %g2 | |
5625 | nop | |
5626 | fork_lbl_0_6: | |
5627 | ta T_CHANGE_NONHPRIV | |
5628 | splash_lsu_20_0: | |
5629 | nop | |
5630 | ta T_CHANGE_HPRIV | |
5631 | set 0x55bf3c27, %r2 | |
5632 | mov 0x7, %r1 | |
5633 | sllx %r1, 32, %r1 | |
5634 | or %r1, %r2, %r2 | |
5635 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5636 | ta T_CHANGE_NONHPRIV | |
5637 | ibp_20_1: | |
5638 | nop | |
5639 | ta T_CHANGE_NONHPRIV | |
5640 | .word 0xc19fd960 ! 1: LDDFA_R ldda [%r31, %r0], %f0 | |
5641 | splash_lsu_20_2: | |
5642 | nop | |
5643 | ta T_CHANGE_HPRIV | |
5644 | set 0x07a854a2, %r2 | |
5645 | mov 0x5, %r1 | |
5646 | sllx %r1, 32, %r1 | |
5647 | or %r1, %r2, %r2 | |
5648 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5649 | ta T_CHANGE_NONHPRIV | |
5650 | .word 0x3d400001 ! 2: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5651 | splash_lsu_20_3: | |
5652 | nop | |
5653 | ta T_CHANGE_HPRIV | |
5654 | set 0xf98c1f36, %r2 | |
5655 | mov 0x4, %r1 | |
5656 | sllx %r1, 32, %r1 | |
5657 | or %r1, %r2, %r2 | |
5658 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5659 | .word 0x3d400001 ! 3: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5660 | .word 0xe277e108 ! 4: STX_I stx %r17, [%r31 + 0x0108] | |
5661 | .word 0x30780001 ! 5: BPA <illegal instruction> | |
5662 | .word 0x91d02035 ! 6: Tcc_I ta icc_or_xcc, %r0 + 53 | |
5663 | .word 0x89800011 ! 7: WRTICK_R wr %r0, %r17, %tick | |
5664 | splash_htba_20_5: | |
5665 | nop | |
5666 | ta T_CHANGE_HPRIV | |
5667 | setx 0x00000002002a0000, %r11, %r12 | |
5668 | .word 0x8b98000c ! 8: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
5669 | .word 0xe28008a0 ! 9: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
5670 | bpos,a skip_20_6 | |
5671 | .word 0x87acca52 ! 1: FCMPd fcmpd %fcc<n>, %f50, %f18 | |
5672 | .align 512 | |
5673 | skip_20_6: | |
5674 | .word 0xc30fc000 ! 10: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
5675 | splash_hpstate_20_7: | |
5676 | ta T_CHANGE_NONHPRIV | |
5677 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> | |
5678 | .word 0x8198271e ! 11: WRHPR_HPSTATE_I wrhpr %r0, 0x071e, %hpstate | |
5679 | unsupttte_20_8: | |
5680 | nop | |
5681 | ta T_CHANGE_HPRIV | |
5682 | mov 1, %r20 | |
5683 | sllx %r20, 63, %r20 | |
5684 | or %r20, 2,%r20 | |
5685 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
5686 | ta T_CHANGE_NONHPRIV | |
5687 | .word 0x95b1048a ! 12: FCMPLE32 fcmple32 %d4, %d10, %r10 | |
5688 | .word 0xd4800ba0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x5d, %r10 | |
5689 | setx 0x6fbcced8510a02da, %r1, %r28 | |
5690 | stxa %r28, [%g0] 0x73 | |
5691 | intvec_20_9: | |
5692 | .word 0x39400001 ! 14: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5693 | trapasi_20_10: | |
5694 | nop | |
5695 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
5696 | .word 0xd4d04a00 ! 15: LDSHA_R ldsha [%r1, %r0] 0x50, %r10 | |
5697 | ibp_20_11: | |
5698 | nop | |
5699 | .word 0xa3b207c3 ! 16: PDIST pdistn %d8, %d34, %d48 | |
5700 | .word 0xe69fc3c0 ! 17: LDDA_R ldda [%r31, %r0] 0x1e, %r19 | |
5701 | brcommon3_20_12: | |
5702 | nop | |
5703 | setx common_target, %r12, %r27 | |
5704 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
5705 | ba,a .+12 | |
5706 | .word 0xe737e1c0 ! 1: STQF_I - %f19, [0x01c0, %r31] | |
5707 | ba,a .+8 | |
5708 | jmpl %r27+0, %r27 | |
5709 | .word 0xe69fc02d ! 18: LDDA_R ldda [%r31, %r13] 0x01, %r19 | |
5710 | nop | |
5711 | mov 0x80, %g3 | |
5712 | stxa %g3, [%g3] 0x57 | |
5713 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
5714 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
5715 | .word 0xe65fc000 ! 19: LDX_R ldx [%r31 + %r0], %r19 | |
5716 | splash_hpstate_20_13: | |
5717 | .word 0x81982e46 ! 20: WRHPR_HPSTATE_I wrhpr %r0, 0x0e46, %hpstate | |
5718 | intveclr_20_14: | |
5719 | nop | |
5720 | ta T_CHANGE_HPRIV | |
5721 | setx 0xb516a589d6d27700, %r1, %r28 | |
5722 | stxa %r28, [%g0] 0x72 | |
5723 | ta T_CHANGE_NONHPRIV | |
5724 | .word 0x25400001 ! 21: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5725 | nop | |
5726 | ta T_CHANGE_HPRIV | |
5727 | mov 0x20+1, %r10 | |
5728 | set sync_thr_counter5, %r23 | |
5729 | #ifndef SPC | |
5730 | ldxa [%g0]0x63, %o1 | |
5731 | and %o1, 0x38, %o1 | |
5732 | add %o1, %r23, %r23 | |
5733 | sllx %o1, 5, %o3 !(CID*256) | |
5734 | #endif | |
5735 | cas [%r23],%g0,%r10 !lock | |
5736 | brnz %r10, cwq_20_15 | |
5737 | rd %asi, %r12 | |
5738 | wr %g0, 0x40, %asi | |
5739 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5740 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5741 | cmp %l1, 1 | |
5742 | bne cwq_20_15 | |
5743 | set CWQ_BASE, %l6 | |
5744 | #ifndef SPC | |
5745 | add %l6, %o3, %l6 | |
5746 | #endif | |
5747 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5748 | best_set_reg(0x20610050, %l1, %l2) !# Control Word | |
5749 | sllx %l2, 32, %l2 | |
5750 | stx %l2, [%l6 + 0x0] | |
5751 | membar #Sync | |
5752 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5753 | sub %l2, 0x40, %l2 | |
5754 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5755 | wr %r12, %g0, %asi | |
5756 | st %g0, [%r23] | |
5757 | cwq_20_15: | |
5758 | ta T_CHANGE_NONHPRIV | |
5759 | .word 0x91414000 ! 22: RDPC rd %pc, %r8 | |
5760 | .word 0xd8d7e0d8 ! 23: LDSHA_I ldsha [%r31, + 0x00d8] %asi, %r12 | |
5761 | .word 0xc19fde00 ! 24: LDDFA_R ldda [%r31, %r0], %f0 | |
5762 | #if (defined SPC || defined CMP1) | |
5763 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_16) + 24, 16, 16)) -> intp(1,0,1) | |
5764 | #else | |
5765 | setx 0xfa1bdc7492862075, %r1, %r28 | |
5766 | stxa %r28, [%g0] 0x73 | |
5767 | #endif | |
5768 | intvec_20_16: | |
5769 | .word 0x39400001 ! 25: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5770 | splash_tba_20_17: | |
5771 | nop | |
5772 | ta T_CHANGE_PRIV | |
5773 | setx 0x00000004003a0000, %r11, %r12 | |
5774 | .word 0x8b90000c ! 26: WRPR_TBA_R wrpr %r0, %r12, %tba | |
5775 | nop | |
5776 | mov 0x80, %g3 | |
5777 | stxa %g3, [%g3] 0x57 | |
5778 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
5779 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
5780 | .word 0xd85fc000 ! 27: LDX_R ldx [%r31 + %r0], %r12 | |
5781 | .word 0xb1850014 ! 28: WR_STICK_REG_R wr %r20, %r20, %- | |
5782 | .word 0xd877e01c ! 29: STX_I stx %r12, [%r31 + 0x001c] | |
5783 | tagged_20_18: | |
5784 | tsubcctv %r8, 0x173c, %r13 | |
5785 | .word 0xd807e190 ! 30: LDUW_I lduw [%r31 + 0x0190], %r12 | |
5786 | .word 0x89800011 ! 31: WRTICK_R wr %r0, %r17, %tick | |
5787 | trapasi_20_20: | |
5788 | nop | |
5789 | mov 0x0, %r1 ! (VA for ASI 0x5b) | |
5790 | .word 0xd8d84b60 ! 32: LDXA_R ldxa [%r1, %r0] 0x5b, %r12 | |
5791 | fpinit_20_21: | |
5792 | nop | |
5793 | setx fp_data_quads, %r19, %r20 | |
5794 | ldd [%r20], %f0 | |
5795 | ldd [%r20+8], %f4 | |
5796 | ld [%r20+16], %fsr | |
5797 | ld [%r20+24], %r19 | |
5798 | wr %r19, %g0, %gsr | |
5799 | .word 0x87a80a44 ! 33: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
5800 | nop | |
5801 | ta T_CHANGE_HPRIV | |
5802 | mov 0x20+1, %r10 | |
5803 | set sync_thr_counter5, %r23 | |
5804 | #ifndef SPC | |
5805 | ldxa [%g0]0x63, %o1 | |
5806 | and %o1, 0x38, %o1 | |
5807 | add %o1, %r23, %r23 | |
5808 | sllx %o1, 5, %o3 !(CID*256) | |
5809 | #endif | |
5810 | cas [%r23],%g0,%r10 !lock | |
5811 | brnz %r10, cwq_20_22 | |
5812 | rd %asi, %r12 | |
5813 | wr %g0, 0x40, %asi | |
5814 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5815 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5816 | cmp %l1, 1 | |
5817 | bne cwq_20_22 | |
5818 | set CWQ_BASE, %l6 | |
5819 | #ifndef SPC | |
5820 | add %l6, %o3, %l6 | |
5821 | #endif | |
5822 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5823 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word | |
5824 | sllx %l2, 32, %l2 | |
5825 | stx %l2, [%l6 + 0x0] | |
5826 | membar #Sync | |
5827 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5828 | sub %l2, 0x40, %l2 | |
5829 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5830 | wr %r12, %g0, %asi | |
5831 | st %g0, [%r23] | |
5832 | cwq_20_22: | |
5833 | ta T_CHANGE_NONHPRIV | |
5834 | .word 0xa9414000 ! 34: RDPC rd %pc, %r20 | |
5835 | jmptr_20_23: | |
5836 | nop | |
5837 | best_set_reg(0xe1a00000, %r20, %r27) | |
5838 | .word 0xb7c6c000 ! 35: JMPL_R jmpl %r27 + %r0, %r27 | |
5839 | nop | |
5840 | ta T_CHANGE_HPRIV ! macro | |
5841 | donret_20_24: | |
5842 | rd %pc, %r12 | |
5843 | add %r12, (donretarg_20_24-donret_20_24+4), %r12 | |
5844 | add %r12, 0x4, %r11 ! seq tnpc | |
5845 | wrpr %g0, 0x2, %tl | |
5846 | wrpr %g0, %r12, %tpc | |
5847 | wrpr %g0, %r11, %tnpc | |
5848 | set (0x004cae00 | (28 << 24)), %r13 | |
5849 | and %r12, 0xfff, %r14 | |
5850 | sllx %r14, 30, %r14 | |
5851 | or %r13, %r14, %r20 | |
5852 | wrpr %r20, %g0, %tstate | |
5853 | wrhpr %g0, 0x11c5, %htstate | |
5854 | ta T_CHANGE_NONHPRIV ! rand=1 (20) | |
5855 | retry | |
5856 | donretarg_20_24: | |
5857 | .word 0xd66fe06d ! 36: LDSTUB_I ldstub %r11, [%r31 + 0x006d] | |
5858 | nop | |
5859 | ta T_CHANGE_HPRIV ! macro | |
5860 | donret_20_25: | |
5861 | rd %pc, %r12 | |
5862 | add %r12, (donretarg_20_25-donret_20_25+4), %r12 | |
5863 | add %r12, 0x4, %r11 ! seq tnpc | |
5864 | wrpr %g0, 0x1, %tl | |
5865 | wrpr %g0, %r12, %tpc | |
5866 | wrpr %g0, %r11, %tnpc | |
5867 | set (0x00166400 | (0x58 << 24)), %r13 | |
5868 | and %r12, 0xfff, %r14 | |
5869 | sllx %r14, 30, %r14 | |
5870 | or %r13, %r14, %r20 | |
5871 | wrpr %r20, %g0, %tstate | |
5872 | wrhpr %g0, 0x78f, %htstate | |
5873 | ta T_CHANGE_NONHPRIV ! rand=1 (20) | |
5874 | done | |
5875 | donretarg_20_25: | |
5876 | .word 0x2ac98001 ! 37: BRNZ brnz,a,pt %r6,<label_0x98001> | |
5877 | fpinit_20_26: | |
5878 | nop | |
5879 | setx fp_data_quads, %r19, %r20 | |
5880 | ldd [%r20], %f0 | |
5881 | ldd [%r20+8], %f4 | |
5882 | ld [%r20+16], %fsr | |
5883 | ld [%r20+24], %r19 | |
5884 | wr %r19, %g0, %gsr | |
5885 | .word 0xc3e83df7 ! 38: PREFETCHA_I prefetcha [%r0, + 0xfffffdf7] %asi, #one_read | |
5886 | nop | |
5887 | mov 0x80, %g3 | |
5888 | stxa %g3, [%g3] 0x5f | |
5889 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
5890 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
5891 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
5892 | .word 0xd65fc000 ! 39: LDX_R ldx [%r31 + %r0], %r11 | |
5893 | nop | |
5894 | mov 0x80, %g3 | |
5895 | stxa %g3, [%g3] 0x57 | |
5896 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
5897 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
5898 | .word 0xd65fc000 ! 40: LDX_R ldx [%r31 + %r0], %r11 | |
5899 | mondo_20_27: | |
5900 | nop | |
5901 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5902 | ta T_CHANGE_PRIV | |
5903 | stxa %r19, [%r0+0x3e0] %asi | |
5904 | .word 0x9d940014 ! 41: WRPR_WSTATE_R wrpr %r16, %r20, %wstate | |
5905 | ibp_20_28: | |
5906 | nop | |
5907 | ta T_CHANGE_NONHPRIV | |
5908 | .word 0xd71fc00a ! 42: LDDF_R ldd [%r31, %r10], %f11 | |
5909 | fpinit_20_29: | |
5910 | nop | |
5911 | setx fp_data_quads, %r19, %r20 | |
5912 | ldd [%r20], %f0 | |
5913 | ldd [%r20+8], %f4 | |
5914 | ld [%r20+16], %fsr | |
5915 | ld [%r20+24], %r19 | |
5916 | wr %r19, %g0, %gsr | |
5917 | .word 0x91a009a4 ! 43: FDIVs fdivs %f0, %f4, %f8 | |
5918 | nop | |
5919 | ta T_CHANGE_HPRIV | |
5920 | mov 0x20+1, %r10 | |
5921 | set sync_thr_counter5, %r23 | |
5922 | #ifndef SPC | |
5923 | ldxa [%g0]0x63, %o1 | |
5924 | and %o1, 0x38, %o1 | |
5925 | add %o1, %r23, %r23 | |
5926 | sllx %o1, 5, %o3 !(CID*256) | |
5927 | #endif | |
5928 | cas [%r23],%g0,%r10 !lock | |
5929 | brnz %r10, cwq_20_30 | |
5930 | rd %asi, %r12 | |
5931 | wr %g0, 0x40, %asi | |
5932 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5933 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5934 | cmp %l1, 1 | |
5935 | bne cwq_20_30 | |
5936 | set CWQ_BASE, %l6 | |
5937 | #ifndef SPC | |
5938 | add %l6, %o3, %l6 | |
5939 | #endif | |
5940 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5941 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
5942 | sllx %l2, 32, %l2 | |
5943 | stx %l2, [%l6 + 0x0] | |
5944 | membar #Sync | |
5945 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5946 | sub %l2, 0x40, %l2 | |
5947 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5948 | wr %r12, %g0, %asi | |
5949 | st %g0, [%r23] | |
5950 | cwq_20_30: | |
5951 | ta T_CHANGE_NONHPRIV | |
5952 | .word 0xa7414000 ! 44: RDPC rd %pc, %r19 | |
5953 | .word 0xe4dfe1f0 ! 45: LDXA_I ldxa [%r31, + 0x01f0] %asi, %r18 | |
5954 | .word 0xa5b10485 ! 46: FCMPLE32 fcmple32 %d4, %d36, %r18 | |
5955 | ibp_20_32: | |
5956 | nop | |
5957 | .word 0xa3a409b3 ! 47: FDIVs fdivs %f16, %f19, %f17 | |
5958 | nop | |
5959 | ta T_CHANGE_HPRIV | |
5960 | mov 0x20, %r10 | |
5961 | set sync_thr_counter6, %r23 | |
5962 | #ifndef SPC | |
5963 | ldxa [%g0]0x63, %o1 | |
5964 | and %o1, 0x38, %o1 | |
5965 | add %o1, %r23, %r23 | |
5966 | #endif | |
5967 | cas [%r23],%g0,%r10 !lock | |
5968 | brnz %r10, sma_20_33 | |
5969 | rd %asi, %r12 | |
5970 | wr %g0, 0x40, %asi | |
5971 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
5972 | set 0x001a1fff, %g1 | |
5973 | stxa %g1, [%g0 + 0x80] %asi | |
5974 | wr %r12, %g0, %asi | |
5975 | st %g0, [%r23] | |
5976 | sma_20_33: | |
5977 | ta T_CHANGE_NONHPRIV | |
5978 | .word 0xe5e7e00a ! 48: CASA_R casa [%r31] %asi, %r10, %r18 | |
5979 | change_to_randtl_20_34: | |
5980 | ta T_CHANGE_PRIV ! macro | |
5981 | done_change_to_randtl_20_34: | |
5982 | .word 0x8f902000 ! 49: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
5983 | .word 0xe1bfd920 ! 50: STDFA_R stda %f16, [%r0, %r31] | |
5984 | pmu_20_35: | |
5985 | nop | |
5986 | setx 0xfffffdeafffffb3f, %g1, %g7 | |
5987 | .word 0xa3800007 ! 51: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
5988 | splash_cmpr_20_36: | |
5989 | mov 0, %r18 | |
5990 | sllx %r18, 63, %r18 | |
5991 | rd %tick, %r17 | |
5992 | add %r17, 0x60, %r17 | |
5993 | or %r17, %r18, %r17 | |
5994 | ta T_CHANGE_HPRIV | |
5995 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
5996 | ta T_CHANGE_PRIV | |
5997 | .word 0xb3800011 ! 52: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
5998 | nop | |
5999 | ta T_CHANGE_HPRIV ! macro | |
6000 | donret_20_37: | |
6001 | rd %pc, %r12 | |
6002 | add %r12, (donretarg_20_37-donret_20_37), %r12 | |
6003 | add %r12, 0x4, %r11 ! seq tnpc | |
6004 | wrpr %g0, 0x2, %tl | |
6005 | wrpr %g0, %r12, %tpc | |
6006 | wrpr %g0, %r11, %tnpc | |
6007 | set (0x00707800 | (0x83 << 24)), %r13 | |
6008 | and %r12, 0xfff, %r14 | |
6009 | sllx %r14, 30, %r14 | |
6010 | or %r13, %r14, %r20 | |
6011 | wrpr %r20, %g0, %tstate | |
6012 | wrhpr %g0, 0x867, %htstate | |
6013 | ta T_CHANGE_NONPRIV ! rand=0 (20) | |
6014 | done | |
6015 | donretarg_20_37: | |
6016 | .word 0xe4ffe1df ! 53: SWAPA_I swapa %r18, [%r31 + 0x01df] %asi | |
6017 | .word 0x99508000 ! 54: RDPR_TSTATE <illegal instruction> | |
6018 | brcommon1_20_38: | |
6019 | nop | |
6020 | setx common_target, %r12, %r27 | |
6021 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
6022 | ba,a .+12 | |
6023 | .word 0xc32fe1a0 ! 1: STXFSR_I st-sfr %f1, [0x01a0, %r31] | |
6024 | ba,a .+8 | |
6025 | jmpl %r27+0, %r27 | |
6026 | .word 0x93b10493 ! 55: FCMPLE32 fcmple32 %d4, %d50, %r9 | |
6027 | trapasi_20_39: | |
6028 | nop | |
6029 | mov 0x18, %r1 ! (VA for ASI 0x4c) | |
6030 | .word 0xd8d84980 ! 56: LDXA_R ldxa [%r1, %r0] 0x4c, %r12 | |
6031 | nop | |
6032 | ta T_CHANGE_HPRIV | |
6033 | mov 0x20, %r10 | |
6034 | set sync_thr_counter6, %r23 | |
6035 | #ifndef SPC | |
6036 | ldxa [%g0]0x63, %o1 | |
6037 | and %o1, 0x38, %o1 | |
6038 | add %o1, %r23, %r23 | |
6039 | #endif | |
6040 | cas [%r23],%g0,%r10 !lock | |
6041 | brnz %r10, sma_20_40 | |
6042 | rd %asi, %r12 | |
6043 | wr %g0, 0x40, %asi | |
6044 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
6045 | set 0x00161fff, %g1 | |
6046 | stxa %g1, [%g0 + 0x80] %asi | |
6047 | wr %r12, %g0, %asi | |
6048 | st %g0, [%r23] | |
6049 | sma_20_40: | |
6050 | ta T_CHANGE_NONHPRIV | |
6051 | .word 0xd9e7e009 ! 57: CASA_R casa [%r31] %asi, %r9, %r12 | |
6052 | bcs,a skip_20_41 | |
6053 | brlez,pn %r3, skip_20_41 | |
6054 | .align 128 | |
6055 | skip_20_41: | |
6056 | .word 0xc30fc000 ! 58: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
6057 | nop | |
6058 | ta T_CHANGE_HPRIV ! macro | |
6059 | donret_20_42: | |
6060 | rd %pc, %r12 | |
6061 | add %r12, (donretarg_20_42-donret_20_42+4), %r12 | |
6062 | add %r12, 0x4, %r11 ! seq tnpc | |
6063 | wrpr %g0, 0x1, %tl | |
6064 | wrpr %g0, %r12, %tpc | |
6065 | wrpr %g0, %r11, %tnpc | |
6066 | set (0x4000 | (0x80 << 24)), %r13 | |
6067 | and %r12, 0xfff, %r14 | |
6068 | sllx %r14, 30, %r14 | |
6069 | or %r13, %r14, %r20 | |
6070 | wrpr %r20, %g0, %tstate | |
6071 | wrhpr %g0, 0x1dcc, %htstate | |
6072 | ta T_CHANGE_NONHPRIV ! rand=1 (20) | |
6073 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> | |
6074 | retry | |
6075 | donretarg_20_42: | |
6076 | .word 0xd86fe08a ! 59: LDSTUB_I ldstub %r12, [%r31 + 0x008a] | |
6077 | unsupttte_20_43: | |
6078 | nop | |
6079 | ta T_CHANGE_HPRIV | |
6080 | mov 1, %r20 | |
6081 | sllx %r20, 63, %r20 | |
6082 | or %r20, 2,%r20 | |
6083 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
6084 | ta T_CHANGE_NONHPRIV | |
6085 | .word 0x9ba449b0 ! 60: FDIVs fdivs %f17, %f16, %f13 | |
6086 | splash_hpstate_20_44: | |
6087 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> | |
6088 | .word 0x81982d56 ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x0d56, %hpstate | |
6089 | nop | |
6090 | ta T_CHANGE_HPRIV ! macro | |
6091 | donret_20_45: | |
6092 | rd %pc, %r12 | |
6093 | add %r12, (donretarg_20_45-donret_20_45), %r12 | |
6094 | add %r12, 0x4, %r11 ! seq tnpc | |
6095 | wrpr %g0, 0x2, %tl | |
6096 | wrpr %g0, %r12, %tpc | |
6097 | wrpr %g0, %r11, %tnpc | |
6098 | set (0x00340500 | (0x88 << 24)), %r13 | |
6099 | and %r12, 0xfff, %r14 | |
6100 | sllx %r14, 30, %r14 | |
6101 | or %r13, %r14, %r20 | |
6102 | wrpr %r20, %g0, %tstate | |
6103 | wrhpr %g0, 0x1f0d, %htstate | |
6104 | ta T_CHANGE_NONHPRIV ! rand=1 (20) | |
6105 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> | |
6106 | done | |
6107 | donretarg_20_45: | |
6108 | .word 0x22800001 ! 62: BE be,a <label_0x1> | |
6109 | .word 0xe0c7e140 ! 63: LDSWA_I ldswa [%r31, + 0x0140] %asi, %r16 | |
6110 | trapasi_20_46: | |
6111 | nop | |
6112 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
6113 | .word 0xe0d84e60 ! 64: LDXA_R ldxa [%r1, %r0] 0x73, %r16 | |
6114 | jmptr_20_47: | |
6115 | nop | |
6116 | best_set_reg(0xe1a00000, %r20, %r27) | |
6117 | .word 0xb7c6c000 ! 65: JMPL_R jmpl %r27 + %r0, %r27 | |
6118 | pmu_20_48: | |
6119 | nop | |
6120 | setx 0xfffff10afffff17a, %g1, %g7 | |
6121 | .word 0xa3800007 ! 66: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
6122 | ibp_20_49: | |
6123 | nop | |
6124 | .word 0xe11fe1b0 ! 67: LDDF_I ldd [%r31, 0x01b0], %f16 | |
6125 | fpinit_20_50: | |
6126 | nop | |
6127 | setx fp_data_quads, %r19, %r20 | |
6128 | ldd [%r20], %f0 | |
6129 | ldd [%r20+8], %f4 | |
6130 | ld [%r20+16], %fsr | |
6131 | ld [%r20+24], %r19 | |
6132 | wr %r19, %g0, %gsr | |
6133 | .word 0x8da009a4 ! 68: FDIVs fdivs %f0, %f4, %f6 | |
6134 | splash_tba_20_51: | |
6135 | nop | |
6136 | ta T_CHANGE_PRIV | |
6137 | setx 0x00000004003a0000, %r11, %r12 | |
6138 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
6139 | nop | |
6140 | mov 0x80, %g3 | |
6141 | stxa %g3, [%g3] 0x5f | |
6142 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
6143 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6144 | .word 0xe05fc000 ! 70: LDX_R ldx [%r31 + %r0], %r16 | |
6145 | .word 0xe08008a0 ! 71: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
6146 | .word 0x87a90a41 ! 72: FCMPd fcmpd %fcc<n>, %f4, %f32 | |
6147 | .word 0xd48008a0 ! 73: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
6148 | fpinit_20_53: | |
6149 | nop | |
6150 | setx fp_data_quads, %r19, %r20 | |
6151 | ldd [%r20], %f0 | |
6152 | ldd [%r20+8], %f4 | |
6153 | ld [%r20+16], %fsr | |
6154 | ld [%r20+24], %r19 | |
6155 | wr %r19, %g0, %gsr | |
6156 | .word 0x89a009a4 ! 74: FDIVs fdivs %f0, %f4, %f4 | |
6157 | nop | |
6158 | ta T_CHANGE_HPRIV | |
6159 | mov 0x20+1, %r10 | |
6160 | set sync_thr_counter5, %r23 | |
6161 | #ifndef SPC | |
6162 | ldxa [%g0]0x63, %o1 | |
6163 | and %o1, 0x38, %o1 | |
6164 | add %o1, %r23, %r23 | |
6165 | sllx %o1, 5, %o3 !(CID*256) | |
6166 | #endif | |
6167 | cas [%r23],%g0,%r10 !lock | |
6168 | brnz %r10, cwq_20_54 | |
6169 | rd %asi, %r12 | |
6170 | wr %g0, 0x40, %asi | |
6171 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6172 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6173 | cmp %l1, 1 | |
6174 | bne cwq_20_54 | |
6175 | set CWQ_BASE, %l6 | |
6176 | #ifndef SPC | |
6177 | add %l6, %o3, %l6 | |
6178 | #endif | |
6179 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6180 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word | |
6181 | sllx %l2, 32, %l2 | |
6182 | stx %l2, [%l6 + 0x0] | |
6183 | membar #Sync | |
6184 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6185 | sub %l2, 0x40, %l2 | |
6186 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6187 | wr %r12, %g0, %asi | |
6188 | st %g0, [%r23] | |
6189 | cwq_20_54: | |
6190 | ta T_CHANGE_NONHPRIV | |
6191 | .word 0xa9414000 ! 75: RDPC rd %pc, %r20 | |
6192 | .word 0x91944003 ! 76: WRPR_PIL_R wrpr %r17, %r3, %pil | |
6193 | #if (defined SPC || defined CMP1) | |
6194 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_56) + 40, 16, 16)) -> intp(5,0,9) | |
6195 | #else | |
6196 | setx 0x6f6804d224b37b79, %r1, %r28 | |
6197 | stxa %r28, [%g0] 0x73 | |
6198 | #endif | |
6199 | intvec_20_56: | |
6200 | .word 0x39400001 ! 77: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6201 | intveclr_20_57: | |
6202 | nop | |
6203 | ta T_CHANGE_HPRIV | |
6204 | setx 0x54ecd2e4354ab22c, %r1, %r28 | |
6205 | stxa %r28, [%g0] 0x72 | |
6206 | ta T_CHANGE_NONHPRIV | |
6207 | .word 0x25400001 ! 78: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6208 | .word 0xd6bfe042 ! 79: STDA_I stda %r11, [%r31 + 0x0042] %asi | |
6209 | .word 0xd737c000 ! 80: STQF_R - %f11, [%r0, %r31] | |
6210 | ceter_20_58: | |
6211 | nop | |
6212 | ta T_CHANGE_HPRIV | |
6213 | mov 4, %r17 | |
6214 | sllx %r17, 60, %r17 | |
6215 | mov 0x18, %r16 | |
6216 | stxa %r17, [%r16]0x4c | |
6217 | ta T_CHANGE_NONHPRIV | |
6218 | .word 0xa7410000 ! 81: RDTICK rd %tick, %r19 | |
6219 | brcommon3_20_59: | |
6220 | nop | |
6221 | setx common_target, %r12, %r27 | |
6222 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
6223 | ba,a .+12 | |
6224 | .word 0xd66fe080 ! 1: LDSTUB_I ldstub %r11, [%r31 + 0x0080] | |
6225 | ba,a .+8 | |
6226 | jmpl %r27+0, %r27 | |
6227 | .word 0xd73fc013 ! 82: STDF_R std %f11, [%r19, %r31] | |
6228 | .word 0xd6800a80 ! 83: LDUWA_R lduwa [%r0, %r0] 0x54, %r11 | |
6229 | jmptr_20_60: | |
6230 | nop | |
6231 | best_set_reg(0xe1a00000, %r20, %r27) | |
6232 | .word 0xb7c6c000 ! 84: JMPL_R jmpl %r27 + %r0, %r27 | |
6233 | setx 0x96d5867ee4d39cae, %r1, %r28 | |
6234 | stxa %r28, [%g0] 0x73 | |
6235 | intvec_20_61: | |
6236 | .word 0x39400001 ! 85: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6237 | nop | |
6238 | ta T_CHANGE_HPRIV | |
6239 | mov 0x20+1, %r10 | |
6240 | set sync_thr_counter5, %r23 | |
6241 | #ifndef SPC | |
6242 | ldxa [%g0]0x63, %o1 | |
6243 | and %o1, 0x38, %o1 | |
6244 | add %o1, %r23, %r23 | |
6245 | sllx %o1, 5, %o3 !(CID*256) | |
6246 | #endif | |
6247 | cas [%r23],%g0,%r10 !lock | |
6248 | brnz %r10, cwq_20_62 | |
6249 | rd %asi, %r12 | |
6250 | wr %g0, 0x40, %asi | |
6251 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6252 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6253 | cmp %l1, 1 | |
6254 | bne cwq_20_62 | |
6255 | set CWQ_BASE, %l6 | |
6256 | #ifndef SPC | |
6257 | add %l6, %o3, %l6 | |
6258 | #endif | |
6259 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6260 | best_set_reg(0x20610000, %l1, %l2) !# Control Word | |
6261 | sllx %l2, 32, %l2 | |
6262 | stx %l2, [%l6 + 0x0] | |
6263 | membar #Sync | |
6264 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6265 | sub %l2, 0x40, %l2 | |
6266 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6267 | wr %r12, %g0, %asi | |
6268 | st %g0, [%r23] | |
6269 | cwq_20_62: | |
6270 | ta T_CHANGE_NONHPRIV | |
6271 | .word 0x93414000 ! 86: RDPC rd %pc, %r9 | |
6272 | .word 0xe28008a0 ! 87: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
6273 | ibp_20_63: | |
6274 | nop | |
6275 | .word 0xe19fd920 ! 88: LDDFA_R ldda [%r31, %r0], %f16 | |
6276 | ibp_20_64: | |
6277 | nop | |
6278 | ta T_CHANGE_NONHPRIV | |
6279 | .word 0xe31fc008 ! 89: LDDF_R ldd [%r31, %r8], %f17 | |
6280 | jmptr_20_65: | |
6281 | nop | |
6282 | best_set_reg(0xe1a00000, %r20, %r27) | |
6283 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
6284 | .word 0xe22fe190 ! 91: STB_I stb %r17, [%r31 + 0x0190] | |
6285 | .word 0xe19fda00 ! 92: LDDFA_R ldda [%r31, %r0], %f16 | |
6286 | .word 0x89800011 ! 93: WRTICK_R wr %r0, %r17, %tick | |
6287 | .word 0xe3e7c02c ! 94: CASA_I casa [%r31] 0x 1, %r12, %r17 | |
6288 | setx 0xa49e4d0d6dd8fd7b, %r1, %r28 | |
6289 | stxa %r28, [%g0] 0x73 | |
6290 | intvec_20_67: | |
6291 | .word 0x39400001 ! 95: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6292 | nop | |
6293 | mov 0x80, %g3 | |
6294 | stxa %g3, [%g3] 0x57 | |
6295 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
6296 | .word 0xe25fc000 ! 96: LDX_R ldx [%r31 + %r0], %r17 | |
6297 | mondo_20_68: | |
6298 | nop | |
6299 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6300 | ta T_CHANGE_PRIV | |
6301 | stxa %r5, [%r0+0x3e0] %asi | |
6302 | .word 0x9d930001 ! 97: WRPR_WSTATE_R wrpr %r12, %r1, %wstate | |
6303 | fpinit_20_69: | |
6304 | nop | |
6305 | setx fp_data_quads, %r19, %r20 | |
6306 | ldd [%r20], %f0 | |
6307 | ldd [%r20+8], %f4 | |
6308 | ld [%r20+16], %fsr | |
6309 | ld [%r20+24], %r19 | |
6310 | wr %r19, %g0, %gsr | |
6311 | .word 0x89a009a4 ! 98: FDIVs fdivs %f0, %f4, %f4 | |
6312 | .word 0xa190200c ! 99: WRPR_GL_I wrpr %r0, 0x000c, %- | |
6313 | mondo_20_70: | |
6314 | nop | |
6315 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6316 | ta T_CHANGE_PRIV | |
6317 | stxa %r16, [%r0+0x3d0] %asi | |
6318 | .word 0x9d948007 ! 100: WRPR_WSTATE_R wrpr %r18, %r7, %wstate | |
6319 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
6320 | reduce_priv_lvl_20_71: | |
6321 | ta T_CHANGE_NONHPRIV ! macro | |
6322 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
6323 | .word 0x8d802004 ! 103: WRFPRS_I wr %r0, 0x0004, %fprs | |
6324 | splash_hpstate_20_73: | |
6325 | ta T_CHANGE_NONHPRIV | |
6326 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
6327 | .word 0x81983c85 ! 104: WRHPR_HPSTATE_I wrhpr %r0, 0x1c85, %hpstate | |
6328 | splash_hpstate_20_74: | |
6329 | ta T_CHANGE_NONHPRIV | |
6330 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> | |
6331 | .word 0x81983854 ! 105: WRHPR_HPSTATE_I wrhpr %r0, 0x1854, %hpstate | |
6332 | .word 0x91928012 ! 106: WRPR_PIL_R wrpr %r10, %r18, %pil | |
6333 | trapasi_20_76: | |
6334 | nop | |
6335 | mov 0x30, %r1 ! (VA for ASI 0x5a) | |
6336 | .word 0xe2c04b40 ! 107: LDSWA_R ldswa [%r1, %r0] 0x5a, %r17 | |
6337 | mondo_20_77: | |
6338 | nop | |
6339 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6340 | stxa %r18, [%r0+0x3e8] %asi | |
6341 | .word 0x9d940012 ! 108: WRPR_WSTATE_R wrpr %r16, %r18, %wstate | |
6342 | dvapa_20_78: | |
6343 | nop | |
6344 | ta T_CHANGE_HPRIV | |
6345 | mov 0xed6, %r20 | |
6346 | mov 0x9, %r19 | |
6347 | sllx %r20, 23, %r20 | |
6348 | or %r19, %r20, %r19 | |
6349 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
6350 | mov 0x38, %r18 | |
6351 | stxa %r31, [%r18]0x58 | |
6352 | ta T_CHANGE_NONHPRIV | |
6353 | .word 0x99702f6c ! 109: POPC_I popc 0x0f6c, %r12 | |
6354 | .word 0xe727c000 ! 110: STF_R st %f19, [%r0, %r31] | |
6355 | ibp_20_79: | |
6356 | nop | |
6357 | ta T_CHANGE_NONHPRIV | |
6358 | .word 0xe63fe010 ! 111: STD_I std %r19, [%r31 + 0x0010] | |
6359 | splash_lsu_20_80: | |
6360 | nop | |
6361 | ta T_CHANGE_HPRIV | |
6362 | set 0x1bb14304, %r2 | |
6363 | mov 0x7, %r1 | |
6364 | sllx %r1, 32, %r1 | |
6365 | or %r1, %r2, %r2 | |
6366 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6367 | .word 0x3d400001 ! 112: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6368 | jmptr_20_81: | |
6369 | nop | |
6370 | best_set_reg(0xe1a00000, %r20, %r27) | |
6371 | .word 0xb7c6c000 ! 113: JMPL_R jmpl %r27 + %r0, %r27 | |
6372 | intveclr_20_82: | |
6373 | nop | |
6374 | ta T_CHANGE_HPRIV | |
6375 | setx 0x18727d53ad2513e4, %r1, %r28 | |
6376 | stxa %r28, [%g0] 0x72 | |
6377 | ta T_CHANGE_NONHPRIV | |
6378 | .word 0x25400001 ! 114: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6379 | intveclr_20_83: | |
6380 | nop | |
6381 | ta T_CHANGE_HPRIV | |
6382 | setx 0xe4f9bd460a47d16c, %r1, %r28 | |
6383 | stxa %r28, [%g0] 0x72 | |
6384 | .word 0x25400001 ! 115: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6385 | .word 0xa190200e ! 116: WRPR_GL_I wrpr %r0, 0x000e, %- | |
6386 | nop | |
6387 | ta T_CHANGE_HPRIV | |
6388 | mov 0x20+1, %r10 | |
6389 | set sync_thr_counter5, %r23 | |
6390 | #ifndef SPC | |
6391 | ldxa [%g0]0x63, %o1 | |
6392 | and %o1, 0x38, %o1 | |
6393 | add %o1, %r23, %r23 | |
6394 | sllx %o1, 5, %o3 !(CID*256) | |
6395 | #endif | |
6396 | cas [%r23],%g0,%r10 !lock | |
6397 | brnz %r10, cwq_20_84 | |
6398 | rd %asi, %r12 | |
6399 | wr %g0, 0x40, %asi | |
6400 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6401 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6402 | cmp %l1, 1 | |
6403 | bne cwq_20_84 | |
6404 | set CWQ_BASE, %l6 | |
6405 | #ifndef SPC | |
6406 | add %l6, %o3, %l6 | |
6407 | #endif | |
6408 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6409 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word | |
6410 | sllx %l2, 32, %l2 | |
6411 | stx %l2, [%l6 + 0x0] | |
6412 | membar #Sync | |
6413 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6414 | sub %l2, 0x40, %l2 | |
6415 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6416 | wr %r12, %g0, %asi | |
6417 | st %g0, [%r23] | |
6418 | cwq_20_84: | |
6419 | ta T_CHANGE_NONHPRIV | |
6420 | .word 0xa9414000 ! 117: RDPC rd %pc, %r20 | |
6421 | fpinit_20_85: | |
6422 | nop | |
6423 | setx fp_data_quads, %r19, %r20 | |
6424 | ldd [%r20], %f0 | |
6425 | ldd [%r20+8], %f4 | |
6426 | ld [%r20+16], %fsr | |
6427 | ld [%r20+24], %r19 | |
6428 | wr %r19, %g0, %gsr | |
6429 | .word 0x87a80a44 ! 118: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
6430 | ibp_20_86: | |
6431 | nop | |
6432 | .word 0xd2dfc02b ! 119: LDXA_R ldxa [%r31, %r11] 0x01, %r9 | |
6433 | setx 0xc226b13b0fb9d25d, %r1, %r28 | |
6434 | stxa %r28, [%g0] 0x73 | |
6435 | intvec_20_87: | |
6436 | .word 0x39400001 ! 120: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6437 | #if (defined SPC || defined CMP1) | |
6438 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_88) + 48, 16, 16)) -> intp(6,0,21) | |
6439 | #else | |
6440 | setx 0x276036746bc221df, %r1, %r28 | |
6441 | stxa %r28, [%g0] 0x73 | |
6442 | #endif | |
6443 | intvec_20_88: | |
6444 | .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6445 | .word 0x89800011 ! 122: WRTICK_R wr %r0, %r17, %tick | |
6446 | brgez,pt %r5, skip_20_90 | |
6447 | .word 0x97b504c6 ! 1: FCMPNE32 fcmpne32 %d20, %d6, %r11 | |
6448 | .align 512 | |
6449 | skip_20_90: | |
6450 | .word 0x93a449d2 ! 123: FDIVd fdivd %f48, %f18, %f40 | |
6451 | mondo_20_91: | |
6452 | nop | |
6453 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6454 | stxa %r11, [%r0+0x3c0] %asi | |
6455 | .word 0x9d91c009 ! 124: WRPR_WSTATE_R wrpr %r7, %r9, %wstate | |
6456 | .word 0x8d802004 ! 125: WRFPRS_I wr %r0, 0x0004, %fprs | |
6457 | ibp_20_92: | |
6458 | nop | |
6459 | ta T_CHANGE_NONHPRIV | |
6460 | .word 0xa7b14486 ! 126: FCMPLE32 fcmple32 %d36, %d6, %r19 | |
6461 | .word 0x8d802000 ! 127: WRFPRS_I wr %r0, 0x0000, %fprs | |
6462 | .word 0x8d802000 ! 128: WRFPRS_I wr %r0, 0x0000, %fprs | |
6463 | unsupttte_20_93: | |
6464 | nop | |
6465 | ta T_CHANGE_HPRIV | |
6466 | mov 1, %r20 | |
6467 | sllx %r20, 63, %r20 | |
6468 | or %r20, 2,%r20 | |
6469 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
6470 | ta T_CHANGE_NONHPRIV | |
6471 | .word 0xc3e90032 ! 129: PREFETCHA_R prefetcha [%r4, %r18] 0x01, #one_read | |
6472 | invalw | |
6473 | mov 0x35, %r30 | |
6474 | .word 0x83d0001e ! 130: Tcc_R te icc_or_xcc, %r0 + %r30 | |
6475 | fpinit_20_94: | |
6476 | nop | |
6477 | setx fp_data_quads, %r19, %r20 | |
6478 | ldd [%r20], %f0 | |
6479 | ldd [%r20+8], %f4 | |
6480 | ld [%r20+16], %fsr | |
6481 | ld [%r20+24], %r19 | |
6482 | wr %r19, %g0, %gsr | |
6483 | .word 0xc3e821f5 ! 131: PREFETCHA_I prefetcha [%r0, + 0x01f5] %asi, #one_read | |
6484 | intveclr_20_95: | |
6485 | nop | |
6486 | ta T_CHANGE_HPRIV | |
6487 | setx 0xb99ce69a84dff5f0, %r1, %r28 | |
6488 | stxa %r28, [%g0] 0x72 | |
6489 | ta T_CHANGE_NONHPRIV | |
6490 | .word 0x25400001 ! 132: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6491 | intveclr_20_96: | |
6492 | nop | |
6493 | ta T_CHANGE_HPRIV | |
6494 | setx 0x2c3ccaee6cd6dda7, %r1, %r28 | |
6495 | stxa %r28, [%g0] 0x72 | |
6496 | .word 0x25400001 ! 133: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6497 | setx 0x85b3c1a4bad8dfad, %r1, %r28 | |
6498 | stxa %r28, [%g0] 0x73 | |
6499 | intvec_20_97: | |
6500 | .word 0x39400001 ! 134: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6501 | .word 0x91950003 ! 135: WRPR_PIL_R wrpr %r20, %r3, %pil | |
6502 | .word 0x97a00162 ! 136: FABSq dis not found | |
6503 | ||
6504 | mondo_20_100: | |
6505 | nop | |
6506 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6507 | ta T_CHANGE_PRIV | |
6508 | stxa %r10, [%r0+0x3c0] %asi | |
6509 | .word 0x9d944014 ! 137: WRPR_WSTATE_R wrpr %r17, %r20, %wstate | |
6510 | splash_cmpr_20_101: | |
6511 | mov 1, %r18 | |
6512 | sllx %r18, 63, %r18 | |
6513 | rd %tick, %r17 | |
6514 | add %r17, 0x60, %r17 | |
6515 | or %r17, %r18, %r17 | |
6516 | ta T_CHANGE_PRIV | |
6517 | .word 0xaf800011 ! 138: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
6518 | fbule skip_20_102 | |
6519 | ble,a skip_20_102 | |
6520 | .align 1024 | |
6521 | skip_20_102: | |
6522 | .word 0xd1e7c020 ! 139: CASA_I casa [%r31] 0x 1, %r0, %r8 | |
6523 | intveclr_20_103: | |
6524 | nop | |
6525 | ta T_CHANGE_HPRIV | |
6526 | setx 0x275098111137be50, %r1, %r28 | |
6527 | stxa %r28, [%g0] 0x72 | |
6528 | .word 0x25400001 ! 140: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6529 | .word 0xa781299a ! 141: WR_GRAPHICS_STATUS_REG_I wr %r4, 0x099a, %- | |
6530 | .word 0x91d02034 ! 142: Tcc_I ta icc_or_xcc, %r0 + 52 | |
6531 | .word 0x99a00174 ! 143: FABSq dis not found | |
6532 | ||
6533 | splash_cmpr_20_105: | |
6534 | mov 0, %r18 | |
6535 | sllx %r18, 63, %r18 | |
6536 | rd %tick, %r17 | |
6537 | add %r17, 0x50, %r17 | |
6538 | or %r17, %r18, %r17 | |
6539 | .word 0xb3800011 ! 144: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
6540 | cwp_20_106: | |
6541 | set user_data_start, %o7 | |
6542 | .word 0x93902006 ! 145: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
6543 | mondo_20_107: | |
6544 | nop | |
6545 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6546 | ta T_CHANGE_PRIV | |
6547 | stxa %r4, [%r0+0x3e8] %asi | |
6548 | .word 0x9d934012 ! 146: WRPR_WSTATE_R wrpr %r13, %r18, %wstate | |
6549 | brcommon3_20_108: | |
6550 | nop | |
6551 | setx common_target, %r12, %r27 | |
6552 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
6553 | ba,a .+12 | |
6554 | .word 0xe86fe160 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0160] | |
6555 | ba,a .+8 | |
6556 | jmpl %r27+0, %r27 | |
6557 | .word 0xe8bfc031 ! 147: STDA_R stda %r20, [%r31 + %r17] 0x01 | |
6558 | ibp_20_109: | |
6559 | nop | |
6560 | .word 0xc3ec8023 ! 148: PREFETCHA_R prefetcha [%r18, %r3] 0x01, #one_read | |
6561 | trapasi_20_110: | |
6562 | nop | |
6563 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
6564 | .word 0xd4c04a00 ! 149: LDSWA_R ldswa [%r1, %r0] 0x50, %r10 | |
6565 | setx 0xb083fa0e4b150eb7, %r1, %r28 | |
6566 | stxa %r28, [%g0] 0x73 | |
6567 | intvec_20_111: | |
6568 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6569 | splash_cmpr_20_112: | |
6570 | mov 0, %r18 | |
6571 | sllx %r18, 63, %r18 | |
6572 | rd %tick, %r17 | |
6573 | add %r17, 0x70, %r17 | |
6574 | or %r17, %r18, %r17 | |
6575 | ta T_CHANGE_PRIV | |
6576 | .word 0xb3800011 ! 151: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
6577 | splash_lsu_20_113: | |
6578 | nop | |
6579 | ta T_CHANGE_HPRIV | |
6580 | set 0xae8e5198, %r2 | |
6581 | mov 0x6, %r1 | |
6582 | sllx %r1, 32, %r1 | |
6583 | or %r1, %r2, %r2 | |
6584 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6585 | .word 0x3d400001 ! 152: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6586 | .word 0x81510000 ! 153: RDPR_TICK rdpr %tick, %r0 | |
6587 | splash_lsu_20_114: | |
6588 | nop | |
6589 | ta T_CHANGE_HPRIV | |
6590 | set 0xdd1dae24, %r2 | |
6591 | mov 0x5, %r1 | |
6592 | sllx %r1, 32, %r1 | |
6593 | or %r1, %r2, %r2 | |
6594 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6595 | .word 0x3d400001 ! 154: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6596 | pmu_20_115: | |
6597 | nop | |
6598 | setx 0xfffffc82fffff5b8, %g1, %g7 | |
6599 | .word 0xa3800007 ! 155: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
6600 | #if (defined SPC || defined CMP1) | |
6601 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_116) + 16, 16, 16)) -> intp(2,0,22) | |
6602 | #else | |
6603 | setx 0x0fd9cff6bb6d38db, %r1, %r28 | |
6604 | stxa %r28, [%g0] 0x73 | |
6605 | #endif | |
6606 | intvec_20_116: | |
6607 | .word 0x39400001 ! 156: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6608 | .word 0xa9810004 ! 157: WR_SET_SOFTINT_R wr %r4, %r4, %set_softint | |
6609 | .word 0xa5702c7a ! 158: POPC_I popc 0x0c7a, %r18 | |
6610 | .word 0xa7b40591 ! 159: FCMPGT32 fcmpgt32 %d16, %d48, %r19 | |
6611 | ta T_CHANGE_NONHPRIV | |
6612 | .word 0x8143e011 ! 160: MEMBAR membar #LoadLoad | #Lookaside | |
6613 | splash_hpstate_20_119: | |
6614 | ta T_CHANGE_NONHPRIV | |
6615 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> | |
6616 | .word 0x81982456 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x0456, %hpstate | |
6617 | .word 0x8d903bab ! 162: WRPR_PSTATE_I wrpr %r0, 0x1bab, %pstate | |
6618 | otherw | |
6619 | mov 0xb1, %r30 | |
6620 | .word 0x83d0001e ! 163: Tcc_R te icc_or_xcc, %r0 + %r30 | |
6621 | .word 0xc19fdb60 ! 164: LDDFA_R ldda [%r31, %r0], %f0 | |
6622 | setx 0x0e7cf7561ecd5462, %r1, %r28 | |
6623 | stxa %r28, [%g0] 0x73 | |
6624 | intvec_20_121: | |
6625 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6626 | ibp_20_122: | |
6627 | nop | |
6628 | .word 0xe1bfc2c0 ! 166: STDFA_R stda %f16, [%r0, %r31] | |
6629 | splash_lsu_20_123: | |
6630 | nop | |
6631 | ta T_CHANGE_HPRIV | |
6632 | set 0xda1456a8, %r2 | |
6633 | mov 0x1, %r1 | |
6634 | sllx %r1, 32, %r1 | |
6635 | or %r1, %r2, %r2 | |
6636 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6637 | ta T_CHANGE_NONHPRIV | |
6638 | .word 0x3d400001 ! 167: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6639 | nop | |
6640 | mov 0x80, %g3 | |
6641 | stxa %g3, [%g3] 0x5f | |
6642 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6643 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
6644 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
6645 | .word 0xd05fc000 ! 168: LDX_R ldx [%r31 + %r0], %r8 | |
6646 | jmptr_20_124: | |
6647 | nop | |
6648 | best_set_reg(0xe1a00000, %r20, %r27) | |
6649 | .word 0xb7c6c000 ! 169: JMPL_R jmpl %r27 + %r0, %r27 | |
6650 | nop | |
6651 | ta T_CHANGE_HPRIV ! macro | |
6652 | donret_20_125: | |
6653 | rd %pc, %r12 | |
6654 | add %r12, (donretarg_20_125-donret_20_125), %r12 | |
6655 | add %r12, 0x8, %r11 ! nonseq tnpc | |
6656 | wrpr %g0, 0x1, %tl | |
6657 | wrpr %g0, %r12, %tpc | |
6658 | wrpr %g0, %r11, %tnpc | |
6659 | set (0x0020b600 | (32 << 24)), %r13 | |
6660 | and %r12, 0xfff, %r14 | |
6661 | sllx %r14, 30, %r14 | |
6662 | or %r13, %r14, %r20 | |
6663 | wrpr %r20, %g0, %tstate | |
6664 | wrhpr %g0, 0xe13, %htstate | |
6665 | ta T_CHANGE_NONHPRIV ! rand=1 (20) | |
6666 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> | |
6667 | done | |
6668 | donretarg_20_125: | |
6669 | .word 0x3f400001 ! 170: FBPO fbo,a,pn %fcc0, <label_0x1> | |
6670 | .word 0xe19fe1a0 ! 171: LDDFA_I ldda [%r31, 0x01a0], %f16 | |
6671 | trapasi_20_127: | |
6672 | nop | |
6673 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
6674 | .word 0xd0d84e60 ! 172: LDXA_R ldxa [%r1, %r0] 0x73, %r8 | |
6675 | .word 0x89800011 ! 173: WRTICK_R wr %r0, %r17, %tick | |
6676 | fpinit_20_129: | |
6677 | nop | |
6678 | setx fp_data_quads, %r19, %r20 | |
6679 | ldd [%r20], %f0 | |
6680 | ldd [%r20+8], %f4 | |
6681 | ld [%r20+16], %fsr | |
6682 | ld [%r20+24], %r19 | |
6683 | wr %r19, %g0, %gsr | |
6684 | .word 0x87a80a44 ! 174: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
6685 | .word 0x89800011 ! 175: WRTICK_R wr %r0, %r17, %tick | |
6686 | .word 0xd127e0c5 ! 176: STF_I st %f8, [0x00c5, %r31] | |
6687 | .word 0x89800011 ! 177: WRTICK_R wr %r0, %r17, %tick | |
6688 | .word 0xd077e12a ! 178: STX_I stx %r8, [%r31 + 0x012a] | |
6689 | #if (defined SPC || defined CMP1) | |
6690 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_132) + 56, 16, 16)) -> intp(0,0,30) | |
6691 | #else | |
6692 | setx 0x459a1e596e21e8d3, %r1, %r28 | |
6693 | stxa %r28, [%g0] 0x73 | |
6694 | #endif | |
6695 | intvec_20_132: | |
6696 | .word 0x39400001 ! 179: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6697 | .word 0x87802004 ! 180: WRASI_I wr %r0, 0x0004, %asi | |
6698 | setx 0x1b8d62c696426fff, %r1, %r28 | |
6699 | stxa %r28, [%g0] 0x73 | |
6700 | intvec_20_133: | |
6701 | .word 0x39400001 ! 181: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6702 | .word 0xd037e18c ! 182: STH_I sth %r8, [%r31 + 0x018c] | |
6703 | .word 0xd13fc008 ! 183: STDF_R std %f8, [%r8, %r31] | |
6704 | br_badelay2_20_135: | |
6705 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
6706 | allclean | |
6707 | .word 0x93b44303 ! 184: ALIGNADDRESS alignaddr %r17, %r3, %r9 | |
6708 | splash_tba_20_136: | |
6709 | nop | |
6710 | ta T_CHANGE_PRIV | |
6711 | set 0x120000, %r12 | |
6712 | .word 0x8b90000c ! 185: WRPR_TBA_R wrpr %r0, %r12, %tba | |
6713 | trapasi_20_137: | |
6714 | nop | |
6715 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
6716 | .word 0xe2d04a00 ! 186: LDSHA_R ldsha [%r1, %r0] 0x50, %r17 | |
6717 | ceter_20_138: | |
6718 | nop | |
6719 | ta T_CHANGE_HPRIV | |
6720 | mov 7, %r17 | |
6721 | sllx %r17, 60, %r17 | |
6722 | mov 0x18, %r16 | |
6723 | stxa %r17, [%r16]0x4c | |
6724 | ta T_CHANGE_NONHPRIV | |
6725 | .word 0xa3410000 ! 187: RDTICK rd %tick, %r17 | |
6726 | intveclr_20_139: | |
6727 | nop | |
6728 | ta T_CHANGE_HPRIV | |
6729 | setx 0x1134e3a8163b14ff, %r1, %r28 | |
6730 | stxa %r28, [%g0] 0x72 | |
6731 | .word 0x25400001 ! 188: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6732 | brcommon2_20_140: | |
6733 | nop | |
6734 | setx common_target, %r12, %r27 | |
6735 | ba,a .+12 | |
6736 | .word 0xd9148011 ! 1: LDQF_R - [%r18, %r17], %f12 | |
6737 | ba,a .+8 | |
6738 | jmpl %r27+0, %r27 | |
6739 | .word 0xe19fc3e0 ! 189: LDDFA_R ldda [%r31, %r0], %f16 | |
6740 | trapasi_20_141: | |
6741 | nop | |
6742 | mov 0x0, %r1 ! (VA for ASI 0x5a) | |
6743 | .word 0xe6884b40 ! 190: LDUBA_R lduba [%r1, %r0] 0x5a, %r19 | |
6744 | ibp_20_142: | |
6745 | nop | |
6746 | .word 0xa9a4c9cd ! 191: FDIVd fdivd %f50, %f44, %f20 | |
6747 | .word 0xd737e193 ! 192: STQF_I - %f11, [0x0193, %r31] | |
6748 | splash_cmpr_20_143: | |
6749 | mov 0, %r18 | |
6750 | sllx %r18, 63, %r18 | |
6751 | rd %tick, %r17 | |
6752 | add %r17, 0x80, %r17 | |
6753 | or %r17, %r18, %r17 | |
6754 | ta T_CHANGE_HPRIV | |
6755 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
6756 | .word 0xb3800011 ! 193: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
6757 | tagged_20_144: | |
6758 | tsubcctv %r20, 0x19ca, %r18 | |
6759 | .word 0xd607e104 ! 194: LDUW_I lduw [%r31 + 0x0104], %r11 | |
6760 | .word 0xa2ad0008 ! 195: ANDNcc_R andncc %r20, %r8, %r17 | |
6761 | .word 0xd4bfc020 ! 196: STDA_R stda %r10, [%r31 + %r0] 0x01 | |
6762 | intveclr_20_145: | |
6763 | nop | |
6764 | ta T_CHANGE_HPRIV | |
6765 | setx 0x5ec3de86a60cae63, %r1, %r28 | |
6766 | stxa %r28, [%g0] 0x72 | |
6767 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6768 | dvapa_20_146: | |
6769 | nop | |
6770 | ta T_CHANGE_HPRIV | |
6771 | mov 0xb0c, %r20 | |
6772 | mov 0x4, %r19 | |
6773 | sllx %r20, 23, %r20 | |
6774 | or %r19, %r20, %r19 | |
6775 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
6776 | mov 0x38, %r18 | |
6777 | stxa %r31, [%r18]0x58 | |
6778 | ta T_CHANGE_NONHPRIV | |
6779 | .word 0x9bb50491 ! 198: FCMPLE32 fcmple32 %d20, %d48, %r13 | |
6780 | ibp_20_147: | |
6781 | nop | |
6782 | ta T_CHANGE_NONHPRIV | |
6783 | .word 0xd897c034 ! 199: LDUHA_R lduha [%r31, %r20] 0x01, %r12 | |
6784 | .word 0x89800011 ! 200: WRTICK_R wr %r0, %r17, %tick | |
6785 | jmptr_20_149: | |
6786 | nop | |
6787 | best_set_reg(0xe1a00000, %r20, %r27) | |
6788 | .word 0xb7c6c000 ! 201: JMPL_R jmpl %r27 + %r0, %r27 | |
6789 | nop | |
6790 | nop | |
6791 | ta T_CHANGE_PRIV | |
6792 | wrpr %g0, %g0, %gl | |
6793 | nop | |
6794 | nop | |
6795 | setx join_lbl_0_0, %g1, %g2 | |
6796 | jmp %g2 | |
6797 | nop | |
6798 | fork_lbl_0_5: | |
6799 | ta T_CHANGE_NONHPRIV | |
6800 | splash_lsu_10_0: | |
6801 | nop | |
6802 | ta T_CHANGE_HPRIV | |
6803 | set 0xd0f40ecb, %r2 | |
6804 | mov 0x5, %r1 | |
6805 | sllx %r1, 32, %r1 | |
6806 | or %r1, %r2, %r2 | |
6807 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6808 | ta T_CHANGE_NONHPRIV | |
6809 | ibp_10_1: | |
6810 | nop | |
6811 | ta T_CHANGE_NONHPRIV | |
6812 | .word 0xc1bfe080 ! 1: STDFA_I stda %f0, [0x0080, %r31] | |
6813 | splash_lsu_10_2: | |
6814 | nop | |
6815 | ta T_CHANGE_HPRIV | |
6816 | set 0xfdea7bd1, %r2 | |
6817 | mov 0x3, %r1 | |
6818 | sllx %r1, 32, %r1 | |
6819 | or %r1, %r2, %r2 | |
6820 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6821 | ta T_CHANGE_NONHPRIV | |
6822 | .word 0x3d400001 ! 2: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6823 | splash_lsu_10_3: | |
6824 | nop | |
6825 | ta T_CHANGE_HPRIV | |
6826 | set 0xf89866ae, %r2 | |
6827 | mov 0x3, %r1 | |
6828 | sllx %r1, 32, %r1 | |
6829 | or %r1, %r2, %r2 | |
6830 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6831 | .word 0x3d400001 ! 3: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6832 | .word 0xe277e18c ! 4: STX_I stx %r17, [%r31 + 0x018c] | |
6833 | .word 0x30780001 ! 5: BPA <illegal instruction> | |
6834 | .word 0x93d020b2 ! 6: Tcc_I tne icc_or_xcc, %r0 + 178 | |
6835 | .word 0x89800011 ! 7: WRTICK_R wr %r0, %r17, %tick | |
6836 | splash_htba_10_5: | |
6837 | nop | |
6838 | ta T_CHANGE_HPRIV | |
6839 | setx 0x0000000000280000, %r11, %r12 | |
6840 | .word 0x8b98000c ! 8: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
6841 | .word 0xe2800c80 ! 9: LDUWA_R lduwa [%r0, %r0] 0x64, %r17 | |
6842 | .word 0xe23fc000 ! 10: STD_R std %r17, [%r31 + %r0] | |
6843 | splash_hpstate_10_7: | |
6844 | ta T_CHANGE_NONHPRIV | |
6845 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> | |
6846 | .word 0x81982795 ! 11: WRHPR_HPSTATE_I wrhpr %r0, 0x0795, %hpstate | |
6847 | .word 0x87acca4a ! 12: FCMPd fcmpd %fcc<n>, %f50, %f10 | |
6848 | .word 0xd4800b20 ! 13: LDUWA_R lduwa [%r0, %r0] 0x59, %r10 | |
6849 | setx 0x2f7198157593a5b0, %r1, %r28 | |
6850 | stxa %r28, [%g0] 0x73 | |
6851 | intvec_10_9: | |
6852 | .word 0x39400001 ! 14: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6853 | trapasi_10_10: | |
6854 | nop | |
6855 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
6856 | .word 0xd4d04a00 ! 15: LDSHA_R ldsha [%r1, %r0] 0x50, %r10 | |
6857 | ibp_10_11: | |
6858 | nop | |
6859 | .word 0x87a88a54 ! 16: FCMPd fcmpd %fcc<n>, %f2, %f20 | |
6860 | .word 0xe69fc540 ! 17: LDDA_R ldda [%r31, %r0] 0x2a, %r19 | |
6861 | brcommon3_10_12: | |
6862 | nop | |
6863 | setx common_target, %r12, %r27 | |
6864 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
6865 | ba,a .+12 | |
6866 | .word 0xe737e050 ! 1: STQF_I - %f19, [0x0050, %r31] | |
6867 | ba,a .+8 | |
6868 | jmpl %r27+0, %r27 | |
6869 | .word 0xe71fe0c0 ! 18: LDDF_I ldd [%r31, 0x00c0], %f19 | |
6870 | nop | |
6871 | mov 0x80, %g3 | |
6872 | stxa %g3, [%g3] 0x5f | |
6873 | .word 0xe65fc000 ! 19: LDX_R ldx [%r31 + %r0], %r19 | |
6874 | splash_hpstate_10_13: | |
6875 | .word 0x81983c4d ! 20: WRHPR_HPSTATE_I wrhpr %r0, 0x1c4d, %hpstate | |
6876 | intveclr_10_14: | |
6877 | nop | |
6878 | ta T_CHANGE_HPRIV | |
6879 | setx 0xc285ed67f257ba85, %r1, %r28 | |
6880 | stxa %r28, [%g0] 0x72 | |
6881 | ta T_CHANGE_NONHPRIV | |
6882 | .word 0x25400001 ! 21: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6883 | nop | |
6884 | ta T_CHANGE_HPRIV | |
6885 | mov 0x10+1, %r10 | |
6886 | set sync_thr_counter5, %r23 | |
6887 | #ifndef SPC | |
6888 | ldxa [%g0]0x63, %o1 | |
6889 | and %o1, 0x38, %o1 | |
6890 | add %o1, %r23, %r23 | |
6891 | sllx %o1, 5, %o3 !(CID*256) | |
6892 | #endif | |
6893 | cas [%r23],%g0,%r10 !lock | |
6894 | brnz %r10, cwq_10_15 | |
6895 | rd %asi, %r12 | |
6896 | wr %g0, 0x40, %asi | |
6897 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6898 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6899 | cmp %l1, 1 | |
6900 | bne cwq_10_15 | |
6901 | set CWQ_BASE, %l6 | |
6902 | #ifndef SPC | |
6903 | add %l6, %o3, %l6 | |
6904 | #endif | |
6905 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6906 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word | |
6907 | sllx %l2, 32, %l2 | |
6908 | stx %l2, [%l6 + 0x0] | |
6909 | membar #Sync | |
6910 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6911 | sub %l2, 0x40, %l2 | |
6912 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6913 | wr %r12, %g0, %asi | |
6914 | st %g0, [%r23] | |
6915 | cwq_10_15: | |
6916 | ta T_CHANGE_NONHPRIV | |
6917 | .word 0x9b414000 ! 22: RDPC rd %pc, %r13 | |
6918 | .word 0xd8d7e0f0 ! 23: LDSHA_I ldsha [%r31, + 0x00f0] %asi, %r12 | |
6919 | .word 0xc19fd960 ! 24: LDDFA_R ldda [%r31, %r0], %f0 | |
6920 | #if (defined SPC || defined CMP1) | |
6921 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_16) + 56, 16, 16)) -> intp(1,0,28) | |
6922 | #else | |
6923 | setx 0x2334cfdbfab63caf, %r1, %r28 | |
6924 | stxa %r28, [%g0] 0x73 | |
6925 | #endif | |
6926 | intvec_10_16: | |
6927 | .word 0x39400001 ! 25: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6928 | splash_tba_10_17: | |
6929 | nop | |
6930 | ta T_CHANGE_PRIV | |
6931 | setx 0x0000000000380000, %r11, %r12 | |
6932 | .word 0x8b90000c ! 26: WRPR_TBA_R wrpr %r0, %r12, %tba | |
6933 | nop | |
6934 | mov 0x80, %g3 | |
6935 | stxa %g3, [%g3] 0x5f | |
6936 | .word 0xd85fc000 ! 27: LDX_R ldx [%r31 + %r0], %r12 | |
6937 | .word 0xb1828010 ! 28: WR_STICK_REG_R wr %r10, %r16, %- | |
6938 | .word 0xd877e034 ! 29: STX_I stx %r12, [%r31 + 0x0034] | |
6939 | tagged_10_18: | |
6940 | tsubcctv %r12, 0x171e, %r17 | |
6941 | .word 0xd807e118 ! 30: LDUW_I lduw [%r31 + 0x0118], %r12 | |
6942 | .word 0x89800011 ! 31: WRTICK_R wr %r0, %r17, %tick | |
6943 | trapasi_10_20: | |
6944 | nop | |
6945 | mov 0x38, %r1 ! (VA for ASI 0x5b) | |
6946 | .word 0xd8d84b60 ! 32: LDXA_R ldxa [%r1, %r0] 0x5b, %r12 | |
6947 | fpinit_10_21: | |
6948 | nop | |
6949 | setx fp_data_quads, %r19, %r20 | |
6950 | ldd [%r20], %f0 | |
6951 | ldd [%r20+8], %f4 | |
6952 | ld [%r20+16], %fsr | |
6953 | ld [%r20+24], %r19 | |
6954 | wr %r19, %g0, %gsr | |
6955 | .word 0x91b00484 ! 33: FCMPLE32 fcmple32 %d0, %d4, %r8 | |
6956 | nop | |
6957 | ta T_CHANGE_HPRIV | |
6958 | mov 0x10+1, %r10 | |
6959 | set sync_thr_counter5, %r23 | |
6960 | #ifndef SPC | |
6961 | ldxa [%g0]0x63, %o1 | |
6962 | and %o1, 0x38, %o1 | |
6963 | add %o1, %r23, %r23 | |
6964 | sllx %o1, 5, %o3 !(CID*256) | |
6965 | #endif | |
6966 | cas [%r23],%g0,%r10 !lock | |
6967 | brnz %r10, cwq_10_22 | |
6968 | rd %asi, %r12 | |
6969 | wr %g0, 0x40, %asi | |
6970 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6971 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6972 | cmp %l1, 1 | |
6973 | bne cwq_10_22 | |
6974 | set CWQ_BASE, %l6 | |
6975 | #ifndef SPC | |
6976 | add %l6, %o3, %l6 | |
6977 | #endif | |
6978 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6979 | best_set_reg(0x20610090, %l1, %l2) !# Control Word | |
6980 | sllx %l2, 32, %l2 | |
6981 | stx %l2, [%l6 + 0x0] | |
6982 | membar #Sync | |
6983 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6984 | sub %l2, 0x40, %l2 | |
6985 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6986 | wr %r12, %g0, %asi | |
6987 | st %g0, [%r23] | |
6988 | cwq_10_22: | |
6989 | ta T_CHANGE_NONHPRIV | |
6990 | .word 0xa1414000 ! 34: RDPC rd %pc, %r16 | |
6991 | jmptr_10_23: | |
6992 | nop | |
6993 | best_set_reg(0xe0200000, %r20, %r27) | |
6994 | .word 0xb7c6c000 ! 35: JMPL_R jmpl %r27 + %r0, %r27 | |
6995 | nop | |
6996 | ta T_CHANGE_HPRIV ! macro | |
6997 | donret_10_24: | |
6998 | rd %pc, %r12 | |
6999 | add %r12, (donretarg_10_24-donret_10_24+4), %r12 | |
7000 | add %r12, 0x4, %r11 ! seq tnpc | |
7001 | wrpr %g0, 0x1, %tl | |
7002 | wrpr %g0, %r12, %tpc | |
7003 | wrpr %g0, %r11, %tnpc | |
7004 | set (0x00f5cf00 | (0x83 << 24)), %r13 | |
7005 | and %r12, 0xfff, %r14 | |
7006 | sllx %r14, 30, %r14 | |
7007 | or %r13, %r14, %r20 | |
7008 | wrpr %r20, %g0, %tstate | |
7009 | wrhpr %g0, 0x6d7, %htstate | |
7010 | ta T_CHANGE_NONHPRIV ! rand=1 (10) | |
7011 | retry | |
7012 | donretarg_10_24: | |
7013 | .word 0xd66fe0a4 ! 36: LDSTUB_I ldstub %r11, [%r31 + 0x00a4] | |
7014 | nop | |
7015 | ta T_CHANGE_HPRIV ! macro | |
7016 | donret_10_25: | |
7017 | rd %pc, %r12 | |
7018 | add %r12, (donretarg_10_25-donret_10_25+4), %r12 | |
7019 | add %r12, 0x4, %r11 ! seq tnpc | |
7020 | wrpr %g0, 0x2, %tl | |
7021 | wrpr %g0, %r12, %tpc | |
7022 | wrpr %g0, %r11, %tnpc | |
7023 | set (0x0013fc00 | (16 << 24)), %r13 | |
7024 | and %r12, 0xfff, %r14 | |
7025 | sllx %r14, 30, %r14 | |
7026 | or %r13, %r14, %r20 | |
7027 | wrpr %r20, %g0, %tstate | |
7028 | wrhpr %g0, 0x174d, %htstate | |
7029 | ta T_CHANGE_NONHPRIV ! rand=1 (10) | |
7030 | done | |
7031 | donretarg_10_25: | |
7032 | .word 0x3e800001 ! 37: BVC bvc,a <label_0x1> | |
7033 | fpinit_10_26: | |
7034 | nop | |
7035 | setx fp_data_quads, %r19, %r20 | |
7036 | ldd [%r20], %f0 | |
7037 | ldd [%r20+8], %f4 | |
7038 | ld [%r20+16], %fsr | |
7039 | ld [%r20+24], %r19 | |
7040 | wr %r19, %g0, %gsr | |
7041 | .word 0x87a80a44 ! 38: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
7042 | nop | |
7043 | mov 0x80, %g3 | |
7044 | stxa %g3, [%g3] 0x57 | |
7045 | .word 0xd65fc000 ! 39: LDX_R ldx [%r31 + %r0], %r11 | |
7046 | nop | |
7047 | mov 0x80, %g3 | |
7048 | stxa %g3, [%g3] 0x5f | |
7049 | .word 0xd65fc000 ! 40: LDX_R ldx [%r31 + %r0], %r11 | |
7050 | mondo_10_27: | |
7051 | nop | |
7052 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7053 | ta T_CHANGE_PRIV | |
7054 | stxa %r6, [%r0+0x3c0] %asi | |
7055 | .word 0x9d928010 ! 41: WRPR_WSTATE_R wrpr %r10, %r16, %wstate | |
7056 | ibp_10_28: | |
7057 | nop | |
7058 | ta T_CHANGE_NONHPRIV | |
7059 | .word 0xd6dfc031 ! 42: LDXA_R ldxa [%r31, %r17] 0x01, %r11 | |
7060 | fpinit_10_29: | |
7061 | nop | |
7062 | setx fp_data_quads, %r19, %r20 | |
7063 | ldd [%r20], %f0 | |
7064 | ldd [%r20+8], %f4 | |
7065 | ld [%r20+16], %fsr | |
7066 | ld [%r20+24], %r19 | |
7067 | wr %r19, %g0, %gsr | |
7068 | .word 0xc3e83df7 ! 43: PREFETCHA_I prefetcha [%r0, + 0xfffffdf7] %asi, #one_read | |
7069 | nop | |
7070 | ta T_CHANGE_HPRIV | |
7071 | mov 0x10+1, %r10 | |
7072 | set sync_thr_counter5, %r23 | |
7073 | #ifndef SPC | |
7074 | ldxa [%g0]0x63, %o1 | |
7075 | and %o1, 0x38, %o1 | |
7076 | add %o1, %r23, %r23 | |
7077 | sllx %o1, 5, %o3 !(CID*256) | |
7078 | #endif | |
7079 | cas [%r23],%g0,%r10 !lock | |
7080 | brnz %r10, cwq_10_30 | |
7081 | rd %asi, %r12 | |
7082 | wr %g0, 0x40, %asi | |
7083 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
7084 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
7085 | cmp %l1, 1 | |
7086 | bne cwq_10_30 | |
7087 | set CWQ_BASE, %l6 | |
7088 | #ifndef SPC | |
7089 | add %l6, %o3, %l6 | |
7090 | #endif | |
7091 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
7092 | best_set_reg(0x20610010, %l1, %l2) !# Control Word | |
7093 | sllx %l2, 32, %l2 | |
7094 | stx %l2, [%l6 + 0x0] | |
7095 | membar #Sync | |
7096 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
7097 | sub %l2, 0x40, %l2 | |
7098 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
7099 | wr %r12, %g0, %asi | |
7100 | st %g0, [%r23] | |
7101 | cwq_10_30: | |
7102 | ta T_CHANGE_NONHPRIV | |
7103 | .word 0x99414000 ! 44: RDPC rd %pc, %r12 | |
7104 | .word 0xe4dfe130 ! 45: LDXA_I ldxa [%r31, + 0x0130] %asi, %r18 | |
7105 | .word 0x95b4c491 ! 46: FCMPLE32 fcmple32 %d50, %d48, %r10 | |
7106 | ibp_10_32: | |
7107 | nop | |
7108 | .word 0x99b4c490 ! 47: FCMPLE32 fcmple32 %d50, %d16, %r12 | |
7109 | nop | |
7110 | ta T_CHANGE_HPRIV | |
7111 | mov 0x10, %r10 | |
7112 | set sync_thr_counter6, %r23 | |
7113 | #ifndef SPC | |
7114 | ldxa [%g0]0x63, %o1 | |
7115 | and %o1, 0x38, %o1 | |
7116 | add %o1, %r23, %r23 | |
7117 | #endif | |
7118 | cas [%r23],%g0,%r10 !lock | |
7119 | brnz %r10, sma_10_33 | |
7120 | rd %asi, %r12 | |
7121 | wr %g0, 0x40, %asi | |
7122 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
7123 | set 0x001a1fff, %g1 | |
7124 | stxa %g1, [%g0 + 0x80] %asi | |
7125 | wr %r12, %g0, %asi | |
7126 | st %g0, [%r23] | |
7127 | sma_10_33: | |
7128 | ta T_CHANGE_NONHPRIV | |
7129 | .word 0xe5e7e008 ! 48: CASA_R casa [%r31] %asi, %r8, %r18 | |
7130 | change_to_randtl_10_34: | |
7131 | ta T_CHANGE_PRIV ! macro | |
7132 | done_change_to_randtl_10_34: | |
7133 | .word 0x8f902000 ! 49: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
7134 | .word 0xe1bfdc00 ! 50: STDFA_R stda %f16, [%r0, %r31] | |
7135 | pmu_10_35: | |
7136 | nop | |
7137 | setx 0xfffff31efffff220, %g1, %g7 | |
7138 | .word 0xa3800007 ! 51: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
7139 | splash_cmpr_10_36: | |
7140 | mov 0, %r18 | |
7141 | sllx %r18, 63, %r18 | |
7142 | rd %tick, %r17 | |
7143 | add %r17, 0x100, %r17 | |
7144 | or %r17, %r18, %r17 | |
7145 | ta T_CHANGE_HPRIV | |
7146 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
7147 | ta T_CHANGE_PRIV | |
7148 | .word 0xaf800011 ! 52: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
7149 | nop | |
7150 | ta T_CHANGE_HPRIV ! macro | |
7151 | donret_10_37: | |
7152 | rd %pc, %r12 | |
7153 | add %r12, (donretarg_10_37-donret_10_37), %r12 | |
7154 | add %r12, 0x4, %r11 ! seq tnpc | |
7155 | wrpr %g0, 0x1, %tl | |
7156 | wrpr %g0, %r12, %tpc | |
7157 | wrpr %g0, %r11, %tnpc | |
7158 | set (0x004fc600 | (22 << 24)), %r13 | |
7159 | and %r12, 0xfff, %r14 | |
7160 | sllx %r14, 30, %r14 | |
7161 | or %r13, %r14, %r20 | |
7162 | wrpr %r20, %g0, %tstate | |
7163 | wrhpr %g0, 0x1d4f, %htstate | |
7164 | ta T_CHANGE_NONPRIV ! rand=0 (10) | |
7165 | done | |
7166 | donretarg_10_37: | |
7167 | .word 0xe4ffe055 ! 53: SWAPA_I swapa %r18, [%r31 + 0x0055] %asi | |
7168 | .word 0x95508000 ! 54: RDPR_TSTATE <illegal instruction> | |
7169 | brcommon1_10_38: | |
7170 | nop | |
7171 | setx common_target, %r12, %r27 | |
7172 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
7173 | ba,a .+12 | |
7174 | .word 0xc32fe1f0 ! 1: STXFSR_I st-sfr %f1, [0x01f0, %r31] | |
7175 | ba,a .+8 | |
7176 | jmpl %r27+0, %r27 | |
7177 | .word 0x95b4c7c5 ! 55: PDIST pdistn %d50, %d36, %d10 | |
7178 | trapasi_10_39: | |
7179 | nop | |
7180 | mov 0x10, %r1 ! (VA for ASI 0x4c) | |
7181 | .word 0xd8c04980 ! 56: LDSWA_R ldswa [%r1, %r0] 0x4c, %r12 | |
7182 | nop | |
7183 | ta T_CHANGE_HPRIV | |
7184 | mov 0x10, %r10 | |
7185 | set sync_thr_counter6, %r23 | |
7186 | #ifndef SPC | |
7187 | ldxa [%g0]0x63, %o1 | |
7188 | and %o1, 0x38, %o1 | |
7189 | add %o1, %r23, %r23 | |
7190 | #endif | |
7191 | cas [%r23],%g0,%r10 !lock | |
7192 | brnz %r10, sma_10_40 | |
7193 | rd %asi, %r12 | |
7194 | wr %g0, 0x40, %asi | |
7195 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
7196 | set 0x001a1fff, %g1 | |
7197 | stxa %g1, [%g0 + 0x80] %asi | |
7198 | wr %r12, %g0, %asi | |
7199 | st %g0, [%r23] | |
7200 | sma_10_40: | |
7201 | ta T_CHANGE_NONHPRIV | |
7202 | .word 0xd9e7e012 ! 57: CASA_R casa [%r31] %asi, %r18, %r12 | |
7203 | .word 0xc32fc000 ! 58: STXFSR_R st-sfr %f1, [%r0, %r31] | |
7204 | nop | |
7205 | ta T_CHANGE_HPRIV ! macro | |
7206 | donret_10_42: | |
7207 | rd %pc, %r12 | |
7208 | add %r12, (donretarg_10_42-donret_10_42+4), %r12 | |
7209 | add %r12, 0x4, %r11 ! seq tnpc | |
7210 | wrpr %g0, 0x1, %tl | |
7211 | wrpr %g0, %r12, %tpc | |
7212 | wrpr %g0, %r11, %tnpc | |
7213 | set (0x0006be00 | (0x80 << 24)), %r13 | |
7214 | and %r12, 0xfff, %r14 | |
7215 | sllx %r14, 30, %r14 | |
7216 | or %r13, %r14, %r20 | |
7217 | wrpr %r20, %g0, %tstate | |
7218 | wrhpr %g0, 0xa87, %htstate | |
7219 | ta T_CHANGE_NONHPRIV ! rand=1 (10) | |
7220 | .word 0x26800001 ! 1: BL bl,a <label_0x1> | |
7221 | retry | |
7222 | donretarg_10_42: | |
7223 | .word 0xd86fe0af ! 59: LDSTUB_I ldstub %r12, [%r31 + 0x00af] | |
7224 | .word 0x99b4c485 ! 60: FCMPLE32 fcmple32 %d50, %d36, %r12 | |
7225 | splash_hpstate_10_44: | |
7226 | .word 0x26cc4001 ! 1: BRLZ brlz,a,pt %r17,<label_0xc4001> | |
7227 | .word 0x81983f41 ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x1f41, %hpstate | |
7228 | nop | |
7229 | ta T_CHANGE_HPRIV ! macro | |
7230 | donret_10_45: | |
7231 | rd %pc, %r12 | |
7232 | add %r12, (donretarg_10_45-donret_10_45), %r12 | |
7233 | add %r12, 0x4, %r11 ! seq tnpc | |
7234 | wrpr %g0, 0x2, %tl | |
7235 | wrpr %g0, %r12, %tpc | |
7236 | wrpr %g0, %r11, %tnpc | |
7237 | set (0x00748100 | (16 << 24)), %r13 | |
7238 | and %r12, 0xfff, %r14 | |
7239 | sllx %r14, 30, %r14 | |
7240 | or %r13, %r14, %r20 | |
7241 | wrpr %r20, %g0, %tstate | |
7242 | wrhpr %g0, 0x71b, %htstate | |
7243 | ta T_CHANGE_NONHPRIV ! rand=1 (10) | |
7244 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> | |
7245 | done | |
7246 | donretarg_10_45: | |
7247 | .word 0x37400001 ! 62: FBPGE fbge,a,pn %fcc0, <label_0x1> | |
7248 | .word 0xe0c7e0f8 ! 63: LDSWA_I ldswa [%r31, + 0x00f8] %asi, %r16 | |
7249 | trapasi_10_46: | |
7250 | nop | |
7251 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
7252 | .word 0xe0884e60 ! 64: LDUBA_R lduba [%r1, %r0] 0x73, %r16 | |
7253 | jmptr_10_47: | |
7254 | nop | |
7255 | best_set_reg(0xe0200000, %r20, %r27) | |
7256 | .word 0xb7c6c000 ! 65: JMPL_R jmpl %r27 + %r0, %r27 | |
7257 | pmu_10_48: | |
7258 | nop | |
7259 | setx 0xfffffd67fffff3f8, %g1, %g7 | |
7260 | .word 0xa3800007 ! 66: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
7261 | ibp_10_49: | |
7262 | nop | |
7263 | .word 0xe1e7e011 ! 67: CASA_R casa [%r31] %asi, %r17, %r16 | |
7264 | fpinit_10_50: | |
7265 | nop | |
7266 | setx fp_data_quads, %r19, %r20 | |
7267 | ldd [%r20], %f0 | |
7268 | ldd [%r20+8], %f4 | |
7269 | ld [%r20+16], %fsr | |
7270 | ld [%r20+24], %r19 | |
7271 | wr %r19, %g0, %gsr | |
7272 | .word 0x91b00484 ! 68: FCMPLE32 fcmple32 %d0, %d4, %r8 | |
7273 | splash_tba_10_51: | |
7274 | nop | |
7275 | ta T_CHANGE_PRIV | |
7276 | setx 0x0000000000380000, %r11, %r12 | |
7277 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
7278 | nop | |
7279 | mov 0x80, %g3 | |
7280 | stxa %g3, [%g3] 0x57 | |
7281 | .word 0xe05fc000 ! 70: LDX_R ldx [%r31 + %r0], %r16 | |
7282 | .word 0xe0800c20 ! 71: LDUWA_R lduwa [%r0, %r0] 0x61, %r16 | |
7283 | .word 0xa7b507d1 ! 72: PDIST pdistn %d20, %d48, %d50 | |
7284 | .word 0xd4800b00 ! 73: LDUWA_R lduwa [%r0, %r0] 0x58, %r10 | |
7285 | fpinit_10_53: | |
7286 | nop | |
7287 | setx fp_data_quads, %r19, %r20 | |
7288 | ldd [%r20], %f0 | |
7289 | ldd [%r20+8], %f4 | |
7290 | ld [%r20+16], %fsr | |
7291 | ld [%r20+24], %r19 | |
7292 | wr %r19, %g0, %gsr | |
7293 | .word 0xc3e838fc ! 74: PREFETCHA_I prefetcha [%r0, + 0xfffff8fc] %asi, #one_read | |
7294 | nop | |
7295 | ta T_CHANGE_HPRIV | |
7296 | mov 0x10+1, %r10 | |
7297 | set sync_thr_counter5, %r23 | |
7298 | #ifndef SPC | |
7299 | ldxa [%g0]0x63, %o1 | |
7300 | and %o1, 0x38, %o1 | |
7301 | add %o1, %r23, %r23 | |
7302 | sllx %o1, 5, %o3 !(CID*256) | |
7303 | #endif | |
7304 | cas [%r23],%g0,%r10 !lock | |
7305 | brnz %r10, cwq_10_54 | |
7306 | rd %asi, %r12 | |
7307 | wr %g0, 0x40, %asi | |
7308 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
7309 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
7310 | cmp %l1, 1 | |
7311 | bne cwq_10_54 | |
7312 | set CWQ_BASE, %l6 | |
7313 | #ifndef SPC | |
7314 | add %l6, %o3, %l6 | |
7315 | #endif | |
7316 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
7317 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
7318 | sllx %l2, 32, %l2 | |
7319 | stx %l2, [%l6 + 0x0] | |
7320 | membar #Sync | |
7321 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
7322 | sub %l2, 0x40, %l2 | |
7323 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
7324 | wr %r12, %g0, %asi | |
7325 | st %g0, [%r23] | |
7326 | cwq_10_54: | |
7327 | ta T_CHANGE_NONHPRIV | |
7328 | .word 0xa9414000 ! 75: RDPC rd %pc, %r20 | |
7329 | .word 0x91944010 ! 76: WRPR_PIL_R wrpr %r17, %r16, %pil | |
7330 | #if (defined SPC || defined CMP1) | |
7331 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_56) + 32, 16, 16)) -> intp(6,0,12) | |
7332 | #else | |
7333 | setx 0x5095d35bccee1e24, %r1, %r28 | |
7334 | stxa %r28, [%g0] 0x73 | |
7335 | #endif | |
7336 | intvec_10_56: | |
7337 | .word 0x39400001 ! 77: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7338 | intveclr_10_57: | |
7339 | nop | |
7340 | ta T_CHANGE_HPRIV | |
7341 | setx 0xe05fbe75fb15334b, %r1, %r28 | |
7342 | stxa %r28, [%g0] 0x72 | |
7343 | ta T_CHANGE_NONHPRIV | |
7344 | .word 0x25400001 ! 78: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7345 | .word 0xd6bfe0e0 ! 79: STDA_I stda %r11, [%r31 + 0x00e0] %asi | |
7346 | .word 0xd737c000 ! 80: STQF_R - %f11, [%r0, %r31] | |
7347 | ceter_10_58: | |
7348 | nop | |
7349 | ta T_CHANGE_HPRIV | |
7350 | mov 7, %r17 | |
7351 | sllx %r17, 60, %r17 | |
7352 | mov 0x18, %r16 | |
7353 | stxa %r17, [%r16]0x4c | |
7354 | ta T_CHANGE_NONHPRIV | |
7355 | .word 0x99410000 ! 81: RDTICK rd %tick, %r12 | |
7356 | brcommon3_10_59: | |
7357 | nop | |
7358 | setx common_target, %r12, %r27 | |
7359 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
7360 | ba,a .+12 | |
7361 | .word 0xd66fe000 ! 1: LDSTUB_I ldstub %r11, [%r31 + 0x0000] | |
7362 | ba,a .+8 | |
7363 | jmpl %r27+0, %r27 | |
7364 | .word 0xd63fe130 ! 82: STD_I std %r11, [%r31 + 0x0130] | |
7365 | .word 0xd68008a0 ! 83: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
7366 | jmptr_10_60: | |
7367 | nop | |
7368 | best_set_reg(0xe0200000, %r20, %r27) | |
7369 | .word 0xb7c6c000 ! 84: JMPL_R jmpl %r27 + %r0, %r27 | |
7370 | setx 0x94dbeb338d022355, %r1, %r28 | |
7371 | stxa %r28, [%g0] 0x73 | |
7372 | intvec_10_61: | |
7373 | .word 0x39400001 ! 85: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7374 | nop | |
7375 | ta T_CHANGE_HPRIV | |
7376 | mov 0x10+1, %r10 | |
7377 | set sync_thr_counter5, %r23 | |
7378 | #ifndef SPC | |
7379 | ldxa [%g0]0x63, %o1 | |
7380 | and %o1, 0x38, %o1 | |
7381 | add %o1, %r23, %r23 | |
7382 | sllx %o1, 5, %o3 !(CID*256) | |
7383 | #endif | |
7384 | cas [%r23],%g0,%r10 !lock | |
7385 | brnz %r10, cwq_10_62 | |
7386 | rd %asi, %r12 | |
7387 | wr %g0, 0x40, %asi | |
7388 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
7389 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
7390 | cmp %l1, 1 | |
7391 | bne cwq_10_62 | |
7392 | set CWQ_BASE, %l6 | |
7393 | #ifndef SPC | |
7394 | add %l6, %o3, %l6 | |
7395 | #endif | |
7396 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
7397 | best_set_reg(0x20610050, %l1, %l2) !# Control Word | |
7398 | sllx %l2, 32, %l2 | |
7399 | stx %l2, [%l6 + 0x0] | |
7400 | membar #Sync | |
7401 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
7402 | sub %l2, 0x40, %l2 | |
7403 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
7404 | wr %r12, %g0, %asi | |
7405 | st %g0, [%r23] | |
7406 | cwq_10_62: | |
7407 | ta T_CHANGE_NONHPRIV | |
7408 | .word 0xa5414000 ! 86: RDPC rd %pc, %r18 | |
7409 | .word 0xe28008a0 ! 87: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
7410 | ibp_10_63: | |
7411 | nop | |
7412 | .word 0xe1bfc3e0 ! 88: STDFA_R stda %f16, [%r0, %r31] | |
7413 | ibp_10_64: | |
7414 | nop | |
7415 | ta T_CHANGE_NONHPRIV | |
7416 | .word 0xe2dfc031 ! 89: LDXA_R ldxa [%r31, %r17] 0x01, %r17 | |
7417 | jmptr_10_65: | |
7418 | nop | |
7419 | best_set_reg(0xe0200000, %r20, %r27) | |
7420 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
7421 | .word 0xe22fe0d2 ! 91: STB_I stb %r17, [%r31 + 0x00d2] | |
7422 | .word 0xe19fdb60 ! 92: LDDFA_R ldda [%r31, %r0], %f16 | |
7423 | .word 0x89800011 ! 93: WRTICK_R wr %r0, %r17, %tick | |
7424 | .word 0xe3e7c02c ! 94: CASA_I casa [%r31] 0x 1, %r12, %r17 | |
7425 | setx 0x8e43724a842a4de0, %r1, %r28 | |
7426 | stxa %r28, [%g0] 0x73 | |
7427 | intvec_10_67: | |
7428 | .word 0x39400001 ! 95: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7429 | nop | |
7430 | mov 0x80, %g3 | |
7431 | stxa %g3, [%g3] 0x5f | |
7432 | .word 0xe25fc000 ! 96: LDX_R ldx [%r31 + %r0], %r17 | |
7433 | mondo_10_68: | |
7434 | nop | |
7435 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7436 | ta T_CHANGE_PRIV | |
7437 | stxa %r7, [%r0+0x3e8] %asi | |
7438 | .word 0x9d94400a ! 97: WRPR_WSTATE_R wrpr %r17, %r10, %wstate | |
7439 | fpinit_10_69: | |
7440 | nop | |
7441 | setx fp_data_quads, %r19, %r20 | |
7442 | ldd [%r20], %f0 | |
7443 | ldd [%r20+8], %f4 | |
7444 | ld [%r20+16], %fsr | |
7445 | ld [%r20+24], %r19 | |
7446 | wr %r19, %g0, %gsr | |
7447 | .word 0x87a80a44 ! 98: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
7448 | .word 0xa1902008 ! 99: WRPR_GL_I wrpr %r0, 0x0008, %- | |
7449 | mondo_10_70: | |
7450 | nop | |
7451 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7452 | ta T_CHANGE_PRIV | |
7453 | stxa %r20, [%r0+0x3d0] %asi | |
7454 | .word 0x9d90c014 ! 100: WRPR_WSTATE_R wrpr %r3, %r20, %wstate | |
7455 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
7456 | reduce_priv_lvl_10_71: | |
7457 | ta T_CHANGE_NONHPRIV ! macro | |
7458 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
7459 | .word 0x8d802000 ! 103: WRFPRS_I wr %r0, 0x0000, %fprs | |
7460 | splash_hpstate_10_73: | |
7461 | ta T_CHANGE_NONHPRIV | |
7462 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> | |
7463 | .word 0x81983383 ! 104: WRHPR_HPSTATE_I wrhpr %r0, 0x1383, %hpstate | |
7464 | splash_hpstate_10_74: | |
7465 | ta T_CHANGE_NONHPRIV | |
7466 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
7467 | .word 0x81983dc5 ! 105: WRHPR_HPSTATE_I wrhpr %r0, 0x1dc5, %hpstate | |
7468 | .word 0x91934004 ! 106: WRPR_PIL_R wrpr %r13, %r4, %pil | |
7469 | trapasi_10_76: | |
7470 | nop | |
7471 | mov 0x28, %r1 ! (VA for ASI 0x5a) | |
7472 | .word 0xe2884b40 ! 107: LDUBA_R lduba [%r1, %r0] 0x5a, %r17 | |
7473 | mondo_10_77: | |
7474 | nop | |
7475 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7476 | stxa %r16, [%r0+0x3d8] %asi | |
7477 | .word 0x9d950013 ! 108: WRPR_WSTATE_R wrpr %r20, %r19, %wstate | |
7478 | dvapa_10_78: | |
7479 | nop | |
7480 | ta T_CHANGE_HPRIV | |
7481 | mov 0xcec, %r20 | |
7482 | mov 0x13, %r19 | |
7483 | sllx %r20, 23, %r20 | |
7484 | or %r19, %r20, %r19 | |
7485 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
7486 | mov 0x38, %r18 | |
7487 | stxa %r31, [%r18]0x58 | |
7488 | ta T_CHANGE_NONHPRIV | |
7489 | .word 0x87aaca50 ! 109: FCMPd fcmpd %fcc<n>, %f42, %f16 | |
7490 | .word 0xe727c000 ! 110: STF_R st %f19, [%r0, %r31] | |
7491 | ibp_10_79: | |
7492 | nop | |
7493 | ta T_CHANGE_NONHPRIV | |
7494 | .word 0xe71fc012 ! 111: LDDF_R ldd [%r31, %r18], %f19 | |
7495 | splash_lsu_10_80: | |
7496 | nop | |
7497 | ta T_CHANGE_HPRIV | |
7498 | set 0xcf34f9d2, %r2 | |
7499 | mov 0x3, %r1 | |
7500 | sllx %r1, 32, %r1 | |
7501 | or %r1, %r2, %r2 | |
7502 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7503 | .word 0x3d400001 ! 112: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7504 | jmptr_10_81: | |
7505 | nop | |
7506 | best_set_reg(0xe0200000, %r20, %r27) | |
7507 | .word 0xb7c6c000 ! 113: JMPL_R jmpl %r27 + %r0, %r27 | |
7508 | intveclr_10_82: | |
7509 | nop | |
7510 | ta T_CHANGE_HPRIV | |
7511 | setx 0x674a23f08b643e18, %r1, %r28 | |
7512 | stxa %r28, [%g0] 0x72 | |
7513 | ta T_CHANGE_NONHPRIV | |
7514 | .word 0x25400001 ! 114: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7515 | intveclr_10_83: | |
7516 | nop | |
7517 | ta T_CHANGE_HPRIV | |
7518 | setx 0xa9581f887c6b083b, %r1, %r28 | |
7519 | stxa %r28, [%g0] 0x72 | |
7520 | .word 0x25400001 ! 115: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7521 | .word 0xa1902003 ! 116: WRPR_GL_I wrpr %r0, 0x0003, %- | |
7522 | nop | |
7523 | ta T_CHANGE_HPRIV | |
7524 | mov 0x10+1, %r10 | |
7525 | set sync_thr_counter5, %r23 | |
7526 | #ifndef SPC | |
7527 | ldxa [%g0]0x63, %o1 | |
7528 | and %o1, 0x38, %o1 | |
7529 | add %o1, %r23, %r23 | |
7530 | sllx %o1, 5, %o3 !(CID*256) | |
7531 | #endif | |
7532 | cas [%r23],%g0,%r10 !lock | |
7533 | brnz %r10, cwq_10_84 | |
7534 | rd %asi, %r12 | |
7535 | wr %g0, 0x40, %asi | |
7536 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
7537 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
7538 | cmp %l1, 1 | |
7539 | bne cwq_10_84 | |
7540 | set CWQ_BASE, %l6 | |
7541 | #ifndef SPC | |
7542 | add %l6, %o3, %l6 | |
7543 | #endif | |
7544 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
7545 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
7546 | sllx %l2, 32, %l2 | |
7547 | stx %l2, [%l6 + 0x0] | |
7548 | membar #Sync | |
7549 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
7550 | sub %l2, 0x40, %l2 | |
7551 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
7552 | wr %r12, %g0, %asi | |
7553 | st %g0, [%r23] | |
7554 | cwq_10_84: | |
7555 | ta T_CHANGE_NONHPRIV | |
7556 | .word 0xa7414000 ! 117: RDPC rd %pc, %r19 | |
7557 | fpinit_10_85: | |
7558 | nop | |
7559 | setx fp_data_quads, %r19, %r20 | |
7560 | ldd [%r20], %f0 | |
7561 | ldd [%r20+8], %f4 | |
7562 | ld [%r20+16], %fsr | |
7563 | ld [%r20+24], %r19 | |
7564 | wr %r19, %g0, %gsr | |
7565 | .word 0x89b00484 ! 118: FCMPLE32 fcmple32 %d0, %d4, %r4 | |
7566 | ibp_10_86: | |
7567 | nop | |
7568 | .word 0xd297c02b ! 119: LDUHA_R lduha [%r31, %r11] 0x01, %r9 | |
7569 | setx 0xdb83798a2307b056, %r1, %r28 | |
7570 | stxa %r28, [%g0] 0x73 | |
7571 | intvec_10_87: | |
7572 | .word 0x39400001 ! 120: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7573 | #if (defined SPC || defined CMP1) | |
7574 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_88) + 8, 16, 16)) -> intp(7,0,26) | |
7575 | #else | |
7576 | setx 0xfb3390d5aea4784d, %r1, %r28 | |
7577 | stxa %r28, [%g0] 0x73 | |
7578 | #endif | |
7579 | intvec_10_88: | |
7580 | .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7581 | .word 0x89800011 ! 122: WRTICK_R wr %r0, %r17, %tick | |
7582 | .word 0x87ac4a52 ! 123: FCMPd fcmpd %fcc<n>, %f48, %f18 | |
7583 | mondo_10_91: | |
7584 | nop | |
7585 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7586 | stxa %r6, [%r0+0x3c0] %asi | |
7587 | .word 0x9d944012 ! 124: WRPR_WSTATE_R wrpr %r17, %r18, %wstate | |
7588 | .word 0x8d802004 ! 125: WRFPRS_I wr %r0, 0x0004, %fprs | |
7589 | ibp_10_92: | |
7590 | nop | |
7591 | ta T_CHANGE_NONHPRIV | |
7592 | .word 0xc3eb0032 ! 126: PREFETCHA_R prefetcha [%r12, %r18] 0x01, #one_read | |
7593 | .word 0x8d802000 ! 127: WRFPRS_I wr %r0, 0x0000, %fprs | |
7594 | .word 0x8d802000 ! 128: WRFPRS_I wr %r0, 0x0000, %fprs | |
7595 | .word 0xa1a449c7 ! 129: FDIVd fdivd %f48, %f38, %f16 | |
7596 | invalw | |
7597 | mov 0x34, %r30 | |
7598 | .word 0x83d0001e ! 130: Tcc_R te icc_or_xcc, %r0 + %r30 | |
7599 | fpinit_10_94: | |
7600 | nop | |
7601 | setx fp_data_quads, %r19, %r20 | |
7602 | ldd [%r20], %f0 | |
7603 | ldd [%r20+8], %f4 | |
7604 | ld [%r20+16], %fsr | |
7605 | ld [%r20+24], %r19 | |
7606 | wr %r19, %g0, %gsr | |
7607 | .word 0x8da009c4 ! 131: FDIVd fdivd %f0, %f4, %f6 | |
7608 | intveclr_10_95: | |
7609 | nop | |
7610 | ta T_CHANGE_HPRIV | |
7611 | setx 0x2ec129822fbe617d, %r1, %r28 | |
7612 | stxa %r28, [%g0] 0x72 | |
7613 | ta T_CHANGE_NONHPRIV | |
7614 | .word 0x25400001 ! 132: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7615 | intveclr_10_96: | |
7616 | nop | |
7617 | ta T_CHANGE_HPRIV | |
7618 | setx 0x5320ff67f3aa8d8d, %r1, %r28 | |
7619 | stxa %r28, [%g0] 0x72 | |
7620 | .word 0x25400001 ! 133: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7621 | setx 0x2b1a34fec1345541, %r1, %r28 | |
7622 | stxa %r28, [%g0] 0x73 | |
7623 | intvec_10_97: | |
7624 | .word 0x39400001 ! 134: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7625 | .word 0x91908013 ! 135: WRPR_PIL_R wrpr %r2, %r19, %pil | |
7626 | .word 0x9ba00164 ! 136: FABSq dis not found | |
7627 | ||
7628 | mondo_10_100: | |
7629 | nop | |
7630 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7631 | ta T_CHANGE_PRIV | |
7632 | stxa %r8, [%r0+0x3c0] %asi | |
7633 | .word 0x9d910012 ! 137: WRPR_WSTATE_R wrpr %r4, %r18, %wstate | |
7634 | splash_cmpr_10_101: | |
7635 | mov 0, %r18 | |
7636 | sllx %r18, 63, %r18 | |
7637 | rd %tick, %r17 | |
7638 | add %r17, 0x100, %r17 | |
7639 | or %r17, %r18, %r17 | |
7640 | ta T_CHANGE_PRIV | |
7641 | .word 0xaf800011 ! 138: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
7642 | .word 0xc32fc000 ! 139: STXFSR_R st-sfr %f1, [%r0, %r31] | |
7643 | intveclr_10_103: | |
7644 | nop | |
7645 | ta T_CHANGE_HPRIV | |
7646 | setx 0xc7e442c6e8f53d70, %r1, %r28 | |
7647 | stxa %r28, [%g0] 0x72 | |
7648 | .word 0x25400001 ! 140: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7649 | .word 0xa7823c36 ! 141: WR_GRAPHICS_STATUS_REG_I wr %r8, 0x1c36, %- | |
7650 | .word 0x91d020b4 ! 142: Tcc_I ta icc_or_xcc, %r0 + 180 | |
7651 | .word 0xa9a00163 ! 143: FABSq dis not found | |
7652 | ||
7653 | splash_cmpr_10_105: | |
7654 | mov 1, %r18 | |
7655 | sllx %r18, 63, %r18 | |
7656 | rd %tick, %r17 | |
7657 | add %r17, 0x60, %r17 | |
7658 | or %r17, %r18, %r17 | |
7659 | .word 0xb3800011 ! 144: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
7660 | cwp_10_106: | |
7661 | set user_data_start, %o7 | |
7662 | .word 0x93902004 ! 145: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
7663 | mondo_10_107: | |
7664 | nop | |
7665 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7666 | ta T_CHANGE_PRIV | |
7667 | stxa %r3, [%r0+0x3c0] %asi | |
7668 | .word 0x9d91c013 ! 146: WRPR_WSTATE_R wrpr %r7, %r19, %wstate | |
7669 | brcommon3_10_108: | |
7670 | nop | |
7671 | setx common_target, %r12, %r27 | |
7672 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
7673 | ba,a .+12 | |
7674 | .word 0xe86fe1c0 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x01c0] | |
7675 | ba,a .+8 | |
7676 | jmpl %r27+0, %r27 | |
7677 | .word 0xe897c034 ! 147: LDUHA_R lduha [%r31, %r20] 0x01, %r20 | |
7678 | ibp_10_109: | |
7679 | nop | |
7680 | .word 0xa3702a2b ! 148: POPC_I popc 0x0a2b, %r17 | |
7681 | trapasi_10_110: | |
7682 | nop | |
7683 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
7684 | .word 0xd4c04a00 ! 149: LDSWA_R ldswa [%r1, %r0] 0x50, %r10 | |
7685 | setx 0x2b4fe3eaf7327b21, %r1, %r28 | |
7686 | stxa %r28, [%g0] 0x73 | |
7687 | intvec_10_111: | |
7688 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7689 | splash_cmpr_10_112: | |
7690 | mov 0, %r18 | |
7691 | sllx %r18, 63, %r18 | |
7692 | rd %tick, %r17 | |
7693 | add %r17, 0x50, %r17 | |
7694 | or %r17, %r18, %r17 | |
7695 | ta T_CHANGE_PRIV | |
7696 | .word 0xb3800011 ! 151: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
7697 | splash_lsu_10_113: | |
7698 | nop | |
7699 | ta T_CHANGE_HPRIV | |
7700 | set 0xb22609fa, %r2 | |
7701 | mov 0x5, %r1 | |
7702 | sllx %r1, 32, %r1 | |
7703 | or %r1, %r2, %r2 | |
7704 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7705 | .word 0x3d400001 ! 152: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7706 | .word 0x81510000 ! 153: RDPR_TICK rdpr %tick, %r0 | |
7707 | splash_lsu_10_114: | |
7708 | nop | |
7709 | ta T_CHANGE_HPRIV | |
7710 | set 0x61c2aae2, %r2 | |
7711 | mov 0x7, %r1 | |
7712 | sllx %r1, 32, %r1 | |
7713 | or %r1, %r2, %r2 | |
7714 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7715 | .word 0x3d400001 ! 154: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7716 | pmu_10_115: | |
7717 | nop | |
7718 | setx 0xfffffe04fffff8f9, %g1, %g7 | |
7719 | .word 0xa3800007 ! 155: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
7720 | #if (defined SPC || defined CMP1) | |
7721 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_116) + 0, 16, 16)) -> intp(5,0,9) | |
7722 | #else | |
7723 | setx 0x160783471cd8993f, %r1, %r28 | |
7724 | stxa %r28, [%g0] 0x73 | |
7725 | #endif | |
7726 | intvec_10_116: | |
7727 | .word 0x39400001 ! 156: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7728 | .word 0xa9840008 ! 157: WR_SET_SOFTINT_R wr %r16, %r8, %set_softint | |
7729 | .word 0x87ac0a52 ! 158: FCMPd fcmpd %fcc<n>, %f16, %f18 | |
7730 | .word 0x99b4c58c ! 159: FCMPGT32 fcmpgt32 %d50, %d12, %r12 | |
7731 | ta T_CHANGE_NONHPRIV | |
7732 | .word 0x8143e011 ! 160: MEMBAR membar #LoadLoad | #Lookaside | |
7733 | splash_hpstate_10_119: | |
7734 | ta T_CHANGE_NONHPRIV | |
7735 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7736 | .word 0x81983790 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1790, %hpstate | |
7737 | .word 0x8d9032a8 ! 162: WRPR_PSTATE_I wrpr %r0, 0x12a8, %pstate | |
7738 | otherw | |
7739 | mov 0x35, %r30 | |
7740 | .word 0x91d0001e ! 163: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
7741 | .word 0xc19fd920 ! 164: LDDFA_R ldda [%r31, %r0], %f0 | |
7742 | setx 0xc361d10349e40a55, %r1, %r28 | |
7743 | stxa %r28, [%g0] 0x73 | |
7744 | intvec_10_121: | |
7745 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7746 | ibp_10_122: | |
7747 | nop | |
7748 | .word 0xe19fc3e0 ! 166: LDDFA_R ldda [%r31, %r0], %f16 | |
7749 | splash_lsu_10_123: | |
7750 | nop | |
7751 | ta T_CHANGE_HPRIV | |
7752 | set 0xdd96a311, %r2 | |
7753 | mov 0x3, %r1 | |
7754 | sllx %r1, 32, %r1 | |
7755 | or %r1, %r2, %r2 | |
7756 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7757 | ta T_CHANGE_NONHPRIV | |
7758 | .word 0x3d400001 ! 167: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7759 | nop | |
7760 | mov 0x80, %g3 | |
7761 | stxa %g3, [%g3] 0x57 | |
7762 | .word 0xd05fc000 ! 168: LDX_R ldx [%r31 + %r0], %r8 | |
7763 | jmptr_10_124: | |
7764 | nop | |
7765 | best_set_reg(0xe0200000, %r20, %r27) | |
7766 | .word 0xb7c6c000 ! 169: JMPL_R jmpl %r27 + %r0, %r27 | |
7767 | nop | |
7768 | ta T_CHANGE_HPRIV ! macro | |
7769 | donret_10_125: | |
7770 | rd %pc, %r12 | |
7771 | add %r12, (donretarg_10_125-donret_10_125), %r12 | |
7772 | add %r12, 0x8, %r11 ! nonseq tnpc | |
7773 | wrpr %g0, 0x2, %tl | |
7774 | wrpr %g0, %r12, %tpc | |
7775 | wrpr %g0, %r11, %tnpc | |
7776 | set (0x00c78800 | (28 << 24)), %r13 | |
7777 | and %r12, 0xfff, %r14 | |
7778 | sllx %r14, 30, %r14 | |
7779 | or %r13, %r14, %r20 | |
7780 | wrpr %r20, %g0, %tstate | |
7781 | wrhpr %g0, 0x4c7, %htstate | |
7782 | ta T_CHANGE_NONHPRIV ! rand=1 (10) | |
7783 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7784 | done | |
7785 | donretarg_10_125: | |
7786 | .word 0x33400001 ! 170: FBPE fbe,a,pn %fcc0, <label_0x1> | |
7787 | .word 0xc19fe160 ! 171: LDDFA_I ldda [%r31, 0x0160], %f0 | |
7788 | trapasi_10_127: | |
7789 | nop | |
7790 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
7791 | .word 0xd0d04e60 ! 172: LDSHA_R ldsha [%r1, %r0] 0x73, %r8 | |
7792 | .word 0x89800011 ! 173: WRTICK_R wr %r0, %r17, %tick | |
7793 | fpinit_10_129: | |
7794 | nop | |
7795 | setx fp_data_quads, %r19, %r20 | |
7796 | ldd [%r20], %f0 | |
7797 | ldd [%r20+8], %f4 | |
7798 | ld [%r20+16], %fsr | |
7799 | ld [%r20+24], %r19 | |
7800 | wr %r19, %g0, %gsr | |
7801 | .word 0x91b00484 ! 174: FCMPLE32 fcmple32 %d0, %d4, %r8 | |
7802 | .word 0x89800011 ! 175: WRTICK_R wr %r0, %r17, %tick | |
7803 | .word 0xd127e015 ! 176: STF_I st %f8, [0x0015, %r31] | |
7804 | .word 0x89800011 ! 177: WRTICK_R wr %r0, %r17, %tick | |
7805 | .word 0xd077e120 ! 178: STX_I stx %r8, [%r31 + 0x0120] | |
7806 | #if (defined SPC || defined CMP1) | |
7807 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_132) + 56, 16, 16)) -> intp(5,0,31) | |
7808 | #else | |
7809 | setx 0xe3ce404f2df6d6e8, %r1, %r28 | |
7810 | stxa %r28, [%g0] 0x73 | |
7811 | #endif | |
7812 | intvec_10_132: | |
7813 | .word 0x39400001 ! 179: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7814 | .word 0x87802088 ! 180: WRASI_I wr %r0, 0x0088, %asi | |
7815 | setx 0xa6ffde0eb0eee268, %r1, %r28 | |
7816 | stxa %r28, [%g0] 0x73 | |
7817 | intvec_10_133: | |
7818 | .word 0x39400001 ! 181: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7819 | .word 0xd037e1ee ! 182: STH_I sth %r8, [%r31 + 0x01ee] | |
7820 | .word 0xd11fe050 ! 183: LDDF_I ldd [%r31, 0x0050], %f8 | |
7821 | br_badelay2_10_135: | |
7822 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
7823 | allclean | |
7824 | .word 0xa5b18302 ! 184: ALIGNADDRESS alignaddr %r6, %r2, %r18 | |
7825 | splash_tba_10_136: | |
7826 | nop | |
7827 | ta T_CHANGE_PRIV | |
7828 | set 0x120000, %r12 | |
7829 | .word 0x8b90000c ! 185: WRPR_TBA_R wrpr %r0, %r12, %tba | |
7830 | trapasi_10_137: | |
7831 | nop | |
7832 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
7833 | .word 0xe2884a00 ! 186: LDUBA_R lduba [%r1, %r0] 0x50, %r17 | |
7834 | ceter_10_138: | |
7835 | nop | |
7836 | ta T_CHANGE_HPRIV | |
7837 | mov 6, %r17 | |
7838 | sllx %r17, 60, %r17 | |
7839 | mov 0x18, %r16 | |
7840 | stxa %r17, [%r16]0x4c | |
7841 | ta T_CHANGE_NONHPRIV | |
7842 | .word 0xa5410000 ! 187: RDTICK rd %tick, %r18 | |
7843 | intveclr_10_139: | |
7844 | nop | |
7845 | ta T_CHANGE_HPRIV | |
7846 | setx 0xc32d1ef2ec15eef7, %r1, %r28 | |
7847 | stxa %r28, [%g0] 0x72 | |
7848 | .word 0x25400001 ! 188: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7849 | brcommon2_10_140: | |
7850 | nop | |
7851 | setx common_target, %r12, %r27 | |
7852 | ba,a .+12 | |
7853 | .word 0xc36fe170 ! 1: PREFETCH_I prefetch [%r31 + 0x0170], #one_read | |
7854 | ba,a .+8 | |
7855 | jmpl %r27+0, %r27 | |
7856 | .word 0xe19fe060 ! 189: LDDFA_I ldda [%r31, 0x0060], %f16 | |
7857 | trapasi_10_141: | |
7858 | nop | |
7859 | mov 0x10, %r1 ! (VA for ASI 0x5a) | |
7860 | .word 0xe6d04b40 ! 190: LDSHA_R ldsha [%r1, %r0] 0x5a, %r19 | |
7861 | ibp_10_142: | |
7862 | nop | |
7863 | .word 0x97a309b0 ! 191: FDIVs fdivs %f12, %f16, %f11 | |
7864 | .word 0xd737e110 ! 192: STQF_I - %f11, [0x0110, %r31] | |
7865 | splash_cmpr_10_143: | |
7866 | mov 1, %r18 | |
7867 | sllx %r18, 63, %r18 | |
7868 | rd %tick, %r17 | |
7869 | add %r17, 0x50, %r17 | |
7870 | or %r17, %r18, %r17 | |
7871 | ta T_CHANGE_HPRIV | |
7872 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
7873 | .word 0xaf800011 ! 193: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
7874 | tagged_10_144: | |
7875 | tsubcctv %r18, 0x150e, %r19 | |
7876 | .word 0xd607e042 ! 194: LDUW_I lduw [%r31 + 0x0042], %r11 | |
7877 | .word 0xa8aa4014 ! 195: ANDNcc_R andncc %r9, %r20, %r20 | |
7878 | .word 0xd4bfc020 ! 196: STDA_R stda %r10, [%r31 + %r0] 0x01 | |
7879 | intveclr_10_145: | |
7880 | nop | |
7881 | ta T_CHANGE_HPRIV | |
7882 | setx 0x0e8ba1423f0fefba, %r1, %r28 | |
7883 | stxa %r28, [%g0] 0x72 | |
7884 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7885 | dvapa_10_146: | |
7886 | nop | |
7887 | ta T_CHANGE_HPRIV | |
7888 | mov 0xebc, %r20 | |
7889 | mov 0x3, %r19 | |
7890 | sllx %r20, 23, %r20 | |
7891 | or %r19, %r20, %r19 | |
7892 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
7893 | mov 0x38, %r18 | |
7894 | stxa %r31, [%r18]0x58 | |
7895 | ta T_CHANGE_NONHPRIV | |
7896 | .word 0xa1b407c5 ! 198: PDIST pdistn %d16, %d36, %d16 | |
7897 | ibp_10_147: | |
7898 | nop | |
7899 | ta T_CHANGE_NONHPRIV | |
7900 | .word 0x9f8021f0 ! 199: SIR sir 0x01f0 | |
7901 | .word 0x89800011 ! 200: WRTICK_R wr %r0, %r17, %tick | |
7902 | jmptr_10_149: | |
7903 | nop | |
7904 | best_set_reg(0xe0200000, %r20, %r27) | |
7905 | .word 0xb7c6c000 ! 201: JMPL_R jmpl %r27 + %r0, %r27 | |
7906 | nop | |
7907 | nop | |
7908 | ta T_CHANGE_PRIV | |
7909 | wrpr %g0, %g0, %gl | |
7910 | nop | |
7911 | nop | |
7912 | setx join_lbl_0_0, %g1, %g2 | |
7913 | jmp %g2 | |
7914 | nop | |
7915 | fork_lbl_0_4: | |
7916 | ta T_CHANGE_NONHPRIV | |
7917 | splash_lsu_8_0: | |
7918 | nop | |
7919 | ta T_CHANGE_HPRIV | |
7920 | set 0x8a53fd6e, %r2 | |
7921 | mov 0x6, %r1 | |
7922 | sllx %r1, 32, %r1 | |
7923 | or %r1, %r2, %r2 | |
7924 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7925 | ta T_CHANGE_NONHPRIV | |
7926 | ibp_8_1: | |
7927 | nop | |
7928 | ta T_CHANGE_NONHPRIV | |
7929 | .word 0xe19fe160 ! 1: LDDFA_I ldda [%r31, 0x0160], %f16 | |
7930 | splash_lsu_8_2: | |
7931 | nop | |
7932 | ta T_CHANGE_HPRIV | |
7933 | set 0x63554d4b, %r2 | |
7934 | mov 0x4, %r1 | |
7935 | sllx %r1, 32, %r1 | |
7936 | or %r1, %r2, %r2 | |
7937 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7938 | ta T_CHANGE_NONHPRIV | |
7939 | .word 0x3d400001 ! 2: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7940 | splash_lsu_8_3: | |
7941 | nop | |
7942 | ta T_CHANGE_HPRIV | |
7943 | set 0x4b1def93, %r2 | |
7944 | mov 0x2, %r1 | |
7945 | sllx %r1, 32, %r1 | |
7946 | or %r1, %r2, %r2 | |
7947 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7948 | .word 0x3d400001 ! 3: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7949 | .word 0xe277e0a0 ! 4: STX_I stx %r17, [%r31 + 0x00a0] | |
7950 | .word 0x30780001 ! 5: BPA <illegal instruction> | |
7951 | .word 0x91d02033 ! 6: Tcc_I ta icc_or_xcc, %r0 + 51 | |
7952 | .word 0x89800011 ! 7: WRTICK_R wr %r0, %r17, %tick | |
7953 | splash_htba_8_5: | |
7954 | nop | |
7955 | ta T_CHANGE_HPRIV | |
7956 | setx 0x00000000002a0000, %r11, %r12 | |
7957 | .word 0x8b98000c ! 8: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
7958 | .word 0xe28008a0 ! 9: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
7959 | bcs skip_8_6 | |
7960 | .word 0x9bb504c2 ! 1: FCMPNE32 fcmpne32 %d20, %d2, %r13 | |
7961 | .align 512 | |
7962 | skip_8_6: | |
7963 | .word 0xe23fc000 ! 10: STD_R std %r17, [%r31 + %r0] | |
7964 | splash_hpstate_8_7: | |
7965 | ta T_CHANGE_NONHPRIV | |
7966 | .word 0x30800001 ! 1: BA ba,a <label_0x1> | |
7967 | .word 0x81982e8b ! 11: WRHPR_HPSTATE_I wrhpr %r0, 0x0e8b, %hpstate | |
7968 | unsupttte_8_8: | |
7969 | nop | |
7970 | ta T_CHANGE_HPRIV | |
7971 | mov 1, %r20 | |
7972 | sllx %r20, 63, %r20 | |
7973 | or %r20, 2,%r20 | |
7974 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
7975 | ta T_CHANGE_NONHPRIV | |
7976 | .word 0x91a509a5 ! 12: FDIVs fdivs %f20, %f5, %f8 | |
7977 | .word 0xd4800a60 ! 13: LDUWA_R lduwa [%r0, %r0] 0x53, %r10 | |
7978 | setx 0x276ffeba4efad39b, %r1, %r28 | |
7979 | stxa %r28, [%g0] 0x73 | |
7980 | intvec_8_9: | |
7981 | .word 0x39400001 ! 14: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7982 | trapasi_8_10: | |
7983 | nop | |
7984 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
7985 | .word 0xd4d04a00 ! 15: LDSHA_R ldsha [%r1, %r0] 0x50, %r10 | |
7986 | ibp_8_11: | |
7987 | nop | |
7988 | .word 0xa9b50492 ! 16: FCMPLE32 fcmple32 %d20, %d18, %r20 | |
7989 | .word 0xe69fd100 ! 17: LDDA_R ldda [%r31, %r0] 0x88, %r19 | |
7990 | brcommon3_8_12: | |
7991 | nop | |
7992 | setx common_target, %r12, %r27 | |
7993 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
7994 | ba,a .+12 | |
7995 | .word 0xe737e0e0 ! 1: STQF_I - %f19, [0x00e0, %r31] | |
7996 | ba,a .+8 | |
7997 | jmpl %r27+0, %r27 | |
7998 | .word 0xc32fc00c ! 18: STXFSR_R st-sfr %f1, [%r12, %r31] | |
7999 | nop | |
8000 | mov 0x80, %g3 | |
8001 | stxa %g3, [%g3] 0x5f | |
8002 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
8003 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
8004 | .word 0xe65fc000 ! 19: LDX_R ldx [%r31 + %r0], %r19 | |
8005 | splash_hpstate_8_13: | |
8006 | .word 0x81983a45 ! 20: WRHPR_HPSTATE_I wrhpr %r0, 0x1a45, %hpstate | |
8007 | intveclr_8_14: | |
8008 | nop | |
8009 | ta T_CHANGE_HPRIV | |
8010 | setx 0xbc18c7a036bf2cc1, %r1, %r28 | |
8011 | stxa %r28, [%g0] 0x72 | |
8012 | ta T_CHANGE_NONHPRIV | |
8013 | .word 0x25400001 ! 21: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8014 | nop | |
8015 | ta T_CHANGE_HPRIV | |
8016 | mov 0x8+1, %r10 | |
8017 | set sync_thr_counter5, %r23 | |
8018 | #ifndef SPC | |
8019 | ldxa [%g0]0x63, %o1 | |
8020 | and %o1, 0x38, %o1 | |
8021 | add %o1, %r23, %r23 | |
8022 | sllx %o1, 5, %o3 !(CID*256) | |
8023 | #endif | |
8024 | cas [%r23],%g0,%r10 !lock | |
8025 | brnz %r10, cwq_8_15 | |
8026 | rd %asi, %r12 | |
8027 | wr %g0, 0x40, %asi | |
8028 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8029 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8030 | cmp %l1, 1 | |
8031 | bne cwq_8_15 | |
8032 | set CWQ_BASE, %l6 | |
8033 | #ifndef SPC | |
8034 | add %l6, %o3, %l6 | |
8035 | #endif | |
8036 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8037 | best_set_reg(0x20610090, %l1, %l2) !# Control Word | |
8038 | sllx %l2, 32, %l2 | |
8039 | stx %l2, [%l6 + 0x0] | |
8040 | membar #Sync | |
8041 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
8042 | sub %l2, 0x40, %l2 | |
8043 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
8044 | wr %r12, %g0, %asi | |
8045 | st %g0, [%r23] | |
8046 | cwq_8_15: | |
8047 | ta T_CHANGE_NONHPRIV | |
8048 | .word 0x99414000 ! 22: RDPC rd %pc, %r12 | |
8049 | .word 0xd8d7e058 ! 23: LDSHA_I ldsha [%r31, + 0x0058] %asi, %r12 | |
8050 | .word 0xe19fdf20 ! 24: LDDFA_R ldda [%r31, %r0], %f16 | |
8051 | #if (defined SPC || defined CMP1) | |
8052 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_16) + 48, 16, 16)) -> intp(6,0,18) | |
8053 | #else | |
8054 | setx 0x6aaa7dbeb9291941, %r1, %r28 | |
8055 | stxa %r28, [%g0] 0x73 | |
8056 | #endif | |
8057 | intvec_8_16: | |
8058 | .word 0x39400001 ! 25: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8059 | splash_tba_8_17: | |
8060 | nop | |
8061 | ta T_CHANGE_PRIV | |
8062 | setx 0x00000000003a0000, %r11, %r12 | |
8063 | .word 0x8b90000c ! 26: WRPR_TBA_R wrpr %r0, %r12, %tba | |
8064 | nop | |
8065 | mov 0x80, %g3 | |
8066 | stxa %g3, [%g3] 0x57 | |
8067 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
8068 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
8069 | .word 0xd85fc000 ! 27: LDX_R ldx [%r31 + %r0], %r12 | |
8070 | .word 0xb1804013 ! 28: WR_STICK_REG_R wr %r1, %r19, %- | |
8071 | .word 0xd877e04c ! 29: STX_I stx %r12, [%r31 + 0x004c] | |
8072 | tagged_8_18: | |
8073 | tsubcctv %r20, 0x16e7, %r12 | |
8074 | .word 0xd807e1d2 ! 30: LDUW_I lduw [%r31 + 0x01d2], %r12 | |
8075 | .word 0x89800011 ! 31: WRTICK_R wr %r0, %r17, %tick | |
8076 | trapasi_8_20: | |
8077 | nop | |
8078 | mov 0x10, %r1 ! (VA for ASI 0x5b) | |
8079 | .word 0xd8d84b60 ! 32: LDXA_R ldxa [%r1, %r0] 0x5b, %r12 | |
8080 | fpinit_8_21: | |
8081 | nop | |
8082 | setx fp_data_quads, %r19, %r20 | |
8083 | ldd [%r20], %f0 | |
8084 | ldd [%r20+8], %f4 | |
8085 | ld [%r20+16], %fsr | |
8086 | ld [%r20+24], %r19 | |
8087 | wr %r19, %g0, %gsr | |
8088 | .word 0xc3e83df7 ! 33: PREFETCHA_I prefetcha [%r0, + 0xfffffdf7] %asi, #one_read | |
8089 | nop | |
8090 | ta T_CHANGE_HPRIV | |
8091 | mov 0x8+1, %r10 | |
8092 | set sync_thr_counter5, %r23 | |
8093 | #ifndef SPC | |
8094 | ldxa [%g0]0x63, %o1 | |
8095 | and %o1, 0x38, %o1 | |
8096 | add %o1, %r23, %r23 | |
8097 | sllx %o1, 5, %o3 !(CID*256) | |
8098 | #endif | |
8099 | cas [%r23],%g0,%r10 !lock | |
8100 | brnz %r10, cwq_8_22 | |
8101 | rd %asi, %r12 | |
8102 | wr %g0, 0x40, %asi | |
8103 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8104 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8105 | cmp %l1, 1 | |
8106 | bne cwq_8_22 | |
8107 | set CWQ_BASE, %l6 | |
8108 | #ifndef SPC | |
8109 | add %l6, %o3, %l6 | |
8110 | #endif | |
8111 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8112 | best_set_reg(0x20610070, %l1, %l2) !# Control Word | |
8113 | sllx %l2, 32, %l2 | |
8114 | stx %l2, [%l6 + 0x0] | |
8115 | membar #Sync | |
8116 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
8117 | sub %l2, 0x40, %l2 | |
8118 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
8119 | wr %r12, %g0, %asi | |
8120 | st %g0, [%r23] | |
8121 | cwq_8_22: | |
8122 | ta T_CHANGE_NONHPRIV | |
8123 | .word 0xa5414000 ! 34: RDPC rd %pc, %r18 | |
8124 | jmptr_8_23: | |
8125 | nop | |
8126 | best_set_reg(0xe0a00000, %r20, %r27) | |
8127 | .word 0xb7c6c000 ! 35: JMPL_R jmpl %r27 + %r0, %r27 | |
8128 | nop | |
8129 | ta T_CHANGE_HPRIV ! macro | |
8130 | donret_8_24: | |
8131 | rd %pc, %r12 | |
8132 | add %r12, (donretarg_8_24-donret_8_24+4), %r12 | |
8133 | add %r12, 0x4, %r11 ! seq tnpc | |
8134 | wrpr %g0, 0x2, %tl | |
8135 | wrpr %g0, %r12, %tpc | |
8136 | wrpr %g0, %r11, %tnpc | |
8137 | set (0x00bb2900 | (0x58 << 24)), %r13 | |
8138 | and %r12, 0xfff, %r14 | |
8139 | sllx %r14, 30, %r14 | |
8140 | or %r13, %r14, %r20 | |
8141 | wrpr %r20, %g0, %tstate | |
8142 | wrhpr %g0, 0xd3d, %htstate | |
8143 | ta T_CHANGE_NONHPRIV ! rand=1 (8) | |
8144 | retry | |
8145 | donretarg_8_24: | |
8146 | .word 0xd66fe115 ! 36: LDSTUB_I ldstub %r11, [%r31 + 0x0115] | |
8147 | nop | |
8148 | ta T_CHANGE_HPRIV ! macro | |
8149 | donret_8_25: | |
8150 | rd %pc, %r12 | |
8151 | add %r12, (donretarg_8_25-donret_8_25+4), %r12 | |
8152 | add %r12, 0x4, %r11 ! seq tnpc | |
8153 | wrpr %g0, 0x2, %tl | |
8154 | wrpr %g0, %r12, %tpc | |
8155 | wrpr %g0, %r11, %tnpc | |
8156 | set (0x00b67c00 | (0x80 << 24)), %r13 | |
8157 | and %r12, 0xfff, %r14 | |
8158 | sllx %r14, 30, %r14 | |
8159 | or %r13, %r14, %r20 | |
8160 | wrpr %r20, %g0, %tstate | |
8161 | wrhpr %g0, 0xd81, %htstate | |
8162 | ta T_CHANGE_NONHPRIV ! rand=1 (8) | |
8163 | done | |
8164 | donretarg_8_25: | |
8165 | .word 0x24800001 ! 37: BLE ble,a <label_0x1> | |
8166 | fpinit_8_26: | |
8167 | nop | |
8168 | setx fp_data_quads, %r19, %r20 | |
8169 | ldd [%r20], %f0 | |
8170 | ldd [%r20+8], %f4 | |
8171 | ld [%r20+16], %fsr | |
8172 | ld [%r20+24], %r19 | |
8173 | wr %r19, %g0, %gsr | |
8174 | .word 0x87a80a44 ! 38: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
8175 | nop | |
8176 | mov 0x80, %g3 | |
8177 | stxa %g3, [%g3] 0x57 | |
8178 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
8179 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
8180 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
8181 | .word 0xd65fc000 ! 39: LDX_R ldx [%r31 + %r0], %r11 | |
8182 | nop | |
8183 | mov 0x80, %g3 | |
8184 | stxa %g3, [%g3] 0x5f | |
8185 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
8186 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
8187 | .word 0xd65fc000 ! 40: LDX_R ldx [%r31 + %r0], %r11 | |
8188 | mondo_8_27: | |
8189 | nop | |
8190 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
8191 | ta T_CHANGE_PRIV | |
8192 | stxa %r20, [%r0+0x3d8] %asi | |
8193 | .word 0x9d90c007 ! 41: WRPR_WSTATE_R wrpr %r3, %r7, %wstate | |
8194 | ibp_8_28: | |
8195 | nop | |
8196 | ta T_CHANGE_NONHPRIV | |
8197 | .word 0xc32fc008 ! 42: STXFSR_R st-sfr %f1, [%r8, %r31] | |
8198 | fpinit_8_29: | |
8199 | nop | |
8200 | setx fp_data_quads, %r19, %r20 | |
8201 | ldd [%r20], %f0 | |
8202 | ldd [%r20+8], %f4 | |
8203 | ld [%r20+16], %fsr | |
8204 | ld [%r20+24], %r19 | |
8205 | wr %r19, %g0, %gsr | |
8206 | .word 0x91a009c4 ! 43: FDIVd fdivd %f0, %f4, %f8 | |
8207 | nop | |
8208 | ta T_CHANGE_HPRIV | |
8209 | mov 0x8+1, %r10 | |
8210 | set sync_thr_counter5, %r23 | |
8211 | #ifndef SPC | |
8212 | ldxa [%g0]0x63, %o1 | |
8213 | and %o1, 0x38, %o1 | |
8214 | add %o1, %r23, %r23 | |
8215 | sllx %o1, 5, %o3 !(CID*256) | |
8216 | #endif | |
8217 | cas [%r23],%g0,%r10 !lock | |
8218 | brnz %r10, cwq_8_30 | |
8219 | rd %asi, %r12 | |
8220 | wr %g0, 0x40, %asi | |
8221 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8222 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8223 | cmp %l1, 1 | |
8224 | bne cwq_8_30 | |
8225 | set CWQ_BASE, %l6 | |
8226 | #ifndef SPC | |
8227 | add %l6, %o3, %l6 | |
8228 | #endif | |
8229 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8230 | best_set_reg(0x20610090, %l1, %l2) !# Control Word | |
8231 | sllx %l2, 32, %l2 | |
8232 | stx %l2, [%l6 + 0x0] | |
8233 | membar #Sync | |
8234 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
8235 | sub %l2, 0x40, %l2 | |
8236 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
8237 | wr %r12, %g0, %asi | |
8238 | st %g0, [%r23] | |
8239 | cwq_8_30: | |
8240 | ta T_CHANGE_NONHPRIV | |
8241 | .word 0xa1414000 ! 44: RDPC rd %pc, %r16 | |
8242 | .word 0xe4dfe1d0 ! 45: LDXA_I ldxa [%r31, + 0x01d0] %asi, %r18 | |
8243 | iaw_8_31: | |
8244 | nop | |
8245 | ta T_CHANGE_HPRIV | |
8246 | mov 8, %r18 | |
8247 | rd %asi, %r12 | |
8248 | wr %r0, 0x41, %asi | |
8249 | set sync_thr_counter4, %r23 | |
8250 | #ifndef SPC | |
8251 | ldxa [%g0]0x63, %r8 | |
8252 | and %r8, 0x38, %r8 ! Core ID | |
8253 | add %r8, %r23, %r23 | |
8254 | #else | |
8255 | mov 0, %r8 | |
8256 | #endif | |
8257 | mov 0x8, %r16 | |
8258 | iaw_startwait8_31: | |
8259 | cas [%r23],%g0,%r16 !lock | |
8260 | brz,a %r16, continue_iaw_8_31 | |
8261 | mov (~0x8&0xf), %r16 | |
8262 | ld [%r23], %r16 | |
8263 | iaw_wait8_31: | |
8264 | brnz %r16, iaw_wait8_31 | |
8265 | ld [%r23], %r16 | |
8266 | ba iaw_startwait8_31 | |
8267 | mov 0x8, %r16 | |
8268 | continue_iaw_8_31: | |
8269 | sllx %r16, %r8, %r16 !Mask for my core only | |
8270 | ldxa [0x58]%asi, %r17 !Running_status | |
8271 | wait_for_stat_8_31: | |
8272 | ldxa [0x50]%asi, %r13 !Running_rw | |
8273 | cmp %r13, %r17 | |
8274 | bne,a %xcc, wait_for_stat_8_31 | |
8275 | ldxa [0x58]%asi, %r17 !Running_status | |
8276 | stxa %r16, [0x68]%asi !Park (W1C) | |
8277 | ldxa [0x50]%asi, %r14 !Running_rw | |
8278 | wait_for_iaw_8_31: | |
8279 | ldxa [0x58]%asi, %r17 !Running_status | |
8280 | cmp %r14, %r17 | |
8281 | bne,a %xcc, wait_for_iaw_8_31 | |
8282 | ldxa [0x50]%asi, %r14 !Running_rw | |
8283 | iaw_doit8_31: | |
8284 | mov 0x38, %r18 | |
8285 | iaw4_8_31: | |
8286 | setx common_target, %r20, %r19 | |
8287 | or %r19, 0x1, %r19 | |
8288 | stxa %r19, [%r18]0x50 | |
8289 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
8290 | st %g0, [%r23] !clear lock | |
8291 | wr %r0, %r12, %asi ! restore %asi | |
8292 | ta T_CHANGE_NONHPRIV | |
8293 | .word 0xa9b507d1 ! 46: PDIST pdistn %d20, %d48, %d20 | |
8294 | ibp_8_32: | |
8295 | nop | |
8296 | .word 0x9bb447d4 ! 47: PDIST pdistn %d48, %d20, %d44 | |
8297 | nop | |
8298 | ta T_CHANGE_HPRIV | |
8299 | mov 0x8, %r10 | |
8300 | set sync_thr_counter6, %r23 | |
8301 | #ifndef SPC | |
8302 | ldxa [%g0]0x63, %o1 | |
8303 | and %o1, 0x38, %o1 | |
8304 | add %o1, %r23, %r23 | |
8305 | #endif | |
8306 | cas [%r23],%g0,%r10 !lock | |
8307 | brnz %r10, sma_8_33 | |
8308 | rd %asi, %r12 | |
8309 | wr %g0, 0x40, %asi | |
8310 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
8311 | set 0x00161fff, %g1 | |
8312 | stxa %g1, [%g0 + 0x80] %asi | |
8313 | wr %r12, %g0, %asi | |
8314 | st %g0, [%r23] | |
8315 | sma_8_33: | |
8316 | ta T_CHANGE_NONHPRIV | |
8317 | .word 0xe5e7e00c ! 48: CASA_R casa [%r31] %asi, %r12, %r18 | |
8318 | change_to_randtl_8_34: | |
8319 | ta T_CHANGE_PRIV ! macro | |
8320 | done_change_to_randtl_8_34: | |
8321 | .word 0x8f902000 ! 49: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
8322 | .word 0xe1bfdc00 ! 50: STDFA_R stda %f16, [%r0, %r31] | |
8323 | pmu_8_35: | |
8324 | nop | |
8325 | setx 0xfffff072fffff6f8, %g1, %g7 | |
8326 | .word 0xa3800007 ! 51: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
8327 | splash_cmpr_8_36: | |
8328 | mov 1, %r18 | |
8329 | sllx %r18, 63, %r18 | |
8330 | rd %tick, %r17 | |
8331 | add %r17, 0x80, %r17 | |
8332 | or %r17, %r18, %r17 | |
8333 | ta T_CHANGE_HPRIV | |
8334 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
8335 | ta T_CHANGE_PRIV | |
8336 | .word 0xb3800011 ! 52: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
8337 | nop | |
8338 | ta T_CHANGE_HPRIV ! macro | |
8339 | donret_8_37: | |
8340 | rd %pc, %r12 | |
8341 | add %r12, (donretarg_8_37-donret_8_37), %r12 | |
8342 | add %r12, 0x4, %r11 ! seq tnpc | |
8343 | wrpr %g0, 0x1, %tl | |
8344 | wrpr %g0, %r12, %tpc | |
8345 | wrpr %g0, %r11, %tnpc | |
8346 | set (0x0001b000 | (20 << 24)), %r13 | |
8347 | and %r12, 0xfff, %r14 | |
8348 | sllx %r14, 30, %r14 | |
8349 | or %r13, %r14, %r20 | |
8350 | wrpr %r20, %g0, %tstate | |
8351 | wrhpr %g0, 0x814, %htstate | |
8352 | ta T_CHANGE_NONPRIV ! rand=0 (8) | |
8353 | done | |
8354 | donretarg_8_37: | |
8355 | .word 0xe4ffe0b6 ! 53: SWAPA_I swapa %r18, [%r31 + 0x00b6] %asi | |
8356 | .word 0xa3508000 ! 54: RDPR_TSTATE <illegal instruction> | |
8357 | brcommon1_8_38: | |
8358 | nop | |
8359 | setx common_target, %r12, %r27 | |
8360 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
8361 | ba,a .+12 | |
8362 | .word 0xc32fe0d0 ! 1: STXFSR_I st-sfr %f1, [0x00d0, %r31] | |
8363 | ba,a .+8 | |
8364 | jmpl %r27+0, %r27 | |
8365 | .word 0x87a8ca4b ! 55: FCMPd fcmpd %fcc<n>, %f34, %f42 | |
8366 | trapasi_8_39: | |
8367 | nop | |
8368 | mov 0x20, %r1 ! (VA for ASI 0x4c) | |
8369 | .word 0xd8c84980 ! 56: LDSBA_R ldsba [%r1, %r0] 0x4c, %r12 | |
8370 | nop | |
8371 | ta T_CHANGE_HPRIV | |
8372 | mov 0x8, %r10 | |
8373 | set sync_thr_counter6, %r23 | |
8374 | #ifndef SPC | |
8375 | ldxa [%g0]0x63, %o1 | |
8376 | and %o1, 0x38, %o1 | |
8377 | add %o1, %r23, %r23 | |
8378 | #endif | |
8379 | cas [%r23],%g0,%r10 !lock | |
8380 | brnz %r10, sma_8_40 | |
8381 | rd %asi, %r12 | |
8382 | wr %g0, 0x40, %asi | |
8383 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
8384 | set 0x00161fff, %g1 | |
8385 | stxa %g1, [%g0 + 0x80] %asi | |
8386 | wr %r12, %g0, %asi | |
8387 | st %g0, [%r23] | |
8388 | sma_8_40: | |
8389 | ta T_CHANGE_NONHPRIV | |
8390 | .word 0xd9e7e012 ! 57: CASA_R casa [%r31] %asi, %r18, %r12 | |
8391 | bvs skip_8_41 | |
8392 | brlez,a,pn %r1, skip_8_41 | |
8393 | .align 128 | |
8394 | skip_8_41: | |
8395 | .word 0xc32fc000 ! 58: STXFSR_R st-sfr %f1, [%r0, %r31] | |
8396 | nop | |
8397 | ta T_CHANGE_HPRIV ! macro | |
8398 | donret_8_42: | |
8399 | rd %pc, %r12 | |
8400 | add %r12, (donretarg_8_42-donret_8_42+4), %r12 | |
8401 | add %r12, 0x4, %r11 ! seq tnpc | |
8402 | wrpr %g0, 0x2, %tl | |
8403 | wrpr %g0, %r12, %tpc | |
8404 | wrpr %g0, %r11, %tnpc | |
8405 | set (0x00f99500 | (0x82 << 24)), %r13 | |
8406 | and %r12, 0xfff, %r14 | |
8407 | sllx %r14, 30, %r14 | |
8408 | or %r13, %r14, %r20 | |
8409 | wrpr %r20, %g0, %tstate | |
8410 | wrhpr %g0, 0x3f5, %htstate | |
8411 | ta T_CHANGE_NONHPRIV ! rand=1 (8) | |
8412 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
8413 | retry | |
8414 | donretarg_8_42: | |
8415 | .word 0xd86fe0a4 ! 59: LDSTUB_I ldstub %r12, [%r31 + 0x00a4] | |
8416 | unsupttte_8_43: | |
8417 | nop | |
8418 | ta T_CHANGE_HPRIV | |
8419 | mov 1, %r20 | |
8420 | sllx %r20, 63, %r20 | |
8421 | or %r20, 2,%r20 | |
8422 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
8423 | ta T_CHANGE_NONHPRIV | |
8424 | .word 0x87ac0a51 ! 60: FCMPd fcmpd %fcc<n>, %f16, %f48 | |
8425 | splash_hpstate_8_44: | |
8426 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> | |
8427 | .word 0x8198368f ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x168f, %hpstate | |
8428 | nop | |
8429 | ta T_CHANGE_HPRIV ! macro | |
8430 | donret_8_45: | |
8431 | rd %pc, %r12 | |
8432 | add %r12, (donretarg_8_45-donret_8_45), %r12 | |
8433 | add %r12, 0x4, %r11 ! seq tnpc | |
8434 | wrpr %g0, 0x2, %tl | |
8435 | wrpr %g0, %r12, %tpc | |
8436 | wrpr %g0, %r11, %tnpc | |
8437 | set (0x00ba2c00 | (0x89 << 24)), %r13 | |
8438 | and %r12, 0xfff, %r14 | |
8439 | sllx %r14, 30, %r14 | |
8440 | or %r13, %r14, %r20 | |
8441 | wrpr %r20, %g0, %tstate | |
8442 | wrhpr %g0, 0xe04, %htstate | |
8443 | ta T_CHANGE_NONHPRIV ! rand=1 (8) | |
8444 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> | |
8445 | done | |
8446 | donretarg_8_45: | |
8447 | .word 0x39400001 ! 62: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8448 | .word 0xe0c7e1e8 ! 63: LDSWA_I ldswa [%r31, + 0x01e8] %asi, %r16 | |
8449 | trapasi_8_46: | |
8450 | nop | |
8451 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
8452 | .word 0xe0d84e60 ! 64: LDXA_R ldxa [%r1, %r0] 0x73, %r16 | |
8453 | jmptr_8_47: | |
8454 | nop | |
8455 | best_set_reg(0xe0a00000, %r20, %r27) | |
8456 | .word 0xb7c6c000 ! 65: JMPL_R jmpl %r27 + %r0, %r27 | |
8457 | pmu_8_48: | |
8458 | nop | |
8459 | setx 0xfffff870fffff293, %g1, %g7 | |
8460 | .word 0xa3800007 ! 66: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
8461 | ibp_8_49: | |
8462 | nop | |
8463 | .word 0xe0bfc031 ! 67: STDA_R stda %r16, [%r31 + %r17] 0x01 | |
8464 | fpinit_8_50: | |
8465 | nop | |
8466 | setx fp_data_quads, %r19, %r20 | |
8467 | ldd [%r20], %f0 | |
8468 | ldd [%r20+8], %f4 | |
8469 | ld [%r20+16], %fsr | |
8470 | ld [%r20+24], %r19 | |
8471 | wr %r19, %g0, %gsr | |
8472 | .word 0xc3e83a17 ! 68: PREFETCHA_I prefetcha [%r0, + 0xfffffa17] %asi, #one_read | |
8473 | splash_tba_8_51: | |
8474 | nop | |
8475 | ta T_CHANGE_PRIV | |
8476 | setx 0x00000000003a0000, %r11, %r12 | |
8477 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
8478 | nop | |
8479 | mov 0x80, %g3 | |
8480 | stxa %g3, [%g3] 0x5f | |
8481 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
8482 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
8483 | .word 0xe05fc000 ! 70: LDX_R ldx [%r31 + %r0], %r16 | |
8484 | .word 0xe08008a0 ! 71: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
8485 | iaw_8_52: | |
8486 | nop | |
8487 | ta T_CHANGE_HPRIV | |
8488 | mov 8, %r18 | |
8489 | rd %asi, %r12 | |
8490 | wr %r0, 0x41, %asi | |
8491 | set sync_thr_counter4, %r23 | |
8492 | #ifndef SPC | |
8493 | ldxa [%g0]0x63, %r8 | |
8494 | and %r8, 0x38, %r8 ! Core ID | |
8495 | add %r8, %r23, %r23 | |
8496 | #else | |
8497 | mov 0, %r8 | |
8498 | #endif | |
8499 | mov 0x8, %r16 | |
8500 | iaw_startwait8_52: | |
8501 | cas [%r23],%g0,%r16 !lock | |
8502 | brz,a %r16, continue_iaw_8_52 | |
8503 | mov (~0x8&0xf), %r16 | |
8504 | ld [%r23], %r16 | |
8505 | iaw_wait8_52: | |
8506 | brnz %r16, iaw_wait8_52 | |
8507 | ld [%r23], %r16 | |
8508 | ba iaw_startwait8_52 | |
8509 | mov 0x8, %r16 | |
8510 | continue_iaw_8_52: | |
8511 | sllx %r16, %r8, %r16 !Mask for my core only | |
8512 | ldxa [0x58]%asi, %r17 !Running_status | |
8513 | wait_for_stat_8_52: | |
8514 | ldxa [0x50]%asi, %r13 !Running_rw | |
8515 | cmp %r13, %r17 | |
8516 | bne,a %xcc, wait_for_stat_8_52 | |
8517 | ldxa [0x58]%asi, %r17 !Running_status | |
8518 | stxa %r16, [0x68]%asi !Park (W1C) | |
8519 | ldxa [0x50]%asi, %r14 !Running_rw | |
8520 | wait_for_iaw_8_52: | |
8521 | ldxa [0x58]%asi, %r17 !Running_status | |
8522 | cmp %r14, %r17 | |
8523 | bne,a %xcc, wait_for_iaw_8_52 | |
8524 | ldxa [0x50]%asi, %r14 !Running_rw | |
8525 | iaw_doit8_52: | |
8526 | mov 0x38, %r18 | |
8527 | iaw2_8_52: | |
8528 | rdpr %tba, %r19 | |
8529 | mov 0x102, %r20 | |
8530 | sllx %r20, 5, %r20 | |
8531 | add %r20, %r19, %r19 | |
8532 | stxa %r19, [%r18]0x50 | |
8533 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
8534 | st %g0, [%r23] !clear lock | |
8535 | wr %r0, %r12, %asi ! restore %asi | |
8536 | ta T_CHANGE_NONHPRIV | |
8537 | .word 0x87a94a41 ! 72: FCMPd fcmpd %fcc<n>, %f36, %f32 | |
8538 | .word 0xd48008a0 ! 73: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
8539 | fpinit_8_53: | |
8540 | nop | |
8541 | setx fp_data_quads, %r19, %r20 | |
8542 | ldd [%r20], %f0 | |
8543 | ldd [%r20+8], %f4 | |
8544 | ld [%r20+16], %fsr | |
8545 | ld [%r20+24], %r19 | |
8546 | wr %r19, %g0, %gsr | |
8547 | .word 0x89a009a4 ! 74: FDIVs fdivs %f0, %f4, %f4 | |
8548 | nop | |
8549 | ta T_CHANGE_HPRIV | |
8550 | mov 0x8+1, %r10 | |
8551 | set sync_thr_counter5, %r23 | |
8552 | #ifndef SPC | |
8553 | ldxa [%g0]0x63, %o1 | |
8554 | and %o1, 0x38, %o1 | |
8555 | add %o1, %r23, %r23 | |
8556 | sllx %o1, 5, %o3 !(CID*256) | |
8557 | #endif | |
8558 | cas [%r23],%g0,%r10 !lock | |
8559 | brnz %r10, cwq_8_54 | |
8560 | rd %asi, %r12 | |
8561 | wr %g0, 0x40, %asi | |
8562 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8563 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8564 | cmp %l1, 1 | |
8565 | bne cwq_8_54 | |
8566 | set CWQ_BASE, %l6 | |
8567 | #ifndef SPC | |
8568 | add %l6, %o3, %l6 | |
8569 | #endif | |
8570 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8571 | best_set_reg(0x20610070, %l1, %l2) !# Control Word | |
8572 | sllx %l2, 32, %l2 | |
8573 | stx %l2, [%l6 + 0x0] | |
8574 | membar #Sync | |
8575 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
8576 | sub %l2, 0x40, %l2 | |
8577 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
8578 | wr %r12, %g0, %asi | |
8579 | st %g0, [%r23] | |
8580 | cwq_8_54: | |
8581 | ta T_CHANGE_NONHPRIV | |
8582 | .word 0xa1414000 ! 75: RDPC rd %pc, %r16 | |
8583 | .word 0x91948008 ! 76: WRPR_PIL_R wrpr %r18, %r8, %pil | |
8584 | #if (defined SPC || defined CMP1) | |
8585 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_56) + 0, 16, 16)) -> intp(3,0,21) | |
8586 | #else | |
8587 | setx 0x95195b5c57cee337, %r1, %r28 | |
8588 | stxa %r28, [%g0] 0x73 | |
8589 | #endif | |
8590 | intvec_8_56: | |
8591 | .word 0x39400001 ! 77: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8592 | intveclr_8_57: | |
8593 | nop | |
8594 | ta T_CHANGE_HPRIV | |
8595 | setx 0x0d33a79149370dad, %r1, %r28 | |
8596 | stxa %r28, [%g0] 0x72 | |
8597 | ta T_CHANGE_NONHPRIV | |
8598 | .word 0x25400001 ! 78: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8599 | .word 0xd6bfe102 ! 79: STDA_I stda %r11, [%r31 + 0x0102] %asi | |
8600 | .word 0xd737c000 ! 80: STQF_R - %f11, [%r0, %r31] | |
8601 | ceter_8_58: | |
8602 | nop | |
8603 | ta T_CHANGE_HPRIV | |
8604 | mov 2, %r17 | |
8605 | sllx %r17, 60, %r17 | |
8606 | mov 0x18, %r16 | |
8607 | stxa %r17, [%r16]0x4c | |
8608 | ta T_CHANGE_NONHPRIV | |
8609 | .word 0xa7410000 ! 81: RDTICK rd %tick, %r19 | |
8610 | brcommon3_8_59: | |
8611 | nop | |
8612 | setx common_target, %r12, %r27 | |
8613 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
8614 | ba,a .+12 | |
8615 | .word 0xd66fe190 ! 1: LDSTUB_I ldstub %r11, [%r31 + 0x0190] | |
8616 | ba,a .+8 | |
8617 | jmpl %r27+0, %r27 | |
8618 | .word 0xd6dfc02c ! 82: LDXA_R ldxa [%r31, %r12] 0x01, %r11 | |
8619 | .word 0xd68008a0 ! 83: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
8620 | jmptr_8_60: | |
8621 | nop | |
8622 | best_set_reg(0xe0a00000, %r20, %r27) | |
8623 | .word 0xb7c6c000 ! 84: JMPL_R jmpl %r27 + %r0, %r27 | |
8624 | setx 0x596153fbfececba2, %r1, %r28 | |
8625 | stxa %r28, [%g0] 0x73 | |
8626 | intvec_8_61: | |
8627 | .word 0x39400001 ! 85: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8628 | nop | |
8629 | ta T_CHANGE_HPRIV | |
8630 | mov 0x8+1, %r10 | |
8631 | set sync_thr_counter5, %r23 | |
8632 | #ifndef SPC | |
8633 | ldxa [%g0]0x63, %o1 | |
8634 | and %o1, 0x38, %o1 | |
8635 | add %o1, %r23, %r23 | |
8636 | sllx %o1, 5, %o3 !(CID*256) | |
8637 | #endif | |
8638 | cas [%r23],%g0,%r10 !lock | |
8639 | brnz %r10, cwq_8_62 | |
8640 | rd %asi, %r12 | |
8641 | wr %g0, 0x40, %asi | |
8642 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8643 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8644 | cmp %l1, 1 | |
8645 | bne cwq_8_62 | |
8646 | set CWQ_BASE, %l6 | |
8647 | #ifndef SPC | |
8648 | add %l6, %o3, %l6 | |
8649 | #endif | |
8650 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8651 | best_set_reg(0x20610050, %l1, %l2) !# Control Word | |
8652 | sllx %l2, 32, %l2 | |
8653 | stx %l2, [%l6 + 0x0] | |
8654 | membar #Sync | |
8655 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
8656 | sub %l2, 0x40, %l2 | |
8657 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
8658 | wr %r12, %g0, %asi | |
8659 | st %g0, [%r23] | |
8660 | cwq_8_62: | |
8661 | ta T_CHANGE_NONHPRIV | |
8662 | .word 0xa1414000 ! 86: RDPC rd %pc, %r16 | |
8663 | .word 0xe28008a0 ! 87: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
8664 | ibp_8_63: | |
8665 | nop | |
8666 | .word 0xc19fd960 ! 88: LDDFA_R ldda [%r31, %r0], %f0 | |
8667 | ibp_8_64: | |
8668 | nop | |
8669 | ta T_CHANGE_NONHPRIV | |
8670 | .word 0xc32fc014 ! 89: STXFSR_R st-sfr %f1, [%r20, %r31] | |
8671 | jmptr_8_65: | |
8672 | nop | |
8673 | best_set_reg(0xe0a00000, %r20, %r27) | |
8674 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
8675 | .word 0xe22fe120 ! 91: STB_I stb %r17, [%r31 + 0x0120] | |
8676 | .word 0xe19fd960 ! 92: LDDFA_R ldda [%r31, %r0], %f16 | |
8677 | .word 0x89800011 ! 93: WRTICK_R wr %r0, %r17, %tick | |
8678 | .word 0xe3e7c032 ! 94: CASA_I casa [%r31] 0x 1, %r18, %r17 | |
8679 | setx 0x85a258b78ed6c205, %r1, %r28 | |
8680 | stxa %r28, [%g0] 0x73 | |
8681 | intvec_8_67: | |
8682 | .word 0x39400001 ! 95: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8683 | nop | |
8684 | mov 0x80, %g3 | |
8685 | stxa %g3, [%g3] 0x57 | |
8686 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
8687 | .word 0xe25fc000 ! 96: LDX_R ldx [%r31 + %r0], %r17 | |
8688 | mondo_8_68: | |
8689 | nop | |
8690 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
8691 | ta T_CHANGE_PRIV | |
8692 | stxa %r16, [%r0+0x3c8] %asi | |
8693 | .word 0x9d940013 ! 97: WRPR_WSTATE_R wrpr %r16, %r19, %wstate | |
8694 | fpinit_8_69: | |
8695 | nop | |
8696 | setx fp_data_quads, %r19, %r20 | |
8697 | ldd [%r20], %f0 | |
8698 | ldd [%r20+8], %f4 | |
8699 | ld [%r20+16], %fsr | |
8700 | ld [%r20+24], %r19 | |
8701 | wr %r19, %g0, %gsr | |
8702 | .word 0x89a009c4 ! 98: FDIVd fdivd %f0, %f4, %f4 | |
8703 | .word 0xa190200a ! 99: WRPR_GL_I wrpr %r0, 0x000a, %- | |
8704 | mondo_8_70: | |
8705 | nop | |
8706 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
8707 | ta T_CHANGE_PRIV | |
8708 | stxa %r13, [%r0+0x3c0] %asi | |
8709 | .word 0x9d924010 ! 100: WRPR_WSTATE_R wrpr %r9, %r16, %wstate | |
8710 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
8711 | reduce_priv_lvl_8_71: | |
8712 | ta T_CHANGE_NONHPRIV ! macro | |
8713 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
8714 | .word 0x8d802004 ! 103: WRFPRS_I wr %r0, 0x0004, %fprs | |
8715 | splash_hpstate_8_73: | |
8716 | ta T_CHANGE_NONHPRIV | |
8717 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> | |
8718 | .word 0x819824c5 ! 104: WRHPR_HPSTATE_I wrhpr %r0, 0x04c5, %hpstate | |
8719 | splash_hpstate_8_74: | |
8720 | ta T_CHANGE_NONHPRIV | |
8721 | .word 0x30800001 ! 1: BA ba,a <label_0x1> | |
8722 | .word 0x81983de3 ! 105: WRHPR_HPSTATE_I wrhpr %r0, 0x1de3, %hpstate | |
8723 | .word 0x91948010 ! 106: WRPR_PIL_R wrpr %r18, %r16, %pil | |
8724 | trapasi_8_76: | |
8725 | nop | |
8726 | mov 0x28, %r1 ! (VA for ASI 0x5a) | |
8727 | .word 0xe2d04b40 ! 107: LDSHA_R ldsha [%r1, %r0] 0x5a, %r17 | |
8728 | mondo_8_77: | |
8729 | nop | |
8730 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
8731 | stxa %r11, [%r0+0x3c0] %asi | |
8732 | .word 0x9d940003 ! 108: WRPR_WSTATE_R wrpr %r16, %r3, %wstate | |
8733 | dvapa_8_78: | |
8734 | nop | |
8735 | ta T_CHANGE_HPRIV | |
8736 | mov 0xba7, %r20 | |
8737 | mov 0x15, %r19 | |
8738 | sllx %r20, 23, %r20 | |
8739 | or %r19, %r20, %r19 | |
8740 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
8741 | mov 0x38, %r18 | |
8742 | stxa %r31, [%r18]0x58 | |
8743 | ta T_CHANGE_NONHPRIV | |
8744 | .word 0xa7b50490 ! 109: FCMPLE32 fcmple32 %d20, %d16, %r19 | |
8745 | .word 0xe727c000 ! 110: STF_R st %f19, [%r0, %r31] | |
8746 | ibp_8_79: | |
8747 | nop | |
8748 | ta T_CHANGE_NONHPRIV | |
8749 | .word 0xe63fe010 ! 111: STD_I std %r19, [%r31 + 0x0010] | |
8750 | splash_lsu_8_80: | |
8751 | nop | |
8752 | ta T_CHANGE_HPRIV | |
8753 | set 0xcfbcd78e, %r2 | |
8754 | mov 0x2, %r1 | |
8755 | sllx %r1, 32, %r1 | |
8756 | or %r1, %r2, %r2 | |
8757 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
8758 | .word 0x3d400001 ! 112: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
8759 | jmptr_8_81: | |
8760 | nop | |
8761 | best_set_reg(0xe0a00000, %r20, %r27) | |
8762 | .word 0xb7c6c000 ! 113: JMPL_R jmpl %r27 + %r0, %r27 | |
8763 | intveclr_8_82: | |
8764 | nop | |
8765 | ta T_CHANGE_HPRIV | |
8766 | setx 0x4e2796d5e5a3ae3e, %r1, %r28 | |
8767 | stxa %r28, [%g0] 0x72 | |
8768 | ta T_CHANGE_NONHPRIV | |
8769 | .word 0x25400001 ! 114: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8770 | intveclr_8_83: | |
8771 | nop | |
8772 | ta T_CHANGE_HPRIV | |
8773 | setx 0x8eb71397b8d9ad9e, %r1, %r28 | |
8774 | stxa %r28, [%g0] 0x72 | |
8775 | .word 0x25400001 ! 115: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8776 | .word 0xa1902007 ! 116: WRPR_GL_I wrpr %r0, 0x0007, %- | |
8777 | nop | |
8778 | ta T_CHANGE_HPRIV | |
8779 | mov 0x8+1, %r10 | |
8780 | set sync_thr_counter5, %r23 | |
8781 | #ifndef SPC | |
8782 | ldxa [%g0]0x63, %o1 | |
8783 | and %o1, 0x38, %o1 | |
8784 | add %o1, %r23, %r23 | |
8785 | sllx %o1, 5, %o3 !(CID*256) | |
8786 | #endif | |
8787 | cas [%r23],%g0,%r10 !lock | |
8788 | brnz %r10, cwq_8_84 | |
8789 | rd %asi, %r12 | |
8790 | wr %g0, 0x40, %asi | |
8791 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8792 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8793 | cmp %l1, 1 | |
8794 | bne cwq_8_84 | |
8795 | set CWQ_BASE, %l6 | |
8796 | #ifndef SPC | |
8797 | add %l6, %o3, %l6 | |
8798 | #endif | |
8799 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8800 | best_set_reg(0x20610090, %l1, %l2) !# Control Word | |
8801 | sllx %l2, 32, %l2 | |
8802 | stx %l2, [%l6 + 0x0] | |
8803 | membar #Sync | |
8804 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
8805 | sub %l2, 0x40, %l2 | |
8806 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
8807 | wr %r12, %g0, %asi | |
8808 | st %g0, [%r23] | |
8809 | cwq_8_84: | |
8810 | ta T_CHANGE_NONHPRIV | |
8811 | .word 0xa9414000 ! 117: RDPC rd %pc, %r20 | |
8812 | fpinit_8_85: | |
8813 | nop | |
8814 | setx fp_data_quads, %r19, %r20 | |
8815 | ldd [%r20], %f0 | |
8816 | ldd [%r20+8], %f4 | |
8817 | ld [%r20+16], %fsr | |
8818 | ld [%r20+24], %r19 | |
8819 | wr %r19, %g0, %gsr | |
8820 | .word 0x87a80a44 ! 118: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
8821 | ibp_8_86: | |
8822 | nop | |
8823 | .word 0xd31fc008 ! 119: LDDF_R ldd [%r31, %r8], %f9 | |
8824 | setx 0xd283f90ade138fa9, %r1, %r28 | |
8825 | stxa %r28, [%g0] 0x73 | |
8826 | intvec_8_87: | |
8827 | .word 0x39400001 ! 120: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8828 | #if (defined SPC || defined CMP1) | |
8829 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_88) + 0, 16, 16)) -> intp(1,0,19) | |
8830 | #else | |
8831 | setx 0x4c4d84109257dadf, %r1, %r28 | |
8832 | stxa %r28, [%g0] 0x73 | |
8833 | #endif | |
8834 | intvec_8_88: | |
8835 | .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8836 | .word 0x89800011 ! 122: WRTICK_R wr %r0, %r17, %tick | |
8837 | fbug,a,pn %fcc0, skip_8_90 | |
8838 | .word 0x9f802ead ! 1: SIR sir 0x0ead | |
8839 | .align 512 | |
8840 | skip_8_90: | |
8841 | .word 0xa5b2c4c7 ! 123: FCMPNE32 fcmpne32 %d42, %d38, %r18 | |
8842 | mondo_8_91: | |
8843 | nop | |
8844 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
8845 | stxa %r13, [%r0+0x3c0] %asi | |
8846 | .word 0x9d91c009 ! 124: WRPR_WSTATE_R wrpr %r7, %r9, %wstate | |
8847 | .word 0x8d802000 ! 125: WRFPRS_I wr %r0, 0x0000, %fprs | |
8848 | ibp_8_92: | |
8849 | nop | |
8850 | ta T_CHANGE_NONHPRIV | |
8851 | .word 0x99b24493 ! 126: FCMPLE32 fcmple32 %d40, %d50, %r12 | |
8852 | .word 0x8d802000 ! 127: WRFPRS_I wr %r0, 0x0000, %fprs | |
8853 | .word 0x8d802000 ! 128: WRFPRS_I wr %r0, 0x0000, %fprs | |
8854 | unsupttte_8_93: | |
8855 | nop | |
8856 | ta T_CHANGE_HPRIV | |
8857 | mov 1, %r20 | |
8858 | sllx %r20, 63, %r20 | |
8859 | or %r20, 2,%r20 | |
8860 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
8861 | ta T_CHANGE_NONHPRIV | |
8862 | .word 0xa1b20485 ! 129: FCMPLE32 fcmple32 %d8, %d36, %r16 | |
8863 | invalw | |
8864 | mov 0x33, %r30 | |
8865 | .word 0x83d0001e ! 130: Tcc_R te icc_or_xcc, %r0 + %r30 | |
8866 | fpinit_8_94: | |
8867 | nop | |
8868 | setx fp_data_quads, %r19, %r20 | |
8869 | ldd [%r20], %f0 | |
8870 | ldd [%r20+8], %f4 | |
8871 | ld [%r20+16], %fsr | |
8872 | ld [%r20+24], %r19 | |
8873 | wr %r19, %g0, %gsr | |
8874 | .word 0x87a80a44 ! 131: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
8875 | intveclr_8_95: | |
8876 | nop | |
8877 | ta T_CHANGE_HPRIV | |
8878 | setx 0x3be9ed00b7939d63, %r1, %r28 | |
8879 | stxa %r28, [%g0] 0x72 | |
8880 | ta T_CHANGE_NONHPRIV | |
8881 | .word 0x25400001 ! 132: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8882 | intveclr_8_96: | |
8883 | nop | |
8884 | ta T_CHANGE_HPRIV | |
8885 | setx 0x2ef9667a5c2c6c2e, %r1, %r28 | |
8886 | stxa %r28, [%g0] 0x72 | |
8887 | .word 0x25400001 ! 133: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8888 | setx 0x205ee3b72fe184b3, %r1, %r28 | |
8889 | stxa %r28, [%g0] 0x73 | |
8890 | intvec_8_97: | |
8891 | .word 0x39400001 ! 134: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8892 | .word 0x9191400b ! 135: WRPR_PIL_R wrpr %r5, %r11, %pil | |
8893 | .word 0xa7a00172 ! 136: FABSq dis not found | |
8894 | ||
8895 | mondo_8_100: | |
8896 | nop | |
8897 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
8898 | ta T_CHANGE_PRIV | |
8899 | stxa %r16, [%r0+0x3e8] %asi | |
8900 | .word 0x9d91c007 ! 137: WRPR_WSTATE_R wrpr %r7, %r7, %wstate | |
8901 | splash_cmpr_8_101: | |
8902 | mov 0, %r18 | |
8903 | sllx %r18, 63, %r18 | |
8904 | rd %tick, %r17 | |
8905 | add %r17, 0x70, %r17 | |
8906 | or %r17, %r18, %r17 | |
8907 | ta T_CHANGE_PRIV | |
8908 | .word 0xaf800011 ! 138: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
8909 | brlez,a,pt %r16, skip_8_102 | |
8910 | fbe skip_8_102 | |
8911 | .align 1024 | |
8912 | skip_8_102: | |
8913 | .word 0xc36fe1ad ! 139: PREFETCH_I prefetch [%r31 + 0x01ad], #one_read | |
8914 | intveclr_8_103: | |
8915 | nop | |
8916 | ta T_CHANGE_HPRIV | |
8917 | setx 0x42276caf4ce3c08b, %r1, %r28 | |
8918 | stxa %r28, [%g0] 0x72 | |
8919 | .word 0x25400001 ! 140: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8920 | .word 0xa7853d24 ! 141: WR_GRAPHICS_STATUS_REG_I wr %r20, 0x1d24, %- | |
8921 | .word 0x93d02033 ! 142: Tcc_I tne icc_or_xcc, %r0 + 51 | |
8922 | .word 0x99a00172 ! 143: FABSq dis not found | |
8923 | ||
8924 | splash_cmpr_8_105: | |
8925 | mov 0, %r18 | |
8926 | sllx %r18, 63, %r18 | |
8927 | rd %tick, %r17 | |
8928 | add %r17, 0x50, %r17 | |
8929 | or %r17, %r18, %r17 | |
8930 | .word 0xb3800011 ! 144: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
8931 | cwp_8_106: | |
8932 | set user_data_start, %o7 | |
8933 | .word 0x93902003 ! 145: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
8934 | mondo_8_107: | |
8935 | nop | |
8936 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
8937 | ta T_CHANGE_PRIV | |
8938 | stxa %r19, [%r0+0x3e8] %asi | |
8939 | .word 0x9d94400b ! 146: WRPR_WSTATE_R wrpr %r17, %r11, %wstate | |
8940 | brcommon3_8_108: | |
8941 | nop | |
8942 | setx common_target, %r12, %r27 | |
8943 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
8944 | ba,a .+12 | |
8945 | .word 0xe86fe020 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0020] | |
8946 | ba,a .+8 | |
8947 | jmpl %r27+0, %r27 | |
8948 | .word 0xe89fe100 ! 147: LDDA_I ldda [%r31, + 0x0100] %asi, %r20 | |
8949 | ibp_8_109: | |
8950 | nop | |
8951 | .word 0xa3a4c9ac ! 148: FDIVs fdivs %f19, %f12, %f17 | |
8952 | trapasi_8_110: | |
8953 | nop | |
8954 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
8955 | .word 0xd4d04a00 ! 149: LDSHA_R ldsha [%r1, %r0] 0x50, %r10 | |
8956 | setx 0xdb1fe55e50626c32, %r1, %r28 | |
8957 | stxa %r28, [%g0] 0x73 | |
8958 | intvec_8_111: | |
8959 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8960 | splash_cmpr_8_112: | |
8961 | mov 0, %r18 | |
8962 | sllx %r18, 63, %r18 | |
8963 | rd %tick, %r17 | |
8964 | add %r17, 0x80, %r17 | |
8965 | or %r17, %r18, %r17 | |
8966 | ta T_CHANGE_PRIV | |
8967 | .word 0xaf800011 ! 151: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
8968 | splash_lsu_8_113: | |
8969 | nop | |
8970 | ta T_CHANGE_HPRIV | |
8971 | set 0x423b831d, %r2 | |
8972 | mov 0x2, %r1 | |
8973 | sllx %r1, 32, %r1 | |
8974 | or %r1, %r2, %r2 | |
8975 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
8976 | .word 0x3d400001 ! 152: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
8977 | .word 0x81510000 ! 153: RDPR_TICK rdpr %tick, %r0 | |
8978 | splash_lsu_8_114: | |
8979 | nop | |
8980 | ta T_CHANGE_HPRIV | |
8981 | set 0x6ce1f5a4, %r2 | |
8982 | mov 0x3, %r1 | |
8983 | sllx %r1, 32, %r1 | |
8984 | or %r1, %r2, %r2 | |
8985 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
8986 | .word 0x3d400001 ! 154: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
8987 | pmu_8_115: | |
8988 | nop | |
8989 | setx 0xffffff17fffff334, %g1, %g7 | |
8990 | .word 0xa3800007 ! 155: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
8991 | #if (defined SPC || defined CMP1) | |
8992 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_116) + 0, 16, 16)) -> intp(1,0,27) | |
8993 | #else | |
8994 | setx 0x3cfea2ed75139897, %r1, %r28 | |
8995 | stxa %r28, [%g0] 0x73 | |
8996 | #endif | |
8997 | intvec_8_116: | |
8998 | .word 0x39400001 ! 156: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8999 | .word 0xa9848014 ! 157: WR_SET_SOFTINT_R wr %r18, %r20, %set_softint | |
9000 | iaw_8_117: | |
9001 | nop | |
9002 | ta T_CHANGE_HPRIV | |
9003 | mov 8, %r18 | |
9004 | rd %asi, %r12 | |
9005 | wr %r0, 0x41, %asi | |
9006 | set sync_thr_counter4, %r23 | |
9007 | #ifndef SPC | |
9008 | ldxa [%g0]0x63, %r8 | |
9009 | and %r8, 0x38, %r8 ! Core ID | |
9010 | add %r8, %r23, %r23 | |
9011 | #else | |
9012 | mov 0, %r8 | |
9013 | #endif | |
9014 | mov 0x8, %r16 | |
9015 | iaw_startwait8_117: | |
9016 | cas [%r23],%g0,%r16 !lock | |
9017 | brz,a %r16, continue_iaw_8_117 | |
9018 | mov (~0x8&0xf), %r16 | |
9019 | ld [%r23], %r16 | |
9020 | iaw_wait8_117: | |
9021 | brnz %r16, iaw_wait8_117 | |
9022 | ld [%r23], %r16 | |
9023 | ba iaw_startwait8_117 | |
9024 | mov 0x8, %r16 | |
9025 | continue_iaw_8_117: | |
9026 | sllx %r16, %r8, %r16 !Mask for my core only | |
9027 | ldxa [0x58]%asi, %r17 !Running_status | |
9028 | wait_for_stat_8_117: | |
9029 | ldxa [0x50]%asi, %r13 !Running_rw | |
9030 | cmp %r13, %r17 | |
9031 | bne,a %xcc, wait_for_stat_8_117 | |
9032 | ldxa [0x58]%asi, %r17 !Running_status | |
9033 | stxa %r16, [0x68]%asi !Park (W1C) | |
9034 | ldxa [0x50]%asi, %r14 !Running_rw | |
9035 | wait_for_iaw_8_117: | |
9036 | ldxa [0x58]%asi, %r17 !Running_status | |
9037 | cmp %r14, %r17 | |
9038 | bne,a %xcc, wait_for_iaw_8_117 | |
9039 | ldxa [0x50]%asi, %r14 !Running_rw | |
9040 | iaw_doit8_117: | |
9041 | mov 0x38, %r18 | |
9042 | iaw3_8_117: | |
9043 | setx vahole_target1, %r20, %r19 | |
9044 | or %r19, 0x1, %r19 | |
9045 | stxa %r19, [%r18]0x50 | |
9046 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
9047 | st %g0, [%r23] !clear lock | |
9048 | wr %r0, %r12, %asi ! restore %asi | |
9049 | ta T_CHANGE_NONHPRIV | |
9050 | .word 0xc3eb4030 ! 158: PREFETCHA_R prefetcha [%r13, %r16] 0x01, #one_read | |
9051 | .word 0x95b18587 ! 159: FCMPGT32 fcmpgt32 %d6, %d38, %r10 | |
9052 | ta T_CHANGE_NONHPRIV | |
9053 | .word 0x8143e011 ! 160: MEMBAR membar #LoadLoad | #Lookaside | |
9054 | splash_hpstate_8_119: | |
9055 | ta T_CHANGE_NONHPRIV | |
9056 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> | |
9057 | .word 0x81982784 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x0784, %hpstate | |
9058 | .word 0x8d9035dc ! 162: WRPR_PSTATE_I wrpr %r0, 0x15dc, %pstate | |
9059 | otherw | |
9060 | mov 0x32, %r30 | |
9061 | .word 0x93d0001e ! 163: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
9062 | .word 0xe19fdc00 ! 164: LDDFA_R ldda [%r31, %r0], %f16 | |
9063 | setx 0x27b55911f2deb5fc, %r1, %r28 | |
9064 | stxa %r28, [%g0] 0x73 | |
9065 | intvec_8_121: | |
9066 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9067 | ibp_8_122: | |
9068 | nop | |
9069 | .word 0xe19fe080 ! 166: LDDFA_I ldda [%r31, 0x0080], %f16 | |
9070 | splash_lsu_8_123: | |
9071 | nop | |
9072 | ta T_CHANGE_HPRIV | |
9073 | set 0x4e8c309b, %r2 | |
9074 | mov 0x6, %r1 | |
9075 | sllx %r1, 32, %r1 | |
9076 | or %r1, %r2, %r2 | |
9077 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
9078 | ta T_CHANGE_NONHPRIV | |
9079 | .word 0x3d400001 ! 167: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
9080 | nop | |
9081 | mov 0x80, %g3 | |
9082 | stxa %g3, [%g3] 0x57 | |
9083 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9084 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9085 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9086 | .word 0xd05fc000 ! 168: LDX_R ldx [%r31 + %r0], %r8 | |
9087 | jmptr_8_124: | |
9088 | nop | |
9089 | best_set_reg(0xe0a00000, %r20, %r27) | |
9090 | .word 0xb7c6c000 ! 169: JMPL_R jmpl %r27 + %r0, %r27 | |
9091 | nop | |
9092 | ta T_CHANGE_HPRIV ! macro | |
9093 | donret_8_125: | |
9094 | rd %pc, %r12 | |
9095 | add %r12, (donretarg_8_125-donret_8_125), %r12 | |
9096 | add %r12, 0x8, %r11 ! nonseq tnpc | |
9097 | wrpr %g0, 0x2, %tl | |
9098 | wrpr %g0, %r12, %tpc | |
9099 | wrpr %g0, %r11, %tnpc | |
9100 | set (0x004fef00 | (32 << 24)), %r13 | |
9101 | and %r12, 0xfff, %r14 | |
9102 | sllx %r14, 30, %r14 | |
9103 | or %r13, %r14, %r20 | |
9104 | wrpr %r20, %g0, %tstate | |
9105 | wrhpr %g0, 0x1c67, %htstate | |
9106 | ta T_CHANGE_NONHPRIV ! rand=1 (8) | |
9107 | .word 0x22ca0001 ! 1: BRZ brz,a,pt %r8,<label_0xa0001> | |
9108 | done | |
9109 | donretarg_8_125: | |
9110 | .word 0x3c800001 ! 170: BPOS bpos,a <label_0x1> | |
9111 | iaw_8_126: | |
9112 | nop | |
9113 | ta T_CHANGE_HPRIV | |
9114 | mov 8, %r18 | |
9115 | rd %asi, %r12 | |
9116 | wr %r0, 0x41, %asi | |
9117 | set sync_thr_counter4, %r23 | |
9118 | #ifndef SPC | |
9119 | ldxa [%g0]0x63, %r8 | |
9120 | and %r8, 0x38, %r8 ! Core ID | |
9121 | add %r8, %r23, %r23 | |
9122 | #else | |
9123 | mov 0, %r8 | |
9124 | #endif | |
9125 | mov 0x8, %r16 | |
9126 | iaw_startwait8_126: | |
9127 | cas [%r23],%g0,%r16 !lock | |
9128 | brz,a %r16, continue_iaw_8_126 | |
9129 | mov (~0x8&0xf), %r16 | |
9130 | ld [%r23], %r16 | |
9131 | iaw_wait8_126: | |
9132 | brnz %r16, iaw_wait8_126 | |
9133 | ld [%r23], %r16 | |
9134 | ba iaw_startwait8_126 | |
9135 | mov 0x8, %r16 | |
9136 | continue_iaw_8_126: | |
9137 | sllx %r16, %r8, %r16 !Mask for my core only | |
9138 | ldxa [0x58]%asi, %r17 !Running_status | |
9139 | wait_for_stat_8_126: | |
9140 | ldxa [0x50]%asi, %r13 !Running_rw | |
9141 | cmp %r13, %r17 | |
9142 | bne,a %xcc, wait_for_stat_8_126 | |
9143 | ldxa [0x58]%asi, %r17 !Running_status | |
9144 | stxa %r16, [0x68]%asi !Park (W1C) | |
9145 | ldxa [0x50]%asi, %r14 !Running_rw | |
9146 | wait_for_iaw_8_126: | |
9147 | ldxa [0x58]%asi, %r17 !Running_status | |
9148 | cmp %r14, %r17 | |
9149 | bne,a %xcc, wait_for_iaw_8_126 | |
9150 | ldxa [0x50]%asi, %r14 !Running_rw | |
9151 | iaw_doit8_126: | |
9152 | mov 0x38, %r18 | |
9153 | iaw4_8_126: | |
9154 | setx common_target, %r20, %r19 | |
9155 | or %r19, 0x1, %r19 | |
9156 | stxa %r19, [%r18]0x50 | |
9157 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
9158 | st %g0, [%r23] !clear lock | |
9159 | wr %r0, %r12, %asi ! restore %asi | |
9160 | ta T_CHANGE_NONHPRIV | |
9161 | .word 0xe1bfdc00 ! 171: STDFA_R stda %f16, [%r0, %r31] | |
9162 | trapasi_8_127: | |
9163 | nop | |
9164 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
9165 | .word 0xd0c84e60 ! 172: LDSBA_R ldsba [%r1, %r0] 0x73, %r8 | |
9166 | .word 0x89800011 ! 173: WRTICK_R wr %r0, %r17, %tick | |
9167 | fpinit_8_129: | |
9168 | nop | |
9169 | setx fp_data_quads, %r19, %r20 | |
9170 | ldd [%r20], %f0 | |
9171 | ldd [%r20+8], %f4 | |
9172 | ld [%r20+16], %fsr | |
9173 | ld [%r20+24], %r19 | |
9174 | wr %r19, %g0, %gsr | |
9175 | .word 0x8db00484 ! 174: FCMPLE32 fcmple32 %d0, %d4, %r6 | |
9176 | .word 0x89800011 ! 175: WRTICK_R wr %r0, %r17, %tick | |
9177 | .word 0xd127e0e0 ! 176: STF_I st %f8, [0x00e0, %r31] | |
9178 | .word 0x89800011 ! 177: WRTICK_R wr %r0, %r17, %tick | |
9179 | .word 0xd077e108 ! 178: STX_I stx %r8, [%r31 + 0x0108] | |
9180 | #if (defined SPC || defined CMP1) | |
9181 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_132) + 24, 16, 16)) -> intp(6,0,8) | |
9182 | #else | |
9183 | setx 0xe7c408ea685c780f, %r1, %r28 | |
9184 | stxa %r28, [%g0] 0x73 | |
9185 | #endif | |
9186 | intvec_8_132: | |
9187 | .word 0x39400001 ! 179: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9188 | .word 0x87802020 ! 180: WRASI_I wr %r0, 0x0020, %asi | |
9189 | setx 0xc884960117177774, %r1, %r28 | |
9190 | stxa %r28, [%g0] 0x73 | |
9191 | intvec_8_133: | |
9192 | .word 0x39400001 ! 181: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9193 | .word 0xd037e1c8 ! 182: STH_I sth %r8, [%r31 + 0x01c8] | |
9194 | iaw_8_134: | |
9195 | nop | |
9196 | ta T_CHANGE_HPRIV | |
9197 | mov 8, %r18 | |
9198 | rd %asi, %r12 | |
9199 | wr %r0, 0x41, %asi | |
9200 | set sync_thr_counter4, %r23 | |
9201 | #ifndef SPC | |
9202 | ldxa [%g0]0x63, %r8 | |
9203 | and %r8, 0x38, %r8 ! Core ID | |
9204 | add %r8, %r23, %r23 | |
9205 | #else | |
9206 | mov 0, %r8 | |
9207 | #endif | |
9208 | mov 0x8, %r16 | |
9209 | iaw_startwait8_134: | |
9210 | cas [%r23],%g0,%r16 !lock | |
9211 | brz,a %r16, continue_iaw_8_134 | |
9212 | mov (~0x8&0xf), %r16 | |
9213 | ld [%r23], %r16 | |
9214 | iaw_wait8_134: | |
9215 | brnz %r16, iaw_wait8_134 | |
9216 | ld [%r23], %r16 | |
9217 | ba iaw_startwait8_134 | |
9218 | mov 0x8, %r16 | |
9219 | continue_iaw_8_134: | |
9220 | sllx %r16, %r8, %r16 !Mask for my core only | |
9221 | ldxa [0x58]%asi, %r17 !Running_status | |
9222 | wait_for_stat_8_134: | |
9223 | ldxa [0x50]%asi, %r13 !Running_rw | |
9224 | cmp %r13, %r17 | |
9225 | bne,a %xcc, wait_for_stat_8_134 | |
9226 | ldxa [0x58]%asi, %r17 !Running_status | |
9227 | stxa %r16, [0x68]%asi !Park (W1C) | |
9228 | ldxa [0x50]%asi, %r14 !Running_rw | |
9229 | wait_for_iaw_8_134: | |
9230 | ldxa [0x58]%asi, %r17 !Running_status | |
9231 | cmp %r14, %r17 | |
9232 | bne,a %xcc, wait_for_iaw_8_134 | |
9233 | ldxa [0x50]%asi, %r14 !Running_rw | |
9234 | iaw_doit8_134: | |
9235 | mov 0x38, %r18 | |
9236 | iaw4_8_134: | |
9237 | setx common_target, %r20, %r19 | |
9238 | or %r19, 0x1, %r19 | |
9239 | stxa %r19, [%r18]0x50 | |
9240 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
9241 | st %g0, [%r23] !clear lock | |
9242 | wr %r0, %r12, %asi ! restore %asi | |
9243 | ta T_CHANGE_NONHPRIV | |
9244 | .word 0xd11fe120 ! 183: LDDF_I ldd [%r31, 0x0120], %f8 | |
9245 | br_badelay2_8_135: | |
9246 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
9247 | allclean | |
9248 | .word 0xa1b10306 ! 184: ALIGNADDRESS alignaddr %r4, %r6, %r16 | |
9249 | splash_tba_8_136: | |
9250 | nop | |
9251 | ta T_CHANGE_PRIV | |
9252 | set 0x120000, %r12 | |
9253 | .word 0x8b90000c ! 185: WRPR_TBA_R wrpr %r0, %r12, %tba | |
9254 | trapasi_8_137: | |
9255 | nop | |
9256 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
9257 | .word 0xe2884a00 ! 186: LDUBA_R lduba [%r1, %r0] 0x50, %r17 | |
9258 | ceter_8_138: | |
9259 | nop | |
9260 | ta T_CHANGE_HPRIV | |
9261 | mov 4, %r17 | |
9262 | sllx %r17, 60, %r17 | |
9263 | mov 0x18, %r16 | |
9264 | stxa %r17, [%r16]0x4c | |
9265 | ta T_CHANGE_NONHPRIV | |
9266 | .word 0x95410000 ! 187: RDTICK rd %tick, %r10 | |
9267 | intveclr_8_139: | |
9268 | nop | |
9269 | ta T_CHANGE_HPRIV | |
9270 | setx 0x063e5dd80cecd6f6, %r1, %r28 | |
9271 | stxa %r28, [%g0] 0x72 | |
9272 | .word 0x25400001 ! 188: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
9273 | brcommon2_8_140: | |
9274 | nop | |
9275 | setx common_target, %r12, %r27 | |
9276 | ba,a .+12 | |
9277 | .word 0xe5148009 ! 1: LDQF_R - [%r18, %r9], %f18 | |
9278 | ba,a .+8 | |
9279 | jmpl %r27+0, %r27 | |
9280 | .word 0xe1bfe1e0 ! 189: STDFA_I stda %f16, [0x01e0, %r31] | |
9281 | trapasi_8_141: | |
9282 | nop | |
9283 | mov 0x20, %r1 ! (VA for ASI 0x5a) | |
9284 | .word 0xe6d04b40 ! 190: LDSHA_R ldsha [%r1, %r0] 0x5a, %r19 | |
9285 | ibp_8_142: | |
9286 | nop | |
9287 | .word 0x93b40493 ! 191: FCMPLE32 fcmple32 %d16, %d50, %r9 | |
9288 | .word 0xd737e1f0 ! 192: STQF_I - %f11, [0x01f0, %r31] | |
9289 | splash_cmpr_8_143: | |
9290 | mov 0, %r18 | |
9291 | sllx %r18, 63, %r18 | |
9292 | rd %tick, %r17 | |
9293 | add %r17, 0x100, %r17 | |
9294 | or %r17, %r18, %r17 | |
9295 | ta T_CHANGE_HPRIV | |
9296 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
9297 | .word 0xb3800011 ! 193: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
9298 | tagged_8_144: | |
9299 | tsubcctv %r10, 0x10ba, %r13 | |
9300 | .word 0xd607e0fd ! 194: LDUW_I lduw [%r31 + 0x00fd], %r11 | |
9301 | .word 0x9aac0011 ! 195: ANDNcc_R andncc %r16, %r17, %r13 | |
9302 | .word 0xd4bfc020 ! 196: STDA_R stda %r10, [%r31 + %r0] 0x01 | |
9303 | intveclr_8_145: | |
9304 | nop | |
9305 | ta T_CHANGE_HPRIV | |
9306 | setx 0x5b0f7b1652a0af94, %r1, %r28 | |
9307 | stxa %r28, [%g0] 0x72 | |
9308 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
9309 | dvapa_8_146: | |
9310 | nop | |
9311 | ta T_CHANGE_HPRIV | |
9312 | mov 0xbd0, %r20 | |
9313 | mov 0x11, %r19 | |
9314 | sllx %r20, 23, %r20 | |
9315 | or %r19, %r20, %r19 | |
9316 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
9317 | mov 0x38, %r18 | |
9318 | stxa %r31, [%r18]0x58 | |
9319 | ta T_CHANGE_NONHPRIV | |
9320 | .word 0x99a409c4 ! 198: FDIVd fdivd %f16, %f4, %f12 | |
9321 | ibp_8_147: | |
9322 | nop | |
9323 | ta T_CHANGE_NONHPRIV | |
9324 | .word 0xd9e7e00d ! 199: CASA_R casa [%r31] %asi, %r13, %r12 | |
9325 | .word 0x89800011 ! 200: WRTICK_R wr %r0, %r17, %tick | |
9326 | jmptr_8_149: | |
9327 | nop | |
9328 | best_set_reg(0xe0a00000, %r20, %r27) | |
9329 | .word 0xb7c6c000 ! 201: JMPL_R jmpl %r27 + %r0, %r27 | |
9330 | nop | |
9331 | nop | |
9332 | ta T_CHANGE_PRIV | |
9333 | wrpr %g0, %g0, %gl | |
9334 | nop | |
9335 | nop | |
9336 | setx join_lbl_0_0, %g1, %g2 | |
9337 | jmp %g2 | |
9338 | nop | |
9339 | fork_lbl_0_3: | |
9340 | ta T_CHANGE_NONHPRIV | |
9341 | splash_lsu_4_0: | |
9342 | nop | |
9343 | ta T_CHANGE_HPRIV | |
9344 | set 0xc616ea7b, %r2 | |
9345 | mov 0x7, %r1 | |
9346 | sllx %r1, 32, %r1 | |
9347 | or %r1, %r2, %r2 | |
9348 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
9349 | ta T_CHANGE_NONHPRIV | |
9350 | ibp_4_1: | |
9351 | nop | |
9352 | ta T_CHANGE_HPRIV | |
9353 | mov 8, %r18 | |
9354 | rd %asi, %r12 | |
9355 | wr %r0, 0x41, %asi | |
9356 | set sync_thr_counter4, %r23 | |
9357 | #ifndef SPC | |
9358 | ldxa [%g0]0x63, %r8 | |
9359 | and %r8, 0x38, %r8 ! Core ID | |
9360 | add %r8, %r23, %r23 | |
9361 | #else | |
9362 | mov 0, %r8 | |
9363 | #endif | |
9364 | mov 0x4, %r16 | |
9365 | ibp_startwait4_1: | |
9366 | cas [%r23],%g0,%r16 !lock | |
9367 | brz,a %r16, continue_ibp_4_1 | |
9368 | mov (~0x4&0xf), %r16 | |
9369 | ld [%r23], %r16 | |
9370 | ibp_wait4_1: | |
9371 | brnz %r16, ibp_wait4_1 | |
9372 | ld [%r23], %r16 | |
9373 | ba ibp_startwait4_1 | |
9374 | mov 0x4, %r16 | |
9375 | continue_ibp_4_1: | |
9376 | sllx %r16, %r8, %r16 !Mask for my core only | |
9377 | ldxa [0x58]%asi, %r17 !Running_status | |
9378 | wait_for_stat_4_1: | |
9379 | ldxa [0x50]%asi, %r13 !Running_rw | |
9380 | cmp %r13, %r17 | |
9381 | bne,a %xcc, wait_for_stat_4_1 | |
9382 | ldxa [0x58]%asi, %r17 !Running_status | |
9383 | stxa %r16, [0x68]%asi !Park (W1C) | |
9384 | ldxa [0x50]%asi, %r14 !Running_rw | |
9385 | wait_for_ibp_4_1: | |
9386 | ldxa [0x58]%asi, %r17 !Running_status | |
9387 | cmp %r14, %r17 | |
9388 | bne,a %xcc, wait_for_ibp_4_1 | |
9389 | ldxa [0x50]%asi, %r14 !Running_rw | |
9390 | ibp_doit4_1: | |
9391 | best_set_reg(0x0000004084c00976,%r19, %r20) | |
9392 | stxa %r20, [%r18]0x42 | |
9393 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9394 | st %g0, [%r23] !clear lock | |
9395 | wr %r0, %r12, %asi !restore %asi | |
9396 | ta T_CHANGE_NONHPRIV | |
9397 | .word 0xc19fe0a0 ! 1: LDDFA_I ldda [%r31, 0x00a0], %f0 | |
9398 | splash_lsu_4_2: | |
9399 | nop | |
9400 | ta T_CHANGE_HPRIV | |
9401 | set 0x0d9c3658, %r2 | |
9402 | mov 0x5, %r1 | |
9403 | sllx %r1, 32, %r1 | |
9404 | or %r1, %r2, %r2 | |
9405 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
9406 | ta T_CHANGE_NONHPRIV | |
9407 | .word 0x3d400001 ! 2: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
9408 | splash_lsu_4_3: | |
9409 | nop | |
9410 | ta T_CHANGE_HPRIV | |
9411 | set 0x9d82a173, %r2 | |
9412 | mov 0x7, %r1 | |
9413 | sllx %r1, 32, %r1 | |
9414 | or %r1, %r2, %r2 | |
9415 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
9416 | .word 0x3d400001 ! 3: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
9417 | .word 0xe277e1c4 ! 4: STX_I stx %r17, [%r31 + 0x01c4] | |
9418 | .word 0x30780001 ! 5: BPA <illegal instruction> | |
9419 | .word 0x91d020b3 ! 6: Tcc_I ta icc_or_xcc, %r0 + 179 | |
9420 | .word 0x89800011 ! 7: WRTICK_R wr %r0, %r17, %tick | |
9421 | splash_htba_4_5: | |
9422 | nop | |
9423 | ta T_CHANGE_HPRIV | |
9424 | setx 0x0000000200280000, %r11, %r12 | |
9425 | .word 0x8b98000c ! 8: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
9426 | .word 0xe2800c80 ! 9: LDUWA_R lduwa [%r0, %r0] 0x64, %r17 | |
9427 | bg skip_4_6 | |
9428 | .word 0x9f802676 ! 1: SIR sir 0x0676 | |
9429 | .align 512 | |
9430 | skip_4_6: | |
9431 | .word 0xc36fe1a0 ! 10: PREFETCH_I prefetch [%r31 + 0x01a0], #one_read | |
9432 | splash_hpstate_4_7: | |
9433 | ta T_CHANGE_NONHPRIV | |
9434 | .word 0x30800001 ! 1: BA ba,a <label_0x1> | |
9435 | .word 0x819826dd ! 11: WRHPR_HPSTATE_I wrhpr %r0, 0x06dd, %hpstate | |
9436 | unsupttte_4_8: | |
9437 | nop | |
9438 | ta T_CHANGE_HPRIV | |
9439 | mov 1, %r20 | |
9440 | sllx %r20, 63, %r20 | |
9441 | or %r20, 2,%r20 | |
9442 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
9443 | ta T_CHANGE_NONHPRIV | |
9444 | .word 0x95a409b1 ! 12: FDIVs fdivs %f16, %f17, %f10 | |
9445 | .word 0xd4800a80 ! 13: LDUWA_R lduwa [%r0, %r0] 0x54, %r10 | |
9446 | setx 0xa641a1f2d327cdda, %r1, %r28 | |
9447 | stxa %r28, [%g0] 0x73 | |
9448 | intvec_4_9: | |
9449 | .word 0x39400001 ! 14: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9450 | trapasi_4_10: | |
9451 | nop | |
9452 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
9453 | .word 0xd4c04a00 ! 15: LDSWA_R ldswa [%r1, %r0] 0x50, %r10 | |
9454 | ibp_4_11: | |
9455 | nop | |
9456 | ta T_CHANGE_HPRIV | |
9457 | mov 8, %r18 | |
9458 | rd %asi, %r12 | |
9459 | wr %r0, 0x41, %asi | |
9460 | set sync_thr_counter4, %r23 | |
9461 | #ifndef SPC | |
9462 | ldxa [%g0]0x63, %r8 | |
9463 | and %r8, 0x38, %r8 ! Core ID | |
9464 | add %r8, %r23, %r23 | |
9465 | #else | |
9466 | mov 0, %r8 | |
9467 | #endif | |
9468 | mov 0x4, %r16 | |
9469 | ibp_startwait4_11: | |
9470 | cas [%r23],%g0,%r16 !lock | |
9471 | brz,a %r16, continue_ibp_4_11 | |
9472 | mov (~0x4&0xf), %r16 | |
9473 | ld [%r23], %r16 | |
9474 | ibp_wait4_11: | |
9475 | brnz %r16, ibp_wait4_11 | |
9476 | ld [%r23], %r16 | |
9477 | ba ibp_startwait4_11 | |
9478 | mov 0x4, %r16 | |
9479 | continue_ibp_4_11: | |
9480 | sllx %r16, %r8, %r16 !Mask for my core only | |
9481 | ldxa [0x58]%asi, %r17 !Running_status | |
9482 | wait_for_stat_4_11: | |
9483 | ldxa [0x50]%asi, %r13 !Running_rw | |
9484 | cmp %r13, %r17 | |
9485 | bne,a %xcc, wait_for_stat_4_11 | |
9486 | ldxa [0x58]%asi, %r17 !Running_status | |
9487 | stxa %r16, [0x68]%asi !Park (W1C) | |
9488 | ldxa [0x50]%asi, %r14 !Running_rw | |
9489 | wait_for_ibp_4_11: | |
9490 | ldxa [0x58]%asi, %r17 !Running_status | |
9491 | cmp %r14, %r17 | |
9492 | bne,a %xcc, wait_for_ibp_4_11 | |
9493 | ldxa [0x50]%asi, %r14 !Running_rw | |
9494 | ibp_doit4_11: | |
9495 | best_set_reg(0x00000050f2c976f0,%r19, %r20) | |
9496 | stxa %r20, [%r18]0x42 | |
9497 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9498 | st %g0, [%r23] !clear lock | |
9499 | wr %r0, %r12, %asi !restore %asi | |
9500 | .word 0xc3ecc033 ! 16: PREFETCHA_R prefetcha [%r19, %r19] 0x01, #one_read | |
9501 | .word 0xe69fd140 ! 17: LDDA_R ldda [%r31, %r0] 0x8a, %r19 | |
9502 | brcommon3_4_12: | |
9503 | nop | |
9504 | setx common_target, %r12, %r27 | |
9505 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
9506 | ba,a .+12 | |
9507 | .word 0xe737e130 ! 1: STQF_I - %f19, [0x0130, %r31] | |
9508 | ba,a .+8 | |
9509 | jmpl %r27+0, %r27 | |
9510 | .word 0xe73fc014 ! 18: STDF_R std %f19, [%r20, %r31] | |
9511 | nop | |
9512 | mov 0x80, %g3 | |
9513 | stxa %g3, [%g3] 0x5f | |
9514 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9515 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9516 | .word 0xe65fc000 ! 19: LDX_R ldx [%r31 + %r0], %r19 | |
9517 | splash_hpstate_4_13: | |
9518 | .word 0x819837b1 ! 20: WRHPR_HPSTATE_I wrhpr %r0, 0x17b1, %hpstate | |
9519 | intveclr_4_14: | |
9520 | nop | |
9521 | ta T_CHANGE_HPRIV | |
9522 | setx 0xe1b32b646a2ea56a, %r1, %r28 | |
9523 | stxa %r28, [%g0] 0x72 | |
9524 | ta T_CHANGE_NONHPRIV | |
9525 | .word 0x25400001 ! 21: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
9526 | nop | |
9527 | ta T_CHANGE_HPRIV | |
9528 | mov 0x4+1, %r10 | |
9529 | set sync_thr_counter5, %r23 | |
9530 | #ifndef SPC | |
9531 | ldxa [%g0]0x63, %o1 | |
9532 | and %o1, 0x38, %o1 | |
9533 | add %o1, %r23, %r23 | |
9534 | sllx %o1, 5, %o3 !(CID*256) | |
9535 | #endif | |
9536 | cas [%r23],%g0,%r10 !lock | |
9537 | brnz %r10, cwq_4_15 | |
9538 | rd %asi, %r12 | |
9539 | wr %g0, 0x40, %asi | |
9540 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
9541 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
9542 | cmp %l1, 1 | |
9543 | bne cwq_4_15 | |
9544 | set CWQ_BASE, %l6 | |
9545 | #ifndef SPC | |
9546 | add %l6, %o3, %l6 | |
9547 | #endif | |
9548 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
9549 | best_set_reg(0x20610000, %l1, %l2) !# Control Word | |
9550 | sllx %l2, 32, %l2 | |
9551 | stx %l2, [%l6 + 0x0] | |
9552 | membar #Sync | |
9553 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
9554 | sub %l2, 0x40, %l2 | |
9555 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
9556 | wr %r12, %g0, %asi | |
9557 | st %g0, [%r23] | |
9558 | cwq_4_15: | |
9559 | ta T_CHANGE_NONHPRIV | |
9560 | .word 0x97414000 ! 22: RDPC rd %pc, %r11 | |
9561 | .word 0xd8d7e010 ! 23: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r12 | |
9562 | .word 0xc19fd960 ! 24: LDDFA_R ldda [%r31, %r0], %f0 | |
9563 | #if (defined SPC || defined CMP1) | |
9564 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_16) + 16, 16, 16)) -> intp(3,0,1) | |
9565 | #else | |
9566 | setx 0xf5c4d9489115393b, %r1, %r28 | |
9567 | stxa %r28, [%g0] 0x73 | |
9568 | #endif | |
9569 | intvec_4_16: | |
9570 | .word 0x39400001 ! 25: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9571 | splash_tba_4_17: | |
9572 | nop | |
9573 | ta T_CHANGE_PRIV | |
9574 | setx 0x0000000400380000, %r11, %r12 | |
9575 | .word 0x8b90000c ! 26: WRPR_TBA_R wrpr %r0, %r12, %tba | |
9576 | nop | |
9577 | mov 0x80, %g3 | |
9578 | stxa %g3, [%g3] 0x57 | |
9579 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9580 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9581 | .word 0xd85fc000 ! 27: LDX_R ldx [%r31 + %r0], %r12 | |
9582 | .word 0xb1820012 ! 28: WR_STICK_REG_R wr %r8, %r18, %- | |
9583 | .word 0xd877e010 ! 29: STX_I stx %r12, [%r31 + 0x0010] | |
9584 | tagged_4_18: | |
9585 | tsubcctv %r19, 0x139b, %r17 | |
9586 | .word 0xd807e1c0 ! 30: LDUW_I lduw [%r31 + 0x01c0], %r12 | |
9587 | .word 0x89800011 ! 31: WRTICK_R wr %r0, %r17, %tick | |
9588 | trapasi_4_20: | |
9589 | nop | |
9590 | mov 0x20, %r1 ! (VA for ASI 0x5b) | |
9591 | .word 0xd8884b60 ! 32: LDUBA_R lduba [%r1, %r0] 0x5b, %r12 | |
9592 | fpinit_4_21: | |
9593 | nop | |
9594 | setx fp_data_quads, %r19, %r20 | |
9595 | ldd [%r20], %f0 | |
9596 | ldd [%r20+8], %f4 | |
9597 | ld [%r20+16], %fsr | |
9598 | ld [%r20+24], %r19 | |
9599 | wr %r19, %g0, %gsr | |
9600 | .word 0x87a80a44 ! 33: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
9601 | nop | |
9602 | ta T_CHANGE_HPRIV | |
9603 | mov 0x4+1, %r10 | |
9604 | set sync_thr_counter5, %r23 | |
9605 | #ifndef SPC | |
9606 | ldxa [%g0]0x63, %o1 | |
9607 | and %o1, 0x38, %o1 | |
9608 | add %o1, %r23, %r23 | |
9609 | sllx %o1, 5, %o3 !(CID*256) | |
9610 | #endif | |
9611 | cas [%r23],%g0,%r10 !lock | |
9612 | brnz %r10, cwq_4_22 | |
9613 | rd %asi, %r12 | |
9614 | wr %g0, 0x40, %asi | |
9615 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
9616 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
9617 | cmp %l1, 1 | |
9618 | bne cwq_4_22 | |
9619 | set CWQ_BASE, %l6 | |
9620 | #ifndef SPC | |
9621 | add %l6, %o3, %l6 | |
9622 | #endif | |
9623 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
9624 | best_set_reg(0x20610000, %l1, %l2) !# Control Word | |
9625 | sllx %l2, 32, %l2 | |
9626 | stx %l2, [%l6 + 0x0] | |
9627 | membar #Sync | |
9628 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
9629 | sub %l2, 0x40, %l2 | |
9630 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
9631 | wr %r12, %g0, %asi | |
9632 | st %g0, [%r23] | |
9633 | cwq_4_22: | |
9634 | ta T_CHANGE_NONHPRIV | |
9635 | .word 0xa7414000 ! 34: RDPC rd %pc, %r19 | |
9636 | jmptr_4_23: | |
9637 | nop | |
9638 | best_set_reg(0xe1200000, %r20, %r27) | |
9639 | .word 0xb7c6c000 ! 35: JMPL_R jmpl %r27 + %r0, %r27 | |
9640 | nop | |
9641 | ta T_CHANGE_HPRIV ! macro | |
9642 | donret_4_24: | |
9643 | rd %pc, %r12 | |
9644 | add %r12, (donretarg_4_24-donret_4_24+4), %r12 | |
9645 | add %r12, 0x4, %r11 ! seq tnpc | |
9646 | wrpr %g0, 0x2, %tl | |
9647 | wrpr %g0, %r12, %tpc | |
9648 | wrpr %g0, %r11, %tnpc | |
9649 | set (0x003af600 | (0x8a << 24)), %r13 | |
9650 | and %r12, 0xfff, %r14 | |
9651 | sllx %r14, 30, %r14 | |
9652 | or %r13, %r14, %r20 | |
9653 | wrpr %r20, %g0, %tstate | |
9654 | wrhpr %g0, 0xf1d, %htstate | |
9655 | ta T_CHANGE_NONHPRIV ! rand=1 (4) | |
9656 | retry | |
9657 | donretarg_4_24: | |
9658 | .word 0xd66fe019 ! 36: LDSTUB_I ldstub %r11, [%r31 + 0x0019] | |
9659 | nop | |
9660 | ta T_CHANGE_HPRIV ! macro | |
9661 | donret_4_25: | |
9662 | rd %pc, %r12 | |
9663 | add %r12, (donretarg_4_25-donret_4_25+4), %r12 | |
9664 | add %r12, 0x4, %r11 ! seq tnpc | |
9665 | wrpr %g0, 0x1, %tl | |
9666 | wrpr %g0, %r12, %tpc | |
9667 | wrpr %g0, %r11, %tnpc | |
9668 | set (0x00761700 | (0x88 << 24)), %r13 | |
9669 | and %r12, 0xfff, %r14 | |
9670 | sllx %r14, 30, %r14 | |
9671 | or %r13, %r14, %r20 | |
9672 | wrpr %r20, %g0, %tstate | |
9673 | wrhpr %g0, 0x1f9a, %htstate | |
9674 | ta T_CHANGE_NONHPRIV ! rand=1 (4) | |
9675 | done | |
9676 | donretarg_4_25: | |
9677 | .word 0x2acc0001 ! 37: BRNZ brnz,a,pt %r16,<label_0xc0001> | |
9678 | fpinit_4_26: | |
9679 | nop | |
9680 | setx fp_data_quads, %r19, %r20 | |
9681 | ldd [%r20], %f0 | |
9682 | ldd [%r20+8], %f4 | |
9683 | ld [%r20+16], %fsr | |
9684 | ld [%r20+24], %r19 | |
9685 | wr %r19, %g0, %gsr | |
9686 | .word 0xc3e83df7 ! 38: PREFETCHA_I prefetcha [%r0, + 0xfffffdf7] %asi, #one_read | |
9687 | nop | |
9688 | mov 0x80, %g3 | |
9689 | stxa %g3, [%g3] 0x57 | |
9690 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9691 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9692 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9693 | .word 0xd65fc000 ! 39: LDX_R ldx [%r31 + %r0], %r11 | |
9694 | nop | |
9695 | mov 0x80, %g3 | |
9696 | stxa %g3, [%g3] 0x5f | |
9697 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9698 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9699 | .word 0xd65fc000 ! 40: LDX_R ldx [%r31 + %r0], %r11 | |
9700 | mondo_4_27: | |
9701 | nop | |
9702 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
9703 | ta T_CHANGE_PRIV | |
9704 | stxa %r17, [%r0+0x3e0] %asi | |
9705 | .word 0x9d914010 ! 41: WRPR_WSTATE_R wrpr %r5, %r16, %wstate | |
9706 | ibp_4_28: | |
9707 | nop | |
9708 | ta T_CHANGE_HPRIV | |
9709 | mov 8, %r18 | |
9710 | rd %asi, %r12 | |
9711 | wr %r0, 0x41, %asi | |
9712 | set sync_thr_counter4, %r23 | |
9713 | #ifndef SPC | |
9714 | ldxa [%g0]0x63, %r8 | |
9715 | and %r8, 0x38, %r8 ! Core ID | |
9716 | add %r8, %r23, %r23 | |
9717 | #else | |
9718 | mov 0, %r8 | |
9719 | #endif | |
9720 | mov 0x4, %r16 | |
9721 | ibp_startwait4_28: | |
9722 | cas [%r23],%g0,%r16 !lock | |
9723 | brz,a %r16, continue_ibp_4_28 | |
9724 | mov (~0x4&0xf), %r16 | |
9725 | ld [%r23], %r16 | |
9726 | ibp_wait4_28: | |
9727 | brnz %r16, ibp_wait4_28 | |
9728 | ld [%r23], %r16 | |
9729 | ba ibp_startwait4_28 | |
9730 | mov 0x4, %r16 | |
9731 | continue_ibp_4_28: | |
9732 | sllx %r16, %r8, %r16 !Mask for my core only | |
9733 | ldxa [0x58]%asi, %r17 !Running_status | |
9734 | wait_for_stat_4_28: | |
9735 | ldxa [0x50]%asi, %r13 !Running_rw | |
9736 | cmp %r13, %r17 | |
9737 | bne,a %xcc, wait_for_stat_4_28 | |
9738 | ldxa [0x58]%asi, %r17 !Running_status | |
9739 | stxa %r16, [0x68]%asi !Park (W1C) | |
9740 | ldxa [0x50]%asi, %r14 !Running_rw | |
9741 | wait_for_ibp_4_28: | |
9742 | ldxa [0x58]%asi, %r17 !Running_status | |
9743 | cmp %r14, %r17 | |
9744 | bne,a %xcc, wait_for_ibp_4_28 | |
9745 | ldxa [0x50]%asi, %r14 !Running_rw | |
9746 | ibp_doit4_28: | |
9747 | best_set_reg(0x0000005080f6f0ce,%r19, %r20) | |
9748 | stxa %r20, [%r18]0x42 | |
9749 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9750 | st %g0, [%r23] !clear lock | |
9751 | wr %r0, %r12, %asi !restore %asi | |
9752 | ta T_CHANGE_NONHPRIV | |
9753 | .word 0xd63fe160 ! 42: STD_I std %r11, [%r31 + 0x0160] | |
9754 | fpinit_4_29: | |
9755 | nop | |
9756 | setx fp_data_quads, %r19, %r20 | |
9757 | ldd [%r20], %f0 | |
9758 | ldd [%r20+8], %f4 | |
9759 | ld [%r20+16], %fsr | |
9760 | ld [%r20+24], %r19 | |
9761 | wr %r19, %g0, %gsr | |
9762 | .word 0x8db00484 ! 43: FCMPLE32 fcmple32 %d0, %d4, %r6 | |
9763 | nop | |
9764 | ta T_CHANGE_HPRIV | |
9765 | mov 0x4+1, %r10 | |
9766 | set sync_thr_counter5, %r23 | |
9767 | #ifndef SPC | |
9768 | ldxa [%g0]0x63, %o1 | |
9769 | and %o1, 0x38, %o1 | |
9770 | add %o1, %r23, %r23 | |
9771 | sllx %o1, 5, %o3 !(CID*256) | |
9772 | #endif | |
9773 | cas [%r23],%g0,%r10 !lock | |
9774 | brnz %r10, cwq_4_30 | |
9775 | rd %asi, %r12 | |
9776 | wr %g0, 0x40, %asi | |
9777 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
9778 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
9779 | cmp %l1, 1 | |
9780 | bne cwq_4_30 | |
9781 | set CWQ_BASE, %l6 | |
9782 | #ifndef SPC | |
9783 | add %l6, %o3, %l6 | |
9784 | #endif | |
9785 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
9786 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word | |
9787 | sllx %l2, 32, %l2 | |
9788 | stx %l2, [%l6 + 0x0] | |
9789 | membar #Sync | |
9790 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
9791 | sub %l2, 0x40, %l2 | |
9792 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
9793 | wr %r12, %g0, %asi | |
9794 | st %g0, [%r23] | |
9795 | cwq_4_30: | |
9796 | ta T_CHANGE_NONHPRIV | |
9797 | .word 0x99414000 ! 44: RDPC rd %pc, %r12 | |
9798 | .word 0xe4dfe038 ! 45: LDXA_I ldxa [%r31, + 0x0038] %asi, %r18 | |
9799 | .word 0xa9a289a8 ! 46: FDIVs fdivs %f10, %f8, %f20 | |
9800 | ibp_4_32: | |
9801 | nop | |
9802 | ta T_CHANGE_HPRIV | |
9803 | mov 8, %r18 | |
9804 | rd %asi, %r12 | |
9805 | wr %r0, 0x41, %asi | |
9806 | set sync_thr_counter4, %r23 | |
9807 | #ifndef SPC | |
9808 | ldxa [%g0]0x63, %r8 | |
9809 | and %r8, 0x38, %r8 ! Core ID | |
9810 | add %r8, %r23, %r23 | |
9811 | #else | |
9812 | mov 0, %r8 | |
9813 | #endif | |
9814 | mov 0x4, %r16 | |
9815 | ibp_startwait4_32: | |
9816 | cas [%r23],%g0,%r16 !lock | |
9817 | brz,a %r16, continue_ibp_4_32 | |
9818 | mov (~0x4&0xf), %r16 | |
9819 | ld [%r23], %r16 | |
9820 | ibp_wait4_32: | |
9821 | brnz %r16, ibp_wait4_32 | |
9822 | ld [%r23], %r16 | |
9823 | ba ibp_startwait4_32 | |
9824 | mov 0x4, %r16 | |
9825 | continue_ibp_4_32: | |
9826 | sllx %r16, %r8, %r16 !Mask for my core only | |
9827 | ldxa [0x58]%asi, %r17 !Running_status | |
9828 | wait_for_stat_4_32: | |
9829 | ldxa [0x50]%asi, %r13 !Running_rw | |
9830 | cmp %r13, %r17 | |
9831 | bne,a %xcc, wait_for_stat_4_32 | |
9832 | ldxa [0x58]%asi, %r17 !Running_status | |
9833 | stxa %r16, [0x68]%asi !Park (W1C) | |
9834 | ldxa [0x50]%asi, %r14 !Running_rw | |
9835 | wait_for_ibp_4_32: | |
9836 | ldxa [0x58]%asi, %r17 !Running_status | |
9837 | cmp %r14, %r17 | |
9838 | bne,a %xcc, wait_for_ibp_4_32 | |
9839 | ldxa [0x50]%asi, %r14 !Running_rw | |
9840 | ibp_doit4_32: | |
9841 | best_set_reg(0x00000040d8f0ce80,%r19, %r20) | |
9842 | stxa %r20, [%r18]0x42 | |
9843 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9844 | st %g0, [%r23] !clear lock | |
9845 | wr %r0, %r12, %asi !restore %asi | |
9846 | .word 0xa5a449a5 ! 47: FDIVs fdivs %f17, %f5, %f18 | |
9847 | nop | |
9848 | ta T_CHANGE_HPRIV | |
9849 | mov 0x4, %r10 | |
9850 | set sync_thr_counter6, %r23 | |
9851 | #ifndef SPC | |
9852 | ldxa [%g0]0x63, %o1 | |
9853 | and %o1, 0x38, %o1 | |
9854 | add %o1, %r23, %r23 | |
9855 | #endif | |
9856 | cas [%r23],%g0,%r10 !lock | |
9857 | brnz %r10, sma_4_33 | |
9858 | rd %asi, %r12 | |
9859 | wr %g0, 0x40, %asi | |
9860 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
9861 | set 0x00121fff, %g1 | |
9862 | stxa %g1, [%g0 + 0x80] %asi | |
9863 | wr %r12, %g0, %asi | |
9864 | st %g0, [%r23] | |
9865 | sma_4_33: | |
9866 | ta T_CHANGE_NONHPRIV | |
9867 | .word 0xe5e7e00a ! 48: CASA_R casa [%r31] %asi, %r10, %r18 | |
9868 | change_to_randtl_4_34: | |
9869 | ta T_CHANGE_PRIV ! macro | |
9870 | done_change_to_randtl_4_34: | |
9871 | .word 0x8f902000 ! 49: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
9872 | .word 0xc1bfdf20 ! 50: STDFA_R stda %f0, [%r0, %r31] | |
9873 | pmu_4_35: | |
9874 | nop | |
9875 | setx 0xfffffa7ffffff9a2, %g1, %g7 | |
9876 | .word 0xa3800007 ! 51: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
9877 | splash_cmpr_4_36: | |
9878 | mov 1, %r18 | |
9879 | sllx %r18, 63, %r18 | |
9880 | rd %tick, %r17 | |
9881 | add %r17, 0x100, %r17 | |
9882 | or %r17, %r18, %r17 | |
9883 | ta T_CHANGE_HPRIV | |
9884 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
9885 | ta T_CHANGE_PRIV | |
9886 | .word 0xaf800011 ! 52: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
9887 | nop | |
9888 | ta T_CHANGE_HPRIV ! macro | |
9889 | donret_4_37: | |
9890 | rd %pc, %r12 | |
9891 | add %r12, (donretarg_4_37-donret_4_37), %r12 | |
9892 | add %r12, 0x4, %r11 ! seq tnpc | |
9893 | wrpr %g0, 0x2, %tl | |
9894 | wrpr %g0, %r12, %tpc | |
9895 | wrpr %g0, %r11, %tnpc | |
9896 | set (0x00a2f900 | (0x8b << 24)), %r13 | |
9897 | and %r12, 0xfff, %r14 | |
9898 | sllx %r14, 30, %r14 | |
9899 | or %r13, %r14, %r20 | |
9900 | wrpr %r20, %g0, %tstate | |
9901 | wrhpr %g0, 0x7cd, %htstate | |
9902 | ta T_CHANGE_NONPRIV ! rand=0 (4) | |
9903 | done | |
9904 | donretarg_4_37: | |
9905 | .word 0xe4ffe06c ! 53: SWAPA_I swapa %r18, [%r31 + 0x006c] %asi | |
9906 | .word 0xa5508000 ! 54: RDPR_TSTATE <illegal instruction> | |
9907 | brcommon1_4_38: | |
9908 | nop | |
9909 | setx common_target, %r12, %r27 | |
9910 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
9911 | ba,a .+12 | |
9912 | .word 0xc32fe010 ! 1: STXFSR_I st-sfr %f1, [0x0010, %r31] | |
9913 | ba,a .+8 | |
9914 | jmpl %r27+0, %r27 | |
9915 | .word 0x87ad0a52 ! 55: FCMPd fcmpd %fcc<n>, %f20, %f18 | |
9916 | trapasi_4_39: | |
9917 | nop | |
9918 | mov 0x18, %r1 ! (VA for ASI 0x4c) | |
9919 | .word 0xd8c84980 ! 56: LDSBA_R ldsba [%r1, %r0] 0x4c, %r12 | |
9920 | nop | |
9921 | ta T_CHANGE_HPRIV | |
9922 | mov 0x4, %r10 | |
9923 | set sync_thr_counter6, %r23 | |
9924 | #ifndef SPC | |
9925 | ldxa [%g0]0x63, %o1 | |
9926 | and %o1, 0x38, %o1 | |
9927 | add %o1, %r23, %r23 | |
9928 | #endif | |
9929 | cas [%r23],%g0,%r10 !lock | |
9930 | brnz %r10, sma_4_40 | |
9931 | rd %asi, %r12 | |
9932 | wr %g0, 0x40, %asi | |
9933 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
9934 | set 0x00121fff, %g1 | |
9935 | stxa %g1, [%g0 + 0x80] %asi | |
9936 | wr %r12, %g0, %asi | |
9937 | st %g0, [%r23] | |
9938 | sma_4_40: | |
9939 | ta T_CHANGE_NONHPRIV | |
9940 | .word 0xd9e7e009 ! 57: CASA_R casa [%r31] %asi, %r9, %r12 | |
9941 | ba skip_4_41 | |
9942 | .word 0x9f8020a6 ! 1: SIR sir 0x00a6 | |
9943 | .align 128 | |
9944 | skip_4_41: | |
9945 | .word 0xd83fc000 ! 58: STD_R std %r12, [%r31 + %r0] | |
9946 | nop | |
9947 | ta T_CHANGE_HPRIV ! macro | |
9948 | donret_4_42: | |
9949 | rd %pc, %r12 | |
9950 | add %r12, (donretarg_4_42-donret_4_42+4), %r12 | |
9951 | add %r12, 0x4, %r11 ! seq tnpc | |
9952 | wrpr %g0, 0x2, %tl | |
9953 | wrpr %g0, %r12, %tpc | |
9954 | wrpr %g0, %r11, %tnpc | |
9955 | set (0x00429a00 | (22 << 24)), %r13 | |
9956 | and %r12, 0xfff, %r14 | |
9957 | sllx %r14, 30, %r14 | |
9958 | or %r13, %r14, %r20 | |
9959 | wrpr %r20, %g0, %tstate | |
9960 | wrhpr %g0, 0xe50, %htstate | |
9961 | ta T_CHANGE_NONHPRIV ! rand=1 (4) | |
9962 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> | |
9963 | retry | |
9964 | donretarg_4_42: | |
9965 | .word 0xd86fe04c ! 59: LDSTUB_I ldstub %r12, [%r31 + 0x004c] | |
9966 | unsupttte_4_43: | |
9967 | nop | |
9968 | ta T_CHANGE_HPRIV | |
9969 | mov 1, %r20 | |
9970 | sllx %r20, 63, %r20 | |
9971 | or %r20, 2,%r20 | |
9972 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
9973 | ta T_CHANGE_NONHPRIV | |
9974 | .word 0xa1a489ab ! 60: FDIVs fdivs %f18, %f11, %f16 | |
9975 | splash_hpstate_4_44: | |
9976 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> | |
9977 | .word 0x81983f3f ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x1f3f, %hpstate | |
9978 | nop | |
9979 | ta T_CHANGE_HPRIV ! macro | |
9980 | donret_4_45: | |
9981 | rd %pc, %r12 | |
9982 | add %r12, (donretarg_4_45-donret_4_45), %r12 | |
9983 | add %r12, 0x4, %r11 ! seq tnpc | |
9984 | wrpr %g0, 0x1, %tl | |
9985 | wrpr %g0, %r12, %tpc | |
9986 | wrpr %g0, %r11, %tnpc | |
9987 | set (0x00265b00 | (0x82 << 24)), %r13 | |
9988 | and %r12, 0xfff, %r14 | |
9989 | sllx %r14, 30, %r14 | |
9990 | or %r13, %r14, %r20 | |
9991 | wrpr %r20, %g0, %tstate | |
9992 | wrhpr %g0, 0x79d, %htstate | |
9993 | ta T_CHANGE_NONHPRIV ! rand=1 (4) | |
9994 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> | |
9995 | done | |
9996 | donretarg_4_45: | |
9997 | .word 0x33400001 ! 62: FBPE fbe,a,pn %fcc0, <label_0x1> | |
9998 | .word 0xe0c7e048 ! 63: LDSWA_I ldswa [%r31, + 0x0048] %asi, %r16 | |
9999 | trapasi_4_46: | |
10000 | nop | |
10001 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
10002 | .word 0xe0904e60 ! 64: LDUHA_R lduha [%r1, %r0] 0x73, %r16 | |
10003 | jmptr_4_47: | |
10004 | nop | |
10005 | best_set_reg(0xe1200000, %r20, %r27) | |
10006 | .word 0xb7c6c000 ! 65: JMPL_R jmpl %r27 + %r0, %r27 | |
10007 | pmu_4_48: | |
10008 | nop | |
10009 | setx 0xfffff71bfffffb0f, %g1, %g7 | |
10010 | .word 0xa3800007 ! 66: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
10011 | ibp_4_49: | |
10012 | nop | |
10013 | ta T_CHANGE_HPRIV | |
10014 | mov 8, %r18 | |
10015 | rd %asi, %r12 | |
10016 | wr %r0, 0x41, %asi | |
10017 | set sync_thr_counter4, %r23 | |
10018 | #ifndef SPC | |
10019 | ldxa [%g0]0x63, %r8 | |
10020 | and %r8, 0x38, %r8 ! Core ID | |
10021 | add %r8, %r23, %r23 | |
10022 | #else | |
10023 | mov 0, %r8 | |
10024 | #endif | |
10025 | mov 0x4, %r16 | |
10026 | ibp_startwait4_49: | |
10027 | cas [%r23],%g0,%r16 !lock | |
10028 | brz,a %r16, continue_ibp_4_49 | |
10029 | mov (~0x4&0xf), %r16 | |
10030 | ld [%r23], %r16 | |
10031 | ibp_wait4_49: | |
10032 | brnz %r16, ibp_wait4_49 | |
10033 | ld [%r23], %r16 | |
10034 | ba ibp_startwait4_49 | |
10035 | mov 0x4, %r16 | |
10036 | continue_ibp_4_49: | |
10037 | sllx %r16, %r8, %r16 !Mask for my core only | |
10038 | ldxa [0x58]%asi, %r17 !Running_status | |
10039 | wait_for_stat_4_49: | |
10040 | ldxa [0x50]%asi, %r13 !Running_rw | |
10041 | cmp %r13, %r17 | |
10042 | bne,a %xcc, wait_for_stat_4_49 | |
10043 | ldxa [0x58]%asi, %r17 !Running_status | |
10044 | stxa %r16, [0x68]%asi !Park (W1C) | |
10045 | ldxa [0x50]%asi, %r14 !Running_rw | |
10046 | wait_for_ibp_4_49: | |
10047 | ldxa [0x58]%asi, %r17 !Running_status | |
10048 | cmp %r14, %r17 | |
10049 | bne,a %xcc, wait_for_ibp_4_49 | |
10050 | ldxa [0x50]%asi, %r14 !Running_rw | |
10051 | ibp_doit4_49: | |
10052 | best_set_reg(0x000000401dce8020,%r19, %r20) | |
10053 | stxa %r20, [%r18]0x42 | |
10054 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10055 | st %g0, [%r23] !clear lock | |
10056 | wr %r0, %r12, %asi !restore %asi | |
10057 | .word 0xe1e7e011 ! 67: CASA_R casa [%r31] %asi, %r17, %r16 | |
10058 | fpinit_4_50: | |
10059 | nop | |
10060 | setx fp_data_quads, %r19, %r20 | |
10061 | ldd [%r20], %f0 | |
10062 | ldd [%r20+8], %f4 | |
10063 | ld [%r20+16], %fsr | |
10064 | ld [%r20+24], %r19 | |
10065 | wr %r19, %g0, %gsr | |
10066 | .word 0x89a009a4 ! 68: FDIVs fdivs %f0, %f4, %f4 | |
10067 | splash_tba_4_51: | |
10068 | nop | |
10069 | ta T_CHANGE_PRIV | |
10070 | setx 0x0000000400380000, %r11, %r12 | |
10071 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
10072 | nop | |
10073 | mov 0x80, %g3 | |
10074 | stxa %g3, [%g3] 0x5f | |
10075 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
10076 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
10077 | .word 0xe05fc000 ! 70: LDX_R ldx [%r31 + %r0], %r16 | |
10078 | .word 0xe0800a60 ! 71: LDUWA_R lduwa [%r0, %r0] 0x53, %r16 | |
10079 | .word 0xc3ea002a ! 72: PREFETCHA_R prefetcha [%r8, %r10] 0x01, #one_read | |
10080 | .word 0xd4800c40 ! 73: LDUWA_R lduwa [%r0, %r0] 0x62, %r10 | |
10081 | fpinit_4_53: | |
10082 | nop | |
10083 | setx fp_data_quads, %r19, %r20 | |
10084 | ldd [%r20], %f0 | |
10085 | ldd [%r20+8], %f4 | |
10086 | ld [%r20+16], %fsr | |
10087 | ld [%r20+24], %r19 | |
10088 | wr %r19, %g0, %gsr | |
10089 | .word 0x8da009c4 ! 74: FDIVd fdivd %f0, %f4, %f6 | |
10090 | nop | |
10091 | ta T_CHANGE_HPRIV | |
10092 | mov 0x4+1, %r10 | |
10093 | set sync_thr_counter5, %r23 | |
10094 | #ifndef SPC | |
10095 | ldxa [%g0]0x63, %o1 | |
10096 | and %o1, 0x38, %o1 | |
10097 | add %o1, %r23, %r23 | |
10098 | sllx %o1, 5, %o3 !(CID*256) | |
10099 | #endif | |
10100 | cas [%r23],%g0,%r10 !lock | |
10101 | brnz %r10, cwq_4_54 | |
10102 | rd %asi, %r12 | |
10103 | wr %g0, 0x40, %asi | |
10104 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
10105 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
10106 | cmp %l1, 1 | |
10107 | bne cwq_4_54 | |
10108 | set CWQ_BASE, %l6 | |
10109 | #ifndef SPC | |
10110 | add %l6, %o3, %l6 | |
10111 | #endif | |
10112 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
10113 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
10114 | sllx %l2, 32, %l2 | |
10115 | stx %l2, [%l6 + 0x0] | |
10116 | membar #Sync | |
10117 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
10118 | sub %l2, 0x40, %l2 | |
10119 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
10120 | wr %r12, %g0, %asi | |
10121 | st %g0, [%r23] | |
10122 | cwq_4_54: | |
10123 | ta T_CHANGE_NONHPRIV | |
10124 | .word 0xa7414000 ! 75: RDPC rd %pc, %r19 | |
10125 | .word 0x91910014 ! 76: WRPR_PIL_R wrpr %r4, %r20, %pil | |
10126 | #if (defined SPC || defined CMP1) | |
10127 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_56) + 32, 16, 16)) -> intp(6,0,13) | |
10128 | #else | |
10129 | setx 0x583f040fe073dde4, %r1, %r28 | |
10130 | stxa %r28, [%g0] 0x73 | |
10131 | #endif | |
10132 | intvec_4_56: | |
10133 | .word 0x39400001 ! 77: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10134 | intveclr_4_57: | |
10135 | nop | |
10136 | ta T_CHANGE_HPRIV | |
10137 | setx 0xffcb66486bf005a1, %r1, %r28 | |
10138 | stxa %r28, [%g0] 0x72 | |
10139 | ta T_CHANGE_NONHPRIV | |
10140 | .word 0x25400001 ! 78: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10141 | .word 0xd6bfe078 ! 79: STDA_I stda %r11, [%r31 + 0x0078] %asi | |
10142 | .word 0xd737c000 ! 80: STQF_R - %f11, [%r0, %r31] | |
10143 | ceter_4_58: | |
10144 | nop | |
10145 | ta T_CHANGE_HPRIV | |
10146 | mov 2, %r17 | |
10147 | sllx %r17, 60, %r17 | |
10148 | mov 0x18, %r16 | |
10149 | stxa %r17, [%r16]0x4c | |
10150 | ta T_CHANGE_NONHPRIV | |
10151 | .word 0xa3410000 ! 81: RDTICK rd %tick, %r17 | |
10152 | brcommon3_4_59: | |
10153 | nop | |
10154 | setx common_target, %r12, %r27 | |
10155 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
10156 | ba,a .+12 | |
10157 | .word 0xd66fe1e0 ! 1: LDSTUB_I ldstub %r11, [%r31 + 0x01e0] | |
10158 | ba,a .+8 | |
10159 | jmpl %r27+0, %r27 | |
10160 | .word 0xc32fc013 ! 82: STXFSR_R st-sfr %f1, [%r19, %r31] | |
10161 | .word 0xd68008a0 ! 83: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
10162 | jmptr_4_60: | |
10163 | nop | |
10164 | best_set_reg(0xe1200000, %r20, %r27) | |
10165 | .word 0xb7c6c000 ! 84: JMPL_R jmpl %r27 + %r0, %r27 | |
10166 | setx 0x451b753051352d1e, %r1, %r28 | |
10167 | stxa %r28, [%g0] 0x73 | |
10168 | intvec_4_61: | |
10169 | .word 0x39400001 ! 85: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10170 | nop | |
10171 | ta T_CHANGE_HPRIV | |
10172 | mov 0x4+1, %r10 | |
10173 | set sync_thr_counter5, %r23 | |
10174 | #ifndef SPC | |
10175 | ldxa [%g0]0x63, %o1 | |
10176 | and %o1, 0x38, %o1 | |
10177 | add %o1, %r23, %r23 | |
10178 | sllx %o1, 5, %o3 !(CID*256) | |
10179 | #endif | |
10180 | cas [%r23],%g0,%r10 !lock | |
10181 | brnz %r10, cwq_4_62 | |
10182 | rd %asi, %r12 | |
10183 | wr %g0, 0x40, %asi | |
10184 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
10185 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
10186 | cmp %l1, 1 | |
10187 | bne cwq_4_62 | |
10188 | set CWQ_BASE, %l6 | |
10189 | #ifndef SPC | |
10190 | add %l6, %o3, %l6 | |
10191 | #endif | |
10192 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
10193 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
10194 | sllx %l2, 32, %l2 | |
10195 | stx %l2, [%l6 + 0x0] | |
10196 | membar #Sync | |
10197 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
10198 | sub %l2, 0x40, %l2 | |
10199 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
10200 | wr %r12, %g0, %asi | |
10201 | st %g0, [%r23] | |
10202 | cwq_4_62: | |
10203 | ta T_CHANGE_NONHPRIV | |
10204 | .word 0xa1414000 ! 86: RDPC rd %pc, %r16 | |
10205 | .word 0xe2800ba0 ! 87: LDUWA_R lduwa [%r0, %r0] 0x5d, %r17 | |
10206 | ibp_4_63: | |
10207 | nop | |
10208 | ta T_CHANGE_HPRIV | |
10209 | mov 8, %r18 | |
10210 | rd %asi, %r12 | |
10211 | wr %r0, 0x41, %asi | |
10212 | set sync_thr_counter4, %r23 | |
10213 | #ifndef SPC | |
10214 | ldxa [%g0]0x63, %r8 | |
10215 | and %r8, 0x38, %r8 ! Core ID | |
10216 | add %r8, %r23, %r23 | |
10217 | #else | |
10218 | mov 0, %r8 | |
10219 | #endif | |
10220 | mov 0x4, %r16 | |
10221 | ibp_startwait4_63: | |
10222 | cas [%r23],%g0,%r16 !lock | |
10223 | brz,a %r16, continue_ibp_4_63 | |
10224 | mov (~0x4&0xf), %r16 | |
10225 | ld [%r23], %r16 | |
10226 | ibp_wait4_63: | |
10227 | brnz %r16, ibp_wait4_63 | |
10228 | ld [%r23], %r16 | |
10229 | ba ibp_startwait4_63 | |
10230 | mov 0x4, %r16 | |
10231 | continue_ibp_4_63: | |
10232 | sllx %r16, %r8, %r16 !Mask for my core only | |
10233 | ldxa [0x58]%asi, %r17 !Running_status | |
10234 | wait_for_stat_4_63: | |
10235 | ldxa [0x50]%asi, %r13 !Running_rw | |
10236 | cmp %r13, %r17 | |
10237 | bne,a %xcc, wait_for_stat_4_63 | |
10238 | ldxa [0x58]%asi, %r17 !Running_status | |
10239 | stxa %r16, [0x68]%asi !Park (W1C) | |
10240 | ldxa [0x50]%asi, %r14 !Running_rw | |
10241 | wait_for_ibp_4_63: | |
10242 | ldxa [0x58]%asi, %r17 !Running_status | |
10243 | cmp %r14, %r17 | |
10244 | bne,a %xcc, wait_for_ibp_4_63 | |
10245 | ldxa [0x50]%asi, %r14 !Running_rw | |
10246 | ibp_doit4_63: | |
10247 | best_set_reg(0x00000050fbc020da,%r19, %r20) | |
10248 | stxa %r20, [%r18]0x42 | |
10249 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10250 | st %g0, [%r23] !clear lock | |
10251 | wr %r0, %r12, %asi !restore %asi | |
10252 | .word 0xc19fd920 ! 88: LDDFA_R ldda [%r31, %r0], %f0 | |
10253 | ibp_4_64: | |
10254 | nop | |
10255 | ta T_CHANGE_HPRIV | |
10256 | mov 8, %r18 | |
10257 | rd %asi, %r12 | |
10258 | wr %r0, 0x41, %asi | |
10259 | set sync_thr_counter4, %r23 | |
10260 | #ifndef SPC | |
10261 | ldxa [%g0]0x63, %r8 | |
10262 | and %r8, 0x38, %r8 ! Core ID | |
10263 | add %r8, %r23, %r23 | |
10264 | #else | |
10265 | mov 0, %r8 | |
10266 | #endif | |
10267 | mov 0x4, %r16 | |
10268 | ibp_startwait4_64: | |
10269 | cas [%r23],%g0,%r16 !lock | |
10270 | brz,a %r16, continue_ibp_4_64 | |
10271 | mov (~0x4&0xf), %r16 | |
10272 | ld [%r23], %r16 | |
10273 | ibp_wait4_64: | |
10274 | brnz %r16, ibp_wait4_64 | |
10275 | ld [%r23], %r16 | |
10276 | ba ibp_startwait4_64 | |
10277 | mov 0x4, %r16 | |
10278 | continue_ibp_4_64: | |
10279 | sllx %r16, %r8, %r16 !Mask for my core only | |
10280 | ldxa [0x58]%asi, %r17 !Running_status | |
10281 | wait_for_stat_4_64: | |
10282 | ldxa [0x50]%asi, %r13 !Running_rw | |
10283 | cmp %r13, %r17 | |
10284 | bne,a %xcc, wait_for_stat_4_64 | |
10285 | ldxa [0x58]%asi, %r17 !Running_status | |
10286 | stxa %r16, [0x68]%asi !Park (W1C) | |
10287 | ldxa [0x50]%asi, %r14 !Running_rw | |
10288 | wait_for_ibp_4_64: | |
10289 | ldxa [0x58]%asi, %r17 !Running_status | |
10290 | cmp %r14, %r17 | |
10291 | bne,a %xcc, wait_for_ibp_4_64 | |
10292 | ldxa [0x50]%asi, %r14 !Running_rw | |
10293 | ibp_doit4_64: | |
10294 | best_set_reg(0x00000040a7e0da55,%r19, %r20) | |
10295 | stxa %r20, [%r18]0x42 | |
10296 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10297 | st %g0, [%r23] !clear lock | |
10298 | wr %r0, %r12, %asi !restore %asi | |
10299 | ta T_CHANGE_NONHPRIV | |
10300 | .word 0xe31fe050 ! 89: LDDF_I ldd [%r31, 0x0050], %f17 | |
10301 | jmptr_4_65: | |
10302 | nop | |
10303 | best_set_reg(0xe1200000, %r20, %r27) | |
10304 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
10305 | .word 0xe22fe013 ! 91: STB_I stb %r17, [%r31 + 0x0013] | |
10306 | .word 0xe19fde00 ! 92: LDDFA_R ldda [%r31, %r0], %f16 | |
10307 | .word 0x89800011 ! 93: WRTICK_R wr %r0, %r17, %tick | |
10308 | .word 0xe3e7c028 ! 94: CASA_I casa [%r31] 0x 1, %r8, %r17 | |
10309 | setx 0x3cd5dc78fb725786, %r1, %r28 | |
10310 | stxa %r28, [%g0] 0x73 | |
10311 | intvec_4_67: | |
10312 | .word 0x39400001 ! 95: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10313 | nop | |
10314 | mov 0x80, %g3 | |
10315 | stxa %g3, [%g3] 0x5f | |
10316 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
10317 | .word 0xe25fc000 ! 96: LDX_R ldx [%r31 + %r0], %r17 | |
10318 | mondo_4_68: | |
10319 | nop | |
10320 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
10321 | ta T_CHANGE_PRIV | |
10322 | stxa %r20, [%r0+0x3d0] %asi | |
10323 | .word 0x9d92800c ! 97: WRPR_WSTATE_R wrpr %r10, %r12, %wstate | |
10324 | fpinit_4_69: | |
10325 | nop | |
10326 | setx fp_data_quads, %r19, %r20 | |
10327 | ldd [%r20], %f0 | |
10328 | ldd [%r20+8], %f4 | |
10329 | ld [%r20+16], %fsr | |
10330 | ld [%r20+24], %r19 | |
10331 | wr %r19, %g0, %gsr | |
10332 | .word 0xc3e838fc ! 98: PREFETCHA_I prefetcha [%r0, + 0xfffff8fc] %asi, #one_read | |
10333 | .word 0xa190200a ! 99: WRPR_GL_I wrpr %r0, 0x000a, %- | |
10334 | mondo_4_70: | |
10335 | nop | |
10336 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
10337 | ta T_CHANGE_PRIV | |
10338 | stxa %r16, [%r0+0x3e0] %asi | |
10339 | .word 0x9d948013 ! 100: WRPR_WSTATE_R wrpr %r18, %r19, %wstate | |
10340 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
10341 | reduce_priv_lvl_4_71: | |
10342 | ta T_CHANGE_NONHPRIV ! macro | |
10343 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
10344 | .word 0x8d802004 ! 103: WRFPRS_I wr %r0, 0x0004, %fprs | |
10345 | splash_hpstate_4_73: | |
10346 | ta T_CHANGE_NONHPRIV | |
10347 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> | |
10348 | .word 0x81983c55 ! 104: WRHPR_HPSTATE_I wrhpr %r0, 0x1c55, %hpstate | |
10349 | splash_hpstate_4_74: | |
10350 | ta T_CHANGE_NONHPRIV | |
10351 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10352 | .word 0x81982c16 ! 105: WRHPR_HPSTATE_I wrhpr %r0, 0x0c16, %hpstate | |
10353 | .word 0x9191c014 ! 106: WRPR_PIL_R wrpr %r7, %r20, %pil | |
10354 | trapasi_4_76: | |
10355 | nop | |
10356 | mov 0x28, %r1 ! (VA for ASI 0x5a) | |
10357 | .word 0xe2d84b40 ! 107: LDXA_R ldxa [%r1, %r0] 0x5a, %r17 | |
10358 | mondo_4_77: | |
10359 | nop | |
10360 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
10361 | stxa %r11, [%r0+0x3d0] %asi | |
10362 | .word 0x9d920011 ! 108: WRPR_WSTATE_R wrpr %r8, %r17, %wstate | |
10363 | dvapa_4_78: | |
10364 | nop | |
10365 | ta T_CHANGE_HPRIV | |
10366 | mov 0x814, %r20 | |
10367 | mov 0x1a, %r19 | |
10368 | sllx %r20, 23, %r20 | |
10369 | or %r19, %r20, %r19 | |
10370 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
10371 | mov 0x38, %r18 | |
10372 | stxa %r31, [%r18]0x58 | |
10373 | ta T_CHANGE_NONHPRIV | |
10374 | .word 0xa1b48482 ! 109: FCMPLE32 fcmple32 %d18, %d2, %r16 | |
10375 | .word 0xe727c000 ! 110: STF_R st %f19, [%r0, %r31] | |
10376 | ibp_4_79: | |
10377 | nop | |
10378 | ta T_CHANGE_HPRIV | |
10379 | mov 8, %r18 | |
10380 | rd %asi, %r12 | |
10381 | wr %r0, 0x41, %asi | |
10382 | set sync_thr_counter4, %r23 | |
10383 | #ifndef SPC | |
10384 | ldxa [%g0]0x63, %r8 | |
10385 | and %r8, 0x38, %r8 ! Core ID | |
10386 | add %r8, %r23, %r23 | |
10387 | #else | |
10388 | mov 0, %r8 | |
10389 | #endif | |
10390 | mov 0x4, %r16 | |
10391 | ibp_startwait4_79: | |
10392 | cas [%r23],%g0,%r16 !lock | |
10393 | brz,a %r16, continue_ibp_4_79 | |
10394 | mov (~0x4&0xf), %r16 | |
10395 | ld [%r23], %r16 | |
10396 | ibp_wait4_79: | |
10397 | brnz %r16, ibp_wait4_79 | |
10398 | ld [%r23], %r16 | |
10399 | ba ibp_startwait4_79 | |
10400 | mov 0x4, %r16 | |
10401 | continue_ibp_4_79: | |
10402 | sllx %r16, %r8, %r16 !Mask for my core only | |
10403 | ldxa [0x58]%asi, %r17 !Running_status | |
10404 | wait_for_stat_4_79: | |
10405 | ldxa [0x50]%asi, %r13 !Running_rw | |
10406 | cmp %r13, %r17 | |
10407 | bne,a %xcc, wait_for_stat_4_79 | |
10408 | ldxa [0x58]%asi, %r17 !Running_status | |
10409 | stxa %r16, [0x68]%asi !Park (W1C) | |
10410 | ldxa [0x50]%asi, %r14 !Running_rw | |
10411 | wait_for_ibp_4_79: | |
10412 | ldxa [0x58]%asi, %r17 !Running_status | |
10413 | cmp %r14, %r17 | |
10414 | bne,a %xcc, wait_for_ibp_4_79 | |
10415 | ldxa [0x50]%asi, %r14 !Running_rw | |
10416 | ibp_doit4_79: | |
10417 | best_set_reg(0x00000040acda5535,%r19, %r20) | |
10418 | stxa %r20, [%r18]0x42 | |
10419 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10420 | st %g0, [%r23] !clear lock | |
10421 | wr %r0, %r12, %asi !restore %asi | |
10422 | ta T_CHANGE_NONHPRIV | |
10423 | .word 0xe697c02a ! 111: LDUHA_R lduha [%r31, %r10] 0x01, %r19 | |
10424 | splash_lsu_4_80: | |
10425 | nop | |
10426 | ta T_CHANGE_HPRIV | |
10427 | set 0x67ae7911, %r2 | |
10428 | mov 0x4, %r1 | |
10429 | sllx %r1, 32, %r1 | |
10430 | or %r1, %r2, %r2 | |
10431 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10432 | .word 0x3d400001 ! 112: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
10433 | jmptr_4_81: | |
10434 | nop | |
10435 | best_set_reg(0xe1200000, %r20, %r27) | |
10436 | .word 0xb7c6c000 ! 113: JMPL_R jmpl %r27 + %r0, %r27 | |
10437 | intveclr_4_82: | |
10438 | nop | |
10439 | ta T_CHANGE_HPRIV | |
10440 | setx 0x3d30bd0caf0a6c19, %r1, %r28 | |
10441 | stxa %r28, [%g0] 0x72 | |
10442 | ta T_CHANGE_NONHPRIV | |
10443 | .word 0x25400001 ! 114: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10444 | intveclr_4_83: | |
10445 | nop | |
10446 | ta T_CHANGE_HPRIV | |
10447 | setx 0x615c403dbf4ef8aa, %r1, %r28 | |
10448 | stxa %r28, [%g0] 0x72 | |
10449 | .word 0x25400001 ! 115: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10450 | .word 0xa1902009 ! 116: WRPR_GL_I wrpr %r0, 0x0009, %- | |
10451 | nop | |
10452 | ta T_CHANGE_HPRIV | |
10453 | mov 0x4+1, %r10 | |
10454 | set sync_thr_counter5, %r23 | |
10455 | #ifndef SPC | |
10456 | ldxa [%g0]0x63, %o1 | |
10457 | and %o1, 0x38, %o1 | |
10458 | add %o1, %r23, %r23 | |
10459 | sllx %o1, 5, %o3 !(CID*256) | |
10460 | #endif | |
10461 | cas [%r23],%g0,%r10 !lock | |
10462 | brnz %r10, cwq_4_84 | |
10463 | rd %asi, %r12 | |
10464 | wr %g0, 0x40, %asi | |
10465 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
10466 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
10467 | cmp %l1, 1 | |
10468 | bne cwq_4_84 | |
10469 | set CWQ_BASE, %l6 | |
10470 | #ifndef SPC | |
10471 | add %l6, %o3, %l6 | |
10472 | #endif | |
10473 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
10474 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word | |
10475 | sllx %l2, 32, %l2 | |
10476 | stx %l2, [%l6 + 0x0] | |
10477 | membar #Sync | |
10478 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
10479 | sub %l2, 0x40, %l2 | |
10480 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
10481 | wr %r12, %g0, %asi | |
10482 | st %g0, [%r23] | |
10483 | cwq_4_84: | |
10484 | ta T_CHANGE_NONHPRIV | |
10485 | .word 0x93414000 ! 117: RDPC rd %pc, %r9 | |
10486 | fpinit_4_85: | |
10487 | nop | |
10488 | setx fp_data_quads, %r19, %r20 | |
10489 | ldd [%r20], %f0 | |
10490 | ldd [%r20+8], %f4 | |
10491 | ld [%r20+16], %fsr | |
10492 | ld [%r20+24], %r19 | |
10493 | wr %r19, %g0, %gsr | |
10494 | .word 0x87a80a44 ! 118: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
10495 | ibp_4_86: | |
10496 | nop | |
10497 | ta T_CHANGE_HPRIV | |
10498 | mov 8, %r18 | |
10499 | rd %asi, %r12 | |
10500 | wr %r0, 0x41, %asi | |
10501 | set sync_thr_counter4, %r23 | |
10502 | #ifndef SPC | |
10503 | ldxa [%g0]0x63, %r8 | |
10504 | and %r8, 0x38, %r8 ! Core ID | |
10505 | add %r8, %r23, %r23 | |
10506 | #else | |
10507 | mov 0, %r8 | |
10508 | #endif | |
10509 | mov 0x4, %r16 | |
10510 | ibp_startwait4_86: | |
10511 | cas [%r23],%g0,%r16 !lock | |
10512 | brz,a %r16, continue_ibp_4_86 | |
10513 | mov (~0x4&0xf), %r16 | |
10514 | ld [%r23], %r16 | |
10515 | ibp_wait4_86: | |
10516 | brnz %r16, ibp_wait4_86 | |
10517 | ld [%r23], %r16 | |
10518 | ba ibp_startwait4_86 | |
10519 | mov 0x4, %r16 | |
10520 | continue_ibp_4_86: | |
10521 | sllx %r16, %r8, %r16 !Mask for my core only | |
10522 | ldxa [0x58]%asi, %r17 !Running_status | |
10523 | wait_for_stat_4_86: | |
10524 | ldxa [0x50]%asi, %r13 !Running_rw | |
10525 | cmp %r13, %r17 | |
10526 | bne,a %xcc, wait_for_stat_4_86 | |
10527 | ldxa [0x58]%asi, %r17 !Running_status | |
10528 | stxa %r16, [0x68]%asi !Park (W1C) | |
10529 | ldxa [0x50]%asi, %r14 !Running_rw | |
10530 | wait_for_ibp_4_86: | |
10531 | ldxa [0x58]%asi, %r17 !Running_status | |
10532 | cmp %r14, %r17 | |
10533 | bne,a %xcc, wait_for_ibp_4_86 | |
10534 | ldxa [0x50]%asi, %r14 !Running_rw | |
10535 | ibp_doit4_86: | |
10536 | best_set_reg(0x000000508ad53595,%r19, %r20) | |
10537 | stxa %r20, [%r18]0x42 | |
10538 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10539 | st %g0, [%r23] !clear lock | |
10540 | wr %r0, %r12, %asi !restore %asi | |
10541 | .word 0xd23fe150 ! 119: STD_I std %r9, [%r31 + 0x0150] | |
10542 | setx 0x58e1f8d560c7e679, %r1, %r28 | |
10543 | stxa %r28, [%g0] 0x73 | |
10544 | intvec_4_87: | |
10545 | .word 0x39400001 ! 120: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10546 | #if (defined SPC || defined CMP1) | |
10547 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_88) + 32, 16, 16)) -> intp(1,0,9) | |
10548 | #else | |
10549 | setx 0x54b6c1fb5aa12401, %r1, %r28 | |
10550 | stxa %r28, [%g0] 0x73 | |
10551 | #endif | |
10552 | intvec_4_88: | |
10553 | .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10554 | .word 0x89800011 ! 122: WRTICK_R wr %r0, %r17, %tick | |
10555 | bleu skip_4_90 | |
10556 | .word 0xc36b650a ! 1: PREFETCH_I prefetch [%r13 + 0x050a], #one_read | |
10557 | .align 512 | |
10558 | skip_4_90: | |
10559 | .word 0xa7a249d4 ! 123: FDIVd fdivd %f40, %f20, %f50 | |
10560 | mondo_4_91: | |
10561 | nop | |
10562 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
10563 | stxa %r5, [%r0+0x3c0] %asi | |
10564 | .word 0x9d934014 ! 124: WRPR_WSTATE_R wrpr %r13, %r20, %wstate | |
10565 | .word 0x8d802000 ! 125: WRFPRS_I wr %r0, 0x0000, %fprs | |
10566 | ibp_4_92: | |
10567 | nop | |
10568 | ta T_CHANGE_HPRIV | |
10569 | mov 8, %r18 | |
10570 | rd %asi, %r12 | |
10571 | wr %r0, 0x41, %asi | |
10572 | set sync_thr_counter4, %r23 | |
10573 | #ifndef SPC | |
10574 | ldxa [%g0]0x63, %r8 | |
10575 | and %r8, 0x38, %r8 ! Core ID | |
10576 | add %r8, %r23, %r23 | |
10577 | #else | |
10578 | mov 0, %r8 | |
10579 | #endif | |
10580 | mov 0x4, %r16 | |
10581 | ibp_startwait4_92: | |
10582 | cas [%r23],%g0,%r16 !lock | |
10583 | brz,a %r16, continue_ibp_4_92 | |
10584 | mov (~0x4&0xf), %r16 | |
10585 | ld [%r23], %r16 | |
10586 | ibp_wait4_92: | |
10587 | brnz %r16, ibp_wait4_92 | |
10588 | ld [%r23], %r16 | |
10589 | ba ibp_startwait4_92 | |
10590 | mov 0x4, %r16 | |
10591 | continue_ibp_4_92: | |
10592 | sllx %r16, %r8, %r16 !Mask for my core only | |
10593 | ldxa [0x58]%asi, %r17 !Running_status | |
10594 | wait_for_stat_4_92: | |
10595 | ldxa [0x50]%asi, %r13 !Running_rw | |
10596 | cmp %r13, %r17 | |
10597 | bne,a %xcc, wait_for_stat_4_92 | |
10598 | ldxa [0x58]%asi, %r17 !Running_status | |
10599 | stxa %r16, [0x68]%asi !Park (W1C) | |
10600 | ldxa [0x50]%asi, %r14 !Running_rw | |
10601 | wait_for_ibp_4_92: | |
10602 | ldxa [0x58]%asi, %r17 !Running_status | |
10603 | cmp %r14, %r17 | |
10604 | bne,a %xcc, wait_for_ibp_4_92 | |
10605 | ldxa [0x50]%asi, %r14 !Running_rw | |
10606 | ibp_doit4_92: | |
10607 | best_set_reg(0x00000050a0f59579,%r19, %r20) | |
10608 | stxa %r20, [%r18]0x42 | |
10609 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10610 | st %g0, [%r23] !clear lock | |
10611 | wr %r0, %r12, %asi !restore %asi | |
10612 | ta T_CHANGE_NONHPRIV | |
10613 | .word 0xa5a149a9 ! 126: FDIVs fdivs %f5, %f9, %f18 | |
10614 | .word 0x8d802000 ! 127: WRFPRS_I wr %r0, 0x0000, %fprs | |
10615 | .word 0x8d802000 ! 128: WRFPRS_I wr %r0, 0x0000, %fprs | |
10616 | unsupttte_4_93: | |
10617 | nop | |
10618 | ta T_CHANGE_HPRIV | |
10619 | mov 1, %r20 | |
10620 | sllx %r20, 63, %r20 | |
10621 | or %r20, 2,%r20 | |
10622 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
10623 | ta T_CHANGE_NONHPRIV | |
10624 | .word 0xc3ed002b ! 129: PREFETCHA_R prefetcha [%r20, %r11] 0x01, #one_read | |
10625 | invalw | |
10626 | mov 0xb4, %r30 | |
10627 | .word 0x93d0001e ! 130: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
10628 | fpinit_4_94: | |
10629 | nop | |
10630 | setx fp_data_quads, %r19, %r20 | |
10631 | ldd [%r20], %f0 | |
10632 | ldd [%r20+8], %f4 | |
10633 | ld [%r20+16], %fsr | |
10634 | ld [%r20+24], %r19 | |
10635 | wr %r19, %g0, %gsr | |
10636 | .word 0xc3e821f5 ! 131: PREFETCHA_I prefetcha [%r0, + 0x01f5] %asi, #one_read | |
10637 | intveclr_4_95: | |
10638 | nop | |
10639 | ta T_CHANGE_HPRIV | |
10640 | setx 0x3e3f87dd611b9cbf, %r1, %r28 | |
10641 | stxa %r28, [%g0] 0x72 | |
10642 | ta T_CHANGE_NONHPRIV | |
10643 | .word 0x25400001 ! 132: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10644 | intveclr_4_96: | |
10645 | nop | |
10646 | ta T_CHANGE_HPRIV | |
10647 | setx 0xac9d6f3bbcf64e94, %r1, %r28 | |
10648 | stxa %r28, [%g0] 0x72 | |
10649 | .word 0x25400001 ! 133: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10650 | setx 0xb7d1cecc9cb5b7e8, %r1, %r28 | |
10651 | stxa %r28, [%g0] 0x73 | |
10652 | intvec_4_97: | |
10653 | .word 0x39400001 ! 134: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10654 | .word 0x91910002 ! 135: WRPR_PIL_R wrpr %r4, %r2, %pil | |
10655 | .word 0xa3a00164 ! 136: FABSq dis not found | |
10656 | ||
10657 | mondo_4_100: | |
10658 | nop | |
10659 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
10660 | ta T_CHANGE_PRIV | |
10661 | stxa %r10, [%r0+0x3c8] %asi | |
10662 | .word 0x9d910010 ! 137: WRPR_WSTATE_R wrpr %r4, %r16, %wstate | |
10663 | splash_cmpr_4_101: | |
10664 | mov 0, %r18 | |
10665 | sllx %r18, 63, %r18 | |
10666 | rd %tick, %r17 | |
10667 | add %r17, 0x70, %r17 | |
10668 | or %r17, %r18, %r17 | |
10669 | ta T_CHANGE_PRIV | |
10670 | .word 0xaf800011 ! 138: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
10671 | brnz,a,pn %r16, skip_4_102 | |
10672 | fbue skip_4_102 | |
10673 | .align 1024 | |
10674 | skip_4_102: | |
10675 | .word 0xc36fe01e ! 139: PREFETCH_I prefetch [%r31 + 0x001e], #one_read | |
10676 | intveclr_4_103: | |
10677 | nop | |
10678 | ta T_CHANGE_HPRIV | |
10679 | setx 0x3240def71a5b1ecb, %r1, %r28 | |
10680 | stxa %r28, [%g0] 0x72 | |
10681 | .word 0x25400001 ! 140: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10682 | .word 0xa784f1d6 ! 141: WR_GRAPHICS_STATUS_REG_I wr %r19, 0x11d6, %- | |
10683 | .word 0x91d020b5 ! 142: Tcc_I ta icc_or_xcc, %r0 + 181 | |
10684 | .word 0xa9a0016a ! 143: FABSq dis not found | |
10685 | ||
10686 | splash_cmpr_4_105: | |
10687 | mov 0, %r18 | |
10688 | sllx %r18, 63, %r18 | |
10689 | rd %tick, %r17 | |
10690 | add %r17, 0x60, %r17 | |
10691 | or %r17, %r18, %r17 | |
10692 | .word 0xb3800011 ! 144: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
10693 | cwp_4_106: | |
10694 | set user_data_start, %o7 | |
10695 | .word 0x93902002 ! 145: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
10696 | mondo_4_107: | |
10697 | nop | |
10698 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
10699 | ta T_CHANGE_PRIV | |
10700 | stxa %r6, [%r0+0x3c0] %asi | |
10701 | .word 0x9d94800b ! 146: WRPR_WSTATE_R wrpr %r18, %r11, %wstate | |
10702 | brcommon3_4_108: | |
10703 | nop | |
10704 | setx common_target, %r12, %r27 | |
10705 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
10706 | ba,a .+12 | |
10707 | .word 0xe86fe150 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0150] | |
10708 | ba,a .+8 | |
10709 | jmpl %r27+0, %r27 | |
10710 | .word 0xe93fc011 ! 147: STDF_R std %f20, [%r17, %r31] | |
10711 | ibp_4_109: | |
10712 | nop | |
10713 | ta T_CHANGE_HPRIV | |
10714 | mov 8, %r18 | |
10715 | rd %asi, %r12 | |
10716 | wr %r0, 0x41, %asi | |
10717 | set sync_thr_counter4, %r23 | |
10718 | #ifndef SPC | |
10719 | ldxa [%g0]0x63, %r8 | |
10720 | and %r8, 0x38, %r8 ! Core ID | |
10721 | add %r8, %r23, %r23 | |
10722 | #else | |
10723 | mov 0, %r8 | |
10724 | #endif | |
10725 | mov 0x4, %r16 | |
10726 | ibp_startwait4_109: | |
10727 | cas [%r23],%g0,%r16 !lock | |
10728 | brz,a %r16, continue_ibp_4_109 | |
10729 | mov (~0x4&0xf), %r16 | |
10730 | ld [%r23], %r16 | |
10731 | ibp_wait4_109: | |
10732 | brnz %r16, ibp_wait4_109 | |
10733 | ld [%r23], %r16 | |
10734 | ba ibp_startwait4_109 | |
10735 | mov 0x4, %r16 | |
10736 | continue_ibp_4_109: | |
10737 | sllx %r16, %r8, %r16 !Mask for my core only | |
10738 | ldxa [0x58]%asi, %r17 !Running_status | |
10739 | wait_for_stat_4_109: | |
10740 | ldxa [0x50]%asi, %r13 !Running_rw | |
10741 | cmp %r13, %r17 | |
10742 | bne,a %xcc, wait_for_stat_4_109 | |
10743 | ldxa [0x58]%asi, %r17 !Running_status | |
10744 | stxa %r16, [0x68]%asi !Park (W1C) | |
10745 | ldxa [0x50]%asi, %r14 !Running_rw | |
10746 | wait_for_ibp_4_109: | |
10747 | ldxa [0x58]%asi, %r17 !Running_status | |
10748 | cmp %r14, %r17 | |
10749 | bne,a %xcc, wait_for_ibp_4_109 | |
10750 | ldxa [0x50]%asi, %r14 !Running_rw | |
10751 | ibp_doit4_109: | |
10752 | best_set_reg(0x000000401bd57909,%r19, %r20) | |
10753 | stxa %r20, [%r18]0x42 | |
10754 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10755 | st %g0, [%r23] !clear lock | |
10756 | wr %r0, %r12, %asi !restore %asi | |
10757 | .word 0x9bb4c494 ! 148: FCMPLE32 fcmple32 %d50, %d20, %r13 | |
10758 | trapasi_4_110: | |
10759 | nop | |
10760 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
10761 | .word 0xd4c84a00 ! 149: LDSBA_R ldsba [%r1, %r0] 0x50, %r10 | |
10762 | setx 0x5475388e794f4a54, %r1, %r28 | |
10763 | stxa %r28, [%g0] 0x73 | |
10764 | intvec_4_111: | |
10765 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10766 | splash_cmpr_4_112: | |
10767 | mov 0, %r18 | |
10768 | sllx %r18, 63, %r18 | |
10769 | rd %tick, %r17 | |
10770 | add %r17, 0x80, %r17 | |
10771 | or %r17, %r18, %r17 | |
10772 | ta T_CHANGE_PRIV | |
10773 | .word 0xb3800011 ! 151: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
10774 | splash_lsu_4_113: | |
10775 | nop | |
10776 | ta T_CHANGE_HPRIV | |
10777 | set 0x2d7418bd, %r2 | |
10778 | mov 0x4, %r1 | |
10779 | sllx %r1, 32, %r1 | |
10780 | or %r1, %r2, %r2 | |
10781 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10782 | .word 0x3d400001 ! 152: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
10783 | .word 0x81510000 ! 153: RDPR_TICK rdpr %tick, %r0 | |
10784 | splash_lsu_4_114: | |
10785 | nop | |
10786 | ta T_CHANGE_HPRIV | |
10787 | set 0xb5bcfb7f, %r2 | |
10788 | mov 0x1, %r1 | |
10789 | sllx %r1, 32, %r1 | |
10790 | or %r1, %r2, %r2 | |
10791 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10792 | .word 0x3d400001 ! 154: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
10793 | pmu_4_115: | |
10794 | nop | |
10795 | setx 0xfffffdeefffff326, %g1, %g7 | |
10796 | .word 0xa3800007 ! 155: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
10797 | #if (defined SPC || defined CMP1) | |
10798 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_116) + 40, 16, 16)) -> intp(2,0,11) | |
10799 | #else | |
10800 | setx 0x12246480f1967c19, %r1, %r28 | |
10801 | stxa %r28, [%g0] 0x73 | |
10802 | #endif | |
10803 | intvec_4_116: | |
10804 | .word 0x39400001 ! 156: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10805 | .word 0xa982c009 ! 157: WR_SET_SOFTINT_R wr %r11, %r9, %set_softint | |
10806 | .word 0x95a409d1 ! 158: FDIVd fdivd %f16, %f48, %f10 | |
10807 | .word 0xa5b4858c ! 159: FCMPGT32 fcmpgt32 %d18, %d12, %r18 | |
10808 | ta T_CHANGE_NONHPRIV | |
10809 | .word 0x8143e011 ! 160: MEMBAR membar #LoadLoad | #Lookaside | |
10810 | splash_hpstate_4_119: | |
10811 | ta T_CHANGE_NONHPRIV | |
10812 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
10813 | .word 0x81982d4b ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x0d4b, %hpstate | |
10814 | .word 0x8d902ecb ! 162: WRPR_PSTATE_I wrpr %r0, 0x0ecb, %pstate | |
10815 | otherw | |
10816 | mov 0xb0, %r30 | |
10817 | .word 0x91d0001e ! 163: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
10818 | .word 0xe19fdf20 ! 164: LDDFA_R ldda [%r31, %r0], %f16 | |
10819 | setx 0xbcbe96501fb2db24, %r1, %r28 | |
10820 | stxa %r28, [%g0] 0x73 | |
10821 | intvec_4_121: | |
10822 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10823 | ibp_4_122: | |
10824 | nop | |
10825 | ta T_CHANGE_HPRIV | |
10826 | mov 8, %r18 | |
10827 | rd %asi, %r12 | |
10828 | wr %r0, 0x41, %asi | |
10829 | set sync_thr_counter4, %r23 | |
10830 | #ifndef SPC | |
10831 | ldxa [%g0]0x63, %r8 | |
10832 | and %r8, 0x38, %r8 ! Core ID | |
10833 | add %r8, %r23, %r23 | |
10834 | #else | |
10835 | mov 0, %r8 | |
10836 | #endif | |
10837 | mov 0x4, %r16 | |
10838 | ibp_startwait4_122: | |
10839 | cas [%r23],%g0,%r16 !lock | |
10840 | brz,a %r16, continue_ibp_4_122 | |
10841 | mov (~0x4&0xf), %r16 | |
10842 | ld [%r23], %r16 | |
10843 | ibp_wait4_122: | |
10844 | brnz %r16, ibp_wait4_122 | |
10845 | ld [%r23], %r16 | |
10846 | ba ibp_startwait4_122 | |
10847 | mov 0x4, %r16 | |
10848 | continue_ibp_4_122: | |
10849 | sllx %r16, %r8, %r16 !Mask for my core only | |
10850 | ldxa [0x58]%asi, %r17 !Running_status | |
10851 | wait_for_stat_4_122: | |
10852 | ldxa [0x50]%asi, %r13 !Running_rw | |
10853 | cmp %r13, %r17 | |
10854 | bne,a %xcc, wait_for_stat_4_122 | |
10855 | ldxa [0x58]%asi, %r17 !Running_status | |
10856 | stxa %r16, [0x68]%asi !Park (W1C) | |
10857 | ldxa [0x50]%asi, %r14 !Running_rw | |
10858 | wait_for_ibp_4_122: | |
10859 | ldxa [0x58]%asi, %r17 !Running_status | |
10860 | cmp %r14, %r17 | |
10861 | bne,a %xcc, wait_for_ibp_4_122 | |
10862 | ldxa [0x50]%asi, %r14 !Running_rw | |
10863 | ibp_doit4_122: | |
10864 | best_set_reg(0x0000005004f9093a,%r19, %r20) | |
10865 | stxa %r20, [%r18]0x42 | |
10866 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10867 | st %g0, [%r23] !clear lock | |
10868 | wr %r0, %r12, %asi !restore %asi | |
10869 | .word 0xc1bfe1c0 ! 166: STDFA_I stda %f0, [0x01c0, %r31] | |
10870 | splash_lsu_4_123: | |
10871 | nop | |
10872 | ta T_CHANGE_HPRIV | |
10873 | set 0xe0ef2807, %r2 | |
10874 | mov 0x2, %r1 | |
10875 | sllx %r1, 32, %r1 | |
10876 | or %r1, %r2, %r2 | |
10877 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10878 | ta T_CHANGE_NONHPRIV | |
10879 | .word 0x3d400001 ! 167: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
10880 | nop | |
10881 | mov 0x80, %g3 | |
10882 | stxa %g3, [%g3] 0x5f | |
10883 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
10884 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
10885 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
10886 | .word 0xd05fc000 ! 168: LDX_R ldx [%r31 + %r0], %r8 | |
10887 | jmptr_4_124: | |
10888 | nop | |
10889 | best_set_reg(0xe1200000, %r20, %r27) | |
10890 | .word 0xb7c6c000 ! 169: JMPL_R jmpl %r27 + %r0, %r27 | |
10891 | nop | |
10892 | ta T_CHANGE_HPRIV ! macro | |
10893 | donret_4_125: | |
10894 | rd %pc, %r12 | |
10895 | add %r12, (donretarg_4_125-donret_4_125), %r12 | |
10896 | add %r12, 0x8, %r11 ! nonseq tnpc | |
10897 | wrpr %g0, 0x2, %tl | |
10898 | wrpr %g0, %r12, %tpc | |
10899 | wrpr %g0, %r11, %tnpc | |
10900 | set (0x00fd7900 | (20 << 24)), %r13 | |
10901 | and %r12, 0xfff, %r14 | |
10902 | sllx %r14, 30, %r14 | |
10903 | or %r13, %r14, %r20 | |
10904 | wrpr %r20, %g0, %tstate | |
10905 | wrhpr %g0, 0x1cbf, %htstate | |
10906 | ta T_CHANGE_NONHPRIV ! rand=1 (4) | |
10907 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
10908 | done | |
10909 | donretarg_4_125: | |
10910 | .word 0x2b400001 ! 170: FBPUG fbug,a,pn %fcc0, <label_0x1> | |
10911 | .word 0xe19fd960 ! 171: LDDFA_R ldda [%r31, %r0], %f16 | |
10912 | trapasi_4_127: | |
10913 | nop | |
10914 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
10915 | .word 0xd0c84e60 ! 172: LDSBA_R ldsba [%r1, %r0] 0x73, %r8 | |
10916 | .word 0x89800011 ! 173: WRTICK_R wr %r0, %r17, %tick | |
10917 | fpinit_4_129: | |
10918 | nop | |
10919 | setx fp_data_quads, %r19, %r20 | |
10920 | ldd [%r20], %f0 | |
10921 | ldd [%r20+8], %f4 | |
10922 | ld [%r20+16], %fsr | |
10923 | ld [%r20+24], %r19 | |
10924 | wr %r19, %g0, %gsr | |
10925 | .word 0x91a009a4 ! 174: FDIVs fdivs %f0, %f4, %f8 | |
10926 | .word 0x89800011 ! 175: WRTICK_R wr %r0, %r17, %tick | |
10927 | .word 0xd127e162 ! 176: STF_I st %f8, [0x0162, %r31] | |
10928 | .word 0x89800011 ! 177: WRTICK_R wr %r0, %r17, %tick | |
10929 | .word 0xd077e130 ! 178: STX_I stx %r8, [%r31 + 0x0130] | |
10930 | #if (defined SPC || defined CMP1) | |
10931 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_132) + 0, 16, 16)) -> intp(5,0,15) | |
10932 | #else | |
10933 | setx 0x363a4593a84fd42a, %r1, %r28 | |
10934 | stxa %r28, [%g0] 0x73 | |
10935 | #endif | |
10936 | intvec_4_132: | |
10937 | .word 0x39400001 ! 179: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10938 | .word 0x87802010 ! 180: WRASI_I wr %r0, 0x0010, %asi | |
10939 | setx 0x0f889128b8fba923, %r1, %r28 | |
10940 | stxa %r28, [%g0] 0x73 | |
10941 | intvec_4_133: | |
10942 | .word 0x39400001 ! 181: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10943 | .word 0xd037e167 ! 182: STH_I sth %r8, [%r31 + 0x0167] | |
10944 | .word 0xd11fc00d ! 183: LDDF_R ldd [%r31, %r13], %f8 | |
10945 | br_badelay2_4_135: | |
10946 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
10947 | allclean | |
10948 | .word 0xa5b14312 ! 184: ALIGNADDRESS alignaddr %r5, %r18, %r18 | |
10949 | splash_tba_4_136: | |
10950 | nop | |
10951 | ta T_CHANGE_PRIV | |
10952 | set 0x120000, %r12 | |
10953 | .word 0x8b90000c ! 185: WRPR_TBA_R wrpr %r0, %r12, %tba | |
10954 | trapasi_4_137: | |
10955 | nop | |
10956 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
10957 | .word 0xe2d04a00 ! 186: LDSHA_R ldsha [%r1, %r0] 0x50, %r17 | |
10958 | ceter_4_138: | |
10959 | nop | |
10960 | ta T_CHANGE_HPRIV | |
10961 | mov 7, %r17 | |
10962 | sllx %r17, 60, %r17 | |
10963 | mov 0x18, %r16 | |
10964 | stxa %r17, [%r16]0x4c | |
10965 | ta T_CHANGE_NONHPRIV | |
10966 | .word 0xa9410000 ! 187: RDTICK rd %tick, %r20 | |
10967 | intveclr_4_139: | |
10968 | nop | |
10969 | ta T_CHANGE_HPRIV | |
10970 | setx 0xfb1c179d3985217d, %r1, %r28 | |
10971 | stxa %r28, [%g0] 0x72 | |
10972 | .word 0x25400001 ! 188: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10973 | brcommon2_4_140: | |
10974 | nop | |
10975 | setx common_target, %r12, %r27 | |
10976 | ba,a .+12 | |
10977 | .word 0xc36fe080 ! 1: PREFETCH_I prefetch [%r31 + 0x0080], #one_read | |
10978 | ba,a .+8 | |
10979 | jmpl %r27+0, %r27 | |
10980 | .word 0xc19fde00 ! 189: LDDFA_R ldda [%r31, %r0], %f0 | |
10981 | trapasi_4_141: | |
10982 | nop | |
10983 | mov 0x28, %r1 ! (VA for ASI 0x5a) | |
10984 | .word 0xe6c84b40 ! 190: LDSBA_R ldsba [%r1, %r0] 0x5a, %r19 | |
10985 | ibp_4_142: | |
10986 | nop | |
10987 | ta T_CHANGE_HPRIV | |
10988 | mov 8, %r18 | |
10989 | rd %asi, %r12 | |
10990 | wr %r0, 0x41, %asi | |
10991 | set sync_thr_counter4, %r23 | |
10992 | #ifndef SPC | |
10993 | ldxa [%g0]0x63, %r8 | |
10994 | and %r8, 0x38, %r8 ! Core ID | |
10995 | add %r8, %r23, %r23 | |
10996 | #else | |
10997 | mov 0, %r8 | |
10998 | #endif | |
10999 | mov 0x4, %r16 | |
11000 | ibp_startwait4_142: | |
11001 | cas [%r23],%g0,%r16 !lock | |
11002 | brz,a %r16, continue_ibp_4_142 | |
11003 | mov (~0x4&0xf), %r16 | |
11004 | ld [%r23], %r16 | |
11005 | ibp_wait4_142: | |
11006 | brnz %r16, ibp_wait4_142 | |
11007 | ld [%r23], %r16 | |
11008 | ba ibp_startwait4_142 | |
11009 | mov 0x4, %r16 | |
11010 | continue_ibp_4_142: | |
11011 | sllx %r16, %r8, %r16 !Mask for my core only | |
11012 | ldxa [0x58]%asi, %r17 !Running_status | |
11013 | wait_for_stat_4_142: | |
11014 | ldxa [0x50]%asi, %r13 !Running_rw | |
11015 | cmp %r13, %r17 | |
11016 | bne,a %xcc, wait_for_stat_4_142 | |
11017 | ldxa [0x58]%asi, %r17 !Running_status | |
11018 | stxa %r16, [0x68]%asi !Park (W1C) | |
11019 | ldxa [0x50]%asi, %r14 !Running_rw | |
11020 | wait_for_ibp_4_142: | |
11021 | ldxa [0x58]%asi, %r17 !Running_status | |
11022 | cmp %r14, %r17 | |
11023 | bne,a %xcc, wait_for_ibp_4_142 | |
11024 | ldxa [0x50]%asi, %r14 !Running_rw | |
11025 | ibp_doit4_142: | |
11026 | best_set_reg(0x00000040f5c93ab9,%r19, %r20) | |
11027 | stxa %r20, [%r18]0x42 | |
11028 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
11029 | st %g0, [%r23] !clear lock | |
11030 | wr %r0, %r12, %asi !restore %asi | |
11031 | .word 0xa9b107c7 ! 191: PDIST pdistn %d4, %d38, %d20 | |
11032 | .word 0xd737e1b8 ! 192: STQF_I - %f11, [0x01b8, %r31] | |
11033 | splash_cmpr_4_143: | |
11034 | mov 0, %r18 | |
11035 | sllx %r18, 63, %r18 | |
11036 | rd %tick, %r17 | |
11037 | add %r17, 0x50, %r17 | |
11038 | or %r17, %r18, %r17 | |
11039 | ta T_CHANGE_HPRIV | |
11040 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
11041 | .word 0xb3800011 ! 193: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
11042 | tagged_4_144: | |
11043 | tsubcctv %r18, 0x19c8, %r9 | |
11044 | .word 0xd607e027 ! 194: LDUW_I lduw [%r31 + 0x0027], %r11 | |
11045 | .word 0xa4ac8003 ! 195: ANDNcc_R andncc %r18, %r3, %r18 | |
11046 | .word 0xd4bfc020 ! 196: STDA_R stda %r10, [%r31 + %r0] 0x01 | |
11047 | intveclr_4_145: | |
11048 | nop | |
11049 | ta T_CHANGE_HPRIV | |
11050 | setx 0xd8e5ed017dca51d7, %r1, %r28 | |
11051 | stxa %r28, [%g0] 0x72 | |
11052 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11053 | dvapa_4_146: | |
11054 | nop | |
11055 | ta T_CHANGE_HPRIV | |
11056 | mov 0x837, %r20 | |
11057 | mov 0xe, %r19 | |
11058 | sllx %r20, 23, %r20 | |
11059 | or %r19, %r20, %r19 | |
11060 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
11061 | mov 0x38, %r18 | |
11062 | stxa %r31, [%r18]0x58 | |
11063 | ta T_CHANGE_NONHPRIV | |
11064 | .word 0x9f803903 ! 198: SIR sir 0x1903 | |
11065 | ibp_4_147: | |
11066 | nop | |
11067 | ta T_CHANGE_HPRIV | |
11068 | mov 8, %r18 | |
11069 | rd %asi, %r12 | |
11070 | wr %r0, 0x41, %asi | |
11071 | set sync_thr_counter4, %r23 | |
11072 | #ifndef SPC | |
11073 | ldxa [%g0]0x63, %r8 | |
11074 | and %r8, 0x38, %r8 ! Core ID | |
11075 | add %r8, %r23, %r23 | |
11076 | #else | |
11077 | mov 0, %r8 | |
11078 | #endif | |
11079 | mov 0x4, %r16 | |
11080 | ibp_startwait4_147: | |
11081 | cas [%r23],%g0,%r16 !lock | |
11082 | brz,a %r16, continue_ibp_4_147 | |
11083 | mov (~0x4&0xf), %r16 | |
11084 | ld [%r23], %r16 | |
11085 | ibp_wait4_147: | |
11086 | brnz %r16, ibp_wait4_147 | |
11087 | ld [%r23], %r16 | |
11088 | ba ibp_startwait4_147 | |
11089 | mov 0x4, %r16 | |
11090 | continue_ibp_4_147: | |
11091 | sllx %r16, %r8, %r16 !Mask for my core only | |
11092 | ldxa [0x58]%asi, %r17 !Running_status | |
11093 | wait_for_stat_4_147: | |
11094 | ldxa [0x50]%asi, %r13 !Running_rw | |
11095 | cmp %r13, %r17 | |
11096 | bne,a %xcc, wait_for_stat_4_147 | |
11097 | ldxa [0x58]%asi, %r17 !Running_status | |
11098 | stxa %r16, [0x68]%asi !Park (W1C) | |
11099 | ldxa [0x50]%asi, %r14 !Running_rw | |
11100 | wait_for_ibp_4_147: | |
11101 | ldxa [0x58]%asi, %r17 !Running_status | |
11102 | cmp %r14, %r17 | |
11103 | bne,a %xcc, wait_for_ibp_4_147 | |
11104 | ldxa [0x50]%asi, %r14 !Running_rw | |
11105 | ibp_doit4_147: | |
11106 | best_set_reg(0x00000040a4fab9cf,%r19, %r20) | |
11107 | stxa %r20, [%r18]0x42 | |
11108 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
11109 | st %g0, [%r23] !clear lock | |
11110 | wr %r0, %r12, %asi !restore %asi | |
11111 | ta T_CHANGE_NONHPRIV | |
11112 | .word 0xc32fc013 ! 199: STXFSR_R st-sfr %f1, [%r19, %r31] | |
11113 | .word 0x89800011 ! 200: WRTICK_R wr %r0, %r17, %tick | |
11114 | jmptr_4_149: | |
11115 | nop | |
11116 | best_set_reg(0xe1200000, %r20, %r27) | |
11117 | .word 0xb7c6c000 ! 201: JMPL_R jmpl %r27 + %r0, %r27 | |
11118 | nop | |
11119 | nop | |
11120 | ta T_CHANGE_PRIV | |
11121 | wrpr %g0, %g0, %gl | |
11122 | nop | |
11123 | nop | |
11124 | setx join_lbl_0_0, %g1, %g2 | |
11125 | jmp %g2 | |
11126 | nop | |
11127 | fork_lbl_0_2: | |
11128 | ta T_CHANGE_NONHPRIV | |
11129 | splash_lsu_2_0: | |
11130 | nop | |
11131 | ta T_CHANGE_HPRIV | |
11132 | set 0x65c8cb24, %r2 | |
11133 | mov 0x5, %r1 | |
11134 | sllx %r1, 32, %r1 | |
11135 | or %r1, %r2, %r2 | |
11136 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11137 | ta T_CHANGE_NONHPRIV | |
11138 | ibp_2_1: | |
11139 | nop | |
11140 | ta T_CHANGE_NONHPRIV | |
11141 | .word 0xe1bfe0e0 ! 1: STDFA_I stda %f16, [0x00e0, %r31] | |
11142 | splash_lsu_2_2: | |
11143 | nop | |
11144 | ta T_CHANGE_HPRIV | |
11145 | set 0xdf91d7a4, %r2 | |
11146 | mov 0x4, %r1 | |
11147 | sllx %r1, 32, %r1 | |
11148 | or %r1, %r2, %r2 | |
11149 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11150 | ta T_CHANGE_NONHPRIV | |
11151 | .word 0x3d400001 ! 2: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11152 | splash_lsu_2_3: | |
11153 | nop | |
11154 | ta T_CHANGE_HPRIV | |
11155 | set 0x3ed4c6f5, %r2 | |
11156 | mov 0x7, %r1 | |
11157 | sllx %r1, 32, %r1 | |
11158 | or %r1, %r2, %r2 | |
11159 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11160 | .word 0x3d400001 ! 3: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11161 | .word 0xe277e168 ! 4: STX_I stx %r17, [%r31 + 0x0168] | |
11162 | .word 0x30780001 ! 5: BPA <illegal instruction> | |
11163 | .word 0x93d02034 ! 6: Tcc_I tne icc_or_xcc, %r0 + 52 | |
11164 | .word 0x89800011 ! 7: WRTICK_R wr %r0, %r17, %tick | |
11165 | splash_htba_2_5: | |
11166 | nop | |
11167 | ta T_CHANGE_HPRIV | |
11168 | setx 0x00000002002a0000, %r11, %r12 | |
11169 | .word 0x8b98000c ! 8: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
11170 | .word 0xe2800c80 ! 9: LDUWA_R lduwa [%r0, %r0] 0x64, %r17 | |
11171 | fbe skip_2_6 | |
11172 | .word 0xc36a3554 ! 1: PREFETCH_I prefetch [%r8 + 0xfffff554], #one_read | |
11173 | .align 512 | |
11174 | skip_2_6: | |
11175 | .word 0xc36fe09f ! 10: PREFETCH_I prefetch [%r31 + 0x009f], #one_read | |
11176 | splash_hpstate_2_7: | |
11177 | ta T_CHANGE_NONHPRIV | |
11178 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> | |
11179 | .word 0x81983c17 ! 11: WRHPR_HPSTATE_I wrhpr %r0, 0x1c17, %hpstate | |
11180 | unsupttte_2_8: | |
11181 | nop | |
11182 | ta T_CHANGE_HPRIV | |
11183 | mov 1, %r20 | |
11184 | sllx %r20, 63, %r20 | |
11185 | or %r20, 2,%r20 | |
11186 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
11187 | ta T_CHANGE_NONHPRIV | |
11188 | .word 0x87acca4d ! 12: FCMPd fcmpd %fcc<n>, %f50, %f44 | |
11189 | .word 0xd48008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
11190 | setx 0x61d59d1873d7d0b8, %r1, %r28 | |
11191 | stxa %r28, [%g0] 0x73 | |
11192 | intvec_2_9: | |
11193 | .word 0x39400001 ! 14: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11194 | trapasi_2_10: | |
11195 | nop | |
11196 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
11197 | .word 0xd4c84a00 ! 15: LDSBA_R ldsba [%r1, %r0] 0x50, %r10 | |
11198 | ibp_2_11: | |
11199 | nop | |
11200 | .word 0xa5b4c485 ! 16: FCMPLE32 fcmple32 %d50, %d36, %r18 | |
11201 | .word 0xe69fdd40 ! 17: LDDA_R ldda [%r31, %r0] 0xea, %r19 | |
11202 | brcommon3_2_12: | |
11203 | nop | |
11204 | setx common_target, %r12, %r27 | |
11205 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
11206 | ba,a .+12 | |
11207 | .word 0xe737e070 ! 1: STQF_I - %f19, [0x0070, %r31] | |
11208 | ba,a .+8 | |
11209 | jmpl %r27+0, %r27 | |
11210 | .word 0xc32fc012 ! 18: STXFSR_R st-sfr %f1, [%r18, %r31] | |
11211 | nop | |
11212 | mov 0x80, %g3 | |
11213 | stxa %g3, [%g3] 0x57 | |
11214 | .word 0xe65fc000 ! 19: LDX_R ldx [%r31 + %r0], %r19 | |
11215 | splash_hpstate_2_13: | |
11216 | .word 0x819837d7 ! 20: WRHPR_HPSTATE_I wrhpr %r0, 0x17d7, %hpstate | |
11217 | intveclr_2_14: | |
11218 | nop | |
11219 | ta T_CHANGE_HPRIV | |
11220 | setx 0x251890d689e677cd, %r1, %r28 | |
11221 | stxa %r28, [%g0] 0x72 | |
11222 | ta T_CHANGE_NONHPRIV | |
11223 | .word 0x25400001 ! 21: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11224 | nop | |
11225 | ta T_CHANGE_HPRIV | |
11226 | mov 0x2+1, %r10 | |
11227 | set sync_thr_counter5, %r23 | |
11228 | #ifndef SPC | |
11229 | ldxa [%g0]0x63, %o1 | |
11230 | and %o1, 0x38, %o1 | |
11231 | add %o1, %r23, %r23 | |
11232 | sllx %o1, 5, %o3 !(CID*256) | |
11233 | #endif | |
11234 | cas [%r23],%g0,%r10 !lock | |
11235 | brnz %r10, cwq_2_15 | |
11236 | rd %asi, %r12 | |
11237 | wr %g0, 0x40, %asi | |
11238 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11239 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11240 | cmp %l1, 1 | |
11241 | bne cwq_2_15 | |
11242 | set CWQ_BASE, %l6 | |
11243 | #ifndef SPC | |
11244 | add %l6, %o3, %l6 | |
11245 | #endif | |
11246 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11247 | best_set_reg(0x20610020, %l1, %l2) !# Control Word | |
11248 | sllx %l2, 32, %l2 | |
11249 | stx %l2, [%l6 + 0x0] | |
11250 | membar #Sync | |
11251 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11252 | sub %l2, 0x40, %l2 | |
11253 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11254 | wr %r12, %g0, %asi | |
11255 | st %g0, [%r23] | |
11256 | cwq_2_15: | |
11257 | ta T_CHANGE_NONHPRIV | |
11258 | .word 0x99414000 ! 22: RDPC rd %pc, %r12 | |
11259 | .word 0xd8d7e0d0 ! 23: LDSHA_I ldsha [%r31, + 0x00d0] %asi, %r12 | |
11260 | .word 0xc19fc2c0 ! 24: LDDFA_R ldda [%r31, %r0], %f0 | |
11261 | #if (defined SPC || defined CMP1) | |
11262 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_16) + 40, 16, 16)) -> intp(7,0,3) | |
11263 | #else | |
11264 | setx 0x3f274d394039f261, %r1, %r28 | |
11265 | stxa %r28, [%g0] 0x73 | |
11266 | #endif | |
11267 | intvec_2_16: | |
11268 | .word 0x39400001 ! 25: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11269 | splash_tba_2_17: | |
11270 | nop | |
11271 | ta T_CHANGE_PRIV | |
11272 | setx 0x00000004003a0000, %r11, %r12 | |
11273 | .word 0x8b90000c ! 26: WRPR_TBA_R wrpr %r0, %r12, %tba | |
11274 | nop | |
11275 | mov 0x80, %g3 | |
11276 | stxa %g3, [%g3] 0x5f | |
11277 | .word 0xd85fc000 ! 27: LDX_R ldx [%r31 + %r0], %r12 | |
11278 | .word 0xb184c014 ! 28: WR_STICK_REG_R wr %r19, %r20, %- | |
11279 | .word 0xd877e08a ! 29: STX_I stx %r12, [%r31 + 0x008a] | |
11280 | tagged_2_18: | |
11281 | tsubcctv %r8, 0x14a2, %r12 | |
11282 | .word 0xd807e186 ! 30: LDUW_I lduw [%r31 + 0x0186], %r12 | |
11283 | .word 0x89800011 ! 31: WRTICK_R wr %r0, %r17, %tick | |
11284 | trapasi_2_20: | |
11285 | nop | |
11286 | mov 0x20, %r1 ! (VA for ASI 0x5b) | |
11287 | .word 0xd8904b60 ! 32: LDUHA_R lduha [%r1, %r0] 0x5b, %r12 | |
11288 | fpinit_2_21: | |
11289 | nop | |
11290 | setx fp_data_quads, %r19, %r20 | |
11291 | ldd [%r20], %f0 | |
11292 | ldd [%r20+8], %f4 | |
11293 | ld [%r20+16], %fsr | |
11294 | ld [%r20+24], %r19 | |
11295 | wr %r19, %g0, %gsr | |
11296 | .word 0x8db00484 ! 33: FCMPLE32 fcmple32 %d0, %d4, %r6 | |
11297 | nop | |
11298 | ta T_CHANGE_HPRIV | |
11299 | mov 0x2+1, %r10 | |
11300 | set sync_thr_counter5, %r23 | |
11301 | #ifndef SPC | |
11302 | ldxa [%g0]0x63, %o1 | |
11303 | and %o1, 0x38, %o1 | |
11304 | add %o1, %r23, %r23 | |
11305 | sllx %o1, 5, %o3 !(CID*256) | |
11306 | #endif | |
11307 | cas [%r23],%g0,%r10 !lock | |
11308 | brnz %r10, cwq_2_22 | |
11309 | rd %asi, %r12 | |
11310 | wr %g0, 0x40, %asi | |
11311 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11312 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11313 | cmp %l1, 1 | |
11314 | bne cwq_2_22 | |
11315 | set CWQ_BASE, %l6 | |
11316 | #ifndef SPC | |
11317 | add %l6, %o3, %l6 | |
11318 | #endif | |
11319 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11320 | best_set_reg(0x20610060, %l1, %l2) !# Control Word | |
11321 | sllx %l2, 32, %l2 | |
11322 | stx %l2, [%l6 + 0x0] | |
11323 | membar #Sync | |
11324 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11325 | sub %l2, 0x40, %l2 | |
11326 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11327 | wr %r12, %g0, %asi | |
11328 | st %g0, [%r23] | |
11329 | cwq_2_22: | |
11330 | ta T_CHANGE_NONHPRIV | |
11331 | .word 0x91414000 ! 34: RDPC rd %pc, %r8 | |
11332 | jmptr_2_23: | |
11333 | nop | |
11334 | best_set_reg(0xe1a00000, %r20, %r27) | |
11335 | .word 0xb7c6c000 ! 35: JMPL_R jmpl %r27 + %r0, %r27 | |
11336 | nop | |
11337 | ta T_CHANGE_HPRIV ! macro | |
11338 | donret_2_24: | |
11339 | rd %pc, %r12 | |
11340 | add %r12, (donretarg_2_24-donret_2_24+4), %r12 | |
11341 | add %r12, 0x4, %r11 ! seq tnpc | |
11342 | wrpr %g0, 0x2, %tl | |
11343 | wrpr %g0, %r12, %tpc | |
11344 | wrpr %g0, %r11, %tnpc | |
11345 | set (0x008f7400 | (32 << 24)), %r13 | |
11346 | and %r12, 0xfff, %r14 | |
11347 | sllx %r14, 30, %r14 | |
11348 | or %r13, %r14, %r20 | |
11349 | wrpr %r20, %g0, %tstate | |
11350 | wrhpr %g0, 0x1f8f, %htstate | |
11351 | ta T_CHANGE_NONHPRIV ! rand=1 (2) | |
11352 | retry | |
11353 | donretarg_2_24: | |
11354 | .word 0xd66fe03a ! 36: LDSTUB_I ldstub %r11, [%r31 + 0x003a] | |
11355 | nop | |
11356 | ta T_CHANGE_HPRIV ! macro | |
11357 | donret_2_25: | |
11358 | rd %pc, %r12 | |
11359 | add %r12, (donretarg_2_25-donret_2_25+4), %r12 | |
11360 | add %r12, 0x4, %r11 ! seq tnpc | |
11361 | wrpr %g0, 0x1, %tl | |
11362 | wrpr %g0, %r12, %tpc | |
11363 | wrpr %g0, %r11, %tnpc | |
11364 | set (0x005d9d00 | (0x55 << 24)), %r13 | |
11365 | and %r12, 0xfff, %r14 | |
11366 | sllx %r14, 30, %r14 | |
11367 | or %r13, %r14, %r20 | |
11368 | wrpr %r20, %g0, %tstate | |
11369 | wrhpr %g0, 0x1705, %htstate | |
11370 | ta T_CHANGE_NONHPRIV ! rand=1 (2) | |
11371 | done | |
11372 | donretarg_2_25: | |
11373 | .word 0x21400001 ! 37: FBPN fbn,a,pn %fcc0, <label_0x1> | |
11374 | fpinit_2_26: | |
11375 | nop | |
11376 | setx fp_data_quads, %r19, %r20 | |
11377 | ldd [%r20], %f0 | |
11378 | ldd [%r20+8], %f4 | |
11379 | ld [%r20+16], %fsr | |
11380 | ld [%r20+24], %r19 | |
11381 | wr %r19, %g0, %gsr | |
11382 | .word 0xc3e83df7 ! 38: PREFETCHA_I prefetcha [%r0, + 0xfffffdf7] %asi, #one_read | |
11383 | nop | |
11384 | mov 0x80, %g3 | |
11385 | stxa %g3, [%g3] 0x5f | |
11386 | .word 0xd65fc000 ! 39: LDX_R ldx [%r31 + %r0], %r11 | |
11387 | nop | |
11388 | mov 0x80, %g3 | |
11389 | stxa %g3, [%g3] 0x57 | |
11390 | .word 0xd65fc000 ! 40: LDX_R ldx [%r31 + %r0], %r11 | |
11391 | mondo_2_27: | |
11392 | nop | |
11393 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11394 | ta T_CHANGE_PRIV | |
11395 | stxa %r12, [%r0+0x3e0] %asi | |
11396 | .word 0x9d94800c ! 41: WRPR_WSTATE_R wrpr %r18, %r12, %wstate | |
11397 | ibp_2_28: | |
11398 | nop | |
11399 | ta T_CHANGE_NONHPRIV | |
11400 | .word 0xd63fe0d0 ! 42: STD_I std %r11, [%r31 + 0x00d0] | |
11401 | fpinit_2_29: | |
11402 | nop | |
11403 | setx fp_data_quads, %r19, %r20 | |
11404 | ldd [%r20], %f0 | |
11405 | ldd [%r20+8], %f4 | |
11406 | ld [%r20+16], %fsr | |
11407 | ld [%r20+24], %r19 | |
11408 | wr %r19, %g0, %gsr | |
11409 | .word 0x89a009a4 ! 43: FDIVs fdivs %f0, %f4, %f4 | |
11410 | nop | |
11411 | ta T_CHANGE_HPRIV | |
11412 | mov 0x2+1, %r10 | |
11413 | set sync_thr_counter5, %r23 | |
11414 | #ifndef SPC | |
11415 | ldxa [%g0]0x63, %o1 | |
11416 | and %o1, 0x38, %o1 | |
11417 | add %o1, %r23, %r23 | |
11418 | sllx %o1, 5, %o3 !(CID*256) | |
11419 | #endif | |
11420 | cas [%r23],%g0,%r10 !lock | |
11421 | brnz %r10, cwq_2_30 | |
11422 | rd %asi, %r12 | |
11423 | wr %g0, 0x40, %asi | |
11424 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11425 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11426 | cmp %l1, 1 | |
11427 | bne cwq_2_30 | |
11428 | set CWQ_BASE, %l6 | |
11429 | #ifndef SPC | |
11430 | add %l6, %o3, %l6 | |
11431 | #endif | |
11432 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11433 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
11434 | sllx %l2, 32, %l2 | |
11435 | stx %l2, [%l6 + 0x0] | |
11436 | membar #Sync | |
11437 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11438 | sub %l2, 0x40, %l2 | |
11439 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11440 | wr %r12, %g0, %asi | |
11441 | st %g0, [%r23] | |
11442 | cwq_2_30: | |
11443 | ta T_CHANGE_NONHPRIV | |
11444 | .word 0x9b414000 ! 44: RDPC rd %pc, %r13 | |
11445 | .word 0xe4dfe038 ! 45: LDXA_I ldxa [%r31, + 0x0038] %asi, %r18 | |
11446 | .word 0xa5a349a4 ! 46: FDIVs fdivs %f13, %f4, %f18 | |
11447 | ibp_2_32: | |
11448 | nop | |
11449 | .word 0xc3ec402b ! 47: PREFETCHA_R prefetcha [%r17, %r11] 0x01, #one_read | |
11450 | nop | |
11451 | ta T_CHANGE_HPRIV | |
11452 | mov 0x2, %r10 | |
11453 | set sync_thr_counter6, %r23 | |
11454 | #ifndef SPC | |
11455 | ldxa [%g0]0x63, %o1 | |
11456 | and %o1, 0x38, %o1 | |
11457 | add %o1, %r23, %r23 | |
11458 | #endif | |
11459 | cas [%r23],%g0,%r10 !lock | |
11460 | brnz %r10, sma_2_33 | |
11461 | rd %asi, %r12 | |
11462 | wr %g0, 0x40, %asi | |
11463 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
11464 | set 0x00161fff, %g1 | |
11465 | stxa %g1, [%g0 + 0x80] %asi | |
11466 | wr %r12, %g0, %asi | |
11467 | st %g0, [%r23] | |
11468 | sma_2_33: | |
11469 | ta T_CHANGE_NONHPRIV | |
11470 | .word 0xe5e7e010 ! 48: CASA_R casa [%r31] %asi, %r16, %r18 | |
11471 | change_to_randtl_2_34: | |
11472 | ta T_CHANGE_PRIV ! macro | |
11473 | done_change_to_randtl_2_34: | |
11474 | .word 0x8f902000 ! 49: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
11475 | .word 0xc1bfc2c0 ! 50: STDFA_R stda %f0, [%r0, %r31] | |
11476 | pmu_2_35: | |
11477 | nop | |
11478 | setx 0xfffffc81ffffffae, %g1, %g7 | |
11479 | .word 0xa3800007 ! 51: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
11480 | splash_cmpr_2_36: | |
11481 | mov 0, %r18 | |
11482 | sllx %r18, 63, %r18 | |
11483 | rd %tick, %r17 | |
11484 | add %r17, 0x70, %r17 | |
11485 | or %r17, %r18, %r17 | |
11486 | ta T_CHANGE_HPRIV | |
11487 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
11488 | ta T_CHANGE_PRIV | |
11489 | .word 0xb3800011 ! 52: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
11490 | nop | |
11491 | ta T_CHANGE_HPRIV ! macro | |
11492 | donret_2_37: | |
11493 | rd %pc, %r12 | |
11494 | add %r12, (donretarg_2_37-donret_2_37), %r12 | |
11495 | add %r12, 0x4, %r11 ! seq tnpc | |
11496 | wrpr %g0, 0x2, %tl | |
11497 | wrpr %g0, %r12, %tpc | |
11498 | wrpr %g0, %r11, %tnpc | |
11499 | set (0x00143500 | (4 << 24)), %r13 | |
11500 | and %r12, 0xfff, %r14 | |
11501 | sllx %r14, 30, %r14 | |
11502 | or %r13, %r14, %r20 | |
11503 | wrpr %r20, %g0, %tstate | |
11504 | wrhpr %g0, 0x48d, %htstate | |
11505 | ta T_CHANGE_NONPRIV ! rand=0 (2) | |
11506 | done | |
11507 | donretarg_2_37: | |
11508 | .word 0xe4ffe034 ! 53: SWAPA_I swapa %r18, [%r31 + 0x0034] %asi | |
11509 | .word 0x91508000 ! 54: RDPR_TSTATE <illegal instruction> | |
11510 | brcommon1_2_38: | |
11511 | nop | |
11512 | setx common_target, %r12, %r27 | |
11513 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
11514 | ba,a .+12 | |
11515 | .word 0xc32fe1c0 ! 1: STXFSR_I st-sfr %f1, [0x01c0, %r31] | |
11516 | ba,a .+8 | |
11517 | jmpl %r27+0, %r27 | |
11518 | .word 0x99b187c7 ! 55: PDIST pdistn %d6, %d38, %d12 | |
11519 | trapasi_2_39: | |
11520 | nop | |
11521 | mov 0x8, %r1 ! (VA for ASI 0x4c) | |
11522 | .word 0xd8904980 ! 56: LDUHA_R lduha [%r1, %r0] 0x4c, %r12 | |
11523 | nop | |
11524 | ta T_CHANGE_HPRIV | |
11525 | mov 0x2, %r10 | |
11526 | set sync_thr_counter6, %r23 | |
11527 | #ifndef SPC | |
11528 | ldxa [%g0]0x63, %o1 | |
11529 | and %o1, 0x38, %o1 | |
11530 | add %o1, %r23, %r23 | |
11531 | #endif | |
11532 | cas [%r23],%g0,%r10 !lock | |
11533 | brnz %r10, sma_2_40 | |
11534 | rd %asi, %r12 | |
11535 | wr %g0, 0x40, %asi | |
11536 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
11537 | set 0x00061fff, %g1 | |
11538 | stxa %g1, [%g0 + 0x80] %asi | |
11539 | wr %r12, %g0, %asi | |
11540 | st %g0, [%r23] | |
11541 | sma_2_40: | |
11542 | ta T_CHANGE_NONHPRIV | |
11543 | .word 0xd9e7e011 ! 57: CASA_R casa [%r31] %asi, %r17, %r12 | |
11544 | fbu,a,pn %fcc0, skip_2_41 | |
11545 | fbuge,a,pn %fcc0, skip_2_41 | |
11546 | .align 128 | |
11547 | skip_2_41: | |
11548 | .word 0xd83fc000 ! 58: STD_R std %r12, [%r31 + %r0] | |
11549 | nop | |
11550 | ta T_CHANGE_HPRIV ! macro | |
11551 | donret_2_42: | |
11552 | rd %pc, %r12 | |
11553 | add %r12, (donretarg_2_42-donret_2_42+4), %r12 | |
11554 | add %r12, 0x4, %r11 ! seq tnpc | |
11555 | wrpr %g0, 0x1, %tl | |
11556 | wrpr %g0, %r12, %tpc | |
11557 | wrpr %g0, %r11, %tnpc | |
11558 | set (0x00f7ec00 | (32 << 24)), %r13 | |
11559 | and %r12, 0xfff, %r14 | |
11560 | sllx %r14, 30, %r14 | |
11561 | or %r13, %r14, %r20 | |
11562 | wrpr %r20, %g0, %tstate | |
11563 | wrhpr %g0, 0x67d, %htstate | |
11564 | ta T_CHANGE_NONHPRIV ! rand=1 (2) | |
11565 | .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1> | |
11566 | retry | |
11567 | donretarg_2_42: | |
11568 | .word 0xd86fe1e5 ! 59: LDSTUB_I ldstub %r12, [%r31 + 0x01e5] | |
11569 | unsupttte_2_43: | |
11570 | nop | |
11571 | ta T_CHANGE_HPRIV | |
11572 | mov 1, %r20 | |
11573 | sllx %r20, 63, %r20 | |
11574 | or %r20, 2,%r20 | |
11575 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
11576 | ta T_CHANGE_NONHPRIV | |
11577 | .word 0x87aa4a45 ! 60: FCMPd fcmpd %fcc<n>, %f40, %f36 | |
11578 | splash_hpstate_2_44: | |
11579 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> | |
11580 | .word 0x81982c1b ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x0c1b, %hpstate | |
11581 | nop | |
11582 | ta T_CHANGE_HPRIV ! macro | |
11583 | donret_2_45: | |
11584 | rd %pc, %r12 | |
11585 | add %r12, (donretarg_2_45-donret_2_45), %r12 | |
11586 | add %r12, 0x4, %r11 ! seq tnpc | |
11587 | wrpr %g0, 0x2, %tl | |
11588 | wrpr %g0, %r12, %tpc | |
11589 | wrpr %g0, %r11, %tnpc | |
11590 | set (0x0016a300 | (20 << 24)), %r13 | |
11591 | and %r12, 0xfff, %r14 | |
11592 | sllx %r14, 30, %r14 | |
11593 | or %r13, %r14, %r20 | |
11594 | wrpr %r20, %g0, %tstate | |
11595 | wrhpr %g0, 0x15d5, %htstate | |
11596 | ta T_CHANGE_NONHPRIV ! rand=1 (2) | |
11597 | .word 0x22cc4001 ! 1: BRZ brz,a,pt %r17,<label_0xc4001> | |
11598 | done | |
11599 | donretarg_2_45: | |
11600 | .word 0x28800001 ! 62: BLEU bleu,a <label_0x1> | |
11601 | .word 0xe0c7e0c0 ! 63: LDSWA_I ldswa [%r31, + 0x00c0] %asi, %r16 | |
11602 | trapasi_2_46: | |
11603 | nop | |
11604 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
11605 | .word 0xe0d04e60 ! 64: LDSHA_R ldsha [%r1, %r0] 0x73, %r16 | |
11606 | jmptr_2_47: | |
11607 | nop | |
11608 | best_set_reg(0xe1a00000, %r20, %r27) | |
11609 | .word 0xb7c6c000 ! 65: JMPL_R jmpl %r27 + %r0, %r27 | |
11610 | pmu_2_48: | |
11611 | nop | |
11612 | setx 0xfffff078fffff8e8, %g1, %g7 | |
11613 | .word 0xa3800007 ! 66: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
11614 | ibp_2_49: | |
11615 | nop | |
11616 | .word 0xe13fc00d ! 67: STDF_R std %f16, [%r13, %r31] | |
11617 | fpinit_2_50: | |
11618 | nop | |
11619 | setx fp_data_quads, %r19, %r20 | |
11620 | ldd [%r20], %f0 | |
11621 | ldd [%r20+8], %f4 | |
11622 | ld [%r20+16], %fsr | |
11623 | ld [%r20+24], %r19 | |
11624 | wr %r19, %g0, %gsr | |
11625 | .word 0x8da009a4 ! 68: FDIVs fdivs %f0, %f4, %f6 | |
11626 | splash_tba_2_51: | |
11627 | nop | |
11628 | ta T_CHANGE_PRIV | |
11629 | setx 0x00000004003a0000, %r11, %r12 | |
11630 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
11631 | nop | |
11632 | mov 0x80, %g3 | |
11633 | stxa %g3, [%g3] 0x5f | |
11634 | .word 0xe05fc000 ! 70: LDX_R ldx [%r31 + %r0], %r16 | |
11635 | .word 0xe0800aa0 ! 71: LDUWA_R lduwa [%r0, %r0] 0x55, %r16 | |
11636 | .word 0x957038fc ! 72: POPC_I popc 0x18fc, %r10 | |
11637 | .word 0xd48008a0 ! 73: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
11638 | fpinit_2_53: | |
11639 | nop | |
11640 | setx fp_data_quads, %r19, %r20 | |
11641 | ldd [%r20], %f0 | |
11642 | ldd [%r20+8], %f4 | |
11643 | ld [%r20+16], %fsr | |
11644 | ld [%r20+24], %r19 | |
11645 | wr %r19, %g0, %gsr | |
11646 | .word 0x89b00484 ! 74: FCMPLE32 fcmple32 %d0, %d4, %r4 | |
11647 | nop | |
11648 | ta T_CHANGE_HPRIV | |
11649 | mov 0x2+1, %r10 | |
11650 | set sync_thr_counter5, %r23 | |
11651 | #ifndef SPC | |
11652 | ldxa [%g0]0x63, %o1 | |
11653 | and %o1, 0x38, %o1 | |
11654 | add %o1, %r23, %r23 | |
11655 | sllx %o1, 5, %o3 !(CID*256) | |
11656 | #endif | |
11657 | cas [%r23],%g0,%r10 !lock | |
11658 | brnz %r10, cwq_2_54 | |
11659 | rd %asi, %r12 | |
11660 | wr %g0, 0x40, %asi | |
11661 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11662 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11663 | cmp %l1, 1 | |
11664 | bne cwq_2_54 | |
11665 | set CWQ_BASE, %l6 | |
11666 | #ifndef SPC | |
11667 | add %l6, %o3, %l6 | |
11668 | #endif | |
11669 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11670 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word | |
11671 | sllx %l2, 32, %l2 | |
11672 | stx %l2, [%l6 + 0x0] | |
11673 | membar #Sync | |
11674 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11675 | sub %l2, 0x40, %l2 | |
11676 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11677 | wr %r12, %g0, %asi | |
11678 | st %g0, [%r23] | |
11679 | cwq_2_54: | |
11680 | ta T_CHANGE_NONHPRIV | |
11681 | .word 0xa5414000 ! 75: RDPC rd %pc, %r18 | |
11682 | .word 0x91944014 ! 76: WRPR_PIL_R wrpr %r17, %r20, %pil | |
11683 | #if (defined SPC || defined CMP1) | |
11684 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_56) + 56, 16, 16)) -> intp(3,0,25) | |
11685 | #else | |
11686 | setx 0xa5aaa5d43a45e7d5, %r1, %r28 | |
11687 | stxa %r28, [%g0] 0x73 | |
11688 | #endif | |
11689 | intvec_2_56: | |
11690 | .word 0x39400001 ! 77: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11691 | intveclr_2_57: | |
11692 | nop | |
11693 | ta T_CHANGE_HPRIV | |
11694 | setx 0x1e64516ffe5d485c, %r1, %r28 | |
11695 | stxa %r28, [%g0] 0x72 | |
11696 | ta T_CHANGE_NONHPRIV | |
11697 | .word 0x25400001 ! 78: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11698 | .word 0xd6bfe0d9 ! 79: STDA_I stda %r11, [%r31 + 0x00d9] %asi | |
11699 | .word 0xd737c000 ! 80: STQF_R - %f11, [%r0, %r31] | |
11700 | ceter_2_58: | |
11701 | nop | |
11702 | ta T_CHANGE_HPRIV | |
11703 | mov 6, %r17 | |
11704 | sllx %r17, 60, %r17 | |
11705 | mov 0x18, %r16 | |
11706 | stxa %r17, [%r16]0x4c | |
11707 | ta T_CHANGE_NONHPRIV | |
11708 | .word 0x95410000 ! 81: RDTICK rd %tick, %r10 | |
11709 | brcommon3_2_59: | |
11710 | nop | |
11711 | setx common_target, %r12, %r27 | |
11712 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
11713 | ba,a .+12 | |
11714 | .word 0xd66fe060 ! 1: LDSTUB_I ldstub %r11, [%r31 + 0x0060] | |
11715 | ba,a .+8 | |
11716 | jmpl %r27+0, %r27 | |
11717 | .word 0xc32fc009 ! 82: STXFSR_R st-sfr %f1, [%r9, %r31] | |
11718 | .word 0xd68008a0 ! 83: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
11719 | jmptr_2_60: | |
11720 | nop | |
11721 | best_set_reg(0xe1a00000, %r20, %r27) | |
11722 | .word 0xb7c6c000 ! 84: JMPL_R jmpl %r27 + %r0, %r27 | |
11723 | setx 0x9334c7222a8a4a4a, %r1, %r28 | |
11724 | stxa %r28, [%g0] 0x73 | |
11725 | intvec_2_61: | |
11726 | .word 0x39400001 ! 85: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11727 | nop | |
11728 | ta T_CHANGE_HPRIV | |
11729 | mov 0x2+1, %r10 | |
11730 | set sync_thr_counter5, %r23 | |
11731 | #ifndef SPC | |
11732 | ldxa [%g0]0x63, %o1 | |
11733 | and %o1, 0x38, %o1 | |
11734 | add %o1, %r23, %r23 | |
11735 | sllx %o1, 5, %o3 !(CID*256) | |
11736 | #endif | |
11737 | cas [%r23],%g0,%r10 !lock | |
11738 | brnz %r10, cwq_2_62 | |
11739 | rd %asi, %r12 | |
11740 | wr %g0, 0x40, %asi | |
11741 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11742 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11743 | cmp %l1, 1 | |
11744 | bne cwq_2_62 | |
11745 | set CWQ_BASE, %l6 | |
11746 | #ifndef SPC | |
11747 | add %l6, %o3, %l6 | |
11748 | #endif | |
11749 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11750 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word | |
11751 | sllx %l2, 32, %l2 | |
11752 | stx %l2, [%l6 + 0x0] | |
11753 | membar #Sync | |
11754 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11755 | sub %l2, 0x40, %l2 | |
11756 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11757 | wr %r12, %g0, %asi | |
11758 | st %g0, [%r23] | |
11759 | cwq_2_62: | |
11760 | ta T_CHANGE_NONHPRIV | |
11761 | .word 0x99414000 ! 86: RDPC rd %pc, %r12 | |
11762 | .word 0xe2800a80 ! 87: LDUWA_R lduwa [%r0, %r0] 0x54, %r17 | |
11763 | ibp_2_63: | |
11764 | nop | |
11765 | .word 0xc19fe120 ! 88: LDDFA_I ldda [%r31, 0x0120], %f0 | |
11766 | ibp_2_64: | |
11767 | nop | |
11768 | ta T_CHANGE_NONHPRIV | |
11769 | .word 0x9f802050 ! 89: SIR sir 0x0050 | |
11770 | jmptr_2_65: | |
11771 | nop | |
11772 | best_set_reg(0xe1a00000, %r20, %r27) | |
11773 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
11774 | .word 0xe22fe094 ! 91: STB_I stb %r17, [%r31 + 0x0094] | |
11775 | .word 0xe19fdf20 ! 92: LDDFA_R ldda [%r31, %r0], %f16 | |
11776 | .word 0x89800011 ! 93: WRTICK_R wr %r0, %r17, %tick | |
11777 | .word 0xe3e7c02a ! 94: CASA_I casa [%r31] 0x 1, %r10, %r17 | |
11778 | setx 0x701b4b36bafdfec7, %r1, %r28 | |
11779 | stxa %r28, [%g0] 0x73 | |
11780 | intvec_2_67: | |
11781 | .word 0x39400001 ! 95: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11782 | nop | |
11783 | mov 0x80, %g3 | |
11784 | stxa %g3, [%g3] 0x5f | |
11785 | .word 0xe25fc000 ! 96: LDX_R ldx [%r31 + %r0], %r17 | |
11786 | mondo_2_68: | |
11787 | nop | |
11788 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11789 | ta T_CHANGE_PRIV | |
11790 | stxa %r3, [%r0+0x3c8] %asi | |
11791 | .word 0x9d94c008 ! 97: WRPR_WSTATE_R wrpr %r19, %r8, %wstate | |
11792 | fpinit_2_69: | |
11793 | nop | |
11794 | setx fp_data_quads, %r19, %r20 | |
11795 | ldd [%r20], %f0 | |
11796 | ldd [%r20+8], %f4 | |
11797 | ld [%r20+16], %fsr | |
11798 | ld [%r20+24], %r19 | |
11799 | wr %r19, %g0, %gsr | |
11800 | .word 0x87a80a44 ! 98: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
11801 | .word 0xa1902009 ! 99: WRPR_GL_I wrpr %r0, 0x0009, %- | |
11802 | mondo_2_70: | |
11803 | nop | |
11804 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11805 | ta T_CHANGE_PRIV | |
11806 | stxa %r10, [%r0+0x3d8] %asi | |
11807 | .word 0x9d914011 ! 100: WRPR_WSTATE_R wrpr %r5, %r17, %wstate | |
11808 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
11809 | reduce_priv_lvl_2_71: | |
11810 | ta T_CHANGE_NONHPRIV ! macro | |
11811 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
11812 | .word 0x8d802000 ! 103: WRFPRS_I wr %r0, 0x0000, %fprs | |
11813 | splash_hpstate_2_73: | |
11814 | ta T_CHANGE_NONHPRIV | |
11815 | .word 0x26ccc001 ! 1: BRLZ brlz,a,pt %r19,<label_0xcc001> | |
11816 | .word 0x8198260e ! 104: WRHPR_HPSTATE_I wrhpr %r0, 0x060e, %hpstate | |
11817 | splash_hpstate_2_74: | |
11818 | ta T_CHANGE_NONHPRIV | |
11819 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
11820 | .word 0x81983ec9 ! 105: WRHPR_HPSTATE_I wrhpr %r0, 0x1ec9, %hpstate | |
11821 | .word 0x91920010 ! 106: WRPR_PIL_R wrpr %r8, %r16, %pil | |
11822 | trapasi_2_76: | |
11823 | nop | |
11824 | mov 0x28, %r1 ! (VA for ASI 0x5a) | |
11825 | .word 0xe2884b40 ! 107: LDUBA_R lduba [%r1, %r0] 0x5a, %r17 | |
11826 | mondo_2_77: | |
11827 | nop | |
11828 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11829 | stxa %r12, [%r0+0x3d8] %asi | |
11830 | .word 0x9d90c001 ! 108: WRPR_WSTATE_R wrpr %r3, %r1, %wstate | |
11831 | dvapa_2_78: | |
11832 | nop | |
11833 | ta T_CHANGE_HPRIV | |
11834 | mov 0x966, %r20 | |
11835 | mov 0x10, %r19 | |
11836 | sllx %r20, 23, %r20 | |
11837 | or %r19, %r20, %r19 | |
11838 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
11839 | mov 0x38, %r18 | |
11840 | stxa %r31, [%r18]0x58 | |
11841 | ta T_CHANGE_NONHPRIV | |
11842 | .word 0xa7a449c5 ! 109: FDIVd fdivd %f48, %f36, %f50 | |
11843 | .word 0xe727c000 ! 110: STF_R st %f19, [%r0, %r31] | |
11844 | ibp_2_79: | |
11845 | nop | |
11846 | ta T_CHANGE_NONHPRIV | |
11847 | .word 0xe71fe070 ! 111: LDDF_I ldd [%r31, 0x0070], %f19 | |
11848 | splash_lsu_2_80: | |
11849 | nop | |
11850 | ta T_CHANGE_HPRIV | |
11851 | set 0x930b4679, %r2 | |
11852 | mov 0x7, %r1 | |
11853 | sllx %r1, 32, %r1 | |
11854 | or %r1, %r2, %r2 | |
11855 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11856 | .word 0x3d400001 ! 112: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11857 | jmptr_2_81: | |
11858 | nop | |
11859 | best_set_reg(0xe1a00000, %r20, %r27) | |
11860 | .word 0xb7c6c000 ! 113: JMPL_R jmpl %r27 + %r0, %r27 | |
11861 | intveclr_2_82: | |
11862 | nop | |
11863 | ta T_CHANGE_HPRIV | |
11864 | setx 0xe09374724f79d520, %r1, %r28 | |
11865 | stxa %r28, [%g0] 0x72 | |
11866 | ta T_CHANGE_NONHPRIV | |
11867 | .word 0x25400001 ! 114: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11868 | intveclr_2_83: | |
11869 | nop | |
11870 | ta T_CHANGE_HPRIV | |
11871 | setx 0x7094fc7fd7490b12, %r1, %r28 | |
11872 | stxa %r28, [%g0] 0x72 | |
11873 | .word 0x25400001 ! 115: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11874 | .word 0xa190200d ! 116: WRPR_GL_I wrpr %r0, 0x000d, %- | |
11875 | nop | |
11876 | ta T_CHANGE_HPRIV | |
11877 | mov 0x2+1, %r10 | |
11878 | set sync_thr_counter5, %r23 | |
11879 | #ifndef SPC | |
11880 | ldxa [%g0]0x63, %o1 | |
11881 | and %o1, 0x38, %o1 | |
11882 | add %o1, %r23, %r23 | |
11883 | sllx %o1, 5, %o3 !(CID*256) | |
11884 | #endif | |
11885 | cas [%r23],%g0,%r10 !lock | |
11886 | brnz %r10, cwq_2_84 | |
11887 | rd %asi, %r12 | |
11888 | wr %g0, 0x40, %asi | |
11889 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11890 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11891 | cmp %l1, 1 | |
11892 | bne cwq_2_84 | |
11893 | set CWQ_BASE, %l6 | |
11894 | #ifndef SPC | |
11895 | add %l6, %o3, %l6 | |
11896 | #endif | |
11897 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11898 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
11899 | sllx %l2, 32, %l2 | |
11900 | stx %l2, [%l6 + 0x0] | |
11901 | membar #Sync | |
11902 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11903 | sub %l2, 0x40, %l2 | |
11904 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11905 | wr %r12, %g0, %asi | |
11906 | st %g0, [%r23] | |
11907 | cwq_2_84: | |
11908 | ta T_CHANGE_NONHPRIV | |
11909 | .word 0xa9414000 ! 117: RDPC rd %pc, %r20 | |
11910 | fpinit_2_85: | |
11911 | nop | |
11912 | setx fp_data_quads, %r19, %r20 | |
11913 | ldd [%r20], %f0 | |
11914 | ldd [%r20+8], %f4 | |
11915 | ld [%r20+16], %fsr | |
11916 | ld [%r20+24], %r19 | |
11917 | wr %r19, %g0, %gsr | |
11918 | .word 0xc3e8390a ! 118: PREFETCHA_I prefetcha [%r0, + 0xfffff90a] %asi, #one_read | |
11919 | ibp_2_86: | |
11920 | nop | |
11921 | .word 0xc32fc011 ! 119: STXFSR_R st-sfr %f1, [%r17, %r31] | |
11922 | setx 0x0e37359b8589ab58, %r1, %r28 | |
11923 | stxa %r28, [%g0] 0x73 | |
11924 | intvec_2_87: | |
11925 | .word 0x39400001 ! 120: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11926 | #if (defined SPC || defined CMP1) | |
11927 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_88) + 32, 16, 16)) -> intp(1,0,21) | |
11928 | #else | |
11929 | setx 0x9e8dd2df7b442c1b, %r1, %r28 | |
11930 | stxa %r28, [%g0] 0x73 | |
11931 | #endif | |
11932 | intvec_2_88: | |
11933 | .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11934 | .word 0x89800011 ! 122: WRTICK_R wr %r0, %r17, %tick | |
11935 | fbule skip_2_90 | |
11936 | .word 0x87aa8a51 ! 1: FCMPd fcmpd %fcc<n>, %f10, %f48 | |
11937 | .align 512 | |
11938 | skip_2_90: | |
11939 | .word 0x39400001 ! 123: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11940 | mondo_2_91: | |
11941 | nop | |
11942 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11943 | stxa %r19, [%r0+0x3d0] %asi | |
11944 | .word 0x9d92c001 ! 124: WRPR_WSTATE_R wrpr %r11, %r1, %wstate | |
11945 | .word 0x8d802000 ! 125: WRFPRS_I wr %r0, 0x0000, %fprs | |
11946 | ibp_2_92: | |
11947 | nop | |
11948 | ta T_CHANGE_NONHPRIV | |
11949 | .word 0x977021f5 ! 126: POPC_I popc 0x01f5, %r11 | |
11950 | .word 0x8d802004 ! 127: WRFPRS_I wr %r0, 0x0004, %fprs | |
11951 | .word 0x8d802000 ! 128: WRFPRS_I wr %r0, 0x0000, %fprs | |
11952 | unsupttte_2_93: | |
11953 | nop | |
11954 | ta T_CHANGE_HPRIV | |
11955 | mov 1, %r20 | |
11956 | sllx %r20, 63, %r20 | |
11957 | or %r20, 2,%r20 | |
11958 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
11959 | ta T_CHANGE_NONHPRIV | |
11960 | .word 0x9bb48490 ! 129: FCMPLE32 fcmple32 %d18, %d16, %r13 | |
11961 | invalw | |
11962 | mov 0x31, %r30 | |
11963 | .word 0x83d0001e ! 130: Tcc_R te icc_or_xcc, %r0 + %r30 | |
11964 | fpinit_2_94: | |
11965 | nop | |
11966 | setx fp_data_quads, %r19, %r20 | |
11967 | ldd [%r20], %f0 | |
11968 | ldd [%r20+8], %f4 | |
11969 | ld [%r20+16], %fsr | |
11970 | ld [%r20+24], %r19 | |
11971 | wr %r19, %g0, %gsr | |
11972 | .word 0x89a009c4 ! 131: FDIVd fdivd %f0, %f4, %f4 | |
11973 | intveclr_2_95: | |
11974 | nop | |
11975 | ta T_CHANGE_HPRIV | |
11976 | setx 0xa569d870f72a4132, %r1, %r28 | |
11977 | stxa %r28, [%g0] 0x72 | |
11978 | ta T_CHANGE_NONHPRIV | |
11979 | .word 0x25400001 ! 132: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11980 | intveclr_2_96: | |
11981 | nop | |
11982 | ta T_CHANGE_HPRIV | |
11983 | setx 0xf81053f5320ae7ba, %r1, %r28 | |
11984 | stxa %r28, [%g0] 0x72 | |
11985 | .word 0x25400001 ! 133: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11986 | setx 0x5a2ab0c642e4d53c, %r1, %r28 | |
11987 | stxa %r28, [%g0] 0x73 | |
11988 | intvec_2_97: | |
11989 | .word 0x39400001 ! 134: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11990 | .word 0x91914004 ! 135: WRPR_PIL_R wrpr %r5, %r4, %pil | |
11991 | .word 0xa1a00173 ! 136: FABSq dis not found | |
11992 | ||
11993 | mondo_2_100: | |
11994 | nop | |
11995 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11996 | ta T_CHANGE_PRIV | |
11997 | stxa %r20, [%r0+0x3c0] %asi | |
11998 | .word 0x9d934012 ! 137: WRPR_WSTATE_R wrpr %r13, %r18, %wstate | |
11999 | splash_cmpr_2_101: | |
12000 | mov 0, %r18 | |
12001 | sllx %r18, 63, %r18 | |
12002 | rd %tick, %r17 | |
12003 | add %r17, 0x60, %r17 | |
12004 | or %r17, %r18, %r17 | |
12005 | ta T_CHANGE_PRIV | |
12006 | .word 0xb3800011 ! 138: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
12007 | fbul,a,pn %fcc0, skip_2_102 | |
12008 | bcc skip_2_102 | |
12009 | .align 1024 | |
12010 | skip_2_102: | |
12011 | .word 0xc36fe127 ! 139: PREFETCH_I prefetch [%r31 + 0x0127], #one_read | |
12012 | intveclr_2_103: | |
12013 | nop | |
12014 | ta T_CHANGE_HPRIV | |
12015 | setx 0x22cb133fc5e33600, %r1, %r28 | |
12016 | stxa %r28, [%g0] 0x72 | |
12017 | .word 0x25400001 ! 140: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12018 | .word 0xa781bf12 ! 141: WR_GRAPHICS_STATUS_REG_I wr %r6, 0x1f12, %- | |
12019 | .word 0x83d020b5 ! 142: Tcc_I te icc_or_xcc, %r0 + 181 | |
12020 | .word 0x93a00174 ! 143: FABSq dis not found | |
12021 | ||
12022 | splash_cmpr_2_105: | |
12023 | mov 0, %r18 | |
12024 | sllx %r18, 63, %r18 | |
12025 | rd %tick, %r17 | |
12026 | add %r17, 0x70, %r17 | |
12027 | or %r17, %r18, %r17 | |
12028 | .word 0xaf800011 ! 144: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
12029 | cwp_2_106: | |
12030 | set user_data_start, %o7 | |
12031 | .word 0x93902006 ! 145: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
12032 | mondo_2_107: | |
12033 | nop | |
12034 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
12035 | ta T_CHANGE_PRIV | |
12036 | stxa %r19, [%r0+0x3e0] %asi | |
12037 | .word 0x9d94c012 ! 146: WRPR_WSTATE_R wrpr %r19, %r18, %wstate | |
12038 | brcommon3_2_108: | |
12039 | nop | |
12040 | setx common_target, %r12, %r27 | |
12041 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
12042 | ba,a .+12 | |
12043 | .word 0xe86fe020 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0020] | |
12044 | ba,a .+8 | |
12045 | jmpl %r27+0, %r27 | |
12046 | .word 0xe9e7e013 ! 147: CASA_R casa [%r31] %asi, %r19, %r20 | |
12047 | ibp_2_109: | |
12048 | nop | |
12049 | .word 0xc3eac034 ! 148: PREFETCHA_R prefetcha [%r11, %r20] 0x01, #one_read | |
12050 | trapasi_2_110: | |
12051 | nop | |
12052 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
12053 | .word 0xd4884a00 ! 149: LDUBA_R lduba [%r1, %r0] 0x50, %r10 | |
12054 | setx 0x7c49be461b761cbb, %r1, %r28 | |
12055 | stxa %r28, [%g0] 0x73 | |
12056 | intvec_2_111: | |
12057 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12058 | splash_cmpr_2_112: | |
12059 | mov 1, %r18 | |
12060 | sllx %r18, 63, %r18 | |
12061 | rd %tick, %r17 | |
12062 | add %r17, 0x50, %r17 | |
12063 | or %r17, %r18, %r17 | |
12064 | ta T_CHANGE_PRIV | |
12065 | .word 0xaf800011 ! 151: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
12066 | splash_lsu_2_113: | |
12067 | nop | |
12068 | ta T_CHANGE_HPRIV | |
12069 | set 0xc4f5295f, %r2 | |
12070 | mov 0x2, %r1 | |
12071 | sllx %r1, 32, %r1 | |
12072 | or %r1, %r2, %r2 | |
12073 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
12074 | .word 0x3d400001 ! 152: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
12075 | .word 0x81510000 ! 153: RDPR_TICK rdpr %tick, %r0 | |
12076 | splash_lsu_2_114: | |
12077 | nop | |
12078 | ta T_CHANGE_HPRIV | |
12079 | set 0x941c5f72, %r2 | |
12080 | mov 0x3, %r1 | |
12081 | sllx %r1, 32, %r1 | |
12082 | or %r1, %r2, %r2 | |
12083 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
12084 | .word 0x3d400001 ! 154: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
12085 | pmu_2_115: | |
12086 | nop | |
12087 | setx 0xfffff61cfffff567, %g1, %g7 | |
12088 | .word 0xa3800007 ! 155: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
12089 | #if (defined SPC || defined CMP1) | |
12090 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_116) + 24, 16, 16)) -> intp(5,0,22) | |
12091 | #else | |
12092 | setx 0x7d654b5c5f038f86, %r1, %r28 | |
12093 | stxa %r28, [%g0] 0x73 | |
12094 | #endif | |
12095 | intvec_2_116: | |
12096 | .word 0x39400001 ! 156: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12097 | .word 0xa9848012 ! 157: WR_SET_SOFTINT_R wr %r18, %r18, %set_softint | |
12098 | .word 0xa5a109a6 ! 158: FDIVs fdivs %f4, %f6, %f18 | |
12099 | .word 0x9bb44591 ! 159: FCMPGT32 fcmpgt32 %d48, %d48, %r13 | |
12100 | ta T_CHANGE_NONHPRIV | |
12101 | .word 0x8143e011 ! 160: MEMBAR membar #LoadLoad | #Lookaside | |
12102 | splash_hpstate_2_119: | |
12103 | ta T_CHANGE_NONHPRIV | |
12104 | .word 0x2accc001 ! 1: BRNZ brnz,a,pt %r19,<label_0xcc001> | |
12105 | .word 0x81983f84 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1f84, %hpstate | |
12106 | .word 0x8d90305e ! 162: WRPR_PSTATE_I wrpr %r0, 0x105e, %pstate | |
12107 | otherw | |
12108 | mov 0xb5, %r30 | |
12109 | .word 0x91d0001e ! 163: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
12110 | .word 0xe19fda00 ! 164: LDDFA_R ldda [%r31, %r0], %f16 | |
12111 | setx 0xb514b1c65dea9ed7, %r1, %r28 | |
12112 | stxa %r28, [%g0] 0x73 | |
12113 | intvec_2_121: | |
12114 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12115 | ibp_2_122: | |
12116 | nop | |
12117 | .word 0xc1bfd960 ! 166: STDFA_R stda %f0, [%r0, %r31] | |
12118 | splash_lsu_2_123: | |
12119 | nop | |
12120 | ta T_CHANGE_HPRIV | |
12121 | set 0x64f54083, %r2 | |
12122 | mov 0x2, %r1 | |
12123 | sllx %r1, 32, %r1 | |
12124 | or %r1, %r2, %r2 | |
12125 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
12126 | ta T_CHANGE_NONHPRIV | |
12127 | .word 0x3d400001 ! 167: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
12128 | nop | |
12129 | mov 0x80, %g3 | |
12130 | stxa %g3, [%g3] 0x57 | |
12131 | .word 0xd05fc000 ! 168: LDX_R ldx [%r31 + %r0], %r8 | |
12132 | jmptr_2_124: | |
12133 | nop | |
12134 | best_set_reg(0xe1a00000, %r20, %r27) | |
12135 | .word 0xb7c6c000 ! 169: JMPL_R jmpl %r27 + %r0, %r27 | |
12136 | nop | |
12137 | ta T_CHANGE_HPRIV ! macro | |
12138 | donret_2_125: | |
12139 | rd %pc, %r12 | |
12140 | add %r12, (donretarg_2_125-donret_2_125), %r12 | |
12141 | add %r12, 0x8, %r11 ! nonseq tnpc | |
12142 | wrpr %g0, 0x1, %tl | |
12143 | wrpr %g0, %r12, %tpc | |
12144 | wrpr %g0, %r11, %tnpc | |
12145 | set (0x00441200 | (0x4f << 24)), %r13 | |
12146 | and %r12, 0xfff, %r14 | |
12147 | sllx %r14, 30, %r14 | |
12148 | or %r13, %r14, %r20 | |
12149 | wrpr %r20, %g0, %tstate | |
12150 | wrhpr %g0, 0x947, %htstate | |
12151 | ta T_CHANGE_NONHPRIV ! rand=1 (2) | |
12152 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> | |
12153 | done | |
12154 | donretarg_2_125: | |
12155 | .word 0x39400001 ! 170: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12156 | .word 0xe19fdf20 ! 171: LDDFA_R ldda [%r31, %r0], %f16 | |
12157 | trapasi_2_127: | |
12158 | nop | |
12159 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
12160 | .word 0xd0904e60 ! 172: LDUHA_R lduha [%r1, %r0] 0x73, %r8 | |
12161 | .word 0x89800011 ! 173: WRTICK_R wr %r0, %r17, %tick | |
12162 | fpinit_2_129: | |
12163 | nop | |
12164 | setx fp_data_quads, %r19, %r20 | |
12165 | ldd [%r20], %f0 | |
12166 | ldd [%r20+8], %f4 | |
12167 | ld [%r20+16], %fsr | |
12168 | ld [%r20+24], %r19 | |
12169 | wr %r19, %g0, %gsr | |
12170 | .word 0x89a009a4 ! 174: FDIVs fdivs %f0, %f4, %f4 | |
12171 | .word 0x89800011 ! 175: WRTICK_R wr %r0, %r17, %tick | |
12172 | .word 0xd127e038 ! 176: STF_I st %f8, [0x0038, %r31] | |
12173 | .word 0x89800011 ! 177: WRTICK_R wr %r0, %r17, %tick | |
12174 | .word 0xd077e0ac ! 178: STX_I stx %r8, [%r31 + 0x00ac] | |
12175 | #if (defined SPC || defined CMP1) | |
12176 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_132) + 24, 16, 16)) -> intp(3,0,19) | |
12177 | #else | |
12178 | setx 0x83f20cb05f9ddcb6, %r1, %r28 | |
12179 | stxa %r28, [%g0] 0x73 | |
12180 | #endif | |
12181 | intvec_2_132: | |
12182 | .word 0x39400001 ! 179: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12183 | .word 0x87802010 ! 180: WRASI_I wr %r0, 0x0010, %asi | |
12184 | setx 0x86f4730f09cdf14d, %r1, %r28 | |
12185 | stxa %r28, [%g0] 0x73 | |
12186 | intvec_2_133: | |
12187 | .word 0x39400001 ! 181: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12188 | .word 0xd037e18e ! 182: STH_I sth %r8, [%r31 + 0x018e] | |
12189 | .word 0xd1e7e00d ! 183: CASA_R casa [%r31] %asi, %r13, %r8 | |
12190 | br_badelay2_2_135: | |
12191 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
12192 | allclean | |
12193 | .word 0x95b24301 ! 184: ALIGNADDRESS alignaddr %r9, %r1, %r10 | |
12194 | splash_tba_2_136: | |
12195 | nop | |
12196 | ta T_CHANGE_PRIV | |
12197 | set 0x120000, %r12 | |
12198 | .word 0x8b90000c ! 185: WRPR_TBA_R wrpr %r0, %r12, %tba | |
12199 | trapasi_2_137: | |
12200 | nop | |
12201 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
12202 | .word 0xe2c04a00 ! 186: LDSWA_R ldswa [%r1, %r0] 0x50, %r17 | |
12203 | ceter_2_138: | |
12204 | nop | |
12205 | ta T_CHANGE_HPRIV | |
12206 | mov 7, %r17 | |
12207 | sllx %r17, 60, %r17 | |
12208 | mov 0x18, %r16 | |
12209 | stxa %r17, [%r16]0x4c | |
12210 | ta T_CHANGE_NONHPRIV | |
12211 | .word 0x9b410000 ! 187: RDTICK rd %tick, %r13 | |
12212 | intveclr_2_139: | |
12213 | nop | |
12214 | ta T_CHANGE_HPRIV | |
12215 | setx 0x924eefbd1721eb52, %r1, %r28 | |
12216 | stxa %r28, [%g0] 0x72 | |
12217 | .word 0x25400001 ! 188: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12218 | brcommon2_2_140: | |
12219 | nop | |
12220 | setx common_target, %r12, %r27 | |
12221 | ba,a .+12 | |
12222 | .word 0xe714c005 ! 1: LDQF_R - [%r19, %r5], %f19 | |
12223 | ba,a .+8 | |
12224 | jmpl %r27+0, %r27 | |
12225 | .word 0xc19fe0a0 ! 189: LDDFA_I ldda [%r31, 0x00a0], %f0 | |
12226 | trapasi_2_141: | |
12227 | nop | |
12228 | mov 0x28, %r1 ! (VA for ASI 0x5a) | |
12229 | .word 0xe6c84b40 ! 190: LDSBA_R ldsba [%r1, %r0] 0x5a, %r19 | |
12230 | ibp_2_142: | |
12231 | nop | |
12232 | .word 0xa3a409a8 ! 191: FDIVs fdivs %f16, %f8, %f17 | |
12233 | .word 0xd737e0ec ! 192: STQF_I - %f11, [0x00ec, %r31] | |
12234 | splash_cmpr_2_143: | |
12235 | mov 0, %r18 | |
12236 | sllx %r18, 63, %r18 | |
12237 | rd %tick, %r17 | |
12238 | add %r17, 0x80, %r17 | |
12239 | or %r17, %r18, %r17 | |
12240 | ta T_CHANGE_HPRIV | |
12241 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
12242 | .word 0xb3800011 ! 193: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
12243 | tagged_2_144: | |
12244 | tsubcctv %r18, 0x17b9, %r10 | |
12245 | .word 0xd607e0ea ! 194: LDUW_I lduw [%r31 + 0x00ea], %r11 | |
12246 | .word 0xa0ab4007 ! 195: ANDNcc_R andncc %r13, %r7, %r16 | |
12247 | .word 0xd4bfc020 ! 196: STDA_R stda %r10, [%r31 + %r0] 0x01 | |
12248 | intveclr_2_145: | |
12249 | nop | |
12250 | ta T_CHANGE_HPRIV | |
12251 | setx 0x080883bacdc74b63, %r1, %r28 | |
12252 | stxa %r28, [%g0] 0x72 | |
12253 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12254 | dvapa_2_146: | |
12255 | nop | |
12256 | ta T_CHANGE_HPRIV | |
12257 | mov 0xb97, %r20 | |
12258 | mov 0xd, %r19 | |
12259 | sllx %r20, 23, %r20 | |
12260 | or %r19, %r20, %r19 | |
12261 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
12262 | mov 0x38, %r18 | |
12263 | stxa %r31, [%r18]0x58 | |
12264 | ta T_CHANGE_NONHPRIV | |
12265 | .word 0x97b04494 ! 198: FCMPLE32 fcmple32 %d32, %d20, %r11 | |
12266 | ibp_2_147: | |
12267 | nop | |
12268 | ta T_CHANGE_NONHPRIV | |
12269 | .word 0xd897c02a ! 199: LDUHA_R lduha [%r31, %r10] 0x01, %r12 | |
12270 | .word 0x89800011 ! 200: WRTICK_R wr %r0, %r17, %tick | |
12271 | jmptr_2_149: | |
12272 | nop | |
12273 | best_set_reg(0xe1a00000, %r20, %r27) | |
12274 | .word 0xb7c6c000 ! 201: JMPL_R jmpl %r27 + %r0, %r27 | |
12275 | nop | |
12276 | nop | |
12277 | ta T_CHANGE_PRIV | |
12278 | wrpr %g0, %g0, %gl | |
12279 | nop | |
12280 | nop | |
12281 | setx join_lbl_0_0, %g1, %g2 | |
12282 | jmp %g2 | |
12283 | nop | |
12284 | fork_lbl_0_1: | |
12285 | ta T_CHANGE_NONHPRIV | |
12286 | splash_lsu_1_0: | |
12287 | nop | |
12288 | ta T_CHANGE_HPRIV | |
12289 | set 0xb66c0f73, %r2 | |
12290 | mov 0x4, %r1 | |
12291 | sllx %r1, 32, %r1 | |
12292 | or %r1, %r2, %r2 | |
12293 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
12294 | ta T_CHANGE_NONHPRIV | |
12295 | ibp_1_1: | |
12296 | nop | |
12297 | ta T_CHANGE_NONHPRIV | |
12298 | .word 0xe19fdb60 ! 1: LDDFA_R ldda [%r31, %r0], %f16 | |
12299 | splash_lsu_1_2: | |
12300 | nop | |
12301 | ta T_CHANGE_HPRIV | |
12302 | set 0x80a4947e, %r2 | |
12303 | mov 0x4, %r1 | |
12304 | sllx %r1, 32, %r1 | |
12305 | or %r1, %r2, %r2 | |
12306 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
12307 | ta T_CHANGE_NONHPRIV | |
12308 | .word 0x3d400001 ! 2: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
12309 | splash_lsu_1_3: | |
12310 | nop | |
12311 | ta T_CHANGE_HPRIV | |
12312 | set 0xb72cd82b, %r2 | |
12313 | mov 0x2, %r1 | |
12314 | sllx %r1, 32, %r1 | |
12315 | or %r1, %r2, %r2 | |
12316 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
12317 | .word 0x3d400001 ! 3: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
12318 | .word 0xe277e0a8 ! 4: STX_I stx %r17, [%r31 + 0x00a8] | |
12319 | .word 0x30780001 ! 5: BPA <illegal instruction> | |
12320 | .word 0x91d020b4 ! 6: Tcc_I ta icc_or_xcc, %r0 + 180 | |
12321 | .word 0x89800011 ! 7: WRTICK_R wr %r0, %r17, %tick | |
12322 | splash_htba_1_5: | |
12323 | nop | |
12324 | ta T_CHANGE_HPRIV | |
12325 | setx 0x0000000000280000, %r11, %r12 | |
12326 | .word 0x8b98000c ! 8: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
12327 | .word 0xe2800c40 ! 9: LDUWA_R lduwa [%r0, %r0] 0x62, %r17 | |
12328 | .word 0xc32fc000 ! 10: STXFSR_R st-sfr %f1, [%r0, %r31] | |
12329 | splash_hpstate_1_7: | |
12330 | ta T_CHANGE_NONHPRIV | |
12331 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> | |
12332 | .word 0x81982185 ! 11: WRHPR_HPSTATE_I wrhpr %r0, 0x0185, %hpstate | |
12333 | .word 0xc3e9c030 ! 12: PREFETCHA_R prefetcha [%r7, %r16] 0x01, #one_read | |
12334 | .word 0xd4800c80 ! 13: LDUWA_R lduwa [%r0, %r0] 0x64, %r10 | |
12335 | setx 0x5b65c7308db317d3, %r1, %r28 | |
12336 | stxa %r28, [%g0] 0x73 | |
12337 | intvec_1_9: | |
12338 | .word 0x39400001 ! 14: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12339 | trapasi_1_10: | |
12340 | nop | |
12341 | mov 0x18, %r1 ! (VA for ASI 0x50) | |
12342 | .word 0xd4c04a00 ! 15: LDSWA_R ldswa [%r1, %r0] 0x50, %r10 | |
12343 | ibp_1_11: | |
12344 | nop | |
12345 | .word 0xa7b0c7cd ! 16: PDIST pdistn %d34, %d44, %d50 | |
12346 | .word 0xe69fc2c0 ! 17: LDDA_R ldda [%r31, %r0] 0x16, %r19 | |
12347 | brcommon3_1_12: | |
12348 | nop | |
12349 | setx common_target, %r12, %r27 | |
12350 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
12351 | ba,a .+12 | |
12352 | .word 0xe737e0b0 ! 1: STQF_I - %f19, [0x00b0, %r31] | |
12353 | ba,a .+8 | |
12354 | jmpl %r27+0, %r27 | |
12355 | .word 0xc32fc00b ! 18: STXFSR_R st-sfr %f1, [%r11, %r31] | |
12356 | nop | |
12357 | mov 0x80, %g3 | |
12358 | stxa %g3, [%g3] 0x5f | |
12359 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
12360 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
12361 | .word 0xe65fc000 ! 19: LDX_R ldx [%r31 + %r0], %r19 | |
12362 | splash_hpstate_1_13: | |
12363 | .word 0x819829d7 ! 20: WRHPR_HPSTATE_I wrhpr %r0, 0x09d7, %hpstate | |
12364 | intveclr_1_14: | |
12365 | nop | |
12366 | ta T_CHANGE_HPRIV | |
12367 | setx 0x0ab9a60f3c906aef, %r1, %r28 | |
12368 | stxa %r28, [%g0] 0x72 | |
12369 | ta T_CHANGE_NONHPRIV | |
12370 | .word 0x25400001 ! 21: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12371 | nop | |
12372 | ta T_CHANGE_HPRIV | |
12373 | mov 0x1+1, %r10 | |
12374 | set sync_thr_counter5, %r23 | |
12375 | #ifndef SPC | |
12376 | ldxa [%g0]0x63, %o1 | |
12377 | and %o1, 0x38, %o1 | |
12378 | add %o1, %r23, %r23 | |
12379 | sllx %o1, 5, %o3 !(CID*256) | |
12380 | #endif | |
12381 | cas [%r23],%g0,%r10 !lock | |
12382 | brnz %r10, cwq_1_15 | |
12383 | rd %asi, %r12 | |
12384 | wr %g0, 0x40, %asi | |
12385 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
12386 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
12387 | cmp %l1, 1 | |
12388 | bne cwq_1_15 | |
12389 | set CWQ_BASE, %l6 | |
12390 | #ifndef SPC | |
12391 | add %l6, %o3, %l6 | |
12392 | #endif | |
12393 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
12394 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word | |
12395 | sllx %l2, 32, %l2 | |
12396 | stx %l2, [%l6 + 0x0] | |
12397 | membar #Sync | |
12398 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
12399 | sub %l2, 0x40, %l2 | |
12400 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
12401 | wr %r12, %g0, %asi | |
12402 | st %g0, [%r23] | |
12403 | cwq_1_15: | |
12404 | ta T_CHANGE_NONHPRIV | |
12405 | .word 0x99414000 ! 22: RDPC rd %pc, %r12 | |
12406 | .word 0xd8d7e158 ! 23: LDSHA_I ldsha [%r31, + 0x0158] %asi, %r12 | |
12407 | .word 0xc19fda00 ! 24: LDDFA_R ldda [%r31, %r0], %f0 | |
12408 | #if (defined SPC || defined CMP1) | |
12409 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_16) + 16, 16, 16)) -> intp(2,0,20) | |
12410 | #else | |
12411 | setx 0x8ccf44bd0a50b5c4, %r1, %r28 | |
12412 | stxa %r28, [%g0] 0x73 | |
12413 | #endif | |
12414 | intvec_1_16: | |
12415 | .word 0x39400001 ! 25: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12416 | splash_tba_1_17: | |
12417 | nop | |
12418 | ta T_CHANGE_PRIV | |
12419 | setx 0x0000000000380000, %r11, %r12 | |
12420 | .word 0x8b90000c ! 26: WRPR_TBA_R wrpr %r0, %r12, %tba | |
12421 | nop | |
12422 | mov 0x80, %g3 | |
12423 | stxa %g3, [%g3] 0x57 | |
12424 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
12425 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
12426 | .word 0xd85fc000 ! 27: LDX_R ldx [%r31 + %r0], %r12 | |
12427 | .word 0xb180c00a ! 28: WR_STICK_REG_R wr %r3, %r10, %- | |
12428 | .word 0xd877e198 ! 29: STX_I stx %r12, [%r31 + 0x0198] | |
12429 | tagged_1_18: | |
12430 | tsubcctv %r20, 0x1fb4, %r20 | |
12431 | .word 0xd807e1bb ! 30: LDUW_I lduw [%r31 + 0x01bb], %r12 | |
12432 | .word 0x89800011 ! 31: WRTICK_R wr %r0, %r17, %tick | |
12433 | trapasi_1_20: | |
12434 | nop | |
12435 | mov 0x28, %r1 ! (VA for ASI 0x5b) | |
12436 | .word 0xd8884b60 ! 32: LDUBA_R lduba [%r1, %r0] 0x5b, %r12 | |
12437 | fpinit_1_21: | |
12438 | nop | |
12439 | setx fp_data_quads, %r19, %r20 | |
12440 | ldd [%r20], %f0 | |
12441 | ldd [%r20+8], %f4 | |
12442 | ld [%r20+16], %fsr | |
12443 | ld [%r20+24], %r19 | |
12444 | wr %r19, %g0, %gsr | |
12445 | .word 0xc3e83df7 ! 33: PREFETCHA_I prefetcha [%r0, + 0xfffffdf7] %asi, #one_read | |
12446 | nop | |
12447 | ta T_CHANGE_HPRIV | |
12448 | mov 0x1+1, %r10 | |
12449 | set sync_thr_counter5, %r23 | |
12450 | #ifndef SPC | |
12451 | ldxa [%g0]0x63, %o1 | |
12452 | and %o1, 0x38, %o1 | |
12453 | add %o1, %r23, %r23 | |
12454 | sllx %o1, 5, %o3 !(CID*256) | |
12455 | #endif | |
12456 | cas [%r23],%g0,%r10 !lock | |
12457 | brnz %r10, cwq_1_22 | |
12458 | rd %asi, %r12 | |
12459 | wr %g0, 0x40, %asi | |
12460 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
12461 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
12462 | cmp %l1, 1 | |
12463 | bne cwq_1_22 | |
12464 | set CWQ_BASE, %l6 | |
12465 | #ifndef SPC | |
12466 | add %l6, %o3, %l6 | |
12467 | #endif | |
12468 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
12469 | best_set_reg(0x20610040, %l1, %l2) !# Control Word | |
12470 | sllx %l2, 32, %l2 | |
12471 | stx %l2, [%l6 + 0x0] | |
12472 | membar #Sync | |
12473 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
12474 | sub %l2, 0x40, %l2 | |
12475 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
12476 | wr %r12, %g0, %asi | |
12477 | st %g0, [%r23] | |
12478 | cwq_1_22: | |
12479 | ta T_CHANGE_NONHPRIV | |
12480 | .word 0x97414000 ! 34: RDPC rd %pc, %r11 | |
12481 | jmptr_1_23: | |
12482 | nop | |
12483 | best_set_reg(0xe0200000, %r20, %r27) | |
12484 | .word 0xb7c6c000 ! 35: JMPL_R jmpl %r27 + %r0, %r27 | |
12485 | nop | |
12486 | ta T_CHANGE_HPRIV ! macro | |
12487 | donret_1_24: | |
12488 | rd %pc, %r12 | |
12489 | add %r12, (donretarg_1_24-donret_1_24+4), %r12 | |
12490 | add %r12, 0x4, %r11 ! seq tnpc | |
12491 | wrpr %g0, 0x1, %tl | |
12492 | wrpr %g0, %r12, %tpc | |
12493 | wrpr %g0, %r11, %tnpc | |
12494 | set (0x00432600 | (4 << 24)), %r13 | |
12495 | and %r12, 0xfff, %r14 | |
12496 | sllx %r14, 30, %r14 | |
12497 | or %r13, %r14, %r20 | |
12498 | wrpr %r20, %g0, %tstate | |
12499 | wrhpr %g0, 0x140c, %htstate | |
12500 | ta T_CHANGE_NONHPRIV ! rand=1 (1) | |
12501 | retry | |
12502 | donretarg_1_24: | |
12503 | .word 0xd66fe05b ! 36: LDSTUB_I ldstub %r11, [%r31 + 0x005b] | |
12504 | nop | |
12505 | ta T_CHANGE_HPRIV ! macro | |
12506 | donret_1_25: | |
12507 | rd %pc, %r12 | |
12508 | add %r12, (donretarg_1_25-donret_1_25+4), %r12 | |
12509 | add %r12, 0x4, %r11 ! seq tnpc | |
12510 | wrpr %g0, 0x1, %tl | |
12511 | wrpr %g0, %r12, %tpc | |
12512 | wrpr %g0, %r11, %tnpc | |
12513 | set (0x009d9d00 | (22 << 24)), %r13 | |
12514 | and %r12, 0xfff, %r14 | |
12515 | sllx %r14, 30, %r14 | |
12516 | or %r13, %r14, %r20 | |
12517 | wrpr %r20, %g0, %tstate | |
12518 | wrhpr %g0, 0x1b4, %htstate | |
12519 | ta T_CHANGE_NONHPRIV ! rand=1 (1) | |
12520 | done | |
12521 | donretarg_1_25: | |
12522 | .word 0x3c800001 ! 37: BPOS bpos,a <label_0x1> | |
12523 | fpinit_1_26: | |
12524 | nop | |
12525 | setx fp_data_quads, %r19, %r20 | |
12526 | ldd [%r20], %f0 | |
12527 | ldd [%r20+8], %f4 | |
12528 | ld [%r20+16], %fsr | |
12529 | ld [%r20+24], %r19 | |
12530 | wr %r19, %g0, %gsr | |
12531 | .word 0x89a009c4 ! 38: FDIVd fdivd %f0, %f4, %f4 | |
12532 | nop | |
12533 | mov 0x80, %g3 | |
12534 | stxa %g3, [%g3] 0x57 | |
12535 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
12536 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
12537 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
12538 | .word 0xd65fc000 ! 39: LDX_R ldx [%r31 + %r0], %r11 | |
12539 | nop | |
12540 | mov 0x80, %g3 | |
12541 | stxa %g3, [%g3] 0x5f | |
12542 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
12543 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
12544 | .word 0xd65fc000 ! 40: LDX_R ldx [%r31 + %r0], %r11 | |
12545 | mondo_1_27: | |
12546 | nop | |
12547 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
12548 | ta T_CHANGE_PRIV | |
12549 | stxa %r7, [%r0+0x3c0] %asi | |
12550 | .word 0x9d928006 ! 41: WRPR_WSTATE_R wrpr %r10, %r6, %wstate | |
12551 | ibp_1_28: | |
12552 | nop | |
12553 | ta T_CHANGE_NONHPRIV | |
12554 | .word 0xd7e7e012 ! 42: CASA_R casa [%r31] %asi, %r18, %r11 | |
12555 | fpinit_1_29: | |
12556 | nop | |
12557 | setx fp_data_quads, %r19, %r20 | |
12558 | ldd [%r20], %f0 | |
12559 | ldd [%r20+8], %f4 | |
12560 | ld [%r20+16], %fsr | |
12561 | ld [%r20+24], %r19 | |
12562 | wr %r19, %g0, %gsr | |
12563 | .word 0x89a009c4 ! 43: FDIVd fdivd %f0, %f4, %f4 | |
12564 | nop | |
12565 | ta T_CHANGE_HPRIV | |
12566 | mov 0x1+1, %r10 | |
12567 | set sync_thr_counter5, %r23 | |
12568 | #ifndef SPC | |
12569 | ldxa [%g0]0x63, %o1 | |
12570 | and %o1, 0x38, %o1 | |
12571 | add %o1, %r23, %r23 | |
12572 | sllx %o1, 5, %o3 !(CID*256) | |
12573 | #endif | |
12574 | cas [%r23],%g0,%r10 !lock | |
12575 | brnz %r10, cwq_1_30 | |
12576 | rd %asi, %r12 | |
12577 | wr %g0, 0x40, %asi | |
12578 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
12579 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
12580 | cmp %l1, 1 | |
12581 | bne cwq_1_30 | |
12582 | set CWQ_BASE, %l6 | |
12583 | #ifndef SPC | |
12584 | add %l6, %o3, %l6 | |
12585 | #endif | |
12586 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
12587 | best_set_reg(0x20610010, %l1, %l2) !# Control Word | |
12588 | sllx %l2, 32, %l2 | |
12589 | stx %l2, [%l6 + 0x0] | |
12590 | membar #Sync | |
12591 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
12592 | sub %l2, 0x40, %l2 | |
12593 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
12594 | wr %r12, %g0, %asi | |
12595 | st %g0, [%r23] | |
12596 | cwq_1_30: | |
12597 | ta T_CHANGE_NONHPRIV | |
12598 | .word 0xa5414000 ! 44: RDPC rd %pc, %r18 | |
12599 | .word 0xe4dfe128 ! 45: LDXA_I ldxa [%r31, + 0x0128] %asi, %r18 | |
12600 | .word 0xa9703a17 ! 46: POPC_I popc 0x1a17, %r20 | |
12601 | ibp_1_32: | |
12602 | nop | |
12603 | .word 0x87acca45 ! 47: FCMPd fcmpd %fcc<n>, %f50, %f36 | |
12604 | nop | |
12605 | ta T_CHANGE_HPRIV | |
12606 | mov 0x1, %r10 | |
12607 | set sync_thr_counter6, %r23 | |
12608 | #ifndef SPC | |
12609 | ldxa [%g0]0x63, %o1 | |
12610 | and %o1, 0x38, %o1 | |
12611 | add %o1, %r23, %r23 | |
12612 | #endif | |
12613 | cas [%r23],%g0,%r10 !lock | |
12614 | brnz %r10, sma_1_33 | |
12615 | rd %asi, %r12 | |
12616 | wr %g0, 0x40, %asi | |
12617 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
12618 | set 0x000e1fff, %g1 | |
12619 | stxa %g1, [%g0 + 0x80] %asi | |
12620 | wr %r12, %g0, %asi | |
12621 | st %g0, [%r23] | |
12622 | sma_1_33: | |
12623 | ta T_CHANGE_NONHPRIV | |
12624 | .word 0xe5e7e014 ! 48: CASA_R casa [%r31] %asi, %r20, %r18 | |
12625 | change_to_randtl_1_34: | |
12626 | ta T_CHANGE_PRIV ! macro | |
12627 | done_change_to_randtl_1_34: | |
12628 | .word 0x8f902000 ! 49: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
12629 | .word 0xe1bfd960 ! 50: STDFA_R stda %f16, [%r0, %r31] | |
12630 | pmu_1_35: | |
12631 | nop | |
12632 | setx 0xffffff59fffffe68, %g1, %g7 | |
12633 | .word 0xa3800007 ! 51: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
12634 | splash_cmpr_1_36: | |
12635 | mov 1, %r18 | |
12636 | sllx %r18, 63, %r18 | |
12637 | rd %tick, %r17 | |
12638 | add %r17, 0x60, %r17 | |
12639 | or %r17, %r18, %r17 | |
12640 | ta T_CHANGE_HPRIV | |
12641 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
12642 | ta T_CHANGE_PRIV | |
12643 | .word 0xb3800011 ! 52: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
12644 | nop | |
12645 | ta T_CHANGE_HPRIV ! macro | |
12646 | donret_1_37: | |
12647 | rd %pc, %r12 | |
12648 | add %r12, (donretarg_1_37-donret_1_37), %r12 | |
12649 | add %r12, 0x4, %r11 ! seq tnpc | |
12650 | wrpr %g0, 0x2, %tl | |
12651 | wrpr %g0, %r12, %tpc | |
12652 | wrpr %g0, %r11, %tnpc | |
12653 | set (0x0041db00 | (0x83 << 24)), %r13 | |
12654 | and %r12, 0xfff, %r14 | |
12655 | sllx %r14, 30, %r14 | |
12656 | or %r13, %r14, %r20 | |
12657 | wrpr %r20, %g0, %tstate | |
12658 | wrhpr %g0, 0x190d, %htstate | |
12659 | ta T_CHANGE_NONPRIV ! rand=0 (1) | |
12660 | done | |
12661 | donretarg_1_37: | |
12662 | .word 0xe4ffe0d2 ! 53: SWAPA_I swapa %r18, [%r31 + 0x00d2] %asi | |
12663 | .word 0xa1508000 ! 54: RDPR_TSTATE <illegal instruction> | |
12664 | brcommon1_1_38: | |
12665 | nop | |
12666 | setx common_target, %r12, %r27 | |
12667 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
12668 | ba,a .+12 | |
12669 | .word 0xc32fe110 ! 1: STXFSR_I st-sfr %f1, [0x0110, %r31] | |
12670 | ba,a .+8 | |
12671 | jmpl %r27+0, %r27 | |
12672 | .word 0x87a88a52 ! 55: FCMPd fcmpd %fcc<n>, %f2, %f18 | |
12673 | trapasi_1_39: | |
12674 | nop | |
12675 | mov 0x10, %r1 ! (VA for ASI 0x4c) | |
12676 | .word 0xd8c84980 ! 56: LDSBA_R ldsba [%r1, %r0] 0x4c, %r12 | |
12677 | nop | |
12678 | ta T_CHANGE_HPRIV | |
12679 | mov 0x1, %r10 | |
12680 | set sync_thr_counter6, %r23 | |
12681 | #ifndef SPC | |
12682 | ldxa [%g0]0x63, %o1 | |
12683 | and %o1, 0x38, %o1 | |
12684 | add %o1, %r23, %r23 | |
12685 | #endif | |
12686 | cas [%r23],%g0,%r10 !lock | |
12687 | brnz %r10, sma_1_40 | |
12688 | rd %asi, %r12 | |
12689 | wr %g0, 0x40, %asi | |
12690 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
12691 | set 0x00161fff, %g1 | |
12692 | stxa %g1, [%g0 + 0x80] %asi | |
12693 | wr %r12, %g0, %asi | |
12694 | st %g0, [%r23] | |
12695 | sma_1_40: | |
12696 | ta T_CHANGE_NONHPRIV | |
12697 | .word 0xd9e7e014 ! 57: CASA_R casa [%r31] %asi, %r20, %r12 | |
12698 | .word 0xc32fc000 ! 58: STXFSR_R st-sfr %f1, [%r0, %r31] | |
12699 | nop | |
12700 | ta T_CHANGE_HPRIV ! macro | |
12701 | donret_1_42: | |
12702 | rd %pc, %r12 | |
12703 | add %r12, (donretarg_1_42-donret_1_42+4), %r12 | |
12704 | add %r12, 0x4, %r11 ! seq tnpc | |
12705 | wrpr %g0, 0x2, %tl | |
12706 | wrpr %g0, %r12, %tpc | |
12707 | wrpr %g0, %r11, %tnpc | |
12708 | set (0x0050bb00 | (0x82 << 24)), %r13 | |
12709 | and %r12, 0xfff, %r14 | |
12710 | sllx %r14, 30, %r14 | |
12711 | or %r13, %r14, %r20 | |
12712 | wrpr %r20, %g0, %tstate | |
12713 | wrhpr %g0, 0x19bf, %htstate | |
12714 | ta T_CHANGE_NONHPRIV ! rand=1 (1) | |
12715 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> | |
12716 | retry | |
12717 | donretarg_1_42: | |
12718 | .word 0xd86fe137 ! 59: LDSTUB_I ldstub %r12, [%r31 + 0x0137] | |
12719 | .word 0x87ad0a47 ! 60: FCMPd fcmpd %fcc<n>, %f20, %f38 | |
12720 | splash_hpstate_1_44: | |
12721 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> | |
12722 | .word 0x819834e5 ! 61: WRHPR_HPSTATE_I wrhpr %r0, 0x14e5, %hpstate | |
12723 | nop | |
12724 | ta T_CHANGE_HPRIV ! macro | |
12725 | donret_1_45: | |
12726 | rd %pc, %r12 | |
12727 | add %r12, (donretarg_1_45-donret_1_45), %r12 | |
12728 | add %r12, 0x4, %r11 ! seq tnpc | |
12729 | wrpr %g0, 0x1, %tl | |
12730 | wrpr %g0, %r12, %tpc | |
12731 | wrpr %g0, %r11, %tnpc | |
12732 | set (0x00ac3400 | (28 << 24)), %r13 | |
12733 | and %r12, 0xfff, %r14 | |
12734 | sllx %r14, 30, %r14 | |
12735 | or %r13, %r14, %r20 | |
12736 | wrpr %r20, %g0, %tstate | |
12737 | wrhpr %g0, 0x150d, %htstate | |
12738 | ta T_CHANGE_NONHPRIV ! rand=1 (1) | |
12739 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> | |
12740 | done | |
12741 | donretarg_1_45: | |
12742 | .word 0x30800001 ! 62: BA ba,a <label_0x1> | |
12743 | .word 0xe0c7e100 ! 63: LDSWA_I ldswa [%r31, + 0x0100] %asi, %r16 | |
12744 | trapasi_1_46: | |
12745 | nop | |
12746 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
12747 | .word 0xe0904e60 ! 64: LDUHA_R lduha [%r1, %r0] 0x73, %r16 | |
12748 | jmptr_1_47: | |
12749 | nop | |
12750 | best_set_reg(0xe0200000, %r20, %r27) | |
12751 | .word 0xb7c6c000 ! 65: JMPL_R jmpl %r27 + %r0, %r27 | |
12752 | pmu_1_48: | |
12753 | nop | |
12754 | setx 0xfffff63effffffa7, %g1, %g7 | |
12755 | .word 0xa3800007 ! 66: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
12756 | ibp_1_49: | |
12757 | nop | |
12758 | .word 0xe03fe190 ! 67: STD_I std %r16, [%r31 + 0x0190] | |
12759 | fpinit_1_50: | |
12760 | nop | |
12761 | setx fp_data_quads, %r19, %r20 | |
12762 | ldd [%r20], %f0 | |
12763 | ldd [%r20+8], %f4 | |
12764 | ld [%r20+16], %fsr | |
12765 | ld [%r20+24], %r19 | |
12766 | wr %r19, %g0, %gsr | |
12767 | .word 0x8da009a4 ! 68: FDIVs fdivs %f0, %f4, %f6 | |
12768 | splash_tba_1_51: | |
12769 | nop | |
12770 | ta T_CHANGE_PRIV | |
12771 | setx 0x0000000000380000, %r11, %r12 | |
12772 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
12773 | nop | |
12774 | mov 0x80, %g3 | |
12775 | stxa %g3, [%g3] 0x5f | |
12776 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
12777 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
12778 | .word 0xe05fc000 ! 70: LDX_R ldx [%r31 + %r0], %r16 | |
12779 | .word 0xe0800c00 ! 71: LDUWA_R lduwa [%r0, %r0] 0x60, %r16 | |
12780 | .word 0xc3eac025 ! 72: PREFETCHA_R prefetcha [%r11, %r5] 0x01, #one_read | |
12781 | .word 0xd4800ba0 ! 73: LDUWA_R lduwa [%r0, %r0] 0x5d, %r10 | |
12782 | fpinit_1_53: | |
12783 | nop | |
12784 | setx fp_data_quads, %r19, %r20 | |
12785 | ldd [%r20], %f0 | |
12786 | ldd [%r20+8], %f4 | |
12787 | ld [%r20+16], %fsr | |
12788 | ld [%r20+24], %r19 | |
12789 | wr %r19, %g0, %gsr | |
12790 | .word 0x8da009c4 ! 74: FDIVd fdivd %f0, %f4, %f6 | |
12791 | nop | |
12792 | ta T_CHANGE_HPRIV | |
12793 | mov 0x1+1, %r10 | |
12794 | set sync_thr_counter5, %r23 | |
12795 | #ifndef SPC | |
12796 | ldxa [%g0]0x63, %o1 | |
12797 | and %o1, 0x38, %o1 | |
12798 | add %o1, %r23, %r23 | |
12799 | sllx %o1, 5, %o3 !(CID*256) | |
12800 | #endif | |
12801 | cas [%r23],%g0,%r10 !lock | |
12802 | brnz %r10, cwq_1_54 | |
12803 | rd %asi, %r12 | |
12804 | wr %g0, 0x40, %asi | |
12805 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
12806 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
12807 | cmp %l1, 1 | |
12808 | bne cwq_1_54 | |
12809 | set CWQ_BASE, %l6 | |
12810 | #ifndef SPC | |
12811 | add %l6, %o3, %l6 | |
12812 | #endif | |
12813 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
12814 | best_set_reg(0x20610020, %l1, %l2) !# Control Word | |
12815 | sllx %l2, 32, %l2 | |
12816 | stx %l2, [%l6 + 0x0] | |
12817 | membar #Sync | |
12818 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
12819 | sub %l2, 0x40, %l2 | |
12820 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
12821 | wr %r12, %g0, %asi | |
12822 | st %g0, [%r23] | |
12823 | cwq_1_54: | |
12824 | ta T_CHANGE_NONHPRIV | |
12825 | .word 0x97414000 ! 75: RDPC rd %pc, %r11 | |
12826 | .word 0x9194c011 ! 76: WRPR_PIL_R wrpr %r19, %r17, %pil | |
12827 | #if (defined SPC || defined CMP1) | |
12828 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_56) + 16, 16, 16)) -> intp(4,0,18) | |
12829 | #else | |
12830 | setx 0xe5383b1b5b8f62b4, %r1, %r28 | |
12831 | stxa %r28, [%g0] 0x73 | |
12832 | #endif | |
12833 | intvec_1_56: | |
12834 | .word 0x39400001 ! 77: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12835 | intveclr_1_57: | |
12836 | nop | |
12837 | ta T_CHANGE_HPRIV | |
12838 | setx 0x78963398d1041c06, %r1, %r28 | |
12839 | stxa %r28, [%g0] 0x72 | |
12840 | ta T_CHANGE_NONHPRIV | |
12841 | .word 0x25400001 ! 78: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12842 | .word 0xd6bfe1c0 ! 79: STDA_I stda %r11, [%r31 + 0x01c0] %asi | |
12843 | .word 0xd737c000 ! 80: STQF_R - %f11, [%r0, %r31] | |
12844 | ceter_1_58: | |
12845 | nop | |
12846 | ta T_CHANGE_HPRIV | |
12847 | mov 7, %r17 | |
12848 | sllx %r17, 60, %r17 | |
12849 | mov 0x18, %r16 | |
12850 | stxa %r17, [%r16]0x4c | |
12851 | ta T_CHANGE_NONHPRIV | |
12852 | .word 0x97410000 ! 81: RDTICK rd %tick, %r11 | |
12853 | brcommon3_1_59: | |
12854 | nop | |
12855 | setx common_target, %r12, %r27 | |
12856 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
12857 | ba,a .+12 | |
12858 | .word 0xd66fe130 ! 1: LDSTUB_I ldstub %r11, [%r31 + 0x0130] | |
12859 | ba,a .+8 | |
12860 | jmpl %r27+0, %r27 | |
12861 | .word 0xd6dfc031 ! 82: LDXA_R ldxa [%r31, %r17] 0x01, %r11 | |
12862 | .word 0xd6800bc0 ! 83: LDUWA_R lduwa [%r0, %r0] 0x5e, %r11 | |
12863 | jmptr_1_60: | |
12864 | nop | |
12865 | best_set_reg(0xe0200000, %r20, %r27) | |
12866 | .word 0xb7c6c000 ! 84: JMPL_R jmpl %r27 + %r0, %r27 | |
12867 | setx 0xecb470fa9d13d3d4, %r1, %r28 | |
12868 | stxa %r28, [%g0] 0x73 | |
12869 | intvec_1_61: | |
12870 | .word 0x39400001 ! 85: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12871 | nop | |
12872 | ta T_CHANGE_HPRIV | |
12873 | mov 0x1+1, %r10 | |
12874 | set sync_thr_counter5, %r23 | |
12875 | #ifndef SPC | |
12876 | ldxa [%g0]0x63, %o1 | |
12877 | and %o1, 0x38, %o1 | |
12878 | add %o1, %r23, %r23 | |
12879 | sllx %o1, 5, %o3 !(CID*256) | |
12880 | #endif | |
12881 | cas [%r23],%g0,%r10 !lock | |
12882 | brnz %r10, cwq_1_62 | |
12883 | rd %asi, %r12 | |
12884 | wr %g0, 0x40, %asi | |
12885 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
12886 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
12887 | cmp %l1, 1 | |
12888 | bne cwq_1_62 | |
12889 | set CWQ_BASE, %l6 | |
12890 | #ifndef SPC | |
12891 | add %l6, %o3, %l6 | |
12892 | #endif | |
12893 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
12894 | best_set_reg(0x20610040, %l1, %l2) !# Control Word | |
12895 | sllx %l2, 32, %l2 | |
12896 | stx %l2, [%l6 + 0x0] | |
12897 | membar #Sync | |
12898 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
12899 | sub %l2, 0x40, %l2 | |
12900 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
12901 | wr %r12, %g0, %asi | |
12902 | st %g0, [%r23] | |
12903 | cwq_1_62: | |
12904 | ta T_CHANGE_NONHPRIV | |
12905 | .word 0xa3414000 ! 86: RDPC rd %pc, %r17 | |
12906 | .word 0xe28008a0 ! 87: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
12907 | ibp_1_63: | |
12908 | nop | |
12909 | .word 0xe19fe080 ! 88: LDDFA_I ldda [%r31, 0x0080], %f16 | |
12910 | ibp_1_64: | |
12911 | nop | |
12912 | ta T_CHANGE_NONHPRIV | |
12913 | .word 0xe3e7e012 ! 89: CASA_R casa [%r31] %asi, %r18, %r17 | |
12914 | jmptr_1_65: | |
12915 | nop | |
12916 | best_set_reg(0xe0200000, %r20, %r27) | |
12917 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
12918 | .word 0xe22fe12d ! 91: STB_I stb %r17, [%r31 + 0x012d] | |
12919 | .word 0xc19fda00 ! 92: LDDFA_R ldda [%r31, %r0], %f0 | |
12920 | .word 0x89800011 ! 93: WRTICK_R wr %r0, %r17, %tick | |
12921 | .word 0xe3e7c029 ! 94: CASA_I casa [%r31] 0x 1, %r9, %r17 | |
12922 | setx 0x56cdfc7141f28ee1, %r1, %r28 | |
12923 | stxa %r28, [%g0] 0x73 | |
12924 | intvec_1_67: | |
12925 | .word 0x39400001 ! 95: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12926 | nop | |
12927 | mov 0x80, %g3 | |
12928 | stxa %g3, [%g3] 0x57 | |
12929 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
12930 | .word 0xe25fc000 ! 96: LDX_R ldx [%r31 + %r0], %r17 | |
12931 | mondo_1_68: | |
12932 | nop | |
12933 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
12934 | ta T_CHANGE_PRIV | |
12935 | stxa %r20, [%r0+0x3c0] %asi | |
12936 | .word 0x9d94c013 ! 97: WRPR_WSTATE_R wrpr %r19, %r19, %wstate | |
12937 | fpinit_1_69: | |
12938 | nop | |
12939 | setx fp_data_quads, %r19, %r20 | |
12940 | ldd [%r20], %f0 | |
12941 | ldd [%r20+8], %f4 | |
12942 | ld [%r20+16], %fsr | |
12943 | ld [%r20+24], %r19 | |
12944 | wr %r19, %g0, %gsr | |
12945 | .word 0x91b00484 ! 98: FCMPLE32 fcmple32 %d0, %d4, %r8 | |
12946 | .word 0xa190200a ! 99: WRPR_GL_I wrpr %r0, 0x000a, %- | |
12947 | mondo_1_70: | |
12948 | nop | |
12949 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
12950 | ta T_CHANGE_PRIV | |
12951 | stxa %r7, [%r0+0x3e8] %asi | |
12952 | .word 0x9d934004 ! 100: WRPR_WSTATE_R wrpr %r13, %r4, %wstate | |
12953 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
12954 | reduce_priv_lvl_1_71: | |
12955 | ta T_CHANGE_NONHPRIV ! macro | |
12956 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
12957 | .word 0x8d802000 ! 103: WRFPRS_I wr %r0, 0x0000, %fprs | |
12958 | splash_hpstate_1_73: | |
12959 | ta T_CHANGE_NONHPRIV | |
12960 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> | |
12961 | .word 0x81982c48 ! 104: WRHPR_HPSTATE_I wrhpr %r0, 0x0c48, %hpstate | |
12962 | splash_hpstate_1_74: | |
12963 | ta T_CHANGE_NONHPRIV | |
12964 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> | |
12965 | .word 0x81983a5e ! 105: WRHPR_HPSTATE_I wrhpr %r0, 0x1a5e, %hpstate | |
12966 | .word 0x9194400d ! 106: WRPR_PIL_R wrpr %r17, %r13, %pil | |
12967 | trapasi_1_76: | |
12968 | nop | |
12969 | mov 0x20, %r1 ! (VA for ASI 0x5a) | |
12970 | .word 0xe2c04b40 ! 107: LDSWA_R ldswa [%r1, %r0] 0x5a, %r17 | |
12971 | mondo_1_77: | |
12972 | nop | |
12973 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
12974 | stxa %r2, [%r0+0x3d8] %asi | |
12975 | .word 0x9d920013 ! 108: WRPR_WSTATE_R wrpr %r8, %r19, %wstate | |
12976 | dvapa_1_78: | |
12977 | nop | |
12978 | ta T_CHANGE_HPRIV | |
12979 | mov 0xe66, %r20 | |
12980 | mov 0x5, %r19 | |
12981 | sllx %r20, 23, %r20 | |
12982 | or %r19, %r20, %r19 | |
12983 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
12984 | mov 0x38, %r18 | |
12985 | stxa %r31, [%r18]0x58 | |
12986 | ta T_CHANGE_NONHPRIV | |
12987 | .word 0x9f80390a ! 109: SIR sir 0x190a | |
12988 | .word 0xe727c000 ! 110: STF_R st %f19, [%r0, %r31] | |
12989 | ibp_1_79: | |
12990 | nop | |
12991 | ta T_CHANGE_NONHPRIV | |
12992 | .word 0xe6bfc034 ! 111: STDA_R stda %r19, [%r31 + %r20] 0x01 | |
12993 | splash_lsu_1_80: | |
12994 | nop | |
12995 | ta T_CHANGE_HPRIV | |
12996 | set 0xfc4d8d8e, %r2 | |
12997 | mov 0x5, %r1 | |
12998 | sllx %r1, 32, %r1 | |
12999 | or %r1, %r2, %r2 | |
13000 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
13001 | .word 0x3d400001 ! 112: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
13002 | jmptr_1_81: | |
13003 | nop | |
13004 | best_set_reg(0xe0200000, %r20, %r27) | |
13005 | .word 0xb7c6c000 ! 113: JMPL_R jmpl %r27 + %r0, %r27 | |
13006 | intveclr_1_82: | |
13007 | nop | |
13008 | ta T_CHANGE_HPRIV | |
13009 | setx 0xe53e97973e365605, %r1, %r28 | |
13010 | stxa %r28, [%g0] 0x72 | |
13011 | ta T_CHANGE_NONHPRIV | |
13012 | .word 0x25400001 ! 114: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
13013 | intveclr_1_83: | |
13014 | nop | |
13015 | ta T_CHANGE_HPRIV | |
13016 | setx 0x86a131d9e3f904a6, %r1, %r28 | |
13017 | stxa %r28, [%g0] 0x72 | |
13018 | .word 0x25400001 ! 115: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
13019 | .word 0xa1902002 ! 116: WRPR_GL_I wrpr %r0, 0x0002, %- | |
13020 | nop | |
13021 | ta T_CHANGE_HPRIV | |
13022 | mov 0x1+1, %r10 | |
13023 | set sync_thr_counter5, %r23 | |
13024 | #ifndef SPC | |
13025 | ldxa [%g0]0x63, %o1 | |
13026 | and %o1, 0x38, %o1 | |
13027 | add %o1, %r23, %r23 | |
13028 | sllx %o1, 5, %o3 !(CID*256) | |
13029 | #endif | |
13030 | cas [%r23],%g0,%r10 !lock | |
13031 | brnz %r10, cwq_1_84 | |
13032 | rd %asi, %r12 | |
13033 | wr %g0, 0x40, %asi | |
13034 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
13035 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
13036 | cmp %l1, 1 | |
13037 | bne cwq_1_84 | |
13038 | set CWQ_BASE, %l6 | |
13039 | #ifndef SPC | |
13040 | add %l6, %o3, %l6 | |
13041 | #endif | |
13042 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
13043 | best_set_reg(0x20610000, %l1, %l2) !# Control Word | |
13044 | sllx %l2, 32, %l2 | |
13045 | stx %l2, [%l6 + 0x0] | |
13046 | membar #Sync | |
13047 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
13048 | sub %l2, 0x40, %l2 | |
13049 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
13050 | wr %r12, %g0, %asi | |
13051 | st %g0, [%r23] | |
13052 | cwq_1_84: | |
13053 | ta T_CHANGE_NONHPRIV | |
13054 | .word 0x93414000 ! 117: RDPC rd %pc, %r9 | |
13055 | fpinit_1_85: | |
13056 | nop | |
13057 | setx fp_data_quads, %r19, %r20 | |
13058 | ldd [%r20], %f0 | |
13059 | ldd [%r20+8], %f4 | |
13060 | ld [%r20+16], %fsr | |
13061 | ld [%r20+24], %r19 | |
13062 | wr %r19, %g0, %gsr | |
13063 | .word 0x87a80a44 ! 118: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
13064 | ibp_1_86: | |
13065 | nop | |
13066 | .word 0xd23fe050 ! 119: STD_I std %r9, [%r31 + 0x0050] | |
13067 | setx 0xbe1366211319f2fd, %r1, %r28 | |
13068 | stxa %r28, [%g0] 0x73 | |
13069 | intvec_1_87: | |
13070 | .word 0x39400001 ! 120: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
13071 | #if (defined SPC || defined CMP1) | |
13072 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_88) + 40, 16, 16)) -> intp(2,0,9) | |
13073 | #else | |
13074 | setx 0x1e1d76113ed1f2ca, %r1, %r28 | |
13075 | stxa %r28, [%g0] 0x73 | |
13076 | #endif | |
13077 | intvec_1_88: | |
13078 | .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
13079 | .word 0x89800011 ! 122: WRTICK_R wr %r0, %r17, %tick | |
13080 | .word 0x91a509d3 ! 123: FDIVd fdivd %f20, %f50, %f8 | |
13081 | mondo_1_91: | |
13082 | nop | |
13083 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
13084 | stxa %r16, [%r0+0x3d0] %asi | |
13085 | .word 0x9d94c014 ! 124: WRPR_WSTATE_R wrpr %r19, %r20, %wstate | |
13086 | .word 0x8d802000 ! 125: WRFPRS_I wr %r0, 0x0000, %fprs | |
13087 | ibp_1_92: | |
13088 | nop | |
13089 | ta T_CHANGE_NONHPRIV | |
13090 | .word 0x87acca43 ! 126: FCMPd fcmpd %fcc<n>, %f50, %f34 | |
13091 | .word 0x8d802004 ! 127: WRFPRS_I wr %r0, 0x0004, %fprs | |
13092 | .word 0x8d802004 ! 128: WRFPRS_I wr %r0, 0x0004, %fprs | |
13093 | .word 0x95a209b3 ! 129: FDIVs fdivs %f8, %f19, %f10 | |
13094 | invalw | |
13095 | mov 0xb0, %r30 | |
13096 | .word 0x91d0001e ! 130: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
13097 | fpinit_1_94: | |
13098 | nop | |
13099 | setx fp_data_quads, %r19, %r20 | |
13100 | ldd [%r20], %f0 | |
13101 | ldd [%r20+8], %f4 | |
13102 | ld [%r20+16], %fsr | |
13103 | ld [%r20+24], %r19 | |
13104 | wr %r19, %g0, %gsr | |
13105 | .word 0xc3e821f5 ! 131: PREFETCHA_I prefetcha [%r0, + 0x01f5] %asi, #one_read | |
13106 | intveclr_1_95: | |
13107 | nop | |
13108 | ta T_CHANGE_HPRIV | |
13109 | setx 0xaa831cc36299870f, %r1, %r28 | |
13110 | stxa %r28, [%g0] 0x72 | |
13111 | ta T_CHANGE_NONHPRIV | |
13112 | .word 0x25400001 ! 132: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
13113 | intveclr_1_96: | |
13114 | nop | |
13115 | ta T_CHANGE_HPRIV | |
13116 | setx 0x18248dded07258ef, %r1, %r28 | |
13117 | stxa %r28, [%g0] 0x72 | |
13118 | .word 0x25400001 ! 133: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
13119 | setx 0x65af5419e612beaf, %r1, %r28 | |
13120 | stxa %r28, [%g0] 0x73 | |
13121 | intvec_1_97: | |
13122 | .word 0x39400001 ! 134: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
13123 | .word 0x91940010 ! 135: WRPR_PIL_R wrpr %r16, %r16, %pil | |
13124 | .word 0x91a00173 ! 136: FABSq dis not found | |
13125 | ||
13126 | mondo_1_100: | |
13127 | nop | |
13128 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
13129 | ta T_CHANGE_PRIV | |
13130 | stxa %r3, [%r0+0x3d8] %asi | |
13131 | .word 0x9d91000c ! 137: WRPR_WSTATE_R wrpr %r4, %r12, %wstate | |
13132 | splash_cmpr_1_101: | |
13133 | mov 0, %r18 | |
13134 | sllx %r18, 63, %r18 | |
13135 | rd %tick, %r17 | |
13136 | add %r17, 0x60, %r17 | |
13137 | or %r17, %r18, %r17 | |
13138 | ta T_CHANGE_PRIV | |
13139 | .word 0xaf800011 ! 138: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
13140 | .word 0xc32fc000 ! 139: STXFSR_R st-sfr %f1, [%r0, %r31] | |
13141 | intveclr_1_103: | |
13142 | nop | |
13143 | ta T_CHANGE_HPRIV | |
13144 | setx 0x10a61606d364af52, %r1, %r28 | |
13145 | stxa %r28, [%g0] 0x72 | |
13146 | .word 0x25400001 ! 140: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
13147 | .word 0xa780e499 ! 141: WR_GRAPHICS_STATUS_REG_I wr %r3, 0x0499, %- | |
13148 | .word 0x91d020b3 ! 142: Tcc_I ta icc_or_xcc, %r0 + 179 | |
13149 | .word 0xa9a0016c ! 143: FABSq dis not found | |
13150 | ||
13151 | splash_cmpr_1_105: | |
13152 | mov 0, %r18 | |
13153 | sllx %r18, 63, %r18 | |
13154 | rd %tick, %r17 | |
13155 | add %r17, 0x60, %r17 | |
13156 | or %r17, %r18, %r17 | |
13157 | .word 0xb3800011 ! 144: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
13158 | cwp_1_106: | |
13159 | set user_data_start, %o7 | |
13160 | .word 0x93902007 ! 145: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
13161 | mondo_1_107: | |
13162 | nop | |
13163 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
13164 | ta T_CHANGE_PRIV | |
13165 | stxa %r17, [%r0+0x3e8] %asi | |
13166 | .word 0x9d92000a ! 146: WRPR_WSTATE_R wrpr %r8, %r10, %wstate | |
13167 | brcommon3_1_108: | |
13168 | nop | |
13169 | setx common_target, %r12, %r27 | |
13170 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
13171 | ba,a .+12 | |
13172 | .word 0xe86fe110 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0110] | |
13173 | ba,a .+8 | |
13174 | jmpl %r27+0, %r27 | |
13175 | .word 0xe83fe100 ! 147: STD_I std %r20, [%r31 + 0x0100] | |
13176 | ibp_1_109: | |
13177 | nop | |
13178 | .word 0x95a509b1 ! 148: FDIVs fdivs %f20, %f17, %f10 | |
13179 | trapasi_1_110: | |
13180 | nop | |
13181 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
13182 | .word 0xd4c04a00 ! 149: LDSWA_R ldswa [%r1, %r0] 0x50, %r10 | |
13183 | setx 0xe80d12028348b6fb, %r1, %r28 | |
13184 | stxa %r28, [%g0] 0x73 | |
13185 | intvec_1_111: | |
13186 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
13187 | splash_cmpr_1_112: | |
13188 | mov 0, %r18 | |
13189 | sllx %r18, 63, %r18 | |
13190 | rd %tick, %r17 | |
13191 | add %r17, 0x60, %r17 | |
13192 | or %r17, %r18, %r17 | |
13193 | ta T_CHANGE_PRIV | |
13194 | .word 0xaf800011 ! 151: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
13195 | splash_lsu_1_113: | |
13196 | nop | |
13197 | ta T_CHANGE_HPRIV | |
13198 | set 0x63e38e5c, %r2 | |
13199 | mov 0x7, %r1 | |
13200 | sllx %r1, 32, %r1 | |
13201 | or %r1, %r2, %r2 | |
13202 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
13203 | .word 0x3d400001 ! 152: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
13204 | .word 0x81510000 ! 153: RDPR_TICK rdpr %tick, %r0 | |
13205 | splash_lsu_1_114: | |
13206 | nop | |
13207 | ta T_CHANGE_HPRIV | |
13208 | set 0x2a265a05, %r2 | |
13209 | mov 0x4, %r1 | |
13210 | sllx %r1, 32, %r1 | |
13211 | or %r1, %r2, %r2 | |
13212 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
13213 | .word 0x3d400001 ! 154: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
13214 | pmu_1_115: | |
13215 | nop | |
13216 | setx 0xfffff0f6fffff260, %g1, %g7 | |
13217 | .word 0xa3800007 ! 155: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
13218 | #if (defined SPC || defined CMP1) | |
13219 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_116) + 32, 16, 16)) -> intp(7,0,28) | |
13220 | #else | |
13221 | setx 0xe06488c6015a8d22, %r1, %r28 | |
13222 | stxa %r28, [%g0] 0x73 | |
13223 | #endif | |
13224 | intvec_1_116: | |
13225 | .word 0x39400001 ! 156: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
13226 | .word 0xa984800b ! 157: WR_SET_SOFTINT_R wr %r18, %r11, %set_softint | |
13227 | .word 0xa9703389 ! 158: POPC_I popc 0x1389, %r20 | |
13228 | .word 0x91b24591 ! 159: FCMPGT32 fcmpgt32 %d40, %d48, %r8 | |
13229 | ta T_CHANGE_NONHPRIV | |
13230 | .word 0x8143e011 ! 160: MEMBAR membar #LoadLoad | #Lookaside | |
13231 | splash_hpstate_1_119: | |
13232 | ta T_CHANGE_NONHPRIV | |
13233 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> | |
13234 | .word 0x81982647 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x0647, %hpstate | |
13235 | .word 0x8d9035eb ! 162: WRPR_PSTATE_I wrpr %r0, 0x15eb, %pstate | |
13236 | otherw | |
13237 | mov 0x30, %r30 | |
13238 | .word 0x91d0001e ! 163: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
13239 | .word 0xe19fd960 ! 164: LDDFA_R ldda [%r31, %r0], %f16 | |
13240 | setx 0x603d4a5673d0a5fe, %r1, %r28 | |
13241 | stxa %r28, [%g0] 0x73 | |
13242 | intvec_1_121: | |
13243 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
13244 | ibp_1_122: | |
13245 | nop | |
13246 | .word 0xe1bfdb60 ! 166: STDFA_R stda %f16, [%r0, %r31] | |
13247 | splash_lsu_1_123: | |
13248 | nop | |
13249 | ta T_CHANGE_HPRIV | |
13250 | set 0x05380d76, %r2 | |
13251 | mov 0x6, %r1 | |
13252 | sllx %r1, 32, %r1 | |
13253 | or %r1, %r2, %r2 | |
13254 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
13255 | ta T_CHANGE_NONHPRIV | |
13256 | .word 0x3d400001 ! 167: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
13257 | nop | |
13258 | mov 0x80, %g3 | |
13259 | stxa %g3, [%g3] 0x57 | |
13260 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
13261 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
13262 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
13263 | .word 0xd05fc000 ! 168: LDX_R ldx [%r31 + %r0], %r8 | |
13264 | jmptr_1_124: | |
13265 | nop | |
13266 | best_set_reg(0xe0200000, %r20, %r27) | |
13267 | .word 0xb7c6c000 ! 169: JMPL_R jmpl %r27 + %r0, %r27 | |
13268 | nop | |
13269 | ta T_CHANGE_HPRIV ! macro | |
13270 | donret_1_125: | |
13271 | rd %pc, %r12 | |
13272 | add %r12, (donretarg_1_125-donret_1_125), %r12 | |
13273 | add %r12, 0x8, %r11 ! nonseq tnpc | |
13274 | wrpr %g0, 0x2, %tl | |
13275 | wrpr %g0, %r12, %tpc | |
13276 | wrpr %g0, %r11, %tnpc | |
13277 | set (0x00029400 | (0x4f << 24)), %r13 | |
13278 | and %r12, 0xfff, %r14 | |
13279 | sllx %r14, 30, %r14 | |
13280 | or %r13, %r14, %r20 | |
13281 | wrpr %r20, %g0, %tstate | |
13282 | wrhpr %g0, 0x79c, %htstate | |
13283 | ta T_CHANGE_NONHPRIV ! rand=1 (1) | |
13284 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> | |
13285 | done | |
13286 | donretarg_1_125: | |
13287 | .word 0x20800001 ! 170: BN bn,a <label_0x1> | |
13288 | .word 0xc1bfdb60 ! 171: STDFA_R stda %f0, [%r0, %r31] | |
13289 | trapasi_1_127: | |
13290 | nop | |
13291 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
13292 | .word 0xd0d04e60 ! 172: LDSHA_R ldsha [%r1, %r0] 0x73, %r8 | |
13293 | .word 0x89800011 ! 173: WRTICK_R wr %r0, %r17, %tick | |
13294 | fpinit_1_129: | |
13295 | nop | |
13296 | setx fp_data_quads, %r19, %r20 | |
13297 | ldd [%r20], %f0 | |
13298 | ldd [%r20+8], %f4 | |
13299 | ld [%r20+16], %fsr | |
13300 | ld [%r20+24], %r19 | |
13301 | wr %r19, %g0, %gsr | |
13302 | .word 0xc3e83389 ! 174: PREFETCHA_I prefetcha [%r0, + 0xfffff389] %asi, #one_read | |
13303 | .word 0x89800011 ! 175: WRTICK_R wr %r0, %r17, %tick | |
13304 | .word 0xd127e13c ! 176: STF_I st %f8, [0x013c, %r31] | |
13305 | .word 0x89800011 ! 177: WRTICK_R wr %r0, %r17, %tick | |
13306 | .word 0xd077e020 ! 178: STX_I stx %r8, [%r31 + 0x0020] | |
13307 | #if (defined SPC || defined CMP1) | |
13308 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_132) + 24, 16, 16)) -> intp(5,0,28) | |
13309 | #else | |
13310 | setx 0x2eb71e3a4b1aedd4, %r1, %r28 | |
13311 | stxa %r28, [%g0] 0x73 | |
13312 | #endif | |
13313 | intvec_1_132: | |
13314 | .word 0x39400001 ! 179: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
13315 | .word 0x87802016 ! 180: WRASI_I wr %r0, 0x0016, %asi | |
13316 | setx 0xbaee2abb4b2108cd, %r1, %r28 | |
13317 | stxa %r28, [%g0] 0x73 | |
13318 | intvec_1_133: | |
13319 | .word 0x39400001 ! 181: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
13320 | .word 0xd037e1c2 ! 182: STH_I sth %r8, [%r31 + 0x01c2] | |
13321 | .word 0xd1e7e012 ! 183: CASA_R casa [%r31] %asi, %r18, %r8 | |
13322 | br_badelay2_1_135: | |
13323 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
13324 | allclean | |
13325 | .word 0xa3b2830c ! 184: ALIGNADDRESS alignaddr %r10, %r12, %r17 | |
13326 | splash_tba_1_136: | |
13327 | nop | |
13328 | ta T_CHANGE_PRIV | |
13329 | set 0x120000, %r12 | |
13330 | .word 0x8b90000c ! 185: WRPR_TBA_R wrpr %r0, %r12, %tba | |
13331 | trapasi_1_137: | |
13332 | nop | |
13333 | mov 0x38, %r1 ! (VA for ASI 0x50) | |
13334 | .word 0xe2c04a00 ! 186: LDSWA_R ldswa [%r1, %r0] 0x50, %r17 | |
13335 | ceter_1_138: | |
13336 | nop | |
13337 | ta T_CHANGE_HPRIV | |
13338 | mov 3, %r17 | |
13339 | sllx %r17, 60, %r17 | |
13340 | mov 0x18, %r16 | |
13341 | stxa %r17, [%r16]0x4c | |
13342 | ta T_CHANGE_NONHPRIV | |
13343 | .word 0xa9410000 ! 187: RDTICK rd %tick, %r20 | |
13344 | intveclr_1_139: | |
13345 | nop | |
13346 | ta T_CHANGE_HPRIV | |
13347 | setx 0xa276110d620065d8, %r1, %r28 | |
13348 | stxa %r28, [%g0] 0x72 | |
13349 | .word 0x25400001 ! 188: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
13350 | brcommon2_1_140: | |
13351 | nop | |
13352 | setx common_target, %r12, %r27 | |
13353 | ba,a .+12 | |
13354 | .word 0xc36fe0b0 ! 1: PREFETCH_I prefetch [%r31 + 0x00b0], #one_read | |
13355 | ba,a .+8 | |
13356 | jmpl %r27+0, %r27 | |
13357 | .word 0xc19fd920 ! 189: LDDFA_R ldda [%r31, %r0], %f0 | |
13358 | trapasi_1_141: | |
13359 | nop | |
13360 | mov 0x20, %r1 ! (VA for ASI 0x5a) | |
13361 | .word 0xe6d84b40 ! 190: LDXA_R ldxa [%r1, %r0] 0x5a, %r19 | |
13362 | ibp_1_142: | |
13363 | nop | |
13364 | .word 0x97a4c9b1 ! 191: FDIVs fdivs %f19, %f17, %f11 | |
13365 | .word 0xd737e0c4 ! 192: STQF_I - %f11, [0x00c4, %r31] | |
13366 | splash_cmpr_1_143: | |
13367 | mov 0, %r18 | |
13368 | sllx %r18, 63, %r18 | |
13369 | rd %tick, %r17 | |
13370 | add %r17, 0x100, %r17 | |
13371 | or %r17, %r18, %r17 | |
13372 | ta T_CHANGE_HPRIV | |
13373 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
13374 | .word 0xb3800011 ! 193: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
13375 | tagged_1_144: | |
13376 | tsubcctv %r18, 0x13b4, %r20 | |
13377 | .word 0xd607e179 ! 194: LDUW_I lduw [%r31 + 0x0179], %r11 | |
13378 | .word 0x94ac0011 ! 195: ANDNcc_R andncc %r16, %r17, %r10 | |
13379 | .word 0xd4bfc020 ! 196: STDA_R stda %r10, [%r31 + %r0] 0x01 | |
13380 | intveclr_1_145: | |
13381 | nop | |
13382 | ta T_CHANGE_HPRIV | |
13383 | setx 0xb5948b680b28adbd, %r1, %r28 | |
13384 | stxa %r28, [%g0] 0x72 | |
13385 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
13386 | dvapa_1_146: | |
13387 | nop | |
13388 | ta T_CHANGE_HPRIV | |
13389 | mov 0xdd2, %r20 | |
13390 | mov 0x13, %r19 | |
13391 | sllx %r20, 23, %r20 | |
13392 | or %r19, %r20, %r19 | |
13393 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
13394 | mov 0x38, %r18 | |
13395 | stxa %r31, [%r18]0x58 | |
13396 | ta T_CHANGE_NONHPRIV | |
13397 | .word 0x99a4c9a2 ! 198: FDIVs fdivs %f19, %f2, %f12 | |
13398 | ibp_1_147: | |
13399 | nop | |
13400 | ta T_CHANGE_NONHPRIV | |
13401 | .word 0xd8dfc034 ! 199: LDXA_R ldxa [%r31, %r20] 0x01, %r12 | |
13402 | .word 0x89800011 ! 200: WRTICK_R wr %r0, %r17, %tick | |
13403 | jmptr_1_149: | |
13404 | nop | |
13405 | best_set_reg(0xe0200000, %r20, %r27) | |
13406 | .word 0xb7c6c000 ! 201: JMPL_R jmpl %r27 + %r0, %r27 | |
13407 | nop | |
13408 | nop | |
13409 | ta T_CHANGE_PRIV | |
13410 | wrpr %g0, %g0, %gl | |
13411 | nop | |
13412 | nop | |
13413 | ||
13414 | join_lbl_0_0: | |
13415 | SECTION .MAIN | |
13416 | .text | |
13417 | diag_finish: | |
13418 | nop | |
13419 | nop | |
13420 | nop | |
13421 | ta T_CHANGE_HPRIV | |
13422 | best_set_reg(HV_TRAP_BASE_PA, %r1, %r2) | |
13423 | wrhpr %g2, %g0, %htba | |
13424 | ta T_GOOD_TRAP | |
13425 | nop | |
13426 | nop | |
13427 | nop | |
13428 | .data | |
13429 | .xword 0x0 | |
13430 | ! fp data rs1, rs2, fsr, gsr quads .. | |
13431 | .global fp_data_quads | |
13432 | fp_data_quads: | |
13433 | .xword 0x0044000000000000 | |
13434 | .xword 0x4028000000000000 | |
13435 | .xword 0x0fc0400400000000 | |
13436 | .xword 0x0000000000000000 | |
13437 | .xword 0x0041000000000000 | |
13438 | .xword 0x4022000000000000 | |
13439 | .xword 0x0600800000000000 | |
13440 | .xword 0x0000000000000000 | |
13441 | .xword 0x0220000000000000 | |
13442 | .xword 0x4140000000000000 | |
13443 | .xword 0x4fc0400400000000 | |
13444 | .xword 0x0000000000000000 | |
13445 | .xword 0x4090000000000000 | |
13446 | .xword 0x0090000000000000 | |
13447 | .xword 0x0f80400800000000 | |
13448 | .xword 0x0a00000000000000 | |
13449 | .align 128 | |
13450 | .global user_data_start | |
13451 | .data | |
13452 | user_data_start: | |
13453 | ||
13454 | .xword 0xdac509ef556d457e | |
13455 | .xword 0x31cb8de032a5a2c9 | |
13456 | .xword 0xc19eacb85f3079ce | |
13457 | .xword 0xb059b3252b1d30c4 | |
13458 | .xword 0x3a0d6b47fba8e2b7 | |
13459 | .xword 0x19e6710f72de70c5 | |
13460 | .xword 0x0c4b41af490cd716 | |
13461 | .xword 0x819eb8f859893f5a | |
13462 | .xword 0xe5599b7717b1b4d8 | |
13463 | .xword 0xd10a81f889cacf6c | |
13464 | .xword 0xce8906021275795d | |
13465 | .xword 0x7feca4e426f3ceb9 | |
13466 | .xword 0x40695a194bf44a23 | |
13467 | .xword 0x10d3b845c2938249 | |
13468 | .xword 0x04192b96095341dc | |
13469 | .xword 0xe9a3cb084cb9d8f1 | |
13470 | .xword 0xc8d4624fbeeb5ab2 | |
13471 | .xword 0x6d52d1737977a7b3 | |
13472 | .xword 0x3c778a397b926073 | |
13473 | .xword 0x34b73be7d6b69aa4 | |
13474 | .xword 0xc113488d6940ad0a | |
13475 | .xword 0xb8ddec3b3a386f3e | |
13476 | .xword 0xb89c4ff25183fefe | |
13477 | .xword 0xcbb8749b93559108 | |
13478 | .xword 0x822d47954274550e | |
13479 | .xword 0x5b1cb1e71886a734 | |
13480 | .xword 0xa7f307fb7c3a538a | |
13481 | .xword 0x8a0866fb286df290 | |
13482 | .xword 0xdef36f5b241e0d48 | |
13483 | .xword 0x4be7808b83d223f4 | |
13484 | .xword 0xba7b3eb60591e494 | |
13485 | .xword 0xd5700b6db4e12274 | |
13486 | .xword 0xbc133158d544309e | |
13487 | .xword 0xcfabcf1e76c52129 | |
13488 | .xword 0xfd89c860765d3db1 | |
13489 | .xword 0x05c195a9d6d10142 | |
13490 | .xword 0x77cb7e3d0e72563d | |
13491 | .xword 0x8603d06de17e0fd0 | |
13492 | .xword 0x659f2b374da986e9 | |
13493 | .xword 0x42dc45a93191b7b8 | |
13494 | .xword 0x8ee3b369a09a0eb6 | |
13495 | .xword 0x4475c709a1e05e5a | |
13496 | .xword 0xb33d4224bba76611 | |
13497 | .xword 0x285985ebbd35cafe | |
13498 | .xword 0x38ac03406fcb3442 | |
13499 | .xword 0x9117a6347c4e78ac | |
13500 | .xword 0xad3f43162ce20f4b | |
13501 | .xword 0x064c8f2e50cec4d2 | |
13502 | .xword 0x799157b58ffe8937 | |
13503 | .xword 0x3b99575dda1c87a8 | |
13504 | .xword 0xc33f24c698e9f221 | |
13505 | .xword 0x691f4e4a92bb952f | |
13506 | .xword 0xfa8e4caf6a00832b | |
13507 | .xword 0x54ce435b6873703a | |
13508 | .xword 0x4a4762705f3e5581 | |
13509 | .xword 0x4c2697b2c963f2f1 | |
13510 | .xword 0x2efd2500178df9b8 | |
13511 | .xword 0x42483e04d9cdbb36 | |
13512 | .xword 0x49bd9d6ddcfe1372 | |
13513 | .xword 0xc267cd78eb9fb5d0 | |
13514 | .xword 0x2cba490ea0083d30 | |
13515 | .xword 0x4f996db2c5ca6276 | |
13516 | .xword 0x008802f46228f28e | |
13517 | .xword 0xc6f7324ee5e08d49 | |
13518 | .xword 0x7782ee2ab541a5b1 | |
13519 | .xword 0xb9d51512eb8fb99a | |
13520 | .xword 0x53d38ffa6f95268d | |
13521 | .xword 0x85f8129a865050a4 | |
13522 | .xword 0xfc26c56933bb63d6 | |
13523 | .xword 0x58f0d475014b21ca | |
13524 | .xword 0x6f88eb90e322bbac | |
13525 | .xword 0x803bb5ec79562cd7 | |
13526 | .xword 0x9dc5d15687e51e72 | |
13527 | .xword 0x903d5ef43522edcb | |
13528 | .xword 0x05d22357b5ded22a | |
13529 | .xword 0x86bb5d040b51c7b4 | |
13530 | .xword 0x3819c767e2af8060 | |
13531 | .xword 0x07720246e4c6c917 | |
13532 | .xword 0xcc1d7d045d0b39b2 | |
13533 | .xword 0x40d2a1b96fdca589 | |
13534 | .xword 0x6cdaa264929d484a | |
13535 | .xword 0xb7e245006bb7a216 | |
13536 | .xword 0x90990e7b96c9a4b6 | |
13537 | .xword 0x97aa070f8028c67b | |
13538 | .xword 0x7de77861888780fc | |
13539 | .xword 0xdf83c63e6cd56d38 | |
13540 | .xword 0xe8e818aca03b39e5 | |
13541 | .xword 0x916f891f79d3f31d | |
13542 | .xword 0x389081bb82bb606b | |
13543 | .xword 0xa662a8231c670fcb | |
13544 | .xword 0x7290ecea1b27bb36 | |
13545 | .xword 0x529fa5d9156e8153 | |
13546 | .xword 0x28d992bf6d09776e | |
13547 | .xword 0x9164ffc307e81c98 | |
13548 | .xword 0xb04ce2d638b281f6 | |
13549 | .xword 0xdea2765305285d2c | |
13550 | .xword 0xb6ddbc0e57643121 | |
13551 | .xword 0x5a01058bce26ee07 | |
13552 | .xword 0x9bab57cbaba5fdde | |
13553 | .xword 0xa69094eea2f1b7d3 | |
13554 | .xword 0x92a794275cd1d3a9 | |
13555 | .xword 0x11ca21964e1a5747 | |
13556 | .xword 0x5a8c9d4619cdea2d | |
13557 | .xword 0xa87f8d471c9405f4 | |
13558 | .xword 0x1447b81d260ffd87 | |
13559 | .xword 0x253b6b39ad314cf8 | |
13560 | .xword 0x80a6b3b0d294d2c6 | |
13561 | .xword 0x6f33b24da0da0b6f | |
13562 | .xword 0xd22d9474dc67b788 | |
13563 | .xword 0xe44c2e40b267b002 | |
13564 | .xword 0xb1a15c532c46cdee | |
13565 | .xword 0x70a63ed5082df9ff | |
13566 | .xword 0x32d27e8d518f0403 | |
13567 | .xword 0x1eb22216db839c90 | |
13568 | .xword 0x482090dc0942732c | |
13569 | .xword 0xd0c87f2b3e938999 | |
13570 | .xword 0x7b63079d67baf411 | |
13571 | .xword 0xd8f257b4d59a0d7f | |
13572 | .xword 0x774db739901b7418 | |
13573 | .xword 0x651e3174dfc450ab | |
13574 | .xword 0x508f7a0e07e8e1b3 | |
13575 | .xword 0xfac9fd3f60091199 | |
13576 | .xword 0x81758ab4f322d189 | |
13577 | .xword 0x5dfcf9ad57bf0292 | |
13578 | .xword 0x9a8c031a843f0910 | |
13579 | .xword 0x1a3ca000418a9262 | |
13580 | .xword 0x7156491c5e10ee69 | |
13581 | .xword 0x36d97fb7b6825af6 | |
13582 | .xword 0x75e25591e46ca030 | |
13583 | .xword 0x0e7d9ae138812428 | |
13584 | .xword 0xbdc5eb4cf896fae2 | |
13585 | .xword 0xb8a2fcf667097c8c | |
13586 | .xword 0x3dff32a6264128ba | |
13587 | .xword 0x0968320cc6e509eb | |
13588 | .xword 0x7a9b2e0adfff9d74 | |
13589 | .xword 0xf2249b9eb5fb687c | |
13590 | .xword 0x26358772d34cd390 | |
13591 | .xword 0x2a3f61e27fafaa56 | |
13592 | .xword 0xf8e304bed5b98328 | |
13593 | .xword 0x8901f86463d57696 | |
13594 | .xword 0xbd16d18d2ea55d6a | |
13595 | .xword 0x8e8a67e132f939bc | |
13596 | .xword 0xf1041d4939c4d03a | |
13597 | .xword 0xd5dcfdbc70ddf6b4 | |
13598 | .xword 0xa7d41dfc0872efe7 | |
13599 | .xword 0x83fe2b8f0724a4ae | |
13600 | .xword 0xd6f59ccb40d1563b | |
13601 | .xword 0x246824cc3329f4a9 | |
13602 | .xword 0x698b63311e328e71 | |
13603 | .xword 0x615f02e0ae6e6f13 | |
13604 | .xword 0x09dd043cb71b444a | |
13605 | .xword 0xeb9b6ecdc6513b59 | |
13606 | .xword 0x38faa0131c8deaca | |
13607 | .xword 0xfb674f66e87e0afe | |
13608 | .xword 0x0e5efa0cfdd1d2e9 | |
13609 | .xword 0x7b8458da77365005 | |
13610 | .xword 0x92ea4ee75d882c03 | |
13611 | .xword 0xabf4172ba820bde0 | |
13612 | .xword 0xdb44bd5ee2f57997 | |
13613 | .xword 0x41660d36fc1aac0e | |
13614 | .xword 0x7060367c64e1bf09 | |
13615 | .xword 0x7ffa73c7f65e54a8 | |
13616 | .xword 0x0920a766111264c7 | |
13617 | .xword 0xf3bfa254710f9c3e | |
13618 | .xword 0xe134813b561c136a | |
13619 | .xword 0xf0850a1dac551378 | |
13620 | .xword 0x41af9ab709375cb2 | |
13621 | .xword 0x1d04f605eb49e3a1 | |
13622 | .xword 0x5f0e5cb6033e8d59 | |
13623 | .xword 0xd87b2826d8998b7f | |
13624 | .xword 0x23105a05c8eb695d | |
13625 | .xword 0x1f464f209bca306a | |
13626 | .xword 0x45a50438d92b3b1b | |
13627 | .xword 0x0d7e93f049a8eb5d | |
13628 | .xword 0x6f5b1d26b51b8f72 | |
13629 | .xword 0xd95d1db689d1a7bc | |
13630 | .xword 0x0f0171995a93d56d | |
13631 | .xword 0xa3bbcd7fa496d715 | |
13632 | .xword 0x188e76e6708d1318 | |
13633 | .xword 0x7418769134daa56d | |
13634 | .xword 0x0c9a7d6f574e376f | |
13635 | .xword 0xd02a2c4678207a37 | |
13636 | .xword 0x58174b637e7bb707 | |
13637 | .xword 0x36584bf40626bc56 | |
13638 | .xword 0x8242b6cc60236a35 | |
13639 | .xword 0xc0c4e2a3f9d0b303 | |
13640 | .xword 0x2a1f5b8ce0d5656d | |
13641 | .xword 0xafc27df13ce7031f | |
13642 | .xword 0x40d5e4f08702b90b | |
13643 | .xword 0xd378252a2d212b2e | |
13644 | .xword 0x778b926ae92692c8 | |
13645 | .xword 0xad37f85ab5bbe1f3 | |
13646 | .xword 0xc81c9fcf187e8992 | |
13647 | .xword 0x5e8e1baf727d1110 | |
13648 | .xword 0xdf20c4e64fa43d16 | |
13649 | .xword 0x30f057064cf56b94 | |
13650 | .xword 0x7617b4fb341070d9 | |
13651 | .xword 0x19b2c70d50591317 | |
13652 | .xword 0x76981259f0d31f03 | |
13653 | .xword 0xb07704f5ed9b8e34 | |
13654 | .xword 0xf975d63928973045 | |
13655 | .xword 0x426a4b34d58d9960 | |
13656 | .xword 0x4cc8b57ebced2789 | |
13657 | .xword 0x0c6e97dfee43edaa | |
13658 | .xword 0x04a866c55e3c1659 | |
13659 | .xword 0x8475da0559713750 | |
13660 | .xword 0x6567b22ea00f7027 | |
13661 | .xword 0x61a385741eff7bab | |
13662 | .xword 0x10e0e6a839c1b158 | |
13663 | .xword 0x23022aeb22effd4d | |
13664 | .xword 0x17aa4da9f8de3b09 | |
13665 | .xword 0x282ff2c8e12c11cf | |
13666 | .xword 0x70b7a000b31cdb58 | |
13667 | .xword 0xc416ae015b5f7f22 | |
13668 | .xword 0x368d79468431ff34 | |
13669 | .xword 0xdf88545470a3c7aa | |
13670 | .xword 0x4f58d08f6933c4a6 | |
13671 | .xword 0xdaeb30b763a5533e | |
13672 | .xword 0xb84bebf0dbdeacff | |
13673 | .xword 0x470d79823d8724e1 | |
13674 | .xword 0xca7813c314d92ea2 | |
13675 | .xword 0xf7ec58aa50c43dfc | |
13676 | .xword 0xb5d8aabd3373e419 | |
13677 | .xword 0x07bd9cea0eb7a668 | |
13678 | .xword 0x5648b3a254801193 | |
13679 | .xword 0x099936d05a277807 | |
13680 | .xword 0x39b2882254723e81 | |
13681 | .xword 0x04b03c25b5e35281 | |
13682 | .xword 0x67d62e7839e72368 | |
13683 | .xword 0xa5d99006a2639b07 | |
13684 | .xword 0x9bd71ba752330b37 | |
13685 | .xword 0x60060f2e16302189 | |
13686 | .xword 0xb151a4750f06a897 | |
13687 | .xword 0x71496b395790adf7 | |
13688 | .xword 0x5f4b51ba4d5e96e9 | |
13689 | .xword 0xf17653d0aecba662 | |
13690 | .xword 0x02a84035c93f91b7 | |
13691 | .xword 0x39a0f39e22026c19 | |
13692 | .xword 0x4d49286071aa2ab9 | |
13693 | .xword 0x5774430606153900 | |
13694 | .xword 0xea48ba117ddd4938 | |
13695 | .xword 0x609e4f4fcf409888 | |
13696 | .xword 0x91c7365479868f12 | |
13697 | .xword 0x02547e1d9401d906 | |
13698 | .xword 0x0e2039c7dfb085a6 | |
13699 | .xword 0xba501c839eda643f | |
13700 | .xword 0x1e7fd6f90711267b | |
13701 | .xword 0x3715b3b3326991c8 | |
13702 | .xword 0x6f4df483cb247095 | |
13703 | .xword 0x6b97050a28c92600 | |
13704 | .xword 0xe56e0313d224f983 | |
13705 | .xword 0x3a17355418e8993d | |
13706 | .xword 0x7c5ff24f422929bd | |
13707 | .xword 0x9adb73d0c28727ef | |
13708 | .xword 0x7e202e4ab76c59f0 | |
13709 | .xword 0x79b2134e55614b7c | |
13710 | ||
13711 | SECTION .HTRAPS | |
13712 | .text | |
13713 | .global restore_range_regs | |
13714 | restore_range_regs: | |
13715 | wr %g0, ASI_MMU_REAL_RANGE, %asi | |
13716 | mov 1, %g1 | |
13717 | sllx %g1, 63, %g1 | |
13718 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %g2 | |
13719 | or %g2 ,%g1, %g2 | |
13720 | stxa %g2, [ASI_MMU_REAL_RANGE_0] %asi | |
13721 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %g2 | |
13722 | or %g2 ,%g1, %g2 | |
13723 | stxa %g2, [ASI_MMU_REAL_RANGE_1] %asi | |
13724 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %g2 | |
13725 | or %g2 ,%g1, %g2 | |
13726 | stxa %g2, [ASI_MMU_REAL_RANGE_2] %asi | |
13727 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %g2 | |
13728 | or %g2 ,%g1, %g2 | |
13729 | stxa %g2, [ASI_MMU_REAL_RANGE_3] %asi | |
13730 | retry | |
13731 | ||
13732 | .global wdog_2_ext | |
13733 | # 10 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
13734 | SECTION .HTRAPS | |
13735 | .global wdog_2_ext | |
13736 | .global retry_with_base_tba | |
13737 | .global resolve_bad_tte | |
13738 | ||
13739 | .text | |
13740 | resolve_bad_tte: | |
13741 | !if pc[13:5]==0, then assume not a relocated handler | |
13742 | rdpr %tpc, %r4 | |
13743 | andn %r4, 0xf, %r4 | |
13744 | sllx %r4, 49, %r5 | |
13745 | brnz,a %r5, retry_with_base_tba | |
13746 | !assume %r27 is where we came from .. | |
13747 | fdivd %f0, %f4, %f12 | |
13748 | jmpl %r27+8, %r0 | |
13749 | fdivs %f0, %f4, %f12 | |
13750 | retry_with_base_tba: | |
13751 | best_set_reg(TRAP_BASE_VA, %r3, %r5) | |
13752 | cmp %r4, %r5 | |
13753 | bz htrap_5_ext_done | |
13754 | set 0x7fff, %r3 | |
13755 | and %r4, %r3, %r4 | |
13756 | or %r5, %r4, %r4 | |
13757 | wrpr %r4, %tpc | |
13758 | rdpr %tnpc, %r4 | |
13759 | and %r4, %r3, %r4 | |
13760 | or %r5, %r4, %r4 | |
13761 | wrpr %r4, %tnpc | |
13762 | retry | |
13763 | ||
13764 | htrap_5_ext: | |
13765 | rd %pc, %l2 | |
13766 | inc %l3 | |
13767 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 | |
13768 | rdpr %tl, %l3 | |
13769 | rdpr %tstate, %l4 | |
13770 | rdhpr %htstate, %l5 | |
13771 | or %l5, 0x4, %l5 | |
13772 | inc %l3 | |
13773 | wrpr %l3, %tl | |
13774 | wrpr %l2, %tpc | |
13775 | add %l2, 4, %l2 | |
13776 | wrpr %l2, %tnpc | |
13777 | wrpr %l4, %tstate | |
13778 | wrhpr %l5, %htstate | |
13779 | retry | |
13780 | htrap_5_ext_done: | |
13781 | done | |
13782 | ||
13783 | wdog_2_ext: | |
13784 | mov 0x1f, %l1 | |
13785 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
13786 | ! If TT != 2, then goto trap handler | |
13787 | rdpr %tt, %l1 | |
13788 | cmp %l1, 0x2 | |
13789 | bne wdog_2_goto_handler | |
13790 | nop | |
13791 | ! else done | |
13792 | done | |
13793 | wdog_2_goto_handler: | |
13794 | rdhpr %htstate, %l3 | |
13795 | and %l3, 0x4, %l3 ! If previously in hpriv mode, go to hpriv | |
13796 | brnz,a %l3, wdog_2_goto_handler_1 | |
13797 | rdhpr %htba, %l3 | |
13798 | srlx %l1, 7, %l3 ! Send priv sw traps to priv mode .. | |
13799 | cmp %l3, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. | |
13800 | be,a wdog_2_goto_handler_1 | |
13801 | rdpr %tba, %l3 | |
13802 | rdhpr %htba, %l3 | |
13803 | wdog_2_goto_handler_1: | |
13804 | sllx %l1, 5, %l1 | |
13805 | add %l1, %l3, %l3 | |
13806 | jmp %l3 | |
13807 | nop | |
13808 | # 86 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
13809 | ! Red mode other reset handler | |
13810 | ! Get htba, and tt and make trap address | |
13811 | ! Jump to trap handler .. | |
13812 | ||
13813 | SECTION .RED_SEC | |
13814 | .global red_other_ext | |
13815 | .global wdog_red_ext | |
13816 | .text | |
13817 | red_other_ext: | |
13818 | ! IF TL=6, shift stack by one .. | |
13819 | rdpr %tl, %l1 | |
13820 | cmp %l1, 6 | |
13821 | be start_tsa_shift | |
13822 | nop | |
13823 | ||
13824 | continue_red_other: | |
13825 | mov 0x1f, %l1 | |
13826 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
13827 | ||
13828 | rdpr %tt, %l1 | |
13829 | ||
13830 | rdhpr %htstate, %l2 | |
13831 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv | |
13832 | brnz,a %l2, red_goto_handler | |
13833 | rdhpr %htba, %l2 | |
13834 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. | |
13835 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. | |
13836 | be,a red_goto_handler | |
13837 | rdpr %tba, %l2 | |
13838 | rdhpr %htba, %l2 | |
13839 | red_goto_handler: | |
13840 | ||
13841 | sllx %l1, 5, %l1 | |
13842 | add %l1, %l2, %l2 | |
13843 | rdhpr %hpstate, %l1 | |
13844 | jmp %l2 | |
13845 | wrhpr %l1, 0x20, %hpstate | |
13846 | nop | |
13847 | ||
13848 | wdog_red_ext: | |
13849 | ! Shift stack down by 1 ... | |
13850 | rdpr %tl, %l1 | |
13851 | cmp %l1, 6 | |
13852 | bl wdog_end | |
13853 | start_tsa_shift: | |
13854 | mov 0x2, %l2 | |
13855 | ||
13856 | tsa_shift: | |
13857 | wrpr %l2, %tl | |
13858 | rdpr %tt, %l3 | |
13859 | rdpr %tpc, %l4 | |
13860 | rdpr %tnpc, %l5 | |
13861 | rdpr %tstate, %l6 | |
13862 | rdhpr %htstate, %l7 | |
13863 | dec %l2 | |
13864 | wrpr %l2, %tl | |
13865 | wrpr %l3, %tt | |
13866 | wrpr %l4, %tpc | |
13867 | wrpr %l5, %tnpc | |
13868 | wrpr %l6, %tstate | |
13869 | wrhpr %l7, %htstate | |
13870 | add %l2, 2, %l2 | |
13871 | cmp %l2, %l1 | |
13872 | ble tsa_shift | |
13873 | nop | |
13874 | tsa_shift_done: | |
13875 | dec %l1 | |
13876 | wrpr %l1, %tl | |
13877 | ||
13878 | wdog_end: | |
13879 | ! If TT != 2, then goto trap handler | |
13880 | rdpr %tt, %l1 | |
13881 | ||
13882 | cmp %l1, 0x2 | |
13883 | bne continue_red_other | |
13884 | nop | |
13885 | ! else done | |
13886 | mov 0x1f, %l1 | |
13887 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
13888 | done | |
13889 | # 973 "diag.j" | |
13890 | ||
13891 | SECTION .CWQ_DATA DATA_VA =0x4000 | |
13892 | attr_data { | |
13893 | Name = .CWQ_DATA | |
13894 | hypervisor | |
13895 | } | |
13896 | ||
13897 | .data | |
13898 | .align 16 | |
13899 | .global msg | |
13900 | msg: | |
13901 | .xword 0xad32fa52374cc6ba | |
13902 | .xword 0x4cbf52280549003a | |
13903 | ||
13904 | .align 16 | |
13905 | .global results | |
13906 | results: | |
13907 | .xword 0xDEADBEEFDEADBEEF | |
13908 | .xword 0xDEADBEEFDEADBEEF | |
13909 | !# CWQ data area | |
13910 | !# CWQ_BASE for core N is CWQ_BASE+(N*256) | |
13911 | !# CWQ_LAST for core N is CWQ_LAST+(N*256) | |
13912 | .align 64 | |
13913 | .global CWQ_BASE | |
13914 | CWQ_BASE: | |
13915 | .xword 0xAAAAAAAAAAAAAAA | |
13916 | .xword 0xAAAAAAAAAAAAAAA | |
13917 | .xword 0xAAAAAAAAAAAAAAA | |
13918 | .xword 0xAAAAAAAAAAAAAAA | |
13919 | .xword 0xAAAAAAAAAAAAAAA | |
13920 | .xword 0xAAAAAAAAAAAAAAA | |
13921 | .xword 0xAAAAAAAAAAAAAAA | |
13922 | .xword 0xAAAAAAAAAAAAAAA | |
13923 | .xword 0xAAAAAAAAAAAAAAA | |
13924 | .xword 0xAAAAAAAAAAAAAAA | |
13925 | .xword 0xAAAAAAAAAAAAAAA | |
13926 | .xword 0xAAAAAAAAAAAAAAA | |
13927 | .xword 0xAAAAAAAAAAAAAAA | |
13928 | .xword 0xAAAAAAAAAAAAAAA | |
13929 | .xword 0xAAAAAAAAAAAAAAA | |
13930 | .xword 0xAAAAAAAAAAAAAAA | |
13931 | .xword 0xAAAAAAAAAAAAAAA | |
13932 | .xword 0xAAAAAAAAAAAAAAA | |
13933 | .xword 0xAAAAAAAAAAAAAAA | |
13934 | .xword 0xAAAAAAAAAAAAAAA | |
13935 | .xword 0xAAAAAAAAAAAAAAA | |
13936 | .xword 0xAAAAAAAAAAAAAAA | |
13937 | .xword 0xAAAAAAAAAAAAAAA | |
13938 | .xword 0xAAAAAAAAAAAAAAA | |
13939 | .global CWQ_LAST | |
13940 | .align 64 | |
13941 | CWQ_LAST: | |
13942 | .word 0x0 | |
13943 | .align 64 | |
13944 | cwq_base1: | |
13945 | .xword 0xAAAAAAAAAAAAAAA | |
13946 | .xword 0xAAAAAAAAAAAAAAA | |
13947 | .xword 0xAAAAAAAAAAAAAAA | |
13948 | .xword 0xAAAAAAAAAAAAAAA | |
13949 | .xword 0xAAAAAAAAAAAAAAA | |
13950 | .xword 0xAAAAAAAAAAAAAAA | |
13951 | .xword 0xAAAAAAAAAAAAAAA | |
13952 | .xword 0xAAAAAAAAAAAAAAA | |
13953 | .xword 0xAAAAAAAAAAAAAAA | |
13954 | .xword 0xAAAAAAAAAAAAAAA | |
13955 | .xword 0xAAAAAAAAAAAAAAA | |
13956 | .xword 0xAAAAAAAAAAAAAAA | |
13957 | .xword 0xAAAAAAAAAAAAAAA | |
13958 | .xword 0xAAAAAAAAAAAAAAA | |
13959 | .xword 0xAAAAAAAAAAAAAAA | |
13960 | .xword 0xAAAAAAAAAAAAAAA | |
13961 | .xword 0xAAAAAAAAAAAAAAA | |
13962 | .xword 0xAAAAAAAAAAAAAAA | |
13963 | .xword 0xAAAAAAAAAAAAAAA | |
13964 | .xword 0xAAAAAAAAAAAAAAA | |
13965 | .xword 0xAAAAAAAAAAAAAAA | |
13966 | .xword 0xAAAAAAAAAAAAAAA | |
13967 | .xword 0xAAAAAAAAAAAAAAA | |
13968 | .xword 0xAAAAAAAAAAAAAAA | |
13969 | .align 64 | |
13970 | cwq_last1: | |
13971 | .word 0x0 | |
13972 | .align 64 | |
13973 | .xword 0xAAAAAAAAAAAAAAA | |
13974 | .xword 0xAAAAAAAAAAAAAAA | |
13975 | .xword 0xAAAAAAAAAAAAAAA | |
13976 | .xword 0xAAAAAAAAAAAAAAA | |
13977 | .xword 0xAAAAAAAAAAAAAAA | |
13978 | .xword 0xAAAAAAAAAAAAAAA | |
13979 | .xword 0xAAAAAAAAAAAAAAA | |
13980 | .xword 0xAAAAAAAAAAAAAAA | |
13981 | .xword 0xAAAAAAAAAAAAAAA | |
13982 | .xword 0xAAAAAAAAAAAAAAA | |
13983 | .xword 0xAAAAAAAAAAAAAAA | |
13984 | .xword 0xAAAAAAAAAAAAAAA | |
13985 | .xword 0xAAAAAAAAAAAAAAA | |
13986 | .xword 0xAAAAAAAAAAAAAAA | |
13987 | .xword 0xAAAAAAAAAAAAAAA | |
13988 | .xword 0xAAAAAAAAAAAAAAA | |
13989 | .xword 0xAAAAAAAAAAAAAAA | |
13990 | .xword 0xAAAAAAAAAAAAAAA | |
13991 | .xword 0xAAAAAAAAAAAAAAA | |
13992 | .xword 0xAAAAAAAAAAAAAAA | |
13993 | .xword 0xAAAAAAAAAAAAAAA | |
13994 | .xword 0xAAAAAAAAAAAAAAA | |
13995 | .xword 0xAAAAAAAAAAAAAAA | |
13996 | .xword 0xAAAAAAAAAAAAAAA | |
13997 | .align 64 | |
13998 | .word 0x0 | |
13999 | .align 64 | |
14000 | .xword 0xAAAAAAAAAAAAAAA | |
14001 | .xword 0xAAAAAAAAAAAAAAA | |
14002 | .xword 0xAAAAAAAAAAAAAAA | |
14003 | .xword 0xAAAAAAAAAAAAAAA | |
14004 | .xword 0xAAAAAAAAAAAAAAA | |
14005 | .xword 0xAAAAAAAAAAAAAAA | |
14006 | .xword 0xAAAAAAAAAAAAAAA | |
14007 | .xword 0xAAAAAAAAAAAAAAA | |
14008 | .xword 0xAAAAAAAAAAAAAAA | |
14009 | .xword 0xAAAAAAAAAAAAAAA | |
14010 | .xword 0xAAAAAAAAAAAAAAA | |
14011 | .xword 0xAAAAAAAAAAAAAAA | |
14012 | .xword 0xAAAAAAAAAAAAAAA | |
14013 | .xword 0xAAAAAAAAAAAAAAA | |
14014 | .xword 0xAAAAAAAAAAAAAAA | |
14015 | .xword 0xAAAAAAAAAAAAAAA | |
14016 | .xword 0xAAAAAAAAAAAAAAA | |
14017 | .xword 0xAAAAAAAAAAAAAAA | |
14018 | .xword 0xAAAAAAAAAAAAAAA | |
14019 | .xword 0xAAAAAAAAAAAAAAA | |
14020 | .xword 0xAAAAAAAAAAAAAAA | |
14021 | .xword 0xAAAAAAAAAAAAAAA | |
14022 | .xword 0xAAAAAAAAAAAAAAA | |
14023 | .xword 0xAAAAAAAAAAAAAAA | |
14024 | .align 64 | |
14025 | .word 0x0 | |
14026 | .align 64 | |
14027 | .xword 0xAAAAAAAAAAAAAAA | |
14028 | .xword 0xAAAAAAAAAAAAAAA | |
14029 | .xword 0xAAAAAAAAAAAAAAA | |
14030 | .xword 0xAAAAAAAAAAAAAAA | |
14031 | .xword 0xAAAAAAAAAAAAAAA | |
14032 | .xword 0xAAAAAAAAAAAAAAA | |
14033 | .xword 0xAAAAAAAAAAAAAAA | |
14034 | .xword 0xAAAAAAAAAAAAAAA | |
14035 | .xword 0xAAAAAAAAAAAAAAA | |
14036 | .xword 0xAAAAAAAAAAAAAAA | |
14037 | .xword 0xAAAAAAAAAAAAAAA | |
14038 | .xword 0xAAAAAAAAAAAAAAA | |
14039 | .xword 0xAAAAAAAAAAAAAAA | |
14040 | .xword 0xAAAAAAAAAAAAAAA | |
14041 | .xword 0xAAAAAAAAAAAAAAA | |
14042 | .xword 0xAAAAAAAAAAAAAAA | |
14043 | .xword 0xAAAAAAAAAAAAAAA | |
14044 | .xword 0xAAAAAAAAAAAAAAA | |
14045 | .xword 0xAAAAAAAAAAAAAAA | |
14046 | .xword 0xAAAAAAAAAAAAAAA | |
14047 | .xword 0xAAAAAAAAAAAAAAA | |
14048 | .xword 0xAAAAAAAAAAAAAAA | |
14049 | .xword 0xAAAAAAAAAAAAAAA | |
14050 | .xword 0xAAAAAAAAAAAAAAA | |
14051 | .align 64 | |
14052 | .word 0x0 | |
14053 | .align 64 | |
14054 | .xword 0xAAAAAAAAAAAAAAA | |
14055 | .xword 0xAAAAAAAAAAAAAAA | |
14056 | .xword 0xAAAAAAAAAAAAAAA | |
14057 | .xword 0xAAAAAAAAAAAAAAA | |
14058 | .xword 0xAAAAAAAAAAAAAAA | |
14059 | .xword 0xAAAAAAAAAAAAAAA | |
14060 | .xword 0xAAAAAAAAAAAAAAA | |
14061 | .xword 0xAAAAAAAAAAAAAAA | |
14062 | .xword 0xAAAAAAAAAAAAAAA | |
14063 | .xword 0xAAAAAAAAAAAAAAA | |
14064 | .xword 0xAAAAAAAAAAAAAAA | |
14065 | .xword 0xAAAAAAAAAAAAAAA | |
14066 | .xword 0xAAAAAAAAAAAAAAA | |
14067 | .xword 0xAAAAAAAAAAAAAAA | |
14068 | .xword 0xAAAAAAAAAAAAAAA | |
14069 | .xword 0xAAAAAAAAAAAAAAA | |
14070 | .xword 0xAAAAAAAAAAAAAAA | |
14071 | .xword 0xAAAAAAAAAAAAAAA | |
14072 | .xword 0xAAAAAAAAAAAAAAA | |
14073 | .xword 0xAAAAAAAAAAAAAAA | |
14074 | .xword 0xAAAAAAAAAAAAAAA | |
14075 | .xword 0xAAAAAAAAAAAAAAA | |
14076 | .xword 0xAAAAAAAAAAAAAAA | |
14077 | .xword 0xAAAAAAAAAAAAAAA | |
14078 | .align 64 | |
14079 | .word 0x0 | |
14080 | .align 64 | |
14081 | .xword 0xAAAAAAAAAAAAAAA | |
14082 | .xword 0xAAAAAAAAAAAAAAA | |
14083 | .xword 0xAAAAAAAAAAAAAAA | |
14084 | .xword 0xAAAAAAAAAAAAAAA | |
14085 | .xword 0xAAAAAAAAAAAAAAA | |
14086 | .xword 0xAAAAAAAAAAAAAAA | |
14087 | .xword 0xAAAAAAAAAAAAAAA | |
14088 | .xword 0xAAAAAAAAAAAAAAA | |
14089 | .xword 0xAAAAAAAAAAAAAAA | |
14090 | .xword 0xAAAAAAAAAAAAAAA | |
14091 | .xword 0xAAAAAAAAAAAAAAA | |
14092 | .xword 0xAAAAAAAAAAAAAAA | |
14093 | .xword 0xAAAAAAAAAAAAAAA | |
14094 | .xword 0xAAAAAAAAAAAAAAA | |
14095 | .xword 0xAAAAAAAAAAAAAAA | |
14096 | .xword 0xAAAAAAAAAAAAAAA | |
14097 | .xword 0xAAAAAAAAAAAAAAA | |
14098 | .xword 0xAAAAAAAAAAAAAAA | |
14099 | .xword 0xAAAAAAAAAAAAAAA | |
14100 | .xword 0xAAAAAAAAAAAAAAA | |
14101 | .xword 0xAAAAAAAAAAAAAAA | |
14102 | .xword 0xAAAAAAAAAAAAAAA | |
14103 | .xword 0xAAAAAAAAAAAAAAA | |
14104 | .xword 0xAAAAAAAAAAAAAAA | |
14105 | .align 64 | |
14106 | .word 0x0 | |
14107 | .align 64 | |
14108 | .xword 0xAAAAAAAAAAAAAAA | |
14109 | .xword 0xAAAAAAAAAAAAAAA | |
14110 | .xword 0xAAAAAAAAAAAAAAA | |
14111 | .xword 0xAAAAAAAAAAAAAAA | |
14112 | .xword 0xAAAAAAAAAAAAAAA | |
14113 | .xword 0xAAAAAAAAAAAAAAA | |
14114 | .xword 0xAAAAAAAAAAAAAAA | |
14115 | .xword 0xAAAAAAAAAAAAAAA | |
14116 | .xword 0xAAAAAAAAAAAAAAA | |
14117 | .xword 0xAAAAAAAAAAAAAAA | |
14118 | .xword 0xAAAAAAAAAAAAAAA | |
14119 | .xword 0xAAAAAAAAAAAAAAA | |
14120 | .xword 0xAAAAAAAAAAAAAAA | |
14121 | .xword 0xAAAAAAAAAAAAAAA | |
14122 | .xword 0xAAAAAAAAAAAAAAA | |
14123 | .xword 0xAAAAAAAAAAAAAAA | |
14124 | .xword 0xAAAAAAAAAAAAAAA | |
14125 | .xword 0xAAAAAAAAAAAAAAA | |
14126 | .xword 0xAAAAAAAAAAAAAAA | |
14127 | .xword 0xAAAAAAAAAAAAAAA | |
14128 | .xword 0xAAAAAAAAAAAAAAA | |
14129 | .xword 0xAAAAAAAAAAAAAAA | |
14130 | .xword 0xAAAAAAAAAAAAAAA | |
14131 | .xword 0xAAAAAAAAAAAAAAA | |
14132 | .align 64 | |
14133 | .word 0x0 | |
14134 | ||
14135 | ||
14136 | ||
14137 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000280000, DATA_VA = 0x00000000002c0000 | |
14138 | attr_text { | |
14139 | Name = .MyHTRAPS_0, | |
14140 | RA = 0x0000000000280000, | |
14141 | PA = ra2pa(0x0000000000280000,0), | |
14142 | part_0_ctx_zero_tsb_config_3, | |
14143 | part_0_ctx_nonzero_tsb_config_3, | |
14144 | TTE_G = 1, | |
14145 | TTE_Context = 0, | |
14146 | TTE_V = 1, | |
14147 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14148 | TTE_NFO = 0, | |
14149 | TTE_IE = 0, | |
14150 | TTE_Soft2 = 0, | |
14151 | TTE_Diag = 0, | |
14152 | TTE_Soft = 0, | |
14153 | TTE_L = 0, | |
14154 | TTE_CP = 0, | |
14155 | TTE_CV = 1, | |
14156 | TTE_E = 0, | |
14157 | TTE_P = 1, | |
14158 | TTE_W = 0, | |
14159 | TTE_X = 0 | |
14160 | } | |
14161 | ||
14162 | ||
14163 | attr_data { | |
14164 | Name = .MyHTRAPS_0, | |
14165 | RA = 0x00000000002c0000, | |
14166 | PA = ra2pa(0x00000000002c0000,0), | |
14167 | part_0_ctx_zero_tsb_config_3, | |
14168 | part_0_ctx_nonzero_tsb_config_3, | |
14169 | TTE_G = 1, | |
14170 | TTE_Context = 0, | |
14171 | TTE_V = 1, | |
14172 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14173 | TTE_NFO = 0, | |
14174 | TTE_IE = 0, | |
14175 | TTE_Soft2 = 0, | |
14176 | TTE_Diag = 0, | |
14177 | TTE_Soft = 0, | |
14178 | TTE_L = 0, | |
14179 | TTE_CP = 1, | |
14180 | TTE_CV = 1, | |
14181 | TTE_E = 0, | |
14182 | TTE_P = 1, | |
14183 | TTE_W = 0 | |
14184 | } | |
14185 | ||
14186 | .text | |
14187 | #include "htraps.s" | |
14188 | #include "tlu_htraps_ext.s" | |
14189 | ||
14190 | ||
14191 | ||
14192 | SECTION .MyHTRAPS_1 TEXT_VA = 0x00000000002a0000, DATA_VA = 0x00000000002e0000 | |
14193 | attr_text { | |
14194 | Name = .MyHTRAPS_1, | |
14195 | RA = 0x00000000002a0000, | |
14196 | PA = ra2pa(0x00000000002a0000,0), | |
14197 | part_0_ctx_zero_tsb_config_3, | |
14198 | part_0_ctx_nonzero_tsb_config_3, | |
14199 | TTE_G = 1, | |
14200 | TTE_Context = 0, | |
14201 | TTE_V = 1, | |
14202 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14203 | TTE_NFO = 0, | |
14204 | TTE_IE = 0, | |
14205 | TTE_Soft2 = 0, | |
14206 | TTE_Diag = 0, | |
14207 | TTE_Soft = 0, | |
14208 | TTE_L = 0, | |
14209 | TTE_CP = 0, | |
14210 | TTE_CV = 1, | |
14211 | TTE_E = 1, | |
14212 | TTE_P = 1, | |
14213 | TTE_W = 0, | |
14214 | TTE_X = 0 | |
14215 | } | |
14216 | ||
14217 | ||
14218 | attr_data { | |
14219 | Name = .MyHTRAPS_1, | |
14220 | RA = 0x00000000002e0000, | |
14221 | PA = ra2pa(0x00000000002e0000,0), | |
14222 | part_0_ctx_zero_tsb_config_3, | |
14223 | part_0_ctx_nonzero_tsb_config_3, | |
14224 | TTE_G = 1, | |
14225 | TTE_Context = 0, | |
14226 | TTE_V = 1, | |
14227 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14228 | TTE_NFO = 0, | |
14229 | TTE_IE = 0, | |
14230 | TTE_Soft2 = 0, | |
14231 | TTE_Diag = 0, | |
14232 | TTE_Soft = 0, | |
14233 | TTE_L = 0, | |
14234 | TTE_CP = 0, | |
14235 | TTE_CV = 0, | |
14236 | TTE_E = 0, | |
14237 | TTE_P = 1, | |
14238 | TTE_W = 0 | |
14239 | } | |
14240 | ||
14241 | .text | |
14242 | #include "htraps.s" | |
14243 | #include "tlu_htraps_ext.s" | |
14244 | ||
14245 | ||
14246 | ||
14247 | SECTION .MyHTRAPS_2 TEXT_VA = 0x0000000200280000, DATA_VA = 0x00000002002c0000 | |
14248 | attr_text { | |
14249 | Name = .MyHTRAPS_2, | |
14250 | RA = 0x0000000200280000, | |
14251 | PA = ra2pa(0x0000000200280000,0), | |
14252 | part_0_ctx_zero_tsb_config_3, | |
14253 | part_0_ctx_nonzero_tsb_config_3, | |
14254 | TTE_G = 1, | |
14255 | TTE_Context = 0, | |
14256 | TTE_V = 1, | |
14257 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14258 | TTE_NFO = 0, | |
14259 | TTE_IE = 0, | |
14260 | TTE_Soft2 = 0, | |
14261 | TTE_Diag = 0, | |
14262 | TTE_Soft = 0, | |
14263 | TTE_L = 0, | |
14264 | TTE_CP = 1, | |
14265 | TTE_CV = 1, | |
14266 | TTE_E = 1, | |
14267 | TTE_P = 1, | |
14268 | TTE_W = 0, | |
14269 | TTE_X = 0 | |
14270 | } | |
14271 | ||
14272 | ||
14273 | attr_data { | |
14274 | Name = .MyHTRAPS_2, | |
14275 | RA = 0x00000002002c0000, | |
14276 | PA = ra2pa(0x00000002002c0000,0), | |
14277 | part_0_ctx_zero_tsb_config_3, | |
14278 | part_0_ctx_nonzero_tsb_config_3, | |
14279 | TTE_G = 1, | |
14280 | TTE_Context = 0, | |
14281 | TTE_V = 1, | |
14282 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14283 | TTE_NFO = 0, | |
14284 | TTE_IE = 0, | |
14285 | TTE_Soft2 = 0, | |
14286 | TTE_Diag = 0, | |
14287 | TTE_Soft = 0, | |
14288 | TTE_L = 0, | |
14289 | TTE_CP = 0, | |
14290 | TTE_CV = 0, | |
14291 | TTE_E = 0, | |
14292 | TTE_P = 1, | |
14293 | TTE_W = 0 | |
14294 | } | |
14295 | ||
14296 | .text | |
14297 | #include "htraps.s" | |
14298 | #include "tlu_htraps_ext.s" | |
14299 | ||
14300 | ||
14301 | ||
14302 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000002002a0000, DATA_VA = 0x00000002002e0000 | |
14303 | attr_text { | |
14304 | Name = .MyHTRAPS_3, | |
14305 | RA = 0x00000002002a0000, | |
14306 | PA = ra2pa(0x00000002002a0000,0), | |
14307 | part_0_ctx_zero_tsb_config_3, | |
14308 | part_0_ctx_nonzero_tsb_config_3, | |
14309 | TTE_G = 1, | |
14310 | TTE_Context = 0, | |
14311 | TTE_V = 1, | |
14312 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14313 | TTE_NFO = 0, | |
14314 | TTE_IE = 0, | |
14315 | TTE_Soft2 = 0, | |
14316 | TTE_Diag = 0, | |
14317 | TTE_Soft = 0, | |
14318 | TTE_L = 0, | |
14319 | TTE_CP = 0, | |
14320 | TTE_CV = 1, | |
14321 | TTE_E = 1, | |
14322 | TTE_P = 1, | |
14323 | TTE_W = 0, | |
14324 | TTE_X = 0 | |
14325 | } | |
14326 | ||
14327 | ||
14328 | attr_data { | |
14329 | Name = .MyHTRAPS_3, | |
14330 | RA = 0x00000002002e0000, | |
14331 | PA = ra2pa(0x00000002002e0000,0), | |
14332 | part_0_ctx_zero_tsb_config_3, | |
14333 | part_0_ctx_nonzero_tsb_config_3, | |
14334 | TTE_G = 1, | |
14335 | TTE_Context = 0, | |
14336 | TTE_V = 1, | |
14337 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14338 | TTE_NFO = 0, | |
14339 | TTE_IE = 0, | |
14340 | TTE_Soft2 = 0, | |
14341 | TTE_Diag = 0, | |
14342 | TTE_Soft = 0, | |
14343 | TTE_L = 0, | |
14344 | TTE_CP = 0, | |
14345 | TTE_CV = 0, | |
14346 | TTE_E = 0, | |
14347 | TTE_P = 1, | |
14348 | TTE_W = 0 | |
14349 | } | |
14350 | ||
14351 | .text | |
14352 | #include "htraps.s" | |
14353 | #include "tlu_htraps_ext.s" | |
14354 | ||
14355 | ||
14356 | ||
14357 | ||
14358 | ||
14359 | SECTION .MyTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x00000000003c0000 | |
14360 | attr_text { | |
14361 | Name = .MyTRAPS_0, | |
14362 | RA = 0x0000000000380000, | |
14363 | PA = ra2pa(0x0000000000380000,0), | |
14364 | part_0_ctx_zero_tsb_config_3, | |
14365 | part_0_ctx_nonzero_tsb_config_3, | |
14366 | TTE_G = 1, | |
14367 | TTE_Context = 0, | |
14368 | TTE_V = 1, | |
14369 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14370 | TTE_NFO = 1, | |
14371 | TTE_IE = 1, | |
14372 | TTE_Soft2 = 0, | |
14373 | TTE_Diag = 0, | |
14374 | TTE_Soft = 0, | |
14375 | TTE_L = 0, | |
14376 | TTE_CP = 0, | |
14377 | TTE_CV = 1, | |
14378 | TTE_E = 1, | |
14379 | TTE_P = 0, | |
14380 | TTE_W = 0, | |
14381 | TTE_X = 0 | |
14382 | } | |
14383 | ||
14384 | ||
14385 | attr_data { | |
14386 | Name = .MyTRAPS_0, | |
14387 | RA = 0x00000000003c0000, | |
14388 | PA = ra2pa(0x00000000003c0000,0), | |
14389 | part_0_ctx_zero_tsb_config_3, | |
14390 | part_0_ctx_nonzero_tsb_config_3, | |
14391 | TTE_G = 1, | |
14392 | TTE_Context = 0, | |
14393 | TTE_V = 1, | |
14394 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14395 | TTE_NFO = 0, | |
14396 | TTE_IE = 1, | |
14397 | TTE_Soft2 = 0, | |
14398 | TTE_Diag = 0, | |
14399 | TTE_Soft = 0, | |
14400 | TTE_L = 0, | |
14401 | TTE_CP = 1, | |
14402 | TTE_CV = 1, | |
14403 | TTE_E = 0, | |
14404 | TTE_P = 1, | |
14405 | TTE_W = 0 | |
14406 | } | |
14407 | ||
14408 | #include "traps.s" | |
14409 | ||
14410 | ||
14411 | ||
14412 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003e0000 | |
14413 | attr_text { | |
14414 | Name = .MyTRAPS_1, | |
14415 | RA = 0x00000000003a0000, | |
14416 | PA = ra2pa(0x00000000003a0000,0), | |
14417 | part_0_ctx_zero_tsb_config_3, | |
14418 | part_0_ctx_nonzero_tsb_config_3, | |
14419 | TTE_G = 1, | |
14420 | TTE_Context = 0, | |
14421 | TTE_V = 1, | |
14422 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14423 | TTE_NFO = 1, | |
14424 | TTE_IE = 1, | |
14425 | TTE_Soft2 = 0, | |
14426 | TTE_Diag = 0, | |
14427 | TTE_Soft = 0, | |
14428 | TTE_L = 0, | |
14429 | TTE_CP = 0, | |
14430 | TTE_CV = 0, | |
14431 | TTE_E = 1, | |
14432 | TTE_P = 0, | |
14433 | TTE_W = 1, | |
14434 | TTE_X = 0 | |
14435 | } | |
14436 | ||
14437 | ||
14438 | attr_data { | |
14439 | Name = .MyTRAPS_1, | |
14440 | RA = 0x00000000003e0000, | |
14441 | PA = ra2pa(0x00000000003e0000,0), | |
14442 | part_0_ctx_zero_tsb_config_3, | |
14443 | part_0_ctx_nonzero_tsb_config_3, | |
14444 | TTE_G = 1, | |
14445 | TTE_Context = 0, | |
14446 | TTE_V = 1, | |
14447 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14448 | TTE_NFO = 1, | |
14449 | TTE_IE = 1, | |
14450 | TTE_Soft2 = 0, | |
14451 | TTE_Diag = 0, | |
14452 | TTE_Soft = 0, | |
14453 | TTE_L = 0, | |
14454 | TTE_CP = 0, | |
14455 | TTE_CV = 0, | |
14456 | TTE_E = 0, | |
14457 | TTE_P = 1, | |
14458 | TTE_W = 0 | |
14459 | } | |
14460 | ||
14461 | #include "traps.s" | |
14462 | ||
14463 | ||
14464 | ||
14465 | SECTION .MyTRAPS_2 TEXT_VA = 0x0000000400380000, DATA_VA = 0x00000004003c0000 | |
14466 | attr_text { | |
14467 | Name = .MyTRAPS_2, | |
14468 | RA = 0x0000000400380000, | |
14469 | PA = ra2pa(0x0000000400380000,0), | |
14470 | part_0_ctx_zero_tsb_config_3, | |
14471 | part_0_ctx_nonzero_tsb_config_3, | |
14472 | TTE_G = 1, | |
14473 | TTE_Context = 0, | |
14474 | TTE_V = 1, | |
14475 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14476 | TTE_NFO = 1, | |
14477 | TTE_IE = 1, | |
14478 | TTE_Soft2 = 0, | |
14479 | TTE_Diag = 0, | |
14480 | TTE_Soft = 0, | |
14481 | TTE_L = 0, | |
14482 | TTE_CP = 1, | |
14483 | TTE_CV = 1, | |
14484 | TTE_E = 0, | |
14485 | TTE_P = 0, | |
14486 | TTE_W = 0, | |
14487 | TTE_X = 1 | |
14488 | } | |
14489 | ||
14490 | ||
14491 | attr_data { | |
14492 | Name = .MyTRAPS_2, | |
14493 | RA = 0x00000004003c0000, | |
14494 | PA = ra2pa(0x00000004003c0000,0), | |
14495 | part_0_ctx_zero_tsb_config_3, | |
14496 | part_0_ctx_nonzero_tsb_config_3, | |
14497 | TTE_G = 1, | |
14498 | TTE_Context = 0, | |
14499 | TTE_V = 1, | |
14500 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14501 | TTE_NFO = 1, | |
14502 | TTE_IE = 1, | |
14503 | TTE_Soft2 = 0, | |
14504 | TTE_Diag = 0, | |
14505 | TTE_Soft = 0, | |
14506 | TTE_L = 0, | |
14507 | TTE_CP = 0, | |
14508 | TTE_CV = 0, | |
14509 | TTE_E = 0, | |
14510 | TTE_P = 1, | |
14511 | TTE_W = 0 | |
14512 | } | |
14513 | ||
14514 | #include "traps.s" | |
14515 | ||
14516 | ||
14517 | ||
14518 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000004003a0000, DATA_VA = 0x00000004003e0000 | |
14519 | attr_text { | |
14520 | Name = .MyTRAPS_3, | |
14521 | RA = 0x00000004003a0000, | |
14522 | PA = ra2pa(0x00000004003a0000,0), | |
14523 | part_0_ctx_zero_tsb_config_3, | |
14524 | part_0_ctx_nonzero_tsb_config_3, | |
14525 | TTE_G = 1, | |
14526 | TTE_Context = 0, | |
14527 | TTE_V = 1, | |
14528 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14529 | TTE_NFO = 1, | |
14530 | TTE_IE = 0, | |
14531 | TTE_Soft2 = 0, | |
14532 | TTE_Diag = 0, | |
14533 | TTE_Soft = 0, | |
14534 | TTE_L = 0, | |
14535 | TTE_CP = 0, | |
14536 | TTE_CV = 1, | |
14537 | TTE_E = 1, | |
14538 | TTE_P = 0, | |
14539 | TTE_W = 0, | |
14540 | TTE_X = 1 | |
14541 | } | |
14542 | ||
14543 | ||
14544 | attr_data { | |
14545 | Name = .MyTRAPS_3, | |
14546 | RA = 0x00000004003e0000, | |
14547 | PA = ra2pa(0x00000004003e0000,0), | |
14548 | part_0_ctx_zero_tsb_config_3, | |
14549 | part_0_ctx_nonzero_tsb_config_3, | |
14550 | TTE_G = 1, | |
14551 | TTE_Context = 0, | |
14552 | TTE_V = 1, | |
14553 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
14554 | TTE_NFO = 1, | |
14555 | TTE_IE = 0, | |
14556 | TTE_Soft2 = 0, | |
14557 | TTE_Diag = 0, | |
14558 | TTE_Soft = 0, | |
14559 | TTE_L = 0, | |
14560 | TTE_CP = 1, | |
14561 | TTE_CV = 1, | |
14562 | TTE_E = 0, | |
14563 | TTE_P = 1, | |
14564 | TTE_W = 0 | |
14565 | } | |
14566 | ||
14567 | #include "traps.s" | |
14568 | ||
14569 | ||
14570 | ||
14571 | ||
14572 | ||
14573 | SECTION .MyDATA_0 TEXT_VA = 0x00000000e0140000, DATA_VA = 0x0000000060140000 | |
14574 | attr_data { | |
14575 | Name = .MyDATA_0, | |
14576 | RA = 0x0000000170100000, | |
14577 | PA = ra2pa(0x0000000170100000,0), | |
14578 | part_0_ctx_zero_tsb_config_0, | |
14579 | part_0_ctx_nonzero_tsb_config_0, | |
14580 | TTE_G = 1, | |
14581 | TTE_Context = PCONTEXT, | |
14582 | TTE_V = 1, | |
14583 | TTE_Size = 0, | |
14584 | TTE_NFO = 1, | |
14585 | TTE_IE = 0, | |
14586 | TTE_Soft2 = 0, | |
14587 | TTE_Diag = 0, | |
14588 | TTE_Soft = 0, | |
14589 | TTE_L = 0, | |
14590 | TTE_CP = 0, | |
14591 | TTE_CV = 0, | |
14592 | TTE_E = 0, | |
14593 | TTE_P = 1, | |
14594 | TTE_W = 1 | |
14595 | } | |
14596 | ||
14597 | ||
14598 | attr_data { | |
14599 | Name = .MyDATA_0, | |
14600 | RA = 0x0000000170100000, | |
14601 | PA = ra2pa(0x0000000170100000,0), | |
14602 | part_0_ctx_zero_tsb_config_1, | |
14603 | part_0_ctx_nonzero_tsb_config_1, | |
14604 | TTE_G = 1, | |
14605 | TTE_Context = SCONTEXT, | |
14606 | TTE_V = 1, | |
14607 | TTE_Size = 1, | |
14608 | TTE_NFO = 1, | |
14609 | TTE_IE = 0, | |
14610 | TTE_Soft2 = 0, | |
14611 | TTE_Diag = 0, | |
14612 | TTE_Soft = 0, | |
14613 | TTE_L = 0, | |
14614 | TTE_CP = 1, | |
14615 | TTE_CV = 1, | |
14616 | TTE_E = 1, | |
14617 | TTE_P = 1, | |
14618 | TTE_W = 0, | |
14619 | tsbonly | |
14620 | } | |
14621 | ||
14622 | ||
14623 | attr_data { | |
14624 | Name = .MyDATA_0, | |
14625 | hypervisor | |
14626 | } | |
14627 | ||
14628 | ||
14629 | attr_text { | |
14630 | Name = .MyDATA_0, | |
14631 | hypervisor | |
14632 | } | |
14633 | ||
14634 | .data | |
14635 | .xword 0xadbcb9fe0db522ee | |
14636 | .xword 0x82321168769a579d | |
14637 | .xword 0x559b7899738a5961 | |
14638 | .xword 0x75592c2dad7325d4 | |
14639 | .xword 0x9ba274ced70cbb23 | |
14640 | .xword 0x856363950d962008 | |
14641 | .xword 0x15c08e97f1c59780 | |
14642 | .xword 0xa28b4e649dcc362f | |
14643 | .xword 0xa836e39947cefc87 | |
14644 | .xword 0x8a9692e17740a02f | |
14645 | .xword 0x9b1ca9737df988d2 | |
14646 | .xword 0xe03936ff494e5bde | |
14647 | .xword 0x21b2a981306f4452 | |
14648 | .xword 0xb5bd42dbfa2a1b0a | |
14649 | .xword 0x188c36e9794c1d6a | |
14650 | .xword 0xba303a0fa0779bae | |
14651 | .xword 0x754b09e7f01c797e | |
14652 | .xword 0x7c9447ea411af73f | |
14653 | .xword 0x63dd08f7cd3fe7af | |
14654 | .xword 0x1910e9bfeebf4c83 | |
14655 | .xword 0x72acc2784c4b1d17 | |
14656 | .xword 0x8f307241e553b7e7 | |
14657 | .xword 0xa7d8ae7509cfd651 | |
14658 | .xword 0xcff820132719aec7 | |
14659 | .xword 0xe7cb9f367c9f02ee | |
14660 | .xword 0xa3e279d4d2371c26 | |
14661 | .xword 0xc5ed9f3dce76af51 | |
14662 | .xword 0x47a57ad2fddc786a | |
14663 | .xword 0xc1febd9f87e7a587 | |
14664 | .xword 0x87dd5df641b8baf9 | |
14665 | .xword 0x07eb8b09dbf4fdd3 | |
14666 | .xword 0x5c0456b242092454 | |
14667 | ||
14668 | ||
14669 | ||
14670 | SECTION .MyDATA_1 TEXT_VA = 0x00000000e0340000, DATA_VA = 0x0000000060340000 | |
14671 | attr_data { | |
14672 | Name = .MyDATA_1, | |
14673 | RA = 0x0000000170300000, | |
14674 | PA = ra2pa(0x0000000170300000,0), | |
14675 | part_0_ctx_zero_tsb_config_0, | |
14676 | part_0_ctx_nonzero_tsb_config_0, | |
14677 | TTE_G = 1, | |
14678 | TTE_Context = PCONTEXT, | |
14679 | TTE_V = 1, | |
14680 | TTE_Size = 3, | |
14681 | TTE_NFO = 0, | |
14682 | TTE_IE = 1, | |
14683 | TTE_Soft2 = 0, | |
14684 | TTE_Diag = 0, | |
14685 | TTE_Soft = 0, | |
14686 | TTE_L = 0, | |
14687 | TTE_CP = 0, | |
14688 | TTE_CV = 0, | |
14689 | TTE_E = 0, | |
14690 | TTE_P = 0, | |
14691 | TTE_W = 1 | |
14692 | } | |
14693 | ||
14694 | ||
14695 | attr_data { | |
14696 | Name = .MyDATA_1, | |
14697 | RA = 0x0000000170300000, | |
14698 | PA = ra2pa(0x0000000170300000,0), | |
14699 | part_0_ctx_zero_tsb_config_1, | |
14700 | part_0_ctx_nonzero_tsb_config_1, | |
14701 | TTE_G = 1, | |
14702 | TTE_Context = SCONTEXT, | |
14703 | TTE_V = 1, | |
14704 | TTE_Size = 1, | |
14705 | TTE_NFO = 0, | |
14706 | TTE_IE = 0, | |
14707 | TTE_Soft2 = 0, | |
14708 | TTE_Diag = 0, | |
14709 | TTE_Soft = 0, | |
14710 | TTE_L = 0, | |
14711 | TTE_CP = 0, | |
14712 | TTE_CV = 0, | |
14713 | TTE_E = 1, | |
14714 | TTE_P = 1, | |
14715 | TTE_W = 0, | |
14716 | tsbonly | |
14717 | } | |
14718 | ||
14719 | ||
14720 | attr_data { | |
14721 | Name = .MyDATA_1, | |
14722 | hypervisor | |
14723 | } | |
14724 | ||
14725 | ||
14726 | attr_text { | |
14727 | Name = .MyDATA_1, | |
14728 | hypervisor | |
14729 | } | |
14730 | ||
14731 | .data | |
14732 | .xword 0x3bf5143990fa3374 | |
14733 | .xword 0x6a9656c8329be568 | |
14734 | .xword 0xf3b0825fe9958db6 | |
14735 | .xword 0xac3f198721d31667 | |
14736 | .xword 0x80884eceba38392d | |
14737 | .xword 0x2691311b81d578e3 | |
14738 | .xword 0x36f5154d7849e5d0 | |
14739 | .xword 0x56b388afbba14f1e | |
14740 | .xword 0x126107f5095980d0 | |
14741 | .xword 0xa2bb9476d451cd33 | |
14742 | .xword 0x4a1b5e2fabb4071e | |
14743 | .xword 0x41a45752651b7587 | |
14744 | .xword 0x8cecba2a7d0d0712 | |
14745 | .xword 0xba2da4b82c3dd891 | |
14746 | .xword 0x04cf6722684545d5 | |
14747 | .xword 0xbfadb713c0fce376 | |
14748 | .xword 0xc381681a0f742911 | |
14749 | .xword 0xe62056826625b722 | |
14750 | .xword 0xf517952e0591cc71 | |
14751 | .xword 0xe7e4649071a5ca2d | |
14752 | .xword 0x2efd4cb11d4ee96c | |
14753 | .xword 0x13bd653ae95a7a6e | |
14754 | .xword 0x4de729fc0ea4cccc | |
14755 | .xword 0x341871faac9d725e | |
14756 | .xword 0x3cff2d45e08a2c9f | |
14757 | .xword 0x48224df08077b262 | |
14758 | .xword 0xdeb2a0e421801500 | |
14759 | .xword 0x960283c561058dc6 | |
14760 | .xword 0x24b9b5043adcec3b | |
14761 | .xword 0x8c92375ab5e69e75 | |
14762 | .xword 0xcdf453f8e1efd19b | |
14763 | .xword 0xefc916916edfa184 | |
14764 | ||
14765 | ||
14766 | ||
14767 | SECTION .MyDATA_2 TEXT_VA = 0x00000000e0540000, DATA_VA = 0x0000000060540000 | |
14768 | attr_data { | |
14769 | Name = .MyDATA_2, | |
14770 | RA = 0x0000000170500000, | |
14771 | PA = ra2pa(0x0000000170500000,0), | |
14772 | part_0_ctx_zero_tsb_config_0, | |
14773 | part_0_ctx_nonzero_tsb_config_0, | |
14774 | TTE_G = 1, | |
14775 | TTE_Context = PCONTEXT, | |
14776 | TTE_V = 1, | |
14777 | TTE_Size = 5, | |
14778 | TTE_NFO = 0, | |
14779 | TTE_IE = 1, | |
14780 | TTE_Soft2 = 0, | |
14781 | TTE_Diag = 0, | |
14782 | TTE_Soft = 0, | |
14783 | TTE_L = 0, | |
14784 | TTE_CP = 0, | |
14785 | TTE_CV = 0, | |
14786 | TTE_E = 0, | |
14787 | TTE_P = 0, | |
14788 | TTE_W = 0 | |
14789 | } | |
14790 | ||
14791 | ||
14792 | attr_data { | |
14793 | Name = .MyDATA_2, | |
14794 | RA = 0x0000000170500000, | |
14795 | PA = ra2pa(0x0000000170500000,0), | |
14796 | part_0_ctx_zero_tsb_config_1, | |
14797 | part_0_ctx_nonzero_tsb_config_1, | |
14798 | TTE_G = 1, | |
14799 | TTE_Context = SCONTEXT, | |
14800 | TTE_V = 1, | |
14801 | TTE_Size = 3, | |
14802 | TTE_NFO = 1, | |
14803 | TTE_IE = 0, | |
14804 | TTE_Soft2 = 0, | |
14805 | TTE_Diag = 0, | |
14806 | TTE_Soft = 0, | |
14807 | TTE_L = 0, | |
14808 | TTE_CP = 1, | |
14809 | TTE_CV = 0, | |
14810 | TTE_E = 0, | |
14811 | TTE_P = 1, | |
14812 | TTE_W = 0, | |
14813 | tsbonly | |
14814 | } | |
14815 | ||
14816 | ||
14817 | attr_data { | |
14818 | Name = .MyDATA_2, | |
14819 | hypervisor | |
14820 | } | |
14821 | ||
14822 | ||
14823 | attr_text { | |
14824 | Name = .MyDATA_2, | |
14825 | hypervisor | |
14826 | } | |
14827 | ||
14828 | .data | |
14829 | .xword 0xc6fd48ec592b4fd3 | |
14830 | .xword 0xec2bc93de76aa86b | |
14831 | .xword 0x8114370878c84b6c | |
14832 | .xword 0x4a6b52c1c6c29a0b | |
14833 | .xword 0x485e6503c0a3e4b5 | |
14834 | .xword 0xdc473d67293cbc2e | |
14835 | .xword 0xc21806a6a8d7f130 | |
14836 | .xword 0x69a6f7c67ae14024 | |
14837 | .xword 0x85f3a2c0474b8533 | |
14838 | .xword 0xfeaa946e188c884b | |
14839 | .xword 0xd5f04b08abe683c0 | |
14840 | .xword 0x5f7e31cb39c66470 | |
14841 | .xword 0x0d00ed55173845c2 | |
14842 | .xword 0x341a27672ca98a5c | |
14843 | .xword 0x574c48dc185f8aa4 | |
14844 | .xword 0x8079332bc931c0fa | |
14845 | .xword 0x6c4de8fbc91c9714 | |
14846 | .xword 0x618132a839086f23 | |
14847 | .xword 0x105b8d83d5071e9b | |
14848 | .xword 0xc24376a21338b583 | |
14849 | .xword 0xc4f35e78a0770f00 | |
14850 | .xword 0x1b661f9a6858dbda | |
14851 | .xword 0xec166d22d2420ccb | |
14852 | .xword 0x6449aacf49909218 | |
14853 | .xword 0x454ad3a048bae494 | |
14854 | .xword 0x24cc85c46879d0c0 | |
14855 | .xword 0xb8e92fdec3d9a27e | |
14856 | .xword 0x4c122023c227cf78 | |
14857 | .xword 0x29546c611364cb6d | |
14858 | .xword 0xdb3fcb1dce606d86 | |
14859 | .xword 0xce891ce0eb58cf34 | |
14860 | .xword 0x6fe50a00bb270220 | |
14861 | ||
14862 | ||
14863 | ||
14864 | SECTION .MyDATA_3 TEXT_VA = 0x00000000e0740000, DATA_VA = 0x0000000060740000 | |
14865 | attr_data { | |
14866 | Name = .MyDATA_3, | |
14867 | RA = 0x0000000170700000, | |
14868 | PA = ra2pa(0x0000000170700000,0), | |
14869 | part_0_ctx_zero_tsb_config_0, | |
14870 | part_0_ctx_nonzero_tsb_config_0, | |
14871 | TTE_G = 1, | |
14872 | TTE_Context = PCONTEXT, | |
14873 | TTE_V = 1, | |
14874 | TTE_Size = 0, | |
14875 | TTE_NFO = 1, | |
14876 | TTE_IE = 1, | |
14877 | TTE_Soft2 = 0, | |
14878 | TTE_Diag = 0, | |
14879 | TTE_Soft = 0, | |
14880 | TTE_L = 0, | |
14881 | TTE_CP = 0, | |
14882 | TTE_CV = 1, | |
14883 | TTE_E = 0, | |
14884 | TTE_P = 1, | |
14885 | TTE_W = 1 | |
14886 | } | |
14887 | ||
14888 | ||
14889 | attr_data { | |
14890 | Name = .MyDATA_3, | |
14891 | RA = 0x0000000170700000, | |
14892 | PA = ra2pa(0x0000000170700000,0), | |
14893 | part_0_ctx_zero_tsb_config_1, | |
14894 | part_0_ctx_nonzero_tsb_config_1, | |
14895 | TTE_G = 1, | |
14896 | TTE_Context = SCONTEXT, | |
14897 | TTE_V = 1, | |
14898 | TTE_Size = 3, | |
14899 | TTE_NFO = 1, | |
14900 | TTE_IE = 1, | |
14901 | TTE_Soft2 = 0, | |
14902 | TTE_Diag = 0, | |
14903 | TTE_Soft = 0, | |
14904 | TTE_L = 0, | |
14905 | TTE_CP = 1, | |
14906 | TTE_CV = 1, | |
14907 | TTE_E = 0, | |
14908 | TTE_P = 0, | |
14909 | TTE_W = 1, | |
14910 | tsbonly | |
14911 | } | |
14912 | ||
14913 | ||
14914 | attr_data { | |
14915 | Name = .MyDATA_3, | |
14916 | hypervisor | |
14917 | } | |
14918 | ||
14919 | ||
14920 | attr_text { | |
14921 | Name = .MyDATA_3, | |
14922 | hypervisor | |
14923 | } | |
14924 | ||
14925 | .data | |
14926 | .xword 0x8e39c2008ffac6ee | |
14927 | .xword 0x1446f94751185c7e | |
14928 | .xword 0x714db9f489be51e9 | |
14929 | .xword 0xceb1a02a689fa5d8 | |
14930 | .xword 0xc826e1be1e2bfb8d | |
14931 | .xword 0x0b359b3c3b74e428 | |
14932 | .xword 0x9c6ef73e70fed9b6 | |
14933 | .xword 0x038e5bc0aa292df7 | |
14934 | .xword 0x8f781736ef4d51b3 | |
14935 | .xword 0x4fa7e19307036507 | |
14936 | .xword 0xc960c8a09c8c4930 | |
14937 | .xword 0x35f043c639fa0893 | |
14938 | .xword 0x4c5a637831ffeb24 | |
14939 | .xword 0x09e2eb04bf9335dd | |
14940 | .xword 0xff94ce0c9f76378a | |
14941 | .xword 0x8cebfd1fcac0357e | |
14942 | .xword 0x79d4b780c97bdc42 | |
14943 | .xword 0xda57435a582dee0c | |
14944 | .xword 0xb755994cfd10c589 | |
14945 | .xword 0xb0f04ad165efdb89 | |
14946 | .xword 0xaa6e3c09bdeddc16 | |
14947 | .xword 0xf9ef5a46db47dc71 | |
14948 | .xword 0x362a1093fa403046 | |
14949 | .xword 0xf9e6365b00c84ff8 | |
14950 | .xword 0x8c458c39777c54c1 | |
14951 | .xword 0x125aaa9c072562dd | |
14952 | .xword 0xd7d8003fe608b85e | |
14953 | .xword 0x6025cee34a16369b | |
14954 | .xword 0x03569d84dbf872d3 | |
14955 | .xword 0x10ae1fe769533687 | |
14956 | .xword 0x770681e808785463 | |
14957 | .xword 0x41d0b3b459feda7c | |
14958 | ||
14959 | ||
14960 | ||
14961 | ||
14962 | ||
14963 | SECTION .MyTEXT_0 TEXT_VA = 0x00000000e0200000 | |
14964 | attr_text { | |
14965 | Name = .MyTEXT_0, | |
14966 | RA = 0x00000000e0200000, | |
14967 | PA = ra2pa(0x00000000e0200000,0), | |
14968 | part_0_ctx_zero_tsb_config_1, | |
14969 | part_0_ctx_nonzero_tsb_config_1, | |
14970 | TTE_G = 1, | |
14971 | TTE_Context = PCONTEXT, | |
14972 | TTE_V = 1, | |
14973 | TTE_Size = 3, | |
14974 | TTE_NFO = 0, | |
14975 | TTE_IE = 1, | |
14976 | TTE_Soft2 = 0, | |
14977 | TTE_Diag = 0, | |
14978 | TTE_Soft = 0, | |
14979 | TTE_L = 0, | |
14980 | TTE_CP = 0, | |
14981 | TTE_CV = 0, | |
14982 | TTE_E = 0, | |
14983 | TTE_P = 1, | |
14984 | TTE_W = 0 | |
14985 | } | |
14986 | ||
14987 | .text | |
14988 | nuff_said_0: | |
14989 | fdivd %f0, %f4, %f4 | |
14990 | jmpl %r27+8, %r0 | |
14991 | fdivs %f0, %f4, %f4 | |
14992 | ||
14993 | ||
14994 | ||
14995 | SECTION .MyTEXT_1 TEXT_VA = 0x00000000e0a00000 | |
14996 | attr_text { | |
14997 | Name = .MyTEXT_1, | |
14998 | RA = 0x00000000e0a00000, | |
14999 | PA = ra2pa(0x00000000e0a00000,0), | |
15000 | part_0_ctx_zero_tsb_config_1, | |
15001 | part_0_ctx_nonzero_tsb_config_1, | |
15002 | TTE_G = 1, | |
15003 | TTE_Context = PCONTEXT, | |
15004 | TTE_V = 1, | |
15005 | TTE_Size = 5, | |
15006 | TTE_NFO = 0, | |
15007 | TTE_IE = 0, | |
15008 | TTE_Soft2 = 0, | |
15009 | TTE_Diag = 0, | |
15010 | TTE_Soft = 0, | |
15011 | TTE_L = 0, | |
15012 | TTE_CP = 0, | |
15013 | TTE_CV = 0, | |
15014 | TTE_E = 1, | |
15015 | TTE_P = 0, | |
15016 | TTE_W = 0 | |
15017 | } | |
15018 | ||
15019 | .text | |
15020 | nuff_said_1: | |
15021 | fdivs %f0, %f4, %f8 | |
15022 | jmpl %r27+8, %r0 | |
15023 | fdivd %f0, %f4, %f4 | |
15024 | ||
15025 | ||
15026 | ||
15027 | SECTION .MyTEXT_2 TEXT_VA = 0x00000000e1200000 | |
15028 | attr_text { | |
15029 | Name = .MyTEXT_2, | |
15030 | RA = 0x00000000e1200000, | |
15031 | PA = ra2pa(0x00000000e1200000,0), | |
15032 | part_0_ctx_zero_tsb_config_1, | |
15033 | part_0_ctx_nonzero_tsb_config_1, | |
15034 | TTE_G = 1, | |
15035 | TTE_Context = PCONTEXT, | |
15036 | TTE_V = 1, | |
15037 | TTE_Size = 3, | |
15038 | TTE_NFO = 0, | |
15039 | TTE_IE = 1, | |
15040 | TTE_Soft2 = 0, | |
15041 | TTE_Diag = 0, | |
15042 | TTE_Soft = 0, | |
15043 | TTE_L = 0, | |
15044 | TTE_CP = 1, | |
15045 | TTE_CV = 1, | |
15046 | TTE_E = 0, | |
15047 | TTE_P = 1, | |
15048 | TTE_W = 0 | |
15049 | } | |
15050 | ||
15051 | .text | |
15052 | nuff_said_2: | |
15053 | fdivd %f0, %f4, %f8 | |
15054 | jmpl %r27+8, %r0 | |
15055 | fdivs %f0, %f4, %f4 | |
15056 | ||
15057 | ||
15058 | ||
15059 | SECTION .MyTEXT_3 TEXT_VA = 0x00000000e1a00000 | |
15060 | attr_text { | |
15061 | Name = .MyTEXT_3, | |
15062 | RA = 0x00000000e1a00000, | |
15063 | PA = ra2pa(0x00000000e1a00000,0), | |
15064 | part_0_ctx_zero_tsb_config_1, | |
15065 | part_0_ctx_nonzero_tsb_config_1, | |
15066 | TTE_G = 1, | |
15067 | TTE_Context = PCONTEXT, | |
15068 | TTE_V = 1, | |
15069 | TTE_Size = 1, | |
15070 | TTE_NFO = 0, | |
15071 | TTE_IE = 1, | |
15072 | TTE_Soft2 = 0, | |
15073 | TTE_Diag = 0, | |
15074 | TTE_Soft = 0, | |
15075 | TTE_L = 0, | |
15076 | TTE_CP = 1, | |
15077 | TTE_CV = 1, | |
15078 | TTE_E = 1, | |
15079 | TTE_P = 0, | |
15080 | TTE_W = 0 | |
15081 | } | |
15082 | ||
15083 | .text | |
15084 | nuff_said_3: | |
15085 | fdivs %f0, %f4, %f4 | |
15086 | jmpl %r27+8, %r0 | |
15087 | fdivd %f0, %f4, %f8 | |
15088 | ||
15089 | ||
15090 | ||
15091 | ||
15092 | ||
15093 | SECTION .VaHOLE_0 TEXT_VA = 0x00007fffffffe000 | |
15094 | attr_text { | |
15095 | Name = .VaHOLE_0, | |
15096 | RA = 0x00000000ffffe000, | |
15097 | PA = ra2pa(0x00000000ffffe000,0), | |
15098 | part_0_ctx_zero_tsb_config_1, | |
15099 | part_0_ctx_nonzero_tsb_config_1, | |
15100 | TTE_G = 1, | |
15101 | TTE_Context = PCONTEXT, | |
15102 | TTE_V = 1, | |
15103 | TTE_Size = 1, | |
15104 | TTE_NFO = 0, | |
15105 | TTE_IE = 0, | |
15106 | TTE_Soft2 = 0, | |
15107 | TTE_Diag = 0, | |
15108 | TTE_Soft = 0, | |
15109 | TTE_L = 0, | |
15110 | TTE_CP = 0, | |
15111 | TTE_CV = 1, | |
15112 | TTE_E = 1, | |
15113 | TTE_P = 0, | |
15114 | TTE_W = 0, | |
15115 | TTE_X = 1 | |
15116 | } | |
15117 | ||
15118 | .text | |
15119 | .global vahole_target0 | |
15120 | .text | |
15121 | .global vahole_target1 | |
15122 | .text | |
15123 | .global vahole_target2 | |
15124 | .text | |
15125 | .global vahole_target3 | |
15126 | nop | |
15127 | .align 4096 | |
15128 | nop | |
15129 | .align 2048 | |
15130 | nop | |
15131 | .align 1024 | |
15132 | nop | |
15133 | .align 512 | |
15134 | nop | |
15135 | .align 256 | |
15136 | nop | |
15137 | .align 128 | |
15138 | nop | |
15139 | .align 64 | |
15140 | nop | |
15141 | nop | |
15142 | .align 16 | |
15143 | nop;nop;nop | |
15144 | vahole_target0: nop;nop | |
15145 | vahole_target1: nop | |
15146 | vahole_target2: nop;nop;nop | |
15147 | vahole_target3: nop;nop;nop | |
15148 | ||
15149 | ||
15150 | ||
15151 | ||
15152 | ||
15153 | SECTION .VaHOLEL_0 TEXT_VA = 0x00000000ffffe000 | |
15154 | attr_text { | |
15155 | Name = .VaHOLEL_0, | |
15156 | RA = 0x00000000ffffe000, | |
15157 | PA = ra2pa(0x00000000ffffe000,0), | |
15158 | part_0_ctx_zero_tsb_config_0, | |
15159 | part_0_ctx_nonzero_tsb_config_0, | |
15160 | TTE_G = 1, | |
15161 | TTE_Context = PCONTEXT, | |
15162 | TTE_V = 1, | |
15163 | TTE_Size = 0, | |
15164 | TTE_NFO = 0, | |
15165 | TTE_IE = 1, | |
15166 | TTE_Soft2 = 0, | |
15167 | TTE_Diag = 0, | |
15168 | TTE_Soft = 0, | |
15169 | TTE_L = 0, | |
15170 | TTE_CP = 1, | |
15171 | TTE_CV = 1, | |
15172 | TTE_E = 1, | |
15173 | TTE_P = 0, | |
15174 | TTE_W = 0, | |
15175 | TTE_X = 1, | |
15176 | tsbonly | |
15177 | } | |
15178 | ||
15179 | .text | |
15180 | nop | |
15181 | ||
15182 | ||
15183 | ||
15184 | ||
15185 | ||
15186 | SECTION .ZERO_0 TEXT_VA = 0x0000000000000000 | |
15187 | attr_text { | |
15188 | Name = .ZERO_0, | |
15189 | RA = 0x0000000000000000, | |
15190 | PA = ra2pa(0x0000000000000000,0), | |
15191 | part_0_ctx_zero_tsb_config_1, | |
15192 | part_0_ctx_nonzero_tsb_config_1, | |
15193 | TTE_G = 1, | |
15194 | TTE_Context = 0x44, | |
15195 | TTE_V = 1, | |
15196 | TTE_Size = 0, | |
15197 | TTE_NFO = 0, | |
15198 | TTE_IE = 1, | |
15199 | TTE_Soft2 = 0, | |
15200 | TTE_Diag = 0, | |
15201 | TTE_Soft = 0, | |
15202 | TTE_L = 0, | |
15203 | TTE_CP = 0, | |
15204 | TTE_CV = 0, | |
15205 | TTE_E = 1, | |
15206 | TTE_P = 0, | |
15207 | TTE_W = 1, | |
15208 | TTE_X = 1 | |
15209 | } | |
15210 | ||
15211 | ||
15212 | .text | |
15213 | nop | |
15214 | nop | |
15215 | jmpl %r27+8, %r0 | |
15216 | nop | |
15217 | nop | |
15218 | nop | |
15219 | nop | |
15220 | nop | |
15221 | ||
15222 | Power_On_Reset: | |
15223 | setx HRedmode_Reset_Handler, %g1, %g2 | |
15224 | jmp %g2 | |
15225 | nop | |
15226 | .align 32 | |
15227 | ||
15228 | Watchdog_Reset: | |
15229 | setx wdog_red_ext, %g1, %g2 | |
15230 | jmp %g2 | |
15231 | nop | |
15232 | .align 32 | |
15233 | ||
15234 | External_Reset: | |
15235 | My_External_Reset | |
15236 | ||
15237 | .align 32 | |
15238 | ||
15239 | Software_Initiated_Reset: | |
15240 | setx Software_Reset_Handler, %g1, %g2 | |
15241 | jmp %g2 | |
15242 | nop | |
15243 | ||
15244 | .align 32 | |
15245 | ||
15246 | ||
15247 | RED_Mode_Other_Reset: | |
15248 | ! IF TL=6, shift stack by one .. | |
15249 | rdpr %tl, %l1 | |
15250 | cmp %l1, 6 | |
15251 | be start_tsa_shift | |
15252 | nop | |
15253 | ||
15254 | continue_red_other: | |
15255 | mov 0x1f, %l1 | |
15256 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
15257 | ||
15258 | rdpr %tt, %l1 | |
15259 | ||
15260 | rdhpr %htstate, %l2 | |
15261 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv | |
15262 | brnz,a %l2, red_goto_handler | |
15263 | rdhpr %htba, %l2 | |
15264 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. | |
15265 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. | |
15266 | be,a red_goto_handler | |
15267 | rdpr %tba, %l2 | |
15268 | rdhpr %htba, %l2 | |
15269 | red_goto_handler: | |
15270 | ||
15271 | sllx %l1, 5, %l1 | |
15272 | add %l1, %l2, %l2 | |
15273 | rdhpr %hpstate, %l1 | |
15274 | jmp %l2 | |
15275 | wrhpr %l1, 0x20, %hpstate | |
15276 | nop | |
15277 | ||
15278 | wdog_red_ext: | |
15279 | ! Shift stack down by 1 ... | |
15280 | rdpr %tl, %l1 | |
15281 | cmp %l1, 6 | |
15282 | bl wdog_end | |
15283 | start_tsa_shift: | |
15284 | mov 0x2, %l2 | |
15285 | ||
15286 | tsa_shift: | |
15287 | wrpr %l2, %tl | |
15288 | rdpr %tt, %l3 | |
15289 | rdpr %tpc, %l4 | |
15290 | rdpr %tnpc, %l5 | |
15291 | rdpr %tstate, %l6 | |
15292 | rdhpr %htstate, %l7 | |
15293 | dec %l2 | |
15294 | wrpr %l2, %tl | |
15295 | wrpr %l3, %tt | |
15296 | wrpr %l4, %tpc | |
15297 | wrpr %l5, %tnpc | |
15298 | wrpr %l6, %tstate | |
15299 | wrhpr %l7, %htstate | |
15300 | add %l2, 2, %l2 | |
15301 | cmp %l2, %l1 | |
15302 | ble tsa_shift | |
15303 | nop | |
15304 | tsa_shift_done: | |
15305 | dec %l1 | |
15306 | wrpr %l1, %tl | |
15307 | ||
15308 | wdog_end: | |
15309 | ! If TT != 2, then goto trap handler | |
15310 | rdpr %tt, %l1 | |
15311 | ||
15312 | cmp %l1, 0x2 | |
15313 | bne continue_red_other | |
15314 | nop | |
15315 | ! else done | |
15316 | mov 0x1f, %l1 | |
15317 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
15318 | done | |
15319 | ||
15320 | ||
15321 | ||
15322 | ||
15323 | SECTION .VaHOLE_PA_0 TEXT_VA = 0x000000ffffffe000 | |
15324 | attr_text { | |
15325 | Name = .VAHOLE_PA_0, | |
15326 | hypervisor | |
15327 | } | |
15328 | ||
15329 | nop | |
15330 | .align 4096 | |
15331 | nop | |
15332 | .align 2048 | |
15333 | nop | |
15334 | .align 1024 | |
15335 | nop | |
15336 | .align 512 | |
15337 | nop | |
15338 | .align 256 | |
15339 | nop | |
15340 | .align 128 | |
15341 | nop | |
15342 | .align 64 | |
15343 | nop | |
15344 | nop | |
15345 | .align 16 | |
15346 | nop;nop;nop | |
15347 | nop | |
15348 | nop | |
15349 | jmpl %r27+8, %r0 | |
15350 | nop | |
15351 | nop | |
15352 | nop | |
15353 | jmpl %r27+8, %r0 | |
15354 | nop | |
15355 | ||
15356 | ||
15357 | ||
15358 | #if 0 | |
15359 | #endif |