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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: tlu_rand05_ind_03.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define TRAP_SECT_HV_ALSO | |
39 | #define DMMU_SKIP_IF_NO_TTE | |
40 | #define IMMU_SKIP_IF_NO_TTE | |
41 | ||
42 | #define MAIN_PAGE_NUCLEUS_ALSO | |
43 | #define MAIN_PAGE_HV_ALSO | |
44 | #define MAIN_PAGE_VA_IS_RA_ALSO | |
45 | #define DISABLE_PART_LIMIT_CHECK | |
46 | # 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
47 | !!!!!!!!!!!!!!!!!!!!!!!!! | |
48 | !! Disable trap checking | |
49 | #define NO_TRAPCHECK | |
50 | ||
51 | ! Enable Traps | |
52 | #define ENABLE_T1_Privileged_Opcode_0x11 | |
53 | #define ENABLE_T1_Fp_Disabled_0x20 | |
54 | #define ENABLE_HT0_Watchdog_Reset_0x02 | |
55 | ||
56 | #define FILL_TRAP_RETRY | |
57 | #define SPILL_TRAP_RETRY | |
58 | #define CLEAN_WIN_RETRY | |
59 | ||
60 | #define My_RED_Mode_Other_Reset | |
61 | #define My_RED_Mode_Other_Reset \ | |
62 | ba red_other_ext;\ | |
63 | nop;retry;nop;nop;nop;nop;nop | |
64 | # 24 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
65 | #define H_T1_Clean_Window_0x24 | |
66 | #define SUN_H_T1_Clean_Window_0x24 \ | |
67 | rdpr %cleanwin, %l1;\ | |
68 | add %l1,1,%l1;\ | |
69 | wrpr %l1, %g0, %cleanwin;\ | |
70 | retry; nop; nop; nop; nop | |
71 | ||
72 | #define H_T1_Clean_Window_0x25 | |
73 | #define SUN_H_T1_Clean_Window_0x25 \ | |
74 | rdpr %cleanwin, %l1;\ | |
75 | add %l1,1,%l1;\ | |
76 | wrpr %l1, %g0, %cleanwin;\ | |
77 | retry; nop; nop; nop; nop | |
78 | ||
79 | #define H_T1_Clean_Window_0x26 | |
80 | #define SUN_H_T1_Clean_Window_0x26 \ | |
81 | rdpr %cleanwin, %l1;\ | |
82 | add %l1,1,%l1;\ | |
83 | wrpr %l1, %g0, %cleanwin;\ | |
84 | retry; nop; nop; nop; nop | |
85 | ||
86 | #define H_T1_Clean_Window_0x27 | |
87 | #define SUN_H_T1_Clean_Window_0x27 \ | |
88 | rdpr %cleanwin, %l1;\ | |
89 | add %l1,1,%l1;\ | |
90 | wrpr %l1, %g0, %cleanwin;\ | |
91 | retry; nop; nop; nop; nop | |
92 | # 53 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
93 | #define H_HT0_Tag_Overflow | |
94 | #define My_HT0_Tag_Overflow \ | |
95 | done;nop; | |
96 | ||
97 | #define H_T0_Tag_Overflow | |
98 | #define My_T0_Tag_Overflow \ | |
99 | done;nop; | |
100 | ||
101 | #define H_T1_Tag_Overflow_0x23 | |
102 | #define SUN_H_T1_Tag_Overflow_0x23 \ | |
103 | done;nop; | |
104 | ||
105 | #define H_T0_Window_Spill_0_Normal_Trap | |
106 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
107 | ||
108 | #define H_T0_Window_Spill_1_Normal_Trap | |
109 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
110 | ||
111 | #define H_T0_Window_Spill_2_Normal_Trap | |
112 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
113 | ||
114 | #define H_T0_Window_Spill_3_Normal_Trap | |
115 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
116 | ||
117 | #define H_T0_Window_Spill_4_Normal_Trap | |
118 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
119 | ||
120 | #define H_T0_Window_Spill_5_Normal_Trap | |
121 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
122 | ||
123 | #define H_T0_Window_Spill_6_Normal_Trap | |
124 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
125 | ||
126 | #define H_T0_Window_Spill_7_Normal_Trap | |
127 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
128 | ||
129 | #define H_T0_Window_Spill_0_Other_Trap | |
130 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
131 | ||
132 | #define H_T0_Window_Spill_1_Other_Trap | |
133 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
134 | ||
135 | #define H_T0_Window_Spill_2_Other_Trap | |
136 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
137 | ||
138 | #define H_T0_Window_Spill_3_Other_Trap | |
139 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
140 | ||
141 | #define H_T0_Window_Spill_4_Other_Trap | |
142 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
143 | ||
144 | #define H_T0_Window_Spill_5_Other_Trap | |
145 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
146 | ||
147 | #define H_T0_Window_Spill_6_Other_Trap | |
148 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
149 | ||
150 | #define H_T0_Window_Spill_7_Other_Trap | |
151 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
152 | ||
153 | #define H_T0_Window_Fill_0_Normal_Trap | |
154 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
155 | ||
156 | #define H_T0_Window_Fill_1_Normal_Trap | |
157 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
158 | ||
159 | #define H_T0_Window_Fill_2_Normal_Trap | |
160 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
161 | ||
162 | #define H_T0_Window_Fill_3_Normal_Trap | |
163 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
164 | ||
165 | #define H_T0_Window_Fill_4_Normal_Trap | |
166 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
167 | ||
168 | #define H_T0_Window_Fill_5_Normal_Trap | |
169 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
170 | ||
171 | #define H_T0_Window_Fill_6_Normal_Trap | |
172 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
173 | ||
174 | #define H_T0_Window_Fill_7_Normal_Trap | |
175 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
176 | ||
177 | #define H_T0_Window_Fill_0_Other_Trap | |
178 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
179 | ||
180 | #define H_T0_Window_Fill_1_Other_Trap | |
181 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
182 | ||
183 | #define H_T0_Window_Fill_2_Other_Trap | |
184 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
185 | ||
186 | #define H_T0_Window_Fill_3_Other_Trap | |
187 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
188 | ||
189 | #define H_T0_Window_Fill_4_Other_Trap | |
190 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
191 | ||
192 | #define H_T0_Window_Fill_5_Other_Trap | |
193 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
194 | ||
195 | #define H_T0_Window_Fill_6_Other_Trap | |
196 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
197 | ||
198 | #define H_T0_Window_Fill_7_Other_Trap | |
199 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
200 | # 162 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
201 | #define H_T1_Window_Spill_0_Normal_Trap | |
202 | #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
203 | ||
204 | #define H_T1_Window_Spill_1_Normal_Trap | |
205 | #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
206 | ||
207 | #define H_T1_Window_Spill_2_Normal_Trap | |
208 | #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
209 | ||
210 | #define H_T1_Window_Spill_3_Normal_Trap | |
211 | #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
212 | ||
213 | #define H_T1_Window_Spill_4_Normal_Trap | |
214 | #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
215 | ||
216 | #define H_T1_Window_Spill_5_Normal_Trap | |
217 | #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
218 | ||
219 | #define H_T1_Window_Spill_6_Normal_Trap | |
220 | #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
221 | ||
222 | #define H_T1_Window_Spill_7_Normal_Trap | |
223 | #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
224 | ||
225 | #define H_T1_Window_Spill_0_Other_Trap | |
226 | #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
227 | ||
228 | #define H_T1_Window_Spill_1_Other_Trap | |
229 | #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
230 | ||
231 | #define H_T1_Window_Spill_2_Other_Trap | |
232 | #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
233 | ||
234 | #define H_T1_Window_Spill_3_Other_Trap | |
235 | #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
236 | ||
237 | #define H_T1_Window_Spill_4_Other_Trap | |
238 | #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
239 | ||
240 | #define H_T1_Window_Spill_5_Other_Trap | |
241 | #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
242 | ||
243 | #define H_T1_Window_Spill_6_Other_Trap | |
244 | #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
245 | ||
246 | #define H_T1_Window_Spill_7_Other_Trap | |
247 | #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
248 | ||
249 | #define H_T1_Window_Fill_0_Normal_Trap | |
250 | #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
251 | ||
252 | #define H_T1_Window_Fill_1_Normal_Trap | |
253 | #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
254 | ||
255 | #define H_T1_Window_Fill_2_Normal_Trap | |
256 | #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
257 | ||
258 | #define H_T1_Window_Fill_3_Normal_Trap | |
259 | #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
260 | ||
261 | #define H_T1_Window_Fill_4_Normal_Trap | |
262 | #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
263 | ||
264 | #define H_T1_Window_Fill_5_Normal_Trap | |
265 | #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
266 | ||
267 | #define H_T1_Window_Fill_6_Normal_Trap | |
268 | #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
269 | ||
270 | #define H_T1_Window_Fill_7_Normal_Trap | |
271 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
272 | ||
273 | #define H_T1_Window_Fill_0_Other_Trap | |
274 | #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
275 | ||
276 | #define H_T1_Window_Fill_1_Other_Trap | |
277 | #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
278 | ||
279 | #define H_T1_Window_Fill_2_Other_Trap | |
280 | #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
281 | ||
282 | #define H_T1_Window_Fill_3_Other_Trap | |
283 | #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
284 | ||
285 | #define H_T1_Window_Fill_4_Other_Trap | |
286 | #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
287 | ||
288 | #define H_T1_Window_Fill_5_Other_Trap | |
289 | #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
290 | ||
291 | #define H_T1_Window_Fill_6_Other_Trap | |
292 | #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
293 | ||
294 | #define H_T1_Window_Fill_7_Other_Trap | |
295 | #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
296 | ||
297 | #define H_T0_Trap_Instruction_0 | |
298 | #define My_T0_Trap_Instruction_0 \ | |
299 | save %i7, %g0, %i7; \ | |
300 | rdpr %tnpc, %l2; \ | |
301 | wrpr %l2, %tpc; \ | |
302 | add %l2, 4, %l2;\ | |
303 | wrpr %l2, %tnpc; \ | |
304 | stw %l2, [%i7];\ | |
305 | restore %i7, %g0, %i7; \ | |
306 | retry | |
307 | #define H_T0_Trap_Instruction_1 | |
308 | #define My_T0_Trap_Instruction_1 \ | |
309 | umul %o4, 2, %o5;\ | |
310 | rdpr %tnpc, %l2; \ | |
311 | wrpr %l2, %tpc; \ | |
312 | add %l2, 4, %l2;\ | |
313 | wrpr %l2, %tnpc; \ | |
314 | stw %l2, [%i7];\ | |
315 | illtrap;\ | |
316 | retry | |
317 | #define H_T0_Trap_Instruction_2 | |
318 | #define My_T0_Trap_Instruction_2 \ | |
319 | inc %o3;\ | |
320 | umul %o3, 2, %o4;\ | |
321 | ba 1f; \ | |
322 | save %i7, %g0, %i7; \ | |
323 | 2: done; \ | |
324 | nop; \ | |
325 | 1: ba 2b; \ | |
326 | restore %i7, %g0, %i7 | |
327 | #define H_T0_Trap_Instruction_3 | |
328 | #define My_T0_Trap_Instruction_3 \ | |
329 | inc %l3;\ | |
330 | inc %o3;\ | |
331 | umul %o3, 2, %o4;\ | |
332 | stw %o4, [%i7];\ | |
333 | save %i7, %g0, %i7 ;\ | |
334 | restore %i7, %g0, %i7 ;\ | |
335 | done ;\ | |
336 | nop; | |
337 | #define H_T0_Trap_Instruction_4 | |
338 | #define My_T0_Trap_Instruction_4 \ | |
339 | umul %i4, 2, %l5;\ | |
340 | inc %o1;\ | |
341 | rdpr %tnpc, %l2; \ | |
342 | wrpr %l2, %tpc; \ | |
343 | add %l2, 4, %l2;\ | |
344 | wrpr %l2, %tnpc; \ | |
345 | retry ;\ | |
346 | illtrap | |
347 | #define H_T0_Trap_Instruction_5 | |
348 | #define My_T0_Trap_Instruction_5 \ | |
349 | umul %i7, 2, %l1;\ | |
350 | inc %o5;\ | |
351 | rdpr %tnpc, %l2; \ | |
352 | wrpr %l2, %tpc; \ | |
353 | add %l2, 4, %l2;\ | |
354 | wrpr %l2, %tnpc; \ | |
355 | sdiv %r2, %r10, %r0; \ | |
356 | retry | |
357 | ||
358 | #define H_T1_Trap_Instruction_0 | |
359 | #define My_T1_Trap_Instruction_0 \ | |
360 | inc %o4;\ | |
361 | umul %o4, 2, %o5;\ | |
362 | ba 3f; \ | |
363 | save %i7, %g0, %i7; \ | |
364 | 4: done; \ | |
365 | nop; \ | |
366 | 3: ba 4b; \ | |
367 | restore %i7, %g0, %i7 | |
368 | #define H_T1_Trap_Instruction_1 | |
369 | #define My_T1_Trap_Instruction_1 \ | |
370 | umul %o4, 2, %o5;\ | |
371 | rdpr %tnpc, %l2; \ | |
372 | wrpr %l2, %tpc; \ | |
373 | add %l2, 4, %l2;\ | |
374 | stw %l2, [%i7];\ | |
375 | wrpr %l2, %tnpc; \ | |
376 | restore %i7, %g0, %i7 ;;\ | |
377 | retry | |
378 | #define H_T1_Trap_Instruction_2 | |
379 | #define My_T1_Trap_Instruction_2 \ | |
380 | inc %o3;\ | |
381 | umul %o3, 2, %o4;\ | |
382 | ba 5f; \ | |
383 | save %i7, %g0, %i7; \ | |
384 | 6: done; \ | |
385 | nop; \ | |
386 | 5: ba 6b; \ | |
387 | restore %i7, %g0, %i7 | |
388 | #define H_T1_Trap_Instruction_3 | |
389 | #define My_T1_Trap_Instruction_3 \ | |
390 | inc %l3;\ | |
391 | inc %o3;\ | |
392 | umul %o3, 2, %o4;\ | |
393 | inc %i3;\ | |
394 | save %i7, %g0, %i7 ;\ | |
395 | restore %i7, %g0, %i7 ;\ | |
396 | done ;\ | |
397 | nop; | |
398 | #define H_T1_Trap_Instruction_4 | |
399 | #define My_T1_Trap_Instruction_4 \ | |
400 | umul %i4, 2, %l5;\ | |
401 | rdpr %tnpc, %l2; \ | |
402 | wrpr %l2, %tpc; \ | |
403 | stw %l2, [%i7];\ | |
404 | add %l2, 4, %l2;\ | |
405 | wrpr %l2, %tnpc; \ | |
406 | retry ;\ | |
407 | illtrap | |
408 | #define H_T1_Trap_Instruction_5 | |
409 | #define My_T1_Trap_Instruction_5 \ | |
410 | umul %i7, 2, %l1;\ | |
411 | inc %o5;\ | |
412 | rdpr %tnpc, %l2; \ | |
413 | wrpr %l2, %tpc; \ | |
414 | add %l2, 4, %l2;\ | |
415 | wrpr %l2, %tnpc; \ | |
416 | sdiv %r2, %r10, %r0; \ | |
417 | retry | |
418 | ||
419 | #define H_HT0_Trap_Instruction_0 | |
420 | #define My_HT0_Trap_Instruction_0 \ | |
421 | rd %asi, %l2;\ | |
422 | mov 0x80, %l3;\ | |
423 | stxa %l3, [%l3] 0x57;\ | |
424 | stw %l2, [%i7];\ | |
425 | done;\ | |
426 | nop;nop;nop | |
427 | ||
428 | #define H_HT0_Trap_Instruction_1 | |
429 | #define My_HT0_Trap_Instruction_1 \ | |
430 | rd %asi, %l2;\ | |
431 | mov 0x80, %l3;\ | |
432 | stxa %l3, [%l3] 0x5f;\ | |
433 | done;\ | |
434 | nop;nop;nop;nop | |
435 | #define H_HT0_Trap_Instruction_2 | |
436 | #define My_HT0_Trap_Instruction_2 \ | |
437 | umul %i6, 2, %l4;\ | |
438 | stw %l4, [%i7];\ | |
439 | rdpr %tnpc, %l2; \ | |
440 | wrpr %l2, %tpc; \ | |
441 | add %l2, 4, %l2;\ | |
442 | wrpr %l2, %tnpc; \ | |
443 | sdiv %r2, %r0, %r0; \ | |
444 | retry | |
445 | #define H_HT0_Trap_Instruction_3 | |
446 | #define My_HT0_Trap_Instruction_3 \ | |
447 | umul %i5, 3, %l3;\ | |
448 | inc %o6;\ | |
449 | illtrap ;\ | |
450 | rdpr %tnpc, %l2; \ | |
451 | wrpr %l2, %tpc; \ | |
452 | add %l2, 4, %l2;\ | |
453 | wrpr %l2, %tnpc; \ | |
454 | retry | |
455 | #define H_HT0_Trap_Instruction_4 | |
456 | #define My_HT0_Trap_Instruction_4 \ | |
457 | save %i7, %g0, %i7; \ | |
458 | rdpr %tnpc, %l2; \ | |
459 | wrpr %l2, %tpc; \ | |
460 | add %l2, 4, %l2;\ | |
461 | stw %l2, [%i7];\ | |
462 | wrpr %l2, %tnpc; \ | |
463 | restore %i7, %g0, %i7 ;\ | |
464 | retry | |
465 | #define H_HT0_Trap_Instruction_5 | |
466 | #define My_HT0_Trap_Instruction_5 \ | |
467 | ba htrap_5_ext;\ | |
468 | nop; retry;\ | |
469 | nop; nop; nop; nop; nop | |
470 | ||
471 | #define H_HT0_Mem_Address_Not_Aligned_0x34 | |
472 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ | |
473 | inc %l6;\ | |
474 | save %i7, %g0, %i7 ;\ | |
475 | done ;\ | |
476 | nop; | |
477 | #define H_HT0_Illegal_instruction_0x10 | |
478 | #define My_HT0_Illegal_instruction_0x10 \ | |
479 | restore %i7, %g0, %i7 ;\ | |
480 | ba 7f; \ | |
481 | rdhpr %htstate, %l3;\ | |
482 | 8: done; \ | |
483 | 7: ba 8b;\ | |
484 | wrhpr %l3, 1, %htstate;nop | |
485 | ||
486 | #define H_HT0_DAE_so_page_0x30 | |
487 | #define My_HT0_DAE_so_page_0x30 \ | |
488 | restore %i7, %g0, %i7;\ | |
489 | rd %fprs, %l2; \ | |
490 | wr %l2, 0x4, %fprs ;\ | |
491 | done; \ | |
492 | nop; | |
493 | #define H_HT0_DAE_invalid_asi_0x14 | |
494 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ | |
495 | save %i7, %g0, %i7; \ | |
496 | rd %fprs, %l2; \ | |
497 | wr %l2, 0x4, %fprs ;\ | |
498 | done; \ | |
499 | nop; | |
500 | #define H_HT0_DAE_privilege_violation_0x15 | |
501 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ | |
502 | save %i7, %g0, %i7; \ | |
503 | rd %fprs, %l2; \ | |
504 | wr %l2, 0x4, %fprs ;\ | |
505 | done; \ | |
506 | nop; | |
507 | #define H_HT0_Privileged_Action_0x37 | |
508 | #define My_HT0_Privileged_Action_0x37 \ | |
509 | restore %i7, %g0, %i7;\ | |
510 | done; \ | |
511 | nop; nop | |
512 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
513 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ | |
514 | rdpr %tpc, %l2; \ | |
515 | add %l2, 0x4, %l2; \ | |
516 | wrpr %l2, %tpc; \ | |
517 | add %l2, 0x4, %l2; \ | |
518 | wrpr %l2, %tnpc; \ | |
519 | retry | |
520 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
521 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ | |
522 | rdpr %tpc, %l2; \ | |
523 | add %l2, 0x4, %l2; \ | |
524 | wrpr %l2, %tpc; \ | |
525 | add %l2, 0x4, %l2; \ | |
526 | wrpr %l2, %tnpc; \ | |
527 | retry | |
528 | #define H_HT0_Fp_exception_other_0x22 | |
529 | #define My_HT0_Fp_exception_other_0x22 \ | |
530 | umul %i5, 4, %l2;\ | |
531 | save %i7, %g0, %i7; \ | |
532 | stw %l2, [%i7];\ | |
533 | done; \ | |
534 | nop | |
535 | #define H_HT0_Division_By_Zero | |
536 | #define My_HT0_Division_By_Zero \ | |
537 | umul %i5, 4, %l2;\ | |
538 | done; \ | |
539 | nop; nop | |
540 | #define H_T0_Division_By_Zero | |
541 | #define My_T0_Division_By_Zero \ | |
542 | inc %l6;\ | |
543 | dec %l5;\ | |
544 | umul %i5, 4, %l2;\ | |
545 | done; \ | |
546 | nop; nop | |
547 | #define H_T1_Division_By_Zero_0x28 | |
548 | #define My_H_T1_Division_By_Zero_0x28 \ | |
549 | inc %l6;\ | |
550 | dec %l5;\ | |
551 | umul %i5, 4, %l2;\ | |
552 | save %i7, %g0, %i7; \ | |
553 | restore %i7, %g0, %i7;\ | |
554 | done; \ | |
555 | nop; nop | |
556 | ||
557 | #define H_T0_Division_By_Zero | |
558 | #define My_T0_Division_By_Zero\ | |
559 | inc %l6;\ | |
560 | dec %l5;\ | |
561 | umul %i5, 4, %l2;\ | |
562 | save %i7, %g0, %i7; \ | |
563 | restore %i7, %g0, %i7;\ | |
564 | done; \ | |
565 | nop; nop | |
566 | ||
567 | #define H_T1_Fp_Exception_Other_0x22 | |
568 | #define My_H_T1_Fp_Exception_Other_0x22 \ | |
569 | inc %l6;\ | |
570 | dec %l5;\ | |
571 | umul %i5, 4, %l2;\ | |
572 | save %i7, %g0, %i7; \ | |
573 | restore %i7, %g0, %i7;\ | |
574 | done; \ | |
575 | nop; nop | |
576 | #define H_T1_Privileged_Opcode_0x11 | |
577 | #define SUN_H_T1_Privileged_Opcode_0x11 \ | |
578 | stw %l5, [%i7];\ | |
579 | umul %i5, 4, %l2;\ | |
580 | restore %i7, %g0, %i7;\ | |
581 | done; \ | |
582 | nop; | |
583 | ||
584 | #define H_HT0_Privileged_opcode_0x11 | |
585 | #define My_HT0_Privileged_opcode_0x11 \ | |
586 | xor %i0, %l1, %l1;\ | |
587 | and %l1, 0xf, %l1; \ | |
588 | ba hh11_1; \ | |
589 | not %g0, %l2; \ | |
590 | hh11_2: done; \ | |
591 | hh11_1: xor %l1, %l2, %l2; \ | |
592 | ba hh11_2; \ | |
593 | jmp %l2; | |
594 | ||
595 | #define H_HT0_Fp_disabled_0x20 | |
596 | #define My_HT0_Fp_disabled_0x20 \ | |
597 | mov 0x4, %l2 ;\ | |
598 | wr %l2, 0x0, %fprs ;\ | |
599 | sllx %l2, 10, %l3; \ | |
600 | rdpr %tstate, %l2;\ | |
601 | or %l2, %l3, %l2 ;\ | |
602 | stw %l2, [%i7];\ | |
603 | wrpr %l2, 0x0, %tstate;\ | |
604 | retry; | |
605 | ||
606 | #define H_T0_Fp_disabled_0x20 | |
607 | #define My_T0_Fp_disabled_0x20 \ | |
608 | mov 0x4, %l2 ;\ | |
609 | wr %l2, 0x0, %fprs ;\ | |
610 | sllx %l2, 10, %l3; \ | |
611 | rdpr %tstate, %l2;\ | |
612 | or %l2, %l3, %l2 ;\ | |
613 | wrpr %l2, 0x0, %tstate;\ | |
614 | retry; nop | |
615 | ||
616 | #define H_T1_Fp_Disabled_0x20 | |
617 | #define My_H_T1_Fp_Disabled_0x20 \ | |
618 | mov 0x4, %l2 ;\ | |
619 | wr %l2, 0x0, %fprs ;\ | |
620 | sllx %l2, 10, %l3; \ | |
621 | rdpr %tstate, %l2;\ | |
622 | or %l2, %l3, %l2 ;\ | |
623 | wrpr %l2, 0x0, %tstate;\ | |
624 | stw %l2, [%i7];\ | |
625 | retry | |
626 | ||
627 | #define H_HT0_Watchdog_Reset_0x02 | |
628 | #define My_HT0_Watchdog_Reset_0x02 \ | |
629 | ba wdog_2_ext;\ | |
630 | nop;retry;nop;nop;nop;nop;nop | |
631 | ||
632 | #define H_T0_Privileged_opcode_0x11 | |
633 | #define My_T0_Privileged_opcode_0x11 \ | |
634 | ba h11_1; \ | |
635 | not %g0, %l2; \ | |
636 | h11_2: done; \ | |
637 | h11_1: xor %l1, %l2, %l2; \ | |
638 | ba h11_2; \ | |
639 | jmp %l2; | |
640 | ||
641 | #define H_T1_Fp_exception_other_0x22 | |
642 | #define My_T1_Fp_exception_other_0x22 \ | |
643 | restore %i7, %g0, %i7 ; \ | |
644 | save %i7, %g0, %i7; \ | |
645 | restore %i7, %g0, %i7;\ | |
646 | ldx [%l2], %l2;\ | |
647 | done; | |
648 | ||
649 | #define H_T0_Fp_exception_other_0x22 | |
650 | #define My_T0_Fp_exception_other_0x22 \ | |
651 | inc %l6;\ | |
652 | dec %l5;\ | |
653 | umul %i5, 4, %l2;\ | |
654 | save %i7, %g0, %i7; \ | |
655 | restore %i7, %g0, %i7;\ | |
656 | stw %l2, [%i7];\ | |
657 | done; \ | |
658 | nop | |
659 | ||
660 | #define H_HT0_Trap_Level_Zero_0x5f | |
661 | #define My_HT0_Trap_Level_Zero_0x5f \ | |
662 | not %g0, %r13; \ | |
663 | rdhpr %hpstate, %l3;\ | |
664 | jmp %r13;\ | |
665 | rdhpr %htstate, %l3;\ | |
666 | and %l3, 0xfe, %l3;\ | |
667 | wrhpr %l3, 0, %htstate;\ | |
668 | stw %r13, [%i7];\ | |
669 | retry | |
670 | ||
671 | #define My_Watchdog_Reset | |
672 | #define My_Watchdog_Reset \ | |
673 | ba wdog_red_ext;\ | |
674 | nop;retry;nop;nop;nop;nop;nop | |
675 | ||
676 | #define H_HT0_Control_Transfer_Instr_0x74 | |
677 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ | |
678 | rdpr %tstate, %l3;\ | |
679 | and %l3, 0xfff, %l3;\ | |
680 | wrpr %l3, %tstate ;\ | |
681 | retry;nop; | |
682 | ||
683 | #define H_T0_Control_Transfer_Instr_0x74 | |
684 | #define My_H_T0_Control_Transfer_Instr_0x74 \ | |
685 | rdpr %tstate, %l3;\ | |
686 | and %l3, 0xfff, %l3;\ | |
687 | wrpr %l3, %tstate ;\ | |
688 | retry;nop; | |
689 | ||
690 | #define H_T1_Control_Transfer_Instr_0x74 | |
691 | #define My_H_T1_Control_Transfer_Instr_0x74 \ | |
692 | rdpr %tstate, %l3;\ | |
693 | and %l3, 0xfff, %l3;\ | |
694 | wrpr %l3, %tstate ;\ | |
695 | retry;nop; | |
696 | ||
697 | #define H_HT0_IAE_privilege_violation_0x08 | |
698 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
699 | done; nop; | |
700 | #define H_HT0_IAE_unauth_access_0x0b | |
701 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
702 | done; nop; | |
703 | ||
704 | #define H_HT0_data_access_protection_0x6c | |
705 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop | |
706 | ||
707 | #define H_HT0_PA_Watchpoint_0x61 | |
708 | #define My_H_HT0_PA_Watchpoint_0x61 \ | |
709 | done;nop | |
710 | ||
711 | #define H_T0_VA_Watchpoint_0x62 | |
712 | #define My_T0_VA_Watchpoint_0x62 \ | |
713 | done; nop | |
714 | ||
715 | #define H_HT0_Instruction_VA_Watchpoint_0x75 | |
716 | #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ | |
717 | done;nop | |
718 | ||
719 | #define H_HT0_Instruction_Breakpoint_0x76 | |
720 | #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ | |
721 | done;nop | |
722 | # 685 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
723 | #define H_HT0_Instruction_address_range_0x0d | |
724 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
725 | done;nop | |
726 | ||
727 | #define H_HT0_mem_address_range_0x2e | |
728 | #define SUN_H_HT0_mem_address_range_0x2e \ | |
729 | done;nop | |
730 | ||
731 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
732 | # 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
733 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
734 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! | |
735 | ||
736 | #define H_HT0_Externally_Initiated_Reset_0x03 | |
737 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ | |
738 | setx External_Reset_Handler, %g1, %g2; \ | |
739 | jmp %g2; \ | |
740 | nop | |
741 | ||
742 | !!!!! HW interrupt handlers | |
743 | ||
744 | #define H_HT0_Interrupt_0x60 | |
745 | #define My_HT0_Interrupt_0x60 \ | |
746 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g1 ;\ | |
747 | ldxa [%g0] ASI_SWVR_INTR_R, %g2 ;\ | |
748 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ | |
749 | cmp %g1, %g3 ;\ | |
750 | nop; \ | |
751 | retry; | |
752 | ||
753 | !!!!! Queue interrupt handler | |
754 | # 36 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
755 | #define H_T0_Cpu_Mondo_Trap_0x7c | |
756 | #define My_T0_Cpu_Mondo_Trap_0x7c \ | |
757 | mov 0x3c8, %g3; \ | |
758 | ldxa [%g3] 0x25, %g5; \ | |
759 | mov 0x3c0, %g3; \ | |
760 | stxa %g5, [%g3] 0x25; \ | |
761 | retry; \ | |
762 | nop; \ | |
763 | nop; \ | |
764 | nop | |
765 | ||
766 | #define H_T0_Dev_Mondo_Trap_0x7d | |
767 | #define My_T0_Dev_Mondo_Trap_0x7d \ | |
768 | mov 0x3d8, %g3; \ | |
769 | ldxa [%g3] 0x25, %g5; \ | |
770 | mov 0x3d0, %g3; \ | |
771 | stxa %g5, [%g3] 0x25; \ | |
772 | retry; \ | |
773 | nop; \ | |
774 | nop; \ | |
775 | nop | |
776 | ||
777 | #define H_T0_Resumable_Error_0x7e | |
778 | #define My_T0_Resumable_Error_0x7e \ | |
779 | mov 0x3e8, %g3; \ | |
780 | ldxa [%g3] 0x25, %g5; \ | |
781 | mov 0x3e0, %g3; \ | |
782 | stxa %g5, [%g3] 0x25; \ | |
783 | retry; \ | |
784 | nop; \ | |
785 | nop; \ | |
786 | nop | |
787 | ||
788 | #define H_T1_Cpu_Mondo_Trap_0x7c | |
789 | #define My_T1_Cpu_Mondo_Trap_0x7c \ | |
790 | mov 0x3c8, %g3; \ | |
791 | ldxa [%g3] 0x25, %g5; \ | |
792 | mov 0x3c0, %g3; \ | |
793 | stxa %g5, [%g3] 0x25; \ | |
794 | retry; \ | |
795 | nop; \ | |
796 | nop; \ | |
797 | nop | |
798 | ||
799 | #define H_T1_Dev_Mondo_Trap_0x7d | |
800 | #define My_T1_Dev_Mondo_Trap_0x7d \ | |
801 | mov 0x3d8, %g3; \ | |
802 | ldxa [%g3] 0x25, %g5; \ | |
803 | mov 0x3d0, %g3; \ | |
804 | stxa %g5, [%g3] 0x25; \ | |
805 | retry; \ | |
806 | nop; \ | |
807 | nop; \ | |
808 | nop | |
809 | ||
810 | #define H_T1_Resumable_Error_0x7e | |
811 | #define My_T1_Resumable_Error_0x7e \ | |
812 | mov 0x3e8, %g3; \ | |
813 | ldxa [%g3] 0x25, %g5; \ | |
814 | mov 0x3e0, %g3; \ | |
815 | stxa %g5, [%g3] 0x25; \ | |
816 | retry; \ | |
817 | nop; \ | |
818 | nop; \ | |
819 | nop | |
820 | ||
821 | #define H_HT0_Reserved_0x7c | |
822 | #define SUN_H_HT0_Reserved_0x7c \ | |
823 | mov 0x3c8, %g3; \ | |
824 | ldxa [%g3] 0x25, %g5; \ | |
825 | mov 0x3c0, %g3; \ | |
826 | stxa %g5, [%g3] 0x25; \ | |
827 | retry; \ | |
828 | nop; \ | |
829 | nop; \ | |
830 | nop | |
831 | ||
832 | #define H_HT0_Reserved_0x7d | |
833 | #define SUN_H_HT0_Reserved_0x7d \ | |
834 | mov 0x3d8, %g3; \ | |
835 | ldxa [%g3] 0x25, %g5; \ | |
836 | mov 0x3d0, %g3; \ | |
837 | stxa %g5, [%g3] 0x25; \ | |
838 | retry; \ | |
839 | nop; \ | |
840 | nop; \ | |
841 | nop | |
842 | ||
843 | #define H_HT0_Reserved_0x7e | |
844 | #define SUN_H_HT0_Reserved_0x7e \ | |
845 | mov 0x3e8, %g3; \ | |
846 | ldxa [%g3] 0x25, %g5; \ | |
847 | mov 0x3e0, %g3; \ | |
848 | stxa %g5, [%g3] 0x25; \ | |
849 | retry; \ | |
850 | nop; \ | |
851 | nop; \ | |
852 | nop | |
853 | # 136 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
854 | !!!!! Hstick-match trap handler | |
855 | # 139 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
856 | #define H_T0_Reserved_0x5e | |
857 | #define My_T0_Reserved_0x5e \ | |
858 | rdhpr %hintp, %g3; \ | |
859 | wrhpr %g3, %g3, %hintp; \ | |
860 | retry; \ | |
861 | nop; \ | |
862 | nop; \ | |
863 | nop; \ | |
864 | nop; \ | |
865 | nop | |
866 | ||
867 | #define H_HT0_Hstick_Match_0x5e | |
868 | #define My_HT0_Hstick_Match_0x5e \ | |
869 | rdhpr %hintp, %g3; \ | |
870 | wrhpr %g3, %g3, %hintp; \ | |
871 | retry; \ | |
872 | nop; \ | |
873 | nop; \ | |
874 | nop; \ | |
875 | nop; \ | |
876 | nop | |
877 | ||
878 | #define H_T0_Reserved_0x5e | |
879 | #define My_T0_Reserved_0x5e \ | |
880 | rdhpr %hintp, %g3; \ | |
881 | wrhpr %g3, %g3, %hintp; \ | |
882 | retry; \ | |
883 | nop; \ | |
884 | nop; \ | |
885 | nop; \ | |
886 | nop; \ | |
887 | nop | |
888 | ||
889 | #define H_T1_Reserved_0x5e | |
890 | #define My_T1_Reserved_0x5e \ | |
891 | rdhpr %hintp, %g3; \ | |
892 | wrhpr %g3, %g3, %hintp; \ | |
893 | retry; \ | |
894 | nop; \ | |
895 | nop; \ | |
896 | nop; \ | |
897 | nop; \ | |
898 | nop | |
899 | # 184 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
900 | !!!!! SW interuupt handlers | |
901 | # 187 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
902 | #define H_T0_Interrupt_Level_14_0x4e | |
903 | #define My_T0_Interrupt_Level_14_0x4e \ | |
904 | rd %softint, %g3; \ | |
905 | sethi %hi(0x14000), %g3; \ | |
906 | or %g3, 0x1, %g3; \ | |
907 | wr %g3, %g0, %clear_softint; \ | |
908 | retry; \ | |
909 | nop; \ | |
910 | nop; \ | |
911 | nop | |
912 | ||
913 | #define H_T0_Interrupt_Level_1_0x41 | |
914 | #define My_T0_Interrupt_Level_1_0x41 \ | |
915 | rd %softint, %g3; \ | |
916 | or %g0, 0x2, %g3; \ | |
917 | wr %g3, %g0, %clear_softint; \ | |
918 | retry; \ | |
919 | nop; \ | |
920 | nop; \ | |
921 | nop; \ | |
922 | nop | |
923 | ||
924 | #define H_T0_Interrupt_Level_2_0x42 | |
925 | #define My_T0_Interrupt_Level_2_0x42 \ | |
926 | rd %softint, %g3; \ | |
927 | or %g0, 0x4, %g3; \ | |
928 | wr %g3, %g0, %clear_softint; \ | |
929 | retry; \ | |
930 | nop; \ | |
931 | nop; \ | |
932 | nop; \ | |
933 | nop | |
934 | ||
935 | #define H_T0_Interrupt_Level_3_0x43 | |
936 | #define My_T0_Interrupt_Level_3_0x43 \ | |
937 | rd %softint, %g3; \ | |
938 | or %g0, 0x8, %g3; \ | |
939 | wr %g3, %g0, %clear_softint; \ | |
940 | retry; \ | |
941 | nop; \ | |
942 | nop; \ | |
943 | nop; \ | |
944 | nop | |
945 | ||
946 | #define H_T0_Interrupt_Level_4_0x44 | |
947 | #define My_T0_Interrupt_Level_4_0x44 \ | |
948 | rd %softint, %g3; \ | |
949 | or %g0, 0x10, %g3; \ | |
950 | wr %g3, %g0, %clear_softint; \ | |
951 | retry; \ | |
952 | nop; \ | |
953 | nop; \ | |
954 | nop; \ | |
955 | nop | |
956 | ||
957 | #define H_T0_Interrupt_Level_5_0x45 | |
958 | #define My_T0_Interrupt_Level_5_0x45 \ | |
959 | rd %softint, %g3; \ | |
960 | or %g0, 0x20, %g3; \ | |
961 | wr %g3, %g0, %clear_softint; \ | |
962 | retry; \ | |
963 | nop; \ | |
964 | nop; \ | |
965 | nop; \ | |
966 | nop | |
967 | ||
968 | #define H_T0_Interrupt_Level_6_0x46 | |
969 | #define My_T0_Interrupt_Level_6_0x46 \ | |
970 | rd %softint, %g3; \ | |
971 | or %g0, 0x40, %g3; \ | |
972 | wr %g3, %g0, %clear_softint; \ | |
973 | retry; \ | |
974 | nop; \ | |
975 | nop; \ | |
976 | nop; \ | |
977 | nop | |
978 | ||
979 | #define H_T0_Interrupt_Level_7_0x47 | |
980 | #define My_T0_Interrupt_Level_7_0x47 \ | |
981 | rd %softint, %g3; \ | |
982 | or %g0, 0x80, %g3; \ | |
983 | wr %g3, %g0, %clear_softint; \ | |
984 | retry; \ | |
985 | nop; \ | |
986 | nop; \ | |
987 | nop; \ | |
988 | nop | |
989 | ||
990 | #define H_T0_Interrupt_Level_8_0x48 | |
991 | #define My_T0_Interrupt_Level_8_0x48 \ | |
992 | rd %softint, %g3; \ | |
993 | or %g0, 0x100, %g3; \ | |
994 | wr %g3, %g0, %clear_softint; \ | |
995 | retry; \ | |
996 | nop; \ | |
997 | nop; \ | |
998 | nop; \ | |
999 | nop | |
1000 | ||
1001 | #define H_T0_Interrupt_Level_9_0x49 | |
1002 | #define My_T0_Interrupt_Level_9_0x49 \ | |
1003 | rd %softint, %g3; \ | |
1004 | or %g0, 0x200, %g3; \ | |
1005 | wr %g3, %g0, %clear_softint; \ | |
1006 | retry; \ | |
1007 | nop; \ | |
1008 | nop; \ | |
1009 | nop; \ | |
1010 | nop | |
1011 | ||
1012 | #define H_T0_Interrupt_Level_10_0x4a | |
1013 | #define My_T0_Interrupt_Level_10_0x4a \ | |
1014 | rd %softint, %g3; \ | |
1015 | or %g0, 0x400, %g3; \ | |
1016 | wr %g3, %g0, %clear_softint; \ | |
1017 | retry; \ | |
1018 | nop; \ | |
1019 | nop; \ | |
1020 | nop; \ | |
1021 | nop | |
1022 | ||
1023 | #define H_T0_Interrupt_Level_11_0x4b | |
1024 | #define My_T0_Interrupt_Level_11_0x4b \ | |
1025 | rd %softint, %g3; \ | |
1026 | or %g0, 0x800, %g3; \ | |
1027 | wr %g3, %g0, %clear_softint; \ | |
1028 | retry; \ | |
1029 | nop; \ | |
1030 | nop; \ | |
1031 | nop; \ | |
1032 | nop | |
1033 | ||
1034 | #define H_T0_Interrupt_Level_12_0x4c | |
1035 | #define My_T0_Interrupt_Level_12_0x4c \ | |
1036 | rd %softint, %g3; \ | |
1037 | sethi %hi(0x1000), %g3; \ | |
1038 | wr %g3, %g0, %clear_softint; \ | |
1039 | retry; \ | |
1040 | nop; \ | |
1041 | nop; \ | |
1042 | nop; \ | |
1043 | nop | |
1044 | ||
1045 | #define H_T0_Interrupt_Level_13_0x4d | |
1046 | #define My_T0_Interrupt_Level_13_0x4d \ | |
1047 | rd %softint, %g3; \ | |
1048 | sethi %hi(0x2000), %g3; \ | |
1049 | wr %g3, %g0, %clear_softint; \ | |
1050 | retry; \ | |
1051 | nop; \ | |
1052 | nop; \ | |
1053 | nop; \ | |
1054 | nop | |
1055 | ||
1056 | #define H_T0_Interrupt_Level_15_0x4f | |
1057 | #define My_T0_Interrupt_Level_15_0x4f \ | |
1058 | sethi %hi(0x8000), %g3; \ | |
1059 | wr %g3, %g0, %clear_softint; \ | |
1060 | wr %g0, %g0, %pic;\ | |
1061 | sethi %hi(0x80040000), %g2;\ | |
1062 | rd %pcr, %g3;\ | |
1063 | andn %g3, %g2, %g3;\ | |
1064 | wr %g3, %g0, %pcr;\ | |
1065 | retry; | |
1066 | ||
1067 | #define H_T1_Interrupt_Level_14_0x4e | |
1068 | #define My_T1_Interrupt_Level_14_0x4e \ | |
1069 | rd %softint, %g3; \ | |
1070 | sethi %hi(0x14000), %g3; \ | |
1071 | or %g3, 0x1, %g3; \ | |
1072 | wr %g3, %g0, %clear_softint; \ | |
1073 | retry; \ | |
1074 | nop; \ | |
1075 | nop; \ | |
1076 | nop | |
1077 | ||
1078 | #define H_T1_Interrupt_Level_1_0x41 | |
1079 | #define My_T1_Interrupt_Level_1_0x41 \ | |
1080 | rd %softint, %g3; \ | |
1081 | or %g0, 0x2, %g3; \ | |
1082 | wr %g3, %g0, %clear_softint; \ | |
1083 | retry; \ | |
1084 | nop; \ | |
1085 | nop; \ | |
1086 | nop; \ | |
1087 | nop | |
1088 | ||
1089 | #define H_T1_Interrupt_Level_2_0x42 | |
1090 | #define My_T1_Interrupt_Level_2_0x42 \ | |
1091 | rd %softint, %g3; \ | |
1092 | or %g0, 0x4, %g3; \ | |
1093 | wr %g3, %g0, %clear_softint; \ | |
1094 | retry; \ | |
1095 | nop; \ | |
1096 | nop; \ | |
1097 | nop; \ | |
1098 | nop | |
1099 | ||
1100 | #define H_T1_Interrupt_Level_3_0x43 | |
1101 | #define My_T1_Interrupt_Level_3_0x43 \ | |
1102 | rd %softint, %g3; \ | |
1103 | or %g0, 0x8, %g3; \ | |
1104 | wr %g3, %g0, %clear_softint; \ | |
1105 | retry; \ | |
1106 | nop; \ | |
1107 | nop; \ | |
1108 | nop; \ | |
1109 | nop | |
1110 | ||
1111 | #define H_T1_Interrupt_Level_4_0x44 | |
1112 | #define My_T1_Interrupt_Level_4_0x44 \ | |
1113 | rd %softint, %g3; \ | |
1114 | or %g0, 0x10, %g3; \ | |
1115 | wr %g3, %g0, %clear_softint; \ | |
1116 | retry; \ | |
1117 | nop; \ | |
1118 | nop; \ | |
1119 | nop; \ | |
1120 | nop | |
1121 | ||
1122 | #define H_T1_Interrupt_Level_5_0x45 | |
1123 | #define My_T1_Interrupt_Level_5_0x45 \ | |
1124 | rd %softint, %g3; \ | |
1125 | or %g0, 0x20, %g3; \ | |
1126 | wr %g3, %g0, %clear_softint; \ | |
1127 | retry; \ | |
1128 | nop; \ | |
1129 | nop; \ | |
1130 | nop; \ | |
1131 | nop | |
1132 | ||
1133 | #define H_T1_Interrupt_Level_6_0x46 | |
1134 | #define My_T1_Interrupt_Level_6_0x46 \ | |
1135 | rd %softint, %g3; \ | |
1136 | or %g0, 0x40, %g3; \ | |
1137 | wr %g3, %g0, %clear_softint; \ | |
1138 | retry; \ | |
1139 | nop; \ | |
1140 | nop; \ | |
1141 | nop; \ | |
1142 | nop | |
1143 | ||
1144 | #define H_T1_Interrupt_Level_7_0x47 | |
1145 | #define My_T1_Interrupt_Level_7_0x47 \ | |
1146 | rd %softint, %g3; \ | |
1147 | or %g0, 0x80, %g3; \ | |
1148 | wr %g3, %g0, %clear_softint; \ | |
1149 | retry; \ | |
1150 | nop; \ | |
1151 | nop; \ | |
1152 | nop; \ | |
1153 | nop | |
1154 | ||
1155 | #define H_T1_Interrupt_Level_8_0x48 | |
1156 | #define My_T1_Interrupt_Level_8_0x48 \ | |
1157 | rd %softint, %g3; \ | |
1158 | or %g0, 0x100, %g3; \ | |
1159 | wr %g3, %g0, %clear_softint; \ | |
1160 | retry; \ | |
1161 | nop; \ | |
1162 | nop; \ | |
1163 | nop; \ | |
1164 | nop | |
1165 | ||
1166 | #define H_T1_Interrupt_Level_9_0x49 | |
1167 | #define My_T1_Interrupt_Level_9_0x49 \ | |
1168 | rd %softint, %g3; \ | |
1169 | or %g0, 0x200, %g3; \ | |
1170 | wr %g3, %g0, %clear_softint; \ | |
1171 | retry; \ | |
1172 | nop; \ | |
1173 | nop; \ | |
1174 | nop; \ | |
1175 | nop | |
1176 | ||
1177 | #define H_T1_Interrupt_Level_10_0x4a | |
1178 | #define My_T1_Interrupt_Level_10_0x4a \ | |
1179 | rd %softint, %g3; \ | |
1180 | or %g0, 0x400, %g3; \ | |
1181 | wr %g3, %g0, %clear_softint; \ | |
1182 | retry; \ | |
1183 | nop; \ | |
1184 | nop; \ | |
1185 | nop; \ | |
1186 | nop | |
1187 | ||
1188 | #define H_T1_Interrupt_Level_11_0x4b | |
1189 | #define My_T1_Interrupt_Level_11_0x4b \ | |
1190 | rd %softint, %g3; \ | |
1191 | or %g0, 0x800, %g3; \ | |
1192 | wr %g3, %g0, %clear_softint; \ | |
1193 | retry; \ | |
1194 | nop; \ | |
1195 | nop; \ | |
1196 | nop; \ | |
1197 | nop | |
1198 | ||
1199 | #define H_T1_Interrupt_Level_12_0x4c | |
1200 | #define My_T1_Interrupt_Level_12_0x4c \ | |
1201 | rd %softint, %g3; \ | |
1202 | sethi %hi(0x1000), %g3; \ | |
1203 | wr %g3, %g0, %clear_softint; \ | |
1204 | retry; \ | |
1205 | nop; \ | |
1206 | nop; \ | |
1207 | nop; \ | |
1208 | nop | |
1209 | ||
1210 | #define H_T1_Interrupt_Level_13_0x4d | |
1211 | #define My_T1_Interrupt_Level_13_0x4d \ | |
1212 | rd %softint, %g3; \ | |
1213 | sethi %hi(0x2000), %g3; \ | |
1214 | wr %g3, %g0, %clear_softint; \ | |
1215 | retry; \ | |
1216 | nop; \ | |
1217 | nop; \ | |
1218 | nop; \ | |
1219 | nop | |
1220 | ||
1221 | #define H_T1_Interrupt_Level_15_0x4f | |
1222 | #define My_T1_Interrupt_Level_15_0x4f \ | |
1223 | sethi %hi(0x8000), %g3; \ | |
1224 | wr %g3, %g0, %clear_softint; \ | |
1225 | wr %g0, %g0, %pic;\ | |
1226 | sethi %hi(0x80040000), %g2;\ | |
1227 | rd %pcr, %g3;\ | |
1228 | andn %g3, %g2, %g3;\ | |
1229 | wr %g3, %g0, %pcr;\ | |
1230 | retry; | |
1231 | ||
1232 | #define H_HT0_Interrupt_Level_14_0x4e | |
1233 | #define My_HT0_Interrupt_Level_14_0x4e \ | |
1234 | rd %softint, %g3; \ | |
1235 | sethi %hi(0x14000), %g3; \ | |
1236 | or %g3, 0x1, %g3; \ | |
1237 | wr %g3, %g0, %clear_softint; \ | |
1238 | retry; \ | |
1239 | nop; \ | |
1240 | nop; \ | |
1241 | nop | |
1242 | ||
1243 | #define H_HT0_Interrupt_Level_1_0x41 | |
1244 | #define My_HT0_Interrupt_Level_1_0x41 \ | |
1245 | rd %softint, %g3; \ | |
1246 | or %g0, 0x2, %g3; \ | |
1247 | wr %g3, %g0, %clear_softint; \ | |
1248 | retry; \ | |
1249 | nop; \ | |
1250 | nop; \ | |
1251 | nop; \ | |
1252 | nop | |
1253 | ||
1254 | #define H_HT0_Interrupt_Level_2_0x42 | |
1255 | #define My_HT0_Interrupt_Level_2_0x42 \ | |
1256 | rd %softint, %g3; \ | |
1257 | or %g0, 0x4, %g3; \ | |
1258 | wr %g3, %g0, %clear_softint; \ | |
1259 | retry; \ | |
1260 | nop; \ | |
1261 | nop; \ | |
1262 | nop; \ | |
1263 | nop | |
1264 | ||
1265 | #define H_HT0_Interrupt_Level_3_0x43 | |
1266 | #define My_HT0_Interrupt_Level_3_0x43 \ | |
1267 | rd %softint, %g3; \ | |
1268 | or %g0, 0x8, %g3; \ | |
1269 | wr %g3, %g0, %clear_softint; \ | |
1270 | retry; \ | |
1271 | nop; \ | |
1272 | nop; \ | |
1273 | nop; \ | |
1274 | nop | |
1275 | ||
1276 | #define H_HT0_Interrupt_Level_4_0x44 | |
1277 | #define My_HT0_Interrupt_Level_4_0x44 \ | |
1278 | rd %softint, %g3; \ | |
1279 | or %g0, 0x10, %g3; \ | |
1280 | wr %g3, %g0, %clear_softint; \ | |
1281 | retry; \ | |
1282 | nop; \ | |
1283 | nop; \ | |
1284 | nop; \ | |
1285 | nop | |
1286 | ||
1287 | #define H_HT0_Interrupt_Level_5_0x45 | |
1288 | #define My_HT0_Interrupt_Level_5_0x45 \ | |
1289 | rd %softint, %g3; \ | |
1290 | or %g0, 0x20, %g3; \ | |
1291 | wr %g3, %g0, %clear_softint; \ | |
1292 | retry; \ | |
1293 | nop; \ | |
1294 | nop; \ | |
1295 | nop; \ | |
1296 | nop | |
1297 | ||
1298 | #define H_HT0_Interrupt_Level_6_0x46 | |
1299 | #define My_HT0_Interrupt_Level_6_0x46 \ | |
1300 | rd %softint, %g3; \ | |
1301 | or %g0, 0x40, %g3; \ | |
1302 | wr %g3, %g0, %clear_softint; \ | |
1303 | retry; \ | |
1304 | nop; \ | |
1305 | nop; \ | |
1306 | nop; \ | |
1307 | nop | |
1308 | ||
1309 | #define H_HT0_Interrupt_Level_7_0x47 | |
1310 | #define My_HT0_Interrupt_Level_7_0x47 \ | |
1311 | rd %softint, %g3; \ | |
1312 | or %g0, 0x80, %g3; \ | |
1313 | wr %g3, %g0, %clear_softint; \ | |
1314 | retry; \ | |
1315 | nop; \ | |
1316 | nop; \ | |
1317 | nop; \ | |
1318 | nop | |
1319 | ||
1320 | #define H_HT0_Interrupt_Level_8_0x48 | |
1321 | #define My_HT0_Interrupt_Level_8_0x48 \ | |
1322 | rd %softint, %g3; \ | |
1323 | or %g0, 0x100, %g3; \ | |
1324 | wr %g3, %g0, %clear_softint; \ | |
1325 | retry; \ | |
1326 | nop; \ | |
1327 | nop; \ | |
1328 | nop; \ | |
1329 | nop | |
1330 | ||
1331 | #define H_HT0_Interrupt_Level_9_0x49 | |
1332 | #define My_HT0_Interrupt_Level_9_0x49 \ | |
1333 | rd %softint, %g3; \ | |
1334 | or %g0, 0x200, %g3; \ | |
1335 | wr %g3, %g0, %clear_softint; \ | |
1336 | retry; \ | |
1337 | nop; \ | |
1338 | nop; \ | |
1339 | nop; \ | |
1340 | nop | |
1341 | ||
1342 | #define H_HT0_Interrupt_Level_10_0x4a | |
1343 | #define My_HT0_Interrupt_Level_10_0x4a \ | |
1344 | rd %softint, %g3; \ | |
1345 | or %g0, 0x400, %g3; \ | |
1346 | wr %g3, %g0, %clear_softint; \ | |
1347 | retry; \ | |
1348 | nop; \ | |
1349 | nop; \ | |
1350 | nop; \ | |
1351 | nop | |
1352 | ||
1353 | #define H_HT0_Interrupt_Level_11_0x4b | |
1354 | #define My_HT0_Interrupt_Level_11_0x4b \ | |
1355 | rd %softint, %g3; \ | |
1356 | or %g0, 0x800, %g3; \ | |
1357 | wr %g3, %g0, %clear_softint; \ | |
1358 | retry; \ | |
1359 | nop; \ | |
1360 | nop; \ | |
1361 | nop; \ | |
1362 | nop | |
1363 | ||
1364 | #define H_HT0_Interrupt_Level_12_0x4c | |
1365 | #define My_HT0_Interrupt_Level_12_0x4c \ | |
1366 | rd %softint, %g3; \ | |
1367 | sethi %hi(0x1000), %g3; \ | |
1368 | wr %g3, %g0, %clear_softint; \ | |
1369 | retry; \ | |
1370 | nop; \ | |
1371 | nop; \ | |
1372 | nop; \ | |
1373 | nop | |
1374 | ||
1375 | #define H_HT0_Interrupt_Level_13_0x4d | |
1376 | #define My_HT0_Interrupt_Level_13_0x4d \ | |
1377 | rd %softint, %g3; \ | |
1378 | sethi %hi(0x2000), %g3; \ | |
1379 | wr %g3, %g0, %clear_softint; \ | |
1380 | retry; \ | |
1381 | nop; \ | |
1382 | nop; \ | |
1383 | nop; \ | |
1384 | nop | |
1385 | ||
1386 | #define H_HT0_Interrupt_Level_15_0x4f | |
1387 | #define My_HT0_Interrupt_Level_15_0x4f \ | |
1388 | sethi %hi(0x8000), %g3; \ | |
1389 | wr %g3, %g0, %clear_softint; \ | |
1390 | wr %g0, %g0, %pic;\ | |
1391 | sethi %hi(0x80040000), %g2;\ | |
1392 | rd %pcr, %g3;\ | |
1393 | andn %g3, %g2, %g3;\ | |
1394 | wr %g3, %g0, %pcr;\ | |
1395 | retry; | |
1396 | ||
1397 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
1398 | # 215 "diag.j" | |
1399 | #include "hboot.s" | |
1400 | .text | |
1401 | .global main | |
1402 | main: | |
1403 | ||
1404 | ! Set up ld/st area per thread | |
1405 | ta T_RD_THID ! Result in %o1 = r9 | |
1406 | umul %r9, 256, %r31 | |
1407 | setx user_data_start, %r1, %r3 | |
1408 | add %r31, %r3, %r31 | |
1409 | wr %r0, 0x4, %asi | |
1410 | ||
1411 | !Initializing integer registers | |
1412 | ldx [%r31+0], %r0 | |
1413 | ldx [%r31+8], %r1 | |
1414 | ldx [%r31+16], %r2 | |
1415 | ldx [%r31+24], %r3 | |
1416 | ldx [%r31+32], %r4 | |
1417 | ldx [%r31+40], %r5 | |
1418 | ldx [%r31+48], %r6 | |
1419 | ldx [%r31+56], %r7 | |
1420 | ldx [%r31+64], %r8 | |
1421 | ldx [%r31+72], %r9 | |
1422 | ldx [%r31+80], %r10 | |
1423 | ldx [%r31+88], %r11 | |
1424 | ldx [%r31+96], %r12 | |
1425 | ldx [%r31+104], %r13 | |
1426 | ldx [%r31+112], %r14 | |
1427 | mov %r31, %r15 | |
1428 | ldx [%r31+128], %r16 | |
1429 | ldx [%r31+136], %r17 | |
1430 | ldx [%r31+144], %r18 | |
1431 | ldx [%r31+152], %r19 | |
1432 | ldx [%r31+160], %r20 | |
1433 | ldx [%r31+168], %r21 | |
1434 | ldx [%r31+176], %r22 | |
1435 | ldx [%r31+184], %r23 | |
1436 | ldx [%r31+192], %r24 | |
1437 | ldx [%r31+200], %r25 | |
1438 | ldx [%r31+208], %r26 | |
1439 | ldx [%r31+216], %r27 | |
1440 | ldx [%r31+224], %r28 | |
1441 | ldx [%r31+232], %r29 | |
1442 | mov 0xb0, %r14 | |
1443 | mov 0x33, %r30 | |
1444 | save %r31, %r0, %r31 | |
1445 | ldx [%r31+0], %r0 | |
1446 | ldx [%r31+8], %r1 | |
1447 | ldx [%r31+16], %r2 | |
1448 | ldx [%r31+24], %r3 | |
1449 | ldx [%r31+32], %r4 | |
1450 | ldx [%r31+40], %r5 | |
1451 | ldx [%r31+48], %r6 | |
1452 | ldx [%r31+56], %r7 | |
1453 | ldx [%r31+64], %r8 | |
1454 | ldx [%r31+72], %r9 | |
1455 | ldx [%r31+80], %r10 | |
1456 | ldx [%r31+88], %r11 | |
1457 | ldx [%r31+96], %r12 | |
1458 | ldx [%r31+104], %r13 | |
1459 | ldx [%r31+112], %r14 | |
1460 | mov %r31, %r15 | |
1461 | ldx [%r31+128], %r16 | |
1462 | ldx [%r31+136], %r17 | |
1463 | ldx [%r31+144], %r18 | |
1464 | ldx [%r31+152], %r19 | |
1465 | ldx [%r31+160], %r20 | |
1466 | ldx [%r31+168], %r21 | |
1467 | ldx [%r31+176], %r22 | |
1468 | ldx [%r31+184], %r23 | |
1469 | ldx [%r31+192], %r24 | |
1470 | ldx [%r31+200], %r25 | |
1471 | ldx [%r31+208], %r26 | |
1472 | ldx [%r31+216], %r27 | |
1473 | ldx [%r31+224], %r28 | |
1474 | ldx [%r31+232], %r29 | |
1475 | mov 0x34, %r14 | |
1476 | mov 0x34, %r30 | |
1477 | save %r31, %r0, %r31 | |
1478 | ldx [%r31+0], %r0 | |
1479 | ldx [%r31+8], %r1 | |
1480 | ldx [%r31+16], %r2 | |
1481 | ldx [%r31+24], %r3 | |
1482 | ldx [%r31+32], %r4 | |
1483 | ldx [%r31+40], %r5 | |
1484 | ldx [%r31+48], %r6 | |
1485 | ldx [%r31+56], %r7 | |
1486 | ldx [%r31+64], %r8 | |
1487 | ldx [%r31+72], %r9 | |
1488 | ldx [%r31+80], %r10 | |
1489 | ldx [%r31+88], %r11 | |
1490 | ldx [%r31+96], %r12 | |
1491 | ldx [%r31+104], %r13 | |
1492 | ldx [%r31+112], %r14 | |
1493 | mov %r31, %r15 | |
1494 | ldx [%r31+128], %r16 | |
1495 | ldx [%r31+136], %r17 | |
1496 | ldx [%r31+144], %r18 | |
1497 | ldx [%r31+152], %r19 | |
1498 | ldx [%r31+160], %r20 | |
1499 | ldx [%r31+168], %r21 | |
1500 | ldx [%r31+176], %r22 | |
1501 | ldx [%r31+184], %r23 | |
1502 | ldx [%r31+192], %r24 | |
1503 | ldx [%r31+200], %r25 | |
1504 | ldx [%r31+208], %r26 | |
1505 | ldx [%r31+216], %r27 | |
1506 | ldx [%r31+224], %r28 | |
1507 | ldx [%r31+232], %r29 | |
1508 | mov 0x33, %r14 | |
1509 | mov 0x32, %r30 | |
1510 | save %r31, %r0, %r31 | |
1511 | ldx [%r31+0], %r0 | |
1512 | ldx [%r31+8], %r1 | |
1513 | ldx [%r31+16], %r2 | |
1514 | ldx [%r31+24], %r3 | |
1515 | ldx [%r31+32], %r4 | |
1516 | ldx [%r31+40], %r5 | |
1517 | ldx [%r31+48], %r6 | |
1518 | ldx [%r31+56], %r7 | |
1519 | ldx [%r31+64], %r8 | |
1520 | ldx [%r31+72], %r9 | |
1521 | ldx [%r31+80], %r10 | |
1522 | ldx [%r31+88], %r11 | |
1523 | ldx [%r31+96], %r12 | |
1524 | ldx [%r31+104], %r13 | |
1525 | ldx [%r31+112], %r14 | |
1526 | mov %r31, %r15 | |
1527 | ldx [%r31+128], %r16 | |
1528 | ldx [%r31+136], %r17 | |
1529 | ldx [%r31+144], %r18 | |
1530 | ldx [%r31+152], %r19 | |
1531 | ldx [%r31+160], %r20 | |
1532 | ldx [%r31+168], %r21 | |
1533 | ldx [%r31+176], %r22 | |
1534 | ldx [%r31+184], %r23 | |
1535 | ldx [%r31+192], %r24 | |
1536 | ldx [%r31+200], %r25 | |
1537 | ldx [%r31+208], %r26 | |
1538 | ldx [%r31+216], %r27 | |
1539 | ldx [%r31+224], %r28 | |
1540 | ldx [%r31+232], %r29 | |
1541 | mov 0xb2, %r14 | |
1542 | mov 0x33, %r30 | |
1543 | save %r31, %r0, %r31 | |
1544 | ldx [%r31+0], %r0 | |
1545 | ldx [%r31+8], %r1 | |
1546 | ldx [%r31+16], %r2 | |
1547 | ldx [%r31+24], %r3 | |
1548 | ldx [%r31+32], %r4 | |
1549 | ldx [%r31+40], %r5 | |
1550 | ldx [%r31+48], %r6 | |
1551 | ldx [%r31+56], %r7 | |
1552 | ldx [%r31+64], %r8 | |
1553 | ldx [%r31+72], %r9 | |
1554 | ldx [%r31+80], %r10 | |
1555 | ldx [%r31+88], %r11 | |
1556 | ldx [%r31+96], %r12 | |
1557 | ldx [%r31+104], %r13 | |
1558 | ldx [%r31+112], %r14 | |
1559 | mov %r31, %r15 | |
1560 | ldx [%r31+128], %r16 | |
1561 | ldx [%r31+136], %r17 | |
1562 | ldx [%r31+144], %r18 | |
1563 | ldx [%r31+152], %r19 | |
1564 | ldx [%r31+160], %r20 | |
1565 | ldx [%r31+168], %r21 | |
1566 | ldx [%r31+176], %r22 | |
1567 | ldx [%r31+184], %r23 | |
1568 | ldx [%r31+192], %r24 | |
1569 | ldx [%r31+200], %r25 | |
1570 | ldx [%r31+208], %r26 | |
1571 | ldx [%r31+216], %r27 | |
1572 | ldx [%r31+224], %r28 | |
1573 | ldx [%r31+232], %r29 | |
1574 | mov 0x32, %r14 | |
1575 | mov 0xb5, %r30 | |
1576 | save %r31, %r0, %r31 | |
1577 | ldx [%r31+0], %r0 | |
1578 | ldx [%r31+8], %r1 | |
1579 | ldx [%r31+16], %r2 | |
1580 | ldx [%r31+24], %r3 | |
1581 | ldx [%r31+32], %r4 | |
1582 | ldx [%r31+40], %r5 | |
1583 | ldx [%r31+48], %r6 | |
1584 | ldx [%r31+56], %r7 | |
1585 | ldx [%r31+64], %r8 | |
1586 | ldx [%r31+72], %r9 | |
1587 | ldx [%r31+80], %r10 | |
1588 | ldx [%r31+88], %r11 | |
1589 | ldx [%r31+96], %r12 | |
1590 | ldx [%r31+104], %r13 | |
1591 | ldx [%r31+112], %r14 | |
1592 | mov %r31, %r15 | |
1593 | ldx [%r31+128], %r16 | |
1594 | ldx [%r31+136], %r17 | |
1595 | ldx [%r31+144], %r18 | |
1596 | ldx [%r31+152], %r19 | |
1597 | ldx [%r31+160], %r20 | |
1598 | ldx [%r31+168], %r21 | |
1599 | ldx [%r31+176], %r22 | |
1600 | ldx [%r31+184], %r23 | |
1601 | ldx [%r31+192], %r24 | |
1602 | ldx [%r31+200], %r25 | |
1603 | ldx [%r31+208], %r26 | |
1604 | ldx [%r31+216], %r27 | |
1605 | ldx [%r31+224], %r28 | |
1606 | ldx [%r31+232], %r29 | |
1607 | mov 0x35, %r14 | |
1608 | mov 0x32, %r30 | |
1609 | save %r31, %r0, %r31 | |
1610 | ldx [%r31+0], %r0 | |
1611 | ldx [%r31+8], %r1 | |
1612 | ldx [%r31+16], %r2 | |
1613 | ldx [%r31+24], %r3 | |
1614 | ldx [%r31+32], %r4 | |
1615 | ldx [%r31+40], %r5 | |
1616 | ldx [%r31+48], %r6 | |
1617 | ldx [%r31+56], %r7 | |
1618 | ldx [%r31+64], %r8 | |
1619 | ldx [%r31+72], %r9 | |
1620 | ldx [%r31+80], %r10 | |
1621 | ldx [%r31+88], %r11 | |
1622 | ldx [%r31+96], %r12 | |
1623 | ldx [%r31+104], %r13 | |
1624 | ldx [%r31+112], %r14 | |
1625 | mov %r31, %r15 | |
1626 | ldx [%r31+128], %r16 | |
1627 | ldx [%r31+136], %r17 | |
1628 | ldx [%r31+144], %r18 | |
1629 | ldx [%r31+152], %r19 | |
1630 | ldx [%r31+160], %r20 | |
1631 | ldx [%r31+168], %r21 | |
1632 | ldx [%r31+176], %r22 | |
1633 | ldx [%r31+184], %r23 | |
1634 | ldx [%r31+192], %r24 | |
1635 | ldx [%r31+200], %r25 | |
1636 | ldx [%r31+208], %r26 | |
1637 | ldx [%r31+216], %r27 | |
1638 | ldx [%r31+224], %r28 | |
1639 | ldx [%r31+232], %r29 | |
1640 | mov 0x30, %r14 | |
1641 | mov 0x34, %r30 | |
1642 | save %r31, %r0, %r31 | |
1643 | restore | |
1644 | restore | |
1645 | restore | |
1646 | !Initializing float registers | |
1647 | ldd [%r31+0], %f0 | |
1648 | ldd [%r31+16], %f2 | |
1649 | ldd [%r31+32], %f4 | |
1650 | ldd [%r31+48], %f6 | |
1651 | ldd [%r31+64], %f8 | |
1652 | ldd [%r31+80], %f10 | |
1653 | ldd [%r31+96], %f12 | |
1654 | ldd [%r31+112], %f14 | |
1655 | ldd [%r31+128], %f16 | |
1656 | ldd [%r31+144], %f18 | |
1657 | ldd [%r31+160], %f20 | |
1658 | ldd [%r31+176], %f22 | |
1659 | ldd [%r31+192], %f24 | |
1660 | ldd [%r31+208], %f26 | |
1661 | ldd [%r31+224], %f28 | |
1662 | ldd [%r31+240], %f30 | |
1663 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. | |
1664 | ta T_CHANGE_HPRIV | |
1665 | setx diag_finish, %r29, %r28 | |
1666 | add %r28, 4, %r29 | |
1667 | wrpr %g0, 1, %tl | |
1668 | wrpr %r28, %tpc | |
1669 | wrpr %r29, %tnpc | |
1670 | wrpr %g0, 2, %tl | |
1671 | wrpr %r28, %tpc | |
1672 | wrpr %r29, %tnpc | |
1673 | wrpr %g0, 3, %tl | |
1674 | wrpr %r28, %tpc | |
1675 | wrpr %r29, %tnpc | |
1676 | wrpr %g0, 4, %tl | |
1677 | wrpr %r28, %tpc | |
1678 | wrpr %r29, %tnpc | |
1679 | wrpr %g0, 5, %tl | |
1680 | wrpr %r28, %tpc | |
1681 | wrpr %r29, %tnpc | |
1682 | wrpr %g0, 6, %tl | |
1683 | wrpr %r28, %tpc | |
1684 | wrpr %r29, %tnpc | |
1685 | wrpr %g0, 0, %tl | |
1686 | ||
1687 | ta T_CHANGE_HPRIV | |
1688 | ||
1689 | !Initializing Tick Cmprs | |
1690 | mov 1, %g2 | |
1691 | sllx %g2, 63, %g2 | |
1692 | or %g1, %g2, %g1 | |
1693 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1694 | wr %g1, %g0, %tick_cmpr | |
1695 | wr %g1, %g0, %sys_tick_cmpr | |
1696 | ta T_CHANGE_NONHPRIV | |
1697 | ||
1698 | .word 0x87802014 ! 1: WRASI_I wr %r0, 0x0014, %asi | |
1699 | .word 0x93902003 ! 2: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
1700 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_0)) -> intp(0,0,0) | |
1701 | intvec_0_0: | |
1702 | .word 0x39400001 ! 3: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1703 | .word 0x93902005 ! 4: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
1704 | .word 0xa750c000 ! 5: RDPR_TT rdpr %tt, %r19 | |
1705 | .word 0xe71fe001 ! 6: LDDF_I ldd [%r31, 0x0001], %f19 | |
1706 | debug_0_1: | |
1707 | setx debug_0_1 + 64, %r11, %r19 | |
1708 | mov 0x38, %r18 | |
1709 | .word 0xe6f00b12 ! 7: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1710 | invalw | |
1711 | mov 0x33, %r30 | |
1712 | .word 0x83d0001e ! 8: Tcc_R te icc_or_xcc, %r0 + %r30 | |
1713 | .word 0x93902007 ! 9: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
1714 | splash_cmpr_0_2: | |
1715 | nop | |
1716 | mov 1, %g2 | |
1717 | sllx %g2, 63, %g2 | |
1718 | or %g1, %g2, %g1 | |
1719 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1720 | .word 0xb184a001 ! 10: WR_STICK_REG_I wr %r18, 0x0001, %- | |
1721 | .word 0xe677e001 ! 11: STX_I stx %r19, [%r31 + 0x0001] | |
1722 | .word 0x93d020b5 ! 12: Tcc_I tne icc_or_xcc, %r0 + 181 | |
1723 | .word 0xe68008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r19 | |
1724 | .word 0x91d020b4 ! 14: Tcc_I ta icc_or_xcc, %r0 + 180 | |
1725 | .word 0xe64fe001 ! 15: LDSB_I ldsb [%r31 + 0x0001], %r19 | |
1726 | splash_lsu_0_3: | |
1727 | setx 0xa8ae6c2e634d36e5, %r1, %r2 | |
1728 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1729 | .word 0x3d400001 ! 16: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1730 | .word 0x8d903d2a ! 17: WRPR_PSTATE_I wrpr %r0, 0x1d2a, %pstate | |
1731 | intveclr_0_4: | |
1732 | set 0x2361aa76, %r28 | |
1733 | stxa %r28, [%g0] 0x72 | |
1734 | .word 0x25400001 ! 18: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1735 | .word 0x8d902bf8 ! 19: WRPR_PSTATE_I wrpr %r0, 0x0bf8, %pstate | |
1736 | .word 0xa1902003 ! 20: WRPR_GL_I wrpr %r0, 0x0003, %- | |
1737 | splash_htba_0_5: | |
1738 | set 0x80000, %r2 | |
1739 | ld [%r2+%r0], %r1 | |
1740 | ta T_CHANGE_HPRIV | |
1741 | set 0x80000, %r2 | |
1742 | .word 0x8b980002 ! 21: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
1743 | .word 0xe727c00b ! 22: STF_R st %f19, [%r11, %r31] | |
1744 | debug_0_6: | |
1745 | mov 0x38, %r18 | |
1746 | .word 0xfef00b12 ! 23: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1747 | otherw | |
1748 | mov 0x34, %r30 | |
1749 | .word 0x91d0001e ! 24: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1750 | .word 0xa7508000 ! 25: RDPR_TSTATE rdpr %tstate, %r19 | |
1751 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_7)) -> intp(0,1,3) | |
1752 | xir_0_7: | |
1753 | .word 0xa980a001 ! 26: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
1754 | .word 0x879021cd ! 27: WRPR_TT_I wrpr %r0, 0x01cd, %tt | |
1755 | .word 0x24700001 ! 28: BPLE <illegal instruction> | |
1756 | .word 0x93902002 ! 29: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
1757 | DS_0_8: | |
1758 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
1759 | .xword 0xdf467d6d ! Random illegal ? | |
1760 | .word 0xa9a00545 ! 1: FSQRTd fsqrt | |
1761 | .word 0xa3a0c831 ! 30: FADDs fadds %f3, %f17, %f17 | |
1762 | otherw | |
1763 | mov 0xb1, %r30 | |
1764 | .word 0x91d0001e ! 31: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1765 | .word 0x9f802001 ! 32: SIR sir 0x0001 | |
1766 | set 0xc562a835, %r28 | |
1767 | stxa %r28, [%g0] 0x73 | |
1768 | intvec_0_9: | |
1769 | .word 0x39400001 ! 33: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1770 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
1771 | ta T_CHANGE_NONPRIV ! macro | |
1772 | .word 0x8984400c ! 34: WRTICK_R wr %r17, %r12, %tick | |
1773 | .word 0x8d9030cb ! 35: WRPR_PSTATE_I wrpr %r0, 0x10cb, %pstate | |
1774 | splash_cmpr_0_11: | |
1775 | nop | |
1776 | mov 1, %g2 | |
1777 | sllx %g2, 63, %g2 | |
1778 | or %g1, %g2, %g1 | |
1779 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
1780 | .word 0xb1826001 ! 36: WR_STICK_REG_I wr %r9, 0x0001, %- | |
1781 | .word 0xe28008a0 ! 37: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
1782 | .word 0x8d90282a ! 38: WRPR_PSTATE_I wrpr %r0, 0x082a, %pstate | |
1783 | .word 0xe28008a0 ! 39: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
1784 | .word 0x87902382 ! 40: WRPR_TT_I wrpr %r0, 0x0382, %tt | |
1785 | .word 0x87802063 ! 41: WRASI_I wr %r0, 0x0063, %asi | |
1786 | debug_0_12: | |
1787 | mov 0x38, %r18 | |
1788 | .word 0xfef00b12 ! 42: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1789 | .word 0x87802058 ! 43: WRASI_I wr %r0, 0x0058, %asi | |
1790 | .word 0xe2800c20 ! 44: LDUWA_R lduwa [%r0, %r0] 0x61, %r17 | |
1791 | .word 0xe2800c20 ! 45: LDUWA_R lduwa [%r0, %r0] 0x61, %r17 | |
1792 | .word 0xe257c000 ! 46: LDSH_R ldsh [%r31 + %r0], %r17 | |
1793 | ta T_CHANGE_HPRIV ! macro | |
1794 | .word 0x83508000 ! 48: RDPR_TSTATE rdpr %tstate, %r1 | |
1795 | intveclr_0_13: | |
1796 | set 0xa5be3d67, %r28 | |
1797 | stxa %r28, [%g0] 0x72 | |
1798 | .word 0x25400001 ! 49: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1799 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_14)) -> intp(0,0,5) | |
1800 | intvec_0_14: | |
1801 | .word 0x39400001 ! 50: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1802 | DS_0_15: | |
1803 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
1804 | .word 0xbfefc000 ! 51: RESTORE_R restore %r31, %r0, %r31 | |
1805 | invalw | |
1806 | mov 0xb1, %r30 | |
1807 | .word 0x91d0001e ! 52: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1808 | nop | |
1809 | mov 0x80, %g3 | |
1810 | stxa %g3, [%g3] 0x5f | |
1811 | .word 0xc25fc000 ! 53: LDX_R ldx [%r31 + %r0], %r1 | |
1812 | .word 0x93902003 ! 54: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
1813 | DS_0_16: | |
1814 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
1815 | pdist %f26, %f12, %f2 | |
1816 | .word 0x9bb1c301 ! 55: ALIGNADDRESS alignaddr %r7, %r1, %r13 | |
1817 | .word 0xa351c000 ! 56: RDPR_TL rdpr %tl, %r17 | |
1818 | set 0x58bb456, %r28 | |
1819 | stxa %r28, [%g0] 0x73 | |
1820 | intvec_0_17: | |
1821 | .word 0x39400001 ! 57: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1822 | .word 0x9751c000 ! 58: RDPR_TL rdpr %tl, %r11 | |
1823 | .word 0x87802080 ! 59: WRASI_I wr %r0, 0x0080, %asi | |
1824 | .word 0xd73fc001 ! 60: STDF_R std %f11, [%r1, %r31] | |
1825 | splash_htba_0_18: | |
1826 | set 0x00390000, %r2 | |
1827 | st %r1, [%r2+%r0] | |
1828 | ta T_CHANGE_HPRIV | |
1829 | set 0x003a0000, %r2 | |
1830 | .word 0x8b980002 ! 61: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
1831 | .word 0xd6c804a0 ! 62: LDSBA_R ldsba [%r0, %r0] 0x25, %r11 | |
1832 | splash_lsu_0_19: | |
1833 | setx 0x957dac9c20a0877f, %r1, %r2 | |
1834 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1835 | .word 0x3d400001 ! 63: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1836 | ta T_CHANGE_HPRIV ! macro | |
1837 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_20)) -> intp(0,0,17) | |
1838 | intvec_0_20: | |
1839 | .word 0x39400001 ! 65: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1840 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_21)) -> intp(0,1,3) | |
1841 | xir_0_21: | |
1842 | .word 0xa984e001 ! 66: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
1843 | .word 0x99494000 ! 67: RDHPR_HTBA rdhpr %htba, %r12 | |
1844 | .word 0xa1902007 ! 68: WRPR_GL_I wrpr %r0, 0x0007, %- | |
1845 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
1846 | ta T_CHANGE_NONPRIV ! macro | |
1847 | .word 0xa3a01968 ! 69: FqTOd dis not found | |
1848 | ||
1849 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
1850 | ta T_CHANGE_NONHPRIV ! macro | |
1851 | .word 0x836c6001 ! 70: SDIVX_I sdivx %r17, 0x0001, %r1 | |
1852 | .word 0xc397e001 ! 71: LDQFA_I - [%r31, 0x0001], %f1 | |
1853 | DS_0_24: | |
1854 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
1855 | .xword 0xb9640c73 ! Random illegal ? | |
1856 | .word 0xc9128012 ! 1: LDQF_R - [%r10, %r18], %f4 | |
1857 | .word 0x8ba20824 ! 72: FADDs fadds %f8, %f4, %f5 | |
1858 | .word 0x8780201c ! 73: WRASI_I wr %r0, 0x001c, %asi | |
1859 | debug_0_25: | |
1860 | setx debug_0_25 + 64, %r11, %r19 | |
1861 | mov 0x38, %r18 | |
1862 | .word 0xe6f00b12 ! 74: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1863 | nop | |
1864 | mov 0x80, %g3 | |
1865 | stxa %g3, [%g3] 0x57 | |
1866 | .word 0xca5fc000 ! 75: LDX_R ldx [%r31 + %r0], %r5 | |
1867 | debug_0_26: | |
1868 | mov 0x38, %r18 | |
1869 | .word 0xfef00b12 ! 76: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1870 | .word 0xa350c000 ! 77: RDPR_TT rdpr %tt, %r17 | |
1871 | .word 0xa1902003 ! 78: WRPR_GL_I wrpr %r0, 0x0003, %- | |
1872 | debug_0_27: | |
1873 | mov 0x38, %r18 | |
1874 | .word 0xfef00b12 ! 79: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1875 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_28)) -> intp(0,1,3) | |
1876 | xir_0_28: | |
1877 | .word 0xa980a001 ! 80: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
1878 | tagged_0_29: | |
1879 | taddcctv %r22, 0x1ef7, %r23 | |
1880 | .word 0xe207e001 ! 81: LDUW_I lduw [%r31 + 0x0001], %r17 | |
1881 | .word 0x91d02033 ! 82: Tcc_I ta icc_or_xcc, %r0 + 51 | |
1882 | nop | |
1883 | mov 0x80, %g3 | |
1884 | stxa %g3, [%g3] 0x57 | |
1885 | .word 0xe25fc000 ! 83: LDX_R ldx [%r31 + %r0], %r17 | |
1886 | mondo_0_30: | |
1887 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1888 | ||
1889 | stxa %r16, [%r0+0x3c8] %asi | |
1890 | .word 0x9d948014 ! 84: WRPR_WSTATE_R wrpr %r18, %r20, %wstate | |
1891 | .word 0x8790238a ! 85: WRPR_TT_I wrpr %r0, 0x038a, %tt | |
1892 | splash_cmpr_0_31: | |
1893 | nop | |
1894 | mov 1, %g2 | |
1895 | sllx %g2, 63, %g2 | |
1896 | or %g1, %g2, %g1 | |
1897 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
1898 | .word 0xb1846001 ! 86: WR_STICK_REG_I wr %r17, 0x0001, %- | |
1899 | .word 0xe317c000 ! 87: LDQF_R - [%r31, %r0], %f17 | |
1900 | .word 0xe24fc000 ! 88: LDSB_R ldsb [%r31 + %r0], %r17 | |
1901 | .word 0xa1902008 ! 89: WRPR_GL_I wrpr %r0, 0x0008, %- | |
1902 | .word 0x93902007 ! 90: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
1903 | DS_0_32: | |
1904 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
1905 | .word 0xbfefc000 ! 91: RESTORE_R restore %r31, %r0, %r31 | |
1906 | .word 0x91d02034 ! 92: Tcc_I ta icc_or_xcc, %r0 + 52 | |
1907 | set 0x725aa73d, %r28 | |
1908 | stxa %r28, [%g0] 0x73 | |
1909 | intvec_0_33: | |
1910 | .word 0x39400001 ! 93: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1911 | debug_0_34: | |
1912 | setx debug_0_34 + 64, %r11, %r19 | |
1913 | mov 0x38, %r18 | |
1914 | .word 0xe6f00b12 ! 94: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1915 | .word 0x8d9032bf ! 95: WRPR_PSTATE_I wrpr %r0, 0x12bf, %pstate | |
1916 | ta T_CHANGE_HPRIV ! macro | |
1917 | .word 0x83d02034 ! 97: Tcc_I te icc_or_xcc, %r0 + 52 | |
1918 | .word 0x879023e0 ! 98: WRPR_TT_I wrpr %r0, 0x03e0, %tt | |
1919 | DS_0_35: | |
1920 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
1921 | .word 0xbfefc000 ! 99: RESTORE_R restore %r31, %r0, %r31 | |
1922 | splash_lsu_0_36: | |
1923 | setx 0xa6d4c12b30017f01, %r1, %r2 | |
1924 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1925 | .word 0x3d400001 ! 100: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1926 | mondo_0_37: | |
1927 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1928 | ||
1929 | stxa %r10, [%r0+0x3d0] %asi | |
1930 | .word 0x9d924013 ! 101: WRPR_WSTATE_R wrpr %r9, %r19, %wstate | |
1931 | intveclr_0_38: | |
1932 | set 0xbad6bf27, %r28 | |
1933 | stxa %r28, [%g0] 0x72 | |
1934 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1935 | .word 0x91d02032 ! 103: Tcc_I ta icc_or_xcc, %r0 + 50 | |
1936 | .word 0xe247e001 ! 104: LDSW_I ldsw [%r31 + 0x0001], %r17 | |
1937 | splash_lsu_0_39: | |
1938 | setx 0x75ce936ddfada48d, %r1, %r2 | |
1939 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1940 | .word 0x3d400001 ! 105: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1941 | splash_lsu_0_40: | |
1942 | setx 0xf988f527a0b6c477, %r1, %r2 | |
1943 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1944 | .word 0x3d400001 ! 106: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1945 | .word 0x9f802001 ! 107: SIR sir 0x0001 | |
1946 | change_to_randtl_0_41: | |
1947 | ta T_CHANGE_HPRIV ! macro | |
1948 | done_change_to_randtl_0_41: | |
1949 | .word 0x8f902005 ! 108: WRPR_TL_I wrpr %r0, 0x0005, %tl | |
1950 | mondo_0_42: | |
1951 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1952 | ||
1953 | stxa %r17, [%r0+0x3d0] %asi | |
1954 | .word 0x9d950009 ! 109: WRPR_WSTATE_R wrpr %r20, %r9, %wstate | |
1955 | .word 0x93902000 ! 110: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
1956 | .word 0xe28008a0 ! 111: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
1957 | .word 0xa190200c ! 112: WRPR_GL_I wrpr %r0, 0x000c, %- | |
1958 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_43)) -> intp(0,1,3) | |
1959 | xir_0_43: | |
1960 | .word 0xa9806001 ! 113: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
1961 | .word 0x93d02035 ! 114: Tcc_I tne icc_or_xcc, %r0 + 53 | |
1962 | .word 0x86d44005 ! 115: UMULcc_R umulcc %r17, %r5, %r3 | |
1963 | invalw | |
1964 | mov 0x33, %r30 | |
1965 | .word 0x93d0001e ! 116: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
1966 | DS_0_44: | |
1967 | nop | |
1968 | not %g0, %g2 | |
1969 | jmp %g2 | |
1970 | .word 0x9d902004 ! 117: WRPR_WSTATE_I wrpr %r0, 0x0004, %wstate | |
1971 | tagged_0_45: | |
1972 | taddcctv %r25, 0x1e51, %r18 | |
1973 | .word 0xc607e001 ! 118: LDUW_I lduw [%r31 + 0x0001], %r3 | |
1974 | .word 0xc737c005 ! 119: STQF_R - %f3, [%r5, %r31] | |
1975 | .word 0xa3504000 ! 120: RDPR_TNPC rdpr %tnpc, %r17 | |
1976 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_46)) -> intp(0,0,18) | |
1977 | intvec_0_46: | |
1978 | .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1979 | .word 0xe317c000 ! 122: LDQF_R - [%r31, %r0], %f17 | |
1980 | set 0x4c028418, %r28 | |
1981 | stxa %r28, [%g0] 0x73 | |
1982 | intvec_0_47: | |
1983 | .word 0x39400001 ! 123: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1984 | .word 0x91d02035 ! 124: Tcc_I ta icc_or_xcc, %r0 + 53 | |
1985 | .word 0x9ba34d30 ! 125: FsMULd fsmuld %f13, %f16, %f44 | |
1986 | .word 0x3c800001 ! 126: BPOS bpos,a <label_0x1> | |
1987 | .word 0x8d902563 ! 127: WRPR_PSTATE_I wrpr %r0, 0x0563, %pstate | |
1988 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_48)) -> intp(0,0,20) | |
1989 | intvec_0_48: | |
1990 | .word 0x39400001 ! 128: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1991 | .word 0x93902002 ! 129: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
1992 | .word 0x99902001 ! 130: WRPR_CLEANWIN_I wrpr %r0, 0x0001, %cleanwin | |
1993 | otherw | |
1994 | mov 0x34, %r30 | |
1995 | .word 0x91d0001e ! 131: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1996 | intveclr_0_49: | |
1997 | set 0xd35006a, %r28 | |
1998 | stxa %r28, [%g0] 0x72 | |
1999 | .word 0x25400001 ! 132: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2000 | .word 0x87902321 ! 133: WRPR_TT_I wrpr %r0, 0x0321, %tt | |
2001 | .word 0x24700001 ! 134: BPLE <illegal instruction> | |
2002 | splash_htba_0_50: | |
2003 | set 0x80000, %r2 | |
2004 | st %r1, [%r2+%r0] | |
2005 | ta T_CHANGE_HPRIV | |
2006 | set 0x80000, %r2 | |
2007 | .word 0x8b980002 ! 135: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2008 | .word 0xa190200d ! 136: WRPR_GL_I wrpr %r0, 0x000d, %- | |
2009 | otherw | |
2010 | mov 0x33, %r30 | |
2011 | .word 0x91d0001e ! 137: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2012 | set 0x42e78324, %r28 | |
2013 | stxa %r28, [%g0] 0x73 | |
2014 | intvec_0_51: | |
2015 | .word 0x39400001 ! 138: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2016 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_52)) -> intp(0,0,10) | |
2017 | intvec_0_52: | |
2018 | .word 0x39400001 ! 139: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2019 | .word 0x91d020b5 ! 140: Tcc_I ta icc_or_xcc, %r0 + 181 | |
2020 | nop | |
2021 | mov 0x80, %g3 | |
2022 | stxa %g3, [%g3] 0x5f | |
2023 | .word 0xda5fc000 ! 141: LDX_R ldx [%r31 + %r0], %r13 | |
2024 | splash_lsu_0_53: | |
2025 | setx 0xc01faa00e4a1fb1d, %r1, %r2 | |
2026 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2027 | .word 0x3d400001 ! 142: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2028 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_54)) -> intp(0,0,5) | |
2029 | intvec_0_54: | |
2030 | .word 0x39400001 ! 143: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2031 | set 0x5f4c267d, %r28 | |
2032 | stxa %r28, [%g0] 0x73 | |
2033 | intvec_0_55: | |
2034 | .word 0x39400001 ! 144: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2035 | .word 0xad846001 ! 145: WR_SOFTINT_REG_I wr %r17, 0x0001, %softint | |
2036 | splash_lsu_0_56: | |
2037 | setx 0xddb812de8e058bc5, %r1, %r2 | |
2038 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2039 | .word 0x3d400001 ! 146: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2040 | intveclr_0_57: | |
2041 | set 0xe7d6697, %r28 | |
2042 | stxa %r28, [%g0] 0x72 | |
2043 | .word 0x25400001 ! 147: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2044 | .word 0xda8008a0 ! 148: LDUWA_R lduwa [%r0, %r0] 0x45, %r13 | |
2045 | .word 0x8d902fcc ! 149: WRPR_PSTATE_I wrpr %r0, 0x0fcc, %pstate | |
2046 | tagged_0_58: | |
2047 | tsubcctv %r4, 0x14db, %r13 | |
2048 | .word 0xda07e001 ! 150: LDUW_I lduw [%r31 + 0x0001], %r13 | |
2049 | .word 0xda8008a0 ! 151: LDUWA_R lduwa [%r0, %r0] 0x45, %r13 | |
2050 | .word 0x8353c000 ! 152: RDPR_FQ <illegal instruction> | |
2051 | .word 0x34800001 ! 153: BG bg,a <label_0x1> | |
2052 | .word 0x8d9030fa ! 154: WRPR_PSTATE_I wrpr %r0, 0x10fa, %pstate | |
2053 | .word 0x81982147 ! 155: WRHPR_HPSTATE_I wrhpr %r0, 0x0147, %hpstate | |
2054 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_59)) -> intp(0,1,3) | |
2055 | xir_0_59: | |
2056 | .word 0xa9842001 ! 156: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
2057 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_60)) -> intp(0,0,31) | |
2058 | intvec_0_60: | |
2059 | .word 0x39400001 ! 157: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2060 | .word 0xc28fe000 ! 158: LDUBA_I lduba [%r31, + 0x0000] %asi, %r1 | |
2061 | intveclr_0_61: | |
2062 | set 0xd3ee1eb3, %r28 | |
2063 | stxa %r28, [%g0] 0x72 | |
2064 | .word 0x25400001 ! 159: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2065 | intveclr_0_62: | |
2066 | set 0x6a8304a2, %r28 | |
2067 | stxa %r28, [%g0] 0x72 | |
2068 | .word 0x25400001 ! 160: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2069 | otherw | |
2070 | mov 0x35, %r30 | |
2071 | .word 0x91d0001e ! 161: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2072 | debug_0_63: | |
2073 | mov 0x38, %r18 | |
2074 | .word 0xfef00b12 ! 162: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2075 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_64)) -> intp(0,0,22) | |
2076 | intvec_0_64: | |
2077 | .word 0x39400001 ! 163: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2078 | debug_0_65: | |
2079 | mov 0x38, %r18 | |
2080 | .word 0xfef00b12 ! 164: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2081 | .word 0x93902004 ! 165: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
2082 | debug_0_66: | |
2083 | mov 0x38, %r18 | |
2084 | .word 0xfef00b12 ! 166: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2085 | set 0xafd67371, %r28 | |
2086 | stxa %r28, [%g0] 0x73 | |
2087 | intvec_0_67: | |
2088 | .word 0x39400001 ! 167: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2089 | DS_0_68: | |
2090 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2091 | .word 0xe534a001 ! 1: STQF_I - %f18, [0x0001, %r18] | |
2092 | normalw | |
2093 | .word 0xa9458000 ! 168: RD_SOFTINT_REG rd %softint, %r20 | |
2094 | debug_0_69: | |
2095 | mov 0x38, %r18 | |
2096 | .word 0xfef00b12 ! 169: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2097 | debug_0_70: | |
2098 | setx debug_0_70 + 64, %r11, %r19 | |
2099 | mov 0x38, %r18 | |
2100 | .word 0xe6f00b12 ! 170: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2101 | tagged_0_71: | |
2102 | taddcctv %r10, 0x195b, %r16 | |
2103 | .word 0xe807e001 ! 171: LDUW_I lduw [%r31 + 0x0001], %r20 | |
2104 | tagged_0_72: | |
2105 | tsubcctv %r24, 0x141a, %r7 | |
2106 | .word 0xe807e001 ! 172: LDUW_I lduw [%r31 + 0x0001], %r20 | |
2107 | .word 0x8198284d ! 173: WRHPR_HPSTATE_I wrhpr %r0, 0x084d, %hpstate | |
2108 | mondo_0_73: | |
2109 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2110 | ||
2111 | stxa %r4, [%r0+0x3d0] %asi | |
2112 | .word 0x9d924009 ! 174: WRPR_WSTATE_R wrpr %r9, %r9, %wstate | |
2113 | .word 0xe8cfe000 ! 175: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r20 | |
2114 | .word 0x9f802001 ! 176: SIR sir 0x0001 | |
2115 | .word 0xe8800b00 ! 177: LDUWA_R lduwa [%r0, %r0] 0x58, %r20 | |
2116 | DS_0_74: | |
2117 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2118 | pdist %f8, %f30, %f4 | |
2119 | .word 0x97b4c308 ! 178: ALIGNADDRESS alignaddr %r19, %r8, %r11 | |
2120 | ta T_CHANGE_HPRIV ! macro | |
2121 | .word 0xa550c000 ! 180: RDPR_TT rdpr %tt, %r18 | |
2122 | .word 0x87802058 ! 181: WRASI_I wr %r0, 0x0058, %asi | |
2123 | .word 0xe497e030 ! 182: LDUHA_I lduha [%r31, + 0x0030] %asi, %r18 | |
2124 | .word 0xe48008a0 ! 183: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 | |
2125 | .word 0xe4800be0 ! 184: LDUWA_R lduwa [%r0, %r0] 0x5f, %r18 | |
2126 | nop | |
2127 | mov 0x80, %g3 | |
2128 | stxa %g3, [%g3] 0x57 | |
2129 | .word 0xe45fc000 ! 185: LDX_R ldx [%r31 + %r0], %r18 | |
2130 | debug_0_75: | |
2131 | mov 0x38, %r18 | |
2132 | .word 0xfef00b12 ! 186: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2133 | .word 0x95a04d34 ! 187: FsMULd fsmuld %f1, %f20, %f10 | |
2134 | ta T_CHANGE_HPRIV ! macro | |
2135 | intveclr_0_76: | |
2136 | set 0xc36622d9, %r28 | |
2137 | stxa %r28, [%g0] 0x72 | |
2138 | .word 0x25400001 ! 189: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2139 | .word 0xd4800b80 ! 190: LDUWA_R lduwa [%r0, %r0] 0x5c, %r10 | |
2140 | .word 0x879023c6 ! 191: WRPR_TT_I wrpr %r0, 0x03c6, %tt | |
2141 | .word 0x81982e9f ! 192: WRHPR_HPSTATE_I wrhpr %r0, 0x0e9f, %hpstate | |
2142 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_77)) -> intp(0,1,3) | |
2143 | xir_0_77: | |
2144 | .word 0xa982a001 ! 193: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
2145 | .word 0x8153c000 ! 194: RDPR_FQ <illegal instruction> | |
2146 | .word 0xc04fe001 ! 195: LDSB_I ldsb [%r31 + 0x0001], %r0 | |
2147 | ta T_CHANGE_HPRIV ! macro | |
2148 | DS_0_78: | |
2149 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2150 | .word 0xc3300008 ! 1: STQF_R - %f1, [%r8, %r0] | |
2151 | normalw | |
2152 | .word 0xa5458000 ! 197: RD_SOFTINT_REG rd %softint, %r18 | |
2153 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_79)) -> intp(0,1,3) | |
2154 | xir_0_79: | |
2155 | .word 0xa984e001 ! 198: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
2156 | .word 0xa1902003 ! 199: WRPR_GL_I wrpr %r0, 0x0003, %- | |
2157 | .word 0xe517c000 ! 200: LDQF_R - [%r31, %r0], %f18 | |
2158 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_80)) -> intp(0,0,4) | |
2159 | intvec_0_80: | |
2160 | .word 0x39400001 ! 201: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2161 | debug_0_81: | |
2162 | mov 0x38, %r18 | |
2163 | .word 0xfef00b12 ! 202: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2164 | .word 0x9192e001 ! 203: WRPR_PIL_I wrpr %r11, 0x0001, %pil | |
2165 | splash_lsu_0_82: | |
2166 | setx 0xe3024f0345fb9cff, %r1, %r2 | |
2167 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2168 | .word 0x3d400001 ! 204: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2169 | otherw | |
2170 | mov 0xb3, %r30 | |
2171 | .word 0x91d0001e ! 205: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2172 | .word 0x93902000 ! 206: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2173 | .word 0x87464000 ! 207: RD_STICK_CMPR_REG rd %-, %r3 | |
2174 | set 0xa12c90d6, %r28 | |
2175 | stxa %r28, [%g0] 0x73 | |
2176 | intvec_0_83: | |
2177 | .word 0x39400001 ! 208: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2178 | nop | |
2179 | mov 0x80, %g3 | |
2180 | stxa %g3, [%g3] 0x5f | |
2181 | .word 0xc65fc000 ! 209: LDX_R ldx [%r31 + %r0], %r3 | |
2182 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_84)) -> intp(0,0,20) | |
2183 | intvec_0_84: | |
2184 | .word 0x39400001 ! 210: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2185 | .word 0x87902263 ! 211: WRPR_TT_I wrpr %r0, 0x0263, %tt | |
2186 | .word 0xc71fc000 ! 212: LDDF_R ldd [%r31, %r0], %f3 | |
2187 | set 0xc6523fc1, %r28 | |
2188 | stxa %r28, [%g0] 0x73 | |
2189 | intvec_0_85: | |
2190 | .word 0x39400001 ! 213: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2191 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_86)) -> intp(0,1,3) | |
2192 | xir_0_86: | |
2193 | .word 0xa980a001 ! 214: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
2194 | .word 0x8d903a3a ! 215: WRPR_PSTATE_I wrpr %r0, 0x1a3a, %pstate | |
2195 | DS_0_87: | |
2196 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2197 | .word 0xe1326001 ! 1: STQF_I - %f16, [0x0001, %r9] | |
2198 | normalw | |
2199 | .word 0x95458000 ! 216: RD_SOFTINT_REG rd %softint, %r10 | |
2200 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_88)) -> intp(0,0,0) | |
2201 | intvec_0_88: | |
2202 | .word 0x39400001 ! 217: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2203 | tagged_0_89: | |
2204 | taddcctv %r21, 0x1b6a, %r12 | |
2205 | .word 0xd407e001 ! 218: LDUW_I lduw [%r31 + 0x0001], %r10 | |
2206 | .word 0x81510000 ! 219: RDPR_TICK rdpr %tick, %r0 | |
2207 | .word 0xd527e001 ! 220: STF_I st %f10, [0x0001, %r31] | |
2208 | .word 0x94692001 ! 221: UDIVX_I udivx %r4, 0x0001, %r10 | |
2209 | .word 0x93902000 ! 222: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2210 | .word 0xd48008a0 ! 223: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
2211 | mondo_0_90: | |
2212 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2213 | ||
2214 | stxa %r19, [%r0+0x3c0] %asi | |
2215 | .word 0x9d93400a ! 224: WRPR_WSTATE_R wrpr %r13, %r10, %wstate | |
2216 | .word 0xa3450000 ! 225: RD_SET_SOFTINT rd %set_softint, %r17 | |
2217 | .word 0x28800001 ! 226: BLEU bleu,a <label_0x1> | |
2218 | splash_lsu_0_91: | |
2219 | setx 0xa1016e342a46ca0f, %r1, %r2 | |
2220 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2221 | .word 0x3d400001 ! 227: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2222 | nop | |
2223 | mov 0x80, %g3 | |
2224 | stxa %g3, [%g3] 0x5f | |
2225 | .word 0xe25fc000 ! 228: LDX_R ldx [%r31 + %r0], %r17 | |
2226 | .word 0x9f802001 ! 229: SIR sir 0x0001 | |
2227 | .word 0xe207c000 ! 230: LDUW_R lduw [%r31 + %r0], %r17 | |
2228 | .word 0x93d02035 ! 231: Tcc_I tne icc_or_xcc, %r0 + 53 | |
2229 | .word 0xa8d42001 ! 232: UMULcc_I umulcc %r16, 0x0001, %r20 | |
2230 | .word 0xe8c7e020 ! 233: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r20 | |
2231 | splash_lsu_0_92: | |
2232 | setx 0xbd34528a27a88021, %r1, %r2 | |
2233 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2234 | .word 0x3d400001 ! 234: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2235 | ta T_CHANGE_HPRIV ! macro | |
2236 | .word 0x93a00546 ! 236: FSQRTd fsqrt | |
2237 | nop | |
2238 | mov 0x80, %g3 | |
2239 | stxa %g3, [%g3] 0x5f | |
2240 | .word 0xd25fc000 ! 237: LDX_R ldx [%r31 + %r0], %r9 | |
2241 | .word 0x8d903569 ! 238: WRPR_PSTATE_I wrpr %r0, 0x1569, %pstate | |
2242 | tagged_0_93: | |
2243 | taddcctv %r14, 0x1420, %r5 | |
2244 | .word 0xd207e001 ! 239: LDUW_I lduw [%r31 + 0x0001], %r9 | |
2245 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_94)) -> intp(0,0,31) | |
2246 | intvec_0_94: | |
2247 | .word 0x39400001 ! 240: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2248 | nop | |
2249 | mov 0x80, %g3 | |
2250 | stxa %g3, [%g3] 0x5f | |
2251 | .word 0xd25fc000 ! 241: LDX_R ldx [%r31 + %r0], %r9 | |
2252 | tagged_0_95: | |
2253 | taddcctv %r17, 0x1de7, %r19 | |
2254 | .word 0xd207e001 ! 242: LDUW_I lduw [%r31 + 0x0001], %r9 | |
2255 | .word 0xd2c804a0 ! 243: LDSBA_R ldsba [%r0, %r0] 0x25, %r9 | |
2256 | .word 0xd23fc006 ! 244: STD_R std %r9, [%r31 + %r6] | |
2257 | .word 0x91d02034 ! 245: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2258 | nop | |
2259 | mov 0x80, %g3 | |
2260 | stxa %g3, [%g3] 0x57 | |
2261 | .word 0xd25fc000 ! 246: LDX_R ldx [%r31 + %r0], %r9 | |
2262 | .word 0xd2d7e010 ! 247: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r9 | |
2263 | .word 0xd2c804a0 ! 248: LDSBA_R ldsba [%r0, %r0] 0x25, %r9 | |
2264 | nop | |
2265 | mov 0x80, %g3 | |
2266 | stxa %g3, [%g3] 0x57 | |
2267 | .word 0xd25fc000 ! 249: LDX_R ldx [%r31 + %r0], %r9 | |
2268 | .word 0xa2f9800d ! 250: SDIVcc_R sdivcc %r6, %r13, %r17 | |
2269 | .word 0x8d903a9e ! 251: WRPR_PSTATE_I wrpr %r0, 0x1a9e, %pstate | |
2270 | splash_lsu_0_96: | |
2271 | setx 0x674e5cab551efb49, %r1, %r2 | |
2272 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2273 | .word 0x3d400001 ! 252: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2274 | splash_cmpr_0_97: | |
2275 | nop | |
2276 | mov 1, %g2 | |
2277 | sllx %g2, 63, %g2 | |
2278 | or %g1, %g2, %g1 | |
2279 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2280 | .word 0xb1816001 ! 253: WR_STICK_REG_I wr %r5, 0x0001, %- | |
2281 | .word 0xe21fc000 ! 254: LDD_R ldd [%r31 + %r0], %r17 | |
2282 | DS_0_98: | |
2283 | nop | |
2284 | not %g0, %g2 | |
2285 | jmp %g2 | |
2286 | .word 0x9d902003 ! 255: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
2287 | .word 0xe28008a0 ! 256: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
2288 | .word 0xe2dfe030 ! 257: LDXA_I ldxa [%r31, + 0x0030] %asi, %r17 | |
2289 | set 0xdbf2bca6, %r28 | |
2290 | stxa %r28, [%g0] 0x73 | |
2291 | intvec_0_99: | |
2292 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2293 | invalw | |
2294 | mov 0x34, %r30 | |
2295 | .word 0x93d0001e ! 259: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2296 | .word 0x93902001 ! 260: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
2297 | .word 0xe29fc020 ! 261: LDDA_R ldda [%r31, %r0] 0x01, %r17 | |
2298 | .word 0xa1902006 ! 262: WRPR_GL_I wrpr %r0, 0x0006, %- | |
2299 | .word 0x8d9022a3 ! 263: WRPR_PSTATE_I wrpr %r0, 0x02a3, %pstate | |
2300 | .word 0xe257c000 ! 264: LDSH_R ldsh [%r31 + %r0], %r17 | |
2301 | .word 0x32800001 ! 265: BNE bne,a <label_0x1> | |
2302 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_100)) -> intp(0,0,16) | |
2303 | intvec_0_100: | |
2304 | .word 0x39400001 ! 266: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2305 | .word 0xa9454000 ! 267: RD_CLEAR_SOFTINT rd %clear_softint, %r20 | |
2306 | .word 0x8d802000 ! 268: WRFPRS_I wr %r0, 0x0000, %fprs | |
2307 | .word 0x9b50c000 ! 269: RDPR_TT rdpr %tt, %r13 | |
2308 | .word 0x93902001 ! 270: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
2309 | .word 0xda1fc000 ! 271: LDD_R ldd [%r31 + %r0], %r13 | |
2310 | .word 0x87802088 ! 272: WRASI_I wr %r0, 0x0088, %asi | |
2311 | .word 0xdb3fe001 ! 273: STDF_I std %f13, [0x0001, %r31] | |
2312 | .word 0x87450000 ! 274: RD_SET_SOFTINT rd %set_softint, %r3 | |
2313 | .word 0x819828d5 ! 275: WRHPR_HPSTATE_I wrhpr %r0, 0x08d5, %hpstate | |
2314 | .word 0xc64fe001 ! 276: LDSB_I ldsb [%r31 + 0x0001], %r3 | |
2315 | DS_0_101: | |
2316 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2317 | .word 0xcf304000 ! 1: STQF_R - %f7, [%r0, %r1] | |
2318 | normalw | |
2319 | .word 0xa1458000 ! 277: RD_SOFTINT_REG rd %softint, %r16 | |
2320 | DS_0_102: | |
2321 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2322 | .word 0xd7352001 ! 1: STQF_I - %f11, [0x0001, %r20] | |
2323 | normalw | |
2324 | .word 0xa3458000 ! 278: RD_SOFTINT_REG rd %softint, %r17 | |
2325 | .word 0xe29fc020 ! 279: LDDA_R ldda [%r31, %r0] 0x01, %r17 | |
2326 | .word 0xe2c00e80 ! 280: LDSWA_R ldswa [%r0, %r0] 0x74, %r17 | |
2327 | DS_0_103: | |
2328 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2329 | pdist %f4, %f28, %f14 | |
2330 | .word 0xa3b4030a ! 281: ALIGNADDRESS alignaddr %r16, %r10, %r17 | |
2331 | nop | |
2332 | mov 0x80, %g3 | |
2333 | stxa %g3, [%g3] 0x57 | |
2334 | .word 0xe25fc000 ! 282: LDX_R ldx [%r31 + %r0], %r17 | |
2335 | .word 0xa1500000 ! 283: RDPR_TPC rdpr %tpc, %r16 | |
2336 | splash_htba_0_104: | |
2337 | set 0x80000, %r2 | |
2338 | st %r1, [%r2+%r0] | |
2339 | ta T_CHANGE_HPRIV | |
2340 | set 0x80000, %r2 | |
2341 | .word 0x8b980002 ! 284: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2342 | .word 0xe01fe001 ! 285: LDD_I ldd [%r31 + 0x0001], %r16 | |
2343 | change_to_randtl_0_105: | |
2344 | ta T_CHANGE_HPRIV ! macro | |
2345 | done_change_to_randtl_0_105: | |
2346 | .word 0x8f902005 ! 286: WRPR_TL_I wrpr %r0, 0x0005, %tl | |
2347 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2348 | ta T_CHANGE_NONPRIV ! macro | |
2349 | .word 0x8981c002 ! 287: WRTICK_R wr %r7, %r2, %tick | |
2350 | set 0x9b479548, %r28 | |
2351 | stxa %r28, [%g0] 0x73 | |
2352 | intvec_0_107: | |
2353 | .word 0x39400001 ! 288: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2354 | tagged_0_108: | |
2355 | tsubcctv %r26, 0x12b2, %r15 | |
2356 | .word 0xe007e001 ! 289: LDUW_I lduw [%r31 + 0x0001], %r16 | |
2357 | set 0xd56319b8, %r28 | |
2358 | stxa %r28, [%g0] 0x73 | |
2359 | intvec_0_109: | |
2360 | .word 0x39400001 ! 290: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2361 | .word 0xab820010 ! 291: WR_CLEAR_SOFTINT_R wr %r8, %r16, %clear_softint | |
2362 | .word 0xe0d7e000 ! 292: LDSHA_I ldsha [%r31, + 0x0000] %asi, %r16 | |
2363 | intveclr_0_110: | |
2364 | set 0xe92cbffd, %r28 | |
2365 | stxa %r28, [%g0] 0x72 | |
2366 | .word 0x25400001 ! 293: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2367 | nop | |
2368 | mov 0x80, %g3 | |
2369 | stxa %g3, [%g3] 0x57 | |
2370 | .word 0xe05fc000 ! 294: LDX_R ldx [%r31 + %r0], %r16 | |
2371 | splash_cmpr_0_111: | |
2372 | nop | |
2373 | mov 1, %g2 | |
2374 | sllx %g2, 63, %g2 | |
2375 | or %g1, %g2, %g1 | |
2376 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2377 | .word 0xb184a001 ! 295: WR_STICK_REG_I wr %r18, 0x0001, %- | |
2378 | .word 0x91d02035 ! 296: Tcc_I ta icc_or_xcc, %r0 + 53 | |
2379 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_112)) -> intp(0,1,3) | |
2380 | xir_0_112: | |
2381 | .word 0xa9832001 ! 297: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
2382 | .word 0x8d802000 ! 298: WRFPRS_I wr %r0, 0x0000, %fprs | |
2383 | .word 0x91d02032 ! 299: Tcc_I ta icc_or_xcc, %r0 + 50 | |
2384 | otherw | |
2385 | mov 0x31, %r30 | |
2386 | .word 0x91d0001e ! 300: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2387 | DS_0_113: | |
2388 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2389 | .word 0xbfe7c000 ! 301: SAVE_R save %r31, %r0, %r31 | |
2390 | .word 0xa44a000d ! 302: MULX_R mulx %r8, %r13, %r18 | |
2391 | nop | |
2392 | mov 0x80, %g3 | |
2393 | stxa %g3, [%g3] 0x5f | |
2394 | .word 0xe45fc000 ! 303: LDX_R ldx [%r31 + %r0], %r18 | |
2395 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_114)) -> intp(0,0,17) | |
2396 | intvec_0_114: | |
2397 | .word 0x39400001 ! 304: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2398 | .word 0x81982f5c ! 305: WRHPR_HPSTATE_I wrhpr %r0, 0x0f5c, %hpstate | |
2399 | .word 0x93902005 ! 306: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
2400 | .word 0xe45fe001 ! 307: LDX_I ldx [%r31 + 0x0001], %r18 | |
2401 | .word 0xe457c000 ! 308: LDSH_R ldsh [%r31 + %r0], %r18 | |
2402 | tagged_0_115: | |
2403 | taddcctv %r19, 0x1f8c, %r15 | |
2404 | .word 0xe407e001 ! 309: LDUW_I lduw [%r31 + 0x0001], %r18 | |
2405 | .word 0x81510000 ! 310: RDPR_TICK rdpr %tick, %r0 | |
2406 | .word 0xa7494000 ! 311: RDHPR_HTBA rdhpr %htba, %r19 | |
2407 | .word 0xa1902001 ! 312: WRPR_GL_I wrpr %r0, 0x0001, %- | |
2408 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_116)) -> intp(0,0,20) | |
2409 | intvec_0_116: | |
2410 | .word 0x39400001 ! 313: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2411 | debug_0_117: | |
2412 | mov 0x38, %r18 | |
2413 | .word 0xfef00b12 ! 314: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2414 | .word 0xe6d004a0 ! 315: LDSHA_R ldsha [%r0, %r0] 0x25, %r19 | |
2415 | .word 0x87902113 ! 316: WRPR_TT_I wrpr %r0, 0x0113, %tt | |
2416 | .word 0xe68008a0 ! 317: LDUWA_R lduwa [%r0, %r0] 0x45, %r19 | |
2417 | .word 0x9951c000 ! 318: RDPR_TL rdpr %tl, %r12 | |
2418 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_118)) -> intp(0,0,9) | |
2419 | intvec_0_118: | |
2420 | .word 0x39400001 ! 319: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2421 | .word 0x8b508000 ! 320: RDPR_TSTATE rdpr %tstate, %r5 | |
2422 | .word 0xca9fe001 ! 321: LDDA_I ldda [%r31, + 0x0001] %asi, %r5 | |
2423 | mondo_0_119: | |
2424 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2425 | ||
2426 | stxa %r20, [%r0+0x3d0] %asi | |
2427 | .word 0x9d928010 ! 322: WRPR_WSTATE_R wrpr %r10, %r16, %wstate | |
2428 | .word 0x81982987 ! 323: WRHPR_HPSTATE_I wrhpr %r0, 0x0987, %hpstate | |
2429 | .word 0xca8008a0 ! 324: LDUWA_R lduwa [%r0, %r0] 0x45, %r5 | |
2430 | mondo_0_120: | |
2431 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2432 | ||
2433 | stxa %r17, [%r0+0x3c0] %asi | |
2434 | .word 0x9d944012 ! 325: WRPR_WSTATE_R wrpr %r17, %r18, %wstate | |
2435 | tagged_0_121: | |
2436 | taddcctv %r22, 0x1a89, %r4 | |
2437 | .word 0xca07e001 ! 326: LDUW_I lduw [%r31 + 0x0001], %r5 | |
2438 | splash_tba_0_122: | |
2439 | set 0x120000, %r2 | |
2440 | st %r1, [%r2+%r0] | |
2441 | ta T_CHANGE_PRIV | |
2442 | set 0x120000, %r2 | |
2443 | .word 0x8b900002 ! 327: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2444 | intveclr_0_123: | |
2445 | set 0x54dc4f90, %r28 | |
2446 | stxa %r28, [%g0] 0x72 | |
2447 | .word 0x25400001 ! 328: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2448 | nop | |
2449 | mov 0x80, %g3 | |
2450 | stxa %g3, [%g3] 0x57 | |
2451 | .word 0xca5fc000 ! 329: LDX_R ldx [%r31 + %r0], %r5 | |
2452 | .word 0xa190200b ! 330: WRPR_GL_I wrpr %r0, 0x000b, %- | |
2453 | nop | |
2454 | mov 0x80, %g3 | |
2455 | stxa %g3, [%g3] 0x57 | |
2456 | .word 0xca5fc000 ! 331: LDX_R ldx [%r31 + %r0], %r5 | |
2457 | .word 0x87802089 ! 332: WRASI_I wr %r0, 0x0089, %asi | |
2458 | .word 0x87802014 ! 333: WRASI_I wr %r0, 0x0014, %asi | |
2459 | .word 0xa3520000 ! 334: RDPR_PIL rdpr %pil, %r17 | |
2460 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_124)) -> intp(0,0,6) | |
2461 | intvec_0_124: | |
2462 | .word 0x39400001 ! 335: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2463 | intveclr_0_125: | |
2464 | set 0x81ee1667, %r28 | |
2465 | stxa %r28, [%g0] 0x72 | |
2466 | .word 0x25400001 ! 336: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2467 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_126)) -> intp(0,1,3) | |
2468 | xir_0_126: | |
2469 | .word 0xa984a001 ! 337: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
2470 | .word 0x91d020b5 ! 338: Tcc_I ta icc_or_xcc, %r0 + 181 | |
2471 | set 0x6a589aff, %r28 | |
2472 | stxa %r28, [%g0] 0x73 | |
2473 | intvec_0_127: | |
2474 | .word 0x39400001 ! 339: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2475 | invalw | |
2476 | mov 0x32, %r30 | |
2477 | .word 0x91d0001e ! 340: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2478 | .word 0xa1a18d27 ! 341: FsMULd fsmuld %f6, %f38, %f16 | |
2479 | .word 0xe08fe030 ! 342: LDUBA_I lduba [%r31, + 0x0030] %asi, %r16 | |
2480 | invalw | |
2481 | mov 0xb3, %r30 | |
2482 | .word 0x91d0001e ! 343: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2483 | .word 0xe0bfc027 ! 344: STDA_R stda %r16, [%r31 + %r7] 0x01 | |
2484 | splash_htba_0_128: | |
2485 | set 0x80000, %r2 | |
2486 | st %r1, [%r2+%r0] | |
2487 | ta T_CHANGE_HPRIV | |
2488 | set 0x80000, %r2 | |
2489 | .word 0x8b980002 ! 345: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2490 | .word 0x8790206e ! 346: WRPR_TT_I wrpr %r0, 0x006e, %tt | |
2491 | intveclr_0_129: | |
2492 | set 0xa97bd87b, %r28 | |
2493 | stxa %r28, [%g0] 0x72 | |
2494 | .word 0x25400001 ! 347: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2495 | .word 0xe0dfe000 ! 348: LDXA_I ldxa [%r31, + 0x0000] %asi, %r16 | |
2496 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_130)) -> intp(0,0,10) | |
2497 | intvec_0_130: | |
2498 | .word 0x39400001 ! 349: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2499 | .word 0x93d020b4 ! 350: Tcc_I tne icc_or_xcc, %r0 + 180 | |
2500 | .word 0x926c6001 ! 351: UDIVX_I udivx %r17, 0x0001, %r9 | |
2501 | .word 0x2a800001 ! 352: BCS bcs,a <label_0x1> | |
2502 | .word 0xd31fe001 ! 353: LDDF_I ldd [%r31, 0x0001], %f9 | |
2503 | .word 0x91d02033 ! 354: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2504 | .word 0x87802055 ! 355: WRASI_I wr %r0, 0x0055, %asi | |
2505 | .word 0x87802014 ! 356: WRASI_I wr %r0, 0x0014, %asi | |
2506 | splash_lsu_0_131: | |
2507 | setx 0xd2896c8d7a983c7d, %r1, %r2 | |
2508 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2509 | .word 0x3d400001 ! 357: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2510 | mondo_0_132: | |
2511 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2512 | ||
2513 | stxa %r0, [%r0+0x3d0] %asi | |
2514 | .word 0x9d920011 ! 358: WRPR_WSTATE_R wrpr %r8, %r17, %wstate | |
2515 | .word 0x87902123 ! 359: WRPR_TT_I wrpr %r0, 0x0123, %tt | |
2516 | DS_0_133: | |
2517 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2518 | .word 0xdb302001 ! 1: STQF_I - %f13, [0x0001, %r0] | |
2519 | normalw | |
2520 | .word 0x87458000 ! 360: RD_SOFTINT_REG rd %softint, %r3 | |
2521 | splash_lsu_0_134: | |
2522 | setx 0xa701ccf06fd9119f, %r1, %r2 | |
2523 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2524 | .word 0x3d400001 ! 361: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2525 | .word 0xa1500000 ! 362: RDPR_TPC rdpr %tpc, %r16 | |
2526 | .word 0xe057e001 ! 363: LDSH_I ldsh [%r31 + 0x0001], %r16 | |
2527 | debug_0_135: | |
2528 | mov 0x38, %r18 | |
2529 | .word 0xfef00b12 ! 364: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2530 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_136)) -> intp(0,0,8) | |
2531 | intvec_0_136: | |
2532 | .word 0x39400001 ! 365: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2533 | .word 0x2c800001 ! 366: BNEG bneg,a <label_0x1> | |
2534 | .word 0x93902006 ! 367: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
2535 | tagged_0_137: | |
2536 | taddcctv %r16, 0x1e9b, %r1 | |
2537 | .word 0xe007e001 ! 368: LDUW_I lduw [%r31 + 0x0001], %r16 | |
2538 | ta T_CHANGE_HPRIV ! macro | |
2539 | intveclr_0_138: | |
2540 | set 0x832e6bcd, %r28 | |
2541 | stxa %r28, [%g0] 0x72 | |
2542 | .word 0x25400001 ! 370: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2543 | .word 0xe0d804a0 ! 371: LDXA_R ldxa [%r0, %r0] 0x25, %r16 | |
2544 | set 0x154ce6fd, %r28 | |
2545 | stxa %r28, [%g0] 0x73 | |
2546 | intvec_0_139: | |
2547 | .word 0x39400001 ! 372: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2548 | .word 0xe08008a0 ! 373: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
2549 | .word 0xe047c000 ! 374: LDSW_R ldsw [%r31 + %r0], %r16 | |
2550 | .word 0xa1902000 ! 375: WRPR_GL_I wrpr %r0, 0x0000, %- | |
2551 | .word 0xe09fc020 ! 376: LDDA_R ldda [%r31, %r0] 0x01, %r16 | |
2552 | .word 0xa1902000 ! 377: WRPR_GL_I wrpr %r0, 0x0000, %- | |
2553 | .word 0x8ad4a001 ! 378: UMULcc_I umulcc %r18, 0x0001, %r5 | |
2554 | .word 0xca4fc000 ! 379: LDSB_R ldsb [%r31 + %r0], %r5 | |
2555 | .word 0xcb97e001 ! 380: LDQFA_I - [%r31, 0x0001], %f5 | |
2556 | .word 0xcb3fc011 ! 381: STDF_R std %f5, [%r17, %r31] | |
2557 | .word 0xa3508000 ! 382: RDPR_TSTATE rdpr %tstate, %r17 | |
2558 | .word 0xe28008a0 ! 383: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
2559 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_140)) -> intp(0,0,31) | |
2560 | intvec_0_140: | |
2561 | .word 0x39400001 ! 384: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2562 | .word 0x879023b5 ! 385: WRPR_TT_I wrpr %r0, 0x03b5, %tt | |
2563 | .word 0xe21fc000 ! 386: LDD_R ldd [%r31 + %r0], %r17 | |
2564 | set 0x362407fb, %r28 | |
2565 | stxa %r28, [%g0] 0x73 | |
2566 | intvec_0_141: | |
2567 | .word 0x39400001 ! 387: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2568 | debug_0_142: | |
2569 | setx debug_0_142 + 64, %r11, %r19 | |
2570 | mov 0x38, %r18 | |
2571 | .word 0xe6f00b12 ! 388: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2572 | tagged_0_143: | |
2573 | taddcctv %r14, 0x1e87, %r26 | |
2574 | .word 0xe207e001 ! 389: LDUW_I lduw [%r31 + 0x0001], %r17 | |
2575 | debug_0_144: | |
2576 | mov 0x38, %r18 | |
2577 | .word 0xfef00b12 ! 390: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2578 | .word 0xe397e001 ! 391: LDQFA_I - [%r31, 0x0001], %f17 | |
2579 | .word 0x93d020b3 ! 392: Tcc_I tne icc_or_xcc, %r0 + 179 | |
2580 | .word 0x8282e001 ! 393: ADDcc_I addcc %r11, 0x0001, %r1 | |
2581 | .word 0xc33fc011 ! 394: STDF_R std %f1, [%r17, %r31] | |
2582 | .word 0x879023cb ! 395: WRPR_TT_I wrpr %r0, 0x03cb, %tt | |
2583 | debug_0_145: | |
2584 | setx debug_0_145 + 64, %r11, %r19 | |
2585 | mov 0x38, %r18 | |
2586 | .word 0xe6f00b12 ! 396: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2587 | .word 0x819826dd ! 397: WRHPR_HPSTATE_I wrhpr %r0, 0x06dd, %hpstate | |
2588 | .word 0xc21fe001 ! 398: LDD_I ldd [%r31 + 0x0001], %r1 | |
2589 | splash_cmpr_0_146: | |
2590 | nop | |
2591 | mov 1, %g2 | |
2592 | sllx %g2, 63, %g2 | |
2593 | or %g1, %g2, %g1 | |
2594 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2595 | .word 0xb180e001 ! 399: WR_STICK_REG_I wr %r3, 0x0001, %- | |
2596 | .word 0x93902003 ! 400: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2597 | nop | |
2598 | mov 0x80, %g3 | |
2599 | stxa %g3, [%g3] 0x57 | |
2600 | .word 0xc25fc000 ! 401: LDX_R ldx [%r31 + %r0], %r1 | |
2601 | .word 0x8d50c000 ! 402: RDPR_TT rdpr %tt, %r6 | |
2602 | set 0xb0758078, %r28 | |
2603 | stxa %r28, [%g0] 0x73 | |
2604 | intvec_0_147: | |
2605 | .word 0x39400001 ! 403: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2606 | .word 0xcc800c60 ! 404: LDUWA_R lduwa [%r0, %r0] 0x63, %r6 | |
2607 | .word 0xa1a2c9f1 ! 405: FDIVq dis not found | |
2608 | ||
2609 | .word 0xe08804a0 ! 406: LDUBA_R lduba [%r0, %r0] 0x25, %r16 | |
2610 | DS_0_148: | |
2611 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2612 | .xword 0xd95cdd2b ! Random illegal ? | |
2613 | .word 0xcd14c000 ! 1: LDQF_R - [%r19, %r0], %f6 | |
2614 | .word 0x97a14828 ! 407: FADDs fadds %f5, %f8, %f11 | |
2615 | .word 0xd68008a0 ! 408: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
2616 | .word 0xd727c008 ! 409: STF_R st %f11, [%r8, %r31] | |
2617 | .word 0x8d903821 ! 410: WRPR_PSTATE_I wrpr %r0, 0x1821, %pstate | |
2618 | intveclr_0_149: | |
2619 | set 0xdf037d0e, %r28 | |
2620 | stxa %r28, [%g0] 0x72 | |
2621 | .word 0x25400001 ! 411: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2622 | splash_tba_0_150: | |
2623 | set 0x003d0000, %r2 | |
2624 | st %r1, [%r2+%r0] | |
2625 | ta T_CHANGE_PRIV | |
2626 | set 0x003e0000, %r2 | |
2627 | .word 0x8b900002 ! 412: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2628 | nop | |
2629 | mov 0x80, %g3 | |
2630 | stxa %g3, [%g3] 0x5f | |
2631 | .word 0xd65fc000 ! 413: LDX_R ldx [%r31 + %r0], %r11 | |
2632 | .word 0x95508000 ! 414: RDPR_TSTATE rdpr %tstate, %r10 | |
2633 | .word 0x99a00547 ! 415: FSQRTd fsqrt | |
2634 | .word 0x87902139 ! 416: WRPR_TT_I wrpr %r0, 0x0139, %tt | |
2635 | .word 0x91d02034 ! 417: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2636 | .word 0xa1902000 ! 418: WRPR_GL_I wrpr %r0, 0x0000, %- | |
2637 | .word 0x879020ad ! 419: WRPR_TT_I wrpr %r0, 0x00ad, %tt | |
2638 | .word 0xa780a001 ! 420: WR_GRAPHICS_STATUS_REG_I wr %r2, 0x0001, %- | |
2639 | splash_lsu_0_151: | |
2640 | setx 0x7f6a119cf695b8a5, %r1, %r2 | |
2641 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2642 | .word 0x3d400001 ! 421: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2643 | splash_cmpr_0_152: | |
2644 | nop | |
2645 | mov 1, %g2 | |
2646 | sllx %g2, 63, %g2 | |
2647 | or %g1, %g2, %g1 | |
2648 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2649 | .word 0xb1802001 ! 422: WR_STICK_REG_I wr %r0, 0x0001, %- | |
2650 | .word 0xd81fe001 ! 423: LDD_I ldd [%r31 + 0x0001], %r12 | |
2651 | nop | |
2652 | mov 0x80, %g3 | |
2653 | stxa %g3, [%g3] 0x57 | |
2654 | .word 0xd85fc000 ! 424: LDX_R ldx [%r31 + %r0], %r12 | |
2655 | tagged_0_153: | |
2656 | taddcctv %r16, 0x13d3, %r20 | |
2657 | .word 0xd807e001 ! 425: LDUW_I lduw [%r31 + 0x0001], %r12 | |
2658 | .word 0xd8d804a0 ! 426: LDXA_R ldxa [%r0, %r0] 0x25, %r12 | |
2659 | .word 0xd8800b00 ! 427: LDUWA_R lduwa [%r0, %r0] 0x58, %r12 | |
2660 | .word 0xd88fe000 ! 428: LDUBA_I lduba [%r31, + 0x0000] %asi, %r12 | |
2661 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_154)) -> intp(0,0,14) | |
2662 | intvec_0_154: | |
2663 | .word 0x39400001 ! 429: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2664 | .word 0x93d02035 ! 430: Tcc_I tne icc_or_xcc, %r0 + 53 | |
2665 | .word 0x38800001 ! 431: BGU bgu,a <label_0x1> | |
2666 | tagged_0_155: | |
2667 | taddcctv %r11, 0x1b75, %r24 | |
2668 | .word 0xd807e001 ! 432: LDUW_I lduw [%r31 + 0x0001], %r12 | |
2669 | .word 0xd88fe020 ! 433: LDUBA_I lduba [%r31, + 0x0020] %asi, %r12 | |
2670 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_156)) -> intp(0,0,23) | |
2671 | intvec_0_156: | |
2672 | .word 0x39400001 ! 434: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2673 | .word 0x9ba01a6a ! 435: FqTOi fqtoi | |
2674 | .word 0xa7508000 ! 436: RDPR_TSTATE rdpr %tstate, %r19 | |
2675 | nop | |
2676 | mov 0x80, %g3 | |
2677 | stxa %g3, [%g3] 0x57 | |
2678 | .word 0xe65fc000 ! 437: LDX_R ldx [%r31 + %r0], %r19 | |
2679 | set 0xbe246e25, %r28 | |
2680 | stxa %r28, [%g0] 0x73 | |
2681 | intvec_0_157: | |
2682 | .word 0x39400001 ! 438: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2683 | debug_0_158: | |
2684 | mov 0x38, %r18 | |
2685 | .word 0xfef00b12 ! 439: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2686 | intveclr_0_159: | |
2687 | set 0xe8bd4070, %r28 | |
2688 | stxa %r28, [%g0] 0x72 | |
2689 | .word 0x25400001 ! 440: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2690 | .word 0x93902003 ! 441: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2691 | .word 0xe68008a0 ! 442: LDUWA_R lduwa [%r0, %r0] 0x45, %r19 | |
2692 | .word 0x87802080 ! 443: WRASI_I wr %r0, 0x0080, %asi | |
2693 | invalw | |
2694 | mov 0x33, %r30 | |
2695 | .word 0x93d0001e ! 444: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2696 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_160)) -> intp(0,0,19) | |
2697 | intvec_0_160: | |
2698 | .word 0x39400001 ! 445: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2699 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_161)) -> intp(0,1,3) | |
2700 | xir_0_161: | |
2701 | .word 0xa981e001 ! 446: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
2702 | ta T_CHANGE_PRIV ! macro | |
2703 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_162)) -> intp(0,0,9) | |
2704 | intvec_0_162: | |
2705 | .word 0x39400001 ! 448: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2706 | .word 0xe607c000 ! 449: LDUW_R lduw [%r31 + %r0], %r19 | |
2707 | .word 0xe71fc000 ! 450: LDDF_R ldd [%r31, %r0], %f19 | |
2708 | .word 0x83504000 ! 451: RDPR_TNPC rdpr %tnpc, %r1 | |
2709 | set 0x4e649e2, %r28 | |
2710 | stxa %r28, [%g0] 0x73 | |
2711 | intvec_0_163: | |
2712 | .word 0x39400001 ! 452: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2713 | .word 0xc2c004a0 ! 453: LDSWA_R ldswa [%r0, %r0] 0x25, %r1 | |
2714 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_164)) -> intp(0,1,3) | |
2715 | xir_0_164: | |
2716 | .word 0xa9832001 ! 454: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
2717 | mondo_0_165: | |
2718 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2719 | ||
2720 | stxa %r17, [%r0+0x3d0] %asi | |
2721 | .word 0x9d900013 ! 455: WRPR_WSTATE_R wrpr %r0, %r19, %wstate | |
2722 | .word 0xa4fb2001 ! 456: SDIVcc_I sdivcc %r12, 0x0001, %r18 | |
2723 | .word 0xe44fe001 ! 457: LDSB_I ldsb [%r31 + 0x0001], %r18 | |
2724 | .word 0xe457e001 ! 458: LDSH_I ldsh [%r31 + 0x0001], %r18 | |
2725 | debug_0_166: | |
2726 | setx debug_0_166 + 64, %r11, %r19 | |
2727 | mov 0x38, %r18 | |
2728 | .word 0xe6f00b12 ! 459: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2729 | .word 0xa1902008 ! 460: WRPR_GL_I wrpr %r0, 0x0008, %- | |
2730 | .word 0xa7832001 ! 461: WR_GRAPHICS_STATUS_REG_I wr %r12, 0x0001, %- | |
2731 | .word 0xa1504000 ! 462: RDPR_TNPC <illegal instruction> | |
2732 | .word 0xa1902004 ! 463: WRPR_GL_I wrpr %r0, 0x0004, %- | |
2733 | .word 0x8d90348a ! 464: WRPR_PSTATE_I wrpr %r0, 0x148a, %pstate | |
2734 | .word 0xe08008a0 ! 465: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
2735 | DS_0_167: | |
2736 | nop | |
2737 | not %g0, %g2 | |
2738 | jmp %g2 | |
2739 | .word 0x9d902004 ! 466: WRPR_WSTATE_I wrpr %r0, 0x0004, %wstate | |
2740 | DS_0_168: | |
2741 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2742 | .xword 0xd37716f5 ! Random illegal ? | |
2743 | .word 0xe711800d ! 1: LDQF_R - [%r6, %r13], %f19 | |
2744 | .word 0x97a4c825 ! 467: FADDs fadds %f19, %f5, %f11 | |
2745 | .word 0xa190200e ! 468: WRPR_GL_I wrpr %r0, 0x000e, %- | |
2746 | .word 0xd73fc005 ! 469: STDF_R std %f11, [%r5, %r31] | |
2747 | nop | |
2748 | mov 0x80, %g3 | |
2749 | stxa %g3, [%g3] 0x57 | |
2750 | .word 0xd65fc000 ! 470: LDX_R ldx [%r31 + %r0], %r11 | |
2751 | .word 0xd6d7e000 ! 471: LDSHA_I ldsha [%r31, + 0x0000] %asi, %r11 | |
2752 | splash_lsu_0_169: | |
2753 | setx 0x0a3bce22cf127837, %r1, %r2 | |
2754 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2755 | .word 0x3d400001 ! 472: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2756 | .word 0xd65fe001 ! 473: LDX_I ldx [%r31 + 0x0001], %r11 | |
2757 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_170)) -> intp(0,1,3) | |
2758 | xir_0_170: | |
2759 | .word 0xa9846001 ! 474: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
2760 | .word 0x93500000 ! 475: RDPR_TPC <illegal instruction> | |
2761 | ta T_CHANGE_PRIV ! macro | |
2762 | .word 0xa345c000 ! 477: RD_TICK_CMPR_REG rd %-, %r17 | |
2763 | .word 0x99902005 ! 478: WRPR_CLEANWIN_I wrpr %r0, 0x0005, %cleanwin | |
2764 | .word 0x8f500000 ! 479: RDPR_TPC rdpr %tpc, %r7 | |
2765 | DS_0_171: | |
2766 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2767 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2768 | .word 0x9ba00546 ! 1: FSQRTd fsqrt | |
2769 | .word 0x95a1082a ! 480: FADDs fadds %f4, %f10, %f10 | |
2770 | .word 0x9f802001 ! 481: SIR sir 0x0001 | |
2771 | tagged_0_172: | |
2772 | tsubcctv %r13, 0x1412, %r23 | |
2773 | .word 0xd407e001 ! 482: LDUW_I lduw [%r31 + 0x0001], %r10 | |
2774 | intveclr_0_173: | |
2775 | set 0xf422e147, %r28 | |
2776 | stxa %r28, [%g0] 0x72 | |
2777 | .word 0x25400001 ! 483: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2778 | .word 0x97520000 ! 484: RDPR_PIL rdpr %pil, %r11 | |
2779 | invalw | |
2780 | mov 0x31, %r30 | |
2781 | .word 0x93d0001e ! 485: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2782 | .word 0xa1902000 ! 486: WRPR_GL_I wrpr %r0, 0x0000, %- | |
2783 | .word 0xd73fe001 ! 487: STDF_I std %f11, [0x0001, %r31] | |
2784 | DS_0_174: | |
2785 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2786 | .word 0xbfe7c000 ! 488: SAVE_R save %r31, %r0, %r31 | |
2787 | nop | |
2788 | mov 0x80, %g3 | |
2789 | stxa %g3, [%g3] 0x57 | |
2790 | .word 0xd65fc000 ! 489: LDX_R ldx [%r31 + %r0], %r11 | |
2791 | .word 0x8d802000 ! 490: WRFPRS_I wr %r0, 0x0000, %fprs | |
2792 | .word 0xd717c000 ! 491: LDQF_R - [%r31, %r0], %f11 | |
2793 | set 0x9d06052a, %r28 | |
2794 | stxa %r28, [%g0] 0x73 | |
2795 | intvec_0_175: | |
2796 | .word 0x39400001 ! 492: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2797 | .word 0x8551c000 ! 493: RDPR_TL rdpr %tl, %r2 | |
2798 | debug_0_176: | |
2799 | mov 0x38, %r18 | |
2800 | .word 0xfef00b12 ! 494: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2801 | .word 0x8d9024d5 ! 495: WRPR_PSTATE_I wrpr %r0, 0x04d5, %pstate | |
2802 | .word 0x91d02032 ! 496: Tcc_I ta icc_or_xcc, %r0 + 50 | |
2803 | set 0x1aeb0588, %r28 | |
2804 | stxa %r28, [%g0] 0x73 | |
2805 | intvec_0_177: | |
2806 | .word 0x39400001 ! 497: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2807 | .word 0x91922001 ! 498: WRPR_PIL_I wrpr %r8, 0x0001, %pil | |
2808 | .word 0xc4cfe030 ! 499: LDSBA_I ldsba [%r31, + 0x0030] %asi, %r2 | |
2809 | splash_lsu_0_178: | |
2810 | setx 0x962d15266457abbd, %r1, %r2 | |
2811 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2812 | .word 0x3d400001 ! 500: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2813 | mondo_0_179: | |
2814 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2815 | ||
2816 | stxa %r19, [%r0+0x3d0] %asi | |
2817 | .word 0x9d940001 ! 501: WRPR_WSTATE_R wrpr %r16, %r1, %wstate | |
2818 | .word 0xc44fc000 ! 502: LDSB_R ldsb [%r31 + %r0], %r2 | |
2819 | splash_lsu_0_180: | |
2820 | setx 0x91526e703dd529f1, %r1, %r2 | |
2821 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2822 | .word 0x3d400001 ! 503: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2823 | .word 0xc49fc020 ! 504: LDDA_R ldda [%r31, %r0] 0x01, %r2 | |
2824 | .word 0x8d480000 ! 505: RDHPR_HPSTATE rdhpr %hpstate, %r6 | |
2825 | nop | |
2826 | mov 0x80, %g3 | |
2827 | stxa %g3, [%g3] 0x5f | |
2828 | .word 0xcc5fc000 ! 506: LDX_R ldx [%r31 + %r0], %r6 | |
2829 | otherw | |
2830 | mov 0x30, %r30 | |
2831 | .word 0x83d0001e ! 507: Tcc_R te icc_or_xcc, %r0 + %r30 | |
2832 | nop | |
2833 | mov 0x80, %g3 | |
2834 | stxa %g3, [%g3] 0x57 | |
2835 | .word 0xcc5fc000 ! 508: LDX_R ldx [%r31 + %r0], %r6 | |
2836 | .word 0xa3464000 ! 509: RD_STICK_CMPR_REG rd %-, %r17 | |
2837 | set 0x8061fe83, %r28 | |
2838 | stxa %r28, [%g0] 0x73 | |
2839 | intvec_0_181: | |
2840 | .word 0x39400001 ! 510: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2841 | DS_0_182: | |
2842 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2843 | .word 0xc5330001 ! 1: STQF_R - %f2, [%r1, %r12] | |
2844 | normalw | |
2845 | .word 0x91458000 ! 511: RD_SOFTINT_REG rd %softint, %r8 | |
2846 | .word 0xd0800c80 ! 512: LDUWA_R lduwa [%r0, %r0] 0x64, %r8 | |
2847 | .word 0xa1902005 ! 513: WRPR_GL_I wrpr %r0, 0x0005, %- | |
2848 | ta T_CHANGE_HPRIV ! macro | |
2849 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_183)) -> intp(0,1,3) | |
2850 | xir_0_183: | |
2851 | .word 0xa9836001 ! 515: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
2852 | .word 0xa190200a ! 516: WRPR_GL_I wrpr %r0, 0x000a, %- | |
2853 | .word 0x8d9033f0 ! 517: WRPR_PSTATE_I wrpr %r0, 0x13f0, %pstate | |
2854 | .word 0xd08008a0 ! 518: LDUWA_R lduwa [%r0, %r0] 0x45, %r8 | |
2855 | splash_lsu_0_184: | |
2856 | setx 0xfd5140b857f71fb3, %r1, %r2 | |
2857 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2858 | .word 0x3d400001 ! 519: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2859 | .word 0x879022b7 ! 520: WRPR_TT_I wrpr %r0, 0x02b7, %tt | |
2860 | .word 0x879023ee ! 521: WRPR_TT_I wrpr %r0, 0x03ee, %tt | |
2861 | mondo_0_185: | |
2862 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2863 | ||
2864 | stxa %r20, [%r0+0x3e8] %asi | |
2865 | .word 0x9d944010 ! 522: WRPR_WSTATE_R wrpr %r17, %r16, %wstate | |
2866 | .word 0xd127e001 ! 523: STF_I st %f8, [0x0001, %r31] | |
2867 | .word 0xd117c000 ! 524: LDQF_R - [%r31, %r0], %f8 | |
2868 | tagged_0_186: | |
2869 | tsubcctv %r2, 0x1aae, %r10 | |
2870 | .word 0xd007e001 ! 525: LDUW_I lduw [%r31 + 0x0001], %r8 | |
2871 | .word 0x8790226e ! 526: WRPR_TT_I wrpr %r0, 0x026e, %tt | |
2872 | otherw | |
2873 | mov 0x35, %r30 | |
2874 | .word 0x91d0001e ! 527: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2875 | splash_lsu_0_187: | |
2876 | setx 0xdf2c18b2a5ea11d1, %r1, %r2 | |
2877 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2878 | .word 0x3d400001 ! 528: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2879 | .word 0x99902005 ! 529: WRPR_CLEANWIN_I wrpr %r0, 0x0005, %cleanwin | |
2880 | .word 0xd13fe001 ! 530: STDF_I std %f8, [0x0001, %r31] | |
2881 | .word 0xd11fc000 ! 531: LDDF_R ldd [%r31, %r0], %f8 | |
2882 | .word 0xd007c000 ! 532: LDUW_R lduw [%r31 + %r0], %r8 | |
2883 | .word 0xd0c004a0 ! 533: LDSWA_R ldswa [%r0, %r0] 0x25, %r8 | |
2884 | .word 0x87902324 ! 534: WRPR_TT_I wrpr %r0, 0x0324, %tt | |
2885 | .word 0x93a000d0 ! 535: FNEGd fnegd %f16, %f40 | |
2886 | .word 0x36800001 ! 536: BGE bge,a <label_0x1> | |
2887 | .word 0xd2bfe001 ! 537: STDA_I stda %r9, [%r31 + 0x0001] %asi | |
2888 | .word 0xd327e001 ! 538: STF_I st %f9, [0x0001, %r31] | |
2889 | .word 0x8d802000 ! 539: WRFPRS_I wr %r0, 0x0000, %fprs | |
2890 | tagged_0_188: | |
2891 | tsubcctv %r24, 0x1b18, %r25 | |
2892 | .word 0xd207e001 ! 540: LDUW_I lduw [%r31 + 0x0001], %r9 | |
2893 | DS_0_189: | |
2894 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2895 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2896 | .word 0x99a00550 ! 1: FSQRTd fsqrt | |
2897 | .word 0xa3a44828 ! 541: FADDs fadds %f17, %f8, %f17 | |
2898 | splash_lsu_0_190: | |
2899 | setx 0x5040a031b0ce3b6b, %r1, %r2 | |
2900 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2901 | .word 0x3d400001 ! 542: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2902 | set 0x3f23125b, %r28 | |
2903 | stxa %r28, [%g0] 0x73 | |
2904 | intvec_0_191: | |
2905 | .word 0x39400001 ! 543: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2906 | splash_lsu_0_192: | |
2907 | setx 0x8ccc1120b85135ad, %r1, %r2 | |
2908 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2909 | .word 0x3d400001 ! 544: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2910 | nop | |
2911 | mov 0x80, %g3 | |
2912 | stxa %g3, [%g3] 0x5f | |
2913 | .word 0xe25fc000 ! 545: LDX_R ldx [%r31 + %r0], %r17 | |
2914 | set 0xe410577f, %r28 | |
2915 | stxa %r28, [%g0] 0x73 | |
2916 | intvec_0_193: | |
2917 | .word 0x39400001 ! 546: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2918 | .word 0xe2d804a0 ! 547: LDXA_R ldxa [%r0, %r0] 0x25, %r17 | |
2919 | .word 0xe21fc000 ! 548: LDD_R ldd [%r31 + %r0], %r17 | |
2920 | .word 0x83464000 ! 549: RD_STICK_CMPR_REG rd %-, %r1 | |
2921 | .word 0xa1902006 ! 550: WRPR_GL_I wrpr %r0, 0x0006, %- | |
2922 | .word 0x83d020b3 ! 551: Tcc_I te icc_or_xcc, %r0 + 179 | |
2923 | splash_lsu_0_194: | |
2924 | setx 0xf0a9e531f2a5e6db, %r1, %r2 | |
2925 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2926 | .word 0x3d400001 ! 552: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2927 | .word 0x93902000 ! 553: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2928 | .word 0x8f500000 ! 554: RDPR_TPC rdpr %tpc, %r7 | |
2929 | tagged_0_195: | |
2930 | taddcctv %r17, 0x1cfe, %r17 | |
2931 | .word 0xce07e001 ! 555: LDUW_I lduw [%r31 + 0x0001], %r7 | |
2932 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2933 | ta T_CHANGE_NONPRIV ! macro | |
2934 | .word 0x9ba01974 ! 556: FqTOd dis not found | |
2935 | ||
2936 | .word 0x93902005 ! 557: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
2937 | .word 0xdacfe000 ! 558: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r13 | |
2938 | otherw | |
2939 | mov 0x31, %r30 | |
2940 | .word 0x91d0001e ! 559: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2941 | debug_0_197: | |
2942 | mov 0x38, %r18 | |
2943 | .word 0xfef00b12 ! 560: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2944 | .word 0x93902000 ! 561: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2945 | nop | |
2946 | mov 0x80, %g3 | |
2947 | stxa %g3, [%g3] 0x57 | |
2948 | .word 0xda5fc000 ! 562: LDX_R ldx [%r31 + %r0], %r13 | |
2949 | .word 0x93902001 ! 563: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
2950 | .word 0xdadfe010 ! 564: LDXA_I ldxa [%r31, + 0x0010] %asi, %r13 | |
2951 | .word 0x93902003 ! 565: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2952 | .word 0x8d902c97 ! 566: WRPR_PSTATE_I wrpr %r0, 0x0c97, %pstate | |
2953 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_198)) -> intp(0,0,13) | |
2954 | intvec_0_198: | |
2955 | .word 0x39400001 ! 567: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2956 | .word 0x93d020b5 ! 568: Tcc_I tne icc_or_xcc, %r0 + 181 | |
2957 | .word 0xdb27e001 ! 569: STF_I st %f13, [0x0001, %r31] | |
2958 | mondo_0_199: | |
2959 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2960 | ||
2961 | stxa %r1, [%r0+0x3e8] %asi | |
2962 | .word 0x9d950009 ! 570: WRPR_WSTATE_R wrpr %r20, %r9, %wstate | |
2963 | debug_0_200: | |
2964 | mov 0x38, %r18 | |
2965 | .word 0xfef00b12 ! 571: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2966 | nop | |
2967 | mov 0x80, %g3 | |
2968 | stxa %g3, [%g3] 0x5f | |
2969 | .word 0xda5fc000 ! 572: LDX_R ldx [%r31 + %r0], %r13 | |
2970 | .word 0xab850003 ! 573: WR_CLEAR_SOFTINT_R wr %r20, %r3, %clear_softint | |
2971 | nop | |
2972 | mov 0x80, %g3 | |
2973 | stxa %g3, [%g3] 0x57 | |
2974 | .word 0xda5fc000 ! 574: LDX_R ldx [%r31 + %r0], %r13 | |
2975 | set 0x4c77df97, %r28 | |
2976 | stxa %r28, [%g0] 0x73 | |
2977 | intvec_0_201: | |
2978 | .word 0x39400001 ! 575: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2979 | .word 0xdac004a0 ! 576: LDSWA_R ldswa [%r0, %r0] 0x25, %r13 | |
2980 | .word 0xdac00e60 ! 577: LDSWA_R ldswa [%r0, %r0] 0x73, %r13 | |
2981 | DS_0_202: | |
2982 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2983 | .xword 0xef57a819 ! Random illegal ? | |
2984 | .word 0xc5114003 ! 1: LDQF_R - [%r5, %r3], %f2 | |
2985 | .word 0x8da50834 ! 578: FADDs fadds %f20, %f20, %f6 | |
2986 | .word 0xcd1fc000 ! 579: LDDF_R ldd [%r31, %r0], %f6 | |
2987 | otherw | |
2988 | mov 0x32, %r30 | |
2989 | .word 0x91d0001e ! 580: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2990 | otherw | |
2991 | mov 0x33, %r30 | |
2992 | .word 0x91d0001e ! 581: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2993 | .word 0x93902007 ! 582: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
2994 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_203)) -> intp(0,1,3) | |
2995 | xir_0_203: | |
2996 | .word 0xa984a001 ! 583: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
2997 | .word 0x93902003 ! 584: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2998 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_204)) -> intp(0,1,3) | |
2999 | xir_0_204: | |
3000 | .word 0xa9852001 ! 585: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
3001 | .word 0x81460000 ! 586: RD_STICK_REG stbar | |
3002 | tagged_0_205: | |
3003 | taddcctv %r16, 0x1aa8, %r14 | |
3004 | .word 0xcc07e001 ! 587: LDUW_I lduw [%r31 + 0x0001], %r6 | |
3005 | invalw | |
3006 | mov 0x31, %r30 | |
3007 | .word 0x91d0001e ! 588: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3008 | .word 0x20800001 ! 589: BN bn,a <label_0x1> | |
3009 | .word 0x93902004 ! 590: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
3010 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_206)) -> intp(0,0,24) | |
3011 | intvec_0_206: | |
3012 | .word 0x39400001 ! 591: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3013 | DS_0_207: | |
3014 | nop | |
3015 | not %g0, %g2 | |
3016 | jmp %g2 | |
3017 | .word 0x9d902001 ! 592: WRPR_WSTATE_I wrpr %r0, 0x0001, %wstate | |
3018 | .word 0xcd17c000 ! 593: LDQF_R - [%r31, %r0], %f6 | |
3019 | mondo_0_208: | |
3020 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3021 | ||
3022 | stxa %r3, [%r0+0x3c0] %asi | |
3023 | .word 0x9d900012 ! 594: WRPR_WSTATE_R wrpr %r0, %r18, %wstate | |
3024 | intveclr_0_209: | |
3025 | set 0x3430526b, %r28 | |
3026 | stxa %r28, [%g0] 0x72 | |
3027 | .word 0x25400001 ! 595: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3028 | debug_0_210: | |
3029 | mov 0x38, %r18 | |
3030 | .word 0xfef00b12 ! 596: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3031 | .word 0xa1902003 ! 597: WRPR_GL_I wrpr %r0, 0x0003, %- | |
3032 | .word 0xa1902009 ! 598: WRPR_GL_I wrpr %r0, 0x0009, %- | |
3033 | .word 0xcc47c000 ! 599: LDSW_R ldsw [%r31 + %r0], %r6 | |
3034 | nop | |
3035 | mov 0x80, %g3 | |
3036 | stxa %g3, [%g3] 0x57 | |
3037 | .word 0xcc5fc000 ! 600: LDX_R ldx [%r31 + %r0], %r6 | |
3038 | intveclr_0_211: | |
3039 | set 0x91e5ad4b, %r28 | |
3040 | stxa %r28, [%g0] 0x72 | |
3041 | .word 0x25400001 ! 601: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3042 | intveclr_0_212: | |
3043 | set 0x39eb7e3b, %r28 | |
3044 | stxa %r28, [%g0] 0x72 | |
3045 | .word 0x25400001 ! 602: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3046 | .word 0x95702001 ! 603: POPC_I popc 0x0001, %r10 | |
3047 | debug_0_213: | |
3048 | mov 0x38, %r18 | |
3049 | .word 0xfef00b12 ! 604: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3050 | .word 0xd40fe001 ! 605: LDUB_I ldub [%r31 + 0x0001], %r10 | |
3051 | splash_lsu_0_214: | |
3052 | setx 0x2f52a0c6e4473fb5, %r1, %r2 | |
3053 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3054 | .word 0x3d400001 ! 606: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3055 | splash_lsu_0_215: | |
3056 | setx 0x52fe6a1d9cac5887, %r1, %r2 | |
3057 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3058 | .word 0x3d400001 ! 607: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3059 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_216)) -> intp(0,0,17) | |
3060 | intvec_0_216: | |
3061 | .word 0x39400001 ! 608: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3062 | .word 0xd4d804a0 ! 609: LDXA_R ldxa [%r0, %r0] 0x25, %r10 | |
3063 | splash_lsu_0_217: | |
3064 | setx 0x12f18323e908bf05, %r1, %r2 | |
3065 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3066 | .word 0x3d400001 ! 610: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3067 | .word 0xd4800b60 ! 611: LDUWA_R lduwa [%r0, %r0] 0x5b, %r10 | |
3068 | debug_0_218: | |
3069 | mov 0x38, %r18 | |
3070 | .word 0xfef00b12 ! 612: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3071 | splash_htba_0_219: | |
3072 | set 0x003b0000, %r2 | |
3073 | ld [%r2+%r0], %r1 | |
3074 | ta T_CHANGE_HPRIV | |
3075 | set 0x00380000, %r2 | |
3076 | .word 0x8b980002 ! 613: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3077 | DS_0_220: | |
3078 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3079 | pdist %f6, %f10, %f8 | |
3080 | .word 0xa5b44305 ! 614: ALIGNADDRESS alignaddr %r17, %r5, %r18 | |
3081 | .word 0x91d02035 ! 615: Tcc_I ta icc_or_xcc, %r0 + 53 | |
3082 | tagged_0_221: | |
3083 | taddcctv %r4, 0x1711, %r1 | |
3084 | .word 0xe407e001 ! 616: LDUW_I lduw [%r31 + 0x0001], %r18 | |
3085 | .word 0x8d903512 ! 617: WRPR_PSTATE_I wrpr %r0, 0x1512, %pstate | |
3086 | splash_lsu_0_222: | |
3087 | setx 0x31b57b620f1a7211, %r1, %r2 | |
3088 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3089 | .word 0x3d400001 ! 618: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3090 | .word 0xa5a01a62 ! 619: FqTOi fqtoi | |
3091 | .word 0xe4c804a0 ! 620: LDSBA_R ldsba [%r0, %r0] 0x25, %r18 | |
3092 | .word 0xa190200a ! 621: WRPR_GL_I wrpr %r0, 0x000a, %- | |
3093 | set 0x8760025c, %r28 | |
3094 | stxa %r28, [%g0] 0x73 | |
3095 | intvec_0_223: | |
3096 | .word 0x39400001 ! 622: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3097 | .word 0xa5a40dc2 ! 623: FdMULq fdmulq | |
3098 | .word 0xe4c804a0 ! 624: LDSBA_R ldsba [%r0, %r0] 0x25, %r18 | |
3099 | .word 0xe477c002 ! 625: STX_R stx %r18, [%r31 + %r2] | |
3100 | change_to_randtl_0_224: | |
3101 | ta T_CHANGE_PRIV ! macro | |
3102 | done_change_to_randtl_0_224: | |
3103 | .word 0x8f902002 ! 626: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3104 | set 0x1b610f66, %r28 | |
3105 | stxa %r28, [%g0] 0x73 | |
3106 | intvec_0_225: | |
3107 | .word 0x39400001 ! 627: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3108 | .word 0xe53fe001 ! 628: STDF_I std %f18, [0x0001, %r31] | |
3109 | splash_lsu_0_226: | |
3110 | setx 0xd067fdd6b404e329, %r1, %r2 | |
3111 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3112 | .word 0x3d400001 ! 629: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3113 | .word 0xe537e001 ! 630: STQF_I - %f18, [0x0001, %r31] | |
3114 | splash_htba_0_227: | |
3115 | set 0x80000, %r2 | |
3116 | ld [%r2+%r0], %r1 | |
3117 | ta T_CHANGE_HPRIV | |
3118 | set 0x80000, %r2 | |
3119 | .word 0x8b980002 ! 631: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3120 | .word 0x8d9024ec ! 632: WRPR_PSTATE_I wrpr %r0, 0x04ec, %pstate | |
3121 | splash_lsu_0_228: | |
3122 | setx 0x47f1aed1942ac753, %r1, %r2 | |
3123 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3124 | .word 0x3d400001 ! 633: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3125 | ta T_CHANGE_PRIV ! macro | |
3126 | otherw | |
3127 | mov 0xb0, %r30 | |
3128 | .word 0x91d0001e ! 635: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3129 | .word 0x80d1e001 ! 636: UMULcc_I umulcc %r7, 0x0001, %r0 | |
3130 | DS_0_229: | |
3131 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3132 | pdist %f2, %f8, %f0 | |
3133 | .word 0x95b2c30d ! 637: ALIGNADDRESS alignaddr %r11, %r13, %r10 | |
3134 | invalw | |
3135 | mov 0x33, %r30 | |
3136 | .word 0x91d0001e ! 638: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3137 | splash_lsu_0_230: | |
3138 | setx 0xfba4f355ed67282b, %r1, %r2 | |
3139 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3140 | .word 0x3d400001 ! 639: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3141 | .word 0xd48008a0 ! 640: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
3142 | splash_lsu_0_231: | |
3143 | setx 0xb01e7b6cf2014723, %r1, %r2 | |
3144 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3145 | .word 0x3d400001 ! 641: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3146 | splash_lsu_0_232: | |
3147 | setx 0x533585e4c41d4db3, %r1, %r2 | |
3148 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3149 | .word 0x3d400001 ! 642: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3150 | .word 0xd48008a0 ! 643: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
3151 | set 0xd4a852e8, %r28 | |
3152 | stxa %r28, [%g0] 0x73 | |
3153 | intvec_0_233: | |
3154 | .word 0x39400001 ! 644: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3155 | debug_0_234: | |
3156 | mov 0x38, %r18 | |
3157 | .word 0xfef00b12 ! 645: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3158 | .word 0x8790212c ! 646: WRPR_TT_I wrpr %r0, 0x012c, %tt | |
3159 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_235)) -> intp(0,1,3) | |
3160 | xir_0_235: | |
3161 | .word 0xa982e001 ! 647: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
3162 | .word 0xd48008a0 ! 648: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
3163 | .word 0xd49fe001 ! 649: LDDA_I ldda [%r31, + 0x0001] %asi, %r10 | |
3164 | nop | |
3165 | mov 0x80, %g3 | |
3166 | stxa %g3, [%g3] 0x5f | |
3167 | .word 0xd45fc000 ! 650: LDX_R ldx [%r31 + %r0], %r10 | |
3168 | .word 0x93902002 ! 651: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3169 | intveclr_0_236: | |
3170 | set 0xd4db493e, %r28 | |
3171 | stxa %r28, [%g0] 0x72 | |
3172 | .word 0x25400001 ! 652: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3173 | otherw | |
3174 | mov 0x33, %r30 | |
3175 | .word 0x91d0001e ! 653: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3176 | .word 0x83d020b3 ! 654: Tcc_I te icc_or_xcc, %r0 + 179 | |
3177 | .word 0xd44fe001 ! 655: LDSB_I ldsb [%r31 + 0x0001], %r10 | |
3178 | .word 0xa3480000 ! 656: RDHPR_HPSTATE rdhpr %hpstate, %r17 | |
3179 | otherw | |
3180 | mov 0xb0, %r30 | |
3181 | .word 0x91d0001e ! 657: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3182 | .word 0x8d902b09 ! 658: WRPR_PSTATE_I wrpr %r0, 0x0b09, %pstate | |
3183 | .word 0x9f802001 ! 659: SIR sir 0x0001 | |
3184 | .word 0x8d90388f ! 660: WRPR_PSTATE_I wrpr %r0, 0x188f, %pstate | |
3185 | nop | |
3186 | mov 0x80, %g3 | |
3187 | stxa %g3, [%g3] 0x5f | |
3188 | .word 0xe25fc000 ! 661: LDX_R ldx [%r31 + %r0], %r17 | |
3189 | .word 0xe31fe001 ! 662: LDDF_I ldd [%r31, 0x0001], %f17 | |
3190 | .word 0x9f802001 ! 663: SIR sir 0x0001 | |
3191 | tagged_0_237: | |
3192 | taddcctv %r21, 0x1785, %r5 | |
3193 | .word 0xe207e001 ! 664: LDUW_I lduw [%r31 + 0x0001], %r17 | |
3194 | .word 0x30800001 ! 665: BA ba,a <label_0x1> | |
3195 | .word 0x38800001 ! 666: BGU bgu,a <label_0x1> | |
3196 | .word 0x8d802004 ! 667: WRFPRS_I wr %r0, 0x0004, %fprs | |
3197 | .word 0x8d802000 ! 668: WRFPRS_I wr %r0, 0x0000, %fprs | |
3198 | nop | |
3199 | mov 0x80, %g3 | |
3200 | stxa %g3, [%g3] 0x57 | |
3201 | .word 0xe25fc000 ! 669: LDX_R ldx [%r31 + %r0], %r17 | |
3202 | .word 0xab80400b ! 670: WR_CLEAR_SOFTINT_R wr %r1, %r11, %clear_softint | |
3203 | .word 0x91d020b2 ! 671: Tcc_I ta icc_or_xcc, %r0 + 178 | |
3204 | .word 0xe28804a0 ! 672: LDUBA_R lduba [%r0, %r0] 0x25, %r17 | |
3205 | .word 0xe2cfe030 ! 673: LDSBA_I ldsba [%r31, + 0x0030] %asi, %r17 | |
3206 | .word 0x91d02035 ! 674: Tcc_I ta icc_or_xcc, %r0 + 53 | |
3207 | nop | |
3208 | mov 0x80, %g3 | |
3209 | stxa %g3, [%g3] 0x57 | |
3210 | .word 0xe25fc000 ! 675: LDX_R ldx [%r31 + %r0], %r17 | |
3211 | .word 0xe2dfe030 ! 676: LDXA_I ldxa [%r31, + 0x0030] %asi, %r17 | |
3212 | nop | |
3213 | mov 0x80, %g3 | |
3214 | stxa %g3, [%g3] 0x57 | |
3215 | .word 0xe25fc000 ! 677: LDX_R ldx [%r31 + %r0], %r17 | |
3216 | .word 0x8d903b72 ! 678: WRPR_PSTATE_I wrpr %r0, 0x1b72, %pstate | |
3217 | .word 0x879022dd ! 679: WRPR_TT_I wrpr %r0, 0x02dd, %tt | |
3218 | .word 0x8945c000 ! 680: RD_TICK_CMPR_REG rd %-, %r4 | |
3219 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_238)) -> intp(0,1,3) | |
3220 | xir_0_238: | |
3221 | .word 0xa9846001 ! 681: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
3222 | .word 0x93902007 ! 682: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
3223 | .word 0x87902072 ! 683: WRPR_TT_I wrpr %r0, 0x0072, %tt | |
3224 | debug_0_239: | |
3225 | mov 0x38, %r18 | |
3226 | .word 0xfef00b12 ! 684: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3227 | .word 0x91d02035 ! 685: Tcc_I ta icc_or_xcc, %r0 + 53 | |
3228 | debug_0_240: | |
3229 | mov 0x38, %r18 | |
3230 | .word 0xfef00b12 ! 686: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3231 | change_to_randtl_0_241: | |
3232 | ta T_CHANGE_HPRIV ! macro | |
3233 | done_change_to_randtl_0_241: | |
3234 | .word 0x8f902004 ! 687: WRPR_TL_I wrpr %r0, 0x0004, %tl | |
3235 | .word 0xa4ab4005 ! 688: ANDNcc_R andncc %r13, %r5, %r18 | |
3236 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3237 | ta T_CHANGE_NONPRIV ! macro | |
3238 | .word 0xb1840011 ! 689: WR_STICK_REG_R wr %r16, %r17, %- | |
3239 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_243)) -> intp(0,1,3) | |
3240 | xir_0_243: | |
3241 | .word 0xa9852001 ! 690: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
3242 | change_to_randtl_0_244: | |
3243 | ta T_CHANGE_PRIV ! macro | |
3244 | done_change_to_randtl_0_244: | |
3245 | .word 0x8f902000 ! 691: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3246 | .word 0xa2d32001 ! 692: UMULcc_I umulcc %r12, 0x0001, %r17 | |
3247 | .word 0xe2c7e000 ! 693: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r17 | |
3248 | .word 0xe207c000 ! 694: LDUW_R lduw [%r31 + %r0], %r17 | |
3249 | .word 0xe297e030 ! 695: LDUHA_I lduha [%r31, + 0x0030] %asi, %r17 | |
3250 | .word 0xe2cfe000 ! 696: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r17 | |
3251 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_245)) -> intp(0,1,3) | |
3252 | xir_0_245: | |
3253 | .word 0xa981a001 ! 697: WR_SET_SOFTINT_I wr %r6, 0x0001, %set_softint | |
3254 | DS_0_246: | |
3255 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3256 | allclean | |
3257 | .word 0x8db2c310 ! 698: ALIGNADDRESS alignaddr %r11, %r16, %r6 | |
3258 | .word 0x87802080 ! 699: WRASI_I wr %r0, 0x0080, %asi | |
3259 | nop | |
3260 | mov 0x80, %g3 | |
3261 | stxa %g3, [%g3] 0x57 | |
3262 | .word 0xcc5fc000 ! 700: LDX_R ldx [%r31 + %r0], %r6 | |
3263 | debug_0_247: | |
3264 | setx debug_0_247 + 64, %r11, %r19 | |
3265 | mov 0x38, %r18 | |
3266 | .word 0xe6f00b12 ! 701: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3267 | nop | |
3268 | mov 0x80, %g3 | |
3269 | stxa %g3, [%g3] 0x57 | |
3270 | .word 0xcc5fc000 ! 702: LDX_R ldx [%r31 + %r0], %r6 | |
3271 | .word 0x81510000 ! 703: RDPR_TICK rdpr %tick, %r0 | |
3272 | debug_0_248: | |
3273 | mov 0x38, %r18 | |
3274 | .word 0xfef00b12 ! 704: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3275 | DS_0_249: | |
3276 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3277 | .word 0xbfefc000 ! 705: RESTORE_R restore %r31, %r0, %r31 | |
3278 | .word 0x87520000 ! 706: RDPR_PIL rdpr %pil, %r3 | |
3279 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3280 | ta T_CHANGE_NONPRIV ! macro | |
3281 | .word 0xa9a01972 ! 707: FqTOd dis not found | |
3282 | ||
3283 | .word 0x8d9034cb ! 708: WRPR_PSTATE_I wrpr %r0, 0x14cb, %pstate | |
3284 | otherw | |
3285 | mov 0x32, %r30 | |
3286 | .word 0x91d0001e ! 709: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3287 | set 0x76bf7b4e, %r28 | |
3288 | stxa %r28, [%g0] 0x73 | |
3289 | intvec_0_251: | |
3290 | .word 0x39400001 ! 710: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3291 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_252)) -> intp(0,0,14) | |
3292 | intvec_0_252: | |
3293 | .word 0x39400001 ! 711: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3294 | .word 0x879022f3 ! 712: WRPR_TT_I wrpr %r0, 0x02f3, %tt | |
3295 | mondo_0_253: | |
3296 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3297 | ||
3298 | stxa %r2, [%r0+0x3c8] %asi | |
3299 | .word 0x9d944005 ! 713: WRPR_WSTATE_R wrpr %r17, %r5, %wstate | |
3300 | .word 0x26700001 ! 714: BPL <illegal instruction> | |
3301 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
3302 | ta T_CHANGE_NONPRIV ! macro | |
3303 | .word 0x8981c008 ! 715: WRTICK_R wr %r7, %r8, %tick | |
3304 | .word 0xe84fc000 ! 716: LDSB_R ldsb [%r31 + %r0], %r20 | |
3305 | .word 0xe927e001 ! 717: STF_I st %f20, [0x0001, %r31] | |
3306 | tagged_0_255: | |
3307 | taddcctv %r4, 0x1ed7, %r19 | |
3308 | .word 0xe807e001 ! 718: LDUW_I lduw [%r31 + 0x0001], %r20 | |
3309 | .word 0x8d903c10 ! 719: WRPR_PSTATE_I wrpr %r0, 0x1c10, %pstate | |
3310 | .word 0xe937c008 ! 720: STQF_R - %f20, [%r8, %r31] | |
3311 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_256)) -> intp(0,0,20) | |
3312 | intvec_0_256: | |
3313 | .word 0x39400001 ! 721: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3314 | otherw | |
3315 | mov 0x32, %r30 | |
3316 | .word 0x91d0001e ! 722: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3317 | .word 0x2c800001 ! 723: BNEG bneg,a <label_0x1> | |
3318 | .word 0x91d02033 ! 724: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3319 | set 0x4f852158, %r28 | |
3320 | stxa %r28, [%g0] 0x73 | |
3321 | intvec_0_257: | |
3322 | .word 0x39400001 ! 725: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3323 | .word 0x81460000 ! 726: RD_STICK_REG stbar | |
3324 | .word 0xe84fc000 ! 727: LDSB_R ldsb [%r31 + %r0], %r20 | |
3325 | tagged_0_258: | |
3326 | tsubcctv %r6, 0x1fe8, %r4 | |
3327 | .word 0xe807e001 ! 728: LDUW_I lduw [%r31 + 0x0001], %r20 | |
3328 | intveclr_0_259: | |
3329 | set 0xd31d59f6, %r28 | |
3330 | stxa %r28, [%g0] 0x72 | |
3331 | .word 0x25400001 ! 729: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3332 | .word 0x879021ed ! 730: WRPR_TT_I wrpr %r0, 0x01ed, %tt | |
3333 | .word 0xe8c804a0 ! 731: LDSBA_R ldsba [%r0, %r0] 0x25, %r20 | |
3334 | .word 0x93902003 ! 732: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
3335 | invalw | |
3336 | mov 0x34, %r30 | |
3337 | .word 0x91d0001e ! 733: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3338 | splash_lsu_0_260: | |
3339 | setx 0x9963c77ebc67b8c5, %r1, %r2 | |
3340 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3341 | .word 0x3d400001 ! 734: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3342 | .word 0xe89004a0 ! 735: LDUHA_R lduha [%r0, %r0] 0x25, %r20 | |
3343 | .word 0x8d903db5 ! 736: WRPR_PSTATE_I wrpr %r0, 0x1db5, %pstate | |
3344 | .word 0x879021f8 ! 737: WRPR_TT_I wrpr %r0, 0x01f8, %tt | |
3345 | nop | |
3346 | mov 0x80, %g3 | |
3347 | stxa %g3, [%g3] 0x57 | |
3348 | .word 0xe85fc000 ! 738: LDX_R ldx [%r31 + %r0], %r20 | |
3349 | .word 0xa1450000 ! 739: RD_SET_SOFTINT rd %set_softint, %r16 | |
3350 | set 0x7a3ef7ed, %r28 | |
3351 | stxa %r28, [%g0] 0x73 | |
3352 | intvec_0_261: | |
3353 | .word 0x39400001 ! 740: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3354 | .word 0xe0800ae0 ! 741: LDUWA_R lduwa [%r0, %r0] 0x57, %r16 | |
3355 | splash_lsu_0_262: | |
3356 | setx 0x943777afb796528d, %r1, %r2 | |
3357 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3358 | .word 0x3d400001 ! 742: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3359 | debug_0_263: | |
3360 | mov 0x38, %r18 | |
3361 | .word 0xfef00b12 ! 743: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3362 | .word 0xe08fe010 ! 744: LDUBA_I lduba [%r31, + 0x0010] %asi, %r16 | |
3363 | tagged_0_264: | |
3364 | tsubcctv %r4, 0x1854, %r13 | |
3365 | .word 0xe007e001 ! 745: LDUW_I lduw [%r31 + 0x0001], %r16 | |
3366 | .word 0xe0d004a0 ! 746: LDSHA_R ldsha [%r0, %r0] 0x25, %r16 | |
3367 | .word 0xa1902009 ! 747: WRPR_GL_I wrpr %r0, 0x0009, %- | |
3368 | tagged_0_265: | |
3369 | taddcctv %r12, 0x1313, %r13 | |
3370 | .word 0xe007e001 ! 748: LDUW_I lduw [%r31 + 0x0001], %r16 | |
3371 | .word 0x93902005 ! 749: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
3372 | invalw | |
3373 | mov 0xb2, %r30 | |
3374 | .word 0x83d0001e ! 750: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3375 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_266)) -> intp(0,1,3) | |
3376 | xir_0_266: | |
3377 | .word 0xa984a001 ! 751: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
3378 | nop | |
3379 | mov 0x80, %g3 | |
3380 | stxa %g3, [%g3] 0x57 | |
3381 | .word 0xe05fc000 ! 752: LDX_R ldx [%r31 + %r0], %r16 | |
3382 | .word 0x8d902a4b ! 753: WRPR_PSTATE_I wrpr %r0, 0x0a4b, %pstate | |
3383 | .word 0x8d802000 ! 754: WRFPRS_I wr %r0, 0x0000, %fprs | |
3384 | .word 0x87802080 ! 755: WRASI_I wr %r0, 0x0080, %asi | |
3385 | .word 0x91d02035 ! 756: Tcc_I ta icc_or_xcc, %r0 + 53 | |
3386 | .word 0x2c800001 ! 757: BNEG bneg,a <label_0x1> | |
3387 | DS_0_267: | |
3388 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3389 | allclean | |
3390 | .word 0xa3b40305 ! 758: ALIGNADDRESS alignaddr %r16, %r5, %r17 | |
3391 | nop | |
3392 | mov 0x80, %g3 | |
3393 | stxa %g3, [%g3] 0x5f | |
3394 | .word 0xe25fc000 ! 759: LDX_R ldx [%r31 + %r0], %r17 | |
3395 | .word 0xe28008a0 ! 760: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
3396 | debug_0_268: | |
3397 | setx debug_0_268 + 64, %r11, %r19 | |
3398 | mov 0x38, %r18 | |
3399 | .word 0xe6f00b12 ! 761: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3400 | .word 0x87802063 ! 762: WRASI_I wr %r0, 0x0063, %asi | |
3401 | splash_lsu_0_269: | |
3402 | setx 0x733d951b7431c29b, %r1, %r2 | |
3403 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3404 | .word 0x3d400001 ! 763: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3405 | .word 0x95480000 ! 764: RDHPR_HPSTATE rdhpr %hpstate, %r10 | |
3406 | nop | |
3407 | mov 0x80, %g3 | |
3408 | stxa %g3, [%g3] 0x5f | |
3409 | .word 0xd45fc000 ! 765: LDX_R ldx [%r31 + %r0], %r10 | |
3410 | tagged_0_270: | |
3411 | tsubcctv %r18, 0x15e1, %r15 | |
3412 | .word 0xd407e001 ! 766: LDUW_I lduw [%r31 + 0x0001], %r10 | |
3413 | DS_0_271: | |
3414 | nop | |
3415 | not %g0, %g2 | |
3416 | jmp %g2 | |
3417 | .word 0x9d902005 ! 767: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate | |
3418 | .word 0x8d903680 ! 768: WRPR_PSTATE_I wrpr %r0, 0x1680, %pstate | |
3419 | .word 0xd4c80e80 ! 769: LDSBA_R ldsba [%r0, %r0] 0x74, %r10 | |
3420 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3421 | ta T_CHANGE_NONPRIV ! macro | |
3422 | .word 0x89840011 ! 770: WRTICK_R wr %r16, %r17, %tick | |
3423 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_273)) -> intp(0,1,3) | |
3424 | xir_0_273: | |
3425 | .word 0xa9816001 ! 771: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
3426 | splash_cmpr_0_274: | |
3427 | nop | |
3428 | mov 1, %g2 | |
3429 | sllx %g2, 63, %g2 | |
3430 | or %g1, %g2, %g1 | |
3431 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3432 | .word 0xb180a001 ! 772: WR_STICK_REG_I wr %r2, 0x0001, %- | |
3433 | otherw | |
3434 | mov 0x35, %r30 | |
3435 | .word 0x93d0001e ! 773: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3436 | set 0xb5278e41, %r28 | |
3437 | stxa %r28, [%g0] 0x73 | |
3438 | intvec_0_275: | |
3439 | .word 0x39400001 ! 774: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3440 | .word 0xd40fc000 ! 775: LDUB_R ldub [%r31 + %r0], %r10 | |
3441 | splash_lsu_0_276: | |
3442 | setx 0xa9bce6121926edad, %r1, %r2 | |
3443 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3444 | .word 0x3d400001 ! 776: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3445 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_277)) -> intp(0,1,3) | |
3446 | xir_0_277: | |
3447 | .word 0xa980a001 ! 777: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
3448 | ta T_CHANGE_PRIV ! macro | |
3449 | .word 0xd41fe001 ! 779: LDD_I ldd [%r31 + 0x0001], %r10 | |
3450 | .word 0x87802058 ! 780: WRASI_I wr %r0, 0x0058, %asi | |
3451 | ta T_CHANGE_HPRIV ! macro | |
3452 | invalw | |
3453 | mov 0x34, %r30 | |
3454 | .word 0x91d0001e ! 782: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3455 | splash_lsu_0_278: | |
3456 | setx 0x1224a20816d9e369, %r1, %r2 | |
3457 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3458 | .word 0x3d400001 ! 783: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3459 | otherw | |
3460 | mov 0x34, %r30 | |
3461 | .word 0x83d0001e ! 784: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3462 | .word 0x879021b0 ! 785: WRPR_TT_I wrpr %r0, 0x01b0, %tt | |
3463 | .word 0xd4c7e020 ! 786: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r10 | |
3464 | .word 0x85702001 ! 787: POPC_I popc 0x0001, %r2 | |
3465 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_279)) -> intp(0,1,3) | |
3466 | xir_0_279: | |
3467 | .word 0xa984e001 ! 788: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
3468 | .word 0xc4bfc031 ! 789: STDA_R stda %r2, [%r31 + %r17] 0x01 | |
3469 | .word 0xc48008a0 ! 790: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
3470 | .word 0xc48008a0 ! 791: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
3471 | invalw | |
3472 | mov 0xb3, %r30 | |
3473 | .word 0x91d0001e ! 792: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3474 | ta T_CHANGE_PRIV ! macro | |
3475 | .word 0x81460000 ! 794: RD_STICK_REG stbar | |
3476 | tagged_0_280: | |
3477 | tsubcctv %r23, 0x1e9c, %r19 | |
3478 | .word 0xc407e001 ! 795: LDUW_I lduw [%r31 + 0x0001], %r2 | |
3479 | DS_0_281: | |
3480 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3481 | .word 0xd930c00c ! 1: STQF_R - %f12, [%r12, %r3] | |
3482 | normalw | |
3483 | .word 0x97458000 ! 796: RD_SOFTINT_REG rd %softint, %r11 | |
3484 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_282)) -> intp(0,0,3) | |
3485 | intvec_0_282: | |
3486 | .word 0x39400001 ! 797: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3487 | tagged_0_283: | |
3488 | taddcctv %r14, 0x1964, %r19 | |
3489 | .word 0xd607e001 ! 798: LDUW_I lduw [%r31 + 0x0001], %r11 | |
3490 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_284)) -> intp(0,0,0) | |
3491 | intvec_0_284: | |
3492 | .word 0x39400001 ! 799: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3493 | .word 0xd6c804a0 ! 800: LDSBA_R ldsba [%r0, %r0] 0x25, %r11 | |
3494 | tagged_0_285: | |
3495 | taddcctv %r9, 0x1a91, %r11 | |
3496 | .word 0xd607e001 ! 801: LDUW_I lduw [%r31 + 0x0001], %r11 | |
3497 | .word 0x8d464000 ! 802: RD_STICK_CMPR_REG rd %-, %r6 | |
3498 | .word 0x8d902485 ! 803: WRPR_PSTATE_I wrpr %r0, 0x0485, %pstate | |
3499 | intveclr_0_286: | |
3500 | set 0x9a28a51, %r28 | |
3501 | stxa %r28, [%g0] 0x72 | |
3502 | .word 0x25400001 ! 804: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3503 | .word 0x8fb44fe1 ! 805: FONES e %f7 | |
3504 | tagged_0_287: | |
3505 | taddcctv %r18, 0x1828, %r16 | |
3506 | .word 0xce07e001 ! 806: LDUW_I lduw [%r31 + 0x0001], %r7 | |
3507 | .word 0xa1902006 ! 807: WRPR_GL_I wrpr %r0, 0x0006, %- | |
3508 | .word 0xa8d26001 ! 808: UMULcc_I umulcc %r9, 0x0001, %r20 | |
3509 | .word 0x879022e6 ! 809: WRPR_TT_I wrpr %r0, 0x02e6, %tt | |
3510 | .word 0x87802089 ! 810: WRASI_I wr %r0, 0x0089, %asi | |
3511 | DS_0_288: | |
3512 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3513 | .word 0xbfe7c000 ! 811: SAVE_R save %r31, %r0, %r31 | |
3514 | .word 0x93902002 ! 812: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3515 | intveclr_0_289: | |
3516 | set 0x76e100a8, %r28 | |
3517 | stxa %r28, [%g0] 0x72 | |
3518 | .word 0x25400001 ! 813: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3519 | .word 0x2a800001 ! 814: BCS bcs,a <label_0x1> | |
3520 | .word 0x8d903ab1 ! 815: WRPR_PSTATE_I wrpr %r0, 0x1ab1, %pstate | |
3521 | debug_0_290: | |
3522 | mov 0x38, %r18 | |
3523 | .word 0xfef00b12 ! 816: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3524 | .word 0x91d02032 ! 817: Tcc_I ta icc_or_xcc, %r0 + 50 | |
3525 | splash_cmpr_0_291: | |
3526 | nop | |
3527 | mov 1, %g2 | |
3528 | sllx %g2, 63, %g2 | |
3529 | or %g1, %g2, %g1 | |
3530 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3531 | .word 0xb1816001 ! 818: WR_STICK_REG_I wr %r5, 0x0001, %- | |
3532 | .word 0x91926001 ! 819: WRPR_PIL_I wrpr %r9, 0x0001, %pil | |
3533 | nop | |
3534 | mov 0x80, %g3 | |
3535 | stxa %g3, [%g3] 0x5f | |
3536 | .word 0xe85fc000 ! 820: LDX_R ldx [%r31 + %r0], %r20 | |
3537 | .word 0x8ec4e001 ! 821: ADDCcc_I addccc %r19, 0x0001, %r7 | |
3538 | intveclr_0_292: | |
3539 | set 0x4003fa4f, %r28 | |
3540 | stxa %r28, [%g0] 0x72 | |
3541 | .word 0x25400001 ! 822: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3542 | .word 0xce9fe001 ! 823: LDDA_I ldda [%r31, + 0x0001] %asi, %r7 | |
3543 | .word 0xce800c80 ! 824: LDUWA_R lduwa [%r0, %r0] 0x64, %r7 | |
3544 | splash_cmpr_0_293: | |
3545 | nop | |
3546 | mov 1, %g2 | |
3547 | sllx %g2, 63, %g2 | |
3548 | or %g1, %g2, %g1 | |
3549 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3550 | .word 0xb180a001 ! 825: WR_STICK_REG_I wr %r2, 0x0001, %- | |
3551 | .word 0xa1902007 ! 826: WRPR_GL_I wrpr %r0, 0x0007, %- | |
3552 | DS_0_294: | |
3553 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3554 | allclean | |
3555 | .word 0x85b1c309 ! 827: ALIGNADDRESS alignaddr %r7, %r9, %r2 | |
3556 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_295)) -> intp(0,1,3) | |
3557 | xir_0_295: | |
3558 | .word 0xa984e001 ! 828: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
3559 | .word 0x28700001 ! 829: BPLEU <illegal instruction> | |
3560 | .word 0x879023a1 ! 830: WRPR_TT_I wrpr %r0, 0x03a1, %tt | |
3561 | .word 0x99902003 ! 831: WRPR_CLEANWIN_I wrpr %r0, 0x0003, %cleanwin | |
3562 | intveclr_0_296: | |
3563 | set 0xc06a01f4, %r28 | |
3564 | stxa %r28, [%g0] 0x72 | |
3565 | .word 0x25400001 ! 832: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3566 | mondo_0_297: | |
3567 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3568 | ||
3569 | stxa %r7, [%r0+0x3d8] %asi | |
3570 | .word 0x9d92c008 ! 833: WRPR_WSTATE_R wrpr %r11, %r8, %wstate | |
3571 | .word 0xc527c008 ! 834: STF_R st %f2, [%r8, %r31] | |
3572 | .word 0xc527e001 ! 835: STF_I st %f2, [0x0001, %r31] | |
3573 | .word 0xc48008a0 ! 836: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
3574 | splash_tba_0_298: | |
3575 | set 0x120000, %r2 | |
3576 | st %r1, [%r2+%r0] | |
3577 | ta T_CHANGE_PRIV | |
3578 | set 0x120000, %r2 | |
3579 | .word 0x8b900002 ! 837: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3580 | DS_0_299: | |
3581 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3582 | .word 0xe9350002 ! 1: STQF_R - %f20, [%r2, %r20] | |
3583 | normalw | |
3584 | .word 0x99458000 ! 838: RD_SOFTINT_REG rd %softint, %r12 | |
3585 | .word 0x3c700001 ! 839: BPPOS <illegal instruction> | |
3586 | .word 0xa190200c ! 840: WRPR_GL_I wrpr %r0, 0x000c, %- | |
3587 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_300)) -> intp(0,0,13) | |
3588 | intvec_0_300: | |
3589 | .word 0x39400001 ! 841: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3590 | set 0xd492bfbc, %r28 | |
3591 | stxa %r28, [%g0] 0x73 | |
3592 | intvec_0_301: | |
3593 | .word 0x39400001 ! 842: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3594 | .word 0x91d02033 ! 843: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3595 | .word 0xa1450000 ! 844: RD_SET_SOFTINT rd %set_softint, %r16 | |
3596 | .word 0x9a4a8010 ! 845: MULX_R mulx %r10, %r16, %r13 | |
3597 | .word 0xda57e001 ! 846: LDSH_I ldsh [%r31 + 0x0001], %r13 | |
3598 | .word 0xda8804a0 ! 847: LDUBA_R lduba [%r0, %r0] 0x25, %r13 | |
3599 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_302)) -> intp(0,0,22) | |
3600 | intvec_0_302: | |
3601 | .word 0x39400001 ! 848: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3602 | .word 0x8d90390b ! 849: WRPR_PSTATE_I wrpr %r0, 0x190b, %pstate | |
3603 | splash_lsu_0_303: | |
3604 | setx 0x8c1bf1516b0e1edb, %r1, %r2 | |
3605 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3606 | .word 0x3d400001 ! 850: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3607 | .word 0xa6816001 ! 851: ADDcc_I addcc %r5, 0x0001, %r19 | |
3608 | .word 0xa7464000 ! 852: RD_STICK_CMPR_REG rd %-, %r19 | |
3609 | invalw | |
3610 | mov 0x34, %r30 | |
3611 | .word 0x83d0001e ! 853: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3612 | DS_0_304: | |
3613 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3614 | .word 0xc3344005 ! 1: STQF_R - %f1, [%r5, %r17] | |
3615 | normalw | |
3616 | .word 0xa7458000 ! 854: RD_SOFTINT_REG rd %softint, %r19 | |
3617 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3618 | ta T_CHANGE_NONHPRIV ! macro | |
3619 | .word 0xb1824011 ! 855: WR_STICK_REG_R wr %r9, %r17, %- | |
3620 | .word 0xa8d0a001 ! 856: UMULcc_I umulcc %r2, 0x0001, %r20 | |
3621 | .word 0xab80c004 ! 857: WR_CLEAR_SOFTINT_R wr %r3, %r4, %clear_softint | |
3622 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_306)) -> intp(0,1,3) | |
3623 | xir_0_306: | |
3624 | .word 0xa9822001 ! 858: WR_SET_SOFTINT_I wr %r8, 0x0001, %set_softint | |
3625 | intveclr_0_307: | |
3626 | set 0x160ed8b3, %r28 | |
3627 | stxa %r28, [%g0] 0x72 | |
3628 | .word 0x25400001 ! 859: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3629 | mondo_0_308: | |
3630 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3631 | ||
3632 | stxa %r12, [%r0+0x3e0] %asi | |
3633 | .word 0x9d928014 ! 860: WRPR_WSTATE_R wrpr %r10, %r20, %wstate | |
3634 | .word 0x8d802000 ! 861: WRFPRS_I wr %r0, 0x0000, %fprs | |
3635 | DS_0_309: | |
3636 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3637 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3638 | .word 0xe7140005 ! 1: LDQF_R - [%r16, %r5], %f19 | |
3639 | .word 0xa3a00821 ! 862: FADDs fadds %f0, %f1, %f17 | |
3640 | .word 0xab818004 ! 863: WR_CLEAR_SOFTINT_R wr %r6, %r4, %clear_softint | |
3641 | .word 0x879023b1 ! 864: WRPR_TT_I wrpr %r0, 0x03b1, %tt | |
3642 | invalw | |
3643 | mov 0x35, %r30 | |
3644 | .word 0x83d0001e ! 865: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3645 | .word 0x91952001 ! 866: WRPR_PIL_I wrpr %r20, 0x0001, %pil | |
3646 | .word 0xa7450000 ! 867: RD_SET_SOFTINT rd %set_softint, %r19 | |
3647 | DS_0_310: | |
3648 | nop | |
3649 | not %g0, %g2 | |
3650 | jmp %g2 | |
3651 | .word 0x9d902004 ! 868: WRPR_WSTATE_I wrpr %r0, 0x0004, %wstate | |
3652 | debug_0_311: | |
3653 | mov 0x38, %r18 | |
3654 | .word 0xfef00b12 ! 869: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3655 | .word 0x89b48fe1 ! 870: FONES e %f4 | |
3656 | debug_0_312: | |
3657 | mov 0x38, %r18 | |
3658 | .word 0xfef00b12 ! 871: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3659 | .word 0xc8800c00 ! 872: LDUWA_R lduwa [%r0, %r0] 0x60, %r4 | |
3660 | nop | |
3661 | mov 0x80, %g3 | |
3662 | stxa %g3, [%g3] 0x5f | |
3663 | .word 0xc85fc000 ! 873: LDX_R ldx [%r31 + %r0], %r4 | |
3664 | .word 0x89a40d33 ! 874: FsMULd fsmuld %f16, %f50, %f4 | |
3665 | .word 0x85520000 ! 875: RDPR_PIL rdpr %pil, %r2 | |
3666 | .word 0x879022c5 ! 876: WRPR_TT_I wrpr %r0, 0x02c5, %tt | |
3667 | tagged_0_313: | |
3668 | taddcctv %r17, 0x1cea, %r1 | |
3669 | .word 0xc407e001 ! 877: LDUW_I lduw [%r31 + 0x0001], %r2 | |
3670 | debug_0_314: | |
3671 | mov 0x38, %r18 | |
3672 | .word 0xfef00b12 ! 878: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3673 | ta T_CHANGE_PRIV ! macro | |
3674 | otherw | |
3675 | mov 0x34, %r30 | |
3676 | .word 0x91d0001e ! 880: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3677 | .word 0x87802014 ! 881: WRASI_I wr %r0, 0x0014, %asi | |
3678 | tagged_0_315: | |
3679 | taddcctv %r14, 0x16c3, %r18 | |
3680 | .word 0xc407e001 ! 882: LDUW_I lduw [%r31 + 0x0001], %r2 | |
3681 | .word 0x87802055 ! 883: WRASI_I wr %r0, 0x0055, %asi | |
3682 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_316)) -> intp(0,0,15) | |
3683 | intvec_0_316: | |
3684 | .word 0x39400001 ! 884: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3685 | .word 0x87802088 ! 885: WRASI_I wr %r0, 0x0088, %asi | |
3686 | change_to_randtl_0_317: | |
3687 | ta T_CHANGE_HPRIV ! macro | |
3688 | done_change_to_randtl_0_317: | |
3689 | .word 0x8f902004 ! 886: WRPR_TL_I wrpr %r0, 0x0004, %tl | |
3690 | tagged_0_318: | |
3691 | tsubcctv %r17, 0x100e, %r11 | |
3692 | .word 0xc407e001 ! 887: LDUW_I lduw [%r31 + 0x0001], %r2 | |
3693 | intveclr_0_319: | |
3694 | set 0x66ad9c3f, %r28 | |
3695 | stxa %r28, [%g0] 0x72 | |
3696 | .word 0x25400001 ! 888: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3697 | .word 0xc457e001 ! 889: LDSH_I ldsh [%r31 + 0x0001], %r2 | |
3698 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_320)) -> intp(0,0,21) | |
3699 | intvec_0_320: | |
3700 | .word 0x39400001 ! 890: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3701 | ta T_CHANGE_HPRIV ! macro | |
3702 | .word 0xc41fe001 ! 892: LDD_I ldd [%r31 + 0x0001], %r2 | |
3703 | splash_cmpr_0_321: | |
3704 | nop | |
3705 | mov 1, %g2 | |
3706 | sllx %g2, 63, %g2 | |
3707 | or %g1, %g2, %g1 | |
3708 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3709 | .word 0xb1852001 ! 893: WR_STICK_REG_I wr %r20, 0x0001, %- | |
3710 | nop | |
3711 | mov 0x80, %g3 | |
3712 | stxa %g3, [%g3] 0x5f | |
3713 | .word 0xc45fc000 ! 894: LDX_R ldx [%r31 + %r0], %r2 | |
3714 | mondo_0_322: | |
3715 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3716 | ||
3717 | stxa %r13, [%r0+0x3d0] %asi | |
3718 | .word 0x9d910014 ! 895: WRPR_WSTATE_R wrpr %r4, %r20, %wstate | |
3719 | .word 0x8d902e29 ! 896: WRPR_PSTATE_I wrpr %r0, 0x0e29, %pstate | |
3720 | set 0xba9012c7, %r28 | |
3721 | stxa %r28, [%g0] 0x73 | |
3722 | intvec_0_323: | |
3723 | .word 0x39400001 ! 897: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3724 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_324)) -> intp(0,1,3) | |
3725 | xir_0_324: | |
3726 | .word 0xa9816001 ! 898: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
3727 | .word 0xa951c000 ! 899: RDPR_TL <illegal instruction> | |
3728 | .word 0xe847c000 ! 900: LDSW_R ldsw [%r31 + %r0], %r20 | |
3729 | .word 0xa1902004 ! 901: WRPR_GL_I wrpr %r0, 0x0004, %- | |
3730 | .word 0xe917c000 ! 902: LDQF_R - [%r31, %r0], %f20 | |
3731 | .word 0xe847c000 ! 903: LDSW_R ldsw [%r31 + %r0], %r20 | |
3732 | .word 0x87802089 ! 904: WRASI_I wr %r0, 0x0089, %asi | |
3733 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_325)) -> intp(0,1,3) | |
3734 | xir_0_325: | |
3735 | .word 0xa9842001 ! 905: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
3736 | tagged_0_326: | |
3737 | tsubcctv %r15, 0x1250, %r22 | |
3738 | .word 0xe807e001 ! 906: LDUW_I lduw [%r31 + 0x0001], %r20 | |
3739 | .word 0x8d903d5e ! 907: WRPR_PSTATE_I wrpr %r0, 0x1d5e, %pstate | |
3740 | .word 0xe997e001 ! 908: LDQFA_I - [%r31, 0x0001], %f20 | |
3741 | .word 0x38800001 ! 909: BGU bgu,a <label_0x1> | |
3742 | .word 0xe88008a0 ! 910: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 | |
3743 | otherw | |
3744 | mov 0x31, %r30 | |
3745 | .word 0x91d0001e ! 911: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3746 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_327)) -> intp(0,1,3) | |
3747 | xir_0_327: | |
3748 | .word 0xa981e001 ! 912: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
3749 | .word 0xe8d7e010 ! 913: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r20 | |
3750 | invalw | |
3751 | mov 0x31, %r30 | |
3752 | .word 0x93d0001e ! 914: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3753 | .word 0x87802014 ! 915: WRASI_I wr %r0, 0x0014, %asi | |
3754 | .word 0x93902003 ! 916: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
3755 | .word 0xe8800a60 ! 917: LDUWA_R lduwa [%r0, %r0] 0x53, %r20 | |
3756 | .word 0x8f514000 ! 918: RDPR_TBA rdpr %tba, %r7 | |
3757 | nop | |
3758 | mov 0x80, %g3 | |
3759 | stxa %g3, [%g3] 0x57 | |
3760 | .word 0xce5fc000 ! 919: LDX_R ldx [%r31 + %r0], %r7 | |
3761 | .word 0xce47c000 ! 920: LDSW_R ldsw [%r31 + %r0], %r7 | |
3762 | mondo_0_328: | |
3763 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3764 | ||
3765 | stxa %r13, [%r0+0x3c0] %asi | |
3766 | .word 0x9d930007 ! 921: WRPR_WSTATE_R wrpr %r12, %r7, %wstate | |
3767 | otherw | |
3768 | mov 0x30, %r30 | |
3769 | .word 0x91d0001e ! 922: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3770 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_329)) -> intp(0,1,3) | |
3771 | xir_0_329: | |
3772 | .word 0xa982a001 ! 923: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
3773 | .word 0x879022f2 ! 924: WRPR_TT_I wrpr %r0, 0x02f2, %tt | |
3774 | .word 0xa3480000 ! 925: RDHPR_HPSTATE rdhpr %hpstate, %r17 | |
3775 | .word 0xe20fc000 ! 926: LDUB_R ldub [%r31 + %r0], %r17 | |
3776 | DS_0_330: | |
3777 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3778 | allclean | |
3779 | .word 0x89b1c30d ! 927: ALIGNADDRESS alignaddr %r7, %r13, %r4 | |
3780 | .word 0xa1902002 ! 928: WRPR_GL_I wrpr %r0, 0x0002, %- | |
3781 | set 0x41f5a353, %r28 | |
3782 | stxa %r28, [%g0] 0x73 | |
3783 | intvec_0_331: | |
3784 | .word 0x39400001 ! 929: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3785 | .word 0xa982c001 ! 930: WR_SET_SOFTINT_R wr %r11, %r1, %set_softint | |
3786 | intveclr_0_332: | |
3787 | set 0x4347b6c7, %r28 | |
3788 | stxa %r28, [%g0] 0x72 | |
3789 | .word 0x25400001 ! 931: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3790 | change_to_randtl_0_333: | |
3791 | ta T_CHANGE_HPRIV ! macro | |
3792 | done_change_to_randtl_0_333: | |
3793 | .word 0x8f902003 ! 932: WRPR_TL_I wrpr %r0, 0x0003, %tl | |
3794 | .word 0x93d02035 ! 933: Tcc_I tne icc_or_xcc, %r0 + 53 | |
3795 | .word 0x85504000 ! 934: RDPR_TNPC rdpr %tnpc, %r2 | |
3796 | .word 0x91946001 ! 935: WRPR_PIL_I wrpr %r17, 0x0001, %pil | |
3797 | DS_0_334: | |
3798 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3799 | .word 0xbfe7c000 ! 936: SAVE_R save %r31, %r0, %r31 | |
3800 | .word 0xc4d804a0 ! 937: LDXA_R ldxa [%r0, %r0] 0x25, %r2 | |
3801 | debug_0_335: | |
3802 | mov 0x38, %r18 | |
3803 | .word 0xfef00b12 ! 938: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3804 | .word 0xc527e001 ! 939: STF_I st %f2, [0x0001, %r31] | |
3805 | .word 0x93902006 ! 940: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
3806 | splash_lsu_0_336: | |
3807 | setx 0x2084e3626f7f7963, %r1, %r2 | |
3808 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3809 | .word 0x3d400001 ! 941: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3810 | .word 0xc48008a0 ! 942: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
3811 | .word 0xad842001 ! 943: WR_SOFTINT_REG_I wr %r16, 0x0001, %softint | |
3812 | mondo_0_337: | |
3813 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3814 | ||
3815 | stxa %r6, [%r0+0x3e8] %asi | |
3816 | .word 0x9d918004 ! 944: WRPR_WSTATE_R wrpr %r6, %r4, %wstate | |
3817 | .word 0xc4d804a0 ! 945: LDXA_R ldxa [%r0, %r0] 0x25, %r2 | |
3818 | .word 0xc447c000 ! 946: LDSW_R ldsw [%r31 + %r0], %r2 | |
3819 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_338)) -> intp(0,0,18) | |
3820 | intvec_0_338: | |
3821 | .word 0x39400001 ! 947: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3822 | .word 0xc4800c60 ! 948: LDUWA_R lduwa [%r0, %r0] 0x63, %r2 | |
3823 | .word 0xc48fe010 ! 949: LDUBA_I lduba [%r31, + 0x0010] %asi, %r2 | |
3824 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_339)) -> intp(0,1,3) | |
3825 | xir_0_339: | |
3826 | .word 0xa9802001 ! 950: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
3827 | .word 0xc4d7e030 ! 951: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r2 | |
3828 | .word 0x87802058 ! 952: WRASI_I wr %r0, 0x0058, %asi | |
3829 | splash_htba_0_340: | |
3830 | set 0x80000, %r2 | |
3831 | st %r1, [%r2+%r0] | |
3832 | ta T_CHANGE_HPRIV | |
3833 | set 0x80000, %r2 | |
3834 | .word 0x8b980002 ! 953: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3835 | nop | |
3836 | mov 0x80, %g3 | |
3837 | stxa %g3, [%g3] 0x57 | |
3838 | .word 0xc45fc000 ! 954: LDX_R ldx [%r31 + %r0], %r2 | |
3839 | .word 0xc407c000 ! 955: LDUW_R lduw [%r31 + %r0], %r2 | |
3840 | .word 0xc537c004 ! 956: STQF_R - %f2, [%r4, %r31] | |
3841 | splash_lsu_0_341: | |
3842 | setx 0xf0a44a8b92b0332f, %r1, %r2 | |
3843 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3844 | .word 0x3d400001 ! 957: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3845 | .word 0x8551c000 ! 958: RDPR_TL rdpr %tl, %r2 | |
3846 | tagged_0_342: | |
3847 | tsubcctv %r16, 0x100f, %r5 | |
3848 | .word 0xc407e001 ! 959: LDUW_I lduw [%r31 + 0x0001], %r2 | |
3849 | nop | |
3850 | mov 0x80, %g3 | |
3851 | stxa %g3, [%g3] 0x5f | |
3852 | .word 0xc45fc000 ! 960: LDX_R ldx [%r31 + %r0], %r2 | |
3853 | set 0x67d88597, %r28 | |
3854 | stxa %r28, [%g0] 0x73 | |
3855 | intvec_0_343: | |
3856 | .word 0x39400001 ! 961: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3857 | nop | |
3858 | mov 0x80, %g3 | |
3859 | stxa %g3, [%g3] 0x57 | |
3860 | .word 0xc45fc000 ! 962: LDX_R ldx [%r31 + %r0], %r2 | |
3861 | .word 0xa1902007 ! 963: WRPR_GL_I wrpr %r0, 0x0007, %- | |
3862 | nop | |
3863 | mov 0x80, %g3 | |
3864 | stxa %g3, [%g3] 0x57 | |
3865 | .word 0xc45fc000 ! 964: LDX_R ldx [%r31 + %r0], %r2 | |
3866 | .word 0x22700001 ! 965: BPE <illegal instruction> | |
3867 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_344)) -> intp(0,0,16) | |
3868 | intvec_0_344: | |
3869 | .word 0x39400001 ! 966: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3870 | .word 0x8d90353d ! 967: WRPR_PSTATE_I wrpr %r0, 0x153d, %pstate | |
3871 | .word 0xc527e001 ! 968: STF_I st %f2, [0x0001, %r31] | |
3872 | .word 0x8780201c ! 969: WRASI_I wr %r0, 0x001c, %asi | |
3873 | .word 0x93902002 ! 970: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3874 | .word 0x93508000 ! 971: RDPR_TSTATE rdpr %tstate, %r9 | |
3875 | debug_0_345: | |
3876 | mov 0x38, %r18 | |
3877 | .word 0xfef00b12 ! 972: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3878 | splash_lsu_0_346: | |
3879 | setx 0x7177efee3b77befd, %r1, %r2 | |
3880 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3881 | .word 0x3d400001 ! 973: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3882 | intveclr_0_347: | |
3883 | set 0xa472a981, %r28 | |
3884 | stxa %r28, [%g0] 0x72 | |
3885 | .word 0x25400001 ! 974: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3886 | .word 0x83d020b5 ! 975: Tcc_I te icc_or_xcc, %r0 + 181 | |
3887 | .word 0xa190200b ! 976: WRPR_GL_I wrpr %r0, 0x000b, %- | |
3888 | nop | |
3889 | mov 0x80, %g3 | |
3890 | stxa %g3, [%g3] 0x57 | |
3891 | .word 0xd25fc000 ! 977: LDX_R ldx [%r31 + %r0], %r9 | |
3892 | splash_lsu_0_348: | |
3893 | setx 0xca5ded9b92c91e57, %r1, %r2 | |
3894 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3895 | .word 0x3d400001 ! 978: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3896 | .word 0xa1902001 ! 979: WRPR_GL_I wrpr %r0, 0x0001, %- | |
3897 | otherw | |
3898 | mov 0xb5, %r30 | |
3899 | .word 0x91d0001e ! 980: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3900 | .word 0xd28804a0 ! 981: LDUBA_R lduba [%r0, %r0] 0x25, %r9 | |
3901 | .word 0xd337e001 ! 982: STQF_I - %f9, [0x0001, %r31] | |
3902 | .word 0x87802010 ! 983: WRASI_I wr %r0, 0x0010, %asi | |
3903 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_349)) -> intp(0,1,3) | |
3904 | xir_0_349: | |
3905 | .word 0xa9832001 ! 984: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
3906 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_350)) -> intp(0,0,4) | |
3907 | intvec_0_350: | |
3908 | .word 0x39400001 ! 985: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3909 | otherw | |
3910 | mov 0x34, %r30 | |
3911 | .word 0x91d0001e ! 986: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3912 | .word 0x91d020b4 ! 987: Tcc_I ta icc_or_xcc, %r0 + 180 | |
3913 | .word 0x8198205e ! 988: WRHPR_HPSTATE_I wrhpr %r0, 0x005e, %hpstate | |
3914 | DS_0_351: | |
3915 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3916 | .word 0xd3340007 ! 1: STQF_R - %f9, [%r7, %r16] | |
3917 | normalw | |
3918 | .word 0x85458000 ! 989: RD_SOFTINT_REG rd %softint, %r2 | |
3919 | splash_tba_0_352: | |
3920 | set 0x120000, %r2 | |
3921 | st %r1, [%r2+%r0] | |
3922 | ta T_CHANGE_PRIV | |
3923 | set 0x120000, %r2 | |
3924 | .word 0x8b900002 ! 990: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3925 | intveclr_0_353: | |
3926 | set 0x7c435b88, %r28 | |
3927 | stxa %r28, [%g0] 0x72 | |
3928 | .word 0x25400001 ! 991: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3929 | .word 0xc44fe001 ! 992: LDSB_I ldsb [%r31 + 0x0001], %r2 | |
3930 | ta T_CHANGE_PRIV ! macro | |
3931 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_354)) -> intp(0,0,23) | |
3932 | intvec_0_354: | |
3933 | .word 0x39400001 ! 994: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3934 | set 0x17a35339, %r28 | |
3935 | stxa %r28, [%g0] 0x73 | |
3936 | intvec_0_355: | |
3937 | .word 0x39400001 ! 995: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3938 | .word 0xc4c7e030 ! 996: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r2 | |
3939 | DS_0_356: | |
3940 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3941 | .xword 0xb37aafa5 ! Random illegal ? | |
3942 | .word 0x87a00546 ! 1: FSQRTd fsqrt | |
3943 | .word 0x95a08821 ! 997: FADDs fadds %f2, %f1, %f10 | |
3944 | .word 0x96d46001 ! 998: UMULcc_I umulcc %r17, 0x0001, %r11 | |
3945 | debug_0_357: | |
3946 | mov 0x38, %r18 | |
3947 | SECTION .MAIN | |
3948 | .text | |
3949 | diag_finish: | |
3950 | nop | |
3951 | nop | |
3952 | nop | |
3953 | ta T_CHANGE_HPRIV | |
3954 | set 0x80000, %r2 | |
3955 | wrhpr %g2, %g0, %htba | |
3956 | ta T_GOOD_TRAP | |
3957 | nop | |
3958 | nop | |
3959 | nop | |
3960 | .data | |
3961 | .xword 0x0 | |
3962 | ||
3963 | .global user_data_start | |
3964 | .data | |
3965 | user_data_start: | |
3966 | ||
3967 | .xword 0x4a8f238515bed820 | |
3968 | .xword 0x75be13447c624d55 | |
3969 | .xword 0x2af9122479d2314d | |
3970 | .xword 0x095989bd6e064130 | |
3971 | .xword 0x6588aa9e6de9e019 | |
3972 | .xword 0x741333826d26e303 | |
3973 | .xword 0x655ce4dd2fd09fe1 | |
3974 | .xword 0xc18fb3ce19be2b48 | |
3975 | .xword 0x13321b407a1d3647 | |
3976 | .xword 0xaabe1255531fcc5e | |
3977 | .xword 0xb981747d283ede6c | |
3978 | .xword 0xaeb74544b5c57aaa | |
3979 | .xword 0x0fb969f59e7463b9 | |
3980 | .xword 0xbd3fbd8ce68382b2 | |
3981 | .xword 0x2bef103f47840fca | |
3982 | .xword 0x7c825e3ea18cb99b | |
3983 | .xword 0xad2be683086aa03a | |
3984 | .xword 0xd03cbbcd189639c8 | |
3985 | .xword 0xde3d6395ec146b6b | |
3986 | .xword 0xeb8d54f642fd8887 | |
3987 | .xword 0x5f0e70218a66bef3 | |
3988 | .xword 0xac903710762d7981 | |
3989 | .xword 0x233cfeac26830fd6 | |
3990 | .xword 0x77beb58eb799db28 | |
3991 | .xword 0x1ab59aa87c32ad2e | |
3992 | .xword 0x588cd95daa368cab | |
3993 | .xword 0x72a61fa8b859a16d | |
3994 | .xword 0x4a696b5bc153c31a | |
3995 | .xword 0x4b24a37a3846be45 | |
3996 | .xword 0x95035c3e117e3459 | |
3997 | .xword 0x3a016e6bce9f44c5 | |
3998 | .xword 0x034d1609d4c4e2fb | |
3999 | .xword 0x3735f96caa652854 | |
4000 | .xword 0xf98286ecbe51a810 | |
4001 | .xword 0x481de16ecd719b85 | |
4002 | .xword 0xbba5e9deece3784d | |
4003 | .xword 0x1f9ab853116605ad | |
4004 | .xword 0x831cd350822b5f74 | |
4005 | .xword 0xec7f9cffb5a6b382 | |
4006 | .xword 0xc230cacefaec879d | |
4007 | .xword 0x20838e0d03b70d4c | |
4008 | .xword 0x092543dcd545b2fd | |
4009 | .xword 0xe994d1dc38615e01 | |
4010 | .xword 0x9de922d652bf93dd | |
4011 | .xword 0x1f67fce84ee6bee7 | |
4012 | .xword 0x6747c5dd5be0ec8f | |
4013 | .xword 0x784f8dd26ae4fbef | |
4014 | .xword 0xbcd1e8185a6c4d72 | |
4015 | .xword 0x0404634adf44b6ad | |
4016 | .xword 0x035c1c621a1433a5 | |
4017 | .xword 0xddbc0d16e9d5c68f | |
4018 | .xword 0x12e9781aea6b9cd8 | |
4019 | .xword 0x8df84b6248cfea8b | |
4020 | .xword 0x631e9ae4e6a158a0 | |
4021 | .xword 0x9d35f36cf78c3183 | |
4022 | .xword 0xcebfb14528037029 | |
4023 | .xword 0xef7b10bab0033962 | |
4024 | .xword 0x1c678ca5bc2686b3 | |
4025 | .xword 0x2f8499b3d50987e9 | |
4026 | .xword 0x40f806e834532bfc | |
4027 | .xword 0xf23612e383bdf86b | |
4028 | .xword 0x4bde12f1c46569d4 | |
4029 | .xword 0xbbb71a1176341b0f | |
4030 | .xword 0x5f03d415a9e41759 | |
4031 | .xword 0x0d3502b8bbd47ab9 | |
4032 | .xword 0xfbadd2adaf6bbc5e | |
4033 | .xword 0x638341bade81b7cc | |
4034 | .xword 0x7bfbbb6fc5d8147e | |
4035 | .xword 0x1e64dcc0fa9b41a9 | |
4036 | .xword 0x1c857afd11f4e4a5 | |
4037 | .xword 0x943bfc171d16d3c6 | |
4038 | .xword 0x49060bf683923e14 | |
4039 | .xword 0xd24d5bed166a93da | |
4040 | .xword 0x7df37b8df42d2d31 | |
4041 | .xword 0xe278e4899e27da63 | |
4042 | .xword 0x5f5840d2c20671e4 | |
4043 | .xword 0xa9941ddd50f3f1ed | |
4044 | .xword 0x7c018207b17ad28d | |
4045 | .xword 0xcbaf7da55cecdffb | |
4046 | .xword 0x8ce1c784164f27da | |
4047 | .xword 0xbc2e813526f28d09 | |
4048 | .xword 0xb7fe31adb38a64b0 | |
4049 | .xword 0xa5545d0f80f2f6ff | |
4050 | .xword 0x8bdceda17ed3b1ee | |
4051 | .xword 0x7b525bc8a508c37f | |
4052 | .xword 0xc50ee4e039b1ef38 | |
4053 | .xword 0x8fec80726c3c2102 | |
4054 | .xword 0x92b939eb09635813 | |
4055 | .xword 0x75baf79ad16bd4d4 | |
4056 | .xword 0x1f2eb4aa73a0708a | |
4057 | .xword 0x2edbee3480e6d9a8 | |
4058 | .xword 0x9a5c7e6b31f57d8b | |
4059 | .xword 0xadf2e5a5ad930c5e | |
4060 | .xword 0xf5c9b4491714e55c | |
4061 | .xword 0x5007888a79dc00fb | |
4062 | .xword 0x67d3a7a2e3121f46 | |
4063 | .xword 0xd6b98c8543eacf56 | |
4064 | .xword 0x99f632d54f35cbb8 | |
4065 | .xword 0x07ff5d291376a8d6 | |
4066 | .xword 0xc1b18725a4dec049 | |
4067 | .xword 0xb1a36f1a4ad206de | |
4068 | .xword 0x52dbbd3d50532f0c | |
4069 | .xword 0x5cc061e56db32466 | |
4070 | .xword 0x9cd650c7333b5d4e | |
4071 | .xword 0xee804e0847936773 | |
4072 | .xword 0x74702e233c12ae3c | |
4073 | .xword 0xe2a3ce7902b61e93 | |
4074 | .xword 0x5e0df1b4a75077e5 | |
4075 | .xword 0x5877a82f20eb16fe | |
4076 | .xword 0x30501ff14daf7561 | |
4077 | .xword 0xf78768da2d162515 | |
4078 | .xword 0x08403e2445eb6831 | |
4079 | .xword 0x6ae66ae0f6bfd897 | |
4080 | .xword 0xa1f8dc1bfc429645 | |
4081 | .xword 0x7e08bd67dcf84d7d | |
4082 | .xword 0x47bcc62e21458fa3 | |
4083 | .xword 0xf4fe6b079a13346b | |
4084 | .xword 0x3df95b1b636eb13b | |
4085 | .xword 0x7afc80bdaa79ed32 | |
4086 | .xword 0xb8d46dbfab821965 | |
4087 | .xword 0xeb43b77adcd86ccc | |
4088 | .xword 0x300013e8ca8fed8f | |
4089 | .xword 0x6acb060497999974 | |
4090 | .xword 0x1616e14edf01b6b2 | |
4091 | .xword 0xcb6907d4fa356fb6 | |
4092 | .xword 0xc9f88c35ff0b26af | |
4093 | .xword 0x810531d5703a6873 | |
4094 | .xword 0x5513f7d5969c0f5c | |
4095 | .xword 0x56771f7787f632e2 | |
4096 | .xword 0x42e058aa46ebd628 | |
4097 | .xword 0x5767f593b7e31a10 | |
4098 | .xword 0x1cdd0b40a57b8856 | |
4099 | .xword 0xed08751694c50791 | |
4100 | .xword 0x8ab712fbb44ef7cd | |
4101 | .xword 0xf5a3fecc9a670d8f | |
4102 | .xword 0x9551f3a3ecf2bbee | |
4103 | .xword 0x7429c202e333fd1b | |
4104 | .xword 0xbcd0f31a984a1b6b | |
4105 | .xword 0x39fdea6b95948d8b | |
4106 | .xword 0x12687b955aa54910 | |
4107 | .xword 0xe9faea3072598623 | |
4108 | .xword 0x949895a1f13037ce | |
4109 | .xword 0x9b20029518ea8106 | |
4110 | .xword 0xc23c5c775f31ab24 | |
4111 | .xword 0xbf41606c0b638256 | |
4112 | .xword 0x6695fec448ea8fe1 | |
4113 | .xword 0x3120bea804818218 | |
4114 | .xword 0x5de16725f99c3d8f | |
4115 | .xword 0x68112c4a4d658102 | |
4116 | .xword 0xd1d9f8c6e64a1b98 | |
4117 | .xword 0xb613efa771ecba8b | |
4118 | .xword 0xd2aca7d33fc47d2c | |
4119 | .xword 0x09503a5af82c806c | |
4120 | .xword 0xe7651434e80b7429 | |
4121 | .xword 0x329ebd5aad2c85bf | |
4122 | .xword 0xdea6aac4b36c0ebe | |
4123 | .xword 0x615947d3e0dbbc49 | |
4124 | .xword 0x91b541c2c0a2be7d | |
4125 | .xword 0xce75c8452ad535c7 | |
4126 | .xword 0x27e79c7cb4b0e90f | |
4127 | .xword 0x2897e6c816e000af | |
4128 | .xword 0xf50d2d9ef66459ba | |
4129 | .xword 0x6d0a13a9d2191cba | |
4130 | .xword 0xb7a6f6ab4592ae4d | |
4131 | .xword 0x71a9be2a175a6c5c | |
4132 | .xword 0x9808472ed72378ee | |
4133 | .xword 0x95ac78a0209bbc99 | |
4134 | .xword 0xd0e6f907cafe4a09 | |
4135 | .xword 0x19cf3373e80aaa4d | |
4136 | .xword 0xfcbf2de060d68631 | |
4137 | .xword 0x5a3752a7b8aff180 | |
4138 | .xword 0x75105637f8199a52 | |
4139 | .xword 0x38827a10ce24b8dc | |
4140 | .xword 0xc855103a0810c1e8 | |
4141 | .xword 0xadc037b0ffddbc4e | |
4142 | .xword 0x848e55c64308f231 | |
4143 | .xword 0xe3bc12687001a9ce | |
4144 | .xword 0xf8fed625216f76a7 | |
4145 | .xword 0x6f58eda6b8d53250 | |
4146 | .xword 0x6160a29c885140dd | |
4147 | .xword 0x1da1b4341beb3f49 | |
4148 | .xword 0x9bca68cd9eef2bee | |
4149 | .xword 0xf4489dea6fef9b8d | |
4150 | .xword 0xe5eeec532fb58729 | |
4151 | .xword 0x5e5bcdf2af3876de | |
4152 | .xword 0x12cb1396ec0c0e1d | |
4153 | .xword 0x33de75cfbdc4d486 | |
4154 | .xword 0x7aa0681bb2c88ea2 | |
4155 | .xword 0x108f7fbe4f54d31d | |
4156 | .xword 0x8f3153ebcbb6eaa9 | |
4157 | .xword 0x092a9394fd5cf9bb | |
4158 | .xword 0x37afe3086c9b2389 | |
4159 | .xword 0xfe831a80feba5424 | |
4160 | .xword 0xf7284b46dc0a213f | |
4161 | .xword 0x00f44349fd0fac87 | |
4162 | .xword 0x02d21efa3a5ce796 | |
4163 | .xword 0x0d6c651869456d59 | |
4164 | .xword 0x8653dabb42a348c4 | |
4165 | .xword 0x2b1af50fa7034eb9 | |
4166 | .xword 0x01690081eff6e1c7 | |
4167 | .xword 0x6a19d4745fc61c48 | |
4168 | .xword 0x03cf60eaa83115b9 | |
4169 | .xword 0x3756500411de7b6f | |
4170 | .xword 0xef6a177856ac8e3f | |
4171 | .xword 0xe4a8647c32fe5547 | |
4172 | .xword 0x0725b051bdb24e06 | |
4173 | .xword 0xfcea0e2e9bd7b872 | |
4174 | .xword 0xed2d26036ad59944 | |
4175 | .xword 0x693dac9663d4182e | |
4176 | .xword 0x358d2e841a2a3455 | |
4177 | .xword 0xfedcedee9cf03e92 | |
4178 | .xword 0x56ecbad43e797bc1 | |
4179 | .xword 0x0178c45c8fdacfc5 | |
4180 | .xword 0x7482e731dfea2257 | |
4181 | .xword 0x3f27d08836bb4d11 | |
4182 | .xword 0xabd4bfb77bbb80b0 | |
4183 | .xword 0xc676c6fd8713e592 | |
4184 | .xword 0xf10ae3dfd66a6c13 | |
4185 | .xword 0xc48bfa77941a3771 | |
4186 | .xword 0x03830bcd91167a95 | |
4187 | .xword 0xa3cfa496d145b123 | |
4188 | .xword 0xa220b8c9373631fc | |
4189 | .xword 0x612c4725ec950a93 | |
4190 | .xword 0xa8b59e383d077d08 | |
4191 | .xword 0xd85d27f233814e15 | |
4192 | .xword 0x06d7dc5468d0e4dd | |
4193 | .xword 0xf9152d95d522dd8c | |
4194 | .xword 0x09c470a30497f0a4 | |
4195 | .xword 0xb7cc368c58e7b0ee | |
4196 | .xword 0xcdb3bace8f3e32ea | |
4197 | .xword 0xb7f04af2dbfee0e5 | |
4198 | .xword 0xd1453815a989116c | |
4199 | .xword 0x3a4ffca2381c9ab8 | |
4200 | .xword 0x2255b31440d233a2 | |
4201 | .xword 0x44aff8afa1d0ecd9 | |
4202 | .xword 0xa1b5303e44492857 | |
4203 | .xword 0x9126956ffe582afd | |
4204 | .xword 0xc27862c22faef0fe | |
4205 | .xword 0x66156eabe6e0394d | |
4206 | .xword 0xfd34216a0c97617f | |
4207 | .xword 0xcbfb6611487f1fb9 | |
4208 | .xword 0xbb6810408d58e4b9 | |
4209 | .xword 0x2f415bb12a181fd4 | |
4210 | .xword 0xd67dae2f92a14622 | |
4211 | .xword 0x3e02bb3c7c1eeba8 | |
4212 | .xword 0xaa5eb7ee798fb0be | |
4213 | .xword 0x67d29215a0fb6487 | |
4214 | .xword 0xf6cc12753a9d8447 | |
4215 | .xword 0xd0866cd32c54317b | |
4216 | .xword 0x5e57c6d37985b04f | |
4217 | .xword 0x64e10ef74eec6525 | |
4218 | .xword 0x18dc99580a07b9ae | |
4219 | .xword 0x4a0f5c9542dab1d2 | |
4220 | .xword 0xaf515cd041118be6 | |
4221 | .xword 0xa79ab51bd164bd8f | |
4222 | .xword 0x0a9f4d7b9d0a9ab8 | |
4223 | ||
4224 | .global wdog_2_ext | |
4225 | # 9 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
4226 | .global wdog_2_ext | |
4227 | ||
4228 | SECTION .HTRAPS | |
4229 | .text | |
4230 | htrap_5_ext: | |
4231 | rd %pc, %l2 | |
4232 | inc %l3 | |
4233 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 | |
4234 | rdpr %tl, %l3 | |
4235 | rdpr %tstate, %l4 | |
4236 | rdhpr %htstate, %l5 | |
4237 | or %l5, 0x4, %l5 | |
4238 | inc %l3 | |
4239 | wrpr %l3, %tl | |
4240 | wrpr %l2, %tpc | |
4241 | add %l2, 4, %l2 | |
4242 | wrpr %l2, %tnpc | |
4243 | wrpr %l4, %tstate | |
4244 | wrhpr %l5, %htstate | |
4245 | retry | |
4246 | htrap_5_ext_done: | |
4247 | done | |
4248 | ||
4249 | wdog_2_ext: | |
4250 | mov 0x1f, %l1 | |
4251 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
4252 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
4253 | ! If TT != 2, then goto trap handler | |
4254 | rdpr %tt, %l1 | |
4255 | cmp %l1, 0x2 | |
4256 | bne wdog_2_goto_handler | |
4257 | nop | |
4258 | ! else done | |
4259 | done | |
4260 | wdog_2_goto_handler: | |
4261 | rdhpr %htba, %l2 | |
4262 | sllx %l1, 5, %l1 | |
4263 | add %l1, %l2, %l2 | |
4264 | jmp %l2 | |
4265 | nop | |
4266 | # 51 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
4267 | ! Red mode other reset handler | |
4268 | ! Get htba, and tt and make trap address | |
4269 | ! Jump to trap handler .. | |
4270 | ||
4271 | SECTION .RED_SEC | |
4272 | .text | |
4273 | red_other_ext: | |
4274 | ! IF TL=6, shift stack by one .. | |
4275 | rdpr %tl, %l1 | |
4276 | cmp %l1, 6 | |
4277 | be start_tsa_shift | |
4278 | nop | |
4279 | ||
4280 | continue_red_other: | |
4281 | mov 0x1f, %l1 | |
4282 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
4283 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
4284 | ||
4285 | rdpr %tt, %l1 | |
4286 | sllx %l1, 5, %l1 | |
4287 | rdhpr %htba, %l2 | |
4288 | add %l1, %l2, %l2 | |
4289 | rdhpr %hpstate, %l1 | |
4290 | jmp %l2 | |
4291 | wrhpr %l1, 0x20, %hpstate | |
4292 | nop | |
4293 | ||
4294 | wdog_red_ext: | |
4295 | ! Shift stack down by 1 ... | |
4296 | rdpr %tl, %l1 | |
4297 | start_tsa_shift: | |
4298 | mov 0x2, %l2 | |
4299 | ||
4300 | tsa_shift: | |
4301 | wrpr %l2, %tl | |
4302 | rdpr %tt, %l3 | |
4303 | rdpr %tpc, %l4 | |
4304 | rdpr %tnpc, %l5 | |
4305 | rdpr %tstate, %l6 | |
4306 | rdhpr %htstate, %l7 | |
4307 | dec %l2 | |
4308 | wrpr %l2, %tl | |
4309 | wrpr %l3, %tt | |
4310 | wrpr %l4, %tpc | |
4311 | wrpr %l5, %tnpc | |
4312 | wrpr %l6, %tstate | |
4313 | wrhpr %l7, %htstate | |
4314 | add %l2, 2, %l2 | |
4315 | cmp %l2, %l1 | |
4316 | ble tsa_shift | |
4317 | nop | |
4318 | tsa_shift_done: | |
4319 | dec %l1 | |
4320 | wrpr %l1, %tl | |
4321 | ||
4322 | ! If TT != 2, then goto trap handler | |
4323 | rdpr %tt, %l1 | |
4324 | ||
4325 | cmp %l1, 0x2 | |
4326 | bne continue_red_other | |
4327 | nop | |
4328 | ! else done | |
4329 | mov 0x1f, %l1 | |
4330 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
4331 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
4332 | done | |
4333 | # 329 "diag.j" | |
4334 | ||
4335 | ||
4336 | ||
4337 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x000000000038c000 | |
4338 | attr_text { | |
4339 | Name = .MyHTRAPS_0, | |
4340 | RA = 0x0000000000380000, | |
4341 | PA = ra2pa(0x0000000000380000,0), | |
4342 | part_0_ctx_zero_tsb_config_0, | |
4343 | part_0_ctx_nonzero_tsb_config_0, | |
4344 | TTE_G = 1, | |
4345 | TTE_Context = 0, | |
4346 | TTE_V = 1, | |
4347 | TTE_Size = 0, | |
4348 | TTE_NFO = 0, | |
4349 | TTE_IE = 0, | |
4350 | TTE_Soft2 = 0, | |
4351 | TTE_Diag = 0, | |
4352 | TTE_Soft = 0, | |
4353 | TTE_L = 0, | |
4354 | TTE_CP = 1, | |
4355 | TTE_CV = 0, | |
4356 | TTE_E = 0, | |
4357 | TTE_P = 1, | |
4358 | TTE_W = 0, | |
4359 | TTE_X = 1 | |
4360 | } | |
4361 | ||
4362 | ||
4363 | attr_data { | |
4364 | Name = .MyHTRAPS_0, | |
4365 | RA = 0x000000000038c000, | |
4366 | PA = ra2pa(0x000000000038c000,0), | |
4367 | part_0_ctx_zero_tsb_config_0, | |
4368 | part_0_ctx_nonzero_tsb_config_0, | |
4369 | TTE_G = 1, | |
4370 | TTE_Context = 0, | |
4371 | TTE_V = 1, | |
4372 | TTE_Size = 0, | |
4373 | TTE_NFO = 0, | |
4374 | TTE_IE = 0, | |
4375 | TTE_Soft2 = 0, | |
4376 | TTE_Diag = 0, | |
4377 | TTE_Soft = 0, | |
4378 | TTE_L = 0, | |
4379 | TTE_CP = 1, | |
4380 | TTE_CV = 0, | |
4381 | TTE_E = 0, | |
4382 | TTE_P = 1, | |
4383 | TTE_W = 0 | |
4384 | } | |
4385 | ||
4386 | ||
4387 | attr_text { | |
4388 | Name = .MyHTRAPS_0, | |
4389 | hypervisor | |
4390 | } | |
4391 | ||
4392 | ||
4393 | attr_data { | |
4394 | Name = .MyHTRAPS_0, | |
4395 | hypervisor | |
4396 | } | |
4397 | ||
4398 | #include "htraps.s" | |
4399 | #include "tlu_htraps_ext.s" | |
4400 | ||
4401 | ||
4402 | ||
4403 | SECTION .MyHTRAPS_1 TEXT_VA = 0x0000000000390000, DATA_VA = 0x000000000039c000 | |
4404 | attr_text { | |
4405 | Name = .MyHTRAPS_1, | |
4406 | RA = 0x0000000000390000, | |
4407 | PA = ra2pa(0x0000000000390000,0), | |
4408 | part_0_ctx_zero_tsb_config_0, | |
4409 | part_0_ctx_nonzero_tsb_config_0, | |
4410 | TTE_G = 1, | |
4411 | TTE_Context = 0, | |
4412 | TTE_V = 1, | |
4413 | TTE_Size = 0, | |
4414 | TTE_NFO = 0, | |
4415 | TTE_IE = 0, | |
4416 | TTE_Soft2 = 0, | |
4417 | TTE_Diag = 0, | |
4418 | TTE_Soft = 0, | |
4419 | TTE_L = 0, | |
4420 | TTE_CP = 1, | |
4421 | TTE_CV = 0, | |
4422 | TTE_E = 0, | |
4423 | TTE_P = 1, | |
4424 | TTE_W = 0, | |
4425 | TTE_X = 1 | |
4426 | } | |
4427 | ||
4428 | ||
4429 | attr_data { | |
4430 | Name = .MyHTRAPS_1, | |
4431 | RA = 0x000000000039c000, | |
4432 | PA = ra2pa(0x000000000039c000,0), | |
4433 | part_0_ctx_zero_tsb_config_0, | |
4434 | part_0_ctx_nonzero_tsb_config_0, | |
4435 | TTE_G = 1, | |
4436 | TTE_Context = 0, | |
4437 | TTE_V = 1, | |
4438 | TTE_Size = 0, | |
4439 | TTE_NFO = 0, | |
4440 | TTE_IE = 0, | |
4441 | TTE_Soft2 = 0, | |
4442 | TTE_Diag = 0, | |
4443 | TTE_Soft = 0, | |
4444 | TTE_L = 0, | |
4445 | TTE_CP = 1, | |
4446 | TTE_CV = 0, | |
4447 | TTE_E = 0, | |
4448 | TTE_P = 1, | |
4449 | TTE_W = 0 | |
4450 | } | |
4451 | ||
4452 | ||
4453 | attr_text { | |
4454 | Name = .MyHTRAPS_1, | |
4455 | hypervisor | |
4456 | } | |
4457 | ||
4458 | ||
4459 | attr_data { | |
4460 | Name = .MyHTRAPS_1, | |
4461 | hypervisor | |
4462 | } | |
4463 | ||
4464 | #include "htraps.s" | |
4465 | #include "tlu_htraps_ext.s" | |
4466 | ||
4467 | ||
4468 | ||
4469 | SECTION .MyHTRAPS_2 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003ac000 | |
4470 | attr_text { | |
4471 | Name = .MyHTRAPS_2, | |
4472 | RA = 0x00000000003a0000, | |
4473 | PA = ra2pa(0x00000000003a0000,0), | |
4474 | part_0_ctx_zero_tsb_config_0, | |
4475 | part_0_ctx_nonzero_tsb_config_0, | |
4476 | TTE_G = 1, | |
4477 | TTE_Context = 0, | |
4478 | TTE_V = 1, | |
4479 | TTE_Size = 0, | |
4480 | TTE_NFO = 0, | |
4481 | TTE_IE = 0, | |
4482 | TTE_Soft2 = 0, | |
4483 | TTE_Diag = 0, | |
4484 | TTE_Soft = 0, | |
4485 | TTE_L = 0, | |
4486 | TTE_CP = 1, | |
4487 | TTE_CV = 0, | |
4488 | TTE_E = 0, | |
4489 | TTE_P = 1, | |
4490 | TTE_W = 0, | |
4491 | TTE_X = 1 | |
4492 | } | |
4493 | ||
4494 | ||
4495 | attr_data { | |
4496 | Name = .MyHTRAPS_2, | |
4497 | RA = 0x00000000003ac000, | |
4498 | PA = ra2pa(0x00000000003ac000,0), | |
4499 | part_0_ctx_zero_tsb_config_0, | |
4500 | part_0_ctx_nonzero_tsb_config_0, | |
4501 | TTE_G = 1, | |
4502 | TTE_Context = 0, | |
4503 | TTE_V = 1, | |
4504 | TTE_Size = 0, | |
4505 | TTE_NFO = 0, | |
4506 | TTE_IE = 0, | |
4507 | TTE_Soft2 = 0, | |
4508 | TTE_Diag = 0, | |
4509 | TTE_Soft = 0, | |
4510 | TTE_L = 0, | |
4511 | TTE_CP = 1, | |
4512 | TTE_CV = 0, | |
4513 | TTE_E = 0, | |
4514 | TTE_P = 1, | |
4515 | TTE_W = 0 | |
4516 | } | |
4517 | ||
4518 | ||
4519 | attr_text { | |
4520 | Name = .MyHTRAPS_2, | |
4521 | hypervisor | |
4522 | } | |
4523 | ||
4524 | ||
4525 | attr_data { | |
4526 | Name = .MyHTRAPS_2, | |
4527 | hypervisor | |
4528 | } | |
4529 | ||
4530 | #include "htraps.s" | |
4531 | #include "tlu_htraps_ext.s" | |
4532 | ||
4533 | ||
4534 | ||
4535 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000000003b0000, DATA_VA = 0x00000000003bc000 | |
4536 | attr_text { | |
4537 | Name = .MyHTRAPS_3, | |
4538 | RA = 0x00000000003b0000, | |
4539 | PA = ra2pa(0x00000000003b0000,0), | |
4540 | part_0_ctx_zero_tsb_config_0, | |
4541 | part_0_ctx_nonzero_tsb_config_0, | |
4542 | TTE_G = 1, | |
4543 | TTE_Context = 0, | |
4544 | TTE_V = 1, | |
4545 | TTE_Size = 0, | |
4546 | TTE_NFO = 0, | |
4547 | TTE_IE = 0, | |
4548 | TTE_Soft2 = 0, | |
4549 | TTE_Diag = 0, | |
4550 | TTE_Soft = 0, | |
4551 | TTE_L = 0, | |
4552 | TTE_CP = 1, | |
4553 | TTE_CV = 0, | |
4554 | TTE_E = 0, | |
4555 | TTE_P = 1, | |
4556 | TTE_W = 0, | |
4557 | TTE_X = 1 | |
4558 | } | |
4559 | ||
4560 | ||
4561 | attr_data { | |
4562 | Name = .MyHTRAPS_3, | |
4563 | RA = 0x00000000003bc000, | |
4564 | PA = ra2pa(0x00000000003bc000,0), | |
4565 | part_0_ctx_zero_tsb_config_0, | |
4566 | part_0_ctx_nonzero_tsb_config_0, | |
4567 | TTE_G = 1, | |
4568 | TTE_Context = 0, | |
4569 | TTE_V = 1, | |
4570 | TTE_Size = 0, | |
4571 | TTE_NFO = 0, | |
4572 | TTE_IE = 0, | |
4573 | TTE_Soft2 = 0, | |
4574 | TTE_Diag = 0, | |
4575 | TTE_Soft = 0, | |
4576 | TTE_L = 0, | |
4577 | TTE_CP = 1, | |
4578 | TTE_CV = 0, | |
4579 | TTE_E = 0, | |
4580 | TTE_P = 1, | |
4581 | TTE_W = 0 | |
4582 | } | |
4583 | ||
4584 | ||
4585 | attr_text { | |
4586 | Name = .MyHTRAPS_3, | |
4587 | hypervisor | |
4588 | } | |
4589 | ||
4590 | ||
4591 | attr_data { | |
4592 | Name = .MyHTRAPS_3, | |
4593 | hypervisor | |
4594 | } | |
4595 | ||
4596 | #include "htraps.s" | |
4597 | #include "tlu_htraps_ext.s" | |
4598 | ||
4599 | ||
4600 | ||
4601 | ||
4602 | ||
4603 | SECTION .MyTRAPS_0 TEXT_VA = 0x00000000003c0000, DATA_VA = 0x00000000003cc000 | |
4604 | attr_text { | |
4605 | Name = .MyTRAPS_0, | |
4606 | RA = 0x00000000003c0000, | |
4607 | PA = ra2pa(0x00000000003c0000,0), | |
4608 | part_0_ctx_zero_tsb_config_0, | |
4609 | part_0_ctx_nonzero_tsb_config_0, | |
4610 | TTE_G = 1, | |
4611 | TTE_Context = 0, | |
4612 | TTE_V = 1, | |
4613 | TTE_Size = 0, | |
4614 | TTE_NFO = 0, | |
4615 | TTE_IE = 0, | |
4616 | TTE_Soft2 = 0, | |
4617 | TTE_Diag = 0, | |
4618 | TTE_Soft = 0, | |
4619 | TTE_L = 0, | |
4620 | TTE_CP = 1, | |
4621 | TTE_CV = 0, | |
4622 | TTE_E = 0, | |
4623 | TTE_P = 1, | |
4624 | TTE_W = 0, | |
4625 | TTE_X = 1 | |
4626 | } | |
4627 | ||
4628 | ||
4629 | attr_data { | |
4630 | Name = .MyTRAPS_0, | |
4631 | RA = 0x00000000003cc000, | |
4632 | PA = ra2pa(0x00000000003cc000,0), | |
4633 | part_0_ctx_zero_tsb_config_0, | |
4634 | part_0_ctx_nonzero_tsb_config_0, | |
4635 | TTE_G = 1, | |
4636 | TTE_Context = 0, | |
4637 | TTE_V = 1, | |
4638 | TTE_Size = 0, | |
4639 | TTE_NFO = 0, | |
4640 | TTE_IE = 0, | |
4641 | TTE_Soft2 = 0, | |
4642 | TTE_Diag = 0, | |
4643 | TTE_Soft = 0, | |
4644 | TTE_L = 0, | |
4645 | TTE_CP = 1, | |
4646 | TTE_CV = 0, | |
4647 | TTE_E = 0, | |
4648 | TTE_P = 1, | |
4649 | TTE_W = 0 | |
4650 | } | |
4651 | ||
4652 | ||
4653 | attr_text { | |
4654 | Name = .MyTRAPS_0, | |
4655 | hypervisor | |
4656 | } | |
4657 | ||
4658 | ||
4659 | attr_data { | |
4660 | Name = .MyTRAPS_0, | |
4661 | hypervisor | |
4662 | } | |
4663 | ||
4664 | #include "traps.s" | |
4665 | ||
4666 | ||
4667 | ||
4668 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003d0000, DATA_VA = 0x00000000003dc000 | |
4669 | attr_text { | |
4670 | Name = .MyTRAPS_1, | |
4671 | RA = 0x00000000003d0000, | |
4672 | PA = ra2pa(0x00000000003d0000,0), | |
4673 | part_0_ctx_zero_tsb_config_0, | |
4674 | part_0_ctx_nonzero_tsb_config_0, | |
4675 | TTE_G = 1, | |
4676 | TTE_Context = 0, | |
4677 | TTE_V = 1, | |
4678 | TTE_Size = 0, | |
4679 | TTE_NFO = 0, | |
4680 | TTE_IE = 0, | |
4681 | TTE_Soft2 = 0, | |
4682 | TTE_Diag = 0, | |
4683 | TTE_Soft = 0, | |
4684 | TTE_L = 0, | |
4685 | TTE_CP = 1, | |
4686 | TTE_CV = 0, | |
4687 | TTE_E = 0, | |
4688 | TTE_P = 1, | |
4689 | TTE_W = 0, | |
4690 | TTE_X = 1 | |
4691 | } | |
4692 | ||
4693 | ||
4694 | attr_data { | |
4695 | Name = .MyTRAPS_1, | |
4696 | RA = 0x00000000003dc000, | |
4697 | PA = ra2pa(0x00000000003dc000,0), | |
4698 | part_0_ctx_zero_tsb_config_0, | |
4699 | part_0_ctx_nonzero_tsb_config_0, | |
4700 | TTE_G = 1, | |
4701 | TTE_Context = 0, | |
4702 | TTE_V = 1, | |
4703 | TTE_Size = 0, | |
4704 | TTE_NFO = 0, | |
4705 | TTE_IE = 0, | |
4706 | TTE_Soft2 = 0, | |
4707 | TTE_Diag = 0, | |
4708 | TTE_Soft = 0, | |
4709 | TTE_L = 0, | |
4710 | TTE_CP = 1, | |
4711 | TTE_CV = 0, | |
4712 | TTE_E = 0, | |
4713 | TTE_P = 1, | |
4714 | TTE_W = 0 | |
4715 | } | |
4716 | ||
4717 | ||
4718 | attr_text { | |
4719 | Name = .MyTRAPS_1, | |
4720 | hypervisor | |
4721 | } | |
4722 | ||
4723 | ||
4724 | attr_data { | |
4725 | Name = .MyTRAPS_1, | |
4726 | hypervisor | |
4727 | } | |
4728 | ||
4729 | #include "traps.s" | |
4730 | ||
4731 | ||
4732 | ||
4733 | SECTION .MyTRAPS_2 TEXT_VA = 0x00000000003e0000, DATA_VA = 0x00000000003ec000 | |
4734 | attr_text { | |
4735 | Name = .MyTRAPS_2, | |
4736 | RA = 0x00000000003e0000, | |
4737 | PA = ra2pa(0x00000000003e0000,0), | |
4738 | part_0_ctx_zero_tsb_config_0, | |
4739 | part_0_ctx_nonzero_tsb_config_0, | |
4740 | TTE_G = 1, | |
4741 | TTE_Context = 0, | |
4742 | TTE_V = 1, | |
4743 | TTE_Size = 0, | |
4744 | TTE_NFO = 0, | |
4745 | TTE_IE = 0, | |
4746 | TTE_Soft2 = 0, | |
4747 | TTE_Diag = 0, | |
4748 | TTE_Soft = 0, | |
4749 | TTE_L = 0, | |
4750 | TTE_CP = 1, | |
4751 | TTE_CV = 0, | |
4752 | TTE_E = 0, | |
4753 | TTE_P = 1, | |
4754 | TTE_W = 0, | |
4755 | TTE_X = 1 | |
4756 | } | |
4757 | ||
4758 | ||
4759 | attr_data { | |
4760 | Name = .MyTRAPS_2, | |
4761 | RA = 0x00000000003ec000, | |
4762 | PA = ra2pa(0x00000000003ec000,0), | |
4763 | part_0_ctx_zero_tsb_config_0, | |
4764 | part_0_ctx_nonzero_tsb_config_0, | |
4765 | TTE_G = 1, | |
4766 | TTE_Context = 0, | |
4767 | TTE_V = 1, | |
4768 | TTE_Size = 0, | |
4769 | TTE_NFO = 0, | |
4770 | TTE_IE = 0, | |
4771 | TTE_Soft2 = 0, | |
4772 | TTE_Diag = 0, | |
4773 | TTE_Soft = 0, | |
4774 | TTE_L = 0, | |
4775 | TTE_CP = 1, | |
4776 | TTE_CV = 0, | |
4777 | TTE_E = 0, | |
4778 | TTE_P = 1, | |
4779 | TTE_W = 0 | |
4780 | } | |
4781 | ||
4782 | ||
4783 | attr_text { | |
4784 | Name = .MyTRAPS_2, | |
4785 | hypervisor | |
4786 | } | |
4787 | ||
4788 | ||
4789 | attr_data { | |
4790 | Name = .MyTRAPS_2, | |
4791 | hypervisor | |
4792 | } | |
4793 | ||
4794 | #include "traps.s" | |
4795 | ||
4796 | ||
4797 | ||
4798 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000000003f0000, DATA_VA = 0x00000000003fc000 | |
4799 | attr_text { | |
4800 | Name = .MyTRAPS_3, | |
4801 | RA = 0x00000000003f0000, | |
4802 | PA = ra2pa(0x00000000003f0000,0), | |
4803 | part_0_ctx_zero_tsb_config_0, | |
4804 | part_0_ctx_nonzero_tsb_config_0, | |
4805 | TTE_G = 1, | |
4806 | TTE_Context = 0, | |
4807 | TTE_V = 1, | |
4808 | TTE_Size = 0, | |
4809 | TTE_NFO = 0, | |
4810 | TTE_IE = 0, | |
4811 | TTE_Soft2 = 0, | |
4812 | TTE_Diag = 0, | |
4813 | TTE_Soft = 0, | |
4814 | TTE_L = 0, | |
4815 | TTE_CP = 1, | |
4816 | TTE_CV = 0, | |
4817 | TTE_E = 0, | |
4818 | TTE_P = 1, | |
4819 | TTE_W = 0, | |
4820 | TTE_X = 1 | |
4821 | } | |
4822 | ||
4823 | ||
4824 | attr_data { | |
4825 | Name = .MyTRAPS_3, | |
4826 | RA = 0x00000000003fc000, | |
4827 | PA = ra2pa(0x00000000003fc000,0), | |
4828 | part_0_ctx_zero_tsb_config_0, | |
4829 | part_0_ctx_nonzero_tsb_config_0, | |
4830 | TTE_G = 1, | |
4831 | TTE_Context = 0, | |
4832 | TTE_V = 1, | |
4833 | TTE_Size = 0, | |
4834 | TTE_NFO = 0, | |
4835 | TTE_IE = 0, | |
4836 | TTE_Soft2 = 0, | |
4837 | TTE_Diag = 0, | |
4838 | TTE_Soft = 0, | |
4839 | TTE_L = 0, | |
4840 | TTE_CP = 1, | |
4841 | TTE_CV = 0, | |
4842 | TTE_E = 0, | |
4843 | TTE_P = 1, | |
4844 | TTE_W = 0 | |
4845 | } | |
4846 | ||
4847 | ||
4848 | attr_text { | |
4849 | Name = .MyTRAPS_3, | |
4850 | hypervisor | |
4851 | } | |
4852 | ||
4853 | ||
4854 | attr_data { | |
4855 | Name = .MyTRAPS_3, | |
4856 | hypervisor | |
4857 | } | |
4858 | ||
4859 | #include "traps.s" | |
4860 | ||
4861 | ||
4862 | ||
4863 | #if 0 | |
4864 | #endif | |
4865 |