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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: tlu_rand05_ind_08.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define TRAP_SECT_HV_ALSO | |
39 | #define DMMU_SKIP_IF_NO_TTE | |
40 | #define IMMU_SKIP_IF_NO_TTE | |
41 | ||
42 | #define MAIN_PAGE_NUCLEUS_ALSO | |
43 | #define MAIN_PAGE_HV_ALSO | |
44 | #define MAIN_PAGE_VA_IS_RA_ALSO | |
45 | #define DISABLE_PART_LIMIT_CHECK | |
46 | # 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
47 | !!!!!!!!!!!!!!!!!!!!!!!!! | |
48 | !! Disable trap checking | |
49 | #define NO_TRAPCHECK | |
50 | ||
51 | ! Enable Traps | |
52 | #define ENABLE_T1_Privileged_Opcode_0x11 | |
53 | #define ENABLE_T1_Fp_Disabled_0x20 | |
54 | #define ENABLE_HT0_Watchdog_Reset_0x02 | |
55 | ||
56 | #define FILL_TRAP_RETRY | |
57 | #define SPILL_TRAP_RETRY | |
58 | #define CLEAN_WIN_RETRY | |
59 | ||
60 | #define My_RED_Mode_Other_Reset | |
61 | #define My_RED_Mode_Other_Reset \ | |
62 | ba red_other_ext;\ | |
63 | nop;retry;nop;nop;nop;nop;nop | |
64 | # 24 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
65 | #define H_T1_Clean_Window_0x24 | |
66 | #define SUN_H_T1_Clean_Window_0x24 \ | |
67 | rdpr %cleanwin, %l1;\ | |
68 | add %l1,1,%l1;\ | |
69 | wrpr %l1, %g0, %cleanwin;\ | |
70 | retry; nop; nop; nop; nop | |
71 | ||
72 | #define H_T1_Clean_Window_0x25 | |
73 | #define SUN_H_T1_Clean_Window_0x25 \ | |
74 | rdpr %cleanwin, %l1;\ | |
75 | add %l1,1,%l1;\ | |
76 | wrpr %l1, %g0, %cleanwin;\ | |
77 | retry; nop; nop; nop; nop | |
78 | ||
79 | #define H_T1_Clean_Window_0x26 | |
80 | #define SUN_H_T1_Clean_Window_0x26 \ | |
81 | rdpr %cleanwin, %l1;\ | |
82 | add %l1,1,%l1;\ | |
83 | wrpr %l1, %g0, %cleanwin;\ | |
84 | retry; nop; nop; nop; nop | |
85 | ||
86 | #define H_T1_Clean_Window_0x27 | |
87 | #define SUN_H_T1_Clean_Window_0x27 \ | |
88 | rdpr %cleanwin, %l1;\ | |
89 | add %l1,1,%l1;\ | |
90 | wrpr %l1, %g0, %cleanwin;\ | |
91 | retry; nop; nop; nop; nop | |
92 | # 53 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
93 | #define H_HT0_Tag_Overflow | |
94 | #define My_HT0_Tag_Overflow \ | |
95 | done;nop; | |
96 | ||
97 | #define H_T0_Tag_Overflow | |
98 | #define My_T0_Tag_Overflow \ | |
99 | done;nop; | |
100 | ||
101 | #define H_T1_Tag_Overflow_0x23 | |
102 | #define SUN_H_T1_Tag_Overflow_0x23 \ | |
103 | done;nop; | |
104 | ||
105 | #define H_T0_Window_Spill_0_Normal_Trap | |
106 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
107 | ||
108 | #define H_T0_Window_Spill_1_Normal_Trap | |
109 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
110 | ||
111 | #define H_T0_Window_Spill_2_Normal_Trap | |
112 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
113 | ||
114 | #define H_T0_Window_Spill_3_Normal_Trap | |
115 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
116 | ||
117 | #define H_T0_Window_Spill_4_Normal_Trap | |
118 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
119 | ||
120 | #define H_T0_Window_Spill_5_Normal_Trap | |
121 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
122 | ||
123 | #define H_T0_Window_Spill_6_Normal_Trap | |
124 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
125 | ||
126 | #define H_T0_Window_Spill_7_Normal_Trap | |
127 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
128 | ||
129 | #define H_T0_Window_Spill_0_Other_Trap | |
130 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
131 | ||
132 | #define H_T0_Window_Spill_1_Other_Trap | |
133 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
134 | ||
135 | #define H_T0_Window_Spill_2_Other_Trap | |
136 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
137 | ||
138 | #define H_T0_Window_Spill_3_Other_Trap | |
139 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
140 | ||
141 | #define H_T0_Window_Spill_4_Other_Trap | |
142 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
143 | ||
144 | #define H_T0_Window_Spill_5_Other_Trap | |
145 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
146 | ||
147 | #define H_T0_Window_Spill_6_Other_Trap | |
148 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
149 | ||
150 | #define H_T0_Window_Spill_7_Other_Trap | |
151 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
152 | ||
153 | #define H_T0_Window_Fill_0_Normal_Trap | |
154 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
155 | ||
156 | #define H_T0_Window_Fill_1_Normal_Trap | |
157 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
158 | ||
159 | #define H_T0_Window_Fill_2_Normal_Trap | |
160 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
161 | ||
162 | #define H_T0_Window_Fill_3_Normal_Trap | |
163 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
164 | ||
165 | #define H_T0_Window_Fill_4_Normal_Trap | |
166 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
167 | ||
168 | #define H_T0_Window_Fill_5_Normal_Trap | |
169 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
170 | ||
171 | #define H_T0_Window_Fill_6_Normal_Trap | |
172 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
173 | ||
174 | #define H_T0_Window_Fill_7_Normal_Trap | |
175 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
176 | ||
177 | #define H_T0_Window_Fill_0_Other_Trap | |
178 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
179 | ||
180 | #define H_T0_Window_Fill_1_Other_Trap | |
181 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
182 | ||
183 | #define H_T0_Window_Fill_2_Other_Trap | |
184 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
185 | ||
186 | #define H_T0_Window_Fill_3_Other_Trap | |
187 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
188 | ||
189 | #define H_T0_Window_Fill_4_Other_Trap | |
190 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
191 | ||
192 | #define H_T0_Window_Fill_5_Other_Trap | |
193 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
194 | ||
195 | #define H_T0_Window_Fill_6_Other_Trap | |
196 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
197 | ||
198 | #define H_T0_Window_Fill_7_Other_Trap | |
199 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
200 | # 162 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
201 | #define H_T1_Window_Spill_0_Normal_Trap | |
202 | #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
203 | ||
204 | #define H_T1_Window_Spill_1_Normal_Trap | |
205 | #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
206 | ||
207 | #define H_T1_Window_Spill_2_Normal_Trap | |
208 | #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
209 | ||
210 | #define H_T1_Window_Spill_3_Normal_Trap | |
211 | #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
212 | ||
213 | #define H_T1_Window_Spill_4_Normal_Trap | |
214 | #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
215 | ||
216 | #define H_T1_Window_Spill_5_Normal_Trap | |
217 | #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
218 | ||
219 | #define H_T1_Window_Spill_6_Normal_Trap | |
220 | #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
221 | ||
222 | #define H_T1_Window_Spill_7_Normal_Trap | |
223 | #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
224 | ||
225 | #define H_T1_Window_Spill_0_Other_Trap | |
226 | #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
227 | ||
228 | #define H_T1_Window_Spill_1_Other_Trap | |
229 | #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
230 | ||
231 | #define H_T1_Window_Spill_2_Other_Trap | |
232 | #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
233 | ||
234 | #define H_T1_Window_Spill_3_Other_Trap | |
235 | #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
236 | ||
237 | #define H_T1_Window_Spill_4_Other_Trap | |
238 | #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
239 | ||
240 | #define H_T1_Window_Spill_5_Other_Trap | |
241 | #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
242 | ||
243 | #define H_T1_Window_Spill_6_Other_Trap | |
244 | #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
245 | ||
246 | #define H_T1_Window_Spill_7_Other_Trap | |
247 | #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
248 | ||
249 | #define H_T1_Window_Fill_0_Normal_Trap | |
250 | #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
251 | ||
252 | #define H_T1_Window_Fill_1_Normal_Trap | |
253 | #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
254 | ||
255 | #define H_T1_Window_Fill_2_Normal_Trap | |
256 | #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
257 | ||
258 | #define H_T1_Window_Fill_3_Normal_Trap | |
259 | #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
260 | ||
261 | #define H_T1_Window_Fill_4_Normal_Trap | |
262 | #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
263 | ||
264 | #define H_T1_Window_Fill_5_Normal_Trap | |
265 | #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
266 | ||
267 | #define H_T1_Window_Fill_6_Normal_Trap | |
268 | #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
269 | ||
270 | #define H_T1_Window_Fill_7_Normal_Trap | |
271 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
272 | ||
273 | #define H_T1_Window_Fill_0_Other_Trap | |
274 | #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
275 | ||
276 | #define H_T1_Window_Fill_1_Other_Trap | |
277 | #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
278 | ||
279 | #define H_T1_Window_Fill_2_Other_Trap | |
280 | #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
281 | ||
282 | #define H_T1_Window_Fill_3_Other_Trap | |
283 | #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
284 | ||
285 | #define H_T1_Window_Fill_4_Other_Trap | |
286 | #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
287 | ||
288 | #define H_T1_Window_Fill_5_Other_Trap | |
289 | #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
290 | ||
291 | #define H_T1_Window_Fill_6_Other_Trap | |
292 | #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
293 | ||
294 | #define H_T1_Window_Fill_7_Other_Trap | |
295 | #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
296 | ||
297 | #define H_T0_Trap_Instruction_0 | |
298 | #define My_T0_Trap_Instruction_0 \ | |
299 | save %i7, %g0, %i7; \ | |
300 | rdpr %tnpc, %l2; \ | |
301 | wrpr %l2, %tpc; \ | |
302 | add %l2, 4, %l2;\ | |
303 | wrpr %l2, %tnpc; \ | |
304 | stw %l2, [%i7];\ | |
305 | restore %i7, %g0, %i7; \ | |
306 | retry | |
307 | #define H_T0_Trap_Instruction_1 | |
308 | #define My_T0_Trap_Instruction_1 \ | |
309 | umul %o4, 2, %o5;\ | |
310 | rdpr %tnpc, %l2; \ | |
311 | wrpr %l2, %tpc; \ | |
312 | add %l2, 4, %l2;\ | |
313 | wrpr %l2, %tnpc; \ | |
314 | stw %l2, [%i7];\ | |
315 | illtrap;\ | |
316 | retry | |
317 | #define H_T0_Trap_Instruction_2 | |
318 | #define My_T0_Trap_Instruction_2 \ | |
319 | inc %o3;\ | |
320 | umul %o3, 2, %o4;\ | |
321 | ba 1f; \ | |
322 | save %i7, %g0, %i7; \ | |
323 | 2: done; \ | |
324 | nop; \ | |
325 | 1: ba 2b; \ | |
326 | restore %i7, %g0, %i7 | |
327 | #define H_T0_Trap_Instruction_3 | |
328 | #define My_T0_Trap_Instruction_3 \ | |
329 | inc %l3;\ | |
330 | inc %o3;\ | |
331 | umul %o3, 2, %o4;\ | |
332 | stw %o4, [%i7];\ | |
333 | save %i7, %g0, %i7 ;\ | |
334 | restore %i7, %g0, %i7 ;\ | |
335 | done ;\ | |
336 | nop; | |
337 | #define H_T0_Trap_Instruction_4 | |
338 | #define My_T0_Trap_Instruction_4 \ | |
339 | umul %i4, 2, %l5;\ | |
340 | inc %o1;\ | |
341 | rdpr %tnpc, %l2; \ | |
342 | wrpr %l2, %tpc; \ | |
343 | add %l2, 4, %l2;\ | |
344 | wrpr %l2, %tnpc; \ | |
345 | retry ;\ | |
346 | illtrap | |
347 | #define H_T0_Trap_Instruction_5 | |
348 | #define My_T0_Trap_Instruction_5 \ | |
349 | umul %i7, 2, %l1;\ | |
350 | inc %o5;\ | |
351 | rdpr %tnpc, %l2; \ | |
352 | wrpr %l2, %tpc; \ | |
353 | add %l2, 4, %l2;\ | |
354 | wrpr %l2, %tnpc; \ | |
355 | sdiv %r2, %r10, %r0; \ | |
356 | retry | |
357 | ||
358 | #define H_T1_Trap_Instruction_0 | |
359 | #define My_T1_Trap_Instruction_0 \ | |
360 | inc %o4;\ | |
361 | umul %o4, 2, %o5;\ | |
362 | ba 3f; \ | |
363 | save %i7, %g0, %i7; \ | |
364 | 4: done; \ | |
365 | nop; \ | |
366 | 3: ba 4b; \ | |
367 | restore %i7, %g0, %i7 | |
368 | #define H_T1_Trap_Instruction_1 | |
369 | #define My_T1_Trap_Instruction_1 \ | |
370 | umul %o4, 2, %o5;\ | |
371 | rdpr %tnpc, %l2; \ | |
372 | wrpr %l2, %tpc; \ | |
373 | add %l2, 4, %l2;\ | |
374 | stw %l2, [%i7];\ | |
375 | wrpr %l2, %tnpc; \ | |
376 | restore %i7, %g0, %i7 ;;\ | |
377 | retry | |
378 | #define H_T1_Trap_Instruction_2 | |
379 | #define My_T1_Trap_Instruction_2 \ | |
380 | inc %o3;\ | |
381 | umul %o3, 2, %o4;\ | |
382 | ba 5f; \ | |
383 | save %i7, %g0, %i7; \ | |
384 | 6: done; \ | |
385 | nop; \ | |
386 | 5: ba 6b; \ | |
387 | restore %i7, %g0, %i7 | |
388 | #define H_T1_Trap_Instruction_3 | |
389 | #define My_T1_Trap_Instruction_3 \ | |
390 | inc %l3;\ | |
391 | inc %o3;\ | |
392 | umul %o3, 2, %o4;\ | |
393 | inc %i3;\ | |
394 | save %i7, %g0, %i7 ;\ | |
395 | restore %i7, %g0, %i7 ;\ | |
396 | done ;\ | |
397 | nop; | |
398 | #define H_T1_Trap_Instruction_4 | |
399 | #define My_T1_Trap_Instruction_4 \ | |
400 | umul %i4, 2, %l5;\ | |
401 | rdpr %tnpc, %l2; \ | |
402 | wrpr %l2, %tpc; \ | |
403 | stw %l2, [%i7];\ | |
404 | add %l2, 4, %l2;\ | |
405 | wrpr %l2, %tnpc; \ | |
406 | retry ;\ | |
407 | illtrap | |
408 | #define H_T1_Trap_Instruction_5 | |
409 | #define My_T1_Trap_Instruction_5 \ | |
410 | umul %i7, 2, %l1;\ | |
411 | inc %o5;\ | |
412 | rdpr %tnpc, %l2; \ | |
413 | wrpr %l2, %tpc; \ | |
414 | add %l2, 4, %l2;\ | |
415 | wrpr %l2, %tnpc; \ | |
416 | sdiv %r2, %r10, %r0; \ | |
417 | retry | |
418 | ||
419 | #define H_HT0_Trap_Instruction_0 | |
420 | #define My_HT0_Trap_Instruction_0 \ | |
421 | rd %asi, %l2;\ | |
422 | mov 0x80, %l3;\ | |
423 | stxa %l3, [%l3] 0x57;\ | |
424 | stw %l2, [%i7];\ | |
425 | done;\ | |
426 | nop;nop;nop | |
427 | ||
428 | #define H_HT0_Trap_Instruction_1 | |
429 | #define My_HT0_Trap_Instruction_1 \ | |
430 | rd %asi, %l2;\ | |
431 | mov 0x80, %l3;\ | |
432 | stxa %l3, [%l3] 0x5f;\ | |
433 | done;\ | |
434 | nop;nop;nop;nop | |
435 | #define H_HT0_Trap_Instruction_2 | |
436 | #define My_HT0_Trap_Instruction_2 \ | |
437 | umul %i6, 2, %l4;\ | |
438 | stw %l4, [%i7];\ | |
439 | rdpr %tnpc, %l2; \ | |
440 | wrpr %l2, %tpc; \ | |
441 | add %l2, 4, %l2;\ | |
442 | wrpr %l2, %tnpc; \ | |
443 | sdiv %r2, %r0, %r0; \ | |
444 | retry | |
445 | #define H_HT0_Trap_Instruction_3 | |
446 | #define My_HT0_Trap_Instruction_3 \ | |
447 | umul %i5, 3, %l3;\ | |
448 | inc %o6;\ | |
449 | illtrap ;\ | |
450 | rdpr %tnpc, %l2; \ | |
451 | wrpr %l2, %tpc; \ | |
452 | add %l2, 4, %l2;\ | |
453 | wrpr %l2, %tnpc; \ | |
454 | retry | |
455 | #define H_HT0_Trap_Instruction_4 | |
456 | #define My_HT0_Trap_Instruction_4 \ | |
457 | save %i7, %g0, %i7; \ | |
458 | rdpr %tnpc, %l2; \ | |
459 | wrpr %l2, %tpc; \ | |
460 | add %l2, 4, %l2;\ | |
461 | stw %l2, [%i7];\ | |
462 | wrpr %l2, %tnpc; \ | |
463 | restore %i7, %g0, %i7 ;\ | |
464 | retry | |
465 | #define H_HT0_Trap_Instruction_5 | |
466 | #define My_HT0_Trap_Instruction_5 \ | |
467 | ba htrap_5_ext;\ | |
468 | nop; retry;\ | |
469 | nop; nop; nop; nop; nop | |
470 | ||
471 | #define H_HT0_Mem_Address_Not_Aligned_0x34 | |
472 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ | |
473 | inc %l6;\ | |
474 | save %i7, %g0, %i7 ;\ | |
475 | done ;\ | |
476 | nop; | |
477 | #define H_HT0_Illegal_instruction_0x10 | |
478 | #define My_HT0_Illegal_instruction_0x10 \ | |
479 | restore %i7, %g0, %i7 ;\ | |
480 | ba 7f; \ | |
481 | rdhpr %htstate, %l3;\ | |
482 | 8: done; \ | |
483 | 7: ba 8b;\ | |
484 | wrhpr %l3, 1, %htstate;nop | |
485 | ||
486 | #define H_HT0_DAE_so_page_0x30 | |
487 | #define My_HT0_DAE_so_page_0x30 \ | |
488 | restore %i7, %g0, %i7;\ | |
489 | rd %fprs, %l2; \ | |
490 | wr %l2, 0x4, %fprs ;\ | |
491 | done; \ | |
492 | nop; | |
493 | #define H_HT0_DAE_invalid_asi_0x14 | |
494 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ | |
495 | save %i7, %g0, %i7; \ | |
496 | rd %fprs, %l2; \ | |
497 | wr %l2, 0x4, %fprs ;\ | |
498 | done; \ | |
499 | nop; | |
500 | #define H_HT0_DAE_privilege_violation_0x15 | |
501 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ | |
502 | save %i7, %g0, %i7; \ | |
503 | rd %fprs, %l2; \ | |
504 | wr %l2, 0x4, %fprs ;\ | |
505 | done; \ | |
506 | nop; | |
507 | #define H_HT0_Privileged_Action_0x37 | |
508 | #define My_HT0_Privileged_Action_0x37 \ | |
509 | restore %i7, %g0, %i7;\ | |
510 | done; \ | |
511 | nop; nop | |
512 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
513 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ | |
514 | rdpr %tpc, %l2; \ | |
515 | add %l2, 0x4, %l2; \ | |
516 | wrpr %l2, %tpc; \ | |
517 | add %l2, 0x4, %l2; \ | |
518 | wrpr %l2, %tnpc; \ | |
519 | retry | |
520 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
521 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ | |
522 | rdpr %tpc, %l2; \ | |
523 | add %l2, 0x4, %l2; \ | |
524 | wrpr %l2, %tpc; \ | |
525 | add %l2, 0x4, %l2; \ | |
526 | wrpr %l2, %tnpc; \ | |
527 | retry | |
528 | #define H_HT0_Fp_exception_other_0x22 | |
529 | #define My_HT0_Fp_exception_other_0x22 \ | |
530 | umul %i5, 4, %l2;\ | |
531 | save %i7, %g0, %i7; \ | |
532 | stw %l2, [%i7];\ | |
533 | done; \ | |
534 | nop | |
535 | #define H_HT0_Division_By_Zero | |
536 | #define My_HT0_Division_By_Zero \ | |
537 | umul %i5, 4, %l2;\ | |
538 | done; \ | |
539 | nop; nop | |
540 | #define H_T0_Division_By_Zero | |
541 | #define My_T0_Division_By_Zero \ | |
542 | inc %l6;\ | |
543 | dec %l5;\ | |
544 | umul %i5, 4, %l2;\ | |
545 | done; \ | |
546 | nop; nop | |
547 | #define H_T1_Division_By_Zero_0x28 | |
548 | #define My_H_T1_Division_By_Zero_0x28 \ | |
549 | inc %l6;\ | |
550 | dec %l5;\ | |
551 | umul %i5, 4, %l2;\ | |
552 | save %i7, %g0, %i7; \ | |
553 | restore %i7, %g0, %i7;\ | |
554 | done; \ | |
555 | nop; nop | |
556 | ||
557 | #define H_T0_Division_By_Zero | |
558 | #define My_T0_Division_By_Zero\ | |
559 | inc %l6;\ | |
560 | dec %l5;\ | |
561 | umul %i5, 4, %l2;\ | |
562 | save %i7, %g0, %i7; \ | |
563 | restore %i7, %g0, %i7;\ | |
564 | done; \ | |
565 | nop; nop | |
566 | ||
567 | #define H_T1_Fp_Exception_Other_0x22 | |
568 | #define My_H_T1_Fp_Exception_Other_0x22 \ | |
569 | inc %l6;\ | |
570 | dec %l5;\ | |
571 | umul %i5, 4, %l2;\ | |
572 | save %i7, %g0, %i7; \ | |
573 | restore %i7, %g0, %i7;\ | |
574 | done; \ | |
575 | nop; nop | |
576 | #define H_T1_Privileged_Opcode_0x11 | |
577 | #define SUN_H_T1_Privileged_Opcode_0x11 \ | |
578 | stw %l5, [%i7];\ | |
579 | umul %i5, 4, %l2;\ | |
580 | restore %i7, %g0, %i7;\ | |
581 | done; \ | |
582 | nop; | |
583 | ||
584 | #define H_HT0_Privileged_opcode_0x11 | |
585 | #define My_HT0_Privileged_opcode_0x11 \ | |
586 | xor %i0, %l1, %l1;\ | |
587 | and %l1, 0xf, %l1; \ | |
588 | ba hh11_1; \ | |
589 | not %g0, %l2; \ | |
590 | hh11_2: done; \ | |
591 | hh11_1: xor %l1, %l2, %l2; \ | |
592 | ba hh11_2; \ | |
593 | jmp %l2; | |
594 | ||
595 | #define H_HT0_Fp_disabled_0x20 | |
596 | #define My_HT0_Fp_disabled_0x20 \ | |
597 | mov 0x4, %l2 ;\ | |
598 | wr %l2, 0x0, %fprs ;\ | |
599 | sllx %l2, 10, %l3; \ | |
600 | rdpr %tstate, %l2;\ | |
601 | or %l2, %l3, %l2 ;\ | |
602 | stw %l2, [%i7];\ | |
603 | wrpr %l2, 0x0, %tstate;\ | |
604 | retry; | |
605 | ||
606 | #define H_T0_Fp_disabled_0x20 | |
607 | #define My_T0_Fp_disabled_0x20 \ | |
608 | mov 0x4, %l2 ;\ | |
609 | wr %l2, 0x0, %fprs ;\ | |
610 | sllx %l2, 10, %l3; \ | |
611 | rdpr %tstate, %l2;\ | |
612 | or %l2, %l3, %l2 ;\ | |
613 | wrpr %l2, 0x0, %tstate;\ | |
614 | retry; nop | |
615 | ||
616 | #define H_T1_Fp_Disabled_0x20 | |
617 | #define My_H_T1_Fp_Disabled_0x20 \ | |
618 | mov 0x4, %l2 ;\ | |
619 | wr %l2, 0x0, %fprs ;\ | |
620 | sllx %l2, 10, %l3; \ | |
621 | rdpr %tstate, %l2;\ | |
622 | or %l2, %l3, %l2 ;\ | |
623 | wrpr %l2, 0x0, %tstate;\ | |
624 | stw %l2, [%i7];\ | |
625 | retry | |
626 | ||
627 | #define H_HT0_Watchdog_Reset_0x02 | |
628 | #define My_HT0_Watchdog_Reset_0x02 \ | |
629 | ba wdog_2_ext;\ | |
630 | nop;retry;nop;nop;nop;nop;nop | |
631 | ||
632 | #define H_T0_Privileged_opcode_0x11 | |
633 | #define My_T0_Privileged_opcode_0x11 \ | |
634 | ba h11_1; \ | |
635 | not %g0, %l2; \ | |
636 | h11_2: done; \ | |
637 | h11_1: xor %l1, %l2, %l2; \ | |
638 | ba h11_2; \ | |
639 | jmp %l2; | |
640 | ||
641 | #define H_T1_Fp_exception_other_0x22 | |
642 | #define My_T1_Fp_exception_other_0x22 \ | |
643 | restore %i7, %g0, %i7 ; \ | |
644 | save %i7, %g0, %i7; \ | |
645 | restore %i7, %g0, %i7;\ | |
646 | ldx [%l2], %l2;\ | |
647 | done; | |
648 | ||
649 | #define H_T0_Fp_exception_other_0x22 | |
650 | #define My_T0_Fp_exception_other_0x22 \ | |
651 | inc %l6;\ | |
652 | dec %l5;\ | |
653 | umul %i5, 4, %l2;\ | |
654 | save %i7, %g0, %i7; \ | |
655 | restore %i7, %g0, %i7;\ | |
656 | stw %l2, [%i7];\ | |
657 | done; \ | |
658 | nop | |
659 | ||
660 | #define H_HT0_Trap_Level_Zero_0x5f | |
661 | #define My_HT0_Trap_Level_Zero_0x5f \ | |
662 | not %g0, %r13; \ | |
663 | rdhpr %hpstate, %l3;\ | |
664 | jmp %r13;\ | |
665 | rdhpr %htstate, %l3;\ | |
666 | and %l3, 0xfe, %l3;\ | |
667 | wrhpr %l3, 0, %htstate;\ | |
668 | stw %r13, [%i7];\ | |
669 | retry | |
670 | ||
671 | #define My_Watchdog_Reset | |
672 | #define My_Watchdog_Reset \ | |
673 | ba wdog_red_ext;\ | |
674 | nop;retry;nop;nop;nop;nop;nop | |
675 | ||
676 | #define H_HT0_Control_Transfer_Instr_0x74 | |
677 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ | |
678 | rdpr %tstate, %l3;\ | |
679 | and %l3, 0xfff, %l3;\ | |
680 | wrpr %l3, %tstate ;\ | |
681 | retry;nop; | |
682 | ||
683 | #define H_T0_Control_Transfer_Instr_0x74 | |
684 | #define My_H_T0_Control_Transfer_Instr_0x74 \ | |
685 | rdpr %tstate, %l3;\ | |
686 | and %l3, 0xfff, %l3;\ | |
687 | wrpr %l3, %tstate ;\ | |
688 | retry;nop; | |
689 | ||
690 | #define H_T1_Control_Transfer_Instr_0x74 | |
691 | #define My_H_T1_Control_Transfer_Instr_0x74 \ | |
692 | rdpr %tstate, %l3;\ | |
693 | and %l3, 0xfff, %l3;\ | |
694 | wrpr %l3, %tstate ;\ | |
695 | retry;nop; | |
696 | ||
697 | #define H_HT0_IAE_privilege_violation_0x08 | |
698 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
699 | done; nop; | |
700 | #define H_HT0_IAE_unauth_access_0x0b | |
701 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
702 | done; nop; | |
703 | ||
704 | #define H_HT0_data_access_protection_0x6c | |
705 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop | |
706 | ||
707 | #define H_HT0_PA_Watchpoint_0x61 | |
708 | #define My_H_HT0_PA_Watchpoint_0x61 \ | |
709 | done;nop | |
710 | ||
711 | #define H_T0_VA_Watchpoint_0x62 | |
712 | #define My_T0_VA_Watchpoint_0x62 \ | |
713 | done; nop | |
714 | ||
715 | #define H_HT0_Instruction_VA_Watchpoint_0x75 | |
716 | #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ | |
717 | done;nop | |
718 | ||
719 | #define H_HT0_Instruction_Breakpoint_0x76 | |
720 | #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ | |
721 | done;nop | |
722 | # 685 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
723 | #define H_HT0_Instruction_address_range_0x0d | |
724 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
725 | done;nop | |
726 | ||
727 | #define H_HT0_mem_address_range_0x2e | |
728 | #define SUN_H_HT0_mem_address_range_0x2e \ | |
729 | done;nop | |
730 | ||
731 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
732 | # 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
733 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
734 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! | |
735 | ||
736 | #define H_HT0_Externally_Initiated_Reset_0x03 | |
737 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ | |
738 | setx External_Reset_Handler, %g1, %g2; \ | |
739 | jmp %g2; \ | |
740 | nop | |
741 | ||
742 | !!!!! HW interrupt handlers | |
743 | ||
744 | #define H_HT0_Interrupt_0x60 | |
745 | #define My_HT0_Interrupt_0x60 \ | |
746 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g1 ;\ | |
747 | ldxa [%g0] ASI_SWVR_INTR_R, %g2 ;\ | |
748 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ | |
749 | cmp %g1, %g3 ;\ | |
750 | te %xcc, T_BAD_TRAP ;\ | |
751 | nop; \ | |
752 | retry; | |
753 | ||
754 | !!!!! Queue interrupt handler | |
755 | # 36 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
756 | #define H_T0_Cpu_Mondo_Trap_0x7c | |
757 | #define My_T0_Cpu_Mondo_Trap_0x7c \ | |
758 | mov 0x3c8, %g3; \ | |
759 | ldxa [%g3] 0x25, %g5; \ | |
760 | mov 0x3c0, %g3; \ | |
761 | stxa %g5, [%g3] 0x25; \ | |
762 | retry; \ | |
763 | nop; \ | |
764 | nop; \ | |
765 | nop | |
766 | ||
767 | #define H_T0_Dev_Mondo_Trap_0x7d | |
768 | #define My_T0_Dev_Mondo_Trap_0x7d \ | |
769 | mov 0x3d8, %g3; \ | |
770 | ldxa [%g3] 0x25, %g5; \ | |
771 | mov 0x3d0, %g3; \ | |
772 | stxa %g5, [%g3] 0x25; \ | |
773 | retry; \ | |
774 | nop; \ | |
775 | nop; \ | |
776 | nop | |
777 | ||
778 | #define H_T0_Resumable_Error_0x7e | |
779 | #define My_T0_Resumable_Error_0x7e \ | |
780 | mov 0x3e8, %g3; \ | |
781 | ldxa [%g3] 0x25, %g5; \ | |
782 | mov 0x3e0, %g3; \ | |
783 | stxa %g5, [%g3] 0x25; \ | |
784 | retry; \ | |
785 | nop; \ | |
786 | nop; \ | |
787 | nop | |
788 | ||
789 | #define H_T1_Cpu_Mondo_Trap_0x7c | |
790 | #define My_T1_Cpu_Mondo_Trap_0x7c \ | |
791 | mov 0x3c8, %g3; \ | |
792 | ldxa [%g3] 0x25, %g5; \ | |
793 | mov 0x3c0, %g3; \ | |
794 | stxa %g5, [%g3] 0x25; \ | |
795 | retry; \ | |
796 | nop; \ | |
797 | nop; \ | |
798 | nop | |
799 | ||
800 | #define H_T1_Dev_Mondo_Trap_0x7d | |
801 | #define My_T1_Dev_Mondo_Trap_0x7d \ | |
802 | mov 0x3d8, %g3; \ | |
803 | ldxa [%g3] 0x25, %g5; \ | |
804 | mov 0x3d0, %g3; \ | |
805 | stxa %g5, [%g3] 0x25; \ | |
806 | retry; \ | |
807 | nop; \ | |
808 | nop; \ | |
809 | nop | |
810 | ||
811 | #define H_T1_Resumable_Error_0x7e | |
812 | #define My_T1_Resumable_Error_0x7e \ | |
813 | mov 0x3e8, %g3; \ | |
814 | ldxa [%g3] 0x25, %g5; \ | |
815 | mov 0x3e0, %g3; \ | |
816 | stxa %g5, [%g3] 0x25; \ | |
817 | retry; \ | |
818 | nop; \ | |
819 | nop; \ | |
820 | nop | |
821 | ||
822 | #define H_HT0_Reserved_0x7c | |
823 | #define SUN_H_HT0_Reserved_0x7c \ | |
824 | mov 0x3c8, %g3; \ | |
825 | ldxa [%g3] 0x25, %g5; \ | |
826 | mov 0x3c0, %g3; \ | |
827 | stxa %g5, [%g3] 0x25; \ | |
828 | retry; \ | |
829 | nop; \ | |
830 | nop; \ | |
831 | nop | |
832 | ||
833 | #define H_HT0_Reserved_0x7d | |
834 | #define SUN_H_HT0_Reserved_0x7d \ | |
835 | mov 0x3d8, %g3; \ | |
836 | ldxa [%g3] 0x25, %g5; \ | |
837 | mov 0x3d0, %g3; \ | |
838 | stxa %g5, [%g3] 0x25; \ | |
839 | retry; \ | |
840 | nop; \ | |
841 | nop; \ | |
842 | nop | |
843 | ||
844 | #define H_HT0_Reserved_0x7e | |
845 | #define SUN_H_HT0_Reserved_0x7e \ | |
846 | mov 0x3e8, %g3; \ | |
847 | ldxa [%g3] 0x25, %g5; \ | |
848 | mov 0x3e0, %g3; \ | |
849 | stxa %g5, [%g3] 0x25; \ | |
850 | retry; \ | |
851 | nop; \ | |
852 | nop; \ | |
853 | nop | |
854 | # 136 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
855 | !!!!! Hstick-match trap handler | |
856 | # 139 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
857 | #define H_T0_Reserved_0x5e | |
858 | #define My_T0_Reserved_0x5e \ | |
859 | rdhpr %hintp, %g3; \ | |
860 | wrhpr %g3, %g3, %hintp; \ | |
861 | retry; \ | |
862 | nop; \ | |
863 | nop; \ | |
864 | nop; \ | |
865 | nop; \ | |
866 | nop | |
867 | ||
868 | #define H_HT0_Hstick_Match_0x5e | |
869 | #define My_HT0_Hstick_Match_0x5e \ | |
870 | rdhpr %hintp, %g3; \ | |
871 | wrhpr %g3, %g3, %hintp; \ | |
872 | retry; \ | |
873 | nop; \ | |
874 | nop; \ | |
875 | nop; \ | |
876 | nop; \ | |
877 | nop | |
878 | ||
879 | #define H_T0_Reserved_0x5e | |
880 | #define My_T0_Reserved_0x5e \ | |
881 | rdhpr %hintp, %g3; \ | |
882 | wrhpr %g3, %g3, %hintp; \ | |
883 | retry; \ | |
884 | nop; \ | |
885 | nop; \ | |
886 | nop; \ | |
887 | nop; \ | |
888 | nop | |
889 | ||
890 | #define H_T1_Reserved_0x5e | |
891 | #define My_T1_Reserved_0x5e \ | |
892 | rdhpr %hintp, %g3; \ | |
893 | wrhpr %g3, %g3, %hintp; \ | |
894 | retry; \ | |
895 | nop; \ | |
896 | nop; \ | |
897 | nop; \ | |
898 | nop; \ | |
899 | nop | |
900 | # 184 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
901 | !!!!! SW interuupt handlers | |
902 | # 187 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
903 | #define H_T0_Interrupt_Level_14_0x4e | |
904 | #define My_T0_Interrupt_Level_14_0x4e \ | |
905 | rd %softint, %g3; \ | |
906 | sethi %hi(0x14000), %g3; \ | |
907 | or %g3, 0x1, %g3; \ | |
908 | wr %g3, %g0, %clear_softint; \ | |
909 | retry; \ | |
910 | nop; \ | |
911 | nop; \ | |
912 | nop | |
913 | ||
914 | #define H_T0_Interrupt_Level_1_0x41 | |
915 | #define My_T0_Interrupt_Level_1_0x41 \ | |
916 | rd %softint, %g3; \ | |
917 | or %g0, 0x2, %g3; \ | |
918 | wr %g3, %g0, %clear_softint; \ | |
919 | retry; \ | |
920 | nop; \ | |
921 | nop; \ | |
922 | nop; \ | |
923 | nop | |
924 | ||
925 | #define H_T0_Interrupt_Level_2_0x42 | |
926 | #define My_T0_Interrupt_Level_2_0x42 \ | |
927 | rd %softint, %g3; \ | |
928 | or %g0, 0x4, %g3; \ | |
929 | wr %g3, %g0, %clear_softint; \ | |
930 | retry; \ | |
931 | nop; \ | |
932 | nop; \ | |
933 | nop; \ | |
934 | nop | |
935 | ||
936 | #define H_T0_Interrupt_Level_3_0x43 | |
937 | #define My_T0_Interrupt_Level_3_0x43 \ | |
938 | rd %softint, %g3; \ | |
939 | or %g0, 0x8, %g3; \ | |
940 | wr %g3, %g0, %clear_softint; \ | |
941 | retry; \ | |
942 | nop; \ | |
943 | nop; \ | |
944 | nop; \ | |
945 | nop | |
946 | ||
947 | #define H_T0_Interrupt_Level_4_0x44 | |
948 | #define My_T0_Interrupt_Level_4_0x44 \ | |
949 | rd %softint, %g3; \ | |
950 | or %g0, 0x10, %g3; \ | |
951 | wr %g3, %g0, %clear_softint; \ | |
952 | retry; \ | |
953 | nop; \ | |
954 | nop; \ | |
955 | nop; \ | |
956 | nop | |
957 | ||
958 | #define H_T0_Interrupt_Level_5_0x45 | |
959 | #define My_T0_Interrupt_Level_5_0x45 \ | |
960 | rd %softint, %g3; \ | |
961 | or %g0, 0x20, %g3; \ | |
962 | wr %g3, %g0, %clear_softint; \ | |
963 | retry; \ | |
964 | nop; \ | |
965 | nop; \ | |
966 | nop; \ | |
967 | nop | |
968 | ||
969 | #define H_T0_Interrupt_Level_6_0x46 | |
970 | #define My_T0_Interrupt_Level_6_0x46 \ | |
971 | rd %softint, %g3; \ | |
972 | or %g0, 0x40, %g3; \ | |
973 | wr %g3, %g0, %clear_softint; \ | |
974 | retry; \ | |
975 | nop; \ | |
976 | nop; \ | |
977 | nop; \ | |
978 | nop | |
979 | ||
980 | #define H_T0_Interrupt_Level_7_0x47 | |
981 | #define My_T0_Interrupt_Level_7_0x47 \ | |
982 | rd %softint, %g3; \ | |
983 | or %g0, 0x80, %g3; \ | |
984 | wr %g3, %g0, %clear_softint; \ | |
985 | retry; \ | |
986 | nop; \ | |
987 | nop; \ | |
988 | nop; \ | |
989 | nop | |
990 | ||
991 | #define H_T0_Interrupt_Level_8_0x48 | |
992 | #define My_T0_Interrupt_Level_8_0x48 \ | |
993 | rd %softint, %g3; \ | |
994 | or %g0, 0x100, %g3; \ | |
995 | wr %g3, %g0, %clear_softint; \ | |
996 | retry; \ | |
997 | nop; \ | |
998 | nop; \ | |
999 | nop; \ | |
1000 | nop | |
1001 | ||
1002 | #define H_T0_Interrupt_Level_9_0x49 | |
1003 | #define My_T0_Interrupt_Level_9_0x49 \ | |
1004 | rd %softint, %g3; \ | |
1005 | or %g0, 0x200, %g3; \ | |
1006 | wr %g3, %g0, %clear_softint; \ | |
1007 | retry; \ | |
1008 | nop; \ | |
1009 | nop; \ | |
1010 | nop; \ | |
1011 | nop | |
1012 | ||
1013 | #define H_T0_Interrupt_Level_10_0x4a | |
1014 | #define My_T0_Interrupt_Level_10_0x4a \ | |
1015 | rd %softint, %g3; \ | |
1016 | or %g0, 0x400, %g3; \ | |
1017 | wr %g3, %g0, %clear_softint; \ | |
1018 | retry; \ | |
1019 | nop; \ | |
1020 | nop; \ | |
1021 | nop; \ | |
1022 | nop | |
1023 | ||
1024 | #define H_T0_Interrupt_Level_11_0x4b | |
1025 | #define My_T0_Interrupt_Level_11_0x4b \ | |
1026 | rd %softint, %g3; \ | |
1027 | or %g0, 0x800, %g3; \ | |
1028 | wr %g3, %g0, %clear_softint; \ | |
1029 | retry; \ | |
1030 | nop; \ | |
1031 | nop; \ | |
1032 | nop; \ | |
1033 | nop | |
1034 | ||
1035 | #define H_T0_Interrupt_Level_12_0x4c | |
1036 | #define My_T0_Interrupt_Level_12_0x4c \ | |
1037 | rd %softint, %g3; \ | |
1038 | sethi %hi(0x1000), %g3; \ | |
1039 | wr %g3, %g0, %clear_softint; \ | |
1040 | retry; \ | |
1041 | nop; \ | |
1042 | nop; \ | |
1043 | nop; \ | |
1044 | nop | |
1045 | ||
1046 | #define H_T0_Interrupt_Level_13_0x4d | |
1047 | #define My_T0_Interrupt_Level_13_0x4d \ | |
1048 | rd %softint, %g3; \ | |
1049 | sethi %hi(0x2000), %g3; \ | |
1050 | wr %g3, %g0, %clear_softint; \ | |
1051 | retry; \ | |
1052 | nop; \ | |
1053 | nop; \ | |
1054 | nop; \ | |
1055 | nop | |
1056 | ||
1057 | #define H_T0_Interrupt_Level_15_0x4f | |
1058 | #define My_T0_Interrupt_Level_15_0x4f \ | |
1059 | sethi %hi(0x8000), %g3; \ | |
1060 | wr %g3, %g0, %clear_softint; \ | |
1061 | wr %g0, %g0, %pic;\ | |
1062 | sethi %hi(0x80040000), %g2;\ | |
1063 | rd %pcr, %g3;\ | |
1064 | andn %g3, %g2, %g3;\ | |
1065 | wr %g3, %g0, %pcr;\ | |
1066 | retry; | |
1067 | ||
1068 | #define H_T1_Interrupt_Level_14_0x4e | |
1069 | #define My_T1_Interrupt_Level_14_0x4e \ | |
1070 | rd %softint, %g3; \ | |
1071 | sethi %hi(0x14000), %g3; \ | |
1072 | or %g3, 0x1, %g3; \ | |
1073 | wr %g3, %g0, %clear_softint; \ | |
1074 | retry; \ | |
1075 | nop; \ | |
1076 | nop; \ | |
1077 | nop | |
1078 | ||
1079 | #define H_T1_Interrupt_Level_1_0x41 | |
1080 | #define My_T1_Interrupt_Level_1_0x41 \ | |
1081 | rd %softint, %g3; \ | |
1082 | or %g0, 0x2, %g3; \ | |
1083 | wr %g3, %g0, %clear_softint; \ | |
1084 | retry; \ | |
1085 | nop; \ | |
1086 | nop; \ | |
1087 | nop; \ | |
1088 | nop | |
1089 | ||
1090 | #define H_T1_Interrupt_Level_2_0x42 | |
1091 | #define My_T1_Interrupt_Level_2_0x42 \ | |
1092 | rd %softint, %g3; \ | |
1093 | or %g0, 0x4, %g3; \ | |
1094 | wr %g3, %g0, %clear_softint; \ | |
1095 | retry; \ | |
1096 | nop; \ | |
1097 | nop; \ | |
1098 | nop; \ | |
1099 | nop | |
1100 | ||
1101 | #define H_T1_Interrupt_Level_3_0x43 | |
1102 | #define My_T1_Interrupt_Level_3_0x43 \ | |
1103 | rd %softint, %g3; \ | |
1104 | or %g0, 0x8, %g3; \ | |
1105 | wr %g3, %g0, %clear_softint; \ | |
1106 | retry; \ | |
1107 | nop; \ | |
1108 | nop; \ | |
1109 | nop; \ | |
1110 | nop | |
1111 | ||
1112 | #define H_T1_Interrupt_Level_4_0x44 | |
1113 | #define My_T1_Interrupt_Level_4_0x44 \ | |
1114 | rd %softint, %g3; \ | |
1115 | or %g0, 0x10, %g3; \ | |
1116 | wr %g3, %g0, %clear_softint; \ | |
1117 | retry; \ | |
1118 | nop; \ | |
1119 | nop; \ | |
1120 | nop; \ | |
1121 | nop | |
1122 | ||
1123 | #define H_T1_Interrupt_Level_5_0x45 | |
1124 | #define My_T1_Interrupt_Level_5_0x45 \ | |
1125 | rd %softint, %g3; \ | |
1126 | or %g0, 0x20, %g3; \ | |
1127 | wr %g3, %g0, %clear_softint; \ | |
1128 | retry; \ | |
1129 | nop; \ | |
1130 | nop; \ | |
1131 | nop; \ | |
1132 | nop | |
1133 | ||
1134 | #define H_T1_Interrupt_Level_6_0x46 | |
1135 | #define My_T1_Interrupt_Level_6_0x46 \ | |
1136 | rd %softint, %g3; \ | |
1137 | or %g0, 0x40, %g3; \ | |
1138 | wr %g3, %g0, %clear_softint; \ | |
1139 | retry; \ | |
1140 | nop; \ | |
1141 | nop; \ | |
1142 | nop; \ | |
1143 | nop | |
1144 | ||
1145 | #define H_T1_Interrupt_Level_7_0x47 | |
1146 | #define My_T1_Interrupt_Level_7_0x47 \ | |
1147 | rd %softint, %g3; \ | |
1148 | or %g0, 0x80, %g3; \ | |
1149 | wr %g3, %g0, %clear_softint; \ | |
1150 | retry; \ | |
1151 | nop; \ | |
1152 | nop; \ | |
1153 | nop; \ | |
1154 | nop | |
1155 | ||
1156 | #define H_T1_Interrupt_Level_8_0x48 | |
1157 | #define My_T1_Interrupt_Level_8_0x48 \ | |
1158 | rd %softint, %g3; \ | |
1159 | or %g0, 0x100, %g3; \ | |
1160 | wr %g3, %g0, %clear_softint; \ | |
1161 | retry; \ | |
1162 | nop; \ | |
1163 | nop; \ | |
1164 | nop; \ | |
1165 | nop | |
1166 | ||
1167 | #define H_T1_Interrupt_Level_9_0x49 | |
1168 | #define My_T1_Interrupt_Level_9_0x49 \ | |
1169 | rd %softint, %g3; \ | |
1170 | or %g0, 0x200, %g3; \ | |
1171 | wr %g3, %g0, %clear_softint; \ | |
1172 | retry; \ | |
1173 | nop; \ | |
1174 | nop; \ | |
1175 | nop; \ | |
1176 | nop | |
1177 | ||
1178 | #define H_T1_Interrupt_Level_10_0x4a | |
1179 | #define My_T1_Interrupt_Level_10_0x4a \ | |
1180 | rd %softint, %g3; \ | |
1181 | or %g0, 0x400, %g3; \ | |
1182 | wr %g3, %g0, %clear_softint; \ | |
1183 | retry; \ | |
1184 | nop; \ | |
1185 | nop; \ | |
1186 | nop; \ | |
1187 | nop | |
1188 | ||
1189 | #define H_T1_Interrupt_Level_11_0x4b | |
1190 | #define My_T1_Interrupt_Level_11_0x4b \ | |
1191 | rd %softint, %g3; \ | |
1192 | or %g0, 0x800, %g3; \ | |
1193 | wr %g3, %g0, %clear_softint; \ | |
1194 | retry; \ | |
1195 | nop; \ | |
1196 | nop; \ | |
1197 | nop; \ | |
1198 | nop | |
1199 | ||
1200 | #define H_T1_Interrupt_Level_12_0x4c | |
1201 | #define My_T1_Interrupt_Level_12_0x4c \ | |
1202 | rd %softint, %g3; \ | |
1203 | sethi %hi(0x1000), %g3; \ | |
1204 | wr %g3, %g0, %clear_softint; \ | |
1205 | retry; \ | |
1206 | nop; \ | |
1207 | nop; \ | |
1208 | nop; \ | |
1209 | nop | |
1210 | ||
1211 | #define H_T1_Interrupt_Level_13_0x4d | |
1212 | #define My_T1_Interrupt_Level_13_0x4d \ | |
1213 | rd %softint, %g3; \ | |
1214 | sethi %hi(0x2000), %g3; \ | |
1215 | wr %g3, %g0, %clear_softint; \ | |
1216 | retry; \ | |
1217 | nop; \ | |
1218 | nop; \ | |
1219 | nop; \ | |
1220 | nop | |
1221 | ||
1222 | #define H_T1_Interrupt_Level_15_0x4f | |
1223 | #define My_T1_Interrupt_Level_15_0x4f \ | |
1224 | sethi %hi(0x8000), %g3; \ | |
1225 | wr %g3, %g0, %clear_softint; \ | |
1226 | wr %g0, %g0, %pic;\ | |
1227 | sethi %hi(0x80040000), %g2;\ | |
1228 | rd %pcr, %g3;\ | |
1229 | andn %g3, %g2, %g3;\ | |
1230 | wr %g3, %g0, %pcr;\ | |
1231 | retry; | |
1232 | ||
1233 | #define H_HT0_Interrupt_Level_14_0x4e | |
1234 | #define My_HT0_Interrupt_Level_14_0x4e \ | |
1235 | rd %softint, %g3; \ | |
1236 | sethi %hi(0x14000), %g3; \ | |
1237 | or %g3, 0x1, %g3; \ | |
1238 | wr %g3, %g0, %clear_softint; \ | |
1239 | retry; \ | |
1240 | nop; \ | |
1241 | nop; \ | |
1242 | nop | |
1243 | ||
1244 | #define H_HT0_Interrupt_Level_1_0x41 | |
1245 | #define My_HT0_Interrupt_Level_1_0x41 \ | |
1246 | rd %softint, %g3; \ | |
1247 | or %g0, 0x2, %g3; \ | |
1248 | wr %g3, %g0, %clear_softint; \ | |
1249 | retry; \ | |
1250 | nop; \ | |
1251 | nop; \ | |
1252 | nop; \ | |
1253 | nop | |
1254 | ||
1255 | #define H_HT0_Interrupt_Level_2_0x42 | |
1256 | #define My_HT0_Interrupt_Level_2_0x42 \ | |
1257 | rd %softint, %g3; \ | |
1258 | or %g0, 0x4, %g3; \ | |
1259 | wr %g3, %g0, %clear_softint; \ | |
1260 | retry; \ | |
1261 | nop; \ | |
1262 | nop; \ | |
1263 | nop; \ | |
1264 | nop | |
1265 | ||
1266 | #define H_HT0_Interrupt_Level_3_0x43 | |
1267 | #define My_HT0_Interrupt_Level_3_0x43 \ | |
1268 | rd %softint, %g3; \ | |
1269 | or %g0, 0x8, %g3; \ | |
1270 | wr %g3, %g0, %clear_softint; \ | |
1271 | retry; \ | |
1272 | nop; \ | |
1273 | nop; \ | |
1274 | nop; \ | |
1275 | nop | |
1276 | ||
1277 | #define H_HT0_Interrupt_Level_4_0x44 | |
1278 | #define My_HT0_Interrupt_Level_4_0x44 \ | |
1279 | rd %softint, %g3; \ | |
1280 | or %g0, 0x10, %g3; \ | |
1281 | wr %g3, %g0, %clear_softint; \ | |
1282 | retry; \ | |
1283 | nop; \ | |
1284 | nop; \ | |
1285 | nop; \ | |
1286 | nop | |
1287 | ||
1288 | #define H_HT0_Interrupt_Level_5_0x45 | |
1289 | #define My_HT0_Interrupt_Level_5_0x45 \ | |
1290 | rd %softint, %g3; \ | |
1291 | or %g0, 0x20, %g3; \ | |
1292 | wr %g3, %g0, %clear_softint; \ | |
1293 | retry; \ | |
1294 | nop; \ | |
1295 | nop; \ | |
1296 | nop; \ | |
1297 | nop | |
1298 | ||
1299 | #define H_HT0_Interrupt_Level_6_0x46 | |
1300 | #define My_HT0_Interrupt_Level_6_0x46 \ | |
1301 | rd %softint, %g3; \ | |
1302 | or %g0, 0x40, %g3; \ | |
1303 | wr %g3, %g0, %clear_softint; \ | |
1304 | retry; \ | |
1305 | nop; \ | |
1306 | nop; \ | |
1307 | nop; \ | |
1308 | nop | |
1309 | ||
1310 | #define H_HT0_Interrupt_Level_7_0x47 | |
1311 | #define My_HT0_Interrupt_Level_7_0x47 \ | |
1312 | rd %softint, %g3; \ | |
1313 | or %g0, 0x80, %g3; \ | |
1314 | wr %g3, %g0, %clear_softint; \ | |
1315 | retry; \ | |
1316 | nop; \ | |
1317 | nop; \ | |
1318 | nop; \ | |
1319 | nop | |
1320 | ||
1321 | #define H_HT0_Interrupt_Level_8_0x48 | |
1322 | #define My_HT0_Interrupt_Level_8_0x48 \ | |
1323 | rd %softint, %g3; \ | |
1324 | or %g0, 0x100, %g3; \ | |
1325 | wr %g3, %g0, %clear_softint; \ | |
1326 | retry; \ | |
1327 | nop; \ | |
1328 | nop; \ | |
1329 | nop; \ | |
1330 | nop | |
1331 | ||
1332 | #define H_HT0_Interrupt_Level_9_0x49 | |
1333 | #define My_HT0_Interrupt_Level_9_0x49 \ | |
1334 | rd %softint, %g3; \ | |
1335 | or %g0, 0x200, %g3; \ | |
1336 | wr %g3, %g0, %clear_softint; \ | |
1337 | retry; \ | |
1338 | nop; \ | |
1339 | nop; \ | |
1340 | nop; \ | |
1341 | nop | |
1342 | ||
1343 | #define H_HT0_Interrupt_Level_10_0x4a | |
1344 | #define My_HT0_Interrupt_Level_10_0x4a \ | |
1345 | rd %softint, %g3; \ | |
1346 | or %g0, 0x400, %g3; \ | |
1347 | wr %g3, %g0, %clear_softint; \ | |
1348 | retry; \ | |
1349 | nop; \ | |
1350 | nop; \ | |
1351 | nop; \ | |
1352 | nop | |
1353 | ||
1354 | #define H_HT0_Interrupt_Level_11_0x4b | |
1355 | #define My_HT0_Interrupt_Level_11_0x4b \ | |
1356 | rd %softint, %g3; \ | |
1357 | or %g0, 0x800, %g3; \ | |
1358 | wr %g3, %g0, %clear_softint; \ | |
1359 | retry; \ | |
1360 | nop; \ | |
1361 | nop; \ | |
1362 | nop; \ | |
1363 | nop | |
1364 | ||
1365 | #define H_HT0_Interrupt_Level_12_0x4c | |
1366 | #define My_HT0_Interrupt_Level_12_0x4c \ | |
1367 | rd %softint, %g3; \ | |
1368 | sethi %hi(0x1000), %g3; \ | |
1369 | wr %g3, %g0, %clear_softint; \ | |
1370 | retry; \ | |
1371 | nop; \ | |
1372 | nop; \ | |
1373 | nop; \ | |
1374 | nop | |
1375 | ||
1376 | #define H_HT0_Interrupt_Level_13_0x4d | |
1377 | #define My_HT0_Interrupt_Level_13_0x4d \ | |
1378 | rd %softint, %g3; \ | |
1379 | sethi %hi(0x2000), %g3; \ | |
1380 | wr %g3, %g0, %clear_softint; \ | |
1381 | retry; \ | |
1382 | nop; \ | |
1383 | nop; \ | |
1384 | nop; \ | |
1385 | nop | |
1386 | ||
1387 | #define H_HT0_Interrupt_Level_15_0x4f | |
1388 | #define My_HT0_Interrupt_Level_15_0x4f \ | |
1389 | sethi %hi(0x8000), %g3; \ | |
1390 | wr %g3, %g0, %clear_softint; \ | |
1391 | wr %g0, %g0, %pic;\ | |
1392 | sethi %hi(0x80040000), %g2;\ | |
1393 | rd %pcr, %g3;\ | |
1394 | andn %g3, %g2, %g3;\ | |
1395 | wr %g3, %g0, %pcr;\ | |
1396 | retry; | |
1397 | ||
1398 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
1399 | # 218 "diag.j" | |
1400 | #include "hboot.s" | |
1401 | .text | |
1402 | .global main | |
1403 | main: | |
1404 | ||
1405 | ! Set up ld/st area per thread | |
1406 | ta T_RD_THID ! Result in %o1 = r9 | |
1407 | umul %r9, 256, %r31 | |
1408 | setx user_data_start, %r1, %r3 | |
1409 | add %r31, %r3, %r31 | |
1410 | wr %r0, 0x4, %asi | |
1411 | ||
1412 | !Initializing integer registers | |
1413 | ldx [%r31+0], %r0 | |
1414 | ldx [%r31+8], %r1 | |
1415 | ldx [%r31+16], %r2 | |
1416 | ldx [%r31+24], %r3 | |
1417 | ldx [%r31+32], %r4 | |
1418 | ldx [%r31+40], %r5 | |
1419 | ldx [%r31+48], %r6 | |
1420 | ldx [%r31+56], %r7 | |
1421 | ldx [%r31+64], %r8 | |
1422 | ldx [%r31+72], %r9 | |
1423 | ldx [%r31+80], %r10 | |
1424 | ldx [%r31+88], %r11 | |
1425 | ldx [%r31+96], %r12 | |
1426 | ldx [%r31+104], %r13 | |
1427 | ldx [%r31+112], %r14 | |
1428 | mov %r31, %r15 | |
1429 | ldx [%r31+128], %r16 | |
1430 | ldx [%r31+136], %r17 | |
1431 | ldx [%r31+144], %r18 | |
1432 | ldx [%r31+152], %r19 | |
1433 | ldx [%r31+160], %r20 | |
1434 | ldx [%r31+168], %r21 | |
1435 | ldx [%r31+176], %r22 | |
1436 | ldx [%r31+184], %r23 | |
1437 | ldx [%r31+192], %r24 | |
1438 | ldx [%r31+200], %r25 | |
1439 | ldx [%r31+208], %r26 | |
1440 | ldx [%r31+216], %r27 | |
1441 | ldx [%r31+224], %r28 | |
1442 | ldx [%r31+232], %r29 | |
1443 | mov 0x31, %r14 | |
1444 | mov 0x30, %r30 | |
1445 | save %r31, %r0, %r31 | |
1446 | ldx [%r31+0], %r0 | |
1447 | ldx [%r31+8], %r1 | |
1448 | ldx [%r31+16], %r2 | |
1449 | ldx [%r31+24], %r3 | |
1450 | ldx [%r31+32], %r4 | |
1451 | ldx [%r31+40], %r5 | |
1452 | ldx [%r31+48], %r6 | |
1453 | ldx [%r31+56], %r7 | |
1454 | ldx [%r31+64], %r8 | |
1455 | ldx [%r31+72], %r9 | |
1456 | ldx [%r31+80], %r10 | |
1457 | ldx [%r31+88], %r11 | |
1458 | ldx [%r31+96], %r12 | |
1459 | ldx [%r31+104], %r13 | |
1460 | ldx [%r31+112], %r14 | |
1461 | mov %r31, %r15 | |
1462 | ldx [%r31+128], %r16 | |
1463 | ldx [%r31+136], %r17 | |
1464 | ldx [%r31+144], %r18 | |
1465 | ldx [%r31+152], %r19 | |
1466 | ldx [%r31+160], %r20 | |
1467 | ldx [%r31+168], %r21 | |
1468 | ldx [%r31+176], %r22 | |
1469 | ldx [%r31+184], %r23 | |
1470 | ldx [%r31+192], %r24 | |
1471 | ldx [%r31+200], %r25 | |
1472 | ldx [%r31+208], %r26 | |
1473 | ldx [%r31+216], %r27 | |
1474 | ldx [%r31+224], %r28 | |
1475 | ldx [%r31+232], %r29 | |
1476 | mov 0xb4, %r14 | |
1477 | mov 0x30, %r30 | |
1478 | save %r31, %r0, %r31 | |
1479 | ldx [%r31+0], %r0 | |
1480 | ldx [%r31+8], %r1 | |
1481 | ldx [%r31+16], %r2 | |
1482 | ldx [%r31+24], %r3 | |
1483 | ldx [%r31+32], %r4 | |
1484 | ldx [%r31+40], %r5 | |
1485 | ldx [%r31+48], %r6 | |
1486 | ldx [%r31+56], %r7 | |
1487 | ldx [%r31+64], %r8 | |
1488 | ldx [%r31+72], %r9 | |
1489 | ldx [%r31+80], %r10 | |
1490 | ldx [%r31+88], %r11 | |
1491 | ldx [%r31+96], %r12 | |
1492 | ldx [%r31+104], %r13 | |
1493 | ldx [%r31+112], %r14 | |
1494 | mov %r31, %r15 | |
1495 | ldx [%r31+128], %r16 | |
1496 | ldx [%r31+136], %r17 | |
1497 | ldx [%r31+144], %r18 | |
1498 | ldx [%r31+152], %r19 | |
1499 | ldx [%r31+160], %r20 | |
1500 | ldx [%r31+168], %r21 | |
1501 | ldx [%r31+176], %r22 | |
1502 | ldx [%r31+184], %r23 | |
1503 | ldx [%r31+192], %r24 | |
1504 | ldx [%r31+200], %r25 | |
1505 | ldx [%r31+208], %r26 | |
1506 | ldx [%r31+216], %r27 | |
1507 | ldx [%r31+224], %r28 | |
1508 | ldx [%r31+232], %r29 | |
1509 | mov 0x33, %r14 | |
1510 | mov 0xb0, %r30 | |
1511 | save %r31, %r0, %r31 | |
1512 | ldx [%r31+0], %r0 | |
1513 | ldx [%r31+8], %r1 | |
1514 | ldx [%r31+16], %r2 | |
1515 | ldx [%r31+24], %r3 | |
1516 | ldx [%r31+32], %r4 | |
1517 | ldx [%r31+40], %r5 | |
1518 | ldx [%r31+48], %r6 | |
1519 | ldx [%r31+56], %r7 | |
1520 | ldx [%r31+64], %r8 | |
1521 | ldx [%r31+72], %r9 | |
1522 | ldx [%r31+80], %r10 | |
1523 | ldx [%r31+88], %r11 | |
1524 | ldx [%r31+96], %r12 | |
1525 | ldx [%r31+104], %r13 | |
1526 | ldx [%r31+112], %r14 | |
1527 | mov %r31, %r15 | |
1528 | ldx [%r31+128], %r16 | |
1529 | ldx [%r31+136], %r17 | |
1530 | ldx [%r31+144], %r18 | |
1531 | ldx [%r31+152], %r19 | |
1532 | ldx [%r31+160], %r20 | |
1533 | ldx [%r31+168], %r21 | |
1534 | ldx [%r31+176], %r22 | |
1535 | ldx [%r31+184], %r23 | |
1536 | ldx [%r31+192], %r24 | |
1537 | ldx [%r31+200], %r25 | |
1538 | ldx [%r31+208], %r26 | |
1539 | ldx [%r31+216], %r27 | |
1540 | ldx [%r31+224], %r28 | |
1541 | ldx [%r31+232], %r29 | |
1542 | mov 0xb4, %r14 | |
1543 | mov 0x32, %r30 | |
1544 | save %r31, %r0, %r31 | |
1545 | ldx [%r31+0], %r0 | |
1546 | ldx [%r31+8], %r1 | |
1547 | ldx [%r31+16], %r2 | |
1548 | ldx [%r31+24], %r3 | |
1549 | ldx [%r31+32], %r4 | |
1550 | ldx [%r31+40], %r5 | |
1551 | ldx [%r31+48], %r6 | |
1552 | ldx [%r31+56], %r7 | |
1553 | ldx [%r31+64], %r8 | |
1554 | ldx [%r31+72], %r9 | |
1555 | ldx [%r31+80], %r10 | |
1556 | ldx [%r31+88], %r11 | |
1557 | ldx [%r31+96], %r12 | |
1558 | ldx [%r31+104], %r13 | |
1559 | ldx [%r31+112], %r14 | |
1560 | mov %r31, %r15 | |
1561 | ldx [%r31+128], %r16 | |
1562 | ldx [%r31+136], %r17 | |
1563 | ldx [%r31+144], %r18 | |
1564 | ldx [%r31+152], %r19 | |
1565 | ldx [%r31+160], %r20 | |
1566 | ldx [%r31+168], %r21 | |
1567 | ldx [%r31+176], %r22 | |
1568 | ldx [%r31+184], %r23 | |
1569 | ldx [%r31+192], %r24 | |
1570 | ldx [%r31+200], %r25 | |
1571 | ldx [%r31+208], %r26 | |
1572 | ldx [%r31+216], %r27 | |
1573 | ldx [%r31+224], %r28 | |
1574 | ldx [%r31+232], %r29 | |
1575 | mov 0x30, %r14 | |
1576 | mov 0x34, %r30 | |
1577 | save %r31, %r0, %r31 | |
1578 | ldx [%r31+0], %r0 | |
1579 | ldx [%r31+8], %r1 | |
1580 | ldx [%r31+16], %r2 | |
1581 | ldx [%r31+24], %r3 | |
1582 | ldx [%r31+32], %r4 | |
1583 | ldx [%r31+40], %r5 | |
1584 | ldx [%r31+48], %r6 | |
1585 | ldx [%r31+56], %r7 | |
1586 | ldx [%r31+64], %r8 | |
1587 | ldx [%r31+72], %r9 | |
1588 | ldx [%r31+80], %r10 | |
1589 | ldx [%r31+88], %r11 | |
1590 | ldx [%r31+96], %r12 | |
1591 | ldx [%r31+104], %r13 | |
1592 | ldx [%r31+112], %r14 | |
1593 | mov %r31, %r15 | |
1594 | ldx [%r31+128], %r16 | |
1595 | ldx [%r31+136], %r17 | |
1596 | ldx [%r31+144], %r18 | |
1597 | ldx [%r31+152], %r19 | |
1598 | ldx [%r31+160], %r20 | |
1599 | ldx [%r31+168], %r21 | |
1600 | ldx [%r31+176], %r22 | |
1601 | ldx [%r31+184], %r23 | |
1602 | ldx [%r31+192], %r24 | |
1603 | ldx [%r31+200], %r25 | |
1604 | ldx [%r31+208], %r26 | |
1605 | ldx [%r31+216], %r27 | |
1606 | ldx [%r31+224], %r28 | |
1607 | ldx [%r31+232], %r29 | |
1608 | mov 0xb5, %r14 | |
1609 | mov 0x30, %r30 | |
1610 | save %r31, %r0, %r31 | |
1611 | ldx [%r31+0], %r0 | |
1612 | ldx [%r31+8], %r1 | |
1613 | ldx [%r31+16], %r2 | |
1614 | ldx [%r31+24], %r3 | |
1615 | ldx [%r31+32], %r4 | |
1616 | ldx [%r31+40], %r5 | |
1617 | ldx [%r31+48], %r6 | |
1618 | ldx [%r31+56], %r7 | |
1619 | ldx [%r31+64], %r8 | |
1620 | ldx [%r31+72], %r9 | |
1621 | ldx [%r31+80], %r10 | |
1622 | ldx [%r31+88], %r11 | |
1623 | ldx [%r31+96], %r12 | |
1624 | ldx [%r31+104], %r13 | |
1625 | ldx [%r31+112], %r14 | |
1626 | mov %r31, %r15 | |
1627 | ldx [%r31+128], %r16 | |
1628 | ldx [%r31+136], %r17 | |
1629 | ldx [%r31+144], %r18 | |
1630 | ldx [%r31+152], %r19 | |
1631 | ldx [%r31+160], %r20 | |
1632 | ldx [%r31+168], %r21 | |
1633 | ldx [%r31+176], %r22 | |
1634 | ldx [%r31+184], %r23 | |
1635 | ldx [%r31+192], %r24 | |
1636 | ldx [%r31+200], %r25 | |
1637 | ldx [%r31+208], %r26 | |
1638 | ldx [%r31+216], %r27 | |
1639 | ldx [%r31+224], %r28 | |
1640 | ldx [%r31+232], %r29 | |
1641 | mov 0x33, %r14 | |
1642 | mov 0x34, %r30 | |
1643 | save %r31, %r0, %r31 | |
1644 | restore | |
1645 | restore | |
1646 | restore | |
1647 | !Initializing float registers | |
1648 | ldd [%r31+0], %f0 | |
1649 | ldd [%r31+16], %f2 | |
1650 | ldd [%r31+32], %f4 | |
1651 | ldd [%r31+48], %f6 | |
1652 | ldd [%r31+64], %f8 | |
1653 | ldd [%r31+80], %f10 | |
1654 | ldd [%r31+96], %f12 | |
1655 | ldd [%r31+112], %f14 | |
1656 | ldd [%r31+128], %f16 | |
1657 | ldd [%r31+144], %f18 | |
1658 | ldd [%r31+160], %f20 | |
1659 | ldd [%r31+176], %f22 | |
1660 | ldd [%r31+192], %f24 | |
1661 | ldd [%r31+208], %f26 | |
1662 | ldd [%r31+224], %f28 | |
1663 | ldd [%r31+240], %f30 | |
1664 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. | |
1665 | ta T_CHANGE_HPRIV | |
1666 | setx diag_finish, %r29, %r28 | |
1667 | add %r28, 4, %r29 | |
1668 | wrpr %g0, 1, %tl | |
1669 | wrpr %r28, %tpc | |
1670 | wrpr %r29, %tnpc | |
1671 | wrpr %g0, 2, %tl | |
1672 | wrpr %r28, %tpc | |
1673 | wrpr %r29, %tnpc | |
1674 | wrpr %g0, 3, %tl | |
1675 | wrpr %r28, %tpc | |
1676 | wrpr %r29, %tnpc | |
1677 | wrpr %g0, 4, %tl | |
1678 | wrpr %r28, %tpc | |
1679 | wrpr %r29, %tnpc | |
1680 | wrpr %g0, 5, %tl | |
1681 | wrpr %r28, %tpc | |
1682 | wrpr %r29, %tnpc | |
1683 | wrpr %g0, 6, %tl | |
1684 | wrpr %r28, %tpc | |
1685 | wrpr %r29, %tnpc | |
1686 | wrpr %g0, 0, %tl | |
1687 | ||
1688 | ta T_CHANGE_HPRIV | |
1689 | ||
1690 | !Initializing Tick Cmprs | |
1691 | mov 1, %g2 | |
1692 | sllx %g2, 63, %g2 | |
1693 | or %g1, %g2, %g1 | |
1694 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1695 | wr %g1, %g0, %tick_cmpr | |
1696 | wr %g1, %g0, %sys_tick_cmpr | |
1697 | ta T_CHANGE_NONHPRIV | |
1698 | ||
1699 | intveclr_0_0: | |
1700 | set 0xce63e39c, %r28 | |
1701 | stxa %r28, [%g0] 0x72 | |
1702 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1703 | .word 0x924d000a ! 2: MULX_R mulx %r20, %r10, %r9 | |
1704 | nop | |
1705 | mov 0x80, %g3 | |
1706 | stxa %g3, [%g3] 0x57 | |
1707 | .word 0xd25fc000 ! 3: LDX_R ldx [%r31 + %r0], %r9 | |
1708 | debug_0_1: | |
1709 | setx debug_0_1 + 64, %r11, %r19 | |
1710 | mov 0x38, %r18 | |
1711 | .word 0xe6f00b12 ! 4: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1712 | .word 0xd20fc000 ! 5: LDUB_R ldub [%r31 + %r0], %r9 | |
1713 | .word 0xd397e001 ! 6: LDQFA_I - [%r31, 0x0001], %f9 | |
1714 | .word 0x34800001 ! 7: BG bg,a <label_0x1> | |
1715 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_2)) -> intp(0,0,16) | |
1716 | intvec_0_2: | |
1717 | .word 0x39400001 ! 8: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1718 | splash_cmpr_0_3: | |
1719 | setx 0x6c5e2e8d17a63f3c, %g2, %g1 | |
1720 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
1721 | sub %g1, 100, %g1 | |
1722 | .word 0xb1800001 ! 9: WR_STICK_REG_R wr %r0, %r1, %- | |
1723 | .word 0xd20fe001 ! 10: LDUB_I ldub [%r31 + 0x0001], %r9 | |
1724 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_4)) -> intp(0,0,7) | |
1725 | intvec_0_4: | |
1726 | .word 0x39400001 ! 11: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1727 | .word 0xd317c000 ! 12: LDQF_R - [%r31, %r0], %f9 | |
1728 | .word 0xa04a400b ! 13: MULX_R mulx %r9, %r11, %r16 | |
1729 | .word 0xe0880e60 ! 14: LDUBA_R lduba [%r0, %r0] 0x73, %r16 | |
1730 | .word 0x81982cd7 ! 15: WRHPR_HPSTATE_I wrhpr %r0, 0x0cd7, %hpstate | |
1731 | splash_cmpr_0_5: | |
1732 | setx 0xd19bafb96b53f900, %g2, %g1 | |
1733 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
1734 | sub %g1, 100, %g1 | |
1735 | .word 0xb1800001 ! 16: WR_STICK_REG_R wr %r0, %r1, %- | |
1736 | .word 0x8d903d49 ! 17: WRPR_PSTATE_I wrpr %r0, 0x1d49, %pstate | |
1737 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_6)) -> intp(0,0,21) | |
1738 | intvec_0_6: | |
1739 | .word 0x39400001 ! 18: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1740 | .word 0xa190200c ! 19: WRPR_GL_I wrpr %r0, 0x000c, %- | |
1741 | .word 0x9b450000 ! 20: RD_SET_SOFTINT rd %set_softint, %r13 | |
1742 | .word 0xda4fe001 ! 21: LDSB_I ldsb [%r31 + 0x0001], %r13 | |
1743 | splash_lsu_0_7: | |
1744 | setx 0xe35d2bda48636841, %r1, %r2 | |
1745 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1746 | .word 0x3d400001 ! 22: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1747 | .word 0xda9004a0 ! 23: LDUHA_R lduha [%r0, %r0] 0x25, %r13 | |
1748 | splash_cmpr_0_8: | |
1749 | setx 0xec87fb57580ee445, %g2, %g1 | |
1750 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1751 | sub %g1, 100, %g1 | |
1752 | .word 0xb1800001 ! 24: WR_STICK_REG_R wr %r0, %r1, %- | |
1753 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_9)) -> intp(0,1,3) | |
1754 | xir_0_9: | |
1755 | .word 0xa9826001 ! 25: WR_SET_SOFTINT_I wr %r9, 0x0001, %set_softint | |
1756 | DS_0_10: | |
1757 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
1758 | .xword 0xe7473515 ! Random illegal ? | |
1759 | .word 0xd9110007 ! 1: LDQF_R - [%r4, %r7], %f12 | |
1760 | .word 0x81a50832 ! 26: FADDs fadds %f20, %f18, %f0 | |
1761 | set 0x9669bf3e, %r28 | |
1762 | stxa %r28, [%g0] 0x73 | |
1763 | intvec_0_11: | |
1764 | .word 0x39400001 ! 27: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1765 | .word 0x99464000 ! 28: RD_STICK_CMPR_REG rd %-, %r12 | |
1766 | .word 0xd81fc000 ! 29: LDD_R ldd [%r31 + %r0], %r12 | |
1767 | debug_0_12: | |
1768 | mov 8, %r18 | |
1769 | .word 0xe8f00852 ! 30: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
1770 | intveclr_0_13: | |
1771 | set 0x4b405c97, %r28 | |
1772 | stxa %r28, [%g0] 0x72 | |
1773 | .word 0x25400001 ! 31: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1774 | .word 0xd8ffc032 ! 32: SWAPA_R swapa %r12, [%r31 + %r18] 0x01 | |
1775 | .word 0x8790232e ! 33: WRPR_TT_I wrpr %r0, 0x032e, %tt | |
1776 | .word 0xd8bfc032 ! 34: STDA_R stda %r12, [%r31 + %r18] 0x01 | |
1777 | .word 0xd8d004a0 ! 35: LDSHA_R ldsha [%r0, %r0] 0x25, %r12 | |
1778 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_14)) -> intp(0,0,4) | |
1779 | intvec_0_14: | |
1780 | .word 0x39400001 ! 36: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1781 | set 0xb837f1c8, %r28 | |
1782 | stxa %r28, [%g0] 0x73 | |
1783 | intvec_0_15: | |
1784 | .word 0x39400001 ! 37: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1785 | .word 0xa1902009 ! 38: WRPR_GL_I wrpr %r0, 0x0009, %- | |
1786 | mondo_0_16: | |
1787 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1788 | ||
1789 | stxa %r19, [%r0+0x3e0] %asi | |
1790 | .word 0x9d908012 ! 39: WRPR_WSTATE_R wrpr %r2, %r18, %wstate | |
1791 | .word 0x91d020b4 ! 40: Tcc_I ta icc_or_xcc, %r0 + 180 | |
1792 | otherw | |
1793 | mov 0xb4, %r30 | |
1794 | .word 0x83d0001e ! 41: Tcc_R te icc_or_xcc, %r0 + %r30 | |
1795 | set 0xfcd2c280, %r28 | |
1796 | stxa %r28, [%g0] 0x73 | |
1797 | intvec_0_17: | |
1798 | .word 0x39400001 ! 42: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1799 | debug_0_18: | |
1800 | mov 8, %r18 | |
1801 | .word 0xd6f00852 ! 43: STXA_R stxa %r11, [%r0 + %r18] 0x42 | |
1802 | otherw | |
1803 | mov 0x31, %r30 | |
1804 | .word 0x91d0001e ! 44: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1805 | .word 0xd88008a0 ! 45: LDUWA_R lduwa [%r0, %r0] 0x45, %r12 | |
1806 | .word 0x91d020b4 ! 46: Tcc_I ta icc_or_xcc, %r0 + 180 | |
1807 | debug_0_19: | |
1808 | setx debug_0_19 + 64, %r11, %r19 | |
1809 | mov 0x38, %r18 | |
1810 | .word 0xe6f00b12 ! 47: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1811 | .word 0xab844003 ! 48: WR_CLEAR_SOFTINT_R wr %r17, %r3, %clear_softint | |
1812 | .word 0x93d02032 ! 49: Tcc_I tne icc_or_xcc, %r0 + 50 | |
1813 | .word 0x8d90249c ! 50: WRPR_PSTATE_I wrpr %r0, 0x049c, %pstate | |
1814 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_20)) -> intp(0,1,3) | |
1815 | xir_0_20: | |
1816 | .word 0xa982e001 ! 51: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
1817 | .word 0xd8c7e010 ! 52: LDSWA_I ldswa [%r31, + 0x0010] %asi, %r12 | |
1818 | .word 0xd9e7c023 ! 53: CASA_I casa [%r31] 0x 1, %r3, %r12 | |
1819 | .word 0xd847e001 ! 54: LDSW_I ldsw [%r31 + 0x0001], %r12 | |
1820 | debug_0_21: | |
1821 | mov 8, %r18 | |
1822 | .word 0xe0f00852 ! 55: STXA_R stxa %r16, [%r0 + %r18] 0x42 | |
1823 | .word 0x8b50c000 ! 56: RDPR_TT <illegal instruction> | |
1824 | debug_0_22: | |
1825 | setx debug_0_22 + 64, %r11, %r19 | |
1826 | mov 0x38, %r18 | |
1827 | .word 0xe6f00b12 ! 57: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1828 | .word 0xcac7e020 ! 58: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r5 | |
1829 | .word 0xca47c000 ! 59: LDSW_R ldsw [%r31 + %r0], %r5 | |
1830 | .word 0xca4fe001 ! 60: LDSB_I ldsb [%r31 + 0x0001], %r5 | |
1831 | .word 0xca8804a0 ! 61: LDUBA_R lduba [%r0, %r0] 0x25, %r5 | |
1832 | set 0x5a4766f1, %r28 | |
1833 | stxa %r28, [%g0] 0x73 | |
1834 | intvec_0_23: | |
1835 | .word 0x39400001 ! 62: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1836 | .word 0xa5454000 ! 63: RD_CLEAR_SOFTINT rd %clear_softint, %r18 | |
1837 | .word 0x93902002 ! 64: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
1838 | nop | |
1839 | mov 0x80, %g3 | |
1840 | stxa %g3, [%g3] 0x5f | |
1841 | .word 0xe45fc000 ! 65: LDX_R ldx [%r31 + %r0], %r18 | |
1842 | .word 0xa1a2c9d0 ! 66: FDIVd fdivd %f42, %f16, %f16 | |
1843 | DS_0_24: | |
1844 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
1845 | .word 0xbfe7c000 ! 67: SAVE_R save %r31, %r0, %r31 | |
1846 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
1847 | ta T_CHANGE_NONHPRIV ! macro | |
1848 | .word 0x816ca001 ! 68: SDIVX_I sdivx %r18, 0x0001, %r0 | |
1849 | .word 0x8d90206b ! 69: WRPR_PSTATE_I wrpr %r0, 0x006b, %pstate | |
1850 | .word 0x93902003 ! 70: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
1851 | nop | |
1852 | mov 0x80, %g3 | |
1853 | stxa %g3, [%g3] 0x57 | |
1854 | .word 0xc05fc000 ! 71: LDX_R ldx [%r31 + %r0], %r0 | |
1855 | .word 0xc0800ae0 ! 72: LDUWA_R lduwa [%r0, %r0] 0x57, %r0 | |
1856 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_26)) -> intp(0,0,16) | |
1857 | intvec_0_26: | |
1858 | .word 0x39400001 ! 73: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1859 | splash_lsu_0_27: | |
1860 | setx 0xc9071a2305058fff, %r1, %r2 | |
1861 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1862 | .word 0x3d400001 ! 74: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1863 | tagged_0_28: | |
1864 | tsubcctv %r12, 0x1c01, %r4 | |
1865 | .word 0xc007e001 ! 75: LDUW_I lduw [%r31 + 0x0001], %r0 | |
1866 | .word 0x34800001 ! 76: BG bg,a <label_0x1> | |
1867 | debug_0_29: | |
1868 | mov 0x38, %r18 | |
1869 | .word 0xfef00b12 ! 77: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1870 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_30)) -> intp(0,1,3) | |
1871 | xir_0_30: | |
1872 | .word 0xa982a001 ! 78: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
1873 | DS_0_31: | |
1874 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
1875 | pdist %f0, %f4, %f6 | |
1876 | .word 0x99b44306 ! 79: ALIGNADDRESS alignaddr %r17, %r6, %r12 | |
1877 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_32)) -> intp(0,0,30) | |
1878 | intvec_0_32: | |
1879 | .word 0x39400001 ! 80: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1880 | debug_0_33: | |
1881 | mov 8, %r18 | |
1882 | .word 0xe8f00852 ! 81: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
1883 | mondo_0_34: | |
1884 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1885 | ||
1886 | stxa %r4, [%r0+0x3e0] %asi | |
1887 | .word 0x9d92000c ! 82: WRPR_WSTATE_R wrpr %r8, %r12, %wstate | |
1888 | .word 0x93902006 ! 83: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
1889 | change_to_randtl_0_35: | |
1890 | ta T_CHANGE_HPRIV ! macro | |
1891 | done_change_to_randtl_0_35: | |
1892 | .word 0x8f902003 ! 84: WRPR_TL_I wrpr %r0, 0x0003, %tl | |
1893 | splash_cmpr_0_36: | |
1894 | setx 0x290f3d5f8da16221, %g2, %g1 | |
1895 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1896 | sub %g1, 100, %g1 | |
1897 | .word 0xb1800001 ! 85: WR_STICK_REG_R wr %r0, %r1, %- | |
1898 | .word 0xd927e001 ! 86: STF_I st %f12, [0x0001, %r31] | |
1899 | .word 0xd837c00c ! 87: STH_R sth %r12, [%r31 + %r12] | |
1900 | .word 0xa9818005 ! 88: WR_SET_SOFTINT_R wr %r6, %r5, %set_softint | |
1901 | .word 0xd89004a0 ! 89: LDUHA_R lduha [%r0, %r0] 0x25, %r12 | |
1902 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
1903 | ta T_CHANGE_NONHPRIV ! macro | |
1904 | .word 0x97a01965 ! 90: FqTOd dis not found | |
1905 | ||
1906 | .word 0x93902004 ! 91: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
1907 | nop | |
1908 | mov 0x80, %g3 | |
1909 | stxa %g3, [%g3] 0x57 | |
1910 | .word 0xd65fc000 ! 92: LDX_R ldx [%r31 + %r0], %r11 | |
1911 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_38)) -> intp(0,0,11) | |
1912 | intvec_0_38: | |
1913 | .word 0x39400001 ! 93: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1914 | .word 0xd6d7e010 ! 94: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r11 | |
1915 | .word 0x87902223 ! 95: WRPR_TT_I wrpr %r0, 0x0223, %tt | |
1916 | .word 0x2c800001 ! 96: BNEG bneg,a <label_0x1> | |
1917 | .word 0xd647e001 ! 97: LDSW_I ldsw [%r31 + 0x0001], %r11 | |
1918 | .word 0x89450000 ! 98: RD_SET_SOFTINT rd %set_softint, %r4 | |
1919 | set 0xae852e90, %r28 | |
1920 | stxa %r28, [%g0] 0x73 | |
1921 | intvec_0_39: | |
1922 | .word 0x39400001 ! 99: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1923 | .word 0xc8dfe010 ! 100: LDXA_I ldxa [%r31, + 0x0010] %asi, %r4 | |
1924 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_40)) -> intp(0,0,27) | |
1925 | intvec_0_40: | |
1926 | .word 0x39400001 ! 101: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1927 | .word 0x8198208f ! 102: WRHPR_HPSTATE_I wrhpr %r0, 0x008f, %hpstate | |
1928 | ta T_CHANGE_PRIV ! macro | |
1929 | ta T_CHANGE_HPRIV ! macro | |
1930 | .word 0xc8cfe000 ! 105: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r4 | |
1931 | .word 0x93902002 ! 106: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
1932 | .word 0xc877c005 ! 107: STX_R stx %r4, [%r31 + %r5] | |
1933 | debug_0_41: | |
1934 | mov 0x38, %r18 | |
1935 | .word 0xfef00b12 ! 108: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1936 | tagged_0_42: | |
1937 | tsubcctv %r10, 0x1e9c, %r22 | |
1938 | .word 0xc807e001 ! 109: LDUW_I lduw [%r31 + 0x0001], %r4 | |
1939 | .word 0x8780204f ! 110: WRASI_I wr %r0, 0x004f, %asi | |
1940 | .word 0x81982b5d ! 111: WRHPR_HPSTATE_I wrhpr %r0, 0x0b5d, %hpstate | |
1941 | .word 0x9f802001 ! 112: SIR sir 0x0001 | |
1942 | splash_lsu_0_43: | |
1943 | setx 0xe236d7f67b882ee3, %r1, %r2 | |
1944 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1945 | .word 0x3d400001 ! 113: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1946 | .word 0x8780201c ! 114: WRASI_I wr %r0, 0x001c, %asi | |
1947 | debug_0_44: | |
1948 | mov 0x38, %r18 | |
1949 | .word 0xfef00b12 ! 115: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1950 | .word 0xc8800c80 ! 116: LDUWA_R lduwa [%r0, %r0] 0x64, %r4 | |
1951 | .word 0x8790201f ! 117: WRPR_TT_I wrpr %r0, 0x001f, %tt | |
1952 | set 0x7ed920c7, %r28 | |
1953 | stxa %r28, [%g0] 0x73 | |
1954 | intvec_0_45: | |
1955 | .word 0x39400001 ! 118: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1956 | .word 0xab81c006 ! 119: WR_CLEAR_SOFTINT_R wr %r7, %r6, %clear_softint | |
1957 | debug_0_46: | |
1958 | setx debug_0_46 + 64, %r11, %r19 | |
1959 | mov 0x38, %r18 | |
1960 | .word 0xe6f00b12 ! 120: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1961 | .word 0x99454000 ! 121: RD_CLEAR_SOFTINT rd %clear_softint, %r12 | |
1962 | .word 0xa1902009 ! 122: WRPR_GL_I wrpr %r0, 0x0009, %- | |
1963 | .word 0xd937e001 ! 123: STQF_I - %f12, [0x0001, %r31] | |
1964 | .word 0x93902005 ! 124: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
1965 | .word 0x8afc8007 ! 125: SDIVcc_R sdivcc %r18, %r7, %r5 | |
1966 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
1967 | ta T_CHANGE_NONHPRIV ! macro | |
1968 | .word 0xa16aa001 ! 126: SDIVX_I sdivx %r10, 0x0001, %r16 | |
1969 | .word 0xe047c000 ! 127: LDSW_R ldsw [%r31 + %r0], %r16 | |
1970 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_48)) -> intp(0,0,22) | |
1971 | intvec_0_48: | |
1972 | .word 0x39400001 ! 128: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1973 | nop | |
1974 | mov 0x80, %g3 | |
1975 | stxa %g3, [%g3] 0x57 | |
1976 | .word 0xe05fc000 ! 129: LDX_R ldx [%r31 + %r0], %r16 | |
1977 | .word 0x8d450000 ! 130: RD_SET_SOFTINT rd %set_softint, %r6 | |
1978 | .word 0x87802004 ! 131: WRASI_I wr %r0, 0x0004, %asi | |
1979 | splash_cmpr_0_49: | |
1980 | setx 0x9c0ac238883b1c95, %g2, %g1 | |
1981 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
1982 | sub %g1, 100, %g1 | |
1983 | .word 0xb1800001 ! 132: WR_STICK_REG_R wr %r0, %r1, %- | |
1984 | .word 0x91d02034 ! 133: Tcc_I ta icc_or_xcc, %r0 + 52 | |
1985 | .word 0x26700001 ! 134: BPL <illegal instruction> | |
1986 | debug_0_50: | |
1987 | mov 0x38, %r18 | |
1988 | .word 0xfef00b12 ! 135: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1989 | set 0xe67282a9, %r28 | |
1990 | stxa %r28, [%g0] 0x73 | |
1991 | intvec_0_51: | |
1992 | .word 0x39400001 ! 136: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1993 | debug_0_52: | |
1994 | setx debug_0_52 + 64, %r11, %r19 | |
1995 | mov 0x38, %r18 | |
1996 | .word 0xe6f00b12 ! 137: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1997 | set 0x588cac22, %r28 | |
1998 | stxa %r28, [%g0] 0x73 | |
1999 | intvec_0_53: | |
2000 | .word 0x39400001 ! 138: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2001 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_54)) -> intp(0,0,24) | |
2002 | intvec_0_54: | |
2003 | .word 0x39400001 ! 139: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2004 | DS_0_55: | |
2005 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2006 | .word 0xe9300011 ! 1: STQF_R - %f20, [%r17, %r0] | |
2007 | normalw | |
2008 | .word 0xa7458000 ! 140: RD_SOFTINT_REG rd %softint, %r19 | |
2009 | splash_lsu_0_56: | |
2010 | setx 0xc4dca801e66ffdd1, %r1, %r2 | |
2011 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2012 | .word 0x3d400001 ! 141: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2013 | mondo_0_57: | |
2014 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2015 | ||
2016 | stxa %r11, [%r0+0x3c0] %asi | |
2017 | .word 0x9d92c001 ! 142: WRPR_WSTATE_R wrpr %r11, %r1, %wstate | |
2018 | .word 0xe69fc020 ! 143: LDDA_R ldda [%r31, %r0] 0x01, %r19 | |
2019 | tagged_0_58: | |
2020 | tsubcctv %r23, 0x14f4, %r9 | |
2021 | .word 0xe607e001 ! 144: LDUW_I lduw [%r31 + 0x0001], %r19 | |
2022 | .word 0xe6cfe010 ! 145: LDSBA_I ldsba [%r31, + 0x0010] %asi, %r19 | |
2023 | .word 0x8790222b ! 146: WRPR_TT_I wrpr %r0, 0x022b, %tt | |
2024 | DS_0_59: | |
2025 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2026 | .word 0xc1336001 ! 1: STQF_I - %f0, [0x0001, %r13] | |
2027 | normalw | |
2028 | .word 0x8f458000 ! 147: RD_SOFTINT_REG rd %softint, %r7 | |
2029 | .word 0xce8fe000 ! 148: LDUBA_I lduba [%r31, + 0x0000] %asi, %r7 | |
2030 | .word 0x87902126 ! 149: WRPR_TT_I wrpr %r0, 0x0126, %tt | |
2031 | .word 0xce900e40 ! 150: LDUHA_R lduha [%r0, %r0] 0x72, %r7 | |
2032 | debug_0_60: | |
2033 | mov 8, %r18 | |
2034 | .word 0xd4f00852 ! 151: STXA_R stxa %r10, [%r0 + %r18] 0x42 | |
2035 | .word 0x2c800001 ! 152: BNEG bneg,a <label_0x1> | |
2036 | .word 0xce9fe001 ! 153: LDDA_I ldda [%r31, + 0x0001] %asi, %r7 | |
2037 | .word 0x879020dd ! 154: WRPR_TT_I wrpr %r0, 0x00dd, %tt | |
2038 | DS_0_61: | |
2039 | nop | |
2040 | not %g0, %g2 | |
2041 | jmp %g2 | |
2042 | .word 0x9d902004 ! 155: WRPR_WSTATE_I wrpr %r0, 0x0004, %wstate | |
2043 | .word 0x8780201c ! 156: WRASI_I wr %r0, 0x001c, %asi | |
2044 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_62)) -> intp(0,1,3) | |
2045 | xir_0_62: | |
2046 | .word 0xa9846001 ! 157: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
2047 | set 0x91eae5ff, %r28 | |
2048 | stxa %r28, [%g0] 0x73 | |
2049 | intvec_0_63: | |
2050 | .word 0x39400001 ! 158: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2051 | debug_0_64: | |
2052 | setx debug_0_64 + 64, %r11, %r19 | |
2053 | mov 0x38, %r18 | |
2054 | .word 0xe6f00b12 ! 159: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2055 | DS_0_65: | |
2056 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2057 | .word 0xcd32a001 ! 1: STQF_I - %f6, [0x0001, %r10] | |
2058 | normalw | |
2059 | .word 0x8d458000 ! 160: RD_SOFTINT_REG rd %softint, %r6 | |
2060 | intveclr_0_66: | |
2061 | set 0x7eb00a47, %r28 | |
2062 | stxa %r28, [%g0] 0x72 | |
2063 | .word 0x25400001 ! 161: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2064 | .word 0xccdfe020 ! 162: LDXA_I ldxa [%r31, + 0x0020] %asi, %r6 | |
2065 | .word 0xccc004a0 ! 163: LDSWA_R ldswa [%r0, %r0] 0x25, %r6 | |
2066 | .word 0xa7816001 ! 164: WR_GRAPHICS_STATUS_REG_I wr %r5, 0x0001, %- | |
2067 | set 0x91b07142, %r28 | |
2068 | stxa %r28, [%g0] 0x73 | |
2069 | intvec_0_67: | |
2070 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2071 | splash_lsu_0_68: | |
2072 | setx 0x39e7dd271ca60a6f, %r1, %r2 | |
2073 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2074 | .word 0x3d400001 ! 166: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2075 | splash_lsu_0_69: | |
2076 | setx 0x527b2f74dc019231, %r1, %r2 | |
2077 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2078 | .word 0x3d400001 ! 167: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2079 | .word 0xcd27e001 ! 168: STF_I st %f6, [0x0001, %r31] | |
2080 | intveclr_0_70: | |
2081 | set 0x18960d1f, %r28 | |
2082 | stxa %r28, [%g0] 0x72 | |
2083 | .word 0x25400001 ! 169: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2084 | .word 0xcc1fc000 ! 170: LDD_R ldd [%r31 + %r0], %r6 | |
2085 | splash_cmpr_0_71: | |
2086 | setx 0xf00123a6cda61076, %g2, %g1 | |
2087 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2088 | sub %g1, 100, %g1 | |
2089 | .word 0xb1800001 ! 171: WR_STICK_REG_R wr %r0, %r1, %- | |
2090 | .word 0x81460000 ! 172: RD_STICK_REG stbar | |
2091 | .word 0x99902004 ! 173: WRPR_CLEANWIN_I wrpr %r0, 0x0004, %cleanwin | |
2092 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_72)) -> intp(0,0,12) | |
2093 | intvec_0_72: | |
2094 | .word 0x39400001 ! 174: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2095 | nop | |
2096 | mov 0x80, %g3 | |
2097 | stxa %g3, [%g3] 0x5f | |
2098 | .word 0xcc5fc000 ! 175: LDX_R ldx [%r31 + %r0], %r6 | |
2099 | tagged_0_73: | |
2100 | taddcctv %r3, 0x17c4, %r16 | |
2101 | .word 0xcc07e001 ! 176: LDUW_I lduw [%r31 + 0x0001], %r6 | |
2102 | .word 0x30800001 ! 177: BA ba,a <label_0x1> | |
2103 | .word 0x8b500000 ! 178: RDPR_TPC rdpr %tpc, %r5 | |
2104 | .word 0x93902004 ! 179: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
2105 | .word 0x20800001 ! 180: BN bn,a <label_0x1> | |
2106 | .word 0x30700001 ! 181: BPA <illegal instruction> | |
2107 | mondo_0_74: | |
2108 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2109 | ||
2110 | stxa %r8, [%r0+0x3e0] %asi | |
2111 | .word 0x9d920009 ! 182: WRPR_WSTATE_R wrpr %r8, %r9, %wstate | |
2112 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2113 | ta T_CHANGE_NONHPRIV ! macro | |
2114 | .word 0x976b6001 ! 183: SDIVX_I sdivx %r13, 0x0001, %r11 | |
2115 | nop | |
2116 | mov 0x80, %g3 | |
2117 | stxa %g3, [%g3] 0x5f | |
2118 | .word 0xd65fc000 ! 184: LDX_R ldx [%r31 + %r0], %r11 | |
2119 | .word 0x8d903fc8 ! 185: WRPR_PSTATE_I wrpr %r0, 0x1fc8, %pstate | |
2120 | splash_tba_0_76: | |
2121 | set 0x120000, %r2 | |
2122 | st %r1, [%r2+%r0] | |
2123 | ta T_CHANGE_PRIV | |
2124 | set 0x120000, %r2 | |
2125 | .word 0x8b900002 ! 186: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2126 | .word 0x36800001 ! 187: BGE bge,a <label_0x1> | |
2127 | .word 0xa1902001 ! 188: WRPR_GL_I wrpr %r0, 0x0001, %- | |
2128 | tagged_0_77: | |
2129 | taddcctv %r10, 0x166c, %r6 | |
2130 | .word 0xd607e001 ! 189: LDUW_I lduw [%r31 + 0x0001], %r11 | |
2131 | .word 0xd61fe001 ! 190: LDD_I ldd [%r31 + 0x0001], %r11 | |
2132 | .word 0x8d903779 ! 191: WRPR_PSTATE_I wrpr %r0, 0x1779, %pstate | |
2133 | .word 0xd6bfc029 ! 192: STDA_R stda %r11, [%r31 + %r9] 0x01 | |
2134 | .word 0xd69fe001 ! 193: LDDA_I ldda [%r31, + 0x0001] %asi, %r11 | |
2135 | ta T_CHANGE_HPRIV ! macro | |
2136 | .word 0x8d802000 ! 195: WRFPRS_I wr %r0, 0x0000, %fprs | |
2137 | debug_0_78: | |
2138 | mov 8, %r18 | |
2139 | .word 0xd0f00852 ! 196: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
2140 | .word 0xd6dfe000 ! 197: LDXA_I ldxa [%r31, + 0x0000] %asi, %r11 | |
2141 | intveclr_0_79: | |
2142 | set 0xa4d49918, %r28 | |
2143 | stxa %r28, [%g0] 0x72 | |
2144 | .word 0x25400001 ! 198: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2145 | splash_lsu_0_80: | |
2146 | setx 0xdc97e9e0dac3284d, %r1, %r2 | |
2147 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2148 | .word 0x3d400001 ! 199: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2149 | .word 0xd6d004a0 ! 200: LDSHA_R ldsha [%r0, %r0] 0x25, %r11 | |
2150 | nop | |
2151 | mov 0x80, %g3 | |
2152 | stxa %g3, [%g3] 0x5f | |
2153 | .word 0xd65fc000 ! 201: LDX_R ldx [%r31 + %r0], %r11 | |
2154 | .word 0x93902003 ! 202: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2155 | splash_tba_0_81: | |
2156 | set 0x003d0000, %r2 | |
2157 | ld [%r2+%r0], %r1 | |
2158 | ta T_CHANGE_PRIV | |
2159 | set 0x003e0000, %r2 | |
2160 | .word 0x8b900002 ! 203: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2161 | .word 0xa1902003 ! 204: WRPR_GL_I wrpr %r0, 0x0003, %- | |
2162 | splash_lsu_0_82: | |
2163 | setx 0xd1c72b2678bc1e65, %r1, %r2 | |
2164 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2165 | .word 0x3d400001 ! 205: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2166 | set 0x60b8f5b8, %r28 | |
2167 | stxa %r28, [%g0] 0x73 | |
2168 | intvec_0_83: | |
2169 | .word 0x39400001 ! 206: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2170 | splash_htba_0_84: | |
2171 | set 0x00390000, %r2 | |
2172 | st %r1, [%r2+%r0] | |
2173 | ta T_CHANGE_HPRIV | |
2174 | set 0x003a0000, %r2 | |
2175 | .word 0x8b980002 ! 207: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2176 | .word 0x8d902ead ! 208: WRPR_PSTATE_I wrpr %r0, 0x0ead, %pstate | |
2177 | .word 0x3c800001 ! 209: BPOS bpos,a <label_0x1> | |
2178 | intveclr_0_85: | |
2179 | set 0xc2ab4750, %r28 | |
2180 | stxa %r28, [%g0] 0x72 | |
2181 | .word 0x25400001 ! 210: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2182 | tagged_0_86: | |
2183 | tsubcctv %r17, 0x1ce7, %r3 | |
2184 | .word 0xd607e001 ! 211: LDUW_I lduw [%r31 + 0x0001], %r11 | |
2185 | splash_cmpr_0_87: | |
2186 | setx 0x6d1ac6be5ddcfa3b, %g2, %g1 | |
2187 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2188 | sub %g1, 100, %g1 | |
2189 | .word 0xb1800001 ! 212: WR_STICK_REG_R wr %r0, %r1, %- | |
2190 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_88)) -> intp(0,0,10) | |
2191 | intvec_0_88: | |
2192 | .word 0x39400001 ! 213: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2193 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
2194 | ta T_CHANGE_NONHPRIV ! macro | |
2195 | .word 0xa5a01964 ! 214: FqTOd dis not found | |
2196 | ||
2197 | .word 0xa1902004 ! 215: WRPR_GL_I wrpr %r0, 0x0004, %- | |
2198 | .word 0x93d02032 ! 216: Tcc_I tne icc_or_xcc, %r0 + 50 | |
2199 | .word 0x87802089 ! 217: WRASI_I wr %r0, 0x0089, %asi | |
2200 | splash_cmpr_0_90: | |
2201 | setx 0x932e9eb681b7fb1c, %g2, %g1 | |
2202 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2203 | sub %g1, 100, %g1 | |
2204 | .word 0xb1800001 ! 218: WR_STICK_REG_R wr %r0, %r1, %- | |
2205 | set 0x33d70991, %r28 | |
2206 | stxa %r28, [%g0] 0x73 | |
2207 | intvec_0_91: | |
2208 | .word 0x39400001 ! 219: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2209 | .word 0x87802016 ! 220: WRASI_I wr %r0, 0x0016, %asi | |
2210 | debug_0_92: | |
2211 | mov 0x38, %r18 | |
2212 | .word 0xfef00b12 ! 221: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2213 | .word 0x8d903256 ! 222: WRPR_PSTATE_I wrpr %r0, 0x1256, %pstate | |
2214 | mondo_0_93: | |
2215 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2216 | ||
2217 | stxa %r20, [%r0+0x3d8] %asi | |
2218 | .word 0x9d928012 ! 223: WRPR_WSTATE_R wrpr %r10, %r18, %wstate | |
2219 | splash_lsu_0_94: | |
2220 | setx 0x2b635c62baa28d6f, %r1, %r2 | |
2221 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2222 | .word 0x3d400001 ! 224: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2223 | nop | |
2224 | mov 0x80, %g3 | |
2225 | stxa %g3, [%g3] 0x5f | |
2226 | .word 0xe45fc000 ! 225: LDX_R ldx [%r31 + %r0], %r18 | |
2227 | .word 0xa1902002 ! 226: WRPR_GL_I wrpr %r0, 0x0002, %- | |
2228 | .word 0xe48008a0 ! 227: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 | |
2229 | .word 0x93d02035 ! 228: Tcc_I tne icc_or_xcc, %r0 + 53 | |
2230 | splash_lsu_0_95: | |
2231 | setx 0xd51f7adfa0bc47dd, %r1, %r2 | |
2232 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2233 | .word 0x3d400001 ! 229: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2234 | nop | |
2235 | mov 0x80, %g3 | |
2236 | stxa %g3, [%g3] 0x57 | |
2237 | .word 0xe45fc000 ! 230: LDX_R ldx [%r31 + %r0], %r18 | |
2238 | invalw | |
2239 | mov 0x35, %r30 | |
2240 | .word 0x93d0001e ! 231: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2241 | .word 0x81982d8e ! 232: WRHPR_HPSTATE_I wrhpr %r0, 0x0d8e, %hpstate | |
2242 | DS_0_96: | |
2243 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2244 | .xword 0xff761c1c ! Random illegal ? | |
2245 | .word 0xe1148003 ! 1: LDQF_R - [%r18, %r3], %f16 | |
2246 | .word 0x85a2082d ! 233: FADDs fadds %f8, %f13, %f2 | |
2247 | .word 0xc4c7e020 ! 234: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r2 | |
2248 | splash_cmpr_0_97: | |
2249 | setx 0xa7a88c0072acdbcf, %g2, %g1 | |
2250 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2251 | sub %g1, 100, %g1 | |
2252 | .word 0xb1800001 ! 235: WR_STICK_REG_R wr %r0, %r1, %- | |
2253 | .word 0x91d02034 ! 236: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2254 | .word 0xc53fe001 ! 237: STDF_I std %f2, [0x0001, %r31] | |
2255 | .word 0x91d020b3 ! 238: Tcc_I ta icc_or_xcc, %r0 + 179 | |
2256 | splash_lsu_0_98: | |
2257 | setx 0xb75deb6470287aad, %r1, %r2 | |
2258 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2259 | .word 0x3d400001 ! 239: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2260 | .word 0xc47fe001 ! 240: SWAP_I swap %r2, [%r31 + 0x0001] | |
2261 | .word 0x8a824006 ! 241: ADDcc_R addcc %r9, %r6, %r5 | |
2262 | .word 0x91d02032 ! 242: Tcc_I ta icc_or_xcc, %r0 + 50 | |
2263 | .word 0xca1fe001 ! 243: LDD_I ldd [%r31 + 0x0001], %r5 | |
2264 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_99)) -> intp(0,1,3) | |
2265 | xir_0_99: | |
2266 | .word 0xa982e001 ! 244: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
2267 | invalw | |
2268 | mov 0xb2, %r30 | |
2269 | .word 0x91d0001e ! 245: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2270 | .word 0xa5a409a3 ! 246: FDIVs fdivs %f16, %f3, %f18 | |
2271 | .word 0xe43fc003 ! 247: STD_R std %r18, [%r31 + %r3] | |
2272 | splash_cmpr_0_100: | |
2273 | setx 0x4f2419c19a694d36, %g2, %g1 | |
2274 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2275 | sub %g1, 100, %g1 | |
2276 | .word 0xb1800001 ! 248: WR_STICK_REG_R wr %r0, %r1, %- | |
2277 | .word 0xe4d00e80 ! 249: LDSHA_R ldsha [%r0, %r0] 0x74, %r18 | |
2278 | .word 0xe49004a0 ! 250: LDUHA_R lduha [%r0, %r0] 0x25, %r18 | |
2279 | .word 0xe42fc003 ! 251: STB_R stb %r18, [%r31 + %r3] | |
2280 | .word 0x87902097 ! 252: WRPR_TT_I wrpr %r0, 0x0097, %tt | |
2281 | .word 0xe527e001 ! 253: STF_I st %f18, [0x0001, %r31] | |
2282 | .word 0x87802055 ! 254: WRASI_I wr %r0, 0x0055, %asi | |
2283 | nop | |
2284 | mov 0x80, %g3 | |
2285 | stxa %g3, [%g3] 0x57 | |
2286 | .word 0xe45fc000 ! 255: LDX_R ldx [%r31 + %r0], %r18 | |
2287 | mondo_0_101: | |
2288 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2289 | ||
2290 | stxa %r11, [%r0+0x3e8] %asi | |
2291 | .word 0x9d92c004 ! 256: WRPR_WSTATE_R wrpr %r11, %r4, %wstate | |
2292 | .word 0xe49fc020 ! 257: LDDA_R ldda [%r31, %r0] 0x01, %r18 | |
2293 | splash_htba_0_102: | |
2294 | set 0x003b0000, %r2 | |
2295 | st %r1, [%r2+%r0] | |
2296 | ta T_CHANGE_HPRIV | |
2297 | set 0x00380000, %r2 | |
2298 | .word 0x8b980002 ! 258: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2299 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_103)) -> intp(0,1,3) | |
2300 | xir_0_103: | |
2301 | .word 0xa9826001 ! 259: WR_SET_SOFTINT_I wr %r9, 0x0001, %set_softint | |
2302 | debug_0_104: | |
2303 | mov 0x38, %r18 | |
2304 | .word 0xfef00b12 ! 260: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2305 | nop | |
2306 | mov 0x80, %g3 | |
2307 | stxa %g3, [%g3] 0x57 | |
2308 | .word 0xe45fc000 ! 261: LDX_R ldx [%r31 + %r0], %r18 | |
2309 | debug_0_105: | |
2310 | mov 8, %r18 | |
2311 | .word 0xe8f00852 ! 262: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
2312 | .word 0xe477c004 ! 263: STX_R stx %r18, [%r31 + %r4] | |
2313 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_106)) -> intp(0,1,3) | |
2314 | xir_0_106: | |
2315 | .word 0xa9822001 ! 264: WR_SET_SOFTINT_I wr %r8, 0x0001, %set_softint | |
2316 | .word 0x87902215 ! 265: WRPR_TT_I wrpr %r0, 0x0215, %tt | |
2317 | .word 0x8d90367b ! 266: WRPR_PSTATE_I wrpr %r0, 0x167b, %pstate | |
2318 | set 0xe283d334, %r28 | |
2319 | stxa %r28, [%g0] 0x73 | |
2320 | intvec_0_107: | |
2321 | .word 0x39400001 ! 267: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2322 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_108)) -> intp(0,0,7) | |
2323 | intvec_0_108: | |
2324 | .word 0x39400001 ! 268: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2325 | .word 0xe45fe001 ! 269: LDX_I ldx [%r31 + 0x0001], %r18 | |
2326 | DS_0_109: | |
2327 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2328 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2329 | .word 0xd110c003 ! 1: LDQF_R - [%r3, %r3], %f8 | |
2330 | .word 0x99a14824 ! 270: FADDs fadds %f5, %f4, %f12 | |
2331 | splash_htba_0_110: | |
2332 | set 0x80000, %r2 | |
2333 | st %r1, [%r2+%r0] | |
2334 | ta T_CHANGE_HPRIV | |
2335 | set 0x80000, %r2 | |
2336 | .word 0x8b980002 ! 271: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2337 | splash_lsu_0_111: | |
2338 | setx 0xebdb0be84db29b29, %r1, %r2 | |
2339 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2340 | .word 0x3d400001 ! 272: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2341 | DS_0_112: | |
2342 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2343 | .xword 0xe16ae49f ! Random illegal ? | |
2344 | .word 0x8da00540 ! 1: FSQRTd fsqrt | |
2345 | .word 0xa3a50830 ! 273: FADDs fadds %f20, %f16, %f17 | |
2346 | .word 0xe28804a0 ! 274: LDUBA_R lduba [%r0, %r0] 0x25, %r17 | |
2347 | set 0xe9d080df, %r28 | |
2348 | stxa %r28, [%g0] 0x73 | |
2349 | intvec_0_113: | |
2350 | .word 0x39400001 ! 275: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2351 | .word 0xe2cfe020 ! 276: LDSBA_I ldsba [%r31, + 0x0020] %asi, %r17 | |
2352 | .word 0x26800001 ! 277: BL bl,a <label_0x1> | |
2353 | .word 0x2e800001 ! 278: BVS bvs,a <label_0x1> | |
2354 | .word 0xe21fe001 ! 279: LDD_I ldd [%r31 + 0x0001], %r17 | |
2355 | invalw | |
2356 | mov 0xb5, %r30 | |
2357 | .word 0x91d0001e ! 280: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2358 | splash_lsu_0_114: | |
2359 | setx 0x6bbb1253a36f2f2b, %r1, %r2 | |
2360 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2361 | .word 0x3d400001 ! 281: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2362 | splash_lsu_0_115: | |
2363 | setx 0xe1ad50c4bba07f21, %r1, %r2 | |
2364 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2365 | .word 0x3d400001 ! 282: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2366 | .word 0xa1902006 ! 283: WRPR_GL_I wrpr %r0, 0x0006, %- | |
2367 | .word 0xe397e001 ! 284: LDQFA_I - [%r31, 0x0001], %f17 | |
2368 | .word 0xe23fe001 ! 285: STD_I std %r17, [%r31 + 0x0001] | |
2369 | debug_0_116: | |
2370 | mov 0x38, %r18 | |
2371 | .word 0xfef00b12 ! 286: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2372 | mondo_0_117: | |
2373 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2374 | ||
2375 | stxa %r9, [%r0+0x3d8] %asi | |
2376 | .word 0x9d90800a ! 287: WRPR_WSTATE_R wrpr %r2, %r10, %wstate | |
2377 | .word 0xe31fc000 ! 288: LDDF_R ldd [%r31, %r0], %f17 | |
2378 | .word 0x8b540000 ! 289: RDPR_GL rdpr %-, %r5 | |
2379 | intveclr_0_118: | |
2380 | set 0x5412476a, %r28 | |
2381 | stxa %r28, [%g0] 0x72 | |
2382 | .word 0x25400001 ! 290: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2383 | .word 0x93902004 ! 291: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
2384 | mondo_0_119: | |
2385 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2386 | ||
2387 | stxa %r8, [%r0+0x3c8] %asi | |
2388 | .word 0x9d910009 ! 292: WRPR_WSTATE_R wrpr %r4, %r9, %wstate | |
2389 | .word 0xca1fe001 ! 293: LDD_I ldd [%r31 + 0x0001], %r5 | |
2390 | debug_0_120: | |
2391 | mov 8, %r18 | |
2392 | .word 0xe8f00852 ! 294: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
2393 | .word 0xca0fc000 ! 295: LDUB_R ldub [%r31 + %r0], %r5 | |
2394 | tagged_0_121: | |
2395 | taddcctv %r8, 0x1ea8, %r24 | |
2396 | .word 0xca07e001 ! 296: LDUW_I lduw [%r31 + 0x0001], %r5 | |
2397 | splash_htba_0_122: | |
2398 | set 0x80000, %r2 | |
2399 | st %r1, [%r2+%r0] | |
2400 | ta T_CHANGE_HPRIV | |
2401 | set 0x80000, %r2 | |
2402 | .word 0x8b980002 ! 297: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2403 | .word 0x8d9036c7 ! 298: WRPR_PSTATE_I wrpr %r0, 0x16c7, %pstate | |
2404 | .word 0x93902002 ! 299: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
2405 | set 0x9fe03efb, %r28 | |
2406 | stxa %r28, [%g0] 0x73 | |
2407 | intvec_0_123: | |
2408 | .word 0x39400001 ! 300: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2409 | DS_0_124: | |
2410 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2411 | pdist %f28, %f18, %f30 | |
2412 | .word 0x95b2c306 ! 301: ALIGNADDRESS alignaddr %r11, %r6, %r10 | |
2413 | .word 0x87802004 ! 302: WRASI_I wr %r0, 0x0004, %asi | |
2414 | splash_cmpr_0_125: | |
2415 | setx 0x6f25c196c3ae6f80, %g2, %g1 | |
2416 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2417 | sub %g1, 100, %g1 | |
2418 | .word 0xb1800001 ! 303: WR_STICK_REG_R wr %r0, %r1, %- | |
2419 | .word 0xd4900e40 ! 304: LDUHA_R lduha [%r0, %r0] 0x72, %r10 | |
2420 | change_to_randtl_0_126: | |
2421 | ta T_CHANGE_PRIV ! macro | |
2422 | done_change_to_randtl_0_126: | |
2423 | .word 0x8f902000 ! 305: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
2424 | .word 0xd537c006 ! 306: STQF_R - %f10, [%r6, %r31] | |
2425 | .word 0xa1902009 ! 307: WRPR_GL_I wrpr %r0, 0x0009, %- | |
2426 | .word 0xa984c011 ! 308: WR_SET_SOFTINT_R wr %r19, %r17, %set_softint | |
2427 | intveclr_0_127: | |
2428 | set 0x71915c6f, %r28 | |
2429 | stxa %r28, [%g0] 0x72 | |
2430 | .word 0x25400001 ! 309: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2431 | .word 0x36700001 ! 310: BPGE <illegal instruction> | |
2432 | intveclr_0_128: | |
2433 | set 0x6b0a4496, %r28 | |
2434 | stxa %r28, [%g0] 0x72 | |
2435 | .word 0x25400001 ! 311: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2436 | DS_0_129: | |
2437 | nop | |
2438 | not %g0, %g2 | |
2439 | jmp %g2 | |
2440 | .word 0x9d902001 ! 312: WRPR_WSTATE_I wrpr %r0, 0x0001, %wstate | |
2441 | .word 0x93902002 ! 313: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
2442 | nop | |
2443 | mov 0x80, %g3 | |
2444 | stxa %g3, [%g3] 0x57 | |
2445 | .word 0xd45fc000 ! 314: LDX_R ldx [%r31 + %r0], %r10 | |
2446 | splash_cmpr_0_130: | |
2447 | setx 0x1952bb93b1b5f3d8, %g2, %g1 | |
2448 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2449 | sub %g1, 100, %g1 | |
2450 | .word 0xb1800001 ! 315: WR_STICK_REG_R wr %r0, %r1, %- | |
2451 | .word 0x93902005 ! 316: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
2452 | .word 0xd4c804a0 ! 317: LDSBA_R ldsba [%r0, %r0] 0x25, %r10 | |
2453 | .word 0x91926001 ! 318: WRPR_PIL_I wrpr %r9, 0x0001, %pil | |
2454 | .word 0x2e800001 ! 319: BVS bvs,a <label_0x1> | |
2455 | otherw | |
2456 | mov 0x35, %r30 | |
2457 | .word 0x83d0001e ! 320: Tcc_R te icc_or_xcc, %r0 + %r30 | |
2458 | DS_0_131: | |
2459 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2460 | pdist %f6, %f18, %f26 | |
2461 | .word 0xa5b50312 ! 321: ALIGNADDRESS alignaddr %r20, %r18, %r18 | |
2462 | .word 0x89520000 ! 322: RDPR_PIL rdpr %pil, %r4 | |
2463 | .word 0xc857e001 ! 323: LDSH_I ldsh [%r31 + 0x0001], %r4 | |
2464 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_132)) -> intp(0,0,13) | |
2465 | intvec_0_132: | |
2466 | .word 0x39400001 ! 324: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2467 | nop | |
2468 | mov 0x80, %g3 | |
2469 | stxa %g3, [%g3] 0x57 | |
2470 | .word 0xc85fc000 ! 325: LDX_R ldx [%r31 + %r0], %r4 | |
2471 | set 0x9cf6573c, %r28 | |
2472 | stxa %r28, [%g0] 0x73 | |
2473 | intvec_0_133: | |
2474 | .word 0x39400001 ! 326: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2475 | .word 0xc88fe010 ! 327: LDUBA_I lduba [%r31, + 0x0010] %asi, %r4 | |
2476 | .word 0xc88008a0 ! 328: LDUWA_R lduwa [%r0, %r0] 0x45, %r4 | |
2477 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_134)) -> intp(0,1,3) | |
2478 | xir_0_134: | |
2479 | .word 0xa9806001 ! 329: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
2480 | set 0x7993df55, %r28 | |
2481 | stxa %r28, [%g0] 0x73 | |
2482 | intvec_0_135: | |
2483 | .word 0x39400001 ! 330: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2484 | invalw | |
2485 | mov 0x34, %r30 | |
2486 | .word 0x93d0001e ! 331: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2487 | splash_cmpr_0_136: | |
2488 | setx 0x5f28a43d21e157e5, %g2, %g1 | |
2489 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2490 | sub %g1, 100, %g1 | |
2491 | .word 0xb1800001 ! 332: WR_STICK_REG_R wr %r0, %r1, %- | |
2492 | mondo_0_137: | |
2493 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2494 | ||
2495 | stxa %r3, [%r0+0x3c8] %asi | |
2496 | .word 0x9d914012 ! 333: WRPR_WSTATE_R wrpr %r5, %r18, %wstate | |
2497 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_138)) -> intp(0,1,3) | |
2498 | xir_0_138: | |
2499 | .word 0xa9852001 ! 334: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
2500 | DS_0_139: | |
2501 | nop | |
2502 | not %g0, %g2 | |
2503 | jmp %g2 | |
2504 | .word 0x9d902005 ! 335: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate | |
2505 | invalw | |
2506 | mov 0xb2, %r30 | |
2507 | .word 0x91d0001e ! 336: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2508 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_140)) -> intp(0,0,0) | |
2509 | intvec_0_140: | |
2510 | .word 0x39400001 ! 337: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2511 | .word 0xc857c000 ! 338: LDSH_R ldsh [%r31 + %r0], %r4 | |
2512 | debug_0_141: | |
2513 | mov 8, %r18 | |
2514 | .word 0xe4f00852 ! 339: STXA_R stxa %r18, [%r0 + %r18] 0x42 | |
2515 | .word 0xc8d004a0 ! 340: LDSHA_R ldsha [%r0, %r0] 0x25, %r4 | |
2516 | .word 0x2c700001 ! 341: BPNEG <illegal instruction> | |
2517 | .word 0x91d02035 ! 342: Tcc_I ta icc_or_xcc, %r0 + 53 | |
2518 | debug_0_142: | |
2519 | setx debug_0_142 + 64, %r11, %r19 | |
2520 | mov 0x38, %r18 | |
2521 | .word 0xe6f00b12 ! 343: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2522 | intveclr_0_143: | |
2523 | set 0xa48fd9fa, %r28 | |
2524 | stxa %r28, [%g0] 0x72 | |
2525 | .word 0x25400001 ! 344: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2526 | intveclr_0_144: | |
2527 | set 0x83ed6efb, %r28 | |
2528 | stxa %r28, [%g0] 0x72 | |
2529 | .word 0x25400001 ! 345: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2530 | splash_lsu_0_145: | |
2531 | setx 0xfad8fa2de377b22b, %r1, %r2 | |
2532 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2533 | .word 0x3d400001 ! 346: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2534 | .word 0x91912001 ! 347: WRPR_PIL_I wrpr %r4, 0x0001, %pil | |
2535 | .word 0x8790208c ! 348: WRPR_TT_I wrpr %r0, 0x008c, %tt | |
2536 | tagged_0_146: | |
2537 | tsubcctv %r20, 0x19bd, %r6 | |
2538 | .word 0xc807e001 ! 349: LDUW_I lduw [%r31 + 0x0001], %r4 | |
2539 | .word 0xc84fc000 ! 350: LDSB_R ldsb [%r31 + %r0], %r4 | |
2540 | .word 0x87802004 ! 351: WRASI_I wr %r0, 0x0004, %asi | |
2541 | set 0x80d83a94, %r28 | |
2542 | stxa %r28, [%g0] 0x73 | |
2543 | intvec_0_147: | |
2544 | .word 0x39400001 ! 352: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2545 | splash_lsu_0_148: | |
2546 | setx 0x4267bccd58b34747, %r1, %r2 | |
2547 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2548 | .word 0x3d400001 ! 353: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2549 | DS_0_149: | |
2550 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2551 | .word 0xbfefc000 ! 354: RESTORE_R restore %r31, %r0, %r31 | |
2552 | .word 0x87902352 ! 355: WRPR_TT_I wrpr %r0, 0x0352, %tt | |
2553 | .word 0xc89fc020 ! 356: LDDA_R ldda [%r31, %r0] 0x01, %r4 | |
2554 | .word 0x91d020b3 ! 357: Tcc_I ta icc_or_xcc, %r0 + 179 | |
2555 | .word 0x91902001 ! 358: WRPR_PIL_I wrpr %r0, 0x0001, %pil | |
2556 | .word 0x87802014 ! 359: WRASI_I wr %r0, 0x0014, %asi | |
2557 | .word 0x85450000 ! 360: RD_SET_SOFTINT rd %set_softint, %r2 | |
2558 | .word 0xa190200e ! 361: WRPR_GL_I wrpr %r0, 0x000e, %- | |
2559 | ta T_CHANGE_PRIV ! macro | |
2560 | .word 0x87902101 ! 363: WRPR_TT_I wrpr %r0, 0x0101, %tt | |
2561 | .word 0x93902000 ! 364: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2562 | nop | |
2563 | mov 0x80, %g3 | |
2564 | stxa %g3, [%g3] 0x57 | |
2565 | .word 0xc45fc000 ! 365: LDX_R ldx [%r31 + %r0], %r2 | |
2566 | splash_cmpr_0_150: | |
2567 | setx 0x23ebda58b4854b99, %g2, %g1 | |
2568 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2569 | sub %g1, 100, %g1 | |
2570 | .word 0xb1800001 ! 366: WR_STICK_REG_R wr %r0, %r1, %- | |
2571 | .word 0xc4c004a0 ! 367: LDSWA_R ldswa [%r0, %r0] 0x25, %r2 | |
2572 | splash_lsu_0_151: | |
2573 | setx 0xf3910776aa8806a5, %r1, %r2 | |
2574 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2575 | .word 0x3d400001 ! 368: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2576 | debug_0_152: | |
2577 | mov 0x38, %r18 | |
2578 | .word 0xfef00b12 ! 369: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2579 | otherw | |
2580 | mov 0xb2, %r30 | |
2581 | .word 0x91d0001e ! 370: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2582 | debug_0_153: | |
2583 | mov 8, %r18 | |
2584 | .word 0xdef00852 ! 371: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
2585 | .word 0x8d903ac1 ! 372: WRPR_PSTATE_I wrpr %r0, 0x1ac1, %pstate | |
2586 | intveclr_0_154: | |
2587 | set 0xd6d16d6e, %r28 | |
2588 | stxa %r28, [%g0] 0x72 | |
2589 | .word 0x25400001 ! 373: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2590 | debug_0_155: | |
2591 | mov 0x38, %r18 | |
2592 | .word 0xfef00b12 ! 374: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2593 | .word 0xc4d80e80 ! 375: LDXA_R ldxa [%r0, %r0] 0x74, %r2 | |
2594 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_156)) -> intp(0,0,19) | |
2595 | intvec_0_156: | |
2596 | .word 0x39400001 ! 376: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2597 | tagged_0_157: | |
2598 | taddcctv %r24, 0x18bb, %r25 | |
2599 | .word 0xc407e001 ! 377: LDUW_I lduw [%r31 + 0x0001], %r2 | |
2600 | .word 0x32700001 ! 378: BPNE <illegal instruction> | |
2601 | intveclr_0_158: | |
2602 | set 0x4f6646d8, %r28 | |
2603 | stxa %r28, [%g0] 0x72 | |
2604 | .word 0x25400001 ! 379: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2605 | .word 0x2a800001 ! 380: BCS bcs,a <label_0x1> | |
2606 | DS_0_159: | |
2607 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2608 | .word 0xe5318003 ! 1: STQF_R - %f18, [%r3, %r6] | |
2609 | normalw | |
2610 | .word 0x85458000 ! 381: RD_SOFTINT_REG rd %softint, %r2 | |
2611 | .word 0x8790235e ! 382: WRPR_TT_I wrpr %r0, 0x035e, %tt | |
2612 | .word 0x2e800001 ! 383: BVS bvs,a <label_0x1> | |
2613 | mondo_0_160: | |
2614 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2615 | ||
2616 | stxa %r16, [%r0+0x3c0] %asi | |
2617 | .word 0x9d948006 ! 384: WRPR_WSTATE_R wrpr %r18, %r6, %wstate | |
2618 | .word 0xc4d804a0 ! 385: LDXA_R ldxa [%r0, %r0] 0x25, %r2 | |
2619 | .word 0xc51fc000 ! 386: LDDF_R ldd [%r31, %r0], %f2 | |
2620 | .word 0x81460000 ! 387: RD_STICK_REG stbar | |
2621 | .word 0x87902094 ! 388: WRPR_TT_I wrpr %r0, 0x0094, %tt | |
2622 | .word 0x87802089 ! 389: WRASI_I wr %r0, 0x0089, %asi | |
2623 | nop | |
2624 | mov 0x80, %g3 | |
2625 | stxa %g3, [%g3] 0x57 | |
2626 | .word 0xc45fc000 ! 390: LDX_R ldx [%r31 + %r0], %r2 | |
2627 | .word 0xa984c007 ! 391: WR_SET_SOFTINT_R wr %r19, %r7, %set_softint | |
2628 | splash_cmpr_0_161: | |
2629 | setx 0x8f88bb57957d4cf5, %g2, %g1 | |
2630 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2631 | sub %g1, 100, %g1 | |
2632 | .word 0xb1800001 ! 392: WR_STICK_REG_R wr %r0, %r1, %- | |
2633 | .word 0xa1902004 ! 393: WRPR_GL_I wrpr %r0, 0x0004, %- | |
2634 | .word 0x8d902210 ! 394: WRPR_PSTATE_I wrpr %r0, 0x0210, %pstate | |
2635 | invalw | |
2636 | mov 0x30, %r30 | |
2637 | .word 0x91d0001e ! 395: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2638 | splash_htba_0_162: | |
2639 | set 0x00390000, %r2 | |
2640 | st %r1, [%r2+%r0] | |
2641 | ta T_CHANGE_HPRIV | |
2642 | set 0x003a0000, %r2 | |
2643 | .word 0x8b980002 ! 396: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2644 | splash_lsu_0_163: | |
2645 | setx 0xb55d31617b150f0f, %r1, %r2 | |
2646 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2647 | .word 0x3d400001 ! 397: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2648 | .word 0xc43fc007 ! 398: STD_R std %r2, [%r31 + %r7] | |
2649 | DS_0_164: | |
2650 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2651 | .xword 0xd948eb24 ! Random illegal ? | |
2652 | .word 0x8fa00550 ! 1: FSQRTd fsqrt | |
2653 | .word 0x9ba28822 ! 399: FADDs fadds %f10, %f2, %f13 | |
2654 | nop | |
2655 | mov 0x80, %g3 | |
2656 | stxa %g3, [%g3] 0x57 | |
2657 | .word 0xda5fc000 ! 400: LDX_R ldx [%r31 + %r0], %r13 | |
2658 | .word 0x87802063 ! 401: WRASI_I wr %r0, 0x0063, %asi | |
2659 | .word 0x99902004 ! 402: WRPR_CLEANWIN_I wrpr %r0, 0x0004, %cleanwin | |
2660 | .word 0xda8008a0 ! 403: LDUWA_R lduwa [%r0, %r0] 0x45, %r13 | |
2661 | otherw | |
2662 | mov 0x33, %r30 | |
2663 | .word 0x91d0001e ! 404: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2664 | .word 0xdb37c002 ! 405: STQF_R - %f13, [%r2, %r31] | |
2665 | .word 0xdb1fe001 ! 406: LDDF_I ldd [%r31, 0x0001], %f13 | |
2666 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_165)) -> intp(0,1,3) | |
2667 | xir_0_165: | |
2668 | .word 0xa9836001 ! 407: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
2669 | .word 0x87802020 ! 408: WRASI_I wr %r0, 0x0020, %asi | |
2670 | intveclr_0_166: | |
2671 | set 0xae299799, %r28 | |
2672 | stxa %r28, [%g0] 0x72 | |
2673 | .word 0x25400001 ! 409: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2674 | splash_cmpr_0_167: | |
2675 | setx 0xfa1925da6a19ec16, %g2, %g1 | |
2676 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2677 | sub %g1, 100, %g1 | |
2678 | .word 0xb1800001 ! 410: WR_STICK_REG_R wr %r0, %r1, %- | |
2679 | .word 0xda8fe010 ! 411: LDUBA_I lduba [%r31, + 0x0010] %asi, %r13 | |
2680 | .word 0x93902001 ! 412: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
2681 | .word 0x8d902488 ! 413: WRPR_PSTATE_I wrpr %r0, 0x0488, %pstate | |
2682 | .word 0x81460000 ! 414: RD_STICK_REG stbar | |
2683 | .word 0xda9fc020 ! 415: LDDA_R ldda [%r31, %r0] 0x01, %r13 | |
2684 | .word 0xdad7e030 ! 416: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r13 | |
2685 | .word 0x879023a7 ! 417: WRPR_TT_I wrpr %r0, 0x03a7, %tt | |
2686 | nop | |
2687 | mov 0x80, %g3 | |
2688 | stxa %g3, [%g3] 0x57 | |
2689 | .word 0xda5fc000 ! 418: LDX_R ldx [%r31 + %r0], %r13 | |
2690 | .word 0x30800001 ! 419: BA ba,a <label_0x1> | |
2691 | .word 0x91d02033 ! 420: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2692 | .word 0x9f802001 ! 421: SIR sir 0x0001 | |
2693 | .word 0xda8008a0 ! 422: LDUWA_R lduwa [%r0, %r0] 0x45, %r13 | |
2694 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_168)) -> intp(0,0,16) | |
2695 | intvec_0_168: | |
2696 | .word 0x39400001 ! 423: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2697 | .word 0xda97e000 ! 424: LDUHA_I lduha [%r31, + 0x0000] %asi, %r13 | |
2698 | .word 0xda47e001 ! 425: LDSW_I ldsw [%r31 + 0x0001], %r13 | |
2699 | debug_0_169: | |
2700 | setx debug_0_169 + 64, %r11, %r19 | |
2701 | mov 0x38, %r18 | |
2702 | .word 0xe6f00b12 ! 426: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2703 | .word 0x8b520000 ! 427: RDPR_PIL rdpr %pil, %r5 | |
2704 | .word 0xcb17c000 ! 428: LDQF_R - [%r31, %r0], %f5 | |
2705 | tagged_0_170: | |
2706 | tsubcctv %r18, 0x17c1, %r3 | |
2707 | .word 0xca07e001 ! 429: LDUW_I lduw [%r31 + 0x0001], %r5 | |
2708 | intveclr_0_171: | |
2709 | set 0x91a16260, %r28 | |
2710 | stxa %r28, [%g0] 0x72 | |
2711 | .word 0x25400001 ! 430: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2712 | tagged_0_172: | |
2713 | tsubcctv %r14, 0x1098, %r10 | |
2714 | .word 0xca07e001 ! 431: LDUW_I lduw [%r31 + 0x0001], %r5 | |
2715 | .word 0xa190200e ! 432: WRPR_GL_I wrpr %r0, 0x000e, %- | |
2716 | .word 0x81510000 ! 433: RDPR_TICK rdpr %tick, %r0 | |
2717 | splash_lsu_0_173: | |
2718 | setx 0x5d43c7c30f80871b, %r1, %r2 | |
2719 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2720 | .word 0x3d400001 ! 434: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2721 | tagged_0_174: | |
2722 | tsubcctv %r10, 0x1795, %r5 | |
2723 | .word 0xca07e001 ! 435: LDUW_I lduw [%r31 + 0x0001], %r5 | |
2724 | nop | |
2725 | mov 0x80, %g3 | |
2726 | stxa %g3, [%g3] 0x57 | |
2727 | .word 0xca5fc000 ! 436: LDX_R ldx [%r31 + %r0], %r5 | |
2728 | .word 0x8d9026e3 ! 437: WRPR_PSTATE_I wrpr %r0, 0x06e3, %pstate | |
2729 | mondo_0_175: | |
2730 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2731 | ||
2732 | stxa %r3, [%r0+0x3c8] %asi | |
2733 | .word 0x9d94c012 ! 438: WRPR_WSTATE_R wrpr %r19, %r18, %wstate | |
2734 | DS_0_176: | |
2735 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2736 | .xword 0xc3650e7f ! Random illegal ? | |
2737 | .word 0xc7148003 ! 1: LDQF_R - [%r18, %r3], %f3 | |
2738 | .word 0x87a40834 ! 439: FADDs fadds %f16, %f20, %f3 | |
2739 | DS_0_177: | |
2740 | nop | |
2741 | not %g0, %g2 | |
2742 | jmp %g2 | |
2743 | .word 0x9d902000 ! 440: WRPR_WSTATE_I wrpr %r0, 0x0000, %wstate | |
2744 | .word 0x9f802001 ! 441: SIR sir 0x0001 | |
2745 | DS_0_178: | |
2746 | nop | |
2747 | not %g0, %g2 | |
2748 | jmp %g2 | |
2749 | .word 0x9d902003 ! 442: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
2750 | splash_cmpr_0_179: | |
2751 | setx 0xf3671bf21023a8bf, %g2, %g1 | |
2752 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2753 | sub %g1, 100, %g1 | |
2754 | .word 0xb1800001 ! 443: WR_STICK_REG_R wr %r0, %r1, %- | |
2755 | mondo_0_180: | |
2756 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2757 | ||
2758 | stxa %r19, [%r0+0x3c8] %asi | |
2759 | .word 0x9d934006 ! 444: WRPR_WSTATE_R wrpr %r13, %r6, %wstate | |
2760 | .word 0xc68008a0 ! 445: LDUWA_R lduwa [%r0, %r0] 0x45, %r3 | |
2761 | splash_cmpr_0_181: | |
2762 | setx 0x027406da6be23ff6, %g2, %g1 | |
2763 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2764 | sub %g1, 100, %g1 | |
2765 | .word 0xb1800001 ! 446: WR_STICK_REG_R wr %r0, %r1, %- | |
2766 | .word 0xc657c000 ! 447: LDSH_R ldsh [%r31 + %r0], %r3 | |
2767 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_182)) -> intp(0,0,0) | |
2768 | intvec_0_182: | |
2769 | .word 0x39400001 ! 448: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2770 | debug_0_183: | |
2771 | mov 8, %r18 | |
2772 | .word 0xdef00852 ! 449: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
2773 | debug_0_184: | |
2774 | setx debug_0_184 + 64, %r11, %r19 | |
2775 | mov 0x38, %r18 | |
2776 | .word 0xe6f00b12 ! 450: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2777 | debug_0_185: | |
2778 | mov 0x38, %r18 | |
2779 | .word 0xfef00b12 ! 451: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2780 | .word 0x8d903468 ! 452: WRPR_PSTATE_I wrpr %r0, 0x1468, %pstate | |
2781 | .word 0x93902001 ! 453: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
2782 | .word 0x8d9020ff ! 454: WRPR_PSTATE_I wrpr %r0, 0x00ff, %pstate | |
2783 | .word 0xc71fc000 ! 455: LDDF_R ldd [%r31, %r0], %f3 | |
2784 | debug_0_186: | |
2785 | mov 8, %r18 | |
2786 | .word 0xd2f00852 ! 456: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
2787 | intveclr_0_187: | |
2788 | set 0xf3c1329, %r28 | |
2789 | stxa %r28, [%g0] 0x72 | |
2790 | .word 0x25400001 ! 457: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2791 | .word 0x87802063 ! 458: WRASI_I wr %r0, 0x0063, %asi | |
2792 | .word 0x8d9024c6 ! 459: WRPR_PSTATE_I wrpr %r0, 0x04c6, %pstate | |
2793 | debug_0_188: | |
2794 | mov 0x38, %r18 | |
2795 | .word 0xfef00b12 ! 460: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2796 | .word 0x8790233f ! 461: WRPR_TT_I wrpr %r0, 0x033f, %tt | |
2797 | .word 0xc737c006 ! 462: STQF_R - %f3, [%r6, %r31] | |
2798 | DS_0_189: | |
2799 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2800 | allclean | |
2801 | .word 0x87b08313 ! 463: ALIGNADDRESS alignaddr %r2, %r19, %r3 | |
2802 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_190)) -> intp(0,1,3) | |
2803 | xir_0_190: | |
2804 | .word 0xa9846001 ! 464: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
2805 | .word 0xc71fe001 ! 465: LDDF_I ldd [%r31, 0x0001], %f3 | |
2806 | .word 0xc6d00e80 ! 466: LDSHA_R ldsha [%r0, %r0] 0x74, %r3 | |
2807 | .word 0xc69fe001 ! 467: LDDA_I ldda [%r31, + 0x0001] %asi, %r3 | |
2808 | .word 0x8b450000 ! 468: RD_SET_SOFTINT rd %set_softint, %r5 | |
2809 | .word 0xa190200f ! 469: WRPR_GL_I wrpr %r0, 0x000f, %- | |
2810 | DS_0_191: | |
2811 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2812 | pdist %f4, %f16, %f26 | |
2813 | .word 0xa5b00314 ! 470: ALIGNADDRESS alignaddr %r0, %r20, %r18 | |
2814 | ta T_CHANGE_PRIV ! macro | |
2815 | splash_lsu_0_192: | |
2816 | setx 0x94d72e609cff81bb, %r1, %r2 | |
2817 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2818 | .word 0x3d400001 ! 472: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2819 | mondo_0_193: | |
2820 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2821 | ||
2822 | stxa %r17, [%r0+0x3c8] %asi | |
2823 | .word 0x9d94c008 ! 473: WRPR_WSTATE_R wrpr %r19, %r8, %wstate | |
2824 | .word 0x93d020b3 ! 474: Tcc_I tne icc_or_xcc, %r0 + 179 | |
2825 | .word 0x81510000 ! 475: RDPR_TICK rdpr %tick, %r0 | |
2826 | .word 0xe597e001 ! 476: LDQFA_I - [%r31, 0x0001], %f18 | |
2827 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_194)) -> intp(0,0,9) | |
2828 | intvec_0_194: | |
2829 | .word 0x39400001 ! 477: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2830 | debug_0_195: | |
2831 | mov 8, %r18 | |
2832 | .word 0xdcf00852 ! 478: STXA_R stxa %r14, [%r0 + %r18] 0x42 | |
2833 | debug_0_196: | |
2834 | setx debug_0_196 + 64, %r11, %r19 | |
2835 | mov 0x38, %r18 | |
2836 | .word 0xe6f00b12 ! 479: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2837 | nop | |
2838 | mov 0x80, %g3 | |
2839 | stxa %g3, [%g3] 0x5f | |
2840 | .word 0xe45fc000 ! 480: LDX_R ldx [%r31 + %r0], %r18 | |
2841 | .word 0x81982086 ! 481: WRHPR_HPSTATE_I wrhpr %r0, 0x0086, %hpstate | |
2842 | .word 0xe40fe001 ! 482: LDUB_I ldub [%r31 + 0x0001], %r18 | |
2843 | .word 0x93902000 ! 483: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2844 | .word 0xe41fc000 ! 484: LDD_R ldd [%r31 + %r0], %r18 | |
2845 | nop | |
2846 | mov 0x80, %g3 | |
2847 | stxa %g3, [%g3] 0x5f | |
2848 | .word 0xe45fc000 ! 485: LDX_R ldx [%r31 + %r0], %r18 | |
2849 | .word 0x81460000 ! 486: RD_STICK_REG stbar | |
2850 | nop | |
2851 | mov 0x80, %g3 | |
2852 | stxa %g3, [%g3] 0x5f | |
2853 | .word 0xe45fc000 ! 487: LDX_R ldx [%r31 + %r0], %r18 | |
2854 | .word 0x91d02033 ! 488: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2855 | .word 0x8e816001 ! 489: ADDcc_I addcc %r5, 0x0001, %r7 | |
2856 | .word 0x8d90300c ! 490: WRPR_PSTATE_I wrpr %r0, 0x100c, %pstate | |
2857 | .word 0x91d02034 ! 491: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2858 | .word 0xce8008a0 ! 492: LDUWA_R lduwa [%r0, %r0] 0x45, %r7 | |
2859 | .word 0x87802080 ! 493: WRASI_I wr %r0, 0x0080, %asi | |
2860 | splash_lsu_0_197: | |
2861 | setx 0x752482f3af333f29, %r1, %r2 | |
2862 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2863 | .word 0x3d400001 ! 494: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2864 | debug_0_198: | |
2865 | mov 8, %r18 | |
2866 | .word 0xe4f00852 ! 495: STXA_R stxa %r18, [%r0 + %r18] 0x42 | |
2867 | .word 0xa1902004 ! 496: WRPR_GL_I wrpr %r0, 0x0004, %- | |
2868 | .word 0xce800ae0 ! 497: LDUWA_R lduwa [%r0, %r0] 0x57, %r7 | |
2869 | debug_0_199: | |
2870 | setx debug_0_199 + 64, %r11, %r19 | |
2871 | mov 0x38, %r18 | |
2872 | .word 0xe6f00b12 ! 498: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2873 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_200)) -> intp(0,1,3) | |
2874 | xir_0_200: | |
2875 | .word 0xa982e001 ! 499: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
2876 | .word 0x879022f9 ! 500: WRPR_TT_I wrpr %r0, 0x02f9, %tt | |
2877 | mondo_0_201: | |
2878 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2879 | ||
2880 | stxa %r20, [%r0+0x3c0] %asi | |
2881 | .word 0x9d94000c ! 501: WRPR_WSTATE_R wrpr %r16, %r12, %wstate | |
2882 | .word 0x91d02033 ! 502: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2883 | .word 0xa1902005 ! 503: WRPR_GL_I wrpr %r0, 0x0005, %- | |
2884 | debug_0_202: | |
2885 | setx debug_0_202 + 64, %r11, %r19 | |
2886 | mov 0x38, %r18 | |
2887 | .word 0xe6f00b12 ! 504: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2888 | .word 0xce97e030 ! 505: LDUHA_I lduha [%r31, + 0x0030] %asi, %r7 | |
2889 | .word 0xced00e40 ! 506: LDSHA_R ldsha [%r0, %r0] 0x72, %r7 | |
2890 | .word 0xce47e001 ! 507: LDSW_I ldsw [%r31 + 0x0001], %r7 | |
2891 | debug_0_203: | |
2892 | mov 0x38, %r18 | |
2893 | .word 0xfef00b12 ! 508: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2894 | splash_cmpr_0_204: | |
2895 | setx 0xda2231b82843db32, %g2, %g1 | |
2896 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2897 | sub %g1, 100, %g1 | |
2898 | .word 0xb1800001 ! 509: WR_STICK_REG_R wr %r0, %r1, %- | |
2899 | .word 0xa480a001 ! 510: ADDcc_I addcc %r2, 0x0001, %r18 | |
2900 | .word 0x93902007 ! 511: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
2901 | splash_tba_0_205: | |
2902 | set 0x120000, %r2 | |
2903 | ld [%r2+%r0], %r1 | |
2904 | ta T_CHANGE_PRIV | |
2905 | set 0x120000, %r2 | |
2906 | .word 0x8b900002 ! 512: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2907 | change_to_randtl_0_206: | |
2908 | ta T_CHANGE_PRIV ! macro | |
2909 | done_change_to_randtl_0_206: | |
2910 | .word 0x8f902001 ! 513: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
2911 | .word 0xe49fc020 ! 514: LDDA_R ldda [%r31, %r0] 0x01, %r18 | |
2912 | debug_0_207: | |
2913 | mov 8, %r18 | |
2914 | .word 0xd6f00852 ! 515: STXA_R stxa %r11, [%r0 + %r18] 0x42 | |
2915 | splash_cmpr_0_208: | |
2916 | setx 0x0b7d0fbf23e59c08, %g2, %g1 | |
2917 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2918 | sub %g1, 100, %g1 | |
2919 | .word 0xb1800001 ! 516: WR_STICK_REG_R wr %r0, %r1, %- | |
2920 | .word 0x8790227d ! 517: WRPR_TT_I wrpr %r0, 0x027d, %tt | |
2921 | otherw | |
2922 | mov 0xb4, %r30 | |
2923 | .word 0x91d0001e ! 518: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2924 | .word 0x8d9035c0 ! 519: WRPR_PSTATE_I wrpr %r0, 0x15c0, %pstate | |
2925 | tagged_0_209: | |
2926 | taddcctv %r13, 0x1f05, %r17 | |
2927 | .word 0xe407e001 ! 520: LDUW_I lduw [%r31 + 0x0001], %r18 | |
2928 | .word 0x879023a4 ! 521: WRPR_TT_I wrpr %r0, 0x03a4, %tt | |
2929 | .word 0xa1902001 ! 522: WRPR_GL_I wrpr %r0, 0x0001, %- | |
2930 | .word 0xe47fe001 ! 523: SWAP_I swap %r18, [%r31 + 0x0001] | |
2931 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_210)) -> intp(0,0,3) | |
2932 | intvec_0_210: | |
2933 | .word 0x39400001 ! 524: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2934 | mondo_0_211: | |
2935 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2936 | ||
2937 | stxa %r6, [%r0+0x3d8] %asi | |
2938 | .word 0x9d94c014 ! 525: WRPR_WSTATE_R wrpr %r19, %r20, %wstate | |
2939 | debug_0_212: | |
2940 | mov 0x38, %r18 | |
2941 | .word 0xfef00b12 ! 526: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2942 | DS_0_213: | |
2943 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2944 | .word 0xbfefc000 ! 527: RESTORE_R restore %r31, %r0, %r31 | |
2945 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_214)) -> intp(0,0,30) | |
2946 | intvec_0_214: | |
2947 | .word 0x39400001 ! 528: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2948 | splash_lsu_0_215: | |
2949 | setx 0x28ea609106e342ff, %r1, %r2 | |
2950 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2951 | .word 0x3d400001 ! 529: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2952 | .word 0xe41fe001 ! 530: LDD_I ldd [%r31 + 0x0001], %r18 | |
2953 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_216)) -> intp(0,1,3) | |
2954 | xir_0_216: | |
2955 | .word 0xa9802001 ! 531: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
2956 | debug_0_217: | |
2957 | setx debug_0_217 + 64, %r11, %r19 | |
2958 | mov 0x38, %r18 | |
2959 | .word 0xe6f00b12 ! 532: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2960 | .word 0x87802089 ! 533: WRASI_I wr %r0, 0x0089, %asi | |
2961 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_218)) -> intp(0,0,19) | |
2962 | intvec_0_218: | |
2963 | .word 0x39400001 ! 534: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2964 | .word 0x36700001 ! 535: BPGE <illegal instruction> | |
2965 | splash_lsu_0_219: | |
2966 | setx 0x2765e6d9e79dfd8b, %r1, %r2 | |
2967 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2968 | .word 0x3d400001 ! 536: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2969 | debug_0_220: | |
2970 | setx debug_0_220 + 64, %r11, %r19 | |
2971 | mov 0x38, %r18 | |
2972 | .word 0xe6f00b12 ! 537: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2973 | .word 0x8780201c ! 538: WRASI_I wr %r0, 0x001c, %asi | |
2974 | .word 0x91d02035 ! 539: Tcc_I ta icc_or_xcc, %r0 + 53 | |
2975 | .word 0xe597e001 ! 540: LDQFA_I - [%r31, 0x0001], %f18 | |
2976 | .word 0x87802080 ! 541: WRASI_I wr %r0, 0x0080, %asi | |
2977 | debug_0_221: | |
2978 | mov 0x38, %r18 | |
2979 | .word 0xfef00b12 ! 542: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2980 | invalw | |
2981 | mov 0x33, %r30 | |
2982 | .word 0x83d0001e ! 543: Tcc_R te icc_or_xcc, %r0 + %r30 | |
2983 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_222)) -> intp(0,0,9) | |
2984 | intvec_0_222: | |
2985 | .word 0x39400001 ! 544: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2986 | debug_0_223: | |
2987 | setx debug_0_223 + 64, %r11, %r19 | |
2988 | mov 0x38, %r18 | |
2989 | .word 0xe6f00b12 ! 545: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2990 | DS_0_224: | |
2991 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2992 | .word 0xbfe7c000 ! 546: SAVE_R save %r31, %r0, %r31 | |
2993 | .word 0x81a149c6 ! 547: FDIVd fdivd %f36, %f6, %f0 | |
2994 | .word 0xc0c804a0 ! 548: LDSBA_R ldsba [%r0, %r0] 0x25, %r0 | |
2995 | .word 0xc11fe001 ! 549: LDDF_I ldd [%r31, 0x0001], %f0 | |
2996 | .word 0x8d802000 ! 550: WRFPRS_I wr %r0, 0x0000, %fprs | |
2997 | .word 0x89480000 ! 551: RDHPR_HPSTATE rdhpr %hpstate, %r4 | |
2998 | nop | |
2999 | mov 0x80, %g3 | |
3000 | stxa %g3, [%g3] 0x57 | |
3001 | .word 0xc85fc000 ! 552: LDX_R ldx [%r31 + %r0], %r4 | |
3002 | debug_0_225: | |
3003 | mov 8, %r18 | |
3004 | .word 0xd0f00852 ! 553: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
3005 | .word 0xc8800a60 ! 554: LDUWA_R lduwa [%r0, %r0] 0x53, %r4 | |
3006 | .word 0x8d802000 ! 555: WRFPRS_I wr %r0, 0x0000, %fprs | |
3007 | .word 0x8d90263c ! 556: WRPR_PSTATE_I wrpr %r0, 0x063c, %pstate | |
3008 | .word 0x87802089 ! 557: WRASI_I wr %r0, 0x0089, %asi | |
3009 | intveclr_0_226: | |
3010 | set 0x390e7a8d, %r28 | |
3011 | stxa %r28, [%g0] 0x72 | |
3012 | .word 0x25400001 ! 558: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3013 | otherw | |
3014 | mov 0x31, %r30 | |
3015 | .word 0x91d0001e ! 559: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3016 | .word 0xc81fc000 ! 560: LDD_R ldd [%r31 + %r0], %r4 | |
3017 | .word 0xc8c80e40 ! 561: LDSBA_R ldsba [%r0, %r0] 0x72, %r4 | |
3018 | debug_0_227: | |
3019 | mov 0x38, %r18 | |
3020 | .word 0xfef00b12 ! 562: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3021 | .word 0xc8c7e000 ! 563: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r4 | |
3022 | .word 0x83d020b2 ! 564: Tcc_I te icc_or_xcc, %r0 + 178 | |
3023 | invalw | |
3024 | mov 0xb3, %r30 | |
3025 | .word 0x83d0001e ! 565: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3026 | DS_0_228: | |
3027 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3028 | allclean | |
3029 | .word 0x8fb14309 ! 566: ALIGNADDRESS alignaddr %r5, %r9, %r7 | |
3030 | splash_cmpr_0_229: | |
3031 | setx 0x33e9ae88e33aa6ce, %g2, %g1 | |
3032 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3033 | sub %g1, 100, %g1 | |
3034 | .word 0xb1800001 ! 567: WR_STICK_REG_R wr %r0, %r1, %- | |
3035 | .word 0xce9004a0 ! 568: LDUHA_R lduha [%r0, %r0] 0x25, %r7 | |
3036 | .word 0xa1902007 ! 569: WRPR_GL_I wrpr %r0, 0x0007, %- | |
3037 | splash_tba_0_230: | |
3038 | set 0x120000, %r2 | |
3039 | st %r1, [%r2+%r0] | |
3040 | ta T_CHANGE_PRIV | |
3041 | set 0x120000, %r2 | |
3042 | .word 0x8b900002 ! 570: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3043 | .word 0x93902001 ! 571: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
3044 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_231)) -> intp(0,1,3) | |
3045 | xir_0_231: | |
3046 | .word 0xa9806001 ! 572: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
3047 | .word 0xce8fe030 ! 573: LDUBA_I lduba [%r31, + 0x0030] %asi, %r7 | |
3048 | .word 0xce8008a0 ! 574: LDUWA_R lduwa [%r0, %r0] 0x45, %r7 | |
3049 | .word 0x3a700001 ! 575: BPCC <illegal instruction> | |
3050 | .word 0xce8008a0 ! 576: LDUWA_R lduwa [%r0, %r0] 0x45, %r7 | |
3051 | .word 0xa168800a ! 577: SDIVX_R sdivx %r2, %r10, %r16 | |
3052 | .word 0x8d9037a5 ! 578: WRPR_PSTATE_I wrpr %r0, 0x17a5, %pstate | |
3053 | splash_lsu_0_232: | |
3054 | setx 0xaf7a729570ccf185, %r1, %r2 | |
3055 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3056 | .word 0x3d400001 ! 579: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3057 | otherw | |
3058 | mov 0x32, %r30 | |
3059 | .word 0x91d0001e ! 580: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3060 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_233)) -> intp(0,1,3) | |
3061 | xir_0_233: | |
3062 | .word 0xa9832001 ! 581: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
3063 | .word 0xe0d7e000 ! 582: LDSHA_I ldsha [%r31, + 0x0000] %asi, %r16 | |
3064 | tagged_0_234: | |
3065 | tsubcctv %r26, 0x1566, %r14 | |
3066 | .word 0xe007e001 ! 583: LDUW_I lduw [%r31 + 0x0001], %r16 | |
3067 | otherw | |
3068 | mov 0x33, %r30 | |
3069 | .word 0x83d0001e ! 584: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3070 | DS_0_235: | |
3071 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3072 | .word 0xbfe7c000 ! 585: SAVE_R save %r31, %r0, %r31 | |
3073 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_236)) -> intp(0,0,1) | |
3074 | intvec_0_236: | |
3075 | .word 0x39400001 ! 586: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3076 | splash_cmpr_0_237: | |
3077 | setx 0xec5c6da6e6e30a0d, %g2, %g1 | |
3078 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3079 | sub %g1, 100, %g1 | |
3080 | .word 0xb1800001 ! 587: WR_STICK_REG_R wr %r0, %r1, %- | |
3081 | .word 0xe047c000 ! 588: LDSW_R ldsw [%r31 + %r0], %r16 | |
3082 | .word 0xa1902007 ! 589: WRPR_GL_I wrpr %r0, 0x0007, %- | |
3083 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_238)) -> intp(0,1,3) | |
3084 | xir_0_238: | |
3085 | .word 0xa982e001 ! 590: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
3086 | set 0x85c2a208, %r28 | |
3087 | stxa %r28, [%g0] 0x73 | |
3088 | intvec_0_239: | |
3089 | .word 0x39400001 ! 591: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3090 | .word 0x8d902890 ! 592: WRPR_PSTATE_I wrpr %r0, 0x0890, %pstate | |
3091 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_240)) -> intp(0,1,3) | |
3092 | xir_0_240: | |
3093 | .word 0xa9832001 ! 593: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
3094 | .word 0xa9450000 ! 594: RD_SET_SOFTINT rd %set_softint, %r20 | |
3095 | .word 0xa9520000 ! 595: RDPR_PIL <illegal instruction> | |
3096 | set 0x763e9600, %r28 | |
3097 | stxa %r28, [%g0] 0x73 | |
3098 | intvec_0_241: | |
3099 | .word 0x39400001 ! 596: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3100 | .word 0xe8cfe020 ! 597: LDSBA_I ldsba [%r31, + 0x0020] %asi, %r20 | |
3101 | .word 0xa1902008 ! 598: WRPR_GL_I wrpr %r0, 0x0008, %- | |
3102 | .word 0xe917c000 ! 599: LDQF_R - [%r31, %r0], %f20 | |
3103 | .word 0x93902001 ! 600: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
3104 | .word 0xe997e001 ! 601: LDQFA_I - [%r31, 0x0001], %f20 | |
3105 | .word 0x8d903655 ! 602: WRPR_PSTATE_I wrpr %r0, 0x1655, %pstate | |
3106 | splash_htba_0_242: | |
3107 | set 0x80000, %r2 | |
3108 | st %r1, [%r2+%r0] | |
3109 | ta T_CHANGE_HPRIV | |
3110 | set 0x80000, %r2 | |
3111 | .word 0x8b980002 ! 603: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3112 | set 0xe82a36a3, %r28 | |
3113 | stxa %r28, [%g0] 0x73 | |
3114 | intvec_0_243: | |
3115 | .word 0x39400001 ! 604: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3116 | debug_0_244: | |
3117 | setx debug_0_244 + 64, %r11, %r19 | |
3118 | mov 0x38, %r18 | |
3119 | .word 0xe6f00b12 ! 605: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3120 | .word 0x9b454000 ! 606: RD_CLEAR_SOFTINT rd %clear_softint, %r13 | |
3121 | debug_0_245: | |
3122 | mov 0x38, %r18 | |
3123 | .word 0xfef00b12 ! 607: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3124 | splash_cmpr_0_246: | |
3125 | setx 0xaabddac63dfe6996, %g2, %g1 | |
3126 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3127 | sub %g1, 100, %g1 | |
3128 | .word 0xb1800001 ! 608: WR_STICK_REG_R wr %r0, %r1, %- | |
3129 | .word 0xda9004a0 ! 609: LDUHA_R lduha [%r0, %r0] 0x25, %r13 | |
3130 | .word 0x879022a4 ! 610: WRPR_TT_I wrpr %r0, 0x02a4, %tt | |
3131 | .word 0x87802058 ! 611: WRASI_I wr %r0, 0x0058, %asi | |
3132 | .word 0x81460000 ! 612: RD_STICK_REG stbar | |
3133 | .word 0x8d90205d ! 613: WRPR_PSTATE_I wrpr %r0, 0x005d, %pstate | |
3134 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
3135 | ta T_CHANGE_NONHPRIV ! macro | |
3136 | .word 0xa16d2001 ! 614: SDIVX_I sdivx %r20, 0x0001, %r16 | |
3137 | intveclr_0_248: | |
3138 | set 0x96790c4d, %r28 | |
3139 | stxa %r28, [%g0] 0x72 | |
3140 | .word 0x25400001 ! 615: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3141 | .word 0x91d02035 ! 616: Tcc_I ta icc_or_xcc, %r0 + 53 | |
3142 | debug_0_249: | |
3143 | mov 8, %r18 | |
3144 | .word 0xd4f00852 ! 617: STXA_R stxa %r10, [%r0 + %r18] 0x42 | |
3145 | change_to_randtl_0_250: | |
3146 | ta T_CHANGE_PRIV ! macro | |
3147 | done_change_to_randtl_0_250: | |
3148 | .word 0x8f902001 ! 618: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
3149 | .word 0xe0c804a0 ! 619: LDSBA_R ldsba [%r0, %r0] 0x25, %r16 | |
3150 | splash_lsu_0_251: | |
3151 | setx 0xdca49a160203f103, %r1, %r2 | |
3152 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3153 | .word 0x3d400001 ! 620: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3154 | intveclr_0_252: | |
3155 | set 0xcaf81d96, %r28 | |
3156 | stxa %r28, [%g0] 0x72 | |
3157 | .word 0x25400001 ! 621: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3158 | intveclr_0_253: | |
3159 | set 0x51494ca, %r28 | |
3160 | stxa %r28, [%g0] 0x72 | |
3161 | .word 0x25400001 ! 622: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3162 | debug_0_254: | |
3163 | mov 0x38, %r18 | |
3164 | .word 0xfef00b12 ! 623: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3165 | .word 0xe0c00e60 ! 624: LDSWA_R ldswa [%r0, %r0] 0x73, %r16 | |
3166 | splash_cmpr_0_255: | |
3167 | setx 0x14bdb30ced21ae34, %g2, %g1 | |
3168 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3169 | sub %g1, 100, %g1 | |
3170 | .word 0xb1800001 ! 625: WR_STICK_REG_R wr %r0, %r1, %- | |
3171 | .word 0xe117c000 ! 626: LDQF_R - [%r31, %r0], %f16 | |
3172 | debug_0_256: | |
3173 | setx debug_0_256 + 64, %r11, %r19 | |
3174 | mov 0x38, %r18 | |
3175 | .word 0xe6f00b12 ! 627: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3176 | .word 0x83d020b5 ! 628: Tcc_I te icc_or_xcc, %r0 + 181 | |
3177 | .word 0x8d9031ec ! 629: WRPR_PSTATE_I wrpr %r0, 0x11ec, %pstate | |
3178 | .word 0x81480000 ! 630: RDHPR_HPSTATE rdhpr %hpstate, %r0 | |
3179 | tagged_0_257: | |
3180 | taddcctv %r17, 0x14fe, %r1 | |
3181 | .word 0xc007e001 ! 631: LDUW_I lduw [%r31 + 0x0001], %r0 | |
3182 | splash_lsu_0_258: | |
3183 | setx 0x7f9ea1e172527905, %r1, %r2 | |
3184 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3185 | .word 0x3d400001 ! 632: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3186 | .word 0xc0cfe000 ! 633: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r0 | |
3187 | splash_cmpr_0_259: | |
3188 | setx 0x31a50635ab08c86c, %g2, %g1 | |
3189 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3190 | sub %g1, 100, %g1 | |
3191 | .word 0xb1800001 ! 634: WR_STICK_REG_R wr %r0, %r1, %- | |
3192 | nop | |
3193 | mov 0x80, %g3 | |
3194 | stxa %g3, [%g3] 0x57 | |
3195 | .word 0xc05fc000 ! 635: LDX_R ldx [%r31 + %r0], %r0 | |
3196 | .word 0xc08008a0 ! 636: LDUWA_R lduwa [%r0, %r0] 0x45, %r0 | |
3197 | .word 0x20800001 ! 637: BN bn,a <label_0x1> | |
3198 | .word 0xa1902000 ! 638: WRPR_GL_I wrpr %r0, 0x0000, %- | |
3199 | .word 0xc0c804a0 ! 639: LDSBA_R ldsba [%r0, %r0] 0x25, %r0 | |
3200 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_260)) -> intp(0,0,20) | |
3201 | intvec_0_260: | |
3202 | .word 0x39400001 ! 640: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3203 | mondo_0_261: | |
3204 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3205 | ||
3206 | stxa %r1, [%r0+0x3d8] %asi | |
3207 | .word 0x9d914002 ! 641: WRPR_WSTATE_R wrpr %r5, %r2, %wstate | |
3208 | .word 0xc08008a0 ! 642: LDUWA_R lduwa [%r0, %r0] 0x45, %r0 | |
3209 | .word 0x3e800001 ! 643: BVC bvc,a <label_0x1> | |
3210 | .word 0x93902005 ! 644: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
3211 | debug_0_262: | |
3212 | setx debug_0_262 + 64, %r11, %r19 | |
3213 | mov 0x38, %r18 | |
3214 | .word 0xe6f00b12 ! 645: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3215 | .word 0xc08008a0 ! 646: LDUWA_R lduwa [%r0, %r0] 0x45, %r0 | |
3216 | .word 0x93902007 ! 647: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
3217 | .word 0x93902000 ! 648: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
3218 | DS_0_263: | |
3219 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3220 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3221 | .word 0xd9114008 ! 1: LDQF_R - [%r5, %r8], %f12 | |
3222 | .word 0x83a50821 ! 649: FADDs fadds %f20, %f1, %f1 | |
3223 | splash_lsu_0_264: | |
3224 | setx 0x28bce0da4c0377b7, %r1, %r2 | |
3225 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3226 | .word 0x3d400001 ! 650: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3227 | splash_cmpr_0_265: | |
3228 | setx 0xa0c619e757f4c9ce, %g2, %g1 | |
3229 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3230 | sub %g1, 100, %g1 | |
3231 | .word 0xb1800001 ! 651: WR_STICK_REG_R wr %r0, %r1, %- | |
3232 | splash_lsu_0_266: | |
3233 | setx 0x62ee6caccbe2988f, %r1, %r2 | |
3234 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3235 | .word 0x3d400001 ! 652: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3236 | .word 0x87802089 ! 653: WRASI_I wr %r0, 0x0089, %asi | |
3237 | .word 0xc29fe001 ! 654: LDDA_I ldda [%r31, + 0x0001] %asi, %r1 | |
3238 | intveclr_0_267: | |
3239 | set 0x4e148e84, %r28 | |
3240 | stxa %r28, [%g0] 0x72 | |
3241 | .word 0x25400001 ! 655: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3242 | ta T_CHANGE_PRIV ! macro | |
3243 | splash_lsu_0_268: | |
3244 | setx 0x1d6801b9c67b24f3, %r1, %r2 | |
3245 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3246 | .word 0x3d400001 ! 657: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3247 | .word 0x93902007 ! 658: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
3248 | debug_0_269: | |
3249 | mov 0x38, %r18 | |
3250 | .word 0xfef00b12 ! 659: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3251 | .word 0xc2800a60 ! 660: LDUWA_R lduwa [%r0, %r0] 0x53, %r1 | |
3252 | .word 0x8afcc002 ! 661: SDIVcc_R sdivcc %r19, %r2, %r5 | |
3253 | debug_0_270: | |
3254 | mov 8, %r18 | |
3255 | .word 0xd2f00852 ! 662: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
3256 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_271)) -> intp(0,1,3) | |
3257 | xir_0_271: | |
3258 | .word 0xa9852001 ! 663: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
3259 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_272)) -> intp(0,0,20) | |
3260 | intvec_0_272: | |
3261 | .word 0x39400001 ! 664: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3262 | intveclr_0_273: | |
3263 | set 0xb0308b41, %r28 | |
3264 | stxa %r28, [%g0] 0x72 | |
3265 | .word 0x25400001 ! 665: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3266 | .word 0x81982307 ! 666: WRHPR_HPSTATE_I wrhpr %r0, 0x0307, %hpstate | |
3267 | ta T_CHANGE_HPRIV ! macro | |
3268 | .word 0xcb3fc002 ! 668: STDF_R std %f5, [%r2, %r31] | |
3269 | intveclr_0_274: | |
3270 | set 0x8dae0a06, %r28 | |
3271 | stxa %r28, [%g0] 0x72 | |
3272 | .word 0x25400001 ! 669: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3273 | DS_0_275: | |
3274 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3275 | .word 0xbfefc000 ! 670: RESTORE_R restore %r31, %r0, %r31 | |
3276 | debug_0_276: | |
3277 | mov 8, %r18 | |
3278 | .word 0xe8f00852 ! 671: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
3279 | .word 0xcac7e030 ! 672: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r5 | |
3280 | intveclr_0_277: | |
3281 | set 0x384590ea, %r28 | |
3282 | stxa %r28, [%g0] 0x72 | |
3283 | .word 0x25400001 ! 673: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3284 | splash_lsu_0_278: | |
3285 | setx 0xb1f648d5be5c10d7, %r1, %r2 | |
3286 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3287 | .word 0x3d400001 ! 674: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3288 | intveclr_0_279: | |
3289 | set 0x30a78feb, %r28 | |
3290 | stxa %r28, [%g0] 0x72 | |
3291 | .word 0x25400001 ! 675: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3292 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_280)) -> intp(0,0,26) | |
3293 | intvec_0_280: | |
3294 | .word 0x39400001 ! 676: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3295 | .word 0x8d903cd3 ! 677: WRPR_PSTATE_I wrpr %r0, 0x1cd3, %pstate | |
3296 | .word 0xca900e40 ! 678: LDUHA_R lduha [%r0, %r0] 0x72, %r5 | |
3297 | set 0x74ca4144, %r28 | |
3298 | stxa %r28, [%g0] 0x73 | |
3299 | intvec_0_281: | |
3300 | .word 0x39400001 ! 679: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3301 | .word 0x91d02032 ! 680: Tcc_I ta icc_or_xcc, %r0 + 50 | |
3302 | .word 0xca8fe030 ! 681: LDUBA_I lduba [%r31, + 0x0030] %asi, %r5 | |
3303 | .word 0x22700001 ! 682: BPE <illegal instruction> | |
3304 | .word 0xcb97e001 ! 683: LDQFA_I - [%r31, 0x0001], %f5 | |
3305 | .word 0x83454000 ! 684: RD_CLEAR_SOFTINT rd %clear_softint, %r1 | |
3306 | debug_0_282: | |
3307 | mov 8, %r18 | |
3308 | .word 0xdef00852 ! 685: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
3309 | debug_0_283: | |
3310 | setx debug_0_283 + 64, %r11, %r19 | |
3311 | mov 0x38, %r18 | |
3312 | .word 0xe6f00b12 ! 686: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3313 | DS_0_284: | |
3314 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3315 | .xword 0xed743759 ! Random illegal ? | |
3316 | .word 0xe314c010 ! 1: LDQF_R - [%r19, %r16], %f17 | |
3317 | .word 0xa5a14833 ! 687: FADDs fadds %f5, %f19, %f18 | |
3318 | set 0xe379084b, %r28 | |
3319 | stxa %r28, [%g0] 0x73 | |
3320 | intvec_0_285: | |
3321 | .word 0x39400001 ! 688: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3322 | .word 0x89480000 ! 689: RDHPR_HPSTATE rdhpr %hpstate, %r4 | |
3323 | splash_lsu_0_286: | |
3324 | setx 0x38b117cac5724c83, %r1, %r2 | |
3325 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3326 | .word 0x3d400001 ! 690: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3327 | ta T_CHANGE_HPRIV ! macro | |
3328 | .word 0xa1902009 ! 692: WRPR_GL_I wrpr %r0, 0x0009, %- | |
3329 | debug_0_287: | |
3330 | mov 0x38, %r18 | |
3331 | .word 0xfef00b12 ! 693: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3332 | change_to_randtl_0_288: | |
3333 | ta T_CHANGE_PRIV ! macro | |
3334 | done_change_to_randtl_0_288: | |
3335 | .word 0x8f902000 ! 694: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3336 | debug_0_289: | |
3337 | setx debug_0_289 + 64, %r11, %r19 | |
3338 | mov 0x38, %r18 | |
3339 | .word 0xe6f00b12 ! 695: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3340 | .word 0xc997e001 ! 696: LDQFA_I - [%r31, 0x0001], %f4 | |
3341 | DS_0_290: | |
3342 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3343 | .word 0xbfe7c000 ! 697: SAVE_R save %r31, %r0, %r31 | |
3344 | .word 0xc937c013 ! 698: STQF_R - %f4, [%r19, %r31] | |
3345 | .word 0xc81fe001 ! 699: LDD_I ldd [%r31 + 0x0001], %r4 | |
3346 | .word 0xa1a409c1 ! 700: FDIVd fdivd %f16, %f32, %f16 | |
3347 | .word 0x8745c000 ! 701: RD_TICK_CMPR_REG rd %-, %r3 | |
3348 | set 0x39e43c4, %r28 | |
3349 | stxa %r28, [%g0] 0x73 | |
3350 | intvec_0_291: | |
3351 | .word 0x39400001 ! 702: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3352 | .word 0xc68008a0 ! 703: LDUWA_R lduwa [%r0, %r0] 0x45, %r3 | |
3353 | .word 0xa981c013 ! 704: WR_SET_SOFTINT_R wr %r7, %r19, %set_softint | |
3354 | change_to_randtl_0_292: | |
3355 | ta T_CHANGE_PRIV ! macro | |
3356 | done_change_to_randtl_0_292: | |
3357 | .word 0x8f902001 ! 705: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
3358 | tagged_0_293: | |
3359 | taddcctv %r22, 0x1b8e, %r11 | |
3360 | .word 0xc607e001 ! 706: LDUW_I lduw [%r31 + 0x0001], %r3 | |
3361 | .word 0xa1902003 ! 707: WRPR_GL_I wrpr %r0, 0x0003, %- | |
3362 | intveclr_0_294: | |
3363 | set 0xc27150fb, %r28 | |
3364 | stxa %r28, [%g0] 0x72 | |
3365 | .word 0x25400001 ! 708: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3366 | .word 0x91d02033 ! 709: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3367 | .word 0xa782a001 ! 710: WR_GRAPHICS_STATUS_REG_I wr %r10, 0x0001, %- | |
3368 | splash_lsu_0_295: | |
3369 | setx 0x5b5603bb134b9dcf, %r1, %r2 | |
3370 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3371 | .word 0x3d400001 ! 711: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3372 | .word 0x87802004 ! 712: WRASI_I wr %r0, 0x0004, %asi | |
3373 | .word 0x93500000 ! 713: RDPR_TPC rdpr %tpc, %r9 | |
3374 | .word 0xd2cfe030 ! 714: LDSBA_I ldsba [%r31, + 0x0030] %asi, %r9 | |
3375 | mondo_0_296: | |
3376 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3377 | ||
3378 | stxa %r19, [%r0+0x3d0] %asi | |
3379 | .word 0x9d940005 ! 715: WRPR_WSTATE_R wrpr %r16, %r5, %wstate | |
3380 | .word 0x87802080 ! 716: WRASI_I wr %r0, 0x0080, %asi | |
3381 | .word 0x8d902917 ! 717: WRPR_PSTATE_I wrpr %r0, 0x0917, %pstate | |
3382 | .word 0x93902000 ! 718: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
3383 | DS_0_297: | |
3384 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3385 | .word 0xbfefc000 ! 719: RESTORE_R restore %r31, %r0, %r31 | |
3386 | splash_lsu_0_298: | |
3387 | setx 0x224754eb53b8fa3d, %r1, %r2 | |
3388 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3389 | .word 0x3d400001 ! 720: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3390 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_299)) -> intp(0,1,3) | |
3391 | xir_0_299: | |
3392 | .word 0xa9802001 ! 721: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
3393 | .word 0x8f464000 ! 722: RD_STICK_CMPR_REG rd %-, %r7 | |
3394 | .word 0x99902003 ! 723: WRPR_CLEANWIN_I wrpr %r0, 0x0003, %cleanwin | |
3395 | .word 0xce4fe001 ! 724: LDSB_I ldsb [%r31 + 0x0001], %r7 | |
3396 | .word 0xcecfe020 ! 725: LDSBA_I ldsba [%r31, + 0x0020] %asi, %r7 | |
3397 | .word 0xce4fc000 ! 726: LDSB_R ldsb [%r31 + %r0], %r7 | |
3398 | DS_0_300: | |
3399 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3400 | .word 0xbfefc000 ! 727: RESTORE_R restore %r31, %r0, %r31 | |
3401 | intveclr_0_301: | |
3402 | set 0x7282e397, %r28 | |
3403 | stxa %r28, [%g0] 0x72 | |
3404 | .word 0x25400001 ! 728: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3405 | change_to_randtl_0_302: | |
3406 | ta T_CHANGE_PRIV ! macro | |
3407 | done_change_to_randtl_0_302: | |
3408 | .word 0x8f902001 ! 729: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
3409 | DS_0_303: | |
3410 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3411 | allclean | |
3412 | .word 0x87b40305 ! 730: ALIGNADDRESS alignaddr %r16, %r5, %r3 | |
3413 | .word 0xc657c000 ! 731: LDSH_R ldsh [%r31 + %r0], %r3 | |
3414 | debug_0_304: | |
3415 | setx debug_0_304 + 64, %r11, %r19 | |
3416 | mov 0x38, %r18 | |
3417 | .word 0xe6f00b12 ! 732: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3418 | splash_cmpr_0_305: | |
3419 | setx 0xc4fe71fffd9e60dd, %g2, %g1 | |
3420 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3421 | sub %g1, 100, %g1 | |
3422 | .word 0xb1800001 ! 733: WR_STICK_REG_R wr %r0, %r1, %- | |
3423 | .word 0x3e700001 ! 734: BPVC <illegal instruction> | |
3424 | DS_0_306: | |
3425 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3426 | .xword 0x8b5d42b1 ! Random illegal ? | |
3427 | .word 0xe5130005 ! 1: LDQF_R - [%r12, %r5], %f18 | |
3428 | .word 0xa5a40832 ! 735: FADDs fadds %f16, %f18, %f18 | |
3429 | set 0xbb796769, %r28 | |
3430 | stxa %r28, [%g0] 0x73 | |
3431 | intvec_0_307: | |
3432 | .word 0x39400001 ! 736: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3433 | tagged_0_308: | |
3434 | tsubcctv %r14, 0x13fb, %r6 | |
3435 | .word 0xe407e001 ! 737: LDUW_I lduw [%r31 + 0x0001], %r18 | |
3436 | debug_0_309: | |
3437 | mov 8, %r18 | |
3438 | .word 0xe8f00852 ! 738: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
3439 | nop | |
3440 | mov 0x80, %g3 | |
3441 | stxa %g3, [%g3] 0x57 | |
3442 | .word 0xe45fc000 ! 739: LDX_R ldx [%r31 + %r0], %r18 | |
3443 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_310)) -> intp(0,0,17) | |
3444 | intvec_0_310: | |
3445 | .word 0x39400001 ! 740: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3446 | splash_lsu_0_311: | |
3447 | setx 0x3bdab74b0531606f, %r1, %r2 | |
3448 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3449 | .word 0x3d400001 ! 741: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3450 | .word 0x85520000 ! 742: RDPR_PIL rdpr %pil, %r2 | |
3451 | mondo_0_312: | |
3452 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3453 | ||
3454 | stxa %r2, [%r0+0x3e0] %asi | |
3455 | .word 0x9d908005 ! 743: WRPR_WSTATE_R wrpr %r2, %r5, %wstate | |
3456 | .word 0xc41fe001 ! 744: LDD_I ldd [%r31 + 0x0001], %r2 | |
3457 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3458 | ta T_CHANGE_NONHPRIV ! macro | |
3459 | .word 0x91a01969 ! 745: FqTOd dis not found | |
3460 | ||
3461 | mondo_0_314: | |
3462 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3463 | ||
3464 | stxa %r20, [%r0+0x3d8] %asi | |
3465 | .word 0x9d918006 ! 746: WRPR_WSTATE_R wrpr %r6, %r6, %wstate | |
3466 | .word 0x93902000 ! 747: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
3467 | splash_cmpr_0_315: | |
3468 | setx 0xa459f08ba3e1cf68, %g2, %g1 | |
3469 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3470 | sub %g1, 100, %g1 | |
3471 | .word 0xb1800001 ! 748: WR_STICK_REG_R wr %r0, %r1, %- | |
3472 | .word 0x28800001 ! 749: BLEU bleu,a <label_0x1> | |
3473 | .word 0xd097e010 ! 750: LDUHA_I lduha [%r31, + 0x0010] %asi, %r8 | |
3474 | debug_0_316: | |
3475 | setx debug_0_316 + 64, %r11, %r19 | |
3476 | mov 0x38, %r18 | |
3477 | .word 0xe6f00b12 ! 751: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3478 | .word 0xd08fe010 ! 752: LDUBA_I lduba [%r31, + 0x0010] %asi, %r8 | |
3479 | .word 0xd0dfe030 ! 753: LDXA_I ldxa [%r31, + 0x0030] %asi, %r8 | |
3480 | .word 0x91d02033 ! 754: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3481 | .word 0xd0dfe000 ! 755: LDXA_I ldxa [%r31, + 0x0000] %asi, %r8 | |
3482 | intveclr_0_317: | |
3483 | set 0x2f8e30a0, %r28 | |
3484 | stxa %r28, [%g0] 0x72 | |
3485 | .word 0x25400001 ! 756: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3486 | .word 0xd047e001 ! 757: LDSW_I ldsw [%r31 + 0x0001], %r8 | |
3487 | debug_0_318: | |
3488 | mov 8, %r18 | |
3489 | .word 0xd6f00852 ! 758: STXA_R stxa %r11, [%r0 + %r18] 0x42 | |
3490 | DS_0_319: | |
3491 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3492 | pdist %f22, %f8, %f2 | |
3493 | .word 0xa1b1c314 ! 759: ALIGNADDRESS alignaddr %r7, %r20, %r16 | |
3494 | .word 0xa1902003 ! 760: WRPR_GL_I wrpr %r0, 0x0003, %- | |
3495 | mondo_0_320: | |
3496 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3497 | ||
3498 | stxa %r2, [%r0+0x3c8] %asi | |
3499 | .word 0x9d94c010 ! 761: WRPR_WSTATE_R wrpr %r19, %r16, %wstate | |
3500 | .word 0xa7454000 ! 762: RD_CLEAR_SOFTINT rd %clear_softint, %r19 | |
3501 | .word 0x81982355 ! 763: WRHPR_HPSTATE_I wrhpr %r0, 0x0355, %hpstate | |
3502 | .word 0xe6800a60 ! 764: LDUWA_R lduwa [%r0, %r0] 0x53, %r19 | |
3503 | .word 0xe69fc020 ! 765: LDDA_R ldda [%r31, %r0] 0x01, %r19 | |
3504 | .word 0xa190200c ! 766: WRPR_GL_I wrpr %r0, 0x000c, %- | |
3505 | debug_0_321: | |
3506 | mov 8, %r18 | |
3507 | .word 0xdef00852 ! 767: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
3508 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_322)) -> intp(0,0,9) | |
3509 | intvec_0_322: | |
3510 | .word 0x39400001 ! 768: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3511 | .word 0x87902203 ! 769: WRPR_TT_I wrpr %r0, 0x0203, %tt | |
3512 | .word 0x87802004 ! 770: WRASI_I wr %r0, 0x0004, %asi | |
3513 | mondo_0_323: | |
3514 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3515 | ||
3516 | stxa %r16, [%r0+0x3d0] %asi | |
3517 | .word 0x9d94400c ! 771: WRPR_WSTATE_R wrpr %r17, %r12, %wstate | |
3518 | DS_0_324: | |
3519 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3520 | .word 0xbfefc000 ! 772: RESTORE_R restore %r31, %r0, %r31 | |
3521 | .word 0xe6c804a0 ! 773: LDSBA_R ldsba [%r0, %r0] 0x25, %r19 | |
3522 | tagged_0_325: | |
3523 | taddcctv %r19, 0x16cf, %r3 | |
3524 | .word 0xe607e001 ! 774: LDUW_I lduw [%r31 + 0x0001], %r19 | |
3525 | debug_0_326: | |
3526 | mov 0x38, %r18 | |
3527 | .word 0xfef00b12 ! 775: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3528 | .word 0x8d90373a ! 776: WRPR_PSTATE_I wrpr %r0, 0x173a, %pstate | |
3529 | mondo_0_327: | |
3530 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3531 | ||
3532 | stxa %r7, [%r0+0x3c0] %asi | |
3533 | .word 0x9d950008 ! 777: WRPR_WSTATE_R wrpr %r20, %r8, %wstate | |
3534 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_328)) -> intp(0,0,23) | |
3535 | intvec_0_328: | |
3536 | .word 0x39400001 ! 778: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3537 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_329)) -> intp(0,1,3) | |
3538 | xir_0_329: | |
3539 | .word 0xa981a001 ! 779: WR_SET_SOFTINT_I wr %r6, 0x0001, %set_softint | |
3540 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3541 | ta T_CHANGE_NONPRIV ! macro | |
3542 | .word 0xa1a01968 ! 780: FqTOd dis not found | |
3543 | ||
3544 | .word 0x87802004 ! 781: WRASI_I wr %r0, 0x0004, %asi | |
3545 | set 0xfef02076, %r28 | |
3546 | stxa %r28, [%g0] 0x73 | |
3547 | intvec_0_331: | |
3548 | .word 0x39400001 ! 782: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3549 | splash_cmpr_0_332: | |
3550 | setx 0x7e14af7476994b74, %g2, %g1 | |
3551 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3552 | sub %g1, 100, %g1 | |
3553 | .word 0xb1800001 ! 783: WR_STICK_REG_R wr %r0, %r1, %- | |
3554 | intveclr_0_333: | |
3555 | set 0xca813f0f, %r28 | |
3556 | stxa %r28, [%g0] 0x72 | |
3557 | .word 0x25400001 ! 784: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3558 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_334)) -> intp(0,0,0) | |
3559 | intvec_0_334: | |
3560 | .word 0x39400001 ! 785: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3561 | .word 0x9b540000 ! 786: RDPR_GL rdpr %-, %r13 | |
3562 | DS_0_335: | |
3563 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3564 | .word 0xd5312001 ! 1: STQF_I - %f10, [0x0001, %r4] | |
3565 | normalw | |
3566 | .word 0x8d458000 ! 787: RD_SOFTINT_REG rd %softint, %r6 | |
3567 | invalw | |
3568 | mov 0x32, %r30 | |
3569 | .word 0x91d0001e ! 788: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3570 | .word 0x8d903228 ! 789: WRPR_PSTATE_I wrpr %r0, 0x1228, %pstate | |
3571 | .word 0x97464000 ! 790: RD_STICK_CMPR_REG rd %-, %r11 | |
3572 | debug_0_336: | |
3573 | mov 8, %r18 | |
3574 | .word 0xd2f00852 ! 791: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
3575 | set 0xbbd4144d, %r28 | |
3576 | stxa %r28, [%g0] 0x73 | |
3577 | intvec_0_337: | |
3578 | .word 0x39400001 ! 792: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3579 | mondo_0_338: | |
3580 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3581 | ||
3582 | stxa %r7, [%r0+0x3d8] %asi | |
3583 | .word 0x9d918009 ! 793: WRPR_WSTATE_R wrpr %r6, %r9, %wstate | |
3584 | .word 0xd607c000 ! 794: LDUW_R lduw [%r31 + %r0], %r11 | |
3585 | .word 0x8790206c ! 795: WRPR_TT_I wrpr %r0, 0x006c, %tt | |
3586 | mondo_0_339: | |
3587 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3588 | ||
3589 | stxa %r16, [%r0+0x3d8] %asi | |
3590 | .word 0x9d92c014 ! 796: WRPR_WSTATE_R wrpr %r11, %r20, %wstate | |
3591 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3592 | ta T_CHANGE_NONPRIV ! macro | |
3593 | .word 0xa56ae001 ! 797: SDIVX_I sdivx %r11, 0x0001, %r18 | |
3594 | ta T_CHANGE_HPRIV ! macro | |
3595 | set 0x9879361, %r28 | |
3596 | stxa %r28, [%g0] 0x73 | |
3597 | intvec_0_341: | |
3598 | .word 0x39400001 ! 799: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3599 | splash_lsu_0_342: | |
3600 | setx 0x387a22608d7d44d1, %r1, %r2 | |
3601 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3602 | .word 0x3d400001 ! 800: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3603 | .word 0x95454000 ! 801: RD_CLEAR_SOFTINT rd %clear_softint, %r10 | |
3604 | intveclr_0_343: | |
3605 | set 0x251bf4c8, %r28 | |
3606 | stxa %r28, [%g0] 0x72 | |
3607 | .word 0x25400001 ! 802: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3608 | mondo_0_344: | |
3609 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3610 | ||
3611 | stxa %r3, [%r0+0x3e8] %asi | |
3612 | .word 0x9d924010 ! 803: WRPR_WSTATE_R wrpr %r9, %r16, %wstate | |
3613 | tagged_0_345: | |
3614 | taddcctv %r25, 0x1f0e, %r9 | |
3615 | .word 0xd407e001 ! 804: LDUW_I lduw [%r31 + 0x0001], %r10 | |
3616 | .word 0x91d020b3 ! 805: Tcc_I ta icc_or_xcc, %r0 + 179 | |
3617 | .word 0x2a800001 ! 806: BCS bcs,a <label_0x1> | |
3618 | .word 0xd48008a0 ! 807: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
3619 | splash_cmpr_0_346: | |
3620 | setx 0x2381ede3f7119d42, %g2, %g1 | |
3621 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3622 | sub %g1, 100, %g1 | |
3623 | .word 0xb1800001 ! 808: WR_STICK_REG_R wr %r0, %r1, %- | |
3624 | otherw | |
3625 | mov 0x31, %r30 | |
3626 | .word 0x91d0001e ! 809: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3627 | ta T_CHANGE_HPRIV ! macro | |
3628 | .word 0x93902006 ! 811: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
3629 | .word 0xd49fc020 ! 812: LDDA_R ldda [%r31, %r0] 0x01, %r10 | |
3630 | splash_cmpr_0_347: | |
3631 | setx 0x5c541e447319a838, %g2, %g1 | |
3632 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3633 | sub %g1, 100, %g1 | |
3634 | .word 0xb1800001 ! 813: WR_STICK_REG_R wr %r0, %r1, %- | |
3635 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_348)) -> intp(0,0,0) | |
3636 | intvec_0_348: | |
3637 | .word 0x39400001 ! 814: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3638 | .word 0x87802004 ! 815: WRASI_I wr %r0, 0x0004, %asi | |
3639 | nop | |
3640 | mov 0x80, %g3 | |
3641 | stxa %g3, [%g3] 0x57 | |
3642 | .word 0xd45fc000 ! 816: LDX_R ldx [%r31 + %r0], %r10 | |
3643 | .word 0x93902001 ! 817: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
3644 | .word 0xd48008a0 ! 818: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
3645 | tagged_0_349: | |
3646 | taddcctv %r4, 0x1f7f, %r7 | |
3647 | .word 0xd407e001 ! 819: LDUW_I lduw [%r31 + 0x0001], %r10 | |
3648 | .word 0xa7520000 ! 820: RDPR_PIL rdpr %pil, %r19 | |
3649 | nop | |
3650 | mov 0x80, %g3 | |
3651 | stxa %g3, [%g3] 0x57 | |
3652 | .word 0xe65fc000 ! 821: LDX_R ldx [%r31 + %r0], %r19 | |
3653 | .word 0xe6dfe000 ! 822: LDXA_I ldxa [%r31, + 0x0000] %asi, %r19 | |
3654 | .word 0x8d902c11 ! 823: WRPR_PSTATE_I wrpr %r0, 0x0c11, %pstate | |
3655 | nop | |
3656 | mov 0x80, %g3 | |
3657 | stxa %g3, [%g3] 0x5f | |
3658 | .word 0xe65fc000 ! 824: LDX_R ldx [%r31 + %r0], %r19 | |
3659 | splash_lsu_0_350: | |
3660 | setx 0x2b068741164c0e2b, %r1, %r2 | |
3661 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3662 | .word 0x3d400001 ! 825: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3663 | .word 0x8790220b ! 826: WRPR_TT_I wrpr %r0, 0x020b, %tt | |
3664 | splash_cmpr_0_351: | |
3665 | setx 0x96c86cd7cd879301, %g2, %g1 | |
3666 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3667 | sub %g1, 100, %g1 | |
3668 | .word 0xb1800001 ! 827: WR_STICK_REG_R wr %r0, %r1, %- | |
3669 | tagged_0_352: | |
3670 | tsubcctv %r9, 0x11d8, %r19 | |
3671 | .word 0xe607e001 ! 828: LDUW_I lduw [%r31 + 0x0001], %r19 | |
3672 | .word 0xe71fe001 ! 829: LDDF_I ldd [%r31, 0x0001], %f19 | |
3673 | intveclr_0_353: | |
3674 | set 0x2373a792, %r28 | |
3675 | stxa %r28, [%g0] 0x72 | |
3676 | .word 0x25400001 ! 830: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3677 | .word 0x87802063 ! 831: WRASI_I wr %r0, 0x0063, %asi | |
3678 | .word 0xe6bfe001 ! 832: STDA_I stda %r19, [%r31 + 0x0001] %asi | |
3679 | .word 0xe69fc020 ! 833: LDDA_R ldda [%r31, %r0] 0x01, %r19 | |
3680 | .word 0x99902004 ! 834: WRPR_CLEANWIN_I wrpr %r0, 0x0004, %cleanwin | |
3681 | .word 0xe6c7e000 ! 835: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r19 | |
3682 | .word 0xe63fc010 ! 836: STD_R std %r19, [%r31 + %r16] | |
3683 | .word 0xa190200e ! 837: WRPR_GL_I wrpr %r0, 0x000e, %- | |
3684 | .word 0x8790202a ! 838: WRPR_TT_I wrpr %r0, 0x002a, %tt | |
3685 | invalw | |
3686 | mov 0x31, %r30 | |
3687 | .word 0x91d0001e ! 839: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3688 | DS_0_354: | |
3689 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3690 | .word 0xc131e001 ! 1: STQF_I - %f0, [0x0001, %r7] | |
3691 | normalw | |
3692 | .word 0x9b458000 ! 840: RD_SOFTINT_REG rd %softint, %r13 | |
3693 | set 0xdf75f6a0, %r28 | |
3694 | stxa %r28, [%g0] 0x73 | |
3695 | intvec_0_355: | |
3696 | .word 0x39400001 ! 841: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3697 | .word 0x2c700001 ! 842: BPNEG <illegal instruction> | |
3698 | .word 0xda8804a0 ! 843: LDUBA_R lduba [%r0, %r0] 0x25, %r13 | |
3699 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_356)) -> intp(0,1,3) | |
3700 | xir_0_356: | |
3701 | .word 0xa9852001 ! 844: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
3702 | set 0x80e1ce87, %r28 | |
3703 | stxa %r28, [%g0] 0x73 | |
3704 | intvec_0_357: | |
3705 | .word 0x39400001 ! 845: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3706 | .word 0xdb27c010 ! 846: STF_R st %f13, [%r16, %r31] | |
3707 | splash_cmpr_0_358: | |
3708 | setx 0x7cf7c388378e6b11, %g2, %g1 | |
3709 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3710 | sub %g1, 100, %g1 | |
3711 | .word 0xb1800001 ! 847: WR_STICK_REG_R wr %r0, %r1, %- | |
3712 | .word 0x8d802000 ! 848: WRFPRS_I wr %r0, 0x0000, %fprs | |
3713 | mondo_0_359: | |
3714 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3715 | ||
3716 | stxa %r7, [%r0+0x3c0] %asi | |
3717 | .word 0x9d944006 ! 849: WRPR_WSTATE_R wrpr %r17, %r6, %wstate | |
3718 | debug_0_360: | |
3719 | mov 8, %r18 | |
3720 | .word 0xe2f00852 ! 850: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
3721 | .word 0x26700001 ! 851: BPL <illegal instruction> | |
3722 | tagged_0_361: | |
3723 | taddcctv %r17, 0x12e0, %r16 | |
3724 | .word 0xda07e001 ! 852: LDUW_I lduw [%r31 + 0x0001], %r13 | |
3725 | .word 0xda1fc000 ! 853: LDD_R ldd [%r31 + %r0], %r13 | |
3726 | .word 0x91d02033 ! 854: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3727 | tagged_0_362: | |
3728 | tsubcctv %r18, 0x15b3, %r7 | |
3729 | .word 0xda07e001 ! 855: LDUW_I lduw [%r31 + 0x0001], %r13 | |
3730 | splash_lsu_0_363: | |
3731 | setx 0x056c5cb21386e725, %r1, %r2 | |
3732 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3733 | .word 0x3d400001 ! 856: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3734 | .word 0x93540000 ! 857: RDPR_GL rdpr %-, %r9 | |
3735 | .word 0x8d9023df ! 858: WRPR_PSTATE_I wrpr %r0, 0x03df, %pstate | |
3736 | splash_lsu_0_364: | |
3737 | setx 0x2f3a63175dfe01d3, %r1, %r2 | |
3738 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3739 | .word 0x3d400001 ! 859: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3740 | .word 0x91d020b3 ! 860: Tcc_I ta icc_or_xcc, %r0 + 179 | |
3741 | set 0x2a6bc13c, %r28 | |
3742 | stxa %r28, [%g0] 0x73 | |
3743 | intvec_0_365: | |
3744 | .word 0x39400001 ! 861: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3745 | .word 0xd31fe001 ! 862: LDDF_I ldd [%r31, 0x0001], %f9 | |
3746 | debug_0_366: | |
3747 | mov 8, %r18 | |
3748 | .word 0xdef00852 ! 863: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
3749 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
3750 | ta T_CHANGE_NONHPRIV ! macro | |
3751 | .word 0x8d6c2001 ! 864: SDIVX_I sdivx %r16, 0x0001, %r6 | |
3752 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_368)) -> intp(0,0,30) | |
3753 | intvec_0_368: | |
3754 | .word 0x39400001 ! 865: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3755 | .word 0xccffc026 ! 866: SWAPA_R swapa %r6, [%r31 + %r6] 0x01 | |
3756 | debug_0_369: | |
3757 | mov 8, %r18 | |
3758 | .word 0xd2f00852 ! 867: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
3759 | debug_0_370: | |
3760 | setx debug_0_370 + 64, %r11, %r19 | |
3761 | mov 0x38, %r18 | |
3762 | .word 0xe6f00b12 ! 868: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3763 | debug_0_371: | |
3764 | mov 0x38, %r18 | |
3765 | .word 0xfef00b12 ! 869: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3766 | debug_0_372: | |
3767 | mov 8, %r18 | |
3768 | .word 0xdcf00852 ! 870: STXA_R stxa %r14, [%r0 + %r18] 0x42 | |
3769 | .word 0x36700001 ! 871: BPGE <illegal instruction> | |
3770 | .word 0x93902004 ! 872: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
3771 | .word 0x8d902fb2 ! 873: WRPR_PSTATE_I wrpr %r0, 0x0fb2, %pstate | |
3772 | .word 0x22800001 ! 874: BE be,a <label_0x1> | |
3773 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_373)) -> intp(0,1,3) | |
3774 | xir_0_373: | |
3775 | .word 0xa982a001 ! 875: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
3776 | .word 0xccdfe000 ! 876: LDXA_I ldxa [%r31, + 0x0000] %asi, %r6 | |
3777 | splash_htba_0_374: | |
3778 | set 0x80000, %r2 | |
3779 | st %r1, [%r2+%r0] | |
3780 | ta T_CHANGE_HPRIV | |
3781 | set 0x80000, %r2 | |
3782 | .word 0x8b980002 ! 877: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3783 | .word 0x81b48fe1 ! 878: FONES e %f0 | |
3784 | .word 0xc0cfe000 ! 879: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r0 | |
3785 | DS_0_375: | |
3786 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3787 | .word 0xbfe7c000 ! 880: SAVE_R save %r31, %r0, %r31 | |
3788 | .word 0xa1902003 ! 881: WRPR_GL_I wrpr %r0, 0x0003, %- | |
3789 | intveclr_0_376: | |
3790 | set 0xb6643518, %r28 | |
3791 | stxa %r28, [%g0] 0x72 | |
3792 | .word 0x25400001 ! 882: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3793 | debug_0_377: | |
3794 | mov 0x38, %r18 | |
3795 | .word 0xfef00b12 ! 883: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3796 | .word 0x8bb00fe7 ! 884: FONES e %f5 | |
3797 | debug_0_378: | |
3798 | mov 8, %r18 | |
3799 | .word 0xd4f00852 ! 885: STXA_R stxa %r10, [%r0 + %r18] 0x42 | |
3800 | nop | |
3801 | mov 0x80, %g3 | |
3802 | stxa %g3, [%g3] 0x57 | |
3803 | .word 0xca5fc000 ! 886: LDX_R ldx [%r31 + %r0], %r5 | |
3804 | .word 0xcb27e001 ! 887: STF_I st %f5, [0x0001, %r31] | |
3805 | tagged_0_379: | |
3806 | taddcctv %r16, 0x1621, %r20 | |
3807 | .word 0xca07e001 ! 888: LDUW_I lduw [%r31 + 0x0001], %r5 | |
3808 | .word 0x87802020 ! 889: WRASI_I wr %r0, 0x0020, %asi | |
3809 | .word 0xca4fc000 ! 890: LDSB_R ldsb [%r31 + %r0], %r5 | |
3810 | .word 0x87902389 ! 891: WRPR_TT_I wrpr %r0, 0x0389, %tt | |
3811 | splash_tba_0_380: | |
3812 | set 0x120000, %r2 | |
3813 | st %r1, [%r2+%r0] | |
3814 | ta T_CHANGE_PRIV | |
3815 | set 0x120000, %r2 | |
3816 | .word 0x8b900002 ! 892: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3817 | .word 0xca9fe001 ! 893: LDDA_I ldda [%r31, + 0x0001] %asi, %r5 | |
3818 | .word 0x91d02032 ! 894: Tcc_I ta icc_or_xcc, %r0 + 50 | |
3819 | .word 0xca8008a0 ! 895: LDUWA_R lduwa [%r0, %r0] 0x45, %r5 | |
3820 | .word 0x879021d1 ! 896: WRPR_TT_I wrpr %r0, 0x01d1, %tt | |
3821 | set 0x156f6360, %r28 | |
3822 | stxa %r28, [%g0] 0x73 | |
3823 | intvec_0_381: | |
3824 | .word 0x39400001 ! 897: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3825 | ta T_CHANGE_PRIV ! macro | |
3826 | nop | |
3827 | mov 0x80, %g3 | |
3828 | stxa %g3, [%g3] 0x5f | |
3829 | .word 0xca5fc000 ! 899: LDX_R ldx [%r31 + %r0], %r5 | |
3830 | .word 0xa7500000 ! 900: RDPR_TPC rdpr %tpc, %r19 | |
3831 | .word 0x93902002 ! 901: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3832 | intveclr_0_382: | |
3833 | set 0x8eee8be8, %r28 | |
3834 | stxa %r28, [%g0] 0x72 | |
3835 | .word 0x25400001 ! 902: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3836 | set 0x705ba5c9, %r28 | |
3837 | stxa %r28, [%g0] 0x73 | |
3838 | intvec_0_383: | |
3839 | .word 0x39400001 ! 903: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3840 | .word 0xe69fe001 ! 904: LDDA_I ldda [%r31, + 0x0001] %asi, %r19 | |
3841 | .word 0xe61fe001 ! 905: LDD_I ldd [%r31 + 0x0001], %r19 | |
3842 | .word 0x8d903f1e ! 906: WRPR_PSTATE_I wrpr %r0, 0x1f1e, %pstate | |
3843 | .word 0x95464000 ! 907: RD_STICK_CMPR_REG rd %-, %r10 | |
3844 | intveclr_0_384: | |
3845 | set 0x59614fc3, %r28 | |
3846 | stxa %r28, [%g0] 0x72 | |
3847 | .word 0x25400001 ! 908: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3848 | set 0xe94eeb3b, %r28 | |
3849 | stxa %r28, [%g0] 0x73 | |
3850 | intvec_0_385: | |
3851 | .word 0x39400001 ! 909: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3852 | .word 0xd4800c20 ! 910: LDUWA_R lduwa [%r0, %r0] 0x61, %r10 | |
3853 | DS_0_386: | |
3854 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3855 | .word 0xbfe7c000 ! 911: SAVE_R save %r31, %r0, %r31 | |
3856 | otherw | |
3857 | mov 0x33, %r30 | |
3858 | .word 0x83d0001e ! 912: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3859 | .word 0x91d020b4 ! 913: Tcc_I ta icc_or_xcc, %r0 + 180 | |
3860 | set 0xf6f579c, %r28 | |
3861 | stxa %r28, [%g0] 0x73 | |
3862 | intvec_0_387: | |
3863 | .word 0x39400001 ! 914: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3864 | DS_0_388: | |
3865 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3866 | .word 0xbfe7c000 ! 915: SAVE_R save %r31, %r0, %r31 | |
3867 | .word 0x8d90318d ! 916: WRPR_PSTATE_I wrpr %r0, 0x118d, %pstate | |
3868 | otherw | |
3869 | mov 0x30, %r30 | |
3870 | .word 0x83d0001e ! 917: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3871 | .word 0xa1a189b4 ! 918: FDIVs fdivs %f6, %f20, %f16 | |
3872 | .word 0xe01fc000 ! 919: LDD_R ldd [%r31 + %r0], %r16 | |
3873 | splash_htba_0_389: | |
3874 | set 0x80000, %r2 | |
3875 | ld [%r2+%r0], %r1 | |
3876 | ta T_CHANGE_HPRIV | |
3877 | set 0x80000, %r2 | |
3878 | .word 0x8b980002 ! 920: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3879 | debug_0_390: | |
3880 | mov 8, %r18 | |
3881 | .word 0xd2f00852 ! 921: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
3882 | debug_0_391: | |
3883 | setx debug_0_391 + 64, %r11, %r19 | |
3884 | mov 0x38, %r18 | |
3885 | .word 0xe6f00b12 ! 922: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3886 | invalw | |
3887 | mov 0x35, %r30 | |
3888 | .word 0x83d0001e ! 923: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3889 | .word 0xe027c014 ! 924: STW_R stw %r16, [%r31 + %r20] | |
3890 | .word 0xe04fc000 ! 925: LDSB_R ldsb [%r31 + %r0], %r16 | |
3891 | .word 0xe01fc000 ! 926: LDD_R ldd [%r31 + %r0], %r16 | |
3892 | .word 0xe0d80e80 ! 927: LDXA_R ldxa [%r0, %r0] 0x74, %r16 | |
3893 | debug_0_392: | |
3894 | mov 0x38, %r18 | |
3895 | .word 0xfef00b12 ! 928: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3896 | .word 0xa5540000 ! 929: RDPR_GL rdpr %-, %r18 | |
3897 | .word 0x879023e6 ! 930: WRPR_TT_I wrpr %r0, 0x03e6, %tt | |
3898 | .word 0x87802004 ! 931: WRASI_I wr %r0, 0x0004, %asi | |
3899 | nop | |
3900 | mov 0x80, %g3 | |
3901 | stxa %g3, [%g3] 0x57 | |
3902 | .word 0xe45fc000 ! 932: LDX_R ldx [%r31 + %r0], %r18 | |
3903 | .word 0x8d90240c ! 933: WRPR_PSTATE_I wrpr %r0, 0x040c, %pstate | |
3904 | set 0xbae814dd, %r28 | |
3905 | stxa %r28, [%g0] 0x73 | |
3906 | intvec_0_393: | |
3907 | .word 0x39400001 ! 934: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3908 | .word 0x93902003 ! 935: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
3909 | invalw | |
3910 | mov 0xb5, %r30 | |
3911 | .word 0x91d0001e ! 936: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3912 | .word 0x879020d7 ! 937: WRPR_TT_I wrpr %r0, 0x00d7, %tt | |
3913 | .word 0x81982b0e ! 938: WRHPR_HPSTATE_I wrhpr %r0, 0x0b0e, %hpstate | |
3914 | DS_0_394: | |
3915 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3916 | .word 0xbfe7c000 ! 939: SAVE_R save %r31, %r0, %r31 | |
3917 | nop | |
3918 | mov 0x80, %g3 | |
3919 | stxa %g3, [%g3] 0x5f | |
3920 | .word 0xe45fc000 ! 940: LDX_R ldx [%r31 + %r0], %r18 | |
3921 | mondo_0_395: | |
3922 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3923 | ||
3924 | stxa %r9, [%r0+0x3e8] %asi | |
3925 | .word 0x9d90c007 ! 941: WRPR_WSTATE_R wrpr %r3, %r7, %wstate | |
3926 | .word 0x8790214d ! 942: WRPR_TT_I wrpr %r0, 0x014d, %tt | |
3927 | tagged_0_396: | |
3928 | tsubcctv %r17, 0x170e, %r17 | |
3929 | .word 0xe407e001 ! 943: LDUW_I lduw [%r31 + 0x0001], %r18 | |
3930 | debug_0_397: | |
3931 | setx debug_0_397 + 64, %r11, %r19 | |
3932 | mov 0x38, %r18 | |
3933 | .word 0xe6f00b12 ! 944: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3934 | debug_0_398: | |
3935 | mov 0x38, %r18 | |
3936 | .word 0xfef00b12 ! 945: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3937 | .word 0x24800001 ! 946: BLE ble,a <label_0x1> | |
3938 | .word 0x20800001 ! 947: BN bn,a <label_0x1> | |
3939 | .word 0x9ad2e001 ! 948: UMULcc_I umulcc %r11, 0x0001, %r13 | |
3940 | .word 0x81460000 ! 949: RD_STICK_REG stbar | |
3941 | mondo_0_399: | |
3942 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3943 | ||
3944 | stxa %r6, [%r0+0x3d8] %asi | |
3945 | .word 0x9d940010 ! 950: WRPR_WSTATE_R wrpr %r16, %r16, %wstate | |
3946 | .word 0x93d020b2 ! 951: Tcc_I tne icc_or_xcc, %r0 + 178 | |
3947 | invalw | |
3948 | mov 0x33, %r30 | |
3949 | .word 0x83d0001e ! 952: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3950 | .word 0xa190200c ! 953: WRPR_GL_I wrpr %r0, 0x000c, %- | |
3951 | .word 0x8d9037f0 ! 954: WRPR_PSTATE_I wrpr %r0, 0x17f0, %pstate | |
3952 | .word 0x8790203c ! 955: WRPR_TT_I wrpr %r0, 0x003c, %tt | |
3953 | intveclr_0_400: | |
3954 | set 0x7e358d9c, %r28 | |
3955 | stxa %r28, [%g0] 0x72 | |
3956 | .word 0x25400001 ! 956: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3957 | mondo_0_401: | |
3958 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3959 | ||
3960 | stxa %r16, [%r0+0x3c0] %asi | |
3961 | .word 0x9d908009 ! 957: WRPR_WSTATE_R wrpr %r2, %r9, %wstate | |
3962 | .word 0x26700001 ! 958: BPL <illegal instruction> | |
3963 | debug_0_402: | |
3964 | mov 8, %r18 | |
3965 | .word 0xe8f00852 ! 959: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
3966 | .word 0x8d802000 ! 960: WRFPRS_I wr %r0, 0x0000, %fprs | |
3967 | .word 0x87902216 ! 961: WRPR_TT_I wrpr %r0, 0x0216, %tt | |
3968 | debug_0_403: | |
3969 | setx debug_0_403 + 64, %r11, %r19 | |
3970 | mov 0x38, %r18 | |
3971 | .word 0xe6f00b12 ! 962: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3972 | .word 0x9f802001 ! 963: SIR sir 0x0001 | |
3973 | nop | |
3974 | mov 0x80, %g3 | |
3975 | stxa %g3, [%g3] 0x57 | |
3976 | .word 0xda5fc000 ! 964: LDX_R ldx [%r31 + %r0], %r13 | |
3977 | .word 0xda1fe001 ! 965: LDD_I ldd [%r31 + 0x0001], %r13 | |
3978 | tagged_0_404: | |
3979 | tsubcctv %r12, 0x1283, %r14 | |
3980 | .word 0xda07e001 ! 966: LDUW_I lduw [%r31 + 0x0001], %r13 | |
3981 | otherw | |
3982 | mov 0xb5, %r30 | |
3983 | .word 0x91d0001e ! 967: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3984 | splash_lsu_0_405: | |
3985 | setx 0x62fb64e3d8e522b3, %r1, %r2 | |
3986 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3987 | .word 0x3d400001 ! 968: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3988 | .word 0xda800bc0 ! 969: LDUWA_R lduwa [%r0, %r0] 0x5e, %r13 | |
3989 | .word 0xa7464000 ! 970: RD_STICK_CMPR_REG rd %-, %r19 | |
3990 | tagged_0_406: | |
3991 | tsubcctv %r12, 0x1219, %r26 | |
3992 | .word 0xe607e001 ! 971: LDUW_I lduw [%r31 + 0x0001], %r19 | |
3993 | splash_lsu_0_407: | |
3994 | setx 0x16bed79bd943d995, %r1, %r2 | |
3995 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3996 | .word 0x3d400001 ! 972: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3997 | debug_0_408: | |
3998 | mov 8, %r18 | |
3999 | .word 0xd2f00852 ! 973: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
4000 | .word 0xe637e001 ! 974: STH_I sth %r19, [%r31 + 0x0001] | |
4001 | splash_lsu_0_409: | |
4002 | setx 0x4273626d22f17191, %r1, %r2 | |
4003 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4004 | .word 0x3d400001 ! 975: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4005 | nop | |
4006 | mov 0x80, %g3 | |
4007 | stxa %g3, [%g3] 0x57 | |
4008 | .word 0xe65fc000 ! 976: LDX_R ldx [%r31 + %r0], %r19 | |
4009 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_410)) -> intp(0,0,9) | |
4010 | intvec_0_410: | |
4011 | .word 0x39400001 ! 977: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4012 | .word 0xad852001 ! 978: WR_SOFTINT_REG_I wr %r20, 0x0001, %softint | |
4013 | .word 0xe6900e80 ! 979: LDUHA_R lduha [%r0, %r0] 0x74, %r19 | |
4014 | .word 0xe647e001 ! 980: LDSW_I ldsw [%r31 + 0x0001], %r19 | |
4015 | debug_0_411: | |
4016 | mov 8, %r18 | |
4017 | .word 0xdef00852 ! 981: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
4018 | .word 0xe68fe010 ! 982: LDUBA_I lduba [%r31, + 0x0010] %asi, %r19 | |
4019 | splash_lsu_0_412: | |
4020 | setx 0xf24236c9ba2fc743, %r1, %r2 | |
4021 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4022 | .word 0x3d400001 ! 983: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4023 | debug_0_413: | |
4024 | mov 0x38, %r18 | |
4025 | .word 0xfef00b12 ! 984: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4026 | .word 0x85520000 ! 985: RDPR_PIL rdpr %pil, %r2 | |
4027 | .word 0xc48008a0 ! 986: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
4028 | intveclr_0_414: | |
4029 | set 0x28417b74, %r28 | |
4030 | stxa %r28, [%g0] 0x72 | |
4031 | .word 0x25400001 ! 987: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4032 | .word 0x93902007 ! 988: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
4033 | debug_0_415: | |
4034 | setx debug_0_415 + 64, %r11, %r19 | |
4035 | mov 0x38, %r18 | |
4036 | .word 0xe6f00b12 ! 989: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4037 | .word 0x87902042 ! 990: WRPR_TT_I wrpr %r0, 0x0042, %tt | |
4038 | debug_0_416: | |
4039 | mov 0x38, %r18 | |
4040 | .word 0xfef00b12 ! 991: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4041 | .word 0xc48008a0 ! 992: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
4042 | otherw | |
4043 | mov 0x33, %r30 | |
4044 | .word 0x91d0001e ! 993: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4045 | .word 0x81464000 ! 994: RD_STICK_CMPR_REG stbar | |
4046 | .word 0xc03fc009 ! 995: STD_R std %r0, [%r31 + %r9] | |
4047 | .word 0x93902006 ! 996: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
4048 | splash_lsu_0_417: | |
4049 | setx 0x63577465fa094185, %r1, %r2 | |
4050 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4051 | .word 0x3d400001 ! 997: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4052 | splash_cmpr_0_418: | |
4053 | setx 0xc812d381c00cc8ae, %g2, %g1 | |
4054 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4055 | sub %g1, 100, %g1 | |
4056 | .word 0xb1800001 ! 998: WR_STICK_REG_R wr %r0, %r1, %- | |
4057 | mondo_0_419: | |
4058 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4059 | ||
4060 | stxa %r11, [%r0+0x3c0] %asi | |
4061 | .word 0x9d94c00c ! 999: WRPR_WSTATE_R wrpr %r19, %r12, %wstate | |
4062 | .word 0x93902001 ! 1000: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
4063 | .word 0x91d02032 ! 1001: Tcc_I ta icc_or_xcc, %r0 + 50 | |
4064 | debug_0_420: | |
4065 | mov 8, %r18 | |
4066 | .word 0xd0f00852 ! 1002: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
4067 | mondo_0_421: | |
4068 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4069 | ||
4070 | stxa %r8, [%r0+0x3d0] %asi | |
4071 | .word 0x9d908009 ! 1003: WRPR_WSTATE_R wrpr %r2, %r9, %wstate | |
4072 | mondo_0_422: | |
4073 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4074 | ||
4075 | stxa %r1, [%r0+0x3e8] %asi | |
4076 | .word 0x9d918007 ! 1004: WRPR_WSTATE_R wrpr %r6, %r7, %wstate | |
4077 | .word 0xc04fc000 ! 1005: LDSB_R ldsb [%r31 + %r0], %r0 | |
4078 | debug_0_423: | |
4079 | mov 8, %r18 | |
4080 | .word 0xe6f00852 ! 1006: STXA_R stxa %r19, [%r0 + %r18] 0x42 | |
4081 | mondo_0_424: | |
4082 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4083 | ||
4084 | stxa %r0, [%r0+0x3d0] %asi | |
4085 | .word 0x9d92000b ! 1007: WRPR_WSTATE_R wrpr %r8, %r11, %wstate | |
4086 | .word 0xa1902009 ! 1008: WRPR_GL_I wrpr %r0, 0x0009, %- | |
4087 | splash_cmpr_0_425: | |
4088 | setx 0x169ee421c4829043, %g2, %g1 | |
4089 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
4090 | sub %g1, 100, %g1 | |
4091 | .word 0xb1800001 ! 1009: WR_STICK_REG_R wr %r0, %r1, %- | |
4092 | .word 0x9f802001 ! 1010: SIR sir 0x0001 | |
4093 | change_to_randtl_0_426: | |
4094 | ta T_CHANGE_PRIV ! macro | |
4095 | done_change_to_randtl_0_426: | |
4096 | .word 0x8f902002 ! 1011: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
4097 | .word 0xc0800c20 ! 1012: LDUWA_R lduwa [%r0, %r0] 0x61, %r0 | |
4098 | DS_0_427: | |
4099 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4100 | .word 0xbfefc000 ! 1013: RESTORE_R restore %r31, %r0, %r31 | |
4101 | .word 0x8198208e ! 1014: WRHPR_HPSTATE_I wrhpr %r0, 0x008e, %hpstate | |
4102 | .word 0x8d903b22 ! 1015: WRPR_PSTATE_I wrpr %r0, 0x1b22, %pstate | |
4103 | .word 0x99902000 ! 1016: WRPR_CLEANWIN_I wrpr %r0, 0x0000, %cleanwin | |
4104 | .word 0x9b480000 ! 1017: RDHPR_HPSTATE rdhpr %hpstate, %r13 | |
4105 | tagged_0_428: | |
4106 | tsubcctv %r26, 0x1a23, %r3 | |
4107 | .word 0xda07e001 ! 1018: LDUW_I lduw [%r31 + 0x0001], %r13 | |
4108 | set 0xfdd82363, %r28 | |
4109 | stxa %r28, [%g0] 0x73 | |
4110 | intvec_0_429: | |
4111 | .word 0x39400001 ! 1019: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4112 | .word 0x8d9033e8 ! 1020: WRPR_PSTATE_I wrpr %r0, 0x13e8, %pstate | |
4113 | .word 0xdb37c00b ! 1021: STQF_R - %f13, [%r11, %r31] | |
4114 | invalw | |
4115 | mov 0xb4, %r30 | |
4116 | .word 0x93d0001e ! 1022: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
4117 | .word 0xdb27e001 ! 1023: STF_I st %f13, [0x0001, %r31] | |
4118 | .word 0x8d903625 ! 1024: WRPR_PSTATE_I wrpr %r0, 0x1625, %pstate | |
4119 | .word 0x8b540000 ! 1025: RDPR_GL rdpr %-, %r5 | |
4120 | .word 0x22800001 ! 1026: BE be,a <label_0x1> | |
4121 | intveclr_0_430: | |
4122 | set 0xf92fdfff, %r28 | |
4123 | stxa %r28, [%g0] 0x72 | |
4124 | .word 0x25400001 ! 1027: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4125 | otherw | |
4126 | mov 0x30, %r30 | |
4127 | .word 0x91d0001e ! 1028: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4128 | debug_0_431: | |
4129 | mov 0x38, %r18 | |
4130 | .word 0xfef00b12 ! 1029: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4131 | splash_cmpr_0_432: | |
4132 | setx 0xc68cacafb0b15197, %g2, %g1 | |
4133 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4134 | sub %g1, 100, %g1 | |
4135 | .word 0xb1800001 ! 1030: WR_STICK_REG_R wr %r0, %r1, %- | |
4136 | .word 0xcad804a0 ! 1031: LDXA_R ldxa [%r0, %r0] 0x25, %r5 | |
4137 | .word 0x93902007 ! 1032: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
4138 | .word 0x87450000 ! 1033: RD_SET_SOFTINT rd %set_softint, %r3 | |
4139 | .word 0x22800001 ! 1034: BE be,a <label_0x1> | |
4140 | .word 0x93d02035 ! 1035: Tcc_I tne icc_or_xcc, %r0 + 53 | |
4141 | .word 0xc71fc000 ! 1036: LDDF_R ldd [%r31, %r0], %f3 | |
4142 | .word 0x8d903a73 ! 1037: WRPR_PSTATE_I wrpr %r0, 0x1a73, %pstate | |
4143 | .word 0xad842001 ! 1038: WR_SOFTINT_REG_I wr %r16, 0x0001, %softint | |
4144 | .word 0x8cc42001 ! 1039: ADDCcc_I addccc %r16, 0x0001, %r6 | |
4145 | .word 0x81510000 ! 1040: RDPR_TICK <illegal instruction> | |
4146 | intveclr_0_433: | |
4147 | set 0x21c05ec9, %r28 | |
4148 | stxa %r28, [%g0] 0x72 | |
4149 | .word 0x25400001 ! 1041: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4150 | .word 0xccd00e60 ! 1042: LDSHA_R ldsha [%r0, %r0] 0x73, %r6 | |
4151 | .word 0x26700001 ! 1043: BPL <illegal instruction> | |
4152 | .word 0xa7802001 ! 1044: WR_GRAPHICS_STATUS_REG_I wr %r0, 0x0001, %- | |
4153 | .word 0x93902004 ! 1045: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
4154 | debug_0_434: | |
4155 | mov 0x38, %r18 | |
4156 | .word 0xfef00b12 ! 1046: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4157 | intveclr_0_435: | |
4158 | set 0xb28da189, %r28 | |
4159 | stxa %r28, [%g0] 0x72 | |
4160 | .word 0x25400001 ! 1047: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4161 | splash_cmpr_0_436: | |
4162 | setx 0x5abe0c4cb5091b07, %g2, %g1 | |
4163 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4164 | sub %g1, 100, %g1 | |
4165 | .word 0xb1800001 ! 1048: WR_STICK_REG_R wr %r0, %r1, %- | |
4166 | nop | |
4167 | mov 0x80, %g3 | |
4168 | stxa %g3, [%g3] 0x57 | |
4169 | .word 0xcc5fc000 ! 1049: LDX_R ldx [%r31 + %r0], %r6 | |
4170 | .word 0xcc1fc000 ! 1050: LDD_R ldd [%r31 + %r0], %r6 | |
4171 | .word 0x87802080 ! 1051: WRASI_I wr %r0, 0x0080, %asi | |
4172 | .word 0xcc4fc000 ! 1052: LDSB_R ldsb [%r31 + %r0], %r6 | |
4173 | mondo_0_437: | |
4174 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4175 | ||
4176 | stxa %r19, [%r0+0x3d8] %asi | |
4177 | .word 0x9d93000b ! 1053: WRPR_WSTATE_R wrpr %r12, %r11, %wstate | |
4178 | .word 0xcc9fe001 ! 1054: LDDA_I ldda [%r31, + 0x0001] %asi, %r6 | |
4179 | DS_0_438: | |
4180 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4181 | allclean | |
4182 | .word 0x99b28306 ! 1055: ALIGNADDRESS alignaddr %r10, %r6, %r12 | |
4183 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_439)) -> intp(0,1,3) | |
4184 | xir_0_439: | |
4185 | .word 0xa984e001 ! 1056: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
4186 | .word 0xd84fe001 ! 1057: LDSB_I ldsb [%r31 + 0x0001], %r12 | |
4187 | .word 0x87802055 ! 1058: WRASI_I wr %r0, 0x0055, %asi | |
4188 | .word 0x8d9031ed ! 1059: WRPR_PSTATE_I wrpr %r0, 0x11ed, %pstate | |
4189 | .word 0x8d903152 ! 1060: WRPR_PSTATE_I wrpr %r0, 0x1152, %pstate | |
4190 | splash_lsu_0_440: | |
4191 | setx 0x7e45f5231fa36a5b, %r1, %r2 | |
4192 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4193 | .word 0x3d400001 ! 1061: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4194 | .word 0x8b50c000 ! 1062: RDPR_TT rdpr %tt, %r5 | |
4195 | .word 0xcb27c006 ! 1063: STF_R st %f5, [%r6, %r31] | |
4196 | set 0xd781a876, %r28 | |
4197 | stxa %r28, [%g0] 0x73 | |
4198 | intvec_0_441: | |
4199 | .word 0x39400001 ! 1064: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4200 | nop | |
4201 | mov 0x80, %g3 | |
4202 | stxa %g3, [%g3] 0x5f | |
4203 | .word 0xca5fc000 ! 1065: LDX_R ldx [%r31 + %r0], %r5 | |
4204 | .word 0xa190200f ! 1066: WRPR_GL_I wrpr %r0, 0x000f, %- | |
4205 | .word 0x8d903961 ! 1067: WRPR_PSTATE_I wrpr %r0, 0x1961, %pstate | |
4206 | .word 0x8790217b ! 1068: WRPR_TT_I wrpr %r0, 0x017b, %tt | |
4207 | .word 0xca8804a0 ! 1069: LDUBA_R lduba [%r0, %r0] 0x25, %r5 | |
4208 | DS_0_442: | |
4209 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4210 | .word 0xd7344001 ! 1: STQF_R - %f11, [%r1, %r17] | |
4211 | normalw | |
4212 | .word 0x95458000 ! 1070: RD_SOFTINT_REG rd %softint, %r10 | |
4213 | DS_0_443: | |
4214 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4215 | .word 0xbfe7c000 ! 1071: SAVE_R save %r31, %r0, %r31 | |
4216 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_444)) -> intp(0,0,24) | |
4217 | intvec_0_444: | |
4218 | .word 0x39400001 ! 1072: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4219 | .word 0x83d02034 ! 1073: Tcc_I te icc_or_xcc, %r0 + 52 | |
4220 | .word 0x8d802000 ! 1074: WRFPRS_I wr %r0, 0x0000, %fprs | |
4221 | .word 0xa7480000 ! 1075: RDHPR_HPSTATE rdhpr %hpstate, %r19 | |
4222 | otherw | |
4223 | mov 0x31, %r30 | |
4224 | .word 0x91d0001e ! 1076: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4225 | .word 0xa3480000 ! 1077: RDHPR_HPSTATE rdhpr %hpstate, %r17 | |
4226 | .word 0xe29fe001 ! 1078: LDDA_I ldda [%r31, + 0x0001] %asi, %r17 | |
4227 | .word 0x81460000 ! 1079: RD_STICK_REG stbar | |
4228 | .word 0x91d02035 ! 1080: Tcc_I ta icc_or_xcc, %r0 + 53 | |
4229 | .word 0x26800001 ! 1081: BL bl,a <label_0x1> | |
4230 | tagged_0_445: | |
4231 | taddcctv %r19, 0x128d, %r23 | |
4232 | .word 0xe207e001 ! 1082: LDUW_I lduw [%r31 + 0x0001], %r17 | |
4233 | .word 0xe337c001 ! 1083: STQF_R - %f17, [%r1, %r31] | |
4234 | DS_0_446: | |
4235 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
4236 | pdist %f24, %f18, %f26 | |
4237 | .word 0x91b48304 ! 1084: ALIGNADDRESS alignaddr %r18, %r4, %r8 | |
4238 | .word 0x879022d4 ! 1085: WRPR_TT_I wrpr %r0, 0x02d4, %tt | |
4239 | set 0xe203cdac, %r28 | |
4240 | stxa %r28, [%g0] 0x73 | |
4241 | intvec_0_447: | |
4242 | .word 0x39400001 ! 1086: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4243 | .word 0xd127e001 ! 1087: STF_I st %f8, [0x0001, %r31] | |
4244 | debug_0_448: | |
4245 | setx debug_0_448 + 64, %r11, %r19 | |
4246 | mov 0x38, %r18 | |
4247 | .word 0xe6f00b12 ! 1088: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4248 | intveclr_0_449: | |
4249 | set 0xd510afea, %r28 | |
4250 | stxa %r28, [%g0] 0x72 | |
4251 | .word 0x25400001 ! 1089: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4252 | invalw | |
4253 | mov 0xb5, %r30 | |
4254 | .word 0x91d0001e ! 1090: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4255 | .word 0xd137c004 ! 1091: STQF_R - %f8, [%r4, %r31] | |
4256 | .word 0xa150c000 ! 1092: RDPR_TT rdpr %tt, %r16 | |
4257 | .word 0xe11fc000 ! 1093: LDDF_R ldd [%r31, %r0], %f16 | |
4258 | .word 0xe057c000 ! 1094: LDSH_R ldsh [%r31 + %r0], %r16 | |
4259 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_450)) -> intp(0,1,3) | |
4260 | xir_0_450: | |
4261 | .word 0xa9836001 ! 1095: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
4262 | .word 0x864b4001 ! 1096: MULX_R mulx %r13, %r1, %r3 | |
4263 | debug_0_451: | |
4264 | setx debug_0_451 + 64, %r11, %r19 | |
4265 | mov 0x38, %r18 | |
4266 | .word 0xe6f00b12 ! 1097: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4267 | .word 0x87902292 ! 1098: WRPR_TT_I wrpr %r0, 0x0292, %tt | |
4268 | splash_lsu_0_452: | |
4269 | setx 0xb88408ed78c42921, %r1, %r2 | |
4270 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4271 | .word 0x3d400001 ! 1099: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4272 | debug_0_453: | |
4273 | mov 8, %r18 | |
4274 | .word 0xe2f00852 ! 1100: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
4275 | .word 0xc61fc000 ! 1101: LDD_R ldd [%r31 + %r0], %r3 | |
4276 | .word 0x36800001 ! 1102: BGE bge,a <label_0x1> | |
4277 | .word 0xc68008a0 ! 1103: LDUWA_R lduwa [%r0, %r0] 0x45, %r3 | |
4278 | .word 0xc607c000 ! 1104: LDUW_R lduw [%r31 + %r0], %r3 | |
4279 | invalw | |
4280 | mov 0xb5, %r30 | |
4281 | .word 0x83d0001e ! 1105: Tcc_R te icc_or_xcc, %r0 + %r30 | |
4282 | invalw | |
4283 | mov 0x31, %r30 | |
4284 | .word 0x83d0001e ! 1106: Tcc_R te icc_or_xcc, %r0 + %r30 | |
4285 | intveclr_0_454: | |
4286 | set 0xd05b305, %r28 | |
4287 | stxa %r28, [%g0] 0x72 | |
4288 | .word 0x25400001 ! 1107: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4289 | .word 0xc61fc000 ! 1108: LDD_R ldd [%r31 + %r0], %r3 | |
4290 | .word 0xc6c004a0 ! 1109: LDSWA_R ldswa [%r0, %r0] 0x25, %r3 | |
4291 | .word 0xa1902004 ! 1110: WRPR_GL_I wrpr %r0, 0x0004, %- | |
4292 | debug_0_455: | |
4293 | mov 0x38, %r18 | |
4294 | .word 0xfef00b12 ! 1111: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4295 | .word 0x9f802001 ! 1112: SIR sir 0x0001 | |
4296 | .word 0x87802014 ! 1113: WRASI_I wr %r0, 0x0014, %asi | |
4297 | .word 0xc69004a0 ! 1114: LDUHA_R lduha [%r0, %r0] 0x25, %r3 | |
4298 | splash_cmpr_0_456: | |
4299 | setx 0x520d9a00391f52d3, %g2, %g1 | |
4300 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4301 | sub %g1, 100, %g1 | |
4302 | .word 0xb1800001 ! 1115: WR_STICK_REG_R wr %r0, %r1, %- | |
4303 | .word 0xc607c000 ! 1116: LDUW_R lduw [%r31 + %r0], %r3 | |
4304 | .word 0x93902006 ! 1117: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
4305 | set 0x463a8e98, %r28 | |
4306 | stxa %r28, [%g0] 0x73 | |
4307 | intvec_0_457: | |
4308 | .word 0x39400001 ! 1118: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4309 | .word 0xc6ffc021 ! 1119: SWAPA_R swapa %r3, [%r31 + %r1] 0x01 | |
4310 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_458)) -> intp(0,1,3) | |
4311 | xir_0_458: | |
4312 | .word 0xa9846001 ! 1120: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
4313 | set 0x15dbb691, %r28 | |
4314 | stxa %r28, [%g0] 0x73 | |
4315 | intvec_0_459: | |
4316 | .word 0x39400001 ! 1121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4317 | .word 0xc63fe001 ! 1122: STD_I std %r3, [%r31 + 0x0001] | |
4318 | .word 0x9550c000 ! 1123: RDPR_TT rdpr %tt, %r10 | |
4319 | invalw | |
4320 | mov 0x33, %r30 | |
4321 | .word 0x91d0001e ! 1124: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4322 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_460)) -> intp(0,1,3) | |
4323 | xir_0_460: | |
4324 | .word 0xa982a001 ! 1125: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
4325 | .word 0x87802058 ! 1126: WRASI_I wr %r0, 0x0058, %asi | |
4326 | .word 0xd4dfe000 ! 1127: LDXA_I ldxa [%r31, + 0x0000] %asi, %r10 | |
4327 | .word 0x87802088 ! 1128: WRASI_I wr %r0, 0x0088, %asi | |
4328 | splash_lsu_0_461: | |
4329 | setx 0x3c1557e2f49b7321, %r1, %r2 | |
4330 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4331 | .word 0x3d400001 ! 1129: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4332 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_462)) -> intp(0,0,14) | |
4333 | intvec_0_462: | |
4334 | .word 0x39400001 ! 1130: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4335 | nop | |
4336 | mov 0x80, %g3 | |
4337 | stxa %g3, [%g3] 0x57 | |
4338 | .word 0xd45fc000 ! 1131: LDX_R ldx [%r31 + %r0], %r10 | |
4339 | .word 0xd4d004a0 ! 1132: LDSHA_R ldsha [%r0, %r0] 0x25, %r10 | |
4340 | set 0x4bb627bf, %r28 | |
4341 | stxa %r28, [%g0] 0x73 | |
4342 | intvec_0_463: | |
4343 | .word 0x39400001 ! 1133: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4344 | intveclr_0_464: | |
4345 | set 0x1442b535, %r28 | |
4346 | stxa %r28, [%g0] 0x72 | |
4347 | .word 0x25400001 ! 1134: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4348 | debug_0_465: | |
4349 | mov 8, %r18 | |
4350 | .word 0xe6f00852 ! 1135: STXA_R stxa %r19, [%r0 + %r18] 0x42 | |
4351 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_466)) -> intp(0,0,21) | |
4352 | intvec_0_466: | |
4353 | .word 0x39400001 ! 1136: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4354 | tagged_0_467: | |
4355 | taddcctv %r7, 0x1406, %r16 | |
4356 | .word 0xd407e001 ! 1137: LDUW_I lduw [%r31 + 0x0001], %r10 | |
4357 | DS_0_468: | |
4358 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4359 | allclean | |
4360 | .word 0x81b1c302 ! 1138: ALIGNADDRESS alignaddr %r7, %r2, %r0 | |
4361 | .word 0xc08fe030 ! 1139: LDUBA_I lduba [%r31, + 0x0030] %asi, %r0 | |
4362 | debug_0_469: | |
4363 | setx debug_0_469 + 64, %r11, %r19 | |
4364 | mov 0x38, %r18 | |
4365 | .word 0xe6f00b12 ! 1140: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4366 | .word 0x93902002 ! 1141: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
4367 | debug_0_470: | |
4368 | mov 0x38, %r18 | |
4369 | .word 0xfef00b12 ! 1142: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4370 | .word 0xc08008a0 ! 1143: LDUWA_R lduwa [%r0, %r0] 0x45, %r0 | |
4371 | .word 0x9553c000 ! 1144: RDPR_FQ <illegal instruction> | |
4372 | tagged_0_471: | |
4373 | taddcctv %r2, 0x1971, %r9 | |
4374 | .word 0xd407e001 ! 1145: LDUW_I lduw [%r31 + 0x0001], %r10 | |
4375 | debug_0_472: | |
4376 | setx debug_0_472 + 64, %r11, %r19 | |
4377 | mov 0x38, %r18 | |
4378 | .word 0xe6f00b12 ! 1146: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4379 | .word 0xd517c000 ! 1147: LDQF_R - [%r31, %r0], %f10 | |
4380 | mondo_0_473: | |
4381 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4382 | ||
4383 | stxa %r7, [%r0+0x3d8] %asi | |
4384 | .word 0x9d920001 ! 1148: WRPR_WSTATE_R wrpr %r8, %r1, %wstate | |
4385 | .word 0x83d02034 ! 1149: Tcc_I te icc_or_xcc, %r0 + 52 | |
4386 | invalw | |
4387 | mov 0x33, %r30 | |
4388 | .word 0x91d0001e ! 1150: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4389 | .word 0x91520000 ! 1151: RDPR_PIL rdpr %pil, %r8 | |
4390 | nop | |
4391 | mov 0x80, %g3 | |
4392 | stxa %g3, [%g3] 0x57 | |
4393 | .word 0xd05fc000 ! 1152: LDX_R ldx [%r31 + %r0], %r8 | |
4394 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_474)) -> intp(0,1,3) | |
4395 | xir_0_474: | |
4396 | .word 0xa980e001 ! 1153: WR_SET_SOFTINT_I wr %r3, 0x0001, %set_softint | |
4397 | .word 0xad852001 ! 1154: WR_SOFTINT_REG_I wr %r20, 0x0001, %softint | |
4398 | .word 0xa1902003 ! 1155: WRPR_GL_I wrpr %r0, 0x0003, %- | |
4399 | debug_0_475: | |
4400 | setx debug_0_475 + 64, %r11, %r19 | |
4401 | mov 0x38, %r18 | |
4402 | .word 0xe6f00b12 ! 1156: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4403 | .word 0xd01fe001 ! 1157: LDD_I ldd [%r31 + 0x0001], %r8 | |
4404 | .word 0xd0c804a0 ! 1158: LDSBA_R ldsba [%r0, %r0] 0x25, %r8 | |
4405 | debug_0_476: | |
4406 | mov 0x38, %r18 | |
4407 | .word 0xfef00b12 ! 1159: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4408 | .word 0xa1902007 ! 1160: WRPR_GL_I wrpr %r0, 0x0007, %- | |
4409 | DS_0_477: | |
4410 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4411 | .word 0xbfefc000 ! 1161: RESTORE_R restore %r31, %r0, %r31 | |
4412 | change_to_randtl_0_478: | |
4413 | ta T_CHANGE_PRIV ! macro | |
4414 | done_change_to_randtl_0_478: | |
4415 | .word 0x8f902002 ! 1162: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
4416 | mondo_0_479: | |
4417 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4418 | ||
4419 | stxa %r18, [%r0+0x3d8] %asi | |
4420 | .word 0x9d944014 ! 1163: WRPR_WSTATE_R wrpr %r17, %r20, %wstate | |
4421 | .word 0xd0880e80 ! 1164: LDUBA_R lduba [%r0, %r0] 0x74, %r8 | |
4422 | debug_0_480: | |
4423 | mov 8, %r18 | |
4424 | .word 0xe4f00852 ! 1165: STXA_R stxa %r18, [%r0 + %r18] 0x42 | |
4425 | .word 0xa1902008 ! 1166: WRPR_GL_I wrpr %r0, 0x0008, %- | |
4426 | intveclr_0_481: | |
4427 | set 0xef176a4a, %r28 | |
4428 | stxa %r28, [%g0] 0x72 | |
4429 | .word 0x25400001 ! 1167: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4430 | splash_lsu_0_482: | |
4431 | setx 0xed3608828f02596b, %r1, %r2 | |
4432 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4433 | .word 0x3d400001 ! 1168: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4434 | splash_htba_0_483: | |
4435 | set 0x003b0000, %r2 | |
4436 | ld [%r2+%r0], %r1 | |
4437 | ta T_CHANGE_HPRIV | |
4438 | set 0x00380000, %r2 | |
4439 | .word 0x8b980002 ! 1169: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
4440 | .word 0x81510000 ! 1170: RDPR_TICK rdpr %tick, %r0 | |
4441 | debug_0_484: | |
4442 | setx debug_0_484 + 64, %r11, %r19 | |
4443 | mov 0x38, %r18 | |
4444 | .word 0xe6f00b12 ! 1171: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4445 | debug_0_485: | |
4446 | mov 0x38, %r18 | |
4447 | .word 0xfef00b12 ! 1172: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4448 | .word 0x24800001 ! 1173: BLE ble,a <label_0x1> | |
4449 | nop | |
4450 | mov 0x80, %g3 | |
4451 | stxa %g3, [%g3] 0x57 | |
4452 | .word 0xd05fc000 ! 1174: LDX_R ldx [%r31 + %r0], %r8 | |
4453 | .word 0x91d020b5 ! 1175: Tcc_I ta icc_or_xcc, %r0 + 181 | |
4454 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_486)) -> intp(0,1,3) | |
4455 | xir_0_486: | |
4456 | .word 0xa9822001 ! 1176: WR_SET_SOFTINT_I wr %r8, 0x0001, %set_softint | |
4457 | .word 0xd057c000 ! 1177: LDSH_R ldsh [%r31 + %r0], %r8 | |
4458 | .word 0x83d02032 ! 1178: Tcc_I te icc_or_xcc, %r0 + 50 | |
4459 | .word 0x956d0011 ! 1179: SDIVX_R sdivx %r20, %r17, %r10 | |
4460 | .word 0x91d02032 ! 1180: Tcc_I ta icc_or_xcc, %r0 + 50 | |
4461 | nop | |
4462 | mov 0x80, %g3 | |
4463 | stxa %g3, [%g3] 0x5f | |
4464 | .word 0xd45fc000 ! 1181: LDX_R ldx [%r31 + %r0], %r10 | |
4465 | debug_0_487: | |
4466 | setx debug_0_487 + 64, %r11, %r19 | |
4467 | mov 0x38, %r18 | |
4468 | .word 0xe6f00b12 ! 1182: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4469 | .word 0x91d02033 ! 1183: Tcc_I ta icc_or_xcc, %r0 + 51 | |
4470 | .word 0xd4800bc0 ! 1184: LDUWA_R lduwa [%r0, %r0] 0x5e, %r10 | |
4471 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_488)) -> intp(0,0,12) | |
4472 | intvec_0_488: | |
4473 | .word 0x39400001 ! 1185: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4474 | .word 0x87802016 ! 1186: WRASI_I wr %r0, 0x0016, %asi | |
4475 | .word 0xd4880e40 ! 1187: LDUBA_R lduba [%r0, %r0] 0x72, %r10 | |
4476 | otherw | |
4477 | mov 0x34, %r30 | |
4478 | .word 0x91d0001e ! 1188: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4479 | otherw | |
4480 | mov 0x35, %r30 | |
4481 | .word 0x83d0001e ! 1189: Tcc_R te icc_or_xcc, %r0 + %r30 | |
4482 | ta T_CHANGE_PRIV ! macro | |
4483 | .word 0x89500000 ! 1191: RDPR_TPC rdpr %tpc, %r4 | |
4484 | .word 0x9192a001 ! 1192: WRPR_PIL_I wrpr %r10, 0x0001, %pil | |
4485 | .word 0x8790215f ! 1193: WRPR_TT_I wrpr %r0, 0x015f, %tt | |
4486 | mondo_0_489: | |
4487 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4488 | ||
4489 | stxa %r20, [%r0+0x3e0] %asi | |
4490 | .word 0x9d940005 ! 1194: WRPR_WSTATE_R wrpr %r16, %r5, %wstate | |
4491 | .word 0xa545c000 ! 1195: RD_TICK_CMPR_REG rd %-, %r18 | |
4492 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_490)) -> intp(0,0,12) | |
4493 | intvec_0_490: | |
4494 | .word 0x39400001 ! 1196: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4495 | .word 0x87802004 ! 1197: WRASI_I wr %r0, 0x0004, %asi | |
4496 | .word 0x93902003 ! 1198: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
4497 | otherw | |
4498 | mov 0x32, %r30 | |
4499 | .word 0x83d0001e ! 1199: Tcc_R te icc_or_xcc, %r0 + %r30 | |
4500 | .word 0xe517c000 ! 1200: LDQF_R - [%r31, %r0], %f18 | |
4501 | debug_0_491: | |
4502 | mov 0x38, %r18 | |
4503 | .word 0xfef00b12 ! 1201: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4504 | nop | |
4505 | mov 0x80, %g3 | |
4506 | stxa %g3, [%g3] 0x5f | |
4507 | .word 0xe45fc000 ! 1202: LDX_R ldx [%r31 + %r0], %r18 | |
4508 | tagged_0_492: | |
4509 | tsubcctv %r6, 0x165c, %r8 | |
4510 | .word 0xe407e001 ! 1203: LDUW_I lduw [%r31 + 0x0001], %r18 | |
4511 | .word 0xa345c000 ! 1204: RD_TICK_CMPR_REG rd %-, %r17 | |
4512 | .word 0x9f802001 ! 1205: SIR sir 0x0001 | |
4513 | debug_0_493: | |
4514 | setx debug_0_493 + 64, %r11, %r19 | |
4515 | mov 0x38, %r18 | |
4516 | .word 0xe6f00b12 ! 1206: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4517 | ta T_CHANGE_HPRIV ! macro | |
4518 | splash_lsu_0_494: | |
4519 | setx 0x9e424706154f4b95, %r1, %r2 | |
4520 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4521 | .word 0x3d400001 ! 1208: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4522 | debug_0_495: | |
4523 | mov 8, %r18 | |
4524 | .word 0xe0f00852 ! 1209: STXA_R stxa %r16, [%r0 + %r18] 0x42 | |
4525 | .word 0x97464000 ! 1210: RD_STICK_CMPR_REG rd %-, %r11 | |
4526 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_496)) -> intp(0,0,28) | |
4527 | intvec_0_496: | |
4528 | .word 0x39400001 ! 1211: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4529 | .word 0xd60fe001 ! 1212: LDUB_I ldub [%r31 + 0x0001], %r11 | |
4530 | .word 0xd68008a0 ! 1213: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
4531 | intveclr_0_497: | |
4532 | set 0x15595029, %r28 | |
4533 | stxa %r28, [%g0] 0x72 | |
4534 | .word 0x25400001 ! 1214: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4535 | .word 0x81510000 ! 1215: RDPR_TICK rdpr %tick, %r0 | |
4536 | .word 0xa1902009 ! 1216: WRPR_GL_I wrpr %r0, 0x0009, %- | |
4537 | .word 0x8d9039b4 ! 1217: WRPR_PSTATE_I wrpr %r0, 0x19b4, %pstate | |
4538 | splash_htba_0_498: | |
4539 | set 0x00390000, %r2 | |
4540 | st %r1, [%r2+%r0] | |
4541 | ta T_CHANGE_HPRIV | |
4542 | set 0x003a0000, %r2 | |
4543 | .word 0x8b980002 ! 1218: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
4544 | splash_lsu_0_499: | |
4545 | setx 0xce27a77c2e79c44b, %r1, %r2 | |
4546 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4547 | .word 0x3d400001 ! 1219: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4548 | .word 0x81510000 ! 1220: RDPR_TICK rdpr %tick, %r0 | |
4549 | invalw | |
4550 | mov 0xb1, %r30 | |
4551 | .word 0x91d0001e ! 1221: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4552 | .word 0x8790238a ! 1222: WRPR_TT_I wrpr %r0, 0x038a, %tt | |
4553 | nop | |
4554 | mov 0x80, %g3 | |
4555 | stxa %g3, [%g3] 0x57 | |
4556 | .word 0xd65fc000 ! 1223: LDX_R ldx [%r31 + %r0], %r11 | |
4557 | .word 0xd647c000 ! 1224: LDSW_R ldsw [%r31 + %r0], %r11 | |
4558 | .word 0x95480000 ! 1225: RDHPR_HPSTATE rdhpr %hpstate, %r10 | |
4559 | .word 0xd48008a0 ! 1226: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
4560 | debug_0_500: | |
4561 | mov 0x38, %r18 | |
4562 | .word 0xfef00b12 ! 1227: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4563 | nop | |
4564 | mov 0x80, %g3 | |
4565 | stxa %g3, [%g3] 0x57 | |
4566 | .word 0xd45fc000 ! 1228: LDX_R ldx [%r31 + %r0], %r10 | |
4567 | .word 0x93902002 ! 1229: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
4568 | .word 0xa6d0c008 ! 1230: UMULcc_R umulcc %r3, %r8, %r19 | |
4569 | .word 0xe727c008 ! 1231: STF_R st %f19, [%r8, %r31] | |
4570 | debug_0_501: | |
4571 | mov 8, %r18 | |
4572 | .word 0xdef00852 ! 1232: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
4573 | ta T_CHANGE_HPRIV ! macro | |
4574 | .word 0xa1500000 ! 1234: RDPR_TPC rdpr %tpc, %r16 | |
4575 | .word 0x87802063 ! 1235: WRASI_I wr %r0, 0x0063, %asi | |
4576 | splash_cmpr_0_502: | |
4577 | setx 0x2a11bfd3b9417aec, %g2, %g1 | |
4578 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4579 | sub %g1, 100, %g1 | |
4580 | .word 0xb1800001 ! 1236: WR_STICK_REG_R wr %r0, %r1, %- | |
4581 | nop | |
4582 | mov 0x80, %g3 | |
4583 | stxa %g3, [%g3] 0x57 | |
4584 | .word 0xe05fc000 ! 1237: LDX_R ldx [%r31 + %r0], %r16 | |
4585 | .word 0xe077c008 ! 1238: STX_R stx %r16, [%r31 + %r8] | |
4586 | .word 0xe08008a0 ! 1239: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
4587 | tagged_0_503: | |
4588 | taddcctv %r24, 0x176d, %r17 | |
4589 | .word 0xe007e001 ! 1240: LDUW_I lduw [%r31 + 0x0001], %r16 | |
4590 | .word 0x8d53c000 ! 1241: RDPR_FQ <illegal instruction> | |
4591 | .word 0xccd804a0 ! 1242: LDXA_R ldxa [%r0, %r0] 0x25, %r6 | |
4592 | .word 0x91d020b3 ! 1243: Tcc_I ta icc_or_xcc, %r0 + 179 | |
4593 | .word 0xcc800b80 ! 1244: LDUWA_R lduwa [%r0, %r0] 0x5c, %r6 | |
4594 | DS_0_504: | |
4595 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4596 | .xword 0xa740f5bd ! Random illegal ? | |
4597 | .word 0xc1120010 ! 1: LDQF_R - [%r8, %r16], %f0 | |
4598 | .word 0x8da40833 ! 1245: FADDs fadds %f16, %f19, %f6 | |
4599 | tagged_0_505: | |
4600 | taddcctv %r5, 0x1ca8, %r24 | |
4601 | .word 0xcc07e001 ! 1246: LDUW_I lduw [%r31 + 0x0001], %r6 | |
4602 | .word 0xcd27e001 ! 1247: STF_I st %f6, [0x0001, %r31] | |
4603 | .word 0xcd3fe001 ! 1248: STDF_I std %f6, [0x0001, %r31] | |
4604 | ta T_CHANGE_HPRIV ! macro | |
4605 | .word 0xa1902002 ! 1250: WRPR_GL_I wrpr %r0, 0x0002, %- | |
4606 | intveclr_0_506: | |
4607 | set 0xbe51d5c3, %r28 | |
4608 | stxa %r28, [%g0] 0x72 | |
4609 | .word 0x25400001 ! 1251: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4610 | DS_0_507: | |
4611 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4612 | allclean | |
4613 | .word 0x8db2c309 ! 1252: ALIGNADDRESS alignaddr %r11, %r9, %r6 | |
4614 | nop | |
4615 | mov 0x80, %g3 | |
4616 | stxa %g3, [%g3] 0x57 | |
4617 | .word 0xcc5fc000 ! 1253: LDX_R ldx [%r31 + %r0], %r6 | |
4618 | .word 0xcc37c009 ! 1254: STH_R sth %r6, [%r31 + %r9] | |
4619 | .word 0x93902006 ! 1255: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
4620 | .word 0x89480000 ! 1256: RDHPR_HPSTATE rdhpr %hpstate, %r4 | |
4621 | .word 0xc8cfe000 ! 1257: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r4 | |
4622 | nop | |
4623 | mov 0x80, %g3 | |
4624 | stxa %g3, [%g3] 0x57 | |
4625 | .word 0xc85fc000 ! 1258: LDX_R ldx [%r31 + %r0], %r4 | |
4626 | .word 0xc91fc000 ! 1259: LDDF_R ldd [%r31, %r0], %f4 | |
4627 | splash_lsu_0_508: | |
4628 | setx 0x6bbaca3151b3ff1d, %r1, %r2 | |
4629 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4630 | .word 0x3d400001 ! 1260: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4631 | .word 0x91d02035 ! 1261: Tcc_I ta icc_or_xcc, %r0 + 53 | |
4632 | splash_lsu_0_509: | |
4633 | setx 0x8447162166789af7, %r1, %r2 | |
4634 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4635 | .word 0x3d400001 ! 1262: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4636 | debug_0_510: | |
4637 | mov 8, %r18 | |
4638 | .word 0xe2f00852 ! 1263: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
4639 | .word 0x93d02035 ! 1264: Tcc_I tne icc_or_xcc, %r0 + 53 | |
4640 | DS_0_511: | |
4641 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4642 | .word 0xdb350012 ! 1: STQF_R - %f13, [%r18, %r20] | |
4643 | normalw | |
4644 | .word 0x83458000 ! 1265: RD_SOFTINT_REG rd %softint, %r1 | |
4645 | invalw | |
4646 | mov 0x30, %r30 | |
4647 | .word 0x93d0001e ! 1266: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
4648 | .word 0xc29fe001 ! 1267: LDDA_I ldda [%r31, + 0x0001] %asi, %r1 | |
4649 | .word 0xc28008a0 ! 1268: LDUWA_R lduwa [%r0, %r0] 0x45, %r1 | |
4650 | .word 0x87b14ff1 ! 1269: FONES e %f3 | |
4651 | debug_0_512: | |
4652 | mov 0x38, %r18 | |
4653 | .word 0xfef00b12 ! 1270: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4654 | splash_tba_0_513: | |
4655 | set 0x003f0000, %r2 | |
4656 | ld [%r2+%r0], %r1 | |
4657 | ta T_CHANGE_PRIV | |
4658 | set 0x003c0000, %r2 | |
4659 | .word 0x8b900002 ! 1271: WRPR_TBA_R wrpr %r0, %r2, %tba | |
4660 | .word 0xc64fe001 ! 1272: LDSB_I ldsb [%r31 + 0x0001], %r3 | |
4661 | .word 0xa0d30004 ! 1273: UMULcc_R umulcc %r12, %r4, %r16 | |
4662 | .word 0xe11fe001 ! 1274: LDDF_I ldd [%r31, 0x0001], %f16 | |
4663 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_514)) -> intp(0,0,27) | |
4664 | intvec_0_514: | |
4665 | .word 0x39400001 ! 1275: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4666 | splash_cmpr_0_515: | |
4667 | setx 0x95d500bcd7cc36e4, %g2, %g1 | |
4668 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
4669 | sub %g1, 100, %g1 | |
4670 | .word 0xb1800001 ! 1276: WR_STICK_REG_R wr %r0, %r1, %- | |
4671 | .word 0xe08008a0 ! 1277: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
4672 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_516)) -> intp(0,0,23) | |
4673 | intvec_0_516: | |
4674 | .word 0x39400001 ! 1278: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4675 | .word 0xa190200a ! 1279: WRPR_GL_I wrpr %r0, 0x000a, %- | |
4676 | .word 0x93d02032 ! 1280: Tcc_I tne icc_or_xcc, %r0 + 50 | |
4677 | .word 0x93902005 ! 1281: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
4678 | set 0x2056adc7, %r28 | |
4679 | stxa %r28, [%g0] 0x73 | |
4680 | intvec_0_517: | |
4681 | .word 0x39400001 ! 1282: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4682 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_518)) -> intp(0,1,3) | |
4683 | xir_0_518: | |
4684 | .word 0xa981a001 ! 1283: WR_SET_SOFTINT_I wr %r6, 0x0001, %set_softint | |
4685 | DS_0_519: | |
4686 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
4687 | .word 0xe332e001 ! 1: STQF_I - %f17, [0x0001, %r11] | |
4688 | normalw | |
4689 | .word 0x93458000 ! 1284: RD_SOFTINT_REG rd %softint, %r9 | |
4690 | debug_0_520: | |
4691 | setx debug_0_520 + 64, %r11, %r19 | |
4692 | mov 0x38, %r18 | |
4693 | .word 0xe6f00b12 ! 1285: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4694 | debug_0_521: | |
4695 | mov 0x38, %r18 | |
4696 | .word 0xfef00b12 ! 1286: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4697 | DS_0_522: | |
4698 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4699 | allclean | |
4700 | .word 0x9bb4c312 ! 1287: ALIGNADDRESS alignaddr %r19, %r18, %r13 | |
4701 | splash_lsu_0_523: | |
4702 | setx 0x7341d976cde0361d, %r1, %r2 | |
4703 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4704 | .word 0x3d400001 ! 1288: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4705 | .word 0xda4fe001 ! 1289: LDSB_I ldsb [%r31 + 0x0001], %r13 | |
4706 | .word 0x87802080 ! 1290: WRASI_I wr %r0, 0x0080, %asi | |
4707 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_524)) -> intp(0,0,24) | |
4708 | intvec_0_524: | |
4709 | .word 0x39400001 ! 1291: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4710 | otherw | |
4711 | mov 0x32, %r30 | |
4712 | .word 0x93d0001e ! 1292: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
4713 | .word 0x91d02032 ! 1293: Tcc_I ta icc_or_xcc, %r0 + 50 | |
4714 | mondo_0_525: | |
4715 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4716 | ||
4717 | stxa %r4, [%r0+0x3e8] %asi | |
4718 | .word 0x9d91c009 ! 1294: WRPR_WSTATE_R wrpr %r7, %r9, %wstate | |
4719 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_526)) -> intp(0,0,5) | |
4720 | intvec_0_526: | |
4721 | .word 0x39400001 ! 1295: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4722 | debug_0_527: | |
4723 | mov 0x38, %r18 | |
4724 | .word 0xfef00b12 ! 1296: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4725 | .word 0xdb1fe001 ! 1297: LDDF_I ldd [%r31, 0x0001], %f13 | |
4726 | .word 0xda1fe001 ! 1298: LDD_I ldd [%r31 + 0x0001], %r13 | |
4727 | .word 0x8d802000 ! 1299: WRFPRS_I wr %r0, 0x0000, %fprs | |
4728 | .word 0x8780204f ! 1300: WRASI_I wr %r0, 0x004f, %asi | |
4729 | splash_lsu_0_528: | |
4730 | setx 0x6323bce8dfe16e13, %r1, %r2 | |
4731 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4732 | .word 0x3d400001 ! 1301: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4733 | .word 0x8da1c9cd ! 1302: FDIVd fdivd %f38, %f44, %f6 | |
4734 | debug_0_529: | |
4735 | setx debug_0_529 + 64, %r11, %r19 | |
4736 | mov 0x38, %r18 | |
4737 | .word 0xe6f00b12 ! 1303: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4738 | DS_0_530: | |
4739 | nop | |
4740 | not %g0, %g2 | |
4741 | jmp %g2 | |
4742 | .word 0x9d902004 ! 1304: WRPR_WSTATE_I wrpr %r0, 0x0004, %wstate | |
4743 | .word 0xcd1fc000 ! 1305: LDDF_R ldd [%r31, %r0], %f6 | |
4744 | .word 0x85454000 ! 1306: RD_CLEAR_SOFTINT rd %clear_softint, %r2 | |
4745 | .word 0x87902398 ! 1307: WRPR_TT_I wrpr %r0, 0x0398, %tt | |
4746 | .word 0x2c700001 ! 1308: BPNEG <illegal instruction> | |
4747 | intveclr_0_531: | |
4748 | set 0xefaa250b, %r28 | |
4749 | stxa %r28, [%g0] 0x72 | |
4750 | .word 0x25400001 ! 1309: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4751 | .word 0x9f802001 ! 1310: SIR sir 0x0001 | |
4752 | debug_0_532: | |
4753 | setx debug_0_532 + 64, %r11, %r19 | |
4754 | mov 0x38, %r18 | |
4755 | .word 0xe6f00b12 ! 1311: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4756 | .word 0xa1902006 ! 1312: WRPR_GL_I wrpr %r0, 0x0006, %- | |
4757 | set 0x5dd3eac6, %r28 | |
4758 | stxa %r28, [%g0] 0x73 | |
4759 | intvec_0_533: | |
4760 | .word 0x39400001 ! 1313: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4761 | DS_0_534: | |
4762 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
4763 | .word 0xbfe7c000 ! 1314: SAVE_R save %r31, %r0, %r31 | |
4764 | .word 0xa780a001 ! 1315: WR_GRAPHICS_STATUS_REG_I wr %r2, 0x0001, %- | |
4765 | .word 0xc537c00d ! 1316: STQF_R - %f2, [%r13, %r31] | |
4766 | splash_tba_0_535: | |
4767 | set 0x120000, %r2 | |
4768 | ld [%r2+%r0], %r1 | |
4769 | ta T_CHANGE_PRIV | |
4770 | set 0x120000, %r2 | |
4771 | .word 0x8b900002 ! 1317: WRPR_TBA_R wrpr %r0, %r2, %tba | |
4772 | nop | |
4773 | mov 0x80, %g3 | |
4774 | stxa %g3, [%g3] 0x5f | |
4775 | .word 0xc45fc000 ! 1318: LDX_R ldx [%r31 + %r0], %r2 | |
4776 | .word 0x99902004 ! 1319: WRPR_CLEANWIN_I wrpr %r0, 0x0004, %cleanwin | |
4777 | splash_cmpr_0_536: | |
4778 | setx 0x2468aed15666d258, %g2, %g1 | |
4779 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4780 | sub %g1, 100, %g1 | |
4781 | .word 0xb1800001 ! 1320: WR_STICK_REG_R wr %r0, %r1, %- | |
4782 | .word 0x83d02035 ! 1321: Tcc_I te icc_or_xcc, %r0 + 53 | |
4783 | .word 0x93d02034 ! 1322: Tcc_I tne icc_or_xcc, %r0 + 52 | |
4784 | .word 0xc42fe001 ! 1323: STB_I stb %r2, [%r31 + 0x0001] | |
4785 | .word 0xa1902004 ! 1324: WRPR_GL_I wrpr %r0, 0x0004, %- | |
4786 | splash_cmpr_0_537: | |
4787 | setx 0x0e3d5007b805c05f, %g2, %g1 | |
4788 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
4789 | sub %g1, 100, %g1 | |
4790 | .word 0xb1800001 ! 1325: WR_STICK_REG_R wr %r0, %r1, %- | |
4791 | splash_cmpr_0_538: | |
4792 | setx 0xd0f6abab24907096, %g2, %g1 | |
4793 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4794 | sub %g1, 100, %g1 | |
4795 | .word 0xb1800001 ! 1326: WR_STICK_REG_R wr %r0, %r1, %- | |
4796 | .word 0xc457c000 ! 1327: LDSH_R ldsh [%r31 + %r0], %r2 | |
4797 | set 0xa92db22, %r28 | |
4798 | stxa %r28, [%g0] 0x73 | |
4799 | intvec_0_539: | |
4800 | .word 0x39400001 ! 1328: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4801 | .word 0xc53fc00d ! 1329: STDF_R std %f2, [%r13, %r31] | |
4802 | .word 0xc447c000 ! 1330: LDSW_R ldsw [%r31 + %r0], %r2 | |
4803 | .word 0xc41fc000 ! 1331: LDD_R ldd [%r31 + %r0], %r2 | |
4804 | .word 0xc53fe001 ! 1332: STDF_I std %f2, [0x0001, %r31] | |
4805 | tagged_0_540: | |
4806 | tsubcctv %r20, 0x1a8b, %r3 | |
4807 | .word 0xc407e001 ! 1333: LDUW_I lduw [%r31 + 0x0001], %r2 | |
4808 | tagged_0_541: | |
4809 | taddcctv %r14, 0x15ab, %r15 | |
4810 | .word 0xc407e001 ! 1334: LDUW_I lduw [%r31 + 0x0001], %r2 | |
4811 | tagged_0_542: | |
4812 | tsubcctv %r24, 0x1a53, %r16 | |
4813 | .word 0xc407e001 ! 1335: LDUW_I lduw [%r31 + 0x0001], %r2 | |
4814 | DS_0_543: | |
4815 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4816 | .word 0xbfe7c000 ! 1336: SAVE_R save %r31, %r0, %r31 | |
4817 | .word 0xc4800c60 ! 1337: LDUWA_R lduwa [%r0, %r0] 0x63, %r2 | |
4818 | .word 0x20700001 ! 1338: BPN <illegal instruction> | |
4819 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_544)) -> intp(0,0,16) | |
4820 | intvec_0_544: | |
4821 | .word 0x39400001 ! 1339: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4822 | .word 0xc447e001 ! 1340: LDSW_I ldsw [%r31 + 0x0001], %r2 | |
4823 | mondo_0_545: | |
4824 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4825 | ||
4826 | stxa %r19, [%r0+0x3d0] %asi | |
4827 | .word 0x9d930001 ! 1341: WRPR_WSTATE_R wrpr %r12, %r1, %wstate | |
4828 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_546)) -> intp(0,0,2) | |
4829 | intvec_0_546: | |
4830 | .word 0x39400001 ! 1342: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4831 | .word 0x93902004 ! 1343: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
4832 | set 0x880cffa5, %r28 | |
4833 | stxa %r28, [%g0] 0x73 | |
4834 | intvec_0_547: | |
4835 | .word 0x39400001 ! 1344: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4836 | .word 0xc457e001 ! 1345: LDSH_I ldsh [%r31 + 0x0001], %r2 | |
4837 | .word 0xc43fc001 ! 1346: STD_R std %r2, [%r31 + %r1] | |
4838 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_548)) -> intp(0,0,28) | |
4839 | intvec_0_548: | |
4840 | .word 0x39400001 ! 1347: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4841 | .word 0x95a00547 ! 1348: FSQRTd fsqrt | |
4842 | .word 0x34700001 ! 1349: BPG <illegal instruction> | |
4843 | debug_0_549: | |
4844 | mov 8, %r18 | |
4845 | .word 0xd8f00852 ! 1350: STXA_R stxa %r12, [%r0 + %r18] 0x42 | |
4846 | DS_0_550: | |
4847 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4848 | pdist %f12, %f30, %f0 | |
4849 | .word 0xa7b20309 ! 1351: ALIGNADDRESS alignaddr %r8, %r9, %r19 | |
4850 | .word 0x87802004 ! 1352: WRASI_I wr %r0, 0x0004, %asi | |
4851 | otherw | |
4852 | mov 0x30, %r30 | |
4853 | .word 0x93d0001e ! 1353: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
4854 | DS_0_551: | |
4855 | nop | |
4856 | not %g0, %g2 | |
4857 | jmp %g2 | |
4858 | .word 0x9d902002 ! 1354: WRPR_WSTATE_I wrpr %r0, 0x0002, %wstate | |
4859 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_552)) -> intp(0,0,4) | |
4860 | intvec_0_552: | |
4861 | .word 0x39400001 ! 1355: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4862 | otherw | |
4863 | mov 0x31, %r30 | |
4864 | .word 0x93d0001e ! 1356: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
4865 | debug_0_553: | |
4866 | setx debug_0_553 + 64, %r11, %r19 | |
4867 | mov 0x38, %r18 | |
4868 | .word 0xe6f00b12 ! 1357: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4869 | .word 0x85a000c9 ! 1358: FNEGd fnegd %f40, %f2 | |
4870 | .word 0xc48008a0 ! 1359: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
4871 | mondo_0_554: | |
4872 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4873 | ||
4874 | stxa %r5, [%r0+0x3e8] %asi | |
4875 | .word 0x9d91c008 ! 1360: WRPR_WSTATE_R wrpr %r7, %r8, %wstate | |
4876 | otherw | |
4877 | mov 0x31, %r30 | |
4878 | .word 0x91d0001e ! 1361: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4879 | splash_htba_0_555: | |
4880 | set 0x003b0000, %r2 | |
4881 | ld [%r2+%r0], %r1 | |
4882 | ta T_CHANGE_HPRIV | |
4883 | set 0x00380000, %r2 | |
4884 | .word 0x8b980002 ! 1362: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
4885 | .word 0xc51fe001 ! 1363: LDDF_I ldd [%r31, 0x0001], %f2 | |
4886 | .word 0xa7450000 ! 1364: RD_SET_SOFTINT rd %set_softint, %r19 | |
4887 | .word 0xe717c000 ! 1365: LDQF_R - [%r31, %r0], %f19 | |
4888 | .word 0xe68008a0 ! 1366: LDUWA_R lduwa [%r0, %r0] 0x45, %r19 | |
4889 | mondo_0_556: | |
4890 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4891 | ||
4892 | stxa %r7, [%r0+0x3d8] %asi | |
4893 | .word 0x9d928014 ! 1367: WRPR_WSTATE_R wrpr %r10, %r20, %wstate | |
4894 | .word 0x8d90251e ! 1368: WRPR_PSTATE_I wrpr %r0, 0x051e, %pstate | |
4895 | splash_htba_0_557: | |
4896 | set 0x80000, %r2 | |
4897 | ld [%r2+%r0], %r1 | |
4898 | ta T_CHANGE_HPRIV | |
4899 | set 0x80000, %r2 | |
4900 | .word 0x8b980002 ! 1369: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
4901 | .word 0xa1902004 ! 1370: WRPR_GL_I wrpr %r0, 0x0004, %- | |
4902 | .word 0xe62fe001 ! 1371: STB_I stb %r19, [%r31 + 0x0001] | |
4903 | .word 0xe69004a0 ! 1372: LDUHA_R lduha [%r0, %r0] 0x25, %r19 | |
4904 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_558)) -> intp(0,0,12) | |
4905 | intvec_0_558: | |
4906 | .word 0x39400001 ! 1373: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4907 | .word 0x99902004 ! 1374: WRPR_CLEANWIN_I wrpr %r0, 0x0004, %cleanwin | |
4908 | set 0xcad7b2fd, %r28 | |
4909 | stxa %r28, [%g0] 0x73 | |
4910 | intvec_0_559: | |
4911 | .word 0x39400001 ! 1375: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4912 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_560)) -> intp(0,1,3) | |
4913 | xir_0_560: | |
4914 | .word 0xa9816001 ! 1376: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
4915 | set 0x9b9cfa74, %r28 | |
4916 | stxa %r28, [%g0] 0x73 | |
4917 | intvec_0_561: | |
4918 | .word 0x39400001 ! 1377: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4919 | intveclr_0_562: | |
4920 | set 0xecd7c156, %r28 | |
4921 | stxa %r28, [%g0] 0x72 | |
4922 | .word 0x25400001 ! 1378: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4923 | .word 0xa1902001 ! 1379: WRPR_GL_I wrpr %r0, 0x0001, %- | |
4924 | .word 0x87802088 ! 1380: WRASI_I wr %r0, 0x0088, %asi | |
4925 | ta T_CHANGE_HPRIV ! macro | |
4926 | .word 0xe6c004a0 ! 1382: LDSWA_R ldswa [%r0, %r0] 0x25, %r19 | |
4927 | mondo_0_563: | |
4928 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4929 | ||
4930 | stxa %r5, [%r0+0x3d8] %asi | |
4931 | .word 0x9d940012 ! 1383: WRPR_WSTATE_R wrpr %r16, %r18, %wstate | |
4932 | .word 0x93902003 ! 1384: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
4933 | .word 0xe737e001 ! 1385: STQF_I - %f19, [0x0001, %r31] | |
4934 | .word 0x91a28d24 ! 1386: FsMULd fsmuld %f10, %f4, %f8 | |
4935 | intveclr_0_564: | |
4936 | set 0xdcc069b3, %r28 | |
4937 | stxa %r28, [%g0] 0x72 | |
4938 | .word 0x25400001 ! 1387: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4939 | .word 0xd0800b00 ! 1388: LDUWA_R lduwa [%r0, %r0] 0x58, %r8 | |
4940 | .word 0xa1902000 ! 1389: WRPR_GL_I wrpr %r0, 0x0000, %- | |
4941 | tagged_0_565: | |
4942 | taddcctv %r5, 0x1a89, %r24 | |
4943 | .word 0xd007e001 ! 1390: LDUW_I lduw [%r31 + 0x0001], %r8 | |
4944 | .word 0x879021d1 ! 1391: WRPR_TT_I wrpr %r0, 0x01d1, %tt | |
4945 | .word 0xd08008a0 ! 1392: LDUWA_R lduwa [%r0, %r0] 0x45, %r8 | |
4946 | .word 0x80c06001 ! 1393: ADDCcc_I addccc %r1, 0x0001, %r0 | |
4947 | .word 0xc08008a0 ! 1394: LDUWA_R lduwa [%r0, %r0] 0x45, %r0 | |
4948 | .word 0x28700001 ! 1395: BPLEU <illegal instruction> | |
4949 | splash_lsu_0_566: | |
4950 | setx 0x4bb7e1a55975da59, %r1, %r2 | |
4951 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4952 | .word 0x3d400001 ! 1396: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4953 | .word 0xc09fe001 ! 1397: LDDA_I ldda [%r31, + 0x0001] %asi, %r0 | |
4954 | ta T_CHANGE_PRIV ! macro | |
4955 | .word 0x81510000 ! 1399: RDPR_TICK rdpr %tick, %r0 | |
4956 | DS_0_567: | |
4957 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
4958 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4959 | .word 0x81a00548 ! 1: FSQRTd fsqrt | |
4960 | .word 0x85a4c831 ! 1400: FADDs fadds %f19, %f17, %f2 | |
4961 | nop | |
4962 | mov 0x80, %g3 | |
4963 | stxa %g3, [%g3] 0x57 | |
4964 | .word 0xc45fc000 ! 1401: LDX_R ldx [%r31 + %r0], %r2 | |
4965 | .word 0x85454000 ! 1402: RD_CLEAR_SOFTINT rd %clear_softint, %r2 | |
4966 | .word 0x81460000 ! 1403: RD_STICK_REG stbar | |
4967 | DS_0_568: | |
4968 | nop | |
4969 | not %g0, %g2 | |
4970 | jmp %g2 | |
4971 | .word 0x9d902005 ! 1404: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate | |
4972 | tagged_0_569: | |
4973 | taddcctv %r13, 0x13d3, %r2 | |
4974 | .word 0xc407e001 ! 1405: LDUW_I lduw [%r31 + 0x0001], %r2 | |
4975 | invalw | |
4976 | mov 0x33, %r30 | |
4977 | .word 0x91d0001e ! 1406: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4978 | tagged_0_570: | |
4979 | tsubcctv %r15, 0x184d, %r23 | |
4980 | .word 0xc407e001 ! 1407: LDUW_I lduw [%r31 + 0x0001], %r2 | |
4981 | intveclr_0_571: | |
4982 | set 0xb522913e, %r28 | |
4983 | stxa %r28, [%g0] 0x72 | |
4984 | .word 0x25400001 ! 1408: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4985 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_572)) -> intp(0,1,3) | |
4986 | xir_0_572: | |
4987 | .word 0xa984a001 ! 1409: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
4988 | nop | |
4989 | mov 0x80, %g3 | |
4990 | stxa %g3, [%g3] 0x5f | |
4991 | .word 0xc45fc000 ! 1410: LDX_R ldx [%r31 + %r0], %r2 | |
4992 | .word 0xa190200a ! 1411: WRPR_GL_I wrpr %r0, 0x000a, %- | |
4993 | .word 0xc45fe001 ! 1412: LDX_I ldx [%r31 + 0x0001], %r2 | |
4994 | .word 0x87902370 ! 1413: WRPR_TT_I wrpr %r0, 0x0370, %tt | |
4995 | DS_0_573: | |
4996 | nop | |
4997 | not %g0, %g2 | |
4998 | jmp %g2 | |
4999 | .word 0x9d902002 ! 1414: WRPR_WSTATE_I wrpr %r0, 0x0002, %wstate | |
5000 | .word 0xa190200c ! 1415: WRPR_GL_I wrpr %r0, 0x000c, %- | |
5001 | .word 0x93480000 ! 1416: RDHPR_HPSTATE rdhpr %hpstate, %r9 | |
5002 | .word 0x93902000 ! 1417: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
5003 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_574)) -> intp(0,1,3) | |
5004 | xir_0_574: | |
5005 | .word 0xa9812001 ! 1418: WR_SET_SOFTINT_I wr %r4, 0x0001, %set_softint | |
5006 | intveclr_0_575: | |
5007 | set 0x8a4351b4, %r28 | |
5008 | stxa %r28, [%g0] 0x72 | |
5009 | .word 0x25400001 ! 1419: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5010 | .word 0xd21fc000 ! 1420: LDD_R ldd [%r31 + %r0], %r9 | |
5011 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_576)) -> intp(0,0,14) | |
5012 | intvec_0_576: | |
5013 | .word 0x39400001 ! 1421: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5014 | .word 0x93d02035 ! 1422: Tcc_I tne icc_or_xcc, %r0 + 53 | |
5015 | nop | |
5016 | mov 0x80, %g3 | |
5017 | stxa %g3, [%g3] 0x57 | |
5018 | .word 0xd25fc000 ! 1423: LDX_R ldx [%r31 + %r0], %r9 | |
5019 | .word 0x8150c000 ! 1424: RDPR_TT rdpr %tt, %r0 | |
5020 | set 0xd8d80526, %r28 | |
5021 | stxa %r28, [%g0] 0x73 | |
5022 | intvec_0_577: | |
5023 | .word 0x39400001 ! 1425: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5024 | DS_0_578: | |
5025 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
5026 | .word 0xbfe7c000 ! 1426: SAVE_R save %r31, %r0, %r31 | |
5027 | .word 0x8d464000 ! 1427: RD_STICK_CMPR_REG rd %-, %r6 | |
5028 | .word 0x99500000 ! 1428: RDPR_TPC rdpr %tpc, %r12 | |
5029 | .word 0x87802055 ! 1429: WRASI_I wr %r0, 0x0055, %asi | |
5030 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_579)) -> intp(0,1,3) | |
5031 | xir_0_579: | |
5032 | .word 0xa982e001 ! 1430: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
5033 | .word 0x93902002 ! 1431: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
5034 | .word 0xa1902001 ! 1432: WRPR_GL_I wrpr %r0, 0x0001, %- | |
5035 | .word 0x99520000 ! 1433: RDPR_PIL rdpr %pil, %r12 | |
5036 | .word 0x97480000 ! 1434: RDHPR_HPSTATE rdhpr %hpstate, %r11 | |
5037 | .word 0xd69004a0 ! 1435: LDUHA_R lduha [%r0, %r0] 0x25, %r11 | |
5038 | tagged_0_580: | |
5039 | tsubcctv %r16, 0x1cd9, %r9 | |
5040 | .word 0xd607e001 ! 1436: LDUW_I lduw [%r31 + 0x0001], %r11 | |
5041 | nop | |
5042 | mov 0x80, %g3 | |
5043 | stxa %g3, [%g3] 0x5f | |
5044 | .word 0xd65fc000 ! 1437: LDX_R ldx [%r31 + %r0], %r11 | |
5045 | debug_0_581: | |
5046 | mov 0x38, %r18 | |
5047 | .word 0xfef00b12 ! 1438: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
5048 | .word 0x99520000 ! 1439: RDPR_PIL rdpr %pil, %r12 | |
5049 | .word 0x38800001 ! 1440: BGU bgu,a <label_0x1> | |
5050 | .word 0xd84fe001 ! 1441: LDSB_I ldsb [%r31 + 0x0001], %r12 | |
5051 | .word 0xd8c004a0 ! 1442: LDSWA_R ldswa [%r0, %r0] 0x25, %r12 | |
5052 | .word 0x97a18dd4 ! 1443: FdMULq fdmulq | |
5053 | DS_0_582: | |
5054 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
5055 | .word 0xd7340004 ! 1: STQF_R - %f11, [%r4, %r16] | |
5056 | normalw | |
5057 | .word 0x87458000 ! 1444: RD_SOFTINT_REG rd %softint, %r3 | |
5058 | .word 0x87802016 ! 1445: WRASI_I wr %r0, 0x0016, %asi | |
5059 | nop | |
5060 | mov 0x80, %g3 | |
5061 | stxa %g3, [%g3] 0x5f | |
5062 | .word 0xc65fc000 ! 1446: LDX_R ldx [%r31 + %r0], %r3 | |
5063 | .word 0xc68008a0 ! 1447: LDUWA_R lduwa [%r0, %r0] 0x45, %r3 | |
5064 | DS_0_583: | |
5065 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
5066 | .word 0xbfefc000 ! 1448: RESTORE_R restore %r31, %r0, %r31 | |
5067 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_584)) -> intp(0,0,3) | |
5068 | intvec_0_584: | |
5069 | .word 0x39400001 ! 1449: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5070 | set 0xa96db079, %r28 | |
5071 | stxa %r28, [%g0] 0x73 | |
5072 | intvec_0_585: | |
5073 | .word 0x39400001 ! 1450: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5074 | .word 0x87802016 ! 1451: WRASI_I wr %r0, 0x0016, %asi | |
5075 | .word 0x93d02035 ! 1452: Tcc_I tne icc_or_xcc, %r0 + 53 | |
5076 | splash_lsu_0_586: | |
5077 | setx 0x000ac821f5565347, %r1, %r2 | |
5078 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5079 | .word 0x3d400001 ! 1453: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5080 | .word 0xc6c804a0 ! 1454: LDSBA_R ldsba [%r0, %r0] 0x25, %r3 | |
5081 | splash_cmpr_0_587: | |
5082 | setx 0xbeb03fca6f3b2850, %g2, %g1 | |
5083 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
5084 | sub %g1, 100, %g1 | |
5085 | .word 0xb1800001 ! 1455: WR_STICK_REG_R wr %r0, %r1, %- | |
5086 | .word 0xc61fe001 ! 1456: LDD_I ldd [%r31 + 0x0001], %r3 | |
5087 | ta T_CHANGE_PRIV ! macro | |
5088 | .word 0x91916001 ! 1458: WRPR_PIL_I wrpr %r5, 0x0001, %pil | |
5089 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_588)) -> intp(0,0,3) | |
5090 | intvec_0_588: | |
5091 | .word 0x39400001 ! 1459: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5092 | .word 0xc6800ba0 ! 1460: LDUWA_R lduwa [%r0, %r0] 0x5d, %r3 | |
5093 | .word 0xc727e001 ! 1461: STF_I st %f3, [0x0001, %r31] | |
5094 | intveclr_0_589: | |
5095 | set 0x2979a390, %r28 | |
5096 | stxa %r28, [%g0] 0x72 | |
5097 | .word 0x25400001 ! 1462: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5098 | .word 0x83d02033 ! 1463: Tcc_I te icc_or_xcc, %r0 + 51 | |
5099 | splash_cmpr_0_590: | |
5100 | setx 0x2c6eb9a4ab58b9d0, %g2, %g1 | |
5101 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
5102 | sub %g1, 100, %g1 | |
5103 | .word 0xb1800001 ! 1464: WR_STICK_REG_R wr %r0, %r1, %- | |
5104 | .word 0x879021f4 ! 1465: WRPR_TT_I wrpr %r0, 0x01f4, %tt | |
5105 | mondo_0_591: | |
5106 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5107 | ||
5108 | stxa %r16, [%r0+0x3e0] %asi | |
5109 | .word 0x9d948003 ! 1466: WRPR_WSTATE_R wrpr %r18, %r3, %wstate | |
5110 | splash_cmpr_0_592: | |
5111 | setx 0x4ca5455dbf10b29b, %g2, %g1 | |
5112 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
5113 | sub %g1, 100, %g1 | |
5114 | .word 0xb1800001 ! 1467: WR_STICK_REG_R wr %r0, %r1, %- | |
5115 | .word 0xc737c003 ! 1468: STQF_R - %f3, [%r3, %r31] | |
5116 | otherw | |
5117 | mov 0xb3, %r30 | |
5118 | .word 0x83d0001e ! 1469: Tcc_R te icc_or_xcc, %r0 + %r30 | |
5119 | splash_lsu_0_593: | |
5120 | setx 0x51e191492d670fb9, %r1, %r2 | |
5121 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5122 | .word 0x3d400001 ! 1470: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5123 | .word 0xc6bfe001 ! 1471: STDA_I stda %r3, [%r31 + 0x0001] %asi | |
5124 | .word 0x87902058 ! 1472: WRPR_TT_I wrpr %r0, 0x0058, %tt | |
5125 | .word 0xc6d00e60 ! 1473: LDSHA_R ldsha [%r0, %r0] 0x73, %r3 | |
5126 | .word 0xc6880e80 ! 1474: LDUBA_R lduba [%r0, %r0] 0x74, %r3 | |
5127 | nop | |
5128 | mov 0x80, %g3 | |
5129 | stxa %g3, [%g3] 0x5f | |
5130 | .word 0xc65fc000 ! 1475: LDX_R ldx [%r31 + %r0], %r3 | |
5131 | .word 0x879023d0 ! 1476: WRPR_TT_I wrpr %r0, 0x03d0, %tt | |
5132 | splash_lsu_0_594: | |
5133 | setx 0x1bf70f77a597c6c1, %r1, %r2 | |
5134 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5135 | .word 0x3d400001 ! 1477: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5136 | .word 0x83d02032 ! 1478: Tcc_I te icc_or_xcc, %r0 + 50 | |
5137 | .word 0xc64fe001 ! 1479: LDSB_I ldsb [%r31 + 0x0001], %r3 | |
5138 | .word 0xc68008a0 ! 1480: LDUWA_R lduwa [%r0, %r0] 0x45, %r3 | |
5139 | intveclr_0_595: | |
5140 | set 0x412df72, %r28 | |
5141 | stxa %r28, [%g0] 0x72 | |
5142 | .word 0x25400001 ! 1481: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5143 | .word 0x87802088 ! 1482: WRASI_I wr %r0, 0x0088, %asi | |
5144 | splash_tba_0_596: | |
5145 | set 0x120000, %r2 | |
5146 | st %r1, [%r2+%r0] | |
5147 | ta T_CHANGE_PRIV | |
5148 | set 0x120000, %r2 | |
5149 | .word 0x8b900002 ! 1483: WRPR_TBA_R wrpr %r0, %r2, %tba | |
5150 | .word 0x91480000 ! 1484: RDHPR_HPSTATE rdhpr %hpstate, %r8 | |
5151 | .word 0x93902003 ! 1485: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
5152 | otherw | |
5153 | mov 0xb4, %r30 | |
5154 | .word 0x83d0001e ! 1486: Tcc_R te icc_or_xcc, %r0 + %r30 | |
5155 | .word 0xd09004a0 ! 1487: LDUHA_R lduha [%r0, %r0] 0x25, %r8 | |
5156 | .word 0x9750c000 ! 1488: RDPR_TT rdpr %tt, %r11 | |
5157 | DS_0_597: | |
5158 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
5159 | allclean | |
5160 | .word 0x97b30305 ! 1489: ALIGNADDRESS alignaddr %r12, %r5, %r11 | |
5161 | invalw | |
5162 | mov 0x33, %r30 | |
5163 | .word 0x93d0001e ! 1490: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
5164 | debug_0_598: | |
5165 | setx debug_0_598 + 64, %r11, %r19 | |
5166 | mov 0x38, %r18 | |
5167 | .word 0xe6f00b12 ! 1491: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
5168 | otherw | |
5169 | mov 0x34, %r30 | |
5170 | .word 0x91d0001e ! 1492: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
5171 | .word 0xd60fc000 ! 1493: LDUB_R ldub [%r31 + %r0], %r11 | |
5172 | .word 0x91d020b5 ! 1494: Tcc_I ta icc_or_xcc, %r0 + 181 | |
5173 | splash_htba_0_599: | |
5174 | set 0x80000, %r2 | |
5175 | ld [%r2+%r0], %r1 | |
5176 | ta T_CHANGE_HPRIV | |
5177 | set 0x80000, %r2 | |
5178 | .word 0x8b980002 ! 1495: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
5179 | .word 0xd68008a0 ! 1496: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
5180 | .word 0x91d020b3 ! 1497: Tcc_I ta icc_or_xcc, %r0 + 179 | |
5181 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_600)) -> intp(0,1,3) | |
5182 | xir_0_600: | |
5183 | .word 0xa980a001 ! 1498: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
5184 | SECTION .MAIN | |
5185 | .text | |
5186 | diag_finish: | |
5187 | nop | |
5188 | nop | |
5189 | nop | |
5190 | ta T_CHANGE_HPRIV | |
5191 | set 0x80000, %r2 | |
5192 | wrhpr %g2, %g0, %htba | |
5193 | ta T_GOOD_TRAP | |
5194 | nop | |
5195 | nop | |
5196 | nop | |
5197 | .data | |
5198 | .xword 0x0 | |
5199 | ||
5200 | .global user_data_start | |
5201 | .data | |
5202 | user_data_start: | |
5203 | ||
5204 | .xword 0x7e9955c961b88023 | |
5205 | .xword 0x5664fbc450b6a381 | |
5206 | .xword 0x34508b4e6ba9943f | |
5207 | .xword 0xd176ce579fedae7f | |
5208 | .xword 0xf84e84978f518b67 | |
5209 | .xword 0xec8ec6137c02e3ef | |
5210 | .xword 0xdb3e2ca40b44c3f1 | |
5211 | .xword 0x515c77b4fe7e2431 | |
5212 | .xword 0x027eeab3a32a00fa | |
5213 | .xword 0xb50905c2506bd90a | |
5214 | .xword 0x1cfb5410440e5315 | |
5215 | .xword 0x24fa668891d83792 | |
5216 | .xword 0x9f7b1ba37602ae86 | |
5217 | .xword 0x701f71923c7d6699 | |
5218 | .xword 0x935391fe5167f78e | |
5219 | .xword 0x51e2f5328388bd2d | |
5220 | .xword 0x68fd4609344c1eb5 | |
5221 | .xword 0x80a21bd89346f020 | |
5222 | .xword 0x4c1428029ff17318 | |
5223 | .xword 0xb3f558ab8948887a | |
5224 | .xword 0x841d820dd83bbe22 | |
5225 | .xword 0x13e24eaaf194b1c0 | |
5226 | .xword 0x9a0b05e19856c1bb | |
5227 | .xword 0x48a5fa146fc0ac95 | |
5228 | .xword 0x645e89ed77064618 | |
5229 | .xword 0x02b3b085e40d2a9d | |
5230 | .xword 0x0f8abfacb987515d | |
5231 | .xword 0xe8996880fb81cb77 | |
5232 | .xword 0x9f2bd5b33543ef58 | |
5233 | .xword 0x55223f48956cdd8f | |
5234 | .xword 0x71eeb71a29604eb1 | |
5235 | .xword 0x06a6ee4059ab3c82 | |
5236 | .xword 0x4831cbcbdc58a6be | |
5237 | .xword 0xfe0ba8713eb35972 | |
5238 | .xword 0x54d8d0575271a552 | |
5239 | .xword 0xd134ef5046144d22 | |
5240 | .xword 0xd56f4a569ede5e51 | |
5241 | .xword 0xba046d67ff34cc94 | |
5242 | .xword 0x10801173d6f4f941 | |
5243 | .xword 0x07591a1ad5b3db5b | |
5244 | .xword 0xed7e77545ac3b869 | |
5245 | .xword 0xc35c681b97982d91 | |
5246 | .xword 0xe6463967be1791c0 | |
5247 | .xword 0xd2453fc5a5ba22f0 | |
5248 | .xword 0x4131a74991c2a12b | |
5249 | .xword 0xc37ad939836ce54b | |
5250 | .xword 0x376d67c807940a04 | |
5251 | .xword 0x8a2f6264fd4694bb | |
5252 | .xword 0x70f27cac2434eba7 | |
5253 | .xword 0xf5f8559e5110e0cd | |
5254 | .xword 0x2c014575cf5feefb | |
5255 | .xword 0xaf9bb05deba1c326 | |
5256 | .xword 0x38789e66d7fe399c | |
5257 | .xword 0xd64975f8df043c78 | |
5258 | .xword 0x875a6d3d6cb23a40 | |
5259 | .xword 0x900a7cd54bd98c32 | |
5260 | .xword 0x3f273aa3ec17eb1a | |
5261 | .xword 0xd102a13e2b440451 | |
5262 | .xword 0x93c4167acc5bc102 | |
5263 | .xword 0xe5207b1acfbffc45 | |
5264 | .xword 0xf63c4536a39c79fe | |
5265 | .xword 0x0abf7c2213fb746b | |
5266 | .xword 0xc3355b407a4f13bf | |
5267 | .xword 0x2962d135ab556da3 | |
5268 | .xword 0xfc85fb758f6edf1e | |
5269 | .xword 0x13f75302bc1dc1e1 | |
5270 | .xword 0x18918616791c0f9c | |
5271 | .xword 0xf3c7da435d123faa | |
5272 | .xword 0x20665b3fa154eda8 | |
5273 | .xword 0x1b61c25d0416dbef | |
5274 | .xword 0x1d15a5c84e271bba | |
5275 | .xword 0xddc0de2ef64784c0 | |
5276 | .xword 0x5238ab06508f8c41 | |
5277 | .xword 0xc231c664389f371a | |
5278 | .xword 0xcd6492abb9395f7e | |
5279 | .xword 0x3b062b13fd55a1ae | |
5280 | .xword 0x7c2ff94283669a58 | |
5281 | .xword 0x7ddc5baa5ce5691e | |
5282 | .xword 0xdf3a14f6134ac5fd | |
5283 | .xword 0x9e3b27a35c7933fe | |
5284 | .xword 0x12dcb80727f8e83a | |
5285 | .xword 0xb583664d539dd88e | |
5286 | .xword 0x48a53ddf106b140a | |
5287 | .xword 0x0d053b4311e8ebe1 | |
5288 | .xword 0x8ea26ed788621cf1 | |
5289 | .xword 0x36cd0065d7547b74 | |
5290 | .xword 0xf93fdf7cafbc0778 | |
5291 | .xword 0xfd6188537b39f06c | |
5292 | .xword 0x053a9bf919e17219 | |
5293 | .xword 0x8c8078ce778926c1 | |
5294 | .xword 0xcbfab99961b125f6 | |
5295 | .xword 0xd9a725da6a60442a | |
5296 | .xword 0x1634427798af5176 | |
5297 | .xword 0x43646b23bff313b0 | |
5298 | .xword 0x2ba6307f60ecd5b5 | |
5299 | .xword 0x3d8e15e0dd44a3d3 | |
5300 | .xword 0xffbb0fb879778671 | |
5301 | .xword 0x1f5b7a3b6897f835 | |
5302 | .xword 0x27c993432af3ac90 | |
5303 | .xword 0xb7082072338fd587 | |
5304 | .xword 0x8856f029be278606 | |
5305 | .xword 0x208d0a80c10e4892 | |
5306 | .xword 0x6b64d83b36e92513 | |
5307 | .xword 0xd1f3913e07650375 | |
5308 | .xword 0x09ad4c8b07ab0f32 | |
5309 | .xword 0xeb277715a747f77f | |
5310 | .xword 0xea7d9e93aed6fb02 | |
5311 | .xword 0xc81ca2a56e3cc21e | |
5312 | .xword 0xbcf9fb23d4dc481c | |
5313 | .xword 0xdf8c1e95aed2bdb8 | |
5314 | .xword 0x7ea4f79ff2094bcf | |
5315 | .xword 0xd406d1dc99d1bf3a | |
5316 | .xword 0x1ab07fc9cefbd2b4 | |
5317 | .xword 0xae59486a235d651a | |
5318 | .xword 0x5efb9150f209b376 | |
5319 | .xword 0x6038efb7d2786717 | |
5320 | .xword 0x17238bc30e51bbf7 | |
5321 | .xword 0xe5a121c6e9075a7a | |
5322 | .xword 0x286d65bb0f3268f6 | |
5323 | .xword 0xfd7ef05794dda31d | |
5324 | .xword 0x28cbbbc96dc5bf87 | |
5325 | .xword 0x226029ee0a8e6dca | |
5326 | .xword 0x6730b3db4dd775cf | |
5327 | .xword 0x84228c4b37667995 | |
5328 | .xword 0xe5a65a917aef0954 | |
5329 | .xword 0xd73a9d61bca21bea | |
5330 | .xword 0x9e27cf232542e007 | |
5331 | .xword 0x203ff515e7575ed8 | |
5332 | .xword 0xfb49bf41e0ab8610 | |
5333 | .xword 0xc580dd6b8da1c254 | |
5334 | .xword 0xbb236d3c61b96885 | |
5335 | .xword 0xb78317462f2dedae | |
5336 | .xword 0x49a7003a3ea332da | |
5337 | .xword 0xc1b0f95034a17596 | |
5338 | .xword 0x5b822ee749c43fa4 | |
5339 | .xword 0xe93dafcb5f7dafd2 | |
5340 | .xword 0xb893f4ab25319796 | |
5341 | .xword 0x9c6b2bef89fec8dc | |
5342 | .xword 0xd449ff5c1c49f960 | |
5343 | .xword 0xb8fc5ecfe13b2d9e | |
5344 | .xword 0xaa6ea9ed6b9986e3 | |
5345 | .xword 0x6cfb0d63d2026be7 | |
5346 | .xword 0x9e4ca880003bda26 | |
5347 | .xword 0x38d3a8f35b3b6e33 | |
5348 | .xword 0xb4f18f3562eadbe9 | |
5349 | .xword 0xf6470d4d5c6e0e29 | |
5350 | .xword 0x45c841e243a8eb30 | |
5351 | .xword 0xe4860893bd0903b3 | |
5352 | .xword 0xa9b4f70d35635c85 | |
5353 | .xword 0x45ea5684c1c9e617 | |
5354 | .xword 0x1aaa2889b8999c4c | |
5355 | .xword 0xcc14a329884cf071 | |
5356 | .xword 0x2280f61babf50bac | |
5357 | .xword 0xcd60e1fdad7aea35 | |
5358 | .xword 0x17be838190816f1d | |
5359 | .xword 0x8b0719ec131be71e | |
5360 | .xword 0x81f158ed58aab9df | |
5361 | .xword 0x0384b3649e69bde9 | |
5362 | .xword 0x36a44fb0b74eb386 | |
5363 | .xword 0x8734ef55f4af82e6 | |
5364 | .xword 0x68aa4a911e21b29e | |
5365 | .xword 0x16998ddde0bc592c | |
5366 | .xword 0x206e0ab7286dfad0 | |
5367 | .xword 0x24884c627bc6daf9 | |
5368 | .xword 0xa6326dc4d7e2e3d5 | |
5369 | .xword 0x6db57c0733d43821 | |
5370 | .xword 0xa717bd1656e827f6 | |
5371 | .xword 0x2cd9c182a34cd0f9 | |
5372 | .xword 0x1e88d4a06d1eaa42 | |
5373 | .xword 0x06b35970a1b1f8dd | |
5374 | .xword 0x34ac33031ccdd274 | |
5375 | .xword 0x22e31402568c2e38 | |
5376 | .xword 0x08952686d675f629 | |
5377 | .xword 0x43b04144a9302a16 | |
5378 | .xword 0x12705a4c337cff59 | |
5379 | .xword 0x6f56e0724c932a4c | |
5380 | .xword 0xbe3a6c85d8e1f097 | |
5381 | .xword 0xaf18408a55bc7eae | |
5382 | .xword 0x6da0f93be2de41ee | |
5383 | .xword 0xafb835ffe144bde1 | |
5384 | .xword 0x5104dd080c7e91e2 | |
5385 | .xword 0xae4cf8d20d76e291 | |
5386 | .xword 0xb09cb01b30203489 | |
5387 | .xword 0xa83bab4780217759 | |
5388 | .xword 0xcb3f63ad8aa23659 | |
5389 | .xword 0x2f71c56e678b2d3b | |
5390 | .xword 0xa4db76f823618630 | |
5391 | .xword 0x38608c5b1462d9b1 | |
5392 | .xword 0xf029178307a538df | |
5393 | .xword 0xbc3601a897d264fa | |
5394 | .xword 0xf0fae6e29e8e0c8f | |
5395 | .xword 0x4efb4c9859d26f47 | |
5396 | .xword 0x6dba1e5cd6a23f8f | |
5397 | .xword 0xdf19a52f70fff24c | |
5398 | .xword 0x3fc5275bd169e679 | |
5399 | .xword 0x6b8feb27399dd3dd | |
5400 | .xword 0xe22c54f86744aec8 | |
5401 | .xword 0x28b0c3c53a718bf9 | |
5402 | .xword 0x91e8c69616db22d3 | |
5403 | .xword 0xd5d2560f3779d3a2 | |
5404 | .xword 0x1687891df9de1ded | |
5405 | .xword 0x6a280231793c1d1c | |
5406 | .xword 0x111697ac815d1ce0 | |
5407 | .xword 0x0e544a8a54fb7849 | |
5408 | .xword 0x0da16a5b7625f9cb | |
5409 | .xword 0x08c295c4002aee8b | |
5410 | .xword 0xba2f7211ac4b3007 | |
5411 | .xword 0x6bb89dcd6af0a550 | |
5412 | .xword 0x7dc976ea762de77c | |
5413 | .xword 0x1910dc88146f5af2 | |
5414 | .xword 0xd83560eb994c4be5 | |
5415 | .xword 0xd164709bf6615afb | |
5416 | .xword 0xf1253c5c32631f10 | |
5417 | .xword 0xd29785486d196026 | |
5418 | .xword 0x4b45f99453fede5c | |
5419 | .xword 0x56bf7d1455a6b14c | |
5420 | .xword 0xdc57b352f82f35e3 | |
5421 | .xword 0x9a7cfc05ebb61af5 | |
5422 | .xword 0xe43d27848e47a809 | |
5423 | .xword 0x62cb6bf6869814b9 | |
5424 | .xword 0x837ace2c09572d63 | |
5425 | .xword 0x46f2e627608f5c4f | |
5426 | .xword 0x19fe8dc08a3f38e7 | |
5427 | .xword 0xc4de5487b986606c | |
5428 | .xword 0xc338342618f78246 | |
5429 | .xword 0x140c435f68416878 | |
5430 | .xword 0xe59ae68e87fb8d24 | |
5431 | .xword 0x2e0261f26da57972 | |
5432 | .xword 0xf22f6e3e9bc5ff07 | |
5433 | .xword 0x99283081bb609e3c | |
5434 | .xword 0x260cd2853fc6254a | |
5435 | .xword 0x1df0ea8a1a7baf5c | |
5436 | .xword 0x1cbb2f7640524f7d | |
5437 | .xword 0x81591ecb3c91f320 | |
5438 | .xword 0x27fb4559d1821a33 | |
5439 | .xword 0xbae14e7a8baf767a | |
5440 | .xword 0x35fb75dc5d583e53 | |
5441 | .xword 0x00f84005171f9046 | |
5442 | .xword 0x5b947305411cab6b | |
5443 | .xword 0x8c61ae54534f6d46 | |
5444 | .xword 0xa53a816f98114057 | |
5445 | .xword 0x9dcadc98aeb16561 | |
5446 | .xword 0xf812d37f0cf92c37 | |
5447 | .xword 0x38034b76e9b1cc52 | |
5448 | .xword 0x12cecc82a4681ac6 | |
5449 | .xword 0x779bc07ca367d088 | |
5450 | .xword 0x4681db0a18c99fda | |
5451 | .xword 0x2333b994b950f73e | |
5452 | .xword 0x35e1938a97183ff0 | |
5453 | .xword 0x1657f2348f45eab7 | |
5454 | .xword 0xe694a4e42dfb2151 | |
5455 | .xword 0x41dbec78c921ae64 | |
5456 | .xword 0xf671c7d40718e366 | |
5457 | .xword 0xb2bdb86015b9d898 | |
5458 | .xword 0xe7bcf67a3c0ed4a6 | |
5459 | .xword 0xd3eb757da9480bd2 | |
5460 | ||
5461 | .global wdog_2_ext | |
5462 | # 9 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
5463 | .global wdog_2_ext | |
5464 | ||
5465 | SECTION .HTRAPS | |
5466 | .text | |
5467 | htrap_5_ext: | |
5468 | rd %pc, %l2 | |
5469 | inc %l3 | |
5470 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 | |
5471 | rdpr %tl, %l3 | |
5472 | rdpr %tstate, %l4 | |
5473 | rdhpr %htstate, %l5 | |
5474 | or %l5, 0x4, %l5 | |
5475 | inc %l3 | |
5476 | wrpr %l3, %tl | |
5477 | wrpr %l2, %tpc | |
5478 | add %l2, 4, %l2 | |
5479 | wrpr %l2, %tnpc | |
5480 | wrpr %l4, %tstate | |
5481 | wrhpr %l5, %htstate | |
5482 | retry | |
5483 | htrap_5_ext_done: | |
5484 | done | |
5485 | ||
5486 | wdog_2_ext: | |
5487 | mov 0x1f, %l1 | |
5488 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
5489 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
5490 | ! If TT != 2, then goto trap handler | |
5491 | rdpr %tt, %l1 | |
5492 | cmp %l1, 0x2 | |
5493 | bne wdog_2_goto_handler | |
5494 | nop | |
5495 | ! else done | |
5496 | done | |
5497 | wdog_2_goto_handler: | |
5498 | rdhpr %htba, %l2 | |
5499 | sllx %l1, 5, %l1 | |
5500 | add %l1, %l2, %l2 | |
5501 | jmp %l2 | |
5502 | nop | |
5503 | # 51 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
5504 | ! Red mode other reset handler | |
5505 | ! Get htba, and tt and make trap address | |
5506 | ! Jump to trap handler .. | |
5507 | ||
5508 | SECTION .RED_SEC | |
5509 | .text | |
5510 | red_other_ext: | |
5511 | ! IF TL=6, shift stack by one .. | |
5512 | rdpr %tl, %l1 | |
5513 | cmp %l1, 6 | |
5514 | be start_tsa_shift | |
5515 | nop | |
5516 | ||
5517 | continue_red_other: | |
5518 | mov 0x1f, %l1 | |
5519 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
5520 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
5521 | ||
5522 | rdpr %tt, %l1 | |
5523 | sllx %l1, 5, %l1 | |
5524 | rdhpr %htba, %l2 | |
5525 | add %l1, %l2, %l2 | |
5526 | rdhpr %hpstate, %l1 | |
5527 | jmp %l2 | |
5528 | wrhpr %l1, 0x20, %hpstate | |
5529 | nop | |
5530 | ||
5531 | wdog_red_ext: | |
5532 | ! Shift stack down by 1 ... | |
5533 | rdpr %tl, %l1 | |
5534 | start_tsa_shift: | |
5535 | mov 0x2, %l2 | |
5536 | ||
5537 | tsa_shift: | |
5538 | wrpr %l2, %tl | |
5539 | rdpr %tt, %l3 | |
5540 | rdpr %tpc, %l4 | |
5541 | rdpr %tnpc, %l5 | |
5542 | rdpr %tstate, %l6 | |
5543 | rdhpr %htstate, %l7 | |
5544 | dec %l2 | |
5545 | wrpr %l2, %tl | |
5546 | wrpr %l3, %tt | |
5547 | wrpr %l4, %tpc | |
5548 | wrpr %l5, %tnpc | |
5549 | wrpr %l6, %tstate | |
5550 | wrhpr %l7, %htstate | |
5551 | add %l2, 2, %l2 | |
5552 | cmp %l2, %l1 | |
5553 | ble tsa_shift | |
5554 | nop | |
5555 | tsa_shift_done: | |
5556 | dec %l1 | |
5557 | wrpr %l1, %tl | |
5558 | ||
5559 | ! If TT != 2, then goto trap handler | |
5560 | rdpr %tt, %l1 | |
5561 | ||
5562 | cmp %l1, 0x2 | |
5563 | bne continue_red_other | |
5564 | nop | |
5565 | ! else done | |
5566 | mov 0x1f, %l1 | |
5567 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
5568 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
5569 | done | |
5570 | # 332 "diag.j" | |
5571 | ||
5572 | ||
5573 | ||
5574 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x000000000038c000 | |
5575 | attr_text { | |
5576 | Name = .MyHTRAPS_0, | |
5577 | RA = 0x0000000000380000, | |
5578 | PA = ra2pa(0x0000000000380000,0), | |
5579 | part_0_ctx_zero_tsb_config_0, | |
5580 | part_0_ctx_nonzero_tsb_config_0, | |
5581 | TTE_G = 1, | |
5582 | TTE_Context = 0, | |
5583 | TTE_V = 1, | |
5584 | TTE_Size = 0, | |
5585 | TTE_NFO = 0, | |
5586 | TTE_IE = 0, | |
5587 | TTE_Soft2 = 0, | |
5588 | TTE_Diag = 0, | |
5589 | TTE_Soft = 0, | |
5590 | TTE_L = 0, | |
5591 | TTE_CP = 1, | |
5592 | TTE_CV = 0, | |
5593 | TTE_E = 0, | |
5594 | TTE_P = 1, | |
5595 | TTE_W = 0, | |
5596 | TTE_X = 1 | |
5597 | } | |
5598 | ||
5599 | ||
5600 | attr_data { | |
5601 | Name = .MyHTRAPS_0, | |
5602 | RA = 0x000000000038c000, | |
5603 | PA = ra2pa(0x000000000038c000,0), | |
5604 | part_0_ctx_zero_tsb_config_0, | |
5605 | part_0_ctx_nonzero_tsb_config_0, | |
5606 | TTE_G = 1, | |
5607 | TTE_Context = 0, | |
5608 | TTE_V = 1, | |
5609 | TTE_Size = 0, | |
5610 | TTE_NFO = 0, | |
5611 | TTE_IE = 0, | |
5612 | TTE_Soft2 = 0, | |
5613 | TTE_Diag = 0, | |
5614 | TTE_Soft = 0, | |
5615 | TTE_L = 0, | |
5616 | TTE_CP = 1, | |
5617 | TTE_CV = 0, | |
5618 | TTE_E = 0, | |
5619 | TTE_P = 1, | |
5620 | TTE_W = 0 | |
5621 | } | |
5622 | ||
5623 | ||
5624 | attr_text { | |
5625 | Name = .MyHTRAPS_0, | |
5626 | hypervisor | |
5627 | } | |
5628 | ||
5629 | ||
5630 | attr_data { | |
5631 | Name = .MyHTRAPS_0, | |
5632 | hypervisor | |
5633 | } | |
5634 | ||
5635 | #include "htraps.s" | |
5636 | #include "tlu_htraps_ext.s" | |
5637 | ||
5638 | ||
5639 | ||
5640 | SECTION .MyHTRAPS_1 TEXT_VA = 0x0000000000390000, DATA_VA = 0x000000000039c000 | |
5641 | attr_text { | |
5642 | Name = .MyHTRAPS_1, | |
5643 | RA = 0x0000000000390000, | |
5644 | PA = ra2pa(0x0000000000390000,0), | |
5645 | part_0_ctx_zero_tsb_config_0, | |
5646 | part_0_ctx_nonzero_tsb_config_0, | |
5647 | TTE_G = 1, | |
5648 | TTE_Context = 0, | |
5649 | TTE_V = 1, | |
5650 | TTE_Size = 0, | |
5651 | TTE_NFO = 0, | |
5652 | TTE_IE = 0, | |
5653 | TTE_Soft2 = 0, | |
5654 | TTE_Diag = 0, | |
5655 | TTE_Soft = 0, | |
5656 | TTE_L = 0, | |
5657 | TTE_CP = 1, | |
5658 | TTE_CV = 0, | |
5659 | TTE_E = 0, | |
5660 | TTE_P = 1, | |
5661 | TTE_W = 0, | |
5662 | TTE_X = 1 | |
5663 | } | |
5664 | ||
5665 | ||
5666 | attr_data { | |
5667 | Name = .MyHTRAPS_1, | |
5668 | RA = 0x000000000039c000, | |
5669 | PA = ra2pa(0x000000000039c000,0), | |
5670 | part_0_ctx_zero_tsb_config_0, | |
5671 | part_0_ctx_nonzero_tsb_config_0, | |
5672 | TTE_G = 1, | |
5673 | TTE_Context = 0, | |
5674 | TTE_V = 1, | |
5675 | TTE_Size = 0, | |
5676 | TTE_NFO = 0, | |
5677 | TTE_IE = 0, | |
5678 | TTE_Soft2 = 0, | |
5679 | TTE_Diag = 0, | |
5680 | TTE_Soft = 0, | |
5681 | TTE_L = 0, | |
5682 | TTE_CP = 1, | |
5683 | TTE_CV = 0, | |
5684 | TTE_E = 0, | |
5685 | TTE_P = 1, | |
5686 | TTE_W = 0 | |
5687 | } | |
5688 | ||
5689 | ||
5690 | attr_text { | |
5691 | Name = .MyHTRAPS_1, | |
5692 | hypervisor | |
5693 | } | |
5694 | ||
5695 | ||
5696 | attr_data { | |
5697 | Name = .MyHTRAPS_1, | |
5698 | hypervisor | |
5699 | } | |
5700 | ||
5701 | #include "htraps.s" | |
5702 | #include "tlu_htraps_ext.s" | |
5703 | ||
5704 | ||
5705 | ||
5706 | SECTION .MyHTRAPS_2 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003ac000 | |
5707 | attr_text { | |
5708 | Name = .MyHTRAPS_2, | |
5709 | RA = 0x00000000003a0000, | |
5710 | PA = ra2pa(0x00000000003a0000,0), | |
5711 | part_0_ctx_zero_tsb_config_0, | |
5712 | part_0_ctx_nonzero_tsb_config_0, | |
5713 | TTE_G = 1, | |
5714 | TTE_Context = 0, | |
5715 | TTE_V = 1, | |
5716 | TTE_Size = 0, | |
5717 | TTE_NFO = 0, | |
5718 | TTE_IE = 0, | |
5719 | TTE_Soft2 = 0, | |
5720 | TTE_Diag = 0, | |
5721 | TTE_Soft = 0, | |
5722 | TTE_L = 0, | |
5723 | TTE_CP = 1, | |
5724 | TTE_CV = 0, | |
5725 | TTE_E = 0, | |
5726 | TTE_P = 1, | |
5727 | TTE_W = 0, | |
5728 | TTE_X = 1 | |
5729 | } | |
5730 | ||
5731 | ||
5732 | attr_data { | |
5733 | Name = .MyHTRAPS_2, | |
5734 | RA = 0x00000000003ac000, | |
5735 | PA = ra2pa(0x00000000003ac000,0), | |
5736 | part_0_ctx_zero_tsb_config_0, | |
5737 | part_0_ctx_nonzero_tsb_config_0, | |
5738 | TTE_G = 1, | |
5739 | TTE_Context = 0, | |
5740 | TTE_V = 1, | |
5741 | TTE_Size = 0, | |
5742 | TTE_NFO = 0, | |
5743 | TTE_IE = 0, | |
5744 | TTE_Soft2 = 0, | |
5745 | TTE_Diag = 0, | |
5746 | TTE_Soft = 0, | |
5747 | TTE_L = 0, | |
5748 | TTE_CP = 1, | |
5749 | TTE_CV = 0, | |
5750 | TTE_E = 0, | |
5751 | TTE_P = 1, | |
5752 | TTE_W = 0 | |
5753 | } | |
5754 | ||
5755 | ||
5756 | attr_text { | |
5757 | Name = .MyHTRAPS_2, | |
5758 | hypervisor | |
5759 | } | |
5760 | ||
5761 | ||
5762 | attr_data { | |
5763 | Name = .MyHTRAPS_2, | |
5764 | hypervisor | |
5765 | } | |
5766 | ||
5767 | #include "htraps.s" | |
5768 | #include "tlu_htraps_ext.s" | |
5769 | ||
5770 | ||
5771 | ||
5772 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000000003b0000, DATA_VA = 0x00000000003bc000 | |
5773 | attr_text { | |
5774 | Name = .MyHTRAPS_3, | |
5775 | RA = 0x00000000003b0000, | |
5776 | PA = ra2pa(0x00000000003b0000,0), | |
5777 | part_0_ctx_zero_tsb_config_0, | |
5778 | part_0_ctx_nonzero_tsb_config_0, | |
5779 | TTE_G = 1, | |
5780 | TTE_Context = 0, | |
5781 | TTE_V = 1, | |
5782 | TTE_Size = 0, | |
5783 | TTE_NFO = 0, | |
5784 | TTE_IE = 0, | |
5785 | TTE_Soft2 = 0, | |
5786 | TTE_Diag = 0, | |
5787 | TTE_Soft = 0, | |
5788 | TTE_L = 0, | |
5789 | TTE_CP = 1, | |
5790 | TTE_CV = 0, | |
5791 | TTE_E = 0, | |
5792 | TTE_P = 1, | |
5793 | TTE_W = 0, | |
5794 | TTE_X = 1 | |
5795 | } | |
5796 | ||
5797 | ||
5798 | attr_data { | |
5799 | Name = .MyHTRAPS_3, | |
5800 | RA = 0x00000000003bc000, | |
5801 | PA = ra2pa(0x00000000003bc000,0), | |
5802 | part_0_ctx_zero_tsb_config_0, | |
5803 | part_0_ctx_nonzero_tsb_config_0, | |
5804 | TTE_G = 1, | |
5805 | TTE_Context = 0, | |
5806 | TTE_V = 1, | |
5807 | TTE_Size = 0, | |
5808 | TTE_NFO = 0, | |
5809 | TTE_IE = 0, | |
5810 | TTE_Soft2 = 0, | |
5811 | TTE_Diag = 0, | |
5812 | TTE_Soft = 0, | |
5813 | TTE_L = 0, | |
5814 | TTE_CP = 1, | |
5815 | TTE_CV = 0, | |
5816 | TTE_E = 0, | |
5817 | TTE_P = 1, | |
5818 | TTE_W = 0 | |
5819 | } | |
5820 | ||
5821 | ||
5822 | attr_text { | |
5823 | Name = .MyHTRAPS_3, | |
5824 | hypervisor | |
5825 | } | |
5826 | ||
5827 | ||
5828 | attr_data { | |
5829 | Name = .MyHTRAPS_3, | |
5830 | hypervisor | |
5831 | } | |
5832 | ||
5833 | #include "htraps.s" | |
5834 | #include "tlu_htraps_ext.s" | |
5835 | ||
5836 | ||
5837 | ||
5838 | ||
5839 | ||
5840 | SECTION .MyTRAPS_0 TEXT_VA = 0x00000000003c0000, DATA_VA = 0x00000000003cc000 | |
5841 | attr_text { | |
5842 | Name = .MyTRAPS_0, | |
5843 | RA = 0x00000000003c0000, | |
5844 | PA = ra2pa(0x00000000003c0000,0), | |
5845 | part_0_ctx_zero_tsb_config_0, | |
5846 | part_0_ctx_nonzero_tsb_config_0, | |
5847 | TTE_G = 1, | |
5848 | TTE_Context = 0, | |
5849 | TTE_V = 1, | |
5850 | TTE_Size = 0, | |
5851 | TTE_NFO = 0, | |
5852 | TTE_IE = 0, | |
5853 | TTE_Soft2 = 0, | |
5854 | TTE_Diag = 0, | |
5855 | TTE_Soft = 0, | |
5856 | TTE_L = 0, | |
5857 | TTE_CP = 1, | |
5858 | TTE_CV = 0, | |
5859 | TTE_E = 0, | |
5860 | TTE_P = 1, | |
5861 | TTE_W = 0, | |
5862 | TTE_X = 1 | |
5863 | } | |
5864 | ||
5865 | ||
5866 | attr_data { | |
5867 | Name = .MyTRAPS_0, | |
5868 | RA = 0x00000000003cc000, | |
5869 | PA = ra2pa(0x00000000003cc000,0), | |
5870 | part_0_ctx_zero_tsb_config_0, | |
5871 | part_0_ctx_nonzero_tsb_config_0, | |
5872 | TTE_G = 1, | |
5873 | TTE_Context = 0, | |
5874 | TTE_V = 1, | |
5875 | TTE_Size = 0, | |
5876 | TTE_NFO = 0, | |
5877 | TTE_IE = 0, | |
5878 | TTE_Soft2 = 0, | |
5879 | TTE_Diag = 0, | |
5880 | TTE_Soft = 0, | |
5881 | TTE_L = 0, | |
5882 | TTE_CP = 1, | |
5883 | TTE_CV = 0, | |
5884 | TTE_E = 0, | |
5885 | TTE_P = 1, | |
5886 | TTE_W = 0 | |
5887 | } | |
5888 | ||
5889 | ||
5890 | attr_text { | |
5891 | Name = .MyTRAPS_0, | |
5892 | hypervisor | |
5893 | } | |
5894 | ||
5895 | ||
5896 | attr_data { | |
5897 | Name = .MyTRAPS_0, | |
5898 | hypervisor | |
5899 | } | |
5900 | ||
5901 | #include "traps.s" | |
5902 | ||
5903 | ||
5904 | ||
5905 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003d0000, DATA_VA = 0x00000000003dc000 | |
5906 | attr_text { | |
5907 | Name = .MyTRAPS_1, | |
5908 | RA = 0x00000000003d0000, | |
5909 | PA = ra2pa(0x00000000003d0000,0), | |
5910 | part_0_ctx_zero_tsb_config_0, | |
5911 | part_0_ctx_nonzero_tsb_config_0, | |
5912 | TTE_G = 1, | |
5913 | TTE_Context = 0, | |
5914 | TTE_V = 1, | |
5915 | TTE_Size = 0, | |
5916 | TTE_NFO = 0, | |
5917 | TTE_IE = 0, | |
5918 | TTE_Soft2 = 0, | |
5919 | TTE_Diag = 0, | |
5920 | TTE_Soft = 0, | |
5921 | TTE_L = 0, | |
5922 | TTE_CP = 1, | |
5923 | TTE_CV = 0, | |
5924 | TTE_E = 0, | |
5925 | TTE_P = 1, | |
5926 | TTE_W = 0, | |
5927 | TTE_X = 1 | |
5928 | } | |
5929 | ||
5930 | ||
5931 | attr_data { | |
5932 | Name = .MyTRAPS_1, | |
5933 | RA = 0x00000000003dc000, | |
5934 | PA = ra2pa(0x00000000003dc000,0), | |
5935 | part_0_ctx_zero_tsb_config_0, | |
5936 | part_0_ctx_nonzero_tsb_config_0, | |
5937 | TTE_G = 1, | |
5938 | TTE_Context = 0, | |
5939 | TTE_V = 1, | |
5940 | TTE_Size = 0, | |
5941 | TTE_NFO = 0, | |
5942 | TTE_IE = 0, | |
5943 | TTE_Soft2 = 0, | |
5944 | TTE_Diag = 0, | |
5945 | TTE_Soft = 0, | |
5946 | TTE_L = 0, | |
5947 | TTE_CP = 1, | |
5948 | TTE_CV = 0, | |
5949 | TTE_E = 0, | |
5950 | TTE_P = 1, | |
5951 | TTE_W = 0 | |
5952 | } | |
5953 | ||
5954 | ||
5955 | attr_text { | |
5956 | Name = .MyTRAPS_1, | |
5957 | hypervisor | |
5958 | } | |
5959 | ||
5960 | ||
5961 | attr_data { | |
5962 | Name = .MyTRAPS_1, | |
5963 | hypervisor | |
5964 | } | |
5965 | ||
5966 | #include "traps.s" | |
5967 | ||
5968 | ||
5969 | ||
5970 | SECTION .MyTRAPS_2 TEXT_VA = 0x00000000003e0000, DATA_VA = 0x00000000003ec000 | |
5971 | attr_text { | |
5972 | Name = .MyTRAPS_2, | |
5973 | RA = 0x00000000003e0000, | |
5974 | PA = ra2pa(0x00000000003e0000,0), | |
5975 | part_0_ctx_zero_tsb_config_0, | |
5976 | part_0_ctx_nonzero_tsb_config_0, | |
5977 | TTE_G = 1, | |
5978 | TTE_Context = 0, | |
5979 | TTE_V = 1, | |
5980 | TTE_Size = 0, | |
5981 | TTE_NFO = 0, | |
5982 | TTE_IE = 0, | |
5983 | TTE_Soft2 = 0, | |
5984 | TTE_Diag = 0, | |
5985 | TTE_Soft = 0, | |
5986 | TTE_L = 0, | |
5987 | TTE_CP = 1, | |
5988 | TTE_CV = 0, | |
5989 | TTE_E = 0, | |
5990 | TTE_P = 1, | |
5991 | TTE_W = 0, | |
5992 | TTE_X = 1 | |
5993 | } | |
5994 | ||
5995 | ||
5996 | attr_data { | |
5997 | Name = .MyTRAPS_2, | |
5998 | RA = 0x00000000003ec000, | |
5999 | PA = ra2pa(0x00000000003ec000,0), | |
6000 | part_0_ctx_zero_tsb_config_0, | |
6001 | part_0_ctx_nonzero_tsb_config_0, | |
6002 | TTE_G = 1, | |
6003 | TTE_Context = 0, | |
6004 | TTE_V = 1, | |
6005 | TTE_Size = 0, | |
6006 | TTE_NFO = 0, | |
6007 | TTE_IE = 0, | |
6008 | TTE_Soft2 = 0, | |
6009 | TTE_Diag = 0, | |
6010 | TTE_Soft = 0, | |
6011 | TTE_L = 0, | |
6012 | TTE_CP = 1, | |
6013 | TTE_CV = 0, | |
6014 | TTE_E = 0, | |
6015 | TTE_P = 1, | |
6016 | TTE_W = 0 | |
6017 | } | |
6018 | ||
6019 | ||
6020 | attr_text { | |
6021 | Name = .MyTRAPS_2, | |
6022 | hypervisor | |
6023 | } | |
6024 | ||
6025 | ||
6026 | attr_data { | |
6027 | Name = .MyTRAPS_2, | |
6028 | hypervisor | |
6029 | } | |
6030 | ||
6031 | #include "traps.s" | |
6032 | ||
6033 | ||
6034 | ||
6035 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000000003f0000, DATA_VA = 0x00000000003fc000 | |
6036 | attr_text { | |
6037 | Name = .MyTRAPS_3, | |
6038 | RA = 0x00000000003f0000, | |
6039 | PA = ra2pa(0x00000000003f0000,0), | |
6040 | part_0_ctx_zero_tsb_config_0, | |
6041 | part_0_ctx_nonzero_tsb_config_0, | |
6042 | TTE_G = 1, | |
6043 | TTE_Context = 0, | |
6044 | TTE_V = 1, | |
6045 | TTE_Size = 0, | |
6046 | TTE_NFO = 0, | |
6047 | TTE_IE = 0, | |
6048 | TTE_Soft2 = 0, | |
6049 | TTE_Diag = 0, | |
6050 | TTE_Soft = 0, | |
6051 | TTE_L = 0, | |
6052 | TTE_CP = 1, | |
6053 | TTE_CV = 0, | |
6054 | TTE_E = 0, | |
6055 | TTE_P = 1, | |
6056 | TTE_W = 0, | |
6057 | TTE_X = 1 | |
6058 | } | |
6059 | ||
6060 | ||
6061 | attr_data { | |
6062 | Name = .MyTRAPS_3, | |
6063 | RA = 0x00000000003fc000, | |
6064 | PA = ra2pa(0x00000000003fc000,0), | |
6065 | part_0_ctx_zero_tsb_config_0, | |
6066 | part_0_ctx_nonzero_tsb_config_0, | |
6067 | TTE_G = 1, | |
6068 | TTE_Context = 0, | |
6069 | TTE_V = 1, | |
6070 | TTE_Size = 0, | |
6071 | TTE_NFO = 0, | |
6072 | TTE_IE = 0, | |
6073 | TTE_Soft2 = 0, | |
6074 | TTE_Diag = 0, | |
6075 | TTE_Soft = 0, | |
6076 | TTE_L = 0, | |
6077 | TTE_CP = 1, | |
6078 | TTE_CV = 0, | |
6079 | TTE_E = 0, | |
6080 | TTE_P = 1, | |
6081 | TTE_W = 0 | |
6082 | } | |
6083 | ||
6084 | ||
6085 | attr_text { | |
6086 | Name = .MyTRAPS_3, | |
6087 | hypervisor | |
6088 | } | |
6089 | ||
6090 | ||
6091 | attr_data { | |
6092 | Name = .MyTRAPS_3, | |
6093 | hypervisor | |
6094 | } | |
6095 | ||
6096 | #include "traps.s" | |
6097 | ||
6098 | ||
6099 | ||
6100 | #if 0 | |
6101 | #endif | |
6102 |