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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: tlu_rand05_ind_11.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define TRAP_SECT_HV_ALSO | |
39 | #define DMMU_SKIP_IF_NO_TTE | |
40 | #define IMMU_SKIP_IF_NO_TTE | |
41 | ||
42 | #define MAIN_PAGE_NUCLEUS_ALSO | |
43 | #define MAIN_PAGE_HV_ALSO | |
44 | #define MAIN_PAGE_VA_IS_RA_ALSO | |
45 | #define DISABLE_PART_LIMIT_CHECK | |
46 | # 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
47 | !!!!!!!!!!!!!!!!!!!!!!!!! | |
48 | !! Disable trap checking | |
49 | #define NO_TRAPCHECK | |
50 | ||
51 | ! Enable Traps | |
52 | #define ENABLE_T1_Privileged_Opcode_0x11 | |
53 | #define ENABLE_T1_Fp_Disabled_0x20 | |
54 | #define ENABLE_HT0_Watchdog_Reset_0x02 | |
55 | ||
56 | #define FILL_TRAP_RETRY | |
57 | #define SPILL_TRAP_RETRY | |
58 | #define CLEAN_WIN_RETRY | |
59 | ||
60 | #define My_RED_Mode_Other_Reset | |
61 | #define My_RED_Mode_Other_Reset \ | |
62 | ba red_other_ext;\ | |
63 | nop;retry;nop;nop;nop;nop;nop | |
64 | # 24 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
65 | #define H_T1_Clean_Window_0x24 | |
66 | #define SUN_H_T1_Clean_Window_0x24 \ | |
67 | rdpr %cleanwin, %l1;\ | |
68 | add %l1,1,%l1;\ | |
69 | wrpr %l1, %g0, %cleanwin;\ | |
70 | retry; nop; nop; nop; nop | |
71 | ||
72 | #define H_T1_Clean_Window_0x25 | |
73 | #define SUN_H_T1_Clean_Window_0x25 \ | |
74 | rdpr %cleanwin, %l1;\ | |
75 | add %l1,1,%l1;\ | |
76 | wrpr %l1, %g0, %cleanwin;\ | |
77 | retry; nop; nop; nop; nop | |
78 | ||
79 | #define H_T1_Clean_Window_0x26 | |
80 | #define SUN_H_T1_Clean_Window_0x26 \ | |
81 | rdpr %cleanwin, %l1;\ | |
82 | add %l1,1,%l1;\ | |
83 | wrpr %l1, %g0, %cleanwin;\ | |
84 | retry; nop; nop; nop; nop | |
85 | ||
86 | #define H_T1_Clean_Window_0x27 | |
87 | #define SUN_H_T1_Clean_Window_0x27 \ | |
88 | rdpr %cleanwin, %l1;\ | |
89 | add %l1,1,%l1;\ | |
90 | wrpr %l1, %g0, %cleanwin;\ | |
91 | retry; nop; nop; nop; nop | |
92 | # 53 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
93 | #define H_HT0_Tag_Overflow | |
94 | #define My_HT0_Tag_Overflow \ | |
95 | done;nop; | |
96 | ||
97 | #define H_T0_Tag_Overflow | |
98 | #define My_T0_Tag_Overflow \ | |
99 | done;nop; | |
100 | ||
101 | #define H_T1_Tag_Overflow_0x23 | |
102 | #define SUN_H_T1_Tag_Overflow_0x23 \ | |
103 | done;nop; | |
104 | ||
105 | #define H_T0_Window_Spill_0_Normal_Trap | |
106 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
107 | ||
108 | #define H_T0_Window_Spill_1_Normal_Trap | |
109 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
110 | ||
111 | #define H_T0_Window_Spill_2_Normal_Trap | |
112 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
113 | ||
114 | #define H_T0_Window_Spill_3_Normal_Trap | |
115 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
116 | ||
117 | #define H_T0_Window_Spill_4_Normal_Trap | |
118 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
119 | ||
120 | #define H_T0_Window_Spill_5_Normal_Trap | |
121 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
122 | ||
123 | #define H_T0_Window_Spill_6_Normal_Trap | |
124 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
125 | ||
126 | #define H_T0_Window_Spill_7_Normal_Trap | |
127 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
128 | ||
129 | #define H_T0_Window_Spill_0_Other_Trap | |
130 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
131 | ||
132 | #define H_T0_Window_Spill_1_Other_Trap | |
133 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
134 | ||
135 | #define H_T0_Window_Spill_2_Other_Trap | |
136 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
137 | ||
138 | #define H_T0_Window_Spill_3_Other_Trap | |
139 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
140 | ||
141 | #define H_T0_Window_Spill_4_Other_Trap | |
142 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
143 | ||
144 | #define H_T0_Window_Spill_5_Other_Trap | |
145 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
146 | ||
147 | #define H_T0_Window_Spill_6_Other_Trap | |
148 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
149 | ||
150 | #define H_T0_Window_Spill_7_Other_Trap | |
151 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
152 | ||
153 | #define H_T0_Window_Fill_0_Normal_Trap | |
154 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
155 | ||
156 | #define H_T0_Window_Fill_1_Normal_Trap | |
157 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
158 | ||
159 | #define H_T0_Window_Fill_2_Normal_Trap | |
160 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
161 | ||
162 | #define H_T0_Window_Fill_3_Normal_Trap | |
163 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
164 | ||
165 | #define H_T0_Window_Fill_4_Normal_Trap | |
166 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
167 | ||
168 | #define H_T0_Window_Fill_5_Normal_Trap | |
169 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
170 | ||
171 | #define H_T0_Window_Fill_6_Normal_Trap | |
172 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
173 | ||
174 | #define H_T0_Window_Fill_7_Normal_Trap | |
175 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
176 | ||
177 | #define H_T0_Window_Fill_0_Other_Trap | |
178 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
179 | ||
180 | #define H_T0_Window_Fill_1_Other_Trap | |
181 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
182 | ||
183 | #define H_T0_Window_Fill_2_Other_Trap | |
184 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
185 | ||
186 | #define H_T0_Window_Fill_3_Other_Trap | |
187 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
188 | ||
189 | #define H_T0_Window_Fill_4_Other_Trap | |
190 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
191 | ||
192 | #define H_T0_Window_Fill_5_Other_Trap | |
193 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
194 | ||
195 | #define H_T0_Window_Fill_6_Other_Trap | |
196 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
197 | ||
198 | #define H_T0_Window_Fill_7_Other_Trap | |
199 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
200 | # 162 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
201 | #define H_T1_Window_Spill_0_Normal_Trap | |
202 | #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
203 | ||
204 | #define H_T1_Window_Spill_1_Normal_Trap | |
205 | #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
206 | ||
207 | #define H_T1_Window_Spill_2_Normal_Trap | |
208 | #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
209 | ||
210 | #define H_T1_Window_Spill_3_Normal_Trap | |
211 | #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
212 | ||
213 | #define H_T1_Window_Spill_4_Normal_Trap | |
214 | #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
215 | ||
216 | #define H_T1_Window_Spill_5_Normal_Trap | |
217 | #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
218 | ||
219 | #define H_T1_Window_Spill_6_Normal_Trap | |
220 | #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
221 | ||
222 | #define H_T1_Window_Spill_7_Normal_Trap | |
223 | #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
224 | ||
225 | #define H_T1_Window_Spill_0_Other_Trap | |
226 | #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
227 | ||
228 | #define H_T1_Window_Spill_1_Other_Trap | |
229 | #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
230 | ||
231 | #define H_T1_Window_Spill_2_Other_Trap | |
232 | #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
233 | ||
234 | #define H_T1_Window_Spill_3_Other_Trap | |
235 | #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
236 | ||
237 | #define H_T1_Window_Spill_4_Other_Trap | |
238 | #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
239 | ||
240 | #define H_T1_Window_Spill_5_Other_Trap | |
241 | #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
242 | ||
243 | #define H_T1_Window_Spill_6_Other_Trap | |
244 | #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
245 | ||
246 | #define H_T1_Window_Spill_7_Other_Trap | |
247 | #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
248 | ||
249 | #define H_T1_Window_Fill_0_Normal_Trap | |
250 | #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
251 | ||
252 | #define H_T1_Window_Fill_1_Normal_Trap | |
253 | #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
254 | ||
255 | #define H_T1_Window_Fill_2_Normal_Trap | |
256 | #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
257 | ||
258 | #define H_T1_Window_Fill_3_Normal_Trap | |
259 | #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
260 | ||
261 | #define H_T1_Window_Fill_4_Normal_Trap | |
262 | #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
263 | ||
264 | #define H_T1_Window_Fill_5_Normal_Trap | |
265 | #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
266 | ||
267 | #define H_T1_Window_Fill_6_Normal_Trap | |
268 | #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
269 | ||
270 | #define H_T1_Window_Fill_7_Normal_Trap | |
271 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
272 | ||
273 | #define H_T1_Window_Fill_0_Other_Trap | |
274 | #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
275 | ||
276 | #define H_T1_Window_Fill_1_Other_Trap | |
277 | #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
278 | ||
279 | #define H_T1_Window_Fill_2_Other_Trap | |
280 | #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
281 | ||
282 | #define H_T1_Window_Fill_3_Other_Trap | |
283 | #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
284 | ||
285 | #define H_T1_Window_Fill_4_Other_Trap | |
286 | #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
287 | ||
288 | #define H_T1_Window_Fill_5_Other_Trap | |
289 | #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
290 | ||
291 | #define H_T1_Window_Fill_6_Other_Trap | |
292 | #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
293 | ||
294 | #define H_T1_Window_Fill_7_Other_Trap | |
295 | #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
296 | ||
297 | #define H_T0_Trap_Instruction_0 | |
298 | #define My_T0_Trap_Instruction_0 \ | |
299 | save %i7, %g0, %i7; \ | |
300 | rdpr %tnpc, %l2; \ | |
301 | wrpr %l2, %tpc; \ | |
302 | add %l2, 4, %l2;\ | |
303 | wrpr %l2, %tnpc; \ | |
304 | stw %l2, [%i7];\ | |
305 | restore %i7, %g0, %i7; \ | |
306 | retry | |
307 | #define H_T0_Trap_Instruction_1 | |
308 | #define My_T0_Trap_Instruction_1 \ | |
309 | umul %o4, 2, %o5;\ | |
310 | rdpr %tnpc, %l2; \ | |
311 | wrpr %l2, %tpc; \ | |
312 | add %l2, 4, %l2;\ | |
313 | wrpr %l2, %tnpc; \ | |
314 | stw %l2, [%i7];\ | |
315 | illtrap;\ | |
316 | retry | |
317 | #define H_T0_Trap_Instruction_2 | |
318 | #define My_T0_Trap_Instruction_2 \ | |
319 | inc %o3;\ | |
320 | umul %o3, 2, %o4;\ | |
321 | ba 1f; \ | |
322 | save %i7, %g0, %i7; \ | |
323 | 2: done; \ | |
324 | nop; \ | |
325 | 1: ba 2b; \ | |
326 | restore %i7, %g0, %i7 | |
327 | #define H_T0_Trap_Instruction_3 | |
328 | #define My_T0_Trap_Instruction_3 \ | |
329 | inc %l3;\ | |
330 | inc %o3;\ | |
331 | umul %o3, 2, %o4;\ | |
332 | stw %o4, [%i7];\ | |
333 | save %i7, %g0, %i7 ;\ | |
334 | restore %i7, %g0, %i7 ;\ | |
335 | done ;\ | |
336 | nop; | |
337 | #define H_T0_Trap_Instruction_4 | |
338 | #define My_T0_Trap_Instruction_4 \ | |
339 | umul %i4, 2, %l5;\ | |
340 | inc %o1;\ | |
341 | rdpr %tnpc, %l2; \ | |
342 | wrpr %l2, %tpc; \ | |
343 | add %l2, 4, %l2;\ | |
344 | wrpr %l2, %tnpc; \ | |
345 | retry ;\ | |
346 | illtrap | |
347 | #define H_T0_Trap_Instruction_5 | |
348 | #define My_T0_Trap_Instruction_5 \ | |
349 | umul %i7, 2, %l1;\ | |
350 | inc %o5;\ | |
351 | rdpr %tnpc, %l2; \ | |
352 | wrpr %l2, %tpc; \ | |
353 | add %l2, 4, %l2;\ | |
354 | wrpr %l2, %tnpc; \ | |
355 | sdiv %r2, %r10, %r0; \ | |
356 | retry | |
357 | ||
358 | #define H_T1_Trap_Instruction_0 | |
359 | #define My_T1_Trap_Instruction_0 \ | |
360 | inc %o4;\ | |
361 | umul %o4, 2, %o5;\ | |
362 | ba 3f; \ | |
363 | save %i7, %g0, %i7; \ | |
364 | 4: done; \ | |
365 | nop; \ | |
366 | 3: ba 4b; \ | |
367 | restore %i7, %g0, %i7 | |
368 | #define H_T1_Trap_Instruction_1 | |
369 | #define My_T1_Trap_Instruction_1 \ | |
370 | umul %o4, 2, %o5;\ | |
371 | rdpr %tnpc, %l2; \ | |
372 | wrpr %l2, %tpc; \ | |
373 | add %l2, 4, %l2;\ | |
374 | stw %l2, [%i7];\ | |
375 | wrpr %l2, %tnpc; \ | |
376 | restore %i7, %g0, %i7 ;;\ | |
377 | retry | |
378 | #define H_T1_Trap_Instruction_2 | |
379 | #define My_T1_Trap_Instruction_2 \ | |
380 | inc %o3;\ | |
381 | umul %o3, 2, %o4;\ | |
382 | ba 5f; \ | |
383 | save %i7, %g0, %i7; \ | |
384 | 6: done; \ | |
385 | nop; \ | |
386 | 5: ba 6b; \ | |
387 | restore %i7, %g0, %i7 | |
388 | #define H_T1_Trap_Instruction_3 | |
389 | #define My_T1_Trap_Instruction_3 \ | |
390 | inc %l3;\ | |
391 | inc %o3;\ | |
392 | umul %o3, 2, %o4;\ | |
393 | inc %i3;\ | |
394 | save %i7, %g0, %i7 ;\ | |
395 | restore %i7, %g0, %i7 ;\ | |
396 | done ;\ | |
397 | nop; | |
398 | #define H_T1_Trap_Instruction_4 | |
399 | #define My_T1_Trap_Instruction_4 \ | |
400 | umul %i4, 2, %l5;\ | |
401 | rdpr %tnpc, %l2; \ | |
402 | wrpr %l2, %tpc; \ | |
403 | stw %l2, [%i7];\ | |
404 | add %l2, 4, %l2;\ | |
405 | wrpr %l2, %tnpc; \ | |
406 | retry ;\ | |
407 | illtrap | |
408 | #define H_T1_Trap_Instruction_5 | |
409 | #define My_T1_Trap_Instruction_5 \ | |
410 | umul %i7, 2, %l1;\ | |
411 | inc %o5;\ | |
412 | rdpr %tnpc, %l2; \ | |
413 | wrpr %l2, %tpc; \ | |
414 | add %l2, 4, %l2;\ | |
415 | wrpr %l2, %tnpc; \ | |
416 | sdiv %r2, %r10, %r0; \ | |
417 | retry | |
418 | ||
419 | #define H_HT0_Trap_Instruction_0 | |
420 | #define My_HT0_Trap_Instruction_0 \ | |
421 | rd %asi, %l2;\ | |
422 | mov 0x80, %l3;\ | |
423 | stxa %l3, [%l3] 0x57;\ | |
424 | stw %l2, [%i7];\ | |
425 | done;\ | |
426 | nop;nop;nop | |
427 | ||
428 | #define H_HT0_Trap_Instruction_1 | |
429 | #define My_HT0_Trap_Instruction_1 \ | |
430 | rd %asi, %l2;\ | |
431 | mov 0x80, %l3;\ | |
432 | stxa %l3, [%l3] 0x5f;\ | |
433 | done;\ | |
434 | nop;nop;nop;nop | |
435 | #define H_HT0_Trap_Instruction_2 | |
436 | #define My_HT0_Trap_Instruction_2 \ | |
437 | umul %i6, 2, %l4;\ | |
438 | stw %l4, [%i7];\ | |
439 | rdpr %tnpc, %l2; \ | |
440 | wrpr %l2, %tpc; \ | |
441 | add %l2, 4, %l2;\ | |
442 | wrpr %l2, %tnpc; \ | |
443 | sdiv %r2, %r0, %r0; \ | |
444 | retry | |
445 | #define H_HT0_Trap_Instruction_3 | |
446 | #define My_HT0_Trap_Instruction_3 \ | |
447 | umul %i5, 3, %l3;\ | |
448 | inc %o6;\ | |
449 | illtrap ;\ | |
450 | rdpr %tnpc, %l2; \ | |
451 | wrpr %l2, %tpc; \ | |
452 | add %l2, 4, %l2;\ | |
453 | wrpr %l2, %tnpc; \ | |
454 | retry | |
455 | #define H_HT0_Trap_Instruction_4 | |
456 | #define My_HT0_Trap_Instruction_4 \ | |
457 | save %i7, %g0, %i7; \ | |
458 | rdpr %tnpc, %l2; \ | |
459 | wrpr %l2, %tpc; \ | |
460 | add %l2, 4, %l2;\ | |
461 | stw %l2, [%i7];\ | |
462 | wrpr %l2, %tnpc; \ | |
463 | restore %i7, %g0, %i7 ;\ | |
464 | retry | |
465 | #define H_HT0_Trap_Instruction_5 | |
466 | #define My_HT0_Trap_Instruction_5 \ | |
467 | ba htrap_5_ext;\ | |
468 | nop; retry;\ | |
469 | nop; nop; nop; nop; nop | |
470 | ||
471 | #define H_HT0_Mem_Address_Not_Aligned_0x34 | |
472 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ | |
473 | inc %l6;\ | |
474 | save %i7, %g0, %i7 ;\ | |
475 | done ;\ | |
476 | nop; | |
477 | #define H_HT0_Illegal_instruction_0x10 | |
478 | #define My_HT0_Illegal_instruction_0x10 \ | |
479 | restore %i7, %g0, %i7 ;\ | |
480 | ba 7f; \ | |
481 | rdhpr %htstate, %l3;\ | |
482 | 8: done; \ | |
483 | 7: ba 8b;\ | |
484 | wrhpr %l3, 1, %htstate;nop | |
485 | ||
486 | #define H_HT0_DAE_so_page_0x30 | |
487 | #define My_HT0_DAE_so_page_0x30 \ | |
488 | restore %i7, %g0, %i7;\ | |
489 | rd %fprs, %l2; \ | |
490 | wr %l2, 0x4, %fprs ;\ | |
491 | done; \ | |
492 | nop; | |
493 | #define H_HT0_DAE_invalid_asi_0x14 | |
494 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ | |
495 | save %i7, %g0, %i7; \ | |
496 | rd %fprs, %l2; \ | |
497 | wr %l2, 0x4, %fprs ;\ | |
498 | done; \ | |
499 | nop; | |
500 | #define H_HT0_DAE_privilege_violation_0x15 | |
501 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ | |
502 | save %i7, %g0, %i7; \ | |
503 | rd %fprs, %l2; \ | |
504 | wr %l2, 0x4, %fprs ;\ | |
505 | done; \ | |
506 | nop; | |
507 | #define H_HT0_Privileged_Action_0x37 | |
508 | #define My_HT0_Privileged_Action_0x37 \ | |
509 | restore %i7, %g0, %i7;\ | |
510 | done; \ | |
511 | nop; nop | |
512 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
513 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ | |
514 | rdpr %tpc, %l2; \ | |
515 | add %l2, 0x4, %l2; \ | |
516 | wrpr %l2, %tpc; \ | |
517 | add %l2, 0x4, %l2; \ | |
518 | wrpr %l2, %tnpc; \ | |
519 | retry | |
520 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
521 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ | |
522 | rdpr %tpc, %l2; \ | |
523 | add %l2, 0x4, %l2; \ | |
524 | wrpr %l2, %tpc; \ | |
525 | add %l2, 0x4, %l2; \ | |
526 | wrpr %l2, %tnpc; \ | |
527 | retry | |
528 | #define H_HT0_Fp_exception_other_0x22 | |
529 | #define My_HT0_Fp_exception_other_0x22 \ | |
530 | umul %i5, 4, %l2;\ | |
531 | save %i7, %g0, %i7; \ | |
532 | stw %l2, [%i7];\ | |
533 | done; \ | |
534 | nop | |
535 | #define H_HT0_Division_By_Zero | |
536 | #define My_HT0_Division_By_Zero \ | |
537 | umul %i5, 4, %l2;\ | |
538 | done; \ | |
539 | nop; nop | |
540 | #define H_T0_Division_By_Zero | |
541 | #define My_T0_Division_By_Zero \ | |
542 | inc %l6;\ | |
543 | dec %l5;\ | |
544 | umul %i5, 4, %l2;\ | |
545 | done; \ | |
546 | nop; nop | |
547 | #define H_T1_Division_By_Zero_0x28 | |
548 | #define My_H_T1_Division_By_Zero_0x28 \ | |
549 | inc %l6;\ | |
550 | dec %l5;\ | |
551 | umul %i5, 4, %l2;\ | |
552 | save %i7, %g0, %i7; \ | |
553 | restore %i7, %g0, %i7;\ | |
554 | done; \ | |
555 | nop; nop | |
556 | ||
557 | #define H_T0_Division_By_Zero | |
558 | #define My_T0_Division_By_Zero\ | |
559 | inc %l6;\ | |
560 | dec %l5;\ | |
561 | umul %i5, 4, %l2;\ | |
562 | save %i7, %g0, %i7; \ | |
563 | restore %i7, %g0, %i7;\ | |
564 | done; \ | |
565 | nop; nop | |
566 | ||
567 | #define H_T1_Fp_Exception_Other_0x22 | |
568 | #define My_H_T1_Fp_Exception_Other_0x22 \ | |
569 | inc %l6;\ | |
570 | dec %l5;\ | |
571 | umul %i5, 4, %l2;\ | |
572 | save %i7, %g0, %i7; \ | |
573 | restore %i7, %g0, %i7;\ | |
574 | done; \ | |
575 | nop; nop | |
576 | #define H_T1_Privileged_Opcode_0x11 | |
577 | #define SUN_H_T1_Privileged_Opcode_0x11 \ | |
578 | stw %l5, [%i7];\ | |
579 | umul %i5, 4, %l2;\ | |
580 | restore %i7, %g0, %i7;\ | |
581 | done; \ | |
582 | nop; | |
583 | ||
584 | #define H_HT0_Privileged_opcode_0x11 | |
585 | #define My_HT0_Privileged_opcode_0x11 \ | |
586 | xor %i0, %l1, %l1;\ | |
587 | and %l1, 0xf, %l1; \ | |
588 | ba hh11_1; \ | |
589 | not %g0, %l2; \ | |
590 | hh11_2: done; \ | |
591 | hh11_1: xor %l1, %l2, %l2; \ | |
592 | ba hh11_2; \ | |
593 | jmp %l2; | |
594 | ||
595 | #define H_HT0_Fp_disabled_0x20 | |
596 | #define My_HT0_Fp_disabled_0x20 \ | |
597 | mov 0x4, %l2 ;\ | |
598 | wr %l2, 0x0, %fprs ;\ | |
599 | sllx %l2, 10, %l3; \ | |
600 | rdpr %tstate, %l2;\ | |
601 | or %l2, %l3, %l2 ;\ | |
602 | stw %l2, [%i7];\ | |
603 | wrpr %l2, 0x0, %tstate;\ | |
604 | retry; | |
605 | ||
606 | #define H_T0_Fp_disabled_0x20 | |
607 | #define My_T0_Fp_disabled_0x20 \ | |
608 | mov 0x4, %l2 ;\ | |
609 | wr %l2, 0x0, %fprs ;\ | |
610 | sllx %l2, 10, %l3; \ | |
611 | rdpr %tstate, %l2;\ | |
612 | or %l2, %l3, %l2 ;\ | |
613 | wrpr %l2, 0x0, %tstate;\ | |
614 | retry; nop | |
615 | ||
616 | #define H_T1_Fp_Disabled_0x20 | |
617 | #define My_H_T1_Fp_Disabled_0x20 \ | |
618 | mov 0x4, %l2 ;\ | |
619 | wr %l2, 0x0, %fprs ;\ | |
620 | sllx %l2, 10, %l3; \ | |
621 | rdpr %tstate, %l2;\ | |
622 | or %l2, %l3, %l2 ;\ | |
623 | wrpr %l2, 0x0, %tstate;\ | |
624 | stw %l2, [%i7];\ | |
625 | retry | |
626 | ||
627 | #define H_HT0_Watchdog_Reset_0x02 | |
628 | #define My_HT0_Watchdog_Reset_0x02 \ | |
629 | ba wdog_2_ext;\ | |
630 | nop;retry;nop;nop;nop;nop;nop | |
631 | ||
632 | #define H_T0_Privileged_opcode_0x11 | |
633 | #define My_T0_Privileged_opcode_0x11 \ | |
634 | ba h11_1; \ | |
635 | not %g0, %l2; \ | |
636 | h11_2: done; \ | |
637 | h11_1: xor %l1, %l2, %l2; \ | |
638 | ba h11_2; \ | |
639 | jmp %l2; | |
640 | ||
641 | #define H_T1_Fp_exception_other_0x22 | |
642 | #define My_T1_Fp_exception_other_0x22 \ | |
643 | restore %i7, %g0, %i7 ; \ | |
644 | save %i7, %g0, %i7; \ | |
645 | restore %i7, %g0, %i7;\ | |
646 | ldx [%l2], %l2;\ | |
647 | done; | |
648 | ||
649 | #define H_T0_Fp_exception_other_0x22 | |
650 | #define My_T0_Fp_exception_other_0x22 \ | |
651 | inc %l6;\ | |
652 | dec %l5;\ | |
653 | umul %i5, 4, %l2;\ | |
654 | save %i7, %g0, %i7; \ | |
655 | restore %i7, %g0, %i7;\ | |
656 | stw %l2, [%i7];\ | |
657 | done; \ | |
658 | nop | |
659 | ||
660 | #define H_HT0_Trap_Level_Zero_0x5f | |
661 | #define My_HT0_Trap_Level_Zero_0x5f \ | |
662 | not %g0, %r13; \ | |
663 | rdhpr %hpstate, %l3;\ | |
664 | jmp %r13;\ | |
665 | rdhpr %htstate, %l3;\ | |
666 | and %l3, 0xfe, %l3;\ | |
667 | wrhpr %l3, 0, %htstate;\ | |
668 | stw %r13, [%i7];\ | |
669 | retry | |
670 | ||
671 | #define My_Watchdog_Reset | |
672 | #define My_Watchdog_Reset \ | |
673 | ba wdog_red_ext;\ | |
674 | nop;retry;nop;nop;nop;nop;nop | |
675 | ||
676 | #define H_HT0_Control_Transfer_Instr_0x74 | |
677 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ | |
678 | rdpr %tstate, %l3;\ | |
679 | and %l3, 0xfff, %l3;\ | |
680 | wrpr %l3, %tstate ;\ | |
681 | retry;nop; | |
682 | ||
683 | #define H_T0_Control_Transfer_Instr_0x74 | |
684 | #define My_H_T0_Control_Transfer_Instr_0x74 \ | |
685 | rdpr %tstate, %l3;\ | |
686 | and %l3, 0xfff, %l3;\ | |
687 | wrpr %l3, %tstate ;\ | |
688 | retry;nop; | |
689 | ||
690 | #define H_T1_Control_Transfer_Instr_0x74 | |
691 | #define My_H_T1_Control_Transfer_Instr_0x74 \ | |
692 | rdpr %tstate, %l3;\ | |
693 | and %l3, 0xfff, %l3;\ | |
694 | wrpr %l3, %tstate ;\ | |
695 | retry;nop; | |
696 | ||
697 | #define H_HT0_IAE_privilege_violation_0x08 | |
698 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
699 | done; nop; | |
700 | #define H_HT0_IAE_unauth_access_0x0b | |
701 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
702 | done; nop; | |
703 | ||
704 | #define H_HT0_data_access_protection_0x6c | |
705 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop | |
706 | ||
707 | #define H_HT0_PA_Watchpoint_0x61 | |
708 | #define My_H_HT0_PA_Watchpoint_0x61 \ | |
709 | done;nop | |
710 | ||
711 | #define H_T0_VA_Watchpoint_0x62 | |
712 | #define My_T0_VA_Watchpoint_0x62 \ | |
713 | done; nop | |
714 | ||
715 | #define H_HT0_Instruction_VA_Watchpoint_0x75 | |
716 | #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ | |
717 | done;nop | |
718 | ||
719 | #define H_HT0_Instruction_Breakpoint_0x76 | |
720 | #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ | |
721 | done;nop | |
722 | # 685 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
723 | #define H_HT0_Instruction_address_range_0x0d | |
724 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
725 | done;nop | |
726 | ||
727 | #define H_HT0_mem_real_range_0x2d | |
728 | #define SUN_H_HT0_mem_real_range_0x2d \ | |
729 | done;nop | |
730 | ||
731 | #define H_HT0_mem_address_range_0x2e | |
732 | #define SUN_H_HT0_mem_address_range_0x2e \ | |
733 | done;nop | |
734 | ||
735 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
736 | # 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
737 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
738 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! | |
739 | ||
740 | #define H_HT0_Externally_Initiated_Reset_0x03 | |
741 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ | |
742 | setx External_Reset_Handler, %g1, %g2; \ | |
743 | jmp %g2; \ | |
744 | nop | |
745 | ||
746 | !!!!! HW interrupt handlers | |
747 | ||
748 | #define H_HT0_Interrupt_0x60 | |
749 | #define My_HT0_Interrupt_0x60 \ | |
750 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g1 ;\ | |
751 | ldxa [%g0] ASI_SWVR_INTR_R, %g2 ;\ | |
752 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ | |
753 | cmp %g1, %g3 ;\ | |
754 | nop; \ | |
755 | retry; | |
756 | ||
757 | !!!!! Queue interrupt handler | |
758 | # 36 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
759 | #define H_T0_Cpu_Mondo_Trap_0x7c | |
760 | #define My_T0_Cpu_Mondo_Trap_0x7c \ | |
761 | mov 0x3c8, %g3; \ | |
762 | ldxa [%g3] 0x25, %g5; \ | |
763 | mov 0x3c0, %g3; \ | |
764 | stxa %g5, [%g3] 0x25; \ | |
765 | retry; \ | |
766 | nop; \ | |
767 | nop; \ | |
768 | nop | |
769 | ||
770 | #define H_T0_Dev_Mondo_Trap_0x7d | |
771 | #define My_T0_Dev_Mondo_Trap_0x7d \ | |
772 | mov 0x3d8, %g3; \ | |
773 | ldxa [%g3] 0x25, %g5; \ | |
774 | mov 0x3d0, %g3; \ | |
775 | stxa %g5, [%g3] 0x25; \ | |
776 | retry; \ | |
777 | nop; \ | |
778 | nop; \ | |
779 | nop | |
780 | ||
781 | #define H_T0_Resumable_Error_0x7e | |
782 | #define My_T0_Resumable_Error_0x7e \ | |
783 | mov 0x3e8, %g3; \ | |
784 | ldxa [%g3] 0x25, %g5; \ | |
785 | mov 0x3e0, %g3; \ | |
786 | stxa %g5, [%g3] 0x25; \ | |
787 | retry; \ | |
788 | nop; \ | |
789 | nop; \ | |
790 | nop | |
791 | ||
792 | #define H_T1_Cpu_Mondo_Trap_0x7c | |
793 | #define My_T1_Cpu_Mondo_Trap_0x7c \ | |
794 | mov 0x3c8, %g3; \ | |
795 | ldxa [%g3] 0x25, %g5; \ | |
796 | mov 0x3c0, %g3; \ | |
797 | stxa %g5, [%g3] 0x25; \ | |
798 | retry; \ | |
799 | nop; \ | |
800 | nop; \ | |
801 | nop | |
802 | ||
803 | #define H_T1_Dev_Mondo_Trap_0x7d | |
804 | #define My_T1_Dev_Mondo_Trap_0x7d \ | |
805 | mov 0x3d8, %g3; \ | |
806 | ldxa [%g3] 0x25, %g5; \ | |
807 | mov 0x3d0, %g3; \ | |
808 | stxa %g5, [%g3] 0x25; \ | |
809 | retry; \ | |
810 | nop; \ | |
811 | nop; \ | |
812 | nop | |
813 | ||
814 | #define H_T1_Resumable_Error_0x7e | |
815 | #define My_T1_Resumable_Error_0x7e \ | |
816 | mov 0x3e8, %g3; \ | |
817 | ldxa [%g3] 0x25, %g5; \ | |
818 | mov 0x3e0, %g3; \ | |
819 | stxa %g5, [%g3] 0x25; \ | |
820 | retry; \ | |
821 | nop; \ | |
822 | nop; \ | |
823 | nop | |
824 | ||
825 | #define H_HT0_Reserved_0x7c | |
826 | #define SUN_H_HT0_Reserved_0x7c \ | |
827 | mov 0x3c8, %g3; \ | |
828 | ldxa [%g3] 0x25, %g5; \ | |
829 | mov 0x3c0, %g3; \ | |
830 | stxa %g5, [%g3] 0x25; \ | |
831 | retry; \ | |
832 | nop; \ | |
833 | nop; \ | |
834 | nop | |
835 | ||
836 | #define H_HT0_Reserved_0x7d | |
837 | #define SUN_H_HT0_Reserved_0x7d \ | |
838 | mov 0x3d8, %g3; \ | |
839 | ldxa [%g3] 0x25, %g5; \ | |
840 | mov 0x3d0, %g3; \ | |
841 | stxa %g5, [%g3] 0x25; \ | |
842 | retry; \ | |
843 | nop; \ | |
844 | nop; \ | |
845 | nop | |
846 | ||
847 | #define H_HT0_Reserved_0x7e | |
848 | #define SUN_H_HT0_Reserved_0x7e \ | |
849 | mov 0x3e8, %g3; \ | |
850 | ldxa [%g3] 0x25, %g5; \ | |
851 | mov 0x3e0, %g3; \ | |
852 | stxa %g5, [%g3] 0x25; \ | |
853 | retry; \ | |
854 | nop; \ | |
855 | nop; \ | |
856 | nop | |
857 | # 136 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
858 | !!!!! Hstick-match trap handler | |
859 | # 139 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
860 | #define H_T0_Reserved_0x5e | |
861 | #define My_T0_Reserved_0x5e \ | |
862 | rdhpr %hintp, %g3; \ | |
863 | wrhpr %g3, %g3, %hintp; \ | |
864 | retry; \ | |
865 | nop; \ | |
866 | nop; \ | |
867 | nop; \ | |
868 | nop; \ | |
869 | nop | |
870 | ||
871 | #define H_HT0_Hstick_Match_0x5e | |
872 | #define My_HT0_Hstick_Match_0x5e \ | |
873 | rdhpr %hintp, %g3; \ | |
874 | wrhpr %g3, %g3, %hintp; \ | |
875 | retry; \ | |
876 | nop; \ | |
877 | nop; \ | |
878 | nop; \ | |
879 | nop; \ | |
880 | nop | |
881 | ||
882 | #define H_T0_Reserved_0x5e | |
883 | #define My_T0_Reserved_0x5e \ | |
884 | rdhpr %hintp, %g3; \ | |
885 | wrhpr %g3, %g3, %hintp; \ | |
886 | retry; \ | |
887 | nop; \ | |
888 | nop; \ | |
889 | nop; \ | |
890 | nop; \ | |
891 | nop | |
892 | ||
893 | #define H_T1_Reserved_0x5e | |
894 | #define My_T1_Reserved_0x5e \ | |
895 | rdhpr %hintp, %g3; \ | |
896 | wrhpr %g3, %g3, %hintp; \ | |
897 | retry; \ | |
898 | nop; \ | |
899 | nop; \ | |
900 | nop; \ | |
901 | nop; \ | |
902 | nop | |
903 | # 184 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
904 | !!!!! SW interuupt handlers | |
905 | # 187 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
906 | #define H_T0_Interrupt_Level_14_0x4e | |
907 | #define My_T0_Interrupt_Level_14_0x4e \ | |
908 | rd %softint, %g3; \ | |
909 | sethi %hi(0x14000), %g3; \ | |
910 | or %g3, 0x1, %g3; \ | |
911 | wr %g3, %g0, %clear_softint; \ | |
912 | retry; \ | |
913 | nop; \ | |
914 | nop; \ | |
915 | nop | |
916 | ||
917 | #define H_T0_Interrupt_Level_1_0x41 | |
918 | #define My_T0_Interrupt_Level_1_0x41 \ | |
919 | rd %softint, %g3; \ | |
920 | or %g0, 0x2, %g3; \ | |
921 | wr %g3, %g0, %clear_softint; \ | |
922 | retry; \ | |
923 | nop; \ | |
924 | nop; \ | |
925 | nop; \ | |
926 | nop | |
927 | ||
928 | #define H_T0_Interrupt_Level_2_0x42 | |
929 | #define My_T0_Interrupt_Level_2_0x42 \ | |
930 | rd %softint, %g3; \ | |
931 | or %g0, 0x4, %g3; \ | |
932 | wr %g3, %g0, %clear_softint; \ | |
933 | retry; \ | |
934 | nop; \ | |
935 | nop; \ | |
936 | nop; \ | |
937 | nop | |
938 | ||
939 | #define H_T0_Interrupt_Level_3_0x43 | |
940 | #define My_T0_Interrupt_Level_3_0x43 \ | |
941 | rd %softint, %g3; \ | |
942 | or %g0, 0x8, %g3; \ | |
943 | wr %g3, %g0, %clear_softint; \ | |
944 | retry; \ | |
945 | nop; \ | |
946 | nop; \ | |
947 | nop; \ | |
948 | nop | |
949 | ||
950 | #define H_T0_Interrupt_Level_4_0x44 | |
951 | #define My_T0_Interrupt_Level_4_0x44 \ | |
952 | rd %softint, %g3; \ | |
953 | or %g0, 0x10, %g3; \ | |
954 | wr %g3, %g0, %clear_softint; \ | |
955 | retry; \ | |
956 | nop; \ | |
957 | nop; \ | |
958 | nop; \ | |
959 | nop | |
960 | ||
961 | #define H_T0_Interrupt_Level_5_0x45 | |
962 | #define My_T0_Interrupt_Level_5_0x45 \ | |
963 | rd %softint, %g3; \ | |
964 | or %g0, 0x20, %g3; \ | |
965 | wr %g3, %g0, %clear_softint; \ | |
966 | retry; \ | |
967 | nop; \ | |
968 | nop; \ | |
969 | nop; \ | |
970 | nop | |
971 | ||
972 | #define H_T0_Interrupt_Level_6_0x46 | |
973 | #define My_T0_Interrupt_Level_6_0x46 \ | |
974 | rd %softint, %g3; \ | |
975 | or %g0, 0x40, %g3; \ | |
976 | wr %g3, %g0, %clear_softint; \ | |
977 | retry; \ | |
978 | nop; \ | |
979 | nop; \ | |
980 | nop; \ | |
981 | nop | |
982 | ||
983 | #define H_T0_Interrupt_Level_7_0x47 | |
984 | #define My_T0_Interrupt_Level_7_0x47 \ | |
985 | rd %softint, %g3; \ | |
986 | or %g0, 0x80, %g3; \ | |
987 | wr %g3, %g0, %clear_softint; \ | |
988 | retry; \ | |
989 | nop; \ | |
990 | nop; \ | |
991 | nop; \ | |
992 | nop | |
993 | ||
994 | #define H_T0_Interrupt_Level_8_0x48 | |
995 | #define My_T0_Interrupt_Level_8_0x48 \ | |
996 | rd %softint, %g3; \ | |
997 | or %g0, 0x100, %g3; \ | |
998 | wr %g3, %g0, %clear_softint; \ | |
999 | retry; \ | |
1000 | nop; \ | |
1001 | nop; \ | |
1002 | nop; \ | |
1003 | nop | |
1004 | ||
1005 | #define H_T0_Interrupt_Level_9_0x49 | |
1006 | #define My_T0_Interrupt_Level_9_0x49 \ | |
1007 | rd %softint, %g3; \ | |
1008 | or %g0, 0x200, %g3; \ | |
1009 | wr %g3, %g0, %clear_softint; \ | |
1010 | retry; \ | |
1011 | nop; \ | |
1012 | nop; \ | |
1013 | nop; \ | |
1014 | nop | |
1015 | ||
1016 | #define H_T0_Interrupt_Level_10_0x4a | |
1017 | #define My_T0_Interrupt_Level_10_0x4a \ | |
1018 | rd %softint, %g3; \ | |
1019 | or %g0, 0x400, %g3; \ | |
1020 | wr %g3, %g0, %clear_softint; \ | |
1021 | retry; \ | |
1022 | nop; \ | |
1023 | nop; \ | |
1024 | nop; \ | |
1025 | nop | |
1026 | ||
1027 | #define H_T0_Interrupt_Level_11_0x4b | |
1028 | #define My_T0_Interrupt_Level_11_0x4b \ | |
1029 | rd %softint, %g3; \ | |
1030 | or %g0, 0x800, %g3; \ | |
1031 | wr %g3, %g0, %clear_softint; \ | |
1032 | retry; \ | |
1033 | nop; \ | |
1034 | nop; \ | |
1035 | nop; \ | |
1036 | nop | |
1037 | ||
1038 | #define H_T0_Interrupt_Level_12_0x4c | |
1039 | #define My_T0_Interrupt_Level_12_0x4c \ | |
1040 | rd %softint, %g3; \ | |
1041 | sethi %hi(0x1000), %g3; \ | |
1042 | wr %g3, %g0, %clear_softint; \ | |
1043 | retry; \ | |
1044 | nop; \ | |
1045 | nop; \ | |
1046 | nop; \ | |
1047 | nop | |
1048 | ||
1049 | #define H_T0_Interrupt_Level_13_0x4d | |
1050 | #define My_T0_Interrupt_Level_13_0x4d \ | |
1051 | rd %softint, %g3; \ | |
1052 | sethi %hi(0x2000), %g3; \ | |
1053 | wr %g3, %g0, %clear_softint; \ | |
1054 | retry; \ | |
1055 | nop; \ | |
1056 | nop; \ | |
1057 | nop; \ | |
1058 | nop | |
1059 | ||
1060 | #define H_T0_Interrupt_Level_15_0x4f | |
1061 | #define My_T0_Interrupt_Level_15_0x4f \ | |
1062 | sethi %hi(0x8000), %g3; \ | |
1063 | wr %g3, %g0, %clear_softint; \ | |
1064 | wr %g0, %g0, %pic;\ | |
1065 | sethi %hi(0x80040000), %g2;\ | |
1066 | rd %pcr, %g3;\ | |
1067 | andn %g3, %g2, %g3;\ | |
1068 | wr %g3, %g0, %pcr;\ | |
1069 | retry; | |
1070 | ||
1071 | #define H_T1_Interrupt_Level_14_0x4e | |
1072 | #define My_T1_Interrupt_Level_14_0x4e \ | |
1073 | rd %softint, %g3; \ | |
1074 | sethi %hi(0x14000), %g3; \ | |
1075 | or %g3, 0x1, %g3; \ | |
1076 | wr %g3, %g0, %clear_softint; \ | |
1077 | retry; \ | |
1078 | nop; \ | |
1079 | nop; \ | |
1080 | nop | |
1081 | ||
1082 | #define H_T1_Interrupt_Level_1_0x41 | |
1083 | #define My_T1_Interrupt_Level_1_0x41 \ | |
1084 | rd %softint, %g3; \ | |
1085 | or %g0, 0x2, %g3; \ | |
1086 | wr %g3, %g0, %clear_softint; \ | |
1087 | retry; \ | |
1088 | nop; \ | |
1089 | nop; \ | |
1090 | nop; \ | |
1091 | nop | |
1092 | ||
1093 | #define H_T1_Interrupt_Level_2_0x42 | |
1094 | #define My_T1_Interrupt_Level_2_0x42 \ | |
1095 | rd %softint, %g3; \ | |
1096 | or %g0, 0x4, %g3; \ | |
1097 | wr %g3, %g0, %clear_softint; \ | |
1098 | retry; \ | |
1099 | nop; \ | |
1100 | nop; \ | |
1101 | nop; \ | |
1102 | nop | |
1103 | ||
1104 | #define H_T1_Interrupt_Level_3_0x43 | |
1105 | #define My_T1_Interrupt_Level_3_0x43 \ | |
1106 | rd %softint, %g3; \ | |
1107 | or %g0, 0x8, %g3; \ | |
1108 | wr %g3, %g0, %clear_softint; \ | |
1109 | retry; \ | |
1110 | nop; \ | |
1111 | nop; \ | |
1112 | nop; \ | |
1113 | nop | |
1114 | ||
1115 | #define H_T1_Interrupt_Level_4_0x44 | |
1116 | #define My_T1_Interrupt_Level_4_0x44 \ | |
1117 | rd %softint, %g3; \ | |
1118 | or %g0, 0x10, %g3; \ | |
1119 | wr %g3, %g0, %clear_softint; \ | |
1120 | retry; \ | |
1121 | nop; \ | |
1122 | nop; \ | |
1123 | nop; \ | |
1124 | nop | |
1125 | ||
1126 | #define H_T1_Interrupt_Level_5_0x45 | |
1127 | #define My_T1_Interrupt_Level_5_0x45 \ | |
1128 | rd %softint, %g3; \ | |
1129 | or %g0, 0x20, %g3; \ | |
1130 | wr %g3, %g0, %clear_softint; \ | |
1131 | retry; \ | |
1132 | nop; \ | |
1133 | nop; \ | |
1134 | nop; \ | |
1135 | nop | |
1136 | ||
1137 | #define H_T1_Interrupt_Level_6_0x46 | |
1138 | #define My_T1_Interrupt_Level_6_0x46 \ | |
1139 | rd %softint, %g3; \ | |
1140 | or %g0, 0x40, %g3; \ | |
1141 | wr %g3, %g0, %clear_softint; \ | |
1142 | retry; \ | |
1143 | nop; \ | |
1144 | nop; \ | |
1145 | nop; \ | |
1146 | nop | |
1147 | ||
1148 | #define H_T1_Interrupt_Level_7_0x47 | |
1149 | #define My_T1_Interrupt_Level_7_0x47 \ | |
1150 | rd %softint, %g3; \ | |
1151 | or %g0, 0x80, %g3; \ | |
1152 | wr %g3, %g0, %clear_softint; \ | |
1153 | retry; \ | |
1154 | nop; \ | |
1155 | nop; \ | |
1156 | nop; \ | |
1157 | nop | |
1158 | ||
1159 | #define H_T1_Interrupt_Level_8_0x48 | |
1160 | #define My_T1_Interrupt_Level_8_0x48 \ | |
1161 | rd %softint, %g3; \ | |
1162 | or %g0, 0x100, %g3; \ | |
1163 | wr %g3, %g0, %clear_softint; \ | |
1164 | retry; \ | |
1165 | nop; \ | |
1166 | nop; \ | |
1167 | nop; \ | |
1168 | nop | |
1169 | ||
1170 | #define H_T1_Interrupt_Level_9_0x49 | |
1171 | #define My_T1_Interrupt_Level_9_0x49 \ | |
1172 | rd %softint, %g3; \ | |
1173 | or %g0, 0x200, %g3; \ | |
1174 | wr %g3, %g0, %clear_softint; \ | |
1175 | retry; \ | |
1176 | nop; \ | |
1177 | nop; \ | |
1178 | nop; \ | |
1179 | nop | |
1180 | ||
1181 | #define H_T1_Interrupt_Level_10_0x4a | |
1182 | #define My_T1_Interrupt_Level_10_0x4a \ | |
1183 | rd %softint, %g3; \ | |
1184 | or %g0, 0x400, %g3; \ | |
1185 | wr %g3, %g0, %clear_softint; \ | |
1186 | retry; \ | |
1187 | nop; \ | |
1188 | nop; \ | |
1189 | nop; \ | |
1190 | nop | |
1191 | ||
1192 | #define H_T1_Interrupt_Level_11_0x4b | |
1193 | #define My_T1_Interrupt_Level_11_0x4b \ | |
1194 | rd %softint, %g3; \ | |
1195 | or %g0, 0x800, %g3; \ | |
1196 | wr %g3, %g0, %clear_softint; \ | |
1197 | retry; \ | |
1198 | nop; \ | |
1199 | nop; \ | |
1200 | nop; \ | |
1201 | nop | |
1202 | ||
1203 | #define H_T1_Interrupt_Level_12_0x4c | |
1204 | #define My_T1_Interrupt_Level_12_0x4c \ | |
1205 | rd %softint, %g3; \ | |
1206 | sethi %hi(0x1000), %g3; \ | |
1207 | wr %g3, %g0, %clear_softint; \ | |
1208 | retry; \ | |
1209 | nop; \ | |
1210 | nop; \ | |
1211 | nop; \ | |
1212 | nop | |
1213 | ||
1214 | #define H_T1_Interrupt_Level_13_0x4d | |
1215 | #define My_T1_Interrupt_Level_13_0x4d \ | |
1216 | rd %softint, %g3; \ | |
1217 | sethi %hi(0x2000), %g3; \ | |
1218 | wr %g3, %g0, %clear_softint; \ | |
1219 | retry; \ | |
1220 | nop; \ | |
1221 | nop; \ | |
1222 | nop; \ | |
1223 | nop | |
1224 | ||
1225 | #define H_T1_Interrupt_Level_15_0x4f | |
1226 | #define My_T1_Interrupt_Level_15_0x4f \ | |
1227 | sethi %hi(0x8000), %g3; \ | |
1228 | wr %g3, %g0, %clear_softint; \ | |
1229 | wr %g0, %g0, %pic;\ | |
1230 | sethi %hi(0x80040000), %g2;\ | |
1231 | rd %pcr, %g3;\ | |
1232 | andn %g3, %g2, %g3;\ | |
1233 | wr %g3, %g0, %pcr;\ | |
1234 | retry; | |
1235 | ||
1236 | #define H_HT0_Interrupt_Level_14_0x4e | |
1237 | #define My_HT0_Interrupt_Level_14_0x4e \ | |
1238 | rd %softint, %g3; \ | |
1239 | sethi %hi(0x14000), %g3; \ | |
1240 | or %g3, 0x1, %g3; \ | |
1241 | wr %g3, %g0, %clear_softint; \ | |
1242 | retry; \ | |
1243 | nop; \ | |
1244 | nop; \ | |
1245 | nop | |
1246 | ||
1247 | #define H_HT0_Interrupt_Level_1_0x41 | |
1248 | #define My_HT0_Interrupt_Level_1_0x41 \ | |
1249 | rd %softint, %g3; \ | |
1250 | or %g0, 0x2, %g3; \ | |
1251 | wr %g3, %g0, %clear_softint; \ | |
1252 | retry; \ | |
1253 | nop; \ | |
1254 | nop; \ | |
1255 | nop; \ | |
1256 | nop | |
1257 | ||
1258 | #define H_HT0_Interrupt_Level_2_0x42 | |
1259 | #define My_HT0_Interrupt_Level_2_0x42 \ | |
1260 | rd %softint, %g3; \ | |
1261 | or %g0, 0x4, %g3; \ | |
1262 | wr %g3, %g0, %clear_softint; \ | |
1263 | retry; \ | |
1264 | nop; \ | |
1265 | nop; \ | |
1266 | nop; \ | |
1267 | nop | |
1268 | ||
1269 | #define H_HT0_Interrupt_Level_3_0x43 | |
1270 | #define My_HT0_Interrupt_Level_3_0x43 \ | |
1271 | rd %softint, %g3; \ | |
1272 | or %g0, 0x8, %g3; \ | |
1273 | wr %g3, %g0, %clear_softint; \ | |
1274 | retry; \ | |
1275 | nop; \ | |
1276 | nop; \ | |
1277 | nop; \ | |
1278 | nop | |
1279 | ||
1280 | #define H_HT0_Interrupt_Level_4_0x44 | |
1281 | #define My_HT0_Interrupt_Level_4_0x44 \ | |
1282 | rd %softint, %g3; \ | |
1283 | or %g0, 0x10, %g3; \ | |
1284 | wr %g3, %g0, %clear_softint; \ | |
1285 | retry; \ | |
1286 | nop; \ | |
1287 | nop; \ | |
1288 | nop; \ | |
1289 | nop | |
1290 | ||
1291 | #define H_HT0_Interrupt_Level_5_0x45 | |
1292 | #define My_HT0_Interrupt_Level_5_0x45 \ | |
1293 | rd %softint, %g3; \ | |
1294 | or %g0, 0x20, %g3; \ | |
1295 | wr %g3, %g0, %clear_softint; \ | |
1296 | retry; \ | |
1297 | nop; \ | |
1298 | nop; \ | |
1299 | nop; \ | |
1300 | nop | |
1301 | ||
1302 | #define H_HT0_Interrupt_Level_6_0x46 | |
1303 | #define My_HT0_Interrupt_Level_6_0x46 \ | |
1304 | rd %softint, %g3; \ | |
1305 | or %g0, 0x40, %g3; \ | |
1306 | wr %g3, %g0, %clear_softint; \ | |
1307 | retry; \ | |
1308 | nop; \ | |
1309 | nop; \ | |
1310 | nop; \ | |
1311 | nop | |
1312 | ||
1313 | #define H_HT0_Interrupt_Level_7_0x47 | |
1314 | #define My_HT0_Interrupt_Level_7_0x47 \ | |
1315 | rd %softint, %g3; \ | |
1316 | or %g0, 0x80, %g3; \ | |
1317 | wr %g3, %g0, %clear_softint; \ | |
1318 | retry; \ | |
1319 | nop; \ | |
1320 | nop; \ | |
1321 | nop; \ | |
1322 | nop | |
1323 | ||
1324 | #define H_HT0_Interrupt_Level_8_0x48 | |
1325 | #define My_HT0_Interrupt_Level_8_0x48 \ | |
1326 | rd %softint, %g3; \ | |
1327 | or %g0, 0x100, %g3; \ | |
1328 | wr %g3, %g0, %clear_softint; \ | |
1329 | retry; \ | |
1330 | nop; \ | |
1331 | nop; \ | |
1332 | nop; \ | |
1333 | nop | |
1334 | ||
1335 | #define H_HT0_Interrupt_Level_9_0x49 | |
1336 | #define My_HT0_Interrupt_Level_9_0x49 \ | |
1337 | rd %softint, %g3; \ | |
1338 | or %g0, 0x200, %g3; \ | |
1339 | wr %g3, %g0, %clear_softint; \ | |
1340 | retry; \ | |
1341 | nop; \ | |
1342 | nop; \ | |
1343 | nop; \ | |
1344 | nop | |
1345 | ||
1346 | #define H_HT0_Interrupt_Level_10_0x4a | |
1347 | #define My_HT0_Interrupt_Level_10_0x4a \ | |
1348 | rd %softint, %g3; \ | |
1349 | or %g0, 0x400, %g3; \ | |
1350 | wr %g3, %g0, %clear_softint; \ | |
1351 | retry; \ | |
1352 | nop; \ | |
1353 | nop; \ | |
1354 | nop; \ | |
1355 | nop | |
1356 | ||
1357 | #define H_HT0_Interrupt_Level_11_0x4b | |
1358 | #define My_HT0_Interrupt_Level_11_0x4b \ | |
1359 | rd %softint, %g3; \ | |
1360 | or %g0, 0x800, %g3; \ | |
1361 | wr %g3, %g0, %clear_softint; \ | |
1362 | retry; \ | |
1363 | nop; \ | |
1364 | nop; \ | |
1365 | nop; \ | |
1366 | nop | |
1367 | ||
1368 | #define H_HT0_Interrupt_Level_12_0x4c | |
1369 | #define My_HT0_Interrupt_Level_12_0x4c \ | |
1370 | rd %softint, %g3; \ | |
1371 | sethi %hi(0x1000), %g3; \ | |
1372 | wr %g3, %g0, %clear_softint; \ | |
1373 | retry; \ | |
1374 | nop; \ | |
1375 | nop; \ | |
1376 | nop; \ | |
1377 | nop | |
1378 | ||
1379 | #define H_HT0_Interrupt_Level_13_0x4d | |
1380 | #define My_HT0_Interrupt_Level_13_0x4d \ | |
1381 | rd %softint, %g3; \ | |
1382 | sethi %hi(0x2000), %g3; \ | |
1383 | wr %g3, %g0, %clear_softint; \ | |
1384 | retry; \ | |
1385 | nop; \ | |
1386 | nop; \ | |
1387 | nop; \ | |
1388 | nop | |
1389 | ||
1390 | #define H_HT0_Interrupt_Level_15_0x4f | |
1391 | #define My_HT0_Interrupt_Level_15_0x4f \ | |
1392 | sethi %hi(0x8000), %g3; \ | |
1393 | wr %g3, %g0, %clear_softint; \ | |
1394 | wr %g0, %g0, %pic;\ | |
1395 | sethi %hi(0x80040000), %g2;\ | |
1396 | rd %pcr, %g3;\ | |
1397 | andn %g3, %g2, %g3;\ | |
1398 | wr %g3, %g0, %pcr;\ | |
1399 | retry; | |
1400 | ||
1401 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
1402 | # 218 "diag.j" | |
1403 | #include "hboot.s" | |
1404 | .text | |
1405 | .global main | |
1406 | main: | |
1407 | ||
1408 | ! Set up ld/st area per thread | |
1409 | ta T_RD_THID ! Result in %o1 = r9 | |
1410 | umul %r9, 256, %r31 | |
1411 | setx user_data_start, %r1, %r3 | |
1412 | add %r31, %r3, %r31 | |
1413 | wr %r0, 0x4, %asi | |
1414 | ||
1415 | !Initializing integer registers | |
1416 | ldx [%r31+0], %r0 | |
1417 | ldx [%r31+8], %r1 | |
1418 | ldx [%r31+16], %r2 | |
1419 | ldx [%r31+24], %r3 | |
1420 | ldx [%r31+32], %r4 | |
1421 | ldx [%r31+40], %r5 | |
1422 | ldx [%r31+48], %r6 | |
1423 | ldx [%r31+56], %r7 | |
1424 | ldx [%r31+64], %r8 | |
1425 | ldx [%r31+72], %r9 | |
1426 | ldx [%r31+80], %r10 | |
1427 | ldx [%r31+88], %r11 | |
1428 | ldx [%r31+96], %r12 | |
1429 | ldx [%r31+104], %r13 | |
1430 | ldx [%r31+112], %r14 | |
1431 | mov %r31, %r15 | |
1432 | ldx [%r31+128], %r16 | |
1433 | ldx [%r31+136], %r17 | |
1434 | ldx [%r31+144], %r18 | |
1435 | ldx [%r31+152], %r19 | |
1436 | ldx [%r31+160], %r20 | |
1437 | ldx [%r31+168], %r21 | |
1438 | ldx [%r31+176], %r22 | |
1439 | ldx [%r31+184], %r23 | |
1440 | ldx [%r31+192], %r24 | |
1441 | ldx [%r31+200], %r25 | |
1442 | ldx [%r31+208], %r26 | |
1443 | ldx [%r31+216], %r27 | |
1444 | ldx [%r31+224], %r28 | |
1445 | ldx [%r31+232], %r29 | |
1446 | mov 0xb3, %r14 | |
1447 | mov 0x34, %r30 | |
1448 | save %r31, %r0, %r31 | |
1449 | ldx [%r31+0], %r0 | |
1450 | ldx [%r31+8], %r1 | |
1451 | ldx [%r31+16], %r2 | |
1452 | ldx [%r31+24], %r3 | |
1453 | ldx [%r31+32], %r4 | |
1454 | ldx [%r31+40], %r5 | |
1455 | ldx [%r31+48], %r6 | |
1456 | ldx [%r31+56], %r7 | |
1457 | ldx [%r31+64], %r8 | |
1458 | ldx [%r31+72], %r9 | |
1459 | ldx [%r31+80], %r10 | |
1460 | ldx [%r31+88], %r11 | |
1461 | ldx [%r31+96], %r12 | |
1462 | ldx [%r31+104], %r13 | |
1463 | ldx [%r31+112], %r14 | |
1464 | mov %r31, %r15 | |
1465 | ldx [%r31+128], %r16 | |
1466 | ldx [%r31+136], %r17 | |
1467 | ldx [%r31+144], %r18 | |
1468 | ldx [%r31+152], %r19 | |
1469 | ldx [%r31+160], %r20 | |
1470 | ldx [%r31+168], %r21 | |
1471 | ldx [%r31+176], %r22 | |
1472 | ldx [%r31+184], %r23 | |
1473 | ldx [%r31+192], %r24 | |
1474 | ldx [%r31+200], %r25 | |
1475 | ldx [%r31+208], %r26 | |
1476 | ldx [%r31+216], %r27 | |
1477 | ldx [%r31+224], %r28 | |
1478 | ldx [%r31+232], %r29 | |
1479 | mov 0x30, %r14 | |
1480 | mov 0x33, %r30 | |
1481 | save %r31, %r0, %r31 | |
1482 | ldx [%r31+0], %r0 | |
1483 | ldx [%r31+8], %r1 | |
1484 | ldx [%r31+16], %r2 | |
1485 | ldx [%r31+24], %r3 | |
1486 | ldx [%r31+32], %r4 | |
1487 | ldx [%r31+40], %r5 | |
1488 | ldx [%r31+48], %r6 | |
1489 | ldx [%r31+56], %r7 | |
1490 | ldx [%r31+64], %r8 | |
1491 | ldx [%r31+72], %r9 | |
1492 | ldx [%r31+80], %r10 | |
1493 | ldx [%r31+88], %r11 | |
1494 | ldx [%r31+96], %r12 | |
1495 | ldx [%r31+104], %r13 | |
1496 | ldx [%r31+112], %r14 | |
1497 | mov %r31, %r15 | |
1498 | ldx [%r31+128], %r16 | |
1499 | ldx [%r31+136], %r17 | |
1500 | ldx [%r31+144], %r18 | |
1501 | ldx [%r31+152], %r19 | |
1502 | ldx [%r31+160], %r20 | |
1503 | ldx [%r31+168], %r21 | |
1504 | ldx [%r31+176], %r22 | |
1505 | ldx [%r31+184], %r23 | |
1506 | ldx [%r31+192], %r24 | |
1507 | ldx [%r31+200], %r25 | |
1508 | ldx [%r31+208], %r26 | |
1509 | ldx [%r31+216], %r27 | |
1510 | ldx [%r31+224], %r28 | |
1511 | ldx [%r31+232], %r29 | |
1512 | mov 0x32, %r14 | |
1513 | mov 0x30, %r30 | |
1514 | save %r31, %r0, %r31 | |
1515 | ldx [%r31+0], %r0 | |
1516 | ldx [%r31+8], %r1 | |
1517 | ldx [%r31+16], %r2 | |
1518 | ldx [%r31+24], %r3 | |
1519 | ldx [%r31+32], %r4 | |
1520 | ldx [%r31+40], %r5 | |
1521 | ldx [%r31+48], %r6 | |
1522 | ldx [%r31+56], %r7 | |
1523 | ldx [%r31+64], %r8 | |
1524 | ldx [%r31+72], %r9 | |
1525 | ldx [%r31+80], %r10 | |
1526 | ldx [%r31+88], %r11 | |
1527 | ldx [%r31+96], %r12 | |
1528 | ldx [%r31+104], %r13 | |
1529 | ldx [%r31+112], %r14 | |
1530 | mov %r31, %r15 | |
1531 | ldx [%r31+128], %r16 | |
1532 | ldx [%r31+136], %r17 | |
1533 | ldx [%r31+144], %r18 | |
1534 | ldx [%r31+152], %r19 | |
1535 | ldx [%r31+160], %r20 | |
1536 | ldx [%r31+168], %r21 | |
1537 | ldx [%r31+176], %r22 | |
1538 | ldx [%r31+184], %r23 | |
1539 | ldx [%r31+192], %r24 | |
1540 | ldx [%r31+200], %r25 | |
1541 | ldx [%r31+208], %r26 | |
1542 | ldx [%r31+216], %r27 | |
1543 | ldx [%r31+224], %r28 | |
1544 | ldx [%r31+232], %r29 | |
1545 | mov 0xb3, %r14 | |
1546 | mov 0x34, %r30 | |
1547 | save %r31, %r0, %r31 | |
1548 | ldx [%r31+0], %r0 | |
1549 | ldx [%r31+8], %r1 | |
1550 | ldx [%r31+16], %r2 | |
1551 | ldx [%r31+24], %r3 | |
1552 | ldx [%r31+32], %r4 | |
1553 | ldx [%r31+40], %r5 | |
1554 | ldx [%r31+48], %r6 | |
1555 | ldx [%r31+56], %r7 | |
1556 | ldx [%r31+64], %r8 | |
1557 | ldx [%r31+72], %r9 | |
1558 | ldx [%r31+80], %r10 | |
1559 | ldx [%r31+88], %r11 | |
1560 | ldx [%r31+96], %r12 | |
1561 | ldx [%r31+104], %r13 | |
1562 | ldx [%r31+112], %r14 | |
1563 | mov %r31, %r15 | |
1564 | ldx [%r31+128], %r16 | |
1565 | ldx [%r31+136], %r17 | |
1566 | ldx [%r31+144], %r18 | |
1567 | ldx [%r31+152], %r19 | |
1568 | ldx [%r31+160], %r20 | |
1569 | ldx [%r31+168], %r21 | |
1570 | ldx [%r31+176], %r22 | |
1571 | ldx [%r31+184], %r23 | |
1572 | ldx [%r31+192], %r24 | |
1573 | ldx [%r31+200], %r25 | |
1574 | ldx [%r31+208], %r26 | |
1575 | ldx [%r31+216], %r27 | |
1576 | ldx [%r31+224], %r28 | |
1577 | ldx [%r31+232], %r29 | |
1578 | mov 0x35, %r14 | |
1579 | mov 0xb5, %r30 | |
1580 | save %r31, %r0, %r31 | |
1581 | ldx [%r31+0], %r0 | |
1582 | ldx [%r31+8], %r1 | |
1583 | ldx [%r31+16], %r2 | |
1584 | ldx [%r31+24], %r3 | |
1585 | ldx [%r31+32], %r4 | |
1586 | ldx [%r31+40], %r5 | |
1587 | ldx [%r31+48], %r6 | |
1588 | ldx [%r31+56], %r7 | |
1589 | ldx [%r31+64], %r8 | |
1590 | ldx [%r31+72], %r9 | |
1591 | ldx [%r31+80], %r10 | |
1592 | ldx [%r31+88], %r11 | |
1593 | ldx [%r31+96], %r12 | |
1594 | ldx [%r31+104], %r13 | |
1595 | ldx [%r31+112], %r14 | |
1596 | mov %r31, %r15 | |
1597 | ldx [%r31+128], %r16 | |
1598 | ldx [%r31+136], %r17 | |
1599 | ldx [%r31+144], %r18 | |
1600 | ldx [%r31+152], %r19 | |
1601 | ldx [%r31+160], %r20 | |
1602 | ldx [%r31+168], %r21 | |
1603 | ldx [%r31+176], %r22 | |
1604 | ldx [%r31+184], %r23 | |
1605 | ldx [%r31+192], %r24 | |
1606 | ldx [%r31+200], %r25 | |
1607 | ldx [%r31+208], %r26 | |
1608 | ldx [%r31+216], %r27 | |
1609 | ldx [%r31+224], %r28 | |
1610 | ldx [%r31+232], %r29 | |
1611 | mov 0xb0, %r14 | |
1612 | mov 0xb2, %r30 | |
1613 | save %r31, %r0, %r31 | |
1614 | ldx [%r31+0], %r0 | |
1615 | ldx [%r31+8], %r1 | |
1616 | ldx [%r31+16], %r2 | |
1617 | ldx [%r31+24], %r3 | |
1618 | ldx [%r31+32], %r4 | |
1619 | ldx [%r31+40], %r5 | |
1620 | ldx [%r31+48], %r6 | |
1621 | ldx [%r31+56], %r7 | |
1622 | ldx [%r31+64], %r8 | |
1623 | ldx [%r31+72], %r9 | |
1624 | ldx [%r31+80], %r10 | |
1625 | ldx [%r31+88], %r11 | |
1626 | ldx [%r31+96], %r12 | |
1627 | ldx [%r31+104], %r13 | |
1628 | ldx [%r31+112], %r14 | |
1629 | mov %r31, %r15 | |
1630 | ldx [%r31+128], %r16 | |
1631 | ldx [%r31+136], %r17 | |
1632 | ldx [%r31+144], %r18 | |
1633 | ldx [%r31+152], %r19 | |
1634 | ldx [%r31+160], %r20 | |
1635 | ldx [%r31+168], %r21 | |
1636 | ldx [%r31+176], %r22 | |
1637 | ldx [%r31+184], %r23 | |
1638 | ldx [%r31+192], %r24 | |
1639 | ldx [%r31+200], %r25 | |
1640 | ldx [%r31+208], %r26 | |
1641 | ldx [%r31+216], %r27 | |
1642 | ldx [%r31+224], %r28 | |
1643 | ldx [%r31+232], %r29 | |
1644 | mov 0xb0, %r14 | |
1645 | mov 0x34, %r30 | |
1646 | save %r31, %r0, %r31 | |
1647 | restore | |
1648 | restore | |
1649 | restore | |
1650 | !Initializing float registers | |
1651 | ldd [%r31+0], %f0 | |
1652 | ldd [%r31+16], %f2 | |
1653 | ldd [%r31+32], %f4 | |
1654 | ldd [%r31+48], %f6 | |
1655 | ldd [%r31+64], %f8 | |
1656 | ldd [%r31+80], %f10 | |
1657 | ldd [%r31+96], %f12 | |
1658 | ldd [%r31+112], %f14 | |
1659 | ldd [%r31+128], %f16 | |
1660 | ldd [%r31+144], %f18 | |
1661 | ldd [%r31+160], %f20 | |
1662 | ldd [%r31+176], %f22 | |
1663 | ldd [%r31+192], %f24 | |
1664 | ldd [%r31+208], %f26 | |
1665 | ldd [%r31+224], %f28 | |
1666 | ldd [%r31+240], %f30 | |
1667 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. | |
1668 | ta T_CHANGE_HPRIV | |
1669 | setx diag_finish, %r29, %r28 | |
1670 | add %r28, 4, %r29 | |
1671 | wrpr %g0, 1, %tl | |
1672 | wrpr %r28, %tpc | |
1673 | wrpr %r29, %tnpc | |
1674 | wrpr %g0, 2, %tl | |
1675 | wrpr %r28, %tpc | |
1676 | wrpr %r29, %tnpc | |
1677 | wrpr %g0, 3, %tl | |
1678 | wrpr %r28, %tpc | |
1679 | wrpr %r29, %tnpc | |
1680 | wrpr %g0, 4, %tl | |
1681 | wrpr %r28, %tpc | |
1682 | wrpr %r29, %tnpc | |
1683 | wrpr %g0, 5, %tl | |
1684 | wrpr %r28, %tpc | |
1685 | wrpr %r29, %tnpc | |
1686 | wrpr %g0, 6, %tl | |
1687 | wrpr %r28, %tpc | |
1688 | wrpr %r29, %tnpc | |
1689 | wrpr %g0, 0, %tl | |
1690 | ||
1691 | ta T_CHANGE_HPRIV | |
1692 | ||
1693 | !Initializing Tick Cmprs | |
1694 | mov 1, %g2 | |
1695 | sllx %g2, 63, %g2 | |
1696 | or %g1, %g2, %g1 | |
1697 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1698 | wr %g1, %g0, %tick_cmpr | |
1699 | wr %g1, %g0, %sys_tick_cmpr | |
1700 | ta T_CHANGE_NONHPRIV | |
1701 | ||
1702 | .word 0x9b454000 ! 1: RD_CLEAR_SOFTINT rd %clear_softint, %r13 | |
1703 | .word 0xa190200f ! 2: WRPR_GL_I wrpr %r0, 0x000f, %- | |
1704 | .word 0xad846001 ! 3: WR_SOFTINT_REG_I wr %r17, 0x0001, %softint | |
1705 | splash_cmpr_0_0: | |
1706 | setx 0xc6983605b1cb85bb, %g2, %g1 | |
1707 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1708 | sub %g1, 100, %g1 | |
1709 | .word 0xb1800001 ! 4: WR_STICK_REG_R wr %r0, %r1, %- | |
1710 | mondo_0_1: | |
1711 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1712 | ||
1713 | stxa %r12, [%r0+0x3e0] %asi | |
1714 | .word 0x9d944004 ! 5: WRPR_WSTATE_R wrpr %r17, %r4, %wstate | |
1715 | intveclr_0_2: | |
1716 | set 0x8b36e81f, %r28 | |
1717 | stxa %r28, [%g0] 0x72 | |
1718 | .word 0x25400001 ! 6: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1719 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_3)) -> intp(0,1,3) | |
1720 | xir_0_3: | |
1721 | .word 0xa980a001 ! 7: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
1722 | .word 0x93902007 ! 8: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
1723 | .word 0x8790217b ! 9: WRPR_TT_I wrpr %r0, 0x017b, %tt | |
1724 | DS_0_4: | |
1725 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
1726 | .xword 0x9b5bb0a7 ! Random illegal ? | |
1727 | .word 0xa1a0054c ! 1: FSQRTd fsqrt | |
1728 | .word 0x9ba08832 ! 10: FADDs fadds %f2, %f18, %f13 | |
1729 | tagged_0_5: | |
1730 | taddcctv %r10, 0x14aa, %r6 | |
1731 | .word 0xda07e001 ! 11: LDUW_I lduw [%r31 + 0x0001], %r13 | |
1732 | .word 0x2c800001 ! 12: BNEG bneg,a <label_0x1> | |
1733 | .word 0x89b20fe8 ! 13: FONES e %f4 | |
1734 | .word 0xc847e001 ! 14: LDSW_I ldsw [%r31 + 0x0001], %r4 | |
1735 | .word 0xc917c000 ! 15: LDQF_R - [%r31, %r0], %f4 | |
1736 | invalw | |
1737 | mov 0x33, %r30 | |
1738 | .word 0x91d0001e ! 16: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1739 | .word 0x8d90284d ! 17: WRPR_PSTATE_I wrpr %r0, 0x084d, %pstate | |
1740 | tagged_0_6: | |
1741 | tsubcctv %r26, 0x1f80, %r25 | |
1742 | .word 0xc807e001 ! 18: LDUW_I lduw [%r31 + 0x0001], %r4 | |
1743 | .word 0x819826dd ! 19: WRHPR_HPSTATE_I wrhpr %r0, 0x06dd, %hpstate | |
1744 | .word 0x82f98001 ! 20: SDIVcc_R sdivcc %r6, %r1, %r1 | |
1745 | .word 0xc21fc000 ! 21: LDD_R ldd [%r31 + %r0], %r1 | |
1746 | tagged_0_7: | |
1747 | taddcctv %r16, 0x1bea, %r14 | |
1748 | .word 0xc207e001 ! 22: LDUW_I lduw [%r31 + 0x0001], %r1 | |
1749 | .word 0xc27fe001 ! 23: SWAP_I swap %r1, [%r31 + 0x0001] | |
1750 | .word 0x8d9036e4 ! 24: WRPR_PSTATE_I wrpr %r0, 0x16e4, %pstate | |
1751 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_8)) -> intp(0,1,3) | |
1752 | xir_0_8: | |
1753 | .word 0xa9826001 ! 25: WR_SET_SOFTINT_I wr %r9, 0x0001, %set_softint | |
1754 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
1755 | ta T_CHANGE_NONHPRIV ! macro | |
1756 | .word 0x81a01971 ! 26: FqTOd dis not found | |
1757 | ||
1758 | .word 0x8150c000 ! 27: RDPR_TT <illegal instruction> | |
1759 | DS_0_10: | |
1760 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
1761 | .word 0xbfe7c000 ! 28: SAVE_R save %r31, %r0, %r31 | |
1762 | intveclr_0_11: | |
1763 | set 0x9d9a5e7c, %r28 | |
1764 | stxa %r28, [%g0] 0x72 | |
1765 | .word 0x25400001 ! 29: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1766 | .word 0xc09fe001 ! 30: LDDA_I ldda [%r31, + 0x0001] %asi, %r0 | |
1767 | .word 0x81982546 ! 31: WRHPR_HPSTATE_I wrhpr %r0, 0x0546, %hpstate | |
1768 | .word 0x22800001 ! 32: BE be,a <label_0x1> | |
1769 | .word 0x8d902f27 ! 33: WRPR_PSTATE_I wrpr %r0, 0x0f27, %pstate | |
1770 | .word 0xa1902005 ! 34: WRPR_GL_I wrpr %r0, 0x0005, %- | |
1771 | .word 0xc007c000 ! 35: LDUW_R lduw [%r31 + %r0], %r0 | |
1772 | .word 0x879022d4 ! 36: WRPR_TT_I wrpr %r0, 0x02d4, %tt | |
1773 | splash_cmpr_0_12: | |
1774 | setx 0xed8573da9b105d2e, %g2, %g1 | |
1775 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1776 | sub %g1, 100, %g1 | |
1777 | .word 0xb1800001 ! 37: WR_STICK_REG_R wr %r0, %r1, %- | |
1778 | debug_0_13: | |
1779 | setx debug_0_13 + 64, %r11, %r19 | |
1780 | mov 0x38, %r18 | |
1781 | .word 0xe6f00b12 ! 38: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1782 | DS_0_14: | |
1783 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
1784 | .word 0xbfefc000 ! 39: RESTORE_R restore %r31, %r0, %r31 | |
1785 | .word 0xc047e001 ! 40: LDSW_I ldsw [%r31 + 0x0001], %r0 | |
1786 | .word 0x83d02034 ! 41: Tcc_I te icc_or_xcc, %r0 + 52 | |
1787 | DS_0_15: | |
1788 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
1789 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
1790 | .word 0xe714c00b ! 1: LDQF_R - [%r19, %r11], %f19 | |
1791 | .word 0x99a50827 ! 42: FADDs fadds %f20, %f7, %f12 | |
1792 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_16)) -> intp(0,0,17) | |
1793 | intvec_0_16: | |
1794 | .word 0x39400001 ! 43: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1795 | .word 0xd89fc020 ! 44: LDDA_R ldda [%r31, %r0] 0x01, %r12 | |
1796 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_17)) -> intp(0,1,3) | |
1797 | xir_0_17: | |
1798 | .word 0xa984e001 ! 45: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
1799 | DS_0_18: | |
1800 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
1801 | allclean | |
1802 | .word 0x81b24313 ! 46: ALIGNADDRESS alignaddr %r9, %r19, %r0 | |
1803 | .word 0xa984c00a ! 47: WR_SET_SOFTINT_R wr %r19, %r10, %set_softint | |
1804 | .word 0x8cfcc002 ! 48: SDIVcc_R sdivcc %r19, %r2, %r6 | |
1805 | .word 0x83540000 ! 49: RDPR_GL <illegal instruction> | |
1806 | .word 0xc237c002 ! 50: STH_R sth %r1, [%r31 + %r2] | |
1807 | .word 0xc28008a0 ! 51: LDUWA_R lduwa [%r0, %r0] 0x45, %r1 | |
1808 | debug_0_19: | |
1809 | setx debug_0_19 + 64, %r11, %r19 | |
1810 | mov 0x38, %r18 | |
1811 | .word 0xe6f00b12 ! 52: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1812 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_20)) -> intp(0,0,17) | |
1813 | intvec_0_20: | |
1814 | .word 0x39400001 ! 53: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1815 | splash_lsu_0_21: | |
1816 | setx 0xa0d8125982b74143, %r1, %r2 | |
1817 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1818 | .word 0x3d400001 ! 54: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1819 | .word 0x8d903132 ! 55: WRPR_PSTATE_I wrpr %r0, 0x1132, %pstate | |
1820 | splash_cmpr_0_22: | |
1821 | setx 0xc1ff03bec47afab2, %g2, %g1 | |
1822 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1823 | sub %g1, 100, %g1 | |
1824 | .word 0xb1800001 ! 56: WR_STICK_REG_R wr %r0, %r1, %- | |
1825 | set 0xc7291af5, %r28 | |
1826 | stxa %r28, [%g0] 0x73 | |
1827 | intvec_0_23: | |
1828 | .word 0x39400001 ! 57: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1829 | .word 0xc2880e40 ! 58: LDUBA_R lduba [%r0, %r0] 0x72, %r1 | |
1830 | splash_lsu_0_24: | |
1831 | setx 0x6df25a8a028986fb, %r1, %r2 | |
1832 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1833 | .word 0x3d400001 ! 59: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1834 | .word 0xa3464000 ! 60: RD_STICK_CMPR_REG rd %-, %r17 | |
1835 | ta T_CHANGE_PRIV ! macro | |
1836 | .word 0xe24fe001 ! 62: LDSB_I ldsb [%r31 + 0x0001], %r17 | |
1837 | .word 0x93902005 ! 63: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
1838 | debug_0_25: | |
1839 | setx debug_0_25 + 64, %r11, %r19 | |
1840 | mov 0x38, %r18 | |
1841 | .word 0xe6f00b12 ! 64: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1842 | splash_lsu_0_26: | |
1843 | setx 0xff175fc877f93c23, %r1, %r2 | |
1844 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1845 | .word 0x3d400001 ! 65: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1846 | .word 0xa1902009 ! 66: WRPR_GL_I wrpr %r0, 0x0009, %- | |
1847 | debug_0_27: | |
1848 | mov 8, %r18 | |
1849 | .word 0xdaf00852 ! 67: STXA_R stxa %r13, [%r0 + %r18] 0x42 | |
1850 | nop | |
1851 | mov 0x80, %g3 | |
1852 | stxa %g3, [%g3] 0x57 | |
1853 | .word 0xe25fc000 ! 68: LDX_R ldx [%r31 + %r0], %r17 | |
1854 | splash_htba_0_28: | |
1855 | set 0x80000, %r2 | |
1856 | st %r1, [%r2+%r0] | |
1857 | ta T_CHANGE_HPRIV | |
1858 | set 0x80000, %r2 | |
1859 | .word 0x8b980002 ! 69: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
1860 | DS_0_29: | |
1861 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
1862 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
1863 | .word 0xd3128011 ! 1: LDQF_R - [%r10, %r17], %f9 | |
1864 | .word 0x97a2482b ! 70: FADDs fadds %f9, %f11, %f11 | |
1865 | .word 0xd697e010 ! 71: LDUHA_I lduha [%r31, + 0x0010] %asi, %r11 | |
1866 | .word 0xd68fe030 ! 72: LDUBA_I lduba [%r31, + 0x0030] %asi, %r11 | |
1867 | .word 0x8d9031b6 ! 73: WRPR_PSTATE_I wrpr %r0, 0x11b6, %pstate | |
1868 | invalw | |
1869 | mov 0xb1, %r30 | |
1870 | .word 0x93d0001e ! 74: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
1871 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_30)) -> intp(0,0,30) | |
1872 | intvec_0_30: | |
1873 | .word 0x39400001 ! 75: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1874 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_31)) -> intp(0,1,3) | |
1875 | xir_0_31: | |
1876 | .word 0xa984e001 ! 76: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
1877 | splash_lsu_0_32: | |
1878 | setx 0x78561e736d0cf9bd, %r1, %r2 | |
1879 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1880 | .word 0x3d400001 ! 77: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1881 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_33)) -> intp(0,1,3) | |
1882 | xir_0_33: | |
1883 | .word 0xa9832001 ! 78: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
1884 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_34)) -> intp(0,0,9) | |
1885 | intvec_0_34: | |
1886 | .word 0x39400001 ! 79: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1887 | ta T_CHANGE_PRIV ! macro | |
1888 | .word 0x93d02032 ! 81: Tcc_I tne icc_or_xcc, %r0 + 50 | |
1889 | .word 0x32700001 ! 82: BPNE <illegal instruction> | |
1890 | .word 0x89500000 ! 83: RDPR_TPC rdpr %tpc, %r4 | |
1891 | .word 0x87802089 ! 84: WRASI_I wr %r0, 0x0089, %asi | |
1892 | set 0x52bb2bd5, %r28 | |
1893 | stxa %r28, [%g0] 0x73 | |
1894 | intvec_0_35: | |
1895 | .word 0x39400001 ! 85: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1896 | .word 0x87902130 ! 86: WRPR_TT_I wrpr %r0, 0x0130, %tt | |
1897 | .word 0x99450000 ! 87: RD_SET_SOFTINT rd %set_softint, %r12 | |
1898 | splash_lsu_0_36: | |
1899 | setx 0x92f8f6d93a35daad, %r1, %r2 | |
1900 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1901 | .word 0x3d400001 ! 88: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1902 | intveclr_0_37: | |
1903 | set 0x749e07f6, %r28 | |
1904 | stxa %r28, [%g0] 0x72 | |
1905 | .word 0x25400001 ! 89: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1906 | .word 0xd8880e80 ! 90: LDUBA_R lduba [%r0, %r0] 0x74, %r12 | |
1907 | .word 0xd927c00b ! 91: STF_R st %f12, [%r11, %r31] | |
1908 | .word 0x8780204f ! 92: WRASI_I wr %r0, 0x004f, %asi | |
1909 | .word 0x9f802001 ! 93: SIR sir 0x0001 | |
1910 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_38)) -> intp(0,1,3) | |
1911 | xir_0_38: | |
1912 | .word 0xa9802001 ! 94: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
1913 | set 0x771307f, %r28 | |
1914 | stxa %r28, [%g0] 0x73 | |
1915 | intvec_0_39: | |
1916 | .word 0x39400001 ! 95: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1917 | .word 0x9f802001 ! 96: SIR sir 0x0001 | |
1918 | debug_0_40: | |
1919 | setx debug_0_40 + 64, %r11, %r19 | |
1920 | mov 0x38, %r18 | |
1921 | .word 0xe6f00b12 ! 97: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1922 | mondo_0_41: | |
1923 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1924 | ||
1925 | stxa %r4, [%r0+0x3c0] %asi | |
1926 | .word 0x9d910002 ! 98: WRPR_WSTATE_R wrpr %r4, %r2, %wstate | |
1927 | splash_cmpr_0_42: | |
1928 | setx 0x1d16b0c217c0a492, %g2, %g1 | |
1929 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1930 | sub %g1, 100, %g1 | |
1931 | .word 0xb1800001 ! 99: WR_STICK_REG_R wr %r0, %r1, %- | |
1932 | .word 0x81510000 ! 100: RDPR_TICK <illegal instruction> | |
1933 | DS_0_43: | |
1934 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
1935 | .word 0xc731e001 ! 1: STQF_I - %f3, [0x0001, %r7] | |
1936 | normalw | |
1937 | .word 0xa1458000 ! 101: RD_SOFTINT_REG rd %softint, %r16 | |
1938 | .word 0xe04fe001 ! 102: LDSB_I ldsb [%r31 + 0x0001], %r16 | |
1939 | .word 0x91d020b4 ! 103: Tcc_I ta icc_or_xcc, %r0 + 180 | |
1940 | .word 0x81510000 ! 104: RDPR_TICK <illegal instruction> | |
1941 | .word 0x879020de ! 105: WRPR_TT_I wrpr %r0, 0x00de, %tt | |
1942 | .word 0xad846001 ! 106: WR_SOFTINT_REG_I wr %r17, 0x0001, %softint | |
1943 | .word 0x93902004 ! 107: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
1944 | .word 0xe02fc002 ! 108: STB_R stb %r16, [%r31 + %r2] | |
1945 | splash_lsu_0_44: | |
1946 | setx 0xff0d058d8f65f693, %r1, %r2 | |
1947 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1948 | .word 0x3d400001 ! 109: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1949 | otherw | |
1950 | mov 0xb4, %r30 | |
1951 | .word 0x91d0001e ! 110: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1952 | set 0x2448cdca, %r28 | |
1953 | stxa %r28, [%g0] 0x73 | |
1954 | intvec_0_45: | |
1955 | .word 0x39400001 ! 111: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1956 | splash_lsu_0_46: | |
1957 | setx 0x7d9d7e58808679a1, %r1, %r2 | |
1958 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1959 | .word 0x3d400001 ! 112: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1960 | .word 0x87902206 ! 113: WRPR_TT_I wrpr %r0, 0x0206, %tt | |
1961 | splash_lsu_0_47: | |
1962 | setx 0xbca7805a8cc26837, %r1, %r2 | |
1963 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1964 | .word 0x3d400001 ! 114: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1965 | .word 0xe137c002 ! 115: STQF_R - %f16, [%r2, %r31] | |
1966 | .word 0x879020d2 ! 116: WRPR_TT_I wrpr %r0, 0x00d2, %tt | |
1967 | nop | |
1968 | mov 0x80, %g3 | |
1969 | stxa %g3, [%g3] 0x57 | |
1970 | .word 0xe05fc000 ! 117: LDX_R ldx [%r31 + %r0], %r16 | |
1971 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_48)) -> intp(0,0,21) | |
1972 | intvec_0_48: | |
1973 | .word 0x39400001 ! 118: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1974 | .word 0xa3480000 ! 119: RDHPR_HPSTATE rdhpr %hpstate, %r17 | |
1975 | .word 0x93902007 ! 120: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
1976 | .word 0xa190200c ! 121: WRPR_GL_I wrpr %r0, 0x000c, %- | |
1977 | otherw | |
1978 | mov 0x35, %r30 | |
1979 | .word 0x91d0001e ! 122: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1980 | .word 0x87902096 ! 123: WRPR_TT_I wrpr %r0, 0x0096, %tt | |
1981 | set 0xe5c9af03, %r28 | |
1982 | stxa %r28, [%g0] 0x73 | |
1983 | intvec_0_49: | |
1984 | .word 0x39400001 ! 124: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1985 | debug_0_50: | |
1986 | mov 0x38, %r18 | |
1987 | .word 0xfef00b12 ! 125: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1988 | .word 0xe25fe001 ! 126: LDX_I ldx [%r31 + 0x0001], %r17 | |
1989 | debug_0_51: | |
1990 | mov 8, %r18 | |
1991 | .word 0xd8f00852 ! 127: STXA_R stxa %r12, [%r0 + %r18] 0x42 | |
1992 | .word 0xe29fe001 ! 128: LDDA_I ldda [%r31, + 0x0001] %asi, %r17 | |
1993 | debug_0_52: | |
1994 | setx debug_0_52 + 64, %r11, %r19 | |
1995 | mov 0x38, %r18 | |
1996 | .word 0xe6f00b12 ! 129: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1997 | .word 0xe327c002 ! 130: STF_R st %f17, [%r2, %r31] | |
1998 | .word 0xe2d804a0 ! 131: LDXA_R ldxa [%r0, %r0] 0x25, %r17 | |
1999 | .word 0x8945c000 ! 132: RD_TICK_CMPR_REG rd %-, %r4 | |
2000 | .word 0x879021bc ! 133: WRPR_TT_I wrpr %r0, 0x01bc, %tt | |
2001 | .word 0xc8ffc022 ! 134: SWAPA_R swapa %r4, [%r31 + %r2] 0x01 | |
2002 | .word 0xad84a001 ! 135: WR_SOFTINT_REG_I wr %r18, 0x0001, %softint | |
2003 | .word 0x879023a7 ! 136: WRPR_TT_I wrpr %r0, 0x03a7, %tt | |
2004 | .word 0x93902001 ! 137: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
2005 | DS_0_53: | |
2006 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2007 | pdist %f6, %f8, %f28 | |
2008 | .word 0x87b20302 ! 138: ALIGNADDRESS alignaddr %r8, %r2, %r3 | |
2009 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_54)) -> intp(0,0,20) | |
2010 | intvec_0_54: | |
2011 | .word 0x39400001 ! 139: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2012 | .word 0x93d020b2 ! 140: Tcc_I tne icc_or_xcc, %r0 + 178 | |
2013 | debug_0_55: | |
2014 | setx debug_0_55 + 64, %r11, %r19 | |
2015 | mov 0x38, %r18 | |
2016 | .word 0xe6f00b12 ! 141: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2017 | splash_lsu_0_56: | |
2018 | setx 0x2c5a0256eb30b195, %r1, %r2 | |
2019 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2020 | .word 0x3d400001 ! 142: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2021 | .word 0x9190e001 ! 143: WRPR_PIL_I wrpr %r3, 0x0001, %pil | |
2022 | DS_0_57: | |
2023 | nop | |
2024 | not %g0, %g2 | |
2025 | jmp %g2 | |
2026 | .word 0x9d902003 ! 144: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
2027 | .word 0xc6900e60 ! 145: LDUHA_R lduha [%r0, %r0] 0x73, %r3 | |
2028 | .word 0xc677c002 ! 146: STX_R stx %r3, [%r31 + %r2] | |
2029 | mondo_0_58: | |
2030 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2031 | ||
2032 | stxa %r7, [%r0+0x3c0] %asi | |
2033 | .word 0x9d950001 ! 147: WRPR_WSTATE_R wrpr %r20, %r1, %wstate | |
2034 | .word 0xc737c001 ! 148: STQF_R - %f3, [%r1, %r31] | |
2035 | .word 0xc717c000 ! 149: LDQF_R - [%r31, %r0], %f3 | |
2036 | .word 0xc64fe001 ! 150: LDSB_I ldsb [%r31 + 0x0001], %r3 | |
2037 | splash_lsu_0_59: | |
2038 | setx 0xc3dae96ad3ede4f1, %r1, %r2 | |
2039 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2040 | .word 0x3d400001 ! 151: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2041 | .word 0x91d02033 ! 152: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2042 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_60)) -> intp(0,1,3) | |
2043 | xir_0_60: | |
2044 | .word 0xa981a001 ! 153: WR_SET_SOFTINT_I wr %r6, 0x0001, %set_softint | |
2045 | .word 0xc68008a0 ! 154: LDUWA_R lduwa [%r0, %r0] 0x45, %r3 | |
2046 | .word 0x91d02032 ! 155: Tcc_I ta icc_or_xcc, %r0 + 50 | |
2047 | .word 0x93902005 ! 156: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
2048 | .word 0x95480000 ! 157: RDHPR_HPSTATE rdhpr %hpstate, %r10 | |
2049 | intveclr_0_61: | |
2050 | set 0xfe162794, %r28 | |
2051 | stxa %r28, [%g0] 0x72 | |
2052 | .word 0x25400001 ! 158: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2053 | splash_cmpr_0_62: | |
2054 | setx 0x5b6f5a1633eb2835, %g2, %g1 | |
2055 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2056 | sub %g1, 100, %g1 | |
2057 | .word 0xb1800001 ! 159: WR_STICK_REG_R wr %r0, %r1, %- | |
2058 | .word 0xd527e001 ! 160: STF_I st %f10, [0x0001, %r31] | |
2059 | set 0x5def991a, %r28 | |
2060 | stxa %r28, [%g0] 0x73 | |
2061 | intvec_0_63: | |
2062 | .word 0x39400001 ! 161: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2063 | splash_lsu_0_64: | |
2064 | setx 0x9f863305b8697f47, %r1, %r2 | |
2065 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2066 | .word 0x3d400001 ! 162: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2067 | nop | |
2068 | mov 0x80, %g3 | |
2069 | stxa %g3, [%g3] 0x57 | |
2070 | .word 0xd45fc000 ! 163: LDX_R ldx [%r31 + %r0], %r10 | |
2071 | .word 0x879020f8 ! 164: WRPR_TT_I wrpr %r0, 0x00f8, %tt | |
2072 | change_to_randtl_0_65: | |
2073 | ta T_CHANGE_HPRIV ! macro | |
2074 | done_change_to_randtl_0_65: | |
2075 | .word 0x8f902004 ! 165: WRPR_TL_I wrpr %r0, 0x0004, %tl | |
2076 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_66)) -> intp(0,1,3) | |
2077 | xir_0_66: | |
2078 | .word 0xa9816001 ! 166: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
2079 | DS_0_67: | |
2080 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2081 | .word 0xbfefc000 ! 167: RESTORE_R restore %r31, %r0, %r31 | |
2082 | splash_lsu_0_68: | |
2083 | setx 0x828f4dc944f47d0f, %r1, %r2 | |
2084 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2085 | .word 0x3d400001 ! 168: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2086 | .word 0xa190200e ! 169: WRPR_GL_I wrpr %r0, 0x000e, %- | |
2087 | change_to_randtl_0_69: | |
2088 | ta T_CHANGE_HPRIV ! macro | |
2089 | done_change_to_randtl_0_69: | |
2090 | .word 0x8f902004 ! 170: WRPR_TL_I wrpr %r0, 0x0004, %tl | |
2091 | .word 0xd4c7e000 ! 171: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r10 | |
2092 | nop | |
2093 | mov 0x80, %g3 | |
2094 | stxa %g3, [%g3] 0x5f | |
2095 | .word 0xd45fc000 ! 172: LDX_R ldx [%r31 + %r0], %r10 | |
2096 | .word 0x99902001 ! 173: WRPR_CLEANWIN_I wrpr %r0, 0x0001, %cleanwin | |
2097 | .word 0xd527e001 ! 174: STF_I st %f10, [0x0001, %r31] | |
2098 | .word 0xd4bfc021 ! 175: STDA_R stda %r10, [%r31 + %r1] 0x01 | |
2099 | .word 0xa190200f ! 176: WRPR_GL_I wrpr %r0, 0x000f, %- | |
2100 | .word 0xd4d00e60 ! 177: LDSHA_R ldsha [%r0, %r0] 0x73, %r10 | |
2101 | debug_0_70: | |
2102 | setx debug_0_70 + 64, %r11, %r19 | |
2103 | mov 0x38, %r18 | |
2104 | .word 0xe6f00b12 ! 178: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2105 | .word 0x81982a04 ! 179: WRHPR_HPSTATE_I wrhpr %r0, 0x0a04, %hpstate | |
2106 | DS_0_71: | |
2107 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2108 | .word 0xbfe7c000 ! 180: SAVE_R save %r31, %r0, %r31 | |
2109 | .word 0x87802063 ! 181: WRASI_I wr %r0, 0x0063, %asi | |
2110 | .word 0x87902373 ! 182: WRPR_TT_I wrpr %r0, 0x0373, %tt | |
2111 | .word 0xd49fc020 ! 183: LDDA_R ldda [%r31, %r0] 0x01, %r10 | |
2112 | .word 0xd4d00e80 ! 184: LDSHA_R ldsha [%r0, %r0] 0x74, %r10 | |
2113 | .word 0x8198200e ! 185: WRHPR_HPSTATE_I wrhpr %r0, 0x000e, %hpstate | |
2114 | .word 0x879021d9 ! 186: WRPR_TT_I wrpr %r0, 0x01d9, %tt | |
2115 | .word 0x8d903d8d ! 187: WRPR_PSTATE_I wrpr %r0, 0x1d8d, %pstate | |
2116 | intveclr_0_72: | |
2117 | set 0x7850eef1, %r28 | |
2118 | stxa %r28, [%g0] 0x72 | |
2119 | .word 0x25400001 ! 188: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2120 | .word 0xd41fe001 ! 189: LDD_I ldd [%r31 + 0x0001], %r10 | |
2121 | .word 0xd41fc000 ! 190: LDD_R ldd [%r31 + %r0], %r10 | |
2122 | .word 0xd41fc000 ! 191: LDD_R ldd [%r31 + %r0], %r10 | |
2123 | .word 0xa1902005 ! 192: WRPR_GL_I wrpr %r0, 0x0005, %- | |
2124 | tagged_0_73: | |
2125 | taddcctv %r10, 0x1567, %r16 | |
2126 | .word 0xd407e001 ! 193: LDUW_I lduw [%r31 + 0x0001], %r10 | |
2127 | splash_lsu_0_74: | |
2128 | setx 0xfb4d5c7d7cb43441, %r1, %r2 | |
2129 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2130 | .word 0x3d400001 ! 194: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2131 | debug_0_75: | |
2132 | mov 8, %r18 | |
2133 | .word 0xe8f00852 ! 195: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
2134 | DS_0_76: | |
2135 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2136 | .word 0xbfefc000 ! 196: RESTORE_R restore %r31, %r0, %r31 | |
2137 | .word 0x87802004 ! 197: WRASI_I wr %r0, 0x0004, %asi | |
2138 | splash_lsu_0_77: | |
2139 | setx 0xc19896557f6555c3, %r1, %r2 | |
2140 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2141 | .word 0x3d400001 ! 198: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2142 | .word 0x8282c00a ! 199: ADDcc_R addcc %r11, %r10, %r1 | |
2143 | .word 0xad812001 ! 200: WR_SOFTINT_REG_I wr %r4, 0x0001, %softint | |
2144 | .word 0xc28fe030 ! 201: LDUBA_I lduba [%r31, + 0x0030] %asi, %r1 | |
2145 | ta T_CHANGE_PRIV ! macro | |
2146 | .word 0x91d02033 ! 203: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2147 | .word 0xc2d7e020 ! 204: LDSHA_I ldsha [%r31, + 0x0020] %asi, %r1 | |
2148 | .word 0x86d0e001 ! 205: UMULcc_I umulcc %r3, 0x0001, %r3 | |
2149 | invalw | |
2150 | mov 0x32, %r30 | |
2151 | .word 0x93d0001e ! 206: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2152 | .word 0x8da149b3 ! 207: FDIVs fdivs %f5, %f19, %f6 | |
2153 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_78)) -> intp(0,0,22) | |
2154 | intvec_0_78: | |
2155 | .word 0x39400001 ! 208: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2156 | .word 0x81982f45 ! 209: WRHPR_HPSTATE_I wrhpr %r0, 0x0f45, %hpstate | |
2157 | .word 0xa5a109a3 ! 210: FDIVs fdivs %f4, %f3, %f18 | |
2158 | .word 0x91d02034 ! 211: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2159 | debug_0_79: | |
2160 | setx debug_0_79 + 64, %r11, %r19 | |
2161 | mov 0x38, %r18 | |
2162 | .word 0xe6f00b12 ! 212: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2163 | invalw | |
2164 | mov 0xb4, %r30 | |
2165 | .word 0x93d0001e ! 213: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2166 | mondo_0_80: | |
2167 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2168 | ||
2169 | stxa %r19, [%r0+0x3e0] %asi | |
2170 | .word 0x9d944010 ! 214: WRPR_WSTATE_R wrpr %r17, %r16, %wstate | |
2171 | .word 0xe447c000 ! 215: LDSW_R ldsw [%r31 + %r0], %r18 | |
2172 | ta T_CHANGE_HPRIV ! macro | |
2173 | .word 0xa1902003 ! 217: WRPR_GL_I wrpr %r0, 0x0003, %- | |
2174 | .word 0xa190200a ! 218: WRPR_GL_I wrpr %r0, 0x000a, %- | |
2175 | .word 0x8790219e ! 219: WRPR_TT_I wrpr %r0, 0x019e, %tt | |
2176 | debug_0_81: | |
2177 | mov 8, %r18 | |
2178 | .word 0xe0f00852 ! 220: STXA_R stxa %r16, [%r0 + %r18] 0x42 | |
2179 | .word 0xe4900e80 ! 221: LDUHA_R lduha [%r0, %r0] 0x74, %r18 | |
2180 | .word 0x87802063 ! 222: WRASI_I wr %r0, 0x0063, %asi | |
2181 | .word 0x93902000 ! 223: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2182 | .word 0x8d9029b2 ! 224: WRPR_PSTATE_I wrpr %r0, 0x09b2, %pstate | |
2183 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_82)) -> intp(0,0,23) | |
2184 | intvec_0_82: | |
2185 | .word 0x39400001 ! 225: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2186 | ta T_CHANGE_HPRIV ! macro | |
2187 | DS_0_83: | |
2188 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2189 | .word 0xe730c013 ! 1: STQF_R - %f19, [%r19, %r3] | |
2190 | normalw | |
2191 | .word 0xa1458000 ! 227: RD_SOFTINT_REG rd %softint, %r16 | |
2192 | debug_0_84: | |
2193 | mov 8, %r18 | |
2194 | .word 0xe8f00852 ! 228: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
2195 | ta T_CHANGE_HPRIV ! macro | |
2196 | set 0x1d22b250, %r28 | |
2197 | stxa %r28, [%g0] 0x73 | |
2198 | intvec_0_85: | |
2199 | .word 0x39400001 ! 230: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2200 | .word 0xe08008a0 ! 231: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
2201 | DS_0_86: | |
2202 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2203 | .word 0xd5320012 ! 1: STQF_R - %f10, [%r18, %r8] | |
2204 | normalw | |
2205 | .word 0xa7458000 ! 232: RD_SOFTINT_REG rd %softint, %r19 | |
2206 | .word 0xe68008a0 ! 233: LDUWA_R lduwa [%r0, %r0] 0x45, %r19 | |
2207 | .word 0x879021cd ! 234: WRPR_TT_I wrpr %r0, 0x01cd, %tt | |
2208 | intveclr_0_87: | |
2209 | set 0x7f243e5e, %r28 | |
2210 | stxa %r28, [%g0] 0x72 | |
2211 | .word 0x25400001 ! 235: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2212 | invalw | |
2213 | mov 0x34, %r30 | |
2214 | .word 0x83d0001e ! 236: Tcc_R te icc_or_xcc, %r0 + %r30 | |
2215 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
2216 | ta T_CHANGE_NONPRIV ! macro | |
2217 | .word 0x97a01966 ! 237: FqTOd dis not found | |
2218 | ||
2219 | .word 0xd6800c40 ! 238: LDUWA_R lduwa [%r0, %r0] 0x62, %r11 | |
2220 | .word 0x91d020b5 ! 239: Tcc_I ta icc_or_xcc, %r0 + 181 | |
2221 | debug_0_89: | |
2222 | mov 0x38, %r18 | |
2223 | .word 0xfef00b12 ! 240: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2224 | mondo_0_90: | |
2225 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2226 | ||
2227 | stxa %r11, [%r0+0x3c0] %asi | |
2228 | .word 0x9d90c014 ! 241: WRPR_WSTATE_R wrpr %r3, %r20, %wstate | |
2229 | .word 0xd6800b00 ! 242: LDUWA_R lduwa [%r0, %r0] 0x58, %r11 | |
2230 | .word 0xa5480000 ! 243: RDHPR_HPSTATE rdhpr %hpstate, %r18 | |
2231 | .word 0x91936001 ! 244: WRPR_PIL_I wrpr %r13, 0x0001, %pil | |
2232 | intveclr_0_91: | |
2233 | set 0x6b91f0b4, %r28 | |
2234 | stxa %r28, [%g0] 0x72 | |
2235 | .word 0x25400001 ! 245: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2236 | .word 0x83d02033 ! 246: Tcc_I te icc_or_xcc, %r0 + 51 | |
2237 | .word 0xe49fe001 ! 247: LDDA_I ldda [%r31, + 0x0001] %asi, %r18 | |
2238 | .word 0x8fa249e5 ! 248: FDIVq dis not found | |
2239 | ||
2240 | .word 0xced00e40 ! 249: LDSHA_R ldsha [%r0, %r0] 0x72, %r7 | |
2241 | .word 0xce0fe001 ! 250: LDUB_I ldub [%r31 + 0x0001], %r7 | |
2242 | .word 0x91d02032 ! 251: Tcc_I ta icc_or_xcc, %r0 + 50 | |
2243 | .word 0x8790228b ! 252: WRPR_TT_I wrpr %r0, 0x028b, %tt | |
2244 | mondo_0_92: | |
2245 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2246 | ||
2247 | stxa %r19, [%r0+0x3c0] %asi | |
2248 | .word 0x9d90800c ! 253: WRPR_WSTATE_R wrpr %r2, %r12, %wstate | |
2249 | otherw | |
2250 | mov 0xb0, %r30 | |
2251 | .word 0x91d0001e ! 254: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2252 | .word 0xcf27e001 ! 255: STF_I st %f7, [0x0001, %r31] | |
2253 | .word 0x28800001 ! 256: BLEU bleu,a <label_0x1> | |
2254 | .word 0xcedfe010 ! 257: LDXA_I ldxa [%r31, + 0x0010] %asi, %r7 | |
2255 | set 0xd9508626, %r28 | |
2256 | stxa %r28, [%g0] 0x73 | |
2257 | intvec_0_93: | |
2258 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2259 | mondo_0_94: | |
2260 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2261 | ||
2262 | stxa %r6, [%r0+0x3e0] %asi | |
2263 | .word 0x9d94c012 ! 259: WRPR_WSTATE_R wrpr %r19, %r18, %wstate | |
2264 | .word 0x93902007 ! 260: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
2265 | .word 0xcec7e000 ! 261: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r7 | |
2266 | splash_cmpr_0_95: | |
2267 | setx 0x15fb12494ede50db, %g2, %g1 | |
2268 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2269 | sub %g1, 100, %g1 | |
2270 | .word 0xb1800001 ! 262: WR_STICK_REG_R wr %r0, %r1, %- | |
2271 | .word 0x20700001 ! 263: BPN <illegal instruction> | |
2272 | invalw | |
2273 | mov 0xb0, %r30 | |
2274 | .word 0x91d0001e ! 264: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2275 | invalw | |
2276 | mov 0x33, %r30 | |
2277 | .word 0x91d0001e ! 265: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2278 | nop | |
2279 | mov 0x80, %g3 | |
2280 | stxa %g3, [%g3] 0x57 | |
2281 | .word 0xce5fc000 ! 266: LDX_R ldx [%r31 + %r0], %r7 | |
2282 | .word 0xcf37c012 ! 267: STQF_R - %f7, [%r18, %r31] | |
2283 | .word 0xcf3fe001 ! 268: STDF_I std %f7, [0x0001, %r31] | |
2284 | nop | |
2285 | mov 0x80, %g3 | |
2286 | stxa %g3, [%g3] 0x57 | |
2287 | .word 0xce5fc000 ! 269: LDX_R ldx [%r31 + %r0], %r7 | |
2288 | debug_0_96: | |
2289 | mov 8, %r18 | |
2290 | .word 0xd0f00852 ! 270: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
2291 | splash_lsu_0_97: | |
2292 | setx 0xd9921b717997c15d, %r1, %r2 | |
2293 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2294 | .word 0x3d400001 ! 271: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2295 | mondo_0_98: | |
2296 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2297 | ||
2298 | stxa %r9, [%r0+0x3c8] %asi | |
2299 | .word 0x9d93000a ! 272: WRPR_WSTATE_R wrpr %r12, %r10, %wstate | |
2300 | set 0x126c531b, %r28 | |
2301 | stxa %r28, [%g0] 0x73 | |
2302 | intvec_0_99: | |
2303 | .word 0x39400001 ! 273: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2304 | .word 0xce47e001 ! 274: LDSW_I ldsw [%r31 + 0x0001], %r7 | |
2305 | .word 0xce800b60 ! 275: LDUWA_R lduwa [%r0, %r0] 0x5b, %r7 | |
2306 | .word 0x91d02035 ! 276: Tcc_I ta icc_or_xcc, %r0 + 53 | |
2307 | debug_0_100: | |
2308 | setx debug_0_100 + 64, %r11, %r19 | |
2309 | mov 0x38, %r18 | |
2310 | .word 0xe6f00b12 ! 277: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2311 | .word 0xcecfe030 ! 278: LDSBA_I ldsba [%r31, + 0x0030] %asi, %r7 | |
2312 | .word 0x2e800001 ! 279: BVS bvs,a <label_0x1> | |
2313 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2314 | ta T_CHANGE_NONHPRIV ! macro | |
2315 | .word 0x97696001 ! 280: SDIVX_I sdivx %r5, 0x0001, %r11 | |
2316 | .word 0x9190a001 ! 281: WRPR_PIL_I wrpr %r2, 0x0001, %pil | |
2317 | nop | |
2318 | mov 0x80, %g3 | |
2319 | stxa %g3, [%g3] 0x57 | |
2320 | .word 0xd65fc000 ! 282: LDX_R ldx [%r31 + %r0], %r11 | |
2321 | .word 0x87902262 ! 283: WRPR_TT_I wrpr %r0, 0x0262, %tt | |
2322 | .word 0xd6c7e010 ! 284: LDSWA_I ldswa [%r31, + 0x0010] %asi, %r11 | |
2323 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_102)) -> intp(0,0,27) | |
2324 | intvec_0_102: | |
2325 | .word 0x39400001 ! 285: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2326 | .word 0x99902005 ! 286: WRPR_CLEANWIN_I wrpr %r0, 0x0005, %cleanwin | |
2327 | intveclr_0_103: | |
2328 | set 0x95da34b7, %r28 | |
2329 | stxa %r28, [%g0] 0x72 | |
2330 | .word 0x25400001 ! 287: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2331 | ta T_CHANGE_HPRIV ! macro | |
2332 | .word 0x87802004 ! 289: WRASI_I wr %r0, 0x0004, %asi | |
2333 | splash_cmpr_0_104: | |
2334 | setx 0xb2ddf819da4baa0f, %g2, %g1 | |
2335 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2336 | sub %g1, 100, %g1 | |
2337 | .word 0xb1800001 ! 290: WR_STICK_REG_R wr %r0, %r1, %- | |
2338 | .word 0x93902003 ! 291: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2339 | intveclr_0_105: | |
2340 | set 0x51f9456c, %r28 | |
2341 | stxa %r28, [%g0] 0x72 | |
2342 | .word 0x25400001 ! 292: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2343 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_106)) -> intp(0,0,20) | |
2344 | intvec_0_106: | |
2345 | .word 0x39400001 ! 293: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2346 | .word 0xa190200a ! 294: WRPR_GL_I wrpr %r0, 0x000a, %- | |
2347 | .word 0xd6c804a0 ! 295: LDSBA_R ldsba [%r0, %r0] 0x25, %r11 | |
2348 | .word 0x9b500000 ! 296: RDPR_TPC rdpr %tpc, %r13 | |
2349 | .word 0x93902000 ! 297: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2350 | splash_htba_0_107: | |
2351 | set 0x80000, %r2 | |
2352 | ld [%r2+%r0], %r1 | |
2353 | ta T_CHANGE_HPRIV | |
2354 | set 0x80000, %r2 | |
2355 | .word 0x8b980002 ! 298: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2356 | .word 0x93d02032 ! 299: Tcc_I tne icc_or_xcc, %r0 + 50 | |
2357 | .word 0x83454000 ! 300: RD_CLEAR_SOFTINT rd %clear_softint, %r1 | |
2358 | .word 0xc2c7e030 ! 301: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r1 | |
2359 | .word 0x87802089 ! 302: WRASI_I wr %r0, 0x0089, %asi | |
2360 | invalw | |
2361 | mov 0x35, %r30 | |
2362 | .word 0x91d0001e ! 303: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2363 | mondo_0_108: | |
2364 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2365 | ||
2366 | stxa %r13, [%r0+0x3c0] %asi | |
2367 | .word 0x9d914005 ! 304: WRPR_WSTATE_R wrpr %r5, %r5, %wstate | |
2368 | mondo_0_109: | |
2369 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2370 | ||
2371 | stxa %r11, [%r0+0x3c8] %asi | |
2372 | .word 0x9d94c010 ! 305: WRPR_WSTATE_R wrpr %r19, %r16, %wstate | |
2373 | .word 0x9f802001 ! 306: SIR sir 0x0001 | |
2374 | .word 0x879021c1 ! 307: WRPR_TT_I wrpr %r0, 0x01c1, %tt | |
2375 | .word 0xc28008a0 ! 308: LDUWA_R lduwa [%r0, %r0] 0x45, %r1 | |
2376 | .word 0x93902002 ! 309: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
2377 | mondo_0_110: | |
2378 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2379 | ||
2380 | stxa %r20, [%r0+0x3c0] %asi | |
2381 | .word 0x9d94c002 ! 310: WRPR_WSTATE_R wrpr %r19, %r2, %wstate | |
2382 | tagged_0_111: | |
2383 | taddcctv %r10, 0x1e5f, %r22 | |
2384 | .word 0xc207e001 ! 311: LDUW_I lduw [%r31 + 0x0001], %r1 | |
2385 | .word 0x91d02033 ! 312: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2386 | .word 0xa190200c ! 313: WRPR_GL_I wrpr %r0, 0x000c, %- | |
2387 | debug_0_112: | |
2388 | setx debug_0_112 + 64, %r11, %r19 | |
2389 | mov 0x38, %r18 | |
2390 | .word 0xe6f00b12 ! 314: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2391 | tagged_0_113: | |
2392 | taddcctv %r14, 0x1564, %r19 | |
2393 | .word 0xc207e001 ! 315: LDUW_I lduw [%r31 + 0x0001], %r1 | |
2394 | .word 0xc28fe020 ! 316: LDUBA_I lduba [%r31, + 0x0020] %asi, %r1 | |
2395 | .word 0xc257e001 ! 317: LDSH_I ldsh [%r31 + 0x0001], %r1 | |
2396 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
2397 | ta T_CHANGE_NONPRIV ! macro | |
2398 | .word 0x93686001 ! 318: SDIVX_I sdivx %r1, 0x0001, %r9 | |
2399 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_115)) -> intp(0,1,3) | |
2400 | xir_0_115: | |
2401 | .word 0xa9812001 ! 319: WR_SET_SOFTINT_I wr %r4, 0x0001, %set_softint | |
2402 | .word 0x8d902943 ! 320: WRPR_PSTATE_I wrpr %r0, 0x0943, %pstate | |
2403 | splash_lsu_0_116: | |
2404 | setx 0x50f3c301ebbc38e1, %r1, %r2 | |
2405 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2406 | .word 0x3d400001 ! 321: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2407 | splash_cmpr_0_117: | |
2408 | setx 0xabde45ab7650ab94, %g2, %g1 | |
2409 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2410 | sub %g1, 100, %g1 | |
2411 | .word 0xb1800001 ! 322: WR_STICK_REG_R wr %r0, %r1, %- | |
2412 | invalw | |
2413 | mov 0xb0, %r30 | |
2414 | .word 0x91d0001e ! 323: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2415 | invalw | |
2416 | mov 0x32, %r30 | |
2417 | .word 0x91d0001e ! 324: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2418 | .word 0xd29fe001 ! 325: LDDA_I ldda [%r31, + 0x0001] %asi, %r9 | |
2419 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_118)) -> intp(0,0,12) | |
2420 | intvec_0_118: | |
2421 | .word 0x39400001 ! 326: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2422 | otherw | |
2423 | mov 0x31, %r30 | |
2424 | .word 0x93d0001e ! 327: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2425 | debug_0_119: | |
2426 | mov 0x38, %r18 | |
2427 | .word 0xfef00b12 ! 328: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2428 | ta T_CHANGE_PRIV ! macro | |
2429 | .word 0xd297e030 ! 330: LDUHA_I lduha [%r31, + 0x0030] %asi, %r9 | |
2430 | .word 0x3e800001 ! 331: BVC bvc,a <label_0x1> | |
2431 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_120)) -> intp(0,0,28) | |
2432 | intvec_0_120: | |
2433 | .word 0x39400001 ! 332: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2434 | .word 0x8d902509 ! 333: WRPR_PSTATE_I wrpr %r0, 0x0509, %pstate | |
2435 | .word 0x91d020b4 ! 334: Tcc_I ta icc_or_xcc, %r0 + 180 | |
2436 | .word 0xd2c80e40 ! 335: LDSBA_R ldsba [%r0, %r0] 0x72, %r9 | |
2437 | mondo_0_121: | |
2438 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2439 | ||
2440 | stxa %r10, [%r0+0x3c8] %asi | |
2441 | .word 0x9d900003 ! 336: WRPR_WSTATE_R wrpr %r0, %r3, %wstate | |
2442 | debug_0_122: | |
2443 | mov 0x38, %r18 | |
2444 | .word 0xfef00b12 ! 337: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2445 | .word 0xa1902003 ! 338: WRPR_GL_I wrpr %r0, 0x0003, %- | |
2446 | mondo_0_123: | |
2447 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2448 | ||
2449 | stxa %r18, [%r0+0x3c0] %asi | |
2450 | .word 0x9d94800d ! 339: WRPR_WSTATE_R wrpr %r18, %r13, %wstate | |
2451 | .word 0x8d903e62 ! 340: WRPR_PSTATE_I wrpr %r0, 0x1e62, %pstate | |
2452 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_124)) -> intp(0,0,13) | |
2453 | intvec_0_124: | |
2454 | .word 0x39400001 ! 341: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2455 | .word 0xab840004 ! 342: WR_CLEAR_SOFTINT_R wr %r16, %r4, %clear_softint | |
2456 | .word 0x83d02033 ! 343: Tcc_I te icc_or_xcc, %r0 + 51 | |
2457 | .word 0x8d903cd3 ! 344: WRPR_PSTATE_I wrpr %r0, 0x1cd3, %pstate | |
2458 | .word 0xd2c7e030 ! 345: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r9 | |
2459 | .word 0x30800001 ! 346: BA ba,a <label_0x1> | |
2460 | .word 0x879022f8 ! 347: WRPR_TT_I wrpr %r0, 0x02f8, %tt | |
2461 | .word 0x38700001 ! 348: BPGU <illegal instruction> | |
2462 | set 0xed62be14, %r28 | |
2463 | stxa %r28, [%g0] 0x73 | |
2464 | intvec_0_125: | |
2465 | .word 0x39400001 ! 349: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2466 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_126)) -> intp(0,0,28) | |
2467 | intvec_0_126: | |
2468 | .word 0x39400001 ! 350: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2469 | change_to_randtl_0_127: | |
2470 | ta T_CHANGE_HPRIV ! macro | |
2471 | done_change_to_randtl_0_127: | |
2472 | .word 0x8f902004 ! 351: WRPR_TL_I wrpr %r0, 0x0004, %tl | |
2473 | debug_0_128: | |
2474 | mov 0x38, %r18 | |
2475 | .word 0xfef00b12 ! 352: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2476 | .word 0x81a00545 ! 353: FSQRTd fsqrt | |
2477 | .word 0x93902005 ! 354: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
2478 | .word 0xc077e001 ! 355: STX_I stx %r0, [%r31 + 0x0001] | |
2479 | debug_0_129: | |
2480 | mov 8, %r18 | |
2481 | .word 0xd2f00852 ! 356: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
2482 | .word 0x9f802001 ! 357: SIR sir 0x0001 | |
2483 | DS_0_130: | |
2484 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2485 | .word 0xbfe7c000 ! 358: SAVE_R save %r31, %r0, %r31 | |
2486 | .word 0x91d02034 ! 359: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2487 | .word 0xc0c004a0 ! 360: LDSWA_R ldswa [%r0, %r0] 0x25, %r0 | |
2488 | tagged_0_131: | |
2489 | taddcctv %r26, 0x11fc, %r22 | |
2490 | .word 0xc007e001 ! 361: LDUW_I lduw [%r31 + 0x0001], %r0 | |
2491 | change_to_randtl_0_132: | |
2492 | ta T_CHANGE_PRIV ! macro | |
2493 | done_change_to_randtl_0_132: | |
2494 | .word 0x8f902002 ! 362: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2495 | .word 0x99480000 ! 363: RDHPR_HPSTATE rdhpr %hpstate, %r12 | |
2496 | .word 0x87902222 ! 364: WRPR_TT_I wrpr %r0, 0x0222, %tt | |
2497 | .word 0x93902005 ! 365: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
2498 | .word 0xa784a001 ! 366: WR_GRAPHICS_STATUS_REG_I wr %r18, 0x0001, %- | |
2499 | .word 0xd81fc000 ! 367: LDD_R ldd [%r31 + %r0], %r12 | |
2500 | .word 0xd88fe010 ! 368: LDUBA_I lduba [%r31, + 0x0010] %asi, %r12 | |
2501 | .word 0xd807c000 ! 369: LDUW_R lduw [%r31 + %r0], %r12 | |
2502 | .word 0xd937c005 ! 370: STQF_R - %f12, [%r5, %r31] | |
2503 | intveclr_0_133: | |
2504 | set 0x9b1310a, %r28 | |
2505 | stxa %r28, [%g0] 0x72 | |
2506 | .word 0x25400001 ! 371: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2507 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_134)) -> intp(0,1,3) | |
2508 | xir_0_134: | |
2509 | .word 0xa9832001 ! 372: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
2510 | .word 0x91d02035 ! 373: Tcc_I ta icc_or_xcc, %r0 + 53 | |
2511 | mondo_0_135: | |
2512 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2513 | ||
2514 | stxa %r19, [%r0+0x3e0] %asi | |
2515 | .word 0x9d928008 ! 374: WRPR_WSTATE_R wrpr %r10, %r8, %wstate | |
2516 | .word 0xa082c000 ! 375: ADDcc_R addcc %r11, %r0, %r16 | |
2517 | .word 0x9f802001 ! 376: SIR sir 0x0001 | |
2518 | intveclr_0_136: | |
2519 | set 0x7d568339, %r28 | |
2520 | stxa %r28, [%g0] 0x72 | |
2521 | .word 0x25400001 ! 377: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2522 | .word 0xe0c7e010 ! 378: LDSWA_I ldswa [%r31, + 0x0010] %asi, %r16 | |
2523 | .word 0x8d902dd2 ! 379: WRPR_PSTATE_I wrpr %r0, 0x0dd2, %pstate | |
2524 | nop | |
2525 | mov 0x80, %g3 | |
2526 | stxa %g3, [%g3] 0x57 | |
2527 | .word 0xe05fc000 ! 380: LDX_R ldx [%r31 + %r0], %r16 | |
2528 | splash_cmpr_0_137: | |
2529 | setx 0xca7d0a66b0f093ea, %g2, %g1 | |
2530 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2531 | sub %g1, 100, %g1 | |
2532 | .word 0xb1800001 ! 381: WR_STICK_REG_R wr %r0, %r1, %- | |
2533 | splash_cmpr_0_138: | |
2534 | setx 0x8ad39d15a278a961, %g2, %g1 | |
2535 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2536 | sub %g1, 100, %g1 | |
2537 | .word 0xb1800001 ! 382: WR_STICK_REG_R wr %r0, %r1, %- | |
2538 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_139)) -> intp(0,1,3) | |
2539 | xir_0_139: | |
2540 | .word 0xa984e001 ! 383: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
2541 | .word 0x8d540000 ! 384: RDPR_GL <illegal instruction> | |
2542 | .word 0xcd97e001 ! 385: LDQFA_I - [%r31, 0x0001], %f6 | |
2543 | mondo_0_140: | |
2544 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2545 | ||
2546 | stxa %r13, [%r0+0x3d0] %asi | |
2547 | .word 0x9d91400c ! 386: WRPR_WSTATE_R wrpr %r5, %r12, %wstate | |
2548 | .word 0x91d02033 ! 387: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2549 | debug_0_141: | |
2550 | mov 8, %r18 | |
2551 | .word 0xe6f00852 ! 388: STXA_R stxa %r19, [%r0 + %r18] 0x42 | |
2552 | splash_tba_0_142: | |
2553 | set 0x120000, %r2 | |
2554 | st %r1, [%r2+%r0] | |
2555 | ta T_CHANGE_PRIV | |
2556 | set 0x120000, %r2 | |
2557 | .word 0x8b900002 ! 389: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2558 | .word 0x83d02033 ! 390: Tcc_I te icc_or_xcc, %r0 + 51 | |
2559 | .word 0x8b45c000 ! 391: RD_TICK_CMPR_REG rd %-, %r5 | |
2560 | set 0x225fd75a, %r28 | |
2561 | stxa %r28, [%g0] 0x73 | |
2562 | intvec_0_143: | |
2563 | .word 0x39400001 ! 392: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2564 | intveclr_0_144: | |
2565 | set 0xf46a39b2, %r28 | |
2566 | stxa %r28, [%g0] 0x72 | |
2567 | .word 0x25400001 ! 393: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2568 | debug_0_145: | |
2569 | setx debug_0_145 + 64, %r11, %r19 | |
2570 | mov 0x38, %r18 | |
2571 | .word 0xe6f00b12 ! 394: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2572 | splash_cmpr_0_146: | |
2573 | setx 0x104ce8f593663f4e, %g2, %g1 | |
2574 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2575 | sub %g1, 100, %g1 | |
2576 | .word 0xb1800001 ! 395: WR_STICK_REG_R wr %r0, %r1, %- | |
2577 | .word 0x8d802000 ! 396: WRFPRS_I wr %r0, 0x0000, %fprs | |
2578 | tagged_0_147: | |
2579 | taddcctv %r21, 0x1f33, %r11 | |
2580 | .word 0xca07e001 ! 397: LDUW_I lduw [%r31 + 0x0001], %r5 | |
2581 | mondo_0_148: | |
2582 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2583 | ||
2584 | stxa %r2, [%r0+0x3c8] %asi | |
2585 | .word 0x9d924014 ! 398: WRPR_WSTATE_R wrpr %r9, %r20, %wstate | |
2586 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
2587 | ta T_CHANGE_NONHPRIV ! macro | |
2588 | .word 0x876ce001 ! 399: SDIVX_I sdivx %r19, 0x0001, %r3 | |
2589 | .word 0x8d802004 ! 400: WRFPRS_I wr %r0, 0x0004, %fprs | |
2590 | ta T_CHANGE_HPRIV ! macro | |
2591 | .word 0xc69fc020 ! 402: LDDA_R ldda [%r31, %r0] 0x01, %r3 | |
2592 | debug_0_150: | |
2593 | mov 8, %r18 | |
2594 | .word 0xdcf00852 ! 403: STXA_R stxa %r14, [%r0 + %r18] 0x42 | |
2595 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_151)) -> intp(0,1,3) | |
2596 | xir_0_151: | |
2597 | .word 0xa9842001 ! 404: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
2598 | .word 0xa5500000 ! 405: RDPR_TPC <illegal instruction> | |
2599 | intveclr_0_152: | |
2600 | set 0x831deea4, %r28 | |
2601 | stxa %r28, [%g0] 0x72 | |
2602 | .word 0x25400001 ! 406: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2603 | splash_lsu_0_153: | |
2604 | setx 0x26eb427de2b430d3, %r1, %r2 | |
2605 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2606 | .word 0x3d400001 ! 407: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2607 | .word 0x87802010 ! 408: WRASI_I wr %r0, 0x0010, %asi | |
2608 | .word 0xe43fe001 ! 409: STD_I std %r18, [%r31 + 0x0001] | |
2609 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_154)) -> intp(0,1,3) | |
2610 | xir_0_154: | |
2611 | .word 0xa982e001 ! 410: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
2612 | set 0x160dd620, %r28 | |
2613 | stxa %r28, [%g0] 0x73 | |
2614 | intvec_0_155: | |
2615 | .word 0x39400001 ! 411: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2616 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_156)) -> intp(0,0,16) | |
2617 | intvec_0_156: | |
2618 | .word 0x39400001 ! 412: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2619 | intveclr_0_157: | |
2620 | set 0x9592c535, %r28 | |
2621 | stxa %r28, [%g0] 0x72 | |
2622 | .word 0x25400001 ! 413: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2623 | DS_0_158: | |
2624 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2625 | .word 0xbfe7c000 ! 414: SAVE_R save %r31, %r0, %r31 | |
2626 | .word 0xa190200e ! 415: WRPR_GL_I wrpr %r0, 0x000e, %- | |
2627 | otherw | |
2628 | mov 0x32, %r30 | |
2629 | .word 0x91d0001e ! 416: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2630 | .word 0xa745c000 ! 417: RD_TICK_CMPR_REG rd %-, %r19 | |
2631 | debug_0_159: | |
2632 | mov 8, %r18 | |
2633 | .word 0xdaf00852 ! 418: STXA_R stxa %r13, [%r0 + %r18] 0x42 | |
2634 | debug_0_160: | |
2635 | setx debug_0_160 + 64, %r11, %r19 | |
2636 | mov 0x38, %r18 | |
2637 | .word 0xe6f00b12 ! 419: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2638 | debug_0_161: | |
2639 | mov 0x38, %r18 | |
2640 | .word 0xfef00b12 ! 420: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2641 | invalw | |
2642 | mov 0xb5, %r30 | |
2643 | .word 0x91d0001e ! 421: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2644 | .word 0x906cc012 ! 422: UDIVX_R udivx %r19, %r18, %r8 | |
2645 | .word 0x93902002 ! 423: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
2646 | .word 0x83d020b2 ! 424: Tcc_I te icc_or_xcc, %r0 + 178 | |
2647 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_162)) -> intp(0,0,6) | |
2648 | intvec_0_162: | |
2649 | .word 0x39400001 ! 425: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2650 | otherw | |
2651 | mov 0x31, %r30 | |
2652 | .word 0x83d0001e ! 426: Tcc_R te icc_or_xcc, %r0 + %r30 | |
2653 | .word 0xd00fe001 ! 427: LDUB_I ldub [%r31 + 0x0001], %r8 | |
2654 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
2655 | ta T_CHANGE_NONHPRIV ! macro | |
2656 | .word 0xa76c2001 ! 428: SDIVX_I sdivx %r16, 0x0001, %r19 | |
2657 | .word 0xe61fc000 ! 429: LDD_R ldd [%r31 + %r0], %r19 | |
2658 | .word 0xab828012 ! 430: WR_CLEAR_SOFTINT_R wr %r10, %r18, %clear_softint | |
2659 | .word 0xe677c012 ! 431: STX_R stx %r19, [%r31 + %r18] | |
2660 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_164)) -> intp(0,1,3) | |
2661 | xir_0_164: | |
2662 | .word 0xa984e001 ! 432: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
2663 | .word 0x9750c000 ! 433: RDPR_TT <illegal instruction> | |
2664 | set 0x1412258a, %r28 | |
2665 | stxa %r28, [%g0] 0x73 | |
2666 | intvec_0_165: | |
2667 | .word 0x39400001 ! 434: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2668 | DS_0_166: | |
2669 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2670 | .word 0xd3346001 ! 1: STQF_I - %f9, [0x0001, %r17] | |
2671 | normalw | |
2672 | .word 0x83458000 ! 435: RD_SOFTINT_REG rd %softint, %r1 | |
2673 | .word 0x2a800001 ! 436: BCS bcs,a <label_0x1> | |
2674 | debug_0_167: | |
2675 | mov 0x38, %r18 | |
2676 | .word 0xfef00b12 ! 437: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2677 | tagged_0_168: | |
2678 | tsubcctv %r17, 0x10e8, %r10 | |
2679 | .word 0xc207e001 ! 438: LDUW_I lduw [%r31 + 0x0001], %r1 | |
2680 | set 0x9dd64ac3, %r28 | |
2681 | stxa %r28, [%g0] 0x73 | |
2682 | intvec_0_169: | |
2683 | .word 0x39400001 ! 439: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2684 | debug_0_170: | |
2685 | mov 0x38, %r18 | |
2686 | .word 0xfef00b12 ! 440: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2687 | intveclr_0_171: | |
2688 | set 0x80ead12a, %r28 | |
2689 | stxa %r28, [%g0] 0x72 | |
2690 | .word 0x25400001 ! 441: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2691 | .word 0x99902002 ! 442: WRPR_CLEANWIN_I wrpr %r0, 0x0002, %cleanwin | |
2692 | .word 0x87802020 ! 443: WRASI_I wr %r0, 0x0020, %asi | |
2693 | .word 0xc207c000 ! 444: LDUW_R lduw [%r31 + %r0], %r1 | |
2694 | .word 0xa190200e ! 445: WRPR_GL_I wrpr %r0, 0x000e, %- | |
2695 | .word 0xc20fe001 ! 446: LDUB_I ldub [%r31 + 0x0001], %r1 | |
2696 | ta T_CHANGE_HPRIV ! macro | |
2697 | .word 0x93902005 ! 448: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
2698 | .word 0x91d02033 ! 449: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2699 | .word 0xc247c000 ! 450: LDSW_R ldsw [%r31 + %r0], %r1 | |
2700 | .word 0xc2d80e40 ! 451: LDXA_R ldxa [%r0, %r0] 0x72, %r1 | |
2701 | .word 0xc2c00e40 ! 452: LDSWA_R ldswa [%r0, %r0] 0x72, %r1 | |
2702 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_172)) -> intp(0,1,3) | |
2703 | xir_0_172: | |
2704 | .word 0xa982e001 ! 453: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
2705 | .word 0x93902002 ! 454: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
2706 | set 0x3ebc3c63, %r28 | |
2707 | stxa %r28, [%g0] 0x73 | |
2708 | intvec_0_173: | |
2709 | .word 0x39400001 ! 455: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2710 | .word 0x91936001 ! 456: WRPR_PIL_I wrpr %r13, 0x0001, %pil | |
2711 | invalw | |
2712 | mov 0x32, %r30 | |
2713 | .word 0x91d0001e ! 457: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2714 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_174)) -> intp(0,0,2) | |
2715 | intvec_0_174: | |
2716 | .word 0x39400001 ! 458: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2717 | set 0xeb0defd9, %r28 | |
2718 | stxa %r28, [%g0] 0x73 | |
2719 | intvec_0_175: | |
2720 | .word 0x39400001 ! 459: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2721 | .word 0xc237e001 ! 460: STH_I sth %r1, [%r31 + 0x0001] | |
2722 | .word 0xc25fe001 ! 461: LDX_I ldx [%r31 + 0x0001], %r1 | |
2723 | mondo_0_176: | |
2724 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2725 | ||
2726 | stxa %r17, [%r0+0x3e0] %asi | |
2727 | .word 0x9d914010 ! 462: WRPR_WSTATE_R wrpr %r5, %r16, %wstate | |
2728 | .word 0xc277c010 ! 463: STX_R stx %r1, [%r31 + %r16] | |
2729 | .word 0xc27fe001 ! 464: SWAP_I swap %r1, [%r31 + 0x0001] | |
2730 | .word 0xc2800c80 ! 465: LDUWA_R lduwa [%r0, %r0] 0x64, %r1 | |
2731 | tagged_0_177: | |
2732 | taddcctv %r6, 0x1e7d, %r22 | |
2733 | .word 0xc207e001 ! 466: LDUW_I lduw [%r31 + 0x0001], %r1 | |
2734 | DS_0_178: | |
2735 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2736 | .word 0xc3302001 ! 1: STQF_I - %f1, [0x0001, %r0] | |
2737 | normalw | |
2738 | .word 0x89458000 ! 467: RD_SOFTINT_REG rd %softint, %r4 | |
2739 | mondo_0_179: | |
2740 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2741 | ||
2742 | stxa %r18, [%r0+0x3d8] %asi | |
2743 | .word 0x9d918008 ! 468: WRPR_WSTATE_R wrpr %r6, %r8, %wstate | |
2744 | .word 0xc8d804a0 ! 469: LDXA_R ldxa [%r0, %r0] 0x25, %r4 | |
2745 | debug_0_180: | |
2746 | mov 8, %r18 | |
2747 | .word 0xd2f00852 ! 470: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
2748 | .word 0xa782a001 ! 471: WR_GRAPHICS_STATUS_REG_I wr %r10, 0x0001, %- | |
2749 | .word 0xc8880e60 ! 472: LDUBA_R lduba [%r0, %r0] 0x73, %r4 | |
2750 | .word 0xc8d7e020 ! 473: LDSHA_I ldsha [%r31, + 0x0020] %asi, %r4 | |
2751 | .word 0x38700001 ! 474: BPGU <illegal instruction> | |
2752 | .word 0x2e800001 ! 475: BVS bvs,a <label_0x1> | |
2753 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_181)) -> intp(0,1,3) | |
2754 | xir_0_181: | |
2755 | .word 0xa982a001 ! 476: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
2756 | .word 0xa1902005 ! 477: WRPR_GL_I wrpr %r0, 0x0005, %- | |
2757 | .word 0xc827c008 ! 478: STW_R stw %r4, [%r31 + %r8] | |
2758 | splash_lsu_0_182: | |
2759 | setx 0x9e1678372b630225, %r1, %r2 | |
2760 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2761 | .word 0x3d400001 ! 479: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2762 | splash_cmpr_0_183: | |
2763 | setx 0xdf3ce5c55f23b980, %g2, %g1 | |
2764 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2765 | sub %g1, 100, %g1 | |
2766 | .word 0xb1800001 ! 480: WR_STICK_REG_R wr %r0, %r1, %- | |
2767 | .word 0x99902001 ! 481: WRPR_CLEANWIN_I wrpr %r0, 0x0001, %cleanwin | |
2768 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
2769 | ta T_CHANGE_NONPRIV ! macro | |
2770 | .word 0xa16c6001 ! 482: SDIVX_I sdivx %r17, 0x0001, %r16 | |
2771 | .word 0x87802020 ! 483: WRASI_I wr %r0, 0x0020, %asi | |
2772 | .word 0xe01fc000 ! 484: LDD_R ldd [%r31 + %r0], %r16 | |
2773 | .word 0xe197e001 ! 485: LDQFA_I - [%r31, 0x0001], %f16 | |
2774 | .word 0xe007c000 ! 486: LDUW_R lduw [%r31 + %r0], %r16 | |
2775 | .word 0x87902038 ! 487: WRPR_TT_I wrpr %r0, 0x0038, %tt | |
2776 | .word 0xe0c804a0 ! 488: LDSBA_R ldsba [%r0, %r0] 0x25, %r16 | |
2777 | .word 0x826a8001 ! 489: UDIVX_R udivx %r10, %r1, %r1 | |
2778 | intveclr_0_185: | |
2779 | set 0x96613eae, %r28 | |
2780 | stxa %r28, [%g0] 0x72 | |
2781 | .word 0x25400001 ! 490: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2782 | intveclr_0_186: | |
2783 | set 0x10f042d2, %r28 | |
2784 | stxa %r28, [%g0] 0x72 | |
2785 | .word 0x25400001 ! 491: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2786 | debug_0_187: | |
2787 | setx debug_0_187 + 64, %r11, %r19 | |
2788 | mov 0x38, %r18 | |
2789 | .word 0xe6f00b12 ! 492: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2790 | .word 0xc2dfe020 ! 493: LDXA_I ldxa [%r31, + 0x0020] %asi, %r1 | |
2791 | .word 0xc297e000 ! 494: LDUHA_I lduha [%r31, + 0x0000] %asi, %r1 | |
2792 | .word 0xc28008a0 ! 495: LDUWA_R lduwa [%r0, %r0] 0x45, %r1 | |
2793 | splash_cmpr_0_188: | |
2794 | setx 0x476c324794e983e1, %g2, %g1 | |
2795 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2796 | sub %g1, 100, %g1 | |
2797 | .word 0xb1800001 ! 496: WR_STICK_REG_R wr %r0, %r1, %- | |
2798 | splash_lsu_0_189: | |
2799 | setx 0xfe00dce2ddb04b33, %r1, %r2 | |
2800 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2801 | .word 0x3d400001 ! 497: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2802 | debug_0_190: | |
2803 | setx debug_0_190 + 64, %r11, %r19 | |
2804 | mov 0x38, %r18 | |
2805 | .word 0xe6f00b12 ! 498: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2806 | DS_0_191: | |
2807 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2808 | .word 0xc1332001 ! 1: STQF_I - %f0, [0x0001, %r12] | |
2809 | normalw | |
2810 | .word 0xa3458000 ! 499: RD_SOFTINT_REG rd %softint, %r17 | |
2811 | .word 0xe21fe001 ! 500: LDD_I ldd [%r31 + 0x0001], %r17 | |
2812 | mondo_0_192: | |
2813 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2814 | ||
2815 | stxa %r18, [%r0+0x3d8] %asi | |
2816 | .word 0x9d948007 ! 501: WRPR_WSTATE_R wrpr %r18, %r7, %wstate | |
2817 | .word 0x87802063 ! 502: WRASI_I wr %r0, 0x0063, %asi | |
2818 | debug_0_193: | |
2819 | setx debug_0_193 + 64, %r11, %r19 | |
2820 | mov 0x38, %r18 | |
2821 | .word 0xe6f00b12 ! 503: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2822 | invalw | |
2823 | mov 0x32, %r30 | |
2824 | .word 0x91d0001e ! 504: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2825 | mondo_0_194: | |
2826 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2827 | ||
2828 | stxa %r6, [%r0+0x3c0] %asi | |
2829 | .word 0x9d900013 ! 505: WRPR_WSTATE_R wrpr %r0, %r19, %wstate | |
2830 | .word 0xe207c000 ! 506: LDUW_R lduw [%r31 + %r0], %r17 | |
2831 | set 0xfcb9d79a, %r28 | |
2832 | stxa %r28, [%g0] 0x73 | |
2833 | intvec_0_195: | |
2834 | .word 0x39400001 ! 507: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2835 | .word 0xe2d00e60 ! 508: LDSHA_R ldsha [%r0, %r0] 0x73, %r17 | |
2836 | .word 0x99902004 ! 509: WRPR_CLEANWIN_I wrpr %r0, 0x0004, %cleanwin | |
2837 | splash_cmpr_0_196: | |
2838 | setx 0x403595b0c986a194, %g2, %g1 | |
2839 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2840 | sub %g1, 100, %g1 | |
2841 | .word 0xb1800001 ! 510: WR_STICK_REG_R wr %r0, %r1, %- | |
2842 | .word 0xe2ffc033 ! 511: SWAPA_R swapa %r17, [%r31 + %r19] 0x01 | |
2843 | intveclr_0_197: | |
2844 | set 0x87390ca0, %r28 | |
2845 | stxa %r28, [%g0] 0x72 | |
2846 | .word 0x25400001 ! 512: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2847 | mondo_0_198: | |
2848 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2849 | ||
2850 | stxa %r17, [%r0+0x3e8] %asi | |
2851 | .word 0x9d944006 ! 513: WRPR_WSTATE_R wrpr %r17, %r6, %wstate | |
2852 | .word 0x9f802001 ! 514: SIR sir 0x0001 | |
2853 | otherw | |
2854 | mov 0x33, %r30 | |
2855 | .word 0x93d0001e ! 515: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2856 | .word 0x87802016 ! 516: WRASI_I wr %r0, 0x0016, %asi | |
2857 | nop | |
2858 | mov 0x80, %g3 | |
2859 | stxa %g3, [%g3] 0x57 | |
2860 | .word 0xe25fc000 ! 517: LDX_R ldx [%r31 + %r0], %r17 | |
2861 | set 0x2263af0a, %r28 | |
2862 | stxa %r28, [%g0] 0x73 | |
2863 | intvec_0_199: | |
2864 | .word 0x39400001 ! 518: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2865 | DS_0_200: | |
2866 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2867 | .xword 0xf346d598 ! Random illegal ? | |
2868 | .word 0x9ba00547 ! 1: FSQRTd fsqrt | |
2869 | .word 0x85a18828 ! 519: FADDs fadds %f6, %f8, %f2 | |
2870 | .word 0xa9850011 ! 520: WR_SET_SOFTINT_R wr %r20, %r17, %set_softint | |
2871 | .word 0xa9848003 ! 521: WR_SET_SOFTINT_R wr %r18, %r3, %set_softint | |
2872 | set 0xdfd7fba5, %r28 | |
2873 | stxa %r28, [%g0] 0x73 | |
2874 | intvec_0_201: | |
2875 | .word 0x39400001 ! 522: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2876 | .word 0x8750c000 ! 523: RDPR_TT rdpr %tt, %r3 | |
2877 | .word 0x8d902f5b ! 524: WRPR_PSTATE_I wrpr %r0, 0x0f5b, %pstate | |
2878 | .word 0xa150c000 ! 525: RDPR_TT rdpr %tt, %r16 | |
2879 | .word 0xe197e001 ! 526: LDQFA_I - [%r31, 0x0001], %f16 | |
2880 | .word 0xe04fe001 ! 527: LDSB_I ldsb [%r31 + 0x0001], %r16 | |
2881 | .word 0x95520000 ! 528: RDPR_PIL rdpr %pil, %r10 | |
2882 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_202)) -> intp(0,0,22) | |
2883 | intvec_0_202: | |
2884 | .word 0x39400001 ! 529: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2885 | .word 0xa1902007 ! 530: WRPR_GL_I wrpr %r0, 0x0007, %- | |
2886 | debug_0_203: | |
2887 | mov 0x38, %r18 | |
2888 | .word 0xfef00b12 ! 531: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2889 | .word 0xa1450000 ! 532: RD_SET_SOFTINT rd %set_softint, %r16 | |
2890 | .word 0x30700001 ! 533: BPA <illegal instruction> | |
2891 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_204)) -> intp(0,1,3) | |
2892 | xir_0_204: | |
2893 | .word 0xa9806001 ! 534: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
2894 | DS_0_205: | |
2895 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2896 | .word 0xd330000c ! 1: STQF_R - %f9, [%r12, %r0] | |
2897 | normalw | |
2898 | .word 0x83458000 ! 535: RD_SOFTINT_REG rd %softint, %r1 | |
2899 | DS_0_206: | |
2900 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2901 | pdist %f30, %f28, %f4 | |
2902 | .word 0xa9b1c314 ! 536: ALIGNADDRESS alignaddr %r7, %r20, %r20 | |
2903 | .word 0x93902006 ! 537: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
2904 | nop | |
2905 | mov 0x80, %g3 | |
2906 | stxa %g3, [%g3] 0x5f | |
2907 | .word 0xe85fc000 ! 538: LDX_R ldx [%r31 + %r0], %r20 | |
2908 | otherw | |
2909 | mov 0xb2, %r30 | |
2910 | .word 0x91d0001e ! 539: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2911 | debug_0_207: | |
2912 | mov 8, %r18 | |
2913 | .word 0xd6f00852 ! 540: STXA_R stxa %r11, [%r0 + %r18] 0x42 | |
2914 | tagged_0_208: | |
2915 | tsubcctv %r8, 0x1f7d, %r4 | |
2916 | .word 0xe807e001 ! 541: LDUW_I lduw [%r31 + 0x0001], %r20 | |
2917 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
2918 | ta T_CHANGE_NONHPRIV ! macro | |
2919 | .word 0x93a01970 ! 542: FqTOd dis not found | |
2920 | ||
2921 | debug_0_210: | |
2922 | mov 8, %r18 | |
2923 | .word 0xd0f00852 ! 543: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
2924 | splash_lsu_0_211: | |
2925 | setx 0xad2a8381fb9c37b7, %r1, %r2 | |
2926 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2927 | .word 0x3d400001 ! 544: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2928 | debug_0_212: | |
2929 | mov 0x38, %r18 | |
2930 | .word 0xfef00b12 ! 545: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2931 | .word 0x879022a9 ! 546: WRPR_TT_I wrpr %r0, 0x02a9, %tt | |
2932 | .word 0xd24fe001 ! 547: LDSB_I ldsb [%r31 + 0x0001], %r9 | |
2933 | tagged_0_213: | |
2934 | taddcctv %r8, 0x1c28, %r2 | |
2935 | .word 0xd207e001 ! 548: LDUW_I lduw [%r31 + 0x0001], %r9 | |
2936 | tagged_0_214: | |
2937 | tsubcctv %r25, 0x16b3, %r6 | |
2938 | .word 0xd207e001 ! 549: LDUW_I lduw [%r31 + 0x0001], %r9 | |
2939 | .word 0x93d02033 ! 550: Tcc_I tne icc_or_xcc, %r0 + 51 | |
2940 | .word 0x87902066 ! 551: WRPR_TT_I wrpr %r0, 0x0066, %tt | |
2941 | mondo_0_215: | |
2942 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2943 | ||
2944 | stxa %r19, [%r0+0x3c0] %asi | |
2945 | .word 0x9d940005 ! 552: WRPR_WSTATE_R wrpr %r16, %r5, %wstate | |
2946 | debug_0_216: | |
2947 | mov 8, %r18 | |
2948 | .word 0xdef00852 ! 553: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
2949 | splash_cmpr_0_217: | |
2950 | setx 0xb880493a2565f331, %g2, %g1 | |
2951 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2952 | sub %g1, 100, %g1 | |
2953 | .word 0xb1800001 ! 554: WR_STICK_REG_R wr %r0, %r1, %- | |
2954 | .word 0x93902001 ! 555: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
2955 | .word 0x90d42001 ! 556: UMULcc_I umulcc %r16, 0x0001, %r8 | |
2956 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_218)) -> intp(0,1,3) | |
2957 | xir_0_218: | |
2958 | .word 0xa981e001 ! 557: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
2959 | change_to_randtl_0_219: | |
2960 | ta T_CHANGE_HPRIV ! macro | |
2961 | done_change_to_randtl_0_219: | |
2962 | .word 0x8f902003 ! 558: WRPR_TL_I wrpr %r0, 0x0003, %tl | |
2963 | splash_htba_0_220: | |
2964 | set 0x80000, %r2 | |
2965 | st %r1, [%r2+%r0] | |
2966 | ta T_CHANGE_HPRIV | |
2967 | set 0x80000, %r2 | |
2968 | .word 0x8b980002 ! 559: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2969 | .word 0xab81400d ! 560: WR_CLEAR_SOFTINT_R wr %r5, %r13, %clear_softint | |
2970 | .word 0xd09004a0 ! 561: LDUHA_R lduha [%r0, %r0] 0x25, %r8 | |
2971 | .word 0x87802055 ! 562: WRASI_I wr %r0, 0x0055, %asi | |
2972 | .word 0xd01fe001 ! 563: LDD_I ldd [%r31 + 0x0001], %r8 | |
2973 | .word 0x8d902cb0 ! 564: WRPR_PSTATE_I wrpr %r0, 0x0cb0, %pstate | |
2974 | .word 0x91d020b4 ! 565: Tcc_I ta icc_or_xcc, %r0 + 180 | |
2975 | .word 0xd01fe001 ! 566: LDD_I ldd [%r31 + 0x0001], %r8 | |
2976 | DS_0_221: | |
2977 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2978 | .word 0xe3344001 ! 1: STQF_R - %f17, [%r1, %r17] | |
2979 | normalw | |
2980 | .word 0x99458000 ! 567: RD_SOFTINT_REG rd %softint, %r12 | |
2981 | ta T_CHANGE_PRIV ! macro | |
2982 | debug_0_222: | |
2983 | mov 8, %r18 | |
2984 | .word 0xe4f00852 ! 569: STXA_R stxa %r18, [%r0 + %r18] 0x42 | |
2985 | .word 0x8d9028ba ! 570: WRPR_PSTATE_I wrpr %r0, 0x08ba, %pstate | |
2986 | .word 0xd8d004a0 ! 571: LDSHA_R ldsha [%r0, %r0] 0x25, %r12 | |
2987 | .word 0x87802010 ! 572: WRASI_I wr %r0, 0x0010, %asi | |
2988 | .word 0x9194a001 ! 573: WRPR_PIL_I wrpr %r18, 0x0001, %pil | |
2989 | .word 0xa0498011 ! 574: MULX_R mulx %r6, %r17, %r16 | |
2990 | .word 0xe0d00e40 ! 575: LDSHA_R ldsha [%r0, %r0] 0x72, %r16 | |
2991 | intveclr_0_223: | |
2992 | set 0xf4adc79a, %r28 | |
2993 | stxa %r28, [%g0] 0x72 | |
2994 | .word 0x25400001 ! 576: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2995 | .word 0xa1902002 ! 577: WRPR_GL_I wrpr %r0, 0x0002, %- | |
2996 | invalw | |
2997 | mov 0x34, %r30 | |
2998 | .word 0x91d0001e ! 578: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2999 | .word 0xe137c011 ! 579: STQF_R - %f16, [%r17, %r31] | |
3000 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_224)) -> intp(0,1,3) | |
3001 | xir_0_224: | |
3002 | .word 0xa9806001 ! 580: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
3003 | .word 0x81982f5e ! 581: WRHPR_HPSTATE_I wrhpr %r0, 0x0f5e, %hpstate | |
3004 | .word 0xe137c011 ! 582: STQF_R - %f16, [%r17, %r31] | |
3005 | .word 0x93902003 ! 583: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
3006 | .word 0x8e68c00c ! 584: UDIVX_R udivx %r3, %r12, %r7 | |
3007 | .word 0xa1902005 ! 585: WRPR_GL_I wrpr %r0, 0x0005, %- | |
3008 | set 0x77e46eff, %r28 | |
3009 | stxa %r28, [%g0] 0x73 | |
3010 | intvec_0_225: | |
3011 | .word 0x39400001 ! 586: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3012 | splash_tba_0_226: | |
3013 | set 0x120000, %r2 | |
3014 | st %r1, [%r2+%r0] | |
3015 | ta T_CHANGE_PRIV | |
3016 | set 0x120000, %r2 | |
3017 | .word 0x8b900002 ! 587: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3018 | .word 0x9f802001 ! 588: SIR sir 0x0001 | |
3019 | .word 0xad836001 ! 589: WR_SOFTINT_REG_I wr %r13, 0x0001, %softint | |
3020 | tagged_0_227: | |
3021 | taddcctv %r2, 0x1918, %r21 | |
3022 | .word 0xce07e001 ! 590: LDUW_I lduw [%r31 + 0x0001], %r7 | |
3023 | debug_0_228: | |
3024 | mov 8, %r18 | |
3025 | .word 0xdaf00852 ! 591: STXA_R stxa %r13, [%r0 + %r18] 0x42 | |
3026 | .word 0x856c0001 ! 592: SDIVX_R sdivx %r16, %r1, %r2 | |
3027 | debug_0_229: | |
3028 | setx debug_0_229 + 64, %r11, %r19 | |
3029 | mov 0x38, %r18 | |
3030 | .word 0xe6f00b12 ! 593: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3031 | .word 0x8d520000 ! 594: RDPR_PIL <illegal instruction> | |
3032 | .word 0x36700001 ! 595: BPGE <illegal instruction> | |
3033 | .word 0xcc47c000 ! 596: LDSW_R ldsw [%r31 + %r0], %r6 | |
3034 | invalw | |
3035 | mov 0x31, %r30 | |
3036 | .word 0x93d0001e ! 597: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3037 | .word 0x93902007 ! 598: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
3038 | .word 0x87480000 ! 599: RDHPR_HPSTATE rdhpr %hpstate, %r3 | |
3039 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_230)) -> intp(0,0,4) | |
3040 | intvec_0_230: | |
3041 | .word 0x39400001 ! 600: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3042 | .word 0xc69fc020 ! 601: LDDA_R ldda [%r31, %r0] 0x01, %r3 | |
3043 | .word 0xad836001 ! 602: WR_SOFTINT_REG_I wr %r13, 0x0001, %softint | |
3044 | debug_0_231: | |
3045 | mov 8, %r18 | |
3046 | .word 0xdef00852 ! 603: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
3047 | .word 0x93a1cdc5 ! 604: FdMULq fdmulq | |
3048 | .word 0xa1902009 ! 605: WRPR_GL_I wrpr %r0, 0x0009, %- | |
3049 | mondo_0_232: | |
3050 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3051 | ||
3052 | stxa %r9, [%r0+0x3d0] %asi | |
3053 | .word 0x9d940012 ! 606: WRPR_WSTATE_R wrpr %r16, %r18, %wstate | |
3054 | debug_0_233: | |
3055 | mov 0x38, %r18 | |
3056 | .word 0xfef00b12 ! 607: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3057 | .word 0xd207c000 ! 608: LDUW_R lduw [%r31 + %r0], %r9 | |
3058 | .word 0x93902003 ! 609: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
3059 | debug_0_234: | |
3060 | mov 8, %r18 | |
3061 | .word 0xd6f00852 ! 610: STXA_R stxa %r11, [%r0 + %r18] 0x42 | |
3062 | mondo_0_235: | |
3063 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3064 | ||
3065 | stxa %r2, [%r0+0x3e0] %asi | |
3066 | .word 0x9d94c013 ! 611: WRPR_WSTATE_R wrpr %r19, %r19, %wstate | |
3067 | .word 0x83464000 ! 612: RD_STICK_CMPR_REG rd %-, %r1 | |
3068 | .word 0xc2880e60 ! 613: LDUBA_R lduba [%r0, %r0] 0x73, %r1 | |
3069 | .word 0xc28008a0 ! 614: LDUWA_R lduwa [%r0, %r0] 0x45, %r1 | |
3070 | splash_tba_0_236: | |
3071 | set 0x120000, %r2 | |
3072 | st %r1, [%r2+%r0] | |
3073 | ta T_CHANGE_PRIV | |
3074 | set 0x120000, %r2 | |
3075 | .word 0x8b900002 ! 615: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3076 | .word 0x8084000b ! 616: ADDcc_R addcc %r16, %r11, %r0 | |
3077 | .word 0xc0c004a0 ! 617: LDSWA_R ldswa [%r0, %r0] 0x25, %r0 | |
3078 | .word 0x8d9025e3 ! 618: WRPR_PSTATE_I wrpr %r0, 0x05e3, %pstate | |
3079 | intveclr_0_237: | |
3080 | set 0xca46e984, %r28 | |
3081 | stxa %r28, [%g0] 0x72 | |
3082 | .word 0x25400001 ! 619: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3083 | DS_0_238: | |
3084 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3085 | .xword 0xb37c7985 ! Random illegal ? | |
3086 | .word 0x81a00549 ! 1: FSQRTd fsqrt | |
3087 | .word 0x8ba2882b ! 620: FADDs fadds %f10, %f11, %f5 | |
3088 | set 0xa536656b, %r28 | |
3089 | stxa %r28, [%g0] 0x73 | |
3090 | intvec_0_239: | |
3091 | .word 0x39400001 ! 621: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3092 | intveclr_0_240: | |
3093 | set 0xf0487eb4, %r28 | |
3094 | stxa %r28, [%g0] 0x72 | |
3095 | .word 0x25400001 ! 622: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3096 | set 0xd2033a5b, %r28 | |
3097 | stxa %r28, [%g0] 0x73 | |
3098 | intvec_0_241: | |
3099 | .word 0x39400001 ! 623: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3100 | tagged_0_242: | |
3101 | tsubcctv %r14, 0x1423, %r17 | |
3102 | .word 0xca07e001 ! 624: LDUW_I lduw [%r31 + 0x0001], %r5 | |
3103 | set 0xd74fb03b, %r28 | |
3104 | stxa %r28, [%g0] 0x73 | |
3105 | intvec_0_243: | |
3106 | .word 0x39400001 ! 625: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3107 | splash_lsu_0_244: | |
3108 | setx 0x27197be84930e173, %r1, %r2 | |
3109 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3110 | .word 0x3d400001 ! 626: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3111 | splash_cmpr_0_245: | |
3112 | setx 0xe06ad3ea30e80d97, %g2, %g1 | |
3113 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3114 | sub %g1, 100, %g1 | |
3115 | .word 0xb1800001 ! 627: WR_STICK_REG_R wr %r0, %r1, %- | |
3116 | .word 0x87a449f1 ! 628: FDIVq dis not found | |
3117 | ||
3118 | .word 0x8f50c000 ! 629: RDPR_TT <illegal instruction> | |
3119 | .word 0xcec004a0 ! 630: LDSWA_R ldswa [%r0, %r0] 0x25, %r7 | |
3120 | .word 0xce1fc000 ! 631: LDD_R ldd [%r31 + %r0], %r7 | |
3121 | debug_0_246: | |
3122 | mov 8, %r18 | |
3123 | .word 0xe4f00852 ! 632: STXA_R stxa %r18, [%r0 + %r18] 0x42 | |
3124 | .word 0x91d02033 ! 633: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3125 | DS_0_247: | |
3126 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3127 | pdist %f14, %f16, %f22 | |
3128 | .word 0xa3b48302 ! 634: ALIGNADDRESS alignaddr %r18, %r2, %r17 | |
3129 | .word 0x22700001 ! 635: BPE <illegal instruction> | |
3130 | .word 0xa190200d ! 636: WRPR_GL_I wrpr %r0, 0x000d, %- | |
3131 | .word 0xe2c804a0 ! 637: LDSBA_R ldsba [%r0, %r0] 0x25, %r17 | |
3132 | .word 0xe28008a0 ! 638: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
3133 | .word 0xe2c80e40 ! 639: LDSBA_R ldsba [%r0, %r0] 0x72, %r17 | |
3134 | .word 0x8d802000 ! 640: WRFPRS_I wr %r0, 0x0000, %fprs | |
3135 | .word 0xe28008a0 ! 641: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
3136 | .word 0xe29fe001 ! 642: LDDA_I ldda [%r31, + 0x0001] %asi, %r17 | |
3137 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_248)) -> intp(0,0,19) | |
3138 | intvec_0_248: | |
3139 | .word 0x39400001 ! 643: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3140 | intveclr_0_249: | |
3141 | set 0xaec56419, %r28 | |
3142 | stxa %r28, [%g0] 0x72 | |
3143 | .word 0x25400001 ! 644: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3144 | .word 0x9f802001 ! 645: SIR sir 0x0001 | |
3145 | invalw | |
3146 | mov 0x30, %r30 | |
3147 | .word 0x91d0001e ! 646: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3148 | .word 0xa190200b ! 647: WRPR_GL_I wrpr %r0, 0x000b, %- | |
3149 | .word 0x87902214 ! 648: WRPR_TT_I wrpr %r0, 0x0214, %tt | |
3150 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_250)) -> intp(0,0,1) | |
3151 | intvec_0_250: | |
3152 | .word 0x39400001 ! 649: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3153 | .word 0xa190200f ! 650: WRPR_GL_I wrpr %r0, 0x000f, %- | |
3154 | .word 0xa190200f ! 651: WRPR_GL_I wrpr %r0, 0x000f, %- | |
3155 | intveclr_0_251: | |
3156 | set 0x2e471cf3, %r28 | |
3157 | stxa %r28, [%g0] 0x72 | |
3158 | .word 0x25400001 ! 652: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3159 | .word 0x87802080 ! 653: WRASI_I wr %r0, 0x0080, %asi | |
3160 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_252)) -> intp(0,0,17) | |
3161 | intvec_0_252: | |
3162 | .word 0x39400001 ! 654: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3163 | .word 0xe20fc000 ! 655: LDUB_R ldub [%r31 + %r0], %r17 | |
3164 | intveclr_0_253: | |
3165 | set 0xb2959ac7, %r28 | |
3166 | stxa %r28, [%g0] 0x72 | |
3167 | .word 0x25400001 ! 656: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3168 | .word 0xa1902004 ! 657: WRPR_GL_I wrpr %r0, 0x0004, %- | |
3169 | mondo_0_254: | |
3170 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3171 | ||
3172 | stxa %r8, [%r0+0x3e8] %asi | |
3173 | .word 0x9d944014 ! 658: WRPR_WSTATE_R wrpr %r17, %r20, %wstate | |
3174 | .word 0x8d9032b1 ! 659: WRPR_PSTATE_I wrpr %r0, 0x12b1, %pstate | |
3175 | splash_cmpr_0_255: | |
3176 | setx 0x909f41cb6e453e3f, %g2, %g1 | |
3177 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3178 | sub %g1, 100, %g1 | |
3179 | .word 0xb1800001 ! 660: WR_STICK_REG_R wr %r0, %r1, %- | |
3180 | .word 0xa153c000 ! 661: RDPR_FQ <illegal instruction> | |
3181 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_256)) -> intp(0,1,3) | |
3182 | xir_0_256: | |
3183 | .word 0xa9836001 ! 662: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
3184 | splash_cmpr_0_257: | |
3185 | setx 0x72a26704b4855d7b, %g2, %g1 | |
3186 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3187 | sub %g1, 100, %g1 | |
3188 | .word 0xb1800001 ! 663: WR_STICK_REG_R wr %r0, %r1, %- | |
3189 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_258)) -> intp(0,0,0) | |
3190 | intvec_0_258: | |
3191 | .word 0x39400001 ! 664: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3192 | .word 0xe127c014 ! 665: STF_R st %f16, [%r20, %r31] | |
3193 | nop | |
3194 | mov 0x80, %g3 | |
3195 | stxa %g3, [%g3] 0x57 | |
3196 | .word 0xe05fc000 ! 666: LDX_R ldx [%r31 + %r0], %r16 | |
3197 | .word 0xe097e010 ! 667: LDUHA_I lduha [%r31, + 0x0010] %asi, %r16 | |
3198 | intveclr_0_259: | |
3199 | set 0xf0d1e9b5, %r28 | |
3200 | stxa %r28, [%g0] 0x72 | |
3201 | .word 0x25400001 ! 668: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3202 | .word 0xa190200e ! 669: WRPR_GL_I wrpr %r0, 0x000e, %- | |
3203 | mondo_0_260: | |
3204 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3205 | ||
3206 | stxa %r3, [%r0+0x3d0] %asi | |
3207 | .word 0x9d94c014 ! 670: WRPR_WSTATE_R wrpr %r19, %r20, %wstate | |
3208 | .word 0x8780204f ! 671: WRASI_I wr %r0, 0x004f, %asi | |
3209 | splash_cmpr_0_261: | |
3210 | setx 0x546ee44570811e98, %g2, %g1 | |
3211 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3212 | sub %g1, 100, %g1 | |
3213 | .word 0xb1800001 ! 672: WR_STICK_REG_R wr %r0, %r1, %- | |
3214 | .word 0xa190200d ! 673: WRPR_GL_I wrpr %r0, 0x000d, %- | |
3215 | .word 0x87802016 ! 674: WRASI_I wr %r0, 0x0016, %asi | |
3216 | intveclr_0_262: | |
3217 | set 0x972d6a1, %r28 | |
3218 | stxa %r28, [%g0] 0x72 | |
3219 | .word 0x25400001 ! 675: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3220 | .word 0xe0c004a0 ! 676: LDSWA_R ldswa [%r0, %r0] 0x25, %r16 | |
3221 | .word 0x93902004 ! 677: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
3222 | .word 0x81460000 ! 678: RD_STICK_REG stbar | |
3223 | ta T_CHANGE_PRIV ! macro | |
3224 | .word 0xa1902008 ! 680: WRPR_GL_I wrpr %r0, 0x0008, %- | |
3225 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_263)) -> intp(0,1,3) | |
3226 | xir_0_263: | |
3227 | .word 0xa9806001 ! 681: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
3228 | tagged_0_264: | |
3229 | tsubcctv %r3, 0x1120, %r9 | |
3230 | .word 0xe007e001 ! 682: LDUW_I lduw [%r31 + 0x0001], %r16 | |
3231 | .word 0xe0cfe010 ! 683: LDSBA_I ldsba [%r31, + 0x0010] %asi, %r16 | |
3232 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_265)) -> intp(0,1,3) | |
3233 | xir_0_265: | |
3234 | .word 0xa980a001 ! 684: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
3235 | tagged_0_266: | |
3236 | tsubcctv %r26, 0x1277, %r11 | |
3237 | .word 0xe007e001 ! 685: LDUW_I lduw [%r31 + 0x0001], %r16 | |
3238 | set 0x91d65595, %r28 | |
3239 | stxa %r28, [%g0] 0x73 | |
3240 | intvec_0_267: | |
3241 | .word 0x39400001 ! 686: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3242 | .word 0xa350c000 ! 687: RDPR_TT rdpr %tt, %r17 | |
3243 | .word 0xa190200a ! 688: WRPR_GL_I wrpr %r0, 0x000a, %- | |
3244 | tagged_0_268: | |
3245 | tsubcctv %r9, 0x1328, %r1 | |
3246 | .word 0xe207e001 ! 689: LDUW_I lduw [%r31 + 0x0001], %r17 | |
3247 | tagged_0_269: | |
3248 | taddcctv %r6, 0x1a14, %r25 | |
3249 | .word 0xe207e001 ! 690: LDUW_I lduw [%r31 + 0x0001], %r17 | |
3250 | .word 0xe20fc000 ! 691: LDUB_R ldub [%r31 + %r0], %r17 | |
3251 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_270)) -> intp(0,0,21) | |
3252 | intvec_0_270: | |
3253 | .word 0x39400001 ! 692: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3254 | ta T_CHANGE_PRIV ! macro | |
3255 | splash_tba_0_271: | |
3256 | set 0x120000, %r2 | |
3257 | ld [%r2+%r0], %r1 | |
3258 | ta T_CHANGE_PRIV | |
3259 | set 0x120000, %r2 | |
3260 | .word 0x8b900002 ! 694: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3261 | tagged_0_272: | |
3262 | tsubcctv %r8, 0x13b2, %r25 | |
3263 | .word 0xe207e001 ! 695: LDUW_I lduw [%r31 + 0x0001], %r17 | |
3264 | splash_cmpr_0_273: | |
3265 | setx 0x2d3dc15fdf7e32d8, %g2, %g1 | |
3266 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3267 | sub %g1, 100, %g1 | |
3268 | .word 0xb1800001 ! 696: WR_STICK_REG_R wr %r0, %r1, %- | |
3269 | .word 0x95454000 ! 697: RD_CLEAR_SOFTINT rd %clear_softint, %r10 | |
3270 | .word 0xd427e001 ! 698: STW_I stw %r10, [%r31 + 0x0001] | |
3271 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_274)) -> intp(0,0,30) | |
3272 | intvec_0_274: | |
3273 | .word 0x39400001 ! 699: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3274 | .word 0xd4c004a0 ! 700: LDSWA_R ldswa [%r0, %r0] 0x25, %r10 | |
3275 | .word 0x91d02034 ! 701: Tcc_I ta icc_or_xcc, %r0 + 52 | |
3276 | .word 0xd49004a0 ! 702: LDUHA_R lduha [%r0, %r0] 0x25, %r10 | |
3277 | ta T_CHANGE_PRIV ! macro | |
3278 | intveclr_0_275: | |
3279 | set 0xc50ee537, %r28 | |
3280 | stxa %r28, [%g0] 0x72 | |
3281 | .word 0x25400001 ! 704: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3282 | tagged_0_276: | |
3283 | tsubcctv %r19, 0x1420, %r20 | |
3284 | .word 0xd407e001 ! 705: LDUW_I lduw [%r31 + 0x0001], %r10 | |
3285 | set 0x9d5b3980, %r28 | |
3286 | stxa %r28, [%g0] 0x73 | |
3287 | intvec_0_277: | |
3288 | .word 0x39400001 ! 706: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3289 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_278)) -> intp(0,0,2) | |
3290 | intvec_0_278: | |
3291 | .word 0x39400001 ! 707: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3292 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3293 | ta T_CHANGE_NONHPRIV ! macro | |
3294 | .word 0x9b686001 ! 708: SDIVX_I sdivx %r1, 0x0001, %r13 | |
3295 | .word 0x99902001 ! 709: WRPR_CLEANWIN_I wrpr %r0, 0x0001, %cleanwin | |
3296 | .word 0xda9004a0 ! 710: LDUHA_R lduha [%r0, %r0] 0x25, %r13 | |
3297 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_280)) -> intp(0,1,3) | |
3298 | xir_0_280: | |
3299 | .word 0xa984a001 ! 711: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
3300 | set 0x780f961d, %r28 | |
3301 | stxa %r28, [%g0] 0x73 | |
3302 | intvec_0_281: | |
3303 | .word 0x39400001 ! 712: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3304 | splash_cmpr_0_282: | |
3305 | setx 0x9be8585a6abe44aa, %g2, %g1 | |
3306 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3307 | sub %g1, 100, %g1 | |
3308 | .word 0xb1800001 ! 713: WR_STICK_REG_R wr %r0, %r1, %- | |
3309 | .word 0xdac80e80 ! 714: LDSBA_R ldsba [%r0, %r0] 0x74, %r13 | |
3310 | nop | |
3311 | mov 0x80, %g3 | |
3312 | stxa %g3, [%g3] 0x5f | |
3313 | .word 0xda5fc000 ! 715: LDX_R ldx [%r31 + %r0], %r13 | |
3314 | set 0x3062fbff, %r28 | |
3315 | stxa %r28, [%g0] 0x73 | |
3316 | intvec_0_283: | |
3317 | .word 0x39400001 ! 716: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3318 | .word 0x87802014 ! 717: WRASI_I wr %r0, 0x0014, %asi | |
3319 | .word 0x91d02032 ! 718: Tcc_I ta icc_or_xcc, %r0 + 50 | |
3320 | debug_0_284: | |
3321 | mov 0x38, %r18 | |
3322 | .word 0xfef00b12 ! 719: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3323 | .word 0x3a700001 ! 720: BPCC <illegal instruction> | |
3324 | .word 0x91d02033 ! 721: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3325 | .word 0x99464000 ! 722: RD_STICK_CMPR_REG rd %-, %r12 | |
3326 | splash_htba_0_285: | |
3327 | set 0x00390000, %r2 | |
3328 | ld [%r2+%r0], %r1 | |
3329 | ta T_CHANGE_HPRIV | |
3330 | set 0x003a0000, %r2 | |
3331 | .word 0x8b980002 ! 723: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3332 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_286)) -> intp(0,0,13) | |
3333 | intvec_0_286: | |
3334 | .word 0x39400001 ! 724: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3335 | .word 0x87a509f0 ! 725: FDIVq dis not found | |
3336 | ||
3337 | nop | |
3338 | mov 0x80, %g3 | |
3339 | stxa %g3, [%g3] 0x5f | |
3340 | .word 0xc65fc000 ! 726: LDX_R ldx [%r31 + %r0], %r3 | |
3341 | .word 0xa2c2e001 ! 727: ADDCcc_I addccc %r11, 0x0001, %r17 | |
3342 | .word 0xe2c804a0 ! 728: LDSBA_R ldsba [%r0, %r0] 0x25, %r17 | |
3343 | .word 0xe2c004a0 ! 729: LDSWA_R ldswa [%r0, %r0] 0x25, %r17 | |
3344 | .word 0x32800001 ! 730: BNE bne,a <label_0x1> | |
3345 | .word 0xa9540000 ! 731: RDPR_GL rdpr %-, %r20 | |
3346 | .word 0xe847e001 ! 732: LDSW_I ldsw [%r31 + 0x0001], %r20 | |
3347 | splash_cmpr_0_287: | |
3348 | setx 0x68b28e7abdf26f8d, %g2, %g1 | |
3349 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3350 | sub %g1, 100, %g1 | |
3351 | .word 0xb1800001 ! 733: WR_STICK_REG_R wr %r0, %r1, %- | |
3352 | .word 0xe8c004a0 ! 734: LDSWA_R ldswa [%r0, %r0] 0x25, %r20 | |
3353 | debug_0_288: | |
3354 | mov 8, %r18 | |
3355 | .word 0xd6f00852 ! 735: STXA_R stxa %r11, [%r0 + %r18] 0x42 | |
3356 | otherw | |
3357 | mov 0xb3, %r30 | |
3358 | .word 0x91d0001e ! 736: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3359 | .word 0xe88008a0 ! 737: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 | |
3360 | .word 0x8f480000 ! 738: RDHPR_HPSTATE rdhpr %hpstate, %r7 | |
3361 | DS_0_289: | |
3362 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3363 | pdist %f10, %f6, %f10 | |
3364 | .word 0xa3b2c305 ! 739: ALIGNADDRESS alignaddr %r11, %r5, %r17 | |
3365 | .word 0xe2c804a0 ! 740: LDSBA_R ldsba [%r0, %r0] 0x25, %r17 | |
3366 | .word 0x81460000 ! 741: RD_STICK_REG stbar | |
3367 | debug_0_290: | |
3368 | mov 0x38, %r18 | |
3369 | .word 0xfef00b12 ! 742: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3370 | .word 0x8790208a ! 743: WRPR_TT_I wrpr %r0, 0x008a, %tt | |
3371 | .word 0x87802058 ! 744: WRASI_I wr %r0, 0x0058, %asi | |
3372 | .word 0x88c02001 ! 745: ADDCcc_I addccc %r0, 0x0001, %r4 | |
3373 | splash_cmpr_0_291: | |
3374 | setx 0x2849c9c012d88585, %g2, %g1 | |
3375 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3376 | sub %g1, 100, %g1 | |
3377 | .word 0xb1800001 ! 746: WR_STICK_REG_R wr %r0, %r1, %- | |
3378 | .word 0x87902303 ! 747: WRPR_TT_I wrpr %r0, 0x0303, %tt | |
3379 | .word 0x93902006 ! 748: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
3380 | .word 0x8d903203 ! 749: WRPR_PSTATE_I wrpr %r0, 0x1203, %pstate | |
3381 | debug_0_292: | |
3382 | setx debug_0_292 + 64, %r11, %r19 | |
3383 | mov 0x38, %r18 | |
3384 | .word 0xe6f00b12 ! 750: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3385 | .word 0xc93fc005 ! 751: STDF_R std %f4, [%r5, %r31] | |
3386 | otherw | |
3387 | mov 0x35, %r30 | |
3388 | .word 0x93d0001e ! 752: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3389 | .word 0xc89004a0 ! 753: LDUHA_R lduha [%r0, %r0] 0x25, %r4 | |
3390 | .word 0xad806001 ! 754: WR_SOFTINT_REG_I wr %r1, 0x0001, %softint | |
3391 | .word 0x99902002 ! 755: WRPR_CLEANWIN_I wrpr %r0, 0x0002, %cleanwin | |
3392 | intveclr_0_293: | |
3393 | set 0xa3803ce2, %r28 | |
3394 | stxa %r28, [%g0] 0x72 | |
3395 | .word 0x25400001 ! 756: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3396 | intveclr_0_294: | |
3397 | set 0x2d0b610a, %r28 | |
3398 | stxa %r28, [%g0] 0x72 | |
3399 | .word 0x25400001 ! 757: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3400 | .word 0x93902007 ! 758: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
3401 | .word 0x22800001 ! 759: BE be,a <label_0x1> | |
3402 | .word 0x91d020b4 ! 760: Tcc_I ta icc_or_xcc, %r0 + 180 | |
3403 | debug_0_295: | |
3404 | setx debug_0_295 + 64, %r11, %r19 | |
3405 | mov 0x38, %r18 | |
3406 | .word 0xe6f00b12 ! 761: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3407 | .word 0x93902002 ! 762: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3408 | splash_cmpr_0_296: | |
3409 | setx 0x5c618857aef4a6b9, %g2, %g1 | |
3410 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3411 | sub %g1, 100, %g1 | |
3412 | .word 0xb1800001 ! 763: WR_STICK_REG_R wr %r0, %r1, %- | |
3413 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_297)) -> intp(0,1,3) | |
3414 | xir_0_297: | |
3415 | .word 0xa9832001 ! 764: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
3416 | splash_cmpr_0_298: | |
3417 | setx 0xa92fe631669611ed, %g2, %g1 | |
3418 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3419 | sub %g1, 100, %g1 | |
3420 | .word 0xb1800001 ! 765: WR_STICK_REG_R wr %r0, %r1, %- | |
3421 | .word 0x91d020b4 ! 766: Tcc_I ta icc_or_xcc, %r0 + 180 | |
3422 | .word 0xa1902002 ! 767: WRPR_GL_I wrpr %r0, 0x0002, %- | |
3423 | .word 0x91d020b3 ! 768: Tcc_I ta icc_or_xcc, %r0 + 179 | |
3424 | DS_0_299: | |
3425 | nop | |
3426 | not %g0, %g2 | |
3427 | jmp %g2 | |
3428 | .word 0x9d902003 ! 769: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
3429 | intveclr_0_300: | |
3430 | set 0x76157a8d, %r28 | |
3431 | stxa %r28, [%g0] 0x72 | |
3432 | .word 0x25400001 ! 770: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3433 | .word 0x87802063 ! 771: WRASI_I wr %r0, 0x0063, %asi | |
3434 | .word 0xa190200e ! 772: WRPR_GL_I wrpr %r0, 0x000e, %- | |
3435 | .word 0xa7846001 ! 773: WR_GRAPHICS_STATUS_REG_I wr %r17, 0x0001, %- | |
3436 | .word 0x2a800001 ! 774: BCS bcs,a <label_0x1> | |
3437 | splash_cmpr_0_301: | |
3438 | setx 0x1b807313b628e485, %g2, %g1 | |
3439 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3440 | sub %g1, 100, %g1 | |
3441 | .word 0xb1800001 ! 775: WR_STICK_REG_R wr %r0, %r1, %- | |
3442 | .word 0xc88008a0 ! 776: LDUWA_R lduwa [%r0, %r0] 0x45, %r4 | |
3443 | ta T_CHANGE_HPRIV ! macro | |
3444 | .word 0x8790214c ! 778: WRPR_TT_I wrpr %r0, 0x014c, %tt | |
3445 | .word 0x81b01021 ! 779: SIAM siam 1 | |
3446 | .word 0x99902003 ! 780: WRPR_CLEANWIN_I wrpr %r0, 0x0003, %cleanwin | |
3447 | debug_0_302: | |
3448 | mov 0x38, %r18 | |
3449 | .word 0xfef00b12 ! 781: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3450 | .word 0x87902179 ! 782: WRPR_TT_I wrpr %r0, 0x0179, %tt | |
3451 | DS_0_303: | |
3452 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3453 | .word 0xbfefc000 ! 783: RESTORE_R restore %r31, %r0, %r31 | |
3454 | ta T_CHANGE_PRIV ! macro | |
3455 | DS_0_304: | |
3456 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3457 | .word 0xbfefc000 ! 785: RESTORE_R restore %r31, %r0, %r31 | |
3458 | set 0xaecaf044, %r28 | |
3459 | stxa %r28, [%g0] 0x73 | |
3460 | intvec_0_305: | |
3461 | .word 0x39400001 ! 786: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3462 | .word 0x8d903419 ! 787: WRPR_PSTATE_I wrpr %r0, 0x1419, %pstate | |
3463 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_306)) -> intp(0,0,15) | |
3464 | intvec_0_306: | |
3465 | .word 0x39400001 ! 788: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3466 | .word 0xc88008a0 ! 789: LDUWA_R lduwa [%r0, %r0] 0x45, %r4 | |
3467 | .word 0x83480000 ! 790: RDHPR_HPSTATE rdhpr %hpstate, %r1 | |
3468 | .word 0xc317c000 ! 791: LDQF_R - [%r31, %r0], %f1 | |
3469 | intveclr_0_307: | |
3470 | set 0x66c8b4cf, %r28 | |
3471 | stxa %r28, [%g0] 0x72 | |
3472 | .word 0x25400001 ! 792: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3473 | .word 0xc2d00e40 ! 793: LDSHA_R ldsha [%r0, %r0] 0x72, %r1 | |
3474 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_308)) -> intp(0,1,3) | |
3475 | xir_0_308: | |
3476 | .word 0xa9842001 ! 794: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
3477 | intveclr_0_309: | |
3478 | set 0x5d8710f5, %r28 | |
3479 | stxa %r28, [%g0] 0x72 | |
3480 | .word 0x25400001 ! 795: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3481 | mondo_0_310: | |
3482 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3483 | ||
3484 | stxa %r12, [%r0+0x3c8] %asi | |
3485 | .word 0x9d91c003 ! 796: WRPR_WSTATE_R wrpr %r7, %r3, %wstate | |
3486 | .word 0x87802088 ! 797: WRASI_I wr %r0, 0x0088, %asi | |
3487 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_311)) -> intp(0,1,3) | |
3488 | xir_0_311: | |
3489 | .word 0xa9822001 ! 798: WR_SET_SOFTINT_I wr %r8, 0x0001, %set_softint | |
3490 | .word 0x8780201c ! 799: WRASI_I wr %r0, 0x001c, %asi | |
3491 | intveclr_0_312: | |
3492 | set 0x2169b776, %r28 | |
3493 | stxa %r28, [%g0] 0x72 | |
3494 | .word 0x25400001 ! 800: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3495 | intveclr_0_313: | |
3496 | set 0x67ccaca8, %r28 | |
3497 | stxa %r28, [%g0] 0x72 | |
3498 | .word 0x25400001 ! 801: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3499 | invalw | |
3500 | mov 0x33, %r30 | |
3501 | .word 0x83d0001e ! 802: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3502 | .word 0x94ad0010 ! 803: ANDNcc_R andncc %r20, %r16, %r10 | |
3503 | .word 0xa190200e ! 804: WRPR_GL_I wrpr %r0, 0x000e, %- | |
3504 | .word 0x8d802000 ! 805: WRFPRS_I wr %r0, 0x0000, %fprs | |
3505 | debug_0_314: | |
3506 | mov 0x38, %r18 | |
3507 | .word 0xfef00b12 ! 806: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3508 | .word 0xd4d004a0 ! 807: LDSHA_R ldsha [%r0, %r0] 0x25, %r10 | |
3509 | .word 0x819821cc ! 808: WRHPR_HPSTATE_I wrhpr %r0, 0x01cc, %hpstate | |
3510 | .word 0x93902001 ! 809: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
3511 | debug_0_315: | |
3512 | mov 8, %r18 | |
3513 | .word 0xe0f00852 ! 810: STXA_R stxa %r16, [%r0 + %r18] 0x42 | |
3514 | invalw | |
3515 | mov 0xb4, %r30 | |
3516 | .word 0x93d0001e ! 811: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3517 | .word 0x8d9026a7 ! 812: WRPR_PSTATE_I wrpr %r0, 0x06a7, %pstate | |
3518 | debug_0_316: | |
3519 | setx debug_0_316 + 64, %r11, %r19 | |
3520 | mov 0x38, %r18 | |
3521 | .word 0xe6f00b12 ! 813: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3522 | .word 0xa7464000 ! 814: RD_STICK_CMPR_REG rd %-, %r19 | |
3523 | .word 0x8d9039a6 ! 815: WRPR_PSTATE_I wrpr %r0, 0x19a6, %pstate | |
3524 | splash_cmpr_0_317: | |
3525 | setx 0xdfe6b26ff46e2dfa, %g2, %g1 | |
3526 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3527 | sub %g1, 100, %g1 | |
3528 | .word 0xb1800001 ! 816: WR_STICK_REG_R wr %r0, %r1, %- | |
3529 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_318)) -> intp(0,0,16) | |
3530 | intvec_0_318: | |
3531 | .word 0x39400001 ! 817: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3532 | .word 0x879022e8 ! 818: WRPR_TT_I wrpr %r0, 0x02e8, %tt | |
3533 | .word 0x8780201c ! 819: WRASI_I wr %r0, 0x001c, %asi | |
3534 | .word 0x87902270 ! 820: WRPR_TT_I wrpr %r0, 0x0270, %tt | |
3535 | .word 0x87802080 ! 821: WRASI_I wr %r0, 0x0080, %asi | |
3536 | .word 0x87540000 ! 822: RDPR_GL rdpr %-, %r3 | |
3537 | .word 0x83d02032 ! 823: Tcc_I te icc_or_xcc, %r0 + 50 | |
3538 | .word 0x8d902adc ! 824: WRPR_PSTATE_I wrpr %r0, 0x0adc, %pstate | |
3539 | debug_0_319: | |
3540 | setx debug_0_319 + 64, %r11, %r19 | |
3541 | mov 0x38, %r18 | |
3542 | .word 0xe6f00b12 ! 825: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3543 | splash_cmpr_0_320: | |
3544 | setx 0x16ed4d1987c0f7fe, %g2, %g1 | |
3545 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3546 | sub %g1, 100, %g1 | |
3547 | .word 0xb1800001 ! 826: WR_STICK_REG_R wr %r0, %r1, %- | |
3548 | tagged_0_321: | |
3549 | taddcctv %r21, 0x1a08, %r10 | |
3550 | .word 0xc607e001 ! 827: LDUW_I lduw [%r31 + 0x0001], %r3 | |
3551 | nop | |
3552 | mov 0x80, %g3 | |
3553 | stxa %g3, [%g3] 0x57 | |
3554 | .word 0xc65fc000 ! 828: LDX_R ldx [%r31 + %r0], %r3 | |
3555 | .word 0xa190200c ! 829: WRPR_GL_I wrpr %r0, 0x000c, %- | |
3556 | .word 0x93902006 ! 830: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
3557 | invalw | |
3558 | mov 0x32, %r30 | |
3559 | .word 0x91d0001e ! 831: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3560 | .word 0x87802010 ! 832: WRASI_I wr %r0, 0x0010, %asi | |
3561 | .word 0xc69fc020 ! 833: LDDA_R ldda [%r31, %r0] 0x01, %r3 | |
3562 | tagged_0_322: | |
3563 | tsubcctv %r3, 0x1b6b, %r11 | |
3564 | .word 0xc607e001 ! 834: LDUW_I lduw [%r31 + 0x0001], %r3 | |
3565 | .word 0x886c8002 ! 835: UDIVX_R udivx %r18, %r2, %r4 | |
3566 | splash_htba_0_323: | |
3567 | set 0x80000, %r2 | |
3568 | ld [%r2+%r0], %r1 | |
3569 | ta T_CHANGE_HPRIV | |
3570 | set 0x80000, %r2 | |
3571 | .word 0x8b980002 ! 836: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3572 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_324)) -> intp(0,1,3) | |
3573 | xir_0_324: | |
3574 | .word 0xa9802001 ! 837: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
3575 | .word 0xc91fe001 ! 838: LDDF_I ldd [%r31, 0x0001], %f4 | |
3576 | .word 0x91d020b5 ! 839: Tcc_I ta icc_or_xcc, %r0 + 181 | |
3577 | debug_0_325: | |
3578 | setx debug_0_325 + 64, %r11, %r19 | |
3579 | mov 0x38, %r18 | |
3580 | .word 0xe6f00b12 ! 840: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3581 | .word 0xab810011 ! 841: WR_CLEAR_SOFTINT_R wr %r4, %r17, %clear_softint | |
3582 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_326)) -> intp(0,0,11) | |
3583 | intvec_0_326: | |
3584 | .word 0x39400001 ! 842: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3585 | .word 0x81b01021 ! 843: SIAM siam 1 | |
3586 | .word 0xa7464000 ! 844: RD_STICK_CMPR_REG rd %-, %r19 | |
3587 | debug_0_327: | |
3588 | mov 8, %r18 | |
3589 | .word 0xe2f00852 ! 845: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
3590 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_328)) -> intp(0,1,3) | |
3591 | xir_0_328: | |
3592 | .word 0xa9836001 ! 846: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
3593 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_329)) -> intp(0,1,3) | |
3594 | xir_0_329: | |
3595 | .word 0xa9852001 ! 847: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
3596 | DS_0_330: | |
3597 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3598 | allclean | |
3599 | .word 0xa1b1430b ! 848: ALIGNADDRESS alignaddr %r5, %r11, %r16 | |
3600 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_331)) -> intp(0,1,3) | |
3601 | xir_0_331: | |
3602 | .word 0xa9852001 ! 849: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
3603 | debug_0_332: | |
3604 | mov 0x38, %r18 | |
3605 | .word 0xfef00b12 ! 850: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3606 | .word 0xe08fe010 ! 851: LDUBA_I lduba [%r31, + 0x0010] %asi, %r16 | |
3607 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_333)) -> intp(0,1,3) | |
3608 | xir_0_333: | |
3609 | .word 0xa982a001 ! 852: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
3610 | .word 0x8d9036db ! 853: WRPR_PSTATE_I wrpr %r0, 0x16db, %pstate | |
3611 | .word 0xe047c000 ! 854: LDSW_R ldsw [%r31 + %r0], %r16 | |
3612 | .word 0x8d902d61 ! 855: WRPR_PSTATE_I wrpr %r0, 0x0d61, %pstate | |
3613 | DS_0_334: | |
3614 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3615 | .word 0xdb346001 ! 1: STQF_I - %f13, [0x0001, %r17] | |
3616 | normalw | |
3617 | .word 0x85458000 ! 856: RD_SOFTINT_REG rd %softint, %r2 | |
3618 | set 0x35a2458, %r28 | |
3619 | stxa %r28, [%g0] 0x73 | |
3620 | intvec_0_335: | |
3621 | .word 0x39400001 ! 857: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3622 | .word 0xc40fe001 ! 858: LDUB_I ldub [%r31 + 0x0001], %r2 | |
3623 | DS_0_336: | |
3624 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3625 | .word 0xd1318006 ! 1: STQF_R - %f8, [%r6, %r6] | |
3626 | normalw | |
3627 | .word 0x83458000 ! 859: RD_SOFTINT_REG rd %softint, %r1 | |
3628 | debug_0_337: | |
3629 | setx debug_0_337 + 64, %r11, %r19 | |
3630 | mov 0x38, %r18 | |
3631 | .word 0xe6f00b12 ! 860: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3632 | .word 0xc397e001 ! 861: LDQFA_I - [%r31, 0x0001], %f1 | |
3633 | .word 0xc31fc000 ! 862: LDDF_R ldd [%r31, %r0], %f1 | |
3634 | tagged_0_338: | |
3635 | tsubcctv %r26, 0x1030, %r14 | |
3636 | .word 0xc207e001 ! 863: LDUW_I lduw [%r31 + 0x0001], %r1 | |
3637 | .word 0xc21fe001 ! 864: LDD_I ldd [%r31 + 0x0001], %r1 | |
3638 | nop | |
3639 | mov 0x80, %g3 | |
3640 | stxa %g3, [%g3] 0x57 | |
3641 | .word 0xc25fc000 ! 865: LDX_R ldx [%r31 + %r0], %r1 | |
3642 | nop | |
3643 | mov 0x80, %g3 | |
3644 | stxa %g3, [%g3] 0x57 | |
3645 | .word 0xc25fc000 ! 866: LDX_R ldx [%r31 + %r0], %r1 | |
3646 | .word 0xc24fc000 ! 867: LDSB_R ldsb [%r31 + %r0], %r1 | |
3647 | .word 0xc397e001 ! 868: LDQFA_I - [%r31, 0x0001], %f1 | |
3648 | set 0x913860c7, %r28 | |
3649 | stxa %r28, [%g0] 0x73 | |
3650 | intvec_0_339: | |
3651 | .word 0x39400001 ! 869: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3652 | .word 0xc227c006 ! 870: STW_R stw %r1, [%r31 + %r6] | |
3653 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_340)) -> intp(0,0,18) | |
3654 | intvec_0_340: | |
3655 | .word 0x39400001 ! 871: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3656 | mondo_0_341: | |
3657 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3658 | ||
3659 | stxa %r20, [%r0+0x3c0] %asi | |
3660 | .word 0x9d940013 ! 872: WRPR_WSTATE_R wrpr %r16, %r19, %wstate | |
3661 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_342)) -> intp(0,1,3) | |
3662 | xir_0_342: | |
3663 | .word 0xa981a001 ! 873: WR_SET_SOFTINT_I wr %r6, 0x0001, %set_softint | |
3664 | .word 0xa190200c ! 874: WRPR_GL_I wrpr %r0, 0x000c, %- | |
3665 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
3666 | ta T_CHANGE_NONHPRIV ! macro | |
3667 | .word 0x9ba01970 ! 875: FqTOd dis not found | |
3668 | ||
3669 | .word 0x8d802000 ! 876: WRFPRS_I wr %r0, 0x0000, %fprs | |
3670 | .word 0xdad00e80 ! 877: LDSHA_R ldsha [%r0, %r0] 0x74, %r13 | |
3671 | debug_0_344: | |
3672 | mov 0x38, %r18 | |
3673 | .word 0xfef00b12 ! 878: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3674 | .word 0xa190200d ! 879: WRPR_GL_I wrpr %r0, 0x000d, %- | |
3675 | set 0xa6978d87, %r28 | |
3676 | stxa %r28, [%g0] 0x73 | |
3677 | intvec_0_345: | |
3678 | .word 0x39400001 ! 880: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3679 | .word 0x87802058 ! 881: WRASI_I wr %r0, 0x0058, %asi | |
3680 | .word 0xda0fe001 ! 882: LDUB_I ldub [%r31 + 0x0001], %r13 | |
3681 | .word 0xa1540000 ! 883: RDPR_GL rdpr %-, %r16 | |
3682 | .word 0xa1902007 ! 884: WRPR_GL_I wrpr %r0, 0x0007, %- | |
3683 | .word 0xe11fc000 ! 885: LDDF_R ldd [%r31, %r0], %f16 | |
3684 | splash_cmpr_0_346: | |
3685 | setx 0x2e0058ca2dce7dcd, %g2, %g1 | |
3686 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3687 | sub %g1, 100, %g1 | |
3688 | .word 0xb1800001 ! 886: WR_STICK_REG_R wr %r0, %r1, %- | |
3689 | .word 0x91d02033 ! 887: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3690 | DS_0_347: | |
3691 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3692 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3693 | .word 0x89a00551 ! 1: FSQRTd fsqrt | |
3694 | .word 0x8da4c834 ! 888: FADDs fadds %f19, %f20, %f6 | |
3695 | .word 0xccc7e000 ! 889: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r6 | |
3696 | debug_0_348: | |
3697 | mov 8, %r18 | |
3698 | .word 0xd4f00852 ! 890: STXA_R stxa %r10, [%r0 + %r18] 0x42 | |
3699 | splash_lsu_0_349: | |
3700 | setx 0x6e2b3fa7be8eec31, %r1, %r2 | |
3701 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3702 | .word 0x3d400001 ! 891: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3703 | nop | |
3704 | mov 0x80, %g3 | |
3705 | stxa %g3, [%g3] 0x5f | |
3706 | .word 0xcc5fc000 ! 892: LDX_R ldx [%r31 + %r0], %r6 | |
3707 | .word 0xcc07c000 ! 893: LDUW_R lduw [%r31 + %r0], %r6 | |
3708 | splash_tba_0_350: | |
3709 | set 0x120000, %r2 | |
3710 | st %r1, [%r2+%r0] | |
3711 | ta T_CHANGE_PRIV | |
3712 | set 0x120000, %r2 | |
3713 | .word 0x8b900002 ! 894: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3714 | .word 0x88d0c002 ! 895: UMULcc_R umulcc %r3, %r2, %r4 | |
3715 | .word 0x81982697 ! 896: WRHPR_HPSTATE_I wrhpr %r0, 0x0697, %hpstate | |
3716 | .word 0x22800001 ! 897: BE be,a <label_0x1> | |
3717 | .word 0xc84fc000 ! 898: LDSB_R ldsb [%r31 + %r0], %r4 | |
3718 | debug_0_351: | |
3719 | mov 8, %r18 | |
3720 | .word 0xe8f00852 ! 899: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
3721 | mondo_0_352: | |
3722 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3723 | ||
3724 | stxa %r3, [%r0+0x3d0] %asi | |
3725 | .word 0x9d914004 ! 900: WRPR_WSTATE_R wrpr %r5, %r4, %wstate | |
3726 | splash_cmpr_0_353: | |
3727 | setx 0x2d5831d64febbde9, %g2, %g1 | |
3728 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3729 | sub %g1, 100, %g1 | |
3730 | .word 0xb1800001 ! 901: WR_STICK_REG_R wr %r0, %r1, %- | |
3731 | .word 0x8f45c000 ! 902: RD_TICK_CMPR_REG rd %-, %r7 | |
3732 | .word 0x99902004 ! 903: WRPR_CLEANWIN_I wrpr %r0, 0x0004, %cleanwin | |
3733 | splash_lsu_0_354: | |
3734 | setx 0xb2d7336185322663, %r1, %r2 | |
3735 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3736 | .word 0x3d400001 ! 904: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3737 | otherw | |
3738 | mov 0xb0, %r30 | |
3739 | .word 0x91d0001e ! 905: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3740 | .word 0xce0fe001 ! 906: LDUB_I ldub [%r31 + 0x0001], %r7 | |
3741 | debug_0_355: | |
3742 | setx debug_0_355 + 64, %r11, %r19 | |
3743 | mov 0x38, %r18 | |
3744 | .word 0xe6f00b12 ! 907: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3745 | splash_cmpr_0_356: | |
3746 | setx 0x37290754f2ebcd14, %g2, %g1 | |
3747 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3748 | sub %g1, 100, %g1 | |
3749 | .word 0xb1800001 ! 908: WR_STICK_REG_R wr %r0, %r1, %- | |
3750 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_357)) -> intp(0,1,3) | |
3751 | xir_0_357: | |
3752 | .word 0xa9846001 ! 909: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
3753 | .word 0xce8008a0 ! 910: LDUWA_R lduwa [%r0, %r0] 0x45, %r7 | |
3754 | .word 0xce1fe001 ! 911: LDD_I ldd [%r31 + 0x0001], %r7 | |
3755 | splash_cmpr_0_358: | |
3756 | setx 0x181429a4b83fda6d, %g2, %g1 | |
3757 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3758 | sub %g1, 100, %g1 | |
3759 | .word 0xb1800001 ! 912: WR_STICK_REG_R wr %r0, %r1, %- | |
3760 | .word 0x8790211c ! 913: WRPR_TT_I wrpr %r0, 0x011c, %tt | |
3761 | .word 0xa190200c ! 914: WRPR_GL_I wrpr %r0, 0x000c, %- | |
3762 | otherw | |
3763 | mov 0xb0, %r30 | |
3764 | .word 0x91d0001e ! 915: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3765 | set 0x701eaf0d, %r28 | |
3766 | stxa %r28, [%g0] 0x73 | |
3767 | intvec_0_359: | |
3768 | .word 0x39400001 ! 916: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3769 | .word 0x87802080 ! 917: WRASI_I wr %r0, 0x0080, %asi | |
3770 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_360)) -> intp(0,0,3) | |
3771 | intvec_0_360: | |
3772 | .word 0x39400001 ! 918: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3773 | .word 0x87802055 ! 919: WRASI_I wr %r0, 0x0055, %asi | |
3774 | splash_cmpr_0_361: | |
3775 | setx 0xdd60aaa3968c9b5c, %g2, %g1 | |
3776 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3777 | sub %g1, 100, %g1 | |
3778 | .word 0xb1800001 ! 920: WR_STICK_REG_R wr %r0, %r1, %- | |
3779 | .word 0x81510000 ! 921: RDPR_TICK <illegal instruction> | |
3780 | .word 0xab848007 ! 922: WR_CLEAR_SOFTINT_R wr %r18, %r7, %clear_softint | |
3781 | .word 0xcf37c007 ! 923: STQF_R - %f7, [%r7, %r31] | |
3782 | .word 0xcedfe010 ! 924: LDXA_I ldxa [%r31, + 0x0010] %asi, %r7 | |
3783 | .word 0xce47c000 ! 925: LDSW_R ldsw [%r31 + %r0], %r7 | |
3784 | .word 0xcf1fc000 ! 926: LDDF_R ldd [%r31, %r0], %f7 | |
3785 | ta T_CHANGE_PRIV ! macro | |
3786 | debug_0_362: | |
3787 | mov 0x38, %r18 | |
3788 | .word 0xfef00b12 ! 928: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3789 | .word 0x91d02035 ! 929: Tcc_I ta icc_or_xcc, %r0 + 53 | |
3790 | otherw | |
3791 | mov 0xb3, %r30 | |
3792 | .word 0x93d0001e ! 930: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3793 | .word 0xa190200e ! 931: WRPR_GL_I wrpr %r0, 0x000e, %- | |
3794 | intveclr_0_363: | |
3795 | set 0x841176a8, %r28 | |
3796 | stxa %r28, [%g0] 0x72 | |
3797 | .word 0x25400001 ! 932: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3798 | nop | |
3799 | mov 0x80, %g3 | |
3800 | stxa %g3, [%g3] 0x5f | |
3801 | .word 0xce5fc000 ! 933: LDX_R ldx [%r31 + %r0], %r7 | |
3802 | .word 0xce5fe001 ! 934: LDX_I ldx [%r31 + 0x0001], %r7 | |
3803 | debug_0_364: | |
3804 | setx debug_0_364 + 64, %r11, %r19 | |
3805 | mov 0x38, %r18 | |
3806 | .word 0xe6f00b12 ! 935: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3807 | DS_0_365: | |
3808 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3809 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3810 | .word 0x8ba00546 ! 1: FSQRTd fsqrt | |
3811 | .word 0xa3a40825 ! 936: FADDs fadds %f16, %f5, %f17 | |
3812 | .word 0x87802004 ! 937: WRASI_I wr %r0, 0x0004, %asi | |
3813 | invalw | |
3814 | mov 0x35, %r30 | |
3815 | .word 0x93d0001e ! 938: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3816 | .word 0x87902036 ! 939: WRPR_TT_I wrpr %r0, 0x0036, %tt | |
3817 | nop | |
3818 | mov 0x80, %g3 | |
3819 | stxa %g3, [%g3] 0x57 | |
3820 | .word 0xe25fc000 ! 940: LDX_R ldx [%r31 + %r0], %r17 | |
3821 | splash_cmpr_0_366: | |
3822 | setx 0xf05702c0c9e92bbb, %g2, %g1 | |
3823 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3824 | sub %g1, 100, %g1 | |
3825 | .word 0xb1800001 ! 941: WR_STICK_REG_R wr %r0, %r1, %- | |
3826 | .word 0x81982257 ! 942: WRHPR_HPSTATE_I wrhpr %r0, 0x0257, %hpstate | |
3827 | nop | |
3828 | mov 0x80, %g3 | |
3829 | stxa %g3, [%g3] 0x5f | |
3830 | .word 0xe25fc000 ! 943: LDX_R ldx [%r31 + %r0], %r17 | |
3831 | .word 0x99902001 ! 944: WRPR_CLEANWIN_I wrpr %r0, 0x0001, %cleanwin | |
3832 | .word 0xe28008a0 ! 945: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
3833 | DS_0_367: | |
3834 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3835 | .word 0xbfe7c000 ! 946: SAVE_R save %r31, %r0, %r31 | |
3836 | .word 0x87902258 ! 947: WRPR_TT_I wrpr %r0, 0x0258, %tt | |
3837 | splash_lsu_0_368: | |
3838 | setx 0x5733524ae02df0d1, %r1, %r2 | |
3839 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3840 | .word 0x3d400001 ! 948: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3841 | debug_0_369: | |
3842 | mov 8, %r18 | |
3843 | .word 0xdef00852 ! 949: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
3844 | .word 0xe23fc005 ! 950: STD_R std %r17, [%r31 + %r5] | |
3845 | .word 0x87802020 ! 951: WRASI_I wr %r0, 0x0020, %asi | |
3846 | tagged_0_370: | |
3847 | tsubcctv %r22, 0x13f7, %r16 | |
3848 | .word 0xe207e001 ! 952: LDUW_I lduw [%r31 + 0x0001], %r17 | |
3849 | .word 0x8d9022ab ! 953: WRPR_PSTATE_I wrpr %r0, 0x02ab, %pstate | |
3850 | .word 0xe277e001 ! 954: STX_I stx %r17, [%r31 + 0x0001] | |
3851 | .word 0x91d02032 ! 955: Tcc_I ta icc_or_xcc, %r0 + 50 | |
3852 | set 0x8935fcb7, %r28 | |
3853 | stxa %r28, [%g0] 0x73 | |
3854 | intvec_0_371: | |
3855 | .word 0x39400001 ! 956: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3856 | .word 0xe257c000 ! 957: LDSH_R ldsh [%r31 + %r0], %r17 | |
3857 | change_to_randtl_0_372: | |
3858 | ta T_CHANGE_PRIV ! macro | |
3859 | done_change_to_randtl_0_372: | |
3860 | .word 0x8f902000 ! 958: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3861 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_373)) -> intp(0,1,3) | |
3862 | xir_0_373: | |
3863 | .word 0xa9842001 ! 959: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
3864 | .word 0xa753c000 ! 960: RDPR_FQ <illegal instruction> | |
3865 | .word 0x879022d3 ! 961: WRPR_TT_I wrpr %r0, 0x02d3, %tt | |
3866 | .word 0x8d802000 ! 962: WRFPRS_I wr %r0, 0x0000, %fprs | |
3867 | .word 0xa3454000 ! 963: RD_CLEAR_SOFTINT rd %clear_softint, %r17 | |
3868 | DS_0_374: | |
3869 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3870 | .xword 0xbd7f1b9d ! Random illegal ? | |
3871 | .word 0x9ba00554 ! 1: FSQRTd fsqrt | |
3872 | .word 0xa1a48824 ! 964: FADDs fadds %f18, %f4, %f16 | |
3873 | .word 0x9f802001 ! 965: SIR sir 0x0001 | |
3874 | splash_lsu_0_375: | |
3875 | setx 0x2446163aa28e0833, %r1, %r2 | |
3876 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3877 | .word 0x3d400001 ! 966: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3878 | DS_0_376: | |
3879 | nop | |
3880 | not %g0, %g2 | |
3881 | jmp %g2 | |
3882 | .word 0x9d902003 ! 967: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
3883 | .word 0xe08804a0 ! 968: LDUBA_R lduba [%r0, %r0] 0x25, %r16 | |
3884 | .word 0xe08008a0 ! 969: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
3885 | .word 0x819825d7 ! 970: WRHPR_HPSTATE_I wrhpr %r0, 0x05d7, %hpstate | |
3886 | .word 0x8945c000 ! 971: RD_TICK_CMPR_REG rd %-, %r4 | |
3887 | splash_cmpr_0_377: | |
3888 | setx 0x9564bb84384527f0, %g2, %g1 | |
3889 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3890 | sub %g1, 100, %g1 | |
3891 | .word 0xb1800001 ! 972: WR_STICK_REG_R wr %r0, %r1, %- | |
3892 | .word 0x8d9030af ! 973: WRPR_PSTATE_I wrpr %r0, 0x10af, %pstate | |
3893 | mondo_0_378: | |
3894 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3895 | ||
3896 | stxa %r6, [%r0+0x3e0] %asi | |
3897 | .word 0x9d948001 ! 974: WRPR_WSTATE_R wrpr %r18, %r1, %wstate | |
3898 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3899 | ta T_CHANGE_NONHPRIV ! macro | |
3900 | .word 0x8d6b6001 ! 975: SDIVX_I sdivx %r13, 0x0001, %r6 | |
3901 | .word 0x99902002 ! 976: WRPR_CLEANWIN_I wrpr %r0, 0x0002, %cleanwin | |
3902 | nop | |
3903 | mov 0x80, %g3 | |
3904 | stxa %g3, [%g3] 0x5f | |
3905 | .word 0xcc5fc000 ! 977: LDX_R ldx [%r31 + %r0], %r6 | |
3906 | .word 0x9f802001 ! 978: SIR sir 0x0001 | |
3907 | splash_tba_0_380: | |
3908 | set 0x120000, %r2 | |
3909 | st %r1, [%r2+%r0] | |
3910 | ta T_CHANGE_PRIV | |
3911 | set 0x120000, %r2 | |
3912 | .word 0x8b900002 ! 979: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3913 | splash_cmpr_0_381: | |
3914 | setx 0xcefc3e9a88b0cf75, %g2, %g1 | |
3915 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3916 | sub %g1, 100, %g1 | |
3917 | .word 0xb1800001 ! 980: WR_STICK_REG_R wr %r0, %r1, %- | |
3918 | .word 0xcc3fe001 ! 981: STD_I std %r6, [%r31 + 0x0001] | |
3919 | .word 0x87902321 ! 982: WRPR_TT_I wrpr %r0, 0x0321, %tt | |
3920 | .word 0x8d903e6f ! 983: WRPR_PSTATE_I wrpr %r0, 0x1e6f, %pstate | |
3921 | .word 0x93902004 ! 984: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
3922 | change_to_randtl_0_382: | |
3923 | ta T_CHANGE_PRIV ! macro | |
3924 | done_change_to_randtl_0_382: | |
3925 | .word 0x8f902002 ! 985: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3926 | tagged_0_383: | |
3927 | taddcctv %r9, 0x17bb, %r8 | |
3928 | .word 0xcc07e001 ! 986: LDUW_I lduw [%r31 + 0x0001], %r6 | |
3929 | intveclr_0_384: | |
3930 | set 0xf9cb6b47, %r28 | |
3931 | stxa %r28, [%g0] 0x72 | |
3932 | .word 0x25400001 ! 987: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3933 | tagged_0_385: | |
3934 | taddcctv %r7, 0x1315, %r4 | |
3935 | .word 0xcc07e001 ! 988: LDUW_I lduw [%r31 + 0x0001], %r6 | |
3936 | .word 0x87902292 ! 989: WRPR_TT_I wrpr %r0, 0x0292, %tt | |
3937 | .word 0x93d020b5 ! 990: Tcc_I tne icc_or_xcc, %r0 + 181 | |
3938 | .word 0x99902000 ! 991: WRPR_CLEANWIN_I wrpr %r0, 0x0000, %cleanwin | |
3939 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_386)) -> intp(0,1,3) | |
3940 | xir_0_386: | |
3941 | .word 0xa9846001 ! 992: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
3942 | .word 0x8d90221d ! 993: WRPR_PSTATE_I wrpr %r0, 0x021d, %pstate | |
3943 | .word 0xa1902004 ! 994: WRPR_GL_I wrpr %r0, 0x0004, %- | |
3944 | .word 0x9f802001 ! 995: SIR sir 0x0001 | |
3945 | set 0x34181f9, %r28 | |
3946 | stxa %r28, [%g0] 0x73 | |
3947 | intvec_0_387: | |
3948 | .word 0x39400001 ! 996: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3949 | .word 0xcc57c000 ! 997: LDSH_R ldsh [%r31 + %r0], %r6 | |
3950 | DS_0_388: | |
3951 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3952 | .word 0xbfe7c000 ! 998: SAVE_R save %r31, %r0, %r31 | |
3953 | .word 0x8d802004 ! 999: WRFPRS_I wr %r0, 0x0004, %fprs | |
3954 | .word 0xa1902006 ! 1000: WRPR_GL_I wrpr %r0, 0x0006, %- | |
3955 | .word 0x91d02035 ! 1001: Tcc_I ta icc_or_xcc, %r0 + 53 | |
3956 | otherw | |
3957 | mov 0x35, %r30 | |
3958 | .word 0x93d0001e ! 1002: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3959 | splash_lsu_0_389: | |
3960 | setx 0x880eeaef6e582169, %r1, %r2 | |
3961 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3962 | .word 0x3d400001 ! 1003: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3963 | invalw | |
3964 | mov 0x33, %r30 | |
3965 | .word 0x91d0001e ! 1004: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3966 | .word 0xcd1fc000 ! 1005: LDDF_R ldd [%r31, %r0], %f6 | |
3967 | invalw | |
3968 | mov 0x30, %r30 | |
3969 | .word 0x93d0001e ! 1006: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3970 | .word 0xcc8008a0 ! 1007: LDUWA_R lduwa [%r0, %r0] 0x45, %r6 | |
3971 | debug_0_390: | |
3972 | mov 8, %r18 | |
3973 | .word 0xe8f00852 ! 1008: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
3974 | debug_0_391: | |
3975 | setx debug_0_391 + 64, %r11, %r19 | |
3976 | mov 0x38, %r18 | |
3977 | .word 0xe6f00b12 ! 1009: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3978 | .word 0x8790204f ! 1010: WRPR_TT_I wrpr %r0, 0x004f, %tt | |
3979 | nop | |
3980 | mov 0x80, %g3 | |
3981 | stxa %g3, [%g3] 0x57 | |
3982 | .word 0xcc5fc000 ! 1011: LDX_R ldx [%r31 + %r0], %r6 | |
3983 | .word 0xa681400c ! 1012: ADDcc_R addcc %r5, %r12, %r19 | |
3984 | .word 0x91d02033 ! 1013: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3985 | mondo_0_392: | |
3986 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3987 | ||
3988 | stxa %r16, [%r0+0x3c0] %asi | |
3989 | .word 0x9d920000 ! 1014: WRPR_WSTATE_R wrpr %r8, %r0, %wstate | |
3990 | tagged_0_393: | |
3991 | taddcctv %r5, 0x1da6, %r4 | |
3992 | .word 0xe607e001 ! 1015: LDUW_I lduw [%r31 + 0x0001], %r19 | |
3993 | invalw | |
3994 | mov 0x32, %r30 | |
3995 | .word 0x91d0001e ! 1016: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3996 | .word 0x8790210f ! 1017: WRPR_TT_I wrpr %r0, 0x010f, %tt | |
3997 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_394)) -> intp(0,0,6) | |
3998 | intvec_0_394: | |
3999 | .word 0x39400001 ! 1018: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4000 | .word 0x87802063 ! 1019: WRASI_I wr %r0, 0x0063, %asi | |
4001 | splash_cmpr_0_395: | |
4002 | setx 0xa8657ea9d926d301, %g2, %g1 | |
4003 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
4004 | sub %g1, 100, %g1 | |
4005 | .word 0xb1800001 ! 1020: WR_STICK_REG_R wr %r0, %r1, %- | |
4006 | .word 0x91d02032 ! 1021: Tcc_I ta icc_or_xcc, %r0 + 50 | |
4007 | .word 0xe607c000 ! 1022: LDUW_R lduw [%r31 + %r0], %r19 | |
4008 | .word 0x87802004 ! 1023: WRASI_I wr %r0, 0x0004, %asi | |
4009 | .word 0x87802088 ! 1024: WRASI_I wr %r0, 0x0088, %asi | |
4010 | nop | |
4011 | mov 0x80, %g3 | |
4012 | stxa %g3, [%g3] 0x5f | |
4013 | .word 0xe65fc000 ! 1025: LDX_R ldx [%r31 + %r0], %r19 | |
4014 | .word 0xe73fc000 ! 1026: STDF_R std %f19, [%r0, %r31] | |
4015 | DS_0_396: | |
4016 | nop | |
4017 | not %g0, %g2 | |
4018 | jmp %g2 | |
4019 | .word 0x9d902001 ! 1027: WRPR_WSTATE_I wrpr %r0, 0x0001, %wstate | |
4020 | otherw | |
4021 | mov 0xb0, %r30 | |
4022 | .word 0x91d0001e ! 1028: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4023 | tagged_0_397: | |
4024 | taddcctv %r5, 0x18e6, %r3 | |
4025 | .word 0xe607e001 ! 1029: LDUW_I lduw [%r31 + 0x0001], %r19 | |
4026 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_398)) -> intp(0,1,3) | |
4027 | xir_0_398: | |
4028 | .word 0xa9852001 ! 1030: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
4029 | set 0xd4c69447, %r28 | |
4030 | stxa %r28, [%g0] 0x73 | |
4031 | intvec_0_399: | |
4032 | .word 0x39400001 ! 1031: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4033 | ta T_CHANGE_HPRIV ! macro | |
4034 | .word 0x88d9800c ! 1033: SMULcc_R smulcc %r6, %r12, %r4 | |
4035 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
4036 | ta T_CHANGE_NONPRIV ! macro | |
4037 | .word 0xa3a01972 ! 1034: FqTOd dis not found | |
4038 | ||
4039 | tagged_0_401: | |
4040 | taddcctv %r25, 0x1dc7, %r7 | |
4041 | .word 0xe207e001 ! 1035: LDUW_I lduw [%r31 + 0x0001], %r17 | |
4042 | .word 0xe20fc000 ! 1036: LDUB_R ldub [%r31 + %r0], %r17 | |
4043 | splash_cmpr_0_402: | |
4044 | setx 0x8120159d81b61556, %g2, %g1 | |
4045 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4046 | sub %g1, 100, %g1 | |
4047 | .word 0xb1800001 ! 1037: WR_STICK_REG_R wr %r0, %r1, %- | |
4048 | .word 0x8d9022ae ! 1038: WRPR_PSTATE_I wrpr %r0, 0x02ae, %pstate | |
4049 | otherw | |
4050 | mov 0x35, %r30 | |
4051 | .word 0x93d0001e ! 1039: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
4052 | intveclr_0_403: | |
4053 | set 0xa2038746, %r28 | |
4054 | stxa %r28, [%g0] 0x72 | |
4055 | .word 0x25400001 ! 1040: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4056 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_404)) -> intp(0,0,11) | |
4057 | intvec_0_404: | |
4058 | .word 0x39400001 ! 1041: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4059 | .word 0xa190200b ! 1042: WRPR_GL_I wrpr %r0, 0x000b, %- | |
4060 | .word 0xe2c80e60 ! 1043: LDSBA_R ldsba [%r0, %r0] 0x73, %r17 | |
4061 | .word 0xe20fc000 ! 1044: LDUB_R ldub [%r31 + %r0], %r17 | |
4062 | .word 0x87802014 ! 1045: WRASI_I wr %r0, 0x0014, %asi | |
4063 | .word 0xe28fe010 ! 1046: LDUBA_I lduba [%r31, + 0x0010] %asi, %r17 | |
4064 | mondo_0_405: | |
4065 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4066 | ||
4067 | stxa %r12, [%r0+0x3e8] %asi | |
4068 | .word 0x9d94c00a ! 1047: WRPR_WSTATE_R wrpr %r19, %r10, %wstate | |
4069 | .word 0x8b454000 ! 1048: RD_CLEAR_SOFTINT rd %clear_softint, %r5 | |
4070 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_406)) -> intp(0,1,3) | |
4071 | xir_0_406: | |
4072 | .word 0xa9836001 ! 1049: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
4073 | ta T_CHANGE_HPRIV ! macro | |
4074 | tagged_0_407: | |
4075 | taddcctv %r1, 0x189e, %r4 | |
4076 | .word 0xca07e001 ! 1051: LDUW_I lduw [%r31 + 0x0001], %r5 | |
4077 | splash_lsu_0_408: | |
4078 | setx 0x3fa8b165b298cad1, %r1, %r2 | |
4079 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4080 | .word 0x3d400001 ! 1052: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4081 | .word 0xa1902005 ! 1053: WRPR_GL_I wrpr %r0, 0x0005, %- | |
4082 | tagged_0_409: | |
4083 | taddcctv %r17, 0x1119, %r11 | |
4084 | .word 0xca07e001 ! 1054: LDUW_I lduw [%r31 + 0x0001], %r5 | |
4085 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_410)) -> intp(0,0,31) | |
4086 | intvec_0_410: | |
4087 | .word 0x39400001 ! 1055: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4088 | .word 0xcac00e60 ! 1056: LDSWA_R ldswa [%r0, %r0] 0x73, %r5 | |
4089 | .word 0x879021e3 ! 1057: WRPR_TT_I wrpr %r0, 0x01e3, %tt | |
4090 | .word 0xcac7e010 ! 1058: LDSWA_I ldswa [%r31, + 0x0010] %asi, %r5 | |
4091 | .word 0x8d802004 ! 1059: WRFPRS_I wr %r0, 0x0004, %fprs | |
4092 | .word 0xa190200c ! 1060: WRPR_GL_I wrpr %r0, 0x000c, %- | |
4093 | DS_0_411: | |
4094 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4095 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4096 | .word 0x81a00546 ! 1: FSQRTd fsqrt | |
4097 | .word 0x91a0c822 ! 1061: FADDs fadds %f3, %f2, %f8 | |
4098 | debug_0_412: | |
4099 | setx debug_0_412 + 64, %r11, %r19 | |
4100 | mov 0x38, %r18 | |
4101 | .word 0xe6f00b12 ! 1062: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4102 | .word 0xd08fe010 ! 1063: LDUBA_I lduba [%r31, + 0x0010] %asi, %r8 | |
4103 | .word 0xab81c00b ! 1064: WR_CLEAR_SOFTINT_R wr %r7, %r11, %clear_softint | |
4104 | .word 0xd08008a0 ! 1065: LDUWA_R lduwa [%r0, %r0] 0x45, %r8 | |
4105 | otherw | |
4106 | mov 0x30, %r30 | |
4107 | .word 0x91d0001e ! 1066: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4108 | splash_cmpr_0_413: | |
4109 | setx 0x5929810355fc6ae0, %g2, %g1 | |
4110 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
4111 | sub %g1, 100, %g1 | |
4112 | .word 0xb1800001 ! 1067: WR_STICK_REG_R wr %r0, %r1, %- | |
4113 | DS_0_414: | |
4114 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4115 | .word 0xd9348009 ! 1: STQF_R - %f12, [%r9, %r18] | |
4116 | normalw | |
4117 | .word 0x9b458000 ! 1068: RD_SOFTINT_REG rd %softint, %r13 | |
4118 | nop | |
4119 | mov 0x80, %g3 | |
4120 | stxa %g3, [%g3] 0x5f | |
4121 | .word 0xda5fc000 ! 1069: LDX_R ldx [%r31 + %r0], %r13 | |
4122 | set 0xd9cb72aa, %r28 | |
4123 | stxa %r28, [%g0] 0x73 | |
4124 | intvec_0_415: | |
4125 | .word 0x39400001 ! 1070: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4126 | .word 0xa1902004 ! 1071: WRPR_GL_I wrpr %r0, 0x0004, %- | |
4127 | .word 0x879023a9 ! 1072: WRPR_TT_I wrpr %r0, 0x03a9, %tt | |
4128 | DS_0_416: | |
4129 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4130 | .word 0xbfefc000 ! 1073: RESTORE_R restore %r31, %r0, %r31 | |
4131 | .word 0x93d020b2 ! 1074: Tcc_I tne icc_or_xcc, %r0 + 178 | |
4132 | .word 0xda8008a0 ! 1075: LDUWA_R lduwa [%r0, %r0] 0x45, %r13 | |
4133 | .word 0x93902001 ! 1076: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
4134 | .word 0x28700001 ! 1077: BPLEU <illegal instruction> | |
4135 | DS_0_417: | |
4136 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4137 | .word 0xe3348010 ! 1: STQF_R - %f17, [%r16, %r18] | |
4138 | normalw | |
4139 | .word 0xa5458000 ! 1078: RD_SOFTINT_REG rd %softint, %r18 | |
4140 | .word 0x87902264 ! 1079: WRPR_TT_I wrpr %r0, 0x0264, %tt | |
4141 | .word 0x93d020b2 ! 1080: Tcc_I tne icc_or_xcc, %r0 + 178 | |
4142 | .word 0xe4c7e020 ! 1081: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r18 | |
4143 | debug_0_418: | |
4144 | setx debug_0_418 + 64, %r11, %r19 | |
4145 | mov 0x38, %r18 | |
4146 | .word 0xe6f00b12 ! 1082: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4147 | .word 0xad81a001 ! 1083: WR_SOFTINT_REG_I wr %r6, 0x0001, %softint | |
4148 | .word 0x8d903e2e ! 1084: WRPR_PSTATE_I wrpr %r0, 0x1e2e, %pstate | |
4149 | .word 0x87802080 ! 1085: WRASI_I wr %r0, 0x0080, %asi | |
4150 | debug_0_419: | |
4151 | mov 0x38, %r18 | |
4152 | .word 0xfef00b12 ! 1086: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4153 | DS_0_420: | |
4154 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
4155 | .word 0xbfe7c000 ! 1087: SAVE_R save %r31, %r0, %r31 | |
4156 | DS_0_421: | |
4157 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4158 | .word 0xd1348011 ! 1: STQF_R - %f8, [%r17, %r18] | |
4159 | normalw | |
4160 | .word 0x9b458000 ! 1088: RD_SOFTINT_REG rd %softint, %r13 | |
4161 | .word 0x8d903e6a ! 1089: WRPR_PSTATE_I wrpr %r0, 0x1e6a, %pstate | |
4162 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_422)) -> intp(0,0,23) | |
4163 | intvec_0_422: | |
4164 | .word 0x39400001 ! 1090: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4165 | otherw | |
4166 | mov 0xb1, %r30 | |
4167 | .word 0x91d0001e ! 1091: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4168 | .word 0x2a800001 ! 1092: BCS bcs,a <label_0x1> | |
4169 | .word 0x8d902aef ! 1093: WRPR_PSTATE_I wrpr %r0, 0x0aef, %pstate | |
4170 | nop | |
4171 | mov 0x80, %g3 | |
4172 | stxa %g3, [%g3] 0x5f | |
4173 | .word 0xda5fc000 ! 1094: LDX_R ldx [%r31 + %r0], %r13 | |
4174 | .word 0x87802088 ! 1095: WRASI_I wr %r0, 0x0088, %asi | |
4175 | nop | |
4176 | mov 0x80, %g3 | |
4177 | stxa %g3, [%g3] 0x57 | |
4178 | .word 0xda5fc000 ! 1096: LDX_R ldx [%r31 + %r0], %r13 | |
4179 | change_to_randtl_0_423: | |
4180 | ta T_CHANGE_HPRIV ! macro | |
4181 | done_change_to_randtl_0_423: | |
4182 | .word 0x8f902003 ! 1097: WRPR_TL_I wrpr %r0, 0x0003, %tl | |
4183 | debug_0_424: | |
4184 | setx debug_0_424 + 64, %r11, %r19 | |
4185 | mov 0x38, %r18 | |
4186 | .word 0xe6f00b12 ! 1098: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4187 | .word 0x81540000 ! 1099: RDPR_GL rdpr %-, %r0 | |
4188 | .word 0xc04fe001 ! 1100: LDSB_I ldsb [%r31 + 0x0001], %r0 | |
4189 | nop | |
4190 | mov 0x80, %g3 | |
4191 | stxa %g3, [%g3] 0x57 | |
4192 | .word 0xc05fc000 ! 1101: LDX_R ldx [%r31 + %r0], %r0 | |
4193 | .word 0x93d02035 ! 1102: Tcc_I tne icc_or_xcc, %r0 + 53 | |
4194 | .word 0x93480000 ! 1103: RDHPR_HPSTATE rdhpr %hpstate, %r9 | |
4195 | tagged_0_425: | |
4196 | taddcctv %r12, 0x12b0, %r18 | |
4197 | .word 0xd207e001 ! 1104: LDUW_I lduw [%r31 + 0x0001], %r9 | |
4198 | .word 0x81460000 ! 1105: RD_STICK_REG stbar | |
4199 | .word 0x8d9023bd ! 1106: WRPR_PSTATE_I wrpr %r0, 0x03bd, %pstate | |
4200 | splash_cmpr_0_426: | |
4201 | setx 0x32fe8b99682c40b8, %g2, %g1 | |
4202 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4203 | sub %g1, 100, %g1 | |
4204 | .word 0xb1800001 ! 1107: WR_STICK_REG_R wr %r0, %r1, %- | |
4205 | .word 0x93540000 ! 1108: RDPR_GL <illegal instruction> | |
4206 | .word 0x34700001 ! 1109: BPG <illegal instruction> | |
4207 | .word 0x93d02032 ! 1110: Tcc_I tne icc_or_xcc, %r0 + 50 | |
4208 | splash_tba_0_427: | |
4209 | set 0x120000, %r2 | |
4210 | ld [%r2+%r0], %r1 | |
4211 | ta T_CHANGE_PRIV | |
4212 | set 0x120000, %r2 | |
4213 | .word 0x8b900002 ! 1111: WRPR_TBA_R wrpr %r0, %r2, %tba | |
4214 | .word 0xd297e010 ! 1112: LDUHA_I lduha [%r31, + 0x0010] %asi, %r9 | |
4215 | .word 0xd327c011 ! 1113: STF_R st %f9, [%r17, %r31] | |
4216 | debug_0_428: | |
4217 | mov 0x38, %r18 | |
4218 | .word 0xfef00b12 ! 1114: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4219 | .word 0x91912001 ! 1115: WRPR_PIL_I wrpr %r4, 0x0001, %pil | |
4220 | .word 0x91d02032 ! 1116: Tcc_I ta icc_or_xcc, %r0 + 50 | |
4221 | tagged_0_429: | |
4222 | taddcctv %r16, 0x1455, %r10 | |
4223 | .word 0xd207e001 ! 1117: LDUW_I lduw [%r31 + 0x0001], %r9 | |
4224 | splash_tba_0_430: | |
4225 | set 0x120000, %r2 | |
4226 | st %r1, [%r2+%r0] | |
4227 | ta T_CHANGE_PRIV | |
4228 | set 0x120000, %r2 | |
4229 | .word 0x8b900002 ! 1118: WRPR_TBA_R wrpr %r0, %r2, %tba | |
4230 | .word 0xd29fc020 ! 1119: LDDA_R ldda [%r31, %r0] 0x01, %r9 | |
4231 | .word 0x91d020b5 ! 1120: Tcc_I ta icc_or_xcc, %r0 + 181 | |
4232 | .word 0x8d9025e1 ! 1121: WRPR_PSTATE_I wrpr %r0, 0x05e1, %pstate | |
4233 | debug_0_431: | |
4234 | mov 0x38, %r18 | |
4235 | .word 0xfef00b12 ! 1122: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4236 | .word 0x81982ed6 ! 1123: WRHPR_HPSTATE_I wrhpr %r0, 0x0ed6, %hpstate | |
4237 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_432)) -> intp(0,1,3) | |
4238 | xir_0_432: | |
4239 | .word 0xa981a001 ! 1124: WR_SET_SOFTINT_I wr %r6, 0x0001, %set_softint | |
4240 | .word 0x87802004 ! 1125: WRASI_I wr %r0, 0x0004, %asi | |
4241 | splash_lsu_0_433: | |
4242 | setx 0xc0bdd1a4d4f0819f, %r1, %r2 | |
4243 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4244 | .word 0x3d400001 ! 1126: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4245 | debug_0_434: | |
4246 | mov 0x38, %r18 | |
4247 | .word 0xfef00b12 ! 1127: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4248 | intveclr_0_435: | |
4249 | set 0x185356b4, %r28 | |
4250 | stxa %r28, [%g0] 0x72 | |
4251 | .word 0x25400001 ! 1128: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4252 | .word 0x87802010 ! 1129: WRASI_I wr %r0, 0x0010, %asi | |
4253 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_436)) -> intp(0,0,30) | |
4254 | intvec_0_436: | |
4255 | .word 0x39400001 ! 1130: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4256 | nop | |
4257 | mov 0x80, %g3 | |
4258 | stxa %g3, [%g3] 0x5f | |
4259 | .word 0xd25fc000 ! 1131: LDX_R ldx [%r31 + %r0], %r9 | |
4260 | .word 0xd28008a0 ! 1132: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 | |
4261 | .word 0xd2c004a0 ! 1133: LDSWA_R ldswa [%r0, %r0] 0x25, %r9 | |
4262 | ta T_CHANGE_PRIV ! macro | |
4263 | .word 0x87802016 ! 1135: WRASI_I wr %r0, 0x0016, %asi | |
4264 | .word 0xa1902003 ! 1136: WRPR_GL_I wrpr %r0, 0x0003, %- | |
4265 | .word 0xd207c000 ! 1137: LDUW_R lduw [%r31 + %r0], %r9 | |
4266 | .word 0x8d903b1c ! 1138: WRPR_PSTATE_I wrpr %r0, 0x1b1c, %pstate | |
4267 | .word 0xd327c011 ! 1139: STF_R st %f9, [%r17, %r31] | |
4268 | nop | |
4269 | mov 0x80, %g3 | |
4270 | stxa %g3, [%g3] 0x57 | |
4271 | .word 0xd25fc000 ! 1140: LDX_R ldx [%r31 + %r0], %r9 | |
4272 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_437)) -> intp(0,1,3) | |
4273 | xir_0_437: | |
4274 | .word 0xa982a001 ! 1141: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
4275 | debug_0_438: | |
4276 | mov 8, %r18 | |
4277 | .word 0xdcf00852 ! 1142: STXA_R stxa %r14, [%r0 + %r18] 0x42 | |
4278 | .word 0x26700001 ! 1143: BPL <illegal instruction> | |
4279 | nop | |
4280 | mov 0x80, %g3 | |
4281 | stxa %g3, [%g3] 0x5f | |
4282 | .word 0xd25fc000 ! 1144: LDX_R ldx [%r31 + %r0], %r9 | |
4283 | .word 0x81510000 ! 1145: RDPR_TICK rdpr %tick, %r0 | |
4284 | .word 0xd2d804a0 ! 1146: LDXA_R ldxa [%r0, %r0] 0x25, %r9 | |
4285 | .word 0x83454000 ! 1147: RD_CLEAR_SOFTINT rd %clear_softint, %r1 | |
4286 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_439)) -> intp(0,1,3) | |
4287 | xir_0_439: | |
4288 | .word 0xa984e001 ! 1148: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
4289 | .word 0x8d9021b5 ! 1149: WRPR_PSTATE_I wrpr %r0, 0x01b5, %pstate | |
4290 | .word 0xa1902008 ! 1150: WRPR_GL_I wrpr %r0, 0x0008, %- | |
4291 | .word 0xa1902005 ! 1151: WRPR_GL_I wrpr %r0, 0x0005, %- | |
4292 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
4293 | ta T_CHANGE_NONPRIV ! macro | |
4294 | .word 0xa368a001 ! 1152: SDIVX_I sdivx %r2, 0x0001, %r17 | |
4295 | set 0x54203f31, %r28 | |
4296 | stxa %r28, [%g0] 0x73 | |
4297 | intvec_0_441: | |
4298 | .word 0x39400001 ! 1153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4299 | .word 0x93902005 ! 1154: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
4300 | .word 0x93902005 ! 1155: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
4301 | .word 0x99902002 ! 1156: WRPR_CLEANWIN_I wrpr %r0, 0x0002, %cleanwin | |
4302 | .word 0x8d903cc2 ! 1157: WRPR_PSTATE_I wrpr %r0, 0x1cc2, %pstate | |
4303 | DS_0_442: | |
4304 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4305 | .word 0xe5334014 ! 1: STQF_R - %f18, [%r20, %r13] | |
4306 | normalw | |
4307 | .word 0x87458000 ! 1158: RD_SOFTINT_REG rd %softint, %r3 | |
4308 | .word 0xc68fe030 ! 1159: LDUBA_I lduba [%r31, + 0x0030] %asi, %r3 | |
4309 | .word 0x87802020 ! 1160: WRASI_I wr %r0, 0x0020, %asi | |
4310 | .word 0x88850013 ! 1161: ADDcc_R addcc %r20, %r19, %r4 | |
4311 | .word 0xc8d004a0 ! 1162: LDSHA_R ldsha [%r0, %r0] 0x25, %r4 | |
4312 | .word 0xa1540000 ! 1163: RDPR_GL rdpr %-, %r16 | |
4313 | nop | |
4314 | mov 0x80, %g3 | |
4315 | stxa %g3, [%g3] 0x57 | |
4316 | .word 0xe05fc000 ! 1164: LDX_R ldx [%r31 + %r0], %r16 | |
4317 | mondo_0_443: | |
4318 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4319 | ||
4320 | stxa %r4, [%r0+0x3c8] %asi | |
4321 | .word 0x9d910002 ! 1165: WRPR_WSTATE_R wrpr %r4, %r2, %wstate | |
4322 | .word 0xe0800b60 ! 1166: LDUWA_R lduwa [%r0, %r0] 0x5b, %r16 | |
4323 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_444)) -> intp(0,1,3) | |
4324 | xir_0_444: | |
4325 | .word 0xa9842001 ! 1167: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
4326 | .word 0x87802014 ! 1168: WRASI_I wr %r0, 0x0014, %asi | |
4327 | .word 0xe00fe001 ! 1169: LDUB_I ldub [%r31 + 0x0001], %r16 | |
4328 | .word 0x93902001 ! 1170: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
4329 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_445)) -> intp(0,1,3) | |
4330 | xir_0_445: | |
4331 | .word 0xa9816001 ! 1171: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
4332 | .word 0x93902002 ! 1172: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
4333 | splash_lsu_0_446: | |
4334 | setx 0x65c6cde24e4885b1, %r1, %r2 | |
4335 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4336 | .word 0x3d400001 ! 1173: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4337 | debug_0_447: | |
4338 | mov 8, %r18 | |
4339 | .word 0xe2f00852 ! 1174: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
4340 | nop | |
4341 | mov 0x80, %g3 | |
4342 | stxa %g3, [%g3] 0x57 | |
4343 | .word 0xe05fc000 ! 1175: LDX_R ldx [%r31 + %r0], %r16 | |
4344 | .word 0xe0d7e030 ! 1176: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r16 | |
4345 | .word 0xe077e001 ! 1177: STX_I stx %r16, [%r31 + 0x0001] | |
4346 | .word 0xe077e001 ! 1178: STX_I stx %r16, [%r31 + 0x0001] | |
4347 | splash_cmpr_0_448: | |
4348 | setx 0x34d3477836f1e4ab, %g2, %g1 | |
4349 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4350 | sub %g1, 100, %g1 | |
4351 | .word 0xb1800001 ! 1179: WR_STICK_REG_R wr %r0, %r1, %- | |
4352 | .word 0x8d9033ef ! 1180: WRPR_PSTATE_I wrpr %r0, 0x13ef, %pstate | |
4353 | .word 0x9f802001 ! 1181: SIR sir 0x0001 | |
4354 | .word 0xe057e001 ! 1182: LDSH_I ldsh [%r31 + 0x0001], %r16 | |
4355 | .word 0xe047e001 ! 1183: LDSW_I ldsw [%r31 + 0x0001], %r16 | |
4356 | .word 0x87802089 ! 1184: WRASI_I wr %r0, 0x0089, %asi | |
4357 | .word 0xe0c004a0 ! 1185: LDSWA_R ldswa [%r0, %r0] 0x25, %r16 | |
4358 | splash_lsu_0_449: | |
4359 | setx 0x9ccf72fb984f5cb3, %r1, %r2 | |
4360 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4361 | .word 0x3d400001 ! 1186: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4362 | .word 0xad846001 ! 1187: WR_SOFTINT_REG_I wr %r17, 0x0001, %softint | |
4363 | ta T_CHANGE_PRIV ! macro | |
4364 | .word 0x81510000 ! 1189: RDPR_TICK <illegal instruction> | |
4365 | .word 0xe137e001 ! 1190: STQF_I - %f16, [0x0001, %r31] | |
4366 | .word 0xa984c00a ! 1191: WR_SET_SOFTINT_R wr %r19, %r10, %set_softint | |
4367 | splash_lsu_0_450: | |
4368 | setx 0xe869d35513d3899f, %r1, %r2 | |
4369 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4370 | .word 0x3d400001 ! 1192: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4371 | debug_0_451: | |
4372 | setx debug_0_451 + 64, %r11, %r19 | |
4373 | mov 0x38, %r18 | |
4374 | .word 0xe6f00b12 ! 1193: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4375 | invalw | |
4376 | mov 0x35, %r30 | |
4377 | .word 0x83d0001e ! 1194: Tcc_R te icc_or_xcc, %r0 + %r30 | |
4378 | debug_0_452: | |
4379 | mov 0x38, %r18 | |
4380 | .word 0xfef00b12 ! 1195: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4381 | .word 0xa9480000 ! 1196: RDHPR_HPSTATE rdhpr %hpstate, %r20 | |
4382 | tagged_0_453: | |
4383 | taddcctv %r17, 0x14bc, %r19 | |
4384 | .word 0xe807e001 ! 1197: LDUW_I lduw [%r31 + 0x0001], %r20 | |
4385 | DS_0_454: | |
4386 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
4387 | .word 0xe3346001 ! 1: STQF_I - %f17, [0x0001, %r17] | |
4388 | normalw | |
4389 | .word 0x95458000 ! 1198: RD_SOFTINT_REG rd %softint, %r10 | |
4390 | ta T_CHANGE_HPRIV ! macro | |
4391 | debug_0_455: | |
4392 | mov 0x38, %r18 | |
4393 | .word 0xfef00b12 ! 1200: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4394 | .word 0x87802014 ! 1201: WRASI_I wr %r0, 0x0014, %asi | |
4395 | .word 0x87802055 ! 1202: WRASI_I wr %r0, 0x0055, %asi | |
4396 | .word 0x81510000 ! 1203: RDPR_TICK rdpr %tick, %r0 | |
4397 | mondo_0_456: | |
4398 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4399 | ||
4400 | stxa %r17, [%r0+0x3e0] %asi | |
4401 | .word 0x9d940007 ! 1204: WRPR_WSTATE_R wrpr %r16, %r7, %wstate | |
4402 | splash_cmpr_0_457: | |
4403 | setx 0xa976c69e33f1ae36, %g2, %g1 | |
4404 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
4405 | sub %g1, 100, %g1 | |
4406 | .word 0xb1800001 ! 1205: WR_STICK_REG_R wr %r0, %r1, %- | |
4407 | DS_0_458: | |
4408 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4409 | .word 0xd7348011 ! 1: STQF_R - %f11, [%r17, %r18] | |
4410 | normalw | |
4411 | .word 0xa3458000 ! 1206: RD_SOFTINT_REG rd %softint, %r17 | |
4412 | debug_0_459: | |
4413 | mov 8, %r18 | |
4414 | .word 0xdaf00852 ! 1207: STXA_R stxa %r13, [%r0 + %r18] 0x42 | |
4415 | .word 0xa9824013 ! 1208: WR_SET_SOFTINT_R wr %r9, %r19, %set_softint | |
4416 | invalw | |
4417 | mov 0xb4, %r30 | |
4418 | .word 0x91d0001e ! 1209: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4419 | .word 0x8b500000 ! 1210: RDPR_TPC <illegal instruction> | |
4420 | tagged_0_460: | |
4421 | tsubcctv %r25, 0x17c9, %r16 | |
4422 | .word 0xca07e001 ! 1211: LDUW_I lduw [%r31 + 0x0001], %r5 | |
4423 | .word 0xca97e010 ! 1212: LDUHA_I lduha [%r31, + 0x0010] %asi, %r5 | |
4424 | debug_0_461: | |
4425 | mov 0x38, %r18 | |
4426 | .word 0xfef00b12 ! 1213: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4427 | .word 0x8d802000 ! 1214: WRFPRS_I wr %r0, 0x0000, %fprs | |
4428 | invalw | |
4429 | mov 0xb2, %r30 | |
4430 | .word 0x91d0001e ! 1215: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4431 | nop | |
4432 | mov 0x80, %g3 | |
4433 | stxa %g3, [%g3] 0x5f | |
4434 | .word 0xca5fc000 ! 1216: LDX_R ldx [%r31 + %r0], %r5 | |
4435 | mondo_0_462: | |
4436 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4437 | ||
4438 | stxa %r5, [%r0+0x3c0] %asi | |
4439 | .word 0x9d900010 ! 1217: WRPR_WSTATE_R wrpr %r0, %r16, %wstate | |
4440 | debug_0_463: | |
4441 | setx debug_0_463 + 64, %r11, %r19 | |
4442 | mov 0x38, %r18 | |
4443 | .word 0xe6f00b12 ! 1218: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4444 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_464)) -> intp(0,0,26) | |
4445 | intvec_0_464: | |
4446 | .word 0x39400001 ! 1219: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4447 | debug_0_465: | |
4448 | mov 8, %r18 | |
4449 | .word 0xdcf00852 ! 1220: STXA_R stxa %r14, [%r0 + %r18] 0x42 | |
4450 | .word 0xcb1fe001 ! 1221: LDDF_I ldd [%r31, 0x0001], %f5 | |
4451 | invalw | |
4452 | mov 0x34, %r30 | |
4453 | .word 0x91d0001e ! 1222: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4454 | .word 0x87802088 ! 1223: WRASI_I wr %r0, 0x0088, %asi | |
4455 | .word 0x87902211 ! 1224: WRPR_TT_I wrpr %r0, 0x0211, %tt | |
4456 | tagged_0_466: | |
4457 | tsubcctv %r6, 0x1ea9, %r20 | |
4458 | .word 0xca07e001 ! 1225: LDUW_I lduw [%r31 + 0x0001], %r5 | |
4459 | otherw | |
4460 | mov 0xb1, %r30 | |
4461 | .word 0x91d0001e ! 1226: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4462 | .word 0x87802020 ! 1227: WRASI_I wr %r0, 0x0020, %asi | |
4463 | set 0x62d16ed4, %r28 | |
4464 | stxa %r28, [%g0] 0x73 | |
4465 | intvec_0_467: | |
4466 | .word 0x39400001 ! 1228: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4467 | splash_cmpr_0_468: | |
4468 | setx 0x253ebb287b3762ee, %g2, %g1 | |
4469 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4470 | sub %g1, 100, %g1 | |
4471 | .word 0xb1800001 ! 1229: WR_STICK_REG_R wr %r0, %r1, %- | |
4472 | .word 0x81510000 ! 1230: RDPR_TICK <illegal instruction> | |
4473 | splash_lsu_0_469: | |
4474 | setx 0xd2db22aa068218ab, %r1, %r2 | |
4475 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4476 | .word 0x3d400001 ! 1231: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4477 | .word 0xca8008a0 ! 1232: LDUWA_R lduwa [%r0, %r0] 0x45, %r5 | |
4478 | .word 0x93902007 ! 1233: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
4479 | intveclr_0_470: | |
4480 | set 0xe727e933, %r28 | |
4481 | stxa %r28, [%g0] 0x72 | |
4482 | .word 0x25400001 ! 1234: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4483 | nop | |
4484 | mov 0x80, %g3 | |
4485 | stxa %g3, [%g3] 0x5f | |
4486 | .word 0xca5fc000 ! 1235: LDX_R ldx [%r31 + %r0], %r5 | |
4487 | .word 0xca1fc000 ! 1236: LDD_R ldd [%r31 + %r0], %r5 | |
4488 | debug_0_471: | |
4489 | mov 8, %r18 | |
4490 | .word 0xd0f00852 ! 1237: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
4491 | .word 0x93902004 ! 1238: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
4492 | nop | |
4493 | mov 0x80, %g3 | |
4494 | stxa %g3, [%g3] 0x5f | |
4495 | .word 0xca5fc000 ! 1239: LDX_R ldx [%r31 + %r0], %r5 | |
4496 | tagged_0_472: | |
4497 | tsubcctv %r7, 0x1116, %r10 | |
4498 | .word 0xca07e001 ! 1240: LDUW_I lduw [%r31 + 0x0001], %r5 | |
4499 | .word 0x81460000 ! 1241: RD_STICK_REG stbar | |
4500 | .word 0xa190200c ! 1242: WRPR_GL_I wrpr %r0, 0x000c, %- | |
4501 | set 0x241462b4, %r28 | |
4502 | stxa %r28, [%g0] 0x73 | |
4503 | intvec_0_473: | |
4504 | .word 0x39400001 ! 1243: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4505 | .word 0xca4fe001 ! 1244: LDSB_I ldsb [%r31 + 0x0001], %r5 | |
4506 | debug_0_474: | |
4507 | mov 8, %r18 | |
4508 | .word 0xe6f00852 ! 1245: STXA_R stxa %r19, [%r0 + %r18] 0x42 | |
4509 | set 0x26de6ce5, %r28 | |
4510 | stxa %r28, [%g0] 0x73 | |
4511 | intvec_0_475: | |
4512 | .word 0x39400001 ! 1246: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4513 | .word 0x91d02035 ! 1247: Tcc_I ta icc_or_xcc, %r0 + 53 | |
4514 | .word 0x30700001 ! 1248: BPA <illegal instruction> | |
4515 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_476)) -> intp(0,1,3) | |
4516 | xir_0_476: | |
4517 | .word 0xa9802001 ! 1249: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
4518 | .word 0x3e700001 ! 1250: BPVC <illegal instruction> | |
4519 | DS_0_477: | |
4520 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4521 | .word 0xe732400c ! 1: STQF_R - %f19, [%r12, %r9] | |
4522 | normalw | |
4523 | .word 0x83458000 ! 1251: RD_SOFTINT_REG rd %softint, %r1 | |
4524 | .word 0x3a800001 ! 1252: BCC bcc,a <label_0x1> | |
4525 | .word 0x819826c5 ! 1253: WRHPR_HPSTATE_I wrhpr %r0, 0x06c5, %hpstate | |
4526 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_478)) -> intp(0,0,12) | |
4527 | intvec_0_478: | |
4528 | .word 0x39400001 ! 1254: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4529 | .word 0x8790216a ! 1255: WRPR_TT_I wrpr %r0, 0x016a, %tt | |
4530 | .word 0x8198210d ! 1256: WRHPR_HPSTATE_I wrhpr %r0, 0x010d, %hpstate | |
4531 | set 0x765e9ba, %r28 | |
4532 | stxa %r28, [%g0] 0x73 | |
4533 | intvec_0_479: | |
4534 | .word 0x39400001 ! 1257: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4535 | .word 0x9f802001 ! 1258: SIR sir 0x0001 | |
4536 | .word 0x87802014 ! 1259: WRASI_I wr %r0, 0x0014, %asi | |
4537 | debug_0_480: | |
4538 | mov 8, %r18 | |
4539 | .word 0xd0f00852 ! 1260: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
4540 | splash_lsu_0_481: | |
4541 | setx 0xbf7bcbfb8aa9d0cf, %r1, %r2 | |
4542 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4543 | .word 0x3d400001 ! 1261: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4544 | ta T_CHANGE_PRIV ! macro | |
4545 | .word 0x8d9037d7 ! 1263: WRPR_PSTATE_I wrpr %r0, 0x17d7, %pstate | |
4546 | splash_lsu_0_482: | |
4547 | setx 0xb47553479b2deb65, %r1, %r2 | |
4548 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4549 | .word 0x3d400001 ! 1264: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4550 | .word 0x87802020 ! 1265: WRASI_I wr %r0, 0x0020, %asi | |
4551 | splash_cmpr_0_483: | |
4552 | setx 0x725f9dcabfcf5ab0, %g2, %g1 | |
4553 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
4554 | sub %g1, 100, %g1 | |
4555 | .word 0xb1800001 ! 1266: WR_STICK_REG_R wr %r0, %r1, %- | |
4556 | .word 0x8d802000 ! 1267: WRFPRS_I wr %r0, 0x0000, %fprs | |
4557 | tagged_0_484: | |
4558 | tsubcctv %r12, 0x1c08, %r13 | |
4559 | .word 0xc207e001 ! 1268: LDUW_I lduw [%r31 + 0x0001], %r1 | |
4560 | .word 0x879021a7 ! 1269: WRPR_TT_I wrpr %r0, 0x01a7, %tt | |
4561 | DS_0_485: | |
4562 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4563 | .word 0xcf31a001 ! 1: STQF_I - %f7, [0x0001, %r6] | |
4564 | normalw | |
4565 | .word 0x8f458000 ! 1270: RD_SOFTINT_REG rd %softint, %r7 | |
4566 | .word 0xa190200d ! 1271: WRPR_GL_I wrpr %r0, 0x000d, %- | |
4567 | .word 0xce1fe001 ! 1272: LDD_I ldd [%r31 + 0x0001], %r7 | |
4568 | .word 0xce1fe001 ! 1273: LDD_I ldd [%r31 + 0x0001], %r7 | |
4569 | .word 0x9b454000 ! 1274: RD_CLEAR_SOFTINT rd %clear_softint, %r13 | |
4570 | splash_lsu_0_486: | |
4571 | setx 0x659da0c93ee9bab7, %r1, %r2 | |
4572 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4573 | .word 0x3d400001 ! 1275: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4574 | mondo_0_487: | |
4575 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4576 | ||
4577 | stxa %r8, [%r0+0x3e0] %asi | |
4578 | .word 0x9d91400b ! 1276: WRPR_WSTATE_R wrpr %r5, %r11, %wstate | |
4579 | splash_lsu_0_488: | |
4580 | setx 0x7573931d7811b05b, %r1, %r2 | |
4581 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4582 | .word 0x3d400001 ! 1277: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4583 | .word 0x91d02035 ! 1278: Tcc_I ta icc_or_xcc, %r0 + 53 | |
4584 | intveclr_0_489: | |
4585 | set 0xa3ce80f9, %r28 | |
4586 | stxa %r28, [%g0] 0x72 | |
4587 | .word 0x25400001 ! 1279: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4588 | tagged_0_490: | |
4589 | tsubcctv %r19, 0x10db, %r21 | |
4590 | .word 0xda07e001 ! 1280: LDUW_I lduw [%r31 + 0x0001], %r13 | |
4591 | DS_0_491: | |
4592 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4593 | .word 0xbfe7c000 ! 1281: SAVE_R save %r31, %r0, %r31 | |
4594 | .word 0xda880e40 ! 1282: LDUBA_R lduba [%r0, %r0] 0x72, %r13 | |
4595 | .word 0xdabfe001 ! 1283: STDA_I stda %r13, [%r31 + 0x0001] %asi | |
4596 | .word 0xa7454000 ! 1284: RD_CLEAR_SOFTINT rd %clear_softint, %r19 | |
4597 | .word 0x94a8c014 ! 1285: ANDNcc_R andncc %r3, %r20, %r10 | |
4598 | .word 0xd48008a0 ! 1286: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
4599 | .word 0x87902270 ! 1287: WRPR_TT_I wrpr %r0, 0x0270, %tt | |
4600 | .word 0x9f802001 ! 1288: SIR sir 0x0001 | |
4601 | .word 0xa1902005 ! 1289: WRPR_GL_I wrpr %r0, 0x0005, %- | |
4602 | intveclr_0_492: | |
4603 | set 0xe5b353a3, %r28 | |
4604 | stxa %r28, [%g0] 0x72 | |
4605 | .word 0x25400001 ! 1290: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4606 | .word 0xd51fc000 ! 1291: LDDF_R ldd [%r31, %r0], %f10 | |
4607 | .word 0xd527e001 ! 1292: STF_I st %f10, [0x0001, %r31] | |
4608 | mondo_0_493: | |
4609 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4610 | ||
4611 | stxa %r3, [%r0+0x3e8] %asi | |
4612 | .word 0x9d948002 ! 1293: WRPR_WSTATE_R wrpr %r18, %r2, %wstate | |
4613 | .word 0xd48804a0 ! 1294: LDUBA_R lduba [%r0, %r0] 0x25, %r10 | |
4614 | .word 0x8d802000 ! 1295: WRFPRS_I wr %r0, 0x0000, %fprs | |
4615 | .word 0x819826d7 ! 1296: WRHPR_HPSTATE_I wrhpr %r0, 0x06d7, %hpstate | |
4616 | .word 0xd4d804a0 ! 1297: LDXA_R ldxa [%r0, %r0] 0x25, %r10 | |
4617 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_494)) -> intp(0,0,9) | |
4618 | intvec_0_494: | |
4619 | .word 0x39400001 ! 1298: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4620 | .word 0xd4d804a0 ! 1299: LDXA_R ldxa [%r0, %r0] 0x25, %r10 | |
4621 | set 0x98b3ddc0, %r28 | |
4622 | stxa %r28, [%g0] 0x73 | |
4623 | intvec_0_495: | |
4624 | .word 0x39400001 ! 1300: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4625 | .word 0x8145c000 ! 1301: RD_TICK_CMPR_REG stbar | |
4626 | .word 0xa3450000 ! 1302: RD_SET_SOFTINT rd %set_softint, %r17 | |
4627 | DS_0_496: | |
4628 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4629 | pdist %f16, %f16, %f6 | |
4630 | .word 0x97b4c313 ! 1303: ALIGNADDRESS alignaddr %r19, %r19, %r11 | |
4631 | .word 0xa3520000 ! 1304: RDPR_PIL rdpr %pil, %r17 | |
4632 | .word 0xe297e020 ! 1305: LDUHA_I lduha [%r31, + 0x0020] %asi, %r17 | |
4633 | tagged_0_497: | |
4634 | taddcctv %r6, 0x181f, %r20 | |
4635 | .word 0xe207e001 ! 1306: LDUW_I lduw [%r31 + 0x0001], %r17 | |
4636 | .word 0xe327c013 ! 1307: STF_R st %f17, [%r19, %r31] | |
4637 | .word 0x3c800001 ! 1308: BPOS bpos,a <label_0x1> | |
4638 | .word 0xe24fe001 ! 1309: LDSB_I ldsb [%r31 + 0x0001], %r17 | |
4639 | .word 0xe2800b40 ! 1310: LDUWA_R lduwa [%r0, %r0] 0x5a, %r17 | |
4640 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
4641 | ta T_CHANGE_NONPRIV ! macro | |
4642 | .word 0x95692001 ! 1311: SDIVX_I sdivx %r4, 0x0001, %r10 | |
4643 | .word 0x8d903b86 ! 1312: WRPR_PSTATE_I wrpr %r0, 0x1b86, %pstate | |
4644 | .word 0x97540000 ! 1313: RDPR_GL rdpr %-, %r11 | |
4645 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_499)) -> intp(0,1,3) | |
4646 | xir_0_499: | |
4647 | .word 0xa980a001 ! 1314: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
4648 | .word 0xd61fc000 ! 1315: LDD_R ldd [%r31 + %r0], %r11 | |
4649 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_500)) -> intp(0,1,3) | |
4650 | xir_0_500: | |
4651 | .word 0xa984a001 ! 1316: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
4652 | .word 0xa0c22001 ! 1317: ADDCcc_I addccc %r8, 0x0001, %r16 | |
4653 | .word 0x9745c000 ! 1318: RD_TICK_CMPR_REG rd %-, %r11 | |
4654 | intveclr_0_501: | |
4655 | set 0x4b2cbeaf, %r28 | |
4656 | stxa %r28, [%g0] 0x72 | |
4657 | .word 0x25400001 ! 1319: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4658 | .word 0x91906001 ! 1320: WRPR_PIL_I wrpr %r1, 0x0001, %pil | |
4659 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_502)) -> intp(0,0,27) | |
4660 | intvec_0_502: | |
4661 | .word 0x39400001 ! 1321: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4662 | .word 0x93902001 ! 1322: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
4663 | otherw | |
4664 | mov 0x32, %r30 | |
4665 | .word 0x91d0001e ! 1323: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4666 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_503)) -> intp(0,1,3) | |
4667 | xir_0_503: | |
4668 | .word 0xa982a001 ! 1324: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
4669 | .word 0xd69fe001 ! 1325: LDDA_I ldda [%r31, + 0x0001] %asi, %r11 | |
4670 | .word 0xd68008a0 ! 1326: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
4671 | .word 0x87902218 ! 1327: WRPR_TT_I wrpr %r0, 0x0218, %tt | |
4672 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_504)) -> intp(0,1,3) | |
4673 | xir_0_504: | |
4674 | .word 0xa9852001 ! 1328: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
4675 | .word 0x8d9033d8 ! 1329: WRPR_PSTATE_I wrpr %r0, 0x13d8, %pstate | |
4676 | splash_cmpr_0_505: | |
4677 | setx 0x498d488a50d2a195, %g2, %g1 | |
4678 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
4679 | sub %g1, 100, %g1 | |
4680 | .word 0xb1800001 ! 1330: WR_STICK_REG_R wr %r0, %r1, %- | |
4681 | nop | |
4682 | mov 0x80, %g3 | |
4683 | stxa %g3, [%g3] 0x5f | |
4684 | .word 0xd65fc000 ! 1331: LDX_R ldx [%r31 + %r0], %r11 | |
4685 | .word 0x83d02033 ! 1332: Tcc_I te icc_or_xcc, %r0 + 51 | |
4686 | .word 0x24700001 ! 1333: BPLE <illegal instruction> | |
4687 | debug_0_506: | |
4688 | mov 0x38, %r18 | |
4689 | .word 0xfef00b12 ! 1334: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4690 | .word 0x93902001 ! 1335: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
4691 | nop | |
4692 | mov 0x80, %g3 | |
4693 | stxa %g3, [%g3] 0x57 | |
4694 | .word 0xd65fc000 ! 1336: LDX_R ldx [%r31 + %r0], %r11 | |
4695 | .word 0xd68804a0 ! 1337: LDUBA_R lduba [%r0, %r0] 0x25, %r11 | |
4696 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_507)) -> intp(0,1,3) | |
4697 | xir_0_507: | |
4698 | .word 0xa9842001 ! 1338: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
4699 | .word 0x87802058 ! 1339: WRASI_I wr %r0, 0x0058, %asi | |
4700 | .word 0x87802080 ! 1340: WRASI_I wr %r0, 0x0080, %asi | |
4701 | .word 0xd69fc020 ! 1341: LDDA_R ldda [%r31, %r0] 0x01, %r11 | |
4702 | .word 0x87802080 ! 1342: WRASI_I wr %r0, 0x0080, %asi | |
4703 | invalw | |
4704 | mov 0x33, %r30 | |
4705 | .word 0x91d0001e ! 1343: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4706 | debug_0_508: | |
4707 | setx debug_0_508 + 64, %r11, %r19 | |
4708 | mov 0x38, %r18 | |
4709 | .word 0xe6f00b12 ! 1344: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4710 | .word 0xd737c013 ! 1345: STQF_R - %f11, [%r19, %r31] | |
4711 | nop | |
4712 | mov 0x80, %g3 | |
4713 | stxa %g3, [%g3] 0x57 | |
4714 | .word 0xd65fc000 ! 1346: LDX_R ldx [%r31 + %r0], %r11 | |
4715 | .word 0x87902061 ! 1347: WRPR_TT_I wrpr %r0, 0x0061, %tt | |
4716 | .word 0xd6d7e020 ! 1348: LDSHA_I ldsha [%r31, + 0x0020] %asi, %r11 | |
4717 | otherw | |
4718 | mov 0xb0, %r30 | |
4719 | .word 0x83d0001e ! 1349: Tcc_R te icc_or_xcc, %r0 + %r30 | |
4720 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_509)) -> intp(0,1,3) | |
4721 | xir_0_509: | |
4722 | .word 0xa9842001 ! 1350: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
4723 | .word 0x9950c000 ! 1351: RDPR_TT <illegal instruction> | |
4724 | nop | |
4725 | mov 0x80, %g3 | |
4726 | stxa %g3, [%g3] 0x57 | |
4727 | .word 0xd85fc000 ! 1352: LDX_R ldx [%r31 + %r0], %r12 | |
4728 | DS_0_510: | |
4729 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4730 | .word 0xbfe7c000 ! 1353: SAVE_R save %r31, %r0, %r31 | |
4731 | .word 0xd8d004a0 ! 1354: LDSHA_R ldsha [%r0, %r0] 0x25, %r12 | |
4732 | .word 0x879023f6 ! 1355: WRPR_TT_I wrpr %r0, 0x03f6, %tt | |
4733 | DS_0_511: | |
4734 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4735 | .word 0xbfe7c000 ! 1356: SAVE_R save %r31, %r0, %r31 | |
4736 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_512)) -> intp(0,1,3) | |
4737 | xir_0_512: | |
4738 | .word 0xa9832001 ! 1357: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
4739 | .word 0xa6c16001 ! 1358: ADDCcc_I addccc %r5, 0x0001, %r19 | |
4740 | splash_cmpr_0_513: | |
4741 | setx 0xea0d8a8888a8eef0, %g2, %g1 | |
4742 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
4743 | sub %g1, 100, %g1 | |
4744 | .word 0xb1800001 ! 1359: WR_STICK_REG_R wr %r0, %r1, %- | |
4745 | .word 0x93d02033 ! 1360: Tcc_I tne icc_or_xcc, %r0 + 51 | |
4746 | .word 0xe637c013 ! 1361: STH_R sth %r19, [%r31 + %r19] | |
4747 | .word 0x8d802004 ! 1362: WRFPRS_I wr %r0, 0x0004, %fprs | |
4748 | debug_0_514: | |
4749 | setx debug_0_514 + 64, %r11, %r19 | |
4750 | mov 0x38, %r18 | |
4751 | .word 0xe6f00b12 ! 1363: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4752 | .word 0x8d902529 ! 1364: WRPR_PSTATE_I wrpr %r0, 0x0529, %pstate | |
4753 | splash_lsu_0_515: | |
4754 | setx 0xc1fb79256ee2ca1f, %r1, %r2 | |
4755 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4756 | .word 0x3d400001 ! 1365: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4757 | .word 0x8790237f ! 1366: WRPR_TT_I wrpr %r0, 0x037f, %tt | |
4758 | .word 0x81982786 ! 1367: WRHPR_HPSTATE_I wrhpr %r0, 0x0786, %hpstate | |
4759 | DS_0_516: | |
4760 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4761 | .word 0xbfe7c000 ! 1368: SAVE_R save %r31, %r0, %r31 | |
4762 | set 0x94a84d0, %r28 | |
4763 | stxa %r28, [%g0] 0x73 | |
4764 | intvec_0_517: | |
4765 | .word 0x39400001 ! 1369: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4766 | invalw | |
4767 | mov 0x30, %r30 | |
4768 | .word 0x91d0001e ! 1370: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4769 | .word 0xab850004 ! 1371: WR_CLEAR_SOFTINT_R wr %r20, %r4, %clear_softint | |
4770 | .word 0xe727e001 ! 1372: STF_I st %f19, [0x0001, %r31] | |
4771 | .word 0xe62fc004 ! 1373: STB_R stb %r19, [%r31 + %r4] | |
4772 | .word 0x8d903b92 ! 1374: WRPR_PSTATE_I wrpr %r0, 0x1b92, %pstate | |
4773 | splash_cmpr_0_518: | |
4774 | setx 0x199193e876fe9a9a, %g2, %g1 | |
4775 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4776 | sub %g1, 100, %g1 | |
4777 | .word 0xb1800001 ! 1375: WR_STICK_REG_R wr %r0, %r1, %- | |
4778 | .word 0x87802088 ! 1376: WRASI_I wr %r0, 0x0088, %asi | |
4779 | debug_0_519: | |
4780 | mov 8, %r18 | |
4781 | .word 0xdcf00852 ! 1377: STXA_R stxa %r14, [%r0 + %r18] 0x42 | |
4782 | mondo_0_520: | |
4783 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4784 | ||
4785 | stxa %r19, [%r0+0x3c0] %asi | |
4786 | .word 0x9d94c005 ! 1378: WRPR_WSTATE_R wrpr %r19, %r5, %wstate | |
4787 | .word 0x87902334 ! 1379: WRPR_TT_I wrpr %r0, 0x0334, %tt | |
4788 | debug_0_521: | |
4789 | mov 0x38, %r18 | |
4790 | .word 0xfef00b12 ! 1380: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4791 | .word 0xe71fe001 ! 1381: LDDF_I ldd [%r31, 0x0001], %f19 | |
4792 | debug_0_522: | |
4793 | mov 8, %r18 | |
4794 | .word 0xd8f00852 ! 1382: STXA_R stxa %r12, [%r0 + %r18] 0x42 | |
4795 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_523)) -> intp(0,1,3) | |
4796 | xir_0_523: | |
4797 | .word 0xa981e001 ! 1383: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
4798 | .word 0xe637e001 ! 1384: STH_I sth %r19, [%r31 + 0x0001] | |
4799 | .word 0x93902000 ! 1385: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
4800 | .word 0xe737e001 ! 1386: STQF_I - %f19, [0x0001, %r31] | |
4801 | .word 0xe61fc000 ! 1387: LDD_R ldd [%r31 + %r0], %r19 | |
4802 | debug_0_524: | |
4803 | mov 0x38, %r18 | |
4804 | .word 0xfef00b12 ! 1388: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4805 | .word 0xe65fe001 ! 1389: LDX_I ldx [%r31 + 0x0001], %r19 | |
4806 | .word 0x8d9036f4 ! 1390: WRPR_PSTATE_I wrpr %r0, 0x16f4, %pstate | |
4807 | .word 0xe717c000 ! 1391: LDQF_R - [%r31, %r0], %f19 | |
4808 | otherw | |
4809 | mov 0xb5, %r30 | |
4810 | .word 0x91d0001e ! 1392: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4811 | set 0xc57f199f, %r28 | |
4812 | stxa %r28, [%g0] 0x73 | |
4813 | intvec_0_525: | |
4814 | .word 0x39400001 ! 1393: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4815 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_526)) -> intp(0,1,3) | |
4816 | xir_0_526: | |
4817 | .word 0xa984a001 ! 1394: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
4818 | .word 0xa5500000 ! 1395: RDPR_TPC <illegal instruction> | |
4819 | .word 0xab848014 ! 1396: WR_CLEAR_SOFTINT_R wr %r18, %r20, %clear_softint | |
4820 | .word 0xe497e020 ! 1397: LDUHA_I lduha [%r31, + 0x0020] %asi, %r18 | |
4821 | .word 0xe4800bc0 ! 1398: LDUWA_R lduwa [%r0, %r0] 0x5e, %r18 | |
4822 | otherw | |
4823 | mov 0xb5, %r30 | |
4824 | .word 0x93d0001e ! 1399: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
4825 | splash_lsu_0_527: | |
4826 | setx 0x554f3f22b1e89dab, %r1, %r2 | |
4827 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4828 | .word 0x3d400001 ! 1400: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4829 | .word 0x9194e001 ! 1401: WRPR_PIL_I wrpr %r19, 0x0001, %pil | |
4830 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_528)) -> intp(0,0,14) | |
4831 | intvec_0_528: | |
4832 | .word 0x39400001 ! 1402: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4833 | mondo_0_529: | |
4834 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4835 | ||
4836 | stxa %r11, [%r0+0x3d0] %asi | |
4837 | .word 0x9d95000a ! 1403: WRPR_WSTATE_R wrpr %r20, %r10, %wstate | |
4838 | .word 0xa1902004 ! 1404: WRPR_GL_I wrpr %r0, 0x0004, %- | |
4839 | intveclr_0_530: | |
4840 | set 0x6a15f7c, %r28 | |
4841 | stxa %r28, [%g0] 0x72 | |
4842 | .word 0x25400001 ! 1405: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4843 | otherw | |
4844 | mov 0x33, %r30 | |
4845 | .word 0x91d0001e ! 1406: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4846 | DS_0_531: | |
4847 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4848 | .word 0xbfefc000 ! 1407: RESTORE_R restore %r31, %r0, %r31 | |
4849 | .word 0xe457e001 ! 1408: LDSH_I ldsh [%r31 + 0x0001], %r18 | |
4850 | intveclr_0_532: | |
4851 | set 0x710928a2, %r28 | |
4852 | stxa %r28, [%g0] 0x72 | |
4853 | .word 0x25400001 ! 1409: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4854 | .word 0xe4c804a0 ! 1410: LDSBA_R ldsba [%r0, %r0] 0x25, %r18 | |
4855 | .word 0xa1902004 ! 1411: WRPR_GL_I wrpr %r0, 0x0004, %- | |
4856 | .word 0xe4d7e010 ! 1412: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r18 | |
4857 | .word 0x93d02033 ! 1413: Tcc_I tne icc_or_xcc, %r0 + 51 | |
4858 | .word 0x91d02033 ! 1414: Tcc_I ta icc_or_xcc, %r0 + 51 | |
4859 | tagged_0_533: | |
4860 | taddcctv %r18, 0x192f, %r13 | |
4861 | .word 0xe407e001 ! 1415: LDUW_I lduw [%r31 + 0x0001], %r18 | |
4862 | .word 0xe43fc00a ! 1416: STD_R std %r18, [%r31 + %r10] | |
4863 | .word 0x91d02032 ! 1417: Tcc_I ta icc_or_xcc, %r0 + 50 | |
4864 | .word 0xe447e001 ! 1418: LDSW_I ldsw [%r31 + 0x0001], %r18 | |
4865 | tagged_0_534: | |
4866 | tsubcctv %r16, 0x1bea, %r10 | |
4867 | .word 0xe407e001 ! 1419: LDUW_I lduw [%r31 + 0x0001], %r18 | |
4868 | .word 0xa7826001 ! 1420: WR_GRAPHICS_STATUS_REG_I wr %r9, 0x0001, %- | |
4869 | .word 0xe4c00e80 ! 1421: LDSWA_R ldswa [%r0, %r0] 0x74, %r18 | |
4870 | tagged_0_535: | |
4871 | taddcctv %r3, 0x18cd, %r12 | |
4872 | .word 0xe407e001 ! 1422: LDUW_I lduw [%r31 + 0x0001], %r18 | |
4873 | change_to_randtl_0_536: | |
4874 | ta T_CHANGE_PRIV ! macro | |
4875 | done_change_to_randtl_0_536: | |
4876 | .word 0x8f902002 ! 1423: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
4877 | debug_0_537: | |
4878 | mov 8, %r18 | |
4879 | .word 0xdcf00852 ! 1424: STXA_R stxa %r14, [%r0 + %r18] 0x42 | |
4880 | .word 0xe48008a0 ! 1425: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 | |
4881 | debug_0_538: | |
4882 | setx debug_0_538 + 64, %r11, %r19 | |
4883 | mov 0x38, %r18 | |
4884 | .word 0xe6f00b12 ! 1426: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4885 | mondo_0_539: | |
4886 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4887 | ||
4888 | stxa %r18, [%r0+0x3c0] %asi | |
4889 | .word 0x9d948004 ! 1427: WRPR_WSTATE_R wrpr %r18, %r4, %wstate | |
4890 | .word 0x8d802004 ! 1428: WRFPRS_I wr %r0, 0x0004, %fprs | |
4891 | .word 0x87902197 ! 1429: WRPR_TT_I wrpr %r0, 0x0197, %tt | |
4892 | tagged_0_540: | |
4893 | tsubcctv %r10, 0x1781, %r8 | |
4894 | .word 0xe407e001 ! 1430: LDUW_I lduw [%r31 + 0x0001], %r18 | |
4895 | splash_lsu_0_541: | |
4896 | setx 0x112feb4495c4b40f, %r1, %r2 | |
4897 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4898 | .word 0x3d400001 ! 1431: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4899 | .word 0x2c700001 ! 1432: BPNEG <illegal instruction> | |
4900 | .word 0x36700001 ! 1433: BPGE <illegal instruction> | |
4901 | .word 0xe497e020 ! 1434: LDUHA_I lduha [%r31, + 0x0020] %asi, %r18 | |
4902 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_542)) -> intp(0,0,1) | |
4903 | intvec_0_542: | |
4904 | .word 0x39400001 ! 1435: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4905 | .word 0x87802058 ! 1436: WRASI_I wr %r0, 0x0058, %asi | |
4906 | .word 0x8f480000 ! 1437: RDHPR_HPSTATE rdhpr %hpstate, %r7 | |
4907 | debug_0_543: | |
4908 | mov 8, %r18 | |
4909 | .word 0xe0f00852 ! 1438: STXA_R stxa %r16, [%r0 + %r18] 0x42 | |
4910 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_544)) -> intp(0,0,6) | |
4911 | intvec_0_544: | |
4912 | .word 0x39400001 ! 1439: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4913 | .word 0x879022fd ! 1440: WRPR_TT_I wrpr %r0, 0x02fd, %tt | |
4914 | .word 0x87802020 ! 1441: WRASI_I wr %r0, 0x0020, %asi | |
4915 | set 0xc3088910, %r28 | |
4916 | stxa %r28, [%g0] 0x73 | |
4917 | intvec_0_545: | |
4918 | .word 0x39400001 ! 1442: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4919 | debug_0_546: | |
4920 | mov 8, %r18 | |
4921 | .word 0xd0f00852 ! 1443: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
4922 | nop | |
4923 | mov 0x80, %g3 | |
4924 | stxa %g3, [%g3] 0x57 | |
4925 | .word 0xce5fc000 ! 1444: LDX_R ldx [%r31 + %r0], %r7 | |
4926 | .word 0xcec804a0 ! 1445: LDSBA_R ldsba [%r0, %r0] 0x25, %r7 | |
4927 | set 0x410e7369, %r28 | |
4928 | stxa %r28, [%g0] 0x73 | |
4929 | intvec_0_547: | |
4930 | .word 0x39400001 ! 1446: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4931 | splash_lsu_0_548: | |
4932 | setx 0xdb58103a96624111, %r1, %r2 | |
4933 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4934 | .word 0x3d400001 ! 1447: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4935 | .word 0xce9004a0 ! 1448: LDUHA_R lduha [%r0, %r0] 0x25, %r7 | |
4936 | tagged_0_549: | |
4937 | taddcctv %r20, 0x11e5, %r9 | |
4938 | .word 0xce07e001 ! 1449: LDUW_I lduw [%r31 + 0x0001], %r7 | |
4939 | .word 0xab81400a ! 1450: WR_CLEAR_SOFTINT_R wr %r5, %r10, %clear_softint | |
4940 | .word 0xce800b20 ! 1451: LDUWA_R lduwa [%r0, %r0] 0x59, %r7 | |
4941 | debug_0_550: | |
4942 | setx debug_0_550 + 64, %r11, %r19 | |
4943 | mov 0x38, %r18 | |
4944 | .word 0xe6f00b12 ! 1452: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4945 | .word 0x87802014 ! 1453: WRASI_I wr %r0, 0x0014, %asi | |
4946 | .word 0xa190200f ! 1454: WRPR_GL_I wrpr %r0, 0x000f, %- | |
4947 | splash_tba_0_551: | |
4948 | set 0x120000, %r2 | |
4949 | ld [%r2+%r0], %r1 | |
4950 | ta T_CHANGE_PRIV | |
4951 | set 0x120000, %r2 | |
4952 | .word 0x8b900002 ! 1455: WRPR_TBA_R wrpr %r0, %r2, %tba | |
4953 | .word 0xce2fc00a ! 1456: STB_R stb %r7, [%r31 + %r10] | |
4954 | .word 0xa750c000 ! 1457: RDPR_TT rdpr %tt, %r19 | |
4955 | .word 0xe6d80e80 ! 1458: LDXA_R ldxa [%r0, %r0] 0x74, %r19 | |
4956 | .word 0x99520000 ! 1459: RDPR_PIL <illegal instruction> | |
4957 | mondo_0_552: | |
4958 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4959 | ||
4960 | stxa %r0, [%r0+0x3e8] %asi | |
4961 | .word 0x9d908014 ! 1460: WRPR_WSTATE_R wrpr %r2, %r20, %wstate | |
4962 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
4963 | ta T_CHANGE_NONHPRIV ! macro | |
4964 | .word 0xa16ca001 ! 1461: SDIVX_I sdivx %r18, 0x0001, %r16 | |
4965 | debug_0_554: | |
4966 | mov 0x38, %r18 | |
4967 | .word 0xfef00b12 ! 1462: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4968 | set 0x7b3b1cd7, %r28 | |
4969 | stxa %r28, [%g0] 0x73 | |
4970 | intvec_0_555: | |
4971 | .word 0x39400001 ! 1463: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4972 | debug_0_556: | |
4973 | setx debug_0_556 + 64, %r11, %r19 | |
4974 | mov 0x38, %r18 | |
4975 | .word 0xe6f00b12 ! 1464: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4976 | .word 0x22800001 ! 1465: BE be,a <label_0x1> | |
4977 | ta T_CHANGE_HPRIV ! macro | |
4978 | .word 0x28700001 ! 1467: BPLEU <illegal instruction> | |
4979 | set 0x34a36ff6, %r28 | |
4980 | stxa %r28, [%g0] 0x73 | |
4981 | intvec_0_557: | |
4982 | .word 0x39400001 ! 1468: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4983 | debug_0_558: | |
4984 | mov 8, %r18 | |
4985 | .word 0xd0f00852 ! 1469: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
4986 | splash_tba_0_559: | |
4987 | set 0x120000, %r2 | |
4988 | ld [%r2+%r0], %r1 | |
4989 | ta T_CHANGE_PRIV | |
4990 | set 0x120000, %r2 | |
4991 | .word 0x8b900002 ! 1470: WRPR_TBA_R wrpr %r0, %r2, %tba | |
4992 | .word 0x81460000 ! 1471: RD_STICK_REG stbar | |
4993 | DS_0_560: | |
4994 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
4995 | .word 0xbfefc000 ! 1472: RESTORE_R restore %r31, %r0, %r31 | |
4996 | .word 0xe0cfe030 ! 1473: LDSBA_I ldsba [%r31, + 0x0030] %asi, %r16 | |
4997 | otherw | |
4998 | mov 0xb5, %r30 | |
4999 | .word 0x83d0001e ! 1474: Tcc_R te icc_or_xcc, %r0 + %r30 | |
5000 | .word 0x81460000 ! 1475: RD_STICK_REG stbar | |
5001 | .word 0x8d802004 ! 1476: WRFPRS_I wr %r0, 0x0004, %fprs | |
5002 | debug_0_561: | |
5003 | mov 8, %r18 | |
5004 | .word 0xe2f00852 ! 1477: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
5005 | .word 0xe11fe001 ! 1478: LDDF_I ldd [%r31, 0x0001], %f16 | |
5006 | tagged_0_562: | |
5007 | tsubcctv %r3, 0x108a, %r9 | |
5008 | .word 0xe007e001 ! 1479: LDUW_I lduw [%r31 + 0x0001], %r16 | |
5009 | .word 0x99450000 ! 1480: RD_SET_SOFTINT rd %set_softint, %r12 | |
5010 | .word 0x879023d9 ! 1481: WRPR_TT_I wrpr %r0, 0x03d9, %tt | |
5011 | .word 0xa5454000 ! 1482: RD_CLEAR_SOFTINT rd %clear_softint, %r18 | |
5012 | set 0x7f90c4ba, %r28 | |
5013 | stxa %r28, [%g0] 0x73 | |
5014 | intvec_0_563: | |
5015 | .word 0x39400001 ! 1483: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5016 | tagged_0_564: | |
5017 | tsubcctv %r4, 0x138b, %r17 | |
5018 | .word 0xe407e001 ! 1484: LDUW_I lduw [%r31 + 0x0001], %r18 | |
5019 | debug_0_565: | |
5020 | setx debug_0_565 + 64, %r11, %r19 | |
5021 | mov 0x38, %r18 | |
5022 | .word 0xe6f00b12 ! 1485: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
5023 | .word 0xe40fe001 ! 1486: LDUB_I ldub [%r31 + 0x0001], %r18 | |
5024 | .word 0x8198220c ! 1487: WRHPR_HPSTATE_I wrhpr %r0, 0x020c, %hpstate | |
5025 | intveclr_0_566: | |
5026 | set 0x9c27a192, %r28 | |
5027 | stxa %r28, [%g0] 0x72 | |
5028 | .word 0x25400001 ! 1488: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5029 | set 0x937a83a7, %r28 | |
5030 | stxa %r28, [%g0] 0x73 | |
5031 | intvec_0_567: | |
5032 | .word 0x39400001 ! 1489: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5033 | DS_0_568: | |
5034 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
5035 | .word 0xcf34c012 ! 1: STQF_R - %f7, [%r18, %r19] | |
5036 | normalw | |
5037 | .word 0xa9458000 ! 1490: RD_SOFTINT_REG rd %softint, %r20 | |
5038 | .word 0xe937c012 ! 1491: STQF_R - %f20, [%r18, %r31] | |
5039 | debug_0_569: | |
5040 | mov 0x38, %r18 | |
5041 | .word 0xfef00b12 ! 1492: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
5042 | .word 0x26700001 ! 1493: BPL <illegal instruction> | |
5043 | .word 0x91d02033 ! 1494: Tcc_I ta icc_or_xcc, %r0 + 51 | |
5044 | ta T_CHANGE_HPRIV ! macro | |
5045 | change_to_randtl_0_570: | |
5046 | ta T_CHANGE_PRIV ! macro | |
5047 | done_change_to_randtl_0_570: | |
5048 | .word 0x8f902001 ! 1496: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
5049 | .word 0x91d02033 ! 1497: Tcc_I ta icc_or_xcc, %r0 + 51 | |
5050 | .word 0xe8d7e030 ! 1498: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r20 | |
5051 | debug_0_571: | |
5052 | setx debug_0_571 + 64, %r11, %r19 | |
5053 | mov 0x38, %r18 | |
5054 | SECTION .MAIN | |
5055 | .text | |
5056 | diag_finish: | |
5057 | nop | |
5058 | nop | |
5059 | nop | |
5060 | ta T_CHANGE_HPRIV | |
5061 | set 0x80000, %r2 | |
5062 | wrhpr %g2, %g0, %htba | |
5063 | ta T_GOOD_TRAP | |
5064 | nop | |
5065 | nop | |
5066 | nop | |
5067 | .data | |
5068 | .xword 0x0 | |
5069 | ||
5070 | .global user_data_start | |
5071 | .data | |
5072 | user_data_start: | |
5073 | ||
5074 | .xword 0x51d40ca05daae022 | |
5075 | .xword 0x39ddadad6b17775a | |
5076 | .xword 0xe956358d83278a10 | |
5077 | .xword 0xbcc00750af72b7d6 | |
5078 | .xword 0xe905562f2574138c | |
5079 | .xword 0xf5e9c855c3fd83e1 | |
5080 | .xword 0x84dbd22c7c295a59 | |
5081 | .xword 0x3ef48eccb21f6540 | |
5082 | .xword 0xf4381eccfc15d64f | |
5083 | .xword 0x2ac2cb5b0e7bd1cb | |
5084 | .xword 0xa553693b0457d69f | |
5085 | .xword 0x9e71a7fb65c0d34e | |
5086 | .xword 0x99d63d1be88e6166 | |
5087 | .xword 0x990de0d26c767f86 | |
5088 | .xword 0x1f9f8e35128f8dab | |
5089 | .xword 0x80dadb657c291352 | |
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5323 | .xword 0x0f6e1252434f012d | |
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5328 | .xword 0x30552ba1576bfd59 | |
5329 | .xword 0xc0f0fd04ba48827f | |
5330 | ||
5331 | .global wdog_2_ext | |
5332 | # 9 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
5333 | .global wdog_2_ext | |
5334 | ||
5335 | SECTION .HTRAPS | |
5336 | .text | |
5337 | htrap_5_ext: | |
5338 | rd %pc, %l2 | |
5339 | inc %l3 | |
5340 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 | |
5341 | rdpr %tl, %l3 | |
5342 | rdpr %tstate, %l4 | |
5343 | rdhpr %htstate, %l5 | |
5344 | or %l5, 0x4, %l5 | |
5345 | inc %l3 | |
5346 | wrpr %l3, %tl | |
5347 | wrpr %l2, %tpc | |
5348 | add %l2, 4, %l2 | |
5349 | wrpr %l2, %tnpc | |
5350 | wrpr %l4, %tstate | |
5351 | wrhpr %l5, %htstate | |
5352 | retry | |
5353 | htrap_5_ext_done: | |
5354 | done | |
5355 | ||
5356 | wdog_2_ext: | |
5357 | mov 0x1f, %l1 | |
5358 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
5359 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
5360 | ! If TT != 2, then goto trap handler | |
5361 | rdpr %tt, %l1 | |
5362 | cmp %l1, 0x2 | |
5363 | bne wdog_2_goto_handler | |
5364 | nop | |
5365 | ! else done | |
5366 | done | |
5367 | wdog_2_goto_handler: | |
5368 | rdhpr %htba, %l2 | |
5369 | sllx %l1, 5, %l1 | |
5370 | add %l1, %l2, %l2 | |
5371 | jmp %l2 | |
5372 | nop | |
5373 | # 51 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
5374 | ! Red mode other reset handler | |
5375 | ! Get htba, and tt and make trap address | |
5376 | ! Jump to trap handler .. | |
5377 | ||
5378 | SECTION .RED_SEC | |
5379 | .text | |
5380 | red_other_ext: | |
5381 | ! IF TL=6, shift stack by one .. | |
5382 | rdpr %tl, %l1 | |
5383 | cmp %l1, 6 | |
5384 | be start_tsa_shift | |
5385 | nop | |
5386 | ||
5387 | continue_red_other: | |
5388 | mov 0x1f, %l1 | |
5389 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
5390 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
5391 | ||
5392 | rdpr %tt, %l1 | |
5393 | sllx %l1, 5, %l1 | |
5394 | rdhpr %htba, %l2 | |
5395 | add %l1, %l2, %l2 | |
5396 | rdhpr %hpstate, %l1 | |
5397 | jmp %l2 | |
5398 | wrhpr %l1, 0x20, %hpstate | |
5399 | nop | |
5400 | ||
5401 | wdog_red_ext: | |
5402 | ! Shift stack down by 1 ... | |
5403 | rdpr %tl, %l1 | |
5404 | start_tsa_shift: | |
5405 | mov 0x2, %l2 | |
5406 | ||
5407 | tsa_shift: | |
5408 | wrpr %l2, %tl | |
5409 | rdpr %tt, %l3 | |
5410 | rdpr %tpc, %l4 | |
5411 | rdpr %tnpc, %l5 | |
5412 | rdpr %tstate, %l6 | |
5413 | rdhpr %htstate, %l7 | |
5414 | dec %l2 | |
5415 | wrpr %l2, %tl | |
5416 | wrpr %l3, %tt | |
5417 | wrpr %l4, %tpc | |
5418 | wrpr %l5, %tnpc | |
5419 | wrpr %l6, %tstate | |
5420 | wrhpr %l7, %htstate | |
5421 | add %l2, 2, %l2 | |
5422 | cmp %l2, %l1 | |
5423 | ble tsa_shift | |
5424 | nop | |
5425 | tsa_shift_done: | |
5426 | dec %l1 | |
5427 | wrpr %l1, %tl | |
5428 | ||
5429 | ! If TT != 2, then goto trap handler | |
5430 | rdpr %tt, %l1 | |
5431 | ||
5432 | cmp %l1, 0x2 | |
5433 | bne continue_red_other | |
5434 | nop | |
5435 | ! else done | |
5436 | mov 0x1f, %l1 | |
5437 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
5438 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
5439 | done | |
5440 | # 332 "diag.j" | |
5441 | ||
5442 | ||
5443 | ||
5444 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x000000000038c000 | |
5445 | attr_text { | |
5446 | Name = .MyHTRAPS_0, | |
5447 | RA = 0x0000000000380000, | |
5448 | PA = ra2pa(0x0000000000380000,0), | |
5449 | part_0_ctx_zero_tsb_config_0, | |
5450 | part_0_ctx_nonzero_tsb_config_0, | |
5451 | TTE_G = 1, | |
5452 | TTE_Context = 0, | |
5453 | TTE_V = 1, | |
5454 | TTE_Size = 0, | |
5455 | TTE_NFO = 0, | |
5456 | TTE_IE = 0, | |
5457 | TTE_Soft2 = 0, | |
5458 | TTE_Diag = 0, | |
5459 | TTE_Soft = 0, | |
5460 | TTE_L = 0, | |
5461 | TTE_CP = 1, | |
5462 | TTE_CV = 0, | |
5463 | TTE_E = 0, | |
5464 | TTE_P = 1, | |
5465 | TTE_W = 0, | |
5466 | TTE_X = 1 | |
5467 | } | |
5468 | ||
5469 | ||
5470 | attr_data { | |
5471 | Name = .MyHTRAPS_0, | |
5472 | RA = 0x000000000038c000, | |
5473 | PA = ra2pa(0x000000000038c000,0), | |
5474 | part_0_ctx_zero_tsb_config_0, | |
5475 | part_0_ctx_nonzero_tsb_config_0, | |
5476 | TTE_G = 1, | |
5477 | TTE_Context = 0, | |
5478 | TTE_V = 1, | |
5479 | TTE_Size = 0, | |
5480 | TTE_NFO = 0, | |
5481 | TTE_IE = 0, | |
5482 | TTE_Soft2 = 0, | |
5483 | TTE_Diag = 0, | |
5484 | TTE_Soft = 0, | |
5485 | TTE_L = 0, | |
5486 | TTE_CP = 1, | |
5487 | TTE_CV = 0, | |
5488 | TTE_E = 0, | |
5489 | TTE_P = 1, | |
5490 | TTE_W = 0 | |
5491 | } | |
5492 | ||
5493 | ||
5494 | attr_text { | |
5495 | Name = .MyHTRAPS_0, | |
5496 | hypervisor | |
5497 | } | |
5498 | ||
5499 | ||
5500 | attr_data { | |
5501 | Name = .MyHTRAPS_0, | |
5502 | hypervisor | |
5503 | } | |
5504 | ||
5505 | #include "htraps.s" | |
5506 | #include "tlu_htraps_ext.s" | |
5507 | ||
5508 | ||
5509 | ||
5510 | SECTION .MyHTRAPS_1 TEXT_VA = 0x0000000000390000, DATA_VA = 0x000000000039c000 | |
5511 | attr_text { | |
5512 | Name = .MyHTRAPS_1, | |
5513 | RA = 0x0000000000390000, | |
5514 | PA = ra2pa(0x0000000000390000,0), | |
5515 | part_0_ctx_zero_tsb_config_0, | |
5516 | part_0_ctx_nonzero_tsb_config_0, | |
5517 | TTE_G = 1, | |
5518 | TTE_Context = 0, | |
5519 | TTE_V = 1, | |
5520 | TTE_Size = 0, | |
5521 | TTE_NFO = 0, | |
5522 | TTE_IE = 0, | |
5523 | TTE_Soft2 = 0, | |
5524 | TTE_Diag = 0, | |
5525 | TTE_Soft = 0, | |
5526 | TTE_L = 0, | |
5527 | TTE_CP = 1, | |
5528 | TTE_CV = 0, | |
5529 | TTE_E = 0, | |
5530 | TTE_P = 1, | |
5531 | TTE_W = 0, | |
5532 | TTE_X = 1 | |
5533 | } | |
5534 | ||
5535 | ||
5536 | attr_data { | |
5537 | Name = .MyHTRAPS_1, | |
5538 | RA = 0x000000000039c000, | |
5539 | PA = ra2pa(0x000000000039c000,0), | |
5540 | part_0_ctx_zero_tsb_config_0, | |
5541 | part_0_ctx_nonzero_tsb_config_0, | |
5542 | TTE_G = 1, | |
5543 | TTE_Context = 0, | |
5544 | TTE_V = 1, | |
5545 | TTE_Size = 0, | |
5546 | TTE_NFO = 0, | |
5547 | TTE_IE = 0, | |
5548 | TTE_Soft2 = 0, | |
5549 | TTE_Diag = 0, | |
5550 | TTE_Soft = 0, | |
5551 | TTE_L = 0, | |
5552 | TTE_CP = 1, | |
5553 | TTE_CV = 0, | |
5554 | TTE_E = 0, | |
5555 | TTE_P = 1, | |
5556 | TTE_W = 0 | |
5557 | } | |
5558 | ||
5559 | ||
5560 | attr_text { | |
5561 | Name = .MyHTRAPS_1, | |
5562 | hypervisor | |
5563 | } | |
5564 | ||
5565 | ||
5566 | attr_data { | |
5567 | Name = .MyHTRAPS_1, | |
5568 | hypervisor | |
5569 | } | |
5570 | ||
5571 | #include "htraps.s" | |
5572 | #include "tlu_htraps_ext.s" | |
5573 | ||
5574 | ||
5575 | ||
5576 | SECTION .MyHTRAPS_2 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003ac000 | |
5577 | attr_text { | |
5578 | Name = .MyHTRAPS_2, | |
5579 | RA = 0x00000000003a0000, | |
5580 | PA = ra2pa(0x00000000003a0000,0), | |
5581 | part_0_ctx_zero_tsb_config_0, | |
5582 | part_0_ctx_nonzero_tsb_config_0, | |
5583 | TTE_G = 1, | |
5584 | TTE_Context = 0, | |
5585 | TTE_V = 1, | |
5586 | TTE_Size = 0, | |
5587 | TTE_NFO = 0, | |
5588 | TTE_IE = 0, | |
5589 | TTE_Soft2 = 0, | |
5590 | TTE_Diag = 0, | |
5591 | TTE_Soft = 0, | |
5592 | TTE_L = 0, | |
5593 | TTE_CP = 1, | |
5594 | TTE_CV = 0, | |
5595 | TTE_E = 0, | |
5596 | TTE_P = 1, | |
5597 | TTE_W = 0, | |
5598 | TTE_X = 1 | |
5599 | } | |
5600 | ||
5601 | ||
5602 | attr_data { | |
5603 | Name = .MyHTRAPS_2, | |
5604 | RA = 0x00000000003ac000, | |
5605 | PA = ra2pa(0x00000000003ac000,0), | |
5606 | part_0_ctx_zero_tsb_config_0, | |
5607 | part_0_ctx_nonzero_tsb_config_0, | |
5608 | TTE_G = 1, | |
5609 | TTE_Context = 0, | |
5610 | TTE_V = 1, | |
5611 | TTE_Size = 0, | |
5612 | TTE_NFO = 0, | |
5613 | TTE_IE = 0, | |
5614 | TTE_Soft2 = 0, | |
5615 | TTE_Diag = 0, | |
5616 | TTE_Soft = 0, | |
5617 | TTE_L = 0, | |
5618 | TTE_CP = 1, | |
5619 | TTE_CV = 0, | |
5620 | TTE_E = 0, | |
5621 | TTE_P = 1, | |
5622 | TTE_W = 0 | |
5623 | } | |
5624 | ||
5625 | ||
5626 | attr_text { | |
5627 | Name = .MyHTRAPS_2, | |
5628 | hypervisor | |
5629 | } | |
5630 | ||
5631 | ||
5632 | attr_data { | |
5633 | Name = .MyHTRAPS_2, | |
5634 | hypervisor | |
5635 | } | |
5636 | ||
5637 | #include "htraps.s" | |
5638 | #include "tlu_htraps_ext.s" | |
5639 | ||
5640 | ||
5641 | ||
5642 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000000003b0000, DATA_VA = 0x00000000003bc000 | |
5643 | attr_text { | |
5644 | Name = .MyHTRAPS_3, | |
5645 | RA = 0x00000000003b0000, | |
5646 | PA = ra2pa(0x00000000003b0000,0), | |
5647 | part_0_ctx_zero_tsb_config_0, | |
5648 | part_0_ctx_nonzero_tsb_config_0, | |
5649 | TTE_G = 1, | |
5650 | TTE_Context = 0, | |
5651 | TTE_V = 1, | |
5652 | TTE_Size = 0, | |
5653 | TTE_NFO = 0, | |
5654 | TTE_IE = 0, | |
5655 | TTE_Soft2 = 0, | |
5656 | TTE_Diag = 0, | |
5657 | TTE_Soft = 0, | |
5658 | TTE_L = 0, | |
5659 | TTE_CP = 1, | |
5660 | TTE_CV = 0, | |
5661 | TTE_E = 0, | |
5662 | TTE_P = 1, | |
5663 | TTE_W = 0, | |
5664 | TTE_X = 1 | |
5665 | } | |
5666 | ||
5667 | ||
5668 | attr_data { | |
5669 | Name = .MyHTRAPS_3, | |
5670 | RA = 0x00000000003bc000, | |
5671 | PA = ra2pa(0x00000000003bc000,0), | |
5672 | part_0_ctx_zero_tsb_config_0, | |
5673 | part_0_ctx_nonzero_tsb_config_0, | |
5674 | TTE_G = 1, | |
5675 | TTE_Context = 0, | |
5676 | TTE_V = 1, | |
5677 | TTE_Size = 0, | |
5678 | TTE_NFO = 0, | |
5679 | TTE_IE = 0, | |
5680 | TTE_Soft2 = 0, | |
5681 | TTE_Diag = 0, | |
5682 | TTE_Soft = 0, | |
5683 | TTE_L = 0, | |
5684 | TTE_CP = 1, | |
5685 | TTE_CV = 0, | |
5686 | TTE_E = 0, | |
5687 | TTE_P = 1, | |
5688 | TTE_W = 0 | |
5689 | } | |
5690 | ||
5691 | ||
5692 | attr_text { | |
5693 | Name = .MyHTRAPS_3, | |
5694 | hypervisor | |
5695 | } | |
5696 | ||
5697 | ||
5698 | attr_data { | |
5699 | Name = .MyHTRAPS_3, | |
5700 | hypervisor | |
5701 | } | |
5702 | ||
5703 | #include "htraps.s" | |
5704 | #include "tlu_htraps_ext.s" | |
5705 | ||
5706 | ||
5707 | ||
5708 | ||
5709 | ||
5710 | SECTION .MyTRAPS_0 TEXT_VA = 0x00000000003c0000, DATA_VA = 0x00000000003cc000 | |
5711 | attr_text { | |
5712 | Name = .MyTRAPS_0, | |
5713 | RA = 0x00000000003c0000, | |
5714 | PA = ra2pa(0x00000000003c0000,0), | |
5715 | part_0_ctx_zero_tsb_config_0, | |
5716 | part_0_ctx_nonzero_tsb_config_0, | |
5717 | TTE_G = 1, | |
5718 | TTE_Context = 0, | |
5719 | TTE_V = 1, | |
5720 | TTE_Size = 0, | |
5721 | TTE_NFO = 0, | |
5722 | TTE_IE = 0, | |
5723 | TTE_Soft2 = 0, | |
5724 | TTE_Diag = 0, | |
5725 | TTE_Soft = 0, | |
5726 | TTE_L = 0, | |
5727 | TTE_CP = 1, | |
5728 | TTE_CV = 0, | |
5729 | TTE_E = 0, | |
5730 | TTE_P = 1, | |
5731 | TTE_W = 0, | |
5732 | TTE_X = 1 | |
5733 | } | |
5734 | ||
5735 | ||
5736 | attr_data { | |
5737 | Name = .MyTRAPS_0, | |
5738 | RA = 0x00000000003cc000, | |
5739 | PA = ra2pa(0x00000000003cc000,0), | |
5740 | part_0_ctx_zero_tsb_config_0, | |
5741 | part_0_ctx_nonzero_tsb_config_0, | |
5742 | TTE_G = 1, | |
5743 | TTE_Context = 0, | |
5744 | TTE_V = 1, | |
5745 | TTE_Size = 0, | |
5746 | TTE_NFO = 0, | |
5747 | TTE_IE = 0, | |
5748 | TTE_Soft2 = 0, | |
5749 | TTE_Diag = 0, | |
5750 | TTE_Soft = 0, | |
5751 | TTE_L = 0, | |
5752 | TTE_CP = 1, | |
5753 | TTE_CV = 0, | |
5754 | TTE_E = 0, | |
5755 | TTE_P = 1, | |
5756 | TTE_W = 0 | |
5757 | } | |
5758 | ||
5759 | ||
5760 | attr_text { | |
5761 | Name = .MyTRAPS_0, | |
5762 | hypervisor | |
5763 | } | |
5764 | ||
5765 | ||
5766 | attr_data { | |
5767 | Name = .MyTRAPS_0, | |
5768 | hypervisor | |
5769 | } | |
5770 | ||
5771 | #include "traps.s" | |
5772 | ||
5773 | ||
5774 | ||
5775 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003d0000, DATA_VA = 0x00000000003dc000 | |
5776 | attr_text { | |
5777 | Name = .MyTRAPS_1, | |
5778 | RA = 0x00000000003d0000, | |
5779 | PA = ra2pa(0x00000000003d0000,0), | |
5780 | part_0_ctx_zero_tsb_config_0, | |
5781 | part_0_ctx_nonzero_tsb_config_0, | |
5782 | TTE_G = 1, | |
5783 | TTE_Context = 0, | |
5784 | TTE_V = 1, | |
5785 | TTE_Size = 0, | |
5786 | TTE_NFO = 0, | |
5787 | TTE_IE = 0, | |
5788 | TTE_Soft2 = 0, | |
5789 | TTE_Diag = 0, | |
5790 | TTE_Soft = 0, | |
5791 | TTE_L = 0, | |
5792 | TTE_CP = 1, | |
5793 | TTE_CV = 0, | |
5794 | TTE_E = 0, | |
5795 | TTE_P = 1, | |
5796 | TTE_W = 0, | |
5797 | TTE_X = 1 | |
5798 | } | |
5799 | ||
5800 | ||
5801 | attr_data { | |
5802 | Name = .MyTRAPS_1, | |
5803 | RA = 0x00000000003dc000, | |
5804 | PA = ra2pa(0x00000000003dc000,0), | |
5805 | part_0_ctx_zero_tsb_config_0, | |
5806 | part_0_ctx_nonzero_tsb_config_0, | |
5807 | TTE_G = 1, | |
5808 | TTE_Context = 0, | |
5809 | TTE_V = 1, | |
5810 | TTE_Size = 0, | |
5811 | TTE_NFO = 0, | |
5812 | TTE_IE = 0, | |
5813 | TTE_Soft2 = 0, | |
5814 | TTE_Diag = 0, | |
5815 | TTE_Soft = 0, | |
5816 | TTE_L = 0, | |
5817 | TTE_CP = 1, | |
5818 | TTE_CV = 0, | |
5819 | TTE_E = 0, | |
5820 | TTE_P = 1, | |
5821 | TTE_W = 0 | |
5822 | } | |
5823 | ||
5824 | ||
5825 | attr_text { | |
5826 | Name = .MyTRAPS_1, | |
5827 | hypervisor | |
5828 | } | |
5829 | ||
5830 | ||
5831 | attr_data { | |
5832 | Name = .MyTRAPS_1, | |
5833 | hypervisor | |
5834 | } | |
5835 | ||
5836 | #include "traps.s" | |
5837 | ||
5838 | ||
5839 | ||
5840 | SECTION .MyTRAPS_2 TEXT_VA = 0x00000000003e0000, DATA_VA = 0x00000000003ec000 | |
5841 | attr_text { | |
5842 | Name = .MyTRAPS_2, | |
5843 | RA = 0x00000000003e0000, | |
5844 | PA = ra2pa(0x00000000003e0000,0), | |
5845 | part_0_ctx_zero_tsb_config_0, | |
5846 | part_0_ctx_nonzero_tsb_config_0, | |
5847 | TTE_G = 1, | |
5848 | TTE_Context = 0, | |
5849 | TTE_V = 1, | |
5850 | TTE_Size = 0, | |
5851 | TTE_NFO = 0, | |
5852 | TTE_IE = 0, | |
5853 | TTE_Soft2 = 0, | |
5854 | TTE_Diag = 0, | |
5855 | TTE_Soft = 0, | |
5856 | TTE_L = 0, | |
5857 | TTE_CP = 1, | |
5858 | TTE_CV = 0, | |
5859 | TTE_E = 0, | |
5860 | TTE_P = 1, | |
5861 | TTE_W = 0, | |
5862 | TTE_X = 1 | |
5863 | } | |
5864 | ||
5865 | ||
5866 | attr_data { | |
5867 | Name = .MyTRAPS_2, | |
5868 | RA = 0x00000000003ec000, | |
5869 | PA = ra2pa(0x00000000003ec000,0), | |
5870 | part_0_ctx_zero_tsb_config_0, | |
5871 | part_0_ctx_nonzero_tsb_config_0, | |
5872 | TTE_G = 1, | |
5873 | TTE_Context = 0, | |
5874 | TTE_V = 1, | |
5875 | TTE_Size = 0, | |
5876 | TTE_NFO = 0, | |
5877 | TTE_IE = 0, | |
5878 | TTE_Soft2 = 0, | |
5879 | TTE_Diag = 0, | |
5880 | TTE_Soft = 0, | |
5881 | TTE_L = 0, | |
5882 | TTE_CP = 1, | |
5883 | TTE_CV = 0, | |
5884 | TTE_E = 0, | |
5885 | TTE_P = 1, | |
5886 | TTE_W = 0 | |
5887 | } | |
5888 | ||
5889 | ||
5890 | attr_text { | |
5891 | Name = .MyTRAPS_2, | |
5892 | hypervisor | |
5893 | } | |
5894 | ||
5895 | ||
5896 | attr_data { | |
5897 | Name = .MyTRAPS_2, | |
5898 | hypervisor | |
5899 | } | |
5900 | ||
5901 | #include "traps.s" | |
5902 | ||
5903 | ||
5904 | ||
5905 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000000003f0000, DATA_VA = 0x00000000003fc000 | |
5906 | attr_text { | |
5907 | Name = .MyTRAPS_3, | |
5908 | RA = 0x00000000003f0000, | |
5909 | PA = ra2pa(0x00000000003f0000,0), | |
5910 | part_0_ctx_zero_tsb_config_0, | |
5911 | part_0_ctx_nonzero_tsb_config_0, | |
5912 | TTE_G = 1, | |
5913 | TTE_Context = 0, | |
5914 | TTE_V = 1, | |
5915 | TTE_Size = 0, | |
5916 | TTE_NFO = 0, | |
5917 | TTE_IE = 0, | |
5918 | TTE_Soft2 = 0, | |
5919 | TTE_Diag = 0, | |
5920 | TTE_Soft = 0, | |
5921 | TTE_L = 0, | |
5922 | TTE_CP = 1, | |
5923 | TTE_CV = 0, | |
5924 | TTE_E = 0, | |
5925 | TTE_P = 1, | |
5926 | TTE_W = 0, | |
5927 | TTE_X = 1 | |
5928 | } | |
5929 | ||
5930 | ||
5931 | attr_data { | |
5932 | Name = .MyTRAPS_3, | |
5933 | RA = 0x00000000003fc000, | |
5934 | PA = ra2pa(0x00000000003fc000,0), | |
5935 | part_0_ctx_zero_tsb_config_0, | |
5936 | part_0_ctx_nonzero_tsb_config_0, | |
5937 | TTE_G = 1, | |
5938 | TTE_Context = 0, | |
5939 | TTE_V = 1, | |
5940 | TTE_Size = 0, | |
5941 | TTE_NFO = 0, | |
5942 | TTE_IE = 0, | |
5943 | TTE_Soft2 = 0, | |
5944 | TTE_Diag = 0, | |
5945 | TTE_Soft = 0, | |
5946 | TTE_L = 0, | |
5947 | TTE_CP = 1, | |
5948 | TTE_CV = 0, | |
5949 | TTE_E = 0, | |
5950 | TTE_P = 1, | |
5951 | TTE_W = 0 | |
5952 | } | |
5953 | ||
5954 | ||
5955 | attr_text { | |
5956 | Name = .MyTRAPS_3, | |
5957 | hypervisor | |
5958 | } | |
5959 | ||
5960 | ||
5961 | attr_data { | |
5962 | Name = .MyTRAPS_3, | |
5963 | hypervisor | |
5964 | } | |
5965 | ||
5966 | #include "traps.s" | |
5967 | ||
5968 | ||
5969 | ||
5970 | #if 0 | |
5971 | #endif | |
5972 |