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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: tlu_rand05_ind_12.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define TRAP_SECT_HV_ALSO | |
39 | #define DMMU_SKIP_IF_NO_TTE | |
40 | #define IMMU_SKIP_IF_NO_TTE | |
41 | ||
42 | #define MAIN_PAGE_NUCLEUS_ALSO | |
43 | #define MAIN_PAGE_HV_ALSO | |
44 | #define MAIN_PAGE_VA_IS_RA_ALSO | |
45 | #define DISABLE_PART_LIMIT_CHECK | |
46 | # 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
47 | !!!!!!!!!!!!!!!!!!!!!!!!! | |
48 | !! Disable trap checking | |
49 | #define NO_TRAPCHECK | |
50 | ||
51 | ! Enable Traps | |
52 | #define ENABLE_T1_Privileged_Opcode_0x11 | |
53 | #define ENABLE_T1_Fp_Disabled_0x20 | |
54 | #define ENABLE_HT0_Watchdog_Reset_0x02 | |
55 | ||
56 | #define FILL_TRAP_RETRY | |
57 | #define SPILL_TRAP_RETRY | |
58 | #define CLEAN_WIN_RETRY | |
59 | ||
60 | #define My_RED_Mode_Other_Reset | |
61 | #define My_RED_Mode_Other_Reset \ | |
62 | ba red_other_ext;\ | |
63 | nop;retry;nop;nop;nop;nop;nop | |
64 | # 24 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
65 | #define H_T1_Clean_Window_0x24 | |
66 | #define SUN_H_T1_Clean_Window_0x24 \ | |
67 | rdpr %cleanwin, %l1;\ | |
68 | add %l1,1,%l1;\ | |
69 | wrpr %l1, %g0, %cleanwin;\ | |
70 | retry; nop; nop; nop; nop | |
71 | ||
72 | #define H_T1_Clean_Window_0x25 | |
73 | #define SUN_H_T1_Clean_Window_0x25 \ | |
74 | rdpr %cleanwin, %l1;\ | |
75 | add %l1,1,%l1;\ | |
76 | wrpr %l1, %g0, %cleanwin;\ | |
77 | retry; nop; nop; nop; nop | |
78 | ||
79 | #define H_T1_Clean_Window_0x26 | |
80 | #define SUN_H_T1_Clean_Window_0x26 \ | |
81 | rdpr %cleanwin, %l1;\ | |
82 | add %l1,1,%l1;\ | |
83 | wrpr %l1, %g0, %cleanwin;\ | |
84 | retry; nop; nop; nop; nop | |
85 | ||
86 | #define H_T1_Clean_Window_0x27 | |
87 | #define SUN_H_T1_Clean_Window_0x27 \ | |
88 | rdpr %cleanwin, %l1;\ | |
89 | add %l1,1,%l1;\ | |
90 | wrpr %l1, %g0, %cleanwin;\ | |
91 | retry; nop; nop; nop; nop | |
92 | # 53 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
93 | #define H_HT0_Tag_Overflow | |
94 | #define My_HT0_Tag_Overflow \ | |
95 | done;nop; | |
96 | ||
97 | #define H_T0_Tag_Overflow | |
98 | #define My_T0_Tag_Overflow \ | |
99 | done;nop; | |
100 | ||
101 | #define H_T1_Tag_Overflow_0x23 | |
102 | #define SUN_H_T1_Tag_Overflow_0x23 \ | |
103 | done;nop; | |
104 | ||
105 | #define H_T0_Window_Spill_0_Normal_Trap | |
106 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
107 | ||
108 | #define H_T0_Window_Spill_1_Normal_Trap | |
109 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
110 | ||
111 | #define H_T0_Window_Spill_2_Normal_Trap | |
112 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
113 | ||
114 | #define H_T0_Window_Spill_3_Normal_Trap | |
115 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
116 | ||
117 | #define H_T0_Window_Spill_4_Normal_Trap | |
118 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
119 | ||
120 | #define H_T0_Window_Spill_5_Normal_Trap | |
121 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
122 | ||
123 | #define H_T0_Window_Spill_6_Normal_Trap | |
124 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
125 | ||
126 | #define H_T0_Window_Spill_7_Normal_Trap | |
127 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
128 | ||
129 | #define H_T0_Window_Spill_0_Other_Trap | |
130 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
131 | ||
132 | #define H_T0_Window_Spill_1_Other_Trap | |
133 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
134 | ||
135 | #define H_T0_Window_Spill_2_Other_Trap | |
136 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
137 | ||
138 | #define H_T0_Window_Spill_3_Other_Trap | |
139 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
140 | ||
141 | #define H_T0_Window_Spill_4_Other_Trap | |
142 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
143 | ||
144 | #define H_T0_Window_Spill_5_Other_Trap | |
145 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
146 | ||
147 | #define H_T0_Window_Spill_6_Other_Trap | |
148 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
149 | ||
150 | #define H_T0_Window_Spill_7_Other_Trap | |
151 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
152 | ||
153 | #define H_T0_Window_Fill_0_Normal_Trap | |
154 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
155 | ||
156 | #define H_T0_Window_Fill_1_Normal_Trap | |
157 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
158 | ||
159 | #define H_T0_Window_Fill_2_Normal_Trap | |
160 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
161 | ||
162 | #define H_T0_Window_Fill_3_Normal_Trap | |
163 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
164 | ||
165 | #define H_T0_Window_Fill_4_Normal_Trap | |
166 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
167 | ||
168 | #define H_T0_Window_Fill_5_Normal_Trap | |
169 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
170 | ||
171 | #define H_T0_Window_Fill_6_Normal_Trap | |
172 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
173 | ||
174 | #define H_T0_Window_Fill_7_Normal_Trap | |
175 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
176 | ||
177 | #define H_T0_Window_Fill_0_Other_Trap | |
178 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
179 | ||
180 | #define H_T0_Window_Fill_1_Other_Trap | |
181 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
182 | ||
183 | #define H_T0_Window_Fill_2_Other_Trap | |
184 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
185 | ||
186 | #define H_T0_Window_Fill_3_Other_Trap | |
187 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
188 | ||
189 | #define H_T0_Window_Fill_4_Other_Trap | |
190 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
191 | ||
192 | #define H_T0_Window_Fill_5_Other_Trap | |
193 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
194 | ||
195 | #define H_T0_Window_Fill_6_Other_Trap | |
196 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
197 | ||
198 | #define H_T0_Window_Fill_7_Other_Trap | |
199 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
200 | # 162 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
201 | #define H_T1_Window_Spill_0_Normal_Trap | |
202 | #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
203 | ||
204 | #define H_T1_Window_Spill_1_Normal_Trap | |
205 | #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
206 | ||
207 | #define H_T1_Window_Spill_2_Normal_Trap | |
208 | #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
209 | ||
210 | #define H_T1_Window_Spill_3_Normal_Trap | |
211 | #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
212 | ||
213 | #define H_T1_Window_Spill_4_Normal_Trap | |
214 | #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
215 | ||
216 | #define H_T1_Window_Spill_5_Normal_Trap | |
217 | #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
218 | ||
219 | #define H_T1_Window_Spill_6_Normal_Trap | |
220 | #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
221 | ||
222 | #define H_T1_Window_Spill_7_Normal_Trap | |
223 | #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
224 | ||
225 | #define H_T1_Window_Spill_0_Other_Trap | |
226 | #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
227 | ||
228 | #define H_T1_Window_Spill_1_Other_Trap | |
229 | #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
230 | ||
231 | #define H_T1_Window_Spill_2_Other_Trap | |
232 | #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
233 | ||
234 | #define H_T1_Window_Spill_3_Other_Trap | |
235 | #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
236 | ||
237 | #define H_T1_Window_Spill_4_Other_Trap | |
238 | #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
239 | ||
240 | #define H_T1_Window_Spill_5_Other_Trap | |
241 | #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
242 | ||
243 | #define H_T1_Window_Spill_6_Other_Trap | |
244 | #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
245 | ||
246 | #define H_T1_Window_Spill_7_Other_Trap | |
247 | #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
248 | ||
249 | #define H_T1_Window_Fill_0_Normal_Trap | |
250 | #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
251 | ||
252 | #define H_T1_Window_Fill_1_Normal_Trap | |
253 | #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
254 | ||
255 | #define H_T1_Window_Fill_2_Normal_Trap | |
256 | #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
257 | ||
258 | #define H_T1_Window_Fill_3_Normal_Trap | |
259 | #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
260 | ||
261 | #define H_T1_Window_Fill_4_Normal_Trap | |
262 | #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
263 | ||
264 | #define H_T1_Window_Fill_5_Normal_Trap | |
265 | #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
266 | ||
267 | #define H_T1_Window_Fill_6_Normal_Trap | |
268 | #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
269 | ||
270 | #define H_T1_Window_Fill_7_Normal_Trap | |
271 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
272 | ||
273 | #define H_T1_Window_Fill_0_Other_Trap | |
274 | #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
275 | ||
276 | #define H_T1_Window_Fill_1_Other_Trap | |
277 | #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
278 | ||
279 | #define H_T1_Window_Fill_2_Other_Trap | |
280 | #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
281 | ||
282 | #define H_T1_Window_Fill_3_Other_Trap | |
283 | #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
284 | ||
285 | #define H_T1_Window_Fill_4_Other_Trap | |
286 | #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
287 | ||
288 | #define H_T1_Window_Fill_5_Other_Trap | |
289 | #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
290 | ||
291 | #define H_T1_Window_Fill_6_Other_Trap | |
292 | #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
293 | ||
294 | #define H_T1_Window_Fill_7_Other_Trap | |
295 | #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
296 | ||
297 | #define H_T0_Trap_Instruction_0 | |
298 | #define My_T0_Trap_Instruction_0 \ | |
299 | save %i7, %g0, %i7; \ | |
300 | rdpr %tnpc, %l2; \ | |
301 | wrpr %l2, %tpc; \ | |
302 | add %l2, 4, %l2;\ | |
303 | wrpr %l2, %tnpc; \ | |
304 | stw %l2, [%i7];\ | |
305 | restore %i7, %g0, %i7; \ | |
306 | retry | |
307 | #define H_T0_Trap_Instruction_1 | |
308 | #define My_T0_Trap_Instruction_1 \ | |
309 | umul %o4, 2, %o5;\ | |
310 | rdpr %tnpc, %l2; \ | |
311 | wrpr %l2, %tpc; \ | |
312 | add %l2, 4, %l2;\ | |
313 | wrpr %l2, %tnpc; \ | |
314 | stw %l2, [%i7];\ | |
315 | illtrap;\ | |
316 | retry | |
317 | #define H_T0_Trap_Instruction_2 | |
318 | #define My_T0_Trap_Instruction_2 \ | |
319 | inc %o3;\ | |
320 | umul %o3, 2, %o4;\ | |
321 | ba 1f; \ | |
322 | save %i7, %g0, %i7; \ | |
323 | 2: done; \ | |
324 | nop; \ | |
325 | 1: ba 2b; \ | |
326 | restore %i7, %g0, %i7 | |
327 | #define H_T0_Trap_Instruction_3 | |
328 | #define My_T0_Trap_Instruction_3 \ | |
329 | inc %l3;\ | |
330 | inc %o3;\ | |
331 | umul %o3, 2, %o4;\ | |
332 | stw %o4, [%i7];\ | |
333 | save %i7, %g0, %i7 ;\ | |
334 | restore %i7, %g0, %i7 ;\ | |
335 | done ;\ | |
336 | nop; | |
337 | #define H_T0_Trap_Instruction_4 | |
338 | #define My_T0_Trap_Instruction_4 \ | |
339 | umul %i4, 2, %l5;\ | |
340 | inc %o1;\ | |
341 | rdpr %tnpc, %l2; \ | |
342 | wrpr %l2, %tpc; \ | |
343 | add %l2, 4, %l2;\ | |
344 | wrpr %l2, %tnpc; \ | |
345 | retry ;\ | |
346 | illtrap | |
347 | #define H_T0_Trap_Instruction_5 | |
348 | #define My_T0_Trap_Instruction_5 \ | |
349 | umul %i7, 2, %l1;\ | |
350 | inc %o5;\ | |
351 | rdpr %tnpc, %l2; \ | |
352 | wrpr %l2, %tpc; \ | |
353 | add %l2, 4, %l2;\ | |
354 | wrpr %l2, %tnpc; \ | |
355 | sdiv %r2, %r10, %r0; \ | |
356 | retry | |
357 | ||
358 | #define H_T1_Trap_Instruction_0 | |
359 | #define My_T1_Trap_Instruction_0 \ | |
360 | inc %o4;\ | |
361 | umul %o4, 2, %o5;\ | |
362 | ba 3f; \ | |
363 | save %i7, %g0, %i7; \ | |
364 | 4: done; \ | |
365 | nop; \ | |
366 | 3: ba 4b; \ | |
367 | restore %i7, %g0, %i7 | |
368 | #define H_T1_Trap_Instruction_1 | |
369 | #define My_T1_Trap_Instruction_1 \ | |
370 | umul %o4, 2, %o5;\ | |
371 | rdpr %tnpc, %l2; \ | |
372 | wrpr %l2, %tpc; \ | |
373 | add %l2, 4, %l2;\ | |
374 | stw %l2, [%i7];\ | |
375 | wrpr %l2, %tnpc; \ | |
376 | restore %i7, %g0, %i7 ;;\ | |
377 | retry | |
378 | #define H_T1_Trap_Instruction_2 | |
379 | #define My_T1_Trap_Instruction_2 \ | |
380 | inc %o3;\ | |
381 | umul %o3, 2, %o4;\ | |
382 | ba 5f; \ | |
383 | save %i7, %g0, %i7; \ | |
384 | 6: done; \ | |
385 | nop; \ | |
386 | 5: ba 6b; \ | |
387 | restore %i7, %g0, %i7 | |
388 | #define H_T1_Trap_Instruction_3 | |
389 | #define My_T1_Trap_Instruction_3 \ | |
390 | inc %l3;\ | |
391 | inc %o3;\ | |
392 | umul %o3, 2, %o4;\ | |
393 | inc %i3;\ | |
394 | save %i7, %g0, %i7 ;\ | |
395 | restore %i7, %g0, %i7 ;\ | |
396 | done ;\ | |
397 | nop; | |
398 | #define H_T1_Trap_Instruction_4 | |
399 | #define My_T1_Trap_Instruction_4 \ | |
400 | umul %i4, 2, %l5;\ | |
401 | rdpr %tnpc, %l2; \ | |
402 | wrpr %l2, %tpc; \ | |
403 | stw %l2, [%i7];\ | |
404 | add %l2, 4, %l2;\ | |
405 | wrpr %l2, %tnpc; \ | |
406 | retry ;\ | |
407 | illtrap | |
408 | #define H_T1_Trap_Instruction_5 | |
409 | #define My_T1_Trap_Instruction_5 \ | |
410 | umul %i7, 2, %l1;\ | |
411 | inc %o5;\ | |
412 | rdpr %tnpc, %l2; \ | |
413 | wrpr %l2, %tpc; \ | |
414 | add %l2, 4, %l2;\ | |
415 | wrpr %l2, %tnpc; \ | |
416 | sdiv %r2, %r10, %r0; \ | |
417 | retry | |
418 | ||
419 | #define H_HT0_Trap_Instruction_0 | |
420 | #define My_HT0_Trap_Instruction_0 \ | |
421 | rd %asi, %l2;\ | |
422 | mov 0x80, %l3;\ | |
423 | stxa %l3, [%l3] 0x57;\ | |
424 | stw %l2, [%i7];\ | |
425 | done;\ | |
426 | nop;nop;nop | |
427 | ||
428 | #define H_HT0_Trap_Instruction_1 | |
429 | #define My_HT0_Trap_Instruction_1 \ | |
430 | rd %asi, %l2;\ | |
431 | mov 0x80, %l3;\ | |
432 | stxa %l3, [%l3] 0x5f;\ | |
433 | done;\ | |
434 | nop;nop;nop;nop | |
435 | #define H_HT0_Trap_Instruction_2 | |
436 | #define My_HT0_Trap_Instruction_2 \ | |
437 | umul %i6, 2, %l4;\ | |
438 | stw %l4, [%i7];\ | |
439 | rdpr %tnpc, %l2; \ | |
440 | wrpr %l2, %tpc; \ | |
441 | add %l2, 4, %l2;\ | |
442 | wrpr %l2, %tnpc; \ | |
443 | sdiv %r2, %r0, %r0; \ | |
444 | retry | |
445 | #define H_HT0_Trap_Instruction_3 | |
446 | #define My_HT0_Trap_Instruction_3 \ | |
447 | umul %i5, 3, %l3;\ | |
448 | inc %o6;\ | |
449 | illtrap ;\ | |
450 | rdpr %tnpc, %l2; \ | |
451 | wrpr %l2, %tpc; \ | |
452 | add %l2, 4, %l2;\ | |
453 | wrpr %l2, %tnpc; \ | |
454 | retry | |
455 | #define H_HT0_Trap_Instruction_4 | |
456 | #define My_HT0_Trap_Instruction_4 \ | |
457 | save %i7, %g0, %i7; \ | |
458 | rdpr %tnpc, %l2; \ | |
459 | wrpr %l2, %tpc; \ | |
460 | add %l2, 4, %l2;\ | |
461 | stw %l2, [%i7];\ | |
462 | wrpr %l2, %tnpc; \ | |
463 | restore %i7, %g0, %i7 ;\ | |
464 | retry | |
465 | #define H_HT0_Trap_Instruction_5 | |
466 | #define My_HT0_Trap_Instruction_5 \ | |
467 | ba htrap_5_ext;\ | |
468 | nop; retry;\ | |
469 | nop; nop; nop; nop; nop | |
470 | ||
471 | #define H_HT0_Mem_Address_Not_Aligned_0x34 | |
472 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ | |
473 | inc %l6;\ | |
474 | save %i7, %g0, %i7 ;\ | |
475 | done ;\ | |
476 | nop; | |
477 | #define H_HT0_Illegal_instruction_0x10 | |
478 | #define My_HT0_Illegal_instruction_0x10 \ | |
479 | restore %i7, %g0, %i7 ;\ | |
480 | ba 7f; \ | |
481 | rdhpr %htstate, %l3;\ | |
482 | 8: done; \ | |
483 | 7: ba 8b;\ | |
484 | wrhpr %l3, 1, %htstate;nop | |
485 | ||
486 | #define H_HT0_DAE_so_page_0x30 | |
487 | #define My_HT0_DAE_so_page_0x30 \ | |
488 | restore %i7, %g0, %i7;\ | |
489 | rd %fprs, %l2; \ | |
490 | wr %l2, 0x4, %fprs ;\ | |
491 | done; \ | |
492 | nop; | |
493 | #define H_HT0_DAE_invalid_asi_0x14 | |
494 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ | |
495 | save %i7, %g0, %i7; \ | |
496 | rd %fprs, %l2; \ | |
497 | wr %l2, 0x4, %fprs ;\ | |
498 | done; \ | |
499 | nop; | |
500 | #define H_HT0_DAE_privilege_violation_0x15 | |
501 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ | |
502 | save %i7, %g0, %i7; \ | |
503 | rd %fprs, %l2; \ | |
504 | wr %l2, 0x4, %fprs ;\ | |
505 | done; \ | |
506 | nop; | |
507 | #define H_HT0_Privileged_Action_0x37 | |
508 | #define My_HT0_Privileged_Action_0x37 \ | |
509 | restore %i7, %g0, %i7;\ | |
510 | done; \ | |
511 | nop; nop | |
512 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
513 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ | |
514 | rdpr %tpc, %l2; \ | |
515 | add %l2, 0x4, %l2; \ | |
516 | wrpr %l2, %tpc; \ | |
517 | add %l2, 0x4, %l2; \ | |
518 | wrpr %l2, %tnpc; \ | |
519 | retry | |
520 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
521 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ | |
522 | rdpr %tpc, %l2; \ | |
523 | add %l2, 0x4, %l2; \ | |
524 | wrpr %l2, %tpc; \ | |
525 | add %l2, 0x4, %l2; \ | |
526 | wrpr %l2, %tnpc; \ | |
527 | retry | |
528 | #define H_HT0_Fp_exception_other_0x22 | |
529 | #define My_HT0_Fp_exception_other_0x22 \ | |
530 | umul %i5, 4, %l2;\ | |
531 | save %i7, %g0, %i7; \ | |
532 | stw %l2, [%i7];\ | |
533 | done; \ | |
534 | nop | |
535 | #define H_HT0_Division_By_Zero | |
536 | #define My_HT0_Division_By_Zero \ | |
537 | umul %i5, 4, %l2;\ | |
538 | done; \ | |
539 | nop; nop | |
540 | #define H_T0_Division_By_Zero | |
541 | #define My_T0_Division_By_Zero \ | |
542 | inc %l6;\ | |
543 | dec %l5;\ | |
544 | umul %i5, 4, %l2;\ | |
545 | done; \ | |
546 | nop; nop | |
547 | #define H_T1_Division_By_Zero_0x28 | |
548 | #define My_H_T1_Division_By_Zero_0x28 \ | |
549 | inc %l6;\ | |
550 | dec %l5;\ | |
551 | umul %i5, 4, %l2;\ | |
552 | save %i7, %g0, %i7; \ | |
553 | restore %i7, %g0, %i7;\ | |
554 | done; \ | |
555 | nop; nop | |
556 | ||
557 | #define H_T0_Division_By_Zero | |
558 | #define My_T0_Division_By_Zero\ | |
559 | inc %l6;\ | |
560 | dec %l5;\ | |
561 | umul %i5, 4, %l2;\ | |
562 | save %i7, %g0, %i7; \ | |
563 | restore %i7, %g0, %i7;\ | |
564 | done; \ | |
565 | nop; nop | |
566 | ||
567 | #define H_T1_Fp_Exception_Other_0x22 | |
568 | #define My_H_T1_Fp_Exception_Other_0x22 \ | |
569 | inc %l6;\ | |
570 | dec %l5;\ | |
571 | umul %i5, 4, %l2;\ | |
572 | save %i7, %g0, %i7; \ | |
573 | restore %i7, %g0, %i7;\ | |
574 | done; \ | |
575 | nop; nop | |
576 | #define H_T1_Privileged_Opcode_0x11 | |
577 | #define SUN_H_T1_Privileged_Opcode_0x11 \ | |
578 | stw %l5, [%i7];\ | |
579 | umul %i5, 4, %l2;\ | |
580 | restore %i7, %g0, %i7;\ | |
581 | done; \ | |
582 | nop; | |
583 | ||
584 | #define H_HT0_Privileged_opcode_0x11 | |
585 | #define My_HT0_Privileged_opcode_0x11 \ | |
586 | xor %i0, %l1, %l1;\ | |
587 | and %l1, 0xf, %l1; \ | |
588 | ba hh11_1; \ | |
589 | not %g0, %l2; \ | |
590 | hh11_2: done; \ | |
591 | hh11_1: xor %l1, %l2, %l2; \ | |
592 | ba hh11_2; \ | |
593 | jmp %l2; | |
594 | ||
595 | #define H_HT0_Fp_disabled_0x20 | |
596 | #define My_HT0_Fp_disabled_0x20 \ | |
597 | mov 0x4, %l2 ;\ | |
598 | wr %l2, 0x0, %fprs ;\ | |
599 | sllx %l2, 10, %l3; \ | |
600 | rdpr %tstate, %l2;\ | |
601 | or %l2, %l3, %l2 ;\ | |
602 | stw %l2, [%i7];\ | |
603 | wrpr %l2, 0x0, %tstate;\ | |
604 | retry; | |
605 | ||
606 | #define H_T0_Fp_disabled_0x20 | |
607 | #define My_T0_Fp_disabled_0x20 \ | |
608 | mov 0x4, %l2 ;\ | |
609 | wr %l2, 0x0, %fprs ;\ | |
610 | sllx %l2, 10, %l3; \ | |
611 | rdpr %tstate, %l2;\ | |
612 | or %l2, %l3, %l2 ;\ | |
613 | wrpr %l2, 0x0, %tstate;\ | |
614 | retry; nop | |
615 | ||
616 | #define H_T1_Fp_Disabled_0x20 | |
617 | #define My_H_T1_Fp_Disabled_0x20 \ | |
618 | mov 0x4, %l2 ;\ | |
619 | wr %l2, 0x0, %fprs ;\ | |
620 | sllx %l2, 10, %l3; \ | |
621 | rdpr %tstate, %l2;\ | |
622 | or %l2, %l3, %l2 ;\ | |
623 | wrpr %l2, 0x0, %tstate;\ | |
624 | stw %l2, [%i7];\ | |
625 | retry | |
626 | ||
627 | #define H_HT0_Watchdog_Reset_0x02 | |
628 | #define My_HT0_Watchdog_Reset_0x02 \ | |
629 | ba wdog_2_ext;\ | |
630 | nop;retry;nop;nop;nop;nop;nop | |
631 | ||
632 | #define H_T0_Privileged_opcode_0x11 | |
633 | #define My_T0_Privileged_opcode_0x11 \ | |
634 | ba h11_1; \ | |
635 | not %g0, %l2; \ | |
636 | h11_2: done; \ | |
637 | h11_1: xor %l1, %l2, %l2; \ | |
638 | ba h11_2; \ | |
639 | jmp %l2; | |
640 | ||
641 | #define H_T1_Fp_exception_other_0x22 | |
642 | #define My_T1_Fp_exception_other_0x22 \ | |
643 | restore %i7, %g0, %i7 ; \ | |
644 | save %i7, %g0, %i7; \ | |
645 | restore %i7, %g0, %i7;\ | |
646 | ldx [%l2], %l2;\ | |
647 | done; | |
648 | ||
649 | #define H_T0_Fp_exception_other_0x22 | |
650 | #define My_T0_Fp_exception_other_0x22 \ | |
651 | inc %l6;\ | |
652 | dec %l5;\ | |
653 | umul %i5, 4, %l2;\ | |
654 | save %i7, %g0, %i7; \ | |
655 | restore %i7, %g0, %i7;\ | |
656 | stw %l2, [%i7];\ | |
657 | done; \ | |
658 | nop | |
659 | ||
660 | #define H_HT0_Trap_Level_Zero_0x5f | |
661 | #define My_HT0_Trap_Level_Zero_0x5f \ | |
662 | not %g0, %r13; \ | |
663 | rdhpr %hpstate, %l3;\ | |
664 | jmp %r13;\ | |
665 | rdhpr %htstate, %l3;\ | |
666 | and %l3, 0xfe, %l3;\ | |
667 | wrhpr %l3, 0, %htstate;\ | |
668 | stw %r13, [%i7];\ | |
669 | retry | |
670 | ||
671 | #define My_Watchdog_Reset | |
672 | #define My_Watchdog_Reset \ | |
673 | ba wdog_red_ext;\ | |
674 | nop;retry;nop;nop;nop;nop;nop | |
675 | ||
676 | #define H_HT0_Control_Transfer_Instr_0x74 | |
677 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ | |
678 | rdpr %tstate, %l3;\ | |
679 | and %l3, 0xfff, %l3;\ | |
680 | wrpr %l3, %tstate ;\ | |
681 | retry;nop; | |
682 | ||
683 | #define H_T0_Control_Transfer_Instr_0x74 | |
684 | #define My_H_T0_Control_Transfer_Instr_0x74 \ | |
685 | rdpr %tstate, %l3;\ | |
686 | and %l3, 0xfff, %l3;\ | |
687 | wrpr %l3, %tstate ;\ | |
688 | retry;nop; | |
689 | ||
690 | #define H_T1_Control_Transfer_Instr_0x74 | |
691 | #define My_H_T1_Control_Transfer_Instr_0x74 \ | |
692 | rdpr %tstate, %l3;\ | |
693 | and %l3, 0xfff, %l3;\ | |
694 | wrpr %l3, %tstate ;\ | |
695 | retry;nop; | |
696 | ||
697 | #define H_HT0_IAE_privilege_violation_0x08 | |
698 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
699 | done; nop; | |
700 | #define H_HT0_IAE_unauth_access_0x0b | |
701 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
702 | done; nop; | |
703 | ||
704 | #define H_HT0_data_access_protection_0x6c | |
705 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop | |
706 | ||
707 | #define H_HT0_PA_Watchpoint_0x61 | |
708 | #define My_H_HT0_PA_Watchpoint_0x61 \ | |
709 | done;nop | |
710 | ||
711 | #define H_T0_VA_Watchpoint_0x62 | |
712 | #define My_T0_VA_Watchpoint_0x62 \ | |
713 | done; nop | |
714 | ||
715 | #define H_HT0_Instruction_VA_Watchpoint_0x75 | |
716 | #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ | |
717 | done;nop | |
718 | ||
719 | #define H_HT0_Instruction_Breakpoint_0x76 | |
720 | #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ | |
721 | done;nop | |
722 | # 685 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
723 | #define H_HT0_Instruction_address_range_0x0d | |
724 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
725 | done;nop | |
726 | ||
727 | #define H_HT0_mem_address_range_0x2e | |
728 | #define SUN_H_HT0_mem_address_range_0x2e \ | |
729 | done;nop | |
730 | ||
731 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
732 | # 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
733 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
734 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! | |
735 | ||
736 | #define H_HT0_Externally_Initiated_Reset_0x03 | |
737 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ | |
738 | setx External_Reset_Handler, %g1, %g2; \ | |
739 | jmp %g2; \ | |
740 | nop | |
741 | ||
742 | !!!!! HW interrupt handlers | |
743 | ||
744 | #define H_HT0_Interrupt_0x60 | |
745 | #define My_HT0_Interrupt_0x60 \ | |
746 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g1 ;\ | |
747 | ldxa [%g0] ASI_SWVR_INTR_R, %g2 ;\ | |
748 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ | |
749 | cmp %g1, %g3 ;\ | |
750 | nop; \ | |
751 | retry; | |
752 | ||
753 | !!!!! Queue interrupt handler | |
754 | # 36 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
755 | #define H_T0_Cpu_Mondo_Trap_0x7c | |
756 | #define My_T0_Cpu_Mondo_Trap_0x7c \ | |
757 | mov 0x3c8, %g3; \ | |
758 | ldxa [%g3] 0x25, %g5; \ | |
759 | mov 0x3c0, %g3; \ | |
760 | stxa %g5, [%g3] 0x25; \ | |
761 | retry; \ | |
762 | nop; \ | |
763 | nop; \ | |
764 | nop | |
765 | ||
766 | #define H_T0_Dev_Mondo_Trap_0x7d | |
767 | #define My_T0_Dev_Mondo_Trap_0x7d \ | |
768 | mov 0x3d8, %g3; \ | |
769 | ldxa [%g3] 0x25, %g5; \ | |
770 | mov 0x3d0, %g3; \ | |
771 | stxa %g5, [%g3] 0x25; \ | |
772 | retry; \ | |
773 | nop; \ | |
774 | nop; \ | |
775 | nop | |
776 | ||
777 | #define H_T0_Resumable_Error_0x7e | |
778 | #define My_T0_Resumable_Error_0x7e \ | |
779 | mov 0x3e8, %g3; \ | |
780 | ldxa [%g3] 0x25, %g5; \ | |
781 | mov 0x3e0, %g3; \ | |
782 | stxa %g5, [%g3] 0x25; \ | |
783 | retry; \ | |
784 | nop; \ | |
785 | nop; \ | |
786 | nop | |
787 | ||
788 | #define H_T1_Cpu_Mondo_Trap_0x7c | |
789 | #define My_T1_Cpu_Mondo_Trap_0x7c \ | |
790 | mov 0x3c8, %g3; \ | |
791 | ldxa [%g3] 0x25, %g5; \ | |
792 | mov 0x3c0, %g3; \ | |
793 | stxa %g5, [%g3] 0x25; \ | |
794 | retry; \ | |
795 | nop; \ | |
796 | nop; \ | |
797 | nop | |
798 | ||
799 | #define H_T1_Dev_Mondo_Trap_0x7d | |
800 | #define My_T1_Dev_Mondo_Trap_0x7d \ | |
801 | mov 0x3d8, %g3; \ | |
802 | ldxa [%g3] 0x25, %g5; \ | |
803 | mov 0x3d0, %g3; \ | |
804 | stxa %g5, [%g3] 0x25; \ | |
805 | retry; \ | |
806 | nop; \ | |
807 | nop; \ | |
808 | nop | |
809 | ||
810 | #define H_T1_Resumable_Error_0x7e | |
811 | #define My_T1_Resumable_Error_0x7e \ | |
812 | mov 0x3e8, %g3; \ | |
813 | ldxa [%g3] 0x25, %g5; \ | |
814 | mov 0x3e0, %g3; \ | |
815 | stxa %g5, [%g3] 0x25; \ | |
816 | retry; \ | |
817 | nop; \ | |
818 | nop; \ | |
819 | nop | |
820 | ||
821 | #define H_HT0_Reserved_0x7c | |
822 | #define SUN_H_HT0_Reserved_0x7c \ | |
823 | mov 0x3c8, %g3; \ | |
824 | ldxa [%g3] 0x25, %g5; \ | |
825 | mov 0x3c0, %g3; \ | |
826 | stxa %g5, [%g3] 0x25; \ | |
827 | retry; \ | |
828 | nop; \ | |
829 | nop; \ | |
830 | nop | |
831 | ||
832 | #define H_HT0_Reserved_0x7d | |
833 | #define SUN_H_HT0_Reserved_0x7d \ | |
834 | mov 0x3d8, %g3; \ | |
835 | ldxa [%g3] 0x25, %g5; \ | |
836 | mov 0x3d0, %g3; \ | |
837 | stxa %g5, [%g3] 0x25; \ | |
838 | retry; \ | |
839 | nop; \ | |
840 | nop; \ | |
841 | nop | |
842 | ||
843 | #define H_HT0_Reserved_0x7e | |
844 | #define SUN_H_HT0_Reserved_0x7e \ | |
845 | mov 0x3e8, %g3; \ | |
846 | ldxa [%g3] 0x25, %g5; \ | |
847 | mov 0x3e0, %g3; \ | |
848 | stxa %g5, [%g3] 0x25; \ | |
849 | retry; \ | |
850 | nop; \ | |
851 | nop; \ | |
852 | nop | |
853 | # 136 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
854 | !!!!! Hstick-match trap handler | |
855 | # 139 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
856 | #define H_T0_Reserved_0x5e | |
857 | #define My_T0_Reserved_0x5e \ | |
858 | rdhpr %hintp, %g3; \ | |
859 | wrhpr %g3, %g3, %hintp; \ | |
860 | retry; \ | |
861 | nop; \ | |
862 | nop; \ | |
863 | nop; \ | |
864 | nop; \ | |
865 | nop | |
866 | ||
867 | #define H_HT0_Hstick_Match_0x5e | |
868 | #define My_HT0_Hstick_Match_0x5e \ | |
869 | rdhpr %hintp, %g3; \ | |
870 | wrhpr %g3, %g3, %hintp; \ | |
871 | retry; \ | |
872 | nop; \ | |
873 | nop; \ | |
874 | nop; \ | |
875 | nop; \ | |
876 | nop | |
877 | ||
878 | #define H_T0_Reserved_0x5e | |
879 | #define My_T0_Reserved_0x5e \ | |
880 | rdhpr %hintp, %g3; \ | |
881 | wrhpr %g3, %g3, %hintp; \ | |
882 | retry; \ | |
883 | nop; \ | |
884 | nop; \ | |
885 | nop; \ | |
886 | nop; \ | |
887 | nop | |
888 | ||
889 | #define H_T1_Reserved_0x5e | |
890 | #define My_T1_Reserved_0x5e \ | |
891 | rdhpr %hintp, %g3; \ | |
892 | wrhpr %g3, %g3, %hintp; \ | |
893 | retry; \ | |
894 | nop; \ | |
895 | nop; \ | |
896 | nop; \ | |
897 | nop; \ | |
898 | nop | |
899 | # 184 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
900 | !!!!! SW interuupt handlers | |
901 | # 187 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
902 | #define H_T0_Interrupt_Level_14_0x4e | |
903 | #define My_T0_Interrupt_Level_14_0x4e \ | |
904 | rd %softint, %g3; \ | |
905 | sethi %hi(0x14000), %g3; \ | |
906 | or %g3, 0x1, %g3; \ | |
907 | wr %g3, %g0, %clear_softint; \ | |
908 | retry; \ | |
909 | nop; \ | |
910 | nop; \ | |
911 | nop | |
912 | ||
913 | #define H_T0_Interrupt_Level_1_0x41 | |
914 | #define My_T0_Interrupt_Level_1_0x41 \ | |
915 | rd %softint, %g3; \ | |
916 | or %g0, 0x2, %g3; \ | |
917 | wr %g3, %g0, %clear_softint; \ | |
918 | retry; \ | |
919 | nop; \ | |
920 | nop; \ | |
921 | nop; \ | |
922 | nop | |
923 | ||
924 | #define H_T0_Interrupt_Level_2_0x42 | |
925 | #define My_T0_Interrupt_Level_2_0x42 \ | |
926 | rd %softint, %g3; \ | |
927 | or %g0, 0x4, %g3; \ | |
928 | wr %g3, %g0, %clear_softint; \ | |
929 | retry; \ | |
930 | nop; \ | |
931 | nop; \ | |
932 | nop; \ | |
933 | nop | |
934 | ||
935 | #define H_T0_Interrupt_Level_3_0x43 | |
936 | #define My_T0_Interrupt_Level_3_0x43 \ | |
937 | rd %softint, %g3; \ | |
938 | or %g0, 0x8, %g3; \ | |
939 | wr %g3, %g0, %clear_softint; \ | |
940 | retry; \ | |
941 | nop; \ | |
942 | nop; \ | |
943 | nop; \ | |
944 | nop | |
945 | ||
946 | #define H_T0_Interrupt_Level_4_0x44 | |
947 | #define My_T0_Interrupt_Level_4_0x44 \ | |
948 | rd %softint, %g3; \ | |
949 | or %g0, 0x10, %g3; \ | |
950 | wr %g3, %g0, %clear_softint; \ | |
951 | retry; \ | |
952 | nop; \ | |
953 | nop; \ | |
954 | nop; \ | |
955 | nop | |
956 | ||
957 | #define H_T0_Interrupt_Level_5_0x45 | |
958 | #define My_T0_Interrupt_Level_5_0x45 \ | |
959 | rd %softint, %g3; \ | |
960 | or %g0, 0x20, %g3; \ | |
961 | wr %g3, %g0, %clear_softint; \ | |
962 | retry; \ | |
963 | nop; \ | |
964 | nop; \ | |
965 | nop; \ | |
966 | nop | |
967 | ||
968 | #define H_T0_Interrupt_Level_6_0x46 | |
969 | #define My_T0_Interrupt_Level_6_0x46 \ | |
970 | rd %softint, %g3; \ | |
971 | or %g0, 0x40, %g3; \ | |
972 | wr %g3, %g0, %clear_softint; \ | |
973 | retry; \ | |
974 | nop; \ | |
975 | nop; \ | |
976 | nop; \ | |
977 | nop | |
978 | ||
979 | #define H_T0_Interrupt_Level_7_0x47 | |
980 | #define My_T0_Interrupt_Level_7_0x47 \ | |
981 | rd %softint, %g3; \ | |
982 | or %g0, 0x80, %g3; \ | |
983 | wr %g3, %g0, %clear_softint; \ | |
984 | retry; \ | |
985 | nop; \ | |
986 | nop; \ | |
987 | nop; \ | |
988 | nop | |
989 | ||
990 | #define H_T0_Interrupt_Level_8_0x48 | |
991 | #define My_T0_Interrupt_Level_8_0x48 \ | |
992 | rd %softint, %g3; \ | |
993 | or %g0, 0x100, %g3; \ | |
994 | wr %g3, %g0, %clear_softint; \ | |
995 | retry; \ | |
996 | nop; \ | |
997 | nop; \ | |
998 | nop; \ | |
999 | nop | |
1000 | ||
1001 | #define H_T0_Interrupt_Level_9_0x49 | |
1002 | #define My_T0_Interrupt_Level_9_0x49 \ | |
1003 | rd %softint, %g3; \ | |
1004 | or %g0, 0x200, %g3; \ | |
1005 | wr %g3, %g0, %clear_softint; \ | |
1006 | retry; \ | |
1007 | nop; \ | |
1008 | nop; \ | |
1009 | nop; \ | |
1010 | nop | |
1011 | ||
1012 | #define H_T0_Interrupt_Level_10_0x4a | |
1013 | #define My_T0_Interrupt_Level_10_0x4a \ | |
1014 | rd %softint, %g3; \ | |
1015 | or %g0, 0x400, %g3; \ | |
1016 | wr %g3, %g0, %clear_softint; \ | |
1017 | retry; \ | |
1018 | nop; \ | |
1019 | nop; \ | |
1020 | nop; \ | |
1021 | nop | |
1022 | ||
1023 | #define H_T0_Interrupt_Level_11_0x4b | |
1024 | #define My_T0_Interrupt_Level_11_0x4b \ | |
1025 | rd %softint, %g3; \ | |
1026 | or %g0, 0x800, %g3; \ | |
1027 | wr %g3, %g0, %clear_softint; \ | |
1028 | retry; \ | |
1029 | nop; \ | |
1030 | nop; \ | |
1031 | nop; \ | |
1032 | nop | |
1033 | ||
1034 | #define H_T0_Interrupt_Level_12_0x4c | |
1035 | #define My_T0_Interrupt_Level_12_0x4c \ | |
1036 | rd %softint, %g3; \ | |
1037 | sethi %hi(0x1000), %g3; \ | |
1038 | wr %g3, %g0, %clear_softint; \ | |
1039 | retry; \ | |
1040 | nop; \ | |
1041 | nop; \ | |
1042 | nop; \ | |
1043 | nop | |
1044 | ||
1045 | #define H_T0_Interrupt_Level_13_0x4d | |
1046 | #define My_T0_Interrupt_Level_13_0x4d \ | |
1047 | rd %softint, %g3; \ | |
1048 | sethi %hi(0x2000), %g3; \ | |
1049 | wr %g3, %g0, %clear_softint; \ | |
1050 | retry; \ | |
1051 | nop; \ | |
1052 | nop; \ | |
1053 | nop; \ | |
1054 | nop | |
1055 | ||
1056 | #define H_T0_Interrupt_Level_15_0x4f | |
1057 | #define My_T0_Interrupt_Level_15_0x4f \ | |
1058 | sethi %hi(0x8000), %g3; \ | |
1059 | wr %g3, %g0, %clear_softint; \ | |
1060 | wr %g0, %g0, %pic;\ | |
1061 | sethi %hi(0x80040000), %g2;\ | |
1062 | rd %pcr, %g3;\ | |
1063 | andn %g3, %g2, %g3;\ | |
1064 | wr %g3, %g0, %pcr;\ | |
1065 | retry; | |
1066 | ||
1067 | #define H_T1_Interrupt_Level_14_0x4e | |
1068 | #define My_T1_Interrupt_Level_14_0x4e \ | |
1069 | rd %softint, %g3; \ | |
1070 | sethi %hi(0x14000), %g3; \ | |
1071 | or %g3, 0x1, %g3; \ | |
1072 | wr %g3, %g0, %clear_softint; \ | |
1073 | retry; \ | |
1074 | nop; \ | |
1075 | nop; \ | |
1076 | nop | |
1077 | ||
1078 | #define H_T1_Interrupt_Level_1_0x41 | |
1079 | #define My_T1_Interrupt_Level_1_0x41 \ | |
1080 | rd %softint, %g3; \ | |
1081 | or %g0, 0x2, %g3; \ | |
1082 | wr %g3, %g0, %clear_softint; \ | |
1083 | retry; \ | |
1084 | nop; \ | |
1085 | nop; \ | |
1086 | nop; \ | |
1087 | nop | |
1088 | ||
1089 | #define H_T1_Interrupt_Level_2_0x42 | |
1090 | #define My_T1_Interrupt_Level_2_0x42 \ | |
1091 | rd %softint, %g3; \ | |
1092 | or %g0, 0x4, %g3; \ | |
1093 | wr %g3, %g0, %clear_softint; \ | |
1094 | retry; \ | |
1095 | nop; \ | |
1096 | nop; \ | |
1097 | nop; \ | |
1098 | nop | |
1099 | ||
1100 | #define H_T1_Interrupt_Level_3_0x43 | |
1101 | #define My_T1_Interrupt_Level_3_0x43 \ | |
1102 | rd %softint, %g3; \ | |
1103 | or %g0, 0x8, %g3; \ | |
1104 | wr %g3, %g0, %clear_softint; \ | |
1105 | retry; \ | |
1106 | nop; \ | |
1107 | nop; \ | |
1108 | nop; \ | |
1109 | nop | |
1110 | ||
1111 | #define H_T1_Interrupt_Level_4_0x44 | |
1112 | #define My_T1_Interrupt_Level_4_0x44 \ | |
1113 | rd %softint, %g3; \ | |
1114 | or %g0, 0x10, %g3; \ | |
1115 | wr %g3, %g0, %clear_softint; \ | |
1116 | retry; \ | |
1117 | nop; \ | |
1118 | nop; \ | |
1119 | nop; \ | |
1120 | nop | |
1121 | ||
1122 | #define H_T1_Interrupt_Level_5_0x45 | |
1123 | #define My_T1_Interrupt_Level_5_0x45 \ | |
1124 | rd %softint, %g3; \ | |
1125 | or %g0, 0x20, %g3; \ | |
1126 | wr %g3, %g0, %clear_softint; \ | |
1127 | retry; \ | |
1128 | nop; \ | |
1129 | nop; \ | |
1130 | nop; \ | |
1131 | nop | |
1132 | ||
1133 | #define H_T1_Interrupt_Level_6_0x46 | |
1134 | #define My_T1_Interrupt_Level_6_0x46 \ | |
1135 | rd %softint, %g3; \ | |
1136 | or %g0, 0x40, %g3; \ | |
1137 | wr %g3, %g0, %clear_softint; \ | |
1138 | retry; \ | |
1139 | nop; \ | |
1140 | nop; \ | |
1141 | nop; \ | |
1142 | nop | |
1143 | ||
1144 | #define H_T1_Interrupt_Level_7_0x47 | |
1145 | #define My_T1_Interrupt_Level_7_0x47 \ | |
1146 | rd %softint, %g3; \ | |
1147 | or %g0, 0x80, %g3; \ | |
1148 | wr %g3, %g0, %clear_softint; \ | |
1149 | retry; \ | |
1150 | nop; \ | |
1151 | nop; \ | |
1152 | nop; \ | |
1153 | nop | |
1154 | ||
1155 | #define H_T1_Interrupt_Level_8_0x48 | |
1156 | #define My_T1_Interrupt_Level_8_0x48 \ | |
1157 | rd %softint, %g3; \ | |
1158 | or %g0, 0x100, %g3; \ | |
1159 | wr %g3, %g0, %clear_softint; \ | |
1160 | retry; \ | |
1161 | nop; \ | |
1162 | nop; \ | |
1163 | nop; \ | |
1164 | nop | |
1165 | ||
1166 | #define H_T1_Interrupt_Level_9_0x49 | |
1167 | #define My_T1_Interrupt_Level_9_0x49 \ | |
1168 | rd %softint, %g3; \ | |
1169 | or %g0, 0x200, %g3; \ | |
1170 | wr %g3, %g0, %clear_softint; \ | |
1171 | retry; \ | |
1172 | nop; \ | |
1173 | nop; \ | |
1174 | nop; \ | |
1175 | nop | |
1176 | ||
1177 | #define H_T1_Interrupt_Level_10_0x4a | |
1178 | #define My_T1_Interrupt_Level_10_0x4a \ | |
1179 | rd %softint, %g3; \ | |
1180 | or %g0, 0x400, %g3; \ | |
1181 | wr %g3, %g0, %clear_softint; \ | |
1182 | retry; \ | |
1183 | nop; \ | |
1184 | nop; \ | |
1185 | nop; \ | |
1186 | nop | |
1187 | ||
1188 | #define H_T1_Interrupt_Level_11_0x4b | |
1189 | #define My_T1_Interrupt_Level_11_0x4b \ | |
1190 | rd %softint, %g3; \ | |
1191 | or %g0, 0x800, %g3; \ | |
1192 | wr %g3, %g0, %clear_softint; \ | |
1193 | retry; \ | |
1194 | nop; \ | |
1195 | nop; \ | |
1196 | nop; \ | |
1197 | nop | |
1198 | ||
1199 | #define H_T1_Interrupt_Level_12_0x4c | |
1200 | #define My_T1_Interrupt_Level_12_0x4c \ | |
1201 | rd %softint, %g3; \ | |
1202 | sethi %hi(0x1000), %g3; \ | |
1203 | wr %g3, %g0, %clear_softint; \ | |
1204 | retry; \ | |
1205 | nop; \ | |
1206 | nop; \ | |
1207 | nop; \ | |
1208 | nop | |
1209 | ||
1210 | #define H_T1_Interrupt_Level_13_0x4d | |
1211 | #define My_T1_Interrupt_Level_13_0x4d \ | |
1212 | rd %softint, %g3; \ | |
1213 | sethi %hi(0x2000), %g3; \ | |
1214 | wr %g3, %g0, %clear_softint; \ | |
1215 | retry; \ | |
1216 | nop; \ | |
1217 | nop; \ | |
1218 | nop; \ | |
1219 | nop | |
1220 | ||
1221 | #define H_T1_Interrupt_Level_15_0x4f | |
1222 | #define My_T1_Interrupt_Level_15_0x4f \ | |
1223 | sethi %hi(0x8000), %g3; \ | |
1224 | wr %g3, %g0, %clear_softint; \ | |
1225 | wr %g0, %g0, %pic;\ | |
1226 | sethi %hi(0x80040000), %g2;\ | |
1227 | rd %pcr, %g3;\ | |
1228 | andn %g3, %g2, %g3;\ | |
1229 | wr %g3, %g0, %pcr;\ | |
1230 | retry; | |
1231 | ||
1232 | #define H_HT0_Interrupt_Level_14_0x4e | |
1233 | #define My_HT0_Interrupt_Level_14_0x4e \ | |
1234 | rd %softint, %g3; \ | |
1235 | sethi %hi(0x14000), %g3; \ | |
1236 | or %g3, 0x1, %g3; \ | |
1237 | wr %g3, %g0, %clear_softint; \ | |
1238 | retry; \ | |
1239 | nop; \ | |
1240 | nop; \ | |
1241 | nop | |
1242 | ||
1243 | #define H_HT0_Interrupt_Level_1_0x41 | |
1244 | #define My_HT0_Interrupt_Level_1_0x41 \ | |
1245 | rd %softint, %g3; \ | |
1246 | or %g0, 0x2, %g3; \ | |
1247 | wr %g3, %g0, %clear_softint; \ | |
1248 | retry; \ | |
1249 | nop; \ | |
1250 | nop; \ | |
1251 | nop; \ | |
1252 | nop | |
1253 | ||
1254 | #define H_HT0_Interrupt_Level_2_0x42 | |
1255 | #define My_HT0_Interrupt_Level_2_0x42 \ | |
1256 | rd %softint, %g3; \ | |
1257 | or %g0, 0x4, %g3; \ | |
1258 | wr %g3, %g0, %clear_softint; \ | |
1259 | retry; \ | |
1260 | nop; \ | |
1261 | nop; \ | |
1262 | nop; \ | |
1263 | nop | |
1264 | ||
1265 | #define H_HT0_Interrupt_Level_3_0x43 | |
1266 | #define My_HT0_Interrupt_Level_3_0x43 \ | |
1267 | rd %softint, %g3; \ | |
1268 | or %g0, 0x8, %g3; \ | |
1269 | wr %g3, %g0, %clear_softint; \ | |
1270 | retry; \ | |
1271 | nop; \ | |
1272 | nop; \ | |
1273 | nop; \ | |
1274 | nop | |
1275 | ||
1276 | #define H_HT0_Interrupt_Level_4_0x44 | |
1277 | #define My_HT0_Interrupt_Level_4_0x44 \ | |
1278 | rd %softint, %g3; \ | |
1279 | or %g0, 0x10, %g3; \ | |
1280 | wr %g3, %g0, %clear_softint; \ | |
1281 | retry; \ | |
1282 | nop; \ | |
1283 | nop; \ | |
1284 | nop; \ | |
1285 | nop | |
1286 | ||
1287 | #define H_HT0_Interrupt_Level_5_0x45 | |
1288 | #define My_HT0_Interrupt_Level_5_0x45 \ | |
1289 | rd %softint, %g3; \ | |
1290 | or %g0, 0x20, %g3; \ | |
1291 | wr %g3, %g0, %clear_softint; \ | |
1292 | retry; \ | |
1293 | nop; \ | |
1294 | nop; \ | |
1295 | nop; \ | |
1296 | nop | |
1297 | ||
1298 | #define H_HT0_Interrupt_Level_6_0x46 | |
1299 | #define My_HT0_Interrupt_Level_6_0x46 \ | |
1300 | rd %softint, %g3; \ | |
1301 | or %g0, 0x40, %g3; \ | |
1302 | wr %g3, %g0, %clear_softint; \ | |
1303 | retry; \ | |
1304 | nop; \ | |
1305 | nop; \ | |
1306 | nop; \ | |
1307 | nop | |
1308 | ||
1309 | #define H_HT0_Interrupt_Level_7_0x47 | |
1310 | #define My_HT0_Interrupt_Level_7_0x47 \ | |
1311 | rd %softint, %g3; \ | |
1312 | or %g0, 0x80, %g3; \ | |
1313 | wr %g3, %g0, %clear_softint; \ | |
1314 | retry; \ | |
1315 | nop; \ | |
1316 | nop; \ | |
1317 | nop; \ | |
1318 | nop | |
1319 | ||
1320 | #define H_HT0_Interrupt_Level_8_0x48 | |
1321 | #define My_HT0_Interrupt_Level_8_0x48 \ | |
1322 | rd %softint, %g3; \ | |
1323 | or %g0, 0x100, %g3; \ | |
1324 | wr %g3, %g0, %clear_softint; \ | |
1325 | retry; \ | |
1326 | nop; \ | |
1327 | nop; \ | |
1328 | nop; \ | |
1329 | nop | |
1330 | ||
1331 | #define H_HT0_Interrupt_Level_9_0x49 | |
1332 | #define My_HT0_Interrupt_Level_9_0x49 \ | |
1333 | rd %softint, %g3; \ | |
1334 | or %g0, 0x200, %g3; \ | |
1335 | wr %g3, %g0, %clear_softint; \ | |
1336 | retry; \ | |
1337 | nop; \ | |
1338 | nop; \ | |
1339 | nop; \ | |
1340 | nop | |
1341 | ||
1342 | #define H_HT0_Interrupt_Level_10_0x4a | |
1343 | #define My_HT0_Interrupt_Level_10_0x4a \ | |
1344 | rd %softint, %g3; \ | |
1345 | or %g0, 0x400, %g3; \ | |
1346 | wr %g3, %g0, %clear_softint; \ | |
1347 | retry; \ | |
1348 | nop; \ | |
1349 | nop; \ | |
1350 | nop; \ | |
1351 | nop | |
1352 | ||
1353 | #define H_HT0_Interrupt_Level_11_0x4b | |
1354 | #define My_HT0_Interrupt_Level_11_0x4b \ | |
1355 | rd %softint, %g3; \ | |
1356 | or %g0, 0x800, %g3; \ | |
1357 | wr %g3, %g0, %clear_softint; \ | |
1358 | retry; \ | |
1359 | nop; \ | |
1360 | nop; \ | |
1361 | nop; \ | |
1362 | nop | |
1363 | ||
1364 | #define H_HT0_Interrupt_Level_12_0x4c | |
1365 | #define My_HT0_Interrupt_Level_12_0x4c \ | |
1366 | rd %softint, %g3; \ | |
1367 | sethi %hi(0x1000), %g3; \ | |
1368 | wr %g3, %g0, %clear_softint; \ | |
1369 | retry; \ | |
1370 | nop; \ | |
1371 | nop; \ | |
1372 | nop; \ | |
1373 | nop | |
1374 | ||
1375 | #define H_HT0_Interrupt_Level_13_0x4d | |
1376 | #define My_HT0_Interrupt_Level_13_0x4d \ | |
1377 | rd %softint, %g3; \ | |
1378 | sethi %hi(0x2000), %g3; \ | |
1379 | wr %g3, %g0, %clear_softint; \ | |
1380 | retry; \ | |
1381 | nop; \ | |
1382 | nop; \ | |
1383 | nop; \ | |
1384 | nop | |
1385 | ||
1386 | #define H_HT0_Interrupt_Level_15_0x4f | |
1387 | #define My_HT0_Interrupt_Level_15_0x4f \ | |
1388 | sethi %hi(0x8000), %g3; \ | |
1389 | wr %g3, %g0, %clear_softint; \ | |
1390 | wr %g0, %g0, %pic;\ | |
1391 | sethi %hi(0x80040000), %g2;\ | |
1392 | rd %pcr, %g3;\ | |
1393 | andn %g3, %g2, %g3;\ | |
1394 | wr %g3, %g0, %pcr;\ | |
1395 | retry; | |
1396 | ||
1397 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
1398 | # 218 "diag.j" | |
1399 | #include "hboot.s" | |
1400 | .text | |
1401 | .global main | |
1402 | main: | |
1403 | ||
1404 | ! Set up ld/st area per thread | |
1405 | ta T_RD_THID ! Result in %o1 = r9 | |
1406 | umul %r9, 256, %r31 | |
1407 | setx user_data_start, %r1, %r3 | |
1408 | add %r31, %r3, %r31 | |
1409 | wr %r0, 0x4, %asi | |
1410 | ||
1411 | !Initializing integer registers | |
1412 | ldx [%r31+0], %r0 | |
1413 | ldx [%r31+8], %r1 | |
1414 | ldx [%r31+16], %r2 | |
1415 | ldx [%r31+24], %r3 | |
1416 | ldx [%r31+32], %r4 | |
1417 | ldx [%r31+40], %r5 | |
1418 | ldx [%r31+48], %r6 | |
1419 | ldx [%r31+56], %r7 | |
1420 | ldx [%r31+64], %r8 | |
1421 | ldx [%r31+72], %r9 | |
1422 | ldx [%r31+80], %r10 | |
1423 | ldx [%r31+88], %r11 | |
1424 | ldx [%r31+96], %r12 | |
1425 | ldx [%r31+104], %r13 | |
1426 | ldx [%r31+112], %r14 | |
1427 | mov %r31, %r15 | |
1428 | ldx [%r31+128], %r16 | |
1429 | ldx [%r31+136], %r17 | |
1430 | ldx [%r31+144], %r18 | |
1431 | ldx [%r31+152], %r19 | |
1432 | ldx [%r31+160], %r20 | |
1433 | ldx [%r31+168], %r21 | |
1434 | ldx [%r31+176], %r22 | |
1435 | ldx [%r31+184], %r23 | |
1436 | ldx [%r31+192], %r24 | |
1437 | ldx [%r31+200], %r25 | |
1438 | ldx [%r31+208], %r26 | |
1439 | ldx [%r31+216], %r27 | |
1440 | ldx [%r31+224], %r28 | |
1441 | ldx [%r31+232], %r29 | |
1442 | mov 0xb3, %r14 | |
1443 | mov 0xb4, %r30 | |
1444 | save %r31, %r0, %r31 | |
1445 | ldx [%r31+0], %r0 | |
1446 | ldx [%r31+8], %r1 | |
1447 | ldx [%r31+16], %r2 | |
1448 | ldx [%r31+24], %r3 | |
1449 | ldx [%r31+32], %r4 | |
1450 | ldx [%r31+40], %r5 | |
1451 | ldx [%r31+48], %r6 | |
1452 | ldx [%r31+56], %r7 | |
1453 | ldx [%r31+64], %r8 | |
1454 | ldx [%r31+72], %r9 | |
1455 | ldx [%r31+80], %r10 | |
1456 | ldx [%r31+88], %r11 | |
1457 | ldx [%r31+96], %r12 | |
1458 | ldx [%r31+104], %r13 | |
1459 | ldx [%r31+112], %r14 | |
1460 | mov %r31, %r15 | |
1461 | ldx [%r31+128], %r16 | |
1462 | ldx [%r31+136], %r17 | |
1463 | ldx [%r31+144], %r18 | |
1464 | ldx [%r31+152], %r19 | |
1465 | ldx [%r31+160], %r20 | |
1466 | ldx [%r31+168], %r21 | |
1467 | ldx [%r31+176], %r22 | |
1468 | ldx [%r31+184], %r23 | |
1469 | ldx [%r31+192], %r24 | |
1470 | ldx [%r31+200], %r25 | |
1471 | ldx [%r31+208], %r26 | |
1472 | ldx [%r31+216], %r27 | |
1473 | ldx [%r31+224], %r28 | |
1474 | ldx [%r31+232], %r29 | |
1475 | mov 0x32, %r14 | |
1476 | mov 0xb4, %r30 | |
1477 | save %r31, %r0, %r31 | |
1478 | ldx [%r31+0], %r0 | |
1479 | ldx [%r31+8], %r1 | |
1480 | ldx [%r31+16], %r2 | |
1481 | ldx [%r31+24], %r3 | |
1482 | ldx [%r31+32], %r4 | |
1483 | ldx [%r31+40], %r5 | |
1484 | ldx [%r31+48], %r6 | |
1485 | ldx [%r31+56], %r7 | |
1486 | ldx [%r31+64], %r8 | |
1487 | ldx [%r31+72], %r9 | |
1488 | ldx [%r31+80], %r10 | |
1489 | ldx [%r31+88], %r11 | |
1490 | ldx [%r31+96], %r12 | |
1491 | ldx [%r31+104], %r13 | |
1492 | ldx [%r31+112], %r14 | |
1493 | mov %r31, %r15 | |
1494 | ldx [%r31+128], %r16 | |
1495 | ldx [%r31+136], %r17 | |
1496 | ldx [%r31+144], %r18 | |
1497 | ldx [%r31+152], %r19 | |
1498 | ldx [%r31+160], %r20 | |
1499 | ldx [%r31+168], %r21 | |
1500 | ldx [%r31+176], %r22 | |
1501 | ldx [%r31+184], %r23 | |
1502 | ldx [%r31+192], %r24 | |
1503 | ldx [%r31+200], %r25 | |
1504 | ldx [%r31+208], %r26 | |
1505 | ldx [%r31+216], %r27 | |
1506 | ldx [%r31+224], %r28 | |
1507 | ldx [%r31+232], %r29 | |
1508 | mov 0xb1, %r14 | |
1509 | mov 0x34, %r30 | |
1510 | save %r31, %r0, %r31 | |
1511 | ldx [%r31+0], %r0 | |
1512 | ldx [%r31+8], %r1 | |
1513 | ldx [%r31+16], %r2 | |
1514 | ldx [%r31+24], %r3 | |
1515 | ldx [%r31+32], %r4 | |
1516 | ldx [%r31+40], %r5 | |
1517 | ldx [%r31+48], %r6 | |
1518 | ldx [%r31+56], %r7 | |
1519 | ldx [%r31+64], %r8 | |
1520 | ldx [%r31+72], %r9 | |
1521 | ldx [%r31+80], %r10 | |
1522 | ldx [%r31+88], %r11 | |
1523 | ldx [%r31+96], %r12 | |
1524 | ldx [%r31+104], %r13 | |
1525 | ldx [%r31+112], %r14 | |
1526 | mov %r31, %r15 | |
1527 | ldx [%r31+128], %r16 | |
1528 | ldx [%r31+136], %r17 | |
1529 | ldx [%r31+144], %r18 | |
1530 | ldx [%r31+152], %r19 | |
1531 | ldx [%r31+160], %r20 | |
1532 | ldx [%r31+168], %r21 | |
1533 | ldx [%r31+176], %r22 | |
1534 | ldx [%r31+184], %r23 | |
1535 | ldx [%r31+192], %r24 | |
1536 | ldx [%r31+200], %r25 | |
1537 | ldx [%r31+208], %r26 | |
1538 | ldx [%r31+216], %r27 | |
1539 | ldx [%r31+224], %r28 | |
1540 | ldx [%r31+232], %r29 | |
1541 | mov 0x34, %r14 | |
1542 | mov 0xb4, %r30 | |
1543 | save %r31, %r0, %r31 | |
1544 | ldx [%r31+0], %r0 | |
1545 | ldx [%r31+8], %r1 | |
1546 | ldx [%r31+16], %r2 | |
1547 | ldx [%r31+24], %r3 | |
1548 | ldx [%r31+32], %r4 | |
1549 | ldx [%r31+40], %r5 | |
1550 | ldx [%r31+48], %r6 | |
1551 | ldx [%r31+56], %r7 | |
1552 | ldx [%r31+64], %r8 | |
1553 | ldx [%r31+72], %r9 | |
1554 | ldx [%r31+80], %r10 | |
1555 | ldx [%r31+88], %r11 | |
1556 | ldx [%r31+96], %r12 | |
1557 | ldx [%r31+104], %r13 | |
1558 | ldx [%r31+112], %r14 | |
1559 | mov %r31, %r15 | |
1560 | ldx [%r31+128], %r16 | |
1561 | ldx [%r31+136], %r17 | |
1562 | ldx [%r31+144], %r18 | |
1563 | ldx [%r31+152], %r19 | |
1564 | ldx [%r31+160], %r20 | |
1565 | ldx [%r31+168], %r21 | |
1566 | ldx [%r31+176], %r22 | |
1567 | ldx [%r31+184], %r23 | |
1568 | ldx [%r31+192], %r24 | |
1569 | ldx [%r31+200], %r25 | |
1570 | ldx [%r31+208], %r26 | |
1571 | ldx [%r31+216], %r27 | |
1572 | ldx [%r31+224], %r28 | |
1573 | ldx [%r31+232], %r29 | |
1574 | mov 0xb4, %r14 | |
1575 | mov 0x32, %r30 | |
1576 | save %r31, %r0, %r31 | |
1577 | ldx [%r31+0], %r0 | |
1578 | ldx [%r31+8], %r1 | |
1579 | ldx [%r31+16], %r2 | |
1580 | ldx [%r31+24], %r3 | |
1581 | ldx [%r31+32], %r4 | |
1582 | ldx [%r31+40], %r5 | |
1583 | ldx [%r31+48], %r6 | |
1584 | ldx [%r31+56], %r7 | |
1585 | ldx [%r31+64], %r8 | |
1586 | ldx [%r31+72], %r9 | |
1587 | ldx [%r31+80], %r10 | |
1588 | ldx [%r31+88], %r11 | |
1589 | ldx [%r31+96], %r12 | |
1590 | ldx [%r31+104], %r13 | |
1591 | ldx [%r31+112], %r14 | |
1592 | mov %r31, %r15 | |
1593 | ldx [%r31+128], %r16 | |
1594 | ldx [%r31+136], %r17 | |
1595 | ldx [%r31+144], %r18 | |
1596 | ldx [%r31+152], %r19 | |
1597 | ldx [%r31+160], %r20 | |
1598 | ldx [%r31+168], %r21 | |
1599 | ldx [%r31+176], %r22 | |
1600 | ldx [%r31+184], %r23 | |
1601 | ldx [%r31+192], %r24 | |
1602 | ldx [%r31+200], %r25 | |
1603 | ldx [%r31+208], %r26 | |
1604 | ldx [%r31+216], %r27 | |
1605 | ldx [%r31+224], %r28 | |
1606 | ldx [%r31+232], %r29 | |
1607 | mov 0x31, %r14 | |
1608 | mov 0x32, %r30 | |
1609 | save %r31, %r0, %r31 | |
1610 | ldx [%r31+0], %r0 | |
1611 | ldx [%r31+8], %r1 | |
1612 | ldx [%r31+16], %r2 | |
1613 | ldx [%r31+24], %r3 | |
1614 | ldx [%r31+32], %r4 | |
1615 | ldx [%r31+40], %r5 | |
1616 | ldx [%r31+48], %r6 | |
1617 | ldx [%r31+56], %r7 | |
1618 | ldx [%r31+64], %r8 | |
1619 | ldx [%r31+72], %r9 | |
1620 | ldx [%r31+80], %r10 | |
1621 | ldx [%r31+88], %r11 | |
1622 | ldx [%r31+96], %r12 | |
1623 | ldx [%r31+104], %r13 | |
1624 | ldx [%r31+112], %r14 | |
1625 | mov %r31, %r15 | |
1626 | ldx [%r31+128], %r16 | |
1627 | ldx [%r31+136], %r17 | |
1628 | ldx [%r31+144], %r18 | |
1629 | ldx [%r31+152], %r19 | |
1630 | ldx [%r31+160], %r20 | |
1631 | ldx [%r31+168], %r21 | |
1632 | ldx [%r31+176], %r22 | |
1633 | ldx [%r31+184], %r23 | |
1634 | ldx [%r31+192], %r24 | |
1635 | ldx [%r31+200], %r25 | |
1636 | ldx [%r31+208], %r26 | |
1637 | ldx [%r31+216], %r27 | |
1638 | ldx [%r31+224], %r28 | |
1639 | ldx [%r31+232], %r29 | |
1640 | mov 0xb1, %r14 | |
1641 | mov 0x30, %r30 | |
1642 | save %r31, %r0, %r31 | |
1643 | restore | |
1644 | restore | |
1645 | restore | |
1646 | !Initializing float registers | |
1647 | ldd [%r31+0], %f0 | |
1648 | ldd [%r31+16], %f2 | |
1649 | ldd [%r31+32], %f4 | |
1650 | ldd [%r31+48], %f6 | |
1651 | ldd [%r31+64], %f8 | |
1652 | ldd [%r31+80], %f10 | |
1653 | ldd [%r31+96], %f12 | |
1654 | ldd [%r31+112], %f14 | |
1655 | ldd [%r31+128], %f16 | |
1656 | ldd [%r31+144], %f18 | |
1657 | ldd [%r31+160], %f20 | |
1658 | ldd [%r31+176], %f22 | |
1659 | ldd [%r31+192], %f24 | |
1660 | ldd [%r31+208], %f26 | |
1661 | ldd [%r31+224], %f28 | |
1662 | ldd [%r31+240], %f30 | |
1663 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. | |
1664 | ta T_CHANGE_HPRIV | |
1665 | setx diag_finish, %r29, %r28 | |
1666 | add %r28, 4, %r29 | |
1667 | wrpr %g0, 1, %tl | |
1668 | wrpr %r28, %tpc | |
1669 | wrpr %r29, %tnpc | |
1670 | wrpr %g0, 2, %tl | |
1671 | wrpr %r28, %tpc | |
1672 | wrpr %r29, %tnpc | |
1673 | wrpr %g0, 3, %tl | |
1674 | wrpr %r28, %tpc | |
1675 | wrpr %r29, %tnpc | |
1676 | wrpr %g0, 4, %tl | |
1677 | wrpr %r28, %tpc | |
1678 | wrpr %r29, %tnpc | |
1679 | wrpr %g0, 5, %tl | |
1680 | wrpr %r28, %tpc | |
1681 | wrpr %r29, %tnpc | |
1682 | wrpr %g0, 6, %tl | |
1683 | wrpr %r28, %tpc | |
1684 | wrpr %r29, %tnpc | |
1685 | wrpr %g0, 0, %tl | |
1686 | ||
1687 | ta T_CHANGE_HPRIV | |
1688 | ||
1689 | !Initializing Tick Cmprs | |
1690 | mov 1, %g2 | |
1691 | sllx %g2, 63, %g2 | |
1692 | or %g1, %g2, %g1 | |
1693 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1694 | wr %g1, %g0, %tick_cmpr | |
1695 | wr %g1, %g0, %sys_tick_cmpr | |
1696 | ta T_CHANGE_NONHPRIV | |
1697 | ||
1698 | .word 0xa1902002 ! 1: WRPR_GL_I wrpr %r0, 0x0002, %- | |
1699 | .word 0xd0bfc021 ! 2: STDA_R stda %r8, [%r31 + %r1] 0x01 | |
1700 | splash_lsu_0_0: | |
1701 | setx 0x52fea17e4a5e5727, %r1, %r2 | |
1702 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1703 | .word 0x3d400001 ! 3: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1704 | splash_htba_0_1: | |
1705 | set 0x80000, %r2 | |
1706 | ld [%r2+%r0], %r1 | |
1707 | ta T_CHANGE_HPRIV | |
1708 | set 0x80000, %r2 | |
1709 | .word 0x8b980002 ! 4: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
1710 | .word 0xd047e001 ! 5: LDSW_I ldsw [%r31 + 0x0001], %r8 | |
1711 | debug_0_2: | |
1712 | mov 0x38, %r18 | |
1713 | .word 0xfef00b12 ! 6: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1714 | .word 0x2e700001 ! 7: BPVS <illegal instruction> | |
1715 | .word 0xa2ad0005 ! 8: ANDNcc_R andncc %r20, %r5, %r17 | |
1716 | .word 0x87802058 ! 9: WRASI_I wr %r0, 0x0058, %asi | |
1717 | .word 0xe28008a0 ! 10: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
1718 | .word 0x87802014 ! 11: WRASI_I wr %r0, 0x0014, %asi | |
1719 | .word 0x87802055 ! 12: WRASI_I wr %r0, 0x0055, %asi | |
1720 | .word 0x87802004 ! 13: WRASI_I wr %r0, 0x0004, %asi | |
1721 | .word 0xe24fc000 ! 14: LDSB_R ldsb [%r31 + %r0], %r17 | |
1722 | debug_0_3: | |
1723 | mov 8, %r18 | |
1724 | .word 0xe2f00852 ! 15: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
1725 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_4)) -> intp(0,1,3) | |
1726 | xir_0_4: | |
1727 | .word 0xa9812001 ! 16: WR_SET_SOFTINT_I wr %r4, 0x0001, %set_softint | |
1728 | .word 0xa1902001 ! 17: WRPR_GL_I wrpr %r0, 0x0001, %- | |
1729 | tagged_0_5: | |
1730 | taddcctv %r21, 0x1687, %r8 | |
1731 | .word 0xe207e001 ! 18: LDUW_I lduw [%r31 + 0x0001], %r17 | |
1732 | .word 0xe337e001 ! 19: STQF_I - %f17, [0x0001, %r31] | |
1733 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_6)) -> intp(0,0,12) | |
1734 | intvec_0_6: | |
1735 | .word 0x39400001 ! 20: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1736 | set 0x533e4dce, %r28 | |
1737 | stxa %r28, [%g0] 0x73 | |
1738 | intvec_0_7: | |
1739 | .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1740 | DS_0_8: | |
1741 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
1742 | pdist %f8, %f26, %f4 | |
1743 | .word 0x97b2430a ! 22: ALIGNADDRESS alignaddr %r9, %r10, %r11 | |
1744 | .word 0xa1480000 ! 23: RDHPR_HPSTATE rdhpr %hpstate, %r16 | |
1745 | .word 0x93902006 ! 24: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
1746 | ta T_CHANGE_HPRIV ! macro | |
1747 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_9)) -> intp(0,1,3) | |
1748 | xir_0_9: | |
1749 | .word 0xa980a001 ! 26: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
1750 | ta T_CHANGE_PRIV ! macro | |
1751 | debug_0_10: | |
1752 | setx debug_0_10 + 64, %r11, %r19 | |
1753 | mov 0x38, %r18 | |
1754 | .word 0xe6f00b12 ! 28: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1755 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
1756 | ta T_CHANGE_NONHPRIV ! macro | |
1757 | .word 0x816ca001 ! 29: SDIVX_I sdivx %r18, 0x0001, %r0 | |
1758 | .word 0xc127e001 ! 30: STF_I st %f0, [0x0001, %r31] | |
1759 | .word 0x8d903ab9 ! 31: WRPR_PSTATE_I wrpr %r0, 0x1ab9, %pstate | |
1760 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_12)) -> intp(0,1,3) | |
1761 | xir_0_12: | |
1762 | .word 0xa9832001 ! 32: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
1763 | .word 0xc047c000 ! 33: LDSW_R ldsw [%r31 + %r0], %r0 | |
1764 | debug_0_13: | |
1765 | setx debug_0_13 + 64, %r11, %r19 | |
1766 | mov 0x38, %r18 | |
1767 | .word 0xe6f00b12 ! 34: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1768 | .word 0x81510000 ! 35: RDPR_TICK <illegal instruction> | |
1769 | .word 0xa945c000 ! 36: RD_TICK_CMPR_REG rd %-, %r20 | |
1770 | .word 0x81460000 ! 37: RD_STICK_REG stbar | |
1771 | .word 0x99902003 ! 38: WRPR_CLEANWIN_I wrpr %r0, 0x0003, %cleanwin | |
1772 | mondo_0_14: | |
1773 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1774 | ||
1775 | stxa %r7, [%r0+0x3c8] %asi | |
1776 | .word 0x9d924006 ! 39: WRPR_WSTATE_R wrpr %r9, %r6, %wstate | |
1777 | debug_0_15: | |
1778 | mov 8, %r18 | |
1779 | .word 0xdaf00852 ! 40: STXA_R stxa %r13, [%r0 + %r18] 0x42 | |
1780 | .word 0xa7702001 ! 41: POPC_I popc 0x0001, %r19 | |
1781 | .word 0xe61fc000 ! 42: LDD_R ldd [%r31 + %r0], %r19 | |
1782 | .word 0xe6800a60 ! 43: LDUWA_R lduwa [%r0, %r0] 0x53, %r19 | |
1783 | .word 0x879021ba ! 44: WRPR_TT_I wrpr %r0, 0x01ba, %tt | |
1784 | .word 0xa1902007 ! 45: WRPR_GL_I wrpr %r0, 0x0007, %- | |
1785 | .word 0xa6f98010 ! 46: SDIVcc_R sdivcc %r6, %r16, %r19 | |
1786 | debug_0_16: | |
1787 | setx debug_0_16 + 64, %r11, %r19 | |
1788 | mov 0x38, %r18 | |
1789 | .word 0xe6f00b12 ! 47: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1790 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_17)) -> intp(0,1,3) | |
1791 | xir_0_17: | |
1792 | .word 0xa9802001 ! 48: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
1793 | .word 0xe61fe001 ! 49: LDD_I ldd [%r31 + 0x0001], %r19 | |
1794 | .word 0xa1902005 ! 50: WRPR_GL_I wrpr %r0, 0x0005, %- | |
1795 | tagged_0_18: | |
1796 | tsubcctv %r16, 0x11af, %r26 | |
1797 | .word 0xe607e001 ! 51: LDUW_I lduw [%r31 + 0x0001], %r19 | |
1798 | .word 0x9545c000 ! 52: RD_TICK_CMPR_REG rd %-, %r10 | |
1799 | ta T_CHANGE_PRIV ! macro | |
1800 | debug_0_19: | |
1801 | setx debug_0_19 + 64, %r11, %r19 | |
1802 | mov 0x38, %r18 | |
1803 | .word 0xe6f00b12 ! 54: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
1804 | .word 0x8d802000 ! 55: WRFPRS_I wr %r0, 0x0000, %fprs | |
1805 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_20)) -> intp(0,1,3) | |
1806 | xir_0_20: | |
1807 | .word 0xa9826001 ! 56: WR_SET_SOFTINT_I wr %r9, 0x0001, %set_softint | |
1808 | set 0x918ab260, %r28 | |
1809 | stxa %r28, [%g0] 0x73 | |
1810 | intvec_0_21: | |
1811 | .word 0x39400001 ! 57: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1812 | .word 0xa26a2001 ! 58: UDIVX_I udivx %r8, 0x0001, %r17 | |
1813 | .word 0xe25fe001 ! 59: LDX_I ldx [%r31 + 0x0001], %r17 | |
1814 | invalw | |
1815 | mov 0x34, %r30 | |
1816 | .word 0x91d0001e ! 60: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1817 | .word 0x91d020b4 ! 61: Tcc_I ta icc_or_xcc, %r0 + 180 | |
1818 | splash_cmpr_0_22: | |
1819 | setx 0xbf170c6017bbaae7, %g2, %g1 | |
1820 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1821 | sub %g1, 100, %g1 | |
1822 | .word 0xb1800001 ! 62: WR_STICK_REG_R wr %r0, %r1, %- | |
1823 | .word 0xe327c010 ! 63: STF_R st %f17, [%r16, %r31] | |
1824 | .word 0xad846001 ! 64: WR_SOFTINT_REG_I wr %r17, 0x0001, %softint | |
1825 | mondo_0_23: | |
1826 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1827 | ||
1828 | stxa %r20, [%r0+0x3c0] %asi | |
1829 | .word 0x9d90c008 ! 65: WRPR_WSTATE_R wrpr %r3, %r8, %wstate | |
1830 | .word 0x879023a3 ! 66: WRPR_TT_I wrpr %r0, 0x03a3, %tt | |
1831 | .word 0x93902004 ! 67: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
1832 | .word 0xe28008a0 ! 68: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
1833 | .word 0x83d020b2 ! 69: Tcc_I te icc_or_xcc, %r0 + 178 | |
1834 | invalw | |
1835 | mov 0xb5, %r30 | |
1836 | .word 0x91d0001e ! 70: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1837 | .word 0xe327c008 ! 71: STF_R st %f17, [%r8, %r31] | |
1838 | .word 0xe21fe001 ! 72: LDD_I ldd [%r31 + 0x0001], %r17 | |
1839 | ta T_CHANGE_PRIV ! macro | |
1840 | .word 0x87520000 ! 74: RDPR_PIL rdpr %pil, %r3 | |
1841 | .word 0x8d903135 ! 75: WRPR_PSTATE_I wrpr %r0, 0x1135, %pstate | |
1842 | ta T_CHANGE_PRIV ! macro | |
1843 | tagged_0_24: | |
1844 | tsubcctv %r2, 0x15e7, %r19 | |
1845 | .word 0xc607e001 ! 77: LDUW_I lduw [%r31 + 0x0001], %r3 | |
1846 | .word 0x93d02035 ! 78: Tcc_I tne icc_or_xcc, %r0 + 53 | |
1847 | .word 0xc717c000 ! 79: LDQF_R - [%r31, %r0], %f3 | |
1848 | set 0x358b6b93, %r28 | |
1849 | stxa %r28, [%g0] 0x73 | |
1850 | intvec_0_25: | |
1851 | .word 0x39400001 ! 80: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1852 | .word 0xa9702001 ! 81: POPC_I popc 0x0001, %r20 | |
1853 | .word 0x9f802001 ! 82: SIR sir 0x0001 | |
1854 | .word 0xab84c014 ! 83: WR_CLEAR_SOFTINT_R wr %r19, %r20, %clear_softint | |
1855 | .word 0xe927e001 ! 84: STF_I st %f20, [0x0001, %r31] | |
1856 | intveclr_0_26: | |
1857 | set 0x6afa35fa, %r28 | |
1858 | stxa %r28, [%g0] 0x72 | |
1859 | .word 0x25400001 ! 85: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1860 | .word 0xad81e001 ! 86: WR_SOFTINT_REG_I wr %r7, 0x0001, %softint | |
1861 | .word 0xa1902002 ! 87: WRPR_GL_I wrpr %r0, 0x0002, %- | |
1862 | .word 0x8d903394 ! 88: WRPR_PSTATE_I wrpr %r0, 0x1394, %pstate | |
1863 | DS_0_27: | |
1864 | nop | |
1865 | not %g0, %g2 | |
1866 | jmp %g2 | |
1867 | .word 0x9d902003 ! 89: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
1868 | .word 0x87802089 ! 90: WRASI_I wr %r0, 0x0089, %asi | |
1869 | DS_0_28: | |
1870 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
1871 | .word 0xe1322001 ! 1: STQF_I - %f16, [0x0001, %r8] | |
1872 | normalw | |
1873 | .word 0x9b458000 ! 91: RD_SOFTINT_REG rd %softint, %r13 | |
1874 | intveclr_0_29: | |
1875 | set 0x9b4dfc31, %r28 | |
1876 | stxa %r28, [%g0] 0x72 | |
1877 | .word 0x25400001 ! 92: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1878 | .word 0x87802080 ! 93: WRASI_I wr %r0, 0x0080, %asi | |
1879 | .word 0x8d90205a ! 94: WRPR_PSTATE_I wrpr %r0, 0x005a, %pstate | |
1880 | .word 0xdad7e030 ! 95: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r13 | |
1881 | .word 0xdad7e020 ! 96: LDSHA_I ldsha [%r31, + 0x0020] %asi, %r13 | |
1882 | .word 0xdb37e001 ! 97: STQF_I - %f13, [0x0001, %r31] | |
1883 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_30)) -> intp(0,1,3) | |
1884 | xir_0_30: | |
1885 | .word 0xa9816001 ! 98: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
1886 | .word 0x91d02033 ! 99: Tcc_I ta icc_or_xcc, %r0 + 51 | |
1887 | .word 0xa5464000 ! 100: RD_STICK_CMPR_REG rd %-, %r18 | |
1888 | .word 0x91702001 ! 101: POPC_I popc 0x0001, %r8 | |
1889 | intveclr_0_31: | |
1890 | set 0x5fcfc531, %r28 | |
1891 | stxa %r28, [%g0] 0x72 | |
1892 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1893 | mondo_0_32: | |
1894 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1895 | ||
1896 | stxa %r12, [%r0+0x3c0] %asi | |
1897 | .word 0x9d94c00d ! 103: WRPR_WSTATE_R wrpr %r19, %r13, %wstate | |
1898 | .word 0x93902006 ! 104: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
1899 | .word 0xd0c804a0 ! 105: LDSBA_R ldsba [%r0, %r0] 0x25, %r8 | |
1900 | .word 0x95454000 ! 106: RD_CLEAR_SOFTINT rd %clear_softint, %r10 | |
1901 | set 0xef255a95, %r28 | |
1902 | stxa %r28, [%g0] 0x73 | |
1903 | intvec_0_33: | |
1904 | .word 0x39400001 ! 107: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1905 | .word 0x87802010 ! 108: WRASI_I wr %r0, 0x0010, %asi | |
1906 | .word 0x91d02034 ! 109: Tcc_I ta icc_or_xcc, %r0 + 52 | |
1907 | mondo_0_34: | |
1908 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1909 | ||
1910 | stxa %r13, [%r0+0x3e0] %asi | |
1911 | .word 0x9d904007 ! 110: WRPR_WSTATE_R wrpr %r1, %r7, %wstate | |
1912 | .word 0xd4bfe001 ! 111: STDA_I stda %r10, [%r31 + 0x0001] %asi | |
1913 | .word 0x32800001 ! 112: BNE bne,a <label_0x1> | |
1914 | debug_0_35: | |
1915 | mov 0x38, %r18 | |
1916 | .word 0xfef00b12 ! 113: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1917 | debug_0_36: | |
1918 | mov 8, %r18 | |
1919 | .word 0xe0f00852 ! 114: STXA_R stxa %r16, [%r0 + %r18] 0x42 | |
1920 | .word 0x22800001 ! 115: BE be,a <label_0x1> | |
1921 | set 0x1e78a4af, %r28 | |
1922 | stxa %r28, [%g0] 0x73 | |
1923 | intvec_0_37: | |
1924 | .word 0x39400001 ! 116: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1925 | .word 0x91946001 ! 117: WRPR_PIL_I wrpr %r17, 0x0001, %pil | |
1926 | .word 0x99454000 ! 118: RD_CLEAR_SOFTINT rd %clear_softint, %r12 | |
1927 | .word 0x2a800001 ! 119: BCS bcs,a <label_0x1> | |
1928 | .word 0x8d903d67 ! 120: WRPR_PSTATE_I wrpr %r0, 0x1d67, %pstate | |
1929 | .word 0xd88008a0 ! 121: LDUWA_R lduwa [%r0, %r0] 0x45, %r12 | |
1930 | debug_0_38: | |
1931 | mov 0x38, %r18 | |
1932 | .word 0xfef00b12 ! 122: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1933 | .word 0xd8800a60 ! 123: LDUWA_R lduwa [%r0, %r0] 0x53, %r12 | |
1934 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_39)) -> intp(0,1,3) | |
1935 | xir_0_39: | |
1936 | .word 0xa9842001 ! 124: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
1937 | .word 0xd8dfe020 ! 125: LDXA_I ldxa [%r31, + 0x0020] %asi, %r12 | |
1938 | invalw | |
1939 | mov 0xb3, %r30 | |
1940 | .word 0x91d0001e ! 126: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1941 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
1942 | ta T_CHANGE_NONPRIV ! macro | |
1943 | .word 0x83a01972 ! 127: FqTOd dis not found | |
1944 | ||
1945 | .word 0x91d02034 ! 128: Tcc_I ta icc_or_xcc, %r0 + 52 | |
1946 | debug_0_41: | |
1947 | mov 0x38, %r18 | |
1948 | .word 0xfef00b12 ! 129: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1949 | invalw | |
1950 | mov 0x34, %r30 | |
1951 | .word 0x93d0001e ! 130: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
1952 | .word 0xc2bfc032 ! 131: STDA_R stda %r1, [%r31 + %r18] 0x01 | |
1953 | .word 0x8d802000 ! 132: WRFPRS_I wr %r0, 0x0000, %fprs | |
1954 | .word 0xc277c012 ! 133: STX_R stx %r1, [%r31 + %r18] | |
1955 | .word 0xc207c000 ! 134: LDUW_R lduw [%r31 + %r0], %r1 | |
1956 | .word 0xa1520000 ! 135: RDPR_PIL rdpr %pil, %r16 | |
1957 | .word 0xe057e001 ! 136: LDSH_I ldsh [%r31 + 0x0001], %r16 | |
1958 | .word 0x9b480000 ! 137: RDHPR_HPSTATE rdhpr %hpstate, %r13 | |
1959 | intveclr_0_42: | |
1960 | set 0x60c8800d, %r28 | |
1961 | stxa %r28, [%g0] 0x72 | |
1962 | .word 0x25400001 ! 138: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
1963 | .word 0xda1fe001 ! 139: LDD_I ldd [%r31 + 0x0001], %r13 | |
1964 | .word 0x87902282 ! 140: WRPR_TT_I wrpr %r0, 0x0282, %tt | |
1965 | .word 0x81460000 ! 141: RD_STICK_REG stbar | |
1966 | .word 0xda8008a0 ! 142: LDUWA_R lduwa [%r0, %r0] 0x45, %r13 | |
1967 | mondo_0_43: | |
1968 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1969 | ||
1970 | stxa %r1, [%r0+0x3e8] %asi | |
1971 | .word 0x9d944010 ! 143: WRPR_WSTATE_R wrpr %r17, %r16, %wstate | |
1972 | .word 0xda8008a0 ! 144: LDUWA_R lduwa [%r0, %r0] 0x45, %r13 | |
1973 | tagged_0_44: | |
1974 | tsubcctv %r26, 0x149a, %r17 | |
1975 | .word 0xda07e001 ! 145: LDUW_I lduw [%r31 + 0x0001], %r13 | |
1976 | .word 0x87802004 ! 146: WRASI_I wr %r0, 0x0004, %asi | |
1977 | debug_0_45: | |
1978 | mov 8, %r18 | |
1979 | .word 0xd0f00852 ! 147: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
1980 | .word 0xdad004a0 ! 148: LDSHA_R ldsha [%r0, %r0] 0x25, %r13 | |
1981 | .word 0xdad00e60 ! 149: LDSHA_R ldsha [%r0, %r0] 0x73, %r13 | |
1982 | invalw | |
1983 | mov 0x32, %r30 | |
1984 | .word 0x91d0001e ! 150: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1985 | .word 0xda800ba0 ! 151: LDUWA_R lduwa [%r0, %r0] 0x5d, %r13 | |
1986 | DS_0_46: | |
1987 | nop | |
1988 | not %g0, %g2 | |
1989 | jmp %g2 | |
1990 | .word 0x9d902001 ! 152: WRPR_WSTATE_I wrpr %r0, 0x0001, %wstate | |
1991 | .word 0x89540000 ! 153: RDPR_GL rdpr %-, %r4 | |
1992 | debug_0_47: | |
1993 | mov 0x38, %r18 | |
1994 | .word 0xfef00b12 ! 154: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
1995 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_48)) -> intp(0,0,30) | |
1996 | intvec_0_48: | |
1997 | .word 0x39400001 ! 155: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1998 | set 0x304910ff, %r28 | |
1999 | stxa %r28, [%g0] 0x73 | |
2000 | intvec_0_49: | |
2001 | .word 0x39400001 ! 156: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2002 | .word 0xc8d804a0 ! 157: LDXA_R ldxa [%r0, %r0] 0x25, %r4 | |
2003 | .word 0x9f802001 ! 158: SIR sir 0x0001 | |
2004 | splash_lsu_0_50: | |
2005 | setx 0x52227e9717cb1069, %r1, %r2 | |
2006 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2007 | .word 0x3d400001 ! 159: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2008 | splash_htba_0_51: | |
2009 | set 0x00390000, %r2 | |
2010 | ld [%r2+%r0], %r1 | |
2011 | ta T_CHANGE_HPRIV | |
2012 | set 0x003a0000, %r2 | |
2013 | .word 0x8b980002 ! 160: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2014 | .word 0x93902003 ! 161: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2015 | debug_0_52: | |
2016 | setx debug_0_52 + 64, %r11, %r19 | |
2017 | mov 0x38, %r18 | |
2018 | .word 0xe6f00b12 ! 162: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2019 | .word 0xa190200e ! 163: WRPR_GL_I wrpr %r0, 0x000e, %- | |
2020 | .word 0x93902005 ! 164: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
2021 | set 0xd6126de1, %r28 | |
2022 | stxa %r28, [%g0] 0x73 | |
2023 | intvec_0_53: | |
2024 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2025 | splash_tba_0_54: | |
2026 | set 0x003d0000, %r2 | |
2027 | st %r1, [%r2+%r0] | |
2028 | ta T_CHANGE_PRIV | |
2029 | set 0x003e0000, %r2 | |
2030 | .word 0x8b900002 ! 166: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2031 | debug_0_55: | |
2032 | setx debug_0_55 + 64, %r11, %r19 | |
2033 | mov 0x38, %r18 | |
2034 | .word 0xe6f00b12 ! 167: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2035 | .word 0x95450000 ! 168: RD_SET_SOFTINT rd %set_softint, %r10 | |
2036 | .word 0xd4d7e000 ! 169: LDSHA_I ldsha [%r31, + 0x0000] %asi, %r10 | |
2037 | .word 0xd48008a0 ! 170: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
2038 | .word 0x8d802000 ! 171: WRFPRS_I wr %r0, 0x0000, %fprs | |
2039 | splash_cmpr_0_56: | |
2040 | setx 0xaa1ef1ac800815b7, %g2, %g1 | |
2041 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2042 | sub %g1, 100, %g1 | |
2043 | .word 0xb1800001 ! 172: WR_STICK_REG_R wr %r0, %r1, %- | |
2044 | .word 0xd4ffc030 ! 173: SWAPA_R swapa %r10, [%r31 + %r16] 0x01 | |
2045 | .word 0xd4c00e40 ! 174: LDSWA_R ldswa [%r0, %r0] 0x72, %r10 | |
2046 | .word 0xd4d004a0 ! 175: LDSHA_R ldsha [%r0, %r0] 0x25, %r10 | |
2047 | .word 0x81454000 ! 176: RD_CLEAR_SOFTINT stbar | |
2048 | splash_cmpr_0_57: | |
2049 | setx 0x077c479439f0b34a, %g2, %g1 | |
2050 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2051 | sub %g1, 100, %g1 | |
2052 | .word 0xb1800001 ! 177: WR_STICK_REG_R wr %r0, %r1, %- | |
2053 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_58)) -> intp(0,1,3) | |
2054 | xir_0_58: | |
2055 | .word 0xa9816001 ! 178: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
2056 | .word 0x8f500000 ! 179: RDPR_TPC <illegal instruction> | |
2057 | otherw | |
2058 | mov 0x35, %r30 | |
2059 | .word 0x91d0001e ! 180: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2060 | .word 0xce9fc020 ! 181: LDDA_R ldda [%r31, %r0] 0x01, %r7 | |
2061 | DS_0_59: | |
2062 | nop | |
2063 | not %g0, %g2 | |
2064 | jmp %g2 | |
2065 | .word 0x9d902002 ! 182: WRPR_WSTATE_I wrpr %r0, 0x0002, %wstate | |
2066 | .word 0x8d903e8c ! 183: WRPR_PSTATE_I wrpr %r0, 0x1e8c, %pstate | |
2067 | .word 0x81510000 ! 184: RDPR_TICK rdpr %tick, %r0 | |
2068 | debug_0_60: | |
2069 | mov 8, %r18 | |
2070 | .word 0xdaf00852 ! 185: STXA_R stxa %r13, [%r0 + %r18] 0x42 | |
2071 | .word 0xced00e40 ! 186: LDSHA_R ldsha [%r0, %r0] 0x72, %r7 | |
2072 | .word 0xce07c000 ! 187: LDUW_R lduw [%r31 + %r0], %r7 | |
2073 | .word 0x87902078 ! 188: WRPR_TT_I wrpr %r0, 0x0078, %tt | |
2074 | .word 0x91d02034 ! 189: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2075 | splash_cmpr_0_61: | |
2076 | setx 0x8b652ac9c1ed7dda, %g2, %g1 | |
2077 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2078 | sub %g1, 100, %g1 | |
2079 | .word 0xb1800001 ! 190: WR_STICK_REG_R wr %r0, %r1, %- | |
2080 | DS_0_62: | |
2081 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2082 | .xword 0xf7617aad ! Random illegal ? | |
2083 | .word 0xe3124007 ! 1: LDQF_R - [%r9, %r7], %f17 | |
2084 | .word 0x81a50831 ! 191: FADDs fadds %f20, %f17, %f0 | |
2085 | .word 0x8b50c000 ! 192: RDPR_TT <illegal instruction> | |
2086 | .word 0x8d902b2c ! 193: WRPR_PSTATE_I wrpr %r0, 0x0b2c, %pstate | |
2087 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_63)) -> intp(0,1,3) | |
2088 | xir_0_63: | |
2089 | .word 0xa9802001 ! 194: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
2090 | .word 0x87802004 ! 195: WRASI_I wr %r0, 0x0004, %asi | |
2091 | .word 0xa66a2001 ! 196: UDIVX_I udivx %r8, 0x0001, %r19 | |
2092 | .word 0x8790213b ! 197: WRPR_TT_I wrpr %r0, 0x013b, %tt | |
2093 | .word 0xe797e001 ! 198: LDQFA_I - [%r31, 0x0001], %f19 | |
2094 | .word 0xe6c7e030 ! 199: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r19 | |
2095 | .word 0x93902001 ! 200: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
2096 | .word 0xe68fe010 ! 201: LDUBA_I lduba [%r31, + 0x0010] %asi, %r19 | |
2097 | .word 0xa984c004 ! 202: WR_SET_SOFTINT_R wr %r19, %r4, %set_softint | |
2098 | .word 0x87902013 ! 203: WRPR_TT_I wrpr %r0, 0x0013, %tt | |
2099 | .word 0x24800001 ! 204: BLE ble,a <label_0x1> | |
2100 | intveclr_0_64: | |
2101 | set 0xea41c9a6, %r28 | |
2102 | stxa %r28, [%g0] 0x72 | |
2103 | .word 0x25400001 ! 205: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2104 | .word 0xe6dfe010 ! 206: LDXA_I ldxa [%r31, + 0x0010] %asi, %r19 | |
2105 | .word 0x93902000 ! 207: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2106 | .word 0x3e700001 ! 208: BPVC <illegal instruction> | |
2107 | .word 0x93902007 ! 209: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
2108 | .word 0xa1902002 ! 210: WRPR_GL_I wrpr %r0, 0x0002, %- | |
2109 | splash_lsu_0_65: | |
2110 | setx 0xe99592b1be6f3a4d, %r1, %r2 | |
2111 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2112 | .word 0x3d400001 ! 211: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2113 | debug_0_66: | |
2114 | mov 8, %r18 | |
2115 | .word 0xd2f00852 ! 212: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
2116 | DS_0_67: | |
2117 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2118 | pdist %f26, %f12, %f24 | |
2119 | .word 0xa3b30303 ! 213: ALIGNADDRESS alignaddr %r12, %r3, %r17 | |
2120 | .word 0x8d903701 ! 214: WRPR_PSTATE_I wrpr %r0, 0x1701, %pstate | |
2121 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_68)) -> intp(0,1,3) | |
2122 | xir_0_68: | |
2123 | .word 0xa9836001 ! 215: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
2124 | .word 0xe317c000 ! 216: LDQF_R - [%r31, %r0], %f17 | |
2125 | .word 0xe2cfe000 ! 217: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r17 | |
2126 | .word 0xe2800b00 ! 218: LDUWA_R lduwa [%r0, %r0] 0x58, %r17 | |
2127 | .word 0x9f802001 ! 219: SIR sir 0x0001 | |
2128 | .word 0x8968c013 ! 220: SDIVX_R sdivx %r3, %r19, %r4 | |
2129 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_69)) -> intp(0,1,3) | |
2130 | xir_0_69: | |
2131 | .word 0xa9816001 ! 221: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
2132 | .word 0x87454000 ! 222: RD_CLEAR_SOFTINT rd %clear_softint, %r3 | |
2133 | debug_0_70: | |
2134 | setx debug_0_70 + 64, %r11, %r19 | |
2135 | mov 0x38, %r18 | |
2136 | .word 0xe6f00b12 ! 223: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2137 | .word 0x93d020b4 ! 224: Tcc_I tne icc_or_xcc, %r0 + 180 | |
2138 | nop | |
2139 | mov 0x80, %g3 | |
2140 | stxa %g3, [%g3] 0x57 | |
2141 | .word 0xc65fc000 ! 225: LDX_R ldx [%r31 + %r0], %r3 | |
2142 | .word 0xc69fe001 ! 226: LDDA_I ldda [%r31, + 0x0001] %asi, %r3 | |
2143 | .word 0xc6c7e010 ! 227: LDSWA_I ldswa [%r31, + 0x0010] %asi, %r3 | |
2144 | debug_0_71: | |
2145 | mov 0x38, %r18 | |
2146 | .word 0xfef00b12 ! 228: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2147 | .word 0x93902003 ! 229: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2148 | tagged_0_72: | |
2149 | tsubcctv %r4, 0x1c7e, %r3 | |
2150 | .word 0xc607e001 ! 230: LDUW_I lduw [%r31 + 0x0001], %r3 | |
2151 | DS_0_73: | |
2152 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2153 | pdist %f24, %f8, %f28 | |
2154 | .word 0x8fb2430b ! 231: ALIGNADDRESS alignaddr %r9, %r11, %r7 | |
2155 | .word 0xcf1fe001 ! 232: LDDF_I ldd [%r31, 0x0001], %f7 | |
2156 | intveclr_0_74: | |
2157 | set 0x884ff20e, %r28 | |
2158 | stxa %r28, [%g0] 0x72 | |
2159 | .word 0x25400001 ! 233: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2160 | intveclr_0_75: | |
2161 | set 0xff1167c4, %r28 | |
2162 | stxa %r28, [%g0] 0x72 | |
2163 | .word 0x25400001 ! 234: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2164 | .word 0xce57e001 ! 235: LDSH_I ldsh [%r31 + 0x0001], %r7 | |
2165 | .word 0xced80e60 ! 236: LDXA_R ldxa [%r0, %r0] 0x73, %r7 | |
2166 | DS_0_76: | |
2167 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2168 | .word 0xbfe7c000 ! 237: SAVE_R save %r31, %r0, %r31 | |
2169 | intveclr_0_77: | |
2170 | set 0xd312b6e2, %r28 | |
2171 | stxa %r28, [%g0] 0x72 | |
2172 | .word 0x25400001 ! 238: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2173 | .word 0x87902215 ! 239: WRPR_TT_I wrpr %r0, 0x0215, %tt | |
2174 | .word 0xcec004a0 ! 240: LDSWA_R ldswa [%r0, %r0] 0x25, %r7 | |
2175 | tagged_0_78: | |
2176 | tsubcctv %r12, 0x1f6d, %r22 | |
2177 | .word 0xce07e001 ! 241: LDUW_I lduw [%r31 + 0x0001], %r7 | |
2178 | nop | |
2179 | mov 0x80, %g3 | |
2180 | stxa %g3, [%g3] 0x57 | |
2181 | .word 0xce5fc000 ! 242: LDX_R ldx [%r31 + %r0], %r7 | |
2182 | splash_lsu_0_79: | |
2183 | setx 0x8276216ed7c68f89, %r1, %r2 | |
2184 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2185 | .word 0x3d400001 ! 243: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2186 | .word 0xce27e001 ! 244: STW_I stw %r7, [%r31 + 0x0001] | |
2187 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_80)) -> intp(0,0,4) | |
2188 | intvec_0_80: | |
2189 | .word 0x39400001 ! 245: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2190 | .word 0xce4fc000 ! 246: LDSB_R ldsb [%r31 + %r0], %r7 | |
2191 | splash_lsu_0_81: | |
2192 | setx 0x3db358fd49e34059, %r1, %r2 | |
2193 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2194 | .word 0x3d400001 ! 247: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2195 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_82)) -> intp(0,1,3) | |
2196 | xir_0_82: | |
2197 | .word 0xa9842001 ! 248: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
2198 | splash_cmpr_0_83: | |
2199 | setx 0xc0a38094790d4226, %g2, %g1 | |
2200 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2201 | sub %g1, 100, %g1 | |
2202 | .word 0xb1800001 ! 249: WR_STICK_REG_R wr %r0, %r1, %- | |
2203 | .word 0xce1fc000 ! 250: LDD_R ldd [%r31 + %r0], %r7 | |
2204 | .word 0xce97e010 ! 251: LDUHA_I lduha [%r31, + 0x0010] %asi, %r7 | |
2205 | .word 0x93902006 ! 252: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
2206 | mondo_0_84: | |
2207 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2208 | ||
2209 | stxa %r19, [%r0+0x3d0] %asi | |
2210 | .word 0x9d940004 ! 253: WRPR_WSTATE_R wrpr %r16, %r4, %wstate | |
2211 | .word 0xce1fe001 ! 254: LDD_I ldd [%r31 + 0x0001], %r7 | |
2212 | .word 0xce57e001 ! 255: LDSH_I ldsh [%r31 + 0x0001], %r7 | |
2213 | .word 0x87802063 ! 256: WRASI_I wr %r0, 0x0063, %asi | |
2214 | .word 0x34700001 ! 257: BPG <illegal instruction> | |
2215 | .word 0xa190200d ! 258: WRPR_GL_I wrpr %r0, 0x000d, %- | |
2216 | tagged_0_85: | |
2217 | taddcctv %r24, 0x1a0a, %r9 | |
2218 | .word 0xce07e001 ! 259: LDUW_I lduw [%r31 + 0x0001], %r7 | |
2219 | debug_0_86: | |
2220 | mov 0x38, %r18 | |
2221 | .word 0xfef00b12 ! 260: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2222 | .word 0x91540000 ! 261: RDPR_GL rdpr %-, %r8 | |
2223 | set 0x17570df, %r28 | |
2224 | stxa %r28, [%g0] 0x73 | |
2225 | intvec_0_87: | |
2226 | .word 0x39400001 ! 262: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2227 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_88)) -> intp(0,0,3) | |
2228 | intvec_0_88: | |
2229 | .word 0x39400001 ! 263: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2230 | otherw | |
2231 | mov 0x35, %r30 | |
2232 | .word 0x91d0001e ! 264: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2233 | .word 0x99902003 ! 265: WRPR_CLEANWIN_I wrpr %r0, 0x0003, %cleanwin | |
2234 | DS_0_89: | |
2235 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2236 | .word 0xbfefc000 ! 266: RESTORE_R restore %r31, %r0, %r31 | |
2237 | .word 0xd11fe001 ! 267: LDDF_I ldd [%r31, 0x0001], %f8 | |
2238 | .word 0xd08804a0 ! 268: LDUBA_R lduba [%r0, %r0] 0x25, %r8 | |
2239 | .word 0xa9844001 ! 269: WR_SET_SOFTINT_R wr %r17, %r1, %set_softint | |
2240 | DS_0_90: | |
2241 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2242 | .word 0xc5352001 ! 1: STQF_I - %f2, [0x0001, %r20] | |
2243 | normalw | |
2244 | .word 0xa7458000 ! 270: RD_SOFTINT_REG rd %softint, %r19 | |
2245 | splash_tba_0_91: | |
2246 | set 0x120000, %r2 | |
2247 | ld [%r2+%r0], %r1 | |
2248 | ta T_CHANGE_PRIV | |
2249 | set 0x120000, %r2 | |
2250 | .word 0x8b900002 ! 271: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2251 | DS_0_92: | |
2252 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2253 | .word 0xbfefc000 ! 272: RESTORE_R restore %r31, %r0, %r31 | |
2254 | .word 0xe627e001 ! 273: STW_I stw %r19, [%r31 + 0x0001] | |
2255 | .word 0x8da1cd2c ! 274: FsMULd fsmuld %f7, %f12, %f6 | |
2256 | intveclr_0_93: | |
2257 | set 0x6d6239e9, %r28 | |
2258 | stxa %r28, [%g0] 0x72 | |
2259 | .word 0x25400001 ! 275: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2260 | DS_0_94: | |
2261 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2262 | .word 0xc3310004 ! 1: STQF_R - %f1, [%r4, %r4] | |
2263 | normalw | |
2264 | .word 0xa5458000 ! 276: RD_SOFTINT_REG rd %softint, %r18 | |
2265 | change_to_randtl_0_95: | |
2266 | ta T_CHANGE_HPRIV ! macro | |
2267 | done_change_to_randtl_0_95: | |
2268 | .word 0x8f902004 ! 277: WRPR_TL_I wrpr %r0, 0x0004, %tl | |
2269 | .word 0xe4900e80 ! 278: LDUHA_R lduha [%r0, %r0] 0x74, %r18 | |
2270 | change_to_randtl_0_96: | |
2271 | ta T_CHANGE_PRIV ! macro | |
2272 | done_change_to_randtl_0_96: | |
2273 | .word 0x8f902001 ! 279: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
2274 | .word 0x22700001 ! 280: BPE <illegal instruction> | |
2275 | .word 0xe40fe001 ! 281: LDUB_I ldub [%r31 + 0x0001], %r18 | |
2276 | .word 0x93902000 ! 282: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2277 | .word 0xa190200e ! 283: WRPR_GL_I wrpr %r0, 0x000e, %- | |
2278 | intveclr_0_97: | |
2279 | set 0x6813cceb, %r28 | |
2280 | stxa %r28, [%g0] 0x72 | |
2281 | .word 0x25400001 ! 284: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2282 | .word 0xa7a449ab ! 285: FDIVs fdivs %f17, %f11, %f19 | |
2283 | .word 0x87802055 ! 286: WRASI_I wr %r0, 0x0055, %asi | |
2284 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_98)) -> intp(0,0,14) | |
2285 | intvec_0_98: | |
2286 | .word 0x39400001 ! 287: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2287 | .word 0x99902000 ! 288: WRPR_CLEANWIN_I wrpr %r0, 0x0000, %cleanwin | |
2288 | .word 0xe6800c60 ! 289: LDUWA_R lduwa [%r0, %r0] 0x63, %r19 | |
2289 | .word 0xa1450000 ! 290: RD_SET_SOFTINT rd %set_softint, %r16 | |
2290 | .word 0xe197e001 ! 291: LDQFA_I - [%r31, 0x0001], %f16 | |
2291 | .word 0x93902003 ! 292: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2292 | .word 0xe00fc000 ! 293: LDUB_R ldub [%r31 + %r0], %r16 | |
2293 | set 0xdc36458b, %r28 | |
2294 | stxa %r28, [%g0] 0x73 | |
2295 | intvec_0_99: | |
2296 | .word 0x39400001 ! 294: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2297 | .word 0x8b464000 ! 295: RD_STICK_CMPR_REG rd %-, %r5 | |
2298 | .word 0x91d02033 ! 296: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2299 | .word 0x93d02034 ! 297: Tcc_I tne icc_or_xcc, %r0 + 52 | |
2300 | .word 0xcac004a0 ! 298: LDSWA_R ldswa [%r0, %r0] 0x25, %r5 | |
2301 | debug_0_100: | |
2302 | setx debug_0_100 + 64, %r11, %r19 | |
2303 | mov 0x38, %r18 | |
2304 | .word 0xe6f00b12 ! 299: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2305 | .word 0xcacfe000 ! 300: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r5 | |
2306 | DS_0_101: | |
2307 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2308 | pdist %f8, %f30, %f12 | |
2309 | .word 0xa3b40305 ! 301: ALIGNADDRESS alignaddr %r16, %r5, %r17 | |
2310 | .word 0xe2d7e010 ! 302: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r17 | |
2311 | .word 0x28700001 ! 303: BPLEU <illegal instruction> | |
2312 | intveclr_0_102: | |
2313 | set 0xb2cd275b, %r28 | |
2314 | stxa %r28, [%g0] 0x72 | |
2315 | .word 0x25400001 ! 304: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2316 | .word 0xe2d7e010 ! 305: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r17 | |
2317 | .word 0x9b464000 ! 306: RD_STICK_CMPR_REG rd %-, %r13 | |
2318 | set 0x68baeb1, %r28 | |
2319 | stxa %r28, [%g0] 0x73 | |
2320 | intvec_0_103: | |
2321 | .word 0x39400001 ! 307: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2322 | invalw | |
2323 | mov 0xb5, %r30 | |
2324 | .word 0x91d0001e ! 308: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2325 | .word 0xdb27c005 ! 309: STF_R st %f13, [%r5, %r31] | |
2326 | DS_0_104: | |
2327 | nop | |
2328 | not %g0, %g2 | |
2329 | jmp %g2 | |
2330 | .word 0x9d902000 ! 310: WRPR_WSTATE_I wrpr %r0, 0x0000, %wstate | |
2331 | debug_0_105: | |
2332 | mov 8, %r18 | |
2333 | .word 0xe8f00852 ! 311: STXA_R stxa %r20, [%r0 + %r18] 0x42 | |
2334 | .word 0x8cd8c00c ! 312: SMULcc_R smulcc %r3, %r12, %r6 | |
2335 | .word 0xa3450000 ! 313: RD_SET_SOFTINT rd %set_softint, %r17 | |
2336 | DS_0_106: | |
2337 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2338 | .word 0xbfefc000 ! 314: RESTORE_R restore %r31, %r0, %r31 | |
2339 | .word 0x9f802001 ! 315: SIR sir 0x0001 | |
2340 | .word 0xa9814002 ! 316: WR_SET_SOFTINT_R wr %r5, %r2, %set_softint | |
2341 | change_to_randtl_0_107: | |
2342 | ta T_CHANGE_HPRIV ! macro | |
2343 | done_change_to_randtl_0_107: | |
2344 | .word 0x8f902003 ! 317: WRPR_TL_I wrpr %r0, 0x0003, %tl | |
2345 | .word 0x91d02034 ! 318: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2346 | .word 0x87902327 ! 319: WRPR_TT_I wrpr %r0, 0x0327, %tt | |
2347 | invalw | |
2348 | mov 0xb2, %r30 | |
2349 | .word 0x91d0001e ! 320: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2350 | .word 0xe29fe001 ! 321: LDDA_I ldda [%r31, + 0x0001] %asi, %r17 | |
2351 | .word 0x91a000d0 ! 322: FNEGd fnegd %f16, %f8 | |
2352 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_108)) -> intp(0,0,27) | |
2353 | intvec_0_108: | |
2354 | .word 0x39400001 ! 323: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2355 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_109)) -> intp(0,1,3) | |
2356 | xir_0_109: | |
2357 | .word 0xa9826001 ! 324: WR_SET_SOFTINT_I wr %r9, 0x0001, %set_softint | |
2358 | ta T_CHANGE_PRIV ! macro | |
2359 | mondo_0_110: | |
2360 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2361 | ||
2362 | stxa %r9, [%r0+0x3e0] %asi | |
2363 | .word 0x9d904006 ! 326: WRPR_WSTATE_R wrpr %r1, %r6, %wstate | |
2364 | set 0x996c68df, %r28 | |
2365 | stxa %r28, [%g0] 0x73 | |
2366 | intvec_0_111: | |
2367 | .word 0x39400001 ! 327: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2368 | .word 0x22800001 ! 328: BE be,a <label_0x1> | |
2369 | .word 0x8d802004 ! 329: WRFPRS_I wr %r0, 0x0004, %fprs | |
2370 | invalw | |
2371 | mov 0x32, %r30 | |
2372 | .word 0x91d0001e ! 330: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2373 | mondo_0_112: | |
2374 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2375 | ||
2376 | stxa %r3, [%r0+0x3c0] %asi | |
2377 | .word 0x9d950014 ! 331: WRPR_WSTATE_R wrpr %r20, %r20, %wstate | |
2378 | nop | |
2379 | mov 0x80, %g3 | |
2380 | stxa %g3, [%g3] 0x5f | |
2381 | .word 0xd05fc000 ! 332: LDX_R ldx [%r31 + %r0], %r8 | |
2382 | .word 0xd0d804a0 ! 333: LDXA_R ldxa [%r0, %r0] 0x25, %r8 | |
2383 | .word 0xd0d7e010 ! 334: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r8 | |
2384 | splash_lsu_0_113: | |
2385 | setx 0x5ae620d55db11ced, %r1, %r2 | |
2386 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2387 | .word 0x3d400001 ! 335: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2388 | .word 0x87902134 ! 336: WRPR_TT_I wrpr %r0, 0x0134, %tt | |
2389 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_114)) -> intp(0,0,17) | |
2390 | intvec_0_114: | |
2391 | .word 0x39400001 ! 337: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2392 | .word 0x8790203b ! 338: WRPR_TT_I wrpr %r0, 0x003b, %tt | |
2393 | .word 0xd0c004a0 ! 339: LDSWA_R ldswa [%r0, %r0] 0x25, %r8 | |
2394 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_115)) -> intp(0,1,3) | |
2395 | xir_0_115: | |
2396 | .word 0xa9846001 ! 340: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
2397 | tagged_0_116: | |
2398 | tsubcctv %r13, 0x1961, %r22 | |
2399 | .word 0xd007e001 ! 341: LDUW_I lduw [%r31 + 0x0001], %r8 | |
2400 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_117)) -> intp(0,1,3) | |
2401 | xir_0_117: | |
2402 | .word 0xa9806001 ! 342: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
2403 | ta T_CHANGE_HPRIV ! macro | |
2404 | debug_0_118: | |
2405 | setx debug_0_118 + 64, %r11, %r19 | |
2406 | mov 0x38, %r18 | |
2407 | .word 0xe6f00b12 ! 344: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2408 | .word 0xd08008a0 ! 345: LDUWA_R lduwa [%r0, %r0] 0x45, %r8 | |
2409 | .word 0xd0c804a0 ! 346: LDSBA_R ldsba [%r0, %r0] 0x25, %r8 | |
2410 | debug_0_119: | |
2411 | mov 0x38, %r18 | |
2412 | .word 0xfef00b12 ! 347: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2413 | .word 0xd09fe001 ! 348: LDDA_I ldda [%r31, + 0x0001] %asi, %r8 | |
2414 | debug_0_120: | |
2415 | mov 8, %r18 | |
2416 | .word 0xe2f00852 ! 349: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
2417 | nop | |
2418 | mov 0x80, %g3 | |
2419 | stxa %g3, [%g3] 0x5f | |
2420 | .word 0xd05fc000 ! 350: LDX_R ldx [%r31 + %r0], %r8 | |
2421 | splash_htba_0_121: | |
2422 | set 0x80000, %r2 | |
2423 | ld [%r2+%r0], %r1 | |
2424 | ta T_CHANGE_HPRIV | |
2425 | set 0x80000, %r2 | |
2426 | .word 0x8b980002 ! 351: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2427 | .word 0x8780204f ! 352: WRASI_I wr %r0, 0x004f, %asi | |
2428 | .word 0xd08804a0 ! 353: LDUBA_R lduba [%r0, %r0] 0x25, %r8 | |
2429 | nop | |
2430 | mov 0x80, %g3 | |
2431 | stxa %g3, [%g3] 0x57 | |
2432 | .word 0xd05fc000 ! 354: LDX_R ldx [%r31 + %r0], %r8 | |
2433 | splash_cmpr_0_122: | |
2434 | setx 0x79405eb9bb7f69a6, %g2, %g1 | |
2435 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2436 | sub %g1, 100, %g1 | |
2437 | .word 0xb1800001 ! 355: WR_STICK_REG_R wr %r0, %r1, %- | |
2438 | .word 0xd127c014 ! 356: STF_R st %f8, [%r20, %r31] | |
2439 | .word 0x8d9027bd ! 357: WRPR_PSTATE_I wrpr %r0, 0x07bd, %pstate | |
2440 | debug_0_123: | |
2441 | mov 8, %r18 | |
2442 | .word 0xdcf00852 ! 358: STXA_R stxa %r14, [%r0 + %r18] 0x42 | |
2443 | .word 0xd137c014 ! 359: STQF_R - %f8, [%r20, %r31] | |
2444 | .word 0x8790224c ! 360: WRPR_TT_I wrpr %r0, 0x024c, %tt | |
2445 | intveclr_0_124: | |
2446 | set 0x7b738155, %r28 | |
2447 | stxa %r28, [%g0] 0x72 | |
2448 | .word 0x25400001 ! 361: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2449 | .word 0xd0dfe020 ! 362: LDXA_I ldxa [%r31, + 0x0020] %asi, %r8 | |
2450 | otherw | |
2451 | mov 0x35, %r30 | |
2452 | .word 0x91d0001e ! 363: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2453 | .word 0xa1902002 ! 364: WRPR_GL_I wrpr %r0, 0x0002, %- | |
2454 | .word 0xd03fc014 ! 365: STD_R std %r8, [%r31 + %r20] | |
2455 | mondo_0_125: | |
2456 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2457 | ||
2458 | stxa %r2, [%r0+0x3d8] %asi | |
2459 | .word 0x9d90c010 ! 366: WRPR_WSTATE_R wrpr %r3, %r16, %wstate | |
2460 | .word 0x91d02034 ! 367: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2461 | splash_cmpr_0_126: | |
2462 | setx 0x732beb62f2799780, %g2, %g1 | |
2463 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2464 | sub %g1, 100, %g1 | |
2465 | .word 0xb1800001 ! 368: WR_STICK_REG_R wr %r0, %r1, %- | |
2466 | .word 0x2a800001 ! 369: BCS bcs,a <label_0x1> | |
2467 | .word 0x81510000 ! 370: RDPR_TICK rdpr %tick, %r0 | |
2468 | .word 0x8d450000 ! 371: RD_SET_SOFTINT rd %set_softint, %r6 | |
2469 | .word 0xcc5fe001 ! 372: LDX_I ldx [%r31 + 0x0001], %r6 | |
2470 | .word 0x20800001 ! 373: BN bn,a <label_0x1> | |
2471 | set 0x9cf662b7, %r28 | |
2472 | stxa %r28, [%g0] 0x73 | |
2473 | intvec_0_127: | |
2474 | .word 0x39400001 ! 374: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2475 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_128)) -> intp(0,1,3) | |
2476 | xir_0_128: | |
2477 | .word 0xa9812001 ! 375: WR_SET_SOFTINT_I wr %r4, 0x0001, %set_softint | |
2478 | intveclr_0_129: | |
2479 | set 0x36dc8346, %r28 | |
2480 | stxa %r28, [%g0] 0x72 | |
2481 | .word 0x25400001 ! 376: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2482 | .word 0xcc57c000 ! 377: LDSH_R ldsh [%r31 + %r0], %r6 | |
2483 | mondo_0_130: | |
2484 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2485 | ||
2486 | stxa %r4, [%r0+0x3d0] %asi | |
2487 | .word 0x9d94400d ! 378: WRPR_WSTATE_R wrpr %r17, %r13, %wstate | |
2488 | .word 0xa1902008 ! 379: WRPR_GL_I wrpr %r0, 0x0008, %- | |
2489 | debug_0_131: | |
2490 | mov 0x38, %r18 | |
2491 | .word 0xfef00b12 ! 380: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2492 | .word 0x81982857 ! 381: WRHPR_HPSTATE_I wrhpr %r0, 0x0857, %hpstate | |
2493 | splash_htba_0_132: | |
2494 | set 0x003b0000, %r2 | |
2495 | st %r1, [%r2+%r0] | |
2496 | ta T_CHANGE_HPRIV | |
2497 | set 0x00380000, %r2 | |
2498 | .word 0x8b980002 ! 382: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2499 | .word 0xa1902000 ! 383: WRPR_GL_I wrpr %r0, 0x0000, %- | |
2500 | .word 0x91d02033 ! 384: Tcc_I ta icc_or_xcc, %r0 + 51 | |
2501 | .word 0xa5a000d4 ! 385: FNEGd fnegd %f20, %f18 | |
2502 | splash_cmpr_0_133: | |
2503 | setx 0x052b994336162334, %g2, %g1 | |
2504 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2505 | sub %g1, 100, %g1 | |
2506 | .word 0xb1800001 ! 386: WR_STICK_REG_R wr %r0, %r1, %- | |
2507 | debug_0_134: | |
2508 | mov 0x38, %r18 | |
2509 | .word 0xfef00b12 ! 387: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2510 | mondo_0_135: | |
2511 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2512 | ||
2513 | stxa %r3, [%r0+0x3e0] %asi | |
2514 | .word 0x9d940008 ! 388: WRPR_WSTATE_R wrpr %r16, %r8, %wstate | |
2515 | .word 0xe48008a0 ! 389: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 | |
2516 | .word 0xe497e000 ! 390: LDUHA_I lduha [%r31, + 0x0000] %asi, %r18 | |
2517 | debug_0_136: | |
2518 | setx debug_0_136 + 64, %r11, %r19 | |
2519 | mov 0x38, %r18 | |
2520 | .word 0xe6f00b12 ! 391: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2521 | .word 0x32700001 ! 392: BPNE <illegal instruction> | |
2522 | set 0x2dfba9be, %r28 | |
2523 | stxa %r28, [%g0] 0x73 | |
2524 | intvec_0_137: | |
2525 | .word 0x39400001 ! 393: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2526 | .word 0x93902000 ! 394: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2527 | .word 0x97540000 ! 395: RDPR_GL rdpr %-, %r11 | |
2528 | tagged_0_138: | |
2529 | tsubcctv %r24, 0x1fff, %r9 | |
2530 | .word 0xd607e001 ! 396: LDUW_I lduw [%r31 + 0x0001], %r11 | |
2531 | splash_cmpr_0_139: | |
2532 | setx 0x9391b6a68887754f, %g2, %g1 | |
2533 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2534 | sub %g1, 100, %g1 | |
2535 | .word 0xb1800001 ! 397: WR_STICK_REG_R wr %r0, %r1, %- | |
2536 | .word 0xa1902005 ! 398: WRPR_GL_I wrpr %r0, 0x0005, %- | |
2537 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_140)) -> intp(0,1,3) | |
2538 | xir_0_140: | |
2539 | .word 0xa981e001 ! 399: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
2540 | .word 0xd6c00e80 ! 400: LDSWA_R ldswa [%r0, %r0] 0x74, %r11 | |
2541 | .word 0xd697e030 ! 401: LDUHA_I lduha [%r31, + 0x0030] %asi, %r11 | |
2542 | splash_lsu_0_141: | |
2543 | setx 0x419df8889a05cbd9, %r1, %r2 | |
2544 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2545 | .word 0x3d400001 ! 402: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2546 | .word 0x30700001 ! 403: BPA <illegal instruction> | |
2547 | .word 0xd6dfe030 ! 404: LDXA_I ldxa [%r31, + 0x0030] %asi, %r11 | |
2548 | .word 0x91d020b5 ! 405: Tcc_I ta icc_or_xcc, %r0 + 181 | |
2549 | invalw | |
2550 | mov 0x32, %r30 | |
2551 | .word 0x91d0001e ! 406: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2552 | mondo_0_142: | |
2553 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2554 | ||
2555 | stxa %r18, [%r0+0x3d8] %asi | |
2556 | .word 0x9d904004 ! 407: WRPR_WSTATE_R wrpr %r1, %r4, %wstate | |
2557 | .word 0xd727e001 ! 408: STF_I st %f11, [0x0001, %r31] | |
2558 | nop | |
2559 | mov 0x80, %g3 | |
2560 | stxa %g3, [%g3] 0x57 | |
2561 | .word 0xd65fc000 ! 409: LDX_R ldx [%r31 + %r0], %r11 | |
2562 | .word 0x81982ad7 ! 410: WRHPR_HPSTATE_I wrhpr %r0, 0x0ad7, %hpstate | |
2563 | .word 0x87500000 ! 411: RDPR_TPC rdpr %tpc, %r3 | |
2564 | .word 0x8d903130 ! 412: WRPR_PSTATE_I wrpr %r0, 0x1130, %pstate | |
2565 | .word 0x9f802001 ! 413: SIR sir 0x0001 | |
2566 | .word 0xa1902005 ! 414: WRPR_GL_I wrpr %r0, 0x0005, %- | |
2567 | .word 0x87802063 ! 415: WRASI_I wr %r0, 0x0063, %asi | |
2568 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_143)) -> intp(0,1,3) | |
2569 | xir_0_143: | |
2570 | .word 0xa982e001 ! 416: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
2571 | nop | |
2572 | mov 0x80, %g3 | |
2573 | stxa %g3, [%g3] 0x57 | |
2574 | .word 0xc65fc000 ! 417: LDX_R ldx [%r31 + %r0], %r3 | |
2575 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_144)) -> intp(0,0,6) | |
2576 | intvec_0_144: | |
2577 | .word 0x39400001 ! 418: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2578 | .word 0xc6bfc024 ! 419: STDA_R stda %r3, [%r31 + %r4] 0x01 | |
2579 | .word 0x87802016 ! 420: WRASI_I wr %r0, 0x0016, %asi | |
2580 | debug_0_145: | |
2581 | setx debug_0_145 + 64, %r11, %r19 | |
2582 | mov 0x38, %r18 | |
2583 | .word 0xe6f00b12 ! 421: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2584 | splash_cmpr_0_146: | |
2585 | setx 0x131c9ec084db6778, %g2, %g1 | |
2586 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2587 | sub %g1, 100, %g1 | |
2588 | .word 0xb1800001 ! 422: WR_STICK_REG_R wr %r0, %r1, %- | |
2589 | debug_0_147: | |
2590 | mov 8, %r18 | |
2591 | .word 0xd2f00852 ! 423: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
2592 | debug_0_148: | |
2593 | setx debug_0_148 + 64, %r11, %r19 | |
2594 | mov 0x38, %r18 | |
2595 | .word 0xe6f00b12 ! 424: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2596 | .word 0x99902004 ! 425: WRPR_CLEANWIN_I wrpr %r0, 0x0004, %cleanwin | |
2597 | .word 0x879022bd ! 426: WRPR_TT_I wrpr %r0, 0x02bd, %tt | |
2598 | .word 0xad80a001 ! 427: WR_SOFTINT_REG_I wr %r2, 0x0001, %softint | |
2599 | .word 0xc6c804a0 ! 428: LDSBA_R ldsba [%r0, %r0] 0x25, %r3 | |
2600 | .word 0x83480000 ! 429: RDHPR_HPSTATE rdhpr %hpstate, %r1 | |
2601 | .word 0xc22fc004 ! 430: STB_R stb %r1, [%r31 + %r4] | |
2602 | tagged_0_149: | |
2603 | taddcctv %r5, 0x1d78, %r21 | |
2604 | .word 0xc207e001 ! 431: LDUW_I lduw [%r31 + 0x0001], %r1 | |
2605 | splash_lsu_0_150: | |
2606 | setx 0x934052209acaaf4f, %r1, %r2 | |
2607 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2608 | .word 0x3d400001 ! 432: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2609 | .word 0x8d902d8a ! 433: WRPR_PSTATE_I wrpr %r0, 0x0d8a, %pstate | |
2610 | set 0x615b9b5f, %r28 | |
2611 | stxa %r28, [%g0] 0x73 | |
2612 | intvec_0_151: | |
2613 | .word 0x39400001 ! 434: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2614 | .word 0x8780204f ! 435: WRASI_I wr %r0, 0x004f, %asi | |
2615 | .word 0xc31fc000 ! 436: LDDF_R ldd [%r31, %r0], %f1 | |
2616 | debug_0_152: | |
2617 | mov 0x38, %r18 | |
2618 | .word 0xfef00b12 ! 437: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2619 | splash_lsu_0_153: | |
2620 | setx 0x63099237e7102479, %r1, %r2 | |
2621 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2622 | .word 0x3d400001 ! 438: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2623 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_154)) -> intp(0,0,10) | |
2624 | intvec_0_154: | |
2625 | .word 0x39400001 ! 439: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2626 | .word 0xa1902005 ! 440: WRPR_GL_I wrpr %r0, 0x0005, %- | |
2627 | .word 0xc23fc004 ! 441: STD_R std %r1, [%r31 + %r4] | |
2628 | .word 0xc24fc000 ! 442: LDSB_R ldsb [%r31 + %r0], %r1 | |
2629 | .word 0xa190200c ! 443: WRPR_GL_I wrpr %r0, 0x000c, %- | |
2630 | intveclr_0_155: | |
2631 | set 0xdf3c135d, %r28 | |
2632 | stxa %r28, [%g0] 0x72 | |
2633 | .word 0x25400001 ! 444: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2634 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_156)) -> intp(0,0,27) | |
2635 | intvec_0_156: | |
2636 | .word 0x39400001 ! 445: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2637 | .word 0x9f802001 ! 446: SIR sir 0x0001 | |
2638 | .word 0x879023f9 ! 447: WRPR_TT_I wrpr %r0, 0x03f9, %tt | |
2639 | .word 0xc2cfe030 ! 448: LDSBA_I ldsba [%r31, + 0x0030] %asi, %r1 | |
2640 | splash_lsu_0_157: | |
2641 | setx 0x4db91e8ee2a4b9bd, %r1, %r2 | |
2642 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2643 | .word 0x3d400001 ! 449: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2644 | splash_lsu_0_158: | |
2645 | setx 0xebcd920caf1798d7, %r1, %r2 | |
2646 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2647 | .word 0x3d400001 ! 450: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2648 | .word 0xc33fe001 ! 451: STDF_I std %f1, [0x0001, %r31] | |
2649 | splash_lsu_0_159: | |
2650 | setx 0x96c260d2847af899, %r1, %r2 | |
2651 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2652 | .word 0x3d400001 ! 452: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2653 | .word 0x8d902639 ! 453: WRPR_PSTATE_I wrpr %r0, 0x0639, %pstate | |
2654 | nop | |
2655 | mov 0x80, %g3 | |
2656 | stxa %g3, [%g3] 0x57 | |
2657 | .word 0xc25fc000 ! 454: LDX_R ldx [%r31 + %r0], %r1 | |
2658 | .word 0x81510000 ! 455: RDPR_TICK rdpr %tick, %r0 | |
2659 | DS_0_160: | |
2660 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2661 | .xword 0xab5a3cf9 ! Random illegal ? | |
2662 | .word 0xd5150013 ! 1: LDQF_R - [%r20, %r19], %f10 | |
2663 | .word 0x95a2882d ! 456: FADDs fadds %f10, %f13, %f10 | |
2664 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
2665 | ta T_CHANGE_NONHPRIV ! macro | |
2666 | .word 0x89686001 ! 457: SDIVX_I sdivx %r1, 0x0001, %r4 | |
2667 | .word 0xc847e001 ! 458: LDSW_I ldsw [%r31 + 0x0001], %r4 | |
2668 | .word 0xc89fe001 ! 459: LDDA_I ldda [%r31, + 0x0001] %asi, %r4 | |
2669 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_162)) -> intp(0,1,3) | |
2670 | xir_0_162: | |
2671 | .word 0xa9846001 ! 460: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
2672 | DS_0_163: | |
2673 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2674 | .word 0xc732c00a ! 1: STQF_R - %f3, [%r10, %r11] | |
2675 | normalw | |
2676 | .word 0x91458000 ! 461: RD_SOFTINT_REG rd %softint, %r8 | |
2677 | debug_0_164: | |
2678 | mov 0x38, %r18 | |
2679 | .word 0xfef00b12 ! 462: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2680 | set 0x3cac99b1, %r28 | |
2681 | stxa %r28, [%g0] 0x73 | |
2682 | intvec_0_165: | |
2683 | .word 0x39400001 ! 463: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2684 | .word 0xd097e030 ! 464: LDUHA_I lduha [%r31, + 0x0030] %asi, %r8 | |
2685 | .word 0xd0bfc02a ! 465: STDA_R stda %r8, [%r31 + %r10] 0x01 | |
2686 | debug_0_166: | |
2687 | setx debug_0_166 + 64, %r11, %r19 | |
2688 | mov 0x38, %r18 | |
2689 | .word 0xe6f00b12 ! 466: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2690 | splash_cmpr_0_167: | |
2691 | setx 0x9f684a9b4648a504, %g2, %g1 | |
2692 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2693 | sub %g1, 100, %g1 | |
2694 | .word 0xb1800001 ! 467: WR_STICK_REG_R wr %r0, %r1, %- | |
2695 | DS_0_168: | |
2696 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2697 | .word 0xbfefc000 ! 468: RESTORE_R restore %r31, %r0, %r31 | |
2698 | splash_cmpr_0_169: | |
2699 | setx 0x05152c7e9fc10545, %g2, %g1 | |
2700 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2701 | sub %g1, 100, %g1 | |
2702 | .word 0xb1800001 ! 469: WR_STICK_REG_R wr %r0, %r1, %- | |
2703 | DS_0_170: | |
2704 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2705 | .word 0xc9308012 ! 1: STQF_R - %f4, [%r18, %r2] | |
2706 | normalw | |
2707 | .word 0x93458000 ! 470: RD_SOFTINT_REG rd %softint, %r9 | |
2708 | mondo_0_171: | |
2709 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2710 | ||
2711 | stxa %r17, [%r0+0x3c0] %asi | |
2712 | .word 0x9d90c00a ! 471: WRPR_WSTATE_R wrpr %r3, %r10, %wstate | |
2713 | .word 0x8790218c ! 472: WRPR_TT_I wrpr %r0, 0x018c, %tt | |
2714 | .word 0x83d02033 ! 473: Tcc_I te icc_or_xcc, %r0 + 51 | |
2715 | intveclr_0_172: | |
2716 | set 0xc75553fb, %r28 | |
2717 | stxa %r28, [%g0] 0x72 | |
2718 | .word 0x25400001 ! 474: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2719 | .word 0xd21fe001 ! 475: LDD_I ldd [%r31 + 0x0001], %r9 | |
2720 | set 0x92f5f3d2, %r28 | |
2721 | stxa %r28, [%g0] 0x73 | |
2722 | intvec_0_173: | |
2723 | .word 0x39400001 ! 476: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2724 | .word 0xd2c7e000 ! 477: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r9 | |
2725 | .word 0xa1902005 ! 478: WRPR_GL_I wrpr %r0, 0x0005, %- | |
2726 | .word 0xab81c00c ! 479: WR_CLEAR_SOFTINT_R wr %r7, %r12, %clear_softint | |
2727 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_174)) -> intp(0,0,27) | |
2728 | intvec_0_174: | |
2729 | .word 0x39400001 ! 480: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2730 | .word 0xd20fe001 ! 481: LDUB_I ldub [%r31 + 0x0001], %r9 | |
2731 | .word 0x93902002 ! 482: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
2732 | .word 0x9968c00b ! 483: SDIVX_R sdivx %r3, %r11, %r12 | |
2733 | .word 0xd91fc000 ! 484: LDDF_R ldd [%r31, %r0], %f12 | |
2734 | nop | |
2735 | mov 0x80, %g3 | |
2736 | stxa %g3, [%g3] 0x57 | |
2737 | .word 0xd85fc000 ! 485: LDX_R ldx [%r31 + %r0], %r12 | |
2738 | nop | |
2739 | mov 0x80, %g3 | |
2740 | stxa %g3, [%g3] 0x57 | |
2741 | .word 0xd85fc000 ! 486: LDX_R ldx [%r31 + %r0], %r12 | |
2742 | .word 0xd80fe001 ! 487: LDUB_I ldub [%r31 + 0x0001], %r12 | |
2743 | set 0x2979ac84, %r28 | |
2744 | stxa %r28, [%g0] 0x73 | |
2745 | intvec_0_175: | |
2746 | .word 0x39400001 ! 488: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2747 | .word 0xd857e001 ! 489: LDSH_I ldsh [%r31 + 0x0001], %r12 | |
2748 | intveclr_0_176: | |
2749 | set 0xc017226f, %r28 | |
2750 | stxa %r28, [%g0] 0x72 | |
2751 | .word 0x25400001 ! 490: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2752 | debug_0_177: | |
2753 | mov 8, %r18 | |
2754 | .word 0xdaf00852 ! 491: STXA_R stxa %r13, [%r0 + %r18] 0x42 | |
2755 | splash_lsu_0_178: | |
2756 | setx 0x2723a426cf19f3e9, %r1, %r2 | |
2757 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2758 | .word 0x3d400001 ! 492: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2759 | tagged_0_179: | |
2760 | taddcctv %r26, 0x173a, %r9 | |
2761 | .word 0xd807e001 ! 493: LDUW_I lduw [%r31 + 0x0001], %r12 | |
2762 | .word 0xd88008a0 ! 494: LDUWA_R lduwa [%r0, %r0] 0x45, %r12 | |
2763 | intveclr_0_180: | |
2764 | set 0xeb40a230, %r28 | |
2765 | stxa %r28, [%g0] 0x72 | |
2766 | .word 0x25400001 ! 495: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2767 | tagged_0_181: | |
2768 | taddcctv %r2, 0x1621, %r17 | |
2769 | .word 0xd807e001 ! 496: LDUW_I lduw [%r31 + 0x0001], %r12 | |
2770 | debug_0_182: | |
2771 | mov 0x38, %r18 | |
2772 | .word 0xfef00b12 ! 497: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2773 | mondo_0_183: | |
2774 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2775 | ||
2776 | stxa %r16, [%r0+0x3d8] %asi | |
2777 | .word 0x9d920006 ! 498: WRPR_WSTATE_R wrpr %r8, %r6, %wstate | |
2778 | .word 0xa1902003 ! 499: WRPR_GL_I wrpr %r0, 0x0003, %- | |
2779 | .word 0x93500000 ! 500: RDPR_TPC rdpr %tpc, %r9 | |
2780 | splash_cmpr_0_184: | |
2781 | setx 0xb6876d0ffb7554a5, %g2, %g1 | |
2782 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2783 | sub %g1, 100, %g1 | |
2784 | .word 0xb1800001 ! 501: WR_STICK_REG_R wr %r0, %r1, %- | |
2785 | .word 0xd28008a0 ! 502: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 | |
2786 | debug_0_185: | |
2787 | mov 0x38, %r18 | |
2788 | .word 0xfef00b12 ! 503: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2789 | debug_0_186: | |
2790 | mov 8, %r18 | |
2791 | .word 0xe4f00852 ! 504: STXA_R stxa %r18, [%r0 + %r18] 0x42 | |
2792 | splash_htba_0_187: | |
2793 | set 0x80000, %r2 | |
2794 | ld [%r2+%r0], %r1 | |
2795 | ta T_CHANGE_HPRIV | |
2796 | set 0x80000, %r2 | |
2797 | .word 0x8b980002 ! 505: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2798 | splash_cmpr_0_188: | |
2799 | setx 0x741169c2a17496d0, %g2, %g1 | |
2800 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2801 | sub %g1, 100, %g1 | |
2802 | .word 0xb1800001 ! 506: WR_STICK_REG_R wr %r0, %r1, %- | |
2803 | .word 0xa190200a ! 507: WRPR_GL_I wrpr %r0, 0x000a, %- | |
2804 | .word 0x8780201c ! 508: WRASI_I wr %r0, 0x001c, %asi | |
2805 | .word 0xd23fe001 ! 509: STD_I std %r9, [%r31 + 0x0001] | |
2806 | set 0x8c08a02b, %r28 | |
2807 | stxa %r28, [%g0] 0x73 | |
2808 | intvec_0_189: | |
2809 | .word 0x39400001 ! 510: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2810 | invalw | |
2811 | mov 0x32, %r30 | |
2812 | .word 0x93d0001e ! 511: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2813 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_190)) -> intp(0,0,8) | |
2814 | intvec_0_190: | |
2815 | .word 0x39400001 ! 512: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2816 | intveclr_0_191: | |
2817 | set 0x3e3fa3d8, %r28 | |
2818 | stxa %r28, [%g0] 0x72 | |
2819 | .word 0x25400001 ! 513: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2820 | .word 0x93902003 ! 514: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2821 | .word 0x87540000 ! 515: RDPR_GL rdpr %-, %r3 | |
2822 | splash_htba_0_192: | |
2823 | set 0x00390000, %r2 | |
2824 | st %r1, [%r2+%r0] | |
2825 | ta T_CHANGE_HPRIV | |
2826 | set 0x003a0000, %r2 | |
2827 | .word 0x8b980002 ! 516: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2828 | splash_lsu_0_193: | |
2829 | setx 0x439fa2ce7153caa7, %r1, %r2 | |
2830 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2831 | .word 0x3d400001 ! 517: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2832 | invalw | |
2833 | mov 0xb0, %r30 | |
2834 | .word 0x91d0001e ! 518: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2835 | ta T_CHANGE_HPRIV ! macro | |
2836 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_194)) -> intp(0,0,2) | |
2837 | intvec_0_194: | |
2838 | .word 0x39400001 ! 520: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2839 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2840 | ta T_CHANGE_NONHPRIV ! macro | |
2841 | .word 0xa5a01969 ! 521: FqTOd dis not found | |
2842 | ||
2843 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_196)) -> intp(0,0,1) | |
2844 | intvec_0_196: | |
2845 | .word 0x39400001 ! 522: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2846 | .word 0x9350c000 ! 523: RDPR_TT rdpr %tt, %r9 | |
2847 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_197)) -> intp(0,1,3) | |
2848 | xir_0_197: | |
2849 | .word 0xa980e001 ! 524: WR_SET_SOFTINT_I wr %r3, 0x0001, %set_softint | |
2850 | splash_lsu_0_198: | |
2851 | setx 0x9797464fb78de811, %r1, %r2 | |
2852 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2853 | .word 0x3d400001 ! 525: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2854 | .word 0xd227e001 ! 526: STW_I stw %r9, [%r31 + 0x0001] | |
2855 | .word 0xa190200c ! 527: WRPR_GL_I wrpr %r0, 0x000c, %- | |
2856 | set 0x127aa52, %r28 | |
2857 | stxa %r28, [%g0] 0x73 | |
2858 | intvec_0_199: | |
2859 | .word 0x39400001 ! 528: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2860 | .word 0x8198275d ! 529: WRHPR_HPSTATE_I wrhpr %r0, 0x075d, %hpstate | |
2861 | splash_lsu_0_200: | |
2862 | setx 0x20fe68b297ded8a7, %r1, %r2 | |
2863 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2864 | .word 0x3d400001 ! 530: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2865 | .word 0x8d9023d8 ! 531: WRPR_PSTATE_I wrpr %r0, 0x03d8, %pstate | |
2866 | .word 0x8d903587 ! 532: WRPR_PSTATE_I wrpr %r0, 0x1587, %pstate | |
2867 | otherw | |
2868 | mov 0xb4, %r30 | |
2869 | .word 0x91d0001e ! 533: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2870 | .word 0xd397e001 ! 534: LDQFA_I - [%r31, 0x0001], %f9 | |
2871 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_201)) -> intp(0,1,3) | |
2872 | xir_0_201: | |
2873 | .word 0xa9826001 ! 535: WR_SET_SOFTINT_I wr %r9, 0x0001, %set_softint | |
2874 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_202)) -> intp(0,1,3) | |
2875 | xir_0_202: | |
2876 | .word 0xa9816001 ! 536: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
2877 | .word 0x99902005 ! 537: WRPR_CLEANWIN_I wrpr %r0, 0x0005, %cleanwin | |
2878 | .word 0xd29fc020 ! 538: LDDA_R ldda [%r31, %r0] 0x01, %r9 | |
2879 | .word 0xd2c7e000 ! 539: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r9 | |
2880 | debug_0_203: | |
2881 | mov 0x38, %r18 | |
2882 | .word 0xfef00b12 ! 540: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
2883 | .word 0xd2800be0 ! 541: LDUWA_R lduwa [%r0, %r0] 0x5f, %r9 | |
2884 | splash_cmpr_0_204: | |
2885 | setx 0xf6d4bd80d3f646e8, %g2, %g1 | |
2886 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2887 | sub %g1, 100, %g1 | |
2888 | .word 0xb1800001 ! 542: WR_STICK_REG_R wr %r0, %r1, %- | |
2889 | .word 0xd297e020 ! 543: LDUHA_I lduha [%r31, + 0x0020] %asi, %r9 | |
2890 | .word 0x8d903cef ! 544: WRPR_PSTATE_I wrpr %r0, 0x1cef, %pstate | |
2891 | .word 0x87802058 ! 545: WRASI_I wr %r0, 0x0058, %asi | |
2892 | debug_0_205: | |
2893 | setx debug_0_205 + 64, %r11, %r19 | |
2894 | mov 0x38, %r18 | |
2895 | .word 0xe6f00b12 ! 546: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
2896 | .word 0x91d02034 ! 547: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2897 | nop | |
2898 | mov 0x80, %g3 | |
2899 | stxa %g3, [%g3] 0x57 | |
2900 | .word 0xd25fc000 ! 548: LDX_R ldx [%r31 + %r0], %r9 | |
2901 | .word 0xd28804a0 ! 549: LDUBA_R lduba [%r0, %r0] 0x25, %r9 | |
2902 | .word 0xd2800bc0 ! 550: LDUWA_R lduwa [%r0, %r0] 0x5e, %r9 | |
2903 | .word 0xd227e001 ! 551: STW_I stw %r9, [%r31 + 0x0001] | |
2904 | splash_cmpr_0_206: | |
2905 | setx 0x7139fdbd78b64001, %g2, %g1 | |
2906 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2907 | sub %g1, 100, %g1 | |
2908 | .word 0xb1800001 ! 552: WR_STICK_REG_R wr %r0, %r1, %- | |
2909 | .word 0xd21fc000 ! 553: LDD_R ldd [%r31 + %r0], %r9 | |
2910 | .word 0x8d9026c7 ! 554: WRPR_PSTATE_I wrpr %r0, 0x06c7, %pstate | |
2911 | .word 0xa1480000 ! 555: RDHPR_HPSTATE rdhpr %hpstate, %r16 | |
2912 | debug_0_207: | |
2913 | mov 8, %r18 | |
2914 | .word 0xe4f00852 ! 556: STXA_R stxa %r18, [%r0 + %r18] 0x42 | |
2915 | intveclr_0_208: | |
2916 | set 0x39f09fc3, %r28 | |
2917 | stxa %r28, [%g0] 0x72 | |
2918 | .word 0x25400001 ! 557: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2919 | .word 0xe137c009 ! 558: STQF_R - %f16, [%r9, %r31] | |
2920 | .word 0x87802004 ! 559: WRASI_I wr %r0, 0x0004, %asi | |
2921 | .word 0x93902003 ! 560: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
2922 | .word 0x87802020 ! 561: WRASI_I wr %r0, 0x0020, %asi | |
2923 | set 0x147876e5, %r28 | |
2924 | stxa %r28, [%g0] 0x73 | |
2925 | intvec_0_209: | |
2926 | .word 0x39400001 ! 562: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2927 | .word 0x93d020b2 ! 563: Tcc_I tne icc_or_xcc, %r0 + 178 | |
2928 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_210)) -> intp(0,0,13) | |
2929 | intvec_0_210: | |
2930 | .word 0x39400001 ! 564: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2931 | tagged_0_211: | |
2932 | taddcctv %r4, 0x1bed, %r19 | |
2933 | .word 0xe007e001 ! 565: LDUW_I lduw [%r31 + 0x0001], %r16 | |
2934 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_212)) -> intp(0,0,30) | |
2935 | intvec_0_212: | |
2936 | .word 0x39400001 ! 566: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2937 | debug_0_213: | |
2938 | mov 8, %r18 | |
2939 | .word 0xdaf00852 ! 567: STXA_R stxa %r13, [%r0 + %r18] 0x42 | |
2940 | .word 0x9f802001 ! 568: SIR sir 0x0001 | |
2941 | .word 0xe05fe001 ! 569: LDX_I ldx [%r31 + 0x0001], %r16 | |
2942 | .word 0x2c700001 ! 570: BPNEG <illegal instruction> | |
2943 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_214)) -> intp(0,0,30) | |
2944 | intvec_0_214: | |
2945 | .word 0x39400001 ! 571: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2946 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_215)) -> intp(0,1,3) | |
2947 | xir_0_215: | |
2948 | .word 0xa9802001 ! 572: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
2949 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_216)) -> intp(0,1,3) | |
2950 | xir_0_216: | |
2951 | .word 0xa9806001 ! 573: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
2952 | ta T_CHANGE_HPRIV ! macro | |
2953 | .word 0x87902285 ! 575: WRPR_TT_I wrpr %r0, 0x0285, %tt | |
2954 | .word 0x93902007 ! 576: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
2955 | intveclr_0_217: | |
2956 | set 0xc0134bd7, %r28 | |
2957 | stxa %r28, [%g0] 0x72 | |
2958 | .word 0x25400001 ! 577: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2959 | tagged_0_218: | |
2960 | tsubcctv %r21, 0x1112, %r13 | |
2961 | .word 0xe007e001 ! 578: LDUW_I lduw [%r31 + 0x0001], %r16 | |
2962 | otherw | |
2963 | mov 0x33, %r30 | |
2964 | .word 0x91d0001e ! 579: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2965 | tagged_0_219: | |
2966 | taddcctv %r4, 0x11d9, %r8 | |
2967 | .word 0xe007e001 ! 580: LDUW_I lduw [%r31 + 0x0001], %r16 | |
2968 | .word 0xe01fe001 ! 581: LDD_I ldd [%r31 + 0x0001], %r16 | |
2969 | .word 0x8d903d37 ! 582: WRPR_PSTATE_I wrpr %r0, 0x1d37, %pstate | |
2970 | .word 0x93902000 ! 583: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2971 | invalw | |
2972 | mov 0xb3, %r30 | |
2973 | .word 0x91d0001e ! 584: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2974 | .word 0xa5500000 ! 585: RDPR_TPC rdpr %tpc, %r18 | |
2975 | .word 0xad84e001 ! 586: WR_SOFTINT_REG_I wr %r19, 0x0001, %softint | |
2976 | .word 0x99902000 ! 587: WRPR_CLEANWIN_I wrpr %r0, 0x0000, %cleanwin | |
2977 | .word 0xa984800a ! 588: WR_SET_SOFTINT_R wr %r18, %r10, %set_softint | |
2978 | .word 0x8d9030cd ! 589: WRPR_PSTATE_I wrpr %r0, 0x10cd, %pstate | |
2979 | .word 0xe407c000 ! 590: LDUW_R lduw [%r31 + %r0], %r18 | |
2980 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_220)) -> intp(0,1,3) | |
2981 | xir_0_220: | |
2982 | .word 0xa982a001 ! 591: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
2983 | .word 0x97520000 ! 592: RDPR_PIL <illegal instruction> | |
2984 | mondo_0_221: | |
2985 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2986 | ||
2987 | stxa %r6, [%r0+0x3d8] %asi | |
2988 | .word 0x9d94c000 ! 593: WRPR_WSTATE_R wrpr %r19, %r0, %wstate | |
2989 | .word 0xd647c000 ! 594: LDSW_R ldsw [%r31 + %r0], %r11 | |
2990 | splash_lsu_0_222: | |
2991 | setx 0x6e4c8b6023c77131, %r1, %r2 | |
2992 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2993 | .word 0x3d400001 ! 595: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2994 | ta T_CHANGE_PRIV ! macro | |
2995 | DS_0_223: | |
2996 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2997 | .word 0xbfefc000 ! 597: RESTORE_R restore %r31, %r0, %r31 | |
2998 | .word 0xd7e7c020 ! 598: CASA_I casa [%r31] 0x 1, %r0, %r11 | |
2999 | mondo_0_224: | |
3000 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3001 | ||
3002 | stxa %r13, [%r0+0x3c0] %asi | |
3003 | .word 0x9d900008 ! 599: WRPR_WSTATE_R wrpr %r0, %r8, %wstate | |
3004 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3005 | ta T_CHANGE_NONHPRIV ! macro | |
3006 | .word 0x916c2001 ! 600: SDIVX_I sdivx %r16, 0x0001, %r8 | |
3007 | intveclr_0_226: | |
3008 | set 0xe12db6b1, %r28 | |
3009 | stxa %r28, [%g0] 0x72 | |
3010 | .word 0x25400001 ! 601: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3011 | splash_cmpr_0_227: | |
3012 | setx 0x681cdb08fbe6048f, %g2, %g1 | |
3013 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3014 | sub %g1, 100, %g1 | |
3015 | .word 0xb1800001 ! 602: WR_STICK_REG_R wr %r0, %r1, %- | |
3016 | .word 0x91d02034 ! 603: Tcc_I ta icc_or_xcc, %r0 + 52 | |
3017 | splash_cmpr_0_228: | |
3018 | setx 0x1cbdf7902e22614c, %g2, %g1 | |
3019 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3020 | sub %g1, 100, %g1 | |
3021 | .word 0xb1800001 ! 604: WR_STICK_REG_R wr %r0, %r1, %- | |
3022 | .word 0xd04fc000 ! 605: LDSB_R ldsb [%r31 + %r0], %r8 | |
3023 | otherw | |
3024 | mov 0x33, %r30 | |
3025 | .word 0x91d0001e ! 606: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3026 | .word 0x8d903434 ! 607: WRPR_PSTATE_I wrpr %r0, 0x1434, %pstate | |
3027 | intveclr_0_229: | |
3028 | set 0x6b384f41, %r28 | |
3029 | stxa %r28, [%g0] 0x72 | |
3030 | .word 0x25400001 ! 608: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3031 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_230)) -> intp(0,0,20) | |
3032 | intvec_0_230: | |
3033 | .word 0x39400001 ! 609: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3034 | tagged_0_231: | |
3035 | taddcctv %r7, 0x193f, %r11 | |
3036 | .word 0xd007e001 ! 610: LDUW_I lduw [%r31 + 0x0001], %r8 | |
3037 | .word 0xd0800c60 ! 611: LDUWA_R lduwa [%r0, %r0] 0x63, %r8 | |
3038 | nop | |
3039 | mov 0x80, %g3 | |
3040 | stxa %g3, [%g3] 0x5f | |
3041 | .word 0xd05fc000 ! 612: LDX_R ldx [%r31 + %r0], %r8 | |
3042 | debug_0_232: | |
3043 | setx debug_0_232 + 64, %r11, %r19 | |
3044 | mov 0x38, %r18 | |
3045 | .word 0xe6f00b12 ! 613: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3046 | .word 0xa1902001 ! 614: WRPR_GL_I wrpr %r0, 0x0001, %- | |
3047 | .word 0xd09fc020 ! 615: LDDA_R ldda [%r31, %r0] 0x01, %r8 | |
3048 | .word 0xd127e001 ! 616: STF_I st %f8, [0x0001, %r31] | |
3049 | set 0x34397f47, %r28 | |
3050 | stxa %r28, [%g0] 0x73 | |
3051 | intvec_0_233: | |
3052 | .word 0x39400001 ! 617: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3053 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3054 | ta T_CHANGE_NONPRIV ! macro | |
3055 | .word 0x87a01972 ! 618: FqTOd dis not found | |
3056 | ||
3057 | .word 0xc6c7e020 ! 619: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r3 | |
3058 | otherw | |
3059 | mov 0x31, %r30 | |
3060 | .word 0x91d0001e ! 620: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3061 | splash_lsu_0_235: | |
3062 | setx 0x713557640a6f03c7, %r1, %r2 | |
3063 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3064 | .word 0x3d400001 ! 621: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3065 | .word 0xc737c012 ! 622: STQF_R - %f3, [%r18, %r31] | |
3066 | .word 0x87802010 ! 623: WRASI_I wr %r0, 0x0010, %asi | |
3067 | invalw | |
3068 | mov 0x33, %r30 | |
3069 | .word 0x83d0001e ! 624: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3070 | .word 0xc68fe010 ! 625: LDUBA_I lduba [%r31, + 0x0010] %asi, %r3 | |
3071 | .word 0xc68008a0 ! 626: LDUWA_R lduwa [%r0, %r0] 0x45, %r3 | |
3072 | debug_0_236: | |
3073 | mov 0x38, %r18 | |
3074 | .word 0xfef00b12 ! 627: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3075 | .word 0x9550c000 ! 628: RDPR_TT rdpr %tt, %r10 | |
3076 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_237)) -> intp(0,1,3) | |
3077 | xir_0_237: | |
3078 | .word 0xa984e001 ! 629: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
3079 | nop | |
3080 | mov 0x80, %g3 | |
3081 | stxa %g3, [%g3] 0x57 | |
3082 | .word 0xd45fc000 ! 630: LDX_R ldx [%r31 + %r0], %r10 | |
3083 | invalw | |
3084 | mov 0xb1, %r30 | |
3085 | .word 0x91d0001e ! 631: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3086 | .word 0x8d802000 ! 632: WRFPRS_I wr %r0, 0x0000, %fprs | |
3087 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_238)) -> intp(0,0,5) | |
3088 | intvec_0_238: | |
3089 | .word 0x39400001 ! 633: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3090 | debug_0_239: | |
3091 | mov 0x38, %r18 | |
3092 | .word 0xfef00b12 ! 634: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3093 | .word 0x32800001 ! 635: BNE bne,a <label_0x1> | |
3094 | splash_cmpr_0_240: | |
3095 | setx 0x0c760055607f0203, %g2, %g1 | |
3096 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3097 | sub %g1, 100, %g1 | |
3098 | .word 0xb1800001 ! 636: WR_STICK_REG_R wr %r0, %r1, %- | |
3099 | .word 0xd48008a0 ! 637: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
3100 | mondo_0_241: | |
3101 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3102 | ||
3103 | stxa %r1, [%r0+0x3c0] %asi | |
3104 | .word 0x9d924011 ! 638: WRPR_WSTATE_R wrpr %r9, %r17, %wstate | |
3105 | DS_0_242: | |
3106 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3107 | .word 0xbfe7c000 ! 639: SAVE_R save %r31, %r0, %r31 | |
3108 | .word 0x8d902f87 ! 640: WRPR_PSTATE_I wrpr %r0, 0x0f87, %pstate | |
3109 | .word 0x8790208a ! 641: WRPR_TT_I wrpr %r0, 0x008a, %tt | |
3110 | .word 0x91d02034 ! 642: Tcc_I ta icc_or_xcc, %r0 + 52 | |
3111 | ta T_CHANGE_HPRIV ! macro | |
3112 | splash_cmpr_0_243: | |
3113 | setx 0xbc5d77572dd707e4, %g2, %g1 | |
3114 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3115 | sub %g1, 100, %g1 | |
3116 | .word 0xb1800001 ! 644: WR_STICK_REG_R wr %r0, %r1, %- | |
3117 | debug_0_244: | |
3118 | setx debug_0_244 + 64, %r11, %r19 | |
3119 | mov 0x38, %r18 | |
3120 | .word 0xe6f00b12 ! 645: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3121 | DS_0_245: | |
3122 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3123 | pdist %f16, %f22, %f8 | |
3124 | .word 0x81b10311 ! 646: ALIGNADDRESS alignaddr %r4, %r17, %r0 | |
3125 | .word 0x8d903590 ! 647: WRPR_PSTATE_I wrpr %r0, 0x1590, %pstate | |
3126 | .word 0xc04fe001 ! 648: LDSB_I ldsb [%r31 + 0x0001], %r0 | |
3127 | .word 0xc0d804a0 ! 649: LDXA_R ldxa [%r0, %r0] 0x25, %r0 | |
3128 | mondo_0_246: | |
3129 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3130 | ||
3131 | stxa %r20, [%r0+0x3c8] %asi | |
3132 | .word 0x9d908000 ! 650: WRPR_WSTATE_R wrpr %r2, %r0, %wstate | |
3133 | otherw | |
3134 | mov 0x30, %r30 | |
3135 | .word 0x91d0001e ! 651: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3136 | otherw | |
3137 | mov 0x34, %r30 | |
3138 | .word 0x91d0001e ! 652: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3139 | debug_0_247: | |
3140 | setx debug_0_247 + 64, %r11, %r19 | |
3141 | mov 0x38, %r18 | |
3142 | .word 0xe6f00b12 ! 653: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3143 | mondo_0_248: | |
3144 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3145 | ||
3146 | stxa %r10, [%r0+0x3e0] %asi | |
3147 | .word 0x9d904006 ! 654: WRPR_WSTATE_R wrpr %r1, %r6, %wstate | |
3148 | otherw | |
3149 | mov 0x35, %r30 | |
3150 | .word 0x83d0001e ! 655: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3151 | nop | |
3152 | mov 0x80, %g3 | |
3153 | stxa %g3, [%g3] 0x57 | |
3154 | .word 0xc05fc000 ! 656: LDX_R ldx [%r31 + %r0], %r0 | |
3155 | otherw | |
3156 | mov 0x32, %r30 | |
3157 | .word 0x93d0001e ! 657: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3158 | .word 0xc137e001 ! 658: STQF_I - %f0, [0x0001, %r31] | |
3159 | debug_0_249: | |
3160 | mov 8, %r18 | |
3161 | .word 0xe6f00852 ! 659: STXA_R stxa %r19, [%r0 + %r18] 0x42 | |
3162 | .word 0xc057e001 ! 660: LDSH_I ldsh [%r31 + 0x0001], %r0 | |
3163 | mondo_0_250: | |
3164 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3165 | ||
3166 | stxa %r16, [%r0+0x3e8] %asi | |
3167 | .word 0x9d904014 ! 661: WRPR_WSTATE_R wrpr %r1, %r20, %wstate | |
3168 | splash_lsu_0_251: | |
3169 | setx 0xe4dd6ed164d3ee7b, %r1, %r2 | |
3170 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3171 | .word 0x3d400001 ! 662: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3172 | .word 0xa1902002 ! 663: WRPR_GL_I wrpr %r0, 0x0002, %- | |
3173 | .word 0xc0dfe020 ! 664: LDXA_I ldxa [%r31, + 0x0020] %asi, %r0 | |
3174 | splash_cmpr_0_252: | |
3175 | setx 0x6c505865602f512a, %g2, %g1 | |
3176 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3177 | sub %g1, 100, %g1 | |
3178 | .word 0xb1800001 ! 665: WR_STICK_REG_R wr %r0, %r1, %- | |
3179 | splash_htba_0_253: | |
3180 | set 0x80000, %r2 | |
3181 | ld [%r2+%r0], %r1 | |
3182 | ta T_CHANGE_HPRIV | |
3183 | set 0x80000, %r2 | |
3184 | .word 0x8b980002 ! 666: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3185 | splash_lsu_0_254: | |
3186 | setx 0x1df726d0892131cb, %r1, %r2 | |
3187 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3188 | .word 0x3d400001 ! 667: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3189 | .word 0xc08008a0 ! 668: LDUWA_R lduwa [%r0, %r0] 0x45, %r0 | |
3190 | .word 0x87802088 ! 669: WRASI_I wr %r0, 0x0088, %asi | |
3191 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
3192 | ta T_CHANGE_NONHPRIV ! macro | |
3193 | .word 0xa1692001 ! 670: SDIVX_I sdivx %r4, 0x0001, %r16 | |
3194 | .word 0xa190200e ! 671: WRPR_GL_I wrpr %r0, 0x000e, %- | |
3195 | .word 0x879022c0 ! 672: WRPR_TT_I wrpr %r0, 0x02c0, %tt | |
3196 | .word 0x91d020b4 ! 673: Tcc_I ta icc_or_xcc, %r0 + 180 | |
3197 | .word 0x93902002 ! 674: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3198 | .word 0xe08804a0 ! 675: LDUBA_R lduba [%r0, %r0] 0x25, %r16 | |
3199 | splash_cmpr_0_256: | |
3200 | setx 0x1a82565b95681591, %g2, %g1 | |
3201 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3202 | sub %g1, 100, %g1 | |
3203 | .word 0xb1800001 ! 676: WR_STICK_REG_R wr %r0, %r1, %- | |
3204 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_257)) -> intp(0,1,3) | |
3205 | xir_0_257: | |
3206 | .word 0xa9826001 ! 677: WR_SET_SOFTINT_I wr %r9, 0x0001, %set_softint | |
3207 | .word 0xe13fe001 ! 678: STDF_I std %f16, [0x0001, %r31] | |
3208 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_258)) -> intp(0,0,4) | |
3209 | intvec_0_258: | |
3210 | .word 0x39400001 ! 679: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3211 | tagged_0_259: | |
3212 | taddcctv %r12, 0x1d4b, %r22 | |
3213 | .word 0xe007e001 ! 680: LDUW_I lduw [%r31 + 0x0001], %r16 | |
3214 | DS_0_260: | |
3215 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3216 | .xword 0xef6efaf8 ! Random illegal ? | |
3217 | .word 0x87a00553 ! 1: FSQRTd fsqrt | |
3218 | .word 0x95a2c82c ! 681: FADDs fadds %f11, %f12, %f10 | |
3219 | .word 0x8d802004 ! 682: WRFPRS_I wr %r0, 0x0004, %fprs | |
3220 | .word 0xd597e001 ! 683: LDQFA_I - [%r31, 0x0001], %f10 | |
3221 | .word 0x93902002 ! 684: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3222 | set 0x8877fd12, %r28 | |
3223 | stxa %r28, [%g0] 0x73 | |
3224 | intvec_0_261: | |
3225 | .word 0x39400001 ! 685: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3226 | DS_0_262: | |
3227 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3228 | .word 0xd5340007 ! 1: STQF_R - %f10, [%r7, %r16] | |
3229 | normalw | |
3230 | .word 0xa1458000 ! 686: RD_SOFTINT_REG rd %softint, %r16 | |
3231 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_263)) -> intp(0,1,3) | |
3232 | xir_0_263: | |
3233 | .word 0xa980e001 ! 687: WR_SET_SOFTINT_I wr %r3, 0x0001, %set_softint | |
3234 | DS_0_264: | |
3235 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3236 | allclean | |
3237 | .word 0x93b10303 ! 688: ALIGNADDRESS alignaddr %r4, %r3, %r9 | |
3238 | .word 0xd28008a0 ! 689: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 | |
3239 | otherw | |
3240 | mov 0x32, %r30 | |
3241 | .word 0x91d0001e ! 690: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3242 | .word 0x93902005 ! 691: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
3243 | debug_0_265: | |
3244 | setx debug_0_265 + 64, %r11, %r19 | |
3245 | mov 0x38, %r18 | |
3246 | .word 0xe6f00b12 ! 692: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3247 | tagged_0_266: | |
3248 | tsubcctv %r17, 0x1858, %r11 | |
3249 | .word 0xd207e001 ! 693: LDUW_I lduw [%r31 + 0x0001], %r9 | |
3250 | .word 0xd257e001 ! 694: LDSH_I ldsh [%r31 + 0x0001], %r9 | |
3251 | .word 0xd29fe001 ! 695: LDDA_I ldda [%r31, + 0x0001] %asi, %r9 | |
3252 | DS_0_267: | |
3253 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3254 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3255 | .word 0x99a00550 ! 1: FSQRTd fsqrt | |
3256 | .word 0x8da4c831 ! 696: FADDs fadds %f19, %f17, %f6 | |
3257 | .word 0x87802016 ! 697: WRASI_I wr %r0, 0x0016, %asi | |
3258 | invalw | |
3259 | mov 0x35, %r30 | |
3260 | .word 0x93d0001e ! 698: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3261 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_268)) -> intp(0,1,3) | |
3262 | xir_0_268: | |
3263 | .word 0xa982e001 ! 699: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
3264 | .word 0x3a800001 ! 700: BCC bcc,a <label_0x1> | |
3265 | DS_0_269: | |
3266 | nop | |
3267 | not %g0, %g2 | |
3268 | jmp %g2 | |
3269 | .word 0x9d902004 ! 701: WRPR_WSTATE_I wrpr %r0, 0x0004, %wstate | |
3270 | .word 0x22700001 ! 702: BPE <illegal instruction> | |
3271 | .word 0x95a0054d ! 703: FSQRTd fsqrt | |
3272 | .word 0xd48008a0 ! 704: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
3273 | .word 0xd597e001 ! 705: LDQFA_I - [%r31, 0x0001], %f10 | |
3274 | splash_lsu_0_270: | |
3275 | setx 0x370a5a637f1c2d65, %r1, %r2 | |
3276 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3277 | .word 0x3d400001 ! 706: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3278 | .word 0xd407c000 ! 707: LDUW_R lduw [%r31 + %r0], %r10 | |
3279 | debug_0_271: | |
3280 | setx debug_0_271 + 64, %r11, %r19 | |
3281 | mov 0x38, %r18 | |
3282 | .word 0xe6f00b12 ! 708: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3283 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_272)) -> intp(0,0,12) | |
3284 | intvec_0_272: | |
3285 | .word 0x39400001 ! 709: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3286 | otherw | |
3287 | mov 0xb2, %r30 | |
3288 | .word 0x83d0001e ! 710: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3289 | .word 0x87802014 ! 711: WRASI_I wr %r0, 0x0014, %asi | |
3290 | .word 0xd4800b40 ! 712: LDUWA_R lduwa [%r0, %r0] 0x5a, %r10 | |
3291 | intveclr_0_273: | |
3292 | set 0xca66f17e, %r28 | |
3293 | stxa %r28, [%g0] 0x72 | |
3294 | .word 0x25400001 ! 713: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3295 | ta T_CHANGE_HPRIV ! macro | |
3296 | .word 0xd48008a0 ! 715: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
3297 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_274)) -> intp(0,1,3) | |
3298 | xir_0_274: | |
3299 | .word 0xa9812001 ! 716: WR_SET_SOFTINT_I wr %r4, 0x0001, %set_softint | |
3300 | splash_cmpr_0_275: | |
3301 | setx 0xb4c3f38b39ae6aed, %g2, %g1 | |
3302 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3303 | sub %g1, 100, %g1 | |
3304 | .word 0xb1800001 ! 717: WR_STICK_REG_R wr %r0, %r1, %- | |
3305 | .word 0xa1902002 ! 718: WRPR_GL_I wrpr %r0, 0x0002, %- | |
3306 | .word 0xd4dfe030 ! 719: LDXA_I ldxa [%r31, + 0x0030] %asi, %r10 | |
3307 | .word 0xd517c000 ! 720: LDQF_R - [%r31, %r0], %f10 | |
3308 | .word 0x9345c000 ! 721: RD_TICK_CMPR_REG rd %-, %r9 | |
3309 | splash_lsu_0_276: | |
3310 | setx 0xcab3ab6291f95a95, %r1, %r2 | |
3311 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3312 | .word 0x3d400001 ! 722: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3313 | debug_0_277: | |
3314 | setx debug_0_277 + 64, %r11, %r19 | |
3315 | mov 0x38, %r18 | |
3316 | .word 0xe6f00b12 ! 723: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3317 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_278)) -> intp(0,0,14) | |
3318 | intvec_0_278: | |
3319 | .word 0x39400001 ! 724: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3320 | DS_0_279: | |
3321 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3322 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3323 | .word 0xe3108013 ! 1: LDQF_R - [%r2, %r19], %f17 | |
3324 | .word 0xa3a4082c ! 725: FADDs fadds %f16, %f12, %f17 | |
3325 | mondo_0_280: | |
3326 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3327 | ||
3328 | stxa %r19, [%r0+0x3c0] %asi | |
3329 | .word 0x9d91c001 ! 726: WRPR_WSTATE_R wrpr %r7, %r1, %wstate | |
3330 | .word 0x93902001 ! 727: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
3331 | .word 0x81460000 ! 728: RD_STICK_REG stbar | |
3332 | .word 0x32800001 ! 729: BNE bne,a <label_0x1> | |
3333 | .word 0x8780201c ! 730: WRASI_I wr %r0, 0x001c, %asi | |
3334 | .word 0xa968800d ! 731: SDIVX_R sdivx %r2, %r13, %r20 | |
3335 | change_to_randtl_0_281: | |
3336 | ta T_CHANGE_HPRIV ! macro | |
3337 | done_change_to_randtl_0_281: | |
3338 | .word 0x8f902003 ! 732: WRPR_TL_I wrpr %r0, 0x0003, %tl | |
3339 | .word 0xe917c000 ! 733: LDQF_R - [%r31, %r0], %f20 | |
3340 | .word 0x8d802000 ! 734: WRFPRS_I wr %r0, 0x0000, %fprs | |
3341 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_282)) -> intp(0,1,3) | |
3342 | xir_0_282: | |
3343 | .word 0xa984e001 ! 735: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
3344 | .word 0x93902002 ! 736: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3345 | mondo_0_283: | |
3346 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3347 | ||
3348 | stxa %r9, [%r0+0x3c0] %asi | |
3349 | .word 0x9d930012 ! 737: WRPR_WSTATE_R wrpr %r12, %r18, %wstate | |
3350 | .word 0x87802058 ! 738: WRASI_I wr %r0, 0x0058, %asi | |
3351 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_284)) -> intp(0,1,3) | |
3352 | xir_0_284: | |
3353 | .word 0xa984a001 ! 739: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
3354 | set 0xfe78ba26, %r28 | |
3355 | stxa %r28, [%g0] 0x73 | |
3356 | intvec_0_285: | |
3357 | .word 0x39400001 ! 740: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3358 | .word 0xe857c000 ! 741: LDSH_R ldsh [%r31 + %r0], %r20 | |
3359 | debug_0_286: | |
3360 | setx debug_0_286 + 64, %r11, %r19 | |
3361 | mov 0x38, %r18 | |
3362 | .word 0xe6f00b12 ! 742: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3363 | tagged_0_287: | |
3364 | taddcctv %r23, 0x153f, %r13 | |
3365 | .word 0xe807e001 ! 743: LDUW_I lduw [%r31 + 0x0001], %r20 | |
3366 | .word 0x81460000 ! 744: RD_STICK_REG stbar | |
3367 | .word 0xe93fe001 ! 745: STDF_I std %f20, [0x0001, %r31] | |
3368 | .word 0x32700001 ! 746: BPNE <illegal instruction> | |
3369 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_288)) -> intp(0,0,31) | |
3370 | intvec_0_288: | |
3371 | .word 0x39400001 ! 747: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3372 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3373 | ta T_CHANGE_NONHPRIV ! macro | |
3374 | .word 0xa7a01962 ! 748: FqTOd dis not found | |
3375 | ||
3376 | splash_lsu_0_290: | |
3377 | setx 0x545e2676d477955b, %r1, %r2 | |
3378 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3379 | .word 0x3d400001 ! 749: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3380 | .word 0x91d02033 ! 750: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3381 | .word 0xe69fe001 ! 751: LDDA_I ldda [%r31, + 0x0001] %asi, %r19 | |
3382 | splash_htba_0_291: | |
3383 | set 0x003b0000, %r2 | |
3384 | ld [%r2+%r0], %r1 | |
3385 | ta T_CHANGE_HPRIV | |
3386 | set 0x00380000, %r2 | |
3387 | .word 0x8b980002 ! 752: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3388 | .word 0x91d020b2 ! 753: Tcc_I ta icc_or_xcc, %r0 + 178 | |
3389 | .word 0x8d802004 ! 754: WRFPRS_I wr %r0, 0x0004, %fprs | |
3390 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_292)) -> intp(0,0,1) | |
3391 | intvec_0_292: | |
3392 | .word 0x39400001 ! 755: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3393 | .word 0xe6d7e000 ! 756: LDSHA_I ldsha [%r31, + 0x0000] %asi, %r19 | |
3394 | splash_cmpr_0_293: | |
3395 | setx 0x593b3df0987a4217, %g2, %g1 | |
3396 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3397 | sub %g1, 100, %g1 | |
3398 | .word 0xb1800001 ! 757: WR_STICK_REG_R wr %r0, %r1, %- | |
3399 | ta T_CHANGE_PRIV ! macro | |
3400 | .word 0xe69fc020 ! 759: LDDA_R ldda [%r31, %r0] 0x01, %r19 | |
3401 | splash_htba_0_294: | |
3402 | set 0x00390000, %r2 | |
3403 | st %r1, [%r2+%r0] | |
3404 | ta T_CHANGE_HPRIV | |
3405 | set 0x003a0000, %r2 | |
3406 | .word 0x8b980002 ! 760: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3407 | .word 0xe71fe001 ! 761: LDDF_I ldd [%r31, 0x0001], %f19 | |
3408 | set 0xd1d2af4e, %r28 | |
3409 | stxa %r28, [%g0] 0x73 | |
3410 | intvec_0_295: | |
3411 | .word 0x39400001 ! 762: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3412 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_296)) -> intp(0,0,23) | |
3413 | intvec_0_296: | |
3414 | .word 0x39400001 ! 763: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3415 | set 0xdf5764ca, %r28 | |
3416 | stxa %r28, [%g0] 0x73 | |
3417 | intvec_0_297: | |
3418 | .word 0x39400001 ! 764: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3419 | DS_0_298: | |
3420 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3421 | .word 0xcb34e001 ! 1: STQF_I - %f5, [0x0001, %r19] | |
3422 | normalw | |
3423 | .word 0xa9458000 ! 765: RD_SOFTINT_REG rd %softint, %r20 | |
3424 | set 0xb45b1e95, %r28 | |
3425 | stxa %r28, [%g0] 0x73 | |
3426 | intvec_0_299: | |
3427 | .word 0x39400001 ! 766: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3428 | .word 0x976a8006 ! 767: SDIVX_R sdivx %r10, %r6, %r11 | |
3429 | nop | |
3430 | mov 0x80, %g3 | |
3431 | stxa %g3, [%g3] 0x57 | |
3432 | .word 0xd65fc000 ! 768: LDX_R ldx [%r31 + %r0], %r11 | |
3433 | .word 0xd647c000 ! 769: LDSW_R ldsw [%r31 + %r0], %r11 | |
3434 | splash_cmpr_0_300: | |
3435 | setx 0x7625649ce89191fe, %g2, %g1 | |
3436 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3437 | sub %g1, 100, %g1 | |
3438 | .word 0xb1800001 ! 770: WR_STICK_REG_R wr %r0, %r1, %- | |
3439 | .word 0x9f802001 ! 771: SIR sir 0x0001 | |
3440 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_301)) -> intp(0,1,3) | |
3441 | xir_0_301: | |
3442 | .word 0xa9806001 ! 772: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
3443 | .word 0xd6c804a0 ! 773: LDSBA_R ldsba [%r0, %r0] 0x25, %r11 | |
3444 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_302)) -> intp(0,0,29) | |
3445 | intvec_0_302: | |
3446 | .word 0x39400001 ! 774: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3447 | .word 0x879020f0 ! 775: WRPR_TT_I wrpr %r0, 0x00f0, %tt | |
3448 | ta T_CHANGE_HPRIV ! macro | |
3449 | .word 0x866ce001 ! 777: UDIVX_I udivx %r19, 0x0001, %r3 | |
3450 | .word 0xa1902007 ! 778: WRPR_GL_I wrpr %r0, 0x0007, %- | |
3451 | nop | |
3452 | mov 0x80, %g3 | |
3453 | stxa %g3, [%g3] 0x57 | |
3454 | .word 0xc65fc000 ! 779: LDX_R ldx [%r31 + %r0], %r3 | |
3455 | .word 0x99902005 ! 780: WRPR_CLEANWIN_I wrpr %r0, 0x0005, %cleanwin | |
3456 | set 0xd52e1bea, %r28 | |
3457 | stxa %r28, [%g0] 0x73 | |
3458 | intvec_0_303: | |
3459 | .word 0x39400001 ! 781: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3460 | intveclr_0_304: | |
3461 | set 0xb7c702e5, %r28 | |
3462 | stxa %r28, [%g0] 0x72 | |
3463 | .word 0x25400001 ! 782: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3464 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_305)) -> intp(0,1,3) | |
3465 | xir_0_305: | |
3466 | .word 0xa982e001 ! 783: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
3467 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_306)) -> intp(0,1,3) | |
3468 | xir_0_306: | |
3469 | .word 0xa9802001 ! 784: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
3470 | .word 0xa190200b ! 785: WRPR_GL_I wrpr %r0, 0x000b, %- | |
3471 | splash_lsu_0_307: | |
3472 | setx 0x4973226670a07391, %r1, %r2 | |
3473 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3474 | .word 0x3d400001 ! 786: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3475 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_308)) -> intp(0,1,3) | |
3476 | xir_0_308: | |
3477 | .word 0xa9846001 ! 787: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
3478 | .word 0xc68008a0 ! 788: LDUWA_R lduwa [%r0, %r0] 0x45, %r3 | |
3479 | tagged_0_309: | |
3480 | taddcctv %r3, 0x1289, %r2 | |
3481 | .word 0xc607e001 ! 789: LDUW_I lduw [%r31 + 0x0001], %r3 | |
3482 | .word 0xc727e001 ! 790: STF_I st %f3, [0x0001, %r31] | |
3483 | tagged_0_310: | |
3484 | tsubcctv %r20, 0x1cda, %r18 | |
3485 | .word 0xc607e001 ! 791: LDUW_I lduw [%r31 + 0x0001], %r3 | |
3486 | debug_0_311: | |
3487 | mov 0x38, %r18 | |
3488 | .word 0xfef00b12 ! 792: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3489 | debug_0_312: | |
3490 | mov 8, %r18 | |
3491 | .word 0xd4f00852 ! 793: STXA_R stxa %r10, [%r0 + %r18] 0x42 | |
3492 | .word 0xc67fe001 ! 794: SWAP_I swap %r3, [%r31 + 0x0001] | |
3493 | .word 0xc69004a0 ! 795: LDUHA_R lduha [%r0, %r0] 0x25, %r3 | |
3494 | .word 0xa1902008 ! 796: WRPR_GL_I wrpr %r0, 0x0008, %- | |
3495 | otherw | |
3496 | mov 0x34, %r30 | |
3497 | .word 0x93d0001e ! 797: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3498 | .word 0x8790202c ! 798: WRPR_TT_I wrpr %r0, 0x002c, %tt | |
3499 | ta T_CHANGE_PRIV ! macro | |
3500 | .word 0x8d902fdb ! 800: WRPR_PSTATE_I wrpr %r0, 0x0fdb, %pstate | |
3501 | .word 0xc6dfe020 ! 801: LDXA_I ldxa [%r31, + 0x0020] %asi, %r3 | |
3502 | debug_0_313: | |
3503 | setx debug_0_313 + 64, %r11, %r19 | |
3504 | mov 0x38, %r18 | |
3505 | .word 0xe6f00b12 ! 802: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3506 | .word 0x91d02033 ! 803: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3507 | .word 0x91d02034 ! 804: Tcc_I ta icc_or_xcc, %r0 + 52 | |
3508 | intveclr_0_314: | |
3509 | set 0x6f8b56c0, %r28 | |
3510 | stxa %r28, [%g0] 0x72 | |
3511 | .word 0x25400001 ! 805: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3512 | .word 0x91d02034 ! 806: Tcc_I ta icc_or_xcc, %r0 + 52 | |
3513 | .word 0xab848002 ! 807: WR_CLEAR_SOFTINT_R wr %r18, %r2, %clear_softint | |
3514 | .word 0x8790201f ! 808: WRPR_TT_I wrpr %r0, 0x001f, %tt | |
3515 | DS_0_315: | |
3516 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3517 | allclean | |
3518 | .word 0xa1b2c304 ! 809: ALIGNADDRESS alignaddr %r11, %r4, %r16 | |
3519 | splash_cmpr_0_316: | |
3520 | setx 0x5e5d92ec57eefc44, %g2, %g1 | |
3521 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3522 | sub %g1, 100, %g1 | |
3523 | .word 0xb1800001 ! 810: WR_STICK_REG_R wr %r0, %r1, %- | |
3524 | .word 0xe09fe001 ! 811: LDDA_I ldda [%r31, + 0x0001] %asi, %r16 | |
3525 | DS_0_317: | |
3526 | nop | |
3527 | not %g0, %g2 | |
3528 | jmp %g2 | |
3529 | .word 0x9d902002 ! 812: WRPR_WSTATE_I wrpr %r0, 0x0002, %wstate | |
3530 | .word 0xe13fe001 ! 813: STDF_I std %f16, [0x0001, %r31] | |
3531 | debug_0_318: | |
3532 | mov 8, %r18 | |
3533 | .word 0xdcf00852 ! 814: STXA_R stxa %r14, [%r0 + %r18] 0x42 | |
3534 | otherw | |
3535 | mov 0x30, %r30 | |
3536 | .word 0x83d0001e ! 815: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3537 | tagged_0_319: | |
3538 | taddcctv %r11, 0x1b3d, %r6 | |
3539 | .word 0xe007e001 ! 816: LDUW_I lduw [%r31 + 0x0001], %r16 | |
3540 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_320)) -> intp(0,0,22) | |
3541 | intvec_0_320: | |
3542 | .word 0x39400001 ! 817: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3543 | .word 0xe0d7e030 ! 818: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r16 | |
3544 | debug_0_321: | |
3545 | mov 8, %r18 | |
3546 | .word 0xe2f00852 ! 819: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
3547 | .word 0xe027e001 ! 820: STW_I stw %r16, [%r31 + 0x0001] | |
3548 | .word 0x9f802001 ! 821: SIR sir 0x0001 | |
3549 | .word 0xe127e001 ! 822: STF_I st %f16, [0x0001, %r31] | |
3550 | .word 0x9ba4c9b2 ! 823: FDIVs fdivs %f19, %f18, %f13 | |
3551 | .word 0xa9a489b3 ! 824: FDIVs fdivs %f18, %f19, %f20 | |
3552 | .word 0x81982897 ! 825: WRHPR_HPSTATE_I wrhpr %r0, 0x0897, %hpstate | |
3553 | debug_0_322: | |
3554 | setx debug_0_322 + 64, %r11, %r19 | |
3555 | mov 0x38, %r18 | |
3556 | .word 0xe6f00b12 ! 826: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3557 | .word 0xe897e030 ! 827: LDUHA_I lduha [%r31, + 0x0030] %asi, %r20 | |
3558 | .word 0x87802014 ! 828: WRASI_I wr %r0, 0x0014, %asi | |
3559 | set 0xc56ec27d, %r28 | |
3560 | stxa %r28, [%g0] 0x73 | |
3561 | intvec_0_323: | |
3562 | .word 0x39400001 ! 829: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3563 | .word 0xe89fe001 ! 830: LDDA_I ldda [%r31, + 0x0001] %asi, %r20 | |
3564 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_324)) -> intp(0,0,31) | |
3565 | intvec_0_324: | |
3566 | .word 0x39400001 ! 831: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3567 | .word 0xe897e020 ! 832: LDUHA_I lduha [%r31, + 0x0020] %asi, %r20 | |
3568 | debug_0_325: | |
3569 | setx debug_0_325 + 64, %r11, %r19 | |
3570 | mov 0x38, %r18 | |
3571 | .word 0xe6f00b12 ! 833: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3572 | nop | |
3573 | mov 0x80, %g3 | |
3574 | stxa %g3, [%g3] 0x5f | |
3575 | .word 0xe85fc000 ! 834: LDX_R ldx [%r31 + %r0], %r20 | |
3576 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_326)) -> intp(0,0,15) | |
3577 | intvec_0_326: | |
3578 | .word 0x39400001 ! 835: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3579 | mondo_0_327: | |
3580 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3581 | ||
3582 | stxa %r16, [%r0+0x3c0] %asi | |
3583 | .word 0x9d904004 ! 836: WRPR_WSTATE_R wrpr %r1, %r4, %wstate | |
3584 | .word 0xe847c000 ! 837: LDSW_R ldsw [%r31 + %r0], %r20 | |
3585 | nop | |
3586 | mov 0x80, %g3 | |
3587 | stxa %g3, [%g3] 0x57 | |
3588 | .word 0xe85fc000 ! 838: LDX_R ldx [%r31 + %r0], %r20 | |
3589 | nop | |
3590 | mov 0x80, %g3 | |
3591 | stxa %g3, [%g3] 0x57 | |
3592 | .word 0xe85fc000 ! 839: LDX_R ldx [%r31 + %r0], %r20 | |
3593 | tagged_0_328: | |
3594 | tsubcctv %r15, 0x16d3, %r2 | |
3595 | .word 0xe807e001 ! 840: LDUW_I lduw [%r31 + 0x0001], %r20 | |
3596 | DS_0_329: | |
3597 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3598 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3599 | .word 0xe5108006 ! 1: LDQF_R - [%r2, %r6], %f18 | |
3600 | .word 0xa9a14822 ! 841: FADDs fadds %f5, %f2, %f20 | |
3601 | splash_lsu_0_330: | |
3602 | setx 0x704082d5aa5d3fd1, %r1, %r2 | |
3603 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3604 | .word 0x3d400001 ! 842: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3605 | .word 0xe88008a0 ! 843: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 | |
3606 | .word 0xe81fc000 ! 844: LDD_R ldd [%r31 + %r0], %r20 | |
3607 | .word 0x93902001 ! 845: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
3608 | nop | |
3609 | mov 0x80, %g3 | |
3610 | stxa %g3, [%g3] 0x57 | |
3611 | .word 0xe85fc000 ! 846: LDX_R ldx [%r31 + %r0], %r20 | |
3612 | DS_0_331: | |
3613 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3614 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3615 | .word 0xe1108008 ! 1: LDQF_R - [%r2, %r8], %f16 | |
3616 | .word 0x93a10822 ! 847: FADDs fadds %f4, %f2, %f9 | |
3617 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_332)) -> intp(0,0,16) | |
3618 | intvec_0_332: | |
3619 | .word 0x39400001 ! 848: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3620 | .word 0x8d903fee ! 849: WRPR_PSTATE_I wrpr %r0, 0x1fee, %pstate | |
3621 | .word 0x8790205b ! 850: WRPR_TT_I wrpr %r0, 0x005b, %tt | |
3622 | .word 0xa190200a ! 851: WRPR_GL_I wrpr %r0, 0x000a, %- | |
3623 | .word 0xd2c7e000 ! 852: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r9 | |
3624 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_333)) -> intp(0,1,3) | |
3625 | xir_0_333: | |
3626 | .word 0xa9806001 ! 853: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
3627 | .word 0x9f802001 ! 854: SIR sir 0x0001 | |
3628 | debug_0_334: | |
3629 | setx debug_0_334 + 64, %r11, %r19 | |
3630 | mov 0x38, %r18 | |
3631 | .word 0xe6f00b12 ! 855: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3632 | splash_lsu_0_335: | |
3633 | setx 0x1d7b99d4e875efcd, %r1, %r2 | |
3634 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3635 | .word 0x3d400001 ! 856: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3636 | .word 0x8780204f ! 857: WRASI_I wr %r0, 0x004f, %asi | |
3637 | .word 0xd22fc002 ! 858: STB_R stb %r9, [%r31 + %r2] | |
3638 | .word 0xa1902004 ! 859: WRPR_GL_I wrpr %r0, 0x0004, %- | |
3639 | .word 0xd327c002 ! 860: STF_R st %f9, [%r2, %r31] | |
3640 | .word 0x91d020b3 ! 861: Tcc_I ta icc_or_xcc, %r0 + 179 | |
3641 | .word 0x87802089 ! 862: WRASI_I wr %r0, 0x0089, %asi | |
3642 | .word 0xd247c000 ! 863: LDSW_R ldsw [%r31 + %r0], %r9 | |
3643 | .word 0x9f802001 ! 864: SIR sir 0x0001 | |
3644 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_336)) -> intp(0,0,0) | |
3645 | intvec_0_336: | |
3646 | .word 0x39400001 ! 865: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3647 | .word 0xd28008a0 ! 866: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 | |
3648 | splash_tba_0_337: | |
3649 | set 0x120000, %r2 | |
3650 | ld [%r2+%r0], %r1 | |
3651 | ta T_CHANGE_PRIV | |
3652 | set 0x120000, %r2 | |
3653 | .word 0x8b900002 ! 867: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3654 | DS_0_338: | |
3655 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3656 | pdist %f0, %f0, %f2 | |
3657 | .word 0xa5b00313 ! 868: ALIGNADDRESS alignaddr %r0, %r19, %r18 | |
3658 | .word 0x3e700001 ! 869: BPVC <illegal instruction> | |
3659 | .word 0xe44fe001 ! 870: LDSB_I ldsb [%r31 + 0x0001], %r18 | |
3660 | .word 0x87902342 ! 871: WRPR_TT_I wrpr %r0, 0x0342, %tt | |
3661 | tagged_0_339: | |
3662 | taddcctv %r9, 0x13a2, %r12 | |
3663 | .word 0xe407e001 ! 872: LDUW_I lduw [%r31 + 0x0001], %r18 | |
3664 | .word 0xe457e001 ! 873: LDSH_I ldsh [%r31 + 0x0001], %r18 | |
3665 | debug_0_340: | |
3666 | setx debug_0_340 + 64, %r11, %r19 | |
3667 | mov 0x38, %r18 | |
3668 | .word 0xe6f00b12 ! 874: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3669 | .word 0x87902033 ! 875: WRPR_TT_I wrpr %r0, 0x0033, %tt | |
3670 | .word 0xe4dfe030 ! 876: LDXA_I ldxa [%r31, + 0x0030] %asi, %r18 | |
3671 | debug_0_341: | |
3672 | mov 0x38, %r18 | |
3673 | .word 0xfef00b12 ! 877: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3674 | .word 0x97520000 ! 878: RDPR_PIL rdpr %pil, %r11 | |
3675 | tagged_0_342: | |
3676 | tsubcctv %r6, 0x1407, %r17 | |
3677 | .word 0xd607e001 ! 879: LDUW_I lduw [%r31 + 0x0001], %r11 | |
3678 | .word 0x87802063 ! 880: WRASI_I wr %r0, 0x0063, %asi | |
3679 | .word 0x30800001 ! 881: BA ba,a <label_0x1> | |
3680 | set 0xa7983e53, %r28 | |
3681 | stxa %r28, [%g0] 0x73 | |
3682 | intvec_0_343: | |
3683 | .word 0x39400001 ! 882: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3684 | change_to_randtl_0_344: | |
3685 | ta T_CHANGE_PRIV ! macro | |
3686 | done_change_to_randtl_0_344: | |
3687 | .word 0x8f902000 ! 883: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3688 | .word 0xd727e001 ! 884: STF_I st %f11, [0x0001, %r31] | |
3689 | .word 0x8d500000 ! 885: RDPR_TPC rdpr %tpc, %r6 | |
3690 | debug_0_345: | |
3691 | mov 8, %r18 | |
3692 | .word 0xd0f00852 ! 886: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
3693 | nop | |
3694 | mov 0x80, %g3 | |
3695 | stxa %g3, [%g3] 0x57 | |
3696 | .word 0xcc5fc000 ! 887: LDX_R ldx [%r31 + %r0], %r6 | |
3697 | .word 0x87802004 ! 888: WRASI_I wr %r0, 0x0004, %asi | |
3698 | .word 0xa1902003 ! 889: WRPR_GL_I wrpr %r0, 0x0003, %- | |
3699 | .word 0xcc7fe001 ! 890: SWAP_I swap %r6, [%r31 + 0x0001] | |
3700 | .word 0x91d020b3 ! 891: Tcc_I ta icc_or_xcc, %r0 + 179 | |
3701 | .word 0x819823c4 ! 892: WRHPR_HPSTATE_I wrhpr %r0, 0x03c4, %hpstate | |
3702 | .word 0x8790202c ! 893: WRPR_TT_I wrpr %r0, 0x002c, %tt | |
3703 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_346)) -> intp(0,1,3) | |
3704 | xir_0_346: | |
3705 | .word 0xa9852001 ! 894: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
3706 | splash_cmpr_0_347: | |
3707 | setx 0x4fad6eeaf4bef747, %g2, %g1 | |
3708 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3709 | sub %g1, 100, %g1 | |
3710 | .word 0xb1800001 ! 895: WR_STICK_REG_R wr %r0, %r1, %- | |
3711 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_348)) -> intp(0,0,26) | |
3712 | intvec_0_348: | |
3713 | .word 0x39400001 ! 896: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3714 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_349)) -> intp(0,1,3) | |
3715 | xir_0_349: | |
3716 | .word 0xa9816001 ! 897: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
3717 | DS_0_350: | |
3718 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3719 | .word 0xbfefc000 ! 898: RESTORE_R restore %r31, %r0, %r31 | |
3720 | .word 0xa7520000 ! 899: RDPR_PIL <illegal instruction> | |
3721 | tagged_0_351: | |
3722 | taddcctv %r22, 0x14b6, %r9 | |
3723 | .word 0xe607e001 ! 900: LDUW_I lduw [%r31 + 0x0001], %r19 | |
3724 | .word 0xe6800b00 ! 901: LDUWA_R lduwa [%r0, %r0] 0x58, %r19 | |
3725 | .word 0xa1902002 ! 902: WRPR_GL_I wrpr %r0, 0x0002, %- | |
3726 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_352)) -> intp(0,0,0) | |
3727 | intvec_0_352: | |
3728 | .word 0x39400001 ! 903: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3729 | .word 0x26700001 ! 904: BPL <illegal instruction> | |
3730 | .word 0x93902006 ! 905: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
3731 | .word 0xe647c000 ! 906: LDSW_R ldsw [%r31 + %r0], %r19 | |
3732 | .word 0xa1902006 ! 907: WRPR_GL_I wrpr %r0, 0x0006, %- | |
3733 | .word 0xa945c000 ! 908: RD_TICK_CMPR_REG rd %-, %r20 | |
3734 | set 0x66eaab60, %r28 | |
3735 | stxa %r28, [%g0] 0x73 | |
3736 | intvec_0_353: | |
3737 | .word 0x39400001 ! 909: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3738 | debug_0_354: | |
3739 | mov 8, %r18 | |
3740 | .word 0xe4f00852 ! 910: STXA_R stxa %r18, [%r0 + %r18] 0x42 | |
3741 | .word 0xa1a4c9c4 ! 911: FDIVd fdivd %f50, %f4, %f16 | |
3742 | splash_cmpr_0_355: | |
3743 | setx 0x80f7308098133628, %g2, %g1 | |
3744 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3745 | sub %g1, 100, %g1 | |
3746 | .word 0xb1800001 ! 912: WR_STICK_REG_R wr %r0, %r1, %- | |
3747 | nop | |
3748 | mov 0x80, %g3 | |
3749 | stxa %g3, [%g3] 0x57 | |
3750 | .word 0xe05fc000 ! 913: LDX_R ldx [%r31 + %r0], %r16 | |
3751 | .word 0x8d902e38 ! 914: WRPR_PSTATE_I wrpr %r0, 0x0e38, %pstate | |
3752 | splash_lsu_0_356: | |
3753 | setx 0x0ae441537ad0a2a5, %r1, %r2 | |
3754 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3755 | .word 0x3d400001 ! 915: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3756 | .word 0x8d903483 ! 916: WRPR_PSTATE_I wrpr %r0, 0x1483, %pstate | |
3757 | .word 0xa1902005 ! 917: WRPR_GL_I wrpr %r0, 0x0005, %- | |
3758 | .word 0x30800001 ! 918: BA ba,a <label_0x1> | |
3759 | debug_0_357: | |
3760 | mov 8, %r18 | |
3761 | .word 0xe2f00852 ! 919: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
3762 | .word 0x8d903aff ! 920: WRPR_PSTATE_I wrpr %r0, 0x1aff, %pstate | |
3763 | .word 0x95a01a6a ! 921: FqTOi fqtoi | |
3764 | .word 0xa1902007 ! 922: WRPR_GL_I wrpr %r0, 0x0007, %- | |
3765 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_358)) -> intp(0,0,18) | |
3766 | intvec_0_358: | |
3767 | .word 0x39400001 ! 923: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3768 | otherw | |
3769 | mov 0x31, %r30 | |
3770 | .word 0x91d0001e ! 924: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3771 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3772 | ta T_CHANGE_NONHPRIV ! macro | |
3773 | .word 0x81a01972 ! 925: FqTOd dis not found | |
3774 | ||
3775 | .word 0x91d02035 ! 926: Tcc_I ta icc_or_xcc, %r0 + 53 | |
3776 | .word 0x93902000 ! 927: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
3777 | .word 0x8d903051 ! 928: WRPR_PSTATE_I wrpr %r0, 0x1051, %pstate | |
3778 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_360)) -> intp(0,1,3) | |
3779 | xir_0_360: | |
3780 | .word 0xa9852001 ! 929: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
3781 | nop | |
3782 | mov 0x80, %g3 | |
3783 | stxa %g3, [%g3] 0x57 | |
3784 | .word 0xc05fc000 ! 930: LDX_R ldx [%r31 + %r0], %r0 | |
3785 | .word 0x99902002 ! 931: WRPR_CLEANWIN_I wrpr %r0, 0x0002, %cleanwin | |
3786 | .word 0xc00fc000 ! 932: LDUB_R ldub [%r31 + %r0], %r0 | |
3787 | splash_htba_0_361: | |
3788 | set 0x80000, %r2 | |
3789 | ld [%r2+%r0], %r1 | |
3790 | ta T_CHANGE_HPRIV | |
3791 | set 0x80000, %r2 | |
3792 | .word 0x8b980002 ! 933: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3793 | DS_0_362: | |
3794 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3795 | .word 0xc5326001 ! 1: STQF_I - %f2, [0x0001, %r9] | |
3796 | normalw | |
3797 | .word 0xa9458000 ! 934: RD_SOFTINT_REG rd %softint, %r20 | |
3798 | .word 0xe8d00e80 ! 935: LDSHA_R ldsha [%r0, %r0] 0x74, %r20 | |
3799 | .word 0x87902164 ! 936: WRPR_TT_I wrpr %r0, 0x0164, %tt | |
3800 | debug_0_363: | |
3801 | mov 8, %r18 | |
3802 | .word 0xe4f00852 ! 937: STXA_R stxa %r18, [%r0 + %r18] 0x42 | |
3803 | DS_0_364: | |
3804 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3805 | .word 0xd7312001 ! 1: STQF_I - %f11, [0x0001, %r4] | |
3806 | normalw | |
3807 | .word 0xa9458000 ! 938: RD_SOFTINT_REG rd %softint, %r20 | |
3808 | nop | |
3809 | mov 0x80, %g3 | |
3810 | stxa %g3, [%g3] 0x5f | |
3811 | .word 0xe85fc000 ! 939: LDX_R ldx [%r31 + %r0], %r20 | |
3812 | .word 0xe847c000 ! 940: LDSW_R ldsw [%r31 + %r0], %r20 | |
3813 | .word 0xe8c7e020 ! 941: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r20 | |
3814 | .word 0x91d02034 ! 942: Tcc_I ta icc_or_xcc, %r0 + 52 | |
3815 | set 0xfe1c933a, %r28 | |
3816 | stxa %r28, [%g0] 0x73 | |
3817 | intvec_0_365: | |
3818 | .word 0x39400001 ! 943: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3819 | DS_0_366: | |
3820 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3821 | .word 0xbfefc000 ! 944: RESTORE_R restore %r31, %r0, %r31 | |
3822 | intveclr_0_367: | |
3823 | set 0x136b33c2, %r28 | |
3824 | stxa %r28, [%g0] 0x72 | |
3825 | .word 0x25400001 ! 945: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3826 | .word 0x87802004 ! 946: WRASI_I wr %r0, 0x0004, %asi | |
3827 | splash_cmpr_0_368: | |
3828 | setx 0x3f30330cfc3c7256, %g2, %g1 | |
3829 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3830 | sub %g1, 100, %g1 | |
3831 | .word 0xb1800001 ! 947: WR_STICK_REG_R wr %r0, %r1, %- | |
3832 | mondo_0_369: | |
3833 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3834 | ||
3835 | stxa %r18, [%r0+0x3c0] %asi | |
3836 | .word 0x9d934011 ! 948: WRPR_WSTATE_R wrpr %r13, %r17, %wstate | |
3837 | .word 0xe837c011 ! 949: STH_R sth %r20, [%r31 + %r17] | |
3838 | splash_cmpr_0_370: | |
3839 | setx 0xb1abc7267aa1500a, %g2, %g1 | |
3840 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3841 | sub %g1, 100, %g1 | |
3842 | .word 0xb1800001 ! 950: WR_STICK_REG_R wr %r0, %r1, %- | |
3843 | otherw | |
3844 | mov 0xb5, %r30 | |
3845 | .word 0x91d0001e ! 951: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3846 | .word 0x83a4cdc9 ! 952: FdMULq fdmulq | |
3847 | splash_lsu_0_371: | |
3848 | setx 0x18b427371b74bf1b, %r1, %r2 | |
3849 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3850 | .word 0x3d400001 ! 953: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3851 | .word 0xc24fc000 ! 954: LDSB_R ldsb [%r31 + %r0], %r1 | |
3852 | .word 0xa6d00000 ! 955: UMULcc_R umulcc %r0, %r0, %r19 | |
3853 | .word 0x87802058 ! 956: WRASI_I wr %r0, 0x0058, %asi | |
3854 | .word 0xe69fc020 ! 957: LDDA_R ldda [%r31, %r0] 0x01, %r19 | |
3855 | .word 0xe71fc000 ! 958: LDDF_R ldd [%r31, %r0], %f19 | |
3856 | debug_0_372: | |
3857 | mov 8, %r18 | |
3858 | .word 0xd2f00852 ! 959: STXA_R stxa %r9, [%r0 + %r18] 0x42 | |
3859 | splash_cmpr_0_373: | |
3860 | setx 0xb281606031c76035, %g2, %g1 | |
3861 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
3862 | sub %g1, 100, %g1 | |
3863 | .word 0xb1800001 ! 960: WR_STICK_REG_R wr %r0, %r1, %- | |
3864 | splash_lsu_0_374: | |
3865 | setx 0x7d07853de277d36f, %r1, %r2 | |
3866 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3867 | .word 0x3d400001 ! 961: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3868 | .word 0xe6880e40 ! 962: LDUBA_R lduba [%r0, %r0] 0x72, %r19 | |
3869 | change_to_randtl_0_375: | |
3870 | ta T_CHANGE_HPRIV ! macro | |
3871 | done_change_to_randtl_0_375: | |
3872 | .word 0x8f902003 ! 963: WRPR_TL_I wrpr %r0, 0x0003, %tl | |
3873 | .word 0xe6800c40 ! 964: LDUWA_R lduwa [%r0, %r0] 0x62, %r19 | |
3874 | .word 0xa1902007 ! 965: WRPR_GL_I wrpr %r0, 0x0007, %- | |
3875 | .word 0xe6800b40 ! 966: LDUWA_R lduwa [%r0, %r0] 0x5a, %r19 | |
3876 | .word 0xe647c000 ! 967: LDSW_R ldsw [%r31 + %r0], %r19 | |
3877 | .word 0x8d90355c ! 968: WRPR_PSTATE_I wrpr %r0, 0x155c, %pstate | |
3878 | .word 0xa1902005 ! 969: WRPR_GL_I wrpr %r0, 0x0005, %- | |
3879 | .word 0x91d02034 ! 970: Tcc_I ta icc_or_xcc, %r0 + 52 | |
3880 | .word 0x81460000 ! 971: RD_STICK_REG stbar | |
3881 | .word 0x83450000 ! 972: RD_SET_SOFTINT rd %set_softint, %r1 | |
3882 | splash_cmpr_0_376: | |
3883 | setx 0x50c466538454fdb2, %g2, %g1 | |
3884 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3885 | sub %g1, 100, %g1 | |
3886 | .word 0xb1800001 ! 973: WR_STICK_REG_R wr %r0, %r1, %- | |
3887 | intveclr_0_377: | |
3888 | set 0x9fa04def, %r28 | |
3889 | stxa %r28, [%g0] 0x72 | |
3890 | .word 0x25400001 ! 974: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3891 | .word 0xa1902003 ! 975: WRPR_GL_I wrpr %r0, 0x0003, %- | |
3892 | nop | |
3893 | mov 0x80, %g3 | |
3894 | stxa %g3, [%g3] 0x57 | |
3895 | .word 0xc25fc000 ! 976: LDX_R ldx [%r31 + %r0], %r1 | |
3896 | .word 0x3c700001 ! 977: BPPOS <illegal instruction> | |
3897 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_378)) -> intp(0,0,3) | |
3898 | intvec_0_378: | |
3899 | .word 0x39400001 ! 978: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3900 | debug_0_379: | |
3901 | setx debug_0_379 + 64, %r11, %r19 | |
3902 | mov 0x38, %r18 | |
3903 | .word 0xe6f00b12 ! 979: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
3904 | .word 0x99464000 ! 980: RD_STICK_CMPR_REG rd %-, %r12 | |
3905 | debug_0_380: | |
3906 | mov 0x38, %r18 | |
3907 | .word 0xfef00b12 ! 981: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
3908 | debug_0_381: | |
3909 | mov 8, %r18 | |
3910 | .word 0xdef00852 ! 982: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
3911 | DS_0_382: | |
3912 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3913 | .word 0xbfe7c000 ! 983: SAVE_R save %r31, %r0, %r31 | |
3914 | splash_htba_0_383: | |
3915 | set 0x80000, %r2 | |
3916 | ld [%r2+%r0], %r1 | |
3917 | ta T_CHANGE_HPRIV | |
3918 | set 0x80000, %r2 | |
3919 | .word 0x8b980002 ! 984: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3920 | debug_0_384: | |
3921 | mov 8, %r18 | |
3922 | .word 0xd8f00852 ! 985: STXA_R stxa %r12, [%r0 + %r18] 0x42 | |
3923 | .word 0x8d90318d ! 986: WRPR_PSTATE_I wrpr %r0, 0x118d, %pstate | |
3924 | mondo_0_385: | |
3925 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3926 | ||
3927 | stxa %r16, [%r0+0x3c8] %asi | |
3928 | .word 0x9d944001 ! 987: WRPR_WSTATE_R wrpr %r17, %r1, %wstate | |
3929 | .word 0xd8c7e010 ! 988: LDSWA_I ldswa [%r31, + 0x0010] %asi, %r12 | |
3930 | .word 0xd8cfe000 ! 989: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r12 | |
3931 | .word 0x34800001 ! 990: BG bg,a <label_0x1> | |
3932 | .word 0xa1902001 ! 991: WRPR_GL_I wrpr %r0, 0x0001, %- | |
3933 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_386)) -> intp(0,0,16) | |
3934 | intvec_0_386: | |
3935 | .word 0x39400001 ! 992: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3936 | set 0x7fd4bded, %r28 | |
3937 | stxa %r28, [%g0] 0x73 | |
3938 | intvec_0_387: | |
3939 | .word 0x39400001 ! 993: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3940 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_388)) -> intp(0,0,7) | |
3941 | intvec_0_388: | |
3942 | .word 0x39400001 ! 994: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3943 | .word 0xd8cfe020 ! 995: LDSBA_I ldsba [%r31, + 0x0020] %asi, %r12 | |
3944 | .word 0xad826001 ! 996: WR_SOFTINT_REG_I wr %r9, 0x0001, %softint | |
3945 | .word 0xd8d004a0 ! 997: LDSHA_R ldsha [%r0, %r0] 0x25, %r12 | |
3946 | .word 0x81510000 ! 998: RDPR_TICK <illegal instruction> | |
3947 | .word 0x8d903e7e ! 999: WRPR_PSTATE_I wrpr %r0, 0x1e7e, %pstate | |
3948 | splash_htba_0_389: | |
3949 | set 0x80000, %r2 | |
3950 | ld [%r2+%r0], %r1 | |
3951 | ta T_CHANGE_HPRIV | |
3952 | set 0x80000, %r2 | |
3953 | .word 0x8b980002 ! 1000: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3954 | .word 0xa190200c ! 1001: WRPR_GL_I wrpr %r0, 0x000c, %- | |
3955 | .word 0x8790206b ! 1002: WRPR_TT_I wrpr %r0, 0x006b, %tt | |
3956 | invalw | |
3957 | mov 0x34, %r30 | |
3958 | .word 0x91d0001e ! 1003: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3959 | .word 0x8d903af2 ! 1004: WRPR_PSTATE_I wrpr %r0, 0x1af2, %pstate | |
3960 | ta T_CHANGE_PRIV ! macro | |
3961 | .word 0x879023a1 ! 1006: WRPR_TT_I wrpr %r0, 0x03a1, %tt | |
3962 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_390)) -> intp(0,1,3) | |
3963 | xir_0_390: | |
3964 | .word 0xa9836001 ! 1007: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
3965 | .word 0xd80fe001 ! 1008: LDUB_I ldub [%r31 + 0x0001], %r12 | |
3966 | .word 0x83d02032 ! 1009: Tcc_I te icc_or_xcc, %r0 + 50 | |
3967 | .word 0x8d903193 ! 1010: WRPR_PSTATE_I wrpr %r0, 0x1193, %pstate | |
3968 | otherw | |
3969 | mov 0x31, %r30 | |
3970 | .word 0x91d0001e ! 1011: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3971 | .word 0xd91fe001 ! 1012: LDDF_I ldd [%r31, 0x0001], %f12 | |
3972 | .word 0xd89fe001 ! 1013: LDDA_I ldda [%r31, + 0x0001] %asi, %r12 | |
3973 | DS_0_391: | |
3974 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3975 | .word 0xd930a001 ! 1: STQF_I - %f12, [0x0001, %r2] | |
3976 | normalw | |
3977 | .word 0x9b458000 ! 1014: RD_SOFTINT_REG rd %softint, %r13 | |
3978 | .word 0xa1902002 ! 1015: WRPR_GL_I wrpr %r0, 0x0002, %- | |
3979 | .word 0xda8008a0 ! 1016: LDUWA_R lduwa [%r0, %r0] 0x45, %r13 | |
3980 | nop | |
3981 | mov 0x80, %g3 | |
3982 | stxa %g3, [%g3] 0x5f | |
3983 | .word 0xda5fc000 ! 1017: LDX_R ldx [%r31 + %r0], %r13 | |
3984 | mondo_0_392: | |
3985 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3986 | ||
3987 | stxa %r19, [%r0+0x3c0] %asi | |
3988 | .word 0x9d944011 ! 1018: WRPR_WSTATE_R wrpr %r17, %r17, %wstate | |
3989 | .word 0xda1fe001 ! 1019: LDD_I ldd [%r31 + 0x0001], %r13 | |
3990 | .word 0xad846001 ! 1020: WR_SOFTINT_REG_I wr %r17, 0x0001, %softint | |
3991 | .word 0x8284e001 ! 1021: ADDcc_I addcc %r19, 0x0001, %r1 | |
3992 | .word 0x87802004 ! 1022: WRASI_I wr %r0, 0x0004, %asi | |
3993 | splash_lsu_0_393: | |
3994 | setx 0xa246410056388353, %r1, %r2 | |
3995 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3996 | .word 0x3d400001 ! 1023: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3997 | splash_lsu_0_394: | |
3998 | setx 0x8ded62dbab8e57f9, %r1, %r2 | |
3999 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4000 | .word 0x3d400001 ! 1024: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4001 | .word 0x2c700001 ! 1025: BPNEG <illegal instruction> | |
4002 | debug_0_395: | |
4003 | mov 0x38, %r18 | |
4004 | .word 0xfef00b12 ! 1026: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4005 | .word 0xa1902000 ! 1027: WRPR_GL_I wrpr %r0, 0x0000, %- | |
4006 | change_to_randtl_0_396: | |
4007 | ta T_CHANGE_PRIV ! macro | |
4008 | done_change_to_randtl_0_396: | |
4009 | .word 0x8f902001 ! 1028: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
4010 | intveclr_0_397: | |
4011 | set 0x85f3d381, %r28 | |
4012 | stxa %r28, [%g0] 0x72 | |
4013 | .word 0x25400001 ! 1029: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4014 | .word 0xc29fe001 ! 1030: LDDA_I ldda [%r31, + 0x0001] %asi, %r1 | |
4015 | .word 0xc2d7e010 ! 1031: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r1 | |
4016 | .word 0x91d02035 ! 1032: Tcc_I ta icc_or_xcc, %r0 + 53 | |
4017 | .word 0x9b480000 ! 1033: RDHPR_HPSTATE rdhpr %hpstate, %r13 | |
4018 | .word 0xa2f80001 ! 1034: SDIVcc_R sdivcc %r0, %r1, %r17 | |
4019 | .word 0x9f802001 ! 1035: SIR sir 0x0001 | |
4020 | debug_0_398: | |
4021 | mov 0x38, %r18 | |
4022 | .word 0xfef00b12 ! 1036: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4023 | .word 0xa3a0c9c3 ! 1037: FDIVd fdivd %f34, %f34, %f48 | |
4024 | .word 0x879023f2 ! 1038: WRPR_TT_I wrpr %r0, 0x03f2, %tt | |
4025 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_399)) -> intp(0,1,3) | |
4026 | xir_0_399: | |
4027 | .word 0xa981e001 ! 1039: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
4028 | tagged_0_400: | |
4029 | tsubcctv %r9, 0x118a, %r4 | |
4030 | .word 0xe207e001 ! 1040: LDUW_I lduw [%r31 + 0x0001], %r17 | |
4031 | .word 0x87802088 ! 1041: WRASI_I wr %r0, 0x0088, %asi | |
4032 | .word 0xe28008a0 ! 1042: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
4033 | splash_lsu_0_401: | |
4034 | setx 0x1a0ad340430297c9, %r1, %r2 | |
4035 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4036 | .word 0x3d400001 ! 1043: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4037 | .word 0xa1540000 ! 1044: RDPR_GL rdpr %-, %r16 | |
4038 | .word 0xa3450000 ! 1045: RD_SET_SOFTINT rd %set_softint, %r17 | |
4039 | debug_0_402: | |
4040 | mov 8, %r18 | |
4041 | .word 0xdef00852 ! 1046: STXA_R stxa %r15, [%r0 + %r18] 0x42 | |
4042 | .word 0xe2d004a0 ! 1047: LDSHA_R ldsha [%r0, %r0] 0x25, %r17 | |
4043 | splash_lsu_0_403: | |
4044 | setx 0x1b9d0daadc101c5b, %r1, %r2 | |
4045 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4046 | .word 0x3d400001 ! 1048: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4047 | .word 0xa190200f ! 1049: WRPR_GL_I wrpr %r0, 0x000f, %- | |
4048 | .word 0x87802010 ! 1050: WRASI_I wr %r0, 0x0010, %asi | |
4049 | debug_0_404: | |
4050 | mov 0x38, %r18 | |
4051 | .word 0xfef00b12 ! 1051: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4052 | .word 0x87802063 ! 1052: WRASI_I wr %r0, 0x0063, %asi | |
4053 | mondo_0_405: | |
4054 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4055 | ||
4056 | stxa %r19, [%r0+0x3e8] %asi | |
4057 | .word 0x9d92800d ! 1053: WRPR_WSTATE_R wrpr %r10, %r13, %wstate | |
4058 | .word 0x87802055 ! 1054: WRASI_I wr %r0, 0x0055, %asi | |
4059 | invalw | |
4060 | mov 0x32, %r30 | |
4061 | .word 0x91d0001e ! 1055: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4062 | debug_0_406: | |
4063 | setx debug_0_406 + 64, %r11, %r19 | |
4064 | mov 0x38, %r18 | |
4065 | .word 0xe6f00b12 ! 1056: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4066 | splash_lsu_0_407: | |
4067 | setx 0x7914f4a9afab3997, %r1, %r2 | |
4068 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4069 | .word 0x3d400001 ! 1057: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4070 | .word 0x8790235e ! 1058: WRPR_TT_I wrpr %r0, 0x035e, %tt | |
4071 | .word 0x32800001 ! 1059: BNE bne,a <label_0x1> | |
4072 | splash_lsu_0_408: | |
4073 | setx 0x607af817bba49f45, %r1, %r2 | |
4074 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4075 | .word 0x3d400001 ! 1060: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4076 | set 0x3a669b18, %r28 | |
4077 | stxa %r28, [%g0] 0x73 | |
4078 | intvec_0_409: | |
4079 | .word 0x39400001 ! 1061: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4080 | .word 0xe2800b20 ! 1062: LDUWA_R lduwa [%r0, %r0] 0x59, %r17 | |
4081 | ta T_CHANGE_PRIV ! macro | |
4082 | debug_0_410: | |
4083 | mov 0x38, %r18 | |
4084 | .word 0xfef00b12 ! 1064: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4085 | mondo_0_411: | |
4086 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4087 | ||
4088 | stxa %r16, [%r0+0x3d8] %asi | |
4089 | .word 0x9d950014 ! 1065: WRPR_WSTATE_R wrpr %r20, %r20, %wstate | |
4090 | .word 0xe2800be0 ! 1066: LDUWA_R lduwa [%r0, %r0] 0x5f, %r17 | |
4091 | splash_cmpr_0_412: | |
4092 | setx 0x0955592d0f0ed8a1, %g2, %g1 | |
4093 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4094 | sub %g1, 100, %g1 | |
4095 | .word 0xb1800001 ! 1067: WR_STICK_REG_R wr %r0, %r1, %- | |
4096 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_413)) -> intp(0,1,3) | |
4097 | xir_0_413: | |
4098 | .word 0xa9832001 ! 1068: WR_SET_SOFTINT_I wr %r12, 0x0001, %set_softint | |
4099 | nop | |
4100 | mov 0x80, %g3 | |
4101 | stxa %g3, [%g3] 0x5f | |
4102 | .word 0xe25fc000 ! 1069: LDX_R ldx [%r31 + %r0], %r17 | |
4103 | splash_cmpr_0_414: | |
4104 | setx 0x1a06e437db9e9400, %g2, %g1 | |
4105 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4106 | sub %g1, 100, %g1 | |
4107 | .word 0xb1800001 ! 1070: WR_STICK_REG_R wr %r0, %r1, %- | |
4108 | .word 0x93d02034 ! 1071: Tcc_I tne icc_or_xcc, %r0 + 52 | |
4109 | debug_0_415: | |
4110 | setx debug_0_415 + 64, %r11, %r19 | |
4111 | mov 0x38, %r18 | |
4112 | .word 0xe6f00b12 ! 1072: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4113 | .word 0xe237c014 ! 1073: STH_R sth %r17, [%r31 + %r20] | |
4114 | nop | |
4115 | mov 0x80, %g3 | |
4116 | stxa %g3, [%g3] 0x57 | |
4117 | .word 0xe25fc000 ! 1074: LDX_R ldx [%r31 + %r0], %r17 | |
4118 | .word 0x91902001 ! 1075: WRPR_PIL_I wrpr %r0, 0x0001, %pil | |
4119 | .word 0x87802014 ! 1076: WRASI_I wr %r0, 0x0014, %asi | |
4120 | .word 0x91922001 ! 1077: WRPR_PIL_I wrpr %r8, 0x0001, %pil | |
4121 | .word 0x83500000 ! 1078: RDPR_TPC rdpr %tpc, %r1 | |
4122 | splash_cmpr_0_416: | |
4123 | setx 0xf6baa1ba56b23e2d, %g2, %g1 | |
4124 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4125 | sub %g1, 100, %g1 | |
4126 | .word 0xb1800001 ! 1079: WR_STICK_REG_R wr %r0, %r1, %- | |
4127 | tagged_0_417: | |
4128 | taddcctv %r16, 0x1434, %r17 | |
4129 | .word 0xc207e001 ! 1080: LDUW_I lduw [%r31 + 0x0001], %r1 | |
4130 | .word 0xc2d004a0 ! 1081: LDSHA_R ldsha [%r0, %r0] 0x25, %r1 | |
4131 | .word 0x91520000 ! 1082: RDPR_PIL <illegal instruction> | |
4132 | .word 0xd08008a0 ! 1083: LDUWA_R lduwa [%r0, %r0] 0x45, %r8 | |
4133 | mondo_0_418: | |
4134 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4135 | ||
4136 | stxa %r19, [%r0+0x3c8] %asi | |
4137 | .word 0x9d934005 ! 1084: WRPR_WSTATE_R wrpr %r13, %r5, %wstate | |
4138 | .word 0xa5464000 ! 1085: RD_STICK_CMPR_REG rd %-, %r18 | |
4139 | splash_htba_0_419: | |
4140 | set 0x80000, %r2 | |
4141 | ld [%r2+%r0], %r1 | |
4142 | ta T_CHANGE_HPRIV | |
4143 | set 0x80000, %r2 | |
4144 | .word 0x8b980002 ! 1086: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
4145 | .word 0x8d802000 ! 1087: WRFPRS_I wr %r0, 0x0000, %fprs | |
4146 | invalw | |
4147 | mov 0x33, %r30 | |
4148 | .word 0x91d0001e ! 1088: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4149 | splash_lsu_0_420: | |
4150 | setx 0x26ff4b475c3b2307, %r1, %r2 | |
4151 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4152 | .word 0x3d400001 ! 1089: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4153 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_421)) -> intp(0,1,3) | |
4154 | xir_0_421: | |
4155 | .word 0xa9852001 ! 1090: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
4156 | .word 0xa1902004 ! 1091: WRPR_GL_I wrpr %r0, 0x0004, %- | |
4157 | .word 0x93902003 ! 1092: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
4158 | .word 0xe4dfe020 ! 1093: LDXA_I ldxa [%r31, + 0x0020] %asi, %r18 | |
4159 | .word 0xe43fc005 ! 1094: STD_R std %r18, [%r31 + %r5] | |
4160 | change_to_randtl_0_422: | |
4161 | ta T_CHANGE_PRIV ! macro | |
4162 | done_change_to_randtl_0_422: | |
4163 | .word 0x8f902000 ! 1095: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
4164 | nop | |
4165 | mov 0x80, %g3 | |
4166 | stxa %g3, [%g3] 0x57 | |
4167 | .word 0xe45fc000 ! 1096: LDX_R ldx [%r31 + %r0], %r18 | |
4168 | .word 0x83d020b5 ! 1097: Tcc_I te icc_or_xcc, %r0 + 181 | |
4169 | DS_0_423: | |
4170 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4171 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4172 | .word 0x95a00544 ! 1: FSQRTd fsqrt | |
4173 | .word 0x83a30830 ! 1098: FADDs fadds %f12, %f16, %f1 | |
4174 | .word 0x8790225c ! 1099: WRPR_TT_I wrpr %r0, 0x025c, %tt | |
4175 | splash_lsu_0_424: | |
4176 | setx 0xc0fb15216b1bfaf3, %r1, %r2 | |
4177 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4178 | .word 0x3d400001 ! 1100: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4179 | .word 0xc237e001 ! 1101: STH_I sth %r1, [%r31 + 0x0001] | |
4180 | .word 0xc28008a0 ! 1102: LDUWA_R lduwa [%r0, %r0] 0x45, %r1 | |
4181 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_425)) -> intp(0,1,3) | |
4182 | xir_0_425: | |
4183 | .word 0xa982a001 ! 1103: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
4184 | .word 0xa5450000 ! 1104: RD_SET_SOFTINT rd %set_softint, %r18 | |
4185 | .word 0xa1454000 ! 1105: RD_CLEAR_SOFTINT rd %clear_softint, %r16 | |
4186 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_426)) -> intp(0,0,3) | |
4187 | intvec_0_426: | |
4188 | .word 0x39400001 ! 1106: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4189 | .word 0xe01fe001 ! 1107: LDD_I ldd [%r31 + 0x0001], %r16 | |
4190 | set 0xd307b060, %r28 | |
4191 | stxa %r28, [%g0] 0x73 | |
4192 | intvec_0_427: | |
4193 | .word 0x39400001 ! 1108: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4194 | .word 0x8d802004 ! 1109: WRFPRS_I wr %r0, 0x0004, %fprs | |
4195 | .word 0x8d802004 ! 1110: WRFPRS_I wr %r0, 0x0004, %fprs | |
4196 | debug_0_428: | |
4197 | mov 0x38, %r18 | |
4198 | .word 0xfef00b12 ! 1111: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4199 | .word 0xa1902007 ! 1112: WRPR_GL_I wrpr %r0, 0x0007, %- | |
4200 | .word 0x8d802000 ! 1113: WRFPRS_I wr %r0, 0x0000, %fprs | |
4201 | .word 0xe0d804a0 ! 1114: LDXA_R ldxa [%r0, %r0] 0x25, %r16 | |
4202 | .word 0x8d903cf9 ! 1115: WRPR_PSTATE_I wrpr %r0, 0x1cf9, %pstate | |
4203 | debug_0_429: | |
4204 | mov 8, %r18 | |
4205 | .word 0xd0f00852 ! 1116: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
4206 | .word 0xe01fe001 ! 1117: LDD_I ldd [%r31 + 0x0001], %r16 | |
4207 | .word 0xa1a00565 ! 1118: FSQRTq fsqrt | |
4208 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_430)) -> intp(0,0,20) | |
4209 | intvec_0_430: | |
4210 | .word 0x39400001 ! 1119: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4211 | debug_0_431: | |
4212 | mov 0x38, %r18 | |
4213 | .word 0xfef00b12 ! 1120: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4214 | .word 0xe08fe010 ! 1121: LDUBA_I lduba [%r31, + 0x0010] %asi, %r16 | |
4215 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_432)) -> intp(0,0,23) | |
4216 | intvec_0_432: | |
4217 | .word 0x39400001 ! 1122: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4218 | .word 0xe037c005 ! 1123: STH_R sth %r16, [%r31 + %r5] | |
4219 | .word 0x87802016 ! 1124: WRASI_I wr %r0, 0x0016, %asi | |
4220 | .word 0x91d02033 ! 1125: Tcc_I ta icc_or_xcc, %r0 + 51 | |
4221 | DS_0_433: | |
4222 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4223 | .word 0xe734000a ! 1: STQF_R - %f19, [%r10, %r16] | |
4224 | normalw | |
4225 | .word 0xa3458000 ! 1126: RD_SOFTINT_REG rd %softint, %r17 | |
4226 | .word 0x91d02034 ! 1127: Tcc_I ta icc_or_xcc, %r0 + 52 | |
4227 | .word 0x93902003 ! 1128: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
4228 | .word 0xe21fe001 ! 1129: LDD_I ldd [%r31 + 0x0001], %r17 | |
4229 | DS_0_434: | |
4230 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4231 | .word 0xbfefc000 ! 1130: RESTORE_R restore %r31, %r0, %r31 | |
4232 | .word 0xe2cfe000 ! 1131: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r17 | |
4233 | .word 0x87802089 ! 1132: WRASI_I wr %r0, 0x0089, %asi | |
4234 | set 0x3c02f6f4, %r28 | |
4235 | stxa %r28, [%g0] 0x73 | |
4236 | intvec_0_435: | |
4237 | .word 0x39400001 ! 1133: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4238 | splash_cmpr_0_436: | |
4239 | setx 0x4268a3175f8c7bf4, %g2, %g1 | |
4240 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4241 | sub %g1, 100, %g1 | |
4242 | .word 0xb1800001 ! 1134: WR_STICK_REG_R wr %r0, %r1, %- | |
4243 | .word 0x87802020 ! 1135: WRASI_I wr %r0, 0x0020, %asi | |
4244 | .word 0x91d02034 ! 1136: Tcc_I ta icc_or_xcc, %r0 + 52 | |
4245 | .word 0xe247c000 ! 1137: LDSW_R ldsw [%r31 + %r0], %r17 | |
4246 | .word 0xe31fc000 ! 1138: LDDF_R ldd [%r31, %r0], %f17 | |
4247 | .word 0x9194e001 ! 1139: WRPR_PIL_I wrpr %r19, 0x0001, %pil | |
4248 | .word 0xe2c7e020 ! 1140: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r17 | |
4249 | splash_lsu_0_437: | |
4250 | setx 0x0a9013c3ad10e9c1, %r1, %r2 | |
4251 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4252 | .word 0x3d400001 ! 1141: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4253 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_438)) -> intp(0,1,3) | |
4254 | xir_0_438: | |
4255 | .word 0xa982a001 ! 1142: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
4256 | .word 0x87802004 ! 1143: WRASI_I wr %r0, 0x0004, %asi | |
4257 | .word 0xe28008a0 ! 1144: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
4258 | splash_lsu_0_439: | |
4259 | setx 0x620d09612b5751fd, %r1, %r2 | |
4260 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4261 | .word 0x3d400001 ! 1145: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4262 | .word 0x93902002 ! 1146: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
4263 | .word 0x81460000 ! 1147: RD_STICK_REG stbar | |
4264 | .word 0xe2dfe010 ! 1148: LDXA_I ldxa [%r31, + 0x0010] %asi, %r17 | |
4265 | debug_0_440: | |
4266 | mov 0x38, %r18 | |
4267 | .word 0xfef00b12 ! 1149: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4268 | .word 0x83d02035 ! 1150: Tcc_I te icc_or_xcc, %r0 + 53 | |
4269 | mondo_0_441: | |
4270 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4271 | ||
4272 | stxa %r1, [%r0+0x3e0] %asi | |
4273 | .word 0x9d90400a ! 1151: WRPR_WSTATE_R wrpr %r1, %r10, %wstate | |
4274 | .word 0x81982194 ! 1152: WRHPR_HPSTATE_I wrhpr %r0, 0x0194, %hpstate | |
4275 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_442)) -> intp(0,0,18) | |
4276 | intvec_0_442: | |
4277 | .word 0x39400001 ! 1153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4278 | intveclr_0_443: | |
4279 | set 0x4c459d14, %r28 | |
4280 | stxa %r28, [%g0] 0x72 | |
4281 | .word 0x25400001 ! 1154: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4282 | invalw | |
4283 | mov 0xb1, %r30 | |
4284 | .word 0x91d0001e ! 1155: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4285 | intveclr_0_444: | |
4286 | set 0x31612295, %r28 | |
4287 | stxa %r28, [%g0] 0x72 | |
4288 | .word 0x25400001 ! 1156: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4289 | .word 0x9f802001 ! 1157: SIR sir 0x0001 | |
4290 | .word 0x8790207a ! 1158: WRPR_TT_I wrpr %r0, 0x007a, %tt | |
4291 | .word 0x8d802000 ! 1159: WRFPRS_I wr %r0, 0x0000, %fprs | |
4292 | mondo_0_445: | |
4293 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4294 | ||
4295 | stxa %r8, [%r0+0x3c0] %asi | |
4296 | .word 0x9d900011 ! 1160: WRPR_WSTATE_R wrpr %r0, %r17, %wstate | |
4297 | .word 0x87802055 ! 1161: WRASI_I wr %r0, 0x0055, %asi | |
4298 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_446)) -> intp(0,0,3) | |
4299 | intvec_0_446: | |
4300 | .word 0x39400001 ! 1162: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4301 | .word 0xe25fe001 ! 1163: LDX_I ldx [%r31 + 0x0001], %r17 | |
4302 | set 0x69ae69d0, %r28 | |
4303 | stxa %r28, [%g0] 0x73 | |
4304 | intvec_0_447: | |
4305 | .word 0x39400001 ! 1164: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4306 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_448)) -> intp(0,1,3) | |
4307 | xir_0_448: | |
4308 | .word 0xa980e001 ! 1165: WR_SET_SOFTINT_I wr %r3, 0x0001, %set_softint | |
4309 | .word 0xe397e001 ! 1166: LDQFA_I - [%r31, 0x0001], %f17 | |
4310 | intveclr_0_449: | |
4311 | set 0xf97344d4, %r28 | |
4312 | stxa %r28, [%g0] 0x72 | |
4313 | .word 0x25400001 ! 1167: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4314 | .word 0xe28fe020 ! 1168: LDUBA_I lduba [%r31, + 0x0020] %asi, %r17 | |
4315 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_450)) -> intp(0,0,2) | |
4316 | intvec_0_450: | |
4317 | .word 0x39400001 ! 1169: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4318 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_451)) -> intp(0,1,3) | |
4319 | xir_0_451: | |
4320 | .word 0xa980a001 ! 1170: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
4321 | .word 0x91936001 ! 1171: WRPR_PIL_I wrpr %r13, 0x0001, %pil | |
4322 | .word 0xe2dfe020 ! 1172: LDXA_I ldxa [%r31, + 0x0020] %asi, %r17 | |
4323 | DS_0_452: | |
4324 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4325 | .word 0xe732c003 ! 1: STQF_R - %f19, [%r3, %r11] | |
4326 | normalw | |
4327 | .word 0x83458000 ! 1173: RD_SOFTINT_REG rd %softint, %r1 | |
4328 | .word 0xc22fe001 ! 1174: STB_I stb %r1, [%r31 + 0x0001] | |
4329 | intveclr_0_453: | |
4330 | set 0xa630db4f, %r28 | |
4331 | stxa %r28, [%g0] 0x72 | |
4332 | .word 0x25400001 ! 1175: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4333 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_454)) -> intp(0,0,3) | |
4334 | intvec_0_454: | |
4335 | .word 0x39400001 ! 1176: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4336 | otherw | |
4337 | mov 0xb4, %r30 | |
4338 | .word 0x91d0001e ! 1177: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4339 | nop | |
4340 | mov 0x80, %g3 | |
4341 | stxa %g3, [%g3] 0x57 | |
4342 | .word 0xc25fc000 ! 1178: LDX_R ldx [%r31 + %r0], %r1 | |
4343 | .word 0xc20fe001 ! 1179: LDUB_I ldub [%r31 + 0x0001], %r1 | |
4344 | .word 0xc21fc000 ! 1180: LDD_R ldd [%r31 + %r0], %r1 | |
4345 | .word 0xa1902000 ! 1181: WRPR_GL_I wrpr %r0, 0x0000, %- | |
4346 | .word 0xc327e001 ! 1182: STF_I st %f1, [0x0001, %r31] | |
4347 | ta T_CHANGE_HPRIV ! macro | |
4348 | .word 0xab800012 ! 1184: WR_CLEAR_SOFTINT_R wr %r0, %r18, %clear_softint | |
4349 | .word 0x8d9023f7 ! 1185: WRPR_PSTATE_I wrpr %r0, 0x03f7, %pstate | |
4350 | .word 0xc2d7e010 ! 1186: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r1 | |
4351 | .word 0x87802020 ! 1187: WRASI_I wr %r0, 0x0020, %asi | |
4352 | tagged_0_455: | |
4353 | taddcctv %r21, 0x1362, %r11 | |
4354 | .word 0xc207e001 ! 1188: LDUW_I lduw [%r31 + 0x0001], %r1 | |
4355 | .word 0xc327e001 ! 1189: STF_I st %f1, [0x0001, %r31] | |
4356 | splash_lsu_0_456: | |
4357 | setx 0x9d3afcc5870ba551, %r1, %r2 | |
4358 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4359 | .word 0x3d400001 ! 1190: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4360 | .word 0x34700001 ! 1191: BPG <illegal instruction> | |
4361 | .word 0x8d802000 ! 1192: WRFPRS_I wr %r0, 0x0000, %fprs | |
4362 | .word 0xc2dfe030 ! 1193: LDXA_I ldxa [%r31, + 0x0030] %asi, %r1 | |
4363 | splash_lsu_0_457: | |
4364 | setx 0x0e08fbdfa1842833, %r1, %r2 | |
4365 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4366 | .word 0x3d400001 ! 1194: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4367 | .word 0xa1540000 ! 1195: RDPR_GL rdpr %-, %r16 | |
4368 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_458)) -> intp(0,0,13) | |
4369 | intvec_0_458: | |
4370 | .word 0x39400001 ! 1196: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4371 | tagged_0_459: | |
4372 | taddcctv %r13, 0x1f9e, %r14 | |
4373 | .word 0xe007e001 ! 1197: LDUW_I lduw [%r31 + 0x0001], %r16 | |
4374 | nop | |
4375 | mov 0x80, %g3 | |
4376 | stxa %g3, [%g3] 0x57 | |
4377 | .word 0xe05fc000 ! 1198: LDX_R ldx [%r31 + %r0], %r16 | |
4378 | .word 0x34700001 ! 1199: BPG <illegal instruction> | |
4379 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_460)) -> intp(0,0,7) | |
4380 | intvec_0_460: | |
4381 | .word 0x39400001 ! 1200: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4382 | ta T_CHANGE_PRIV ! macro | |
4383 | .word 0x9b53c000 ! 1202: RDPR_FQ <illegal instruction> | |
4384 | .word 0xad81e001 ! 1203: WR_SOFTINT_REG_I wr %r7, 0x0001, %softint | |
4385 | debug_0_461: | |
4386 | mov 0x38, %r18 | |
4387 | .word 0xfef00b12 ! 1204: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4388 | mondo_0_462: | |
4389 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4390 | ||
4391 | stxa %r19, [%r0+0x3c0] %asi | |
4392 | .word 0x9d940001 ! 1205: WRPR_WSTATE_R wrpr %r16, %r1, %wstate | |
4393 | .word 0x87802004 ! 1206: WRASI_I wr %r0, 0x0004, %asi | |
4394 | intveclr_0_463: | |
4395 | set 0x1aa47591, %r28 | |
4396 | stxa %r28, [%g0] 0x72 | |
4397 | .word 0x25400001 ! 1207: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4398 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_464)) -> intp(0,0,21) | |
4399 | intvec_0_464: | |
4400 | .word 0x39400001 ! 1208: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4401 | .word 0x8d802000 ! 1209: WRFPRS_I wr %r0, 0x0000, %fprs | |
4402 | .word 0xdb27e001 ! 1210: STF_I st %f13, [0x0001, %r31] | |
4403 | DS_0_465: | |
4404 | nop | |
4405 | not %g0, %g2 | |
4406 | jmp %g2 | |
4407 | .word 0x9d902002 ! 1211: WRPR_WSTATE_I wrpr %r0, 0x0002, %wstate | |
4408 | .word 0xda4fc000 ! 1212: LDSB_R ldsb [%r31 + %r0], %r13 | |
4409 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_466)) -> intp(0,0,7) | |
4410 | intvec_0_466: | |
4411 | .word 0x39400001 ! 1213: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4412 | DS_0_467: | |
4413 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
4414 | pdist %f16, %f12, %f16 | |
4415 | .word 0x95b18301 ! 1214: ALIGNADDRESS alignaddr %r6, %r1, %r10 | |
4416 | debug_0_468: | |
4417 | mov 8, %r18 | |
4418 | .word 0xd0f00852 ! 1215: STXA_R stxa %r8, [%r0 + %r18] 0x42 | |
4419 | .word 0x91d020b3 ! 1216: Tcc_I ta icc_or_xcc, %r0 + 179 | |
4420 | .word 0x87802080 ! 1217: WRASI_I wr %r0, 0x0080, %asi | |
4421 | debug_0_469: | |
4422 | setx debug_0_469 + 64, %r11, %r19 | |
4423 | mov 0x38, %r18 | |
4424 | .word 0xe6f00b12 ! 1218: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4425 | .word 0x99902004 ! 1219: WRPR_CLEANWIN_I wrpr %r0, 0x0004, %cleanwin | |
4426 | nop | |
4427 | mov 0x80, %g3 | |
4428 | stxa %g3, [%g3] 0x57 | |
4429 | .word 0xd45fc000 ! 1220: LDX_R ldx [%r31 + %r0], %r10 | |
4430 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_470)) -> intp(0,0,22) | |
4431 | intvec_0_470: | |
4432 | .word 0x39400001 ! 1221: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4433 | .word 0xd43fe001 ! 1222: STD_I std %r10, [%r31 + 0x0001] | |
4434 | debug_0_471: | |
4435 | mov 8, %r18 | |
4436 | .word 0xe2f00852 ! 1223: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
4437 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_472)) -> intp(0,0,14) | |
4438 | intvec_0_472: | |
4439 | .word 0x39400001 ! 1224: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4440 | intveclr_0_473: | |
4441 | set 0x9a069c9, %r28 | |
4442 | stxa %r28, [%g0] 0x72 | |
4443 | .word 0x25400001 ! 1225: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4444 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_474)) -> intp(0,1,3) | |
4445 | xir_0_474: | |
4446 | .word 0xa984e001 ! 1226: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
4447 | splash_htba_0_475: | |
4448 | set 0x80000, %r2 | |
4449 | ld [%r2+%r0], %r1 | |
4450 | ta T_CHANGE_HPRIV | |
4451 | set 0x80000, %r2 | |
4452 | .word 0x8b980002 ! 1227: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
4453 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_476)) -> intp(0,0,3) | |
4454 | intvec_0_476: | |
4455 | .word 0x39400001 ! 1228: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4456 | .word 0x896cc013 ! 1229: SDIVX_R sdivx %r19, %r19, %r4 | |
4457 | .word 0xa1902000 ! 1230: WRPR_GL_I wrpr %r0, 0x0000, %- | |
4458 | intveclr_0_477: | |
4459 | set 0x174ea544, %r28 | |
4460 | stxa %r28, [%g0] 0x72 | |
4461 | .word 0x25400001 ! 1231: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4462 | .word 0x9f802001 ! 1232: SIR sir 0x0001 | |
4463 | .word 0x93902001 ! 1233: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
4464 | .word 0x83d02035 ! 1234: Tcc_I te icc_or_xcc, %r0 + 53 | |
4465 | debug_0_478: | |
4466 | setx debug_0_478 + 64, %r11, %r19 | |
4467 | mov 0x38, %r18 | |
4468 | .word 0xe6f00b12 ! 1235: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4469 | .word 0x89480000 ! 1236: RDHPR_HPSTATE rdhpr %hpstate, %r4 | |
4470 | DS_0_479: | |
4471 | nop | |
4472 | not %g0, %g2 | |
4473 | jmp %g2 | |
4474 | .word 0x9d902001 ! 1237: WRPR_WSTATE_I wrpr %r0, 0x0001, %wstate | |
4475 | ta T_CHANGE_HPRIV ! macro | |
4476 | splash_cmpr_0_480: | |
4477 | setx 0xa64cabe552614528, %g2, %g1 | |
4478 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4479 | sub %g1, 100, %g1 | |
4480 | .word 0xb1800001 ! 1239: WR_STICK_REG_R wr %r0, %r1, %- | |
4481 | debug_0_481: | |
4482 | setx debug_0_481 + 64, %r11, %r19 | |
4483 | mov 0x38, %r18 | |
4484 | .word 0xe6f00b12 ! 1240: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4485 | invalw | |
4486 | mov 0x31, %r30 | |
4487 | .word 0x91d0001e ! 1241: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4488 | debug_0_482: | |
4489 | mov 0x38, %r18 | |
4490 | .word 0xfef00b12 ! 1242: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4491 | set 0x8cb906a1, %r28 | |
4492 | stxa %r28, [%g0] 0x73 | |
4493 | intvec_0_483: | |
4494 | .word 0x39400001 ! 1243: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4495 | .word 0x93902001 ! 1244: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
4496 | .word 0x879021c4 ! 1245: WRPR_TT_I wrpr %r0, 0x01c4, %tt | |
4497 | intveclr_0_484: | |
4498 | set 0x155161c1, %r28 | |
4499 | stxa %r28, [%g0] 0x72 | |
4500 | .word 0x25400001 ! 1246: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4501 | set 0x80f11660, %r28 | |
4502 | stxa %r28, [%g0] 0x73 | |
4503 | intvec_0_485: | |
4504 | .word 0x39400001 ! 1247: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4505 | .word 0x8d903190 ! 1248: WRPR_PSTATE_I wrpr %r0, 0x1190, %pstate | |
4506 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_486)) -> intp(0,1,3) | |
4507 | xir_0_486: | |
4508 | .word 0xa9806001 ! 1249: WR_SET_SOFTINT_I wr %r1, 0x0001, %set_softint | |
4509 | splash_lsu_0_487: | |
4510 | setx 0xf0a6b680b0ef1e9d, %r1, %r2 | |
4511 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4512 | .word 0x3d400001 ! 1250: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4513 | tagged_0_488: | |
4514 | tsubcctv %r5, 0x1b8f, %r10 | |
4515 | .word 0xc807e001 ! 1251: LDUW_I lduw [%r31 + 0x0001], %r4 | |
4516 | otherw | |
4517 | mov 0x34, %r30 | |
4518 | .word 0x93d0001e ! 1252: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
4519 | .word 0x93d02035 ! 1253: Tcc_I tne icc_or_xcc, %r0 + 53 | |
4520 | .word 0x97a01a71 ! 1254: FqTOi fqtoi | |
4521 | .word 0x8d902d5e ! 1255: WRPR_PSTATE_I wrpr %r0, 0x0d5e, %pstate | |
4522 | .word 0x87902085 ! 1256: WRPR_TT_I wrpr %r0, 0x0085, %tt | |
4523 | set 0xa3e014da, %r28 | |
4524 | stxa %r28, [%g0] 0x73 | |
4525 | intvec_0_489: | |
4526 | .word 0x39400001 ! 1257: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4527 | .word 0x93902005 ! 1258: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
4528 | .word 0xd68008a0 ! 1259: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
4529 | intveclr_0_490: | |
4530 | set 0x567efcc8, %r28 | |
4531 | stxa %r28, [%g0] 0x72 | |
4532 | .word 0x25400001 ! 1260: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4533 | ta T_CHANGE_HPRIV ! macro | |
4534 | otherw | |
4535 | mov 0xb5, %r30 | |
4536 | .word 0x93d0001e ! 1262: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
4537 | tagged_0_491: | |
4538 | taddcctv %r26, 0x13be, %r14 | |
4539 | .word 0xd607e001 ! 1263: LDUW_I lduw [%r31 + 0x0001], %r11 | |
4540 | .word 0x83d02035 ! 1264: Tcc_I te icc_or_xcc, %r0 + 53 | |
4541 | DS_0_492: | |
4542 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4543 | .word 0xd7346001 ! 1: STQF_I - %f11, [0x0001, %r17] | |
4544 | normalw | |
4545 | .word 0x83458000 ! 1265: RD_SOFTINT_REG rd %softint, %r1 | |
4546 | nop | |
4547 | mov 0x80, %g3 | |
4548 | stxa %g3, [%g3] 0x5f | |
4549 | .word 0xc25fc000 ! 1266: LDX_R ldx [%r31 + %r0], %r1 | |
4550 | .word 0x8682a001 ! 1267: ADDcc_I addcc %r10, 0x0001, %r3 | |
4551 | DS_0_493: | |
4552 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4553 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
4554 | .word 0xa5a0054a ! 1: FSQRTd fsqrt | |
4555 | .word 0xa5a10822 ! 1268: FADDs fadds %f4, %f2, %f18 | |
4556 | .word 0xa9804014 ! 1269: WR_SET_SOFTINT_R wr %r1, %r20, %set_softint | |
4557 | .word 0xe4d004a0 ! 1270: LDSHA_R ldsha [%r0, %r0] 0x25, %r18 | |
4558 | .word 0x91d02035 ! 1271: Tcc_I ta icc_or_xcc, %r0 + 53 | |
4559 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_494)) -> intp(0,1,3) | |
4560 | xir_0_494: | |
4561 | .word 0xa9816001 ! 1272: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
4562 | debug_0_495: | |
4563 | mov 8, %r18 | |
4564 | .word 0xd6f00852 ! 1273: STXA_R stxa %r11, [%r0 + %r18] 0x42 | |
4565 | .word 0x87802088 ! 1274: WRASI_I wr %r0, 0x0088, %asi | |
4566 | .word 0x87802058 ! 1275: WRASI_I wr %r0, 0x0058, %asi | |
4567 | splash_lsu_0_496: | |
4568 | setx 0xb2b7be0ef905c351, %r1, %r2 | |
4569 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4570 | .word 0x3d400001 ! 1276: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4571 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_497)) -> intp(0,1,3) | |
4572 | xir_0_497: | |
4573 | .word 0xa981e001 ! 1277: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
4574 | .word 0xe497e020 ! 1278: LDUHA_I lduha [%r31, + 0x0020] %asi, %r18 | |
4575 | .word 0x93902003 ! 1279: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
4576 | .word 0x81460000 ! 1280: RD_STICK_REG stbar | |
4577 | .word 0xe4bfe001 ! 1281: STDA_I stda %r18, [%r31 + 0x0001] %asi | |
4578 | tagged_0_498: | |
4579 | tsubcctv %r18, 0x1c41, %r9 | |
4580 | .word 0xe407e001 ! 1282: LDUW_I lduw [%r31 + 0x0001], %r18 | |
4581 | .word 0x9f802001 ! 1283: SIR sir 0x0001 | |
4582 | .word 0xa9814004 ! 1284: WR_SET_SOFTINT_R wr %r5, %r4, %set_softint | |
4583 | .word 0xe51fe001 ! 1285: LDDF_I ldd [%r31, 0x0001], %f18 | |
4584 | .word 0xe48008a0 ! 1286: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 | |
4585 | debug_0_499: | |
4586 | setx debug_0_499 + 64, %r11, %r19 | |
4587 | mov 0x38, %r18 | |
4588 | .word 0xe6f00b12 ! 1287: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4589 | .word 0x8d702001 ! 1288: POPC_I popc 0x0001, %r6 | |
4590 | .word 0xcc8fe000 ! 1289: LDUBA_I lduba [%r31, + 0x0000] %asi, %r6 | |
4591 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_500)) -> intp(0,1,3) | |
4592 | xir_0_500: | |
4593 | .word 0xa984a001 ! 1290: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
4594 | .word 0xcc27c004 ! 1291: STW_R stw %r6, [%r31 + %r4] | |
4595 | .word 0x8d903419 ! 1292: WRPR_PSTATE_I wrpr %r0, 0x1419, %pstate | |
4596 | set 0x9dde8d36, %r28 | |
4597 | stxa %r28, [%g0] 0x73 | |
4598 | intvec_0_501: | |
4599 | .word 0x39400001 ! 1293: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4600 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_502)) -> intp(0,0,6) | |
4601 | intvec_0_502: | |
4602 | .word 0x39400001 ! 1294: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4603 | .word 0x32800001 ! 1295: BNE bne,a <label_0x1> | |
4604 | splash_htba_0_503: | |
4605 | set 0x80000, %r2 | |
4606 | ld [%r2+%r0], %r1 | |
4607 | ta T_CHANGE_HPRIV | |
4608 | set 0x80000, %r2 | |
4609 | .word 0x8b980002 ! 1296: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
4610 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_504)) -> intp(0,0,2) | |
4611 | intvec_0_504: | |
4612 | .word 0x39400001 ! 1297: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4613 | .word 0xa1902007 ! 1298: WRPR_GL_I wrpr %r0, 0x0007, %- | |
4614 | .word 0xccc804a0 ! 1299: LDSBA_R ldsba [%r0, %r0] 0x25, %r6 | |
4615 | intveclr_0_505: | |
4616 | set 0x6b1d3333, %r28 | |
4617 | stxa %r28, [%g0] 0x72 | |
4618 | .word 0x25400001 ! 1300: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4619 | splash_htba_0_506: | |
4620 | set 0x80000, %r2 | |
4621 | st %r1, [%r2+%r0] | |
4622 | ta T_CHANGE_HPRIV | |
4623 | set 0x80000, %r2 | |
4624 | .word 0x8b980002 ! 1301: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
4625 | ta T_CHANGE_HPRIV ! macro | |
4626 | .word 0xcc27c004 ! 1303: STW_R stw %r6, [%r31 + %r4] | |
4627 | .word 0xcc5fe001 ! 1304: LDX_I ldx [%r31 + 0x0001], %r6 | |
4628 | debug_0_507: | |
4629 | mov 8, %r18 | |
4630 | .word 0xdaf00852 ! 1305: STXA_R stxa %r13, [%r0 + %r18] 0x42 | |
4631 | .word 0x8d9025ac ! 1306: WRPR_PSTATE_I wrpr %r0, 0x05ac, %pstate | |
4632 | .word 0x87802058 ! 1307: WRASI_I wr %r0, 0x0058, %asi | |
4633 | .word 0xa3464000 ! 1308: RD_STICK_CMPR_REG rd %-, %r17 | |
4634 | splash_cmpr_0_508: | |
4635 | setx 0x74ada6651ace0e56, %g2, %g1 | |
4636 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4637 | sub %g1, 100, %g1 | |
4638 | .word 0xb1800001 ! 1309: WR_STICK_REG_R wr %r0, %r1, %- | |
4639 | .word 0xe2c7e000 ! 1310: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r17 | |
4640 | .word 0xe277e001 ! 1311: STX_I stx %r17, [%r31 + 0x0001] | |
4641 | .word 0xe257c000 ! 1312: LDSH_R ldsh [%r31 + %r0], %r17 | |
4642 | .word 0xe28fe010 ! 1313: LDUBA_I lduba [%r31, + 0x0010] %asi, %r17 | |
4643 | debug_0_509: | |
4644 | mov 0x38, %r18 | |
4645 | .word 0xfef00b12 ! 1314: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4646 | mondo_0_510: | |
4647 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4648 | ||
4649 | stxa %r7, [%r0+0x3d8] %asi | |
4650 | .word 0x9d908001 ! 1315: WRPR_WSTATE_R wrpr %r2, %r1, %wstate | |
4651 | .word 0xe2d80e80 ! 1316: LDXA_R ldxa [%r0, %r0] 0x74, %r17 | |
4652 | otherw | |
4653 | mov 0xb5, %r30 | |
4654 | .word 0x93d0001e ! 1317: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
4655 | .word 0x3c700001 ! 1318: BPPOS <illegal instruction> | |
4656 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_511)) -> intp(0,1,3) | |
4657 | xir_0_511: | |
4658 | .word 0xa984e001 ! 1319: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
4659 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_512)) -> intp(0,1,3) | |
4660 | xir_0_512: | |
4661 | .word 0xa9802001 ! 1320: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
4662 | nop | |
4663 | mov 0x80, %g3 | |
4664 | stxa %g3, [%g3] 0x57 | |
4665 | .word 0xe25fc000 ! 1321: LDX_R ldx [%r31 + %r0], %r17 | |
4666 | .word 0xe28008a0 ! 1322: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
4667 | .word 0xe21fe001 ! 1323: LDD_I ldd [%r31 + 0x0001], %r17 | |
4668 | debug_0_513: | |
4669 | mov 8, %r18 | |
4670 | .word 0xe2f00852 ! 1324: STXA_R stxa %r17, [%r0 + %r18] 0x42 | |
4671 | splash_lsu_0_514: | |
4672 | setx 0xa4609744c183263f, %r1, %r2 | |
4673 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4674 | .word 0x3d400001 ! 1325: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4675 | intveclr_0_515: | |
4676 | set 0xf56ba12d, %r28 | |
4677 | stxa %r28, [%g0] 0x72 | |
4678 | .word 0x25400001 ! 1326: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4679 | DS_0_516: | |
4680 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4681 | .word 0xd5330014 ! 1: STQF_R - %f10, [%r20, %r12] | |
4682 | normalw | |
4683 | .word 0x89458000 ! 1327: RD_SOFTINT_REG rd %softint, %r4 | |
4684 | debug_0_517: | |
4685 | setx debug_0_517 + 64, %r11, %r19 | |
4686 | mov 0x38, %r18 | |
4687 | .word 0xe6f00b12 ! 1328: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4688 | debug_0_518: | |
4689 | mov 0x38, %r18 | |
4690 | .word 0xfef00b12 ! 1329: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4691 | .word 0xc8c00e60 ! 1330: LDSWA_R ldswa [%r0, %r0] 0x73, %r4 | |
4692 | nop | |
4693 | mov 0x80, %g3 | |
4694 | stxa %g3, [%g3] 0x5f | |
4695 | .word 0xc85fc000 ! 1331: LDX_R ldx [%r31 + %r0], %r4 | |
4696 | .word 0x879021e2 ! 1332: WRPR_TT_I wrpr %r0, 0x01e2, %tt | |
4697 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_519)) -> intp(0,1,3) | |
4698 | xir_0_519: | |
4699 | .word 0xa982a001 ! 1333: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
4700 | intveclr_0_520: | |
4701 | set 0xab33c416, %r28 | |
4702 | stxa %r28, [%g0] 0x72 | |
4703 | .word 0x25400001 ! 1334: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4704 | .word 0x93902004 ! 1335: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
4705 | ta T_CHANGE_HPRIV ! macro | |
4706 | change_to_randtl_0_521: | |
4707 | ta T_CHANGE_HPRIV ! macro | |
4708 | done_change_to_randtl_0_521: | |
4709 | .word 0x8f902004 ! 1337: WRPR_TL_I wrpr %r0, 0x0004, %tl | |
4710 | .word 0x91d020b4 ! 1338: Tcc_I ta icc_or_xcc, %r0 + 180 | |
4711 | .word 0xa1902006 ! 1339: WRPR_GL_I wrpr %r0, 0x0006, %- | |
4712 | .word 0xa7852001 ! 1340: WR_GRAPHICS_STATUS_REG_I wr %r20, 0x0001, %- | |
4713 | .word 0x9f802001 ! 1341: SIR sir 0x0001 | |
4714 | debug_0_522: | |
4715 | mov 8, %r18 | |
4716 | .word 0xdaf00852 ! 1342: STXA_R stxa %r13, [%r0 + %r18] 0x42 | |
4717 | .word 0x38800001 ! 1343: BGU bgu,a <label_0x1> | |
4718 | set 0xb86c6076, %r28 | |
4719 | stxa %r28, [%g0] 0x73 | |
4720 | intvec_0_523: | |
4721 | .word 0x39400001 ! 1344: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4722 | .word 0x93540000 ! 1345: RDPR_GL rdpr %-, %r9 | |
4723 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_524)) -> intp(0,0,29) | |
4724 | intvec_0_524: | |
4725 | .word 0x39400001 ! 1346: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4726 | set 0x6cfdc5d6, %r28 | |
4727 | stxa %r28, [%g0] 0x73 | |
4728 | intvec_0_525: | |
4729 | .word 0x39400001 ! 1347: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4730 | .word 0xa1464000 ! 1348: RD_STICK_CMPR_REG rd %-, %r16 | |
4731 | .word 0xa7464000 ! 1349: RD_STICK_CMPR_REG rd %-, %r19 | |
4732 | .word 0x30700001 ! 1350: BPA <illegal instruction> | |
4733 | .word 0x93902000 ! 1351: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
4734 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_526)) -> intp(0,1,3) | |
4735 | xir_0_526: | |
4736 | .word 0xa981a001 ! 1352: WR_SET_SOFTINT_I wr %r6, 0x0001, %set_softint | |
4737 | .word 0xe6c004a0 ! 1353: LDSWA_R ldswa [%r0, %r0] 0x25, %r19 | |
4738 | .word 0x81982795 ! 1354: WRHPR_HPSTATE_I wrhpr %r0, 0x0795, %hpstate | |
4739 | .word 0xa345c000 ! 1355: RD_TICK_CMPR_REG rd %-, %r17 | |
4740 | debug_0_527: | |
4741 | mov 0x38, %r18 | |
4742 | .word 0xfef00b12 ! 1356: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4743 | .word 0x8e4d000d ! 1357: MULX_R mulx %r20, %r13, %r7 | |
4744 | .word 0x93d02033 ! 1358: Tcc_I tne icc_or_xcc, %r0 + 51 | |
4745 | .word 0x8198264c ! 1359: WRHPR_HPSTATE_I wrhpr %r0, 0x064c, %hpstate | |
4746 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_528)) -> intp(0,0,3) | |
4747 | intvec_0_528: | |
4748 | .word 0x39400001 ! 1360: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4749 | .word 0xa1902007 ! 1361: WRPR_GL_I wrpr %r0, 0x0007, %- | |
4750 | nop | |
4751 | mov 0x80, %g3 | |
4752 | stxa %g3, [%g3] 0x5f | |
4753 | .word 0xce5fc000 ! 1362: LDX_R ldx [%r31 + %r0], %r7 | |
4754 | ta T_CHANGE_HPRIV ! macro | |
4755 | tagged_0_529: | |
4756 | taddcctv %r5, 0x1397, %r19 | |
4757 | .word 0xce07e001 ! 1364: LDUW_I lduw [%r31 + 0x0001], %r7 | |
4758 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_530)) -> intp(0,0,20) | |
4759 | intvec_0_530: | |
4760 | .word 0x39400001 ! 1365: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4761 | intveclr_0_531: | |
4762 | set 0x199560e2, %r28 | |
4763 | stxa %r28, [%g0] 0x72 | |
4764 | .word 0x25400001 ! 1366: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4765 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_532)) -> intp(0,0,8) | |
4766 | intvec_0_532: | |
4767 | .word 0x39400001 ! 1367: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4768 | .word 0xce37c00d ! 1368: STH_R sth %r7, [%r31 + %r13] | |
4769 | .word 0xce800ae0 ! 1369: LDUWA_R lduwa [%r0, %r0] 0x57, %r7 | |
4770 | .word 0x8790239d ! 1370: WRPR_TT_I wrpr %r0, 0x039d, %tt | |
4771 | .word 0x87802088 ! 1371: WRASI_I wr %r0, 0x0088, %asi | |
4772 | mondo_0_533: | |
4773 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4774 | ||
4775 | stxa %r3, [%r0+0x3e0] %asi | |
4776 | .word 0x9d92c00c ! 1372: WRPR_WSTATE_R wrpr %r11, %r12, %wstate | |
4777 | mondo_0_534: | |
4778 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4779 | ||
4780 | stxa %r9, [%r0+0x3e8] %asi | |
4781 | .word 0x9d914007 ! 1373: WRPR_WSTATE_R wrpr %r5, %r7, %wstate | |
4782 | .word 0xced7e020 ! 1374: LDSHA_I ldsha [%r31, + 0x0020] %asi, %r7 | |
4783 | .word 0xa0fc4003 ! 1375: SDIVcc_R sdivcc %r17, %r3, %r16 | |
4784 | .word 0x8198200e ! 1376: WRHPR_HPSTATE_I wrhpr %r0, 0x000e, %hpstate | |
4785 | mondo_0_535: | |
4786 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4787 | ||
4788 | stxa %r8, [%r0+0x3d8] %asi | |
4789 | .word 0x9d944005 ! 1377: WRPR_WSTATE_R wrpr %r17, %r5, %wstate | |
4790 | debug_0_536: | |
4791 | mov 0x38, %r18 | |
4792 | .word 0xfef00b12 ! 1378: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
4793 | splash_cmpr_0_537: | |
4794 | setx 0x1132e397724e25e6, %g2, %g1 | |
4795 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
4796 | sub %g1, 100, %g1 | |
4797 | .word 0xb1800001 ! 1379: WR_STICK_REG_R wr %r0, %r1, %- | |
4798 | .word 0x9768400b ! 1380: SDIVX_R sdivx %r1, %r11, %r11 | |
4799 | tagged_0_538: | |
4800 | tsubcctv %r25, 0x172f, %r22 | |
4801 | .word 0xd607e001 ! 1381: LDUW_I lduw [%r31 + 0x0001], %r11 | |
4802 | splash_cmpr_0_539: | |
4803 | setx 0xc0c75647d7f756d9, %g2, %g1 | |
4804 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
4805 | sub %g1, 100, %g1 | |
4806 | .word 0xb1800001 ! 1382: WR_STICK_REG_R wr %r0, %r1, %- | |
4807 | .word 0xd60fe001 ! 1383: LDUB_I ldub [%r31 + 0x0001], %r11 | |
4808 | .word 0x93d02035 ! 1384: Tcc_I tne icc_or_xcc, %r0 + 53 | |
4809 | change_to_randtl_0_540: | |
4810 | ta T_CHANGE_PRIV ! macro | |
4811 | done_change_to_randtl_0_540: | |
4812 | .word 0x8f902000 ! 1385: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
4813 | .word 0x8d90262a ! 1386: WRPR_PSTATE_I wrpr %r0, 0x062a, %pstate | |
4814 | .word 0xd6bfc02b ! 1387: STDA_R stda %r11, [%r31 + %r11] 0x01 | |
4815 | intveclr_0_541: | |
4816 | set 0xb8666716, %r28 | |
4817 | stxa %r28, [%g0] 0x72 | |
4818 | .word 0x25400001 ! 1388: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4819 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_542)) -> intp(0,1,3) | |
4820 | xir_0_542: | |
4821 | .word 0xa982e001 ! 1389: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
4822 | .word 0xd61fe001 ! 1390: LDD_I ldd [%r31 + 0x0001], %r11 | |
4823 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_543)) -> intp(0,1,3) | |
4824 | xir_0_543: | |
4825 | .word 0xa982a001 ! 1391: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
4826 | nop | |
4827 | mov 0x80, %g3 | |
4828 | stxa %g3, [%g3] 0x57 | |
4829 | .word 0xd65fc000 ! 1392: LDX_R ldx [%r31 + %r0], %r11 | |
4830 | .word 0x2a700001 ! 1393: BPCS <illegal instruction> | |
4831 | invalw | |
4832 | mov 0x32, %r30 | |
4833 | .word 0x91d0001e ! 1394: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4834 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_544)) -> intp(0,1,3) | |
4835 | xir_0_544: | |
4836 | .word 0xa981e001 ! 1395: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
4837 | .word 0xd6800b60 ! 1396: LDUWA_R lduwa [%r0, %r0] 0x5b, %r11 | |
4838 | .word 0xd68008a0 ! 1397: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
4839 | splash_lsu_0_545: | |
4840 | setx 0x48c9523f077e735b, %r1, %r2 | |
4841 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4842 | .word 0x3d400001 ! 1398: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4843 | mondo_0_546: | |
4844 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4845 | ||
4846 | stxa %r18, [%r0+0x3c0] %asi | |
4847 | .word 0x9d948008 ! 1399: WRPR_WSTATE_R wrpr %r18, %r8, %wstate | |
4848 | .word 0xd627c008 ! 1400: STW_R stw %r11, [%r31 + %r8] | |
4849 | .word 0xd6c00e40 ! 1401: LDSWA_R ldswa [%r0, %r0] 0x72, %r11 | |
4850 | intveclr_0_547: | |
4851 | set 0xa6f760f8, %r28 | |
4852 | stxa %r28, [%g0] 0x72 | |
4853 | .word 0x25400001 ! 1402: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4854 | .word 0xd73fc008 ! 1403: STDF_R std %f11, [%r8, %r31] | |
4855 | .word 0x9f802001 ! 1404: SIR sir 0x0001 | |
4856 | .word 0x82fb6001 ! 1405: SDIVcc_I sdivcc %r13, 0x0001, %r1 | |
4857 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_548)) -> intp(0,0,0) | |
4858 | intvec_0_548: | |
4859 | .word 0x39400001 ! 1406: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4860 | .word 0xc2800c80 ! 1407: LDUWA_R lduwa [%r0, %r0] 0x64, %r1 | |
4861 | .word 0xc337c008 ! 1408: STQF_R - %f1, [%r8, %r31] | |
4862 | set 0xf41ec548, %r28 | |
4863 | stxa %r28, [%g0] 0x73 | |
4864 | intvec_0_549: | |
4865 | .word 0x39400001 ! 1409: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4866 | .word 0x87802058 ! 1410: WRASI_I wr %r0, 0x0058, %asi | |
4867 | .word 0x8d903bc1 ! 1411: WRPR_PSTATE_I wrpr %r0, 0x1bc1, %pstate | |
4868 | .word 0x98dc8014 ! 1412: SMULcc_R smulcc %r18, %r20, %r12 | |
4869 | mondo_0_550: | |
4870 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4871 | ||
4872 | stxa %r18, [%r0+0x3d8] %asi | |
4873 | .word 0x9d914003 ! 1413: WRPR_WSTATE_R wrpr %r5, %r3, %wstate | |
4874 | .word 0xd937c003 ! 1414: STQF_R - %f12, [%r3, %r31] | |
4875 | .word 0x2a800001 ! 1415: BCS bcs,a <label_0x1> | |
4876 | .word 0x9f802001 ! 1416: SIR sir 0x0001 | |
4877 | .word 0xd88fe010 ! 1417: LDUBA_I lduba [%r31, + 0x0010] %asi, %r12 | |
4878 | .word 0x8d6b4013 ! 1418: SDIVX_R sdivx %r13, %r19, %r6 | |
4879 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_551)) -> intp(0,1,3) | |
4880 | xir_0_551: | |
4881 | .word 0xa980e001 ! 1419: WR_SET_SOFTINT_I wr %r3, 0x0001, %set_softint | |
4882 | .word 0xcc1fe001 ! 1420: LDD_I ldd [%r31 + 0x0001], %r6 | |
4883 | .word 0xcc57c000 ! 1421: LDSH_R ldsh [%r31 + %r0], %r6 | |
4884 | splash_cmpr_0_552: | |
4885 | setx 0x1f3f58c253a12b4d, %g2, %g1 | |
4886 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4887 | sub %g1, 100, %g1 | |
4888 | .word 0xb1800001 ! 1422: WR_STICK_REG_R wr %r0, %r1, %- | |
4889 | splash_tba_0_553: | |
4890 | set 0x120000, %r2 | |
4891 | ld [%r2+%r0], %r1 | |
4892 | ta T_CHANGE_PRIV | |
4893 | set 0x120000, %r2 | |
4894 | .word 0x8b900002 ! 1423: WRPR_TBA_R wrpr %r0, %r2, %tba | |
4895 | DS_0_554: | |
4896 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
4897 | .word 0xbfefc000 ! 1424: RESTORE_R restore %r31, %r0, %r31 | |
4898 | debug_0_555: | |
4899 | mov 8, %r18 | |
4900 | .word 0xd4f00852 ! 1425: STXA_R stxa %r10, [%r0 + %r18] 0x42 | |
4901 | .word 0xa1902005 ! 1426: WRPR_GL_I wrpr %r0, 0x0005, %- | |
4902 | intveclr_0_556: | |
4903 | set 0xe12d6ff2, %r28 | |
4904 | stxa %r28, [%g0] 0x72 | |
4905 | .word 0x25400001 ! 1427: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4906 | .word 0xcd1fc000 ! 1428: LDDF_R ldd [%r31, %r0], %f6 | |
4907 | .word 0xa9800005 ! 1429: WR_SET_SOFTINT_R wr %r0, %r5, %set_softint | |
4908 | mondo_0_557: | |
4909 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4910 | ||
4911 | stxa %r7, [%r0+0x3c0] %asi | |
4912 | .word 0x9d930006 ! 1430: WRPR_WSTATE_R wrpr %r12, %r6, %wstate | |
4913 | .word 0xa1902004 ! 1431: WRPR_GL_I wrpr %r0, 0x0004, %- | |
4914 | .word 0xcc27c006 ! 1432: STW_R stw %r6, [%r31 + %r6] | |
4915 | .word 0xcc8008a0 ! 1433: LDUWA_R lduwa [%r0, %r0] 0x45, %r6 | |
4916 | DS_0_558: | |
4917 | nop | |
4918 | not %g0, %g2 | |
4919 | jmp %g2 | |
4920 | .word 0x9d902001 ! 1434: WRPR_WSTATE_I wrpr %r0, 0x0001, %wstate | |
4921 | splash_lsu_0_559: | |
4922 | setx 0xeb9b0206aa7379f1, %r1, %r2 | |
4923 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4924 | .word 0x3d400001 ! 1435: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4925 | .word 0xcd1fc000 ! 1436: LDDF_R ldd [%r31, %r0], %f6 | |
4926 | .word 0x93902002 ! 1437: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
4927 | .word 0x8d9030fb ! 1438: WRPR_PSTATE_I wrpr %r0, 0x10fb, %pstate | |
4928 | invalw | |
4929 | mov 0x35, %r30 | |
4930 | .word 0x91d0001e ! 1439: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4931 | nop | |
4932 | mov 0x80, %g3 | |
4933 | stxa %g3, [%g3] 0x57 | |
4934 | .word 0xcc5fc000 ! 1440: LDX_R ldx [%r31 + %r0], %r6 | |
4935 | .word 0x36800001 ! 1441: BGE bge,a <label_0x1> | |
4936 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_560)) -> intp(0,0,25) | |
4937 | intvec_0_560: | |
4938 | .word 0x39400001 ! 1442: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4939 | .word 0xccbfe001 ! 1443: STDA_I stda %r6, [%r31 + 0x0001] %asi | |
4940 | .word 0x8b53c000 ! 1444: RDPR_FQ <illegal instruction> | |
4941 | .word 0xca800c40 ! 1445: LDUWA_R lduwa [%r0, %r0] 0x62, %r5 | |
4942 | intveclr_0_561: | |
4943 | set 0x208fa9b5, %r28 | |
4944 | stxa %r28, [%g0] 0x72 | |
4945 | .word 0x25400001 ! 1446: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4946 | .word 0x8d90303b ! 1447: WRPR_PSTATE_I wrpr %r0, 0x103b, %pstate | |
4947 | debug_0_562: | |
4948 | setx debug_0_562 + 64, %r11, %r19 | |
4949 | mov 0x38, %r18 | |
4950 | .word 0xe6f00b12 ! 1448: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
4951 | change_to_randtl_0_563: | |
4952 | ta T_CHANGE_HPRIV ! macro | |
4953 | done_change_to_randtl_0_563: | |
4954 | .word 0x8f902003 ! 1449: WRPR_TL_I wrpr %r0, 0x0003, %tl | |
4955 | debug_0_564: | |
4956 | mov 8, %r18 | |
4957 | .word 0xd4f00852 ! 1450: STXA_R stxa %r10, [%r0 + %r18] 0x42 | |
4958 | .word 0x93902003 ! 1451: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
4959 | intveclr_0_565: | |
4960 | set 0x107bb317, %r28 | |
4961 | stxa %r28, [%g0] 0x72 | |
4962 | .word 0x25400001 ! 1452: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4963 | .word 0xa190200c ! 1453: WRPR_GL_I wrpr %r0, 0x000c, %- | |
4964 | .word 0xca8fe030 ! 1454: LDUBA_I lduba [%r31, + 0x0030] %asi, %r5 | |
4965 | .word 0x8fa509f0 ! 1455: FDIVq dis not found | |
4966 | ||
4967 | .word 0xa1a0054d ! 1456: FSQRTd fsqrt | |
4968 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_566)) -> intp(0,0,0) | |
4969 | intvec_0_566: | |
4970 | .word 0x39400001 ! 1457: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4971 | set 0xfcd095c3, %r28 | |
4972 | stxa %r28, [%g0] 0x73 | |
4973 | intvec_0_567: | |
4974 | .word 0x39400001 ! 1458: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4975 | DS_0_568: | |
4976 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4977 | .word 0xbfe7c000 ! 1459: SAVE_R save %r31, %r0, %r31 | |
4978 | .word 0x8d9025af ! 1460: WRPR_PSTATE_I wrpr %r0, 0x05af, %pstate | |
4979 | .word 0x8a808010 ! 1461: ADDcc_R addcc %r2, %r16, %r5 | |
4980 | DS_0_569: | |
4981 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
4982 | .word 0xe332a001 ! 1: STQF_I - %f17, [0x0001, %r10] | |
4983 | normalw | |
4984 | .word 0x99458000 ! 1462: RD_SOFTINT_REG rd %softint, %r12 | |
4985 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_570)) -> intp(0,1,3) | |
4986 | xir_0_570: | |
4987 | .word 0xa984e001 ! 1463: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
4988 | .word 0xd88008a0 ! 1464: LDUWA_R lduwa [%r0, %r0] 0x45, %r12 | |
4989 | set 0xc5e7af1f, %r28 | |
4990 | stxa %r28, [%g0] 0x73 | |
4991 | intvec_0_571: | |
4992 | .word 0x39400001 ! 1465: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4993 | .word 0xa780a001 ! 1466: WR_GRAPHICS_STATUS_REG_I wr %r2, 0x0001, %- | |
4994 | splash_cmpr_0_572: | |
4995 | setx 0x9334ba563c57782e, %g2, %g1 | |
4996 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
4997 | sub %g1, 100, %g1 | |
4998 | .word 0xb1800001 ! 1467: WR_STICK_REG_R wr %r0, %r1, %- | |
4999 | .word 0x91d020b4 ! 1468: Tcc_I ta icc_or_xcc, %r0 + 180 | |
5000 | .word 0xa190200a ! 1469: WRPR_GL_I wrpr %r0, 0x000a, %- | |
5001 | .word 0xa7822001 ! 1470: WR_GRAPHICS_STATUS_REG_I wr %r8, 0x0001, %- | |
5002 | .word 0x22800001 ! 1471: BE be,a <label_0x1> | |
5003 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_573)) -> intp(0,1,3) | |
5004 | xir_0_573: | |
5005 | .word 0xa9836001 ! 1472: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
5006 | ta T_CHANGE_PRIV ! macro | |
5007 | .word 0xd88fe010 ! 1474: LDUBA_I lduba [%r31, + 0x0010] %asi, %r12 | |
5008 | DS_0_574: | |
5009 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
5010 | .xword 0xed63434c ! Random illegal ? | |
5011 | .word 0xc911000d ! 1: LDQF_R - [%r4, %r13], %f4 | |
5012 | .word 0xa7a2482d ! 1475: FADDs fadds %f9, %f13, %f19 | |
5013 | otherw | |
5014 | mov 0x30, %r30 | |
5015 | .word 0x93d0001e ! 1476: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
5016 | nop | |
5017 | mov 0x80, %g3 | |
5018 | stxa %g3, [%g3] 0x5f | |
5019 | .word 0xe65fc000 ! 1477: LDX_R ldx [%r31 + %r0], %r19 | |
5020 | DS_0_575: | |
5021 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
5022 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
5023 | .word 0x89a0054a ! 1: FSQRTd fsqrt | |
5024 | .word 0xa1a40821 ! 1478: FADDs fadds %f16, %f1, %f16 | |
5025 | DS_0_576: | |
5026 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
5027 | .xword 0xdf675271 ! Random illegal ? | |
5028 | .word 0xa1a00544 ! 1: FSQRTd fsqrt | |
5029 | .word 0x93a18825 ! 1479: FADDs fadds %f6, %f5, %f9 | |
5030 | DS_0_577: | |
5031 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
5032 | .word 0xbfefc000 ! 1480: RESTORE_R restore %r31, %r0, %r31 | |
5033 | .word 0x91d02035 ! 1481: Tcc_I ta icc_or_xcc, %r0 + 53 | |
5034 | .word 0xd297e020 ! 1482: LDUHA_I lduha [%r31, + 0x0020] %asi, %r9 | |
5035 | .word 0x93902002 ! 1483: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
5036 | splash_cmpr_0_578: | |
5037 | setx 0x20d2b49a5373e1e2, %g2, %g1 | |
5038 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
5039 | sub %g1, 100, %g1 | |
5040 | .word 0xb1800001 ! 1484: WR_STICK_REG_R wr %r0, %r1, %- | |
5041 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_579)) -> intp(0,1,3) | |
5042 | xir_0_579: | |
5043 | .word 0xa980a001 ! 1485: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
5044 | .word 0xa24b0012 ! 1486: MULX_R mulx %r12, %r18, %r17 | |
5045 | .word 0x879022c3 ! 1487: WRPR_TT_I wrpr %r0, 0x02c3, %tt | |
5046 | .word 0xe337c012 ! 1488: STQF_R - %f17, [%r18, %r31] | |
5047 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_580)) -> intp(0,0,14) | |
5048 | intvec_0_580: | |
5049 | .word 0x39400001 ! 1489: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5050 | tagged_0_581: | |
5051 | taddcctv %r22, 0x12d6, %r14 | |
5052 | .word 0xe207e001 ! 1490: LDUW_I lduw [%r31 + 0x0001], %r17 | |
5053 | tagged_0_582: | |
5054 | tsubcctv %r22, 0x1691, %r24 | |
5055 | .word 0xe207e001 ! 1491: LDUW_I lduw [%r31 + 0x0001], %r17 | |
5056 | .word 0xa0852001 ! 1492: ADDcc_I addcc %r20, 0x0001, %r16 | |
5057 | .word 0xe057c000 ! 1493: LDSH_R ldsh [%r31 + %r0], %r16 | |
5058 | debug_0_583: | |
5059 | setx debug_0_583 + 64, %r11, %r19 | |
5060 | mov 0x38, %r18 | |
5061 | .word 0xe6f00b12 ! 1494: STXA_R stxa %r19, [%r0 + %r18] 0x58 | |
5062 | debug_0_584: | |
5063 | mov 0x38, %r18 | |
5064 | .word 0xfef00b12 ! 1495: STXA_R stxa %r31, [%r0 + %r18] 0x58 | |
5065 | .word 0xe08008a0 ! 1496: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
5066 | .word 0xe0c7e020 ! 1497: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r16 | |
5067 | .word 0x93902002 ! 1498: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
5068 | SECTION .MAIN | |
5069 | .text | |
5070 | diag_finish: | |
5071 | nop | |
5072 | nop | |
5073 | nop | |
5074 | ta T_CHANGE_HPRIV | |
5075 | set 0x80000, %r2 | |
5076 | wrhpr %g2, %g0, %htba | |
5077 | ta T_GOOD_TRAP | |
5078 | nop | |
5079 | nop | |
5080 | nop | |
5081 | .data | |
5082 | .xword 0x0 | |
5083 | ||
5084 | .global user_data_start | |
5085 | .data | |
5086 | user_data_start: | |
5087 | ||
5088 | .xword 0x27a1290d2451225a | |
5089 | .xword 0xa957891eca581173 | |
5090 | .xword 0xa54b8f67fb09867b | |
5091 | .xword 0x4881cfa4b504bfb6 | |
5092 | .xword 0x85d4686bffa2dd53 | |
5093 | .xword 0x909fe875820d2039 | |
5094 | .xword 0x42912df545a19726 | |
5095 | .xword 0xa842efd87f0996cc | |
5096 | .xword 0x5e223491b3725946 | |
5097 | .xword 0xa365b94b93fdaf61 | |
5098 | .xword 0xecb448c8d7278b1b | |
5099 | .xword 0x117f4a8fb72f148a | |
5100 | .xword 0x889c8d59ad8cc9de | |
5101 | .xword 0x2e6f77aaad8f8f21 | |
5102 | .xword 0xf8bbb0401709ce28 | |
5103 | .xword 0x53c05f477982ab03 | |
5104 | .xword 0xab71d5d64a65e16c | |
5105 | .xword 0xb0f586ba80dc1295 | |
5106 | .xword 0x9709c3d6d68890bf | |
5107 | .xword 0x9deffd9f59b4a8c3 | |
5108 | .xword 0x06a5fb0a62e1a458 | |
5109 | .xword 0xe3d5a1ba5fcac077 | |
5110 | .xword 0x3fb246cb67e2a878 | |
5111 | .xword 0x08f6ba89117ec697 | |
5112 | .xword 0xd0d1f8e44871f7b1 | |
5113 | .xword 0xe24885015179ba54 | |
5114 | .xword 0xd1558f22a6f4ab7a | |
5115 | .xword 0xe54885456382e342 | |
5116 | .xword 0x427aefa9783da44b | |
5117 | .xword 0xab1f3675111b1c1a | |
5118 | .xword 0x7f3e4f166172bd60 | |
5119 | .xword 0x51b82c461c1a5964 | |
5120 | .xword 0x045cf7290ae86caa | |
5121 | .xword 0x34ed768fb102d8e5 | |
5122 | .xword 0xe144b1367358293e | |
5123 | .xword 0xa7509db1939994fb | |
5124 | .xword 0x38b6fdaf3ec6e2d1 | |
5125 | .xword 0x8c5d37b5ce21f302 | |
5126 | .xword 0xf616f87341f7d2ee | |
5127 | .xword 0xc1a6a5f78ab77bc9 | |
5128 | .xword 0xbd368ce94902e4ac | |
5129 | .xword 0x0583f562edde1331 | |
5130 | .xword 0x979ab9524db3f506 | |
5131 | .xword 0x18cac5f872f5149b | |
5132 | .xword 0x207007b088b7213a | |
5133 | .xword 0x4911512a23113fe1 | |
5134 | .xword 0xb8e27e3a68bcf63b | |
5135 | .xword 0x3dcdbdea17ad2801 | |
5136 | .xword 0xe7753bea826102bf | |
5137 | .xword 0xb44415dd8e45e6a7 | |
5138 | .xword 0x764442c5512b873c | |
5139 | .xword 0x81069f1ea5791306 | |
5140 | .xword 0xe052b32dae1d828a | |
5141 | .xword 0xa754a0fcbf845b11 | |
5142 | .xword 0x1f1523c3d7a2e950 | |
5143 | .xword 0x51ec80c700bd1ddd | |
5144 | .xword 0x37bb76136c4f818b | |
5145 | .xword 0xb3fc7c28e4592ec3 | |
5146 | .xword 0x4d1a06cc8c07ef30 | |
5147 | .xword 0x9cb96aae1902816f | |
5148 | .xword 0x938fab3778eec142 | |
5149 | .xword 0xc24b85fb5ad14046 | |
5150 | .xword 0xa11b6b00cad5d588 | |
5151 | .xword 0x8027a3c0989c195f | |
5152 | .xword 0x7546d2591ada641d | |
5153 | .xword 0x7cba2cd6f88b265b | |
5154 | .xword 0x44f61c556abfb5ba | |
5155 | .xword 0xf2e54e646ca0e849 | |
5156 | .xword 0x427c10214f93def1 | |
5157 | .xword 0x6756b916d66ef19e | |
5158 | .xword 0x5c0da444afab639c | |
5159 | .xword 0xf6a396c8ec904db7 | |
5160 | .xword 0xae33658824da404a | |
5161 | .xword 0xa896fcf09a9ea1e5 | |
5162 | .xword 0x3984ec31346af559 | |
5163 | .xword 0xd2516879dbeb47ce | |
5164 | .xword 0x75c7e419d830553f | |
5165 | .xword 0x66fabd418b7ff4b1 | |
5166 | .xword 0xbb362a838651a8f1 | |
5167 | .xword 0x2f149acc9caeaada | |
5168 | .xword 0x0ddc118efb5cb2c4 | |
5169 | .xword 0x8a0f4ca81329dcf8 | |
5170 | .xword 0xe2447156582de111 | |
5171 | .xword 0x41134cc871a014d4 | |
5172 | .xword 0x4e34a99b02b36fea | |
5173 | .xword 0xd3449c9a0b77c59a | |
5174 | .xword 0xbd70e2207a163898 | |
5175 | .xword 0x95dcd529129e0df1 | |
5176 | .xword 0x0aa69a4c0e58ec35 | |
5177 | .xword 0x81f30b57ce7143db | |
5178 | .xword 0xe0fdd6ffe3ecf326 | |
5179 | .xword 0x1755fe360807afbf | |
5180 | .xword 0xefbc69922d606925 | |
5181 | .xword 0x8584ac1d35daed38 | |
5182 | .xword 0x3cab90fd025221c1 | |
5183 | .xword 0x807e5c1a1617c76a | |
5184 | .xword 0x5c0d8d88df1378ac | |
5185 | .xword 0x8ec4f9c7b7e10208 | |
5186 | .xword 0x18bfa5bf24d3d44d | |
5187 | .xword 0x4919c82fd9239d47 | |
5188 | .xword 0x71367c10f8f2f54b | |
5189 | .xword 0x506eea6e99b6d588 | |
5190 | .xword 0x54c30b577fa967fc | |
5191 | .xword 0x15faa94cc81e6cc6 | |
5192 | .xword 0x8688f1a8e0c2c25f | |
5193 | .xword 0x49daa6e1dd431230 | |
5194 | .xword 0xc11a326bd2609156 | |
5195 | .xword 0x2261fde4998808da | |
5196 | .xword 0xe4a27d4bbaf38ade | |
5197 | .xword 0x2da0750504875230 | |
5198 | .xword 0x355a3886451ae411 | |
5199 | .xword 0x16831c86d808ea67 | |
5200 | .xword 0x5b196dc2f0e0e347 | |
5201 | .xword 0x75fc4909ad2b68e9 | |
5202 | .xword 0xc027401e2ace7f82 | |
5203 | .xword 0xbcdc6167af11bc76 | |
5204 | .xword 0x340dbfee31b3851f | |
5205 | .xword 0x86df7bb924fbe49e | |
5206 | .xword 0x94837eaa56ee4fce | |
5207 | .xword 0xa4a1eca4f0a33370 | |
5208 | .xword 0xb1dc176a9cf8b726 | |
5209 | .xword 0xb3a91ee5f46c1226 | |
5210 | .xword 0x7e2c12d1f859df39 | |
5211 | .xword 0x7960d4200d6c1830 | |
5212 | .xword 0x07808e5ccc7d925d | |
5213 | .xword 0xcd9011b43b4131fc | |
5214 | .xword 0x238d8d453bb716e1 | |
5215 | .xword 0xb802f7ab9b86d8b8 | |
5216 | .xword 0xf4a621f538d51fd2 | |
5217 | .xword 0xbef3bc1d6fb378b0 | |
5218 | .xword 0xaeff2e8b99f7a61c | |
5219 | .xword 0xea258bd6fb999a38 | |
5220 | .xword 0xacaef4df44dd4fe4 | |
5221 | .xword 0x0b09c85f7a4849e1 | |
5222 | .xword 0xea30cd40b87a5b08 | |
5223 | .xword 0xad30b9daacb7a3e8 | |
5224 | .xword 0x320d86a5b6c0e788 | |
5225 | .xword 0x49f36f24248f2370 | |
5226 | .xword 0x00bcd22bf35c7d01 | |
5227 | .xword 0x75352e8a3d12802f | |
5228 | .xword 0x03b9c2109a85ab49 | |
5229 | .xword 0x0d6a2726552faab2 | |
5230 | .xword 0x39c6731d952bbc41 | |
5231 | .xword 0xe06a960302aa99dd | |
5232 | .xword 0xf43f98b5674444dd | |
5233 | .xword 0xcee3b67bba278369 | |
5234 | .xword 0xb84117c6fa4f7a40 | |
5235 | .xword 0x449e54f3952c863d | |
5236 | .xword 0xa1d996736d9bacea | |
5237 | .xword 0xbfbf844ea22a0115 | |
5238 | .xword 0x6355fbc9c086e3ff | |
5239 | .xword 0x9af137ecd9a07953 | |
5240 | .xword 0x79679681fb016797 | |
5241 | .xword 0x578f6fcdd5467535 | |
5242 | .xword 0x89346eea14bbef93 | |
5243 | .xword 0xb6ffc32941291d6b | |
5244 | .xword 0x4a5b1b2760835d4d | |
5245 | .xword 0xfe31a9e016e6912a | |
5246 | .xword 0xd57a67acfaa3b5f5 | |
5247 | .xword 0xc109ae9a89929cf4 | |
5248 | .xword 0xfefca060b446c3d0 | |
5249 | .xword 0xe4447eb45f65d195 | |
5250 | .xword 0x4750accb6ac03571 | |
5251 | .xword 0x69be7a13d289a539 | |
5252 | .xword 0x0b0d67f7f78f3f8a | |
5253 | .xword 0x3a747861dedce29d | |
5254 | .xword 0x8ed54edfc6cb58c3 | |
5255 | .xword 0x9750a0ff068e3de5 | |
5256 | .xword 0x1c4869963953b382 | |
5257 | .xword 0xd8706f74919d9457 | |
5258 | .xword 0xfeed80dd383431d3 | |
5259 | .xword 0x821a8f50a8db984b | |
5260 | .xword 0xd0ccce9f5cad8915 | |
5261 | .xword 0xe902501a2f5f00aa | |
5262 | .xword 0x3d54ed1bf386ef2b | |
5263 | .xword 0x1d62ab50e483842b | |
5264 | .xword 0x26e116791d05a720 | |
5265 | .xword 0xb08b58567b8abf2c | |
5266 | .xword 0xf05f38aa63c9b99e | |
5267 | .xword 0xe7185e43abdc035a | |
5268 | .xword 0x88963f4003243b16 | |
5269 | .xword 0xa49a3a42d0e47865 | |
5270 | .xword 0xb0f311b23dcb9d2a | |
5271 | .xword 0x9fc13638b4b6a9b2 | |
5272 | .xword 0x90620d5882aa7088 | |
5273 | .xword 0x59ac6ae4cfbb8dbf | |
5274 | .xword 0x2626f0e07b8596d8 | |
5275 | .xword 0x96e61c7d518811a9 | |
5276 | .xword 0xd95d106925011a02 | |
5277 | .xword 0xcb971b1bc55b8470 | |
5278 | .xword 0x5fbdecc6d6f3511d | |
5279 | .xword 0x0809e995b5911c86 | |
5280 | .xword 0xb3fd05f3024abaf9 | |
5281 | .xword 0x4b190185b04d16f3 | |
5282 | .xword 0xe89806f69accc37c | |
5283 | .xword 0xe2d8f5e526631e27 | |
5284 | .xword 0x68f8bfeb3546085c | |
5285 | .xword 0x409534c7c8e5e1a8 | |
5286 | .xword 0xb59ec71a6bc48669 | |
5287 | .xword 0x12234c4139bfd105 | |
5288 | .xword 0x3ccca4a50c261309 | |
5289 | .xword 0x2c9ffcfe37168204 | |
5290 | .xword 0xc773c2471571f045 | |
5291 | .xword 0xfe37a4cc943695c7 | |
5292 | .xword 0x87c14a07fc5c94f2 | |
5293 | .xword 0xc063e4a963421906 | |
5294 | .xword 0xe9a714ae912c8b2f | |
5295 | .xword 0x13a5e17db0b1a81d | |
5296 | .xword 0xa07f57ee0462050d | |
5297 | .xword 0xd00761ae12bef426 | |
5298 | .xword 0x0fd07023088e8630 | |
5299 | .xword 0xaca9cf37b19f2256 | |
5300 | .xword 0xa20cdb794f84f008 | |
5301 | .xword 0xeab4a11ede1ddd4c | |
5302 | .xword 0xa618b29cbc2dc00f | |
5303 | .xword 0xb2155aeb1e46434c | |
5304 | .xword 0xecce9a1f96042294 | |
5305 | .xword 0xe9a88659ad529edc | |
5306 | .xword 0x1cfe3b3e2d0c98f5 | |
5307 | .xword 0xca2d4c2dd32479a5 | |
5308 | .xword 0x3318209546978388 | |
5309 | .xword 0xf19020d2c8eadce8 | |
5310 | .xword 0xacc1d1efa2c4aed5 | |
5311 | .xword 0x6dfbffde0a3feaa5 | |
5312 | .xword 0x54e6a0212a5d1196 | |
5313 | .xword 0x1a1576a3f0658034 | |
5314 | .xword 0x1b0c7d58bf0368b2 | |
5315 | .xword 0x7151b66ab45b1854 | |
5316 | .xword 0xf758d4f527c8c6b1 | |
5317 | .xword 0xd47e4b6926e76f20 | |
5318 | .xword 0x2c6da78089cc7c89 | |
5319 | .xword 0x9597e6186a8c5feb | |
5320 | .xword 0xd52aae214acd437b | |
5321 | .xword 0x9b87e569e7308c30 | |
5322 | .xword 0x262b2fe5c07a2ccb | |
5323 | .xword 0xa39074b8d985ecb9 | |
5324 | .xword 0x5ddc5b839129e0e9 | |
5325 | .xword 0xd18b4e2a68ab0afb | |
5326 | .xword 0x4435fd8b66a810ea | |
5327 | .xword 0x6393f2e8820936db | |
5328 | .xword 0x4e874d84f3c1e466 | |
5329 | .xword 0x9eb1174aab0ce603 | |
5330 | .xword 0x39beb5f831cdb59f | |
5331 | .xword 0xf83c320383eec271 | |
5332 | .xword 0x07644a2b9995e046 | |
5333 | .xword 0xdf7d1bf0ac7989b3 | |
5334 | .xword 0x8ee3340fa50aed2e | |
5335 | .xword 0xf08c41da548d0a33 | |
5336 | .xword 0xaa70d3f679e56758 | |
5337 | .xword 0xfb5209b92cd340e7 | |
5338 | .xword 0x193d7200dc11aa7c | |
5339 | .xword 0x00c1ddcba1b4f9da | |
5340 | .xword 0xdc467f0e7b8737e3 | |
5341 | .xword 0x31955a398160298e | |
5342 | .xword 0xa69920c548d90564 | |
5343 | .xword 0x87cad6fc2d03b3b3 | |
5344 | ||
5345 | .global wdog_2_ext | |
5346 | # 9 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
5347 | .global wdog_2_ext | |
5348 | ||
5349 | SECTION .HTRAPS | |
5350 | .text | |
5351 | htrap_5_ext: | |
5352 | rd %pc, %l2 | |
5353 | inc %l3 | |
5354 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 | |
5355 | rdpr %tl, %l3 | |
5356 | rdpr %tstate, %l4 | |
5357 | rdhpr %htstate, %l5 | |
5358 | or %l5, 0x4, %l5 | |
5359 | inc %l3 | |
5360 | wrpr %l3, %tl | |
5361 | wrpr %l2, %tpc | |
5362 | add %l2, 4, %l2 | |
5363 | wrpr %l2, %tnpc | |
5364 | wrpr %l4, %tstate | |
5365 | wrhpr %l5, %htstate | |
5366 | retry | |
5367 | htrap_5_ext_done: | |
5368 | done | |
5369 | ||
5370 | wdog_2_ext: | |
5371 | mov 0x1f, %l1 | |
5372 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
5373 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
5374 | ! If TT != 2, then goto trap handler | |
5375 | rdpr %tt, %l1 | |
5376 | cmp %l1, 0x2 | |
5377 | bne wdog_2_goto_handler | |
5378 | nop | |
5379 | ! else done | |
5380 | done | |
5381 | wdog_2_goto_handler: | |
5382 | rdhpr %htba, %l2 | |
5383 | sllx %l1, 5, %l1 | |
5384 | add %l1, %l2, %l2 | |
5385 | jmp %l2 | |
5386 | nop | |
5387 | # 51 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
5388 | ! Red mode other reset handler | |
5389 | ! Get htba, and tt and make trap address | |
5390 | ! Jump to trap handler .. | |
5391 | ||
5392 | SECTION .RED_SEC | |
5393 | .text | |
5394 | red_other_ext: | |
5395 | ! IF TL=6, shift stack by one .. | |
5396 | rdpr %tl, %l1 | |
5397 | cmp %l1, 6 | |
5398 | be start_tsa_shift | |
5399 | nop | |
5400 | ||
5401 | continue_red_other: | |
5402 | mov 0x1f, %l1 | |
5403 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
5404 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
5405 | ||
5406 | rdpr %tt, %l1 | |
5407 | sllx %l1, 5, %l1 | |
5408 | rdhpr %htba, %l2 | |
5409 | add %l1, %l2, %l2 | |
5410 | rdhpr %hpstate, %l1 | |
5411 | jmp %l2 | |
5412 | wrhpr %l1, 0x20, %hpstate | |
5413 | nop | |
5414 | ||
5415 | wdog_red_ext: | |
5416 | ! Shift stack down by 1 ... | |
5417 | rdpr %tl, %l1 | |
5418 | start_tsa_shift: | |
5419 | mov 0x2, %l2 | |
5420 | ||
5421 | tsa_shift: | |
5422 | wrpr %l2, %tl | |
5423 | rdpr %tt, %l3 | |
5424 | rdpr %tpc, %l4 | |
5425 | rdpr %tnpc, %l5 | |
5426 | rdpr %tstate, %l6 | |
5427 | rdhpr %htstate, %l7 | |
5428 | dec %l2 | |
5429 | wrpr %l2, %tl | |
5430 | wrpr %l3, %tt | |
5431 | wrpr %l4, %tpc | |
5432 | wrpr %l5, %tnpc | |
5433 | wrpr %l6, %tstate | |
5434 | wrhpr %l7, %htstate | |
5435 | add %l2, 2, %l2 | |
5436 | cmp %l2, %l1 | |
5437 | ble tsa_shift | |
5438 | nop | |
5439 | tsa_shift_done: | |
5440 | dec %l1 | |
5441 | wrpr %l1, %tl | |
5442 | ||
5443 | ! If TT != 2, then goto trap handler | |
5444 | rdpr %tt, %l1 | |
5445 | ||
5446 | cmp %l1, 0x2 | |
5447 | bne continue_red_other | |
5448 | nop | |
5449 | ! else done | |
5450 | mov 0x1f, %l1 | |
5451 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
5452 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
5453 | done | |
5454 | # 332 "diag.j" | |
5455 | ||
5456 | ||
5457 | ||
5458 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x000000000038c000 | |
5459 | attr_text { | |
5460 | Name = .MyHTRAPS_0, | |
5461 | RA = 0x0000000000380000, | |
5462 | PA = ra2pa(0x0000000000380000,0), | |
5463 | part_0_ctx_zero_tsb_config_0, | |
5464 | part_0_ctx_nonzero_tsb_config_0, | |
5465 | TTE_G = 1, | |
5466 | TTE_Context = 0, | |
5467 | TTE_V = 1, | |
5468 | TTE_Size = 0, | |
5469 | TTE_NFO = 0, | |
5470 | TTE_IE = 0, | |
5471 | TTE_Soft2 = 0, | |
5472 | TTE_Diag = 0, | |
5473 | TTE_Soft = 0, | |
5474 | TTE_L = 0, | |
5475 | TTE_CP = 1, | |
5476 | TTE_CV = 0, | |
5477 | TTE_E = 0, | |
5478 | TTE_P = 1, | |
5479 | TTE_W = 0, | |
5480 | TTE_X = 1 | |
5481 | } | |
5482 | ||
5483 | ||
5484 | attr_data { | |
5485 | Name = .MyHTRAPS_0, | |
5486 | RA = 0x000000000038c000, | |
5487 | PA = ra2pa(0x000000000038c000,0), | |
5488 | part_0_ctx_zero_tsb_config_0, | |
5489 | part_0_ctx_nonzero_tsb_config_0, | |
5490 | TTE_G = 1, | |
5491 | TTE_Context = 0, | |
5492 | TTE_V = 1, | |
5493 | TTE_Size = 0, | |
5494 | TTE_NFO = 0, | |
5495 | TTE_IE = 0, | |
5496 | TTE_Soft2 = 0, | |
5497 | TTE_Diag = 0, | |
5498 | TTE_Soft = 0, | |
5499 | TTE_L = 0, | |
5500 | TTE_CP = 1, | |
5501 | TTE_CV = 0, | |
5502 | TTE_E = 0, | |
5503 | TTE_P = 1, | |
5504 | TTE_W = 0 | |
5505 | } | |
5506 | ||
5507 | ||
5508 | attr_text { | |
5509 | Name = .MyHTRAPS_0, | |
5510 | hypervisor | |
5511 | } | |
5512 | ||
5513 | ||
5514 | attr_data { | |
5515 | Name = .MyHTRAPS_0, | |
5516 | hypervisor | |
5517 | } | |
5518 | ||
5519 | #include "htraps.s" | |
5520 | #include "tlu_htraps_ext.s" | |
5521 | ||
5522 | ||
5523 | ||
5524 | SECTION .MyHTRAPS_1 TEXT_VA = 0x0000000000390000, DATA_VA = 0x000000000039c000 | |
5525 | attr_text { | |
5526 | Name = .MyHTRAPS_1, | |
5527 | RA = 0x0000000000390000, | |
5528 | PA = ra2pa(0x0000000000390000,0), | |
5529 | part_0_ctx_zero_tsb_config_0, | |
5530 | part_0_ctx_nonzero_tsb_config_0, | |
5531 | TTE_G = 1, | |
5532 | TTE_Context = 0, | |
5533 | TTE_V = 1, | |
5534 | TTE_Size = 0, | |
5535 | TTE_NFO = 0, | |
5536 | TTE_IE = 0, | |
5537 | TTE_Soft2 = 0, | |
5538 | TTE_Diag = 0, | |
5539 | TTE_Soft = 0, | |
5540 | TTE_L = 0, | |
5541 | TTE_CP = 1, | |
5542 | TTE_CV = 0, | |
5543 | TTE_E = 0, | |
5544 | TTE_P = 1, | |
5545 | TTE_W = 0, | |
5546 | TTE_X = 1 | |
5547 | } | |
5548 | ||
5549 | ||
5550 | attr_data { | |
5551 | Name = .MyHTRAPS_1, | |
5552 | RA = 0x000000000039c000, | |
5553 | PA = ra2pa(0x000000000039c000,0), | |
5554 | part_0_ctx_zero_tsb_config_0, | |
5555 | part_0_ctx_nonzero_tsb_config_0, | |
5556 | TTE_G = 1, | |
5557 | TTE_Context = 0, | |
5558 | TTE_V = 1, | |
5559 | TTE_Size = 0, | |
5560 | TTE_NFO = 0, | |
5561 | TTE_IE = 0, | |
5562 | TTE_Soft2 = 0, | |
5563 | TTE_Diag = 0, | |
5564 | TTE_Soft = 0, | |
5565 | TTE_L = 0, | |
5566 | TTE_CP = 1, | |
5567 | TTE_CV = 0, | |
5568 | TTE_E = 0, | |
5569 | TTE_P = 1, | |
5570 | TTE_W = 0 | |
5571 | } | |
5572 | ||
5573 | ||
5574 | attr_text { | |
5575 | Name = .MyHTRAPS_1, | |
5576 | hypervisor | |
5577 | } | |
5578 | ||
5579 | ||
5580 | attr_data { | |
5581 | Name = .MyHTRAPS_1, | |
5582 | hypervisor | |
5583 | } | |
5584 | ||
5585 | #include "htraps.s" | |
5586 | #include "tlu_htraps_ext.s" | |
5587 | ||
5588 | ||
5589 | ||
5590 | SECTION .MyHTRAPS_2 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003ac000 | |
5591 | attr_text { | |
5592 | Name = .MyHTRAPS_2, | |
5593 | RA = 0x00000000003a0000, | |
5594 | PA = ra2pa(0x00000000003a0000,0), | |
5595 | part_0_ctx_zero_tsb_config_0, | |
5596 | part_0_ctx_nonzero_tsb_config_0, | |
5597 | TTE_G = 1, | |
5598 | TTE_Context = 0, | |
5599 | TTE_V = 1, | |
5600 | TTE_Size = 0, | |
5601 | TTE_NFO = 0, | |
5602 | TTE_IE = 0, | |
5603 | TTE_Soft2 = 0, | |
5604 | TTE_Diag = 0, | |
5605 | TTE_Soft = 0, | |
5606 | TTE_L = 0, | |
5607 | TTE_CP = 1, | |
5608 | TTE_CV = 0, | |
5609 | TTE_E = 0, | |
5610 | TTE_P = 1, | |
5611 | TTE_W = 0, | |
5612 | TTE_X = 1 | |
5613 | } | |
5614 | ||
5615 | ||
5616 | attr_data { | |
5617 | Name = .MyHTRAPS_2, | |
5618 | RA = 0x00000000003ac000, | |
5619 | PA = ra2pa(0x00000000003ac000,0), | |
5620 | part_0_ctx_zero_tsb_config_0, | |
5621 | part_0_ctx_nonzero_tsb_config_0, | |
5622 | TTE_G = 1, | |
5623 | TTE_Context = 0, | |
5624 | TTE_V = 1, | |
5625 | TTE_Size = 0, | |
5626 | TTE_NFO = 0, | |
5627 | TTE_IE = 0, | |
5628 | TTE_Soft2 = 0, | |
5629 | TTE_Diag = 0, | |
5630 | TTE_Soft = 0, | |
5631 | TTE_L = 0, | |
5632 | TTE_CP = 1, | |
5633 | TTE_CV = 0, | |
5634 | TTE_E = 0, | |
5635 | TTE_P = 1, | |
5636 | TTE_W = 0 | |
5637 | } | |
5638 | ||
5639 | ||
5640 | attr_text { | |
5641 | Name = .MyHTRAPS_2, | |
5642 | hypervisor | |
5643 | } | |
5644 | ||
5645 | ||
5646 | attr_data { | |
5647 | Name = .MyHTRAPS_2, | |
5648 | hypervisor | |
5649 | } | |
5650 | ||
5651 | #include "htraps.s" | |
5652 | #include "tlu_htraps_ext.s" | |
5653 | ||
5654 | ||
5655 | ||
5656 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000000003b0000, DATA_VA = 0x00000000003bc000 | |
5657 | attr_text { | |
5658 | Name = .MyHTRAPS_3, | |
5659 | RA = 0x00000000003b0000, | |
5660 | PA = ra2pa(0x00000000003b0000,0), | |
5661 | part_0_ctx_zero_tsb_config_0, | |
5662 | part_0_ctx_nonzero_tsb_config_0, | |
5663 | TTE_G = 1, | |
5664 | TTE_Context = 0, | |
5665 | TTE_V = 1, | |
5666 | TTE_Size = 0, | |
5667 | TTE_NFO = 0, | |
5668 | TTE_IE = 0, | |
5669 | TTE_Soft2 = 0, | |
5670 | TTE_Diag = 0, | |
5671 | TTE_Soft = 0, | |
5672 | TTE_L = 0, | |
5673 | TTE_CP = 1, | |
5674 | TTE_CV = 0, | |
5675 | TTE_E = 0, | |
5676 | TTE_P = 1, | |
5677 | TTE_W = 0, | |
5678 | TTE_X = 1 | |
5679 | } | |
5680 | ||
5681 | ||
5682 | attr_data { | |
5683 | Name = .MyHTRAPS_3, | |
5684 | RA = 0x00000000003bc000, | |
5685 | PA = ra2pa(0x00000000003bc000,0), | |
5686 | part_0_ctx_zero_tsb_config_0, | |
5687 | part_0_ctx_nonzero_tsb_config_0, | |
5688 | TTE_G = 1, | |
5689 | TTE_Context = 0, | |
5690 | TTE_V = 1, | |
5691 | TTE_Size = 0, | |
5692 | TTE_NFO = 0, | |
5693 | TTE_IE = 0, | |
5694 | TTE_Soft2 = 0, | |
5695 | TTE_Diag = 0, | |
5696 | TTE_Soft = 0, | |
5697 | TTE_L = 0, | |
5698 | TTE_CP = 1, | |
5699 | TTE_CV = 0, | |
5700 | TTE_E = 0, | |
5701 | TTE_P = 1, | |
5702 | TTE_W = 0 | |
5703 | } | |
5704 | ||
5705 | ||
5706 | attr_text { | |
5707 | Name = .MyHTRAPS_3, | |
5708 | hypervisor | |
5709 | } | |
5710 | ||
5711 | ||
5712 | attr_data { | |
5713 | Name = .MyHTRAPS_3, | |
5714 | hypervisor | |
5715 | } | |
5716 | ||
5717 | #include "htraps.s" | |
5718 | #include "tlu_htraps_ext.s" | |
5719 | ||
5720 | ||
5721 | ||
5722 | ||
5723 | ||
5724 | SECTION .MyTRAPS_0 TEXT_VA = 0x00000000003c0000, DATA_VA = 0x00000000003cc000 | |
5725 | attr_text { | |
5726 | Name = .MyTRAPS_0, | |
5727 | RA = 0x00000000003c0000, | |
5728 | PA = ra2pa(0x00000000003c0000,0), | |
5729 | part_0_ctx_zero_tsb_config_0, | |
5730 | part_0_ctx_nonzero_tsb_config_0, | |
5731 | TTE_G = 1, | |
5732 | TTE_Context = 0, | |
5733 | TTE_V = 1, | |
5734 | TTE_Size = 0, | |
5735 | TTE_NFO = 0, | |
5736 | TTE_IE = 0, | |
5737 | TTE_Soft2 = 0, | |
5738 | TTE_Diag = 0, | |
5739 | TTE_Soft = 0, | |
5740 | TTE_L = 0, | |
5741 | TTE_CP = 1, | |
5742 | TTE_CV = 0, | |
5743 | TTE_E = 0, | |
5744 | TTE_P = 1, | |
5745 | TTE_W = 0, | |
5746 | TTE_X = 1 | |
5747 | } | |
5748 | ||
5749 | ||
5750 | attr_data { | |
5751 | Name = .MyTRAPS_0, | |
5752 | RA = 0x00000000003cc000, | |
5753 | PA = ra2pa(0x00000000003cc000,0), | |
5754 | part_0_ctx_zero_tsb_config_0, | |
5755 | part_0_ctx_nonzero_tsb_config_0, | |
5756 | TTE_G = 1, | |
5757 | TTE_Context = 0, | |
5758 | TTE_V = 1, | |
5759 | TTE_Size = 0, | |
5760 | TTE_NFO = 0, | |
5761 | TTE_IE = 0, | |
5762 | TTE_Soft2 = 0, | |
5763 | TTE_Diag = 0, | |
5764 | TTE_Soft = 0, | |
5765 | TTE_L = 0, | |
5766 | TTE_CP = 1, | |
5767 | TTE_CV = 0, | |
5768 | TTE_E = 0, | |
5769 | TTE_P = 1, | |
5770 | TTE_W = 0 | |
5771 | } | |
5772 | ||
5773 | ||
5774 | attr_text { | |
5775 | Name = .MyTRAPS_0, | |
5776 | hypervisor | |
5777 | } | |
5778 | ||
5779 | ||
5780 | attr_data { | |
5781 | Name = .MyTRAPS_0, | |
5782 | hypervisor | |
5783 | } | |
5784 | ||
5785 | #include "traps.s" | |
5786 | ||
5787 | ||
5788 | ||
5789 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003d0000, DATA_VA = 0x00000000003dc000 | |
5790 | attr_text { | |
5791 | Name = .MyTRAPS_1, | |
5792 | RA = 0x00000000003d0000, | |
5793 | PA = ra2pa(0x00000000003d0000,0), | |
5794 | part_0_ctx_zero_tsb_config_0, | |
5795 | part_0_ctx_nonzero_tsb_config_0, | |
5796 | TTE_G = 1, | |
5797 | TTE_Context = 0, | |
5798 | TTE_V = 1, | |
5799 | TTE_Size = 0, | |
5800 | TTE_NFO = 0, | |
5801 | TTE_IE = 0, | |
5802 | TTE_Soft2 = 0, | |
5803 | TTE_Diag = 0, | |
5804 | TTE_Soft = 0, | |
5805 | TTE_L = 0, | |
5806 | TTE_CP = 1, | |
5807 | TTE_CV = 0, | |
5808 | TTE_E = 0, | |
5809 | TTE_P = 1, | |
5810 | TTE_W = 0, | |
5811 | TTE_X = 1 | |
5812 | } | |
5813 | ||
5814 | ||
5815 | attr_data { | |
5816 | Name = .MyTRAPS_1, | |
5817 | RA = 0x00000000003dc000, | |
5818 | PA = ra2pa(0x00000000003dc000,0), | |
5819 | part_0_ctx_zero_tsb_config_0, | |
5820 | part_0_ctx_nonzero_tsb_config_0, | |
5821 | TTE_G = 1, | |
5822 | TTE_Context = 0, | |
5823 | TTE_V = 1, | |
5824 | TTE_Size = 0, | |
5825 | TTE_NFO = 0, | |
5826 | TTE_IE = 0, | |
5827 | TTE_Soft2 = 0, | |
5828 | TTE_Diag = 0, | |
5829 | TTE_Soft = 0, | |
5830 | TTE_L = 0, | |
5831 | TTE_CP = 1, | |
5832 | TTE_CV = 0, | |
5833 | TTE_E = 0, | |
5834 | TTE_P = 1, | |
5835 | TTE_W = 0 | |
5836 | } | |
5837 | ||
5838 | ||
5839 | attr_text { | |
5840 | Name = .MyTRAPS_1, | |
5841 | hypervisor | |
5842 | } | |
5843 | ||
5844 | ||
5845 | attr_data { | |
5846 | Name = .MyTRAPS_1, | |
5847 | hypervisor | |
5848 | } | |
5849 | ||
5850 | #include "traps.s" | |
5851 | ||
5852 | ||
5853 | ||
5854 | SECTION .MyTRAPS_2 TEXT_VA = 0x00000000003e0000, DATA_VA = 0x00000000003ec000 | |
5855 | attr_text { | |
5856 | Name = .MyTRAPS_2, | |
5857 | RA = 0x00000000003e0000, | |
5858 | PA = ra2pa(0x00000000003e0000,0), | |
5859 | part_0_ctx_zero_tsb_config_0, | |
5860 | part_0_ctx_nonzero_tsb_config_0, | |
5861 | TTE_G = 1, | |
5862 | TTE_Context = 0, | |
5863 | TTE_V = 1, | |
5864 | TTE_Size = 0, | |
5865 | TTE_NFO = 0, | |
5866 | TTE_IE = 0, | |
5867 | TTE_Soft2 = 0, | |
5868 | TTE_Diag = 0, | |
5869 | TTE_Soft = 0, | |
5870 | TTE_L = 0, | |
5871 | TTE_CP = 1, | |
5872 | TTE_CV = 0, | |
5873 | TTE_E = 0, | |
5874 | TTE_P = 1, | |
5875 | TTE_W = 0, | |
5876 | TTE_X = 1 | |
5877 | } | |
5878 | ||
5879 | ||
5880 | attr_data { | |
5881 | Name = .MyTRAPS_2, | |
5882 | RA = 0x00000000003ec000, | |
5883 | PA = ra2pa(0x00000000003ec000,0), | |
5884 | part_0_ctx_zero_tsb_config_0, | |
5885 | part_0_ctx_nonzero_tsb_config_0, | |
5886 | TTE_G = 1, | |
5887 | TTE_Context = 0, | |
5888 | TTE_V = 1, | |
5889 | TTE_Size = 0, | |
5890 | TTE_NFO = 0, | |
5891 | TTE_IE = 0, | |
5892 | TTE_Soft2 = 0, | |
5893 | TTE_Diag = 0, | |
5894 | TTE_Soft = 0, | |
5895 | TTE_L = 0, | |
5896 | TTE_CP = 1, | |
5897 | TTE_CV = 0, | |
5898 | TTE_E = 0, | |
5899 | TTE_P = 1, | |
5900 | TTE_W = 0 | |
5901 | } | |
5902 | ||
5903 | ||
5904 | attr_text { | |
5905 | Name = .MyTRAPS_2, | |
5906 | hypervisor | |
5907 | } | |
5908 | ||
5909 | ||
5910 | attr_data { | |
5911 | Name = .MyTRAPS_2, | |
5912 | hypervisor | |
5913 | } | |
5914 | ||
5915 | #include "traps.s" | |
5916 | ||
5917 | ||
5918 | ||
5919 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000000003f0000, DATA_VA = 0x00000000003fc000 | |
5920 | attr_text { | |
5921 | Name = .MyTRAPS_3, | |
5922 | RA = 0x00000000003f0000, | |
5923 | PA = ra2pa(0x00000000003f0000,0), | |
5924 | part_0_ctx_zero_tsb_config_0, | |
5925 | part_0_ctx_nonzero_tsb_config_0, | |
5926 | TTE_G = 1, | |
5927 | TTE_Context = 0, | |
5928 | TTE_V = 1, | |
5929 | TTE_Size = 0, | |
5930 | TTE_NFO = 0, | |
5931 | TTE_IE = 0, | |
5932 | TTE_Soft2 = 0, | |
5933 | TTE_Diag = 0, | |
5934 | TTE_Soft = 0, | |
5935 | TTE_L = 0, | |
5936 | TTE_CP = 1, | |
5937 | TTE_CV = 0, | |
5938 | TTE_E = 0, | |
5939 | TTE_P = 1, | |
5940 | TTE_W = 0, | |
5941 | TTE_X = 1 | |
5942 | } | |
5943 | ||
5944 | ||
5945 | attr_data { | |
5946 | Name = .MyTRAPS_3, | |
5947 | RA = 0x00000000003fc000, | |
5948 | PA = ra2pa(0x00000000003fc000,0), | |
5949 | part_0_ctx_zero_tsb_config_0, | |
5950 | part_0_ctx_nonzero_tsb_config_0, | |
5951 | TTE_G = 1, | |
5952 | TTE_Context = 0, | |
5953 | TTE_V = 1, | |
5954 | TTE_Size = 0, | |
5955 | TTE_NFO = 0, | |
5956 | TTE_IE = 0, | |
5957 | TTE_Soft2 = 0, | |
5958 | TTE_Diag = 0, | |
5959 | TTE_Soft = 0, | |
5960 | TTE_L = 0, | |
5961 | TTE_CP = 1, | |
5962 | TTE_CV = 0, | |
5963 | TTE_E = 0, | |
5964 | TTE_P = 1, | |
5965 | TTE_W = 0 | |
5966 | } | |
5967 | ||
5968 | ||
5969 | attr_text { | |
5970 | Name = .MyTRAPS_3, | |
5971 | hypervisor | |
5972 | } | |
5973 | ||
5974 | ||
5975 | attr_data { | |
5976 | Name = .MyTRAPS_3, | |
5977 | hypervisor | |
5978 | } | |
5979 | ||
5980 | #include "traps.s" | |
5981 | ||
5982 | ||
5983 | ||
5984 | #if 0 | |
5985 | #endif | |
5986 |