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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / uarch / tlu / diag / tlu_rand5_7745150.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: tlu_rand5_7745150.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38# 517 "diag.j"
39#define IMMU_SKIP_IF_NO_TTE
40#define DMMU_SKIP_IF_NO_TTE
41#define PORTABLE_CORE
42#define MAIN_PAGE_NUCLEUS_ALSO
43#define MAIN_PAGE_HV_ALSO
44#define MAIN_PAGE_VA_IS_RA_ALSO
45#define DISABLE_PART_LIMIT_CHECK
46#define MAIN_PAGE_USE_CONFIG 3
47#define PART0_Z_TSB_SIZE_3 10
48#define PART0_Z_PAGE_SIZE_3 1
49#define PART0_NZ_TSB_SIZE_3 10
50#define PART0_NZ_PAGE_SIZE_3 1
51#define PART0_Z_TSB_SIZE_1 3
52#define PART0_NZ_TSB_SIZE_1 3
53
54#define PART_0_BASE 0x0
55#define USER_PAGE_CUSTOM_MAP
56#define MAIN_BASE_TEXT_VA 0x333000000
57#define MAIN_BASE_TEXT_RA 0x033000000
58#define MAIN_BASE_DATA_VA 0x379400000
59#define MAIN_BASE_DATA_RA 0x079400000
60#define HIGHVA_HIGHNUM 0x3
61
62#d
63# 543 "diag.j"
64#undef H_HT0_Instruction_Access_MMU_Error_0x71
65#define H_HT0_Instruction_Access_MMU_Error_0x71 inst_access_mmu_error_handler
66#undef H_HT0_Instruction_access_error_0x0a
67#define H_HT0_Instruction_access_error_0x0a inst_access_error_handler
68#undef H_HT0_Internal_Processor_Error_0x29
69#define H_HT0_Internal_Processor_Error_0x29 int_proc_err_handler
70#undef H_HT0_Data_Access_MMU_Error_0x72
71#define H_HT0_Data_Access_MMU_Error_0x72 data_access_mmu_error_handler
72#undef H_HT0_Data_access_error_0x32
73#define H_HT0_Data_access_error_0x32 data_access_error_handler
74#undef H_HT0_Hw_Corrected_Error_0x63
75#define H_HT0_Hw_Corrected_Error_0x63 hw_corrected_error_handler
76#undef H_HT0_Sw_Recoverable_Error_0x40
77#define H_HT0_Sw_Recoverable_Error_0x40 sw_recoverable_error_handler
78#undef H_HT0_Store_Error_0x07
79#define H_HT0_Store_Error_0x07 store_error_handler
80
81#define DAE_SKIP_IF_SOCU_ERROR
82# 5 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
83#ifndef T_HANDLER_RAND4_1
84#define T_HANDLER_RAND4_1 b .+16;\
85 sdiv %r1, %r0, %l4;nop;nop
86#endif
87#ifndef T_HANDLER_RAND7_1
88#define T_HANDLER_RAND7_1 b .+28;\
89 pdist %f4, %f6, %f20; \
90 nop; nop ; nop; nop; illtrap
91#endif
92#ifndef T_HANDLER_RAND4_2
93#define T_HANDLER_RAND4_2 save %i7, %g0, %i7; \
94 save %i7, %g0, %i7; \
95 restore %i7, %g0, %i7;\
96 restore %i7, %g0, %i7;
97#endif
98#ifndef T_HANDLER_RAND7_2
99#define T_HANDLER_RAND7_2 b .+8 ;\
100 rdpr %pstate, %l2;\
101 b .+8 ;\
102 rdpr %tstate, %l3;\
103 b .+12 ;\
104 wrpr %l3, %r0, %tstate; nop
105#endif
106#ifndef T_HANDLER_RAND4_3
107#define T_HANDLER_RAND4_3 save %i7, %g0, %i7;\
108 restore %i7, %g0, %i7;\
109 save %i7, %g0, %i7; \
110 restore %i7, %g0, %i7;
111#endif
112#ifndef T_HANDLER_RAND7_3
113#define T_HANDLER_RAND7_3 b .+8 ;\
114 rdpr %tnpc, %l2;\
115 and %l2, 0xfc0, %l2;\
116 add %i7, %l2, %l2;\
117 stda %f16,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY ;\
118 b .+8 ;\
119 stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ;
120#endif
121#ifndef T_HANDLER_RAND4_4
122#define T_HANDLER_RAND4_4 b .+4 ; b .+4; b .+4; b .+4
123#endif
124#ifndef T_HANDLER_RAND7_4
125#define T_HANDLER_RAND7_4 b .+8;\
126 save %i7, %g0, %i7; \
127 b,a .+8;\
128 b .+12;\
129 stw %i7, [%i7];\
130 b .-8;;\
131 restore %i7, %g0, %i7;
132
133#endif
134#ifndef T_HANDLER_RAND4_5
135#define T_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\
136 sdiv %l4, %l5, %l7;\
137 add %r31, 128, %l5;\
138 stda %l4, [%i7]ASI_BLOCK_PRIMARY_LITTLE;
139#endif
140#ifndef T_HANDLER_RAND7_5
141#define T_HANDLER_RAND7_5 save %i7, %g0, %i7;\
142 rdpr %tnpc, %l2;\
143 wrpr %l2, %tpc;\
144 add %l2, 4, %l2;\
145 wrpr %l2, %tnpc;\
146 restore %i7, %g0, %i7;\
147 retry;
148#endif
149#ifndef T_HANDLER_RAND4_6
150#define T_HANDLER_RAND4_6 ldda [%r31]ASI_BLOCK_AS_IF_USER_PRIMARY, %l2;\
151 rd %fprs, %l2; \
152 wr %l2, 0x4, %fprs ;\
153 stda %f0,[%r31]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE;
154#endif
155#ifndef T_HANDLER_RAND7_6
156#define T_HANDLER_RAND7_6 umul %o4, 2, %o5;\
157 rdpr %tnpc, %l2;\
158 wrpr %l2, %tpc;\
159 add %l2, 4, %l2;\
160 wrpr %l2, %tnpc;\
161 stw %l2, [%i7];\
162 retry;
163#endif
164!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
165#ifndef HT_HANDLER_RAND4_1
166#define HT_HANDLER_RAND4_1 mov 0x80, %l3;\
167 b .+12;\
168 stxa %l3, [%l3]0x57 ;\
169 nop
170#endif
171#ifndef HT_HANDLER_RAND7_1
172#define HT_HANDLER_RAND7_1 b .+28;\
173 pdist %f4, %f4, %f20;\
174 nop; nop ; nop; nop; illtrap
175#endif
176#ifndef HT_HANDLER_RAND4_2
177#define HT_HANDLER_RAND4_2 rdpr %tstate, %l2;\
178 b .+12;\
179 wrpr %l2, 0x800, %tstate;\
180 nop;
181#endif
182#ifndef HT_HANDLER_RAND7_2
183#define HT_HANDLER_RAND7_2 b .+8 ;\
184 rdhpr %hpstate, %l2;\
185 b .+8 ;\
186 rdhpr %htstate, %l3;\
187 b .+12 ;\
188 wrhpr %l3, %r0, %htstate; nop
189#endif
190#ifndef HT_HANDLER_RAND4_3
191#define HT_HANDLER_RAND4_3 stxa %l4, [%r31]ASI_AS_IF_USER_PRIMARY;\
192 mov 0x80, %l3;\
193 stxa %l3, [%l3]0x5f ;\
194 b .+8 ;\
195 ldxa [%r31]ASI_AS_IF_USER_PRIMARY, %l4;
196#endif
197#ifndef HT_HANDLER_RAND7_3
198#define HT_HANDLER_RAND7_3 b .+8 ;\
199 rdpr %tnpc, %l2;\
200 and %l2, 0xfc0, %l2;\
201 add %i7, %l2, %l2;\
202 stda %f16,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY ;\
203 b .+8 ;\
204 stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ;
205#endif
206#ifndef HT_HANDLER_RAND4_4
207#define HT_HANDLER_RAND4_4 ldda [%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE, %l3;\
208 b .+12 ;\
209 stxa %l3, [%g0]ASI_LSU_CONTROL; nop
210#endif
211#ifndef HT_HANDLER_RAND7_4
212#define HT_HANDLER_RAND7_4 rdpr %tnpc, %l3;\
213 and %l3, 0xff, %l3;\
214 sllx %l3, 26, %l3;\
215 ldxa [%g0]0x45, %l4;\
216 or %l3, %l4, %l3 ;\
217 stxa %l3, [%g0]0x45 ;\
218 nop;
219#endif
220#ifndef HT_HANDLER_RAND4_5
221#define HT_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\
222 sdiv %l4, %l5, %l6;\
223 sdiv %l3, %l6, %l7;\
224 stda %f32, [%r31]ASI_BLOCK_PRIMARY_LITTLE;
225#endif
226#ifndef HT_HANDLER_RAND7_5
227#define HT_HANDLER_RAND7_5 save %i7, %g0, %i7;\
228 rdpr %tnpc, %l2;\
229 wrpr %l2, %tpc;\
230 add %l2, 4, %l2;\
231 wrpr %l2, %tnpc;\
232 restore %i7, %g0, %i7;\
233 retry;
234#endif
235#ifndef HT_HANDLER_RAND4_6
236#define HT_HANDLER_RAND4_6 ld [%r31], %l2;\
237 rd %fprs, %l2; \
238 wr %l2, 0x4, %fprs ;\
239 stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE;
240#endif
241#ifndef HT_HANDLER_RAND7_6
242#define HT_HANDLER_RAND7_6 rdhpr %htstate, %o4;\
243 rdpr %tnpc, %l2;\
244 wrpr %l2, %tpc;\
245 add %l2, 4, %l2;\
246 wrpr %l2, %tnpc;\
247 wrhpr %o4, %r0, %htstate;\
248 retry;
249#endif
250
251!!!!!!!!!!!!!!!!!!!!!!!!!
252!! Disable trap checking
253#define NO_TRAPCHECK
254
255! Enable Traps
256#define ENABLE_T1_Privileged_Opcode_0x11
257#define ENABLE_T1_Fp_Disabled_0x20
258#define ENABLE_HT0_Watchdog_Reset_0x02
259
260#define FILL_TRAP_RETRY
261#define SPILL_TRAP_RETRY
262#define CLEAN_WIN_RETRY
263
264#define My_RED_Mode_Other_Reset
265#define My_RED_Mode_Other_Reset \
266 ba red_other_ext;\
267 nop;retry;nop;nop;nop;nop;nop
268
269#define H_HT0_Software_Initiated_Reset_0x04
270#define SUN_H_HT0_Software_Initiated_Reset_0x04 \
271 setx Software_Reset_Handler, %g1, %g2 ;\
272 jmp %g2 ;\
273 nop
274# 198 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
275#define H_T1_Clean_Window_0x24
276#define SUN_H_T1_Clean_Window_0x24 \
277 rdpr %cleanwin, %l1;\
278 add %l1,1,%l1;\
279 wrpr %l1, %g0, %cleanwin;\
280 retry; nop; nop; nop; nop
281
282#define H_T1_Clean_Window_0x25
283#define SUN_H_T1_Clean_Window_0x25 \
284 rdpr %cleanwin, %l1;\
285 add %l1,1,%l1;\
286 wrpr %l1, %g0, %cleanwin;\
287 retry; nop; nop; nop; nop
288
289#define H_T1_Clean_Window_0x26
290#define SUN_H_T1_Clean_Window_0x26 \
291 rdpr %cleanwin, %l1;\
292 add %l1,1,%l1;\
293 wrpr %l1, %g0, %cleanwin;\
294 retry; nop; nop; nop; nop
295
296#define H_T1_Clean_Window_0x27
297#define SUN_H_T1_Clean_Window_0x27 \
298 rdpr %cleanwin, %l1;\
299 add %l1,1,%l1;\
300 wrpr %l1, %g0, %cleanwin;\
301 retry; nop; nop; nop; nop
302# 227 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
303#define H_HT0_Tag_Overflow
304#define My_HT0_Tag_Overflow \
305 HT_HANDLER_RAND7_1 ;\
306 done
307
308#define H_T0_Tag_Overflow
309#define My_T0_Tag_Overflow \
310 T_HANDLER_RAND7_2 ;\
311 done
312
313#define H_T1_Tag_Overflow_0x23
314#define SUN_H_T1_Tag_Overflow_0x23 \
315 T_HANDLER_RAND7_3 ;\
316 done
317
318#define H_T0_Window_Spill_0_Normal_Trap
319#define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
320
321#define H_T0_Window_Spill_1_Normal_Trap
322#define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
323
324#define H_T0_Window_Spill_2_Normal_Trap
325#define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
326
327#define H_T0_Window_Spill_3_Normal_Trap
328#define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
329
330#define H_T0_Window_Spill_4_Normal_Trap
331#define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
332
333#define H_T0_Window_Spill_5_Normal_Trap
334#define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
335
336#define H_T0_Window_Spill_6_Normal_Trap
337#define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
338
339#define H_T0_Window_Spill_7_Normal_Trap
340#define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
341
342#define H_T0_Window_Spill_0_Other_Trap
343#define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
344
345#define H_T0_Window_Spill_1_Other_Trap
346#define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
347
348#define H_T0_Window_Spill_2_Other_Trap
349#define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
350
351#define H_T0_Window_Spill_3_Other_Trap
352#define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
353
354#define H_T0_Window_Spill_4_Other_Trap
355#define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
356
357#define H_T0_Window_Spill_5_Other_Trap
358#define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
359
360#define H_T0_Window_Spill_6_Other_Trap
361#define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
362
363#define H_T0_Window_Spill_7_Other_Trap
364#define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
365
366#define H_T0_Window_Fill_0_Normal_Trap
367#define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
368
369#define H_T0_Window_Fill_1_Normal_Trap
370#define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
371
372#define H_T0_Window_Fill_2_Normal_Trap
373#define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
374
375#define H_T0_Window_Fill_3_Normal_Trap
376#define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
377
378#define H_T0_Window_Fill_4_Normal_Trap
379#define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
380
381#define H_T0_Window_Fill_5_Normal_Trap
382#define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
383
384#define H_T0_Window_Fill_6_Normal_Trap
385#define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
386
387#define H_T0_Window_Fill_7_Normal_Trap
388#define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
389
390#define H_T0_Window_Fill_0_Other_Trap
391#define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
392
393#define H_T0_Window_Fill_1_Other_Trap
394#define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
395
396#define H_T0_Window_Fill_2_Other_Trap
397#define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
398
399#define H_T0_Window_Fill_3_Other_Trap
400#define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
401
402#define H_T0_Window_Fill_4_Other_Trap
403#define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
404
405#define H_T0_Window_Fill_5_Other_Trap
406#define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
407
408#define H_T0_Window_Fill_6_Other_Trap
409#define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
410
411#define H_T0_Window_Fill_7_Other_Trap
412#define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
413# 339 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
414#define H_T1_Window_Spill_0_Normal_Trap
415#define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
416
417#define H_T1_Window_Spill_1_Normal_Trap
418#define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
419
420#define H_T1_Window_Spill_2_Normal_Trap
421#define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
422
423#define H_T1_Window_Spill_3_Normal_Trap
424#define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
425
426#define H_T1_Window_Spill_4_Normal_Trap
427#define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
428
429#define H_T1_Window_Spill_5_Normal_Trap
430#define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
431
432#define H_T1_Window_Spill_6_Normal_Trap
433#define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
434
435#define H_T1_Window_Spill_7_Normal_Trap
436#define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop;
437
438#define H_T1_Window_Spill_0_Other_Trap
439#define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
440
441#define H_T1_Window_Spill_1_Other_Trap
442#define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
443
444#define H_T1_Window_Spill_2_Other_Trap
445#define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
446
447#define H_T1_Window_Spill_3_Other_Trap
448#define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
449
450#define H_T1_Window_Spill_4_Other_Trap
451#define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
452
453#define H_T1_Window_Spill_5_Other_Trap
454#define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
455
456#define H_T1_Window_Spill_6_Other_Trap
457#define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
458
459#define H_T1_Window_Spill_7_Other_Trap
460#define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop;
461
462#define H_T1_Window_Fill_0_Normal_Trap
463#define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
464
465#define H_T1_Window_Fill_1_Normal_Trap
466#define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
467
468#define H_T1_Window_Fill_2_Normal_Trap
469#define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
470
471#define H_T1_Window_Fill_3_Normal_Trap
472#define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
473
474#define H_T1_Window_Fill_4_Normal_Trap
475#define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
476
477#define H_T1_Window_Fill_5_Normal_Trap
478#define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
479
480#define H_T1_Window_Fill_6_Normal_Trap
481#define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
482
483#define H_T1_Window_Fill_7_Normal_Trap
484#define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop;
485
486#define H_T1_Window_Fill_0_Other_Trap
487#define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
488
489#define H_T1_Window_Fill_1_Other_Trap
490#define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
491
492#define H_T1_Window_Fill_2_Other_Trap
493#define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
494
495#define H_T1_Window_Fill_3_Other_Trap
496#define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
497
498#define H_T1_Window_Fill_4_Other_Trap
499#define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
500
501#define H_T1_Window_Fill_5_Other_Trap
502#define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
503
504#define H_T1_Window_Fill_6_Other_Trap
505#define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
506
507#define H_T1_Window_Fill_7_Other_Trap
508#define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop;
509
510#define H_T0_Trap_Instruction_0
511#define My_T0_Trap_Instruction_0 \
512 T_HANDLER_RAND7_5 ;\
513 done;
514
515#define H_T0_Trap_Instruction_1
516#define My_T0_Trap_Instruction_1 \
517 T_HANDLER_RAND7_6 ;\
518 done;
519
520#define H_T0_Trap_Instruction_2
521#define My_T0_Trap_Instruction_2 \
522 inc %o3;\
523 umul %o3, 2, %o4;\
524 ba 1f; \
525 save %i7, %g0, %i7; \
526 2: done; \
527 nop; \
528 1: ba 2b; \
529 restore %i7, %g0, %i7
530#define H_T0_Trap_Instruction_3
531#define My_T0_Trap_Instruction_3 \
532 save %i7, %g0, %i7 ;\
533 T_HANDLER_RAND4_5;\
534 stw %o4, [%i7];\
535 restore %i7, %g0, %i7 ;\
536 done
537#define H_T0_Trap_Instruction_4
538#define My_T0_Trap_Instruction_4 \
539 T_HANDLER_RAND7_6 ;\
540 done;
541
542#define H_T0_Trap_Instruction_5
543#define My_T0_Trap_Instruction_5 \
544 T_HANDLER_RAND4_5;\
545 done;
546
547#define H_T1_Trap_Instruction_0
548#define My_T1_Trap_Instruction_0 \
549 inc %o4;\
550 umul %o4, 2, %o5;\
551 ba 3f; \
552 save %i7, %g0, %i7; \
553 4: done; \
554 nop; \
555 3: ba 4b; \
556 restore %i7, %g0, %i7
557#define H_T1_Trap_Instruction_1
558#define My_T1_Trap_Instruction_1 \
559 T_HANDLER_RAND7_3;\
560 done
561#define H_T1_Trap_Instruction_2
562#define My_T1_Trap_Instruction_2 \
563 inc %o3;\
564 umul %o3, 2, %o4;\
565 ba 5f; \
566 save %i7, %g0, %i7; \
567 6: done; \
568 nop; \
569 5: ba 6b; \
570 restore %i7, %g0, %i7
571#define H_T1_Trap_Instruction_3
572#define My_T1_Trap_Instruction_3 \
573 T_HANDLER_RAND4_1;\
574 done;
575
576#define H_T1_Trap_Instruction_4
577#define My_T1_Trap_Instruction_4 \
578 T_HANDLER_RAND7_1;\
579 done;
580#define H_T1_Trap_Instruction_5
581#define My_T1_Trap_Instruction_5 \
582 T_HANDLER_RAND7_2;\
583 done
584#define H_HT0_Trap_Instruction_0
585#define My_HT0_Trap_Instruction_0 \
586 HT_HANDLER_RAND4_1 ;\
587 done;
588#define H_HT0_Trap_Instruction_1
589#define My_HT0_Trap_Instruction_1 \
590 HT_HANDLER_RAND4_3 ;\
591 done
592#define H_HT0_Trap_Instruction_2
593#define My_HT0_Trap_Instruction_2 \
594 HT_HANDLER_RAND7_5 ;\
595 done;
596#define H_HT0_Trap_Instruction_3
597#define My_HT0_Trap_Instruction_3 \
598 HT_HANDLER_RAND4_5 ;\
599 done
600#define H_HT0_Trap_Instruction_4
601#define My_HT0_Trap_Instruction_4 \
602 HT_HANDLER_RAND7_4 ;\
603 done
604#define H_HT0_Trap_Instruction_5
605#define My_HT0_Trap_Instruction_5 \
606 ba htrap_5_ext;\
607 nop; retry;\
608 nop; nop; nop; nop; nop
609
610#define H_HT0_Mem_Address_Not_Aligned_0x34
611#define My_HT0_Mem_Address_Not_Aligned_0x34 \
612 HT_HANDLER_RAND4_2 ;\
613 done ;
614#define H_HT0_Illegal_instruction_0x10
615#define My_HT0_Illegal_instruction_0x10 \
616 HT_HANDLER_RAND4_2 ;\
617 done;
618
619#define H_HT0_DAE_so_page_0x30
620#define My_HT0_DAE_so_page_0x30 \
621 HT_HANDLER_RAND4_2;\
622 done;
623#define H_HT0_DAE_invalid_asi_0x14
624#define SUN_H_HT0_DAE_invalid_asi_0x14 \
625 HT_HANDLER_RAND4_3 ;\
626 done
627#define H_HT0_DAE_privilege_violation_0x15
628#define SUN_H_HT0_DAE_privilege_violation_0x15 \
629 HT_HANDLER_RAND4_4 ;\
630 done;
631#define H_HT0_Privileged_Action_0x37
632#define My_HT0_Privileged_Action_0x37 \
633 done; \
634 nop; nop
635#define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35
636#define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \
637 HT_HANDLER_RAND4_3 ;\
638 done
639#define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36
640#define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \
641 HT_HANDLER_RAND7_1;\
642 done
643#define H_HT0_Fp_exception_ieee_754_0x21
644#define My_HT0_Fp_exception_ieee_754_0x21 \
645 HT_HANDLER_RAND4_2 ;\
646 done
647#define H_HT0_Fp_exception_other_0x22
648#define My_HT0_Fp_exception_other_0x22 \
649 HT_HANDLER_RAND7_2 ;\
650 done
651#define H_HT0_Division_By_Zero
652#define My_HT0_Division_By_Zero \
653 HT_HANDLER_RAND4_6;\
654 done
655#define H_T0_Division_By_Zero
656#define My_T0_Division_By_Zero \
657 T_HANDLER_RAND4_3;\
658 done
659#define H_T1_Division_By_Zero_0x28
660#define My_H_T1_Division_By_Zero_0x28 \
661 T_HANDLER_RAND4_3;\
662 done
663#define H_T0_Division_By_Zero
664#define My_T0_Division_By_Zero\
665 T_HANDLER_RAND4_4 ;\
666 done
667#define H_T0_Fp_exception_ieee_754_0x21
668#define My_T0_Fp_exception_ieee_754_0x21 \
669 T_HANDLER_RAND4_3 ;\
670 done
671#define H_T1_Fp_Exception_Ieee_754_0x21
672#define My_H_T1_Fp_Exception_Ieee_754_0x21 \
673 T_HANDLER_RAND4_4 ;\
674 done
675#define H_T1_Fp_Exception_Other_0x22
676#define My_H_T1_Fp_Exception_Other_0x22 \
677 T_HANDLER_RAND4_5 ;\
678 done
679#define H_T1_Privileged_Opcode_0x11
680#define SUN_H_T1_Privileged_Opcode_0x11 \
681 T_HANDLER_RAND4_6 ;\
682 done
683
684#define H_HT0_Privileged_opcode_0x11
685#define My_HT0_Privileged_opcode_0x11 \
686 HT_HANDLER_RAND4_1;\
687 done;
688
689#define H_HT0_Fp_disabled_0x20
690#define My_HT0_Fp_disabled_0x20 \
691 mov 0x4, %l2 ;\
692 wr %l2, 0x0, %fprs ;\
693 sllx %l2, 10, %l3; \
694 rdpr %tstate, %l2;\
695 or %l2, %l3, %l2 ;\
696 stw %l2, [%i7];\
697 wrpr %l2, 0x0, %tstate;\
698 retry;
699
700#define H_T0_Fp_disabled_0x20
701#define My_T0_Fp_disabled_0x20 \
702 mov 0x4, %l2 ;\
703 wr %l2, 0x0, %fprs ;\
704 sllx %l2, 10, %l3; \
705 rdpr %tstate, %l2;\
706 or %l2, %l3, %l2 ;\
707 wrpr %l2, 0x0, %tstate;\
708 retry; nop
709
710#define H_T1_Fp_Disabled_0x20
711#define My_H_T1_Fp_Disabled_0x20 \
712 mov 0x4, %l2 ;\
713 wr %l2, 0x0, %fprs ;\
714 sllx %l2, 10, %l3; \
715 rdpr %tstate, %l2;\
716 or %l2, %l3, %l2 ;\
717 wrpr %l2, 0x0, %tstate;\
718 stw %l2, [%i7];\
719 retry
720
721#define H_HT0_Watchdog_Reset_0x02
722#define My_HT0_Watchdog_Reset_0x02 \
723 ba wdog_2_ext;\
724 nop;retry;nop;nop;nop;nop;nop
725
726#define H_T0_Privileged_opcode_0x11
727#define My_T0_Privileged_opcode_0x11 \
728 T_HANDLER_RAND4_4;\
729 done
730
731#define H_T1_Fp_exception_other_0x22
732#define My_T1_Fp_exception_other_0x22 \
733 T_HANDLER_RAND7_3 ;\
734 done;
735
736#define H_T0_Fp_exception_other_0x22
737#define My_T0_Fp_exception_other_0x22 \
738 T_HANDLER_RAND7_4;\
739 done
740
741#define H_HT0_Trap_Level_Zero_0x5f
742#define My_HT0_Trap_Level_Zero_0x5f \
743 not %g0, %r13; \
744 rdhpr %hpstate, %l3;\
745 jmp %r13;\
746 rdhpr %htstate, %l3;\
747 and %l3, 0xfe, %l3;\
748 wrhpr %l3, 0, %htstate;\
749 stw %r13, [%i7];\
750 retry
751
752#define My_Watchdog_Reset
753#define My_Watchdog_Reset \
754 ba wdog_red_ext;\
755 nop;retry;nop;nop;nop;nop;nop
756
757#define H_HT0_Control_Transfer_Instr_0x74
758#define My_H_HT0_Control_Transfer_Instr_0x74 \
759 rdpr %tstate, %l3;\
760 mov 1, %l4;\
761 sllx %l4, 20, %l4;\
762 wrpr %l3, %l4, %tstate ;\
763 retry;nop;
764
765#define H_T0_Control_Transfer_Instr_0x74
766#define My_H_T0_Control_Transfer_Instr_0x74 \
767 rdpr %tstate, %l3;\
768 mov 1, %l4;\
769 sllx %l4, 20, %l4;\
770 wrpr %l3, %l4, %tstate ;\
771 retry;nop;
772
773#define H_T1_Control_Transfer_Instr_0x74
774#define My_H_T1_Control_Transfer_Instr_0x74 \
775 rdpr %tstate, %l3;\
776 mov 1, %l4;\
777 sllx %l4, 20, %l4;\
778 wrpr %l3, %l4, %tstate ;\
779 retry;nop;
780# 707 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
781#define H_HT0_data_access_protection_0x6c
782#define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop
783
784#define H_HT0_PA_Watchpoint_0x61
785#define My_H_HT0_PA_Watchpoint_0x61 \
786 HT_HANDLER_RAND7_4;\
787 done
788
789#ifndef H_HT0_Data_access_error_0x32
790#define H_HT0_Data_access_error_0x32
791#define SUN_H_HT0_Data_access_error_0x32 \
792 done;nop
793#endif
794# 722 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
795#define H_T0_VA_Watchpoint_0x62
796#define My_T0_VA_Watchpoint_0x62 \
797 T_HANDLER_RAND7_5;\
798 done
799
800#define H_T1_VA_Watchpoint_0x62
801#define SUN_H_T1_VA_Watchpoint_0x62 \
802 T_HANDLER_RAND7_3;\
803 done
804
805#define H_HT0_VA_Watchpoint_0x62
806#define My_H_HT0_VA_Watchpoint_0x62 \
807 HT_HANDLER_RAND7_5;\
808 done
809
810#define H_HT0_Instruction_VA_Watchpoint_0x75
811#define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \
812 done;
813
814#define H_HT0_Instruction_Breakpoint_0x76
815#define SUN_H_HT0_Instruction_Breakpoint_0x76 \
816 rdhpr %htstate, %g1;\
817 wrhpr %g1, 0x400, %htstate;\
818 retry;nop
819# 748 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
820#define H_HT0_Instruction_address_range_0x0d
821#define SUN_H_HT0_Instruction_address_range_0x0d \
822 HT_HANDLER_RAND4_1;\
823 done;
824
825#define H_HT0_Instruction_real_range_0x0e
826#define SUN_H_HT0_Instruction_real_range_0x0e \
827 HT_HANDLER_RAND4_1;\
828 done;
829
830#define H_HT0_mem_real_range_0x2d
831#define SUN_H_HT0_mem_real_range_0x2d \
832 HT_HANDLER_RAND4_2;\
833 done;
834# 764 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
835#define H_HT0_mem_address_range_0x2e
836#define SUN_H_HT0_mem_address_range_0x2e \
837 HT_HANDLER_RAND4_3;\
838 done;
839
840#define H_HT0_DAE_nc_page_0x16
841#define SUN_H_HT0_DAE_nc_page_0x16 \
842 HT_HANDLER_RAND4_4;\
843 done;
844
845#define H_HT0_DAE_nfo_page_0x17
846#define SUN_H_HT0_DAE_nfo_page_0x17 \
847 HT_HANDLER_RAND4_5;\
848 done;
849# 780 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
850#define H_HT0_IAE_unauth_access_0x0b
851#define SUN_H_HT0_IAE_unauth_access_0x0b \
852 HT_HANDLER_RAND7_3;\
853 done;
854# 786 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
855#define H_HT0_IAE_nfo_page_0x0c
856#define SUN_H_HT0_IAE_nfo_page_0x0c \
857 HT_HANDLER_RAND7_6;\
858 done;
859# 792 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
860#define H_HT0_Reserved_0x3b
861#define SUN_H_HT0_Reserved_0x3b \
862 mov 0x80, %l3;\
863 stxa %l3, [%l3]0x5f ;\
864 stxa %l3, [%l3]0x57 ;\
865 done;
866# 802 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_handlers.s"
867#define H_HT0_IAE_privilege_violation_0x08
868#define My_HT0_IAE_privilege_violation_0x08 \
869 HT_HANDLER_RAND7_2;\
870 done;
871
872#ifndef H_HT0_Instruction_Access_MMU_Error_0x71
873#define H_HT0_Instruction_Access_MMU_Error_0x71
874#define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \
875 mov 0x80, %l3;\
876 stxa %l3, [%l3]0x5f ;\
877 stxa %l3, [%l3]0x57 ;\
878 retry;
879#endif
880
881#ifndef H_HT0_Data_Access_MMU_Error_0x72
882#define H_HT0_Data_Access_MMU_Error_0x72
883#define SUN_H_HT0_Data_Access_MMU_Error_0x72 \
884 mov 0x80, %l3;\
885 stxa %l3, [%l3]0x5f ;\
886 stxa %l3, [%l3]0x57 ;\
887 retry;
888#endif
889
890!!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!!
891# 12 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_intr_handlers.s"
892!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
893!!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!!
894
895#ifndef INT_HANDLER_RAND4_1
896#define INT_HANDLER_RAND4_1 retry; nop; nop; nop
897#endif
898#ifndef INT_HANDLER_RAND7_1
899#define INT_HANDLER_RAND7_1 mov 0x20,%g1; mov 1, %g2;stxa %g2,[%g1]0x40
900#endif
901#ifndef INT_HANDLER_RAND4_2
902#define INT_HANDLER_RAND4_2 retry; nop; nop; nop
903#endif
904#ifndef INT_HANDLER_RAND7_2
905#define INT_HANDLER_RAND7_2 mov 0x80,%g1;stxa %g0,[%g1]0x40
906#endif
907#ifndef INT_HANDLER_RAND4_3
908#define INT_HANDLER_RAND4_3 retry; nop; nop; nop
909#endif
910#ifndef INT_HANDLER_RAND7_3
911#define INT_HANDLER_RAND7_3 retry; nop; nop; nop ; nop; nop; nop
912#endif
913#define H_HT0_Externally_Initiated_Reset_0x03
914#define SUN_H_HT0_Externally_Initiated_Reset_0x03 \
915 ldxa [%g0] ASI_LSU_CTL_REG, %g1; \
916 set cregs_lsu_ctl_reg_r64, %g1; \
917 stxa %g1, [%g0] ASI_LSU_CTL_REG; \
918 retry;nop
919
920#define My_External_Reset \
921 ldxa [%g0] ASI_LSU_CTL_REG, %l5; \
922 set cregs_lsu_ctl_reg_r64, %l5; \
923 stxa %l5, [%g0] ASI_LSU_CTL_REG; \
924 retry;nop
925
926!!!!! SPU Interrupt Handlers
927
928#define H_HT0_Control_Word_Queue_Interrupt_0x3c
929#define My_HT0_Control_Word_Queue_Interrupt_0x3c \
930 INT_HANDLER_RAND7_1 ;\
931 retry ;
932
933#define H_HT0_Modular_Arithmetic_Interrupt_0x3d
934#define My_H_HT0_Modular_Arithmetic_Interrupt_0x3d \
935 INT_HANDLER_RAND7_2 ;\
936 retry ;
937# 59 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_intr_handlers.s"
938!!!!! HW interrupt handlers
939
940#define H_HT0_Interrupt_0x60
941#define My_HT0_Interrupt_0x60 \
942 ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g5 ;\
943 ldxa [%g0] ASI_SWVR_INTR_R, %g4 ;\
944 ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\
945 INT_HANDLER_RAND4_1 ;\
946 retry;
947
948!!!!! Queue interrupt handler
949# 72 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_intr_handlers.s"
950#define H_T0_Cpu_Mondo_Trap_0x7c
951#define My_T0_Cpu_Mondo_Trap_0x7c \
952 mov 0x3c8, %g3; \
953 ldxa [%g3] 0x25, %g5; \
954 mov 0x3c0, %g3; \
955 stxa %g5, [%g3] 0x25; \
956 retry; \
957 nop; \
958 nop; \
959 nop
960
961#define H_T0_Dev_Mondo_Trap_0x7d
962#define My_T0_Dev_Mondo_Trap_0x7d \
963 mov 0x3d8, %g3; \
964 ldxa [%g3] 0x25, %g5; \
965 mov 0x3d0, %g3; \
966 stxa %g5, [%g3] 0x25; \
967 retry; \
968 nop; \
969 nop; \
970 nop
971
972#define H_T0_Resumable_Error_0x7e
973#define My_T0_Resumable_Error_0x7e \
974 mov 0x3e8, %g3; \
975 ldxa [%g3] 0x25, %g5; \
976 mov 0x3e0, %g3; \
977 stxa %g5, [%g3] 0x25; \
978 retry; \
979 nop; \
980 nop; \
981 nop
982
983#define H_T1_Cpu_Mondo_Trap_0x7c
984#define My_T1_Cpu_Mondo_Trap_0x7c \
985 mov 0x3c8, %g3; \
986 ldxa [%g3] 0x25, %g5; \
987 mov 0x3c0, %g3; \
988 stxa %g5, [%g3] 0x25; \
989 retry; \
990 nop; \
991 nop; \
992 nop
993
994#define H_T1_Dev_Mondo_Trap_0x7d
995#define My_T1_Dev_Mondo_Trap_0x7d \
996 mov 0x3d8, %g3; \
997 ldxa [%g3] 0x25, %g5; \
998 mov 0x3d0, %g3; \
999 stxa %g5, [%g3] 0x25; \
1000 retry; \
1001 nop; \
1002 nop; \
1003 nop
1004
1005#define H_T1_Resumable_Error_0x7e
1006#define My_T1_Resumable_Error_0x7e \
1007 mov 0x3e8, %g3; \
1008 ldxa [%g3] 0x25, %g5; \
1009 mov 0x3e0, %g3; \
1010 stxa %g5, [%g3] 0x25; \
1011 retry; \
1012 nop; \
1013 nop; \
1014 nop
1015
1016#define H_HT0_Reserved_0x7c
1017#define SUN_H_HT0_Reserved_0x7c \
1018 mov 0x3c8, %g3; \
1019 ldxa [%g3] 0x25, %g5; \
1020 mov 0x3c0, %g3; \
1021 stxa %g5, [%g3] 0x25; \
1022 retry; \
1023 nop; \
1024 nop; \
1025 nop
1026
1027#define H_HT0_Reserved_0x7d
1028#define SUN_H_HT0_Reserved_0x7d \
1029 mov 0x3d8, %g3; \
1030 ldxa [%g3] 0x25, %g5; \
1031 mov 0x3d0, %g3; \
1032 stxa %g5, [%g3] 0x25; \
1033 retry; \
1034 nop; \
1035 nop; \
1036 nop
1037
1038#define H_HT0_Reserved_0x7e
1039#define SUN_H_HT0_Reserved_0x7e \
1040 mov 0x3e8, %g3; \
1041 ldxa [%g3] 0x25, %g5; \
1042 mov 0x3e0, %g3; \
1043 stxa %g5, [%g3] 0x25; \
1044 retry; \
1045 nop; \
1046 nop; \
1047 nop
1048# 172 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_intr_handlers.s"
1049!!!!! Hstick-match trap handler
1050# 175 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_intr_handlers.s"
1051#define H_T0_Reserved_0x5e
1052#define My_T0_Reserved_0x5e \
1053 rdhpr %hintp, %g3; \
1054 wrhpr %g3, %g3, %hintp; \
1055 retry; \
1056 nop; \
1057 nop; \
1058 nop; \
1059 nop; \
1060 nop
1061
1062#define H_HT0_Hstick_Match_0x5e
1063#define My_HT0_Hstick_Match_0x5e \
1064 rdhpr %hintp, %g3; \
1065 wrhpr %g3, %g3, %hintp; \
1066 retry; \
1067 nop; \
1068 nop; \
1069 nop; \
1070 nop; \
1071 nop
1072
1073#define H_T0_Reserved_0x5e
1074#define My_T0_Reserved_0x5e \
1075 rdhpr %hintp, %g3; \
1076 wrhpr %g3, %g3, %hintp; \
1077 retry; \
1078 nop; \
1079 nop; \
1080 nop; \
1081 nop; \
1082 nop
1083
1084#define H_T1_Reserved_0x5e
1085#define My_T1_Reserved_0x5e \
1086 rdhpr %hintp, %g3; \
1087 wrhpr %g3, %g3, %hintp; \
1088 retry; \
1089 nop; \
1090 nop; \
1091 nop; \
1092 nop; \
1093 nop
1094# 220 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_intr_handlers.s"
1095!!!!! SW interuupt handlers
1096# 223 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_intr_handlers.s"
1097#define H_T0_Interrupt_Level_14_0x4e
1098#define My_T0_Interrupt_Level_14_0x4e \
1099 rd %softint, %g3; \
1100 sethi %hi(0x14000), %g3; \
1101 or %g3, 0x1, %g3; \
1102 wr %g3, %g0, %clear_softint; \
1103 retry; \
1104 nop; \
1105 nop; \
1106 nop
1107
1108#define H_T0_Interrupt_Level_1_0x41
1109#define My_T0_Interrupt_Level_1_0x41 \
1110 rd %softint, %g3; \
1111 or %g0, 0x2, %g3; \
1112 wr %g3, %g0, %clear_softint; \
1113 retry; \
1114 nop; \
1115 nop; \
1116 nop; \
1117 nop
1118
1119#define H_T0_Interrupt_Level_2_0x42
1120#define My_T0_Interrupt_Level_2_0x42 \
1121 rd %softint, %g3; \
1122 or %g0, 0x4, %g3; \
1123 wr %g3, %g0, %clear_softint; \
1124 retry; \
1125 nop; \
1126 nop; \
1127 nop; \
1128 nop
1129
1130#define H_T0_Interrupt_Level_3_0x43
1131#define My_T0_Interrupt_Level_3_0x43 \
1132 rd %softint, %g3; \
1133 or %g0, 0x8, %g3; \
1134 wr %g3, %g0, %clear_softint; \
1135 retry; \
1136 nop; \
1137 nop; \
1138 nop; \
1139 nop
1140
1141#define H_T0_Interrupt_Level_4_0x44
1142#define My_T0_Interrupt_Level_4_0x44 \
1143 rd %softint, %g3; \
1144 or %g0, 0x10, %g3; \
1145 wr %g3, %g0, %clear_softint; \
1146 retry; \
1147 nop; \
1148 nop; \
1149 nop; \
1150 nop
1151
1152#define H_T0_Interrupt_Level_5_0x45
1153#define My_T0_Interrupt_Level_5_0x45 \
1154 rd %softint, %g3; \
1155 or %g0, 0x20, %g3; \
1156 wr %g3, %g0, %clear_softint; \
1157 retry; \
1158 nop; \
1159 nop; \
1160 nop; \
1161 nop
1162
1163#define H_T0_Interrupt_Level_6_0x46
1164#define My_T0_Interrupt_Level_6_0x46 \
1165 rd %softint, %g3; \
1166 or %g0, 0x40, %g3; \
1167 wr %g3, %g0, %clear_softint; \
1168 retry; \
1169 nop; \
1170 nop; \
1171 nop; \
1172 nop
1173
1174#define H_T0_Interrupt_Level_7_0x47
1175#define My_T0_Interrupt_Level_7_0x47 \
1176 rd %softint, %g3; \
1177 or %g0, 0x80, %g3; \
1178 wr %g3, %g0, %clear_softint; \
1179 retry; \
1180 nop; \
1181 nop; \
1182 nop; \
1183 nop
1184
1185#define H_T0_Interrupt_Level_8_0x48
1186#define My_T0_Interrupt_Level_8_0x48 \
1187 rd %softint, %g3; \
1188 or %g0, 0x100, %g3; \
1189 wr %g3, %g0, %clear_softint; \
1190 retry; \
1191 nop; \
1192 nop; \
1193 nop; \
1194 nop
1195
1196#define H_T0_Interrupt_Level_9_0x49
1197#define My_T0_Interrupt_Level_9_0x49 \
1198 rd %softint, %g3; \
1199 or %g0, 0x200, %g3; \
1200 wr %g3, %g0, %clear_softint; \
1201 retry; \
1202 nop; \
1203 nop; \
1204 nop; \
1205 nop
1206
1207#define H_T0_Interrupt_Level_10_0x4a
1208#define My_T0_Interrupt_Level_10_0x4a \
1209 rd %softint, %g3; \
1210 or %g0, 0x400, %g3; \
1211 wr %g3, %g0, %clear_softint; \
1212 retry; \
1213 nop; \
1214 nop; \
1215 nop; \
1216 nop
1217
1218#define H_T0_Interrupt_Level_11_0x4b
1219#define My_T0_Interrupt_Level_11_0x4b \
1220 rd %softint, %g3; \
1221 or %g0, 0x800, %g3; \
1222 wr %g3, %g0, %clear_softint; \
1223 retry; \
1224 nop; \
1225 nop; \
1226 nop; \
1227 nop
1228
1229#define H_T0_Interrupt_Level_12_0x4c
1230#define My_T0_Interrupt_Level_12_0x4c \
1231 rd %softint, %g3; \
1232 sethi %hi(0x1000), %g3; \
1233 wr %g3, %g0, %clear_softint; \
1234 retry; \
1235 nop; \
1236 nop; \
1237 nop; \
1238 nop
1239
1240#define H_T0_Interrupt_Level_13_0x4d
1241#define My_T0_Interrupt_Level_13_0x4d \
1242 rd %softint, %g3; \
1243 sethi %hi(0x2000), %g3; \
1244 wr %g3, %g0, %clear_softint; \
1245 retry; \
1246 nop; \
1247 nop; \
1248 nop; \
1249 nop
1250
1251#define H_T0_Interrupt_Level_15_0x4f
1252#define My_T0_Interrupt_Level_15_0x4f \
1253 sethi %hi(0x8000), %g3; \
1254 wr %g3, %g0, %clear_softint; \
1255 wr %g0, %g0, %pic;\
1256 sethi %hi(0x80040000), %g2;\
1257 rd %pcr, %g3;\
1258 andn %g3, %g2, %g3;\
1259 wr %g3, %g0, %pcr;\
1260 retry;
1261
1262
1263#define H_T1_Interrupt_Level_14_0x4e
1264#define My_T1_Interrupt_Level_14_0x4e \
1265 rd %softint, %g3; \
1266 sethi %hi(0x14000), %g3; \
1267 or %g3, 0x1, %g3; \
1268 wr %g3, %g0, %clear_softint; \
1269 retry; \
1270 nop; \
1271 nop; \
1272 nop
1273
1274#define H_T1_Interrupt_Level_1_0x41
1275#define My_T1_Interrupt_Level_1_0x41 \
1276 rd %softint, %g3; \
1277 or %g0, 0x2, %g3; \
1278 wr %g3, %g0, %clear_softint; \
1279 retry; \
1280 nop; \
1281 nop; \
1282 nop; \
1283 nop
1284
1285#define H_T1_Interrupt_Level_2_0x42
1286#define My_T1_Interrupt_Level_2_0x42 \
1287 rd %softint, %g3; \
1288 or %g0, 0x4, %g3; \
1289 wr %g3, %g0, %clear_softint; \
1290 retry; \
1291 nop; \
1292 nop; \
1293 nop; \
1294 nop
1295
1296#define H_T1_Interrupt_Level_3_0x43
1297#define My_T1_Interrupt_Level_3_0x43 \
1298 rd %softint, %g3; \
1299 or %g0, 0x8, %g3; \
1300 wr %g3, %g0, %clear_softint; \
1301 retry; \
1302 nop; \
1303 nop; \
1304 nop; \
1305 nop
1306
1307#define H_T1_Interrupt_Level_4_0x44
1308#define My_T1_Interrupt_Level_4_0x44 \
1309 rd %softint, %g3; \
1310 or %g0, 0x10, %g3; \
1311 wr %g3, %g0, %clear_softint; \
1312 retry; \
1313 nop; \
1314 nop; \
1315 nop; \
1316 nop
1317
1318#define H_T1_Interrupt_Level_5_0x45
1319#define My_T1_Interrupt_Level_5_0x45 \
1320 rd %softint, %g3; \
1321 or %g0, 0x20, %g3; \
1322 wr %g3, %g0, %clear_softint; \
1323 retry; \
1324 nop; \
1325 nop; \
1326 nop; \
1327 nop
1328
1329#define H_T1_Interrupt_Level_6_0x46
1330#define My_T1_Interrupt_Level_6_0x46 \
1331 rd %softint, %g3; \
1332 or %g0, 0x40, %g3; \
1333 wr %g3, %g0, %clear_softint; \
1334 retry; \
1335 nop; \
1336 nop; \
1337 nop; \
1338 nop
1339
1340#define H_T1_Interrupt_Level_7_0x47
1341#define My_T1_Interrupt_Level_7_0x47 \
1342 rd %softint, %g3; \
1343 or %g0, 0x80, %g3; \
1344 wr %g3, %g0, %clear_softint; \
1345 retry; \
1346 nop; \
1347 nop; \
1348 nop; \
1349 nop
1350
1351#define H_T1_Interrupt_Level_8_0x48
1352#define My_T1_Interrupt_Level_8_0x48 \
1353 rd %softint, %g3; \
1354 or %g0, 0x100, %g3; \
1355 wr %g3, %g0, %clear_softint; \
1356 retry; \
1357 nop; \
1358 nop; \
1359 nop; \
1360 nop
1361
1362#define H_T1_Interrupt_Level_9_0x49
1363#define My_T1_Interrupt_Level_9_0x49 \
1364 rd %softint, %g3; \
1365 or %g0, 0x200, %g3; \
1366 wr %g3, %g0, %clear_softint; \
1367 retry; \
1368 nop; \
1369 nop; \
1370 nop; \
1371 nop
1372
1373#define H_T1_Interrupt_Level_10_0x4a
1374#define My_T1_Interrupt_Level_10_0x4a \
1375 rd %softint, %g3; \
1376 or %g0, 0x400, %g3; \
1377 wr %g3, %g0, %clear_softint; \
1378 retry; \
1379 nop; \
1380 nop; \
1381 nop; \
1382 nop
1383
1384#define H_T1_Interrupt_Level_11_0x4b
1385#define My_T1_Interrupt_Level_11_0x4b \
1386 rd %softint, %g3; \
1387 or %g0, 0x800, %g3; \
1388 wr %g3, %g0, %clear_softint; \
1389 retry; \
1390 nop; \
1391 nop; \
1392 nop; \
1393 nop
1394
1395#define H_T1_Interrupt_Level_12_0x4c
1396#define My_T1_Interrupt_Level_12_0x4c \
1397 rd %softint, %g3; \
1398 sethi %hi(0x1000), %g3; \
1399 wr %g3, %g0, %clear_softint; \
1400 retry; \
1401 nop; \
1402 nop; \
1403 nop; \
1404 nop
1405
1406#define H_T1_Interrupt_Level_13_0x4d
1407#define My_T1_Interrupt_Level_13_0x4d \
1408 rd %softint, %g3; \
1409 sethi %hi(0x2000), %g3; \
1410 wr %g3, %g0, %clear_softint; \
1411 retry; \
1412 nop; \
1413 nop; \
1414 nop; \
1415 nop
1416
1417#define H_T1_Interrupt_Level_15_0x4f
1418#define My_T1_Interrupt_Level_15_0x4f \
1419 sethi %hi(0x8000), %g3; \
1420 wr %g3, %g0, %clear_softint; \
1421 wr %g0, %g0, %pic;\
1422 sethi %hi(0x80040000), %g2;\
1423 rd %pcr, %g3;\
1424 andn %g3, %g2, %g3;\
1425 wr %g3, %g0, %pcr;\
1426 retry;
1427
1428
1429#define H_HT0_Interrupt_Level_14_0x4e
1430#define My_HT0_Interrupt_Level_14_0x4e \
1431 rd %softint, %g3; \
1432 sethi %hi(0x14000), %g3; \
1433 or %g3, 0x1, %g3; \
1434 wr %g3, %g0, %clear_softint; \
1435 retry; \
1436 nop; \
1437 nop; \
1438 nop
1439
1440#define H_HT0_Interrupt_Level_1_0x41
1441#define My_HT0_Interrupt_Level_1_0x41 \
1442 rd %softint, %g3; \
1443 or %g0, 0x2, %g3; \
1444 wr %g3, %g0, %clear_softint; \
1445 retry; \
1446 nop; \
1447 nop; \
1448 nop; \
1449 nop
1450
1451#define H_HT0_Interrupt_Level_2_0x42
1452#define My_HT0_Interrupt_Level_2_0x42 \
1453 rd %softint, %g3; \
1454 or %g0, 0x4, %g3; \
1455 wr %g3, %g0, %clear_softint; \
1456 retry; \
1457 nop; \
1458 nop; \
1459 nop; \
1460 nop
1461
1462#define H_HT0_Interrupt_Level_3_0x43
1463#define My_HT0_Interrupt_Level_3_0x43 \
1464 rd %softint, %g3; \
1465 or %g0, 0x8, %g3; \
1466 wr %g3, %g0, %clear_softint; \
1467 retry; \
1468 nop; \
1469 nop; \
1470 nop; \
1471 nop
1472
1473#define H_HT0_Interrupt_Level_4_0x44
1474#define My_HT0_Interrupt_Level_4_0x44 \
1475 rd %softint, %g3; \
1476 or %g0, 0x10, %g3; \
1477 wr %g3, %g0, %clear_softint; \
1478 retry; \
1479 nop; \
1480 nop; \
1481 nop; \
1482 nop
1483
1484#define H_HT0_Interrupt_Level_5_0x45
1485#define My_HT0_Interrupt_Level_5_0x45 \
1486 rd %softint, %g3; \
1487 or %g0, 0x20, %g3; \
1488 wr %g3, %g0, %clear_softint; \
1489 retry; \
1490 nop; \
1491 nop; \
1492 nop; \
1493 nop
1494
1495#define H_HT0_Interrupt_Level_6_0x46
1496#define My_HT0_Interrupt_Level_6_0x46 \
1497 rd %softint, %g3; \
1498 or %g0, 0x40, %g3; \
1499 wr %g3, %g0, %clear_softint; \
1500 retry; \
1501 nop; \
1502 nop; \
1503 nop; \
1504 nop
1505
1506#define H_HT0_Interrupt_Level_7_0x47
1507#define My_HT0_Interrupt_Level_7_0x47 \
1508 rd %softint, %g3; \
1509 or %g0, 0x80, %g3; \
1510 wr %g3, %g0, %clear_softint; \
1511 retry; \
1512 nop; \
1513 nop; \
1514 nop; \
1515 nop
1516
1517#define H_HT0_Interrupt_Level_8_0x48
1518#define My_HT0_Interrupt_Level_8_0x48 \
1519 rd %softint, %g3; \
1520 or %g0, 0x100, %g3; \
1521 wr %g3, %g0, %clear_softint; \
1522 retry; \
1523 nop; \
1524 nop; \
1525 nop; \
1526 nop
1527
1528#define H_HT0_Interrupt_Level_9_0x49
1529#define My_HT0_Interrupt_Level_9_0x49 \
1530 rd %softint, %g3; \
1531 or %g0, 0x200, %g3; \
1532 wr %g3, %g0, %clear_softint; \
1533 retry; \
1534 nop; \
1535 nop; \
1536 nop; \
1537 nop
1538
1539#define H_HT0_Interrupt_Level_10_0x4a
1540#define My_HT0_Interrupt_Level_10_0x4a \
1541 rd %softint, %g3; \
1542 or %g0, 0x400, %g3; \
1543 wr %g3, %g0, %clear_softint; \
1544 retry; \
1545 nop; \
1546 nop; \
1547 nop; \
1548 nop
1549
1550#define H_HT0_Interrupt_Level_11_0x4b
1551#define My_HT0_Interrupt_Level_11_0x4b \
1552 rd %softint, %g3; \
1553 or %g0, 0x800, %g3; \
1554 wr %g3, %g0, %clear_softint; \
1555 retry; \
1556 nop; \
1557 nop; \
1558 nop; \
1559 nop
1560
1561#define H_HT0_Interrupt_Level_12_0x4c
1562#define My_HT0_Interrupt_Level_12_0x4c \
1563 rd %softint, %g3; \
1564 sethi %hi(0x1000), %g3; \
1565 wr %g3, %g0, %clear_softint; \
1566 retry; \
1567 nop; \
1568 nop; \
1569 nop; \
1570 nop
1571
1572#define H_HT0_Interrupt_Level_13_0x4d
1573#define My_HT0_Interrupt_Level_13_0x4d \
1574 rd %softint, %g3; \
1575 sethi %hi(0x2000), %g3; \
1576 wr %g3, %g0, %clear_softint; \
1577 retry; \
1578 nop; \
1579 nop; \
1580 nop; \
1581 nop
1582
1583#define H_HT0_Interrupt_Level_15_0x4f
1584#define My_HT0_Interrupt_Level_15_0x4f \
1585 sethi %hi(0x8000), %g3; \
1586 wr %g3, %g0, %clear_softint; \
1587 wr %g0, %g0, %pic;\
1588 sethi %hi(0x80040000), %g2;\
1589 rd %pcr, %g3;\
1590 andn %g3, %g2, %g3;\
1591 wr %g3, %g0, %pcr;\
1592 retry;
1593
1594# 710 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_intr_handlers.s"
1595!!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!!
1596# 565 "diag.j"
1597!# Steer towards main TBA on these errors ..
1598!# These are redefines ...
1599#undef SUN_H_HT0_DAE_nc_page_0x16
1600#define SUN_H_HT0_DAE_nc_page_0x16 \
1601 best_set_reg(0x120000, %r1, %r2);\
1602 wrpr %r0, %r2, %tba; \
1603 done;nop
1604
1605#undef SUN_H_HT0_DAE_nfo_page_0x17
1606#define SUN_H_HT0_DAE_nfo_page_0x17 \
1607 best_set_reg(0x120000, %r1, %r2);\
1608 wrpr %r0, %r2, %tba; \
1609 done;nop
1610
1611#undef SUN_H_HT0_IAE_unauth_access_0x0b
1612#define SUN_H_HT0_IAE_unauth_access_0x0b \
1613 set resolve_bad_tte, %g3;\
1614 jmp %g3;\
1615 nop
1616
1617#undef My_HT0_IAE_privilege_violation_0x08
1618#define My_HT0_IAE_privilege_violation_0x08 \
1619 set resolve_bad_tte, %g3;\
1620 jmp %g3;\
1621 nop
1622
1623#define H_HT0_Instruction_address_range_0x0d
1624#define SUN_H_HT0_Instruction_address_range_0x0d \
1625 rdpr %tpc, %g1;\
1626 rdpr %tnpc, %g2;\
1627 stw %g1, [%i7];\
1628 stw %g2, [%i7+4];\
1629 jmpl %r27+8, %r27;\
1630 fdivd %f0, %f4, %f4;\
1631 nop;
1632
1633#define H_HT0_Instruction_real_range_0x0e
1634#define SUN_H_HT0_Instruction_real_range_0x0e \
1635 rdpr %tpc, %g1;\
1636 rdpr %tnpc, %g2;\
1637 stw %g1, [%i7];\
1638 stw %g2, [%i7+4];\
1639 jmpl %r27+8, %r27;\
1640 fdivd %f0, %f4, %f4;\
1641 nop;
1642
1643#undef SUN_H_HT0_IAE_nfo_page_0x0c
1644#define SUN_H_HT0_IAE_nfo_page_0x0c \
1645 set resolve_bad_tte, %g3;\
1646 jmp %g3;\
1647 nop
1648
1649#define H_HT0_Instruction_Invalid_TSB_Entry_0x2a
1650#define SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a \
1651 set restore_range_regs, %g3;\
1652 jmp %g3;\
1653 nop
1654
1655#define H_HT0_Data_Invalid_TSB_Entry_0x2b
1656#define SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b \
1657 set restore_range_regs, %g3;\
1658 jmp %g3;\
1659 nop
1660
1661#undef FAST_BOOT
1662#include "hboot.s"
1663
1664#ifndef MULTIPASS
1665#define MULTIPASS 0
1666#endif
1667# 637 "diag.j"
1668#define LOMEIN_TEXT_VA [0x]mpeval(MAIN_BASE_TEXT_VA&0xffffffff,16)
1669#define LOMEIN_DATA_VA [0x]mpeval(MAIN_BASE_DATA_VA&0xffffffff,16)
1670changequote([, ])dnl
1671SECTION .LOMEIN TEXT_VA=LOMEIN_TEXT_VA, DATA_VA=LOMEIN_DATA_VA
1672attr_text {
1673 Name = .LOMEIN,
1674 VA= LOMEIN_TEXT_VA,
1675 RA= MAIN_BASE_TEXT_RA,
1676 PA= ra2pa2(MAIN_BASE_TEXT_RA, 0),
1677 part_0_ctx_nonzero_tsb_config_1,
1678 part_0_ctx_zero_tsb_config_1,
1679 TTE_G=1, TTE_Context=0x44, TTE_V=1,
1680 TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1681 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1,
1682 tsbonly
1683 }
1684attr_data {
1685 Name = .LOMEIN,
1686 VA= LOMEIN_DATA_VA,
1687 RA= MAIN_BASE_DATA_RA,
1688 PA= ra2pa2(MAIN_BASE_DATA_RA, 0),
1689 part_0_ctx_nonzero_tsb_config_2,
1690 part_0_ctx_zero_tsb_config_2
1691 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
1692 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1693 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
1694 tsbonly
1695 }
1696attr_data {
1697 Name = .LOMEIN,
1698 VA= LOMEIN_DATA_VA,
1699 RA= MAIN_BASE_DATA_RA,
1700 PA= ra2pa2(MAIN_BASE_DATA_RA, 0),
1701 part_0_ctx_nonzero_tsb_config_3,
1702 part_0_ctx_zero_tsb_config_3
1703 TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0,
1704 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1705 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
1706 tsbonly
1707 }
1708.text
1709.align 0x100000
1710 nop
1711.data
1712 .word 0x0
1713
1714SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA
1715attr_text {
1716 Name = .MAIN,
1717 VA=MAIN_BASE_TEXT_VA,
1718 RA= LOMEIN_TEXT_VA,
1719 PA= LOMEIN_TEXT_VA,
1720 part_0_ctx_nonzero_tsb_config_2,
1721 part_0_ctx_zero_tsb_config_2,
1722 TTE_G=1, TTE_Context=0x44, TTE_V=1,
1723 TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1724 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1,
1725 }
1726
1727attr_data {
1728 Name = .MAIN,
1729 VA=MAIN_BASE_DATA_VA
1730 RA= LOMEIN_DATA_VA,
1731 PA= LOMEIN_DATA_VA,
1732 part_0_ctx_nonzero_tsb_config_1,
1733 part_0_ctx_zero_tsb_config_1
1734 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
1735 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1736 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
1737 }
1738
1739attr_data {
1740 Name = .MAIN,
1741 VA=MAIN_BASE_DATA_VA
1742 RA= LOMEIN_DATA_VA,
1743 PA= LOMEIN_DATA_VA,
1744 part_0_ctx_nonzero_tsb_config_3,
1745 part_0_ctx_zero_tsb_config_3
1746 TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0,
1747 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1748 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
1749 tsbonly
1750 }
1751
1752attr_text {
1753 Name = .MAIN,
1754 VA=MAIN_BASE_TEXT_VA,
1755 hypervisor
1756}
1757
1758attr_data {
1759 Name = .MAIN,
1760 VA=MAIN_BASE_DATA_VA
1761 hypervisor
1762}
1763changequote(`,')dnl'
1764
1765.text
1766.global main
1767main:
1768
1769 ! Set up ld/st area per thread
1770 ta T_CHANGE_HPRIV
1771 ldxa [%g0]0x63, %o2
1772 and %o2, 0x7, %o1
1773 brnz %o1, init_start
1774 mov 0xff, %r10
1775lock_sync_thds:
1776 set sync_thr_counter4, %r23
1777#ifndef SPC
1778 and %o2, 0x38, %o2
1779 add %o2,%r23,%r23 !Core's sync counter
1780#endif
1781 st %r10, [%r23] !lock sync_thr_counter4
1782 add %r23, 64, %r23
1783 st %r10, [%r23] !lock sync_thr_counter5
1784 add %r23, 64, %r23
1785 st %r10, [%r23] !lock sync_thr_counter6
1786init_start:
1787 ta T_CHANGE_NONHPRIV
1788 umul %r9, 256, %r31
1789 setx user_data_start, %r1, %r3
1790 add %r31, %r3, %r31
1791 wr %r0, 0x4, %asi
1792
1793!Initializing integer registers
1794 ldx [%r31+0], %r0
1795 ldx [%r31+8], %r1
1796 ldx [%r31+16], %r2
1797 ldx [%r31+24], %r3
1798 ldx [%r31+32], %r4
1799 ldx [%r31+40], %r5
1800 ldx [%r31+48], %r6
1801 ldx [%r31+56], %r7
1802 ldx [%r31+64], %r8
1803 ldx [%r31+72], %r9
1804 ldx [%r31+80], %r10
1805 ldx [%r31+88], %r11
1806 ldx [%r31+96], %r12
1807 ldx [%r31+104], %r13
1808 ldx [%r31+112], %r14
1809 mov %r31, %r15
1810 ldx [%r31+128], %r16
1811 ldx [%r31+136], %r17
1812 ldx [%r31+144], %r18
1813 ldx [%r31+152], %r19
1814 ldx [%r31+160], %r20
1815 ldx [%r31+168], %r21
1816 ldx [%r31+176], %r22
1817 ldx [%r31+184], %r23
1818 ldx [%r31+192], %r24
1819 ldx [%r31+200], %r25
1820 ldx [%r31+208], %r26
1821 ldx [%r31+216], %r27
1822 ldx [%r31+224], %r28
1823 ldx [%r31+232], %r29
1824 mov 0x35, %r14
1825 mov 0xb3, %r30
1826 save %r31, %r0, %r31
1827 ldx [%r31+0], %r0
1828 ldx [%r31+8], %r1
1829 ldx [%r31+16], %r2
1830 ldx [%r31+24], %r3
1831 ldx [%r31+32], %r4
1832 ldx [%r31+40], %r5
1833 ldx [%r31+48], %r6
1834 ldx [%r31+56], %r7
1835 ldx [%r31+64], %r8
1836 ldx [%r31+72], %r9
1837 ldx [%r31+80], %r10
1838 ldx [%r31+88], %r11
1839 ldx [%r31+96], %r12
1840 ldx [%r31+104], %r13
1841 ldx [%r31+112], %r14
1842 mov %r31, %r15
1843 ldx [%r31+128], %r16
1844 ldx [%r31+136], %r17
1845 ldx [%r31+144], %r18
1846 ldx [%r31+152], %r19
1847 ldx [%r31+160], %r20
1848 ldx [%r31+168], %r21
1849 ldx [%r31+176], %r22
1850 ldx [%r31+184], %r23
1851 ldx [%r31+192], %r24
1852 ldx [%r31+200], %r25
1853 ldx [%r31+208], %r26
1854 ldx [%r31+216], %r27
1855 ldx [%r31+224], %r28
1856 ldx [%r31+232], %r29
1857 mov 0xb4, %r14
1858 mov 0xb3, %r30
1859 save %r31, %r0, %r31
1860 ldx [%r31+0], %r0
1861 ldx [%r31+8], %r1
1862 ldx [%r31+16], %r2
1863 ldx [%r31+24], %r3
1864 ldx [%r31+32], %r4
1865 ldx [%r31+40], %r5
1866 ldx [%r31+48], %r6
1867 ldx [%r31+56], %r7
1868 ldx [%r31+64], %r8
1869 ldx [%r31+72], %r9
1870 ldx [%r31+80], %r10
1871 ldx [%r31+88], %r11
1872 ldx [%r31+96], %r12
1873 ldx [%r31+104], %r13
1874 ldx [%r31+112], %r14
1875 mov %r31, %r15
1876 ldx [%r31+128], %r16
1877 ldx [%r31+136], %r17
1878 ldx [%r31+144], %r18
1879 ldx [%r31+152], %r19
1880 ldx [%r31+160], %r20
1881 ldx [%r31+168], %r21
1882 ldx [%r31+176], %r22
1883 ldx [%r31+184], %r23
1884 ldx [%r31+192], %r24
1885 ldx [%r31+200], %r25
1886 ldx [%r31+208], %r26
1887 ldx [%r31+216], %r27
1888 ldx [%r31+224], %r28
1889 ldx [%r31+232], %r29
1890 mov 0x32, %r14
1891 mov 0x34, %r30
1892 save %r31, %r0, %r31
1893 ldx [%r31+0], %r0
1894 ldx [%r31+8], %r1
1895 ldx [%r31+16], %r2
1896 ldx [%r31+24], %r3
1897 ldx [%r31+32], %r4
1898 ldx [%r31+40], %r5
1899 ldx [%r31+48], %r6
1900 ldx [%r31+56], %r7
1901 ldx [%r31+64], %r8
1902 ldx [%r31+72], %r9
1903 ldx [%r31+80], %r10
1904 ldx [%r31+88], %r11
1905 ldx [%r31+96], %r12
1906 ldx [%r31+104], %r13
1907 ldx [%r31+112], %r14
1908 mov %r31, %r15
1909 ldx [%r31+128], %r16
1910 ldx [%r31+136], %r17
1911 ldx [%r31+144], %r18
1912 ldx [%r31+152], %r19
1913 ldx [%r31+160], %r20
1914 ldx [%r31+168], %r21
1915 ldx [%r31+176], %r22
1916 ldx [%r31+184], %r23
1917 ldx [%r31+192], %r24
1918 ldx [%r31+200], %r25
1919 ldx [%r31+208], %r26
1920 ldx [%r31+216], %r27
1921 ldx [%r31+224], %r28
1922 ldx [%r31+232], %r29
1923 mov 0xb5, %r14
1924 mov 0xb3, %r30
1925 save %r31, %r0, %r31
1926 ldx [%r31+0], %r0
1927 ldx [%r31+8], %r1
1928 ldx [%r31+16], %r2
1929 ldx [%r31+24], %r3
1930 ldx [%r31+32], %r4
1931 ldx [%r31+40], %r5
1932 ldx [%r31+48], %r6
1933 ldx [%r31+56], %r7
1934 ldx [%r31+64], %r8
1935 ldx [%r31+72], %r9
1936 ldx [%r31+80], %r10
1937 ldx [%r31+88], %r11
1938 ldx [%r31+96], %r12
1939 ldx [%r31+104], %r13
1940 ldx [%r31+112], %r14
1941 mov %r31, %r15
1942 ldx [%r31+128], %r16
1943 ldx [%r31+136], %r17
1944 ldx [%r31+144], %r18
1945 ldx [%r31+152], %r19
1946 ldx [%r31+160], %r20
1947 ldx [%r31+168], %r21
1948 ldx [%r31+176], %r22
1949 ldx [%r31+184], %r23
1950 ldx [%r31+192], %r24
1951 ldx [%r31+200], %r25
1952 ldx [%r31+208], %r26
1953 ldx [%r31+216], %r27
1954 ldx [%r31+224], %r28
1955 ldx [%r31+232], %r29
1956 mov 0xb1, %r14
1957 mov 0x32, %r30
1958 save %r31, %r0, %r31
1959 ldx [%r31+0], %r0
1960 ldx [%r31+8], %r1
1961 ldx [%r31+16], %r2
1962 ldx [%r31+24], %r3
1963 ldx [%r31+32], %r4
1964 ldx [%r31+40], %r5
1965 ldx [%r31+48], %r6
1966 ldx [%r31+56], %r7
1967 ldx [%r31+64], %r8
1968 ldx [%r31+72], %r9
1969 ldx [%r31+80], %r10
1970 ldx [%r31+88], %r11
1971 ldx [%r31+96], %r12
1972 ldx [%r31+104], %r13
1973 ldx [%r31+112], %r14
1974 mov %r31, %r15
1975 ldx [%r31+128], %r16
1976 ldx [%r31+136], %r17
1977 ldx [%r31+144], %r18
1978 ldx [%r31+152], %r19
1979 ldx [%r31+160], %r20
1980 ldx [%r31+168], %r21
1981 ldx [%r31+176], %r22
1982 ldx [%r31+184], %r23
1983 ldx [%r31+192], %r24
1984 ldx [%r31+200], %r25
1985 ldx [%r31+208], %r26
1986 ldx [%r31+216], %r27
1987 ldx [%r31+224], %r28
1988 ldx [%r31+232], %r29
1989 mov 0xb3, %r14
1990 mov 0x35, %r30
1991 save %r31, %r0, %r31
1992 ldx [%r31+0], %r0
1993 ldx [%r31+8], %r1
1994 ldx [%r31+16], %r2
1995 ldx [%r31+24], %r3
1996 ldx [%r31+32], %r4
1997 ldx [%r31+40], %r5
1998 ldx [%r31+48], %r6
1999 ldx [%r31+56], %r7
2000 ldx [%r31+64], %r8
2001 ldx [%r31+72], %r9
2002 ldx [%r31+80], %r10
2003 ldx [%r31+88], %r11
2004 ldx [%r31+96], %r12
2005 ldx [%r31+104], %r13
2006 ldx [%r31+112], %r14
2007 mov %r31, %r15
2008 ldx [%r31+128], %r16
2009 ldx [%r31+136], %r17
2010 ldx [%r31+144], %r18
2011 ldx [%r31+152], %r19
2012 ldx [%r31+160], %r20
2013 ldx [%r31+168], %r21
2014 ldx [%r31+176], %r22
2015 ldx [%r31+184], %r23
2016 ldx [%r31+192], %r24
2017 ldx [%r31+200], %r25
2018 ldx [%r31+208], %r26
2019 ldx [%r31+216], %r27
2020 ldx [%r31+224], %r28
2021 ldx [%r31+232], %r29
2022 mov 0xb1, %r14
2023 mov 0x32, %r30
2024 save %r31, %r0, %r31
2025 restore
2026 restore
2027 restore
2028!Initializing float registers
2029 ldd [%r31+0], %f0
2030 ldd [%r31+16], %f2
2031 ldd [%r31+32], %f4
2032 ldd [%r31+48], %f6
2033 ldd [%r31+64], %f8
2034 ldd [%r31+80], %f10
2035 ldd [%r31+96], %f12
2036 ldd [%r31+112], %f14
2037 ldd [%r31+128], %f16
2038 ldd [%r31+144], %f18
2039 ldd [%r31+160], %f20
2040 ldd [%r31+176], %f22
2041 ldd [%r31+192], %f24
2042 ldd [%r31+208], %f26
2043 ldd [%r31+224], %f28
2044 ldd [%r31+240], %f30
2045 !! Set TPC/TNPC to diag-finish in case we get to a strange TL ..
2046 ta T_CHANGE_HPRIV
2047 setx diag_finish, %r29, %r28
2048 add %r28, 4, %r29
2049 wrpr %g0, 1, %tl
2050 wrpr %r28, %tpc
2051 wrpr %r29, %tnpc
2052 wrpr %g0, 2, %tl
2053 wrpr %r28, %tpc
2054 wrpr %r29, %tnpc
2055 wrpr %g0, 3, %tl
2056 wrpr %r28, %tpc
2057 wrpr %r29, %tnpc
2058 wrpr %g0, 4, %tl
2059 wrpr %r28, %tpc
2060 wrpr %r29, %tnpc
2061 wrpr %g0, 5, %tl
2062 wrpr %r28, %tpc
2063 wrpr %r29, %tnpc
2064 wrpr %g0, 6, %tl
2065 wrpr %r28, %tpc
2066 wrpr %r29, %tnpc
2067 wrpr %g0, 0, %tl
2068
2069 !Initializing Tick Cmprs
2070 mov 1, %g2
2071 sllx %g2, 63, %g2
2072 or %g1, %g2, %g1
2073 wrhpr %g1, %g0, %hsys_tick_cmpr
2074 wr %g1, %g0, %tick_cmpr
2075 wr %g1, %g0, %sys_tick_cmpr
2076
2077#if (MULTIPASS > 0)
2078 mov 0x38, %g1
2079 stxa %r0, [%g1]ASI_SCRATCHPAD
2080#endif
2081
2082 ! Set up fpr PMU traps
2083 set 0x1af0ccff, %g2
2084 b fork_threads
2085 wr %g2, %g0, %pcr
2086
2087common_target:
2088 nop
2089 sub %r27, 8, %r27
2090 and %r27, 8, %r12
2091 mov HIGHVA_HIGHNUM, %r11
2092 sllx %r11, 32, %r11
2093 or %r27, %r11, %r27
2094 brz,a %r12, .+8
2095 lduw [%r27], %r12 ! load jmp dest into dcache - xinval
2096 jmp %r27
2097 .word 0x9f802b92 ! 1: SIR sir 0x0b92
2098 nop
2099 jmp %r27
2100 nop
2101fork_threads:
2102 rd %tick, %r17
2103 mov 0x40, %g1
2104setup_hwtw_config:
2105 stxa %r17, [%g1]0x58
2106 ta %icc, T_RD_THID
2107! fork: source strm = 0xffffffffffffffff; target strm = 0x1
2108 cmp %o1, 0
2109 setx fork_lbl_0_1, %g2, %g3
2110 be,a .+8
2111 jmp %g3
2112 nop
2113! fork: source strm = 0xffffffffffffffff; target strm = 0x2
2114 cmp %o1, 1
2115 setx fork_lbl_0_2, %g2, %g3
2116 be,a .+8
2117 jmp %g3
2118 nop
2119! fork: source strm = 0xffffffffffffffff; target strm = 0x4
2120 cmp %o1, 2
2121 setx fork_lbl_0_3, %g2, %g3
2122 be,a .+8
2123 jmp %g3
2124 nop
2125! fork: source strm = 0xffffffffffffffff; target strm = 0x8
2126 cmp %o1, 3
2127 setx fork_lbl_0_4, %g2, %g3
2128 be,a .+8
2129 jmp %g3
2130 nop
2131! fork: source strm = 0xffffffffffffffff; target strm = 0x10
2132 cmp %o1, 4
2133 setx fork_lbl_0_5, %g2, %g3
2134 be,a .+8
2135 jmp %g3
2136 nop
2137! fork: source strm = 0xffffffffffffffff; target strm = 0x20
2138 cmp %o1, 5
2139 setx fork_lbl_0_6, %g2, %g3
2140 be,a .+8
2141 jmp %g3
2142 nop
2143! fork: source strm = 0xffffffffffffffff; target strm = 0x40
2144 cmp %o1, 6
2145 setx fork_lbl_0_7, %g2, %g3
2146 be,a .+8
2147 jmp %g3
2148 nop
2149! fork: source strm = 0xffffffffffffffff; target strm = 0x80
2150 cmp %o1, 7
2151 setx fork_lbl_0_8, %g2, %g3
2152 be,a .+8
2153 jmp %g3
2154 nop
2155.text
2156 setx join_lbl_0_0, %g1, %g2
2157 jmp %g2
2158 nop
2159.text
2160 setx join_lbl_0_0, %g1, %g2
2161 jmp %g2
2162 nop
2163fork_lbl_0_8:
2164 ta T_CHANGE_NONHPRIV
2165ibp_80_1:
2166 nop
2167 .word 0xc1bfe160 ! 1: STDFA_I stda %f0, [0x0160, %r31]
2168splash_cmpr_80_2:
2169 mov 0, %r18
2170 sllx %r18, 63, %r18
2171 rd %tick, %r17
2172 add %r17, 0x60, %r17
2173 or %r17, %r18, %r17
2174 .word 0xb3800011 ! 2: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
2175mondo_80_3:
2176 nop
2177 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
2178 ta T_CHANGE_PRIV
2179 stxa %r3, [%r0+0x3c8] %asi
2180 .word 0x9d94c010 ! 3: WRPR_WSTATE_R wrpr %r19, %r16, %wstate
2181 .word 0xe19fe0e0 ! 4: LDDFA_I ldda [%r31, 0x00e0], %f16
2182 nop
2183 ta T_CHANGE_HPRIV
2184 mov 0x80+1, %r10
2185 set sync_thr_counter5, %r23
2186#ifndef SPC
2187 ldxa [%g0]0x63, %o1
2188 and %o1, 0x38, %o1
2189 add %o1, %r23, %r23
2190 sllx %o1, 5, %o3 !(CID*256)
2191#endif
2192 cas [%r23],%g0,%r10 !lock
2193 brnz %r10, cwq_80_4
2194 rd %asi, %r12
2195 wr %g0, 0x40, %asi
2196 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
2197 and %l1, 0x3, %l1 ! Check if busy/enabled ..
2198 cmp %l1, 1
2199 bne cwq_80_4
2200 set CWQ_BASE, %l6
2201#ifndef SPC
2202 add %l6, %o3, %l6
2203#endif
2204 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
2205 best_set_reg(0x20610090, %l1, %l2) !# Control Word
2206 sllx %l2, 32, %l2
2207 stx %l2, [%l6 + 0x0]
2208 membar #Sync
2209 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
2210 sub %l2, 0x40, %l2
2211 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
2212 wr %r12, %g0, %asi
2213 st %g0, [%r23]
2214cwq_80_4:
2215 ta T_CHANGE_NONHPRIV
2216 .word 0x91414000 ! 5: RDPC rd %pc, %r8
2217 nop
2218 ta T_CHANGE_HPRIV ! macro
2219donret_80_5:
2220 rd %pc, %r12
2221 mov HIGHVA_HIGHNUM, %r10
2222 sllx %r10, 32, %r10
2223 or %r12, %r10, %r12
2224 add %r12, (donretarg_80_5-donret_80_5), %r12
2225 add %r12, 0x8, %r11 ! nonseq tnpc
2226 wrpr %g0, 0x1, %tl
2227 wrpr %g0, %r12, %tpc
2228 wrpr %g0, %r11, %tnpc
2229 set (0x006fc000 | (0x89 << 24)), %r13
2230 and %r12, 0xfff, %r14
2231 sllx %r14, 30, %r14
2232 or %r13, %r14, %r20
2233 wrpr %r20, %g0, %tstate
2234 wrhpr %g0, 0xd8b, %htstate
2235 ta T_CHANGE_NONPRIV ! rand=0 (80)
2236 ldx [%r11+%r0], %g1
2237 done
2238donretarg_80_5:
2239 .word 0x8d903e65 ! 6: WRPR_PSTATE_I wrpr %r0, 0x1e65, %pstate
2240 .word 0xe937e1da ! 7: STQF_I - %f20, [0x01da, %r31]
2241jmptr_80_6:
2242 nop
2243 best_set_reg(0xe0a00000, %r20, %r27)
2244 .word 0xb7c6c000 ! 8: JMPL_R jmpl %r27 + %r0, %r27
2245 rd %tick, %r28
2246#if (MAX_THREADS == 8)
2247 sethi %hi(0x33800), %r27
2248#else
2249 sethi %hi(0x30000), %r27
2250#endif
2251 andn %r28, %r27, %r28
2252 ta T_CHANGE_HPRIV
2253 stxa %r28, [%g0] 0x73
2254intvec_80_7:
2255 .word 0x39400001 ! 9: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
2256 .word 0x9f803b76 ! 10: SIR sir 0x1b76
2257 .word 0x8d802000 ! 11: WRFPRS_I wr %r0, 0x0000, %fprs
2258trapasi_80_8:
2259 nop
2260 mov 0x8, %r1 ! (VA for ASI 0x48)
2261 .word 0xe8884900 ! 12: LDUBA_R lduba [%r1, %r0] 0x48, %r20
2262 .word 0xe81fe100 ! 13: LDD_I ldd [%r31 + 0x0100], %r20
2263 .word 0x22ca0001 ! 1: BRZ brz,a,pt %r8,<label_0xa0001>
2264 .word 0x8d903cc4 ! 14: WRPR_PSTATE_I wrpr %r0, 0x1cc4, %pstate
2265 nop
2266 ta T_CHANGE_HPRIV
2267 mov 0x80+1, %r10
2268 set sync_thr_counter5, %r23
2269#ifndef SPC
2270 ldxa [%g0]0x63, %o1
2271 and %o1, 0x38, %o1
2272 add %o1, %r23, %r23
2273 sllx %o1, 5, %o3 !(CID*256)
2274#endif
2275 cas [%r23],%g0,%r10 !lock
2276 brnz %r10, cwq_80_10
2277 rd %asi, %r12
2278 wr %g0, 0x40, %asi
2279 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
2280 and %l1, 0x3, %l1 ! Check if busy/enabled ..
2281 cmp %l1, 1
2282 bne cwq_80_10
2283 set CWQ_BASE, %l6
2284#ifndef SPC
2285 add %l6, %o3, %l6
2286#endif
2287 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
2288 best_set_reg(0x20610020, %l1, %l2) !# Control Word
2289 sllx %l2, 32, %l2
2290 stx %l2, [%l6 + 0x0]
2291 membar #Sync
2292 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
2293 sub %l2, 0x40, %l2
2294 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
2295 wr %r12, %g0, %asi
2296 st %g0, [%r23]
2297cwq_80_10:
2298 ta T_CHANGE_NONHPRIV
2299 .word 0xa1414000 ! 15: RDPC rd %pc, %r16
2300brcommon2_80_11:
2301 nop
2302 setx common_target, %r12, %r27
2303 ba,a .+12
2304 .word 0xa5a449c6 ! 1: FDIVd fdivd %f48, %f6, %f18
2305 ba,a .+8
2306 jmpl %r27+0, %r27
2307 .word 0xe1bfdb60 ! 16: STDFA_R stda %f16, [%r0, %r31]
2308jmptr_80_12:
2309 nop
2310 best_set_reg(0xe0a00000, %r20, %r27)
2311 .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27
2312mondo_80_13:
2313 nop
2314 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
2315 ta T_CHANGE_PRIV
2316 stxa %r10, [%r0+0x3d0] %asi
2317 .word 0x9d940012 ! 18: WRPR_WSTATE_R wrpr %r16, %r18, %wstate
2318mondo_80_14:
2319 nop
2320 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
2321 stxa %r8, [%r0+0x3c0] %asi
2322 .word 0x9d94c003 ! 19: WRPR_WSTATE_R wrpr %r19, %r3, %wstate
2323splash_cmpr_80_15:
2324 mov 0, %r18
2325 sllx %r18, 63, %r18
2326 rd %tick, %r17
2327 add %r17, 0x80, %r17
2328 or %r17, %r18, %r17
2329 ta T_CHANGE_HPRIV
2330 wrhpr %r17, %g0, %hsys_tick_cmpr
2331 .word 0xaf800011 ! 20: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
2332#if (defined SPC || defined CMP1)
2333!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_16) + 56, 16, 16)) -> intp(3,0,7,,,,,1)
2334!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_16)&0xffffffff) + 40, 16, 16)) -> intp(1,0,31,,,,,1)
2335#else
2336 set 0x3b80cfc7, %r28
2337#if (MAX_THREADS == 8)
2338 and %r28, 0x7ff, %r28
2339#endif
2340 stxa %r28, [%g0] 0x73
2341#endif
2342intvec_80_16:
2343 .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
2344 .word 0x81da4011 ! 22: FLUSH_R flush %r9, %r17, %r0
2345 .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1>
2346 .word 0x8d903c64 ! 23: WRPR_PSTATE_I wrpr %r0, 0x1c64, %pstate
2347 .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl
2348reduce_priv_lvl_80_18:
2349 ta T_CHANGE_NONHPRIV ! macro
2350mondo_80_19:
2351 nop
2352 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
2353 stxa %r12, [%r0+0x3d0] %asi
2354 .word 0x9d940006 ! 25: WRPR_WSTATE_R wrpr %r16, %r6, %wstate
2355 .word 0x81510000 ! 26: RDPR_TICK rdpr %tick, %r0
2356 .word 0x879c273e ! 27: WRHPR_HINTP_I wrhpr %r16, 0x073e, %hintp
2357fpinit_80_20:
2358 nop
2359 setx fp_data_quads, %r19, %r20
2360 ldd [%r20], %f0
2361 ldd [%r20+8], %f4
2362 ld [%r20+16], %fsr
2363 ld [%r20+24], %r19
2364 wr %r19, %g0, %gsr
2365 .word 0x87a80a44 ! 28: FCMPd fcmpd %fcc<n>, %f0, %f4
2366mondo_80_21:
2367 nop
2368 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
2369 stxa %r20, [%r0+0x3d8] %asi
2370 .word 0x9d94c002 ! 29: WRPR_WSTATE_R wrpr %r19, %r2, %wstate
2371splash_hpstate_80_22:
2372 .word 0x819835ef ! 30: WRHPR_HPSTATE_I wrhpr %r0, 0x15ef, %hpstate
2373splash_tba_80_23:
2374 nop
2375 ta T_CHANGE_PRIV
2376 setx 0x00000000003a0000, %r11, %r12
2377 .word 0x8b90000c ! 31: WRPR_TBA_R wrpr %r0, %r12, %tba
2378trapasi_80_24:
2379 nop
2380 mov 0x8, %r1 ! (VA for ASI 0x4a)
2381 .word 0xe8d04940 ! 32: LDSHA_R ldsha [%r1, %r0] 0x4a, %r20
2382 rd %tick, %r28
2383#if (MAX_THREADS == 8)
2384 sethi %hi(0x33800), %r27
2385#else
2386 sethi %hi(0x30000), %r27
2387#endif
2388 andn %r28, %r27, %r28
2389 ta T_CHANGE_HPRIV
2390 stxa %r28, [%g0] 0x73
2391intvec_80_25:
2392 .word 0x39400001 ! 33: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
2393 nop
2394 ta T_CHANGE_HPRIV
2395 mov 0x80, %r10
2396 set sync_thr_counter6, %r23
2397#ifndef SPC
2398 ldxa [%g0]0x63, %o1
2399 and %o1, 0x38, %o1
2400 add %o1, %r23, %r23
2401#endif
2402 cas [%r23],%g0,%r10 !lock
2403 brnz %r10, sma_80_26
2404 rd %asi, %r12
2405 wr %g0, 0x40, %asi
2406 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
2407 set 0x00061fff, %g1
2408 stxa %g1, [%g0 + 0x80] %asi
2409 wr %r12, %g0, %asi
2410 st %g0, [%r23]
2411sma_80_26:
2412 ta T_CHANGE_NONHPRIV
2413 .word 0xe9e7e012 ! 34: CASA_R casa [%r31] %asi, %r18, %r20
2414 .word 0xe89fe0d0 ! 35: LDDA_I ldda [%r31, + 0x00d0] %asi, %r20
2415 nop
2416 ta T_CHANGE_HPRIV
2417 mov 0x80, %r10
2418 set sync_thr_counter6, %r23
2419#ifndef SPC
2420 ldxa [%g0]0x63, %o1
2421 and %o1, 0x38, %o1
2422 add %o1, %r23, %r23
2423#endif
2424 cas [%r23],%g0,%r10 !lock
2425 brnz %r10, sma_80_27
2426 rd %asi, %r12
2427 wr %g0, 0x40, %asi
2428 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
2429 set 0x00161fff, %g1
2430 stxa %g1, [%g0 + 0x80] %asi
2431 wr %r12, %g0, %asi
2432 st %g0, [%r23]
2433sma_80_27:
2434 ta T_CHANGE_NONHPRIV
2435 .word 0xe9e7e010 ! 36: CASA_R casa [%r31] %asi, %r16, %r20
2436 nop
2437 ta T_CHANGE_HPRIV ! macro
2438donret_80_28:
2439 rd %pc, %r12
2440 mov HIGHVA_HIGHNUM, %r10
2441 sllx %r10, 32, %r10
2442 or %r12, %r10, %r12
2443 add %r12, (donretarg_80_28-donret_80_28), %r12
2444 add %r12, 0x4, %r11 ! seq tnpc
2445 andn %r11, %r10, %r11 ! low VA tnpc
2446 wrpr %g0, 0x2, %tl
2447 wrpr %g0, %r12, %tpc
2448 wrpr %g0, %r11, %tnpc
2449 set (0x002e4c00 | (0x89 << 24)), %r13
2450 and %r12, 0xfff, %r14
2451 sllx %r14, 30, %r14
2452 or %r13, %r14, %r20
2453 wrpr %r20, %g0, %tstate
2454 wrhpr %g0, 29, %htstate
2455 ta T_CHANGE_NONHPRIV ! rand=1 (80)
2456 retry
2457donretarg_80_28:
2458 .word 0x33400001 ! 37: FBPE fbe,a,pn %fcc0, <label_0x1>
2459brcommon2_80_29:
2460 nop
2461 setx common_target, %r12, %r27
2462 ba,a .+12
2463 .word 0xa3a00543 ! 1: FSQRTd fsqrt
2464 ba,a .+8
2465 jmpl %r27+0, %r27
2466 .word 0xc1bfe060 ! 38: STDFA_I stda %f0, [0x0060, %r31]
2467 .word 0x91908011 ! 39: WRPR_PIL_R wrpr %r2, %r17, %pil
2468 .word 0xd877e179 ! 40: STX_I stx %r12, [%r31 + 0x0179]
2469 nop
2470 ta T_CHANGE_HPRIV
2471 mov 0x80+1, %r10
2472 set sync_thr_counter5, %r23
2473#ifndef SPC
2474 ldxa [%g0]0x63, %o1
2475 and %o1, 0x38, %o1
2476 add %o1, %r23, %r23
2477 sllx %o1, 5, %o3 !(CID*256)
2478#endif
2479 cas [%r23],%g0,%r10 !lock
2480 brnz %r10, cwq_80_31
2481 rd %asi, %r12
2482 wr %g0, 0x40, %asi
2483 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
2484 and %l1, 0x3, %l1 ! Check if busy/enabled ..
2485 cmp %l1, 1
2486 bne cwq_80_31
2487 set CWQ_BASE, %l6
2488#ifndef SPC
2489 add %l6, %o3, %l6
2490#endif
2491 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
2492 best_set_reg(0x20610010, %l1, %l2) !# Control Word
2493 sllx %l2, 32, %l2
2494 stx %l2, [%l6 + 0x0]
2495 membar #Sync
2496 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
2497 sub %l2, 0x40, %l2
2498 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
2499 wr %r12, %g0, %asi
2500 st %g0, [%r23]
2501cwq_80_31:
2502 ta T_CHANGE_NONHPRIV
2503 .word 0xa1414000 ! 41: RDPC rd %pc, %r16
2504 .word 0xe69fe160 ! 42: LDDA_I ldda [%r31, + 0x0160] %asi, %r19
2505 nop
2506 ta T_CHANGE_HPRIV
2507 mov 0x80, %r10
2508 set sync_thr_counter6, %r23
2509#ifndef SPC
2510 ldxa [%g0]0x63, %o1
2511 and %o1, 0x38, %o1
2512 add %o1, %r23, %r23
2513#endif
2514 cas [%r23],%g0,%r10 !lock
2515 brnz %r10, sma_80_33
2516 rd %asi, %r12
2517 wr %g0, 0x40, %asi
2518 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
2519 set 0x000e1fff, %g1
2520 stxa %g1, [%g0 + 0x80] %asi
2521 wr %r12, %g0, %asi
2522 st %g0, [%r23]
2523sma_80_33:
2524 ta T_CHANGE_NONHPRIV
2525 .word 0xe7e7e014 ! 43: CASA_R casa [%r31] %asi, %r20, %r19
2526 nop
2527 ta T_CHANGE_HPRIV ! macro
2528donret_80_34:
2529 rd %pc, %r12
2530 mov HIGHVA_HIGHNUM, %r10
2531 sllx %r10, 32, %r10
2532 or %r12, %r10, %r12
2533 add %r12, (donretarg_80_34-donret_80_34+4), %r12
2534 add %r12, 0x4, %r11 ! seq tnpc
2535 wrpr %g0, 0x1, %tl
2536 wrpr %g0, %r12, %tpc
2537 wrpr %g0, %r11, %tnpc
2538 set (0x00a48100 | (0x8a << 24)), %r13
2539 and %r12, 0xfff, %r14
2540 sllx %r14, 30, %r14
2541 or %r13, %r14, %r20
2542 wrpr %r20, %g0, %tstate
2543 wrhpr %g0, 0x1365, %htstate
2544 ta T_CHANGE_NONPRIV ! rand=0 (80)
2545 retry
2546donretarg_80_34:
2547 .word 0xe66fe0d8 ! 44: LDSTUB_I ldstub %r19, [%r31 + 0x00d8]
2548 nop
2549 mov 0x80, %g3
2550 .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1>
2551 stxa %g3, [%g3] 0x5f
2552 .word 0xe65fc000 ! 45: LDX_R ldx [%r31 + %r0], %r19
2553#if (defined SPC || defined CMP)
2554!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_35)+48, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
2555!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_35)&0xffffffff) + 0, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
2556xir_80_35:
2557#else
2558#if (defined FC)
2559!! Generate XIR via RESET_GEN register
2560 ta T_CHANGE_HPRIV
2561 rdpr %pstate, %r18
2562 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
2563 wrpr %r18, %pstate
2564#ifndef XIR_RND_CORES
2565 ldxa [%g0] 0x63, %o1
2566 mov 1, %r18
2567 sllx %r18, %o1, %r18
2568#endif
2569 mov 0x30, %r19
2570 setx 0x8900000808, %r16, %r17
2571 mov 0x2, %r16
2572xir_80_35:
2573 stxa %r18, [%r19] 0x41
2574 stx %r16, [%r17]
2575#endif
2576#endif
2577 .word 0xa9843c0e ! 46: WR_SET_SOFTINT_I wr %r16, 0x1c0e, %set_softint
2578iaw_80_36:
2579 nop
2580 ta T_CHANGE_HPRIV
2581 mov 8, %r18
2582 rd %asi, %r12
2583 wr %r0, 0x41, %asi
2584 set sync_thr_counter4, %r23
2585#ifndef SPC
2586 ldxa [%g0]0x63, %r8
2587 and %r8, 0x38, %r8 ! Core ID
2588 add %r8, %r23, %r23
2589#else
2590 mov 0, %r8
2591#endif
2592 mov 0x80, %r16
2593iaw_startwait80_36:
2594 cas [%r23],%g0,%r16 !lock
2595 brz,a %r16, continue_iaw_80_36
2596 mov (~0x80&0xf0), %r16
2597 ld [%r23], %r16
2598iaw_wait80_36:
2599 brnz %r16, iaw_wait80_36
2600 ld [%r23], %r16
2601 ba iaw_startwait80_36
2602 mov 0x80, %r16
2603continue_iaw_80_36:
2604 sllx %r16, %r8, %r16 !Mask for my core only
2605 ldxa [0x58]%asi, %r17 !Running_status
2606wait_for_stat_80_36:
2607 ldxa [0x50]%asi, %r13 !Running_rw
2608 cmp %r13, %r17
2609 bne,a %xcc, wait_for_stat_80_36
2610 ldxa [0x58]%asi, %r17 !Running_status
2611 stxa %r16, [0x68]%asi !Park (W1C)
2612 ldxa [0x50]%asi, %r14 !Running_rw
2613wait_for_iaw_80_36:
2614 ldxa [0x58]%asi, %r17 !Running_status
2615 cmp %r14, %r17
2616 bne,a %xcc, wait_for_iaw_80_36
2617 ldxa [0x50]%asi, %r14 !Running_rw
2618iaw_doit80_36:
2619 mov 0x38, %r18
2620iaw2_80_36:
2621 rdpr %tba, %r19
2622 mov 0x221, %r20
2623 sllx %r20, 5, %r20
2624 add %r20, %r19, %r19
2625 stxa %r19, [%r18]0x50
2626 stxa %r16, [0x60] %asi ! Unpark (W1S)
2627 st %g0, [%r23] !clear lock
2628 wr %r0, %r12, %asi ! restore %asi
2629 ta T_CHANGE_NONHPRIV
2630 .word 0xe69fe030 ! 47: LDDA_I ldda [%r31, + 0x0030] %asi, %r19
2631 nop
2632 ta T_CHANGE_HPRIV ! macro
2633donret_80_37:
2634 rd %pc, %r12
2635 mov HIGHVA_HIGHNUM, %r10
2636 sllx %r10, 32, %r10
2637 or %r12, %r10, %r12
2638 add %r12, (donretarg_80_37-donret_80_37+4), %r12
2639 add %r12, 0x4, %r11 ! seq tnpc
2640 andn %r12, %r10, %r12 ! low VA tpc
2641 wrpr %g0, 0x1, %tl
2642 wrpr %g0, %r12, %tpc
2643 wrpr %g0, %r11, %tnpc
2644 set (0x00e3c700 | (16 << 24)), %r13
2645 and %r12, 0xfff, %r14
2646 sllx %r14, 30, %r14
2647 or %r13, %r14, %r20
2648 wrpr %r20, %g0, %tstate
2649 wrhpr %g0, 0x1e0d, %htstate
2650 ta T_CHANGE_NONPRIV ! rand=0 (80)
2651 ldx [%r11+%r0], %g1
2652 done
2653.align 32
2654donretarg_80_37:
2655 .word 0x8d90289f ! 48: WRPR_PSTATE_I wrpr %r0, 0x089f, %pstate
2656 .word 0x89800011 ! 49: WRTICK_R wr %r0, %r17, %tick
2657iaw_80_39:
2658 nop
2659 ta T_CHANGE_HPRIV
2660 mov 8, %r18
2661 rd %asi, %r12
2662 wr %r0, 0x41, %asi
2663 set sync_thr_counter4, %r23
2664#ifndef SPC
2665 ldxa [%g0]0x63, %r8
2666 and %r8, 0x38, %r8 ! Core ID
2667 add %r8, %r23, %r23
2668#else
2669 mov 0, %r8
2670#endif
2671 mov 0x80, %r16
2672iaw_startwait80_39:
2673 cas [%r23],%g0,%r16 !lock
2674 brz,a %r16, continue_iaw_80_39
2675 mov (~0x80&0xf0), %r16
2676 ld [%r23], %r16
2677iaw_wait80_39:
2678 brnz %r16, iaw_wait80_39
2679 ld [%r23], %r16
2680 ba iaw_startwait80_39
2681 mov 0x80, %r16
2682continue_iaw_80_39:
2683 sllx %r16, %r8, %r16 !Mask for my core only
2684 ldxa [0x58]%asi, %r17 !Running_status
2685wait_for_stat_80_39:
2686 ldxa [0x50]%asi, %r13 !Running_rw
2687 cmp %r13, %r17
2688 bne,a %xcc, wait_for_stat_80_39
2689 ldxa [0x58]%asi, %r17 !Running_status
2690 stxa %r16, [0x68]%asi !Park (W1C)
2691 ldxa [0x50]%asi, %r14 !Running_rw
2692wait_for_iaw_80_39:
2693 ldxa [0x58]%asi, %r17 !Running_status
2694 cmp %r14, %r17
2695 bne,a %xcc, wait_for_iaw_80_39
2696 ldxa [0x50]%asi, %r14 !Running_rw
2697iaw_doit80_39:
2698 mov 0x38, %r18
2699iaw4_80_39:
2700 setx common_target, %r20, %r19
2701 or %r19, 0x1, %r19
2702 stxa %r19, [%r18]0x50
2703 stxa %r16, [0x60] %asi ! Unpark (W1S)
2704 st %g0, [%r23] !clear lock
2705 wr %r0, %r12, %asi ! restore %asi
2706 ta T_CHANGE_NONHPRIV
2707 .word 0xc19fd960 ! 50: LDDFA_R ldda [%r31, %r0], %f0
2708splash_lsu_80_40:
2709 nop
2710 ta T_CHANGE_HPRIV
2711 set 0x60c3cae7, %r2
2712 mov 0x1, %r1
2713 sllx %r1, 32, %r1
2714 or %r1, %r2, %r2
2715 stxa %r2, [%r0] ASI_LSU_CONTROL
2716 .word 0x3d400001 ! 51: FBPULE fbule,a,pn %fcc0, <label_0x1>
2717change_to_randtl_80_41:
2718 ta T_CHANGE_HPRIV ! macro
2719done_change_to_randtl_80_41:
2720 .word 0x8f902002 ! 52: WRPR_TL_I wrpr %r0, 0x0002, %tl
2721 .word 0xc1bfdf20 ! 53: STDFA_R stda %f0, [%r0, %r31]
2722 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick
2723 nop
2724 ta T_CHANGE_HPRIV ! macro
2725donret_80_43:
2726 rd %pc, %r12
2727 mov HIGHVA_HIGHNUM, %r10
2728 sllx %r10, 32, %r10
2729 or %r12, %r10, %r12
2730 add %r12, (donretarg_80_43-donret_80_43+4), %r12
2731 add %r12, 0x4, %r11 ! seq tnpc
2732 wrpr %g0, 0x1, %tl
2733 wrpr %g0, %r12, %tpc
2734 wrpr %g0, %r11, %tnpc
2735 set (0x005e0400 | (0x88 << 24)), %r13
2736 and %r12, 0xfff, %r14
2737 sllx %r14, 30, %r14
2738 or %r13, %r14, %r20
2739 wrpr %r20, %g0, %tstate
2740 wrhpr %g0, 0x49f, %htstate
2741 ta T_CHANGE_NONPRIV ! rand=0 (80)
2742 .word 0x24800001 ! 1: BLE ble,a <label_0x1>
2743 done
2744.align 32
2745donretarg_80_43:
2746 .word 0x8d902e4d ! 55: WRPR_PSTATE_I wrpr %r0, 0x0e4d, %pstate
2747 .word 0xe64fc000 ! 56: LDSB_R ldsb [%r31 + %r0], %r19
2748 .word 0xe71fe198 ! 57: LDDF_I ldd [%r31, 0x0198], %f19
2749 .word 0x8780201c ! 58: WRASI_I wr %r0, 0x001c, %asi
2750 .word 0x89800011 ! 59: WRTICK_R wr %r0, %r17, %tick
2751 nop
2752 ta T_CHANGE_HPRIV
2753 mov 0x80+1, %r10
2754 set sync_thr_counter5, %r23
2755#ifndef SPC
2756 ldxa [%g0]0x63, %o1
2757 and %o1, 0x38, %o1
2758 add %o1, %r23, %r23
2759 sllx %o1, 5, %o3 !(CID*256)
2760#endif
2761 cas [%r23],%g0,%r10 !lock
2762 brnz %r10, cwq_80_45
2763 rd %asi, %r12
2764 wr %g0, 0x40, %asi
2765 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
2766 and %l1, 0x3, %l1 ! Check if busy/enabled ..
2767 cmp %l1, 1
2768 bne cwq_80_45
2769 set CWQ_BASE, %l6
2770#ifndef SPC
2771 add %l6, %o3, %l6
2772#endif
2773 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
2774 best_set_reg(0x20610030, %l1, %l2) !# Control Word
2775 sllx %l2, 32, %l2
2776 stx %l2, [%l6 + 0x0]
2777 membar #Sync
2778 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
2779 sub %l2, 0x40, %l2
2780 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
2781 wr %r12, %g0, %asi
2782 st %g0, [%r23]
2783cwq_80_45:
2784 ta T_CHANGE_NONHPRIV
2785 .word 0x93414000 ! 60: RDPC rd %pc, %r9
2786mondo_80_46:
2787 nop
2788 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
2789 ta T_CHANGE_PRIV
2790 stxa %r12, [%r0+0x3d8] %asi
2791 .word 0x9d940014 ! 61: WRPR_WSTATE_R wrpr %r16, %r20, %wstate
2792 .word 0x83d020b3 ! 62: Tcc_I te icc_or_xcc, %r0 + 179
2793splash_lsu_80_47:
2794 nop
2795 ta T_CHANGE_HPRIV
2796 set 0xb5c0c1ed, %r2
2797 mov 0x2, %r1
2798 sllx %r1, 32, %r1
2799 or %r1, %r2, %r2
2800 stxa %r2, [%r0] ASI_LSU_CONTROL
2801 .word 0x3d400001 ! 63: FBPULE fbule,a,pn %fcc0, <label_0x1>
2802ibp_80_48:
2803 nop
2804 .word 0xe19fe100 ! 64: LDDFA_I ldda [%r31, 0x0100], %f16
2805splash_hpstate_80_49:
2806 .word 0x81982e51 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x0e51, %hpstate
2807 .word 0x8d903d37 ! 66: WRPR_PSTATE_I wrpr %r0, 0x1d37, %pstate
2808 rd %tick, %r28
2809#if (MAX_THREADS == 8)
2810 sethi %hi(0x33800), %r27
2811#else
2812 sethi %hi(0x30000), %r27
2813#endif
2814 andn %r28, %r27, %r28
2815 ta T_CHANGE_HPRIV
2816 stxa %r28, [%g0] 0x73
2817intvec_80_51:
2818 .word 0x39400001 ! 67: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
2819iaw_80_52:
2820 nop
2821 ta T_CHANGE_HPRIV
2822 mov 8, %r18
2823 rd %asi, %r12
2824 wr %r0, 0x41, %asi
2825 set sync_thr_counter4, %r23
2826#ifndef SPC
2827 ldxa [%g0]0x63, %r8
2828 and %r8, 0x38, %r8 ! Core ID
2829 add %r8, %r23, %r23
2830#else
2831 mov 0, %r8
2832#endif
2833 mov 0x80, %r16
2834iaw_startwait80_52:
2835 cas [%r23],%g0,%r16 !lock
2836 brz,a %r16, continue_iaw_80_52
2837 mov (~0x80&0xf0), %r16
2838 ld [%r23], %r16
2839iaw_wait80_52:
2840 brnz %r16, iaw_wait80_52
2841 ld [%r23], %r16
2842 ba iaw_startwait80_52
2843 mov 0x80, %r16
2844continue_iaw_80_52:
2845 sllx %r16, %r8, %r16 !Mask for my core only
2846 ldxa [0x58]%asi, %r17 !Running_status
2847wait_for_stat_80_52:
2848 ldxa [0x50]%asi, %r13 !Running_rw
2849 cmp %r13, %r17
2850 bne,a %xcc, wait_for_stat_80_52
2851 ldxa [0x58]%asi, %r17 !Running_status
2852 stxa %r16, [0x68]%asi !Park (W1C)
2853 ldxa [0x50]%asi, %r14 !Running_rw
2854wait_for_iaw_80_52:
2855 ldxa [0x58]%asi, %r17 !Running_status
2856 cmp %r14, %r17
2857 bne,a %xcc, wait_for_iaw_80_52
2858 ldxa [0x50]%asi, %r14 !Running_rw
2859iaw_doit80_52:
2860 mov 0x38, %r18
2861iaw2_80_52:
2862 rdpr %tba, %r19
2863 mov 0x120, %r20
2864 sllx %r20, 5, %r20
2865 add %r20, %r19, %r19
2866 stxa %r19, [%r18]0x50
2867 stxa %r16, [0x60] %asi ! Unpark (W1S)
2868 st %g0, [%r23] !clear lock
2869 wr %r0, %r12, %asi ! restore %asi
2870 ta T_CHANGE_NONHPRIV
2871 .word 0x97a449ab ! 68: FDIVs fdivs %f17, %f11, %f11
2872 nop
2873 ta T_CHANGE_HPRIV ! macro
2874donret_80_53:
2875 rd %pc, %r12
2876 mov HIGHVA_HIGHNUM, %r10
2877 sllx %r10, 32, %r10
2878 or %r12, %r10, %r12
2879 add %r12, (donretarg_80_53-donret_80_53+4), %r12
2880 add %r12, 0x4, %r11 ! seq tnpc
2881 wrpr %g0, 0x1, %tl
2882 wrpr %g0, %r12, %tpc
2883 wrpr %g0, %r11, %tnpc
2884 set (0x0082b200 | (32 << 24)), %r13
2885 and %r12, 0xfff, %r14
2886 sllx %r14, 30, %r14
2887 or %r13, %r14, %r20
2888 wrpr %r20, %g0, %tstate
2889 wrhpr %g0, 0x629, %htstate
2890 ta T_CHANGE_NONPRIV ! rand=0 (80)
2891 ldx [%r11+%r0], %g1
2892 done
2893donretarg_80_53:
2894 .word 0x3f400001 ! 69: FBPO fbo,a,pn %fcc0, <label_0x1>
2895 set 0x110a, %l3
2896 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
2897 .word 0x95b487d0 ! 70: PDIST pdistn %d18, %d16, %d10
2898 .word 0x91a00172 ! 71: FABSq dis not found
2899
2900ibp_80_55:
2901 nop
2902 ta T_CHANGE_NONHPRIV
2903 .word 0xc19fe020 ! 72: LDDFA_I ldda [%r31, 0x0020], %f0
2904 nop
2905 ta T_CHANGE_HPRIV ! macro
2906donret_80_56:
2907 rd %pc, %r12
2908 mov HIGHVA_HIGHNUM, %r10
2909 sllx %r10, 32, %r10
2910 or %r12, %r10, %r12
2911 add %r12, (donretarg_80_56-donret_80_56), %r12
2912 add %r12, 0x8, %r11 ! nonseq tnpc
2913 wrpr %g0, 0x2, %tl
2914 wrpr %g0, %r12, %tpc
2915 wrpr %g0, %r11, %tnpc
2916 set (0x00c36800 | (0x89 << 24)), %r13
2917 and %r12, 0xfff, %r14
2918 sllx %r14, 30, %r14
2919 or %r13, %r14, %r20
2920 wrpr %r20, %g0, %tstate
2921 wrhpr %g0, 0x1acd, %htstate
2922 ta T_CHANGE_NONHPRIV ! rand=1 (80)
2923 retry
2924.align 32
2925donretarg_80_56:
2926 .word 0xe4ffe00d ! 73: SWAPA_I swapa %r18, [%r31 + 0x000d] %asi
2927brcommon3_80_57:
2928 nop
2929 setx common_target, %r12, %r27
2930 lduw [%r27], %r12 ! Load common dest into dcache ..
2931 ba,a .+12
2932 .word 0xe537c00c ! 1: STQF_R - %f18, [%r12, %r31]
2933 ba,a .+8
2934 jmpl %r27+0, %r27
2935 .word 0xe43fe050 ! 74: STD_I std %r18, [%r31 + 0x0050]
2936 .word 0x91948003 ! 75: WRPR_PIL_R wrpr %r18, %r3, %pil
2937splash_cmpr_80_59:
2938 mov 0, %r18
2939 sllx %r18, 63, %r18
2940 rd %tick, %r17
2941 add %r17, 0x60, %r17
2942 or %r17, %r18, %r17
2943 ta T_CHANGE_PRIV
2944 .word 0xb3800011 ! 76: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
2945splash_cmpr_80_60:
2946 mov 1, %r18
2947 sllx %r18, 63, %r18
2948 rd %tick, %r17
2949 add %r17, 0x60, %r17
2950 or %r17, %r18, %r17
2951 ta T_CHANGE_HPRIV
2952 wrhpr %r17, %g0, %hsys_tick_cmpr
2953 .word 0xaf800011 ! 77: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
2954 .word 0x87802036 ! 78: WRASI_I wr %r0, 0x0036, %asi
2955brcommon3_80_61:
2956 nop
2957 setx common_target, %r12, %r27
2958 lduw [%r27], %r12 ! Load common dest into dcache ..
2959 ba,a .+12
2960 .word 0xe537c013 ! 1: STQF_R - %f18, [%r19, %r31]
2961 ba,a .+8
2962 jmpl %r27+0, %r27
2963 .word 0xe49fe070 ! 79: LDDA_I ldda [%r31, + 0x0070] %asi, %r18
2964mondo_80_62:
2965 nop
2966 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
2967 ta T_CHANGE_PRIV
2968 stxa %r20, [%r0+0x3e8] %asi
2969 .word 0x9d918010 ! 80: WRPR_WSTATE_R wrpr %r6, %r16, %wstate
2970 nop
2971 mov 0x80, %g3
2972 stxa %g3, [%g3] 0x5f
2973 .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31
2974 .word 0xe45fc000 ! 81: LDX_R ldx [%r31 + %r0], %r18
2975 set 0x39b, %l3
2976 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
2977 .word 0x99b487ca ! 82: PDIST pdistn %d18, %d10, %d12
2978 .word 0xd23fc000 ! 83: STD_R std %r9, [%r31 + %r0]
2979 .word 0x97a00172 ! 84: FABSq dis not found
2980
2981 nop
2982 ta T_CHANGE_HPRIV
2983 mov 0x80+1, %r10
2984 set sync_thr_counter5, %r23
2985#ifndef SPC
2986 ldxa [%g0]0x63, %o1
2987 and %o1, 0x38, %o1
2988 add %o1, %r23, %r23
2989 sllx %o1, 5, %o3 !(CID*256)
2990#endif
2991 cas [%r23],%g0,%r10 !lock
2992 brnz %r10, cwq_80_65
2993 rd %asi, %r12
2994 wr %g0, 0x40, %asi
2995 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
2996 and %l1, 0x3, %l1 ! Check if busy/enabled ..
2997 cmp %l1, 1
2998 bne cwq_80_65
2999 set CWQ_BASE, %l6
3000#ifndef SPC
3001 add %l6, %o3, %l6
3002#endif
3003 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
3004 best_set_reg(0x20610010, %l1, %l2) !# Control Word
3005 sllx %l2, 32, %l2
3006 stx %l2, [%l6 + 0x0]
3007 membar #Sync
3008 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
3009 sub %l2, 0x40, %l2
3010 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
3011 wr %r12, %g0, %asi
3012 st %g0, [%r23]
3013cwq_80_65:
3014 ta T_CHANGE_NONHPRIV
3015 .word 0x93414000 ! 85: RDPC rd %pc, %r9
3016 .word 0xa7450000 ! 86: RD_SET_SOFTINT rd %set_softint, %r19
3017brcommon1_80_66:
3018 nop
3019 setx common_target, %r12, %r27
3020 lduw [%r27], %r12 ! Load common dest into dcache ..
3021 ba,a .+12
3022 .word 0x93b7c7c8 ! 1: PDIST pdistn %d62, %d8, %d40
3023 ba,a .+8
3024 jmpl %r27+0, %r27
3025 .word 0x9f803153 ! 87: SIR sir 0x1153
3026pmu_80_67:
3027 nop
3028 setx 0xffffffbdffffffa5, %g1, %g7
3029 .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %-
3030#if (defined SPC || defined CMP)
3031!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_68)+16, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
3032!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_68)&0xffffffff) + 0, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
3033xir_80_68:
3034#else
3035#if (defined FC)
3036!! Generate XIR via RESET_GEN register
3037 ta T_CHANGE_HPRIV
3038 rdpr %pstate, %r18
3039 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
3040 wrpr %r18, %pstate
3041#ifndef XIR_RND_CORES
3042 ldxa [%g0] 0x63, %o1
3043 mov 1, %r18
3044 sllx %r18, %o1, %r18
3045#endif
3046 mov 0x30, %r19
3047 setx 0x8900000808, %r16, %r17
3048 mov 0x2, %r16
3049xir_80_68:
3050 stxa %r18, [%r19] 0x41
3051 stx %r16, [%r17]
3052#endif
3053#endif
3054 .word 0xa980e169 ! 89: WR_SET_SOFTINT_I wr %r3, 0x0169, %set_softint
3055 rd %tick, %r28
3056#if (MAX_THREADS == 8)
3057 sethi %hi(0x33800), %r27
3058#else
3059 sethi %hi(0x30000), %r27
3060#endif
3061 andn %r28, %r27, %r28
3062 ta T_CHANGE_HPRIV
3063 stxa %r28, [%g0] 0x73
3064intvec_80_69:
3065 .word 0x39400001 ! 90: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3066fpinit_80_70:
3067 nop
3068 setx fp_data_quads, %r19, %r20
3069 ldd [%r20], %f0
3070 ldd [%r20+8], %f4
3071 ld [%r20+16], %fsr
3072 ld [%r20+24], %r19
3073 wr %r19, %g0, %gsr
3074 .word 0x89b00484 ! 91: FCMPLE32 fcmple32 %d0, %d4, %r4
3075mondo_80_71:
3076 nop
3077 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
3078 ta T_CHANGE_PRIV
3079 stxa %r10, [%r0+0x3e0] %asi
3080 .word 0x9d948006 ! 92: WRPR_WSTATE_R wrpr %r18, %r6, %wstate
3081 .word 0x8d902ec6 ! 93: WRPR_PSTATE_I wrpr %r0, 0x0ec6, %pstate
3082 .word 0x8d802000 ! 94: WRFPRS_I wr %r0, 0x0000, %fprs
3083 nop
3084 ta T_CHANGE_HPRIV
3085 mov 0x80, %r10
3086 set sync_thr_counter6, %r23
3087#ifndef SPC
3088 ldxa [%g0]0x63, %o1
3089 and %o1, 0x38, %o1
3090 add %o1, %r23, %r23
3091#endif
3092 cas [%r23],%g0,%r10 !lock
3093 brnz %r10, sma_80_73
3094 rd %asi, %r12
3095 wr %g0, 0x40, %asi
3096 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
3097 set 0x000e1fff, %g1
3098 stxa %g1, [%g0 + 0x80] %asi
3099 wr %r12, %g0, %asi
3100 st %g0, [%r23]
3101sma_80_73:
3102 ta T_CHANGE_NONHPRIV
3103 .word 0xd1e7e014 ! 95: CASA_R casa [%r31] %asi, %r20, %r8
3104ibp_80_74:
3105 nop
3106 ta T_CHANGE_NONHPRIV
3107 .word 0xc3ec4034 ! 96: PREFETCHA_R prefetcha [%r17, %r20] 0x01, #one_read
3108iaw_80_75:
3109 nop
3110 ta T_CHANGE_HPRIV
3111 mov 8, %r18
3112 rd %asi, %r12
3113 wr %r0, 0x41, %asi
3114 set sync_thr_counter4, %r23
3115#ifndef SPC
3116 ldxa [%g0]0x63, %r8
3117 and %r8, 0x38, %r8 ! Core ID
3118 add %r8, %r23, %r23
3119#else
3120 mov 0, %r8
3121#endif
3122 mov 0x80, %r16
3123iaw_startwait80_75:
3124 cas [%r23],%g0,%r16 !lock
3125 brz,a %r16, continue_iaw_80_75
3126 mov (~0x80&0xf0), %r16
3127 ld [%r23], %r16
3128iaw_wait80_75:
3129 brnz %r16, iaw_wait80_75
3130 ld [%r23], %r16
3131 ba iaw_startwait80_75
3132 mov 0x80, %r16
3133continue_iaw_80_75:
3134 sllx %r16, %r8, %r16 !Mask for my core only
3135 ldxa [0x58]%asi, %r17 !Running_status
3136wait_for_stat_80_75:
3137 ldxa [0x50]%asi, %r13 !Running_rw
3138 cmp %r13, %r17
3139 bne,a %xcc, wait_for_stat_80_75
3140 ldxa [0x58]%asi, %r17 !Running_status
3141 stxa %r16, [0x68]%asi !Park (W1C)
3142 ldxa [0x50]%asi, %r14 !Running_rw
3143wait_for_iaw_80_75:
3144 ldxa [0x58]%asi, %r17 !Running_status
3145 cmp %r14, %r17
3146 bne,a %xcc, wait_for_iaw_80_75
3147 ldxa [0x50]%asi, %r14 !Running_rw
3148iaw_doit80_75:
3149 mov 0x38, %r18
3150iaw1_80_75:
3151 best_set_reg(0x00000000e0a00000, %r20, %r19)
3152 or %r19, 0x1, %r19
3153 stxa %r19, [%r18]0x50
3154 stxa %r16, [0x60] %asi ! Unpark (W1S)
3155 st %g0, [%r23] !clear lock
3156 wr %r0, %r12, %asi ! restore %asi
3157 ta T_CHANGE_NONHPRIV
3158 .word 0xc3ea0026 ! 97: PREFETCHA_R prefetcha [%r8, %r6] 0x01, #one_read
3159trapasi_80_76:
3160 nop
3161 mov 0x10, %r1 ! (VA for ASI 0x5a)
3162 .word 0xd8c04b40 ! 98: LDSWA_R ldswa [%r1, %r0] 0x5a, %r12
3163 .word 0x81460000 ! 99: RD_STICK_REG stbar
3164jmptr_80_77:
3165 nop
3166 best_set_reg(0xe1a00000, %r20, %r27)
3167 .word 0xb7c6c000 ! 100: JMPL_R jmpl %r27 + %r0, %r27
3168pmu_80_78:
3169 nop
3170 ta T_CHANGE_PRIV
3171 setx 0xffffffb3ffffffa8, %g1, %g7
3172 .word 0xa3800007 ! 101: WR_PERF_COUNTER_R wr %r0, %r7, %-
3173memptr_80_79:
3174 set 0x60540000, %r31
3175 .word 0x85827c75 ! 102: WRCCR_I wr %r9, 0x1c75, %ccr
3176 .word 0xd8cfe038 ! 103: LDSBA_I ldsba [%r31, + 0x0038] %asi, %r12
3177change_to_randtl_80_80:
3178 ta T_CHANGE_PRIV ! macro
3179done_change_to_randtl_80_80:
3180 .word 0x8f902001 ! 104: WRPR_TL_I wrpr %r0, 0x0001, %tl
3181pmu_80_81:
3182 nop
3183 setx 0xffffffb6ffffffa8, %g1, %g7
3184 .word 0xa3800007 ! 105: WR_PERF_COUNTER_R wr %r0, %r7, %-
3185splash_lsu_80_82:
3186 nop
3187 ta T_CHANGE_HPRIV
3188 set 0xbb297278, %r2
3189 mov 0x6, %r1
3190 sllx %r1, 32, %r1
3191 or %r1, %r2, %r2
3192 .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1>
3193 stxa %r2, [%r0] ASI_LSU_CONTROL
3194 .word 0x3d400001 ! 106: FBPULE fbule,a,pn %fcc0, <label_0x1>
3195 .word 0xd8cfe198 ! 107: LDSBA_I ldsba [%r31, + 0x0198] %asi, %r12
3196 .word 0x9f8035de ! 108: SIR sir 0x15de
3197 .word 0xd8dfe050 ! 109: LDXA_I ldxa [%r31, + 0x0050] %asi, %r12
3198 .word 0x87802020 ! 110: WRASI_I wr %r0, 0x0020, %asi
3199mondo_80_83:
3200 nop
3201 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
3202 stxa %r8, [%r0+0x3e0] %asi
3203 .word 0x9d92c010 ! 111: WRPR_WSTATE_R wrpr %r11, %r16, %wstate
3204 .word 0x81460000 ! 112: RD_STICK_REG stbar
3205 .word 0xa7a249d0 ! 113: FDIVd fdivd %f40, %f16, %f50
3206 nop
3207 ta T_CHANGE_HPRIV
3208 mov 0x80+1, %r10
3209 set sync_thr_counter5, %r23
3210#ifndef SPC
3211 ldxa [%g0]0x63, %o1
3212 and %o1, 0x38, %o1
3213 add %o1, %r23, %r23
3214 sllx %o1, 5, %o3 !(CID*256)
3215#endif
3216 cas [%r23],%g0,%r10 !lock
3217 brnz %r10, cwq_80_85
3218 rd %asi, %r12
3219 wr %g0, 0x40, %asi
3220 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
3221 and %l1, 0x3, %l1 ! Check if busy/enabled ..
3222 cmp %l1, 1
3223 bne cwq_80_85
3224 set CWQ_BASE, %l6
3225#ifndef SPC
3226 add %l6, %o3, %l6
3227#endif
3228 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
3229 best_set_reg(0x206100a0, %l1, %l2) !# Control Word
3230 sllx %l2, 32, %l2
3231 stx %l2, [%l6 + 0x0]
3232 membar #Sync
3233 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
3234 sub %l2, 0x40, %l2
3235 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
3236 wr %r12, %g0, %asi
3237 st %g0, [%r23]
3238cwq_80_85:
3239 ta T_CHANGE_NONHPRIV
3240 .word 0xa1414000 ! 114: RDPC rd %pc, %r16
3241#if (defined SPC || defined CMP1)
3242!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_86) + 0, 16, 16)) -> intp(5,0,31,,,,,1)
3243!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_86)&0xffffffff) + 40, 16, 16)) -> intp(4,0,10,,,,,1)
3244#else
3245 set 0xdcd00210, %r28
3246#if (MAX_THREADS == 8)
3247 and %r28, 0x7ff, %r28
3248#endif
3249 stxa %r28, [%g0] 0x73
3250#endif
3251intvec_80_86:
3252 .word 0x39400001 ! 115: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3253pmu_80_87:
3254 nop
3255 setx 0xffffffbeffffffa6, %g1, %g7
3256 .word 0xa3800007 ! 116: WR_PERF_COUNTER_R wr %r0, %r7, %-
3257trapasi_80_88:
3258 nop
3259 mov 0x8, %r1 ! (VA for ASI 0x49)
3260 .word 0xd8c04920 ! 117: LDSWA_R ldswa [%r1, %r0] 0x49, %r12
3261 .word 0x99450000 ! 118: RD_SET_SOFTINT rd %set_softint, %r12
3262fpinit_80_89:
3263 nop
3264 setx fp_data_quads, %r19, %r20
3265 ldd [%r20], %f0
3266 ldd [%r20+8], %f4
3267 ld [%r20+16], %fsr
3268 ld [%r20+24], %r19
3269 wr %r19, %g0, %gsr
3270 .word 0xc3e83d23 ! 119: PREFETCHA_I prefetcha [%r0, + 0xfffffd23] %asi, #one_read
3271 .word 0x9f802939 ! 120: SIR sir 0x0939
3272 nop
3273 ta T_CHANGE_HPRIV ! macro
3274donret_80_90:
3275 rd %pc, %r12
3276 mov HIGHVA_HIGHNUM, %r10
3277 sllx %r10, 32, %r10
3278 or %r12, %r10, %r12
3279 add %r12, (donretarg_80_90-donret_80_90+4), %r12
3280 add %r12, 0x4, %r11 ! seq tnpc
3281 wrpr %g0, 0x1, %tl
3282 wrpr %g0, %r12, %tpc
3283 wrpr %g0, %r11, %tnpc
3284 set (0x0036f000 | (0x4f << 24)), %r13
3285 and %r12, 0xfff, %r14
3286 sllx %r14, 30, %r14
3287 or %r13, %r14, %r20
3288 wrpr %r20, %g0, %tstate
3289 wrhpr %g0, 0x795, %htstate
3290 ta T_CHANGE_NONPRIV ! rand=0 (80)
3291 retry
3292.align 32
3293donretarg_80_90:
3294 .word 0xe66fe0f8 ! 121: LDSTUB_I ldstub %r19, [%r31 + 0x00f8]
3295 .word 0x9f80399f ! 122: SIR sir 0x199f
3296splash_htba_80_91:
3297 nop
3298 ta T_CHANGE_HPRIV
3299 setx 0x00000000002a0000, %r11, %r12
3300 .word 0x8b98000c ! 123: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
3301 nop
3302 ta T_CHANGE_HPRIV
3303 mov 0x80+1, %r10
3304 set sync_thr_counter5, %r23
3305#ifndef SPC
3306 ldxa [%g0]0x63, %o1
3307 and %o1, 0x38, %o1
3308 add %o1, %r23, %r23
3309 sllx %o1, 5, %o3 !(CID*256)
3310#endif
3311 cas [%r23],%g0,%r10 !lock
3312 brnz %r10, cwq_80_92
3313 rd %asi, %r12
3314 wr %g0, 0x40, %asi
3315 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
3316 and %l1, 0x3, %l1 ! Check if busy/enabled ..
3317 cmp %l1, 1
3318 bne cwq_80_92
3319 set CWQ_BASE, %l6
3320#ifndef SPC
3321 add %l6, %o3, %l6
3322#endif
3323 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
3324 best_set_reg(0x20610020, %l1, %l2) !# Control Word
3325 sllx %l2, 32, %l2
3326 stx %l2, [%l6 + 0x0]
3327 membar #Sync
3328 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
3329 sub %l2, 0x40, %l2
3330 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
3331 wr %r12, %g0, %asi
3332 st %g0, [%r23]
3333cwq_80_92:
3334 ta T_CHANGE_NONHPRIV
3335 .word 0x99414000 ! 124: RDPC rd %pc, %r12
3336 rd %tick, %r28
3337#if (MAX_THREADS == 8)
3338 sethi %hi(0x33800), %r27
3339#else
3340 sethi %hi(0x30000), %r27
3341#endif
3342 andn %r28, %r27, %r28
3343 ta T_CHANGE_HPRIV
3344 stxa %r28, [%g0] 0x73
3345intvec_80_93:
3346 .word 0x39400001 ! 125: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3347 .word 0x8d802004 ! 126: WRFPRS_I wr %r0, 0x0004, %fprs
3348iaw_80_94:
3349 nop
3350 ta T_CHANGE_HPRIV
3351 mov 8, %r18
3352 rd %asi, %r12
3353 wr %r0, 0x41, %asi
3354 set sync_thr_counter4, %r23
3355#ifndef SPC
3356 ldxa [%g0]0x63, %r8
3357 and %r8, 0x38, %r8 ! Core ID
3358 add %r8, %r23, %r23
3359#else
3360 mov 0, %r8
3361#endif
3362 mov 0x80, %r16
3363iaw_startwait80_94:
3364 cas [%r23],%g0,%r16 !lock
3365 brz,a %r16, continue_iaw_80_94
3366 mov (~0x80&0xf0), %r16
3367 ld [%r23], %r16
3368iaw_wait80_94:
3369 brnz %r16, iaw_wait80_94
3370 ld [%r23], %r16
3371 ba iaw_startwait80_94
3372 mov 0x80, %r16
3373continue_iaw_80_94:
3374 sllx %r16, %r8, %r16 !Mask for my core only
3375 ldxa [0x58]%asi, %r17 !Running_status
3376wait_for_stat_80_94:
3377 ldxa [0x50]%asi, %r13 !Running_rw
3378 cmp %r13, %r17
3379 bne,a %xcc, wait_for_stat_80_94
3380 ldxa [0x58]%asi, %r17 !Running_status
3381 stxa %r16, [0x68]%asi !Park (W1C)
3382 ldxa [0x50]%asi, %r14 !Running_rw
3383wait_for_iaw_80_94:
3384 ldxa [0x58]%asi, %r17 !Running_status
3385 cmp %r14, %r17
3386 bne,a %xcc, wait_for_iaw_80_94
3387 ldxa [0x50]%asi, %r14 !Running_rw
3388iaw_doit80_94:
3389 mov 0x38, %r18
3390iaw4_80_94:
3391 setx common_target, %r20, %r19
3392 or %r19, 0x1, %r19
3393 stxa %r19, [%r18]0x50
3394 stxa %r16, [0x60] %asi ! Unpark (W1S)
3395 st %g0, [%r23] !clear lock
3396 wr %r0, %r12, %asi ! restore %asi
3397 ta T_CHANGE_NONHPRIV
3398 .word 0xa5b18493 ! 127: FCMPLE32 fcmple32 %d6, %d50, %r18
3399iaw_80_95:
3400 nop
3401 ta T_CHANGE_HPRIV
3402 mov 8, %r18
3403 rd %asi, %r12
3404 wr %r0, 0x41, %asi
3405 set sync_thr_counter4, %r23
3406#ifndef SPC
3407 ldxa [%g0]0x63, %r8
3408 and %r8, 0x38, %r8 ! Core ID
3409 add %r8, %r23, %r23
3410#else
3411 mov 0, %r8
3412#endif
3413 mov 0x80, %r16
3414iaw_startwait80_95:
3415 cas [%r23],%g0,%r16 !lock
3416 brz,a %r16, continue_iaw_80_95
3417 mov (~0x80&0xf0), %r16
3418 ld [%r23], %r16
3419iaw_wait80_95:
3420 brnz %r16, iaw_wait80_95
3421 ld [%r23], %r16
3422 ba iaw_startwait80_95
3423 mov 0x80, %r16
3424continue_iaw_80_95:
3425 sllx %r16, %r8, %r16 !Mask for my core only
3426 ldxa [0x58]%asi, %r17 !Running_status
3427wait_for_stat_80_95:
3428 ldxa [0x50]%asi, %r13 !Running_rw
3429 cmp %r13, %r17
3430 bne,a %xcc, wait_for_stat_80_95
3431 ldxa [0x58]%asi, %r17 !Running_status
3432 stxa %r16, [0x68]%asi !Park (W1C)
3433 ldxa [0x50]%asi, %r14 !Running_rw
3434wait_for_iaw_80_95:
3435 ldxa [0x58]%asi, %r17 !Running_status
3436 cmp %r14, %r17
3437 bne,a %xcc, wait_for_iaw_80_95
3438 ldxa [0x50]%asi, %r14 !Running_rw
3439iaw_doit80_95:
3440 mov 0x38, %r18
3441iaw4_80_95:
3442 setx common_target, %r20, %r19
3443 or %r19, 0x1, %r19
3444 stxa %r19, [%r18]0x50
3445 stxa %r16, [0x60] %asi ! Unpark (W1S)
3446 st %g0, [%r23] !clear lock
3447 wr %r0, %r12, %asi ! restore %asi
3448 ta T_CHANGE_NONHPRIV
3449 .word 0x87ab0a53 ! 128: FCMPd fcmpd %fcc<n>, %f12, %f50
3450 .word 0x95b304c1 ! 129: FCMPNE32 fcmpne32 %d12, %d32, %r10
3451 .word 0xe88008a0 ! 130: LDUWA_R lduwa [%r0, %r0] 0x45, %r20
3452intveclr_80_97:
3453 nop
3454 ta T_CHANGE_HPRIV
3455 setx 0x4059fee120a27300, %r1, %r28
3456 stxa %r28, [%g0] 0x72
3457 .word 0x25400001 ! 131: FBPLG fblg,a,pn %fcc0, <label_0x1>
3458splash_hpstate_80_98:
3459 .word 0x8198240d ! 132: WRHPR_HPSTATE_I wrhpr %r0, 0x040d, %hpstate
3460trapasi_80_99:
3461 nop
3462 mov 0x0, %r1 ! (VA for ASI 0x72)
3463 .word 0xe8c04e40 ! 133: LDSWA_R ldswa [%r1, %r0] 0x72, %r20
3464#if (defined SPC || defined CMP)
3465!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_100)+16, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
3466!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_100)&0xffffffff) + 8, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
3467xir_80_100:
3468#else
3469#if (defined FC)
3470!! Generate XIR via RESET_GEN register
3471 ta T_CHANGE_HPRIV
3472 rdpr %pstate, %r18
3473 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
3474 wrpr %r18, %pstate
3475#ifndef XIR_RND_CORES
3476 ldxa [%g0] 0x63, %o1
3477 mov 1, %r18
3478 sllx %r18, %o1, %r18
3479#endif
3480 mov 0x30, %r19
3481 setx 0x8900000808, %r16, %r17
3482 mov 0x2, %r16
3483xir_80_100:
3484 stxa %r18, [%r19] 0x41
3485 stx %r16, [%r17]
3486#endif
3487#endif
3488 .word 0xa982a89c ! 134: WR_SET_SOFTINT_I wr %r10, 0x089c, %set_softint
3489intveclr_80_101:
3490 nop
3491 ta T_CHANGE_HPRIV
3492 setx 0x177556e31eb326cc, %r1, %r28
3493 stxa %r28, [%g0] 0x72
3494 ta T_CHANGE_NONHPRIV
3495 .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, <label_0x1>
3496intveclr_80_102:
3497 nop
3498 ta T_CHANGE_HPRIV
3499 setx 0xe3a108e3d5e744e5, %r1, %r28
3500 stxa %r28, [%g0] 0x72
3501 .word 0x25400001 ! 136: FBPLG fblg,a,pn %fcc0, <label_0x1>
3502 nop
3503 ta T_CHANGE_HPRIV ! macro
3504donret_80_103:
3505 rd %pc, %r12
3506 mov HIGHVA_HIGHNUM, %r10
3507 sllx %r10, 32, %r10
3508 or %r12, %r10, %r12
3509 add %r12, (donretarg_80_103-donret_80_103), %r12
3510 add %r12, 0x8, %r11 ! nonseq tnpc
3511 wrpr %g0, 0x2, %tl
3512 wrpr %g0, %r12, %tpc
3513 wrpr %g0, %r11, %tnpc
3514 set (0x00b85800 | (0x89 << 24)), %r13
3515 and %r12, 0xfff, %r14
3516 sllx %r14, 30, %r14
3517 or %r13, %r14, %r20
3518 wrpr %r20, %g0, %tstate
3519 wrhpr %g0, 0x1bcf, %htstate
3520 ta T_CHANGE_NONPRIV ! rand=0 (80)
3521 ldx [%r11+%r0], %g1
3522 done
3523donretarg_80_103:
3524 .word 0xe86fe0b4 ! 137: LDSTUB_I ldstub %r20, [%r31 + 0x00b4]
3525ibp_80_104:
3526 nop
3527 .word 0xe19fe0c0 ! 138: LDDFA_I ldda [%r31, 0x00c0], %f16
3528 nop
3529 ta T_CHANGE_HPRIV
3530 mov 0x80, %r10
3531 set sync_thr_counter6, %r23
3532#ifndef SPC
3533 ldxa [%g0]0x63, %o1
3534 and %o1, 0x38, %o1
3535 add %o1, %r23, %r23
3536#endif
3537 cas [%r23],%g0,%r10 !lock
3538 brnz %r10, sma_80_105
3539 rd %asi, %r12
3540 wr %g0, 0x40, %asi
3541 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
3542 set 0x00021fff, %g1
3543 stxa %g1, [%g0 + 0x80] %asi
3544 wr %r12, %g0, %asi
3545 st %g0, [%r23]
3546sma_80_105:
3547 ta T_CHANGE_NONHPRIV
3548 .word 0xe9e7e011 ! 139: CASA_R casa [%r31] %asi, %r17, %r20
3549splash_cmpr_80_106:
3550 mov 1, %r18
3551 sllx %r18, 63, %r18
3552 rd %tick, %r17
3553 add %r17, 0x70, %r17
3554 or %r17, %r18, %r17
3555 ta T_CHANGE_HPRIV
3556 wrhpr %r17, %g0, %hsys_tick_cmpr
3557 .word 0xb3800011 ! 140: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
3558iaw_80_107:
3559 nop
3560 ta T_CHANGE_HPRIV
3561 mov 8, %r18
3562 rd %asi, %r12
3563 wr %r0, 0x41, %asi
3564 set sync_thr_counter4, %r23
3565#ifndef SPC
3566 ldxa [%g0]0x63, %r8
3567 and %r8, 0x38, %r8 ! Core ID
3568 add %r8, %r23, %r23
3569#else
3570 mov 0, %r8
3571#endif
3572 mov 0x80, %r16
3573iaw_startwait80_107:
3574 cas [%r23],%g0,%r16 !lock
3575 brz,a %r16, continue_iaw_80_107
3576 mov (~0x80&0xf0), %r16
3577 ld [%r23], %r16
3578iaw_wait80_107:
3579 brnz %r16, iaw_wait80_107
3580 ld [%r23], %r16
3581 ba iaw_startwait80_107
3582 mov 0x80, %r16
3583continue_iaw_80_107:
3584 sllx %r16, %r8, %r16 !Mask for my core only
3585 ldxa [0x58]%asi, %r17 !Running_status
3586wait_for_stat_80_107:
3587 ldxa [0x50]%asi, %r13 !Running_rw
3588 cmp %r13, %r17
3589 bne,a %xcc, wait_for_stat_80_107
3590 ldxa [0x58]%asi, %r17 !Running_status
3591 stxa %r16, [0x68]%asi !Park (W1C)
3592 ldxa [0x50]%asi, %r14 !Running_rw
3593wait_for_iaw_80_107:
3594 ldxa [0x58]%asi, %r17 !Running_status
3595 cmp %r14, %r17
3596 bne,a %xcc, wait_for_iaw_80_107
3597 ldxa [0x50]%asi, %r14 !Running_rw
3598iaw_doit80_107:
3599 mov 0x38, %r18
3600iaw1_80_107:
3601 best_set_reg(0x00000000e1a00000, %r20, %r19)
3602 or %r19, 0x1, %r19
3603 stxa %r19, [%r18]0x50
3604 stxa %r16, [0x60] %asi ! Unpark (W1S)
3605 st %g0, [%r23] !clear lock
3606 wr %r0, %r12, %asi ! restore %asi
3607 ta T_CHANGE_NONHPRIV
3608 .word 0xe89fe1f0 ! 141: LDDA_I ldda [%r31, + 0x01f0] %asi, %r20
3609 .word 0x91d020b2 ! 142: Tcc_I ta icc_or_xcc, %r0 + 178
3610splash_hpstate_80_108:
3611 ta T_CHANGE_NONHPRIV
3612 .word 0x819826de ! 143: WRHPR_HPSTATE_I wrhpr %r0, 0x06de, %hpstate
3613dvapa_80_109:
3614 nop
3615 ta T_CHANGE_HPRIV
3616 mov 0x9c7, %r20
3617 mov 0x1e, %r19
3618 sllx %r20, 23, %r20
3619 or %r19, %r20, %r19
3620 stxa %r19, [%g0] ASI_LSU_CONTROL
3621 mov 0x38, %r18
3622 stxa %r31, [%r18]0x58
3623 ta T_CHANGE_NONHPRIV
3624 .word 0x87ad0a4c ! 144: FCMPd fcmpd %fcc<n>, %f20, %f12
3625 .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1>
3626 .word 0x8d902bc9 ! 145: WRPR_PSTATE_I wrpr %r0, 0x0bc9, %pstate
3627memptr_80_111:
3628 set user_data_start, %r31
3629 .word 0x8581f631 ! 146: WRCCR_I wr %r7, 0x1631, %ccr
3630ceter_80_112:
3631 nop
3632 ta T_CHANGE_HPRIV
3633 mov 7, %r17
3634 sllx %r17, 60, %r17
3635 mov 0x18, %r16
3636 stxa %r17, [%r16]0x4c
3637 ta T_CHANGE_NONHPRIV
3638 .word 0xa5410000 ! 147: RDTICK rd %tick, %r18
3639 nop
3640 ta T_CHANGE_HPRIV ! macro
3641donret_80_113:
3642 rd %pc, %r12
3643 mov HIGHVA_HIGHNUM, %r10
3644 sllx %r10, 32, %r10
3645 or %r12, %r10, %r12
3646 add %r12, (donretarg_80_113-donret_80_113+4), %r12
3647 add %r12, 0x4, %r11 ! seq tnpc
3648 andn %r11, %r10, %r11 ! low VA tnpc
3649 wrpr %g0, 0x2, %tl
3650 wrpr %g0, %r12, %tpc
3651 wrpr %g0, %r11, %tnpc
3652 set (0x0052b300 | (0x8b << 24)), %r13
3653 and %r12, 0xfff, %r14
3654 sllx %r14, 30, %r14
3655 or %r13, %r14, %r20
3656 wrpr %r20, %g0, %tstate
3657 wrhpr %g0, 0x100d, %htstate
3658 ta T_CHANGE_NONHPRIV ! rand=1 (80)
3659 ldx [%r11+%r0], %g1
3660 done
3661donretarg_80_113:
3662 .word 0xe6ffe14d ! 148: SWAPA_I swapa %r19, [%r31 + 0x014d] %asi
3663splash_tba_80_114:
3664 nop
3665 ta T_CHANGE_PRIV
3666 setx 0x00000000003a0000, %r11, %r12
3667 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba
3668splash_htba_80_115:
3669 nop
3670 ta T_CHANGE_HPRIV
3671 setx 0x00000000002a0000, %r11, %r12
3672 .word 0x8b98000c ! 150: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
3673fpinit_80_116:
3674 nop
3675 setx fp_data_quads, %r19, %r20
3676 ldd [%r20], %f0
3677 ldd [%r20+8], %f4
3678 ld [%r20+16], %fsr
3679 ld [%r20+24], %r19
3680 wr %r19, %g0, %gsr
3681 .word 0x87a80a44 ! 151: FCMPd fcmpd %fcc<n>, %f0, %f4
3682tagged_80_117:
3683 taddcctv %r2, 0x1911, %r18
3684 .word 0xe607e1d5 ! 152: LDUW_I lduw [%r31 + 0x01d5], %r19
3685#if (defined SPC || defined CMP)
3686!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_118)+56, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
3687!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_118)&0xffffffff) + 48, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
3688xir_80_118:
3689#else
3690#if (defined FC)
3691!! Generate XIR via RESET_GEN register
3692 ta T_CHANGE_HPRIV
3693 rdpr %pstate, %r18
3694 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
3695 wrpr %r18, %pstate
3696#ifndef XIR_RND_CORES
3697 ldxa [%g0] 0x63, %o1
3698 mov 1, %r18
3699 sllx %r18, %o1, %r18
3700#endif
3701 mov 0x30, %r19
3702 setx 0x8900000808, %r16, %r17
3703 mov 0x2, %r16
3704xir_80_118:
3705 stxa %r18, [%r19] 0x41
3706 stx %r16, [%r17]
3707#endif
3708#endif
3709 .word 0xa984b1d5 ! 153: WR_SET_SOFTINT_I wr %r18, 0x11d5, %set_softint
3710 .word 0x89800011 ! 154: WRTICK_R wr %r0, %r17, %tick
3711mondo_80_120:
3712 nop
3713 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
3714 stxa %r11, [%r0+0x3d0] %asi
3715 .word 0x9d910004 ! 155: WRPR_WSTATE_R wrpr %r4, %r4, %wstate
3716 .word 0xe737c000 ! 156: STQF_R - %f19, [%r0, %r31]
3717 .word 0x87802020 ! 157: WRASI_I wr %r0, 0x0020, %asi
3718 .word 0x9a693ace ! 158: UDIVX_I udivx %r4, 0xffffface, %r13
3719splash_cmpr_80_121:
3720 mov 0, %r18
3721 sllx %r18, 63, %r18
3722 rd %tick, %r17
3723 add %r17, 0x70, %r17
3724 or %r17, %r18, %r17
3725 .word 0xb3800011 ! 159: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
3726 nop
3727 ta T_CHANGE_HPRIV ! macro
3728donret_80_122:
3729 rd %pc, %r12
3730 mov HIGHVA_HIGHNUM, %r10
3731 sllx %r10, 32, %r10
3732 or %r12, %r10, %r12
3733 add %r12, (donretarg_80_122-donret_80_122), %r12
3734 add %r12, 0x4, %r11 ! seq tnpc
3735 andn %r11, %r10, %r11 ! low VA tnpc
3736 wrpr %g0, 0x1, %tl
3737 wrpr %g0, %r12, %tpc
3738 wrpr %g0, %r11, %tnpc
3739 set (0x00172600 | (57 << 24)), %r13
3740 and %r12, 0xfff, %r14
3741 sllx %r14, 30, %r14
3742 or %r13, %r14, %r20
3743 wrpr %r20, %g0, %tstate
3744 wrhpr %g0, 0x162f, %htstate
3745 ta T_CHANGE_NONPRIV ! rand=0 (80)
3746 ldx [%r12+%r0], %g1
3747 retry
3748donretarg_80_122:
3749 .word 0x93a4c9c6 ! 160: FDIVd fdivd %f50, %f6, %f40
3750pmu_80_123:
3751 nop
3752 setx 0xffffffb2ffffffa5, %g1, %g7
3753 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
3754splash_tba_80_124:
3755 nop
3756 ta T_CHANGE_PRIV
3757 set 0x120000, %r12
3758 .word 0x8b90000c ! 162: WRPR_TBA_R wrpr %r0, %r12, %tba
3759mondo_80_125:
3760 nop
3761 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
3762 ta T_CHANGE_PRIV
3763 stxa %r16, [%r0+0x3d8] %asi
3764 .word 0x9d908009 ! 163: WRPR_WSTATE_R wrpr %r2, %r9, %wstate
3765 .word 0xa1902001 ! 164: WRPR_GL_I wrpr %r0, 0x0001, %-
3766trapasi_80_126:
3767 nop
3768 mov 0x28, %r1 ! (VA for ASI 0x5b)
3769 .word 0xda884b60 ! 165: LDUBA_R lduba [%r1, %r0] 0x5b, %r13
3770 .word 0x8d802004 ! 166: WRFPRS_I wr %r0, 0x0004, %fprs
3771splash_tba_80_127:
3772 nop
3773 ta T_CHANGE_PRIV
3774 setx 0x00000000003a0000, %r11, %r12
3775 .word 0x8b90000c ! 167: WRPR_TBA_R wrpr %r0, %r12, %tba
3776 invalw
3777 mov 0x34, %r30
3778 .word 0x83d0001e ! 168: Tcc_R te icc_or_xcc, %r0 + %r30
3779 nop
3780 ta T_CHANGE_HPRIV
3781 mov 0x80, %r10
3782 set sync_thr_counter6, %r23
3783#ifndef SPC
3784 ldxa [%g0]0x63, %o1
3785 and %o1, 0x38, %o1
3786 add %o1, %r23, %r23
3787#endif
3788 cas [%r23],%g0,%r10 !lock
3789 brnz %r10, sma_80_128
3790 rd %asi, %r12
3791 wr %g0, 0x40, %asi
3792 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
3793 set 0x000e1fff, %g1
3794 stxa %g1, [%g0 + 0x80] %asi
3795 wr %r12, %g0, %asi
3796 st %g0, [%r23]
3797sma_80_128:
3798 ta T_CHANGE_NONHPRIV
3799 .word 0xdbe7e00d ! 169: CASA_R casa [%r31] %asi, %r13, %r13
3800 .word 0x9f8020fa ! 170: SIR sir 0x00fa
3801 .word 0x8d902431 ! 171: WRPR_PSTATE_I wrpr %r0, 0x0431, %pstate
3802ibp_80_130:
3803 nop
3804 ta T_CHANGE_NONHPRIV
3805 .word 0xc1bfe020 ! 172: STDFA_I stda %f0, [0x0020, %r31]
3806 .word 0xa46ca955 ! 173: UDIVX_I udivx %r18, 0x0955, %r18
3807 .word 0xa9690009 ! 174: SDIVX_R sdivx %r4, %r9, %r20
3808dvapa_80_131:
3809 nop
3810 ta T_CHANGE_HPRIV
3811 mov 0x95c, %r20
3812 mov 0x7, %r19
3813 sllx %r20, 23, %r20
3814 or %r19, %r20, %r19
3815 stxa %r19, [%g0] ASI_LSU_CONTROL
3816 mov 0x38, %r18
3817 stxa %r31, [%r18]0x58
3818 ta T_CHANGE_NONHPRIV
3819 .word 0xe0dfc02d ! 175: LDXA_R ldxa [%r31, %r13] 0x01, %r16
3820 .word 0xa7852b4e ! 176: WR_GRAPHICS_STATUS_REG_I wr %r20, 0x0b4e, %-
3821 nop
3822 ta T_CHANGE_HPRIV
3823 mov 0x80+1, %r10
3824 set sync_thr_counter5, %r23
3825#ifndef SPC
3826 ldxa [%g0]0x63, %o1
3827 and %o1, 0x38, %o1
3828 add %o1, %r23, %r23
3829 sllx %o1, 5, %o3 !(CID*256)
3830#endif
3831 cas [%r23],%g0,%r10 !lock
3832 brnz %r10, cwq_80_132
3833 rd %asi, %r12
3834 wr %g0, 0x40, %asi
3835 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
3836 and %l1, 0x3, %l1 ! Check if busy/enabled ..
3837 cmp %l1, 1
3838 bne cwq_80_132
3839 set CWQ_BASE, %l6
3840#ifndef SPC
3841 add %l6, %o3, %l6
3842#endif
3843 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
3844 best_set_reg(0x20610060, %l1, %l2) !# Control Word
3845 sllx %l2, 32, %l2
3846 stx %l2, [%l6 + 0x0]
3847 membar #Sync
3848 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
3849 sub %l2, 0x40, %l2
3850 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
3851 wr %r12, %g0, %asi
3852 st %g0, [%r23]
3853cwq_80_132:
3854 ta T_CHANGE_NONHPRIV
3855 .word 0x93414000 ! 177: RDPC rd %pc, %r9
3856fpinit_80_133:
3857 nop
3858 setx fp_data_quads, %r19, %r20
3859 ldd [%r20], %f0
3860 ldd [%r20+8], %f4
3861 ld [%r20+16], %fsr
3862 ld [%r20+24], %r19
3863 wr %r19, %g0, %gsr
3864 .word 0x8da009a4 ! 178: FDIVs fdivs %f0, %f4, %f6
3865splash_lsu_80_134:
3866 nop
3867 ta T_CHANGE_HPRIV
3868 set 0x902cfae4, %r2
3869 mov 0x6, %r1
3870 sllx %r1, 32, %r1
3871 or %r1, %r2, %r2
3872 stxa %r2, [%r0] ASI_LSU_CONTROL
3873 ta T_CHANGE_NONHPRIV
3874 .word 0x3d400001 ! 179: FBPULE fbule,a,pn %fcc0, <label_0x1>
3875 .word 0x87802014 ! 180: WRASI_I wr %r0, 0x0014, %asi
3876#if (defined SPC || defined CMP)
3877!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_80_135)+0, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
3878!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_80_135)&0xffffffff) + 16, 16, 16)) -> intp(mask2tid(0x80),1,3,,,,,1)
3879xir_80_135:
3880#else
3881#if (defined FC)
3882!! Generate XIR via RESET_GEN register
3883 ta T_CHANGE_HPRIV
3884 rdpr %pstate, %r18
3885 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
3886 wrpr %r18, %pstate
3887#ifndef XIR_RND_CORES
3888 ldxa [%g0] 0x63, %o1
3889 mov 1, %r18
3890 sllx %r18, %o1, %r18
3891#endif
3892 mov 0x30, %r19
3893 setx 0x8900000808, %r16, %r17
3894 mov 0x2, %r16
3895xir_80_135:
3896 stxa %r18, [%r19] 0x41
3897 stx %r16, [%r17]
3898#endif
3899#endif
3900 .word 0xa98423bb ! 181: WR_SET_SOFTINT_I wr %r16, 0x03bb, %set_softint
3901trapasi_80_136:
3902 nop
3903 mov 0x8, %r1 ! (VA for ASI 0x4a)
3904 .word 0xdac84940 ! 182: LDSBA_R ldsba [%r1, %r0] 0x4a, %r13
3905intveclr_80_137:
3906 nop
3907 ta T_CHANGE_HPRIV
3908 setx 0xd7c95357cd5464f3, %r1, %r28
3909 stxa %r28, [%g0] 0x72
3910 ta T_CHANGE_NONHPRIV
3911 .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1>
3912tagged_80_138:
3913 tsubcctv %r0, 0x16f6, %r2
3914 .word 0xda07e0dc ! 184: LDUW_I lduw [%r31 + 0x00dc], %r13
3915splash_hpstate_80_139:
3916 ta T_CHANGE_NONHPRIV
3917 .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1>
3918 .word 0x819837df ! 185: WRHPR_HPSTATE_I wrhpr %r0, 0x17df, %hpstate
3919 .word 0xda77c000 ! 186: STX_R stx %r13, [%r31 + %r0]
3920brcommon3_80_140:
3921 nop
3922 setx common_target, %r12, %r27
3923 lduw [%r27], %r12 ! Load common dest into dcache ..
3924 ba,a .+12
3925 .word 0xdb37e070 ! 1: STQF_I - %f13, [0x0070, %r31]
3926 ba,a .+8
3927 jmpl %r27+0, %r27
3928 .word 0x8d902744 ! 187: WRPR_PSTATE_I wrpr %r0, 0x0744, %pstate
3929 otherw
3930 mov 0x30, %r30
3931 .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30
3932ibp_80_141:
3933 nop
3934 .word 0x87ac8a42 ! 189: FCMPd fcmpd %fcc<n>, %f18, %f2
3935tagged_80_142:
3936 tsubcctv %r17, 0x107c, %r16
3937 .word 0xd807e12e ! 190: LDUW_I lduw [%r31 + 0x012e], %r12
3938 .word 0x87802058 ! 191: WRASI_I wr %r0, 0x0058, %asi
3939intveclr_80_143:
3940 nop
3941 ta T_CHANGE_HPRIV
3942 setx 0xcf785d1388fd1a80, %r1, %r28
3943 stxa %r28, [%g0] 0x72
3944 ta T_CHANGE_NONHPRIV
3945 .word 0x25400001 ! 192: FBPLG fblg,a,pn %fcc0, <label_0x1>
3946#if (defined SPC || defined CMP1)
3947!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_144) + 48, 16, 16)) -> intp(7,0,30,,,,,1)
3948!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_144)&0xffffffff) + 16, 16, 16)) -> intp(4,0,31,,,,,1)
3949#else
3950 set 0x49201ca0, %r28
3951#if (MAX_THREADS == 8)
3952 and %r28, 0x7ff, %r28
3953#endif
3954 stxa %r28, [%g0] 0x73
3955#endif
3956intvec_80_144:
3957 .word 0x39400001 ! 193: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
3958 .word 0x87802058 ! 194: WRASI_I wr %r0, 0x0058, %asi
3959 .word 0x89800011 ! 195: WRTICK_R wr %r0, %r17, %tick
3960dvapa_80_146:
3961 nop
3962 ta T_CHANGE_HPRIV
3963 mov 0x80c, %r20
3964 mov 0x16, %r19
3965 sllx %r20, 23, %r20
3966 or %r19, %r20, %r19
3967 stxa %r19, [%g0] ASI_LSU_CONTROL
3968 mov 0x38, %r18
3969 stxa %r31, [%r18]0x58
3970 ta T_CHANGE_NONHPRIV
3971 .word 0xc19fe000 ! 196: LDDFA_I ldda [%r31, 0x0000], %f0
3972splash_tba_80_147:
3973 nop
3974 ta T_CHANGE_PRIV
3975 setx 0x00000000003a0000, %r11, %r12
3976 .word 0x8b90000c ! 197: WRPR_TBA_R wrpr %r0, %r12, %tba
3977 .word 0x9ac1e377 ! 198: ADDCcc_I addccc %r7, 0x0377, %r13
3978pmu_80_148:
3979 nop
3980 setx 0xffffffbaffffffa2, %g1, %g7
3981 .word 0xa3800007 ! 199: WR_PERF_COUNTER_R wr %r0, %r7, %-
3982ibp_80_149:
3983 nop
3984 ta T_CHANGE_NONHPRIV
3985 .word 0xc1bfd960 ! 200: STDFA_R stda %f0, [%r0, %r31]
3986 nop
3987 nop
3988 ta T_CHANGE_PRIV
3989 wrpr %g0, %g0, %gl
3990 nop
3991 nop
3992.text
3993 setx join_lbl_0_0, %g1, %g2
3994 jmp %g2
3995 nop
3996fork_lbl_0_7:
3997 ta T_CHANGE_NONHPRIV
3998ibp_40_1:
3999 nop
4000 ta T_CHANGE_HPRIV
4001 mov 8, %r18
4002 rd %asi, %r12
4003 wr %r0, 0x41, %asi
4004 set sync_thr_counter4, %r23
4005#ifndef SPC
4006 ldxa [%g0]0x63, %r8
4007 and %r8, 0x38, %r8 ! Core ID
4008 add %r8, %r23, %r23
4009#else
4010 mov 0, %r8
4011#endif
4012 mov 0x40, %r16
4013ibp_startwait40_1:
4014 cas [%r23],%g0,%r16 !lock
4015 brz,a %r16, continue_ibp_40_1
4016 mov (~0x40&0xf0), %r16
4017 ld [%r23], %r16
4018ibp_wait40_1:
4019 brnz %r16, ibp_wait40_1
4020 ld [%r23], %r16
4021 ba ibp_startwait40_1
4022 mov 0x40, %r16
4023continue_ibp_40_1:
4024 sllx %r16, %r8, %r16 !Mask for my core only
4025 ldxa [0x58]%asi, %r17 !Running_status
4026wait_for_stat_40_1:
4027 ldxa [0x50]%asi, %r13 !Running_rw
4028 cmp %r13, %r17
4029 bne,a %xcc, wait_for_stat_40_1
4030 ldxa [0x58]%asi, %r17 !Running_status
4031 stxa %r16, [0x68]%asi !Park (W1C)
4032 ldxa [0x50]%asi, %r14 !Running_rw
4033wait_for_ibp_40_1:
4034 ldxa [0x58]%asi, %r17 !Running_status
4035 cmp %r14, %r17
4036 bne,a %xcc, wait_for_ibp_40_1
4037 ldxa [0x50]%asi, %r14 !Running_rw
4038ibp_doit40_1:
4039 best_set_reg(0x00000050f9c000be,%r19, %r20)
4040 stxa %r20, [%r18]0x42
4041 stxa %r16, [0x60] %asi !Unpark (W1S)
4042 st %g0, [%r23] !clear lock
4043 wr %r0, %r12, %asi !restore %asi
4044 .word 0xc1bfe060 ! 1: STDFA_I stda %f0, [0x0060, %r31]
4045splash_cmpr_40_2:
4046 mov 1, %r18
4047 sllx %r18, 63, %r18
4048 rd %tick, %r17
4049 add %r17, 0x80, %r17
4050 or %r17, %r18, %r17
4051 .word 0xaf800011 ! 2: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
4052mondo_40_3:
4053 nop
4054 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
4055 ta T_CHANGE_PRIV
4056 stxa %r6, [%r0+0x3c8] %asi
4057 .word 0x9d930013 ! 3: WRPR_WSTATE_R wrpr %r12, %r19, %wstate
4058 .word 0xc19fe0e0 ! 4: LDDFA_I ldda [%r31, 0x00e0], %f0
4059 nop
4060 ta T_CHANGE_HPRIV
4061 mov 0x40+1, %r10
4062 set sync_thr_counter5, %r23
4063#ifndef SPC
4064 ldxa [%g0]0x63, %o1
4065 and %o1, 0x38, %o1
4066 add %o1, %r23, %r23
4067 sllx %o1, 5, %o3 !(CID*256)
4068#endif
4069 cas [%r23],%g0,%r10 !lock
4070 brnz %r10, cwq_40_4
4071 rd %asi, %r12
4072 wr %g0, 0x40, %asi
4073 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
4074 and %l1, 0x3, %l1 ! Check if busy/enabled ..
4075 cmp %l1, 1
4076 bne cwq_40_4
4077 set CWQ_BASE, %l6
4078#ifndef SPC
4079 add %l6, %o3, %l6
4080#endif
4081 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
4082 best_set_reg(0x20610050, %l1, %l2) !# Control Word
4083 sllx %l2, 32, %l2
4084 stx %l2, [%l6 + 0x0]
4085 membar #Sync
4086 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
4087 sub %l2, 0x40, %l2
4088 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
4089 wr %r12, %g0, %asi
4090 st %g0, [%r23]
4091cwq_40_4:
4092 ta T_CHANGE_NONHPRIV
4093 .word 0xa9414000 ! 5: RDPC rd %pc, %r20
4094 nop
4095 ta T_CHANGE_HPRIV ! macro
4096donret_40_5:
4097 rd %pc, %r12
4098 mov HIGHVA_HIGHNUM, %r10
4099 sllx %r10, 32, %r10
4100 or %r12, %r10, %r12
4101 add %r12, (donretarg_40_5-donret_40_5), %r12
4102 add %r12, 0x8, %r11 ! nonseq tnpc
4103 wrpr %g0, 0x2, %tl
4104 wrpr %g0, %r12, %tpc
4105 wrpr %g0, %r11, %tnpc
4106 set (0x003a6a00 | (0x89 << 24)), %r13
4107 and %r12, 0xfff, %r14
4108 sllx %r14, 30, %r14
4109 or %r13, %r14, %r20
4110 wrpr %r20, %g0, %tstate
4111 wrhpr %g0, 0x1d8f, %htstate
4112 ta T_CHANGE_NONPRIV ! rand=0 (40)
4113 ldx [%r11+%r0], %g1
4114 done
4115donretarg_40_5:
4116 .word 0x8d903d59 ! 6: WRPR_PSTATE_I wrpr %r0, 0x1d59, %pstate
4117 .word 0xe937e09d ! 7: STQF_I - %f20, [0x009d, %r31]
4118jmptr_40_6:
4119 nop
4120 best_set_reg(0xe1200000, %r20, %r27)
4121 .word 0xb7c6c000 ! 8: JMPL_R jmpl %r27 + %r0, %r27
4122 rd %tick, %r28
4123#if (MAX_THREADS == 8)
4124 sethi %hi(0x33800), %r27
4125#else
4126 sethi %hi(0x30000), %r27
4127#endif
4128 andn %r28, %r27, %r28
4129 ta T_CHANGE_HPRIV
4130 stxa %r28, [%g0] 0x73
4131intvec_40_7:
4132 .word 0x39400001 ! 9: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4133 .word 0xa9b7c490 ! 1: FCMPLE32 fcmple32 %d62, %d16, %r20
4134 .word 0x9f80310b ! 10: SIR sir 0x110b
4135 .word 0x8d802000 ! 11: WRFPRS_I wr %r0, 0x0000, %fprs
4136trapasi_40_8:
4137 nop
4138 mov 0x10, %r1 ! (VA for ASI 0x48)
4139 .word 0xe8d04900 ! 12: LDSHA_R ldsha [%r1, %r0] 0x48, %r20
4140 .word 0xe81fe1e0 ! 13: LDD_I ldd [%r31 + 0x01e0], %r20
4141 .word 0x2ac88001 ! 1: BRNZ brnz,a,pt %r2,<label_0x88001>
4142 .word 0x8d902c3b ! 14: WRPR_PSTATE_I wrpr %r0, 0x0c3b, %pstate
4143 nop
4144 ta T_CHANGE_HPRIV
4145 mov 0x40+1, %r10
4146 set sync_thr_counter5, %r23
4147#ifndef SPC
4148 ldxa [%g0]0x63, %o1
4149 and %o1, 0x38, %o1
4150 add %o1, %r23, %r23
4151 sllx %o1, 5, %o3 !(CID*256)
4152#endif
4153 cas [%r23],%g0,%r10 !lock
4154 brnz %r10, cwq_40_10
4155 rd %asi, %r12
4156 wr %g0, 0x40, %asi
4157 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
4158 and %l1, 0x3, %l1 ! Check if busy/enabled ..
4159 cmp %l1, 1
4160 bne cwq_40_10
4161 set CWQ_BASE, %l6
4162#ifndef SPC
4163 add %l6, %o3, %l6
4164#endif
4165 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
4166 best_set_reg(0x20610010, %l1, %l2) !# Control Word
4167 sllx %l2, 32, %l2
4168 stx %l2, [%l6 + 0x0]
4169 membar #Sync
4170 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
4171 sub %l2, 0x40, %l2
4172 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
4173 wr %r12, %g0, %asi
4174 st %g0, [%r23]
4175cwq_40_10:
4176 ta T_CHANGE_NONHPRIV
4177 .word 0xa9414000 ! 15: RDPC rd %pc, %r20
4178brcommon2_40_11:
4179 nop
4180 setx common_target, %r12, %r27
4181 ba,a .+12
4182 .word 0x81dfc013 ! 1: FLUSH_R flush %r31, %r19, %r0
4183 ba,a .+8
4184 jmpl %r27+0, %r27
4185 .word 0xc19fc2c0 ! 16: LDDFA_R ldda [%r31, %r0], %f0
4186jmptr_40_12:
4187 nop
4188 best_set_reg(0xe1200000, %r20, %r27)
4189 .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27
4190mondo_40_13:
4191 nop
4192 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
4193 ta T_CHANGE_PRIV
4194 stxa %r7, [%r0+0x3d8] %asi
4195 .word 0x9d934003 ! 18: WRPR_WSTATE_R wrpr %r13, %r3, %wstate
4196mondo_40_14:
4197 nop
4198 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
4199 stxa %r20, [%r0+0x3d0] %asi
4200 .word 0x9d90c014 ! 19: WRPR_WSTATE_R wrpr %r3, %r20, %wstate
4201splash_cmpr_40_15:
4202 mov 0, %r18
4203 sllx %r18, 63, %r18
4204 rd %tick, %r17
4205 add %r17, 0x100, %r17
4206 or %r17, %r18, %r17
4207 ta T_CHANGE_HPRIV
4208 wrhpr %r17, %g0, %hsys_tick_cmpr
4209 .word 0xaf800011 ! 20: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
4210#if (defined SPC || defined CMP1)
4211!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_16) + 32, 16, 16)) -> intp(7,0,26,,,,,1)
4212!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_16)&0xffffffff) + 0, 16, 16)) -> intp(6,0,27,,,,,1)
4213#else
4214 set 0xb2b07301, %r28
4215#if (MAX_THREADS == 8)
4216 and %r28, 0x7ff, %r28
4217#endif
4218 stxa %r28, [%g0] 0x73
4219#endif
4220intvec_40_16:
4221 .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4222 .word 0x81dd0011 ! 22: FLUSH_R flush %r20, %r17, %r0
4223 .word 0x24ca0001 ! 1: BRLEZ brlez,a,pt %r8,<label_0xa0001>
4224 .word 0x8d903395 ! 23: WRPR_PSTATE_I wrpr %r0, 0x1395, %pstate
4225 .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl
4226reduce_priv_lvl_40_18:
4227 ta T_CHANGE_NONHPRIV ! macro
4228mondo_40_19:
4229 nop
4230 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
4231 stxa %r3, [%r0+0x3d0] %asi
4232 .word 0x9d92c012 ! 25: WRPR_WSTATE_R wrpr %r11, %r18, %wstate
4233 .word 0x81510000 ! 26: RDPR_TICK rdpr %tick, %r0
4234 .word 0x879ce6c3 ! 27: WRHPR_HINTP_I wrhpr %r19, 0x06c3, %hintp
4235fpinit_40_20:
4236 nop
4237 setx fp_data_quads, %r19, %r20
4238 ldd [%r20], %f0
4239 ldd [%r20+8], %f4
4240 ld [%r20+16], %fsr
4241 ld [%r20+24], %r19
4242 wr %r19, %g0, %gsr
4243 .word 0x89b00484 ! 28: FCMPLE32 fcmple32 %d0, %d4, %r4
4244mondo_40_21:
4245 nop
4246 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
4247 stxa %r16, [%r0+0x3e0] %asi
4248 .word 0x9d94c010 ! 29: WRPR_WSTATE_R wrpr %r19, %r16, %wstate
4249splash_hpstate_40_22:
4250 .word 0x81982ff5 ! 30: WRHPR_HPSTATE_I wrhpr %r0, 0x0ff5, %hpstate
4251splash_tba_40_23:
4252 nop
4253 ta T_CHANGE_PRIV
4254 setx 0x0000000400380000, %r11, %r12
4255 .word 0x8b90000c ! 31: WRPR_TBA_R wrpr %r0, %r12, %tba
4256trapasi_40_24:
4257 nop
4258 mov 0x110, %r1 ! (VA for ASI 0x4a)
4259 .word 0xe8c04940 ! 32: LDSWA_R ldswa [%r1, %r0] 0x4a, %r20
4260 rd %tick, %r28
4261#if (MAX_THREADS == 8)
4262 sethi %hi(0x33800), %r27
4263#else
4264 sethi %hi(0x30000), %r27
4265#endif
4266 andn %r28, %r27, %r28
4267 ta T_CHANGE_HPRIV
4268 stxa %r28, [%g0] 0x73
4269intvec_40_25:
4270 .word 0x39400001 ! 33: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4271 nop
4272 ta T_CHANGE_HPRIV
4273 mov 0x40, %r10
4274 set sync_thr_counter6, %r23
4275#ifndef SPC
4276 ldxa [%g0]0x63, %o1
4277 and %o1, 0x38, %o1
4278 add %o1, %r23, %r23
4279#endif
4280 cas [%r23],%g0,%r10 !lock
4281 brnz %r10, sma_40_26
4282 rd %asi, %r12
4283 wr %g0, 0x40, %asi
4284 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
4285 set 0x001e1fff, %g1
4286 stxa %g1, [%g0 + 0x80] %asi
4287 wr %r12, %g0, %asi
4288 st %g0, [%r23]
4289sma_40_26:
4290 ta T_CHANGE_NONHPRIV
4291 .word 0xe9e7e008 ! 34: CASA_R casa [%r31] %asi, %r8, %r20
4292 .word 0xe89fe000 ! 35: LDDA_I ldda [%r31, + 0x0000] %asi, %r20
4293 nop
4294 ta T_CHANGE_HPRIV
4295 mov 0x40, %r10
4296 set sync_thr_counter6, %r23
4297#ifndef SPC
4298 ldxa [%g0]0x63, %o1
4299 and %o1, 0x38, %o1
4300 add %o1, %r23, %r23
4301#endif
4302 cas [%r23],%g0,%r10 !lock
4303 brnz %r10, sma_40_27
4304 rd %asi, %r12
4305 wr %g0, 0x40, %asi
4306 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
4307 set 0x000e1fff, %g1
4308 stxa %g1, [%g0 + 0x80] %asi
4309 wr %r12, %g0, %asi
4310 st %g0, [%r23]
4311sma_40_27:
4312 ta T_CHANGE_NONHPRIV
4313 .word 0xe9e7e014 ! 36: CASA_R casa [%r31] %asi, %r20, %r20
4314 nop
4315 ta T_CHANGE_HPRIV ! macro
4316donret_40_28:
4317 rd %pc, %r12
4318 mov HIGHVA_HIGHNUM, %r10
4319 sllx %r10, 32, %r10
4320 or %r12, %r10, %r12
4321 add %r12, (donretarg_40_28-donret_40_28), %r12
4322 add %r12, 0x4, %r11 ! seq tnpc
4323 andn %r11, %r10, %r11 ! low VA tnpc
4324 wrpr %g0, 0x2, %tl
4325 wrpr %g0, %r12, %tpc
4326 wrpr %g0, %r11, %tnpc
4327 set (0x00704000 | (20 << 24)), %r13
4328 and %r12, 0xfff, %r14
4329 sllx %r14, 30, %r14
4330 or %r13, %r14, %r20
4331 wrpr %r20, %g0, %tstate
4332 wrhpr %g0, 0x1d85, %htstate
4333 ta T_CHANGE_NONHPRIV ! rand=1 (40)
4334 retry
4335donretarg_40_28:
4336 .word 0x21400001 ! 37: FBPN fbn,a,pn %fcc0, <label_0x1>
4337brcommon2_40_29:
4338 nop
4339 setx common_target, %r12, %r27
4340 ba,a .+12
4341 .word 0xa9a7c971 ! 1: FMULq dis not found
4342
4343 ba,a .+8
4344 jmpl %r27+0, %r27
4345 .word 0xe19fe1c0 ! 38: LDDFA_I ldda [%r31, 0x01c0], %f16
4346 .word 0x91914013 ! 39: WRPR_PIL_R wrpr %r5, %r19, %pil
4347 .word 0xd877e128 ! 40: STX_I stx %r12, [%r31 + 0x0128]
4348 nop
4349 ta T_CHANGE_HPRIV
4350 mov 0x40+1, %r10
4351 set sync_thr_counter5, %r23
4352#ifndef SPC
4353 ldxa [%g0]0x63, %o1
4354 and %o1, 0x38, %o1
4355 add %o1, %r23, %r23
4356 sllx %o1, 5, %o3 !(CID*256)
4357#endif
4358 cas [%r23],%g0,%r10 !lock
4359 brnz %r10, cwq_40_31
4360 rd %asi, %r12
4361 wr %g0, 0x40, %asi
4362 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
4363 and %l1, 0x3, %l1 ! Check if busy/enabled ..
4364 cmp %l1, 1
4365 bne cwq_40_31
4366 set CWQ_BASE, %l6
4367#ifndef SPC
4368 add %l6, %o3, %l6
4369#endif
4370 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
4371 best_set_reg(0x20610000, %l1, %l2) !# Control Word
4372 sllx %l2, 32, %l2
4373 stx %l2, [%l6 + 0x0]
4374 membar #Sync
4375 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
4376 sub %l2, 0x40, %l2
4377 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
4378 wr %r12, %g0, %asi
4379 st %g0, [%r23]
4380cwq_40_31:
4381 ta T_CHANGE_NONHPRIV
4382 .word 0x93414000 ! 41: RDPC rd %pc, %r9
4383 .word 0xe7e7e010 ! 42: CASA_R casa [%r31] %asi, %r16, %r19
4384 nop
4385 ta T_CHANGE_HPRIV
4386 mov 0x40, %r10
4387 set sync_thr_counter6, %r23
4388#ifndef SPC
4389 ldxa [%g0]0x63, %o1
4390 and %o1, 0x38, %o1
4391 add %o1, %r23, %r23
4392#endif
4393 cas [%r23],%g0,%r10 !lock
4394 brnz %r10, sma_40_33
4395 rd %asi, %r12
4396 wr %g0, 0x40, %asi
4397 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
4398 set 0x00121fff, %g1
4399 stxa %g1, [%g0 + 0x80] %asi
4400 wr %r12, %g0, %asi
4401 st %g0, [%r23]
4402sma_40_33:
4403 ta T_CHANGE_NONHPRIV
4404 .word 0xe7e7e00b ! 43: CASA_R casa [%r31] %asi, %r11, %r19
4405 nop
4406 ta T_CHANGE_HPRIV ! macro
4407donret_40_34:
4408 rd %pc, %r12
4409 mov HIGHVA_HIGHNUM, %r10
4410 sllx %r10, 32, %r10
4411 or %r12, %r10, %r12
4412 add %r12, (donretarg_40_34-donret_40_34+4), %r12
4413 add %r12, 0x4, %r11 ! seq tnpc
4414 wrpr %g0, 0x1, %tl
4415 wrpr %g0, %r12, %tpc
4416 wrpr %g0, %r11, %tnpc
4417 set (0x00e28900 | (28 << 24)), %r13
4418 and %r12, 0xfff, %r14
4419 sllx %r14, 30, %r14
4420 or %r13, %r14, %r20
4421 wrpr %r20, %g0, %tstate
4422 wrhpr %g0, 0x1458, %htstate
4423 ta T_CHANGE_NONPRIV ! rand=0 (40)
4424 retry
4425donretarg_40_34:
4426 .word 0xe66fe125 ! 44: LDSTUB_I ldstub %r19, [%r31 + 0x0125]
4427 nop
4428 mov 0x80, %g3
4429 .word 0x2cc90001 ! 1: BRGZ brgz,a,pt %r4,<label_0x90001>
4430 stxa %g3, [%g3] 0x5f
4431 .word 0xe65fc000 ! 45: LDX_R ldx [%r31 + %r0], %r19
4432#if (defined SPC || defined CMP)
4433!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_35)+24, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
4434!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_35)&0xffffffff) + 40, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
4435xir_40_35:
4436#else
4437#if (defined FC)
4438!! Generate XIR via RESET_GEN register
4439 ta T_CHANGE_HPRIV
4440 rdpr %pstate, %r18
4441 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
4442 wrpr %r18, %pstate
4443#ifndef XIR_RND_CORES
4444 ldxa [%g0] 0x63, %o1
4445 mov 1, %r18
4446 sllx %r18, %o1, %r18
4447#endif
4448 mov 0x30, %r19
4449 setx 0x8900000808, %r16, %r17
4450 mov 0x2, %r16
4451xir_40_35:
4452 stxa %r18, [%r19] 0x41
4453 stx %r16, [%r17]
4454#endif
4455#endif
4456 .word 0xa984ed92 ! 46: WR_SET_SOFTINT_I wr %r19, 0x0d92, %set_softint
4457 .word 0xe71fc00b ! 47: LDDF_R ldd [%r31, %r11], %f19
4458 nop
4459 ta T_CHANGE_HPRIV ! macro
4460donret_40_37:
4461 rd %pc, %r12
4462 mov HIGHVA_HIGHNUM, %r10
4463 sllx %r10, 32, %r10
4464 or %r12, %r10, %r12
4465 add %r12, (donretarg_40_37-donret_40_37+4), %r12
4466 add %r12, 0x4, %r11 ! seq tnpc
4467 andn %r12, %r10, %r12 ! low VA tpc
4468 wrpr %g0, 0x2, %tl
4469 wrpr %g0, %r12, %tpc
4470 wrpr %g0, %r11, %tnpc
4471 set (0x00385300 | (4 << 24)), %r13
4472 and %r12, 0xfff, %r14
4473 sllx %r14, 30, %r14
4474 or %r13, %r14, %r20
4475 wrpr %r20, %g0, %tstate
4476 wrhpr %g0, 0x1dd5, %htstate
4477 ta T_CHANGE_NONPRIV ! rand=0 (40)
4478 ldx [%r11+%r0], %g1
4479 done
4480.align 32
4481donretarg_40_37:
4482 .word 0x8d9036df ! 48: WRPR_PSTATE_I wrpr %r0, 0x16df, %pstate
4483 .word 0x89800011 ! 49: WRTICK_R wr %r0, %r17, %tick
4484 .word 0xe1bfe100 ! 50: STDFA_I stda %f16, [0x0100, %r31]
4485splash_lsu_40_40:
4486 nop
4487 ta T_CHANGE_HPRIV
4488 set 0x426c8412, %r2
4489 mov 0x4, %r1
4490 sllx %r1, 32, %r1
4491 or %r1, %r2, %r2
4492 stxa %r2, [%r0] ASI_LSU_CONTROL
4493 .word 0x3d400001 ! 51: FBPULE fbule,a,pn %fcc0, <label_0x1>
4494change_to_randtl_40_41:
4495 ta T_CHANGE_HPRIV ! macro
4496done_change_to_randtl_40_41:
4497 .word 0x8f902000 ! 52: WRPR_TL_I wrpr %r0, 0x0000, %tl
4498 .word 0xc1bfdb60 ! 53: STDFA_R stda %f0, [%r0, %r31]
4499 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick
4500 nop
4501 ta T_CHANGE_HPRIV ! macro
4502donret_40_43:
4503 rd %pc, %r12
4504 mov HIGHVA_HIGHNUM, %r10
4505 sllx %r10, 32, %r10
4506 or %r12, %r10, %r12
4507 add %r12, (donretarg_40_43-donret_40_43+4), %r12
4508 add %r12, 0x4, %r11 ! seq tnpc
4509 wrpr %g0, 0x2, %tl
4510 wrpr %g0, %r12, %tpc
4511 wrpr %g0, %r11, %tnpc
4512 set (0x0063af00 | (0x89 << 24)), %r13
4513 and %r12, 0xfff, %r14
4514 sllx %r14, 30, %r14
4515 or %r13, %r14, %r20
4516 wrpr %r20, %g0, %tstate
4517 wrhpr %g0, 0xe17, %htstate
4518 ta T_CHANGE_NONPRIV ! rand=0 (40)
4519 .word 0x2e800001 ! 1: BVS bvs,a <label_0x1>
4520 done
4521.align 32
4522donretarg_40_43:
4523 .word 0x8d902c4d ! 55: WRPR_PSTATE_I wrpr %r0, 0x0c4d, %pstate
4524 .word 0xe64fc000 ! 56: LDSB_R ldsb [%r31 + %r0], %r19
4525 .word 0xe71fe1b8 ! 57: LDDF_I ldd [%r31, 0x01b8], %f19
4526 .word 0x87802055 ! 58: WRASI_I wr %r0, 0x0055, %asi
4527 .word 0x89800011 ! 59: WRTICK_R wr %r0, %r17, %tick
4528 nop
4529 ta T_CHANGE_HPRIV
4530 mov 0x40+1, %r10
4531 set sync_thr_counter5, %r23
4532#ifndef SPC
4533 ldxa [%g0]0x63, %o1
4534 and %o1, 0x38, %o1
4535 add %o1, %r23, %r23
4536 sllx %o1, 5, %o3 !(CID*256)
4537#endif
4538 cas [%r23],%g0,%r10 !lock
4539 brnz %r10, cwq_40_45
4540 rd %asi, %r12
4541 wr %g0, 0x40, %asi
4542 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
4543 and %l1, 0x3, %l1 ! Check if busy/enabled ..
4544 cmp %l1, 1
4545 bne cwq_40_45
4546 set CWQ_BASE, %l6
4547#ifndef SPC
4548 add %l6, %o3, %l6
4549#endif
4550 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
4551 best_set_reg(0x206100e0, %l1, %l2) !# Control Word
4552 sllx %l2, 32, %l2
4553 stx %l2, [%l6 + 0x0]
4554 membar #Sync
4555 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
4556 sub %l2, 0x40, %l2
4557 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
4558 wr %r12, %g0, %asi
4559 st %g0, [%r23]
4560cwq_40_45:
4561 ta T_CHANGE_NONHPRIV
4562 .word 0x99414000 ! 60: RDPC rd %pc, %r12
4563mondo_40_46:
4564 nop
4565 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
4566 ta T_CHANGE_PRIV
4567 stxa %r2, [%r0+0x3e8] %asi
4568 .word 0x9d910004 ! 61: WRPR_WSTATE_R wrpr %r4, %r4, %wstate
4569 .word 0x93d020b2 ! 62: Tcc_I tne icc_or_xcc, %r0 + 178
4570splash_lsu_40_47:
4571 nop
4572 ta T_CHANGE_HPRIV
4573 set 0x2da82354, %r2
4574 mov 0x4, %r1
4575 sllx %r1, 32, %r1
4576 or %r1, %r2, %r2
4577 stxa %r2, [%r0] ASI_LSU_CONTROL
4578 .word 0x3d400001 ! 63: FBPULE fbule,a,pn %fcc0, <label_0x1>
4579ibp_40_48:
4580 nop
4581 ta T_CHANGE_HPRIV
4582 mov 8, %r18
4583 rd %asi, %r12
4584 wr %r0, 0x41, %asi
4585 set sync_thr_counter4, %r23
4586#ifndef SPC
4587 ldxa [%g0]0x63, %r8
4588 and %r8, 0x38, %r8 ! Core ID
4589 add %r8, %r23, %r23
4590#else
4591 mov 0, %r8
4592#endif
4593 mov 0x40, %r16
4594ibp_startwait40_48:
4595 cas [%r23],%g0,%r16 !lock
4596 brz,a %r16, continue_ibp_40_48
4597 mov (~0x40&0xf0), %r16
4598 ld [%r23], %r16
4599ibp_wait40_48:
4600 brnz %r16, ibp_wait40_48
4601 ld [%r23], %r16
4602 ba ibp_startwait40_48
4603 mov 0x40, %r16
4604continue_ibp_40_48:
4605 sllx %r16, %r8, %r16 !Mask for my core only
4606 ldxa [0x58]%asi, %r17 !Running_status
4607wait_for_stat_40_48:
4608 ldxa [0x50]%asi, %r13 !Running_rw
4609 cmp %r13, %r17
4610 bne,a %xcc, wait_for_stat_40_48
4611 ldxa [0x58]%asi, %r17 !Running_status
4612 stxa %r16, [0x68]%asi !Park (W1C)
4613 ldxa [0x50]%asi, %r14 !Running_rw
4614wait_for_ibp_40_48:
4615 ldxa [0x58]%asi, %r17 !Running_status
4616 cmp %r14, %r17
4617 bne,a %xcc, wait_for_ibp_40_48
4618 ldxa [0x50]%asi, %r14 !Running_rw
4619ibp_doit40_48:
4620 best_set_reg(0x0000004034c0be75,%r19, %r20)
4621 stxa %r20, [%r18]0x42
4622 stxa %r16, [0x60] %asi !Unpark (W1S)
4623 st %g0, [%r23] !clear lock
4624 wr %r0, %r12, %asi !restore %asi
4625 .word 0xe19fdf20 ! 64: LDDFA_R ldda [%r31, %r0], %f16
4626splash_hpstate_40_49:
4627 .word 0x819826c5 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x06c5, %hpstate
4628 .word 0x8d903571 ! 66: WRPR_PSTATE_I wrpr %r0, 0x1571, %pstate
4629 rd %tick, %r28
4630#if (MAX_THREADS == 8)
4631 sethi %hi(0x33800), %r27
4632#else
4633 sethi %hi(0x30000), %r27
4634#endif
4635 andn %r28, %r27, %r28
4636 ta T_CHANGE_HPRIV
4637 stxa %r28, [%g0] 0x73
4638intvec_40_51:
4639 .word 0x39400001 ! 67: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4640 .word 0xa370344d ! 68: POPC_I popc 0x144d, %r17
4641 nop
4642 ta T_CHANGE_HPRIV ! macro
4643donret_40_53:
4644 rd %pc, %r12
4645 mov HIGHVA_HIGHNUM, %r10
4646 sllx %r10, 32, %r10
4647 or %r12, %r10, %r12
4648 add %r12, (donretarg_40_53-donret_40_53+4), %r12
4649 add %r12, 0x4, %r11 ! seq tnpc
4650 wrpr %g0, 0x2, %tl
4651 wrpr %g0, %r12, %tpc
4652 wrpr %g0, %r11, %tnpc
4653 set (0x00757b00 | (0x58 << 24)), %r13
4654 and %r12, 0xfff, %r14
4655 sllx %r14, 30, %r14
4656 or %r13, %r14, %r20
4657 wrpr %r20, %g0, %tstate
4658 wrhpr %g0, 0x1ecd, %htstate
4659 ta T_CHANGE_NONPRIV ! rand=0 (40)
4660 ldx [%r11+%r0], %g1
4661 done
4662donretarg_40_53:
4663 .word 0x3b400001 ! 69: FBPLE fble,a,pn %fcc0, <label_0x1>
4664 set 0x4a9, %l3
4665 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
4666 .word 0xa1b1c7d3 ! 70: PDIST pdistn %d38, %d50, %d16
4667 .word 0x99a00173 ! 71: FABSq dis not found
4668
4669ibp_40_55:
4670 nop
4671 ta T_CHANGE_HPRIV
4672 mov 8, %r18
4673 rd %asi, %r12
4674 wr %r0, 0x41, %asi
4675 set sync_thr_counter4, %r23
4676#ifndef SPC
4677 ldxa [%g0]0x63, %r8
4678 and %r8, 0x38, %r8 ! Core ID
4679 add %r8, %r23, %r23
4680#else
4681 mov 0, %r8
4682#endif
4683 mov 0x40, %r16
4684ibp_startwait40_55:
4685 cas [%r23],%g0,%r16 !lock
4686 brz,a %r16, continue_ibp_40_55
4687 mov (~0x40&0xf0), %r16
4688 ld [%r23], %r16
4689ibp_wait40_55:
4690 brnz %r16, ibp_wait40_55
4691 ld [%r23], %r16
4692 ba ibp_startwait40_55
4693 mov 0x40, %r16
4694continue_ibp_40_55:
4695 sllx %r16, %r8, %r16 !Mask for my core only
4696 ldxa [0x58]%asi, %r17 !Running_status
4697wait_for_stat_40_55:
4698 ldxa [0x50]%asi, %r13 !Running_rw
4699 cmp %r13, %r17
4700 bne,a %xcc, wait_for_stat_40_55
4701 ldxa [0x58]%asi, %r17 !Running_status
4702 stxa %r16, [0x68]%asi !Park (W1C)
4703 ldxa [0x50]%asi, %r14 !Running_rw
4704wait_for_ibp_40_55:
4705 ldxa [0x58]%asi, %r17 !Running_status
4706 cmp %r14, %r17
4707 bne,a %xcc, wait_for_ibp_40_55
4708 ldxa [0x50]%asi, %r14 !Running_rw
4709ibp_doit40_55:
4710 best_set_reg(0x00000040d4fe75e8,%r19, %r20)
4711 stxa %r20, [%r18]0x42
4712 stxa %r16, [0x60] %asi !Unpark (W1S)
4713 st %g0, [%r23] !clear lock
4714 wr %r0, %r12, %asi !restore %asi
4715 ta T_CHANGE_NONHPRIV
4716 .word 0xe1bfe1a0 ! 72: STDFA_I stda %f16, [0x01a0, %r31]
4717 nop
4718 ta T_CHANGE_HPRIV ! macro
4719donret_40_56:
4720 rd %pc, %r12
4721 mov HIGHVA_HIGHNUM, %r10
4722 sllx %r10, 32, %r10
4723 or %r12, %r10, %r12
4724 add %r12, (donretarg_40_56-donret_40_56), %r12
4725 add %r12, 0x8, %r11 ! nonseq tnpc
4726 wrpr %g0, 0x1, %tl
4727 wrpr %g0, %r12, %tpc
4728 wrpr %g0, %r11, %tnpc
4729 set (0x00706d00 | (54 << 24)), %r13
4730 and %r12, 0xfff, %r14
4731 sllx %r14, 30, %r14
4732 or %r13, %r14, %r20
4733 wrpr %r20, %g0, %tstate
4734 wrhpr %g0, 0x1f04, %htstate
4735 ta T_CHANGE_NONHPRIV ! rand=1 (40)
4736 retry
4737.align 32
4738donretarg_40_56:
4739 .word 0xe4ffe17c ! 73: SWAPA_I swapa %r18, [%r31 + 0x017c] %asi
4740brcommon3_40_57:
4741 nop
4742 setx common_target, %r12, %r27
4743 lduw [%r27], %r12 ! Load common dest into dcache ..
4744 ba,a .+12
4745 .word 0xe537c00d ! 1: STQF_R - %f18, [%r13, %r31]
4746 ba,a .+8
4747 jmpl %r27+0, %r27
4748 .word 0xe51fc013 ! 74: LDDF_R ldd [%r31, %r19], %f18
4749 .word 0x9194400c ! 75: WRPR_PIL_R wrpr %r17, %r12, %pil
4750splash_cmpr_40_59:
4751 mov 0, %r18
4752 sllx %r18, 63, %r18
4753 rd %tick, %r17
4754 add %r17, 0x60, %r17
4755 or %r17, %r18, %r17
4756 ta T_CHANGE_PRIV
4757 .word 0xaf800011 ! 76: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
4758splash_cmpr_40_60:
4759 mov 1, %r18
4760 sllx %r18, 63, %r18
4761 rd %tick, %r17
4762 add %r17, 0x60, %r17
4763 or %r17, %r18, %r17
4764 ta T_CHANGE_HPRIV
4765 wrhpr %r17, %g0, %hsys_tick_cmpr
4766 .word 0xaf800011 ! 77: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
4767 .word 0x8780208a ! 78: WRASI_I wr %r0, 0x008a, %asi
4768brcommon3_40_61:
4769 nop
4770 setx common_target, %r12, %r27
4771 lduw [%r27], %r12 ! Load common dest into dcache ..
4772 ba,a .+12
4773 .word 0xe537c00a ! 1: STQF_R - %f18, [%r10, %r31]
4774 ba,a .+8
4775 jmpl %r27+0, %r27
4776 .word 0xe51fc012 ! 79: LDDF_R ldd [%r31, %r18], %f18
4777mondo_40_62:
4778 nop
4779 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
4780 ta T_CHANGE_PRIV
4781 stxa %r9, [%r0+0x3d8] %asi
4782 .word 0x9d94c010 ! 80: WRPR_WSTATE_R wrpr %r19, %r16, %wstate
4783 nop
4784 mov 0x80, %g3
4785 stxa %g3, [%g3] 0x5f
4786 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31
4787 .word 0xe45fc000 ! 81: LDX_R ldx [%r31 + %r0], %r18
4788 set 0x4d7, %l3
4789 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
4790 .word 0xa3b0c7c5 ! 82: PDIST pdistn %d34, %d36, %d48
4791 .word 0xc36fe0a4 ! 83: PREFETCH_I prefetch [%r31 + 0x00a4], #one_read
4792 .word 0x91a0016a ! 84: FABSq dis not found
4793
4794 nop
4795 ta T_CHANGE_HPRIV
4796 mov 0x40+1, %r10
4797 set sync_thr_counter5, %r23
4798#ifndef SPC
4799 ldxa [%g0]0x63, %o1
4800 and %o1, 0x38, %o1
4801 add %o1, %r23, %r23
4802 sllx %o1, 5, %o3 !(CID*256)
4803#endif
4804 cas [%r23],%g0,%r10 !lock
4805 brnz %r10, cwq_40_65
4806 rd %asi, %r12
4807 wr %g0, 0x40, %asi
4808 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
4809 and %l1, 0x3, %l1 ! Check if busy/enabled ..
4810 cmp %l1, 1
4811 bne cwq_40_65
4812 set CWQ_BASE, %l6
4813#ifndef SPC
4814 add %l6, %o3, %l6
4815#endif
4816 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
4817 best_set_reg(0x20610070, %l1, %l2) !# Control Word
4818 sllx %l2, 32, %l2
4819 stx %l2, [%l6 + 0x0]
4820 membar #Sync
4821 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
4822 sub %l2, 0x40, %l2
4823 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
4824 wr %r12, %g0, %asi
4825 st %g0, [%r23]
4826cwq_40_65:
4827 ta T_CHANGE_NONHPRIV
4828 .word 0x9b414000 ! 85: RDPC rd %pc, %r13
4829 .word 0xa7450000 ! 86: RD_SET_SOFTINT rd %set_softint, %r19
4830brcommon1_40_66:
4831 nop
4832 setx common_target, %r12, %r27
4833 lduw [%r27], %r12 ! Load common dest into dcache ..
4834 ba,a .+12
4835 .word 0x93b7c7cd ! 1: PDIST pdistn %d62, %d44, %d40
4836 ba,a .+8
4837 jmpl %r27+0, %r27
4838 .word 0x9f80251a ! 87: SIR sir 0x051a
4839pmu_40_67:
4840 nop
4841 setx 0xffffffb8ffffffad, %g1, %g7
4842 .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %-
4843#if (defined SPC || defined CMP)
4844!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_68)+56, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
4845!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_68)&0xffffffff) + 56, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
4846xir_40_68:
4847#else
4848#if (defined FC)
4849!! Generate XIR via RESET_GEN register
4850 ta T_CHANGE_HPRIV
4851 rdpr %pstate, %r18
4852 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
4853 wrpr %r18, %pstate
4854#ifndef XIR_RND_CORES
4855 ldxa [%g0] 0x63, %o1
4856 mov 1, %r18
4857 sllx %r18, %o1, %r18
4858#endif
4859 mov 0x30, %r19
4860 setx 0x8900000808, %r16, %r17
4861 mov 0x2, %r16
4862xir_40_68:
4863 stxa %r18, [%r19] 0x41
4864 stx %r16, [%r17]
4865#endif
4866#endif
4867 .word 0xa9837089 ! 89: WR_SET_SOFTINT_I wr %r13, 0x1089, %set_softint
4868 rd %tick, %r28
4869#if (MAX_THREADS == 8)
4870 sethi %hi(0x33800), %r27
4871#else
4872 sethi %hi(0x30000), %r27
4873#endif
4874 andn %r28, %r27, %r28
4875 ta T_CHANGE_HPRIV
4876 stxa %r28, [%g0] 0x73
4877intvec_40_69:
4878 .word 0x39400001 ! 90: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
4879fpinit_40_70:
4880 nop
4881 setx fp_data_quads, %r19, %r20
4882 ldd [%r20], %f0
4883 ldd [%r20+8], %f4
4884 ld [%r20+16], %fsr
4885 ld [%r20+24], %r19
4886 wr %r19, %g0, %gsr
4887 .word 0x91b00484 ! 91: FCMPLE32 fcmple32 %d0, %d4, %r8
4888mondo_40_71:
4889 nop
4890 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
4891 ta T_CHANGE_PRIV
4892 stxa %r2, [%r0+0x3d8] %asi
4893 .word 0x9d94c009 ! 92: WRPR_WSTATE_R wrpr %r19, %r9, %wstate
4894 .word 0x8d903962 ! 93: WRPR_PSTATE_I wrpr %r0, 0x1962, %pstate
4895 .word 0x8d802000 ! 94: WRFPRS_I wr %r0, 0x0000, %fprs
4896 nop
4897 ta T_CHANGE_HPRIV
4898 mov 0x40, %r10
4899 set sync_thr_counter6, %r23
4900#ifndef SPC
4901 ldxa [%g0]0x63, %o1
4902 and %o1, 0x38, %o1
4903 add %o1, %r23, %r23
4904#endif
4905 cas [%r23],%g0,%r10 !lock
4906 brnz %r10, sma_40_73
4907 rd %asi, %r12
4908 wr %g0, 0x40, %asi
4909 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
4910 set 0x00161fff, %g1
4911 stxa %g1, [%g0 + 0x80] %asi
4912 wr %r12, %g0, %asi
4913 st %g0, [%r23]
4914sma_40_73:
4915 ta T_CHANGE_NONHPRIV
4916 .word 0xd1e7e008 ! 95: CASA_R casa [%r31] %asi, %r8, %r8
4917ibp_40_74:
4918 nop
4919 ta T_CHANGE_HPRIV
4920 mov 8, %r18
4921 rd %asi, %r12
4922 wr %r0, 0x41, %asi
4923 set sync_thr_counter4, %r23
4924#ifndef SPC
4925 ldxa [%g0]0x63, %r8
4926 and %r8, 0x38, %r8 ! Core ID
4927 add %r8, %r23, %r23
4928#else
4929 mov 0, %r8
4930#endif
4931 mov 0x40, %r16
4932ibp_startwait40_74:
4933 cas [%r23],%g0,%r16 !lock
4934 brz,a %r16, continue_ibp_40_74
4935 mov (~0x40&0xf0), %r16
4936 ld [%r23], %r16
4937ibp_wait40_74:
4938 brnz %r16, ibp_wait40_74
4939 ld [%r23], %r16
4940 ba ibp_startwait40_74
4941 mov 0x40, %r16
4942continue_ibp_40_74:
4943 sllx %r16, %r8, %r16 !Mask for my core only
4944 ldxa [0x58]%asi, %r17 !Running_status
4945wait_for_stat_40_74:
4946 ldxa [0x50]%asi, %r13 !Running_rw
4947 cmp %r13, %r17
4948 bne,a %xcc, wait_for_stat_40_74
4949 ldxa [0x58]%asi, %r17 !Running_status
4950 stxa %r16, [0x68]%asi !Park (W1C)
4951 ldxa [0x50]%asi, %r14 !Running_rw
4952wait_for_ibp_40_74:
4953 ldxa [0x58]%asi, %r17 !Running_status
4954 cmp %r14, %r17
4955 bne,a %xcc, wait_for_ibp_40_74
4956 ldxa [0x50]%asi, %r14 !Running_rw
4957ibp_doit40_74:
4958 best_set_reg(0x000000401cf5e816,%r19, %r20)
4959 stxa %r20, [%r18]0x42
4960 stxa %r16, [0x60] %asi !Unpark (W1S)
4961 st %g0, [%r23] !clear lock
4962 wr %r0, %r12, %asi !restore %asi
4963 ta T_CHANGE_NONHPRIV
4964 .word 0xc3ec0031 ! 96: PREFETCHA_R prefetcha [%r16, %r17] 0x01, #one_read
4965 .word 0xc3ec8032 ! 97: PREFETCHA_R prefetcha [%r18, %r18] 0x01, #one_read
4966trapasi_40_76:
4967 nop
4968 mov 0x20, %r1 ! (VA for ASI 0x5a)
4969 .word 0xd8904b40 ! 98: LDUHA_R lduha [%r1, %r0] 0x5a, %r12
4970 .word 0x81460000 ! 99: RD_STICK_REG stbar
4971jmptr_40_77:
4972 nop
4973 best_set_reg(0xe0200000, %r20, %r27)
4974 .word 0xb7c6c000 ! 100: JMPL_R jmpl %r27 + %r0, %r27
4975pmu_40_78:
4976 nop
4977 ta T_CHANGE_PRIV
4978 setx 0xffffffb7ffffffa4, %g1, %g7
4979 .word 0xa3800007 ! 101: WR_PERF_COUNTER_R wr %r0, %r7, %-
4980memptr_40_79:
4981 set 0x60540000, %r31
4982 .word 0x8584e677 ! 102: WRCCR_I wr %r19, 0x0677, %ccr
4983 .word 0xd8cfe160 ! 103: LDSBA_I ldsba [%r31, + 0x0160] %asi, %r12
4984change_to_randtl_40_80:
4985 ta T_CHANGE_PRIV ! macro
4986done_change_to_randtl_40_80:
4987 .word 0x8f902000 ! 104: WRPR_TL_I wrpr %r0, 0x0000, %tl
4988pmu_40_81:
4989 nop
4990 setx 0xffffffb1ffffffaa, %g1, %g7
4991 .word 0xa3800007 ! 105: WR_PERF_COUNTER_R wr %r0, %r7, %-
4992splash_lsu_40_82:
4993 nop
4994 ta T_CHANGE_HPRIV
4995 set 0x6e0ff372, %r2
4996 mov 0x1, %r1
4997 sllx %r1, 32, %r1
4998 or %r1, %r2, %r2
4999 .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1>
5000 stxa %r2, [%r0] ASI_LSU_CONTROL
5001 .word 0x3d400001 ! 106: FBPULE fbule,a,pn %fcc0, <label_0x1>
5002 .word 0xd8cfe1d8 ! 107: LDSBA_I ldsba [%r31, + 0x01d8] %asi, %r12
5003 .word 0xc32fc00d ! 1: STXFSR_R st-sfr %f1, [%r13, %r31]
5004 .word 0x9f803e9d ! 108: SIR sir 0x1e9d
5005 .word 0xd8dfe010 ! 109: LDXA_I ldxa [%r31, + 0x0010] %asi, %r12
5006 .word 0x87802020 ! 110: WRASI_I wr %r0, 0x0020, %asi
5007mondo_40_83:
5008 nop
5009 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
5010 stxa %r1, [%r0+0x3d0] %asi
5011 .word 0x9d914013 ! 111: WRPR_WSTATE_R wrpr %r5, %r19, %wstate
5012 .word 0x81460000 ! 112: RD_STICK_REG stbar
5013 .word 0x93703d23 ! 113: POPC_I popc 0x1d23, %r9
5014 nop
5015 ta T_CHANGE_HPRIV
5016 mov 0x40+1, %r10
5017 set sync_thr_counter5, %r23
5018#ifndef SPC
5019 ldxa [%g0]0x63, %o1
5020 and %o1, 0x38, %o1
5021 add %o1, %r23, %r23
5022 sllx %o1, 5, %o3 !(CID*256)
5023#endif
5024 cas [%r23],%g0,%r10 !lock
5025 brnz %r10, cwq_40_85
5026 rd %asi, %r12
5027 wr %g0, 0x40, %asi
5028 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
5029 and %l1, 0x3, %l1 ! Check if busy/enabled ..
5030 cmp %l1, 1
5031 bne cwq_40_85
5032 set CWQ_BASE, %l6
5033#ifndef SPC
5034 add %l6, %o3, %l6
5035#endif
5036 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
5037 best_set_reg(0x20610040, %l1, %l2) !# Control Word
5038 sllx %l2, 32, %l2
5039 stx %l2, [%l6 + 0x0]
5040 membar #Sync
5041 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
5042 sub %l2, 0x40, %l2
5043 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
5044 wr %r12, %g0, %asi
5045 st %g0, [%r23]
5046cwq_40_85:
5047 ta T_CHANGE_NONHPRIV
5048 .word 0x93414000 ! 114: RDPC rd %pc, %r9
5049#if (defined SPC || defined CMP1)
5050!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_86) + 24, 16, 16)) -> intp(6,0,5,,,,,1)
5051!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_86)&0xffffffff) + 32, 16, 16)) -> intp(3,0,2,,,,,1)
5052#else
5053 set 0x23b08099, %r28
5054#if (MAX_THREADS == 8)
5055 and %r28, 0x7ff, %r28
5056#endif
5057 stxa %r28, [%g0] 0x73
5058#endif
5059intvec_40_86:
5060 .word 0x39400001 ! 115: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
5061pmu_40_87:
5062 nop
5063 setx 0xffffffbeffffffa7, %g1, %g7
5064 .word 0xa3800007 ! 116: WR_PERF_COUNTER_R wr %r0, %r7, %-
5065trapasi_40_88:
5066 nop
5067 mov 0x8, %r1 ! (VA for ASI 0x49)
5068 .word 0xd8c04920 ! 117: LDSWA_R ldswa [%r1, %r0] 0x49, %r12
5069 .word 0x99450000 ! 118: RD_SET_SOFTINT rd %set_softint, %r12
5070fpinit_40_89:
5071 nop
5072 setx fp_data_quads, %r19, %r20
5073 ldd [%r20], %f0
5074 ldd [%r20+8], %f4
5075 ld [%r20+16], %fsr
5076 ld [%r20+24], %r19
5077 wr %r19, %g0, %gsr
5078 .word 0x89a009a4 ! 119: FDIVs fdivs %f0, %f4, %f4
5079 .word 0xe63fc009 ! 1: STD_R std %r19, [%r31 + %r9]
5080 .word 0x9f802174 ! 120: SIR sir 0x0174
5081 nop
5082 ta T_CHANGE_HPRIV ! macro
5083donret_40_90:
5084 rd %pc, %r12
5085 mov HIGHVA_HIGHNUM, %r10
5086 sllx %r10, 32, %r10
5087 or %r12, %r10, %r12
5088 add %r12, (donretarg_40_90-donret_40_90+4), %r12
5089 add %r12, 0x4, %r11 ! seq tnpc
5090 wrpr %g0, 0x1, %tl
5091 wrpr %g0, %r12, %tpc
5092 wrpr %g0, %r11, %tnpc
5093 set (0x006e3200 | (0x8a << 24)), %r13
5094 and %r12, 0xfff, %r14
5095 sllx %r14, 30, %r14
5096 or %r13, %r14, %r20
5097 wrpr %r20, %g0, %tstate
5098 wrhpr %g0, 0xdd, %htstate
5099 ta T_CHANGE_NONPRIV ! rand=0 (40)
5100 retry
5101.align 32
5102donretarg_40_90:
5103 .word 0xe66fe002 ! 121: LDSTUB_I ldstub %r19, [%r31 + 0x0002]
5104 .word 0xe63fe070 ! 1: STD_I std %r19, [%r31 + 0x0070]
5105 .word 0x9f8020e8 ! 122: SIR sir 0x00e8
5106splash_htba_40_91:
5107 nop
5108 ta T_CHANGE_HPRIV
5109 setx 0x0000000200280000, %r11, %r12
5110 .word 0x8b98000c ! 123: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
5111 nop
5112 ta T_CHANGE_HPRIV
5113 mov 0x40+1, %r10
5114 set sync_thr_counter5, %r23
5115#ifndef SPC
5116 ldxa [%g0]0x63, %o1
5117 and %o1, 0x38, %o1
5118 add %o1, %r23, %r23
5119 sllx %o1, 5, %o3 !(CID*256)
5120#endif
5121 cas [%r23],%g0,%r10 !lock
5122 brnz %r10, cwq_40_92
5123 rd %asi, %r12
5124 wr %g0, 0x40, %asi
5125 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
5126 and %l1, 0x3, %l1 ! Check if busy/enabled ..
5127 cmp %l1, 1
5128 bne cwq_40_92
5129 set CWQ_BASE, %l6
5130#ifndef SPC
5131 add %l6, %o3, %l6
5132#endif
5133 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
5134 best_set_reg(0x206100c0, %l1, %l2) !# Control Word
5135 sllx %l2, 32, %l2
5136 stx %l2, [%l6 + 0x0]
5137 membar #Sync
5138 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
5139 sub %l2, 0x40, %l2
5140 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
5141 wr %r12, %g0, %asi
5142 st %g0, [%r23]
5143cwq_40_92:
5144 ta T_CHANGE_NONHPRIV
5145 .word 0xa1414000 ! 124: RDPC rd %pc, %r16
5146 rd %tick, %r28
5147#if (MAX_THREADS == 8)
5148 sethi %hi(0x33800), %r27
5149#else
5150 sethi %hi(0x30000), %r27
5151#endif
5152 andn %r28, %r27, %r28
5153 ta T_CHANGE_HPRIV
5154 stxa %r28, [%g0] 0x73
5155intvec_40_93:
5156 .word 0x39400001 ! 125: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
5157 .word 0x8d802000 ! 126: WRFPRS_I wr %r0, 0x0000, %fprs
5158 .word 0x95b2c7c3 ! 127: PDIST pdistn %d42, %d34, %d10
5159 .word 0x9b7022b7 ! 128: POPC_I popc 0x02b7, %r13
5160 .word 0x87aaca47 ! 129: FCMPd fcmpd %fcc<n>, %f42, %f38
5161 .word 0xe8800b80 ! 130: LDUWA_R lduwa [%r0, %r0] 0x5c, %r20
5162intveclr_40_97:
5163 nop
5164 ta T_CHANGE_HPRIV
5165 setx 0x9680a754307362fb, %r1, %r28
5166 stxa %r28, [%g0] 0x72
5167 .word 0x25400001 ! 131: FBPLG fblg,a,pn %fcc0, <label_0x1>
5168splash_hpstate_40_98:
5169 .word 0x81982d8d ! 132: WRHPR_HPSTATE_I wrhpr %r0, 0x0d8d, %hpstate
5170trapasi_40_99:
5171 nop
5172 mov 0x0, %r1 ! (VA for ASI 0x72)
5173 .word 0xe8d84e40 ! 133: LDXA_R ldxa [%r1, %r0] 0x72, %r20
5174#if (defined SPC || defined CMP)
5175!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_100)+16, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
5176!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_100)&0xffffffff) + 8, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
5177xir_40_100:
5178#else
5179#if (defined FC)
5180!! Generate XIR via RESET_GEN register
5181 ta T_CHANGE_HPRIV
5182 rdpr %pstate, %r18
5183 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
5184 wrpr %r18, %pstate
5185#ifndef XIR_RND_CORES
5186 ldxa [%g0] 0x63, %o1
5187 mov 1, %r18
5188 sllx %r18, %o1, %r18
5189#endif
5190 mov 0x30, %r19
5191 setx 0x8900000808, %r16, %r17
5192 mov 0x2, %r16
5193xir_40_100:
5194 stxa %r18, [%r19] 0x41
5195 stx %r16, [%r17]
5196#endif
5197#endif
5198 .word 0xa984ae1a ! 134: WR_SET_SOFTINT_I wr %r18, 0x0e1a, %set_softint
5199intveclr_40_101:
5200 nop
5201 ta T_CHANGE_HPRIV
5202 setx 0xd1f7122337e86681, %r1, %r28
5203 stxa %r28, [%g0] 0x72
5204 ta T_CHANGE_NONHPRIV
5205 .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, <label_0x1>
5206intveclr_40_102:
5207 nop
5208 ta T_CHANGE_HPRIV
5209 setx 0xd4fdfa6546cf442b, %r1, %r28
5210 stxa %r28, [%g0] 0x72
5211 .word 0x25400001 ! 136: FBPLG fblg,a,pn %fcc0, <label_0x1>
5212 nop
5213 ta T_CHANGE_HPRIV ! macro
5214donret_40_103:
5215 rd %pc, %r12
5216 mov HIGHVA_HIGHNUM, %r10
5217 sllx %r10, 32, %r10
5218 or %r12, %r10, %r12
5219 add %r12, (donretarg_40_103-donret_40_103), %r12
5220 add %r12, 0x8, %r11 ! nonseq tnpc
5221 wrpr %g0, 0x1, %tl
5222 wrpr %g0, %r12, %tpc
5223 wrpr %g0, %r11, %tnpc
5224 set (0x00b60900 | (0x4f << 24)), %r13
5225 and %r12, 0xfff, %r14
5226 sllx %r14, 30, %r14
5227 or %r13, %r14, %r20
5228 wrpr %r20, %g0, %tstate
5229 wrhpr %g0, 0x4d5, %htstate
5230 ta T_CHANGE_NONPRIV ! rand=0 (40)
5231 ldx [%r11+%r0], %g1
5232 done
5233donretarg_40_103:
5234 .word 0xe86fe023 ! 137: LDSTUB_I ldstub %r20, [%r31 + 0x0023]
5235ibp_40_104:
5236 nop
5237 ta T_CHANGE_HPRIV
5238 mov 8, %r18
5239 rd %asi, %r12
5240 wr %r0, 0x41, %asi
5241 set sync_thr_counter4, %r23
5242#ifndef SPC
5243 ldxa [%g0]0x63, %r8
5244 and %r8, 0x38, %r8 ! Core ID
5245 add %r8, %r23, %r23
5246#else
5247 mov 0, %r8
5248#endif
5249 mov 0x40, %r16
5250ibp_startwait40_104:
5251 cas [%r23],%g0,%r16 !lock
5252 brz,a %r16, continue_ibp_40_104
5253 mov (~0x40&0xf0), %r16
5254 ld [%r23], %r16
5255ibp_wait40_104:
5256 brnz %r16, ibp_wait40_104
5257 ld [%r23], %r16
5258 ba ibp_startwait40_104
5259 mov 0x40, %r16
5260continue_ibp_40_104:
5261 sllx %r16, %r8, %r16 !Mask for my core only
5262 ldxa [0x58]%asi, %r17 !Running_status
5263wait_for_stat_40_104:
5264 ldxa [0x50]%asi, %r13 !Running_rw
5265 cmp %r13, %r17
5266 bne,a %xcc, wait_for_stat_40_104
5267 ldxa [0x58]%asi, %r17 !Running_status
5268 stxa %r16, [0x68]%asi !Park (W1C)
5269 ldxa [0x50]%asi, %r14 !Running_rw
5270wait_for_ibp_40_104:
5271 ldxa [0x58]%asi, %r17 !Running_status
5272 cmp %r14, %r17
5273 bne,a %xcc, wait_for_ibp_40_104
5274 ldxa [0x50]%asi, %r14 !Running_rw
5275ibp_doit40_104:
5276 best_set_reg(0x00000040f9e816cd,%r19, %r20)
5277 stxa %r20, [%r18]0x42
5278 stxa %r16, [0x60] %asi !Unpark (W1S)
5279 st %g0, [%r23] !clear lock
5280 wr %r0, %r12, %asi !restore %asi
5281 .word 0xc19fda00 ! 138: LDDFA_R ldda [%r31, %r0], %f0
5282 nop
5283 ta T_CHANGE_HPRIV
5284 mov 0x40, %r10
5285 set sync_thr_counter6, %r23
5286#ifndef SPC
5287 ldxa [%g0]0x63, %o1
5288 and %o1, 0x38, %o1
5289 add %o1, %r23, %r23
5290#endif
5291 cas [%r23],%g0,%r10 !lock
5292 brnz %r10, sma_40_105
5293 rd %asi, %r12
5294 wr %g0, 0x40, %asi
5295 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
5296 set 0x001e1fff, %g1
5297 stxa %g1, [%g0 + 0x80] %asi
5298 wr %r12, %g0, %asi
5299 st %g0, [%r23]
5300sma_40_105:
5301 ta T_CHANGE_NONHPRIV
5302 .word 0xe9e7e00c ! 139: CASA_R casa [%r31] %asi, %r12, %r20
5303splash_cmpr_40_106:
5304 mov 1, %r18
5305 sllx %r18, 63, %r18
5306 rd %tick, %r17
5307 add %r17, 0x100, %r17
5308 or %r17, %r18, %r17
5309 ta T_CHANGE_HPRIV
5310 wrhpr %r17, %g0, %hsys_tick_cmpr
5311 .word 0xb3800011 ! 140: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
5312 .word 0xe91fe1b0 ! 141: LDDF_I ldd [%r31, 0x01b0], %f20
5313 .word 0x93d020b3 ! 142: Tcc_I tne icc_or_xcc, %r0 + 179
5314splash_hpstate_40_108:
5315 ta T_CHANGE_NONHPRIV
5316 .word 0x8198340f ! 143: WRHPR_HPSTATE_I wrhpr %r0, 0x140f, %hpstate
5317dvapa_40_109:
5318 nop
5319 ta T_CHANGE_HPRIV
5320 mov 0xfca, %r20
5321 mov 0x1a, %r19
5322 sllx %r20, 23, %r20
5323 or %r19, %r20, %r19
5324 stxa %r19, [%g0] ASI_LSU_CONTROL
5325 mov 0x38, %r18
5326 stxa %r31, [%r18]0x58
5327 ta T_CHANGE_NONHPRIV
5328 .word 0xa9a0c9c6 ! 144: FDIVd fdivd %f34, %f6, %f20
5329 .word 0x2e800001 ! 1: BVS bvs,a <label_0x1>
5330 .word 0x8d903e97 ! 145: WRPR_PSTATE_I wrpr %r0, 0x1e97, %pstate
5331memptr_40_111:
5332 set user_data_start, %r31
5333 .word 0x8584bf41 ! 146: WRCCR_I wr %r18, 0x1f41, %ccr
5334ceter_40_112:
5335 nop
5336 ta T_CHANGE_HPRIV
5337 mov 3, %r17
5338 sllx %r17, 60, %r17
5339 mov 0x18, %r16
5340 stxa %r17, [%r16]0x4c
5341 ta T_CHANGE_NONHPRIV
5342 .word 0x9b410000 ! 147: RDTICK rd %tick, %r13
5343 nop
5344 ta T_CHANGE_HPRIV ! macro
5345donret_40_113:
5346 rd %pc, %r12
5347 mov HIGHVA_HIGHNUM, %r10
5348 sllx %r10, 32, %r10
5349 or %r12, %r10, %r12
5350 add %r12, (donretarg_40_113-donret_40_113+4), %r12
5351 add %r12, 0x4, %r11 ! seq tnpc
5352 andn %r11, %r10, %r11 ! low VA tnpc
5353 wrpr %g0, 0x2, %tl
5354 wrpr %g0, %r12, %tpc
5355 wrpr %g0, %r11, %tnpc
5356 set (0x000eb400 | (0x88 << 24)), %r13
5357 and %r12, 0xfff, %r14
5358 sllx %r14, 30, %r14
5359 or %r13, %r14, %r20
5360 wrpr %r20, %g0, %tstate
5361 wrhpr %g0, 0xc59, %htstate
5362 ta T_CHANGE_NONHPRIV ! rand=1 (40)
5363 ldx [%r11+%r0], %g1
5364 done
5365donretarg_40_113:
5366 .word 0xe6ffe090 ! 148: SWAPA_I swapa %r19, [%r31 + 0x0090] %asi
5367splash_tba_40_114:
5368 nop
5369 ta T_CHANGE_PRIV
5370 setx 0x0000000400380000, %r11, %r12
5371 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba
5372splash_htba_40_115:
5373 nop
5374 ta T_CHANGE_HPRIV
5375 setx 0x0000000200280000, %r11, %r12
5376 .word 0x8b98000c ! 150: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
5377fpinit_40_116:
5378 nop
5379 setx fp_data_quads, %r19, %r20
5380 ldd [%r20], %f0
5381 ldd [%r20+8], %f4
5382 ld [%r20+16], %fsr
5383 ld [%r20+24], %r19
5384 wr %r19, %g0, %gsr
5385 .word 0x87a80a44 ! 151: FCMPd fcmpd %fcc<n>, %f0, %f4
5386tagged_40_117:
5387 taddcctv %r7, 0x10b4, %r20
5388 .word 0xe607e070 ! 152: LDUW_I lduw [%r31 + 0x0070], %r19
5389#if (defined SPC || defined CMP)
5390!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_118)+48, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
5391!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_118)&0xffffffff) + 56, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
5392xir_40_118:
5393#else
5394#if (defined FC)
5395!! Generate XIR via RESET_GEN register
5396 ta T_CHANGE_HPRIV
5397 rdpr %pstate, %r18
5398 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
5399 wrpr %r18, %pstate
5400#ifndef XIR_RND_CORES
5401 ldxa [%g0] 0x63, %o1
5402 mov 1, %r18
5403 sllx %r18, %o1, %r18
5404#endif
5405 mov 0x30, %r19
5406 setx 0x8900000808, %r16, %r17
5407 mov 0x2, %r16
5408xir_40_118:
5409 stxa %r18, [%r19] 0x41
5410 stx %r16, [%r17]
5411#endif
5412#endif
5413 .word 0xa982e738 ! 153: WR_SET_SOFTINT_I wr %r11, 0x0738, %set_softint
5414 .word 0x89800011 ! 154: WRTICK_R wr %r0, %r17, %tick
5415mondo_40_120:
5416 nop
5417 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
5418 stxa %r19, [%r0+0x3c0] %asi
5419 .word 0x9d940010 ! 155: WRPR_WSTATE_R wrpr %r16, %r16, %wstate
5420 .word 0xe737c000 ! 156: STQF_R - %f19, [%r0, %r31]
5421 .word 0x87802055 ! 157: WRASI_I wr %r0, 0x0055, %asi
5422 .word 0x946d254f ! 158: UDIVX_I udivx %r20, 0x054f, %r10
5423splash_cmpr_40_121:
5424 mov 0, %r18
5425 sllx %r18, 63, %r18
5426 rd %tick, %r17
5427 add %r17, 0x50, %r17
5428 or %r17, %r18, %r17
5429 .word 0xb3800011 ! 159: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
5430 nop
5431 ta T_CHANGE_HPRIV ! macro
5432donret_40_122:
5433 rd %pc, %r12
5434 mov HIGHVA_HIGHNUM, %r10
5435 sllx %r10, 32, %r10
5436 or %r12, %r10, %r12
5437 add %r12, (donretarg_40_122-donret_40_122), %r12
5438 add %r12, 0x4, %r11 ! seq tnpc
5439 andn %r11, %r10, %r11 ! low VA tnpc
5440 wrpr %g0, 0x1, %tl
5441 wrpr %g0, %r12, %tpc
5442 wrpr %g0, %r11, %tnpc
5443 set (0x0006d700 | (0x58 << 24)), %r13
5444 and %r12, 0xfff, %r14
5445 sllx %r14, 30, %r14
5446 or %r13, %r14, %r20
5447 wrpr %r20, %g0, %tstate
5448 wrhpr %g0, 0x555, %htstate
5449 ta T_CHANGE_NONPRIV ! rand=0 (40)
5450 ldx [%r12+%r0], %g1
5451 retry
5452donretarg_40_122:
5453 .word 0x9ba249c5 ! 160: FDIVd fdivd %f40, %f36, %f44
5454pmu_40_123:
5455 nop
5456 setx 0xffffffb6ffffffa1, %g1, %g7
5457 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
5458splash_tba_40_124:
5459 nop
5460 ta T_CHANGE_PRIV
5461 set 0x120000, %r12
5462 .word 0x8b90000c ! 162: WRPR_TBA_R wrpr %r0, %r12, %tba
5463mondo_40_125:
5464 nop
5465 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
5466 ta T_CHANGE_PRIV
5467 stxa %r16, [%r0+0x3d8] %asi
5468 .word 0x9d924011 ! 163: WRPR_WSTATE_R wrpr %r9, %r17, %wstate
5469 .word 0xa190200b ! 164: WRPR_GL_I wrpr %r0, 0x000b, %-
5470trapasi_40_126:
5471 nop
5472 mov 0x38, %r1 ! (VA for ASI 0x5b)
5473 .word 0xda904b60 ! 165: LDUHA_R lduha [%r1, %r0] 0x5b, %r13
5474 .word 0x8d802004 ! 166: WRFPRS_I wr %r0, 0x0004, %fprs
5475splash_tba_40_127:
5476 nop
5477 ta T_CHANGE_PRIV
5478 setx 0x0000000400380000, %r11, %r12
5479 .word 0x8b90000c ! 167: WRPR_TBA_R wrpr %r0, %r12, %tba
5480 invalw
5481 mov 0xb5, %r30
5482 .word 0x91d0001e ! 168: Tcc_R ta icc_or_xcc, %r0 + %r30
5483 nop
5484 ta T_CHANGE_HPRIV
5485 mov 0x40, %r10
5486 set sync_thr_counter6, %r23
5487#ifndef SPC
5488 ldxa [%g0]0x63, %o1
5489 and %o1, 0x38, %o1
5490 add %o1, %r23, %r23
5491#endif
5492 cas [%r23],%g0,%r10 !lock
5493 brnz %r10, sma_40_128
5494 rd %asi, %r12
5495 wr %g0, 0x40, %asi
5496 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
5497 set 0x00061fff, %g1
5498 stxa %g1, [%g0 + 0x80] %asi
5499 wr %r12, %g0, %asi
5500 st %g0, [%r23]
5501sma_40_128:
5502 ta T_CHANGE_NONHPRIV
5503 .word 0xdbe7e010 ! 169: CASA_R casa [%r31] %asi, %r16, %r13
5504 .word 0xdb3fc012 ! 1: STDF_R std %f13, [%r18, %r31]
5505 .word 0x9f80337a ! 170: SIR sir 0x137a
5506 .word 0x8d902452 ! 171: WRPR_PSTATE_I wrpr %r0, 0x0452, %pstate
5507ibp_40_130:
5508 nop
5509 ta T_CHANGE_HPRIV
5510 mov 8, %r18
5511 rd %asi, %r12
5512 wr %r0, 0x41, %asi
5513 set sync_thr_counter4, %r23
5514#ifndef SPC
5515 ldxa [%g0]0x63, %r8
5516 and %r8, 0x38, %r8 ! Core ID
5517 add %r8, %r23, %r23
5518#else
5519 mov 0, %r8
5520#endif
5521 mov 0x40, %r16
5522ibp_startwait40_130:
5523 cas [%r23],%g0,%r16 !lock
5524 brz,a %r16, continue_ibp_40_130
5525 mov (~0x40&0xf0), %r16
5526 ld [%r23], %r16
5527ibp_wait40_130:
5528 brnz %r16, ibp_wait40_130
5529 ld [%r23], %r16
5530 ba ibp_startwait40_130
5531 mov 0x40, %r16
5532continue_ibp_40_130:
5533 sllx %r16, %r8, %r16 !Mask for my core only
5534 ldxa [0x58]%asi, %r17 !Running_status
5535wait_for_stat_40_130:
5536 ldxa [0x50]%asi, %r13 !Running_rw
5537 cmp %r13, %r17
5538 bne,a %xcc, wait_for_stat_40_130
5539 ldxa [0x58]%asi, %r17 !Running_status
5540 stxa %r16, [0x68]%asi !Park (W1C)
5541 ldxa [0x50]%asi, %r14 !Running_rw
5542wait_for_ibp_40_130:
5543 ldxa [0x58]%asi, %r17 !Running_status
5544 cmp %r14, %r17
5545 bne,a %xcc, wait_for_ibp_40_130
5546 ldxa [0x50]%asi, %r14 !Running_rw
5547ibp_doit40_130:
5548 best_set_reg(0x00000040eed6cd80,%r19, %r20)
5549 stxa %r20, [%r18]0x42
5550 stxa %r16, [0x60] %asi !Unpark (W1S)
5551 st %g0, [%r23] !clear lock
5552 wr %r0, %r12, %asi !restore %asi
5553 ta T_CHANGE_NONHPRIV
5554 .word 0xc1bfd920 ! 172: STDFA_R stda %f0, [%r0, %r31]
5555 .word 0x9469fe9e ! 173: UDIVX_I udivx %r7, 0xfffffe9e, %r10
5556 .word 0x9b6b4002 ! 174: SDIVX_R sdivx %r13, %r2, %r13
5557dvapa_40_131:
5558 nop
5559 ta T_CHANGE_HPRIV
5560 mov 0xea9, %r20
5561 mov 0x10, %r19
5562 sllx %r20, 23, %r20
5563 or %r19, %r20, %r19
5564 stxa %r19, [%g0] ASI_LSU_CONTROL
5565 mov 0x38, %r18
5566 stxa %r31, [%r18]0x58
5567 ta T_CHANGE_NONHPRIV
5568 .word 0xe0dfc032 ! 175: LDXA_R ldxa [%r31, %r18] 0x01, %r16
5569 .word 0xa7807057 ! 176: WR_GRAPHICS_STATUS_REG_I wr %r1, 0x1057, %-
5570 nop
5571 ta T_CHANGE_HPRIV
5572 mov 0x40+1, %r10
5573 set sync_thr_counter5, %r23
5574#ifndef SPC
5575 ldxa [%g0]0x63, %o1
5576 and %o1, 0x38, %o1
5577 add %o1, %r23, %r23
5578 sllx %o1, 5, %o3 !(CID*256)
5579#endif
5580 cas [%r23],%g0,%r10 !lock
5581 brnz %r10, cwq_40_132
5582 rd %asi, %r12
5583 wr %g0, 0x40, %asi
5584 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
5585 and %l1, 0x3, %l1 ! Check if busy/enabled ..
5586 cmp %l1, 1
5587 bne cwq_40_132
5588 set CWQ_BASE, %l6
5589#ifndef SPC
5590 add %l6, %o3, %l6
5591#endif
5592 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
5593 best_set_reg(0x20610000, %l1, %l2) !# Control Word
5594 sllx %l2, 32, %l2
5595 stx %l2, [%l6 + 0x0]
5596 membar #Sync
5597 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
5598 sub %l2, 0x40, %l2
5599 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
5600 wr %r12, %g0, %asi
5601 st %g0, [%r23]
5602cwq_40_132:
5603 ta T_CHANGE_NONHPRIV
5604 .word 0xa9414000 ! 177: RDPC rd %pc, %r20
5605fpinit_40_133:
5606 nop
5607 setx fp_data_quads, %r19, %r20
5608 ldd [%r20], %f0
5609 ldd [%r20+8], %f4
5610 ld [%r20+16], %fsr
5611 ld [%r20+24], %r19
5612 wr %r19, %g0, %gsr
5613 .word 0x91a009a4 ! 178: FDIVs fdivs %f0, %f4, %f8
5614splash_lsu_40_134:
5615 nop
5616 ta T_CHANGE_HPRIV
5617 set 0x01ceccb9, %r2
5618 mov 0x2, %r1
5619 sllx %r1, 32, %r1
5620 or %r1, %r2, %r2
5621 stxa %r2, [%r0] ASI_LSU_CONTROL
5622 ta T_CHANGE_NONHPRIV
5623 .word 0x3d400001 ! 179: FBPULE fbule,a,pn %fcc0, <label_0x1>
5624 .word 0x87802083 ! 180: WRASI_I wr %r0, 0x0083, %asi
5625#if (defined SPC || defined CMP)
5626!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_40_135)+24, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
5627!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_40_135)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x40),1,3,,,,,1)
5628xir_40_135:
5629#else
5630#if (defined FC)
5631!! Generate XIR via RESET_GEN register
5632 ta T_CHANGE_HPRIV
5633 rdpr %pstate, %r18
5634 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
5635 wrpr %r18, %pstate
5636#ifndef XIR_RND_CORES
5637 ldxa [%g0] 0x63, %o1
5638 mov 1, %r18
5639 sllx %r18, %o1, %r18
5640#endif
5641 mov 0x30, %r19
5642 setx 0x8900000808, %r16, %r17
5643 mov 0x2, %r16
5644xir_40_135:
5645 stxa %r18, [%r19] 0x41
5646 stx %r16, [%r17]
5647#endif
5648#endif
5649 .word 0xa98332cf ! 181: WR_SET_SOFTINT_I wr %r12, 0x12cf, %set_softint
5650trapasi_40_136:
5651 nop
5652 mov 0x8, %r1 ! (VA for ASI 0x4a)
5653 .word 0xdad84940 ! 182: LDXA_R ldxa [%r1, %r0] 0x4a, %r13
5654intveclr_40_137:
5655 nop
5656 ta T_CHANGE_HPRIV
5657 setx 0xa372a6aac8246a6b, %r1, %r28
5658 stxa %r28, [%g0] 0x72
5659 ta T_CHANGE_NONHPRIV
5660 .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1>
5661tagged_40_138:
5662 tsubcctv %r18, 0x1f10, %r12
5663 .word 0xda07e134 ! 184: LDUW_I lduw [%r31 + 0x0134], %r13
5664splash_hpstate_40_139:
5665 ta T_CHANGE_NONHPRIV
5666 .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1>
5667 .word 0x81983595 ! 185: WRHPR_HPSTATE_I wrhpr %r0, 0x1595, %hpstate
5668 .word 0xda77c000 ! 186: STX_R stx %r13, [%r31 + %r0]
5669brcommon3_40_140:
5670 nop
5671 setx common_target, %r12, %r27
5672 lduw [%r27], %r12 ! Load common dest into dcache ..
5673 ba,a .+12
5674 .word 0xdb37e160 ! 1: STQF_I - %f13, [0x0160, %r31]
5675 ba,a .+8
5676 jmpl %r27+0, %r27
5677 .word 0x8d903e9f ! 187: WRPR_PSTATE_I wrpr %r0, 0x1e9f, %pstate
5678 otherw
5679 mov 0xb4, %r30
5680 .word 0x83d0001e ! 188: Tcc_R te icc_or_xcc, %r0 + %r30
5681ibp_40_141:
5682 nop
5683 ta T_CHANGE_HPRIV
5684 mov 8, %r18
5685 rd %asi, %r12
5686 wr %r0, 0x41, %asi
5687 set sync_thr_counter4, %r23
5688#ifndef SPC
5689 ldxa [%g0]0x63, %r8
5690 and %r8, 0x38, %r8 ! Core ID
5691 add %r8, %r23, %r23
5692#else
5693 mov 0, %r8
5694#endif
5695 mov 0x40, %r16
5696ibp_startwait40_141:
5697 cas [%r23],%g0,%r16 !lock
5698 brz,a %r16, continue_ibp_40_141
5699 mov (~0x40&0xf0), %r16
5700 ld [%r23], %r16
5701ibp_wait40_141:
5702 brnz %r16, ibp_wait40_141
5703 ld [%r23], %r16
5704 ba ibp_startwait40_141
5705 mov 0x40, %r16
5706continue_ibp_40_141:
5707 sllx %r16, %r8, %r16 !Mask for my core only
5708 ldxa [0x58]%asi, %r17 !Running_status
5709wait_for_stat_40_141:
5710 ldxa [0x50]%asi, %r13 !Running_rw
5711 cmp %r13, %r17
5712 bne,a %xcc, wait_for_stat_40_141
5713 ldxa [0x58]%asi, %r17 !Running_status
5714 stxa %r16, [0x68]%asi !Park (W1C)
5715 ldxa [0x50]%asi, %r14 !Running_rw
5716wait_for_ibp_40_141:
5717 ldxa [0x58]%asi, %r17 !Running_status
5718 cmp %r14, %r17
5719 bne,a %xcc, wait_for_ibp_40_141
5720 ldxa [0x50]%asi, %r14 !Running_rw
5721ibp_doit40_141:
5722 best_set_reg(0x000000509ecd80ea,%r19, %r20)
5723 stxa %r20, [%r18]0x42
5724 stxa %r16, [0x60] %asi !Unpark (W1S)
5725 st %g0, [%r23] !clear lock
5726 wr %r0, %r12, %asi !restore %asi
5727 .word 0x9b702bfa ! 189: POPC_I popc 0x0bfa, %r13
5728tagged_40_142:
5729 tsubcctv %r12, 0x1648, %r20
5730 .word 0xd807e15d ! 190: LDUW_I lduw [%r31 + 0x015d], %r12
5731 .word 0x87802055 ! 191: WRASI_I wr %r0, 0x0055, %asi
5732intveclr_40_143:
5733 nop
5734 ta T_CHANGE_HPRIV
5735 setx 0xb6d3db7d753c3a21, %r1, %r28
5736 stxa %r28, [%g0] 0x72
5737 ta T_CHANGE_NONHPRIV
5738 .word 0x25400001 ! 192: FBPLG fblg,a,pn %fcc0, <label_0x1>
5739#if (defined SPC || defined CMP1)
5740!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_144) + 48, 16, 16)) -> intp(2,0,2,,,,,1)
5741!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_144)&0xffffffff) + 40, 16, 16)) -> intp(6,0,12,,,,,1)
5742#else
5743 set 0x19c0dfb9, %r28
5744#if (MAX_THREADS == 8)
5745 and %r28, 0x7ff, %r28
5746#endif
5747 stxa %r28, [%g0] 0x73
5748#endif
5749intvec_40_144:
5750 .word 0x39400001 ! 193: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
5751 .word 0x8780204f ! 194: WRASI_I wr %r0, 0x004f, %asi
5752 .word 0x89800011 ! 195: WRTICK_R wr %r0, %r17, %tick
5753dvapa_40_146:
5754 nop
5755 ta T_CHANGE_HPRIV
5756 mov 0xcd0, %r20
5757 mov 0x7, %r19
5758 sllx %r20, 23, %r20
5759 or %r19, %r20, %r19
5760 stxa %r19, [%g0] ASI_LSU_CONTROL
5761 mov 0x38, %r18
5762 stxa %r31, [%r18]0x58
5763 ta T_CHANGE_NONHPRIV
5764 .word 0xe1bfd920 ! 196: STDFA_R stda %f16, [%r0, %r31]
5765splash_tba_40_147:
5766 nop
5767 ta T_CHANGE_PRIV
5768 setx 0x0000000400380000, %r11, %r12
5769 .word 0x8b90000c ! 197: WRPR_TBA_R wrpr %r0, %r12, %tba
5770 .word 0xa8c1b543 ! 198: ADDCcc_I addccc %r6, 0xfffff543, %r20
5771pmu_40_148:
5772 nop
5773 setx 0xffffffbcffffffa7, %g1, %g7
5774 .word 0xa3800007 ! 199: WR_PERF_COUNTER_R wr %r0, %r7, %-
5775ibp_40_149:
5776 nop
5777 ta T_CHANGE_HPRIV
5778 mov 8, %r18
5779 rd %asi, %r12
5780 wr %r0, 0x41, %asi
5781 set sync_thr_counter4, %r23
5782#ifndef SPC
5783 ldxa [%g0]0x63, %r8
5784 and %r8, 0x38, %r8 ! Core ID
5785 add %r8, %r23, %r23
5786#else
5787 mov 0, %r8
5788#endif
5789 mov 0x40, %r16
5790ibp_startwait40_149:
5791 cas [%r23],%g0,%r16 !lock
5792 brz,a %r16, continue_ibp_40_149
5793 mov (~0x40&0xf0), %r16
5794 ld [%r23], %r16
5795ibp_wait40_149:
5796 brnz %r16, ibp_wait40_149
5797 ld [%r23], %r16
5798 ba ibp_startwait40_149
5799 mov 0x40, %r16
5800continue_ibp_40_149:
5801 sllx %r16, %r8, %r16 !Mask for my core only
5802 ldxa [0x58]%asi, %r17 !Running_status
5803wait_for_stat_40_149:
5804 ldxa [0x50]%asi, %r13 !Running_rw
5805 cmp %r13, %r17
5806 bne,a %xcc, wait_for_stat_40_149
5807 ldxa [0x58]%asi, %r17 !Running_status
5808 stxa %r16, [0x68]%asi !Park (W1C)
5809 ldxa [0x50]%asi, %r14 !Running_rw
5810wait_for_ibp_40_149:
5811 ldxa [0x58]%asi, %r17 !Running_status
5812 cmp %r14, %r17
5813 bne,a %xcc, wait_for_ibp_40_149
5814 ldxa [0x50]%asi, %r14 !Running_rw
5815ibp_doit40_149:
5816 best_set_reg(0x00000040ebc0ea16,%r19, %r20)
5817 stxa %r20, [%r18]0x42
5818 stxa %r16, [0x60] %asi !Unpark (W1S)
5819 st %g0, [%r23] !clear lock
5820 wr %r0, %r12, %asi !restore %asi
5821 ta T_CHANGE_NONHPRIV
5822 .word 0xc1bfd960 ! 200: STDFA_R stda %f0, [%r0, %r31]
5823 nop
5824 nop
5825 ta T_CHANGE_PRIV
5826 wrpr %g0, %g0, %gl
5827 nop
5828 nop
5829.text
5830 setx join_lbl_0_0, %g1, %g2
5831 jmp %g2
5832 nop
5833fork_lbl_0_6:
5834 ta T_CHANGE_NONHPRIV
5835ibp_20_1:
5836 nop
5837 .word 0xe19fda00 ! 1: LDDFA_R ldda [%r31, %r0], %f16
5838splash_cmpr_20_2:
5839 mov 0, %r18
5840 sllx %r18, 63, %r18
5841 rd %tick, %r17
5842 add %r17, 0x60, %r17
5843 or %r17, %r18, %r17
5844 .word 0xb3800011 ! 2: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
5845mondo_20_3:
5846 nop
5847 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
5848 ta T_CHANGE_PRIV
5849 stxa %r19, [%r0+0x3d0] %asi
5850 .word 0x9d904010 ! 3: WRPR_WSTATE_R wrpr %r1, %r16, %wstate
5851 .word 0xe19fe180 ! 4: LDDFA_I ldda [%r31, 0x0180], %f16
5852 nop
5853 ta T_CHANGE_HPRIV
5854 mov 0x20+1, %r10
5855 set sync_thr_counter5, %r23
5856#ifndef SPC
5857 ldxa [%g0]0x63, %o1
5858 and %o1, 0x38, %o1
5859 add %o1, %r23, %r23
5860 sllx %o1, 5, %o3 !(CID*256)
5861#endif
5862 cas [%r23],%g0,%r10 !lock
5863 brnz %r10, cwq_20_4
5864 rd %asi, %r12
5865 wr %g0, 0x40, %asi
5866 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
5867 and %l1, 0x3, %l1 ! Check if busy/enabled ..
5868 cmp %l1, 1
5869 bne cwq_20_4
5870 set CWQ_BASE, %l6
5871#ifndef SPC
5872 add %l6, %o3, %l6
5873#endif
5874 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
5875 best_set_reg(0x20610040, %l1, %l2) !# Control Word
5876 sllx %l2, 32, %l2
5877 stx %l2, [%l6 + 0x0]
5878 membar #Sync
5879 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
5880 sub %l2, 0x40, %l2
5881 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
5882 wr %r12, %g0, %asi
5883 st %g0, [%r23]
5884cwq_20_4:
5885 ta T_CHANGE_NONHPRIV
5886 .word 0x91414000 ! 5: RDPC rd %pc, %r8
5887 nop
5888 ta T_CHANGE_HPRIV ! macro
5889donret_20_5:
5890 rd %pc, %r12
5891 mov HIGHVA_HIGHNUM, %r10
5892 sllx %r10, 32, %r10
5893 or %r12, %r10, %r12
5894 add %r12, (donretarg_20_5-donret_20_5), %r12
5895 add %r12, 0x8, %r11 ! nonseq tnpc
5896 wrpr %g0, 0x2, %tl
5897 wrpr %g0, %r12, %tpc
5898 wrpr %g0, %r11, %tnpc
5899 set (0x0097c000 | (28 << 24)), %r13
5900 and %r12, 0xfff, %r14
5901 sllx %r14, 30, %r14
5902 or %r13, %r14, %r20
5903 wrpr %r20, %g0, %tstate
5904 wrhpr %g0, 0x1d16, %htstate
5905 ta T_CHANGE_NONPRIV ! rand=0 (20)
5906 ldx [%r11+%r0], %g1
5907 done
5908donretarg_20_5:
5909 .word 0x81982f01 ! 6: WRHPR_HPSTATE_I wrhpr %r0, 0x0f01, %hpstate
5910 .word 0xe937e1f2 ! 7: STQF_I - %f20, [0x01f2, %r31]
5911jmptr_20_6:
5912 nop
5913 best_set_reg(0xe1a00000, %r20, %r27)
5914 .word 0xb7c6c000 ! 8: JMPL_R jmpl %r27 + %r0, %r27
5915 rd %tick, %r28
5916#if (MAX_THREADS == 8)
5917 sethi %hi(0x33800), %r27
5918#else
5919 sethi %hi(0x30000), %r27
5920#endif
5921 andn %r28, %r27, %r28
5922 ta T_CHANGE_HPRIV
5923 stxa %r28, [%g0] 0x73
5924intvec_20_7:
5925 .word 0x39400001 ! 9: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
5926 .word 0xa9a7c9cd ! 1: FDIVd fdivd %f62, %f44, %f20
5927 .word 0x9f8035b4 ! 10: SIR sir 0x15b4
5928 .word 0x8d802004 ! 11: WRFPRS_I wr %r0, 0x0004, %fprs
5929trapasi_20_8:
5930 nop
5931 mov 0x8, %r1 ! (VA for ASI 0x48)
5932 .word 0xe8c04900 ! 12: LDSWA_R ldswa [%r1, %r0] 0x48, %r20
5933 .word 0xe81fe0d8 ! 13: LDD_I ldd [%r31 + 0x00d8], %r20
5934 .word 0x2ecb0001 ! 1: BRGEZ brgez,a,pt %r12,<label_0xb0001>
5935 .word 0x8d903887 ! 14: WRPR_PSTATE_I wrpr %r0, 0x1887, %pstate
5936 nop
5937 ta T_CHANGE_HPRIV
5938 mov 0x20+1, %r10
5939 set sync_thr_counter5, %r23
5940#ifndef SPC
5941 ldxa [%g0]0x63, %o1
5942 and %o1, 0x38, %o1
5943 add %o1, %r23, %r23
5944 sllx %o1, 5, %o3 !(CID*256)
5945#endif
5946 cas [%r23],%g0,%r10 !lock
5947 brnz %r10, cwq_20_10
5948 rd %asi, %r12
5949 wr %g0, 0x40, %asi
5950 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
5951 and %l1, 0x3, %l1 ! Check if busy/enabled ..
5952 cmp %l1, 1
5953 bne cwq_20_10
5954 set CWQ_BASE, %l6
5955#ifndef SPC
5956 add %l6, %o3, %l6
5957#endif
5958 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
5959 best_set_reg(0x20610030, %l1, %l2) !# Control Word
5960 sllx %l2, 32, %l2
5961 stx %l2, [%l6 + 0x0]
5962 membar #Sync
5963 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
5964 sub %l2, 0x40, %l2
5965 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
5966 wr %r12, %g0, %asi
5967 st %g0, [%r23]
5968cwq_20_10:
5969 ta T_CHANGE_NONHPRIV
5970 .word 0xa9414000 ! 15: RDPC rd %pc, %r20
5971brcommon2_20_11:
5972 nop
5973 setx common_target, %r12, %r27
5974 ba,a .+12
5975 .word 0x9ba109c5 ! 1: FDIVd fdivd %f4, %f36, %f44
5976 ba,a .+8
5977 jmpl %r27+0, %r27
5978 .word 0xc1bfd960 ! 16: STDFA_R stda %f0, [%r0, %r31]
5979jmptr_20_12:
5980 nop
5981 best_set_reg(0xe1a00000, %r20, %r27)
5982 .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27
5983mondo_20_13:
5984 nop
5985 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
5986 ta T_CHANGE_PRIV
5987 stxa %r8, [%r0+0x3c8] %asi
5988 .word 0x9d924007 ! 18: WRPR_WSTATE_R wrpr %r9, %r7, %wstate
5989mondo_20_14:
5990 nop
5991 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
5992 stxa %r4, [%r0+0x3e0] %asi
5993 .word 0x9d92800d ! 19: WRPR_WSTATE_R wrpr %r10, %r13, %wstate
5994splash_cmpr_20_15:
5995 mov 0, %r18
5996 sllx %r18, 63, %r18
5997 rd %tick, %r17
5998 add %r17, 0x100, %r17
5999 or %r17, %r18, %r17
6000 ta T_CHANGE_HPRIV
6001 wrhpr %r17, %g0, %hsys_tick_cmpr
6002 .word 0xb3800011 ! 20: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
6003#if (defined SPC || defined CMP1)
6004!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_16) + 24, 16, 16)) -> intp(0,0,3,,,,,1)
6005!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_16)&0xffffffff) + 56, 16, 16)) -> intp(5,0,30,,,,,1)
6006#else
6007 set 0x53300637, %r28
6008#if (MAX_THREADS == 8)
6009 and %r28, 0x7ff, %r28
6010#endif
6011 stxa %r28, [%g0] 0x73
6012#endif
6013intvec_20_16:
6014 .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
6015 .word 0x81db4013 ! 22: FLUSH_R flush %r13, %r19, %r0
6016 .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1>
6017 .word 0x8d902a64 ! 23: WRPR_PSTATE_I wrpr %r0, 0x0a64, %pstate
6018 .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl
6019reduce_priv_lvl_20_18:
6020 ta T_CHANGE_NONHPRIV ! macro
6021mondo_20_19:
6022 nop
6023 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
6024 stxa %r19, [%r0+0x3c0] %asi
6025 .word 0x9d948011 ! 25: WRPR_WSTATE_R wrpr %r18, %r17, %wstate
6026 .word 0x81510000 ! 26: RDPR_TICK rdpr %tick, %r0
6027 .word 0x87992af9 ! 27: WRHPR_HINTP_I wrhpr %r4, 0x0af9, %hintp
6028fpinit_20_20:
6029 nop
6030 setx fp_data_quads, %r19, %r20
6031 ldd [%r20], %f0
6032 ldd [%r20+8], %f4
6033 ld [%r20+16], %fsr
6034 ld [%r20+24], %r19
6035 wr %r19, %g0, %gsr
6036 .word 0x8da009a4 ! 28: FDIVs fdivs %f0, %f4, %f6
6037mondo_20_21:
6038 nop
6039 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
6040 stxa %r18, [%r0+0x3e0] %asi
6041 .word 0x9d934005 ! 29: WRPR_WSTATE_R wrpr %r13, %r5, %wstate
6042splash_hpstate_20_22:
6043 .word 0x81982a45 ! 30: WRHPR_HPSTATE_I wrhpr %r0, 0x0a45, %hpstate
6044splash_tba_20_23:
6045 nop
6046 ta T_CHANGE_PRIV
6047 setx 0x00000004003a0000, %r11, %r12
6048 .word 0x8b90000c ! 31: WRPR_TBA_R wrpr %r0, %r12, %tba
6049trapasi_20_24:
6050 nop
6051 mov 0x8, %r1 ! (VA for ASI 0x4a)
6052 .word 0xe8d84940 ! 32: LDXA_R ldxa [%r1, %r0] 0x4a, %r20
6053 rd %tick, %r28
6054#if (MAX_THREADS == 8)
6055 sethi %hi(0x33800), %r27
6056#else
6057 sethi %hi(0x30000), %r27
6058#endif
6059 andn %r28, %r27, %r28
6060 ta T_CHANGE_HPRIV
6061 stxa %r28, [%g0] 0x73
6062intvec_20_25:
6063 .word 0x39400001 ! 33: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
6064 nop
6065 ta T_CHANGE_HPRIV
6066 mov 0x20, %r10
6067 set sync_thr_counter6, %r23
6068#ifndef SPC
6069 ldxa [%g0]0x63, %o1
6070 and %o1, 0x38, %o1
6071 add %o1, %r23, %r23
6072#endif
6073 cas [%r23],%g0,%r10 !lock
6074 brnz %r10, sma_20_26
6075 rd %asi, %r12
6076 wr %g0, 0x40, %asi
6077 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
6078 set 0x001a1fff, %g1
6079 stxa %g1, [%g0 + 0x80] %asi
6080 wr %r12, %g0, %asi
6081 st %g0, [%r23]
6082sma_20_26:
6083 ta T_CHANGE_NONHPRIV
6084 .word 0xe9e7e013 ! 34: CASA_R casa [%r31] %asi, %r19, %r20
6085 .word 0xe89fe040 ! 35: LDDA_I ldda [%r31, + 0x0040] %asi, %r20
6086 nop
6087 ta T_CHANGE_HPRIV
6088 mov 0x20, %r10
6089 set sync_thr_counter6, %r23
6090#ifndef SPC
6091 ldxa [%g0]0x63, %o1
6092 and %o1, 0x38, %o1
6093 add %o1, %r23, %r23
6094#endif
6095 cas [%r23],%g0,%r10 !lock
6096 brnz %r10, sma_20_27
6097 rd %asi, %r12
6098 wr %g0, 0x40, %asi
6099 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
6100 set 0x00121fff, %g1
6101 stxa %g1, [%g0 + 0x80] %asi
6102 wr %r12, %g0, %asi
6103 st %g0, [%r23]
6104sma_20_27:
6105 ta T_CHANGE_NONHPRIV
6106 .word 0xe9e7e014 ! 36: CASA_R casa [%r31] %asi, %r20, %r20
6107 nop
6108 ta T_CHANGE_HPRIV ! macro
6109donret_20_28:
6110 rd %pc, %r12
6111 mov HIGHVA_HIGHNUM, %r10
6112 sllx %r10, 32, %r10
6113 or %r12, %r10, %r12
6114 add %r12, (donretarg_20_28-donret_20_28), %r12
6115 add %r12, 0x4, %r11 ! seq tnpc
6116 andn %r11, %r10, %r11 ! low VA tnpc
6117 wrpr %g0, 0x2, %tl
6118 wrpr %g0, %r12, %tpc
6119 wrpr %g0, %r11, %tnpc
6120 set (0x00255d00 | (28 << 24)), %r13
6121 and %r12, 0xfff, %r14
6122 sllx %r14, 30, %r14
6123 or %r13, %r14, %r20
6124 wrpr %r20, %g0, %tstate
6125 wrhpr %g0, 0x1eb5, %htstate
6126 ta T_CHANGE_NONHPRIV ! rand=1 (20)
6127 retry
6128donretarg_20_28:
6129 .word 0x33400001 ! 37: FBPE fbe,a,pn %fcc0, <label_0x1>
6130brcommon2_20_29:
6131 nop
6132 setx common_target, %r12, %r27
6133 ba,a .+12
6134 .word 0x91a00546 ! 1: FSQRTd fsqrt
6135 ba,a .+8
6136 jmpl %r27+0, %r27
6137 .word 0xe1bfe0e0 ! 38: STDFA_I stda %f16, [0x00e0, %r31]
6138 .word 0x91904011 ! 39: WRPR_PIL_R wrpr %r1, %r17, %pil
6139 .word 0xd877e138 ! 40: STX_I stx %r12, [%r31 + 0x0138]
6140 nop
6141 ta T_CHANGE_HPRIV
6142 mov 0x20+1, %r10
6143 set sync_thr_counter5, %r23
6144#ifndef SPC
6145 ldxa [%g0]0x63, %o1
6146 and %o1, 0x38, %o1
6147 add %o1, %r23, %r23
6148 sllx %o1, 5, %o3 !(CID*256)
6149#endif
6150 cas [%r23],%g0,%r10 !lock
6151 brnz %r10, cwq_20_31
6152 rd %asi, %r12
6153 wr %g0, 0x40, %asi
6154 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
6155 and %l1, 0x3, %l1 ! Check if busy/enabled ..
6156 cmp %l1, 1
6157 bne cwq_20_31
6158 set CWQ_BASE, %l6
6159#ifndef SPC
6160 add %l6, %o3, %l6
6161#endif
6162 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
6163 best_set_reg(0x206100f0, %l1, %l2) !# Control Word
6164 sllx %l2, 32, %l2
6165 stx %l2, [%l6 + 0x0]
6166 membar #Sync
6167 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
6168 sub %l2, 0x40, %l2
6169 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
6170 wr %r12, %g0, %asi
6171 st %g0, [%r23]
6172cwq_20_31:
6173 ta T_CHANGE_NONHPRIV
6174 .word 0x93414000 ! 41: RDPC rd %pc, %r9
6175 .word 0xe69fe1e0 ! 42: LDDA_I ldda [%r31, + 0x01e0] %asi, %r19
6176 nop
6177 ta T_CHANGE_HPRIV
6178 mov 0x20, %r10
6179 set sync_thr_counter6, %r23
6180#ifndef SPC
6181 ldxa [%g0]0x63, %o1
6182 and %o1, 0x38, %o1
6183 add %o1, %r23, %r23
6184#endif
6185 cas [%r23],%g0,%r10 !lock
6186 brnz %r10, sma_20_33
6187 rd %asi, %r12
6188 wr %g0, 0x40, %asi
6189 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
6190 set 0x000a1fff, %g1
6191 stxa %g1, [%g0 + 0x80] %asi
6192 wr %r12, %g0, %asi
6193 st %g0, [%r23]
6194sma_20_33:
6195 ta T_CHANGE_NONHPRIV
6196 .word 0xe7e7e009 ! 43: CASA_R casa [%r31] %asi, %r9, %r19
6197 nop
6198 ta T_CHANGE_HPRIV ! macro
6199donret_20_34:
6200 rd %pc, %r12
6201 mov HIGHVA_HIGHNUM, %r10
6202 sllx %r10, 32, %r10
6203 or %r12, %r10, %r12
6204 add %r12, (donretarg_20_34-donret_20_34+4), %r12
6205 add %r12, 0x4, %r11 ! seq tnpc
6206 wrpr %g0, 0x1, %tl
6207 wrpr %g0, %r12, %tpc
6208 wrpr %g0, %r11, %tnpc
6209 set (0x00ab3100 | (0x88 << 24)), %r13
6210 and %r12, 0xfff, %r14
6211 sllx %r14, 30, %r14
6212 or %r13, %r14, %r20
6213 wrpr %r20, %g0, %tstate
6214 wrhpr %g0, 0x154c, %htstate
6215 ta T_CHANGE_NONPRIV ! rand=0 (20)
6216 retry
6217donretarg_20_34:
6218 .word 0xe66fe1fb ! 44: LDSTUB_I ldstub %r19, [%r31 + 0x01fb]
6219 nop
6220 mov 0x80, %g3
6221 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
6222 stxa %g3, [%g3] 0x57
6223 .word 0xe65fc000 ! 45: LDX_R ldx [%r31 + %r0], %r19
6224#if (defined SPC || defined CMP)
6225!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_35)+16, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1)
6226!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_35)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1)
6227xir_20_35:
6228#else
6229#if (defined FC)
6230!! Generate XIR via RESET_GEN register
6231 ta T_CHANGE_HPRIV
6232 rdpr %pstate, %r18
6233 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
6234 wrpr %r18, %pstate
6235#ifndef XIR_RND_CORES
6236 ldxa [%g0] 0x63, %o1
6237 mov 1, %r18
6238 sllx %r18, %o1, %r18
6239#endif
6240 mov 0x30, %r19
6241 setx 0x8900000808, %r16, %r17
6242 mov 0x2, %r16
6243xir_20_35:
6244 stxa %r18, [%r19] 0x41
6245 stx %r16, [%r17]
6246#endif
6247#endif
6248 .word 0xa9847dff ! 46: WR_SET_SOFTINT_I wr %r17, 0x1dff, %set_softint
6249 .word 0xc32fc011 ! 47: STXFSR_R st-sfr %f1, [%r17, %r31]
6250 nop
6251 ta T_CHANGE_HPRIV ! macro
6252donret_20_37:
6253 rd %pc, %r12
6254 mov HIGHVA_HIGHNUM, %r10
6255 sllx %r10, 32, %r10
6256 or %r12, %r10, %r12
6257 add %r12, (donretarg_20_37-donret_20_37+4), %r12
6258 add %r12, 0x4, %r11 ! seq tnpc
6259 andn %r12, %r10, %r12 ! low VA tpc
6260 wrpr %g0, 0x1, %tl
6261 wrpr %g0, %r12, %tpc
6262 wrpr %g0, %r11, %tnpc
6263 set (0x0034f500 | (0x4f << 24)), %r13
6264 and %r12, 0xfff, %r14
6265 sllx %r14, 30, %r14
6266 or %r13, %r14, %r20
6267 wrpr %r20, %g0, %tstate
6268 wrhpr %g0, 0xd1d, %htstate
6269 ta T_CHANGE_NONPRIV ! rand=0 (20)
6270 ldx [%r11+%r0], %g1
6271 done
6272.align 32
6273donretarg_20_37:
6274 .word 0x8d903752 ! 48: WRPR_PSTATE_I wrpr %r0, 0x1752, %pstate
6275 .word 0x89800011 ! 49: WRTICK_R wr %r0, %r17, %tick
6276 .word 0xe1bfe0a0 ! 50: STDFA_I stda %f16, [0x00a0, %r31]
6277splash_lsu_20_40:
6278 nop
6279 ta T_CHANGE_HPRIV
6280 set 0x720913e1, %r2
6281 mov 0x6, %r1
6282 sllx %r1, 32, %r1
6283 or %r1, %r2, %r2
6284 stxa %r2, [%r0] ASI_LSU_CONTROL
6285 .word 0x3d400001 ! 51: FBPULE fbule,a,pn %fcc0, <label_0x1>
6286change_to_randtl_20_41:
6287 ta T_CHANGE_HPRIV ! macro
6288done_change_to_randtl_20_41:
6289 .word 0x8f902000 ! 52: WRPR_TL_I wrpr %r0, 0x0000, %tl
6290 .word 0xe1bfdc00 ! 53: STDFA_R stda %f16, [%r0, %r31]
6291 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick
6292 nop
6293 ta T_CHANGE_HPRIV ! macro
6294donret_20_43:
6295 rd %pc, %r12
6296 mov HIGHVA_HIGHNUM, %r10
6297 sllx %r10, 32, %r10
6298 or %r12, %r10, %r12
6299 add %r12, (donretarg_20_43-donret_20_43+4), %r12
6300 add %r12, 0x4, %r11 ! seq tnpc
6301 wrpr %g0, 0x1, %tl
6302 wrpr %g0, %r12, %tpc
6303 wrpr %g0, %r11, %tnpc
6304 set (0x00db6700 | (28 << 24)), %r13
6305 and %r12, 0xfff, %r14
6306 sllx %r14, 30, %r14
6307 or %r13, %r14, %r20
6308 wrpr %r20, %g0, %tstate
6309 wrhpr %g0, 0xa07, %htstate
6310 ta T_CHANGE_NONPRIV ! rand=0 (20)
6311 .word 0x34800001 ! 1: BG bg,a <label_0x1>
6312 done
6313.align 32
6314donretarg_20_43:
6315 .word 0x81982c46 ! 55: WRHPR_HPSTATE_I wrhpr %r0, 0x0c46, %hpstate
6316 .word 0xe64fc000 ! 56: LDSB_R ldsb [%r31 + %r0], %r19
6317 .word 0xe71fe128 ! 57: LDDF_I ldd [%r31, 0x0128], %f19
6318 .word 0x87802016 ! 58: WRASI_I wr %r0, 0x0016, %asi
6319 .word 0x89800011 ! 59: WRTICK_R wr %r0, %r17, %tick
6320 nop
6321 ta T_CHANGE_HPRIV
6322 mov 0x20+1, %r10
6323 set sync_thr_counter5, %r23
6324#ifndef SPC
6325 ldxa [%g0]0x63, %o1
6326 and %o1, 0x38, %o1
6327 add %o1, %r23, %r23
6328 sllx %o1, 5, %o3 !(CID*256)
6329#endif
6330 cas [%r23],%g0,%r10 !lock
6331 brnz %r10, cwq_20_45
6332 rd %asi, %r12
6333 wr %g0, 0x40, %asi
6334 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
6335 and %l1, 0x3, %l1 ! Check if busy/enabled ..
6336 cmp %l1, 1
6337 bne cwq_20_45
6338 set CWQ_BASE, %l6
6339#ifndef SPC
6340 add %l6, %o3, %l6
6341#endif
6342 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
6343 best_set_reg(0x20610080, %l1, %l2) !# Control Word
6344 sllx %l2, 32, %l2
6345 stx %l2, [%l6 + 0x0]
6346 membar #Sync
6347 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
6348 sub %l2, 0x40, %l2
6349 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
6350 wr %r12, %g0, %asi
6351 st %g0, [%r23]
6352cwq_20_45:
6353 ta T_CHANGE_NONHPRIV
6354 .word 0x93414000 ! 60: RDPC rd %pc, %r9
6355mondo_20_46:
6356 nop
6357 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
6358 ta T_CHANGE_PRIV
6359 stxa %r18, [%r0+0x3c0] %asi
6360 .word 0x9d940012 ! 61: WRPR_WSTATE_R wrpr %r16, %r18, %wstate
6361 .word 0x91d020b5 ! 62: Tcc_I ta icc_or_xcc, %r0 + 181
6362splash_lsu_20_47:
6363 nop
6364 ta T_CHANGE_HPRIV
6365 set 0x8d16583d, %r2
6366 mov 0x5, %r1
6367 sllx %r1, 32, %r1
6368 or %r1, %r2, %r2
6369 stxa %r2, [%r0] ASI_LSU_CONTROL
6370 .word 0x3d400001 ! 63: FBPULE fbule,a,pn %fcc0, <label_0x1>
6371ibp_20_48:
6372 nop
6373 .word 0xe1bfdf20 ! 64: STDFA_R stda %f16, [%r0, %r31]
6374splash_hpstate_20_49:
6375 .word 0x819823cf ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x03cf, %hpstate
6376 .word 0x8d903cc0 ! 66: WRPR_PSTATE_I wrpr %r0, 0x1cc0, %pstate
6377 rd %tick, %r28
6378#if (MAX_THREADS == 8)
6379 sethi %hi(0x33800), %r27
6380#else
6381 sethi %hi(0x30000), %r27
6382#endif
6383 andn %r28, %r27, %r28
6384 ta T_CHANGE_HPRIV
6385 stxa %r28, [%g0] 0x73
6386intvec_20_51:
6387 .word 0x39400001 ! 67: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
6388 .word 0xa3b447d4 ! 68: PDIST pdistn %d48, %d20, %d48
6389 nop
6390 ta T_CHANGE_HPRIV ! macro
6391donret_20_53:
6392 rd %pc, %r12
6393 mov HIGHVA_HIGHNUM, %r10
6394 sllx %r10, 32, %r10
6395 or %r12, %r10, %r12
6396 add %r12, (donretarg_20_53-donret_20_53+4), %r12
6397 add %r12, 0x4, %r11 ! seq tnpc
6398 wrpr %g0, 0x2, %tl
6399 wrpr %g0, %r12, %tpc
6400 wrpr %g0, %r11, %tnpc
6401 set (0x00d5cc00 | (0x55 << 24)), %r13
6402 and %r12, 0xfff, %r14
6403 sllx %r14, 30, %r14
6404 or %r13, %r14, %r20
6405 wrpr %r20, %g0, %tstate
6406 wrhpr %g0, 0xf0d, %htstate
6407 ta T_CHANGE_NONPRIV ! rand=0 (20)
6408 ldx [%r11+%r0], %g1
6409 done
6410donretarg_20_53:
6411 .word 0x24cc8001 ! 69: BRLEZ brlez,a,pt %r18,<label_0xc8001>
6412 set 0x1b64, %l3
6413 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
6414 .word 0xa7b447c3 ! 70: PDIST pdistn %d48, %d34, %d50
6415 .word 0xa1a00167 ! 71: FABSq dis not found
6416
6417ibp_20_55:
6418 nop
6419 ta T_CHANGE_NONHPRIV
6420 .word 0xc19fe1a0 ! 72: LDDFA_I ldda [%r31, 0x01a0], %f0
6421 nop
6422 ta T_CHANGE_HPRIV ! macro
6423donret_20_56:
6424 rd %pc, %r12
6425 mov HIGHVA_HIGHNUM, %r10
6426 sllx %r10, 32, %r10
6427 or %r12, %r10, %r12
6428 add %r12, (donretarg_20_56-donret_20_56), %r12
6429 add %r12, 0x8, %r11 ! nonseq tnpc
6430 wrpr %g0, 0x2, %tl
6431 wrpr %g0, %r12, %tpc
6432 wrpr %g0, %r11, %tnpc
6433 set (0x0095cd00 | (28 << 24)), %r13
6434 and %r12, 0xfff, %r14
6435 sllx %r14, 30, %r14
6436 or %r13, %r14, %r20
6437 wrpr %r20, %g0, %tstate
6438 wrhpr %g0, 0x199f, %htstate
6439 ta T_CHANGE_NONHPRIV ! rand=1 (20)
6440 retry
6441.align 32
6442donretarg_20_56:
6443 .word 0xe4ffe0ac ! 73: SWAPA_I swapa %r18, [%r31 + 0x00ac] %asi
6444brcommon3_20_57:
6445 nop
6446 setx common_target, %r12, %r27
6447 lduw [%r27], %r12 ! Load common dest into dcache ..
6448 ba,a .+12
6449 .word 0xe537c011 ! 1: STQF_R - %f18, [%r17, %r31]
6450 ba,a .+8
6451 jmpl %r27+0, %r27
6452 .word 0xe4dfc031 ! 74: LDXA_R ldxa [%r31, %r17] 0x01, %r18
6453 .word 0x91928010 ! 75: WRPR_PIL_R wrpr %r10, %r16, %pil
6454splash_cmpr_20_59:
6455 mov 0, %r18
6456 sllx %r18, 63, %r18
6457 rd %tick, %r17
6458 add %r17, 0x80, %r17
6459 or %r17, %r18, %r17
6460 ta T_CHANGE_PRIV
6461 .word 0xaf800011 ! 76: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
6462splash_cmpr_20_60:
6463 mov 1, %r18
6464 sllx %r18, 63, %r18
6465 rd %tick, %r17
6466 add %r17, 0x50, %r17
6467 or %r17, %r18, %r17
6468 ta T_CHANGE_HPRIV
6469 wrhpr %r17, %g0, %hsys_tick_cmpr
6470 .word 0xb3800011 ! 77: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
6471 .word 0x87802058 ! 78: WRASI_I wr %r0, 0x0058, %asi
6472brcommon3_20_61:
6473 nop
6474 setx common_target, %r12, %r27
6475 lduw [%r27], %r12 ! Load common dest into dcache ..
6476 ba,a .+12
6477 .word 0xe537c00c ! 1: STQF_R - %f18, [%r12, %r31]
6478 ba,a .+8
6479 jmpl %r27+0, %r27
6480 .word 0xe53fc010 ! 79: STDF_R std %f18, [%r16, %r31]
6481mondo_20_62:
6482 nop
6483 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
6484 ta T_CHANGE_PRIV
6485 stxa %r5, [%r0+0x3c8] %asi
6486 .word 0x9d94c005 ! 80: WRPR_WSTATE_R wrpr %r19, %r5, %wstate
6487 nop
6488 mov 0x80, %g3
6489 stxa %g3, [%g3] 0x5f
6490 .word 0xe45fc000 ! 81: LDX_R ldx [%r31 + %r0], %r18
6491 set 0x10ca, %l3
6492 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
6493 .word 0xa7b407ca ! 82: PDIST pdistn %d16, %d10, %d50
6494 .word 0xd3e7c020 ! 83: CASA_I casa [%r31] 0x 1, %r0, %r9
6495 .word 0xa7a00168 ! 84: FABSq dis not found
6496
6497 nop
6498 ta T_CHANGE_HPRIV
6499 mov 0x20+1, %r10
6500 set sync_thr_counter5, %r23
6501#ifndef SPC
6502 ldxa [%g0]0x63, %o1
6503 and %o1, 0x38, %o1
6504 add %o1, %r23, %r23
6505 sllx %o1, 5, %o3 !(CID*256)
6506#endif
6507 cas [%r23],%g0,%r10 !lock
6508 brnz %r10, cwq_20_65
6509 rd %asi, %r12
6510 wr %g0, 0x40, %asi
6511 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
6512 and %l1, 0x3, %l1 ! Check if busy/enabled ..
6513 cmp %l1, 1
6514 bne cwq_20_65
6515 set CWQ_BASE, %l6
6516#ifndef SPC
6517 add %l6, %o3, %l6
6518#endif
6519 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
6520 best_set_reg(0x206100e0, %l1, %l2) !# Control Word
6521 sllx %l2, 32, %l2
6522 stx %l2, [%l6 + 0x0]
6523 membar #Sync
6524 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
6525 sub %l2, 0x40, %l2
6526 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
6527 wr %r12, %g0, %asi
6528 st %g0, [%r23]
6529cwq_20_65:
6530 ta T_CHANGE_NONHPRIV
6531 .word 0xa9414000 ! 85: RDPC rd %pc, %r20
6532 .word 0x97450000 ! 86: RD_SET_SOFTINT rd %set_softint, %r11
6533brcommon1_20_66:
6534 nop
6535 setx common_target, %r12, %r27
6536 lduw [%r27], %r12 ! Load common dest into dcache ..
6537 ba,a .+12
6538 .word 0x93b7c7c8 ! 1: PDIST pdistn %d62, %d8, %d40
6539 ba,a .+8
6540 jmpl %r27+0, %r27
6541 .word 0x97a509ab ! 87: FDIVs fdivs %f20, %f11, %f11
6542pmu_20_67:
6543 nop
6544 setx 0xffffffbdffffffaf, %g1, %g7
6545 .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %-
6546#if (defined SPC || defined CMP)
6547!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_68)+40, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1)
6548!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_68)&0xffffffff) + 16, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1)
6549xir_20_68:
6550#else
6551#if (defined FC)
6552!! Generate XIR via RESET_GEN register
6553 ta T_CHANGE_HPRIV
6554 rdpr %pstate, %r18
6555 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
6556 wrpr %r18, %pstate
6557#ifndef XIR_RND_CORES
6558 ldxa [%g0] 0x63, %o1
6559 mov 1, %r18
6560 sllx %r18, %o1, %r18
6561#endif
6562 mov 0x30, %r19
6563 setx 0x8900000808, %r16, %r17
6564 mov 0x2, %r16
6565xir_20_68:
6566 stxa %r18, [%r19] 0x41
6567 stx %r16, [%r17]
6568#endif
6569#endif
6570 .word 0xa9852c3c ! 89: WR_SET_SOFTINT_I wr %r20, 0x0c3c, %set_softint
6571 rd %tick, %r28
6572#if (MAX_THREADS == 8)
6573 sethi %hi(0x33800), %r27
6574#else
6575 sethi %hi(0x30000), %r27
6576#endif
6577 andn %r28, %r27, %r28
6578 ta T_CHANGE_HPRIV
6579 stxa %r28, [%g0] 0x73
6580intvec_20_69:
6581 .word 0x39400001 ! 90: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
6582fpinit_20_70:
6583 nop
6584 setx fp_data_quads, %r19, %r20
6585 ldd [%r20], %f0
6586 ldd [%r20+8], %f4
6587 ld [%r20+16], %fsr
6588 ld [%r20+24], %r19
6589 wr %r19, %g0, %gsr
6590 .word 0xc3e823fe ! 91: PREFETCHA_I prefetcha [%r0, + 0x03fe] %asi, #one_read
6591mondo_20_71:
6592 nop
6593 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
6594 ta T_CHANGE_PRIV
6595 stxa %r20, [%r0+0x3d8] %asi
6596 .word 0x9d91c010 ! 92: WRPR_WSTATE_R wrpr %r7, %r16, %wstate
6597 .word 0x8d903191 ! 93: WRPR_PSTATE_I wrpr %r0, 0x1191, %pstate
6598 .word 0x8d802004 ! 94: WRFPRS_I wr %r0, 0x0004, %fprs
6599 nop
6600 ta T_CHANGE_HPRIV
6601 mov 0x20, %r10
6602 set sync_thr_counter6, %r23
6603#ifndef SPC
6604 ldxa [%g0]0x63, %o1
6605 and %o1, 0x38, %o1
6606 add %o1, %r23, %r23
6607#endif
6608 cas [%r23],%g0,%r10 !lock
6609 brnz %r10, sma_20_73
6610 rd %asi, %r12
6611 wr %g0, 0x40, %asi
6612 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
6613 set 0x000e1fff, %g1
6614 stxa %g1, [%g0 + 0x80] %asi
6615 wr %r12, %g0, %asi
6616 st %g0, [%r23]
6617sma_20_73:
6618 ta T_CHANGE_NONHPRIV
6619 .word 0xd1e7e00a ! 95: CASA_R casa [%r31] %asi, %r10, %r8
6620ibp_20_74:
6621 nop
6622 ta T_CHANGE_NONHPRIV
6623 .word 0x9b703925 ! 96: POPC_I popc 0x1925, %r13
6624 .word 0xc3ec0031 ! 97: PREFETCHA_R prefetcha [%r16, %r17] 0x01, #one_read
6625trapasi_20_76:
6626 nop
6627 mov 0x10, %r1 ! (VA for ASI 0x5a)
6628 .word 0xd8c04b40 ! 98: LDSWA_R ldswa [%r1, %r0] 0x5a, %r12
6629 .word 0x81460000 ! 99: RD_STICK_REG stbar
6630jmptr_20_77:
6631 nop
6632 best_set_reg(0xe0a00000, %r20, %r27)
6633 .word 0xb7c6c000 ! 100: JMPL_R jmpl %r27 + %r0, %r27
6634pmu_20_78:
6635 nop
6636 ta T_CHANGE_PRIV
6637 setx 0xffffffbcffffffa7, %g1, %g7
6638 .word 0xa3800007 ! 101: WR_PERF_COUNTER_R wr %r0, %r7, %-
6639memptr_20_79:
6640 set 0x60540000, %r31
6641 .word 0x85853bfa ! 102: WRCCR_I wr %r20, 0x1bfa, %ccr
6642 .word 0xd8cfe018 ! 103: LDSBA_I ldsba [%r31, + 0x0018] %asi, %r12
6643change_to_randtl_20_80:
6644 ta T_CHANGE_PRIV ! macro
6645done_change_to_randtl_20_80:
6646 .word 0x8f902000 ! 104: WRPR_TL_I wrpr %r0, 0x0000, %tl
6647pmu_20_81:
6648 nop
6649 setx 0xffffffbeffffffa5, %g1, %g7
6650 .word 0xa3800007 ! 105: WR_PERF_COUNTER_R wr %r0, %r7, %-
6651splash_lsu_20_82:
6652 nop
6653 ta T_CHANGE_HPRIV
6654 set 0xef760883, %r2
6655 mov 0x5, %r1
6656 sllx %r1, 32, %r1
6657 or %r1, %r2, %r2
6658 .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1>
6659 stxa %r2, [%r0] ASI_LSU_CONTROL
6660 .word 0x3d400001 ! 106: FBPULE fbule,a,pn %fcc0, <label_0x1>
6661 .word 0xd8cfe090 ! 107: LDSBA_I ldsba [%r31, + 0x0090] %asi, %r12
6662 .word 0xc36fe140 ! 1: PREFETCH_I prefetch [%r31 + 0x0140], #one_read
6663 .word 0x9f802ffb ! 108: SIR sir 0x0ffb
6664 .word 0xd8dfe1f8 ! 109: LDXA_I ldxa [%r31, + 0x01f8] %asi, %r12
6665 .word 0x87802014 ! 110: WRASI_I wr %r0, 0x0014, %asi
6666mondo_20_83:
6667 nop
6668 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
6669 stxa %r6, [%r0+0x3d8] %asi
6670 .word 0x9d91c011 ! 111: WRPR_WSTATE_R wrpr %r7, %r17, %wstate
6671 .word 0x81460000 ! 112: RD_STICK_REG stbar
6672 .word 0x87ab4a44 ! 113: FCMPd fcmpd %fcc<n>, %f44, %f4
6673 nop
6674 ta T_CHANGE_HPRIV
6675 mov 0x20+1, %r10
6676 set sync_thr_counter5, %r23
6677#ifndef SPC
6678 ldxa [%g0]0x63, %o1
6679 and %o1, 0x38, %o1
6680 add %o1, %r23, %r23
6681 sllx %o1, 5, %o3 !(CID*256)
6682#endif
6683 cas [%r23],%g0,%r10 !lock
6684 brnz %r10, cwq_20_85
6685 rd %asi, %r12
6686 wr %g0, 0x40, %asi
6687 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
6688 and %l1, 0x3, %l1 ! Check if busy/enabled ..
6689 cmp %l1, 1
6690 bne cwq_20_85
6691 set CWQ_BASE, %l6
6692#ifndef SPC
6693 add %l6, %o3, %l6
6694#endif
6695 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
6696 best_set_reg(0x206100d0, %l1, %l2) !# Control Word
6697 sllx %l2, 32, %l2
6698 stx %l2, [%l6 + 0x0]
6699 membar #Sync
6700 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
6701 sub %l2, 0x40, %l2
6702 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
6703 wr %r12, %g0, %asi
6704 st %g0, [%r23]
6705cwq_20_85:
6706 ta T_CHANGE_NONHPRIV
6707 .word 0xa5414000 ! 114: RDPC rd %pc, %r18
6708#if (defined SPC || defined CMP1)
6709!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_86) + 40, 16, 16)) -> intp(5,0,0,,,,,1)
6710!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_86)&0xffffffff) + 32, 16, 16)) -> intp(3,0,20,,,,,1)
6711#else
6712 set 0x3850ce3c, %r28
6713#if (MAX_THREADS == 8)
6714 and %r28, 0x7ff, %r28
6715#endif
6716 stxa %r28, [%g0] 0x73
6717#endif
6718intvec_20_86:
6719 .word 0x39400001 ! 115: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
6720pmu_20_87:
6721 nop
6722 setx 0xffffffb9ffffffa3, %g1, %g7
6723 .word 0xa3800007 ! 116: WR_PERF_COUNTER_R wr %r0, %r7, %-
6724trapasi_20_88:
6725 nop
6726 mov 0x10, %r1 ! (VA for ASI 0x49)
6727 .word 0xd8d84920 ! 117: LDXA_R ldxa [%r1, %r0] 0x49, %r12
6728 .word 0x95450000 ! 118: RD_SET_SOFTINT rd %set_softint, %r10
6729fpinit_20_89:
6730 nop
6731 setx fp_data_quads, %r19, %r20
6732 ldd [%r20], %f0
6733 ldd [%r20+8], %f4
6734 ld [%r20+16], %fsr
6735 ld [%r20+24], %r19
6736 wr %r19, %g0, %gsr
6737 .word 0x89a009a4 ! 119: FDIVs fdivs %f0, %f4, %f4
6738 .word 0xc30fc00d ! 1: LDXFSR_R ld-fsr [%r31, %r13], %f1
6739 .word 0x9f8034ef ! 120: SIR sir 0x14ef
6740 nop
6741 ta T_CHANGE_HPRIV ! macro
6742donret_20_90:
6743 rd %pc, %r12
6744 mov HIGHVA_HIGHNUM, %r10
6745 sllx %r10, 32, %r10
6746 or %r12, %r10, %r12
6747 add %r12, (donretarg_20_90-donret_20_90+4), %r12
6748 add %r12, 0x4, %r11 ! seq tnpc
6749 wrpr %g0, 0x1, %tl
6750 wrpr %g0, %r12, %tpc
6751 wrpr %g0, %r11, %tnpc
6752 set (0x00279900 | (0x55 << 24)), %r13
6753 and %r12, 0xfff, %r14
6754 sllx %r14, 30, %r14
6755 or %r13, %r14, %r20
6756 wrpr %r20, %g0, %tstate
6757 wrhpr %g0, 0x148e, %htstate
6758 ta T_CHANGE_NONPRIV ! rand=0 (20)
6759 retry
6760.align 32
6761donretarg_20_90:
6762 .word 0xe66fe0d8 ! 121: LDSTUB_I ldstub %r19, [%r31 + 0x00d8]
6763 .word 0xe69fc02b ! 1: LDDA_R ldda [%r31, %r11] 0x01, %r19
6764 .word 0x9f802611 ! 122: SIR sir 0x0611
6765splash_htba_20_91:
6766 nop
6767 ta T_CHANGE_HPRIV
6768 setx 0x00000002002a0000, %r11, %r12
6769 .word 0x8b98000c ! 123: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
6770 nop
6771 ta T_CHANGE_HPRIV
6772 mov 0x20+1, %r10
6773 set sync_thr_counter5, %r23
6774#ifndef SPC
6775 ldxa [%g0]0x63, %o1
6776 and %o1, 0x38, %o1
6777 add %o1, %r23, %r23
6778 sllx %o1, 5, %o3 !(CID*256)
6779#endif
6780 cas [%r23],%g0,%r10 !lock
6781 brnz %r10, cwq_20_92
6782 rd %asi, %r12
6783 wr %g0, 0x40, %asi
6784 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
6785 and %l1, 0x3, %l1 ! Check if busy/enabled ..
6786 cmp %l1, 1
6787 bne cwq_20_92
6788 set CWQ_BASE, %l6
6789#ifndef SPC
6790 add %l6, %o3, %l6
6791#endif
6792 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
6793 best_set_reg(0x206100b0, %l1, %l2) !# Control Word
6794 sllx %l2, 32, %l2
6795 stx %l2, [%l6 + 0x0]
6796 membar #Sync
6797 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
6798 sub %l2, 0x40, %l2
6799 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
6800 wr %r12, %g0, %asi
6801 st %g0, [%r23]
6802cwq_20_92:
6803 ta T_CHANGE_NONHPRIV
6804 .word 0xa1414000 ! 124: RDPC rd %pc, %r16
6805 rd %tick, %r28
6806#if (MAX_THREADS == 8)
6807 sethi %hi(0x33800), %r27
6808#else
6809 sethi %hi(0x30000), %r27
6810#endif
6811 andn %r28, %r27, %r28
6812 ta T_CHANGE_HPRIV
6813 stxa %r28, [%g0] 0x73
6814intvec_20_93:
6815 .word 0x39400001 ! 125: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
6816 .word 0x8d802000 ! 126: WRFPRS_I wr %r0, 0x0000, %fprs
6817 .word 0xc3e8c026 ! 127: PREFETCHA_R prefetcha [%r3, %r6] 0x01, #one_read
6818 .word 0x99702c9e ! 128: POPC_I popc 0x0c9e, %r12
6819 .word 0x9f80321a ! 129: SIR sir 0x121a
6820 .word 0xe88008a0 ! 130: LDUWA_R lduwa [%r0, %r0] 0x45, %r20
6821intveclr_20_97:
6822 nop
6823 ta T_CHANGE_HPRIV
6824 setx 0xcde8ed01559011c6, %r1, %r28
6825 stxa %r28, [%g0] 0x72
6826 .word 0x25400001 ! 131: FBPLG fblg,a,pn %fcc0, <label_0x1>
6827splash_hpstate_20_98:
6828 .word 0x81983e5f ! 132: WRHPR_HPSTATE_I wrhpr %r0, 0x1e5f, %hpstate
6829trapasi_20_99:
6830 nop
6831 mov 0x0, %r1 ! (VA for ASI 0x72)
6832 .word 0xe8904e40 ! 133: LDUHA_R lduha [%r1, %r0] 0x72, %r20
6833#if (defined SPC || defined CMP)
6834!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_100)+24, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1)
6835!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_100)&0xffffffff) + 0, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1)
6836xir_20_100:
6837#else
6838#if (defined FC)
6839!! Generate XIR via RESET_GEN register
6840 ta T_CHANGE_HPRIV
6841 rdpr %pstate, %r18
6842 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
6843 wrpr %r18, %pstate
6844#ifndef XIR_RND_CORES
6845 ldxa [%g0] 0x63, %o1
6846 mov 1, %r18
6847 sllx %r18, %o1, %r18
6848#endif
6849 mov 0x30, %r19
6850 setx 0x8900000808, %r16, %r17
6851 mov 0x2, %r16
6852xir_20_100:
6853 stxa %r18, [%r19] 0x41
6854 stx %r16, [%r17]
6855#endif
6856#endif
6857 .word 0xa984eeb6 ! 134: WR_SET_SOFTINT_I wr %r19, 0x0eb6, %set_softint
6858intveclr_20_101:
6859 nop
6860 ta T_CHANGE_HPRIV
6861 setx 0x36c66d0e49c23e67, %r1, %r28
6862 stxa %r28, [%g0] 0x72
6863 ta T_CHANGE_NONHPRIV
6864 .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, <label_0x1>
6865intveclr_20_102:
6866 nop
6867 ta T_CHANGE_HPRIV
6868 setx 0x608b555f8b1eacd8, %r1, %r28
6869 stxa %r28, [%g0] 0x72
6870 .word 0x25400001 ! 136: FBPLG fblg,a,pn %fcc0, <label_0x1>
6871 nop
6872 ta T_CHANGE_HPRIV ! macro
6873donret_20_103:
6874 rd %pc, %r12
6875 mov HIGHVA_HIGHNUM, %r10
6876 sllx %r10, 32, %r10
6877 or %r12, %r10, %r12
6878 add %r12, (donretarg_20_103-donret_20_103), %r12
6879 add %r12, 0x8, %r11 ! nonseq tnpc
6880 wrpr %g0, 0x2, %tl
6881 wrpr %g0, %r12, %tpc
6882 wrpr %g0, %r11, %tnpc
6883 set (0x0097ce00 | (16 << 24)), %r13
6884 and %r12, 0xfff, %r14
6885 sllx %r14, 30, %r14
6886 or %r13, %r14, %r20
6887 wrpr %r20, %g0, %tstate
6888 wrhpr %g0, 0x1dd6, %htstate
6889 ta T_CHANGE_NONPRIV ! rand=0 (20)
6890 ldx [%r11+%r0], %g1
6891 done
6892donretarg_20_103:
6893 .word 0xe86fe048 ! 137: LDSTUB_I ldstub %r20, [%r31 + 0x0048]
6894ibp_20_104:
6895 nop
6896 .word 0xc19fd920 ! 138: LDDFA_R ldda [%r31, %r0], %f0
6897 nop
6898 ta T_CHANGE_HPRIV
6899 mov 0x20, %r10
6900 set sync_thr_counter6, %r23
6901#ifndef SPC
6902 ldxa [%g0]0x63, %o1
6903 and %o1, 0x38, %o1
6904 add %o1, %r23, %r23
6905#endif
6906 cas [%r23],%g0,%r10 !lock
6907 brnz %r10, sma_20_105
6908 rd %asi, %r12
6909 wr %g0, 0x40, %asi
6910 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
6911 set 0x00061fff, %g1
6912 stxa %g1, [%g0 + 0x80] %asi
6913 wr %r12, %g0, %asi
6914 st %g0, [%r23]
6915sma_20_105:
6916 ta T_CHANGE_NONHPRIV
6917 .word 0xe9e7e00c ! 139: CASA_R casa [%r31] %asi, %r12, %r20
6918splash_cmpr_20_106:
6919 mov 0, %r18
6920 sllx %r18, 63, %r18
6921 rd %tick, %r17
6922 add %r17, 0x70, %r17
6923 or %r17, %r18, %r17
6924 ta T_CHANGE_HPRIV
6925 wrhpr %r17, %g0, %hsys_tick_cmpr
6926 .word 0xaf800011 ! 140: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
6927 .word 0xe93fc00d ! 141: STDF_R std %f20, [%r13, %r31]
6928 .word 0x91d020b4 ! 142: Tcc_I ta icc_or_xcc, %r0 + 180
6929splash_hpstate_20_108:
6930 ta T_CHANGE_NONHPRIV
6931 .word 0x81983f87 ! 143: WRHPR_HPSTATE_I wrhpr %r0, 0x1f87, %hpstate
6932dvapa_20_109:
6933 nop
6934 ta T_CHANGE_HPRIV
6935 mov 0xacd, %r20
6936 mov 0x4, %r19
6937 sllx %r20, 23, %r20
6938 or %r19, %r20, %r19
6939 stxa %r19, [%g0] ASI_LSU_CONTROL
6940 mov 0x38, %r18
6941 stxa %r31, [%r18]0x58
6942 ta T_CHANGE_NONHPRIV
6943 .word 0x95703287 ! 144: POPC_I popc 0x1287, %r10
6944 .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1>
6945 .word 0x8d902f35 ! 145: WRPR_PSTATE_I wrpr %r0, 0x0f35, %pstate
6946memptr_20_111:
6947 set user_data_start, %r31
6948 .word 0x8582a52e ! 146: WRCCR_I wr %r10, 0x052e, %ccr
6949ceter_20_112:
6950 nop
6951 ta T_CHANGE_HPRIV
6952 mov 7, %r17
6953 sllx %r17, 60, %r17
6954 mov 0x18, %r16
6955 stxa %r17, [%r16]0x4c
6956 ta T_CHANGE_NONHPRIV
6957 .word 0x9b410000 ! 147: RDTICK rd %tick, %r13
6958 nop
6959 ta T_CHANGE_HPRIV ! macro
6960donret_20_113:
6961 rd %pc, %r12
6962 mov HIGHVA_HIGHNUM, %r10
6963 sllx %r10, 32, %r10
6964 or %r12, %r10, %r12
6965 add %r12, (donretarg_20_113-donret_20_113+4), %r12
6966 add %r12, 0x4, %r11 ! seq tnpc
6967 andn %r11, %r10, %r11 ! low VA tnpc
6968 wrpr %g0, 0x1, %tl
6969 wrpr %g0, %r12, %tpc
6970 wrpr %g0, %r11, %tnpc
6971 set (0xe000 | (0x80 << 24)), %r13
6972 and %r12, 0xfff, %r14
6973 sllx %r14, 30, %r14
6974 or %r13, %r14, %r20
6975 wrpr %r20, %g0, %tstate
6976 wrhpr %g0, 0x13d5, %htstate
6977 ta T_CHANGE_NONHPRIV ! rand=1 (20)
6978 ldx [%r11+%r0], %g1
6979 done
6980donretarg_20_113:
6981 .word 0xe6ffe018 ! 148: SWAPA_I swapa %r19, [%r31 + 0x0018] %asi
6982splash_tba_20_114:
6983 nop
6984 ta T_CHANGE_PRIV
6985 setx 0x00000004003a0000, %r11, %r12
6986 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba
6987splash_htba_20_115:
6988 nop
6989 ta T_CHANGE_HPRIV
6990 setx 0x00000002002a0000, %r11, %r12
6991 .word 0x8b98000c ! 150: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
6992fpinit_20_116:
6993 nop
6994 setx fp_data_quads, %r19, %r20
6995 ldd [%r20], %f0
6996 ldd [%r20+8], %f4
6997 ld [%r20+16], %fsr
6998 ld [%r20+24], %r19
6999 wr %r19, %g0, %gsr
7000 .word 0x87a80a44 ! 151: FCMPd fcmpd %fcc<n>, %f0, %f4
7001tagged_20_117:
7002 taddcctv %r11, 0x1090, %r17
7003 .word 0xe607e114 ! 152: LDUW_I lduw [%r31 + 0x0114], %r19
7004#if (defined SPC || defined CMP)
7005!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_118)+8, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1)
7006!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_118)&0xffffffff) + 16, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1)
7007xir_20_118:
7008#else
7009#if (defined FC)
7010!! Generate XIR via RESET_GEN register
7011 ta T_CHANGE_HPRIV
7012 rdpr %pstate, %r18
7013 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
7014 wrpr %r18, %pstate
7015#ifndef XIR_RND_CORES
7016 ldxa [%g0] 0x63, %o1
7017 mov 1, %r18
7018 sllx %r18, %o1, %r18
7019#endif
7020 mov 0x30, %r19
7021 setx 0x8900000808, %r16, %r17
7022 mov 0x2, %r16
7023xir_20_118:
7024 stxa %r18, [%r19] 0x41
7025 stx %r16, [%r17]
7026#endif
7027#endif
7028 .word 0xa984a7a4 ! 153: WR_SET_SOFTINT_I wr %r18, 0x07a4, %set_softint
7029 .word 0x89800011 ! 154: WRTICK_R wr %r0, %r17, %tick
7030mondo_20_120:
7031 nop
7032 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
7033 stxa %r17, [%r0+0x3d8] %asi
7034 .word 0x9d94c004 ! 155: WRPR_WSTATE_R wrpr %r19, %r4, %wstate
7035 .word 0xe737c000 ! 156: STQF_R - %f19, [%r0, %r31]
7036 .word 0x87802039 ! 157: WRASI_I wr %r0, 0x0039, %asi
7037 .word 0xa669667f ! 158: UDIVX_I udivx %r5, 0x067f, %r19
7038splash_cmpr_20_121:
7039 mov 0, %r18
7040 sllx %r18, 63, %r18
7041 rd %tick, %r17
7042 add %r17, 0x50, %r17
7043 or %r17, %r18, %r17
7044 .word 0xaf800011 ! 159: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
7045 nop
7046 ta T_CHANGE_HPRIV ! macro
7047donret_20_122:
7048 rd %pc, %r12
7049 mov HIGHVA_HIGHNUM, %r10
7050 sllx %r10, 32, %r10
7051 or %r12, %r10, %r12
7052 add %r12, (donretarg_20_122-donret_20_122), %r12
7053 add %r12, 0x4, %r11 ! seq tnpc
7054 andn %r11, %r10, %r11 ! low VA tnpc
7055 wrpr %g0, 0x1, %tl
7056 wrpr %g0, %r12, %tpc
7057 wrpr %g0, %r11, %tnpc
7058 set (0x00816b00 | (0x83 << 24)), %r13
7059 and %r12, 0xfff, %r14
7060 sllx %r14, 30, %r14
7061 or %r13, %r14, %r20
7062 wrpr %r20, %g0, %tstate
7063 wrhpr %g0, 0x1b1f, %htstate
7064 ta T_CHANGE_NONPRIV ! rand=0 (20)
7065 ldx [%r12+%r0], %g1
7066 retry
7067donretarg_20_122:
7068 .word 0x99a449d4 ! 160: FDIVd fdivd %f48, %f20, %f12
7069pmu_20_123:
7070 nop
7071 setx 0xffffffb5ffffffae, %g1, %g7
7072 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
7073splash_tba_20_124:
7074 nop
7075 ta T_CHANGE_PRIV
7076 set 0x120000, %r12
7077 .word 0x8b90000c ! 162: WRPR_TBA_R wrpr %r0, %r12, %tba
7078mondo_20_125:
7079 nop
7080 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
7081 ta T_CHANGE_PRIV
7082 stxa %r19, [%r0+0x3c0] %asi
7083 .word 0x9d91800a ! 163: WRPR_WSTATE_R wrpr %r6, %r10, %wstate
7084 .word 0xa1902002 ! 164: WRPR_GL_I wrpr %r0, 0x0002, %-
7085trapasi_20_126:
7086 nop
7087 mov 0x0, %r1 ! (VA for ASI 0x5b)
7088 .word 0xdad84b60 ! 165: LDXA_R ldxa [%r1, %r0] 0x5b, %r13
7089 .word 0x8d802000 ! 166: WRFPRS_I wr %r0, 0x0000, %fprs
7090splash_tba_20_127:
7091 nop
7092 ta T_CHANGE_PRIV
7093 setx 0x00000004003a0000, %r11, %r12
7094 .word 0x8b90000c ! 167: WRPR_TBA_R wrpr %r0, %r12, %tba
7095 invalw
7096 mov 0x33, %r30
7097 .word 0x91d0001e ! 168: Tcc_R ta icc_or_xcc, %r0 + %r30
7098 nop
7099 ta T_CHANGE_HPRIV
7100 mov 0x20, %r10
7101 set sync_thr_counter6, %r23
7102#ifndef SPC
7103 ldxa [%g0]0x63, %o1
7104 and %o1, 0x38, %o1
7105 add %o1, %r23, %r23
7106#endif
7107 cas [%r23],%g0,%r10 !lock
7108 brnz %r10, sma_20_128
7109 rd %asi, %r12
7110 wr %g0, 0x40, %asi
7111 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
7112 set 0x001e1fff, %g1
7113 stxa %g1, [%g0 + 0x80] %asi
7114 wr %r12, %g0, %asi
7115 st %g0, [%r23]
7116sma_20_128:
7117 ta T_CHANGE_NONHPRIV
7118 .word 0xdbe7e011 ! 169: CASA_R casa [%r31] %asi, %r17, %r13
7119 .word 0xc32fc00c ! 1: STXFSR_R st-sfr %f1, [%r12, %r31]
7120 .word 0x9f80307b ! 170: SIR sir 0x107b
7121 .word 0x8d903432 ! 171: WRPR_PSTATE_I wrpr %r0, 0x1432, %pstate
7122ibp_20_130:
7123 nop
7124 ta T_CHANGE_NONHPRIV
7125 .word 0xc1bfe060 ! 172: STDFA_I stda %f0, [0x0060, %r31]
7126 .word 0xa46c60d1 ! 173: UDIVX_I udivx %r17, 0x00d1, %r18
7127 .word 0xa9688004 ! 174: SDIVX_R sdivx %r2, %r4, %r20
7128dvapa_20_131:
7129 nop
7130 ta T_CHANGE_HPRIV
7131 mov 0xce1, %r20
7132 mov 0x10, %r19
7133 sllx %r20, 23, %r20
7134 or %r19, %r20, %r19
7135 stxa %r19, [%g0] ASI_LSU_CONTROL
7136 mov 0x38, %r18
7137 stxa %r31, [%r18]0x58
7138 ta T_CHANGE_NONHPRIV
7139 .word 0xe0bfc032 ! 175: STDA_R stda %r16, [%r31 + %r18] 0x01
7140 .word 0xa7817a24 ! 176: WR_GRAPHICS_STATUS_REG_I wr %r5, 0x1a24, %-
7141 nop
7142 ta T_CHANGE_HPRIV
7143 mov 0x20+1, %r10
7144 set sync_thr_counter5, %r23
7145#ifndef SPC
7146 ldxa [%g0]0x63, %o1
7147 and %o1, 0x38, %o1
7148 add %o1, %r23, %r23
7149 sllx %o1, 5, %o3 !(CID*256)
7150#endif
7151 cas [%r23],%g0,%r10 !lock
7152 brnz %r10, cwq_20_132
7153 rd %asi, %r12
7154 wr %g0, 0x40, %asi
7155 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
7156 and %l1, 0x3, %l1 ! Check if busy/enabled ..
7157 cmp %l1, 1
7158 bne cwq_20_132
7159 set CWQ_BASE, %l6
7160#ifndef SPC
7161 add %l6, %o3, %l6
7162#endif
7163 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
7164 best_set_reg(0x20610060, %l1, %l2) !# Control Word
7165 sllx %l2, 32, %l2
7166 stx %l2, [%l6 + 0x0]
7167 membar #Sync
7168 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
7169 sub %l2, 0x40, %l2
7170 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
7171 wr %r12, %g0, %asi
7172 st %g0, [%r23]
7173cwq_20_132:
7174 ta T_CHANGE_NONHPRIV
7175 .word 0xa5414000 ! 177: RDPC rd %pc, %r18
7176fpinit_20_133:
7177 nop
7178 setx fp_data_quads, %r19, %r20
7179 ldd [%r20], %f0
7180 ldd [%r20+8], %f4
7181 ld [%r20+16], %fsr
7182 ld [%r20+24], %r19
7183 wr %r19, %g0, %gsr
7184 .word 0x89b00484 ! 178: FCMPLE32 fcmple32 %d0, %d4, %r4
7185splash_lsu_20_134:
7186 nop
7187 ta T_CHANGE_HPRIV
7188 set 0x3b0cd0f2, %r2
7189 mov 0x6, %r1
7190 sllx %r1, 32, %r1
7191 or %r1, %r2, %r2
7192 stxa %r2, [%r0] ASI_LSU_CONTROL
7193 ta T_CHANGE_NONHPRIV
7194 .word 0x3d400001 ! 179: FBPULE fbule,a,pn %fcc0, <label_0x1>
7195 .word 0x87802083 ! 180: WRASI_I wr %r0, 0x0083, %asi
7196#if (defined SPC || defined CMP)
7197!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_135)+32, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1)
7198!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_135)&0xffffffff) + 24, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1)
7199xir_20_135:
7200#else
7201#if (defined FC)
7202!! Generate XIR via RESET_GEN register
7203 ta T_CHANGE_HPRIV
7204 rdpr %pstate, %r18
7205 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
7206 wrpr %r18, %pstate
7207#ifndef XIR_RND_CORES
7208 ldxa [%g0] 0x63, %o1
7209 mov 1, %r18
7210 sllx %r18, %o1, %r18
7211#endif
7212 mov 0x30, %r19
7213 setx 0x8900000808, %r16, %r17
7214 mov 0x2, %r16
7215xir_20_135:
7216 stxa %r18, [%r19] 0x41
7217 stx %r16, [%r17]
7218#endif
7219#endif
7220 .word 0xa98427de ! 181: WR_SET_SOFTINT_I wr %r16, 0x07de, %set_softint
7221trapasi_20_136:
7222 nop
7223 mov 0x110, %r1 ! (VA for ASI 0x4a)
7224 .word 0xda884940 ! 182: LDUBA_R lduba [%r1, %r0] 0x4a, %r13
7225intveclr_20_137:
7226 nop
7227 ta T_CHANGE_HPRIV
7228 setx 0x8a9074173e2a7d3d, %r1, %r28
7229 stxa %r28, [%g0] 0x72
7230 ta T_CHANGE_NONHPRIV
7231 .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1>
7232tagged_20_138:
7233 tsubcctv %r2, 0x1441, %r16
7234 .word 0xda07e187 ! 184: LDUW_I lduw [%r31 + 0x0187], %r13
7235splash_hpstate_20_139:
7236 ta T_CHANGE_NONHPRIV
7237 .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1>
7238 .word 0x81983e4d ! 185: WRHPR_HPSTATE_I wrhpr %r0, 0x1e4d, %hpstate
7239 .word 0xda77c000 ! 186: STX_R stx %r13, [%r31 + %r0]
7240brcommon3_20_140:
7241 nop
7242 setx common_target, %r12, %r27
7243 lduw [%r27], %r12 ! Load common dest into dcache ..
7244 ba,a .+12
7245 .word 0xdb37e110 ! 1: STQF_I - %f13, [0x0110, %r31]
7246 ba,a .+8
7247 jmpl %r27+0, %r27
7248 .word 0x81983dcd ! 187: WRHPR_HPSTATE_I wrhpr %r0, 0x1dcd, %hpstate
7249 otherw
7250 mov 0x32, %r30
7251 .word 0x83d0001e ! 188: Tcc_R te icc_or_xcc, %r0 + %r30
7252ibp_20_141:
7253 nop
7254 .word 0xc3ec402d ! 189: PREFETCHA_R prefetcha [%r17, %r13] 0x01, #one_read
7255tagged_20_142:
7256 tsubcctv %r17, 0x1019, %r3
7257 .word 0xd807e090 ! 190: LDUW_I lduw [%r31 + 0x0090], %r12
7258 .word 0x8780204f ! 191: WRASI_I wr %r0, 0x004f, %asi
7259intveclr_20_143:
7260 nop
7261 ta T_CHANGE_HPRIV
7262 setx 0xe2913bfd7f96d03d, %r1, %r28
7263 stxa %r28, [%g0] 0x72
7264 ta T_CHANGE_NONHPRIV
7265 .word 0x25400001 ! 192: FBPLG fblg,a,pn %fcc0, <label_0x1>
7266#if (defined SPC || defined CMP1)
7267!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_144) + 0, 16, 16)) -> intp(2,0,22,,,,,1)
7268!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_144)&0xffffffff) + 32, 16, 16)) -> intp(5,0,8,,,,,1)
7269#else
7270 set 0x711053d9, %r28
7271#if (MAX_THREADS == 8)
7272 and %r28, 0x7ff, %r28
7273#endif
7274 stxa %r28, [%g0] 0x73
7275#endif
7276intvec_20_144:
7277 .word 0x39400001 ! 193: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
7278 .word 0x87802080 ! 194: WRASI_I wr %r0, 0x0080, %asi
7279 .word 0x89800011 ! 195: WRTICK_R wr %r0, %r17, %tick
7280dvapa_20_146:
7281 nop
7282 ta T_CHANGE_HPRIV
7283 mov 0xf47, %r20
7284 mov 0x1d, %r19
7285 sllx %r20, 23, %r20
7286 or %r19, %r20, %r19
7287 stxa %r19, [%g0] ASI_LSU_CONTROL
7288 mov 0x38, %r18
7289 stxa %r31, [%r18]0x58
7290 ta T_CHANGE_NONHPRIV
7291 .word 0xe19fe120 ! 196: LDDFA_I ldda [%r31, 0x0120], %f16
7292splash_tba_20_147:
7293 nop
7294 ta T_CHANGE_PRIV
7295 setx 0x00000004003a0000, %r11, %r12
7296 .word 0x8b90000c ! 197: WRPR_TBA_R wrpr %r0, %r12, %tba
7297 .word 0x98c2a90d ! 198: ADDCcc_I addccc %r10, 0x090d, %r12
7298pmu_20_148:
7299 nop
7300 setx 0xffffffbfffffffa6, %g1, %g7
7301 .word 0xa3800007 ! 199: WR_PERF_COUNTER_R wr %r0, %r7, %-
7302ibp_20_149:
7303 nop
7304 ta T_CHANGE_NONHPRIV
7305 .word 0xe19fe020 ! 200: LDDFA_I ldda [%r31, 0x0020], %f16
7306 nop
7307 nop
7308 ta T_CHANGE_PRIV
7309 wrpr %g0, %g0, %gl
7310 nop
7311 nop
7312.text
7313 setx join_lbl_0_0, %g1, %g2
7314 jmp %g2
7315 nop
7316fork_lbl_0_5:
7317 ta T_CHANGE_NONHPRIV
7318ibp_10_1:
7319 nop
7320 .word 0xc19fdf20 ! 1: LDDFA_R ldda [%r31, %r0], %f0
7321splash_cmpr_10_2:
7322 mov 0, %r18
7323 sllx %r18, 63, %r18
7324 rd %tick, %r17
7325 add %r17, 0x70, %r17
7326 or %r17, %r18, %r17
7327 .word 0xb3800011 ! 2: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
7328mondo_10_3:
7329 nop
7330 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
7331 ta T_CHANGE_PRIV
7332 stxa %r17, [%r0+0x3c0] %asi
7333 .word 0x9d92c012 ! 3: WRPR_WSTATE_R wrpr %r11, %r18, %wstate
7334 .word 0xe19fe160 ! 4: LDDFA_I ldda [%r31, 0x0160], %f16
7335 nop
7336 ta T_CHANGE_HPRIV
7337 mov 0x10+1, %r10
7338 set sync_thr_counter5, %r23
7339#ifndef SPC
7340 ldxa [%g0]0x63, %o1
7341 and %o1, 0x38, %o1
7342 add %o1, %r23, %r23
7343 sllx %o1, 5, %o3 !(CID*256)
7344#endif
7345 cas [%r23],%g0,%r10 !lock
7346 brnz %r10, cwq_10_4
7347 rd %asi, %r12
7348 wr %g0, 0x40, %asi
7349 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
7350 and %l1, 0x3, %l1 ! Check if busy/enabled ..
7351 cmp %l1, 1
7352 bne cwq_10_4
7353 set CWQ_BASE, %l6
7354#ifndef SPC
7355 add %l6, %o3, %l6
7356#endif
7357 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
7358 best_set_reg(0x206100a0, %l1, %l2) !# Control Word
7359 sllx %l2, 32, %l2
7360 stx %l2, [%l6 + 0x0]
7361 membar #Sync
7362 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
7363 sub %l2, 0x40, %l2
7364 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
7365 wr %r12, %g0, %asi
7366 st %g0, [%r23]
7367cwq_10_4:
7368 ta T_CHANGE_NONHPRIV
7369 .word 0x91414000 ! 5: RDPC rd %pc, %r8
7370 nop
7371 ta T_CHANGE_HPRIV ! macro
7372donret_10_5:
7373 rd %pc, %r12
7374 mov HIGHVA_HIGHNUM, %r10
7375 sllx %r10, 32, %r10
7376 or %r12, %r10, %r12
7377 add %r12, (donretarg_10_5-donret_10_5), %r12
7378 add %r12, 0x8, %r11 ! nonseq tnpc
7379 wrpr %g0, 0x1, %tl
7380 wrpr %g0, %r12, %tpc
7381 wrpr %g0, %r11, %tnpc
7382 set (0x008cb400 | (0x82 << 24)), %r13
7383 and %r12, 0xfff, %r14
7384 sllx %r14, 30, %r14
7385 or %r13, %r14, %r20
7386 wrpr %r20, %g0, %tstate
7387 wrhpr %g0, 0x6df, %htstate
7388 ta T_CHANGE_NONPRIV ! rand=0 (10)
7389 ldx [%r11+%r0], %g1
7390 done
7391donretarg_10_5:
7392 .word 0x8198241f ! 6: WRHPR_HPSTATE_I wrhpr %r0, 0x041f, %hpstate
7393 .word 0xe937e082 ! 7: STQF_I - %f20, [0x0082, %r31]
7394jmptr_10_6:
7395 nop
7396 best_set_reg(0xe0200000, %r20, %r27)
7397 .word 0xb7c6c000 ! 8: JMPL_R jmpl %r27 + %r0, %r27
7398 rd %tick, %r28
7399#if (MAX_THREADS == 8)
7400 sethi %hi(0x33800), %r27
7401#else
7402 sethi %hi(0x30000), %r27
7403#endif
7404 andn %r28, %r27, %r28
7405 ta T_CHANGE_HPRIV
7406 stxa %r28, [%g0] 0x73
7407intvec_10_7:
7408 .word 0x39400001 ! 9: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
7409 .word 0xa9b7c492 ! 1: FCMPLE32 fcmple32 %d62, %d18, %r20
7410 .word 0x9f8033af ! 10: SIR sir 0x13af
7411 .word 0x8d802004 ! 11: WRFPRS_I wr %r0, 0x0004, %fprs
7412trapasi_10_8:
7413 nop
7414 mov 0x10, %r1 ! (VA for ASI 0x48)
7415 .word 0xe8884900 ! 12: LDUBA_R lduba [%r1, %r0] 0x48, %r20
7416 .word 0xe81fe068 ! 13: LDD_I ldd [%r31 + 0x0068], %r20
7417 .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1>
7418 .word 0x8d903943 ! 14: WRPR_PSTATE_I wrpr %r0, 0x1943, %pstate
7419 nop
7420 ta T_CHANGE_HPRIV
7421 mov 0x10+1, %r10
7422 set sync_thr_counter5, %r23
7423#ifndef SPC
7424 ldxa [%g0]0x63, %o1
7425 and %o1, 0x38, %o1
7426 add %o1, %r23, %r23
7427 sllx %o1, 5, %o3 !(CID*256)
7428#endif
7429 cas [%r23],%g0,%r10 !lock
7430 brnz %r10, cwq_10_10
7431 rd %asi, %r12
7432 wr %g0, 0x40, %asi
7433 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
7434 and %l1, 0x3, %l1 ! Check if busy/enabled ..
7435 cmp %l1, 1
7436 bne cwq_10_10
7437 set CWQ_BASE, %l6
7438#ifndef SPC
7439 add %l6, %o3, %l6
7440#endif
7441 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
7442 best_set_reg(0x206100d0, %l1, %l2) !# Control Word
7443 sllx %l2, 32, %l2
7444 stx %l2, [%l6 + 0x0]
7445 membar #Sync
7446 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
7447 sub %l2, 0x40, %l2
7448 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
7449 wr %r12, %g0, %asi
7450 st %g0, [%r23]
7451cwq_10_10:
7452 ta T_CHANGE_NONHPRIV
7453 .word 0x97414000 ! 15: RDPC rd %pc, %r11
7454brcommon2_10_11:
7455 nop
7456 setx common_target, %r12, %r27
7457 ba,a .+12
7458 .word 0x81dfc00a ! 1: FLUSH_R flush %r31, %r10, %r0
7459 ba,a .+8
7460 jmpl %r27+0, %r27
7461 .word 0xe19fc3e0 ! 16: LDDFA_R ldda [%r31, %r0], %f16
7462jmptr_10_12:
7463 nop
7464 best_set_reg(0xe0200000, %r20, %r27)
7465 .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27
7466mondo_10_13:
7467 nop
7468 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
7469 ta T_CHANGE_PRIV
7470 stxa %r3, [%r0+0x3c0] %asi
7471 .word 0x9d948001 ! 18: WRPR_WSTATE_R wrpr %r18, %r1, %wstate
7472mondo_10_14:
7473 nop
7474 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
7475 stxa %r10, [%r0+0x3e0] %asi
7476 .word 0x9d94800b ! 19: WRPR_WSTATE_R wrpr %r18, %r11, %wstate
7477splash_cmpr_10_15:
7478 mov 0, %r18
7479 sllx %r18, 63, %r18
7480 rd %tick, %r17
7481 add %r17, 0x60, %r17
7482 or %r17, %r18, %r17
7483 ta T_CHANGE_HPRIV
7484 wrhpr %r17, %g0, %hsys_tick_cmpr
7485 .word 0xaf800011 ! 20: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
7486#if (defined SPC || defined CMP1)
7487!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_16) + 40, 16, 16)) -> intp(5,0,14,,,,,1)
7488!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_16)&0xffffffff) + 8, 16, 16)) -> intp(1,0,14,,,,,1)
7489#else
7490 set 0x34c0305a, %r28
7491#if (MAX_THREADS == 8)
7492 and %r28, 0x7ff, %r28
7493#endif
7494 stxa %r28, [%g0] 0x73
7495#endif
7496intvec_10_16:
7497 .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
7498 .word 0x81dd0008 ! 22: FLUSH_R flush %r20, %r8, %r0
7499 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
7500 .word 0x8d902d21 ! 23: WRPR_PSTATE_I wrpr %r0, 0x0d21, %pstate
7501 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl
7502reduce_priv_lvl_10_18:
7503 ta T_CHANGE_NONHPRIV ! macro
7504mondo_10_19:
7505 nop
7506 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
7507 stxa %r13, [%r0+0x3c0] %asi
7508 .word 0x9d92c008 ! 25: WRPR_WSTATE_R wrpr %r11, %r8, %wstate
7509 .word 0x81510000 ! 26: RDPR_TICK rdpr %tick, %r0
7510 .word 0x879cfcf8 ! 27: WRHPR_HINTP_I wrhpr %r19, 0x1cf8, %hintp
7511fpinit_10_20:
7512 nop
7513 setx fp_data_quads, %r19, %r20
7514 ldd [%r20], %f0
7515 ldd [%r20+8], %f4
7516 ld [%r20+16], %fsr
7517 ld [%r20+24], %r19
7518 wr %r19, %g0, %gsr
7519 .word 0xc3e83e22 ! 28: PREFETCHA_I prefetcha [%r0, + 0xfffffe22] %asi, #one_read
7520mondo_10_21:
7521 nop
7522 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
7523 stxa %r20, [%r0+0x3e8] %asi
7524 .word 0x9d930005 ! 29: WRPR_WSTATE_R wrpr %r12, %r5, %wstate
7525splash_hpstate_10_22:
7526 .word 0x81983964 ! 30: WRHPR_HPSTATE_I wrhpr %r0, 0x1964, %hpstate
7527splash_tba_10_23:
7528 nop
7529 ta T_CHANGE_PRIV
7530 setx 0x0000000000380000, %r11, %r12
7531 .word 0x8b90000c ! 31: WRPR_TBA_R wrpr %r0, %r12, %tba
7532trapasi_10_24:
7533 nop
7534 mov 0x8, %r1 ! (VA for ASI 0x4a)
7535 .word 0xe8904940 ! 32: LDUHA_R lduha [%r1, %r0] 0x4a, %r20
7536 rd %tick, %r28
7537#if (MAX_THREADS == 8)
7538 sethi %hi(0x33800), %r27
7539#else
7540 sethi %hi(0x30000), %r27
7541#endif
7542 andn %r28, %r27, %r28
7543 ta T_CHANGE_HPRIV
7544 stxa %r28, [%g0] 0x73
7545intvec_10_25:
7546 .word 0x39400001 ! 33: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
7547 nop
7548 ta T_CHANGE_HPRIV
7549 mov 0x10, %r10
7550 set sync_thr_counter6, %r23
7551#ifndef SPC
7552 ldxa [%g0]0x63, %o1
7553 and %o1, 0x38, %o1
7554 add %o1, %r23, %r23
7555#endif
7556 cas [%r23],%g0,%r10 !lock
7557 brnz %r10, sma_10_26
7558 rd %asi, %r12
7559 wr %g0, 0x40, %asi
7560 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
7561 set 0x001a1fff, %g1
7562 stxa %g1, [%g0 + 0x80] %asi
7563 wr %r12, %g0, %asi
7564 st %g0, [%r23]
7565sma_10_26:
7566 ta T_CHANGE_NONHPRIV
7567 .word 0xe9e7e011 ! 34: CASA_R casa [%r31] %asi, %r17, %r20
7568 .word 0xe89fe068 ! 35: LDDA_I ldda [%r31, + 0x0068] %asi, %r20
7569 nop
7570 ta T_CHANGE_HPRIV
7571 mov 0x10, %r10
7572 set sync_thr_counter6, %r23
7573#ifndef SPC
7574 ldxa [%g0]0x63, %o1
7575 and %o1, 0x38, %o1
7576 add %o1, %r23, %r23
7577#endif
7578 cas [%r23],%g0,%r10 !lock
7579 brnz %r10, sma_10_27
7580 rd %asi, %r12
7581 wr %g0, 0x40, %asi
7582 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
7583 set 0x00061fff, %g1
7584 stxa %g1, [%g0 + 0x80] %asi
7585 wr %r12, %g0, %asi
7586 st %g0, [%r23]
7587sma_10_27:
7588 ta T_CHANGE_NONHPRIV
7589 .word 0xe9e7e012 ! 36: CASA_R casa [%r31] %asi, %r18, %r20
7590 nop
7591 ta T_CHANGE_HPRIV ! macro
7592donret_10_28:
7593 rd %pc, %r12
7594 mov HIGHVA_HIGHNUM, %r10
7595 sllx %r10, 32, %r10
7596 or %r12, %r10, %r12
7597 add %r12, (donretarg_10_28-donret_10_28), %r12
7598 add %r12, 0x4, %r11 ! seq tnpc
7599 andn %r11, %r10, %r11 ! low VA tnpc
7600 wrpr %g0, 0x1, %tl
7601 wrpr %g0, %r12, %tpc
7602 wrpr %g0, %r11, %tnpc
7603 set (0x00ee8b00 | (22 << 24)), %r13
7604 and %r12, 0xfff, %r14
7605 sllx %r14, 30, %r14
7606 or %r13, %r14, %r20
7607 wrpr %r20, %g0, %tstate
7608 wrhpr %g0, 0x5c3, %htstate
7609 ta T_CHANGE_NONHPRIV ! rand=1 (10)
7610 retry
7611donretarg_10_28:
7612 .word 0x29400001 ! 37: FBPL fbl,a,pn %fcc0, <label_0x1>
7613brcommon2_10_29:
7614 nop
7615 setx common_target, %r12, %r27
7616 ba,a .+12
7617 .word 0xa9a7c972 ! 1: FMULq dis not found
7618
7619 ba,a .+8
7620 jmpl %r27+0, %r27
7621 .word 0xe19fe000 ! 38: LDDFA_I ldda [%r31, 0x0000], %f16
7622 .word 0x91944010 ! 39: WRPR_PIL_R wrpr %r17, %r16, %pil
7623 .word 0xd877e0e0 ! 40: STX_I stx %r12, [%r31 + 0x00e0]
7624 nop
7625 ta T_CHANGE_HPRIV
7626 mov 0x10+1, %r10
7627 set sync_thr_counter5, %r23
7628#ifndef SPC
7629 ldxa [%g0]0x63, %o1
7630 and %o1, 0x38, %o1
7631 add %o1, %r23, %r23
7632 sllx %o1, 5, %o3 !(CID*256)
7633#endif
7634 cas [%r23],%g0,%r10 !lock
7635 brnz %r10, cwq_10_31
7636 rd %asi, %r12
7637 wr %g0, 0x40, %asi
7638 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
7639 and %l1, 0x3, %l1 ! Check if busy/enabled ..
7640 cmp %l1, 1
7641 bne cwq_10_31
7642 set CWQ_BASE, %l6
7643#ifndef SPC
7644 add %l6, %o3, %l6
7645#endif
7646 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
7647 best_set_reg(0x206100e0, %l1, %l2) !# Control Word
7648 sllx %l2, 32, %l2
7649 stx %l2, [%l6 + 0x0]
7650 membar #Sync
7651 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
7652 sub %l2, 0x40, %l2
7653 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
7654 wr %r12, %g0, %asi
7655 st %g0, [%r23]
7656cwq_10_31:
7657 ta T_CHANGE_NONHPRIV
7658 .word 0x91414000 ! 41: RDPC rd %pc, %r8
7659 .word 0xe697c02d ! 42: LDUHA_R lduha [%r31, %r13] 0x01, %r19
7660 nop
7661 ta T_CHANGE_HPRIV
7662 mov 0x10, %r10
7663 set sync_thr_counter6, %r23
7664#ifndef SPC
7665 ldxa [%g0]0x63, %o1
7666 and %o1, 0x38, %o1
7667 add %o1, %r23, %r23
7668#endif
7669 cas [%r23],%g0,%r10 !lock
7670 brnz %r10, sma_10_33
7671 rd %asi, %r12
7672 wr %g0, 0x40, %asi
7673 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
7674 set 0x001e1fff, %g1
7675 stxa %g1, [%g0 + 0x80] %asi
7676 wr %r12, %g0, %asi
7677 st %g0, [%r23]
7678sma_10_33:
7679 ta T_CHANGE_NONHPRIV
7680 .word 0xe7e7e010 ! 43: CASA_R casa [%r31] %asi, %r16, %r19
7681 nop
7682 ta T_CHANGE_HPRIV ! macro
7683donret_10_34:
7684 rd %pc, %r12
7685 mov HIGHVA_HIGHNUM, %r10
7686 sllx %r10, 32, %r10
7687 or %r12, %r10, %r12
7688 add %r12, (donretarg_10_34-donret_10_34+4), %r12
7689 add %r12, 0x4, %r11 ! seq tnpc
7690 wrpr %g0, 0x2, %tl
7691 wrpr %g0, %r12, %tpc
7692 wrpr %g0, %r11, %tnpc
7693 set (0x0077cc00 | (54 << 24)), %r13
7694 and %r12, 0xfff, %r14
7695 sllx %r14, 30, %r14
7696 or %r13, %r14, %r20
7697 wrpr %r20, %g0, %tstate
7698 wrhpr %g0, 0x1c0b, %htstate
7699 ta T_CHANGE_NONPRIV ! rand=0 (10)
7700 retry
7701donretarg_10_34:
7702 .word 0xe66fe1e5 ! 44: LDSTUB_I ldstub %r19, [%r31 + 0x01e5]
7703 nop
7704 mov 0x80, %g3
7705 .word 0x22cb0001 ! 1: BRZ brz,a,pt %r12,<label_0xb0001>
7706 stxa %g3, [%g3] 0x5f
7707 .word 0xe65fc000 ! 45: LDX_R ldx [%r31 + %r0], %r19
7708#if (defined SPC || defined CMP)
7709!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_35)+40, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1)
7710!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_35)&0xffffffff) + 0, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1)
7711xir_10_35:
7712#else
7713#if (defined FC)
7714!! Generate XIR via RESET_GEN register
7715 ta T_CHANGE_HPRIV
7716 rdpr %pstate, %r18
7717 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
7718 wrpr %r18, %pstate
7719#ifndef XIR_RND_CORES
7720 ldxa [%g0] 0x63, %o1
7721 mov 1, %r18
7722 sllx %r18, %o1, %r18
7723#endif
7724 mov 0x30, %r19
7725 setx 0x8900000808, %r16, %r17
7726 mov 0x2, %r16
7727xir_10_35:
7728 stxa %r18, [%r19] 0x41
7729 stx %r16, [%r17]
7730#endif
7731#endif
7732 .word 0xa981335d ! 46: WR_SET_SOFTINT_I wr %r4, 0x135d, %set_softint
7733 .word 0xe697c032 ! 47: LDUHA_R lduha [%r31, %r18] 0x01, %r19
7734 nop
7735 ta T_CHANGE_HPRIV ! macro
7736donret_10_37:
7737 rd %pc, %r12
7738 mov HIGHVA_HIGHNUM, %r10
7739 sllx %r10, 32, %r10
7740 or %r12, %r10, %r12
7741 add %r12, (donretarg_10_37-donret_10_37+4), %r12
7742 add %r12, 0x4, %r11 ! seq tnpc
7743 andn %r12, %r10, %r12 ! low VA tpc
7744 wrpr %g0, 0x2, %tl
7745 wrpr %g0, %r12, %tpc
7746 wrpr %g0, %r11, %tnpc
7747 set (0x0031fe00 | (0x4f << 24)), %r13
7748 and %r12, 0xfff, %r14
7749 sllx %r14, 30, %r14
7750 or %r13, %r14, %r20
7751 wrpr %r20, %g0, %tstate
7752 wrhpr %g0, 0xdb, %htstate
7753 ta T_CHANGE_NONPRIV ! rand=0 (10)
7754 ldx [%r11+%r0], %g1
7755 done
7756.align 32
7757donretarg_10_37:
7758 .word 0x8d902b4f ! 48: WRPR_PSTATE_I wrpr %r0, 0x0b4f, %pstate
7759 .word 0x89800011 ! 49: WRTICK_R wr %r0, %r17, %tick
7760 .word 0xc19fda00 ! 50: LDDFA_R ldda [%r31, %r0], %f0
7761splash_lsu_10_40:
7762 nop
7763 ta T_CHANGE_HPRIV
7764 set 0x006efe01, %r2
7765 mov 0x5, %r1
7766 sllx %r1, 32, %r1
7767 or %r1, %r2, %r2
7768 stxa %r2, [%r0] ASI_LSU_CONTROL
7769 .word 0x3d400001 ! 51: FBPULE fbule,a,pn %fcc0, <label_0x1>
7770change_to_randtl_10_41:
7771 ta T_CHANGE_HPRIV ! macro
7772done_change_to_randtl_10_41:
7773 .word 0x8f902002 ! 52: WRPR_TL_I wrpr %r0, 0x0002, %tl
7774 .word 0xe1bfd920 ! 53: STDFA_R stda %f16, [%r0, %r31]
7775 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick
7776 nop
7777 ta T_CHANGE_HPRIV ! macro
7778donret_10_43:
7779 rd %pc, %r12
7780 mov HIGHVA_HIGHNUM, %r10
7781 sllx %r10, 32, %r10
7782 or %r12, %r10, %r12
7783 add %r12, (donretarg_10_43-donret_10_43+4), %r12
7784 add %r12, 0x4, %r11 ! seq tnpc
7785 wrpr %g0, 0x1, %tl
7786 wrpr %g0, %r12, %tpc
7787 wrpr %g0, %r11, %tnpc
7788 set (0x0014ca00 | (16 << 24)), %r13
7789 and %r12, 0xfff, %r14
7790 sllx %r14, 30, %r14
7791 or %r13, %r14, %r20
7792 wrpr %r20, %g0, %tstate
7793 wrhpr %g0, 0xa45, %htstate
7794 ta T_CHANGE_NONPRIV ! rand=0 (10)
7795 .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1>
7796 done
7797.align 32
7798donretarg_10_43:
7799 .word 0x819831d5 ! 55: WRHPR_HPSTATE_I wrhpr %r0, 0x11d5, %hpstate
7800 .word 0xe64fc000 ! 56: LDSB_R ldsb [%r31 + %r0], %r19
7801 .word 0xe71fe1b0 ! 57: LDDF_I ldd [%r31, 0x01b0], %f19
7802 .word 0x8780201c ! 58: WRASI_I wr %r0, 0x001c, %asi
7803 .word 0x89800011 ! 59: WRTICK_R wr %r0, %r17, %tick
7804 nop
7805 ta T_CHANGE_HPRIV
7806 mov 0x10+1, %r10
7807 set sync_thr_counter5, %r23
7808#ifndef SPC
7809 ldxa [%g0]0x63, %o1
7810 and %o1, 0x38, %o1
7811 add %o1, %r23, %r23
7812 sllx %o1, 5, %o3 !(CID*256)
7813#endif
7814 cas [%r23],%g0,%r10 !lock
7815 brnz %r10, cwq_10_45
7816 rd %asi, %r12
7817 wr %g0, 0x40, %asi
7818 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
7819 and %l1, 0x3, %l1 ! Check if busy/enabled ..
7820 cmp %l1, 1
7821 bne cwq_10_45
7822 set CWQ_BASE, %l6
7823#ifndef SPC
7824 add %l6, %o3, %l6
7825#endif
7826 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
7827 best_set_reg(0x20610010, %l1, %l2) !# Control Word
7828 sllx %l2, 32, %l2
7829 stx %l2, [%l6 + 0x0]
7830 membar #Sync
7831 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
7832 sub %l2, 0x40, %l2
7833 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
7834 wr %r12, %g0, %asi
7835 st %g0, [%r23]
7836cwq_10_45:
7837 ta T_CHANGE_NONHPRIV
7838 .word 0x97414000 ! 60: RDPC rd %pc, %r11
7839mondo_10_46:
7840 nop
7841 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
7842 ta T_CHANGE_PRIV
7843 stxa %r6, [%r0+0x3c0] %asi
7844 .word 0x9d92c011 ! 61: WRPR_WSTATE_R wrpr %r11, %r17, %wstate
7845 .word 0x91d020b5 ! 62: Tcc_I ta icc_or_xcc, %r0 + 181
7846splash_lsu_10_47:
7847 nop
7848 ta T_CHANGE_HPRIV
7849 set 0x24358e43, %r2
7850 mov 0x6, %r1
7851 sllx %r1, 32, %r1
7852 or %r1, %r2, %r2
7853 stxa %r2, [%r0] ASI_LSU_CONTROL
7854 .word 0x3d400001 ! 63: FBPULE fbule,a,pn %fcc0, <label_0x1>
7855ibp_10_48:
7856 nop
7857 .word 0xc1bfda00 ! 64: STDFA_R stda %f0, [%r0, %r31]
7858splash_hpstate_10_49:
7859 .word 0x8198229d ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x029d, %hpstate
7860 .word 0x8d903d8b ! 66: WRPR_PSTATE_I wrpr %r0, 0x1d8b, %pstate
7861 rd %tick, %r28
7862#if (MAX_THREADS == 8)
7863 sethi %hi(0x33800), %r27
7864#else
7865 sethi %hi(0x30000), %r27
7866#endif
7867 andn %r28, %r27, %r28
7868 ta T_CHANGE_HPRIV
7869 stxa %r28, [%g0] 0x73
7870intvec_10_51:
7871 .word 0x39400001 ! 67: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
7872 .word 0x91b14488 ! 68: FCMPLE32 fcmple32 %d36, %d8, %r8
7873 nop
7874 ta T_CHANGE_HPRIV ! macro
7875donret_10_53:
7876 rd %pc, %r12
7877 mov HIGHVA_HIGHNUM, %r10
7878 sllx %r10, 32, %r10
7879 or %r12, %r10, %r12
7880 add %r12, (donretarg_10_53-donret_10_53+4), %r12
7881 add %r12, 0x4, %r11 ! seq tnpc
7882 wrpr %g0, 0x1, %tl
7883 wrpr %g0, %r12, %tpc
7884 wrpr %g0, %r11, %tnpc
7885 set (0x004b4700 | (4 << 24)), %r13
7886 and %r12, 0xfff, %r14
7887 sllx %r14, 30, %r14
7888 or %r13, %r14, %r20
7889 wrpr %r20, %g0, %tstate
7890 wrhpr %g0, 0xa07, %htstate
7891 ta T_CHANGE_NONPRIV ! rand=0 (10)
7892 ldx [%r11+%r0], %g1
7893 done
7894donretarg_10_53:
7895 .word 0x35400001 ! 69: FBPUE fbue,a,pn %fcc0, <label_0x1>
7896 set 0x3ce6, %l3
7897 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
7898 .word 0x97b1c7c5 ! 70: PDIST pdistn %d38, %d36, %d42
7899 .word 0xa9a00174 ! 71: FABSq dis not found
7900
7901ibp_10_55:
7902 nop
7903 ta T_CHANGE_NONHPRIV
7904 .word 0xc1bfd920 ! 72: STDFA_R stda %f0, [%r0, %r31]
7905 nop
7906 ta T_CHANGE_HPRIV ! macro
7907donret_10_56:
7908 rd %pc, %r12
7909 mov HIGHVA_HIGHNUM, %r10
7910 sllx %r10, 32, %r10
7911 or %r12, %r10, %r12
7912 add %r12, (donretarg_10_56-donret_10_56), %r12
7913 add %r12, 0x8, %r11 ! nonseq tnpc
7914 wrpr %g0, 0x1, %tl
7915 wrpr %g0, %r12, %tpc
7916 wrpr %g0, %r11, %tnpc
7917 set (0x001b4b00 | (0x89 << 24)), %r13
7918 and %r12, 0xfff, %r14
7919 sllx %r14, 30, %r14
7920 or %r13, %r14, %r20
7921 wrpr %r20, %g0, %tstate
7922 wrhpr %g0, 0x504, %htstate
7923 ta T_CHANGE_NONHPRIV ! rand=1 (10)
7924 retry
7925.align 32
7926donretarg_10_56:
7927 .word 0xe4ffe186 ! 73: SWAPA_I swapa %r18, [%r31 + 0x0186] %asi
7928brcommon3_10_57:
7929 nop
7930 setx common_target, %r12, %r27
7931 lduw [%r27], %r12 ! Load common dest into dcache ..
7932 ba,a .+12
7933 .word 0xe537c010 ! 1: STQF_R - %f18, [%r16, %r31]
7934 ba,a .+8
7935 jmpl %r27+0, %r27
7936 .word 0xe53fc008 ! 74: STDF_R std %f18, [%r8, %r31]
7937 .word 0x9191000b ! 75: WRPR_PIL_R wrpr %r4, %r11, %pil
7938splash_cmpr_10_59:
7939 mov 0, %r18
7940 sllx %r18, 63, %r18
7941 rd %tick, %r17
7942 add %r17, 0x50, %r17
7943 or %r17, %r18, %r17
7944 ta T_CHANGE_PRIV
7945 .word 0xaf800011 ! 76: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
7946splash_cmpr_10_60:
7947 mov 1, %r18
7948 sllx %r18, 63, %r18
7949 rd %tick, %r17
7950 add %r17, 0x80, %r17
7951 or %r17, %r18, %r17
7952 ta T_CHANGE_HPRIV
7953 wrhpr %r17, %g0, %hsys_tick_cmpr
7954 .word 0xaf800011 ! 77: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
7955 .word 0x87802089 ! 78: WRASI_I wr %r0, 0x0089, %asi
7956brcommon3_10_61:
7957 nop
7958 setx common_target, %r12, %r27
7959 lduw [%r27], %r12 ! Load common dest into dcache ..
7960 ba,a .+12
7961 .word 0xe537c013 ! 1: STQF_R - %f18, [%r19, %r31]
7962 ba,a .+8
7963 jmpl %r27+0, %r27
7964 .word 0xe4dfc033 ! 79: LDXA_R ldxa [%r31, %r19] 0x01, %r18
7965mondo_10_62:
7966 nop
7967 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
7968 ta T_CHANGE_PRIV
7969 stxa %r17, [%r0+0x3d8] %asi
7970 .word 0x9d950003 ! 80: WRPR_WSTATE_R wrpr %r20, %r3, %wstate
7971 nop
7972 mov 0x80, %g3
7973 stxa %g3, [%g3] 0x5f
7974 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31
7975 .word 0xe45fc000 ! 81: LDX_R ldx [%r31 + %r0], %r18
7976 set 0x17c5, %l3
7977 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
7978 .word 0xa9b4c7cb ! 82: PDIST pdistn %d50, %d42, %d20
7979 .word 0xd3e7c020 ! 83: CASA_I casa [%r31] 0x 1, %r0, %r9
7980 .word 0xa7a00174 ! 84: FABSq dis not found
7981
7982 nop
7983 ta T_CHANGE_HPRIV
7984 mov 0x10+1, %r10
7985 set sync_thr_counter5, %r23
7986#ifndef SPC
7987 ldxa [%g0]0x63, %o1
7988 and %o1, 0x38, %o1
7989 add %o1, %r23, %r23
7990 sllx %o1, 5, %o3 !(CID*256)
7991#endif
7992 cas [%r23],%g0,%r10 !lock
7993 brnz %r10, cwq_10_65
7994 rd %asi, %r12
7995 wr %g0, 0x40, %asi
7996 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
7997 and %l1, 0x3, %l1 ! Check if busy/enabled ..
7998 cmp %l1, 1
7999 bne cwq_10_65
8000 set CWQ_BASE, %l6
8001#ifndef SPC
8002 add %l6, %o3, %l6
8003#endif
8004 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
8005 best_set_reg(0x20610090, %l1, %l2) !# Control Word
8006 sllx %l2, 32, %l2
8007 stx %l2, [%l6 + 0x0]
8008 membar #Sync
8009 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
8010 sub %l2, 0x40, %l2
8011 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
8012 wr %r12, %g0, %asi
8013 st %g0, [%r23]
8014cwq_10_65:
8015 ta T_CHANGE_NONHPRIV
8016 .word 0x93414000 ! 85: RDPC rd %pc, %r9
8017 .word 0x91450000 ! 86: RD_SET_SOFTINT rd %set_softint, %r8
8018brcommon1_10_66:
8019 nop
8020 setx common_target, %r12, %r27
8021 lduw [%r27], %r12 ! Load common dest into dcache ..
8022 ba,a .+12
8023 .word 0x93b7c7d4 ! 1: PDIST pdistn %d62, %d20, %d40
8024 ba,a .+8
8025 jmpl %r27+0, %r27
8026 .word 0xa7b1c7d0 ! 87: PDIST pdistn %d38, %d16, %d50
8027pmu_10_67:
8028 nop
8029 setx 0xffffffb8ffffffa7, %g1, %g7
8030 .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %-
8031#if (defined SPC || defined CMP)
8032!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_68)+8, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1)
8033!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_68)&0xffffffff) + 16, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1)
8034xir_10_68:
8035#else
8036#if (defined FC)
8037!! Generate XIR via RESET_GEN register
8038 ta T_CHANGE_HPRIV
8039 rdpr %pstate, %r18
8040 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
8041 wrpr %r18, %pstate
8042#ifndef XIR_RND_CORES
8043 ldxa [%g0] 0x63, %o1
8044 mov 1, %r18
8045 sllx %r18, %o1, %r18
8046#endif
8047 mov 0x30, %r19
8048 setx 0x8900000808, %r16, %r17
8049 mov 0x2, %r16
8050xir_10_68:
8051 stxa %r18, [%r19] 0x41
8052 stx %r16, [%r17]
8053#endif
8054#endif
8055 .word 0xa981fa3c ! 89: WR_SET_SOFTINT_I wr %r7, 0x1a3c, %set_softint
8056 rd %tick, %r28
8057#if (MAX_THREADS == 8)
8058 sethi %hi(0x33800), %r27
8059#else
8060 sethi %hi(0x30000), %r27
8061#endif
8062 andn %r28, %r27, %r28
8063 ta T_CHANGE_HPRIV
8064 stxa %r28, [%g0] 0x73
8065intvec_10_69:
8066 .word 0x39400001 ! 90: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
8067fpinit_10_70:
8068 nop
8069 setx fp_data_quads, %r19, %r20
8070 ldd [%r20], %f0
8071 ldd [%r20+8], %f4
8072 ld [%r20+16], %fsr
8073 ld [%r20+24], %r19
8074 wr %r19, %g0, %gsr
8075 .word 0xc3e823fe ! 91: PREFETCHA_I prefetcha [%r0, + 0x03fe] %asi, #one_read
8076mondo_10_71:
8077 nop
8078 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
8079 ta T_CHANGE_PRIV
8080 stxa %r5, [%r0+0x3d0] %asi
8081 .word 0x9d928001 ! 92: WRPR_WSTATE_R wrpr %r10, %r1, %wstate
8082 .word 0x8d9030b4 ! 93: WRPR_PSTATE_I wrpr %r0, 0x10b4, %pstate
8083 .word 0x8d802000 ! 94: WRFPRS_I wr %r0, 0x0000, %fprs
8084 nop
8085 ta T_CHANGE_HPRIV
8086 mov 0x10, %r10
8087 set sync_thr_counter6, %r23
8088#ifndef SPC
8089 ldxa [%g0]0x63, %o1
8090 and %o1, 0x38, %o1
8091 add %o1, %r23, %r23
8092#endif
8093 cas [%r23],%g0,%r10 !lock
8094 brnz %r10, sma_10_73
8095 rd %asi, %r12
8096 wr %g0, 0x40, %asi
8097 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
8098 set 0x00021fff, %g1
8099 stxa %g1, [%g0 + 0x80] %asi
8100 wr %r12, %g0, %asi
8101 st %g0, [%r23]
8102sma_10_73:
8103 ta T_CHANGE_NONHPRIV
8104 .word 0xd1e7e008 ! 95: CASA_R casa [%r31] %asi, %r8, %r8
8105ibp_10_74:
8106 nop
8107 ta T_CHANGE_NONHPRIV
8108 .word 0x99a409b0 ! 96: FDIVs fdivs %f16, %f16, %f12
8109 .word 0xc3e9002c ! 97: PREFETCHA_R prefetcha [%r4, %r12] 0x01, #one_read
8110trapasi_10_76:
8111 nop
8112 mov 0x28, %r1 ! (VA for ASI 0x5a)
8113 .word 0xd8c04b40 ! 98: LDSWA_R ldswa [%r1, %r0] 0x5a, %r12
8114 .word 0x81460000 ! 99: RD_STICK_REG stbar
8115jmptr_10_77:
8116 nop
8117 best_set_reg(0xe1200000, %r20, %r27)
8118 .word 0xb7c6c000 ! 100: JMPL_R jmpl %r27 + %r0, %r27
8119pmu_10_78:
8120 nop
8121 ta T_CHANGE_PRIV
8122 setx 0xffffffb2ffffffaf, %g1, %g7
8123 .word 0xa3800007 ! 101: WR_PERF_COUNTER_R wr %r0, %r7, %-
8124memptr_10_79:
8125 set 0x60140000, %r31
8126 .word 0x8581370c ! 102: WRCCR_I wr %r4, 0x170c, %ccr
8127 .word 0xd8cfe078 ! 103: LDSBA_I ldsba [%r31, + 0x0078] %asi, %r12
8128change_to_randtl_10_80:
8129 ta T_CHANGE_PRIV ! macro
8130done_change_to_randtl_10_80:
8131 .word 0x8f902000 ! 104: WRPR_TL_I wrpr %r0, 0x0000, %tl
8132pmu_10_81:
8133 nop
8134 setx 0xffffffbaffffffac, %g1, %g7
8135 .word 0xa3800007 ! 105: WR_PERF_COUNTER_R wr %r0, %r7, %-
8136splash_lsu_10_82:
8137 nop
8138 ta T_CHANGE_HPRIV
8139 set 0x9d501388, %r2
8140 mov 0x1, %r1
8141 sllx %r1, 32, %r1
8142 or %r1, %r2, %r2
8143 .word 0x22cc8001 ! 1: BRZ brz,a,pt %r18,<label_0xc8001>
8144 stxa %r2, [%r0] ASI_LSU_CONTROL
8145 .word 0x3d400001 ! 106: FBPULE fbule,a,pn %fcc0, <label_0x1>
8146 .word 0xd8cfe0d8 ! 107: LDSBA_I ldsba [%r31, + 0x00d8] %asi, %r12
8147 .word 0xc36fe1e0 ! 1: PREFETCH_I prefetch [%r31 + 0x01e0], #one_read
8148 .word 0x9f803224 ! 108: SIR sir 0x1224
8149 .word 0xd8dfe118 ! 109: LDXA_I ldxa [%r31, + 0x0118] %asi, %r12
8150 .word 0x87802004 ! 110: WRASI_I wr %r0, 0x0004, %asi
8151mondo_10_83:
8152 nop
8153 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
8154 stxa %r5, [%r0+0x3e8] %asi
8155 .word 0x9d910011 ! 111: WRPR_WSTATE_R wrpr %r4, %r17, %wstate
8156 .word 0x81460000 ! 112: RD_STICK_REG stbar
8157 .word 0x87a94a51 ! 113: FCMPd fcmpd %fcc<n>, %f36, %f48
8158 nop
8159 ta T_CHANGE_HPRIV
8160 mov 0x10+1, %r10
8161 set sync_thr_counter5, %r23
8162#ifndef SPC
8163 ldxa [%g0]0x63, %o1
8164 and %o1, 0x38, %o1
8165 add %o1, %r23, %r23
8166 sllx %o1, 5, %o3 !(CID*256)
8167#endif
8168 cas [%r23],%g0,%r10 !lock
8169 brnz %r10, cwq_10_85
8170 rd %asi, %r12
8171 wr %g0, 0x40, %asi
8172 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
8173 and %l1, 0x3, %l1 ! Check if busy/enabled ..
8174 cmp %l1, 1
8175 bne cwq_10_85
8176 set CWQ_BASE, %l6
8177#ifndef SPC
8178 add %l6, %o3, %l6
8179#endif
8180 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
8181 best_set_reg(0x206100c0, %l1, %l2) !# Control Word
8182 sllx %l2, 32, %l2
8183 stx %l2, [%l6 + 0x0]
8184 membar #Sync
8185 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
8186 sub %l2, 0x40, %l2
8187 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
8188 wr %r12, %g0, %asi
8189 st %g0, [%r23]
8190cwq_10_85:
8191 ta T_CHANGE_NONHPRIV
8192 .word 0xa5414000 ! 114: RDPC rd %pc, %r18
8193#if (defined SPC || defined CMP1)
8194!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_86) + 8, 16, 16)) -> intp(7,0,5,,,,,1)
8195!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_86)&0xffffffff) + 24, 16, 16)) -> intp(2,0,9,,,,,1)
8196#else
8197 set 0xfe0949e, %r28
8198#if (MAX_THREADS == 8)
8199 and %r28, 0x7ff, %r28
8200#endif
8201 stxa %r28, [%g0] 0x73
8202#endif
8203intvec_10_86:
8204 .word 0x39400001 ! 115: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
8205pmu_10_87:
8206 nop
8207 setx 0xffffffbbffffffac, %g1, %g7
8208 .word 0xa3800007 ! 116: WR_PERF_COUNTER_R wr %r0, %r7, %-
8209trapasi_10_88:
8210 nop
8211 mov 0x8, %r1 ! (VA for ASI 0x49)
8212 .word 0xd8d04920 ! 117: LDSHA_R ldsha [%r1, %r0] 0x49, %r12
8213 .word 0x91450000 ! 118: RD_SET_SOFTINT rd %set_softint, %r8
8214fpinit_10_89:
8215 nop
8216 setx fp_data_quads, %r19, %r20
8217 ldd [%r20], %f0
8218 ldd [%r20+8], %f4
8219 ld [%r20+16], %fsr
8220 ld [%r20+24], %r19
8221 wr %r19, %g0, %gsr
8222 .word 0x8da009c4 ! 119: FDIVd fdivd %f0, %f4, %f6
8223 .word 0xc32fc010 ! 1: STXFSR_R st-sfr %f1, [%r16, %r31]
8224 .word 0x9f803e0a ! 120: SIR sir 0x1e0a
8225 nop
8226 ta T_CHANGE_HPRIV ! macro
8227donret_10_90:
8228 rd %pc, %r12
8229 mov HIGHVA_HIGHNUM, %r10
8230 sllx %r10, 32, %r10
8231 or %r12, %r10, %r12
8232 add %r12, (donretarg_10_90-donret_10_90+4), %r12
8233 add %r12, 0x4, %r11 ! seq tnpc
8234 wrpr %g0, 0x2, %tl
8235 wrpr %g0, %r12, %tpc
8236 wrpr %g0, %r11, %tnpc
8237 set (0x00e0df00 | (0x8b << 24)), %r13
8238 and %r12, 0xfff, %r14
8239 sllx %r14, 30, %r14
8240 or %r13, %r14, %r20
8241 wrpr %r20, %g0, %tstate
8242 wrhpr %g0, 0x1382, %htstate
8243 ta T_CHANGE_NONPRIV ! rand=0 (10)
8244 retry
8245.align 32
8246donretarg_10_90:
8247 .word 0xe66fe1a1 ! 121: LDSTUB_I ldstub %r19, [%r31 + 0x01a1]
8248 .word 0xe6dfc032 ! 1: LDXA_R ldxa [%r31, %r18] 0x01, %r19
8249 .word 0x9f8025e5 ! 122: SIR sir 0x05e5
8250splash_htba_10_91:
8251 nop
8252 ta T_CHANGE_HPRIV
8253 setx 0x0000000000280000, %r11, %r12
8254 .word 0x8b98000c ! 123: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
8255 nop
8256 ta T_CHANGE_HPRIV
8257 mov 0x10+1, %r10
8258 set sync_thr_counter5, %r23
8259#ifndef SPC
8260 ldxa [%g0]0x63, %o1
8261 and %o1, 0x38, %o1
8262 add %o1, %r23, %r23
8263 sllx %o1, 5, %o3 !(CID*256)
8264#endif
8265 cas [%r23],%g0,%r10 !lock
8266 brnz %r10, cwq_10_92
8267 rd %asi, %r12
8268 wr %g0, 0x40, %asi
8269 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
8270 and %l1, 0x3, %l1 ! Check if busy/enabled ..
8271 cmp %l1, 1
8272 bne cwq_10_92
8273 set CWQ_BASE, %l6
8274#ifndef SPC
8275 add %l6, %o3, %l6
8276#endif
8277 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
8278 best_set_reg(0x20610050, %l1, %l2) !# Control Word
8279 sllx %l2, 32, %l2
8280 stx %l2, [%l6 + 0x0]
8281 membar #Sync
8282 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
8283 sub %l2, 0x40, %l2
8284 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
8285 wr %r12, %g0, %asi
8286 st %g0, [%r23]
8287cwq_10_92:
8288 ta T_CHANGE_NONHPRIV
8289 .word 0x97414000 ! 124: RDPC rd %pc, %r11
8290 rd %tick, %r28
8291#if (MAX_THREADS == 8)
8292 sethi %hi(0x33800), %r27
8293#else
8294 sethi %hi(0x30000), %r27
8295#endif
8296 andn %r28, %r27, %r28
8297 ta T_CHANGE_HPRIV
8298 stxa %r28, [%g0] 0x73
8299intvec_10_93:
8300 .word 0x39400001 ! 125: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
8301 .word 0x8d802000 ! 126: WRFPRS_I wr %r0, 0x0000, %fprs
8302 .word 0xa9b207c1 ! 127: PDIST pdistn %d8, %d32, %d20
8303 .word 0x93a149a2 ! 128: FDIVs fdivs %f5, %f2, %f9
8304 .word 0x87a88a49 ! 129: FCMPd fcmpd %fcc<n>, %f2, %f40
8305 .word 0xe8800ae0 ! 130: LDUWA_R lduwa [%r0, %r0] 0x57, %r20
8306intveclr_10_97:
8307 nop
8308 ta T_CHANGE_HPRIV
8309 setx 0xe41e1882a0a44653, %r1, %r28
8310 stxa %r28, [%g0] 0x72
8311 .word 0x25400001 ! 131: FBPLG fblg,a,pn %fcc0, <label_0x1>
8312splash_hpstate_10_98:
8313 .word 0x81983585 ! 132: WRHPR_HPSTATE_I wrhpr %r0, 0x1585, %hpstate
8314trapasi_10_99:
8315 nop
8316 mov 0x0, %r1 ! (VA for ASI 0x72)
8317 .word 0xe8884e40 ! 133: LDUBA_R lduba [%r1, %r0] 0x72, %r20
8318#if (defined SPC || defined CMP)
8319!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_100)+56, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1)
8320!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_100)&0xffffffff) + 16, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1)
8321xir_10_100:
8322#else
8323#if (defined FC)
8324!! Generate XIR via RESET_GEN register
8325 ta T_CHANGE_HPRIV
8326 rdpr %pstate, %r18
8327 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
8328 wrpr %r18, %pstate
8329#ifndef XIR_RND_CORES
8330 ldxa [%g0] 0x63, %o1
8331 mov 1, %r18
8332 sllx %r18, %o1, %r18
8333#endif
8334 mov 0x30, %r19
8335 setx 0x8900000808, %r16, %r17
8336 mov 0x2, %r16
8337xir_10_100:
8338 stxa %r18, [%r19] 0x41
8339 stx %r16, [%r17]
8340#endif
8341#endif
8342 .word 0xa9822959 ! 134: WR_SET_SOFTINT_I wr %r8, 0x0959, %set_softint
8343intveclr_10_101:
8344 nop
8345 ta T_CHANGE_HPRIV
8346 setx 0xdcd59f1fadf6295c, %r1, %r28
8347 stxa %r28, [%g0] 0x72
8348 ta T_CHANGE_NONHPRIV
8349 .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, <label_0x1>
8350intveclr_10_102:
8351 nop
8352 ta T_CHANGE_HPRIV
8353 setx 0x9c22d1429bed53ac, %r1, %r28
8354 stxa %r28, [%g0] 0x72
8355 .word 0x25400001 ! 136: FBPLG fblg,a,pn %fcc0, <label_0x1>
8356 nop
8357 ta T_CHANGE_HPRIV ! macro
8358donret_10_103:
8359 rd %pc, %r12
8360 mov HIGHVA_HIGHNUM, %r10
8361 sllx %r10, 32, %r10
8362 or %r12, %r10, %r12
8363 add %r12, (donretarg_10_103-donret_10_103), %r12
8364 add %r12, 0x8, %r11 ! nonseq tnpc
8365 wrpr %g0, 0x1, %tl
8366 wrpr %g0, %r12, %tpc
8367 wrpr %g0, %r11, %tnpc
8368 set (0x00649900 | (0x8a << 24)), %r13
8369 and %r12, 0xfff, %r14
8370 sllx %r14, 30, %r14
8371 or %r13, %r14, %r20
8372 wrpr %r20, %g0, %tstate
8373 wrhpr %g0, 0x15dd, %htstate
8374 ta T_CHANGE_NONPRIV ! rand=0 (10)
8375 ldx [%r11+%r0], %g1
8376 done
8377donretarg_10_103:
8378 .word 0xe86fe1b9 ! 137: LDSTUB_I ldstub %r20, [%r31 + 0x01b9]
8379ibp_10_104:
8380 nop
8381 .word 0xe19fe100 ! 138: LDDFA_I ldda [%r31, 0x0100], %f16
8382 nop
8383 ta T_CHANGE_HPRIV
8384 mov 0x10, %r10
8385 set sync_thr_counter6, %r23
8386#ifndef SPC
8387 ldxa [%g0]0x63, %o1
8388 and %o1, 0x38, %o1
8389 add %o1, %r23, %r23
8390#endif
8391 cas [%r23],%g0,%r10 !lock
8392 brnz %r10, sma_10_105
8393 rd %asi, %r12
8394 wr %g0, 0x40, %asi
8395 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
8396 set 0x001a1fff, %g1
8397 stxa %g1, [%g0 + 0x80] %asi
8398 wr %r12, %g0, %asi
8399 st %g0, [%r23]
8400sma_10_105:
8401 ta T_CHANGE_NONHPRIV
8402 .word 0xe9e7e011 ! 139: CASA_R casa [%r31] %asi, %r17, %r20
8403splash_cmpr_10_106:
8404 mov 0, %r18
8405 sllx %r18, 63, %r18
8406 rd %tick, %r17
8407 add %r17, 0x100, %r17
8408 or %r17, %r18, %r17
8409 ta T_CHANGE_HPRIV
8410 wrhpr %r17, %g0, %hsys_tick_cmpr
8411 .word 0xb3800011 ! 140: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
8412 .word 0xe8dfc028 ! 141: LDXA_R ldxa [%r31, %r8] 0x01, %r20
8413 .word 0x91d020b5 ! 142: Tcc_I ta icc_or_xcc, %r0 + 181
8414splash_hpstate_10_108:
8415 ta T_CHANGE_NONHPRIV
8416 .word 0x819822cf ! 143: WRHPR_HPSTATE_I wrhpr %r0, 0x02cf, %hpstate
8417dvapa_10_109:
8418 nop
8419 ta T_CHANGE_HPRIV
8420 mov 0x8cb, %r20
8421 mov 0x5, %r19
8422 sllx %r20, 23, %r20
8423 or %r19, %r20, %r19
8424 stxa %r19, [%g0] ASI_LSU_CONTROL
8425 mov 0x38, %r18
8426 stxa %r31, [%r18]0x58
8427 ta T_CHANGE_NONHPRIV
8428 .word 0x91a489b2 ! 144: FDIVs fdivs %f18, %f18, %f8
8429 .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1>
8430 .word 0x8d903197 ! 145: WRPR_PSTATE_I wrpr %r0, 0x1197, %pstate
8431memptr_10_111:
8432 set user_data_start, %r31
8433 .word 0x8581e603 ! 146: WRCCR_I wr %r7, 0x0603, %ccr
8434ceter_10_112:
8435 nop
8436 ta T_CHANGE_HPRIV
8437 mov 1, %r17
8438 sllx %r17, 60, %r17
8439 mov 0x18, %r16
8440 stxa %r17, [%r16]0x4c
8441 ta T_CHANGE_NONHPRIV
8442 .word 0x99410000 ! 147: RDTICK rd %tick, %r12
8443 nop
8444 ta T_CHANGE_HPRIV ! macro
8445donret_10_113:
8446 rd %pc, %r12
8447 mov HIGHVA_HIGHNUM, %r10
8448 sllx %r10, 32, %r10
8449 or %r12, %r10, %r12
8450 add %r12, (donretarg_10_113-donret_10_113+4), %r12
8451 add %r12, 0x4, %r11 ! seq tnpc
8452 andn %r11, %r10, %r11 ! low VA tnpc
8453 wrpr %g0, 0x2, %tl
8454 wrpr %g0, %r12, %tpc
8455 wrpr %g0, %r11, %tnpc
8456 set (0x00958000 | (57 << 24)), %r13
8457 and %r12, 0xfff, %r14
8458 sllx %r14, 30, %r14
8459 or %r13, %r14, %r20
8460 wrpr %r20, %g0, %tstate
8461 wrhpr %g0, 0x1a7c, %htstate
8462 ta T_CHANGE_NONHPRIV ! rand=1 (10)
8463 ldx [%r11+%r0], %g1
8464 done
8465donretarg_10_113:
8466 .word 0xe6ffe162 ! 148: SWAPA_I swapa %r19, [%r31 + 0x0162] %asi
8467splash_tba_10_114:
8468 nop
8469 ta T_CHANGE_PRIV
8470 setx 0x0000000000380000, %r11, %r12
8471 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba
8472splash_htba_10_115:
8473 nop
8474 ta T_CHANGE_HPRIV
8475 setx 0x0000000000280000, %r11, %r12
8476 .word 0x8b98000c ! 150: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
8477fpinit_10_116:
8478 nop
8479 setx fp_data_quads, %r19, %r20
8480 ldd [%r20], %f0
8481 ldd [%r20+8], %f4
8482 ld [%r20+16], %fsr
8483 ld [%r20+24], %r19
8484 wr %r19, %g0, %gsr
8485 .word 0x87a80a44 ! 151: FCMPd fcmpd %fcc<n>, %f0, %f4
8486tagged_10_117:
8487 taddcctv %r12, 0x1e60, %r19
8488 .word 0xe607e1d8 ! 152: LDUW_I lduw [%r31 + 0x01d8], %r19
8489#if (defined SPC || defined CMP)
8490!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_118)+56, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1)
8491!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_118)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1)
8492xir_10_118:
8493#else
8494#if (defined FC)
8495!! Generate XIR via RESET_GEN register
8496 ta T_CHANGE_HPRIV
8497 rdpr %pstate, %r18
8498 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
8499 wrpr %r18, %pstate
8500#ifndef XIR_RND_CORES
8501 ldxa [%g0] 0x63, %o1
8502 mov 1, %r18
8503 sllx %r18, %o1, %r18
8504#endif
8505 mov 0x30, %r19
8506 setx 0x8900000808, %r16, %r17
8507 mov 0x2, %r16
8508xir_10_118:
8509 stxa %r18, [%r19] 0x41
8510 stx %r16, [%r17]
8511#endif
8512#endif
8513 .word 0xa9826130 ! 153: WR_SET_SOFTINT_I wr %r9, 0x0130, %set_softint
8514 .word 0x89800011 ! 154: WRTICK_R wr %r0, %r17, %tick
8515mondo_10_120:
8516 nop
8517 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
8518 stxa %r1, [%r0+0x3c8] %asi
8519 .word 0x9d904014 ! 155: WRPR_WSTATE_R wrpr %r1, %r20, %wstate
8520 .word 0xe737c000 ! 156: STQF_R - %f19, [%r0, %r31]
8521 .word 0x87802004 ! 157: WRASI_I wr %r0, 0x0004, %asi
8522 .word 0x9a6d3120 ! 158: UDIVX_I udivx %r20, 0xfffff120, %r13
8523splash_cmpr_10_121:
8524 mov 0, %r18
8525 sllx %r18, 63, %r18
8526 rd %tick, %r17
8527 add %r17, 0x100, %r17
8528 or %r17, %r18, %r17
8529 .word 0xb3800011 ! 159: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
8530 nop
8531 ta T_CHANGE_HPRIV ! macro
8532donret_10_122:
8533 rd %pc, %r12
8534 mov HIGHVA_HIGHNUM, %r10
8535 sllx %r10, 32, %r10
8536 or %r12, %r10, %r12
8537 add %r12, (donretarg_10_122-donret_10_122), %r12
8538 add %r12, 0x4, %r11 ! seq tnpc
8539 andn %r11, %r10, %r11 ! low VA tnpc
8540 wrpr %g0, 0x1, %tl
8541 wrpr %g0, %r12, %tpc
8542 wrpr %g0, %r11, %tnpc
8543 set (0x0019f400 | (20 << 24)), %r13
8544 and %r12, 0xfff, %r14
8545 sllx %r14, 30, %r14
8546 or %r13, %r14, %r20
8547 wrpr %r20, %g0, %tstate
8548 wrhpr %g0, 0x1e0f, %htstate
8549 ta T_CHANGE_NONPRIV ! rand=0 (10)
8550 ldx [%r12+%r0], %g1
8551 retry
8552donretarg_10_122:
8553 .word 0xa1a409d3 ! 160: FDIVd fdivd %f16, %f50, %f16
8554pmu_10_123:
8555 nop
8556 setx 0xffffffbfffffffa0, %g1, %g7
8557 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
8558splash_tba_10_124:
8559 nop
8560 ta T_CHANGE_PRIV
8561 set 0x120000, %r12
8562 .word 0x8b90000c ! 162: WRPR_TBA_R wrpr %r0, %r12, %tba
8563mondo_10_125:
8564 nop
8565 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
8566 ta T_CHANGE_PRIV
8567 stxa %r18, [%r0+0x3c8] %asi
8568 .word 0x9d928011 ! 163: WRPR_WSTATE_R wrpr %r10, %r17, %wstate
8569 .word 0xa1902002 ! 164: WRPR_GL_I wrpr %r0, 0x0002, %-
8570trapasi_10_126:
8571 nop
8572 mov 0x0, %r1 ! (VA for ASI 0x5b)
8573 .word 0xda904b60 ! 165: LDUHA_R lduha [%r1, %r0] 0x5b, %r13
8574 .word 0x8d802000 ! 166: WRFPRS_I wr %r0, 0x0000, %fprs
8575splash_tba_10_127:
8576 nop
8577 ta T_CHANGE_PRIV
8578 setx 0x0000000000380000, %r11, %r12
8579 .word 0x8b90000c ! 167: WRPR_TBA_R wrpr %r0, %r12, %tba
8580 invalw
8581 mov 0x32, %r30
8582 .word 0x83d0001e ! 168: Tcc_R te icc_or_xcc, %r0 + %r30
8583 nop
8584 ta T_CHANGE_HPRIV
8585 mov 0x10, %r10
8586 set sync_thr_counter6, %r23
8587#ifndef SPC
8588 ldxa [%g0]0x63, %o1
8589 and %o1, 0x38, %o1
8590 add %o1, %r23, %r23
8591#endif
8592 cas [%r23],%g0,%r10 !lock
8593 brnz %r10, sma_10_128
8594 rd %asi, %r12
8595 wr %g0, 0x40, %asi
8596 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
8597 set 0x00021fff, %g1
8598 stxa %g1, [%g0 + 0x80] %asi
8599 wr %r12, %g0, %asi
8600 st %g0, [%r23]
8601sma_10_128:
8602 ta T_CHANGE_NONHPRIV
8603 .word 0xdbe7e00a ! 169: CASA_R casa [%r31] %asi, %r10, %r13
8604 .word 0xdb1fe1b0 ! 1: LDDF_I ldd [%r31, 0x01b0], %f13
8605 .word 0x9f803221 ! 170: SIR sir 0x1221
8606 .word 0x8d903819 ! 171: WRPR_PSTATE_I wrpr %r0, 0x1819, %pstate
8607ibp_10_130:
8608 nop
8609 ta T_CHANGE_NONHPRIV
8610 .word 0xe1bfdb60 ! 172: STDFA_R stda %f16, [%r0, %r31]
8611 .word 0xa26cb9f2 ! 173: UDIVX_I udivx %r18, 0xfffff9f2, %r17
8612 .word 0x97684005 ! 174: SDIVX_R sdivx %r1, %r5, %r11
8613dvapa_10_131:
8614 nop
8615 ta T_CHANGE_HPRIV
8616 mov 0xa76, %r20
8617 mov 0x16, %r19
8618 sllx %r20, 23, %r20
8619 or %r19, %r20, %r19
8620 stxa %r19, [%g0] ASI_LSU_CONTROL
8621 mov 0x38, %r18
8622 stxa %r31, [%r18]0x58
8623 ta T_CHANGE_NONHPRIV
8624 .word 0xe1e7e013 ! 175: CASA_R casa [%r31] %asi, %r19, %r16
8625 .word 0xa784ed23 ! 176: WR_GRAPHICS_STATUS_REG_I wr %r19, 0x0d23, %-
8626 nop
8627 ta T_CHANGE_HPRIV
8628 mov 0x10+1, %r10
8629 set sync_thr_counter5, %r23
8630#ifndef SPC
8631 ldxa [%g0]0x63, %o1
8632 and %o1, 0x38, %o1
8633 add %o1, %r23, %r23
8634 sllx %o1, 5, %o3 !(CID*256)
8635#endif
8636 cas [%r23],%g0,%r10 !lock
8637 brnz %r10, cwq_10_132
8638 rd %asi, %r12
8639 wr %g0, 0x40, %asi
8640 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
8641 and %l1, 0x3, %l1 ! Check if busy/enabled ..
8642 cmp %l1, 1
8643 bne cwq_10_132
8644 set CWQ_BASE, %l6
8645#ifndef SPC
8646 add %l6, %o3, %l6
8647#endif
8648 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
8649 best_set_reg(0x206100b0, %l1, %l2) !# Control Word
8650 sllx %l2, 32, %l2
8651 stx %l2, [%l6 + 0x0]
8652 membar #Sync
8653 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
8654 sub %l2, 0x40, %l2
8655 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
8656 wr %r12, %g0, %asi
8657 st %g0, [%r23]
8658cwq_10_132:
8659 ta T_CHANGE_NONHPRIV
8660 .word 0xa1414000 ! 177: RDPC rd %pc, %r16
8661fpinit_10_133:
8662 nop
8663 setx fp_data_quads, %r19, %r20
8664 ldd [%r20], %f0
8665 ldd [%r20+8], %f4
8666 ld [%r20+16], %fsr
8667 ld [%r20+24], %r19
8668 wr %r19, %g0, %gsr
8669 .word 0xc3e83d17 ! 178: PREFETCHA_I prefetcha [%r0, + 0xfffffd17] %asi, #one_read
8670splash_lsu_10_134:
8671 nop
8672 ta T_CHANGE_HPRIV
8673 set 0xa4931b64, %r2
8674 mov 0x6, %r1
8675 sllx %r1, 32, %r1
8676 or %r1, %r2, %r2
8677 stxa %r2, [%r0] ASI_LSU_CONTROL
8678 ta T_CHANGE_NONHPRIV
8679 .word 0x3d400001 ! 179: FBPULE fbule,a,pn %fcc0, <label_0x1>
8680 .word 0x87802039 ! 180: WRASI_I wr %r0, 0x0039, %asi
8681#if (defined SPC || defined CMP)
8682!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_135)+8, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1)
8683!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_135)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1)
8684xir_10_135:
8685#else
8686#if (defined FC)
8687!! Generate XIR via RESET_GEN register
8688 ta T_CHANGE_HPRIV
8689 rdpr %pstate, %r18
8690 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
8691 wrpr %r18, %pstate
8692#ifndef XIR_RND_CORES
8693 ldxa [%g0] 0x63, %o1
8694 mov 1, %r18
8695 sllx %r18, %o1, %r18
8696#endif
8697 mov 0x30, %r19
8698 setx 0x8900000808, %r16, %r17
8699 mov 0x2, %r16
8700xir_10_135:
8701 stxa %r18, [%r19] 0x41
8702 stx %r16, [%r17]
8703#endif
8704#endif
8705 .word 0xa9846f8a ! 181: WR_SET_SOFTINT_I wr %r17, 0x0f8a, %set_softint
8706trapasi_10_136:
8707 nop
8708 mov 0x110, %r1 ! (VA for ASI 0x4a)
8709 .word 0xdac84940 ! 182: LDSBA_R ldsba [%r1, %r0] 0x4a, %r13
8710intveclr_10_137:
8711 nop
8712 ta T_CHANGE_HPRIV
8713 setx 0xa45e1a1ec7fe11e3, %r1, %r28
8714 stxa %r28, [%g0] 0x72
8715 ta T_CHANGE_NONHPRIV
8716 .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1>
8717tagged_10_138:
8718 tsubcctv %r18, 0x1205, %r5
8719 .word 0xda07e115 ! 184: LDUW_I lduw [%r31 + 0x0115], %r13
8720splash_hpstate_10_139:
8721 ta T_CHANGE_NONHPRIV
8722 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
8723 .word 0x8198340d ! 185: WRHPR_HPSTATE_I wrhpr %r0, 0x140d, %hpstate
8724 .word 0xda77c000 ! 186: STX_R stx %r13, [%r31 + %r0]
8725brcommon3_10_140:
8726 nop
8727 setx common_target, %r12, %r27
8728 lduw [%r27], %r12 ! Load common dest into dcache ..
8729 ba,a .+12
8730 .word 0xdb37e1f0 ! 1: STQF_I - %f13, [0x01f0, %r31]
8731 ba,a .+8
8732 jmpl %r27+0, %r27
8733 .word 0x8d903f4f ! 187: WRPR_PSTATE_I wrpr %r0, 0x1f4f, %pstate
8734 otherw
8735 mov 0x30, %r30
8736 .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30
8737ibp_10_141:
8738 nop
8739 .word 0x87ac8a4a ! 189: FCMPd fcmpd %fcc<n>, %f18, %f10
8740tagged_10_142:
8741 tsubcctv %r2, 0x19b4, %r20
8742 .word 0xd807e09d ! 190: LDUW_I lduw [%r31 + 0x009d], %r12
8743 .word 0x8780208a ! 191: WRASI_I wr %r0, 0x008a, %asi
8744intveclr_10_143:
8745 nop
8746 ta T_CHANGE_HPRIV
8747 setx 0xe30d08e64350c328, %r1, %r28
8748 stxa %r28, [%g0] 0x72
8749 ta T_CHANGE_NONHPRIV
8750 .word 0x25400001 ! 192: FBPLG fblg,a,pn %fcc0, <label_0x1>
8751#if (defined SPC || defined CMP1)
8752!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_144) + 40, 16, 16)) -> intp(7,0,3,,,,,1)
8753!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_144)&0xffffffff) + 40, 16, 16)) -> intp(2,0,5,,,,,1)
8754#else
8755 set 0x8b08e2b, %r28
8756#if (MAX_THREADS == 8)
8757 and %r28, 0x7ff, %r28
8758#endif
8759 stxa %r28, [%g0] 0x73
8760#endif
8761intvec_10_144:
8762 .word 0x39400001 ! 193: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
8763 .word 0x87802088 ! 194: WRASI_I wr %r0, 0x0088, %asi
8764 .word 0x89800011 ! 195: WRTICK_R wr %r0, %r17, %tick
8765dvapa_10_146:
8766 nop
8767 ta T_CHANGE_HPRIV
8768 mov 0xb54, %r20
8769 mov 0x1b, %r19
8770 sllx %r20, 23, %r20
8771 or %r19, %r20, %r19
8772 stxa %r19, [%g0] ASI_LSU_CONTROL
8773 mov 0x38, %r18
8774 stxa %r31, [%r18]0x58
8775 ta T_CHANGE_NONHPRIV
8776 .word 0xe1bfe180 ! 196: STDFA_I stda %f16, [0x0180, %r31]
8777splash_tba_10_147:
8778 nop
8779 ta T_CHANGE_PRIV
8780 setx 0x0000000000380000, %r11, %r12
8781 .word 0x8b90000c ! 197: WRPR_TBA_R wrpr %r0, %r12, %tba
8782 .word 0xa6c124c5 ! 198: ADDCcc_I addccc %r4, 0x04c5, %r19
8783pmu_10_148:
8784 nop
8785 setx 0xffffffb6ffffffa8, %g1, %g7
8786 .word 0xa3800007 ! 199: WR_PERF_COUNTER_R wr %r0, %r7, %-
8787ibp_10_149:
8788 nop
8789 ta T_CHANGE_NONHPRIV
8790 .word 0xe19fdc00 ! 200: LDDFA_R ldda [%r31, %r0], %f16
8791 nop
8792 nop
8793 ta T_CHANGE_PRIV
8794 wrpr %g0, %g0, %gl
8795 nop
8796 nop
8797.text
8798 setx join_lbl_0_0, %g1, %g2
8799 jmp %g2
8800 nop
8801fork_lbl_0_4:
8802 ta T_CHANGE_NONHPRIV
8803vahole5_8_0:
8804 nop
8805 setx vahole_target2, %r18, %r27
8806 jmpl %r27+0, %r27
8807 ta T_CHANGE_PRIV
8808ibp_8_1:
8809 nop
8810 .word 0xe1bfda00 ! 1: STDFA_R stda %f16, [%r0, %r31]
8811splash_cmpr_8_2:
8812 mov 0, %r18
8813 sllx %r18, 63, %r18
8814 rd %tick, %r17
8815 add %r17, 0x100, %r17
8816 or %r17, %r18, %r17
8817 .word 0xaf800011 ! 2: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
8818mondo_8_3:
8819 nop
8820 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
8821 ta T_CHANGE_PRIV
8822 stxa %r17, [%r0+0x3c8] %asi
8823 .word 0x9d918011 ! 3: WRPR_WSTATE_R wrpr %r6, %r17, %wstate
8824 .word 0xe19fe0a0 ! 4: LDDFA_I ldda [%r31, 0x00a0], %f16
8825 nop
8826 ta T_CHANGE_HPRIV
8827 mov 0x8+1, %r10
8828 set sync_thr_counter5, %r23
8829#ifndef SPC
8830 ldxa [%g0]0x63, %o1
8831 and %o1, 0x38, %o1
8832 add %o1, %r23, %r23
8833 sllx %o1, 5, %o3 !(CID*256)
8834#endif
8835 cas [%r23],%g0,%r10 !lock
8836 brnz %r10, cwq_8_4
8837 rd %asi, %r12
8838 wr %g0, 0x40, %asi
8839 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
8840 and %l1, 0x3, %l1 ! Check if busy/enabled ..
8841 cmp %l1, 1
8842 bne cwq_8_4
8843 set CWQ_BASE, %l6
8844#ifndef SPC
8845 add %l6, %o3, %l6
8846#endif
8847 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
8848 best_set_reg(0x20610000, %l1, %l2) !# Control Word
8849 sllx %l2, 32, %l2
8850 stx %l2, [%l6 + 0x0]
8851 membar #Sync
8852 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
8853 sub %l2, 0x40, %l2
8854 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
8855 wr %r12, %g0, %asi
8856 st %g0, [%r23]
8857cwq_8_4:
8858 ta T_CHANGE_NONHPRIV
8859 .word 0xa5414000 ! 5: RDPC rd %pc, %r18
8860 nop
8861 ta T_CHANGE_HPRIV ! macro
8862donret_8_5:
8863 rd %pc, %r12
8864 mov HIGHVA_HIGHNUM, %r10
8865 sllx %r10, 32, %r10
8866 or %r12, %r10, %r12
8867 add %r12, (donretarg_8_5-donret_8_5), %r12
8868 add %r12, 0x8, %r11 ! nonseq tnpc
8869 wrpr %g0, 0x1, %tl
8870 wrpr %g0, %r12, %tpc
8871 wrpr %g0, %r11, %tnpc
8872 set (0x0094f200 | (0x8a << 24)), %r13
8873 and %r12, 0xfff, %r14
8874 sllx %r14, 30, %r14
8875 or %r13, %r14, %r20
8876 wrpr %r20, %g0, %tstate
8877 wrhpr %g0, 0x709, %htstate
8878 ta T_CHANGE_NONPRIV ! rand=0 (8)
8879 ldx [%r11+%r0], %g1
8880 done
8881donretarg_8_5:
8882 .word 0x819825dd ! 6: WRHPR_HPSTATE_I wrhpr %r0, 0x05dd, %hpstate
8883 .word 0xe937e0f8 ! 7: STQF_I - %f20, [0x00f8, %r31]
8884jmptr_8_6:
8885 nop
8886 best_set_reg(0xe0a00000, %r20, %r27)
8887 .word 0xb7c6c000 ! 8: JMPL_R jmpl %r27 + %r0, %r27
8888 rd %tick, %r28
8889#if (MAX_THREADS == 8)
8890 sethi %hi(0x33800), %r27
8891#else
8892 sethi %hi(0x30000), %r27
8893#endif
8894 andn %r28, %r27, %r28
8895 ta T_CHANGE_HPRIV
8896 stxa %r28, [%g0] 0x73
8897intvec_8_7:
8898 .word 0x39400001 ! 9: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
8899 .word 0x9f803883 ! 10: SIR sir 0x1883
8900 .word 0x8d802004 ! 11: WRFPRS_I wr %r0, 0x0004, %fprs
8901trapasi_8_8:
8902 nop
8903 mov 0x10, %r1 ! (VA for ASI 0x48)
8904 .word 0xe8d04900 ! 12: LDSHA_R ldsha [%r1, %r0] 0x48, %r20
8905 .word 0xe81fe078 ! 13: LDD_I ldd [%r31 + 0x0078], %r20
8906 .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1>
8907 .word 0x8d90273b ! 14: WRPR_PSTATE_I wrpr %r0, 0x073b, %pstate
8908 nop
8909 ta T_CHANGE_HPRIV
8910 mov 0x8+1, %r10
8911 set sync_thr_counter5, %r23
8912#ifndef SPC
8913 ldxa [%g0]0x63, %o1
8914 and %o1, 0x38, %o1
8915 add %o1, %r23, %r23
8916 sllx %o1, 5, %o3 !(CID*256)
8917#endif
8918 cas [%r23],%g0,%r10 !lock
8919 brnz %r10, cwq_8_10
8920 rd %asi, %r12
8921 wr %g0, 0x40, %asi
8922 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
8923 and %l1, 0x3, %l1 ! Check if busy/enabled ..
8924 cmp %l1, 1
8925 bne cwq_8_10
8926 set CWQ_BASE, %l6
8927#ifndef SPC
8928 add %l6, %o3, %l6
8929#endif
8930 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
8931 best_set_reg(0x206100e0, %l1, %l2) !# Control Word
8932 sllx %l2, 32, %l2
8933 stx %l2, [%l6 + 0x0]
8934 membar #Sync
8935 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
8936 sub %l2, 0x40, %l2
8937 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
8938 wr %r12, %g0, %asi
8939 st %g0, [%r23]
8940cwq_8_10:
8941 ta T_CHANGE_NONHPRIV
8942 .word 0x97414000 ! 15: RDPC rd %pc, %r11
8943brcommon2_8_11:
8944 nop
8945 setx common_target, %r12, %r27
8946 ba,a .+12
8947 .word 0x9ba509c1 ! 1: FDIVd fdivd %f20, %f32, %f44
8948 ba,a .+8
8949 jmpl %r27+0, %r27
8950 .word 0xc19fe060 ! 16: LDDFA_I ldda [%r31, 0x0060], %f0
8951jmptr_8_12:
8952 nop
8953 best_set_reg(0xe0a00000, %r20, %r27)
8954 .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27
8955mondo_8_13:
8956 nop
8957 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
8958 ta T_CHANGE_PRIV
8959 stxa %r2, [%r0+0x3d0] %asi
8960 .word 0x9d94000c ! 18: WRPR_WSTATE_R wrpr %r16, %r12, %wstate
8961mondo_8_14:
8962 nop
8963 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
8964 stxa %r9, [%r0+0x3c8] %asi
8965 .word 0x9d934013 ! 19: WRPR_WSTATE_R wrpr %r13, %r19, %wstate
8966splash_cmpr_8_15:
8967 mov 0, %r18
8968 sllx %r18, 63, %r18
8969 rd %tick, %r17
8970 add %r17, 0x50, %r17
8971 or %r17, %r18, %r17
8972 ta T_CHANGE_HPRIV
8973 wrhpr %r17, %g0, %hsys_tick_cmpr
8974 .word 0xaf800011 ! 20: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
8975#if (defined SPC || defined CMP1)
8976!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_16) + 8, 16, 16)) -> intp(0,0,27,,,,,1)
8977!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_16)&0xffffffff) + 40, 16, 16)) -> intp(5,0,9,,,,,1)
8978#else
8979 set 0x1820b104, %r28
8980#if (MAX_THREADS == 8)
8981 and %r28, 0x7ff, %r28
8982#endif
8983 stxa %r28, [%g0] 0x73
8984#endif
8985intvec_8_16:
8986 .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
8987 .word 0x81dc000b ! 22: FLUSH_R flush %r16, %r11, %r0
8988 .word 0x24800001 ! 1: BLE ble,a <label_0x1>
8989 .word 0x8d902f93 ! 23: WRPR_PSTATE_I wrpr %r0, 0x0f93, %pstate
8990 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl
8991reduce_priv_lvl_8_18:
8992 ta T_CHANGE_NONHPRIV ! macro
8993mondo_8_19:
8994 nop
8995 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
8996 stxa %r2, [%r0+0x3d0] %asi
8997 .word 0x9d92c00c ! 25: WRPR_WSTATE_R wrpr %r11, %r12, %wstate
8998 .word 0x81510000 ! 26: RDPR_TICK rdpr %tick, %r0
8999 .word 0x879aed89 ! 27: WRHPR_HINTP_I wrhpr %r11, 0x0d89, %hintp
9000fpinit_8_20:
9001 nop
9002 setx fp_data_quads, %r19, %r20
9003 ldd [%r20], %f0
9004 ldd [%r20+8], %f4
9005 ld [%r20+16], %fsr
9006 ld [%r20+24], %r19
9007 wr %r19, %g0, %gsr
9008 .word 0x8db00484 ! 28: FCMPLE32 fcmple32 %d0, %d4, %r6
9009mondo_8_21:
9010 nop
9011 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
9012 stxa %r12, [%r0+0x3c0] %asi
9013 .word 0x9d904009 ! 29: WRPR_WSTATE_R wrpr %r1, %r9, %wstate
9014splash_hpstate_8_22:
9015 .word 0x81982f54 ! 30: WRHPR_HPSTATE_I wrhpr %r0, 0x0f54, %hpstate
9016splash_tba_8_23:
9017 nop
9018 ta T_CHANGE_PRIV
9019 setx 0x00000000003a0000, %r11, %r12
9020 .word 0x8b90000c ! 31: WRPR_TBA_R wrpr %r0, %r12, %tba
9021trapasi_8_24:
9022 nop
9023 mov 0x110, %r1 ! (VA for ASI 0x4a)
9024 .word 0xe8c84940 ! 32: LDSBA_R ldsba [%r1, %r0] 0x4a, %r20
9025 rd %tick, %r28
9026#if (MAX_THREADS == 8)
9027 sethi %hi(0x33800), %r27
9028#else
9029 sethi %hi(0x30000), %r27
9030#endif
9031 andn %r28, %r27, %r28
9032 ta T_CHANGE_HPRIV
9033 stxa %r28, [%g0] 0x73
9034intvec_8_25:
9035 .word 0x39400001 ! 33: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
9036 nop
9037 ta T_CHANGE_HPRIV
9038 mov 0x8, %r10
9039 set sync_thr_counter6, %r23
9040#ifndef SPC
9041 ldxa [%g0]0x63, %o1
9042 and %o1, 0x38, %o1
9043 add %o1, %r23, %r23
9044#endif
9045 cas [%r23],%g0,%r10 !lock
9046 brnz %r10, sma_8_26
9047 rd %asi, %r12
9048 wr %g0, 0x40, %asi
9049 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
9050 set 0x001e1fff, %g1
9051 stxa %g1, [%g0 + 0x80] %asi
9052 wr %r12, %g0, %asi
9053 st %g0, [%r23]
9054sma_8_26:
9055 ta T_CHANGE_NONHPRIV
9056 .word 0xe9e7e014 ! 34: CASA_R casa [%r31] %asi, %r20, %r20
9057 .word 0xe89fe100 ! 35: LDDA_I ldda [%r31, + 0x0100] %asi, %r20
9058 nop
9059 ta T_CHANGE_HPRIV
9060 mov 0x8, %r10
9061 set sync_thr_counter6, %r23
9062#ifndef SPC
9063 ldxa [%g0]0x63, %o1
9064 and %o1, 0x38, %o1
9065 add %o1, %r23, %r23
9066#endif
9067 cas [%r23],%g0,%r10 !lock
9068 brnz %r10, sma_8_27
9069 rd %asi, %r12
9070 wr %g0, 0x40, %asi
9071 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
9072 set 0x00121fff, %g1
9073 stxa %g1, [%g0 + 0x80] %asi
9074 wr %r12, %g0, %asi
9075 st %g0, [%r23]
9076sma_8_27:
9077 ta T_CHANGE_NONHPRIV
9078 .word 0xe9e7e008 ! 36: CASA_R casa [%r31] %asi, %r8, %r20
9079 nop
9080 ta T_CHANGE_HPRIV ! macro
9081donret_8_28:
9082 rd %pc, %r12
9083 mov HIGHVA_HIGHNUM, %r10
9084 sllx %r10, 32, %r10
9085 or %r12, %r10, %r12
9086 add %r12, (donretarg_8_28-donret_8_28), %r12
9087 add %r12, 0x4, %r11 ! seq tnpc
9088 andn %r11, %r10, %r11 ! low VA tnpc
9089 wrpr %g0, 0x1, %tl
9090 wrpr %g0, %r12, %tpc
9091 wrpr %g0, %r11, %tnpc
9092 set (0x002b1b00 | (57 << 24)), %r13
9093 and %r12, 0xfff, %r14
9094 sllx %r14, 30, %r14
9095 or %r13, %r14, %r20
9096 wrpr %r20, %g0, %tstate
9097 wrhpr %g0, 0x10d5, %htstate
9098 ta T_CHANGE_NONHPRIV ! rand=1 (8)
9099 retry
9100donretarg_8_28:
9101 .word 0x3d400001 ! 37: FBPULE fbule,a,pn %fcc0, <label_0x1>
9102brcommon2_8_29:
9103 nop
9104 setx common_target, %r12, %r27
9105 ba,a .+12
9106 .word 0xa1a00552 ! 1: FSQRTd fsqrt
9107 ba,a .+8
9108 jmpl %r27+0, %r27
9109 .word 0xe1bfe160 ! 38: STDFA_I stda %f16, [0x0160, %r31]
9110 .word 0x9192c010 ! 39: WRPR_PIL_R wrpr %r11, %r16, %pil
9111 .word 0xd877e13a ! 40: STX_I stx %r12, [%r31 + 0x013a]
9112 nop
9113 ta T_CHANGE_HPRIV
9114 mov 0x8+1, %r10
9115 set sync_thr_counter5, %r23
9116#ifndef SPC
9117 ldxa [%g0]0x63, %o1
9118 and %o1, 0x38, %o1
9119 add %o1, %r23, %r23
9120 sllx %o1, 5, %o3 !(CID*256)
9121#endif
9122 cas [%r23],%g0,%r10 !lock
9123 brnz %r10, cwq_8_31
9124 rd %asi, %r12
9125 wr %g0, 0x40, %asi
9126 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
9127 and %l1, 0x3, %l1 ! Check if busy/enabled ..
9128 cmp %l1, 1
9129 bne cwq_8_31
9130 set CWQ_BASE, %l6
9131#ifndef SPC
9132 add %l6, %o3, %l6
9133#endif
9134 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
9135 best_set_reg(0x206100b0, %l1, %l2) !# Control Word
9136 sllx %l2, 32, %l2
9137 stx %l2, [%l6 + 0x0]
9138 membar #Sync
9139 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
9140 sub %l2, 0x40, %l2
9141 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
9142 wr %r12, %g0, %asi
9143 st %g0, [%r23]
9144cwq_8_31:
9145 ta T_CHANGE_NONHPRIV
9146 .word 0x97414000 ! 41: RDPC rd %pc, %r11
9147vahole6_8_32:
9148 nop
9149 mov 1, %r27
9150 sllx %r27, 49, %r27
9151 jmpl %r27+0, %r27
9152 ta T_CHANGE_NONHPRIV
9153 .word 0xe6dfc033 ! 42: LDXA_R ldxa [%r31, %r19] 0x01, %r19
9154 nop
9155 ta T_CHANGE_HPRIV
9156 mov 0x8, %r10
9157 set sync_thr_counter6, %r23
9158#ifndef SPC
9159 ldxa [%g0]0x63, %o1
9160 and %o1, 0x38, %o1
9161 add %o1, %r23, %r23
9162#endif
9163 cas [%r23],%g0,%r10 !lock
9164 brnz %r10, sma_8_33
9165 rd %asi, %r12
9166 wr %g0, 0x40, %asi
9167 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
9168 set 0x001e1fff, %g1
9169 stxa %g1, [%g0 + 0x80] %asi
9170 wr %r12, %g0, %asi
9171 st %g0, [%r23]
9172sma_8_33:
9173 ta T_CHANGE_NONHPRIV
9174 .word 0xe7e7e014 ! 43: CASA_R casa [%r31] %asi, %r20, %r19
9175 nop
9176 ta T_CHANGE_HPRIV ! macro
9177donret_8_34:
9178 rd %pc, %r12
9179 mov HIGHVA_HIGHNUM, %r10
9180 sllx %r10, 32, %r10
9181 or %r12, %r10, %r12
9182 add %r12, (donretarg_8_34-donret_8_34+4), %r12
9183 add %r12, 0x4, %r11 ! seq tnpc
9184 wrpr %g0, 0x1, %tl
9185 wrpr %g0, %r12, %tpc
9186 wrpr %g0, %r11, %tnpc
9187 set (0x0088e400 | (0x58 << 24)), %r13
9188 and %r12, 0xfff, %r14
9189 sllx %r14, 30, %r14
9190 or %r13, %r14, %r20
9191 wrpr %r20, %g0, %tstate
9192 wrhpr %g0, 0xf3f, %htstate
9193 ta T_CHANGE_NONPRIV ! rand=0 (8)
9194 retry
9195donretarg_8_34:
9196 .word 0xe66fe1a8 ! 44: LDSTUB_I ldstub %r19, [%r31 + 0x01a8]
9197 nop
9198 mov 0x80, %g3
9199 .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1>
9200 stxa %g3, [%g3] 0x57
9201 .word 0xe65fc000 ! 45: LDX_R ldx [%r31 + %r0], %r19
9202#if (defined SPC || defined CMP)
9203!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_35)+56, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1)
9204!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_35)&0xffffffff) + 16, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1)
9205xir_8_35:
9206#else
9207#if (defined FC)
9208!! Generate XIR via RESET_GEN register
9209 ta T_CHANGE_HPRIV
9210 rdpr %pstate, %r18
9211 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
9212 wrpr %r18, %pstate
9213#ifndef XIR_RND_CORES
9214 ldxa [%g0] 0x63, %o1
9215 mov 1, %r18
9216 sllx %r18, %o1, %r18
9217#endif
9218 mov 0x30, %r19
9219 setx 0x8900000808, %r16, %r17
9220 mov 0x2, %r16
9221xir_8_35:
9222 stxa %r18, [%r19] 0x41
9223 stx %r16, [%r17]
9224#endif
9225#endif
9226 .word 0xa9842b60 ! 46: WR_SET_SOFTINT_I wr %r16, 0x0b60, %set_softint
9227 .word 0xe69fe120 ! 47: LDDA_I ldda [%r31, + 0x0120] %asi, %r19
9228 nop
9229 ta T_CHANGE_HPRIV ! macro
9230donret_8_37:
9231 rd %pc, %r12
9232 mov HIGHVA_HIGHNUM, %r10
9233 sllx %r10, 32, %r10
9234 or %r12, %r10, %r12
9235 add %r12, (donretarg_8_37-donret_8_37+4), %r12
9236 add %r12, 0x4, %r11 ! seq tnpc
9237 andn %r12, %r10, %r12 ! low VA tpc
9238 wrpr %g0, 0x1, %tl
9239 wrpr %g0, %r12, %tpc
9240 wrpr %g0, %r11, %tnpc
9241 set (0x00c37600 | (20 << 24)), %r13
9242 and %r12, 0xfff, %r14
9243 sllx %r14, 30, %r14
9244 or %r13, %r14, %r20
9245 wrpr %r20, %g0, %tstate
9246 wrhpr %g0, 0x8dd, %htstate
9247 ta T_CHANGE_NONPRIV ! rand=0 (8)
9248 ldx [%r11+%r0], %g1
9249 done
9250.align 32
9251donretarg_8_37:
9252 .word 0x8d903a8e ! 48: WRPR_PSTATE_I wrpr %r0, 0x1a8e, %pstate
9253 .word 0x89800011 ! 49: WRTICK_R wr %r0, %r17, %tick
9254 .word 0xc1bfe1c0 ! 50: STDFA_I stda %f0, [0x01c0, %r31]
9255splash_lsu_8_40:
9256 nop
9257 ta T_CHANGE_HPRIV
9258 set 0xa94c5c81, %r2
9259 mov 0x6, %r1
9260 sllx %r1, 32, %r1
9261 or %r1, %r2, %r2
9262 stxa %r2, [%r0] ASI_LSU_CONTROL
9263 .word 0x3d400001 ! 51: FBPULE fbule,a,pn %fcc0, <label_0x1>
9264change_to_randtl_8_41:
9265 ta T_CHANGE_HPRIV ! macro
9266done_change_to_randtl_8_41:
9267 .word 0x8f902000 ! 52: WRPR_TL_I wrpr %r0, 0x0000, %tl
9268 .word 0xc1bfc3e0 ! 53: STDFA_R stda %f0, [%r0, %r31]
9269 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick
9270 nop
9271 ta T_CHANGE_HPRIV ! macro
9272donret_8_43:
9273 rd %pc, %r12
9274 mov HIGHVA_HIGHNUM, %r10
9275 sllx %r10, 32, %r10
9276 or %r12, %r10, %r12
9277 add %r12, (donretarg_8_43-donret_8_43+4), %r12
9278 add %r12, 0x4, %r11 ! seq tnpc
9279 wrpr %g0, 0x1, %tl
9280 wrpr %g0, %r12, %tpc
9281 wrpr %g0, %r11, %tnpc
9282 set (0x00eaa800 | (0x58 << 24)), %r13
9283 and %r12, 0xfff, %r14
9284 sllx %r14, 30, %r14
9285 or %r13, %r14, %r20
9286 wrpr %r20, %g0, %tstate
9287 wrhpr %g0, 0x35f, %htstate
9288 ta T_CHANGE_NONPRIV ! rand=0 (8)
9289 .word 0x26c90001 ! 1: BRLZ brlz,a,pt %r4,<label_0x90001>
9290 done
9291.align 32
9292donretarg_8_43:
9293 .word 0x81982421 ! 55: WRHPR_HPSTATE_I wrhpr %r0, 0x0421, %hpstate
9294 .word 0xe64fc000 ! 56: LDSB_R ldsb [%r31 + %r0], %r19
9295 .word 0xe71fe080 ! 57: LDDF_I ldd [%r31, 0x0080], %f19
9296 .word 0x87802083 ! 58: WRASI_I wr %r0, 0x0083, %asi
9297 .word 0x89800011 ! 59: WRTICK_R wr %r0, %r17, %tick
9298 nop
9299 ta T_CHANGE_HPRIV
9300 mov 0x8+1, %r10
9301 set sync_thr_counter5, %r23
9302#ifndef SPC
9303 ldxa [%g0]0x63, %o1
9304 and %o1, 0x38, %o1
9305 add %o1, %r23, %r23
9306 sllx %o1, 5, %o3 !(CID*256)
9307#endif
9308 cas [%r23],%g0,%r10 !lock
9309 brnz %r10, cwq_8_45
9310 rd %asi, %r12
9311 wr %g0, 0x40, %asi
9312 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
9313 and %l1, 0x3, %l1 ! Check if busy/enabled ..
9314 cmp %l1, 1
9315 bne cwq_8_45
9316 set CWQ_BASE, %l6
9317#ifndef SPC
9318 add %l6, %o3, %l6
9319#endif
9320 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
9321 best_set_reg(0x20610050, %l1, %l2) !# Control Word
9322 sllx %l2, 32, %l2
9323 stx %l2, [%l6 + 0x0]
9324 membar #Sync
9325 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
9326 sub %l2, 0x40, %l2
9327 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
9328 wr %r12, %g0, %asi
9329 st %g0, [%r23]
9330cwq_8_45:
9331 ta T_CHANGE_NONHPRIV
9332 .word 0x91414000 ! 60: RDPC rd %pc, %r8
9333mondo_8_46:
9334 nop
9335 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
9336 ta T_CHANGE_PRIV
9337 stxa %r17, [%r0+0x3d8] %asi
9338 .word 0x9d940007 ! 61: WRPR_WSTATE_R wrpr %r16, %r7, %wstate
9339 .word 0x83d02035 ! 62: Tcc_I te icc_or_xcc, %r0 + 53
9340splash_lsu_8_47:
9341 nop
9342 ta T_CHANGE_HPRIV
9343 set 0xf4c33a12, %r2
9344 mov 0x5, %r1
9345 sllx %r1, 32, %r1
9346 or %r1, %r2, %r2
9347 stxa %r2, [%r0] ASI_LSU_CONTROL
9348 .word 0x3d400001 ! 63: FBPULE fbule,a,pn %fcc0, <label_0x1>
9349ibp_8_48:
9350 nop
9351 .word 0xc19fde00 ! 64: LDDFA_R ldda [%r31, %r0], %f0
9352splash_hpstate_8_49:
9353 .word 0x8198278d ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x078d, %hpstate
9354 .word 0x8d902fd5 ! 66: WRPR_PSTATE_I wrpr %r0, 0x0fd5, %pstate
9355 rd %tick, %r28
9356#if (MAX_THREADS == 8)
9357 sethi %hi(0x33800), %r27
9358#else
9359 sethi %hi(0x30000), %r27
9360#endif
9361 andn %r28, %r27, %r28
9362 ta T_CHANGE_HPRIV
9363 stxa %r28, [%g0] 0x73
9364intvec_8_51:
9365 .word 0x39400001 ! 67: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
9366 .word 0x87a8ca51 ! 68: FCMPd fcmpd %fcc<n>, %f34, %f48
9367 nop
9368 ta T_CHANGE_HPRIV ! macro
9369donret_8_53:
9370 rd %pc, %r12
9371 mov HIGHVA_HIGHNUM, %r10
9372 sllx %r10, 32, %r10
9373 or %r12, %r10, %r12
9374 add %r12, (donretarg_8_53-donret_8_53+4), %r12
9375 add %r12, 0x4, %r11 ! seq tnpc
9376 wrpr %g0, 0x2, %tl
9377 wrpr %g0, %r12, %tpc
9378 wrpr %g0, %r11, %tnpc
9379 set (0x00b7a500 | (54 << 24)), %r13
9380 and %r12, 0xfff, %r14
9381 sllx %r14, 30, %r14
9382 or %r13, %r14, %r20
9383 wrpr %r20, %g0, %tstate
9384 wrhpr %g0, 0x747, %htstate
9385 ta T_CHANGE_NONPRIV ! rand=0 (8)
9386 ldx [%r11+%r0], %g1
9387 done
9388donretarg_8_53:
9389 .word 0x2b400001 ! 69: FBPUG fbug,a,pn %fcc0, <label_0x1>
9390 set 19, %l3
9391 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
9392 .word 0xa9b407c8 ! 70: PDIST pdistn %d16, %d8, %d20
9393 .word 0xa1a00161 ! 71: FABSq dis not found
9394
9395ibp_8_55:
9396 nop
9397 ta T_CHANGE_NONHPRIV
9398 .word 0xe19fda00 ! 72: LDDFA_R ldda [%r31, %r0], %f16
9399 nop
9400 ta T_CHANGE_HPRIV ! macro
9401donret_8_56:
9402 rd %pc, %r12
9403 mov HIGHVA_HIGHNUM, %r10
9404 sllx %r10, 32, %r10
9405 or %r12, %r10, %r12
9406 add %r12, (donretarg_8_56-donret_8_56), %r12
9407 add %r12, 0x8, %r11 ! nonseq tnpc
9408 wrpr %g0, 0x1, %tl
9409 wrpr %g0, %r12, %tpc
9410 wrpr %g0, %r11, %tnpc
9411 set (0x00cd6f00 | (0x88 << 24)), %r13
9412 and %r12, 0xfff, %r14
9413 sllx %r14, 30, %r14
9414 or %r13, %r14, %r20
9415 wrpr %r20, %g0, %tstate
9416 wrhpr %g0, 0x1cc7, %htstate
9417 ta T_CHANGE_NONHPRIV ! rand=1 (8)
9418 retry
9419.align 32
9420donretarg_8_56:
9421 .word 0xe4ffe060 ! 73: SWAPA_I swapa %r18, [%r31 + 0x0060] %asi
9422brcommon3_8_57:
9423 nop
9424 setx common_target, %r12, %r27
9425 lduw [%r27], %r12 ! Load common dest into dcache ..
9426 ba,a .+12
9427 .word 0xe537c010 ! 1: STQF_R - %f18, [%r16, %r31]
9428 ba,a .+8
9429 jmpl %r27+0, %r27
9430 .word 0xe4bfc032 ! 74: STDA_R stda %r18, [%r31 + %r18] 0x01
9431 .word 0x91924005 ! 75: WRPR_PIL_R wrpr %r9, %r5, %pil
9432splash_cmpr_8_59:
9433 mov 1, %r18
9434 sllx %r18, 63, %r18
9435 rd %tick, %r17
9436 add %r17, 0x50, %r17
9437 or %r17, %r18, %r17
9438 ta T_CHANGE_PRIV
9439 .word 0xaf800011 ! 76: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
9440splash_cmpr_8_60:
9441 mov 0, %r18
9442 sllx %r18, 63, %r18
9443 rd %tick, %r17
9444 add %r17, 0x60, %r17
9445 or %r17, %r18, %r17
9446 ta T_CHANGE_HPRIV
9447 wrhpr %r17, %g0, %hsys_tick_cmpr
9448 .word 0xb3800011 ! 77: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
9449 .word 0x87802014 ! 78: WRASI_I wr %r0, 0x0014, %asi
9450brcommon3_8_61:
9451 nop
9452 setx common_target, %r12, %r27
9453 lduw [%r27], %r12 ! Load common dest into dcache ..
9454 ba,a .+12
9455 .word 0xe537c014 ! 1: STQF_R - %f18, [%r20, %r31]
9456 ba,a .+8
9457 jmpl %r27+0, %r27
9458 .word 0xe4dfc029 ! 79: LDXA_R ldxa [%r31, %r9] 0x01, %r18
9459mondo_8_62:
9460 nop
9461 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
9462 ta T_CHANGE_PRIV
9463 stxa %r16, [%r0+0x3e0] %asi
9464 .word 0x9d94c011 ! 80: WRPR_WSTATE_R wrpr %r19, %r17, %wstate
9465 nop
9466 mov 0x80, %g3
9467 stxa %r14, [%r0] ASI_LSU_CONTROL
9468 stxa %g3, [%g3] 0x5f
9469 .word 0xe45fc000 ! 81: LDX_R ldx [%r31 + %r0], %r18
9470 set 0x1f2c, %l3
9471 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
9472 .word 0x93b347ca ! 82: PDIST pdistn %d44, %d10, %d40
9473 fbuge,a,pn %fcc0, skip_8_63
9474 stxa %r13, [%r0] ASI_LSU_CONTROL
9475 .word 0xc36ceddb ! 1: PREFETCH_I prefetch [%r19 + 0x0ddb], #one_read
9476 stxa %r11, [%r0] ASI_LSU_CONTROL
9477.align 32
9478skip_8_63:
9479 .word 0xd3e7c020 ! 83: CASA_I casa [%r31] 0x 1, %r0, %r9
9480 .word 0x93a00166 ! 84: FABSq dis not found
9481
9482 nop
9483 ta T_CHANGE_HPRIV
9484 mov 0x8+1, %r10
9485 set sync_thr_counter5, %r23
9486#ifndef SPC
9487 ldxa [%g0]0x63, %o1
9488 and %o1, 0x38, %o1
9489 add %o1, %r23, %r23
9490 sllx %o1, 5, %o3 !(CID*256)
9491#endif
9492 cas [%r23],%g0,%r10 !lock
9493 brnz %r10, cwq_8_65
9494 rd %asi, %r12
9495 wr %g0, 0x40, %asi
9496 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
9497 and %l1, 0x3, %l1 ! Check if busy/enabled ..
9498 cmp %l1, 1
9499 bne cwq_8_65
9500 set CWQ_BASE, %l6
9501#ifndef SPC
9502 add %l6, %o3, %l6
9503#endif
9504 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
9505 best_set_reg(0x20610010, %l1, %l2) !# Control Word
9506 sllx %l2, 32, %l2
9507 stx %l2, [%l6 + 0x0]
9508 membar #Sync
9509 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
9510 sub %l2, 0x40, %l2
9511 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
9512 wr %r12, %g0, %asi
9513 st %g0, [%r23]
9514cwq_8_65:
9515 ta T_CHANGE_NONHPRIV
9516 .word 0x95414000 ! 85: RDPC rd %pc, %r10
9517 .word 0xa7450000 ! 86: RD_SET_SOFTINT rd %set_softint, %r19
9518brcommon1_8_66:
9519 nop
9520 setx common_target, %r12, %r27
9521 lduw [%r27], %r12 ! Load common dest into dcache ..
9522 ba,a .+12
9523 .word 0x93b7c7cc ! 1: PDIST pdistn %d62, %d12, %d40
9524 ba,a .+8
9525 jmpl %r27+0, %r27
9526 .word 0xa1703688 ! 87: POPC_I popc 0x1688, %r16
9527pmu_8_67:
9528 nop
9529 setx 0xffffffb4ffffffa1, %g1, %g7
9530 .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %-
9531#if (defined SPC || defined CMP)
9532!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_68)+24, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1)
9533!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_68)&0xffffffff) + 56, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1)
9534xir_8_68:
9535#else
9536#if (defined FC)
9537!! Generate XIR via RESET_GEN register
9538 ta T_CHANGE_HPRIV
9539 rdpr %pstate, %r18
9540 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
9541 wrpr %r18, %pstate
9542#ifndef XIR_RND_CORES
9543 ldxa [%g0] 0x63, %o1
9544 mov 1, %r18
9545 sllx %r18, %o1, %r18
9546#endif
9547 mov 0x30, %r19
9548 setx 0x8900000808, %r16, %r17
9549 mov 0x2, %r16
9550xir_8_68:
9551 stxa %r18, [%r19] 0x41
9552 stx %r16, [%r17]
9553#endif
9554#endif
9555 .word 0xa9807534 ! 89: WR_SET_SOFTINT_I wr %r1, 0x1534, %set_softint
9556 rd %tick, %r28
9557#if (MAX_THREADS == 8)
9558 sethi %hi(0x33800), %r27
9559#else
9560 sethi %hi(0x30000), %r27
9561#endif
9562 andn %r28, %r27, %r28
9563 ta T_CHANGE_HPRIV
9564 stxa %r28, [%g0] 0x73
9565intvec_8_69:
9566 .word 0x39400001 ! 90: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
9567fpinit_8_70:
9568 nop
9569 setx fp_data_quads, %r19, %r20
9570 ldd [%r20], %f0
9571 ldd [%r20+8], %f4
9572 ld [%r20+16], %fsr
9573 ld [%r20+24], %r19
9574 wr %r19, %g0, %gsr
9575 .word 0x89b00484 ! 91: FCMPLE32 fcmple32 %d0, %d4, %r4
9576mondo_8_71:
9577 nop
9578 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
9579 ta T_CHANGE_PRIV
9580 stxa %r6, [%r0+0x3d8] %asi
9581 .word 0x9d92c013 ! 92: WRPR_WSTATE_R wrpr %r11, %r19, %wstate
9582 .word 0x8d903991 ! 93: WRPR_PSTATE_I wrpr %r0, 0x1991, %pstate
9583 .word 0x8d802004 ! 94: WRFPRS_I wr %r0, 0x0004, %fprs
9584 nop
9585 ta T_CHANGE_HPRIV
9586 mov 0x8, %r10
9587 set sync_thr_counter6, %r23
9588#ifndef SPC
9589 ldxa [%g0]0x63, %o1
9590 and %o1, 0x38, %o1
9591 add %o1, %r23, %r23
9592#endif
9593 cas [%r23],%g0,%r10 !lock
9594 brnz %r10, sma_8_73
9595 rd %asi, %r12
9596 wr %g0, 0x40, %asi
9597 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
9598 set 0x00121fff, %g1
9599 stxa %g1, [%g0 + 0x80] %asi
9600 wr %r12, %g0, %asi
9601 st %g0, [%r23]
9602sma_8_73:
9603 ta T_CHANGE_NONHPRIV
9604 .word 0xd1e7e009 ! 95: CASA_R casa [%r31] %asi, %r9, %r8
9605ibp_8_74:
9606 nop
9607 ta T_CHANGE_NONHPRIV
9608 .word 0xa5a349c2 ! 96: FDIVd fdivd %f44, %f2, %f18
9609 .word 0xa3a249d2 ! 97: FDIVd fdivd %f40, %f18, %f48
9610trapasi_8_76:
9611 nop
9612 mov 0x20, %r1 ! (VA for ASI 0x5a)
9613 .word 0xd8c84b40 ! 98: LDSBA_R ldsba [%r1, %r0] 0x5a, %r12
9614 .word 0x81460000 ! 99: RD_STICK_REG stbar
9615jmptr_8_77:
9616 nop
9617 best_set_reg(0xe1a00000, %r20, %r27)
9618 .word 0xb7c6c000 ! 100: JMPL_R jmpl %r27 + %r0, %r27
9619pmu_8_78:
9620 nop
9621 ta T_CHANGE_PRIV
9622 setx 0xffffffbfffffffa8, %g1, %g7
9623 .word 0xa3800007 ! 101: WR_PERF_COUNTER_R wr %r0, %r7, %-
9624memptr_8_79:
9625 set 0x60140000, %r31
9626 .word 0x8584776b ! 102: WRCCR_I wr %r17, 0x176b, %ccr
9627 .word 0xd8cfe128 ! 103: LDSBA_I ldsba [%r31, + 0x0128] %asi, %r12
9628change_to_randtl_8_80:
9629 ta T_CHANGE_PRIV ! macro
9630done_change_to_randtl_8_80:
9631 .word 0x8f902000 ! 104: WRPR_TL_I wrpr %r0, 0x0000, %tl
9632pmu_8_81:
9633 nop
9634 setx 0xffffffbaffffffa4, %g1, %g7
9635 .word 0xa3800007 ! 105: WR_PERF_COUNTER_R wr %r0, %r7, %-
9636splash_lsu_8_82:
9637 nop
9638 ta T_CHANGE_HPRIV
9639 set 0xc71b9ccd, %r2
9640 mov 0x1, %r1
9641 sllx %r1, 32, %r1
9642 or %r1, %r2, %r2
9643 .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1>
9644 stxa %r2, [%r0] ASI_LSU_CONTROL
9645 .word 0x3d400001 ! 106: FBPULE fbule,a,pn %fcc0, <label_0x1>
9646 .word 0xd8cfe0a0 ! 107: LDSBA_I ldsba [%r31, + 0x00a0] %asi, %r12
9647 .word 0x9f803dca ! 108: SIR sir 0x1dca
9648 .word 0xd8dfe190 ! 109: LDXA_I ldxa [%r31, + 0x0190] %asi, %r12
9649 .word 0x87802016 ! 110: WRASI_I wr %r0, 0x0016, %asi
9650mondo_8_83:
9651 nop
9652 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
9653 stxa %r20, [%r0+0x3d0] %asi
9654 .word 0x9d948013 ! 111: WRPR_WSTATE_R wrpr %r18, %r19, %wstate
9655 .word 0x81460000 ! 112: RD_STICK_REG stbar
9656vahole1_8_84:
9657 nop
9658 ta T_CHANGE_NONHPRIV
9659 setx vahole_target1, %r18, %r27
9660 jmpl %r27+0, %r27
9661 .word 0xa1b507d2 ! 113: PDIST pdistn %d20, %d18, %d16
9662 nop
9663 ta T_CHANGE_HPRIV
9664 mov 0x8+1, %r10
9665 set sync_thr_counter5, %r23
9666#ifndef SPC
9667 ldxa [%g0]0x63, %o1
9668 and %o1, 0x38, %o1
9669 add %o1, %r23, %r23
9670 sllx %o1, 5, %o3 !(CID*256)
9671#endif
9672 cas [%r23],%g0,%r10 !lock
9673 brnz %r10, cwq_8_85
9674 rd %asi, %r12
9675 wr %g0, 0x40, %asi
9676 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
9677 and %l1, 0x3, %l1 ! Check if busy/enabled ..
9678 cmp %l1, 1
9679 bne cwq_8_85
9680 set CWQ_BASE, %l6
9681#ifndef SPC
9682 add %l6, %o3, %l6
9683#endif
9684 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
9685 best_set_reg(0x206100c0, %l1, %l2) !# Control Word
9686 sllx %l2, 32, %l2
9687 stx %l2, [%l6 + 0x0]
9688 membar #Sync
9689 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
9690 sub %l2, 0x40, %l2
9691 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
9692 wr %r12, %g0, %asi
9693 st %g0, [%r23]
9694cwq_8_85:
9695 ta T_CHANGE_NONHPRIV
9696 .word 0xa9414000 ! 114: RDPC rd %pc, %r20
9697#if (defined SPC || defined CMP1)
9698!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_86) + 16, 16, 16)) -> intp(2,0,15,,,,,1)
9699!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_86)&0xffffffff) + 48, 16, 16)) -> intp(5,0,19,,,,,1)
9700#else
9701 set 0x571017e1, %r28
9702#if (MAX_THREADS == 8)
9703 and %r28, 0x7ff, %r28
9704#endif
9705 stxa %r28, [%g0] 0x73
9706#endif
9707intvec_8_86:
9708 .word 0x39400001 ! 115: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
9709pmu_8_87:
9710 nop
9711 setx 0xffffffbcffffffad, %g1, %g7
9712 .word 0xa3800007 ! 116: WR_PERF_COUNTER_R wr %r0, %r7, %-
9713trapasi_8_88:
9714 nop
9715 mov 0x10, %r1 ! (VA for ASI 0x49)
9716 .word 0xd8884920 ! 117: LDUBA_R lduba [%r1, %r0] 0x49, %r12
9717 .word 0xa7450000 ! 118: RD_SET_SOFTINT rd %set_softint, %r19
9718fpinit_8_89:
9719 nop
9720 setx fp_data_quads, %r19, %r20
9721 ldd [%r20], %f0
9722 ldd [%r20+8], %f4
9723 ld [%r20+16], %fsr
9724 ld [%r20+24], %r19
9725 wr %r19, %g0, %gsr
9726 .word 0x89a009a4 ! 119: FDIVs fdivs %f0, %f4, %f4
9727 .word 0x9f8026dc ! 120: SIR sir 0x06dc
9728 nop
9729 ta T_CHANGE_HPRIV ! macro
9730donret_8_90:
9731 rd %pc, %r12
9732 mov HIGHVA_HIGHNUM, %r10
9733 sllx %r10, 32, %r10
9734 or %r12, %r10, %r12
9735 add %r12, (donretarg_8_90-donret_8_90+4), %r12
9736 add %r12, 0x4, %r11 ! seq tnpc
9737 wrpr %g0, 0x2, %tl
9738 wrpr %g0, %r12, %tpc
9739 wrpr %g0, %r11, %tnpc
9740 set (0x0093a300 | (20 << 24)), %r13
9741 and %r12, 0xfff, %r14
9742 sllx %r14, 30, %r14
9743 or %r13, %r14, %r20
9744 wrpr %r20, %g0, %tstate
9745 wrhpr %g0, 0x1647, %htstate
9746 ta T_CHANGE_NONPRIV ! rand=0 (8)
9747 retry
9748.align 32
9749donretarg_8_90:
9750 .word 0xe66fe026 ! 121: LDSTUB_I ldstub %r19, [%r31 + 0x0026]
9751 .word 0x9f8036d6 ! 122: SIR sir 0x16d6
9752splash_htba_8_91:
9753 nop
9754 ta T_CHANGE_HPRIV
9755 setx 0x00000000002a0000, %r11, %r12
9756 .word 0x8b98000c ! 123: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
9757 nop
9758 ta T_CHANGE_HPRIV
9759 mov 0x8+1, %r10
9760 set sync_thr_counter5, %r23
9761#ifndef SPC
9762 ldxa [%g0]0x63, %o1
9763 and %o1, 0x38, %o1
9764 add %o1, %r23, %r23
9765 sllx %o1, 5, %o3 !(CID*256)
9766#endif
9767 cas [%r23],%g0,%r10 !lock
9768 brnz %r10, cwq_8_92
9769 rd %asi, %r12
9770 wr %g0, 0x40, %asi
9771 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
9772 and %l1, 0x3, %l1 ! Check if busy/enabled ..
9773 cmp %l1, 1
9774 bne cwq_8_92
9775 set CWQ_BASE, %l6
9776#ifndef SPC
9777 add %l6, %o3, %l6
9778#endif
9779 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
9780 best_set_reg(0x206100f0, %l1, %l2) !# Control Word
9781 sllx %l2, 32, %l2
9782 stx %l2, [%l6 + 0x0]
9783 membar #Sync
9784 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
9785 sub %l2, 0x40, %l2
9786 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
9787 wr %r12, %g0, %asi
9788 st %g0, [%r23]
9789cwq_8_92:
9790 ta T_CHANGE_NONHPRIV
9791 .word 0xa3414000 ! 124: RDPC rd %pc, %r17
9792 rd %tick, %r28
9793#if (MAX_THREADS == 8)
9794 sethi %hi(0x33800), %r27
9795#else
9796 sethi %hi(0x30000), %r27
9797#endif
9798 andn %r28, %r27, %r28
9799 ta T_CHANGE_HPRIV
9800 stxa %r28, [%g0] 0x73
9801intvec_8_93:
9802 .word 0x39400001 ! 125: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
9803 .word 0x8d802004 ! 126: WRFPRS_I wr %r0, 0x0004, %fprs
9804 .word 0xc3e90032 ! 127: PREFETCHA_R prefetcha [%r4, %r18] 0x01, #one_read
9805 .word 0xa9b0c7cb ! 128: PDIST pdistn %d34, %d42, %d20
9806 fblg,a,pn %fcc0, skip_8_96
9807 brlez,a,pt %r4, skip_8_96
9808.align 2048
9809skip_8_96:
9810 .word 0x87ac8a53 ! 129: FCMPd fcmpd %fcc<n>, %f18, %f50
9811 .word 0xe88008a0 ! 130: LDUWA_R lduwa [%r0, %r0] 0x45, %r20
9812intveclr_8_97:
9813 nop
9814 ta T_CHANGE_HPRIV
9815 setx 0x253b0c7acd5feda8, %r1, %r28
9816 stxa %r28, [%g0] 0x72
9817 .word 0x25400001 ! 131: FBPLG fblg,a,pn %fcc0, <label_0x1>
9818splash_hpstate_8_98:
9819 .word 0x81983787 ! 132: WRHPR_HPSTATE_I wrhpr %r0, 0x1787, %hpstate
9820trapasi_8_99:
9821 nop
9822 mov 0x0, %r1 ! (VA for ASI 0x72)
9823 .word 0xe8c84e40 ! 133: LDSBA_R ldsba [%r1, %r0] 0x72, %r20
9824#if (defined SPC || defined CMP)
9825!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_100)+8, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1)
9826!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_100)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1)
9827xir_8_100:
9828#else
9829#if (defined FC)
9830!! Generate XIR via RESET_GEN register
9831 ta T_CHANGE_HPRIV
9832 rdpr %pstate, %r18
9833 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
9834 wrpr %r18, %pstate
9835#ifndef XIR_RND_CORES
9836 ldxa [%g0] 0x63, %o1
9837 mov 1, %r18
9838 sllx %r18, %o1, %r18
9839#endif
9840 mov 0x30, %r19
9841 setx 0x8900000808, %r16, %r17
9842 mov 0x2, %r16
9843xir_8_100:
9844 stxa %r18, [%r19] 0x41
9845 stx %r16, [%r17]
9846#endif
9847#endif
9848 .word 0xa9826a11 ! 134: WR_SET_SOFTINT_I wr %r9, 0x0a11, %set_softint
9849intveclr_8_101:
9850 nop
9851 ta T_CHANGE_HPRIV
9852 setx 0x8a8b0839830a1c10, %r1, %r28
9853 stxa %r28, [%g0] 0x72
9854 ta T_CHANGE_NONHPRIV
9855 .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, <label_0x1>
9856intveclr_8_102:
9857 nop
9858 ta T_CHANGE_HPRIV
9859 setx 0x7ba4886c73c8be71, %r1, %r28
9860 stxa %r28, [%g0] 0x72
9861 .word 0x25400001 ! 136: FBPLG fblg,a,pn %fcc0, <label_0x1>
9862 nop
9863 ta T_CHANGE_HPRIV ! macro
9864donret_8_103:
9865 rd %pc, %r12
9866 mov HIGHVA_HIGHNUM, %r10
9867 sllx %r10, 32, %r10
9868 or %r12, %r10, %r12
9869 add %r12, (donretarg_8_103-donret_8_103), %r12
9870 add %r12, 0x8, %r11 ! nonseq tnpc
9871 wrpr %g0, 0x1, %tl
9872 wrpr %g0, %r12, %tpc
9873 wrpr %g0, %r11, %tnpc
9874 set (0x00aa7100 | (54 << 24)), %r13
9875 and %r12, 0xfff, %r14
9876 sllx %r14, 30, %r14
9877 or %r13, %r14, %r20
9878 wrpr %r20, %g0, %tstate
9879 wrhpr %g0, 0x1c11, %htstate
9880 ta T_CHANGE_NONPRIV ! rand=0 (8)
9881 ldx [%r11+%r0], %g1
9882 done
9883donretarg_8_103:
9884 .word 0xe86fe0eb ! 137: LDSTUB_I ldstub %r20, [%r31 + 0x00eb]
9885ibp_8_104:
9886 nop
9887 .word 0xc1bfe080 ! 138: STDFA_I stda %f0, [0x0080, %r31]
9888 nop
9889 ta T_CHANGE_HPRIV
9890 mov 0x8, %r10
9891 set sync_thr_counter6, %r23
9892#ifndef SPC
9893 ldxa [%g0]0x63, %o1
9894 and %o1, 0x38, %o1
9895 add %o1, %r23, %r23
9896#endif
9897 cas [%r23],%g0,%r10 !lock
9898 brnz %r10, sma_8_105
9899 rd %asi, %r12
9900 wr %g0, 0x40, %asi
9901 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
9902 set 0x00161fff, %g1
9903 stxa %g1, [%g0 + 0x80] %asi
9904 wr %r12, %g0, %asi
9905 st %g0, [%r23]
9906sma_8_105:
9907 ta T_CHANGE_NONHPRIV
9908 .word 0xe9e7e00c ! 139: CASA_R casa [%r31] %asi, %r12, %r20
9909splash_cmpr_8_106:
9910 mov 0, %r18
9911 sllx %r18, 63, %r18
9912 rd %tick, %r17
9913 add %r17, 0x100, %r17
9914 or %r17, %r18, %r17
9915 ta T_CHANGE_HPRIV
9916 wrhpr %r17, %g0, %hsys_tick_cmpr
9917 .word 0xaf800011 ! 140: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
9918 .word 0xe83fe0c0 ! 141: STD_I std %r20, [%r31 + 0x00c0]
9919 .word 0x93d020b4 ! 142: Tcc_I tne icc_or_xcc, %r0 + 180
9920splash_hpstate_8_108:
9921 ta T_CHANGE_NONHPRIV
9922 .word 0x81983e67 ! 143: WRHPR_HPSTATE_I wrhpr %r0, 0x1e67, %hpstate
9923dvapa_8_109:
9924 nop
9925 ta T_CHANGE_HPRIV
9926 mov 0x9f2, %r20
9927 mov 0x3, %r19
9928 sllx %r20, 23, %r20
9929 or %r19, %r20, %r19
9930 stxa %r19, [%g0] ASI_LSU_CONTROL
9931 mov 0x38, %r18
9932 stxa %r31, [%r18]0x58
9933 ta T_CHANGE_NONHPRIV
9934 .word 0x97702c2d ! 144: POPC_I popc 0x0c2d, %r11
9935 .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
9936 .word 0x8d903b83 ! 145: WRPR_PSTATE_I wrpr %r0, 0x1b83, %pstate
9937memptr_8_111:
9938 set user_data_start, %r31
9939 .word 0x8582f8ee ! 146: WRCCR_I wr %r11, 0x18ee, %ccr
9940ceter_8_112:
9941 nop
9942 ta T_CHANGE_HPRIV
9943 mov 7, %r17
9944 sllx %r17, 60, %r17
9945 mov 0x18, %r16
9946 stxa %r17, [%r16]0x4c
9947 ta T_CHANGE_NONHPRIV
9948 .word 0xa1410000 ! 147: RDTICK rd %tick, %r16
9949 nop
9950 ta T_CHANGE_HPRIV ! macro
9951donret_8_113:
9952 rd %pc, %r12
9953 mov HIGHVA_HIGHNUM, %r10
9954 sllx %r10, 32, %r10
9955 or %r12, %r10, %r12
9956 add %r12, (donretarg_8_113-donret_8_113+4), %r12
9957 add %r12, 0x4, %r11 ! seq tnpc
9958 andn %r11, %r10, %r11 ! low VA tnpc
9959 wrpr %g0, 0x1, %tl
9960 wrpr %g0, %r12, %tpc
9961 wrpr %g0, %r11, %tnpc
9962 set (0x00cdb300 | (0x80 << 24)), %r13
9963 and %r12, 0xfff, %r14
9964 sllx %r14, 30, %r14
9965 or %r13, %r14, %r20
9966 wrpr %r20, %g0, %tstate
9967 wrhpr %g0, 0x1b52, %htstate
9968 ta T_CHANGE_NONHPRIV ! rand=1 (8)
9969 ldx [%r11+%r0], %g1
9970 done
9971donretarg_8_113:
9972 .word 0xe6ffe029 ! 148: SWAPA_I swapa %r19, [%r31 + 0x0029] %asi
9973splash_tba_8_114:
9974 nop
9975 ta T_CHANGE_PRIV
9976 setx 0x00000000003a0000, %r11, %r12
9977 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba
9978splash_htba_8_115:
9979 nop
9980 ta T_CHANGE_HPRIV
9981 setx 0x00000000002a0000, %r11, %r12
9982 .word 0x8b98000c ! 150: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
9983fpinit_8_116:
9984 nop
9985 setx fp_data_quads, %r19, %r20
9986 ldd [%r20], %f0
9987 ldd [%r20+8], %f4
9988 ld [%r20+16], %fsr
9989 ld [%r20+24], %r19
9990 wr %r19, %g0, %gsr
9991 .word 0x8da009c4 ! 151: FDIVd fdivd %f0, %f4, %f6
9992tagged_8_117:
9993 taddcctv %r19, 0x15f3, %r17
9994 .word 0xe607e136 ! 152: LDUW_I lduw [%r31 + 0x0136], %r19
9995#if (defined SPC || defined CMP)
9996!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_118)+48, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1)
9997!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_118)&0xffffffff) + 48, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1)
9998xir_8_118:
9999#else
10000#if (defined FC)
10001!! Generate XIR via RESET_GEN register
10002 ta T_CHANGE_HPRIV
10003 rdpr %pstate, %r18
10004 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
10005 wrpr %r18, %pstate
10006#ifndef XIR_RND_CORES
10007 ldxa [%g0] 0x63, %o1
10008 mov 1, %r18
10009 sllx %r18, %o1, %r18
10010#endif
10011 mov 0x30, %r19
10012 setx 0x8900000808, %r16, %r17
10013 mov 0x2, %r16
10014xir_8_118:
10015 stxa %r18, [%r19] 0x41
10016 stx %r16, [%r17]
10017#endif
10018#endif
10019 .word 0xa98220db ! 153: WR_SET_SOFTINT_I wr %r8, 0x00db, %set_softint
10020 .word 0x89800011 ! 154: WRTICK_R wr %r0, %r17, %tick
10021mondo_8_120:
10022 nop
10023 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
10024 stxa %r1, [%r0+0x3d8] %asi
10025 .word 0x9d944012 ! 155: WRPR_WSTATE_R wrpr %r17, %r18, %wstate
10026 .word 0xe737c000 ! 156: STQF_R - %f19, [%r0, %r31]
10027 .word 0x8780204f ! 157: WRASI_I wr %r0, 0x004f, %asi
10028 .word 0xa06ab5b8 ! 158: UDIVX_I udivx %r10, 0xfffff5b8, %r16
10029splash_cmpr_8_121:
10030 mov 0, %r18
10031 sllx %r18, 63, %r18
10032 rd %tick, %r17
10033 add %r17, 0x100, %r17
10034 or %r17, %r18, %r17
10035 .word 0xb3800011 ! 159: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
10036 nop
10037 ta T_CHANGE_HPRIV ! macro
10038donret_8_122:
10039 rd %pc, %r12
10040 mov HIGHVA_HIGHNUM, %r10
10041 sllx %r10, 32, %r10
10042 or %r12, %r10, %r12
10043 add %r12, (donretarg_8_122-donret_8_122), %r12
10044 add %r12, 0x4, %r11 ! seq tnpc
10045 andn %r11, %r10, %r11 ! low VA tnpc
10046 wrpr %g0, 0x2, %tl
10047 wrpr %g0, %r12, %tpc
10048 wrpr %g0, %r11, %tnpc
10049 set (0x00224600 | (0x82 << 24)), %r13
10050 and %r12, 0xfff, %r14
10051 sllx %r14, 30, %r14
10052 or %r13, %r14, %r20
10053 wrpr %r20, %g0, %tstate
10054 wrhpr %g0, 0x1ddf, %htstate
10055 ta T_CHANGE_NONPRIV ! rand=0 (8)
10056 ldx [%r12+%r0], %g1
10057 retry
10058donretarg_8_122:
10059 .word 0xa5a409d4 ! 160: FDIVd fdivd %f16, %f20, %f18
10060pmu_8_123:
10061 nop
10062 setx 0xffffffbeffffffa8, %g1, %g7
10063 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
10064splash_tba_8_124:
10065 nop
10066 ta T_CHANGE_PRIV
10067 set 0x120000, %r12
10068 .word 0x8b90000c ! 162: WRPR_TBA_R wrpr %r0, %r12, %tba
10069mondo_8_125:
10070 nop
10071 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
10072 ta T_CHANGE_PRIV
10073 stxa %r12, [%r0+0x3d8] %asi
10074 .word 0x9d910013 ! 163: WRPR_WSTATE_R wrpr %r4, %r19, %wstate
10075 .word 0xa190200b ! 164: WRPR_GL_I wrpr %r0, 0x000b, %-
10076trapasi_8_126:
10077 nop
10078 mov 0x8, %r1 ! (VA for ASI 0x5b)
10079 .word 0xdad04b60 ! 165: LDSHA_R ldsha [%r1, %r0] 0x5b, %r13
10080 .word 0x8d802004 ! 166: WRFPRS_I wr %r0, 0x0004, %fprs
10081splash_tba_8_127:
10082 nop
10083 ta T_CHANGE_PRIV
10084 setx 0x00000000003a0000, %r11, %r12
10085 .word 0x8b90000c ! 167: WRPR_TBA_R wrpr %r0, %r12, %tba
10086 invalw
10087 mov 0xb4, %r30
10088 .word 0x91d0001e ! 168: Tcc_R ta icc_or_xcc, %r0 + %r30
10089 nop
10090 ta T_CHANGE_HPRIV
10091 mov 0x8, %r10
10092 set sync_thr_counter6, %r23
10093#ifndef SPC
10094 ldxa [%g0]0x63, %o1
10095 and %o1, 0x38, %o1
10096 add %o1, %r23, %r23
10097#endif
10098 cas [%r23],%g0,%r10 !lock
10099 brnz %r10, sma_8_128
10100 rd %asi, %r12
10101 wr %g0, 0x40, %asi
10102 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
10103 set 0x00121fff, %g1
10104 stxa %g1, [%g0 + 0x80] %asi
10105 wr %r12, %g0, %asi
10106 st %g0, [%r23]
10107sma_8_128:
10108 ta T_CHANGE_NONHPRIV
10109 .word 0xdbe7e014 ! 169: CASA_R casa [%r31] %asi, %r20, %r13
10110 .word 0x9f8022e9 ! 170: SIR sir 0x02e9
10111 .word 0x8d9022c5 ! 171: WRPR_PSTATE_I wrpr %r0, 0x02c5, %pstate
10112ibp_8_130:
10113 nop
10114 ta T_CHANGE_NONHPRIV
10115 .word 0xe1bfe100 ! 172: STDFA_I stda %f16, [0x0100, %r31]
10116 .word 0x926c74d4 ! 173: UDIVX_I udivx %r17, 0xfffff4d4, %r9
10117 .word 0x956cc006 ! 174: SDIVX_R sdivx %r19, %r6, %r10
10118dvapa_8_131:
10119 nop
10120 ta T_CHANGE_HPRIV
10121 mov 0xbe4, %r20
10122 mov 0x1b, %r19
10123 sllx %r20, 23, %r20
10124 or %r19, %r20, %r19
10125 stxa %r19, [%g0] ASI_LSU_CONTROL
10126 mov 0x38, %r18
10127 stxa %r31, [%r18]0x58
10128 ta T_CHANGE_NONHPRIV
10129 .word 0xe11fc014 ! 175: LDDF_R ldd [%r31, %r20], %f16
10130 .word 0xa782e921 ! 176: WR_GRAPHICS_STATUS_REG_I wr %r11, 0x0921, %-
10131 nop
10132 ta T_CHANGE_HPRIV
10133 mov 0x8+1, %r10
10134 set sync_thr_counter5, %r23
10135#ifndef SPC
10136 ldxa [%g0]0x63, %o1
10137 and %o1, 0x38, %o1
10138 add %o1, %r23, %r23
10139 sllx %o1, 5, %o3 !(CID*256)
10140#endif
10141 cas [%r23],%g0,%r10 !lock
10142 brnz %r10, cwq_8_132
10143 rd %asi, %r12
10144 wr %g0, 0x40, %asi
10145 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
10146 and %l1, 0x3, %l1 ! Check if busy/enabled ..
10147 cmp %l1, 1
10148 bne cwq_8_132
10149 set CWQ_BASE, %l6
10150#ifndef SPC
10151 add %l6, %o3, %l6
10152#endif
10153 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
10154 best_set_reg(0x20610060, %l1, %l2) !# Control Word
10155 sllx %l2, 32, %l2
10156 stx %l2, [%l6 + 0x0]
10157 membar #Sync
10158 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
10159 sub %l2, 0x40, %l2
10160 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
10161 wr %r12, %g0, %asi
10162 st %g0, [%r23]
10163cwq_8_132:
10164 ta T_CHANGE_NONHPRIV
10165 .word 0xa5414000 ! 177: RDPC rd %pc, %r18
10166fpinit_8_133:
10167 nop
10168 setx fp_data_quads, %r19, %r20
10169 ldd [%r20], %f0
10170 ldd [%r20+8], %f4
10171 ld [%r20+16], %fsr
10172 ld [%r20+24], %r19
10173 wr %r19, %g0, %gsr
10174 .word 0xc3e83d17 ! 178: PREFETCHA_I prefetcha [%r0, + 0xfffffd17] %asi, #one_read
10175splash_lsu_8_134:
10176 nop
10177 ta T_CHANGE_HPRIV
10178 set 0xe9b4ad58, %r2
10179 mov 0x4, %r1
10180 sllx %r1, 32, %r1
10181 or %r1, %r2, %r2
10182 stxa %r2, [%r0] ASI_LSU_CONTROL
10183 ta T_CHANGE_NONHPRIV
10184 .word 0x3d400001 ! 179: FBPULE fbule,a,pn %fcc0, <label_0x1>
10185 .word 0x87802020 ! 180: WRASI_I wr %r0, 0x0020, %asi
10186#if (defined SPC || defined CMP)
10187!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_135)+40, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1)
10188!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_135)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1)
10189xir_8_135:
10190#else
10191#if (defined FC)
10192!! Generate XIR via RESET_GEN register
10193 ta T_CHANGE_HPRIV
10194 rdpr %pstate, %r18
10195 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
10196 wrpr %r18, %pstate
10197#ifndef XIR_RND_CORES
10198 ldxa [%g0] 0x63, %o1
10199 mov 1, %r18
10200 sllx %r18, %o1, %r18
10201#endif
10202 mov 0x30, %r19
10203 setx 0x8900000808, %r16, %r17
10204 mov 0x2, %r16
10205xir_8_135:
10206 stxa %r18, [%r19] 0x41
10207 stx %r16, [%r17]
10208#endif
10209#endif
10210 .word 0xa984fb8e ! 181: WR_SET_SOFTINT_I wr %r19, 0x1b8e, %set_softint
10211trapasi_8_136:
10212 nop
10213 mov 0x110, %r1 ! (VA for ASI 0x4a)
10214 .word 0xdac04940 ! 182: LDSWA_R ldswa [%r1, %r0] 0x4a, %r13
10215intveclr_8_137:
10216 nop
10217 ta T_CHANGE_HPRIV
10218 setx 0x80bbca91f87df313, %r1, %r28
10219 stxa %r28, [%g0] 0x72
10220 ta T_CHANGE_NONHPRIV
10221 .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1>
10222tagged_8_138:
10223 tsubcctv %r19, 0x1c97, %r16
10224 .word 0xda07e15d ! 184: LDUW_I lduw [%r31 + 0x015d], %r13
10225splash_hpstate_8_139:
10226 ta T_CHANGE_NONHPRIV
10227 .word 0x22cc0001 ! 1: BRZ brz,a,pt %r16,<label_0xc0001>
10228 .word 0x819828df ! 185: WRHPR_HPSTATE_I wrhpr %r0, 0x08df, %hpstate
10229 .word 0xda77c000 ! 186: STX_R stx %r13, [%r31 + %r0]
10230brcommon3_8_140:
10231 nop
10232 setx common_target, %r12, %r27
10233 lduw [%r27], %r12 ! Load common dest into dcache ..
10234 ba,a .+12
10235 .word 0xdb37e0a0 ! 1: STQF_I - %f13, [0x00a0, %r31]
10236 ba,a .+8
10237 jmpl %r27+0, %r27
10238 .word 0x81983a9d ! 187: WRHPR_HPSTATE_I wrhpr %r0, 0x1a9d, %hpstate
10239 otherw
10240 mov 0x34, %r30
10241 .word 0x93d0001e ! 188: Tcc_R tne icc_or_xcc, %r0 + %r30
10242ibp_8_141:
10243 nop
10244 .word 0xa97024ad ! 189: POPC_I popc 0x04ad, %r20
10245tagged_8_142:
10246 tsubcctv %r0, 0x1393, %r4
10247 .word 0xd807e0e4 ! 190: LDUW_I lduw [%r31 + 0x00e4], %r12
10248 .word 0x8780204f ! 191: WRASI_I wr %r0, 0x004f, %asi
10249intveclr_8_143:
10250 nop
10251 ta T_CHANGE_HPRIV
10252 setx 0x82de610cf4b33840, %r1, %r28
10253 stxa %r28, [%g0] 0x72
10254 ta T_CHANGE_NONHPRIV
10255 .word 0x25400001 ! 192: FBPLG fblg,a,pn %fcc0, <label_0x1>
10256#if (defined SPC || defined CMP1)
10257!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_144) + 16, 16, 16)) -> intp(1,0,17,,,,,1)
10258!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_144)&0xffffffff) + 48, 16, 16)) -> intp(3,0,16,,,,,1)
10259#else
10260 set 0xc840f9d9, %r28
10261#if (MAX_THREADS == 8)
10262 and %r28, 0x7ff, %r28
10263#endif
10264 stxa %r28, [%g0] 0x73
10265#endif
10266intvec_8_144:
10267 .word 0x39400001 ! 193: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
10268 .word 0x8780204f ! 194: WRASI_I wr %r0, 0x004f, %asi
10269 .word 0x89800011 ! 195: WRTICK_R wr %r0, %r17, %tick
10270dvapa_8_146:
10271 nop
10272 ta T_CHANGE_HPRIV
10273 mov 0xc1e, %r20
10274 mov 0x8, %r19
10275 sllx %r20, 23, %r20
10276 or %r19, %r20, %r19
10277 stxa %r19, [%g0] ASI_LSU_CONTROL
10278 mov 0x38, %r18
10279 stxa %r31, [%r18]0x58
10280 ta T_CHANGE_NONHPRIV
10281 .word 0xc1bfe0e0 ! 196: STDFA_I stda %f0, [0x00e0, %r31]
10282splash_tba_8_147:
10283 nop
10284 ta T_CHANGE_PRIV
10285 setx 0x00000000003a0000, %r11, %r12
10286 .word 0x8b90000c ! 197: WRPR_TBA_R wrpr %r0, %r12, %tba
10287 .word 0xa4c42176 ! 198: ADDCcc_I addccc %r16, 0x0176, %r18
10288pmu_8_148:
10289 nop
10290 setx 0xffffffb6ffffffad, %g1, %g7
10291 .word 0xa3800007 ! 199: WR_PERF_COUNTER_R wr %r0, %r7, %-
10292ibp_8_149:
10293 nop
10294 ta T_CHANGE_NONHPRIV
10295 .word 0xe1bfe180 ! 200: STDFA_I stda %f16, [0x0180, %r31]
10296 nop
10297 nop
10298 ta T_CHANGE_PRIV
10299 wrpr %g0, %g0, %gl
10300 nop
10301 nop
10302.text
10303 setx join_lbl_0_0, %g1, %g2
10304 jmp %g2
10305 nop
10306fork_lbl_0_3:
10307setup_tick:
10308 setx 0xabb38513bafe24bf, %r1, %r17
10309 wrpr %g0, %r17, %tick
10310
10311 rd %asi, %r12
10312#ifdef XIR_RND_CORES
10313setup_xir_4:
10314 setx 0xc43a940b74a22bf6, %r1, %r28
10315 mov 0x30, %r17
10316 stxa %r28, [%r17] 0x41
10317#endif
10318setup_spu_4:
10319 wr %g0, 0x40, %asi
10320 !# allocate control word queue (e.g., setup head/tail/first/last registers)
10321 set CWQ_BASE, %l6
10322
10323#ifndef SPC
10324 ldxa [%g0]0x63, %o2
10325 and %o2, 0x38, %o2
10326 sllx %o2, 5, %o2 !(CID*256)
10327 add %l6, %o2, %l6
10328#endif
10329# 878 "diag.j"
10330 !# write base addr to first, head, and tail ptr
10331 !# first store to first
10332 stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi !# first store to first
10333
10334 stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi !# then to head
10335 stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# then to tail
10336 setx CWQ_LAST, %g1, %l5 !# then end of CWQ region to LAST
10337#ifndef SPC
10338 add %l5, %o2, %l5
10339#endif
10340 stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi
10341
10342 !# set CWQ control word ([39:37] is strand ID ..)
10343 best_set_reg(0x20610000, %l1, %l2) !# Control Word
10344 sllx %l2, 32, %l2
10345
10346 !# write CWQ entry (%l6 points to CWQ)
10347 stx %l2, [%l6 + 0x0]
10348
10349 setx msg, %g1, %l2
10350 stx %l2, [%l6 + 0x8] !# source address
10351
10352 stx %g0, [%l6 + 0x10] !# Authentication Key Address (40-bit)
10353 stx %g0, [%l6 + 0x18] !# Authentication IV Address (40-bit)
10354 stx %g0, [%l6 + 0x20] !# Authentication FSAS Address (40-bit)
10355 stx %g0, [%l6 + 0x28] !# Encryption Key Address (40-bit)
10356 stx %g0, [%l6 + 0x30] !# Encryption Initialization Vector Address (40-bit)
10357
10358 setx results, %g1, %o3
10359 stx %o3, [%l6 + 0x38] !# Destination Address (40-bit)
10360
10361 membar #Sync
10362
10363 ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2
10364 add %l2, 0x40, %l2
10365 stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi
10366
10367 !# Kick off the CWQ operation by writing to the CWQ_CSR
10368 !# Set the enabled bit and reset the other bits
10369 or %g0, 0x1, %g1
10370 stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi
10371
10372unlock_sync_thds_4:
10373 set sync_thr_counter6, %r23
10374#ifndef SPC
10375 ldxa [%g0]0x63, %o2
10376 and %o2, 0x38, %o2
10377 add %o2, %r23, %r23
10378#endif
10379 st %r0, [%r23] !unlock sync_thr_counter6
10380 sub %r23, 64, %r23
10381 st %r0, [%r23] !unlock sync_thr_counter5
10382 sub %r23, 64, %r23
10383 st %r0, [%r23] !unlock sync_thr_counter4
10384
10385 wr %r0, %r12, %asi
10386 ta T_CHANGE_NONHPRIV
10387ibp_4_1:
10388 nop
10389 .word 0xc1bfe060 ! 1: STDFA_I stda %f0, [0x0060, %r31]
10390splash_cmpr_4_2:
10391 mov 0, %r18
10392 sllx %r18, 63, %r18
10393 rd %tick, %r17
10394 add %r17, 0x100, %r17
10395 or %r17, %r18, %r17
10396 .word 0xaf800011 ! 2: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
10397mondo_4_3:
10398 nop
10399 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
10400 ta T_CHANGE_PRIV
10401 stxa %r19, [%r0+0x3c8] %asi
10402 .word 0x9d950002 ! 3: WRPR_WSTATE_R wrpr %r20, %r2, %wstate
10403 .word 0xc19fe120 ! 4: LDDFA_I ldda [%r31, 0x0120], %f0
10404 nop
10405 ta T_CHANGE_HPRIV
10406 mov 0x4+1, %r10
10407 set sync_thr_counter5, %r23
10408#ifndef SPC
10409 ldxa [%g0]0x63, %o1
10410 and %o1, 0x38, %o1
10411 add %o1, %r23, %r23
10412 sllx %o1, 5, %o3 !(CID*256)
10413#endif
10414 cas [%r23],%g0,%r10 !lock
10415 brnz %r10, cwq_4_4
10416 rd %asi, %r12
10417 wr %g0, 0x40, %asi
10418 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
10419 and %l1, 0x3, %l1 ! Check if busy/enabled ..
10420 cmp %l1, 1
10421 bne cwq_4_4
10422 set CWQ_BASE, %l6
10423#ifndef SPC
10424 add %l6, %o3, %l6
10425#endif
10426 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
10427 best_set_reg(0x20610000, %l1, %l2) !# Control Word
10428 sllx %l2, 32, %l2
10429 stx %l2, [%l6 + 0x0]
10430 membar #Sync
10431 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
10432 sub %l2, 0x40, %l2
10433 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
10434 wr %r12, %g0, %asi
10435 st %g0, [%r23]
10436cwq_4_4:
10437 ta T_CHANGE_NONHPRIV
10438 .word 0xa1414000 ! 5: RDPC rd %pc, %r16
10439 nop
10440 ta T_CHANGE_HPRIV ! macro
10441donret_4_5:
10442 rd %pc, %r12
10443 mov HIGHVA_HIGHNUM, %r10
10444 sllx %r10, 32, %r10
10445 or %r12, %r10, %r12
10446 add %r12, (donretarg_4_5-donret_4_5), %r12
10447 add %r12, 0x8, %r11 ! nonseq tnpc
10448 wrpr %g0, 0x2, %tl
10449 wrpr %g0, %r12, %tpc
10450 wrpr %g0, %r11, %tnpc
10451 set (0x008ca500 | (57 << 24)), %r13
10452 and %r12, 0xfff, %r14
10453 sllx %r14, 30, %r14
10454 or %r13, %r14, %r20
10455 wrpr %r20, %g0, %tstate
10456 wrhpr %g0, 0x1f5f, %htstate
10457 ta T_CHANGE_NONPRIV ! rand=0 (4)
10458 ldx [%r11+%r0], %g1
10459 done
10460donretarg_4_5:
10461 .word 0x8d903d8d ! 6: WRPR_PSTATE_I wrpr %r0, 0x1d8d, %pstate
10462 .word 0xe937e01e ! 7: STQF_I - %f20, [0x001e, %r31]
10463jmptr_4_6:
10464 nop
10465 best_set_reg(0xe1200000, %r20, %r27)
10466 .word 0xb7c6c000 ! 8: JMPL_R jmpl %r27 + %r0, %r27
10467 rd %tick, %r28
10468#if (MAX_THREADS == 8)
10469 sethi %hi(0x33800), %r27
10470#else
10471 sethi %hi(0x30000), %r27
10472#endif
10473 andn %r28, %r27, %r28
10474 ta T_CHANGE_HPRIV
10475 stxa %r28, [%g0] 0x73
10476intvec_4_7:
10477 .word 0x39400001 ! 9: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
10478 .word 0xa9b7c7d4 ! 1: PDIST pdistn %d62, %d20, %d20
10479 .word 0x9f80394a ! 10: SIR sir 0x194a
10480 .word 0x8d802000 ! 11: WRFPRS_I wr %r0, 0x0000, %fprs
10481trapasi_4_8:
10482 nop
10483 mov 0x8, %r1 ! (VA for ASI 0x48)
10484 .word 0xe8c84900 ! 12: LDSBA_R ldsba [%r1, %r0] 0x48, %r20
10485 .word 0xe81fe168 ! 13: LDD_I ldd [%r31 + 0x0168], %r20
10486 .word 0x28800001 ! 1: BLEU bleu,a <label_0x1>
10487 .word 0x8d903807 ! 14: WRPR_PSTATE_I wrpr %r0, 0x1807, %pstate
10488 nop
10489 ta T_CHANGE_HPRIV
10490 mov 0x4+1, %r10
10491 set sync_thr_counter5, %r23
10492#ifndef SPC
10493 ldxa [%g0]0x63, %o1
10494 and %o1, 0x38, %o1
10495 add %o1, %r23, %r23
10496 sllx %o1, 5, %o3 !(CID*256)
10497#endif
10498 cas [%r23],%g0,%r10 !lock
10499 brnz %r10, cwq_4_10
10500 rd %asi, %r12
10501 wr %g0, 0x40, %asi
10502 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
10503 and %l1, 0x3, %l1 ! Check if busy/enabled ..
10504 cmp %l1, 1
10505 bne cwq_4_10
10506 set CWQ_BASE, %l6
10507#ifndef SPC
10508 add %l6, %o3, %l6
10509#endif
10510 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
10511 best_set_reg(0x20610060, %l1, %l2) !# Control Word
10512 sllx %l2, 32, %l2
10513 stx %l2, [%l6 + 0x0]
10514 membar #Sync
10515 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
10516 sub %l2, 0x40, %l2
10517 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
10518 wr %r12, %g0, %asi
10519 st %g0, [%r23]
10520cwq_4_10:
10521 ta T_CHANGE_NONHPRIV
10522 .word 0x99414000 ! 15: RDPC rd %pc, %r12
10523brcommon2_4_11:
10524 nop
10525 setx common_target, %r12, %r27
10526 ba,a .+12
10527 .word 0x81dfc009 ! 1: FLUSH_R flush %r31, %r9, %r0
10528 ba,a .+8
10529 jmpl %r27+0, %r27
10530 .word 0xe1bfe020 ! 16: STDFA_I stda %f16, [0x0020, %r31]
10531jmptr_4_12:
10532 nop
10533 best_set_reg(0xe1200000, %r20, %r27)
10534 .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27
10535mondo_4_13:
10536 nop
10537 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
10538 ta T_CHANGE_PRIV
10539 stxa %r18, [%r0+0x3e8] %asi
10540 .word 0x9d948011 ! 18: WRPR_WSTATE_R wrpr %r18, %r17, %wstate
10541mondo_4_14:
10542 nop
10543 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
10544 stxa %r8, [%r0+0x3e8] %asi
10545 .word 0x9d930003 ! 19: WRPR_WSTATE_R wrpr %r12, %r3, %wstate
10546splash_cmpr_4_15:
10547 mov 0, %r18
10548 sllx %r18, 63, %r18
10549 rd %tick, %r17
10550 add %r17, 0x50, %r17
10551 or %r17, %r18, %r17
10552 ta T_CHANGE_HPRIV
10553 wrhpr %r17, %g0, %hsys_tick_cmpr
10554 .word 0xb3800011 ! 20: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
10555#if (defined SPC || defined CMP1)
10556!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_16) + 16, 16, 16)) -> intp(6,0,30,,,,,1)
10557!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_16)&0xffffffff) + 8, 16, 16)) -> intp(1,0,24,,,,,1)
10558#else
10559 set 0x5930db2e, %r28
10560#if (MAX_THREADS == 8)
10561 and %r28, 0x7ff, %r28
10562#endif
10563 stxa %r28, [%g0] 0x73
10564#endif
10565intvec_4_16:
10566 .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
10567 .word 0x81d8400b ! 22: FLUSH_R flush %r1, %r11, %r0
10568 .word 0x24ca8001 ! 1: BRLEZ brlez,a,pt %r10,<label_0xa8001>
10569 .word 0x8d902921 ! 23: WRPR_PSTATE_I wrpr %r0, 0x0921, %pstate
10570 .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl
10571reduce_priv_lvl_4_18:
10572 ta T_CHANGE_NONHPRIV ! macro
10573mondo_4_19:
10574 nop
10575 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
10576 stxa %r19, [%r0+0x3d0] %asi
10577 .word 0x9d940011 ! 25: WRPR_WSTATE_R wrpr %r16, %r17, %wstate
10578 .word 0x81510000 ! 26: RDPR_TICK rdpr %tick, %r0
10579 .word 0x879a27bf ! 27: WRHPR_HINTP_I wrhpr %r8, 0x07bf, %hintp
10580fpinit_4_20:
10581 nop
10582 setx fp_data_quads, %r19, %r20
10583 ldd [%r20], %f0
10584 ldd [%r20+8], %f4
10585 ld [%r20+16], %fsr
10586 ld [%r20+24], %r19
10587 wr %r19, %g0, %gsr
10588 .word 0x8db00484 ! 28: FCMPLE32 fcmple32 %d0, %d4, %r6
10589mondo_4_21:
10590 nop
10591 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
10592 stxa %r17, [%r0+0x3c8] %asi
10593 .word 0x9d910008 ! 29: WRPR_WSTATE_R wrpr %r4, %r8, %wstate
10594splash_hpstate_4_22:
10595 .word 0x81982687 ! 30: WRHPR_HPSTATE_I wrhpr %r0, 0x0687, %hpstate
10596splash_tba_4_23:
10597 nop
10598 ta T_CHANGE_PRIV
10599 setx 0x0000000400380000, %r11, %r12
10600 .word 0x8b90000c ! 31: WRPR_TBA_R wrpr %r0, %r12, %tba
10601trapasi_4_24:
10602 nop
10603 mov 0x110, %r1 ! (VA for ASI 0x4a)
10604 .word 0xe8c84940 ! 32: LDSBA_R ldsba [%r1, %r0] 0x4a, %r20
10605 rd %tick, %r28
10606#if (MAX_THREADS == 8)
10607 sethi %hi(0x33800), %r27
10608#else
10609 sethi %hi(0x30000), %r27
10610#endif
10611 andn %r28, %r27, %r28
10612 ta T_CHANGE_HPRIV
10613 stxa %r28, [%g0] 0x73
10614intvec_4_25:
10615 .word 0x39400001 ! 33: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
10616 nop
10617 ta T_CHANGE_HPRIV
10618 mov 0x4, %r10
10619 set sync_thr_counter6, %r23
10620#ifndef SPC
10621 ldxa [%g0]0x63, %o1
10622 and %o1, 0x38, %o1
10623 add %o1, %r23, %r23
10624#endif
10625 cas [%r23],%g0,%r10 !lock
10626 brnz %r10, sma_4_26
10627 rd %asi, %r12
10628 wr %g0, 0x40, %asi
10629 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
10630 set 0x00161fff, %g1
10631 stxa %g1, [%g0 + 0x80] %asi
10632 wr %r12, %g0, %asi
10633 st %g0, [%r23]
10634sma_4_26:
10635 ta T_CHANGE_NONHPRIV
10636 .word 0xe9e7e014 ! 34: CASA_R casa [%r31] %asi, %r20, %r20
10637 .word 0xe89fe1a8 ! 35: LDDA_I ldda [%r31, + 0x01a8] %asi, %r20
10638 nop
10639 ta T_CHANGE_HPRIV
10640 mov 0x4, %r10
10641 set sync_thr_counter6, %r23
10642#ifndef SPC
10643 ldxa [%g0]0x63, %o1
10644 and %o1, 0x38, %o1
10645 add %o1, %r23, %r23
10646#endif
10647 cas [%r23],%g0,%r10 !lock
10648 brnz %r10, sma_4_27
10649 rd %asi, %r12
10650 wr %g0, 0x40, %asi
10651 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
10652 set 0x001e1fff, %g1
10653 stxa %g1, [%g0 + 0x80] %asi
10654 wr %r12, %g0, %asi
10655 st %g0, [%r23]
10656sma_4_27:
10657 ta T_CHANGE_NONHPRIV
10658 .word 0xe9e7e013 ! 36: CASA_R casa [%r31] %asi, %r19, %r20
10659 nop
10660 ta T_CHANGE_HPRIV ! macro
10661donret_4_28:
10662 rd %pc, %r12
10663 mov HIGHVA_HIGHNUM, %r10
10664 sllx %r10, 32, %r10
10665 or %r12, %r10, %r12
10666 add %r12, (donretarg_4_28-donret_4_28), %r12
10667 add %r12, 0x4, %r11 ! seq tnpc
10668 andn %r11, %r10, %r11 ! low VA tnpc
10669 wrpr %g0, 0x2, %tl
10670 wrpr %g0, %r12, %tpc
10671 wrpr %g0, %r11, %tnpc
10672 set (0x00500f00 | (16 << 24)), %r13
10673 and %r12, 0xfff, %r14
10674 sllx %r14, 30, %r14
10675 or %r13, %r14, %r20
10676 wrpr %r20, %g0, %tstate
10677 wrhpr %g0, 0xcd6, %htstate
10678 ta T_CHANGE_NONHPRIV ! rand=1 (4)
10679 retry
10680donretarg_4_28:
10681 .word 0x27400001 ! 37: FBPUL fbul,a,pn %fcc0, <label_0x1>
10682brcommon2_4_29:
10683 nop
10684 setx common_target, %r12, %r27
10685 ba,a .+12
10686 .word 0xa9a7c969 ! 1: FMULq dis not found
10687
10688 ba,a .+8
10689 jmpl %r27+0, %r27
10690 .word 0xc19fe180 ! 38: LDDFA_I ldda [%r31, 0x0180], %f0
10691cmp_4_30:
10692 nop
10693 ta T_CHANGE_HPRIV
10694 rd %asi, %r12
10695 wr %r0, 0x41, %asi
10696 set sync_thr_counter4, %r23
10697#ifndef SPC
10698 ldxa [%g0]0x63, %r8
10699 and %r8, 0x38, %r8 ! Core ID
10700 add %r8, %r23, %r23
10701 mov 0xff, %r9
10702 xor %r9, 0x4, %r9
10703 sllx %r9, %r8, %r9 ! My core mask
10704#else
10705 mov 0, %r8
10706 mov 0xff, %r9
10707 xor %r9, 0x4, %r9 ! My core mask
10708#endif
10709 mov 0x4, %r10
10710cmp_startwait4_30:
10711 cas [%r23],%g0,%r10 !lock
10712 brz,a %r10, continue_cmp_4_30
10713 ldxa [0x50]%asi, %r13 !Running_rw
10714 ld [%r23], %r10
10715cmp_wait4_30:
10716 brnz,a %r10, cmp_wait4_30
10717 ld [%r23], %r10
10718 ba cmp_startwait4_30
10719 mov 0x4, %r10
10720continue_cmp_4_30:
10721 ldxa [0x58]%asi, %r14 !Running_status
10722 xnor %r14, %r13, %r14 !Bits equal
10723 brz,a %r8, cmp_multi_core_4_30
10724 mov 0xfb, %r17
10725 best_set_reg(0x3fdceff047d129fa, %r16, %r17)
10726cmp_multi_core_4_30:
10727 and %r14, %r17, %r14 !Apply set/clear mask to bits equal
10728 and %r14, %r9, %r14 !Apply core-mask
10729 stxa %r14, [0x60]%asi
10730 st %g0, [%r23] !clear lock
10731 wr %g0, %r12, %asi
10732 ta T_CHANGE_NONHPRIV
10733 .word 0x91948007 ! 39: WRPR_PIL_R wrpr %r18, %r7, %pil
10734 .word 0xd877e198 ! 40: STX_I stx %r12, [%r31 + 0x0198]
10735 nop
10736 ta T_CHANGE_HPRIV
10737 mov 0x4+1, %r10
10738 set sync_thr_counter5, %r23
10739#ifndef SPC
10740 ldxa [%g0]0x63, %o1
10741 and %o1, 0x38, %o1
10742 add %o1, %r23, %r23
10743 sllx %o1, 5, %o3 !(CID*256)
10744#endif
10745 cas [%r23],%g0,%r10 !lock
10746 brnz %r10, cwq_4_31
10747 rd %asi, %r12
10748 wr %g0, 0x40, %asi
10749 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
10750 and %l1, 0x3, %l1 ! Check if busy/enabled ..
10751 cmp %l1, 1
10752 bne cwq_4_31
10753 set CWQ_BASE, %l6
10754#ifndef SPC
10755 add %l6, %o3, %l6
10756#endif
10757 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
10758 best_set_reg(0x20610050, %l1, %l2) !# Control Word
10759 sllx %l2, 32, %l2
10760 stx %l2, [%l6 + 0x0]
10761 membar #Sync
10762 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
10763 sub %l2, 0x40, %l2
10764 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
10765 wr %r12, %g0, %asi
10766 st %g0, [%r23]
10767cwq_4_31:
10768 ta T_CHANGE_NONHPRIV
10769 .word 0x99414000 ! 41: RDPC rd %pc, %r12
10770 .word 0xe69fe1f0 ! 42: LDDA_I ldda [%r31, + 0x01f0] %asi, %r19
10771 nop
10772 ta T_CHANGE_HPRIV
10773 mov 0x4, %r10
10774 set sync_thr_counter6, %r23
10775#ifndef SPC
10776 ldxa [%g0]0x63, %o1
10777 and %o1, 0x38, %o1
10778 add %o1, %r23, %r23
10779#endif
10780 cas [%r23],%g0,%r10 !lock
10781 brnz %r10, sma_4_33
10782 rd %asi, %r12
10783 wr %g0, 0x40, %asi
10784 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
10785 set 0x00021fff, %g1
10786 stxa %g1, [%g0 + 0x80] %asi
10787 wr %r12, %g0, %asi
10788 st %g0, [%r23]
10789sma_4_33:
10790 ta T_CHANGE_NONHPRIV
10791 .word 0xe7e7e00b ! 43: CASA_R casa [%r31] %asi, %r11, %r19
10792 nop
10793 ta T_CHANGE_HPRIV ! macro
10794donret_4_34:
10795 rd %pc, %r12
10796 mov HIGHVA_HIGHNUM, %r10
10797 sllx %r10, 32, %r10
10798 or %r12, %r10, %r12
10799 add %r12, (donretarg_4_34-donret_4_34+4), %r12
10800 add %r12, 0x4, %r11 ! seq tnpc
10801 wrpr %g0, 0x2, %tl
10802 wrpr %g0, %r12, %tpc
10803 wrpr %g0, %r11, %tnpc
10804 set (0x00d61500 | (0x82 << 24)), %r13
10805 and %r12, 0xfff, %r14
10806 sllx %r14, 30, %r14
10807 or %r13, %r14, %r20
10808 wrpr %r20, %g0, %tstate
10809 wrhpr %g0, 0x149f, %htstate
10810 ta T_CHANGE_NONPRIV ! rand=0 (4)
10811 retry
10812donretarg_4_34:
10813 .word 0xe66fe0b9 ! 44: LDSTUB_I ldstub %r19, [%r31 + 0x00b9]
10814 nop
10815 mov 0x80, %g3
10816 .word 0x38800001 ! 1: BGU bgu,a <label_0x1>
10817 stxa %g3, [%g3] 0x57
10818 .word 0xe65fc000 ! 45: LDX_R ldx [%r31 + %r0], %r19
10819#if (defined SPC || defined CMP)
10820!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_35)+48, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
10821!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_35)&0xffffffff) + 8, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
10822xir_4_35:
10823#else
10824#if (defined FC)
10825!! Generate XIR via RESET_GEN register
10826 ta T_CHANGE_HPRIV
10827 rdpr %pstate, %r18
10828 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
10829 wrpr %r18, %pstate
10830#ifndef XIR_RND_CORES
10831 ldxa [%g0] 0x63, %o1
10832 mov 1, %r18
10833 sllx %r18, %o1, %r18
10834#endif
10835 mov 0x30, %r19
10836 setx 0x8900000808, %r16, %r17
10837 mov 0x2, %r16
10838xir_4_35:
10839 stxa %r18, [%r19] 0x41
10840 stx %r16, [%r17]
10841#endif
10842#endif
10843 .word 0xa98326e9 ! 46: WR_SET_SOFTINT_I wr %r12, 0x06e9, %set_softint
10844iaw_4_36:
10845 nop
10846 ta T_CHANGE_HPRIV
10847 mov 8, %r18
10848 rd %asi, %r12
10849 wr %r0, 0x41, %asi
10850 set sync_thr_counter4, %r23
10851#ifndef SPC
10852 ldxa [%g0]0x63, %r8
10853 and %r8, 0x38, %r8 ! Core ID
10854 add %r8, %r23, %r23
10855#else
10856 mov 0, %r8
10857#endif
10858 mov 0x4, %r16
10859iaw_startwait4_36:
10860 cas [%r23],%g0,%r16 !lock
10861 brz,a %r16, continue_iaw_4_36
10862 mov (~0x4&0xf), %r16
10863 ld [%r23], %r16
10864iaw_wait4_36:
10865 brnz %r16, iaw_wait4_36
10866 ld [%r23], %r16
10867 ba iaw_startwait4_36
10868 mov 0x4, %r16
10869continue_iaw_4_36:
10870 sllx %r16, %r8, %r16 !Mask for my core only
10871 ldxa [0x58]%asi, %r17 !Running_status
10872wait_for_stat_4_36:
10873 ldxa [0x50]%asi, %r13 !Running_rw
10874 cmp %r13, %r17
10875 bne,a %xcc, wait_for_stat_4_36
10876 ldxa [0x58]%asi, %r17 !Running_status
10877 stxa %r16, [0x68]%asi !Park (W1C)
10878 ldxa [0x50]%asi, %r14 !Running_rw
10879wait_for_iaw_4_36:
10880 ldxa [0x58]%asi, %r17 !Running_status
10881 cmp %r14, %r17
10882 bne,a %xcc, wait_for_iaw_4_36
10883 ldxa [0x50]%asi, %r14 !Running_rw
10884iaw_doit4_36:
10885 mov 0x38, %r18
10886iaw2_4_36:
10887 rdpr %tba, %r19
10888 mov 0x11, %r20
10889 sllx %r20, 5, %r20
10890 add %r20, %r19, %r19
10891 stxa %r19, [%r18]0x50
10892 stxa %r16, [0x60] %asi ! Unpark (W1S)
10893 st %g0, [%r23] !clear lock
10894 wr %r0, %r12, %asi ! restore %asi
10895 ta T_CHANGE_NONHPRIV
10896 .word 0xe697c02d ! 47: LDUHA_R lduha [%r31, %r13] 0x01, %r19
10897 nop
10898 ta T_CHANGE_HPRIV ! macro
10899donret_4_37:
10900 rd %pc, %r12
10901 mov HIGHVA_HIGHNUM, %r10
10902 sllx %r10, 32, %r10
10903 or %r12, %r10, %r12
10904 add %r12, (donretarg_4_37-donret_4_37+4), %r12
10905 add %r12, 0x4, %r11 ! seq tnpc
10906 andn %r12, %r10, %r12 ! low VA tpc
10907 wrpr %g0, 0x1, %tl
10908 wrpr %g0, %r12, %tpc
10909 wrpr %g0, %r11, %tnpc
10910 set (0x0004f900 | (0x89 << 24)), %r13
10911 and %r12, 0xfff, %r14
10912 sllx %r14, 30, %r14
10913 or %r13, %r14, %r20
10914 wrpr %r20, %g0, %tstate
10915 wrhpr %g0, 0x1007, %htstate
10916 ta T_CHANGE_NONPRIV ! rand=0 (4)
10917 ldx [%r11+%r0], %g1
10918 done
10919.align 32
10920donretarg_4_37:
10921 .word 0x8d902445 ! 48: WRPR_PSTATE_I wrpr %r0, 0x0445, %pstate
10922splash_tick_4_38:
10923 nop
10924 ta T_CHANGE_HPRIV
10925 best_set_reg(0x9fed72b4cd9d631c, %r16, %r17)
10926 .word 0x89800011 ! 49: WRTICK_R wr %r0, %r17, %tick
10927iaw_4_39:
10928 nop
10929 ta T_CHANGE_HPRIV
10930 mov 8, %r18
10931 rd %asi, %r12
10932 wr %r0, 0x41, %asi
10933 set sync_thr_counter4, %r23
10934#ifndef SPC
10935 ldxa [%g0]0x63, %r8
10936 and %r8, 0x38, %r8 ! Core ID
10937 add %r8, %r23, %r23
10938#else
10939 mov 0, %r8
10940#endif
10941 mov 0x4, %r16
10942iaw_startwait4_39:
10943 cas [%r23],%g0,%r16 !lock
10944 brz,a %r16, continue_iaw_4_39
10945 mov (~0x4&0xf), %r16
10946 ld [%r23], %r16
10947iaw_wait4_39:
10948 brnz %r16, iaw_wait4_39
10949 ld [%r23], %r16
10950 ba iaw_startwait4_39
10951 mov 0x4, %r16
10952continue_iaw_4_39:
10953 sllx %r16, %r8, %r16 !Mask for my core only
10954 ldxa [0x58]%asi, %r17 !Running_status
10955wait_for_stat_4_39:
10956 ldxa [0x50]%asi, %r13 !Running_rw
10957 cmp %r13, %r17
10958 bne,a %xcc, wait_for_stat_4_39
10959 ldxa [0x58]%asi, %r17 !Running_status
10960 stxa %r16, [0x68]%asi !Park (W1C)
10961 ldxa [0x50]%asi, %r14 !Running_rw
10962wait_for_iaw_4_39:
10963 ldxa [0x58]%asi, %r17 !Running_status
10964 cmp %r14, %r17
10965 bne,a %xcc, wait_for_iaw_4_39
10966 ldxa [0x50]%asi, %r14 !Running_rw
10967iaw_doit4_39:
10968 mov 0x38, %r18
10969iaw4_4_39:
10970 setx common_target, %r20, %r19
10971 or %r19, 0x1, %r19
10972 stxa %r19, [%r18]0x50
10973 stxa %r16, [0x60] %asi ! Unpark (W1S)
10974 st %g0, [%r23] !clear lock
10975 wr %r0, %r12, %asi ! restore %asi
10976 ta T_CHANGE_NONHPRIV
10977 .word 0xc1bfe100 ! 50: STDFA_I stda %f0, [0x0100, %r31]
10978splash_lsu_4_40:
10979 nop
10980 ta T_CHANGE_HPRIV
10981 set 0xb8e55709, %r2
10982 mov 0x3, %r1
10983 sllx %r1, 32, %r1
10984 or %r1, %r2, %r2
10985 stxa %r2, [%r0] ASI_LSU_CONTROL
10986 .word 0x3d400001 ! 51: FBPULE fbule,a,pn %fcc0, <label_0x1>
10987change_to_randtl_4_41:
10988 ta T_CHANGE_HPRIV ! macro
10989done_change_to_randtl_4_41:
10990 .word 0x8f902000 ! 52: WRPR_TL_I wrpr %r0, 0x0000, %tl
10991 .word 0xe1bfdf20 ! 53: STDFA_R stda %f16, [%r0, %r31]
10992splash_tick_4_42:
10993 nop
10994 ta T_CHANGE_HPRIV
10995 best_set_reg(0xd4ebe61593823e85, %r16, %r17)
10996 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick
10997 nop
10998 ta T_CHANGE_HPRIV ! macro
10999donret_4_43:
11000 rd %pc, %r12
11001 mov HIGHVA_HIGHNUM, %r10
11002 sllx %r10, 32, %r10
11003 or %r12, %r10, %r12
11004 add %r12, (donretarg_4_43-donret_4_43+4), %r12
11005 add %r12, 0x4, %r11 ! seq tnpc
11006 wrpr %g0, 0x2, %tl
11007 wrpr %g0, %r12, %tpc
11008 wrpr %g0, %r11, %tnpc
11009 set (0x00692e00 | (32 << 24)), %r13
11010 and %r12, 0xfff, %r14
11011 sllx %r14, 30, %r14
11012 or %r13, %r14, %r20
11013 wrpr %r20, %g0, %tstate
11014 wrhpr %g0, 0x1f5d, %htstate
11015 ta T_CHANGE_NONPRIV ! rand=0 (4)
11016 .word 0x3a800001 ! 1: BCC bcc,a <label_0x1>
11017 done
11018.align 32
11019donretarg_4_43:
11020 .word 0x819836d5 ! 55: WRHPR_HPSTATE_I wrhpr %r0, 0x16d5, %hpstate
11021 .word 0xe64fc000 ! 56: LDSB_R ldsb [%r31 + %r0], %r19
11022 .word 0xe71fe0c0 ! 57: LDDF_I ldd [%r31, 0x00c0], %f19
11023 .word 0x87802039 ! 58: WRASI_I wr %r0, 0x0039, %asi
11024splash_tick_4_44:
11025 nop
11026 ta T_CHANGE_HPRIV
11027 best_set_reg(0xa885e9545cf09b02, %r16, %r17)
11028 .word 0x89800011 ! 59: WRTICK_R wr %r0, %r17, %tick
11029 nop
11030 ta T_CHANGE_HPRIV
11031 mov 0x4+1, %r10
11032 set sync_thr_counter5, %r23
11033#ifndef SPC
11034 ldxa [%g0]0x63, %o1
11035 and %o1, 0x38, %o1
11036 add %o1, %r23, %r23
11037 sllx %o1, 5, %o3 !(CID*256)
11038#endif
11039 cas [%r23],%g0,%r10 !lock
11040 brnz %r10, cwq_4_45
11041 rd %asi, %r12
11042 wr %g0, 0x40, %asi
11043 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
11044 and %l1, 0x3, %l1 ! Check if busy/enabled ..
11045 cmp %l1, 1
11046 bne cwq_4_45
11047 set CWQ_BASE, %l6
11048#ifndef SPC
11049 add %l6, %o3, %l6
11050#endif
11051 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
11052 best_set_reg(0x206100e0, %l1, %l2) !# Control Word
11053 sllx %l2, 32, %l2
11054 stx %l2, [%l6 + 0x0]
11055 membar #Sync
11056 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
11057 sub %l2, 0x40, %l2
11058 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
11059 wr %r12, %g0, %asi
11060 st %g0, [%r23]
11061cwq_4_45:
11062 ta T_CHANGE_NONHPRIV
11063 .word 0xa5414000 ! 60: RDPC rd %pc, %r18
11064mondo_4_46:
11065 nop
11066 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
11067 ta T_CHANGE_PRIV
11068 stxa %r12, [%r0+0x3d0] %asi
11069 .word 0x9d944005 ! 61: WRPR_WSTATE_R wrpr %r17, %r5, %wstate
11070 .word 0x93d02035 ! 62: Tcc_I tne icc_or_xcc, %r0 + 53
11071splash_lsu_4_47:
11072 nop
11073 ta T_CHANGE_HPRIV
11074 set 0xcb7db2fd, %r2
11075 mov 0x7, %r1
11076 sllx %r1, 32, %r1
11077 or %r1, %r2, %r2
11078 stxa %r2, [%r0] ASI_LSU_CONTROL
11079 .word 0x3d400001 ! 63: FBPULE fbule,a,pn %fcc0, <label_0x1>
11080ibp_4_48:
11081 nop
11082 .word 0xc1bfdf20 ! 64: STDFA_R stda %f0, [%r0, %r31]
11083splash_hpstate_4_49:
11084 .word 0x819824c7 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x04c7, %hpstate
11085 .word 0x8d903f47 ! 66: WRPR_PSTATE_I wrpr %r0, 0x1f47, %pstate
11086 rd %tick, %r28
11087#if (MAX_THREADS == 8)
11088 sethi %hi(0x33800), %r27
11089#else
11090 sethi %hi(0x30000), %r27
11091#endif
11092 andn %r28, %r27, %r28
11093 ta T_CHANGE_HPRIV
11094 stxa %r28, [%g0] 0x73
11095intvec_4_51:
11096 .word 0x39400001 ! 67: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
11097iaw_4_52:
11098 nop
11099 ta T_CHANGE_HPRIV
11100 mov 8, %r18
11101 rd %asi, %r12
11102 wr %r0, 0x41, %asi
11103 set sync_thr_counter4, %r23
11104#ifndef SPC
11105 ldxa [%g0]0x63, %r8
11106 and %r8, 0x38, %r8 ! Core ID
11107 add %r8, %r23, %r23
11108#else
11109 mov 0, %r8
11110#endif
11111 mov 0x4, %r16
11112iaw_startwait4_52:
11113 cas [%r23],%g0,%r16 !lock
11114 brz,a %r16, continue_iaw_4_52
11115 mov (~0x4&0xf), %r16
11116 ld [%r23], %r16
11117iaw_wait4_52:
11118 brnz %r16, iaw_wait4_52
11119 ld [%r23], %r16
11120 ba iaw_startwait4_52
11121 mov 0x4, %r16
11122continue_iaw_4_52:
11123 sllx %r16, %r8, %r16 !Mask for my core only
11124 ldxa [0x58]%asi, %r17 !Running_status
11125wait_for_stat_4_52:
11126 ldxa [0x50]%asi, %r13 !Running_rw
11127 cmp %r13, %r17
11128 bne,a %xcc, wait_for_stat_4_52
11129 ldxa [0x58]%asi, %r17 !Running_status
11130 stxa %r16, [0x68]%asi !Park (W1C)
11131 ldxa [0x50]%asi, %r14 !Running_rw
11132wait_for_iaw_4_52:
11133 ldxa [0x58]%asi, %r17 !Running_status
11134 cmp %r14, %r17
11135 bne,a %xcc, wait_for_iaw_4_52
11136 ldxa [0x50]%asi, %r14 !Running_rw
11137iaw_doit4_52:
11138 mov 0x38, %r18
11139iaw2_4_52:
11140 rdpr %tba, %r19
11141 mov 0x320, %r20
11142 sllx %r20, 5, %r20
11143 add %r20, %r19, %r19
11144 stxa %r19, [%r18]0x50
11145 stxa %r16, [0x60] %asi ! Unpark (W1S)
11146 st %g0, [%r23] !clear lock
11147 wr %r0, %r12, %asi ! restore %asi
11148 ta T_CHANGE_NONHPRIV
11149 .word 0x9ba409d4 ! 68: FDIVd fdivd %f16, %f20, %f44
11150 nop
11151 ta T_CHANGE_HPRIV ! macro
11152donret_4_53:
11153 rd %pc, %r12
11154 mov HIGHVA_HIGHNUM, %r10
11155 sllx %r10, 32, %r10
11156 or %r12, %r10, %r12
11157 add %r12, (donretarg_4_53-donret_4_53+4), %r12
11158 add %r12, 0x4, %r11 ! seq tnpc
11159 wrpr %g0, 0x1, %tl
11160 wrpr %g0, %r12, %tpc
11161 wrpr %g0, %r11, %tnpc
11162 set (0x00a51300 | (0x89 << 24)), %r13
11163 and %r12, 0xfff, %r14
11164 sllx %r14, 30, %r14
11165 or %r13, %r14, %r20
11166 wrpr %r20, %g0, %tstate
11167 wrhpr %g0, 0xf0d, %htstate
11168 ta T_CHANGE_NONPRIV ! rand=0 (4)
11169 ldx [%r11+%r0], %g1
11170 done
11171donretarg_4_53:
11172 .word 0x3d400001 ! 69: FBPULE fbule,a,pn %fcc0, <label_0x1>
11173 set 0x1847, %l3
11174 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
11175 .word 0x93b487c5 ! 70: PDIST pdistn %d18, %d36, %d40
11176cmp_4_54:
11177 nop
11178 ta T_CHANGE_HPRIV
11179 rd %asi, %r12
11180 wr %r0, 0x41, %asi
11181 set sync_thr_counter4, %r23
11182#ifndef SPC
11183 ldxa [%g0]0x63, %r8
11184 and %r8, 0x38, %r8 ! Core ID
11185 add %r8, %r23, %r23
11186 mov 0xff, %r9
11187 xor %r9, 0x4, %r9
11188 sllx %r9, %r8, %r9 ! My core mask
11189#else
11190 mov 0, %r8
11191 mov 0xff, %r9
11192 xor %r9, 0x4, %r9 ! My core mask
11193#endif
11194 mov 0x4, %r10
11195cmp_startwait4_54:
11196 cas [%r23],%g0,%r10 !lock
11197 brz,a %r10, continue_cmp_4_54
11198 ldxa [0x50]%asi, %r13 !Running_rw
11199 ld [%r23], %r10
11200cmp_wait4_54:
11201 brnz,a %r10, cmp_wait4_54
11202 ld [%r23], %r10
11203 ba cmp_startwait4_54
11204 mov 0x4, %r10
11205continue_cmp_4_54:
11206 ldxa [0x58]%asi, %r14 !Running_status
11207 xnor %r14, %r13, %r14 !Bits equal
11208 brz,a %r8, cmp_multi_core_4_54
11209 mov 0x58, %r17
11210 best_set_reg(0x6c959f8949390f22, %r16, %r17)
11211cmp_multi_core_4_54:
11212 and %r14, %r17, %r14 !Apply set/clear mask to bits equal
11213 and %r14, %r9, %r14 !Apply core-mask
11214 stxa %r14, [0x60]%asi
11215 st %g0, [%r23] !clear lock
11216 wr %g0, %r12, %asi
11217 .word 0xa3a0016a ! 71: FABSq dis not found
11218
11219ibp_4_55:
11220 nop
11221 ta T_CHANGE_NONHPRIV
11222 .word 0xc19fc2c0 ! 72: LDDFA_R ldda [%r31, %r0], %f0
11223 nop
11224 ta T_CHANGE_HPRIV ! macro
11225donret_4_56:
11226 rd %pc, %r12
11227 mov HIGHVA_HIGHNUM, %r10
11228 sllx %r10, 32, %r10
11229 or %r12, %r10, %r12
11230 add %r12, (donretarg_4_56-donret_4_56), %r12
11231 add %r12, 0x8, %r11 ! nonseq tnpc
11232 wrpr %g0, 0x1, %tl
11233 wrpr %g0, %r12, %tpc
11234 wrpr %g0, %r11, %tnpc
11235 set (0x000b2800 | (0x8a << 24)), %r13
11236 and %r12, 0xfff, %r14
11237 sllx %r14, 30, %r14
11238 or %r13, %r14, %r20
11239 wrpr %r20, %g0, %tstate
11240 wrhpr %g0, 0x89d, %htstate
11241 ta T_CHANGE_NONHPRIV ! rand=1 (4)
11242 retry
11243.align 32
11244donretarg_4_56:
11245 .word 0xe4ffe1d6 ! 73: SWAPA_I swapa %r18, [%r31 + 0x01d6] %asi
11246brcommon3_4_57:
11247 nop
11248 setx common_target, %r12, %r27
11249 lduw [%r27], %r12 ! Load common dest into dcache ..
11250 ba,a .+12
11251 .word 0xe537c009 ! 1: STQF_R - %f18, [%r9, %r31]
11252 ba,a .+8
11253 jmpl %r27+0, %r27
11254 .word 0xe51fe1a0 ! 74: LDDF_I ldd [%r31, 0x01a0], %f18
11255cmp_4_58:
11256 nop
11257 ta T_CHANGE_HPRIV
11258 rd %asi, %r12
11259 wr %r0, 0x41, %asi
11260 set sync_thr_counter4, %r23
11261#ifndef SPC
11262 ldxa [%g0]0x63, %r8
11263 and %r8, 0x38, %r8 ! Core ID
11264 add %r8, %r23, %r23
11265 mov 0xff, %r9
11266 xor %r9, 0x4, %r9
11267 sllx %r9, %r8, %r9 ! My core mask
11268#else
11269 mov 0, %r8
11270 mov 0xff, %r9
11271 xor %r9, 0x4, %r9 ! My core mask
11272#endif
11273 mov 0x4, %r10
11274cmp_startwait4_58:
11275 cas [%r23],%g0,%r10 !lock
11276 brz,a %r10, continue_cmp_4_58
11277 ldxa [0x50]%asi, %r13 !Running_rw
11278 ld [%r23], %r10
11279cmp_wait4_58:
11280 brnz,a %r10, cmp_wait4_58
11281 ld [%r23], %r10
11282 ba cmp_startwait4_58
11283 mov 0x4, %r10
11284continue_cmp_4_58:
11285 ldxa [0x58]%asi, %r14 !Running_status
11286 xnor %r14, %r13, %r14 !Bits equal
11287 brz,a %r8, cmp_multi_core_4_58
11288 mov 0xb0, %r17
11289 best_set_reg(0xa3b47c302883b518, %r16, %r17)
11290cmp_multi_core_4_58:
11291 and %r14, %r17, %r14 !Apply set/clear mask to bits equal
11292 and %r14, %r9, %r14 !Apply core-mask
11293 stxa %r14, [0x60]%asi
11294 st %g0, [%r23] !clear lock
11295 wr %g0, %r12, %asi
11296 ta T_CHANGE_NONHPRIV
11297 .word 0x91940006 ! 75: WRPR_PIL_R wrpr %r16, %r6, %pil
11298splash_cmpr_4_59:
11299 mov 1, %r18
11300 sllx %r18, 63, %r18
11301 rd %tick, %r17
11302 add %r17, 0x60, %r17
11303 or %r17, %r18, %r17
11304 ta T_CHANGE_PRIV
11305 .word 0xb3800011 ! 76: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
11306splash_cmpr_4_60:
11307 mov 0, %r18
11308 sllx %r18, 63, %r18
11309 rd %tick, %r17
11310 add %r17, 0x50, %r17
11311 or %r17, %r18, %r17
11312 ta T_CHANGE_HPRIV
11313 wrhpr %r17, %g0, %hsys_tick_cmpr
11314 .word 0xb3800011 ! 77: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
11315 .word 0x8780208b ! 78: WRASI_I wr %r0, 0x008b, %asi
11316brcommon3_4_61:
11317 nop
11318 setx common_target, %r12, %r27
11319 lduw [%r27], %r12 ! Load common dest into dcache ..
11320 ba,a .+12
11321 .word 0xe537c009 ! 1: STQF_R - %f18, [%r9, %r31]
11322 ba,a .+8
11323 jmpl %r27+0, %r27
11324 .word 0xe51fe1c0 ! 79: LDDF_I ldd [%r31, 0x01c0], %f18
11325mondo_4_62:
11326 nop
11327 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
11328 ta T_CHANGE_PRIV
11329 stxa %r4, [%r0+0x3e0] %asi
11330 .word 0x9d91c011 ! 80: WRPR_WSTATE_R wrpr %r7, %r17, %wstate
11331 nop
11332 mov 0x80, %g3
11333 stxa %g3, [%g3] 0x5f
11334 .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31
11335 .word 0xe45fc000 ! 81: LDX_R ldx [%r31 + %r0], %r18
11336 set 0x2d4, %l3
11337 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
11338 .word 0xa3b147d0 ! 82: PDIST pdistn %d36, %d16, %d48
11339 .word 0xd3e7c020 ! 83: CASA_I casa [%r31] 0x 1, %r0, %r9
11340cmp_4_64:
11341 nop
11342 ta T_CHANGE_HPRIV
11343 rd %asi, %r12
11344 wr %r0, 0x41, %asi
11345 set sync_thr_counter4, %r23
11346#ifndef SPC
11347 ldxa [%g0]0x63, %r8
11348 and %r8, 0x38, %r8 ! Core ID
11349 add %r8, %r23, %r23
11350 mov 0xff, %r9
11351 xor %r9, 0x4, %r9
11352 sllx %r9, %r8, %r9 ! My core mask
11353#else
11354 mov 0, %r8
11355 mov 0xff, %r9
11356 xor %r9, 0x4, %r9 ! My core mask
11357#endif
11358 mov 0x4, %r10
11359cmp_startwait4_64:
11360 cas [%r23],%g0,%r10 !lock
11361 brz,a %r10, continue_cmp_4_64
11362 ldxa [0x50]%asi, %r13 !Running_rw
11363 ld [%r23], %r10
11364cmp_wait4_64:
11365 brnz,a %r10, cmp_wait4_64
11366 ld [%r23], %r10
11367 ba cmp_startwait4_64
11368 mov 0x4, %r10
11369continue_cmp_4_64:
11370 ldxa [0x58]%asi, %r14 !Running_status
11371 xnor %r14, %r13, %r14 !Bits equal
11372 brz,a %r8, cmp_multi_core_4_64
11373 mov 0xce, %r17
11374 best_set_reg(0x0c57dc5baceaba1e, %r16, %r17)
11375cmp_multi_core_4_64:
11376 and %r14, %r17, %r14 !Apply set/clear mask to bits equal
11377 and %r14, %r9, %r14 !Apply core-mask
11378 stxa %r14, [0x60]%asi
11379 st %g0, [%r23] !clear lock
11380 wr %g0, %r12, %asi
11381 .word 0x91a0016a ! 84: FABSq dis not found
11382
11383 nop
11384 ta T_CHANGE_HPRIV
11385 mov 0x4+1, %r10
11386 set sync_thr_counter5, %r23
11387#ifndef SPC
11388 ldxa [%g0]0x63, %o1
11389 and %o1, 0x38, %o1
11390 add %o1, %r23, %r23
11391 sllx %o1, 5, %o3 !(CID*256)
11392#endif
11393 cas [%r23],%g0,%r10 !lock
11394 brnz %r10, cwq_4_65
11395 rd %asi, %r12
11396 wr %g0, 0x40, %asi
11397 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
11398 and %l1, 0x3, %l1 ! Check if busy/enabled ..
11399 cmp %l1, 1
11400 bne cwq_4_65
11401 set CWQ_BASE, %l6
11402#ifndef SPC
11403 add %l6, %o3, %l6
11404#endif
11405 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
11406 best_set_reg(0x206100a0, %l1, %l2) !# Control Word
11407 sllx %l2, 32, %l2
11408 stx %l2, [%l6 + 0x0]
11409 membar #Sync
11410 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
11411 sub %l2, 0x40, %l2
11412 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
11413 wr %r12, %g0, %asi
11414 st %g0, [%r23]
11415cwq_4_65:
11416 ta T_CHANGE_NONHPRIV
11417 .word 0xa9414000 ! 85: RDPC rd %pc, %r20
11418 .word 0x99450000 ! 86: RD_SET_SOFTINT rd %set_softint, %r12
11419brcommon1_4_66:
11420 nop
11421 setx common_target, %r12, %r27
11422 lduw [%r27], %r12 ! Load common dest into dcache ..
11423 ba,a .+12
11424 .word 0x93b7c7c8 ! 1: PDIST pdistn %d62, %d8, %d40
11425 ba,a .+8
11426 jmpl %r27+0, %r27
11427 .word 0xa1702a80 ! 87: POPC_I popc 0x0a80, %r16
11428pmu_4_67:
11429 nop
11430 setx 0xffffffb0ffffffaa, %g1, %g7
11431 .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %-
11432#if (defined SPC || defined CMP)
11433!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_68)+16, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
11434!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_68)&0xffffffff) + 56, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
11435xir_4_68:
11436#else
11437#if (defined FC)
11438!! Generate XIR via RESET_GEN register
11439 ta T_CHANGE_HPRIV
11440 rdpr %pstate, %r18
11441 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
11442 wrpr %r18, %pstate
11443#ifndef XIR_RND_CORES
11444 ldxa [%g0] 0x63, %o1
11445 mov 1, %r18
11446 sllx %r18, %o1, %r18
11447#endif
11448 mov 0x30, %r19
11449 setx 0x8900000808, %r16, %r17
11450 mov 0x2, %r16
11451xir_4_68:
11452 stxa %r18, [%r19] 0x41
11453 stx %r16, [%r17]
11454#endif
11455#endif
11456 .word 0xa98271f4 ! 89: WR_SET_SOFTINT_I wr %r9, 0x11f4, %set_softint
11457 rd %tick, %r28
11458#if (MAX_THREADS == 8)
11459 sethi %hi(0x33800), %r27
11460#else
11461 sethi %hi(0x30000), %r27
11462#endif
11463 andn %r28, %r27, %r28
11464 ta T_CHANGE_HPRIV
11465 stxa %r28, [%g0] 0x73
11466intvec_4_69:
11467 .word 0x39400001 ! 90: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
11468fpinit_4_70:
11469 nop
11470 setx fp_data_quads, %r19, %r20
11471 ldd [%r20], %f0
11472 ldd [%r20+8], %f4
11473 ld [%r20+16], %fsr
11474 ld [%r20+24], %r19
11475 wr %r19, %g0, %gsr
11476 .word 0xc3e823fe ! 91: PREFETCHA_I prefetcha [%r0, + 0x03fe] %asi, #one_read
11477mondo_4_71:
11478 nop
11479 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
11480 ta T_CHANGE_PRIV
11481 stxa %r16, [%r0+0x3d0] %asi
11482 .word 0x9d948010 ! 92: WRPR_WSTATE_R wrpr %r18, %r16, %wstate
11483 .word 0x8d903da3 ! 93: WRPR_PSTATE_I wrpr %r0, 0x1da3, %pstate
11484 .word 0x8d802000 ! 94: WRFPRS_I wr %r0, 0x0000, %fprs
11485 nop
11486 ta T_CHANGE_HPRIV
11487 mov 0x4, %r10
11488 set sync_thr_counter6, %r23
11489#ifndef SPC
11490 ldxa [%g0]0x63, %o1
11491 and %o1, 0x38, %o1
11492 add %o1, %r23, %r23
11493#endif
11494 cas [%r23],%g0,%r10 !lock
11495 brnz %r10, sma_4_73
11496 rd %asi, %r12
11497 wr %g0, 0x40, %asi
11498 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
11499 set 0x000a1fff, %g1
11500 stxa %g1, [%g0 + 0x80] %asi
11501 wr %r12, %g0, %asi
11502 st %g0, [%r23]
11503sma_4_73:
11504 ta T_CHANGE_NONHPRIV
11505 .word 0xd1e7e011 ! 95: CASA_R casa [%r31] %asi, %r17, %r8
11506ibp_4_74:
11507 nop
11508 ta T_CHANGE_NONHPRIV
11509 .word 0xa97022a3 ! 96: POPC_I popc 0x02a3, %r20
11510iaw_4_75:
11511 nop
11512 ta T_CHANGE_HPRIV
11513 mov 8, %r18
11514 rd %asi, %r12
11515 wr %r0, 0x41, %asi
11516 set sync_thr_counter4, %r23
11517#ifndef SPC
11518 ldxa [%g0]0x63, %r8
11519 and %r8, 0x38, %r8 ! Core ID
11520 add %r8, %r23, %r23
11521#else
11522 mov 0, %r8
11523#endif
11524 mov 0x4, %r16
11525iaw_startwait4_75:
11526 cas [%r23],%g0,%r16 !lock
11527 brz,a %r16, continue_iaw_4_75
11528 mov (~0x4&0xf), %r16
11529 ld [%r23], %r16
11530iaw_wait4_75:
11531 brnz %r16, iaw_wait4_75
11532 ld [%r23], %r16
11533 ba iaw_startwait4_75
11534 mov 0x4, %r16
11535continue_iaw_4_75:
11536 sllx %r16, %r8, %r16 !Mask for my core only
11537 ldxa [0x58]%asi, %r17 !Running_status
11538wait_for_stat_4_75:
11539 ldxa [0x50]%asi, %r13 !Running_rw
11540 cmp %r13, %r17
11541 bne,a %xcc, wait_for_stat_4_75
11542 ldxa [0x58]%asi, %r17 !Running_status
11543 stxa %r16, [0x68]%asi !Park (W1C)
11544 ldxa [0x50]%asi, %r14 !Running_rw
11545wait_for_iaw_4_75:
11546 ldxa [0x58]%asi, %r17 !Running_status
11547 cmp %r14, %r17
11548 bne,a %xcc, wait_for_iaw_4_75
11549 ldxa [0x50]%asi, %r14 !Running_rw
11550iaw_doit4_75:
11551 mov 0x38, %r18
11552iaw1_4_75:
11553 best_set_reg(0x00000000e1200000, %r20, %r19)
11554 or %r19, 0x1, %r19
11555 stxa %r19, [%r18]0x50
11556 stxa %r16, [0x60] %asi ! Unpark (W1S)
11557 st %g0, [%r23] !clear lock
11558 wr %r0, %r12, %asi ! restore %asi
11559 ta T_CHANGE_NONHPRIV
11560 .word 0xa9702e6c ! 97: POPC_I popc 0x0e6c, %r20
11561trapasi_4_76:
11562 nop
11563 mov 0x8, %r1 ! (VA for ASI 0x5a)
11564 .word 0xd8c04b40 ! 98: LDSWA_R ldswa [%r1, %r0] 0x5a, %r12
11565 .word 0x81460000 ! 99: RD_STICK_REG stbar
11566jmptr_4_77:
11567 nop
11568 best_set_reg(0xe0200000, %r20, %r27)
11569 .word 0xb7c6c000 ! 100: JMPL_R jmpl %r27 + %r0, %r27
11570pmu_4_78:
11571 nop
11572 ta T_CHANGE_PRIV
11573 setx 0xffffffb2ffffffaa, %g1, %g7
11574 .word 0xa3800007 ! 101: WR_PERF_COUNTER_R wr %r0, %r7, %-
11575memptr_4_79:
11576 set 0x60540000, %r31
11577 .word 0x85823969 ! 102: WRCCR_I wr %r8, 0x1969, %ccr
11578 .word 0xd8cfe058 ! 103: LDSBA_I ldsba [%r31, + 0x0058] %asi, %r12
11579change_to_randtl_4_80:
11580 ta T_CHANGE_PRIV ! macro
11581done_change_to_randtl_4_80:
11582 .word 0x8f902000 ! 104: WRPR_TL_I wrpr %r0, 0x0000, %tl
11583pmu_4_81:
11584 nop
11585 setx 0xffffffb5ffffffa1, %g1, %g7
11586 .word 0xa3800007 ! 105: WR_PERF_COUNTER_R wr %r0, %r7, %-
11587splash_lsu_4_82:
11588 nop
11589 ta T_CHANGE_HPRIV
11590 set 0x64371a1f, %r2
11591 mov 0x1, %r1
11592 sllx %r1, 32, %r1
11593 or %r1, %r2, %r2
11594 .word 0x2eca0001 ! 1: BRGEZ brgez,a,pt %r8,<label_0xa0001>
11595 stxa %r2, [%r0] ASI_LSU_CONTROL
11596 .word 0x3d400001 ! 106: FBPULE fbule,a,pn %fcc0, <label_0x1>
11597 .word 0xd8cfe1d8 ! 107: LDSBA_I ldsba [%r31, + 0x01d8] %asi, %r12
11598 .word 0xd9e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r12
11599 .word 0x9f803ce4 ! 108: SIR sir 0x1ce4
11600 .word 0xd8dfe060 ! 109: LDXA_I ldxa [%r31, + 0x0060] %asi, %r12
11601 .word 0x87802088 ! 110: WRASI_I wr %r0, 0x0088, %asi
11602mondo_4_83:
11603 nop
11604 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
11605 stxa %r19, [%r0+0x3c8] %asi
11606 .word 0x9d950001 ! 111: WRPR_WSTATE_R wrpr %r20, %r1, %wstate
11607 .word 0x81460000 ! 112: RD_STICK_REG stbar
11608 .word 0xa3a489d3 ! 113: FDIVd fdivd %f18, %f50, %f48
11609 nop
11610 ta T_CHANGE_HPRIV
11611 mov 0x4+1, %r10
11612 set sync_thr_counter5, %r23
11613#ifndef SPC
11614 ldxa [%g0]0x63, %o1
11615 and %o1, 0x38, %o1
11616 add %o1, %r23, %r23
11617 sllx %o1, 5, %o3 !(CID*256)
11618#endif
11619 cas [%r23],%g0,%r10 !lock
11620 brnz %r10, cwq_4_85
11621 rd %asi, %r12
11622 wr %g0, 0x40, %asi
11623 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
11624 and %l1, 0x3, %l1 ! Check if busy/enabled ..
11625 cmp %l1, 1
11626 bne cwq_4_85
11627 set CWQ_BASE, %l6
11628#ifndef SPC
11629 add %l6, %o3, %l6
11630#endif
11631 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
11632 best_set_reg(0x20610040, %l1, %l2) !# Control Word
11633 sllx %l2, 32, %l2
11634 stx %l2, [%l6 + 0x0]
11635 membar #Sync
11636 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
11637 sub %l2, 0x40, %l2
11638 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
11639 wr %r12, %g0, %asi
11640 st %g0, [%r23]
11641cwq_4_85:
11642 ta T_CHANGE_NONHPRIV
11643 .word 0x91414000 ! 114: RDPC rd %pc, %r8
11644#if (defined SPC || defined CMP1)
11645!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_86) + 0, 16, 16)) -> intp(2,0,11,,,,,1)
11646!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_86)&0xffffffff) + 24, 16, 16)) -> intp(5,0,3,,,,,1)
11647#else
11648 set 0xc50c659, %r28
11649#if (MAX_THREADS == 8)
11650 and %r28, 0x7ff, %r28
11651#endif
11652 stxa %r28, [%g0] 0x73
11653#endif
11654intvec_4_86:
11655 .word 0x39400001 ! 115: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
11656pmu_4_87:
11657 nop
11658 setx 0xffffffb2ffffffa4, %g1, %g7
11659 .word 0xa3800007 ! 116: WR_PERF_COUNTER_R wr %r0, %r7, %-
11660trapasi_4_88:
11661 nop
11662 mov 0x10, %r1 ! (VA for ASI 0x49)
11663 .word 0xd8904920 ! 117: LDUHA_R lduha [%r1, %r0] 0x49, %r12
11664 .word 0x99450000 ! 118: RD_SET_SOFTINT rd %set_softint, %r12
11665fpinit_4_89:
11666 nop
11667 setx fp_data_quads, %r19, %r20
11668 ldd [%r20], %f0
11669 ldd [%r20+8], %f4
11670 ld [%r20+16], %fsr
11671 ld [%r20+24], %r19
11672 wr %r19, %g0, %gsr
11673 .word 0x91a009a4 ! 119: FDIVs fdivs %f0, %f4, %f8
11674 .word 0xe63fc008 ! 1: STD_R std %r19, [%r31 + %r8]
11675 .word 0x9f803bc3 ! 120: SIR sir 0x1bc3
11676 nop
11677 ta T_CHANGE_HPRIV ! macro
11678donret_4_90:
11679 rd %pc, %r12
11680 mov HIGHVA_HIGHNUM, %r10
11681 sllx %r10, 32, %r10
11682 or %r12, %r10, %r12
11683 add %r12, (donretarg_4_90-donret_4_90+4), %r12
11684 add %r12, 0x4, %r11 ! seq tnpc
11685 wrpr %g0, 0x1, %tl
11686 wrpr %g0, %r12, %tpc
11687 wrpr %g0, %r11, %tnpc
11688 set (0x00cb4b00 | (0x8a << 24)), %r13
11689 and %r12, 0xfff, %r14
11690 sllx %r14, 30, %r14
11691 or %r13, %r14, %r20
11692 wrpr %r20, %g0, %tstate
11693 wrhpr %g0, 0x1f5f, %htstate
11694 ta T_CHANGE_NONPRIV ! rand=0 (4)
11695 retry
11696.align 32
11697donretarg_4_90:
11698 .word 0xe66fe044 ! 121: LDSTUB_I ldstub %r19, [%r31 + 0x0044]
11699 .word 0xe6bfc031 ! 1: STDA_R stda %r19, [%r31 + %r17] 0x01
11700 .word 0x9f803c2a ! 122: SIR sir 0x1c2a
11701splash_htba_4_91:
11702 nop
11703 ta T_CHANGE_HPRIV
11704 setx 0x0000000200280000, %r11, %r12
11705 .word 0x8b98000c ! 123: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
11706 nop
11707 ta T_CHANGE_HPRIV
11708 mov 0x4+1, %r10
11709 set sync_thr_counter5, %r23
11710#ifndef SPC
11711 ldxa [%g0]0x63, %o1
11712 and %o1, 0x38, %o1
11713 add %o1, %r23, %r23
11714 sllx %o1, 5, %o3 !(CID*256)
11715#endif
11716 cas [%r23],%g0,%r10 !lock
11717 brnz %r10, cwq_4_92
11718 rd %asi, %r12
11719 wr %g0, 0x40, %asi
11720 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
11721 and %l1, 0x3, %l1 ! Check if busy/enabled ..
11722 cmp %l1, 1
11723 bne cwq_4_92
11724 set CWQ_BASE, %l6
11725#ifndef SPC
11726 add %l6, %o3, %l6
11727#endif
11728 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
11729 best_set_reg(0x206100f0, %l1, %l2) !# Control Word
11730 sllx %l2, 32, %l2
11731 stx %l2, [%l6 + 0x0]
11732 membar #Sync
11733 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
11734 sub %l2, 0x40, %l2
11735 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
11736 wr %r12, %g0, %asi
11737 st %g0, [%r23]
11738cwq_4_92:
11739 ta T_CHANGE_NONHPRIV
11740 .word 0xa3414000 ! 124: RDPC rd %pc, %r17
11741 rd %tick, %r28
11742#if (MAX_THREADS == 8)
11743 sethi %hi(0x33800), %r27
11744#else
11745 sethi %hi(0x30000), %r27
11746#endif
11747 andn %r28, %r27, %r28
11748 ta T_CHANGE_HPRIV
11749 stxa %r28, [%g0] 0x73
11750intvec_4_93:
11751 .word 0x39400001 ! 125: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
11752 .word 0x8d802004 ! 126: WRFPRS_I wr %r0, 0x0004, %fprs
11753iaw_4_94:
11754 nop
11755 ta T_CHANGE_HPRIV
11756 mov 8, %r18
11757 rd %asi, %r12
11758 wr %r0, 0x41, %asi
11759 set sync_thr_counter4, %r23
11760#ifndef SPC
11761 ldxa [%g0]0x63, %r8
11762 and %r8, 0x38, %r8 ! Core ID
11763 add %r8, %r23, %r23
11764#else
11765 mov 0, %r8
11766#endif
11767 mov 0x4, %r16
11768iaw_startwait4_94:
11769 cas [%r23],%g0,%r16 !lock
11770 brz,a %r16, continue_iaw_4_94
11771 mov (~0x4&0xf), %r16
11772 ld [%r23], %r16
11773iaw_wait4_94:
11774 brnz %r16, iaw_wait4_94
11775 ld [%r23], %r16
11776 ba iaw_startwait4_94
11777 mov 0x4, %r16
11778continue_iaw_4_94:
11779 sllx %r16, %r8, %r16 !Mask for my core only
11780 ldxa [0x58]%asi, %r17 !Running_status
11781wait_for_stat_4_94:
11782 ldxa [0x50]%asi, %r13 !Running_rw
11783 cmp %r13, %r17
11784 bne,a %xcc, wait_for_stat_4_94
11785 ldxa [0x58]%asi, %r17 !Running_status
11786 stxa %r16, [0x68]%asi !Park (W1C)
11787 ldxa [0x50]%asi, %r14 !Running_rw
11788wait_for_iaw_4_94:
11789 ldxa [0x58]%asi, %r17 !Running_status
11790 cmp %r14, %r17
11791 bne,a %xcc, wait_for_iaw_4_94
11792 ldxa [0x50]%asi, %r14 !Running_rw
11793iaw_doit4_94:
11794 mov 0x38, %r18
11795iaw4_4_94:
11796 setx common_target, %r20, %r19
11797 or %r19, 0x1, %r19
11798 stxa %r19, [%r18]0x50
11799 stxa %r16, [0x60] %asi ! Unpark (W1S)
11800 st %g0, [%r23] !clear lock
11801 wr %r0, %r12, %asi ! restore %asi
11802 ta T_CHANGE_NONHPRIV
11803 .word 0x93a089d4 ! 127: FDIVd fdivd %f2, %f20, %f40
11804iaw_4_95:
11805 nop
11806 ta T_CHANGE_HPRIV
11807 mov 8, %r18
11808 rd %asi, %r12
11809 wr %r0, 0x41, %asi
11810 set sync_thr_counter4, %r23
11811#ifndef SPC
11812 ldxa [%g0]0x63, %r8
11813 and %r8, 0x38, %r8 ! Core ID
11814 add %r8, %r23, %r23
11815#else
11816 mov 0, %r8
11817#endif
11818 mov 0x4, %r16
11819iaw_startwait4_95:
11820 cas [%r23],%g0,%r16 !lock
11821 brz,a %r16, continue_iaw_4_95
11822 mov (~0x4&0xf), %r16
11823 ld [%r23], %r16
11824iaw_wait4_95:
11825 brnz %r16, iaw_wait4_95
11826 ld [%r23], %r16
11827 ba iaw_startwait4_95
11828 mov 0x4, %r16
11829continue_iaw_4_95:
11830 sllx %r16, %r8, %r16 !Mask for my core only
11831 ldxa [0x58]%asi, %r17 !Running_status
11832wait_for_stat_4_95:
11833 ldxa [0x50]%asi, %r13 !Running_rw
11834 cmp %r13, %r17
11835 bne,a %xcc, wait_for_stat_4_95
11836 ldxa [0x58]%asi, %r17 !Running_status
11837 stxa %r16, [0x68]%asi !Park (W1C)
11838 ldxa [0x50]%asi, %r14 !Running_rw
11839wait_for_iaw_4_95:
11840 ldxa [0x58]%asi, %r17 !Running_status
11841 cmp %r14, %r17
11842 bne,a %xcc, wait_for_iaw_4_95
11843 ldxa [0x50]%asi, %r14 !Running_rw
11844iaw_doit4_95:
11845 mov 0x38, %r18
11846iaw4_4_95:
11847 setx common_target, %r20, %r19
11848 or %r19, 0x1, %r19
11849 stxa %r19, [%r18]0x50
11850 stxa %r16, [0x60] %asi ! Unpark (W1S)
11851 st %g0, [%r23] !clear lock
11852 wr %r0, %r12, %asi ! restore %asi
11853 ta T_CHANGE_NONHPRIV
11854 .word 0xa1b187d2 ! 128: PDIST pdistn %d6, %d18, %d16
11855 .word 0x39400001 ! 129: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
11856 .word 0xe8800aa0 ! 130: LDUWA_R lduwa [%r0, %r0] 0x55, %r20
11857intveclr_4_97:
11858 nop
11859 ta T_CHANGE_HPRIV
11860 setx 0xcef9267a533d8af2, %r1, %r28
11861 stxa %r28, [%g0] 0x72
11862 .word 0x25400001 ! 131: FBPLG fblg,a,pn %fcc0, <label_0x1>
11863splash_hpstate_4_98:
11864 .word 0x81983057 ! 132: WRHPR_HPSTATE_I wrhpr %r0, 0x1057, %hpstate
11865trapasi_4_99:
11866 nop
11867 mov 0x0, %r1 ! (VA for ASI 0x72)
11868 .word 0xe8c04e40 ! 133: LDSWA_R ldswa [%r1, %r0] 0x72, %r20
11869#if (defined SPC || defined CMP)
11870!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_100)+16, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
11871!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_100)&0xffffffff) + 0, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
11872xir_4_100:
11873#else
11874#if (defined FC)
11875!! Generate XIR via RESET_GEN register
11876 ta T_CHANGE_HPRIV
11877 rdpr %pstate, %r18
11878 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
11879 wrpr %r18, %pstate
11880#ifndef XIR_RND_CORES
11881 ldxa [%g0] 0x63, %o1
11882 mov 1, %r18
11883 sllx %r18, %o1, %r18
11884#endif
11885 mov 0x30, %r19
11886 setx 0x8900000808, %r16, %r17
11887 mov 0x2, %r16
11888xir_4_100:
11889 stxa %r18, [%r19] 0x41
11890 stx %r16, [%r17]
11891#endif
11892#endif
11893 .word 0xa98074a9 ! 134: WR_SET_SOFTINT_I wr %r1, 0x14a9, %set_softint
11894intveclr_4_101:
11895 nop
11896 ta T_CHANGE_HPRIV
11897 setx 0x0ba80e8e0983000a, %r1, %r28
11898 stxa %r28, [%g0] 0x72
11899 ta T_CHANGE_NONHPRIV
11900 .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, <label_0x1>
11901intveclr_4_102:
11902 nop
11903 ta T_CHANGE_HPRIV
11904 setx 0x271fb286bc7b7d8c, %r1, %r28
11905 stxa %r28, [%g0] 0x72
11906 .word 0x25400001 ! 136: FBPLG fblg,a,pn %fcc0, <label_0x1>
11907 nop
11908 ta T_CHANGE_HPRIV ! macro
11909donret_4_103:
11910 rd %pc, %r12
11911 mov HIGHVA_HIGHNUM, %r10
11912 sllx %r10, 32, %r10
11913 or %r12, %r10, %r12
11914 add %r12, (donretarg_4_103-donret_4_103), %r12
11915 add %r12, 0x8, %r11 ! nonseq tnpc
11916 wrpr %g0, 0x2, %tl
11917 wrpr %g0, %r12, %tpc
11918 wrpr %g0, %r11, %tnpc
11919 set (0x007dd700 | (0x80 << 24)), %r13
11920 and %r12, 0xfff, %r14
11921 sllx %r14, 30, %r14
11922 or %r13, %r14, %r20
11923 wrpr %r20, %g0, %tstate
11924 wrhpr %g0, 0xb64, %htstate
11925 ta T_CHANGE_NONPRIV ! rand=0 (4)
11926 ldx [%r11+%r0], %g1
11927 done
11928donretarg_4_103:
11929 .word 0xe86fe190 ! 137: LDSTUB_I ldstub %r20, [%r31 + 0x0190]
11930ibp_4_104:
11931 nop
11932 .word 0xc1bfe180 ! 138: STDFA_I stda %f0, [0x0180, %r31]
11933 nop
11934 ta T_CHANGE_HPRIV
11935 mov 0x4, %r10
11936 set sync_thr_counter6, %r23
11937#ifndef SPC
11938 ldxa [%g0]0x63, %o1
11939 and %o1, 0x38, %o1
11940 add %o1, %r23, %r23
11941#endif
11942 cas [%r23],%g0,%r10 !lock
11943 brnz %r10, sma_4_105
11944 rd %asi, %r12
11945 wr %g0, 0x40, %asi
11946 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
11947 set 0x001e1fff, %g1
11948 stxa %g1, [%g0 + 0x80] %asi
11949 wr %r12, %g0, %asi
11950 st %g0, [%r23]
11951sma_4_105:
11952 ta T_CHANGE_NONHPRIV
11953 .word 0xe9e7e011 ! 139: CASA_R casa [%r31] %asi, %r17, %r20
11954splash_cmpr_4_106:
11955 mov 1, %r18
11956 sllx %r18, 63, %r18
11957 rd %tick, %r17
11958 add %r17, 0x60, %r17
11959 or %r17, %r18, %r17
11960 ta T_CHANGE_HPRIV
11961 wrhpr %r17, %g0, %hsys_tick_cmpr
11962 .word 0xb3800011 ! 140: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
11963iaw_4_107:
11964 nop
11965 ta T_CHANGE_HPRIV
11966 mov 8, %r18
11967 rd %asi, %r12
11968 wr %r0, 0x41, %asi
11969 set sync_thr_counter4, %r23
11970#ifndef SPC
11971 ldxa [%g0]0x63, %r8
11972 and %r8, 0x38, %r8 ! Core ID
11973 add %r8, %r23, %r23
11974#else
11975 mov 0, %r8
11976#endif
11977 mov 0x4, %r16
11978iaw_startwait4_107:
11979 cas [%r23],%g0,%r16 !lock
11980 brz,a %r16, continue_iaw_4_107
11981 mov (~0x4&0xf), %r16
11982 ld [%r23], %r16
11983iaw_wait4_107:
11984 brnz %r16, iaw_wait4_107
11985 ld [%r23], %r16
11986 ba iaw_startwait4_107
11987 mov 0x4, %r16
11988continue_iaw_4_107:
11989 sllx %r16, %r8, %r16 !Mask for my core only
11990 ldxa [0x58]%asi, %r17 !Running_status
11991wait_for_stat_4_107:
11992 ldxa [0x50]%asi, %r13 !Running_rw
11993 cmp %r13, %r17
11994 bne,a %xcc, wait_for_stat_4_107
11995 ldxa [0x58]%asi, %r17 !Running_status
11996 stxa %r16, [0x68]%asi !Park (W1C)
11997 ldxa [0x50]%asi, %r14 !Running_rw
11998wait_for_iaw_4_107:
11999 ldxa [0x58]%asi, %r17 !Running_status
12000 cmp %r14, %r17
12001 bne,a %xcc, wait_for_iaw_4_107
12002 ldxa [0x50]%asi, %r14 !Running_rw
12003iaw_doit4_107:
12004 mov 0x38, %r18
12005iaw1_4_107:
12006 best_set_reg(0x00000000e0200000, %r20, %r19)
12007 or %r19, 0x1, %r19
12008 stxa %r19, [%r18]0x50
12009 stxa %r16, [0x60] %asi ! Unpark (W1S)
12010 st %g0, [%r23] !clear lock
12011 wr %r0, %r12, %asi ! restore %asi
12012 ta T_CHANGE_NONHPRIV
12013 .word 0xe93fc010 ! 141: STDF_R std %f20, [%r16, %r31]
12014 .word 0x91d020b4 ! 142: Tcc_I ta icc_or_xcc, %r0 + 180
12015splash_hpstate_4_108:
12016 ta T_CHANGE_NONHPRIV
12017 .word 0x8198210d ! 143: WRHPR_HPSTATE_I wrhpr %r0, 0x010d, %hpstate
12018dvapa_4_109:
12019 nop
12020 ta T_CHANGE_HPRIV
12021 mov 0xd56, %r20
12022 mov 0x1f, %r19
12023 sllx %r20, 23, %r20
12024 or %r19, %r20, %r19
12025 stxa %r19, [%g0] ASI_LSU_CONTROL
12026 mov 0x38, %r18
12027 stxa %r31, [%r18]0x58
12028 ta T_CHANGE_NONHPRIV
12029 .word 0x99a4c9d1 ! 144: FDIVd fdivd %f50, %f48, %f12
12030 .word 0x32800001 ! 1: BNE bne,a <label_0x1>
12031 .word 0x8d902109 ! 145: WRPR_PSTATE_I wrpr %r0, 0x0109, %pstate
12032memptr_4_111:
12033 set user_data_start, %r31
12034 .word 0x85827ceb ! 146: WRCCR_I wr %r9, 0x1ceb, %ccr
12035ceter_4_112:
12036 nop
12037 ta T_CHANGE_HPRIV
12038 mov 2, %r17
12039 sllx %r17, 60, %r17
12040 mov 0x18, %r16
12041 stxa %r17, [%r16]0x4c
12042 ta T_CHANGE_NONHPRIV
12043 .word 0xa5410000 ! 147: RDTICK rd %tick, %r18
12044 nop
12045 ta T_CHANGE_HPRIV ! macro
12046donret_4_113:
12047 rd %pc, %r12
12048 mov HIGHVA_HIGHNUM, %r10
12049 sllx %r10, 32, %r10
12050 or %r12, %r10, %r12
12051 add %r12, (donretarg_4_113-donret_4_113+4), %r12
12052 add %r12, 0x4, %r11 ! seq tnpc
12053 andn %r11, %r10, %r11 ! low VA tnpc
12054 wrpr %g0, 0x1, %tl
12055 wrpr %g0, %r12, %tpc
12056 wrpr %g0, %r11, %tnpc
12057 set (0x00217100 | (0x83 << 24)), %r13
12058 and %r12, 0xfff, %r14
12059 sllx %r14, 30, %r14
12060 or %r13, %r14, %r20
12061 wrpr %r20, %g0, %tstate
12062 wrhpr %g0, 0x69c, %htstate
12063 ta T_CHANGE_NONHPRIV ! rand=1 (4)
12064 ldx [%r11+%r0], %g1
12065 done
12066donretarg_4_113:
12067 .word 0xe6ffe095 ! 148: SWAPA_I swapa %r19, [%r31 + 0x0095] %asi
12068splash_tba_4_114:
12069 nop
12070 ta T_CHANGE_PRIV
12071 setx 0x0000000400380000, %r11, %r12
12072 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba
12073splash_htba_4_115:
12074 nop
12075 ta T_CHANGE_HPRIV
12076 setx 0x0000000200280000, %r11, %r12
12077 .word 0x8b98000c ! 150: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
12078fpinit_4_116:
12079 nop
12080 setx fp_data_quads, %r19, %r20
12081 ldd [%r20], %f0
12082 ldd [%r20+8], %f4
12083 ld [%r20+16], %fsr
12084 ld [%r20+24], %r19
12085 wr %r19, %g0, %gsr
12086 .word 0x91a009c4 ! 151: FDIVd fdivd %f0, %f4, %f8
12087tagged_4_117:
12088 taddcctv %r12, 0x1875, %r18
12089 .word 0xe607e02d ! 152: LDUW_I lduw [%r31 + 0x002d], %r19
12090#if (defined SPC || defined CMP)
12091!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_118)+0, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
12092!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_118)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
12093xir_4_118:
12094#else
12095#if (defined FC)
12096!! Generate XIR via RESET_GEN register
12097 ta T_CHANGE_HPRIV
12098 rdpr %pstate, %r18
12099 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
12100 wrpr %r18, %pstate
12101#ifndef XIR_RND_CORES
12102 ldxa [%g0] 0x63, %o1
12103 mov 1, %r18
12104 sllx %r18, %o1, %r18
12105#endif
12106 mov 0x30, %r19
12107 setx 0x8900000808, %r16, %r17
12108 mov 0x2, %r16
12109xir_4_118:
12110 stxa %r18, [%r19] 0x41
12111 stx %r16, [%r17]
12112#endif
12113#endif
12114 .word 0xa9842223 ! 153: WR_SET_SOFTINT_I wr %r16, 0x0223, %set_softint
12115splash_tick_4_119:
12116 nop
12117 ta T_CHANGE_HPRIV
12118 best_set_reg(0x858df4752dbd296e, %r16, %r17)
12119 .word 0x89800011 ! 154: WRTICK_R wr %r0, %r17, %tick
12120mondo_4_120:
12121 nop
12122 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
12123 stxa %r19, [%r0+0x3c0] %asi
12124 .word 0x9d92c010 ! 155: WRPR_WSTATE_R wrpr %r11, %r16, %wstate
12125 .word 0xe737c000 ! 156: STQF_R - %f19, [%r0, %r31]
12126 .word 0x8780204f ! 157: WRASI_I wr %r0, 0x004f, %asi
12127 .word 0xa06cb4d2 ! 158: UDIVX_I udivx %r18, 0xfffff4d2, %r16
12128splash_cmpr_4_121:
12129 mov 0, %r18
12130 sllx %r18, 63, %r18
12131 rd %tick, %r17
12132 add %r17, 0x50, %r17
12133 or %r17, %r18, %r17
12134 .word 0xb3800011 ! 159: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
12135 nop
12136 ta T_CHANGE_HPRIV ! macro
12137donret_4_122:
12138 rd %pc, %r12
12139 mov HIGHVA_HIGHNUM, %r10
12140 sllx %r10, 32, %r10
12141 or %r12, %r10, %r12
12142 add %r12, (donretarg_4_122-donret_4_122), %r12
12143 add %r12, 0x4, %r11 ! seq tnpc
12144 andn %r11, %r10, %r11 ! low VA tnpc
12145 wrpr %g0, 0x1, %tl
12146 wrpr %g0, %r12, %tpc
12147 wrpr %g0, %r11, %tnpc
12148 set (0x001c4c00 | (0x82 << 24)), %r13
12149 and %r12, 0xfff, %r14
12150 sllx %r14, 30, %r14
12151 or %r13, %r14, %r20
12152 wrpr %r20, %g0, %tstate
12153 wrhpr %g0, 0x1c05, %htstate
12154 ta T_CHANGE_NONPRIV ! rand=0 (4)
12155 ldx [%r12+%r0], %g1
12156 retry
12157donretarg_4_122:
12158 .word 0x9ba4c9c7 ! 160: FDIVd fdivd %f50, %f38, %f44
12159pmu_4_123:
12160 nop
12161 setx 0xffffffbdffffffae, %g1, %g7
12162 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
12163splash_tba_4_124:
12164 nop
12165 ta T_CHANGE_PRIV
12166 set 0x120000, %r12
12167 .word 0x8b90000c ! 162: WRPR_TBA_R wrpr %r0, %r12, %tba
12168mondo_4_125:
12169 nop
12170 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
12171 ta T_CHANGE_PRIV
12172 stxa %r8, [%r0+0x3e8] %asi
12173 .word 0x9d94c013 ! 163: WRPR_WSTATE_R wrpr %r19, %r19, %wstate
12174 .word 0xa190200e ! 164: WRPR_GL_I wrpr %r0, 0x000e, %-
12175trapasi_4_126:
12176 nop
12177 mov 0x30, %r1 ! (VA for ASI 0x5b)
12178 .word 0xdac04b60 ! 165: LDSWA_R ldswa [%r1, %r0] 0x5b, %r13
12179 .word 0x8d802000 ! 166: WRFPRS_I wr %r0, 0x0000, %fprs
12180splash_tba_4_127:
12181 nop
12182 ta T_CHANGE_PRIV
12183 setx 0x0000000400380000, %r11, %r12
12184 .word 0x8b90000c ! 167: WRPR_TBA_R wrpr %r0, %r12, %tba
12185 invalw
12186 mov 0xb0, %r30
12187 .word 0x83d0001e ! 168: Tcc_R te icc_or_xcc, %r0 + %r30
12188 nop
12189 ta T_CHANGE_HPRIV
12190 mov 0x4, %r10
12191 set sync_thr_counter6, %r23
12192#ifndef SPC
12193 ldxa [%g0]0x63, %o1
12194 and %o1, 0x38, %o1
12195 add %o1, %r23, %r23
12196#endif
12197 cas [%r23],%g0,%r10 !lock
12198 brnz %r10, sma_4_128
12199 rd %asi, %r12
12200 wr %g0, 0x40, %asi
12201 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
12202 set 0x001e1fff, %g1
12203 stxa %g1, [%g0 + 0x80] %asi
12204 wr %r12, %g0, %asi
12205 st %g0, [%r23]
12206sma_4_128:
12207 ta T_CHANGE_NONHPRIV
12208 .word 0xdbe7e00c ! 169: CASA_R casa [%r31] %asi, %r12, %r13
12209 .word 0xda97c032 ! 1: LDUHA_R lduha [%r31, %r18] 0x01, %r13
12210 .word 0x9f802a99 ! 170: SIR sir 0x0a99
12211 .word 0x8d902eff ! 171: WRPR_PSTATE_I wrpr %r0, 0x0eff, %pstate
12212ibp_4_130:
12213 nop
12214 ta T_CHANGE_NONHPRIV
12215 .word 0xe19fc3e0 ! 172: LDDFA_R ldda [%r31, %r0], %f16
12216 .word 0x966a209c ! 173: UDIVX_I udivx %r8, 0x009c, %r11
12217 .word 0xa36b0011 ! 174: SDIVX_R sdivx %r12, %r17, %r17
12218dvapa_4_131:
12219 nop
12220 ta T_CHANGE_HPRIV
12221 mov 0xce5, %r20
12222 mov 0x8, %r19
12223 sllx %r20, 23, %r20
12224 or %r19, %r20, %r19
12225 stxa %r19, [%g0] ASI_LSU_CONTROL
12226 mov 0x38, %r18
12227 stxa %r31, [%r18]0x58
12228 ta T_CHANGE_NONHPRIV
12229 .word 0xc32fc00c ! 175: STXFSR_R st-sfr %f1, [%r12, %r31]
12230 .word 0xa784a181 ! 176: WR_GRAPHICS_STATUS_REG_I wr %r18, 0x0181, %-
12231 nop
12232 ta T_CHANGE_HPRIV
12233 mov 0x4+1, %r10
12234 set sync_thr_counter5, %r23
12235#ifndef SPC
12236 ldxa [%g0]0x63, %o1
12237 and %o1, 0x38, %o1
12238 add %o1, %r23, %r23
12239 sllx %o1, 5, %o3 !(CID*256)
12240#endif
12241 cas [%r23],%g0,%r10 !lock
12242 brnz %r10, cwq_4_132
12243 rd %asi, %r12
12244 wr %g0, 0x40, %asi
12245 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
12246 and %l1, 0x3, %l1 ! Check if busy/enabled ..
12247 cmp %l1, 1
12248 bne cwq_4_132
12249 set CWQ_BASE, %l6
12250#ifndef SPC
12251 add %l6, %o3, %l6
12252#endif
12253 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
12254 best_set_reg(0x206100a0, %l1, %l2) !# Control Word
12255 sllx %l2, 32, %l2
12256 stx %l2, [%l6 + 0x0]
12257 membar #Sync
12258 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
12259 sub %l2, 0x40, %l2
12260 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
12261 wr %r12, %g0, %asi
12262 st %g0, [%r23]
12263cwq_4_132:
12264 ta T_CHANGE_NONHPRIV
12265 .word 0xa3414000 ! 177: RDPC rd %pc, %r17
12266fpinit_4_133:
12267 nop
12268 setx fp_data_quads, %r19, %r20
12269 ldd [%r20], %f0
12270 ldd [%r20+8], %f4
12271 ld [%r20+16], %fsr
12272 ld [%r20+24], %r19
12273 wr %r19, %g0, %gsr
12274 .word 0xc3e83d17 ! 178: PREFETCHA_I prefetcha [%r0, + 0xfffffd17] %asi, #one_read
12275splash_lsu_4_134:
12276 nop
12277 ta T_CHANGE_HPRIV
12278 set 0x134b0685, %r2
12279 mov 0x5, %r1
12280 sllx %r1, 32, %r1
12281 or %r1, %r2, %r2
12282 stxa %r2, [%r0] ASI_LSU_CONTROL
12283 ta T_CHANGE_NONHPRIV
12284 .word 0x3d400001 ! 179: FBPULE fbule,a,pn %fcc0, <label_0x1>
12285 .word 0x87802010 ! 180: WRASI_I wr %r0, 0x0010, %asi
12286#if (defined SPC || defined CMP)
12287!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_4_135)+40, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
12288!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_4_135)&0xffffffff) + 48, 16, 16)) -> intp(mask2tid(0x4),1,3,,,,,1)
12289xir_4_135:
12290#else
12291#if (defined FC)
12292!! Generate XIR via RESET_GEN register
12293 ta T_CHANGE_HPRIV
12294 rdpr %pstate, %r18
12295 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
12296 wrpr %r18, %pstate
12297#ifndef XIR_RND_CORES
12298 ldxa [%g0] 0x63, %o1
12299 mov 1, %r18
12300 sllx %r18, %o1, %r18
12301#endif
12302 mov 0x30, %r19
12303 setx 0x8900000808, %r16, %r17
12304 mov 0x2, %r16
12305xir_4_135:
12306 stxa %r18, [%r19] 0x41
12307 stx %r16, [%r17]
12308#endif
12309#endif
12310 .word 0xa98321f4 ! 181: WR_SET_SOFTINT_I wr %r12, 0x01f4, %set_softint
12311trapasi_4_136:
12312 nop
12313 mov 0x8, %r1 ! (VA for ASI 0x4a)
12314 .word 0xdad84940 ! 182: LDXA_R ldxa [%r1, %r0] 0x4a, %r13
12315intveclr_4_137:
12316 nop
12317 ta T_CHANGE_HPRIV
12318 setx 0xf93f90a02f8226ef, %r1, %r28
12319 stxa %r28, [%g0] 0x72
12320 ta T_CHANGE_NONHPRIV
12321 .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1>
12322tagged_4_138:
12323 tsubcctv %r12, 0x1628, %r4
12324 .word 0xda07e17c ! 184: LDUW_I lduw [%r31 + 0x017c], %r13
12325splash_hpstate_4_139:
12326 ta T_CHANGE_NONHPRIV
12327 .word 0x38800001 ! 1: BGU bgu,a <label_0x1>
12328 .word 0x8198220f ! 185: WRHPR_HPSTATE_I wrhpr %r0, 0x020f, %hpstate
12329 .word 0xda77c000 ! 186: STX_R stx %r13, [%r31 + %r0]
12330brcommon3_4_140:
12331 nop
12332 setx common_target, %r12, %r27
12333 lduw [%r27], %r12 ! Load common dest into dcache ..
12334 ba,a .+12
12335 .word 0xdb37e100 ! 1: STQF_I - %f13, [0x0100, %r31]
12336 ba,a .+8
12337 jmpl %r27+0, %r27
12338 .word 0x81983fcd ! 187: WRHPR_HPSTATE_I wrhpr %r0, 0x1fcd, %hpstate
12339 otherw
12340 mov 0x30, %r30
12341 .word 0x93d0001e ! 188: Tcc_R tne icc_or_xcc, %r0 + %r30
12342ibp_4_141:
12343 nop
12344 .word 0x87ac8a48 ! 189: FCMPd fcmpd %fcc<n>, %f18, %f8
12345tagged_4_142:
12346 tsubcctv %r19, 0x1890, %r4
12347 .word 0xd807e10d ! 190: LDUW_I lduw [%r31 + 0x010d], %r12
12348 .word 0x87802036 ! 191: WRASI_I wr %r0, 0x0036, %asi
12349intveclr_4_143:
12350 nop
12351 ta T_CHANGE_HPRIV
12352 setx 0x1e8b1ab5ee3cb020, %r1, %r28
12353 stxa %r28, [%g0] 0x72
12354 ta T_CHANGE_NONHPRIV
12355 .word 0x25400001 ! 192: FBPLG fblg,a,pn %fcc0, <label_0x1>
12356#if (defined SPC || defined CMP1)
12357!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_144) + 0, 16, 16)) -> intp(6,0,20,,,,,1)
12358!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_144)&0xffffffff) + 8, 16, 16)) -> intp(2,0,21,,,,,1)
12359#else
12360 set 0x33b082f0, %r28
12361#if (MAX_THREADS == 8)
12362 and %r28, 0x7ff, %r28
12363#endif
12364 stxa %r28, [%g0] 0x73
12365#endif
12366intvec_4_144:
12367 .word 0x39400001 ! 193: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
12368 .word 0x87802082 ! 194: WRASI_I wr %r0, 0x0082, %asi
12369splash_tick_4_145:
12370 nop
12371 ta T_CHANGE_HPRIV
12372 best_set_reg(0xc0801f37deafa8c2, %r16, %r17)
12373 .word 0x89800011 ! 195: WRTICK_R wr %r0, %r17, %tick
12374dvapa_4_146:
12375 nop
12376 ta T_CHANGE_HPRIV
12377 mov 0x94f, %r20
12378 mov 0x17, %r19
12379 sllx %r20, 23, %r20
12380 or %r19, %r20, %r19
12381 stxa %r19, [%g0] ASI_LSU_CONTROL
12382 mov 0x38, %r18
12383 stxa %r31, [%r18]0x58
12384 ta T_CHANGE_NONHPRIV
12385 .word 0xe1bfd920 ! 196: STDFA_R stda %f16, [%r0, %r31]
12386splash_tba_4_147:
12387 nop
12388 ta T_CHANGE_PRIV
12389 setx 0x0000000400380000, %r11, %r12
12390 .word 0x8b90000c ! 197: WRPR_TBA_R wrpr %r0, %r12, %tba
12391 .word 0xa4c23124 ! 198: ADDCcc_I addccc %r8, 0xfffff124, %r18
12392pmu_4_148:
12393 nop
12394 setx 0xffffffb6ffffffa8, %g1, %g7
12395 .word 0xa3800007 ! 199: WR_PERF_COUNTER_R wr %r0, %r7, %-
12396ibp_4_149:
12397 nop
12398 ta T_CHANGE_NONHPRIV
12399 .word 0xc19fe060 ! 200: LDDFA_I ldda [%r31, 0x0060], %f0
12400# 952 "diag.j"
12401cmpenall_4_150:
12402 nop
12403 nop
12404 ta T_CHANGE_HPRIV
12405 rd %asi, %r12
12406 wr %r0, 0x41, %asi
12407 set sync_thr_counter4, %r23
12408#ifndef SPC
12409 ldxa [%g0]0x63, %r8
12410 and %r8, 0x38, %r8 ! Core ID
12411 add %r8, %r23, %r23
12412 mov 0xff, %r9
12413 sllx %r9, %r8, %r9 ! My core mask
12414#else
12415 mov 0xff, %r9 ! My core mask
12416#endif
12417cmpenall_startwait4_150:
12418 mov 0x4, %r10
12419 cas [%r23],%g0,%r10 !lock
12420 brz,a %r10, continue_cmpenall_4_150
12421 nop
12422cmpenall_wait4_150:
12423 ld [%r23], %r10
12424 brnz %r10, cmpenall_wait4_150
12425 nop
12426 ba,a cmpenall_startwait4_150
12427continue_cmpenall_4_150:
12428 ldxa [0x58]%asi, %r14 !Running_status
12429wait_for_cmpstat_4_150:
12430 ldxa [0x50]%asi, %r13 !Running_rw
12431 cmp %r13, %r14
12432 bne,a %xcc, wait_for_cmpstat_4_150
12433 ldxa [0x58]%asi, %r14 !Running_status
12434 ldxa [0x10]%asi, %r14 !Get enabled threads
12435 and %r14, %r9, %r14 !My core mask
12436 stxa %r14, [0x60]%asi !W1S
12437 ldxa [0x58]%asi, %r16 !Running_status
12438wait_for_cmpstat2_4_150:
12439 and %r16, %r9, %r16 !My core mask
12440 cmp %r14, %r16
12441 bne,a %xcc, wait_for_cmpstat2_4_150
12442 ldxa [0x58]%asi, %r16 !Running_status
12443 st %g0, [%r23] !clear lock
12444#if (MULTIPASS > 0)
12445multipass_check_mt:
12446 rd %asi, %r12
12447 wr %g0, ASI_SCRATCHPAD, %asi
12448 ldxa [0x38]%asi, %r10
12449 cmp %r10, MULTIPASS
12450 inc %r10
12451 stxa %r10, [0x38]%asi
12452 be finish_diag
12453 wr %g0, %r12, %asi
12454lock_sync_thds_again:
12455 mov 0xff, %r10
12456 set sync_thr_counter4, %r23
12457#ifndef SPC
12458 add %o2,%r9,%r23 !Core's sync counter
12459#endif
12460 st %r10, [%r23] !lock sync_thr_counter4
12461 add %r23, 64, %r23
12462 st %r10, [%r23] !lock sync_thr_counter5
12463 add %r23, 64, %r23
12464 st %r10, [%r23] !lock sync_thr_counter6
12465 ba fork_threads
12466 wrpr %g0, %g0, %gl
12467#endif
12468 nop
12469 nop
12470 ta T_CHANGE_PRIV
12471 wrpr %g0, %g0, %gl
12472 nop
12473 nop
12474.text
12475 setx join_lbl_0_0, %g1, %g2
12476 jmp %g2
12477 nop
12478fork_lbl_0_2:
12479 ta T_CHANGE_NONHPRIV
12480vahole5_2_0:
12481 nop
12482 setx vahole_target2, %r18, %r27
12483 jmpl %r27+0, %r27
12484 ta T_CHANGE_PRIV
12485ibp_2_1:
12486 nop
12487 ta T_CHANGE_HPRIV
12488 mov 8, %r18
12489 rd %asi, %r12
12490 wr %r0, 0x41, %asi
12491 set sync_thr_counter4, %r23
12492#ifndef SPC
12493 ldxa [%g0]0x63, %r8
12494 and %r8, 0x38, %r8 ! Core ID
12495 add %r8, %r23, %r23
12496#else
12497 mov 0, %r8
12498#endif
12499 mov 0x2, %r16
12500ibp_startwait2_1:
12501 cas [%r23],%g0,%r16 !lock
12502 brz,a %r16, continue_ibp_2_1
12503 mov (~0x2&0xf), %r16
12504 ld [%r23], %r16
12505ibp_wait2_1:
12506 brnz %r16, ibp_wait2_1
12507 ld [%r23], %r16
12508 ba ibp_startwait2_1
12509 mov 0x2, %r16
12510continue_ibp_2_1:
12511 sllx %r16, %r8, %r16 !Mask for my core only
12512 ldxa [0x58]%asi, %r17 !Running_status
12513wait_for_stat_2_1:
12514 ldxa [0x50]%asi, %r13 !Running_rw
12515 cmp %r13, %r17
12516 bne,a %xcc, wait_for_stat_2_1
12517 ldxa [0x58]%asi, %r17 !Running_status
12518 stxa %r16, [0x68]%asi !Park (W1C)
12519 ldxa [0x50]%asi, %r14 !Running_rw
12520wait_for_ibp_2_1:
12521 ldxa [0x58]%asi, %r17 !Running_status
12522 cmp %r14, %r17
12523 bne,a %xcc, wait_for_ibp_2_1
12524 ldxa [0x50]%asi, %r14 !Running_rw
12525ibp_doit2_1:
12526 best_set_reg(0x00000040c4c00be7,%r19, %r20)
12527 stxa %r20, [%r18]0x42
12528 stxa %r16, [0x60] %asi !Unpark (W1S)
12529 st %g0, [%r23] !clear lock
12530 wr %r0, %r12, %asi !restore %asi
12531 .word 0xc19fe000 ! 1: LDDFA_I ldda [%r31, 0x0000], %f0
12532splash_cmpr_2_2:
12533 mov 0, %r18
12534 sllx %r18, 63, %r18
12535 rd %tick, %r17
12536 add %r17, 0x70, %r17
12537 or %r17, %r18, %r17
12538 .word 0xaf800011 ! 2: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
12539mondo_2_3:
12540 nop
12541 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
12542 ta T_CHANGE_PRIV
12543 stxa %r10, [%r0+0x3d0] %asi
12544 .word 0x9d940003 ! 3: WRPR_WSTATE_R wrpr %r16, %r3, %wstate
12545 .word 0xe19fe120 ! 4: LDDFA_I ldda [%r31, 0x0120], %f16
12546 nop
12547 ta T_CHANGE_HPRIV
12548 mov 0x2+1, %r10
12549 set sync_thr_counter5, %r23
12550#ifndef SPC
12551 ldxa [%g0]0x63, %o1
12552 and %o1, 0x38, %o1
12553 add %o1, %r23, %r23
12554 sllx %o1, 5, %o3 !(CID*256)
12555#endif
12556 cas [%r23],%g0,%r10 !lock
12557 brnz %r10, cwq_2_4
12558 rd %asi, %r12
12559 wr %g0, 0x40, %asi
12560 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
12561 and %l1, 0x3, %l1 ! Check if busy/enabled ..
12562 cmp %l1, 1
12563 bne cwq_2_4
12564 set CWQ_BASE, %l6
12565#ifndef SPC
12566 add %l6, %o3, %l6
12567#endif
12568 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
12569 best_set_reg(0x20610060, %l1, %l2) !# Control Word
12570 sllx %l2, 32, %l2
12571 stx %l2, [%l6 + 0x0]
12572 membar #Sync
12573 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
12574 sub %l2, 0x40, %l2
12575 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
12576 wr %r12, %g0, %asi
12577 st %g0, [%r23]
12578cwq_2_4:
12579 ta T_CHANGE_NONHPRIV
12580 .word 0xa1414000 ! 5: RDPC rd %pc, %r16
12581 nop
12582 ta T_CHANGE_HPRIV ! macro
12583donret_2_5:
12584 rd %pc, %r12
12585 mov HIGHVA_HIGHNUM, %r10
12586 sllx %r10, 32, %r10
12587 or %r12, %r10, %r12
12588 add %r12, (donretarg_2_5-donret_2_5), %r12
12589 add %r12, 0x8, %r11 ! nonseq tnpc
12590 wrpr %g0, 0x1, %tl
12591 wrpr %g0, %r12, %tpc
12592 wrpr %g0, %r11, %tnpc
12593 set (0x00ffc900 | (0x89 << 24)), %r13
12594 and %r12, 0xfff, %r14
12595 sllx %r14, 30, %r14
12596 or %r13, %r14, %r20
12597 wrpr %r20, %g0, %tstate
12598 wrhpr %g0, 0xd5f, %htstate
12599 ta T_CHANGE_NONPRIV ! rand=0 (2)
12600 ldx [%r11+%r0], %g1
12601 done
12602donretarg_2_5:
12603 .word 0x81982852 ! 6: WRHPR_HPSTATE_I wrhpr %r0, 0x0852, %hpstate
12604 .word 0xe937e118 ! 7: STQF_I - %f20, [0x0118, %r31]
12605jmptr_2_6:
12606 nop
12607 best_set_reg(0xe1a00000, %r20, %r27)
12608 .word 0xb7c6c000 ! 8: JMPL_R jmpl %r27 + %r0, %r27
12609 rd %tick, %r28
12610#if (MAX_THREADS == 8)
12611 sethi %hi(0x33800), %r27
12612#else
12613 sethi %hi(0x30000), %r27
12614#endif
12615 andn %r28, %r27, %r28
12616 ta T_CHANGE_HPRIV
12617 stxa %r28, [%g0] 0x73
12618intvec_2_7:
12619 .word 0x39400001 ! 9: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
12620 .word 0xa97021b0 ! 1: POPC_I popc 0x01b0, %r20
12621 .word 0x9f802601 ! 10: SIR sir 0x0601
12622 .word 0x8d802004 ! 11: WRFPRS_I wr %r0, 0x0004, %fprs
12623trapasi_2_8:
12624 nop
12625 mov 0x10, %r1 ! (VA for ASI 0x48)
12626 .word 0xe8d84900 ! 12: LDXA_R ldxa [%r1, %r0] 0x48, %r20
12627 .word 0xe81fe088 ! 13: LDD_I ldd [%r31 + 0x0088], %r20
12628 .word 0x32800001 ! 1: BNE bne,a <label_0x1>
12629 .word 0x8d902533 ! 14: WRPR_PSTATE_I wrpr %r0, 0x0533, %pstate
12630 nop
12631 ta T_CHANGE_HPRIV
12632 mov 0x2+1, %r10
12633 set sync_thr_counter5, %r23
12634#ifndef SPC
12635 ldxa [%g0]0x63, %o1
12636 and %o1, 0x38, %o1
12637 add %o1, %r23, %r23
12638 sllx %o1, 5, %o3 !(CID*256)
12639#endif
12640 cas [%r23],%g0,%r10 !lock
12641 brnz %r10, cwq_2_10
12642 rd %asi, %r12
12643 wr %g0, 0x40, %asi
12644 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
12645 and %l1, 0x3, %l1 ! Check if busy/enabled ..
12646 cmp %l1, 1
12647 bne cwq_2_10
12648 set CWQ_BASE, %l6
12649#ifndef SPC
12650 add %l6, %o3, %l6
12651#endif
12652 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
12653 best_set_reg(0x20610060, %l1, %l2) !# Control Word
12654 sllx %l2, 32, %l2
12655 stx %l2, [%l6 + 0x0]
12656 membar #Sync
12657 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
12658 sub %l2, 0x40, %l2
12659 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
12660 wr %r12, %g0, %asi
12661 st %g0, [%r23]
12662cwq_2_10:
12663 ta T_CHANGE_NONHPRIV
12664 .word 0x99414000 ! 15: RDPC rd %pc, %r12
12665brcommon2_2_11:
12666 nop
12667 setx common_target, %r12, %r27
12668 ba,a .+12
12669 .word 0xa9a209d2 ! 1: FDIVd fdivd %f8, %f18, %f20
12670 ba,a .+8
12671 jmpl %r27+0, %r27
12672 .word 0xe1bfe140 ! 16: STDFA_I stda %f16, [0x0140, %r31]
12673jmptr_2_12:
12674 nop
12675 best_set_reg(0xe1a00000, %r20, %r27)
12676 .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27
12677mondo_2_13:
12678 nop
12679 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
12680 ta T_CHANGE_PRIV
12681 stxa %r17, [%r0+0x3d8] %asi
12682 .word 0x9d944012 ! 18: WRPR_WSTATE_R wrpr %r17, %r18, %wstate
12683mondo_2_14:
12684 nop
12685 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
12686 stxa %r10, [%r0+0x3c8] %asi
12687 .word 0x9d948011 ! 19: WRPR_WSTATE_R wrpr %r18, %r17, %wstate
12688splash_cmpr_2_15:
12689 mov 0, %r18
12690 sllx %r18, 63, %r18
12691 rd %tick, %r17
12692 add %r17, 0x50, %r17
12693 or %r17, %r18, %r17
12694 ta T_CHANGE_HPRIV
12695 wrhpr %r17, %g0, %hsys_tick_cmpr
12696 .word 0xb3800011 ! 20: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
12697#if (defined SPC || defined CMP1)
12698!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_16) + 40, 16, 16)) -> intp(1,0,2,,,,,1)
12699!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_16)&0xffffffff) + 48, 16, 16)) -> intp(4,0,0,,,,,1)
12700#else
12701 set 0x19a0b56e, %r28
12702#if (MAX_THREADS == 8)
12703 and %r28, 0x7ff, %r28
12704#endif
12705 stxa %r28, [%g0] 0x73
12706#endif
12707intvec_2_16:
12708 .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
12709 .word 0x81dcc007 ! 22: FLUSH_R flush %r19, %r7, %r0
12710 .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1>
12711 .word 0x8d903001 ! 23: WRPR_PSTATE_I wrpr %r0, 0x1001, %pstate
12712 .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl
12713reduce_priv_lvl_2_18:
12714 ta T_CHANGE_NONHPRIV ! macro
12715mondo_2_19:
12716 nop
12717 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
12718 stxa %r19, [%r0+0x3d8] %asi
12719 .word 0x9d920014 ! 25: WRPR_WSTATE_R wrpr %r8, %r20, %wstate
12720 .word 0x81510000 ! 26: RDPR_TICK rdpr %tick, %r0
12721 .word 0x8799e0a9 ! 27: WRHPR_HINTP_I wrhpr %r7, 0x00a9, %hintp
12722fpinit_2_20:
12723 nop
12724 setx fp_data_quads, %r19, %r20
12725 ldd [%r20], %f0
12726 ldd [%r20+8], %f4
12727 ld [%r20+16], %fsr
12728 ld [%r20+24], %r19
12729 wr %r19, %g0, %gsr
12730 .word 0x91b00484 ! 28: FCMPLE32 fcmple32 %d0, %d4, %r8
12731mondo_2_21:
12732 nop
12733 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
12734 stxa %r13, [%r0+0x3c8] %asi
12735 .word 0x9d940013 ! 29: WRPR_WSTATE_R wrpr %r16, %r19, %wstate
12736splash_hpstate_2_22:
12737 .word 0x81983694 ! 30: WRHPR_HPSTATE_I wrhpr %r0, 0x1694, %hpstate
12738splash_tba_2_23:
12739 nop
12740 ta T_CHANGE_PRIV
12741 setx 0x00000004003a0000, %r11, %r12
12742 .word 0x8b90000c ! 31: WRPR_TBA_R wrpr %r0, %r12, %tba
12743trapasi_2_24:
12744 nop
12745 mov 0x110, %r1 ! (VA for ASI 0x4a)
12746 .word 0xe8d84940 ! 32: LDXA_R ldxa [%r1, %r0] 0x4a, %r20
12747 rd %tick, %r28
12748#if (MAX_THREADS == 8)
12749 sethi %hi(0x33800), %r27
12750#else
12751 sethi %hi(0x30000), %r27
12752#endif
12753 andn %r28, %r27, %r28
12754 ta T_CHANGE_HPRIV
12755 stxa %r28, [%g0] 0x73
12756intvec_2_25:
12757 .word 0x39400001 ! 33: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
12758 nop
12759 ta T_CHANGE_HPRIV
12760 mov 0x2, %r10
12761 set sync_thr_counter6, %r23
12762#ifndef SPC
12763 ldxa [%g0]0x63, %o1
12764 and %o1, 0x38, %o1
12765 add %o1, %r23, %r23
12766#endif
12767 cas [%r23],%g0,%r10 !lock
12768 brnz %r10, sma_2_26
12769 rd %asi, %r12
12770 wr %g0, 0x40, %asi
12771 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
12772 set 0x000a1fff, %g1
12773 stxa %g1, [%g0 + 0x80] %asi
12774 wr %r12, %g0, %asi
12775 st %g0, [%r23]
12776sma_2_26:
12777 ta T_CHANGE_NONHPRIV
12778 .word 0xe9e7e012 ! 34: CASA_R casa [%r31] %asi, %r18, %r20
12779 .word 0xe89fe090 ! 35: LDDA_I ldda [%r31, + 0x0090] %asi, %r20
12780 nop
12781 ta T_CHANGE_HPRIV
12782 mov 0x2, %r10
12783 set sync_thr_counter6, %r23
12784#ifndef SPC
12785 ldxa [%g0]0x63, %o1
12786 and %o1, 0x38, %o1
12787 add %o1, %r23, %r23
12788#endif
12789 cas [%r23],%g0,%r10 !lock
12790 brnz %r10, sma_2_27
12791 rd %asi, %r12
12792 wr %g0, 0x40, %asi
12793 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
12794 set 0x000e1fff, %g1
12795 stxa %g1, [%g0 + 0x80] %asi
12796 wr %r12, %g0, %asi
12797 st %g0, [%r23]
12798sma_2_27:
12799 ta T_CHANGE_NONHPRIV
12800 .word 0xe9e7e00b ! 36: CASA_R casa [%r31] %asi, %r11, %r20
12801 nop
12802 ta T_CHANGE_HPRIV ! macro
12803donret_2_28:
12804 rd %pc, %r12
12805 mov HIGHVA_HIGHNUM, %r10
12806 sllx %r10, 32, %r10
12807 or %r12, %r10, %r12
12808 add %r12, (donretarg_2_28-donret_2_28), %r12
12809 add %r12, 0x4, %r11 ! seq tnpc
12810 andn %r11, %r10, %r11 ! low VA tnpc
12811 wrpr %g0, 0x2, %tl
12812 wrpr %g0, %r12, %tpc
12813 wrpr %g0, %r11, %tnpc
12814 set (0x00e06a00 | (16 << 24)), %r13
12815 and %r12, 0xfff, %r14
12816 sllx %r14, 30, %r14
12817 or %r13, %r14, %r20
12818 wrpr %r20, %g0, %tstate
12819 wrhpr %g0, 0x1515, %htstate
12820 ta T_CHANGE_NONHPRIV ! rand=1 (2)
12821 retry
12822donretarg_2_28:
12823 .word 0x3e800001 ! 37: BVC bvc,a <label_0x1>
12824brcommon2_2_29:
12825 nop
12826 setx common_target, %r12, %r27
12827 ba,a .+12
12828 .word 0x99a0054b ! 1: FSQRTd fsqrt
12829 ba,a .+8
12830 jmpl %r27+0, %r27
12831 .word 0xe1bfe100 ! 38: STDFA_I stda %f16, [0x0100, %r31]
12832 .word 0x91950013 ! 39: WRPR_PIL_R wrpr %r20, %r19, %pil
12833 .word 0xd877e0ad ! 40: STX_I stx %r12, [%r31 + 0x00ad]
12834 nop
12835 ta T_CHANGE_HPRIV
12836 mov 0x2+1, %r10
12837 set sync_thr_counter5, %r23
12838#ifndef SPC
12839 ldxa [%g0]0x63, %o1
12840 and %o1, 0x38, %o1
12841 add %o1, %r23, %r23
12842 sllx %o1, 5, %o3 !(CID*256)
12843#endif
12844 cas [%r23],%g0,%r10 !lock
12845 brnz %r10, cwq_2_31
12846 rd %asi, %r12
12847 wr %g0, 0x40, %asi
12848 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
12849 and %l1, 0x3, %l1 ! Check if busy/enabled ..
12850 cmp %l1, 1
12851 bne cwq_2_31
12852 set CWQ_BASE, %l6
12853#ifndef SPC
12854 add %l6, %o3, %l6
12855#endif
12856 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
12857 best_set_reg(0x20610020, %l1, %l2) !# Control Word
12858 sllx %l2, 32, %l2
12859 stx %l2, [%l6 + 0x0]
12860 membar #Sync
12861 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
12862 sub %l2, 0x40, %l2
12863 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
12864 wr %r12, %g0, %asi
12865 st %g0, [%r23]
12866cwq_2_31:
12867 ta T_CHANGE_NONHPRIV
12868 .word 0xa9414000 ! 41: RDPC rd %pc, %r20
12869vahole6_2_32:
12870 nop
12871 mov 1, %r27
12872 sllx %r27, 49, %r27
12873 jmpl %r27+0, %r27
12874 ta T_CHANGE_NONHPRIV
12875 .word 0xe697c02d ! 42: LDUHA_R lduha [%r31, %r13] 0x01, %r19
12876 nop
12877 ta T_CHANGE_HPRIV
12878 mov 0x2, %r10
12879 set sync_thr_counter6, %r23
12880#ifndef SPC
12881 ldxa [%g0]0x63, %o1
12882 and %o1, 0x38, %o1
12883 add %o1, %r23, %r23
12884#endif
12885 cas [%r23],%g0,%r10 !lock
12886 brnz %r10, sma_2_33
12887 rd %asi, %r12
12888 wr %g0, 0x40, %asi
12889 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
12890 set 0x001e1fff, %g1
12891 stxa %g1, [%g0 + 0x80] %asi
12892 wr %r12, %g0, %asi
12893 st %g0, [%r23]
12894sma_2_33:
12895 ta T_CHANGE_NONHPRIV
12896 .word 0xe7e7e011 ! 43: CASA_R casa [%r31] %asi, %r17, %r19
12897 nop
12898 ta T_CHANGE_HPRIV ! macro
12899donret_2_34:
12900 rd %pc, %r12
12901 mov HIGHVA_HIGHNUM, %r10
12902 sllx %r10, 32, %r10
12903 or %r12, %r10, %r12
12904 add %r12, (donretarg_2_34-donret_2_34+4), %r12
12905 add %r12, 0x4, %r11 ! seq tnpc
12906 wrpr %g0, 0x1, %tl
12907 wrpr %g0, %r12, %tpc
12908 wrpr %g0, %r11, %tnpc
12909 set (0x000cb800 | (4 << 24)), %r13
12910 and %r12, 0xfff, %r14
12911 sllx %r14, 30, %r14
12912 or %r13, %r14, %r20
12913 wrpr %r20, %g0, %tstate
12914 wrhpr %g0, 0xf17, %htstate
12915 ta T_CHANGE_NONPRIV ! rand=0 (2)
12916 retry
12917donretarg_2_34:
12918 .word 0xe66fe185 ! 44: LDSTUB_I ldstub %r19, [%r31 + 0x0185]
12919 nop
12920 mov 0x80, %g3
12921 .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1>
12922 stxa %g3, [%g3] 0x5f
12923 .word 0xe65fc000 ! 45: LDX_R ldx [%r31 + %r0], %r19
12924#if (defined SPC || defined CMP)
12925!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_35)+40, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
12926!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_35)&0xffffffff) + 8, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
12927xir_2_35:
12928#else
12929#if (defined FC)
12930!! Generate XIR via RESET_GEN register
12931 ta T_CHANGE_HPRIV
12932 rdpr %pstate, %r18
12933 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
12934 wrpr %r18, %pstate
12935#ifndef XIR_RND_CORES
12936 ldxa [%g0] 0x63, %o1
12937 mov 1, %r18
12938 sllx %r18, %o1, %r18
12939#endif
12940 mov 0x30, %r19
12941 setx 0x8900000808, %r16, %r17
12942 mov 0x2, %r16
12943xir_2_35:
12944 stxa %r18, [%r19] 0x41
12945 stx %r16, [%r17]
12946#endif
12947#endif
12948 .word 0xa9833238 ! 46: WR_SET_SOFTINT_I wr %r12, 0x1238, %set_softint
12949 .word 0xe6dfc033 ! 47: LDXA_R ldxa [%r31, %r19] 0x01, %r19
12950 nop
12951 ta T_CHANGE_HPRIV ! macro
12952donret_2_37:
12953 rd %pc, %r12
12954 mov HIGHVA_HIGHNUM, %r10
12955 sllx %r10, 32, %r10
12956 or %r12, %r10, %r12
12957 add %r12, (donretarg_2_37-donret_2_37+4), %r12
12958 add %r12, 0x4, %r11 ! seq tnpc
12959 andn %r12, %r10, %r12 ! low VA tpc
12960 wrpr %g0, 0x2, %tl
12961 wrpr %g0, %r12, %tpc
12962 wrpr %g0, %r11, %tnpc
12963 set (0x00a25700 | (54 << 24)), %r13
12964 and %r12, 0xfff, %r14
12965 sllx %r14, 30, %r14
12966 or %r13, %r14, %r20
12967 wrpr %r20, %g0, %tstate
12968 wrhpr %g0, 0xcd1, %htstate
12969 ta T_CHANGE_NONPRIV ! rand=0 (2)
12970 ldx [%r11+%r0], %g1
12971 done
12972.align 32
12973donretarg_2_37:
12974 .word 0x819824dd ! 48: WRHPR_HPSTATE_I wrhpr %r0, 0x04dd, %hpstate
12975 .word 0x89800011 ! 49: WRTICK_R wr %r0, %r17, %tick
12976 .word 0xe1bfe0c0 ! 50: STDFA_I stda %f16, [0x00c0, %r31]
12977splash_lsu_2_40:
12978 nop
12979 ta T_CHANGE_HPRIV
12980 set 0x0251b571, %r2
12981 mov 0x7, %r1
12982 sllx %r1, 32, %r1
12983 or %r1, %r2, %r2
12984 stxa %r2, [%r0] ASI_LSU_CONTROL
12985 .word 0x3d400001 ! 51: FBPULE fbule,a,pn %fcc0, <label_0x1>
12986change_to_randtl_2_41:
12987 ta T_CHANGE_HPRIV ! macro
12988done_change_to_randtl_2_41:
12989 .word 0x8f902000 ! 52: WRPR_TL_I wrpr %r0, 0x0000, %tl
12990 .word 0xc1bfc3e0 ! 53: STDFA_R stda %f0, [%r0, %r31]
12991 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick
12992 nop
12993 ta T_CHANGE_HPRIV ! macro
12994donret_2_43:
12995 rd %pc, %r12
12996 mov HIGHVA_HIGHNUM, %r10
12997 sllx %r10, 32, %r10
12998 or %r12, %r10, %r12
12999 add %r12, (donretarg_2_43-donret_2_43+4), %r12
13000 add %r12, 0x4, %r11 ! seq tnpc
13001 wrpr %g0, 0x1, %tl
13002 wrpr %g0, %r12, %tpc
13003 wrpr %g0, %r11, %tnpc
13004 set (0x00e4ec00 | (0x83 << 24)), %r13
13005 and %r12, 0xfff, %r14
13006 sllx %r14, 30, %r14
13007 or %r13, %r14, %r20
13008 wrpr %r20, %g0, %tstate
13009 wrhpr %g0, 0x58d, %htstate
13010 ta T_CHANGE_NONPRIV ! rand=0 (2)
13011 .word 0x32800001 ! 1: BNE bne,a <label_0x1>
13012 done
13013.align 32
13014donretarg_2_43:
13015 .word 0x819834dd ! 55: WRHPR_HPSTATE_I wrhpr %r0, 0x14dd, %hpstate
13016 .word 0xe64fc000 ! 56: LDSB_R ldsb [%r31 + %r0], %r19
13017 .word 0xe71fe190 ! 57: LDDF_I ldd [%r31, 0x0190], %f19
13018 .word 0x87802010 ! 58: WRASI_I wr %r0, 0x0010, %asi
13019 .word 0x89800011 ! 59: WRTICK_R wr %r0, %r17, %tick
13020 nop
13021 ta T_CHANGE_HPRIV
13022 mov 0x2+1, %r10
13023 set sync_thr_counter5, %r23
13024#ifndef SPC
13025 ldxa [%g0]0x63, %o1
13026 and %o1, 0x38, %o1
13027 add %o1, %r23, %r23
13028 sllx %o1, 5, %o3 !(CID*256)
13029#endif
13030 cas [%r23],%g0,%r10 !lock
13031 brnz %r10, cwq_2_45
13032 rd %asi, %r12
13033 wr %g0, 0x40, %asi
13034 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
13035 and %l1, 0x3, %l1 ! Check if busy/enabled ..
13036 cmp %l1, 1
13037 bne cwq_2_45
13038 set CWQ_BASE, %l6
13039#ifndef SPC
13040 add %l6, %o3, %l6
13041#endif
13042 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
13043 best_set_reg(0x20610000, %l1, %l2) !# Control Word
13044 sllx %l2, 32, %l2
13045 stx %l2, [%l6 + 0x0]
13046 membar #Sync
13047 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
13048 sub %l2, 0x40, %l2
13049 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
13050 wr %r12, %g0, %asi
13051 st %g0, [%r23]
13052cwq_2_45:
13053 ta T_CHANGE_NONHPRIV
13054 .word 0x91414000 ! 60: RDPC rd %pc, %r8
13055mondo_2_46:
13056 nop
13057 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
13058 ta T_CHANGE_PRIV
13059 stxa %r19, [%r0+0x3e0] %asi
13060 .word 0x9d914001 ! 61: WRPR_WSTATE_R wrpr %r5, %r1, %wstate
13061 .word 0x91d02035 ! 62: Tcc_I ta icc_or_xcc, %r0 + 53
13062splash_lsu_2_47:
13063 nop
13064 ta T_CHANGE_HPRIV
13065 set 0xf007d4f1, %r2
13066 mov 0x5, %r1
13067 sllx %r1, 32, %r1
13068 or %r1, %r2, %r2
13069 stxa %r2, [%r0] ASI_LSU_CONTROL
13070 .word 0x3d400001 ! 63: FBPULE fbule,a,pn %fcc0, <label_0x1>
13071ibp_2_48:
13072 nop
13073 ta T_CHANGE_HPRIV
13074 mov 8, %r18
13075 rd %asi, %r12
13076 wr %r0, 0x41, %asi
13077 set sync_thr_counter4, %r23
13078#ifndef SPC
13079 ldxa [%g0]0x63, %r8
13080 and %r8, 0x38, %r8 ! Core ID
13081 add %r8, %r23, %r23
13082#else
13083 mov 0, %r8
13084#endif
13085 mov 0x2, %r16
13086ibp_startwait2_48:
13087 cas [%r23],%g0,%r16 !lock
13088 brz,a %r16, continue_ibp_2_48
13089 mov (~0x2&0xf), %r16
13090 ld [%r23], %r16
13091ibp_wait2_48:
13092 brnz %r16, ibp_wait2_48
13093 ld [%r23], %r16
13094 ba ibp_startwait2_48
13095 mov 0x2, %r16
13096continue_ibp_2_48:
13097 sllx %r16, %r8, %r16 !Mask for my core only
13098 ldxa [0x58]%asi, %r17 !Running_status
13099wait_for_stat_2_48:
13100 ldxa [0x50]%asi, %r13 !Running_rw
13101 cmp %r13, %r17
13102 bne,a %xcc, wait_for_stat_2_48
13103 ldxa [0x58]%asi, %r17 !Running_status
13104 stxa %r16, [0x68]%asi !Park (W1C)
13105 ldxa [0x50]%asi, %r14 !Running_rw
13106wait_for_ibp_2_48:
13107 ldxa [0x58]%asi, %r17 !Running_status
13108 cmp %r14, %r17
13109 bne,a %xcc, wait_for_ibp_2_48
13110 ldxa [0x50]%asi, %r14 !Running_rw
13111ibp_doit2_48:
13112 best_set_reg(0x00000040a1cbe75e,%r19, %r20)
13113 stxa %r20, [%r18]0x42
13114 stxa %r16, [0x60] %asi !Unpark (W1S)
13115 st %g0, [%r23] !clear lock
13116 wr %r0, %r12, %asi !restore %asi
13117 .word 0xe1bfd960 ! 64: STDFA_R stda %f16, [%r0, %r31]
13118splash_hpstate_2_49:
13119 .word 0x819828d5 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x08d5, %hpstate
13120 .word 0x8d9027b5 ! 66: WRPR_PSTATE_I wrpr %r0, 0x07b5, %pstate
13121 rd %tick, %r28
13122#if (MAX_THREADS == 8)
13123 sethi %hi(0x33800), %r27
13124#else
13125 sethi %hi(0x30000), %r27
13126#endif
13127 andn %r28, %r27, %r28
13128 ta T_CHANGE_HPRIV
13129 stxa %r28, [%g0] 0x73
13130intvec_2_51:
13131 .word 0x39400001 ! 67: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
13132 .word 0x95a049cd ! 68: FDIVd fdivd %f32, %f44, %f10
13133 nop
13134 ta T_CHANGE_HPRIV ! macro
13135donret_2_53:
13136 rd %pc, %r12
13137 mov HIGHVA_HIGHNUM, %r10
13138 sllx %r10, 32, %r10
13139 or %r12, %r10, %r12
13140 add %r12, (donretarg_2_53-donret_2_53+4), %r12
13141 add %r12, 0x4, %r11 ! seq tnpc
13142 wrpr %g0, 0x2, %tl
13143 wrpr %g0, %r12, %tpc
13144 wrpr %g0, %r11, %tnpc
13145 set (0x001b0900 | (57 << 24)), %r13
13146 and %r12, 0xfff, %r14
13147 sllx %r14, 30, %r14
13148 or %r13, %r14, %r20
13149 wrpr %r20, %g0, %tstate
13150 wrhpr %g0, 0x17a4, %htstate
13151 ta T_CHANGE_NONPRIV ! rand=0 (2)
13152 ldx [%r11+%r0], %g1
13153 done
13154donretarg_2_53:
13155 .word 0x33400001 ! 69: FBPE fbe,a,pn %fcc0, <label_0x1>
13156 set 0x109e, %l3
13157 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
13158 .word 0xa3b0c7d1 ! 70: PDIST pdistn %d34, %d48, %d48
13159 .word 0xa7a0016b ! 71: FABSq dis not found
13160
13161ibp_2_55:
13162 nop
13163 ta T_CHANGE_HPRIV
13164 mov 8, %r18
13165 rd %asi, %r12
13166 wr %r0, 0x41, %asi
13167 set sync_thr_counter4, %r23
13168#ifndef SPC
13169 ldxa [%g0]0x63, %r8
13170 and %r8, 0x38, %r8 ! Core ID
13171 add %r8, %r23, %r23
13172#else
13173 mov 0, %r8
13174#endif
13175 mov 0x2, %r16
13176ibp_startwait2_55:
13177 cas [%r23],%g0,%r16 !lock
13178 brz,a %r16, continue_ibp_2_55
13179 mov (~0x2&0xf), %r16
13180 ld [%r23], %r16
13181ibp_wait2_55:
13182 brnz %r16, ibp_wait2_55
13183 ld [%r23], %r16
13184 ba ibp_startwait2_55
13185 mov 0x2, %r16
13186continue_ibp_2_55:
13187 sllx %r16, %r8, %r16 !Mask for my core only
13188 ldxa [0x58]%asi, %r17 !Running_status
13189wait_for_stat_2_55:
13190 ldxa [0x50]%asi, %r13 !Running_rw
13191 cmp %r13, %r17
13192 bne,a %xcc, wait_for_stat_2_55
13193 ldxa [0x58]%asi, %r17 !Running_status
13194 stxa %r16, [0x68]%asi !Park (W1C)
13195 ldxa [0x50]%asi, %r14 !Running_rw
13196wait_for_ibp_2_55:
13197 ldxa [0x58]%asi, %r17 !Running_status
13198 cmp %r14, %r17
13199 bne,a %xcc, wait_for_ibp_2_55
13200 ldxa [0x50]%asi, %r14 !Running_rw
13201ibp_doit2_55:
13202 best_set_reg(0x000000402ee75e81,%r19, %r20)
13203 stxa %r20, [%r18]0x42
13204 stxa %r16, [0x60] %asi !Unpark (W1S)
13205 st %g0, [%r23] !clear lock
13206 wr %r0, %r12, %asi !restore %asi
13207 ta T_CHANGE_NONHPRIV
13208 .word 0xe1bfe120 ! 72: STDFA_I stda %f16, [0x0120, %r31]
13209 nop
13210 ta T_CHANGE_HPRIV ! macro
13211donret_2_56:
13212 rd %pc, %r12
13213 mov HIGHVA_HIGHNUM, %r10
13214 sllx %r10, 32, %r10
13215 or %r12, %r10, %r12
13216 add %r12, (donretarg_2_56-donret_2_56), %r12
13217 add %r12, 0x8, %r11 ! nonseq tnpc
13218 wrpr %g0, 0x1, %tl
13219 wrpr %g0, %r12, %tpc
13220 wrpr %g0, %r11, %tnpc
13221 set (0x005b3000 | (0x8b << 24)), %r13
13222 and %r12, 0xfff, %r14
13223 sllx %r14, 30, %r14
13224 or %r13, %r14, %r20
13225 wrpr %r20, %g0, %tstate
13226 wrhpr %g0, 0x1ddd, %htstate
13227 ta T_CHANGE_NONHPRIV ! rand=1 (2)
13228 retry
13229.align 32
13230donretarg_2_56:
13231 .word 0xe4ffe130 ! 73: SWAPA_I swapa %r18, [%r31 + 0x0130] %asi
13232brcommon3_2_57:
13233 nop
13234 setx common_target, %r12, %r27
13235 lduw [%r27], %r12 ! Load common dest into dcache ..
13236 ba,a .+12
13237 .word 0xe537c010 ! 1: STQF_R - %f18, [%r16, %r31]
13238 ba,a .+8
13239 jmpl %r27+0, %r27
13240 .word 0xe4dfc030 ! 74: LDXA_R ldxa [%r31, %r16] 0x01, %r18
13241 .word 0x91944002 ! 75: WRPR_PIL_R wrpr %r17, %r2, %pil
13242splash_cmpr_2_59:
13243 mov 1, %r18
13244 sllx %r18, 63, %r18
13245 rd %tick, %r17
13246 add %r17, 0x70, %r17
13247 or %r17, %r18, %r17
13248 ta T_CHANGE_PRIV
13249 .word 0xaf800011 ! 76: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
13250splash_cmpr_2_60:
13251 mov 0, %r18
13252 sllx %r18, 63, %r18
13253 rd %tick, %r17
13254 add %r17, 0x80, %r17
13255 or %r17, %r18, %r17
13256 ta T_CHANGE_HPRIV
13257 wrhpr %r17, %g0, %hsys_tick_cmpr
13258 .word 0xaf800011 ! 77: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
13259 .word 0x87802058 ! 78: WRASI_I wr %r0, 0x0058, %asi
13260brcommon3_2_61:
13261 nop
13262 setx common_target, %r12, %r27
13263 lduw [%r27], %r12 ! Load common dest into dcache ..
13264 ba,a .+12
13265 .word 0xe537c008 ! 1: STQF_R - %f18, [%r8, %r31]
13266 ba,a .+8
13267 jmpl %r27+0, %r27
13268 .word 0xe53fc011 ! 79: STDF_R std %f18, [%r17, %r31]
13269mondo_2_62:
13270 nop
13271 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
13272 ta T_CHANGE_PRIV
13273 stxa %r5, [%r0+0x3e0] %asi
13274 .word 0x9d92c009 ! 80: WRPR_WSTATE_R wrpr %r11, %r9, %wstate
13275 nop
13276 mov 0x80, %g3
13277 stxa %r7, [%r0] ASI_LSU_CONTROL
13278 stxa %g3, [%g3] 0x57
13279 .word 0xe45fc000 ! 81: LDX_R ldx [%r31 + %r0], %r18
13280 set 0x1341, %l3
13281 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
13282 .word 0x9bb187d4 ! 82: PDIST pdistn %d6, %d20, %d44
13283 brz,pt %r19, skip_2_63
13284 stxa %r14, [%r0] ASI_LSU_CONTROL
13285 .word 0xc36cf617 ! 1: PREFETCH_I prefetch [%r19 + 0xfffff617], #one_read
13286 stxa %r14, [%r0] ASI_LSU_CONTROL
13287.align 32
13288skip_2_63:
13289 .word 0xd23fc000 ! 83: STD_R std %r9, [%r31 + %r0]
13290 .word 0x9ba00170 ! 84: FABSq dis not found
13291
13292 nop
13293 ta T_CHANGE_HPRIV
13294 mov 0x2+1, %r10
13295 set sync_thr_counter5, %r23
13296#ifndef SPC
13297 ldxa [%g0]0x63, %o1
13298 and %o1, 0x38, %o1
13299 add %o1, %r23, %r23
13300 sllx %o1, 5, %o3 !(CID*256)
13301#endif
13302 cas [%r23],%g0,%r10 !lock
13303 brnz %r10, cwq_2_65
13304 rd %asi, %r12
13305 wr %g0, 0x40, %asi
13306 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
13307 and %l1, 0x3, %l1 ! Check if busy/enabled ..
13308 cmp %l1, 1
13309 bne cwq_2_65
13310 set CWQ_BASE, %l6
13311#ifndef SPC
13312 add %l6, %o3, %l6
13313#endif
13314 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
13315 best_set_reg(0x20610040, %l1, %l2) !# Control Word
13316 sllx %l2, 32, %l2
13317 stx %l2, [%l6 + 0x0]
13318 membar #Sync
13319 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
13320 sub %l2, 0x40, %l2
13321 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
13322 wr %r12, %g0, %asi
13323 st %g0, [%r23]
13324cwq_2_65:
13325 ta T_CHANGE_NONHPRIV
13326 .word 0x99414000 ! 85: RDPC rd %pc, %r12
13327 .word 0x95450000 ! 86: RD_SET_SOFTINT rd %set_softint, %r10
13328brcommon1_2_66:
13329 nop
13330 setx common_target, %r12, %r27
13331 lduw [%r27], %r12 ! Load common dest into dcache ..
13332 ba,a .+12
13333 .word 0x93b7c7c8 ! 1: PDIST pdistn %d62, %d8, %d40
13334 ba,a .+8
13335 jmpl %r27+0, %r27
13336 .word 0x9f8038b2 ! 87: SIR sir 0x18b2
13337pmu_2_67:
13338 nop
13339 setx 0xffffffbcffffffa5, %g1, %g7
13340 .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %-
13341#if (defined SPC || defined CMP)
13342!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_68)+8, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
13343!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_68)&0xffffffff) + 48, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
13344xir_2_68:
13345#else
13346#if (defined FC)
13347!! Generate XIR via RESET_GEN register
13348 ta T_CHANGE_HPRIV
13349 rdpr %pstate, %r18
13350 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
13351 wrpr %r18, %pstate
13352#ifndef XIR_RND_CORES
13353 ldxa [%g0] 0x63, %o1
13354 mov 1, %r18
13355 sllx %r18, %o1, %r18
13356#endif
13357 mov 0x30, %r19
13358 setx 0x8900000808, %r16, %r17
13359 mov 0x2, %r16
13360xir_2_68:
13361 stxa %r18, [%r19] 0x41
13362 stx %r16, [%r17]
13363#endif
13364#endif
13365 .word 0xa984a03f ! 89: WR_SET_SOFTINT_I wr %r18, 0x003f, %set_softint
13366 rd %tick, %r28
13367#if (MAX_THREADS == 8)
13368 sethi %hi(0x33800), %r27
13369#else
13370 sethi %hi(0x30000), %r27
13371#endif
13372 andn %r28, %r27, %r28
13373 ta T_CHANGE_HPRIV
13374 stxa %r28, [%g0] 0x73
13375intvec_2_69:
13376 .word 0x39400001 ! 90: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
13377fpinit_2_70:
13378 nop
13379 setx fp_data_quads, %r19, %r20
13380 ldd [%r20], %f0
13381 ldd [%r20+8], %f4
13382 ld [%r20+16], %fsr
13383 ld [%r20+24], %r19
13384 wr %r19, %g0, %gsr
13385 .word 0x87a80a44 ! 91: FCMPd fcmpd %fcc<n>, %f0, %f4
13386mondo_2_71:
13387 nop
13388 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
13389 ta T_CHANGE_PRIV
13390 stxa %r16, [%r0+0x3d8] %asi
13391 .word 0x9d94400c ! 92: WRPR_WSTATE_R wrpr %r17, %r12, %wstate
13392 .word 0x8d902aef ! 93: WRPR_PSTATE_I wrpr %r0, 0x0aef, %pstate
13393 .word 0x8d802000 ! 94: WRFPRS_I wr %r0, 0x0000, %fprs
13394 nop
13395 ta T_CHANGE_HPRIV
13396 mov 0x2, %r10
13397 set sync_thr_counter6, %r23
13398#ifndef SPC
13399 ldxa [%g0]0x63, %o1
13400 and %o1, 0x38, %o1
13401 add %o1, %r23, %r23
13402#endif
13403 cas [%r23],%g0,%r10 !lock
13404 brnz %r10, sma_2_73
13405 rd %asi, %r12
13406 wr %g0, 0x40, %asi
13407 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
13408 set 0x000a1fff, %g1
13409 stxa %g1, [%g0 + 0x80] %asi
13410 wr %r12, %g0, %asi
13411 st %g0, [%r23]
13412sma_2_73:
13413 ta T_CHANGE_NONHPRIV
13414 .word 0xd1e7e00d ! 95: CASA_R casa [%r31] %asi, %r13, %r8
13415ibp_2_74:
13416 nop
13417 ta T_CHANGE_HPRIV
13418 mov 8, %r18
13419 rd %asi, %r12
13420 wr %r0, 0x41, %asi
13421 set sync_thr_counter4, %r23
13422#ifndef SPC
13423 ldxa [%g0]0x63, %r8
13424 and %r8, 0x38, %r8 ! Core ID
13425 add %r8, %r23, %r23
13426#else
13427 mov 0, %r8
13428#endif
13429 mov 0x2, %r16
13430ibp_startwait2_74:
13431 cas [%r23],%g0,%r16 !lock
13432 brz,a %r16, continue_ibp_2_74
13433 mov (~0x2&0xf), %r16
13434 ld [%r23], %r16
13435ibp_wait2_74:
13436 brnz %r16, ibp_wait2_74
13437 ld [%r23], %r16
13438 ba ibp_startwait2_74
13439 mov 0x2, %r16
13440continue_ibp_2_74:
13441 sllx %r16, %r8, %r16 !Mask for my core only
13442 ldxa [0x58]%asi, %r17 !Running_status
13443wait_for_stat_2_74:
13444 ldxa [0x50]%asi, %r13 !Running_rw
13445 cmp %r13, %r17
13446 bne,a %xcc, wait_for_stat_2_74
13447 ldxa [0x58]%asi, %r17 !Running_status
13448 stxa %r16, [0x68]%asi !Park (W1C)
13449 ldxa [0x50]%asi, %r14 !Running_rw
13450wait_for_ibp_2_74:
13451 ldxa [0x58]%asi, %r17 !Running_status
13452 cmp %r14, %r17
13453 bne,a %xcc, wait_for_ibp_2_74
13454 ldxa [0x50]%asi, %r14 !Running_rw
13455ibp_doit2_74:
13456 best_set_reg(0x00000040b6de816c,%r19, %r20)
13457 stxa %r20, [%r18]0x42
13458 stxa %r16, [0x60] %asi !Unpark (W1S)
13459 st %g0, [%r23] !clear lock
13460 wr %r0, %r12, %asi !restore %asi
13461 ta T_CHANGE_NONHPRIV
13462 .word 0x95b447d1 ! 96: PDIST pdistn %d48, %d48, %d10
13463 .word 0xa9b0448d ! 97: FCMPLE32 fcmple32 %d32, %d44, %r20
13464trapasi_2_76:
13465 nop
13466 mov 0x20, %r1 ! (VA for ASI 0x5a)
13467 .word 0xd8884b40 ! 98: LDUBA_R lduba [%r1, %r0] 0x5a, %r12
13468 .word 0x81460000 ! 99: RD_STICK_REG stbar
13469jmptr_2_77:
13470 nop
13471 best_set_reg(0xe0a00000, %r20, %r27)
13472 .word 0xb7c6c000 ! 100: JMPL_R jmpl %r27 + %r0, %r27
13473pmu_2_78:
13474 nop
13475 ta T_CHANGE_PRIV
13476 setx 0xffffffb6ffffffab, %g1, %g7
13477 .word 0xa3800007 ! 101: WR_PERF_COUNTER_R wr %r0, %r7, %-
13478memptr_2_79:
13479 set 0x60540000, %r31
13480 .word 0x8584be6c ! 102: WRCCR_I wr %r18, 0x1e6c, %ccr
13481 .word 0xd8cfe1f8 ! 103: LDSBA_I ldsba [%r31, + 0x01f8] %asi, %r12
13482change_to_randtl_2_80:
13483 ta T_CHANGE_PRIV ! macro
13484done_change_to_randtl_2_80:
13485 .word 0x8f902000 ! 104: WRPR_TL_I wrpr %r0, 0x0000, %tl
13486pmu_2_81:
13487 nop
13488 setx 0xffffffbcffffffa7, %g1, %g7
13489 .word 0xa3800007 ! 105: WR_PERF_COUNTER_R wr %r0, %r7, %-
13490splash_lsu_2_82:
13491 nop
13492 ta T_CHANGE_HPRIV
13493 set 0x918c3bf2, %r2
13494 mov 0x1, %r1
13495 sllx %r1, 32, %r1
13496 or %r1, %r2, %r2
13497 .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1>
13498 stxa %r2, [%r0] ASI_LSU_CONTROL
13499 .word 0x3d400001 ! 106: FBPULE fbule,a,pn %fcc0, <label_0x1>
13500 .word 0xd8cfe048 ! 107: LDSBA_I ldsba [%r31, + 0x0048] %asi, %r12
13501 .word 0xc30fc011 ! 1: LDXFSR_R ld-fsr [%r31, %r17], %f1
13502 .word 0x9f8033ba ! 108: SIR sir 0x13ba
13503 .word 0xd8dfe1e8 ! 109: LDXA_I ldxa [%r31, + 0x01e8] %asi, %r12
13504 .word 0x87802055 ! 110: WRASI_I wr %r0, 0x0055, %asi
13505mondo_2_83:
13506 nop
13507 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
13508 stxa %r18, [%r0+0x3e8] %asi
13509 .word 0x9d910013 ! 111: WRPR_WSTATE_R wrpr %r4, %r19, %wstate
13510 .word 0x81460000 ! 112: RD_STICK_REG stbar
13511vahole1_2_84:
13512 nop
13513 ta T_CHANGE_NONHPRIV
13514 setx vahole_target1, %r18, %r27
13515 jmpl %r27+0, %r27
13516 .word 0x9bb50488 ! 113: FCMPLE32 fcmple32 %d20, %d8, %r13
13517 nop
13518 ta T_CHANGE_HPRIV
13519 mov 0x2+1, %r10
13520 set sync_thr_counter5, %r23
13521#ifndef SPC
13522 ldxa [%g0]0x63, %o1
13523 and %o1, 0x38, %o1
13524 add %o1, %r23, %r23
13525 sllx %o1, 5, %o3 !(CID*256)
13526#endif
13527 cas [%r23],%g0,%r10 !lock
13528 brnz %r10, cwq_2_85
13529 rd %asi, %r12
13530 wr %g0, 0x40, %asi
13531 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
13532 and %l1, 0x3, %l1 ! Check if busy/enabled ..
13533 cmp %l1, 1
13534 bne cwq_2_85
13535 set CWQ_BASE, %l6
13536#ifndef SPC
13537 add %l6, %o3, %l6
13538#endif
13539 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
13540 best_set_reg(0x206100b0, %l1, %l2) !# Control Word
13541 sllx %l2, 32, %l2
13542 stx %l2, [%l6 + 0x0]
13543 membar #Sync
13544 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
13545 sub %l2, 0x40, %l2
13546 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
13547 wr %r12, %g0, %asi
13548 st %g0, [%r23]
13549cwq_2_85:
13550 ta T_CHANGE_NONHPRIV
13551 .word 0xa5414000 ! 114: RDPC rd %pc, %r18
13552#if (defined SPC || defined CMP1)
13553!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_86) + 0, 16, 16)) -> intp(2,0,25,,,,,1)
13554!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_86)&0xffffffff) + 0, 16, 16)) -> intp(3,0,25,,,,,1)
13555#else
13556 set 0xfc50219b, %r28
13557#if (MAX_THREADS == 8)
13558 and %r28, 0x7ff, %r28
13559#endif
13560 stxa %r28, [%g0] 0x73
13561#endif
13562intvec_2_86:
13563 .word 0x39400001 ! 115: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
13564pmu_2_87:
13565 nop
13566 setx 0xffffffbaffffffad, %g1, %g7
13567 .word 0xa3800007 ! 116: WR_PERF_COUNTER_R wr %r0, %r7, %-
13568trapasi_2_88:
13569 nop
13570 mov 0x10, %r1 ! (VA for ASI 0x49)
13571 .word 0xd8c84920 ! 117: LDSBA_R ldsba [%r1, %r0] 0x49, %r12
13572 .word 0x99450000 ! 118: RD_SET_SOFTINT rd %set_softint, %r12
13573fpinit_2_89:
13574 nop
13575 setx fp_data_quads, %r19, %r20
13576 ldd [%r20], %f0
13577 ldd [%r20+8], %f4
13578 ld [%r20+16], %fsr
13579 ld [%r20+24], %r19
13580 wr %r19, %g0, %gsr
13581 .word 0xc3e83d23 ! 119: PREFETCHA_I prefetcha [%r0, + 0xfffffd23] %asi, #one_read
13582 .word 0xe63fc012 ! 1: STD_R std %r19, [%r31 + %r18]
13583 .word 0x9f802c49 ! 120: SIR sir 0x0c49
13584 nop
13585 ta T_CHANGE_HPRIV ! macro
13586donret_2_90:
13587 rd %pc, %r12
13588 mov HIGHVA_HIGHNUM, %r10
13589 sllx %r10, 32, %r10
13590 or %r12, %r10, %r12
13591 add %r12, (donretarg_2_90-donret_2_90+4), %r12
13592 add %r12, 0x4, %r11 ! seq tnpc
13593 wrpr %g0, 0x1, %tl
13594 wrpr %g0, %r12, %tpc
13595 wrpr %g0, %r11, %tnpc
13596 set (0x00ec0000 | (0x4f << 24)), %r13
13597 and %r12, 0xfff, %r14
13598 sllx %r14, 30, %r14
13599 or %r13, %r14, %r20
13600 wrpr %r20, %g0, %tstate
13601 wrhpr %g0, 0x459, %htstate
13602 ta T_CHANGE_NONPRIV ! rand=0 (2)
13603 retry
13604.align 32
13605donretarg_2_90:
13606 .word 0xe66fe19d ! 121: LDSTUB_I ldstub %r19, [%r31 + 0x019d]
13607 .word 0xe73fc00b ! 1: STDF_R std %f19, [%r11, %r31]
13608 .word 0x9f80226b ! 122: SIR sir 0x026b
13609splash_htba_2_91:
13610 nop
13611 ta T_CHANGE_HPRIV
13612 setx 0x00000002002a0000, %r11, %r12
13613 .word 0x8b98000c ! 123: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
13614 nop
13615 ta T_CHANGE_HPRIV
13616 mov 0x2+1, %r10
13617 set sync_thr_counter5, %r23
13618#ifndef SPC
13619 ldxa [%g0]0x63, %o1
13620 and %o1, 0x38, %o1
13621 add %o1, %r23, %r23
13622 sllx %o1, 5, %o3 !(CID*256)
13623#endif
13624 cas [%r23],%g0,%r10 !lock
13625 brnz %r10, cwq_2_92
13626 rd %asi, %r12
13627 wr %g0, 0x40, %asi
13628 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
13629 and %l1, 0x3, %l1 ! Check if busy/enabled ..
13630 cmp %l1, 1
13631 bne cwq_2_92
13632 set CWQ_BASE, %l6
13633#ifndef SPC
13634 add %l6, %o3, %l6
13635#endif
13636 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
13637 best_set_reg(0x206100e0, %l1, %l2) !# Control Word
13638 sllx %l2, 32, %l2
13639 stx %l2, [%l6 + 0x0]
13640 membar #Sync
13641 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
13642 sub %l2, 0x40, %l2
13643 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
13644 wr %r12, %g0, %asi
13645 st %g0, [%r23]
13646cwq_2_92:
13647 ta T_CHANGE_NONHPRIV
13648 .word 0xa9414000 ! 124: RDPC rd %pc, %r20
13649 rd %tick, %r28
13650#if (MAX_THREADS == 8)
13651 sethi %hi(0x33800), %r27
13652#else
13653 sethi %hi(0x30000), %r27
13654#endif
13655 andn %r28, %r27, %r28
13656 ta T_CHANGE_HPRIV
13657 stxa %r28, [%g0] 0x73
13658intvec_2_93:
13659 .word 0x39400001 ! 125: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
13660 .word 0x8d802000 ! 126: WRFPRS_I wr %r0, 0x0000, %fprs
13661 .word 0x91a4c9b0 ! 127: FDIVs fdivs %f19, %f16, %f8
13662 .word 0x95a089c4 ! 128: FDIVd fdivd %f2, %f4, %f10
13663 fbg,a,pn %fcc0, skip_2_96
13664 bne,a skip_2_96
13665.align 2048
13666skip_2_96:
13667 .word 0xa9a349d2 ! 129: FDIVd fdivd %f44, %f18, %f20
13668 .word 0xe8800b40 ! 130: LDUWA_R lduwa [%r0, %r0] 0x5a, %r20
13669intveclr_2_97:
13670 nop
13671 ta T_CHANGE_HPRIV
13672 setx 0xe5ce675ea8bf42c9, %r1, %r28
13673 stxa %r28, [%g0] 0x72
13674 .word 0x25400001 ! 131: FBPLG fblg,a,pn %fcc0, <label_0x1>
13675splash_hpstate_2_98:
13676 .word 0x81982fdf ! 132: WRHPR_HPSTATE_I wrhpr %r0, 0x0fdf, %hpstate
13677trapasi_2_99:
13678 nop
13679 mov 0x0, %r1 ! (VA for ASI 0x72)
13680 .word 0xe8c04e40 ! 133: LDSWA_R ldswa [%r1, %r0] 0x72, %r20
13681#if (defined SPC || defined CMP)
13682!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_100)+24, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
13683!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_100)&0xffffffff) + 40, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
13684xir_2_100:
13685#else
13686#if (defined FC)
13687!! Generate XIR via RESET_GEN register
13688 ta T_CHANGE_HPRIV
13689 rdpr %pstate, %r18
13690 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
13691 wrpr %r18, %pstate
13692#ifndef XIR_RND_CORES
13693 ldxa [%g0] 0x63, %o1
13694 mov 1, %r18
13695 sllx %r18, %o1, %r18
13696#endif
13697 mov 0x30, %r19
13698 setx 0x8900000808, %r16, %r17
13699 mov 0x2, %r16
13700xir_2_100:
13701 stxa %r18, [%r19] 0x41
13702 stx %r16, [%r17]
13703#endif
13704#endif
13705 .word 0xa9823edf ! 134: WR_SET_SOFTINT_I wr %r8, 0x1edf, %set_softint
13706intveclr_2_101:
13707 nop
13708 ta T_CHANGE_HPRIV
13709 setx 0xdb7d0fcc18ef3cd6, %r1, %r28
13710 stxa %r28, [%g0] 0x72
13711 ta T_CHANGE_NONHPRIV
13712 .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, <label_0x1>
13713intveclr_2_102:
13714 nop
13715 ta T_CHANGE_HPRIV
13716 setx 0xc1129efd709f7b9b, %r1, %r28
13717 stxa %r28, [%g0] 0x72
13718 .word 0x25400001 ! 136: FBPLG fblg,a,pn %fcc0, <label_0x1>
13719 nop
13720 ta T_CHANGE_HPRIV ! macro
13721donret_2_103:
13722 rd %pc, %r12
13723 mov HIGHVA_HIGHNUM, %r10
13724 sllx %r10, 32, %r10
13725 or %r12, %r10, %r12
13726 add %r12, (donretarg_2_103-donret_2_103), %r12
13727 add %r12, 0x8, %r11 ! nonseq tnpc
13728 wrpr %g0, 0x2, %tl
13729 wrpr %g0, %r12, %tpc
13730 wrpr %g0, %r11, %tnpc
13731 set (0x00caf500 | (0x58 << 24)), %r13
13732 and %r12, 0xfff, %r14
13733 sllx %r14, 30, %r14
13734 or %r13, %r14, %r20
13735 wrpr %r20, %g0, %tstate
13736 wrhpr %g0, 0x118d, %htstate
13737 ta T_CHANGE_NONPRIV ! rand=0 (2)
13738 ldx [%r11+%r0], %g1
13739 done
13740donretarg_2_103:
13741 .word 0xe86fe051 ! 137: LDSTUB_I ldstub %r20, [%r31 + 0x0051]
13742ibp_2_104:
13743 nop
13744 ta T_CHANGE_HPRIV
13745 mov 8, %r18
13746 rd %asi, %r12
13747 wr %r0, 0x41, %asi
13748 set sync_thr_counter4, %r23
13749#ifndef SPC
13750 ldxa [%g0]0x63, %r8
13751 and %r8, 0x38, %r8 ! Core ID
13752 add %r8, %r23, %r23
13753#else
13754 mov 0, %r8
13755#endif
13756 mov 0x2, %r16
13757ibp_startwait2_104:
13758 cas [%r23],%g0,%r16 !lock
13759 brz,a %r16, continue_ibp_2_104
13760 mov (~0x2&0xf), %r16
13761 ld [%r23], %r16
13762ibp_wait2_104:
13763 brnz %r16, ibp_wait2_104
13764 ld [%r23], %r16
13765 ba ibp_startwait2_104
13766 mov 0x2, %r16
13767continue_ibp_2_104:
13768 sllx %r16, %r8, %r16 !Mask for my core only
13769 ldxa [0x58]%asi, %r17 !Running_status
13770wait_for_stat_2_104:
13771 ldxa [0x50]%asi, %r13 !Running_rw
13772 cmp %r13, %r17
13773 bne,a %xcc, wait_for_stat_2_104
13774 ldxa [0x58]%asi, %r17 !Running_status
13775 stxa %r16, [0x68]%asi !Park (W1C)
13776 ldxa [0x50]%asi, %r14 !Running_rw
13777wait_for_ibp_2_104:
13778 ldxa [0x58]%asi, %r17 !Running_status
13779 cmp %r14, %r17
13780 bne,a %xcc, wait_for_ibp_2_104
13781 ldxa [0x50]%asi, %r14 !Running_rw
13782ibp_doit2_104:
13783 best_set_reg(0x00000040a6c16cd8,%r19, %r20)
13784 stxa %r20, [%r18]0x42
13785 stxa %r16, [0x60] %asi !Unpark (W1S)
13786 st %g0, [%r23] !clear lock
13787 wr %r0, %r12, %asi !restore %asi
13788 .word 0xe19fdb60 ! 138: LDDFA_R ldda [%r31, %r0], %f16
13789 nop
13790 ta T_CHANGE_HPRIV
13791 mov 0x2, %r10
13792 set sync_thr_counter6, %r23
13793#ifndef SPC
13794 ldxa [%g0]0x63, %o1
13795 and %o1, 0x38, %o1
13796 add %o1, %r23, %r23
13797#endif
13798 cas [%r23],%g0,%r10 !lock
13799 brnz %r10, sma_2_105
13800 rd %asi, %r12
13801 wr %g0, 0x40, %asi
13802 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
13803 set 0x001a1fff, %g1
13804 stxa %g1, [%g0 + 0x80] %asi
13805 wr %r12, %g0, %asi
13806 st %g0, [%r23]
13807sma_2_105:
13808 ta T_CHANGE_NONHPRIV
13809 .word 0xe9e7e00a ! 139: CASA_R casa [%r31] %asi, %r10, %r20
13810splash_cmpr_2_106:
13811 mov 0, %r18
13812 sllx %r18, 63, %r18
13813 rd %tick, %r17
13814 add %r17, 0x100, %r17
13815 or %r17, %r18, %r17
13816 ta T_CHANGE_HPRIV
13817 wrhpr %r17, %g0, %hsys_tick_cmpr
13818 .word 0xb3800011 ! 140: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
13819 .word 0xe9e7e00a ! 141: CASA_R casa [%r31] %asi, %r10, %r20
13820 .word 0x93d020b2 ! 142: Tcc_I tne icc_or_xcc, %r0 + 178
13821splash_hpstate_2_108:
13822 ta T_CHANGE_NONHPRIV
13823 .word 0x81983f1d ! 143: WRHPR_HPSTATE_I wrhpr %r0, 0x1f1d, %hpstate
13824dvapa_2_109:
13825 nop
13826 ta T_CHANGE_HPRIV
13827 mov 0xe47, %r20
13828 mov 0x12, %r19
13829 sllx %r20, 23, %r20
13830 or %r19, %r20, %r19
13831 stxa %r19, [%g0] ASI_LSU_CONTROL
13832 mov 0x38, %r18
13833 stxa %r31, [%r18]0x58
13834 ta T_CHANGE_NONHPRIV
13835 .word 0x87a88a50 ! 144: FCMPd fcmpd %fcc<n>, %f2, %f16
13836 .word 0x3a800001 ! 1: BCC bcc,a <label_0x1>
13837 .word 0x8d903a97 ! 145: WRPR_PSTATE_I wrpr %r0, 0x1a97, %pstate
13838memptr_2_111:
13839 set user_data_start, %r31
13840 .word 0x85823267 ! 146: WRCCR_I wr %r8, 0x1267, %ccr
13841ceter_2_112:
13842 nop
13843 ta T_CHANGE_HPRIV
13844 mov 6, %r17
13845 sllx %r17, 60, %r17
13846 mov 0x18, %r16
13847 stxa %r17, [%r16]0x4c
13848 ta T_CHANGE_NONHPRIV
13849 .word 0xa3410000 ! 147: RDTICK rd %tick, %r17
13850 nop
13851 ta T_CHANGE_HPRIV ! macro
13852donret_2_113:
13853 rd %pc, %r12
13854 mov HIGHVA_HIGHNUM, %r10
13855 sllx %r10, 32, %r10
13856 or %r12, %r10, %r12
13857 add %r12, (donretarg_2_113-donret_2_113+4), %r12
13858 add %r12, 0x4, %r11 ! seq tnpc
13859 andn %r11, %r10, %r11 ! low VA tnpc
13860 wrpr %g0, 0x1, %tl
13861 wrpr %g0, %r12, %tpc
13862 wrpr %g0, %r11, %tnpc
13863 set (0x00874400 | (0x58 << 24)), %r13
13864 and %r12, 0xfff, %r14
13865 sllx %r14, 30, %r14
13866 or %r13, %r14, %r20
13867 wrpr %r20, %g0, %tstate
13868 wrhpr %g0, 0xd94, %htstate
13869 ta T_CHANGE_NONHPRIV ! rand=1 (2)
13870 ldx [%r11+%r0], %g1
13871 done
13872donretarg_2_113:
13873 .word 0xe6ffe05c ! 148: SWAPA_I swapa %r19, [%r31 + 0x005c] %asi
13874splash_tba_2_114:
13875 nop
13876 ta T_CHANGE_PRIV
13877 setx 0x00000004003a0000, %r11, %r12
13878 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba
13879splash_htba_2_115:
13880 nop
13881 ta T_CHANGE_HPRIV
13882 setx 0x00000002002a0000, %r11, %r12
13883 .word 0x8b98000c ! 150: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
13884fpinit_2_116:
13885 nop
13886 setx fp_data_quads, %r19, %r20
13887 ldd [%r20], %f0
13888 ldd [%r20+8], %f4
13889 ld [%r20+16], %fsr
13890 ld [%r20+24], %r19
13891 wr %r19, %g0, %gsr
13892 .word 0x91a009c4 ! 151: FDIVd fdivd %f0, %f4, %f8
13893tagged_2_117:
13894 taddcctv %r18, 0x15da, %r18
13895 .word 0xe607e0e7 ! 152: LDUW_I lduw [%r31 + 0x00e7], %r19
13896#if (defined SPC || defined CMP)
13897!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_118)+24, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
13898!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_118)&0xffffffff) + 40, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
13899xir_2_118:
13900#else
13901#if (defined FC)
13902!! Generate XIR via RESET_GEN register
13903 ta T_CHANGE_HPRIV
13904 rdpr %pstate, %r18
13905 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
13906 wrpr %r18, %pstate
13907#ifndef XIR_RND_CORES
13908 ldxa [%g0] 0x63, %o1
13909 mov 1, %r18
13910 sllx %r18, %o1, %r18
13911#endif
13912 mov 0x30, %r19
13913 setx 0x8900000808, %r16, %r17
13914 mov 0x2, %r16
13915xir_2_118:
13916 stxa %r18, [%r19] 0x41
13917 stx %r16, [%r17]
13918#endif
13919#endif
13920 .word 0xa9817e7d ! 153: WR_SET_SOFTINT_I wr %r5, 0x1e7d, %set_softint
13921 .word 0x89800011 ! 154: WRTICK_R wr %r0, %r17, %tick
13922mondo_2_120:
13923 nop
13924 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
13925 stxa %r3, [%r0+0x3c0] %asi
13926 .word 0x9d904006 ! 155: WRPR_WSTATE_R wrpr %r1, %r6, %wstate
13927 .word 0xe737c000 ! 156: STQF_R - %f19, [%r0, %r31]
13928 .word 0x87802016 ! 157: WRASI_I wr %r0, 0x0016, %asi
13929 .word 0x9a68e29e ! 158: UDIVX_I udivx %r3, 0x029e, %r13
13930splash_cmpr_2_121:
13931 mov 1, %r18
13932 sllx %r18, 63, %r18
13933 rd %tick, %r17
13934 add %r17, 0x60, %r17
13935 or %r17, %r18, %r17
13936 .word 0xb3800011 ! 159: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
13937 nop
13938 ta T_CHANGE_HPRIV ! macro
13939donret_2_122:
13940 rd %pc, %r12
13941 mov HIGHVA_HIGHNUM, %r10
13942 sllx %r10, 32, %r10
13943 or %r12, %r10, %r12
13944 add %r12, (donretarg_2_122-donret_2_122), %r12
13945 add %r12, 0x4, %r11 ! seq tnpc
13946 andn %r11, %r10, %r11 ! low VA tnpc
13947 wrpr %g0, 0x2, %tl
13948 wrpr %g0, %r12, %tpc
13949 wrpr %g0, %r11, %tnpc
13950 set (0x002b0000 | (0x88 << 24)), %r13
13951 and %r12, 0xfff, %r14
13952 sllx %r14, 30, %r14
13953 or %r13, %r14, %r20
13954 wrpr %r20, %g0, %tstate
13955 wrhpr %g0, 0x517, %htstate
13956 ta T_CHANGE_NONPRIV ! rand=0 (2)
13957 ldx [%r12+%r0], %g1
13958 retry
13959donretarg_2_122:
13960 .word 0x93a4c9d3 ! 160: FDIVd fdivd %f50, %f50, %f40
13961pmu_2_123:
13962 nop
13963 setx 0xffffffbbffffffae, %g1, %g7
13964 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
13965splash_tba_2_124:
13966 nop
13967 ta T_CHANGE_PRIV
13968 set 0x120000, %r12
13969 .word 0x8b90000c ! 162: WRPR_TBA_R wrpr %r0, %r12, %tba
13970mondo_2_125:
13971 nop
13972 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
13973 ta T_CHANGE_PRIV
13974 stxa %r11, [%r0+0x3e8] %asi
13975 .word 0x9d914011 ! 163: WRPR_WSTATE_R wrpr %r5, %r17, %wstate
13976 .word 0xa190200c ! 164: WRPR_GL_I wrpr %r0, 0x000c, %-
13977trapasi_2_126:
13978 nop
13979 mov 0x8, %r1 ! (VA for ASI 0x5b)
13980 .word 0xdac04b60 ! 165: LDSWA_R ldswa [%r1, %r0] 0x5b, %r13
13981 .word 0x8d802000 ! 166: WRFPRS_I wr %r0, 0x0000, %fprs
13982splash_tba_2_127:
13983 nop
13984 ta T_CHANGE_PRIV
13985 setx 0x00000004003a0000, %r11, %r12
13986 .word 0x8b90000c ! 167: WRPR_TBA_R wrpr %r0, %r12, %tba
13987 invalw
13988 mov 0x30, %r30
13989 .word 0x91d0001e ! 168: Tcc_R ta icc_or_xcc, %r0 + %r30
13990 nop
13991 ta T_CHANGE_HPRIV
13992 mov 0x2, %r10
13993 set sync_thr_counter6, %r23
13994#ifndef SPC
13995 ldxa [%g0]0x63, %o1
13996 and %o1, 0x38, %o1
13997 add %o1, %r23, %r23
13998#endif
13999 cas [%r23],%g0,%r10 !lock
14000 brnz %r10, sma_2_128
14001 rd %asi, %r12
14002 wr %g0, 0x40, %asi
14003 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
14004 set 0x000a1fff, %g1
14005 stxa %g1, [%g0 + 0x80] %asi
14006 wr %r12, %g0, %asi
14007 st %g0, [%r23]
14008sma_2_128:
14009 ta T_CHANGE_NONHPRIV
14010 .word 0xdbe7e00d ! 169: CASA_R casa [%r31] %asi, %r13, %r13
14011 .word 0xdadfc032 ! 1: LDXA_R ldxa [%r31, %r18] 0x01, %r13
14012 .word 0x9f803c4d ! 170: SIR sir 0x1c4d
14013 .word 0x8d902160 ! 171: WRPR_PSTATE_I wrpr %r0, 0x0160, %pstate
14014ibp_2_130:
14015 nop
14016 ta T_CHANGE_HPRIV
14017 mov 8, %r18
14018 rd %asi, %r12
14019 wr %r0, 0x41, %asi
14020 set sync_thr_counter4, %r23
14021#ifndef SPC
14022 ldxa [%g0]0x63, %r8
14023 and %r8, 0x38, %r8 ! Core ID
14024 add %r8, %r23, %r23
14025#else
14026 mov 0, %r8
14027#endif
14028 mov 0x2, %r16
14029ibp_startwait2_130:
14030 cas [%r23],%g0,%r16 !lock
14031 brz,a %r16, continue_ibp_2_130
14032 mov (~0x2&0xf), %r16
14033 ld [%r23], %r16
14034ibp_wait2_130:
14035 brnz %r16, ibp_wait2_130
14036 ld [%r23], %r16
14037 ba ibp_startwait2_130
14038 mov 0x2, %r16
14039continue_ibp_2_130:
14040 sllx %r16, %r8, %r16 !Mask for my core only
14041 ldxa [0x58]%asi, %r17 !Running_status
14042wait_for_stat_2_130:
14043 ldxa [0x50]%asi, %r13 !Running_rw
14044 cmp %r13, %r17
14045 bne,a %xcc, wait_for_stat_2_130
14046 ldxa [0x58]%asi, %r17 !Running_status
14047 stxa %r16, [0x68]%asi !Park (W1C)
14048 ldxa [0x50]%asi, %r14 !Running_rw
14049wait_for_ibp_2_130:
14050 ldxa [0x58]%asi, %r17 !Running_status
14051 cmp %r14, %r17
14052 bne,a %xcc, wait_for_ibp_2_130
14053 ldxa [0x50]%asi, %r14 !Running_rw
14054ibp_doit2_130:
14055 best_set_reg(0x000000400fecd80e,%r19, %r20)
14056 stxa %r20, [%r18]0x42
14057 stxa %r16, [0x60] %asi !Unpark (W1S)
14058 st %g0, [%r23] !clear lock
14059 wr %r0, %r12, %asi !restore %asi
14060 ta T_CHANGE_NONHPRIV
14061 .word 0xc19fdc00 ! 172: LDDFA_R ldda [%r31, %r0], %f0
14062 .word 0xa269feaf ! 173: UDIVX_I udivx %r7, 0xfffffeaf, %r17
14063 .word 0x996c8012 ! 174: SDIVX_R sdivx %r18, %r18, %r12
14064dvapa_2_131:
14065 nop
14066 ta T_CHANGE_HPRIV
14067 mov 0xdf8, %r20
14068 mov 0x1, %r19
14069 sllx %r20, 23, %r20
14070 or %r19, %r20, %r19
14071 stxa %r19, [%g0] ASI_LSU_CONTROL
14072 mov 0x38, %r18
14073 stxa %r31, [%r18]0x58
14074 ta T_CHANGE_NONHPRIV
14075 .word 0xe03fe180 ! 175: STD_I std %r16, [%r31 + 0x0180]
14076 .word 0xa784e36e ! 176: WR_GRAPHICS_STATUS_REG_I wr %r19, 0x036e, %-
14077 nop
14078 ta T_CHANGE_HPRIV
14079 mov 0x2+1, %r10
14080 set sync_thr_counter5, %r23
14081#ifndef SPC
14082 ldxa [%g0]0x63, %o1
14083 and %o1, 0x38, %o1
14084 add %o1, %r23, %r23
14085 sllx %o1, 5, %o3 !(CID*256)
14086#endif
14087 cas [%r23],%g0,%r10 !lock
14088 brnz %r10, cwq_2_132
14089 rd %asi, %r12
14090 wr %g0, 0x40, %asi
14091 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
14092 and %l1, 0x3, %l1 ! Check if busy/enabled ..
14093 cmp %l1, 1
14094 bne cwq_2_132
14095 set CWQ_BASE, %l6
14096#ifndef SPC
14097 add %l6, %o3, %l6
14098#endif
14099 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
14100 best_set_reg(0x20610080, %l1, %l2) !# Control Word
14101 sllx %l2, 32, %l2
14102 stx %l2, [%l6 + 0x0]
14103 membar #Sync
14104 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
14105 sub %l2, 0x40, %l2
14106 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
14107 wr %r12, %g0, %asi
14108 st %g0, [%r23]
14109cwq_2_132:
14110 ta T_CHANGE_NONHPRIV
14111 .word 0xa9414000 ! 177: RDPC rd %pc, %r20
14112fpinit_2_133:
14113 nop
14114 setx fp_data_quads, %r19, %r20
14115 ldd [%r20], %f0
14116 ldd [%r20+8], %f4
14117 ld [%r20+16], %fsr
14118 ld [%r20+24], %r19
14119 wr %r19, %g0, %gsr
14120 .word 0x89a009a4 ! 178: FDIVs fdivs %f0, %f4, %f4
14121splash_lsu_2_134:
14122 nop
14123 ta T_CHANGE_HPRIV
14124 set 0x6449b979, %r2
14125 mov 0x4, %r1
14126 sllx %r1, 32, %r1
14127 or %r1, %r2, %r2
14128 stxa %r2, [%r0] ASI_LSU_CONTROL
14129 ta T_CHANGE_NONHPRIV
14130 .word 0x3d400001 ! 179: FBPULE fbule,a,pn %fcc0, <label_0x1>
14131 .word 0x87802058 ! 180: WRASI_I wr %r0, 0x0058, %asi
14132#if (defined SPC || defined CMP)
14133!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_135)+32, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
14134!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_135)&0xffffffff) + 32, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1)
14135xir_2_135:
14136#else
14137#if (defined FC)
14138!! Generate XIR via RESET_GEN register
14139 ta T_CHANGE_HPRIV
14140 rdpr %pstate, %r18
14141 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
14142 wrpr %r18, %pstate
14143#ifndef XIR_RND_CORES
14144 ldxa [%g0] 0x63, %o1
14145 mov 1, %r18
14146 sllx %r18, %o1, %r18
14147#endif
14148 mov 0x30, %r19
14149 setx 0x8900000808, %r16, %r17
14150 mov 0x2, %r16
14151xir_2_135:
14152 stxa %r18, [%r19] 0x41
14153 stx %r16, [%r17]
14154#endif
14155#endif
14156 .word 0xa98377c8 ! 181: WR_SET_SOFTINT_I wr %r13, 0x17c8, %set_softint
14157trapasi_2_136:
14158 nop
14159 mov 0x8, %r1 ! (VA for ASI 0x4a)
14160 .word 0xda904940 ! 182: LDUHA_R lduha [%r1, %r0] 0x4a, %r13
14161intveclr_2_137:
14162 nop
14163 ta T_CHANGE_HPRIV
14164 setx 0xcf0a20ff2c7bffc8, %r1, %r28
14165 stxa %r28, [%g0] 0x72
14166 ta T_CHANGE_NONHPRIV
14167 .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1>
14168tagged_2_138:
14169 tsubcctv %r16, 0x10d6, %r2
14170 .word 0xda07e061 ! 184: LDUW_I lduw [%r31 + 0x0061], %r13
14171splash_hpstate_2_139:
14172 ta T_CHANGE_NONHPRIV
14173 .word 0x26c90001 ! 1: BRLZ brlz,a,pt %r4,<label_0x90001>
14174 .word 0x81982edb ! 185: WRHPR_HPSTATE_I wrhpr %r0, 0x0edb, %hpstate
14175 .word 0xda77c000 ! 186: STX_R stx %r13, [%r31 + %r0]
14176brcommon3_2_140:
14177 nop
14178 setx common_target, %r12, %r27
14179 lduw [%r27], %r12 ! Load common dest into dcache ..
14180 ba,a .+12
14181 .word 0xdb37e0a0 ! 1: STQF_I - %f13, [0x00a0, %r31]
14182 ba,a .+8
14183 jmpl %r27+0, %r27
14184 .word 0x8d903ddd ! 187: WRPR_PSTATE_I wrpr %r0, 0x1ddd, %pstate
14185 otherw
14186 mov 0x34, %r30
14187 .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30
14188ibp_2_141:
14189 nop
14190 ta T_CHANGE_HPRIV
14191 mov 8, %r18
14192 rd %asi, %r12
14193 wr %r0, 0x41, %asi
14194 set sync_thr_counter4, %r23
14195#ifndef SPC
14196 ldxa [%g0]0x63, %r8
14197 and %r8, 0x38, %r8 ! Core ID
14198 add %r8, %r23, %r23
14199#else
14200 mov 0, %r8
14201#endif
14202 mov 0x2, %r16
14203ibp_startwait2_141:
14204 cas [%r23],%g0,%r16 !lock
14205 brz,a %r16, continue_ibp_2_141
14206 mov (~0x2&0xf), %r16
14207 ld [%r23], %r16
14208ibp_wait2_141:
14209 brnz %r16, ibp_wait2_141
14210 ld [%r23], %r16
14211 ba ibp_startwait2_141
14212 mov 0x2, %r16
14213continue_ibp_2_141:
14214 sllx %r16, %r8, %r16 !Mask for my core only
14215 ldxa [0x58]%asi, %r17 !Running_status
14216wait_for_stat_2_141:
14217 ldxa [0x50]%asi, %r13 !Running_rw
14218 cmp %r13, %r17
14219 bne,a %xcc, wait_for_stat_2_141
14220 ldxa [0x58]%asi, %r17 !Running_status
14221 stxa %r16, [0x68]%asi !Park (W1C)
14222 ldxa [0x50]%asi, %r14 !Running_rw
14223wait_for_ibp_2_141:
14224 ldxa [0x58]%asi, %r17 !Running_status
14225 cmp %r14, %r17
14226 bne,a %xcc, wait_for_ibp_2_141
14227 ldxa [0x50]%asi, %r14 !Running_rw
14228ibp_doit2_141:
14229 best_set_reg(0x0000005089d80ea1,%r19, %r20)
14230 stxa %r20, [%r18]0x42
14231 stxa %r16, [0x60] %asi !Unpark (W1S)
14232 st %g0, [%r23] !clear lock
14233 wr %r0, %r12, %asi !restore %asi
14234 .word 0x97b4c7d2 ! 189: PDIST pdistn %d50, %d18, %d42
14235tagged_2_142:
14236 tsubcctv %r2, 0x181e, %r19
14237 .word 0xd807e1f4 ! 190: LDUW_I lduw [%r31 + 0x01f4], %r12
14238 .word 0x87802016 ! 191: WRASI_I wr %r0, 0x0016, %asi
14239intveclr_2_143:
14240 nop
14241 ta T_CHANGE_HPRIV
14242 setx 0xe0b2f8c496b07ae6, %r1, %r28
14243 stxa %r28, [%g0] 0x72
14244 ta T_CHANGE_NONHPRIV
14245 .word 0x25400001 ! 192: FBPLG fblg,a,pn %fcc0, <label_0x1>
14246#if (defined SPC || defined CMP1)
14247!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_144) + 24, 16, 16)) -> intp(6,0,23,,,,,1)
14248!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_144)&0xffffffff) + 8, 16, 16)) -> intp(7,0,13,,,,,1)
14249#else
14250 set 0xfb00d263, %r28
14251#if (MAX_THREADS == 8)
14252 and %r28, 0x7ff, %r28
14253#endif
14254 stxa %r28, [%g0] 0x73
14255#endif
14256intvec_2_144:
14257 .word 0x39400001 ! 193: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
14258 .word 0x87802030 ! 194: WRASI_I wr %r0, 0x0030, %asi
14259 .word 0x89800011 ! 195: WRTICK_R wr %r0, %r17, %tick
14260dvapa_2_146:
14261 nop
14262 ta T_CHANGE_HPRIV
14263 mov 0xb1e, %r20
14264 mov 0x1c, %r19
14265 sllx %r20, 23, %r20
14266 or %r19, %r20, %r19
14267 stxa %r19, [%g0] ASI_LSU_CONTROL
14268 mov 0x38, %r18
14269 stxa %r31, [%r18]0x58
14270 ta T_CHANGE_NONHPRIV
14271 .word 0xe1bfe140 ! 196: STDFA_I stda %f16, [0x0140, %r31]
14272splash_tba_2_147:
14273 nop
14274 ta T_CHANGE_PRIV
14275 setx 0x00000004003a0000, %r11, %r12
14276 .word 0x8b90000c ! 197: WRPR_TBA_R wrpr %r0, %r12, %tba
14277 .word 0xa0c46479 ! 198: ADDCcc_I addccc %r17, 0x0479, %r16
14278pmu_2_148:
14279 nop
14280 setx 0xffffffbfffffffa5, %g1, %g7
14281 .word 0xa3800007 ! 199: WR_PERF_COUNTER_R wr %r0, %r7, %-
14282ibp_2_149:
14283 nop
14284 ta T_CHANGE_HPRIV
14285 mov 8, %r18
14286 rd %asi, %r12
14287 wr %r0, 0x41, %asi
14288 set sync_thr_counter4, %r23
14289#ifndef SPC
14290 ldxa [%g0]0x63, %r8
14291 and %r8, 0x38, %r8 ! Core ID
14292 add %r8, %r23, %r23
14293#else
14294 mov 0, %r8
14295#endif
14296 mov 0x2, %r16
14297ibp_startwait2_149:
14298 cas [%r23],%g0,%r16 !lock
14299 brz,a %r16, continue_ibp_2_149
14300 mov (~0x2&0xf), %r16
14301 ld [%r23], %r16
14302ibp_wait2_149:
14303 brnz %r16, ibp_wait2_149
14304 ld [%r23], %r16
14305 ba ibp_startwait2_149
14306 mov 0x2, %r16
14307continue_ibp_2_149:
14308 sllx %r16, %r8, %r16 !Mask for my core only
14309 ldxa [0x58]%asi, %r17 !Running_status
14310wait_for_stat_2_149:
14311 ldxa [0x50]%asi, %r13 !Running_rw
14312 cmp %r13, %r17
14313 bne,a %xcc, wait_for_stat_2_149
14314 ldxa [0x58]%asi, %r17 !Running_status
14315 stxa %r16, [0x68]%asi !Park (W1C)
14316 ldxa [0x50]%asi, %r14 !Running_rw
14317wait_for_ibp_2_149:
14318 ldxa [0x58]%asi, %r17 !Running_status
14319 cmp %r14, %r17
14320 bne,a %xcc, wait_for_ibp_2_149
14321 ldxa [0x50]%asi, %r14 !Running_rw
14322ibp_doit2_149:
14323 best_set_reg(0x00000040adcea16c,%r19, %r20)
14324 stxa %r20, [%r18]0x42
14325 stxa %r16, [0x60] %asi !Unpark (W1S)
14326 st %g0, [%r23] !clear lock
14327 wr %r0, %r12, %asi !restore %asi
14328 ta T_CHANGE_NONHPRIV
14329 .word 0xc19fc2c0 ! 200: LDDFA_R ldda [%r31, %r0], %f0
14330 nop
14331 nop
14332 ta T_CHANGE_PRIV
14333 wrpr %g0, %g0, %gl
14334 nop
14335 nop
14336.text
14337 setx join_lbl_0_0, %g1, %g2
14338 jmp %g2
14339 nop
14340fork_lbl_0_1:
14341 ta T_CHANGE_NONHPRIV
14342vahole5_1_0:
14343 nop
14344 setx vahole_target2, %r18, %r27
14345 jmpl %r27+0, %r27
14346 ta T_CHANGE_PRIV
14347ibp_1_1:
14348 nop
14349 .word 0xe19fe1c0 ! 1: LDDFA_I ldda [%r31, 0x01c0], %f16
14350splash_cmpr_1_2:
14351 mov 0, %r18
14352 sllx %r18, 63, %r18
14353 rd %tick, %r17
14354 add %r17, 0x50, %r17
14355 or %r17, %r18, %r17
14356 .word 0xaf800011 ! 2: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
14357mondo_1_3:
14358 nop
14359 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
14360 ta T_CHANGE_PRIV
14361 stxa %r3, [%r0+0x3e0] %asi
14362 .word 0x9d940014 ! 3: WRPR_WSTATE_R wrpr %r16, %r20, %wstate
14363 .word 0xc19fe020 ! 4: LDDFA_I ldda [%r31, 0x0020], %f0
14364 nop
14365 ta T_CHANGE_HPRIV
14366 mov 0x1+1, %r10
14367 set sync_thr_counter5, %r23
14368#ifndef SPC
14369 ldxa [%g0]0x63, %o1
14370 and %o1, 0x38, %o1
14371 add %o1, %r23, %r23
14372 sllx %o1, 5, %o3 !(CID*256)
14373#endif
14374 cas [%r23],%g0,%r10 !lock
14375 brnz %r10, cwq_1_4
14376 rd %asi, %r12
14377 wr %g0, 0x40, %asi
14378 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
14379 and %l1, 0x3, %l1 ! Check if busy/enabled ..
14380 cmp %l1, 1
14381 bne cwq_1_4
14382 set CWQ_BASE, %l6
14383#ifndef SPC
14384 add %l6, %o3, %l6
14385#endif
14386 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
14387 best_set_reg(0x20610080, %l1, %l2) !# Control Word
14388 sllx %l2, 32, %l2
14389 stx %l2, [%l6 + 0x0]
14390 membar #Sync
14391 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
14392 sub %l2, 0x40, %l2
14393 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
14394 wr %r12, %g0, %asi
14395 st %g0, [%r23]
14396cwq_1_4:
14397 ta T_CHANGE_NONHPRIV
14398 .word 0xa9414000 ! 5: RDPC rd %pc, %r20
14399 nop
14400 ta T_CHANGE_HPRIV ! macro
14401donret_1_5:
14402 rd %pc, %r12
14403 mov HIGHVA_HIGHNUM, %r10
14404 sllx %r10, 32, %r10
14405 or %r12, %r10, %r12
14406 add %r12, (donretarg_1_5-donret_1_5), %r12
14407 add %r12, 0x8, %r11 ! nonseq tnpc
14408 wrpr %g0, 0x1, %tl
14409 wrpr %g0, %r12, %tpc
14410 wrpr %g0, %r11, %tnpc
14411 set (0x00f66f00 | (0x58 << 24)), %r13
14412 and %r12, 0xfff, %r14
14413 sllx %r14, 30, %r14
14414 or %r13, %r14, %r20
14415 wrpr %r20, %g0, %tstate
14416 wrhpr %g0, 0x1f17, %htstate
14417 ta T_CHANGE_NONPRIV ! rand=0 (1)
14418 ldx [%r11+%r0], %g1
14419 done
14420donretarg_1_5:
14421 .word 0x8d90279d ! 6: WRPR_PSTATE_I wrpr %r0, 0x079d, %pstate
14422 .word 0xe937e0dc ! 7: STQF_I - %f20, [0x00dc, %r31]
14423jmptr_1_6:
14424 nop
14425 best_set_reg(0xe0200000, %r20, %r27)
14426 .word 0xb7c6c000 ! 8: JMPL_R jmpl %r27 + %r0, %r27
14427 rd %tick, %r28
14428#if (MAX_THREADS == 8)
14429 sethi %hi(0x33800), %r27
14430#else
14431 sethi %hi(0x30000), %r27
14432#endif
14433 andn %r28, %r27, %r28
14434 ta T_CHANGE_HPRIV
14435 stxa %r28, [%g0] 0x73
14436intvec_1_7:
14437 .word 0x39400001 ! 9: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
14438 .word 0x9f802841 ! 10: SIR sir 0x0841
14439 .word 0x8d802004 ! 11: WRFPRS_I wr %r0, 0x0004, %fprs
14440trapasi_1_8:
14441 nop
14442 mov 0x8, %r1 ! (VA for ASI 0x48)
14443 .word 0xe8c84900 ! 12: LDSBA_R ldsba [%r1, %r0] 0x48, %r20
14444 .word 0xe81fe1c0 ! 13: LDD_I ldd [%r31 + 0x01c0], %r20
14445 .word 0x24800001 ! 1: BLE ble,a <label_0x1>
14446 .word 0x8d902b8f ! 14: WRPR_PSTATE_I wrpr %r0, 0x0b8f, %pstate
14447 nop
14448 ta T_CHANGE_HPRIV
14449 mov 0x1+1, %r10
14450 set sync_thr_counter5, %r23
14451#ifndef SPC
14452 ldxa [%g0]0x63, %o1
14453 and %o1, 0x38, %o1
14454 add %o1, %r23, %r23
14455 sllx %o1, 5, %o3 !(CID*256)
14456#endif
14457 cas [%r23],%g0,%r10 !lock
14458 brnz %r10, cwq_1_10
14459 rd %asi, %r12
14460 wr %g0, 0x40, %asi
14461 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
14462 and %l1, 0x3, %l1 ! Check if busy/enabled ..
14463 cmp %l1, 1
14464 bne cwq_1_10
14465 set CWQ_BASE, %l6
14466#ifndef SPC
14467 add %l6, %o3, %l6
14468#endif
14469 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
14470 best_set_reg(0x206100d0, %l1, %l2) !# Control Word
14471 sllx %l2, 32, %l2
14472 stx %l2, [%l6 + 0x0]
14473 membar #Sync
14474 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
14475 sub %l2, 0x40, %l2
14476 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
14477 wr %r12, %g0, %asi
14478 st %g0, [%r23]
14479cwq_1_10:
14480 ta T_CHANGE_NONHPRIV
14481 .word 0xa1414000 ! 15: RDPC rd %pc, %r16
14482brcommon2_1_11:
14483 nop
14484 setx common_target, %r12, %r27
14485 ba,a .+12
14486 .word 0x81dfc00c ! 1: FLUSH_R flush %r31, %r12, %r0
14487 ba,a .+8
14488 jmpl %r27+0, %r27
14489 .word 0xe19fe0e0 ! 16: LDDFA_I ldda [%r31, 0x00e0], %f16
14490jmptr_1_12:
14491 nop
14492 best_set_reg(0xe0200000, %r20, %r27)
14493 .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27
14494mondo_1_13:
14495 nop
14496 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
14497 ta T_CHANGE_PRIV
14498 stxa %r11, [%r0+0x3d8] %asi
14499 .word 0x9d910013 ! 18: WRPR_WSTATE_R wrpr %r4, %r19, %wstate
14500mondo_1_14:
14501 nop
14502 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
14503 stxa %r4, [%r0+0x3d8] %asi
14504 .word 0x9d920010 ! 19: WRPR_WSTATE_R wrpr %r8, %r16, %wstate
14505splash_cmpr_1_15:
14506 mov 0, %r18
14507 sllx %r18, 63, %r18
14508 rd %tick, %r17
14509 add %r17, 0x80, %r17
14510 or %r17, %r18, %r17
14511 ta T_CHANGE_HPRIV
14512 wrhpr %r17, %g0, %hsys_tick_cmpr
14513 .word 0xaf800011 ! 20: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
14514#if (defined SPC || defined CMP1)
14515!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_16) + 32, 16, 16)) -> intp(2,0,15,,,,,1)
14516!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_16)&0xffffffff) + 16, 16, 16)) -> intp(3,0,0,,,,,1)
14517#else
14518 set 0xba30cd16, %r28
14519#if (MAX_THREADS == 8)
14520 and %r28, 0x7ff, %r28
14521#endif
14522 stxa %r28, [%g0] 0x73
14523#endif
14524intvec_1_16:
14525 .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
14526 .word 0x81d9c010 ! 22: FLUSH_R flush %r7, %r16, %r0
14527 .word 0x36800001 ! 1: BGE bge,a <label_0x1>
14528 .word 0x8d903b07 ! 23: WRPR_PSTATE_I wrpr %r0, 0x1b07, %pstate
14529 .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl
14530reduce_priv_lvl_1_18:
14531 ta T_CHANGE_NONHPRIV ! macro
14532mondo_1_19:
14533 nop
14534 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
14535 stxa %r2, [%r0+0x3d0] %asi
14536 .word 0x9d944003 ! 25: WRPR_WSTATE_R wrpr %r17, %r3, %wstate
14537 .word 0x81510000 ! 26: RDPR_TICK rdpr %tick, %r0
14538 .word 0x879cbe22 ! 27: WRHPR_HINTP_I wrhpr %r18, 0x1e22, %hintp
14539fpinit_1_20:
14540 nop
14541 setx fp_data_quads, %r19, %r20
14542 ldd [%r20], %f0
14543 ldd [%r20+8], %f4
14544 ld [%r20+16], %fsr
14545 ld [%r20+24], %r19
14546 wr %r19, %g0, %gsr
14547 .word 0x87a80a44 ! 28: FCMPd fcmpd %fcc<n>, %f0, %f4
14548mondo_1_21:
14549 nop
14550 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
14551 stxa %r4, [%r0+0x3e8] %asi
14552 .word 0x9d920014 ! 29: WRPR_WSTATE_R wrpr %r8, %r20, %wstate
14553splash_hpstate_1_22:
14554 .word 0x8198288d ! 30: WRHPR_HPSTATE_I wrhpr %r0, 0x088d, %hpstate
14555splash_tba_1_23:
14556 nop
14557 ta T_CHANGE_PRIV
14558 setx 0x0000000000380000, %r11, %r12
14559 .word 0x8b90000c ! 31: WRPR_TBA_R wrpr %r0, %r12, %tba
14560trapasi_1_24:
14561 nop
14562 mov 0x8, %r1 ! (VA for ASI 0x4a)
14563 .word 0xe8884940 ! 32: LDUBA_R lduba [%r1, %r0] 0x4a, %r20
14564 rd %tick, %r28
14565#if (MAX_THREADS == 8)
14566 sethi %hi(0x33800), %r27
14567#else
14568 sethi %hi(0x30000), %r27
14569#endif
14570 andn %r28, %r27, %r28
14571 ta T_CHANGE_HPRIV
14572 stxa %r28, [%g0] 0x73
14573intvec_1_25:
14574 .word 0x39400001 ! 33: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
14575 nop
14576 ta T_CHANGE_HPRIV
14577 mov 0x1, %r10
14578 set sync_thr_counter6, %r23
14579#ifndef SPC
14580 ldxa [%g0]0x63, %o1
14581 and %o1, 0x38, %o1
14582 add %o1, %r23, %r23
14583#endif
14584 cas [%r23],%g0,%r10 !lock
14585 brnz %r10, sma_1_26
14586 rd %asi, %r12
14587 wr %g0, 0x40, %asi
14588 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
14589 set 0x00061fff, %g1
14590 stxa %g1, [%g0 + 0x80] %asi
14591 wr %r12, %g0, %asi
14592 st %g0, [%r23]
14593sma_1_26:
14594 ta T_CHANGE_NONHPRIV
14595 .word 0xe9e7e013 ! 34: CASA_R casa [%r31] %asi, %r19, %r20
14596 .word 0xe89fe1f8 ! 35: LDDA_I ldda [%r31, + 0x01f8] %asi, %r20
14597 nop
14598 ta T_CHANGE_HPRIV
14599 mov 0x1, %r10
14600 set sync_thr_counter6, %r23
14601#ifndef SPC
14602 ldxa [%g0]0x63, %o1
14603 and %o1, 0x38, %o1
14604 add %o1, %r23, %r23
14605#endif
14606 cas [%r23],%g0,%r10 !lock
14607 brnz %r10, sma_1_27
14608 rd %asi, %r12
14609 wr %g0, 0x40, %asi
14610 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
14611 set 0x00161fff, %g1
14612 stxa %g1, [%g0 + 0x80] %asi
14613 wr %r12, %g0, %asi
14614 st %g0, [%r23]
14615sma_1_27:
14616 ta T_CHANGE_NONHPRIV
14617 .word 0xe9e7e011 ! 36: CASA_R casa [%r31] %asi, %r17, %r20
14618 nop
14619 ta T_CHANGE_HPRIV ! macro
14620donret_1_28:
14621 rd %pc, %r12
14622 mov HIGHVA_HIGHNUM, %r10
14623 sllx %r10, 32, %r10
14624 or %r12, %r10, %r12
14625 add %r12, (donretarg_1_28-donret_1_28), %r12
14626 add %r12, 0x4, %r11 ! seq tnpc
14627 andn %r11, %r10, %r11 ! low VA tnpc
14628 wrpr %g0, 0x2, %tl
14629 wrpr %g0, %r12, %tpc
14630 wrpr %g0, %r11, %tnpc
14631 set (0x00b10a00 | (57 << 24)), %r13
14632 and %r12, 0xfff, %r14
14633 sllx %r14, 30, %r14
14634 or %r13, %r14, %r20
14635 wrpr %r20, %g0, %tstate
14636 wrhpr %g0, 0x16cf, %htstate
14637 ta T_CHANGE_NONHPRIV ! rand=1 (1)
14638 retry
14639donretarg_1_28:
14640 .word 0x2c800001 ! 37: BNEG bneg,a <label_0x1>
14641brcommon2_1_29:
14642 nop
14643 setx common_target, %r12, %r27
14644 ba,a .+12
14645 .word 0xa9a7c973 ! 1: FMULq dis not found
14646
14647 ba,a .+8
14648 jmpl %r27+0, %r27
14649 .word 0xc19fda00 ! 38: LDDFA_R ldda [%r31, %r0], %f0
14650 .word 0x91930007 ! 39: WRPR_PIL_R wrpr %r12, %r7, %pil
14651 .word 0xd877e1c3 ! 40: STX_I stx %r12, [%r31 + 0x01c3]
14652 nop
14653 ta T_CHANGE_HPRIV
14654 mov 0x1+1, %r10
14655 set sync_thr_counter5, %r23
14656#ifndef SPC
14657 ldxa [%g0]0x63, %o1
14658 and %o1, 0x38, %o1
14659 add %o1, %r23, %r23
14660 sllx %o1, 5, %o3 !(CID*256)
14661#endif
14662 cas [%r23],%g0,%r10 !lock
14663 brnz %r10, cwq_1_31
14664 rd %asi, %r12
14665 wr %g0, 0x40, %asi
14666 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
14667 and %l1, 0x3, %l1 ! Check if busy/enabled ..
14668 cmp %l1, 1
14669 bne cwq_1_31
14670 set CWQ_BASE, %l6
14671#ifndef SPC
14672 add %l6, %o3, %l6
14673#endif
14674 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
14675 best_set_reg(0x20610000, %l1, %l2) !# Control Word
14676 sllx %l2, 32, %l2
14677 stx %l2, [%l6 + 0x0]
14678 membar #Sync
14679 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
14680 sub %l2, 0x40, %l2
14681 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
14682 wr %r12, %g0, %asi
14683 st %g0, [%r23]
14684cwq_1_31:
14685 ta T_CHANGE_NONHPRIV
14686 .word 0xa7414000 ! 41: RDPC rd %pc, %r19
14687vahole6_1_32:
14688 nop
14689 mov 1, %r27
14690 sllx %r27, 49, %r27
14691 jmpl %r27+0, %r27
14692 ta T_CHANGE_NONHPRIV
14693 .word 0xe71fe000 ! 42: LDDF_I ldd [%r31, 0x0000], %f19
14694 nop
14695 ta T_CHANGE_HPRIV
14696 mov 0x1, %r10
14697 set sync_thr_counter6, %r23
14698#ifndef SPC
14699 ldxa [%g0]0x63, %o1
14700 and %o1, 0x38, %o1
14701 add %o1, %r23, %r23
14702#endif
14703 cas [%r23],%g0,%r10 !lock
14704 brnz %r10, sma_1_33
14705 rd %asi, %r12
14706 wr %g0, 0x40, %asi
14707 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
14708 set 0x00161fff, %g1
14709 stxa %g1, [%g0 + 0x80] %asi
14710 wr %r12, %g0, %asi
14711 st %g0, [%r23]
14712sma_1_33:
14713 ta T_CHANGE_NONHPRIV
14714 .word 0xe7e7e009 ! 43: CASA_R casa [%r31] %asi, %r9, %r19
14715 nop
14716 ta T_CHANGE_HPRIV ! macro
14717donret_1_34:
14718 rd %pc, %r12
14719 mov HIGHVA_HIGHNUM, %r10
14720 sllx %r10, 32, %r10
14721 or %r12, %r10, %r12
14722 add %r12, (donretarg_1_34-donret_1_34+4), %r12
14723 add %r12, 0x4, %r11 ! seq tnpc
14724 wrpr %g0, 0x2, %tl
14725 wrpr %g0, %r12, %tpc
14726 wrpr %g0, %r11, %tnpc
14727 set (0x005ee800 | (0x55 << 24)), %r13
14728 and %r12, 0xfff, %r14
14729 sllx %r14, 30, %r14
14730 or %r13, %r14, %r20
14731 wrpr %r20, %g0, %tstate
14732 wrhpr %g0, 0xc55, %htstate
14733 ta T_CHANGE_NONPRIV ! rand=0 (1)
14734 retry
14735donretarg_1_34:
14736 .word 0xe66fe129 ! 44: LDSTUB_I ldstub %r19, [%r31 + 0x0129]
14737 nop
14738 mov 0x80, %g3
14739 .word 0x26800001 ! 1: BL bl,a <label_0x1>
14740 stxa %g3, [%g3] 0x5f
14741 .word 0xe65fc000 ! 45: LDX_R ldx [%r31 + %r0], %r19
14742#if (defined SPC || defined CMP)
14743!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_35)+32, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
14744!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_35)&0xffffffff) + 0, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
14745xir_1_35:
14746#else
14747#if (defined FC)
14748!! Generate XIR via RESET_GEN register
14749 ta T_CHANGE_HPRIV
14750 rdpr %pstate, %r18
14751 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
14752 wrpr %r18, %pstate
14753#ifndef XIR_RND_CORES
14754 ldxa [%g0] 0x63, %o1
14755 mov 1, %r18
14756 sllx %r18, %o1, %r18
14757#endif
14758 mov 0x30, %r19
14759 setx 0x8900000808, %r16, %r17
14760 mov 0x2, %r16
14761xir_1_35:
14762 stxa %r18, [%r19] 0x41
14763 stx %r16, [%r17]
14764#endif
14765#endif
14766 .word 0xa984738d ! 46: WR_SET_SOFTINT_I wr %r17, 0x138d, %set_softint
14767 .word 0xe63fe080 ! 47: STD_I std %r19, [%r31 + 0x0080]
14768 nop
14769 ta T_CHANGE_HPRIV ! macro
14770donret_1_37:
14771 rd %pc, %r12
14772 mov HIGHVA_HIGHNUM, %r10
14773 sllx %r10, 32, %r10
14774 or %r12, %r10, %r12
14775 add %r12, (donretarg_1_37-donret_1_37+4), %r12
14776 add %r12, 0x4, %r11 ! seq tnpc
14777 andn %r12, %r10, %r12 ! low VA tpc
14778 wrpr %g0, 0x2, %tl
14779 wrpr %g0, %r12, %tpc
14780 wrpr %g0, %r11, %tnpc
14781 set (0x00320500 | (0x88 << 24)), %r13
14782 and %r12, 0xfff, %r14
14783 sllx %r14, 30, %r14
14784 or %r13, %r14, %r20
14785 wrpr %r20, %g0, %tstate
14786 wrhpr %g0, 0x19d, %htstate
14787 ta T_CHANGE_NONPRIV ! rand=0 (1)
14788 ldx [%r11+%r0], %g1
14789 done
14790.align 32
14791donretarg_1_37:
14792 .word 0x81983e1f ! 48: WRHPR_HPSTATE_I wrhpr %r0, 0x1e1f, %hpstate
14793 .word 0x89800011 ! 49: WRTICK_R wr %r0, %r17, %tick
14794 .word 0xc1bfe0a0 ! 50: STDFA_I stda %f0, [0x00a0, %r31]
14795splash_lsu_1_40:
14796 nop
14797 ta T_CHANGE_HPRIV
14798 set 0xa386b8c6, %r2
14799 mov 0x5, %r1
14800 sllx %r1, 32, %r1
14801 or %r1, %r2, %r2
14802 stxa %r2, [%r0] ASI_LSU_CONTROL
14803 .word 0x3d400001 ! 51: FBPULE fbule,a,pn %fcc0, <label_0x1>
14804change_to_randtl_1_41:
14805 ta T_CHANGE_HPRIV ! macro
14806done_change_to_randtl_1_41:
14807 .word 0x8f902002 ! 52: WRPR_TL_I wrpr %r0, 0x0002, %tl
14808 .word 0xe1bfde00 ! 53: STDFA_R stda %f16, [%r0, %r31]
14809 .word 0x89800011 ! 54: WRTICK_R wr %r0, %r17, %tick
14810 nop
14811 ta T_CHANGE_HPRIV ! macro
14812donret_1_43:
14813 rd %pc, %r12
14814 mov HIGHVA_HIGHNUM, %r10
14815 sllx %r10, 32, %r10
14816 or %r12, %r10, %r12
14817 add %r12, (donretarg_1_43-donret_1_43+4), %r12
14818 add %r12, 0x4, %r11 ! seq tnpc
14819 wrpr %g0, 0x1, %tl
14820 wrpr %g0, %r12, %tpc
14821 wrpr %g0, %r11, %tnpc
14822 set (0x006b1500 | (28 << 24)), %r13
14823 and %r12, 0xfff, %r14
14824 sllx %r14, 30, %r14
14825 or %r13, %r14, %r20
14826 wrpr %r20, %g0, %tstate
14827 wrhpr %g0, 0x1f15, %htstate
14828 ta T_CHANGE_NONPRIV ! rand=0 (1)
14829 .word 0x24800001 ! 1: BLE ble,a <label_0x1>
14830 done
14831.align 32
14832donretarg_1_43:
14833 .word 0x8d9025dd ! 55: WRPR_PSTATE_I wrpr %r0, 0x05dd, %pstate
14834 .word 0xe64fc000 ! 56: LDSB_R ldsb [%r31 + %r0], %r19
14835 .word 0xe71fe050 ! 57: LDDF_I ldd [%r31, 0x0050], %f19
14836 .word 0x87802082 ! 58: WRASI_I wr %r0, 0x0082, %asi
14837 .word 0x89800011 ! 59: WRTICK_R wr %r0, %r17, %tick
14838 nop
14839 ta T_CHANGE_HPRIV
14840 mov 0x1+1, %r10
14841 set sync_thr_counter5, %r23
14842#ifndef SPC
14843 ldxa [%g0]0x63, %o1
14844 and %o1, 0x38, %o1
14845 add %o1, %r23, %r23
14846 sllx %o1, 5, %o3 !(CID*256)
14847#endif
14848 cas [%r23],%g0,%r10 !lock
14849 brnz %r10, cwq_1_45
14850 rd %asi, %r12
14851 wr %g0, 0x40, %asi
14852 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
14853 and %l1, 0x3, %l1 ! Check if busy/enabled ..
14854 cmp %l1, 1
14855 bne cwq_1_45
14856 set CWQ_BASE, %l6
14857#ifndef SPC
14858 add %l6, %o3, %l6
14859#endif
14860 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
14861 best_set_reg(0x206100c0, %l1, %l2) !# Control Word
14862 sllx %l2, 32, %l2
14863 stx %l2, [%l6 + 0x0]
14864 membar #Sync
14865 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
14866 sub %l2, 0x40, %l2
14867 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
14868 wr %r12, %g0, %asi
14869 st %g0, [%r23]
14870cwq_1_45:
14871 ta T_CHANGE_NONHPRIV
14872 .word 0xa9414000 ! 60: RDPC rd %pc, %r20
14873mondo_1_46:
14874 nop
14875 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
14876 ta T_CHANGE_PRIV
14877 stxa %r11, [%r0+0x3c8] %asi
14878 .word 0x9d94800b ! 61: WRPR_WSTATE_R wrpr %r18, %r11, %wstate
14879 .word 0x93d02035 ! 62: Tcc_I tne icc_or_xcc, %r0 + 53
14880splash_lsu_1_47:
14881 nop
14882 ta T_CHANGE_HPRIV
14883 set 0x495caa28, %r2
14884 mov 0x3, %r1
14885 sllx %r1, 32, %r1
14886 or %r1, %r2, %r2
14887 stxa %r2, [%r0] ASI_LSU_CONTROL
14888 .word 0x3d400001 ! 63: FBPULE fbule,a,pn %fcc0, <label_0x1>
14889ibp_1_48:
14890 nop
14891 .word 0xe19fe040 ! 64: LDDFA_I ldda [%r31, 0x0040], %f16
14892splash_hpstate_1_49:
14893 .word 0x819837c2 ! 65: WRHPR_HPSTATE_I wrhpr %r0, 0x17c2, %hpstate
14894 .word 0x8d903aeb ! 66: WRPR_PSTATE_I wrpr %r0, 0x1aeb, %pstate
14895 rd %tick, %r28
14896#if (MAX_THREADS == 8)
14897 sethi %hi(0x33800), %r27
14898#else
14899 sethi %hi(0x30000), %r27
14900#endif
14901 andn %r28, %r27, %r28
14902 ta T_CHANGE_HPRIV
14903 stxa %r28, [%g0] 0x73
14904intvec_1_51:
14905 .word 0x39400001 ! 67: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
14906 .word 0x91a209c9 ! 68: FDIVd fdivd %f8, %f40, %f8
14907 nop
14908 ta T_CHANGE_HPRIV ! macro
14909donret_1_53:
14910 rd %pc, %r12
14911 mov HIGHVA_HIGHNUM, %r10
14912 sllx %r10, 32, %r10
14913 or %r12, %r10, %r12
14914 add %r12, (donretarg_1_53-donret_1_53+4), %r12
14915 add %r12, 0x4, %r11 ! seq tnpc
14916 wrpr %g0, 0x1, %tl
14917 wrpr %g0, %r12, %tpc
14918 wrpr %g0, %r11, %tnpc
14919 set (0x00c0b200 | (0x89 << 24)), %r13
14920 and %r12, 0xfff, %r14
14921 sllx %r14, 30, %r14
14922 or %r13, %r14, %r20
14923 wrpr %r20, %g0, %tstate
14924 wrhpr %g0, 0x1254, %htstate
14925 ta T_CHANGE_NONPRIV ! rand=0 (1)
14926 ldx [%r11+%r0], %g1
14927 done
14928donretarg_1_53:
14929 .word 0x27400001 ! 69: FBPUL fbul,a,pn %fcc0, <label_0x1>
14930 set 0x2d9e, %l3
14931 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
14932 .word 0xa9b507c5 ! 70: PDIST pdistn %d20, %d36, %d20
14933 .word 0xa5a00169 ! 71: FABSq dis not found
14934
14935ibp_1_55:
14936 nop
14937 ta T_CHANGE_NONHPRIV
14938 .word 0xe1bfe080 ! 72: STDFA_I stda %f16, [0x0080, %r31]
14939 nop
14940 ta T_CHANGE_HPRIV ! macro
14941donret_1_56:
14942 rd %pc, %r12
14943 mov HIGHVA_HIGHNUM, %r10
14944 sllx %r10, 32, %r10
14945 or %r12, %r10, %r12
14946 add %r12, (donretarg_1_56-donret_1_56), %r12
14947 add %r12, 0x8, %r11 ! nonseq tnpc
14948 wrpr %g0, 0x2, %tl
14949 wrpr %g0, %r12, %tpc
14950 wrpr %g0, %r11, %tnpc
14951 set (0x00315800 | (0x82 << 24)), %r13
14952 and %r12, 0xfff, %r14
14953 sllx %r14, 30, %r14
14954 or %r13, %r14, %r20
14955 wrpr %r20, %g0, %tstate
14956 wrhpr %g0, 0xac9, %htstate
14957 ta T_CHANGE_NONHPRIV ! rand=1 (1)
14958 retry
14959.align 32
14960donretarg_1_56:
14961 .word 0xe4ffe05a ! 73: SWAPA_I swapa %r18, [%r31 + 0x005a] %asi
14962brcommon3_1_57:
14963 nop
14964 setx common_target, %r12, %r27
14965 lduw [%r27], %r12 ! Load common dest into dcache ..
14966 ba,a .+12
14967 .word 0xe537c013 ! 1: STQF_R - %f18, [%r19, %r31]
14968 ba,a .+8
14969 jmpl %r27+0, %r27
14970 .word 0xe51fc014 ! 74: LDDF_R ldd [%r31, %r20], %f18
14971 .word 0x9190c011 ! 75: WRPR_PIL_R wrpr %r3, %r17, %pil
14972splash_cmpr_1_59:
14973 mov 0, %r18
14974 sllx %r18, 63, %r18
14975 rd %tick, %r17
14976 add %r17, 0x60, %r17
14977 or %r17, %r18, %r17
14978 ta T_CHANGE_PRIV
14979 .word 0xaf800011 ! 76: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
14980splash_cmpr_1_60:
14981 mov 0, %r18
14982 sllx %r18, 63, %r18
14983 rd %tick, %r17
14984 add %r17, 0x100, %r17
14985 or %r17, %r18, %r17
14986 ta T_CHANGE_HPRIV
14987 wrhpr %r17, %g0, %hsys_tick_cmpr
14988 .word 0xb3800011 ! 77: WR_STICK_CMPR_REG_R wr %r0, %r17, %-
14989 .word 0x87802004 ! 78: WRASI_I wr %r0, 0x0004, %asi
14990brcommon3_1_61:
14991 nop
14992 setx common_target, %r12, %r27
14993 lduw [%r27], %r12 ! Load common dest into dcache ..
14994 ba,a .+12
14995 .word 0xe537c008 ! 1: STQF_R - %f18, [%r8, %r31]
14996 ba,a .+8
14997 jmpl %r27+0, %r27
14998 .word 0xe5e7e008 ! 79: CASA_R casa [%r31] %asi, %r8, %r18
14999mondo_1_62:
15000 nop
15001 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
15002 ta T_CHANGE_PRIV
15003 stxa %r20, [%r0+0x3c8] %asi
15004 .word 0x9d950011 ! 80: WRPR_WSTATE_R wrpr %r20, %r17, %wstate
15005 nop
15006 mov 0x80, %g3
15007 stxa %r11, [%r0] ASI_LSU_CONTROL
15008 stxa %g3, [%g3] 0x5f
15009 .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31
15010 .word 0xe45fc000 ! 81: LDX_R ldx [%r31 + %r0], %r18
15011 set 0x2acf, %l3
15012 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
15013 .word 0x93b047cb ! 82: PDIST pdistn %d32, %d42, %d40
15014 fbug skip_1_63
15015 stxa %r18, [%r0] ASI_LSU_CONTROL
15016 .word 0x99a4c9c7 ! 1: FDIVd fdivd %f50, %f38, %f12
15017 stxa %r9, [%r0] ASI_LSU_CONTROL
15018.align 32
15019skip_1_63:
15020 .word 0xd3e7c020 ! 83: CASA_I casa [%r31] 0x 1, %r0, %r9
15021 .word 0x91a0016b ! 84: FABSq dis not found
15022
15023 nop
15024 ta T_CHANGE_HPRIV
15025 mov 0x1+1, %r10
15026 set sync_thr_counter5, %r23
15027#ifndef SPC
15028 ldxa [%g0]0x63, %o1
15029 and %o1, 0x38, %o1
15030 add %o1, %r23, %r23
15031 sllx %o1, 5, %o3 !(CID*256)
15032#endif
15033 cas [%r23],%g0,%r10 !lock
15034 brnz %r10, cwq_1_65
15035 rd %asi, %r12
15036 wr %g0, 0x40, %asi
15037 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
15038 and %l1, 0x3, %l1 ! Check if busy/enabled ..
15039 cmp %l1, 1
15040 bne cwq_1_65
15041 set CWQ_BASE, %l6
15042#ifndef SPC
15043 add %l6, %o3, %l6
15044#endif
15045 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
15046 best_set_reg(0x20610020, %l1, %l2) !# Control Word
15047 sllx %l2, 32, %l2
15048 stx %l2, [%l6 + 0x0]
15049 membar #Sync
15050 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
15051 sub %l2, 0x40, %l2
15052 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
15053 wr %r12, %g0, %asi
15054 st %g0, [%r23]
15055cwq_1_65:
15056 ta T_CHANGE_NONHPRIV
15057 .word 0x93414000 ! 85: RDPC rd %pc, %r9
15058 .word 0x93450000 ! 86: RD_SET_SOFTINT rd %set_softint, %r9
15059brcommon1_1_66:
15060 nop
15061 setx common_target, %r12, %r27
15062 lduw [%r27], %r12 ! Load common dest into dcache ..
15063 ba,a .+12
15064 .word 0x93b7c7cd ! 1: PDIST pdistn %d62, %d44, %d40
15065 ba,a .+8
15066 jmpl %r27+0, %r27
15067 .word 0x91a409b4 ! 87: FDIVs fdivs %f16, %f20, %f8
15068pmu_1_67:
15069 nop
15070 setx 0xffffffb1ffffffac, %g1, %g7
15071 .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %-
15072#if (defined SPC || defined CMP)
15073!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_68)+48, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
15074!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_68)&0xffffffff) + 0, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
15075xir_1_68:
15076#else
15077#if (defined FC)
15078!! Generate XIR via RESET_GEN register
15079 ta T_CHANGE_HPRIV
15080 rdpr %pstate, %r18
15081 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
15082 wrpr %r18, %pstate
15083#ifndef XIR_RND_CORES
15084 ldxa [%g0] 0x63, %o1
15085 mov 1, %r18
15086 sllx %r18, %o1, %r18
15087#endif
15088 mov 0x30, %r19
15089 setx 0x8900000808, %r16, %r17
15090 mov 0x2, %r16
15091xir_1_68:
15092 stxa %r18, [%r19] 0x41
15093 stx %r16, [%r17]
15094#endif
15095#endif
15096 .word 0xa98523fe ! 89: WR_SET_SOFTINT_I wr %r20, 0x03fe, %set_softint
15097 rd %tick, %r28
15098#if (MAX_THREADS == 8)
15099 sethi %hi(0x33800), %r27
15100#else
15101 sethi %hi(0x30000), %r27
15102#endif
15103 andn %r28, %r27, %r28
15104 ta T_CHANGE_HPRIV
15105 stxa %r28, [%g0] 0x73
15106intvec_1_69:
15107 .word 0x39400001 ! 90: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
15108fpinit_1_70:
15109 nop
15110 setx fp_data_quads, %r19, %r20
15111 ldd [%r20], %f0
15112 ldd [%r20+8], %f4
15113 ld [%r20+16], %fsr
15114 ld [%r20+24], %r19
15115 wr %r19, %g0, %gsr
15116 .word 0xc3e823fe ! 91: PREFETCHA_I prefetcha [%r0, + 0x03fe] %asi, #one_read
15117mondo_1_71:
15118 nop
15119 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
15120 ta T_CHANGE_PRIV
15121 stxa %r11, [%r0+0x3d0] %asi
15122 .word 0x9d914007 ! 92: WRPR_WSTATE_R wrpr %r5, %r7, %wstate
15123 .word 0x8d90330d ! 93: WRPR_PSTATE_I wrpr %r0, 0x130d, %pstate
15124 .word 0x8d802000 ! 94: WRFPRS_I wr %r0, 0x0000, %fprs
15125 nop
15126 ta T_CHANGE_HPRIV
15127 mov 0x1, %r10
15128 set sync_thr_counter6, %r23
15129#ifndef SPC
15130 ldxa [%g0]0x63, %o1
15131 and %o1, 0x38, %o1
15132 add %o1, %r23, %r23
15133#endif
15134 cas [%r23],%g0,%r10 !lock
15135 brnz %r10, sma_1_73
15136 rd %asi, %r12
15137 wr %g0, 0x40, %asi
15138 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
15139 set 0x00161fff, %g1
15140 stxa %g1, [%g0 + 0x80] %asi
15141 wr %r12, %g0, %asi
15142 st %g0, [%r23]
15143sma_1_73:
15144 ta T_CHANGE_NONHPRIV
15145 .word 0xd1e7e00c ! 95: CASA_R casa [%r31] %asi, %r12, %r8
15146ibp_1_74:
15147 nop
15148 ta T_CHANGE_NONHPRIV
15149 .word 0x87acca53 ! 96: FCMPd fcmpd %fcc<n>, %f50, %f50
15150 .word 0x99b447d1 ! 97: PDIST pdistn %d48, %d48, %d12
15151trapasi_1_76:
15152 nop
15153 mov 0x30, %r1 ! (VA for ASI 0x5a)
15154 .word 0xd8884b40 ! 98: LDUBA_R lduba [%r1, %r0] 0x5a, %r12
15155 .word 0x81460000 ! 99: RD_STICK_REG stbar
15156jmptr_1_77:
15157 nop
15158 best_set_reg(0xe1200000, %r20, %r27)
15159 .word 0xb7c6c000 ! 100: JMPL_R jmpl %r27 + %r0, %r27
15160pmu_1_78:
15161 nop
15162 ta T_CHANGE_PRIV
15163 setx 0xffffffbbffffffa1, %g1, %g7
15164 .word 0xa3800007 ! 101: WR_PERF_COUNTER_R wr %r0, %r7, %-
15165memptr_1_79:
15166 set 0x60340000, %r31
15167 .word 0x85813d80 ! 102: WRCCR_I wr %r4, 0x1d80, %ccr
15168 .word 0xd8cfe030 ! 103: LDSBA_I ldsba [%r31, + 0x0030] %asi, %r12
15169change_to_randtl_1_80:
15170 ta T_CHANGE_PRIV ! macro
15171done_change_to_randtl_1_80:
15172 .word 0x8f902000 ! 104: WRPR_TL_I wrpr %r0, 0x0000, %tl
15173pmu_1_81:
15174 nop
15175 setx 0xffffffb9ffffffae, %g1, %g7
15176 .word 0xa3800007 ! 105: WR_PERF_COUNTER_R wr %r0, %r7, %-
15177splash_lsu_1_82:
15178 nop
15179 ta T_CHANGE_HPRIV
15180 set 0x8f0cc1ec, %r2
15181 mov 0x5, %r1
15182 sllx %r1, 32, %r1
15183 or %r1, %r2, %r2
15184 .word 0x2acd0001 ! 1: BRNZ brnz,a,pt %r20,<label_0xd0001>
15185 stxa %r2, [%r0] ASI_LSU_CONTROL
15186 .word 0x3d400001 ! 106: FBPULE fbule,a,pn %fcc0, <label_0x1>
15187 .word 0xd8cfe050 ! 107: LDSBA_I ldsba [%r31, + 0x0050] %asi, %r12
15188 .word 0x9f803f16 ! 108: SIR sir 0x1f16
15189 .word 0xd8dfe058 ! 109: LDXA_I ldxa [%r31, + 0x0058] %asi, %r12
15190 .word 0x87802016 ! 110: WRASI_I wr %r0, 0x0016, %asi
15191mondo_1_83:
15192 nop
15193 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
15194 stxa %r6, [%r0+0x3e0] %asi
15195 .word 0x9d944013 ! 111: WRPR_WSTATE_R wrpr %r17, %r19, %wstate
15196 .word 0x81460000 ! 112: RD_STICK_REG stbar
15197vahole1_1_84:
15198 nop
15199 ta T_CHANGE_NONHPRIV
15200 setx vahole_target1, %r18, %r27
15201 jmpl %r27+0, %r27
15202 .word 0x87ac0a54 ! 113: FCMPd fcmpd %fcc<n>, %f16, %f20
15203 nop
15204 ta T_CHANGE_HPRIV
15205 mov 0x1+1, %r10
15206 set sync_thr_counter5, %r23
15207#ifndef SPC
15208 ldxa [%g0]0x63, %o1
15209 and %o1, 0x38, %o1
15210 add %o1, %r23, %r23
15211 sllx %o1, 5, %o3 !(CID*256)
15212#endif
15213 cas [%r23],%g0,%r10 !lock
15214 brnz %r10, cwq_1_85
15215 rd %asi, %r12
15216 wr %g0, 0x40, %asi
15217 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
15218 and %l1, 0x3, %l1 ! Check if busy/enabled ..
15219 cmp %l1, 1
15220 bne cwq_1_85
15221 set CWQ_BASE, %l6
15222#ifndef SPC
15223 add %l6, %o3, %l6
15224#endif
15225 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
15226 best_set_reg(0x20610020, %l1, %l2) !# Control Word
15227 sllx %l2, 32, %l2
15228 stx %l2, [%l6 + 0x0]
15229 membar #Sync
15230 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
15231 sub %l2, 0x40, %l2
15232 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
15233 wr %r12, %g0, %asi
15234 st %g0, [%r23]
15235cwq_1_85:
15236 ta T_CHANGE_NONHPRIV
15237 .word 0x99414000 ! 114: RDPC rd %pc, %r12
15238#if (defined SPC || defined CMP1)
15239!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_86) + 0, 16, 16)) -> intp(3,0,22,,,,,1)
15240!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_86)&0xffffffff) + 48, 16, 16)) -> intp(6,0,28,,,,,1)
15241#else
15242 set 0x3860cbd1, %r28
15243#if (MAX_THREADS == 8)
15244 and %r28, 0x7ff, %r28
15245#endif
15246 stxa %r28, [%g0] 0x73
15247#endif
15248intvec_1_86:
15249 .word 0x39400001 ! 115: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
15250pmu_1_87:
15251 nop
15252 setx 0xffffffb1ffffffa8, %g1, %g7
15253 .word 0xa3800007 ! 116: WR_PERF_COUNTER_R wr %r0, %r7, %-
15254trapasi_1_88:
15255 nop
15256 mov 0x10, %r1 ! (VA for ASI 0x49)
15257 .word 0xd8c04920 ! 117: LDSWA_R ldswa [%r1, %r0] 0x49, %r12
15258 .word 0xa7450000 ! 118: RD_SET_SOFTINT rd %set_softint, %r19
15259fpinit_1_89:
15260 nop
15261 setx fp_data_quads, %r19, %r20
15262 ldd [%r20], %f0
15263 ldd [%r20+8], %f4
15264 ld [%r20+16], %fsr
15265 ld [%r20+24], %r19
15266 wr %r19, %g0, %gsr
15267 .word 0x8da009c4 ! 119: FDIVd fdivd %f0, %f4, %f6
15268 .word 0x9f802dd2 ! 120: SIR sir 0x0dd2
15269 nop
15270 ta T_CHANGE_HPRIV ! macro
15271donret_1_90:
15272 rd %pc, %r12
15273 mov HIGHVA_HIGHNUM, %r10
15274 sllx %r10, 32, %r10
15275 or %r12, %r10, %r12
15276 add %r12, (donretarg_1_90-donret_1_90+4), %r12
15277 add %r12, 0x4, %r11 ! seq tnpc
15278 wrpr %g0, 0x1, %tl
15279 wrpr %g0, %r12, %tpc
15280 wrpr %g0, %r11, %tnpc
15281 set (0x00a12700 | (0x82 << 24)), %r13
15282 and %r12, 0xfff, %r14
15283 sllx %r14, 30, %r14
15284 or %r13, %r14, %r20
15285 wrpr %r20, %g0, %tstate
15286 wrhpr %g0, 0x11fd, %htstate
15287 ta T_CHANGE_NONPRIV ! rand=0 (1)
15288 retry
15289.align 32
15290donretarg_1_90:
15291 .word 0xe66fe075 ! 121: LDSTUB_I ldstub %r19, [%r31 + 0x0075]
15292 .word 0x9f8029e9 ! 122: SIR sir 0x09e9
15293splash_htba_1_91:
15294 nop
15295 ta T_CHANGE_HPRIV
15296 setx 0x0000000000280000, %r11, %r12
15297 .word 0x8b98000c ! 123: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
15298 nop
15299 ta T_CHANGE_HPRIV
15300 mov 0x1+1, %r10
15301 set sync_thr_counter5, %r23
15302#ifndef SPC
15303 ldxa [%g0]0x63, %o1
15304 and %o1, 0x38, %o1
15305 add %o1, %r23, %r23
15306 sllx %o1, 5, %o3 !(CID*256)
15307#endif
15308 cas [%r23],%g0,%r10 !lock
15309 brnz %r10, cwq_1_92
15310 rd %asi, %r12
15311 wr %g0, 0x40, %asi
15312 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
15313 and %l1, 0x3, %l1 ! Check if busy/enabled ..
15314 cmp %l1, 1
15315 bne cwq_1_92
15316 set CWQ_BASE, %l6
15317#ifndef SPC
15318 add %l6, %o3, %l6
15319#endif
15320 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
15321 best_set_reg(0x206100a0, %l1, %l2) !# Control Word
15322 sllx %l2, 32, %l2
15323 stx %l2, [%l6 + 0x0]
15324 membar #Sync
15325 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
15326 sub %l2, 0x40, %l2
15327 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
15328 wr %r12, %g0, %asi
15329 st %g0, [%r23]
15330cwq_1_92:
15331 ta T_CHANGE_NONHPRIV
15332 .word 0xa5414000 ! 124: RDPC rd %pc, %r18
15333 rd %tick, %r28
15334#if (MAX_THREADS == 8)
15335 sethi %hi(0x33800), %r27
15336#else
15337 sethi %hi(0x30000), %r27
15338#endif
15339 andn %r28, %r27, %r28
15340 ta T_CHANGE_HPRIV
15341 stxa %r28, [%g0] 0x73
15342intvec_1_93:
15343 .word 0x39400001 ! 125: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
15344 .word 0x8d802000 ! 126: WRFPRS_I wr %r0, 0x0000, %fprs
15345 .word 0x87ab0a4c ! 127: FCMPd fcmpd %fcc<n>, %f12, %f12
15346 .word 0x91a4c9ac ! 128: FDIVs fdivs %f19, %f12, %f8
15347 fbl skip_1_96
15348 fbge,a,pn %fcc0, skip_1_96
15349.align 2048
15350skip_1_96:
15351 .word 0x87ac0a46 ! 129: FCMPd fcmpd %fcc<n>, %f16, %f6
15352 .word 0xe8800ae0 ! 130: LDUWA_R lduwa [%r0, %r0] 0x57, %r20
15353intveclr_1_97:
15354 nop
15355 ta T_CHANGE_HPRIV
15356 setx 0xe97e2d6c20966a6b, %r1, %r28
15357 stxa %r28, [%g0] 0x72
15358 .word 0x25400001 ! 131: FBPLG fblg,a,pn %fcc0, <label_0x1>
15359splash_hpstate_1_98:
15360 .word 0x81983689 ! 132: WRHPR_HPSTATE_I wrhpr %r0, 0x1689, %hpstate
15361trapasi_1_99:
15362 nop
15363 mov 0x0, %r1 ! (VA for ASI 0x72)
15364 .word 0xe8d84e40 ! 133: LDXA_R ldxa [%r1, %r0] 0x72, %r20
15365#if (defined SPC || defined CMP)
15366!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_100)+40, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
15367!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_100)&0xffffffff) + 48, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
15368xir_1_100:
15369#else
15370#if (defined FC)
15371!! Generate XIR via RESET_GEN register
15372 ta T_CHANGE_HPRIV
15373 rdpr %pstate, %r18
15374 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
15375 wrpr %r18, %pstate
15376#ifndef XIR_RND_CORES
15377 ldxa [%g0] 0x63, %o1
15378 mov 1, %r18
15379 sllx %r18, %o1, %r18
15380#endif
15381 mov 0x30, %r19
15382 setx 0x8900000808, %r16, %r17
15383 mov 0x2, %r16
15384xir_1_100:
15385 stxa %r18, [%r19] 0x41
15386 stx %r16, [%r17]
15387#endif
15388#endif
15389 .word 0xa984b598 ! 134: WR_SET_SOFTINT_I wr %r18, 0x1598, %set_softint
15390intveclr_1_101:
15391 nop
15392 ta T_CHANGE_HPRIV
15393 setx 0x7082ff115dff282e, %r1, %r28
15394 stxa %r28, [%g0] 0x72
15395 ta T_CHANGE_NONHPRIV
15396 .word 0x25400001 ! 135: FBPLG fblg,a,pn %fcc0, <label_0x1>
15397intveclr_1_102:
15398 nop
15399 ta T_CHANGE_HPRIV
15400 setx 0x8165e96a11b2d99c, %r1, %r28
15401 stxa %r28, [%g0] 0x72
15402 .word 0x25400001 ! 136: FBPLG fblg,a,pn %fcc0, <label_0x1>
15403 nop
15404 ta T_CHANGE_HPRIV ! macro
15405donret_1_103:
15406 rd %pc, %r12
15407 mov HIGHVA_HIGHNUM, %r10
15408 sllx %r10, 32, %r10
15409 or %r12, %r10, %r12
15410 add %r12, (donretarg_1_103-donret_1_103), %r12
15411 add %r12, 0x8, %r11 ! nonseq tnpc
15412 wrpr %g0, 0x2, %tl
15413 wrpr %g0, %r12, %tpc
15414 wrpr %g0, %r11, %tnpc
15415 set (0x0093c400 | (28 << 24)), %r13
15416 and %r12, 0xfff, %r14
15417 sllx %r14, 30, %r14
15418 or %r13, %r14, %r20
15419 wrpr %r20, %g0, %tstate
15420 wrhpr %g0, 0xc1d, %htstate
15421 ta T_CHANGE_NONPRIV ! rand=0 (1)
15422 ldx [%r11+%r0], %g1
15423 done
15424donretarg_1_103:
15425 .word 0xe86fe18e ! 137: LDSTUB_I ldstub %r20, [%r31 + 0x018e]
15426ibp_1_104:
15427 nop
15428 .word 0xe1bfe120 ! 138: STDFA_I stda %f16, [0x0120, %r31]
15429 nop
15430 ta T_CHANGE_HPRIV
15431 mov 0x1, %r10
15432 set sync_thr_counter6, %r23
15433#ifndef SPC
15434 ldxa [%g0]0x63, %o1
15435 and %o1, 0x38, %o1
15436 add %o1, %r23, %r23
15437#endif
15438 cas [%r23],%g0,%r10 !lock
15439 brnz %r10, sma_1_105
15440 rd %asi, %r12
15441 wr %g0, 0x40, %asi
15442 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
15443 set 0x00061fff, %g1
15444 stxa %g1, [%g0 + 0x80] %asi
15445 wr %r12, %g0, %asi
15446 st %g0, [%r23]
15447sma_1_105:
15448 ta T_CHANGE_NONHPRIV
15449 .word 0xe9e7e013 ! 139: CASA_R casa [%r31] %asi, %r19, %r20
15450splash_cmpr_1_106:
15451 mov 0, %r18
15452 sllx %r18, 63, %r18
15453 rd %tick, %r17
15454 add %r17, 0x100, %r17
15455 or %r17, %r18, %r17
15456 ta T_CHANGE_HPRIV
15457 wrhpr %r17, %g0, %hsys_tick_cmpr
15458 .word 0xaf800011 ! 140: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
15459 .word 0xe8bfc029 ! 141: STDA_R stda %r20, [%r31 + %r9] 0x01
15460 .word 0x91d02032 ! 142: Tcc_I ta icc_or_xcc, %r0 + 50
15461splash_hpstate_1_108:
15462 ta T_CHANGE_NONHPRIV
15463 .word 0x8198349e ! 143: WRHPR_HPSTATE_I wrhpr %r0, 0x149e, %hpstate
15464dvapa_1_109:
15465 nop
15466 ta T_CHANGE_HPRIV
15467 mov 0x8b3, %r20
15468 mov 0x1a, %r19
15469 sllx %r20, 23, %r20
15470 or %r19, %r20, %r19
15471 stxa %r19, [%g0] ASI_LSU_CONTROL
15472 mov 0x38, %r18
15473 stxa %r31, [%r18]0x58
15474 ta T_CHANGE_NONHPRIV
15475 .word 0x87ac0a48 ! 144: FCMPd fcmpd %fcc<n>, %f16, %f8
15476 .word 0x2e800001 ! 1: BVS bvs,a <label_0x1>
15477 .word 0x8d903187 ! 145: WRPR_PSTATE_I wrpr %r0, 0x1187, %pstate
15478memptr_1_111:
15479 set user_data_start, %r31
15480 .word 0x8580f5d0 ! 146: WRCCR_I wr %r3, 0x15d0, %ccr
15481ceter_1_112:
15482 nop
15483 ta T_CHANGE_HPRIV
15484 mov 7, %r17
15485 sllx %r17, 60, %r17
15486 mov 0x18, %r16
15487 stxa %r17, [%r16]0x4c
15488 ta T_CHANGE_NONHPRIV
15489 .word 0xa7410000 ! 147: RDTICK rd %tick, %r19
15490 nop
15491 ta T_CHANGE_HPRIV ! macro
15492donret_1_113:
15493 rd %pc, %r12
15494 mov HIGHVA_HIGHNUM, %r10
15495 sllx %r10, 32, %r10
15496 or %r12, %r10, %r12
15497 add %r12, (donretarg_1_113-donret_1_113+4), %r12
15498 add %r12, 0x4, %r11 ! seq tnpc
15499 andn %r11, %r10, %r11 ! low VA tnpc
15500 wrpr %g0, 0x2, %tl
15501 wrpr %g0, %r12, %tpc
15502 wrpr %g0, %r11, %tnpc
15503 set (0x00569700 | (0x89 << 24)), %r13
15504 and %r12, 0xfff, %r14
15505 sllx %r14, 30, %r14
15506 or %r13, %r14, %r20
15507 wrpr %r20, %g0, %tstate
15508 wrhpr %g0, 0x194e, %htstate
15509 ta T_CHANGE_NONHPRIV ! rand=1 (1)
15510 ldx [%r11+%r0], %g1
15511 done
15512donretarg_1_113:
15513 .word 0xe6ffe1da ! 148: SWAPA_I swapa %r19, [%r31 + 0x01da] %asi
15514splash_tba_1_114:
15515 nop
15516 ta T_CHANGE_PRIV
15517 setx 0x0000000000380000, %r11, %r12
15518 .word 0x8b90000c ! 149: WRPR_TBA_R wrpr %r0, %r12, %tba
15519splash_htba_1_115:
15520 nop
15521 ta T_CHANGE_HPRIV
15522 setx 0x0000000000280000, %r11, %r12
15523 .word 0x8b98000c ! 150: WRHPR_HTBA_R wrhpr %r0, %r12, %htba
15524fpinit_1_116:
15525 nop
15526 setx fp_data_quads, %r19, %r20
15527 ldd [%r20], %f0
15528 ldd [%r20+8], %f4
15529 ld [%r20+16], %fsr
15530 ld [%r20+24], %r19
15531 wr %r19, %g0, %gsr
15532 .word 0xc3e835d0 ! 151: PREFETCHA_I prefetcha [%r0, + 0xfffff5d0] %asi, #one_read
15533tagged_1_117:
15534 taddcctv %r5, 0x1b0c, %r18
15535 .word 0xe607e1dd ! 152: LDUW_I lduw [%r31 + 0x01dd], %r19
15536#if (defined SPC || defined CMP)
15537!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_118)+0, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
15538!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_118)&0xffffffff) + 24, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
15539xir_1_118:
15540#else
15541#if (defined FC)
15542!! Generate XIR via RESET_GEN register
15543 ta T_CHANGE_HPRIV
15544 rdpr %pstate, %r18
15545 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
15546 wrpr %r18, %pstate
15547#ifndef XIR_RND_CORES
15548 ldxa [%g0] 0x63, %o1
15549 mov 1, %r18
15550 sllx %r18, %o1, %r18
15551#endif
15552 mov 0x30, %r19
15553 setx 0x8900000808, %r16, %r17
15554 mov 0x2, %r16
15555xir_1_118:
15556 stxa %r18, [%r19] 0x41
15557 stx %r16, [%r17]
15558#endif
15559#endif
15560 .word 0xa984bed8 ! 153: WR_SET_SOFTINT_I wr %r18, 0x1ed8, %set_softint
15561 .word 0x89800011 ! 154: WRTICK_R wr %r0, %r17, %tick
15562mondo_1_120:
15563 nop
15564 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
15565 stxa %r20, [%r0+0x3d0] %asi
15566 .word 0x9d948011 ! 155: WRPR_WSTATE_R wrpr %r18, %r17, %wstate
15567 .word 0xe737c000 ! 156: STQF_R - %f19, [%r0, %r31]
15568 .word 0x87802039 ! 157: WRASI_I wr %r0, 0x0039, %asi
15569 .word 0xa868fbcd ! 158: UDIVX_I udivx %r3, 0xfffffbcd, %r20
15570splash_cmpr_1_121:
15571 mov 0, %r18
15572 sllx %r18, 63, %r18
15573 rd %tick, %r17
15574 add %r17, 0x100, %r17
15575 or %r17, %r18, %r17
15576 .word 0xaf800011 ! 159: WR_TICK_CMPR_REG_R wr %r0, %r17, %-
15577 nop
15578 ta T_CHANGE_HPRIV ! macro
15579donret_1_122:
15580 rd %pc, %r12
15581 mov HIGHVA_HIGHNUM, %r10
15582 sllx %r10, 32, %r10
15583 or %r12, %r10, %r12
15584 add %r12, (donretarg_1_122-donret_1_122), %r12
15585 add %r12, 0x4, %r11 ! seq tnpc
15586 andn %r11, %r10, %r11 ! low VA tnpc
15587 wrpr %g0, 0x1, %tl
15588 wrpr %g0, %r12, %tpc
15589 wrpr %g0, %r11, %tnpc
15590 set (0x0090ce00 | (0x55 << 24)), %r13
15591 and %r12, 0xfff, %r14
15592 sllx %r14, 30, %r14
15593 or %r13, %r14, %r20
15594 wrpr %r20, %g0, %tstate
15595 wrhpr %g0, 0xd07, %htstate
15596 ta T_CHANGE_NONPRIV ! rand=0 (1)
15597 ldx [%r12+%r0], %g1
15598 retry
15599donretarg_1_122:
15600 .word 0x9ba509d3 ! 160: FDIVd fdivd %f20, %f50, %f44
15601pmu_1_123:
15602 nop
15603 setx 0xffffffbeffffffa8, %g1, %g7
15604 .word 0xa3800007 ! 161: WR_PERF_COUNTER_R wr %r0, %r7, %-
15605splash_tba_1_124:
15606 nop
15607 ta T_CHANGE_PRIV
15608 set 0x120000, %r12
15609 .word 0x8b90000c ! 162: WRPR_TBA_R wrpr %r0, %r12, %tba
15610mondo_1_125:
15611 nop
15612 .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi
15613 ta T_CHANGE_PRIV
15614 stxa %r20, [%r0+0x3e8] %asi
15615 .word 0x9d914003 ! 163: WRPR_WSTATE_R wrpr %r5, %r3, %wstate
15616 .word 0xa190200c ! 164: WRPR_GL_I wrpr %r0, 0x000c, %-
15617trapasi_1_126:
15618 nop
15619 mov 0x8, %r1 ! (VA for ASI 0x5b)
15620 .word 0xdad04b60 ! 165: LDSHA_R ldsha [%r1, %r0] 0x5b, %r13
15621 .word 0x8d802000 ! 166: WRFPRS_I wr %r0, 0x0000, %fprs
15622splash_tba_1_127:
15623 nop
15624 ta T_CHANGE_PRIV
15625 setx 0x0000000000380000, %r11, %r12
15626 .word 0x8b90000c ! 167: WRPR_TBA_R wrpr %r0, %r12, %tba
15627 invalw
15628 mov 0x34, %r30
15629 .word 0x91d0001e ! 168: Tcc_R ta icc_or_xcc, %r0 + %r30
15630 nop
15631 ta T_CHANGE_HPRIV
15632 mov 0x1, %r10
15633 set sync_thr_counter6, %r23
15634#ifndef SPC
15635 ldxa [%g0]0x63, %o1
15636 and %o1, 0x38, %o1
15637 add %o1, %r23, %r23
15638#endif
15639 cas [%r23],%g0,%r10 !lock
15640 brnz %r10, sma_1_128
15641 rd %asi, %r12
15642 wr %g0, 0x40, %asi
15643 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
15644 set 0x001e1fff, %g1
15645 stxa %g1, [%g0 + 0x80] %asi
15646 wr %r12, %g0, %asi
15647 st %g0, [%r23]
15648sma_1_128:
15649 ta T_CHANGE_NONHPRIV
15650 .word 0xdbe7e00c ! 169: CASA_R casa [%r31] %asi, %r12, %r13
15651 .word 0x9f803e99 ! 170: SIR sir 0x1e99
15652 .word 0x8d903f75 ! 171: WRPR_PSTATE_I wrpr %r0, 0x1f75, %pstate
15653ibp_1_130:
15654 nop
15655 ta T_CHANGE_NONHPRIV
15656 .word 0xe19fe1c0 ! 172: LDDFA_I ldda [%r31, 0x01c0], %f16
15657 .word 0x9a68f694 ! 173: UDIVX_I udivx %r3, 0xfffff694, %r13
15658 .word 0xa16cc010 ! 174: SDIVX_R sdivx %r19, %r16, %r16
15659dvapa_1_131:
15660 nop
15661 ta T_CHANGE_HPRIV
15662 mov 0xe18, %r20
15663 mov 0x0, %r19
15664 sllx %r20, 23, %r20
15665 or %r19, %r20, %r19
15666 stxa %r19, [%g0] ASI_LSU_CONTROL
15667 mov 0x38, %r18
15668 stxa %r31, [%r18]0x58
15669 ta T_CHANGE_NONHPRIV
15670 .word 0xe0dfc02d ! 175: LDXA_R ldxa [%r31, %r13] 0x01, %r16
15671 .word 0xa7817d17 ! 176: WR_GRAPHICS_STATUS_REG_I wr %r5, 0x1d17, %-
15672 nop
15673 ta T_CHANGE_HPRIV
15674 mov 0x1+1, %r10
15675 set sync_thr_counter5, %r23
15676#ifndef SPC
15677 ldxa [%g0]0x63, %o1
15678 and %o1, 0x38, %o1
15679 add %o1, %r23, %r23
15680 sllx %o1, 5, %o3 !(CID*256)
15681#endif
15682 cas [%r23],%g0,%r10 !lock
15683 brnz %r10, cwq_1_132
15684 rd %asi, %r12
15685 wr %g0, 0x40, %asi
15686 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
15687 and %l1, 0x3, %l1 ! Check if busy/enabled ..
15688 cmp %l1, 1
15689 bne cwq_1_132
15690 set CWQ_BASE, %l6
15691#ifndef SPC
15692 add %l6, %o3, %l6
15693#endif
15694 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
15695 best_set_reg(0x20610050, %l1, %l2) !# Control Word
15696 sllx %l2, 32, %l2
15697 stx %l2, [%l6 + 0x0]
15698 membar #Sync
15699 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
15700 sub %l2, 0x40, %l2
15701 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
15702 wr %r12, %g0, %asi
15703 st %g0, [%r23]
15704cwq_1_132:
15705 ta T_CHANGE_NONHPRIV
15706 .word 0x9b414000 ! 177: RDPC rd %pc, %r13
15707fpinit_1_133:
15708 nop
15709 setx fp_data_quads, %r19, %r20
15710 ldd [%r20], %f0
15711 ldd [%r20+8], %f4
15712 ld [%r20+16], %fsr
15713 ld [%r20+24], %r19
15714 wr %r19, %g0, %gsr
15715 .word 0x89a009a4 ! 178: FDIVs fdivs %f0, %f4, %f4
15716splash_lsu_1_134:
15717 nop
15718 ta T_CHANGE_HPRIV
15719 set 0x6a49fa43, %r2
15720 mov 0x1, %r1
15721 sllx %r1, 32, %r1
15722 or %r1, %r2, %r2
15723 stxa %r2, [%r0] ASI_LSU_CONTROL
15724 ta T_CHANGE_NONHPRIV
15725 .word 0x3d400001 ! 179: FBPULE fbule,a,pn %fcc0, <label_0x1>
15726 .word 0x87802083 ! 180: WRASI_I wr %r0, 0x0083, %asi
15727#if (defined SPC || defined CMP)
15728!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_135)+40, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
15729!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_135)&0xffffffff) + 48, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1)
15730xir_1_135:
15731#else
15732#if (defined FC)
15733!! Generate XIR via RESET_GEN register
15734 ta T_CHANGE_HPRIV
15735 rdpr %pstate, %r18
15736 andn %r18, 0x208, %r18 ! Reset pstate.am,cle
15737 wrpr %r18, %pstate
15738#ifndef XIR_RND_CORES
15739 ldxa [%g0] 0x63, %o1
15740 mov 1, %r18
15741 sllx %r18, %o1, %r18
15742#endif
15743 mov 0x30, %r19
15744 setx 0x8900000808, %r16, %r17
15745 mov 0x2, %r16
15746xir_1_135:
15747 stxa %r18, [%r19] 0x41
15748 stx %r16, [%r17]
15749#endif
15750#endif
15751 .word 0xa984aa1f ! 181: WR_SET_SOFTINT_I wr %r18, 0x0a1f, %set_softint
15752trapasi_1_136:
15753 nop
15754 mov 0x110, %r1 ! (VA for ASI 0x4a)
15755 .word 0xdad84940 ! 182: LDXA_R ldxa [%r1, %r0] 0x4a, %r13
15756intveclr_1_137:
15757 nop
15758 ta T_CHANGE_HPRIV
15759 setx 0x39494d2c3ead1ae4, %r1, %r28
15760 stxa %r28, [%g0] 0x72
15761 ta T_CHANGE_NONHPRIV
15762 .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1>
15763tagged_1_138:
15764 tsubcctv %r16, 0x1340, %r6
15765 .word 0xda07e1b1 ! 184: LDUW_I lduw [%r31 + 0x01b1], %r13
15766splash_hpstate_1_139:
15767 ta T_CHANGE_NONHPRIV
15768 .word 0x3e800001 ! 1: BVC bvc,a <label_0x1>
15769 .word 0x819823cc ! 185: WRHPR_HPSTATE_I wrhpr %r0, 0x03cc, %hpstate
15770 .word 0xda77c000 ! 186: STX_R stx %r13, [%r31 + %r0]
15771brcommon3_1_140:
15772 nop
15773 setx common_target, %r12, %r27
15774 lduw [%r27], %r12 ! Load common dest into dcache ..
15775 ba,a .+12
15776 .word 0xdb37e150 ! 1: STQF_I - %f13, [0x0150, %r31]
15777 ba,a .+8
15778 jmpl %r27+0, %r27
15779 .word 0x8d9034cd ! 187: WRPR_PSTATE_I wrpr %r0, 0x14cd, %pstate
15780 otherw
15781 mov 0xb1, %r30
15782 .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30
15783ibp_1_141:
15784 nop
15785 .word 0x99a409d4 ! 189: FDIVd fdivd %f16, %f20, %f12
15786tagged_1_142:
15787 tsubcctv %r16, 0x146a, %r19
15788 .word 0xd807e1f5 ! 190: LDUW_I lduw [%r31 + 0x01f5], %r12
15789 .word 0x87802080 ! 191: WRASI_I wr %r0, 0x0080, %asi
15790intveclr_1_143:
15791 nop
15792 ta T_CHANGE_HPRIV
15793 setx 0xfdaf5e0947547c8a, %r1, %r28
15794 stxa %r28, [%g0] 0x72
15795 ta T_CHANGE_NONHPRIV
15796 .word 0x25400001 ! 192: FBPLG fblg,a,pn %fcc0, <label_0x1>
15797#if (defined SPC || defined CMP1)
15798!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_144) + 40, 16, 16)) -> intp(0,0,16,,,,,1)
15799!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_144)&0xffffffff) + 40, 16, 16)) -> intp(6,0,0,,,,,1)
15800#else
15801 set 0x97804665, %r28
15802#if (MAX_THREADS == 8)
15803 and %r28, 0x7ff, %r28
15804#endif
15805 stxa %r28, [%g0] 0x73
15806#endif
15807intvec_1_144:
15808 .word 0x39400001 ! 193: FBPUGE fbuge,a,pn %fcc0, <label_0x1>
15809 .word 0x8780208a ! 194: WRASI_I wr %r0, 0x008a, %asi
15810 .word 0x89800011 ! 195: WRTICK_R wr %r0, %r17, %tick
15811dvapa_1_146:
15812 nop
15813 ta T_CHANGE_HPRIV
15814 mov 0x899, %r20
15815 mov 0x13, %r19
15816 sllx %r20, 23, %r20
15817 or %r19, %r20, %r19
15818 stxa %r19, [%g0] ASI_LSU_CONTROL
15819 mov 0x38, %r18
15820 stxa %r31, [%r18]0x58
15821 ta T_CHANGE_NONHPRIV
15822 .word 0xc19fe120 ! 196: LDDFA_I ldda [%r31, 0x0120], %f0
15823splash_tba_1_147:
15824 nop
15825 ta T_CHANGE_PRIV
15826 setx 0x0000000000380000, %r11, %r12
15827 .word 0x8b90000c ! 197: WRPR_TBA_R wrpr %r0, %r12, %tba
15828 .word 0x96c36bbd ! 198: ADDCcc_I addccc %r13, 0x0bbd, %r11
15829pmu_1_148:
15830 nop
15831 setx 0xffffffbaffffffa7, %g1, %g7
15832 .word 0xa3800007 ! 199: WR_PERF_COUNTER_R wr %r0, %r7, %-
15833ibp_1_149:
15834 nop
15835 ta T_CHANGE_NONHPRIV
15836 .word 0xc19fda00 ! 200: LDDFA_R ldda [%r31, %r0], %f0
15837 nop
15838 nop
15839 ta T_CHANGE_PRIV
15840 wrpr %g0, %g0, %gl
15841 nop
15842 nop
15843
15844join_lbl_0_0:
15845SECTION .MAIN
15846.text
15847diag_finish:
15848 nop
15849 nop
15850 nop
15851 ta T_CHANGE_HPRIV
15852#if (MULTIPASS > 0)
15853multipass_check:
15854 rd %asi, %r12
15855 wr %g0, ASI_SCRATCHPAD, %asi
15856 ldxa [0x38]%asi, %r10
15857 cmp %r10, MULTIPASS
15858 inc %r10
15859 stxa %r10, [0x38]%asi
15860 wr %g0, %r12, %asi
15861 bne fork_threads
15862 wrpr %g0, %g0, %gl
15863#endif
15864finish_diag:
15865 best_set_reg(HV_TRAP_BASE_PA, %r1, %r2)
15866 wrhpr %g2, %g0, %htba
15867 ta T_GOOD_TRAP
15868 nop
15869 nop
15870 nop
15871.data
15872 .xword 0x0
15873 ! fp data rs1, rs2, fsr, gsr quads ..
15874.global fp_data_quads
15875fp_data_quads:
15876 .xword 0x0044000000000000
15877 .xword 0x4028000000000000
15878 .xword 0x0fc0400400000000
15879 .xword 0x0000000000000000
15880 .xword 0x0041000000000000
15881 .xword 0x4022000000000000
15882 .xword 0x0600800000000000
15883 .xword 0x0000000000000000
15884 .xword 0x0220000000000000
15885 .xword 0x4140000000000000
15886 .xword 0x4fc0400400000000
15887 .xword 0x0000000000000000
15888 .xword 0x4090000000000000
15889 .xword 0x0090000000000000
15890 .xword 0x0f80400800000000
15891 .xword 0x0a00000000000000
15892.align 128
15893.global user_data_start
15894.data
15895user_data_start:
15896
15897 .xword 0x331b631809ec33a8
15898 .xword 0xf3b2213cb0dea26d
15899 .xword 0x36f450e2591d7299
15900 .xword 0x2461c18b19890e2b
15901 .xword 0x79465b8ad87a619a
15902 .xword 0x7d2be13d4a961d1d
15903 .xword 0x8f447def691df235
15904 .xword 0x27419199e2b6f3a0
15905 .xword 0x1e954d9787aa3690
15906 .xword 0xc06e83437b9c75ff
15907 .xword 0xf54dbd517524b3f8
15908 .xword 0x9976a12b0a6691c1
15909 .xword 0x0cf27cf381bd7062
15910 .xword 0xcf37afe424199982
15911 .xword 0xcc71ba8aead0c6d8
15912 .xword 0xb3834313074098ba
15913 .xword 0xce30a45eb2f5e70c
15914 .xword 0x36e4a485663c3433
15915 .xword 0x1e01a778a9397844
15916 .xword 0xcc7686cc0b312d96
15917 .xword 0x7272df29e076ec44
15918 .xword 0xac1bcf1cae8abc40
15919 .xword 0x8c8ccbe6b4227266
15920 .xword 0x147f9d40a8654ef4
15921 .xword 0x3e17088c5c85df73
15922 .xword 0xcc50c62d9f9f2c1d
15923 .xword 0xfb11fa24d34d501f
15924 .xword 0xd67e86332de99ea8
15925 .xword 0x1e069cbe678517a5
15926 .xword 0xd4d817d7b4bbec72
15927 .xword 0x1f0ba71a1ce39c52
15928 .xword 0x50b7bc6fec2e09e2
15929 .xword 0x1138eee77886f5c0
15930 .xword 0x5c6ace6603c0210d
15931 .xword 0xba717ab622189493
15932 .xword 0xfc271c39146465eb
15933 .xword 0x16648f9bc6f66df1
15934 .xword 0x73e0b8f71930e7c8
15935 .xword 0xe8948d34065c1154
15936 .xword 0x42f2386fbabd4b2e
15937 .xword 0x3215df64a76459a7
15938 .xword 0xc965a9be2d459570
15939 .xword 0xf03b78f5bb9e2eba
15940 .xword 0x93c1ca2c1104a983
15941 .xword 0xb1047e9f842f4292
15942 .xword 0xbf80d393179bb0ed
15943 .xword 0xc2df8c5a1e405cfb
15944 .xword 0x404ded6377fe882a
15945 .xword 0x42905c7a7bc24bad
15946 .xword 0xa5f2d961e77e8f67
15947 .xword 0x8bc589ba0b310f92
15948 .xword 0xd3f2d5528d1bbde6
15949 .xword 0x132710e0ef3b8e0c
15950 .xword 0x5fb683c1e0b4e535
15951 .xword 0xbee45201bd053576
15952 .xword 0x9ef5634f4ccfbdc7
15953 .xword 0xaeeb12d6305573ff
15954 .xword 0x0dad6655ed6690d3
15955 .xword 0xa779358e5aea373e
15956 .xword 0x7622eeeb5466363f
15957 .xword 0x5984a579011a9709
15958 .xword 0xff46adda829e7bf5
15959 .xword 0x144723a68806b153
15960 .xword 0xf7275545a1fb8a3f
15961 .xword 0x8720301346593fcf
15962 .xword 0x40b2b333f5b19794
15963 .xword 0xb08474ceb6e96c27
15964 .xword 0xcca9796998fd9534
15965 .xword 0x3e81ca8d31eeb0bf
15966 .xword 0xdab44fb08e69de80
15967 .xword 0xb8cda60d2375fde7
15968 .xword 0x287a43058488d311
15969 .xword 0x25bd277df88ac8e1
15970 .xword 0xd7ae5b5508607566
15971 .xword 0xdaa249e57ff302fa
15972 .xword 0x5d92132342b85224
15973 .xword 0x21a0c0aba29f2cfd
15974 .xword 0x42c23c5eaab46099
15975 .xword 0x7a2c7dd9e9f78df8
15976 .xword 0x12833f41b99b8cef
15977 .xword 0xb2c9ef3813df8b78
15978 .xword 0x4304159d1b96866f
15979 .xword 0xa480cc5aabb46afa
15980 .xword 0x81613a58b488cc4d
15981 .xword 0x45ee5320950356d7
15982 .xword 0x95a828b31a9ee744
15983 .xword 0x24047167a131f194
15984 .xword 0xad739170204c4fbe
15985 .xword 0x076ab02fa251d90b
15986 .xword 0xb3f988e15c01ecb2
15987 .xword 0xeb3d06e41a17640a
15988 .xword 0x184d38ffde261a06
15989 .xword 0x89e79e8fc99027af
15990 .xword 0xe2ccdae4cf7e7898
15991 .xword 0xa0a9540e2bfd468a
15992 .xword 0xc6288f4f07a209fc
15993 .xword 0x418036e3a5751abb
15994 .xword 0xd6d2f49cbbd46edd
15995 .xword 0x9bf65f68cf93d714
15996 .xword 0xeb0d99ef18f694b9
15997 .xword 0xe027115a3552352f
15998 .xword 0xd9178b5b18936710
15999 .xword 0x2730820b2309652f
16000 .xword 0xf86f16b629cba0f9
16001 .xword 0x016ddb14078cea1e
16002 .xword 0x6516d0946d17f4d2
16003 .xword 0x9f5d8e64c3bc8137
16004 .xword 0xa106931788d0c4f9
16005 .xword 0x30978524e2ee056f
16006 .xword 0x6500cfb5ecd46787
16007 .xword 0x5841a8c268faa02d
16008 .xword 0xac4fc6bed66f8c83
16009 .xword 0xd6b191cea3bf061e
16010 .xword 0x9ca24c8d82ee72ff
16011 .xword 0x3d7c8081720b96df
16012 .xword 0x916c57b9cb500227
16013 .xword 0x39ec751485bcd373
16014 .xword 0x8c4fd30b8d0f84c0
16015 .xword 0xfa3e7c1019b4e2f2
16016 .xword 0x417712ec3c894dab
16017 .xword 0xd012a6e04e59c025
16018 .xword 0x8fb62bd644795b2a
16019 .xword 0x0b9c425d502ea295
16020 .xword 0xf11c1cbcbed6507f
16021 .xword 0xda998fb727d4dcda
16022 .xword 0xf32cb5aeaa6c7351
16023 .xword 0x6bfd02e927d4a43a
16024 .xword 0xe6994d79b3b813a8
16025 .xword 0xe63eaf6c33f90d3d
16026 .xword 0x0d9a8b4351ac7b25
16027 .xword 0x61fdaa84848b94d6
16028 .xword 0xc95839ba8e6ea5cd
16029 .xword 0xbae6f87394baf8e1
16030 .xword 0x603c5770d88b0f29
16031 .xword 0x07fe9c506b1f3917
16032 .xword 0xbb6cbb81e02a5ced
16033 .xword 0x1bc5db89cf3e7793
16034 .xword 0x56d35d0a38b76ad0
16035 .xword 0x92a3a30421cab83d
16036 .xword 0x742364ff4bcdb537
16037 .xword 0xfa93c9a3470fab88
16038 .xword 0x3a2c0e1f20db0011
16039 .xword 0xc89be59dced24322
16040 .xword 0x1c1003fbb600bbd9
16041 .xword 0x83b6559944b260ea
16042 .xword 0x7cfd3f144d26d6ed
16043 .xword 0x606473938e7f12db
16044 .xword 0xc10e71b538735d9d
16045 .xword 0x0501836e7819a930
16046 .xword 0x47b7180867dd9d80
16047 .xword 0xfc7d678ce55499ba
16048 .xword 0xd326e7f31236df23
16049 .xword 0xd9f8903a6b9ef250
16050 .xword 0xe82c6a95782d597d
16051 .xword 0xfbf0fbe4c742bffd
16052 .xword 0x2ba10b767306d48b
16053 .xword 0xd12f25a5192ef433
16054 .xword 0xaedce25a1a5f2688
16055 .xword 0xd4ac019e53cb71ea
16056 .xword 0xa1d7dba8b75761cf
16057 .xword 0x57d6778855b90101
16058 .xword 0x78b61abdeff887a0
16059 .xword 0x977191d33a2013d8
16060 .xword 0x6767917ff44bc79f
16061 .xword 0xc9d2ea46f145859f
16062 .xword 0x65632085fbc357c2
16063 .xword 0xbf87887dab4167b8
16064 .xword 0x8033c5e296e50355
16065 .xword 0x23e3935cceb94a9b
16066 .xword 0xe9ae3044017ce315
16067 .xword 0xe8a16aa774800861
16068 .xword 0x49bb9ee55f82e2e4
16069 .xword 0x2d633a2c8fd1a0f4
16070 .xword 0x7373d1b65a2582f1
16071 .xword 0xaf2acee16e9c47cc
16072 .xword 0x9dde1e9c3a0ae090
16073 .xword 0xf73778e2d192c744
16074 .xword 0x54ada8850f266961
16075 .xword 0xcb2beeed9bc15254
16076 .xword 0x66f13a9f133591f6
16077 .xword 0x6834992e1dbec65b
16078 .xword 0x9faf9712f4172833
16079 .xword 0x4b4f856615883d23
16080 .xword 0x1dee51ed472128d2
16081 .xword 0x051f8e191ac1577b
16082 .xword 0x3afa4d141d6e861c
16083 .xword 0xa29646062edc1a54
16084 .xword 0x67b37f96c14ae8e9
16085 .xword 0x2671bc517302fd20
16086 .xword 0x1a2e5434d8029173
16087 .xword 0x0eb945b1b39092ab
16088 .xword 0x7c5f09fcd33701c5
16089 .xword 0x5497ca4ea727cfc6
16090 .xword 0x797a815e1fdb79c8
16091 .xword 0xef6215d63f159d4e
16092 .xword 0xde36a7be1137ff52
16093 .xword 0xc497a801325ac13e
16094 .xword 0x2e995d0b06f48a04
16095 .xword 0x7604d4a384474f23
16096 .xword 0x11b30607255842b7
16097 .xword 0xdd9a3e27fa585295
16098 .xword 0x6ae52f04ece0379b
16099 .xword 0xba01335bfe729e4a
16100 .xword 0x8eeeb2b41cc0e0da
16101 .xword 0x1280326c51f23b3c
16102 .xword 0x75e1b48995470904
16103 .xword 0xce714a9047fefda1
16104 .xword 0xcac5206c8ad61a32
16105 .xword 0xdf5d85b6658f5874
16106 .xword 0x99024ce6ae3f218d
16107 .xword 0xb96b5f2c791033aa
16108 .xword 0xe2f4e83ebe59bfd1
16109 .xword 0x53a21a7671cf989e
16110 .xword 0xec423431d2ff1b31
16111 .xword 0xbdada2d432099f9c
16112 .xword 0xcb3591cf27706e2a
16113 .xword 0xe91ed731fbfc4bc2
16114 .xword 0x1e94ab47ebd036a7
16115 .xword 0xd2d1ca7364e296ae
16116 .xword 0x310852fefdf320bd
16117 .xword 0x2ef22675cbfc96fd
16118 .xword 0x71ace5c4aac31d7b
16119 .xword 0x7b2448bbb15ab871
16120 .xword 0xc7b1765826d7608f
16121 .xword 0x917d3af12d80c3d6
16122 .xword 0xabfcd55692eec6b8
16123 .xword 0xe490304e21772152
16124 .xword 0x8f7fee154ded4399
16125 .xword 0x1709b319735c894d
16126 .xword 0x6f2fba8522c3e7da
16127 .xword 0x9f170a96a818759a
16128 .xword 0x8f9a95d370b99f4e
16129 .xword 0xd38de37b8dd80dc0
16130 .xword 0x2a66d3fb268584ea
16131 .xword 0xec4cdd6da4cfefbb
16132 .xword 0x4bf7e08ee16645f0
16133 .xword 0x14e7523dee58de28
16134 .xword 0x8c102af4f6f10ba0
16135 .xword 0x88b3aa498c50c433
16136 .xword 0x50fcef869704fa82
16137 .xword 0x950b6475c4e8d8a9
16138 .xword 0x2199f9a329093d94
16139 .xword 0x3d72297e4b4b633f
16140 .xword 0x89bb087b3fa4b290
16141 .xword 0xa6516f8752b2fdbd
16142 .xword 0x5b7a311fabc5e940
16143 .xword 0x0059d8bf90919eaf
16144 .xword 0x6dec1cff2edd7caf
16145 .xword 0x60a16bde68e62752
16146 .xword 0x2622afe97ca15109
16147 .xword 0x4159ac1a9b3d8b5a
16148 .xword 0xc2d2f8c78c3725eb
16149 .xword 0x3b390862858b65cf
16150 .xword 0x178c004788170053
16151 .xword 0xc23cc41715649449
16152 .xword 0xbdd870ae20c39013
16153
16154SECTION .HTRAPS
16155.text
16156.global restore_range_regs
16157restore_range_regs:
16158 wr %g0, ASI_MMU_REAL_RANGE, %asi
16159 mov 1, %g1
16160 sllx %g1, 63, %g1
16161 ldxa [ASI_MMU_REAL_RANGE_0] %asi, %g2
16162 or %g2 ,%g1, %g2
16163 stxa %g2, [ASI_MMU_REAL_RANGE_0] %asi
16164 ldxa [ASI_MMU_REAL_RANGE_1] %asi, %g2
16165 or %g2 ,%g1, %g2
16166 stxa %g2, [ASI_MMU_REAL_RANGE_1] %asi
16167 ldxa [ASI_MMU_REAL_RANGE_2] %asi, %g2
16168 or %g2 ,%g1, %g2
16169 stxa %g2, [ASI_MMU_REAL_RANGE_2] %asi
16170 ldxa [ASI_MMU_REAL_RANGE_3] %asi, %g2
16171 or %g2 ,%g1, %g2
16172 stxa %g2, [ASI_MMU_REAL_RANGE_3] %asi
16173 retry
16174
16175.global wdog_2_ext
16176# 10 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_extensions.s"
16177SECTION .HTRAPS
16178.global wdog_2_ext
16179.global retry_with_base_tba
16180.global resolve_bad_tte
16181
16182.text
16183resolve_bad_tte:
16184 !if pc[13:5]==0, then assume not a relocated handler
16185 rdpr %tpc, %r4
16186 andn %r4, 0xf, %r5
16187 sllx %r5, 49, %r5
16188 brnz,a %r5, retry_with_base_tba
16189 !assume %r27 is where we came from ..
16190 fdivd %f0, %f4, %f12
16191 jmpl %r27+8, %r0
16192 fdivs %f0, %f4, %f12
16193retry_with_base_tba:
16194 best_set_reg(TRAP_BASE_VA, %r3, %r5)
16195 cmp %r4, %r5
16196 bz htrap_5_ext_done
16197 set 0x7fff, %r3
16198 and %r4, %r3, %r4
16199 or %r5, %r4, %r4
16200 wrpr %r4, %tpc
16201 rdpr %tnpc, %r4
16202 and %r4, %r3, %r4
16203 or %r5, %r4, %r4
16204 wrpr %r4, %tnpc
16205 retry
16206
16207htrap_5_ext:
16208 rd %pc, %l2
16209 inc %l3
16210 add %l2, htrap_5_ext_done-htrap_5_ext, %l2
16211 rdpr %tl, %l3
16212 rdpr %tstate, %l4
16213 rdhpr %htstate, %l5
16214 or %l5, 0x4, %l5
16215 inc %l3
16216 wrpr %l3, %tl
16217 wrpr %l2, %tpc
16218 add %l2, 4, %l2
16219 wrpr %l2, %tnpc
16220 wrpr %l4, %tstate
16221 wrhpr %l5, %htstate
16222 retry
16223htrap_5_ext_done:
16224 done
16225
16226wdog_2_ext:
16227 mov 0x1f, %l1
16228 stxa %l1, [%g0] ASI_LSU_CTL_REG
16229 ! If TT != 2, then goto trap handler
16230 rdpr %tt, %l1
16231 cmp %l1, 0x2
16232 bne wdog_2_goto_handler
16233 nop
16234 ! else done
16235 done
16236wdog_2_goto_handler:
16237 rdhpr %htstate, %l3
16238 and %l3, 0x4, %l3 ! If previously in hpriv mode, go to hpriv
16239 brnz,a %l3, wdog_2_goto_handler_1
16240 rdhpr %htba, %l3
16241 srlx %l1, 7, %l3 ! Send priv sw traps to priv mode ..
16242 cmp %l3, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap ..
16243 be,a wdog_2_goto_handler_1
16244 rdpr %tba, %l3
16245 rdhpr %htba, %l3
16246wdog_2_goto_handler_1:
16247 sllx %l1, 5, %l1
16248 add %l1, %l3, %l3
16249 jmp %l3
16250 nop
16251# 86 "/import/n2-aus-random/N2/sandbox-24x7/somePerson/SIMRUN/DIAG/include/tlu_custom_trap_extensions.s"
16252! Red mode other reset handler
16253! Get htba, and tt and make trap address
16254! Jump to trap handler ..
16255
16256SECTION .RED_SEC
16257.global red_other_ext
16258.global wdog_red_ext
16259.text
16260red_other_ext:
16261 ! IF TL=6, shift stack by one ..
16262 rdpr %tl, %l1
16263 cmp %l1, 6
16264 be start_tsa_shift
16265 nop
16266
16267continue_red_other:
16268 mov 0x1f, %l1
16269 stxa %l1, [%g0] ASI_LSU_CTL_REG
16270
16271 rdpr %tt, %l1
16272
16273 rdhpr %htstate, %l2
16274 and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv
16275 brnz,a %l2, red_goto_handler
16276 rdhpr %htba, %l2
16277 srlx %l1, 7, %l2 ! Send priv sw traps to priv mode ..
16278 cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap ..
16279 be,a red_goto_handler
16280 rdpr %tba, %l2
16281 rdhpr %htba, %l2
16282red_goto_handler:
16283
16284 sllx %l1, 5, %l1
16285 add %l1, %l2, %l2
16286 rdhpr %hpstate, %l1
16287 jmp %l2
16288 wrhpr %l1, 0x20, %hpstate
16289 nop
16290
16291wdog_red_ext:
16292 ! Shift stack down by 1 ...
16293 rdpr %tl, %l1
16294 cmp %l1, 6
16295 bl wdog_end
16296start_tsa_shift:
16297 mov 0x2, %l2
16298
16299tsa_shift:
16300 wrpr %l2, %tl
16301 rdpr %tt, %l3
16302 rdpr %tpc, %l4
16303 rdpr %tnpc, %l5
16304 rdpr %tstate, %l6
16305 rdhpr %htstate, %l7
16306 dec %l2
16307 wrpr %l2, %tl
16308 wrpr %l3, %tt
16309 wrpr %l4, %tpc
16310 wrpr %l5, %tnpc
16311 wrpr %l6, %tstate
16312 wrhpr %l7, %htstate
16313 add %l2, 2, %l2
16314 cmp %l2, %l1
16315 ble tsa_shift
16316 nop
16317tsa_shift_done:
16318 dec %l1
16319 wrpr %l1, %tl
16320
16321wdog_end:
16322 ! If TT != 2, then goto trap handler
16323 rdpr %tt, %l1
16324
16325 cmp %l1, 0x2
16326 bne continue_red_other
16327 nop
16328 ! else done
16329 mov 0x1f, %l1
16330 stxa %l1, [%g0] ASI_LSU_CTL_REG
16331 done
16332# 1110 "diag.j"
16333
16334SECTION .CWQ_DATA DATA_VA =0x4000
16335attr_data {
16336 Name = .CWQ_DATA
16337 hypervisor
16338}
16339
16340.data
16341.align 16
16342.global msg
16343msg:
16344.xword 0xad32fa52374cc6ba
16345.xword 0x4cbf52280549003a
16346
16347.align 16
16348.global results
16349results:
16350.xword 0xDEADBEEFDEADBEEF
16351.xword 0xDEADBEEFDEADBEEF
16352!# CWQ data area
16353!# CWQ_BASE for core N is CWQ_BASE+(N*256)
16354!# CWQ_LAST for core N is CWQ_LAST+(N*256)
16355.align 64
16356.global CWQ_BASE
16357CWQ_BASE:
16358.xword 0xAAAAAAAAAAAAAAA
16359.xword 0xAAAAAAAAAAAAAAA
16360.xword 0xAAAAAAAAAAAAAAA
16361.xword 0xAAAAAAAAAAAAAAA
16362.xword 0xAAAAAAAAAAAAAAA
16363.xword 0xAAAAAAAAAAAAAAA
16364.xword 0xAAAAAAAAAAAAAAA
16365.xword 0xAAAAAAAAAAAAAAA
16366.xword 0xAAAAAAAAAAAAAAA
16367.xword 0xAAAAAAAAAAAAAAA
16368.xword 0xAAAAAAAAAAAAAAA
16369.xword 0xAAAAAAAAAAAAAAA
16370.xword 0xAAAAAAAAAAAAAAA
16371.xword 0xAAAAAAAAAAAAAAA
16372.xword 0xAAAAAAAAAAAAAAA
16373.xword 0xAAAAAAAAAAAAAAA
16374.xword 0xAAAAAAAAAAAAAAA
16375.xword 0xAAAAAAAAAAAAAAA
16376.xword 0xAAAAAAAAAAAAAAA
16377.xword 0xAAAAAAAAAAAAAAA
16378.xword 0xAAAAAAAAAAAAAAA
16379.xword 0xAAAAAAAAAAAAAAA
16380.xword 0xAAAAAAAAAAAAAAA
16381.xword 0xAAAAAAAAAAAAAAA
16382.global CWQ_LAST
16383.align 64
16384CWQ_LAST:
16385.word 0x0
16386.align 64
16387cwq_base1:
16388.xword 0xAAAAAAAAAAAAAAA
16389.xword 0xAAAAAAAAAAAAAAA
16390.xword 0xAAAAAAAAAAAAAAA
16391.xword 0xAAAAAAAAAAAAAAA
16392.xword 0xAAAAAAAAAAAAAAA
16393.xword 0xAAAAAAAAAAAAAAA
16394.xword 0xAAAAAAAAAAAAAAA
16395.xword 0xAAAAAAAAAAAAAAA
16396.xword 0xAAAAAAAAAAAAAAA
16397.xword 0xAAAAAAAAAAAAAAA
16398.xword 0xAAAAAAAAAAAAAAA
16399.xword 0xAAAAAAAAAAAAAAA
16400.xword 0xAAAAAAAAAAAAAAA
16401.xword 0xAAAAAAAAAAAAAAA
16402.xword 0xAAAAAAAAAAAAAAA
16403.xword 0xAAAAAAAAAAAAAAA
16404.xword 0xAAAAAAAAAAAAAAA
16405.xword 0xAAAAAAAAAAAAAAA
16406.xword 0xAAAAAAAAAAAAAAA
16407.xword 0xAAAAAAAAAAAAAAA
16408.xword 0xAAAAAAAAAAAAAAA
16409.xword 0xAAAAAAAAAAAAAAA
16410.xword 0xAAAAAAAAAAAAAAA
16411.xword 0xAAAAAAAAAAAAAAA
16412.align 64
16413cwq_last1:
16414.word 0x0
16415.align 64
16416.xword 0xAAAAAAAAAAAAAAA
16417.xword 0xAAAAAAAAAAAAAAA
16418.xword 0xAAAAAAAAAAAAAAA
16419.xword 0xAAAAAAAAAAAAAAA
16420.xword 0xAAAAAAAAAAAAAAA
16421.xword 0xAAAAAAAAAAAAAAA
16422.xword 0xAAAAAAAAAAAAAAA
16423.xword 0xAAAAAAAAAAAAAAA
16424.xword 0xAAAAAAAAAAAAAAA
16425.xword 0xAAAAAAAAAAAAAAA
16426.xword 0xAAAAAAAAAAAAAAA
16427.xword 0xAAAAAAAAAAAAAAA
16428.xword 0xAAAAAAAAAAAAAAA
16429.xword 0xAAAAAAAAAAAAAAA
16430.xword 0xAAAAAAAAAAAAAAA
16431.xword 0xAAAAAAAAAAAAAAA
16432.xword 0xAAAAAAAAAAAAAAA
16433.xword 0xAAAAAAAAAAAAAAA
16434.xword 0xAAAAAAAAAAAAAAA
16435.xword 0xAAAAAAAAAAAAAAA
16436.xword 0xAAAAAAAAAAAAAAA
16437.xword 0xAAAAAAAAAAAAAAA
16438.xword 0xAAAAAAAAAAAAAAA
16439.xword 0xAAAAAAAAAAAAAAA
16440.align 64
16441.word 0x0
16442.align 64
16443.xword 0xAAAAAAAAAAAAAAA
16444.xword 0xAAAAAAAAAAAAAAA
16445.xword 0xAAAAAAAAAAAAAAA
16446.xword 0xAAAAAAAAAAAAAAA
16447.xword 0xAAAAAAAAAAAAAAA
16448.xword 0xAAAAAAAAAAAAAAA
16449.xword 0xAAAAAAAAAAAAAAA
16450.xword 0xAAAAAAAAAAAAAAA
16451.xword 0xAAAAAAAAAAAAAAA
16452.xword 0xAAAAAAAAAAAAAAA
16453.xword 0xAAAAAAAAAAAAAAA
16454.xword 0xAAAAAAAAAAAAAAA
16455.xword 0xAAAAAAAAAAAAAAA
16456.xword 0xAAAAAAAAAAAAAAA
16457.xword 0xAAAAAAAAAAAAAAA
16458.xword 0xAAAAAAAAAAAAAAA
16459.xword 0xAAAAAAAAAAAAAAA
16460.xword 0xAAAAAAAAAAAAAAA
16461.xword 0xAAAAAAAAAAAAAAA
16462.xword 0xAAAAAAAAAAAAAAA
16463.xword 0xAAAAAAAAAAAAAAA
16464.xword 0xAAAAAAAAAAAAAAA
16465.xword 0xAAAAAAAAAAAAAAA
16466.xword 0xAAAAAAAAAAAAAAA
16467.align 64
16468.word 0x0
16469.align 64
16470.xword 0xAAAAAAAAAAAAAAA
16471.xword 0xAAAAAAAAAAAAAAA
16472.xword 0xAAAAAAAAAAAAAAA
16473.xword 0xAAAAAAAAAAAAAAA
16474.xword 0xAAAAAAAAAAAAAAA
16475.xword 0xAAAAAAAAAAAAAAA
16476.xword 0xAAAAAAAAAAAAAAA
16477.xword 0xAAAAAAAAAAAAAAA
16478.xword 0xAAAAAAAAAAAAAAA
16479.xword 0xAAAAAAAAAAAAAAA
16480.xword 0xAAAAAAAAAAAAAAA
16481.xword 0xAAAAAAAAAAAAAAA
16482.xword 0xAAAAAAAAAAAAAAA
16483.xword 0xAAAAAAAAAAAAAAA
16484.xword 0xAAAAAAAAAAAAAAA
16485.xword 0xAAAAAAAAAAAAAAA
16486.xword 0xAAAAAAAAAAAAAAA
16487.xword 0xAAAAAAAAAAAAAAA
16488.xword 0xAAAAAAAAAAAAAAA
16489.xword 0xAAAAAAAAAAAAAAA
16490.xword 0xAAAAAAAAAAAAAAA
16491.xword 0xAAAAAAAAAAAAAAA
16492.xword 0xAAAAAAAAAAAAAAA
16493.xword 0xAAAAAAAAAAAAAAA
16494.align 64
16495.word 0x0
16496.align 64
16497.xword 0xAAAAAAAAAAAAAAA
16498.xword 0xAAAAAAAAAAAAAAA
16499.xword 0xAAAAAAAAAAAAAAA
16500.xword 0xAAAAAAAAAAAAAAA
16501.xword 0xAAAAAAAAAAAAAAA
16502.xword 0xAAAAAAAAAAAAAAA
16503.xword 0xAAAAAAAAAAAAAAA
16504.xword 0xAAAAAAAAAAAAAAA
16505.xword 0xAAAAAAAAAAAAAAA
16506.xword 0xAAAAAAAAAAAAAAA
16507.xword 0xAAAAAAAAAAAAAAA
16508.xword 0xAAAAAAAAAAAAAAA
16509.xword 0xAAAAAAAAAAAAAAA
16510.xword 0xAAAAAAAAAAAAAAA
16511.xword 0xAAAAAAAAAAAAAAA
16512.xword 0xAAAAAAAAAAAAAAA
16513.xword 0xAAAAAAAAAAAAAAA
16514.xword 0xAAAAAAAAAAAAAAA
16515.xword 0xAAAAAAAAAAAAAAA
16516.xword 0xAAAAAAAAAAAAAAA
16517.xword 0xAAAAAAAAAAAAAAA
16518.xword 0xAAAAAAAAAAAAAAA
16519.xword 0xAAAAAAAAAAAAAAA
16520.xword 0xAAAAAAAAAAAAAAA
16521.align 64
16522.word 0x0
16523.align 64
16524.xword 0xAAAAAAAAAAAAAAA
16525.xword 0xAAAAAAAAAAAAAAA
16526.xword 0xAAAAAAAAAAAAAAA
16527.xword 0xAAAAAAAAAAAAAAA
16528.xword 0xAAAAAAAAAAAAAAA
16529.xword 0xAAAAAAAAAAAAAAA
16530.xword 0xAAAAAAAAAAAAAAA
16531.xword 0xAAAAAAAAAAAAAAA
16532.xword 0xAAAAAAAAAAAAAAA
16533.xword 0xAAAAAAAAAAAAAAA
16534.xword 0xAAAAAAAAAAAAAAA
16535.xword 0xAAAAAAAAAAAAAAA
16536.xword 0xAAAAAAAAAAAAAAA
16537.xword 0xAAAAAAAAAAAAAAA
16538.xword 0xAAAAAAAAAAAAAAA
16539.xword 0xAAAAAAAAAAAAAAA
16540.xword 0xAAAAAAAAAAAAAAA
16541.xword 0xAAAAAAAAAAAAAAA
16542.xword 0xAAAAAAAAAAAAAAA
16543.xword 0xAAAAAAAAAAAAAAA
16544.xword 0xAAAAAAAAAAAAAAA
16545.xword 0xAAAAAAAAAAAAAAA
16546.xword 0xAAAAAAAAAAAAAAA
16547.xword 0xAAAAAAAAAAAAAAA
16548.align 64
16549.word 0x0
16550.align 64
16551.xword 0xAAAAAAAAAAAAAAA
16552.xword 0xAAAAAAAAAAAAAAA
16553.xword 0xAAAAAAAAAAAAAAA
16554.xword 0xAAAAAAAAAAAAAAA
16555.xword 0xAAAAAAAAAAAAAAA
16556.xword 0xAAAAAAAAAAAAAAA
16557.xword 0xAAAAAAAAAAAAAAA
16558.xword 0xAAAAAAAAAAAAAAA
16559.xword 0xAAAAAAAAAAAAAAA
16560.xword 0xAAAAAAAAAAAAAAA
16561.xword 0xAAAAAAAAAAAAAAA
16562.xword 0xAAAAAAAAAAAAAAA
16563.xword 0xAAAAAAAAAAAAAAA
16564.xword 0xAAAAAAAAAAAAAAA
16565.xword 0xAAAAAAAAAAAAAAA
16566.xword 0xAAAAAAAAAAAAAAA
16567.xword 0xAAAAAAAAAAAAAAA
16568.xword 0xAAAAAAAAAAAAAAA
16569.xword 0xAAAAAAAAAAAAAAA
16570.xword 0xAAAAAAAAAAAAAAA
16571.xword 0xAAAAAAAAAAAAAAA
16572.xword 0xAAAAAAAAAAAAAAA
16573.xword 0xAAAAAAAAAAAAAAA
16574.xword 0xAAAAAAAAAAAAAAA
16575.align 64
16576.word 0x0
16577
16578
16579
16580SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000280000, DATA_VA = 0x00000000002c0000
16581attr_text {
16582 Name = .MyHTRAPS_0,
16583 RA = 0x0000000000280000,
16584 PA = ra2pa(0x0000000000280000,0),
16585 part_0_ctx_zero_tsb_config_3,
16586 part_0_ctx_nonzero_tsb_config_3,
16587 TTE_G = 1,
16588 TTE_Context = 0,
16589 TTE_V = 1,
16590 TTE_Size = PART0_Z_PAGE_SIZE_3,
16591 TTE_NFO = 0,
16592 TTE_IE = 0,
16593 TTE_Soft2 = 0,
16594 TTE_Diag = 0,
16595 TTE_Soft = 0,
16596 TTE_L = 0,
16597 TTE_CP = 1,
16598 TTE_CV = 1,
16599 TTE_E = 1,
16600 TTE_P = 1,
16601 TTE_W = 0,
16602 TTE_X = 0
16603}
16604
16605
16606attr_data {
16607 Name = .MyHTRAPS_0,
16608 RA = 0x00000000002c0000,
16609 PA = ra2pa(0x00000000002c0000,0),
16610 part_0_ctx_zero_tsb_config_3,
16611 part_0_ctx_nonzero_tsb_config_3,
16612 TTE_G = 1,
16613 TTE_Context = 0,
16614 TTE_V = 1,
16615 TTE_Size = PART0_Z_PAGE_SIZE_3,
16616 TTE_NFO = 0,
16617 TTE_IE = 0,
16618 TTE_Soft2 = 0,
16619 TTE_Diag = 0,
16620 TTE_Soft = 0,
16621 TTE_L = 0,
16622 TTE_CP = 0,
16623 TTE_CV = 1,
16624 TTE_E = 0,
16625 TTE_P = 1,
16626 TTE_W = 0
16627}
16628
16629.text
16630#include "htraps.s"
16631#include "tlu_htraps_ext.s"
16632
16633
16634
16635SECTION .MyHTRAPS_1 TEXT_VA = 0x00000000002a0000, DATA_VA = 0x00000000002e0000
16636attr_text {
16637 Name = .MyHTRAPS_1,
16638 RA = 0x00000000002a0000,
16639 PA = ra2pa(0x00000000002a0000,0),
16640 part_0_ctx_zero_tsb_config_3,
16641 part_0_ctx_nonzero_tsb_config_3,
16642 TTE_G = 1,
16643 TTE_Context = 0,
16644 TTE_V = 1,
16645 TTE_Size = PART0_Z_PAGE_SIZE_3,
16646 TTE_NFO = 0,
16647 TTE_IE = 0,
16648 TTE_Soft2 = 0,
16649 TTE_Diag = 0,
16650 TTE_Soft = 0,
16651 TTE_L = 0,
16652 TTE_CP = 1,
16653 TTE_CV = 1,
16654 TTE_E = 1,
16655 TTE_P = 1,
16656 TTE_W = 0,
16657 TTE_X = 0
16658}
16659
16660
16661attr_data {
16662 Name = .MyHTRAPS_1,
16663 RA = 0x00000000002e0000,
16664 PA = ra2pa(0x00000000002e0000,0),
16665 part_0_ctx_zero_tsb_config_3,
16666 part_0_ctx_nonzero_tsb_config_3,
16667 TTE_G = 1,
16668 TTE_Context = 0,
16669 TTE_V = 1,
16670 TTE_Size = PART0_Z_PAGE_SIZE_3,
16671 TTE_NFO = 0,
16672 TTE_IE = 0,
16673 TTE_Soft2 = 0,
16674 TTE_Diag = 0,
16675 TTE_Soft = 0,
16676 TTE_L = 0,
16677 TTE_CP = 1,
16678 TTE_CV = 1,
16679 TTE_E = 0,
16680 TTE_P = 1,
16681 TTE_W = 0
16682}
16683
16684.text
16685#include "htraps.s"
16686#include "tlu_htraps_ext.s"
16687
16688
16689
16690SECTION .MyHTRAPS_2 TEXT_VA = 0x0000000200280000, DATA_VA = 0x00000002002c0000
16691attr_text {
16692 Name = .MyHTRAPS_2,
16693 RA = 0x0000000200280000,
16694 PA = ra2pa(0x0000000200280000,0),
16695 part_0_ctx_zero_tsb_config_3,
16696 part_0_ctx_nonzero_tsb_config_3,
16697 TTE_G = 1,
16698 TTE_Context = 0,
16699 TTE_V = 1,
16700 TTE_Size = PART0_Z_PAGE_SIZE_3,
16701 TTE_NFO = 0,
16702 TTE_IE = 0,
16703 TTE_Soft2 = 0,
16704 TTE_Diag = 0,
16705 TTE_Soft = 0,
16706 TTE_L = 0,
16707 TTE_CP = 1,
16708 TTE_CV = 1,
16709 TTE_E = 0,
16710 TTE_P = 1,
16711 TTE_W = 0,
16712 TTE_X = 0
16713}
16714
16715
16716attr_data {
16717 Name = .MyHTRAPS_2,
16718 RA = 0x00000002002c0000,
16719 PA = ra2pa(0x00000002002c0000,0),
16720 part_0_ctx_zero_tsb_config_3,
16721 part_0_ctx_nonzero_tsb_config_3,
16722 TTE_G = 1,
16723 TTE_Context = 0,
16724 TTE_V = 1,
16725 TTE_Size = PART0_Z_PAGE_SIZE_3,
16726 TTE_NFO = 0,
16727 TTE_IE = 0,
16728 TTE_Soft2 = 0,
16729 TTE_Diag = 0,
16730 TTE_Soft = 0,
16731 TTE_L = 0,
16732 TTE_CP = 1,
16733 TTE_CV = 0,
16734 TTE_E = 0,
16735 TTE_P = 1,
16736 TTE_W = 0
16737}
16738
16739.text
16740#include "htraps.s"
16741#include "tlu_htraps_ext.s"
16742
16743
16744
16745SECTION .MyHTRAPS_3 TEXT_VA = 0x00000002002a0000, DATA_VA = 0x00000002002e0000
16746attr_text {
16747 Name = .MyHTRAPS_3,
16748 RA = 0x00000002002a0000,
16749 PA = ra2pa(0x00000002002a0000,0),
16750 part_0_ctx_zero_tsb_config_3,
16751 part_0_ctx_nonzero_tsb_config_3,
16752 TTE_G = 1,
16753 TTE_Context = 0,
16754 TTE_V = 1,
16755 TTE_Size = PART0_Z_PAGE_SIZE_3,
16756 TTE_NFO = 0,
16757 TTE_IE = 0,
16758 TTE_Soft2 = 0,
16759 TTE_Diag = 0,
16760 TTE_Soft = 0,
16761 TTE_L = 0,
16762 TTE_CP = 1,
16763 TTE_CV = 0,
16764 TTE_E = 0,
16765 TTE_P = 1,
16766 TTE_W = 0,
16767 TTE_X = 0
16768}
16769
16770
16771attr_data {
16772 Name = .MyHTRAPS_3,
16773 RA = 0x00000002002e0000,
16774 PA = ra2pa(0x00000002002e0000,0),
16775 part_0_ctx_zero_tsb_config_3,
16776 part_0_ctx_nonzero_tsb_config_3,
16777 TTE_G = 1,
16778 TTE_Context = 0,
16779 TTE_V = 1,
16780 TTE_Size = PART0_Z_PAGE_SIZE_3,
16781 TTE_NFO = 0,
16782 TTE_IE = 0,
16783 TTE_Soft2 = 0,
16784 TTE_Diag = 0,
16785 TTE_Soft = 0,
16786 TTE_L = 0,
16787 TTE_CP = 0,
16788 TTE_CV = 0,
16789 TTE_E = 0,
16790 TTE_P = 1,
16791 TTE_W = 0
16792}
16793
16794.text
16795#include "htraps.s"
16796#include "tlu_htraps_ext.s"
16797
16798
16799
16800
16801
16802SECTION .MyTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x00000000003c0000
16803attr_text {
16804 Name = .MyTRAPS_0,
16805 RA = 0x0000000000380000,
16806 PA = ra2pa(0x0000000000380000,0),
16807 part_0_ctx_zero_tsb_config_3,
16808 part_0_ctx_nonzero_tsb_config_3,
16809 TTE_G = 1,
16810 TTE_Context = 0,
16811 TTE_V = 1,
16812 TTE_Size = PART0_Z_PAGE_SIZE_3,
16813 TTE_NFO = 1,
16814 TTE_IE = 0,
16815 TTE_Soft2 = 0,
16816 TTE_Diag = 0,
16817 TTE_Soft = 0,
16818 TTE_L = 0,
16819 TTE_CP = 0,
16820 TTE_CV = 0,
16821 TTE_E = 1,
16822 TTE_P = 0,
16823 TTE_W = 1,
16824 TTE_X = 0
16825}
16826
16827
16828attr_data {
16829 Name = .MyTRAPS_0,
16830 RA = 0x00000000003c0000,
16831 PA = ra2pa(0x00000000003c0000,0),
16832 part_0_ctx_zero_tsb_config_3,
16833 part_0_ctx_nonzero_tsb_config_3,
16834 TTE_G = 1,
16835 TTE_Context = 0,
16836 TTE_V = 1,
16837 TTE_Size = PART0_Z_PAGE_SIZE_3,
16838 TTE_NFO = 1,
16839 TTE_IE = 1,
16840 TTE_Soft2 = 0,
16841 TTE_Diag = 0,
16842 TTE_Soft = 0,
16843 TTE_L = 0,
16844 TTE_CP = 1,
16845 TTE_CV = 1,
16846 TTE_E = 0,
16847 TTE_P = 1,
16848 TTE_W = 1
16849}
16850
16851#include "traps.s"
16852
16853
16854
16855SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003e0000
16856attr_text {
16857 Name = .MyTRAPS_1,
16858 RA = 0x00000000003a0000,
16859 PA = ra2pa(0x00000000003a0000,0),
16860 part_0_ctx_zero_tsb_config_3,
16861 part_0_ctx_nonzero_tsb_config_3,
16862 TTE_G = 1,
16863 TTE_Context = 0,
16864 TTE_V = 1,
16865 TTE_Size = PART0_Z_PAGE_SIZE_3,
16866 TTE_NFO = 1,
16867 TTE_IE = 0,
16868 TTE_Soft2 = 0,
16869 TTE_Diag = 0,
16870 TTE_Soft = 0,
16871 TTE_L = 0,
16872 TTE_CP = 0,
16873 TTE_CV = 0,
16874 TTE_E = 1,
16875 TTE_P = 1,
16876 TTE_W = 1,
16877 TTE_X = 0
16878}
16879
16880
16881attr_data {
16882 Name = .MyTRAPS_1,
16883 RA = 0x00000000003e0000,
16884 PA = ra2pa(0x00000000003e0000,0),
16885 part_0_ctx_zero_tsb_config_3,
16886 part_0_ctx_nonzero_tsb_config_3,
16887 TTE_G = 1,
16888 TTE_Context = 0,
16889 TTE_V = 1,
16890 TTE_Size = PART0_Z_PAGE_SIZE_3,
16891 TTE_NFO = 0,
16892 TTE_IE = 0,
16893 TTE_Soft2 = 0,
16894 TTE_Diag = 0,
16895 TTE_Soft = 0,
16896 TTE_L = 0,
16897 TTE_CP = 0,
16898 TTE_CV = 1,
16899 TTE_E = 0,
16900 TTE_P = 1,
16901 TTE_W = 0
16902}
16903
16904#include "traps.s"
16905
16906
16907
16908SECTION .MyTRAPS_2 TEXT_VA = 0x0000000400380000, DATA_VA = 0x00000004003c0000
16909attr_text {
16910 Name = .MyTRAPS_2,
16911 RA = 0x0000000400380000,
16912 PA = ra2pa(0x0000000400380000,0),
16913 part_0_ctx_zero_tsb_config_3,
16914 part_0_ctx_nonzero_tsb_config_3,
16915 TTE_G = 1,
16916 TTE_Context = 0,
16917 TTE_V = 1,
16918 TTE_Size = PART0_Z_PAGE_SIZE_3,
16919 TTE_NFO = 0,
16920 TTE_IE = 1,
16921 TTE_Soft2 = 0,
16922 TTE_Diag = 0,
16923 TTE_Soft = 0,
16924 TTE_L = 0,
16925 TTE_CP = 0,
16926 TTE_CV = 1,
16927 TTE_E = 1,
16928 TTE_P = 1,
16929 TTE_W = 1,
16930 TTE_X = 1
16931}
16932
16933
16934attr_data {
16935 Name = .MyTRAPS_2,
16936 RA = 0x00000004003c0000,
16937 PA = ra2pa(0x00000004003c0000,0),
16938 part_0_ctx_zero_tsb_config_3,
16939 part_0_ctx_nonzero_tsb_config_3,
16940 TTE_G = 1,
16941 TTE_Context = 0,
16942 TTE_V = 1,
16943 TTE_Size = PART0_Z_PAGE_SIZE_3,
16944 TTE_NFO = 1,
16945 TTE_IE = 1,
16946 TTE_Soft2 = 0,
16947 TTE_Diag = 0,
16948 TTE_Soft = 0,
16949 TTE_L = 0,
16950 TTE_CP = 1,
16951 TTE_CV = 1,
16952 TTE_E = 0,
16953 TTE_P = 1,
16954 TTE_W = 0
16955}
16956
16957#include "traps.s"
16958
16959
16960
16961SECTION .MyTRAPS_3 TEXT_VA = 0x00000004003a0000, DATA_VA = 0x00000004003e0000
16962attr_text {
16963 Name = .MyTRAPS_3,
16964 RA = 0x00000004003a0000,
16965 PA = ra2pa(0x00000004003a0000,0),
16966 part_0_ctx_zero_tsb_config_3,
16967 part_0_ctx_nonzero_tsb_config_3,
16968 TTE_G = 1,
16969 TTE_Context = 0,
16970 TTE_V = 1,
16971 TTE_Size = PART0_Z_PAGE_SIZE_3,
16972 TTE_NFO = 0,
16973 TTE_IE = 0,
16974 TTE_Soft2 = 0,
16975 TTE_Diag = 0,
16976 TTE_Soft = 0,
16977 TTE_L = 0,
16978 TTE_CP = 0,
16979 TTE_CV = 0,
16980 TTE_E = 1,
16981 TTE_P = 1,
16982 TTE_W = 1,
16983 TTE_X = 0
16984}
16985
16986
16987attr_data {
16988 Name = .MyTRAPS_3,
16989 RA = 0x00000004003e0000,
16990 PA = ra2pa(0x00000004003e0000,0),
16991 part_0_ctx_zero_tsb_config_3,
16992 part_0_ctx_nonzero_tsb_config_3,
16993 TTE_G = 1,
16994 TTE_Context = 0,
16995 TTE_V = 1,
16996 TTE_Size = PART0_Z_PAGE_SIZE_3,
16997 TTE_NFO = 0,
16998 TTE_IE = 1,
16999 TTE_Soft2 = 0,
17000 TTE_Diag = 0,
17001 TTE_Soft = 0,
17002 TTE_L = 0,
17003 TTE_CP = 0,
17004 TTE_CV = 1,
17005 TTE_E = 0,
17006 TTE_P = 1,
17007 TTE_W = 0
17008}
17009
17010#include "traps.s"
17011
17012
17013
17014
17015
17016SECTION .MyDATA_0 TEXT_VA = 0x00000000e0140000, DATA_VA = 0x0000000060140000
17017attr_text {
17018 Name = .MyDATA_0,
17019 RA = 0x0000000170100000,
17020 PA = ra2pa(0x0000000170100000,0),
17021 part_0_ctx_zero_tsb_config_0,
17022 part_0_ctx_nonzero_tsb_config_0,
17023 TTE_G = 1,
17024 TTE_Context = PCONTEXT,
17025 TTE_V = 1,
17026 TTE_Size = 0,
17027 TTE_NFO = 0,
17028 TTE_IE = 1,
17029 TTE_Soft2 = 0,
17030 TTE_Diag = 0,
17031 TTE_Soft = 0,
17032 TTE_L = 0,
17033 TTE_CP = 0,
17034 TTE_CV = 1,
17035 TTE_E = 1,
17036 TTE_P = 0,
17037 TTE_W = 1
17038}
17039
17040
17041attr_data {
17042 Name = .MyDATA_0,
17043 RA = 0x0000000170100000,
17044 PA = ra2pa(0x0000000170100000,0),
17045 part_0_ctx_zero_tsb_config_1,
17046 part_0_ctx_nonzero_tsb_config_1,
17047 TTE_G = 1,
17048 TTE_Context = SCONTEXT,
17049 TTE_V = 1,
17050 TTE_Size = 0,
17051 TTE_NFO = 1,
17052 TTE_IE = 1,
17053 TTE_Soft2 = 0,
17054 TTE_Diag = 0,
17055 TTE_Soft = 0,
17056 TTE_L = 0,
17057 TTE_CP = 0,
17058 TTE_CV = 1,
17059 TTE_E = 0,
17060 TTE_P = 0,
17061 TTE_W = 1,
17062 tsbonly
17063}
17064
17065
17066attr_data {
17067 Name = .MyDATA_0,
17068 hypervisor
17069}
17070
17071
17072attr_text {
17073 Name = .MyDATA_0,
17074 hypervisor
17075}
17076
17077.data
17078 .xword 0x49da8cac025338c3
17079 .xword 0x2295762788f564fa
17080 .xword 0xb6099cba18b41312
17081 .xword 0xdf25d04151f5a538
17082 .xword 0x60d5ebe9665e3021
17083 .xword 0xfdf478023b4998ad
17084 .xword 0x7054d39887606ed6
17085 .xword 0x3c52b746bf7ad623
17086 .xword 0xf0cc35124f5c494d
17087 .xword 0xdedde5e97cd6b235
17088 .xword 0x96faaa1cc3398485
17089 .xword 0x93723ea3fdfda19e
17090 .xword 0xbfff94720535ad49
17091 .xword 0x2c3a69cb50542103
17092 .xword 0x14995bd3a02381ef
17093 .xword 0x115ef6f3cdf21d91
17094 .xword 0x98abf0021bd23c6f
17095 .xword 0x81aa96c4e0feac12
17096 .xword 0x3b2bcc483f9bae1b
17097 .xword 0xb8774967aad35a12
17098 .xword 0x2d6f4fbaf14d3b5e
17099 .xword 0x0cb59c0eb2e9ff6e
17100 .xword 0x0bc421ace084ddd9
17101 .xword 0x967dc994b9be01cd
17102 .xword 0xfc04e8bbf9a2596a
17103 .xword 0x55ede22a92e59079
17104 .xword 0x1cfd651ad91cc68c
17105 .xword 0x391c4f0452d458cc
17106 .xword 0x5be31412b63de420
17107 .xword 0x3173965ee92c7994
17108 .xword 0x8a01611c0f7f6291
17109 .xword 0x76caa67ae2400de0
17110
17111
17112
17113SECTION .MyDATA_1 TEXT_VA = 0x00000000e0340000, DATA_VA = 0x0000000060340000
17114attr_text {
17115 Name = .MyDATA_1,
17116 RA = 0x0000000170300000,
17117 PA = ra2pa(0x0000000170300000,0),
17118 part_0_ctx_zero_tsb_config_0,
17119 part_0_ctx_nonzero_tsb_config_0,
17120 TTE_G = 1,
17121 TTE_Context = PCONTEXT,
17122 TTE_V = 1,
17123 TTE_Size = 1,
17124 TTE_NFO = 1,
17125 TTE_IE = 1,
17126 TTE_Soft2 = 0,
17127 TTE_Diag = 0,
17128 TTE_Soft = 0,
17129 TTE_L = 0,
17130 TTE_CP = 1,
17131 TTE_CV = 1,
17132 TTE_E = 0,
17133 TTE_P = 0,
17134 TTE_W = 0
17135}
17136
17137
17138attr_data {
17139 Name = .MyDATA_1,
17140 RA = 0x0000000170300000,
17141 PA = ra2pa(0x0000000170300000,0),
17142 part_0_ctx_zero_tsb_config_1,
17143 part_0_ctx_nonzero_tsb_config_1,
17144 TTE_G = 1,
17145 TTE_Context = SCONTEXT,
17146 TTE_V = 1,
17147 TTE_Size = 0,
17148 TTE_NFO = 0,
17149 TTE_IE = 0,
17150 TTE_Soft2 = 0,
17151 TTE_Diag = 0,
17152 TTE_Soft = 0,
17153 TTE_L = 0,
17154 TTE_CP = 0,
17155 TTE_CV = 1,
17156 TTE_E = 0,
17157 TTE_P = 0,
17158 TTE_W = 1,
17159 tsbonly
17160}
17161
17162
17163attr_data {
17164 Name = .MyDATA_1,
17165 hypervisor
17166}
17167
17168
17169attr_text {
17170 Name = .MyDATA_1,
17171 hypervisor
17172}
17173
17174.data
17175 .xword 0xdd88be54981d3fa4
17176 .xword 0xeb8d9c71d398928e
17177 .xword 0x30a02888af778940
17178 .xword 0x8eb8c8da1a88a1ba
17179 .xword 0xf620af1b24319de2
17180 .xword 0xa1054b68ea0d2b2b
17181 .xword 0x4419763a062c4822
17182 .xword 0x732c986a920296cb
17183 .xword 0x809755cc6fce0159
17184 .xword 0x47ae03dcd8735bfb
17185 .xword 0xb5ca69dfb397163b
17186 .xword 0x3f53e4f6982b56ac
17187 .xword 0xbb30f5ce10e9968a
17188 .xword 0x165175457ac582a4
17189 .xword 0xefe7c78eb5373d2b
17190 .xword 0x3f49a7fedc9d3262
17191 .xword 0x301e144e2fb6713e
17192 .xword 0xd03a65505c5c6642
17193 .xword 0xa50d37c1cf98dfac
17194 .xword 0x3ce26714d7224ec4
17195 .xword 0x2dbf5c5f9a6a8c47
17196 .xword 0x3792eda22fcd7cff
17197 .xword 0x1a5fdbfa6a4fd5f2
17198 .xword 0x6b353f386032cc8d
17199 .xword 0x6f5cacb770c1e42c
17200 .xword 0xddb419b7a72e17b2
17201 .xword 0x252b43af176a39ad
17202 .xword 0x3786ab0906a4fcc0
17203 .xword 0xb40d6c66c36108ab
17204 .xword 0x41eecd5bd8538bd5
17205 .xword 0x9dbafd74fdf69ed5
17206 .xword 0xd14393b22686ae91
17207
17208
17209
17210SECTION .MyDATA_2 TEXT_VA = 0x00000000e0540000, DATA_VA = 0x0000000060540000
17211attr_text {
17212 Name = .MyDATA_2,
17213 RA = 0x0000000170500000,
17214 PA = ra2pa(0x0000000170500000,0),
17215 part_0_ctx_zero_tsb_config_0,
17216 part_0_ctx_nonzero_tsb_config_0,
17217 TTE_G = 1,
17218 TTE_Context = PCONTEXT,
17219 TTE_V = 1,
17220 TTE_Size = 1,
17221 TTE_NFO = 1,
17222 TTE_IE = 0,
17223 TTE_Soft2 = 0,
17224 TTE_Diag = 0,
17225 TTE_Soft = 0,
17226 TTE_L = 0,
17227 TTE_CP = 1,
17228 TTE_CV = 0,
17229 TTE_E = 1,
17230 TTE_P = 1,
17231 TTE_W = 1
17232}
17233
17234
17235attr_data {
17236 Name = .MyDATA_2,
17237 RA = 0x0000000170500000,
17238 PA = ra2pa(0x0000000170500000,0),
17239 part_0_ctx_zero_tsb_config_1,
17240 part_0_ctx_nonzero_tsb_config_1,
17241 TTE_G = 1,
17242 TTE_Context = SCONTEXT,
17243 TTE_V = 1,
17244 TTE_Size = 3,
17245 TTE_NFO = 1,
17246 TTE_IE = 1,
17247 TTE_Soft2 = 0,
17248 TTE_Diag = 0,
17249 TTE_Soft = 0,
17250 TTE_L = 0,
17251 TTE_CP = 1,
17252 TTE_CV = 0,
17253 TTE_E = 1,
17254 TTE_P = 0,
17255 TTE_W = 0,
17256 tsbonly
17257}
17258
17259
17260attr_data {
17261 Name = .MyDATA_2,
17262 hypervisor
17263}
17264
17265
17266attr_text {
17267 Name = .MyDATA_2,
17268 hypervisor
17269}
17270
17271.data
17272 .xword 0xa8641ee4fb3d400f
17273 .xword 0x9c5dc63a70902e4b
17274 .xword 0x24395de3afcab9ac
17275 .xword 0x1de98b5bdcf91eb1
17276 .xword 0x403ed8b2ad48ce59
17277 .xword 0x2deffed2a2d39799
17278 .xword 0x54f372b07d7dd35b
17279 .xword 0xb1b01ecbee960fa3
17280 .xword 0x7a47dd49630910ce
17281 .xword 0xfbde54cdc81daced
17282 .xword 0x79cc61dc9301e587
17283 .xword 0x0f9ed1a9c4ac1d7f
17284 .xword 0x705671a1dd2de410
17285 .xword 0xe4303b32acb1c6a6
17286 .xword 0x8225fd25a2006450
17287 .xword 0x7f0a23c142308ccd
17288 .xword 0x234049316312b0fe
17289 .xword 0xab7d675369210b32
17290 .xword 0x1bafb2c79a63785f
17291 .xword 0x65599d9e688a70a0
17292 .xword 0xe5f59fcc762243ce
17293 .xword 0xdf7b7d688ade0807
17294 .xword 0x73b2a1fab8d32e8f
17295 .xword 0xbec563de0937d9b0
17296 .xword 0xa524b85fed36e4df
17297 .xword 0x5a7a3ab1f6327fad
17298 .xword 0xaef852b8d85c5e3f
17299 .xword 0x116e2fae8c7b7998
17300 .xword 0xb82de5db93b6a300
17301 .xword 0xd5ae7f907e613029
17302 .xword 0x16914e709296ba83
17303 .xword 0xc83adf9b197a8bbc
17304
17305
17306
17307SECTION .MyDATA_3 TEXT_VA = 0x00000000e0740000, DATA_VA = 0x0000000060740000
17308attr_text {
17309 Name = .MyDATA_3,
17310 RA = 0x0000000170700000,
17311 PA = ra2pa(0x0000000170700000,0),
17312 part_0_ctx_zero_tsb_config_0,
17313 part_0_ctx_nonzero_tsb_config_0,
17314 TTE_G = 1,
17315 TTE_Context = PCONTEXT,
17316 TTE_V = 1,
17317 TTE_Size = 1,
17318 TTE_NFO = 1,
17319 TTE_IE = 0,
17320 TTE_Soft2 = 0,
17321 TTE_Diag = 0,
17322 TTE_Soft = 0,
17323 TTE_L = 0,
17324 TTE_CP = 0,
17325 TTE_CV = 0,
17326 TTE_E = 1,
17327 TTE_P = 1,
17328 TTE_W = 1
17329}
17330
17331
17332attr_data {
17333 Name = .MyDATA_3,
17334 RA = 0x0000000170700000,
17335 PA = ra2pa(0x0000000170700000,0),
17336 part_0_ctx_zero_tsb_config_1,
17337 part_0_ctx_nonzero_tsb_config_1,
17338 TTE_G = 1,
17339 TTE_Context = SCONTEXT,
17340 TTE_V = 1,
17341 TTE_Size = 0,
17342 TTE_NFO = 0,
17343 TTE_IE = 0,
17344 TTE_Soft2 = 0,
17345 TTE_Diag = 0,
17346 TTE_Soft = 0,
17347 TTE_L = 0,
17348 TTE_CP = 1,
17349 TTE_CV = 1,
17350 TTE_E = 1,
17351 TTE_P = 0,
17352 TTE_W = 1,
17353 tsbonly
17354}
17355
17356
17357attr_data {
17358 Name = .MyDATA_3,
17359 hypervisor
17360}
17361
17362
17363attr_text {
17364 Name = .MyDATA_3,
17365 hypervisor
17366}
17367
17368.data
17369 .xword 0x6e16b7169a84fb67
17370 .xword 0x843c081cf9d8ec13
17371 .xword 0xa98637b2b1ac153a
17372 .xword 0x32d5a45a64bcee4b
17373 .xword 0x042d0e829e3c4757
17374 .xword 0x83a77e986cd18794
17375 .xword 0xd0cd681acbe0db80
17376 .xword 0xd7c3389ef23677b2
17377 .xword 0x3e624aacdc89f825
17378 .xword 0x7254f95126e9f25d
17379 .xword 0x2ce3ed3853fa2c7e
17380 .xword 0xc77ab8176c1d038a
17381 .xword 0x669157c743fddcc4
17382 .xword 0xfb45850a8fd29a54
17383 .xword 0xdf931bcf19cceee1
17384 .xword 0xa64ffff58074f4d8
17385 .xword 0xc09093040d0811c9
17386 .xword 0x76f49cfc43d8aab6
17387 .xword 0x20f68b09682260a5
17388 .xword 0x4de46528f991492c
17389 .xword 0x56dc42fe13b15c20
17390 .xword 0x8192962a494ff8a0
17391 .xword 0x8446e13ba805ed7f
17392 .xword 0xe26b4ed299514f5c
17393 .xword 0xd2edb30a4b1f522d
17394 .xword 0x1e8341cf918c85d0
17395 .xword 0x68de502e8c128048
17396 .xword 0xd049800e1a0c02f4
17397 .xword 0x915f01f22d87a522
17398 .xword 0x1144c0180bedc655
17399 .xword 0xc8d160a431cd9aaf
17400 .xword 0x81bf0782b4684cc5
17401
17402
17403
17404
17405
17406SECTION .MyTEXT_0 TEXT_VA = 0x00000000e0200000
17407attr_text {
17408 Name = .MyTEXT_0,
17409 RA = 0x00000000e0200000,
17410 PA = ra2pa(0x00000000e0200000,0),
17411 part_0_ctx_zero_tsb_config_1,
17412 part_0_ctx_nonzero_tsb_config_1,
17413 TTE_G = 1,
17414 TTE_Context = PCONTEXT,
17415 TTE_V = 1,
17416 TTE_Size = 3,
17417 TTE_NFO = 0,
17418 TTE_IE = 1,
17419 TTE_Soft2 = 0,
17420 TTE_Diag = 0,
17421 TTE_Soft = 0,
17422 TTE_L = 0,
17423 TTE_CP = 1,
17424 TTE_CV = 1,
17425 TTE_E = 0,
17426 TTE_P = 1,
17427 TTE_W = 1
17428}
17429
17430.text
17431nuff_said_0:
17432 fdivd %f0, %f4, %f4
17433 mov HIGHVA_HIGHNUM, %r11
17434 sllx %r11, 32, %r11
17435 or %r27, %r11, %r27
17436 jmpl %r27+8, %r0
17437 jmpl %r27+8, %r0
17438 jmpl %r27+8, %r0
17439 jmpl %r27+8, %r0
17440 fdivs %f0, %f4, %f4
17441
17442
17443
17444SECTION .MyTEXT_1 TEXT_VA = 0x00000000e0a00000
17445attr_text {
17446 Name = .MyTEXT_1,
17447 RA = 0x00000000e0a00000,
17448 PA = ra2pa(0x00000000e0a00000,0),
17449 part_0_ctx_zero_tsb_config_1,
17450 part_0_ctx_nonzero_tsb_config_1,
17451 TTE_G = 1,
17452 TTE_Context = PCONTEXT,
17453 TTE_V = 1,
17454 TTE_Size = 3,
17455 TTE_NFO = 0,
17456 TTE_IE = 1,
17457 TTE_Soft2 = 0,
17458 TTE_Diag = 0,
17459 TTE_Soft = 0,
17460 TTE_L = 0,
17461 TTE_CP = 1,
17462 TTE_CV = 1,
17463 TTE_E = 0,
17464 TTE_P = 0,
17465 TTE_W = 0
17466}
17467
17468.text
17469nuff_said_1:
17470 fdivs %f0, %f4, %f8
17471 mov HIGHVA_HIGHNUM, %r11
17472 sllx %r11, 32, %r11
17473 or %r27, %r11, %r27
17474 jmpl %r27+8, %r0
17475 jmpl %r27+8, %r0
17476 jmpl %r27+8, %r0
17477 jmpl %r27+8, %r0
17478 fdivd %f0, %f4, %f6
17479
17480
17481
17482SECTION .MyTEXT_2 TEXT_VA = 0x00000000e1200000
17483attr_text {
17484 Name = .MyTEXT_2,
17485 RA = 0x00000000e1200000,
17486 PA = ra2pa(0x00000000e1200000,0),
17487 part_0_ctx_zero_tsb_config_1,
17488 part_0_ctx_nonzero_tsb_config_1,
17489 TTE_G = 1,
17490 TTE_Context = PCONTEXT,
17491 TTE_V = 1,
17492 TTE_Size = 5,
17493 TTE_NFO = 0,
17494 TTE_IE = 0,
17495 TTE_Soft2 = 0,
17496 TTE_Diag = 0,
17497 TTE_Soft = 0,
17498 TTE_L = 0,
17499 TTE_CP = 1,
17500 TTE_CV = 1,
17501 TTE_E = 1,
17502 TTE_P = 1,
17503 TTE_W = 1
17504}
17505
17506.text
17507nuff_said_2:
17508 fdivd %f0, %f4, %f4
17509 mov HIGHVA_HIGHNUM, %r11
17510 sllx %r11, 32, %r11
17511 or %r27, %r11, %r27
17512 jmpl %r27+8, %r0
17513 jmpl %r27+8, %r0
17514 jmpl %r27+8, %r0
17515 jmpl %r27+8, %r0
17516 fdivs %f0, %f4, %f4
17517
17518
17519
17520SECTION .MyTEXT_3 TEXT_VA = 0x00000000e1a00000
17521attr_text {
17522 Name = .MyTEXT_3,
17523 RA = 0x00000000e1a00000,
17524 PA = ra2pa(0x00000000e1a00000,0),
17525 part_0_ctx_zero_tsb_config_1,
17526 part_0_ctx_nonzero_tsb_config_1,
17527 TTE_G = 1,
17528 TTE_Context = PCONTEXT,
17529 TTE_V = 1,
17530 TTE_Size = 1,
17531 TTE_NFO = 0,
17532 TTE_IE = 0,
17533 TTE_Soft2 = 0,
17534 TTE_Diag = 0,
17535 TTE_Soft = 0,
17536 TTE_L = 0,
17537 TTE_CP = 1,
17538 TTE_CV = 1,
17539 TTE_E = 1,
17540 TTE_P = 1,
17541 TTE_W = 1
17542}
17543
17544.text
17545nuff_said_3:
17546 fdivs %f0, %f4, %f6
17547 mov HIGHVA_HIGHNUM, %r11
17548 sllx %r11, 32, %r11
17549 or %r27, %r11, %r27
17550 jmpl %r27+8, %r0
17551 jmpl %r27+8, %r0
17552 jmpl %r27+8, %r0
17553 jmpl %r27+8, %r0
17554 fdivd %f0, %f4, %f4
17555
17556
17557
17558
17559
17560SECTION .VaHOLE_0 TEXT_VA = 0x00007fffffffe000
17561attr_text {
17562 Name = .VaHOLE_0,
17563 RA = 0x00000000ffffe000,
17564 PA = ra2pa(0x00000000ffffe000,0),
17565 part_0_ctx_zero_tsb_config_1,
17566 part_0_ctx_nonzero_tsb_config_1,
17567 TTE_G = 1,
17568 TTE_Context = PCONTEXT,
17569 TTE_V = 1,
17570 TTE_Size = 0,
17571 TTE_NFO = 0,
17572 TTE_IE = 0,
17573 TTE_Soft2 = 0,
17574 TTE_Diag = 0,
17575 TTE_Soft = 0,
17576 TTE_L = 0,
17577 TTE_CP = 1,
17578 TTE_CV = 0,
17579 TTE_E = 1,
17580 TTE_P = 0,
17581 TTE_W = 1,
17582 TTE_X = 1
17583}
17584
17585.text
17586.global vahole_target0
17587.text
17588.global vahole_target1
17589.text
17590.global vahole_target2
17591.text
17592.global vahole_target3
17593 nop
17594.align 4096
17595 nop
17596.align 2048
17597 nop
17598.align 1024
17599 nop
17600.align 512
17601 nop
17602.align 256
17603 nop
17604.align 128
17605 nop
17606.align 64
17607 nop
17608 nop
17609.align 16
17610 nop;nop;nop
17611vahole_target0: nop;nop
17612vahole_target1: nop
17613vahole_target2: nop;nop;nop
17614vahole_target3: nop;nop;nop
17615
17616
17617
17618
17619
17620SECTION .VaHOLEL_0 TEXT_VA = 0x00000000ffffe000
17621attr_text {
17622 Name = .VaHOLEL_0,
17623 RA = 0x00000000ffffe000,
17624 PA = ra2pa(0x00000000ffffe000,0),
17625 part_0_ctx_zero_tsb_config_0,
17626 part_0_ctx_nonzero_tsb_config_0,
17627 TTE_G = 1,
17628 TTE_Context = PCONTEXT,
17629 TTE_V = 1,
17630 TTE_Size = 3,
17631 TTE_NFO = 0,
17632 TTE_IE = 1,
17633 TTE_Soft2 = 0,
17634 TTE_Diag = 0,
17635 TTE_Soft = 0,
17636 TTE_L = 0,
17637 TTE_CP = 1,
17638 TTE_CV = 0,
17639 TTE_E = 1,
17640 TTE_P = 0,
17641 TTE_W = 0,
17642 TTE_X = 1,
17643 tsbonly
17644}
17645
17646.text
17647 nop
17648
17649
17650
17651
17652
17653SECTION .ZERO_0 TEXT_VA = 0x0000000000000000
17654attr_text {
17655 Name = .ZERO_0,
17656 RA = 0x0000000000000000,
17657 PA = ra2pa(0x0000000000000000,0),
17658 part_0_ctx_zero_tsb_config_1,
17659 part_0_ctx_nonzero_tsb_config_1,
17660 TTE_G = 1,
17661 TTE_Context = 0x44,
17662 TTE_V = 1,
17663 TTE_Size = 0,
17664 TTE_NFO = 0,
17665 TTE_IE = 0,
17666 TTE_Soft2 = 0,
17667 TTE_Diag = 0,
17668 TTE_Soft = 0,
17669 TTE_L = 0,
17670 TTE_CP = 1,
17671 TTE_CV = 0,
17672 TTE_E = 1,
17673 TTE_P = 0,
17674 TTE_W = 1,
17675 TTE_X = 1
17676}
17677
17678
17679.text
17680 mov HIGHVA_HIGHNUM, %r11
17681 sllx %r11, 32, %r11
17682 or %r27, %r11, %r27
17683 jmpl %r27+8, %r0
17684 nop
17685 nop
17686 jmpl %r27+8, %r0
17687 nop
17688
17689Power_On_Reset:
17690 setx HRedmode_Reset_Handler, %g1, %g2
17691 jmp %g2
17692 nop
17693.align 32
17694
17695Watchdog_Reset:
17696 setx wdog_red_ext, %g1, %g2
17697 jmp %g2
17698 nop
17699.align 32
17700
17701External_Reset:
17702 My_External_Reset
17703
17704.align 32
17705
17706Software_Initiated_Reset:
17707 setx Software_Reset_Handler, %g1, %g2
17708 jmp %g2
17709 nop
17710
17711.align 32
17712
17713RED_Mode_Other_Reset:
17714 ! IF TL=6, shift stack by one ..
17715 rdpr %tl, %l1
17716 cmp %l1, 6
17717 be start_tsa_shift
17718 nop
17719
17720continue_red_other:
17721 mov 0x1f, %l1
17722 stxa %l1, [%g0] ASI_LSU_CTL_REG
17723
17724 rdpr %tt, %l1
17725
17726 rdhpr %htstate, %l2
17727 and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv
17728 brnz,a %l2, red_goto_handler
17729 rdhpr %htba, %l2
17730 srlx %l1, 7, %l2 ! Send priv sw traps to priv mode ..
17731 cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap ..
17732 be,a red_goto_handler
17733 rdpr %tba, %l2
17734 rdhpr %htba, %l2
17735red_goto_handler:
17736
17737 sllx %l1, 5, %l1
17738 add %l1, %l2, %l2
17739 rdhpr %hpstate, %l1
17740 jmp %l2
17741 wrhpr %l1, 0x20, %hpstate
17742 nop
17743
17744wdog_red_ext:
17745 ! Shift stack down by 1 ...
17746 rdpr %tl, %l1
17747 cmp %l1, 6
17748 bl wdog_end
17749start_tsa_shift:
17750 mov 0x2, %l2
17751
17752tsa_shift:
17753 wrpr %l2, %tl
17754 rdpr %tt, %l3
17755 rdpr %tpc, %l4
17756 rdpr %tnpc, %l5
17757 rdpr %tstate, %l6
17758 rdhpr %htstate, %l7
17759 dec %l2
17760 wrpr %l2, %tl
17761 wrpr %l3, %tt
17762 wrpr %l4, %tpc
17763 wrpr %l5, %tnpc
17764 wrpr %l6, %tstate
17765 wrhpr %l7, %htstate
17766 add %l2, 2, %l2
17767 cmp %l2, %l1
17768 ble tsa_shift
17769 nop
17770tsa_shift_done:
17771 dec %l1
17772 wrpr %l1, %tl
17773
17774wdog_end:
17775 ! If TT != 2, then goto trap handler
17776 rdpr %tt, %l1
17777
17778 cmp %l1, 0x2
17779 bne continue_red_other
17780 nop
17781 ! else done
17782 mov 0x1f, %l1
17783 stxa %l1, [%g0] ASI_LSU_CTL_REG
17784 done
17785
17786
17787
17788
17789
17790SECTION .VaHOLE_PA_0 TEXT_VA = 0x000000ffffffe000
17791attr_text {
17792 Name = .VAHOLE_PA_0,
17793 hypervisor
17794}
17795
17796 nop
17797.align 4096
17798 nop
17799.align 2048
17800 nop
17801.align 1024
17802 nop
17803.align 512
17804 nop
17805.align 256
17806 nop
17807.align 128
17808 nop
17809.align 64
17810 nop
17811 nop
17812.align 16
17813 nop;nop;nop
17814 nop
17815 nop
17816 jmpl %r27+8, %r0
17817 nop
17818 nop
17819 nop
17820 jmpl %r27+8, %r0
17821 nop
17822
17823
17824
17825
17826
17827SECTION .MASKEDHOLE_0 TEXT_VA = 0x0000000100000000
17828attr_text {
17829 Name = .MASKEDHOLE_0,
17830 RA = 0x0000000000000000,
17831 PA = ra2pa(0x0000000000000000,0),
17832 part_0_ctx_zero_tsb_config_3,
17833 part_0_ctx_nonzero_tsb_config_3,
17834 TTE_G = 1,
17835 TTE_Context = 0x44,
17836 TTE_V = 1,
17837 TTE_Size = 1,
17838 TTE_NFO = 0,
17839 TTE_IE = 1,
17840 TTE_Soft2 = 0,
17841 TTE_Diag = 0,
17842 TTE_Soft = 0,
17843 TTE_L = 0,
17844 TTE_CP = 0,
17845 TTE_CV = 0,
17846 TTE_E = 0,
17847 TTE_P = 0,
17848 TTE_W = 0,
17849 TTE_X = 1,
17850 tsbonly
17851}
17852
17853
17854attr_text {
17855 Name = .MASKEDHOLE_0,
17856 hypervisor
17857}
17858
17859 mov HIGHVA_HIGHNUM, %r11
17860 sllx %r11, 32, %r11
17861 or %r27, %r11, %r27
17862 jmpl %r27+8, %r0
17863 nop
17864
17865
17866
17867#if 0
17868#endif
Full OpenSPARC design & verification tarball including full HDL.