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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: tlu_rand5fc_8506227.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define IMMU_SKIP_IF_NO_TTE | |
39 | #define DMMU_SKIP_IF_NO_TTE | |
40 | #define PORTABLE_CORE | |
41 | #define MAIN_PAGE_NUCLEUS_ALSO | |
42 | #define MAIN_PAGE_HV_ALSO | |
43 | #define MAIN_PAGE_VA_RS_RA_ALSO | |
44 | #define DISABLE_PART_LIMIT_CHECK | |
45 | #define MAIN_PAGE_USE_CONFIG 3 | |
46 | #define PART0_Z_TSB_SIZE_3 10 | |
47 | #define PART0_Z_PAGE_SIZE_3 1 | |
48 | #define PART0_NZ_TSB_SIZE_3 10 | |
49 | #define PART0_NZ_PAGE_SIZE_3 1 | |
50 | #define PART0_Z_TSB_SIZE_1 3 | |
51 | #define PART0_NZ_TSB_SIZE_1 3 | |
52 | ||
53 | #define PART_0_BASE 0x0 | |
54 | #define USER_PAGE_CUSTOM_MAP | |
55 | #define MAIN_BASE_TEXT_VA 0x333000000 | |
56 | #define MAIN_BASE_TEXT_RA 0x033000000 | |
57 | #define MAIN_BASE_DATA_VA 0x379400000 | |
58 | #define MAIN_BASE_DATA_RA 0x079400000 | |
59 | #define HIGHVA_HIGHNUM 0x3 | |
60 | ||
61 | #d | |
62 | #undef H_HT0_Instruction_Access_MMU_Error_0x71 | |
63 | #define H_HT0_Instruction_Access_MMU_Error_0x71 inst_access_mmu_error_handler | |
64 | #undef H_HT0_Instruction_access_error_0x0a | |
65 | #define H_HT0_Instruction_access_error_0x0a inst_access_error_handler | |
66 | #undef H_HT0_Internal_Processor_Error_0x29 | |
67 | #define H_HT0_Internal_Processor_Error_0x29 int_proc_err_handler | |
68 | #undef H_HT0_Data_Access_MMU_Error_0x72 | |
69 | #define H_HT0_Data_Access_MMU_Error_0x72 data_access_mmu_error_handler | |
70 | #undef H_HT0_Data_access_error_0x32 | |
71 | #define H_HT0_Data_access_error_0x32 data_access_error_handler | |
72 | #undef H_HT0_Hw_Corrected_Error_0x63 | |
73 | #define H_HT0_Hw_Corrected_Error_0x63 hw_corrected_error_handler | |
74 | #undef H_HT0_Sw_Recoverable_Error_0x40 | |
75 | #define H_HT0_Sw_Recoverable_Error_0x40 sw_recoverable_error_handler | |
76 | #undef H_HT0_Store_Error_0x07 | |
77 | #define H_HT0_Store_Error_0x07 store_error_handler | |
78 | ||
79 | #define DAE_SKIP_IF_SOCU_ERROR | |
80 | #ifndef T_HANDLER_RAND4_1 | |
81 | #define T_HANDLER_RAND4_1 b .+16;\ | |
82 | sdiv %r1, %r0, %l4;nop;nop | |
83 | #endif | |
84 | #ifndef T_HANDLER_RAND7_1 | |
85 | #define T_HANDLER_RAND7_1 b .+28;\ | |
86 | pdist %f4, %f6, %f20; \ | |
87 | nop; nop ; nop; nop; illtrap | |
88 | #endif | |
89 | #ifndef T_HANDLER_RAND4_2 | |
90 | #define T_HANDLER_RAND4_2 save %i7, %g0, %i7; \ | |
91 | save %i7, %g0, %i7; \ | |
92 | restore %i7, %g0, %i7;\ | |
93 | restore %i7, %g0, %i7; | |
94 | #endif | |
95 | #ifndef T_HANDLER_RAND7_2 | |
96 | #define T_HANDLER_RAND7_2 b .+8 ;\ | |
97 | rdpr %pstate, %l2;\ | |
98 | b .+8 ;\ | |
99 | rdpr %tstate, %l3;\ | |
100 | b .+12 ;\ | |
101 | wrpr %l3, %r0, %tstate; nop | |
102 | #endif | |
103 | #ifndef T_HANDLER_RAND4_3 | |
104 | #define T_HANDLER_RAND4_3 save %i7, %g0, %i7;\ | |
105 | restore %i7, %g0, %i7;\ | |
106 | save %i7, %g0, %i7; \ | |
107 | restore %i7, %g0, %i7; | |
108 | #endif | |
109 | #ifndef T_HANDLER_RAND7_3 | |
110 | #define T_HANDLER_RAND7_3 b .+8 ;\ | |
111 | rdpr %tnpc, %l2;\ | |
112 | and %l2, 0xfc0, %l2;\ | |
113 | add %i7, %l2, %l2;\ | |
114 | stda %f16,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ | |
115 | b .+8 ;\ | |
116 | stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; | |
117 | #endif | |
118 | #ifndef T_HANDLER_RAND4_4 | |
119 | #define T_HANDLER_RAND4_4 b .+4 ; b .+4; b .+4; b .+4 | |
120 | #endif | |
121 | #ifndef T_HANDLER_RAND7_4 | |
122 | #define T_HANDLER_RAND7_4 b .+8;\ | |
123 | save %i7, %g0, %i7; \ | |
124 | b,a .+8;\ | |
125 | b .+12;\ | |
126 | stw %i7, [%i7];\ | |
127 | b .-8;;\ | |
128 | restore %i7, %g0, %i7; | |
129 | ||
130 | #endif | |
131 | #ifndef T_HANDLER_RAND4_5 | |
132 | #define T_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %f16;\ | |
133 | sdiv %l4, %l5, %l7;\ | |
134 | add %r31, 128, %l5;\ | |
135 | stda %l4, [%i7]ASI_BLOCK_PRIMARY_LITTLE; | |
136 | #endif | |
137 | #ifndef T_HANDLER_RAND7_5 | |
138 | #define T_HANDLER_RAND7_5 save %i7, %g0, %i7;\ | |
139 | rdpr %tnpc, %l2;\ | |
140 | wrpr %l2, %tpc;\ | |
141 | add %l2, 4, %l2;\ | |
142 | wrpr %l2, %tnpc;\ | |
143 | restore %i7, %g0, %i7;\ | |
144 | retry; | |
145 | #endif | |
146 | #ifndef T_HANDLER_RAND4_6 | |
147 | #define T_HANDLER_RAND4_6 ldda [%r31]ASI_BLOCK_AS_IF_USER_PRIMARY, %f32;\ | |
148 | rd %fprs, %l2; \ | |
149 | wr %l2, 0x4, %fprs ;\ | |
150 | stda %f0,[%r31]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; | |
151 | #endif | |
152 | #ifndef T_HANDLER_RAND7_6 | |
153 | #define T_HANDLER_RAND7_6 umul %o4, 2, %o5;\ | |
154 | rdpr %tnpc, %l2;\ | |
155 | wrpr %l2, %tpc;\ | |
156 | add %l2, 4, %l2;\ | |
157 | wrpr %l2, %tnpc;\ | |
158 | stw %l2, [%i7];\ | |
159 | retry; | |
160 | #endif | |
161 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
162 | #ifndef HT_HANDLER_RAND4_1 | |
163 | #define HT_HANDLER_RAND4_1 mov 0x80, %l3;\ | |
164 | b .+12;\ | |
165 | stxa %l3, [%l3]0x57 ;\ | |
166 | nop | |
167 | #endif | |
168 | #ifndef HT_HANDLER_RAND7_1 | |
169 | #define HT_HANDLER_RAND7_1 b .+28;\ | |
170 | pdist %f4, %f4, %f20;\ | |
171 | nop; nop ; nop; nop; illtrap | |
172 | #endif | |
173 | #ifndef HT_HANDLER_RAND4_2 | |
174 | #define HT_HANDLER_RAND4_2 rdpr %tstate, %l2;\ | |
175 | b .+12;\ | |
176 | wrpr %l2, 0x800, %tstate;\ | |
177 | nop; | |
178 | #endif | |
179 | #ifndef HT_HANDLER_RAND7_2 | |
180 | #define HT_HANDLER_RAND7_2 b .+8 ;\ | |
181 | rdhpr %hpstate, %l2;\ | |
182 | b .+8 ;\ | |
183 | rdhpr %htstate, %l3;\ | |
184 | b .+12 ;\ | |
185 | wrhpr %l3, %r0, %htstate; nop | |
186 | #endif | |
187 | #ifndef HT_HANDLER_RAND4_3 | |
188 | #define HT_HANDLER_RAND4_3 stxa %l4, [%r31]ASI_AS_IF_USER_PRIMARY;\ | |
189 | mov 0x80, %l3;\ | |
190 | stxa %l3, [%l3]0x5f ;\ | |
191 | b .+8 ;\ | |
192 | ldxa [%r31]ASI_AS_IF_USER_PRIMARY, %l4; | |
193 | #endif | |
194 | #ifndef HT_HANDLER_RAND7_3 | |
195 | #define HT_HANDLER_RAND7_3 b .+8 ;\ | |
196 | rdpr %tnpc, %l2;\ | |
197 | and %l2, 0xfc0, %l2;\ | |
198 | add %i7, %l2, %l2;\ | |
199 | stda %f16,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ | |
200 | b .+8 ;\ | |
201 | stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; | |
202 | #endif | |
203 | #ifndef HT_HANDLER_RAND4_4 | |
204 | #define HT_HANDLER_RAND4_4 ldda [%i7]ASI_BLOCK_PRIMARY_LITTLE, %f0;\ | |
205 | b .+12 ;\ | |
206 | stxa %l3, [%g0]ASI_LSU_CONTROL; nop | |
207 | #endif | |
208 | #ifndef HT_HANDLER_RAND7_4 | |
209 | #define HT_HANDLER_RAND7_4 rdpr %tnpc, %l3;\ | |
210 | and %l3, 0xff, %l3;\ | |
211 | sllx %l3, 26, %l3;\ | |
212 | ldxa [%g0]0x45, %l4;\ | |
213 | or %l3, %l4, %l3 ;\ | |
214 | stxa %l3, [%g0]0x45 ;\ | |
215 | nop; | |
216 | #endif | |
217 | #ifndef HT_HANDLER_RAND4_5 | |
218 | #define HT_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %f48;\ | |
219 | sdiv %l4, %l5, %l6;\ | |
220 | sdiv %l3, %l6, %l7;\ | |
221 | stda %f32, [%r31]ASI_BLOCK_PRIMARY_LITTLE; | |
222 | #endif | |
223 | #ifndef HT_HANDLER_RAND7_5 | |
224 | #define HT_HANDLER_RAND7_5 save %i7, %g0, %i7;\ | |
225 | rdpr %tnpc, %l2;\ | |
226 | wrpr %l2, %tpc;\ | |
227 | add %l2, 4, %l2;\ | |
228 | wrpr %l2, %tnpc;\ | |
229 | restore %i7, %g0, %i7;\ | |
230 | retry; | |
231 | #endif | |
232 | #ifndef HT_HANDLER_RAND4_6 | |
233 | #define HT_HANDLER_RAND4_6 ld [%r31], %l2;\ | |
234 | rd %fprs, %l2; \ | |
235 | wr %l2, 0x4, %fprs ;\ | |
236 | stda %f0,[%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; | |
237 | #endif | |
238 | #ifndef HT_HANDLER_RAND7_6 | |
239 | #define HT_HANDLER_RAND7_6 rdhpr %htstate, %o4;\ | |
240 | rdpr %tnpc, %l2;\ | |
241 | wrpr %l2, %tpc;\ | |
242 | add %l2, 4, %l2;\ | |
243 | wrpr %l2, %tnpc;\ | |
244 | wrhpr %o4, %r0, %htstate;\ | |
245 | retry; | |
246 | #endif | |
247 | ||
248 | !!!!!!!!!!!!!!!!!!!!!!!!! | |
249 | !! Disable trap checking | |
250 | #define NO_TRAPCHECK | |
251 | ||
252 | ! Enable Traps | |
253 | #define ENABLE_T1_Privileged_Opcode_0x11 | |
254 | #define ENABLE_T1_Fp_Disabled_0x20 | |
255 | #define ENABLE_HT0_Watchdog_Reset_0x02 | |
256 | ||
257 | #define FILL_TRAP_RETRY | |
258 | #define SPILL_TRAP_RETRY | |
259 | #define CLEAN_WIN_RETRY | |
260 | ||
261 | #define My_RED_Mode_Other_Reset | |
262 | #define My_RED_Mode_Other_Reset \ | |
263 | ba red_other_ext;\ | |
264 | nop;retry;nop;nop;nop;nop;nop | |
265 | ||
266 | #define H_HT0_Software_Initiated_Reset_0x04 | |
267 | #define SUN_H_HT0_Software_Initiated_Reset_0x04 \ | |
268 | setx Software_Reset_Handler, %g1, %g2 ;\ | |
269 | jmp %g2 ;\ | |
270 | nop | |
271 | #define H_T1_Clean_Window_0x24 | |
272 | #define SUN_H_T1_Clean_Window_0x24 \ | |
273 | rdpr %cleanwin, %l1;\ | |
274 | add %l1,1,%l1;\ | |
275 | wrpr %l1, %g0, %cleanwin;\ | |
276 | retry; nop; nop; nop; nop | |
277 | ||
278 | #define H_T1_Clean_Window_0x25 | |
279 | #define SUN_H_T1_Clean_Window_0x25 \ | |
280 | rdpr %cleanwin, %l1;\ | |
281 | add %l1,1,%l1;\ | |
282 | wrpr %l1, %g0, %cleanwin;\ | |
283 | retry; nop; nop; nop; nop | |
284 | ||
285 | #define H_T1_Clean_Window_0x26 | |
286 | #define SUN_H_T1_Clean_Window_0x26 \ | |
287 | rdpr %cleanwin, %l1;\ | |
288 | add %l1,1,%l1;\ | |
289 | wrpr %l1, %g0, %cleanwin;\ | |
290 | retry; nop; nop; nop; nop | |
291 | ||
292 | #define H_T1_Clean_Window_0x27 | |
293 | #define SUN_H_T1_Clean_Window_0x27 \ | |
294 | rdpr %cleanwin, %l1;\ | |
295 | add %l1,1,%l1;\ | |
296 | wrpr %l1, %g0, %cleanwin;\ | |
297 | retry; nop; nop; nop; nop | |
298 | #define H_HT0_Tag_Overflow | |
299 | #define My_HT0_Tag_Overflow \ | |
300 | HT_HANDLER_RAND7_1 ;\ | |
301 | done | |
302 | ||
303 | #define H_T0_Tag_Overflow | |
304 | #define My_T0_Tag_Overflow \ | |
305 | T_HANDLER_RAND7_2 ;\ | |
306 | done | |
307 | ||
308 | #define H_T1_Tag_Overflow_0x23 | |
309 | #define SUN_H_T1_Tag_Overflow_0x23 \ | |
310 | T_HANDLER_RAND7_3 ;\ | |
311 | done | |
312 | ||
313 | #define H_T0_Window_Spill_0_Normal_Trap | |
314 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
315 | ||
316 | #define H_T0_Window_Spill_1_Normal_Trap | |
317 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
318 | ||
319 | #define H_T0_Window_Spill_2_Normal_Trap | |
320 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
321 | ||
322 | #define H_T0_Window_Spill_3_Normal_Trap | |
323 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
324 | ||
325 | #define H_T0_Window_Spill_4_Normal_Trap | |
326 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
327 | ||
328 | #define H_T0_Window_Spill_5_Normal_Trap | |
329 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
330 | ||
331 | #define H_T0_Window_Spill_6_Normal_Trap | |
332 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
333 | ||
334 | #define H_T0_Window_Spill_7_Normal_Trap | |
335 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
336 | ||
337 | #define H_T0_Window_Spill_0_Other_Trap | |
338 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
339 | ||
340 | #define H_T0_Window_Spill_1_Other_Trap | |
341 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
342 | ||
343 | #define H_T0_Window_Spill_2_Other_Trap | |
344 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
345 | ||
346 | #define H_T0_Window_Spill_3_Other_Trap | |
347 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
348 | ||
349 | #define H_T0_Window_Spill_4_Other_Trap | |
350 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
351 | ||
352 | #define H_T0_Window_Spill_5_Other_Trap | |
353 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
354 | ||
355 | #define H_T0_Window_Spill_6_Other_Trap | |
356 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
357 | ||
358 | #define H_T0_Window_Spill_7_Other_Trap | |
359 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
360 | ||
361 | #define H_T0_Window_Fill_0_Normal_Trap | |
362 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
363 | ||
364 | #define H_T0_Window_Fill_1_Normal_Trap | |
365 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
366 | ||
367 | #define H_T0_Window_Fill_2_Normal_Trap | |
368 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
369 | ||
370 | #define H_T0_Window_Fill_3_Normal_Trap | |
371 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
372 | ||
373 | #define H_T0_Window_Fill_4_Normal_Trap | |
374 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
375 | ||
376 | #define H_T0_Window_Fill_5_Normal_Trap | |
377 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
378 | ||
379 | #define H_T0_Window_Fill_6_Normal_Trap | |
380 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
381 | ||
382 | #define H_T0_Window_Fill_7_Normal_Trap | |
383 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
384 | ||
385 | #define H_T0_Window_Fill_0_Other_Trap | |
386 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
387 | ||
388 | #define H_T0_Window_Fill_1_Other_Trap | |
389 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
390 | ||
391 | #define H_T0_Window_Fill_2_Other_Trap | |
392 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
393 | ||
394 | #define H_T0_Window_Fill_3_Other_Trap | |
395 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
396 | ||
397 | #define H_T0_Window_Fill_4_Other_Trap | |
398 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
399 | ||
400 | #define H_T0_Window_Fill_5_Other_Trap | |
401 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
402 | ||
403 | #define H_T0_Window_Fill_6_Other_Trap | |
404 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
405 | ||
406 | #define H_T0_Window_Fill_7_Other_Trap | |
407 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
408 | #define H_T1_Window_Spill_0_Normal_Trap | |
409 | #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
410 | ||
411 | #define H_T1_Window_Spill_1_Normal_Trap | |
412 | #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
413 | ||
414 | #define H_T1_Window_Spill_2_Normal_Trap | |
415 | #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
416 | ||
417 | #define H_T1_Window_Spill_3_Normal_Trap | |
418 | #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
419 | ||
420 | #define H_T1_Window_Spill_4_Normal_Trap | |
421 | #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
422 | ||
423 | #define H_T1_Window_Spill_5_Normal_Trap | |
424 | #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
425 | ||
426 | #define H_T1_Window_Spill_6_Normal_Trap | |
427 | #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
428 | ||
429 | #define H_T1_Window_Spill_7_Normal_Trap | |
430 | #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
431 | ||
432 | #define H_T1_Window_Spill_0_Other_Trap | |
433 | #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
434 | ||
435 | #define H_T1_Window_Spill_1_Other_Trap | |
436 | #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
437 | ||
438 | #define H_T1_Window_Spill_2_Other_Trap | |
439 | #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
440 | ||
441 | #define H_T1_Window_Spill_3_Other_Trap | |
442 | #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
443 | ||
444 | #define H_T1_Window_Spill_4_Other_Trap | |
445 | #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
446 | ||
447 | #define H_T1_Window_Spill_5_Other_Trap | |
448 | #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
449 | ||
450 | #define H_T1_Window_Spill_6_Other_Trap | |
451 | #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
452 | ||
453 | #define H_T1_Window_Spill_7_Other_Trap | |
454 | #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
455 | ||
456 | #define H_T1_Window_Fill_0_Normal_Trap | |
457 | #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
458 | ||
459 | #define H_T1_Window_Fill_1_Normal_Trap | |
460 | #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
461 | ||
462 | #define H_T1_Window_Fill_2_Normal_Trap | |
463 | #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
464 | ||
465 | #define H_T1_Window_Fill_3_Normal_Trap | |
466 | #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
467 | ||
468 | #define H_T1_Window_Fill_4_Normal_Trap | |
469 | #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
470 | ||
471 | #define H_T1_Window_Fill_5_Normal_Trap | |
472 | #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
473 | ||
474 | #define H_T1_Window_Fill_6_Normal_Trap | |
475 | #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
476 | ||
477 | #define H_T1_Window_Fill_7_Normal_Trap | |
478 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
479 | ||
480 | #define H_T1_Window_Fill_0_Other_Trap | |
481 | #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
482 | ||
483 | #define H_T1_Window_Fill_1_Other_Trap | |
484 | #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
485 | ||
486 | #define H_T1_Window_Fill_2_Other_Trap | |
487 | #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
488 | ||
489 | #define H_T1_Window_Fill_3_Other_Trap | |
490 | #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
491 | ||
492 | #define H_T1_Window_Fill_4_Other_Trap | |
493 | #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
494 | ||
495 | #define H_T1_Window_Fill_5_Other_Trap | |
496 | #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
497 | ||
498 | #define H_T1_Window_Fill_6_Other_Trap | |
499 | #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
500 | ||
501 | #define H_T1_Window_Fill_7_Other_Trap | |
502 | #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
503 | ||
504 | #define H_T0_Trap_Instruction_0 | |
505 | #define My_T0_Trap_Instruction_0 \ | |
506 | T_HANDLER_RAND7_5 ;\ | |
507 | done; | |
508 | ||
509 | #define H_T0_Trap_Instruction_1 | |
510 | #define My_T0_Trap_Instruction_1 \ | |
511 | T_HANDLER_RAND7_6 ;\ | |
512 | done; | |
513 | ||
514 | #define H_T0_Trap_Instruction_2 | |
515 | #define My_T0_Trap_Instruction_2 \ | |
516 | inc %o3;\ | |
517 | umul %o3, 2, %o4;\ | |
518 | ba 1f; \ | |
519 | save %i7, %g0, %i7; \ | |
520 | 2: done; \ | |
521 | nop; \ | |
522 | 1: ba 2b; \ | |
523 | restore %i7, %g0, %i7 | |
524 | #define H_T0_Trap_Instruction_3 | |
525 | #define My_T0_Trap_Instruction_3 \ | |
526 | save %i7, %g0, %i7 ;\ | |
527 | T_HANDLER_RAND4_5;\ | |
528 | stw %o4, [%i7];\ | |
529 | restore %i7, %g0, %i7 ;\ | |
530 | done | |
531 | #define H_T0_Trap_Instruction_4 | |
532 | #define My_T0_Trap_Instruction_4 \ | |
533 | T_HANDLER_RAND7_6 ;\ | |
534 | done; | |
535 | ||
536 | #define H_T0_Trap_Instruction_5 | |
537 | #define My_T0_Trap_Instruction_5 \ | |
538 | T_HANDLER_RAND4_5;\ | |
539 | done; | |
540 | ||
541 | #define H_T1_Trap_Instruction_0 | |
542 | #define My_T1_Trap_Instruction_0 \ | |
543 | inc %o4;\ | |
544 | umul %o4, 2, %o5;\ | |
545 | ba 3f; \ | |
546 | save %i7, %g0, %i7; \ | |
547 | 4: done; \ | |
548 | nop; \ | |
549 | 3: ba 4b; \ | |
550 | restore %i7, %g0, %i7 | |
551 | #define H_T1_Trap_Instruction_1 | |
552 | #define My_T1_Trap_Instruction_1 \ | |
553 | T_HANDLER_RAND7_3;\ | |
554 | done | |
555 | #define H_T1_Trap_Instruction_2 | |
556 | #define My_T1_Trap_Instruction_2 \ | |
557 | inc %o3;\ | |
558 | umul %o3, 2, %o4;\ | |
559 | ba 5f; \ | |
560 | save %i7, %g0, %i7; \ | |
561 | 6: done; \ | |
562 | nop; \ | |
563 | 5: ba 6b; \ | |
564 | restore %i7, %g0, %i7 | |
565 | #define H_T1_Trap_Instruction_3 | |
566 | #define My_T1_Trap_Instruction_3 \ | |
567 | T_HANDLER_RAND4_1;\ | |
568 | done; | |
569 | ||
570 | #define H_T1_Trap_Instruction_4 | |
571 | #define My_T1_Trap_Instruction_4 \ | |
572 | T_HANDLER_RAND7_1;\ | |
573 | done; | |
574 | #define H_T1_Trap_Instruction_5 | |
575 | #define My_T1_Trap_Instruction_5 \ | |
576 | T_HANDLER_RAND7_2;\ | |
577 | done | |
578 | #define H_HT0_Trap_Instruction_0 | |
579 | #define My_HT0_Trap_Instruction_0 \ | |
580 | HT_HANDLER_RAND4_1 ;\ | |
581 | done; | |
582 | #define H_HT0_Trap_Instruction_1 | |
583 | #define My_HT0_Trap_Instruction_1 \ | |
584 | HT_HANDLER_RAND4_3 ;\ | |
585 | done | |
586 | #define H_HT0_Trap_Instruction_2 | |
587 | #define My_HT0_Trap_Instruction_2 \ | |
588 | HT_HANDLER_RAND7_5 ;\ | |
589 | done; | |
590 | #define H_HT0_Trap_Instruction_3 | |
591 | #define My_HT0_Trap_Instruction_3 \ | |
592 | HT_HANDLER_RAND4_5 ;\ | |
593 | done | |
594 | #define H_HT0_Trap_Instruction_4 | |
595 | #define My_HT0_Trap_Instruction_4 \ | |
596 | HT_HANDLER_RAND7_4 ;\ | |
597 | done | |
598 | #define H_HT0_Trap_Instruction_5 | |
599 | #define My_HT0_Trap_Instruction_5 \ | |
600 | ba htrap_5_ext;\ | |
601 | nop; retry;\ | |
602 | nop; nop; nop; nop; nop | |
603 | ||
604 | #define H_HT0_Mem_Address_Not_Aligned_0x34 | |
605 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ | |
606 | HT_HANDLER_RAND4_2 ;\ | |
607 | done ; | |
608 | #define H_HT0_Illegal_instruction_0x10 | |
609 | #define My_HT0_Illegal_instruction_0x10 \ | |
610 | HT_HANDLER_RAND4_2 ;\ | |
611 | done; | |
612 | ||
613 | #define H_HT0_DAE_so_page_0x30 | |
614 | #define My_HT0_DAE_so_page_0x30 \ | |
615 | HT_HANDLER_RAND4_2;\ | |
616 | done; | |
617 | #define H_HT0_DAE_invalid_asi_0x14 | |
618 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ | |
619 | HT_HANDLER_RAND4_3 ;\ | |
620 | done | |
621 | #define H_HT0_DAE_privilege_violation_0x15 | |
622 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ | |
623 | HT_HANDLER_RAND4_4 ;\ | |
624 | done; | |
625 | #define H_HT0_Privileged_Action_0x37 | |
626 | #define My_HT0_Privileged_Action_0x37 \ | |
627 | done; \ | |
628 | nop; nop | |
629 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
630 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ | |
631 | HT_HANDLER_RAND4_3 ;\ | |
632 | done | |
633 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
634 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ | |
635 | HT_HANDLER_RAND7_1;\ | |
636 | done | |
637 | #define H_HT0_Fp_exception_ieee_754_0x21 | |
638 | #define My_HT0_Fp_exception_ieee_754_0x21 \ | |
639 | HT_HANDLER_RAND4_2 ;\ | |
640 | done | |
641 | #define H_HT0_Fp_exception_other_0x22 | |
642 | #define My_HT0_Fp_exception_other_0x22 \ | |
643 | HT_HANDLER_RAND7_2 ;\ | |
644 | done | |
645 | #define H_HT0_Division_By_Zero | |
646 | #define My_HT0_Division_By_Zero \ | |
647 | HT_HANDLER_RAND4_6;\ | |
648 | done | |
649 | #define H_T0_Division_By_Zero | |
650 | #define My_T0_Division_By_Zero \ | |
651 | T_HANDLER_RAND4_3;\ | |
652 | done | |
653 | #define H_T1_Division_By_Zero_0x28 | |
654 | #define My_H_T1_Division_By_Zero_0x28 \ | |
655 | T_HANDLER_RAND4_3;\ | |
656 | done | |
657 | #define H_T0_Division_By_Zero | |
658 | #define My_T0_Division_By_Zero\ | |
659 | T_HANDLER_RAND4_4 ;\ | |
660 | done | |
661 | #define H_T0_Fp_exception_ieee_754_0x21 | |
662 | #define My_T0_Fp_exception_ieee_754_0x21 \ | |
663 | T_HANDLER_RAND4_3 ;\ | |
664 | done | |
665 | #define H_T1_Fp_Exception_Ieee_754_0x21 | |
666 | #define My_H_T1_Fp_Exception_Ieee_754_0x21 \ | |
667 | T_HANDLER_RAND4_4 ;\ | |
668 | done | |
669 | #define H_T1_Fp_Exception_Other_0x22 | |
670 | #define My_H_T1_Fp_Exception_Other_0x22 \ | |
671 | T_HANDLER_RAND4_5 ;\ | |
672 | done | |
673 | #define H_T1_Privileged_Opcode_0x11 | |
674 | #define SUN_H_T1_Privileged_Opcode_0x11 \ | |
675 | T_HANDLER_RAND4_6 ;\ | |
676 | done | |
677 | ||
678 | #define H_HT0_Privileged_opcode_0x11 | |
679 | #define My_HT0_Privileged_opcode_0x11 \ | |
680 | HT_HANDLER_RAND4_1;\ | |
681 | done; | |
682 | ||
683 | #define H_HT0_Fp_disabled_0x20 | |
684 | #define My_HT0_Fp_disabled_0x20 \ | |
685 | mov 0x4, %l2 ;\ | |
686 | wr %l2, 0x0, %fprs ;\ | |
687 | sllx %l2, 10, %l3; \ | |
688 | rdpr %tstate, %l2;\ | |
689 | or %l2, %l3, %l2 ;\ | |
690 | stw %l2, [%i7];\ | |
691 | wrpr %l2, 0x0, %tstate;\ | |
692 | retry; | |
693 | ||
694 | #define H_T0_Fp_disabled_0x20 | |
695 | #define My_T0_Fp_disabled_0x20 \ | |
696 | mov 0x4, %l2 ;\ | |
697 | wr %l2, 0x0, %fprs ;\ | |
698 | sllx %l2, 10, %l3; \ | |
699 | rdpr %tstate, %l2;\ | |
700 | or %l2, %l3, %l2 ;\ | |
701 | wrpr %l2, 0x0, %tstate;\ | |
702 | retry; nop | |
703 | ||
704 | #define H_T1_Fp_Disabled_0x20 | |
705 | #define My_H_T1_Fp_Disabled_0x20 \ | |
706 | mov 0x4, %l2 ;\ | |
707 | wr %l2, 0x0, %fprs ;\ | |
708 | sllx %l2, 10, %l3; \ | |
709 | rdpr %tstate, %l2;\ | |
710 | or %l2, %l3, %l2 ;\ | |
711 | wrpr %l2, 0x0, %tstate;\ | |
712 | stw %l2, [%i7];\ | |
713 | retry | |
714 | ||
715 | #define H_HT0_Watchdog_Reset_0x02 | |
716 | #define My_HT0_Watchdog_Reset_0x02 \ | |
717 | ba wdog_2_ext;\ | |
718 | nop;retry;nop;nop;nop;nop;nop | |
719 | ||
720 | #define H_T0_Privileged_opcode_0x11 | |
721 | #define My_T0_Privileged_opcode_0x11 \ | |
722 | T_HANDLER_RAND4_4;\ | |
723 | done | |
724 | ||
725 | #define H_T1_Fp_exception_other_0x22 | |
726 | #define My_T1_Fp_exception_other_0x22 \ | |
727 | T_HANDLER_RAND7_3 ;\ | |
728 | done; | |
729 | ||
730 | #define H_T0_Fp_exception_other_0x22 | |
731 | #define My_T0_Fp_exception_other_0x22 \ | |
732 | T_HANDLER_RAND7_4;\ | |
733 | done | |
734 | ||
735 | #define H_HT0_Trap_Level_Zero_0x5f | |
736 | #define My_HT0_Trap_Level_Zero_0x5f \ | |
737 | not %g0, %r13; \ | |
738 | rdhpr %hpstate, %l3;\ | |
739 | jmp %r13;\ | |
740 | rdhpr %htstate, %l3;\ | |
741 | and %l3, 0xfe, %l3;\ | |
742 | wrhpr %l3, 0, %htstate;\ | |
743 | stw %r13, [%i7];\ | |
744 | retry | |
745 | ||
746 | #define My_Watchdog_Reset | |
747 | #define My_Watchdog_Reset \ | |
748 | ba wdog_red_ext;\ | |
749 | nop;retry;nop;nop;nop;nop;nop | |
750 | ||
751 | #define H_HT0_Control_Transfer_Instr_0x74 | |
752 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ | |
753 | rdpr %tstate, %l3;\ | |
754 | mov 1, %l4;\ | |
755 | sllx %l4, 20, %l4;\ | |
756 | wrpr %l3, %l4, %tstate ;\ | |
757 | retry;nop; | |
758 | ||
759 | #define H_T0_Control_Transfer_Instr_0x74 | |
760 | #define My_H_T0_Control_Transfer_Instr_0x74 \ | |
761 | rdpr %tstate, %l3;\ | |
762 | mov 1, %l4;\ | |
763 | sllx %l4, 20, %l4;\ | |
764 | wrpr %l3, %l4, %tstate ;\ | |
765 | retry;nop; | |
766 | ||
767 | #define H_T1_Control_Transfer_Instr_0x74 | |
768 | #define My_H_T1_Control_Transfer_Instr_0x74 \ | |
769 | rdpr %tstate, %l3;\ | |
770 | mov 1, %l4;\ | |
771 | sllx %l4, 20, %l4;\ | |
772 | wrpr %l3, %l4, %tstate ;\ | |
773 | retry;nop; | |
774 | #define H_HT0_data_access_protection_0x6c | |
775 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop | |
776 | ||
777 | #define H_HT0_PA_Watchpoint_0x61 | |
778 | #define My_H_HT0_PA_Watchpoint_0x61 \ | |
779 | HT_HANDLER_RAND7_4;\ | |
780 | done | |
781 | ||
782 | #ifndef H_HT0_Data_access_error_0x32 | |
783 | #define H_HT0_Data_access_error_0x32 | |
784 | #define SUN_H_HT0_Data_access_error_0x32 \ | |
785 | done;nop | |
786 | #endif | |
787 | #define H_T0_VA_Watchpoint_0x62 | |
788 | #define My_T0_VA_Watchpoint_0x62 \ | |
789 | T_HANDLER_RAND7_5;\ | |
790 | done | |
791 | ||
792 | #define H_T1_VA_Watchpoint_0x62 | |
793 | #define SUN_H_T1_VA_Watchpoint_0x62 \ | |
794 | T_HANDLER_RAND7_3;\ | |
795 | done | |
796 | ||
797 | #define H_HT0_VA_Watchpoint_0x62 | |
798 | #define My_H_HT0_VA_Watchpoint_0x62 \ | |
799 | HT_HANDLER_RAND7_5;\ | |
800 | done | |
801 | ||
802 | #define H_HT0_Instruction_VA_Watchpoint_0x75 | |
803 | #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ | |
804 | done; | |
805 | ||
806 | #define H_HT0_Instruction_Breakpoint_0x76 | |
807 | #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ | |
808 | rdhpr %htstate, %g1;\ | |
809 | wrhpr %g1, 0x400, %htstate;\ | |
810 | retry;nop | |
811 | #define H_HT0_Instruction_address_range_0x0d | |
812 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
813 | HT_HANDLER_RAND4_1;\ | |
814 | done; | |
815 | ||
816 | #define H_HT0_Instruction_real_range_0x0e | |
817 | #define SUN_H_HT0_Instruction_real_range_0x0e \ | |
818 | HT_HANDLER_RAND4_1;\ | |
819 | done; | |
820 | ||
821 | #define H_HT0_mem_real_range_0x2d | |
822 | #define SUN_H_HT0_mem_real_range_0x2d \ | |
823 | HT_HANDLER_RAND4_2;\ | |
824 | done; | |
825 | #define H_HT0_mem_address_range_0x2e | |
826 | #define SUN_H_HT0_mem_address_range_0x2e \ | |
827 | HT_HANDLER_RAND4_3;\ | |
828 | done; | |
829 | ||
830 | #define H_HT0_DAE_nc_page_0x16 | |
831 | #define SUN_H_HT0_DAE_nc_page_0x16 \ | |
832 | HT_HANDLER_RAND4_4;\ | |
833 | done; | |
834 | ||
835 | #define H_HT0_DAE_nfo_page_0x17 | |
836 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ | |
837 | HT_HANDLER_RAND4_5;\ | |
838 | done; | |
839 | #define H_HT0_IAE_unauth_access_0x0b | |
840 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
841 | HT_HANDLER_RAND7_3;\ | |
842 | done; | |
843 | #define H_HT0_IAE_nfo_page_0x0c | |
844 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ | |
845 | HT_HANDLER_RAND7_6;\ | |
846 | done; | |
847 | #define H_HT0_Reserved_0x3b | |
848 | #define SUN_H_HT0_Reserved_0x3b \ | |
849 | mov 0x80, %l3;\ | |
850 | stxa %l3, [%l3]0x5f ;\ | |
851 | stxa %l3, [%l3]0x57 ;\ | |
852 | done; | |
853 | #define H_HT0_IAE_privilege_violation_0x08 | |
854 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
855 | HT_HANDLER_RAND7_2;\ | |
856 | done; | |
857 | ||
858 | #ifndef H_HT0_Instruction_Access_MMU_Error_0x71 | |
859 | #define H_HT0_Instruction_Access_MMU_Error_0x71 | |
860 | #define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \ | |
861 | mov 0x80, %l3;\ | |
862 | stxa %l3, [%l3]0x5f ;\ | |
863 | stxa %l3, [%l3]0x57 ;\ | |
864 | retry; | |
865 | #endif | |
866 | ||
867 | #ifndef H_HT0_Data_Access_MMU_Error_0x72 | |
868 | #define H_HT0_Data_Access_MMU_Error_0x72 | |
869 | #define SUN_H_HT0_Data_Access_MMU_Error_0x72 \ | |
870 | mov 0x80, %l3;\ | |
871 | stxa %l3, [%l3]0x5f ;\ | |
872 | stxa %l3, [%l3]0x57 ;\ | |
873 | retry; | |
874 | #endif | |
875 | ||
876 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
877 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
878 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! | |
879 | ||
880 | #ifndef INT_HANDLER_RAND4_1 | |
881 | #define INT_HANDLER_RAND4_1 retry; nop; nop; nop | |
882 | #endif | |
883 | #ifndef INT_HANDLER_RAND7_1 | |
884 | #define INT_HANDLER_RAND7_1 mov 0x20,%g1; mov 1, %g2;stxa %g2,[%g1]0x40 | |
885 | #endif | |
886 | #ifndef INT_HANDLER_RAND4_2 | |
887 | #define INT_HANDLER_RAND4_2 retry; nop; nop; nop | |
888 | #endif | |
889 | #ifndef INT_HANDLER_RAND7_2 | |
890 | #define INT_HANDLER_RAND7_2 mov 0x80,%g1;stxa %g0,[%g1]0x40 | |
891 | #endif | |
892 | #ifndef INT_HANDLER_RAND4_3 | |
893 | #define INT_HANDLER_RAND4_3 retry; nop; nop; nop | |
894 | #endif | |
895 | #ifndef INT_HANDLER_RAND7_3 | |
896 | #define INT_HANDLER_RAND7_3 retry; nop; nop; nop ; nop; nop; nop | |
897 | #endif | |
898 | #define H_HT0_Externally_Initiated_Reset_0x03 | |
899 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ | |
900 | ldxa [%g0] ASI_LSU_CTL_REG, %g1; \ | |
901 | set cregs_lsu_ctl_reg_r64, %g1; \ | |
902 | stxa %g1, [%g0] ASI_LSU_CTL_REG; \ | |
903 | retry;nop | |
904 | ||
905 | #define My_External_Reset \ | |
906 | ldxa [%g0] ASI_LSU_CTL_REG, %l5; \ | |
907 | set cregs_lsu_ctl_reg_r64, %l5; \ | |
908 | stxa %l5, [%g0] ASI_LSU_CTL_REG; \ | |
909 | retry;nop | |
910 | ||
911 | !!!!! SPU Interrupt Handlers | |
912 | ||
913 | #define H_HT0_Control_Word_Queue_Interrupt_0x3c | |
914 | #define My_HT0_Control_Word_Queue_Interrupt_0x3c \ | |
915 | INT_HANDLER_RAND7_1 ;\ | |
916 | retry ; | |
917 | ||
918 | #define H_HT0_Modular_Arithmetic_Interrupt_0x3d | |
919 | #define My_H_HT0_Modular_Arithmetic_Interrupt_0x3d \ | |
920 | INT_HANDLER_RAND7_2 ;\ | |
921 | retry ; | |
922 | !!!!! HW interrupt handlers | |
923 | ||
924 | #define H_HT0_Interrupt_0x60 | |
925 | #define My_HT0_Interrupt_0x60 \ | |
926 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g5 ;\ | |
927 | ldxa [%g0] ASI_SWVR_INTR_R, %g4 ;\ | |
928 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ | |
929 | INT_HANDLER_RAND4_1 ;\ | |
930 | retry; | |
931 | ||
932 | !!!!! Queue interrupt handler | |
933 | #define H_T0_Cpu_Mondo_Trap_0x7c | |
934 | #define My_T0_Cpu_Mondo_Trap_0x7c \ | |
935 | mov 0x3c8, %g3; \ | |
936 | ldxa [%g3] 0x25, %g5; \ | |
937 | mov 0x3c0, %g3; \ | |
938 | stxa %g5, [%g3] 0x25; \ | |
939 | retry; \ | |
940 | nop; \ | |
941 | nop; \ | |
942 | nop | |
943 | ||
944 | #define H_T0_Dev_Mondo_Trap_0x7d | |
945 | #define My_T0_Dev_Mondo_Trap_0x7d \ | |
946 | mov 0x3d8, %g3; \ | |
947 | ldxa [%g3] 0x25, %g5; \ | |
948 | mov 0x3d0, %g3; \ | |
949 | stxa %g5, [%g3] 0x25; \ | |
950 | retry; \ | |
951 | nop; \ | |
952 | nop; \ | |
953 | nop | |
954 | ||
955 | #define H_T0_Resumable_Error_0x7e | |
956 | #define My_T0_Resumable_Error_0x7e \ | |
957 | mov 0x3e8, %g3; \ | |
958 | ldxa [%g3] 0x25, %g5; \ | |
959 | mov 0x3e0, %g3; \ | |
960 | stxa %g5, [%g3] 0x25; \ | |
961 | retry; \ | |
962 | nop; \ | |
963 | nop; \ | |
964 | nop | |
965 | ||
966 | #define H_T1_Cpu_Mondo_Trap_0x7c | |
967 | #define My_T1_Cpu_Mondo_Trap_0x7c \ | |
968 | mov 0x3c8, %g3; \ | |
969 | ldxa [%g3] 0x25, %g5; \ | |
970 | mov 0x3c0, %g3; \ | |
971 | stxa %g5, [%g3] 0x25; \ | |
972 | retry; \ | |
973 | nop; \ | |
974 | nop; \ | |
975 | nop | |
976 | ||
977 | #define H_T1_Dev_Mondo_Trap_0x7d | |
978 | #define My_T1_Dev_Mondo_Trap_0x7d \ | |
979 | mov 0x3d8, %g3; \ | |
980 | ldxa [%g3] 0x25, %g5; \ | |
981 | mov 0x3d0, %g3; \ | |
982 | stxa %g5, [%g3] 0x25; \ | |
983 | retry; \ | |
984 | nop; \ | |
985 | nop; \ | |
986 | nop | |
987 | ||
988 | #define H_T1_Resumable_Error_0x7e | |
989 | #define My_T1_Resumable_Error_0x7e \ | |
990 | mov 0x3e8, %g3; \ | |
991 | ldxa [%g3] 0x25, %g5; \ | |
992 | mov 0x3e0, %g3; \ | |
993 | stxa %g5, [%g3] 0x25; \ | |
994 | retry; \ | |
995 | nop; \ | |
996 | nop; \ | |
997 | nop | |
998 | ||
999 | #define H_HT0_Reserved_0x7c | |
1000 | #define SUN_H_HT0_Reserved_0x7c \ | |
1001 | mov 0x3c8, %g3; \ | |
1002 | ldxa [%g3] 0x25, %g5; \ | |
1003 | mov 0x3c0, %g3; \ | |
1004 | stxa %g5, [%g3] 0x25; \ | |
1005 | retry; \ | |
1006 | nop; \ | |
1007 | nop; \ | |
1008 | nop | |
1009 | ||
1010 | #define H_HT0_Reserved_0x7d | |
1011 | #define SUN_H_HT0_Reserved_0x7d \ | |
1012 | mov 0x3d8, %g3; \ | |
1013 | ldxa [%g3] 0x25, %g5; \ | |
1014 | mov 0x3d0, %g3; \ | |
1015 | stxa %g5, [%g3] 0x25; \ | |
1016 | retry; \ | |
1017 | nop; \ | |
1018 | nop; \ | |
1019 | nop | |
1020 | ||
1021 | #define H_HT0_Reserved_0x7e | |
1022 | #define SUN_H_HT0_Reserved_0x7e \ | |
1023 | mov 0x3e8, %g3; \ | |
1024 | ldxa [%g3] 0x25, %g5; \ | |
1025 | mov 0x3e0, %g3; \ | |
1026 | stxa %g5, [%g3] 0x25; \ | |
1027 | retry; \ | |
1028 | nop; \ | |
1029 | nop; \ | |
1030 | nop | |
1031 | !!!!! Hstick-match trap handler | |
1032 | #define H_T0_Reserved_0x5e | |
1033 | #define My_T0_Reserved_0x5e \ | |
1034 | rdhpr %hintp, %g3; \ | |
1035 | wrhpr %g3, %g3, %hintp; \ | |
1036 | retry; \ | |
1037 | nop; \ | |
1038 | nop; \ | |
1039 | nop; \ | |
1040 | nop; \ | |
1041 | nop | |
1042 | ||
1043 | #define H_HT0_Hstick_Match_0x5e | |
1044 | #define My_HT0_Hstick_Match_0x5e \ | |
1045 | rdhpr %hintp, %g3; \ | |
1046 | wrhpr %g3, %g3, %hintp; \ | |
1047 | retry; \ | |
1048 | nop; \ | |
1049 | nop; \ | |
1050 | nop; \ | |
1051 | nop; \ | |
1052 | nop | |
1053 | ||
1054 | #define H_T0_Reserved_0x5e | |
1055 | #define My_T0_Reserved_0x5e \ | |
1056 | rdhpr %hintp, %g3; \ | |
1057 | wrhpr %g3, %g3, %hintp; \ | |
1058 | retry; \ | |
1059 | nop; \ | |
1060 | nop; \ | |
1061 | nop; \ | |
1062 | nop; \ | |
1063 | nop | |
1064 | ||
1065 | #define H_T1_Reserved_0x5e | |
1066 | #define My_T1_Reserved_0x5e \ | |
1067 | rdhpr %hintp, %g3; \ | |
1068 | wrhpr %g3, %g3, %hintp; \ | |
1069 | retry; \ | |
1070 | nop; \ | |
1071 | nop; \ | |
1072 | nop; \ | |
1073 | nop; \ | |
1074 | nop | |
1075 | !!!!! SW interuupt handlers | |
1076 | #define H_T0_Interrupt_Level_14_0x4e | |
1077 | #define My_T0_Interrupt_Level_14_0x4e \ | |
1078 | rd %softint, %g3; \ | |
1079 | sethi %hi(0x14000), %g3; \ | |
1080 | or %g3, 0x1, %g3; \ | |
1081 | wr %g3, %g0, %clear_softint; \ | |
1082 | retry; \ | |
1083 | nop; \ | |
1084 | nop; \ | |
1085 | nop | |
1086 | ||
1087 | #define H_T0_Interrupt_Level_1_0x41 | |
1088 | #define My_T0_Interrupt_Level_1_0x41 \ | |
1089 | rd %softint, %g3; \ | |
1090 | or %g0, 0x2, %g3; \ | |
1091 | wr %g3, %g0, %clear_softint; \ | |
1092 | retry; \ | |
1093 | nop; \ | |
1094 | nop; \ | |
1095 | nop; \ | |
1096 | nop | |
1097 | ||
1098 | #define H_T0_Interrupt_Level_2_0x42 | |
1099 | #define My_T0_Interrupt_Level_2_0x42 \ | |
1100 | rd %softint, %g3; \ | |
1101 | or %g0, 0x4, %g3; \ | |
1102 | wr %g3, %g0, %clear_softint; \ | |
1103 | retry; \ | |
1104 | nop; \ | |
1105 | nop; \ | |
1106 | nop; \ | |
1107 | nop | |
1108 | ||
1109 | #define H_T0_Interrupt_Level_3_0x43 | |
1110 | #define My_T0_Interrupt_Level_3_0x43 \ | |
1111 | rd %softint, %g3; \ | |
1112 | or %g0, 0x8, %g3; \ | |
1113 | wr %g3, %g0, %clear_softint; \ | |
1114 | retry; \ | |
1115 | nop; \ | |
1116 | nop; \ | |
1117 | nop; \ | |
1118 | nop | |
1119 | ||
1120 | #define H_T0_Interrupt_Level_4_0x44 | |
1121 | #define My_T0_Interrupt_Level_4_0x44 \ | |
1122 | rd %softint, %g3; \ | |
1123 | or %g0, 0x10, %g3; \ | |
1124 | wr %g3, %g0, %clear_softint; \ | |
1125 | retry; \ | |
1126 | nop; \ | |
1127 | nop; \ | |
1128 | nop; \ | |
1129 | nop | |
1130 | ||
1131 | #define H_T0_Interrupt_Level_5_0x45 | |
1132 | #define My_T0_Interrupt_Level_5_0x45 \ | |
1133 | rd %softint, %g3; \ | |
1134 | or %g0, 0x20, %g3; \ | |
1135 | wr %g3, %g0, %clear_softint; \ | |
1136 | retry; \ | |
1137 | nop; \ | |
1138 | nop; \ | |
1139 | nop; \ | |
1140 | nop | |
1141 | ||
1142 | #define H_T0_Interrupt_Level_6_0x46 | |
1143 | #define My_T0_Interrupt_Level_6_0x46 \ | |
1144 | rd %softint, %g3; \ | |
1145 | or %g0, 0x40, %g3; \ | |
1146 | wr %g3, %g0, %clear_softint; \ | |
1147 | retry; \ | |
1148 | nop; \ | |
1149 | nop; \ | |
1150 | nop; \ | |
1151 | nop | |
1152 | ||
1153 | #define H_T0_Interrupt_Level_7_0x47 | |
1154 | #define My_T0_Interrupt_Level_7_0x47 \ | |
1155 | rd %softint, %g3; \ | |
1156 | or %g0, 0x80, %g3; \ | |
1157 | wr %g3, %g0, %clear_softint; \ | |
1158 | retry; \ | |
1159 | nop; \ | |
1160 | nop; \ | |
1161 | nop; \ | |
1162 | nop | |
1163 | ||
1164 | #define H_T0_Interrupt_Level_8_0x48 | |
1165 | #define My_T0_Interrupt_Level_8_0x48 \ | |
1166 | rd %softint, %g3; \ | |
1167 | or %g0, 0x100, %g3; \ | |
1168 | wr %g3, %g0, %clear_softint; \ | |
1169 | retry; \ | |
1170 | nop; \ | |
1171 | nop; \ | |
1172 | nop; \ | |
1173 | nop | |
1174 | ||
1175 | #define H_T0_Interrupt_Level_9_0x49 | |
1176 | #define My_T0_Interrupt_Level_9_0x49 \ | |
1177 | rd %softint, %g3; \ | |
1178 | or %g0, 0x200, %g3; \ | |
1179 | wr %g3, %g0, %clear_softint; \ | |
1180 | retry; \ | |
1181 | nop; \ | |
1182 | nop; \ | |
1183 | nop; \ | |
1184 | nop | |
1185 | ||
1186 | #define H_T0_Interrupt_Level_10_0x4a | |
1187 | #define My_T0_Interrupt_Level_10_0x4a \ | |
1188 | rd %softint, %g3; \ | |
1189 | or %g0, 0x400, %g3; \ | |
1190 | wr %g3, %g0, %clear_softint; \ | |
1191 | retry; \ | |
1192 | nop; \ | |
1193 | nop; \ | |
1194 | nop; \ | |
1195 | nop | |
1196 | ||
1197 | #define H_T0_Interrupt_Level_11_0x4b | |
1198 | #define My_T0_Interrupt_Level_11_0x4b \ | |
1199 | rd %softint, %g3; \ | |
1200 | or %g0, 0x800, %g3; \ | |
1201 | wr %g3, %g0, %clear_softint; \ | |
1202 | retry; \ | |
1203 | nop; \ | |
1204 | nop; \ | |
1205 | nop; \ | |
1206 | nop | |
1207 | ||
1208 | #define H_T0_Interrupt_Level_12_0x4c | |
1209 | #define My_T0_Interrupt_Level_12_0x4c \ | |
1210 | rd %softint, %g3; \ | |
1211 | sethi %hi(0x1000), %g3; \ | |
1212 | wr %g3, %g0, %clear_softint; \ | |
1213 | retry; \ | |
1214 | nop; \ | |
1215 | nop; \ | |
1216 | nop; \ | |
1217 | nop | |
1218 | ||
1219 | #define H_T0_Interrupt_Level_13_0x4d | |
1220 | #define My_T0_Interrupt_Level_13_0x4d \ | |
1221 | rd %softint, %g3; \ | |
1222 | sethi %hi(0x2000), %g3; \ | |
1223 | wr %g3, %g0, %clear_softint; \ | |
1224 | retry; \ | |
1225 | nop; \ | |
1226 | nop; \ | |
1227 | nop; \ | |
1228 | nop | |
1229 | ||
1230 | #define H_T0_Interrupt_Level_15_0x4f | |
1231 | #define My_T0_Interrupt_Level_15_0x4f \ | |
1232 | sethi %hi(0x8000), %g3; \ | |
1233 | wr %g3, %g0, %clear_softint; \ | |
1234 | wr %g0, %g0, %pic;\ | |
1235 | sethi %hi(0x80040000), %g2;\ | |
1236 | rd %pcr, %g3;\ | |
1237 | andn %g3, %g2, %g3;\ | |
1238 | wr %g3, %g0, %pcr;\ | |
1239 | retry; | |
1240 | ||
1241 | ||
1242 | #define H_T1_Interrupt_Level_14_0x4e | |
1243 | #define My_T1_Interrupt_Level_14_0x4e \ | |
1244 | rd %softint, %g3; \ | |
1245 | sethi %hi(0x14000), %g3; \ | |
1246 | or %g3, 0x1, %g3; \ | |
1247 | wr %g3, %g0, %clear_softint; \ | |
1248 | retry; \ | |
1249 | nop; \ | |
1250 | nop; \ | |
1251 | nop | |
1252 | ||
1253 | #define H_T1_Interrupt_Level_1_0x41 | |
1254 | #define My_T1_Interrupt_Level_1_0x41 \ | |
1255 | rd %softint, %g3; \ | |
1256 | or %g0, 0x2, %g3; \ | |
1257 | wr %g3, %g0, %clear_softint; \ | |
1258 | retry; \ | |
1259 | nop; \ | |
1260 | nop; \ | |
1261 | nop; \ | |
1262 | nop | |
1263 | ||
1264 | #define H_T1_Interrupt_Level_2_0x42 | |
1265 | #define My_T1_Interrupt_Level_2_0x42 \ | |
1266 | rd %softint, %g3; \ | |
1267 | or %g0, 0x4, %g3; \ | |
1268 | wr %g3, %g0, %clear_softint; \ | |
1269 | retry; \ | |
1270 | nop; \ | |
1271 | nop; \ | |
1272 | nop; \ | |
1273 | nop | |
1274 | ||
1275 | #define H_T1_Interrupt_Level_3_0x43 | |
1276 | #define My_T1_Interrupt_Level_3_0x43 \ | |
1277 | rd %softint, %g3; \ | |
1278 | or %g0, 0x8, %g3; \ | |
1279 | wr %g3, %g0, %clear_softint; \ | |
1280 | retry; \ | |
1281 | nop; \ | |
1282 | nop; \ | |
1283 | nop; \ | |
1284 | nop | |
1285 | ||
1286 | #define H_T1_Interrupt_Level_4_0x44 | |
1287 | #define My_T1_Interrupt_Level_4_0x44 \ | |
1288 | rd %softint, %g3; \ | |
1289 | or %g0, 0x10, %g3; \ | |
1290 | wr %g3, %g0, %clear_softint; \ | |
1291 | retry; \ | |
1292 | nop; \ | |
1293 | nop; \ | |
1294 | nop; \ | |
1295 | nop | |
1296 | ||
1297 | #define H_T1_Interrupt_Level_5_0x45 | |
1298 | #define My_T1_Interrupt_Level_5_0x45 \ | |
1299 | rd %softint, %g3; \ | |
1300 | or %g0, 0x20, %g3; \ | |
1301 | wr %g3, %g0, %clear_softint; \ | |
1302 | retry; \ | |
1303 | nop; \ | |
1304 | nop; \ | |
1305 | nop; \ | |
1306 | nop | |
1307 | ||
1308 | #define H_T1_Interrupt_Level_6_0x46 | |
1309 | #define My_T1_Interrupt_Level_6_0x46 \ | |
1310 | rd %softint, %g3; \ | |
1311 | or %g0, 0x40, %g3; \ | |
1312 | wr %g3, %g0, %clear_softint; \ | |
1313 | retry; \ | |
1314 | nop; \ | |
1315 | nop; \ | |
1316 | nop; \ | |
1317 | nop | |
1318 | ||
1319 | #define H_T1_Interrupt_Level_7_0x47 | |
1320 | #define My_T1_Interrupt_Level_7_0x47 \ | |
1321 | rd %softint, %g3; \ | |
1322 | or %g0, 0x80, %g3; \ | |
1323 | wr %g3, %g0, %clear_softint; \ | |
1324 | retry; \ | |
1325 | nop; \ | |
1326 | nop; \ | |
1327 | nop; \ | |
1328 | nop | |
1329 | ||
1330 | #define H_T1_Interrupt_Level_8_0x48 | |
1331 | #define My_T1_Interrupt_Level_8_0x48 \ | |
1332 | rd %softint, %g3; \ | |
1333 | or %g0, 0x100, %g3; \ | |
1334 | wr %g3, %g0, %clear_softint; \ | |
1335 | retry; \ | |
1336 | nop; \ | |
1337 | nop; \ | |
1338 | nop; \ | |
1339 | nop | |
1340 | ||
1341 | #define H_T1_Interrupt_Level_9_0x49 | |
1342 | #define My_T1_Interrupt_Level_9_0x49 \ | |
1343 | rd %softint, %g3; \ | |
1344 | or %g0, 0x200, %g3; \ | |
1345 | wr %g3, %g0, %clear_softint; \ | |
1346 | retry; \ | |
1347 | nop; \ | |
1348 | nop; \ | |
1349 | nop; \ | |
1350 | nop | |
1351 | ||
1352 | #define H_T1_Interrupt_Level_10_0x4a | |
1353 | #define My_T1_Interrupt_Level_10_0x4a \ | |
1354 | rd %softint, %g3; \ | |
1355 | or %g0, 0x400, %g3; \ | |
1356 | wr %g3, %g0, %clear_softint; \ | |
1357 | retry; \ | |
1358 | nop; \ | |
1359 | nop; \ | |
1360 | nop; \ | |
1361 | nop | |
1362 | ||
1363 | #define H_T1_Interrupt_Level_11_0x4b | |
1364 | #define My_T1_Interrupt_Level_11_0x4b \ | |
1365 | rd %softint, %g3; \ | |
1366 | or %g0, 0x800, %g3; \ | |
1367 | wr %g3, %g0, %clear_softint; \ | |
1368 | retry; \ | |
1369 | nop; \ | |
1370 | nop; \ | |
1371 | nop; \ | |
1372 | nop | |
1373 | ||
1374 | #define H_T1_Interrupt_Level_12_0x4c | |
1375 | #define My_T1_Interrupt_Level_12_0x4c \ | |
1376 | rd %softint, %g3; \ | |
1377 | sethi %hi(0x1000), %g3; \ | |
1378 | wr %g3, %g0, %clear_softint; \ | |
1379 | retry; \ | |
1380 | nop; \ | |
1381 | nop; \ | |
1382 | nop; \ | |
1383 | nop | |
1384 | ||
1385 | #define H_T1_Interrupt_Level_13_0x4d | |
1386 | #define My_T1_Interrupt_Level_13_0x4d \ | |
1387 | rd %softint, %g3; \ | |
1388 | sethi %hi(0x2000), %g3; \ | |
1389 | wr %g3, %g0, %clear_softint; \ | |
1390 | retry; \ | |
1391 | nop; \ | |
1392 | nop; \ | |
1393 | nop; \ | |
1394 | nop | |
1395 | ||
1396 | #define H_T1_Interrupt_Level_15_0x4f | |
1397 | #define My_T1_Interrupt_Level_15_0x4f \ | |
1398 | sethi %hi(0x8000), %g3; \ | |
1399 | wr %g3, %g0, %clear_softint; \ | |
1400 | wr %g0, %g0, %pic;\ | |
1401 | sethi %hi(0x80040000), %g2;\ | |
1402 | rd %pcr, %g3;\ | |
1403 | andn %g3, %g2, %g3;\ | |
1404 | wr %g3, %g0, %pcr;\ | |
1405 | retry; | |
1406 | ||
1407 | ||
1408 | #define H_HT0_Interrupt_Level_14_0x4e | |
1409 | #define My_HT0_Interrupt_Level_14_0x4e \ | |
1410 | rd %softint, %g3; \ | |
1411 | sethi %hi(0x14000), %g3; \ | |
1412 | or %g3, 0x1, %g3; \ | |
1413 | wr %g3, %g0, %clear_softint; \ | |
1414 | retry; \ | |
1415 | nop; \ | |
1416 | nop; \ | |
1417 | nop | |
1418 | ||
1419 | #define H_HT0_Interrupt_Level_1_0x41 | |
1420 | #define My_HT0_Interrupt_Level_1_0x41 \ | |
1421 | rd %softint, %g3; \ | |
1422 | or %g0, 0x2, %g3; \ | |
1423 | wr %g3, %g0, %clear_softint; \ | |
1424 | retry; \ | |
1425 | nop; \ | |
1426 | nop; \ | |
1427 | nop; \ | |
1428 | nop | |
1429 | ||
1430 | #define H_HT0_Interrupt_Level_2_0x42 | |
1431 | #define My_HT0_Interrupt_Level_2_0x42 \ | |
1432 | rd %softint, %g3; \ | |
1433 | or %g0, 0x4, %g3; \ | |
1434 | wr %g3, %g0, %clear_softint; \ | |
1435 | retry; \ | |
1436 | nop; \ | |
1437 | nop; \ | |
1438 | nop; \ | |
1439 | nop | |
1440 | ||
1441 | #define H_HT0_Interrupt_Level_3_0x43 | |
1442 | #define My_HT0_Interrupt_Level_3_0x43 \ | |
1443 | rd %softint, %g3; \ | |
1444 | or %g0, 0x8, %g3; \ | |
1445 | wr %g3, %g0, %clear_softint; \ | |
1446 | retry; \ | |
1447 | nop; \ | |
1448 | nop; \ | |
1449 | nop; \ | |
1450 | nop | |
1451 | ||
1452 | #define H_HT0_Interrupt_Level_4_0x44 | |
1453 | #define My_HT0_Interrupt_Level_4_0x44 \ | |
1454 | rd %softint, %g3; \ | |
1455 | or %g0, 0x10, %g3; \ | |
1456 | wr %g3, %g0, %clear_softint; \ | |
1457 | retry; \ | |
1458 | nop; \ | |
1459 | nop; \ | |
1460 | nop; \ | |
1461 | nop | |
1462 | ||
1463 | #define H_HT0_Interrupt_Level_5_0x45 | |
1464 | #define My_HT0_Interrupt_Level_5_0x45 \ | |
1465 | rd %softint, %g3; \ | |
1466 | or %g0, 0x20, %g3; \ | |
1467 | wr %g3, %g0, %clear_softint; \ | |
1468 | retry; \ | |
1469 | nop; \ | |
1470 | nop; \ | |
1471 | nop; \ | |
1472 | nop | |
1473 | ||
1474 | #define H_HT0_Interrupt_Level_6_0x46 | |
1475 | #define My_HT0_Interrupt_Level_6_0x46 \ | |
1476 | rd %softint, %g3; \ | |
1477 | or %g0, 0x40, %g3; \ | |
1478 | wr %g3, %g0, %clear_softint; \ | |
1479 | retry; \ | |
1480 | nop; \ | |
1481 | nop; \ | |
1482 | nop; \ | |
1483 | nop | |
1484 | ||
1485 | #define H_HT0_Interrupt_Level_7_0x47 | |
1486 | #define My_HT0_Interrupt_Level_7_0x47 \ | |
1487 | rd %softint, %g3; \ | |
1488 | or %g0, 0x80, %g3; \ | |
1489 | wr %g3, %g0, %clear_softint; \ | |
1490 | retry; \ | |
1491 | nop; \ | |
1492 | nop; \ | |
1493 | nop; \ | |
1494 | nop | |
1495 | ||
1496 | #define H_HT0_Interrupt_Level_8_0x48 | |
1497 | #define My_HT0_Interrupt_Level_8_0x48 \ | |
1498 | rd %softint, %g3; \ | |
1499 | or %g0, 0x100, %g3; \ | |
1500 | wr %g3, %g0, %clear_softint; \ | |
1501 | retry; \ | |
1502 | nop; \ | |
1503 | nop; \ | |
1504 | nop; \ | |
1505 | nop | |
1506 | ||
1507 | #define H_HT0_Interrupt_Level_9_0x49 | |
1508 | #define My_HT0_Interrupt_Level_9_0x49 \ | |
1509 | rd %softint, %g3; \ | |
1510 | or %g0, 0x200, %g3; \ | |
1511 | wr %g3, %g0, %clear_softint; \ | |
1512 | retry; \ | |
1513 | nop; \ | |
1514 | nop; \ | |
1515 | nop; \ | |
1516 | nop | |
1517 | ||
1518 | #define H_HT0_Interrupt_Level_10_0x4a | |
1519 | #define My_HT0_Interrupt_Level_10_0x4a \ | |
1520 | rd %softint, %g3; \ | |
1521 | or %g0, 0x400, %g3; \ | |
1522 | wr %g3, %g0, %clear_softint; \ | |
1523 | retry; \ | |
1524 | nop; \ | |
1525 | nop; \ | |
1526 | nop; \ | |
1527 | nop | |
1528 | ||
1529 | #define H_HT0_Interrupt_Level_11_0x4b | |
1530 | #define My_HT0_Interrupt_Level_11_0x4b \ | |
1531 | rd %softint, %g3; \ | |
1532 | or %g0, 0x800, %g3; \ | |
1533 | wr %g3, %g0, %clear_softint; \ | |
1534 | retry; \ | |
1535 | nop; \ | |
1536 | nop; \ | |
1537 | nop; \ | |
1538 | nop | |
1539 | ||
1540 | #define H_HT0_Interrupt_Level_12_0x4c | |
1541 | #define My_HT0_Interrupt_Level_12_0x4c \ | |
1542 | rd %softint, %g3; \ | |
1543 | sethi %hi(0x1000), %g3; \ | |
1544 | wr %g3, %g0, %clear_softint; \ | |
1545 | retry; \ | |
1546 | nop; \ | |
1547 | nop; \ | |
1548 | nop; \ | |
1549 | nop | |
1550 | ||
1551 | #define H_HT0_Interrupt_Level_13_0x4d | |
1552 | #define My_HT0_Interrupt_Level_13_0x4d \ | |
1553 | rd %softint, %g3; \ | |
1554 | sethi %hi(0x2000), %g3; \ | |
1555 | wr %g3, %g0, %clear_softint; \ | |
1556 | retry; \ | |
1557 | nop; \ | |
1558 | nop; \ | |
1559 | nop; \ | |
1560 | nop | |
1561 | ||
1562 | #define H_HT0_Interrupt_Level_15_0x4f | |
1563 | #define My_HT0_Interrupt_Level_15_0x4f \ | |
1564 | sethi %hi(0x8000), %g3; \ | |
1565 | wr %g3, %g0, %clear_softint; \ | |
1566 | wr %g0, %g0, %pic;\ | |
1567 | sethi %hi(0x80040000), %g2;\ | |
1568 | rd %pcr, %g3;\ | |
1569 | andn %g3, %g2, %g3;\ | |
1570 | wr %g3, %g0, %pcr;\ | |
1571 | retry; | |
1572 | ||
1573 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
1574 | !# Steer towards main TBA on these errors .. | |
1575 | !# These are redefines ... | |
1576 | #undef SUN_H_HT0_DAE_nc_page_0x16 | |
1577 | #define SUN_H_HT0_DAE_nc_page_0x16 \ | |
1578 | best_set_reg(0x120000, %r1, %r2);\ | |
1579 | wrpr %r0, %r2, %tba; \ | |
1580 | done;nop | |
1581 | ||
1582 | #undef SUN_H_HT0_DAE_nfo_page_0x17 | |
1583 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ | |
1584 | best_set_reg(0x120000, %r1, %r2);\ | |
1585 | wrpr %r0, %r2, %tba; \ | |
1586 | done;nop | |
1587 | ||
1588 | #undef SUN_H_HT0_IAE_unauth_access_0x0b | |
1589 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
1590 | set resolve_bad_tte, %g3;\ | |
1591 | jmp %g3;\ | |
1592 | nop | |
1593 | ||
1594 | #undef My_HT0_IAE_privilege_violation_0x08 | |
1595 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
1596 | set resolve_bad_tte, %g3;\ | |
1597 | jmp %g3;\ | |
1598 | nop | |
1599 | ||
1600 | #define H_HT0_Instruction_address_range_0x0d | |
1601 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
1602 | rdpr %tpc, %g1;\ | |
1603 | rdpr %tnpc, %g2;\ | |
1604 | stw %g1, [%i7];\ | |
1605 | stw %g2, [%i7+4];\ | |
1606 | jmpl %r27+8, %r27;\ | |
1607 | fdivd %f0, %f4, %f4;\ | |
1608 | nop; | |
1609 | ||
1610 | #define H_HT0_Instruction_real_range_0x0e | |
1611 | #define SUN_H_HT0_Instruction_real_range_0x0e \ | |
1612 | rdpr %tpc, %g1;\ | |
1613 | rdpr %tnpc, %g2;\ | |
1614 | stw %g1, [%i7];\ | |
1615 | stw %g2, [%i7+4];\ | |
1616 | jmpl %r27+8, %r27;\ | |
1617 | fdivd %f0, %f4, %f4;\ | |
1618 | nop; | |
1619 | ||
1620 | #undef SUN_H_HT0_IAE_nfo_page_0x0c | |
1621 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ | |
1622 | set resolve_bad_tte, %g3;\ | |
1623 | jmp %g3;\ | |
1624 | nop | |
1625 | ||
1626 | #define H_HT0_Instruction_Invalid_TSB_Entry_0x2a | |
1627 | #define SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a \ | |
1628 | set restore_range_regs, %g3;\ | |
1629 | jmp %g3;\ | |
1630 | nop | |
1631 | ||
1632 | #define H_HT0_Data_Invalid_TSB_Entry_0x2b | |
1633 | #define SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b \ | |
1634 | set restore_range_regs, %g3;\ | |
1635 | jmp %g3;\ | |
1636 | nop | |
1637 | ||
1638 | #define H_T1_Reserved_0x00 | |
1639 | #define SUN_H_T1_Reserved_0x00 \ | |
1640 | nop;\ | |
1641 | jmpl %r27+8, %r0;\ | |
1642 | nop; | |
1643 | ||
1644 | #undef FAST_BOOT | |
1645 | #include "hboot.s" | |
1646 | ||
1647 | #ifndef MULTIPASS | |
1648 | #define MULTIPASS 0 | |
1649 | #endif | |
1650 | #define LOMEIN_TEXT_VA [0x]mpeval(MAIN_BASE_TEXT_VA&0xffffffff,16) | |
1651 | #define LOMEIN_DATA_VA [0x]mpeval(MAIN_BASE_DATA_VA&0xffffffff,16) | |
1652 | changequote([, ])dnl | |
1653 | SECTION .LOMEIN TEXT_VA=LOMEIN_TEXT_VA, DATA_VA=LOMEIN_DATA_VA | |
1654 | attr_text { | |
1655 | Name = .LOMEIN, | |
1656 | VA= LOMEIN_TEXT_VA, | |
1657 | RA= MAIN_BASE_TEXT_RA, | |
1658 | PA= ra2pa2(MAIN_BASE_TEXT_RA, 0), | |
1659 | part_0_ctx_nonzero_tsb_config_1, | |
1660 | part_0_ctx_zero_tsb_config_1, | |
1661 | TTE_G=1, TTE_Context=0x44, TTE_V=1, | |
1662 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1663 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, | |
1664 | tsbonly | |
1665 | } | |
1666 | attr_data { | |
1667 | Name = .LOMEIN, | |
1668 | VA= LOMEIN_DATA_VA, | |
1669 | RA= MAIN_BASE_DATA_RA, | |
1670 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), | |
1671 | part_0_ctx_nonzero_tsb_config_2, | |
1672 | part_0_ctx_zero_tsb_config_2 | |
1673 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1674 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1675 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1676 | tsbonly | |
1677 | } | |
1678 | attr_data { | |
1679 | Name = .LOMEIN, | |
1680 | VA= LOMEIN_DATA_VA, | |
1681 | RA= MAIN_BASE_DATA_RA, | |
1682 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), | |
1683 | part_0_ctx_nonzero_tsb_config_3, | |
1684 | part_0_ctx_zero_tsb_config_3 | |
1685 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1686 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1687 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1688 | tsbonly | |
1689 | } | |
1690 | .text | |
1691 | .align 0x100000 | |
1692 | nop | |
1693 | .data | |
1694 | .word 0x0 | |
1695 | ||
1696 | SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA | |
1697 | attr_text { | |
1698 | Name = .MAIN, | |
1699 | VA=MAIN_BASE_TEXT_VA, | |
1700 | RA= LOMEIN_TEXT_VA, | |
1701 | PA= LOMEIN_TEXT_VA, | |
1702 | part_0_ctx_nonzero_tsb_config_2, | |
1703 | part_0_ctx_zero_tsb_config_2, | |
1704 | TTE_G=1, TTE_Context=0x44, TTE_V=1, | |
1705 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1706 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, | |
1707 | } | |
1708 | ||
1709 | attr_data { | |
1710 | Name = .MAIN, | |
1711 | VA=MAIN_BASE_DATA_VA | |
1712 | RA= LOMEIN_DATA_VA, | |
1713 | PA= LOMEIN_DATA_VA, | |
1714 | part_0_ctx_nonzero_tsb_config_1, | |
1715 | part_0_ctx_zero_tsb_config_1 | |
1716 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1717 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1718 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1719 | } | |
1720 | ||
1721 | attr_data { | |
1722 | Name = .MAIN, | |
1723 | VA=MAIN_BASE_DATA_VA | |
1724 | RA= LOMEIN_DATA_VA, | |
1725 | PA= LOMEIN_DATA_VA, | |
1726 | part_0_ctx_nonzero_tsb_config_3, | |
1727 | part_0_ctx_zero_tsb_config_3 | |
1728 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1729 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1730 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1731 | tsbonly | |
1732 | } | |
1733 | ||
1734 | attr_text { | |
1735 | Name = .MAIN, | |
1736 | VA=MAIN_BASE_TEXT_VA, | |
1737 | hypervisor | |
1738 | } | |
1739 | ||
1740 | attr_data { | |
1741 | Name = .MAIN, | |
1742 | VA=MAIN_BASE_DATA_VA | |
1743 | hypervisor | |
1744 | } | |
1745 | changequote(`,')dnl' | |
1746 | ||
1747 | .text | |
1748 | .global main | |
1749 | main: | |
1750 | ||
1751 | ! Set up ld/st area per thread | |
1752 | ta T_CHANGE_HPRIV | |
1753 | ldxa [%g0]0x63, %o2 | |
1754 | and %o2, 0x7, %o1 | |
1755 | brnz %o1, init_start | |
1756 | mov 0xff, %r11 | |
1757 | lock_sync_thds: | |
1758 | set sync_thr_counter4, %r23 | |
1759 | #ifndef SPC | |
1760 | and %o2, 0x38, %o2 | |
1761 | add %o2,%r23,%r23 !Core's sync counter | |
1762 | #endif | |
1763 | st %r11, [%r23] !lock sync_thr_counter4 | |
1764 | add %r23, 64, %r23 | |
1765 | st %r11, [%r23] !lock sync_thr_counter5 | |
1766 | add %r23, 64, %r23 | |
1767 | st %r11, [%r23] !lock sync_thr_counter6 | |
1768 | init_start: | |
1769 | wrhpr %g0, 0x0, %hpstate ! ta T_CHANGE_NONHPRIV | |
1770 | umul %r9, 256, %r31 | |
1771 | setx user_data_start, %r1, %r3 | |
1772 | add %r31, %r3, %r31 | |
1773 | wr %r0, 0x4, %asi | |
1774 | ||
1775 | !Initializing integer registers | |
1776 | ldx [%r31+0], %r0 | |
1777 | ldx [%r31+8], %r1 | |
1778 | ldx [%r31+16], %r2 | |
1779 | ldx [%r31+24], %r3 | |
1780 | ldx [%r31+32], %r4 | |
1781 | ldx [%r31+40], %r5 | |
1782 | ldx [%r31+48], %r6 | |
1783 | ldx [%r31+56], %r7 | |
1784 | ldx [%r31+64], %r8 | |
1785 | ldx [%r31+72], %r9 | |
1786 | ldx [%r31+80], %r10 | |
1787 | ldx [%r31+88], %r11 | |
1788 | ldx [%r31+96], %r12 | |
1789 | ldx [%r31+104], %r13 | |
1790 | ldx [%r31+112], %r14 | |
1791 | mov %r31, %r15 | |
1792 | ldx [%r31+128], %r16 | |
1793 | ldx [%r31+136], %r17 | |
1794 | ldx [%r31+144], %r18 | |
1795 | ldx [%r31+152], %r19 | |
1796 | ldx [%r31+160], %r20 | |
1797 | ldx [%r31+168], %r21 | |
1798 | ldx [%r31+176], %r22 | |
1799 | ldx [%r31+184], %r23 | |
1800 | ldx [%r31+192], %r24 | |
1801 | ldx [%r31+200], %r25 | |
1802 | ldx [%r31+208], %r26 | |
1803 | ldx [%r31+216], %r27 | |
1804 | ldx [%r31+224], %r28 | |
1805 | ldx [%r31+232], %r29 | |
1806 | mov 0x35, %r14 | |
1807 | mov 0xb4, %r30 | |
1808 | save %r31, %r0, %r31 | |
1809 | ldx [%r31+0], %r0 | |
1810 | ldx [%r31+8], %r1 | |
1811 | ldx [%r31+16], %r2 | |
1812 | ldx [%r31+24], %r3 | |
1813 | ldx [%r31+32], %r4 | |
1814 | ldx [%r31+40], %r5 | |
1815 | ldx [%r31+48], %r6 | |
1816 | ldx [%r31+56], %r7 | |
1817 | ldx [%r31+64], %r8 | |
1818 | ldx [%r31+72], %r9 | |
1819 | ldx [%r31+80], %r10 | |
1820 | ldx [%r31+88], %r11 | |
1821 | ldx [%r31+96], %r12 | |
1822 | ldx [%r31+104], %r13 | |
1823 | ldx [%r31+112], %r14 | |
1824 | mov %r31, %r15 | |
1825 | ldx [%r31+128], %r16 | |
1826 | ldx [%r31+136], %r17 | |
1827 | ldx [%r31+144], %r18 | |
1828 | ldx [%r31+152], %r19 | |
1829 | ldx [%r31+160], %r20 | |
1830 | ldx [%r31+168], %r21 | |
1831 | ldx [%r31+176], %r22 | |
1832 | ldx [%r31+184], %r23 | |
1833 | ldx [%r31+192], %r24 | |
1834 | ldx [%r31+200], %r25 | |
1835 | ldx [%r31+208], %r26 | |
1836 | ldx [%r31+216], %r27 | |
1837 | ldx [%r31+224], %r28 | |
1838 | ldx [%r31+232], %r29 | |
1839 | mov 0x33, %r14 | |
1840 | mov 0xb3, %r30 | |
1841 | save %r31, %r0, %r31 | |
1842 | ldx [%r31+0], %r0 | |
1843 | ldx [%r31+8], %r1 | |
1844 | ldx [%r31+16], %r2 | |
1845 | ldx [%r31+24], %r3 | |
1846 | ldx [%r31+32], %r4 | |
1847 | ldx [%r31+40], %r5 | |
1848 | ldx [%r31+48], %r6 | |
1849 | ldx [%r31+56], %r7 | |
1850 | ldx [%r31+64], %r8 | |
1851 | ldx [%r31+72], %r9 | |
1852 | ldx [%r31+80], %r10 | |
1853 | ldx [%r31+88], %r11 | |
1854 | ldx [%r31+96], %r12 | |
1855 | ldx [%r31+104], %r13 | |
1856 | ldx [%r31+112], %r14 | |
1857 | mov %r31, %r15 | |
1858 | ldx [%r31+128], %r16 | |
1859 | ldx [%r31+136], %r17 | |
1860 | ldx [%r31+144], %r18 | |
1861 | ldx [%r31+152], %r19 | |
1862 | ldx [%r31+160], %r20 | |
1863 | ldx [%r31+168], %r21 | |
1864 | ldx [%r31+176], %r22 | |
1865 | ldx [%r31+184], %r23 | |
1866 | ldx [%r31+192], %r24 | |
1867 | ldx [%r31+200], %r25 | |
1868 | ldx [%r31+208], %r26 | |
1869 | ldx [%r31+216], %r27 | |
1870 | ldx [%r31+224], %r28 | |
1871 | ldx [%r31+232], %r29 | |
1872 | mov 0x33, %r14 | |
1873 | mov 0xb4, %r30 | |
1874 | save %r31, %r0, %r31 | |
1875 | ldx [%r31+0], %r0 | |
1876 | ldx [%r31+8], %r1 | |
1877 | ldx [%r31+16], %r2 | |
1878 | ldx [%r31+24], %r3 | |
1879 | ldx [%r31+32], %r4 | |
1880 | ldx [%r31+40], %r5 | |
1881 | ldx [%r31+48], %r6 | |
1882 | ldx [%r31+56], %r7 | |
1883 | ldx [%r31+64], %r8 | |
1884 | ldx [%r31+72], %r9 | |
1885 | ldx [%r31+80], %r10 | |
1886 | ldx [%r31+88], %r11 | |
1887 | ldx [%r31+96], %r12 | |
1888 | ldx [%r31+104], %r13 | |
1889 | ldx [%r31+112], %r14 | |
1890 | mov %r31, %r15 | |
1891 | ldx [%r31+128], %r16 | |
1892 | ldx [%r31+136], %r17 | |
1893 | ldx [%r31+144], %r18 | |
1894 | ldx [%r31+152], %r19 | |
1895 | ldx [%r31+160], %r20 | |
1896 | ldx [%r31+168], %r21 | |
1897 | ldx [%r31+176], %r22 | |
1898 | ldx [%r31+184], %r23 | |
1899 | ldx [%r31+192], %r24 | |
1900 | ldx [%r31+200], %r25 | |
1901 | ldx [%r31+208], %r26 | |
1902 | ldx [%r31+216], %r27 | |
1903 | ldx [%r31+224], %r28 | |
1904 | ldx [%r31+232], %r29 | |
1905 | mov 0x30, %r14 | |
1906 | mov 0xb3, %r30 | |
1907 | save %r31, %r0, %r31 | |
1908 | ldx [%r31+0], %r0 | |
1909 | ldx [%r31+8], %r1 | |
1910 | ldx [%r31+16], %r2 | |
1911 | ldx [%r31+24], %r3 | |
1912 | ldx [%r31+32], %r4 | |
1913 | ldx [%r31+40], %r5 | |
1914 | ldx [%r31+48], %r6 | |
1915 | ldx [%r31+56], %r7 | |
1916 | ldx [%r31+64], %r8 | |
1917 | ldx [%r31+72], %r9 | |
1918 | ldx [%r31+80], %r10 | |
1919 | ldx [%r31+88], %r11 | |
1920 | ldx [%r31+96], %r12 | |
1921 | ldx [%r31+104], %r13 | |
1922 | ldx [%r31+112], %r14 | |
1923 | mov %r31, %r15 | |
1924 | ldx [%r31+128], %r16 | |
1925 | ldx [%r31+136], %r17 | |
1926 | ldx [%r31+144], %r18 | |
1927 | ldx [%r31+152], %r19 | |
1928 | ldx [%r31+160], %r20 | |
1929 | ldx [%r31+168], %r21 | |
1930 | ldx [%r31+176], %r22 | |
1931 | ldx [%r31+184], %r23 | |
1932 | ldx [%r31+192], %r24 | |
1933 | ldx [%r31+200], %r25 | |
1934 | ldx [%r31+208], %r26 | |
1935 | ldx [%r31+216], %r27 | |
1936 | ldx [%r31+224], %r28 | |
1937 | ldx [%r31+232], %r29 | |
1938 | mov 0x35, %r14 | |
1939 | mov 0xb4, %r30 | |
1940 | save %r31, %r0, %r31 | |
1941 | ldx [%r31+0], %r0 | |
1942 | ldx [%r31+8], %r1 | |
1943 | ldx [%r31+16], %r2 | |
1944 | ldx [%r31+24], %r3 | |
1945 | ldx [%r31+32], %r4 | |
1946 | ldx [%r31+40], %r5 | |
1947 | ldx [%r31+48], %r6 | |
1948 | ldx [%r31+56], %r7 | |
1949 | ldx [%r31+64], %r8 | |
1950 | ldx [%r31+72], %r9 | |
1951 | ldx [%r31+80], %r10 | |
1952 | ldx [%r31+88], %r11 | |
1953 | ldx [%r31+96], %r12 | |
1954 | ldx [%r31+104], %r13 | |
1955 | ldx [%r31+112], %r14 | |
1956 | mov %r31, %r15 | |
1957 | ldx [%r31+128], %r16 | |
1958 | ldx [%r31+136], %r17 | |
1959 | ldx [%r31+144], %r18 | |
1960 | ldx [%r31+152], %r19 | |
1961 | ldx [%r31+160], %r20 | |
1962 | ldx [%r31+168], %r21 | |
1963 | ldx [%r31+176], %r22 | |
1964 | ldx [%r31+184], %r23 | |
1965 | ldx [%r31+192], %r24 | |
1966 | ldx [%r31+200], %r25 | |
1967 | ldx [%r31+208], %r26 | |
1968 | ldx [%r31+216], %r27 | |
1969 | ldx [%r31+224], %r28 | |
1970 | ldx [%r31+232], %r29 | |
1971 | mov 0x35, %r14 | |
1972 | mov 0x31, %r30 | |
1973 | save %r31, %r0, %r31 | |
1974 | ldx [%r31+0], %r0 | |
1975 | ldx [%r31+8], %r1 | |
1976 | ldx [%r31+16], %r2 | |
1977 | ldx [%r31+24], %r3 | |
1978 | ldx [%r31+32], %r4 | |
1979 | ldx [%r31+40], %r5 | |
1980 | ldx [%r31+48], %r6 | |
1981 | ldx [%r31+56], %r7 | |
1982 | ldx [%r31+64], %r8 | |
1983 | ldx [%r31+72], %r9 | |
1984 | ldx [%r31+80], %r10 | |
1985 | ldx [%r31+88], %r11 | |
1986 | ldx [%r31+96], %r12 | |
1987 | ldx [%r31+104], %r13 | |
1988 | ldx [%r31+112], %r14 | |
1989 | mov %r31, %r15 | |
1990 | ldx [%r31+128], %r16 | |
1991 | ldx [%r31+136], %r17 | |
1992 | ldx [%r31+144], %r18 | |
1993 | ldx [%r31+152], %r19 | |
1994 | ldx [%r31+160], %r20 | |
1995 | ldx [%r31+168], %r21 | |
1996 | ldx [%r31+176], %r22 | |
1997 | ldx [%r31+184], %r23 | |
1998 | ldx [%r31+192], %r24 | |
1999 | ldx [%r31+200], %r25 | |
2000 | ldx [%r31+208], %r26 | |
2001 | ldx [%r31+216], %r27 | |
2002 | ldx [%r31+224], %r28 | |
2003 | ldx [%r31+232], %r29 | |
2004 | mov 0x32, %r14 | |
2005 | mov 0xb5, %r30 | |
2006 | save %r31, %r0, %r31 | |
2007 | restore | |
2008 | restore | |
2009 | restore | |
2010 | !Initializing float registers | |
2011 | ldd [%r31+0], %f0 | |
2012 | ldd [%r31+16], %f2 | |
2013 | ldd [%r31+32], %f4 | |
2014 | ldd [%r31+48], %f6 | |
2015 | ldd [%r31+64], %f8 | |
2016 | ldd [%r31+80], %f10 | |
2017 | ldd [%r31+96], %f12 | |
2018 | ldd [%r31+112], %f14 | |
2019 | ldd [%r31+128], %f16 | |
2020 | ldd [%r31+144], %f18 | |
2021 | ldd [%r31+160], %f20 | |
2022 | ldd [%r31+176], %f22 | |
2023 | ldd [%r31+192], %f24 | |
2024 | ldd [%r31+208], %f26 | |
2025 | ldd [%r31+224], %f28 | |
2026 | ldd [%r31+240], %f30 | |
2027 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. | |
2028 | ta T_CHANGE_HPRIV | |
2029 | setx diag_finish, %r29, %r28 | |
2030 | add %r28, 4, %r29 | |
2031 | wrpr %g0, 1, %tl | |
2032 | wrpr %r28, %tpc | |
2033 | wrpr %r29, %tnpc | |
2034 | wrpr %g0, 2, %tl | |
2035 | wrpr %r28, %tpc | |
2036 | wrpr %r29, %tnpc | |
2037 | wrpr %g0, 3, %tl | |
2038 | wrpr %r28, %tpc | |
2039 | wrpr %r29, %tnpc | |
2040 | wrpr %g0, 4, %tl | |
2041 | wrpr %r28, %tpc | |
2042 | wrpr %r29, %tnpc | |
2043 | wrpr %g0, 5, %tl | |
2044 | wrpr %r28, %tpc | |
2045 | wrpr %r29, %tnpc | |
2046 | wrpr %g0, 6, %tl | |
2047 | wrpr %r28, %tpc | |
2048 | wrpr %r29, %tnpc | |
2049 | wrpr %g0, 0, %tl | |
2050 | ||
2051 | !Initializing Tick Cmprs | |
2052 | mov 1, %g2 | |
2053 | sllx %g2, 63, %g2 | |
2054 | or %g1, %g2, %g1 | |
2055 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2056 | wr %g1, %g0, %tick_cmpr | |
2057 | wr %g1, %g0, %sys_tick_cmpr | |
2058 | ||
2059 | #if (MULTIPASS > 0) | |
2060 | mov 0x38, %g1 | |
2061 | stxa %r0, [%g1]ASI_SCRATCHPAD | |
2062 | #endif | |
2063 | ||
2064 | ! Set up fpr PMU traps | |
2065 | set 0x18d89bbe, %g2 | |
2066 | b fork_threads | |
2067 | wr %g2, %g0, %pcr | |
2068 | .align 128 | |
2069 | common_target: | |
2070 | nop | |
2071 | sub %r27, 8, %r27 | |
2072 | and %r27, 8, %r12 | |
2073 | mov HIGHVA_HIGHNUM, %r11 | |
2074 | sllx %r11, 32, %r11 | |
2075 | or %r27, %r11, %r27 | |
2076 | brz,a %r12, .+8 | |
2077 | lduw [%r27], %r12 ! load jmp dest into dcache - xinval | |
2078 | jmp %r27 | |
2079 | .word 0xd03fe1c8 ! 1: STD_I std %r8, [%r31 + 0x01c8] | |
2080 | nop | |
2081 | jmp %r27 | |
2082 | nop | |
2083 | fork_threads: | |
2084 | rd %tick, %r17 | |
2085 | mov 0x40, %g1 | |
2086 | setup_hwtw_config: | |
2087 | stxa %r17, [%g1]0x58 | |
2088 | ta %icc, T_RD_THID | |
2089 | ! fork: source strm = 0xffffffffffffffff; target strm = 0x1 | |
2090 | cmp %o1, 0 | |
2091 | setx fork_lbl_0_1, %g2, %g3 | |
2092 | be,a .+8 | |
2093 | jmp %g3 | |
2094 | nop | |
2095 | ! fork: source strm = 0xffffffffffffffff; target strm = 0x2 | |
2096 | cmp %o1, 1 | |
2097 | setx fork_lbl_0_2, %g2, %g3 | |
2098 | be,a .+8 | |
2099 | jmp %g3 | |
2100 | nop | |
2101 | ! fork: source strm = 0xffffffffffffffff; target strm = 0x4 | |
2102 | cmp %o1, 2 | |
2103 | setx fork_lbl_0_3, %g2, %g3 | |
2104 | be,a .+8 | |
2105 | jmp %g3 | |
2106 | nop | |
2107 | ! fork: source strm = 0xffffffffffffffff; target strm = 0x8 | |
2108 | cmp %o1, 3 | |
2109 | setx fork_lbl_0_4, %g2, %g3 | |
2110 | be,a .+8 | |
2111 | jmp %g3 | |
2112 | nop | |
2113 | ! fork: source strm = 0xffffffffffffffff; target strm = 0x10 | |
2114 | cmp %o1, 4 | |
2115 | setx fork_lbl_0_5, %g2, %g3 | |
2116 | be,a .+8 | |
2117 | jmp %g3 | |
2118 | nop | |
2119 | ! fork: source strm = 0xffffffffffffffff; target strm = 0x20 | |
2120 | cmp %o1, 5 | |
2121 | setx fork_lbl_0_6, %g2, %g3 | |
2122 | be,a .+8 | |
2123 | jmp %g3 | |
2124 | nop | |
2125 | ! fork: source strm = 0xffffffffffffffff; target strm = 0x40 | |
2126 | cmp %o1, 6 | |
2127 | setx fork_lbl_0_7, %g2, %g3 | |
2128 | be,a .+8 | |
2129 | jmp %g3 | |
2130 | nop | |
2131 | ! fork: source strm = 0xffffffffffffffff; target strm = 0x80 | |
2132 | cmp %o1, 7 | |
2133 | setx fork_lbl_0_8, %g2, %g3 | |
2134 | be,a .+8 | |
2135 | jmp %g3 | |
2136 | nop | |
2137 | .text | |
2138 | setx join_lbl_0_0, %g1, %g2 | |
2139 | jmp %g2 | |
2140 | nop | |
2141 | .text | |
2142 | setx join_lbl_0_0, %g1, %g2 | |
2143 | jmp %g2 | |
2144 | nop | |
2145 | fork_lbl_0_8: | |
2146 | .word 0x20800001 ! 2: BN bn,a <label_0x1> | |
2147 | .word 0xd1e7c543 ! 3: CASA_I casa [%r31] 0x2a, %r3, %r8 | |
2148 | .word 0xd13fe050 ! 4: STDF_I std %f8, [0x0050, %r31] | |
2149 | .word 0x20800001 ! 5: BN bn,a <label_0x1> | |
2150 | .word 0x9f802020 ! 5: SIR sir 0x0020 | |
2151 | #if (defined SPC || defined CMP1) | |
2152 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_2) + 56, 16, 16)) -> intp(1,0,6,,,,,1) | |
2153 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_2)&0xffffffff) + 8, 16, 16)) -> intp(5,0,0,,,,,1) | |
2154 | #else | |
2155 | set 0x8a704c75, %r28 | |
2156 | #if (MAX_THREADS == 8) | |
2157 | and %r28, 0x7ff, %r28 | |
2158 | #endif | |
2159 | stxa %r28, [%g0] 0x73 | |
2160 | #endif | |
2161 | .word 0x9f802e12 ! 1: SIR sir 0x0e12 | |
2162 | intvec_80_2: | |
2163 | rd %tick, %r28 | |
2164 | #if (MAX_THREADS == 8) | |
2165 | sethi %hi(0x33800), %r27 | |
2166 | #else | |
2167 | sethi %hi(0x30000), %r27 | |
2168 | #endif | |
2169 | andn %r28, %r27, %r28 | |
2170 | ta T_CHANGE_HPRIV | |
2171 | stxa %r28, [%g0] 0x73 | |
2172 | .word 0x9f802775 ! 1: SIR sir 0x0775 | |
2173 | intvec_80_3: | |
2174 | .word 0x93a489c8 ! 6: FDIVd fdivd %f18, %f8, %f40 | |
2175 | .word 0x20800001 ! 7: BN bn,a <label_0x1> | |
2176 | .word 0x9f802d82 ! 8: SIR sir 0x0d82 | |
2177 | .word 0x19400001 ! 9: FBPUGE fbuge | |
2178 | .word 0xe19fd920 ! 9: LDDFA_R ldda [%r31, %r0], %f16 | |
2179 | memptr_80_5: | |
2180 | set 0x60540000, %r31 | |
2181 | .word 0xd297c2c0 ! 10: LDUHA_R lduha [%r31, %r0] 0x16, %r9 | |
2182 | .word 0x8584e257 ! 11: WRCCR_I wr %r19, 0x0257, %ccr | |
2183 | .word 0xe1bfde00 ! 12: STDFA_R stda %f16, [%r0, %r31] | |
2184 | .word 0xd29fc401 ! 13: LDDA_R ldda [%r31, %r1] 0x20, %r9 | |
2185 | .word 0x00800001 ! 13: BN bn <label_0x1> | |
2186 | memptr_80_6: | |
2187 | set user_data_start, %r31 | |
2188 | .word 0xc1bfc2c0 ! 14: STDFA_R stda %f0, [%r0, %r31] | |
2189 | .word 0x8584fbff ! 15: WRCCR_I wr %r19, 0x1bff, %ccr | |
2190 | .word 0xe19fc2c0 ! 16: LDDFA_R ldda [%r31, %r0], %f16 | |
2191 | .word 0xe19fc3e0 ! 17: LDDFA_R ldda [%r31, %r0], %f16 | |
2192 | .word 0xc19fdc00 ! 17: LDDFA_R ldda [%r31, %r0], %f0 | |
2193 | memptr_80_8: | |
2194 | set 0x60540000, %r31 | |
2195 | rd %tick, %r28 | |
2196 | #if (MAX_THREADS == 8) | |
2197 | sethi %hi(0x33800), %r27 | |
2198 | #else | |
2199 | sethi %hi(0x30000), %r27 | |
2200 | #endif | |
2201 | andn %r28, %r27, %r28 | |
2202 | ta T_CHANGE_HPRIV | |
2203 | stxa %r28, [%g0] 0x73 | |
2204 | .word 0x95a489ca ! 1: FDIVd fdivd %f18, %f10, %f10 | |
2205 | intvec_80_9: | |
2206 | .word 0xe697d920 ! 18: LDUHA_R lduha [%r31, %r0] 0xc9, %r19 | |
2207 | .word 0x8580772c ! 19: WRCCR_I wr %r1, 0x172c, %ccr | |
2208 | .word 0x91b404c7 ! 20: FCMPNE32 fcmpne32 %d16, %d38, %r8 | |
2209 | .word 0xd1e7d042 ! 21: CASA_I casa [%r31] 0x82, %r2, %r8 | |
2210 | .word 0x85852cae ! 21: WRCCR_I wr %r20, 0x0cae, %ccr | |
2211 | rd %tick, %r28 | |
2212 | #if (MAX_THREADS == 8) | |
2213 | sethi %hi(0x33800), %r27 | |
2214 | #else | |
2215 | sethi %hi(0x30000), %r27 | |
2216 | #endif | |
2217 | andn %r28, %r27, %r28 | |
2218 | ta T_CHANGE_HPRIV | |
2219 | stxa %r28, [%g0] 0x73 | |
2220 | intvec_80_11: | |
2221 | #if (defined SPC || defined CMP1) | |
2222 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_12) + 0, 16, 16)) -> intp(2,0,9,,,,,1) | |
2223 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_12)&0xffffffff) + 32, 16, 16)) -> intp(3,0,23,,,,,1) | |
2224 | #else | |
2225 | set 0x71b0c29d, %r28 | |
2226 | #if (MAX_THREADS == 8) | |
2227 | and %r28, 0x7ff, %r28 | |
2228 | #endif | |
2229 | stxa %r28, [%g0] 0x73 | |
2230 | #endif | |
2231 | intvec_80_12: | |
2232 | .word 0x9f803649 ! 22: SIR sir 0x1649 | |
2233 | .word 0xc1bfdc00 ! 23: STDFA_R stda %f0, [%r0, %r31] | |
2234 | .word 0xa1a449c4 ! 24: FDIVd fdivd %f48, %f4, %f16 | |
2235 | .word 0xa9a309d1 ! 25: FDIVd fdivd %f12, %f48, %f20 | |
2236 | .word 0xe19fd960 ! 25: LDDFA_R ldda [%r31, %r0], %f16 | |
2237 | memptr_80_14: | |
2238 | set 0x60540000, %r31 | |
2239 | rd %tick, %r28 | |
2240 | #if (MAX_THREADS == 8) | |
2241 | sethi %hi(0x33800), %r27 | |
2242 | #else | |
2243 | sethi %hi(0x30000), %r27 | |
2244 | #endif | |
2245 | andn %r28, %r27, %r28 | |
2246 | ta T_CHANGE_HPRIV | |
2247 | stxa %r28, [%g0] 0x73 | |
2248 | intvec_80_15: | |
2249 | .word 0xe69fc603 ! 26: LDDA_R ldda [%r31, %r3] 0x30, %r19 | |
2250 | .word 0x858422b1 ! 27: WRCCR_I wr %r16, 0x02b1, %ccr | |
2251 | .word 0xa3a409d2 ! 28: FDIVd fdivd %f16, %f18, %f48 | |
2252 | .word 0x9f802170 ! 29: SIR sir 0x0170 | |
2253 | .word 0x8583274a ! 29: WRCCR_I wr %r12, 0x074a, %ccr | |
2254 | .word 0xc19fc3e0 ! 30: LDDFA_R ldda [%r31, %r0], %f0 | |
2255 | .word 0xe1bfda00 ! 31: STDFA_R stda %f16, [%r0, %r31] | |
2256 | .word 0x20800001 ! 32: BN bn,a <label_0x1> | |
2257 | .word 0xe1bfc3e0 ! 33: STDFA_R stda %f16, [%r0, %r31] | |
2258 | .word 0xe1bfdf20 ! 33: STDFA_R stda %f16, [%r0, %r31] | |
2259 | .word 0xc3efe080 ! 34: PREFETCHA_I prefetcha [%r31, + 0x0080] %asi, #one_read | |
2260 | .word 0xe7e7c282 ! 35: CASA_I casa [%r31] 0x14, %r2, %r19 | |
2261 | .word 0x20800001 ! 36: BN bn,a <label_0x1> | |
2262 | .word 0xc3efe0a0 ! 37: PREFETCHA_I prefetcha [%r31, + 0x00a0] %asi, #one_read | |
2263 | .word 0xc19fc3e0 ! 37: LDDFA_R ldda [%r31, %r0], %f0 | |
2264 | rd %tick, %r28 | |
2265 | #if (MAX_THREADS == 8) | |
2266 | sethi %hi(0x33800), %r27 | |
2267 | #else | |
2268 | sethi %hi(0x30000), %r27 | |
2269 | #endif | |
2270 | andn %r28, %r27, %r28 | |
2271 | ta T_CHANGE_HPRIV | |
2272 | stxa %r28, [%g0] 0x73 | |
2273 | intvec_80_19: | |
2274 | memptr_80_20: | |
2275 | set 0x60540000, %r31 | |
2276 | .word 0xa7a089d4 ! 38: FDIVd fdivd %f2, %f20, %f50 | |
2277 | .word 0x858473cc ! 39: WRCCR_I wr %r17, 0x13cc, %ccr | |
2278 | .word 0xe33fe140 ! 40: STDF_I std %f17, [0x0140, %r31] | |
2279 | .word 0x9f8034f5 ! 41: SIR sir 0x14f5 | |
2280 | .word 0x85847feb ! 41: WRCCR_I wr %r17, 0x1feb, %ccr | |
2281 | #if (defined SPC || defined CMP1) | |
2282 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_22) + 0, 16, 16)) -> intp(1,0,21,,,,,1) | |
2283 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_22)&0xffffffff) + 40, 16, 16)) -> intp(0,0,22,,,,,1) | |
2284 | #else | |
2285 | set 0xa70f15e, %r28 | |
2286 | #if (MAX_THREADS == 8) | |
2287 | and %r28, 0x7ff, %r28 | |
2288 | #endif | |
2289 | stxa %r28, [%g0] 0x73 | |
2290 | #endif | |
2291 | intvec_80_22: | |
2292 | .word 0xe1bfd920 ! 42: STDFA_R stda %f16, [%r0, %r31] | |
2293 | .word 0x87afca40 ! 43: FCMPd fcmpd %fcc<n>, %f62, %f0 | |
2294 | .word 0x39400001 ! 44: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2295 | .word 0xe19fd920 ! 45: LDDFA_R ldda [%r31, %r0], %f16 | |
2296 | .word 0xa3b304d0 ! 45: FCMPNE32 fcmpne32 %d12, %d16, %r17 | |
2297 | .word 0xe1bfc2c0 ! 46: STDFA_R stda %f16, [%r0, %r31] | |
2298 | .word 0xc19fde00 ! 47: LDDFA_R ldda [%r31, %r0], %f0 | |
2299 | .word 0x9f802110 ! 48: SIR sir 0x0110 | |
2300 | .word 0xc19fdc00 ! 49: LDDFA_R ldda [%r31, %r0], %f0 | |
2301 | .word 0xe897c403 ! 49: LDUHA_R lduha [%r31, %r3] 0x20, %r20 | |
2302 | .word 0xe897c2e0 ! 50: LDUHA_R lduha [%r31, %r0] 0x17, %r20 | |
2303 | .word 0xc19fd920 ! 51: LDDFA_R ldda [%r31, %r0], %f0 | |
2304 | .word 0x9f8021f0 ! 52: SIR sir 0x01f0 | |
2305 | .word 0xe897c722 ! 53: LDUHA_R lduha [%r31, %r2] 0x39, %r20 | |
2306 | .word 0x20800001 ! 53: BN bn,a <label_0x1> | |
2307 | #if (defined SPC || defined CMP1) | |
2308 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_26) + 16, 16, 16)) -> intp(1,0,8,,,,,1) | |
2309 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_26)&0xffffffff) + 40, 16, 16)) -> intp(5,0,16,,,,,1) | |
2310 | #else | |
2311 | set 0x97e07ccf, %r28 | |
2312 | #if (MAX_THREADS == 8) | |
2313 | and %r28, 0x7ff, %r28 | |
2314 | #endif | |
2315 | stxa %r28, [%g0] 0x73 | |
2316 | #endif | |
2317 | .word 0xa1b504c7 ! 1: FCMPNE32 fcmpne32 %d20, %d38, %r16 | |
2318 | intvec_80_26: | |
2319 | .word 0xc3efe0f0 ! 54: PREFETCHA_I prefetcha [%r31, + 0x00f0] %asi, #one_read | |
2320 | .word 0x87afca41 ! 55: FCMPd fcmpd %fcc<n>, %f62, %f32 | |
2321 | .word 0x39400001 ! 56: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2322 | .word 0xd497d103 ! 57: LDUHA_R lduha [%r31, %r3] 0x88, %r10 | |
2323 | .word 0xa9a149c5 ! 57: FDIVd fdivd %f36, %f36, %f20 | |
2324 | #if (defined SPC || defined CMP1) | |
2325 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_28) + 40, 16, 16)) -> intp(1,0,26,,,,,1) | |
2326 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_28)&0xffffffff) + 0, 16, 16)) -> intp(0,0,10,,,,,1) | |
2327 | #else | |
2328 | set 0x1c60a613, %r28 | |
2329 | #if (MAX_THREADS == 8) | |
2330 | and %r28, 0x7ff, %r28 | |
2331 | #endif | |
2332 | stxa %r28, [%g0] 0x73 | |
2333 | #endif | |
2334 | intvec_80_28: | |
2335 | memptr_80_29: | |
2336 | set 0x60740000, %r31 | |
2337 | #if (defined SPC || defined CMP1) | |
2338 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_30) + 24, 16, 16)) -> intp(7,0,22,,,,,1) | |
2339 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_30)&0xffffffff) + 0, 16, 16)) -> intp(6,0,22,,,,,1) | |
2340 | #else | |
2341 | set 0xda9059c3, %r28 | |
2342 | #if (MAX_THREADS == 8) | |
2343 | and %r28, 0x7ff, %r28 | |
2344 | #endif | |
2345 | stxa %r28, [%g0] 0x73 | |
2346 | #endif | |
2347 | .word 0x93a409c4 ! 1: FDIVd fdivd %f16, %f4, %f40 | |
2348 | intvec_80_30: | |
2349 | .word 0x9ba4c9d2 ! 58: FDIVd fdivd %f50, %f18, %f44 | |
2350 | .word 0x858524f9 ! 59: WRCCR_I wr %r20, 0x04f9, %ccr | |
2351 | .word 0x9f8038bb ! 60: SIR sir 0x18bb | |
2352 | .word 0x39400001 ! 61: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2353 | .word 0x85836139 ! 61: WRCCR_I wr %r13, 0x0139, %ccr | |
2354 | rd %tick, %r28 | |
2355 | #if (MAX_THREADS == 8) | |
2356 | sethi %hi(0x33800), %r27 | |
2357 | #else | |
2358 | sethi %hi(0x30000), %r27 | |
2359 | #endif | |
2360 | andn %r28, %r27, %r28 | |
2361 | ta T_CHANGE_HPRIV | |
2362 | stxa %r28, [%g0] 0x73 | |
2363 | .word 0x91a409d3 ! 1: FDIVd fdivd %f16, %f50, %f8 | |
2364 | intvec_80_31: | |
2365 | .word 0xa5a509d1 ! 62: FDIVd fdivd %f20, %f48, %f18 | |
2366 | .word 0xa5b7c4c0 ! 63: FCMPNE32 fcmpne32 %d62, %d0, %r18 | |
2367 | .word 0x20800001 ! 64: BN bn,a <label_0x1> | |
2368 | .word 0x39400001 ! 65: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2369 | .word 0xe9e7e001 ! 65: CASA_R casa [%r31] %asi, %r1, %r20 | |
2370 | memptr_80_33: | |
2371 | set user_data_start, %r31 | |
2372 | #if (defined SPC || defined CMP1) | |
2373 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_34) + 40, 16, 16)) -> intp(5,0,4,,,,,1) | |
2374 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_34)&0xffffffff) + 48, 16, 16)) -> intp(5,0,22,,,,,1) | |
2375 | #else | |
2376 | set 0xebf05f6c, %r28 | |
2377 | #if (MAX_THREADS == 8) | |
2378 | and %r28, 0x7ff, %r28 | |
2379 | #endif | |
2380 | stxa %r28, [%g0] 0x73 | |
2381 | #endif | |
2382 | intvec_80_34: | |
2383 | .word 0xe81fe110 ! 66: LDD_I ldd [%r31 + 0x0110], %r20 | |
2384 | .word 0x8584326a ! 67: WRCCR_I wr %r16, 0x126a, %ccr | |
2385 | .word 0x9f803d8d ! 68: SIR sir 0x1d8d | |
2386 | .word 0xe89fc542 ! 69: LDDA_R ldda [%r31, %r2] 0x2a, %r20 | |
2387 | .word 0x9f803120 ! 69: SIR sir 0x1120 | |
2388 | #if (defined SPC || defined CMP1) | |
2389 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_36) + 40, 16, 16)) -> intp(0,0,20,,,,,1) | |
2390 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_36)&0xffffffff) + 48, 16, 16)) -> intp(2,0,21,,,,,1) | |
2391 | #else | |
2392 | set 0xf1904b68, %r28 | |
2393 | #if (MAX_THREADS == 8) | |
2394 | and %r28, 0x7ff, %r28 | |
2395 | #endif | |
2396 | stxa %r28, [%g0] 0x73 | |
2397 | #endif | |
2398 | intvec_80_36: | |
2399 | .word 0x9f8021cd ! 70: SIR sir 0x01cd | |
2400 | .word 0xc36fe0e0 ! 71: PREFETCH_I prefetch [%r31 + 0x00e0], #one_read | |
2401 | .word 0xd89fc6c2 ! 72: LDDA_R ldda [%r31, %r2] 0x36, %r12 | |
2402 | .word 0x95a2c9cc ! 73: FDIVd fdivd %f42, %f12, %f10 | |
2403 | .word 0x39400001 ! 73: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2404 | .word 0xc3efe090 ! 74: PREFETCHA_I prefetcha [%r31, + 0x0090] %asi, #one_read | |
2405 | .word 0xc36fe010 ! 75: PREFETCH_I prefetch [%r31 + 0x0010], #one_read | |
2406 | .word 0x20800001 ! 76: BN bn,a <label_0x1> | |
2407 | .word 0xe89fd061 ! 77: LDDA_R ldda [%r31, %r1] 0x83, %r20 | |
2408 | .word 0x20800001 ! 77: BN bn,a <label_0x1> | |
2409 | .word 0xe81fe0a0 ! 78: LDD_I ldd [%r31 + 0x00a0], %r20 | |
2410 | .word 0x24cfc001 ! 79: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
2411 | .word 0xe9e7dd43 ! 80: CASA_I casa [%r31] 0xea, %r3, %r20 | |
2412 | .word 0xe8dfc283 ! 81: LDXA_R ldxa [%r31, %r3] 0x14, %r20 | |
2413 | .word 0xe9e7e003 ! 81: CASA_R casa [%r31] %asi, %r3, %r20 | |
2414 | memptr_80_40: | |
2415 | set 0x60140000, %r31 | |
2416 | .word 0xd4dfdd40 ! 82: LDXA_R ldxa [%r31, %r0] 0xea, %r10 | |
2417 | .word 0x85833ab7 ! 83: WRCCR_I wr %r12, 0x1ab7, %ccr | |
2418 | .word 0xd41fe1d0 ! 84: LDD_I ldd [%r31 + 0x01d0], %r10 | |
2419 | .word 0xd41fe170 ! 85: LDD_I ldd [%r31 + 0x0170], %r10 | |
2420 | .word 0xd497c3c1 ! 85: LDUHA_R lduha [%r31, %r1] 0x1e, %r10 | |
2421 | .word 0x9f8020c0 ! 86: SIR sir 0x00c0 | |
2422 | .word 0x24cfc001 ! 87: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
2423 | .word 0xd497c282 ! 88: LDUHA_R lduha [%r31, %r2] 0x14, %r10 | |
2424 | .word 0xd41fe1b0 ! 89: LDD_I ldd [%r31 + 0x01b0], %r10 | |
2425 | .word 0x24cfc001 ! 89: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
2426 | .word 0xc19fdc00 ! 90: LDDFA_R ldda [%r31, %r0], %f0 | |
2427 | .word 0xe1bfd920 ! 91: STDFA_R stda %f16, [%r0, %r31] | |
2428 | .word 0x20800001 ! 92: BN bn,a <label_0x1> | |
2429 | .word 0xe19fda00 ! 93: LDDFA_R ldda [%r31, %r0], %f16 | |
2430 | .word 0xe19fdf20 ! 93: LDDFA_R ldda [%r31, %r0], %f16 | |
2431 | #if (defined SPC || defined CMP1) | |
2432 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_44) + 0, 16, 16)) -> intp(4,0,17,,,,,1) | |
2433 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_44)&0xffffffff) + 16, 16, 16)) -> intp(1,0,2,,,,,1) | |
2434 | #else | |
2435 | set 0x49607a8b, %r28 | |
2436 | #if (MAX_THREADS == 8) | |
2437 | and %r28, 0x7ff, %r28 | |
2438 | #endif | |
2439 | stxa %r28, [%g0] 0x73 | |
2440 | #endif | |
2441 | .word 0xa7a1c9c9 ! 1: FDIVd fdivd %f38, %f40, %f50 | |
2442 | intvec_80_44: | |
2443 | memptr_80_45: | |
2444 | set user_data_start, %r31 | |
2445 | #if (defined SPC || defined CMP1) | |
2446 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_46) + 32, 16, 16)) -> intp(7,0,23,,,,,1) | |
2447 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_46)&0xffffffff) + 32, 16, 16)) -> intp(2,0,10,,,,,1) | |
2448 | #else | |
2449 | set 0x5020acae, %r28 | |
2450 | #if (MAX_THREADS == 8) | |
2451 | and %r28, 0x7ff, %r28 | |
2452 | #endif | |
2453 | stxa %r28, [%g0] 0x73 | |
2454 | #endif | |
2455 | .word 0xa7b404d3 ! 1: FCMPNE32 fcmpne32 %d16, %d50, %r19 | |
2456 | intvec_80_46: | |
2457 | .word 0x9f803235 ! 94: SIR sir 0x1235 | |
2458 | .word 0x858521eb ! 95: WRCCR_I wr %r20, 0x01eb, %ccr | |
2459 | .word 0x93b444d1 ! 96: FCMPNE32 fcmpne32 %d48, %d48, %r9 | |
2460 | .word 0x39400001 ! 97: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2461 | .word 0x8584aacb ! 97: WRCCR_I wr %r18, 0x0acb, %ccr | |
2462 | rd %tick, %r28 | |
2463 | #if (MAX_THREADS == 8) | |
2464 | sethi %hi(0x33800), %r27 | |
2465 | #else | |
2466 | sethi %hi(0x30000), %r27 | |
2467 | #endif | |
2468 | andn %r28, %r27, %r28 | |
2469 | ta T_CHANGE_HPRIV | |
2470 | stxa %r28, [%g0] 0x73 | |
2471 | intvec_80_47: | |
2472 | .word 0x39400001 ! 98: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2473 | .word 0xc19fc3e0 ! 99: LDDFA_R ldda [%r31, %r0], %f0 | |
2474 | .word 0xe1bfc3e0 ! 100: STDFA_R stda %f16, [%r0, %r31] | |
2475 | .word 0x9f803909 ! 101: SIR sir 0x1909 | |
2476 | .word 0xe19fda00 ! 101: LDDFA_R ldda [%r31, %r0], %f16 | |
2477 | .word 0xc32fe040 ! 102: STXFSR_I st-sfr %f1, [0x0040, %r31] | |
2478 | .word 0x87afca40 ! 103: FCMPd fcmpd %fcc<n>, %f62, %f0 | |
2479 | .word 0xe19fdf20 ! 104: LDDFA_R ldda [%r31, %r0], %f16 | |
2480 | .word 0xc32fe040 ! 105: STXFSR_I st-sfr %f1, [0x0040, %r31] | |
2481 | .word 0x20800001 ! 105: BN bn,a <label_0x1> | |
2482 | .word 0x20800001 ! 106: BN bn,a <label_0x1> | |
2483 | .word 0xe5e7e000 ! 107: CASA_R casa [%r31] %asi, %r0, %r18 | |
2484 | .word 0xe19fda00 ! 108: LDDFA_R ldda [%r31, %r0], %f16 | |
2485 | .word 0xe19fd960 ! 109: LDDFA_R ldda [%r31, %r0], %f16 | |
2486 | .word 0xe5e7e002 ! 109: CASA_R casa [%r31] %asi, %r2, %r18 | |
2487 | rd %tick, %r28 | |
2488 | #if (MAX_THREADS == 8) | |
2489 | sethi %hi(0x33800), %r27 | |
2490 | #else | |
2491 | sethi %hi(0x30000), %r27 | |
2492 | #endif | |
2493 | andn %r28, %r27, %r28 | |
2494 | ta T_CHANGE_HPRIV | |
2495 | stxa %r28, [%g0] 0x73 | |
2496 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2497 | intvec_80_51: | |
2498 | .word 0x95b484cc ! 110: FCMPNE32 fcmpne32 %d18, %d12, %r10 | |
2499 | .word 0x20800001 ! 111: BN bn,a <label_0x1> | |
2500 | .word 0xc3efe0b0 ! 112: PREFETCHA_I prefetcha [%r31, + 0x00b0] %asi, #one_read | |
2501 | .word 0x39400001 ! 113: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2502 | .word 0xc1bfc2c0 ! 113: STDFA_R stda %f0, [%r0, %r31] | |
2503 | .word 0x9f802180 ! 114: SIR sir 0x0180 | |
2504 | .word 0x91b7c4c1 ! 115: FCMPNE32 fcmpne32 %d62, %d32, %r8 | |
2505 | .word 0xe1bfda00 ! 116: STDFA_R stda %f16, [%r0, %r31] | |
2506 | .word 0xd13fe080 ! 117: STDF_I std %f8, [0x0080, %r31] | |
2507 | .word 0xd03fe060 ! 117: STD_I std %r8, [%r31 + 0x0060] | |
2508 | memptr_80_54: | |
2509 | set user_data_start, %r31 | |
2510 | rd %tick, %r28 | |
2511 | #if (MAX_THREADS == 8) | |
2512 | sethi %hi(0x33800), %r27 | |
2513 | #else | |
2514 | sethi %hi(0x30000), %r27 | |
2515 | #endif | |
2516 | andn %r28, %r27, %r28 | |
2517 | ta T_CHANGE_HPRIV | |
2518 | stxa %r28, [%g0] 0x73 | |
2519 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2520 | intvec_80_55: | |
2521 | .word 0xd91fe0b0 ! 118: LDDF_I ldd [%r31, 0x00b0], %f12 | |
2522 | .word 0x8580eb48 ! 119: WRCCR_I wr %r3, 0x0b48, %ccr | |
2523 | .word 0x19400001 ! 120: FBPUGE fbuge | |
2524 | .word 0x9f802160 ! 121: SIR sir 0x0160 | |
2525 | .word 0x93b484d2 ! 121: FCMPNE32 fcmpne32 %d18, %d18, %r9 | |
2526 | memptr_80_57: | |
2527 | set user_data_start, %r31 | |
2528 | .word 0xc19fd960 ! 122: LDDFA_R ldda [%r31, %r0], %f0 | |
2529 | .word 0x85826878 ! 123: WRCCR_I wr %r9, 0x0878, %ccr | |
2530 | .word 0xc3efe020 ! 124: PREFETCHA_I prefetcha [%r31, + 0x0020] %asi, #one_read | |
2531 | .word 0xe1bfda00 ! 125: STDFA_R stda %f16, [%r0, %r31] | |
2532 | .word 0xc32fe190 ! 125: STXFSR_I st-sfr %f1, [0x0190, %r31] | |
2533 | rd %tick, %r28 | |
2534 | #if (MAX_THREADS == 8) | |
2535 | sethi %hi(0x33800), %r27 | |
2536 | #else | |
2537 | sethi %hi(0x30000), %r27 | |
2538 | #endif | |
2539 | andn %r28, %r27, %r28 | |
2540 | ta T_CHANGE_HPRIV | |
2541 | stxa %r28, [%g0] 0x73 | |
2542 | intvec_80_59: | |
2543 | .word 0x9f802082 ! 126: SIR sir 0x0082 | |
2544 | .word 0x39400001 ! 127: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2545 | .word 0x20800001 ! 128: BN bn,a <label_0x1> | |
2546 | .word 0x9f803283 ! 129: SIR sir 0x1283 | |
2547 | .word 0x20800001 ! 129: BN bn,a <label_0x1> | |
2548 | .word 0xc3efe010 ! 130: PREFETCHA_I prefetcha [%r31, + 0x0010] %asi, #one_read | |
2549 | .word 0xe19fda00 ! 131: LDDFA_R ldda [%r31, %r0], %f16 | |
2550 | .word 0xda3fe1a0 ! 132: STD_I std %r13, [%r31 + 0x01a0] | |
2551 | .word 0xdb1fe020 ! 133: LDDF_I ldd [%r31, 0x0020], %f13 | |
2552 | .word 0xc32fe1a0 ! 133: STXFSR_I st-sfr %f1, [0x01a0, %r31] | |
2553 | .word 0xe19fdb60 ! 134: LDDFA_R ldda [%r31, %r0], %f16 | |
2554 | .word 0x20800001 ! 135: BN bn,a <label_0x1> | |
2555 | .word 0x20800001 ! 136: BN bn,a <label_0x1> | |
2556 | .word 0xc1bfc3e0 ! 137: STDFA_R stda %f0, [%r0, %r31] | |
2557 | .word 0xe1bfd960 ! 137: STDFA_R stda %f16, [%r0, %r31] | |
2558 | memptr_80_62: | |
2559 | set 0x60540000, %r31 | |
2560 | rd %tick, %r28 | |
2561 | #if (MAX_THREADS == 8) | |
2562 | sethi %hi(0x33800), %r27 | |
2563 | #else | |
2564 | sethi %hi(0x30000), %r27 | |
2565 | #endif | |
2566 | andn %r28, %r27, %r28 | |
2567 | ta T_CHANGE_HPRIV | |
2568 | stxa %r28, [%g0] 0x73 | |
2569 | intvec_80_63: | |
2570 | .word 0xc1bfd960 ! 138: STDFA_R stda %f0, [%r0, %r31] | |
2571 | .word 0x85852a01 ! 139: WRCCR_I wr %r20, 0x0a01, %ccr | |
2572 | .word 0x9f802e8f ! 140: SIR sir 0x0e8f | |
2573 | .word 0xe1bfde00 ! 141: STDFA_R stda %f16, [%r0, %r31] | |
2574 | .word 0x93a309d0 ! 141: FDIVd fdivd %f12, %f16, %f40 | |
2575 | memptr_80_65: | |
2576 | set 0x60340000, %r31 | |
2577 | #if (defined SPC || defined CMP1) | |
2578 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_66) + 56, 16, 16)) -> intp(6,0,28,,,,,1) | |
2579 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_66)&0xffffffff) + 0, 16, 16)) -> intp(1,0,23,,,,,1) | |
2580 | #else | |
2581 | set 0x2ac0e262, %r28 | |
2582 | #if (MAX_THREADS == 8) | |
2583 | and %r28, 0x7ff, %r28 | |
2584 | #endif | |
2585 | stxa %r28, [%g0] 0x73 | |
2586 | #endif | |
2587 | intvec_80_66: | |
2588 | .word 0xc19fde00 ! 142: LDDFA_R ldda [%r31, %r0], %f0 | |
2589 | .word 0x8584ea91 ! 143: WRCCR_I wr %r19, 0x0a91, %ccr | |
2590 | .word 0x99b244d2 ! 144: FCMPNE32 fcmpne32 %d40, %d18, %r12 | |
2591 | .word 0xc1bfde00 ! 145: STDFA_R stda %f0, [%r0, %r31] | |
2592 | .word 0x858531e4 ! 145: WRCCR_I wr %r20, 0x11e4, %ccr | |
2593 | .word 0xd93fe130 ! 146: STDF_I std %f12, [0x0130, %r31] | |
2594 | .word 0xe1bfda00 ! 147: STDFA_R stda %f16, [%r0, %r31] | |
2595 | .word 0x9f8020c0 ! 148: SIR sir 0x00c0 | |
2596 | .word 0xd83fe130 ! 149: STD_I std %r12, [%r31 + 0x0130] | |
2597 | .word 0x20800001 ! 149: BN bn,a <label_0x1> | |
2598 | #if (defined SPC || defined CMP1) | |
2599 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_68) + 56, 16, 16)) -> intp(2,0,16,,,,,1) | |
2600 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_68)&0xffffffff) + 16, 16, 16)) -> intp(2,0,0,,,,,1) | |
2601 | #else | |
2602 | set 0x81005609, %r28 | |
2603 | #if (MAX_THREADS == 8) | |
2604 | and %r28, 0x7ff, %r28 | |
2605 | #endif | |
2606 | stxa %r28, [%g0] 0x73 | |
2607 | #endif | |
2608 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2609 | intvec_80_68: | |
2610 | .word 0xa3b044d1 ! 150: FCMPNE32 fcmpne32 %d32, %d48, %r17 | |
2611 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2612 | .word 0xe21fe020 ! 152: LDD_I ldd [%r31 + 0x0020], %r17 | |
2613 | .word 0x39400001 ! 153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2614 | .word 0x19400001 ! 153: FBPUGE fbuge | |
2615 | rd %tick, %r28 | |
2616 | #if (MAX_THREADS == 8) | |
2617 | sethi %hi(0x33800), %r27 | |
2618 | #else | |
2619 | sethi %hi(0x30000), %r27 | |
2620 | #endif | |
2621 | andn %r28, %r27, %r28 | |
2622 | ta T_CHANGE_HPRIV | |
2623 | stxa %r28, [%g0] 0x73 | |
2624 | intvec_80_69: | |
2625 | .word 0xe29fc6c3 ! 154: LDDA_R ldda [%r31, %r3] 0x36, %r17 | |
2626 | .word 0xe1bfdc00 ! 155: STDFA_R stda %f16, [%r0, %r31] | |
2627 | .word 0xa7a489c2 ! 156: FDIVd fdivd %f18, %f2, %f50 | |
2628 | .word 0xc32fe040 ! 157: STXFSR_I st-sfr %f1, [0x0040, %r31] | |
2629 | .word 0xe1bfda00 ! 157: STDFA_R stda %f16, [%r0, %r31] | |
2630 | .word 0x00800001 ! 158: BN bn <label_0x1> | |
2631 | .word 0xa9a7c9c1 ! 159: FDIVd fdivd %f62, %f32, %f20 | |
2632 | .word 0xe9e7d101 ! 160: CASA_I casa [%r31] 0x88, %r1, %r20 | |
2633 | .word 0xc1bfd960 ! 161: STDFA_R stda %f0, [%r0, %r31] | |
2634 | .word 0xa9a7c9c1 ! 161: FDIVd fdivd %f62, %f32, %f20 | |
2635 | memptr_80_72: | |
2636 | set user_data_start, %r31 | |
2637 | rd %tick, %r28 | |
2638 | #if (MAX_THREADS == 8) | |
2639 | sethi %hi(0x33800), %r27 | |
2640 | #else | |
2641 | sethi %hi(0x30000), %r27 | |
2642 | #endif | |
2643 | andn %r28, %r27, %r28 | |
2644 | ta T_CHANGE_HPRIV | |
2645 | stxa %r28, [%g0] 0x73 | |
2646 | intvec_80_73: | |
2647 | .word 0xe1bfdc00 ! 162: STDFA_R stda %f16, [%r0, %r31] | |
2648 | .word 0x85847fb3 ! 163: WRCCR_I wr %r17, 0x1fb3, %ccr | |
2649 | .word 0xa9b244d3 ! 164: FCMPNE32 fcmpne32 %d40, %d50, %r20 | |
2650 | .word 0xe19fdf20 ! 165: LDDFA_R ldda [%r31, %r0], %f16 | |
2651 | .word 0xa3a489d0 ! 165: FDIVd fdivd %f18, %f16, %f48 | |
2652 | rd %tick, %r28 | |
2653 | #if (MAX_THREADS == 8) | |
2654 | sethi %hi(0x33800), %r27 | |
2655 | #else | |
2656 | sethi %hi(0x30000), %r27 | |
2657 | #endif | |
2658 | andn %r28, %r27, %r28 | |
2659 | ta T_CHANGE_HPRIV | |
2660 | stxa %r28, [%g0] 0x73 | |
2661 | .word 0x9f80275d ! 1: SIR sir 0x075d | |
2662 | intvec_80_75: | |
2663 | .word 0xd51fe1d0 ! 166: LDDF_I ldd [%r31, 0x01d0], %f10 | |
2664 | .word 0xc1bfdf20 ! 167: STDFA_R stda %f0, [%r0, %r31] | |
2665 | .word 0xa9b144d1 ! 168: FCMPNE32 fcmpne32 %d36, %d48, %r20 | |
2666 | .word 0xe81fe1f0 ! 169: LDD_I ldd [%r31 + 0x01f0], %r20 | |
2667 | .word 0x9f8033ef ! 169: SIR sir 0x13ef | |
2668 | rd %tick, %r28 | |
2669 | #if (MAX_THREADS == 8) | |
2670 | sethi %hi(0x33800), %r27 | |
2671 | #else | |
2672 | sethi %hi(0x30000), %r27 | |
2673 | #endif | |
2674 | andn %r28, %r27, %r28 | |
2675 | ta T_CHANGE_HPRIV | |
2676 | stxa %r28, [%g0] 0x73 | |
2677 | intvec_80_77: | |
2678 | memptr_80_78: | |
2679 | set user_data_start, %r31 | |
2680 | .word 0x9f8031c8 ! 170: SIR sir 0x11c8 | |
2681 | .word 0x8580eba6 ! 171: WRCCR_I wr %r3, 0x0ba6, %ccr | |
2682 | .word 0xc19fdb60 ! 172: LDDFA_R ldda [%r31, %r0], %f0 | |
2683 | .word 0x39400001 ! 173: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2684 | .word 0xe19fc3e0 ! 173: LDDFA_R ldda [%r31, %r0], %f16 | |
2685 | rd %tick, %r28 | |
2686 | #if (MAX_THREADS == 8) | |
2687 | sethi %hi(0x33800), %r27 | |
2688 | #else | |
2689 | sethi %hi(0x30000), %r27 | |
2690 | #endif | |
2691 | andn %r28, %r27, %r28 | |
2692 | ta T_CHANGE_HPRIV | |
2693 | stxa %r28, [%g0] 0x73 | |
2694 | intvec_80_79: | |
2695 | .word 0x9f802725 ! 174: SIR sir 0x0725 | |
2696 | .word 0x87afca40 ! 175: FCMPd fcmpd %fcc<n>, %f62, %f0 | |
2697 | .word 0xe1bfde00 ! 176: STDFA_R stda %f16, [%r0, %r31] | |
2698 | .word 0xa1b084d1 ! 177: FCMPNE32 fcmpne32 %d2, %d48, %r16 | |
2699 | .word 0x04cfc001 ! 177: BRLEZ brlez,pt %r31,<label_0xfc001> | |
2700 | .word 0xe097df03 ! 178: LDUHA_R lduha [%r31, %r3] 0xf8, %r16 | |
2701 | .word 0xe19fdf20 ! 179: LDDFA_R ldda [%r31, %r0], %f16 | |
2702 | .word 0xc32fe180 ! 180: STXFSR_I st-sfr %f1, [0x0180, %r31] | |
2703 | .word 0xc32fe160 ! 181: STXFSR_I st-sfr %f1, [0x0160, %r31] | |
2704 | .word 0xc1bfda00 ! 181: STDFA_R stda %f0, [%r0, %r31] | |
2705 | #if (defined SPC || defined CMP1) | |
2706 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_82) + 24, 16, 16)) -> intp(3,0,0,,,,,1) | |
2707 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_82)&0xffffffff) + 40, 16, 16)) -> intp(0,0,29,,,,,1) | |
2708 | #else | |
2709 | set 0xb9b00822, %r28 | |
2710 | #if (MAX_THREADS == 8) | |
2711 | and %r28, 0x7ff, %r28 | |
2712 | #endif | |
2713 | stxa %r28, [%g0] 0x73 | |
2714 | #endif | |
2715 | intvec_80_82: | |
2716 | .word 0x91a4c9cd ! 182: FDIVd fdivd %f50, %f44, %f8 | |
2717 | .word 0xe19fd920 ! 183: LDDFA_R ldda [%r31, %r0], %f16 | |
2718 | .word 0x20800001 ! 184: BN bn,a <label_0x1> | |
2719 | .word 0x9f802bcc ! 185: SIR sir 0x0bcc | |
2720 | .word 0xe19fdf20 ! 185: LDDFA_R ldda [%r31, %r0], %f16 | |
2721 | memptr_80_84: | |
2722 | set user_data_start, %r31 | |
2723 | .word 0xd63fe0b0 ! 186: STD_I std %r11, [%r31 + 0x00b0] | |
2724 | .word 0x8582b317 ! 187: WRCCR_I wr %r10, 0x1317, %ccr | |
2725 | .word 0xd71fe160 ! 188: LDDF_I ldd [%r31, 0x0160], %f11 | |
2726 | .word 0xd697c240 ! 189: LDUHA_R lduha [%r31, %r0] 0x12, %r11 | |
2727 | .word 0xd697c402 ! 189: LDUHA_R lduha [%r31, %r2] 0x20, %r11 | |
2728 | memptr_80_85: | |
2729 | set 0x60540000, %r31 | |
2730 | .word 0x9f802040 ! 190: SIR sir 0x0040 | |
2731 | .word 0x85832ae2 ! 191: WRCCR_I wr %r12, 0x0ae2, %ccr | |
2732 | .word 0xe1bfc2c0 ! 192: STDFA_R stda %f16, [%r0, %r31] | |
2733 | .word 0xd63fe0e0 ! 193: STD_I std %r11, [%r31 + 0x00e0] | |
2734 | .word 0x8584e19c ! 193: WRCCR_I wr %r19, 0x019c, %ccr | |
2735 | #if (defined SPC || defined CMP1) | |
2736 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_86) + 24, 16, 16)) -> intp(5,0,10,,,,,1) | |
2737 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_86)&0xffffffff) + 0, 16, 16)) -> intp(0,0,18,,,,,1) | |
2738 | #else | |
2739 | set 0x26f00c3e, %r28 | |
2740 | #if (MAX_THREADS == 8) | |
2741 | and %r28, 0x7ff, %r28 | |
2742 | #endif | |
2743 | stxa %r28, [%g0] 0x73 | |
2744 | #endif | |
2745 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2746 | intvec_80_86: | |
2747 | .word 0xa5a4c9d4 ! 194: FDIVd fdivd %f50, %f20, %f18 | |
2748 | .word 0x93a7c9c3 ! 195: FDIVd fdivd %f62, %f34, %f40 | |
2749 | .word 0xc19fdb60 ! 196: LDDFA_R ldda [%r31, %r0], %f0 | |
2750 | .word 0x93b144c1 ! 197: FCMPNE32 fcmpne32 %d36, %d32, %r9 | |
2751 | .word 0x93a7c9c1 ! 197: FDIVd fdivd %f62, %f32, %f40 | |
2752 | #if (defined SPC || defined CMP1) | |
2753 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_88) + 0, 16, 16)) -> intp(0,0,16,,,,,1) | |
2754 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_88)&0xffffffff) + 48, 16, 16)) -> intp(2,0,17,,,,,1) | |
2755 | #else | |
2756 | set 0x65a0bc69, %r28 | |
2757 | #if (MAX_THREADS == 8) | |
2758 | and %r28, 0x7ff, %r28 | |
2759 | #endif | |
2760 | stxa %r28, [%g0] 0x73 | |
2761 | #endif | |
2762 | intvec_80_88: | |
2763 | .word 0x9f803bf8 ! 198: SIR sir 0x1bf8 | |
2764 | .word 0xe19fd960 ! 199: LDDFA_R ldda [%r31, %r0], %f16 | |
2765 | .word 0xe6dfc383 ! 200: LDXA_R ldxa [%r31, %r3] 0x1c, %r19 | |
2766 | .word 0x9f802976 ! 201: SIR sir 0x0976 | |
2767 | .word 0xe1bfdb60 ! 201: STDFA_R stda %f16, [%r0, %r31] | |
2768 | .word 0xc1bfdc00 ! 202: STDFA_R stda %f0, [%r0, %r31] | |
2769 | .word 0x24cfc001 ! 203: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
2770 | .word 0xe23fe1d0 ! 204: STD_I std %r17, [%r31 + 0x01d0] | |
2771 | .word 0x20800001 ! 205: BN bn,a <label_0x1> | |
2772 | .word 0x87afca42 ! 205: FCMPd fcmpd %fcc<n>, %f62, %f2 | |
2773 | memptr_80_91: | |
2774 | set 0x60140000, %r31 | |
2775 | .word 0xe19fdc00 ! 206: LDDFA_R ldda [%r31, %r0], %f16 | |
2776 | .word 0x8584fd77 ! 207: WRCCR_I wr %r19, 0x1d77, %ccr | |
2777 | .word 0xc32fe180 ! 208: STXFSR_I st-sfr %f1, [0x0180, %r31] | |
2778 | .word 0xe19fdf20 ! 209: LDDFA_R ldda [%r31, %r0], %f16 | |
2779 | .word 0x858327e1 ! 209: WRCCR_I wr %r12, 0x07e1, %ccr | |
2780 | memptr_80_93: | |
2781 | set user_data_start, %r31 | |
2782 | .word 0xe19fd960 ! 210: LDDFA_R ldda [%r31, %r0], %f16 | |
2783 | .word 0x8582a168 ! 211: WRCCR_I wr %r10, 0x0168, %ccr | |
2784 | .word 0xe1bfc3e0 ! 212: STDFA_R stda %f16, [%r0, %r31] | |
2785 | .word 0xc1bfd920 ! 213: STDFA_R stda %f0, [%r0, %r31] | |
2786 | .word 0x85853dfe ! 213: WRCCR_I wr %r20, 0x1dfe, %ccr | |
2787 | rd %tick, %r28 | |
2788 | #if (MAX_THREADS == 8) | |
2789 | sethi %hi(0x33800), %r27 | |
2790 | #else | |
2791 | sethi %hi(0x30000), %r27 | |
2792 | #endif | |
2793 | andn %r28, %r27, %r28 | |
2794 | ta T_CHANGE_HPRIV | |
2795 | stxa %r28, [%g0] 0x73 | |
2796 | intvec_80_95: | |
2797 | .word 0xc1bfdc00 ! 214: STDFA_R stda %f0, [%r0, %r31] | |
2798 | .word 0x39400001 ! 215: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2799 | .word 0x9f803707 ! 216: SIR sir 0x1707 | |
2800 | .word 0x20800001 ! 217: BN bn,a <label_0x1> | |
2801 | .word 0xc36fe040 ! 217: PREFETCH_I prefetch [%r31 + 0x0040], #one_read | |
2802 | memptr_80_97: | |
2803 | set 0x60340000, %r31 | |
2804 | #if (defined SPC || defined CMP1) | |
2805 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_98) + 0, 16, 16)) -> intp(6,0,24,,,,,1) | |
2806 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_98)&0xffffffff) + 24, 16, 16)) -> intp(2,0,25,,,,,1) | |
2807 | #else | |
2808 | set 0x4870bcec, %r28 | |
2809 | #if (MAX_THREADS == 8) | |
2810 | and %r28, 0x7ff, %r28 | |
2811 | #endif | |
2812 | stxa %r28, [%g0] 0x73 | |
2813 | #endif | |
2814 | intvec_80_98: | |
2815 | .word 0xe1bfdc00 ! 218: STDFA_R stda %f16, [%r0, %r31] | |
2816 | .word 0x8585350f ! 219: WRCCR_I wr %r20, 0x150f, %ccr | |
2817 | .word 0xa7b344d1 ! 220: FCMPNE32 fcmpne32 %d44, %d48, %r19 | |
2818 | .word 0xe1bfc2c0 ! 221: STDFA_R stda %f16, [%r0, %r31] | |
2819 | .word 0xa3a089d2 ! 221: FDIVd fdivd %f2, %f18, %f48 | |
2820 | #if (defined SPC || defined CMP1) | |
2821 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_100) + 16, 16, 16)) -> intp(2,0,20,,,,,1) | |
2822 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_100)&0xffffffff) + 24, 16, 16)) -> intp(4,0,9,,,,,1) | |
2823 | #else | |
2824 | set 0x170f47d, %r28 | |
2825 | #if (MAX_THREADS == 8) | |
2826 | and %r28, 0x7ff, %r28 | |
2827 | #endif | |
2828 | stxa %r28, [%g0] 0x73 | |
2829 | #endif | |
2830 | .word 0xa3b444d1 ! 1: FCMPNE32 fcmpne32 %d48, %d48, %r17 | |
2831 | intvec_80_100: | |
2832 | memptr_80_101: | |
2833 | set 0x60540000, %r31 | |
2834 | .word 0x91a409d1 ! 222: FDIVd fdivd %f16, %f48, %f8 | |
2835 | .word 0x8584b5e1 ! 223: WRCCR_I wr %r18, 0x15e1, %ccr | |
2836 | .word 0xc32fe030 ! 224: STXFSR_I st-sfr %f1, [0x0030, %r31] | |
2837 | .word 0x99a2c9d1 ! 225: FDIVd fdivd %f42, %f48, %f12 | |
2838 | .word 0x8581e496 ! 225: WRCCR_I wr %r7, 0x0496, %ccr | |
2839 | .word 0xc19fd960 ! 226: LDDFA_R ldda [%r31, %r0], %f0 | |
2840 | .word 0x99b7c4c1 ! 227: FCMPNE32 fcmpne32 %d62, %d32, %r12 | |
2841 | .word 0xc32fe1c0 ! 228: STXFSR_I st-sfr %f1, [0x01c0, %r31] | |
2842 | .word 0xc19fc3e0 ! 229: LDDFA_R ldda [%r31, %r0], %f0 | |
2843 | .word 0xd89fc540 ! 229: LDDA_R ldda [%r31, %r0] 0x2a, %r12 | |
2844 | rd %tick, %r28 | |
2845 | #if (MAX_THREADS == 8) | |
2846 | sethi %hi(0x33800), %r27 | |
2847 | #else | |
2848 | sethi %hi(0x30000), %r27 | |
2849 | #endif | |
2850 | andn %r28, %r27, %r28 | |
2851 | ta T_CHANGE_HPRIV | |
2852 | stxa %r28, [%g0] 0x73 | |
2853 | .word 0xa1b404c5 ! 1: FCMPNE32 fcmpne32 %d16, %d36, %r16 | |
2854 | intvec_80_103: | |
2855 | memptr_80_104: | |
2856 | set 0x60540000, %r31 | |
2857 | .word 0xa9b284c1 ! 230: FCMPNE32 fcmpne32 %d10, %d32, %r20 | |
2858 | .word 0x85843f0a ! 231: WRCCR_I wr %r16, 0x1f0a, %ccr | |
2859 | .word 0xe91fe1e0 ! 232: LDDF_I ldd [%r31, 0x01e0], %f20 | |
2860 | .word 0x39400001 ! 233: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2861 | .word 0x85846c66 ! 233: WRCCR_I wr %r17, 0x0c66, %ccr | |
2862 | #if (defined SPC || defined CMP1) | |
2863 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_106) + 8, 16, 16)) -> intp(0,0,22,,,,,1) | |
2864 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_106)&0xffffffff) + 8, 16, 16)) -> intp(5,0,27,,,,,1) | |
2865 | #else | |
2866 | set 0xf940f2b5, %r28 | |
2867 | #if (MAX_THREADS == 8) | |
2868 | and %r28, 0x7ff, %r28 | |
2869 | #endif | |
2870 | stxa %r28, [%g0] 0x73 | |
2871 | #endif | |
2872 | intvec_80_106: | |
2873 | rd %tick, %r28 | |
2874 | #if (MAX_THREADS == 8) | |
2875 | sethi %hi(0x33800), %r27 | |
2876 | #else | |
2877 | sethi %hi(0x30000), %r27 | |
2878 | #endif | |
2879 | andn %r28, %r27, %r28 | |
2880 | ta T_CHANGE_HPRIV | |
2881 | stxa %r28, [%g0] 0x73 | |
2882 | intvec_80_107: | |
2883 | .word 0x95a489d2 ! 234: FDIVd fdivd %f18, %f18, %f10 | |
2884 | .word 0xe19fdf20 ! 235: LDDFA_R ldda [%r31, %r0], %f16 | |
2885 | .word 0xa9a509d2 ! 236: FDIVd fdivd %f20, %f18, %f20 | |
2886 | .word 0x9f802d88 ! 237: SIR sir 0x0d88 | |
2887 | .word 0x20800001 ! 237: BN bn,a <label_0x1> | |
2888 | memptr_80_109: | |
2889 | set 0x60740000, %r31 | |
2890 | .word 0xe19fda00 ! 238: LDDFA_R ldda [%r31, %r0], %f16 | |
2891 | .word 0x85813e69 ! 239: WRCCR_I wr %r4, 0x1e69, %ccr | |
2892 | .word 0x20800001 ! 240: BN bn,a <label_0x1> | |
2893 | .word 0xe19fc3e0 ! 241: LDDFA_R ldda [%r31, %r0], %f16 | |
2894 | .word 0x8584adc8 ! 241: WRCCR_I wr %r18, 0x0dc8, %ccr | |
2895 | memptr_80_111: | |
2896 | set user_data_start, %r31 | |
2897 | .word 0x20800001 ! 242: BN bn,a <label_0x1> | |
2898 | .word 0x85817b72 ! 243: WRCCR_I wr %r5, 0x1b72, %ccr | |
2899 | .word 0x20800001 ! 244: BN bn,a <label_0x1> | |
2900 | .word 0xc1bfc2c0 ! 245: STDFA_R stda %f0, [%r0, %r31] | |
2901 | .word 0xc1bfda00 ! 245: STDFA_R stda %f0, [%r0, %r31] | |
2902 | .word 0x20800001 ! 246: BN bn,a <label_0x1> | |
2903 | .word 0x24cfc001 ! 247: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
2904 | .word 0xe81fe030 ! 248: LDD_I ldd [%r31 + 0x0030], %r20 | |
2905 | .word 0x20800001 ! 249: BN bn,a <label_0x1> | |
2906 | .word 0xe9e7dc41 ! 249: CASA_I casa [%r31] 0xe2, %r1, %r20 | |
2907 | .word 0x20800001 ! 250: BN bn,a <label_0x1> | |
2908 | .word 0xc1bfde00 ! 251: STDFA_R stda %f0, [%r0, %r31] | |
2909 | .word 0xc1bfdb60 ! 252: STDFA_R stda %f0, [%r0, %r31] | |
2910 | .word 0xe19fd960 ! 253: LDDFA_R ldda [%r31, %r0], %f16 | |
2911 | .word 0x20800001 ! 253: BN bn,a <label_0x1> | |
2912 | .word 0xc1bfc2c0 ! 254: STDFA_R stda %f0, [%r0, %r31] | |
2913 | .word 0xe1bfdb60 ! 255: STDFA_R stda %f16, [%r0, %r31] | |
2914 | .word 0xe5e7c2c0 ! 256: CASA_I casa [%r31] 0x16, %r0, %r18 | |
2915 | .word 0xc1bfd920 ! 257: STDFA_R stda %f0, [%r0, %r31] | |
2916 | .word 0x20800001 ! 257: BN bn,a <label_0x1> | |
2917 | rd %tick, %r28 | |
2918 | #if (MAX_THREADS == 8) | |
2919 | sethi %hi(0x33800), %r27 | |
2920 | #else | |
2921 | sethi %hi(0x30000), %r27 | |
2922 | #endif | |
2923 | andn %r28, %r27, %r28 | |
2924 | ta T_CHANGE_HPRIV | |
2925 | stxa %r28, [%g0] 0x73 | |
2926 | intvec_80_113: | |
2927 | #if (defined SPC || defined CMP1) | |
2928 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_114) + 8, 16, 16)) -> intp(4,0,2,,,,,1) | |
2929 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_114)&0xffffffff) + 40, 16, 16)) -> intp(2,0,23,,,,,1) | |
2930 | #else | |
2931 | set 0xeec037d3, %r28 | |
2932 | #if (MAX_THREADS == 8) | |
2933 | and %r28, 0x7ff, %r28 | |
2934 | #endif | |
2935 | stxa %r28, [%g0] 0x73 | |
2936 | #endif | |
2937 | .word 0x9f803c5a ! 1: SIR sir 0x1c5a | |
2938 | intvec_80_114: | |
2939 | .word 0x39400001 ! 258: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2940 | .word 0xa1b7c4c0 ! 259: FCMPNE32 fcmpne32 %d62, %d0, %r16 | |
2941 | .word 0xa7b444d0 ! 260: FCMPNE32 fcmpne32 %d48, %d16, %r19 | |
2942 | .word 0x93a209d0 ! 261: FDIVd fdivd %f8, %f16, %f40 | |
2943 | .word 0x9f802d3d ! 261: SIR sir 0x0d3d | |
2944 | rd %tick, %r28 | |
2945 | #if (MAX_THREADS == 8) | |
2946 | sethi %hi(0x33800), %r27 | |
2947 | #else | |
2948 | sethi %hi(0x30000), %r27 | |
2949 | #endif | |
2950 | andn %r28, %r27, %r28 | |
2951 | ta T_CHANGE_HPRIV | |
2952 | stxa %r28, [%g0] 0x73 | |
2953 | intvec_80_115: | |
2954 | .word 0xe6dfc2c3 ! 262: LDXA_R ldxa [%r31, %r3] 0x16, %r19 | |
2955 | .word 0xa7a7c9c0 ! 263: FDIVd fdivd %f62, %f0, %f50 | |
2956 | .word 0x9f8025ea ! 264: SIR sir 0x05ea | |
2957 | .word 0xd297c6c1 ! 265: LDUHA_R lduha [%r31, %r1] 0x36, %r9 | |
2958 | .word 0x93a7c9c2 ! 265: FDIVd fdivd %f62, %f2, %f40 | |
2959 | .word 0xd3e7c241 ! 266: CASA_I casa [%r31] 0x12, %r1, %r9 | |
2960 | .word 0x20800001 ! 267: BN bn,a <label_0x1> | |
2961 | .word 0x9f8021d0 ! 268: SIR sir 0x01d0 | |
2962 | .word 0x9f802120 ! 269: SIR sir 0x0120 | |
2963 | .word 0xd29fd143 ! 269: LDDA_R ldda [%r31, %r3] 0x8a, %r9 | |
2964 | #if (defined SPC || defined CMP1) | |
2965 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_118) + 48, 16, 16)) -> intp(4,0,25,,,,,1) | |
2966 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_118)&0xffffffff) + 16, 16, 16)) -> intp(2,0,21,,,,,1) | |
2967 | #else | |
2968 | set 0xff80f7bd, %r28 | |
2969 | #if (MAX_THREADS == 8) | |
2970 | and %r28, 0x7ff, %r28 | |
2971 | #endif | |
2972 | stxa %r28, [%g0] 0x73 | |
2973 | #endif | |
2974 | intvec_80_118: | |
2975 | rd %tick, %r28 | |
2976 | #if (MAX_THREADS == 8) | |
2977 | sethi %hi(0x33800), %r27 | |
2978 | #else | |
2979 | sethi %hi(0x30000), %r27 | |
2980 | #endif | |
2981 | andn %r28, %r27, %r28 | |
2982 | ta T_CHANGE_HPRIV | |
2983 | stxa %r28, [%g0] 0x73 | |
2984 | .word 0xa3b044d0 ! 1: FCMPNE32 fcmpne32 %d32, %d16, %r17 | |
2985 | intvec_80_119: | |
2986 | .word 0x9f802102 ! 270: SIR sir 0x0102 | |
2987 | .word 0x93a7c9c0 ! 271: FDIVd fdivd %f62, %f0, %f40 | |
2988 | .word 0xa7a4c9c7 ! 272: FDIVd fdivd %f50, %f38, %f50 | |
2989 | .word 0xa5b184d3 ! 273: FCMPNE32 fcmpne32 %d6, %d50, %r18 | |
2990 | .word 0xa5b7c4c1 ! 273: FCMPNE32 fcmpne32 %d62, %d32, %r18 | |
2991 | .word 0xc19fc3e0 ! 274: LDDFA_R ldda [%r31, %r0], %f0 | |
2992 | .word 0x87afca40 ! 275: FCMPd fcmpd %fcc<n>, %f62, %f0 | |
2993 | .word 0xe1bfc3e0 ! 276: STDFA_R stda %f16, [%r0, %r31] | |
2994 | .word 0xe19fdb60 ! 277: LDDFA_R ldda [%r31, %r0], %f16 | |
2995 | .word 0x19400001 ! 277: FBPUGE fbuge | |
2996 | rd %tick, %r28 | |
2997 | #if (MAX_THREADS == 8) | |
2998 | sethi %hi(0x33800), %r27 | |
2999 | #else | |
3000 | sethi %hi(0x30000), %r27 | |
3001 | #endif | |
3002 | andn %r28, %r27, %r28 | |
3003 | ta T_CHANGE_HPRIV | |
3004 | stxa %r28, [%g0] 0x73 | |
3005 | intvec_80_121: | |
3006 | .word 0x39400001 ! 278: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3007 | .word 0x39400001 ! 279: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3008 | .word 0x20800001 ! 280: BN bn,a <label_0x1> | |
3009 | .word 0x9ba449d3 ! 281: FDIVd fdivd %f48, %f50, %f44 | |
3010 | .word 0x20800001 ! 281: BN bn,a <label_0x1> | |
3011 | rd %tick, %r28 | |
3012 | #if (MAX_THREADS == 8) | |
3013 | sethi %hi(0x33800), %r27 | |
3014 | #else | |
3015 | sethi %hi(0x30000), %r27 | |
3016 | #endif | |
3017 | andn %r28, %r27, %r28 | |
3018 | ta T_CHANGE_HPRIV | |
3019 | stxa %r28, [%g0] 0x73 | |
3020 | intvec_80_123: | |
3021 | .word 0xe1bfc3e0 ! 282: STDFA_R stda %f16, [%r0, %r31] | |
3022 | .word 0x97b7c4c0 ! 283: FCMPNE32 fcmpne32 %d62, %d0, %r11 | |
3023 | .word 0x9ba509d2 ! 284: FDIVd fdivd %f20, %f18, %f44 | |
3024 | .word 0xc19fdc00 ! 285: LDDFA_R ldda [%r31, %r0], %f0 | |
3025 | .word 0xc36fe1d0 ! 285: PREFETCH_I prefetch [%r31 + 0x01d0], #one_read | |
3026 | .word 0xe19fde00 ! 286: LDDFA_R ldda [%r31, %r0], %f16 | |
3027 | .word 0xc36fe1a0 ! 287: PREFETCH_I prefetch [%r31 + 0x01a0], #one_read | |
3028 | .word 0x20800001 ! 288: BN bn,a <label_0x1> | |
3029 | .word 0xe1bfd960 ! 289: STDFA_R stda %f16, [%r0, %r31] | |
3030 | .word 0xc19fdf20 ! 289: LDDFA_R ldda [%r31, %r0], %f0 | |
3031 | memptr_80_126: | |
3032 | set user_data_start, %r31 | |
3033 | .word 0xe19fda00 ! 290: LDDFA_R ldda [%r31, %r0], %f16 | |
3034 | .word 0x85846077 ! 291: WRCCR_I wr %r17, 0x0077, %ccr | |
3035 | .word 0x20800001 ! 292: BN bn,a <label_0x1> | |
3036 | .word 0xe19fd920 ! 293: LDDFA_R ldda [%r31, %r0], %f16 | |
3037 | .word 0x85806e80 ! 293: WRCCR_I wr %r1, 0x0e80, %ccr | |
3038 | rd %tick, %r28 | |
3039 | #if (MAX_THREADS == 8) | |
3040 | sethi %hi(0x33800), %r27 | |
3041 | #else | |
3042 | sethi %hi(0x30000), %r27 | |
3043 | #endif | |
3044 | andn %r28, %r27, %r28 | |
3045 | ta T_CHANGE_HPRIV | |
3046 | stxa %r28, [%g0] 0x73 | |
3047 | .word 0xa5a409d1 ! 1: FDIVd fdivd %f16, %f48, %f18 | |
3048 | intvec_80_127: | |
3049 | .word 0x9f803563 ! 294: SIR sir 0x1563 | |
3050 | .word 0xd03fe0b0 ! 295: STD_I std %r8, [%r31 + 0x00b0] | |
3051 | .word 0xd097df01 ! 296: LDUHA_R lduha [%r31, %r1] 0xf8, %r8 | |
3052 | .word 0x95a409c2 ! 297: FDIVd fdivd %f16, %f2, %f10 | |
3053 | .word 0xd13fe040 ! 297: STDF_I std %f8, [0x0040, %r31] | |
3054 | memptr_80_128: | |
3055 | set 0x60740000, %r31 | |
3056 | .word 0x9f802190 ! 298: SIR sir 0x0190 | |
3057 | .word 0x8584b6d1 ! 299: WRCCR_I wr %r18, 0x16d1, %ccr | |
3058 | .word 0xd13fe1f0 ! 300: STDF_I std %f8, [0x01f0, %r31] | |
3059 | .word 0xc3efe110 ! 301: PREFETCHA_I prefetcha [%r31, + 0x0110] %asi, #one_read | |
3060 | .word 0xd13fe0a0 ! 301: STDF_I std %f8, [0x00a0, %r31] | |
3061 | .word 0x20800001 ! 302: BN bn,a <label_0x1> | |
3062 | .word 0xd1e7e002 ! 303: CASA_R casa [%r31] %asi, %r2, %r8 | |
3063 | .word 0xe1bfdf20 ! 304: STDFA_R stda %f16, [%r0, %r31] | |
3064 | .word 0xc19fdc00 ! 305: LDDFA_R ldda [%r31, %r0], %f0 | |
3065 | .word 0xe1bfdc00 ! 305: STDFA_R stda %f16, [%r0, %r31] | |
3066 | memptr_80_130: | |
3067 | set 0x60540000, %r31 | |
3068 | rd %tick, %r28 | |
3069 | #if (MAX_THREADS == 8) | |
3070 | sethi %hi(0x33800), %r27 | |
3071 | #else | |
3072 | sethi %hi(0x30000), %r27 | |
3073 | #endif | |
3074 | andn %r28, %r27, %r28 | |
3075 | ta T_CHANGE_HPRIV | |
3076 | stxa %r28, [%g0] 0x73 | |
3077 | .word 0x19400001 ! 1: FBPUGE fbuge | |
3078 | intvec_80_131: | |
3079 | .word 0xc19fc3e0 ! 306: LDDFA_R ldda [%r31, %r0], %f0 | |
3080 | .word 0x8584f8bf ! 307: WRCCR_I wr %r19, 0x18bf, %ccr | |
3081 | .word 0x9f802ffa ! 308: SIR sir 0x0ffa | |
3082 | .word 0xc19fd960 ! 309: LDDFA_R ldda [%r31, %r0], %f0 | |
3083 | .word 0x9f803585 ! 309: SIR sir 0x1585 | |
3084 | rd %tick, %r28 | |
3085 | #if (MAX_THREADS == 8) | |
3086 | sethi %hi(0x33800), %r27 | |
3087 | #else | |
3088 | sethi %hi(0x30000), %r27 | |
3089 | #endif | |
3090 | andn %r28, %r27, %r28 | |
3091 | ta T_CHANGE_HPRIV | |
3092 | stxa %r28, [%g0] 0x73 | |
3093 | intvec_80_133: | |
3094 | .word 0xc1bfd960 ! 310: STDFA_R stda %f0, [%r0, %r31] | |
3095 | .word 0xe1bfde00 ! 311: STDFA_R stda %f16, [%r0, %r31] | |
3096 | .word 0x9f8037c0 ! 312: SIR sir 0x17c0 | |
3097 | .word 0xe19fdb60 ! 313: LDDFA_R ldda [%r31, %r0], %f16 | |
3098 | .word 0xe1bfc2c0 ! 313: STDFA_R stda %f16, [%r0, %r31] | |
3099 | memptr_80_134: | |
3100 | set 0x60540000, %r31 | |
3101 | rd %tick, %r28 | |
3102 | #if (MAX_THREADS == 8) | |
3103 | sethi %hi(0x33800), %r27 | |
3104 | #else | |
3105 | sethi %hi(0x30000), %r27 | |
3106 | #endif | |
3107 | andn %r28, %r27, %r28 | |
3108 | ta T_CHANGE_HPRIV | |
3109 | stxa %r28, [%g0] 0x73 | |
3110 | intvec_80_135: | |
3111 | .word 0xe7e7d142 ! 314: CASA_I casa [%r31] 0x8a, %r2, %r19 | |
3112 | .word 0x85837dc2 ! 315: WRCCR_I wr %r13, 0x1dc2, %ccr | |
3113 | .word 0xa9a2c9d2 ! 316: FDIVd fdivd %f42, %f18, %f20 | |
3114 | .word 0xe93fe070 ! 317: STDF_I std %f20, [0x0070, %r31] | |
3115 | .word 0xa3a4c9d2 ! 317: FDIVd fdivd %f50, %f18, %f48 | |
3116 | .word 0xe23fe150 ! 318: STD_I std %r17, [%r31 + 0x0150] | |
3117 | .word 0xe19fdb60 ! 319: LDDFA_R ldda [%r31, %r0], %f16 | |
3118 | .word 0xe297c720 ! 320: LDUHA_R lduha [%r31, %r0] 0x39, %r17 | |
3119 | .word 0xe3e7c722 ! 321: CASA_I casa [%r31] 0x39, %r2, %r17 | |
3120 | .word 0xe23fe110 ! 321: STD_I std %r17, [%r31 + 0x0110] | |
3121 | #if (defined SPC || defined CMP1) | |
3122 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_136) + 8, 16, 16)) -> intp(4,0,8,,,,,1) | |
3123 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_136)&0xffffffff) + 40, 16, 16)) -> intp(0,0,1,,,,,1) | |
3124 | #else | |
3125 | set 0x9560af1f, %r28 | |
3126 | #if (MAX_THREADS == 8) | |
3127 | and %r28, 0x7ff, %r28 | |
3128 | #endif | |
3129 | stxa %r28, [%g0] 0x73 | |
3130 | #endif | |
3131 | intvec_80_136: | |
3132 | .word 0x9f802715 ! 322: SIR sir 0x0715 | |
3133 | .word 0xc1bfdb60 ! 323: STDFA_R stda %f0, [%r0, %r31] | |
3134 | .word 0xe19fde00 ! 324: LDDFA_R ldda [%r31, %r0], %f16 | |
3135 | .word 0xa5b1c4d1 ! 325: FCMPNE32 fcmpne32 %d38, %d48, %r18 | |
3136 | .word 0xc19fc2c0 ! 325: LDDFA_R ldda [%r31, %r0], %f0 | |
3137 | #if (defined SPC || defined CMP1) | |
3138 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_138) + 0, 16, 16)) -> intp(0,0,19,,,,,1) | |
3139 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_138)&0xffffffff) + 24, 16, 16)) -> intp(4,0,27,,,,,1) | |
3140 | #else | |
3141 | set 0xaff0d95e, %r28 | |
3142 | #if (MAX_THREADS == 8) | |
3143 | and %r28, 0x7ff, %r28 | |
3144 | #endif | |
3145 | stxa %r28, [%g0] 0x73 | |
3146 | #endif | |
3147 | .word 0x9f8026dd ! 1: SIR sir 0x06dd | |
3148 | intvec_80_138: | |
3149 | .word 0x9f803963 ! 326: SIR sir 0x1963 | |
3150 | .word 0x04cfc001 ! 327: BRLEZ brlez,pt %r31,<label_0xfc001> | |
3151 | .word 0xc32fe070 ! 328: STXFSR_I st-sfr %f1, [0x0070, %r31] | |
3152 | .word 0x97a089d3 ! 329: FDIVd fdivd %f2, %f50, %f42 | |
3153 | .word 0x87afca42 ! 329: FCMPd fcmpd %fcc<n>, %f62, %f2 | |
3154 | .word 0xe0dfd920 ! 330: LDXA_R ldxa [%r31, %r0] 0xc9, %r16 | |
3155 | .word 0x20800001 ! 331: BN bn,a <label_0x1> | |
3156 | .word 0xe19fda00 ! 332: LDDFA_R ldda [%r31, %r0], %f16 | |
3157 | .word 0xc3efe0c0 ! 333: PREFETCHA_I prefetcha [%r31, + 0x00c0] %asi, #one_read | |
3158 | .word 0xe1bfc3e0 ! 333: STDFA_R stda %f16, [%r0, %r31] | |
3159 | rd %tick, %r28 | |
3160 | #if (MAX_THREADS == 8) | |
3161 | sethi %hi(0x33800), %r27 | |
3162 | #else | |
3163 | sethi %hi(0x30000), %r27 | |
3164 | #endif | |
3165 | andn %r28, %r27, %r28 | |
3166 | ta T_CHANGE_HPRIV | |
3167 | stxa %r28, [%g0] 0x73 | |
3168 | intvec_80_139: | |
3169 | .word 0xc19fdb60 ! 334: LDDFA_R ldda [%r31, %r0], %f0 | |
3170 | .word 0x24cfc001 ! 335: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
3171 | .word 0x39400001 ! 336: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3172 | .word 0xc1bfd960 ! 337: STDFA_R stda %f0, [%r0, %r31] | |
3173 | .word 0x97b2c4c5 ! 337: FCMPNE32 fcmpne32 %d42, %d36, %r11 | |
3174 | .word 0xc19fc2c0 ! 338: LDDFA_R ldda [%r31, %r0], %f0 | |
3175 | .word 0x99a7c9c1 ! 339: FDIVd fdivd %f62, %f32, %f12 | |
3176 | .word 0xc32fe090 ! 340: STXFSR_I st-sfr %f1, [0x0090, %r31] | |
3177 | .word 0xe19fdf20 ! 341: LDDFA_R ldda [%r31, %r0], %f16 | |
3178 | .word 0xd9e7d101 ! 341: CASA_I casa [%r31] 0x88, %r1, %r12 | |
3179 | memptr_80_141: | |
3180 | set user_data_start, %r31 | |
3181 | .word 0xd8dfdd40 ! 342: LDXA_R ldxa [%r31, %r0] 0xea, %r12 | |
3182 | .word 0x8580e485 ! 343: WRCCR_I wr %r3, 0x0485, %ccr | |
3183 | .word 0xe19fc2c0 ! 344: LDDFA_R ldda [%r31, %r0], %f16 | |
3184 | .word 0xd91fe1c0 ! 345: LDDF_I ldd [%r31, 0x01c0], %f12 | |
3185 | .word 0x858371da ! 345: WRCCR_I wr %r13, 0x11da, %ccr | |
3186 | rd %tick, %r28 | |
3187 | #if (MAX_THREADS == 8) | |
3188 | sethi %hi(0x33800), %r27 | |
3189 | #else | |
3190 | sethi %hi(0x30000), %r27 | |
3191 | #endif | |
3192 | andn %r28, %r27, %r28 | |
3193 | ta T_CHANGE_HPRIV | |
3194 | stxa %r28, [%g0] 0x73 | |
3195 | intvec_80_143: | |
3196 | memptr_80_144: | |
3197 | set user_data_start, %r31 | |
3198 | rd %tick, %r28 | |
3199 | #if (MAX_THREADS == 8) | |
3200 | sethi %hi(0x33800), %r27 | |
3201 | #else | |
3202 | sethi %hi(0x30000), %r27 | |
3203 | #endif | |
3204 | andn %r28, %r27, %r28 | |
3205 | ta T_CHANGE_HPRIV | |
3206 | stxa %r28, [%g0] 0x73 | |
3207 | .word 0x99a449c5 ! 1: FDIVd fdivd %f48, %f36, %f12 | |
3208 | intvec_80_145: | |
3209 | .word 0x93b2c4d0 ! 346: FCMPNE32 fcmpne32 %d42, %d16, %r9 | |
3210 | .word 0x8584764e ! 347: WRCCR_I wr %r17, 0x164e, %ccr | |
3211 | .word 0xa9b284d2 ! 348: FCMPNE32 fcmpne32 %d10, %d18, %r20 | |
3212 | .word 0x19400001 ! 349: FBPUGE fbuge | |
3213 | .word 0x9f802e39 ! 349: SIR sir 0x0e39 | |
3214 | .word 0xd4dfc3c3 ! 350: LDXA_R ldxa [%r31, %r3] 0x1e, %r10 | |
3215 | .word 0x24cfc001 ! 351: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
3216 | .word 0x20800001 ! 352: BN bn,a <label_0x1> | |
3217 | .word 0xd497c603 ! 353: LDUHA_R lduha [%r31, %r3] 0x30, %r10 | |
3218 | .word 0x20800001 ! 353: BN bn,a <label_0x1> | |
3219 | memptr_80_148: | |
3220 | set 0x60140000, %r31 | |
3221 | rd %tick, %r28 | |
3222 | #if (MAX_THREADS == 8) | |
3223 | sethi %hi(0x33800), %r27 | |
3224 | #else | |
3225 | sethi %hi(0x30000), %r27 | |
3226 | #endif | |
3227 | andn %r28, %r27, %r28 | |
3228 | ta T_CHANGE_HPRIV | |
3229 | stxa %r28, [%g0] 0x73 | |
3230 | intvec_80_149: | |
3231 | .word 0xe1bfdb60 ! 354: STDFA_R stda %f16, [%r0, %r31] | |
3232 | .word 0x8584e7f8 ! 355: WRCCR_I wr %r19, 0x07f8, %ccr | |
3233 | .word 0x9f8024a0 ! 356: SIR sir 0x04a0 | |
3234 | .word 0xe19fde00 ! 357: LDDFA_R ldda [%r31, %r0], %f16 | |
3235 | .word 0x85826421 ! 357: WRCCR_I wr %r9, 0x0421, %ccr | |
3236 | rd %tick, %r28 | |
3237 | #if (MAX_THREADS == 8) | |
3238 | sethi %hi(0x33800), %r27 | |
3239 | #else | |
3240 | sethi %hi(0x30000), %r27 | |
3241 | #endif | |
3242 | andn %r28, %r27, %r28 | |
3243 | ta T_CHANGE_HPRIV | |
3244 | stxa %r28, [%g0] 0x73 | |
3245 | intvec_80_151: | |
3246 | .word 0x9ba489c6 ! 358: FDIVd fdivd %f18, %f6, %f44 | |
3247 | .word 0xc1bfdb60 ! 359: STDFA_R stda %f0, [%r0, %r31] | |
3248 | .word 0x20800001 ! 360: BN bn,a <label_0x1> | |
3249 | .word 0xa7a049d3 ! 361: FDIVd fdivd %f32, %f50, %f50 | |
3250 | .word 0xc19fc2c0 ! 361: LDDFA_R ldda [%r31, %r0], %f0 | |
3251 | #if (defined SPC || defined CMP1) | |
3252 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_152) + 16, 16, 16)) -> intp(0,0,9,,,,,1) | |
3253 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_152)&0xffffffff) + 40, 16, 16)) -> intp(2,0,14,,,,,1) | |
3254 | #else | |
3255 | set 0x820211b, %r28 | |
3256 | #if (MAX_THREADS == 8) | |
3257 | and %r28, 0x7ff, %r28 | |
3258 | #endif | |
3259 | stxa %r28, [%g0] 0x73 | |
3260 | #endif | |
3261 | intvec_80_152: | |
3262 | .word 0xe5e7dd40 ! 362: CASA_I casa [%r31] 0xea, %r0, %r18 | |
3263 | .word 0xc36fe160 ! 363: PREFETCH_I prefetch [%r31 + 0x0160], #one_read | |
3264 | .word 0x9f803c34 ! 364: SIR sir 0x1c34 | |
3265 | .word 0xd8dfc723 ! 365: LDXA_R ldxa [%r31, %r3] 0x39, %r12 | |
3266 | .word 0x99b7c4c1 ! 365: FCMPNE32 fcmpne32 %d62, %d32, %r12 | |
3267 | memptr_80_153: | |
3268 | set user_data_start, %r31 | |
3269 | #if (defined SPC || defined CMP1) | |
3270 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_154) + 8, 16, 16)) -> intp(4,0,24,,,,,1) | |
3271 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_154)&0xffffffff) + 56, 16, 16)) -> intp(5,0,31,,,,,1) | |
3272 | #else | |
3273 | set 0x1a60d62b, %r28 | |
3274 | #if (MAX_THREADS == 8) | |
3275 | and %r28, 0x7ff, %r28 | |
3276 | #endif | |
3277 | stxa %r28, [%g0] 0x73 | |
3278 | #endif | |
3279 | .word 0x93b044d0 ! 1: FCMPNE32 fcmpne32 %d32, %d16, %r9 | |
3280 | intvec_80_154: | |
3281 | .word 0xe19fde00 ! 366: LDDFA_R ldda [%r31, %r0], %f16 | |
3282 | .word 0x8582f150 ! 367: WRCCR_I wr %r11, 0x1150, %ccr | |
3283 | .word 0x95a4c9d2 ! 368: FDIVd fdivd %f50, %f18, %f10 | |
3284 | .word 0xe19fda00 ! 369: LDDFA_R ldda [%r31, %r0], %f16 | |
3285 | .word 0x8584bc22 ! 369: WRCCR_I wr %r18, 0x1c22, %ccr | |
3286 | #if (defined SPC || defined CMP1) | |
3287 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_156) + 16, 16, 16)) -> intp(1,0,2,,,,,1) | |
3288 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_156)&0xffffffff) + 16, 16, 16)) -> intp(4,0,7,,,,,1) | |
3289 | #else | |
3290 | set 0x3ce02ed8, %r28 | |
3291 | #if (MAX_THREADS == 8) | |
3292 | and %r28, 0x7ff, %r28 | |
3293 | #endif | |
3294 | stxa %r28, [%g0] 0x73 | |
3295 | #endif | |
3296 | .word 0xa7b444c5 ! 1: FCMPNE32 fcmpne32 %d48, %d36, %r19 | |
3297 | intvec_80_156: | |
3298 | memptr_80_157: | |
3299 | set 0x60540000, %r31 | |
3300 | #if (defined SPC || defined CMP1) | |
3301 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_158) + 48, 16, 16)) -> intp(5,0,24,,,,,1) | |
3302 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_158)&0xffffffff) + 40, 16, 16)) -> intp(4,0,28,,,,,1) | |
3303 | #else | |
3304 | set 0xcf00fbc, %r28 | |
3305 | #if (MAX_THREADS == 8) | |
3306 | and %r28, 0x7ff, %r28 | |
3307 | #endif | |
3308 | stxa %r28, [%g0] 0x73 | |
3309 | #endif | |
3310 | .word 0x9f8039cb ! 1: SIR sir 0x19cb | |
3311 | intvec_80_158: | |
3312 | .word 0xa5b0c4c9 ! 370: FCMPNE32 fcmpne32 %d34, %d40, %r18 | |
3313 | .word 0x8581730a ! 371: WRCCR_I wr %r5, 0x130a, %ccr | |
3314 | .word 0xa9a209d3 ! 372: FDIVd fdivd %f8, %f50, %f20 | |
3315 | .word 0xa7a409d0 ! 373: FDIVd fdivd %f16, %f16, %f50 | |
3316 | .word 0x8582adcd ! 373: WRCCR_I wr %r10, 0x0dcd, %ccr | |
3317 | #if (defined SPC || defined CMP1) | |
3318 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_160) + 24, 16, 16)) -> intp(7,0,6,,,,,1) | |
3319 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_160)&0xffffffff) + 16, 16, 16)) -> intp(0,0,12,,,,,1) | |
3320 | #else | |
3321 | set 0x96f0e597, %r28 | |
3322 | #if (MAX_THREADS == 8) | |
3323 | and %r28, 0x7ff, %r28 | |
3324 | #endif | |
3325 | stxa %r28, [%g0] 0x73 | |
3326 | #endif | |
3327 | intvec_80_160: | |
3328 | memptr_80_161: | |
3329 | set 0x60140000, %r31 | |
3330 | .word 0x95a289d0 ! 374: FDIVd fdivd %f10, %f16, %f10 | |
3331 | .word 0x8581b21b ! 375: WRCCR_I wr %r6, 0x121b, %ccr | |
3332 | .word 0x00800001 ! 376: BN bn <label_0x1> | |
3333 | .word 0xa9b044c5 ! 377: FCMPNE32 fcmpne32 %d32, %d36, %r20 | |
3334 | .word 0x00800001 ! 377: BN bn <label_0x1> | |
3335 | #if (defined SPC || defined CMP1) | |
3336 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_162) + 24, 16, 16)) -> intp(4,0,7,,,,,1) | |
3337 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_162)&0xffffffff) + 32, 16, 16)) -> intp(4,0,11,,,,,1) | |
3338 | #else | |
3339 | set 0x3ee0a253, %r28 | |
3340 | #if (MAX_THREADS == 8) | |
3341 | and %r28, 0x7ff, %r28 | |
3342 | #endif | |
3343 | stxa %r28, [%g0] 0x73 | |
3344 | #endif | |
3345 | .word 0xa1b404cb ! 1: FCMPNE32 fcmpne32 %d16, %d42, %r16 | |
3346 | intvec_80_162: | |
3347 | .word 0xa9a249c1 ! 378: FDIVd fdivd %f40, %f32, %f20 | |
3348 | .word 0x20800001 ! 379: BN bn,a <label_0x1> | |
3349 | .word 0xe19fde00 ! 380: LDDFA_R ldda [%r31, %r0], %f16 | |
3350 | .word 0x39400001 ! 381: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3351 | .word 0xc19fdf20 ! 381: LDDFA_R ldda [%r31, %r0], %f0 | |
3352 | .word 0xe297c380 ! 382: LDUHA_R lduha [%r31, %r0] 0x1c, %r17 | |
3353 | .word 0xc1bfde00 ! 383: STDFA_R stda %f0, [%r0, %r31] | |
3354 | .word 0xc3efe0e0 ! 384: PREFETCHA_I prefetcha [%r31, + 0x00e0] %asi, #one_read | |
3355 | .word 0xe29fc2c1 ! 385: LDDA_R ldda [%r31, %r1] 0x16, %r17 | |
3356 | .word 0xe21fe0e0 ! 385: LDD_I ldd [%r31 + 0x00e0], %r17 | |
3357 | .word 0xc1bfd920 ! 386: STDFA_R stda %f0, [%r0, %r31] | |
3358 | .word 0xc19fd920 ! 387: LDDFA_R ldda [%r31, %r0], %f0 | |
3359 | .word 0x00800001 ! 388: BN bn <label_0x1> | |
3360 | .word 0xc1bfda00 ! 389: STDFA_R stda %f0, [%r0, %r31] | |
3361 | .word 0x00800001 ! 389: BN bn <label_0x1> | |
3362 | .word 0xe51fe1e0 ! 390: LDDF_I ldd [%r31, 0x01e0], %f18 | |
3363 | .word 0x00800001 ! 391: BN bn <label_0x1> | |
3364 | .word 0x00800001 ! 392: BN bn <label_0x1> | |
3365 | .word 0xe5e7c402 ! 393: CASA_I casa [%r31] 0x20, %r2, %r18 | |
3366 | .word 0x00800001 ! 393: BN bn <label_0x1> | |
3367 | rd %tick, %r28 | |
3368 | #if (MAX_THREADS == 8) | |
3369 | sethi %hi(0x33800), %r27 | |
3370 | #else | |
3371 | sethi %hi(0x30000), %r27 | |
3372 | #endif | |
3373 | andn %r28, %r27, %r28 | |
3374 | ta T_CHANGE_HPRIV | |
3375 | stxa %r28, [%g0] 0x73 | |
3376 | intvec_80_165: | |
3377 | memptr_80_166: | |
3378 | set 0x60140000, %r31 | |
3379 | .word 0xa9a449c1 ! 394: FDIVd fdivd %f48, %f32, %f20 | |
3380 | .word 0x85817321 ! 395: WRCCR_I wr %r5, 0x1321, %ccr | |
3381 | .word 0xe33fe1a0 ! 396: STDF_I std %f17, [0x01a0, %r31] | |
3382 | .word 0xa3b404d3 ! 397: FCMPNE32 fcmpne32 %d16, %d50, %r17 | |
3383 | .word 0x85816e19 ! 397: WRCCR_I wr %r5, 0x0e19, %ccr | |
3384 | #if (defined SPC || defined CMP1) | |
3385 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_168) + 40, 16, 16)) -> intp(7,0,28,,,,,1) | |
3386 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_168)&0xffffffff) + 24, 16, 16)) -> intp(4,0,18,,,,,1) | |
3387 | #else | |
3388 | set 0xa0d02509, %r28 | |
3389 | #if (MAX_THREADS == 8) | |
3390 | and %r28, 0x7ff, %r28 | |
3391 | #endif | |
3392 | stxa %r28, [%g0] 0x73 | |
3393 | #endif | |
3394 | .word 0x93a2c9d2 ! 1: FDIVd fdivd %f42, %f18, %f40 | |
3395 | intvec_80_168: | |
3396 | .word 0xc1bfd960 ! 398: STDFA_R stda %f0, [%r0, %r31] | |
3397 | .word 0xc19fda00 ! 399: LDDFA_R ldda [%r31, %r0], %f0 | |
3398 | .word 0x9f803419 ! 400: SIR sir 0x1419 | |
3399 | .word 0xc1bfde00 ! 401: STDFA_R stda %f0, [%r0, %r31] | |
3400 | .word 0x19400001 ! 401: FBPUGE fbuge | |
3401 | memptr_80_169: | |
3402 | set 0x60340000, %r31 | |
3403 | #if (defined SPC || defined CMP1) | |
3404 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_170) + 40, 16, 16)) -> intp(0,0,4,,,,,1) | |
3405 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_170)&0xffffffff) + 16, 16, 16)) -> intp(3,0,5,,,,,1) | |
3406 | #else | |
3407 | set 0x7e05a56, %r28 | |
3408 | #if (MAX_THREADS == 8) | |
3409 | and %r28, 0x7ff, %r28 | |
3410 | #endif | |
3411 | stxa %r28, [%g0] 0x73 | |
3412 | #endif | |
3413 | .word 0x19400001 ! 1: FBPUGE fbuge | |
3414 | intvec_80_170: | |
3415 | .word 0xe53fe170 ! 402: STDF_I std %f18, [0x0170, %r31] | |
3416 | .word 0x858464c4 ! 403: WRCCR_I wr %r17, 0x04c4, %ccr | |
3417 | .word 0x9f802680 ! 404: SIR sir 0x0680 | |
3418 | .word 0xd33fe1c0 ! 405: STDF_I std %f9, [0x01c0, %r31] | |
3419 | .word 0x85842d2e ! 405: WRCCR_I wr %r16, 0x0d2e, %ccr | |
3420 | #if (defined SPC || defined CMP1) | |
3421 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_172) + 24, 16, 16)) -> intp(3,0,2,,,,,1) | |
3422 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_172)&0xffffffff) + 56, 16, 16)) -> intp(3,0,10,,,,,1) | |
3423 | #else | |
3424 | set 0x31c04f51, %r28 | |
3425 | #if (MAX_THREADS == 8) | |
3426 | and %r28, 0x7ff, %r28 | |
3427 | #endif | |
3428 | stxa %r28, [%g0] 0x73 | |
3429 | #endif | |
3430 | intvec_80_172: | |
3431 | .word 0xd297c381 ! 406: LDUHA_R lduha [%r31, %r1] 0x1c, %r9 | |
3432 | .word 0x87afca41 ! 407: FCMPd fcmpd %fcc<n>, %f62, %f32 | |
3433 | .word 0x95a049c3 ! 408: FDIVd fdivd %f32, %f34, %f10 | |
3434 | .word 0xd53fe060 ! 409: STDF_I std %f10, [0x0060, %r31] | |
3435 | .word 0xa9b404cd ! 409: FCMPNE32 fcmpne32 %d16, %d44, %r20 | |
3436 | #if (defined SPC || defined CMP1) | |
3437 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_174) + 0, 16, 16)) -> intp(7,0,8,,,,,1) | |
3438 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_174)&0xffffffff) + 16, 16, 16)) -> intp(1,0,7,,,,,1) | |
3439 | #else | |
3440 | set 0x2f906fdc, %r28 | |
3441 | #if (MAX_THREADS == 8) | |
3442 | and %r28, 0x7ff, %r28 | |
3443 | #endif | |
3444 | stxa %r28, [%g0] 0x73 | |
3445 | #endif | |
3446 | intvec_80_174: | |
3447 | .word 0xd11fe000 ! 410: LDDF_I ldd [%r31, 0x0000], %f8 | |
3448 | .word 0xc19fde00 ! 411: LDDFA_R ldda [%r31, %r0], %f0 | |
3449 | .word 0x93b484c9 ! 412: FCMPNE32 fcmpne32 %d18, %d40, %r9 | |
3450 | .word 0xe497d040 ! 413: LDUHA_R lduha [%r31, %r0] 0x82, %r18 | |
3451 | .word 0x20800001 ! 413: BN bn,a <label_0x1> | |
3452 | .word 0xe5e7c383 ! 414: CASA_I casa [%r31] 0x1c, %r3, %r18 | |
3453 | .word 0x87afca43 ! 415: FCMPd fcmpd %fcc<n>, %f62, %f34 | |
3454 | .word 0xc1bfc2c0 ! 416: STDFA_R stda %f0, [%r0, %r31] | |
3455 | .word 0x9f802190 ! 417: SIR sir 0x0190 | |
3456 | .word 0x00800001 ! 417: BN bn <label_0x1> | |
3457 | #if (defined SPC || defined CMP1) | |
3458 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_176) + 32, 16, 16)) -> intp(0,0,27,,,,,1) | |
3459 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_176)&0xffffffff) + 0, 16, 16)) -> intp(6,0,13,,,,,1) | |
3460 | #else | |
3461 | set 0x673083eb, %r28 | |
3462 | #if (MAX_THREADS == 8) | |
3463 | and %r28, 0x7ff, %r28 | |
3464 | #endif | |
3465 | stxa %r28, [%g0] 0x73 | |
3466 | #endif | |
3467 | .word 0xa3b044c2 ! 1: FCMPNE32 fcmpne32 %d32, %d2, %r17 | |
3468 | intvec_80_176: | |
3469 | .word 0xa3a4c9c8 ! 418: FDIVd fdivd %f50, %f8, %f48 | |
3470 | .word 0xe63fe1b0 ! 419: STD_I std %r19, [%r31 + 0x01b0] | |
3471 | .word 0xc3efe050 ! 420: PREFETCHA_I prefetcha [%r31, + 0x0050] %asi, #one_read | |
3472 | .word 0x39400001 ! 421: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3473 | .word 0x99a7c9c1 ! 421: FDIVd fdivd %f62, %f32, %f12 | |
3474 | memptr_80_177: | |
3475 | set user_data_start, %r31 | |
3476 | #if (defined SPC || defined CMP1) | |
3477 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_178) + 40, 16, 16)) -> intp(4,0,30,,,,,1) | |
3478 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_178)&0xffffffff) + 56, 16, 16)) -> intp(0,0,17,,,,,1) | |
3479 | #else | |
3480 | set 0xc4a0b736, %r28 | |
3481 | #if (MAX_THREADS == 8) | |
3482 | and %r28, 0x7ff, %r28 | |
3483 | #endif | |
3484 | stxa %r28, [%g0] 0x73 | |
3485 | #endif | |
3486 | intvec_80_178: | |
3487 | .word 0xd897c540 ! 422: LDUHA_R lduha [%r31, %r0] 0x2a, %r12 | |
3488 | .word 0x85842161 ! 423: WRCCR_I wr %r16, 0x0161, %ccr | |
3489 | .word 0x91b104d1 ! 424: FCMPNE32 fcmpne32 %d4, %d48, %r8 | |
3490 | .word 0xe43fe0c0 ! 425: STD_I std %r18, [%r31 + 0x00c0] | |
3491 | .word 0x8581e348 ! 425: WRCCR_I wr %r7, 0x0348, %ccr | |
3492 | #if (defined SPC || defined CMP1) | |
3493 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_180) + 40, 16, 16)) -> intp(4,0,20,,,,,1) | |
3494 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_180)&0xffffffff) + 56, 16, 16)) -> intp(4,0,27,,,,,1) | |
3495 | #else | |
3496 | set 0x25a04ee8, %r28 | |
3497 | #if (MAX_THREADS == 8) | |
3498 | and %r28, 0x7ff, %r28 | |
3499 | #endif | |
3500 | stxa %r28, [%g0] 0x73 | |
3501 | #endif | |
3502 | .word 0x9f80240c ! 1: SIR sir 0x040c | |
3503 | intvec_80_180: | |
3504 | .word 0xc3efe070 ! 426: PREFETCHA_I prefetcha [%r31, + 0x0070] %asi, #one_read | |
3505 | .word 0x9ba7c9c2 ! 427: FDIVd fdivd %f62, %f2, %f44 | |
3506 | .word 0x95b484c8 ! 428: FCMPNE32 fcmpne32 %d18, %d8, %r10 | |
3507 | .word 0xd51fe1d0 ! 429: LDDF_I ldd [%r31, 0x01d0], %f10 | |
3508 | .word 0xa5a089cd ! 429: FDIVd fdivd %f2, %f44, %f18 | |
3509 | .word 0xe41fe0d0 ! 430: LDD_I ldd [%r31 + 0x00d0], %r18 | |
3510 | .word 0xe1bfdb60 ! 431: STDFA_R stda %f16, [%r0, %r31] | |
3511 | .word 0xe5e7c380 ! 432: CASA_I casa [%r31] 0x1c, %r0, %r18 | |
3512 | .word 0xe41fe040 ! 433: LDD_I ldd [%r31 + 0x0040], %r18 | |
3513 | .word 0xe41fe0b0 ! 433: LDD_I ldd [%r31 + 0x00b0], %r18 | |
3514 | rd %tick, %r28 | |
3515 | #if (MAX_THREADS == 8) | |
3516 | sethi %hi(0x33800), %r27 | |
3517 | #else | |
3518 | sethi %hi(0x30000), %r27 | |
3519 | #endif | |
3520 | andn %r28, %r27, %r28 | |
3521 | ta T_CHANGE_HPRIV | |
3522 | stxa %r28, [%g0] 0x73 | |
3523 | intvec_80_183: | |
3524 | .word 0x20800001 ! 434: BN bn,a <label_0x1> | |
3525 | .word 0x20800001 ! 435: BN bn,a <label_0x1> | |
3526 | .word 0xa5a0c9d3 ! 436: FDIVd fdivd %f34, %f50, %f18 | |
3527 | .word 0xe19fd920 ! 437: LDDFA_R ldda [%r31, %r0], %f16 | |
3528 | .word 0x9f80359c ! 437: SIR sir 0x159c | |
3529 | memptr_80_185: | |
3530 | set 0x60340000, %r31 | |
3531 | .word 0x9f802050 ! 438: SIR sir 0x0050 | |
3532 | .word 0x85833163 ! 439: WRCCR_I wr %r12, 0x1163, %ccr | |
3533 | .word 0xd13fe0b0 ! 440: STDF_I std %f8, [0x00b0, %r31] | |
3534 | .word 0xc32fe070 ! 441: STXFSR_I st-sfr %f1, [0x0070, %r31] | |
3535 | .word 0x858431fb ! 441: WRCCR_I wr %r16, 0x11fb, %ccr | |
3536 | #if (defined SPC || defined CMP1) | |
3537 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_186) + 8, 16, 16)) -> intp(7,0,1,,,,,1) | |
3538 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_186)&0xffffffff) + 24, 16, 16)) -> intp(5,0,12,,,,,1) | |
3539 | #else | |
3540 | set 0xcfd054e0, %r28 | |
3541 | #if (MAX_THREADS == 8) | |
3542 | and %r28, 0x7ff, %r28 | |
3543 | #endif | |
3544 | stxa %r28, [%g0] 0x73 | |
3545 | #endif | |
3546 | .word 0x93b304d0 ! 1: FCMPNE32 fcmpne32 %d12, %d16, %r9 | |
3547 | intvec_80_186: | |
3548 | memptr_80_187: | |
3549 | set 0x60140000, %r31 | |
3550 | #if (defined SPC || defined CMP1) | |
3551 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_188) + 16, 16, 16)) -> intp(1,0,2,,,,,1) | |
3552 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_188)&0xffffffff) + 24, 16, 16)) -> intp(7,0,20,,,,,1) | |
3553 | #else | |
3554 | set 0xe3403428, %r28 | |
3555 | #if (MAX_THREADS == 8) | |
3556 | and %r28, 0x7ff, %r28 | |
3557 | #endif | |
3558 | stxa %r28, [%g0] 0x73 | |
3559 | #endif | |
3560 | intvec_80_188: | |
3561 | .word 0x97b104d1 ! 442: FCMPNE32 fcmpne32 %d4, %d48, %r11 | |
3562 | .word 0x8584aed0 ! 443: WRCCR_I wr %r18, 0x0ed0, %ccr | |
3563 | .word 0x9f8025ca ! 444: SIR sir 0x05ca | |
3564 | .word 0x9f802418 ! 445: SIR sir 0x0418 | |
3565 | .word 0x85852841 ! 445: WRCCR_I wr %r20, 0x0841, %ccr | |
3566 | rd %tick, %r28 | |
3567 | #if (MAX_THREADS == 8) | |
3568 | sethi %hi(0x33800), %r27 | |
3569 | #else | |
3570 | sethi %hi(0x30000), %r27 | |
3571 | #endif | |
3572 | andn %r28, %r27, %r28 | |
3573 | ta T_CHANGE_HPRIV | |
3574 | stxa %r28, [%g0] 0x73 | |
3575 | .word 0xa1a409d4 ! 1: FDIVd fdivd %f16, %f20, %f16 | |
3576 | intvec_80_189: | |
3577 | .word 0x20800001 ! 446: BN bn,a <label_0x1> | |
3578 | .word 0xe19fc2c0 ! 447: LDDFA_R ldda [%r31, %r0], %f16 | |
3579 | .word 0xa7b044d2 ! 448: FCMPNE32 fcmpne32 %d32, %d18, %r19 | |
3580 | .word 0xc19fc3e0 ! 449: LDDFA_R ldda [%r31, %r0], %f0 | |
3581 | .word 0x91a489d3 ! 449: FDIVd fdivd %f18, %f50, %f8 | |
3582 | .word 0xe21fe080 ! 450: LDD_I ldd [%r31 + 0x0080], %r17 | |
3583 | .word 0x20800001 ! 451: BN bn,a <label_0x1> | |
3584 | .word 0xe1bfdc00 ! 452: STDFA_R stda %f16, [%r0, %r31] | |
3585 | .word 0x9f802180 ! 453: SIR sir 0x0180 | |
3586 | .word 0xc19fd920 ! 453: LDDFA_R ldda [%r31, %r0], %f0 | |
3587 | rd %tick, %r28 | |
3588 | #if (MAX_THREADS == 8) | |
3589 | sethi %hi(0x33800), %r27 | |
3590 | #else | |
3591 | sethi %hi(0x30000), %r27 | |
3592 | #endif | |
3593 | andn %r28, %r27, %r28 | |
3594 | ta T_CHANGE_HPRIV | |
3595 | stxa %r28, [%g0] 0x73 | |
3596 | .word 0x9f803ef6 ! 1: SIR sir 0x1ef6 | |
3597 | intvec_80_191: | |
3598 | #if (defined SPC || defined CMP1) | |
3599 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_192) + 40, 16, 16)) -> intp(6,0,20,,,,,1) | |
3600 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_192)&0xffffffff) + 56, 16, 16)) -> intp(5,0,8,,,,,1) | |
3601 | #else | |
3602 | set 0xaf200b70, %r28 | |
3603 | #if (MAX_THREADS == 8) | |
3604 | and %r28, 0x7ff, %r28 | |
3605 | #endif | |
3606 | stxa %r28, [%g0] 0x73 | |
3607 | #endif | |
3608 | intvec_80_192: | |
3609 | .word 0x93b504cd ! 454: FCMPNE32 fcmpne32 %d20, %d44, %r9 | |
3610 | .word 0x39400001 ! 455: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3611 | .word 0x93b444c2 ! 456: FCMPNE32 fcmpne32 %d48, %d2, %r9 | |
3612 | .word 0x99b4c4c6 ! 457: FCMPNE32 fcmpne32 %d50, %d6, %r12 | |
3613 | .word 0x9ba449d2 ! 457: FDIVd fdivd %f48, %f18, %f44 | |
3614 | #if (defined SPC || defined CMP1) | |
3615 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_194) + 32, 16, 16)) -> intp(2,0,11,,,,,1) | |
3616 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_194)&0xffffffff) + 16, 16, 16)) -> intp(3,0,8,,,,,1) | |
3617 | #else | |
3618 | set 0x26305db3, %r28 | |
3619 | #if (MAX_THREADS == 8) | |
3620 | and %r28, 0x7ff, %r28 | |
3621 | #endif | |
3622 | stxa %r28, [%g0] 0x73 | |
3623 | #endif | |
3624 | intvec_80_194: | |
3625 | .word 0xdb3fe1a0 ! 458: STDF_I std %f13, [0x01a0, %r31] | |
3626 | .word 0xc36fe030 ! 459: PREFETCH_I prefetch [%r31 + 0x0030], #one_read | |
3627 | .word 0x93a509ca ! 460: FDIVd fdivd %f20, %f10, %f40 | |
3628 | .word 0xc32fe140 ! 461: STXFSR_I st-sfr %f1, [0x0140, %r31] | |
3629 | .word 0x39400001 ! 461: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3630 | #if (defined SPC || defined CMP1) | |
3631 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_196) + 48, 16, 16)) -> intp(6,0,11,,,,,1) | |
3632 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_80_196)&0xffffffff) + 32, 16, 16)) -> intp(2,0,1,,,,,1) | |
3633 | #else | |
3634 | set 0xc980a480, %r28 | |
3635 | #if (MAX_THREADS == 8) | |
3636 | and %r28, 0x7ff, %r28 | |
3637 | #endif | |
3638 | stxa %r28, [%g0] 0x73 | |
3639 | #endif | |
3640 | intvec_80_196: | |
3641 | .word 0xe91fe0a0 ! 462: LDDF_I ldd [%r31, 0x00a0], %f20 | |
3642 | .word 0xa9a7c9c0 ! 463: FDIVd fdivd %f62, %f0, %f20 | |
3643 | .word 0x9f803a12 ! 464: SIR sir 0x1a12 | |
3644 | .word 0xe89fc242 ! 465: LDDA_R ldda [%r31, %r2] 0x12, %r20 | |
3645 | .word 0xa9a7c9c3 ! 465: FDIVd fdivd %f62, %f34, %f20 | |
3646 | memptr_80_198: | |
3647 | set user_data_start, %r31 | |
3648 | rd %tick, %r28 | |
3649 | #if (MAX_THREADS == 8) | |
3650 | sethi %hi(0x33800), %r27 | |
3651 | #else | |
3652 | sethi %hi(0x30000), %r27 | |
3653 | #endif | |
3654 | andn %r28, %r27, %r28 | |
3655 | ta T_CHANGE_HPRIV | |
3656 | stxa %r28, [%g0] 0x73 | |
3657 | .word 0x9f803a24 ! 1: SIR sir 0x1a24 | |
3658 | intvec_80_199: | |
3659 | .word 0xdadfc242 ! 466: LDXA_R ldxa [%r31, %r2] 0x12, %r13 | |
3660 | .word 0x85833f6c ! 467: WRCCR_I wr %r12, 0x1f6c, %ccr | |
3661 | .word 0x9f80345c ! 468: SIR sir 0x145c | |
3662 | .word 0xda97c2c1 ! 469: LDUHA_R lduha [%r31, %r1] 0x16, %r13 | |
3663 | .word 0x95a209c3 ! 469: FDIVd fdivd %f8, %f34, %f10 | |
3664 | .word 0x20800001 ! 470: BN bn,a <label_0x1> | |
3665 | .word 0xc36fe0c0 ! 471: PREFETCH_I prefetch [%r31 + 0x00c0], #one_read | |
3666 | .word 0xd7e7d163 ! 472: CASA_I casa [%r31] 0x8b, %r3, %r11 | |
3667 | .word 0xc1bfde00 ! 473: STDFA_R stda %f0, [%r0, %r31] | |
3668 | .word 0xd697d142 ! 473: LDUHA_R lduha [%r31, %r2] 0x8a, %r11 | |
3669 | rd %tick, %r28 | |
3670 | #if (MAX_THREADS == 8) | |
3671 | sethi %hi(0x33800), %r27 | |
3672 | #else | |
3673 | sethi %hi(0x30000), %r27 | |
3674 | #endif | |
3675 | andn %r28, %r27, %r28 | |
3676 | ta T_CHANGE_HPRIV | |
3677 | stxa %r28, [%g0] 0x73 | |
3678 | intvec_80_201: | |
3679 | memptr_80_202: | |
3680 | set 0x60340000, %r31 | |
3681 | .word 0x39400001 ! 474: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3682 | .word 0x85853c3c ! 475: WRCCR_I wr %r20, 0x1c3c, %ccr | |
3683 | .word 0xc1bfdb60 ! 476: STDFA_R stda %f0, [%r0, %r31] | |
3684 | .word 0x9f802981 ! 477: SIR sir 0x0981 | |
3685 | .word 0x8580e1e0 ! 477: WRCCR_I wr %r3, 0x01e0, %ccr | |
3686 | .word 0xd71fe180 ! 478: LDDF_I ldd [%r31, 0x0180], %f11 | |
3687 | .word 0x00800001 ! 479: BN bn <label_0x1> | |
3688 | .word 0xc1bfdb60 ! 480: STDFA_R stda %f0, [%r0, %r31] | |
3689 | .word 0xd69fc381 ! 481: LDDA_R ldda [%r31, %r1] 0x1c, %r11 | |
3690 | .word 0xc1bfda00 ! 481: STDFA_R stda %f0, [%r0, %r31] | |
3691 | memptr_80_205: | |
3692 | set 0x60140000, %r31 | |
3693 | .word 0xd69fd062 ! 482: LDDA_R ldda [%r31, %r2] 0x83, %r11 | |
3694 | .word 0x8584216d ! 483: WRCCR_I wr %r16, 0x016d, %ccr | |
3695 | .word 0xd63fe140 ! 484: STD_I std %r11, [%r31 + 0x0140] | |
3696 | .word 0x9f8021a0 ! 485: SIR sir 0x01a0 | |
3697 | .word 0xd71fe020 ! 485: LDDF_I ldd [%r31, 0x0020], %f11 | |
3698 | rd %tick, %r28 | |
3699 | #if (MAX_THREADS == 8) | |
3700 | sethi %hi(0x33800), %r27 | |
3701 | #else | |
3702 | sethi %hi(0x30000), %r27 | |
3703 | #endif | |
3704 | andn %r28, %r27, %r28 | |
3705 | ta T_CHANGE_HPRIV | |
3706 | stxa %r28, [%g0] 0x73 | |
3707 | intvec_80_207: | |
3708 | .word 0x19400001 ! 486: FBPUGE fbuge | |
3709 | .word 0xc1bfda00 ! 487: STDFA_R stda %f0, [%r0, %r31] | |
3710 | .word 0xd097d162 ! 488: LDUHA_R lduha [%r31, %r2] 0x8b, %r8 | |
3711 | .word 0x9bb1c4d3 ! 489: FCMPNE32 fcmpne32 %d38, %d50, %r13 | |
3712 | .word 0x00800001 ! 489: BN bn <label_0x1> | |
3713 | .word 0xa5a00552 ! 1: FSQRTd fsqrt | |
3714 | memptr_80_209: | |
3715 | set 0x60140000, %r31 | |
3716 | .word 0xd2dfc283 ! 490: LDXA_R ldxa [%r31, %r3] 0x14, %r9 | |
3717 | .word 0x8584bc1f ! 491: WRCCR_I wr %r18, 0x1c1f, %ccr | |
3718 | .word 0xc1bfc3e0 ! 492: STDFA_R stda %f0, [%r0, %r31] | |
3719 | .word 0xd2dfdc42 ! 493: LDXA_R ldxa [%r31, %r2] 0xe2, %r9 | |
3720 | .word 0xe19fda00 ! 493: LDDFA_R ldda [%r31, %r0], %f16 | |
3721 | memptr_80_211: | |
3722 | set 0x60740000, %r31 | |
3723 | .word 0xd2dfc3c1 ! 494: LDXA_R ldxa [%r31, %r1] 0x1e, %r9 | |
3724 | .word 0x8581b7b5 ! 495: WRCCR_I wr %r6, 0x17b5, %ccr | |
3725 | .word 0x00800001 ! 496: BN bn <label_0x1> | |
3726 | .word 0xd297c6c3 ! 497: LDUHA_R lduha [%r31, %r3] 0x36, %r9 | |
3727 | .word 0x85846fa7 ! 497: WRCCR_I wr %r17, 0x0fa7, %ccr | |
3728 | .word 0xc19fd960 ! 498: LDDFA_R ldda [%r31, %r0], %f0 | |
3729 | .word 0xc1bfdb60 ! 499: STDFA_R stda %f0, [%r0, %r31] | |
3730 | .word 0xd33fe0a0 ! 500: STDF_I std %f9, [0x00a0, %r31] | |
3731 | .word 0xc1bfd960 ! 501: STDFA_R stda %f0, [%r0, %r31] | |
3732 | .word 0xc19fd960 ! 501: LDDFA_R ldda [%r31, %r0], %f0 | |
3733 | nop | |
3734 | nop | |
3735 | ta T_CHANGE_PRIV | |
3736 | wrpr %g0, %g0, %gl | |
3737 | nop | |
3738 | nop | |
3739 | .text | |
3740 | setx join_lbl_0_0, %g1, %g2 | |
3741 | jmp %g2 | |
3742 | nop | |
3743 | fork_lbl_0_7: | |
3744 | .word 0xc19fc2c0 ! 2: LDDFA_R ldda [%r31, %r0], %f0 | |
3745 | .word 0xd03fe1f0 ! 3: STD_I std %r8, [%r31 + 0x01f0] | |
3746 | .word 0xd1e7c282 ! 4: CASA_I casa [%r31] 0x14, %r2, %r8 | |
3747 | .word 0x20800001 ! 5: BN bn,a <label_0x1> | |
3748 | .word 0xc32fe150 ! 5: STXFSR_I st-sfr %f1, [0x0150, %r31] | |
3749 | #if (defined SPC || defined CMP1) | |
3750 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_2) + 32, 16, 16)) -> intp(7,0,18,,,,,1) | |
3751 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_2)&0xffffffff) + 56, 16, 16)) -> intp(0,0,5,,,,,1) | |
3752 | #else | |
3753 | set 0x575090ce, %r28 | |
3754 | #if (MAX_THREADS == 8) | |
3755 | and %r28, 0x7ff, %r28 | |
3756 | #endif | |
3757 | stxa %r28, [%g0] 0x73 | |
3758 | #endif | |
3759 | .word 0xa7b284cd ! 1: FCMPNE32 fcmpne32 %d10, %d44, %r19 | |
3760 | intvec_40_2: | |
3761 | rd %tick, %r28 | |
3762 | #if (MAX_THREADS == 8) | |
3763 | sethi %hi(0x33800), %r27 | |
3764 | #else | |
3765 | sethi %hi(0x30000), %r27 | |
3766 | #endif | |
3767 | andn %r28, %r27, %r28 | |
3768 | ta T_CHANGE_HPRIV | |
3769 | stxa %r28, [%g0] 0x73 | |
3770 | .word 0x19400001 ! 1: FBPUGE fbuge | |
3771 | intvec_40_3: | |
3772 | .word 0x39400001 ! 6: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3773 | .word 0xc1bfde00 ! 7: STDFA_R stda %f0, [%r0, %r31] | |
3774 | .word 0xa1b444d3 ! 8: FCMPNE32 fcmpne32 %d48, %d50, %r16 | |
3775 | .word 0xa9a409c4 ! 9: FDIVd fdivd %f16, %f4, %f20 | |
3776 | .word 0x00800001 ! 9: BN bn <label_0x1> | |
3777 | memptr_40_5: | |
3778 | set 0x60340000, %r31 | |
3779 | .word 0xd3e7c380 ! 10: CASA_I casa [%r31] 0x1c, %r0, %r9 | |
3780 | .word 0x8580606d ! 11: WRCCR_I wr %r1, 0x006d, %ccr | |
3781 | .word 0xc19fdc00 ! 12: LDDFA_R ldda [%r31, %r0], %f0 | |
3782 | .word 0xd23fe030 ! 13: STD_I std %r9, [%r31 + 0x0030] | |
3783 | .word 0xc1bfdb60 ! 13: STDFA_R stda %f0, [%r0, %r31] | |
3784 | memptr_40_6: | |
3785 | set user_data_start, %r31 | |
3786 | .word 0xe19fc3e0 ! 14: LDDFA_R ldda [%r31, %r0], %f16 | |
3787 | .word 0x85827175 ! 15: WRCCR_I wr %r9, 0x1175, %ccr | |
3788 | .word 0xc19fc2c0 ! 16: LDDFA_R ldda [%r31, %r0], %f0 | |
3789 | .word 0xe1bfd920 ! 17: STDFA_R stda %f16, [%r0, %r31] | |
3790 | .word 0x00800001 ! 17: BN bn <label_0x1> | |
3791 | memptr_40_8: | |
3792 | set 0x60140000, %r31 | |
3793 | rd %tick, %r28 | |
3794 | #if (MAX_THREADS == 8) | |
3795 | sethi %hi(0x33800), %r27 | |
3796 | #else | |
3797 | sethi %hi(0x30000), %r27 | |
3798 | #endif | |
3799 | andn %r28, %r27, %r28 | |
3800 | ta T_CHANGE_HPRIV | |
3801 | stxa %r28, [%g0] 0x73 | |
3802 | .word 0xa7b184ca ! 1: FCMPNE32 fcmpne32 %d6, %d10, %r19 | |
3803 | intvec_40_9: | |
3804 | .word 0x9f8020e0 ! 18: SIR sir 0x00e0 | |
3805 | .word 0x8584207f ! 19: WRCCR_I wr %r16, 0x007f, %ccr | |
3806 | .word 0x9f802fec ! 20: SIR sir 0x0fec | |
3807 | .word 0xd11fe0d0 ! 21: LDDF_I ldd [%r31, 0x00d0], %f8 | |
3808 | .word 0x85847f24 ! 21: WRCCR_I wr %r17, 0x1f24, %ccr | |
3809 | rd %tick, %r28 | |
3810 | #if (MAX_THREADS == 8) | |
3811 | sethi %hi(0x33800), %r27 | |
3812 | #else | |
3813 | sethi %hi(0x30000), %r27 | |
3814 | #endif | |
3815 | andn %r28, %r27, %r28 | |
3816 | ta T_CHANGE_HPRIV | |
3817 | stxa %r28, [%g0] 0x73 | |
3818 | intvec_40_11: | |
3819 | #if (defined SPC || defined CMP1) | |
3820 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_12) + 48, 16, 16)) -> intp(3,0,22,,,,,1) | |
3821 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_12)&0xffffffff) + 48, 16, 16)) -> intp(3,0,14,,,,,1) | |
3822 | #else | |
3823 | set 0xdde04ca4, %r28 | |
3824 | #if (MAX_THREADS == 8) | |
3825 | and %r28, 0x7ff, %r28 | |
3826 | #endif | |
3827 | stxa %r28, [%g0] 0x73 | |
3828 | #endif | |
3829 | intvec_40_12: | |
3830 | .word 0x9f80287a ! 22: SIR sir 0x087a | |
3831 | .word 0xc19fd920 ! 23: LDDFA_R ldda [%r31, %r0], %f0 | |
3832 | .word 0x19400001 ! 24: FBPUGE fbuge | |
3833 | .word 0xa7b1c4c7 ! 25: FCMPNE32 fcmpne32 %d38, %d38, %r19 | |
3834 | .word 0x00800001 ! 25: BN bn <label_0x1> | |
3835 | memptr_40_14: | |
3836 | set 0x60540000, %r31 | |
3837 | rd %tick, %r28 | |
3838 | #if (MAX_THREADS == 8) | |
3839 | sethi %hi(0x33800), %r27 | |
3840 | #else | |
3841 | sethi %hi(0x30000), %r27 | |
3842 | #endif | |
3843 | andn %r28, %r27, %r28 | |
3844 | ta T_CHANGE_HPRIV | |
3845 | stxa %r28, [%g0] 0x73 | |
3846 | intvec_40_15: | |
3847 | .word 0xe73fe090 ! 26: STDF_I std %f19, [0x0090, %r31] | |
3848 | .word 0x85816016 ! 27: WRCCR_I wr %r5, 0x0016, %ccr | |
3849 | .word 0x39400001 ! 28: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3850 | .word 0xe69fc723 ! 29: LDDA_R ldda [%r31, %r3] 0x39, %r19 | |
3851 | .word 0x8584ef9e ! 29: WRCCR_I wr %r19, 0x0f9e, %ccr | |
3852 | .word 0x20800001 ! 30: BN bn,a <label_0x1> | |
3853 | .word 0x20800001 ! 31: BN bn,a <label_0x1> | |
3854 | .word 0xe19fda00 ! 32: LDDFA_R ldda [%r31, %r0], %f16 | |
3855 | .word 0xc19fc2c0 ! 33: LDDFA_R ldda [%r31, %r0], %f0 | |
3856 | .word 0x20800001 ! 33: BN bn,a <label_0x1> | |
3857 | .word 0xe73fe170 ! 34: STDF_I std %f19, [0x0170, %r31] | |
3858 | .word 0xe63fe010 ! 35: STD_I std %r19, [%r31 + 0x0010] | |
3859 | .word 0xc1bfde00 ! 36: STDFA_R stda %f0, [%r0, %r31] | |
3860 | .word 0xe71fe1f0 ! 37: LDDF_I ldd [%r31, 0x01f0], %f19 | |
3861 | .word 0x20800001 ! 37: BN bn,a <label_0x1> | |
3862 | rd %tick, %r28 | |
3863 | #if (MAX_THREADS == 8) | |
3864 | sethi %hi(0x33800), %r27 | |
3865 | #else | |
3866 | sethi %hi(0x30000), %r27 | |
3867 | #endif | |
3868 | andn %r28, %r27, %r28 | |
3869 | ta T_CHANGE_HPRIV | |
3870 | stxa %r28, [%g0] 0x73 | |
3871 | intvec_40_19: | |
3872 | memptr_40_20: | |
3873 | set 0x60740000, %r31 | |
3874 | .word 0xa3a1c9ca ! 38: FDIVd fdivd %f38, %f10, %f48 | |
3875 | .word 0x8580b4bf ! 39: WRCCR_I wr %r2, 0x14bf, %ccr | |
3876 | .word 0xe297d040 ! 40: LDUHA_R lduha [%r31, %r0] 0x82, %r17 | |
3877 | .word 0x91a189cc ! 41: FDIVd fdivd %f6, %f12, %f8 | |
3878 | .word 0x8584e7eb ! 41: WRCCR_I wr %r19, 0x07eb, %ccr | |
3879 | #if (defined SPC || defined CMP1) | |
3880 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_22) + 8, 16, 16)) -> intp(3,0,0,,,,,1) | |
3881 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_22)&0xffffffff) + 8, 16, 16)) -> intp(7,0,0,,,,,1) | |
3882 | #else | |
3883 | set 0xd920a4f3, %r28 | |
3884 | #if (MAX_THREADS == 8) | |
3885 | and %r28, 0x7ff, %r28 | |
3886 | #endif | |
3887 | stxa %r28, [%g0] 0x73 | |
3888 | #endif | |
3889 | intvec_40_22: | |
3890 | .word 0xc1bfc3e0 ! 42: STDFA_R stda %f0, [%r0, %r31] | |
3891 | .word 0x24cfc001 ! 43: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
3892 | .word 0x39400001 ! 44: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3893 | .word 0xe1bfc2c0 ! 45: STDFA_R stda %f16, [%r0, %r31] | |
3894 | .word 0x9f802c33 ! 45: SIR sir 0x0c33 | |
3895 | .word 0xc19fd920 ! 46: LDDFA_R ldda [%r31, %r0], %f0 | |
3896 | .word 0x20800001 ! 47: BN bn,a <label_0x1> | |
3897 | .word 0xe93fe1c0 ! 48: STDF_I std %f20, [0x01c0, %r31] | |
3898 | .word 0xe1bfc2c0 ! 49: STDFA_R stda %f16, [%r0, %r31] | |
3899 | .word 0xe897c602 ! 49: LDUHA_R lduha [%r31, %r2] 0x30, %r20 | |
3900 | .word 0xe897dd40 ! 50: LDUHA_R lduha [%r31, %r0] 0xea, %r20 | |
3901 | .word 0x20800001 ! 51: BN bn,a <label_0x1> | |
3902 | .word 0x9f802030 ! 52: SIR sir 0x0030 | |
3903 | .word 0x9f802120 ! 53: SIR sir 0x0120 | |
3904 | .word 0xe19fdc00 ! 53: LDDFA_R ldda [%r31, %r0], %f16 | |
3905 | #if (defined SPC || defined CMP1) | |
3906 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_26) + 0, 16, 16)) -> intp(0,0,2,,,,,1) | |
3907 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_26)&0xffffffff) + 8, 16, 16)) -> intp(3,0,8,,,,,1) | |
3908 | #else | |
3909 | set 0xf8f053cd, %r28 | |
3910 | #if (MAX_THREADS == 8) | |
3911 | and %r28, 0x7ff, %r28 | |
3912 | #endif | |
3913 | stxa %r28, [%g0] 0x73 | |
3914 | #endif | |
3915 | .word 0x97a489c5 ! 1: FDIVd fdivd %f18, %f36, %f42 | |
3916 | intvec_40_26: | |
3917 | .word 0xd31fe0c0 ! 54: LDDF_I ldd [%r31, 0x00c0], %f9 | |
3918 | .word 0xd3e7e002 ! 55: CASA_R casa [%r31] %asi, %r2, %r9 | |
3919 | .word 0x39400001 ! 56: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3920 | .word 0xd51fe000 ! 57: LDDF_I ldd [%r31, 0x0000], %f10 | |
3921 | .word 0x9f802224 ! 57: SIR sir 0x0224 | |
3922 | #if (defined SPC || defined CMP1) | |
3923 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_28) + 8, 16, 16)) -> intp(7,0,21,,,,,1) | |
3924 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_28)&0xffffffff) + 40, 16, 16)) -> intp(1,0,31,,,,,1) | |
3925 | #else | |
3926 | set 0xa2f0ce87, %r28 | |
3927 | #if (MAX_THREADS == 8) | |
3928 | and %r28, 0x7ff, %r28 | |
3929 | #endif | |
3930 | stxa %r28, [%g0] 0x73 | |
3931 | #endif | |
3932 | intvec_40_28: | |
3933 | memptr_40_29: | |
3934 | set 0x60540000, %r31 | |
3935 | #if (defined SPC || defined CMP1) | |
3936 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_30) + 48, 16, 16)) -> intp(0,0,23,,,,,1) | |
3937 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_30)&0xffffffff) + 24, 16, 16)) -> intp(3,0,7,,,,,1) | |
3938 | #else | |
3939 | set 0xdd40f5f0, %r28 | |
3940 | #if (MAX_THREADS == 8) | |
3941 | and %r28, 0x7ff, %r28 | |
3942 | #endif | |
3943 | stxa %r28, [%g0] 0x73 | |
3944 | #endif | |
3945 | .word 0x9f803938 ! 1: SIR sir 0x1938 | |
3946 | intvec_40_30: | |
3947 | .word 0x97b244c1 ! 58: FCMPNE32 fcmpne32 %d40, %d32, %r11 | |
3948 | .word 0x8581be0f ! 59: WRCCR_I wr %r6, 0x1e0f, %ccr | |
3949 | .word 0x97b244ca ! 60: FCMPNE32 fcmpne32 %d40, %d10, %r11 | |
3950 | .word 0x99a449cc ! 61: FDIVd fdivd %f48, %f12, %f12 | |
3951 | .word 0x8584bfad ! 61: WRCCR_I wr %r18, 0x1fad, %ccr | |
3952 | rd %tick, %r28 | |
3953 | #if (MAX_THREADS == 8) | |
3954 | sethi %hi(0x33800), %r27 | |
3955 | #else | |
3956 | sethi %hi(0x30000), %r27 | |
3957 | #endif | |
3958 | andn %r28, %r27, %r28 | |
3959 | ta T_CHANGE_HPRIV | |
3960 | stxa %r28, [%g0] 0x73 | |
3961 | .word 0x9f803970 ! 1: SIR sir 0x1970 | |
3962 | intvec_40_31: | |
3963 | .word 0x39400001 ! 62: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3964 | .word 0x87afca43 ! 63: FCMPd fcmpd %fcc<n>, %f62, %f34 | |
3965 | .word 0xe19fc2c0 ! 64: LDDFA_R ldda [%r31, %r0], %f16 | |
3966 | .word 0xa9a449cd ! 65: FDIVd fdivd %f48, %f44, %f20 | |
3967 | .word 0x39400001 ! 65: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3968 | memptr_40_33: | |
3969 | set user_data_start, %r31 | |
3970 | #if (defined SPC || defined CMP1) | |
3971 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_34) + 32, 16, 16)) -> intp(1,0,14,,,,,1) | |
3972 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_34)&0xffffffff) + 48, 16, 16)) -> intp(5,0,27,,,,,1) | |
3973 | #else | |
3974 | set 0x298040e7, %r28 | |
3975 | #if (MAX_THREADS == 8) | |
3976 | and %r28, 0x7ff, %r28 | |
3977 | #endif | |
3978 | stxa %r28, [%g0] 0x73 | |
3979 | #endif | |
3980 | intvec_40_34: | |
3981 | .word 0xe89fc280 ! 66: LDDA_R ldda [%r31, %r0] 0x14, %r20 | |
3982 | .word 0x8581fca0 ! 67: WRCCR_I wr %r7, 0x1ca0, %ccr | |
3983 | .word 0x9f802a59 ! 68: SIR sir 0x0a59 | |
3984 | .word 0x9f802080 ! 69: SIR sir 0x0080 | |
3985 | .word 0x9f803453 ! 69: SIR sir 0x1453 | |
3986 | #if (defined SPC || defined CMP1) | |
3987 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_36) + 24, 16, 16)) -> intp(2,0,4,,,,,1) | |
3988 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_36)&0xffffffff) + 32, 16, 16)) -> intp(2,0,11,,,,,1) | |
3989 | #else | |
3990 | set 0x593091c4, %r28 | |
3991 | #if (MAX_THREADS == 8) | |
3992 | and %r28, 0x7ff, %r28 | |
3993 | #endif | |
3994 | stxa %r28, [%g0] 0x73 | |
3995 | #endif | |
3996 | intvec_40_36: | |
3997 | .word 0x39400001 ! 70: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3998 | .word 0x99a7c9c3 ! 71: FDIVd fdivd %f62, %f34, %f12 | |
3999 | .word 0xd83fe160 ! 72: STD_I std %r12, [%r31 + 0x0160] | |
4000 | .word 0xa5a089cc ! 73: FDIVd fdivd %f2, %f12, %f18 | |
4001 | .word 0x87afca41 ! 73: FCMPd fcmpd %fcc<n>, %f62, %f32 | |
4002 | .word 0xe9e7c6c1 ! 74: CASA_I casa [%r31] 0x36, %r1, %r20 | |
4003 | .word 0x39400001 ! 75: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4004 | .word 0xc1bfc2c0 ! 76: STDFA_R stda %f0, [%r0, %r31] | |
4005 | .word 0x9f802010 ! 77: SIR sir 0x0010 | |
4006 | .word 0xe1bfde00 ! 77: STDFA_R stda %f16, [%r0, %r31] | |
4007 | .word 0xe91fe180 ! 78: LDDF_I ldd [%r31, 0x0180], %f20 | |
4008 | .word 0x39400001 ! 79: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4009 | .word 0xe897d160 ! 80: LDUHA_R lduha [%r31, %r0] 0x8b, %r20 | |
4010 | .word 0xc3efe190 ! 81: PREFETCHA_I prefetcha [%r31, + 0x0190] %asi, #one_read | |
4011 | .word 0x87afca41 ! 81: FCMPd fcmpd %fcc<n>, %f62, %f32 | |
4012 | memptr_40_40: | |
4013 | set 0x60740000, %r31 | |
4014 | .word 0xd41fe000 ! 82: LDD_I ldd [%r31 + 0x0000], %r10 | |
4015 | .word 0x85807ef7 ! 83: WRCCR_I wr %r1, 0x1ef7, %ccr | |
4016 | .word 0xc3efe070 ! 84: PREFETCHA_I prefetcha [%r31, + 0x0070] %asi, #one_read | |
4017 | .word 0xd53fe010 ! 85: STDF_I std %f10, [0x0010, %r31] | |
4018 | .word 0xd41fe030 ! 85: LDD_I ldd [%r31 + 0x0030], %r10 | |
4019 | .word 0xd51fe1e0 ! 86: LDDF_I ldd [%r31, 0x01e0], %f10 | |
4020 | .word 0x39400001 ! 87: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4021 | .word 0xd497dd42 ! 88: LDUHA_R lduha [%r31, %r2] 0xea, %r10 | |
4022 | .word 0xd497c283 ! 89: LDUHA_R lduha [%r31, %r3] 0x14, %r10 | |
4023 | .word 0xc36fe1d0 ! 89: PREFETCH_I prefetch [%r31 + 0x01d0], #one_read | |
4024 | .word 0xc19fd960 ! 90: LDDFA_R ldda [%r31, %r0], %f0 | |
4025 | .word 0x20800001 ! 91: BN bn,a <label_0x1> | |
4026 | .word 0xc19fda00 ! 92: LDDFA_R ldda [%r31, %r0], %f0 | |
4027 | .word 0xe19fde00 ! 93: LDDFA_R ldda [%r31, %r0], %f16 | |
4028 | .word 0xe1bfdc00 ! 93: STDFA_R stda %f16, [%r0, %r31] | |
4029 | #if (defined SPC || defined CMP1) | |
4030 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_44) + 0, 16, 16)) -> intp(4,0,31,,,,,1) | |
4031 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_44)&0xffffffff) + 16, 16, 16)) -> intp(4,0,20,,,,,1) | |
4032 | #else | |
4033 | set 0xfbc0c365, %r28 | |
4034 | #if (MAX_THREADS == 8) | |
4035 | and %r28, 0x7ff, %r28 | |
4036 | #endif | |
4037 | stxa %r28, [%g0] 0x73 | |
4038 | #endif | |
4039 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4040 | intvec_40_44: | |
4041 | memptr_40_45: | |
4042 | set user_data_start, %r31 | |
4043 | #if (defined SPC || defined CMP1) | |
4044 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_46) + 48, 16, 16)) -> intp(0,0,25,,,,,1) | |
4045 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_46)&0xffffffff) + 32, 16, 16)) -> intp(5,0,14,,,,,1) | |
4046 | #else | |
4047 | set 0xb0479f, %r28 | |
4048 | #if (MAX_THREADS == 8) | |
4049 | and %r28, 0x7ff, %r28 | |
4050 | #endif | |
4051 | stxa %r28, [%g0] 0x73 | |
4052 | #endif | |
4053 | .word 0x9f803946 ! 1: SIR sir 0x1946 | |
4054 | intvec_40_46: | |
4055 | .word 0xa3b4c4d2 ! 94: FCMPNE32 fcmpne32 %d50, %d18, %r17 | |
4056 | .word 0x858134de ! 95: WRCCR_I wr %r4, 0x14de, %ccr | |
4057 | .word 0x9f802f83 ! 96: SIR sir 0x0f83 | |
4058 | .word 0xa5a149d0 ! 97: FDIVd fdivd %f36, %f16, %f18 | |
4059 | .word 0x8584abff ! 97: WRCCR_I wr %r18, 0x0bff, %ccr | |
4060 | rd %tick, %r28 | |
4061 | #if (MAX_THREADS == 8) | |
4062 | sethi %hi(0x33800), %r27 | |
4063 | #else | |
4064 | sethi %hi(0x30000), %r27 | |
4065 | #endif | |
4066 | andn %r28, %r27, %r28 | |
4067 | ta T_CHANGE_HPRIV | |
4068 | stxa %r28, [%g0] 0x73 | |
4069 | intvec_40_47: | |
4070 | .word 0x39400001 ! 98: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4071 | .word 0x20800001 ! 99: BN bn,a <label_0x1> | |
4072 | .word 0xe1bfdb60 ! 100: STDFA_R stda %f16, [%r0, %r31] | |
4073 | .word 0xa5b484d2 ! 101: FCMPNE32 fcmpne32 %d18, %d18, %r18 | |
4074 | .word 0x20800001 ! 101: BN bn,a <label_0x1> | |
4075 | .word 0xc3efe130 ! 102: PREFETCHA_I prefetcha [%r31, + 0x0130] %asi, #one_read | |
4076 | .word 0xa5a7c9c0 ! 103: FDIVd fdivd %f62, %f0, %f18 | |
4077 | .word 0xe19fdb60 ! 104: LDDFA_R ldda [%r31, %r0], %f16 | |
4078 | .word 0xe497d003 ! 105: LDUHA_R lduha [%r31, %r3] 0x80, %r18 | |
4079 | .word 0xc1bfde00 ! 105: STDFA_R stda %f0, [%r0, %r31] | |
4080 | .word 0xc19fd920 ! 106: LDDFA_R ldda [%r31, %r0], %f0 | |
4081 | .word 0xe5e7c542 ! 107: CASA_I casa [%r31] 0x2a, %r2, %r18 | |
4082 | .word 0x20800001 ! 108: BN bn,a <label_0x1> | |
4083 | .word 0xc19fd960 ! 109: LDDFA_R ldda [%r31, %r0], %f0 | |
4084 | .word 0xe43fe0d0 ! 109: STD_I std %r18, [%r31 + 0x00d0] | |
4085 | rd %tick, %r28 | |
4086 | #if (MAX_THREADS == 8) | |
4087 | sethi %hi(0x33800), %r27 | |
4088 | #else | |
4089 | sethi %hi(0x30000), %r27 | |
4090 | #endif | |
4091 | andn %r28, %r27, %r28 | |
4092 | ta T_CHANGE_HPRIV | |
4093 | stxa %r28, [%g0] 0x73 | |
4094 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4095 | intvec_40_51: | |
4096 | .word 0x9f803e0d ! 110: SIR sir 0x1e0d | |
4097 | .word 0x20800001 ! 111: BN bn,a <label_0x1> | |
4098 | .word 0xd01fe060 ! 112: LDD_I ldd [%r31 + 0x0060], %r8 | |
4099 | .word 0x9f8024ff ! 113: SIR sir 0x04ff | |
4100 | .word 0xe19fc3e0 ! 113: LDDFA_R ldda [%r31, %r0], %f16 | |
4101 | .word 0xd11fe000 ! 114: LDDF_I ldd [%r31, 0x0000], %f8 | |
4102 | .word 0x87afca41 ! 115: FCMPd fcmpd %fcc<n>, %f62, %f32 | |
4103 | .word 0xc19fdb60 ! 116: LDDFA_R ldda [%r31, %r0], %f0 | |
4104 | .word 0xd09fc720 ! 117: LDDA_R ldda [%r31, %r0] 0x39, %r8 | |
4105 | .word 0x24cfc001 ! 117: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
4106 | memptr_40_54: | |
4107 | set user_data_start, %r31 | |
4108 | rd %tick, %r28 | |
4109 | #if (MAX_THREADS == 8) | |
4110 | sethi %hi(0x33800), %r27 | |
4111 | #else | |
4112 | sethi %hi(0x30000), %r27 | |
4113 | #endif | |
4114 | andn %r28, %r27, %r28 | |
4115 | ta T_CHANGE_HPRIV | |
4116 | stxa %r28, [%g0] 0x73 | |
4117 | .word 0x99b484c7 ! 1: FCMPNE32 fcmpne32 %d18, %d38, %r12 | |
4118 | intvec_40_55: | |
4119 | .word 0xd89fc2e1 ! 118: LDDA_R ldda [%r31, %r1] 0x17, %r12 | |
4120 | .word 0x8581fb60 ! 119: WRCCR_I wr %r7, 0x1b60, %ccr | |
4121 | .word 0x97b4c4c3 ! 120: FCMPNE32 fcmpne32 %d50, %d34, %r11 | |
4122 | .word 0xc32fe0b0 ! 121: STXFSR_I st-sfr %f1, [0x00b0, %r31] | |
4123 | .word 0x95a209d3 ! 121: FDIVd fdivd %f8, %f50, %f10 | |
4124 | memptr_40_57: | |
4125 | set user_data_start, %r31 | |
4126 | .word 0x20800001 ! 122: BN bn,a <label_0x1> | |
4127 | .word 0x85853296 ! 123: WRCCR_I wr %r20, 0x1296, %ccr | |
4128 | .word 0x9f802020 ! 124: SIR sir 0x0020 | |
4129 | .word 0x20800001 ! 125: BN bn,a <label_0x1> | |
4130 | .word 0xe13fe1c0 ! 125: STDF_I std %f16, [0x01c0, %r31] | |
4131 | rd %tick, %r28 | |
4132 | #if (MAX_THREADS == 8) | |
4133 | sethi %hi(0x33800), %r27 | |
4134 | #else | |
4135 | sethi %hi(0x30000), %r27 | |
4136 | #endif | |
4137 | andn %r28, %r27, %r28 | |
4138 | ta T_CHANGE_HPRIV | |
4139 | stxa %r28, [%g0] 0x73 | |
4140 | intvec_40_59: | |
4141 | .word 0xa9a449d4 ! 126: FDIVd fdivd %f48, %f20, %f20 | |
4142 | .word 0xe83fe110 ! 127: STD_I std %r20, [%r31 + 0x0110] | |
4143 | .word 0xe19fda00 ! 128: LDDFA_R ldda [%r31, %r0], %f16 | |
4144 | .word 0xa7a1c9d1 ! 129: FDIVd fdivd %f38, %f48, %f50 | |
4145 | .word 0xc1bfdf20 ! 129: STDFA_R stda %f0, [%r0, %r31] | |
4146 | .word 0x9f8020d0 ! 130: SIR sir 0x00d0 | |
4147 | .word 0xe1bfdc00 ! 131: STDFA_R stda %f16, [%r0, %r31] | |
4148 | .word 0xdb3fe000 ! 132: STDF_I std %f13, [0x0000, %r31] | |
4149 | .word 0xdb1fe030 ! 133: LDDF_I ldd [%r31, 0x0030], %f13 | |
4150 | .word 0xc3efe180 ! 133: PREFETCHA_I prefetcha [%r31, + 0x0180] %asi, #one_read | |
4151 | .word 0xc1bfc2c0 ! 134: STDFA_R stda %f0, [%r0, %r31] | |
4152 | .word 0x20800001 ! 135: BN bn,a <label_0x1> | |
4153 | .word 0x20800001 ! 136: BN bn,a <label_0x1> | |
4154 | .word 0x20800001 ! 137: BN bn,a <label_0x1> | |
4155 | .word 0xc1bfc2c0 ! 137: STDFA_R stda %f0, [%r0, %r31] | |
4156 | memptr_40_62: | |
4157 | set 0x60140000, %r31 | |
4158 | rd %tick, %r28 | |
4159 | #if (MAX_THREADS == 8) | |
4160 | sethi %hi(0x33800), %r27 | |
4161 | #else | |
4162 | sethi %hi(0x30000), %r27 | |
4163 | #endif | |
4164 | andn %r28, %r27, %r28 | |
4165 | ta T_CHANGE_HPRIV | |
4166 | stxa %r28, [%g0] 0x73 | |
4167 | intvec_40_63: | |
4168 | .word 0x20800001 ! 138: BN bn,a <label_0x1> | |
4169 | .word 0x85843709 ! 139: WRCCR_I wr %r16, 0x1709, %ccr | |
4170 | .word 0x9f802c96 ! 140: SIR sir 0x0c96 | |
4171 | .word 0xe1bfdb60 ! 141: STDFA_R stda %f16, [%r0, %r31] | |
4172 | .word 0xa7b044c8 ! 141: FCMPNE32 fcmpne32 %d32, %d8, %r19 | |
4173 | memptr_40_65: | |
4174 | set 0x60740000, %r31 | |
4175 | #if (defined SPC || defined CMP1) | |
4176 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_66) + 16, 16, 16)) -> intp(2,0,2,,,,,1) | |
4177 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_66)&0xffffffff) + 16, 16, 16)) -> intp(0,0,20,,,,,1) | |
4178 | #else | |
4179 | set 0xdee0f8ab, %r28 | |
4180 | #if (MAX_THREADS == 8) | |
4181 | and %r28, 0x7ff, %r28 | |
4182 | #endif | |
4183 | stxa %r28, [%g0] 0x73 | |
4184 | #endif | |
4185 | intvec_40_66: | |
4186 | .word 0xc19fde00 ! 142: LDDFA_R ldda [%r31, %r0], %f0 | |
4187 | .word 0x8581ff87 ! 143: WRCCR_I wr %r7, 0x1f87, %ccr | |
4188 | .word 0x39400001 ! 144: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4189 | .word 0x20800001 ! 145: BN bn,a <label_0x1> | |
4190 | .word 0x8584612f ! 145: WRCCR_I wr %r17, 0x012f, %ccr | |
4191 | .word 0xd93fe0d0 ! 146: STDF_I std %f12, [0x00d0, %r31] | |
4192 | .word 0xc19fd920 ! 147: LDDFA_R ldda [%r31, %r0], %f0 | |
4193 | .word 0xd93fe0a0 ! 148: STDF_I std %f12, [0x00a0, %r31] | |
4194 | .word 0xc32fe1e0 ! 149: STXFSR_I st-sfr %f1, [0x01e0, %r31] | |
4195 | .word 0xe19fc2c0 ! 149: LDDFA_R ldda [%r31, %r0], %f16 | |
4196 | #if (defined SPC || defined CMP1) | |
4197 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_68) + 32, 16, 16)) -> intp(5,0,21,,,,,1) | |
4198 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_68)&0xffffffff) + 56, 16, 16)) -> intp(0,0,31,,,,,1) | |
4199 | #else | |
4200 | set 0xcfb01f28, %r28 | |
4201 | #if (MAX_THREADS == 8) | |
4202 | and %r28, 0x7ff, %r28 | |
4203 | #endif | |
4204 | stxa %r28, [%g0] 0x73 | |
4205 | #endif | |
4206 | .word 0x9f803195 ! 1: SIR sir 0x1195 | |
4207 | intvec_40_68: | |
4208 | .word 0x19400001 ! 150: FBPUGE fbuge | |
4209 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4210 | .word 0xe23fe190 ! 152: STD_I std %r17, [%r31 + 0x0190] | |
4211 | .word 0x9f80288f ! 153: SIR sir 0x088f | |
4212 | .word 0x04cfc001 ! 153: BRLEZ brlez,pt %r31,<label_0xfc001> | |
4213 | rd %tick, %r28 | |
4214 | #if (MAX_THREADS == 8) | |
4215 | sethi %hi(0x33800), %r27 | |
4216 | #else | |
4217 | sethi %hi(0x30000), %r27 | |
4218 | #endif | |
4219 | andn %r28, %r27, %r28 | |
4220 | ta T_CHANGE_HPRIV | |
4221 | stxa %r28, [%g0] 0x73 | |
4222 | intvec_40_69: | |
4223 | .word 0xe297c721 ! 154: LDUHA_R lduha [%r31, %r1] 0x39, %r17 | |
4224 | .word 0xc19fd920 ! 155: LDDFA_R ldda [%r31, %r0], %f0 | |
4225 | .word 0x9f8031c6 ! 156: SIR sir 0x11c6 | |
4226 | .word 0xe8dfc382 ! 157: LDXA_R ldxa [%r31, %r2] 0x1c, %r20 | |
4227 | .word 0x00800001 ! 157: BN bn <label_0x1> | |
4228 | .word 0xc1bfdc00 ! 158: STDFA_R stda %f0, [%r0, %r31] | |
4229 | .word 0xe9e7c2c0 ! 159: CASA_I casa [%r31] 0x16, %r0, %r20 | |
4230 | .word 0xc32fe150 ! 160: STXFSR_I st-sfr %f1, [0x0150, %r31] | |
4231 | .word 0xc19fc3e0 ! 161: LDDFA_R ldda [%r31, %r0], %f0 | |
4232 | .word 0xa9a7c9c1 ! 161: FDIVd fdivd %f62, %f32, %f20 | |
4233 | memptr_40_72: | |
4234 | set user_data_start, %r31 | |
4235 | rd %tick, %r28 | |
4236 | #if (MAX_THREADS == 8) | |
4237 | sethi %hi(0x33800), %r27 | |
4238 | #else | |
4239 | sethi %hi(0x30000), %r27 | |
4240 | #endif | |
4241 | andn %r28, %r27, %r28 | |
4242 | ta T_CHANGE_HPRIV | |
4243 | stxa %r28, [%g0] 0x73 | |
4244 | intvec_40_73: | |
4245 | .word 0xc1bfdc00 ! 162: STDFA_R stda %f0, [%r0, %r31] | |
4246 | .word 0x8580f2d5 ! 163: WRCCR_I wr %r3, 0x12d5, %ccr | |
4247 | .word 0xa3b284cc ! 164: FCMPNE32 fcmpne32 %d10, %d12, %r17 | |
4248 | .word 0xe19fde00 ! 165: LDDFA_R ldda [%r31, %r0], %f16 | |
4249 | .word 0x19400001 ! 165: FBPUGE fbuge | |
4250 | rd %tick, %r28 | |
4251 | #if (MAX_THREADS == 8) | |
4252 | sethi %hi(0x33800), %r27 | |
4253 | #else | |
4254 | sethi %hi(0x30000), %r27 | |
4255 | #endif | |
4256 | andn %r28, %r27, %r28 | |
4257 | ta T_CHANGE_HPRIV | |
4258 | stxa %r28, [%g0] 0x73 | |
4259 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4260 | intvec_40_75: | |
4261 | .word 0xd53fe110 ! 166: STDF_I std %f10, [0x0110, %r31] | |
4262 | .word 0x20800001 ! 167: BN bn,a <label_0x1> | |
4263 | .word 0x9f80284e ! 168: SIR sir 0x084e | |
4264 | .word 0xe89fc400 ! 169: LDDA_R ldda [%r31, %r0] 0x20, %r20 | |
4265 | .word 0x93b084c1 ! 169: FCMPNE32 fcmpne32 %d2, %d32, %r9 | |
4266 | rd %tick, %r28 | |
4267 | #if (MAX_THREADS == 8) | |
4268 | sethi %hi(0x33800), %r27 | |
4269 | #else | |
4270 | sethi %hi(0x30000), %r27 | |
4271 | #endif | |
4272 | andn %r28, %r27, %r28 | |
4273 | ta T_CHANGE_HPRIV | |
4274 | stxa %r28, [%g0] 0x73 | |
4275 | intvec_40_77: | |
4276 | memptr_40_78: | |
4277 | set user_data_start, %r31 | |
4278 | .word 0x9f803c7a ! 170: SIR sir 0x1c7a | |
4279 | .word 0x858536e5 ! 171: WRCCR_I wr %r20, 0x16e5, %ccr | |
4280 | .word 0x20800001 ! 172: BN bn,a <label_0x1> | |
4281 | .word 0x9f802e6a ! 173: SIR sir 0x0e6a | |
4282 | .word 0xc1bfd920 ! 173: STDFA_R stda %f0, [%r0, %r31] | |
4283 | rd %tick, %r28 | |
4284 | #if (MAX_THREADS == 8) | |
4285 | sethi %hi(0x33800), %r27 | |
4286 | #else | |
4287 | sethi %hi(0x30000), %r27 | |
4288 | #endif | |
4289 | andn %r28, %r27, %r28 | |
4290 | ta T_CHANGE_HPRIV | |
4291 | stxa %r28, [%g0] 0x73 | |
4292 | intvec_40_79: | |
4293 | .word 0xa3a509c2 ! 174: FDIVd fdivd %f20, %f2, %f48 | |
4294 | .word 0x87afca43 ! 175: FCMPd fcmpd %fcc<n>, %f62, %f34 | |
4295 | .word 0x20800001 ! 176: BN bn,a <label_0x1> | |
4296 | .word 0x39400001 ! 177: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4297 | .word 0xa1a7c9c1 ! 177: FDIVd fdivd %f62, %f32, %f16 | |
4298 | .word 0xe11fe080 ! 178: LDDF_I ldd [%r31, 0x0080], %f16 | |
4299 | .word 0xc1bfd960 ! 179: STDFA_R stda %f0, [%r0, %r31] | |
4300 | .word 0xe01fe170 ! 180: LDD_I ldd [%r31 + 0x0170], %r16 | |
4301 | .word 0xe03fe060 ! 181: STD_I std %r16, [%r31 + 0x0060] | |
4302 | .word 0x00800001 ! 181: BN bn <label_0x1> | |
4303 | #if (defined SPC || defined CMP1) | |
4304 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_82) + 0, 16, 16)) -> intp(3,0,5,,,,,1) | |
4305 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_82)&0xffffffff) + 32, 16, 16)) -> intp(4,0,16,,,,,1) | |
4306 | #else | |
4307 | set 0x6cf0861d, %r28 | |
4308 | #if (MAX_THREADS == 8) | |
4309 | and %r28, 0x7ff, %r28 | |
4310 | #endif | |
4311 | stxa %r28, [%g0] 0x73 | |
4312 | #endif | |
4313 | intvec_40_82: | |
4314 | .word 0x97a409c5 ! 182: FDIVd fdivd %f16, %f36, %f42 | |
4315 | .word 0xc1bfd920 ! 183: STDFA_R stda %f0, [%r0, %r31] | |
4316 | .word 0x20800001 ! 184: BN bn,a <label_0x1> | |
4317 | .word 0x9f802dfc ! 185: SIR sir 0x0dfc | |
4318 | .word 0xc1bfd920 ! 185: STDFA_R stda %f0, [%r0, %r31] | |
4319 | memptr_40_84: | |
4320 | set user_data_start, %r31 | |
4321 | .word 0xd7e7d002 ! 186: CASA_I casa [%r31] 0x80, %r2, %r11 | |
4322 | .word 0x858467e9 ! 187: WRCCR_I wr %r17, 0x07e9, %ccr | |
4323 | .word 0xd61fe0f0 ! 188: LDD_I ldd [%r31 + 0x00f0], %r11 | |
4324 | .word 0xd61fe1b0 ! 189: LDD_I ldd [%r31 + 0x01b0], %r11 | |
4325 | .word 0xd6dfc600 ! 189: LDXA_R ldxa [%r31, %r0] 0x30, %r11 | |
4326 | memptr_40_85: | |
4327 | set 0x60540000, %r31 | |
4328 | .word 0xd7e7d041 ! 190: CASA_I casa [%r31] 0x82, %r1, %r11 | |
4329 | .word 0x8580ae60 ! 191: WRCCR_I wr %r2, 0x0e60, %ccr | |
4330 | .word 0x20800001 ! 192: BN bn,a <label_0x1> | |
4331 | .word 0xc3efe170 ! 193: PREFETCHA_I prefetcha [%r31, + 0x0170] %asi, #one_read | |
4332 | .word 0x85846193 ! 193: WRCCR_I wr %r17, 0x0193, %ccr | |
4333 | #if (defined SPC || defined CMP1) | |
4334 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_86) + 56, 16, 16)) -> intp(5,0,24,,,,,1) | |
4335 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_86)&0xffffffff) + 24, 16, 16)) -> intp(5,0,8,,,,,1) | |
4336 | #else | |
4337 | set 0x72304ecd, %r28 | |
4338 | #if (MAX_THREADS == 8) | |
4339 | and %r28, 0x7ff, %r28 | |
4340 | #endif | |
4341 | stxa %r28, [%g0] 0x73 | |
4342 | #endif | |
4343 | .word 0x99b1c4d2 ! 1: FCMPNE32 fcmpne32 %d38, %d18, %r12 | |
4344 | intvec_40_86: | |
4345 | .word 0x9f8025c3 ! 194: SIR sir 0x05c3 | |
4346 | .word 0xc36fe1e0 ! 195: PREFETCH_I prefetch [%r31 + 0x01e0], #one_read | |
4347 | .word 0xe19fc2c0 ! 196: LDDFA_R ldda [%r31, %r0], %f16 | |
4348 | .word 0x9f802d39 ! 197: SIR sir 0x0d39 | |
4349 | .word 0x19400001 ! 197: FBPUGE fbuge | |
4350 | #if (defined SPC || defined CMP1) | |
4351 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_88) + 8, 16, 16)) -> intp(2,0,2,,,,,1) | |
4352 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_88)&0xffffffff) + 16, 16, 16)) -> intp(3,0,11,,,,,1) | |
4353 | #else | |
4354 | set 0xe1c05b37, %r28 | |
4355 | #if (MAX_THREADS == 8) | |
4356 | and %r28, 0x7ff, %r28 | |
4357 | #endif | |
4358 | stxa %r28, [%g0] 0x73 | |
4359 | #endif | |
4360 | intvec_40_88: | |
4361 | .word 0x39400001 ! 198: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4362 | .word 0xe19fd920 ! 199: LDDFA_R ldda [%r31, %r0], %f16 | |
4363 | .word 0xe61fe1b0 ! 200: LDD_I ldd [%r31 + 0x01b0], %r19 | |
4364 | .word 0x9f803f23 ! 201: SIR sir 0x1f23 | |
4365 | .word 0xe1bfd920 ! 201: STDFA_R stda %f16, [%r0, %r31] | |
4366 | .word 0xe19fdb60 ! 202: LDDFA_R ldda [%r31, %r0], %f16 | |
4367 | .word 0xc36fe190 ! 203: PREFETCH_I prefetch [%r31 + 0x0190], #one_read | |
4368 | .word 0xe297d160 ! 204: LDUHA_R lduha [%r31, %r0] 0x8b, %r17 | |
4369 | .word 0x20800001 ! 205: BN bn,a <label_0x1> | |
4370 | .word 0xe3e7c2e2 ! 205: CASA_I casa [%r31] 0x17, %r2, %r17 | |
4371 | memptr_40_91: | |
4372 | set 0x60340000, %r31 | |
4373 | .word 0x20800001 ! 206: BN bn,a <label_0x1> | |
4374 | .word 0x8584a086 ! 207: WRCCR_I wr %r18, 0x0086, %ccr | |
4375 | .word 0xe23fe0f0 ! 208: STD_I std %r17, [%r31 + 0x00f0] | |
4376 | .word 0xc19fdc00 ! 209: LDDFA_R ldda [%r31, %r0], %f0 | |
4377 | .word 0x8582b602 ! 209: WRCCR_I wr %r10, 0x1602, %ccr | |
4378 | memptr_40_93: | |
4379 | set user_data_start, %r31 | |
4380 | .word 0xe19fde00 ! 210: LDDFA_R ldda [%r31, %r0], %f16 | |
4381 | .word 0x85816878 ! 211: WRCCR_I wr %r5, 0x0878, %ccr | |
4382 | .word 0x20800001 ! 212: BN bn,a <label_0x1> | |
4383 | .word 0xc1bfd920 ! 213: STDFA_R stda %f0, [%r0, %r31] | |
4384 | .word 0x85827511 ! 213: WRCCR_I wr %r9, 0x1511, %ccr | |
4385 | rd %tick, %r28 | |
4386 | #if (MAX_THREADS == 8) | |
4387 | sethi %hi(0x33800), %r27 | |
4388 | #else | |
4389 | sethi %hi(0x30000), %r27 | |
4390 | #endif | |
4391 | andn %r28, %r27, %r28 | |
4392 | ta T_CHANGE_HPRIV | |
4393 | stxa %r28, [%g0] 0x73 | |
4394 | intvec_40_95: | |
4395 | .word 0x20800001 ! 214: BN bn,a <label_0x1> | |
4396 | .word 0x99a7c9c1 ! 215: FDIVd fdivd %f62, %f32, %f12 | |
4397 | .word 0x9f802fa0 ! 216: SIR sir 0x0fa0 | |
4398 | .word 0xc19fdb60 ! 217: LDDFA_R ldda [%r31, %r0], %f0 | |
4399 | .word 0xc36fe1b0 ! 217: PREFETCH_I prefetch [%r31 + 0x01b0], #one_read | |
4400 | memptr_40_97: | |
4401 | set 0x60340000, %r31 | |
4402 | #if (defined SPC || defined CMP1) | |
4403 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_98) + 48, 16, 16)) -> intp(4,0,14,,,,,1) | |
4404 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_98)&0xffffffff) + 16, 16, 16)) -> intp(6,0,14,,,,,1) | |
4405 | #else | |
4406 | set 0xcb706a61, %r28 | |
4407 | #if (MAX_THREADS == 8) | |
4408 | and %r28, 0x7ff, %r28 | |
4409 | #endif | |
4410 | stxa %r28, [%g0] 0x73 | |
4411 | #endif | |
4412 | intvec_40_98: | |
4413 | .word 0xc1bfc2c0 ! 218: STDFA_R stda %f0, [%r0, %r31] | |
4414 | .word 0x858167c5 ! 219: WRCCR_I wr %r5, 0x07c5, %ccr | |
4415 | .word 0x19400001 ! 220: FBPUGE fbuge | |
4416 | .word 0xe1bfdc00 ! 221: STDFA_R stda %f16, [%r0, %r31] | |
4417 | .word 0x91a249c6 ! 221: FDIVd fdivd %f40, %f6, %f8 | |
4418 | #if (defined SPC || defined CMP1) | |
4419 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_100) + 40, 16, 16)) -> intp(1,0,9,,,,,1) | |
4420 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_100)&0xffffffff) + 0, 16, 16)) -> intp(0,0,0,,,,,1) | |
4421 | #else | |
4422 | set 0x298004b1, %r28 | |
4423 | #if (MAX_THREADS == 8) | |
4424 | and %r28, 0x7ff, %r28 | |
4425 | #endif | |
4426 | stxa %r28, [%g0] 0x73 | |
4427 | #endif | |
4428 | .word 0x9f803028 ! 1: SIR sir 0x1028 | |
4429 | intvec_40_100: | |
4430 | memptr_40_101: | |
4431 | set 0x60340000, %r31 | |
4432 | .word 0xa9a089d3 ! 222: FDIVd fdivd %f2, %f50, %f20 | |
4433 | .word 0x85812dc3 ! 223: WRCCR_I wr %r4, 0x0dc3, %ccr | |
4434 | .word 0xd33fe1e0 ! 224: STDF_I std %f9, [0x01e0, %r31] | |
4435 | .word 0x39400001 ! 225: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4436 | .word 0x8581aa72 ! 225: WRCCR_I wr %r6, 0x0a72, %ccr | |
4437 | .word 0xc1bfdf20 ! 226: STDFA_R stda %f0, [%r0, %r31] | |
4438 | .word 0x39400001 ! 227: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4439 | .word 0xd89fc6c1 ! 228: LDDA_R ldda [%r31, %r1] 0x36, %r12 | |
4440 | .word 0x20800001 ! 229: BN bn,a <label_0x1> | |
4441 | .word 0xd93fe040 ! 229: STDF_I std %f12, [0x0040, %r31] | |
4442 | rd %tick, %r28 | |
4443 | #if (MAX_THREADS == 8) | |
4444 | sethi %hi(0x33800), %r27 | |
4445 | #else | |
4446 | sethi %hi(0x30000), %r27 | |
4447 | #endif | |
4448 | andn %r28, %r27, %r28 | |
4449 | ta T_CHANGE_HPRIV | |
4450 | stxa %r28, [%g0] 0x73 | |
4451 | .word 0xa1b284d0 ! 1: FCMPNE32 fcmpne32 %d10, %d16, %r16 | |
4452 | intvec_40_103: | |
4453 | memptr_40_104: | |
4454 | set 0x60740000, %r31 | |
4455 | .word 0x19400001 ! 230: FBPUGE fbuge | |
4456 | .word 0x8584a90b ! 231: WRCCR_I wr %r18, 0x090b, %ccr | |
4457 | .word 0xe93fe1c0 ! 232: STDF_I std %f20, [0x01c0, %r31] | |
4458 | .word 0x39400001 ! 233: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4459 | .word 0x85836a17 ! 233: WRCCR_I wr %r13, 0x0a17, %ccr | |
4460 | #if (defined SPC || defined CMP1) | |
4461 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_106) + 40, 16, 16)) -> intp(3,0,20,,,,,1) | |
4462 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_106)&0xffffffff) + 8, 16, 16)) -> intp(2,0,28,,,,,1) | |
4463 | #else | |
4464 | set 0xb1a0a56e, %r28 | |
4465 | #if (MAX_THREADS == 8) | |
4466 | and %r28, 0x7ff, %r28 | |
4467 | #endif | |
4468 | stxa %r28, [%g0] 0x73 | |
4469 | #endif | |
4470 | intvec_40_106: | |
4471 | rd %tick, %r28 | |
4472 | #if (MAX_THREADS == 8) | |
4473 | sethi %hi(0x33800), %r27 | |
4474 | #else | |
4475 | sethi %hi(0x30000), %r27 | |
4476 | #endif | |
4477 | andn %r28, %r27, %r28 | |
4478 | ta T_CHANGE_HPRIV | |
4479 | stxa %r28, [%g0] 0x73 | |
4480 | intvec_40_107: | |
4481 | .word 0x97a2c9c3 ! 234: FDIVd fdivd %f42, %f34, %f42 | |
4482 | .word 0xc1bfdb60 ! 235: STDFA_R stda %f0, [%r0, %r31] | |
4483 | .word 0x39400001 ! 236: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4484 | .word 0xa5b044d4 ! 237: FCMPNE32 fcmpne32 %d32, %d20, %r18 | |
4485 | .word 0xe19fd920 ! 237: LDDFA_R ldda [%r31, %r0], %f16 | |
4486 | memptr_40_109: | |
4487 | set 0x60340000, %r31 | |
4488 | .word 0x20800001 ! 238: BN bn,a <label_0x1> | |
4489 | .word 0x858525e2 ! 239: WRCCR_I wr %r20, 0x05e2, %ccr | |
4490 | .word 0x20800001 ! 240: BN bn,a <label_0x1> | |
4491 | .word 0xc1bfde00 ! 241: STDFA_R stda %f0, [%r0, %r31] | |
4492 | .word 0x8580aa42 ! 241: WRCCR_I wr %r2, 0x0a42, %ccr | |
4493 | memptr_40_111: | |
4494 | set user_data_start, %r31 | |
4495 | .word 0xe1bfdb60 ! 242: STDFA_R stda %f16, [%r0, %r31] | |
4496 | .word 0x8582adb6 ! 243: WRCCR_I wr %r10, 0x0db6, %ccr | |
4497 | .word 0x20800001 ! 244: BN bn,a <label_0x1> | |
4498 | .word 0xc1bfde00 ! 245: STDFA_R stda %f0, [%r0, %r31] | |
4499 | .word 0xc19fde00 ! 245: LDDFA_R ldda [%r31, %r0], %f0 | |
4500 | .word 0xe1bfd920 ! 246: STDFA_R stda %f16, [%r0, %r31] | |
4501 | .word 0xe83fe0b0 ! 247: STD_I std %r20, [%r31 + 0x00b0] | |
4502 | .word 0xe81fe1e0 ! 248: LDD_I ldd [%r31 + 0x01e0], %r20 | |
4503 | .word 0xe19fc2c0 ! 249: LDDFA_R ldda [%r31, %r0], %f16 | |
4504 | .word 0xe9e7e001 ! 249: CASA_R casa [%r31] %asi, %r1, %r20 | |
4505 | .word 0x20800001 ! 250: BN bn,a <label_0x1> | |
4506 | .word 0xe1bfd960 ! 251: STDFA_R stda %f16, [%r0, %r31] | |
4507 | .word 0xe1bfd960 ! 252: STDFA_R stda %f16, [%r0, %r31] | |
4508 | .word 0xe19fda00 ! 253: LDDFA_R ldda [%r31, %r0], %f16 | |
4509 | .word 0xe19fd920 ! 253: LDDFA_R ldda [%r31, %r0], %f16 | |
4510 | .word 0x20800001 ! 254: BN bn,a <label_0x1> | |
4511 | .word 0xc19fc3e0 ! 255: LDDFA_R ldda [%r31, %r0], %f0 | |
4512 | .word 0xe5e7c541 ! 256: CASA_I casa [%r31] 0x2a, %r1, %r18 | |
4513 | .word 0xc19fc2c0 ! 257: LDDFA_R ldda [%r31, %r0], %f0 | |
4514 | .word 0x20800001 ! 257: BN bn,a <label_0x1> | |
4515 | rd %tick, %r28 | |
4516 | #if (MAX_THREADS == 8) | |
4517 | sethi %hi(0x33800), %r27 | |
4518 | #else | |
4519 | sethi %hi(0x30000), %r27 | |
4520 | #endif | |
4521 | andn %r28, %r27, %r28 | |
4522 | ta T_CHANGE_HPRIV | |
4523 | stxa %r28, [%g0] 0x73 | |
4524 | intvec_40_113: | |
4525 | #if (defined SPC || defined CMP1) | |
4526 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_114) + 32, 16, 16)) -> intp(0,0,18,,,,,1) | |
4527 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_114)&0xffffffff) + 48, 16, 16)) -> intp(1,0,3,,,,,1) | |
4528 | #else | |
4529 | set 0x21905c6b, %r28 | |
4530 | #if (MAX_THREADS == 8) | |
4531 | and %r28, 0x7ff, %r28 | |
4532 | #endif | |
4533 | stxa %r28, [%g0] 0x73 | |
4534 | #endif | |
4535 | .word 0xa1a249c1 ! 1: FDIVd fdivd %f40, %f32, %f16 | |
4536 | intvec_40_114: | |
4537 | .word 0x9f803124 ! 258: SIR sir 0x1124 | |
4538 | .word 0x39400001 ! 259: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4539 | .word 0x99a409d2 ! 260: FDIVd fdivd %f16, %f18, %f12 | |
4540 | .word 0x97b284cc ! 261: FCMPNE32 fcmpne32 %d10, %d12, %r11 | |
4541 | .word 0xa7a1c9cb ! 261: FDIVd fdivd %f38, %f42, %f50 | |
4542 | rd %tick, %r28 | |
4543 | #if (MAX_THREADS == 8) | |
4544 | sethi %hi(0x33800), %r27 | |
4545 | #else | |
4546 | sethi %hi(0x30000), %r27 | |
4547 | #endif | |
4548 | andn %r28, %r27, %r28 | |
4549 | ta T_CHANGE_HPRIV | |
4550 | stxa %r28, [%g0] 0x73 | |
4551 | intvec_40_115: | |
4552 | .word 0xe7e7d160 ! 262: CASA_I casa [%r31] 0x8b, %r0, %r19 | |
4553 | .word 0xa7b7c4c1 ! 263: FCMPNE32 fcmpne32 %d62, %d32, %r19 | |
4554 | .word 0x93b0c4d2 ! 264: FCMPNE32 fcmpne32 %d34, %d18, %r9 | |
4555 | .word 0xd29fd041 ! 265: LDDA_R ldda [%r31, %r1] 0x82, %r9 | |
4556 | .word 0xd3e7e001 ! 265: CASA_R casa [%r31] %asi, %r1, %r9 | |
4557 | .word 0xd23fe000 ! 266: STD_I std %r9, [%r31 + 0x0000] | |
4558 | .word 0xc19fdc00 ! 267: LDDFA_R ldda [%r31, %r0], %f0 | |
4559 | .word 0xd3e7c2e0 ! 268: CASA_I casa [%r31] 0x17, %r0, %r9 | |
4560 | .word 0xd31fe0d0 ! 269: LDDF_I ldd [%r31, 0x00d0], %f9 | |
4561 | .word 0xd21fe0f0 ! 269: LDD_I ldd [%r31 + 0x00f0], %r9 | |
4562 | #if (defined SPC || defined CMP1) | |
4563 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_118) + 32, 16, 16)) -> intp(3,0,14,,,,,1) | |
4564 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_118)&0xffffffff) + 56, 16, 16)) -> intp(6,0,19,,,,,1) | |
4565 | #else | |
4566 | set 0xe48057d4, %r28 | |
4567 | #if (MAX_THREADS == 8) | |
4568 | and %r28, 0x7ff, %r28 | |
4569 | #endif | |
4570 | stxa %r28, [%g0] 0x73 | |
4571 | #endif | |
4572 | intvec_40_118: | |
4573 | rd %tick, %r28 | |
4574 | #if (MAX_THREADS == 8) | |
4575 | sethi %hi(0x33800), %r27 | |
4576 | #else | |
4577 | sethi %hi(0x30000), %r27 | |
4578 | #endif | |
4579 | andn %r28, %r27, %r28 | |
4580 | ta T_CHANGE_HPRIV | |
4581 | stxa %r28, [%g0] 0x73 | |
4582 | .word 0x9f8026da ! 1: SIR sir 0x06da | |
4583 | intvec_40_119: | |
4584 | .word 0x39400001 ! 270: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4585 | .word 0x24cfc001 ! 271: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
4586 | .word 0x9bb204d3 ! 272: FCMPNE32 fcmpne32 %d8, %d50, %r13 | |
4587 | .word 0x9f8027c2 ! 273: SIR sir 0x07c2 | |
4588 | .word 0xe5e7e001 ! 273: CASA_R casa [%r31] %asi, %r1, %r18 | |
4589 | .word 0xe19fdf20 ! 274: LDDFA_R ldda [%r31, %r0], %f16 | |
4590 | .word 0x04cfc001 ! 275: BRLEZ brlez,pt %r31,<label_0xfc001> | |
4591 | .word 0x00800001 ! 276: BN bn <label_0x1> | |
4592 | .word 0xe1bfde00 ! 277: STDFA_R stda %f16, [%r0, %r31] | |
4593 | .word 0xa1b7c4c1 ! 277: FCMPNE32 fcmpne32 %d62, %d32, %r16 | |
4594 | rd %tick, %r28 | |
4595 | #if (MAX_THREADS == 8) | |
4596 | sethi %hi(0x33800), %r27 | |
4597 | #else | |
4598 | sethi %hi(0x30000), %r27 | |
4599 | #endif | |
4600 | andn %r28, %r27, %r28 | |
4601 | ta T_CHANGE_HPRIV | |
4602 | stxa %r28, [%g0] 0x73 | |
4603 | intvec_40_121: | |
4604 | .word 0x9ba489d0 ! 278: FDIVd fdivd %f18, %f16, %f44 | |
4605 | .word 0xd03fe0c0 ! 279: STD_I std %r8, [%r31 + 0x00c0] | |
4606 | .word 0x20800001 ! 280: BN bn,a <label_0x1> | |
4607 | .word 0x39400001 ! 281: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4608 | .word 0xe19fc2c0 ! 281: LDDFA_R ldda [%r31, %r0], %f16 | |
4609 | rd %tick, %r28 | |
4610 | #if (MAX_THREADS == 8) | |
4611 | sethi %hi(0x33800), %r27 | |
4612 | #else | |
4613 | sethi %hi(0x30000), %r27 | |
4614 | #endif | |
4615 | andn %r28, %r27, %r28 | |
4616 | ta T_CHANGE_HPRIV | |
4617 | stxa %r28, [%g0] 0x73 | |
4618 | intvec_40_123: | |
4619 | .word 0xc1bfdf20 ! 282: STDFA_R stda %f0, [%r0, %r31] | |
4620 | .word 0x39400001 ! 283: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4621 | .word 0x39400001 ! 284: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4622 | .word 0x20800001 ! 285: BN bn,a <label_0x1> | |
4623 | .word 0xd43fe0b0 ! 285: STD_I std %r10, [%r31 + 0x00b0] | |
4624 | .word 0xc19fc3e0 ! 286: LDDFA_R ldda [%r31, %r0], %f0 | |
4625 | .word 0x95b7c4c2 ! 287: FCMPNE32 fcmpne32 %d62, %d2, %r10 | |
4626 | .word 0xc1bfda00 ! 288: STDFA_R stda %f0, [%r0, %r31] | |
4627 | .word 0xe1bfde00 ! 289: STDFA_R stda %f16, [%r0, %r31] | |
4628 | .word 0xc19fda00 ! 289: LDDFA_R ldda [%r31, %r0], %f0 | |
4629 | memptr_40_126: | |
4630 | set user_data_start, %r31 | |
4631 | .word 0x20800001 ! 290: BN bn,a <label_0x1> | |
4632 | .word 0x858535c0 ! 291: WRCCR_I wr %r20, 0x15c0, %ccr | |
4633 | .word 0xc19fdb60 ! 292: LDDFA_R ldda [%r31, %r0], %f0 | |
4634 | .word 0xe1bfdb60 ! 293: STDFA_R stda %f16, [%r0, %r31] | |
4635 | .word 0x85842e20 ! 293: WRCCR_I wr %r16, 0x0e20, %ccr | |
4636 | rd %tick, %r28 | |
4637 | #if (MAX_THREADS == 8) | |
4638 | sethi %hi(0x33800), %r27 | |
4639 | #else | |
4640 | sethi %hi(0x30000), %r27 | |
4641 | #endif | |
4642 | andn %r28, %r27, %r28 | |
4643 | ta T_CHANGE_HPRIV | |
4644 | stxa %r28, [%g0] 0x73 | |
4645 | .word 0xa3b4c4cd ! 1: FCMPNE32 fcmpne32 %d50, %d44, %r17 | |
4646 | intvec_40_127: | |
4647 | .word 0xa5a309ca ! 294: FDIVd fdivd %f12, %f10, %f18 | |
4648 | .word 0x87afca41 ! 295: FCMPd fcmpd %fcc<n>, %f62, %f32 | |
4649 | .word 0xc32fe080 ! 296: STXFSR_I st-sfr %f1, [0x0080, %r31] | |
4650 | .word 0xa7b044cb ! 297: FCMPNE32 fcmpne32 %d32, %d42, %r19 | |
4651 | .word 0xd03fe070 ! 297: STD_I std %r8, [%r31 + 0x0070] | |
4652 | memptr_40_128: | |
4653 | set 0x60740000, %r31 | |
4654 | .word 0xd13fe0b0 ! 298: STDF_I std %f8, [0x00b0, %r31] | |
4655 | .word 0x8584f3b3 ! 299: WRCCR_I wr %r19, 0x13b3, %ccr | |
4656 | .word 0xd097d002 ! 300: LDUHA_R lduha [%r31, %r2] 0x80, %r8 | |
4657 | .word 0xc3efe130 ! 301: PREFETCHA_I prefetcha [%r31, + 0x0130] %asi, #one_read | |
4658 | .word 0xd097c403 ! 301: LDUHA_R lduha [%r31, %r3] 0x20, %r8 | |
4659 | .word 0xc1bfda00 ! 302: STDFA_R stda %f0, [%r0, %r31] | |
4660 | .word 0x91a7c9c3 ! 303: FDIVd fdivd %f62, %f34, %f8 | |
4661 | .word 0xe19fda00 ! 304: LDDFA_R ldda [%r31, %r0], %f16 | |
4662 | .word 0x20800001 ! 305: BN bn,a <label_0x1> | |
4663 | .word 0xe1bfd960 ! 305: STDFA_R stda %f16, [%r0, %r31] | |
4664 | memptr_40_130: | |
4665 | set 0x60540000, %r31 | |
4666 | rd %tick, %r28 | |
4667 | #if (MAX_THREADS == 8) | |
4668 | sethi %hi(0x33800), %r27 | |
4669 | #else | |
4670 | sethi %hi(0x30000), %r27 | |
4671 | #endif | |
4672 | andn %r28, %r27, %r28 | |
4673 | ta T_CHANGE_HPRIV | |
4674 | stxa %r28, [%g0] 0x73 | |
4675 | .word 0x9f803bee ! 1: SIR sir 0x1bee | |
4676 | intvec_40_131: | |
4677 | .word 0xe19fdb60 ! 306: LDDFA_R ldda [%r31, %r0], %f16 | |
4678 | .word 0x85853f10 ! 307: WRCCR_I wr %r20, 0x1f10, %ccr | |
4679 | .word 0xa7a309ca ! 308: FDIVd fdivd %f12, %f10, %f50 | |
4680 | .word 0xc19fd920 ! 309: LDDFA_R ldda [%r31, %r0], %f0 | |
4681 | .word 0x9bb184cb ! 309: FCMPNE32 fcmpne32 %d6, %d42, %r13 | |
4682 | rd %tick, %r28 | |
4683 | #if (MAX_THREADS == 8) | |
4684 | sethi %hi(0x33800), %r27 | |
4685 | #else | |
4686 | sethi %hi(0x30000), %r27 | |
4687 | #endif | |
4688 | andn %r28, %r27, %r28 | |
4689 | ta T_CHANGE_HPRIV | |
4690 | stxa %r28, [%g0] 0x73 | |
4691 | intvec_40_133: | |
4692 | .word 0xc19fdf20 ! 310: LDDFA_R ldda [%r31, %r0], %f0 | |
4693 | .word 0xe1bfdc00 ! 311: STDFA_R stda %f16, [%r0, %r31] | |
4694 | .word 0x9f80221a ! 312: SIR sir 0x021a | |
4695 | .word 0xe1bfde00 ! 313: STDFA_R stda %f16, [%r0, %r31] | |
4696 | .word 0xc19fd920 ! 313: LDDFA_R ldda [%r31, %r0], %f0 | |
4697 | memptr_40_134: | |
4698 | set 0x60340000, %r31 | |
4699 | rd %tick, %r28 | |
4700 | #if (MAX_THREADS == 8) | |
4701 | sethi %hi(0x33800), %r27 | |
4702 | #else | |
4703 | sethi %hi(0x30000), %r27 | |
4704 | #endif | |
4705 | andn %r28, %r27, %r28 | |
4706 | ta T_CHANGE_HPRIV | |
4707 | stxa %r28, [%g0] 0x73 | |
4708 | intvec_40_135: | |
4709 | .word 0xe697c602 ! 314: LDUHA_R lduha [%r31, %r2] 0x30, %r19 | |
4710 | .word 0x8582b03e ! 315: WRCCR_I wr %r10, 0x103e, %ccr | |
4711 | .word 0x19400001 ! 316: FBPUGE fbuge | |
4712 | .word 0xc32fe0d0 ! 317: STXFSR_I st-sfr %f1, [0x00d0, %r31] | |
4713 | .word 0x9f80216c ! 317: SIR sir 0x016c | |
4714 | .word 0xc3efe0c0 ! 318: PREFETCHA_I prefetcha [%r31, + 0x00c0] %asi, #one_read | |
4715 | .word 0xe1bfdb60 ! 319: STDFA_R stda %f16, [%r0, %r31] | |
4716 | .word 0x9f8021d0 ! 320: SIR sir 0x01d0 | |
4717 | .word 0xe3e7c723 ! 321: CASA_I casa [%r31] 0x39, %r3, %r17 | |
4718 | .word 0xe3e7d002 ! 321: CASA_I casa [%r31] 0x80, %r2, %r17 | |
4719 | #if (defined SPC || defined CMP1) | |
4720 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_136) + 32, 16, 16)) -> intp(4,0,20,,,,,1) | |
4721 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_136)&0xffffffff) + 48, 16, 16)) -> intp(5,0,20,,,,,1) | |
4722 | #else | |
4723 | set 0xac50c552, %r28 | |
4724 | #if (MAX_THREADS == 8) | |
4725 | and %r28, 0x7ff, %r28 | |
4726 | #endif | |
4727 | stxa %r28, [%g0] 0x73 | |
4728 | #endif | |
4729 | intvec_40_136: | |
4730 | .word 0x97b2c4cb ! 322: FCMPNE32 fcmpne32 %d42, %d42, %r11 | |
4731 | .word 0xc1bfda00 ! 323: STDFA_R stda %f0, [%r0, %r31] | |
4732 | .word 0xc19fdb60 ! 324: LDDFA_R ldda [%r31, %r0], %f0 | |
4733 | .word 0x9ba409ca ! 325: FDIVd fdivd %f16, %f10, %f44 | |
4734 | .word 0xc1bfdc00 ! 325: STDFA_R stda %f0, [%r0, %r31] | |
4735 | #if (defined SPC || defined CMP1) | |
4736 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_138) + 48, 16, 16)) -> intp(6,0,3,,,,,1) | |
4737 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_138)&0xffffffff) + 16, 16, 16)) -> intp(2,0,22,,,,,1) | |
4738 | #else | |
4739 | set 0x430e4fd, %r28 | |
4740 | #if (MAX_THREADS == 8) | |
4741 | and %r28, 0x7ff, %r28 | |
4742 | #endif | |
4743 | stxa %r28, [%g0] 0x73 | |
4744 | #endif | |
4745 | .word 0x9f803dfc ! 1: SIR sir 0x1dfc | |
4746 | intvec_40_138: | |
4747 | .word 0x99b204ca ! 326: FCMPNE32 fcmpne32 %d8, %d10, %r12 | |
4748 | .word 0xdbe7e001 ! 327: CASA_R casa [%r31] %asi, %r1, %r13 | |
4749 | .word 0xdadfd161 ! 328: LDXA_R ldxa [%r31, %r1] 0x8b, %r13 | |
4750 | .word 0x39400001 ! 329: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4751 | .word 0xa1a7c9c2 ! 329: FDIVd fdivd %f62, %f2, %f16 | |
4752 | .word 0xc3efe0e0 ! 330: PREFETCHA_I prefetcha [%r31, + 0x00e0] %asi, #one_read | |
4753 | .word 0x20800001 ! 331: BN bn,a <label_0x1> | |
4754 | .word 0xc19fdf20 ! 332: LDDFA_R ldda [%r31, %r0], %f0 | |
4755 | .word 0xe09fc602 ! 333: LDDA_R ldda [%r31, %r2] 0x30, %r16 | |
4756 | .word 0xe19fdf20 ! 333: LDDFA_R ldda [%r31, %r0], %f16 | |
4757 | rd %tick, %r28 | |
4758 | #if (MAX_THREADS == 8) | |
4759 | sethi %hi(0x33800), %r27 | |
4760 | #else | |
4761 | sethi %hi(0x30000), %r27 | |
4762 | #endif | |
4763 | andn %r28, %r27, %r28 | |
4764 | ta T_CHANGE_HPRIV | |
4765 | stxa %r28, [%g0] 0x73 | |
4766 | intvec_40_139: | |
4767 | .word 0xe19fdf20 ! 334: LDDFA_R ldda [%r31, %r0], %f16 | |
4768 | .word 0x24cfc001 ! 335: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
4769 | .word 0x97b504d0 ! 336: FCMPNE32 fcmpne32 %d20, %d16, %r11 | |
4770 | .word 0xe19fdb60 ! 337: LDDFA_R ldda [%r31, %r0], %f16 | |
4771 | .word 0x99b304c5 ! 337: FCMPNE32 fcmpne32 %d12, %d36, %r12 | |
4772 | .word 0x00800001 ! 338: BN bn <label_0x1> | |
4773 | .word 0xd9e7c2c3 ! 339: CASA_I casa [%r31] 0x16, %r3, %r12 | |
4774 | .word 0xc3efe1b0 ! 340: PREFETCHA_I prefetcha [%r31, + 0x01b0] %asi, #one_read | |
4775 | .word 0x00800001 ! 341: BN bn <label_0x1> | |
4776 | .word 0x99a7c9c0 ! 341: FDIVd fdivd %f62, %f0, %f12 | |
4777 | memptr_40_141: | |
4778 | set user_data_start, %r31 | |
4779 | .word 0xd89fc381 ! 342: LDDA_R ldda [%r31, %r1] 0x1c, %r12 | |
4780 | .word 0x8580e6cb ! 343: WRCCR_I wr %r3, 0x06cb, %ccr | |
4781 | .word 0xc19fdf20 ! 344: LDDFA_R ldda [%r31, %r0], %f0 | |
4782 | .word 0x9f802010 ! 345: SIR sir 0x0010 | |
4783 | .word 0x858362c5 ! 345: WRCCR_I wr %r13, 0x02c5, %ccr | |
4784 | rd %tick, %r28 | |
4785 | #if (MAX_THREADS == 8) | |
4786 | sethi %hi(0x33800), %r27 | |
4787 | #else | |
4788 | sethi %hi(0x30000), %r27 | |
4789 | #endif | |
4790 | andn %r28, %r27, %r28 | |
4791 | ta T_CHANGE_HPRIV | |
4792 | stxa %r28, [%g0] 0x73 | |
4793 | intvec_40_143: | |
4794 | memptr_40_144: | |
4795 | set user_data_start, %r31 | |
4796 | rd %tick, %r28 | |
4797 | #if (MAX_THREADS == 8) | |
4798 | sethi %hi(0x33800), %r27 | |
4799 | #else | |
4800 | sethi %hi(0x30000), %r27 | |
4801 | #endif | |
4802 | andn %r28, %r27, %r28 | |
4803 | ta T_CHANGE_HPRIV | |
4804 | stxa %r28, [%g0] 0x73 | |
4805 | .word 0x93b244cb ! 1: FCMPNE32 fcmpne32 %d40, %d42, %r9 | |
4806 | intvec_40_145: | |
4807 | .word 0x97b104ca ! 346: FCMPNE32 fcmpne32 %d4, %d10, %r11 | |
4808 | .word 0x8581e88a ! 347: WRCCR_I wr %r7, 0x088a, %ccr | |
4809 | .word 0x9f802d60 ! 348: SIR sir 0x0d60 | |
4810 | .word 0x39400001 ! 349: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4811 | .word 0x9f803e46 ! 349: SIR sir 0x1e46 | |
4812 | .word 0xd49fc543 ! 350: LDDA_R ldda [%r31, %r3] 0x2a, %r10 | |
4813 | .word 0x39400001 ! 351: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4814 | .word 0xe1bfc2c0 ! 352: STDFA_R stda %f16, [%r0, %r31] | |
4815 | .word 0xd43fe0d0 ! 353: STD_I std %r10, [%r31 + 0x00d0] | |
4816 | .word 0xe1bfdc00 ! 353: STDFA_R stda %f16, [%r0, %r31] | |
4817 | memptr_40_148: | |
4818 | set 0x60140000, %r31 | |
4819 | rd %tick, %r28 | |
4820 | #if (MAX_THREADS == 8) | |
4821 | sethi %hi(0x33800), %r27 | |
4822 | #else | |
4823 | sethi %hi(0x30000), %r27 | |
4824 | #endif | |
4825 | andn %r28, %r27, %r28 | |
4826 | ta T_CHANGE_HPRIV | |
4827 | stxa %r28, [%g0] 0x73 | |
4828 | intvec_40_149: | |
4829 | .word 0xc1bfdb60 ! 354: STDFA_R stda %f0, [%r0, %r31] | |
4830 | .word 0x858135c4 ! 355: WRCCR_I wr %r4, 0x15c4, %ccr | |
4831 | .word 0x9bb244d1 ! 356: FCMPNE32 fcmpne32 %d40, %d48, %r13 | |
4832 | .word 0xe1bfdc00 ! 357: STDFA_R stda %f16, [%r0, %r31] | |
4833 | .word 0x858375bb ! 357: WRCCR_I wr %r13, 0x15bb, %ccr | |
4834 | rd %tick, %r28 | |
4835 | #if (MAX_THREADS == 8) | |
4836 | sethi %hi(0x33800), %r27 | |
4837 | #else | |
4838 | sethi %hi(0x30000), %r27 | |
4839 | #endif | |
4840 | andn %r28, %r27, %r28 | |
4841 | ta T_CHANGE_HPRIV | |
4842 | stxa %r28, [%g0] 0x73 | |
4843 | intvec_40_151: | |
4844 | .word 0x93a149cc ! 358: FDIVd fdivd %f36, %f12, %f40 | |
4845 | .word 0xc19fdf20 ! 359: LDDFA_R ldda [%r31, %r0], %f0 | |
4846 | .word 0x20800001 ! 360: BN bn,a <label_0x1> | |
4847 | .word 0x39400001 ! 361: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4848 | .word 0x20800001 ! 361: BN bn,a <label_0x1> | |
4849 | #if (defined SPC || defined CMP1) | |
4850 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_152) + 8, 16, 16)) -> intp(1,0,29,,,,,1) | |
4851 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_152)&0xffffffff) + 24, 16, 16)) -> intp(6,0,14,,,,,1) | |
4852 | #else | |
4853 | set 0x6130aef8, %r28 | |
4854 | #if (MAX_THREADS == 8) | |
4855 | and %r28, 0x7ff, %r28 | |
4856 | #endif | |
4857 | stxa %r28, [%g0] 0x73 | |
4858 | #endif | |
4859 | intvec_40_152: | |
4860 | .word 0x9f802050 ! 362: SIR sir 0x0050 | |
4861 | .word 0x24cfc001 ! 363: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
4862 | .word 0x39400001 ! 364: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4863 | .word 0xc32fe0a0 ! 365: STXFSR_I st-sfr %f1, [0x00a0, %r31] | |
4864 | .word 0xd9e7e003 ! 365: CASA_R casa [%r31] %asi, %r3, %r12 | |
4865 | memptr_40_153: | |
4866 | set user_data_start, %r31 | |
4867 | #if (defined SPC || defined CMP1) | |
4868 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_154) + 0, 16, 16)) -> intp(4,0,8,,,,,1) | |
4869 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_154)&0xffffffff) + 56, 16, 16)) -> intp(6,0,0,,,,,1) | |
4870 | #else | |
4871 | set 0xc490caed, %r28 | |
4872 | #if (MAX_THREADS == 8) | |
4873 | and %r28, 0x7ff, %r28 | |
4874 | #endif | |
4875 | stxa %r28, [%g0] 0x73 | |
4876 | #endif | |
4877 | .word 0x93b284d2 ! 1: FCMPNE32 fcmpne32 %d10, %d18, %r9 | |
4878 | intvec_40_154: | |
4879 | .word 0xc19fd920 ! 366: LDDFA_R ldda [%r31, %r0], %f0 | |
4880 | .word 0x8581e5d7 ! 367: WRCCR_I wr %r7, 0x05d7, %ccr | |
4881 | .word 0xa5a409d0 ! 368: FDIVd fdivd %f16, %f16, %f18 | |
4882 | .word 0xc19fc3e0 ! 369: LDDFA_R ldda [%r31, %r0], %f0 | |
4883 | .word 0x8580fff8 ! 369: WRCCR_I wr %r3, 0x1ff8, %ccr | |
4884 | #if (defined SPC || defined CMP1) | |
4885 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_156) + 32, 16, 16)) -> intp(2,0,25,,,,,1) | |
4886 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_156)&0xffffffff) + 48, 16, 16)) -> intp(6,0,9,,,,,1) | |
4887 | #else | |
4888 | set 0x8550ea67, %r28 | |
4889 | #if (MAX_THREADS == 8) | |
4890 | and %r28, 0x7ff, %r28 | |
4891 | #endif | |
4892 | stxa %r28, [%g0] 0x73 | |
4893 | #endif | |
4894 | .word 0x19400001 ! 1: FBPUGE fbuge | |
4895 | intvec_40_156: | |
4896 | memptr_40_157: | |
4897 | set 0x60740000, %r31 | |
4898 | #if (defined SPC || defined CMP1) | |
4899 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_158) + 16, 16, 16)) -> intp(0,0,29,,,,,1) | |
4900 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_158)&0xffffffff) + 24, 16, 16)) -> intp(1,0,18,,,,,1) | |
4901 | #else | |
4902 | set 0x2a60e8e8, %r28 | |
4903 | #if (MAX_THREADS == 8) | |
4904 | and %r28, 0x7ff, %r28 | |
4905 | #endif | |
4906 | stxa %r28, [%g0] 0x73 | |
4907 | #endif | |
4908 | .word 0x19400001 ! 1: FBPUGE fbuge | |
4909 | intvec_40_158: | |
4910 | .word 0x19400001 ! 370: FBPUGE fbuge | |
4911 | .word 0x858463d8 ! 371: WRCCR_I wr %r17, 0x03d8, %ccr | |
4912 | .word 0x9f803b73 ! 372: SIR sir 0x1b73 | |
4913 | .word 0x95b304cd ! 373: FCMPNE32 fcmpne32 %d12, %d44, %r10 | |
4914 | .word 0x8584adac ! 373: WRCCR_I wr %r18, 0x0dac, %ccr | |
4915 | #if (defined SPC || defined CMP1) | |
4916 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_160) + 0, 16, 16)) -> intp(3,0,15,,,,,1) | |
4917 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_160)&0xffffffff) + 0, 16, 16)) -> intp(4,0,31,,,,,1) | |
4918 | #else | |
4919 | set 0xf390985c, %r28 | |
4920 | #if (MAX_THREADS == 8) | |
4921 | and %r28, 0x7ff, %r28 | |
4922 | #endif | |
4923 | stxa %r28, [%g0] 0x73 | |
4924 | #endif | |
4925 | intvec_40_160: | |
4926 | memptr_40_161: | |
4927 | set 0x60540000, %r31 | |
4928 | .word 0x9f802b3e ! 374: SIR sir 0x0b3e | |
4929 | .word 0x85846e72 ! 375: WRCCR_I wr %r17, 0x0e72, %ccr | |
4930 | .word 0xc19fc2c0 ! 376: LDDFA_R ldda [%r31, %r0], %f0 | |
4931 | .word 0x9f802d64 ! 377: SIR sir 0x0d64 | |
4932 | .word 0xc1bfde00 ! 377: STDFA_R stda %f0, [%r0, %r31] | |
4933 | #if (defined SPC || defined CMP1) | |
4934 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_162) + 56, 16, 16)) -> intp(1,0,13,,,,,1) | |
4935 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_162)&0xffffffff) + 0, 16, 16)) -> intp(3,0,14,,,,,1) | |
4936 | #else | |
4937 | set 0xe320d551, %r28 | |
4938 | #if (MAX_THREADS == 8) | |
4939 | and %r28, 0x7ff, %r28 | |
4940 | #endif | |
4941 | stxa %r28, [%g0] 0x73 | |
4942 | #endif | |
4943 | .word 0xa5b444d2 ! 1: FCMPNE32 fcmpne32 %d48, %d18, %r18 | |
4944 | intvec_40_162: | |
4945 | .word 0x9f80398a ! 378: SIR sir 0x198a | |
4946 | .word 0xe19fc2c0 ! 379: LDDFA_R ldda [%r31, %r0], %f16 | |
4947 | .word 0xe1bfdb60 ! 380: STDFA_R stda %f16, [%r0, %r31] | |
4948 | .word 0xa3a1c9d4 ! 381: FDIVd fdivd %f38, %f20, %f48 | |
4949 | .word 0xe1bfdf20 ! 381: STDFA_R stda %f16, [%r0, %r31] | |
4950 | .word 0xe3e7dc41 ! 382: CASA_I casa [%r31] 0xe2, %r1, %r17 | |
4951 | .word 0xe1bfd920 ! 383: STDFA_R stda %f16, [%r0, %r31] | |
4952 | .word 0x9f8020f0 ! 384: SIR sir 0x00f0 | |
4953 | .word 0x9f802010 ! 385: SIR sir 0x0010 | |
4954 | .word 0xe3e7d920 ! 385: CASA_I casa [%r31] 0xc9, %r0, %r17 | |
4955 | .word 0x00800001 ! 386: BN bn <label_0x1> | |
4956 | .word 0xc1bfdf20 ! 387: STDFA_R stda %f0, [%r0, %r31] | |
4957 | .word 0x00800001 ! 388: BN bn <label_0x1> | |
4958 | .word 0xc19fdf20 ! 389: LDDFA_R ldda [%r31, %r0], %f0 | |
4959 | .word 0xe19fc2c0 ! 389: LDDFA_R ldda [%r31, %r0], %f16 | |
4960 | .word 0xe497d143 ! 390: LDUHA_R lduha [%r31, %r3] 0x8a, %r18 | |
4961 | .word 0xe19fdf20 ! 391: LDDFA_R ldda [%r31, %r0], %f16 | |
4962 | .word 0xe19fd960 ! 392: LDDFA_R ldda [%r31, %r0], %f16 | |
4963 | .word 0xc3efe150 ! 393: PREFETCHA_I prefetcha [%r31, + 0x0150] %asi, #one_read | |
4964 | .word 0xc1bfda00 ! 393: STDFA_R stda %f0, [%r0, %r31] | |
4965 | rd %tick, %r28 | |
4966 | #if (MAX_THREADS == 8) | |
4967 | sethi %hi(0x33800), %r27 | |
4968 | #else | |
4969 | sethi %hi(0x30000), %r27 | |
4970 | #endif | |
4971 | andn %r28, %r27, %r28 | |
4972 | ta T_CHANGE_HPRIV | |
4973 | stxa %r28, [%g0] 0x73 | |
4974 | intvec_40_165: | |
4975 | memptr_40_166: | |
4976 | set 0x60740000, %r31 | |
4977 | .word 0xa3b044d1 ! 394: FCMPNE32 fcmpne32 %d32, %d48, %r17 | |
4978 | .word 0x8584b2fc ! 395: WRCCR_I wr %r18, 0x12fc, %ccr | |
4979 | .word 0xe29fc540 ! 396: LDDA_R ldda [%r31, %r0] 0x2a, %r17 | |
4980 | .word 0xa3a489d3 ! 397: FDIVd fdivd %f18, %f50, %f48 | |
4981 | .word 0x8582ad71 ! 397: WRCCR_I wr %r10, 0x0d71, %ccr | |
4982 | #if (defined SPC || defined CMP1) | |
4983 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_168) + 32, 16, 16)) -> intp(0,0,10,,,,,1) | |
4984 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_168)&0xffffffff) + 8, 16, 16)) -> intp(7,0,24,,,,,1) | |
4985 | #else | |
4986 | set 0xef306592, %r28 | |
4987 | #if (MAX_THREADS == 8) | |
4988 | and %r28, 0x7ff, %r28 | |
4989 | #endif | |
4990 | stxa %r28, [%g0] 0x73 | |
4991 | #endif | |
4992 | .word 0xa3a289c6 ! 1: FDIVd fdivd %f10, %f6, %f48 | |
4993 | intvec_40_168: | |
4994 | .word 0xe19fdb60 ! 398: LDDFA_R ldda [%r31, %r0], %f16 | |
4995 | .word 0xe1bfde00 ! 399: STDFA_R stda %f16, [%r0, %r31] | |
4996 | .word 0x39400001 ! 400: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4997 | .word 0xc1bfda00 ! 401: STDFA_R stda %f0, [%r0, %r31] | |
4998 | .word 0xa1b404d2 ! 401: FCMPNE32 fcmpne32 %d16, %d18, %r16 | |
4999 | memptr_40_169: | |
5000 | set 0x60140000, %r31 | |
5001 | #if (defined SPC || defined CMP1) | |
5002 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_170) + 8, 16, 16)) -> intp(3,0,8,,,,,1) | |
5003 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_170)&0xffffffff) + 0, 16, 16)) -> intp(3,0,5,,,,,1) | |
5004 | #else | |
5005 | set 0x1040b38b, %r28 | |
5006 | #if (MAX_THREADS == 8) | |
5007 | and %r28, 0x7ff, %r28 | |
5008 | #endif | |
5009 | stxa %r28, [%g0] 0x73 | |
5010 | #endif | |
5011 | .word 0x9f803d5f ! 1: SIR sir 0x1d5f | |
5012 | intvec_40_170: | |
5013 | .word 0xc3efe070 ! 402: PREFETCHA_I prefetcha [%r31, + 0x0070] %asi, #one_read | |
5014 | .word 0x85842ca2 ! 403: WRCCR_I wr %r16, 0x0ca2, %ccr | |
5015 | .word 0xa5b1c4d0 ! 404: FCMPNE32 fcmpne32 %d38, %d16, %r18 | |
5016 | .word 0x9f802030 ! 405: SIR sir 0x0030 | |
5017 | .word 0x85817755 ! 405: WRCCR_I wr %r5, 0x1755, %ccr | |
5018 | #if (defined SPC || defined CMP1) | |
5019 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_172) + 48, 16, 16)) -> intp(4,0,6,,,,,1) | |
5020 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_172)&0xffffffff) + 24, 16, 16)) -> intp(0,0,18,,,,,1) | |
5021 | #else | |
5022 | set 0x20701405, %r28 | |
5023 | #if (MAX_THREADS == 8) | |
5024 | and %r28, 0x7ff, %r28 | |
5025 | #endif | |
5026 | stxa %r28, [%g0] 0x73 | |
5027 | #endif | |
5028 | intvec_40_172: | |
5029 | .word 0x9f8021e0 ! 406: SIR sir 0x01e0 | |
5030 | .word 0xd3e7d101 ! 407: CASA_I casa [%r31] 0x88, %r1, %r9 | |
5031 | .word 0x39400001 ! 408: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5032 | .word 0xd53fe1d0 ! 409: STDF_I std %f10, [0x01d0, %r31] | |
5033 | .word 0x91a4c9d1 ! 409: FDIVd fdivd %f50, %f48, %f8 | |
5034 | #if (defined SPC || defined CMP1) | |
5035 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_174) + 32, 16, 16)) -> intp(1,0,11,,,,,1) | |
5036 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_174)&0xffffffff) + 8, 16, 16)) -> intp(3,0,26,,,,,1) | |
5037 | #else | |
5038 | set 0x8c80f886, %r28 | |
5039 | #if (MAX_THREADS == 8) | |
5040 | and %r28, 0x7ff, %r28 | |
5041 | #endif | |
5042 | stxa %r28, [%g0] 0x73 | |
5043 | #endif | |
5044 | intvec_40_174: | |
5045 | .word 0x9f802050 ! 410: SIR sir 0x0050 | |
5046 | .word 0x20800001 ! 411: BN bn,a <label_0x1> | |
5047 | .word 0xa5a2c9c4 ! 412: FDIVd fdivd %f42, %f4, %f18 | |
5048 | .word 0xe53fe050 ! 413: STDF_I std %f18, [0x0050, %r31] | |
5049 | .word 0xc1bfd960 ! 413: STDFA_R stda %f0, [%r0, %r31] | |
5050 | .word 0x9f8020f0 ! 414: SIR sir 0x00f0 | |
5051 | .word 0xe43fe050 ! 415: STD_I std %r18, [%r31 + 0x0050] | |
5052 | .word 0x00800001 ! 416: BN bn <label_0x1> | |
5053 | .word 0xe4dfdd40 ! 417: LDXA_R ldxa [%r31, %r0] 0xea, %r18 | |
5054 | .word 0x00800001 ! 417: BN bn <label_0x1> | |
5055 | #if (defined SPC || defined CMP1) | |
5056 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_176) + 40, 16, 16)) -> intp(2,0,22,,,,,1) | |
5057 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_176)&0xffffffff) + 24, 16, 16)) -> intp(1,0,6,,,,,1) | |
5058 | #else | |
5059 | set 0x54005f2, %r28 | |
5060 | #if (MAX_THREADS == 8) | |
5061 | and %r28, 0x7ff, %r28 | |
5062 | #endif | |
5063 | stxa %r28, [%g0] 0x73 | |
5064 | #endif | |
5065 | .word 0x91b504c6 ! 1: FCMPNE32 fcmpne32 %d20, %d6, %r8 | |
5066 | intvec_40_176: | |
5067 | .word 0xa7a209cc ! 418: FDIVd fdivd %f8, %f12, %f50 | |
5068 | .word 0x39400001 ! 419: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5069 | .word 0xe7e7c602 ! 420: CASA_I casa [%r31] 0x30, %r2, %r19 | |
5070 | .word 0x99a409d4 ! 421: FDIVd fdivd %f16, %f20, %f12 | |
5071 | .word 0x87afca42 ! 421: FCMPd fcmpd %fcc<n>, %f62, %f2 | |
5072 | memptr_40_177: | |
5073 | set user_data_start, %r31 | |
5074 | #if (defined SPC || defined CMP1) | |
5075 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_178) + 48, 16, 16)) -> intp(4,0,10,,,,,1) | |
5076 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_178)&0xffffffff) + 56, 16, 16)) -> intp(1,0,20,,,,,1) | |
5077 | #else | |
5078 | set 0x4040db12, %r28 | |
5079 | #if (MAX_THREADS == 8) | |
5080 | and %r28, 0x7ff, %r28 | |
5081 | #endif | |
5082 | stxa %r28, [%g0] 0x73 | |
5083 | #endif | |
5084 | intvec_40_178: | |
5085 | .word 0xd81fe140 ! 422: LDD_I ldd [%r31 + 0x0140], %r12 | |
5086 | .word 0x85846473 ! 423: WRCCR_I wr %r17, 0x0473, %ccr | |
5087 | .word 0xa1b144d0 ! 424: FCMPNE32 fcmpne32 %d36, %d16, %r16 | |
5088 | .word 0xc32fe020 ! 425: STXFSR_I st-sfr %f1, [0x0020, %r31] | |
5089 | .word 0x8585254f ! 425: WRCCR_I wr %r20, 0x054f, %ccr | |
5090 | #if (defined SPC || defined CMP1) | |
5091 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_180) + 56, 16, 16)) -> intp(1,0,7,,,,,1) | |
5092 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_180)&0xffffffff) + 48, 16, 16)) -> intp(5,0,18,,,,,1) | |
5093 | #else | |
5094 | set 0x9090cb21, %r28 | |
5095 | #if (MAX_THREADS == 8) | |
5096 | and %r28, 0x7ff, %r28 | |
5097 | #endif | |
5098 | stxa %r28, [%g0] 0x73 | |
5099 | #endif | |
5100 | .word 0x9f8031c3 ! 1: SIR sir 0x11c3 | |
5101 | intvec_40_180: | |
5102 | .word 0xda3fe0a0 ! 426: STD_I std %r13, [%r31 + 0x00a0] | |
5103 | .word 0xc36fe190 ! 427: PREFETCH_I prefetch [%r31 + 0x0190], #one_read | |
5104 | .word 0x39400001 ! 428: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5105 | .word 0xd5e7dc41 ! 429: CASA_I casa [%r31] 0xe2, %r1, %r10 | |
5106 | .word 0x9f803670 ! 429: SIR sir 0x1670 | |
5107 | .word 0xc3efe060 ! 430: PREFETCHA_I prefetcha [%r31, + 0x0060] %asi, #one_read | |
5108 | .word 0xc19fdf20 ! 431: LDDFA_R ldda [%r31, %r0], %f0 | |
5109 | .word 0xe49fd163 ! 432: LDDA_R ldda [%r31, %r3] 0x8b, %r18 | |
5110 | .word 0xc3efe0b0 ! 433: PREFETCHA_I prefetcha [%r31, + 0x00b0] %asi, #one_read | |
5111 | .word 0xe497c6c0 ! 433: LDUHA_R lduha [%r31, %r0] 0x36, %r18 | |
5112 | rd %tick, %r28 | |
5113 | #if (MAX_THREADS == 8) | |
5114 | sethi %hi(0x33800), %r27 | |
5115 | #else | |
5116 | sethi %hi(0x30000), %r27 | |
5117 | #endif | |
5118 | andn %r28, %r27, %r28 | |
5119 | ta T_CHANGE_HPRIV | |
5120 | stxa %r28, [%g0] 0x73 | |
5121 | intvec_40_183: | |
5122 | .word 0xc19fde00 ! 434: LDDFA_R ldda [%r31, %r0], %f0 | |
5123 | .word 0xe19fdc00 ! 435: LDDFA_R ldda [%r31, %r0], %f16 | |
5124 | .word 0x39400001 ! 436: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5125 | .word 0x20800001 ! 437: BN bn,a <label_0x1> | |
5126 | .word 0x91b084c7 ! 437: FCMPNE32 fcmpne32 %d2, %d38, %r8 | |
5127 | memptr_40_185: | |
5128 | set 0x60540000, %r31 | |
5129 | .word 0xd01fe1d0 ! 438: LDD_I ldd [%r31 + 0x01d0], %r8 | |
5130 | .word 0x8584e8a7 ! 439: WRCCR_I wr %r19, 0x08a7, %ccr | |
5131 | .word 0xd11fe080 ! 440: LDDF_I ldd [%r31, 0x0080], %f8 | |
5132 | .word 0xd03fe1b0 ! 441: STD_I std %r8, [%r31 + 0x01b0] | |
5133 | .word 0x8584edbf ! 441: WRCCR_I wr %r19, 0x0dbf, %ccr | |
5134 | #if (defined SPC || defined CMP1) | |
5135 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_186) + 32, 16, 16)) -> intp(6,0,25,,,,,1) | |
5136 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_186)&0xffffffff) + 24, 16, 16)) -> intp(1,0,7,,,,,1) | |
5137 | #else | |
5138 | set 0x1a009e04, %r28 | |
5139 | #if (MAX_THREADS == 8) | |
5140 | and %r28, 0x7ff, %r28 | |
5141 | #endif | |
5142 | stxa %r28, [%g0] 0x73 | |
5143 | #endif | |
5144 | .word 0x93a309d3 ! 1: FDIVd fdivd %f12, %f50, %f40 | |
5145 | intvec_40_186: | |
5146 | memptr_40_187: | |
5147 | set 0x60340000, %r31 | |
5148 | #if (defined SPC || defined CMP1) | |
5149 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_188) + 0, 16, 16)) -> intp(3,0,30,,,,,1) | |
5150 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_188)&0xffffffff) + 40, 16, 16)) -> intp(4,0,23,,,,,1) | |
5151 | #else | |
5152 | set 0x47f0c8b4, %r28 | |
5153 | #if (MAX_THREADS == 8) | |
5154 | and %r28, 0x7ff, %r28 | |
5155 | #endif | |
5156 | stxa %r28, [%g0] 0x73 | |
5157 | #endif | |
5158 | intvec_40_188: | |
5159 | .word 0x9f803bc5 ! 442: SIR sir 0x1bc5 | |
5160 | .word 0x85806bc5 ! 443: WRCCR_I wr %r1, 0x0bc5, %ccr | |
5161 | .word 0x19400001 ! 444: FBPUGE fbuge | |
5162 | .word 0x9f8036b4 ! 445: SIR sir 0x16b4 | |
5163 | .word 0x8581a090 ! 445: WRCCR_I wr %r6, 0x0090, %ccr | |
5164 | rd %tick, %r28 | |
5165 | #if (MAX_THREADS == 8) | |
5166 | sethi %hi(0x33800), %r27 | |
5167 | #else | |
5168 | sethi %hi(0x30000), %r27 | |
5169 | #endif | |
5170 | andn %r28, %r27, %r28 | |
5171 | ta T_CHANGE_HPRIV | |
5172 | stxa %r28, [%g0] 0x73 | |
5173 | .word 0xa5b0c4d1 ! 1: FCMPNE32 fcmpne32 %d34, %d48, %r18 | |
5174 | intvec_40_189: | |
5175 | .word 0xc19fdc00 ! 446: LDDFA_R ldda [%r31, %r0], %f0 | |
5176 | .word 0x20800001 ! 447: BN bn,a <label_0x1> | |
5177 | .word 0x39400001 ! 448: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5178 | .word 0xe1bfda00 ! 449: STDFA_R stda %f16, [%r0, %r31] | |
5179 | .word 0x97b084d1 ! 449: FCMPNE32 fcmpne32 %d2, %d48, %r11 | |
5180 | .word 0xe31fe020 ! 450: LDDF_I ldd [%r31, 0x0020], %f17 | |
5181 | .word 0x20800001 ! 451: BN bn,a <label_0x1> | |
5182 | .word 0xe19fdb60 ! 452: LDDFA_R ldda [%r31, %r0], %f16 | |
5183 | .word 0x9f802130 ! 453: SIR sir 0x0130 | |
5184 | .word 0xe1bfdb60 ! 453: STDFA_R stda %f16, [%r0, %r31] | |
5185 | rd %tick, %r28 | |
5186 | #if (MAX_THREADS == 8) | |
5187 | sethi %hi(0x33800), %r27 | |
5188 | #else | |
5189 | sethi %hi(0x30000), %r27 | |
5190 | #endif | |
5191 | andn %r28, %r27, %r28 | |
5192 | ta T_CHANGE_HPRIV | |
5193 | stxa %r28, [%g0] 0x73 | |
5194 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5195 | intvec_40_191: | |
5196 | #if (defined SPC || defined CMP1) | |
5197 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_192) + 24, 16, 16)) -> intp(1,0,25,,,,,1) | |
5198 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_192)&0xffffffff) + 8, 16, 16)) -> intp(4,0,12,,,,,1) | |
5199 | #else | |
5200 | set 0x3e303b83, %r28 | |
5201 | #if (MAX_THREADS == 8) | |
5202 | and %r28, 0x7ff, %r28 | |
5203 | #endif | |
5204 | stxa %r28, [%g0] 0x73 | |
5205 | #endif | |
5206 | intvec_40_192: | |
5207 | .word 0xa1a409c3 ! 454: FDIVd fdivd %f16, %f34, %f16 | |
5208 | .word 0xa3b7c4c1 ! 455: FCMPNE32 fcmpne32 %d62, %d32, %r17 | |
5209 | .word 0x91b404cd ! 456: FCMPNE32 fcmpne32 %d16, %d44, %r8 | |
5210 | .word 0xa1b2c4c3 ! 457: FCMPNE32 fcmpne32 %d42, %d34, %r16 | |
5211 | .word 0x9f8024af ! 457: SIR sir 0x04af | |
5212 | #if (defined SPC || defined CMP1) | |
5213 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_194) + 16, 16, 16)) -> intp(0,0,6,,,,,1) | |
5214 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_194)&0xffffffff) + 56, 16, 16)) -> intp(6,0,30,,,,,1) | |
5215 | #else | |
5216 | set 0x2d5017ee, %r28 | |
5217 | #if (MAX_THREADS == 8) | |
5218 | and %r28, 0x7ff, %r28 | |
5219 | #endif | |
5220 | stxa %r28, [%g0] 0x73 | |
5221 | #endif | |
5222 | intvec_40_194: | |
5223 | .word 0x9f802010 ! 458: SIR sir 0x0010 | |
5224 | .word 0x9bb7c4c1 ! 459: FCMPNE32 fcmpne32 %d62, %d32, %r13 | |
5225 | .word 0xa9b204c7 ! 460: FCMPNE32 fcmpne32 %d8, %d38, %r20 | |
5226 | .word 0xc3efe1c0 ! 461: PREFETCHA_I prefetcha [%r31, + 0x01c0] %asi, #one_read | |
5227 | .word 0x9f80385a ! 461: SIR sir 0x185a | |
5228 | #if (defined SPC || defined CMP1) | |
5229 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_196) + 32, 16, 16)) -> intp(0,0,15,,,,,1) | |
5230 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_40_196)&0xffffffff) + 32, 16, 16)) -> intp(7,0,6,,,,,1) | |
5231 | #else | |
5232 | set 0x1460828b, %r28 | |
5233 | #if (MAX_THREADS == 8) | |
5234 | and %r28, 0x7ff, %r28 | |
5235 | #endif | |
5236 | stxa %r28, [%g0] 0x73 | |
5237 | #endif | |
5238 | intvec_40_196: | |
5239 | .word 0xe83fe060 ! 462: STD_I std %r20, [%r31 + 0x0060] | |
5240 | .word 0xe9e7e003 ! 463: CASA_R casa [%r31] %asi, %r3, %r20 | |
5241 | .word 0x9f803840 ! 464: SIR sir 0x1840 | |
5242 | .word 0xe8dfc3c3 ! 465: LDXA_R ldxa [%r31, %r3] 0x1e, %r20 | |
5243 | .word 0xa9b7c4c1 ! 465: FCMPNE32 fcmpne32 %d62, %d32, %r20 | |
5244 | memptr_40_198: | |
5245 | set user_data_start, %r31 | |
5246 | rd %tick, %r28 | |
5247 | #if (MAX_THREADS == 8) | |
5248 | sethi %hi(0x33800), %r27 | |
5249 | #else | |
5250 | sethi %hi(0x30000), %r27 | |
5251 | #endif | |
5252 | andn %r28, %r27, %r28 | |
5253 | ta T_CHANGE_HPRIV | |
5254 | stxa %r28, [%g0] 0x73 | |
5255 | .word 0x9f8039c0 ! 1: SIR sir 0x19c0 | |
5256 | intvec_40_199: | |
5257 | .word 0x9f802020 ! 466: SIR sir 0x0020 | |
5258 | .word 0x85853e7c ! 467: WRCCR_I wr %r20, 0x1e7c, %ccr | |
5259 | .word 0x19400001 ! 468: FBPUGE fbuge | |
5260 | .word 0xdbe7c380 ! 469: CASA_I casa [%r31] 0x1c, %r0, %r13 | |
5261 | .word 0x39400001 ! 469: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5262 | .word 0xc1bfdf20 ! 470: STDFA_R stda %f0, [%r0, %r31] | |
5263 | .word 0xc36fe080 ! 471: PREFETCH_I prefetch [%r31 + 0x0080], #one_read | |
5264 | .word 0xc32fe050 ! 472: STXFSR_I st-sfr %f1, [0x0050, %r31] | |
5265 | .word 0xe1bfdb60 ! 473: STDFA_R stda %f16, [%r0, %r31] | |
5266 | .word 0x9f8021d0 ! 473: SIR sir 0x01d0 | |
5267 | rd %tick, %r28 | |
5268 | #if (MAX_THREADS == 8) | |
5269 | sethi %hi(0x33800), %r27 | |
5270 | #else | |
5271 | sethi %hi(0x30000), %r27 | |
5272 | #endif | |
5273 | andn %r28, %r27, %r28 | |
5274 | ta T_CHANGE_HPRIV | |
5275 | stxa %r28, [%g0] 0x73 | |
5276 | intvec_40_201: | |
5277 | memptr_40_202: | |
5278 | set 0x60140000, %r31 | |
5279 | .word 0x9bb404c2 ! 474: FCMPNE32 fcmpne32 %d16, %d2, %r13 | |
5280 | .word 0x8584a29c ! 475: WRCCR_I wr %r18, 0x029c, %ccr | |
5281 | .word 0xc1bfd920 ! 476: STDFA_R stda %f0, [%r0, %r31] | |
5282 | .word 0x97b204ca ! 477: FCMPNE32 fcmpne32 %d8, %d10, %r11 | |
5283 | .word 0x85852e3a ! 477: WRCCR_I wr %r20, 0x0e3a, %ccr | |
5284 | .word 0xc32fe0c0 ! 478: STXFSR_I st-sfr %f1, [0x00c0, %r31] | |
5285 | .word 0x00800001 ! 479: BN bn <label_0x1> | |
5286 | .word 0x00800001 ! 480: BN bn <label_0x1> | |
5287 | .word 0xd73fe190 ! 481: STDF_I std %f11, [0x0190, %r31] | |
5288 | .word 0xe19fdf20 ! 481: LDDFA_R ldda [%r31, %r0], %f16 | |
5289 | memptr_40_205: | |
5290 | set 0x60140000, %r31 | |
5291 | .word 0xd7e7c601 ! 482: CASA_I casa [%r31] 0x30, %r1, %r11 | |
5292 | .word 0x8581ee08 ! 483: WRCCR_I wr %r7, 0x0e08, %ccr | |
5293 | .word 0xd69fd060 ! 484: LDDA_R ldda [%r31, %r0] 0x83, %r11 | |
5294 | .word 0xd7e7c283 ! 485: CASA_I casa [%r31] 0x14, %r3, %r11 | |
5295 | .word 0xd6dfd921 ! 485: LDXA_R ldxa [%r31, %r1] 0xc9, %r11 | |
5296 | rd %tick, %r28 | |
5297 | #if (MAX_THREADS == 8) | |
5298 | sethi %hi(0x33800), %r27 | |
5299 | #else | |
5300 | sethi %hi(0x30000), %r27 | |
5301 | #endif | |
5302 | andn %r28, %r27, %r28 | |
5303 | ta T_CHANGE_HPRIV | |
5304 | stxa %r28, [%g0] 0x73 | |
5305 | intvec_40_207: | |
5306 | .word 0xa3b4c4cb ! 486: FCMPNE32 fcmpne32 %d50, %d42, %r17 | |
5307 | .word 0x00800001 ! 487: BN bn <label_0x1> | |
5308 | .word 0xc32fe010 ! 488: STXFSR_I st-sfr %f1, [0x0010, %r31] | |
5309 | .word 0x19400001 ! 489: FBPUGE fbuge | |
5310 | .word 0xe1bfc2c0 ! 489: STDFA_R stda %f16, [%r0, %r31] | |
5311 | .word 0x81dfc002 ! 1: FLUSH_R flush %r31, %r2, %r0 | |
5312 | memptr_40_209: | |
5313 | set 0x60340000, %r31 | |
5314 | .word 0xd297c241 ! 490: LDUHA_R lduha [%r31, %r1] 0x12, %r9 | |
5315 | .word 0x8584b323 ! 491: WRCCR_I wr %r18, 0x1323, %ccr | |
5316 | .word 0x00800001 ! 492: BN bn <label_0x1> | |
5317 | .word 0xd33fe130 ! 493: STDF_I std %f9, [0x0130, %r31] | |
5318 | .word 0xc1bfd960 ! 493: STDFA_R stda %f0, [%r0, %r31] | |
5319 | memptr_40_211: | |
5320 | set 0x60740000, %r31 | |
5321 | .word 0xd3e7dc43 ! 494: CASA_I casa [%r31] 0xe2, %r3, %r9 | |
5322 | .word 0x8580bdd0 ! 495: WRCCR_I wr %r2, 0x1dd0, %ccr | |
5323 | .word 0xe19fdb60 ! 496: LDDFA_R ldda [%r31, %r0], %f16 | |
5324 | .word 0xd23fe150 ! 497: STD_I std %r9, [%r31 + 0x0150] | |
5325 | .word 0x8582a989 ! 497: WRCCR_I wr %r10, 0x0989, %ccr | |
5326 | .word 0x00800001 ! 498: BN bn <label_0x1> | |
5327 | .word 0xe1bfdc00 ! 499: STDFA_R stda %f16, [%r0, %r31] | |
5328 | .word 0xd29fc722 ! 500: LDDA_R ldda [%r31, %r2] 0x39, %r9 | |
5329 | .word 0xe1bfde00 ! 501: STDFA_R stda %f16, [%r0, %r31] | |
5330 | .word 0xc19fc3e0 ! 501: LDDFA_R ldda [%r31, %r0], %f0 | |
5331 | nop | |
5332 | nop | |
5333 | ta T_CHANGE_PRIV | |
5334 | wrpr %g0, %g0, %gl | |
5335 | nop | |
5336 | nop | |
5337 | .text | |
5338 | setx join_lbl_0_0, %g1, %g2 | |
5339 | jmp %g2 | |
5340 | nop | |
5341 | fork_lbl_0_6: | |
5342 | wrhpr %g0, 0x13c1, %hpstate ! ta T_CHANGE_NONHPRIV | |
5343 | .word 0x91940013 ! 1: WRPR_PIL_R wrpr %r16, %r19, %pil | |
5344 | splash_htba_20_1: | |
5345 | nop | |
5346 | ta T_CHANGE_HPRIV | |
5347 | setx 0x00000000002a0000, %r11, %r12 | |
5348 | .word 0x8b98000c ! 5: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
5349 | splash_cmpr_20_4: | |
5350 | mov 0, %r18 | |
5351 | sllx %r18, 63, %r18 | |
5352 | rd %tick, %r17 | |
5353 | add %r17, 0x100, %r17 | |
5354 | or %r17, %r18, %r17 | |
5355 | ta T_CHANGE_HPRIV | |
5356 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
5357 | ta T_CHANGE_PRIV | |
5358 | .word 0xb3800011 ! 9: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
5359 | .word 0xd23fe133 ! 13: STD_I std %r9, [%r31 + 0x0133] | |
5360 | jmptr_20_7: | |
5361 | nop | |
5362 | nop | |
5363 | best_set_reg(0xe0a00000, %r20, %r27) | |
5364 | .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27 | |
5365 | #if (defined SPC || defined CMP1) | |
5366 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_10) + 0, 16, 16)) -> intp(3,0,21,,,,,1) | |
5367 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_10)&0xffffffff) + 56, 16, 16)) -> intp(0,0,27,,,,,1) | |
5368 | #else | |
5369 | set 0x66e0988c, %r28 | |
5370 | #if (MAX_THREADS == 8) | |
5371 | and %r28, 0x7ff, %r28 | |
5372 | #endif | |
5373 | stxa %r28, [%g0] 0x73 | |
5374 | #endif | |
5375 | intvec_20_10: | |
5376 | .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5377 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> | |
5378 | .word 0x8d903f51 ! 25: WRPR_PSTATE_I wrpr %r0, 0x1f51, %pstate | |
5379 | nop | |
5380 | nop | |
5381 | ta T_CHANGE_HPRIV | |
5382 | mov 0x20, %r10 | |
5383 | set sync_thr_counter6, %r23 | |
5384 | #ifndef SPC | |
5385 | ldxa [%g0]0x63, %o1 | |
5386 | and %o1, 0x38, %o1 | |
5387 | add %o1, %r23, %r23 | |
5388 | #endif | |
5389 | cas [%r23],%g0,%r10 !lock | |
5390 | brnz %r10, sma_20_16 | |
5391 | rd %asi, %r12 | |
5392 | wr %g0, 0x40, %asi | |
5393 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
5394 | set 0x001a1fff, %l7 | |
5395 | stxa %l7, [%g0 + 0x80] %asi | |
5396 | wr %r12, %g0, %asi | |
5397 | st %g0, [%r23] | |
5398 | sma_20_16: | |
5399 | wrhpr %g0, 0xc09, %hpstate ! ta T_CHANGE_NONHPRIV | |
5400 | .word 0xe7e7c3c0 ! 29: CASA_I casa [%r31] 0x1e, %r0, %r19 | |
5401 | demap_20_17: | |
5402 | nop | |
5403 | mov 0x80, %g3 | |
5404 | ta T_CHANGE_HPRIV | |
5405 | stxa %r8, [%r0] ASI_LSU_CONTROL | |
5406 | stxa %g3, [%g3] 0x57 | |
5407 | stxa %g3, [%g3] 0x57 | |
5408 | stxa %g3, [%g3] 0x57 | |
5409 | stxa %g3, [%g3] 0x5f | |
5410 | stxa %g3, [%g3] 0x57 | |
5411 | stxa %g3, [%g3] 0x57 | |
5412 | stxa %g3, [%g3] 0x57 | |
5413 | stxa %g3, [%g3] 0x57 | |
5414 | wrhpr %g0, 0x1f13, %hpstate ! ta T_CHANGE_NONHPRIV | |
5415 | .word 0xe61fe08d ! 33: LDD_I ldd [%r31 + 0x008d], %r19 | |
5416 | #if (defined SPC || defined CMP1) | |
5417 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_18) + 16, 16, 16)) -> intp(0,0,26,,,,,1) | |
5418 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_18)&0xffffffff) + 32, 16, 16)) -> intp(4,0,21,,,,,1) | |
5419 | #else | |
5420 | set 0x8c90a951, %r28 | |
5421 | #if (MAX_THREADS == 8) | |
5422 | and %r28, 0x7ff, %r28 | |
5423 | #endif | |
5424 | stxa %r28, [%g0] 0x73 | |
5425 | #endif | |
5426 | intvec_20_18: | |
5427 | .word 0x39400001 ! 37: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5428 | splash_hpstate_20_21: | |
5429 | ta T_CHANGE_NONHPRIV | |
5430 | .word 0x05400001 ! 1: FBPLG fblg | |
5431 | .word 0x81983fdf ! 41: WRHPR_HPSTATE_I wrhpr %r0, 0x1fdf, %hpstate | |
5432 | demap_20_23: | |
5433 | nop | |
5434 | mov 0x80, %g3 | |
5435 | ta T_CHANGE_HPRIV | |
5436 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> | |
5437 | stxa %g3, [%g3] 0x57 | |
5438 | stxa %g3, [%g3] 0x5f | |
5439 | stxa %g3, [%g3] 0x57 | |
5440 | stxa %g3, [%g3] 0x5f | |
5441 | stxa %g3, [%g3] 0x5f | |
5442 | stxa %g3, [%g3] 0x57 | |
5443 | wrhpr %g0, 0x1688, %hpstate ! ta T_CHANGE_NONHPRIV | |
5444 | .word 0xe81fe081 ! 45: LDD_I ldd [%r31 + 0x0081], %r20 | |
5445 | fpinit_20_24: | |
5446 | nop | |
5447 | setx fp_data_quads, %r19, %r20 | |
5448 | ldd [%r20], %f0 | |
5449 | ldd [%r20+8], %f4 | |
5450 | ld [%r20+16], %fsr | |
5451 | ld [%r20+24], %r19 | |
5452 | wr %r19, %g0, %gsr | |
5453 | .word 0x91a009c4 ! 49: FDIVd fdivd %f0, %f4, %f8 | |
5454 | brcommon1_20_25: | |
5455 | nop | |
5456 | nop | |
5457 | setx common_target, %r12, %r27 | |
5458 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
5459 | ba,a .+12 | |
5460 | .word 0xa9b7c7c1 ! 1: PDIST pdistn %d62, %d32, %d20 | |
5461 | ba,a .+8 | |
5462 | jmpl %r27-4, %r27 | |
5463 | .word 0x95703e27 ! 53: POPC_I popc 0x1e27, %r10 | |
5464 | rd %tick, %r28 | |
5465 | #if (MAX_THREADS == 8) | |
5466 | sethi %hi(0x33800), %r27 | |
5467 | #else | |
5468 | sethi %hi(0x30000), %r27 | |
5469 | #endif | |
5470 | andn %r28, %r27, %r28 | |
5471 | ta T_CHANGE_HPRIV | |
5472 | stxa %r28, [%g0] 0x73 | |
5473 | .word 0x9f802e71 ! 1: SIR sir 0x0e71 | |
5474 | intvec_20_27: | |
5475 | .word 0x97a489d3 ! 57: FDIVd fdivd %f18, %f50, %f42 | |
5476 | .word 0xe927c000 ! 61: STF_R st %f20, [%r0, %r31] | |
5477 | .word 0x9194c010 ! 65: WRPR_PIL_R wrpr %r19, %r16, %pil | |
5478 | splash_cmpr_20_35: | |
5479 | mov 0, %r18 | |
5480 | sllx %r18, 63, %r18 | |
5481 | rd %tick, %r17 | |
5482 | add %r17, 0x70, %r17 | |
5483 | or %r17, %r18, %r17 | |
5484 | .word 0xaf800011 ! 69: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
5485 | jmptr_20_37: | |
5486 | nop | |
5487 | nop | |
5488 | best_set_reg(0xe1200000, %r20, %r27) | |
5489 | .word 0xb7c6c000 ! 73: JMPL_R jmpl %r27 + %r0, %r27 | |
5490 | jmptr_20_38: | |
5491 | nop | |
5492 | nop | |
5493 | best_set_reg(0xe1a00000, %r20, %r27) | |
5494 | .word 0xb7c6c000 ! 77: JMPL_R jmpl %r27 + %r0, %r27 | |
5495 | nop | |
5496 | nop | |
5497 | ta T_CHANGE_HPRIV | |
5498 | mov 0x20+1, %r10 | |
5499 | set sync_thr_counter5, %r23 | |
5500 | #ifndef SPC | |
5501 | ldxa [%g0]0x63, %o1 | |
5502 | and %o1, 0x38, %o1 | |
5503 | add %o1, %r23, %r23 | |
5504 | sllx %o1, 5, %o3 !(CID*256) | |
5505 | #endif | |
5506 | cas [%r23],%g0,%r10 !lock | |
5507 | brnz %r10, cwq_20_39 | |
5508 | rd %asi, %r12 | |
5509 | wr %g0, 0x40, %asi | |
5510 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5511 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5512 | cmp %l1, 1 | |
5513 | bne cwq_20_39 | |
5514 | set CWQ_BASE, %l6 | |
5515 | #ifndef SPC | |
5516 | add %l6, %o3, %l6 | |
5517 | #endif | |
5518 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5519 | best_set_reg(0x20610050, %l1, %l2) !# Control Word | |
5520 | sllx %l2, 32, %l2 | |
5521 | stx %l2, [%l6 + 0x0] | |
5522 | membar #Sync | |
5523 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5524 | sub %l2, 0x40, %l2 | |
5525 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5526 | wr %r12, %g0, %asi | |
5527 | st %g0, [%r23] | |
5528 | cwq_20_39: | |
5529 | wrhpr %g0, 0x74a, %hpstate ! ta T_CHANGE_NONHPRIV | |
5530 | .word 0x93414000 ! 81: RDPC rd %pc, %r9 | |
5531 | nop | |
5532 | nop | |
5533 | ta T_CHANGE_HPRIV | |
5534 | mov 0x20, %r10 | |
5535 | set sync_thr_counter6, %r23 | |
5536 | #ifndef SPC | |
5537 | ldxa [%g0]0x63, %o1 | |
5538 | and %o1, 0x38, %o1 | |
5539 | add %o1, %r23, %r23 | |
5540 | #endif | |
5541 | cas [%r23],%g0,%r10 !lock | |
5542 | brnz %r10, sma_20_41 | |
5543 | rd %asi, %r12 | |
5544 | wr %g0, 0x40, %asi | |
5545 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
5546 | set 0x000e1fff, %l7 | |
5547 | stxa %l7, [%g0 + 0x80] %asi | |
5548 | wr %r12, %g0, %asi | |
5549 | st %g0, [%r23] | |
5550 | sma_20_41: | |
5551 | wrhpr %g0, 0x1801, %hpstate ! ta T_CHANGE_NONHPRIV | |
5552 | .word 0xd5e7d922 ! 85: CASA_I casa [%r31] 0xc9, %r2, %r10 | |
5553 | splash_cmpr_20_42: | |
5554 | mov 1, %r18 | |
5555 | sllx %r18, 63, %r18 | |
5556 | rd %tick, %r17 | |
5557 | add %r17, 0x50, %r17 | |
5558 | or %r17, %r18, %r17 | |
5559 | .word 0xaf800011 ! 89: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
5560 | .word 0x07400001 ! 1: FBPUL fbul | |
5561 | .word 0x8d903697 ! 93: WRPR_PSTATE_I wrpr %r0, 0x1697, %pstate | |
5562 | .word 0xe00fe148 ! 97: LDUB_I ldub [%r31 + 0x0148], %r16 | |
5563 | .word 0x89800011 ! 101: WRTICK_R wr %r0, %r17, %tick | |
5564 | fbg skip_20_49 | |
5565 | stxa %r8, [%r0] ASI_LSU_CONTROL | |
5566 | fbuge,a,pn %fcc0, skip_20_49 | |
5567 | stxa %r17, [%r0] ASI_LSU_CONTROL | |
5568 | .align 128 | |
5569 | skip_20_49: | |
5570 | .word 0xe5e7c2e0 ! 105: CASA_I casa [%r31] 0x17, %r0, %r18 | |
5571 | br_badelay3_20_50: | |
5572 | .word 0x9ba449d2 ! 1: FDIVd fdivd %f48, %f18, %f44 | |
5573 | .word 0xcd6bc0b6 ! Random illegal ? | |
5574 | .word 0x93a00550 ! 1: FSQRTd fsqrt | |
5575 | .word 0x95a10832 ! 109: FADDs fadds %f4, %f18, %f10 | |
5576 | memptr_20_52: | |
5577 | set 0x60140000, %r31 | |
5578 | .word 0x8584edc8 ! 113: WRCCR_I wr %r19, 0x0dc8, %ccr | |
5579 | demap_20_53: | |
5580 | nop | |
5581 | mov 0x80, %g3 | |
5582 | ta T_CHANGE_HPRIV | |
5583 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5584 | stxa %g3, [%g3] 0x5f | |
5585 | stxa %g3, [%g3] 0x5f | |
5586 | stxa %g3, [%g3] 0x5f | |
5587 | stxa %g3, [%g3] 0x57 | |
5588 | stxa %g3, [%g3] 0x57 | |
5589 | stxa %g3, [%g3] 0x57 | |
5590 | wrhpr %g0, 0x1589, %hpstate ! ta T_CHANGE_NONHPRIV | |
5591 | .word 0xd81fe1a0 ! 117: LDD_I ldd [%r31 + 0x01a0], %r12 | |
5592 | #if (defined SPC || defined CMP1) | |
5593 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_56) + 16, 16, 16)) -> intp(1,0,23,,,,,1) | |
5594 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_56)&0xffffffff) + 48, 16, 16)) -> intp(2,0,11,,,,,1) | |
5595 | #else | |
5596 | set 0x9c20862a, %r28 | |
5597 | #if (MAX_THREADS == 8) | |
5598 | and %r28, 0x7ff, %r28 | |
5599 | #endif | |
5600 | stxa %r28, [%g0] 0x73 | |
5601 | #endif | |
5602 | .word 0x97b344d2 ! 1: FCMPNE32 fcmpne32 %d44, %d18, %r11 | |
5603 | intvec_20_56: | |
5604 | .word 0x39400001 ! 121: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5605 | nop | |
5606 | nop | |
5607 | ta T_CHANGE_HPRIV ! macro | |
5608 | donret_20_58: | |
5609 | rd %pc, %r12 | |
5610 | mov HIGHVA_HIGHNUM, %r10 | |
5611 | sllx %r10, 32, %r10 | |
5612 | or %r12, %r10, %r12 | |
5613 | add %r12, (donretarg_20_58-donret_20_58), %r12 | |
5614 | add %r12, 0x8, %r11 ! nonseq tnpc | |
5615 | andn %r12, %r10, %r12 ! low VA tpc | |
5616 | wrpr %g0, 0x2, %tl | |
5617 | wrpr %g0, %r12, %tpc | |
5618 | wrpr %g0, %r11, %tnpc | |
5619 | set (0x00b87900 | (0x8a << 24)), %r13 | |
5620 | and %r12, 0xfff, %r14 | |
5621 | sllx %r14, 32, %r14 | |
5622 | or %r13, %r14, %r20 | |
5623 | wrpr %r20, %g0, %tstate | |
5624 | wrhpr %g0, 0xd86, %htstate | |
5625 | wrhpr %g0, 0x16d3, %hpstate ! rand=1 (20) | |
5626 | ldx [%r12+%r0], %g1 | |
5627 | retry | |
5628 | .align 128 | |
5629 | donretarg_20_58: | |
5630 | .word 0x93a049cb ! 125: FDIVd fdivd %f32, %f42, %f40 | |
5631 | .word 0x9194400b ! 129: WRPR_PIL_R wrpr %r17, %r11, %pil | |
5632 | bge,a skip_20_61 | |
5633 | brlz,pn %r19, skip_20_61 | |
5634 | .align 2048 | |
5635 | skip_20_61: | |
5636 | .word 0x87ac8a52 ! 133: FCMPd fcmpd %fcc<n>, %f18, %f18 | |
5637 | .word 0xda07c000 ! 137: LDUW_R lduw [%r31 + %r0], %r13 | |
5638 | splash_tba_20_64: | |
5639 | nop | |
5640 | ta T_CHANGE_PRIV | |
5641 | set 0x120000, %r12 | |
5642 | .word 0x8b90000c ! 141: WRPR_TBA_R wrpr %r0, %r12, %tba | |
5643 | .word 0xd81fc002 ! 145: LDD_R ldd [%r31 + %r2], %r12 | |
5644 | .word 0xa9b200e7 ! 149: EDGE16LN edge16ln %r8, %r7, %r20 | |
5645 | .word 0xa1902006 ! 153: WRPR_GL_I wrpr %r0, 0x0006, %- | |
5646 | brcommon3_20_70: | |
5647 | nop | |
5648 | nop | |
5649 | setx common_target, %r12, %r27 | |
5650 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
5651 | ba,a .+12 | |
5652 | .word 0xe86fe060 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0060] | |
5653 | ba,a .+8 | |
5654 | jmpl %r27+0, %r27 | |
5655 | .word 0x81983ed9 ! 157: WRHPR_HPSTATE_I wrhpr %r0, 0x1ed9, %hpstate | |
5656 | brcommon1_20_71: | |
5657 | nop | |
5658 | nop | |
5659 | setx common_target, %r12, %r27 | |
5660 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
5661 | ba,a .+12 | |
5662 | .word 0xa9b7c7c2 ! 1: PDIST pdistn %d62, %d2, %d20 | |
5663 | ba,a .+8 | |
5664 | jmpl %r27-4, %r27 | |
5665 | .word 0xa57035fc ! 161: POPC_I popc 0x15fc, %r18 | |
5666 | #if (defined SPC || defined CMP1) | |
5667 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_74) + 16, 16, 16)) -> intp(5,0,4,,,,,1) | |
5668 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_74)&0xffffffff) + 8, 16, 16)) -> intp(1,0,27,,,,,1) | |
5669 | #else | |
5670 | set 0xeb30b652, %r28 | |
5671 | #if (MAX_THREADS == 8) | |
5672 | and %r28, 0x7ff, %r28 | |
5673 | #endif | |
5674 | stxa %r28, [%g0] 0x73 | |
5675 | #endif | |
5676 | .word 0x9f803d4b ! 1: SIR sir 0x1d4b | |
5677 | intvec_20_74: | |
5678 | .word 0x9f8022b3 ! 165: SIR sir 0x02b3 | |
5679 | fbul,a,pn %fcc0, skip_20_76 | |
5680 | stxa %r8, [%r0] ASI_LSU_CONTROL | |
5681 | .word 0x9f803dec ! 1: SIR sir 0x1dec | |
5682 | stxa %r13, [%r0] ASI_LSU_CONTROL | |
5683 | .align 512 | |
5684 | skip_20_76: | |
5685 | .word 0xc36fe18c ! 169: PREFETCH_I prefetch [%r31 + 0x018c], #one_read | |
5686 | .word 0xd22fe18b ! 173: STB_I stb %r9, [%r31 + 0x018b] | |
5687 | .word 0x91950014 ! 177: WRPR_PIL_R wrpr %r20, %r20, %pil | |
5688 | rd %tick, %r28 | |
5689 | #if (MAX_THREADS == 8) | |
5690 | sethi %hi(0x33800), %r27 | |
5691 | #else | |
5692 | sethi %hi(0x30000), %r27 | |
5693 | #endif | |
5694 | andn %r28, %r27, %r28 | |
5695 | ta T_CHANGE_HPRIV | |
5696 | stxa %r28, [%g0] 0x73 | |
5697 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5698 | intvec_20_81: | |
5699 | .word 0x9f802d48 ! 181: SIR sir 0x0d48 | |
5700 | jmptr_20_83: | |
5701 | nop | |
5702 | nop | |
5703 | best_set_reg(0xe0200000, %r20, %r27) | |
5704 | .word 0xb7c6c000 ! 185: JMPL_R jmpl %r27 + %r0, %r27 | |
5705 | .word 0xe19fd920 ! 189: LDDFA_R ldda [%r31, %r0], %f16 | |
5706 | .word 0x81dc0012 ! 193: FLUSH_R flush %r16, %r18, %r0 | |
5707 | jmptr_20_87: | |
5708 | nop | |
5709 | nop | |
5710 | best_set_reg(0xe0a00000, %r20, %r27) | |
5711 | .word 0xb7c6c000 ! 197: JMPL_R jmpl %r27 + %r0, %r27 | |
5712 | splash_lsu_20_89: | |
5713 | nop | |
5714 | nop | |
5715 | ta T_CHANGE_HPRIV | |
5716 | set 0x83eb3709, %r2 | |
5717 | mov 0x7, %r1 | |
5718 | sllx %r1, 32, %r1 | |
5719 | or %r1, %r2, %r2 | |
5720 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5721 | .word 0x3d400001 ! 201: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5722 | .word 0x8d902fd5 ! 205: WRPR_PSTATE_I wrpr %r0, 0x0fd5, %pstate | |
5723 | nop | |
5724 | nop | |
5725 | ta T_CHANGE_HPRIV ! macro | |
5726 | donret_20_92: | |
5727 | rd %pc, %r12 | |
5728 | mov HIGHVA_HIGHNUM, %r10 | |
5729 | sllx %r10, 32, %r10 | |
5730 | or %r12, %r10, %r12 | |
5731 | add %r12, (donretarg_20_92-donret_20_92), %r12 | |
5732 | add %r12, 0x8, %r11 ! nonseq tnpc | |
5733 | andn %r12, %r10, %r12 ! low VA tpc | |
5734 | wrpr %g0, 0x1, %tl | |
5735 | wrpr %g0, %r12, %tpc | |
5736 | wrpr %g0, %r11, %tnpc | |
5737 | set (0x00b8b800 | (0x83 << 24)), %r13 | |
5738 | and %r12, 0xfff, %r14 | |
5739 | sllx %r14, 32, %r14 | |
5740 | or %r13, %r14, %r20 | |
5741 | wrpr %r20, %g0, %tstate | |
5742 | wrhpr %g0, 0x517, %htstate | |
5743 | wrpr %g0, 0x17a1, %pstate ! rand=0 (20) | |
5744 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> | |
5745 | ldx [%r12+%r0], %g1 | |
5746 | retry | |
5747 | donretarg_20_92: | |
5748 | .word 0xa7a509d2 ! 209: FDIVd fdivd %f20, %f18, %f50 | |
5749 | #if (defined SPC || defined CMP1) | |
5750 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_94) + 16, 16, 16)) -> intp(2,0,15,,,,,1) | |
5751 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_94)&0xffffffff) + 56, 16, 16)) -> intp(5,0,29,,,,,1) | |
5752 | #else | |
5753 | set 0x3c70c489, %r28 | |
5754 | #if (MAX_THREADS == 8) | |
5755 | and %r28, 0x7ff, %r28 | |
5756 | #endif | |
5757 | stxa %r28, [%g0] 0x73 | |
5758 | #endif | |
5759 | intvec_20_94: | |
5760 | .word 0x39400001 ! 213: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5761 | #if (defined SPC || defined CMP) | |
5762 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_20_96)+40, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1) | |
5763 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_20_96)&0xffffffff) + 56, 16, 16)) -> intp(mask2tid(0x20),1,3,,,,,1) | |
5764 | xir_20_96: | |
5765 | #else | |
5766 | #if (defined FC) | |
5767 | !! Generate XIR via RESET_GEN register | |
5768 | ta T_CHANGE_HPRIV | |
5769 | rdpr %pstate, %r18 | |
5770 | andn %r18, 0x208, %r18 ! Reset pstate.am,cle | |
5771 | wrpr %r18, %pstate | |
5772 | #ifndef XIR_RND_CORES | |
5773 | ldxa [%g0] 0x63, %o1 | |
5774 | mov 1, %r18 | |
5775 | sllx %r18, %o1, %r18 | |
5776 | #endif | |
5777 | mov 0x30, %r19 | |
5778 | setx 0x8900000808, %r16, %r17 | |
5779 | mov 0x2, %r16 | |
5780 | xir_20_96: | |
5781 | stxa %r18, [%r19] 0x41 | |
5782 | stx %r16, [%r17] | |
5783 | #endif | |
5784 | #endif | |
5785 | .word 0xa982bcc7 ! 217: WR_SET_SOFTINT_I wr %r10, 0x1cc7, %set_softint | |
5786 | .word 0x89800011 ! 221: WRTICK_R wr %r0, %r17, %tick | |
5787 | .word 0xd8ffe0c0 ! 225: SWAPA_I swapa %r12, [%r31 + 0x00c0] %asi | |
5788 | splash_hpstate_20_102: | |
5789 | .word 0x8198234d ! 229: WRHPR_HPSTATE_I wrhpr %r0, 0x034d, %hpstate | |
5790 | intveclr_20_105: | |
5791 | nop | |
5792 | nop | |
5793 | ta T_CHANGE_HPRIV | |
5794 | setx 0xc766ab5b2dc2aa27, %r1, %r28 | |
5795 | stxa %r28, [%g0] 0x72 | |
5796 | wrhpr %g0, 0x5c2, %hpstate ! ta T_CHANGE_NONHPRIV | |
5797 | .word 0x25400001 ! 233: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5798 | splash_lsu_20_108: | |
5799 | nop | |
5800 | nop | |
5801 | ta T_CHANGE_HPRIV | |
5802 | set 0xe64a6705, %r2 | |
5803 | mov 0x5, %r1 | |
5804 | sllx %r1, 32, %r1 | |
5805 | or %r1, %r2, %r2 | |
5806 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5807 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5808 | nop | |
5809 | nop | |
5810 | ta T_CHANGE_HPRIV ! macro | |
5811 | donret_20_110: | |
5812 | rd %pc, %r12 | |
5813 | mov HIGHVA_HIGHNUM, %r10 | |
5814 | sllx %r10, 32, %r10 | |
5815 | or %r12, %r10, %r12 | |
5816 | add %r12, (donretarg_20_110-donret_20_110+4), %r12 | |
5817 | add %r12, 0x4, %r11 ! seq tnpc | |
5818 | wrpr %g0, 0x2, %tl | |
5819 | wrpr %g0, %r12, %tpc | |
5820 | wrpr %g0, %r11, %tnpc | |
5821 | set (0x005b3b00 | (0x89 << 24)), %r13 | |
5822 | and %r12, 0xfff, %r14 | |
5823 | sllx %r14, 32, %r14 | |
5824 | or %r13, %r14, %r20 | |
5825 | wrpr %r20, %g0, %tstate | |
5826 | wrhpr %g0, 0xc5a, %htstate | |
5827 | wrpr %g0, 0x538, %pstate ! rand=0 (20) | |
5828 | ldx [%r12+%r0], %g1 | |
5829 | retry | |
5830 | .align 512 | |
5831 | donretarg_20_110: | |
5832 | .word 0x93a349c5 ! 241: FDIVd fdivd %f44, %f36, %f40 | |
5833 | .word 0xe83fc000 ! 245: STD_R std %r20, [%r31 + %r0] | |
5834 | .word 0xe8cfc380 ! 249: LDSBA_R ldsba [%r31, %r0] 0x1c, %r20 | |
5835 | #if (defined SPC || defined CMP1) | |
5836 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_112) + 32, 16, 16)) -> intp(1,0,22,,,,,1) | |
5837 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_112)&0xffffffff) + 16, 16, 16)) -> intp(0,0,9,,,,,1) | |
5838 | #else | |
5839 | set 0xd1f0e119, %r28 | |
5840 | #if (MAX_THREADS == 8) | |
5841 | and %r28, 0x7ff, %r28 | |
5842 | #endif | |
5843 | stxa %r28, [%g0] 0x73 | |
5844 | #endif | |
5845 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5846 | intvec_20_112: | |
5847 | .word 0x91a289ca ! 253: FDIVd fdivd %f10, %f10, %f8 | |
5848 | .word 0xe037e034 ! 257: STH_I sth %r16, [%r31 + 0x0034] | |
5849 | .word 0xc30fc000 ! 261: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
5850 | jmptr_20_116: | |
5851 | nop | |
5852 | nop | |
5853 | best_set_reg(0xe1200000, %r20, %r27) | |
5854 | .word 0xb7c6c000 ! 265: JMPL_R jmpl %r27 + %r0, %r27 | |
5855 | splash_hpstate_20_117: | |
5856 | ta T_CHANGE_NONHPRIV | |
5857 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5858 | .word 0x81983c9d ! 269: WRHPR_HPSTATE_I wrhpr %r0, 0x1c9d, %hpstate | |
5859 | set 0x2b21, %l3 | |
5860 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
5861 | .word 0xa1b2c7c5 ! 273: PDIST pdistn %d42, %d36, %d16 | |
5862 | splash_lsu_20_120: | |
5863 | nop | |
5864 | nop | |
5865 | ta T_CHANGE_HPRIV | |
5866 | set 0x8cc68504, %r2 | |
5867 | mov 0x6, %r1 | |
5868 | sllx %r1, 32, %r1 | |
5869 | or %r1, %r2, %r2 | |
5870 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5871 | .word 0x3d400001 ! 277: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5872 | splash_hpstate_20_122: | |
5873 | .word 0x81983e4d ! 281: WRHPR_HPSTATE_I wrhpr %r0, 0x1e4d, %hpstate | |
5874 | splash_lsu_20_124: | |
5875 | nop | |
5876 | nop | |
5877 | ta T_CHANGE_HPRIV | |
5878 | set 0xc5c8e24a, %r2 | |
5879 | mov 0x6, %r1 | |
5880 | sllx %r1, 32, %r1 | |
5881 | or %r1, %r2, %r2 | |
5882 | .word 0x13400001 ! 1: FBPE fbe | |
5883 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5884 | .word 0x1d400001 ! 285: FBPULE fbule | |
5885 | .word 0x95a00162 ! 289: FABSq dis not found | |
5886 | ||
5887 | .word 0xe3e7e002 ! 293: CASA_R casa [%r31] %asi, %r2, %r17 | |
5888 | .word 0xd047c000 ! 297: LDSW_R ldsw [%r31 + %r0], %r8 | |
5889 | brcommon3_20_129: | |
5890 | nop | |
5891 | nop | |
5892 | setx common_target, %r12, %r27 | |
5893 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
5894 | ba,a .+12 | |
5895 | .word 0xd06fe1f0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01f0] | |
5896 | ba,a .+8 | |
5897 | jmpl %r27+0, %r27 | |
5898 | .word 0x819826d5 ! 301: WRHPR_HPSTATE_I wrhpr %r0, 0x06d5, %hpstate | |
5899 | .word 0xe727e115 ! 305: STF_I st %f19, [0x0115, %r31] | |
5900 | .word 0x93b2c0f4 ! 309: EDGE16LN edge16ln %r11, %r20, %r9 | |
5901 | .word 0x9b53c000 ! 313: RDPR_FQ <illegal instruction> | |
5902 | .word 0xc1bfdc00 ! 317: STDFA_R stda %f0, [%r0, %r31] | |
5903 | .word 0xe21fc003 ! 321: LDD_R ldd [%r31 + %r3], %r17 | |
5904 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick | |
5905 | .word 0xa78236a5 ! 329: WR_GRAPHICS_STATUS_REG_I wr %r8, 0x16a5, %- | |
5906 | .word 0xe127e134 ! 333: STF_I st %f16, [0x0134, %r31] | |
5907 | jmptr_20_140: | |
5908 | nop | |
5909 | nop | |
5910 | best_set_reg(0xe1a00000, %r20, %r27) | |
5911 | .word 0xb7c6c000 ! 337: JMPL_R jmpl %r27 + %r0, %r27 | |
5912 | .word 0xd8c7c280 ! 341: LDSWA_R ldswa [%r31, %r0] 0x14, %r12 | |
5913 | .word 0x8d903ee6 ! 345: WRPR_PSTATE_I wrpr %r0, 0x1ee6, %pstate | |
5914 | .word 0x9191c011 ! 349: WRPR_PIL_R wrpr %r7, %r17, %pil | |
5915 | .word 0x97b280f2 ! 353: EDGE16LN edge16ln %r10, %r18, %r11 | |
5916 | jmptr_20_150: | |
5917 | nop | |
5918 | nop | |
5919 | best_set_reg(0xe0200000, %r20, %r27) | |
5920 | .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 | |
5921 | .word 0xe48008a0 ! 361: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 | |
5922 | .word 0xd337e176 ! 365: STQF_I - %f9, [0x0176, %r31] | |
5923 | jmptr_20_155: | |
5924 | nop | |
5925 | nop | |
5926 | best_set_reg(0xe0a00000, %r20, %r27) | |
5927 | .word 0xb7c6c000 ! 369: JMPL_R jmpl %r27 + %r0, %r27 | |
5928 | jmptr_20_159: | |
5929 | nop | |
5930 | nop | |
5931 | best_set_reg(0xe1200000, %r20, %r27) | |
5932 | .word 0xb7c6c000 ! 373: JMPL_R jmpl %r27 + %r0, %r27 | |
5933 | .word 0xe44fc000 ! 377: LDSB_R ldsb [%r31 + %r0], %r18 | |
5934 | .word 0xe3e7e001 ! 381: CASA_R casa [%r31] %asi, %r1, %r17 | |
5935 | rd %tick, %r28 | |
5936 | #if (MAX_THREADS == 8) | |
5937 | sethi %hi(0x33800), %r27 | |
5938 | #else | |
5939 | sethi %hi(0x30000), %r27 | |
5940 | #endif | |
5941 | andn %r28, %r27, %r28 | |
5942 | ta T_CHANGE_HPRIV | |
5943 | stxa %r28, [%g0] 0x73 | |
5944 | .word 0x9f8028c5 ! 1: SIR sir 0x08c5 | |
5945 | intvec_20_163: | |
5946 | .word 0xa1b504c8 ! 385: FCMPNE32 fcmpne32 %d20, %d8, %r16 | |
5947 | brcommon3_20_164: | |
5948 | nop | |
5949 | nop | |
5950 | setx common_target, %r12, %r27 | |
5951 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
5952 | ba,a .+12 | |
5953 | .word 0xe46fe1d0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x01d0] | |
5954 | ba,a .+8 | |
5955 | jmpl %r27+0, %r27 | |
5956 | .word 0x00800001 ! 389: BN bn <label_0x1> | |
5957 | .word 0xe4800b00 ! 393: LDUWA_R lduwa [%r0, %r0] 0x58, %r18 | |
5958 | .word 0x8d90328c ! 397: WRPR_PSTATE_I wrpr %r0, 0x128c, %pstate | |
5959 | .word 0xe4c7c540 ! 401: LDSWA_R ldswa [%r31, %r0] 0x2a, %r18 | |
5960 | splash_tba_20_171: | |
5961 | nop | |
5962 | ta T_CHANGE_PRIV | |
5963 | setx 0x00000000003a0000, %r11, %r12 | |
5964 | .word 0x8b90000c ! 405: WRPR_TBA_R wrpr %r0, %r12, %tba | |
5965 | brcommon1_20_173: | |
5966 | nop | |
5967 | nop | |
5968 | setx common_target, %r12, %r27 | |
5969 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
5970 | ba,a .+12 | |
5971 | .word 0xc32fe180 ! 1: STXFSR_I st-sfr %f1, [0x0180, %r31] | |
5972 | ba,a .+8 | |
5973 | jmpl %r27-4, %r27 | |
5974 | .word 0xa5b48490 ! 409: FCMPLE32 fcmple32 %d18, %d16, %r18 | |
5975 | splash_lsu_20_175: | |
5976 | nop | |
5977 | nop | |
5978 | ta T_CHANGE_HPRIV | |
5979 | set 0xf093526b, %r2 | |
5980 | mov 0x6, %r1 | |
5981 | sllx %r1, 32, %r1 | |
5982 | or %r1, %r2, %r2 | |
5983 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> | |
5984 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5985 | .word 0x1d400001 ! 413: FBPULE fbule | |
5986 | .word 0xc1bfe0e0 ! 417: STDFA_I stda %f0, [0x00e0, %r31] | |
5987 | .word 0xd897d100 ! 421: LDUHA_R lduha [%r31, %r0] 0x88, %r12 | |
5988 | .word 0xdb3fe0d0 ! 425: STDF_I std %f13, [0x00d0, %r31] | |
5989 | brcommon3_20_181: | |
5990 | nop | |
5991 | setx common_target, %r12, %r27 | |
5992 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
5993 | ba,a .+12 | |
5994 | .word 0xe537c000 ! 1: STQF_R - %f18, [%r0, %r31] | |
5995 | ba,a .+8 | |
5996 | jmpl %r27+0, %r27 | |
5997 | stxa %r12, [%r0] ASI_LSU_CONTROL | |
5998 | .word 0xa7aac828 ! 429: FMOVGE fmovs %fcc1, %f8, %f19 | |
5999 | pmu_20_182: | |
6000 | nop | |
6001 | nop | |
6002 | setx 0xffffffb6ffffffa1, %g1, %g7 | |
6003 | .word 0xa3800007 ! 433: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
6004 | fpinit_20_184: | |
6005 | nop | |
6006 | setx fp_data_quads, %r19, %r20 | |
6007 | ldd [%r20], %f0 | |
6008 | ldd [%r20+8], %f4 | |
6009 | ld [%r20+16], %fsr | |
6010 | ld [%r20+24], %r19 | |
6011 | wr %r19, %g0, %gsr | |
6012 | .word 0x91b00484 ! 437: FCMPLE32 fcmple32 %d0, %d4, %r8 | |
6013 | .word 0xd68008a0 ! 441: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
6014 | .word 0xe4c7c2e0 ! 445: LDSWA_R ldswa [%r31, %r0] 0x17, %r18 | |
6015 | .word 0xe337c000 ! 449: STQF_R - %f17, [%r0, %r31] | |
6016 | nop | |
6017 | nop | |
6018 | ta T_CHANGE_HPRIV ! macro | |
6019 | donret_20_190: | |
6020 | rd %pc, %r12 | |
6021 | mov HIGHVA_HIGHNUM, %r10 | |
6022 | sllx %r10, 32, %r10 | |
6023 | or %r12, %r10, %r12 | |
6024 | add %r12, (donretarg_20_190-donret_20_190), %r12 | |
6025 | add %r12, 0x8, %r11 ! nonseq tnpc | |
6026 | wrpr %g0, 0x1, %tl | |
6027 | wrpr %g0, %r12, %tpc | |
6028 | wrpr %g0, %r11, %tnpc | |
6029 | set (0x002b2300 | (0x4f << 24)), %r13 | |
6030 | and %r12, 0xfff, %r14 | |
6031 | sllx %r14, 32, %r14 | |
6032 | or %r13, %r14, %r20 | |
6033 | wrpr %r20, %g0, %tstate | |
6034 | wrhpr %g0, 0x131d, %htstate | |
6035 | wrpr %g0, 0x9f1, %pstate ! rand=0 (20) | |
6036 | retry | |
6037 | .align 512 | |
6038 | donretarg_20_190: | |
6039 | .word 0x26800001 ! 453: BL bl,a <label_0x1> | |
6040 | splash_htba_20_193: | |
6041 | nop | |
6042 | ta T_CHANGE_HPRIV | |
6043 | setx 0x0000000200280000, %r11, %r12 | |
6044 | .word 0x8b98000c ! 457: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
6045 | splash_htba_20_195: | |
6046 | nop | |
6047 | ta T_CHANGE_HPRIV | |
6048 | setx 0x00000002002a0000, %r11, %r12 | |
6049 | .word 0x8b98000c ! 461: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
6050 | trapasi_20_197: | |
6051 | nop | |
6052 | mov 0x10, %r1 ! (VA for ASI 0x49) | |
6053 | .word 0xdad84920 ! 465: LDXA_R ldxa [%r1, %r0] 0x49, %r13 | |
6054 | #if (defined SPC || defined CMP1) | |
6055 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_200) + 32, 16, 16)) -> intp(3,0,5,,,,,1) | |
6056 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_20_200)&0xffffffff) + 56, 16, 16)) -> intp(1,0,7,,,,,1) | |
6057 | #else | |
6058 | set 0xe4702f33, %r28 | |
6059 | #if (MAX_THREADS == 8) | |
6060 | and %r28, 0x7ff, %r28 | |
6061 | #endif | |
6062 | stxa %r28, [%g0] 0x73 | |
6063 | #endif | |
6064 | intvec_20_200: | |
6065 | .word 0x39400001 ! 469: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6066 | .word 0xc1bfe1e0 ! 473: STDFA_I stda %f0, [0x01e0, %r31] | |
6067 | .word 0x89800011 ! 477: WRTICK_R wr %r0, %r17, %tick | |
6068 | splash_hpstate_20_204: | |
6069 | .word 0x1e800001 ! 1: BVC bvc <label_0x1> | |
6070 | .word 0x8198320f ! 481: WRHPR_HPSTATE_I wrhpr %r0, 0x120f, %hpstate | |
6071 | nop | |
6072 | nop | |
6073 | ta T_CHANGE_HPRIV ! macro | |
6074 | donret_20_206: | |
6075 | rd %pc, %r12 | |
6076 | mov HIGHVA_HIGHNUM, %r10 | |
6077 | sllx %r10, 32, %r10 | |
6078 | or %r12, %r10, %r12 | |
6079 | add %r12, (donretarg_20_206-donret_20_206+4), %r12 | |
6080 | add %r12, 0x4, %r11 ! seq tnpc | |
6081 | wrpr %g0, 0x1, %tl | |
6082 | wrpr %g0, %r12, %tpc | |
6083 | wrpr %g0, %r11, %tnpc | |
6084 | set (0x00602f00 | (0x58 << 24)), %r13 | |
6085 | and %r12, 0xfff, %r14 | |
6086 | sllx %r14, 32, %r14 | |
6087 | or %r13, %r14, %r20 | |
6088 | wrpr %r20, %g0, %tstate | |
6089 | wrhpr %g0, 0x17e4, %htstate | |
6090 | wrhpr %g0, 0x1c4a, %hpstate ! rand=1 (20) | |
6091 | ldx [%r12+%r0], %g1 | |
6092 | retry | |
6093 | donretarg_20_206: | |
6094 | .word 0xd66fe143 ! 485: LDSTUB_I ldstub %r11, [%r31 + 0x0143] | |
6095 | brcommon2_20_208: | |
6096 | nop | |
6097 | nop | |
6098 | setx common_target, %r12, %r27 | |
6099 | ba,a .+12 | |
6100 | .word 0x91a00551 ! 1: FSQRTd fsqrt | |
6101 | ba,a .+8 | |
6102 | jmpl %r27-4, %r27 | |
6103 | .word 0xc19fd920 ! 489: LDDFA_R ldda [%r31, %r0], %f0 | |
6104 | splash_cmpr_20_210: | |
6105 | mov 0, %r18 | |
6106 | sllx %r18, 63, %r18 | |
6107 | rd %tick, %r17 | |
6108 | add %r17, 0x60, %r17 | |
6109 | or %r17, %r18, %r17 | |
6110 | ta T_CHANGE_HPRIV | |
6111 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
6112 | .word 0xaf800011 ! 493: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
6113 | .word 0x91950009 ! 497: WRPR_PIL_R wrpr %r20, %r9, %pil | |
6114 | nop | |
6115 | nop | |
6116 | ta T_CHANGE_PRIV | |
6117 | wrpr %g0, %g0, %gl | |
6118 | nop | |
6119 | nop | |
6120 | .text | |
6121 | setx join_lbl_0_0, %g1, %g2 | |
6122 | jmp %g2 | |
6123 | nop | |
6124 | fork_lbl_0_5: | |
6125 | wrhpr %g0, 0x1953, %hpstate ! ta T_CHANGE_NONHPRIV | |
6126 | .word 0x91904013 ! 1: WRPR_PIL_R wrpr %r1, %r19, %pil | |
6127 | splash_htba_10_1: | |
6128 | nop | |
6129 | ta T_CHANGE_HPRIV | |
6130 | setx 0x0000000200280000, %r11, %r12 | |
6131 | .word 0x8b98000c ! 5: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
6132 | splash_cmpr_10_4: | |
6133 | mov 0, %r18 | |
6134 | sllx %r18, 63, %r18 | |
6135 | rd %tick, %r17 | |
6136 | add %r17, 0x70, %r17 | |
6137 | or %r17, %r18, %r17 | |
6138 | ta T_CHANGE_HPRIV | |
6139 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
6140 | ta T_CHANGE_PRIV | |
6141 | .word 0xaf800011 ! 9: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
6142 | .word 0xd23fe1b9 ! 13: STD_I std %r9, [%r31 + 0x01b9] | |
6143 | jmptr_10_7: | |
6144 | nop | |
6145 | nop | |
6146 | best_set_reg(0xe1200000, %r20, %r27) | |
6147 | .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27 | |
6148 | #if (defined SPC || defined CMP1) | |
6149 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_10) + 40, 16, 16)) -> intp(1,0,6,,,,,1) | |
6150 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_10)&0xffffffff) + 24, 16, 16)) -> intp(7,0,9,,,,,1) | |
6151 | #else | |
6152 | set 0xce705745, %r28 | |
6153 | #if (MAX_THREADS == 8) | |
6154 | and %r28, 0x7ff, %r28 | |
6155 | #endif | |
6156 | stxa %r28, [%g0] 0x73 | |
6157 | #endif | |
6158 | intvec_10_10: | |
6159 | .word 0x91a1c9c4 ! 21: FDIVd fdivd %f38, %f4, %f8 | |
6160 | .word 0x05400001 ! 1: FBPLG fblg | |
6161 | .word 0x8d902966 ! 25: WRPR_PSTATE_I wrpr %r0, 0x0966, %pstate | |
6162 | nop | |
6163 | nop | |
6164 | ta T_CHANGE_HPRIV | |
6165 | mov 0x10, %r10 | |
6166 | set sync_thr_counter6, %r23 | |
6167 | #ifndef SPC | |
6168 | ldxa [%g0]0x63, %o1 | |
6169 | and %o1, 0x38, %o1 | |
6170 | add %o1, %r23, %r23 | |
6171 | #endif | |
6172 | cas [%r23],%g0,%r10 !lock | |
6173 | brnz %r10, sma_10_16 | |
6174 | rd %asi, %r12 | |
6175 | wr %g0, 0x40, %asi | |
6176 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
6177 | set 0x00121fff, %l7 | |
6178 | stxa %l7, [%g0 + 0x80] %asi | |
6179 | wr %r12, %g0, %asi | |
6180 | st %g0, [%r23] | |
6181 | sma_10_16: | |
6182 | wrhpr %g0, 0x3c2, %hpstate ! ta T_CHANGE_NONHPRIV | |
6183 | .word 0xe7e7d042 ! 29: CASA_I casa [%r31] 0x82, %r2, %r19 | |
6184 | demap_10_17: | |
6185 | nop | |
6186 | mov 0x80, %g3 | |
6187 | ta T_CHANGE_HPRIV | |
6188 | stxa %g3, [%g3] 0x5f | |
6189 | stxa %g3, [%g3] 0x57 | |
6190 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6191 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6192 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
6193 | stxa %g3, [%g3] 0x57 | |
6194 | stxa %g3, [%g3] 0x57 | |
6195 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6196 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
6197 | stxa %g3, [%g3] 0x57 | |
6198 | stxa %g3, [%g3] 0x5f | |
6199 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
6200 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
6201 | stxa %g3, [%g3] 0x57 | |
6202 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6203 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
6204 | stxa %g3, [%g3] 0x5f | |
6205 | wrhpr %g0, 0xe50, %hpstate ! ta T_CHANGE_NONHPRIV | |
6206 | .word 0xe61fe026 ! 33: LDD_I ldd [%r31 + 0x0026], %r19 | |
6207 | #if (defined SPC || defined CMP1) | |
6208 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_18) + 8, 16, 16)) -> intp(7,0,2,,,,,1) | |
6209 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_18)&0xffffffff) + 56, 16, 16)) -> intp(3,0,28,,,,,1) | |
6210 | #else | |
6211 | set 0x57a0e5ec, %r28 | |
6212 | #if (MAX_THREADS == 8) | |
6213 | and %r28, 0x7ff, %r28 | |
6214 | #endif | |
6215 | stxa %r28, [%g0] 0x73 | |
6216 | #endif | |
6217 | intvec_10_18: | |
6218 | .word 0x39400001 ! 37: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6219 | splash_hpstate_10_21: | |
6220 | ta T_CHANGE_NONHPRIV | |
6221 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> | |
6222 | .word 0x81982cdf ! 41: WRHPR_HPSTATE_I wrhpr %r0, 0x0cdf, %hpstate | |
6223 | demap_10_23: | |
6224 | nop | |
6225 | mov 0x80, %g3 | |
6226 | ta T_CHANGE_HPRIV | |
6227 | .word 0x16800001 ! 1: BGE bge <label_0x1> | |
6228 | stxa %g3, [%g3] 0x5f | |
6229 | stxa %g3, [%g3] 0x5f | |
6230 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6231 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6232 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
6233 | stxa %g3, [%g3] 0x5f | |
6234 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6235 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
6236 | stxa %g3, [%g3] 0x57 | |
6237 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
6238 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6239 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6240 | stxa %g3, [%g3] 0x57 | |
6241 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6242 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
6243 | stxa %g3, [%g3] 0x57 | |
6244 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6245 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6246 | wrhpr %g0, 0x120a, %hpstate ! ta T_CHANGE_NONHPRIV | |
6247 | .word 0xe81fe12b ! 45: LDD_I ldd [%r31 + 0x012b], %r20 | |
6248 | fpinit_10_24: | |
6249 | nop | |
6250 | setx fp_data_quads, %r19, %r20 | |
6251 | ldd [%r20], %f0 | |
6252 | ldd [%r20+8], %f4 | |
6253 | ld [%r20+16], %fsr | |
6254 | ld [%r20+24], %r19 | |
6255 | wr %r19, %g0, %gsr | |
6256 | .word 0x87a80a44 ! 49: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
6257 | brcommon1_10_25: | |
6258 | nop | |
6259 | nop | |
6260 | setx common_target, %r12, %r27 | |
6261 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
6262 | ba,a .+12 | |
6263 | .word 0xa9b7c7c3 ! 1: PDIST pdistn %d62, %d34, %d20 | |
6264 | ba,a .+8 | |
6265 | jmpl %r27-4, %r27 | |
6266 | .word 0x97a249b2 ! 53: FDIVs fdivs %f9, %f18, %f11 | |
6267 | rd %tick, %r28 | |
6268 | #if (MAX_THREADS == 8) | |
6269 | sethi %hi(0x33800), %r27 | |
6270 | #else | |
6271 | sethi %hi(0x30000), %r27 | |
6272 | #endif | |
6273 | andn %r28, %r27, %r28 | |
6274 | ta T_CHANGE_HPRIV | |
6275 | stxa %r28, [%g0] 0x73 | |
6276 | .word 0x9f8036ed ! 1: SIR sir 0x16ed | |
6277 | intvec_10_27: | |
6278 | .word 0x39400001 ! 57: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6279 | .word 0xe927c000 ! 61: STF_R st %f20, [%r0, %r31] | |
6280 | .word 0x91950010 ! 65: WRPR_PIL_R wrpr %r20, %r16, %pil | |
6281 | splash_cmpr_10_35: | |
6282 | mov 0, %r18 | |
6283 | sllx %r18, 63, %r18 | |
6284 | rd %tick, %r17 | |
6285 | add %r17, 0x80, %r17 | |
6286 | or %r17, %r18, %r17 | |
6287 | .word 0xb3800011 ! 69: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
6288 | jmptr_10_37: | |
6289 | nop | |
6290 | nop | |
6291 | best_set_reg(0xe1a00000, %r20, %r27) | |
6292 | .word 0xb7c6c000 ! 73: JMPL_R jmpl %r27 + %r0, %r27 | |
6293 | jmptr_10_38: | |
6294 | nop | |
6295 | nop | |
6296 | best_set_reg(0xe0200000, %r20, %r27) | |
6297 | .word 0xb7c6c000 ! 77: JMPL_R jmpl %r27 + %r0, %r27 | |
6298 | nop | |
6299 | nop | |
6300 | ta T_CHANGE_HPRIV | |
6301 | mov 0x10+1, %r10 | |
6302 | set sync_thr_counter5, %r23 | |
6303 | #ifndef SPC | |
6304 | ldxa [%g0]0x63, %o1 | |
6305 | and %o1, 0x38, %o1 | |
6306 | add %o1, %r23, %r23 | |
6307 | sllx %o1, 5, %o3 !(CID*256) | |
6308 | #endif | |
6309 | cas [%r23],%g0,%r10 !lock | |
6310 | brnz %r10, cwq_10_39 | |
6311 | rd %asi, %r12 | |
6312 | wr %g0, 0x40, %asi | |
6313 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6314 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6315 | cmp %l1, 1 | |
6316 | bne cwq_10_39 | |
6317 | set CWQ_BASE, %l6 | |
6318 | #ifndef SPC | |
6319 | add %l6, %o3, %l6 | |
6320 | #endif | |
6321 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6322 | best_set_reg(0x20610070, %l1, %l2) !# Control Word | |
6323 | sllx %l2, 32, %l2 | |
6324 | stx %l2, [%l6 + 0x0] | |
6325 | membar #Sync | |
6326 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6327 | sub %l2, 0x40, %l2 | |
6328 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6329 | wr %r12, %g0, %asi | |
6330 | st %g0, [%r23] | |
6331 | cwq_10_39: | |
6332 | wrhpr %g0, 0x492, %hpstate ! ta T_CHANGE_NONHPRIV | |
6333 | .word 0xa9414000 ! 81: RDPC rd %pc, %r20 | |
6334 | nop | |
6335 | nop | |
6336 | ta T_CHANGE_HPRIV | |
6337 | mov 0x10, %r10 | |
6338 | set sync_thr_counter6, %r23 | |
6339 | #ifndef SPC | |
6340 | ldxa [%g0]0x63, %o1 | |
6341 | and %o1, 0x38, %o1 | |
6342 | add %o1, %r23, %r23 | |
6343 | #endif | |
6344 | cas [%r23],%g0,%r10 !lock | |
6345 | brnz %r10, sma_10_41 | |
6346 | rd %asi, %r12 | |
6347 | wr %g0, 0x40, %asi | |
6348 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
6349 | set 0x00021fff, %l7 | |
6350 | stxa %l7, [%g0 + 0x80] %asi | |
6351 | wr %r12, %g0, %asi | |
6352 | st %g0, [%r23] | |
6353 | sma_10_41: | |
6354 | wrhpr %g0, 0x851, %hpstate ! ta T_CHANGE_NONHPRIV | |
6355 | .word 0xd5e7dc41 ! 85: CASA_I casa [%r31] 0xe2, %r1, %r10 | |
6356 | splash_cmpr_10_42: | |
6357 | mov 0, %r18 | |
6358 | sllx %r18, 63, %r18 | |
6359 | rd %tick, %r17 | |
6360 | add %r17, 0x100, %r17 | |
6361 | or %r17, %r18, %r17 | |
6362 | .word 0xaf800011 ! 89: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
6363 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> | |
6364 | .word 0x8d903611 ! 93: WRPR_PSTATE_I wrpr %r0, 0x1611, %pstate | |
6365 | .word 0xe00fe168 ! 97: LDUB_I ldub [%r31 + 0x0168], %r16 | |
6366 | .word 0x89800011 ! 101: WRTICK_R wr %r0, %r17, %tick | |
6367 | .word 0xc36fe192 ! 105: PREFETCH_I prefetch [%r31 + 0x0192], #one_read | |
6368 | br_badelay3_10_50: | |
6369 | .word 0xa3a449d4 ! 1: FDIVd fdivd %f48, %f20, %f48 | |
6370 | .word 0xc56f3f47 ! Random illegal ? | |
6371 | .word 0x91a00553 ! 1: FSQRTd fsqrt | |
6372 | .word 0x97a4882d ! 109: FADDs fadds %f18, %f13, %f11 | |
6373 | memptr_10_52: | |
6374 | set 0x60540000, %r31 | |
6375 | .word 0x8581f65e ! 113: WRCCR_I wr %r7, 0x165e, %ccr | |
6376 | demap_10_53: | |
6377 | nop | |
6378 | mov 0x80, %g3 | |
6379 | ta T_CHANGE_HPRIV | |
6380 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
6381 | stxa %g3, [%g3] 0x57 | |
6382 | stxa %g3, [%g3] 0x5f | |
6383 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
6384 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
6385 | stxa %g3, [%g3] 0x57 | |
6386 | stxa %g3, [%g3] 0x5f | |
6387 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
6388 | stxa %g3, [%g3] 0x57 | |
6389 | stxa %g3, [%g3] 0x57 | |
6390 | wrhpr %g0, 0x1252, %hpstate ! ta T_CHANGE_NONHPRIV | |
6391 | .word 0xd81fe178 ! 117: LDD_I ldd [%r31 + 0x0178], %r12 | |
6392 | #if (defined SPC || defined CMP1) | |
6393 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_56) + 0, 16, 16)) -> intp(6,0,12,,,,,1) | |
6394 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_56)&0xffffffff) + 16, 16, 16)) -> intp(1,0,5,,,,,1) | |
6395 | #else | |
6396 | set 0xfe5099e7, %r28 | |
6397 | #if (MAX_THREADS == 8) | |
6398 | and %r28, 0x7ff, %r28 | |
6399 | #endif | |
6400 | stxa %r28, [%g0] 0x73 | |
6401 | #endif | |
6402 | .word 0xa5a509d0 ! 1: FDIVd fdivd %f20, %f16, %f18 | |
6403 | intvec_10_56: | |
6404 | .word 0xa1b504ca ! 121: FCMPNE32 fcmpne32 %d20, %d10, %r16 | |
6405 | nop | |
6406 | nop | |
6407 | ta T_CHANGE_HPRIV ! macro | |
6408 | donret_10_58: | |
6409 | rd %pc, %r12 | |
6410 | mov HIGHVA_HIGHNUM, %r10 | |
6411 | sllx %r10, 32, %r10 | |
6412 | or %r12, %r10, %r12 | |
6413 | add %r12, (donretarg_10_58-donret_10_58), %r12 | |
6414 | add %r12, 0x8, %r11 ! nonseq tnpc | |
6415 | andn %r12, %r10, %r12 ! low VA tpc | |
6416 | wrpr %g0, 0x1, %tl | |
6417 | wrpr %g0, %r12, %tpc | |
6418 | wrpr %g0, %r11, %tnpc | |
6419 | set (0x00c8b900 | (20 << 24)), %r13 | |
6420 | and %r12, 0xfff, %r14 | |
6421 | sllx %r14, 32, %r14 | |
6422 | or %r13, %r14, %r20 | |
6423 | wrpr %r20, %g0, %tstate | |
6424 | wrhpr %g0, 0x1b0e, %htstate | |
6425 | wrhpr %g0, 0x759, %hpstate ! rand=1 (10) | |
6426 | ldx [%r12+%r0], %g1 | |
6427 | retry | |
6428 | .align 128 | |
6429 | donretarg_10_58: | |
6430 | .word 0xa5a249c2 ! 125: FDIVd fdivd %f40, %f2, %f18 | |
6431 | .word 0x9190c014 ! 129: WRPR_PIL_R wrpr %r3, %r20, %pil | |
6432 | .word 0x87a94a53 ! 133: FCMPd fcmpd %fcc<n>, %f36, %f50 | |
6433 | .word 0xda07c000 ! 137: LDUW_R lduw [%r31 + %r0], %r13 | |
6434 | splash_tba_10_64: | |
6435 | nop | |
6436 | ta T_CHANGE_PRIV | |
6437 | set 0x120000, %r12 | |
6438 | .word 0x8b90000c ! 141: WRPR_TBA_R wrpr %r0, %r12, %tba | |
6439 | .word 0xd81fc000 ! 145: LDD_R ldd [%r31 + %r0], %r12 | |
6440 | .word 0x9bb280e4 ! 149: EDGE16LN edge16ln %r10, %r4, %r13 | |
6441 | .word 0xa190200b ! 153: WRPR_GL_I wrpr %r0, 0x000b, %- | |
6442 | brcommon3_10_70: | |
6443 | nop | |
6444 | nop | |
6445 | setx common_target, %r12, %r27 | |
6446 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
6447 | ba,a .+12 | |
6448 | .word 0xe86fe1c0 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x01c0] | |
6449 | ba,a .+8 | |
6450 | jmpl %r27+0, %r27 | |
6451 | .word 0x8d9024dd ! 157: WRPR_PSTATE_I wrpr %r0, 0x04dd, %pstate | |
6452 | brcommon1_10_71: | |
6453 | nop | |
6454 | nop | |
6455 | setx common_target, %r12, %r27 | |
6456 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
6457 | ba,a .+12 | |
6458 | .word 0xa9b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d20 | |
6459 | ba,a .+8 | |
6460 | jmpl %r27-4, %r27 | |
6461 | .word 0x9bb247c6 ! 161: PDIST pdistn %d40, %d6, %d44 | |
6462 | #if (defined SPC || defined CMP1) | |
6463 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_74) + 16, 16, 16)) -> intp(4,0,4,,,,,1) | |
6464 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_74)&0xffffffff) + 8, 16, 16)) -> intp(3,0,21,,,,,1) | |
6465 | #else | |
6466 | set 0x45f02b2d, %r28 | |
6467 | #if (MAX_THREADS == 8) | |
6468 | and %r28, 0x7ff, %r28 | |
6469 | #endif | |
6470 | stxa %r28, [%g0] 0x73 | |
6471 | #endif | |
6472 | .word 0x9f803e01 ! 1: SIR sir 0x1e01 | |
6473 | intvec_10_74: | |
6474 | .word 0x39400001 ! 165: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6475 | .word 0xd3e7c2e0 ! 169: CASA_I casa [%r31] 0x17, %r0, %r9 | |
6476 | .word 0xd22fe179 ! 173: STB_I stb %r9, [%r31 + 0x0179] | |
6477 | .word 0x91948010 ! 177: WRPR_PIL_R wrpr %r18, %r16, %pil | |
6478 | rd %tick, %r28 | |
6479 | #if (MAX_THREADS == 8) | |
6480 | sethi %hi(0x33800), %r27 | |
6481 | #else | |
6482 | sethi %hi(0x30000), %r27 | |
6483 | #endif | |
6484 | andn %r28, %r27, %r28 | |
6485 | ta T_CHANGE_HPRIV | |
6486 | stxa %r28, [%g0] 0x73 | |
6487 | .word 0x93a509d4 ! 1: FDIVd fdivd %f20, %f20, %f40 | |
6488 | intvec_10_81: | |
6489 | .word 0x39400001 ! 181: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6490 | jmptr_10_83: | |
6491 | nop | |
6492 | nop | |
6493 | best_set_reg(0xe0a00000, %r20, %r27) | |
6494 | .word 0xb7c6c000 ! 185: JMPL_R jmpl %r27 + %r0, %r27 | |
6495 | .word 0xe19fd960 ! 189: LDDFA_R ldda [%r31, %r0], %f16 | |
6496 | .word 0x81dc0009 ! 193: FLUSH_R flush %r16, %r9, %r0 | |
6497 | jmptr_10_87: | |
6498 | nop | |
6499 | nop | |
6500 | best_set_reg(0xe1200000, %r20, %r27) | |
6501 | .word 0xb7c6c000 ! 197: JMPL_R jmpl %r27 + %r0, %r27 | |
6502 | splash_lsu_10_89: | |
6503 | nop | |
6504 | nop | |
6505 | ta T_CHANGE_HPRIV | |
6506 | set 0x2de6a635, %r2 | |
6507 | mov 0x3, %r1 | |
6508 | sllx %r1, 32, %r1 | |
6509 | or %r1, %r2, %r2 | |
6510 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6511 | .word 0x3d400001 ! 201: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6512 | .word 0x8d902e41 ! 205: WRPR_PSTATE_I wrpr %r0, 0x0e41, %pstate | |
6513 | nop | |
6514 | nop | |
6515 | ta T_CHANGE_HPRIV ! macro | |
6516 | donret_10_92: | |
6517 | rd %pc, %r12 | |
6518 | mov HIGHVA_HIGHNUM, %r10 | |
6519 | sllx %r10, 32, %r10 | |
6520 | or %r12, %r10, %r12 | |
6521 | add %r12, (donretarg_10_92-donret_10_92), %r12 | |
6522 | add %r12, 0x8, %r11 ! nonseq tnpc | |
6523 | andn %r12, %r10, %r12 ! low VA tpc | |
6524 | wrpr %g0, 0x2, %tl | |
6525 | wrpr %g0, %r12, %tpc | |
6526 | wrpr %g0, %r11, %tnpc | |
6527 | set (0x00b14f00 | (0x88 << 24)), %r13 | |
6528 | and %r12, 0xfff, %r14 | |
6529 | sllx %r14, 32, %r14 | |
6530 | or %r13, %r14, %r20 | |
6531 | wrpr %r20, %g0, %tstate | |
6532 | wrhpr %g0, 0x1d6f, %htstate | |
6533 | wrpr %g0, 0x1f39, %pstate ! rand=0 (10) | |
6534 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
6535 | ldx [%r12+%r0], %g1 | |
6536 | retry | |
6537 | donretarg_10_92: | |
6538 | .word 0xa7a409d1 ! 209: FDIVd fdivd %f16, %f48, %f50 | |
6539 | #if (defined SPC || defined CMP1) | |
6540 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_94) + 40, 16, 16)) -> intp(2,0,9,,,,,1) | |
6541 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_94)&0xffffffff) + 40, 16, 16)) -> intp(4,0,3,,,,,1) | |
6542 | #else | |
6543 | set 0xea509e90, %r28 | |
6544 | #if (MAX_THREADS == 8) | |
6545 | and %r28, 0x7ff, %r28 | |
6546 | #endif | |
6547 | stxa %r28, [%g0] 0x73 | |
6548 | #endif | |
6549 | intvec_10_94: | |
6550 | .word 0x9f802fa6 ! 213: SIR sir 0x0fa6 | |
6551 | #if (defined SPC || defined CMP) | |
6552 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_10_96)+0, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1) | |
6553 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_10_96)&0xffffffff) + 0, 16, 16)) -> intp(mask2tid(0x10),1,3,,,,,1) | |
6554 | xir_10_96: | |
6555 | #else | |
6556 | #if (defined FC) | |
6557 | !! Generate XIR via RESET_GEN register | |
6558 | ta T_CHANGE_HPRIV | |
6559 | rdpr %pstate, %r18 | |
6560 | andn %r18, 0x208, %r18 ! Reset pstate.am,cle | |
6561 | wrpr %r18, %pstate | |
6562 | #ifndef XIR_RND_CORES | |
6563 | ldxa [%g0] 0x63, %o1 | |
6564 | mov 1, %r18 | |
6565 | sllx %r18, %o1, %r18 | |
6566 | #endif | |
6567 | mov 0x30, %r19 | |
6568 | setx 0x8900000808, %r16, %r17 | |
6569 | mov 0x2, %r16 | |
6570 | xir_10_96: | |
6571 | stxa %r18, [%r19] 0x41 | |
6572 | stx %r16, [%r17] | |
6573 | #endif | |
6574 | #endif | |
6575 | .word 0xa984675e ! 217: WR_SET_SOFTINT_I wr %r17, 0x075e, %set_softint | |
6576 | .word 0x89800011 ! 221: WRTICK_R wr %r0, %r17, %tick | |
6577 | .word 0xd8ffe000 ! 225: SWAPA_I swapa %r12, [%r31 + 0x0000] %asi | |
6578 | splash_hpstate_10_102: | |
6579 | .word 0x819827df ! 229: WRHPR_HPSTATE_I wrhpr %r0, 0x07df, %hpstate | |
6580 | intveclr_10_105: | |
6581 | nop | |
6582 | nop | |
6583 | ta T_CHANGE_HPRIV | |
6584 | setx 0x4c2dc023ab34de0f, %r1, %r28 | |
6585 | stxa %r28, [%g0] 0x72 | |
6586 | wrhpr %g0, 0x194a, %hpstate ! ta T_CHANGE_NONHPRIV | |
6587 | .word 0x25400001 ! 233: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6588 | splash_lsu_10_108: | |
6589 | nop | |
6590 | nop | |
6591 | ta T_CHANGE_HPRIV | |
6592 | set 0xbbb3e2c2, %r2 | |
6593 | mov 0x6, %r1 | |
6594 | sllx %r1, 32, %r1 | |
6595 | or %r1, %r2, %r2 | |
6596 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6597 | .word 0x1d400001 ! 237: FBPULE fbule | |
6598 | nop | |
6599 | nop | |
6600 | ta T_CHANGE_HPRIV ! macro | |
6601 | donret_10_110: | |
6602 | rd %pc, %r12 | |
6603 | mov HIGHVA_HIGHNUM, %r10 | |
6604 | sllx %r10, 32, %r10 | |
6605 | or %r12, %r10, %r12 | |
6606 | add %r12, (donretarg_10_110-donret_10_110+4), %r12 | |
6607 | add %r12, 0x4, %r11 ! seq tnpc | |
6608 | wrpr %g0, 0x2, %tl | |
6609 | wrpr %g0, %r12, %tpc | |
6610 | wrpr %g0, %r11, %tnpc | |
6611 | set (0x00cd3100 | (48 << 24)), %r13 | |
6612 | and %r12, 0xfff, %r14 | |
6613 | sllx %r14, 32, %r14 | |
6614 | or %r13, %r14, %r20 | |
6615 | wrpr %r20, %g0, %tstate | |
6616 | wrhpr %g0, 0x64e, %htstate | |
6617 | wrpr %g0, 0xe72, %pstate ! rand=0 (10) | |
6618 | ldx [%r12+%r0], %g1 | |
6619 | retry | |
6620 | .align 512 | |
6621 | donretarg_10_110: | |
6622 | .word 0xa7a489c5 ! 241: FDIVd fdivd %f18, %f36, %f50 | |
6623 | .word 0xe83fc000 ! 245: STD_R std %r20, [%r31 + %r0] | |
6624 | .word 0xe8cfd140 ! 249: LDSBA_R ldsba [%r31, %r0] 0x8a, %r20 | |
6625 | #if (defined SPC || defined CMP1) | |
6626 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_112) + 48, 16, 16)) -> intp(7,0,22,,,,,1) | |
6627 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_112)&0xffffffff) + 0, 16, 16)) -> intp(7,0,10,,,,,1) | |
6628 | #else | |
6629 | set 0xb1d02d89, %r28 | |
6630 | #if (MAX_THREADS == 8) | |
6631 | and %r28, 0x7ff, %r28 | |
6632 | #endif | |
6633 | stxa %r28, [%g0] 0x73 | |
6634 | #endif | |
6635 | .word 0x9f8034bf ! 1: SIR sir 0x14bf | |
6636 | intvec_10_112: | |
6637 | .word 0xa1a509d3 ! 253: FDIVd fdivd %f20, %f50, %f16 | |
6638 | .word 0xe037e166 ! 257: STH_I sth %r16, [%r31 + 0x0166] | |
6639 | .word 0xc30fc000 ! 261: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
6640 | jmptr_10_116: | |
6641 | nop | |
6642 | nop | |
6643 | best_set_reg(0xe1a00000, %r20, %r27) | |
6644 | .word 0xb7c6c000 ! 265: JMPL_R jmpl %r27 + %r0, %r27 | |
6645 | splash_hpstate_10_117: | |
6646 | ta T_CHANGE_NONHPRIV | |
6647 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> | |
6648 | .word 0x81983dd5 ! 269: WRHPR_HPSTATE_I wrhpr %r0, 0x1dd5, %hpstate | |
6649 | set 0x2e9, %l3 | |
6650 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
6651 | .word 0x99b407d2 ! 273: PDIST pdistn %d16, %d18, %d12 | |
6652 | splash_lsu_10_120: | |
6653 | nop | |
6654 | nop | |
6655 | ta T_CHANGE_HPRIV | |
6656 | set 0xe937beb9, %r2 | |
6657 | mov 0x6, %r1 | |
6658 | sllx %r1, 32, %r1 | |
6659 | or %r1, %r2, %r2 | |
6660 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6661 | .word 0x3d400001 ! 277: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6662 | splash_hpstate_10_122: | |
6663 | .word 0x8198245f ! 281: WRHPR_HPSTATE_I wrhpr %r0, 0x045f, %hpstate | |
6664 | splash_lsu_10_124: | |
6665 | nop | |
6666 | nop | |
6667 | ta T_CHANGE_HPRIV | |
6668 | set 0x20dd0fd0, %r2 | |
6669 | mov 0x6, %r1 | |
6670 | sllx %r1, 32, %r1 | |
6671 | or %r1, %r2, %r2 | |
6672 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> | |
6673 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6674 | .word 0x1d400001 ! 285: FBPULE fbule | |
6675 | .word 0x9f8020d0 ! 289: SIR sir 0x00d0 | |
6676 | .word 0xe3e7e002 ! 293: CASA_R casa [%r31] %asi, %r2, %r17 | |
6677 | .word 0xd047c000 ! 297: LDSW_R ldsw [%r31 + %r0], %r8 | |
6678 | brcommon3_10_129: | |
6679 | nop | |
6680 | nop | |
6681 | setx common_target, %r12, %r27 | |
6682 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
6683 | ba,a .+12 | |
6684 | .word 0xd06fe070 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0070] | |
6685 | ba,a .+8 | |
6686 | jmpl %r27+0, %r27 | |
6687 | .word 0x8d903d55 ! 301: WRPR_PSTATE_I wrpr %r0, 0x1d55, %pstate | |
6688 | .word 0xe727e198 ! 305: STF_I st %f19, [0x0198, %r31] | |
6689 | .word 0xa1b4c0f4 ! 309: EDGE16LN edge16ln %r19, %r20, %r16 | |
6690 | .word 0x9953c000 ! 313: RDPR_FQ <illegal instruction> | |
6691 | .word 0xe1bfdf20 ! 317: STDFA_R stda %f16, [%r0, %r31] | |
6692 | .word 0xe21fc003 ! 321: LDD_R ldd [%r31 + %r3], %r17 | |
6693 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick | |
6694 | .word 0xa783276d ! 329: WR_GRAPHICS_STATUS_REG_I wr %r12, 0x076d, %- | |
6695 | .word 0xe127e04e ! 333: STF_I st %f16, [0x004e, %r31] | |
6696 | jmptr_10_140: | |
6697 | nop | |
6698 | nop | |
6699 | best_set_reg(0xe0200000, %r20, %r27) | |
6700 | .word 0xb7c6c000 ! 337: JMPL_R jmpl %r27 + %r0, %r27 | |
6701 | .word 0xd8c7c600 ! 341: LDSWA_R ldswa [%r31, %r0] 0x30, %r12 | |
6702 | .word 0x8d903344 ! 345: WRPR_PSTATE_I wrpr %r0, 0x1344, %pstate | |
6703 | .word 0x9194000c ! 349: WRPR_PIL_R wrpr %r16, %r12, %pil | |
6704 | .word 0x97b500f0 ! 353: EDGE16LN edge16ln %r20, %r16, %r11 | |
6705 | jmptr_10_150: | |
6706 | nop | |
6707 | nop | |
6708 | best_set_reg(0xe0a00000, %r20, %r27) | |
6709 | .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 | |
6710 | .word 0xe48008a0 ! 361: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 | |
6711 | .word 0xd337e1f8 ! 365: STQF_I - %f9, [0x01f8, %r31] | |
6712 | jmptr_10_155: | |
6713 | nop | |
6714 | nop | |
6715 | best_set_reg(0xe1200000, %r20, %r27) | |
6716 | .word 0xb7c6c000 ! 369: JMPL_R jmpl %r27 + %r0, %r27 | |
6717 | jmptr_10_159: | |
6718 | nop | |
6719 | nop | |
6720 | best_set_reg(0xe1a00000, %r20, %r27) | |
6721 | .word 0xb7c6c000 ! 373: JMPL_R jmpl %r27 + %r0, %r27 | |
6722 | .word 0xe44fc000 ! 377: LDSB_R ldsb [%r31 + %r0], %r18 | |
6723 | .word 0xe3e7e002 ! 381: CASA_R casa [%r31] %asi, %r2, %r17 | |
6724 | rd %tick, %r28 | |
6725 | #if (MAX_THREADS == 8) | |
6726 | sethi %hi(0x33800), %r27 | |
6727 | #else | |
6728 | sethi %hi(0x30000), %r27 | |
6729 | #endif | |
6730 | andn %r28, %r27, %r28 | |
6731 | ta T_CHANGE_HPRIV | |
6732 | stxa %r28, [%g0] 0x73 | |
6733 | .word 0x19400001 ! 1: FBPUGE fbuge | |
6734 | intvec_10_163: | |
6735 | .word 0x99a409cc ! 385: FDIVd fdivd %f16, %f12, %f12 | |
6736 | brcommon3_10_164: | |
6737 | nop | |
6738 | nop | |
6739 | setx common_target, %r12, %r27 | |
6740 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
6741 | ba,a .+12 | |
6742 | .word 0xe46fe0d0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x00d0] | |
6743 | ba,a .+8 | |
6744 | jmpl %r27+0, %r27 | |
6745 | .word 0x00800001 ! 389: BN bn <label_0x1> | |
6746 | .word 0xe4800b20 ! 393: LDUWA_R lduwa [%r0, %r0] 0x59, %r18 | |
6747 | .word 0x8d902173 ! 397: WRPR_PSTATE_I wrpr %r0, 0x0173, %pstate | |
6748 | .word 0xe4c7d060 ! 401: LDSWA_R ldswa [%r31, %r0] 0x83, %r18 | |
6749 | splash_tba_10_171: | |
6750 | nop | |
6751 | ta T_CHANGE_PRIV | |
6752 | setx 0x0000000400380000, %r11, %r12 | |
6753 | .word 0x8b90000c ! 405: WRPR_TBA_R wrpr %r0, %r12, %tba | |
6754 | brcommon1_10_173: | |
6755 | nop | |
6756 | nop | |
6757 | setx common_target, %r12, %r27 | |
6758 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
6759 | ba,a .+12 | |
6760 | .word 0xc32fe040 ! 1: STXFSR_I st-sfr %f1, [0x0040, %r31] | |
6761 | ba,a .+8 | |
6762 | jmpl %r27-4, %r27 | |
6763 | .word 0xa3a109ad ! 409: FDIVs fdivs %f4, %f13, %f17 | |
6764 | splash_lsu_10_175: | |
6765 | nop | |
6766 | nop | |
6767 | ta T_CHANGE_HPRIV | |
6768 | set 0x2e6097fa, %r2 | |
6769 | mov 0x6, %r1 | |
6770 | sllx %r1, 32, %r1 | |
6771 | or %r1, %r2, %r2 | |
6772 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> | |
6773 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6774 | .word 0x3d400001 ! 413: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6775 | .word 0xe1bfe0e0 ! 417: STDFA_I stda %f16, [0x00e0, %r31] | |
6776 | .word 0xd897c2c0 ! 421: LDUHA_R lduha [%r31, %r0] 0x16, %r12 | |
6777 | .word 0x9f802050 ! 425: SIR sir 0x0050 | |
6778 | brcommon3_10_181: | |
6779 | nop | |
6780 | setx common_target, %r12, %r27 | |
6781 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
6782 | ba,a .+12 | |
6783 | .word 0xe537c002 ! 1: STQF_R - %f18, [%r2, %r31] | |
6784 | ba,a .+8 | |
6785 | jmpl %r27+0, %r27 | |
6786 | stxa %r12, [%r0] ASI_LSU_CONTROL | |
6787 | .word 0x97aac825 ! 429: FMOVGE fmovs %fcc1, %f5, %f11 | |
6788 | pmu_10_182: | |
6789 | nop | |
6790 | nop | |
6791 | setx 0xffffffb0ffffffaf, %g1, %g7 | |
6792 | .word 0xa3800007 ! 433: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
6793 | fpinit_10_184: | |
6794 | nop | |
6795 | setx fp_data_quads, %r19, %r20 | |
6796 | ldd [%r20], %f0 | |
6797 | ldd [%r20+8], %f4 | |
6798 | ld [%r20+16], %fsr | |
6799 | ld [%r20+24], %r19 | |
6800 | wr %r19, %g0, %gsr | |
6801 | .word 0x91a009c4 ! 437: FDIVd fdivd %f0, %f4, %f8 | |
6802 | .word 0xd68008a0 ! 441: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
6803 | .word 0xe4c7d060 ! 445: LDSWA_R ldswa [%r31, %r0] 0x83, %r18 | |
6804 | .word 0xe337c000 ! 449: STQF_R - %f17, [%r0, %r31] | |
6805 | nop | |
6806 | nop | |
6807 | ta T_CHANGE_HPRIV ! macro | |
6808 | donret_10_190: | |
6809 | rd %pc, %r12 | |
6810 | mov HIGHVA_HIGHNUM, %r10 | |
6811 | sllx %r10, 32, %r10 | |
6812 | or %r12, %r10, %r12 | |
6813 | add %r12, (donretarg_10_190-donret_10_190), %r12 | |
6814 | add %r12, 0x8, %r11 ! nonseq tnpc | |
6815 | wrpr %g0, 0x2, %tl | |
6816 | wrpr %g0, %r12, %tpc | |
6817 | wrpr %g0, %r11, %tnpc | |
6818 | set (0x00c9d900 | (0x89 << 24)), %r13 | |
6819 | and %r12, 0xfff, %r14 | |
6820 | sllx %r14, 32, %r14 | |
6821 | or %r13, %r14, %r20 | |
6822 | wrpr %r20, %g0, %tstate | |
6823 | wrhpr %g0, 0xb5f, %htstate | |
6824 | wrpr %g0, 0x1051, %pstate ! rand=0 (10) | |
6825 | retry | |
6826 | .align 512 | |
6827 | donretarg_10_190: | |
6828 | .word 0x0ec8c001 ! 453: BRGEZ brgez,pt %r3,<label_0x8c001> | |
6829 | splash_htba_10_193: | |
6830 | nop | |
6831 | ta T_CHANGE_HPRIV | |
6832 | setx 0x00000002002a0000, %r11, %r12 | |
6833 | .word 0x8b98000c ! 457: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
6834 | splash_htba_10_195: | |
6835 | nop | |
6836 | ta T_CHANGE_HPRIV | |
6837 | setx 0x0000000000280000, %r11, %r12 | |
6838 | .word 0x8b98000c ! 461: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
6839 | trapasi_10_197: | |
6840 | nop | |
6841 | mov 0x10, %r1 ! (VA for ASI 0x49) | |
6842 | .word 0xdad84920 ! 465: LDXA_R ldxa [%r1, %r0] 0x49, %r13 | |
6843 | #if (defined SPC || defined CMP1) | |
6844 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_200) + 32, 16, 16)) -> intp(4,0,8,,,,,1) | |
6845 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_10_200)&0xffffffff) + 16, 16, 16)) -> intp(4,0,17,,,,,1) | |
6846 | #else | |
6847 | set 0x88904970, %r28 | |
6848 | #if (MAX_THREADS == 8) | |
6849 | and %r28, 0x7ff, %r28 | |
6850 | #endif | |
6851 | stxa %r28, [%g0] 0x73 | |
6852 | #endif | |
6853 | intvec_10_200: | |
6854 | .word 0x39400001 ! 469: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6855 | .word 0xe1bfe000 ! 473: STDFA_I stda %f16, [0x0000, %r31] | |
6856 | .word 0x89800011 ! 477: WRTICK_R wr %r0, %r17, %tick | |
6857 | splash_hpstate_10_204: | |
6858 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
6859 | .word 0x819834fa ! 481: WRHPR_HPSTATE_I wrhpr %r0, 0x14fa, %hpstate | |
6860 | nop | |
6861 | nop | |
6862 | ta T_CHANGE_HPRIV ! macro | |
6863 | donret_10_206: | |
6864 | rd %pc, %r12 | |
6865 | mov HIGHVA_HIGHNUM, %r10 | |
6866 | sllx %r10, 32, %r10 | |
6867 | or %r12, %r10, %r12 | |
6868 | add %r12, (donretarg_10_206-donret_10_206+4), %r12 | |
6869 | add %r12, 0x4, %r11 ! seq tnpc | |
6870 | wrpr %g0, 0x2, %tl | |
6871 | wrpr %g0, %r12, %tpc | |
6872 | wrpr %g0, %r11, %tnpc | |
6873 | set (0x00295700 | (20 << 24)), %r13 | |
6874 | and %r12, 0xfff, %r14 | |
6875 | sllx %r14, 32, %r14 | |
6876 | or %r13, %r14, %r20 | |
6877 | wrpr %r20, %g0, %tstate | |
6878 | wrhpr %g0, 0x110d, %htstate | |
6879 | wrhpr %g0, 0x1441, %hpstate ! rand=1 (10) | |
6880 | ldx [%r12+%r0], %g1 | |
6881 | retry | |
6882 | donretarg_10_206: | |
6883 | .word 0xd66fe05b ! 485: LDSTUB_I ldstub %r11, [%r31 + 0x005b] | |
6884 | brcommon2_10_208: | |
6885 | nop | |
6886 | nop | |
6887 | setx common_target, %r12, %r27 | |
6888 | ba,a .+12 | |
6889 | .word 0x81dfc000 ! 1: FLUSH_R flush %r31, %r0, %r0 | |
6890 | ba,a .+8 | |
6891 | jmpl %r27-4, %r27 | |
6892 | .word 0xc19fc2c0 ! 489: LDDFA_R ldda [%r31, %r0], %f0 | |
6893 | splash_cmpr_10_210: | |
6894 | mov 1, %r18 | |
6895 | sllx %r18, 63, %r18 | |
6896 | rd %tick, %r17 | |
6897 | add %r17, 0x100, %r17 | |
6898 | or %r17, %r18, %r17 | |
6899 | ta T_CHANGE_HPRIV | |
6900 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
6901 | .word 0xb3800011 ! 493: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
6902 | .word 0x91950005 ! 497: WRPR_PIL_R wrpr %r20, %r5, %pil | |
6903 | nop | |
6904 | nop | |
6905 | ta T_CHANGE_PRIV | |
6906 | wrpr %g0, %g0, %gl | |
6907 | nop | |
6908 | nop | |
6909 | .text | |
6910 | setx join_lbl_0_0, %g1, %g2 | |
6911 | jmp %g2 | |
6912 | nop | |
6913 | fork_lbl_0_4: | |
6914 | wrhpr %g0, 0x9c1, %hpstate ! ta T_CHANGE_NONHPRIV | |
6915 | .word 0x91950013 ! 1: WRPR_PIL_R wrpr %r20, %r19, %pil | |
6916 | splash_htba_8_1: | |
6917 | nop | |
6918 | ta T_CHANGE_HPRIV | |
6919 | setx 0x00000002002a0000, %r11, %r12 | |
6920 | .word 0x8b98000c ! 5: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
6921 | splash_cmpr_8_4: | |
6922 | mov 1, %r18 | |
6923 | sllx %r18, 63, %r18 | |
6924 | rd %tick, %r17 | |
6925 | add %r17, 0x60, %r17 | |
6926 | or %r17, %r18, %r17 | |
6927 | ta T_CHANGE_HPRIV | |
6928 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
6929 | ta T_CHANGE_PRIV | |
6930 | .word 0xaf800011 ! 9: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
6931 | .word 0xd23fe0a8 ! 13: STD_I std %r9, [%r31 + 0x00a8] | |
6932 | jmptr_8_7: | |
6933 | nop | |
6934 | nop | |
6935 | best_set_reg(0xe1a00000, %r20, %r27) | |
6936 | .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27 | |
6937 | #if (defined SPC || defined CMP1) | |
6938 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_10) + 16, 16, 16)) -> intp(1,0,8,,,,,1) | |
6939 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_10)&0xffffffff) + 40, 16, 16)) -> intp(3,0,1,,,,,1) | |
6940 | #else | |
6941 | set 0xfe0011e0, %r28 | |
6942 | #if (MAX_THREADS == 8) | |
6943 | and %r28, 0x7ff, %r28 | |
6944 | #endif | |
6945 | stxa %r28, [%g0] 0x73 | |
6946 | #endif | |
6947 | intvec_8_10: | |
6948 | .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6949 | .word 0x12800001 ! 1: BNE bne <label_0x1> | |
6950 | .word 0x8d9030ff ! 25: WRPR_PSTATE_I wrpr %r0, 0x10ff, %pstate | |
6951 | nop | |
6952 | nop | |
6953 | ta T_CHANGE_HPRIV | |
6954 | mov 0x8, %r10 | |
6955 | set sync_thr_counter6, %r23 | |
6956 | #ifndef SPC | |
6957 | ldxa [%g0]0x63, %o1 | |
6958 | and %o1, 0x38, %o1 | |
6959 | add %o1, %r23, %r23 | |
6960 | #endif | |
6961 | cas [%r23],%g0,%r10 !lock | |
6962 | brnz %r10, sma_8_16 | |
6963 | rd %asi, %r12 | |
6964 | wr %g0, 0x40, %asi | |
6965 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
6966 | set 0x000a1fff, %l7 | |
6967 | stxa %l7, [%g0 + 0x80] %asi | |
6968 | wr %r12, %g0, %asi | |
6969 | st %g0, [%r23] | |
6970 | sma_8_16: | |
6971 | wrhpr %g0, 0xf50, %hpstate ! ta T_CHANGE_NONHPRIV | |
6972 | .word 0xe7e7d162 ! 29: CASA_I casa [%r31] 0x8b, %r2, %r19 | |
6973 | demap_8_17: | |
6974 | nop | |
6975 | mov 0x80, %g3 | |
6976 | ta T_CHANGE_HPRIV | |
6977 | stxa %r11, [%r0] ASI_LSU_CONTROL | |
6978 | stxa %g3, [%g3] 0x57 | |
6979 | stxa %g3, [%g3] 0x57 | |
6980 | stxa %g3, [%g3] 0x5f | |
6981 | stxa %g3, [%g3] 0x5f | |
6982 | stxa %g3, [%g3] 0x57 | |
6983 | stxa %g3, [%g3] 0x57 | |
6984 | stxa %g3, [%g3] 0x5f | |
6985 | stxa %g3, [%g3] 0x5f | |
6986 | wrhpr %g0, 0x1219, %hpstate ! ta T_CHANGE_NONHPRIV | |
6987 | .word 0xe61fe143 ! 33: LDD_I ldd [%r31 + 0x0143], %r19 | |
6988 | #if (defined SPC || defined CMP1) | |
6989 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_18) + 48, 16, 16)) -> intp(6,0,25,,,,,1) | |
6990 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_18)&0xffffffff) + 40, 16, 16)) -> intp(2,0,17,,,,,1) | |
6991 | #else | |
6992 | set 0x5280b169, %r28 | |
6993 | #if (MAX_THREADS == 8) | |
6994 | and %r28, 0x7ff, %r28 | |
6995 | #endif | |
6996 | stxa %r28, [%g0] 0x73 | |
6997 | #endif | |
6998 | intvec_8_18: | |
6999 | .word 0xa5b4c4c1 ! 37: FCMPNE32 fcmpne32 %d50, %d32, %r18 | |
7000 | splash_hpstate_8_21: | |
7001 | ta T_CHANGE_NONHPRIV | |
7002 | .word 0x17400001 ! 1: FBPGE fbge | |
7003 | .word 0x819835dd ! 41: WRHPR_HPSTATE_I wrhpr %r0, 0x15dd, %hpstate | |
7004 | demap_8_23: | |
7005 | nop | |
7006 | mov 0x80, %g3 | |
7007 | ta T_CHANGE_HPRIV | |
7008 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
7009 | stxa %g3, [%g3] 0x57 | |
7010 | stxa %g3, [%g3] 0x57 | |
7011 | stxa %g3, [%g3] 0x5f | |
7012 | stxa %g3, [%g3] 0x57 | |
7013 | stxa %g3, [%g3] 0x57 | |
7014 | stxa %g3, [%g3] 0x5f | |
7015 | wrhpr %g0, 0x819, %hpstate ! ta T_CHANGE_NONHPRIV | |
7016 | .word 0xe81fe079 ! 45: LDD_I ldd [%r31 + 0x0079], %r20 | |
7017 | fpinit_8_24: | |
7018 | nop | |
7019 | setx fp_data_quads, %r19, %r20 | |
7020 | ldd [%r20], %f0 | |
7021 | ldd [%r20+8], %f4 | |
7022 | ld [%r20+16], %fsr | |
7023 | ld [%r20+24], %r19 | |
7024 | wr %r19, %g0, %gsr | |
7025 | .word 0x91a009c4 ! 49: FDIVd fdivd %f0, %f4, %f8 | |
7026 | brcommon1_8_25: | |
7027 | nop | |
7028 | nop | |
7029 | setx common_target, %r12, %r27 | |
7030 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
7031 | ba,a .+12 | |
7032 | .word 0xa9b7c7c2 ! 1: PDIST pdistn %d62, %d2, %d20 | |
7033 | ba,a .+8 | |
7034 | jmpl %r27-4, %r27 | |
7035 | .word 0x00800001 ! 53: BN bn <label_0x1> | |
7036 | rd %tick, %r28 | |
7037 | #if (MAX_THREADS == 8) | |
7038 | sethi %hi(0x33800), %r27 | |
7039 | #else | |
7040 | sethi %hi(0x30000), %r27 | |
7041 | #endif | |
7042 | andn %r28, %r27, %r28 | |
7043 | ta T_CHANGE_HPRIV | |
7044 | stxa %r28, [%g0] 0x73 | |
7045 | .word 0xa3b4c4d2 ! 1: FCMPNE32 fcmpne32 %d50, %d18, %r17 | |
7046 | intvec_8_27: | |
7047 | .word 0xa1b404c1 ! 57: FCMPNE32 fcmpne32 %d16, %d32, %r16 | |
7048 | .word 0xe927c000 ! 61: STF_R st %f20, [%r0, %r31] | |
7049 | .word 0x91924013 ! 65: WRPR_PIL_R wrpr %r9, %r19, %pil | |
7050 | splash_cmpr_8_35: | |
7051 | mov 0, %r18 | |
7052 | sllx %r18, 63, %r18 | |
7053 | rd %tick, %r17 | |
7054 | add %r17, 0x100, %r17 | |
7055 | or %r17, %r18, %r17 | |
7056 | .word 0xb3800011 ! 69: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
7057 | jmptr_8_37: | |
7058 | nop | |
7059 | nop | |
7060 | best_set_reg(0xe0200000, %r20, %r27) | |
7061 | .word 0xb7c6c000 ! 73: JMPL_R jmpl %r27 + %r0, %r27 | |
7062 | jmptr_8_38: | |
7063 | nop | |
7064 | nop | |
7065 | best_set_reg(0xe0a00000, %r20, %r27) | |
7066 | .word 0xb7c6c000 ! 77: JMPL_R jmpl %r27 + %r0, %r27 | |
7067 | nop | |
7068 | nop | |
7069 | ta T_CHANGE_HPRIV | |
7070 | mov 0x8+1, %r10 | |
7071 | set sync_thr_counter5, %r23 | |
7072 | #ifndef SPC | |
7073 | ldxa [%g0]0x63, %o1 | |
7074 | and %o1, 0x38, %o1 | |
7075 | add %o1, %r23, %r23 | |
7076 | sllx %o1, 5, %o3 !(CID*256) | |
7077 | #endif | |
7078 | cas [%r23],%g0,%r10 !lock | |
7079 | brnz %r10, cwq_8_39 | |
7080 | rd %asi, %r12 | |
7081 | wr %g0, 0x40, %asi | |
7082 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
7083 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
7084 | cmp %l1, 1 | |
7085 | bne cwq_8_39 | |
7086 | set CWQ_BASE, %l6 | |
7087 | #ifndef SPC | |
7088 | add %l6, %o3, %l6 | |
7089 | #endif | |
7090 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
7091 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word | |
7092 | sllx %l2, 32, %l2 | |
7093 | stx %l2, [%l6 + 0x0] | |
7094 | membar #Sync | |
7095 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
7096 | sub %l2, 0x40, %l2 | |
7097 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
7098 | wr %r12, %g0, %asi | |
7099 | st %g0, [%r23] | |
7100 | cwq_8_39: | |
7101 | wrhpr %g0, 0xcd9, %hpstate ! ta T_CHANGE_NONHPRIV | |
7102 | .word 0xa5414000 ! 81: RDPC rd %pc, %r18 | |
7103 | nop | |
7104 | nop | |
7105 | ta T_CHANGE_HPRIV | |
7106 | mov 0x8, %r10 | |
7107 | set sync_thr_counter6, %r23 | |
7108 | #ifndef SPC | |
7109 | ldxa [%g0]0x63, %o1 | |
7110 | and %o1, 0x38, %o1 | |
7111 | add %o1, %r23, %r23 | |
7112 | #endif | |
7113 | cas [%r23],%g0,%r10 !lock | |
7114 | brnz %r10, sma_8_41 | |
7115 | rd %asi, %r12 | |
7116 | wr %g0, 0x40, %asi | |
7117 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
7118 | set 0x00021fff, %l7 | |
7119 | stxa %l7, [%g0 + 0x80] %asi | |
7120 | wr %r12, %g0, %asi | |
7121 | st %g0, [%r23] | |
7122 | sma_8_41: | |
7123 | wrhpr %g0, 0x1fc0, %hpstate ! ta T_CHANGE_NONHPRIV | |
7124 | .word 0xd5e7d043 ! 85: CASA_I casa [%r31] 0x82, %r3, %r10 | |
7125 | splash_cmpr_8_42: | |
7126 | mov 0, %r18 | |
7127 | sllx %r18, 63, %r18 | |
7128 | rd %tick, %r17 | |
7129 | add %r17, 0x70, %r17 | |
7130 | or %r17, %r18, %r17 | |
7131 | .word 0xaf800011 ! 89: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
7132 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> | |
7133 | .word 0x8d902325 ! 93: WRPR_PSTATE_I wrpr %r0, 0x0325, %pstate | |
7134 | .word 0xe00fe0e8 ! 97: LDUB_I ldub [%r31 + 0x00e8], %r16 | |
7135 | .word 0x89800011 ! 101: WRTICK_R wr %r0, %r17, %tick | |
7136 | bn skip_8_49 | |
7137 | stxa %r14, [%r0] ASI_LSU_CONTROL | |
7138 | .word 0x87a88a41 ! 1: FCMPd fcmpd %fcc<n>, %f2, %f32 | |
7139 | stxa %r12, [%r0] ASI_LSU_CONTROL | |
7140 | .align 128 | |
7141 | skip_8_49: | |
7142 | .word 0xc36fe076 ! 105: PREFETCH_I prefetch [%r31 + 0x0076], #one_read | |
7143 | br_badelay3_8_50: | |
7144 | .word 0x99a4c9d0 ! 1: FDIVd fdivd %f50, %f16, %f12 | |
7145 | .word 0x9964b007 ! Random illegal ? | |
7146 | .word 0x91a00553 ! 1: FSQRTd fsqrt | |
7147 | .word 0x97a4c832 ! 109: FADDs fadds %f19, %f18, %f11 | |
7148 | memptr_8_52: | |
7149 | set 0x60740000, %r31 | |
7150 | .word 0x8584e452 ! 113: WRCCR_I wr %r19, 0x0452, %ccr | |
7151 | demap_8_53: | |
7152 | nop | |
7153 | mov 0x80, %g3 | |
7154 | ta T_CHANGE_HPRIV | |
7155 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> | |
7156 | stxa %g3, [%g3] 0x5f | |
7157 | stxa %g3, [%g3] 0x57 | |
7158 | stxa %g3, [%g3] 0x5f | |
7159 | stxa %g3, [%g3] 0x57 | |
7160 | stxa %g3, [%g3] 0x57 | |
7161 | stxa %g3, [%g3] 0x57 | |
7162 | wrhpr %g0, 0x298, %hpstate ! ta T_CHANGE_NONHPRIV | |
7163 | .word 0xd81fe0dd ! 117: LDD_I ldd [%r31 + 0x00dd], %r12 | |
7164 | #if (defined SPC || defined CMP1) | |
7165 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_56) + 48, 16, 16)) -> intp(4,0,26,,,,,1) | |
7166 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_56)&0xffffffff) + 40, 16, 16)) -> intp(5,0,4,,,,,1) | |
7167 | #else | |
7168 | set 0x25302673, %r28 | |
7169 | #if (MAX_THREADS == 8) | |
7170 | and %r28, 0x7ff, %r28 | |
7171 | #endif | |
7172 | stxa %r28, [%g0] 0x73 | |
7173 | #endif | |
7174 | .word 0xa5b444c2 ! 1: FCMPNE32 fcmpne32 %d48, %d2, %r18 | |
7175 | intvec_8_56: | |
7176 | .word 0x9f8020ee ! 121: SIR sir 0x00ee | |
7177 | nop | |
7178 | nop | |
7179 | ta T_CHANGE_HPRIV ! macro | |
7180 | donret_8_58: | |
7181 | rd %pc, %r12 | |
7182 | mov HIGHVA_HIGHNUM, %r10 | |
7183 | sllx %r10, 32, %r10 | |
7184 | or %r12, %r10, %r12 | |
7185 | add %r12, (donretarg_8_58-donret_8_58), %r12 | |
7186 | add %r12, 0x8, %r11 ! nonseq tnpc | |
7187 | andn %r12, %r10, %r12 ! low VA tpc | |
7188 | wrpr %g0, 0x1, %tl | |
7189 | wrpr %g0, %r12, %tpc | |
7190 | wrpr %g0, %r11, %tnpc | |
7191 | set (0x00083d00 | (0x83 << 24)), %r13 | |
7192 | and %r12, 0xfff, %r14 | |
7193 | sllx %r14, 32, %r14 | |
7194 | or %r13, %r14, %r20 | |
7195 | wrpr %r20, %g0, %tstate | |
7196 | wrhpr %g0, 0xd07, %htstate | |
7197 | wrhpr %g0, 0x179a, %hpstate ! rand=1 (8) | |
7198 | ldx [%r12+%r0], %g1 | |
7199 | retry | |
7200 | .align 128 | |
7201 | donretarg_8_58: | |
7202 | .word 0x97a049c1 ! 125: FDIVd fdivd %f32, %f32, %f42 | |
7203 | .word 0x91940013 ! 129: WRPR_PIL_R wrpr %r16, %r19, %pil | |
7204 | fbule,a,pn %fcc0, skip_8_61 | |
7205 | fbl,a,pn %fcc0, skip_8_61 | |
7206 | .align 2048 | |
7207 | skip_8_61: | |
7208 | .word 0x24cc8001 ! 133: BRLEZ brlez,a,pt %r18,<label_0xc8001> | |
7209 | .word 0xda07c000 ! 137: LDUW_R lduw [%r31 + %r0], %r13 | |
7210 | splash_tba_8_64: | |
7211 | nop | |
7212 | ta T_CHANGE_PRIV | |
7213 | set 0x120000, %r12 | |
7214 | .word 0x8b90000c ! 141: WRPR_TBA_R wrpr %r0, %r12, %tba | |
7215 | .word 0xd81fc001 ! 145: LDD_R ldd [%r31 + %r1], %r12 | |
7216 | .word 0x9bb340f2 ! 149: EDGE16LN edge16ln %r13, %r18, %r13 | |
7217 | .word 0xa190200c ! 153: WRPR_GL_I wrpr %r0, 0x000c, %- | |
7218 | brcommon3_8_70: | |
7219 | nop | |
7220 | nop | |
7221 | setx common_target, %r12, %r27 | |
7222 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
7223 | ba,a .+12 | |
7224 | .word 0xe86fe190 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0190] | |
7225 | ba,a .+8 | |
7226 | jmpl %r27+0, %r27 | |
7227 | .word 0x81982694 ! 157: WRHPR_HPSTATE_I wrhpr %r0, 0x0694, %hpstate | |
7228 | brcommon1_8_71: | |
7229 | nop | |
7230 | nop | |
7231 | setx common_target, %r12, %r27 | |
7232 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
7233 | ba,a .+12 | |
7234 | .word 0xa9b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d20 | |
7235 | ba,a .+8 | |
7236 | jmpl %r27-0, %r27 | |
7237 | .word 0xa1b4c7d1 ! 161: PDIST pdistn %d50, %d48, %d16 | |
7238 | #if (defined SPC || defined CMP1) | |
7239 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_74) + 32, 16, 16)) -> intp(4,0,4,,,,,1) | |
7240 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_74)&0xffffffff) + 40, 16, 16)) -> intp(4,0,25,,,,,1) | |
7241 | #else | |
7242 | set 0x2080720e, %r28 | |
7243 | #if (MAX_THREADS == 8) | |
7244 | and %r28, 0x7ff, %r28 | |
7245 | #endif | |
7246 | stxa %r28, [%g0] 0x73 | |
7247 | #endif | |
7248 | .word 0xa3a409d2 ! 1: FDIVd fdivd %f16, %f18, %f48 | |
7249 | intvec_8_74: | |
7250 | .word 0xa5b404cd ! 165: FCMPNE32 fcmpne32 %d16, %d44, %r18 | |
7251 | bvs skip_8_76 | |
7252 | stxa %r10, [%r0] ASI_LSU_CONTROL | |
7253 | brlez,pt %r5, skip_8_76 | |
7254 | stxa %r16, [%r0] ASI_LSU_CONTROL | |
7255 | .align 512 | |
7256 | skip_8_76: | |
7257 | .word 0xd3e7c2e0 ! 169: CASA_I casa [%r31] 0x17, %r0, %r9 | |
7258 | .word 0xd22fe1b5 ! 173: STB_I stb %r9, [%r31 + 0x01b5] | |
7259 | .word 0x9190c012 ! 177: WRPR_PIL_R wrpr %r3, %r18, %pil | |
7260 | rd %tick, %r28 | |
7261 | #if (MAX_THREADS == 8) | |
7262 | sethi %hi(0x33800), %r27 | |
7263 | #else | |
7264 | sethi %hi(0x30000), %r27 | |
7265 | #endif | |
7266 | andn %r28, %r27, %r28 | |
7267 | ta T_CHANGE_HPRIV | |
7268 | stxa %r28, [%g0] 0x73 | |
7269 | .word 0x97b504d4 ! 1: FCMPNE32 fcmpne32 %d20, %d20, %r11 | |
7270 | intvec_8_81: | |
7271 | .word 0x9ba4c9c2 ! 181: FDIVd fdivd %f50, %f2, %f44 | |
7272 | jmptr_8_83: | |
7273 | nop | |
7274 | nop | |
7275 | best_set_reg(0xe1200000, %r20, %r27) | |
7276 | .word 0xb7c6c000 ! 185: JMPL_R jmpl %r27 + %r0, %r27 | |
7277 | .word 0xe19fde00 ! 189: LDDFA_R ldda [%r31, %r0], %f16 | |
7278 | .word 0x81d9c00d ! 193: FLUSH_R flush %r7, %r13, %r0 | |
7279 | jmptr_8_87: | |
7280 | nop | |
7281 | nop | |
7282 | best_set_reg(0xe1a00000, %r20, %r27) | |
7283 | .word 0xb7c6c000 ! 197: JMPL_R jmpl %r27 + %r0, %r27 | |
7284 | splash_lsu_8_89: | |
7285 | nop | |
7286 | nop | |
7287 | ta T_CHANGE_HPRIV | |
7288 | set 0x5f62af54, %r2 | |
7289 | mov 0x7, %r1 | |
7290 | sllx %r1, 32, %r1 | |
7291 | or %r1, %r2, %r2 | |
7292 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7293 | .word 0x1d400001 ! 201: FBPULE fbule | |
7294 | .word 0x8d902117 ! 205: WRPR_PSTATE_I wrpr %r0, 0x0117, %pstate | |
7295 | nop | |
7296 | nop | |
7297 | ta T_CHANGE_HPRIV ! macro | |
7298 | donret_8_92: | |
7299 | rd %pc, %r12 | |
7300 | mov HIGHVA_HIGHNUM, %r10 | |
7301 | sllx %r10, 32, %r10 | |
7302 | or %r12, %r10, %r12 | |
7303 | add %r12, (donretarg_8_92-donret_8_92), %r12 | |
7304 | add %r12, 0x8, %r11 ! nonseq tnpc | |
7305 | andn %r12, %r10, %r12 ! low VA tpc | |
7306 | wrpr %g0, 0x2, %tl | |
7307 | wrpr %g0, %r12, %tpc | |
7308 | wrpr %g0, %r11, %tnpc | |
7309 | set (0x0033c900 | (0x8a << 24)), %r13 | |
7310 | and %r12, 0xfff, %r14 | |
7311 | sllx %r14, 32, %r14 | |
7312 | or %r13, %r14, %r20 | |
7313 | wrpr %r20, %g0, %tstate | |
7314 | wrhpr %g0, 0x74d, %htstate | |
7315 | wrpr %g0, 0x1871, %pstate ! rand=0 (8) | |
7316 | .word 0x30800001 ! 1: BA ba,a <label_0x1> | |
7317 | ldx [%r12+%r0], %g1 | |
7318 | retry | |
7319 | donretarg_8_92: | |
7320 | .word 0x95a4c9d4 ! 209: FDIVd fdivd %f50, %f20, %f10 | |
7321 | #if (defined SPC || defined CMP1) | |
7322 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_94) + 24, 16, 16)) -> intp(2,0,29,,,,,1) | |
7323 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_94)&0xffffffff) + 24, 16, 16)) -> intp(4,0,0,,,,,1) | |
7324 | #else | |
7325 | set 0xcb0b312, %r28 | |
7326 | #if (MAX_THREADS == 8) | |
7327 | and %r28, 0x7ff, %r28 | |
7328 | #endif | |
7329 | stxa %r28, [%g0] 0x73 | |
7330 | #endif | |
7331 | intvec_8_94: | |
7332 | .word 0x97a489d3 ! 213: FDIVd fdivd %f18, %f50, %f42 | |
7333 | #if (defined SPC || defined CMP) | |
7334 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_8_96)+56, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1) | |
7335 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_8_96)&0xffffffff) + 48, 16, 16)) -> intp(mask2tid(0x8),1,3,,,,,1) | |
7336 | xir_8_96: | |
7337 | #else | |
7338 | #if (defined FC) | |
7339 | !! Generate XIR via RESET_GEN register | |
7340 | ta T_CHANGE_HPRIV | |
7341 | rdpr %pstate, %r18 | |
7342 | andn %r18, 0x208, %r18 ! Reset pstate.am,cle | |
7343 | wrpr %r18, %pstate | |
7344 | #ifndef XIR_RND_CORES | |
7345 | ldxa [%g0] 0x63, %o1 | |
7346 | mov 1, %r18 | |
7347 | sllx %r18, %o1, %r18 | |
7348 | #endif | |
7349 | mov 0x30, %r19 | |
7350 | setx 0x8900000808, %r16, %r17 | |
7351 | mov 0x2, %r16 | |
7352 | xir_8_96: | |
7353 | stxa %r18, [%r19] 0x41 | |
7354 | stx %r16, [%r17] | |
7355 | #endif | |
7356 | #endif | |
7357 | .word 0xa98522e6 ! 217: WR_SET_SOFTINT_I wr %r20, 0x02e6, %set_softint | |
7358 | .word 0x89800011 ! 221: WRTICK_R wr %r0, %r17, %tick | |
7359 | .word 0xd8ffe1c0 ! 225: SWAPA_I swapa %r12, [%r31 + 0x01c0] %asi | |
7360 | splash_hpstate_8_102: | |
7361 | .word 0x819821c7 ! 229: WRHPR_HPSTATE_I wrhpr %r0, 0x01c7, %hpstate | |
7362 | intveclr_8_105: | |
7363 | nop | |
7364 | nop | |
7365 | ta T_CHANGE_HPRIV | |
7366 | setx 0x5c688c4f1e6b4f21, %r1, %r28 | |
7367 | stxa %r28, [%g0] 0x72 | |
7368 | wrhpr %g0, 0xdda, %hpstate ! ta T_CHANGE_NONHPRIV | |
7369 | .word 0x25400001 ! 233: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7370 | splash_lsu_8_108: | |
7371 | nop | |
7372 | nop | |
7373 | ta T_CHANGE_HPRIV | |
7374 | set 0xbc806cab, %r2 | |
7375 | mov 0x5, %r1 | |
7376 | sllx %r1, 32, %r1 | |
7377 | or %r1, %r2, %r2 | |
7378 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7379 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7380 | nop | |
7381 | nop | |
7382 | ta T_CHANGE_HPRIV ! macro | |
7383 | donret_8_110: | |
7384 | rd %pc, %r12 | |
7385 | mov HIGHVA_HIGHNUM, %r10 | |
7386 | sllx %r10, 32, %r10 | |
7387 | or %r12, %r10, %r12 | |
7388 | add %r12, (donretarg_8_110-donret_8_110+4), %r12 | |
7389 | add %r12, 0x4, %r11 ! seq tnpc | |
7390 | wrpr %g0, 0x1, %tl | |
7391 | wrpr %g0, %r12, %tpc | |
7392 | wrpr %g0, %r11, %tnpc | |
7393 | set (0x00c83f00 | (0x83 << 24)), %r13 | |
7394 | and %r12, 0xfff, %r14 | |
7395 | sllx %r14, 32, %r14 | |
7396 | or %r13, %r14, %r20 | |
7397 | wrpr %r20, %g0, %tstate | |
7398 | wrhpr %g0, 0x1387, %htstate | |
7399 | wrpr %g0, 0x1e38, %pstate ! rand=0 (8) | |
7400 | ldx [%r12+%r0], %g1 | |
7401 | retry | |
7402 | .align 512 | |
7403 | donretarg_8_110: | |
7404 | .word 0x97a509c9 ! 241: FDIVd fdivd %f20, %f40, %f42 | |
7405 | .word 0xe83fc000 ! 245: STD_R std %r20, [%r31 + %r0] | |
7406 | .word 0xe8cfc280 ! 249: LDSBA_R ldsba [%r31, %r0] 0x14, %r20 | |
7407 | #if (defined SPC || defined CMP1) | |
7408 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_112) + 0, 16, 16)) -> intp(2,0,3,,,,,1) | |
7409 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_112)&0xffffffff) + 8, 16, 16)) -> intp(1,0,27,,,,,1) | |
7410 | #else | |
7411 | set 0x1c708f07, %r28 | |
7412 | #if (MAX_THREADS == 8) | |
7413 | and %r28, 0x7ff, %r28 | |
7414 | #endif | |
7415 | stxa %r28, [%g0] 0x73 | |
7416 | #endif | |
7417 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7418 | intvec_8_112: | |
7419 | .word 0x95a449c1 ! 253: FDIVd fdivd %f48, %f32, %f10 | |
7420 | .word 0xe037e04b ! 257: STH_I sth %r16, [%r31 + 0x004b] | |
7421 | .word 0xc30fc000 ! 261: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
7422 | jmptr_8_116: | |
7423 | nop | |
7424 | nop | |
7425 | best_set_reg(0xe0200000, %r20, %r27) | |
7426 | .word 0xb7c6c000 ! 265: JMPL_R jmpl %r27 + %r0, %r27 | |
7427 | splash_hpstate_8_117: | |
7428 | ta T_CHANGE_NONHPRIV | |
7429 | .word 0x26800001 ! 1: BL bl,a <label_0x1> | |
7430 | .word 0x81983e5f ! 269: WRHPR_HPSTATE_I wrhpr %r0, 0x1e5f, %hpstate | |
7431 | set 0x2d95, %l3 | |
7432 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
7433 | .word 0x95b287d2 ! 273: PDIST pdistn %d10, %d18, %d10 | |
7434 | splash_lsu_8_120: | |
7435 | nop | |
7436 | nop | |
7437 | ta T_CHANGE_HPRIV | |
7438 | set 0xb005b721, %r2 | |
7439 | mov 0x1, %r1 | |
7440 | sllx %r1, 32, %r1 | |
7441 | or %r1, %r2, %r2 | |
7442 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7443 | .word 0x3d400001 ! 277: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7444 | splash_hpstate_8_122: | |
7445 | .word 0x8198321f ! 281: WRHPR_HPSTATE_I wrhpr %r0, 0x121f, %hpstate | |
7446 | splash_lsu_8_124: | |
7447 | nop | |
7448 | nop | |
7449 | ta T_CHANGE_HPRIV | |
7450 | set 0xcefe143b, %r2 | |
7451 | mov 0x7, %r1 | |
7452 | sllx %r1, 32, %r1 | |
7453 | or %r1, %r2, %r2 | |
7454 | .word 0x26cc0001 ! 1: BRLZ brlz,a,pt %r16,<label_0xc0001> | |
7455 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7456 | .word 0x3d400001 ! 285: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7457 | .word 0xd4bfc280 ! 289: STDA_R stda %r10, [%r31 + %r0] 0x14 | |
7458 | .word 0xe3e7e002 ! 293: CASA_R casa [%r31] %asi, %r2, %r17 | |
7459 | .word 0xd047c000 ! 297: LDSW_R ldsw [%r31 + %r0], %r8 | |
7460 | brcommon3_8_129: | |
7461 | nop | |
7462 | nop | |
7463 | setx common_target, %r12, %r27 | |
7464 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
7465 | ba,a .+12 | |
7466 | .word 0xd06fe140 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0140] | |
7467 | ba,a .+8 | |
7468 | jmpl %r27+0, %r27 | |
7469 | .word 0x81983ca1 ! 301: WRHPR_HPSTATE_I wrhpr %r0, 0x1ca1, %hpstate | |
7470 | .word 0xe727e1b5 ! 305: STF_I st %f19, [0x01b5, %r31] | |
7471 | .word 0xa9b340f2 ! 309: EDGE16LN edge16ln %r13, %r18, %r20 | |
7472 | .word 0x9353c000 ! 313: RDPR_FQ <illegal instruction> | |
7473 | .word 0xe1bfdf20 ! 317: STDFA_R stda %f16, [%r0, %r31] | |
7474 | .word 0xe21fc003 ! 321: LDD_R ldd [%r31 + %r3], %r17 | |
7475 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick | |
7476 | .word 0xa7847601 ! 329: WR_GRAPHICS_STATUS_REG_I wr %r17, 0x1601, %- | |
7477 | .word 0xe127e1dc ! 333: STF_I st %f16, [0x01dc, %r31] | |
7478 | jmptr_8_140: | |
7479 | nop | |
7480 | nop | |
7481 | best_set_reg(0xe0a00000, %r20, %r27) | |
7482 | .word 0xb7c6c000 ! 337: JMPL_R jmpl %r27 + %r0, %r27 | |
7483 | .word 0xd8c7d160 ! 341: LDSWA_R ldswa [%r31, %r0] 0x8b, %r12 | |
7484 | .word 0x8d9026d6 ! 345: WRPR_PSTATE_I wrpr %r0, 0x06d6, %pstate | |
7485 | .word 0x91944002 ! 349: WRPR_PIL_R wrpr %r17, %r2, %pil | |
7486 | .word 0x99b140f3 ! 353: EDGE16LN edge16ln %r5, %r19, %r12 | |
7487 | jmptr_8_150: | |
7488 | nop | |
7489 | nop | |
7490 | best_set_reg(0xe1200000, %r20, %r27) | |
7491 | .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 | |
7492 | .word 0xe4800b40 ! 361: LDUWA_R lduwa [%r0, %r0] 0x5a, %r18 | |
7493 | .word 0xd337e14a ! 365: STQF_I - %f9, [0x014a, %r31] | |
7494 | jmptr_8_155: | |
7495 | nop | |
7496 | nop | |
7497 | best_set_reg(0xe1a00000, %r20, %r27) | |
7498 | .word 0xb7c6c000 ! 369: JMPL_R jmpl %r27 + %r0, %r27 | |
7499 | jmptr_8_159: | |
7500 | nop | |
7501 | nop | |
7502 | best_set_reg(0xe0200000, %r20, %r27) | |
7503 | .word 0xb7c6c000 ! 373: JMPL_R jmpl %r27 + %r0, %r27 | |
7504 | .word 0xe44fc000 ! 377: LDSB_R ldsb [%r31 + %r0], %r18 | |
7505 | .word 0xe3e7e003 ! 381: CASA_R casa [%r31] %asi, %r3, %r17 | |
7506 | rd %tick, %r28 | |
7507 | #if (MAX_THREADS == 8) | |
7508 | sethi %hi(0x33800), %r27 | |
7509 | #else | |
7510 | sethi %hi(0x30000), %r27 | |
7511 | #endif | |
7512 | andn %r28, %r27, %r28 | |
7513 | ta T_CHANGE_HPRIV | |
7514 | stxa %r28, [%g0] 0x73 | |
7515 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7516 | intvec_8_163: | |
7517 | .word 0x19400001 ! 385: FBPUGE fbuge | |
7518 | brcommon3_8_164: | |
7519 | nop | |
7520 | nop | |
7521 | setx common_target, %r12, %r27 | |
7522 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
7523 | ba,a .+12 | |
7524 | .word 0xe46fe150 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x0150] | |
7525 | ba,a .+8 | |
7526 | jmpl %r27+0, %r27 | |
7527 | .word 0x00800001 ! 389: BN bn <label_0x1> | |
7528 | .word 0xe48008a0 ! 393: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 | |
7529 | .word 0x8d903807 ! 397: WRPR_PSTATE_I wrpr %r0, 0x1807, %pstate | |
7530 | .word 0xe4c7d040 ! 401: LDSWA_R ldswa [%r31, %r0] 0x82, %r18 | |
7531 | splash_tba_8_171: | |
7532 | nop | |
7533 | ta T_CHANGE_PRIV | |
7534 | setx 0x00000004003a0000, %r11, %r12 | |
7535 | .word 0x8b90000c ! 405: WRPR_TBA_R wrpr %r0, %r12, %tba | |
7536 | brcommon1_8_173: | |
7537 | nop | |
7538 | nop | |
7539 | setx common_target, %r12, %r27 | |
7540 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
7541 | ba,a .+12 | |
7542 | .word 0xc32fe040 ! 1: STXFSR_I st-sfr %f1, [0x0040, %r31] | |
7543 | ba,a .+8 | |
7544 | jmpl %r27-4, %r27 | |
7545 | .word 0xa37029bd ! 409: POPC_I popc 0x09bd, %r17 | |
7546 | splash_lsu_8_175: | |
7547 | nop | |
7548 | nop | |
7549 | ta T_CHANGE_HPRIV | |
7550 | set 0x2b3f81b7, %r2 | |
7551 | mov 0x2, %r1 | |
7552 | sllx %r1, 32, %r1 | |
7553 | or %r1, %r2, %r2 | |
7554 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> | |
7555 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7556 | .word 0x1d400001 ! 413: FBPULE fbule | |
7557 | .word 0xc1bfe0e0 ! 417: STDFA_I stda %f0, [0x00e0, %r31] | |
7558 | .word 0xd897d140 ! 421: LDUHA_R lduha [%r31, %r0] 0x8a, %r12 | |
7559 | .word 0xda9fd003 ! 425: LDDA_R ldda [%r31, %r3] 0x80, %r13 | |
7560 | brcommon3_8_181: | |
7561 | nop | |
7562 | setx common_target, %r12, %r27 | |
7563 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
7564 | ba,a .+12 | |
7565 | .word 0xe537c001 ! 1: STQF_R - %f18, [%r1, %r31] | |
7566 | ba,a .+8 | |
7567 | jmpl %r27+0, %r27 | |
7568 | stxa %r20, [%r0] ASI_LSU_CONTROL | |
7569 | .word 0x91aac831 ! 429: FMOVGE fmovs %fcc1, %f17, %f8 | |
7570 | pmu_8_182: | |
7571 | nop | |
7572 | nop | |
7573 | setx 0xffffffb6ffffffa4, %g1, %g7 | |
7574 | .word 0xa3800007 ! 433: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
7575 | fpinit_8_184: | |
7576 | nop | |
7577 | setx fp_data_quads, %r19, %r20 | |
7578 | ldd [%r20], %f0 | |
7579 | ldd [%r20+8], %f4 | |
7580 | ld [%r20+16], %fsr | |
7581 | ld [%r20+24], %r19 | |
7582 | wr %r19, %g0, %gsr | |
7583 | .word 0x91a009c4 ! 437: FDIVd fdivd %f0, %f4, %f8 | |
7584 | .word 0xd68008a0 ! 441: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
7585 | .word 0xe4c7d060 ! 445: LDSWA_R ldswa [%r31, %r0] 0x83, %r18 | |
7586 | .word 0xe337c000 ! 449: STQF_R - %f17, [%r0, %r31] | |
7587 | nop | |
7588 | nop | |
7589 | ta T_CHANGE_HPRIV ! macro | |
7590 | donret_8_190: | |
7591 | rd %pc, %r12 | |
7592 | mov HIGHVA_HIGHNUM, %r10 | |
7593 | sllx %r10, 32, %r10 | |
7594 | or %r12, %r10, %r12 | |
7595 | add %r12, (donretarg_8_190-donret_8_190), %r12 | |
7596 | add %r12, 0x8, %r11 ! nonseq tnpc | |
7597 | wrpr %g0, 0x1, %tl | |
7598 | wrpr %g0, %r12, %tpc | |
7599 | wrpr %g0, %r11, %tnpc | |
7600 | set (0x0060e500 | (4 << 24)), %r13 | |
7601 | and %r12, 0xfff, %r14 | |
7602 | sllx %r14, 32, %r14 | |
7603 | or %r13, %r14, %r20 | |
7604 | wrpr %r20, %g0, %tstate | |
7605 | wrhpr %g0, 0x145f, %htstate | |
7606 | wrpr %g0, 0xceb, %pstate ! rand=0 (8) | |
7607 | retry | |
7608 | .align 512 | |
7609 | donretarg_8_190: | |
7610 | .word 0x30800001 ! 453: BA ba,a <label_0x1> | |
7611 | splash_htba_8_193: | |
7612 | nop | |
7613 | ta T_CHANGE_HPRIV | |
7614 | setx 0x0000000000280000, %r11, %r12 | |
7615 | .word 0x8b98000c ! 457: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
7616 | splash_htba_8_195: | |
7617 | nop | |
7618 | ta T_CHANGE_HPRIV | |
7619 | setx 0x00000000002a0000, %r11, %r12 | |
7620 | .word 0x8b98000c ! 461: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
7621 | trapasi_8_197: | |
7622 | nop | |
7623 | mov 0x10, %r1 ! (VA for ASI 0x49) | |
7624 | .word 0xdad84920 ! 465: LDXA_R ldxa [%r1, %r0] 0x49, %r13 | |
7625 | #if (defined SPC || defined CMP1) | |
7626 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_200) + 8, 16, 16)) -> intp(1,0,4,,,,,1) | |
7627 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_8_200)&0xffffffff) + 8, 16, 16)) -> intp(5,0,0,,,,,1) | |
7628 | #else | |
7629 | set 0xc410ea85, %r28 | |
7630 | #if (MAX_THREADS == 8) | |
7631 | and %r28, 0x7ff, %r28 | |
7632 | #endif | |
7633 | stxa %r28, [%g0] 0x73 | |
7634 | #endif | |
7635 | intvec_8_200: | |
7636 | .word 0x9f8038ff ! 469: SIR sir 0x18ff | |
7637 | .word 0xe1bfe0a0 ! 473: STDFA_I stda %f16, [0x00a0, %r31] | |
7638 | .word 0x89800011 ! 477: WRTICK_R wr %r0, %r17, %tick | |
7639 | splash_hpstate_8_204: | |
7640 | .word 0x26cd0001 ! 1: BRLZ brlz,a,pt %r20,<label_0xd0001> | |
7641 | .word 0x81982747 ! 481: WRHPR_HPSTATE_I wrhpr %r0, 0x0747, %hpstate | |
7642 | nop | |
7643 | nop | |
7644 | ta T_CHANGE_HPRIV ! macro | |
7645 | donret_8_206: | |
7646 | rd %pc, %r12 | |
7647 | mov HIGHVA_HIGHNUM, %r10 | |
7648 | sllx %r10, 32, %r10 | |
7649 | or %r12, %r10, %r12 | |
7650 | add %r12, (donretarg_8_206-donret_8_206+4), %r12 | |
7651 | add %r12, 0x4, %r11 ! seq tnpc | |
7652 | wrpr %g0, 0x1, %tl | |
7653 | wrpr %g0, %r12, %tpc | |
7654 | wrpr %g0, %r11, %tnpc | |
7655 | set (0x0073c600 | (0x80 << 24)), %r13 | |
7656 | and %r12, 0xfff, %r14 | |
7657 | sllx %r14, 32, %r14 | |
7658 | or %r13, %r14, %r20 | |
7659 | wrpr %r20, %g0, %tstate | |
7660 | wrhpr %g0, 0x1552, %htstate | |
7661 | wrhpr %g0, 0x1090, %hpstate ! rand=1 (8) | |
7662 | ldx [%r12+%r0], %g1 | |
7663 | retry | |
7664 | donretarg_8_206: | |
7665 | .word 0xd66fe145 ! 485: LDSTUB_I ldstub %r11, [%r31 + 0x0145] | |
7666 | brcommon2_8_208: | |
7667 | nop | |
7668 | nop | |
7669 | setx common_target, %r12, %r27 | |
7670 | ba,a .+12 | |
7671 | .word 0x99a0054a ! 1: FSQRTd fsqrt | |
7672 | ba,a .+8 | |
7673 | jmpl %r27-4, %r27 | |
7674 | .word 0xc19fdb60 ! 489: LDDFA_R ldda [%r31, %r0], %f0 | |
7675 | splash_cmpr_8_210: | |
7676 | mov 1, %r18 | |
7677 | sllx %r18, 63, %r18 | |
7678 | rd %tick, %r17 | |
7679 | add %r17, 0x70, %r17 | |
7680 | or %r17, %r18, %r17 | |
7681 | ta T_CHANGE_HPRIV | |
7682 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
7683 | .word 0xb3800011 ! 493: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
7684 | .word 0x91948001 ! 497: WRPR_PIL_R wrpr %r18, %r1, %pil | |
7685 | nop | |
7686 | nop | |
7687 | ta T_CHANGE_PRIV | |
7688 | wrpr %g0, %g0, %gl | |
7689 | nop | |
7690 | nop | |
7691 | .text | |
7692 | setx join_lbl_0_0, %g1, %g2 | |
7693 | jmp %g2 | |
7694 | nop | |
7695 | fork_lbl_0_3: | |
7696 | .word 0x20800001 ! 2: BN bn,a <label_0x1> | |
7697 | .word 0x91b7c4c1 ! 3: FCMPNE32 fcmpne32 %d62, %d32, %r8 | |
7698 | .word 0x9f802060 ! 4: SIR sir 0x0060 | |
7699 | .word 0x20800001 ! 5: BN bn,a <label_0x1> | |
7700 | .word 0xc3efe030 ! 5: PREFETCHA_I prefetcha [%r31, + 0x0030] %asi, #one_read | |
7701 | #if (defined SPC || defined CMP1) | |
7702 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_2) + 32, 16, 16)) -> intp(4,0,17,,,,,1) | |
7703 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_2)&0xffffffff) + 8, 16, 16)) -> intp(1,0,18,,,,,1) | |
7704 | #else | |
7705 | set 0xb8005897, %r28 | |
7706 | #if (MAX_THREADS == 8) | |
7707 | and %r28, 0x7ff, %r28 | |
7708 | #endif | |
7709 | stxa %r28, [%g0] 0x73 | |
7710 | #endif | |
7711 | .word 0xa7a409c3 ! 1: FDIVd fdivd %f16, %f34, %f50 | |
7712 | intvec_4_2: | |
7713 | rd %tick, %r28 | |
7714 | #if (MAX_THREADS == 8) | |
7715 | sethi %hi(0x33800), %r27 | |
7716 | #else | |
7717 | sethi %hi(0x30000), %r27 | |
7718 | #endif | |
7719 | andn %r28, %r27, %r28 | |
7720 | ta T_CHANGE_HPRIV | |
7721 | stxa %r28, [%g0] 0x73 | |
7722 | .word 0xa5b444cd ! 1: FCMPNE32 fcmpne32 %d48, %d44, %r18 | |
7723 | intvec_4_3: | |
7724 | .word 0x9f8024cd ! 6: SIR sir 0x04cd | |
7725 | .word 0xc1bfde00 ! 7: STDFA_R stda %f0, [%r0, %r31] | |
7726 | .word 0x19400001 ! 8: FBPUGE fbuge | |
7727 | .word 0x93b4c4c6 ! 9: FCMPNE32 fcmpne32 %d50, %d6, %r9 | |
7728 | .word 0xe1bfdf20 ! 9: STDFA_R stda %f16, [%r0, %r31] | |
7729 | memptr_4_5: | |
7730 | set 0x60340000, %r31 | |
7731 | .word 0xd3e7c280 ! 10: CASA_I casa [%r31] 0x14, %r0, %r9 | |
7732 | .word 0x8581a826 ! 11: WRCCR_I wr %r6, 0x0826, %ccr | |
7733 | .word 0x00800001 ! 12: BN bn <label_0x1> | |
7734 | .word 0x9f8021c0 ! 13: SIR sir 0x01c0 | |
7735 | .word 0x00800001 ! 13: BN bn <label_0x1> | |
7736 | memptr_4_6: | |
7737 | set user_data_start, %r31 | |
7738 | .word 0xe19fde00 ! 14: LDDFA_R ldda [%r31, %r0], %f16 | |
7739 | .word 0x85852cb6 ! 15: WRCCR_I wr %r20, 0x0cb6, %ccr | |
7740 | .word 0x00800001 ! 16: BN bn <label_0x1> | |
7741 | .word 0xe1bfd960 ! 17: STDFA_R stda %f16, [%r0, %r31] | |
7742 | .word 0xc1bfd960 ! 17: STDFA_R stda %f0, [%r0, %r31] | |
7743 | memptr_4_8: | |
7744 | set 0x60140000, %r31 | |
7745 | rd %tick, %r28 | |
7746 | #if (MAX_THREADS == 8) | |
7747 | sethi %hi(0x33800), %r27 | |
7748 | #else | |
7749 | sethi %hi(0x30000), %r27 | |
7750 | #endif | |
7751 | andn %r28, %r27, %r28 | |
7752 | ta T_CHANGE_HPRIV | |
7753 | stxa %r28, [%g0] 0x73 | |
7754 | .word 0x19400001 ! 1: FBPUGE fbuge | |
7755 | intvec_4_9: | |
7756 | .word 0xe6dfc283 ! 18: LDXA_R ldxa [%r31, %r3] 0x14, %r19 | |
7757 | .word 0x85843d01 ! 19: WRCCR_I wr %r16, 0x1d01, %ccr | |
7758 | .word 0x9f802c45 ! 20: SIR sir 0x0c45 | |
7759 | .word 0xd0dfd163 ! 21: LDXA_R ldxa [%r31, %r3] 0x8b, %r8 | |
7760 | .word 0x85846ec0 ! 21: WRCCR_I wr %r17, 0x0ec0, %ccr | |
7761 | rd %tick, %r28 | |
7762 | #if (MAX_THREADS == 8) | |
7763 | sethi %hi(0x33800), %r27 | |
7764 | #else | |
7765 | sethi %hi(0x30000), %r27 | |
7766 | #endif | |
7767 | andn %r28, %r27, %r28 | |
7768 | ta T_CHANGE_HPRIV | |
7769 | stxa %r28, [%g0] 0x73 | |
7770 | intvec_4_11: | |
7771 | #if (defined SPC || defined CMP1) | |
7772 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_12) + 32, 16, 16)) -> intp(4,0,24,,,,,1) | |
7773 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_12)&0xffffffff) + 48, 16, 16)) -> intp(4,0,7,,,,,1) | |
7774 | #else | |
7775 | set 0xf9006101, %r28 | |
7776 | #if (MAX_THREADS == 8) | |
7777 | and %r28, 0x7ff, %r28 | |
7778 | #endif | |
7779 | stxa %r28, [%g0] 0x73 | |
7780 | #endif | |
7781 | intvec_4_12: | |
7782 | .word 0x9bb184cd ! 22: FCMPNE32 fcmpne32 %d6, %d44, %r13 | |
7783 | .word 0xe1bfd960 ! 23: STDFA_R stda %f16, [%r0, %r31] | |
7784 | .word 0x95a1c9c8 ! 24: FDIVd fdivd %f38, %f8, %f10 | |
7785 | .word 0x9f8022ac ! 25: SIR sir 0x02ac | |
7786 | .word 0xe19fc3e0 ! 25: LDDFA_R ldda [%r31, %r0], %f16 | |
7787 | memptr_4_14: | |
7788 | set 0x60340000, %r31 | |
7789 | rd %tick, %r28 | |
7790 | #if (MAX_THREADS == 8) | |
7791 | sethi %hi(0x33800), %r27 | |
7792 | #else | |
7793 | sethi %hi(0x30000), %r27 | |
7794 | #endif | |
7795 | andn %r28, %r27, %r28 | |
7796 | ta T_CHANGE_HPRIV | |
7797 | stxa %r28, [%g0] 0x73 | |
7798 | intvec_4_15: | |
7799 | .word 0xe61fe170 ! 26: LDD_I ldd [%r31 + 0x0170], %r19 | |
7800 | .word 0x85827dcf ! 27: WRCCR_I wr %r9, 0x1dcf, %ccr | |
7801 | .word 0xa7b444cb ! 28: FCMPNE32 fcmpne32 %d48, %d42, %r19 | |
7802 | .word 0xe6dfd163 ! 29: LDXA_R ldxa [%r31, %r3] 0x8b, %r19 | |
7803 | .word 0x85843022 ! 29: WRCCR_I wr %r16, 0x1022, %ccr | |
7804 | .word 0xc19fde00 ! 30: LDDFA_R ldda [%r31, %r0], %f0 | |
7805 | .word 0xc19fd960 ! 31: LDDFA_R ldda [%r31, %r0], %f0 | |
7806 | .word 0xe1bfde00 ! 32: STDFA_R stda %f16, [%r0, %r31] | |
7807 | .word 0xe19fdb60 ! 33: LDDFA_R ldda [%r31, %r0], %f16 | |
7808 | .word 0x20800001 ! 33: BN bn,a <label_0x1> | |
7809 | .word 0xe7e7d040 ! 34: CASA_I casa [%r31] 0x82, %r0, %r19 | |
7810 | .word 0xa7a7c9c3 ! 35: FDIVd fdivd %f62, %f34, %f50 | |
7811 | .word 0xe1bfc3e0 ! 36: STDFA_R stda %f16, [%r0, %r31] | |
7812 | .word 0xe6dfdf00 ! 37: LDXA_R ldxa [%r31, %r0] 0xf8, %r19 | |
7813 | .word 0xc1bfd960 ! 37: STDFA_R stda %f0, [%r0, %r31] | |
7814 | rd %tick, %r28 | |
7815 | #if (MAX_THREADS == 8) | |
7816 | sethi %hi(0x33800), %r27 | |
7817 | #else | |
7818 | sethi %hi(0x30000), %r27 | |
7819 | #endif | |
7820 | andn %r28, %r27, %r28 | |
7821 | ta T_CHANGE_HPRIV | |
7822 | stxa %r28, [%g0] 0x73 | |
7823 | intvec_4_19: | |
7824 | memptr_4_20: | |
7825 | set 0x60740000, %r31 | |
7826 | .word 0x9f802311 ! 38: SIR sir 0x0311 | |
7827 | .word 0x85812c40 ! 39: WRCCR_I wr %r4, 0x0c40, %ccr | |
7828 | .word 0xe21fe090 ! 40: LDD_I ldd [%r31 + 0x0090], %r17 | |
7829 | .word 0x39400001 ! 41: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7830 | .word 0x8582284f ! 41: WRCCR_I wr %r8, 0x084f, %ccr | |
7831 | #if (defined SPC || defined CMP1) | |
7832 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_22) + 16, 16, 16)) -> intp(1,0,17,,,,,1) | |
7833 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_22)&0xffffffff) + 8, 16, 16)) -> intp(6,0,9,,,,,1) | |
7834 | #else | |
7835 | set 0x8770665e, %r28 | |
7836 | #if (MAX_THREADS == 8) | |
7837 | and %r28, 0x7ff, %r28 | |
7838 | #endif | |
7839 | stxa %r28, [%g0] 0x73 | |
7840 | #endif | |
7841 | intvec_4_22: | |
7842 | .word 0xe19fdb60 ! 42: LDDFA_R ldda [%r31, %r0], %f16 | |
7843 | .word 0x87afca43 ! 43: FCMPd fcmpd %fcc<n>, %f62, %f34 | |
7844 | .word 0x9f803368 ! 44: SIR sir 0x1368 | |
7845 | .word 0xe19fde00 ! 45: LDDFA_R ldda [%r31, %r0], %f16 | |
7846 | .word 0xa9a189d2 ! 45: FDIVd fdivd %f6, %f18, %f20 | |
7847 | .word 0xe1bfda00 ! 46: STDFA_R stda %f16, [%r0, %r31] | |
7848 | .word 0xe19fdf20 ! 47: LDDFA_R ldda [%r31, %r0], %f16 | |
7849 | .word 0xe9e7c242 ! 48: CASA_I casa [%r31] 0x12, %r2, %r20 | |
7850 | .word 0xe19fdb60 ! 49: LDDFA_R ldda [%r31, %r0], %f16 | |
7851 | .word 0xe83fe030 ! 49: STD_I std %r20, [%r31 + 0x0030] | |
7852 | .word 0xe93fe1c0 ! 50: STDF_I std %f20, [0x01c0, %r31] | |
7853 | .word 0xc1bfc3e0 ! 51: STDFA_R stda %f0, [%r0, %r31] | |
7854 | .word 0xc32fe190 ! 52: STXFSR_I st-sfr %f1, [0x0190, %r31] | |
7855 | .word 0xe9e7df02 ! 53: CASA_I casa [%r31] 0xf8, %r2, %r20 | |
7856 | .word 0xe1bfda00 ! 53: STDFA_R stda %f16, [%r0, %r31] | |
7857 | #if (defined SPC || defined CMP1) | |
7858 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_26) + 0, 16, 16)) -> intp(3,0,29,,,,,1) | |
7859 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_26)&0xffffffff) + 32, 16, 16)) -> intp(4,0,27,,,,,1) | |
7860 | #else | |
7861 | set 0x9108c9d, %r28 | |
7862 | #if (MAX_THREADS == 8) | |
7863 | and %r28, 0x7ff, %r28 | |
7864 | #endif | |
7865 | stxa %r28, [%g0] 0x73 | |
7866 | #endif | |
7867 | .word 0x99a189d0 ! 1: FDIVd fdivd %f6, %f16, %f12 | |
7868 | intvec_4_26: | |
7869 | .word 0xd297c3c2 ! 54: LDUHA_R lduha [%r31, %r2] 0x1e, %r9 | |
7870 | .word 0xd23fe150 ! 55: STD_I std %r9, [%r31 + 0x0150] | |
7871 | .word 0x95a4c9cc ! 56: FDIVd fdivd %f50, %f12, %f10 | |
7872 | .word 0xd4dfd920 ! 57: LDXA_R ldxa [%r31, %r0] 0xc9, %r10 | |
7873 | .word 0x39400001 ! 57: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7874 | #if (defined SPC || defined CMP1) | |
7875 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_28) + 56, 16, 16)) -> intp(5,0,24,,,,,1) | |
7876 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_28)&0xffffffff) + 48, 16, 16)) -> intp(5,0,18,,,,,1) | |
7877 | #else | |
7878 | set 0x2ba0569e, %r28 | |
7879 | #if (MAX_THREADS == 8) | |
7880 | and %r28, 0x7ff, %r28 | |
7881 | #endif | |
7882 | stxa %r28, [%g0] 0x73 | |
7883 | #endif | |
7884 | intvec_4_28: | |
7885 | memptr_4_29: | |
7886 | set 0x60340000, %r31 | |
7887 | #if (defined SPC || defined CMP1) | |
7888 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_30) + 48, 16, 16)) -> intp(5,0,23,,,,,1) | |
7889 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_30)&0xffffffff) + 24, 16, 16)) -> intp(1,0,21,,,,,1) | |
7890 | #else | |
7891 | set 0x1190cd79, %r28 | |
7892 | #if (MAX_THREADS == 8) | |
7893 | and %r28, 0x7ff, %r28 | |
7894 | #endif | |
7895 | stxa %r28, [%g0] 0x73 | |
7896 | #endif | |
7897 | .word 0xa1b444d4 ! 1: FCMPNE32 fcmpne32 %d48, %d20, %r16 | |
7898 | intvec_4_30: | |
7899 | .word 0xa9b1c4cc ! 58: FCMPNE32 fcmpne32 %d38, %d12, %r20 | |
7900 | .word 0x8583678f ! 59: WRCCR_I wr %r13, 0x078f, %ccr | |
7901 | .word 0x9f803dac ! 60: SIR sir 0x1dac | |
7902 | .word 0x99a109c1 ! 61: FDIVd fdivd %f4, %f32, %f12 | |
7903 | .word 0x85846338 ! 61: WRCCR_I wr %r17, 0x0338, %ccr | |
7904 | rd %tick, %r28 | |
7905 | #if (MAX_THREADS == 8) | |
7906 | sethi %hi(0x33800), %r27 | |
7907 | #else | |
7908 | sethi %hi(0x30000), %r27 | |
7909 | #endif | |
7910 | andn %r28, %r27, %r28 | |
7911 | ta T_CHANGE_HPRIV | |
7912 | stxa %r28, [%g0] 0x73 | |
7913 | .word 0xa9b444c5 ! 1: FCMPNE32 fcmpne32 %d48, %d36, %r20 | |
7914 | intvec_4_31: | |
7915 | .word 0x39400001 ! 62: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7916 | .word 0xa5b7c4c3 ! 63: FCMPNE32 fcmpne32 %d62, %d34, %r18 | |
7917 | .word 0xe19fdf20 ! 64: LDDFA_R ldda [%r31, %r0], %f16 | |
7918 | .word 0x39400001 ! 65: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7919 | .word 0xe9e7d100 ! 65: CASA_I casa [%r31] 0x88, %r0, %r20 | |
7920 | memptr_4_33: | |
7921 | set user_data_start, %r31 | |
7922 | #if (defined SPC || defined CMP1) | |
7923 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_34) + 24, 16, 16)) -> intp(2,0,2,,,,,1) | |
7924 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_34)&0xffffffff) + 40, 16, 16)) -> intp(3,0,29,,,,,1) | |
7925 | #else | |
7926 | set 0xaaf08a66, %r28 | |
7927 | #if (MAX_THREADS == 8) | |
7928 | and %r28, 0x7ff, %r28 | |
7929 | #endif | |
7930 | stxa %r28, [%g0] 0x73 | |
7931 | #endif | |
7932 | intvec_4_34: | |
7933 | .word 0xe897c720 ! 66: LDUHA_R lduha [%r31, %r0] 0x39, %r20 | |
7934 | .word 0x8584a1a7 ! 67: WRCCR_I wr %r18, 0x01a7, %ccr | |
7935 | .word 0x9f8024c5 ! 68: SIR sir 0x04c5 | |
7936 | .word 0xc3efe0b0 ! 69: PREFETCHA_I prefetcha [%r31, + 0x00b0] %asi, #one_read | |
7937 | .word 0x9f803613 ! 69: SIR sir 0x1613 | |
7938 | #if (defined SPC || defined CMP1) | |
7939 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_36) + 0, 16, 16)) -> intp(1,0,6,,,,,1) | |
7940 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_36)&0xffffffff) + 48, 16, 16)) -> intp(5,0,5,,,,,1) | |
7941 | #else | |
7942 | set 0xe1f09f16, %r28 | |
7943 | #if (MAX_THREADS == 8) | |
7944 | and %r28, 0x7ff, %r28 | |
7945 | #endif | |
7946 | stxa %r28, [%g0] 0x73 | |
7947 | #endif | |
7948 | intvec_4_36: | |
7949 | .word 0x99b044c8 ! 70: FCMPNE32 fcmpne32 %d32, %d8, %r12 | |
7950 | .word 0xc36fe100 ! 71: PREFETCH_I prefetch [%r31 + 0x0100], #one_read | |
7951 | .word 0xd9e7c381 ! 72: CASA_I casa [%r31] 0x1c, %r1, %r12 | |
7952 | .word 0xa9b344d1 ! 73: FCMPNE32 fcmpne32 %d44, %d48, %r20 | |
7953 | .word 0x39400001 ! 73: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7954 | .word 0xe83fe0d0 ! 74: STD_I std %r20, [%r31 + 0x00d0] | |
7955 | .word 0x87afca42 ! 75: FCMPd fcmpd %fcc<n>, %f62, %f2 | |
7956 | .word 0xe1bfc3e0 ! 76: STDFA_R stda %f16, [%r0, %r31] | |
7957 | .word 0x9f802010 ! 77: SIR sir 0x0010 | |
7958 | .word 0xc19fd960 ! 77: LDDFA_R ldda [%r31, %r0], %f0 | |
7959 | .word 0xe8dfc6c0 ! 78: LDXA_R ldxa [%r31, %r0] 0x36, %r20 | |
7960 | .word 0x87afca43 ! 79: FCMPd fcmpd %fcc<n>, %f62, %f34 | |
7961 | .word 0xe81fe080 ! 80: LDD_I ldd [%r31 + 0x0080], %r20 | |
7962 | .word 0xc32fe090 ! 81: STXFSR_I st-sfr %f1, [0x0090, %r31] | |
7963 | .word 0xa9b7c4c2 ! 81: FCMPNE32 fcmpne32 %d62, %d2, %r20 | |
7964 | memptr_4_40: | |
7965 | set 0x60740000, %r31 | |
7966 | .word 0xd49fc403 ! 82: LDDA_R ldda [%r31, %r3] 0x20, %r10 | |
7967 | .word 0x8584398e ! 83: WRCCR_I wr %r16, 0x198e, %ccr | |
7968 | .word 0xd5e7c540 ! 84: CASA_I casa [%r31] 0x2a, %r0, %r10 | |
7969 | .word 0xd49fc241 ! 85: LDDA_R ldda [%r31, %r1] 0x12, %r10 | |
7970 | .word 0xd497c723 ! 85: LDUHA_R lduha [%r31, %r3] 0x39, %r10 | |
7971 | .word 0xd43fe010 ! 86: STD_I std %r10, [%r31 + 0x0010] | |
7972 | .word 0xd43fe020 ! 87: STD_I std %r10, [%r31 + 0x0020] | |
7973 | .word 0xd43fe060 ! 88: STD_I std %r10, [%r31 + 0x0060] | |
7974 | .word 0xd53fe1a0 ! 89: STDF_I std %f10, [0x01a0, %r31] | |
7975 | .word 0x24cfc001 ! 89: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
7976 | .word 0x20800001 ! 90: BN bn,a <label_0x1> | |
7977 | .word 0xc19fd920 ! 91: LDDFA_R ldda [%r31, %r0], %f0 | |
7978 | .word 0x20800001 ! 92: BN bn,a <label_0x1> | |
7979 | .word 0xe1bfda00 ! 93: STDFA_R stda %f16, [%r0, %r31] | |
7980 | .word 0x20800001 ! 93: BN bn,a <label_0x1> | |
7981 | #if (defined SPC || defined CMP1) | |
7982 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_44) + 8, 16, 16)) -> intp(1,0,19,,,,,1) | |
7983 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_44)&0xffffffff) + 16, 16, 16)) -> intp(0,0,2,,,,,1) | |
7984 | #else | |
7985 | set 0x16b0c08f, %r28 | |
7986 | #if (MAX_THREADS == 8) | |
7987 | and %r28, 0x7ff, %r28 | |
7988 | #endif | |
7989 | stxa %r28, [%g0] 0x73 | |
7990 | #endif | |
7991 | .word 0xa5b104d2 ! 1: FCMPNE32 fcmpne32 %d4, %d18, %r18 | |
7992 | intvec_4_44: | |
7993 | memptr_4_45: | |
7994 | set user_data_start, %r31 | |
7995 | #if (defined SPC || defined CMP1) | |
7996 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_46) + 40, 16, 16)) -> intp(4,0,7,,,,,1) | |
7997 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_46)&0xffffffff) + 40, 16, 16)) -> intp(1,0,30,,,,,1) | |
7998 | #else | |
7999 | set 0xa4306efe, %r28 | |
8000 | #if (MAX_THREADS == 8) | |
8001 | and %r28, 0x7ff, %r28 | |
8002 | #endif | |
8003 | stxa %r28, [%g0] 0x73 | |
8004 | #endif | |
8005 | .word 0xa3a209c6 ! 1: FDIVd fdivd %f8, %f6, %f48 | |
8006 | intvec_4_46: | |
8007 | .word 0x39400001 ! 94: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8008 | .word 0x8584e264 ! 95: WRCCR_I wr %r19, 0x0264, %ccr | |
8009 | .word 0x39400001 ! 96: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8010 | .word 0xa1a289ca ! 97: FDIVd fdivd %f10, %f10, %f16 | |
8011 | .word 0x85852694 ! 97: WRCCR_I wr %r20, 0x0694, %ccr | |
8012 | rd %tick, %r28 | |
8013 | #if (MAX_THREADS == 8) | |
8014 | sethi %hi(0x33800), %r27 | |
8015 | #else | |
8016 | sethi %hi(0x30000), %r27 | |
8017 | #endif | |
8018 | andn %r28, %r27, %r28 | |
8019 | ta T_CHANGE_HPRIV | |
8020 | stxa %r28, [%g0] 0x73 | |
8021 | intvec_4_47: | |
8022 | .word 0x9f803755 ! 98: SIR sir 0x1755 | |
8023 | .word 0xe1bfc3e0 ! 99: STDFA_R stda %f16, [%r0, %r31] | |
8024 | .word 0xc1bfc3e0 ! 100: STDFA_R stda %f0, [%r0, %r31] | |
8025 | .word 0x9f802f37 ! 101: SIR sir 0x0f37 | |
8026 | .word 0xe19fd920 ! 101: LDDFA_R ldda [%r31, %r0], %f16 | |
8027 | .word 0xe41fe0e0 ! 102: LDD_I ldd [%r31 + 0x00e0], %r18 | |
8028 | .word 0xe43fe150 ! 103: STD_I std %r18, [%r31 + 0x0150] | |
8029 | .word 0xc19fdc00 ! 104: LDDFA_R ldda [%r31, %r0], %f0 | |
8030 | .word 0xe43fe010 ! 105: STD_I std %r18, [%r31 + 0x0010] | |
8031 | .word 0x20800001 ! 105: BN bn,a <label_0x1> | |
8032 | .word 0xe1bfdb60 ! 106: STDFA_R stda %f16, [%r0, %r31] | |
8033 | .word 0xa5a7c9c0 ! 107: FDIVd fdivd %f62, %f0, %f18 | |
8034 | .word 0xc19fdf20 ! 108: LDDFA_R ldda [%r31, %r0], %f0 | |
8035 | .word 0xc19fc2c0 ! 109: LDDFA_R ldda [%r31, %r0], %f0 | |
8036 | .word 0x87afca43 ! 109: FCMPd fcmpd %fcc<n>, %f62, %f34 | |
8037 | rd %tick, %r28 | |
8038 | #if (MAX_THREADS == 8) | |
8039 | sethi %hi(0x33800), %r27 | |
8040 | #else | |
8041 | sethi %hi(0x30000), %r27 | |
8042 | #endif | |
8043 | andn %r28, %r27, %r28 | |
8044 | ta T_CHANGE_HPRIV | |
8045 | stxa %r28, [%g0] 0x73 | |
8046 | .word 0x91b504d0 ! 1: FCMPNE32 fcmpne32 %d20, %d16, %r8 | |
8047 | intvec_4_51: | |
8048 | .word 0x91b444d3 ! 110: FCMPNE32 fcmpne32 %d48, %d50, %r8 | |
8049 | .word 0xc1bfde00 ! 111: STDFA_R stda %f0, [%r0, %r31] | |
8050 | .word 0xd03fe190 ! 112: STD_I std %r8, [%r31 + 0x0190] | |
8051 | .word 0x39400001 ! 113: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8052 | .word 0x20800001 ! 113: BN bn,a <label_0x1> | |
8053 | .word 0xc3efe030 ! 114: PREFETCHA_I prefetcha [%r31, + 0x0030] %asi, #one_read | |
8054 | .word 0xd1e7e002 ! 115: CASA_R casa [%r31] %asi, %r2, %r8 | |
8055 | .word 0xe1bfd960 ! 116: STDFA_R stda %f16, [%r0, %r31] | |
8056 | .word 0xc32fe0d0 ! 117: STXFSR_I st-sfr %f1, [0x00d0, %r31] | |
8057 | .word 0x87afca40 ! 117: FCMPd fcmpd %fcc<n>, %f62, %f0 | |
8058 | memptr_4_54: | |
8059 | set user_data_start, %r31 | |
8060 | rd %tick, %r28 | |
8061 | #if (MAX_THREADS == 8) | |
8062 | sethi %hi(0x33800), %r27 | |
8063 | #else | |
8064 | sethi %hi(0x30000), %r27 | |
8065 | #endif | |
8066 | andn %r28, %r27, %r28 | |
8067 | ta T_CHANGE_HPRIV | |
8068 | stxa %r28, [%g0] 0x73 | |
8069 | .word 0x9f802c07 ! 1: SIR sir 0x0c07 | |
8070 | intvec_4_55: | |
8071 | .word 0xd83fe0a0 ! 118: STD_I std %r12, [%r31 + 0x00a0] | |
8072 | .word 0x85842581 ! 119: WRCCR_I wr %r16, 0x0581, %ccr | |
8073 | .word 0xa9a109c8 ! 120: FDIVd fdivd %f4, %f8, %f20 | |
8074 | .word 0xe93fe1f0 ! 121: STDF_I std %f20, [0x01f0, %r31] | |
8075 | .word 0x95a449d2 ! 121: FDIVd fdivd %f48, %f18, %f10 | |
8076 | memptr_4_57: | |
8077 | set user_data_start, %r31 | |
8078 | .word 0xc19fdb60 ! 122: LDDFA_R ldda [%r31, %r0], %f0 | |
8079 | .word 0x85846296 ! 123: WRCCR_I wr %r17, 0x0296, %ccr | |
8080 | .word 0x9f802020 ! 124: SIR sir 0x0020 | |
8081 | .word 0xc1bfda00 ! 125: STDFA_R stda %f0, [%r0, %r31] | |
8082 | .word 0xe1e7c540 ! 125: CASA_I casa [%r31] 0x2a, %r0, %r16 | |
8083 | rd %tick, %r28 | |
8084 | #if (MAX_THREADS == 8) | |
8085 | sethi %hi(0x33800), %r27 | |
8086 | #else | |
8087 | sethi %hi(0x30000), %r27 | |
8088 | #endif | |
8089 | andn %r28, %r27, %r28 | |
8090 | ta T_CHANGE_HPRIV | |
8091 | stxa %r28, [%g0] 0x73 | |
8092 | intvec_4_59: | |
8093 | .word 0xa9b4c4c2 ! 126: FCMPNE32 fcmpne32 %d50, %d2, %r20 | |
8094 | .word 0x24cfc001 ! 127: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
8095 | .word 0x20800001 ! 128: BN bn,a <label_0x1> | |
8096 | .word 0x9ba0c9cd ! 129: FDIVd fdivd %f34, %f44, %f44 | |
8097 | .word 0xe1bfdc00 ! 129: STDFA_R stda %f16, [%r0, %r31] | |
8098 | .word 0xc32fe010 ! 130: STXFSR_I st-sfr %f1, [0x0010, %r31] | |
8099 | .word 0xe19fda00 ! 131: LDDFA_R ldda [%r31, %r0], %f16 | |
8100 | .word 0xda97d103 ! 132: LDUHA_R lduha [%r31, %r3] 0x88, %r13 | |
8101 | .word 0xc32fe1b0 ! 133: STXFSR_I st-sfr %f1, [0x01b0, %r31] | |
8102 | .word 0xc3efe090 ! 133: PREFETCHA_I prefetcha [%r31, + 0x0090] %asi, #one_read | |
8103 | .word 0xc19fc3e0 ! 134: LDDFA_R ldda [%r31, %r0], %f0 | |
8104 | .word 0xe19fc2c0 ! 135: LDDFA_R ldda [%r31, %r0], %f16 | |
8105 | .word 0x20800001 ! 136: BN bn,a <label_0x1> | |
8106 | .word 0xe1bfde00 ! 137: STDFA_R stda %f16, [%r0, %r31] | |
8107 | .word 0x20800001 ! 137: BN bn,a <label_0x1> | |
8108 | memptr_4_62: | |
8109 | set 0x60540000, %r31 | |
8110 | rd %tick, %r28 | |
8111 | #if (MAX_THREADS == 8) | |
8112 | sethi %hi(0x33800), %r27 | |
8113 | #else | |
8114 | sethi %hi(0x30000), %r27 | |
8115 | #endif | |
8116 | andn %r28, %r27, %r28 | |
8117 | ta T_CHANGE_HPRIV | |
8118 | stxa %r28, [%g0] 0x73 | |
8119 | intvec_4_63: | |
8120 | .word 0xc19fda00 ! 138: LDDFA_R ldda [%r31, %r0], %f0 | |
8121 | .word 0x8581ee3e ! 139: WRCCR_I wr %r7, 0x0e3e, %ccr | |
8122 | .word 0x39400001 ! 140: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8123 | .word 0xe1bfc3e0 ! 141: STDFA_R stda %f16, [%r0, %r31] | |
8124 | .word 0xa9a4c9d1 ! 141: FDIVd fdivd %f50, %f48, %f20 | |
8125 | memptr_4_65: | |
8126 | set 0x60540000, %r31 | |
8127 | #if (defined SPC || defined CMP1) | |
8128 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_66) + 8, 16, 16)) -> intp(7,0,16,,,,,1) | |
8129 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_66)&0xffffffff) + 0, 16, 16)) -> intp(4,0,31,,,,,1) | |
8130 | #else | |
8131 | set 0x2cd0cd67, %r28 | |
8132 | #if (MAX_THREADS == 8) | |
8133 | and %r28, 0x7ff, %r28 | |
8134 | #endif | |
8135 | stxa %r28, [%g0] 0x73 | |
8136 | #endif | |
8137 | intvec_4_66: | |
8138 | .word 0xe1bfc3e0 ! 142: STDFA_R stda %f16, [%r0, %r31] | |
8139 | .word 0x85826fec ! 143: WRCCR_I wr %r9, 0x0fec, %ccr | |
8140 | .word 0x39400001 ! 144: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8141 | .word 0xc1bfc3e0 ! 145: STDFA_R stda %f0, [%r0, %r31] | |
8142 | .word 0x85812563 ! 145: WRCCR_I wr %r4, 0x0563, %ccr | |
8143 | .word 0x9f802130 ! 146: SIR sir 0x0130 | |
8144 | .word 0x20800001 ! 147: BN bn,a <label_0x1> | |
8145 | .word 0xd897df03 ! 148: LDUHA_R lduha [%r31, %r3] 0xf8, %r12 | |
8146 | .word 0xd81fe070 ! 149: LDD_I ldd [%r31 + 0x0070], %r12 | |
8147 | .word 0xe19fdb60 ! 149: LDDFA_R ldda [%r31, %r0], %f16 | |
8148 | #if (defined SPC || defined CMP1) | |
8149 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_68) + 24, 16, 16)) -> intp(4,0,9,,,,,1) | |
8150 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_68)&0xffffffff) + 16, 16, 16)) -> intp(7,0,20,,,,,1) | |
8151 | #else | |
8152 | set 0xe3403ae8, %r28 | |
8153 | #if (MAX_THREADS == 8) | |
8154 | and %r28, 0x7ff, %r28 | |
8155 | #endif | |
8156 | stxa %r28, [%g0] 0x73 | |
8157 | #endif | |
8158 | .word 0x99a4c9d4 ! 1: FDIVd fdivd %f50, %f20, %f12 | |
8159 | intvec_4_68: | |
8160 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8161 | .word 0x87afca41 ! 151: FCMPd fcmpd %fcc<n>, %f62, %f32 | |
8162 | .word 0xe23fe1f0 ! 152: STD_I std %r17, [%r31 + 0x01f0] | |
8163 | .word 0x19400001 ! 153: FBPUGE fbuge | |
8164 | .word 0x04cfc001 ! 153: BRLEZ brlez,pt %r31,<label_0xfc001> | |
8165 | rd %tick, %r28 | |
8166 | #if (MAX_THREADS == 8) | |
8167 | sethi %hi(0x33800), %r27 | |
8168 | #else | |
8169 | sethi %hi(0x30000), %r27 | |
8170 | #endif | |
8171 | andn %r28, %r27, %r28 | |
8172 | ta T_CHANGE_HPRIV | |
8173 | stxa %r28, [%g0] 0x73 | |
8174 | intvec_4_69: | |
8175 | .word 0xe31fe080 ! 154: LDDF_I ldd [%r31, 0x0080], %f17 | |
8176 | .word 0xe19fde00 ! 155: LDDFA_R ldda [%r31, %r0], %f16 | |
8177 | .word 0xa9b084d3 ! 156: FCMPNE32 fcmpne32 %d2, %d50, %r20 | |
8178 | .word 0xe93fe140 ! 157: STDF_I std %f20, [0x0140, %r31] | |
8179 | .word 0x00800001 ! 157: BN bn <label_0x1> | |
8180 | .word 0x00800001 ! 158: BN bn <label_0x1> | |
8181 | .word 0xa9b7c4c3 ! 159: FCMPNE32 fcmpne32 %d62, %d34, %r20 | |
8182 | .word 0xe8dfd040 ! 160: LDXA_R ldxa [%r31, %r0] 0x82, %r20 | |
8183 | .word 0xc19fd920 ! 161: LDDFA_R ldda [%r31, %r0], %f0 | |
8184 | .word 0xe9e7e000 ! 161: CASA_R casa [%r31] %asi, %r0, %r20 | |
8185 | memptr_4_72: | |
8186 | set user_data_start, %r31 | |
8187 | rd %tick, %r28 | |
8188 | #if (MAX_THREADS == 8) | |
8189 | sethi %hi(0x33800), %r27 | |
8190 | #else | |
8191 | sethi %hi(0x30000), %r27 | |
8192 | #endif | |
8193 | andn %r28, %r27, %r28 | |
8194 | ta T_CHANGE_HPRIV | |
8195 | stxa %r28, [%g0] 0x73 | |
8196 | intvec_4_73: | |
8197 | .word 0xe19fd960 ! 162: LDDFA_R ldda [%r31, %r0], %f16 | |
8198 | .word 0x85832bcc ! 163: WRCCR_I wr %r12, 0x0bcc, %ccr | |
8199 | .word 0x97b404c8 ! 164: FCMPNE32 fcmpne32 %d16, %d8, %r11 | |
8200 | .word 0x00800001 ! 165: BN bn <label_0x1> | |
8201 | .word 0xa5b504cb ! 165: FCMPNE32 fcmpne32 %d20, %d42, %r18 | |
8202 | rd %tick, %r28 | |
8203 | #if (MAX_THREADS == 8) | |
8204 | sethi %hi(0x33800), %r27 | |
8205 | #else | |
8206 | sethi %hi(0x30000), %r27 | |
8207 | #endif | |
8208 | andn %r28, %r27, %r28 | |
8209 | ta T_CHANGE_HPRIV | |
8210 | stxa %r28, [%g0] 0x73 | |
8211 | .word 0x9f80365e ! 1: SIR sir 0x165e | |
8212 | intvec_4_75: | |
8213 | .word 0xd53fe170 ! 166: STDF_I std %f10, [0x0170, %r31] | |
8214 | .word 0x20800001 ! 167: BN bn,a <label_0x1> | |
8215 | .word 0xa9b504d3 ! 168: FCMPNE32 fcmpne32 %d20, %d50, %r20 | |
8216 | .word 0x9f802140 ! 169: SIR sir 0x0140 | |
8217 | .word 0x9f80237a ! 169: SIR sir 0x037a | |
8218 | rd %tick, %r28 | |
8219 | #if (MAX_THREADS == 8) | |
8220 | sethi %hi(0x33800), %r27 | |
8221 | #else | |
8222 | sethi %hi(0x30000), %r27 | |
8223 | #endif | |
8224 | andn %r28, %r27, %r28 | |
8225 | ta T_CHANGE_HPRIV | |
8226 | stxa %r28, [%g0] 0x73 | |
8227 | intvec_4_77: | |
8228 | memptr_4_78: | |
8229 | set user_data_start, %r31 | |
8230 | .word 0x9f802c1d ! 170: SIR sir 0x0c1d | |
8231 | .word 0x85832c89 ! 171: WRCCR_I wr %r12, 0x0c89, %ccr | |
8232 | .word 0xe1bfda00 ! 172: STDFA_R stda %f16, [%r0, %r31] | |
8233 | .word 0x9f80332d ! 173: SIR sir 0x132d | |
8234 | .word 0xc19fd960 ! 173: LDDFA_R ldda [%r31, %r0], %f0 | |
8235 | rd %tick, %r28 | |
8236 | #if (MAX_THREADS == 8) | |
8237 | sethi %hi(0x33800), %r27 | |
8238 | #else | |
8239 | sethi %hi(0x30000), %r27 | |
8240 | #endif | |
8241 | andn %r28, %r27, %r28 | |
8242 | ta T_CHANGE_HPRIV | |
8243 | stxa %r28, [%g0] 0x73 | |
8244 | intvec_4_79: | |
8245 | .word 0x91b304d0 ! 174: FCMPNE32 fcmpne32 %d12, %d16, %r8 | |
8246 | .word 0x87afca40 ! 175: FCMPd fcmpd %fcc<n>, %f62, %f0 | |
8247 | .word 0xc19fd920 ! 176: LDDFA_R ldda [%r31, %r0], %f0 | |
8248 | .word 0x19400001 ! 177: FBPUGE fbuge | |
8249 | .word 0xe1e7e001 ! 177: CASA_R casa [%r31] %asi, %r1, %r16 | |
8250 | .word 0xe11fe020 ! 178: LDDF_I ldd [%r31, 0x0020], %f16 | |
8251 | .word 0xc19fdc00 ! 179: LDDFA_R ldda [%r31, %r0], %f0 | |
8252 | .word 0xe01fe030 ! 180: LDD_I ldd [%r31 + 0x0030], %r16 | |
8253 | .word 0xe03fe190 ! 181: STD_I std %r16, [%r31 + 0x0190] | |
8254 | .word 0xc1bfdc00 ! 181: STDFA_R stda %f0, [%r0, %r31] | |
8255 | #if (defined SPC || defined CMP1) | |
8256 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_82) + 0, 16, 16)) -> intp(4,0,28,,,,,1) | |
8257 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_82)&0xffffffff) + 16, 16, 16)) -> intp(1,0,3,,,,,1) | |
8258 | #else | |
8259 | set 0xcc00d8c0, %r28 | |
8260 | #if (MAX_THREADS == 8) | |
8261 | and %r28, 0x7ff, %r28 | |
8262 | #endif | |
8263 | stxa %r28, [%g0] 0x73 | |
8264 | #endif | |
8265 | intvec_4_82: | |
8266 | .word 0x39400001 ! 182: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8267 | .word 0xe19fde00 ! 183: LDDFA_R ldda [%r31, %r0], %f16 | |
8268 | .word 0xc19fd920 ! 184: LDDFA_R ldda [%r31, %r0], %f0 | |
8269 | .word 0x9f80281f ! 185: SIR sir 0x081f | |
8270 | .word 0x20800001 ! 185: BN bn,a <label_0x1> | |
8271 | memptr_4_84: | |
8272 | set user_data_start, %r31 | |
8273 | .word 0xd71fe100 ! 186: LDDF_I ldd [%r31, 0x0100], %f11 | |
8274 | .word 0x8582277b ! 187: WRCCR_I wr %r8, 0x077b, %ccr | |
8275 | .word 0xd6dfc401 ! 188: LDXA_R ldxa [%r31, %r1] 0x20, %r11 | |
8276 | .word 0xc3efe1f0 ! 189: PREFETCHA_I prefetcha [%r31, + 0x01f0] %asi, #one_read | |
8277 | .word 0xd6dfd061 ! 189: LDXA_R ldxa [%r31, %r1] 0x83, %r11 | |
8278 | memptr_4_85: | |
8279 | set 0x60540000, %r31 | |
8280 | .word 0xd697c243 ! 190: LDUHA_R lduha [%r31, %r3] 0x12, %r11 | |
8281 | .word 0x8584a0ce ! 191: WRCCR_I wr %r18, 0x00ce, %ccr | |
8282 | .word 0xe19fc2c0 ! 192: LDDFA_R ldda [%r31, %r0], %f16 | |
8283 | .word 0xc3efe1e0 ! 193: PREFETCHA_I prefetcha [%r31, + 0x01e0] %asi, #one_read | |
8284 | .word 0x8584ef48 ! 193: WRCCR_I wr %r19, 0x0f48, %ccr | |
8285 | #if (defined SPC || defined CMP1) | |
8286 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_86) + 48, 16, 16)) -> intp(7,0,5,,,,,1) | |
8287 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_86)&0xffffffff) + 48, 16, 16)) -> intp(3,0,14,,,,,1) | |
8288 | #else | |
8289 | set 0xfb50a24b, %r28 | |
8290 | #if (MAX_THREADS == 8) | |
8291 | and %r28, 0x7ff, %r28 | |
8292 | #endif | |
8293 | stxa %r28, [%g0] 0x73 | |
8294 | #endif | |
8295 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8296 | intvec_4_86: | |
8297 | .word 0x93b044d4 ! 194: FCMPNE32 fcmpne32 %d32, %d20, %r9 | |
8298 | .word 0x93a7c9c2 ! 195: FDIVd fdivd %f62, %f2, %f40 | |
8299 | .word 0x20800001 ! 196: BN bn,a <label_0x1> | |
8300 | .word 0x19400001 ! 197: FBPUGE fbuge | |
8301 | .word 0xd3e7d042 ! 197: CASA_I casa [%r31] 0x82, %r2, %r9 | |
8302 | #if (defined SPC || defined CMP1) | |
8303 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_88) + 32, 16, 16)) -> intp(0,0,1,,,,,1) | |
8304 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_88)&0xffffffff) + 16, 16, 16)) -> intp(7,0,14,,,,,1) | |
8305 | #else | |
8306 | set 0x9c10b30a, %r28 | |
8307 | #if (MAX_THREADS == 8) | |
8308 | and %r28, 0x7ff, %r28 | |
8309 | #endif | |
8310 | stxa %r28, [%g0] 0x73 | |
8311 | #endif | |
8312 | intvec_4_88: | |
8313 | .word 0xa7b444cc ! 198: FCMPNE32 fcmpne32 %d48, %d12, %r19 | |
8314 | .word 0x20800001 ! 199: BN bn,a <label_0x1> | |
8315 | .word 0xe73fe0d0 ! 200: STDF_I std %f19, [0x00d0, %r31] | |
8316 | .word 0xa3a289c3 ! 201: FDIVd fdivd %f10, %f34, %f48 | |
8317 | .word 0xe19fdb60 ! 201: LDDFA_R ldda [%r31, %r0], %f16 | |
8318 | .word 0xc1bfdf20 ! 202: STDFA_R stda %f0, [%r0, %r31] | |
8319 | .word 0xa3b7c4c3 ! 203: FCMPNE32 fcmpne32 %d62, %d34, %r17 | |
8320 | .word 0xe297c401 ! 204: LDUHA_R lduha [%r31, %r1] 0x20, %r17 | |
8321 | .word 0x20800001 ! 205: BN bn,a <label_0x1> | |
8322 | .word 0x24cfc001 ! 205: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
8323 | memptr_4_91: | |
8324 | set 0x60340000, %r31 | |
8325 | .word 0xe19fda00 ! 206: LDDFA_R ldda [%r31, %r0], %f16 | |
8326 | .word 0x85832ea4 ! 207: WRCCR_I wr %r12, 0x0ea4, %ccr | |
8327 | .word 0xe2dfd061 ! 208: LDXA_R ldxa [%r31, %r1] 0x83, %r17 | |
8328 | .word 0x20800001 ! 209: BN bn,a <label_0x1> | |
8329 | .word 0x85827b92 ! 209: WRCCR_I wr %r9, 0x1b92, %ccr | |
8330 | memptr_4_93: | |
8331 | set user_data_start, %r31 | |
8332 | .word 0x20800001 ! 210: BN bn,a <label_0x1> | |
8333 | .word 0x85837bf2 ! 211: WRCCR_I wr %r13, 0x1bf2, %ccr | |
8334 | .word 0xc19fc2c0 ! 212: LDDFA_R ldda [%r31, %r0], %f0 | |
8335 | .word 0xe1bfd960 ! 213: STDFA_R stda %f16, [%r0, %r31] | |
8336 | .word 0x8581e435 ! 213: WRCCR_I wr %r7, 0x0435, %ccr | |
8337 | rd %tick, %r28 | |
8338 | #if (MAX_THREADS == 8) | |
8339 | sethi %hi(0x33800), %r27 | |
8340 | #else | |
8341 | sethi %hi(0x30000), %r27 | |
8342 | #endif | |
8343 | andn %r28, %r27, %r28 | |
8344 | ta T_CHANGE_HPRIV | |
8345 | stxa %r28, [%g0] 0x73 | |
8346 | intvec_4_95: | |
8347 | .word 0xe19fda00 ! 214: LDDFA_R ldda [%r31, %r0], %f16 | |
8348 | .word 0xd83fe150 ! 215: STD_I std %r12, [%r31 + 0x0150] | |
8349 | .word 0x95a189d2 ! 216: FDIVd fdivd %f6, %f18, %f10 | |
8350 | .word 0x20800001 ! 217: BN bn,a <label_0x1> | |
8351 | .word 0x95a7c9c1 ! 217: FDIVd fdivd %f62, %f32, %f10 | |
8352 | memptr_4_97: | |
8353 | set 0x60540000, %r31 | |
8354 | #if (defined SPC || defined CMP1) | |
8355 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_98) + 24, 16, 16)) -> intp(5,0,31,,,,,1) | |
8356 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_98)&0xffffffff) + 24, 16, 16)) -> intp(5,0,30,,,,,1) | |
8357 | #else | |
8358 | set 0x9fe06a4d, %r28 | |
8359 | #if (MAX_THREADS == 8) | |
8360 | and %r28, 0x7ff, %r28 | |
8361 | #endif | |
8362 | stxa %r28, [%g0] 0x73 | |
8363 | #endif | |
8364 | intvec_4_98: | |
8365 | .word 0x20800001 ! 218: BN bn,a <label_0x1> | |
8366 | .word 0x8584b1d9 ! 219: WRCCR_I wr %r18, 0x11d9, %ccr | |
8367 | .word 0x19400001 ! 220: FBPUGE fbuge | |
8368 | .word 0x00800001 ! 221: BN bn <label_0x1> | |
8369 | .word 0x19400001 ! 221: FBPUGE fbuge | |
8370 | #if (defined SPC || defined CMP1) | |
8371 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_100) + 56, 16, 16)) -> intp(5,0,29,,,,,1) | |
8372 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_100)&0xffffffff) + 0, 16, 16)) -> intp(3,0,0,,,,,1) | |
8373 | #else | |
8374 | set 0xbbc0652b, %r28 | |
8375 | #if (MAX_THREADS == 8) | |
8376 | and %r28, 0x7ff, %r28 | |
8377 | #endif | |
8378 | stxa %r28, [%g0] 0x73 | |
8379 | #endif | |
8380 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8381 | intvec_4_100: | |
8382 | memptr_4_101: | |
8383 | set 0x60340000, %r31 | |
8384 | .word 0x93b344c8 ! 222: FCMPNE32 fcmpne32 %d44, %d8, %r9 | |
8385 | .word 0x8580f0b7 ! 223: WRCCR_I wr %r3, 0x10b7, %ccr | |
8386 | .word 0xd3e7c382 ! 224: CASA_I casa [%r31] 0x1c, %r2, %r9 | |
8387 | .word 0x9f8022e9 ! 225: SIR sir 0x02e9 | |
8388 | .word 0x858121d9 ! 225: WRCCR_I wr %r4, 0x01d9, %ccr | |
8389 | .word 0xe19fde00 ! 226: LDDFA_R ldda [%r31, %r0], %f16 | |
8390 | .word 0x39400001 ! 227: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8391 | .word 0xd897d103 ! 228: LDUHA_R lduha [%r31, %r3] 0x88, %r12 | |
8392 | .word 0xe19fdb60 ! 229: LDDFA_R ldda [%r31, %r0], %f16 | |
8393 | .word 0xc3efe020 ! 229: PREFETCHA_I prefetcha [%r31, + 0x0020] %asi, #one_read | |
8394 | rd %tick, %r28 | |
8395 | #if (MAX_THREADS == 8) | |
8396 | sethi %hi(0x33800), %r27 | |
8397 | #else | |
8398 | sethi %hi(0x30000), %r27 | |
8399 | #endif | |
8400 | andn %r28, %r27, %r28 | |
8401 | ta T_CHANGE_HPRIV | |
8402 | stxa %r28, [%g0] 0x73 | |
8403 | .word 0xa7a4c9c4 ! 1: FDIVd fdivd %f50, %f4, %f50 | |
8404 | intvec_4_103: | |
8405 | memptr_4_104: | |
8406 | set 0x60140000, %r31 | |
8407 | .word 0x9f80264e ! 230: SIR sir 0x064e | |
8408 | .word 0x8584b82d ! 231: WRCCR_I wr %r18, 0x182d, %ccr | |
8409 | .word 0xe9e7d040 ! 232: CASA_I casa [%r31] 0x82, %r0, %r20 | |
8410 | .word 0xa5b304c6 ! 233: FCMPNE32 fcmpne32 %d12, %d6, %r18 | |
8411 | .word 0x858439b8 ! 233: WRCCR_I wr %r16, 0x19b8, %ccr | |
8412 | #if (defined SPC || defined CMP1) | |
8413 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_106) + 56, 16, 16)) -> intp(3,0,20,,,,,1) | |
8414 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_106)&0xffffffff) + 56, 16, 16)) -> intp(7,0,12,,,,,1) | |
8415 | #else | |
8416 | set 0x89400d47, %r28 | |
8417 | #if (MAX_THREADS == 8) | |
8418 | and %r28, 0x7ff, %r28 | |
8419 | #endif | |
8420 | stxa %r28, [%g0] 0x73 | |
8421 | #endif | |
8422 | intvec_4_106: | |
8423 | rd %tick, %r28 | |
8424 | #if (MAX_THREADS == 8) | |
8425 | sethi %hi(0x33800), %r27 | |
8426 | #else | |
8427 | sethi %hi(0x30000), %r27 | |
8428 | #endif | |
8429 | andn %r28, %r27, %r28 | |
8430 | ta T_CHANGE_HPRIV | |
8431 | stxa %r28, [%g0] 0x73 | |
8432 | intvec_4_107: | |
8433 | .word 0x97a149cd ! 234: FDIVd fdivd %f36, %f44, %f42 | |
8434 | .word 0x20800001 ! 235: BN bn,a <label_0x1> | |
8435 | .word 0xa7b284d0 ! 236: FCMPNE32 fcmpne32 %d10, %d16, %r19 | |
8436 | .word 0xa7b484c8 ! 237: FCMPNE32 fcmpne32 %d18, %d8, %r19 | |
8437 | .word 0xe19fde00 ! 237: LDDFA_R ldda [%r31, %r0], %f16 | |
8438 | memptr_4_109: | |
8439 | set 0x60340000, %r31 | |
8440 | .word 0xc1bfd920 ! 238: STDFA_R stda %f0, [%r0, %r31] | |
8441 | .word 0x858375b9 ! 239: WRCCR_I wr %r13, 0x15b9, %ccr | |
8442 | .word 0xe1bfde00 ! 240: STDFA_R stda %f16, [%r0, %r31] | |
8443 | .word 0xc1bfdf20 ! 241: STDFA_R stda %f0, [%r0, %r31] | |
8444 | .word 0x85812ef6 ! 241: WRCCR_I wr %r4, 0x0ef6, %ccr | |
8445 | memptr_4_111: | |
8446 | set user_data_start, %r31 | |
8447 | .word 0xe19fdf20 ! 242: LDDFA_R ldda [%r31, %r0], %f16 | |
8448 | .word 0x8584e2a9 ! 243: WRCCR_I wr %r19, 0x02a9, %ccr | |
8449 | .word 0xe1bfc2c0 ! 244: STDFA_R stda %f16, [%r0, %r31] | |
8450 | .word 0xc19fda00 ! 245: LDDFA_R ldda [%r31, %r0], %f0 | |
8451 | .word 0xe19fd960 ! 245: LDDFA_R ldda [%r31, %r0], %f16 | |
8452 | .word 0xc19fdf20 ! 246: LDDFA_R ldda [%r31, %r0], %f0 | |
8453 | .word 0x39400001 ! 247: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8454 | .word 0x9f802120 ! 248: SIR sir 0x0120 | |
8455 | .word 0xe1bfda00 ! 249: STDFA_R stda %f16, [%r0, %r31] | |
8456 | .word 0x39400001 ! 249: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8457 | .word 0x20800001 ! 250: BN bn,a <label_0x1> | |
8458 | .word 0xe19fd960 ! 251: LDDFA_R ldda [%r31, %r0], %f16 | |
8459 | .word 0xe19fde00 ! 252: LDDFA_R ldda [%r31, %r0], %f16 | |
8460 | .word 0xe1bfd960 ! 253: STDFA_R stda %f16, [%r0, %r31] | |
8461 | .word 0xc19fde00 ! 253: LDDFA_R ldda [%r31, %r0], %f0 | |
8462 | .word 0xc19fdc00 ! 254: LDDFA_R ldda [%r31, %r0], %f0 | |
8463 | .word 0xc19fd960 ! 255: LDDFA_R ldda [%r31, %r0], %f0 | |
8464 | .word 0xe41fe000 ! 256: LDD_I ldd [%r31 + 0x0000], %r18 | |
8465 | .word 0x20800001 ! 257: BN bn,a <label_0x1> | |
8466 | .word 0xe1bfd960 ! 257: STDFA_R stda %f16, [%r0, %r31] | |
8467 | rd %tick, %r28 | |
8468 | #if (MAX_THREADS == 8) | |
8469 | sethi %hi(0x33800), %r27 | |
8470 | #else | |
8471 | sethi %hi(0x30000), %r27 | |
8472 | #endif | |
8473 | andn %r28, %r27, %r28 | |
8474 | ta T_CHANGE_HPRIV | |
8475 | stxa %r28, [%g0] 0x73 | |
8476 | intvec_4_113: | |
8477 | #if (defined SPC || defined CMP1) | |
8478 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_114) + 16, 16, 16)) -> intp(6,0,25,,,,,1) | |
8479 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_114)&0xffffffff) + 16, 16, 16)) -> intp(6,0,5,,,,,1) | |
8480 | #else | |
8481 | set 0xc35011c9, %r28 | |
8482 | #if (MAX_THREADS == 8) | |
8483 | and %r28, 0x7ff, %r28 | |
8484 | #endif | |
8485 | stxa %r28, [%g0] 0x73 | |
8486 | #endif | |
8487 | .word 0x19400001 ! 1: FBPUGE fbuge | |
8488 | intvec_4_114: | |
8489 | .word 0x9f803de9 ! 258: SIR sir 0x1de9 | |
8490 | .word 0xa1a7c9c1 ! 259: FDIVd fdivd %f62, %f32, %f16 | |
8491 | .word 0xa3b344d1 ! 260: FCMPNE32 fcmpne32 %d44, %d48, %r17 | |
8492 | .word 0x39400001 ! 261: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8493 | .word 0x9f803b4d ! 261: SIR sir 0x1b4d | |
8494 | rd %tick, %r28 | |
8495 | #if (MAX_THREADS == 8) | |
8496 | sethi %hi(0x33800), %r27 | |
8497 | #else | |
8498 | sethi %hi(0x30000), %r27 | |
8499 | #endif | |
8500 | andn %r28, %r27, %r28 | |
8501 | ta T_CHANGE_HPRIV | |
8502 | stxa %r28, [%g0] 0x73 | |
8503 | intvec_4_115: | |
8504 | .word 0xe69fc3c1 ! 262: LDDA_R ldda [%r31, %r1] 0x1e, %r19 | |
8505 | .word 0x39400001 ! 263: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8506 | .word 0x9f803228 ! 264: SIR sir 0x1228 | |
8507 | .word 0xd3e7c542 ! 265: CASA_I casa [%r31] 0x2a, %r2, %r9 | |
8508 | .word 0x87afca41 ! 265: FCMPd fcmpd %fcc<n>, %f62, %f32 | |
8509 | .word 0xd33fe110 ! 266: STDF_I std %f9, [0x0110, %r31] | |
8510 | .word 0xc1bfc2c0 ! 267: STDFA_R stda %f0, [%r0, %r31] | |
8511 | .word 0xd2dfc723 ! 268: LDXA_R ldxa [%r31, %r3] 0x39, %r9 | |
8512 | .word 0xd3e7d162 ! 269: CASA_I casa [%r31] 0x8b, %r2, %r9 | |
8513 | .word 0x9f8020c0 ! 269: SIR sir 0x00c0 | |
8514 | #if (defined SPC || defined CMP1) | |
8515 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_118) + 0, 16, 16)) -> intp(1,0,30,,,,,1) | |
8516 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_118)&0xffffffff) + 0, 16, 16)) -> intp(7,0,15,,,,,1) | |
8517 | #else | |
8518 | set 0x7cd02c43, %r28 | |
8519 | #if (MAX_THREADS == 8) | |
8520 | and %r28, 0x7ff, %r28 | |
8521 | #endif | |
8522 | stxa %r28, [%g0] 0x73 | |
8523 | #endif | |
8524 | intvec_4_118: | |
8525 | rd %tick, %r28 | |
8526 | #if (MAX_THREADS == 8) | |
8527 | sethi %hi(0x33800), %r27 | |
8528 | #else | |
8529 | sethi %hi(0x30000), %r27 | |
8530 | #endif | |
8531 | andn %r28, %r27, %r28 | |
8532 | ta T_CHANGE_HPRIV | |
8533 | stxa %r28, [%g0] 0x73 | |
8534 | .word 0x99b484c9 ! 1: FCMPNE32 fcmpne32 %d18, %d40, %r12 | |
8535 | intvec_4_119: | |
8536 | .word 0x93a249d3 ! 270: FDIVd fdivd %f40, %f50, %f40 | |
8537 | .word 0x24cfc001 ! 271: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
8538 | .word 0x19400001 ! 272: FBPUGE fbuge | |
8539 | .word 0x9f8037b1 ! 273: SIR sir 0x17b1 | |
8540 | .word 0xe5e7c542 ! 273: CASA_I casa [%r31] 0x2a, %r2, %r18 | |
8541 | .word 0xe1bfd920 ! 274: STDFA_R stda %f16, [%r0, %r31] | |
8542 | .word 0xe03fe140 ! 275: STD_I std %r16, [%r31 + 0x0140] | |
8543 | .word 0xc1bfde00 ! 276: STDFA_R stda %f0, [%r0, %r31] | |
8544 | .word 0xe1bfdb60 ! 277: STDFA_R stda %f16, [%r0, %r31] | |
8545 | .word 0x87afca43 ! 277: FCMPd fcmpd %fcc<n>, %f62, %f34 | |
8546 | rd %tick, %r28 | |
8547 | #if (MAX_THREADS == 8) | |
8548 | sethi %hi(0x33800), %r27 | |
8549 | #else | |
8550 | sethi %hi(0x30000), %r27 | |
8551 | #endif | |
8552 | andn %r28, %r27, %r28 | |
8553 | ta T_CHANGE_HPRIV | |
8554 | stxa %r28, [%g0] 0x73 | |
8555 | intvec_4_121: | |
8556 | .word 0x91a409ca ! 278: FDIVd fdivd %f16, %f10, %f8 | |
8557 | .word 0x91a7c9c3 ! 279: FDIVd fdivd %f62, %f34, %f8 | |
8558 | .word 0x20800001 ! 280: BN bn,a <label_0x1> | |
8559 | .word 0x97a489cd ! 281: FDIVd fdivd %f18, %f44, %f42 | |
8560 | .word 0xc1bfd960 ! 281: STDFA_R stda %f0, [%r0, %r31] | |
8561 | rd %tick, %r28 | |
8562 | #if (MAX_THREADS == 8) | |
8563 | sethi %hi(0x33800), %r27 | |
8564 | #else | |
8565 | sethi %hi(0x30000), %r27 | |
8566 | #endif | |
8567 | andn %r28, %r27, %r28 | |
8568 | ta T_CHANGE_HPRIV | |
8569 | stxa %r28, [%g0] 0x73 | |
8570 | intvec_4_123: | |
8571 | .word 0x20800001 ! 282: BN bn,a <label_0x1> | |
8572 | .word 0xd7e7d063 ! 283: CASA_I casa [%r31] 0x83, %r3, %r11 | |
8573 | .word 0x95a189d3 ! 284: FDIVd fdivd %f6, %f50, %f10 | |
8574 | .word 0xe1bfd920 ! 285: STDFA_R stda %f16, [%r0, %r31] | |
8575 | .word 0xd43fe040 ! 285: STD_I std %r10, [%r31 + 0x0040] | |
8576 | .word 0xc1bfd920 ! 286: STDFA_R stda %f0, [%r0, %r31] | |
8577 | .word 0x87afca43 ! 287: FCMPd fcmpd %fcc<n>, %f62, %f34 | |
8578 | .word 0x20800001 ! 288: BN bn,a <label_0x1> | |
8579 | .word 0xc1bfde00 ! 289: STDFA_R stda %f0, [%r0, %r31] | |
8580 | .word 0xc19fdf20 ! 289: LDDFA_R ldda [%r31, %r0], %f0 | |
8581 | memptr_4_126: | |
8582 | set user_data_start, %r31 | |
8583 | .word 0xc19fdf20 ! 290: LDDFA_R ldda [%r31, %r0], %f0 | |
8584 | .word 0x8580b84f ! 291: WRCCR_I wr %r2, 0x184f, %ccr | |
8585 | .word 0xc19fdb60 ! 292: LDDFA_R ldda [%r31, %r0], %f0 | |
8586 | .word 0x20800001 ! 293: BN bn,a <label_0x1> | |
8587 | .word 0x8584e323 ! 293: WRCCR_I wr %r19, 0x0323, %ccr | |
8588 | rd %tick, %r28 | |
8589 | #if (MAX_THREADS == 8) | |
8590 | sethi %hi(0x33800), %r27 | |
8591 | #else | |
8592 | sethi %hi(0x30000), %r27 | |
8593 | #endif | |
8594 | andn %r28, %r27, %r28 | |
8595 | ta T_CHANGE_HPRIV | |
8596 | stxa %r28, [%g0] 0x73 | |
8597 | .word 0x9f803c06 ! 1: SIR sir 0x1c06 | |
8598 | intvec_4_127: | |
8599 | .word 0x91b084d0 ! 294: FCMPNE32 fcmpne32 %d2, %d16, %r8 | |
8600 | .word 0xd03fe1c0 ! 295: STD_I std %r8, [%r31 + 0x01c0] | |
8601 | .word 0xd13fe180 ! 296: STDF_I std %f8, [0x0180, %r31] | |
8602 | .word 0x91a209cc ! 297: FDIVd fdivd %f8, %f12, %f8 | |
8603 | .word 0xd1e7d003 ! 297: CASA_I casa [%r31] 0x80, %r3, %r8 | |
8604 | memptr_4_128: | |
8605 | set 0x60140000, %r31 | |
8606 | .word 0xd097c540 ! 298: LDUHA_R lduha [%r31, %r0] 0x2a, %r8 | |
8607 | .word 0x8580b699 ! 299: WRCCR_I wr %r2, 0x1699, %ccr | |
8608 | .word 0xd0dfd060 ! 300: LDXA_R ldxa [%r31, %r0] 0x83, %r8 | |
8609 | .word 0xd03fe150 ! 301: STD_I std %r8, [%r31 + 0x0150] | |
8610 | .word 0xd09fdc41 ! 301: LDDA_R ldda [%r31, %r1] 0xe2, %r8 | |
8611 | .word 0xc19fd960 ! 302: LDDFA_R ldda [%r31, %r0], %f0 | |
8612 | .word 0xc36fe090 ! 303: PREFETCH_I prefetch [%r31 + 0x0090], #one_read | |
8613 | .word 0x20800001 ! 304: BN bn,a <label_0x1> | |
8614 | .word 0xc19fc2c0 ! 305: LDDFA_R ldda [%r31, %r0], %f0 | |
8615 | .word 0xc1bfdf20 ! 305: STDFA_R stda %f0, [%r0, %r31] | |
8616 | memptr_4_130: | |
8617 | set 0x60540000, %r31 | |
8618 | rd %tick, %r28 | |
8619 | #if (MAX_THREADS == 8) | |
8620 | sethi %hi(0x33800), %r27 | |
8621 | #else | |
8622 | sethi %hi(0x30000), %r27 | |
8623 | #endif | |
8624 | andn %r28, %r27, %r28 | |
8625 | ta T_CHANGE_HPRIV | |
8626 | stxa %r28, [%g0] 0x73 | |
8627 | .word 0xa7a0c9d4 ! 1: FDIVd fdivd %f34, %f20, %f50 | |
8628 | intvec_4_131: | |
8629 | .word 0xc19fdf20 ! 306: LDDFA_R ldda [%r31, %r0], %f0 | |
8630 | .word 0x85806fd9 ! 307: WRCCR_I wr %r1, 0x0fd9, %ccr | |
8631 | .word 0x9f80392e ! 308: SIR sir 0x192e | |
8632 | .word 0xc19fdb60 ! 309: LDDFA_R ldda [%r31, %r0], %f0 | |
8633 | .word 0xa5b484c4 ! 309: FCMPNE32 fcmpne32 %d18, %d4, %r18 | |
8634 | rd %tick, %r28 | |
8635 | #if (MAX_THREADS == 8) | |
8636 | sethi %hi(0x33800), %r27 | |
8637 | #else | |
8638 | sethi %hi(0x30000), %r27 | |
8639 | #endif | |
8640 | andn %r28, %r27, %r28 | |
8641 | ta T_CHANGE_HPRIV | |
8642 | stxa %r28, [%g0] 0x73 | |
8643 | intvec_4_133: | |
8644 | .word 0xe1bfc3e0 ! 310: STDFA_R stda %f16, [%r0, %r31] | |
8645 | .word 0x00800001 ! 311: BN bn <label_0x1> | |
8646 | .word 0x39400001 ! 312: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8647 | .word 0x20800001 ! 313: BN bn,a <label_0x1> | |
8648 | .word 0xe19fd920 ! 313: LDDFA_R ldda [%r31, %r0], %f16 | |
8649 | memptr_4_134: | |
8650 | set 0x60540000, %r31 | |
8651 | rd %tick, %r28 | |
8652 | #if (MAX_THREADS == 8) | |
8653 | sethi %hi(0x33800), %r27 | |
8654 | #else | |
8655 | sethi %hi(0x30000), %r27 | |
8656 | #endif | |
8657 | andn %r28, %r27, %r28 | |
8658 | ta T_CHANGE_HPRIV | |
8659 | stxa %r28, [%g0] 0x73 | |
8660 | intvec_4_135: | |
8661 | .word 0xe697d060 ! 314: LDUHA_R lduha [%r31, %r0] 0x83, %r19 | |
8662 | .word 0x85846c5a ! 315: WRCCR_I wr %r17, 0x0c5a, %ccr | |
8663 | .word 0x9f8028b2 ! 316: SIR sir 0x08b2 | |
8664 | .word 0xe81fe1a0 ! 317: LDD_I ldd [%r31 + 0x01a0], %r20 | |
8665 | .word 0x39400001 ! 317: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8666 | .word 0xe2dfc282 ! 318: LDXA_R ldxa [%r31, %r2] 0x14, %r17 | |
8667 | .word 0x20800001 ! 319: BN bn,a <label_0x1> | |
8668 | .word 0xe297c243 ! 320: LDUHA_R lduha [%r31, %r3] 0x12, %r17 | |
8669 | .word 0xe297d142 ! 321: LDUHA_R lduha [%r31, %r2] 0x8a, %r17 | |
8670 | .word 0x9f8021b0 ! 321: SIR sir 0x01b0 | |
8671 | #if (defined SPC || defined CMP1) | |
8672 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_136) + 32, 16, 16)) -> intp(4,0,27,,,,,1) | |
8673 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_136)&0xffffffff) + 24, 16, 16)) -> intp(1,0,12,,,,,1) | |
8674 | #else | |
8675 | set 0x2240655d, %r28 | |
8676 | #if (MAX_THREADS == 8) | |
8677 | and %r28, 0x7ff, %r28 | |
8678 | #endif | |
8679 | stxa %r28, [%g0] 0x73 | |
8680 | #endif | |
8681 | intvec_4_136: | |
8682 | .word 0x39400001 ! 322: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8683 | .word 0x20800001 ! 323: BN bn,a <label_0x1> | |
8684 | .word 0xe1bfdc00 ! 324: STDFA_R stda %f16, [%r0, %r31] | |
8685 | .word 0x19400001 ! 325: FBPUGE fbuge | |
8686 | .word 0x00800001 ! 325: BN bn <label_0x1> | |
8687 | #if (defined SPC || defined CMP1) | |
8688 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_138) + 0, 16, 16)) -> intp(6,0,14,,,,,1) | |
8689 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_138)&0xffffffff) + 0, 16, 16)) -> intp(1,0,7,,,,,1) | |
8690 | #else | |
8691 | set 0xf630630b, %r28 | |
8692 | #if (MAX_THREADS == 8) | |
8693 | and %r28, 0x7ff, %r28 | |
8694 | #endif | |
8695 | stxa %r28, [%g0] 0x73 | |
8696 | #endif | |
8697 | .word 0xa7a449cd ! 1: FDIVd fdivd %f48, %f44, %f50 | |
8698 | intvec_4_138: | |
8699 | .word 0x9ba449c5 ! 326: FDIVd fdivd %f48, %f36, %f44 | |
8700 | .word 0xdbe7e003 ! 327: CASA_R casa [%r31] %asi, %r3, %r13 | |
8701 | .word 0xda3fe090 ! 328: STD_I std %r13, [%r31 + 0x0090] | |
8702 | .word 0xa1a489c8 ! 329: FDIVd fdivd %f18, %f8, %f16 | |
8703 | .word 0x39400001 ! 329: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8704 | .word 0xe0dfd160 ! 330: LDXA_R ldxa [%r31, %r0] 0x8b, %r16 | |
8705 | .word 0x20800001 ! 331: BN bn,a <label_0x1> | |
8706 | .word 0x20800001 ! 332: BN bn,a <label_0x1> | |
8707 | .word 0xe13fe1c0 ! 333: STDF_I std %f16, [0x01c0, %r31] | |
8708 | .word 0xe19fd960 ! 333: LDDFA_R ldda [%r31, %r0], %f16 | |
8709 | rd %tick, %r28 | |
8710 | #if (MAX_THREADS == 8) | |
8711 | sethi %hi(0x33800), %r27 | |
8712 | #else | |
8713 | sethi %hi(0x30000), %r27 | |
8714 | #endif | |
8715 | andn %r28, %r27, %r28 | |
8716 | ta T_CHANGE_HPRIV | |
8717 | stxa %r28, [%g0] 0x73 | |
8718 | intvec_4_139: | |
8719 | .word 0xe1bfd960 ! 334: STDFA_R stda %f16, [%r0, %r31] | |
8720 | .word 0xa1b7c4c1 ! 335: FCMPNE32 fcmpne32 %d62, %d32, %r16 | |
8721 | .word 0x9ba509d4 ! 336: FDIVd fdivd %f20, %f20, %f44 | |
8722 | .word 0xe1bfc2c0 ! 337: STDFA_R stda %f16, [%r0, %r31] | |
8723 | .word 0x19400001 ! 337: FBPUGE fbuge | |
8724 | .word 0xe1bfdc00 ! 338: STDFA_R stda %f16, [%r0, %r31] | |
8725 | .word 0xd9e7df03 ! 339: CASA_I casa [%r31] 0xf8, %r3, %r12 | |
8726 | .word 0xd83fe160 ! 340: STD_I std %r12, [%r31 + 0x0160] | |
8727 | .word 0xe19fda00 ! 341: LDDFA_R ldda [%r31, %r0], %f16 | |
8728 | .word 0x87afca41 ! 341: FCMPd fcmpd %fcc<n>, %f62, %f32 | |
8729 | memptr_4_141: | |
8730 | set user_data_start, %r31 | |
8731 | .word 0xd89fc723 ! 342: LDDA_R ldda [%r31, %r3] 0x39, %r12 | |
8732 | .word 0x85853f84 ! 343: WRCCR_I wr %r20, 0x1f84, %ccr | |
8733 | .word 0xc1bfdf20 ! 344: STDFA_R stda %f0, [%r0, %r31] | |
8734 | .word 0x9f802020 ! 345: SIR sir 0x0020 | |
8735 | .word 0x8582e67a ! 345: WRCCR_I wr %r11, 0x067a, %ccr | |
8736 | rd %tick, %r28 | |
8737 | #if (MAX_THREADS == 8) | |
8738 | sethi %hi(0x33800), %r27 | |
8739 | #else | |
8740 | sethi %hi(0x30000), %r27 | |
8741 | #endif | |
8742 | andn %r28, %r27, %r28 | |
8743 | ta T_CHANGE_HPRIV | |
8744 | stxa %r28, [%g0] 0x73 | |
8745 | intvec_4_143: | |
8746 | memptr_4_144: | |
8747 | set user_data_start, %r31 | |
8748 | rd %tick, %r28 | |
8749 | #if (MAX_THREADS == 8) | |
8750 | sethi %hi(0x33800), %r27 | |
8751 | #else | |
8752 | sethi %hi(0x30000), %r27 | |
8753 | #endif | |
8754 | andn %r28, %r27, %r28 | |
8755 | ta T_CHANGE_HPRIV | |
8756 | stxa %r28, [%g0] 0x73 | |
8757 | .word 0x99a0c9d4 ! 1: FDIVd fdivd %f34, %f20, %f12 | |
8758 | intvec_4_145: | |
8759 | .word 0x95a2c9d3 ! 346: FDIVd fdivd %f42, %f50, %f10 | |
8760 | .word 0x858424f0 ! 347: WRCCR_I wr %r16, 0x04f0, %ccr | |
8761 | .word 0x9f803c9b ! 348: SIR sir 0x1c9b | |
8762 | .word 0x99a409d4 ! 349: FDIVd fdivd %f16, %f20, %f12 | |
8763 | .word 0x95b184d1 ! 349: FCMPNE32 fcmpne32 %d6, %d48, %r10 | |
8764 | .word 0x9f8021f0 ! 350: SIR sir 0x01f0 | |
8765 | .word 0xd5e7e001 ! 351: CASA_R casa [%r31] %asi, %r1, %r10 | |
8766 | .word 0xc19fd920 ! 352: LDDFA_R ldda [%r31, %r0], %f0 | |
8767 | .word 0xd4dfc602 ! 353: LDXA_R ldxa [%r31, %r2] 0x30, %r10 | |
8768 | .word 0xe19fd920 ! 353: LDDFA_R ldda [%r31, %r0], %f16 | |
8769 | memptr_4_148: | |
8770 | set 0x60340000, %r31 | |
8771 | rd %tick, %r28 | |
8772 | #if (MAX_THREADS == 8) | |
8773 | sethi %hi(0x33800), %r27 | |
8774 | #else | |
8775 | sethi %hi(0x30000), %r27 | |
8776 | #endif | |
8777 | andn %r28, %r27, %r28 | |
8778 | ta T_CHANGE_HPRIV | |
8779 | stxa %r28, [%g0] 0x73 | |
8780 | intvec_4_149: | |
8781 | .word 0xe19fda00 ! 354: LDDFA_R ldda [%r31, %r0], %f16 | |
8782 | .word 0x85842dc4 ! 355: WRCCR_I wr %r16, 0x0dc4, %ccr | |
8783 | .word 0xa5b484d4 ! 356: FCMPNE32 fcmpne32 %d18, %d20, %r18 | |
8784 | .word 0xe19fd960 ! 357: LDDFA_R ldda [%r31, %r0], %f16 | |
8785 | .word 0x8581bd85 ! 357: WRCCR_I wr %r6, 0x1d85, %ccr | |
8786 | rd %tick, %r28 | |
8787 | #if (MAX_THREADS == 8) | |
8788 | sethi %hi(0x33800), %r27 | |
8789 | #else | |
8790 | sethi %hi(0x30000), %r27 | |
8791 | #endif | |
8792 | andn %r28, %r27, %r28 | |
8793 | ta T_CHANGE_HPRIV | |
8794 | stxa %r28, [%g0] 0x73 | |
8795 | intvec_4_151: | |
8796 | .word 0x39400001 ! 358: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8797 | .word 0x20800001 ! 359: BN bn,a <label_0x1> | |
8798 | .word 0x20800001 ! 360: BN bn,a <label_0x1> | |
8799 | .word 0xa5b244d0 ! 361: FCMPNE32 fcmpne32 %d40, %d16, %r18 | |
8800 | .word 0x20800001 ! 361: BN bn,a <label_0x1> | |
8801 | #if (defined SPC || defined CMP1) | |
8802 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_152) + 16, 16, 16)) -> intp(4,0,17,,,,,1) | |
8803 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_152)&0xffffffff) + 16, 16, 16)) -> intp(0,0,12,,,,,1) | |
8804 | #else | |
8805 | set 0x23506de6, %r28 | |
8806 | #if (MAX_THREADS == 8) | |
8807 | and %r28, 0x7ff, %r28 | |
8808 | #endif | |
8809 | stxa %r28, [%g0] 0x73 | |
8810 | #endif | |
8811 | intvec_4_152: | |
8812 | .word 0xe5e7d003 ! 362: CASA_I casa [%r31] 0x80, %r3, %r18 | |
8813 | .word 0xa5b7c4c1 ! 363: FCMPNE32 fcmpne32 %d62, %d32, %r18 | |
8814 | .word 0x99b404d2 ! 364: FCMPNE32 fcmpne32 %d16, %d18, %r12 | |
8815 | .word 0xc32fe110 ! 365: STXFSR_I st-sfr %f1, [0x0110, %r31] | |
8816 | .word 0x87afca43 ! 365: FCMPd fcmpd %fcc<n>, %f62, %f34 | |
8817 | memptr_4_153: | |
8818 | set user_data_start, %r31 | |
8819 | #if (defined SPC || defined CMP1) | |
8820 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_154) + 56, 16, 16)) -> intp(6,0,18,,,,,1) | |
8821 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_154)&0xffffffff) + 40, 16, 16)) -> intp(6,0,0,,,,,1) | |
8822 | #else | |
8823 | set 0x5920934a, %r28 | |
8824 | #if (MAX_THREADS == 8) | |
8825 | and %r28, 0x7ff, %r28 | |
8826 | #endif | |
8827 | stxa %r28, [%g0] 0x73 | |
8828 | #endif | |
8829 | .word 0x9f8035d1 ! 1: SIR sir 0x15d1 | |
8830 | intvec_4_154: | |
8831 | .word 0xc19fde00 ! 366: LDDFA_R ldda [%r31, %r0], %f0 | |
8832 | .word 0x858334ce ! 367: WRCCR_I wr %r12, 0x14ce, %ccr | |
8833 | .word 0x39400001 ! 368: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8834 | .word 0x20800001 ! 369: BN bn,a <label_0x1> | |
8835 | .word 0x85822a67 ! 369: WRCCR_I wr %r8, 0x0a67, %ccr | |
8836 | #if (defined SPC || defined CMP1) | |
8837 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_156) + 0, 16, 16)) -> intp(6,0,0,,,,,1) | |
8838 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_156)&0xffffffff) + 32, 16, 16)) -> intp(3,0,26,,,,,1) | |
8839 | #else | |
8840 | set 0xbfc0927d, %r28 | |
8841 | #if (MAX_THREADS == 8) | |
8842 | and %r28, 0x7ff, %r28 | |
8843 | #endif | |
8844 | stxa %r28, [%g0] 0x73 | |
8845 | #endif | |
8846 | .word 0x9f802c08 ! 1: SIR sir 0x0c08 | |
8847 | intvec_4_156: | |
8848 | memptr_4_157: | |
8849 | set 0x60140000, %r31 | |
8850 | #if (defined SPC || defined CMP1) | |
8851 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_158) + 8, 16, 16)) -> intp(2,0,1,,,,,1) | |
8852 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_158)&0xffffffff) + 40, 16, 16)) -> intp(2,0,3,,,,,1) | |
8853 | #else | |
8854 | set 0x78607f7a, %r28 | |
8855 | #if (MAX_THREADS == 8) | |
8856 | and %r28, 0x7ff, %r28 | |
8857 | #endif | |
8858 | stxa %r28, [%g0] 0x73 | |
8859 | #endif | |
8860 | .word 0x9bb484c9 ! 1: FCMPNE32 fcmpne32 %d18, %d40, %r13 | |
8861 | intvec_4_158: | |
8862 | .word 0x39400001 ! 370: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8863 | .word 0x8584ff22 ! 371: WRCCR_I wr %r19, 0x1f22, %ccr | |
8864 | .word 0xa9b184d4 ! 372: FCMPNE32 fcmpne32 %d6, %d20, %r20 | |
8865 | .word 0x95b244d2 ! 373: FCMPNE32 fcmpne32 %d40, %d18, %r10 | |
8866 | .word 0x8584a1c7 ! 373: WRCCR_I wr %r18, 0x01c7, %ccr | |
8867 | #if (defined SPC || defined CMP1) | |
8868 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_160) + 56, 16, 16)) -> intp(4,0,12,,,,,1) | |
8869 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_160)&0xffffffff) + 8, 16, 16)) -> intp(6,0,13,,,,,1) | |
8870 | #else | |
8871 | set 0x70503530, %r28 | |
8872 | #if (MAX_THREADS == 8) | |
8873 | and %r28, 0x7ff, %r28 | |
8874 | #endif | |
8875 | stxa %r28, [%g0] 0x73 | |
8876 | #endif | |
8877 | intvec_4_160: | |
8878 | memptr_4_161: | |
8879 | set 0x60140000, %r31 | |
8880 | .word 0x19400001 ! 374: FBPUGE fbuge | |
8881 | .word 0x8582a62f ! 375: WRCCR_I wr %r10, 0x062f, %ccr | |
8882 | .word 0xe19fda00 ! 376: LDDFA_R ldda [%r31, %r0], %f16 | |
8883 | .word 0x9f80331d ! 377: SIR sir 0x131d | |
8884 | .word 0xe19fdc00 ! 377: LDDFA_R ldda [%r31, %r0], %f16 | |
8885 | #if (defined SPC || defined CMP1) | |
8886 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_162) + 16, 16, 16)) -> intp(1,0,12,,,,,1) | |
8887 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_162)&0xffffffff) + 56, 16, 16)) -> intp(0,0,19,,,,,1) | |
8888 | #else | |
8889 | set 0x3f80f704, %r28 | |
8890 | #if (MAX_THREADS == 8) | |
8891 | and %r28, 0x7ff, %r28 | |
8892 | #endif | |
8893 | stxa %r28, [%g0] 0x73 | |
8894 | #endif | |
8895 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8896 | intvec_4_162: | |
8897 | .word 0xa3a049c6 ! 378: FDIVd fdivd %f32, %f6, %f48 | |
8898 | .word 0xc1bfd960 ! 379: STDFA_R stda %f0, [%r0, %r31] | |
8899 | .word 0x20800001 ! 380: BN bn,a <label_0x1> | |
8900 | .word 0x9f803263 ! 381: SIR sir 0x1263 | |
8901 | .word 0x20800001 ! 381: BN bn,a <label_0x1> | |
8902 | .word 0xe31fe1e0 ! 382: LDDF_I ldd [%r31, 0x01e0], %f17 | |
8903 | .word 0xe1bfc3e0 ! 383: STDFA_R stda %f16, [%r0, %r31] | |
8904 | .word 0xe21fe090 ! 384: LDD_I ldd [%r31 + 0x0090], %r17 | |
8905 | .word 0xc32fe080 ! 385: STXFSR_I st-sfr %f1, [0x0080, %r31] | |
8906 | .word 0xe2dfd003 ! 385: LDXA_R ldxa [%r31, %r3] 0x80, %r17 | |
8907 | .word 0x00800001 ! 386: BN bn <label_0x1> | |
8908 | .word 0x00800001 ! 387: BN bn <label_0x1> | |
8909 | .word 0x00800001 ! 388: BN bn <label_0x1> | |
8910 | .word 0x00800001 ! 389: BN bn <label_0x1> | |
8911 | .word 0xc19fc2c0 ! 389: LDDFA_R ldda [%r31, %r0], %f0 | |
8912 | .word 0xe497d162 ! 390: LDUHA_R lduha [%r31, %r2] 0x8b, %r18 | |
8913 | .word 0xe19fdb60 ! 391: LDDFA_R ldda [%r31, %r0], %f16 | |
8914 | .word 0xc1bfd960 ! 392: STDFA_R stda %f0, [%r0, %r31] | |
8915 | .word 0xe53fe0e0 ! 393: STDF_I std %f18, [0x00e0, %r31] | |
8916 | .word 0x00800001 ! 393: BN bn <label_0x1> | |
8917 | rd %tick, %r28 | |
8918 | #if (MAX_THREADS == 8) | |
8919 | sethi %hi(0x33800), %r27 | |
8920 | #else | |
8921 | sethi %hi(0x30000), %r27 | |
8922 | #endif | |
8923 | andn %r28, %r27, %r28 | |
8924 | ta T_CHANGE_HPRIV | |
8925 | stxa %r28, [%g0] 0x73 | |
8926 | intvec_4_165: | |
8927 | memptr_4_166: | |
8928 | set 0x60340000, %r31 | |
8929 | .word 0x9f802c18 ! 394: SIR sir 0x0c18 | |
8930 | .word 0x8582a18e ! 395: WRCCR_I wr %r10, 0x018e, %ccr | |
8931 | .word 0x9f802080 ! 396: SIR sir 0x0080 | |
8932 | .word 0x19400001 ! 397: FBPUGE fbuge | |
8933 | .word 0x85853d6c ! 397: WRCCR_I wr %r20, 0x1d6c, %ccr | |
8934 | #if (defined SPC || defined CMP1) | |
8935 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_168) + 16, 16, 16)) -> intp(6,0,21,,,,,1) | |
8936 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_168)&0xffffffff) + 0, 16, 16)) -> intp(2,0,10,,,,,1) | |
8937 | #else | |
8938 | set 0xbf106249, %r28 | |
8939 | #if (MAX_THREADS == 8) | |
8940 | and %r28, 0x7ff, %r28 | |
8941 | #endif | |
8942 | stxa %r28, [%g0] 0x73 | |
8943 | #endif | |
8944 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8945 | intvec_4_168: | |
8946 | .word 0xc19fdf20 ! 398: LDDFA_R ldda [%r31, %r0], %f0 | |
8947 | .word 0x20800001 ! 399: BN bn,a <label_0x1> | |
8948 | .word 0x99a289c9 ! 400: FDIVd fdivd %f10, %f40, %f12 | |
8949 | .word 0x20800001 ! 401: BN bn,a <label_0x1> | |
8950 | .word 0x95b484c4 ! 401: FCMPNE32 fcmpne32 %d18, %d4, %r10 | |
8951 | memptr_4_169: | |
8952 | set 0x60740000, %r31 | |
8953 | #if (defined SPC || defined CMP1) | |
8954 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_170) + 8, 16, 16)) -> intp(7,0,20,,,,,1) | |
8955 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_170)&0xffffffff) + 0, 16, 16)) -> intp(1,0,24,,,,,1) | |
8956 | #else | |
8957 | set 0x9a00272d, %r28 | |
8958 | #if (MAX_THREADS == 8) | |
8959 | and %r28, 0x7ff, %r28 | |
8960 | #endif | |
8961 | stxa %r28, [%g0] 0x73 | |
8962 | #endif | |
8963 | .word 0xa5a289d1 ! 1: FDIVd fdivd %f10, %f48, %f18 | |
8964 | intvec_4_170: | |
8965 | .word 0xe497d060 ! 402: LDUHA_R lduha [%r31, %r0] 0x83, %r18 | |
8966 | .word 0x85847c22 ! 403: WRCCR_I wr %r17, 0x1c22, %ccr | |
8967 | .word 0x93b404d4 ! 404: FCMPNE32 fcmpne32 %d16, %d20, %r9 | |
8968 | .word 0xc3efe0e0 ! 405: PREFETCHA_I prefetcha [%r31, + 0x00e0] %asi, #one_read | |
8969 | .word 0x8584e8ec ! 405: WRCCR_I wr %r19, 0x08ec, %ccr | |
8970 | #if (defined SPC || defined CMP1) | |
8971 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_172) + 0, 16, 16)) -> intp(0,0,31,,,,,1) | |
8972 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_172)&0xffffffff) + 40, 16, 16)) -> intp(3,0,4,,,,,1) | |
8973 | #else | |
8974 | set 0xfc40339e, %r28 | |
8975 | #if (MAX_THREADS == 8) | |
8976 | and %r28, 0x7ff, %r28 | |
8977 | #endif | |
8978 | stxa %r28, [%g0] 0x73 | |
8979 | #endif | |
8980 | intvec_4_172: | |
8981 | .word 0xd31fe160 ! 406: LDDF_I ldd [%r31, 0x0160], %f9 | |
8982 | .word 0x19400001 ! 407: FBPUGE fbuge | |
8983 | .word 0x9f802781 ! 408: SIR sir 0x0781 | |
8984 | .word 0xd53fe130 ! 409: STDF_I std %f10, [0x0130, %r31] | |
8985 | .word 0xa9a449ca ! 409: FDIVd fdivd %f48, %f10, %f20 | |
8986 | #if (defined SPC || defined CMP1) | |
8987 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_174) + 24, 16, 16)) -> intp(2,0,10,,,,,1) | |
8988 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_174)&0xffffffff) + 40, 16, 16)) -> intp(4,0,23,,,,,1) | |
8989 | #else | |
8990 | set 0xec02aec, %r28 | |
8991 | #if (MAX_THREADS == 8) | |
8992 | and %r28, 0x7ff, %r28 | |
8993 | #endif | |
8994 | stxa %r28, [%g0] 0x73 | |
8995 | #endif | |
8996 | intvec_4_174: | |
8997 | .word 0xc32fe010 ! 410: STXFSR_I st-sfr %f1, [0x0010, %r31] | |
8998 | .word 0xe19fde00 ! 411: LDDFA_R ldda [%r31, %r0], %f16 | |
8999 | .word 0x39400001 ! 412: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9000 | .word 0xc32fe120 ! 413: STXFSR_I st-sfr %f1, [0x0120, %r31] | |
9001 | .word 0xc19fd920 ! 413: LDDFA_R ldda [%r31, %r0], %f0 | |
9002 | .word 0xe53fe170 ! 414: STDF_I std %f18, [0x0170, %r31] | |
9003 | .word 0x87afca40 ! 415: FCMPd fcmpd %fcc<n>, %f62, %f0 | |
9004 | .word 0xe19fdc00 ! 416: LDDFA_R ldda [%r31, %r0], %f16 | |
9005 | .word 0x9f802150 ! 417: SIR sir 0x0150 | |
9006 | .word 0x00800001 ! 417: BN bn <label_0x1> | |
9007 | #if (defined SPC || defined CMP1) | |
9008 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_176) + 8, 16, 16)) -> intp(3,0,9,,,,,1) | |
9009 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_176)&0xffffffff) + 40, 16, 16)) -> intp(5,0,9,,,,,1) | |
9010 | #else | |
9011 | set 0xe7a05789, %r28 | |
9012 | #if (MAX_THREADS == 8) | |
9013 | and %r28, 0x7ff, %r28 | |
9014 | #endif | |
9015 | stxa %r28, [%g0] 0x73 | |
9016 | #endif | |
9017 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9018 | intvec_4_176: | |
9019 | .word 0x39400001 ! 418: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9020 | .word 0x87afca40 ! 419: FCMPd fcmpd %fcc<n>, %f62, %f0 | |
9021 | .word 0xc3efe0c0 ! 420: PREFETCHA_I prefetcha [%r31, + 0x00c0] %asi, #one_read | |
9022 | .word 0x9f803655 ! 421: SIR sir 0x1655 | |
9023 | .word 0x99b7c4c2 ! 421: FCMPNE32 fcmpne32 %d62, %d2, %r12 | |
9024 | memptr_4_177: | |
9025 | set user_data_start, %r31 | |
9026 | #if (defined SPC || defined CMP1) | |
9027 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_178) + 24, 16, 16)) -> intp(7,0,1,,,,,1) | |
9028 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_178)&0xffffffff) + 48, 16, 16)) -> intp(3,0,15,,,,,1) | |
9029 | #else | |
9030 | set 0x58b04904, %r28 | |
9031 | #if (MAX_THREADS == 8) | |
9032 | and %r28, 0x7ff, %r28 | |
9033 | #endif | |
9034 | stxa %r28, [%g0] 0x73 | |
9035 | #endif | |
9036 | intvec_4_178: | |
9037 | .word 0xc32fe1e0 ! 422: STXFSR_I st-sfr %f1, [0x01e0, %r31] | |
9038 | .word 0x8581e4e2 ! 423: WRCCR_I wr %r7, 0x04e2, %ccr | |
9039 | .word 0xa5b1c4d3 ! 424: FCMPNE32 fcmpne32 %d38, %d50, %r18 | |
9040 | .word 0xe5e7df01 ! 425: CASA_I casa [%r31] 0xf8, %r1, %r18 | |
9041 | .word 0x8580b4b9 ! 425: WRCCR_I wr %r2, 0x14b9, %ccr | |
9042 | #if (defined SPC || defined CMP1) | |
9043 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_180) + 8, 16, 16)) -> intp(2,0,14,,,,,1) | |
9044 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_180)&0xffffffff) + 8, 16, 16)) -> intp(5,0,21,,,,,1) | |
9045 | #else | |
9046 | set 0xb5c08f0b, %r28 | |
9047 | #if (MAX_THREADS == 8) | |
9048 | and %r28, 0x7ff, %r28 | |
9049 | #endif | |
9050 | stxa %r28, [%g0] 0x73 | |
9051 | #endif | |
9052 | .word 0x9ba149cb ! 1: FDIVd fdivd %f36, %f42, %f44 | |
9053 | intvec_4_180: | |
9054 | .word 0xc3efe0f0 ! 426: PREFETCHA_I prefetcha [%r31, + 0x00f0] %asi, #one_read | |
9055 | .word 0xdbe7e001 ! 427: CASA_R casa [%r31] %asi, %r1, %r13 | |
9056 | .word 0x39400001 ! 428: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9057 | .word 0xc3efe1f0 ! 429: PREFETCHA_I prefetcha [%r31, + 0x01f0] %asi, #one_read | |
9058 | .word 0x9f803dc8 ! 429: SIR sir 0x1dc8 | |
9059 | .word 0xe51fe1c0 ! 430: LDDF_I ldd [%r31, 0x01c0], %f18 | |
9060 | .word 0xe19fd920 ! 431: LDDFA_R ldda [%r31, %r0], %f16 | |
9061 | .word 0x9f802140 ! 432: SIR sir 0x0140 | |
9062 | .word 0xe51fe130 ! 433: LDDF_I ldd [%r31, 0x0130], %f18 | |
9063 | .word 0xe4dfc400 ! 433: LDXA_R ldxa [%r31, %r0] 0x20, %r18 | |
9064 | rd %tick, %r28 | |
9065 | #if (MAX_THREADS == 8) | |
9066 | sethi %hi(0x33800), %r27 | |
9067 | #else | |
9068 | sethi %hi(0x30000), %r27 | |
9069 | #endif | |
9070 | andn %r28, %r27, %r28 | |
9071 | ta T_CHANGE_HPRIV | |
9072 | stxa %r28, [%g0] 0x73 | |
9073 | intvec_4_183: | |
9074 | .word 0x20800001 ! 434: BN bn,a <label_0x1> | |
9075 | .word 0xc1bfd920 ! 435: STDFA_R stda %f0, [%r0, %r31] | |
9076 | .word 0x9f8026df ! 436: SIR sir 0x06df | |
9077 | .word 0x20800001 ! 437: BN bn,a <label_0x1> | |
9078 | .word 0x91a049d2 ! 437: FDIVd fdivd %f32, %f18, %f8 | |
9079 | memptr_4_185: | |
9080 | set 0x60540000, %r31 | |
9081 | .word 0xd13fe100 ! 438: STDF_I std %f8, [0x0100, %r31] | |
9082 | .word 0x8584e31e ! 439: WRCCR_I wr %r19, 0x031e, %ccr | |
9083 | .word 0x9f802100 ! 440: SIR sir 0x0100 | |
9084 | .word 0xc32fe0c0 ! 441: STXFSR_I st-sfr %f1, [0x00c0, %r31] | |
9085 | .word 0x8584e7bf ! 441: WRCCR_I wr %r19, 0x07bf, %ccr | |
9086 | #if (defined SPC || defined CMP1) | |
9087 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_186) + 32, 16, 16)) -> intp(7,0,31,,,,,1) | |
9088 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_186)&0xffffffff) + 32, 16, 16)) -> intp(1,0,3,,,,,1) | |
9089 | #else | |
9090 | set 0xbac0cfff, %r28 | |
9091 | #if (MAX_THREADS == 8) | |
9092 | and %r28, 0x7ff, %r28 | |
9093 | #endif | |
9094 | stxa %r28, [%g0] 0x73 | |
9095 | #endif | |
9096 | .word 0x97b4c4d1 ! 1: FCMPNE32 fcmpne32 %d50, %d48, %r11 | |
9097 | intvec_4_186: | |
9098 | memptr_4_187: | |
9099 | set 0x60540000, %r31 | |
9100 | #if (defined SPC || defined CMP1) | |
9101 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_188) + 48, 16, 16)) -> intp(0,0,18,,,,,1) | |
9102 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_188)&0xffffffff) + 8, 16, 16)) -> intp(4,0,23,,,,,1) | |
9103 | #else | |
9104 | set 0xee704c06, %r28 | |
9105 | #if (MAX_THREADS == 8) | |
9106 | and %r28, 0x7ff, %r28 | |
9107 | #endif | |
9108 | stxa %r28, [%g0] 0x73 | |
9109 | #endif | |
9110 | intvec_4_188: | |
9111 | .word 0xa1a409cd ! 442: FDIVd fdivd %f16, %f44, %f16 | |
9112 | .word 0x858532e3 ! 443: WRCCR_I wr %r20, 0x12e3, %ccr | |
9113 | .word 0x93a489c2 ! 444: FDIVd fdivd %f18, %f2, %f40 | |
9114 | .word 0x9f80391e ! 445: SIR sir 0x191e | |
9115 | .word 0x858474e0 ! 445: WRCCR_I wr %r17, 0x14e0, %ccr | |
9116 | rd %tick, %r28 | |
9117 | #if (MAX_THREADS == 8) | |
9118 | sethi %hi(0x33800), %r27 | |
9119 | #else | |
9120 | sethi %hi(0x30000), %r27 | |
9121 | #endif | |
9122 | andn %r28, %r27, %r28 | |
9123 | ta T_CHANGE_HPRIV | |
9124 | stxa %r28, [%g0] 0x73 | |
9125 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9126 | intvec_4_189: | |
9127 | .word 0xc19fd960 ! 446: LDDFA_R ldda [%r31, %r0], %f0 | |
9128 | .word 0xc1bfc2c0 ! 447: STDFA_R stda %f0, [%r0, %r31] | |
9129 | .word 0x39400001 ! 448: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9130 | .word 0xe19fc2c0 ! 449: LDDFA_R ldda [%r31, %r0], %f16 | |
9131 | .word 0xa3b284d3 ! 449: FCMPNE32 fcmpne32 %d10, %d50, %r17 | |
9132 | .word 0xc32fe1b0 ! 450: STXFSR_I st-sfr %f1, [0x01b0, %r31] | |
9133 | .word 0xc19fd920 ! 451: LDDFA_R ldda [%r31, %r0], %f0 | |
9134 | .word 0x20800001 ! 452: BN bn,a <label_0x1> | |
9135 | .word 0xe33fe170 ! 453: STDF_I std %f17, [0x0170, %r31] | |
9136 | .word 0x20800001 ! 453: BN bn,a <label_0x1> | |
9137 | rd %tick, %r28 | |
9138 | #if (MAX_THREADS == 8) | |
9139 | sethi %hi(0x33800), %r27 | |
9140 | #else | |
9141 | sethi %hi(0x30000), %r27 | |
9142 | #endif | |
9143 | andn %r28, %r27, %r28 | |
9144 | ta T_CHANGE_HPRIV | |
9145 | stxa %r28, [%g0] 0x73 | |
9146 | .word 0xa7b444d1 ! 1: FCMPNE32 fcmpne32 %d48, %d48, %r19 | |
9147 | intvec_4_191: | |
9148 | #if (defined SPC || defined CMP1) | |
9149 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_192) + 0, 16, 16)) -> intp(5,0,21,,,,,1) | |
9150 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_192)&0xffffffff) + 8, 16, 16)) -> intp(1,0,24,,,,,1) | |
9151 | #else | |
9152 | set 0x87305c77, %r28 | |
9153 | #if (MAX_THREADS == 8) | |
9154 | and %r28, 0x7ff, %r28 | |
9155 | #endif | |
9156 | stxa %r28, [%g0] 0x73 | |
9157 | #endif | |
9158 | intvec_4_192: | |
9159 | .word 0xa3a289c7 ! 454: FDIVd fdivd %f10, %f38, %f48 | |
9160 | .word 0xa3a7c9c0 ! 455: FDIVd fdivd %f62, %f0, %f48 | |
9161 | .word 0x39400001 ! 456: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9162 | .word 0x19400001 ! 457: FBPUGE fbuge | |
9163 | .word 0x39400001 ! 457: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9164 | #if (defined SPC || defined CMP1) | |
9165 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_194) + 24, 16, 16)) -> intp(2,0,21,,,,,1) | |
9166 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_194)&0xffffffff) + 24, 16, 16)) -> intp(0,0,13,,,,,1) | |
9167 | #else | |
9168 | set 0x6930f178, %r28 | |
9169 | #if (MAX_THREADS == 8) | |
9170 | and %r28, 0x7ff, %r28 | |
9171 | #endif | |
9172 | stxa %r28, [%g0] 0x73 | |
9173 | #endif | |
9174 | intvec_4_194: | |
9175 | .word 0xc32fe1d0 ! 458: STXFSR_I st-sfr %f1, [0x01d0, %r31] | |
9176 | .word 0x9ba7c9c0 ! 459: FDIVd fdivd %f62, %f0, %f44 | |
9177 | .word 0x19400001 ! 460: FBPUGE fbuge | |
9178 | .word 0xe897c3c2 ! 461: LDUHA_R lduha [%r31, %r2] 0x1e, %r20 | |
9179 | .word 0x9f8038d3 ! 461: SIR sir 0x18d3 | |
9180 | #if (defined SPC || defined CMP1) | |
9181 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_196) + 24, 16, 16)) -> intp(0,0,16,,,,,1) | |
9182 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_4_196)&0xffffffff) + 48, 16, 16)) -> intp(7,0,23,,,,,1) | |
9183 | #else | |
9184 | set 0x8ac09fe5, %r28 | |
9185 | #if (MAX_THREADS == 8) | |
9186 | and %r28, 0x7ff, %r28 | |
9187 | #endif | |
9188 | stxa %r28, [%g0] 0x73 | |
9189 | #endif | |
9190 | intvec_4_196: | |
9191 | .word 0xe93fe040 ! 462: STDF_I std %f20, [0x0040, %r31] | |
9192 | .word 0x24cfc001 ! 463: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
9193 | .word 0x9f8032ae ! 464: SIR sir 0x12ae | |
9194 | .word 0x9f802130 ! 465: SIR sir 0x0130 | |
9195 | .word 0xa9a7c9c2 ! 465: FDIVd fdivd %f62, %f2, %f20 | |
9196 | memptr_4_198: | |
9197 | set user_data_start, %r31 | |
9198 | rd %tick, %r28 | |
9199 | #if (MAX_THREADS == 8) | |
9200 | sethi %hi(0x33800), %r27 | |
9201 | #else | |
9202 | sethi %hi(0x30000), %r27 | |
9203 | #endif | |
9204 | andn %r28, %r27, %r28 | |
9205 | ta T_CHANGE_HPRIV | |
9206 | stxa %r28, [%g0] 0x73 | |
9207 | .word 0x9ba409d1 ! 1: FDIVd fdivd %f16, %f48, %f44 | |
9208 | intvec_4_199: | |
9209 | .word 0xdadfc282 ! 466: LDXA_R ldxa [%r31, %r2] 0x14, %r13 | |
9210 | .word 0x8582f9dd ! 467: WRCCR_I wr %r11, 0x19dd, %ccr | |
9211 | .word 0x19400001 ! 468: FBPUGE fbuge | |
9212 | .word 0xc32fe1d0 ! 469: STXFSR_I st-sfr %f1, [0x01d0, %r31] | |
9213 | .word 0x93a209c1 ! 469: FDIVd fdivd %f8, %f32, %f40 | |
9214 | .word 0x20800001 ! 470: BN bn,a <label_0x1> | |
9215 | .word 0xd63fe0d0 ! 471: STD_I std %r11, [%r31 + 0x00d0] | |
9216 | .word 0xd7e7c381 ! 472: CASA_I casa [%r31] 0x1c, %r1, %r11 | |
9217 | .word 0xe19fc2c0 ! 473: LDDFA_R ldda [%r31, %r0], %f16 | |
9218 | .word 0xd69fc240 ! 473: LDDA_R ldda [%r31, %r0] 0x12, %r11 | |
9219 | rd %tick, %r28 | |
9220 | #if (MAX_THREADS == 8) | |
9221 | sethi %hi(0x33800), %r27 | |
9222 | #else | |
9223 | sethi %hi(0x30000), %r27 | |
9224 | #endif | |
9225 | andn %r28, %r27, %r28 | |
9226 | ta T_CHANGE_HPRIV | |
9227 | stxa %r28, [%g0] 0x73 | |
9228 | intvec_4_201: | |
9229 | memptr_4_202: | |
9230 | set 0x60540000, %r31 | |
9231 | .word 0x39400001 ! 474: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9232 | .word 0x8580e4aa ! 475: WRCCR_I wr %r3, 0x04aa, %ccr | |
9233 | .word 0xc19fda00 ! 476: LDDFA_R ldda [%r31, %r0], %f0 | |
9234 | .word 0x19400001 ! 477: FBPUGE fbuge | |
9235 | .word 0x8580a65e ! 477: WRCCR_I wr %r2, 0x065e, %ccr | |
9236 | .word 0xd63fe1b0 ! 478: STD_I std %r11, [%r31 + 0x01b0] | |
9237 | .word 0xc19fde00 ! 479: LDDFA_R ldda [%r31, %r0], %f0 | |
9238 | .word 0x00800001 ! 480: BN bn <label_0x1> | |
9239 | .word 0xd63fe1b0 ! 481: STD_I std %r11, [%r31 + 0x01b0] | |
9240 | .word 0xc19fdc00 ! 481: LDDFA_R ldda [%r31, %r0], %f0 | |
9241 | memptr_4_205: | |
9242 | set 0x60540000, %r31 | |
9243 | .word 0xd73fe1e0 ! 482: STDF_I std %f11, [0x01e0, %r31] | |
9244 | .word 0x8581f704 ! 483: WRCCR_I wr %r7, 0x1704, %ccr | |
9245 | .word 0xd61fe170 ! 484: LDD_I ldd [%r31 + 0x0170], %r11 | |
9246 | .word 0xd73fe120 ! 485: STDF_I std %f11, [0x0120, %r31] | |
9247 | .word 0xd71fe160 ! 485: LDDF_I ldd [%r31, 0x0160], %f11 | |
9248 | rd %tick, %r28 | |
9249 | #if (MAX_THREADS == 8) | |
9250 | sethi %hi(0x33800), %r27 | |
9251 | #else | |
9252 | sethi %hi(0x30000), %r27 | |
9253 | #endif | |
9254 | andn %r28, %r27, %r28 | |
9255 | ta T_CHANGE_HPRIV | |
9256 | stxa %r28, [%g0] 0x73 | |
9257 | intvec_4_207: | |
9258 | .word 0x91b4c4d0 ! 486: FCMPNE32 fcmpne32 %d50, %d16, %r8 | |
9259 | .word 0xe1bfdf20 ! 487: STDFA_R stda %f16, [%r0, %r31] | |
9260 | .word 0xd0dfc3c3 ! 488: LDXA_R ldxa [%r31, %r3] 0x1e, %r8 | |
9261 | .word 0xa7a089d1 ! 489: FDIVd fdivd %f2, %f48, %f50 | |
9262 | .word 0xc19fd920 ! 489: LDDFA_R ldda [%r31, %r0], %f0 | |
9263 | .word 0x81dfc001 ! 1: FLUSH_R flush %r31, %r1, %r0 | |
9264 | memptr_4_209: | |
9265 | set 0x60740000, %r31 | |
9266 | .word 0xc32fe120 ! 490: STXFSR_I st-sfr %f1, [0x0120, %r31] | |
9267 | .word 0x858221aa ! 491: WRCCR_I wr %r8, 0x01aa, %ccr | |
9268 | .word 0x00800001 ! 492: BN bn <label_0x1> | |
9269 | .word 0xd29fc283 ! 493: LDDA_R ldda [%r31, %r3] 0x14, %r9 | |
9270 | .word 0xc19fd920 ! 493: LDDFA_R ldda [%r31, %r0], %f0 | |
9271 | memptr_4_211: | |
9272 | set 0x60540000, %r31 | |
9273 | .word 0xd3e7d041 ! 494: CASA_I casa [%r31] 0x82, %r1, %r9 | |
9274 | .word 0x858274ff ! 495: WRCCR_I wr %r9, 0x14ff, %ccr | |
9275 | .word 0x00800001 ! 496: BN bn <label_0x1> | |
9276 | .word 0xd3e7d140 ! 497: CASA_I casa [%r31] 0x8a, %r0, %r9 | |
9277 | .word 0x8584b057 ! 497: WRCCR_I wr %r18, 0x1057, %ccr | |
9278 | .word 0xc19fc2c0 ! 498: LDDFA_R ldda [%r31, %r0], %f0 | |
9279 | .word 0x00800001 ! 499: BN bn <label_0x1> | |
9280 | .word 0xd21fe010 ! 500: LDD_I ldd [%r31 + 0x0010], %r9 | |
9281 | .word 0xc1bfdb60 ! 501: STDFA_R stda %f0, [%r0, %r31] | |
9282 | .word 0xc1bfc2c0 ! 501: STDFA_R stda %f0, [%r0, %r31] | |
9283 | nop | |
9284 | nop | |
9285 | ta T_CHANGE_PRIV | |
9286 | wrpr %g0, %g0, %gl | |
9287 | nop | |
9288 | nop | |
9289 | .text | |
9290 | setx join_lbl_0_0, %g1, %g2 | |
9291 | jmp %g2 | |
9292 | nop | |
9293 | fork_lbl_0_2: | |
9294 | master_thread_stuff: | |
9295 | ||
9296 | setup_tick: | |
9297 | setx 0xfd03910af47cb30e, %r1, %r17 | |
9298 | wrpr %g0, %r17, %tick | |
9299 | ||
9300 | rd %asi, %r12 | |
9301 | #ifdef XIR_RND_CORES | |
9302 | setup_xir_2: | |
9303 | setx 0x5a4d2ee1d0e4932b, %r1, %r28 | |
9304 | mov 0x30, %r17 | |
9305 | stxa %r28, [%r17] 0x41 | |
9306 | #endif | |
9307 | #ifdef SPLASH_HIDECR | |
9308 | mov 8, %r1 | |
9309 | set SPLASH_HIDECR, %r2 | |
9310 | sllx %r2, 32, %r2 | |
9311 | stxa %r2, [%r1] 0x45 | |
9312 | #endif | |
9313 | #if (MULTIPASS > 0) | |
9314 | mov 0x38, %g1 | |
9315 | ldxa [%g1]ASI_SCRATCHPAD, %r10 | |
9316 | brnz %g1, unlock_sync_thds_2 | |
9317 | wrpr %g0, %g0, %pstate | |
9318 | #endif | |
9319 | setup_spu_2: | |
9320 | wr %g0, 0x40, %asi | |
9321 | !# allocate control word queue (e.g., setup head/tail/first/last registers) | |
9322 | set CWQ_BASE, %l6 | |
9323 | ||
9324 | #ifndef SPC | |
9325 | ldxa [%g0]0x63, %o2 | |
9326 | and %o2, 0x38, %o2 | |
9327 | sllx %o2, 5, %o2 !(CID*256) | |
9328 | add %l6, %o2, %l6 | |
9329 | #endif | |
9330 | !# write base addr to first, head, and tail ptr | |
9331 | !# first store to first | |
9332 | stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi !# first store to first | |
9333 | ||
9334 | stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi !# then to head | |
9335 | stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# then to tail | |
9336 | setx CWQ_LAST, %g1, %l5 !# then end of CWQ region to LAST | |
9337 | #ifndef SPC | |
9338 | add %l5, %o2, %l5 | |
9339 | #endif | |
9340 | stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi | |
9341 | ||
9342 | !# set CWQ control word ([39:37] is strand ID ..) | |
9343 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word | |
9344 | sllx %l2, 32, %l2 | |
9345 | ||
9346 | !# write CWQ entry (%l6 points to CWQ) | |
9347 | stx %l2, [%l6 + 0x0] | |
9348 | ||
9349 | setx msg, %g1, %l2 | |
9350 | stx %l2, [%l6 + 0x8] !# source address | |
9351 | ||
9352 | stx %g0, [%l6 + 0x10] !# Authentication Key Address (40-bit) | |
9353 | stx %g0, [%l6 + 0x18] !# Authentication IV Address (40-bit) | |
9354 | stx %g0, [%l6 + 0x20] !# Authentication FSAS Address (40-bit) | |
9355 | stx %g0, [%l6 + 0x28] !# Encryption Key Address (40-bit) | |
9356 | stx %g0, [%l6 + 0x30] !# Encryption Initialization Vector Address (40-bit) | |
9357 | ||
9358 | setx results, %g1, %o3 | |
9359 | stx %o3, [%l6 + 0x38] !# Destination Address (40-bit) | |
9360 | ||
9361 | membar #Sync | |
9362 | ||
9363 | ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2 | |
9364 | add %l2, 0x40, %l2 | |
9365 | stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi | |
9366 | ||
9367 | !# Kick off the CWQ operation by writing to the CWQ_CSR | |
9368 | !# Set the enabled bit and reset the other bits | |
9369 | or %g0, 0x1, %g1 | |
9370 | stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
9371 | ||
9372 | unlock_sync_thds_2: | |
9373 | set sync_thr_counter6, %r23 | |
9374 | #ifndef SPC | |
9375 | ldxa [%g0]0x63, %o2 | |
9376 | and %o2, 0x38, %o2 | |
9377 | add %o2, %r23, %r23 | |
9378 | #endif | |
9379 | st %r0, [%r23] !unlock sync_thr_counter6 | |
9380 | sub %r23, 64, %r23 | |
9381 | st %r0, [%r23] !unlock sync_thr_counter5 | |
9382 | sub %r23, 64, %r23 | |
9383 | st %r0, [%r23] !unlock sync_thr_counter4 | |
9384 | ||
9385 | wr %r0, %r12, %asi | |
9386 | wrhpr %g0, 0x7c3, %hpstate ! ta T_CHANGE_NONHPRIV | |
9387 | cmp_2_0: | |
9388 | nop | |
9389 | nop | |
9390 | ta T_CHANGE_HPRIV | |
9391 | rd %asi, %r12 | |
9392 | wr %r0, 0x41, %asi | |
9393 | set sync_thr_counter4, %r23 | |
9394 | #ifndef SPC | |
9395 | ldxa [%g0]0x63, %r8 | |
9396 | and %r8, 0x38, %r8 ! Core ID | |
9397 | add %r8, %r23, %r23 | |
9398 | mov 0xff, %r9 | |
9399 | xor %r9, 0x2, %r9 | |
9400 | sllx %r9, %r8, %r9 ! My core mask | |
9401 | #else | |
9402 | mov 0, %r8 | |
9403 | mov 0xff, %r9 | |
9404 | xor %r9, 0x2, %r9 ! My core mask | |
9405 | #endif | |
9406 | mov 0x2, %r10 | |
9407 | cmp_startwait2_0: | |
9408 | cas [%r23],%g0,%r10 !lock | |
9409 | brz,a %r10, continue_cmp_2_0 | |
9410 | ldxa [0x50]%asi, %r13 !Running_rw | |
9411 | ld [%r23], %r10 | |
9412 | cmp_wait2_0: | |
9413 | brnz,a %r10, cmp_wait2_0 | |
9414 | ld [%r23], %r10 | |
9415 | ba cmp_startwait2_0 | |
9416 | mov 0x2, %r10 | |
9417 | continue_cmp_2_0: | |
9418 | ldxa [0x58]%asi, %r14 !Running_status | |
9419 | xnor %r14, %r13, %r14 !Bits equal | |
9420 | brz,a %r8, cmp_multi_core_2_0 | |
9421 | mov 0x45, %r17 | |
9422 | best_set_reg(0x2a63238f1af320f2, %r16, %r17) | |
9423 | cmp_multi_core_2_0: | |
9424 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
9425 | and %r14, %r9, %r14 !Apply core-mask | |
9426 | stxa %r14, [0x60]%asi | |
9427 | st %g0, [%r23] !clear lock | |
9428 | wr %g0, %r12, %asi | |
9429 | wrhpr %g0, 0x1bd1, %hpstate ! ta T_CHANGE_NONHPRIV | |
9430 | .word 0x9192c011 ! 1: WRPR_PIL_R wrpr %r11, %r17, %pil | |
9431 | splash_htba_2_1: | |
9432 | nop | |
9433 | ta T_CHANGE_HPRIV | |
9434 | setx 0x0000000000280000, %r11, %r12 | |
9435 | .word 0x8b98000c ! 5: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
9436 | splash_cmpr_2_4: | |
9437 | mov 0, %r18 | |
9438 | sllx %r18, 63, %r18 | |
9439 | rd %tick, %r17 | |
9440 | add %r17, 0x80, %r17 | |
9441 | or %r17, %r18, %r17 | |
9442 | ta T_CHANGE_HPRIV | |
9443 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
9444 | ta T_CHANGE_PRIV | |
9445 | .word 0xb3800011 ! 9: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
9446 | .word 0xd23fe0f6 ! 13: STD_I std %r9, [%r31 + 0x00f6] | |
9447 | jmptr_2_7: | |
9448 | nop | |
9449 | nop | |
9450 | best_set_reg(0xe0200000, %r20, %r27) | |
9451 | .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27 | |
9452 | #if (defined SPC || defined CMP1) | |
9453 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_10) + 0, 16, 16)) -> intp(2,0,25,,,,,1) | |
9454 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_10)&0xffffffff) + 32, 16, 16)) -> intp(3,0,19,,,,,1) | |
9455 | #else | |
9456 | set 0xc2007242, %r28 | |
9457 | #if (MAX_THREADS == 8) | |
9458 | and %r28, 0x7ff, %r28 | |
9459 | #endif | |
9460 | stxa %r28, [%g0] 0x73 | |
9461 | #endif | |
9462 | intvec_2_10: | |
9463 | .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9464 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
9465 | .word 0x8d903d35 ! 25: WRPR_PSTATE_I wrpr %r0, 0x1d35, %pstate | |
9466 | nop | |
9467 | nop | |
9468 | ta T_CHANGE_HPRIV | |
9469 | mov 0x2, %r10 | |
9470 | set sync_thr_counter6, %r23 | |
9471 | #ifndef SPC | |
9472 | ldxa [%g0]0x63, %o1 | |
9473 | and %o1, 0x38, %o1 | |
9474 | add %o1, %r23, %r23 | |
9475 | #endif | |
9476 | cas [%r23],%g0,%r10 !lock | |
9477 | brnz %r10, sma_2_16 | |
9478 | rd %asi, %r12 | |
9479 | wr %g0, 0x40, %asi | |
9480 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
9481 | set 0x00021fff, %l7 | |
9482 | stxa %l7, [%g0 + 0x80] %asi | |
9483 | wr %r12, %g0, %asi | |
9484 | st %g0, [%r23] | |
9485 | sma_2_16: | |
9486 | wrhpr %g0, 0xcc1, %hpstate ! ta T_CHANGE_NONHPRIV | |
9487 | .word 0xe7e7c2c0 ! 29: CASA_I casa [%r31] 0x16, %r0, %r19 | |
9488 | demap_2_17: | |
9489 | nop | |
9490 | mov 0x80, %g3 | |
9491 | ta T_CHANGE_HPRIV | |
9492 | stxa %g3, [%g3] 0x5f | |
9493 | stxa %g3, [%g3] 0x57 | |
9494 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9495 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9496 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9497 | stxa %g3, [%g3] 0x5f | |
9498 | stxa %g3, [%g3] 0x57 | |
9499 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9500 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9501 | stxa %g3, [%g3] 0x57 | |
9502 | stxa %g3, [%g3] 0x57 | |
9503 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9504 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9505 | stxa %g3, [%g3] 0x57 | |
9506 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9507 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9508 | stxa %g3, [%g3] 0x5f | |
9509 | wrhpr %g0, 0x841, %hpstate ! ta T_CHANGE_NONHPRIV | |
9510 | .word 0xe61fe151 ! 33: LDD_I ldd [%r31 + 0x0151], %r19 | |
9511 | #if (defined SPC || defined CMP1) | |
9512 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_18) + 32, 16, 16)) -> intp(6,0,25,,,,,1) | |
9513 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_18)&0xffffffff) + 40, 16, 16)) -> intp(6,0,14,,,,,1) | |
9514 | #else | |
9515 | set 0x7b40cac9, %r28 | |
9516 | #if (MAX_THREADS == 8) | |
9517 | and %r28, 0x7ff, %r28 | |
9518 | #endif | |
9519 | stxa %r28, [%g0] 0x73 | |
9520 | #endif | |
9521 | intvec_2_18: | |
9522 | .word 0x91a049d1 ! 37: FDIVd fdivd %f32, %f48, %f8 | |
9523 | splash_hpstate_2_21: | |
9524 | ta T_CHANGE_NONHPRIV | |
9525 | .word 0x30800001 ! 1: BA ba,a <label_0x1> | |
9526 | .word 0x81983bcd ! 41: WRHPR_HPSTATE_I wrhpr %r0, 0x1bcd, %hpstate | |
9527 | demap_2_23: | |
9528 | nop | |
9529 | mov 0x80, %g3 | |
9530 | ta T_CHANGE_HPRIV | |
9531 | .word 0x07400001 ! 1: FBPUL fbul | |
9532 | stxa %g3, [%g3] 0x5f | |
9533 | stxa %g3, [%g3] 0x5f | |
9534 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9535 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9536 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9537 | stxa %g3, [%g3] 0x5f | |
9538 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9539 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9540 | stxa %g3, [%g3] 0x5f | |
9541 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9542 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9543 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9544 | stxa %g3, [%g3] 0x57 | |
9545 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9546 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9547 | stxa %g3, [%g3] 0x57 | |
9548 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9549 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9550 | wrhpr %g0, 0x1611, %hpstate ! ta T_CHANGE_NONHPRIV | |
9551 | .word 0xe81fe169 ! 45: LDD_I ldd [%r31 + 0x0169], %r20 | |
9552 | fpinit_2_24: | |
9553 | nop | |
9554 | setx fp_data_quads, %r19, %r20 | |
9555 | ldd [%r20], %f0 | |
9556 | ldd [%r20+8], %f4 | |
9557 | ld [%r20+16], %fsr | |
9558 | ld [%r20+24], %r19 | |
9559 | wr %r19, %g0, %gsr | |
9560 | .word 0x8db00484 ! 49: FCMPLE32 fcmple32 %d0, %d4, %r6 | |
9561 | brcommon1_2_25: | |
9562 | nop | |
9563 | nop | |
9564 | setx common_target, %r12, %r27 | |
9565 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
9566 | ba,a .+12 | |
9567 | .word 0xa9b7c7c1 ! 1: PDIST pdistn %d62, %d32, %d20 | |
9568 | ba,a .+8 | |
9569 | jmpl %r27-4, %r27 | |
9570 | .word 0x9bb1848a ! 53: FCMPLE32 fcmple32 %d6, %d10, %r13 | |
9571 | rd %tick, %r28 | |
9572 | #if (MAX_THREADS == 8) | |
9573 | sethi %hi(0x33800), %r27 | |
9574 | #else | |
9575 | sethi %hi(0x30000), %r27 | |
9576 | #endif | |
9577 | andn %r28, %r27, %r28 | |
9578 | ta T_CHANGE_HPRIV | |
9579 | stxa %r28, [%g0] 0x73 | |
9580 | .word 0xa7b444c7 ! 1: FCMPNE32 fcmpne32 %d48, %d38, %r19 | |
9581 | intvec_2_27: | |
9582 | .word 0x97b484d1 ! 57: FCMPNE32 fcmpne32 %d18, %d48, %r11 | |
9583 | .word 0xe927c000 ! 61: STF_R st %f20, [%r0, %r31] | |
9584 | cmp_2_32: | |
9585 | nop | |
9586 | nop | |
9587 | ta T_CHANGE_HPRIV | |
9588 | rd %asi, %r12 | |
9589 | wr %r0, 0x41, %asi | |
9590 | set sync_thr_counter4, %r23 | |
9591 | #ifndef SPC | |
9592 | ldxa [%g0]0x63, %r8 | |
9593 | and %r8, 0x38, %r8 ! Core ID | |
9594 | add %r8, %r23, %r23 | |
9595 | mov 0xff, %r9 | |
9596 | xor %r9, 0x2, %r9 | |
9597 | sllx %r9, %r8, %r9 ! My core mask | |
9598 | #else | |
9599 | mov 0, %r8 | |
9600 | mov 0xff, %r9 | |
9601 | xor %r9, 0x2, %r9 ! My core mask | |
9602 | #endif | |
9603 | mov 0x2, %r10 | |
9604 | cmp_startwait2_32: | |
9605 | cas [%r23],%g0,%r10 !lock | |
9606 | brz,a %r10, continue_cmp_2_32 | |
9607 | ldxa [0x50]%asi, %r13 !Running_rw | |
9608 | ld [%r23], %r10 | |
9609 | cmp_wait2_32: | |
9610 | brnz,a %r10, cmp_wait2_32 | |
9611 | ld [%r23], %r10 | |
9612 | ba cmp_startwait2_32 | |
9613 | mov 0x2, %r10 | |
9614 | continue_cmp_2_32: | |
9615 | ldxa [0x58]%asi, %r14 !Running_status | |
9616 | xnor %r14, %r13, %r14 !Bits equal | |
9617 | brz,a %r8, cmp_multi_core_2_32 | |
9618 | mov 0xef, %r17 | |
9619 | best_set_reg(0x356829fa275faf9d, %r16, %r17) | |
9620 | cmp_multi_core_2_32: | |
9621 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
9622 | and %r14, %r9, %r14 !Apply core-mask | |
9623 | stxa %r14, [0x60]%asi | |
9624 | st %g0, [%r23] !clear lock | |
9625 | wr %g0, %r12, %asi | |
9626 | .word 0x91950013 ! 65: WRPR_PIL_R wrpr %r20, %r19, %pil | |
9627 | splash_cmpr_2_35: | |
9628 | mov 0, %r18 | |
9629 | sllx %r18, 63, %r18 | |
9630 | rd %tick, %r17 | |
9631 | add %r17, 0x70, %r17 | |
9632 | or %r17, %r18, %r17 | |
9633 | .word 0xb3800011 ! 69: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
9634 | jmptr_2_37: | |
9635 | nop | |
9636 | nop | |
9637 | best_set_reg(0xe0a00000, %r20, %r27) | |
9638 | .word 0xb7c6c000 ! 73: JMPL_R jmpl %r27 + %r0, %r27 | |
9639 | jmptr_2_38: | |
9640 | nop | |
9641 | nop | |
9642 | best_set_reg(0xe1200000, %r20, %r27) | |
9643 | .word 0xb7c6c000 ! 77: JMPL_R jmpl %r27 + %r0, %r27 | |
9644 | nop | |
9645 | nop | |
9646 | ta T_CHANGE_HPRIV | |
9647 | mov 0x2+1, %r10 | |
9648 | set sync_thr_counter5, %r23 | |
9649 | #ifndef SPC | |
9650 | ldxa [%g0]0x63, %o1 | |
9651 | and %o1, 0x38, %o1 | |
9652 | add %o1, %r23, %r23 | |
9653 | sllx %o1, 5, %o3 !(CID*256) | |
9654 | #endif | |
9655 | cas [%r23],%g0,%r10 !lock | |
9656 | brnz %r10, cwq_2_39 | |
9657 | rd %asi, %r12 | |
9658 | wr %g0, 0x40, %asi | |
9659 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
9660 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
9661 | cmp %l1, 1 | |
9662 | bne cwq_2_39 | |
9663 | set CWQ_BASE, %l6 | |
9664 | #ifndef SPC | |
9665 | add %l6, %o3, %l6 | |
9666 | #endif | |
9667 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
9668 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
9669 | sllx %l2, 32, %l2 | |
9670 | stx %l2, [%l6 + 0x0] | |
9671 | membar #Sync | |
9672 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
9673 | sub %l2, 0x40, %l2 | |
9674 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
9675 | wr %r12, %g0, %asi | |
9676 | st %g0, [%r23] | |
9677 | cwq_2_39: | |
9678 | wrhpr %g0, 0x189b, %hpstate ! ta T_CHANGE_NONHPRIV | |
9679 | .word 0xa3414000 ! 81: RDPC rd %pc, %r17 | |
9680 | nop | |
9681 | nop | |
9682 | ta T_CHANGE_HPRIV | |
9683 | mov 0x2, %r10 | |
9684 | set sync_thr_counter6, %r23 | |
9685 | #ifndef SPC | |
9686 | ldxa [%g0]0x63, %o1 | |
9687 | and %o1, 0x38, %o1 | |
9688 | add %o1, %r23, %r23 | |
9689 | #endif | |
9690 | cas [%r23],%g0,%r10 !lock | |
9691 | brnz %r10, sma_2_41 | |
9692 | rd %asi, %r12 | |
9693 | wr %g0, 0x40, %asi | |
9694 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
9695 | set 0x00061fff, %l7 | |
9696 | stxa %l7, [%g0 + 0x80] %asi | |
9697 | wr %r12, %g0, %asi | |
9698 | st %g0, [%r23] | |
9699 | sma_2_41: | |
9700 | wrhpr %g0, 0x898, %hpstate ! ta T_CHANGE_NONHPRIV | |
9701 | .word 0xd5e7dd40 ! 85: CASA_I casa [%r31] 0xea, %r0, %r10 | |
9702 | splash_cmpr_2_42: | |
9703 | mov 0, %r18 | |
9704 | sllx %r18, 63, %r18 | |
9705 | rd %tick, %r17 | |
9706 | add %r17, 0x80, %r17 | |
9707 | or %r17, %r18, %r17 | |
9708 | .word 0xb3800011 ! 89: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
9709 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> | |
9710 | .word 0x8d903636 ! 93: WRPR_PSTATE_I wrpr %r0, 0x1636, %pstate | |
9711 | .word 0xe00fe128 ! 97: LDUB_I ldub [%r31 + 0x0128], %r16 | |
9712 | splash_tick_2_48: | |
9713 | nop | |
9714 | nop | |
9715 | ta T_CHANGE_HPRIV | |
9716 | best_set_reg(0x10960001a2cb74b5, %r16, %r17) | |
9717 | .word 0x89800011 ! 101: WRTICK_R wr %r0, %r17, %tick | |
9718 | .word 0xc32fc000 ! 105: STXFSR_R st-sfr %f1, [%r0, %r31] | |
9719 | br_badelay3_2_50: | |
9720 | .word 0xa9a209ca ! 1: FDIVd fdivd %f8, %f10, %f20 | |
9721 | .word 0xc75e2295 ! Random illegal ? | |
9722 | .word 0xa7a00550 ! 1: FSQRTd fsqrt | |
9723 | .word 0xa3a30826 ! 109: FADDs fadds %f12, %f6, %f17 | |
9724 | memptr_2_52: | |
9725 | set 0x60740000, %r31 | |
9726 | .word 0x8582e5c7 ! 113: WRCCR_I wr %r11, 0x05c7, %ccr | |
9727 | demap_2_53: | |
9728 | nop | |
9729 | mov 0x80, %g3 | |
9730 | ta T_CHANGE_HPRIV | |
9731 | .word 0x1e800001 ! 1: BVC bvc <label_0x1> | |
9732 | stxa %g3, [%g3] 0x57 | |
9733 | stxa %g3, [%g3] 0x5f | |
9734 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9735 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9736 | stxa %g3, [%g3] 0x5f | |
9737 | stxa %g3, [%g3] 0x57 | |
9738 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9739 | stxa %g3, [%g3] 0x5f | |
9740 | stxa %g3, [%g3] 0x57 | |
9741 | wrhpr %g0, 0x583, %hpstate ! ta T_CHANGE_NONHPRIV | |
9742 | .word 0xd81fe0f8 ! 117: LDD_I ldd [%r31 + 0x00f8], %r12 | |
9743 | #if (defined SPC || defined CMP1) | |
9744 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_56) + 0, 16, 16)) -> intp(3,0,29,,,,,1) | |
9745 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_56)&0xffffffff) + 16, 16, 16)) -> intp(5,0,28,,,,,1) | |
9746 | #else | |
9747 | set 0xbd20032d, %r28 | |
9748 | #if (MAX_THREADS == 8) | |
9749 | and %r28, 0x7ff, %r28 | |
9750 | #endif | |
9751 | stxa %r28, [%g0] 0x73 | |
9752 | #endif | |
9753 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9754 | intvec_2_56: | |
9755 | .word 0x9f803607 ! 121: SIR sir 0x1607 | |
9756 | nop | |
9757 | nop | |
9758 | ta T_CHANGE_HPRIV ! macro | |
9759 | donret_2_58: | |
9760 | rd %pc, %r12 | |
9761 | mov HIGHVA_HIGHNUM, %r10 | |
9762 | sllx %r10, 32, %r10 | |
9763 | or %r12, %r10, %r12 | |
9764 | add %r12, (donretarg_2_58-donret_2_58), %r12 | |
9765 | add %r12, 0x8, %r11 ! nonseq tnpc | |
9766 | andn %r12, %r10, %r12 ! low VA tpc | |
9767 | wrpr %g0, 0x2, %tl | |
9768 | wrpr %g0, %r12, %tpc | |
9769 | wrpr %g0, %r11, %tnpc | |
9770 | set (0x00e24200 | (16 << 24)), %r13 | |
9771 | and %r12, 0xfff, %r14 | |
9772 | sllx %r14, 32, %r14 | |
9773 | or %r13, %r14, %r20 | |
9774 | wrpr %r20, %g0, %tstate | |
9775 | wrhpr %g0, 0xf04, %htstate | |
9776 | wrhpr %g0, 0x15a, %hpstate ! rand=1 (2) | |
9777 | ldx [%r12+%r0], %g1 | |
9778 | retry | |
9779 | .align 128 | |
9780 | donretarg_2_58: | |
9781 | .word 0xa9a489d2 ! 125: FDIVd fdivd %f18, %f18, %f20 | |
9782 | cmp_2_60: | |
9783 | nop | |
9784 | nop | |
9785 | ta T_CHANGE_HPRIV | |
9786 | rd %asi, %r12 | |
9787 | wr %r0, 0x41, %asi | |
9788 | set sync_thr_counter4, %r23 | |
9789 | #ifndef SPC | |
9790 | ldxa [%g0]0x63, %r8 | |
9791 | and %r8, 0x38, %r8 ! Core ID | |
9792 | add %r8, %r23, %r23 | |
9793 | mov 0xff, %r9 | |
9794 | xor %r9, 0x2, %r9 | |
9795 | sllx %r9, %r8, %r9 ! My core mask | |
9796 | #else | |
9797 | mov 0, %r8 | |
9798 | mov 0xff, %r9 | |
9799 | xor %r9, 0x2, %r9 ! My core mask | |
9800 | #endif | |
9801 | mov 0x2, %r10 | |
9802 | cmp_startwait2_60: | |
9803 | cas [%r23],%g0,%r10 !lock | |
9804 | brz,a %r10, continue_cmp_2_60 | |
9805 | ldxa [0x50]%asi, %r13 !Running_rw | |
9806 | ld [%r23], %r10 | |
9807 | cmp_wait2_60: | |
9808 | brnz,a %r10, cmp_wait2_60 | |
9809 | ld [%r23], %r10 | |
9810 | ba cmp_startwait2_60 | |
9811 | mov 0x2, %r10 | |
9812 | continue_cmp_2_60: | |
9813 | ldxa [0x58]%asi, %r14 !Running_status | |
9814 | xnor %r14, %r13, %r14 !Bits equal | |
9815 | brz,a %r8, cmp_multi_core_2_60 | |
9816 | mov 0xd7, %r17 | |
9817 | best_set_reg(0xbcc6982f26c789ff, %r16, %r17) | |
9818 | cmp_multi_core_2_60: | |
9819 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
9820 | and %r14, %r9, %r14 !Apply core-mask | |
9821 | stxa %r14, [0x60]%asi | |
9822 | st %g0, [%r23] !clear lock | |
9823 | wr %g0, %r12, %asi | |
9824 | .word 0x91950010 ! 129: WRPR_PIL_R wrpr %r20, %r16, %pil | |
9825 | .word 0x24cc4001 ! 133: BRLEZ brlez,a,pt %r17,<label_0xc4001> | |
9826 | .word 0xda07c000 ! 137: LDUW_R lduw [%r31 + %r0], %r13 | |
9827 | splash_tba_2_64: | |
9828 | nop | |
9829 | ta T_CHANGE_PRIV | |
9830 | set 0x120000, %r12 | |
9831 | .word 0x8b90000c ! 141: WRPR_TBA_R wrpr %r0, %r12, %tba | |
9832 | .word 0xd81fc002 ! 145: LDD_R ldd [%r31 + %r2], %r12 | |
9833 | ticken_2_67: | |
9834 | nop | |
9835 | nop | |
9836 | ta T_CHANGE_HPRIV | |
9837 | rd %asi, %r12 | |
9838 | wr %r0, 0x41, %asi | |
9839 | stxa %g0, [0x38]%asi | |
9840 | best_set_reg(0x5243782134a36005, %r16, %r17) | |
9841 | wrpr %g0, %r17, %tick | |
9842 | mov 1, %r16 | |
9843 | stxa %r16, [0x38]%asi | |
9844 | wr %g0, %r12, %asi | |
9845 | .word 0x93b500eb ! 149: EDGE16LN edge16ln %r20, %r11, %r9 | |
9846 | .word 0xa1902007 ! 153: WRPR_GL_I wrpr %r0, 0x0007, %- | |
9847 | brcommon3_2_70: | |
9848 | nop | |
9849 | nop | |
9850 | setx common_target, %r12, %r27 | |
9851 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
9852 | ba,a .+12 | |
9853 | .word 0xe86fe0e0 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x00e0] | |
9854 | ba,a .+8 | |
9855 | jmpl %r27+0, %r27 | |
9856 | .word 0x00800001 ! 157: BN bn <label_0x1> | |
9857 | brcommon1_2_71: | |
9858 | nop | |
9859 | nop | |
9860 | setx common_target, %r12, %r27 | |
9861 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
9862 | ba,a .+12 | |
9863 | .word 0xa9b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d20 | |
9864 | ba,a .+8 | |
9865 | jmpl %r27-0, %r27 | |
9866 | .word 0x87ac4a45 ! 161: FCMPd fcmpd %fcc<n>, %f48, %f36 | |
9867 | #if (defined SPC || defined CMP1) | |
9868 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_74) + 56, 16, 16)) -> intp(2,0,13,,,,,1) | |
9869 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_74)&0xffffffff) + 0, 16, 16)) -> intp(4,0,19,,,,,1) | |
9870 | #else | |
9871 | set 0x6c9042ec, %r28 | |
9872 | #if (MAX_THREADS == 8) | |
9873 | and %r28, 0x7ff, %r28 | |
9874 | #endif | |
9875 | stxa %r28, [%g0] 0x73 | |
9876 | #endif | |
9877 | .word 0x95b504d0 ! 1: FCMPNE32 fcmpne32 %d20, %d16, %r10 | |
9878 | intvec_2_74: | |
9879 | .word 0x95a049d2 ! 165: FDIVd fdivd %f32, %f18, %f10 | |
9880 | .word 0xc30fc000 ! 169: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
9881 | .word 0xd22fe0fe ! 173: STB_I stb %r9, [%r31 + 0x00fe] | |
9882 | cmp_2_80: | |
9883 | nop | |
9884 | nop | |
9885 | ta T_CHANGE_HPRIV | |
9886 | rd %asi, %r12 | |
9887 | wr %r0, 0x41, %asi | |
9888 | set sync_thr_counter4, %r23 | |
9889 | #ifndef SPC | |
9890 | ldxa [%g0]0x63, %r8 | |
9891 | and %r8, 0x38, %r8 ! Core ID | |
9892 | add %r8, %r23, %r23 | |
9893 | mov 0xff, %r9 | |
9894 | xor %r9, 0x2, %r9 | |
9895 | sllx %r9, %r8, %r9 ! My core mask | |
9896 | #else | |
9897 | mov 0, %r8 | |
9898 | mov 0xff, %r9 | |
9899 | xor %r9, 0x2, %r9 ! My core mask | |
9900 | #endif | |
9901 | mov 0x2, %r10 | |
9902 | cmp_startwait2_80: | |
9903 | cas [%r23],%g0,%r10 !lock | |
9904 | brz,a %r10, continue_cmp_2_80 | |
9905 | ldxa [0x50]%asi, %r13 !Running_rw | |
9906 | ld [%r23], %r10 | |
9907 | cmp_wait2_80: | |
9908 | brnz,a %r10, cmp_wait2_80 | |
9909 | ld [%r23], %r10 | |
9910 | ba cmp_startwait2_80 | |
9911 | mov 0x2, %r10 | |
9912 | continue_cmp_2_80: | |
9913 | ldxa [0x58]%asi, %r14 !Running_status | |
9914 | xnor %r14, %r13, %r14 !Bits equal | |
9915 | brz,a %r8, cmp_multi_core_2_80 | |
9916 | mov 0x8d, %r17 | |
9917 | best_set_reg(0xc140fe4d23903448, %r16, %r17) | |
9918 | cmp_multi_core_2_80: | |
9919 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
9920 | and %r14, %r9, %r14 !Apply core-mask | |
9921 | stxa %r14, [0x60]%asi | |
9922 | st %g0, [%r23] !clear lock | |
9923 | wr %g0, %r12, %asi | |
9924 | wrhpr %g0, 0x5d9, %hpstate ! ta T_CHANGE_NONHPRIV | |
9925 | .word 0x9192c010 ! 177: WRPR_PIL_R wrpr %r11, %r16, %pil | |
9926 | rd %tick, %r28 | |
9927 | #if (MAX_THREADS == 8) | |
9928 | sethi %hi(0x33800), %r27 | |
9929 | #else | |
9930 | sethi %hi(0x30000), %r27 | |
9931 | #endif | |
9932 | andn %r28, %r27, %r28 | |
9933 | ta T_CHANGE_HPRIV | |
9934 | stxa %r28, [%g0] 0x73 | |
9935 | .word 0x97a4c9c4 ! 1: FDIVd fdivd %f50, %f4, %f42 | |
9936 | intvec_2_81: | |
9937 | .word 0x91a449d4 ! 181: FDIVd fdivd %f48, %f20, %f8 | |
9938 | jmptr_2_83: | |
9939 | nop | |
9940 | nop | |
9941 | best_set_reg(0xe1a00000, %r20, %r27) | |
9942 | .word 0xb7c6c000 ! 185: JMPL_R jmpl %r27 + %r0, %r27 | |
9943 | .word 0xe19fda00 ! 189: LDDFA_R ldda [%r31, %r0], %f16 | |
9944 | .word 0x81dac014 ! 193: FLUSH_R flush %r11, %r20, %r0 | |
9945 | jmptr_2_87: | |
9946 | nop | |
9947 | nop | |
9948 | best_set_reg(0xe0200000, %r20, %r27) | |
9949 | .word 0xb7c6c000 ! 197: JMPL_R jmpl %r27 + %r0, %r27 | |
9950 | splash_lsu_2_89: | |
9951 | nop | |
9952 | nop | |
9953 | ta T_CHANGE_HPRIV | |
9954 | set 0xb99cb2b5, %r2 | |
9955 | mov 0x4, %r1 | |
9956 | sllx %r1, 32, %r1 | |
9957 | or %r1, %r2, %r2 | |
9958 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
9959 | .word 0x3d400001 ! 201: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
9960 | .word 0x8d9026ed ! 205: WRPR_PSTATE_I wrpr %r0, 0x06ed, %pstate | |
9961 | nop | |
9962 | nop | |
9963 | ta T_CHANGE_HPRIV ! macro | |
9964 | donret_2_92: | |
9965 | rd %pc, %r12 | |
9966 | mov HIGHVA_HIGHNUM, %r10 | |
9967 | sllx %r10, 32, %r10 | |
9968 | or %r12, %r10, %r12 | |
9969 | add %r12, (donretarg_2_92-donret_2_92), %r12 | |
9970 | add %r12, 0x8, %r11 ! nonseq tnpc | |
9971 | andn %r12, %r10, %r12 ! low VA tpc | |
9972 | wrpr %g0, 0x1, %tl | |
9973 | wrpr %g0, %r12, %tpc | |
9974 | wrpr %g0, %r11, %tnpc | |
9975 | set (0x00240b00 | (0x83 << 24)), %r13 | |
9976 | and %r12, 0xfff, %r14 | |
9977 | sllx %r14, 32, %r14 | |
9978 | or %r13, %r14, %r20 | |
9979 | wrpr %r20, %g0, %tstate | |
9980 | wrhpr %g0, 0x4d5, %htstate | |
9981 | wrpr %g0, 0x26b, %pstate ! rand=0 (2) | |
9982 | .word 0x10800001 ! 1: BA ba <label_0x1> | |
9983 | ldx [%r12+%r0], %g1 | |
9984 | retry | |
9985 | donretarg_2_92: | |
9986 | .word 0xa3a149c4 ! 209: FDIVd fdivd %f36, %f4, %f48 | |
9987 | #if (defined SPC || defined CMP1) | |
9988 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_94) + 24, 16, 16)) -> intp(6,0,6,,,,,1) | |
9989 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_94)&0xffffffff) + 56, 16, 16)) -> intp(1,0,20,,,,,1) | |
9990 | #else | |
9991 | set 0x66903968, %r28 | |
9992 | #if (MAX_THREADS == 8) | |
9993 | and %r28, 0x7ff, %r28 | |
9994 | #endif | |
9995 | stxa %r28, [%g0] 0x73 | |
9996 | #endif | |
9997 | intvec_2_94: | |
9998 | .word 0x91a449c9 ! 213: FDIVd fdivd %f48, %f40, %f8 | |
9999 | #if (defined SPC || defined CMP) | |
10000 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_2_96)+40, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1) | |
10001 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_2_96)&0xffffffff) + 0, 16, 16)) -> intp(mask2tid(0x2),1,3,,,,,1) | |
10002 | xir_2_96: | |
10003 | #else | |
10004 | #if (defined FC) | |
10005 | !! Generate XIR via RESET_GEN register | |
10006 | ta T_CHANGE_HPRIV | |
10007 | rdpr %pstate, %r18 | |
10008 | andn %r18, 0x208, %r18 ! Reset pstate.am,cle | |
10009 | wrpr %r18, %pstate | |
10010 | #ifndef XIR_RND_CORES | |
10011 | ldxa [%g0] 0x63, %o1 | |
10012 | mov 1, %r18 | |
10013 | sllx %r18, %o1, %r18 | |
10014 | #endif | |
10015 | mov 0x30, %r19 | |
10016 | setx 0x8900000808, %r16, %r17 | |
10017 | mov 0x2, %r16 | |
10018 | xir_2_96: | |
10019 | stxa %r18, [%r19] 0x41 | |
10020 | stx %r16, [%r17] | |
10021 | #endif | |
10022 | #endif | |
10023 | .word 0xa981220f ! 217: WR_SET_SOFTINT_I wr %r4, 0x020f, %set_softint | |
10024 | splash_tick_2_99: | |
10025 | nop | |
10026 | nop | |
10027 | ta T_CHANGE_HPRIV | |
10028 | best_set_reg(0xc446f7f70e362a19, %r16, %r17) | |
10029 | .word 0x89800011 ! 221: WRTICK_R wr %r0, %r17, %tick | |
10030 | .word 0xd8ffe0d0 ! 225: SWAPA_I swapa %r12, [%r31 + 0x00d0] %asi | |
10031 | splash_hpstate_2_102: | |
10032 | .word 0x8198331f ! 229: WRHPR_HPSTATE_I wrhpr %r0, 0x131f, %hpstate | |
10033 | intveclr_2_105: | |
10034 | nop | |
10035 | nop | |
10036 | ta T_CHANGE_HPRIV | |
10037 | setx 0xdb2ac96fe9ca3a85, %r1, %r28 | |
10038 | stxa %r28, [%g0] 0x72 | |
10039 | wrhpr %g0, 0x89b, %hpstate ! ta T_CHANGE_NONHPRIV | |
10040 | .word 0x25400001 ! 233: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10041 | splash_lsu_2_108: | |
10042 | nop | |
10043 | nop | |
10044 | ta T_CHANGE_HPRIV | |
10045 | set 0x4f1a0d7a, %r2 | |
10046 | mov 0x2, %r1 | |
10047 | sllx %r1, 32, %r1 | |
10048 | or %r1, %r2, %r2 | |
10049 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10050 | .word 0x1d400001 ! 237: FBPULE fbule | |
10051 | nop | |
10052 | nop | |
10053 | ta T_CHANGE_HPRIV ! macro | |
10054 | donret_2_110: | |
10055 | rd %pc, %r12 | |
10056 | mov HIGHVA_HIGHNUM, %r10 | |
10057 | sllx %r10, 32, %r10 | |
10058 | or %r12, %r10, %r12 | |
10059 | add %r12, (donretarg_2_110-donret_2_110+4), %r12 | |
10060 | add %r12, 0x4, %r11 ! seq tnpc | |
10061 | wrpr %g0, 0x1, %tl | |
10062 | wrpr %g0, %r12, %tpc | |
10063 | wrpr %g0, %r11, %tnpc | |
10064 | set (0x00730600 | (0x83 << 24)), %r13 | |
10065 | and %r12, 0xfff, %r14 | |
10066 | sllx %r14, 32, %r14 | |
10067 | or %r13, %r14, %r20 | |
10068 | wrpr %r20, %g0, %tstate | |
10069 | wrhpr %g0, 0x160e, %htstate | |
10070 | wrpr %g0, 0x1491, %pstate ! rand=0 (2) | |
10071 | ldx [%r12+%r0], %g1 | |
10072 | retry | |
10073 | .align 512 | |
10074 | donretarg_2_110: | |
10075 | .word 0x95a049d0 ! 241: FDIVd fdivd %f32, %f16, %f10 | |
10076 | .word 0xe83fc000 ! 245: STD_R std %r20, [%r31 + %r0] | |
10077 | .word 0xe8cfc540 ! 249: LDSBA_R ldsba [%r31, %r0] 0x2a, %r20 | |
10078 | #if (defined SPC || defined CMP1) | |
10079 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_112) + 24, 16, 16)) -> intp(0,0,17,,,,,1) | |
10080 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_112)&0xffffffff) + 16, 16, 16)) -> intp(7,0,23,,,,,1) | |
10081 | #else | |
10082 | set 0x5660b5f7, %r28 | |
10083 | #if (MAX_THREADS == 8) | |
10084 | and %r28, 0x7ff, %r28 | |
10085 | #endif | |
10086 | stxa %r28, [%g0] 0x73 | |
10087 | #endif | |
10088 | .word 0x19400001 ! 1: FBPUGE fbuge | |
10089 | intvec_2_112: | |
10090 | .word 0xa5b444d3 ! 253: FCMPNE32 fcmpne32 %d48, %d50, %r18 | |
10091 | .word 0xe037e09e ! 257: STH_I sth %r16, [%r31 + 0x009e] | |
10092 | .word 0xc30fc000 ! 261: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
10093 | jmptr_2_116: | |
10094 | nop | |
10095 | nop | |
10096 | best_set_reg(0xe0a00000, %r20, %r27) | |
10097 | .word 0xb7c6c000 ! 265: JMPL_R jmpl %r27 + %r0, %r27 | |
10098 | splash_hpstate_2_117: | |
10099 | ta T_CHANGE_NONHPRIV | |
10100 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> | |
10101 | .word 0x8198240e ! 269: WRHPR_HPSTATE_I wrhpr %r0, 0x040e, %hpstate | |
10102 | set 0xd06, %l3 | |
10103 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
10104 | .word 0xa1b147c9 ! 273: PDIST pdistn %d36, %d40, %d16 | |
10105 | splash_lsu_2_120: | |
10106 | nop | |
10107 | nop | |
10108 | ta T_CHANGE_HPRIV | |
10109 | set 0x218b3632, %r2 | |
10110 | mov 0x2, %r1 | |
10111 | sllx %r1, 32, %r1 | |
10112 | or %r1, %r2, %r2 | |
10113 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10114 | .word 0x3d400001 ! 277: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
10115 | splash_hpstate_2_122: | |
10116 | .word 0x819823f1 ! 281: WRHPR_HPSTATE_I wrhpr %r0, 0x03f1, %hpstate | |
10117 | splash_lsu_2_124: | |
10118 | nop | |
10119 | nop | |
10120 | ta T_CHANGE_HPRIV | |
10121 | set 0x9b0748fd, %r2 | |
10122 | mov 0x5, %r1 | |
10123 | sllx %r1, 32, %r1 | |
10124 | or %r1, %r2, %r2 | |
10125 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10126 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10127 | .word 0x1d400001 ! 285: FBPULE fbule | |
10128 | cmp_2_125: | |
10129 | nop | |
10130 | nop | |
10131 | ta T_CHANGE_HPRIV | |
10132 | rd %asi, %r12 | |
10133 | wr %r0, 0x41, %asi | |
10134 | set sync_thr_counter4, %r23 | |
10135 | #ifndef SPC | |
10136 | ldxa [%g0]0x63, %r8 | |
10137 | and %r8, 0x38, %r8 ! Core ID | |
10138 | add %r8, %r23, %r23 | |
10139 | mov 0xff, %r9 | |
10140 | xor %r9, 0x2, %r9 | |
10141 | sllx %r9, %r8, %r9 ! My core mask | |
10142 | #else | |
10143 | mov 0, %r8 | |
10144 | mov 0xff, %r9 | |
10145 | xor %r9, 0x2, %r9 ! My core mask | |
10146 | #endif | |
10147 | mov 0x2, %r10 | |
10148 | cmp_startwait2_125: | |
10149 | cas [%r23],%g0,%r10 !lock | |
10150 | brz,a %r10, continue_cmp_2_125 | |
10151 | ldxa [0x50]%asi, %r13 !Running_rw | |
10152 | ld [%r23], %r10 | |
10153 | cmp_wait2_125: | |
10154 | brnz,a %r10, cmp_wait2_125 | |
10155 | ld [%r23], %r10 | |
10156 | ba cmp_startwait2_125 | |
10157 | mov 0x2, %r10 | |
10158 | continue_cmp_2_125: | |
10159 | ldxa [0x58]%asi, %r14 !Running_status | |
10160 | xnor %r14, %r13, %r14 !Bits equal | |
10161 | brz,a %r8, cmp_multi_core_2_125 | |
10162 | mov 42, %r17 | |
10163 | best_set_reg(0x6b6048a1321d3200, %r16, %r17) | |
10164 | cmp_multi_core_2_125: | |
10165 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
10166 | and %r14, %r9, %r14 !Apply core-mask | |
10167 | stxa %r14, [0x68]%asi | |
10168 | st %g0, [%r23] !clear lock | |
10169 | wr %g0, %r12, %asi | |
10170 | wrhpr %g0, 0x1509, %hpstate ! ta T_CHANGE_NONHPRIV | |
10171 | .word 0xd49fd923 ! 289: LDDA_R ldda [%r31, %r3] 0xc9, %r10 | |
10172 | .word 0xe3e7e001 ! 293: CASA_R casa [%r31] %asi, %r1, %r17 | |
10173 | .word 0xd047c000 ! 297: LDSW_R ldsw [%r31 + %r0], %r8 | |
10174 | brcommon3_2_129: | |
10175 | nop | |
10176 | nop | |
10177 | setx common_target, %r12, %r27 | |
10178 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
10179 | ba,a .+12 | |
10180 | .word 0xd06fe1a0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01a0] | |
10181 | ba,a .+8 | |
10182 | jmpl %r27+0, %r27 | |
10183 | .word 0x20800001 ! 301: BN bn,a <label_0x1> | |
10184 | .word 0xe727e106 ! 305: STF_I st %f19, [0x0106, %r31] | |
10185 | ticken_2_132: | |
10186 | nop | |
10187 | nop | |
10188 | ta T_CHANGE_HPRIV | |
10189 | rd %asi, %r12 | |
10190 | wr %r0, 0x41, %asi | |
10191 | stxa %g0, [0x38]%asi | |
10192 | best_set_reg(0xfbea1ff00b7be315, %r16, %r17) | |
10193 | wrpr %g0, %r17, %tick | |
10194 | mov 1, %r16 | |
10195 | stxa %r16, [0x38]%asi | |
10196 | wr %g0, %r12, %asi | |
10197 | .word 0xa3b280ea ! 309: EDGE16LN edge16ln %r10, %r10, %r17 | |
10198 | .word 0xa953c000 ! 313: RDPR_FQ <illegal instruction> | |
10199 | .word 0xc1bfde00 ! 317: STDFA_R stda %f0, [%r0, %r31] | |
10200 | .word 0xe21fc001 ! 321: LDD_R ldd [%r31 + %r1], %r17 | |
10201 | splash_tick_2_137: | |
10202 | nop | |
10203 | nop | |
10204 | ta T_CHANGE_HPRIV | |
10205 | best_set_reg(0xd0c0f1a506e67641, %r16, %r17) | |
10206 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick | |
10207 | .word 0xa78433da ! 329: WR_GRAPHICS_STATUS_REG_I wr %r16, 0x13da, %- | |
10208 | .word 0xe127e0d4 ! 333: STF_I st %f16, [0x00d4, %r31] | |
10209 | jmptr_2_140: | |
10210 | nop | |
10211 | nop | |
10212 | best_set_reg(0xe1200000, %r20, %r27) | |
10213 | .word 0xb7c6c000 ! 337: JMPL_R jmpl %r27 + %r0, %r27 | |
10214 | .word 0xd8c7d000 ! 341: LDSWA_R ldswa [%r31, %r0] 0x80, %r12 | |
10215 | .word 0x8d903303 ! 345: WRPR_PSTATE_I wrpr %r0, 0x1303, %pstate | |
10216 | cmp_2_146: | |
10217 | nop | |
10218 | nop | |
10219 | ta T_CHANGE_HPRIV | |
10220 | rd %asi, %r12 | |
10221 | wr %r0, 0x41, %asi | |
10222 | set sync_thr_counter4, %r23 | |
10223 | #ifndef SPC | |
10224 | ldxa [%g0]0x63, %r8 | |
10225 | and %r8, 0x38, %r8 ! Core ID | |
10226 | add %r8, %r23, %r23 | |
10227 | mov 0xff, %r9 | |
10228 | xor %r9, 0x2, %r9 | |
10229 | sllx %r9, %r8, %r9 ! My core mask | |
10230 | #else | |
10231 | mov 0, %r8 | |
10232 | mov 0xff, %r9 | |
10233 | xor %r9, 0x2, %r9 ! My core mask | |
10234 | #endif | |
10235 | mov 0x2, %r10 | |
10236 | cmp_startwait2_146: | |
10237 | cas [%r23],%g0,%r10 !lock | |
10238 | brz,a %r10, continue_cmp_2_146 | |
10239 | ldxa [0x50]%asi, %r13 !Running_rw | |
10240 | ld [%r23], %r10 | |
10241 | cmp_wait2_146: | |
10242 | brnz,a %r10, cmp_wait2_146 | |
10243 | ld [%r23], %r10 | |
10244 | ba cmp_startwait2_146 | |
10245 | mov 0x2, %r10 | |
10246 | continue_cmp_2_146: | |
10247 | ldxa [0x58]%asi, %r14 !Running_status | |
10248 | xnor %r14, %r13, %r14 !Bits equal | |
10249 | brz,a %r8, cmp_multi_core_2_146 | |
10250 | mov 42, %r17 | |
10251 | best_set_reg(0xdbbeb2a4f39d0d52, %r16, %r17) | |
10252 | cmp_multi_core_2_146: | |
10253 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
10254 | and %r14, %r9, %r14 !Apply core-mask | |
10255 | stxa %r14, [0x60]%asi | |
10256 | st %g0, [%r23] !clear lock | |
10257 | wr %g0, %r12, %asi | |
10258 | .word 0x9190800d ! 349: WRPR_PIL_R wrpr %r2, %r13, %pil | |
10259 | ticken_2_147: | |
10260 | nop | |
10261 | nop | |
10262 | ta T_CHANGE_HPRIV | |
10263 | rd %asi, %r12 | |
10264 | wr %r0, 0x41, %asi | |
10265 | stxa %g0, [0x38]%asi | |
10266 | best_set_reg(0x715832d473dccab9, %r16, %r17) | |
10267 | wrpr %g0, %r17, %tick | |
10268 | mov 1, %r16 | |
10269 | stxa %r16, [0x38]%asi | |
10270 | wr %g0, %r12, %asi | |
10271 | .word 0x97b040e9 ! 353: EDGE16LN edge16ln %r1, %r9, %r11 | |
10272 | jmptr_2_150: | |
10273 | nop | |
10274 | nop | |
10275 | best_set_reg(0xe1a00000, %r20, %r27) | |
10276 | .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 | |
10277 | .word 0xe4800b60 ! 361: LDUWA_R lduwa [%r0, %r0] 0x5b, %r18 | |
10278 | .word 0xd337e1c8 ! 365: STQF_I - %f9, [0x01c8, %r31] | |
10279 | jmptr_2_155: | |
10280 | nop | |
10281 | nop | |
10282 | best_set_reg(0xe0200000, %r20, %r27) | |
10283 | .word 0xb7c6c000 ! 369: JMPL_R jmpl %r27 + %r0, %r27 | |
10284 | jmptr_2_159: | |
10285 | nop | |
10286 | nop | |
10287 | best_set_reg(0xe0a00000, %r20, %r27) | |
10288 | .word 0xb7c6c000 ! 373: JMPL_R jmpl %r27 + %r0, %r27 | |
10289 | .word 0xe44fc000 ! 377: LDSB_R ldsb [%r31 + %r0], %r18 | |
10290 | .word 0xe3e7e003 ! 381: CASA_R casa [%r31] %asi, %r3, %r17 | |
10291 | rd %tick, %r28 | |
10292 | #if (MAX_THREADS == 8) | |
10293 | sethi %hi(0x33800), %r27 | |
10294 | #else | |
10295 | sethi %hi(0x30000), %r27 | |
10296 | #endif | |
10297 | andn %r28, %r27, %r28 | |
10298 | ta T_CHANGE_HPRIV | |
10299 | stxa %r28, [%g0] 0x73 | |
10300 | .word 0xa3b304d2 ! 1: FCMPNE32 fcmpne32 %d12, %d18, %r17 | |
10301 | intvec_2_163: | |
10302 | .word 0x19400001 ! 385: FBPUGE fbuge | |
10303 | brcommon3_2_164: | |
10304 | nop | |
10305 | nop | |
10306 | setx common_target, %r12, %r27 | |
10307 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
10308 | ba,a .+12 | |
10309 | .word 0xe46fe1c0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x01c0] | |
10310 | ba,a .+8 | |
10311 | jmpl %r27+0, %r27 | |
10312 | .word 0x8d90350d ! 389: WRPR_PSTATE_I wrpr %r0, 0x150d, %pstate | |
10313 | .word 0xe4800b40 ! 393: LDUWA_R lduwa [%r0, %r0] 0x5a, %r18 | |
10314 | .word 0x8d903996 ! 397: WRPR_PSTATE_I wrpr %r0, 0x1996, %pstate | |
10315 | .word 0xe4c7c280 ! 401: LDSWA_R ldswa [%r31, %r0] 0x14, %r18 | |
10316 | splash_tba_2_171: | |
10317 | nop | |
10318 | ta T_CHANGE_PRIV | |
10319 | setx 0x0000000000380000, %r11, %r12 | |
10320 | .word 0x8b90000c ! 405: WRPR_TBA_R wrpr %r0, %r12, %tba | |
10321 | brcommon1_2_173: | |
10322 | nop | |
10323 | nop | |
10324 | setx common_target, %r12, %r27 | |
10325 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
10326 | ba,a .+12 | |
10327 | .word 0xc32fe0d0 ! 1: STXFSR_I st-sfr %f1, [0x00d0, %r31] | |
10328 | ba,a .+8 | |
10329 | jmpl %r27-0, %r27 | |
10330 | .word 0xa7b0c7c1 ! 409: PDIST pdistn %d34, %d32, %d50 | |
10331 | splash_lsu_2_175: | |
10332 | nop | |
10333 | nop | |
10334 | ta T_CHANGE_HPRIV | |
10335 | set 0x71d0ca76, %r2 | |
10336 | mov 0x4, %r1 | |
10337 | sllx %r1, 32, %r1 | |
10338 | or %r1, %r2, %r2 | |
10339 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> | |
10340 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10341 | .word 0x1d400001 ! 413: FBPULE fbule | |
10342 | .word 0xc1bfe100 ! 417: STDFA_I stda %f0, [0x0100, %r31] | |
10343 | .word 0xd897c2c0 ! 421: LDUHA_R lduha [%r31, %r0] 0x16, %r12 | |
10344 | cmp_2_179: | |
10345 | nop | |
10346 | nop | |
10347 | ta T_CHANGE_HPRIV | |
10348 | rd %asi, %r12 | |
10349 | wr %r0, 0x41, %asi | |
10350 | set sync_thr_counter4, %r23 | |
10351 | #ifndef SPC | |
10352 | ldxa [%g0]0x63, %r8 | |
10353 | and %r8, 0x38, %r8 ! Core ID | |
10354 | add %r8, %r23, %r23 | |
10355 | mov 0xff, %r9 | |
10356 | xor %r9, 0x2, %r9 | |
10357 | sllx %r9, %r8, %r9 ! My core mask | |
10358 | #else | |
10359 | mov 0, %r8 | |
10360 | mov 0xff, %r9 | |
10361 | xor %r9, 0x2, %r9 ! My core mask | |
10362 | #endif | |
10363 | mov 0x2, %r10 | |
10364 | cmp_startwait2_179: | |
10365 | cas [%r23],%g0,%r10 !lock | |
10366 | brz,a %r10, continue_cmp_2_179 | |
10367 | ldxa [0x50]%asi, %r13 !Running_rw | |
10368 | ld [%r23], %r10 | |
10369 | cmp_wait2_179: | |
10370 | brnz,a %r10, cmp_wait2_179 | |
10371 | ld [%r23], %r10 | |
10372 | ba cmp_startwait2_179 | |
10373 | mov 0x2, %r10 | |
10374 | continue_cmp_2_179: | |
10375 | ldxa [0x58]%asi, %r14 !Running_status | |
10376 | xnor %r14, %r13, %r14 !Bits equal | |
10377 | brz,a %r8, cmp_multi_core_2_179 | |
10378 | mov 0x86, %r17 | |
10379 | best_set_reg(0xe1b186f273061149, %r16, %r17) | |
10380 | cmp_multi_core_2_179: | |
10381 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
10382 | and %r14, %r9, %r14 !Apply core-mask | |
10383 | stxa %r14, [0x68]%asi | |
10384 | st %g0, [%r23] !clear lock | |
10385 | wr %g0, %r12, %asi | |
10386 | wrhpr %g0, 0x171b, %hpstate ! ta T_CHANGE_NONHPRIV | |
10387 | .word 0xda9fd160 ! 425: LDDA_R ldda [%r31, %r0] 0x8b, %r13 | |
10388 | brcommon3_2_181: | |
10389 | nop | |
10390 | setx common_target, %r12, %r27 | |
10391 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
10392 | ba,a .+12 | |
10393 | .word 0xe537c002 ! 1: STQF_R - %f18, [%r2, %r31] | |
10394 | ba,a .+8 | |
10395 | jmpl %r27+0, %r27 | |
10396 | stxa %r6, [%r0] ASI_LSU_CONTROL | |
10397 | .word 0xa9aac831 ! 429: FMOVGE fmovs %fcc1, %f17, %f20 | |
10398 | pmu_2_182: | |
10399 | nop | |
10400 | nop | |
10401 | setx 0xffffffbdffffffa3, %g1, %g7 | |
10402 | .word 0xa3800007 ! 433: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
10403 | fpinit_2_184: | |
10404 | nop | |
10405 | setx fp_data_quads, %r19, %r20 | |
10406 | ldd [%r20], %f0 | |
10407 | ldd [%r20+8], %f4 | |
10408 | ld [%r20+16], %fsr | |
10409 | ld [%r20+24], %r19 | |
10410 | wr %r19, %g0, %gsr | |
10411 | .word 0x89b00484 ! 437: FCMPLE32 fcmple32 %d0, %d4, %r4 | |
10412 | .word 0xd6800b40 ! 441: LDUWA_R lduwa [%r0, %r0] 0x5a, %r11 | |
10413 | .word 0xe4c7c600 ! 445: LDSWA_R ldswa [%r31, %r0] 0x30, %r18 | |
10414 | .word 0xe337c000 ! 449: STQF_R - %f17, [%r0, %r31] | |
10415 | nop | |
10416 | nop | |
10417 | ta T_CHANGE_HPRIV ! macro | |
10418 | donret_2_190: | |
10419 | rd %pc, %r12 | |
10420 | mov HIGHVA_HIGHNUM, %r10 | |
10421 | sllx %r10, 32, %r10 | |
10422 | or %r12, %r10, %r12 | |
10423 | add %r12, (donretarg_2_190-donret_2_190), %r12 | |
10424 | add %r12, 0x8, %r11 ! nonseq tnpc | |
10425 | wrpr %g0, 0x2, %tl | |
10426 | wrpr %g0, %r12, %tpc | |
10427 | wrpr %g0, %r11, %tnpc | |
10428 | set (0x0041eb00 | (0x8b << 24)), %r13 | |
10429 | and %r12, 0xfff, %r14 | |
10430 | sllx %r14, 32, %r14 | |
10431 | or %r13, %r14, %r20 | |
10432 | wrpr %r20, %g0, %tstate | |
10433 | wrhpr %g0, 0x144, %htstate | |
10434 | wrpr %g0, 0xa91, %pstate ! rand=0 (2) | |
10435 | retry | |
10436 | .align 512 | |
10437 | donretarg_2_190: | |
10438 | .word 0x24cd0001 ! 453: BRLEZ brlez,a,pt %r20,<label_0xd0001> | |
10439 | splash_htba_2_193: | |
10440 | nop | |
10441 | ta T_CHANGE_HPRIV | |
10442 | setx 0x00000000002a0000, %r11, %r12 | |
10443 | .word 0x8b98000c ! 457: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
10444 | splash_htba_2_195: | |
10445 | nop | |
10446 | ta T_CHANGE_HPRIV | |
10447 | setx 0x0000000200280000, %r11, %r12 | |
10448 | .word 0x8b98000c ! 461: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
10449 | trapasi_2_197: | |
10450 | nop | |
10451 | mov 0x10, %r1 ! (VA for ASI 0x49) | |
10452 | .word 0xdad84920 ! 465: LDXA_R ldxa [%r1, %r0] 0x49, %r13 | |
10453 | #if (defined SPC || defined CMP1) | |
10454 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_200) + 8, 16, 16)) -> intp(7,0,23,,,,,1) | |
10455 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_2_200)&0xffffffff) + 56, 16, 16)) -> intp(1,0,21,,,,,1) | |
10456 | #else | |
10457 | set 0x57900028, %r28 | |
10458 | #if (MAX_THREADS == 8) | |
10459 | and %r28, 0x7ff, %r28 | |
10460 | #endif | |
10461 | stxa %r28, [%g0] 0x73 | |
10462 | #endif | |
10463 | intvec_2_200: | |
10464 | .word 0x97b304d0 ! 469: FCMPNE32 fcmpne32 %d12, %d16, %r11 | |
10465 | .word 0xc1bfe020 ! 473: STDFA_I stda %f0, [0x0020, %r31] | |
10466 | splash_tick_2_203: | |
10467 | nop | |
10468 | nop | |
10469 | ta T_CHANGE_HPRIV | |
10470 | best_set_reg(0x27b4cc4322f6c350, %r16, %r17) | |
10471 | .word 0x89800011 ! 477: WRTICK_R wr %r0, %r17, %tick | |
10472 | splash_hpstate_2_204: | |
10473 | .word 0x1b400001 ! 1: FBPLE fble | |
10474 | .word 0x81983196 ! 481: WRHPR_HPSTATE_I wrhpr %r0, 0x1196, %hpstate | |
10475 | nop | |
10476 | nop | |
10477 | ta T_CHANGE_HPRIV ! macro | |
10478 | donret_2_206: | |
10479 | rd %pc, %r12 | |
10480 | mov HIGHVA_HIGHNUM, %r10 | |
10481 | sllx %r10, 32, %r10 | |
10482 | or %r12, %r10, %r12 | |
10483 | add %r12, (donretarg_2_206-donret_2_206+4), %r12 | |
10484 | add %r12, 0x4, %r11 ! seq tnpc | |
10485 | wrpr %g0, 0x2, %tl | |
10486 | wrpr %g0, %r12, %tpc | |
10487 | wrpr %g0, %r11, %tnpc | |
10488 | set (0x00f9d900 | (0x83 << 24)), %r13 | |
10489 | and %r12, 0xfff, %r14 | |
10490 | sllx %r14, 32, %r14 | |
10491 | or %r13, %r14, %r20 | |
10492 | wrpr %r20, %g0, %tstate | |
10493 | wrhpr %g0, 0xfdf, %htstate | |
10494 | wrhpr %g0, 0x1443, %hpstate ! rand=1 (2) | |
10495 | ldx [%r12+%r0], %g1 | |
10496 | retry | |
10497 | donretarg_2_206: | |
10498 | .word 0xd66fe10f ! 485: LDSTUB_I ldstub %r11, [%r31 + 0x010f] | |
10499 | brcommon2_2_208: | |
10500 | nop | |
10501 | nop | |
10502 | setx common_target, %r12, %r27 | |
10503 | ba,a .+12 | |
10504 | .word 0x93a00549 ! 1: FSQRTd fsqrt | |
10505 | ba,a .+8 | |
10506 | jmpl %r27-4, %r27 | |
10507 | .word 0xe19fd920 ! 489: LDDFA_R ldda [%r31, %r0], %f16 | |
10508 | splash_cmpr_2_210: | |
10509 | mov 0, %r18 | |
10510 | sllx %r18, 63, %r18 | |
10511 | rd %tick, %r17 | |
10512 | add %r17, 0x100, %r17 | |
10513 | or %r17, %r18, %r17 | |
10514 | ta T_CHANGE_HPRIV | |
10515 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
10516 | .word 0xaf800011 ! 493: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
10517 | cmp_2_212: | |
10518 | nop | |
10519 | nop | |
10520 | ta T_CHANGE_HPRIV | |
10521 | rd %asi, %r12 | |
10522 | wr %r0, 0x41, %asi | |
10523 | set sync_thr_counter4, %r23 | |
10524 | #ifndef SPC | |
10525 | ldxa [%g0]0x63, %r8 | |
10526 | and %r8, 0x38, %r8 ! Core ID | |
10527 | add %r8, %r23, %r23 | |
10528 | mov 0xff, %r9 | |
10529 | xor %r9, 0x2, %r9 | |
10530 | sllx %r9, %r8, %r9 ! My core mask | |
10531 | #else | |
10532 | mov 0, %r8 | |
10533 | mov 0xff, %r9 | |
10534 | xor %r9, 0x2, %r9 ! My core mask | |
10535 | #endif | |
10536 | mov 0x2, %r10 | |
10537 | cmp_startwait2_212: | |
10538 | cas [%r23],%g0,%r10 !lock | |
10539 | brz,a %r10, continue_cmp_2_212 | |
10540 | ldxa [0x50]%asi, %r13 !Running_rw | |
10541 | ld [%r23], %r10 | |
10542 | cmp_wait2_212: | |
10543 | brnz,a %r10, cmp_wait2_212 | |
10544 | ld [%r23], %r10 | |
10545 | ba cmp_startwait2_212 | |
10546 | mov 0x2, %r10 | |
10547 | continue_cmp_2_212: | |
10548 | ldxa [0x58]%asi, %r14 !Running_status | |
10549 | xnor %r14, %r13, %r14 !Bits equal | |
10550 | brz,a %r8, cmp_multi_core_2_212 | |
10551 | mov 0x69, %r17 | |
10552 | best_set_reg(0x866cc4ef425b1d4c, %r16, %r17) | |
10553 | cmp_multi_core_2_212: | |
10554 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
10555 | and %r14, %r9, %r14 !Apply core-mask | |
10556 | stxa %r14, [0x60]%asi | |
10557 | st %g0, [%r23] !clear lock | |
10558 | wr %g0, %r12, %asi | |
10559 | wrhpr %g0, 0x813, %hpstate ! ta T_CHANGE_NONHPRIV | |
10560 | .word 0x91940013 ! 497: WRPR_PIL_R wrpr %r16, %r19, %pil | |
10561 | cmpenall_2_213: | |
10562 | nop | |
10563 | nop | |
10564 | ta T_CHANGE_HPRIV | |
10565 | rd %asi, %r12 | |
10566 | wr %r0, 0x41, %asi | |
10567 | set sync_thr_counter4, %r23 | |
10568 | #ifndef SPC | |
10569 | ldxa [%g0]0x63, %r8 | |
10570 | and %r8, 0x38, %r8 ! Core ID | |
10571 | add %r8, %r23, %r23 | |
10572 | mov 0xff, %r9 | |
10573 | sllx %r9, %r8, %r9 ! My core mask | |
10574 | #else | |
10575 | mov 0xff, %r9 ! My core mask | |
10576 | #endif | |
10577 | cmpenall_startwait2_213: | |
10578 | mov 0x2, %r10 | |
10579 | cas [%r23],%g0,%r10 !lock | |
10580 | brz,a %r10, continue_cmpenall_2_213 | |
10581 | nop | |
10582 | cmpenall_wait2_213: | |
10583 | ld [%r23], %r10 | |
10584 | brnz %r10, cmpenall_wait2_213 | |
10585 | nop | |
10586 | ba,a cmpenall_startwait2_213 | |
10587 | continue_cmpenall_2_213: | |
10588 | ldxa [0x58]%asi, %r14 !Running_status | |
10589 | wait_for_cmpstat_2_213: | |
10590 | ldxa [0x50]%asi, %r13 !Running_rw | |
10591 | cmp %r13, %r14 | |
10592 | bne,a %xcc, wait_for_cmpstat_2_213 | |
10593 | ldxa [0x58]%asi, %r14 !Running_status | |
10594 | ldxa [0x10]%asi, %r14 !Get enabled threads | |
10595 | and %r14, %r9, %r14 !My core mask | |
10596 | stxa %r14, [0x60]%asi !W1S | |
10597 | ldxa [0x58]%asi, %r16 !Running_status | |
10598 | wait_for_cmpstat2_2_213: | |
10599 | and %r16, %r9, %r16 !My core mask | |
10600 | cmp %r14, %r16 | |
10601 | bne,a %xcc, wait_for_cmpstat2_2_213 | |
10602 | ldxa [0x58]%asi, %r16 !Running_status | |
10603 | st %g0, [%r23] !clear lock | |
10604 | #if (MULTIPASS > 0) | |
10605 | multipass_check_mt: | |
10606 | rd %asi, %r12 | |
10607 | wr %g0, ASI_SCRATCHPAD, %asi | |
10608 | ldxa [0x38]%asi, %r10 | |
10609 | cmp %r10, MULTIPASS | |
10610 | inc %r10 | |
10611 | stxa %r10, [0x38]%asi | |
10612 | be finish_diag | |
10613 | wr %g0, %r12, %asi | |
10614 | lock_sync_thds_again: | |
10615 | mov 0xff, %r10 | |
10616 | set sync_thr_counter4, %r23 | |
10617 | #ifndef SPC | |
10618 | add %r23,%r8,%r23 !Core's sync counter | |
10619 | #endif | |
10620 | st %r10, [%r23] !lock sync_thr_counter4 | |
10621 | add %r23, 64, %r23 | |
10622 | st %r10, [%r23] !lock sync_thr_counter5 | |
10623 | add %r23, 64, %r23 | |
10624 | st %r10, [%r23] !lock sync_thr_counter6 | |
10625 | ba fork_threads | |
10626 | wrpr %g0, %g0, %gl | |
10627 | #endif | |
10628 | nop | |
10629 | nop | |
10630 | ta T_CHANGE_PRIV | |
10631 | wrpr %g0, %g0, %gl | |
10632 | nop | |
10633 | nop | |
10634 | .text | |
10635 | setx join_lbl_0_0, %g1, %g2 | |
10636 | jmp %g2 | |
10637 | nop | |
10638 | fork_lbl_0_1: | |
10639 | wrhpr %g0, 0x1c50, %hpstate ! ta T_CHANGE_NONHPRIV | |
10640 | .word 0x91904012 ! 1: WRPR_PIL_R wrpr %r1, %r18, %pil | |
10641 | splash_htba_1_1: | |
10642 | nop | |
10643 | ta T_CHANGE_HPRIV | |
10644 | setx 0x00000000002a0000, %r11, %r12 | |
10645 | .word 0x8b98000c ! 5: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
10646 | splash_cmpr_1_4: | |
10647 | mov 0, %r18 | |
10648 | sllx %r18, 63, %r18 | |
10649 | rd %tick, %r17 | |
10650 | add %r17, 0x50, %r17 | |
10651 | or %r17, %r18, %r17 | |
10652 | ta T_CHANGE_HPRIV | |
10653 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
10654 | ta T_CHANGE_PRIV | |
10655 | .word 0xaf800011 ! 9: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
10656 | .word 0xd23fe198 ! 13: STD_I std %r9, [%r31 + 0x0198] | |
10657 | jmptr_1_7: | |
10658 | nop | |
10659 | nop | |
10660 | best_set_reg(0xe0a00000, %r20, %r27) | |
10661 | .word 0xb7c6c000 ! 17: JMPL_R jmpl %r27 + %r0, %r27 | |
10662 | #if (defined SPC || defined CMP1) | |
10663 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_10) + 24, 16, 16)) -> intp(7,0,3,,,,,1) | |
10664 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_10)&0xffffffff) + 56, 16, 16)) -> intp(7,0,24,,,,,1) | |
10665 | #else | |
10666 | set 0x56c0f9c9, %r28 | |
10667 | #if (MAX_THREADS == 8) | |
10668 | and %r28, 0x7ff, %r28 | |
10669 | #endif | |
10670 | stxa %r28, [%g0] 0x73 | |
10671 | #endif | |
10672 | intvec_1_10: | |
10673 | .word 0x39400001 ! 21: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10674 | .word 0x22cd0001 ! 1: BRZ brz,a,pt %r20,<label_0xd0001> | |
10675 | .word 0x8d903997 ! 25: WRPR_PSTATE_I wrpr %r0, 0x1997, %pstate | |
10676 | nop | |
10677 | nop | |
10678 | ta T_CHANGE_HPRIV | |
10679 | mov 0x1, %r10 | |
10680 | set sync_thr_counter6, %r23 | |
10681 | #ifndef SPC | |
10682 | ldxa [%g0]0x63, %o1 | |
10683 | and %o1, 0x38, %o1 | |
10684 | add %o1, %r23, %r23 | |
10685 | #endif | |
10686 | cas [%r23],%g0,%r10 !lock | |
10687 | brnz %r10, sma_1_16 | |
10688 | rd %asi, %r12 | |
10689 | wr %g0, 0x40, %asi | |
10690 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
10691 | set 0x001e1fff, %l7 | |
10692 | stxa %l7, [%g0 + 0x80] %asi | |
10693 | wr %r12, %g0, %asi | |
10694 | st %g0, [%r23] | |
10695 | sma_1_16: | |
10696 | wrhpr %g0, 0x2da, %hpstate ! ta T_CHANGE_NONHPRIV | |
10697 | .word 0xe7e7d143 ! 29: CASA_I casa [%r31] 0x8a, %r3, %r19 | |
10698 | demap_1_17: | |
10699 | nop | |
10700 | mov 0x80, %g3 | |
10701 | ta T_CHANGE_HPRIV | |
10702 | stxa %g3, [%g3] 0x57 | |
10703 | stxa %g3, [%g3] 0x57 | |
10704 | stxa %g3, [%g3] 0x5f | |
10705 | stxa %g3, [%g3] 0x5f | |
10706 | stxa %g3, [%g3] 0x5f | |
10707 | stxa %g3, [%g3] 0x5f | |
10708 | stxa %g3, [%g3] 0x5f | |
10709 | stxa %g3, [%g3] 0x5f | |
10710 | wrhpr %g0, 0x2d1, %hpstate ! ta T_CHANGE_NONHPRIV | |
10711 | .word 0xe61fe144 ! 33: LDD_I ldd [%r31 + 0x0144], %r19 | |
10712 | #if (defined SPC || defined CMP1) | |
10713 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_18) + 8, 16, 16)) -> intp(3,0,5,,,,,1) | |
10714 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_18)&0xffffffff) + 56, 16, 16)) -> intp(7,0,28,,,,,1) | |
10715 | #else | |
10716 | set 0xc240fc47, %r28 | |
10717 | #if (MAX_THREADS == 8) | |
10718 | and %r28, 0x7ff, %r28 | |
10719 | #endif | |
10720 | stxa %r28, [%g0] 0x73 | |
10721 | #endif | |
10722 | intvec_1_18: | |
10723 | .word 0x39400001 ! 37: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10724 | splash_hpstate_1_21: | |
10725 | ta T_CHANGE_NONHPRIV | |
10726 | .word 0x2ecb4001 ! 1: BRGEZ brgez,a,pt %r13,<label_0xb4001> | |
10727 | .word 0x81983745 ! 41: WRHPR_HPSTATE_I wrhpr %r0, 0x1745, %hpstate | |
10728 | demap_1_23: | |
10729 | nop | |
10730 | mov 0x80, %g3 | |
10731 | ta T_CHANGE_HPRIV | |
10732 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> | |
10733 | stxa %g3, [%g3] 0x5f | |
10734 | stxa %g3, [%g3] 0x5f | |
10735 | stxa %g3, [%g3] 0x5f | |
10736 | stxa %g3, [%g3] 0x57 | |
10737 | stxa %g3, [%g3] 0x57 | |
10738 | stxa %g3, [%g3] 0x5f | |
10739 | wrhpr %g0, 0x1289, %hpstate ! ta T_CHANGE_NONHPRIV | |
10740 | .word 0xe81fe098 ! 45: LDD_I ldd [%r31 + 0x0098], %r20 | |
10741 | fpinit_1_24: | |
10742 | nop | |
10743 | setx fp_data_quads, %r19, %r20 | |
10744 | ldd [%r20], %f0 | |
10745 | ldd [%r20+8], %f4 | |
10746 | ld [%r20+16], %fsr | |
10747 | ld [%r20+24], %r19 | |
10748 | wr %r19, %g0, %gsr | |
10749 | .word 0x8da009a4 ! 49: FDIVs fdivs %f0, %f4, %f6 | |
10750 | brcommon1_1_25: | |
10751 | nop | |
10752 | nop | |
10753 | setx common_target, %r12, %r27 | |
10754 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
10755 | ba,a .+12 | |
10756 | .word 0xa9b7c7c3 ! 1: PDIST pdistn %d62, %d34, %d20 | |
10757 | ba,a .+8 | |
10758 | jmpl %r27-4, %r27 | |
10759 | .word 0x93b4c7c2 ! 53: PDIST pdistn %d50, %d2, %d40 | |
10760 | rd %tick, %r28 | |
10761 | #if (MAX_THREADS == 8) | |
10762 | sethi %hi(0x33800), %r27 | |
10763 | #else | |
10764 | sethi %hi(0x30000), %r27 | |
10765 | #endif | |
10766 | andn %r28, %r27, %r28 | |
10767 | ta T_CHANGE_HPRIV | |
10768 | stxa %r28, [%g0] 0x73 | |
10769 | .word 0x97a189d2 ! 1: FDIVd fdivd %f6, %f18, %f42 | |
10770 | intvec_1_27: | |
10771 | .word 0x19400001 ! 57: FBPUGE fbuge | |
10772 | .word 0xe927c000 ! 61: STF_R st %f20, [%r0, %r31] | |
10773 | .word 0x91914014 ! 65: WRPR_PIL_R wrpr %r5, %r20, %pil | |
10774 | splash_cmpr_1_35: | |
10775 | mov 1, %r18 | |
10776 | sllx %r18, 63, %r18 | |
10777 | rd %tick, %r17 | |
10778 | add %r17, 0x80, %r17 | |
10779 | or %r17, %r18, %r17 | |
10780 | .word 0xaf800011 ! 69: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
10781 | jmptr_1_37: | |
10782 | nop | |
10783 | nop | |
10784 | best_set_reg(0xe1200000, %r20, %r27) | |
10785 | .word 0xb7c6c000 ! 73: JMPL_R jmpl %r27 + %r0, %r27 | |
10786 | jmptr_1_38: | |
10787 | nop | |
10788 | nop | |
10789 | best_set_reg(0xe1a00000, %r20, %r27) | |
10790 | .word 0xb7c6c000 ! 77: JMPL_R jmpl %r27 + %r0, %r27 | |
10791 | nop | |
10792 | nop | |
10793 | ta T_CHANGE_HPRIV | |
10794 | mov 0x1+1, %r10 | |
10795 | set sync_thr_counter5, %r23 | |
10796 | #ifndef SPC | |
10797 | ldxa [%g0]0x63, %o1 | |
10798 | and %o1, 0x38, %o1 | |
10799 | add %o1, %r23, %r23 | |
10800 | sllx %o1, 5, %o3 !(CID*256) | |
10801 | #endif | |
10802 | cas [%r23],%g0,%r10 !lock | |
10803 | brnz %r10, cwq_1_39 | |
10804 | rd %asi, %r12 | |
10805 | wr %g0, 0x40, %asi | |
10806 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
10807 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
10808 | cmp %l1, 1 | |
10809 | bne cwq_1_39 | |
10810 | set CWQ_BASE, %l6 | |
10811 | #ifndef SPC | |
10812 | add %l6, %o3, %l6 | |
10813 | #endif | |
10814 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
10815 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word | |
10816 | sllx %l2, 32, %l2 | |
10817 | stx %l2, [%l6 + 0x0] | |
10818 | membar #Sync | |
10819 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
10820 | sub %l2, 0x40, %l2 | |
10821 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
10822 | wr %r12, %g0, %asi | |
10823 | st %g0, [%r23] | |
10824 | cwq_1_39: | |
10825 | wrhpr %g0, 0xd13, %hpstate ! ta T_CHANGE_NONHPRIV | |
10826 | .word 0x95414000 ! 81: RDPC rd %pc, %r10 | |
10827 | nop | |
10828 | nop | |
10829 | ta T_CHANGE_HPRIV | |
10830 | mov 0x1, %r10 | |
10831 | set sync_thr_counter6, %r23 | |
10832 | #ifndef SPC | |
10833 | ldxa [%g0]0x63, %o1 | |
10834 | and %o1, 0x38, %o1 | |
10835 | add %o1, %r23, %r23 | |
10836 | #endif | |
10837 | cas [%r23],%g0,%r10 !lock | |
10838 | brnz %r10, sma_1_41 | |
10839 | rd %asi, %r12 | |
10840 | wr %g0, 0x40, %asi | |
10841 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
10842 | set 0x00021fff, %l7 | |
10843 | stxa %l7, [%g0 + 0x80] %asi | |
10844 | wr %r12, %g0, %asi | |
10845 | st %g0, [%r23] | |
10846 | sma_1_41: | |
10847 | wrhpr %g0, 0x482, %hpstate ! ta T_CHANGE_NONHPRIV | |
10848 | .word 0xd5e7d923 ! 85: CASA_I casa [%r31] 0xc9, %r3, %r10 | |
10849 | splash_cmpr_1_42: | |
10850 | mov 0, %r18 | |
10851 | sllx %r18, 63, %r18 | |
10852 | rd %tick, %r17 | |
10853 | add %r17, 0x50, %r17 | |
10854 | or %r17, %r18, %r17 | |
10855 | .word 0xaf800011 ! 89: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
10856 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> | |
10857 | .word 0x8d903db7 ! 93: WRPR_PSTATE_I wrpr %r0, 0x1db7, %pstate | |
10858 | .word 0xe00fe070 ! 97: LDUB_I ldub [%r31 + 0x0070], %r16 | |
10859 | .word 0x89800011 ! 101: WRTICK_R wr %r0, %r17, %tick | |
10860 | .word 0xe43fe045 ! 105: STD_I std %r18, [%r31 + 0x0045] | |
10861 | br_badelay3_1_50: | |
10862 | .word 0xa7a089c9 ! 1: FDIVd fdivd %f2, %f40, %f50 | |
10863 | .word 0xed7d89f9 ! Random illegal ? | |
10864 | .word 0x9ba00554 ! 1: FSQRTd fsqrt | |
10865 | .word 0x99a48833 ! 109: FADDs fadds %f18, %f19, %f12 | |
10866 | memptr_1_52: | |
10867 | set 0x60340000, %r31 | |
10868 | .word 0x8581b226 ! 113: WRCCR_I wr %r6, 0x1226, %ccr | |
10869 | demap_1_53: | |
10870 | nop | |
10871 | mov 0x80, %g3 | |
10872 | ta T_CHANGE_HPRIV | |
10873 | .word 0x24c88001 ! 1: BRLEZ brlez,a,pt %r2,<label_0x88001> | |
10874 | stxa %g3, [%g3] 0x57 | |
10875 | stxa %g3, [%g3] 0x5f | |
10876 | stxa %g3, [%g3] 0x5f | |
10877 | stxa %g3, [%g3] 0x5f | |
10878 | stxa %g3, [%g3] 0x57 | |
10879 | stxa %g3, [%g3] 0x5f | |
10880 | wrhpr %g0, 0x1fc9, %hpstate ! ta T_CHANGE_NONHPRIV | |
10881 | .word 0xd81fe0c9 ! 117: LDD_I ldd [%r31 + 0x00c9], %r12 | |
10882 | #if (defined SPC || defined CMP1) | |
10883 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_56) + 8, 16, 16)) -> intp(2,0,11,,,,,1) | |
10884 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_56)&0xffffffff) + 32, 16, 16)) -> intp(1,0,22,,,,,1) | |
10885 | #else | |
10886 | set 0xcc408743, %r28 | |
10887 | #if (MAX_THREADS == 8) | |
10888 | and %r28, 0x7ff, %r28 | |
10889 | #endif | |
10890 | stxa %r28, [%g0] 0x73 | |
10891 | #endif | |
10892 | .word 0x9bb044d0 ! 1: FCMPNE32 fcmpne32 %d32, %d16, %r13 | |
10893 | intvec_1_56: | |
10894 | .word 0x9f80399e ! 121: SIR sir 0x199e | |
10895 | nop | |
10896 | nop | |
10897 | ta T_CHANGE_HPRIV ! macro | |
10898 | donret_1_58: | |
10899 | rd %pc, %r12 | |
10900 | mov HIGHVA_HIGHNUM, %r10 | |
10901 | sllx %r10, 32, %r10 | |
10902 | or %r12, %r10, %r12 | |
10903 | add %r12, (donretarg_1_58-donret_1_58), %r12 | |
10904 | add %r12, 0x8, %r11 ! nonseq tnpc | |
10905 | andn %r12, %r10, %r12 ! low VA tpc | |
10906 | wrpr %g0, 0x2, %tl | |
10907 | wrpr %g0, %r12, %tpc | |
10908 | wrpr %g0, %r11, %tnpc | |
10909 | set (0x00eb9900 | (20 << 24)), %r13 | |
10910 | and %r12, 0xfff, %r14 | |
10911 | sllx %r14, 32, %r14 | |
10912 | or %r13, %r14, %r20 | |
10913 | wrpr %r20, %g0, %tstate | |
10914 | wrhpr %g0, 0x1dd5, %htstate | |
10915 | wrhpr %g0, 0x1bdb, %hpstate ! rand=1 (1) | |
10916 | ldx [%r12+%r0], %g1 | |
10917 | retry | |
10918 | .align 128 | |
10919 | donretarg_1_58: | |
10920 | .word 0x95a509d4 ! 125: FDIVd fdivd %f20, %f20, %f10 | |
10921 | .word 0x91948014 ! 129: WRPR_PIL_R wrpr %r18, %r20, %pil | |
10922 | .word 0xc36c769d ! 133: PREFETCH_I prefetch [%r17 + 0xfffff69d], #one_read | |
10923 | .word 0xda07c000 ! 137: LDUW_R lduw [%r31 + %r0], %r13 | |
10924 | splash_tba_1_64: | |
10925 | nop | |
10926 | ta T_CHANGE_PRIV | |
10927 | set 0x120000, %r12 | |
10928 | .word 0x8b90000c ! 141: WRPR_TBA_R wrpr %r0, %r12, %tba | |
10929 | .word 0xd81fc003 ! 145: LDD_R ldd [%r31 + %r3], %r12 | |
10930 | .word 0xa9b2c0f4 ! 149: EDGE16LN edge16ln %r11, %r20, %r20 | |
10931 | .word 0xa1902002 ! 153: WRPR_GL_I wrpr %r0, 0x0002, %- | |
10932 | brcommon3_1_70: | |
10933 | nop | |
10934 | nop | |
10935 | setx common_target, %r12, %r27 | |
10936 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
10937 | ba,a .+12 | |
10938 | .word 0xe86fe030 ! 1: LDSTUB_I ldstub %r20, [%r31 + 0x0030] | |
10939 | ba,a .+8 | |
10940 | jmpl %r27+0, %r27 | |
10941 | .word 0x8d90350b ! 157: WRPR_PSTATE_I wrpr %r0, 0x150b, %pstate | |
10942 | brcommon1_1_71: | |
10943 | nop | |
10944 | nop | |
10945 | setx common_target, %r12, %r27 | |
10946 | lduw [%r27-0], %r12 ! Load common dest into dcache .. | |
10947 | ba,a .+12 | |
10948 | .word 0xa9b7c7c0 ! 1: PDIST pdistn %d62, %d0, %d20 | |
10949 | ba,a .+8 | |
10950 | jmpl %r27-4, %r27 | |
10951 | .word 0x97702fdd ! 161: POPC_I popc 0x0fdd, %r11 | |
10952 | #if (defined SPC || defined CMP1) | |
10953 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_74) + 40, 16, 16)) -> intp(3,0,2,,,,,1) | |
10954 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_74)&0xffffffff) + 56, 16, 16)) -> intp(7,0,12,,,,,1) | |
10955 | #else | |
10956 | set 0x2b0029af, %r28 | |
10957 | #if (MAX_THREADS == 8) | |
10958 | and %r28, 0x7ff, %r28 | |
10959 | #endif | |
10960 | stxa %r28, [%g0] 0x73 | |
10961 | #endif | |
10962 | .word 0xa9a049d2 ! 1: FDIVd fdivd %f32, %f18, %f20 | |
10963 | intvec_1_74: | |
10964 | .word 0x9f803c94 ! 165: SIR sir 0x1c94 | |
10965 | .word 0xd23fe100 ! 169: STD_I std %r9, [%r31 + 0x0100] | |
10966 | .word 0xd22fe18e ! 173: STB_I stb %r9, [%r31 + 0x018e] | |
10967 | .word 0x91948014 ! 177: WRPR_PIL_R wrpr %r18, %r20, %pil | |
10968 | rd %tick, %r28 | |
10969 | #if (MAX_THREADS == 8) | |
10970 | sethi %hi(0x33800), %r27 | |
10971 | #else | |
10972 | sethi %hi(0x30000), %r27 | |
10973 | #endif | |
10974 | andn %r28, %r27, %r28 | |
10975 | ta T_CHANGE_HPRIV | |
10976 | stxa %r28, [%g0] 0x73 | |
10977 | .word 0x19400001 ! 1: FBPUGE fbuge | |
10978 | intvec_1_81: | |
10979 | .word 0x9f803569 ! 181: SIR sir 0x1569 | |
10980 | jmptr_1_83: | |
10981 | nop | |
10982 | nop | |
10983 | best_set_reg(0xe0200000, %r20, %r27) | |
10984 | .word 0xb7c6c000 ! 185: JMPL_R jmpl %r27 + %r0, %r27 | |
10985 | .word 0xe19fdf20 ! 189: LDDFA_R ldda [%r31, %r0], %f16 | |
10986 | .word 0x81dd0013 ! 193: FLUSH_R flush %r20, %r19, %r0 | |
10987 | jmptr_1_87: | |
10988 | nop | |
10989 | nop | |
10990 | best_set_reg(0xe0a00000, %r20, %r27) | |
10991 | .word 0xb7c6c000 ! 197: JMPL_R jmpl %r27 + %r0, %r27 | |
10992 | splash_lsu_1_89: | |
10993 | nop | |
10994 | nop | |
10995 | ta T_CHANGE_HPRIV | |
10996 | set 0xf6363cf5, %r2 | |
10997 | mov 0x6, %r1 | |
10998 | sllx %r1, 32, %r1 | |
10999 | or %r1, %r2, %r2 | |
11000 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11001 | .word 0x3d400001 ! 201: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11002 | .word 0x8d9031e1 ! 205: WRPR_PSTATE_I wrpr %r0, 0x11e1, %pstate | |
11003 | nop | |
11004 | nop | |
11005 | ta T_CHANGE_HPRIV ! macro | |
11006 | donret_1_92: | |
11007 | rd %pc, %r12 | |
11008 | mov HIGHVA_HIGHNUM, %r10 | |
11009 | sllx %r10, 32, %r10 | |
11010 | or %r12, %r10, %r12 | |
11011 | add %r12, (donretarg_1_92-donret_1_92), %r12 | |
11012 | add %r12, 0x8, %r11 ! nonseq tnpc | |
11013 | andn %r12, %r10, %r12 ! low VA tpc | |
11014 | wrpr %g0, 0x1, %tl | |
11015 | wrpr %g0, %r12, %tpc | |
11016 | wrpr %g0, %r11, %tnpc | |
11017 | set (0x00161d00 | (20 << 24)), %r13 | |
11018 | and %r12, 0xfff, %r14 | |
11019 | sllx %r14, 32, %r14 | |
11020 | or %r13, %r14, %r20 | |
11021 | wrpr %r20, %g0, %tstate | |
11022 | wrhpr %g0, 0x14d, %htstate | |
11023 | wrpr %g0, 0x1590, %pstate ! rand=0 (1) | |
11024 | .word 0x28800001 ! 1: BLEU bleu,a <label_0x1> | |
11025 | ldx [%r12+%r0], %g1 | |
11026 | retry | |
11027 | donretarg_1_92: | |
11028 | .word 0xa9a189ca ! 209: FDIVd fdivd %f6, %f10, %f20 | |
11029 | #if (defined SPC || defined CMP1) | |
11030 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_94) + 16, 16, 16)) -> intp(0,0,29,,,,,1) | |
11031 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_94)&0xffffffff) + 40, 16, 16)) -> intp(2,0,29,,,,,1) | |
11032 | #else | |
11033 | set 0xb2405b40, %r28 | |
11034 | #if (MAX_THREADS == 8) | |
11035 | and %r28, 0x7ff, %r28 | |
11036 | #endif | |
11037 | stxa %r28, [%g0] 0x73 | |
11038 | #endif | |
11039 | intvec_1_94: | |
11040 | .word 0x99b444d3 ! 213: FCMPNE32 fcmpne32 %d48, %d50, %r12 | |
11041 | #if (defined SPC || defined CMP) | |
11042 | !$EV trig_pc_d(1, expr(@VA(.MAIN.xir_1_96)+40, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1) | |
11043 | !$EV trig_pc_d(1, expr((@VA(.MAIN.xir_1_96)&0xffffffff) + 40, 16, 16)) -> intp(mask2tid(0x1),1,3,,,,,1) | |
11044 | xir_1_96: | |
11045 | #else | |
11046 | #if (defined FC) | |
11047 | !! Generate XIR via RESET_GEN register | |
11048 | ta T_CHANGE_HPRIV | |
11049 | rdpr %pstate, %r18 | |
11050 | andn %r18, 0x208, %r18 ! Reset pstate.am,cle | |
11051 | wrpr %r18, %pstate | |
11052 | #ifndef XIR_RND_CORES | |
11053 | ldxa [%g0] 0x63, %o1 | |
11054 | mov 1, %r18 | |
11055 | sllx %r18, %o1, %r18 | |
11056 | #endif | |
11057 | mov 0x30, %r19 | |
11058 | setx 0x8900000808, %r16, %r17 | |
11059 | mov 0x2, %r16 | |
11060 | xir_1_96: | |
11061 | stxa %r18, [%r19] 0x41 | |
11062 | stx %r16, [%r17] | |
11063 | #endif | |
11064 | #endif | |
11065 | .word 0xa981a508 ! 217: WR_SET_SOFTINT_I wr %r6, 0x0508, %set_softint | |
11066 | .word 0x89800011 ! 221: WRTICK_R wr %r0, %r17, %tick | |
11067 | .word 0xd8ffe1d0 ! 225: SWAPA_I swapa %r12, [%r31 + 0x01d0] %asi | |
11068 | splash_hpstate_1_102: | |
11069 | .word 0x819835f9 ! 229: WRHPR_HPSTATE_I wrhpr %r0, 0x15f9, %hpstate | |
11070 | intveclr_1_105: | |
11071 | nop | |
11072 | nop | |
11073 | ta T_CHANGE_HPRIV | |
11074 | setx 0x29c3a276496f6cc6, %r1, %r28 | |
11075 | stxa %r28, [%g0] 0x72 | |
11076 | wrhpr %g0, 0x18c3, %hpstate ! ta T_CHANGE_NONHPRIV | |
11077 | .word 0x25400001 ! 233: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11078 | splash_lsu_1_108: | |
11079 | nop | |
11080 | nop | |
11081 | ta T_CHANGE_HPRIV | |
11082 | set 0x5a1647d0, %r2 | |
11083 | mov 0x3, %r1 | |
11084 | sllx %r1, 32, %r1 | |
11085 | or %r1, %r2, %r2 | |
11086 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11087 | .word 0x3d400001 ! 237: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11088 | nop | |
11089 | nop | |
11090 | ta T_CHANGE_HPRIV ! macro | |
11091 | donret_1_110: | |
11092 | rd %pc, %r12 | |
11093 | mov HIGHVA_HIGHNUM, %r10 | |
11094 | sllx %r10, 32, %r10 | |
11095 | or %r12, %r10, %r12 | |
11096 | add %r12, (donretarg_1_110-donret_1_110+4), %r12 | |
11097 | add %r12, 0x4, %r11 ! seq tnpc | |
11098 | wrpr %g0, 0x2, %tl | |
11099 | wrpr %g0, %r12, %tpc | |
11100 | wrpr %g0, %r11, %tnpc | |
11101 | set (0x00739f00 | (22 << 24)), %r13 | |
11102 | and %r12, 0xfff, %r14 | |
11103 | sllx %r14, 32, %r14 | |
11104 | or %r13, %r14, %r20 | |
11105 | wrpr %r20, %g0, %tstate | |
11106 | wrhpr %g0, 0x7c7, %htstate | |
11107 | wrpr %g0, 0x1d99, %pstate ! rand=0 (1) | |
11108 | ldx [%r12+%r0], %g1 | |
11109 | retry | |
11110 | .align 512 | |
11111 | donretarg_1_110: | |
11112 | .word 0xa9a189d4 ! 241: FDIVd fdivd %f6, %f20, %f20 | |
11113 | .word 0xe83fc000 ! 245: STD_R std %r20, [%r31 + %r0] | |
11114 | .word 0xe8cfc3c0 ! 249: LDSBA_R ldsba [%r31, %r0] 0x1e, %r20 | |
11115 | #if (defined SPC || defined CMP1) | |
11116 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_112) + 40, 16, 16)) -> intp(4,0,22,,,,,1) | |
11117 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_112)&0xffffffff) + 48, 16, 16)) -> intp(3,0,29,,,,,1) | |
11118 | #else | |
11119 | set 0xe62062a0, %r28 | |
11120 | #if (MAX_THREADS == 8) | |
11121 | and %r28, 0x7ff, %r28 | |
11122 | #endif | |
11123 | stxa %r28, [%g0] 0x73 | |
11124 | #endif | |
11125 | .word 0xa9b1c4c2 ! 1: FCMPNE32 fcmpne32 %d38, %d2, %r20 | |
11126 | intvec_1_112: | |
11127 | .word 0x39400001 ! 253: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11128 | .word 0xe037e002 ! 257: STH_I sth %r16, [%r31 + 0x0002] | |
11129 | .word 0xc30fc000 ! 261: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
11130 | jmptr_1_116: | |
11131 | nop | |
11132 | nop | |
11133 | best_set_reg(0xe1200000, %r20, %r27) | |
11134 | .word 0xb7c6c000 ! 265: JMPL_R jmpl %r27 + %r0, %r27 | |
11135 | splash_hpstate_1_117: | |
11136 | ta T_CHANGE_NONHPRIV | |
11137 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11138 | .word 0x819833cf ! 269: WRHPR_HPSTATE_I wrhpr %r0, 0x13cf, %hpstate | |
11139 | set 0x190b, %l3 | |
11140 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
11141 | .word 0xa1b247d4 ! 273: PDIST pdistn %d40, %d20, %d16 | |
11142 | splash_lsu_1_120: | |
11143 | nop | |
11144 | nop | |
11145 | ta T_CHANGE_HPRIV | |
11146 | set 0x61e95f89, %r2 | |
11147 | mov 0x3, %r1 | |
11148 | sllx %r1, 32, %r1 | |
11149 | or %r1, %r2, %r2 | |
11150 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11151 | .word 0x1d400001 ! 277: FBPULE fbule | |
11152 | splash_hpstate_1_122: | |
11153 | .word 0x8198302d ! 281: WRHPR_HPSTATE_I wrhpr %r0, 0x102d, %hpstate | |
11154 | splash_lsu_1_124: | |
11155 | nop | |
11156 | nop | |
11157 | ta T_CHANGE_HPRIV | |
11158 | set 0x32892f45, %r2 | |
11159 | mov 0x6, %r1 | |
11160 | sllx %r1, 32, %r1 | |
11161 | or %r1, %r2, %r2 | |
11162 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11163 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11164 | .word 0x3d400001 ! 285: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11165 | .word 0x9f802060 ! 289: SIR sir 0x0060 | |
11166 | .word 0xe3e7e003 ! 293: CASA_R casa [%r31] %asi, %r3, %r17 | |
11167 | .word 0xd047c000 ! 297: LDSW_R ldsw [%r31 + %r0], %r8 | |
11168 | brcommon3_1_129: | |
11169 | nop | |
11170 | nop | |
11171 | setx common_target, %r12, %r27 | |
11172 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
11173 | ba,a .+12 | |
11174 | .word 0xd06fe110 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0110] | |
11175 | ba,a .+8 | |
11176 | jmpl %r27+0, %r27 | |
11177 | .word 0x8d902d45 ! 301: WRPR_PSTATE_I wrpr %r0, 0x0d45, %pstate | |
11178 | .word 0xe727e1f4 ! 305: STF_I st %f19, [0x01f4, %r31] | |
11179 | .word 0x93b200e2 ! 309: EDGE16LN edge16ln %r8, %r2, %r9 | |
11180 | .word 0xa753c000 ! 313: RDPR_FQ <illegal instruction> | |
11181 | .word 0xc1bfc2c0 ! 317: STDFA_R stda %f0, [%r0, %r31] | |
11182 | .word 0xe21fc000 ! 321: LDD_R ldd [%r31 + %r0], %r17 | |
11183 | .word 0x89800011 ! 325: WRTICK_R wr %r0, %r17, %tick | |
11184 | .word 0xa784fb6d ! 329: WR_GRAPHICS_STATUS_REG_I wr %r19, 0x1b6d, %- | |
11185 | .word 0xe127e13e ! 333: STF_I st %f16, [0x013e, %r31] | |
11186 | jmptr_1_140: | |
11187 | nop | |
11188 | nop | |
11189 | best_set_reg(0xe1a00000, %r20, %r27) | |
11190 | .word 0xb7c6c000 ! 337: JMPL_R jmpl %r27 + %r0, %r27 | |
11191 | .word 0xd8c7c6c0 ! 341: LDSWA_R ldswa [%r31, %r0] 0x36, %r12 | |
11192 | .word 0x8d902940 ! 345: WRPR_PSTATE_I wrpr %r0, 0x0940, %pstate | |
11193 | .word 0x9194c010 ! 349: WRPR_PIL_R wrpr %r19, %r16, %pil | |
11194 | .word 0x93b480f3 ! 353: EDGE16LN edge16ln %r18, %r19, %r9 | |
11195 | jmptr_1_150: | |
11196 | nop | |
11197 | nop | |
11198 | best_set_reg(0xe0200000, %r20, %r27) | |
11199 | .word 0xb7c6c000 ! 357: JMPL_R jmpl %r27 + %r0, %r27 | |
11200 | .word 0xe4800bc0 ! 361: LDUWA_R lduwa [%r0, %r0] 0x5e, %r18 | |
11201 | .word 0xd337e0e1 ! 365: STQF_I - %f9, [0x00e1, %r31] | |
11202 | jmptr_1_155: | |
11203 | nop | |
11204 | nop | |
11205 | best_set_reg(0xe0a00000, %r20, %r27) | |
11206 | .word 0xb7c6c000 ! 369: JMPL_R jmpl %r27 + %r0, %r27 | |
11207 | jmptr_1_159: | |
11208 | nop | |
11209 | nop | |
11210 | best_set_reg(0xe1200000, %r20, %r27) | |
11211 | .word 0xb7c6c000 ! 373: JMPL_R jmpl %r27 + %r0, %r27 | |
11212 | .word 0xe44fc000 ! 377: LDSB_R ldsb [%r31 + %r0], %r18 | |
11213 | .word 0xe3e7e002 ! 381: CASA_R casa [%r31] %asi, %r2, %r17 | |
11214 | rd %tick, %r28 | |
11215 | #if (MAX_THREADS == 8) | |
11216 | sethi %hi(0x33800), %r27 | |
11217 | #else | |
11218 | sethi %hi(0x30000), %r27 | |
11219 | #endif | |
11220 | andn %r28, %r27, %r28 | |
11221 | ta T_CHANGE_HPRIV | |
11222 | stxa %r28, [%g0] 0x73 | |
11223 | .word 0xa7b404d2 ! 1: FCMPNE32 fcmpne32 %d16, %d18, %r19 | |
11224 | intvec_1_163: | |
11225 | .word 0xa5a489c7 ! 385: FDIVd fdivd %f18, %f38, %f18 | |
11226 | brcommon3_1_164: | |
11227 | nop | |
11228 | nop | |
11229 | setx common_target, %r12, %r27 | |
11230 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
11231 | ba,a .+12 | |
11232 | .word 0xe46fe0c0 ! 1: LDSTUB_I ldstub %r18, [%r31 + 0x00c0] | |
11233 | ba,a .+8 | |
11234 | jmpl %r27+0, %r27 | |
11235 | .word 0x8d903655 ! 389: WRPR_PSTATE_I wrpr %r0, 0x1655, %pstate | |
11236 | .word 0xe48008a0 ! 393: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 | |
11237 | .word 0x8d903451 ! 397: WRPR_PSTATE_I wrpr %r0, 0x1451, %pstate | |
11238 | .word 0xe4c7d140 ! 401: LDSWA_R ldswa [%r31, %r0] 0x8a, %r18 | |
11239 | splash_tba_1_171: | |
11240 | nop | |
11241 | ta T_CHANGE_PRIV | |
11242 | setx 0x00000000003a0000, %r11, %r12 | |
11243 | .word 0x8b90000c ! 405: WRPR_TBA_R wrpr %r0, %r12, %tba | |
11244 | brcommon1_1_173: | |
11245 | nop | |
11246 | nop | |
11247 | setx common_target, %r12, %r27 | |
11248 | lduw [%r27-4], %r12 ! Load common dest into dcache .. | |
11249 | ba,a .+12 | |
11250 | .word 0xc32fe020 ! 1: STXFSR_I st-sfr %f1, [0x0020, %r31] | |
11251 | ba,a .+8 | |
11252 | jmpl %r27-0, %r27 | |
11253 | .word 0x91b44483 ! 409: FCMPLE32 fcmple32 %d48, %d34, %r8 | |
11254 | splash_lsu_1_175: | |
11255 | nop | |
11256 | nop | |
11257 | ta T_CHANGE_HPRIV | |
11258 | set 0x822bb08d, %r2 | |
11259 | mov 0x3, %r1 | |
11260 | sllx %r1, 32, %r1 | |
11261 | or %r1, %r2, %r2 | |
11262 | .word 0x16800001 ! 1: BGE bge <label_0x1> | |
11263 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11264 | .word 0x1d400001 ! 413: FBPULE fbule | |
11265 | .word 0xe1bfe1c0 ! 417: STDFA_I stda %f16, [0x01c0, %r31] | |
11266 | .word 0xd897c380 ! 421: LDUHA_R lduha [%r31, %r0] 0x1c, %r12 | |
11267 | .word 0x9f802180 ! 425: SIR sir 0x0180 | |
11268 | brcommon3_1_181: | |
11269 | nop | |
11270 | setx common_target, %r12, %r27 | |
11271 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
11272 | ba,a .+12 | |
11273 | .word 0xe537c000 ! 1: STQF_R - %f18, [%r0, %r31] | |
11274 | ba,a .+8 | |
11275 | jmpl %r27+0, %r27 | |
11276 | stxa %r17, [%r0] ASI_LSU_CONTROL | |
11277 | .word 0xa5aac833 ! 429: FMOVGE fmovs %fcc1, %f19, %f18 | |
11278 | pmu_1_182: | |
11279 | nop | |
11280 | nop | |
11281 | setx 0xffffffbfffffffab, %g1, %g7 | |
11282 | .word 0xa3800007 ! 433: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
11283 | fpinit_1_184: | |
11284 | nop | |
11285 | setx fp_data_quads, %r19, %r20 | |
11286 | ldd [%r20], %f0 | |
11287 | ldd [%r20+8], %f4 | |
11288 | ld [%r20+16], %fsr | |
11289 | ld [%r20+24], %r19 | |
11290 | wr %r19, %g0, %gsr | |
11291 | .word 0x8da009c4 ! 437: FDIVd fdivd %f0, %f4, %f6 | |
11292 | .word 0xd6800c40 ! 441: LDUWA_R lduwa [%r0, %r0] 0x62, %r11 | |
11293 | .word 0xe4c7df00 ! 445: LDSWA_R ldswa [%r31, %r0] 0xf8, %r18 | |
11294 | .word 0xe337c000 ! 449: STQF_R - %f17, [%r0, %r31] | |
11295 | nop | |
11296 | nop | |
11297 | ta T_CHANGE_HPRIV ! macro | |
11298 | donret_1_190: | |
11299 | rd %pc, %r12 | |
11300 | mov HIGHVA_HIGHNUM, %r10 | |
11301 | sllx %r10, 32, %r10 | |
11302 | or %r12, %r10, %r12 | |
11303 | add %r12, (donretarg_1_190-donret_1_190), %r12 | |
11304 | add %r12, 0x8, %r11 ! nonseq tnpc | |
11305 | wrpr %g0, 0x1, %tl | |
11306 | wrpr %g0, %r12, %tpc | |
11307 | wrpr %g0, %r11, %tnpc | |
11308 | set (0x00edf500 | (0x8b << 24)), %r13 | |
11309 | and %r12, 0xfff, %r14 | |
11310 | sllx %r14, 32, %r14 | |
11311 | or %r13, %r14, %r20 | |
11312 | wrpr %r20, %g0, %tstate | |
11313 | wrhpr %g0, 0x1ec7, %htstate | |
11314 | wrpr %g0, 0x1fb8, %pstate ! rand=0 (1) | |
11315 | retry | |
11316 | .align 512 | |
11317 | donretarg_1_190: | |
11318 | .word 0x26c88001 ! 453: BRLZ brlz,a,pt %r2,<label_0x88001> | |
11319 | splash_htba_1_193: | |
11320 | nop | |
11321 | ta T_CHANGE_HPRIV | |
11322 | setx 0x0000000200280000, %r11, %r12 | |
11323 | .word 0x8b98000c ! 457: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
11324 | splash_htba_1_195: | |
11325 | nop | |
11326 | ta T_CHANGE_HPRIV | |
11327 | setx 0x00000002002a0000, %r11, %r12 | |
11328 | .word 0x8b98000c ! 461: WRHPR_HTBA_R wrhpr %r0, %r12, %htba | |
11329 | trapasi_1_197: | |
11330 | nop | |
11331 | mov 0x8, %r1 ! (VA for ASI 0x49) | |
11332 | .word 0xdad84920 ! 465: LDXA_R ldxa [%r1, %r0] 0x49, %r13 | |
11333 | #if (defined SPC || defined CMP1) | |
11334 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_200) + 40, 16, 16)) -> intp(4,0,3,,,,,1) | |
11335 | !$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_1_200)&0xffffffff) + 48, 16, 16)) -> intp(6,0,2,,,,,1) | |
11336 | #else | |
11337 | set 0x97a0dba8, %r28 | |
11338 | #if (MAX_THREADS == 8) | |
11339 | and %r28, 0x7ff, %r28 | |
11340 | #endif | |
11341 | stxa %r28, [%g0] 0x73 | |
11342 | #endif | |
11343 | intvec_1_200: | |
11344 | .word 0x39400001 ! 469: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11345 | .word 0xc1bfe0e0 ! 473: STDFA_I stda %f0, [0x00e0, %r31] | |
11346 | .word 0x89800011 ! 477: WRTICK_R wr %r0, %r17, %tick | |
11347 | splash_hpstate_1_204: | |
11348 | .word 0x28800001 ! 1: BLEU bleu,a <label_0x1> | |
11349 | .word 0x81983356 ! 481: WRHPR_HPSTATE_I wrhpr %r0, 0x1356, %hpstate | |
11350 | nop | |
11351 | nop | |
11352 | ta T_CHANGE_HPRIV ! macro | |
11353 | donret_1_206: | |
11354 | rd %pc, %r12 | |
11355 | mov HIGHVA_HIGHNUM, %r10 | |
11356 | sllx %r10, 32, %r10 | |
11357 | or %r12, %r10, %r12 | |
11358 | add %r12, (donretarg_1_206-donret_1_206+4), %r12 | |
11359 | add %r12, 0x4, %r11 ! seq tnpc | |
11360 | wrpr %g0, 0x2, %tl | |
11361 | wrpr %g0, %r12, %tpc | |
11362 | wrpr %g0, %r11, %tnpc | |
11363 | set (0x00a66600 | (16 << 24)), %r13 | |
11364 | and %r12, 0xfff, %r14 | |
11365 | sllx %r14, 32, %r14 | |
11366 | or %r13, %r14, %r20 | |
11367 | wrpr %r20, %g0, %tstate | |
11368 | wrhpr %g0, 0x1449, %htstate | |
11369 | wrhpr %g0, 0xec1, %hpstate ! rand=1 (1) | |
11370 | ldx [%r12+%r0], %g1 | |
11371 | retry | |
11372 | donretarg_1_206: | |
11373 | .word 0xd66fe02c ! 485: LDSTUB_I ldstub %r11, [%r31 + 0x002c] | |
11374 | brcommon2_1_208: | |
11375 | nop | |
11376 | nop | |
11377 | setx common_target, %r12, %r27 | |
11378 | ba,a .+12 | |
11379 | .word 0x81dfc000 ! 1: FLUSH_R flush %r31, %r0, %r0 | |
11380 | ba,a .+8 | |
11381 | jmpl %r27-0, %r27 | |
11382 | .word 0x00800001 ! 489: BN bn <label_0x1> | |
11383 | splash_cmpr_1_210: | |
11384 | mov 1, %r18 | |
11385 | sllx %r18, 63, %r18 | |
11386 | rd %tick, %r17 | |
11387 | add %r17, 0x60, %r17 | |
11388 | or %r17, %r18, %r17 | |
11389 | ta T_CHANGE_HPRIV | |
11390 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
11391 | .word 0xaf800011 ! 493: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
11392 | .word 0x91940014 ! 497: WRPR_PIL_R wrpr %r16, %r20, %pil | |
11393 | nop | |
11394 | nop | |
11395 | ta T_CHANGE_PRIV | |
11396 | wrpr %g0, %g0, %gl | |
11397 | nop | |
11398 | nop | |
11399 | ||
11400 | join_lbl_0_0: | |
11401 | SECTION .MAIN | |
11402 | .text | |
11403 | diag_finish: | |
11404 | nop | |
11405 | nop | |
11406 | nop | |
11407 | ta T_CHANGE_HPRIV | |
11408 | #if (MULTIPASS > 0) | |
11409 | multipass_check: | |
11410 | rd %asi, %r12 | |
11411 | wr %g0, ASI_SCRATCHPAD, %asi | |
11412 | ldxa [0x38]%asi, %r10 | |
11413 | cmp %r10, MULTIPASS | |
11414 | inc %r10 | |
11415 | stxa %r10, [0x38]%asi | |
11416 | wr %g0, %r12, %asi | |
11417 | bne fork_threads | |
11418 | wrpr %g0, %g0, %gl | |
11419 | #endif | |
11420 | finish_diag: | |
11421 | best_set_reg(HV_TRAP_BASE_PA, %r1, %r2) | |
11422 | wrhpr %g2, %g0, %htba | |
11423 | ta T_GOOD_TRAP | |
11424 | nop | |
11425 | nop | |
11426 | nop | |
11427 | .data | |
11428 | .xword 0x0 | |
11429 | ! fp data rs1, rs2, fsr, gsr quads .. | |
11430 | .global fp_data_quads | |
11431 | fp_data_quads: | |
11432 | .xword 0x0044000000000000 | |
11433 | .xword 0x4028000000000000 | |
11434 | .xword 0x0fc0400400000000 | |
11435 | .xword 0x0000000000000000 | |
11436 | .xword 0x0041000000000000 | |
11437 | .xword 0x4022000000000000 | |
11438 | .xword 0x0600800000000000 | |
11439 | .xword 0x0000000000000000 | |
11440 | .xword 0x0220000000000000 | |
11441 | .xword 0x4140000000000000 | |
11442 | .xword 0x4fc0400400000000 | |
11443 | .xword 0x0000000000000000 | |
11444 | .xword 0x4090000000000000 | |
11445 | .xword 0x0090000000000000 | |
11446 | .xword 0x0f80400800000000 | |
11447 | .xword 0x0a00000000000000 | |
11448 | .align 128 | |
11449 | .global user_data_start | |
11450 | .data | |
11451 | user_data_start: | |
11452 | ||
11453 | .xword 0xabb68908d736e94d | |
11454 | .xword 0xb3bc34a1edfe5a2e | |
11455 | .xword 0xeb8315744cb2f69d | |
11456 | .xword 0x3d25896c0824a7a2 | |
11457 | .xword 0xe563dd6ad12eb250 | |
11458 | .xword 0x9b5fc301a7ce87cf | |
11459 | .xword 0x5bbd742b72c75006 | |
11460 | .xword 0x6e8a979aafe31686 | |
11461 | .xword 0x0debfc38817e419d | |
11462 | .xword 0x0952df23fd5c4b5b | |
11463 | .xword 0x205e576a3b160fb6 | |
11464 | .xword 0x02bfa4d107d9810f | |
11465 | .xword 0xa5053d834461e714 | |
11466 | .xword 0x53a3fee3c04cf879 | |
11467 | .xword 0x6b7439167ac7f5f3 | |
11468 | .xword 0xf2c136fab23e3155 | |
11469 | .xword 0xd3386a10d7f3fdda | |
11470 | .xword 0x36572f95f68a05a6 | |
11471 | .xword 0x9c467b77e4d623ca | |
11472 | .xword 0x43753f185a64c554 | |
11473 | .xword 0x0fdca8f2a0d3e099 | |
11474 | .xword 0xce32f96abce31674 | |
11475 | .xword 0x54fe03139e090ce3 | |
11476 | .xword 0x68149692b6a2174b | |
11477 | .xword 0x6da3884e482119e0 | |
11478 | .xword 0x82d9d1dad8315b9f | |
11479 | .xword 0xdd19e67b40cddef6 | |
11480 | .xword 0xae513a100d538d5d | |
11481 | .xword 0xeab208112c78b017 | |
11482 | .xword 0xbad277581875a80d | |
11483 | .xword 0x6508b834365f0a67 | |
11484 | .xword 0xbb514f3976d77833 | |
11485 | .xword 0xb7ee569cd8607410 | |
11486 | .xword 0x362a9ee872cd5ed3 | |
11487 | .xword 0xc38a78591569ddfe | |
11488 | .xword 0x3423ebdf22605abd | |
11489 | .xword 0x78d5979b822252df | |
11490 | .xword 0x7e82fdc822b1779b | |
11491 | .xword 0xa8876368d56c43dd | |
11492 | .xword 0x4aa751cecdc37764 | |
11493 | .xword 0x12c5165a002c7ab7 | |
11494 | .xword 0x67d56cb7359fdaff | |
11495 | .xword 0xeb2d6a41f6d9ab64 | |
11496 | .xword 0xf312a9542e14b850 | |
11497 | .xword 0xd9c1bcb24fa62b87 | |
11498 | .xword 0x1ae0c82a94f1a842 | |
11499 | .xword 0xce00aa3bd21a9517 | |
11500 | .xword 0x9fa2969e11f9b3af | |
11501 | .xword 0x134ab5f2ce0ed936 | |
11502 | .xword 0x339c5350f8996956 | |
11503 | .xword 0xb17e2663688df40a | |
11504 | .xword 0xda6cfc343dc5bc5e | |
11505 | .xword 0x6969a37458174c9b | |
11506 | .xword 0x35418330d9e96ecf | |
11507 | .xword 0x4673fcdcb7055c22 | |
11508 | .xword 0x0d194cff57d5c23d | |
11509 | .xword 0xf64d29fbbf0a7339 | |
11510 | .xword 0x6079c8a9d822a364 | |
11511 | .xword 0xec636be77de55982 | |
11512 | .xword 0x5214d1a1e7f78a8f | |
11513 | .xword 0xcc3e6536b03af799 | |
11514 | .xword 0xa49f6ec922e181ea | |
11515 | .xword 0x3203ecf812633d4c | |
11516 | .xword 0x5822e86eb1d12665 | |
11517 | .xword 0xb50e5706de8602f2 | |
11518 | .xword 0xe605d2e764d8da7a | |
11519 | .xword 0x9e94b3622af42970 | |
11520 | .xword 0x4d51f326a14aa91d | |
11521 | .xword 0x07492ac96724be73 | |
11522 | .xword 0xb4fc22bfa0d77ba0 | |
11523 | .xword 0xb04a8af010c7fdf3 | |
11524 | .xword 0xd1662ac89e1adad6 | |
11525 | .xword 0x9972b9f85eb46686 | |
11526 | .xword 0x2acd6fa928687181 | |
11527 | .xword 0x7b404d087f970558 | |
11528 | .xword 0x72ed7c5a43092f03 | |
11529 | .xword 0x54b0d235aa7d2c1c | |
11530 | .xword 0xb44ada8ebae8ce7c | |
11531 | .xword 0x91577de0bba6c0d3 | |
11532 | .xword 0x68a48557f4a577be | |
11533 | .xword 0x7ae89b6f7a5f883d | |
11534 | .xword 0x1b2fd7b413eceb8a | |
11535 | .xword 0x30288bf43adc0cee | |
11536 | .xword 0xebb25d5aabbcd079 | |
11537 | .xword 0xc10e66bbc22a54d1 | |
11538 | .xword 0xe116b78fcbf4e8b8 | |
11539 | .xword 0x5b8e988788d18d05 | |
11540 | .xword 0x488e25e75dfbcb91 | |
11541 | .xword 0x305a5975b90b0efe | |
11542 | .xword 0x31d3539fa2d4273c | |
11543 | .xword 0x7e35fc2b0ed18f34 | |
11544 | .xword 0x1cfece5d45fefd03 | |
11545 | .xword 0x50088b53f1f81110 | |
11546 | .xword 0x5fbf26b2da48ef9f | |
11547 | .xword 0xaa2edf79bff9d938 | |
11548 | .xword 0x023fd93f6049b457 | |
11549 | .xword 0xbc17303f6cbe81df | |
11550 | .xword 0xae2f303ddda8a8a6 | |
11551 | .xword 0x2144089233159411 | |
11552 | .xword 0xa6a3722435ae2eee | |
11553 | .xword 0x690ab90e89c33957 | |
11554 | .xword 0x63ab342bc13dedd5 | |
11555 | .xword 0x26d1d85c10ed9bee | |
11556 | .xword 0x8cc64b602c5f0bc4 | |
11557 | .xword 0x40d27f95c2e768ec | |
11558 | .xword 0xbcfa8f62533aed58 | |
11559 | .xword 0x1650a10ea8b2633a | |
11560 | .xword 0xc35f6c5245560858 | |
11561 | .xword 0x0d74c7877483df63 | |
11562 | .xword 0x5496c0e1b07ef5ce | |
11563 | .xword 0xa4393699e40f3da9 | |
11564 | .xword 0xcf06e7e91532374c | |
11565 | .xword 0x44d72a53b6e73d88 | |
11566 | .xword 0xb54bb4173973de5b | |
11567 | .xword 0x4a9ace7909674837 | |
11568 | .xword 0xdb96bf6b35fd3189 | |
11569 | .xword 0x7caa9ed59cc2253f | |
11570 | .xword 0xed7946e9503d2646 | |
11571 | .xword 0x7e042c98d2aa78d7 | |
11572 | .xword 0x5d6a2daff2ed1f64 | |
11573 | .xword 0x1ef7fb18419bd97c | |
11574 | .xword 0x250349344c273bed | |
11575 | .xword 0xed8c061c0ea7eb61 | |
11576 | .xword 0x8ef55b7b95424bc0 | |
11577 | .xword 0xc814e687406fc988 | |
11578 | .xword 0x2c958555c5c513e2 | |
11579 | .xword 0x77c0e2602ad07ac2 | |
11580 | .xword 0xeeca974a6447aa65 | |
11581 | .xword 0xaef75c555b27d38f | |
11582 | .xword 0x981ceb6dd56a93b1 | |
11583 | .xword 0x1ffb8c1489af8e99 | |
11584 | .xword 0xcec1c9303b65e196 | |
11585 | .xword 0x9ec31bdff7212501 | |
11586 | .xword 0x20d43907b0896db2 | |
11587 | .xword 0x3034e3dfc671b4da | |
11588 | .xword 0x2831229238a8b649 | |
11589 | .xword 0xd8fb82813c907a0d | |
11590 | .xword 0x21e8335ba2d550a6 | |
11591 | .xword 0x0e84191e1b4fbb47 | |
11592 | .xword 0xd8682000cc9b6baa | |
11593 | .xword 0xef09592e5abc5699 | |
11594 | .xword 0x211166d6e4bb8fdd | |
11595 | .xword 0x8b5bcbd9bc417ff1 | |
11596 | .xword 0x82edd1c333327101 | |
11597 | .xword 0x8aa515370b99a720 | |
11598 | .xword 0xce956676ec4a5337 | |
11599 | .xword 0x5a9f394b7af6ecd0 | |
11600 | .xword 0xac8d298d7e4ec243 | |
11601 | .xword 0xc6066f614bb7e828 | |
11602 | .xword 0xcd30f64498777964 | |
11603 | .xword 0x4eaae5c60cb0b43d | |
11604 | .xword 0xa67087fed9256f00 | |
11605 | .xword 0x86a22f680753d15d | |
11606 | .xword 0x85e54a5de45b7d0e | |
11607 | .xword 0x00ce1ee71892f521 | |
11608 | .xword 0x54b5313b64559c16 | |
11609 | .xword 0x697182d4fa4fe2e7 | |
11610 | .xword 0xf3b0f0e6379349a9 | |
11611 | .xword 0x2a0174c3eda75d6f | |
11612 | .xword 0x10e1125323ec6adc | |
11613 | .xword 0x2c817b0b761c5229 | |
11614 | .xword 0xe54b2d8f9fa09619 | |
11615 | .xword 0x4dbbd3c0bfc75252 | |
11616 | .xword 0x46eadab959ae33be | |
11617 | .xword 0x7f23317ddaad4240 | |
11618 | .xword 0x9b8b75a0e839fc53 | |
11619 | .xword 0x36c7ac04a2d5e164 | |
11620 | .xword 0xf897ab83c145b114 | |
11621 | .xword 0x647e4af2b91b2f37 | |
11622 | .xword 0xebe03f7e5d025a05 | |
11623 | .xword 0xf9487dda8c2253a7 | |
11624 | .xword 0xf4a4b20fe3f74946 | |
11625 | .xword 0x7e199fabd4cf0a70 | |
11626 | .xword 0x6d5d1ee75442e987 | |
11627 | .xword 0xdded602b4076234c | |
11628 | .xword 0xca6d89f2d5e8d951 | |
11629 | .xword 0x213637c486633e14 | |
11630 | .xword 0xec314a8bcacb434e | |
11631 | .xword 0x201857e3c5066853 | |
11632 | .xword 0x482a5929048cc6db | |
11633 | .xword 0x7ddde7d3b7f46983 | |
11634 | .xword 0x9136e2c57a2b3e45 | |
11635 | .xword 0xafde447ba92bb60d | |
11636 | .xword 0x9b8a3027218f3f15 | |
11637 | .xword 0xedc88cb1e93cd750 | |
11638 | .xword 0xe7dce00be5c322b2 | |
11639 | .xword 0xc7c5375e23ec9f90 | |
11640 | .xword 0x2603d4031c1d0ef2 | |
11641 | .xword 0xc6c18cc5a38e2b27 | |
11642 | .xword 0xf82b64466fdf474c | |
11643 | .xword 0xf8e9207cd0baa9f0 | |
11644 | .xword 0x025598f5449c4690 | |
11645 | .xword 0x5d26dc6edb2858e2 | |
11646 | .xword 0x4c49b3f61fc546b0 | |
11647 | .xword 0x189d3fdcf15ec23c | |
11648 | .xword 0x2df2ce5b669e3f80 | |
11649 | .xword 0x7d57c000937c77a7 | |
11650 | .xword 0xf320fbd0a475d1b4 | |
11651 | .xword 0x8ddab4abb02ab6b8 | |
11652 | .xword 0x5948f45f3e3adc52 | |
11653 | .xword 0x0aa41d5099abdbf1 | |
11654 | .xword 0x0474c9f9cae1c778 | |
11655 | .xword 0x297480c2d3ce3ada | |
11656 | .xword 0x883ab1689b808da2 | |
11657 | .xword 0xb23ea78906dc7296 | |
11658 | .xword 0xdbd50a74f2343c16 | |
11659 | .xword 0x342a371c78355167 | |
11660 | .xword 0x915c0ada399209f6 | |
11661 | .xword 0xee27761dcd9d1744 | |
11662 | .xword 0x67fa1c867ad4d71c | |
11663 | .xword 0xc8bc89f1aac5bd4a | |
11664 | .xword 0x82f282cadd1c2c4a | |
11665 | .xword 0xea64fd3411d0a589 | |
11666 | .xword 0xee9d19aa830a0b3c | |
11667 | .xword 0x72d30abbca931d11 | |
11668 | .xword 0xeda5a0dab02f2d00 | |
11669 | .xword 0xede33b2ff0645752 | |
11670 | .xword 0x6c9b439a6ebca83d | |
11671 | .xword 0x3681f471f5640ec9 | |
11672 | .xword 0x454565e95dacc666 | |
11673 | .xword 0xdc07bd88ec73e7a3 | |
11674 | .xword 0xc51625d529d6c329 | |
11675 | .xword 0x23675f958accf5c9 | |
11676 | .xword 0x98af8196a6f26d12 | |
11677 | .xword 0xa3b53fbb0bad2e4d | |
11678 | .xword 0x942eb239b75c2c56 | |
11679 | .xword 0x7534bae3b7d05df5 | |
11680 | .xword 0x3091b882c1f3732a | |
11681 | .xword 0x05a13cf719994fd8 | |
11682 | .xword 0x88a1ab96eb415c20 | |
11683 | .xword 0xb28c3256947fbacc | |
11684 | .xword 0xd47960e5f724aa75 | |
11685 | .xword 0xe465189980811302 | |
11686 | .xword 0x4a6a719774dd7307 | |
11687 | .xword 0x93dab4d21f999d14 | |
11688 | .xword 0xcf6863f093571ddc | |
11689 | .xword 0xa2858f828c48284d | |
11690 | .xword 0x0dbc61962f7ee7aa | |
11691 | .xword 0x4f54918e3a1ba0b5 | |
11692 | .xword 0x1f24f15f9ad88078 | |
11693 | .xword 0x4d1293e29736ca8d | |
11694 | .xword 0xe2d892928df316f2 | |
11695 | .xword 0xc1f5e9b7282541d7 | |
11696 | .xword 0xd474b40aefac25bc | |
11697 | .xword 0xd650ed472e3f3cf4 | |
11698 | .xword 0xb71db2d9b387fbea | |
11699 | .xword 0xfbf5549134a89955 | |
11700 | .xword 0xfd1c3cbfeb985638 | |
11701 | .xword 0x59f63960757ccf2b | |
11702 | .xword 0xd29e92b5fd27202f | |
11703 | .xword 0x714ed0ebe2cbf29a | |
11704 | .xword 0xb7e7cd78dde2ecd7 | |
11705 | .xword 0xdee4f8cb9cf509dc | |
11706 | .xword 0xfcd4d5f65c19cbf6 | |
11707 | .xword 0x908f69b953dd2c2c | |
11708 | .xword 0x14e39821e87fdaba | |
11709 | ||
11710 | SECTION .HTRAPS | |
11711 | .text | |
11712 | .global restore_range_regs | |
11713 | restore_range_regs: | |
11714 | wr %g0, ASI_MMU_REAL_RANGE, %asi | |
11715 | mov 1, %g1 | |
11716 | sllx %g1, 63, %g1 | |
11717 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %g2 | |
11718 | or %g2 ,%g1, %g2 | |
11719 | stxa %g2, [ASI_MMU_REAL_RANGE_0] %asi | |
11720 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %g2 | |
11721 | or %g2 ,%g1, %g2 | |
11722 | stxa %g2, [ASI_MMU_REAL_RANGE_1] %asi | |
11723 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %g2 | |
11724 | or %g2 ,%g1, %g2 | |
11725 | stxa %g2, [ASI_MMU_REAL_RANGE_2] %asi | |
11726 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %g2 | |
11727 | or %g2 ,%g1, %g2 | |
11728 | stxa %g2, [ASI_MMU_REAL_RANGE_3] %asi | |
11729 | retry | |
11730 | ||
11731 | .global wdog_2_ext | |
11732 | SECTION .HTRAPS | |
11733 | .global wdog_2_ext | |
11734 | .global retry_with_base_tba | |
11735 | .global resolve_bad_tte | |
11736 | ||
11737 | .text | |
11738 | resolve_bad_tte: | |
11739 | !if pc[13:5]==0, then assume not a relocated handler | |
11740 | rdpr %tpc, %r4 | |
11741 | andn %r4, 0xf, %r5 | |
11742 | sllx %r5, 49, %r5 | |
11743 | brnz,a %r5, retry_with_base_tba | |
11744 | !assume %r27 is where we came from .. | |
11745 | fdivd %f0, %f4, %f12 | |
11746 | jmpl %r27+8, %r0 | |
11747 | fdivs %f0, %f4, %f12 | |
11748 | retry_with_base_tba: | |
11749 | best_set_reg(TRAP_BASE_VA, %r3, %r5) | |
11750 | cmp %r4, %r5 | |
11751 | bz htrap_5_ext_done | |
11752 | set 0x7fff, %r3 | |
11753 | and %r4, %r3, %r4 | |
11754 | or %r5, %r4, %r4 | |
11755 | wrpr %r4, %tpc | |
11756 | rdpr %tnpc, %r4 | |
11757 | and %r4, %r3, %r4 | |
11758 | or %r5, %r4, %r4 | |
11759 | wrpr %r4, %tnpc | |
11760 | retry | |
11761 | ||
11762 | htrap_5_ext: | |
11763 | rd %pc, %l2 | |
11764 | inc %l3 | |
11765 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 | |
11766 | rdpr %tl, %l3 | |
11767 | rdpr %tstate, %l4 | |
11768 | rdhpr %htstate, %l5 | |
11769 | or %l5, 0x4, %l5 | |
11770 | inc %l3 | |
11771 | wrpr %l3, %tl | |
11772 | wrpr %l2, %tpc | |
11773 | add %l2, 4, %l2 | |
11774 | wrpr %l2, %tnpc | |
11775 | wrpr %l4, %tstate | |
11776 | wrhpr %l5, %htstate | |
11777 | retry | |
11778 | htrap_5_ext_done: | |
11779 | done | |
11780 | ||
11781 | wdog_2_ext: | |
11782 | mov 0x1f, %l1 | |
11783 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
11784 | ! If TT != 2, then goto trap handler | |
11785 | rdpr %tt, %l1 | |
11786 | cmp %l1, 0x2 | |
11787 | bne wdog_2_goto_handler | |
11788 | nop | |
11789 | ! else done | |
11790 | done | |
11791 | wdog_2_goto_handler: | |
11792 | rdhpr %htstate, %l3 | |
11793 | and %l3, 0x4, %l3 ! If previously in hpriv mode, go to hpriv | |
11794 | brnz,a %l3, wdog_2_goto_handler_1 | |
11795 | rdhpr %htba, %l3 | |
11796 | srlx %l1, 7, %l3 ! Send priv sw traps to priv mode .. | |
11797 | cmp %l3, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. | |
11798 | be,a wdog_2_goto_handler_1 | |
11799 | rdpr %tba, %l3 | |
11800 | rdhpr %htba, %l3 | |
11801 | wdog_2_goto_handler_1: | |
11802 | sllx %l1, 5, %l1 | |
11803 | add %l1, %l3, %l3 | |
11804 | jmp %l3 | |
11805 | nop | |
11806 | ! Red mode other reset handler | |
11807 | ! Get htba, and tt and make trap address | |
11808 | ! Jump to trap handler .. | |
11809 | ||
11810 | SECTION .RED_SEC | |
11811 | .global red_other_ext | |
11812 | .global wdog_red_ext | |
11813 | .text | |
11814 | red_other_ext: | |
11815 | ! IF TL=6, shift stack by one .. | |
11816 | rdpr %tl, %l1 | |
11817 | cmp %l1, 6 | |
11818 | be start_tsa_shift | |
11819 | nop | |
11820 | ||
11821 | continue_red_other: | |
11822 | mov 0x1f, %l1 | |
11823 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
11824 | ||
11825 | rdpr %tt, %l1 | |
11826 | ||
11827 | rdhpr %htstate, %l2 | |
11828 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv | |
11829 | brnz,a %l2, red_goto_handler | |
11830 | rdhpr %htba, %l2 | |
11831 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. | |
11832 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. | |
11833 | be,a red_goto_handler | |
11834 | rdpr %tba, %l2 | |
11835 | rdhpr %htba, %l2 | |
11836 | red_goto_handler: | |
11837 | ||
11838 | sllx %l1, 5, %l1 | |
11839 | add %l1, %l2, %l2 | |
11840 | rdhpr %hpstate, %l1 | |
11841 | jmp %l2 | |
11842 | wrhpr %l1, 0x20, %hpstate | |
11843 | nop | |
11844 | ||
11845 | wdog_red_ext: | |
11846 | ! Shift stack down by 1 ... | |
11847 | rdpr %tl, %l1 | |
11848 | cmp %l1, 6 | |
11849 | bl wdog_end | |
11850 | start_tsa_shift: | |
11851 | mov 0x2, %l2 | |
11852 | ||
11853 | tsa_shift: | |
11854 | wrpr %l2, %tl | |
11855 | rdpr %tt, %l3 | |
11856 | rdpr %tpc, %l4 | |
11857 | rdpr %tnpc, %l5 | |
11858 | rdpr %tstate, %l6 | |
11859 | rdhpr %htstate, %l7 | |
11860 | dec %l2 | |
11861 | wrpr %l2, %tl | |
11862 | wrpr %l3, %tt | |
11863 | wrpr %l4, %tpc | |
11864 | wrpr %l5, %tnpc | |
11865 | wrpr %l6, %tstate | |
11866 | wrhpr %l7, %htstate | |
11867 | add %l2, 2, %l2 | |
11868 | cmp %l2, %l1 | |
11869 | ble tsa_shift | |
11870 | nop | |
11871 | tsa_shift_done: | |
11872 | dec %l1 | |
11873 | wrpr %l1, %tl | |
11874 | ||
11875 | wdog_end: | |
11876 | ! If TT != 2, then goto trap handler | |
11877 | rdpr %tt, %l1 | |
11878 | ||
11879 | cmp %l1, 0x2 | |
11880 | bne continue_red_other | |
11881 | nop | |
11882 | ! else done | |
11883 | mov 0x1f, %l1 | |
11884 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
11885 | done | |
11886 | ||
11887 | SECTION .CWQ_DATA DATA_VA =0x4000 | |
11888 | attr_data { | |
11889 | Name = .CWQ_DATA | |
11890 | hypervisor | |
11891 | } | |
11892 | ||
11893 | .data | |
11894 | .align 16 | |
11895 | .global msg | |
11896 | msg: | |
11897 | .xword 0xad32fa52374cc6ba | |
11898 | .xword 0x4cbf52280549003a | |
11899 | ||
11900 | .align 16 | |
11901 | .global results | |
11902 | results: | |
11903 | .xword 0xDEADBEEFDEADBEEF | |
11904 | .xword 0xDEADBEEFDEADBEEF | |
11905 | !# CWQ data area | |
11906 | !# CWQ_BASE for core N is CWQ_BASE+(N*256) | |
11907 | !# CWQ_LAST for core N is CWQ_LAST+(N*256) | |
11908 | .align 64 | |
11909 | .global CWQ_BASE | |
11910 | CWQ_BASE: | |
11911 | .xword 0xAAAAAAAAAAAAAAA | |
11912 | .xword 0xAAAAAAAAAAAAAAA | |
11913 | .xword 0xAAAAAAAAAAAAAAA | |
11914 | .xword 0xAAAAAAAAAAAAAAA | |
11915 | .xword 0xAAAAAAAAAAAAAAA | |
11916 | .xword 0xAAAAAAAAAAAAAAA | |
11917 | .xword 0xAAAAAAAAAAAAAAA | |
11918 | .xword 0xAAAAAAAAAAAAAAA | |
11919 | .xword 0xAAAAAAAAAAAAAAA | |
11920 | .xword 0xAAAAAAAAAAAAAAA | |
11921 | .xword 0xAAAAAAAAAAAAAAA | |
11922 | .xword 0xAAAAAAAAAAAAAAA | |
11923 | .xword 0xAAAAAAAAAAAAAAA | |
11924 | .xword 0xAAAAAAAAAAAAAAA | |
11925 | .xword 0xAAAAAAAAAAAAAAA | |
11926 | .xword 0xAAAAAAAAAAAAAAA | |
11927 | .xword 0xAAAAAAAAAAAAAAA | |
11928 | .xword 0xAAAAAAAAAAAAAAA | |
11929 | .xword 0xAAAAAAAAAAAAAAA | |
11930 | .xword 0xAAAAAAAAAAAAAAA | |
11931 | .xword 0xAAAAAAAAAAAAAAA | |
11932 | .xword 0xAAAAAAAAAAAAAAA | |
11933 | .xword 0xAAAAAAAAAAAAAAA | |
11934 | .xword 0xAAAAAAAAAAAAAAA | |
11935 | .global CWQ_LAST | |
11936 | .align 64 | |
11937 | CWQ_LAST: | |
11938 | .word 0x0 | |
11939 | .align 64 | |
11940 | cwq_base1: | |
11941 | .xword 0xAAAAAAAAAAAAAAA | |
11942 | .xword 0xAAAAAAAAAAAAAAA | |
11943 | .xword 0xAAAAAAAAAAAAAAA | |
11944 | .xword 0xAAAAAAAAAAAAAAA | |
11945 | .xword 0xAAAAAAAAAAAAAAA | |
11946 | .xword 0xAAAAAAAAAAAAAAA | |
11947 | .xword 0xAAAAAAAAAAAAAAA | |
11948 | .xword 0xAAAAAAAAAAAAAAA | |
11949 | .xword 0xAAAAAAAAAAAAAAA | |
11950 | .xword 0xAAAAAAAAAAAAAAA | |
11951 | .xword 0xAAAAAAAAAAAAAAA | |
11952 | .xword 0xAAAAAAAAAAAAAAA | |
11953 | .xword 0xAAAAAAAAAAAAAAA | |
11954 | .xword 0xAAAAAAAAAAAAAAA | |
11955 | .xword 0xAAAAAAAAAAAAAAA | |
11956 | .xword 0xAAAAAAAAAAAAAAA | |
11957 | .xword 0xAAAAAAAAAAAAAAA | |
11958 | .xword 0xAAAAAAAAAAAAAAA | |
11959 | .xword 0xAAAAAAAAAAAAAAA | |
11960 | .xword 0xAAAAAAAAAAAAAAA | |
11961 | .xword 0xAAAAAAAAAAAAAAA | |
11962 | .xword 0xAAAAAAAAAAAAAAA | |
11963 | .xword 0xAAAAAAAAAAAAAAA | |
11964 | .xword 0xAAAAAAAAAAAAAAA | |
11965 | .align 64 | |
11966 | cwq_last1: | |
11967 | .word 0x0 | |
11968 | .align 64 | |
11969 | .xword 0xAAAAAAAAAAAAAAA | |
11970 | .xword 0xAAAAAAAAAAAAAAA | |
11971 | .xword 0xAAAAAAAAAAAAAAA | |
11972 | .xword 0xAAAAAAAAAAAAAAA | |
11973 | .xword 0xAAAAAAAAAAAAAAA | |
11974 | .xword 0xAAAAAAAAAAAAAAA | |
11975 | .xword 0xAAAAAAAAAAAAAAA | |
11976 | .xword 0xAAAAAAAAAAAAAAA | |
11977 | .xword 0xAAAAAAAAAAAAAAA | |
11978 | .xword 0xAAAAAAAAAAAAAAA | |
11979 | .xword 0xAAAAAAAAAAAAAAA | |
11980 | .xword 0xAAAAAAAAAAAAAAA | |
11981 | .xword 0xAAAAAAAAAAAAAAA | |
11982 | .xword 0xAAAAAAAAAAAAAAA | |
11983 | .xword 0xAAAAAAAAAAAAAAA | |
11984 | .xword 0xAAAAAAAAAAAAAAA | |
11985 | .xword 0xAAAAAAAAAAAAAAA | |
11986 | .xword 0xAAAAAAAAAAAAAAA | |
11987 | .xword 0xAAAAAAAAAAAAAAA | |
11988 | .xword 0xAAAAAAAAAAAAAAA | |
11989 | .xword 0xAAAAAAAAAAAAAAA | |
11990 | .xword 0xAAAAAAAAAAAAAAA | |
11991 | .xword 0xAAAAAAAAAAAAAAA | |
11992 | .xword 0xAAAAAAAAAAAAAAA | |
11993 | .align 64 | |
11994 | .word 0x0 | |
11995 | .align 64 | |
11996 | .xword 0xAAAAAAAAAAAAAAA | |
11997 | .xword 0xAAAAAAAAAAAAAAA | |
11998 | .xword 0xAAAAAAAAAAAAAAA | |
11999 | .xword 0xAAAAAAAAAAAAAAA | |
12000 | .xword 0xAAAAAAAAAAAAAAA | |
12001 | .xword 0xAAAAAAAAAAAAAAA | |
12002 | .xword 0xAAAAAAAAAAAAAAA | |
12003 | .xword 0xAAAAAAAAAAAAAAA | |
12004 | .xword 0xAAAAAAAAAAAAAAA | |
12005 | .xword 0xAAAAAAAAAAAAAAA | |
12006 | .xword 0xAAAAAAAAAAAAAAA | |
12007 | .xword 0xAAAAAAAAAAAAAAA | |
12008 | .xword 0xAAAAAAAAAAAAAAA | |
12009 | .xword 0xAAAAAAAAAAAAAAA | |
12010 | .xword 0xAAAAAAAAAAAAAAA | |
12011 | .xword 0xAAAAAAAAAAAAAAA | |
12012 | .xword 0xAAAAAAAAAAAAAAA | |
12013 | .xword 0xAAAAAAAAAAAAAAA | |
12014 | .xword 0xAAAAAAAAAAAAAAA | |
12015 | .xword 0xAAAAAAAAAAAAAAA | |
12016 | .xword 0xAAAAAAAAAAAAAAA | |
12017 | .xword 0xAAAAAAAAAAAAAAA | |
12018 | .xword 0xAAAAAAAAAAAAAAA | |
12019 | .xword 0xAAAAAAAAAAAAAAA | |
12020 | .align 64 | |
12021 | .word 0x0 | |
12022 | .align 64 | |
12023 | .xword 0xAAAAAAAAAAAAAAA | |
12024 | .xword 0xAAAAAAAAAAAAAAA | |
12025 | .xword 0xAAAAAAAAAAAAAAA | |
12026 | .xword 0xAAAAAAAAAAAAAAA | |
12027 | .xword 0xAAAAAAAAAAAAAAA | |
12028 | .xword 0xAAAAAAAAAAAAAAA | |
12029 | .xword 0xAAAAAAAAAAAAAAA | |
12030 | .xword 0xAAAAAAAAAAAAAAA | |
12031 | .xword 0xAAAAAAAAAAAAAAA | |
12032 | .xword 0xAAAAAAAAAAAAAAA | |
12033 | .xword 0xAAAAAAAAAAAAAAA | |
12034 | .xword 0xAAAAAAAAAAAAAAA | |
12035 | .xword 0xAAAAAAAAAAAAAAA | |
12036 | .xword 0xAAAAAAAAAAAAAAA | |
12037 | .xword 0xAAAAAAAAAAAAAAA | |
12038 | .xword 0xAAAAAAAAAAAAAAA | |
12039 | .xword 0xAAAAAAAAAAAAAAA | |
12040 | .xword 0xAAAAAAAAAAAAAAA | |
12041 | .xword 0xAAAAAAAAAAAAAAA | |
12042 | .xword 0xAAAAAAAAAAAAAAA | |
12043 | .xword 0xAAAAAAAAAAAAAAA | |
12044 | .xword 0xAAAAAAAAAAAAAAA | |
12045 | .xword 0xAAAAAAAAAAAAAAA | |
12046 | .xword 0xAAAAAAAAAAAAAAA | |
12047 | .align 64 | |
12048 | .word 0x0 | |
12049 | .align 64 | |
12050 | .xword 0xAAAAAAAAAAAAAAA | |
12051 | .xword 0xAAAAAAAAAAAAAAA | |
12052 | .xword 0xAAAAAAAAAAAAAAA | |
12053 | .xword 0xAAAAAAAAAAAAAAA | |
12054 | .xword 0xAAAAAAAAAAAAAAA | |
12055 | .xword 0xAAAAAAAAAAAAAAA | |
12056 | .xword 0xAAAAAAAAAAAAAAA | |
12057 | .xword 0xAAAAAAAAAAAAAAA | |
12058 | .xword 0xAAAAAAAAAAAAAAA | |
12059 | .xword 0xAAAAAAAAAAAAAAA | |
12060 | .xword 0xAAAAAAAAAAAAAAA | |
12061 | .xword 0xAAAAAAAAAAAAAAA | |
12062 | .xword 0xAAAAAAAAAAAAAAA | |
12063 | .xword 0xAAAAAAAAAAAAAAA | |
12064 | .xword 0xAAAAAAAAAAAAAAA | |
12065 | .xword 0xAAAAAAAAAAAAAAA | |
12066 | .xword 0xAAAAAAAAAAAAAAA | |
12067 | .xword 0xAAAAAAAAAAAAAAA | |
12068 | .xword 0xAAAAAAAAAAAAAAA | |
12069 | .xword 0xAAAAAAAAAAAAAAA | |
12070 | .xword 0xAAAAAAAAAAAAAAA | |
12071 | .xword 0xAAAAAAAAAAAAAAA | |
12072 | .xword 0xAAAAAAAAAAAAAAA | |
12073 | .xword 0xAAAAAAAAAAAAAAA | |
12074 | .align 64 | |
12075 | .word 0x0 | |
12076 | .align 64 | |
12077 | .xword 0xAAAAAAAAAAAAAAA | |
12078 | .xword 0xAAAAAAAAAAAAAAA | |
12079 | .xword 0xAAAAAAAAAAAAAAA | |
12080 | .xword 0xAAAAAAAAAAAAAAA | |
12081 | .xword 0xAAAAAAAAAAAAAAA | |
12082 | .xword 0xAAAAAAAAAAAAAAA | |
12083 | .xword 0xAAAAAAAAAAAAAAA | |
12084 | .xword 0xAAAAAAAAAAAAAAA | |
12085 | .xword 0xAAAAAAAAAAAAAAA | |
12086 | .xword 0xAAAAAAAAAAAAAAA | |
12087 | .xword 0xAAAAAAAAAAAAAAA | |
12088 | .xword 0xAAAAAAAAAAAAAAA | |
12089 | .xword 0xAAAAAAAAAAAAAAA | |
12090 | .xword 0xAAAAAAAAAAAAAAA | |
12091 | .xword 0xAAAAAAAAAAAAAAA | |
12092 | .xword 0xAAAAAAAAAAAAAAA | |
12093 | .xword 0xAAAAAAAAAAAAAAA | |
12094 | .xword 0xAAAAAAAAAAAAAAA | |
12095 | .xword 0xAAAAAAAAAAAAAAA | |
12096 | .xword 0xAAAAAAAAAAAAAAA | |
12097 | .xword 0xAAAAAAAAAAAAAAA | |
12098 | .xword 0xAAAAAAAAAAAAAAA | |
12099 | .xword 0xAAAAAAAAAAAAAAA | |
12100 | .xword 0xAAAAAAAAAAAAAAA | |
12101 | .align 64 | |
12102 | .word 0x0 | |
12103 | .align 64 | |
12104 | .xword 0xAAAAAAAAAAAAAAA | |
12105 | .xword 0xAAAAAAAAAAAAAAA | |
12106 | .xword 0xAAAAAAAAAAAAAAA | |
12107 | .xword 0xAAAAAAAAAAAAAAA | |
12108 | .xword 0xAAAAAAAAAAAAAAA | |
12109 | .xword 0xAAAAAAAAAAAAAAA | |
12110 | .xword 0xAAAAAAAAAAAAAAA | |
12111 | .xword 0xAAAAAAAAAAAAAAA | |
12112 | .xword 0xAAAAAAAAAAAAAAA | |
12113 | .xword 0xAAAAAAAAAAAAAAA | |
12114 | .xword 0xAAAAAAAAAAAAAAA | |
12115 | .xword 0xAAAAAAAAAAAAAAA | |
12116 | .xword 0xAAAAAAAAAAAAAAA | |
12117 | .xword 0xAAAAAAAAAAAAAAA | |
12118 | .xword 0xAAAAAAAAAAAAAAA | |
12119 | .xword 0xAAAAAAAAAAAAAAA | |
12120 | .xword 0xAAAAAAAAAAAAAAA | |
12121 | .xword 0xAAAAAAAAAAAAAAA | |
12122 | .xword 0xAAAAAAAAAAAAAAA | |
12123 | .xword 0xAAAAAAAAAAAAAAA | |
12124 | .xword 0xAAAAAAAAAAAAAAA | |
12125 | .xword 0xAAAAAAAAAAAAAAA | |
12126 | .xword 0xAAAAAAAAAAAAAAA | |
12127 | .xword 0xAAAAAAAAAAAAAAA | |
12128 | .align 64 | |
12129 | .word 0x0 | |
12130 | ||
12131 | ||
12132 | ||
12133 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000280000, DATA_VA = 0x00000000002c0000 | |
12134 | attr_text { | |
12135 | Name = .MyHTRAPS_0, | |
12136 | RA = 0x0000000000280000, | |
12137 | PA = ra2pa(0x0000000000280000,0), | |
12138 | part_0_ctx_zero_tsb_config_3, | |
12139 | part_0_ctx_nonzero_tsb_config_3, | |
12140 | TTE_G = 1, | |
12141 | TTE_Context = 0, | |
12142 | TTE_V = 1, | |
12143 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12144 | TTE_NFO = 0, | |
12145 | TTE_IE = 0, | |
12146 | TTE_Soft2 = 0, | |
12147 | TTE_Diag = 0, | |
12148 | TTE_Soft = 0, | |
12149 | TTE_L = 0, | |
12150 | TTE_CP = 1, | |
12151 | TTE_CV = 1, | |
12152 | TTE_E = 0, | |
12153 | TTE_P = 1, | |
12154 | TTE_W = 0, | |
12155 | TTE_X = 0 | |
12156 | } | |
12157 | ||
12158 | ||
12159 | attr_data { | |
12160 | Name = .MyHTRAPS_0, | |
12161 | RA = 0x00000000002c0000, | |
12162 | PA = ra2pa(0x00000000002c0000,0), | |
12163 | part_0_ctx_zero_tsb_config_3, | |
12164 | part_0_ctx_nonzero_tsb_config_3, | |
12165 | TTE_G = 1, | |
12166 | TTE_Context = 0, | |
12167 | TTE_V = 1, | |
12168 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12169 | TTE_NFO = 0, | |
12170 | TTE_IE = 0, | |
12171 | TTE_Soft2 = 0, | |
12172 | TTE_Diag = 0, | |
12173 | TTE_Soft = 0, | |
12174 | TTE_L = 0, | |
12175 | TTE_CP = 0, | |
12176 | TTE_CV = 0, | |
12177 | TTE_E = 0, | |
12178 | TTE_P = 1, | |
12179 | TTE_W = 0 | |
12180 | } | |
12181 | ||
12182 | .text | |
12183 | #include "htraps.s" | |
12184 | #include "tlu_htraps_ext.s" | |
12185 | ||
12186 | ||
12187 | ||
12188 | SECTION .MyHTRAPS_1 TEXT_VA = 0x00000000002a0000, DATA_VA = 0x00000000002e0000 | |
12189 | attr_text { | |
12190 | Name = .MyHTRAPS_1, | |
12191 | RA = 0x00000000002a0000, | |
12192 | PA = ra2pa(0x00000000002a0000,0), | |
12193 | part_0_ctx_zero_tsb_config_3, | |
12194 | part_0_ctx_nonzero_tsb_config_3, | |
12195 | TTE_G = 1, | |
12196 | TTE_Context = 0, | |
12197 | TTE_V = 1, | |
12198 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12199 | TTE_NFO = 0, | |
12200 | TTE_IE = 0, | |
12201 | TTE_Soft2 = 0, | |
12202 | TTE_Diag = 0, | |
12203 | TTE_Soft = 0, | |
12204 | TTE_L = 0, | |
12205 | TTE_CP = 0, | |
12206 | TTE_CV = 1, | |
12207 | TTE_E = 1, | |
12208 | TTE_P = 1, | |
12209 | TTE_W = 0, | |
12210 | TTE_X = 0 | |
12211 | } | |
12212 | ||
12213 | ||
12214 | attr_data { | |
12215 | Name = .MyHTRAPS_1, | |
12216 | RA = 0x00000000002e0000, | |
12217 | PA = ra2pa(0x00000000002e0000,0), | |
12218 | part_0_ctx_zero_tsb_config_3, | |
12219 | part_0_ctx_nonzero_tsb_config_3, | |
12220 | TTE_G = 1, | |
12221 | TTE_Context = 0, | |
12222 | TTE_V = 1, | |
12223 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12224 | TTE_NFO = 0, | |
12225 | TTE_IE = 0, | |
12226 | TTE_Soft2 = 0, | |
12227 | TTE_Diag = 0, | |
12228 | TTE_Soft = 0, | |
12229 | TTE_L = 0, | |
12230 | TTE_CP = 1, | |
12231 | TTE_CV = 1, | |
12232 | TTE_E = 0, | |
12233 | TTE_P = 1, | |
12234 | TTE_W = 0 | |
12235 | } | |
12236 | ||
12237 | .text | |
12238 | #include "htraps.s" | |
12239 | #include "tlu_htraps_ext.s" | |
12240 | ||
12241 | ||
12242 | ||
12243 | SECTION .MyHTRAPS_2 TEXT_VA = 0x0000000200280000, DATA_VA = 0x00000002002c0000 | |
12244 | attr_text { | |
12245 | Name = .MyHTRAPS_2, | |
12246 | RA = 0x0000000200280000, | |
12247 | PA = ra2pa(0x0000000200280000,0), | |
12248 | part_0_ctx_zero_tsb_config_3, | |
12249 | part_0_ctx_nonzero_tsb_config_3, | |
12250 | TTE_G = 1, | |
12251 | TTE_Context = 0, | |
12252 | TTE_V = 1, | |
12253 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12254 | TTE_NFO = 0, | |
12255 | TTE_IE = 0, | |
12256 | TTE_Soft2 = 0, | |
12257 | TTE_Diag = 0, | |
12258 | TTE_Soft = 0, | |
12259 | TTE_L = 0, | |
12260 | TTE_CP = 1, | |
12261 | TTE_CV = 1, | |
12262 | TTE_E = 1, | |
12263 | TTE_P = 1, | |
12264 | TTE_W = 0, | |
12265 | TTE_X = 0 | |
12266 | } | |
12267 | ||
12268 | ||
12269 | attr_data { | |
12270 | Name = .MyHTRAPS_2, | |
12271 | RA = 0x00000002002c0000, | |
12272 | PA = ra2pa(0x00000002002c0000,0), | |
12273 | part_0_ctx_zero_tsb_config_3, | |
12274 | part_0_ctx_nonzero_tsb_config_3, | |
12275 | TTE_G = 1, | |
12276 | TTE_Context = 0, | |
12277 | TTE_V = 1, | |
12278 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12279 | TTE_NFO = 0, | |
12280 | TTE_IE = 0, | |
12281 | TTE_Soft2 = 0, | |
12282 | TTE_Diag = 0, | |
12283 | TTE_Soft = 0, | |
12284 | TTE_L = 0, | |
12285 | TTE_CP = 1, | |
12286 | TTE_CV = 1, | |
12287 | TTE_E = 0, | |
12288 | TTE_P = 1, | |
12289 | TTE_W = 0 | |
12290 | } | |
12291 | ||
12292 | .text | |
12293 | #include "htraps.s" | |
12294 | #include "tlu_htraps_ext.s" | |
12295 | ||
12296 | ||
12297 | ||
12298 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000002002a0000, DATA_VA = 0x00000002002e0000 | |
12299 | attr_text { | |
12300 | Name = .MyHTRAPS_3, | |
12301 | RA = 0x00000002002a0000, | |
12302 | PA = ra2pa(0x00000002002a0000,0), | |
12303 | part_0_ctx_zero_tsb_config_3, | |
12304 | part_0_ctx_nonzero_tsb_config_3, | |
12305 | TTE_G = 1, | |
12306 | TTE_Context = 0, | |
12307 | TTE_V = 1, | |
12308 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12309 | TTE_NFO = 0, | |
12310 | TTE_IE = 0, | |
12311 | TTE_Soft2 = 0, | |
12312 | TTE_Diag = 0, | |
12313 | TTE_Soft = 0, | |
12314 | TTE_L = 0, | |
12315 | TTE_CP = 1, | |
12316 | TTE_CV = 0, | |
12317 | TTE_E = 0, | |
12318 | TTE_P = 1, | |
12319 | TTE_W = 0, | |
12320 | TTE_X = 0 | |
12321 | } | |
12322 | ||
12323 | ||
12324 | attr_data { | |
12325 | Name = .MyHTRAPS_3, | |
12326 | RA = 0x00000002002e0000, | |
12327 | PA = ra2pa(0x00000002002e0000,0), | |
12328 | part_0_ctx_zero_tsb_config_3, | |
12329 | part_0_ctx_nonzero_tsb_config_3, | |
12330 | TTE_G = 1, | |
12331 | TTE_Context = 0, | |
12332 | TTE_V = 1, | |
12333 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12334 | TTE_NFO = 0, | |
12335 | TTE_IE = 0, | |
12336 | TTE_Soft2 = 0, | |
12337 | TTE_Diag = 0, | |
12338 | TTE_Soft = 0, | |
12339 | TTE_L = 0, | |
12340 | TTE_CP = 0, | |
12341 | TTE_CV = 1, | |
12342 | TTE_E = 0, | |
12343 | TTE_P = 1, | |
12344 | TTE_W = 0 | |
12345 | } | |
12346 | ||
12347 | .text | |
12348 | #include "htraps.s" | |
12349 | #include "tlu_htraps_ext.s" | |
12350 | ||
12351 | ||
12352 | ||
12353 | ||
12354 | ||
12355 | SECTION .MyTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x00000000003c0000 | |
12356 | attr_text { | |
12357 | Name = .MyTRAPS_0, | |
12358 | RA = 0x0000000000380000, | |
12359 | PA = ra2pa(0x0000000000380000,0), | |
12360 | part_0_ctx_zero_tsb_config_3, | |
12361 | part_0_ctx_nonzero_tsb_config_3, | |
12362 | TTE_G = 1, | |
12363 | TTE_Context = 0, | |
12364 | TTE_V = 1, | |
12365 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12366 | TTE_NFO = 1, | |
12367 | TTE_IE = 1, | |
12368 | TTE_Soft2 = 0, | |
12369 | TTE_Diag = 0, | |
12370 | TTE_Soft = 0, | |
12371 | TTE_L = 0, | |
12372 | TTE_CP = 1, | |
12373 | TTE_CV = 0, | |
12374 | TTE_E = 1, | |
12375 | TTE_P = 0, | |
12376 | TTE_W = 1, | |
12377 | TTE_X = 0 | |
12378 | } | |
12379 | ||
12380 | ||
12381 | attr_data { | |
12382 | Name = .MyTRAPS_0, | |
12383 | RA = 0x00000000003c0000, | |
12384 | PA = ra2pa(0x00000000003c0000,0), | |
12385 | part_0_ctx_zero_tsb_config_3, | |
12386 | part_0_ctx_nonzero_tsb_config_3, | |
12387 | TTE_G = 1, | |
12388 | TTE_Context = 0, | |
12389 | TTE_V = 1, | |
12390 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12391 | TTE_NFO = 1, | |
12392 | TTE_IE = 1, | |
12393 | TTE_Soft2 = 0, | |
12394 | TTE_Diag = 0, | |
12395 | TTE_Soft = 0, | |
12396 | TTE_L = 0, | |
12397 | TTE_CP = 0, | |
12398 | TTE_CV = 0, | |
12399 | TTE_E = 0, | |
12400 | TTE_P = 1, | |
12401 | TTE_W = 1 | |
12402 | } | |
12403 | ||
12404 | #include "traps.s" | |
12405 | ||
12406 | ||
12407 | ||
12408 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003e0000 | |
12409 | attr_text { | |
12410 | Name = .MyTRAPS_1, | |
12411 | RA = 0x00000000003a0000, | |
12412 | PA = ra2pa(0x00000000003a0000,0), | |
12413 | part_0_ctx_zero_tsb_config_3, | |
12414 | part_0_ctx_nonzero_tsb_config_3, | |
12415 | TTE_G = 1, | |
12416 | TTE_Context = 0, | |
12417 | TTE_V = 1, | |
12418 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12419 | TTE_NFO = 1, | |
12420 | TTE_IE = 1, | |
12421 | TTE_Soft2 = 0, | |
12422 | TTE_Diag = 0, | |
12423 | TTE_Soft = 0, | |
12424 | TTE_L = 0, | |
12425 | TTE_CP = 0, | |
12426 | TTE_CV = 0, | |
12427 | TTE_E = 1, | |
12428 | TTE_P = 1, | |
12429 | TTE_W = 1, | |
12430 | TTE_X = 1 | |
12431 | } | |
12432 | ||
12433 | ||
12434 | attr_data { | |
12435 | Name = .MyTRAPS_1, | |
12436 | RA = 0x00000000003e0000, | |
12437 | PA = ra2pa(0x00000000003e0000,0), | |
12438 | part_0_ctx_zero_tsb_config_3, | |
12439 | part_0_ctx_nonzero_tsb_config_3, | |
12440 | TTE_G = 1, | |
12441 | TTE_Context = 0, | |
12442 | TTE_V = 1, | |
12443 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12444 | TTE_NFO = 1, | |
12445 | TTE_IE = 1, | |
12446 | TTE_Soft2 = 0, | |
12447 | TTE_Diag = 0, | |
12448 | TTE_Soft = 0, | |
12449 | TTE_L = 0, | |
12450 | TTE_CP = 1, | |
12451 | TTE_CV = 1, | |
12452 | TTE_E = 0, | |
12453 | TTE_P = 1, | |
12454 | TTE_W = 1 | |
12455 | } | |
12456 | ||
12457 | #include "traps.s" | |
12458 | ||
12459 | ||
12460 | ||
12461 | SECTION .MyTRAPS_2 TEXT_VA = 0x0000000400380000, DATA_VA = 0x00000004003c0000 | |
12462 | attr_text { | |
12463 | Name = .MyTRAPS_2, | |
12464 | RA = 0x0000000400380000, | |
12465 | PA = ra2pa(0x0000000400380000,0), | |
12466 | part_0_ctx_zero_tsb_config_3, | |
12467 | part_0_ctx_nonzero_tsb_config_3, | |
12468 | TTE_G = 1, | |
12469 | TTE_Context = 0, | |
12470 | TTE_V = 1, | |
12471 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12472 | TTE_NFO = 1, | |
12473 | TTE_IE = 1, | |
12474 | TTE_Soft2 = 0, | |
12475 | TTE_Diag = 0, | |
12476 | TTE_Soft = 0, | |
12477 | TTE_L = 0, | |
12478 | TTE_CP = 1, | |
12479 | TTE_CV = 0, | |
12480 | TTE_E = 0, | |
12481 | TTE_P = 0, | |
12482 | TTE_W = 0, | |
12483 | TTE_X = 0 | |
12484 | } | |
12485 | ||
12486 | ||
12487 | attr_data { | |
12488 | Name = .MyTRAPS_2, | |
12489 | RA = 0x00000004003c0000, | |
12490 | PA = ra2pa(0x00000004003c0000,0), | |
12491 | part_0_ctx_zero_tsb_config_3, | |
12492 | part_0_ctx_nonzero_tsb_config_3, | |
12493 | TTE_G = 1, | |
12494 | TTE_Context = 0, | |
12495 | TTE_V = 1, | |
12496 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12497 | TTE_NFO = 0, | |
12498 | TTE_IE = 1, | |
12499 | TTE_Soft2 = 0, | |
12500 | TTE_Diag = 0, | |
12501 | TTE_Soft = 0, | |
12502 | TTE_L = 0, | |
12503 | TTE_CP = 1, | |
12504 | TTE_CV = 1, | |
12505 | TTE_E = 0, | |
12506 | TTE_P = 1, | |
12507 | TTE_W = 0 | |
12508 | } | |
12509 | ||
12510 | #include "traps.s" | |
12511 | ||
12512 | ||
12513 | ||
12514 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000004003a0000, DATA_VA = 0x00000004003e0000 | |
12515 | attr_text { | |
12516 | Name = .MyTRAPS_3, | |
12517 | RA = 0x00000004003a0000, | |
12518 | PA = ra2pa(0x00000004003a0000,0), | |
12519 | part_0_ctx_zero_tsb_config_3, | |
12520 | part_0_ctx_nonzero_tsb_config_3, | |
12521 | TTE_G = 1, | |
12522 | TTE_Context = 0, | |
12523 | TTE_V = 1, | |
12524 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12525 | TTE_NFO = 1, | |
12526 | TTE_IE = 1, | |
12527 | TTE_Soft2 = 0, | |
12528 | TTE_Diag = 0, | |
12529 | TTE_Soft = 0, | |
12530 | TTE_L = 0, | |
12531 | TTE_CP = 0, | |
12532 | TTE_CV = 0, | |
12533 | TTE_E = 0, | |
12534 | TTE_P = 0, | |
12535 | TTE_W = 1, | |
12536 | TTE_X = 0 | |
12537 | } | |
12538 | ||
12539 | ||
12540 | attr_data { | |
12541 | Name = .MyTRAPS_3, | |
12542 | RA = 0x00000004003e0000, | |
12543 | PA = ra2pa(0x00000004003e0000,0), | |
12544 | part_0_ctx_zero_tsb_config_3, | |
12545 | part_0_ctx_nonzero_tsb_config_3, | |
12546 | TTE_G = 1, | |
12547 | TTE_Context = 0, | |
12548 | TTE_V = 1, | |
12549 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
12550 | TTE_NFO = 1, | |
12551 | TTE_IE = 0, | |
12552 | TTE_Soft2 = 0, | |
12553 | TTE_Diag = 0, | |
12554 | TTE_Soft = 0, | |
12555 | TTE_L = 0, | |
12556 | TTE_CP = 1, | |
12557 | TTE_CV = 1, | |
12558 | TTE_E = 0, | |
12559 | TTE_P = 1, | |
12560 | TTE_W = 0 | |
12561 | } | |
12562 | ||
12563 | #include "traps.s" | |
12564 | ||
12565 | ||
12566 | ||
12567 | ||
12568 | ||
12569 | SECTION .MyDATA_0 TEXT_VA = 0x00000000e0140000, DATA_VA = 0x0000000060140000 | |
12570 | attr_text { | |
12571 | Name = .MyDATA_0, | |
12572 | RA = 0x0000000170100000, | |
12573 | PA = ra2pa(0x0000000170100000,0), | |
12574 | part_0_ctx_zero_tsb_config_0, | |
12575 | part_0_ctx_nonzero_tsb_config_0, | |
12576 | TTE_G = 1, | |
12577 | TTE_Context = PCONTEXT, | |
12578 | TTE_V = 1, | |
12579 | TTE_Size = 0, | |
12580 | TTE_NFO = 0, | |
12581 | TTE_IE = 1, | |
12582 | TTE_Soft2 = 0, | |
12583 | TTE_Diag = 0, | |
12584 | TTE_Soft = 0, | |
12585 | TTE_L = 0, | |
12586 | TTE_CP = 1, | |
12587 | TTE_CV = 1, | |
12588 | TTE_E = 1, | |
12589 | TTE_P = 1, | |
12590 | TTE_W = 0 | |
12591 | } | |
12592 | ||
12593 | ||
12594 | attr_data { | |
12595 | Name = .MyDATA_0, | |
12596 | RA = 0x0000000170100000, | |
12597 | PA = ra2pa(0x0000000170100000,0), | |
12598 | part_0_ctx_zero_tsb_config_1, | |
12599 | part_0_ctx_nonzero_tsb_config_1, | |
12600 | TTE_G = 1, | |
12601 | TTE_Context = PCONTEXT, | |
12602 | TTE_V = 1, | |
12603 | TTE_Size = 3, | |
12604 | TTE_NFO = 1, | |
12605 | TTE_IE = 1, | |
12606 | TTE_Soft2 = 0, | |
12607 | TTE_Diag = 0, | |
12608 | TTE_Soft = 0, | |
12609 | TTE_L = 0, | |
12610 | TTE_CP = 1, | |
12611 | TTE_CV = 0, | |
12612 | TTE_E = 1, | |
12613 | TTE_P = 1, | |
12614 | TTE_W = 0 | |
12615 | } | |
12616 | ||
12617 | ||
12618 | attr_data { | |
12619 | Name = .MyDATA_0, | |
12620 | RA = 0x0000000170100000, | |
12621 | PA = ra2pa(0x0000000170100000,0), | |
12622 | part_0_ctx_nonzero_tsb_config_2, | |
12623 | TTE_G = 1, | |
12624 | TTE_Context = SCONTEXT, | |
12625 | TTE_V = 1, | |
12626 | TTE_Size = 5, | |
12627 | TTE_NFO = 0, | |
12628 | TTE_IE = 0, | |
12629 | TTE_Soft2 = 0, | |
12630 | TTE_Diag = 0, | |
12631 | TTE_Soft = 0, | |
12632 | TTE_L = 0, | |
12633 | TTE_CP = 1, | |
12634 | TTE_CV = 1, | |
12635 | TTE_E = 0, | |
12636 | TTE_P = 1, | |
12637 | TTE_W = 1, | |
12638 | tsbonly | |
12639 | } | |
12640 | ||
12641 | ||
12642 | attr_data { | |
12643 | Name = .MyDATA_0, | |
12644 | hypervisor | |
12645 | } | |
12646 | ||
12647 | ||
12648 | attr_text { | |
12649 | Name = .MyDATA_0, | |
12650 | hypervisor | |
12651 | } | |
12652 | ||
12653 | .data | |
12654 | .xword 0xe0fbd11337713efc | |
12655 | .xword 0x5808acda9ff186e0 | |
12656 | .xword 0xd91e411d88361ec4 | |
12657 | .xword 0x0df7916c4b246517 | |
12658 | .xword 0xca62d6a85352a5cb | |
12659 | .xword 0xea677594e3812193 | |
12660 | .xword 0xc8a3c5026c06485a | |
12661 | .xword 0xbe1c28403810426a | |
12662 | .xword 0x5a7d85f5c80d16ee | |
12663 | .xword 0xb5d3fc1cd5a32185 | |
12664 | .xword 0xe34ffa1be0f997b8 | |
12665 | .xword 0x97ff77d9d4b04d90 | |
12666 | .xword 0xa77cc187e1777a52 | |
12667 | .xword 0xc3bf2da9cffca16d | |
12668 | .xword 0x7bee11a63f0c5375 | |
12669 | .xword 0x156ee7e0436fdc57 | |
12670 | .xword 0x2cfa1cb106aed740 | |
12671 | .xword 0x51a0d86bd438c662 | |
12672 | .xword 0x93f873ff8ec0fc34 | |
12673 | .xword 0xd9a462ca7a54a284 | |
12674 | .xword 0x2f51fde9450587b8 | |
12675 | .xword 0x9c7e5e89a5328003 | |
12676 | .xword 0x6ac6008c8ca413a3 | |
12677 | .xword 0xd7ab2891c87bd4e6 | |
12678 | .xword 0x25547bbe3d86c861 | |
12679 | .xword 0x75e99530b96bb06f | |
12680 | .xword 0x90771d3272b345c3 | |
12681 | .xword 0xdbae5824945f287c | |
12682 | .xword 0xaa2f68a3f0901842 | |
12683 | .xword 0x5245e1de7f65389e | |
12684 | .xword 0x4be108212040d817 | |
12685 | .xword 0xebb6632de2f60e1c | |
12686 | ||
12687 | ||
12688 | ||
12689 | SECTION .MyDATA_1 TEXT_VA = 0x00000000e0340000, DATA_VA = 0x0000000060340000 | |
12690 | attr_text { | |
12691 | Name = .MyDATA_1, | |
12692 | RA = 0x0000000170300000, | |
12693 | PA = ra2pa(0x0000000170300000,0), | |
12694 | part_0_ctx_zero_tsb_config_0, | |
12695 | part_0_ctx_nonzero_tsb_config_0, | |
12696 | TTE_G = 1, | |
12697 | TTE_Context = PCONTEXT, | |
12698 | TTE_V = 1, | |
12699 | TTE_Size = 1, | |
12700 | TTE_NFO = 1, | |
12701 | TTE_IE = 0, | |
12702 | TTE_Soft2 = 0, | |
12703 | TTE_Diag = 0, | |
12704 | TTE_Soft = 0, | |
12705 | TTE_L = 0, | |
12706 | TTE_CP = 1, | |
12707 | TTE_CV = 0, | |
12708 | TTE_E = 1, | |
12709 | TTE_P = 1, | |
12710 | TTE_W = 1 | |
12711 | } | |
12712 | ||
12713 | ||
12714 | attr_data { | |
12715 | Name = .MyDATA_1, | |
12716 | RA = 0x0000000170300000, | |
12717 | PA = ra2pa(0x0000000170300000,0), | |
12718 | part_0_ctx_zero_tsb_config_1, | |
12719 | part_0_ctx_nonzero_tsb_config_1, | |
12720 | TTE_G = 1, | |
12721 | TTE_Context = PCONTEXT, | |
12722 | TTE_V = 1, | |
12723 | TTE_Size = 5, | |
12724 | TTE_NFO = 1, | |
12725 | TTE_IE = 1, | |
12726 | TTE_Soft2 = 0, | |
12727 | TTE_Diag = 0, | |
12728 | TTE_Soft = 0, | |
12729 | TTE_L = 0, | |
12730 | TTE_CP = 1, | |
12731 | TTE_CV = 0, | |
12732 | TTE_E = 0, | |
12733 | TTE_P = 0, | |
12734 | TTE_W = 1 | |
12735 | } | |
12736 | ||
12737 | ||
12738 | attr_data { | |
12739 | Name = .MyDATA_1, | |
12740 | RA = 0x0000000170300000, | |
12741 | PA = ra2pa(0x0000000170300000,0), | |
12742 | part_0_ctx_nonzero_tsb_config_2, | |
12743 | TTE_G = 1, | |
12744 | TTE_Context = SCONTEXT, | |
12745 | TTE_V = 1, | |
12746 | TTE_Size = 1, | |
12747 | TTE_NFO = 0, | |
12748 | TTE_IE = 1, | |
12749 | TTE_Soft2 = 0, | |
12750 | TTE_Diag = 0, | |
12751 | TTE_Soft = 0, | |
12752 | TTE_L = 0, | |
12753 | TTE_CP = 1, | |
12754 | TTE_CV = 0, | |
12755 | TTE_E = 0, | |
12756 | TTE_P = 1, | |
12757 | TTE_W = 1, | |
12758 | tsbonly | |
12759 | } | |
12760 | ||
12761 | ||
12762 | attr_data { | |
12763 | Name = .MyDATA_1, | |
12764 | hypervisor | |
12765 | } | |
12766 | ||
12767 | ||
12768 | attr_text { | |
12769 | Name = .MyDATA_1, | |
12770 | hypervisor | |
12771 | } | |
12772 | ||
12773 | .data | |
12774 | .xword 0xbe2a97658d85981c | |
12775 | .xword 0x199e88bf3c630a37 | |
12776 | .xword 0x7221f8fb0e6d3e43 | |
12777 | .xword 0x43b23f7c36be1c59 | |
12778 | .xword 0x471a72577921347f | |
12779 | .xword 0x44ccc83d382614f2 | |
12780 | .xword 0x7c6da5f9094222fc | |
12781 | .xword 0x5c7b6663378951e1 | |
12782 | .xword 0xb3501412f4750ebd | |
12783 | .xword 0xb98e7675341b11c7 | |
12784 | .xword 0x95e243c17343deb8 | |
12785 | .xword 0x9252e3aa98c20ef0 | |
12786 | .xword 0x0f2401f18a836124 | |
12787 | .xword 0xf705d9bcb8de28c6 | |
12788 | .xword 0x3de80f220aebb4d2 | |
12789 | .xword 0xb20b546bbed63349 | |
12790 | .xword 0x9b2b61b693f4e62e | |
12791 | .xword 0xed2cce7525193dfc | |
12792 | .xword 0xe70a23b3b8fca368 | |
12793 | .xword 0x3577131c3e87bb44 | |
12794 | .xword 0xcb00d9280d6a6afe | |
12795 | .xword 0x2f5a06f08803bb4a | |
12796 | .xword 0xb44d1951b151c1de | |
12797 | .xword 0x2fbd0cb8eab4bdf5 | |
12798 | .xword 0x66d08a97e1c9ec98 | |
12799 | .xword 0xa9d734bdc7418c80 | |
12800 | .xword 0x7bc03638738edb9f | |
12801 | .xword 0x4f86098d9e557fcb | |
12802 | .xword 0x6acce800a9b366cd | |
12803 | .xword 0x6bb679a6f13cbf08 | |
12804 | .xword 0x9519f410555636f4 | |
12805 | .xword 0x7a6ed45297deb5aa | |
12806 | ||
12807 | ||
12808 | ||
12809 | SECTION .MyDATA_2 TEXT_VA = 0x00000000e0540000, DATA_VA = 0x0000000060540000 | |
12810 | attr_text { | |
12811 | Name = .MyDATA_2, | |
12812 | RA = 0x0000000170500000, | |
12813 | PA = ra2pa(0x0000000170500000,0), | |
12814 | part_0_ctx_zero_tsb_config_0, | |
12815 | part_0_ctx_nonzero_tsb_config_0, | |
12816 | TTE_G = 1, | |
12817 | TTE_Context = PCONTEXT, | |
12818 | TTE_V = 1, | |
12819 | TTE_Size = 3, | |
12820 | TTE_NFO = 0, | |
12821 | TTE_IE = 0, | |
12822 | TTE_Soft2 = 0, | |
12823 | TTE_Diag = 0, | |
12824 | TTE_Soft = 0, | |
12825 | TTE_L = 0, | |
12826 | TTE_CP = 1, | |
12827 | TTE_CV = 0, | |
12828 | TTE_E = 1, | |
12829 | TTE_P = 1, | |
12830 | TTE_W = 1 | |
12831 | } | |
12832 | ||
12833 | ||
12834 | attr_data { | |
12835 | Name = .MyDATA_2, | |
12836 | RA = 0x0000000170500000, | |
12837 | PA = ra2pa(0x0000000170500000,0), | |
12838 | part_0_ctx_zero_tsb_config_1, | |
12839 | part_0_ctx_nonzero_tsb_config_1, | |
12840 | TTE_G = 1, | |
12841 | TTE_Context = PCONTEXT, | |
12842 | TTE_V = 1, | |
12843 | TTE_Size = 1, | |
12844 | TTE_NFO = 0, | |
12845 | TTE_IE = 1, | |
12846 | TTE_Soft2 = 0, | |
12847 | TTE_Diag = 0, | |
12848 | TTE_Soft = 0, | |
12849 | TTE_L = 0, | |
12850 | TTE_CP = 1, | |
12851 | TTE_CV = 0, | |
12852 | TTE_E = 1, | |
12853 | TTE_P = 1, | |
12854 | TTE_W = 0 | |
12855 | } | |
12856 | ||
12857 | ||
12858 | attr_data { | |
12859 | Name = .MyDATA_2, | |
12860 | RA = 0x0000000170500000, | |
12861 | PA = ra2pa(0x0000000170500000,0), | |
12862 | part_0_ctx_nonzero_tsb_config_2, | |
12863 | TTE_G = 1, | |
12864 | TTE_Context = SCONTEXT, | |
12865 | TTE_V = 1, | |
12866 | TTE_Size = 3, | |
12867 | TTE_NFO = 0, | |
12868 | TTE_IE = 1, | |
12869 | TTE_Soft2 = 0, | |
12870 | TTE_Diag = 0, | |
12871 | TTE_Soft = 0, | |
12872 | TTE_L = 0, | |
12873 | TTE_CP = 0, | |
12874 | TTE_CV = 1, | |
12875 | TTE_E = 0, | |
12876 | TTE_P = 0, | |
12877 | TTE_W = 0, | |
12878 | tsbonly | |
12879 | } | |
12880 | ||
12881 | ||
12882 | attr_data { | |
12883 | Name = .MyDATA_2, | |
12884 | hypervisor | |
12885 | } | |
12886 | ||
12887 | ||
12888 | attr_text { | |
12889 | Name = .MyDATA_2, | |
12890 | hypervisor | |
12891 | } | |
12892 | ||
12893 | .data | |
12894 | .xword 0xf2596733eb9d7072 | |
12895 | .xword 0x527e8ac908573217 | |
12896 | .xword 0x2c7279d65224677f | |
12897 | .xword 0xbd6d4b43c160596a | |
12898 | .xword 0x5c154656ffe469de | |
12899 | .xword 0x0a133d64a562c6dc | |
12900 | .xword 0xda3fe0bf9d1f233e | |
12901 | .xword 0x0d6227a820984202 | |
12902 | .xword 0x487fea6d303fe9e1 | |
12903 | .xword 0x657611af67b9b69d | |
12904 | .xword 0x09c81743a365d556 | |
12905 | .xword 0x233e20507b50a729 | |
12906 | .xword 0x95da8606ad7312bb | |
12907 | .xword 0xf21065e966767391 | |
12908 | .xword 0x7956df503549eac3 | |
12909 | .xword 0xb25ed96d8eb6671a | |
12910 | .xword 0x9b7c494b77f6d74f | |
12911 | .xword 0xed656e72c2230481 | |
12912 | .xword 0xc783082f654fec5d | |
12913 | .xword 0x82d256d7ecb541af | |
12914 | .xword 0x0ba4a228b5bf4ce6 | |
12915 | .xword 0x15093e35b0f84806 | |
12916 | .xword 0x331a9334f65310e1 | |
12917 | .xword 0x056a72eac7febf04 | |
12918 | .xword 0x1cd2a8a63cff0bc5 | |
12919 | .xword 0x3818a1fc0b26c806 | |
12920 | .xword 0x9c57fd1e968465f1 | |
12921 | .xword 0x9be31ce43df61248 | |
12922 | .xword 0xd328ce8702432435 | |
12923 | .xword 0x7445f061ab5289b5 | |
12924 | .xword 0xfac4aa55bc8a727e | |
12925 | .xword 0x530dbbe9647a8512 | |
12926 | ||
12927 | ||
12928 | ||
12929 | SECTION .MyDATA_3 TEXT_VA = 0x00000000e0740000, DATA_VA = 0x0000000060740000 | |
12930 | attr_text { | |
12931 | Name = .MyDATA_3, | |
12932 | RA = 0x0000000170700000, | |
12933 | PA = ra2pa(0x0000000170700000,0), | |
12934 | part_0_ctx_zero_tsb_config_0, | |
12935 | part_0_ctx_nonzero_tsb_config_0, | |
12936 | TTE_G = 1, | |
12937 | TTE_Context = PCONTEXT, | |
12938 | TTE_V = 1, | |
12939 | TTE_Size = 3, | |
12940 | TTE_NFO = 0, | |
12941 | TTE_IE = 1, | |
12942 | TTE_Soft2 = 0, | |
12943 | TTE_Diag = 0, | |
12944 | TTE_Soft = 0, | |
12945 | TTE_L = 0, | |
12946 | TTE_CP = 0, | |
12947 | TTE_CV = 1, | |
12948 | TTE_E = 0, | |
12949 | TTE_P = 0, | |
12950 | TTE_W = 1 | |
12951 | } | |
12952 | ||
12953 | ||
12954 | attr_data { | |
12955 | Name = .MyDATA_3, | |
12956 | RA = 0x0000000170700000, | |
12957 | PA = ra2pa(0x0000000170700000,0), | |
12958 | part_0_ctx_zero_tsb_config_1, | |
12959 | part_0_ctx_nonzero_tsb_config_1, | |
12960 | TTE_G = 1, | |
12961 | TTE_Context = PCONTEXT, | |
12962 | TTE_V = 1, | |
12963 | TTE_Size = 5, | |
12964 | TTE_NFO = 0, | |
12965 | TTE_IE = 0, | |
12966 | TTE_Soft2 = 0, | |
12967 | TTE_Diag = 0, | |
12968 | TTE_Soft = 0, | |
12969 | TTE_L = 0, | |
12970 | TTE_CP = 1, | |
12971 | TTE_CV = 1, | |
12972 | TTE_E = 0, | |
12973 | TTE_P = 1, | |
12974 | TTE_W = 0 | |
12975 | } | |
12976 | ||
12977 | ||
12978 | attr_data { | |
12979 | Name = .MyDATA_3, | |
12980 | RA = 0x0000000170700000, | |
12981 | PA = ra2pa(0x0000000170700000,0), | |
12982 | part_0_ctx_nonzero_tsb_config_2, | |
12983 | TTE_G = 1, | |
12984 | TTE_Context = SCONTEXT, | |
12985 | TTE_V = 1, | |
12986 | TTE_Size = 5, | |
12987 | TTE_NFO = 0, | |
12988 | TTE_IE = 1, | |
12989 | TTE_Soft2 = 0, | |
12990 | TTE_Diag = 0, | |
12991 | TTE_Soft = 0, | |
12992 | TTE_L = 0, | |
12993 | TTE_CP = 1, | |
12994 | TTE_CV = 0, | |
12995 | TTE_E = 1, | |
12996 | TTE_P = 0, | |
12997 | TTE_W = 0, | |
12998 | tsbonly | |
12999 | } | |
13000 | ||
13001 | ||
13002 | attr_data { | |
13003 | Name = .MyDATA_3, | |
13004 | hypervisor | |
13005 | } | |
13006 | ||
13007 | ||
13008 | attr_text { | |
13009 | Name = .MyDATA_3, | |
13010 | hypervisor | |
13011 | } | |
13012 | ||
13013 | .data | |
13014 | .xword 0x8100f71cd599b405 | |
13015 | .xword 0x690d316d4cef5b10 | |
13016 | .xword 0xd9e1c9d5003c8b48 | |
13017 | .xword 0xb81623ac8bd43c97 | |
13018 | .xword 0x8bb3e3244b91ff97 | |
13019 | .xword 0xebc53cf9c7ed8f57 | |
13020 | .xword 0xa119a536825c0952 | |
13021 | .xword 0xef2d9bdfd5471a4b | |
13022 | .xword 0x31a70fef20098449 | |
13023 | .xword 0xef2476d00a7f97a6 | |
13024 | .xword 0x42aa0191e9b8b86c | |
13025 | .xword 0xc2114dd34ee4064c | |
13026 | .xword 0x505f1d9fd2c18a0e | |
13027 | .xword 0x87e546b3def02f0b | |
13028 | .xword 0xe2e49739f134f708 | |
13029 | .xword 0x84c3826c1a2bffdc | |
13030 | .xword 0x55966d6e13247ad7 | |
13031 | .xword 0x2c1ec80860966686 | |
13032 | .xword 0x622113a020e45611 | |
13033 | .xword 0xe80bec4b0d725425 | |
13034 | .xword 0xbacc0696a9c5e3cf | |
13035 | .xword 0xcfed86e62f1acee3 | |
13036 | .xword 0x259a7bd284499cc4 | |
13037 | .xword 0x8b8d503db36f384f | |
13038 | .xword 0x409b6acd2792577a | |
13039 | .xword 0xef878a834ce78082 | |
13040 | .xword 0xdadfe848abcfb088 | |
13041 | .xword 0xe40ab2a94a293988 | |
13042 | .xword 0xf5284c0b0ed2400f | |
13043 | .xword 0x6558069bd7fa826e | |
13044 | .xword 0xe50cc550a4142fde | |
13045 | .xword 0xdd66091ca0288a15 | |
13046 | ||
13047 | ||
13048 | ||
13049 | ||
13050 | ||
13051 | SECTION .MyTEXT_0 TEXT_VA = 0x00000000e0200000 | |
13052 | attr_text { | |
13053 | Name = .MyTEXT_0, | |
13054 | RA = 0x00000000e0200000, | |
13055 | PA = ra2pa(0x00000000e0200000,0), | |
13056 | part_0_ctx_zero_tsb_config_1, | |
13057 | part_0_ctx_nonzero_tsb_config_1, | |
13058 | TTE_G = 1, | |
13059 | TTE_Context = PCONTEXT, | |
13060 | TTE_V = 1, | |
13061 | TTE_Size = 0, | |
13062 | TTE_NFO = 0, | |
13063 | TTE_IE = 1, | |
13064 | TTE_Soft2 = 0, | |
13065 | TTE_Diag = 0, | |
13066 | TTE_Soft = 0, | |
13067 | TTE_L = 0, | |
13068 | TTE_CP = 0, | |
13069 | TTE_CV = 1, | |
13070 | TTE_E = 0, | |
13071 | TTE_P = 1, | |
13072 | TTE_W = 1 | |
13073 | } | |
13074 | ||
13075 | .text | |
13076 | nuff_said_0: | |
13077 | fdivd %f0, %f4, %f6 | |
13078 | mov HIGHVA_HIGHNUM, %r11 | |
13079 | sllx %r11, 32, %r11 | |
13080 | or %r27, %r11, %r27 | |
13081 | jmpl %r27+8, %r0 | |
13082 | jmpl %r27+8, %r0 | |
13083 | jmpl %r27+8, %r0 | |
13084 | jmpl %r27+8, %r0 | |
13085 | fdivs %f0, %f4, %f6 | |
13086 | ||
13087 | ||
13088 | ||
13089 | SECTION .MyTEXT_1 TEXT_VA = 0x00000000e0a00000 | |
13090 | attr_text { | |
13091 | Name = .MyTEXT_1, | |
13092 | RA = 0x00000000e0a00000, | |
13093 | PA = ra2pa(0x00000000e0a00000,0), | |
13094 | part_0_ctx_zero_tsb_config_1, | |
13095 | part_0_ctx_nonzero_tsb_config_1, | |
13096 | TTE_G = 1, | |
13097 | TTE_Context = PCONTEXT, | |
13098 | TTE_V = 1, | |
13099 | TTE_Size = 3, | |
13100 | TTE_NFO = 0, | |
13101 | TTE_IE = 0, | |
13102 | TTE_Soft2 = 0, | |
13103 | TTE_Diag = 0, | |
13104 | TTE_Soft = 0, | |
13105 | TTE_L = 0, | |
13106 | TTE_CP = 1, | |
13107 | TTE_CV = 1, | |
13108 | TTE_E = 0, | |
13109 | TTE_P = 0, | |
13110 | TTE_W = 0 | |
13111 | } | |
13112 | ||
13113 | .text | |
13114 | nuff_said_1: | |
13115 | fdivs %f0, %f4, %f6 | |
13116 | mov HIGHVA_HIGHNUM, %r11 | |
13117 | sllx %r11, 32, %r11 | |
13118 | or %r27, %r11, %r27 | |
13119 | jmpl %r27+8, %r0 | |
13120 | jmpl %r27+8, %r0 | |
13121 | jmpl %r27+8, %r0 | |
13122 | jmpl %r27+8, %r0 | |
13123 | fdivd %f0, %f4, %f4 | |
13124 | ||
13125 | ||
13126 | ||
13127 | SECTION .MyTEXT_2 TEXT_VA = 0x00000000e1200000 | |
13128 | attr_text { | |
13129 | Name = .MyTEXT_2, | |
13130 | RA = 0x00000000e1200000, | |
13131 | PA = ra2pa(0x00000000e1200000,0), | |
13132 | part_0_ctx_zero_tsb_config_1, | |
13133 | part_0_ctx_nonzero_tsb_config_1, | |
13134 | TTE_G = 1, | |
13135 | TTE_Context = PCONTEXT, | |
13136 | TTE_V = 1, | |
13137 | TTE_Size = 5, | |
13138 | TTE_NFO = 0, | |
13139 | TTE_IE = 0, | |
13140 | TTE_Soft2 = 0, | |
13141 | TTE_Diag = 0, | |
13142 | TTE_Soft = 0, | |
13143 | TTE_L = 0, | |
13144 | TTE_CP = 0, | |
13145 | TTE_CV = 1, | |
13146 | TTE_E = 1, | |
13147 | TTE_P = 1, | |
13148 | TTE_W = 0 | |
13149 | } | |
13150 | ||
13151 | .text | |
13152 | nuff_said_2: | |
13153 | fdivd %f0, %f4, %f6 | |
13154 | mov HIGHVA_HIGHNUM, %r11 | |
13155 | sllx %r11, 32, %r11 | |
13156 | or %r27, %r11, %r27 | |
13157 | jmpl %r27+8, %r0 | |
13158 | jmpl %r27+8, %r0 | |
13159 | jmpl %r27+8, %r0 | |
13160 | jmpl %r27+8, %r0 | |
13161 | fdivs %f0, %f4, %f6 | |
13162 | ||
13163 | ||
13164 | ||
13165 | SECTION .MyTEXT_3 TEXT_VA = 0x00000000e1a00000 | |
13166 | attr_text { | |
13167 | Name = .MyTEXT_3, | |
13168 | RA = 0x00000000e1a00000, | |
13169 | PA = ra2pa(0x00000000e1a00000,0), | |
13170 | part_0_ctx_zero_tsb_config_1, | |
13171 | part_0_ctx_nonzero_tsb_config_1, | |
13172 | TTE_G = 1, | |
13173 | TTE_Context = PCONTEXT, | |
13174 | TTE_V = 1, | |
13175 | TTE_Size = 3, | |
13176 | TTE_NFO = 0, | |
13177 | TTE_IE = 1, | |
13178 | TTE_Soft2 = 0, | |
13179 | TTE_Diag = 0, | |
13180 | TTE_Soft = 0, | |
13181 | TTE_L = 0, | |
13182 | TTE_CP = 0, | |
13183 | TTE_CV = 1, | |
13184 | TTE_E = 1, | |
13185 | TTE_P = 0, | |
13186 | TTE_W = 1 | |
13187 | } | |
13188 | ||
13189 | .text | |
13190 | nuff_said_3: | |
13191 | fdivs %f0, %f4, %f4 | |
13192 | mov HIGHVA_HIGHNUM, %r11 | |
13193 | sllx %r11, 32, %r11 | |
13194 | or %r27, %r11, %r27 | |
13195 | jmpl %r27+8, %r0 | |
13196 | jmpl %r27+8, %r0 | |
13197 | jmpl %r27+8, %r0 | |
13198 | jmpl %r27+8, %r0 | |
13199 | fdivd %f0, %f4, %f8 | |
13200 | ||
13201 | ||
13202 | ||
13203 | ||
13204 | ||
13205 | SECTION .VaHOLE_0 TEXT_VA = 0x00007fffffffe000 | |
13206 | attr_text { | |
13207 | Name = .VaHOLE_0, | |
13208 | RA = 0x00000000ffffe000, | |
13209 | PA = ra2pa(0x00000000ffffe000,0), | |
13210 | part_0_ctx_zero_tsb_config_1, | |
13211 | part_0_ctx_nonzero_tsb_config_1, | |
13212 | TTE_G = 1, | |
13213 | TTE_Context = PCONTEXT, | |
13214 | TTE_V = 1, | |
13215 | TTE_Size = 1, | |
13216 | TTE_NFO = 0, | |
13217 | TTE_IE = 0, | |
13218 | TTE_Soft2 = 0, | |
13219 | TTE_Diag = 0, | |
13220 | TTE_Soft = 0, | |
13221 | TTE_L = 0, | |
13222 | TTE_CP = 0, | |
13223 | TTE_CV = 0, | |
13224 | TTE_E = 1, | |
13225 | TTE_P = 0, | |
13226 | TTE_W = 1, | |
13227 | TTE_X = 1 | |
13228 | } | |
13229 | ||
13230 | .text | |
13231 | .global vahole_target0 | |
13232 | .text | |
13233 | .global vahole_target1 | |
13234 | .text | |
13235 | .global vahole_target2 | |
13236 | .text | |
13237 | .global vahole_target3 | |
13238 | nop | |
13239 | .align 4096 | |
13240 | nop | |
13241 | .align 2048 | |
13242 | nop | |
13243 | .align 1024 | |
13244 | nop | |
13245 | .align 512 | |
13246 | nop | |
13247 | .align 256 | |
13248 | nop | |
13249 | .align 128 | |
13250 | nop | |
13251 | .align 64 | |
13252 | nop | |
13253 | nop | |
13254 | .align 16 | |
13255 | nop;nop;nop | |
13256 | vahole_target0: nop;nop | |
13257 | vahole_target1: nop | |
13258 | vahole_target2: nop;nop;nop | |
13259 | vahole_target3: nop;nop;nop | |
13260 | ||
13261 | ||
13262 | ||
13263 | ||
13264 | ||
13265 | SECTION .VaHOLEL_0 TEXT_VA = 0x00000000ffffe000 | |
13266 | attr_text { | |
13267 | Name = .VaHOLEL_0, | |
13268 | RA = 0x00000000ffffe000, | |
13269 | PA = ra2pa(0x00000000ffffe000,0), | |
13270 | part_0_ctx_zero_tsb_config_0, | |
13271 | part_0_ctx_nonzero_tsb_config_0, | |
13272 | TTE_G = 1, | |
13273 | TTE_Context = PCONTEXT, | |
13274 | TTE_V = 1, | |
13275 | TTE_Size = 5, | |
13276 | TTE_NFO = 0, | |
13277 | TTE_IE = 0, | |
13278 | TTE_Soft2 = 0, | |
13279 | TTE_Diag = 0, | |
13280 | TTE_Soft = 0, | |
13281 | TTE_L = 0, | |
13282 | TTE_CP = 1, | |
13283 | TTE_CV = 1, | |
13284 | TTE_E = 1, | |
13285 | TTE_P = 0, | |
13286 | TTE_W = 1, | |
13287 | TTE_X = 1, | |
13288 | tsbonly | |
13289 | } | |
13290 | ||
13291 | .text | |
13292 | nop | |
13293 | ||
13294 | ||
13295 | ||
13296 | ||
13297 | ||
13298 | SECTION .ZERO_0 TEXT_VA = 0x0000000000000000 | |
13299 | attr_text { | |
13300 | Name = .ZERO_0, | |
13301 | RA = 0x0000000000000000, | |
13302 | PA = ra2pa(0x0000000000000000,0), | |
13303 | part_0_ctx_zero_tsb_config_1, | |
13304 | part_0_ctx_nonzero_tsb_config_1, | |
13305 | TTE_G = 1, | |
13306 | TTE_Context = 0x44, | |
13307 | TTE_V = 1, | |
13308 | TTE_Size = 1, | |
13309 | TTE_NFO = 0, | |
13310 | TTE_IE = 0, | |
13311 | TTE_Soft2 = 0, | |
13312 | TTE_Diag = 0, | |
13313 | TTE_Soft = 0, | |
13314 | TTE_L = 0, | |
13315 | TTE_CP = 1, | |
13316 | TTE_CV = 1, | |
13317 | TTE_E = 0, | |
13318 | TTE_P = 0, | |
13319 | TTE_W = 1, | |
13320 | TTE_X = 1 | |
13321 | } | |
13322 | ||
13323 | ||
13324 | .text | |
13325 | nop | |
13326 | mov HIGHVA_HIGHNUM, %r11 | |
13327 | sllx %r11, 32, %r11 | |
13328 | or %r27, %r11, %r27 | |
13329 | jmpl %r27+8, %r0 | |
13330 | nop | |
13331 | jmpl %r27+8, %r0 | |
13332 | nop | |
13333 | ||
13334 | Power_On_Reset: | |
13335 | setx HRedmode_Reset_Handler, %g1, %g2 | |
13336 | jmp %g2 | |
13337 | nop | |
13338 | .align 32 | |
13339 | ||
13340 | Watchdog_Reset: | |
13341 | setx wdog_red_ext, %g1, %g2 | |
13342 | jmp %g2 | |
13343 | nop | |
13344 | .align 32 | |
13345 | ||
13346 | External_Reset: | |
13347 | My_External_Reset | |
13348 | ||
13349 | .align 32 | |
13350 | ||
13351 | Software_Initiated_Reset: | |
13352 | setx Software_Reset_Handler, %g1, %g2 | |
13353 | jmp %g2 | |
13354 | nop | |
13355 | ||
13356 | .align 32 | |
13357 | ||
13358 | RED_Mode_Other_Reset: | |
13359 | ! IF TL=6, shift stack by one .. | |
13360 | rdpr %tl, %l1 | |
13361 | cmp %l1, 6 | |
13362 | be start_tsa_shift | |
13363 | nop | |
13364 | ||
13365 | continue_red_other: | |
13366 | mov 0x1f, %l1 | |
13367 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
13368 | ||
13369 | rdpr %tt, %l1 | |
13370 | ||
13371 | rdhpr %htstate, %l2 | |
13372 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv | |
13373 | brnz,a %l2, red_goto_handler | |
13374 | rdhpr %htba, %l2 | |
13375 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. | |
13376 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. | |
13377 | be,a red_goto_handler | |
13378 | rdpr %tba, %l2 | |
13379 | rdhpr %htba, %l2 | |
13380 | red_goto_handler: | |
13381 | ||
13382 | sllx %l1, 5, %l1 | |
13383 | add %l1, %l2, %l2 | |
13384 | rdhpr %hpstate, %l1 | |
13385 | jmp %l2 | |
13386 | wrhpr %l1, 0x20, %hpstate | |
13387 | nop | |
13388 | ||
13389 | wdog_red_ext: | |
13390 | ! Shift stack down by 1 ... | |
13391 | rdpr %tl, %l1 | |
13392 | cmp %l1, 6 | |
13393 | bl wdog_end | |
13394 | start_tsa_shift: | |
13395 | mov 0x2, %l2 | |
13396 | ||
13397 | tsa_shift: | |
13398 | wrpr %l2, %tl | |
13399 | rdpr %tt, %l3 | |
13400 | rdpr %tpc, %l4 | |
13401 | rdpr %tnpc, %l5 | |
13402 | rdpr %tstate, %l6 | |
13403 | rdhpr %htstate, %l7 | |
13404 | dec %l2 | |
13405 | wrpr %l2, %tl | |
13406 | wrpr %l3, %tt | |
13407 | wrpr %l4, %tpc | |
13408 | wrpr %l5, %tnpc | |
13409 | wrpr %l6, %tstate | |
13410 | wrhpr %l7, %htstate | |
13411 | add %l2, 2, %l2 | |
13412 | cmp %l2, %l1 | |
13413 | ble tsa_shift | |
13414 | nop | |
13415 | tsa_shift_done: | |
13416 | dec %l1 | |
13417 | wrpr %l1, %tl | |
13418 | ||
13419 | wdog_end: | |
13420 | ! If TT != 2, then goto trap handler | |
13421 | rdpr %tt, %l1 | |
13422 | ||
13423 | cmp %l1, 0x2 | |
13424 | bne continue_red_other | |
13425 | nop | |
13426 | ! else done | |
13427 | mov 0x1f, %l1 | |
13428 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
13429 | done | |
13430 | ||
13431 | ||
13432 | ||
13433 | ||
13434 | ||
13435 | SECTION .VaHOLE_PA_0 TEXT_VA = 0x000000ffffffe000 | |
13436 | attr_text { | |
13437 | Name = .VAHOLE_PA_0, | |
13438 | hypervisor | |
13439 | } | |
13440 | ||
13441 | nop | |
13442 | .align 4096 | |
13443 | nop | |
13444 | .align 2048 | |
13445 | nop | |
13446 | .align 1024 | |
13447 | nop | |
13448 | .align 512 | |
13449 | nop | |
13450 | .align 256 | |
13451 | nop | |
13452 | .align 128 | |
13453 | nop | |
13454 | .align 64 | |
13455 | nop | |
13456 | nop | |
13457 | .align 16 | |
13458 | nop;nop;nop | |
13459 | nop | |
13460 | nop | |
13461 | jmpl %r27+8, %r0 | |
13462 | nop | |
13463 | nop | |
13464 | nop | |
13465 | jmpl %r27+8, %r0 | |
13466 | nop | |
13467 | ||
13468 | ||
13469 | ||
13470 | ||
13471 | ||
13472 | SECTION .MASKEDHOLE_0 TEXT_VA = 0x0000000100000000 | |
13473 | attr_text { | |
13474 | Name = .MASKEDHOLE_0, | |
13475 | RA = 0x0000000000000000, | |
13476 | PA = ra2pa(0x0000000000000000,0), | |
13477 | part_0_ctx_zero_tsb_config_3, | |
13478 | part_0_ctx_nonzero_tsb_config_3, | |
13479 | TTE_G = 1, | |
13480 | TTE_Context = 0x44, | |
13481 | TTE_V = 1, | |
13482 | TTE_Size = 1, | |
13483 | TTE_NFO = 0, | |
13484 | TTE_IE = 1, | |
13485 | TTE_Soft2 = 0, | |
13486 | TTE_Diag = 0, | |
13487 | TTE_Soft = 0, | |
13488 | TTE_L = 0, | |
13489 | TTE_CP = 0, | |
13490 | TTE_CV = 0, | |
13491 | TTE_E = 0, | |
13492 | TTE_P = 0, | |
13493 | TTE_W = 0, | |
13494 | TTE_X = 1, | |
13495 | tsbonly | |
13496 | } | |
13497 | ||
13498 | ||
13499 | attr_text { | |
13500 | Name = .MASKEDHOLE_0, | |
13501 | hypervisor | |
13502 | } | |
13503 | ||
13504 | mov HIGHVA_HIGHNUM, %r11 | |
13505 | sllx %r11, 32, %r11 | |
13506 | or %r27, %r11, %r27 | |
13507 | jmpl %r27+8, %r0 | |
13508 | nop | |
13509 | ||
13510 | ||
13511 | ||
13512 | #if 0 | |
13513 | #endif |