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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / uarch / tlu / src / tlu_rand5.j
CommitLineData
86530b38
AT		 1/*
2 * vim: wrap:wm=0
3 *
4 * Instruction set to irritate TLU related logic
5 * Trap/HTrap instructions from user/priv/hpriv modes
6 * Trap instructions
7 * Read/write TLU ASR/ASI
8 * Divides & Div/0
9 * saves/restores (trap handlers)
10 * Cause ldst exceptions (alignment, access_error, priv_action..)
11 * Toggle between user/super/hyper ..
12 * Branches with traps in delay slots
13 * Splash hpstate (tlz)
14 * Demap all (stxa to 0x57/0x5f with data = 0x80)
15 * Clean window traps
16 * Spill/fill traps
17 * SIR
18 * Red state entry ...
19 * TBA/HTBA switching
20 * MMU on/off
21 * Int Vect (SW & $EV)
22 * Softint (SW and SM/TM)
23 * Mondo
24 * XIR ($EV)
25 * Hintp
26 * MT parking/unparking ..
27 * Instruction breakpoint
28 * Watchpoints
29 * Random change to TSA and done/retry
30 * nfo/unauth access ..
31 * pmu traps
32 * cwq traps
33 * MA trap
34 * DAE/IAE TTE exceptions
35 * Execution with high pc bits set ..
36 * instruction_access_range
37 * instruction/data_invalid_TSB_entry ..
38 * unsupported_page_size
39 * instruction/data_access_mmu_error
40 * CETER/CERER programming
41 * conditional user events
42 * tick enable toggling
43 *
44 * Can't change pstate/hpstate and TL randomly, Nas croaks if it gets
45 * the condition TL>MAXPTL and HPRIV=0
46 *
47 * WARNING : RUN INDRA with -cpp_args=-I$DIAG_ROOT/assembly/include if your
48 * ======= $JALPATH is not $DIAG_ROOT/assembly/
49 *
50 *
51 * Diag Conditionals
52 *
53 * MULTIPASS : Run main diag code MULTIPASS+1 times
54 * SPC : Bench Conditional
55 * XIR_RND_CORES : Randomly send XIR to multiple threads
56 * SPLASH_HIDECR : Set initial decr (hi32 bits) value
57
58 * Generator Conditionals:
59 * NO_MHIT : Uses TTE_Size 0 instead of random
60 * HIGH_VAS : Uses text VAs in >32 bit range - ON by default
61 * MT : MT features - ON by default
62 * NOVAHOLE : Don't branch to vahole ..
63 * TH_STRESS : Include random threads running stress opcodes..
64 * NO_CMP : Don use any CMP parking/unparking ..
65 * NO_SPU : Do not include and tlu_rand5 SPU rules
66 * TEMPLATE1 : External template # 1
67 * TEMPLATE2 : External template # 2
68 * LOWTL : Don't write high TL values ..
69 * LOWGL : Don't write high GL values ..
70 */
71
72#ij define MT
73#ij define HIGH_VAS
74#ij define NOVAHOLE
75
76template main();
77
78// %%section c_declarations & thread groupings{{{
79%%section c_declarations
80 int label = 0;
81 int myrand ;
82 int myrand2 ;
83 int myrand3 ;
84 int myrand2n ;
85 int myrand3n ;
86 int tgmh1, tgml1 ;
87 int tgmh2, tgml2 ;
88 int tgrand1, tgrand2, tmast ;
89 int i,j, tst1=0;
90 int mythid = 0;
91 int thall = 0xff;
92 int tt1=0, tt2=0;
93 char label_suffix [16];
94 int cmpex = 0;
95%%
96// }}}
97
98// %%section init {{{
99%%section init
100#!/usr/bin/perl -w
101$ver = '$Id: tlu_rand5.j,v 1.1.1.1 2007/02/13 22:21:08 drp Exp $ ';
102$ver =~ s/\$Id\s*:|Exp\s+\$//go;
103print "!# Diag Generated using $ver\n\n";
104#ijifdef WT_FILE
105print "\n!# Included Weight File ", WT_FILE , "\n\n";
106#ijendif
107open (GEN, "jal.jj");
108while (<GEN>){next if (!/^inst:/&&!$in);$in=1;$inst .= $_; last if(/^\s*;/)}
109close GEN;print "/* Grammar Weightings\n\n$inst \n*/\n" ;
110%%
111// }}}
112
113// %%section init {{{
114%%section init
115
116 // Pick master and TG master threads
117 i = IJ_random()&0x3;
118 j = IJ_random()&0x3;
119 tgml1 = (1<<i); tgmh1 = ((1 <<j)<<4);
120 tgrand1 = tgml1 | tgmh1;
121 i = IJ_random()&0x3;
122 j = IJ_random()&0x3;
123 tgml2 = (1<<i); tgmh2 = ((1 <<j)<<4);
124 tgrand2 = tgml2 | tgmh2;
125 tmast = (1 << (IJ_random()&0x7));
126
127#ijifdef TEMPLATE1
128 // Pick unique (single) thread for tt1 and tt2
129 i = IJ_random()&0x7;
130 tt1 = (1<<i);
131 while ((tt1&(tgrand1|tgrand2|tmast))){
132 i = IJ_random()&0x7;
133 tt1 = (1<<i);
134 }
135#ijendif
136#ijifdef TEMPLATE2
137 i = IJ_random()&0x7;
138 tt2 = (1<<i);
139 while ((tt2&(tt1|tgrand1|tgrand2|tmast))){
140 i = IJ_random()&0x7;
141 tt2 = (1<<i);
142 }
143#ijendif
144
145 myrand = IJ_random()&0xff & ~(tt1|tt2);
146 myrand2 = IJ_random()&0xff & ~(tt1|tt2);
147 myrand3 = IJ_random()&0xff & ~(tt1|tt2);
148 myrand2n = (~myrand2)&0xff & ~(tt1|tt2);
149 myrand3n = (~myrand3)&0xff & ~(tt1|tt2);
150
151#ijifdef TH_STRESS
152 tst1 = IJ_random()&0xff ;
153#ijendif
154 tst1 = tst1 & ~(tgrand1|tgrand2|tmast|tt2|tt1);
155
156 myrand = myrand & ~tst1;
157 myrand2 = myrand2 & ~tst1;
158 myrand3 = myrand3 & ~tst1;
159 thall = thall & ~(tst1|tt1|tt2);
160
161 //printf ("TA=0x%x TM=0x%x, TG1=0x%x, TG2=0x%x, MR=0x%x, MR2=0x%x, MR3=0x%x, MR2N=0x%x, MR3N=0x%0x, TST1=0x%x TT1=0x%x TT2=0x%x\n", thall, tmast, tgrand1, tgrand2, myrand, myrand2, myrand3, myrand2n, myrand3n, tst1, tt1, tt2);
162
163#ij ifdef MT
164 IJ_bind_thread_group(th_realall, 0xff);
165 IJ_bind_thread_group(th_all, thall);
166 IJ_bind_thread_group(th_A, 0x55);
167 IJ_bind_thread_group(th_B,0xaa);
168 IJ_bind_thread_group(th_C,0x11);
169 IJ_bind_thread_group(th_D,0xee);
170 IJ_bind_thread_group(th_E,0x10);
171 IJ_bind_thread_group(th_stress,tst1);
172 IJ_set_rvar(Rv_tid,"4'b0rrr");
173 IJ_set_rvar(Rv_intdisvec,"32'hrrr0rrrr");
174 IJ_bind_thread_group(th_rand,myrand);
175 IJ_bind_thread_group(th_rand2,myrand2);
176 IJ_bind_thread_group(th_rand3,myrand3);
177 IJ_bind_thread_group(th_rand2n,myrand2n);
178 IJ_bind_thread_group(th_rand3n,myrand3n);
179 IJ_bind_thread_group(th_tgm1,tgrand1);
180 IJ_bind_thread_group(th_tgm2,tgrand2);
181 IJ_bind_thread_group(th_tgmh1,tgmh1);
182 IJ_bind_thread_group(th_tgmh2,tgmh2);
183 IJ_bind_thread_group(th_tgml1,tgml1);
184 IJ_bind_thread_group(th_tgml2,tgml2);
185 IJ_bind_thread_group(th_mast,tmast);
186 IJ_bind_thread_group(th_tt1,tt1);
187 IJ_bind_thread_group(th_tt2,tt2);
188 IJ_bind_thread_group(th_none, 0x0);
189 IJ_bind_thread_group(th_0, 0x01);
190 IJ_bind_thread_group(th_1, 0x02);
191 IJ_bind_thread_group(th_2, 0x04);
192 IJ_bind_thread_group(th_3, 0x08);
193 IJ_bind_thread_group(th_4, 0x10);
194 IJ_bind_thread_group(th_5, 0x20);
195 IJ_bind_thread_group(th_6, 0x40);
196 IJ_bind_thread_group(th_7, 0x80);
197#ij else
198 IJ_bind_thread_group(th_all, 0x01);
199 IJ_bind_thread_group(th_A, 0x01);
200 IJ_bind_thread_group(th_B,0x01);
201 IJ_set_rvar(Rv_tid,"4'b0000");
202 IJ_set_rvar(Rv_intdisvec,"18'hrrrrr, 6'h00, 8'hrr");
203#ij endif
204
205 IJ_bind_thread_group(th_0, 0x01);
206 IJ_bind_thread_group(th_nz, 0xfe);
207
208 // Random 64 bits //
209 IJ_set_rvar(Rv_rand_64,"64'hrrrrrrrr_rrrrrrrr");
210 IJ_set_rvar(Rv_rand_32,"32'hrrrrrrrr");
211
212
213 IJ_set_rvar(Rv_pdist_reg,"5'brrrr0");
214
215 IJ_set_rvar(Rv_intdest,"5'brrrrr");
216
217 IJ_set_rvar(Rv_offset,"6'brrr000");
218
219 IJ_set_rvar(Rv_ceter,"{7:2,1..6}");
220
221 IJ_set_rvar(Rv_cmpr,"{0x100, 0x150:2, 0x200:3, 0x250:2, 0x300}");
222 IJ_set_rvar(Rv_fcmpr,"{0x380, 0x550, 0x700, 0x900, 0xc00}");
223 IJ_set_rvar(Rv_nintdis,"{0,1:3}"); // Inverse of intdis ..
224
225 // Rand register
226
227 IJ_set_rvar(Rv_randreg, "{6..20}");
228
229 // TBA/HTBA values
230
231 IJ_set_rvar(Rv_htba, "29'{0}, 2'b0l, 11'{0}, 6'b1010l0, 16'{0}");
232 IJ_set_rvar(Rv_tba, "29'{0}, 2'bj0, 11'{0}, 6'b1110j0, 16'{0}");
233
234 // LSU cntl reg ..
235 //IJ_set_rvar(Rv_lsucntl,"63'hrrrrrrrr_rrrrrrrr,1'{1}");
236 IJ_set_rvar(Rv_lsucntl,"32'hrrrrrrrr");
237 IJ_set_rvar(Rv_lsucntl2,"{1..7}");
238
239 // Pwr mgmt
240 IJ_set_rvar(Rv_pwrmgmt,"14'brrrrrrrrrrrrrrr");
241
242 // Illegal combos
243 IJ_set_rvar(Rv_illtrap, "2'b1r,5'brrrr,6'b101rrr,19'hrrrrr");
244
245 // Register usage - use 0-20 //
246 // R31 is memory pointer
247 // R30 is trap number register
248 // R28/29 is return PC/NPC for reset traps when TL=MAXTL ..
249 // R27 is used as a jmp ptr
250 // DO NOT USE R31, R15, as these are used for memptr
251 // FREE to use 0..13, 16..20 in this template
252 // (%o0-%o5, %l0-%l4)
253 // (%r21 - %r26) (%l5 - %i2) should be used in handlers
254
255 // Reset/RED handlers and relocators use l1-l7 (17-23).
256
257 IJ_set_ropr_fld(ijdefault, Ft_Rs1, "{1..13,16..20}");
258 IJ_set_ropr_fld(ijdefault, Ft_Rs2, "{1..13,16..20}");
259 IJ_set_ropr_fld(ijdefault, Ft_Rd, "{8..13,16..20}");
260 IJ_set_ropr_fld(ijdefault, Ft_Simm13, "13'brrrrrrrrrrrrr");
261 IJ_set_ropr_fld(ijdefault, Ft_Simm11, "11'brrrrrrrrrrr");
262 IJ_set_ropr_fld(ijdefault, Ft_Imm_Asi, "{0x4, 0xc, 0x10, 0x12,0x17,0x1e,0x20, 0x14, 0x16, 0x1c, 0x2a, 0x30, 0x36, 0x39, 0x80, 0x82, 0x83, 0x88, 0x8a, 0x8b,0xc9, 0xe2,0xea,0xf8}");
263 IJ_set_ropr_fld(ijdefault, Ft_A, "{0,1:2}");
264 IJ_set_ropr_fld(ijdefault, Ft_Fcn, "{24}");
265 IJ_set_ropr_fld(ijdefault, Ft_Disp22, "{1:6,2}");
266 IJ_set_ropr_fld(ijdefault, Ft_Disp19, "{1:6,2}");
267 IJ_set_ropr_fld(ijdefault, Ft_D16, "{1:6,2}");
268
269 // Load/Store pointer = r31
270 IJ_set_ropr_fld(Ro_ldst_ptr, Ft_Rs1, "{31}");
271 IJ_set_ropr_fld(Ro_ldst_ptr, Ft_Rs2, "{0}");
272 IJ_set_ropr_fld(Ro_ldst_ptr, Ft_Simm13, "{0x0}, 9'brrrrr0000");
273 IJ_set_ropr_fld(Ro_ldst_ptr, Ft_Imm_Asi, "{0x4, 0xc, 0x10, 0x12,0x17,0x1e,0x20, 0x14, 0x16, 0x1c, 0x2a, 0x30, 0x36, 0x39, 0x80, 0x82, 0x83, 0x88, 0x8a, 0x8b,0xc9, 0xe2,0xea,0xf8}");
274 IJ_set_ropr_fld(Ro_ldst_ptr, Ft_Fcn, "{24}");
275 IJ_set_ropr_fld(Ro_ldst_ptr, Ft_Disp22, "{1:6,2}");
276 IJ_set_ropr_fld(Ro_ldst_ptr, Ft_Disp19, "{1:6,2}");
277 IJ_set_ropr_fld(Ro_ldst_ptr, Ft_D16, "{1:6,2}");
278 IJ_set_rvar(Rv_memptr, "32'{0}, 16'b011000000rr10100, 16'{0}");
279
280 // ASI register values
281 IJ_set_ropr_fld(Ro_wrasi_i, Ft_Rs1, "{0}");
282 IJ_set_ropr_fld(Ro_wrasi_i, Ft_Simm13, "{0x4, 0x20, 0x10, 0x14, 0x16, 0x1c, 0x30, 0x36, 0x39, 0x4f, 0x58, 0x55, 0x80, 0x82, 0x83, 0x88, 0x89, 0x8a, 0x8b}");
283
284 // General Ldst ASIs to use .. 50% should be illegal ..
285 IJ_set_ropr_fld(Ro_nontrap_ldasi, Ft_Imm_Asi, "{0x12,0x17,0x1e,0x20, 0x14, 0x16, 0x1c, 0x2a, 0x30, 0x36, 0x39, 0x80, 0x82, 0x83, 0x88, 0x8a, 0x8b,0xc9, 0xe2,0xea,0xf8}");
286 IJ_set_ropr_fld(Ro_nontrap_ldasi, Ft_Rs1, "{31}");
287 IJ_set_ropr_fld(Ro_nontrap_ldasi, Ft_Rs2, "{0}");
288 IJ_set_ropr_fld(Ro_nontrap_ldasi, Ft_Simm13, "{0x0}, 9'brrrrrr000");
289
290 IJ_set_ropr_fld(Ro_nontrap_ldasi_z, Ft_Imm_Asi, "{0x45, 0x53..0x64}");
291 IJ_set_ropr_fld(Ro_nontrap_ldasi_z, Ft_Rs1, "{0}");
292 IJ_set_ropr_fld(Ro_nontrap_ldasi_z, Ft_Rs2, "{0}");
293 IJ_set_ropr_fld(Ro_nontrap_ldasi_z, Ft_Simm13, "{0x0}, 9'brrrrr0000");
294 IJ_set_ropr_fld(Ro_nontrap_ldasi_z, Ft_Fcn, "{24}");
295
296 // General Ldst alignment to use .. 50% should be illegal ..
297 IJ_set_ropr_fld(Ro_nontrap_ld, Fm_align_Simm13, "{0x0..0x6:5,0x7:1}");
298 IJ_set_ropr_fld(Ro_nontrap_ld, Ft_Rs1, "{31}");
299 IJ_set_ropr_fld(Ro_nontrap_ld, Ft_Rs2, "{0}");
300 IJ_set_ropr_fld(Ro_nontrap_ld, Ft_Simm13, "{0x0}, 9'brrrrrrrrr");
301 IJ_set_ropr_fld(Ro_nontrap_ld, Ft_Fcn, "{24}");
302
303 // Block ldst ..
304 IJ_set_ropr_fld(Ro_blksts, Ft_Imm_Asi, "{0x16,0x1f, 0xf0,0xf8, 0xf9,0xe0, 0xea, 0xe2, 0xf1, 0xd0, 0xd3, 0xda, 0xd9}");
305 IJ_set_ropr_fld(Ro_blksts, Ft_Rs1, "{31}");
306 IJ_set_ropr_fld(Ro_blksts, Ft_Rs2, "{0}");
307 IJ_set_ropr_fld(Ro_blksts, Ft_Rd, "{0,16,32,48}");
308 IJ_set_ropr_fld(Ro_blksts, Ft_Simm13, "{0x0}, 9'brrrr00000");
309 IJ_set_ropr_fld(Ro_blksts, Ft_Fcn, "{24}");
310 IJ_set_ropr_fld(Ro_blksts, Ft_Disp22, "{1:6,2}");
311 IJ_set_ropr_fld(Ro_blksts, Ft_Disp19, "{1:6,2}");
312 IJ_set_ropr_fld(Ro_blksts, Ft_D16, "{1:6,2}");
313
314 // Trap ASI operands
315 IJ_set_tlist (tl_asi,
316 /* asi (key), format, VAs */
317 0x25, "s", "{0x3c0,0x3c8,0x3d0,0x3d8,0x3e0,0x3e8,0x3f0,0x3f8}", NULL,
318 0x48, "s", "{0x8, 0x10}", NULL,
319 0x49, "s", "{0x8, 0x10}", NULL,
320 0x4a, "s", "{0x8, 0x110}", NULL,
321 0x4c, "s", "{0x0,0x8, 0x10, 0x18, 0x20, 0x28}", NULL,
322 0x50, "s", "{0x18, 0x38}", NULL,
323 0x58, "s", "{0x18, 0x20, 0x38}", NULL,
324 0x5a, "s", "{0x0, 0x8, 0x10, 0x20, 0x28, 0x30, 0x38}", NULL,
325 0x5b, "s", "{0x0, 0x8, 0x10, 0x20, 0x28, 0x30, 0x38}", NULL,
326 0x72, "s", "{0x0}", NULL,
327 0x73, "s", "{0x0}", NULL,
328 0x74, "s", "{0x0}", NULL,
329 -1);
330 //IJ_set_ropr_fld(Ro_traps_asi, Ft_Imm_Asi, "{0x25, 0x4c, 0x50, 0x58, 0x5a, 0x5b, 0x72..0x74}");
331 IJ_set_ropr_fld(Ro_traps_asi, Ft_Imm_Asi, "{0x25, 0x4c, 0x50, 0x5a, 0x5b, 0x72..0x74}");
332 IJ_set_ropr_fld(Ro_traps_asi, Ft_Rs1, "{1}");
333 IJ_set_ropr_fld(Ro_traps_asi, Ft_Rs2, "{0}");
334 // IJ_set_rvar(Rv_traps_asi, "{0x25, 0x4c, 0x50, 0x58, 0x5a, 0x5b, 0x72..0x74}");
335 IJ_set_rvar(Rv_traps_asi, "{0x25, 0x4c, 0x50, 0x5a, 0x5b, 0x72..0x74, 0x48,0x49,0x4a}");
336
337 // Trap #s to use
338 IJ_set_ropr_fld(Ro_traps_i, Ft_Sw_Trap, "{0x32..0x35, 0xb2..0xb5}");
339 IJ_set_ropr_fld(Ro_traps_i, Ft_Rs1, "{0}");
340 IJ_set_ropr_fld(Ro_traps_i, Ft_Cond_f2, "{0x8:3, 0x9, 0x1}");
341 IJ_set_ropr_fld(Ro_traps_r, Ft_Rs1, "{0}");
342 IJ_set_ropr_fld(Ro_traps_r, Ft_Rs2, "{30}");
343 IJ_set_ropr_fld(Ro_traps_r, Ft_Cond_f2, "{0x8:3, 0x9, 0x1}");
344 //IJ_set_ropr_fld(Ro_traps_r, Ft_Simm13, "{0x30..0x35, 0xb0..0xb5}");
345 IJ_set_ropr_fld(Ro_traps_r, Ft_Simm13, "{0x32..0x35, 0xb2..0xb5}");
346 IJ_set_rvar(Rv_init_trap, "{0x30..0x35, 0xb0..0xb5}");
347
348 // FPRS splash
349 IJ_set_ropr_fld(Ro_wrfprs, Ft_Rs1, "{0}");
350 IJ_set_ropr_fld(Ro_wrfprs, Ft_Simm13, "{0, 4}");
351
352 // Pstate splash
353 IJ_set_ropr_fld(Ro_wrpstate, Ft_Rs1, "{0}");
354 IJ_set_ropr_fld(Ro_wrpstate, Ft_Simm13, "1'{0,1:3}," //tct[12]
355 "8'brrrrrrrr,"
356 "1'{0:3,1}," //am[3]
357 "2'brr,"
358 "1'{0,1:3}"); //ie[0]
359 IJ_set_rvar(Rv_wrtstate, "32'h00rrrr00");
360
361 // Hpstate splash
362 IJ_set_ropr_fld(Ro_wrhpstate, Ft_Rs1, "{0}");
363 IJ_set_ropr_fld(Ro_wrhpstate, Ft_Simm13, "2'brr,"
364 "1'{0,1:3}," //ibe[10]
365 "4'brrrr,"
366#ijifndef NORED
367 "1'{0:25,1}," //red[5]
368#ijelse
369 "1'b0," //red[5]
370#ijendif
371 "2'brr,"
372 "1'{0,1:4}," //hpriv[2]
373 "1'br,"
374 "1'{0,1:3}"); //tlz[0]
375
376 IJ_set_ropr_fld(Ro_wrrhpstate, Ft_Rs1, "{0}");
377 IJ_set_ropr_fld(Ro_wrrhpstate, Ft_Simm13, "2'brr,"
378 "1'{0,1:3}," //ibe[10]
379 "4'brrrr,"
380#ijifndef NORED
381 "1'{0:30,1}," //red[5]
382#ijelse
383 "1'b0," //red[5]
384#ijendif
385 "2'brr,"
386 "1'{0,1:4}," //hpriv[2]
387 "1'br,"
388 "1'{0,1:3}"); //tlz[0]
389
390 IJ_set_ropr_fld(Ro_wrhp_nonhp, Ft_Rs1, "{0}");
391 IJ_set_ropr_fld(Ro_wrhp_nonhp, Ft_Simm13, "1'b0r,"
392 "1'{0,1}," //ibe[10]
393 "4'brrrr,"
394 "1'{0}," //red[5]
395 "2'brr,"
396 "1'b0," //hpriv[2]
397 "1'br,"
398 "1'{0,1}"); //tlz[0]
399 IJ_set_rvar(Rv_wrhp_nonhp, "2'b0r,"
400 "1'{0,1}," //ibe[10]
401 "4'brrrr,"
402 "1'b0," //red[5]
403 "2'brr,"
404 "1'{0}," //hpriv[2]
405 "1'br,"
406 "1'{0,1}"); //tlz[0]
407 IJ_set_rvar(Rv_wrp_nonp, "1'{0,1}," //tct[12]
408 "8'brrrrrrrr,"
409 "1'{0,1}," //am[3]
410 "1'b0," //priv[2]
411 "1'br,"
412 "1'{0,1}"); //ie[0]
413 // TT splash
414 IJ_set_ropr_fld(Ro_wrtt, Ft_Rs1, "{0}");
415 IJ_set_ropr_fld(Ro_wrtt, Ft_Simm13, "10'brrrrrrrrrr");
416
417 // GL splash
418 IJ_set_ropr_fld(Ro_wrgl, Ft_Rs1, "{0}");
419#ijifndef LOWGL
420 IJ_set_ropr_fld(Ro_wrgl, Ft_Simm13, "4'brrrr");
421#ijelse
422 IJ_set_ropr_fld(Ro_wrgl, Ft_Simm13, "4'b0000");
423#ijendif
424
425 // TL splash
426 IJ_set_ropr_fld(Ro_tl, Ft_Simm13, "{0..1}");
427 IJ_set_ropr_fld(Ro_tl, Ft_Rs1, "{0}");
428 IJ_set_ropr_fld(Ro_tl5, Ft_Simm13, "{0..5}");
429 IJ_set_ropr_fld(Ro_tl5, Ft_Rs1, "{0}");
430
431 // CWP splash
432 IJ_set_ropr_fld(Ro_wrcwp, Ft_Rs1, "{0}");
433 IJ_set_ropr_fld(Ro_wrcwp, Ft_Simm13, "3'brrr");
434
435 IJ_set_ropr_fld(Ro_save_restore, Ft_Rs1, "{31}");
436 IJ_set_ropr_fld(Ro_save_restore, Ft_Rd, "{31}");
437 IJ_set_ropr_fld(Ro_save_restore, Ft_Rs2, "{0}");
438 IJ_set_ropr_fld(Ro_save_restore, Ft_Simm13, "{0..5}");
439
440 IJ_set_ropr_fld(Ro_winops, Ft_Rs1, "{0}");
441 IJ_set_ropr_fld(Ro_winops, Ft_Simm13, "{0..5}");
442
443 // {H}TBA Splash
444 IJ_set_ropr_fld(Ro_tba, Ft_Rs1, "{0}");
445 IJ_set_ropr_fld(Ro_tba, Ft_Rs2, "{12}");
446
447 // Dest reg is %g0
448 IJ_set_ropr_fld(Ro_rd0, Ft_Rd, "{0}");
449
450 // Splash cmprs
451 IJ_set_ropr_fld(Ro_cmpr, Ft_Rs1, "{0}");
452 IJ_set_ropr_fld(Ro_cmpr, Ft_Rs2, "{10}");
453 IJ_set_ropr_fld(Ro_cmpr, Ft_Rd, "{10}");
454 IJ_set_ropr_fld(Ro_cmpr, Ft_Simm13, "13'b1111rrr111111");
455
456 // Int Vector Setup
457 IJ_set_ropr_fld(Ro_intvec_asi, Ft_Imm_Asi , "{0x73}");
458 IJ_set_ropr_fld(Ro_intvec_asi, Ft_Rs1, "{0}");
459 IJ_set_ropr_fld(Ro_intvec_asi, Ft_Rs2, "{0}");
460 IJ_set_ropr_fld(Ro_intvec_asi, Ft_Rd, "{28}");
461 IJ_set_ropr_fld(Ro_intvec_asi, Ft_Simm13, "{0x73}");
462
463 // Mondo VAs
464 IJ_set_ropr_fld(Ro_q_va, Ft_Simm13, "{0x3c0:3, 0x3c8, 0x3d0:3, 0x3d8, 0x3e0:3, 0x3e8}");
465 IJ_set_ropr_fld(Ro_q_asi, Ft_Rs1, "{0x0}");
466 IJ_set_ropr_fld(Ro_q_asi, Ft_Simm13, "{0x25}");
467
468 // Debug
469 IJ_set_ropr_fld(Ro_debug, Ft_Rs1, "{0}");
470 /*
471 IJ_set_rvar(Rv_instmask, "25'{0},2'b10,"
472 "1'{0:2,1},"
473 "4'b0000,"
474 "2'{0,2,3},"
475 "8'brrrrrr11,22'hr");
476 */
477 IJ_set_rvar(Rv_instmask, "25'{0},39'hrrrrrrrrrr");
478 IJ_set_rvar(Rv_ivaw_lsucntl, "2'{1}," "8'{1..256}," "2'brr");
479 IJ_set_rvar(Rv_dvaw_lsucntl, "2'{2,3}," "8'{1..256}," "2'brr");
480 IJ_set_rvar(Rv_tt, "{0x11, 0x21, 0x102, 0x120, 0x211, 0x221, 0x320}");
481
482 // Cmp
483 IJ_set_rvar(Rv_cmp,"8'brrrrrrrr");
484 IJ_set_ropr_fld(Ro_cmp, Ft_Rs1, "{0}");
485
486 // PMU
487 IJ_set_ropr_fld(Ro_pmu, Ft_Rs1, "{0}");
488 IJ_set_ropr_fld(Ro_pmu, Ft_Rs2, "{7}");
489 IJ_set_rvar(Rv_pic_64,"64'hffffffbr_ffffffar");
490 IJ_set_rvar(Rv_pcr_32,"1'b0," // 0v1
491 "4'{2,3,4,5,0xb}," // SL1
492 "8'b0rrrrrrr," // Mask1
493 "1'b0," // Ov0
494 "4'{2,3,4,5,0xb}," // SL0
495 "8'b0rrrrrrr," // Mask0
496 "2'b11," // TOE
497 "4'brrrr");
498
499 // CWQ
500 IJ_set_rvar(Rv_cwq_32,"32'h206100r0");
501
502 // SMA
503 IJ_set_rvar(Rv_sma,"21'brrr100001111111111111");
504
505 // FPD
506 IJ_set_ropr_fld(Ro_fpd, Ft_Rs1, "{0}");
507 IJ_set_ropr_fld(Ro_fpd, Ft_Rs2, "{4}");
508 IJ_set_ropr_fld(Ro_fpd, Ft_Rd, "{4,6,8}");
509
510 // Jmptr
511 IJ_set_rvar(Rv_jmptr, "28'{0}, 20'b00001110000kk0100000, 16'{0}");
512 IJ_set_ropr_fld(Ro_jmptr, Ft_Rs1, "{27}");
513 IJ_set_ropr_fld(Ro_jmptr, Ft_Rs2, "{0}");
514 IJ_set_ropr_fld(Ro_jmptr, Ft_Rd, "{27}");
515
516 // Frzjmp
517 IJ_set_rvar(Rv_frzptr, "28'{0}, 23'b0000001111001011rr00000, 13'{0}");
518 IJ_set_ropr_fld(Ro_frzptr, Ft_Rs1, "{27}");
519 IJ_set_ropr_fld(Ro_frzptr, Ft_Rs2, "{0}");
520 IJ_set_ropr_fld(Ro_frzptr, Ft_Rd, "{27}");
521
522 // Loopz
523 IJ_set_rvar(Rv_loopz, "7'b0rrrr11");
524
525 // Weights
526 IJ_set_default_rule_wt_rvar ("{5}");
527 IJ_set_rvar(wt_high, "{9}");
528 IJ_set_rvar(wt_med, "{4}");
529 IJ_set_rvar(wt_low, "{1}");
530 IJ_set_rvar(wt_nul, "{0}");
531 IJ_set_rvar(wt_rnd, "{1,5,9}");
532
533 // User Tokens
534 IJ_define_user_token_group (uBR, tBRZ,tBRLEZ,tBRLZ,tBRNZ,tBRGZ,tBRGEZ,tFBPN,tFBPU,tFBPG,tFBPUG,tFBPL,tFBPUL,tFBPLG,tFBPNE,tFBPE,tFBPUE,tFBPGE,tFBPUGE,tFBPLE,tFBPULE,tFBPO,tBA,tBN,tBNE,tBE,tBG,tBLE,tBGE,tBL,tBGU,tBLEU,tBCC,tBCS,tBPOS,tBNEG,tBVC,tBVS) ;
535
536 IJ_define_user_token_group (uCMPR, tWR_STICK_CMPR_REG_R, tWR_TICK_CMPR_REG_R);
537 IJ_define_user_token_group (uCMPR1, tWR_STICK_CMPR_REG_R, tWR_TICK_CMPR_REG_R);
538#ij ifdef FC8
539 IJ_define_user_token_group (uSTATE, tILLTRAP, tWRHPR_HPSTATE_I, tWRPR_PSTATE_I);
540 IJ_define_user_token_group (uSTATE1, tILLTRAP, tWRHPR_HPSTATE_I, tWRPR_PSTATE_I);
541#ij else
542 IJ_define_user_token_group (uSTATE, tSIR, tWRHPR_HPSTATE_I, tWRPR_PSTATE_I);
543 IJ_define_user_token_group (uSTATE1, tSIR, tWRHPR_HPSTATE_I, tWRPR_PSTATE_I);
544#ij endif
545 IJ_define_user_token_group (uSTATE2, tWRHPR_HPSTATE_I, tWRPR_PSTATE_I, tBN);
546 IJ_define_user_token_group (uSTATE3, tWRHPR_HPSTATE_I, tWRPR_PSTATE_I);
547#ij ifdef FC8
548 IJ_define_user_token_group (uDIFF, tFDIVd, FMULq, FMULD8SUx16, tFBPUGE, tBRLEZ, tFCMPNE32, tFCMPd);
549 IJ_define_user_token_group (uDIFFC, tFDIVd, FMULq, FMULD8SUx16, tFCMPNE32, tFCMPd);
550 IJ_define_user_token_group (uDIFFD, tFDIVd, FMULq, tFBPUGE, tFCMPNE32);
551#ij else
552 IJ_define_user_token_group (uDIFF, tFDIVd, FMULq, FMULD8SUx16, tFBPUGE, tBRLEZ, tFCMPNE32, tFCMPd, tSIR);
553 IJ_define_user_token_group (uDIFFC, tFDIVd, FMULq, FMULD8SUx16, tFCMPNE32, tFCMPd, tSIR);
554 IJ_define_user_token_group (uDIFFD, tFDIVd, FMULq, tFBPUGE, tFCMPNE32, tSIR);
555#ij endif
556 IJ_define_user_token_group (uLONG, tFDIVd, FMULq, FMULD8SUx16, tFBPUGE, tBRLEZ, tFCMPNE32, tFCMPd, tCASA_I, tSTD_I, tPREFETCH_I);
557 IJ_define_user_token_group (uLONGH, tFDIVd, FMULq, FMULD8SUx16, tFBPUGE, tBRLEZ, tFCMPNE32, tFCMPd, tCASA_I, tSTD_I, tPREFETCH_I);
558 IJ_define_user_token_group (uDIFF1, tCASA_I, tSTD_I, tPREFETCH_I, tSTXFSR_R, tLDXFSR_R);
559 IJ_define_user_token_group (uFPD, tFDIVd, tFDIVs, tFCMPLE32, tFCMPd );
560 IJ_define_user_token_group (uFPD1, tFDIVd, tFDIVs, tFCMPLE32, tFCMPd);
561 IJ_define_user_token_group (uDBG1, tPDIST, tPOPC_I, tFDIVd, tFDIVs, tFCMPLE32, tFCMPd);
562 IJ_define_user_token_group (uBLK2, tSTDFA_R, tLDDFA_R, tBN);
563 IJ_define_user_token_group (uDBG4, tPDIST, tPOPC_I, tFDIVd, tFDIVs, tFCMPLE32, tFCMPd);
564 IJ_define_user_token_group (uBLK5, tSTDFA_R, tLDDFA_R, tSTDA_R, tLDDA_R);
565 IJ_define_user_token_group (uDBG6, tSTDA_R ,tSTD_I , tSTDF_I , tLDUHA_R , tLDXA_R, tCASA_I ,tLDDF_I, tLDDA_R, tSTXFSR_R, tLDD_I, tLDDF_I, tSTDA_R, tLDDA_R, tPREFETCHA_I);
566 IJ_define_user_token_group (uBLK8, tSTDFA_R, tSTDFA_R, tLDDFA_R, tSTDA_R, tLDDA_R);
567 IJ_define_user_token_group (uDBG9, tSTDA_R ,tSTD_I , tSTDF_I , tLDUHA_R , tLDXA_R, tCASA_I ,tCASA_R, tLDDF_I, tLDDA_R, tSTXFSR_R, tLDD_I, tSTDA_R, tLDDA_R);
568 IJ_define_user_token_group (uBLK11, tSTDFA_R, tSTDFA_R, tLDDFA_R, tLDDFA_R);
569 IJ_define_user_token_group (uDBG12, tSTDA_R ,tSTD_I , tSTDF_I , tLDUHA_R , tLDXA_R, tCASA_I, tCASA_R,tLDDF_I, tLDD_I, tSTXFSR_R, tLDDA_R, tSTDA_R, tLDDA_R, tPREFETCHA_I);
570 IJ_define_user_token_group (uSRW, tSAVE_R, tRESTORE_R, tWRPR_WSTATE_R);
571 IJ_define_user_token_group (uSRW1, tSAVE_R, tRESTORE_R, tWRPR_WSTATE_R);
572 IJ_define_user_token_group (uBLK14, tSTDFA_R, tLDDFA_R, tBN, tPDIST);
573 IJ_define_user_token_group (uDBG15, tSTDA_R ,tSTD_I , tSTDF_I , tLDUHA_R , tLDXA_R, tCASA_I ,tLDDF_I, tLDDA_R, tSTXFSR_I, tLDDA_R, tLDDF_I,tBN, tPDIST);
574 IJ_define_user_token_group (uDBG16, tSTDA_R ,tSTD_I , tSTDF_I , tLDUHA_R , tLDXA_R, tCASA_I ,tLDDF_I, tCASA_R, tLDDA_R, tSTXFSR_I, tLDD_I, tPDIST);
575#ij ifdef FC8
576 IJ_define_user_token_group (uDBG3, tSTD_I , tSTDF_I , tLDUHA_R , tLDXA_R, tCASA_I ,tLDDF_I, tLDDA_R, tSTXFSR_I, tLDD_I, tPREFETCHA_I);
577 IJ_define_user_token_group (uDBG7, tPDIST, tPOPC_I, tFDIVd, tFDIVs, tFCMPLE32, tFCMPd);
578 IJ_define_user_token_group (uDBG10, tPDIST, tPOPC_I, tFDIVd, tFDIVs, tFCMPLE32, tFCMPd);
579 IJ_define_user_token_group (uDBG13, tPDIST, tPOPC_I, tFDIVd, tFDIVs, tFCMPLE32, tFCMPd, tBN);
580 IJ_define_user_token_group (uDBG17, tFABSq, tSTDA_R ,tSTD_I , tSTDF_I , tLDUHA_R , tLDXA_R, tCASA_I ,tLDDF_I, tLDDA_R, tSTXFSR_I, tLDD_I);
581#ij else
582 IJ_define_user_token_group (uDBG3, tSIR, tSTD_I , tSTDF_I , tLDUHA_R , tLDXA_R, tCASA_I ,tLDDF_I, tLDDA_R, tSTXFSR_I, tLDD_I, tPREFETCHA_I);
583 IJ_define_user_token_group (uDBG7, tSIR, tPDIST, tPOPC_I, tFDIVd, tFDIVs, tFCMPLE32, tFCMPd);
584 IJ_define_user_token_group (uDBG10, tSIR, tPDIST, tPOPC_I, tFDIVd, tFDIVs, tFCMPLE32, tFCMPd);
585 IJ_define_user_token_group (uDBG13, tPDIST, tPOPC_I, tFDIVd, tFDIVs, tFCMPLE32, tFCMPd, tSIR, tBN);
586 IJ_define_user_token_group (uDBG17, tFABSq, tSIR, tSTDA_R ,tSTD_I , tSTDF_I , tLDUHA_R , tLDXA_R, tCASA_I ,tLDDF_I, tLDDA_R, tSTXFSR_I, tLDD_I);
587#ij endif
588 IJ_define_user_token_group(uASI_LD_R, tLDSBA_R, tLDSHA_R, tLDSWA_R, tLDUBA_R, tLDUHA_R, tLDXA_R);
589 IJ_define_user_token_group(uASI_LD_I, tLDSBA_R, tLDSHA_R, tLDSWA_R, tLDUBA_R, tLDUHA_R, tLDXA_R, tLDD_I);
590 IJ_define_user_token_group(uASI_LDX_I, tLDXA_R, tPDIST);
591 IJ_define_user_token_group(uASI_LDX_R, tLDXA_R);
592 IJ_define_user_token_group(uLDD_I, tLDD_I);
593 IJ_define_user_token_group(uFRZ, tBN, tBN, tBN, tSTDFA_R, tLDDFA_R, tBN);
594 IJ_define_user_token_group(uCR, tBN, tBN, tBN, tSTDFA_R, tLDDFA_R, tBN);
595 IJ_define_user_token_group(uLOOPB, tSTDFA_R, tLDDFA_R );
596 IJ_define_user_token_group(uLOOPZ, tLDDF_I, tCASA_R, tLDD_R, tSTXFSR_I, tLDD_I );
597
598 // Skip
599 IJ_copy_ropr (Ro_skip, ijdefault);
600 IJ_set_ropr_fld (Ro_skip, Ft_P, "1'br");
601 IJ_set_ropr_fld (Ro_skip, Ft_A, "1'br");
602 IJ_set_ropr_fld (Ro_skip, Ft_D16, "{0x1,0x2, 0x5}");
603 IJ_set_ropr_fld (Ro_skip, Ft_Disp22, "{0x1, 0x2, 0x5}");
604 IJ_set_ropr_fld (Ro_skip, Ft_Disp19, "{0x1, 0x2, 0x5}");
605 IJ_set_ropr_fld (Ro_skip, Ft_Disp30, "{0x1, 0x2, 0x5}");
606 IJ_set_ropr_fld (Ro_skip, Ft_Label_Prefix, "skip_%y");
607 IJ_set_rvar(Rv_align,"{128,512,1024,2048:2,4096}");
608 IJ_set_rvar(Rv_align1,"{128,512,1024,2048:2}");
609
610 IJ_set_ropr_fld (Ro_dummy, Ft_Label_Prefix, "%y");
611
612 IJ_set_rvar(Rv_broffset,"{0,4}");
613
614 // Sync Counter usage :
615 // Sync counters 4-6 available in groups of 8
616 // sync_thr_counter4 used for ANY CMP syncing.
617 // Master thread must never be parked
618 // sync_thr_counter5 used for CWQ syncing
619 // sync_thr_counter6 used for SMA syncing
620 //
621// !SIMS+ARGS: -vcs_run_args=+random_ccx_gnt
622
623%asm<th_all>{
624#ij ifdef MT
625!# Diag generated in Multi Threaded mode ..
626!# Embedded args follow:
627!SIMS+ARGS: -vcs_run_args=+inval_rate=100
628!SIMS+ARGS: -vcs_run_args=+noredwdrkill
629!SIMS+ARGS: -vcs_run_args=+err_sync_on
630!SIMS+ARGS: -vcs_run_args=+max_ccx_gnt_delay=0
631%}
632/*
633if (IJ_random()&0x1) {
634 IJ_printf (th_all, "!SIMS+ARGS: -vcs_run_args=+fast_boot\n");
635}
636*/
637if (IJ_random()&0x1) {
638 IJ_printf (th_all, "!SIMS+ARGS: -vcs_run_args=+l2miss_type=2\n");
639}
640/*
641switch (IJ_random()&0xf) {
642 case 2: IJ_printf (th_all, "!SIMS+ARGS: -vcs_run_args=+pwr_throttle=cycle\n");
643 IJ_printf (th_all, "!SIMS+ARGS: -vcs_run_args=+pwr_throttle_freq=300\n");break;
644 case 3: IJ_printf (th_all, "!SIMS+ARGS: -vcs_run_args=+pwr_throttle=pulse\n");
645 IJ_printf (th_all, "!SIMS+ARGS: -vcs_run_args=+pwr_throttle_freq=300\n");break;
646}
647*/
648if (!(IJ_random()%3)) {
649 IJ_printf (th_all, "!SIMS+ARGS: -midas_args=-DCACHE_ASSOCIATE_MASK=%01d\n",IJ_random()&0x3);
650}
651switch (IJ_random()&0x3) {
652 case 0:
653 IJ_printf (th_all, "!SIMS+ARGS: -midas_args=-DTSB_SEARCH_BURST\n"); break;
654 case 1:
655 IJ_printf (th_all, "!SIMS+ARGS: -midas_args=-DTSB_SEARCH_PREDICTION\n"); break;
656}
657IJ_printf (th_all, "!#\n!# Master Thread Mask = %x\n", tmast);
658IJ_printf (th_all, "!# Group Masters TG1 Mask = %x, (%x, %x)\n", tgrand1, tgmh1, tgml1);
659IJ_printf (th_all, "!# Group Masters TG2 Mask = %x, (%x, %x)\n", tgrand2, tgmh2, tgml2);
660IJ_printf (th_all, "!# Random sets: th_all=0x%x, th_rand=0x%x, th_rand2=0x%x, th_rand3=0x%x, th_rand2n=0x%x, th_rand3n=0x%x\n", thall, myrand, myrand2, myrand3, myrand2n, myrand3n);
661#ijifdef TH_STRESS
662IJ_printf (th_all, "!# Stress set: th_stress=0x%x\n", tst1);
663#ijendif
664#ijifdef TEMPLATE1
665IJ_printf (th_all, "!# Template 1 mask set : th_tt1=0x%x\n", tt1);
666#ijendif
667#ijifdef TEMPLATE2
668IJ_printf (th_all, "!# Template 2 mask set : th_tt2=0x%x\n", tt2);
669#ijendif
670IJ_printf (th_all, "!#\n\n");
671
672%asm<th_all>{
673
674#ij endif
675
676#ij ifdef NO_SPU
677#define NO_INTERNAL_SPU
678#ij endif
679
680#define IMMU_SKIP_IF_NO_TTE
681#define DMMU_SKIP_IF_NO_TTE
682#define MAIN_PAGE_NUCLEUS_ALSO
683#define MAIN_PAGE_HV_ALSO
684#define MAIN_PAGE_VA_IS_RA_ALSO
685#define DISABLE_PART_LIMIT_CHECK
686#define MAIN_PAGE_USE_CONFIG 3
687#define PART0_Z_TSB_SIZE_3 10
688#define PART0_Z_PAGE_SIZE_3 1
689#define PART0_NZ_TSB_SIZE_3 10
690#define PART0_NZ_PAGE_SIZE_3 1
691#define PART0_Z_TSB_SIZE_1 3
692#define PART0_NZ_TSB_SIZE_1 3
693#ij ifdef HIGH_VAS
694#define PART_0_BASE 0x0
695#define USER_PAGE_CUSTOM_MAP
696#define MAIN_BASE_TEXT_VA 0x333000000
697#define MAIN_BASE_TEXT_RA 0x033000000
698#define MAIN_BASE_DATA_VA 0x379400000
699#define MAIN_BASE_DATA_RA 0x079400000
700#define HIGHVA_HIGHNUM 0x3
701#ij else
702#define TRAP_SECT_HV_ALSO
703#ij endif
704
705#define NO_EOB_MARKER
706
707#undef INC_ERR_TRAPS
708
709#undef H_HT0_Instruction_Access_MMU_Error_0x71
710#define H_HT0_Instruction_Access_MMU_Error_0x71
711#define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \
712 mov 0x80, %l3;\
713 stxa %g0, [%l3]0x57;\
714 retry;
715#undef H_HT0_Instruction_access_error_0x0a
716#define H_HT0_Instruction_access_error_0x0a
717#define SUN_H_HT0_Instruction_access_error_0x0a retry
718#undef H_HT0_Internal_Processor_Error_0x29
719#define H_HT0_Internal_Processor_Error_0x29
720#define SUN_H_HT0_Internal_Processor_Error_0x29 retry
721#undef H_HT0_Data_Access_MMU_Error_0x72
722#define H_HT0_Data_Access_MMU_Error_0x72
723#define SUN_H_HT0_Data_Access_MMU_Error_0x72 \
724 mov 0x80, %l3;\
725 stxa %g0, [%l3]0x5f;\
726 retry;
727#undef H_HT0_Data_access_error_0x32
728#define H_HT0_Data_access_error_0x32
729#define SUN_H_HT0_Data_access_error_0x32 \
730 add %g0, 0x18, %i1;\
731 ldxa [%i1] 0x58, %i2;\
732 cmp %i2, 0x4;\
733 bne 1f;\
734 nop;\
735 done;\
736 1:retry
737#undef H_HT0_Hw_Corrected_Error_0x63
738#define H_HT0_Hw_Corrected_Error_0x63
739#define SUN_H_HT0_Hw_Corrected_Error_0x63 ldxa [%g0]ASI_DESR, %i1; retry
740#undef H_HT0_Sw_Recoverable_Error_0x40
741#define H_HT0_Sw_Recoverable_Error_0x40
742#define SUN_H_HT0_Sw_Recoverable_Error_0x40 ldxa [%g0]ASI_DESR, %i1; retry
743#undef H_HT0_Store_Error_0x07
744#define H_HT0_Store_Error_0x07
745#define SUN_H_HT0_Store_Error_0x07 retry
746
747#define DAE_SKIP_IF_SOCU_ERROR
748
749#ij include "tlu_custom_trap_handlers.s"
750#ij include "tlu_custom_intr_handlers.s"
751
752!# Steer towards main TBA on these errors ..
753!# These are redefines ...
754#undef My_RED_Mode_Other_Reset
755#define My_RED_Mode_Other_Reset
756#define My_RED_Mode_Other_Reset \
757 mov ZRED_Mode_Other_Reset ,%r1;\
758 jmp %g1; nop;retry;nop;nop;nop;nop
759/*
760#undef SUN_H_HT0_DAE_nc_page_0x16
761#define SUN_H_HT0_DAE_nc_page_0x16 \
762 best_set_reg(0x120000, %r1, %r2);\
763 wrpr %r0, %r2, %tba; \
764 done;nop
765
766#undef SUN_H_HT0_DAE_nfo_page_0x17
767#define SUN_H_HT0_DAE_nfo_page_0x17 \
768 best_set_reg(0x120000, %r1, %r2);\
769 wrpr %r0, %r2, %tba; \
770 done;nop
771*/
772#undef SUN_H_HT0_IAE_unauth_access_0x0b
773#define SUN_H_HT0_IAE_unauth_access_0x0b \
774 set resolve_bad_tte, %g3;\
775 jmp %g3;\
776 nop
777
778#undef My_HT0_IAE_privilege_violation_0x08
779#define My_HT0_IAE_privilege_violation_0x08 \
780 set resolve_bad_tte, %g3;\
781 jmp %g3;\
782 nop
783
784#define H_HT0_Instruction_address_range_0x0d
785#define SUN_H_HT0_Instruction_address_range_0x0d \
786 rdpr %tpc, %g1;\
787 rdpr %tnpc, %g2;\
788 stw %g1, [%i7];\
789 stw %g2, [%i7+4];\
790 jmpl %r27+8, %r27;\
791 fdivd %f0, %f4, %f4;\
792 nop;
793
794#define H_HT0_Instruction_real_range_0x0e
795#define SUN_H_HT0_Instruction_real_range_0x0e \
796 rdpr %tpc, %g1;\
797 rdpr %tnpc, %g2;\
798 stw %g1, [%i7];\
799 stw %g2, [%i7+4];\
800 jmpl %r27+8, %r27;\
801 fdivd %f0, %f4, %f4;\
802 nop;
803
804#undef SUN_H_HT0_IAE_nfo_page_0x0c
805#define SUN_H_HT0_IAE_nfo_page_0x0c \
806 set resolve_bad_tte, %g3;\
807 jmp %g3;\
808 nop
809
810#define H_HT0_Instruction_Invalid_TSB_Entry_0x2a
811#define SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a \
812 set restore_range_regs, %g3;\
813 jmp %g3;\
814 nop
815
816#define H_HT0_Data_Invalid_TSB_Entry_0x2b
817#define SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b \
818 set restore_range_regs, %g3;\
819 jmp %g3;\
820 nop
821
822#define H_T1_Reserved_0x00
823#define SUN_H_T1_Reserved_0x00 \
824 nop;\
825 jmpl %r27+8, %r0;\
826 nop;
827
828#undef FAST_BOOT
829#include "hboot.s"
830
831#ifndef MULTIPASS
832#define MULTIPASS 0
833#endif
834
835#ij ifdef HIGH_VAS
836#define LOMEIN_TEXT_VA [0x]mpeval(MAIN_BASE_TEXT_VA&0xffffffff,16)
837#define LOMEIN_DATA_VA [0x]mpeval(MAIN_BASE_DATA_VA&0xffffffff,16)
838changequote([, ])dnl
839SECTION .LOMEIN TEXT_VA=LOMEIN_TEXT_VA, DATA_VA=LOMEIN_DATA_VA
840attr_text {
841 Name = .LOMEIN,
842 VA= LOMEIN_TEXT_VA,
843 RA= MAIN_BASE_TEXT_RA,
844 PA= ra2pa2(MAIN_BASE_TEXT_RA, 0),
845 part_0_ctx_nonzero_tsb_config_1,
846 part_0_ctx_zero_tsb_config_1,
847 TTE_G=1, TTE_Context=0x44, TTE_V=1,
848 TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
849 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1,
850 tsbonly
851 }
852attr_data {
853 Name = .LOMEIN,
854 VA= LOMEIN_DATA_VA,
855 RA= MAIN_BASE_DATA_RA,
856 PA= ra2pa2(MAIN_BASE_DATA_RA, 0),
857 part_0_ctx_nonzero_tsb_config_2,
858 part_0_ctx_zero_tsb_config_2
859 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
860 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
861 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
862 tsbonly
863 }
864attr_data {
865 Name = .LOMEIN,
866 VA= LOMEIN_DATA_VA,
867 RA= MAIN_BASE_DATA_RA,
868 PA= ra2pa2(MAIN_BASE_DATA_RA, 0),
869 part_0_ctx_nonzero_tsb_config_3,
870 part_0_ctx_zero_tsb_config_3
871 TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0,
872 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
873 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
874 tsbonly
875 }
876.text
877.align 0x100000
878 nop
879.data
880 .word 0x0
881
882SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA
883attr_text {
884 Name = .MAIN,
885 VA=MAIN_BASE_TEXT_VA,
886 RA= LOMEIN_TEXT_VA,
887 PA= LOMEIN_TEXT_VA,
888 part_0_ctx_nonzero_tsb_config_2,
889 part_0_ctx_zero_tsb_config_2,
890 TTE_G=1, TTE_Context=0x44, TTE_V=1,
891 TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
892 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1,
893 }
894
895attr_data {
896 Name = .MAIN,
897 VA=MAIN_BASE_DATA_VA
898 RA= LOMEIN_DATA_VA,
899 PA= LOMEIN_DATA_VA,
900 part_0_ctx_nonzero_tsb_config_1,
901 part_0_ctx_zero_tsb_config_1
902 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
903 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
904 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
905 }
906
907attr_data {
908 Name = .MAIN,
909 VA=MAIN_BASE_DATA_VA
910 RA= LOMEIN_DATA_VA,
911 PA= LOMEIN_DATA_VA,
912 part_0_ctx_nonzero_tsb_config_3,
913 part_0_ctx_zero_tsb_config_3
914 TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0,
915 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
916 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0,
917 tsbonly
918 }
919
920attr_text {
921 Name = .MAIN,
922 VA=MAIN_BASE_TEXT_VA,
923 hypervisor
924}
925
926attr_data {
927 Name = .MAIN,
928 VA=MAIN_BASE_DATA_VA
929 hypervisor
930}
931changequote(`,')dnl'
932#ij endif
933.text
934.global main
935main:
936
937 ! Set up ld/st area per thread
938 ta T_CHANGE_HPRIV
939 ldxa [%g0]0x63, %o2
940 and %o2, 0x7, %o1
941 brnz %o1, init_start
942 mov 0xff, %r11
943lock_sync_thds:
944 set sync_thr_counter4, %r23
945#if(!defined SPC && !defined PORTABLE_CORE)
946 and %o2, 0x38, %o2
947 add %o2,%r23,%r23 !Core's sync counter
948#endif
949 st %r11, [%r23] !lock sync_thr_counter4
950 add %r23, 64, %r23
951 st %r11, [%r23] !lock sync_thr_counter5
952 add %r23, 64, %r23
953 st %r11, [%r23] !lock sync_thr_counter6
954init_start:
955 wrhpr %g0, 0x0, %hpstate ! ta T_CHANGE_NONHPRIV
956 umul %r9, 256, %r31
957 setx user_data_start, %r1, %r3
958 add %r31, %r3, %r31
959 wr %r0, 0x4, %asi
960
961%}
962 // Initialize registers ..
963 int i, j, k;
964 IJ_printf (th_all,"!Initializing integer registers\n");
965 for (k=0; k<7; k++) {
966 for (i = 0; i < 30; i++) {
967 if (i==15) {
968 IJ_printf (th_all,"\tmov %%r31, %%r15\n");
969 continue;
970 }
971 j=i*8;
972 IJ_printf (th_all,"\tldx [%%r31+%d], %%r%d\n", j,i);
973 }
974 IJ_printf (th_all,"\tmov 0x%rx, %%r14\n", Rv_init_trap);
975 IJ_printf (th_all,"\tmov 0x%rx, %%r30\n", Rv_init_trap);
976 IJ_printf (th_all,"\tsave %%r31, %%r0, %%r31\n");
977 }
978 for (k=0; k<3; k++) {
979 IJ_printf (th_all,"\trestore\n");
980 }
981
982 IJ_printf (th_all,"!Initializing float registers\n");
983 for (i = 0; i < 31; i=i+2) {
984 j=i*8;
985 IJ_printf (th_all,"\tldd [%%r31+%d], %%f%d\n", j,i);
986 }
987
988%asm<th_all>{
989 !! Set TPC/TNPC to diag-finish in case we get to a strange TL ..
990 ta T_CHANGE_HPRIV
991 setx diag_finish, %r29, %r28
992 add %r28, 4, %r29
993%}
994 for (k=1; k<7; k++) {
995%asm<th_all>{
996 wrpr %g0, $k, %tl
997 wrpr %r28, %tpc
998 wrpr %r29, %tnpc
999%}
1000 }
1001%asm<th_all>{
1002 wrpr %g0, 0, %tl
1003%}
1004
1005
1006%asm<th_all>{
1007
1008 !Initializing Tick Cmprs
1009 mov 1, %g2
1010 sllx %g2, 63, %g2
1011 or %g1, %g2, %g1
1012 wrhpr %g1, %g0, %hsys_tick_cmpr
1013 wr %g1, %g0, %tick_cmpr
1014 wr %g1, %g0, %sys_tick_cmpr
1015
1016#if (MULTIPASS > 0)
1017 mov 0x38, %g1
1018 stxa %r0, [%g1]ASI_SCRATCHPAD
1019#endif
1020
1021 ! Set up fpr PMU traps
1022 set @Rv_pcr_32, %g2
1023 b fork_threads
1024 wr %g2, %g0, %pcr
1025%}
1026 IJ_printf(th_all, ".align %d\n", IJ_get_rvar_val32(Rv_align));
1027%asm<th_all>{
1028common_target:
1029 nop
1030 sub %r27, 8, %r27
1031 and %r27, 8, %r12
1032 mov HIGHVA_HIGHNUM, %r11
1033 sllx %r11, 32, %r11
1034 or %r27, %r11, %r27
1035 brz,a %r12, .+8
1036 lduw [%r27], %r12 ! load jmp dest into dcache - xinval
1037 return %r27
1038%}
1039 if (IJ_random()&0x1) {
1040 IJ_generate_from_token(1, th_all, ijdefault, uDIFFC, uSTATE);
1041 } else {
1042 IJ_generate_from_token(1, th_all, Ro_nontrap_ld, uDIFF1);
1043 }
1044 IJ_printf(th_all,"\tnop\n\tjmp %%r27\n");
1045 IJ_printf(th_all,"\tnop\n");
1046 IJ_printf(th_all,"!$EV trig_pc_d(1,@VA(.MAIN.fork_threads)) -> marker(bootEnd, *, 1)\n");
1047 IJ_printf(th_all, "fork_threads:\n");
1048 IJ_printf(th_all, "\trd %%tick, %%r17\n");
1049 IJ_printf(th_all, "\tmov 0x40, %%g1\n");
1050 IJ_printf(th_all, "setup_hwtw_config:\n");
1051 IJ_printf(th_all, "\tstxa %%r17, [%%g1]0x58\n");
1052#ij ifdef MT
1053 IJ_th_fork_group(th_realall);
1054#ij endif
1055%asm<th_mast>{
1056master_thread_stuff:
1057
1058setup_tick:
1059 setx @Rv_rand_64, %r1, %r17
1060 wrpr %g0, %r17, %tick
1061
1062 rd %asi, %r12
1063#ifdef XIR_RND_CORES
1064setup_xir_@{"%y"}:
1065 setx @Rv_rand_64, %r1, %r28
1066 mov 0x30, %r17
1067 stxa %r28, [%r17] 0x41
1068#endif
1069#ifdef SPLASH_HIDECR
1070 mov 8, %r1
1071 set SPLASH_HIDECR, %r2
1072 sllx %r2, 32, %r2
1073 stxa %r2, [%r1] 0x45
1074#endif
1075#if (MULTIPASS > 0)
1076 mov 0x38, %g1
1077 ldxa [%g1]ASI_SCRATCHPAD, %r10
1078 brnz %g1, unlock_sync_thds_@{"%y"}
1079 wrpr %g0, %g0, %pstate
1080#endif
1081#ifndef NO_INTERNAL_SPU
1082setup_spu_@{"%y"}:
1083 wr %g0, 0x40, %asi
1084 !# allocate control word queue (e.g., setup head/tail/first/last registers)
1085 set CWQ_BASE, %l6
1086
1087#ifndef SPC
1088 ldxa [%g0]0x63, %o2
1089 and %o2, 0x38, %o2
1090#ifndef PORTABLE_CORE
1091 sllx %o2, 5, %o2 !(CID*256)
1092 add %l6, %o2, %l6
1093#endif
1094#endif
1095
1096
1097 !# write base addr to first, head, and tail ptr
1098 !# first store to first
1099 stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi !# first store to first
1100
1101 stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi !# then to head
1102 stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# then to tail
1103 setx CWQ_LAST, %g1, %l5 !# then end of CWQ region to LAST
1104#ifndef SPC
1105 add %l5, %o2, %l5
1106#endif
1107 stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi
1108
1109 !# set CWQ control word ([39:37] is strand ID ..)
1110 best_set_reg(@Rv_cwq_32, %l1, %l2) !# Control Word
1111 sllx %l2, 32, %l2
1112
1113 !# write CWQ entry (%l6 points to CWQ)
1114 stx %l2, [%l6 + 0x0]
1115
1116 setx msg, %g1, %l2
1117 stx %l2, [%l6 + 0x8] !# source address
1118
1119 stx %g0, [%l6 + 0x10] !# Authentication Key Address (40-bit)
1120 stx %g0, [%l6 + 0x18] !# Authentication IV Address (40-bit)
1121 stx %g0, [%l6 + 0x20] !# Authentication FSAS Address (40-bit)
1122 stx %g0, [%l6 + 0x28] !# Encryption Key Address (40-bit)
1123 stx %g0, [%l6 + 0x30] !# Encryption Initialization Vector Address (40-bit)
1124
1125 setx results, %g1, %o3
1126 stx %o3, [%l6 + 0x38] !# Destination Address (40-bit)
1127
1128 membar #Sync
1129
1130 ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2
1131 add %l2, 0x40, %l2
1132 stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi
1133
1134 !# Kick off the CWQ operation by writing to the CWQ_CSR
1135 !# Set the enabled bit and reset the other bits
1136 or %g0, 0x1, %g1
1137 stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi
1138#endif
1139unlock_sync_thds_@{"%y"}:
1140 set sync_thr_counter6, %r23
1141#if (!defined SPC && ! defined PORTABLE_CORE)
1142 ldxa [%g0]0x63, %o2
1143 and %o2, 0x38, %o2
1144 add %o2, %r23, %r23
1145#endif
1146 st %r0, [%r23] !unlock sync_thr_counter6
1147 sub %r23, 64, %r23
1148 st %r0, [%r23] !unlock sync_thr_counter5
1149 sub %r23, 64, %r23
1150 st %r0, [%r23] !unlock sync_thr_counter4
1151
1152 wr %r0, %r12, %asi
1153%}
1154%asm<th_all>{
1155 wrhpr %g0, @Rv_wrhp_nonhp, %hpstate ! ta T_CHANGE_NONHPRIV
1156%}
1157
1158
1159%%
1160
1161// }}}
1162
1163// %%section finish {{{
1164%%section finish
1165
1166#ij ifndef NO_CMP
1167%asm<th_mast> {
1168#ijelse
1169%asm<th_none> {
1170#ijendif
1171cmpenall_@{"%y"}_$label:
1172 nop
1173 nop
1174 ta T_CHANGE_HPRIV
1175 rd %asi, %r12
1176 wr %r0, 0x41, %asi
1177 set sync_thr_counter4, %r23
1178#ifndef SPC
1179 ldxa [%g0]0x63, %r8
1180 and %r8, 0x38, %r8 ! Core ID
1181#ifndef PORTABLE_CORE
1182 add %r8, %r23, %r23
1183#endif
1184 mov 0xff, %r9
1185 sllx %r9, %r8, %r9 ! My core mask
1186#else
1187 mov 0xff, %r9 ! My core mask
1188#endif
1189cmpenall_startwait@{"%y"}_$label:
1190 mov 0x@{"%y"}, %r10
1191 cas [%r23],%g0,%r10 !lock
1192 brz,a %r10, continue_cmpenall_@{"%y"}_$label
1193 nop
1194cmpenall_wait@{"%y"}_$label:
1195 ld [%r23], %r10
1196 brnz %r10, cmpenall_wait@{"%y"}_$label
1197 nop
1198 ba,a cmpenall_startwait@{"%y"}_$label
1199continue_cmpenall_@{"%y"}_$label:
1200 ldxa [0x58]%asi, %r14 !Running_status
1201wait_for_cmpstat_@{"%y"}_$label:
1202 ldxa [0x50]%asi, %r13 !Running_rw
1203 cmp %r13, %r14
1204 bne,a %xcc, wait_for_cmpstat_@{"%y"}_$label
1205 ldxa [0x58]%asi, %r14 !Running_status
1206 ldxa [0x10]%asi, %r14 !Get enabled threads
1207 and %r14, %r9, %r14 !My core mask
1208 stxa %r14, [0x60]%asi !W1S
1209 ldxa [0x58]%asi, %r16 !Running_status
1210wait_for_cmpstat2_@{"%y"}_$label:
1211 and %r16, %r9, %r16 !My core mask
1212 cmp %r14, %r16
1213 bne,a %xcc, wait_for_cmpstat2_@{"%y"}_$label
1214 ldxa [0x58]%asi, %r16 !Running_status
1215 st %g0, [%r23] !clear lock
1216#if (MULTIPASS > 0)
1217multipass_check_mt:
1218 rd %asi, %r12
1219 wr %g0, ASI_SCRATCHPAD, %asi
1220 ldxa [0x38]%asi, %r10
1221 cmp %r10, MULTIPASS
1222 inc %r10
1223 stxa %r10, [0x38]%asi
1224 be finish_diag
1225 wr %g0, %r12, %asi
1226lock_sync_thds_again:
1227 mov 0xff, %r10
1228 set sync_thr_counter4, %r23
1229#ifndef SPC
1230 add %r23,%r8,%r23 !Core's sync counter
1231#endif
1232 st %r10, [%r23] !lock sync_thr_counter4
1233 add %r23, 64, %r23
1234 st %r10, [%r23] !lock sync_thr_counter5
1235 add %r23, 64, %r23
1236 st %r10, [%r23] !lock sync_thr_counter6
1237 ba fork_threads
1238 wrpr %g0, %g0, %gl
1239#endif
1240%}
1241 IJ_printf(th_realall, "\tnop\n\tnop\n");
1242 IJ_printf(th_realall, "\tta T_CHANGE_PRIV\n");
1243 IJ_printf(th_realall, "\twrpr %%g0, %%g0, %%gl\n");
1244 IJ_printf(th_realall, "\tnop\n\tnop\n");
1245 IJ_th_join_group(th_realall);
1246%asm<th_all> {
1247SECTION .MAIN
1248.text
1249diag_finish:
1250 nop
1251 nop
1252 nop
1253 ta T_CHANGE_HPRIV
1254#if (MULTIPASS > 0)
1255multipass_check:
1256 rd %asi, %r12
1257 wr %g0, ASI_SCRATCHPAD, %asi
1258 ldxa [0x38]%asi, %r10
1259 cmp %r10, MULTIPASS
1260 inc %r10
1261 stxa %r10, [0x38]%asi
1262 wr %g0, %r12, %asi
1263 bne fork_threads
1264 wrpr %g0, %g0, %gl
1265#endif
1266finish_diag:
1267 best_set_reg(HV_TRAP_BASE_PA, %r1, %r2)
1268 wrhpr %g2, %g0, %htba
1269 ta T_GOOD_TRAP
1270 nop
1271 nop
1272 nop
1273.data
1274 .xword 0x0
1275 ! fp data rs1, rs2, fsr, gsr quads ..
1276.global fp_data_quads
1277fp_data_quads:
1278 .xword 0x0044000000000000
1279 .xword 0x4028000000000000
1280 .xword 0x0fc0400400000000
1281 .xword 0x0000000000000000
1282 .xword 0x0041000000000000
1283 .xword 0x4022000000000000
1284 .xword 0x0600800000000000
1285 .xword 0x0000000000000000
1286 .xword 0x0220000000000000
1287 .xword 0x4140000000000000
1288 .xword 0x4fc0400400000000
1289 .xword 0x0000000000000000
1290 .xword 0x4090000000000000
1291 .xword 0x0090000000000000
1292 .xword 0x0f80400800000000
1293 .xword 0x0a00000000000000
1294.align 128
1295.global user_data_start
1296.data
1297user_data_start:
1298
1299%}
1300 int i,j;
1301 for (i = 0; i < 256; i++) {
1302 IJ_printf (th_all,"\t.xword\t0x%016llrx\n", Rv_rand_64);
1303 }
1304
1305%asm<th_all>{
1306
1307SECTION .HTRAPS
1308.text
1309.global restore_range_regs
1310restore_range_regs:
1311 wr %g0, ASI_MMU_REAL_RANGE, %asi
1312 mov 1, %g1
1313 sllx %g1, 63, %g1
1314 ldxa [ASI_MMU_REAL_RANGE_0] %asi, %g2
1315 or %g2 ,%g1, %g2
1316 stxa %g2, [ASI_MMU_REAL_RANGE_0] %asi
1317 ldxa [ASI_MMU_REAL_RANGE_1] %asi, %g2
1318 or %g2 ,%g1, %g2
1319 stxa %g2, [ASI_MMU_REAL_RANGE_1] %asi
1320 ldxa [ASI_MMU_REAL_RANGE_2] %asi, %g2
1321 or %g2 ,%g1, %g2
1322 stxa %g2, [ASI_MMU_REAL_RANGE_2] %asi
1323 ldxa [ASI_MMU_REAL_RANGE_3] %asi, %g2
1324 or %g2 ,%g1, %g2
1325 stxa %g2, [ASI_MMU_REAL_RANGE_3] %asi
1326 retry
1327
1328.global wdog_2_ext
1329#ij include "tlu_custom_trap_extensions.s"
1330
1331%}
1332
1333 for (i = 0; i < 4; i++) {
1334 IJ_iseg_printf (MyHTRAPS, i, th_all,".text\n");
1335 IJ_iseg_printf (MyHTRAPS, i, th_all, "#include \"htraps.s\"\n");
1336 IJ_iseg_printf (MyHTRAPS, i, th_all,"#include \"tlu_htraps_ext.s\"\n");
1337 IJ_iseg_printf (MyTRAPS, i, th_all,"#include \"traps.s\"\n");
1338 IJ_iseg_printf (MyTEXT, i, th_all,".text\n");
1339 IJ_iseg_printf (MyTEXT, i, th_all,"nuff_said_%d:\n",i);
1340 IJ_iseg_generate_from_token (2, MyTEXT, i, th_all, Ro_blksts, uFPD,uBLK5);
1341 IJ_iseg_printf (MyTEXT, i, th_all,"\tmov HIGHVA_HIGHNUM, %%r11\n");
1342 IJ_iseg_printf (MyTEXT, i, th_all,"\tsllx %%r11, 32, %%r11\n");
1343 IJ_iseg_printf (MyTEXT, i, th_all,"\tor %%r27, %%r11, %%r27\n");
1344 IJ_iseg_printf (MyTEXT, i, th_all,"\tjmpl %%r27+8, %%r0\n");
1345 IJ_iseg_printf (MyTEXT, i, th_all,"\tjmpl %%r27+8, %%r0\n");
1346 IJ_iseg_printf (MyTEXT, i, th_all,"\tjmpl %%r27+8, %%r0\n");
1347 IJ_iseg_printf (MyTEXT, i, th_all,"\tjmpl %%r27+8, %%r0\n");
1348 IJ_iseg_generate_from_token (2, MyTEXT, i, th_all, Ro_blksts, uFPD,uBLK5);
1349 IJ_iseg_printf (MyDATA, i, th_all,".data\n");
1350 for (j = 0; j < 32; j++) {
1351 IJ_iseg_printf (MyDATA, i, th_all,"\t.xword\t0x%016llrx\n", Rv_rand_64);
1352 }
1353 }
1354 IJ_iseg_printf (VaHOLE, 0, th_all, ".text\n.global vahole_target0\n");
1355 IJ_iseg_printf (VaHOLE, 0, th_all, ".text\n.global vahole_target1\n");
1356 IJ_iseg_printf (VaHOLE, 0, th_all, ".text\n.global vahole_target2\n");
1357 IJ_iseg_printf (VaHOLE, 0, th_all, ".text\n.global vahole_target3\n");
1358 IJ_iseg_printf (VaHOLE, 0, th_all, "\tnop\n.align 4096\n\tnop\n.align 2048\n");
1359 IJ_iseg_printf (VaHOLE, 0, th_all, "\tnop\n.align 1024\n\tnop\n.align 512\n");
1360 IJ_iseg_printf (VaHOLE, 0, th_all, "\tnop\n.align 256\n\tnop\n.align 128\n");
1361 IJ_iseg_printf (VaHOLE, 0, th_all, "\tnop\n.align 64\n\tnop\n");
1362 IJ_iseg_printf (VaHOLE, 0, th_all, "\tnop\n.align 16\n\tnop;nop;nop\n");
1363 IJ_iseg_printf (VaHOLE, 0, th_all, "vahole_target0: nop;nop\n");
1364 IJ_iseg_printf (VaHOLE, 0, th_all, "vahole_target1: nop\n");
1365 IJ_iseg_printf (VaHOLE, 0, th_all, "vahole_target2: nop;nop;nop\n");
1366 IJ_iseg_printf (VaHOLE, 0, th_all, "vahole_target3: nop;nop;nop\n");
1367 IJ_iseg_printf (VaHOLEL, 0, th_all, ".text\n\tnop\n");
1368 IJ_iseg_printf (VaHOLE_PA, 0, th_all, "\tnop\n.align 4096\n\tnop\n.align 2048\n");
1369 IJ_iseg_printf (VaHOLE_PA, 0, th_all, "\tnop\n.align 1024\n\tnop\n.align 512\n");
1370 IJ_iseg_printf (VaHOLE_PA, 0, th_all, "\tnop\n.align 256\n\tnop\n.align 128\n");
1371 IJ_iseg_printf (VaHOLE_PA, 0, th_all, "\tnop\n.align 64\n\tnop\n");
1372 IJ_iseg_printf (VaHOLE_PA, 0, th_all, "\tnop\n.align 16\n\tnop;nop;nop\n");
1373 IJ_iseg_printf (VaHOLE_PA, 0, th_all, "\tnop\n\tnop\n\tjmpl %%r27+8, %%r0\n\tnop\n");
1374 IJ_iseg_printf (VaHOLE_PA, 0, th_all, "\tnop\n\tnop\n\tjmpl %%r27+8, %%r0\n\tnop\n");
1375 IJ_iseg_printf (MASKEDHOLE, 0, th_all,"\tmov HIGHVA_HIGHNUM, %%r11\n");
1376 IJ_iseg_printf (MASKEDHOLE, 0, th_all,"\tsllx %%r11, 32, %%r11\n");
1377 IJ_iseg_printf (MASKEDHOLE, 0, th_all,"\tor %%r27, %%r11, %%r27\n");
1378 IJ_iseg_printf (MASKEDHOLE, 0, th_all, "\treturn %%r27+8\n\tnop\n");
1379 for (i = 0; i < 4; i++) {
1380 IJ_iseg_printf (MyFRZn, i, th_all, "\tnop\n\tnop\n");
1381 IJ_iseg_printf (MyFRZn, i, th_all, "\treturn %%r27+8\n");
1382 IJ_iseg_generate_from_token (1, MyFRZn, i, th_all, Ro_blksts, uDBG1, uBLK5, uDBG3);
1383 IJ_iseg_printf (MyFRZ, i, th_all, "
1384.text
1385.global last_in_frz_1_%d
1386
1387 nop
1388.align 4096
1389 nop
1390.align 2048
1391 nop
1392.align 1024
1393 nop
1394.align 512
1395 nop
1396.align 256
1397 nop
1398.align 128
1399 nop
1400.align 64
1401 nop
1402.align 16
1403 nop; nop; ;nop; nop; nop; nop; nop; nop; nop; nop; nop
1404last_in_frz_1_%d:
1405 ",i,i);
1406 IJ_iseg_generate_from_token (1, MyFRZ, i, th_all, Ro_blksts, uFPD, uBR, uDBG1, uBLK5, uDBG3);
1407 }
1408 IJ_iseg_printf (ZERO, 0, th_all, "
1409.text
1410 nop
1411 mov HIGHVA_HIGHNUM, %%r11
1412 sllx %%r11, 32, %%r11
1413 or %%r27, %%r11, %%r27
1414 jmpl %%r27+8, %%r0
1415 nop
1416 jmpl %%r27+8, %%r0
1417 nop
1418
1419Power_On_Reset:
1420 setx HRedmode_Reset_Handler, %%g1, %%g2
1421 jmp %%g2
1422 nop
1423.align 32
1424
1425Watchdog_Reset:
1426 setx wdog_red_ext, %%g1, %%g2
1427 jmp %%g2
1428 nop
1429.align 32
1430
1431External_Reset:
1432 My_External_Reset
1433
1434.align 32
1435
1436Software_Initiated_Reset:
1437 setx Software_Reset_Handler, %%g1, %%g2
1438 jmp %%g2
1439 nop
1440
1441.align 32
1442
1443.global ZRED_Mode_Other_Reset
1444ZRED_Mode_Other_Reset:
1445 ! IF TL=6, shift stack by one ..
1446 rdpr %%tl, %%l1
1447 cmp %%l1, 6
1448 be start_tsa_shift
1449 nop
1450
1451continue_red_other:
1452 mov 0x1f, %%l1
1453 stxa %%l1, [%%g0] ASI_LSU_CTL_REG
1454
1455 rdpr %%tt, %%l1
1456
1457 rdhpr %%htstate, %%l2
1458 and %%l2, 0x4, %%l2 ! If previously in hpriv mode, go to hpriv
1459 brnz,a %%l2, red_goto_handler
1460 rdhpr %%htba, %%l2
1461 srlx %%l1, 7, %%l2 ! Send priv sw traps to priv mode ..
1462 cmp %%l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap ..
1463 be,a red_goto_handler
1464 rdpr %%tba, %%l2
1465 rdhpr %%htba, %%l2
1466red_goto_handler:
1467
1468 sllx %%l1, 5, %%l1
1469 add %%l1, %%l2, %%l2
1470 rdhpr %%htstate, %%l1
1471 andn %%l1, 0x20, %%l1
1472 wrhpr %%g0, %%l1, %%htstate
1473 rdhpr %%hpstate, %%l1
1474 jmp %%l2
1475 wrhpr %%l1, 0x20, %%hpstate
1476 nop
1477
1478wdog_red_ext:
1479 ! Shift stack down by 1 ...
1480 rdpr %%tl, %%l1
1481 cmp %%l1, 6
1482 bl wdog_end
1483start_tsa_shift:
1484 mov 0x2, %%l2
1485
1486tsa_shift:
1487 wrpr %%l2, %%tl
1488 rdpr %%tt, %%l3
1489 rdpr %%tpc, %%l4
1490 rdpr %%tnpc, %%l5
1491 rdpr %%tstate, %%l6
1492 rdhpr %%htstate, %%l7
1493 dec %%l2
1494 wrpr %%l2, %%tl
1495 wrpr %%l3, %%tt
1496 wrpr %%l4, %%tpc
1497 wrpr %%l5, %%tnpc
1498 wrpr %%l6, %%tstate
1499 wrhpr %%l7, %%htstate
1500 add %%l2, 2, %%l2
1501 cmp %%l2, %%l1
1502 ble tsa_shift
1503 nop
1504tsa_shift_done:
1505 dec %%l1
1506 wrpr %%l1, %%tl
1507
1508wdog_end:
1509 ! If TT != 2, then goto trap handler
1510 rdpr %%tt, %%l1
1511
1512 cmp %%l1, 0x2
1513 bne continue_red_other
1514 nop
1515 ! else done
1516 mov 0x1f, %%l1
1517 stxa %%l1, [%%g0] ASI_LSU_CTL_REG
1518 done
1519");
1520
1521#ijifndef NO_SPU
1522%asm<th_all>{
1523
1524SECTION .CWQ_DATA DATA_VA =0x4000
1525attr_data {
1526 Name = .CWQ_DATA
1527 hypervisor
1528}
1529
1530.data
1531.align 16
1532.global msg
1533msg:
1534.xword 0xad32fa52374cc6ba
1535.xword 0x4cbf52280549003a
1536
1537.align 16
1538.global results
1539results:
1540.xword 0xDEADBEEFDEADBEEF
1541.xword 0xDEADBEEFDEADBEEF
1542!# CWQ data area
1543!# CWQ_BASE for core N is CWQ_BASE+(N*256)
1544!# CWQ_LAST for core N is CWQ_LAST+(N*256)
1545.align 64
1546.global CWQ_BASE
1547CWQ_BASE:
1548.xword 0xAAAAAAAAAAAAAAA
1549.xword 0xAAAAAAAAAAAAAAA
1550.xword 0xAAAAAAAAAAAAAAA
1551.xword 0xAAAAAAAAAAAAAAA
1552.xword 0xAAAAAAAAAAAAAAA
1553.xword 0xAAAAAAAAAAAAAAA
1554.xword 0xAAAAAAAAAAAAAAA
1555.xword 0xAAAAAAAAAAAAAAA
1556.xword 0xAAAAAAAAAAAAAAA
1557.xword 0xAAAAAAAAAAAAAAA
1558.xword 0xAAAAAAAAAAAAAAA
1559.xword 0xAAAAAAAAAAAAAAA
1560.xword 0xAAAAAAAAAAAAAAA
1561.xword 0xAAAAAAAAAAAAAAA
1562.xword 0xAAAAAAAAAAAAAAA
1563.xword 0xAAAAAAAAAAAAAAA
1564.xword 0xAAAAAAAAAAAAAAA
1565.xword 0xAAAAAAAAAAAAAAA
1566.xword 0xAAAAAAAAAAAAAAA
1567.xword 0xAAAAAAAAAAAAAAA
1568.xword 0xAAAAAAAAAAAAAAA
1569.xword 0xAAAAAAAAAAAAAAA
1570.xword 0xAAAAAAAAAAAAAAA
1571.xword 0xAAAAAAAAAAAAAAA
1572.global CWQ_LAST
1573.align 64
1574CWQ_LAST:
1575.word 0x0
1576.align 64
1577cwq_base1:
1578.xword 0xAAAAAAAAAAAAAAA
1579.xword 0xAAAAAAAAAAAAAAA
1580.xword 0xAAAAAAAAAAAAAAA
1581.xword 0xAAAAAAAAAAAAAAA
1582.xword 0xAAAAAAAAAAAAAAA
1583.xword 0xAAAAAAAAAAAAAAA
1584.xword 0xAAAAAAAAAAAAAAA
1585.xword 0xAAAAAAAAAAAAAAA
1586.xword 0xAAAAAAAAAAAAAAA
1587.xword 0xAAAAAAAAAAAAAAA
1588.xword 0xAAAAAAAAAAAAAAA
1589.xword 0xAAAAAAAAAAAAAAA
1590.xword 0xAAAAAAAAAAAAAAA
1591.xword 0xAAAAAAAAAAAAAAA
1592.xword 0xAAAAAAAAAAAAAAA
1593.xword 0xAAAAAAAAAAAAAAA
1594.xword 0xAAAAAAAAAAAAAAA
1595.xword 0xAAAAAAAAAAAAAAA
1596.xword 0xAAAAAAAAAAAAAAA
1597.xword 0xAAAAAAAAAAAAAAA
1598.xword 0xAAAAAAAAAAAAAAA
1599.xword 0xAAAAAAAAAAAAAAA
1600.xword 0xAAAAAAAAAAAAAAA
1601.xword 0xAAAAAAAAAAAAAAA
1602.align 64
1603cwq_last1:
1604.word 0x0
1605.align 64
1606.xword 0xAAAAAAAAAAAAAAA
1607.xword 0xAAAAAAAAAAAAAAA
1608.xword 0xAAAAAAAAAAAAAAA
1609.xword 0xAAAAAAAAAAAAAAA
1610.xword 0xAAAAAAAAAAAAAAA
1611.xword 0xAAAAAAAAAAAAAAA
1612.xword 0xAAAAAAAAAAAAAAA
1613.xword 0xAAAAAAAAAAAAAAA
1614.xword 0xAAAAAAAAAAAAAAA
1615.xword 0xAAAAAAAAAAAAAAA
1616.xword 0xAAAAAAAAAAAAAAA
1617.xword 0xAAAAAAAAAAAAAAA
1618.xword 0xAAAAAAAAAAAAAAA
1619.xword 0xAAAAAAAAAAAAAAA
1620.xword 0xAAAAAAAAAAAAAAA
1621.xword 0xAAAAAAAAAAAAAAA
1622.xword 0xAAAAAAAAAAAAAAA
1623.xword 0xAAAAAAAAAAAAAAA
1624.xword 0xAAAAAAAAAAAAAAA
1625.xword 0xAAAAAAAAAAAAAAA
1626.xword 0xAAAAAAAAAAAAAAA
1627.xword 0xAAAAAAAAAAAAAAA
1628.xword 0xAAAAAAAAAAAAAAA
1629.xword 0xAAAAAAAAAAAAAAA
1630.align 64
1631.word 0x0
1632.align 64
1633.xword 0xAAAAAAAAAAAAAAA
1634.xword 0xAAAAAAAAAAAAAAA
1635.xword 0xAAAAAAAAAAAAAAA
1636.xword 0xAAAAAAAAAAAAAAA
1637.xword 0xAAAAAAAAAAAAAAA
1638.xword 0xAAAAAAAAAAAAAAA
1639.xword 0xAAAAAAAAAAAAAAA
1640.xword 0xAAAAAAAAAAAAAAA
1641.xword 0xAAAAAAAAAAAAAAA
1642.xword 0xAAAAAAAAAAAAAAA
1643.xword 0xAAAAAAAAAAAAAAA
1644.xword 0xAAAAAAAAAAAAAAA
1645.xword 0xAAAAAAAAAAAAAAA
1646.xword 0xAAAAAAAAAAAAAAA
1647.xword 0xAAAAAAAAAAAAAAA
1648.xword 0xAAAAAAAAAAAAAAA
1649.xword 0xAAAAAAAAAAAAAAA
1650.xword 0xAAAAAAAAAAAAAAA
1651.xword 0xAAAAAAAAAAAAAAA
1652.xword 0xAAAAAAAAAAAAAAA
1653.xword 0xAAAAAAAAAAAAAAA
1654.xword 0xAAAAAAAAAAAAAAA
1655.xword 0xAAAAAAAAAAAAAAA
1656.xword 0xAAAAAAAAAAAAAAA
1657.align 64
1658.word 0x0
1659.align 64
1660.xword 0xAAAAAAAAAAAAAAA
1661.xword 0xAAAAAAAAAAAAAAA
1662.xword 0xAAAAAAAAAAAAAAA
1663.xword 0xAAAAAAAAAAAAAAA
1664.xword 0xAAAAAAAAAAAAAAA
1665.xword 0xAAAAAAAAAAAAAAA
1666.xword 0xAAAAAAAAAAAAAAA
1667.xword 0xAAAAAAAAAAAAAAA
1668.xword 0xAAAAAAAAAAAAAAA
1669.xword 0xAAAAAAAAAAAAAAA
1670.xword 0xAAAAAAAAAAAAAAA
1671.xword 0xAAAAAAAAAAAAAAA
1672.xword 0xAAAAAAAAAAAAAAA
1673.xword 0xAAAAAAAAAAAAAAA
1674.xword 0xAAAAAAAAAAAAAAA
1675.xword 0xAAAAAAAAAAAAAAA
1676.xword 0xAAAAAAAAAAAAAAA
1677.xword 0xAAAAAAAAAAAAAAA
1678.xword 0xAAAAAAAAAAAAAAA
1679.xword 0xAAAAAAAAAAAAAAA
1680.xword 0xAAAAAAAAAAAAAAA
1681.xword 0xAAAAAAAAAAAAAAA
1682.xword 0xAAAAAAAAAAAAAAA
1683.xword 0xAAAAAAAAAAAAAAA
1684.align 64
1685.word 0x0
1686.align 64
1687.xword 0xAAAAAAAAAAAAAAA
1688.xword 0xAAAAAAAAAAAAAAA
1689.xword 0xAAAAAAAAAAAAAAA
1690.xword 0xAAAAAAAAAAAAAAA
1691.xword 0xAAAAAAAAAAAAAAA
1692.xword 0xAAAAAAAAAAAAAAA
1693.xword 0xAAAAAAAAAAAAAAA
1694.xword 0xAAAAAAAAAAAAAAA
1695.xword 0xAAAAAAAAAAAAAAA
1696.xword 0xAAAAAAAAAAAAAAA
1697.xword 0xAAAAAAAAAAAAAAA
1698.xword 0xAAAAAAAAAAAAAAA
1699.xword 0xAAAAAAAAAAAAAAA
1700.xword 0xAAAAAAAAAAAAAAA
1701.xword 0xAAAAAAAAAAAAAAA
1702.xword 0xAAAAAAAAAAAAAAA
1703.xword 0xAAAAAAAAAAAAAAA
1704.xword 0xAAAAAAAAAAAAAAA
1705.xword 0xAAAAAAAAAAAAAAA
1706.xword 0xAAAAAAAAAAAAAAA
1707.xword 0xAAAAAAAAAAAAAAA
1708.xword 0xAAAAAAAAAAAAAAA
1709.xword 0xAAAAAAAAAAAAAAA
1710.xword 0xAAAAAAAAAAAAAAA
1711.align 64
1712.word 0x0
1713.align 64
1714.xword 0xAAAAAAAAAAAAAAA
1715.xword 0xAAAAAAAAAAAAAAA
1716.xword 0xAAAAAAAAAAAAAAA
1717.xword 0xAAAAAAAAAAAAAAA
1718.xword 0xAAAAAAAAAAAAAAA
1719.xword 0xAAAAAAAAAAAAAAA
1720.xword 0xAAAAAAAAAAAAAAA
1721.xword 0xAAAAAAAAAAAAAAA
1722.xword 0xAAAAAAAAAAAAAAA
1723.xword 0xAAAAAAAAAAAAAAA
1724.xword 0xAAAAAAAAAAAAAAA
1725.xword 0xAAAAAAAAAAAAAAA
1726.xword 0xAAAAAAAAAAAAAAA
1727.xword 0xAAAAAAAAAAAAAAA
1728.xword 0xAAAAAAAAAAAAAAA
1729.xword 0xAAAAAAAAAAAAAAA
1730.xword 0xAAAAAAAAAAAAAAA
1731.xword 0xAAAAAAAAAAAAAAA
1732.xword 0xAAAAAAAAAAAAAAA
1733.xword 0xAAAAAAAAAAAAAAA
1734.xword 0xAAAAAAAAAAAAAAA
1735.xword 0xAAAAAAAAAAAAAAA
1736.xword 0xAAAAAAAAAAAAAAA
1737.xword 0xAAAAAAAAAAAAAAA
1738.align 64
1739.word 0x0
1740.align 64
1741.xword 0xAAAAAAAAAAAAAAA
1742.xword 0xAAAAAAAAAAAAAAA
1743.xword 0xAAAAAAAAAAAAAAA
1744.xword 0xAAAAAAAAAAAAAAA
1745.xword 0xAAAAAAAAAAAAAAA
1746.xword 0xAAAAAAAAAAAAAAA
1747.xword 0xAAAAAAAAAAAAAAA
1748.xword 0xAAAAAAAAAAAAAAA
1749.xword 0xAAAAAAAAAAAAAAA
1750.xword 0xAAAAAAAAAAAAAAA
1751.xword 0xAAAAAAAAAAAAAAA
1752.xword 0xAAAAAAAAAAAAAAA
1753.xword 0xAAAAAAAAAAAAAAA
1754.xword 0xAAAAAAAAAAAAAAA
1755.xword 0xAAAAAAAAAAAAAAA
1756.xword 0xAAAAAAAAAAAAAAA
1757.xword 0xAAAAAAAAAAAAAAA
1758.xword 0xAAAAAAAAAAAAAAA
1759.xword 0xAAAAAAAAAAAAAAA
1760.xword 0xAAAAAAAAAAAAAAA
1761.xword 0xAAAAAAAAAAAAAAA
1762.xword 0xAAAAAAAAAAAAAAA
1763.xword 0xAAAAAAAAAAAAAAA
1764.xword 0xAAAAAAAAAAAAAAA
1765.align 64
1766.word 0x0
1767%}
1768#ijendif
1769
1770%%
1771
1772// }}}
1773
1774// %%section map {{{
1775%%section map
1776
1777
1778SECTION .MyHTRAPS TEXT_VA = "29'{0}, 2'b0l, 11'{0}, 6'b1010l0, 16'{0}",
1779 DATA_VA = "29'{0}, 2'b0l, 11'{0}, 6'b1011l0, 16'{0}",
1780attr_text {
1781 Name = .MyHTRAPS,
1782 RA = "29'{0}, 2'b0l, 11'{0}, 6'b1010l0, 16'{0}",
1783 part_0_ctx_zero_tsb_config_3,
1784 part_0_ctx_nonzero_tsb_config_3,
1785 TTE_G=1, TTE_Context=0, TTE_V=1, TTE_Size=PART0_Z_PAGE_SIZE_3,
1786 TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0,
1787 TTE_CP="1'br", TTE_CV="1'br",
1788 TTE_E="1'br", TTE_P=1, TTE_W=0, TTE_X=0
1789 }
1790attr_data {
1791 Name = .MyHTRAPS,
1792 RA = "29'{0}, 2'b0l, 11'{0}, 6'b1011l0, 16'{0}",
1793 part_0_ctx_zero_tsb_config_3,
1794 part_0_ctx_nonzero_tsb_config_3,
1795 TTE_G=1, TTE_Context=0, TTE_V=1, TTE_Size=PART0_Z_PAGE_SIZE_3,
1796 TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0,
1797 TTE_CP="1'br", TTE_CV="1'br",
1798 TTE_E=0, TTE_P=1, TTE_W=0
1799 }
1800#ij ifndef HIGH_VAS
1801attr_text {
1802 Name = .MyHTRAPS,
1803 hypervisor
1804 }
1805attr_data {
1806 Name = .MyHTRAPS,
1807 hypervisor
1808 }
1809#ij endif
1810 enumerate {
1811 TEXT_VA
1812 }
1813
1814SECTION .MyTRAPS TEXT_VA = "29'{0}, 2'bj0, 11'{0}, 6'b1110j0, 16'{0}",
1815 DATA_VA = "29'{0}, 2'bj0, 11'{0}, 6'b1111j0, 16'{0}",
1816attr_text {
1817 Name = .MyTRAPS,
1818 RA = "29'{0}, 2'bj0, 11'{0}, 6'b1110j0, 16'{0}",
1819 part_0_ctx_zero_tsb_config_3,
1820 part_0_ctx_nonzero_tsb_config_3,
1821 TTE_G=1, TTE_Context=0, TTE_V=1, TTE_Size=PART0_Z_PAGE_SIZE_3,
1822 TTE_NFO="1'br", TTE_IE="1'br", TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1823 TTE_L=0, TTE_CP="1'br", TTE_CV="1'br",
1824 TTE_E="1'br", TTE_P="1'br", TTE_W="1'br", TTE_X="1'br"
1825 }
1826attr_data {
1827 Name = .MyTRAPS,
1828 RA = "29'{0}, 2'bj0, 11'{0}, 6'b1111j0, 16'{0}",
1829 part_0_ctx_zero_tsb_config_3,
1830 part_0_ctx_nonzero_tsb_config_3,
1831 TTE_G=1, TTE_Context=0, TTE_V=1, TTE_Size=PART0_Z_PAGE_SIZE_3,
1832 TTE_NFO="1'br", TTE_IE="1'br", TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
1833 TTE_L=0, TTE_CP="1'br", TTE_CV="1'br", TTE_E=0, TTE_P=1, TTE_W="1'br"
1834 }
1835
1836#ij ifndef HIGH_VAS
1837attr_text {
1838 Name = .MyTRAPS,
1839 hypervisor
1840 }
1841attr_data {
1842 Name = .MyTRAPS,
1843 hypervisor
1844 }
1845#ij endif
1846 enumerate {
1847 TEXT_VA
1848 }
1849
1850SECTION .MyDATA TEXT_VA = "32'{0}, 16'b111000000kk10100, 16'{0}",
1851 DATA_VA = "32'{0}, 16'b011000000kk10100, 16'{0}",
1852attr_text {
1853 Name = .MyDATA,
1854 RA = "28'{0}, 16'b0001011100000kk1, 20'{0}",
1855 part_0_ctx_zero_tsb_config_0,
1856 part_0_ctx_nonzero_tsb_config_0,
1857 TTE_G=1, TTE_Context=PCONTEXT, TTE_V=1,
1858#ij ifndef NO_MHIT
1859 TTE_Size="{0,1,3,5}",
1860#ij else
1861 TTE_Size="0,
1862#ij endif
1863 TTE_NFO="1'br",
1864 TTE_IE="1'br",
1865 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP="1'br",
1866 TTE_CV="1'br",
1867 TTE_E="1'br", TTE_P="1'br", TTE_W="1'br"
1868 }
1869
1870attr_data {
1871 Name = .MyDATA,
1872 RA = "28'{0}, 16'b0001011100000kk1, 20'{0}",
1873 part_0_ctx_zero_tsb_config_1,
1874 part_0_ctx_nonzero_tsb_config_1,
1875 TTE_G=1, TTE_Context=PCONTEXT, TTE_V=1,
1876#ij ifndef NO_MHIT
1877 TTE_Size="{0,1,3,5}",
1878#ij else
1879 TTE_Size=0,
1880#ij endif
1881 TTE_NFO="1'br",
1882 TTE_IE="1'br",
1883 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP="1'br",
1884 TTE_CV="1'br",
1885 TTE_E="1'br", TTE_P="1'br", TTE_W="1'br"
1886 }
1887
1888attr_data {
1889 Name = .MyDATA,
1890 RA = "28'{0}, 16'b0001011100000kk1, 20'{0}",
1891 part_0_ctx_nonzero_tsb_config_2,
1892 TTE_G=1, TTE_Context=SCONTEXT, TTE_V=1,
1893#ij ifndef NO_MHIT
1894 TTE_Size="{0,1,3,5}",
1895#ij else
1896 TTE_Size=0,
1897#ij endif
1898 TTE_NFO="1'br",
1899 TTE_IE="1'br",
1900 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP="1'br",
1901 TTE_CV="1'br",
1902 TTE_E="1'br", TTE_P="1'br", TTE_W="1'br",
1903 tsbonly
1904 }
1905
1906attr_data {
1907 Name = .MyDATA,
1908 hypervisor
1909 }
1910
1911attr_text {
1912 Name = .MyDATA,
1913 hypervisor
1914 }
1915 enumerate {
1916 TEXT_VA
1917 }
1918
1919SECTION .MyTEXT TEXT_VA = "28'{0}, 20'b00001110000kk0100000, 16'{0}"
1920
1921attr_text {
1922 Name = .MyTEXT,
1923 RA = "32'{0}, 16'b1110000kk0100000, 16'{0}",
1924 part_0_ctx_zero_tsb_config_1,
1925 part_0_ctx_nonzero_tsb_config_1,
1926 TTE_G=1, TTE_Context=PCONTEXT, TTE_V=1,
1927#ij ifndef NO_MHIT
1928 TTE_Size="{0,1,3,5}",
1929#ij else
1930 TTE_Size=0,
1931#ij endif
1932 TTE_NFO=0,
1933 TTE_IE="1'br",
1934 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP="1'br",
1935 TTE_CV="1'br", TTE_EP="1'br",
1936 TTE_E="1'br", TTE_P="1'br", TTE_W="1'br"
1937 }
1938
1939 enumerate {
1940 TEXT_VA
1941 }
1942
1943
1944SECTION .VaHOLE TEXT_VA = "64'h00007fffffffe000"
1945
1946attr_text {
1947 Name = .VaHOLE,
1948 RA = "64'h00000000ffffe000",
1949 part_0_ctx_zero_tsb_config_1,
1950 part_0_ctx_nonzero_tsb_config_1,
1951 TTE_G=1, TTE_Context=PCONTEXT, TTE_V=1,
1952#ij ifndef NO_MHIT
1953 TTE_Size="{0,1,3,5}",
1954#ij else
1955 TTE_Size=0,
1956#ij endif
1957 TTE_NFO=0,
1958 TTE_IE="1'br",
1959 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP="1'br",
1960 TTE_CV="1'br",
1961 TTE_E="1'br", TTE_P=0, TTE_W="1'br",
1962 TTE_X=1
1963 }
1964
1965 enumerate {
1966 TEXT_VA
1967 }
1968
1969SECTION .VaHOLEL TEXT_VA = "64'h00000000ffffe000"
1970attr_text {
1971 Name = .VaHOLEL,
1972 RA = "64'h00000000ffffe000",
1973 part_0_ctx_zero_tsb_config_0,
1974 part_0_ctx_nonzero_tsb_config_0,
1975 TTE_G=1, TTE_Context=PCONTEXT, TTE_V=1,
1976#ij ifndef NO_MHIT
1977 TTE_Size="{0,1,3,5}",
1978#ij else
1979 TTE_Size=0,
1980#ij endif
1981 TTE_NFO=0,
1982 TTE_IE="1'br",
1983 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP="1'br",
1984 TTE_CV="1'br",
1985 TTE_E="1'br", TTE_P=0, TTE_W="1'br",
1986 TTE_X=1,
1987 tsbonly
1988 }
1989
1990 enumerate {
1991 TEXT_VA
1992 }
1993
1994SECTION .ZERO TEXT_VA = "64'h0000000000000000"
1995attr_text {
1996 Name = .ZERO,
1997 RA = "64'h0000000000000000",
1998 part_0_ctx_zero_tsb_config_1,
1999 part_0_ctx_nonzero_tsb_config_1,
2000 TTE_G=1, TTE_Context=0x44, TTE_V=1,
2001#ij ifndef NO_MHIT
2002 TTE_Size="{0,1,3,5}",
2003#ij else
2004 TTE_Size=0,
2005#ij endif
2006 TTE_NFO=0,
2007 TTE_IE="1'br",
2008 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP="1'br",
2009 TTE_CV="1'br",
2010 TTE_E="1'br", TTE_P=0, TTE_W=1,
2011 TTE_X=1
2012}
2013 enumerate {
2014 TEXT_VA
2015 }
2016
2017SECTION .VaHOLE_PA TEXT_VA = "64'h000000ffffffe000"
2018attr_text {
2019 Name = .VAHOLE_PA,
2020 hypervisor
2021}
2022 enumerate {
2023 TEXT_VA
2024 }
2025
2026SECTION .MASKEDHOLE TEXT_VA = "64'h0000000100000000"
2027attr_text {
2028 Name = .MASKEDHOLE,
2029 RA = "64'h0000000000000000",
2030 part_0_ctx_zero_tsb_config_3,
2031 part_0_ctx_nonzero_tsb_config_3,
2032 TTE_G = 1, TTE_Context = 0x44, TTE_V = 1, TTE_Size = 1,
2033 TTE_NFO = 0, TTE_IE = 1, TTE_Soft2 = 0, TTE_Diag = 0,
2034 TTE_Soft = 0, TTE_L = 0, TTE_CP = "1'br", TTE_CV = 0,
2035 TTE_E = 0, TTE_P = 0, TTE_W = 0, TTE_X = 1,
2036 tsbonly
2037}
2038
2039attr_text {
2040 Name = .MASKEDHOLE,
2041 hypervisor
2042}
2043enumerate {
2044 TEXT_VA
2045}
2046
2047SECTION .MyFRZ TEXT_VA = "28'{0}, 23'b0000001111001011kk00000, 13'{0}"
2048
2049attr_text {
2050 Name = .MyFRZ,
2051 RA = "28'{0}, 23'b0000001111001011kk00000, 13'{0}",
2052 part_0_ctx_zero_tsb_config_1,
2053 part_0_ctx_nonzero_tsb_config_1,
2054 TTE_G=1, TTE_Context=PCONTEXT, TTE_V=1,
2055 TTE_Size=0,
2056 TTE_NFO="1'br",
2057 TTE_IE="1'br",
2058 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP="1'br",
2059 TTE_CV="1'br", TTE_EP="1'br",
2060 TTE_E="1'br", TTE_P="1'br", TTE_W="1'br"
2061 }
2062
2063 enumerate {
2064 TEXT_VA
2065 }
2066
2067SECTION .MyFRZn TEXT_VA = "28'{0}, 23'b0000001111001011kk00001, 13'{0}"
2068
2069attr_text {
2070 Name = .MyFRZn,
2071 RA = "28'{0}, 23'b0000001111001011kk00001, 13'{0}",
2072 part_0_ctx_zero_tsb_config_2,
2073 part_0_ctx_nonzero_tsb_config_2,
2074 TTE_G=1, TTE_Context=PCONTEXT, TTE_V=1,
2075 TTE_Size=0,
2076 TTE_NFO=0,
2077 TTE_IE="1'br",
2078 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP="1'br",
2079 TTE_CV="1'br",TTE_EP=1,
2080 TTE_E="1'br", TTE_P=0, TTE_W="1'br"
2081 }
2082
2083 enumerate {
2084 TEXT_VA
2085 }
2086%%
2087
2088// }}}
2089
2090// %%section grammar {{{
2091%%section grammar
2092
2093#ijifdef TH_STRESS
2094block: inst | block inst stress2 stress stress2
2095 {
2096 IJ_generate (th_all, $2);
2097 IJ_generate (th_stress, $3);
2098 IJ_generate (th_stress, $4);
2099 IJ_generate (th_stress, $5);
2100 if (IJ_random()&0x1) {
2101 IJ_generate_va (th_stress, $3,$4);
2102 } else {
2103 IJ_generate_va (th_stress, $3,$5);
2104 }
2105 };
2106#ijelse
2107block: inst | block inst
2108 {
2109 IJ_generate (th_all, $2);
2110 };
2111#ijendif
2112
2113#ijifdef WT_FILE
2114#ijinclude WT_FILE
2115#ijelse
2116
2117inst: trap_asr %rvar wt_rnd
2118 | trap_asi %rvar wt_rnd
2119 | tcc %rvar wt_low
2120 | ldst_excp %rvar wt_rnd
2121 | ldstasi_excp %rvar wt_rnd
2122 | ldstasi_excp_z %rvar wt_rnd
2123 | change_mode %rvar wt_rnd
2124 | alu %rvar wt_rnd
2125 | branches %rvar wt_high
2126 | wrasi %rvar wt_rnd
2127 | splash_fprs %rvar wt_rnd
2128 | splash_pstate %rvar wt_rnd
2129 | splash_hpstate %rvar wt_rnd
2130 | splash_cwp %rvar wt_rnd
2131 | splash_gl %rvar wt_rnd
2132 | splash_tt %rvar wt_rnd
2133 | stores %rvar wt_high
2134 | sir %rvar wt_rnd
2135 | splash_cmpr %rvar wt_high
2136 | splash_tick %rvar wt_low
2137 | splash_tba %rvar wt_rnd
2138 | splash_htba %rvar wt_rnd
2139 | splash_lsucnt %rvar wt_med
2140 | splash_decr %rvar wt_low
2141 | demap %rvar wt_rnd
2142 | tagged %rvar wt_low
2143 | intvec %rvar wt_high
2144 | intveclr %rvar wt_high
2145 | xir %rvar wt_rnd
2146 | mondo %rvar wt_high
2147 | dvapa %rvar wt_high
2148#ijifndef NO_CMP
2149 | ibp %rvar wt_high
2150 | iaw %rvar wt_rnd
2151 | cmp %rvar wt_high
2152#ijendif
2153 | donret %rvar wt_high
2154 | pmu %rvar wt_rnd
2155#ijifndef NO_SPU
2156 | cwq %rvar wt_high
2157 | sma %rvar wt_high
2158#ijendif
2159 | memptr %rvar wt_high
2160 | pwr %rvar wt_rnd
2161 | skip %rvar wt_high
2162 | fpinit %rvar wt_rnd
2163 | jmptr %rvar wt_high
2164 | invtsb %rvar wt_rnd
2165 | tglhtw %rvar wt_low
2166 | unsuptte %rvar wt_rnd
2167 | blksts %rvar wt_high
2168 | vahole %rvar wt_high
2169 | brcommon %rvar wt_high
2170#ijifndef ERRINJ
2171 | cerer %rvar wt_nul
2172 | ceter %rvar wt_nul
2173#ijendif
2174 | ticken %rvar wt_nul
2175 | frzjmp %rvar wt_rnd
2176 | cancelint %rvar wt_high
2177;
2178
2179#ijifdef TH_STRESS
2180stress :
2181 uLONG %ropr Ro_ldst_ptr | uSRW %ropr Ro_save_restore | loopz |
2182 uBLK14 %ropr Ro_blksts | uDBG3 %ropr Ro_ldst_ptr | tLDF_I %ropr Ro_ldst_ptr
2183;
2184
2185stress2 :
2186 tPDIST | tLDD_I %ropr Ro_ldst_ptr | tFDIVd | tFDIVs | tEDGE16N | tFMULD8SUx16 | tFNOT2S
2187;
2188#ijendif
2189
2190#ijendif
2191
2192cancelint:tALLCLEAN
2193 {
2194%asm<th_all>{
2195cancelint_@{"%y"}_$label:
2196 rdhpr %halt, %r@ijdefault.Ft_Rd
2197%}
2198 label++
2199 }
2200;
2201loopz : uLOOPB %ropr Ro_blksts
2202 {
2203%asm<th_stress>{
2204 nop
2205 nop
2206 mov @Rv_loopz, %g1
2207loopb_@{"%y"}_$label:
2208 ldstub [%r31+@Ro_ldst_ptr.Ft_Simm13], %r2
2209 brnz,a %r1, loopb_@{"%y"}_$label
2210 dec %r1
2211%}
2212 label++
2213 }
2214 | uLOOPZ %ropr Ro_ldst_ptr
2215 {
2216%asm<th_stress>{
2217 nop
2218 nop
2219 mov @Rv_loopz, %g1
2220loopz_@{"%y"}_$label:
2221 ldstub [%r31+@Ro_ldst_ptr.Ft_Simm13], %r2
2222 brnz,a %r1, loopz_@{"%y"}_$label
2223 dec %r1
2224%}
2225 label++
2226 }
2227;
2228frzjmp: uFRZ %ropr Ro_blksts
2229 {
2230%asm<th_all>{
2231frzptr_@{"%y"}_$label:
2232 nop
2233 nop
2234 best_set_reg(@Rv_frzptr+0x1ffc, %r20, %r27)
2235%}
2236 if (IJ_random()&0x1) {
2237 IJ_printf(th_rand3n, "\tsethi %%hi(0x%rx), %%r21\n", Rv_frzptr);
2238 IJ_printf(th_rand3n, "\tstxa %%r27, [%%r21]0x57\n");
2239 }
2240 if (IJ_random()&0x1) {
2241 IJ_printf(th_all, "\tldx [%%r27+0xc], %%r20\n");
2242 }
2243 if (IJ_random()&0x1) {
2244 IJ_printf(th_all, "\tjmpl %%r27+4, %%r27\n");
2245 IJ_generate_from_token(1, th_all, Ro_ldst_ptr, uLONG, tLDSTUB_I, tSTXFSR_I, tPDIST, tPOPC_I, tFDIVd);
2246%asm<th_all>{
2247 best_set_reg(@Rv_frzptr+0x1ffc, %r20, %r27)
2248%}
2249 }
2250 IJ_printf(th_all, "\tjmpl %%r27, %%r27\n");
2251 label++;
2252 }
2253;
2254ticken: tEDGE16LN
2255 {
2256%asm<th_mast>{
2257ticken_@{"%y"}_$label:
2258 nop
2259 nop
2260 ta T_CHANGE_HPRIV
2261 rd %asi, %r12
2262 wr %r0, 0x41, %asi
2263 stxa %g0, [0x38]%asi
2264 best_set_reg(@Rv_rand_64, %r16, %r17)
2265 wrpr %g0, %r17, %tick
2266 mov 1, %r16
2267 stxa %r16, [0x38]%asi
2268 wr %g0, %r12, %asi
2269%}
2270 label++;
2271 }
2272;
2273splash_tick: tWRTICK_R %ropr Ro_cmpr
2274 {
2275%asm<th_mast>{
2276splash_tick_@{"%y"}_$label:
2277 nop
2278 nop
2279 ta T_CHANGE_HPRIV
2280 best_set_reg(@Rv_rand_64, %r16, %r17)
2281%}
2282 label++;
2283 }
2284;
2285
2286cerer: tMEMBAR
2287 {
2288%asm<th_mast>{
2289cerer_@{"%y"}_$label:
2290 nop
2291 nop
2292 ta T_CHANGE_HPRIV
2293 best_set_reg(@Rv_rand_64, %r26, %r27)
2294 sethi %hi(0x20008000), %r26 ! Set ITTM/DTTM
2295 sllx %r26, 32, %r26
2296 or %r26, %r27, %r27
2297 mov 0x10, %r26
2298 stxa %r27, [%r26]0x4c
2299%}
2300 if (IJ_random()&0x1) {
2301 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
2302 }
2303 label++;
2304 }
2305;
2306ceter: tRDTICK
2307 {
2308%asm<th_all>{
2309ceter_@{"%y"}_$label:
2310 nop
2311 nop
2312 ta T_CHANGE_HPRIV
2313 mov @Rv_ceter, %r17
2314 sllx %r17, 60, %r17
2315 mov 0x18, %r16
2316 stxa %r17, [%r16]0x4c
2317%}
2318 if (IJ_random()&0x1) {
2319 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
2320 }
2321 label++;
2322 }
2323;
2324
2325brcommon: uDBG13
2326 { // {{{
2327%asm<th_all>{
2328brcommon1_@{"%y"}_$label:
2329 nop
2330 nop
2331 setx common_target, %r12, %r27
2332 lduw [%r27-@Rv_broffset], %r12 ! Load common dest into dcache ..
2333 stuw %r12, [%r27-@Rv_broffset] ! Load common dest into dcache ..
2334 ba,a .+12
2335%}
2336 IJ_generate_from_token(1, th_all, Ro_ldst_ptr, tLDSTUB_I, tCASA_I, tCASA_R, tSTXFSR_I, tPDIST, tPOPC_I, tFDIVd);
2337%asm<th_all>{
2338 ba,a .+8
2339 jmpl %r27-@Rv_broffset, %r27
2340%}
2341 label++;
2342 } // }}}
2343 | uBLK14 %ropr Ro_blksts
2344 { // {{{
2345%asm<th_all>{
2346brcommon2_@{"%y"}_$label:
2347 nop
2348 nop
2349 setx common_target, %r12, %r27
2350 ba,a .+12
2351%}
2352 IJ_generate_from_token(1, th_A, Ro_ldst_ptr, tFDIVd, tFMULq, tFMULD8SUx16,tPREFETCH_I, tSIR,tFLUSH_R);
2353 IJ_generate_from_token(1, th_B, ijdefault, tFSQRTd, tLDQF_R, tFDIVd);
2354%asm<th_all>{
2355 ba,a .+8
2356 jmpl %r27-@Rv_broffset, %r27
2357%}
2358 label++;
2359 } // }}}
2360 | uDBG15 %ropr Ro_ldst_ptr
2361 { // {{{
2362%asm<th_all>{
2363brcommon3_@{"%y"}_$label:
2364 nop
2365 nop
2366 setx common_target, %r12, %r27
2367 lduw [%r27-@Rv_broffset], %r12 ! Load common dest into dcache ..
2368 stuw %r12, [%r27-@Rv_broffset] ! Load common dest into dcache ..
2369 ba,a .+12
2370%}
2371 IJ_generate_from_token(1, th_all, Ro_ldst_ptr, tSTQF_I, tSTQF_R, tCASA_I, tCASA_R, tLDSTUB_I);
2372%asm<th_all>{
2373 ba,a .+8
2374 jmpl %r27-@Rv_broffset, %r27
2375%}
2376 label++;
2377 } // }}}
2378 | uSTATE2 %ropr Ro_wrrhpstate
2379 { // {{{
2380%asm<th_all>{
2381brcommon3_@{"%y"}_$label:
2382 nop
2383 nop
2384 setx common_target, %r12, %r27
2385 lduw [%r27-@Rv_broffset], %r12 ! Load common dest into dcache ..
2386 stuw %r12, [%r27-@Rv_broffset] ! Load common dest into dcache ..
2387 ba,a .+12
2388%}
2389 IJ_generate_from_token(1, th_all, Ro_ldst_ptr, tSTQF_I, tSTQF_R, tCASA_I, tCASA_R, tLDSTUB_I);
2390%asm<th_all>{
2391 ba,a .+8
2392 jmpl %r27+0, %r27
2393%}
2394 label++;
2395 } // }}}
2396 | tFMOVGE
2397 { // {{{
2398%asm<th_all>{
2399brcommon3_@{"%y"}_$label:
2400 nop
2401 nop
2402 setx common_target, %r12, %r27
2403 lduw [%r27], %r12 ! Load common dest into dcache ..
2404 stuw %r12, [%r27] ! Load common dest into dcache ..
2405 ba,a .+12
2406%}
2407 IJ_generate_from_token(1, th_all, Ro_ldst_ptr, tSTQF_I, tSTQF_R, tCASA_I, tCASA_R, tLDSTUB_I);
2408%asm<th_all>{
2409 ba,a .+8
2410 jmpl %r27+0, %r27
2411 stxa %r@Rv_randreg, [%r0] ASI_LSU_CONTROL
2412%}
2413 label++;
2414 } // }}}
2415;
2416vahole : uDBG10
2417 { // {{{
2418%asm<th_rand2>{
2419vahole1_@{"%y"}_$label:
2420 nop
2421 nop
2422 ta T_CHANGE_NONHPRIV
2423%}
2424 IJ_printf(th_rand2, "\tsetx vahole_target%d, %%r18, %%r27\n",IJ_random()&3);
2425%asm<th_rand2>{
2426 jmpl %r27+0, %r27
2427%}
2428 label++
2429 } // }}}
2430 | uBLK11 %ropr Ro_blksts
2431 { // {{{
2432%asm<th_rand2>{
2433vahole2_@{"%y"}_$label:
2434 nop
2435 nop
2436 ta T_CHANGE_NONHPRIV
2437%}
2438 IJ_printf(th_rand2, "\tsetx vahole_target%d, %%r18, %%r27\n",IJ_random()&3);
2439%asm<th_rand2>{
2440 jmpl %r27+0, %r27
2441%}
2442 label++
2443 } // }}}
2444 | uDBG12 %ropr Ro_ldst_ptr
2445 { // {{{
2446%asm<th_rand2>{
2447vahole3_@{"%y"}_$label:
2448 nop
2449 nop
2450 ta T_CHANGE_NONHPRIV
2451%}
2452 IJ_printf(th_rand2, "\tsetx vahole_target%d, %%r18, %%r27\n",IJ_random()&3);
2453%asm<th_rand2>{
2454 jmpl %r27+0, %r27
2455%}
2456 label++
2457 } // }}}
2458 | uSTATE1 %ropr Ro_wrrhpstate
2459 { // {{{
2460%asm<th_rand2>{
2461vahole4_@{"%y"}_$label:
2462 nop
2463 nop
2464 ta T_CHANGE_NONHPRIV
2465%}
2466 IJ_printf(th_rand2, "\tsetx vahole_target%d, %%r18, %%r27\n",IJ_random()&3);
2467%asm<th_rand2>{
2468 jmpl %r27+0, %r27
2469%}
2470 label++
2471 } // }}}
2472 | tBMASK
2473 { // {{{
2474%asm<th_rand2>{
2475vahole5_@{"%y"}_$label:
2476 nop
2477 nop
2478%}
2479 IJ_printf(th_rand2, "\tsetx vahole_target%d, %%r18, %%r27\n",IJ_random()&3);
2480%asm<th_rand2>{
2481 jmpl %r27+0, %r27
2482%}
2483 switch (IJ_random()&0x3) {
2484 case 0: IJ_printf(th_rand2, "\tta T_CHANGE_NONHPRIV\n");break;
2485 case 1: IJ_printf(th_rand2, "\tta T_CHANGE_HPRIV\n");break;
2486 case 2: IJ_printf(th_rand2, "\tta T_CHANGE_PRIV\n");break;
2487 case 3: IJ_printf(th_rand2, "\tta T_CHANGE_NONPRIV\n");break;
2488 }
2489 label++
2490 } // }}}
2491 | uDBG16 %ropr Ro_ldst_ptr
2492 { // {{{
2493%asm<th_rand2>{
2494vahole6_@{"%y"}_$label:
2495 nop
2496 nop
2497 mov 1, %r27
2498 sllx %r27, 49, %r27
2499 jmpl %r27+0, %r27
2500%}
2501 switch (IJ_random()&0x1) {
2502 case 0: IJ_printf(th_rand2, "\tta T_CHANGE_NONHPRIV\n");break;
2503 case 1: IJ_printf(th_rand2, "\tta T_CHANGE_HPRIV\n");break;
2504 }
2505 label++
2506 } // }}}
2507;
2508tglhtw : tBSHUFFLE
2509 {
2510%asm<th_rand3>{
2511tglhtw_@{"%y"}_$label:
2512 nop
2513 nop
2514 rd %asi, %l3 ! save %asi
2515 ta T_CHANGE_HPRIV
2516 wr %g0, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %asi
2517 mov 1, %l2
2518 sllx %l2, 63, %l2
2519 ldxa [ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_0] %asi, %l4
2520 xor %l4, %l2, %l4
2521 stxa %l4, [ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_0] %asi
2522 ldxa [ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1] %asi, %l4
2523 xor %l4, %l2, %l4
2524 stxa %l4, [ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_1] %asi
2525 ldxa [ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2] %asi, %l4
2526 xor %l4, %l2, %l4
2527 stxa %l4, [ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2] %asi
2528 ldxa [ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3] %asi, %l4
2529 xor %l4, %l2, %l4
2530 stxa %l4, [ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_3] %asi
2531 ldxa [ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_0] %asi, %l4
2532 xor %l4, %l2, %l4
2533 stxa %l4, [ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_0] %asi
2534 ldxa [ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_1] %asi, %l4
2535 xor %l4, %l2, %l4
2536 stxa %l4, [ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_1] %asi
2537 ldxa [ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_2] %asi, %l4
2538 xor %l4, %l2, %l4
2539 stxa %l4, [ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_2] %asi
2540 ldxa [ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_3] %asi, %l4
2541 xor %l4, %l2, %l4
2542 stxa %l4, [ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_3] %asi
2543 wrhpr %g0, @Rv_wrhp_nonhp, %hpstate ! ta T_CHANGE_NONHPRIV
2544 wr %g0, %l3, %asi !restore %asi
2545%}
2546 label++;
2547 }
2548;
2549unsuptte: uFPD1
2550 {
2551%asm<th_rand2>{
2552unsupttte_@{"%y"}_$label:
2553 nop
2554 nop
2555 ta T_CHANGE_HPRIV
2556 mov 1, %r20
2557 sllx %r20, 63, %r20
2558 or %r20, 2,%r20
2559%}
2560 if (IJ_random()&0x1){
2561%asm<th_rand2>{
2562 stxa %r20, [%g0]0x54 ! I unsupported page size ..
2563%}
2564 } else {
2565%asm<th_rand2>{
2566 stxa %r20, [%g0]0x5c ! D unsupported page size ..
2567%}
2568 }
2569%asm<th_rand2>{
2570 wrhpr %g0, @Rv_wrhp_nonhp, %hpstate ! ta T_CHANGE_NONHPRIV
2571%}
2572 label++;
2573 }
2574;
2575invtsb:tFBL
2576 {
2577%asm<th_rand>{
2578invtsb_@{"%y"}_$label:
2579 nop
2580 nop
2581 ta T_CHANGE_HPRIV
2582 rd %asi, %r21
2583 wr %r0,ASI_MMU_REAL_RANGE, %asi
2584 mov 1, %r20
2585 sllx %r20, 63, %r20
2586 ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22
2587 xor %r22 ,%r20, %r22
2588 stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi
2589 ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22
2590 xor %r22 ,%r20, %r22
2591 stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi
2592 ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22
2593 xor %r22 ,%r20, %r22
2594 stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi
2595 ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22
2596 xor %r22 ,%r20, %r22
2597 stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi
2598 wr %r21, %r0, %asi
2599 wrhpr %g0, @Rv_wrhp_nonhp, %hpstate ! ta T_CHANGE_NONHPRIV
2600%}
2601 label++;
2602 }
2603;
2604jmptr: tJMPL_R %ropr Ro_jmptr
2605 {
2606%asm<th_all>{
2607jmptr_@{"%y"}_$label:
2608 nop
2609 nop
2610 best_set_reg(@Rv_jmptr, %r20, %r27)
2611%}
2612 label++;
2613 }
2614;
2615fpinit:uFPD %ropr Ro_fpd
2616 {
2617%asm<th_all>{
2618fpinit_@{"%y"}_$label:
2619 nop
2620 setx fp_data_quads, %r19, %r20
2621 ldd [%r20], %f@Ro_fpd.Ft_Rs1
2622 ldd [%r20+8], %f@Ro_fpd.Ft_Rs2
2623 ld [%r20+16], %fsr
2624 ld [%r20+24], %r19
2625 wr %r19, %g0, %gsr
2626%}
2627 label++;
2628 }
2629;
2630skip: uDIFF
2631 { // {{{
2632 IJ_update_rvar(Rv_align);
2633 sprintf(label_suffix, "%d\0", label);
2634 IJ_set_ropr_fld (Ro_skip, Ft_Label_Counter, label_suffix);
2635 IJ_set_ropr_fld (Ro_skip, Ft_Label_Suffix, "");
2636 IJ_generate_from_token(1, th_rand2, Ro_skip, uBR);
2637 IJ_generate_from_token(1, th_rand2, Ro_skip, uBR, uDIFF);
2638 if (IJ_random()&0x1) {
2639 IJ_set_ropr_fld (Ro_skip, Ft_Label_Suffix, "-4");
2640 } else {
2641 IJ_set_ropr_fld (Ro_skip, Ft_Label_Suffix, "");
2642 }
2643 IJ_printf(th_rand2, ".align %d\nskip_%y_%d:\n", IJ_get_rvar_val32(Rv_align), label);
2644 label++;
2645 } // }}}
2646 | uDIFF1 %ropr Ro_nontrap_ld
2647 { // {{{
2648 IJ_update_rvar(Rv_align);
2649 sprintf(label_suffix, "%d\0", label);
2650 IJ_set_ropr_fld (Ro_skip, Ft_Label_Suffix, "");
2651 IJ_set_ropr_fld (Ro_skip, Ft_Label_Counter, label_suffix);
2652 IJ_generate_from_token(1, th_rand2, Ro_skip, uBR);
2653 IJ_printf(th_rand2, "\tstxa %%r%rd, [%%r0] ASI_LSU_CONTROL\n",Rv_randreg);
2654 IJ_generate_from_token(1, th_rand2, Ro_skip, uBR, uDIFF);
2655 IJ_printf(th_rand2, "\tstxa %%r%rd, [%%r0] ASI_LSU_CONTROL\n",Rv_randreg);
2656 IJ_printf(th_rand2, ".align %d\nskip_%y_%d:\n", IJ_get_rvar_val32(Rv_align), label);
2657 label++;
2658 } // }}}
2659;
2660pwr: tPDIST
2661 {
2662%asm<th_all>{
2663 set @Rv_pwrmgmt, %l3
2664 stxa %l3, [%g0] ASI_SPARC_PWR_MGMT
2665%}
2666 }
2667;
2668memptr: tWRCCR_I
2669 {
2670 IJ_printf(th_all, "memptr_%y_%d:\n", label);
2671 if (label%3 == 0) { //
2672 IJ_printf(th_all, "\tset user_data_start, %%r31\n", Rv_memptr);
2673 } else {
2674 IJ_printf(th_all, "\tset 0x%rx, %%r31\n", Rv_memptr);
2675 }
2676 label++;
2677 }
2678;
2679sma: tCASA_I %ropr Ro_ldst_ptr
2680 {
2681%asm<th_all>{
2682 nop
2683 nop
2684 ta T_CHANGE_HPRIV
2685 mov 0x@{"%y"}, %r10
2686 set sync_thr_counter6, %r23
2687#ifndef SPC
2688 ldxa [%g0]0x63, %o1
2689 and %o1, 0x38, %o1
2690#ifndef PORTABLE_CORE
2691 add %o1, %r23, %r23
2692#endif
2693#endif
2694 cas [%r23],%g0,%r10 !lock
2695 brnz %r10, sma_@{"%y"}_$label
2696 rd %asi, %r12
2697 wr %g0, 0x40, %asi
2698 ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0
2699%}
2700 int j;
2701 for(j=0; j<8; j++) {
2702 if (thall & (1<<j)) {
2703 IJ_bind_thread_group(sma_grp, 1<<j);
2704 IJ_update_rvar(Rv_sma);
2705 IJ_printf(sma_grp, "\tset 0x%x, %%l7\n", IJ_get_rvar_val32(Rv_sma));
2706 IJ_printf(sma_grp, "\tstxa %%l7, [%%g0 + 0x80] %%asi\n");
2707 IJ_printf(sma_grp, "!! RV_SMA for %d_%y is %llx\n", label,IJ_get_rvar_val32(Rv_sma));
2708 IJ_printf(sma_grp, "!! MA interrupt goes to TID %d\n", (IJ_get_rvar_val32(Rv_sma)>>18));
2709 IJ_printf(sma_grp, "ifelse(%d,mask2tid(0x%y),`wrhpr %%g0, 0x0, %%halt ! HALT')\n" , (IJ_get_rvar_val32(Rv_sma)>>18));
2710 }
2711 }
2712%asm<th_all>{
2713 wr %r12, %g0, %asi
2714 st %g0, [%r23]
2715sma_@{"%y"}_$label:
2716 wrhpr %g0, @Rv_wrhp_nonhp, %hpstate ! ta T_CHANGE_NONHPRIV
2717%}
2718 label++;
2719 }
2720;
2721cwq: tRDPC
2722 {
2723%asm<th_all>{
2724 nop
2725 nop
2726 ta T_CHANGE_HPRIV
2727 mov 0x@{"%y"}+1, %r10
2728 set sync_thr_counter5, %r23
2729#ifndef SPC
2730 ldxa [%g0]0x63, %o1
2731 and %o1, 0x38, %o1
2732#ifndef PORTABLE_CORE
2733 add %o1, %r23, %r23
2734 sllx %o1, 5, %o3 !(CID*256)
2735#endif
2736#endif
2737 cas [%r23],%g0,%r10 !lock
2738 brnz %r10, cwq_@{"%y"}_$label
2739 rd %asi, %r12
2740 wr %g0, 0x40, %asi
2741 ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1
2742 and %l1, 0x3, %l1 ! Check if busy/enabled ..
2743 cmp %l1, 1
2744%}
2745 IJ_printf(th_all, "\tbne cwq_%y_%d\n", label);
2746%asm<th_all>{
2747 set CWQ_BASE, %l6
2748#ifndef SPC
2749 add %l6, %o3, %l6
2750#endif
2751 stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi
2752%}
2753 int j;
2754 for(j=0; j<8; j++) {
2755 if (thall & (1<<j)) {
2756 IJ_bind_thread_group(cwq_grp, 1<<j);
2757 IJ_update_rvar(Rv_cwq_32);
2758 IJ_printf(cwq_grp, "\tbest_set_reg(0x%x, %%l1, %%l2) !#Control Word %y \n", IJ_get_rvar_val32(Rv_cwq_32));
2759%asm<cwq_grp>{
2760 sllx %l2, 32, %l2
2761 stx %l2, [%l6 + 0x0]
2762 membar #Sync
2763 ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2
2764 sub %l2, 0x40, %l2
2765 stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi
2766cwq_pre_@{"%y"}_$label:
2767%}
2768 IJ_printf(cwq_grp, "!! CWQ interrupt (%08llx) goes to TID %d\n", IJ_get_rvar_val32(Rv_cwq_32), (IJ_get_rvar_val32(Rv_cwq_32)>>5)&0x7);
2769 IJ_printf(cwq_grp, "ifelse(%d,mask2tid(0x%y),`wrhpr %%g0, 0x0, %%halt ! HALT')\n" , (IJ_get_rvar_val32(Rv_cwq_32)>>5)&0x7);
2770 IJ_printf(cwq_grp, "#if (defined SPC || defined CMP1)\n" );
2771 IJ_set_rvar(Rv_offset,"10'b1r1rrrr000");
2772 IJ_printf(cwq_grp, "ifelse(%d,mask2tid(0x%y),`!$EV trig_pc_d(1, expr(@VA(.MAIN.cwq_pre_%y_%d) , 16, 16)) -> intp(mask2tid(0x%y),0,45,*,%rd,*,*,1)')\n", (IJ_get_rvar_val32(Rv_cwq_32)>>5)&0x7, label , Rv_offset);
2773 IJ_printf(cwq_grp, "ifelse(%d,mask2tid(0x%y),`!$EV trig_pc_d(1, expr((@VA(.MAIN.cwq_pre_%y_%d)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x%y),0,45,*,%rd,*,*,1)')\n", (IJ_get_rvar_val32(Rv_cwq_32)>>5)&0x7, label, Rv_offset);
2774 IJ_printf(cwq_grp, "#endif\n" );
2775 IJ_set_rvar(Rv_offset,"6'brrr000");
2776 }
2777 }
2778%asm<th_all>{
2779 wr %r12, %g0, %asi
2780 st %g0, [%r23]
2781cwq_@{"%y"}_$label:
2782 wrhpr %g0, @Rv_wrhp_nonhp, %hpstate ! ta T_CHANGE_NONHPRIV
2783%}
2784 label++;
2785 }
2786;
2787
2788pmu: tWR_PERF_COUNTER_R %ropr Ro_pmu
2789 {
2790 IJ_printf(th_all, "pmu_%y_%d:\n\tnop\n\tnop\n", label);
2791 if(IJ_random()&0x1)
2792 IJ_printf(th_all, "\tta T_CHANGE_PRIV\n");
2793 IJ_printf(th_all, "\tsetx 0x%016llrx, %%g1, %%g7\n", Rv_pic_64);
2794 label++
2795 }
2796;
2797donret: tFDIVd
2798 { // {{{
2799 IJ_printf(th_all, "\tnop\n\tnop\n", label);
2800 IJ_generate_from_token(1, th_all, ijdefault, tCHANGE_HPRIV);
2801 IJ_printf(th_all, "donret_%y_%d:\n", label);
2802 IJ_printf(th_all, "\trd %%pc, %%r12\n");
2803 IJ_printf(th_all, "\tmov HIGHVA_HIGHNUM, %%r10\n");
2804 IJ_printf(th_all, "\tsllx %%r10, 32, %%r10\n");
2805 IJ_printf(th_all, "\tor %%r12, %%r10, %%r12\n");
2806 if (IJ_random()&0x4) {
2807 IJ_printf(th_all, "\tadd %%r12, (donretarg_%y_%d-donret_%y_%d+4), %%r12\n", label,label,Rv_offset);
2808 IJ_printf(th_all, "\tadd %%r12, 0x4, %%r11 ! seq tnpc\n");
2809 } else {
2810 IJ_printf(th_all, "\tadd %%r12, (donretarg_%y_%d-donret_%y_%d), %%r12\n", label,label,Rv_offset);
2811 if (IJ_random()&0x1) {
2812 IJ_printf(th_all, "\tadd %%r12, 0x8, %%r11 ! nonseq tnpc\n");
2813 } else {
2814 IJ_printf(th_all, "\tadd %%r12, 0x4, %%r11 ! seq tnpc\n");
2815 }
2816 }
2817 if (IJ_random()&0x4) {
2818 if (IJ_random()&0x1) {
2819 IJ_printf(th_all, "\tandn %%r11, %%r10, %%r11 ! low VA tnpc\n");
2820 } else {
2821 IJ_printf(th_all, "\tandn %%r12, %%r10, %%r12 ! low VA tpc\n");
2822 }
2823 }
2824 IJ_set_ropr_fld(Ro_tl, Ft_Simm13, "{1..2}");
2825%asm<th_all>{
2826 wrpr %g0, 0x@Ro_tl.Ft_Simm13, %tl
2827 wrpr %g0, %r12, %tpc
2828 wrpr %g0, %r11, %tnpc
2829 set (@Rv_wrtstate | (@Ro_wrasi_i.Ft_Simm13 << 24)), %r13
2830 and %r12, 0xfff, %r14
2831 sllx %r14, 32, %r14
2832 or %r13, %r14, %r20
2833 wrpr %r20, %g0, %tstate
2834 wrhpr %g0, @Ro_wrrhpstate.Ft_Simm13, %htstate
2835%}
2836 if (IJ_random()&0x1) {
2837 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! rand=1 (%y)\n", Rv_wrhp_nonhp);
2838 } else {
2839 IJ_printf(th_all, "\tbest_set_reg(0x%rx, %%g1, %%g2)\n\twrpr %%g0, %%g2, %%pstate ! rand=0 (%y)\n", Rv_wrp_nonp);
2840 }
2841 if (!(IJ_random()%4)) {
2842 IJ_generate_from_token(1, th_all, ijdefault, uBR);
2843 }
2844 if (label%2) {
2845 if(IJ_random()&0x1) {
2846 IJ_printf(th_all, "\tldx [%%r11+%%r0], %%g1\n");
2847 }
2848 IJ_printf(th_all, "\tdone\n");
2849 } else {
2850 if(IJ_random()&0x1) {
2851 IJ_printf(th_all, "\tldx [%%r12+%%r0], %%g1\n");
2852 }
2853 IJ_printf(th_all, "\tretry\n");
2854 }
2855 if (!(IJ_random()%3)) {
2856 IJ_printf(th_all, ".align %d\n", IJ_get_rvar_val32(Rv_align1));
2857 }
2858 IJ_printf(th_all, "donretarg_%y_%d:\n", label);
2859 label++;
2860 } // }}}
2861 | tLDSTUB_I %ropr Ro_nontrap_ld
2862 { // {{{
2863 IJ_printf(th_all, "\tnop\n\tnop\n", label);
2864 IJ_generate_from_token(1, th_all, ijdefault, tCHANGE_HPRIV);
2865 IJ_printf(th_all, "donret_%y_%d:\n", label);
2866 IJ_printf(th_all, "\trd %%pc, %%r12\n");
2867 IJ_printf(th_all, "\tmov HIGHVA_HIGHNUM, %%r10\n");
2868 IJ_printf(th_all, "\tsllx %%r10, 32, %%r10\n");
2869 IJ_printf(th_all, "\tor %%r12, %%r10, %%r12\n");
2870 if (IJ_random()&0x4) {
2871 IJ_printf(th_all, "\tadd %%r12, (donretarg_%y_%d-donret_%y_%d+4), %%r12\n", label,label,Rv_offset);
2872 IJ_printf(th_all, "\tadd %%r12, 0x4, %%r11 ! seq tnpc\n");
2873 } else {
2874 IJ_printf(th_all, "\tadd %%r12, (donretarg_%y_%d-donret_%y_%d), %%r12\n", label,label,Rv_offset);
2875 if (IJ_random()&0x1) {
2876 IJ_printf(th_all, "\tadd %%r12, 0x8, %%r11 ! nonseq tnpc\n");
2877 } else {
2878 IJ_printf(th_all, "\tadd %%r12, 0x4, %%r11 ! seq tnpc\n");
2879 }
2880 }
2881 if (IJ_random()&0x4) {
2882 if (IJ_random()&0x1) {
2883 IJ_printf(th_all, "\tandn %%r11, %%r10, %%r11 ! low VA tnpc\n");
2884 } else {
2885 IJ_printf(th_all, "\tandn %%r12, %%r10, %%r12 ! low VA tpc\n");
2886 }
2887 }
2888 IJ_set_ropr_fld(Ro_tl, Ft_Simm13, "{1..2}");
2889%asm<th_all>{
2890 wrpr %g0, 0x@Ro_tl.Ft_Simm13, %tl
2891 wrpr %g0, %r12, %tpc
2892 wrpr %g0, %r11, %tnpc
2893 set (@Rv_wrtstate | (@Ro_wrasi_i.Ft_Simm13 << 24)), %r13
2894 and %r12, 0xfff, %r14
2895 sllx %r14, 32, %r14
2896 or %r13, %r14, %r20
2897 wrpr %r20, %g0, %tstate
2898 wrhpr %g0, @Ro_wrrhpstate.Ft_Simm13, %htstate
2899%}
2900 if (IJ_random()&0x1) {
2901 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! rand=1 (%y)\n", Rv_wrhp_nonhp);
2902 } else {
2903 IJ_printf(th_all, "\tbest_set_reg(0x%rx, %%g1, %%g2)\n\twrpr %%g0, %%g2, %%pstate ! rand=0 (%y)\n", Rv_wrp_nonp);
2904 }
2905 if (!(IJ_random()%4)) {
2906 IJ_generate_from_token(1, th_all, ijdefault, uBR);
2907 }
2908 if (label%2) {
2909 if(IJ_random()&0x1) {
2910 IJ_printf(th_all, "\tldx [%%r11+%%r0], %%g1\n");
2911 }
2912 IJ_printf(th_all, "\tdone\n");
2913 } else {
2914 if(IJ_random()&0x1) {
2915 IJ_printf(th_all, "\tldx [%%r12+%%r0], %%g1\n");
2916 }
2917 IJ_printf(th_all, "\tretry\n");
2918 }
2919 if (!(IJ_random()%3)) {
2920 IJ_printf(th_all, ".align %d\n", IJ_get_rvar_val32(Rv_align1));
2921 }
2922 IJ_printf(th_all, "donretarg_%y_%d:\n", label);
2923 label++;
2924 } // }}}
2925 | tSWAPA_R %ropr Ro_nontrap_ld
2926 { // {{{
2927 IJ_printf(th_all, "\tnop\n\tnop\n", label);
2928 IJ_generate_from_token(1, th_all, ijdefault, tCHANGE_HPRIV);
2929 IJ_printf(th_all, "donret_%y_%d:\n", label);
2930 IJ_printf(th_all, "\trd %%pc, %%r12\n");
2931 IJ_printf(th_all, "\tmov HIGHVA_HIGHNUM, %%r10\n");
2932 IJ_printf(th_all, "\tsllx %%r10, 32, %%r10\n");
2933 IJ_printf(th_all, "\tor %%r12, %%r10, %%r12\n");
2934 if (IJ_random()&0x4) {
2935 IJ_printf(th_all, "\tadd %%r12, (donretarg_%y_%d-donret_%y_%d+4), %%r12\n", label,label,Rv_offset);
2936 IJ_printf(th_all, "\tadd %%r12, 0x4, %%r11 ! seq tnpc\n");
2937 } else {
2938 IJ_printf(th_all, "\tadd %%r12, (donretarg_%y_%d-donret_%y_%d), %%r12\n", label,label,Rv_offset);
2939 if (IJ_random()&0x1) {
2940 IJ_printf(th_all, "\tadd %%r12, 0x8, %%r11 ! nonseq tnpc\n");
2941 } else {
2942 IJ_printf(th_all, "\tadd %%r12, 0x4, %%r11 ! seq tnpc\n");
2943 }
2944 }
2945 if (IJ_random()&0x4) {
2946 if (IJ_random()&0x1) {
2947 IJ_printf(th_all, "\tandn %%r11, %%r10, %%r11 ! low VA tnpc\n");
2948 } else {
2949 IJ_printf(th_all, "\tandn %%r12, %%r10, %%r12 ! low VA tpc\n");
2950 }
2951 }
2952 IJ_set_ropr_fld(Ro_tl, Ft_Simm13, "{1..2}");
2953%asm<th_all>{
2954 wrpr %g0, 0x@Ro_tl.Ft_Simm13, %tl
2955 wrpr %g0, %r12, %tpc
2956 wrpr %g0, %r11, %tnpc
2957 set (@Rv_wrtstate | (@Ro_wrasi_i.Ft_Simm13 << 24)), %r13
2958 and %r12, 0xfff, %r14
2959 sllx %r14, 32, %r14
2960 or %r13, %r14, %r20
2961 wrpr %r20, %g0, %tstate
2962 wrhpr %g0, @Ro_wrrhpstate.Ft_Simm13, %htstate
2963%}
2964 if (IJ_random()&0x1) {
2965 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! rand=1 (%y)\n", Rv_wrhp_nonhp);
2966 } else {
2967 IJ_printf(th_all, "\tbest_set_reg(0x%rx, %%g1, %%g2)\n\twrpr %%g0, %%g2, %%pstate ! rand=0 (%y)\n", Rv_wrp_nonp);
2968 }
2969 if (!(IJ_random()%4)) {
2970 IJ_generate_from_token(1, th_all, ijdefault, uBR);
2971 }
2972 if (label%2) {
2973 if(IJ_random()&0x1) {
2974 IJ_printf(th_all, "\tldx [%%r11+%%r0], %%g1\n");
2975 }
2976 IJ_printf(th_all, "\tdone\n");
2977 } else {
2978 if(IJ_random()&0x1) {
2979 IJ_printf(th_all, "\tldx [%%r12+%%r0], %%g1\n");
2980 }
2981 IJ_printf(th_all, "\tretry\n");
2982 }
2983 if (!(IJ_random()%3)) {
2984 IJ_printf(th_all, ".align %d\n", IJ_get_rvar_val32(Rv_align1));
2985 }
2986 IJ_printf(th_all, "donretarg_%y_%d:\n", label);
2987 label++;
2988 } // }}}
2989 | uBR
2990 { // {{{
2991 IJ_printf(th_all, "\tnop\n\tnop\n", label);
2992 IJ_generate_from_token(1, th_all, ijdefault, tCHANGE_HPRIV);
2993 IJ_printf(th_all, "donret_%y_%d:\n", label);
2994 IJ_printf(th_all, "\trd %%pc, %%r12\n");
2995 IJ_printf(th_all, "\tmov HIGHVA_HIGHNUM, %%r10\n");
2996 IJ_printf(th_all, "\tsllx %%r10, 32, %%r10\n");
2997 IJ_printf(th_all, "\tor %%r12, %%r10, %%r12\n");
2998 if (IJ_random()&0x4) {
2999 IJ_printf(th_all, "\tadd %%r12, (donretarg_%y_%d-donret_%y_%d+4), %%r12\n", label,label,Rv_offset);
3000 IJ_printf(th_all, "\tadd %%r12, 0x4, %%r11 ! seq tnpc\n");
3001 } else {
3002 IJ_printf(th_all, "\tadd %%r12, (donretarg_%y_%d-donret_%y_%d), %%r12\n", label,label,Rv_offset);
3003 if (IJ_random()&0x1) {
3004 IJ_printf(th_all, "\tadd %%r12, 0x8, %%r11 ! nonseq tnpc\n");
3005 } else {
3006 IJ_printf(th_all, "\tadd %%r12, 0x4, %%r11 ! seq tnpc\n");
3007 }
3008 }
3009 if (IJ_random()&0x4) {
3010 if (IJ_random()&0x1) {
3011 IJ_printf(th_all, "\tandn %%r11, %%r10, %%r11 ! low VA tnpc\n");
3012 } else {
3013 IJ_printf(th_all, "\tandn %%r12, %%r10, %%r12 ! low VA tpc\n");
3014 }
3015 }
3016 IJ_set_ropr_fld(Ro_tl, Ft_Simm13, "{1..2}");
3017%asm<th_all>{
3018 wrpr %g0, 0x@Ro_tl.Ft_Simm13, %tl
3019 wrpr %g0, %r12, %tpc
3020 wrpr %g0, %r11, %tnpc
3021 set (@Rv_wrtstate | (@Ro_wrasi_i.Ft_Simm13 << 24)), %r13
3022 and %r12, 0xfff, %r14
3023 sllx %r14, 32, %r14
3024 or %r13, %r14, %r20
3025 wrpr %r20, %g0, %tstate
3026 wrhpr %g0, @Ro_wrrhpstate.Ft_Simm13, %htstate
3027%}
3028 if (IJ_random()&0x1) {
3029 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! rand=1 (%y)\n", Rv_wrhp_nonhp);
3030 } else {
3031 IJ_printf(th_all, "\tbest_set_reg(0x%rx, %%g1, %%g2)\n\twrpr %%g0, %%g2, %%pstate ! rand=0 (%y)\n", Rv_wrp_nonp);
3032 }
3033 if (!(IJ_random()%4)) {
3034 IJ_generate_from_token(1, th_all, ijdefault, uBR);
3035 }
3036 if (label%2) {
3037 if(IJ_random()&0x1) {
3038 IJ_printf(th_all, "\tldx [%%r11+%%r0], %%g1\n");
3039 }
3040 IJ_printf(th_all, "\tdone\n");
3041 } else {
3042 if(IJ_random()&0x1) {
3043 IJ_printf(th_all, "\tldx [%%r12+%%r0], %%g1\n");
3044 }
3045 IJ_printf(th_all, "\tretry\n");
3046 }
3047 if (!(IJ_random()%3)) {
3048 IJ_printf(th_all, ".align %d\n", IJ_get_rvar_val32(Rv_align1));
3049 }
3050 IJ_printf(th_all, "donretarg_%y_%d:\n", label);
3051 label++;
3052 } // }}}
3053 | uSTATE3 %ropr Ro_wrhpstate
3054 { // {{{
3055 IJ_printf(th_all, "\tnop\n\tnop\n", label);
3056 IJ_generate_from_token(1, th_all, ijdefault, tCHANGE_HPRIV);
3057 IJ_printf(th_all, "donret_%y_%d:\n", label);
3058 IJ_printf(th_all, "\trd %%pc, %%r12\n");
3059 IJ_printf(th_all, "\tmov HIGHVA_HIGHNUM, %%r10\n");
3060 IJ_printf(th_all, "\tsllx %%r10, 32, %%r10\n");
3061 IJ_printf(th_all, "\tor %%r12, %%r10, %%r12\n");
3062 if (IJ_random()&0x4) {
3063 IJ_printf(th_all, "\tadd %%r12, (donretarg_%y_%d-donret_%y_%d+4), %%r12\n", label,label,Rv_offset);
3064 IJ_printf(th_all, "\tadd %%r12, 0x4, %%r11 ! seq tnpc\n");
3065 } else {
3066 IJ_printf(th_all, "\tadd %%r12, (donretarg_%y_%d-donret_%y_%d), %%r12\n", label,label,Rv_offset);
3067 if (IJ_random()&0x1) {
3068 IJ_printf(th_all, "\tadd %%r12, 0x8, %%r11 ! nonseq tnpc\n");
3069 } else {
3070 IJ_printf(th_all, "\tadd %%r12, 0x4, %%r11 ! seq tnpc\n");
3071 }
3072 }
3073 if (IJ_random()&0x4) {
3074 if (IJ_random()&0x1) {
3075 IJ_printf(th_all, "\tandn %%r11, %%r10, %%r11 ! low VA tnpc\n");
3076 } else {
3077 IJ_printf(th_all, "\tandn %%r12, %%r10, %%r12 ! low VA tpc\n");
3078 }
3079 }
3080 IJ_set_ropr_fld(Ro_tl, Ft_Simm13, "{1..2}");
3081%asm<th_all>{
3082 wrpr %g0, 0x@Ro_tl.Ft_Simm13, %tl
3083 wrpr %g0, %r12, %tpc
3084 wrpr %g0, %r11, %tnpc
3085 set (@Rv_wrtstate | (@Ro_wrasi_i.Ft_Simm13 << 24)), %r13
3086 and %r12, 0xfff, %r14
3087 sllx %r14, 32, %r14
3088 or %r13, %r14, %r20
3089 wrpr %r20, %g0, %tstate
3090 wrhpr %g0, @Ro_wrrhpstate.Ft_Simm13, %htstate
3091%}
3092 if (IJ_random()&0x1) {
3093 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! rand=1 (%y)\n", Rv_wrhp_nonhp);
3094 } else {
3095 IJ_printf(th_all, "\tbest_set_reg(0x%rx, %%g1, %%g2)\n\twrpr %%g0, %%g2, %%pstate ! rand=0 (%y)\n", Rv_wrp_nonp);
3096 }
3097 if (!(IJ_random()%4)) {
3098 IJ_generate_from_token(1, th_all, ijdefault, uBR);
3099 }
3100 if (label%2) {
3101 if(IJ_random()&0x1) {
3102 IJ_printf(th_all, "\tldx [%%r11+%%r0], %%g1\n");
3103 }
3104 IJ_printf(th_all, "\tdone\n");
3105 } else {
3106 if(IJ_random()&0x1) {
3107 IJ_printf(th_all, "\tldx [%%r12+%%r0], %%g1\n");
3108 }
3109 IJ_printf(th_all, "\tretry\n");
3110 }
3111 if (!(IJ_random()%3)) {
3112 IJ_printf(th_all, ".align %d\n", IJ_get_rvar_val32(Rv_align1));
3113 }
3114 IJ_printf(th_all, "donretarg_%y_%d:\n", label);
3115 label++;
3116 } // }}}
3117;
3118cmp: uDBG17 %ropr Ro_ldst_ptr
3119 { // {{{
3120 IJ_printf(th_mast, "cmp_%y_%d:\n\tnop\n\tnop\n", label);
3121#ij ifdef MT
3122if (IJ_random()&0xf > 10 && (label%2==0)) {
3123 cmpex =1;
3124} else {
3125}
3126%asm<th_mast>{
3127 ta T_CHANGE_HPRIV
3128 rd %asi, %r12
3129 wr %r0, 0x41, %asi
3130 set sync_thr_counter4, %r23
3131#ifndef SPC
3132 ldxa [%g0]0x63, %r8
3133 and %r8, 0x38, %r8 ! Core ID
3134#ifndef PORTABLE_CORE
3135 add %r8, %r23, %r23
3136#endif
3137 mov 0xff, %r9
3138#if (!defined PORTABLE_CORE || MAX_THREADS == 8)
3139%}
3140if(cmpex) {
3141 IJ_printf(th_mast, "\t!No core mask - cmpex trying to park all threads\n");
3142
3143} else {
3144 IJ_printf(th_mast, "\txor %%r9, 0x%y, %%r9 ! My core mask\n");
3145}
3146%asm<th_mast>{
3147#else
3148 xor %r9, 0x@{"%y"}, %r9
3149#endif
3150 sllx %r9, %r8, %r9 ! My core mask
3151#else
3152 mov 0, %r8
3153 mov 0xff, %r9
3154%}
3155if(cmpex) {
3156 IJ_printf(th_mast, "\t!No core mask - cmpex trying to park all threads\n");
3157
3158} else {
3159 IJ_printf(th_mast, "\txor %%r9, 0x%y, %%r9 ! My core mask\n");
3160}
3161%asm<th_mast>{
3162#endif
3163 mov 0x@{"%y"}, %r10
3164cmp_startwait@{"%y"}_$label:
3165 cas [%r23],%g0,%r10 !lock
3166 brz,a %r10, continue_cmp_@{"%y"}_$label
3167 ldxa [0x50]%asi, %r13 !Running_rw
3168 ld [%r23], %r10
3169cmp_wait@{"%y"}_$label:
3170 brnz,a %r10, cmp_wait@{"%y"}_$label
3171 ld [%r23], %r10
3172 ba cmp_startwait@{"%y"}_$label
3173 mov 0x@{"%y"}, %r10
3174continue_cmp_@{"%y"}_$label:
3175 ldxa [0x58]%asi, %r14 !Running_status
3176 xnor %r14, %r13, %r14 !Bits equal
3177#ifndef PORTABLE_CORE
3178 brz,a %r8, cmp_multi_core_@{"%y"}_$label
3179#endif
3180%}
3181if (cmpex) {
3182 IJ_printf(th_mast, "\tnot %%g0, %%r17\n");
3183}else {
3184 IJ_printf(th_mast, "\tmov 0x%rx, %%r17\n", Rv_cmp);
3185}
3186%asm<th_mast>{
3187#ifndef PORTABLE_CORE
3188 best_set_reg(@Rv_rand_64, %r16, %r17)
3189#else
3190 sllx %r17, %r8, %r17
3191#endif
3192cmp_multi_core_@{"%y"}_$label:
3193 and %r14, %r17, %r14 !Apply set/clear mask to bits equal
3194 and %r14, %r9, %r14 !Apply core-mask
3195%}
3196#ij else
3197%asm<th_mast>{
3198 ta T_CHANGE_HPRIV
3199 clr %r14
3200%}
3201
3202#ij endif
3203 if (label%2==0) {
3204 IJ_printf(th_mast, "\tstxa %%r14, [0x68]%%asi\n");
3205 } else {
3206 IJ_printf(th_mast, "\tstxa %%r14, [0x60]%%asi\n");
3207 }
3208 IJ_printf(th_mast, "\tst %%g0, [%%r23]\t!clear lock\n");
3209 IJ_printf(th_mast, "\twr %%g0, %%r12, %%asi\n");
3210 if (IJ_random()&0x1)
3211 IJ_printf(th_mast, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3212 label++;
3213 } //}}}
3214 | tWRPR_PIL_R
3215 { // {{{
3216 IJ_printf(th_mast, "cmp_%y_%d:\n\tnop\n\tnop\n", label);
3217#ij ifdef MT
3218if (IJ_random()&0xf > 10 && (label%2==0)) {
3219 cmpex =1;
3220} else {
3221}
3222%asm<th_mast>{
3223 ta T_CHANGE_HPRIV
3224 rd %asi, %r12
3225 wr %r0, 0x41, %asi
3226 set sync_thr_counter4, %r23
3227#ifndef SPC
3228 ldxa [%g0]0x63, %r8
3229 and %r8, 0x38, %r8 ! Core ID
3230#ifndef PORTABLE_CORE
3231 add %r8, %r23, %r23
3232#endif
3233 mov 0xff, %r9
3234#if (!defined PORTABLE_CORE || MAX_THREADS == 8)
3235%}
3236if(cmpex) {
3237 IJ_printf(th_mast, "\t!No core mask - cmpex trying to park all threads\n");
3238
3239} else {
3240 IJ_printf(th_mast, "\txor %%r9, 0x%y, %%r9 ! My core mask\n");
3241}
3242%asm<th_mast>{
3243#else
3244 xor %r9, 0x@{"%y"}, %r9
3245#endif
3246 sllx %r9, %r8, %r9 ! My core mask
3247 mov 0, %r8
3248#else
3249 mov 0, %r8
3250 mov 0xff, %r9
3251%}
3252if(cmpex) {
3253 IJ_printf(th_mast, "\t!No core mask - cmpex trying to park all threads\n");
3254
3255} else {
3256 IJ_printf(th_mast, "\txor %%r9, 0x%y, %%r9 ! My core mask\n");
3257}
3258%asm<th_mast>{
3259#endif
3260 mov 0x@{"%y"}, %r10
3261cmp_startwait@{"%y"}_$label:
3262 cas [%r23],%g0,%r10 !lock
3263 brz,a %r10, continue_cmp_@{"%y"}_$label
3264 ldxa [0x50]%asi, %r13 !Running_rw
3265 ld [%r23], %r10
3266cmp_wait@{"%y"}_$label:
3267 brnz,a %r10, cmp_wait@{"%y"}_$label
3268 ld [%r23], %r10
3269 ba cmp_startwait@{"%y"}_$label
3270 mov 0x@{"%y"}, %r10
3271continue_cmp_@{"%y"}_$label:
3272 ldxa [0x58]%asi, %r14 !Running_status
3273 xnor %r14, %r13, %r14 !Bits equal
3274 brz,a %r8, cmp_multi_core_@{"%y"}_$label
3275%}
3276if (cmpex) {
3277 IJ_printf(th_mast, "\tnot %%g0, %%r17\n");
3278}else {
3279 IJ_printf(th_mast, "\tmov 0x%rx, %%r17\n", Rv_cmp);
3280}
3281%asm<th_mast>{
3282 best_set_reg(@Rv_rand_64, %r16, %r17)
3283cmp_multi_core_@{"%y"}_$label:
3284 and %r14, %r17, %r14 !Apply set/clear mask to bits equal
3285 and %r14, %r9, %r14 !Apply core-mask
3286%}
3287#ij else
3288%asm<th_mast>{
3289 ta T_CHANGE_HPRIV
3290 clr %r14
3291%}
3292
3293#ij endif
3294 if (label%2==0) {
3295 IJ_printf(th_mast, "\tstxa %%r14, [0x68]%%asi\n");
3296 } else {
3297 IJ_printf(th_mast, "\tstxa %%r14, [0x60]%%asi\n");
3298 }
3299 IJ_printf(th_mast, "\tst %%g0, [%%r23]\t!clear lock\n");
3300 IJ_printf(th_mast, "\twr %%g0, %%r12, %%asi\n");
3301 if (IJ_random()&0x1)
3302 IJ_printf(th_mast, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3303 label++;
3304 } //}}}
3305;
3306ibp : uDBG1
3307 { // {{{
3308 IJ_printf(th_all, "ibp_%y_%d:\n\tnop\n\tnop\n", label);
3309#ij ifdef MT
3310%asm<th_tgm1>{
3311 ta T_CHANGE_HPRIV
3312 mov 8, %r18
3313 rd %asi, %r12
3314 wr %r0, 0x41, %asi
3315 set sync_thr_counter4, %r23
3316#ifndef SPC
3317 ldxa [%g0]0x63, %r8
3318 and %r8, 0x38, %r8 ! Core ID
3319#ifndef PORTABLE_CORE
3320 add %r8, %r23, %r23
3321#endif
3322#else
3323 mov 0, %r8
3324#endif
3325 mov 0x@{"%y"}, %r16
3326ibp_startwait@{"%y"}_$label:
3327 cas [%r23],%g0,%r16 !lock
3328 brz,a %r16, continue_ibp_@{"%y"}_$label
3329%}
3330%asm<th_tgml1>{
3331 mov (~0x@{"%y"}&0xf), %r16
3332%}
3333%asm<th_tgmh1>{
3334 mov (~0x@{"%y"}&0xf0), %r16
3335%}
3336%asm<th_tgm1>{
3337 ld [%r23], %r16
3338ibp_wait@{"%y"}_$label:
3339 brnz %r16, ibp_wait@{"%y"}_$label
3340 ld [%r23], %r16
3341 ba ibp_startwait@{"%y"}_$label
3342 mov 0x@{"%y"}, %r16
3343continue_ibp_@{"%y"}_$label:
3344 sllx %r16, %r8, %r16 !Mask for my core only
3345 ldxa [0x58]%asi, %r17 !Running_status
3346wait_for_stat_@{"%y"}_$label:
3347 ldxa [0x50]%asi, %r13 !Running_rw
3348 cmp %r13, %r17
3349 bne,a %xcc, wait_for_stat_@{"%y"}_$label
3350 ldxa [0x58]%asi, %r17 !Running_status
3351 stxa %r16, [0x68]%asi !Park (W1C)
3352 ldxa [0x50]%asi, %r14 !Running_rw
3353wait_for_ibp_@{"%y"}_$label:
3354 ldxa [0x58]%asi, %r17 !Running_status
3355 cmp %r14, %r17
3356 bne,a %xcc, wait_for_ibp_@{"%y"}_$label
3357 ldxa [0x50]%asi, %r14 !Running_rw
3358ibp_doit@{"%y"}_$label:
3359 best_set_reg(@Rv_instmask,%r19, %r20)
3360 stxa %r20, [%r18]0x42
3361 stxa %r16, [0x60] %asi !Unpark (W1S)
3362 st %g0, [%r23] !clear lock
3363 wr %r0, %r12, %asi !restore %asi
3364%}
3365 if (IJ_random()&0x1)
3366 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3367 label++;
3368#ij endif
3369} // }}}
3370 | uBLK2 %ropr Ro_blksts
3371 { // {{{
3372 IJ_printf(th_all, "ibp_%y_%d:\n\tnop\n\tnop\n", label);
3373#ij ifdef MT
3374%asm<th_tgm1>{
3375 ta T_CHANGE_HPRIV
3376 mov 8, %r18
3377 rd %asi, %r12
3378 wr %r0, 0x41, %asi
3379 set sync_thr_counter4, %r23
3380#ifndef SPC
3381 ldxa [%g0]0x63, %r8
3382 and %r8, 0x38, %r8 ! Core ID
3383#ifndef PORTABLE_CORE
3384 add %r8, %r23, %r23
3385#endif
3386#else
3387 mov 0, %r8
3388#endif
3389 mov 0x@{"%y"}, %r16
3390ibp_startwait@{"%y"}_$label:
3391 cas [%r23],%g0,%r16 !lock
3392 brz,a %r16, continue_ibp_@{"%y"}_$label
3393%}
3394%asm<th_tgml1>{
3395 mov (~0x@{"%y"}&0xf), %r16
3396%}
3397%asm<th_tgmh1>{
3398 mov (~0x@{"%y"}&0xf0), %r16
3399%}
3400%asm<th_tgm1>{
3401 ld [%r23], %r16
3402ibp_wait@{"%y"}_$label:
3403 brnz %r16, ibp_wait@{"%y"}_$label
3404 ld [%r23], %r16
3405 ba ibp_startwait@{"%y"}_$label
3406 mov 0x@{"%y"}, %r16
3407continue_ibp_@{"%y"}_$label:
3408 sllx %r16, %r8, %r16 !Mask for my core only
3409 ldxa [0x58]%asi, %r17 !Running_status
3410wait_for_stat_@{"%y"}_$label:
3411 ldxa [0x50]%asi, %r13 !Running_rw
3412 cmp %r13, %r17
3413 bne,a %xcc, wait_for_stat_@{"%y"}_$label
3414 ldxa [0x58]%asi, %r17 !Running_status
3415 stxa %r16, [0x68]%asi !Park (W1C)
3416 ldxa [0x50]%asi, %r14 !Running_rw
3417wait_for_ibp_@{"%y"}_$label:
3418 ldxa [0x58]%asi, %r17 !Running_status
3419 cmp %r14, %r17
3420 bne,a %xcc, wait_for_ibp_@{"%y"}_$label
3421 ldxa [0x50]%asi, %r14 !Running_rw
3422ibp_doit@{"%y"}_$label:
3423 best_set_reg(@Rv_instmask,%r19, %r20)
3424 stxa %r20, [%r18]0x42
3425 stxa %r16, [0x60] %asi !Unpark (W1S)
3426 st %g0, [%r23] !clear lock
3427 wr %r0, %r12, %asi !restore %asi
3428%}
3429 if (IJ_random()&0x1)
3430 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3431 label++;
3432#ij endif
3433} // }}}
3434 | uDBG3 %ropr Ro_ldst_ptr
3435 { // {{{
3436 IJ_printf(th_all, "ibp_%y_%d:\n\tnop\n\tnop\n", label);
3437#ij ifdef MT
3438%asm<th_tgm1>{
3439 ta T_CHANGE_HPRIV
3440 mov 8, %r18
3441 rd %asi, %r12
3442 wr %r0, 0x41, %asi
3443 set sync_thr_counter4, %r23
3444#ifndef SPC
3445 ldxa [%g0]0x63, %r8
3446 and %r8, 0x38, %r8 ! Core ID
3447#ifndef PORTABLE_CORE
3448 add %r8, %r23, %r23
3449#endif
3450#else
3451 mov 0, %r8
3452#endif
3453 mov 0x@{"%y"}, %r16
3454ibp_startwait@{"%y"}_$label:
3455 cas [%r23],%g0,%r16 !lock
3456 brz,a %r16, continue_ibp_@{"%y"}_$label
3457%}
3458%asm<th_tgml1>{
3459 mov (~0x@{"%y"}&0xf), %r16
3460%}
3461%asm<th_tgmh1>{
3462 mov (~0x@{"%y"}&0xf0), %r16
3463%}
3464%asm<th_tgm1>{
3465 ld [%r23], %r16
3466ibp_wait@{"%y"}_$label:
3467 brnz %r16, ibp_wait@{"%y"}_$label
3468 ld [%r23], %r16
3469 ba ibp_startwait@{"%y"}_$label
3470 mov 0x@{"%y"}, %r16
3471continue_ibp_@{"%y"}_$label:
3472 sllx %r16, %r8, %r16 !Mask for my core only
3473 ldxa [0x58]%asi, %r17 !Running_status
3474wait_for_stat_@{"%y"}_$label:
3475 ldxa [0x50]%asi, %r13 !Running_rw
3476 cmp %r13, %r17
3477 bne,a %xcc, wait_for_stat_@{"%y"}_$label
3478 ldxa [0x58]%asi, %r17 !Running_status
3479 stxa %r16, [0x68]%asi !Park (W1C)
3480 ldxa [0x50]%asi, %r14 !Running_rw
3481wait_for_ibp_@{"%y"}_$label:
3482 ldxa [0x58]%asi, %r17 !Running_status
3483 cmp %r14, %r17
3484 bne,a %xcc, wait_for_ibp_@{"%y"}_$label
3485 ldxa [0x50]%asi, %r14 !Running_rw
3486ibp_doit@{"%y"}_$label:
3487 best_set_reg(@Rv_instmask,%r19, %r20)
3488 stxa %r20, [%r18]0x42
3489 stxa %r16, [0x60] %asi !Unpark (W1S)
3490 st %g0, [%r23] !clear lock
3491 wr %r0, %r12, %asi !restore %asi
3492%}
3493 if (IJ_random()&0x1)
3494 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3495 label++;
3496#ij endif
3497} // }}}
3498;
3499iaw : uDBG4
3500 { // {{{
3501 IJ_printf(th_tgm2, "iaw_%y_%d:\n\tnop\n\tnop\n", label);
3502 IJ_printf(th_tgm2, "\tta T_CHANGE_HPRIV\n");
3503
3504%asm<th_tgm2>{
3505 mov 8, %r18
3506 rd %asi, %r12
3507 wr %r0, 0x41, %asi
3508 set sync_thr_counter4, %r23
3509#ifndef SPC
3510 ldxa [%g0]0x63, %r8
3511 and %r8, 0x38, %r8 ! Core ID
3512#ifndef PORTABLE_CORE
3513 add %r8, %r23, %r23
3514#endif
3515#else
3516 mov 0, %r8
3517#endif
3518 mov 0x@{"%y"}, %r16
3519iaw_startwait@{"%y"}_$label:
3520 cas [%r23],%g0,%r16 !lock
3521 brz,a %r16, continue_iaw_@{"%y"}_$label
3522%}
3523%asm<th_tgml2>{
3524 mov (~0x@{"%y"}&0xf), %r16
3525%}
3526%asm<th_tgmh2>{
3527 mov (~0x@{"%y"}&0xf0), %r16
3528%}
3529%asm<th_tgm2>{
3530 ld [%r23], %r16
3531iaw_wait@{"%y"}_$label:
3532 brnz %r16, iaw_wait@{"%y"}_$label
3533 ld [%r23], %r16
3534 ba iaw_startwait@{"%y"}_$label
3535 mov 0x@{"%y"}, %r16
3536continue_iaw_@{"%y"}_$label:
3537 sllx %r16, %r8, %r16 !Mask for my core only
3538 ldxa [0x58]%asi, %r17 !Running_status
3539wait_for_stat_@{"%y"}_$label:
3540 ldxa [0x50]%asi, %r13 !Running_rw
3541 cmp %r13, %r17
3542 bne,a %xcc, wait_for_stat_@{"%y"}_$label
3543 ldxa [0x58]%asi, %r17 !Running_status
3544 stxa %r16, [0x68]%asi !Park (W1C)
3545 ldxa [0x50]%asi, %r14 !Running_rw
3546wait_for_iaw_@{"%y"}_$label:
3547 ldxa [0x58]%asi, %r17 !Running_status
3548 cmp %r14, %r17
3549 bne,a %xcc, wait_for_iaw_@{"%y"}_$label
3550 ldxa [0x50]%asi, %r14 !Running_rw
3551iaw_doit@{"%y"}_$label:
3552%}
3553 IJ_printf(th_tgm2, "\tmov 0x38, %%r18\n");
3554 switch (label&0x7) {
3555 case 0:
3556 IJ_printf(th_tgm2, "iaw0_%y_%d:\n", label);
3557 IJ_printf(th_tgm2, "\trd %%pc, %%r19\n");
3558 IJ_set_rvar(Rv_offset,"{1:3,5,9}");
3559 IJ_printf(th_tgm2, "\tadd %%r19, (16+%rd), %%r19\n", Rv_offset);
3560 IJ_set_rvar(Rv_offset,"6'brrr000");
3561 break;
3562 case 1:
3563 case 2:
3564 case 3:
3565 IJ_printf(th_tgm2, "iaw1_%y_%d:\n", label);
3566 IJ_printf(th_tgm2, "\tbest_set_reg(0x%016llrx, %%r20, %%r19)\n",Rv_jmptr);
3567 IJ_printf(th_tgm2, "\tor %%r19, 0x1, %%r19\n");
3568 break;
3569 case 4:
3570 IJ_printf(th_tgm2, "iaw2_%y_%d:\n", label);
3571 IJ_printf(th_tgm2, "\trdpr %%tba, %%r19\n");
3572 IJ_printf(th_tgm2, "\tmov 0x%rx, %%r20\n", Rv_tt);
3573 IJ_printf(th_tgm2, "\tsllx %%r20, 5, %%r20\n");
3574 IJ_printf(th_tgm2, "\tadd %%r20, %%r19, %%r19\n");
3575 break;
3576 case 5:
3577 IJ_printf(th_tgm2, "iaw3_%y_%d:\n", label);
3578 IJ_printf(th_tgm2, "\tsetx vahole_target%d, %%r20, %%r19\n",IJ_random()&0x1);
3579 IJ_printf(th_tgm2, "\tor %%r19, 0x1, %%r19\n");
3580 break;
3581 case 6:
3582 case 7:
3583 IJ_printf(th_tgm2, "iaw4_%y_%d:\n", label);
3584 IJ_printf(th_tgm2, "\tsetx common_target, %%r20, %%r19\n");
3585 IJ_printf(th_tgm2, "\tor %%r19, 0x1, %%r19\n");
3586 break;
3587 }
3588 IJ_printf(th_tgm2, "\tstxa %%r19, [%%r18]0x50\n");
3589
3590%asm<th_tgm2>{
3591 stxa %r16, [0x60] %asi ! Unpark (W1S)
3592 st %g0, [%r23] !clear lock
3593 wr %r0, %r12, %asi ! restore %asi
3594%}
3595 IJ_printf(th_tgm2, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3596 label++;
3597} // }}}
3598 | uBLK5 %ropr Ro_blksts
3599 { // {{{
3600 IJ_printf(th_tgm2, "iaw_%y_%d:\n\tnop\n\tnop\n", label);
3601 IJ_printf(th_tgm2, "\tta T_CHANGE_HPRIV\n");
3602
3603%asm<th_tgm2>{
3604 mov 8, %r18
3605 rd %asi, %r12
3606 wr %r0, 0x41, %asi
3607 set sync_thr_counter4, %r23
3608#ifndef SPC
3609 ldxa [%g0]0x63, %r8
3610 and %r8, 0x38, %r8 ! Core ID
3611#ifndef PORTABLE_CORE
3612 add %r8, %r23, %r23
3613#endif
3614#else
3615 mov 0, %r8
3616#endif
3617 mov 0x@{"%y"}, %r16
3618iaw_startwait@{"%y"}_$label:
3619 cas [%r23],%g0,%r16 !lock
3620 brz,a %r16, continue_iaw_@{"%y"}_$label
3621%}
3622%asm<th_tgml2>{
3623 mov (~0x@{"%y"}&0xf), %r16
3624%}
3625%asm<th_tgmh2>{
3626 mov (~0x@{"%y"}&0xf0), %r16
3627%}
3628%asm<th_tgm2>{
3629 ld [%r23], %r16
3630iaw_wait@{"%y"}_$label:
3631 brnz %r16, iaw_wait@{"%y"}_$label
3632 ld [%r23], %r16
3633 ba iaw_startwait@{"%y"}_$label
3634 mov 0x@{"%y"}, %r16
3635continue_iaw_@{"%y"}_$label:
3636 sllx %r16, %r8, %r16 !Mask for my core only
3637 ldxa [0x58]%asi, %r17 !Running_status
3638wait_for_stat_@{"%y"}_$label:
3639 ldxa [0x50]%asi, %r13 !Running_rw
3640 cmp %r13, %r17
3641 bne,a %xcc, wait_for_stat_@{"%y"}_$label
3642 ldxa [0x58]%asi, %r17 !Running_status
3643 stxa %r16, [0x68]%asi !Park (W1C)
3644 ldxa [0x50]%asi, %r14 !Running_rw
3645wait_for_iaw_@{"%y"}_$label:
3646 ldxa [0x58]%asi, %r17 !Running_status
3647 cmp %r14, %r17
3648 bne,a %xcc, wait_for_iaw_@{"%y"}_$label
3649 ldxa [0x50]%asi, %r14 !Running_rw
3650iaw_doit@{"%y"}_$label:
3651%}
3652 IJ_printf(th_tgm2, "\tmov 0x38, %%r18\n");
3653 switch (label&0x7) {
3654 case 0:
3655 IJ_printf(th_tgm2, "iaw0_%y_%d:\n", label);
3656 IJ_printf(th_tgm2, "\trd %%pc, %%r19\n");
3657 IJ_set_rvar(Rv_offset,"{1:3,5,9}");
3658 IJ_printf(th_tgm2, "\tadd %%r19, (16+%rd), %%r19\n", Rv_offset);
3659 IJ_set_rvar(Rv_offset,"6'brrr000");
3660 break;
3661 case 1:
3662 case 2:
3663 case 3:
3664 IJ_printf(th_tgm2, "iaw1_%y_%d:\n", label);
3665 IJ_printf(th_tgm2, "\tbest_set_reg(0x%016llrx, %%r20, %%r19)\n",Rv_jmptr);
3666 IJ_printf(th_tgm2, "\tor %%r19, 0x1, %%r19\n");
3667 break;
3668 case 4:
3669 IJ_printf(th_tgm2, "iaw2_%y_%d:\n", label);
3670 IJ_printf(th_tgm2, "\trdpr %%tba, %%r19\n");
3671 IJ_printf(th_tgm2, "\tmov 0x%rx, %%r20\n", Rv_tt);
3672 IJ_printf(th_tgm2, "\tsllx %%r20, 5, %%r20\n");
3673 IJ_printf(th_tgm2, "\tadd %%r20, %%r19, %%r19\n");
3674 break;
3675 case 5:
3676 IJ_printf(th_tgm2, "iaw3_%y_%d:\n", label);
3677 IJ_printf(th_tgm2, "\tsetx vahole_target%d, %%r20, %%r19\n",IJ_random()&0x1);
3678 IJ_printf(th_tgm2, "\tor %%r19, 0x1, %%r19\n");
3679 break;
3680 case 6:
3681 case 7:
3682 IJ_printf(th_tgm2, "iaw4_%y_%d:\n", label);
3683 IJ_printf(th_tgm2, "\tsetx common_target, %%r20, %%r19\n");
3684 IJ_printf(th_tgm2, "\tor %%r19, 0x1, %%r19\n");
3685 break;
3686 }
3687 IJ_printf(th_tgm2, "\tstxa %%r19, [%%r18]0x50\n");
3688
3689%asm<th_tgm2>{
3690 stxa %r16, [0x60] %asi ! Unpark (W1S)
3691 st %g0, [%r23] !clear lock
3692 wr %r0, %r12, %asi ! restore %asi
3693%}
3694 IJ_printf(th_tgm2, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3695 label++;
3696} // }}}
3697 | uDBG6 %ropr Ro_ldst_ptr
3698 { // {{{
3699 IJ_printf(th_tgm2, "iaw_%y_%d:\n\tnop\n\tnop\n", label);
3700 IJ_printf(th_tgm2, "\tta T_CHANGE_HPRIV\n");
3701
3702%asm<th_tgm2>{
3703 mov 8, %r18
3704 rd %asi, %r12
3705 wr %r0, 0x41, %asi
3706 set sync_thr_counter4, %r23
3707#ifndef SPC
3708 ldxa [%g0]0x63, %r8
3709 and %r8, 0x38, %r8 ! Core ID
3710#ifndef PORTABLE_CORE
3711 add %r8, %r23, %r23
3712#endif
3713#else
3714 mov 0, %r8
3715#endif
3716 mov 0x@{"%y"}, %r16
3717iaw_startwait@{"%y"}_$label:
3718 cas [%r23],%g0,%r16 !lock
3719 brz,a %r16, continue_iaw_@{"%y"}_$label
3720%}
3721%asm<th_tgml2>{
3722 mov (~0x@{"%y"}&0xf), %r16
3723%}
3724%asm<th_tgmh2>{
3725 mov (~0x@{"%y"}&0xf0), %r16
3726%}
3727%asm<th_tgm2>{
3728 ld [%r23], %r16
3729iaw_wait@{"%y"}_$label:
3730 brnz %r16, iaw_wait@{"%y"}_$label
3731 ld [%r23], %r16
3732 ba iaw_startwait@{"%y"}_$label
3733 mov 0x@{"%y"}, %r16
3734continue_iaw_@{"%y"}_$label:
3735 sllx %r16, %r8, %r16 !Mask for my core only
3736 ldxa [0x58]%asi, %r17 !Running_status
3737wait_for_stat_@{"%y"}_$label:
3738 ldxa [0x50]%asi, %r13 !Running_rw
3739 cmp %r13, %r17
3740 bne,a %xcc, wait_for_stat_@{"%y"}_$label
3741 ldxa [0x58]%asi, %r17 !Running_status
3742 stxa %r16, [0x68]%asi !Park (W1C)
3743 ldxa [0x50]%asi, %r14 !Running_rw
3744wait_for_iaw_@{"%y"}_$label:
3745 ldxa [0x58]%asi, %r17 !Running_status
3746 cmp %r14, %r17
3747 bne,a %xcc, wait_for_iaw_@{"%y"}_$label
3748 ldxa [0x50]%asi, %r14 !Running_rw
3749iaw_doit@{"%y"}_$label:
3750%}
3751 IJ_printf(th_tgm2, "\tmov 0x38, %%r18\n");
3752 switch (label&0x7) {
3753 case 0:
3754 IJ_printf(th_tgm2, "iaw0_%y_%d:\n", label);
3755 IJ_printf(th_tgm2, "\trd %%pc, %%r19\n");
3756 IJ_set_rvar(Rv_offset,"{1:3,5,9}");
3757 IJ_printf(th_tgm2, "\tadd %%r19, (16+%rd), %%r19\n", Rv_offset);
3758 IJ_set_rvar(Rv_offset,"6'brrr000");
3759 break;
3760 case 1:
3761 case 2:
3762 case 3:
3763 IJ_printf(th_tgm2, "iaw1_%y_%d:\n", label);
3764 IJ_printf(th_tgm2, "\tbest_set_reg(0x%016llrx, %%r20, %%r19)\n",Rv_jmptr);
3765 IJ_printf(th_tgm2, "\tor %%r19, 0x1, %%r19\n");
3766 break;
3767 case 4:
3768 IJ_printf(th_tgm2, "iaw2_%y_%d:\n", label);
3769 IJ_printf(th_tgm2, "\trdpr %%tba, %%r19\n");
3770 IJ_printf(th_tgm2, "\tmov 0x%rx, %%r20\n", Rv_tt);
3771 IJ_printf(th_tgm2, "\tsllx %%r20, 5, %%r20\n");
3772 IJ_printf(th_tgm2, "\tadd %%r20, %%r19, %%r19\n");
3773 break;
3774 case 5:
3775 IJ_printf(th_tgm2, "iaw3_%y_%d:\n", label);
3776 IJ_printf(th_tgm2, "\tsetx vahole_target%d, %%r20, %%r19\n",IJ_random()&0x1);
3777 IJ_printf(th_tgm2, "\tor %%r19, 0x1, %%r19\n");
3778 break;
3779 case 6:
3780 case 7:
3781 IJ_printf(th_tgm2, "iaw4_%y_%d:\n", label);
3782 IJ_printf(th_tgm2, "\tsetx common_target, %%r20, %%r19\n");
3783 IJ_printf(th_tgm2, "\tor %%r19, 0x1, %%r19\n");
3784 break;
3785 }
3786 IJ_printf(th_tgm2, "\tstxa %%r19, [%%r18]0x50\n");
3787
3788%asm<th_tgm2>{
3789 stxa %r16, [0x60] %asi ! Unpark (W1S)
3790 st %g0, [%r23] !clear lock
3791 wr %r0, %r12, %asi ! restore %asi
3792%}
3793 IJ_printf(th_tgm2, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3794 label++;
3795} // }}}
3796
3797;
3798dvapa : uDBG7
3799 { // {{{
3800 IJ_printf(th_all, "dvapa_%y_%d:\n\tnop\n\tnop\n", label);
3801 IJ_printf(th_all, "\tta T_CHANGE_HPRIV\n");
3802 IJ_printf(th_all, "\tmov 0x%rx, %%r20\n", Rv_dvaw_lsucntl);
3803 IJ_printf(th_all, "\tmov 0x%rx, %%r19\n", Rv_intdest);
3804 IJ_printf(th_all, "\tsllx %%r20, 23, %%r20\n");
3805 IJ_printf(th_all, "\tor %%r19, %%r20, %%r19\n");
3806 IJ_printf(th_all, "\tstxa %%r19, [%%g0] ASI_LSU_CONTROL\n");
3807 IJ_printf(th_all, "\tmov 0x38, %%r18\n");
3808 IJ_printf(th_all, "\tstxa %%r31, [%%r18]0x58\n");
3809 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3810 label++;
3811 } // }}}
3812 | uBLK8 %ropr Ro_blksts
3813 { // {{{
3814 IJ_printf(th_all, "dvapa_%y_%d:\n\tnop\n\tnop\n", label);
3815 IJ_printf(th_all, "\tta T_CHANGE_HPRIV\n");
3816 IJ_printf(th_all, "\tmov 0x%rx, %%r20\n", Rv_dvaw_lsucntl);
3817 IJ_printf(th_all, "\tmov 0x%rx, %%r19\n", Rv_intdest);
3818 IJ_printf(th_all, "\tsllx %%r20, 23, %%r20\n");
3819 IJ_printf(th_all, "\tor %%r19, %%r20, %%r19\n");
3820 IJ_printf(th_all, "\tstxa %%r19, [%%g0] ASI_LSU_CONTROL\n");
3821 IJ_printf(th_all, "\tmov 0x38, %%r18\n");
3822 IJ_printf(th_all, "\tstxa %%r31, [%%r18]0x58\n");
3823 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3824 label++;
3825 } // }}}
3826 | uDBG9 %ropr Ro_ldst_ptr
3827 { // {{{
3828 IJ_printf(th_all, "dvapa_%y_%d:\n\tnop\n\tnop\n", label);
3829 IJ_printf(th_all, "\tta T_CHANGE_HPRIV\n");
3830 IJ_printf(th_all, "\tmov 0x%rx, %%r20\n", Rv_dvaw_lsucntl);
3831 IJ_printf(th_all, "\tmov 0x%rx, %%r19\n", Rv_intdest);
3832 IJ_printf(th_all, "\tsllx %%r20, 23, %%r20\n");
3833 IJ_printf(th_all, "\tor %%r19, %%r20, %%r19\n");
3834 IJ_printf(th_all, "\tstxa %%r19, [%%g0] ASI_LSU_CONTROL\n");
3835 IJ_printf(th_all, "\tmov 0x38, %%r18\n");
3836 IJ_printf(th_all, "\tstxa %%r31, [%%r18]0x58\n");
3837 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3838 label++;
3839 } // }}}
3840;
3841mondo: tWRPR_WSTATE_R
3842 {
3843 IJ_printf(th_all, "mondo_%y_%d:\n\tnop\n\tnop\n", label);
3844 IJ_generate_from_token(1, th_all, Ro_q_asi, tWRASI_I);
3845 if(IJ_random()&0x1)
3846 IJ_printf(th_all, "\tta T_CHANGE_PRIV\n");
3847%asm<th_all>{
3848 stxa %r@ijdefault.Ft_Rs1, [%r0+@Ro_q_va.Ft_Simm13] %asi
3849%}
3850%asm<th_rand3>{
3851 stxa %r@ijdefault.Ft_Rs1, [%r0+@Ro_q_va.Ft_Simm13] %asi
3852%}
3853 IJ_generate_from_token(1, th_rand2, Ro_wrasi_i, tWRASI_I);
3854 IJ_generate_from_token(1, th_rand2n, Ro_wrasi_i, tWRASI_I);
3855 label++;
3856 }
3857;
3858
3859intvec: uDIFFD
3860 {
3861 int have_ue = 0;
3862
3863 int j;
3864 for(j=0; j<8; j++) {
3865 if (thall & (1<<j)) {
3866 IJ_bind_thread_group(ivt_grp, 1<<j);
3867 IJ_update_rvar(Rv_intdisvec);
3868 IJ_set_rvar(Rv_offset,"10'b1r1rrrr000");
3869 IJ_set_rvar(Rv_mask,"8'hrr");
3870 IJ_update_rvar(Rv_mask);
3871 int targ_mask = IJ_get_rvar_val32(Rv_mask) | (thall & (1<<j));
3872 if (label%2) {
3873 int my_thid=0;
3874 IJ_printf(ivt_grp, "\tnop\n\tnop\n\tset 0x%x, %%r28", IJ_get_rvar_val32(Rv_intdisvec));
3875 IJ_printf(ivt_grp,"\t!TTID : %d (mask2tid(0x%y))\n", (IJ_get_rvar_val32(Rv_intdisvec)&0x700)>>8);
3876 IJ_printf(ivt_grp, "#if (defined PORTABLE_CORE || MAX_THREADS == 8)\n");
3877 IJ_printf(ivt_grp, "\tsethi %%hi(0x3800), %%r27\n\tandn %%r28, %%r27, %%r28\n");
3878 IJ_printf(ivt_grp, "#ifdef PORTABLE_CORE\n\t! Add CID to vector\n");
3879 IJ_printf(ivt_grp, "\tta T_CHANGE_HPRIV\n");
3880 IJ_printf(ivt_grp, "\tldxa [%%g0]0x63, %%r27\n\tsllx %%r27, 8, %%r27\n");
3881 IJ_printf(ivt_grp, "\tor %%r27, %%r28, %%r28 \n#endif\n");
3882 if(IJ_random()&0x1)
3883 IJ_printf(ivt_grp, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3884 IJ_printf(ivt_grp, "#endif\n");
3885 IJ_printf(ivt_grp, "\tsethi %%hi(0x30000), %%r27\n");
3886 IJ_printf(ivt_grp, "\tandn %%r28, %%r27, %%r28\n");
3887 if(label&0x1) {
3888 IJ_printf(ivt_grp, "\tta T_CHANGE_HPRIV\n");
3889 }
3890 IJ_printf(ivt_grp, "ifelse(%d,mask2tid(0x%y),`.align 16')\n" , (IJ_get_rvar_val32(Rv_intdisvec)&0x700)>>8);
3891 IJ_printf(ivt_grp, "\tstxa %%r28, [%%g0] 0x73\n");
3892 } else {
3893 have_ue = 1;
3894 IJ_printf(ivt_grp, "#if (defined SPC || defined CMP1)\n" );
3895 IJ_printf(ivt_grp, "!$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_%y_%d) , 16, 16)) -> intp(%rd,0,%rd,*,%rd,*,%x,1)\n", label, Rv_tid, Rv_intdest,Rv_offset, targ_mask);
3896 IJ_printf(ivt_grp, "!$EV trig_pc_d(1, expr((@VA(.MAIN.intvec_%y_%d)&0xffffffff) , 16, 16)) -> intp(%rd,0,%rd,*,%rd,*,%x,1)\n", label, Rv_tid, Rv_intdest, Rv_offset, targ_mask);
3897 IJ_printf(ivt_grp, "#else\n" );
3898 IJ_printf(ivt_grp, "\tnop\n\tnop\n\tset 0x%x, %%r28", IJ_get_rvar_val32(Rv_intdisvec));
3899 IJ_printf(ivt_grp,"\t!TTID : %d (mask2tid(0x%y))\n", (IJ_get_rvar_val32(Rv_intdisvec)&0x700)>>8);
3900 IJ_printf(ivt_grp, "#if (defined PORTABLE_CORE || MAX_THREADS == 8)\n");
3901 IJ_printf(ivt_grp, "\tsethi %%hi(0x3800), %%r27\n\tandn %%r28, %%r27, %%r28\n");
3902 IJ_printf(ivt_grp, "#ifdef PORTABLE_CORE\n\t! Add CID to vector\n");
3903 IJ_printf(ivt_grp, "\tta T_CHANGE_HPRIV\n");
3904 IJ_printf(ivt_grp, "\tldxa [%%g0]0x63, %%r27\n\tsllx %%r27, 8, %%r27\n");
3905 IJ_printf(ivt_grp, "\tor %%r27, %%r28, %%r28 \n#endif\n");
3906 if(IJ_random()&0x1)
3907 IJ_printf(ivt_grp, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3908 IJ_printf(ivt_grp, "#endif\n");
3909
3910 IJ_printf(ivt_grp, "\tstxa %%r28, [%%g0] 0x73\n");
3911 IJ_printf(ivt_grp, "#endif\n" );
3912 }
3913 if(IJ_random()&0x1) {
3914 IJ_generate_from_token(1, ivt_grp, ijdefault, uDIFFD);
3915 }
3916 IJ_printf(ivt_grp, "intvec_%y_%d:\n", label);
3917 if (IJ_random()&0x1) {
3918 if (have_ue) {
3919 IJ_printf(ivt_grp, "#if (defined SPC || defined CMP1)\n" );
3920 IJ_printf(ivt_grp, "\twrhpr %%g0, 0x0, %%halt ! HALT\n");
3921 IJ_printf(ivt_grp, "#else\n" );
3922 IJ_printf(ivt_grp, "ifelse(%d,mask2tid(0x%y),`wrhpr %%g0, 0x0, %%halt ! HALT')\n" , (IJ_get_rvar_val32(Rv_intdisvec)&0x700)>>8);
3923 IJ_printf(ivt_grp, "#endif\n" );
3924 }
3925 }
3926 if(!have_ue) {
3927 //IJ_printf(th_all, "ifelse(%d,mask2tid(0x%y),`wrhpr %%g0, 0x0, %%halt ! HALT')\n" , (IJ_get_rvar_val32(Rv_intdisvec)&0x700)>>8);
3928 }
3929 }
3930 }
3931 IJ_set_rvar(Rv_offset,"6'brrr000");
3932 label++;
3933 }
3934;
3935
3936intveclr: tFBPLG
3937 {
3938 IJ_printf(th_all, "intveclr_%y_%d:\n\tnop\n\tnop\n", label);
3939 IJ_printf(th_all, "\tta T_CHANGE_HPRIV\n");
3940 IJ_printf(th_all, "\tsetx 0x%016llrx, %%r1, %%r28\n", Rv_rand_64);
3941 IJ_printf(th_all, "\tstxa %%r28, [%%g0] 0x72\n");
3942 if(IJ_random()&0x1)
3943 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
3944 label++;
3945 }
3946;
3947
3948xir: tWR_CLEAR_SOFTINT_I
3949 {
3950 IJ_set_rvar(Rv_offset,"10'b1r1rrrr000");
3951 IJ_printf(th_all, "#if (defined SPC || defined CMP)\n" );
3952 IJ_printf(th_all, "!$EV trig_pc_d(1, expr(@VA(.MAIN.xir_%y_%d), 16, 16)) -> intp(mask2tid(0x%y),1,3,*,%rd,*,*,1)\n", label, Rv_offset);
3953 IJ_printf(th_all, "!$EV trig_pc_d(1, expr((@VA(.MAIN.xir_%y_%d)&0xffffffff), 16, 16)) -> intp(mask2tid(0x%y),1,3,*,%rd,*,*,1)\n", label, Rv_offset);
3954 IJ_printf(th_all, "xir_%y_%d:\n", label);
3955 if (IJ_random()&0x1) {
3956 IJ_printf(th_all, "\twrhpr %%g0, 0x0, %%halt ! HALT\n");
3957 }
3958 IJ_printf(th_all, "#else\n#if (defined FC)\n" );
3959 IJ_printf(th_all, "!! Generate XIR via RESET_GEN register\n");
3960 IJ_printf(th_all, "\tnop\n\tnop\n\tta T_CHANGE_HPRIV\n");
3961 IJ_printf(th_all, "\trdpr %%pstate, %%r18\n");
3962 IJ_printf(th_all, "\tandn %%r18, 0x208, %%r18 ! Reset pstate.am,cle\n");
3963 IJ_printf(th_all, "\twrpr %%r18, %%pstate\n");
3964 IJ_printf(th_all, "#ifndef XIR_RND_CORES\n");
3965 IJ_printf(th_all, "\tldxa [%%g0] 0x63, %%o1\n");
3966 IJ_printf(th_all, "\tmov 1, %%r18\n");
3967 IJ_printf(th_all, "\tsllx %%r18, %%o1, %%r18\n");
3968 IJ_printf(th_all, "#endif\n");
3969 IJ_printf(th_all, "\tmov 0x30, %%r19\n");
3970 IJ_printf(th_all, "\tsetx 0x8900000808, %%r16, %%r17\n");
3971 IJ_printf(th_all, "\tmov 0x2, %%r16\n");
3972 IJ_printf(th_all, "!! Poll RESET gen to see if no XIRs pending\n");
3973 IJ_printf(th_all, "\tldx [%%r17], %%r20\n");
3974 IJ_printf(th_all, "xirwait_%y_%d:\n", label);
3975 IJ_printf(th_all, "\tand %%r20, 2, %%r20\n");
3976 IJ_printf(th_all, "\tbrnz,a %%r20, xirwait_%y_%d\n",label);
3977 IJ_printf(th_all, "\tldx [%%r17], %%r20\n");
3978 IJ_printf(th_all, "xir_%y_%d:\n", label);
3979 IJ_printf(th_all, "\tstxa %%r18, [%%r19] 0x41\n");
3980 IJ_printf(th_all, "\tstx %%r16, [%%r17]\n");
3981 IJ_printf(th_all, "#endif\n#endif\n" );
3982 label++;
3983 IJ_set_rvar(Rv_offset,"6'brrr000");
3984 }
3985;
3986
3987
3988sir : tSIR {
3989 IJ_generate_from_token(1, th_rand, Ro_ldst_ptr, uDIFF1, uDBG1, uDBG9);
3990}
3991;
3992demap : uLDD_I %ropr Ro_nontrap_ld
3993 {
3994 IJ_printf(th_all, "demap_%y_%d:\n", label);
3995 IJ_set_rvar(Rv_demap, "{0x57, 0x5f}");
3996 IJ_printf(th_all, "\tnop\n\tmov 0x80, %%g3\n");
3997 IJ_printf(th_all, "\tta T_CHANGE_HPRIV\n", Rv_lsucntl);
3998 if (IJ_random()&0x1) {
3999 IJ_printf(th_rand2, "\tstxa %%r%rd, [%%r0] ASI_LSU_CONTROL\n",Rv_randreg);
4000 } else {
4001 IJ_generate_from_token(1, th_all, ijdefault, uBR);
4002 }
4003#ijifdef TH_STRESS
4004 int dloop = IJ_random()&0x7;
4005 int i;
4006 for (i= 0; i <=dloop; i++) {
4007 IJ_printf(th_all, "\tstxa %%g3, [%%g3] 0x%rx\n", Rv_demap);
4008 int num = IJ_random()&0x3;
4009 IJ_generate_from_token(num, th_rand3, Ro_save_restore, uSRW);
4010 IJ_generate_from_token(num, th_rand3n, Ro_blksts, uBLK5);
4011 }
4012#ijelse
4013 IJ_printf(th_all, "\tstxa %%g3, [%%g3] 0x%rx\n", Rv_demap);
4014 int num = IJ_random()&0x3;
4015 IJ_generate_from_token(num, th_rand3, Ro_save_restore, uSRW);
4016#ijendif
4017 IJ_printf(th_all, "\twrhpr %%g0, 0x%rx, %%hpstate ! ta T_CHANGE_NONHPRIV\n",Rv_wrhp_nonhp);
4018 label++;
4019 }
4020;
4021
4022tagged: tLDUW_I %ropr Ro_nontrap_ld
4023 {
4024 IJ_printf(th_all, "tagged_%y_%d:\n", label);
4025 IJ_set_rvar(Rv_tof_r, "{0..13,16..20}");
4026 IJ_set_rvar(Rv_tof_i, "13'b1rrrrrrrrrrrr");
4027 if (label%2) {
4028 IJ_printf(th_all, "\ttaddcctv %%r%rd, 0x%rx, %%r%rd\n",
4029 Rv_tof_r, Rv_tof_i, Rv_tof_r);
4030 } else {
4031 IJ_printf(th_all, "\ttsubcctv %%r%rd, 0x%rx, %%r%rd\n",
4032 Rv_tof_r, Rv_tof_i, Rv_tof_r);
4033 }
4034 label++;
4035 }
4036;
4037
4038change_mode :
4039 reduce_priv_level %rvar wt_high
4040 | change_to_randtl %rvar wt_med
4041;
4042
4043
4044
4045reduce_priv_level: tCHANGE_NONPRIV
4046 {
4047
4048 IJ_set_ropr_fld(Ro_tl, Ft_Simm13, "{0:2,1}");
4049 IJ_generate_from_token(1, th_all, Ro_tl, tWRPR_TL_I);
4050 IJ_printf(th_all, "reduce_priv_lvl_%y_%d:\n", label);
4051 label++;
4052 }
4053 | tCHANGE_NONHPRIV
4054 {
4055
4056 IJ_set_ropr_fld(Ro_tl, Ft_Simm13, "{0:2,1}");
4057 IJ_generate_from_token(1, th_all, Ro_tl, tWRPR_TL_I);
4058 IJ_printf(th_all, "reduce_priv_lvl_%y_%d:\n", label);
4059 label++;
4060 }
4061;
4062
4063change_to_randtl: tWRPR_TL_I %ropr Ro_tl
4064 {
4065 IJ_printf(th_all, "change_to_randtl_%y_%d:\n", label);
4066 if (IJ_random()&0x1) {
4067#ijifndef LOWTL
4068 IJ_set_ropr_fld(Ro_tl, Ft_Simm13, "{0:3,1..2}");
4069#ijelse
4070 IJ_set_ropr_fld(Ro_tl, Ft_Simm13, "{0,1}");
4071#ijendif
4072 IJ_generate_from_token(1, th_all, ijdefault, tCHANGE_HPRIV);
4073 } else {
4074 IJ_generate_from_token(1, th_all, ijdefault, tCHANGE_PRIV);
4075 }
4076 IJ_printf(th_all, "done_change_to_randtl_%y_%d:\n", label);
4077 label++;
4078 }
4079;
4080
4081trap_asr :
4082 tRDPR_TPC
4083 | tRDPR_TSTATE
4084 | tRDPR_TT
4085 //| tRDPR_TBA
4086 //| tRDPR_TL
4087 | tRDPR_GL
4088 //| tRDHPR_HTBA
4089 | tRDHPR_HPSTATE
4090 | tRD_TICK_CMPR_REG
4091 | tRD_STICK_CMPR_REG
4092 | tRD_STICK_REG %ropr Ro_rd0
4093 | tRDPR_TICK %ropr Ro_rd0
4094 | tRDPR_PIL
4095 | tWRPR_PIL_I
4096 | tRD_CLEAR_SOFTINT
4097 | tRD_SET_SOFTINT
4098 | tWR_CLEAR_SOFTINT_R
4099 //| tWR_CLEAR_SOFTINT_I
4100 //| tWRHPR_HINTP_R
4101 //| tWRHPR_HINTP_I
4102 | tRDHPR_HINTP
4103 //| tWR_SET_SOFTINT_R
4104 //| tWR_SOFTINT_REG_I
4105 | tWR_STICK_REG_R
4106;
4107
4108splash_lsucnt: tFBPULE
4109 {
4110 IJ_printf(th_all, "splash_lsu_%y_%d:\n\tnop\n\tnop\n", label);
4111 IJ_printf(th_all, "\tta T_CHANGE_HPRIV\n", Rv_lsucntl);
4112 IJ_printf(th_all, "\tset 0x%08llrx, %%r2\n", Rv_lsucntl);
4113 IJ_printf(th_all, "\tmov 0x%rx, %%r1\n", Rv_lsucntl2);
4114 IJ_printf(th_all, "\tsllx %%r1, 32, %%r1\n");
4115 IJ_printf(th_all, "\tor %%r1, %%r2, %%r2\n");
4116 if (IJ_random()&0x1)
4117 IJ_generate_from_token(1, th_all, ijdefault, uBR);
4118 IJ_printf(th_all, "\tstxa %%r2, [%%r0] ASI_LSU_CONTROL\n");
4119 if (IJ_random()&0x1)
4120 IJ_printf(th_all, "\tta T_CHANGE_NONHPRIV\n", Rv_lsucntl);
4121 label++;
4122 }
4123;
4124
4125splash_decr: tWR_GRAPHICS_STATUS_REG_R
4126 {
4127%asm<th_rand>{
4128splash_decr_@{"%y"}_$label:
4129 nop
4130 ta T_CHANGE_HPRIV
4131 mov 8, %r1
4132 stxa %r@Rv_randreg, [%r1] 0x45
4133%}
4134 label++;
4135 }
4136;
4137
4138splash_tba: tWRPR_TBA_R %ropr Ro_tba
4139 {
4140 IJ_printf(th_all, "splash_tba_%y_%d:\n\tnop\n", label);
4141 IJ_printf(th_all, "\tta T_CHANGE_PRIV\n");
4142 if (IJ_random()&0x1) {
4143 IJ_printf(th_all, "\tsetx 0x%016llrx, %%r11, %%r12\n", Rv_tba);
4144 } else {
4145 IJ_printf(th_all, "\tset 0x120000, %%r12\n");
4146 }
4147 label++;
4148 }
4149;
4150splash_htba: tWRHPR_HTBA_R %ropr Ro_tba
4151 {
4152 IJ_printf(th_all, "splash_htba_%y_%d:\n\tnop\n", label);
4153 IJ_printf(th_all, "\tta T_CHANGE_HPRIV\n");
4154 if (IJ_random()&0x1) {
4155 IJ_printf(th_all, "\tsetx 0x%016llrx, %%r11, %%r12\n", Rv_htba);
4156 } else {
4157 IJ_printf(th_all, "\tbest_set_reg(HV_TRAP_BASE_PA, %%r11,%%r12)\n");
4158 }
4159 label++;
4160 }
4161;
4162
4163splash_cmpr: tSIAM
4164 {
4165 IJ_printf(th_all, "\tnop\n\tnop\n");
4166 int hpriv = IJ_random()&0x1;
4167 if (hpriv == 1) {
4168 IJ_printf(th_all, "\tta T_CHANGE_HPRIV\n");
4169 }
4170 int j;
4171 for(j=0; j<8; j++) {
4172 if (thall & (1<<j)) {
4173 IJ_bind_thread_group(cmpr_grp, 1<<j);
4174 IJ_update_rvar(Rv_nintdis);
4175 IJ_set_rvar(Rv_mask,"8'hrr");
4176 IJ_update_rvar(Rv_mask);
4177 int targ_mask = IJ_get_rvar_val32(Rv_mask) | (thall & (1<<j));
4178 IJ_printf(cmpr_grp, "\tmov 0x%x, %%r11\n", IJ_get_rvar_val32(Rv_nintdis));
4179%asm<cmpr_grp>{
4180splash_cmpr_@{"%y"}_$label:
4181 sllx %r11, 63, %r11
4182 not %r11, %r11
4183 rd %tick, %r10
4184#if (defined SPC || defined CMP1)
4185 add %r10, @Rv_cmpr, %r10
4186#else
4187 add %r10, @Rv_fcmpr, %r10
4188#endif
4189 and %r10, %r11, %r10
4190%}
4191 if (hpriv == 1) {
4192 IJ_printf(cmpr_grp, "\twrhpr %%r10, %%g0, %%hsys_tick_cmpr\n");
4193 if (IJ_get_rvar_val32(Rv_nintdis)) {
4194 IJ_printf(cmpr_grp, "\twrhpr %%g0, 0x0, %%halt ! HALT\n");
4195 }
4196 }
4197 if (!(IJ_random()%3)) {
4198 IJ_printf(cmpr_grp, "\tta T_CHANGE_PRIV\n");
4199 }
4200 IJ_printf(cmpr_grp, "\trd %%tick, %%r10\n");
4201 IJ_printf(cmpr_grp, "#if (defined SPC || defined CMP1)\n" );
4202 IJ_printf(cmpr_grp, "\tadd %%r10, 0x%rx, %%r10\n", Rv_cmpr);
4203 IJ_printf(cmpr_grp, "#else\n");
4204 IJ_printf(cmpr_grp, "\tadd %%r10, 0x%rx, %%r10\n", Rv_fcmpr);
4205 IJ_printf(cmpr_grp, "#endif\n");
4206 IJ_printf(cmpr_grp, "\tand %%r10, %%r11, %%r10\n");
4207 IJ_generate_from_token(1, cmpr_grp, Ro_cmpr, uCMPR);
4208 if (IJ_get_rvar_val32(Rv_nintdis) == 1) {
4209 IJ_set_rvar(Rv_offset,"10'b1r1rrrr000");
4210 IJ_printf(cmpr_grp, "#if (defined SPC || defined CMP1)\n" );
4211 IJ_printf(cmpr_grp, "!$EV trig_pc_d(1, expr(@VA(.MAIN.splash_cmpr_%y_%d)+8 , 16, 16)) -> intp(%rd,0,%rd,*,%rd,*,%x,1)\n", label, Rv_tid, Rv_intdest,Rv_offset, targ_mask);
4212 IJ_printf(cmpr_grp, "!$EV trig_pc_d(1, expr((@VA(.MAIN.splash_cmpr_%y_%d)&0xffffffff)+8 , 16, 16)) -> intp(%rd,0,%rd,*,%rd,*,%x,1)\n", label, Rv_tid, Rv_intdest,Rv_offset, targ_mask);
4213 IJ_printf(cmpr_grp, "#endif\n" );
4214 IJ_set_rvar(Rv_offset,"6'brrr000");
4215 IJ_printf(cmpr_grp, "\twrhpr %%g0, 0x0, %%halt ! HALT\n");
4216 }
4217 if (hpriv == 1) {
4218 IJ_generate_from_token(1, cmpr_grp, Ro_wrhpstate , tWRHPR_HPSTATE_I);
4219 }
4220 }
4221 }
4222 label++;
4223
4224}
4225;
4226
4227splash_gl :
4228 tWRPR_GL_I %ropr Ro_wrgl
4229;
4230splash_tt :
4231 tWRPR_TT_I %ropr Ro_wrtt
4232;
4233splash_fprs :
4234 tWRFPRS_I %ropr Ro_wrfprs
4235;
4236
4237splash_cwp : tWRPR_CWP_I %ropr Ro_wrcwp
4238 {
4239%asm<th_all>{
4240cwp_@{"%y"}_$label:
4241 set user_data_start, %o7
4242%}
4243 label++;
4244 }
4245;
4246
4247splash_pstate : tWRPR_PSTATE_I %ropr Ro_wrpstate
4248 {
4249 if (IJ_random()&0x1) {
4250 IJ_generate_from_token(1, th_all, ijdefault, uBR);
4251 }
4252 label++;
4253 }
4254;
4255
4256splash_hpstate : tWRHPR_HPSTATE_I %ropr Ro_wrhpstate
4257 {
4258 IJ_printf(th_all, "splash_hpstate_%y_%d:\n", label);
4259 if(IJ_random()&0x1)
4260 IJ_printf(th_all, "\tta T_CHANGE_NONHPRIV\n");
4261 if (IJ_random()&0x1) {
4262 IJ_generate_from_token(1, th_all, ijdefault, uBR);
4263 }
4264 label++;
4265 }
4266;
4267
4268trap_asi : uASI_LDX_R %ropr Ro_traps_asi
4269 {
4270 IJ_printf (th_all, "trapasi_%y_%d:\n\tnop\n", label); label++;
4271 IJ_update_rvar(Rv_traps_asi);
4272 char str1 [8]; int tmp = IJ_get_rvar_val32(Rv_traps_asi);
4273 sprintf(str1, "{0x%x}\0",tmp);
4274 IJ_printf (th_all, "\tmov 0x%vx, %%r1 ", tl_asi, Rv_traps_asi , 0);
4275 IJ_printf (th_all, "\t! (VA for ASI 0x%x) \n", tmp);
4276 IJ_set_ropr_fld (Ro_traps_asi, Ft_Imm_Asi, str1);
4277 }
4278;
4279
4280wrasi : tWRASI_I %ropr Ro_wrasi_i
4281;
4282reg_tcc : tTcc_R %ropr Ro_traps_r
4283 {
4284 if (label%2) {
4285 IJ_generate_from_token(2, th_all, Ro_ldst_ptr, uDIFF1, uDBG1, uDBG9);
4286 IJ_printf(th_all, "\tmov 0x%rx, %%r30\n", Rv_init_trap);
4287 } else {
4288 IJ_generate_from_token(2, th_all, Ro_ldst_ptr, uDIFF1, uDBG1, uDBG9);
4289 IJ_printf(th_all, "\tmov 0x%rx, %%r30\n", Rv_init_trap);
4290 }
4291 }
4292;
4293
4294tcc :
4295 tTcc_I %ropr Ro_traps_i
4296 | reg_tcc
4297
4298;
4299
4300ldst_excp :
4301 ldds %ropr Ro_nontrap_ldasi |
4302 load_r %ropr Ro_nontrap_ldasi |
4303 load_i %ropr Ro_nontrap_ldasi
4304
4305;
4306
4307ldstasi_excp :
4308 asi_load_i %ropr Ro_nontrap_ldasi
4309;
4310ldstasi_excp_z :
4311 tLDUWA_R %ropr Ro_nontrap_ldasi_z
4312;
4313
4314
4315
4316ldds: tLDD_R %ropr Ro_ldst_ptr | tLDD_I %ropr Ro_ldst_ptr | tLDDA_R %ropr Ro_ldst_ptr | tLDDA_I %ropr Ro_ldst_ptr
4317;
4318
4319stores:
4320 stds %ropr Ro_nontrap_ld |
4321 stfs %ropr Ro_nontrap_ld |
4322 stqfs %ropr Ro_nontrap_ld |
4323 sts %ropr Ro_nontrap_ld
4324;
4325stds: tSTDA_R | tSTDA_I | tSTD_R | tSTD_I | tSTDF_R | tSTDF_I
4326;
4327stfs: tSTF_R | tSTF_I | tSTXFSR_R
4328;
4329stqfs: tSTQF_R | tSTQF_I
4330;
4331sts: tSTB_I | tSTH_I | tSTW_I | tSTX_R | tSTX_I
4332;
4333blksts: tLDDFA_R %ropr Ro_blksts | tLDDFA_I %ropr Ro_blksts | tSTDFA_I %ropr Ro_blksts | tSTDFA_R %ropr Ro_blksts
4334;
4335
4336load_r: tLDXFSR_R | tLDSB_R | tLDSH_R | tLDSW_R | tLDUB_R | tLDDF_R | tLDUW_R | tLDQF_R
4337;
4338
4339load_i: tLDSB_I | tLDSH_I | tLDSW_I | tLDUB_I | tLDDF_I | tLDX_I
4340 | tLDQFA_R
4341;
4342
4343asi_load_i: tLDSBA_R | tLDSHA_R | tLDSWA_R | tLDUBA_R | tLDUHA_R | tLDXA_R
4344;
4345
4346
4347
4348
4349alu :
4350 tADDcc_R | tADDCcc_I | tANDNcc_R |
4351 tMULX_R | tUMULcc_R | tSDIVcc_R |
4352 tSMULcc_R | tSDIVX_R | tFLUSHW | tFLUSH_R |
4353 tUDIVX_I | tFDIVs | tSWAP_I %ropr Ro_ldst_ptr |
4354 tSWAPA_I %ropr Ro_ldst_ptr | tCASA_R %ropr Ro_ldst_ptr | tPOPC_I |
4355 tFSQRTd | tFsMULd | tFNEGd | tFONES | tRDPR_CWP |
4356 tWR_GRAPHICS_STATUS_REG_I | tRDPR_FQ | tFCMPs | tFCMPEQ16 |
4357 tPREFETCH_I %ropr Ro_ldst_ptr | tFCMPEd | tFCMPGT32
4358
4359;
4360
4361br : tBA | tBLE | tBGE | tBL | tBGU | tBLEU | tBN | tBNE | tBE | tBG |
4362 tBCC | tBCS | tBPOS | tBNEG | tBVC | tBVS | tBPA | tBPN | tBPNE |
4363 tBPE | tBPG | tBPLE | tBPGE | tBPL | tBPGU | tBPLEU | tBPCC | tBPCS |
4364 tBPPOS | tBPNEG | tBPVC | tBPVS
4365;
4366
4367branches : br | br_badelay | br_longdelay;
4368
4369br_badelay : tRD_SOFTINT_REG
4370 {
4371 IJ_printf(th_all, "br_badelay1_%y_%d:\n", label); label++;
4372 if (IJ_random()&0x1) {
4373 IJ_generate_from_token(1, th_all, Ro_ldst_ptr, uLONG);
4374 IJ_generate_from_token(1, th_all, ijdefault, tSTQF_I, tSTQF_R, uBR);
4375 } else {
4376 IJ_generate_from_token(1, th_all, ijdefault, uBR);
4377 IJ_generate_from_token(1, th_all, Ro_ldst_ptr, tSTQF_I, tSTQF_R, uLONG);
4378 }
4379 if (IJ_random()&0x1) {
4380 IJ_generate_from_token(1, th_all, Ro_ldst_ptr, uLONG);
4381 } else {
4382 IJ_generate_from_token(1, th_all, ijdefault, uBR);
4383 }
4384 IJ_printf(th_all, "\tnormalw\n");
4385 }
4386 | tALIGNADDRESS
4387 {
4388 IJ_printf(th_all, "br_badelay2_%y_%d:\n", label); label++;
4389 IJ_generate_from_token(1, th_all, ijdefault, tBN, tBNE, tBE, tBG, tFDIVd);
4390 if ( label%3==0) {
4391 IJ_generate_from_token(1, th_all, ijdefault,tFDIVd, tPOPC_I);
4392 } else if (label%3 == 1) {
4393 IJ_printf(th_all, "\tallclean\n");
4394 } else {
4395 IJ_printf(th_all, "\tpdist %%f%rd, %%f%rd, %%f%rd\n", Rv_pdist_reg, Rv_pdist_reg, Rv_pdist_reg);
4396 }
4397 }
4398 | tFADDs
4399 {
4400 IJ_printf(th_all, "br_badelay3_%y_%d:\n", label); label++;
4401 IJ_generate_from_token(1, th_all, ijdefault, tBN, tBNE, tBE, tBG, tFDIVd);
4402 if (label%2) {
4403 IJ_printf(th_all, "\t.word 0x%rx\t! Random illegal ?\n", Rv_illtrap);
4404 //IJ_printf(th_all, "\t.xword 0x0\t! illegal\n");
4405 } else {
4406 IJ_generate_from_token(1, th_all, ijdefault, tBN, tBNE, tBE, tBG, tFDIVd);
4407 }
4408 IJ_generate_from_token(1, th_all, ijdefault, tFSQRTd, tLDQF_R, tFDIVd);
4409 }
4410
4411;
4412
4413br_longdelay : uSRW %ropr Ro_save_restore
4414 {
4415 IJ_printf(th_all, "br_longdelay1_%y_%d:\n", label); label++;
4416 IJ_generate_from_token(1, th_all, ijdefault, uBR);
4417 }
4418 | uLONG %ropr Ro_ldst_ptr
4419 {
4420 IJ_printf(th_all, "br_longdelay2_%y_%d:\n", label); label++;
4421 IJ_generate_from_token(1, th_all, ijdefault, uBR);
4422 }
4423 | uSTATE %ropr Ro_wrhpstate
4424 {
4425 IJ_printf(th_all, "br_longdelay3_%y_%d:\n", label); label++;
4426 IJ_printf(th_all, "\tnop\n\tnot %%g0, %%r27\n");
4427#ij ifndef NOVAHOLE
4428 if (IJ_random()&0x1) {
4429 IJ_printf(th_all, "\tandn %%r27, 0xf, %%r27\n");
4430 }
4431#ij endif
4432 IJ_printf(th_all, "\tjmpl %%r27+0, %%r27\n");
4433 }
4434 | tWRPR_WSTATE_I %ropr Ro_winops
4435 {
4436 IJ_printf(th_all, "br_longdelay4_%y_%d:\n", label); label++;
4437 IJ_printf(th_all, "\tnop\n\tnot %%g0, %%r27\n");
4438#ij ifndef NOVAHOLE
4439 if (IJ_random()&0x1) {
4440 IJ_printf(th_all, "\tandn %%r27, 0xf, %%r27\n");
4441 }
4442#ij endif
4443 IJ_printf(th_all, "\tjmpl %%r27+0, %%r27\n");
4444 }
4445 | uLONGH %ropr Ro_ldst_ptr
4446 {
4447 IJ_generate_from_token(1, th_all, ijdefault, uBR);
4448 IJ_printf(th_all, "br_longdelay5_%y_%d:\n", label);
4449 IJ_set_rvar(Rv_offset,"10'b1r1rrrr000");
4450 IJ_printf(th_all, "#if (defined SPC || defined CMP1)\n" );
4451 IJ_printf(th_all, "!$EV trig_pc_d(1, expr((@VA(.MAIN.br_longdelay5_%y_%d)&0xffffffff) , 16, 16)) -> intp(mask2tid(0x%y),0,0,*,%rd,*,ffffffffffffffff,1)\n", label , Rv_offset);
4452 IJ_printf(th_all, "!$EV trig_pc_d(1, expr((@VA(.MAIN.br_longdelay5_%y_%d)) , 16, 16)) -> intp(mask2tid(0x%y),0,0,*,%rd,*,ffffffffffffffff,1)\n", label, Rv_offset);
4453 IJ_printf(th_all, "\twrhpr %%g0, 0x0, %%halt ! HALT\n");
4454 IJ_printf(th_all, "#endif\n" );
4455 IJ_set_rvar(Rv_offset,"6'brrr000");
4456 label++ ;
4457 }
4458;
4459
4460
4461%%
4462// }}}
4463
4464%%section cbfunc
4465
4466%%
4467
4468#ijifdef TEMPLATE1
4469 TEMPLATE1 t1 (th_tt1);
4470#ijendif
4471#ijifdef TEMPLATE2
4472 TEMPLATE2 t2 (th_tt2);
4473#ijendif
4474endtemplate
Full OpenSPARC design & verification tarball including full HDL.