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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / diaglists / cmp / cmp_idt_8core.diaglist
CommitLineData
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: cmp_idt_8core.diaglist
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35<sys(cmp8_idt) name=sys(cmp8_idt)>
36<sys(fsr_all)>
37
38<runargs -sas -vcs_run -max_cycle=+10000000 -rtl_timeout=4000000 -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+gchkr_off>
39
40ncu_regs_wptect ncu_regs_wptect.s -finish_mask=0x1 -sas -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler -midas_args=-DRESET_STAT_CHECK
41
42ncu_ssi_clk_ratio_1 ncu_ssi_rw_b2b.s -finish_mask=0x1 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DWARM_RESET_INIT -midas_args=-DSSI_CLK_4 -nofast_boot -vcs_run_args=+FAST_BISI
43
44ncu_ssi_clk_ratio_2 ncu_ssi_rw_b2b.s -finish_mask=0x1 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DWARM_RESET_INIT -midas_args=-DSSI_CLK_8_2 -nofast_boot -vcs_run_args=+FAST_BISI
45
46ncu_ssi_clk_ratio_3 ncu_ssi_rw_b2b.s -finish_mask=0x1 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DWARM_RESET_INIT -midas_args=-DSSI_CLK_8_3 -nofast_boot -vcs_run_args=+FAST_BISI
47
48ncu_ssi_clk_ratio_4 ncu_ssi_mt.s -finish_mask=0x0040000000000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DWARM_RESET_INIT -midas_args=-DSSI_CLK_4 -nofast_boot -vcs_run_args=+FAST_BISI
49
50ncu_ssi_clk_ratio_5 ncu_ssi_mt.s -finish_mask=0x0040000000000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DWARM_RESET_INIT -midas_args=-DSSI_CLK_8_2 -nofast_boot -vcs_run_args=+FAST_BISI
51
52ncu_ssi_clk_ratio_6 ncu_ssi_mt.s -finish_mask=0x0040000000000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DWARM_RESET_INIT -midas_args=-DSSI_CLK_8_3 -nofast_boot -vcs_run_args=+FAST_BISI
53
54ncu_all_core_wakeup ncu_all_core_wakeup.s -finish_mask=0x0100000000000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler -midas_args=-DRESET_STAT_CHECK -fast_boot
55
56ncu_en_thrd_on_dis_core ncu_en_thrd_on_dis_core.s -finish_mask=0x0000000000000200 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -vcs_run_args=+FAST_BISI
57
58ncu_cmp ncu_cmp.s -finish_mask=0x0000010000000100 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -vcs_run_args=+FAST_BISI
59
60ncu_asi_core_en_status_wptect ncu_asi_core_en_status_wptect.s -finish_mask=0xff00ff0000000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -vcs_run_args=+FAST_BISI
61
62ncu_asi_core_en_subset_1 ncu_asi_core_en_subset.s -finish_mask=0x0000000000000001 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+core_set_mask=01
63
64ncu_asi_core_en_subset_2 ncu_asi_core_en_subset.s -finish_mask=0x0000000000000100 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x02 -vcs_run_args=+core_set_mask=02 -vcs_run_args=+FAST_BISI
65
66ncu_asi_core_en_subset_3 ncu_asi_core_en_subset.s -finish_mask=0x0000000000010000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x04 -vcs_run_args=+core_set_mask=04 -vcs_run_args=+FAST_BISI
67
68ncu_asi_core_en_subset_4 ncu_asi_core_en_subset.s -finish_mask=0x0000000001000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x08 -vcs_run_args=+core_set_mask=08 -vcs_run_args=+FAST_BISI
69
70ncu_asi_core_en_subset_5 ncu_asi_core_en_subset.s -finish_mask=0x0000000100000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x10 -vcs_run_args=+core_set_mask=10 -vcs_run_args=+FAST_BISI
71
72ncu_asi_core_en_subset_6 ncu_asi_core_en_subset.s -finish_mask=0x0000010000000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x20 -vcs_run_args=+core_set_mask=20 -vcs_run_args=+FAST_BISI
73
74ncu_asi_core_en_subset_7 ncu_asi_core_en_subset.s -finish_mask=0x0001000000000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x40 -vcs_run_args=+core_set_mask=40 -vcs_run_args=+FAST_BISI
75
76ncu_asi_core_en_subset_8 ncu_asi_core_en_subset.s -finish_mask=0x0100000000000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x80 -vcs_run_args=+core_set_mask=80 -vcs_run_args=+FAST_BISI
77
78ncu_asi_core_en_wptect_1 ncu_asi_core_en_wptect.s -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0xef -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler -vcs_run_args=+core_set_mask=ef
79
80ncu_asi_core_en_wptect_2 ncu_asi_core_en_wptect.s -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0xdd -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler -vcs_run_args=+core_set_mask=dd
81
82ncu_asi_core_en_wptect_3 ncu_asi_core_en_wptect.s -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x43 -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler -vcs_run_args=+core_set_mask=43
83
84ncu_asi_core_en_wptect_4 ncu_asi_core_en_wptect.s -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x75 -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler -vcs_run_args=+core_set_mask=75
85
86ncu_asi_core_en_wptect_5 ncu_asi_core_en_wptect.s -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x57 -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler -vcs_run_args=+core_set_mask=57
87
88ncu_asi_core_en_wptect_6 ncu_asi_core_en_wptect.s -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x11 -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler -vcs_run_args=+core_set_mask=11
89
90ncu_l2_idx_hash_en_wptect ncu_l2_idx_hash_en_wptect.s -finish_mask=0x0100000000000000 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler -midas_args=-DRESET_STAT_CHECK
91
92ncu_efu_stat_wptect_0 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_0.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000001
93
94ncu_efu_stat_wptect_1 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_1.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000002
95
96ncu_efu_stat_wptect_2 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_2.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000004
97
98ncu_efu_stat_wptect_3 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_3.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000008
99
100ncu_efu_stat_wptect_4 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_4.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000010
101
102ncu_efu_stat_wptect_5 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_5.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000020
103
104ncu_efu_stat_wptect_6 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_6.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000040
105
106ncu_efu_stat_wptect_7 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_7.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000080
107
108ncu_efu_stat_wptect_8 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_8.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000100
109
110ncu_efu_stat_wptect_9 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_9.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000200
111
112ncu_efu_stat_wptect_10 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_10.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000400
113
114ncu_efu_stat_wptect_11 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_11.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000000800
115
116ncu_efu_stat_wptect_12 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_12.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000001000
117
118ncu_efu_stat_wptect_13 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_13.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000002000
119
120ncu_efu_stat_wptect_14 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_14.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000004000
121
122ncu_efu_stat_wptect_15 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_15.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000008000
123
124ncu_efu_stat_wptect_16 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_16.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000010000
125
126ncu_efu_stat_wptect_17 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_17.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000020000
127
128ncu_efu_stat_wptect_18 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_18.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000040000
129
130ncu_efu_stat_wptect_19 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_19.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000080000
131
132ncu_efu_stat_wptect_20 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_20.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000100000
133
134ncu_efu_stat_wptect_21 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_21.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000200000
135
136ncu_efu_stat_wptect_22 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_22.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000400000
137
138ncu_efu_stat_wptect_23 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_23.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000000800000
139
140ncu_efu_stat_wptect_24 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_24.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000001000000
141
142ncu_efu_stat_wptect_25 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_25.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000002000000
143
144ncu_efu_stat_wptect_26 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_26.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000004000000
145
146ncu_efu_stat_wptect_27 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_27.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000008000000
147
148ncu_efu_stat_wptect_28 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_28.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000010000000
149
150ncu_efu_stat_wptect_29 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_29.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000020000000
151
152ncu_efu_stat_wptect_30 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_30.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000040000000
153
154ncu_efu_stat_wptect_31 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_31.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000080000000
155
156ncu_efu_stat_wptect_32 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_32.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000100000000
157
158ncu_efu_stat_wptect_33 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_33.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000200000000
159
160ncu_efu_stat_wptect_34 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_34.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000400000000
161
162ncu_efu_stat_wptect_35 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_35.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000000800000000
163
164ncu_efu_stat_wptect_36 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_36.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000001000000000
165
166ncu_efu_stat_wptect_37 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_37.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000002000000000
167
168ncu_efu_stat_wptect_38 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_38.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000004000000000
169
170ncu_efu_stat_wptect_39 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_39.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000008000000000
171
172ncu_efu_stat_wptect_40 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_40.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000010000000000
173
174ncu_efu_stat_wptect_41 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_41.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000020000000000
175
176ncu_efu_stat_wptect_42 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_42.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000040000000000
177
178ncu_efu_stat_wptect_43 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_43.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000080000000000
179
180ncu_efu_stat_wptect_44 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_44.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000100000000000
181
182ncu_efu_stat_wptect_45 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_45.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000200000000000
183
184ncu_efu_stat_wptect_46 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_46.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000400000000000
185
186ncu_efu_stat_wptect_47 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_47.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0000800000000000
187
188ncu_efu_stat_wptect_48 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_48.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0001000000000000
189
190ncu_efu_stat_wptect_49 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_49.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0002000000000000
191
192ncu_efu_stat_wptect_50 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_50.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0004000000000000
193
194ncu_efu_stat_wptect_51 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_51.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0008000000000000
195
196ncu_efu_stat_wptect_52 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_52.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0010000000000000
197
198ncu_efu_stat_wptect_53 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_53.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0020000000000000
199
200ncu_efu_stat_wptect_54 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_54.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0040000000000000
201
202ncu_efu_stat_wptect_55 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_55.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0080000000000000
203
204ncu_efu_stat_wptect_56 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_56.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0100000000000000
205
206ncu_efu_stat_wptect_57 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_57.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0200000000000000
207
208ncu_efu_stat_wptect_58 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_58.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0400000000000000
209
210ncu_efu_stat_wptect_59 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_59.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x0800000000000000
211
212ncu_efu_stat_wptect_60 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_60.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x1000000000000000
213
214ncu_efu_stat_wptect_61 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_61.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x2000000000000000
215
216ncu_efu_stat_wptect_62 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_62.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x4000000000000000
217
218ncu_efu_stat_wptect_63 ncu_efu_stat_wptect.s -finish_mask=0x0000000000000001 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0x01 -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_63.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x8000000000000000
219
220ncu_efu_stat_wptect_64 ncu_efu_stat_wptect.s -finish_mask=0x0100000000000000 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0xca -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_64.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0x5555555555555555
221
222ncu_efu_stat_wptect_65 ncu_efu_stat_wptect.s -finish_mask=0x0100000000000000 -vcs_run_args=+FULL_EFU -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DRESET_STAT_CHECK -midas_args=-DCORE_AVAIL=0xbd -vcs_run_args=+FAST_BISI -efuse_image_name=efu_stat_wptect_65.dat -efuse_image_path=$DV_ROOT/verif/diag/assembly/arch/prm/cmp -midas_args=-DEFU_STAT_VALUE=0xaaaaaaaaaaaaaaaa
223
224</runargs>
225
226</sys(fsr_all)>
227</sys(cmp8_idt)>
228
Full OpenSPARC design & verification tarball including full HDL.