Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / diag / diaglists / cmp_fast.diaglist

// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: cmp_fast.diaglist
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
//
// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
// 
// For the avoidance of doubt, and except that if any non-GPL license 
// choice is available it will apply instead, Sun elects to use only 
// the General Public License version 2 (GPLv2) at this time for any 
// software where a choice of GPL license versions is made 
// available with the language indicating that GPLv2 or any later version 
// may be used, or where a choice of which version of the GPL is applied is 
// otherwise unspecified. 
//
// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
// CA 95054 USA or visit www.sun.com if you need additional information or 
// have any questions. 
// 
// ========== Copyright Header End ============================================
#ifdef CMP

<sys(st) name=sys(st)>
//     tlu_rand05_ind_07   tlu_rand05_ind_07.s
//     tlu_rand05_ind_10   tlu_rand05_ind_10.s
    tlu_rand05_ind_03   tlu_rand05_ind_03.s
    spc2_hboot_test_cmp spc2_hboot_test.s -midas_args=-DCMP_THREAD_START=0x54 -vcs_run_args=+thread=54
</sys(st)>

<sys(mt) name=sys(mt)>
<runargs -vcs_run_args=+thread=all>
    isa3_asr_pr_hpr_f2          isa3_asr_pr_hpr_f2.s
    isa3_basic0_f0      isa3_basic0_f0.s
    isa3_fsr0_f0        isa3_fsr0_f0.s
    isa3_window0_f0     isa3_window0_f0.s
    isa3_mmu_f1         isa3_mmu_f1.s
    spc2_hboot_test     spc2_hboot_test.s
    isa3_mmu_htw_4v_real     isa3_mmu_htw_3.s
    v9_8th_kaos_03_17_04_163    v9_8th_kaos_03_17_04_163.s -midas_args=-allow_tsb_conflicts
    ldst_sync_fc0               ldst_sync_fc0.s
    ldst_sync_fc1               ldst_sync_fc1.s -vcs_run_args=+inval_rate=500
    tlu_rand01_ind_01           tlu_rand01_ind_01.s
    tlu_rand01_ind_04           tlu_rand01_ind_04.s
    tlu_rand02_ind_05   tlu_rand02_ind_05.s 
    tlu_rand02_ind_03   tlu_rand02_ind_03.s 
    tlu_rand04_ind_01   tlu_rand04_ind_01.s
</runargs>
</sys(mt)>

<sys(mmu) name=sys(mmu)>
    isa3_mmu_f1 isa3_mmu_f1.s
    isa3_scratchpad_f1  isa3_scratchpad_f1.s
    isa3_scratchpad_f2  isa3_scratchpad_f2.s
    isa3_mmu_21_52_f1   isa3_mmu_21_52_f1.s
    isa3_mmu_htw_4v_phy isa3_mmu_htw_0.s -vcs_run_args=+thread=all
    isa3_mmu_htw_4v_real isa3_mmu_htw_3.s -vcs_run_args=+thread=all
    mmu_mt_demap_0               mmu_mt_demap_0.s -midas_args=-DNOHWTW -vcs_run_args=+thread=all
    mmu_mt_demap_0_burst         mmu_mt_demap_0.s -midas_args=-DNOHWTW -vcs_run_args=+thread=all -midas_args=-DTSB_SEARCH_BURST
    mmu_mt_demap_0_prediction    mmu_mt_demap_0.s -midas_args=-DNOHWTW -vcs_run_args=+thread=all -midas_args=-DTSB_SEARCH_PREDICTION
// removed: hangs        mmu_mt_demap_1               mmu_mt_demap_1.s -midas_args=-DNOHWTW -vcs_run_args=+thread=all
// removed: hangs       mmu_mt_demap_1_burst         mmu_mt_demap_1.s -midas_args=-DNOHWTW -vcs_run_args=+thread=all -midas_args=-DTSB_SEARCH_BURST
// removed: hangs       mmu_mt_demap_1_prediction    mmu_mt_demap_1.s -midas_args=-DNOHWTW -vcs_run_args=+thread=all -midas_args=-DTSB_SEARCH_PREDICTION
</sys(mmu)>

<sys(lsu) name=sys(lsu)>
    lsu_casa_std_pst0   lsu_casa_std_pst0.s  -vcs_run_args=+thread=all
    n2_tso_8talias_8t_1   n2_tso_8talias_8t_1.s -midas_args=-allow_tsb_conflicts -vcs_run_args=+thread=all
    ldst_sync_fc10        ldst_sync_fc10.s -vcs_run_args=+inval_rate=300
    st_blk                st_blk.s
    ld_blk                ld_blk.s
</sys(lsu)>

<sys(fast_fgu) name=sys(fast_fgu)>
    fp_sticky_bits_n2          fp_sticky_bits_n2.s  -vcs_run_args=+thread=01
    fp_ieee_flags_n2           fp_ieee_flags_n2.s   -vcs_run_args=+thread=01
    fp_movixcc0_n2             fp_movixcc0_n2.s     -vcs_run_args=+thread=01
    fp_fadd_norm_sv_n2         fp_fadd_norm_sv_n2.s -vcs_run_args=+thread=01
    fp_arth_exc0_n2            fp_arth_exc0_n2.s    -vcs_run_args=+thread=01
</sys(fast_fgu)>

<sys(fast_exu) name=sys(fast_exu)>
    exu_win_traps_8th_n2       exu_win_traps_8th_n2.s -sas    -vcs_run_args=+thread=all
    exu_ecc_inj_err_n2         exu_ecc_inj_error_n2.s -nosas  -vcs_run_args=+thread=01 -vcs_run_args=+err_chkrs_off
    fgu_ecc_inj_err_n2         fgu_ecc_inj_error_n2.s -nosas  -vcs_run_args=+thread=01
    exu_win_traps_8th_indra_n2 exu_win_traps_8th_indra_n2.s   -vcs_run_args=+win_check -sas -vcs_run_args=+thread=all
    fp_pstate_fpdis_n2         fp_pstate_fpdis_n2.s   -sas    -vcs_run_args=+thread=01 
    exu_logical_n2             exu_logical_n2.s       -sas    -vcs_run_args=+thread=01 
</sys(fast_exu)>

<sys(nospec) name=sys(nospec) >
<runargs -midas_args=-DNOSPEC_EN>
    isa3_basic0_f0		isa3_basic0_f0.s
    isa3_fsr0_f0		isa3_fsr0_f0.s
    isa3_window0_f0		isa3_window0_f0.s
    isa3_flushw_fc0		isa3_flushw_fc0.s
    kaos_01_07_2004_1		kaos_01_07_2004_1.s -midas_args=-allow_tsb_conflicts
</runargs>
</sys(nospec)>

<sys(fast_idtlb) name=sys(fast_idtlb) >
<runargs -vcs_run_args=+thread=01>
// review later to -vcs_run_args=+thread=all
    isa3_basic_idtlb1_nohw    isa3_basic_idtlb1.s -midas_args=-DNOHWTW
    isa3_basic_idtlb4_nohw    isa3_basic_idtlb4.s -midas_args=-DNOHWTW
    isa3_basic_idtlb1    isa3_basic_idtlb1.s
    isa3_basic_idtlb4    isa3_basic_idtlb4.s
</runargs>
</sys(fast_idtlb)>

#endif