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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / diaglists / fc / Fc_Niu_Multi.diaglist
CommitLineData
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: Fc_Niu_Multi.diaglist
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35<Fc_Niu_Multi name=Fc_Niu_Multi>
36
37//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
38//@@ RX MULTI_PORT/MULTI_DMA @@
39//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
40<runargs -sas -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 >
41<runargs -vcs_run_args=+MAC_SPEED0=10000 -midas_args=-DMAC_SPEED0=10000 >
42<runargs -vcs_run_args=+MAC_SPEED1=10000 -midas_args=-DMAC_SPEED1=10000 >
43<runargs -vcs_run_args=+PCS_SERDES -midas_args=-DPCS_SERDES -vcs_run_args=+displaySysRdWr >
44<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+RX_TEST -midas_args=-DRX_TEST >
45<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
46<runargs -vcs_run_args=+MULTI_TEST -midas_args=-DMULTI_TEST >
47
48<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
49<runargs -midas_args=-DRXMAC_PKTCNT=0x10 -vcs_run_args=+RXMAC_PKTCNT=16 >
50<runargs -midas_args=-DNIU_RX_MULTI_DMA=0xc -vcs_run_args=+NIU_RX_MULTI_DMA=0xc >
51FcNiu_rx_p0_MULTI_2DMA_rand_0C rx_p0_MULTI_2DMA_rand_0C.s
52</runargs>
53</runargs>
54</runargs>
55
56<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
57<runargs -midas_args=-DRXMAC_PKTCNT=0x10 -vcs_run_args=+RXMAC_PKTCNT=16 >
58<runargs -midas_args=-DNIU_RX_MULTI_DMA=0xc0 -vcs_run_args=+NIU_RX_MULTI_DMA=0xc0 >
59FcNiu_rx_p0_MULTI_2DMA_rand_C0 rx_p0_MULTI_2DMA_rand_C0.s
60</runargs>
61</runargs>
62</runargs>
63
64<runargs -vcs_run_args=+GET_MAC_PORTS=0 >
65<runargs -midas_args=-DRXMAC_PKTCNT=0x18 -vcs_run_args=+RXMAC_PKTCNT=24 >
66<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x7 -vcs_run_args=+NIU_RX_MULTI_DMA=0x7 >
67FcNiu_rx_p0_MULTI_3DMA_rand_07 rx_p0_MULTI_3DMA_rand_07.s
68</runargs>
69</runargs>
70</runargs>
71
72//<runargs -vcs_run_args=+GET_MAC_PORTS=1 >
73//<runargs -midas_args=-DMAC_ID=0x1 -vcs_run_args=+MAC_ID=1 >
74//<runargs -midas_args=-DRXMAC_PKTCNT=0x18 -vcs_run_args=+RXMAC_PKTCNT=24 >
75//<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x700 -vcs_run_args=+NIU_RX_MULTI_DMA=0x700 >
76//FcNiu_rx_p1_MULTI_3DMA_rand_0700 rx_p1_MULTI_3DMA_rand_0700.s
77//</runargs>
78//</runargs>
79//</runargs>
80//</runargs>
81
82<runargs -vcs_run_args=+GET_MAC_PORTS=01 >
83<runargs -midas_args=-DRXMAC_PKTCNT=0x10 -vcs_run_args=+RXMAC_PKTCNT=16 >
84<runargs -vcs_run_args=+NIU_RX_MULTI_PORT -midas_args=-DNIU_RX_MULTI_PORT >
85<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x11 -vcs_run_args=+NIU_RX_MULTI_DMA=0x11 >
86FcNiu_rx_p0p1_MULTI_2DMA_rand_11 rx_p0p1_MULTI_2DMA_rand_11.s
87</runargs>
88</runargs>
89</runargs>
90</runargs>
91
92<runargs -vcs_run_args=+GET_MAC_PORTS=01 >
93<runargs -midas_args=-DRXMAC_PKTCNT=0x10 -vcs_run_args=+RXMAC_PKTCNT=16 >
94<runargs -vcs_run_args=+NIU_RX_MULTI_PORT -midas_args=-DNIU_RX_MULTI_PORT >
95<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x88 -vcs_run_args=+NIU_RX_MULTI_DMA=0x88 >
96FcNiu_rx_p0p1_MULTI_2DMA_rand_88 rx_p0p1_MULTI_2DMA_rand_88.s
97</runargs>
98</runargs>
99</runargs>
100</runargs>
101
102<runargs -vcs_run_args=+GET_MAC_PORTS=01 >
103<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 >
104<runargs -vcs_run_args=+NIU_RX_MULTI_PORT -midas_args=-DNIU_RX_MULTI_PORT >
105<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x33 -vcs_run_args=+NIU_RX_MULTI_DMA=0x33 >
106FcNiu_rx_p0p1_MULTI_4DMA_rand_33 rx_p0p1_MULTI_4DMA_rand_33.s
107</runargs>
108</runargs>
109</runargs>
110</runargs>
111
112<runargs -vcs_run_args=+GET_MAC_PORTS=01 >
113<runargs -midas_args=-DRXMAC_PKTCNT=0x20 -vcs_run_args=+RXMAC_PKTCNT=32 >
114<runargs -vcs_run_args=+NIU_RX_MULTI_PORT -midas_args=-DNIU_RX_MULTI_PORT >
115<runargs -midas_args=-DNIU_RX_MULTI_DMA=0xcc -vcs_run_args=+NIU_RX_MULTI_DMA=0xcc >
116FcNiu_rx_p0p1_MULTI_4DMA_rand_CC rx_p0p1_MULTI_4DMA_rand_CC.s
117</runargs>
118</runargs>
119</runargs>
120</runargs>
121
122<runargs -vcs_run_args=+GET_MAC_PORTS=01 >
123<runargs -midas_args=-DRXMAC_PKTCNT=0x30 -vcs_run_args=+RXMAC_PKTCNT=48 >
124<runargs -vcs_run_args=+NIU_RX_MULTI_PORT -midas_args=-DNIU_RX_MULTI_PORT >
125<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x77 -vcs_run_args=+NIU_RX_MULTI_DMA=0x77 >
126FcNiu_rx_p0p1_MULTI_6DMA_rand_77 rx_p0p1_MULTI_6DMA_rand_77.s
127</runargs>
128</runargs>
129</runargs>
130</runargs>
131
132</runargs>
133</runargs>
134</runargs>
135</runargs>
136</runargs>
137</runargs>
138</runargs>
139
140//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
141//@@ TX MULTI_PORT/MULTI_DMA @@
142//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
143<runargs -sas -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 >
144<runargs -vcs_run_args=+MAC_SPEED0=10000 -midas_args=-DMAC_SPEED0=10000 >
145<runargs -vcs_run_args=+MAC_SPEED1=10000 -midas_args=-DMAC_SPEED1=10000 >
146<runargs -vcs_run_args=+PCS_SERDES -midas_args=-DPCS_SERDES -vcs_run_args=+displaySysRdWr >
147<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST >
148<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
149<runargs -vcs_run_args=+NIU_TX_MULTI_TEST -midas_args=-DNIU_TX_MULTI_TEST >
150
151<runargs -vcs_run_args=+GET_MAC_PORTS=01 >
152<runargs -vcs_run_args=+NIU_TX_MULTI_PORT -midas_args=-DNIU_TX_MULTI_PORT >
153<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P0=0008 -midas_args=-DNIU_TX_MULTI_DMA_P0=0x0008 >
154<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P1=0080 -midas_args=-DNIU_TX_MULTI_DMA_P1=0x0080 >
155<runargs -midas_args=-DNIU_TX_PKT_CNT=0x20 -vcs_run_args=+TX_PKT_LEN=200 >
156FcNiu_tx_MULTI_PORT_DMA_rand_0088 tx_MULTI_PORT_DMA_rand_0088.s
157</runargs>
158</runargs>
159</runargs>
160</runargs>
161</runargs>
162
163<runargs -vcs_run_args=+GET_MAC_PORTS=01 >
164<runargs -vcs_run_args=+NIU_TX_MULTI_PORT -midas_args=-DNIU_TX_MULTI_PORT >
165<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P0=0080 -midas_args=-DNIU_TX_MULTI_DMA_P0=0x0080 >
166<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P1=8000 -midas_args=-DNIU_TX_MULTI_DMA_P1=0x8000 >
167<runargs -midas_args=-DNIU_TX_PKT_CNT=0x20 -vcs_run_args=+TX_PKT_LEN=200 >
168FcNiu_tx_MULTI_PORT_DMA_rand_8080 tx_MULTI_PORT_DMA_rand_8080.s
169</runargs>
170</runargs>
171</runargs>
172</runargs>
173</runargs>
174
175<runargs -vcs_run_args=+GET_MAC_PORTS=01 >
176<runargs -vcs_run_args=+NIU_TX_MULTI_PORT -midas_args=-DNIU_TX_MULTI_PORT >
177<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P0=0001 -midas_args=-DNIU_TX_MULTI_DMA_P0=0x0001 >
178<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P1=0100 -midas_args=-DNIU_TX_MULTI_DMA_P1=0x0100 >
179<runargs -midas_args=-DNIU_TX_PKT_CNT=0x20 -vcs_run_args=+TX_PKT_LEN=200 >
180FcNiu_tx_MULTI_PORT_DMA_rand_0101 tx_MULTI_PORT_DMA_rand_0101.s
181</runargs>
182</runargs>
183</runargs>
184</runargs>
185</runargs>
186
187</runargs>
188</runargs>
189</runargs>
190</runargs>
191</runargs>
192</runargs>
193</runargs>
194
195</Fc_Niu_Multi>
Full OpenSPARC design & verification tarball including full HDL.