projects / OpenSPARC-T2-DV / blame
? search:
summary | tags | clone url | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / diaglists / fc / Fc_Niu_Multi_Perf.diaglist
CommitLineData
86530b38
AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: Fc_Niu_Multi_Perf.diaglist
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35<Fc_Niu_Multi_Perf name=Fc_Niu_Multi_Perf>
36
37//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
38//@@ The following option could be used for debugging @@
39//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
40//-vera_build_args=VERA_DEFS_GATE=-DMEMARRAY_DEBUG
41//-vcs_run_args=+no_verilog_finish
42//-vcs_run_args=+show_delta
43//-midas_args=-DPART_0_BASE=0x200000000
44//-vcs_run_args=+DUMP_LIMIT
45//-vcs_run_args=+DUMP_NIU
46//-vcs_run_args=+DUMP_PEU
47//-vcs_run_args=+DUMP_ENV
48//-vcs_run_args=+DUMP_SIU
49//-vcs_run_args=+DUMP_L2_1
50//-vcs_run_args=+DUMP_MCU
51//-vcs_run_args=+debussy
52//-vcs_run_args=+debug_all
53//-vcs_run_args=+RXWRITE_TIMEOUT=20000
54//-vcs_run_args=+ccxPktPrint=all
55//-vcs_run_args=+report_global_print_threshold=RPRT_DEBUG_1
56//-vcs_run_args=+ENABLE_MAC_HDR_DEBUG
57//-vcs_run_args=+TX_VERBOSE
58//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
59//@@ Rx 64B Packets Tx 64B Packets MULTI_PORT/MULTI_DMA @@
60//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
61<runargs -sas -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 >
62<runargs -vcs_run_args=+MAC_SPEED0=10000 -midas_args=-DMAC_SPEED0=10000 >
63<runargs -vcs_run_args=+MAC_SPEED1=10000 -midas_args=-DMAC_SPEED1=10000 >
64<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
65<runargs -vcs_run_args=+GET_MAC_PORTS=01 -vcs_run_args=+ORIG_META -vcs_run_args=+displaySysRdWr >
66<runargs -vcs_run_args=+PCS_SERDES -midas_args=-DPCS_SERDES >
67
68<runargs -vcs_run_args=+RX_TEST -midas_args=-DRX_TEST >
69<runargs -vcs_run_args=+MULTI_TEST -midas_args=-DMULTI_TEST >
70<runargs -vcs_run_args=+NIU_RX_MULTI_PORT -midas_args=-DNIU_RX_MULTI_PORT >
71<runargs -midas_args=-DNIU_RX_MULTI_DMA=0x11 -vcs_run_args=+NIU_RX_MULTI_DMA=0x11 >
72<runargs -midas_args=-DRXMAC_PKTCNT=0x7d0 -vcs_run_args=+RXMAC_PKTCNT=2000 >
73
74<runargs -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST >
75<runargs -vcs_run_args=+NIU_TX_MULTI_TEST -midas_args=-DNIU_TX_MULTI_TEST >
76<runargs -vcs_run_args=+NIU_TX_MULTI_PORT -midas_args=-DNIU_TX_MULTI_PORT >
77<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P0=0001 -midas_args=-DNIU_TX_MULTI_DMA_P0=0x0001 >
78<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P1=0100 -midas_args=-DNIU_TX_MULTI_DMA_P1=0x0100 >
79<runargs -midas_args=-DNIU_TX_PKT_CNT=0x200 >
80
81<runargs -vcs_run_args=+RX_BUF_SIZ0=256 -midas_args=-DRX_BUF_SIZ0=0x100 >
82<runargs -vcs_run_args=+RX_BUF_SIZ1=1024 -midas_args=-DRX_BUF_SIZ1=0x400 >
83<runargs -vcs_run_args=+RX_BUF_SIZ2=2048 -midas_args=-DRX_BUF_SIZ2=0x800 >
84<runargs -vcs_run_args=+RX_BLKSZ=4 -vcs_run_args=+USE_RANDOM_ADDRESS>
85
86<runargs -midas_args=-DNIU_TX_PKT_LEN_P0=0x40 -vcs_run_args=+NIU_TX_PKT_LEN_P0=64 >
87<runargs -midas_args=-DNIU_TX_PKT_LEN_P1=0x40 -vcs_run_args=+NIU_TX_PKT_LEN_P1=64 >
88Fc_Niu_Basic_TxRx_MULTI_1DMA_Rx64_Tx64 FcNiuBasicTxRx_MULTI_1DMA_Rx64_Tx64.s
89</runargs>
90</runargs>
91
92<runargs -midas_args=-DNIU_TX_PKT_LEN_P0=0x5dc -vcs_run_args=+NIU_TX_PKT_LEN_P0=1500 >
93<runargs -midas_args=-DNIU_TX_PKT_LEN_P1=0x5dc -vcs_run_args=+NIU_TX_PKT_LEN_P1=1500 >
94Fc_Niu_Basic_TxRx_MULTI_1DMA_Rx64_Tx1500 FcNiuBasicTxRx_MULTI_1DMA_Rx64_Tx1500.s
95</runargs>
96</runargs>
97
98<runargs -midas_args=-DNIU_TX_PKT_LEN_P0=40 -vcs_run_args=+NIU_TX_PKT_LEN_P0=64 >
99<runargs -midas_args=-DNIU_TX_PKT_LEN_P1=40 -vcs_run_args=+NIU_TX_PKT_LEN_P1=64 >
100Fc_Niu_Basic_TxRx_MULTI_1DMA_Rx1500_Tx64 FcNiuBasicTxRx_MULTI_1DMA_Rx1500_Tx64.s
101</runargs>
102</runargs>
103
104<runargs -midas_args=-DNIU_TX_PKT_LEN_P0=0x5dc -vcs_run_args=+NIU_TX_PKT_LEN_P0=1500 >
105<runargs -midas_args=-DNIU_TX_PKT_LEN_P1=0x5dc -vcs_run_args=+NIU_TX_PKT_LEN_P1=1500 >
106Fc_Niu_Basic_TxRx_MULTI_1DMA_Rx1500_Tx1500 FcNiuBasicTxRx_MULTI_1DMA_Rx1500_Tx1500.s
107</runargs>
108</runargs>
109
110</runargs>
111</runargs>
112</runargs>
113</runargs>
114</runargs>
115</runargs>
116
117</runargs>
118</runargs>
119</runargs>
120</runargs>
121</runargs>
122
123</runargs>
124</runargs>
125</runargs>
126</runargs>
127</runargs>
128</runargs>
129
130</runargs>
131</runargs>
132</runargs>
133</runargs>
134
135//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
136//@@ Full DMA Multi-Port/Multi-DMA Case (16 DMA for Tx and 8 DMA for Rx) @@
137//@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
138<runargs -sas -finish_mask=3 -midas_args=-DCMP_THREAD_START=0x3 -vcs_run_args=+displaySysRdWr >
139<runargs -vcs_run_args=+PCS_SERDES -midas_args=-DPCS_SERDES >
140<runargs -vcs_run_args=+ORIG_META -vcs_run_args=+GET_MAC_PORTS=01 >
141<runargs -vcs_run_args=+MAC_SPEED0=10000 -midas_args=-DMAC_SPEED0=10000 >
142<runargs -vcs_run_args=+MAC_SPEED1=10000 -midas_args=-DMAC_SPEED1=10000 >
143<runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
144
145<runargs -vcs_run_args=+RX_TEST -midas_args=-DRX_TEST >
146<runargs -midas_args=-DNIU_RX_MULTI_DMA=0xff -vcs_run_args=+NIU_RX_MULTI_DMA=0xff >
147<runargs -vcs_run_args=+MULTI_TEST -midas_args=-DMULTI_TEST >
148<runargs -vcs_run_args=+NIU_RX_MULTI_PORT -midas_args=-DNIU_RX_MULTI_PORT >
149<runargs -midas_args=-DRXMAC_PKTCNT=0x40 -vcs_run_args=+RXMAC_PKTCNT=64 >
150
151<runargs -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST >
152<runargs -vcs_run_args=+NIU_TX_MULTI_TEST -midas_args=-DNIU_TX_MULTI_TEST >
153<runargs -vcs_run_args=+NIU_TX_MULTI_PORT -midas_args=-DNIU_TX_MULTI_PORT >
154<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P0=00ff -midas_args=-DNIU_TX_MULTI_DMA_P0=0x00ff >
155<runargs -vcs_run_args=+NIU_TX_MULTI_DMA_P1=ff00 -midas_args=-DNIU_TX_MULTI_DMA_P1=0xff00 >
156<runargs -midas_args=-DNIU_TX_PKT_CNT=0x80 >
157<runargs -midas_args=-DNIU_TX_PKT_LEN_P0=0x80 -vcs_run_args=+NIU_TX_PKT_LEN_P0=128 >
158<runargs -midas_args=-DNIU_TX_PKT_LEN_P1=0x80 -vcs_run_args=+NIU_TX_PKT_LEN_P1=128 >
159
160Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
161
162<runargs -vcs_run_args=+CMPDR_RATIO_2.00 >
163Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
164</runargs>
165
166<runargs -vcs_run_args=+CMPDR_RATIO_2.25 >
167Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
168</runargs>
169
170<runargs -vcs_run_args=+CMPDR_RATIO_2.50 >
171Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
172</runargs>
173
174<runargs -vcs_run_args=+CMPDR_RATIO_2.75 >
175Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
176</runargs>
177
178<runargs -vcs_run_args=+CMPDR_RATIO_3.00 >
179Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
180</runargs>
181
182<runargs -vcs_run_args=+CMPDR_RATIO_3.25 >
183Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
184</runargs>
185
186<runargs -vcs_run_args=+CMPDR_RATIO_3.50 >
187Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
188</runargs>
189
190<runargs -vcs_run_args=+CMPDR_RATIO_3.75 >
191Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
192</runargs>
193
194<runargs -vcs_run_args=+CMPDR_RATIO_4.00 >
195Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
196</runargs>
197
198<runargs -vcs_run_args=+CMPDR_RATIO_4.25 >
199Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
200</runargs>
201
202<runargs -vcs_run_args=+CMPDR_RATIO_4.50 >
203Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
204</runargs>
205
206<runargs -vcs_run_args=+CMPDR_RATIO_4.75 >
207Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
208</runargs>
209
210<runargs -vcs_run_args=+CMPDR_RATIO_5.00 >
211Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
212</runargs>
213
214<runargs -vcs_run_args=+CMPDR_RATIO_5.25 >
215Fc_Niu_Basic_TxRx_MULTI_FFFF_DMA_FF_DMA FcNiuBasicTxRx_MULTI_FFFF_DMA_FF_DMA.s
216</runargs>
217
218</runargs>
219</runargs>
220</runargs>
221</runargs>
222</runargs>
223</runargs>
224
225</runargs>
226</runargs>
227</runargs>
228</runargs>
229</runargs>
230
231</runargs>
232</runargs>
233</runargs>
234</runargs>
235</runargs>
236</runargs>
237</runargs>
238</runargs>
239
240</Fc_Niu_Multi_Perf>
Full OpenSPARC design & verification tarball including full HDL.