Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / diag / diaglists / isa / isa_1215.diaglist

// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: isa_1215.diaglist
// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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// GNU General Public License for more details.
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#if (! defined CCM && ! defined FC)

<sys(isa_1215) name=sys(isa_1215)>
<sys(all)>
<sys(all_T2)>
<sys(nightly)>
 isa3_va_watchpoint           isa3_va_watchpoint.s
 isa3_pa_watchpoint           isa3_pa_watchpoint.s
 isa3_1215htraps1             isa3_1215htraps1.s
 isa3_privileged_action       isa3_privileged_action.s
 isa3_fdacc_protection        isa3_fdacc_protection.s
 spc_trans_test0              spc_trans_test0.s
 isa3_align_trap              isa3_align_trap.s
 isa3_core_id                 isa3_core_id.s                 -nosas
 isa3_fp_disable_1215_0x20    isa3_fp_disable_1215_0x20.s    -sas
 isa3_fp_excIeee_1215_0x21    isa3_fp_excIeee_1215_0x21.s    -sas
 isa3_fp_excOther_1215_0x22   isa3_fp_excOther_1215_0x22.s   -sas
 isa3_int_div0_1215_0x28      isa3_int_div0_1215_0x28.s      -sas
//  isa3_mod_arith_int_1215_0x3d isa3_mod_arith_int_1215_0x3d.s -nosas
 isa3_1215hsysmatrap          isa3_1215hsysmatrap.s           
 traps_34_35_36               traps_34_35_36.s
 traps_save_restore           traps_save_restore.s
#if (defined CMP1 || defined SPC)
 isa3_asi_cmp_core_1          isa3_asi_cmp_core_1.s          -vcs_run_args=+thread=1
 isa3_asi_cmp_core_2          isa3_asi_cmp_core_2.s          -vcs_run_args=+thread=ff
 isa3_1215ivtrap              isa3_1215ivtrap.s     	     -vcs_run_args=+thread=ff
#endif
 isa3_trap_0x30	              isa3_trap_0x30.s
 isa3_trap_0x3e	              isa3_trap_0x3e.s
 isa3_trap_0x3f	              isa3_trap_0x3f.s
 isa3_trap_0x8	              isa3_trap_0x8.s

#if (!defined FC)
 isa3_mt_hwtw1                isa3_mt_hwtw1.s -vcs_run_args=+thread=all
#endif
#if (defined FC)
 isa3_mt_hwtw1                isa3_mt_hwtw1.s -midas_args=-DCMP_THREAD_START=all -finish_mask=all
#endif


//turning off lsu_mon. The user event in the diag are getting triggered multiple times for each thread,
//causing them to take XIR even in the good trap loop. This causes diag to exeucte stores
//in the xir handler and good_trap handler after it has reached the gppd trap causing simulation
//to fail woith "stores pending at end of simulation" 
//Turning of lsu_mon

#if (defined SPC)
 isa3_xir_121503              isa3_xir_121503.s            -vcs_run_args=+thread=all -vcs_run_args=+intr_en=all -vcs_run_args=+intr_vect=3 -vcs_run_args=+intr_type=1 -vcs_run_args=+intr_wait=3000 -vcs_run_args=+intr_delay=100 -vcs_run_args=+lsu_mon_off
#endif
 isa3_intlevel_121503         isa3_intlevel_121503.s       -vcs_run_args=+thread=all
 isa3_mondo_121503            isa3_mondo_121503.s          -vcs_run_args=+thread=all
 tsotool_1t_75971             tsotool_1t_75971.s           -midas_args=-allow_tsb_conflicts

</sys(nightly)>
</sys(all_T2)>
</sys(all)>
</sys(isa_1215)>

#endif