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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / diaglists / mss / mss_l2_qual.diaglist
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: mss_l2_qual.diaglist
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#ifndef SYSNAME
36# ifdef FC8
37// // FC8 parameters
38# define SYSNAME fc8
39# define sys(x) mss_fc8_ ## x
40# else
41// // FC1 parameters
42# define SYSNAME fc1
43# define sys(x) mss_fc1_ ## x
44# endif
45#endif
46//
47#ifdef SETMODREL
48# define MODREL_2c1r -vcs_rel_name=fc1_dimm8_1rank_dual
49#else
50# define MODREL_2c1r
51#endif
52//
53//==============================================================================
54
55<sys(mss_l2_qualify)>
56<sys(l2_qual) name=sys(l2_qual)>
57
58<sys(build_l2_2c1r) sys=SYSNAME -sunv_run -vcs_build -zeroIn_build -config_rtl=ZIN_USE_CORE_CHECKERS -vcs_build_args=+define+DEBUG_PIPE -vcs_build_args=+define+FBDIMM_NUM_8 -vcs_build_args=+define+DUAL_CHANNEL>
59
60// Always run with TSO_CHECKER enabled
61<runargs MODREL_2c1r -sas_run_args=-DTSO_CHECKER -sas>
62
63#if (!defined FC)
64<sys(all)>
65#endif
66<sys(nightly)>
67<runargs -drm_cpufreq="1200 .." >
68//---------------------------------------------------------------------------
69// Upto 8-threaded diags to be run on 1 core benches, or
70// multicore (2,4 core) benches, with PORTABLE_CORE
71//--------------------------------------------------------------------------
72
73//---DMA diags {{{
74<runargs -fast_boot -drm_freeram=1500 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DCMP_THREAD_START=ALL -finish_mask=all -midas_args=+allow_tsb_conflicts -vcs_run_args=+l2esr_mon_off -vcs_run_args=+ios_0in_ras_chk_off -sas_run_args=-DNO_TSO_CHECKER>
75#include "dma_qual.diaglist"
76</runargs>
77//---DMA diags }}}
78
79//------------Diags for Non 8 core benches -------------------------------{{{
80#if(!defined FC8 && !defined CCM8 && !defined CMP8)
81
82//---tsotool diag {{{
83<runargs -max_cycle=+3000000 -vcs_run_args=+TIMEOUT=10000 -drm_freeram=2000 -vcs_run_args=+finish_mask=all -midas_args=-DCMP_THREAD_START=ALL -vcs_run_args=+l2esr_mon_off -midas_args=-DPART_0_BASE=0x0 -midas_args=-allow_tsb_conflicts -fast_boot -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+8_FBDIMMS -vcs_run_args=+l2cpx_errmon_off>
84
85n2_8t-blkinit_weight_83078_doff n2_8t-blkinit_weight_83078.s -midas_args=-DCREGS_LSU_CTL_REG_DC=0
86n2_8t-blkinit_weight_83078_ioff n2_8t-blkinit_weight_83078.s -midas_args=-DCREGS_LSU_CTL_REG_IC=0
87n2_8t-blkinit_weight_83078_l2off n2_8t-blkinit_weight_83078.s -midas_args=-DCREGS_L2_CTL_REG_DIS=1 -midas_args=-DCREGS_LSU_CTL_REG_DC=0 -midas_args=-DCREGS_LSU_CTL_REG_IC=0
88n2_8t-blkinit_weight_83078_l2dir n2_8t-blkinit_weight_83078.s -midas_args=-DCREGS_L2_CTL_REG_ASSOCDIS=1
89
90</runargs>
91
92//---tsotool diag }}}
93
94//---indra diag {{{
95<runargs -max_cycle=+3000000 -vcs_run_args=+TIMEOUT=10000 -drm_freeram=2000 -vcs_run_args=+finish_mask=all -midas_args=-DCMP_THREAD_START=ALL -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-allow_tsb_conflicts -fast_boot -vcs_run_args=+8_FBDIMMS>
96
97n2_prefetch_ice n2_prefetch_ice.s
98n2_blkinit_l2 n2_blkinit_l2.s
99n2_blkinit_l2off n2_blkinit_l2.s -midas_args=-DCREGS_L2_CTL_REG_DIS=1 -midas_args=-DCREGS_LSU_CTL_REG_DC=0 -midas_args=-DCREGS_LSU_CTL_REG_IC=0
100n2_blkinit_l2_xmask n2_blkinit_l2_xmask.s
101n2_blkinit_l2_ua n2_blkinit_l2_ua.s
102n2_blkinit_l2_stb n2_blkinit_l2_stb.s
103n2_blkinit_l2_sth n2_blkinit_l2_sth.s
104n2_blkinit_l2_stw n2_blkinit_l2_stw.s
105n2_blkinit_l2_stx n2_blkinit_l2_stx.s
106n2_blkinit_l2_std n2_blkinit_l2_std.s
107n2_stpipeline n2_stpipeline.s
108n2_l2replacement n2_l2replacement.s
109n2_i_n_d n2_i_n_d.s
110// single thread test ensure that all 4ways of dcache are used. Selfchecking test need turn off sas.
111lsu_lru_test_0 lsu_lru_test_0.s -nosas -midas_args=-DCMP_THREAD_START=0x0000000000000001 -finish_mask=01 -midas_args=-DPART_0_BASE=0x200000000
112
113fc1_l2_mcu_intf1 fc1_mcu_106920_ind.s -midas_args=-DCMP_THREAD_START=ALL -vcs_run_args=+DIMM_SIZE_2G -vcs_run_args=+SYSCLK_166 -vcs_run_args=+CMPDR_RATIO_4.25 -midas_args=-DPART_0_BASE=0x0 -midas_args=-DHBOOT_HV_ONLY -midas_args=-DCREGS_LSU_CTL_REG_DC=0 -midas_args=-DCREGS_LSU_CTL_REG_IC=0
114
115fc1_l2_mcu_intf2 fc1_mcu_106860_ind.s -midas_args=-DCMP_THREAD_START=ALL -vcs_run_args=+DIMM_SIZE_2G -vcs_run_args=+SYSCLK_166 -vcs_run_args=+CMPDR_RATIO_4.25 -midas_args=-DPART_0_BASE=0x0 -midas_args=-DHBOOT_HV_ONLY -midas_args=-DCREGS_LSU_CTL_REG_DC=0 -midas_args=-DCREGS_LSU_CTL_REG_IC=0
116
117fc1_l2_mcu_intf3 fc1_106616_ind.s -midas_args=-DCMP_THREAD_START=ALL -vcs_run_args=+DIMM_SIZE_2G -vcs_run_args=+SYSCLK_166 -vcs_run_args=+CMPDR_RATIO_4.25 -midas_args=-DPART_0_BASE=0x0 -midas_args=-DHBOOT_HV_ONLY -midas_args=-DCREGS_LSU_CTL_REG_DC=0 -midas_args=-DCREGS_LSU_CTL_REG_IC=0
118
119fc1_l2_mcu_hash1 fc1_mcu_106920_ind.s -midas_args=-DCMP_THREAD_START=ALL -vcs_run_args=+DIMM_SIZE_2G -vcs_run_args=+SYSCLK_166 -vcs_run_args=+CMPDR_RATIO_4.25 -midas_args=-DPART_0_BASE=0x0 -midas_args=-DHBOOT_HV_ONLY -midas_args=-DCREGS_LSU_CTL_REG_DC=0 -midas_args=-DCREGS_LSU_CTL_REG_IC=0 -vcs_run_args=+hash_on
120
121fc1_l2_mcu_hash2 fc1_mcu_106860_ind.s -midas_args=-DCMP_THREAD_START=ALL -vcs_run_args=+DIMM_SIZE_2G -vcs_run_args=+SYSCLK_166 -vcs_run_args=+CMPDR_RATIO_4.25 -midas_args=-DPART_0_BASE=0x0 -midas_args=-DHBOOT_HV_ONLY -midas_args=-DCREGS_LSU_CTL_REG_DC=0 -midas_args=-DCREGS_LSU_CTL_REG_IC=0 -vcs_run_args=+hash_on
122
123fc1_l2_mcu_hash3 fc1_106616_ind.s -midas_args=-DCMP_THREAD_START=ALL -vcs_run_args=+DIMM_SIZE_2G -vcs_run_args=+SYSCLK_166 -vcs_run_args=+CMPDR_RATIO_4.25 -midas_args=-DPART_0_BASE=0x0 -midas_args=-DHBOOT_HV_ONLY -midas_args=-DCREGS_LSU_CTL_REG_DC=0 -midas_args=-DCREGS_LSU_CTL_REG_IC=0 -vcs_run_args=+hash_on
124
125fc1_cross_inval fc1_cross_inval_ind.s -midas_args=-DCMP_THREAD_START=ALL -vcs_run_args=+finish_mask=all -fast_boot -midas_args=-DPART_0_BASE=0x0 -midas_args=-DHBOOT_HV_ONLY
126
127fc1_cross_inval_hash fc1_cross_inval_ind.s -midas_args=-DCMP_THREAD_START=ALL -vcs_run_args=+finish_mask=all -fast_boot -midas_args=-DPART_0_BASE=0x0 -midas_args=-DHBOOT_HV_ONLY -vcs_run_args=+hash_on
128
129</runargs>
130
131//---indra diag }}}
132
133
134//---ccx diag {{{
135<runargs -fast_boot -midas_args=-allow_tsb_conflicts -max_cycle=+3000000 -vcs_run_args=+TIMEOUT=10000 -midas_args=-DCMP_THREAD_START=ALL -finish_mask=all -midas_args=-DCREGS_LSU_CTL_REG_DC=0 -midas_args=-DCREGS_LSU_CTL_REG_IC=0 -vcs_run_args=+l2esr_mon_off -midas_args=-DPART_0_BASE=0x200000000 -vcs_run_args=+8_FBDIMMS -midas_args=-DL2_REG_PROG -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2cpx_errmon_off>
136// Add diag here
137</runargs>
138
139//---ccx diag }}}
140
141//---MPGen diags {{{
142<runargs>
143// Add diag here
144</runargs>
145//---MPGen diags }}}
146
147#else
148//------------------------------------------------------------------------}}}
149
150//---------------------------------------------------------------------------
151// Upto 64-threaded diags to be run on 8 core benches
152//---------------------------------------------------------------------------
153//------------Diags for 8 core benches------------------------------------{{{
154
155// --- tsotool diags // {{{
156<runargs -fast_boot -midas_args=-allow_tsb_conflicts -max_cycle=+3000000 -vcs_run_args=+TIMEOUT=10000 -drm_freeram=2000 -vcs_run_args=+show_load -vcs_run_args=+show_delta -finish_mask=all -midas_args=-DCMP_THREAD_START=ALL -vcs_run_args=+l2esr_mon_off -vcs_run_args=+8_FBDIMMS -midas_args=-DL2_REG_PROG -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2cpx_errmon_off>
157// Add diag here
158</runargs>
159// --- tsotool diags // }}}
160
161//---ccx diag real 64 threads {{{
162<runargs -fast_boot -midas_args=-allow_tsb_conflicts -vcs_run_args=+show_delta -max_cycle=+3000000 -vcs_run_args=+TIMEOUT=10000 -finish_mask=all -midas_args=-DCMP_THREAD_START=ALL -midas_args=-DCREGS_LSU_CTL_REG_DC=0 -midas_args=-DCREGS_LSU_CTL_REG_IC=0 -midas_args=-DPORTABLE_CORE -vcs_run_args=+l2esr_mon_off -midas_args=-DPART_0_BASE=0x200000000 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+8_FBDIMMS -vcs_run_args=+l2cpx_errmon_off>
163// Add diag here
164</runargs>
165//---ccx diag real 64 threads }}}
166
167#endif
168//========================================================================}}}
169//===========================================================================
170
171</runargs>
172</sys(nightly)>
173#if (!defined FC)
174</sys(all)>
175#endif
176</runargs>
177
178</sys(build_l2_2c1r)>
179
180</sys(l2_qual)>
181
182</sys(mss_l2_qualify)>
Full OpenSPARC design & verification tarball including full HDL.