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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / fc.diaglist
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: fc.diaglist
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#ifndef SYSNAME
36#define SYSNAME fc
37#define sys(x) fc_ ## x
38#define FC
39#endif
40
41//----- Start of CCM -------- Edit below this line --------------------------
42
43<runargs -sas >
44<runargs -drm_freeram=1500 >
45#ifndef ZEROINCOV
46<runargs -vcs_run_args=+0in_no_checksim_db -vcs_run_args=+0in_no_statistics >
47#endif
48
49//----------------------------------------------------------
50//----------------------------------------------------------
51//
52// MINI RUN
53// This MUST be run prior to checkin by anyone
54//
55// (Explicitly enumerate the mini regression diags and args)
56//
57
58<sys(fsr_daily)>
59 //========model build with fsr rtl and IDT AMB model (default is 166mhz sys clk) ==========
60<sys(fsr_daily_build) sys=fc1 -sunv_run -config_cpp_args=-DFSR_RTL=FSR_RTL -config_cpp_args=-DIDT_AMB >
61<runargs -tg_seed=1 -fast_boot -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DL2_REG_PROG>
62<runargs -config_cpp_args=-DFSR_RTL=FSR_RTL -config_cpp_args=-DIDT_AMB >
63<runargs -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -vcs_run_args=+mcu_errmon_disable>
64<wrm_rst name=wrm_rst>
65swreset swreset.s -midas_args=-DRESET_STAT_CHECK -midas_args=-DRESET_CHECK_REG -nofast_boot -vcs_run_args=+lsu_mon_off -vcs_run_args=+NO_MCU_CSR_SLAM -midas_args=-DNO_SLAM_INIT_MCUCTL -midas_args=-DBOOTPROM_INIT -vcs_run_args=+lsu_mon_off -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+l2esr_mon_off -vcs_run_args=+SSI_CLK_4 -drm_cpufreq="1200 .."
66</wrm_rst>
67#include "diaglists/fc_mini.diaglist"
68
69<runargs -vcs_run_args=+PEU_TEST -sas>
70<peu_wrm_rst name=peu_wrm_rst>
71 RegWrWrmrst RegWrWrmrst.s
72 PCIeDMARw_100mhz PCIeDMARw.s -vcs_run_args=+PCIE_REF_CLK_100 -midas_args=-DPCIE_REF_CLK_100 -midas_args=-DRESET_STAT_CHECK -midas_args=-DRESET_CHECK_REG -midas_args=-DH_HT0_Hw_Corrected_Error_0x63=hw_corrected_error_handler
73 PCIeHotRst PCIeHotRst.s
74 PCIeLinkDisable PCIeLinkDisable.s
75 PCIeEgrDPeDrainState PCIeEgrDPeDrainState.s -vcs_run_args=+no_dmu2peu_edb_parity
76 PCIeEgrHPeDrainState PCIeEgrHPeDrainState.s
77 PCIeIgrHPeDrainState PCIeIgrHPeDrainState.s
78</peu_wrm_rst>
79</runargs> // -vcs_run_args=+PEU_TEST -sas
80</runargs> // -vcs_run_args=+l2cpx_mon_off ...
81</runargs> // -config_cpp_args=-DFSR_RTL=FSR_RTL ...
82</runargs> // -tg_seed=1 ...
83
84#include "diaglists/fc/fc_fsr_err.diaglist"
85
86// ------------------------------------------------------------
87// Random reset diags
88// ------------------------------------------------------------
89<runargs -tg_seed=1 -fast_boot -config_cpp_args=-DIDT_AMB -nosas -vcs_run_args=+notlb_sync -midas_args=-DRESET_STAT_CHECK -midas_args=-DRESET_CHECK_REG -vcs_run_args=+FAST_BISI -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+gchkr_off >
90<rand_wrm_rst name=rand_wrm_rst>
91
92 TB_Rst_MemStLd rst_mem_st_ld.s -midas_args=-DRST_DIAG_LOOP_COUNT=20 -vcs_run_args=+TB_RANDOM_PB_RST
93 SW_PB_Rst_MemStLd sw_pb_rst_mem_op.s -vcs_run_args=+SW_RANDOM_PB_RST
94
95 TB_Pwron_Rst_MemStLd rst_mem_st_ld.s -midas_args=-DRST_DIAG_LOOP_COUNT=20 -vcs_run_args=+TB_RANDOM_POR -vcs_run_args=+noDebugChecks
96 SW_Pwron_Rst_MemStLd sw_pwron_rst_mem_op.s -vcs_run_args=+SW_RANDOM_POR
97
98</rand_wrm_rst>
99</runargs>
100// ------------------------------------------------------------
101</sys(fsr_daily_build)>
102
103 //========model build with fsr rtl and IDT AMB model (133mhz sys clk) ==========
104<sys(fsr_sysclk133_build) sys=fc1 -sunv_run -config_cpp_args=-DFSR_RTL=FSR_RTL -config_cpp_args=-DIDT_AMB -vcs_build_args=+define+DDR2_533 -vcs_build_args=+define+FBDIMM_NUM_8+ >
105<runargs -vcs_run_args=+SYSCLK_133 -config_cpp_args=-DFSR_RTL=FSR_RTL -config_cpp_args=-DIDT_AMB >
106<runargs -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DL2_REG_PROG>
107<runargs -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -vcs_run_args=+mcu_errmon_disable> // these monitors do not handle WMR reset?
108#include "diaglists/ccu/ccu_sysclk133.diaglist"
109</runargs>
110</runargs>
111</runargs>
112</sys(fsr_sysclk133_build)>
113
114</sys(fsr_daily)>
115
116<sys(jtag_debug_build) sys=fc1 -sunv_run -config_cpp_args=-DUSE_TAP_DRIVER -zeroIn_build -vcs_build_args=+define+FC_COVERAGE -vcs_build_args=+define+FBDIMM_NUM_1+>
117#include "diaglists/fc/fc_jtag_debug.diaglist"
118#include "diaglists/tcu/fc_tcu_clkstop.diaglist"
119</sys(jtag_debug_build)>
120
121//----------------------------------------------------------
122
123<sys(all_build) sys=fc1 -sunv_run -zeroIn_build -vcs_build_args=+define+FBDIMM_NUM_8+>
124<runargs -fast_boot -drm_type=rgrs -tg_seed=1 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DL2_REG_PROG > // seed locked to 1 for regression
125
126#include "diaglists/memop/memop.diaglist"
127
128// Diaglist for ported mem operation diags
129#include "diaglists/misc/ported_arch_diags.diaglist"
130
131#include "diaglists/fc/fc.diaglist"
132
133<runargs -vcs_run_args=+8_FBDIMMS -midas_args=-DPART_0_BASE=0x1000000000>
134#include "diaglists/fc/fc_err.diaglist"
135#include "diaglists/fc/fc_adv_err.diaglist"
136</runargs>
137
138#ifndef FC_NO_NIU_T2
139#include "diaglists/fc/fc_niu.diaglist"
140#endif
141
142#include "diaglists/tso/tso_ccm.diaglist"
143
144#include "diaglists/ccu/ccu.diaglist"
145
146#include "diaglists/core_qual.diaglist"
147
148//#include "diaglists/spu/spu.diaglist"
149
150#include "diaglists/isa/isa3.diaglist"
151
152#include "diaglists/isa/isa2_all.diaglist"
153
154
155#include "diaglists/isa/isa1.diaglist"
156
157#include "diaglists/isa/isa_1215.diaglist"
158
159#include "diaglists/pmu/spc_pmu.diaglist"
160
161
162#include "diaglists/fgu/fgu.diaglist"
163
164#include "diaglists/exu/exu.diaglist"
165
166#include "diaglists/misc/n1_port.diaglist"
167
168#include "diaglists/isa/v9_kaos.diaglist"
169
170#include "diaglists/ifu/if.diaglist"
171
172#include "diaglists/mcu/mcu.diaglist"
173
174#include "diaglists/cmp/cmp.diaglist"
175
176</runargs>
177
178</sys(all_build)>
179
180
181// build run args same as fc_all
182<sys(cov_build) sys=fc1 -sunv_run -zeroIn_build -vcs_build_args=+define+FBDIMM_NUM_8+>
183<runargs -fast_boot -drm_type=rgrs -tg_seed=1 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DL2_REG_PROG > // seed locked to 1 for regression
184
185#ifndef FC_NO_NIU_T2
186#include "diaglists/cov/niu_cov.diaglist"
187#include "diaglists/cov/piu_cov.diaglist"
188#endif
189
190</runargs>
191</sys(cov_build)>
192
193
194////////////////////////////////////////////////////////////////////////////////////////////
195//
196// added this group of tests for OpenSparc T2 (called fc mini_T2)
197//
198////////////////////////////////////////////////////////////////////////////////////////////
199
200
201<sys(mini_T2_build) sys=fc1 -vera_build -vcs_build -vcs_build_args=+define+FBDIMM_NUM_1+>
202<sys(mini_T2)>
203<runargs -sys=fc1 -vcs_run_args=+1_FBDIMM -tg_seed=1 -fast_boot -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DL2_REG_PROG>
204
205<runargs -sas -nogzip -report -vcs_run_args=+show_delta>
206
207// has 6 tests that should pass
208
209<fc_pm_mini name=fc_pm_mini>
210<runargs -vcs_run_args=+bank_set_mask=3 -vcs_run_args=+core_set_mask=01>
211memop_ccx_packets memop_ccx_packets.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
212</runargs>
213</fc_pm_mini>
214
215<fc_memop_mini name=fc_memop_mini>
216memop_all_atomics memop_all_atomics.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
217memop_l2_disable memop_l2_disable.s -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1
218memop_ccx_packets memop_ccx_packets.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
219memop_word_byte_mask memop_word_byte_mask.s -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 -nofast_boot
220</fc_memop_mini>
221
222
223<fc_interrupt_mini name=fc_interrupt_mini>
224interrupt_SWVR_INTR_R interrupt_SWVR_INTR_R.s
225</fc_interrupt_mini>
226
227
228</runargs>
229</runargs>
230</sys(mini_T2)>
231</sys(mini_T2_build)>
232
233
234
235////////////////////////////////////////////////////////////////////////////////////////////////////
236
237<sys(all_T2_build) sys=fc1 -vera_build -vcs_build -vcs_build_args=+define+FBDIMM_NUM_8+>
238<sys(all_T2)>
239<runargs -sys=fc1 -fast_boot -drm_type=rgrs -tg_seed=1 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DL2_REG_PROG >
240
241
242<runargs -nosas -nogzip -report -vcs_run_args=+show_delta>
243
244// has 356 tests that should pass
245
246#include "diaglists/memop/memop.diaglist"
247
248// Diaglist for ported mem operation diags - THESE WOULDN'T RUN in fc_all
249#include "diaglists/misc/ported_arch_diags.diaglist"
250
251<sys(cmp) name=sys(cmp)>
252
253
254////////////////////////////////////////////////////////////////////////////
255// CMT diags, 1 core
256
257<runargs -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 -midas_args=-DTHREAD_COUNT=2>
258
259cmp_park_self cmp_park_self.s -midas_args=-DSYNC_THREADS -midas_args=-allow_tsb_conflicts
260
261</runargs>
262</sys(cmp)>
263
264
265<sys(interrupt) name=sys(interrupt)>
266
267////////////////////////////////////////////////////////////////////////////
268// Single-threaded interrupt diags
269<runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1>
270
271interrupt_INT_VEC_DIS interrupt_INT_VEC_DIS.s
272interrupt_INT_VEC_DIS_all2 interrupt_INT_VEC_DIS_all2.s
273interrupt_SWVR_INTR_R interrupt_SWVR_INTR_R.s
274interrupt_SWVR_INTR_W interrupt_SWVR_INTR_W.s
275interrupt_SWVR_INTR_W_all_vectors interrupt_SWVR_INTR_W_all_vectors.s
276interrupt_INTR_REC_priority interrupt_INTR_REC_priority.s
277interrupt_QUEUE_CPU_MONDO_trap interrupt_QUEUE_CPU_MONDO_trap.s
278interrupt_QUEUE_DEV_MONDO_trap interrupt_QUEUE_DEV_MONDO_trap.s
279// interrupt_SPU_interrupt interrupt_SPU_interrupt.s
280interrupt_ncu_regs_rw interrupt_ncu_regs_rw.s
281interrupt_QUEUE_CPU_MONDO_mode interrupt_QUEUE_CPU_MONDO_mode.s
282interrupt_QUEUE_DEV_MONDO_mode interrupt_QUEUE_DEV_MONDO_mode.s
283interrupt_DMU_CORE_BLK_enable1 interrupt_DMU_CORE_BLK_enable1.s
284// interrupt_pci_regs interrupt_pci_regs.s
285// interrupt_pci_pwr_msg interrupt_pci_pwr_msg.s -vcs_run_args=+PEU_TEST
286
287</runargs>
288////////////////////////////////////////////////////////////////////////////
289// 2-threaded interrupt diags
290<runargs -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 -midas_args=-DSYNC_THREADS >
291
292interrupt_SWVR_INTR_REC_mode interrupt_SWVR_INTR_REC_mode.s
293interrupt_SWVR_INTR_R_mode interrupt_SWVR_INTR_R_mode.s
294interrupt_SWVR_INTR_W_mode interrupt_SWVR_INTR_W_mode.s
295
296</runargs>
297
298
299////////////////////////////////////////////////////////////////////////////
300// Miscellaneous interrupt diags
301// interrupt_dmu_cntrl_stall interrupt_dmu_cntrl_stall.s -midas_args=-DCMP_THREAD_START=0xf -finish_mask=f -vcs_run_args=+PEU_TEST
302// interrupt_pci_spurious_INTX interrupt_pci_spurious_INTX.s -vcs_run_args=+PEU_TEST -nosas
303
304interrupt_pci_spurious_err interrupt_pci_spurious_err.s -nosas
305
306// interrupt_niu_regs_rw interrupt_niu_regs_rw.s
307// interrupt_INT_MAN_vector interrupt_INT_MAN_vector.s
308// interrupt_niu_device_id interrupt_niu_device_id.s -nosas
309
310
311////////////////////////////////////////////////////////////////////////////
312// 8-threaded interrupt diags
313
314<runargs -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff >
315
316// interrupt_INT_MAN_thread interrupt_INT_MAN_thread.s
317
318// <runargs -vcs_run_args=+PEU_TEST -nosas>
319// interrupt_dmu_intr_reloc interrupt_dmu_intr_reloc.s -midas_args=-DTHREAD_COUNT=8 -midas_args=-DSKIP_EQ_CHECK
320// interrupt_mix interrupt_mix.s
321// interrupt_pci_dup_intx interrupt_pci_dup_intx.s
322// interrupt_pci_multiple_INTX interrupt_pci_multiple_INTX.s
323// </runargs>
324
325
326</runargs>
327
328
329////////////////////////////////////////////////////////////////////////////
330// NIU interrupt diags
331
332// <runargs -vcs_run_args=+MAC_SPEED0=10000 -midas_args=-DMAC_SPEED0=10000 >
333// <runargs -vcs_run_args=+MAC_SPEED1=10000 -midas_args=-DMAC_SPEED1=10000 >
334// <runargs -vcs_run_args=+GET_MAC_PORTS=0 >
335// <runargs -vcs_run_args=+PCS_SERDES -midas_args=-DPCS_SERDES >
336// <runargs -vcs_run_args=+displaySysRdWr >
337// <runargs -vcs_run_args=+ORIG_META >
338
339// <runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
340
341// <runargs -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST >
342
343// <runargs -vcs_run_args=+TX_INT_MARK=1 >
344// <runargs -midas_args=-DNIU_TX_DMA_NUM=0 -midas_args=-DNIU_TX_PKT_CNT=1 >
345// <runargs -midas_args=-DNIU_TX_DMA_ACT_LIST=1 >
346
347// <runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 >
348
349// interrupt_ether_send interrupt_ether_send.s
350// interrupt_niu_sys_data interrupt_niu_sys_data.s
351
352// </runargs> // thread=0x1
353// </runargs> // NIU_TX_DMA_ACT_LIST
354// </runargs> // NIU_TX_DMA_NUM
355// </runargs> // TX_INT_MARK
356
357// interrupt_niutx interrupt_niutx.s -vcs_run_args=+NIU_TX_MARK_LAST_PACKET_FOR_INTERRUPT -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3
358
359// </runargs> // TX_TEST
360
361
362// <runargs -midas_args=-DRX_TEST -midas_args=-DMAC_ID=0 >
363// <runargs -midas_args=-DRXMAC_PKTCNT=0xa -vcs_run_args=+RXMAC_PKTCNT=20 -midas_args=-DSKIP_TRAPCHECK >
364
365// interrupt_niurx interrupt_niurx.s -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3
366
367// </runargs> // RX_TEST
368// </runargs> // RXMAC_PKTCNT
369
370// </runargs> // PEU_TEST
371
372
373// <runargs -midas_args=-DMAC_RX_FRAME_INTR >
374
375//interrupt_MAC interrupt_MAC.s
376
377// </runargs> // MAC_RX_FRAME_INTR
378
379// </runargs> // ORIG_META
380// </runargs> // displaySysRdWr
381// </runargs> // PCS_SERDES
382// </runargs> // GET_MAC_PORTS
383// </runargs> // MAC_SPEED1
384// </runargs> // MAC_SPEED0
385
386// interrupt_ether_receive interrupt_ether_receive.s -sas
387
388</sys(interrupt)>
389
390<sys(peu_daily) name=sys(peu_daily)>
391 <runargs -sas >
392
393
394 PCIeWrPeuDiagCsr PCIeWrPeuDiagCsr.s
395 </runargs>
396</sys(peu_daily)>
397
398<sys(pll) name=sys(pll)>
399<runargs -sas>
400
401<runargs -vcs_run_args=+bank_set_mask=3 -vcs_run_args=+core_set_mask=01>
402memop_all_atomics_pll memop_all_atomics.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -vcs_run_args=+pll_bypass -vcs_run_args=+NO_CCU_CSR_SLAM -vcs_run_args=+POR_pulse_width=4 -vcs_run_args=+gchkr_off
403
404</runargs>
405</runargs>
406
407</sys(pll)>
408
409<sys(tcu_no_tck) name=sys(tcu_no_tck)>
410<runargs -midas_args=-DINC_SOC_ERR_TRAPS -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off >
411 tcu_csr_regs_rw tcu_csr_regs_rw.s -nosas
412 tcu_regs_asi tcu_regs_asi.s
413 tcu_regs_l2 tcu_regs_l2.s
414// tcu_regs_peu tcu_regs_peu.s
415 tcu_regs_soc tcu_regs_soc.s
416 tcu_regs_bist tcu_regs_bist.s -nosas
417</runargs>
418
419<runargs -midas_args=-DINC_SOC_ERR_TRAPS -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+MCU_REG_DEFAULT_VAL -vcs_run_args=+NO_MCU_CSR_SLAM>
420 tcu_regs_dram tcu_regs_dram.s -nofast_boot
421 tcu_regs_dram_2 tcu_regs_dram_2.s -nofast_boot
422 tcu_regs_dram_piu tcu_regs_dram_piu.s -nofast_boot
423</runargs>
424
425</sys(tcu_no_tck)>
426
427<sys(dbg) name=sys(dbg)>
428<runargs -vcs_run_args=-DL2_7 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+50000 -nosas -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+DISABLE_L2_CHECKER -vcs_run_args=+BOOT_CODE_FINISH=13000000 -vcs_run_args=+TIMEOUT=10000 -vcs_run_args=+PEU_TEST>
429Debug_Event_Mcu_Ctl2 Debug_Event_Mcu2.s
430</runargs>
431
432<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off>
433Debug_Event_L2_PABank0 Debug_Event_L2PaBank.s -midas_args=-DMCU0
434Debug_Event_L2_PABank2 Debug_Event_L2PaBank.s -midas_args=-DMCU1
435Debug_Event_L2_PABank4 Debug_Event_L2PaBank.s -midas_args=-DMCU2
436Debug_Event_L2_PABank6 Debug_Event_L2PaBank.s -midas_args=-DMCU3
437Debug_Event_L2_PABank1 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU0
438Debug_Event_L2_PABank3 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU1
439Debug_Event_L2_PABank5 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU2
440Debug_Event_L2_PABank7 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU3
441</runargs>
442
443
444
445
446<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+DISABLE_L2_CHECKER>
447Debug_Event_Mcu_Ctl0 Debug_Event_Mcu.s -midas_args=-DMCU0
448Debug_Event_Mcu_Ctl1 Debug_Event_Mcu.s -midas_args=-DMCU1
449Debug_Event_Mcu_Ctl2 Debug_Event_Mcu.s -midas_args=-DMCU2
450Debug_Event_Mcu_Ctl3 Debug_Event_Mcu.s -midas_args=-DMCU3
451</runargs>
452
453<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+DISABLE_L2_CHECKER>
454Debug_Event_L2Bank0 Debug_Event_L2.s -midas_args=-DL2_0 -midas_args=-DMCU0
455Debug_Event_L2Bank2 Debug_Event_L2.s -midas_args=-DL2_2 -midas_args=-DMCU1
456Debug_Event_L2Bank4 Debug_Event_L2.s -midas_args=-DL2_4 -midas_args=-DMCU2
457Debug_Event_L2Bank6 Debug_Event_L2.s -midas_args=-DL2_6 -midas_args=-DMCU3
458</runargs>
459
460
461<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+DISABLE_L2_CHECKER>
462Debug_Event_L2Bank1 Debug_Event_L2Odd.s -midas_args=-DMCU0
463Debug_Event_L2Bank3 Debug_Event_L2Odd.s -midas_args=-DMCU1
464Debug_Event_L2Bank5 Debug_Event_L2Odd.s -midas_args=-DMCU2
465Debug_Event_L2Bank7 Debug_Event_L2Odd.s -midas_args=-DMCU3
466</runargs>
467
468
469
470
471// <runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+DISABLE_L2_CHECKER -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+l2cpx_errmon_off -max_cycle=+50000 -nosas -vcs_run_args=+l2esr_mon_off -midas_args=-DL2_0 -vcs_run_args=+ios_0in_ras_chk_off>
472// Debug_CoreSoc_Soc Debug_CoreSoc_Soc.s
473// Debug_Tester_Soc Debug_Tester_Soc.s
474// Debug_Event_L2pa Debug_Event_L2_Pa.s
475// </runargs>
476
477// <runargs -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuCtagUe -vcs_run_args=+ios_0in_ras_chk_off -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2>
478// Debug_Event_Soc Debug_Event_Soc.s
479// </runargs>
480
481// <runargs -vcs_run_args=+0in_no_statistics -fast_boot -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -nosas -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+DISABLE_L2_CHECKER -drm_type=rgrs -tg_seed=1 -sas -vcs_run_args=+PEU_TEST>
482// Debug_Pciex_Obs Debug_Pciex_Mode.s
483// </runargs>
484
485#ifndef FC_NO_NIU_T2
486<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -midas_args=-DMCU1 -vcs_run_args=+ios_0in_ras_chk_off>
487// Debug_Niu_Obs Debug_Niu_Mode.s
488</runargs>
489#endif
490
491// <runargs -midas_args=-DERR_FIELD=SiiNiuCtagCe -vcs_run_args=+ios_0in_ras_chk_off -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 -vcs_run_args=+MAC_SPEED0=10000 -vcs_run_args=+MAC_SPEED1=10000 -vcs_run_args=+GET_MAC_PORTS=0 -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING -nosas>
492// Debug_Quiscen_Mode Debug_Quiscen_Mode.s
493// </runargs>
494
495// <runargs -midas_args=-DERR_FIELD=SiiNiuCtagCe -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 -vcs_run_args=+MAC_SPEED0=10000 -vcs_run_args=+MAC_SPEED1=10000 -vcs_run_args=+GET_MAC_PORTS=0 -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING -vcs_run_args=+ios_0in_ras_chk_off -nosas>
496// Debug_Repeatable_Mode Debug_Niu_Repeatable.s
497// </runargs>
498
499// <runargs -nouse_cdms_iver -vcs_run_args=+0in_no_statistics -fast_boot -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -nosas -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+DISABLE_L2_CHECKER -tg_seed=1 -sas -vcs_run_args=+PEU_TEST>
500// Debug_Dmu_Quiscen Debug_Dmu_Quiscen.s
501// </runargs>
502
503// <runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 -vcs_run_args=+MAC_SPEED0=10000 -vcs_run_args=+MAC_SPEED1=10000 -vcs_run_args=+GET_MAC_PORTS=0 -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST -midas_args=-DTX_TEST -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING -midas_args=-DERR_FIELD=SiiDmuDParity -vcs_run_args=+DISABLE_L2_CHECKER -vcs_run_args=+ios_0in_ras_chk_off>
504// Debug_Event_Dmu Debug_Event_Dmu.s
505// </runargs>
506
507</sys(dbg)>
508
509<runargs -vcs_run_args=+8_FBDIMMS -midas_args=-DPART_0_BASE=0x1000000000>
510
511<sys(ras)>
512
513// Applied for ALL Error diags
514// esr mon off
515// CEEN and NCEEN bit OFF
516<runargs -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+siu_mon_l2err>
517
518
519
520
521// L2 RAS DIAGS
522<sys(err_l2) name=sys(err_l2)>
523
524// Need -nosas because of L2$ diagnostic load
525// Use +L2_SCRUB_FREQ=1000 to speed simulation
526// Use +L2_SCRUB_IDX=50 to match the corrupted address
527n2_err_l2_LDSC_cecc_trap n2_err_l2_LDSC_cecc_trap.s -nosas -vcs_run_args=+L2_SCRUB_FREQ=1000 -vcs_run_args=+L2_SCRUB_IDX=50
528n2_err_l2_LDSU_uecc_trap n2_err_l2_LDSU_uecc_trap.s -nosas -vcs_run_args=+L2_SCRUB_FREQ=1000 -vcs_run_args=+L2_SCRUB_IDX=50
529
530// Only for following few l2 error diags
531<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -midas_args=-DL2_LDAC_err>
532
533n2_err_l2_LDAC_tid_01.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x03 -finish_mask=03
534n2_err_l2_LDAC_tid_02.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x05 -finish_mask=05
535n2_err_l2_LDAC_tid_03.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x09 -finish_mask=09
536n2_err_l2_LDAC_tid_04.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x11 -finish_mask=11
537n2_err_l2_LDAC_tid_05.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x21 -finish_mask=21
538n2_err_l2_LDAC_tid_06.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x41 -finish_mask=41
539n2_err_l2_LDAC_tid_07.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x81 -finish_mask=81
540</runargs>
541
542//Only for following L2 RAS diags
543<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS >
544
545n2_err_L2_LDWC_cecc_trap n2_err_L2_LDWC_cecc_trap.s
546n2_err_L2_LDWC_cecc n2_err_L2_LDWC_cecc.s
547n2_err_L2_LVC_cecc_trap n2_err_L2_LVC_cecc_trap.s
548n2_err_L2_LVC_trap_inj n2_err_l2_trap_ErrInj.s -midas_args=-DLVC -midas_args=-DL2_0 -vcs_run_args=+L2VD_CE_ERR_INJECT
549n2_err_L2_LVC_cecc n2_err_L2_LVC_cecc.s
550n2_err_L2_LVC_cecc_Synd_check n2_err_L2_LVC_cecc_SyndCheck.s
551n2_err_L2_LDWU_MEU_uecc n2_err_L2_LDWU_uecc.s
552n2_err_l2_LDAC_st_cecc_trap n2_err_l2_LDAC_st_cecc_trap.s
553n2_err_l2_LDAC_st_cecc n2_err_l2_LDAC_st_cecc.s
554n2_err_l2_LDAC_cecc_trap n2_err_l2_LDAC_cecc_trap.s -midas_args=-DL2_LDAC_err
555n2_err_l2_LDAC_trap_inj n2_err_l2_trap_ErrInj.s -midas_args=-DL2_LDAC_err -midas_args=-DLDAC -midas_args=-DL2_0 -vcs_run_args=+L2DA_ERR_ENABLE
556n2_err_l2_LDAC_cecc n2_err_l2_LDAC_cecc.s
557n2_err_l2_LDAU_trap n2_err_l2_LDAU_uecc_trap.s
558//n2_err_l2_LDAU_trap_inj n2_err_l2_trap_ErrInj.s -midas_args=-DLDAU -midas_args=-DL2_0 -vcs_run_args=+L2DA_INJECT_UE
559n2_err_l2_LDAU_trap_2thrds n2_err_l2_LDAU_uecc_2thrds_trap.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
560n2_err_l2_LDAU_uecc n2_err_l2_LDAU_uecc.s
561n2_err_l2_LDAU_st_uecc_trap n2_err_l2_LDAU_st_uecc_trap.s -midas_args=-DL2_DWS_err
562n2_err_l2_LDAU_st_uecc n2_err_l2_LDAU_st_uecc.s
563n2_err_l2_LDWU_uecc n2_err_l2_LDWU_uecc.s
564n2_err_l2_csrs n2_err_l2_csrs.s
565n2_err_l2_LTC_cecc_trap n2_err_l2_LTC_cecc_trap.s
566n2_err_l2_LTC_cecc n2_err_l2_LTC_cecc.s
567n2_err_l2_LTC_4bnk_trap n2_err_l2_LTC_4bnk_cecc_trap.s -vcs_run_args=+bank_set_mask=3
568n2_err_l2_LTC_L2off_trap n2_err_l2_LTC_cecc_trap_L2off.s -vcs_run_args=+gchkr_off
569//n2_err_l2_LRU n2_err_l2_LRU.s
570n2_err_l2_LDWU_uecc_trap n2_err_l2_LDWU_uecc_trap.s -midas_args=-DL2_DWS_err
571
572
573// L2 Not Data diag, In Fc because MCU registers prog in FC
574n2_err_L2_NotData_NDSP n2_err_L2_NotData.s -midas_args=-DL2_NDSP_err
575n2_err_L2_NotData_NDSP_meu n2_err_L2_NotData_NDSP_meu.s
576n2_err_L2_NotData_NDSP_meu_trap0 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL20
577n2_err_L2_NotData_NDSP_meu_trap1 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL21
578n2_err_L2_NotData_NDSP_meu_trap2 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL22
579n2_err_L2_NotData_NDSP_meu_trap3 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL23
580n2_err_L2_NotData_NDSP_meu_trap4 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL24
581n2_err_L2_NotData_NDSP_meu_trap5 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL25
582n2_err_L2_NotData_NDSP_meu_trap6 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL26
583n2_err_L2_NotData_NDSP_meu_trap7 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL27
584
585// n2_err_L2_NotData_NDDM n2_err_L2_NotData_NDDM.s -midas_args=-DL2_NDSP_err -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
586// n2_err_L2_NotData_NDDM_meu n2_err_L2_NotData_NDDM_meu.s -midas_args=-DL2_NDDM_err -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
587// n2_err_L2_NotData_NDDM_meu_trap n2_err_L2_NotData_NDDM_meu_trap.s -midas_args=-DL2_NDDM_err -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off -midas_args=-DL20
588
589// n2_err_l2_LDRC_cecc_trap n2_err_l2_LDRC_cecc_trap.s -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
590// n2_err_l2_LDRU_cecc_trap n2_err_l2_LDRU_cecc_trap.s -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
591</runargs>
592</sys(err_l2)>
593
594
595// ADVANCED L2 RAS DIAGS
596<sys(err_l2_ADV) name=sys(err_l2_ADV)>
597
598<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS >
599n2_err_dram_L2_Off_DAU_ld_mcu0 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU0
600n2_err_dram_L2_Off_DAU_ld_mcu1 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU1
601n2_err_dram_L2_Off_DAU_ld_mcu2 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU2
602n2_err_dram_L2_Off_DAU_ld_mcu3 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU3
603
604n2_err_dram_L2_Off_DAC_st n2_err_dram_DAC_st_trap_L2_Off.s -midas_args=-DMCU0
605n2_err_dram_L2_Off_DAU_st_mcu0 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU0 -midas_args=-DL2_DWS_err
606//n2_err_dram_L2_Off_DAU_st_mcu1 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU1 -midas_args=-DL2_DWS_err
607//n2_err_dram_L2_Off_DAU_st_mcu2 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU2 -midas_args=-DL2_DWS_err
608//n2_err_dram_L2_Off_DAU_st_mcu3 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU3 -midas_args=-DL2_DWS_err
609
610n2_err_dram_L2_Off_DAC_ld_mcu0 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU0 -midas_args=-DL2_LDAC_err
611n2_err_dram_L2_Off_DAC_ld_mcu1 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU1 -midas_args=-DL2_LDAC_err
612n2_err_dram_L2_Off_DAC_ld_mcu2 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU2 -midas_args=-DL2_LDAC_err
613n2_err_dram_L2_Off_DAC_ld_mcu3 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU3 -midas_args=-DL2_LDAC_err
614
615// n2_err_dram_L2_Off_DmaRd_ce_mcu0 n2_err_dram_DmaRd_ce_L2_Off.s -midas_args=-DMCU0 -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
616
617// n2_err_dram_L2_Off_DmaRd_ue_mcu0 n2_err_dram_DmaRd_ue_L2_Off.s -midas_args=-DMCU0 -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
618
619// n2_err_dram_L2_Off_DmaWr_ce_mcu0 n2_err_dram_DmaWr_ce_L2_Off.s -midas_args=-DMCU0 -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
620
621// n2_err_dram_L2_Off_DmaWr_ue_mcu0 n2_err_dram_DmaWr_ue_L2_Off.s -midas_args=-DMCU0 -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
622
623n2_err_L2_LVF_WrmRst_uecc n2_err_L2_LVF_uecc_WrmRst.s
624//n2_err_L2_FatalErr_WrmRst n2_err_L2_FatalErr_WrmRst.s
625
626</runargs>
627
628<runargs -nosas >
629n2_err_l2_LDAC_LDWC_noDAC n2_err_l2_LDAC_LDWC_noDAC.s
630
631</runargs>
632</sys(err_l2_ADV)>
633
634//End of L2 Advanced Diags
635
636
637// MCU Error diags; except FBD errors
638<sys(err_mcu) name=sys(err_mcu)>
639
640
641<runargs -midas_args=-DINC_SOC_ERR_TRAPS -midas_args=-DINC_MCU_ERR_REG>
642
643//-nosas to be debugged and removed
644n2_err_mcu_csrs n2_err_mcu_csrs.s -vcs_run_args=+mcu_errmon_disable -nosas
645
646n2_err_dram_DAC_ld_mcu0 n2_err_dram_DAC_ld.s -midas_args=-DMCU0 -sas
647n2_err_dram_DAC_ld_mcu1 n2_err_dram_DAC_ld.s -midas_args=-DMCU1
648n2_err_dram_DAC_ld_mcu2 n2_err_dram_DAC_ld.s -midas_args=-DMCU2
649n2_err_dram_DAC_ld_mcu3 n2_err_dram_DAC_ld.s -midas_args=-DMCU3
650
651n2_err_dram_DAC_ld_trap_mcu0 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU0
652n2_err_dram_DAC_ld_trap_mcu1 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU1
653n2_err_dram_DAC_ld_trap_mcu2 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU2
654n2_err_dram_DAC_ld_trap_mcu3 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU3
655
656n2_err_dram_DAC_st_mcu0 n2_err_dram_DAC_st.s -midas_args=-DMCU0
657n2_err_dram_DAC_st_mcu1 n2_err_dram_DAC_st.s -midas_args=-DMCU1
658n2_err_dram_DAC_st_mcu2 n2_err_dram_DAC_st.s -midas_args=-DMCU2
659n2_err_dram_DAC_st_mcu3 n2_err_dram_DAC_st.s -midas_args=-DMCU3
660
661n2_err_dram_DAC_st_trap n2_err_dram_DAC_st_trap.s
662
663n2_err_dram_DAU_st n2_err_dram_DAU_st.s
664n2_err_dram_DAU_st_trap n2_err_dram_DAU_st_trap.s -midas_args=-DL2_DWS_err
665
666
667// advanced Directed Diags
668n2_err_dram_Mem_Poisn_L2Bank0 n2_err_dram_Mem_Poisn.s -midas_args=-DL2_0 -nosas
669n2_err_dram_Mem_Poisn_L2Bank1 n2_err_dram_Mem_Poisn.s -midas_args=-DL2_1 -nosas
670//n2_err_dram_DAU_2L2banks n2_err_dram_DAU_2L2banks.s -midas_args=-DL2_DWS_err
671n2_err_all_4_mcu n2_err_all_4_mcu.s
672
673
674</runargs>
675
676</sys(err_mcu)>
677
678// MCU Err Advanced Diags
679<sys(err_mcu_ADV) name=sys(err_mcu_ADV)>
680
681<runargs -vcs_run_args=+mcu_errmon_disable >
682
683n2_err_dram_dac_dau_fbr_mcu0 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
684n2_err_dram_dac_dau_fbr_mcu1 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
685n2_err_dram_dac_dau_fbr_mcu2 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
686n2_err_dram_dac_dau_fbr_mcu3 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
687n2_err_dram_dau_fbr_mcu0 n2_err_dram_dau_fbr.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
688n2_err_dram_dau_fbr_mcu1 n2_err_dram_dau_fbr.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
689n2_err_dram_dau_fbr_mcu2 n2_err_dram_dau_fbr.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
690n2_err_dram_dau_fbr_mcu3 n2_err_dram_dau_fbr.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
691n2_err_dram_afe_NoMemOp n2_err_dram_afe_NoMemOp.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1
692n2_err_dram_sfe_NoMemOp n2_err_dram_sfe_NoMemOp.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
693
694n2_err_dram_dac_dau_fbr_fbu_mcu0 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
695n2_err_dram_dac_dau_fbr_fbu_mcu1 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
696n2_err_dram_dac_dau_fbr_fbu_mcu2 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
697n2_err_dram_dac_dau_fbr_fbu_mcu3 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
698
699//to be removed -nosas
700n2_err_McuFbr_McuEcc_LDWC n2_err_McuFbr_McuEcc_LDWC.s -nosas
701
702</runargs>
703
704</sys(err_mcu_ADV)>
705
706
707
708// IOS Error diags
709 // runarg for all IOS diags
710<runargs -vcs_run_args=+ios_0in_ras_chk_off >
711<sys(ios_mcu_err) name=sys(ios_mcu_err)>
712
713<runargs -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable >
714
715//FBR
716n2_err_Mcu0Fbr_C n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
717n2_err_Mcu0Fbr_AFE n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1
718n2_err_Mcu0Fbr_AA n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x2 -midas_args=-DINJ_ERR_SRC=2
719n2_err_Mcu0Fbr_SFPE n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
720
721
722n2_err_Mcu0Fbr_C_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
723n2_err_Mcu0Fbr_AFE_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1
724n2_err_Mcu0Fbr_AA_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x2 -midas_args=-DINJ_ERR_SRC=2
725n2_err_Mcu0Fbr_SFPE_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
726
727n2_err_Mcu1Fbr_C n2_err_mcu_int.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
728n2_err_Mcu1Fbr_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
729
730n2_err_Mcu2Fbr_C n2_err_mcu_int.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
731n2_err_Mcu2Fbr_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
732
733n2_err_Mcu3Fbr_C n2_err_mcu_int.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
734n2_err_Mcu3Fbr_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
735
736<runargs -vcs_run_args=+nb_crc_mon_disable >
737
738n2_err_Mcu0Fbu_C n2_err_mcu_int_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
739
740n2_err_Mcu0Fbu_AFE n2_err_mcu_int_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1
741
742n2_err_Mcu0Fbu_AA n2_err_mcu_int_fbu_AA.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x2 -midas_args=-DINJ_ERR_SRC=2
743
744n2_err_Mcu0Fbu_SFPE n2_err_mcu_int_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
745</runargs>
746
747//ECC
748n2_err_Mcu0Ecc n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Ecc -midas_args=-DECC
749n2_err_Mcu0Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Ecc -midas_args=-DECC
750
751n2_err_Mcu1Ecc n2_err_mcu_int.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Ecc -midas_args=-DECC
752n2_err_Mcu1Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Ecc -midas_args=-DECC
753
754n2_err_Mcu2Ecc n2_err_mcu_int.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Ecc -midas_args=-DECC
755n2_err_Mcu2Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Ecc -midas_args=-DECC
756
757n2_err_Mcu3Ecc n2_err_mcu_int.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Ecc -midas_args=-DECC
758n2_err_Mcu3Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Ecc -midas_args=-DECC
759
760//FBR and ECC both
761
762</runargs>
763
764</sys(ios_mcu_err)>
765
766
767
768// IOS ncu error diags
769
770<sys(ios_ncu_err) name=sys(ios_ncu_err)>
771
772
773n2_err_ncu_csrs n2_err_ncu_csrs.s -nosas
774n2_err_ncu_ejr_ce_10 n2_err_ncu_ejr_ce_10.s
775n2_err_ncu_esr_3 n2_err_ncu_esr_3.s
776
777n2_err_ncu_all_int n2_err_ncu_all_int.s
778
779// n2_err_NcuDmuCredit n2_err_dmu_pio_wr.s -midas_args=-DERR_FIELD=NcuDmuCredit -vcs_run_args=+PEU_TEST
780// n2_err_NcuDmuCredit_trap n2_err_dmu_pio_wr_eie.s -midas_args=-DERR_FIELD=NcuDmuCredit -vcs_run_args=+PEU_TEST
781// n2_err_NcuDmuCredit_trap_nosas n2_err_dmu_pio_wr_eie.s -midas_args=-DERR_FIELD=NcuDmuCredit -vcs_run_args=+PEU_TEST -nosas
782
783// n2_err_NcuCtagCe n2_err_ncu_peu_piord.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuCtagCe
784// n2_err_NcuPcxData n2_err_ncu_peu_piord.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuPcxData
785// n2_err_NcuDataParity n2_err_ncu_peu_piord_trap.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuDataParity -midas_args=-DTT=0x32
786// n2_err_NcuDmuUe n2_err_ncu_peu_piord_trap.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuDmuUe -midas_args=-DTT=0x32
787// n2_err_NcuDataParity_eie n2_err_ncu_peu_piord_trap.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuDataParity -midas_args=-DTT=0x32 -midas_args=-DEIE
788// n2_err_NcuDmuUe_eie n2_err_ncu_peu_piord_trap.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuDmuUe -midas_args=-DTT=0x32 -midas_args=-DEIE
789
790
791// n2_err_NcuCtagUe n2_err_ncu_peu_pio_rd_2th.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuCtagUe -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2
792// temporarily taken out n2_err_NcuCpxUe n2_err_ncu_peu_pio_rd_2th.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuCpxUe -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2
793// temporarily taken out n2_err_NcuPcxUe n2_err_ncu_peu_pio_rd_2th.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuPcxUe -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2
794
795// n2_err_NcuPcxUe n2_err_NcuPcxUe.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuPcxUe -vcs_run_args=+ios_0in_ras_chk_off
796
797//n2_err_NcuPcxData n2_err_NcuPcxData.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuPcxData -vcs_run_args=+ios_0in_ras_chk_off
798
799// n2_err_NcuCtagUe_eie n2_err_NcuCtagUe.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuCtagUe -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2
800
801n2_err_ncu_NcuMondoTable n2_err_ncu_dmu_mondo.s -midas_args=-DERR_FIELD=NcuMondoTable -midas_args=-DTT=0x32
802n2_err_ncu_NcuMondoFifo n2_err_ncu_dmu_mondo_2th.s -midas_args=-DERR_FIELD=NcuMondoFifo -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2 -midas_args=-DTT=0x32
803</sys(ios_ncu_err)>
804
805
806
807//SIU-NIU Error diags
808
809// <sys(ios_siuniu_err) name=sys(ios_siuniu_err)>
810
811//SIU-RX
812
813//<runargs -midas_args=-DCMP_THREAD_START=0x1 -vcs_run_args=+MAC_SPEED0=10000 -finish_mask=1 >
814// <runargs -vcs_run_args=+MAC_SPEED1=10000 >
815// <runargs -vcs_run_args=+GET_MAC_PORTS=0 >
816// <runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
817// <runargs -vcs_run_args=+ORIG_META -midas_args=-DRX_TEST >
818// <runargs -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
819// <runargs -midas_args=-DRXMAC_PKTCNT=0xa -vcs_run_args=+RXMAC_PKTCNT=10 >
820// <runargs -vcs_run_args=+no_verilog_finish >
821// <runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
822
823// n2_err_SiiNiuDParity n2_err_siu_niu_rx.s -midas_args=-DERR_FIELD=SiiNiuDParity
824// n2_err_SiiNiuDParity_trap n2_err_siu_niu_rx_trap.s -midas_args=-DERR_FIELD=SiiNiuDParity -midas_args=-DTT=0x40
825//n2_err_SioCtagCe_rand n2_err_rx_uev_rand_l2siocce.s -midas_args=-DERR_FIELD=SioCtagCe
826
827// </runargs>
828// </runargs>
829// </runargs>
830// </runargs>
831// </runargs>
832// </runargs>
833// </runargs>
834// </runargs>
835// </runargs>
836
837
838// SIU-TX
839// <runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1 -vcs_run_args=+MAC_SPEED0=10000 >
840// <runargs -vcs_run_args=+MAC_SPEED1=10000 >
841// <runargs -vcs_run_args=+GET_MAC_PORTS=0 >
842// <runargs -vcs_run_args=+PCS_SERDES -vcs_run_args=+displaySysRdWr >
843// <runargs -vcs_run_args=+ORIG_META -vcs_run_args=+TX_TEST >
844// <runargs -midas_args=-DTX_TEST -midas_args=-DMAC_SPEED0=10000 -midas_args=-DMAC_SPEED1=10000 -midas_args=-DPCS_SERDES >
845// <runargs -vcs_run_args=+PEU_TEST -vcs_run_args=+ENABLE_PCIE_LINK_TRAINING -midas_args=-DENABLE_PCIE_LINK_TRAINING >
846
847// n2_err_SiiNiuCtagUe n2_err_siu_niu_tx.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -vcs_run_args=+niusiu_bid_chk_off
848// n2_err_SiiNiuCtagUe_trap n2_err_siu_niu_tx_trap.s -midas_args=-DERR_FIELD=SiiNiuCtagUe -midas_args=-DTT=0x40 -midas_args=-DUE -vcs_run_args=+niusiu_bid_chk_off
849
850// n2_err_SiiNiuCtagCe n2_err_siu_niu_tx.s -midas_args=-DERR_FIELD=SiiNiuCtagCe -midas_args=-DCE
851// n2_err_SiiNiuCtagCe_trap n2_err_siu_niu_tx_trap.s -midas_args=-DERR_FIELD=SiiNiuCtagCe -midas_args=-DTT=0x63 -midas_args=-DCE
852
853// n2_err_SiiNiuCtagCe_force_SiiNiuCtagCe n2_err_siu_niu_tx_uev.s -midas_args=-DERR_FIELD=SiiNiuCtagCe
854
855//random error injection
856// n2_err_SiiNiuCtagCe_rand n2_err_tx_uev_rand_niusiicce.s -midas_args=-DERR_FIELD=SiiNiuCtagCe
857// n2_err_NiuCtagCe_rand n2_err_tx_uev_rand_sioniucce.s -midas_args=-DERR_FIELD=NiuCtagCe
858
859// n2_err_SiiNiuAParity n2_err_siu_niu_tx.s -midas_args=-DERR_FIELD=SiiNiuAParity
860// n2_err_SiiNiuAParity_trap n2_err_siu_niu_tx_trap.s -midas_args=-DERR_FIELD=SiiNiuAParity -midas_args=-DTT=0x40 -midas_args=-DUE
861
862// n2_err_SioCtagUe n2_err_siu_niu_tx.s -midas_args=-DERR_FIELD=SioCtagUe -vcs_run_args=+niusiu_bid_chk_off
863// n2_err_SioCtagUe_trap n2_err_siu_niu_tx_trap.s -midas_args=-DERR_FIELD=SioCtagUe -midas_args=-DTT=0x40 -midas_args=-DUE -vcs_run_args=+niusiu_bid_chk_off
864
865// n2_err_SioCtagCe n2_err_siu_niu_tx.s -midas_args=-DERR_FIELD=SioCtagCe -midas_args=-DCE
866// n2_err_SioCtagCe_trap n2_err_siu_niu_tx_trap.s -midas_args=-DERR_FIELD=SioCtagCe -midas_args=-DTT=0x63 -midas_args=-DCE
867
868// n2_err_NiuCtagUe n2_err_siu_niu_tx.s -midas_args=-DERR_FIELD=NiuCtagUe -vcs_run_args=+sio_niu_ras_chk_off
869// n2_err_NiuCtagUe_trap n2_err_siu_niu_tx_trap.s -midas_args=-DERR_FIELD=SioCtagUe -midas_args=-DTT=0x40 -midas_args=-DUE -vcs_run_args=+niusiu_bid_chk_off -vcs_run_args=+sio_niu_ras_chk_off
870
871// n2_err_NiuCtagCe n2_err_siu_niu_tx.s -midas_args=-DERR_FIELD=NiuCtagCe -midas_args=-DCE -vcs_run_args=+sio_niu_ras_chk_off
872// n2_err_NiuCtagCe_trap n2_err_siu_niu_tx_trap.s -midas_args=-DERR_FIELD=NiuCtagCe -midas_args=-DTT=0x63 -midas_args=-DCE -vcs_run_args=+sio_niu_ras_chk_off
873
874// n2_err_NiuDataParity n2_err_siu_niu_tx.s -midas_args=-DERR_FIELD=NiuDataParity -vcs_run_args=+sio_niu_ras_chk_off
875// n2_err_NiuDataParity_trap n2_err_siu_niu_tx_trap.s -midas_args=-DERR_FIELD=NiuDataParity -midas_args=-DTT=0x40 -midas_args=-DUE -vcs_run_args=+niusiu_bid_chk_off -vcs_run_args=+sio_niu_ras_chk_off
876
877// </runargs>
878// </runargs>
879// </runargs>
880// </runargs>
881// </runargs>
882// </runargs>
883// </runargs>
884
885// </sys(ios_siuniu_err)>
886
887//SIU-DMU Error diags
888
889// <sys(ios_siudmu_err) name=sys(ios_siudmu_err)>
890
891// n2_err_SiiDmuCtagCe n2_err_siu_dmu_wr.s -midas_args=-DERR_FIELD=SiiDmuCtagCe -vcs_run_args=+PEU_TEST
892// n2_err_SiiDmuCtagCe_trap n2_err_siu_dmu_wr_trap.s -midas_args=-DERR_FIELD=SiiDmuCtagCe -vcs_run_args=+PEU_TEST -midas_args=-DTT=0x63 -vcs_run_args=+DISABLE_L2_CHECKER
893
894// n2_err_SiiDmuCtagUe n2_err_siu_dmu_wr.s -midas_args=-DERR_FIELD=SiiDmuCtagUe -vcs_run_args=+PEU_TEST -vcs_run_args=+DISABLE_L2_CHECKER
895// n2_err_SiiDmuCtagUe_trap n2_err_siu_dmu_wr_trap.s -midas_args=-DERR_FIELD=SiiDmuCtagUe -vcs_run_args=+PEU_TEST -midas_args=-DTT=0x40 -vcs_run_args=+DISABLE_L2_CHECKER
896
897// 01/03/05 with changed design no error with SiiDmuDparity with WRM
898// n2_err_SiiDmuDParity n2_err_siu_dmu_wri.s -midas_args=-DERR_FIELD=SiiDmuDParity -vcs_run_args=+PEU_TEST -vcs_run_args=+DISABLE_L2_CHECKER
899// n2_err_SiiDmuDParity_noerr n2_err_siu_dmu_wrm.s -midas_args=-DERR_FIELD=SiiDmuDParity -vcs_run_args=+PEU_TEST -vcs_run_args=+DISABLE_L2_CHECKER
900// n2_err_SiiDmuDParity_trap n2_err_siu_dmu_wri_trap.s -midas_args=-DERR_FIELD=SiiDmuDParity -vcs_run_args=+PEU_TEST -midas_args=-DTT=0x40 -vcs_run_args=+DISABLE_L2_CHECKER
901
902// n2_err_SiiDmuAParity n2_err_siu_dmu_wr.s -midas_args=-DERR_FIELD=SiiDmuAParity -vcs_run_args=+PEU_TEST -vcs_run_args=+DISABLE_L2_CHECKER
903// n2_err_SiiDmuAParity_trap n2_err_siu_dmu_wr_trap.s -midas_args=-DERR_FIELD=SiiDmuAParity -vcs_run_args=+PEU_TEST -midas_args=-DTT=0x40 -vcs_run_args=+DISABLE_L2_CHECKER
904
905// n2_err_SioCtagUe_dmu n2_err_dmu_dma_rd.s -midas_args=-DERR_FIELD=SioCtagUe -vcs_run_args=+PEU_TEST -vcs_run_args=+dmusiu_bid_chk_off
906//n2_err_SioCtagUe_dmu_trap n2_err_dmu_dma_rd_trap.s -midas_args=-DERR_FIELD=SioCtagUe -vcs_run_args=+PEU_TEST -midas_args=-DTT=0x40
907
908// n2_err_SioCtagCe_dmu n2_err_dmu_dma_rd.s -midas_args=-DERR_FIELD=SioCtagCe -vcs_run_args=+PEU_TEST
909//n2_err_SioCtagCe_dmu_trap n2_err_dmu_dma_rd_trap.s -midas_args=-DERR_FIELD=SioCtagCe -vcs_run_args=+PEU_TEST -midas_args=-DTT=0x63
910
911// </sys(ios_siudmu_err)>
912
913
914// <sys(ios_dmu_err) name=sys(ios_dmu_err) >
915// <runargs -vcs_run_args=+PEU_TEST >
916
917// n2_err_DmuCtagCe n2_err_dmu_dma_rd.s -midas_args=-DERR_FIELD=DmuCtagCe -vcs_run_args=+sio_dmu_ras_chk_off
918// n2_err_DmuCtagCe_trap n2_err_dmu_dma_rd_trap.s -midas_args=-DERR_FIELD=DmuCtagCe -midas_args=-DTT=0x63 -vcs_run_args=+sio_dmu_ras_chk_off
919
920// n2_err_DmuCtagUe n2_err_dmu_dma_rd.s -midas_args=-DERR_FIELD=DmuCtagUe -vcs_run_args=+sio_dmu_ras_chk_off
921// n2_err_DmuCtagUe_trap n2_err_dmu_dma_rd_trap.s -midas_args=-DERR_FIELD=DmuCtagUe -midas_args=-DTT=0x40 -vcs_run_args=+sio_dmu_ras_chk_off
922
923// n2_err_DmuDataParity n2_err_dmu_dma_rd.s -midas_args=-DERR_FIELD=DmuCtagUe -vcs_run_args=+sio_dmu_ras_chk_off
924// n2_err_DmuDataParity_trap n2_err_dmu_dma_rd_trap.s -midas_args=-DERR_FIELD=DmuCtagUe -midas_args=-DTT=0x40 -vcs_run_args=+sio_dmu_ras_chk_off
925
926// 12/30/05; taken out as the error is changed for INT only now
927// n2_err_DmuNcuCredit n2_err_piu_int_ejr.s -midas_args=-DERR_FIELD=DmuNcuCredit
928// n2_err_DmuNcuCredit_trap n2_err_ncu_peu_piord_trap.s -midas_args=-DERR_FIELD=DmuNcuCredit -midas_args=-DTT=0x40
929
930// n2_err_DmuSiiCredit n2_err_siu_dmu_wr.s -midas_args=-DERR_FIELD=DmuSiiCredit
931//n2_err_DmuSiiCredit_trap
932
933// </runargs>
934// </sys(ios_dmu_err)>
935
936// all IOS diags
937</runargs>
938
939//all diags
940</runargs>
941
942</sys(ras)>
943
944// Applied for ALL Error diags
945// esr mon off
946
947<runargs -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+500000 -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable >
948
949// <sys(ios-mss_adv_ras) name=sys(ios-mss_adv_ras)>
950
951
952// </sys(ios-mss_adv_ras)>
953
954
955// <sys(ios_adv_dmu_ras) name=sys(ios_adv_dmu_ras)>
956
957// Requires PEU
958
959// </sys(ios_adv_dmu_ras)>
960
961
962// <sys(ios_adv_niu_ras) name=sys(ios_adv_niu_ras)>
963
964// This suit requires PEU
965
966// </sys(ios_adv_niu_ras)>
967
968<sys(ios_adv_ncu_ras) name=sys(ios_adv_ncu_ras)>
969<runargs -vcs_run_args=+ios_0in_ras_chk_off >
970
971//NCU: using EJR
972// n2_err_adv_NcuCtagCe_ld_trap n2_err_adv_ncuctagce.s -midas_args=-DERR_FIELD=NcuCtagCe -vcs_run_args=+PEU_TEST
973// n2_err_adv_NcuCtagUe_ld_trap n2_err_adv_ncuctague.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuCtagUe -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2
974
975n2_err_adv_NcuCtagUe_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=NcuCtagUe -midas_args=-DTT=0x40 -vcs_run_args=+lsu_mon_off
976n2_err_adv_NcuCtagCe_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=NcuCtagCe -midas_args=-DTT=0x63
977
978n2_err_adv_NcuDataParity_mondo n2_err_adv_piu_int_ejr_nomondo.s -midas_args=-DERR_FIELD=NcuDataParity -vcs_run_args=+PEU_TEST
979// n2_err_adv_NcuDmuUe_st n2_err_adv_NcuDmuUe_st.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=NcuDmuUe -nosas
980
981//NCU: using userevents
982// n2_err_adv_DMUSII_TOUT n2_err_adv_peu_piord_uev.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_TYPE=DMUSII_TOUT
983// n2_err_adv_DMUSII_IOAE n2_err_adv_peu_piord_uev.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_TYPE=DMUSII_IOAE
984// n2_err_adv_DMUSII_IOUE n2_err_adv_peu_piord_uev.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_TYPE=DMUSII_IOUE
985
986// n2_err_pio_DMUSIIDP_NcuDP_UEV n2_err_pio_DMUSIIDP_NcuDP.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=SiiDmuDParity -midas_args=-DERR_FIELD_DETECT=NcuDataParity -midas_args=-DUEV -nosas -vcs_run_args=+ios_ras_interrupt_chk_off
987// n2_err_pio_DMUSIIDP_NcuDP_EJR n2_err_pio_DMUSIIDP_NcuDP.s -vcs_run_args=+PEU_TEST -midas_args=-DERR_FIELD=SiiDmuDParity -midas_args=-DERR_FIELD_DETECT=NcuDataParity -midas_args=-DEJR -nosas
988
989
990//DMU
991n2_err_adv_DmuNcuCredit_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=DmuNcuCredit -midas_args=-DTT=0x40
992
993</runargs>
994
995</sys(ios_adv_ncu_ras)>
996
997
998/////////////////////// Diags with follow up of Silicon Level Testing ////////////////////////////
999
1000<sys(mcu_si_ras) name=sys(mcu_si_ras)>
1001n2_mcu_si_DSC n2_mcu_si_DSC.s -vcs_run_args=+l2cpx_mon_off -midas_args=-DMCU0
1002
1003</sys(mcu_si_ras)>
1004
1005// for all diags
1006
1007</runargs>
1008</runargs>
1009
1010
1011<tso_diags name=tso_diags>
1012
1013tso_n1_bcopy tso_n1_bcopy.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta
1014tso_n1_binit1 tso_n1_binit1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta
1015tso_n1_binit2 tso_n1_binit2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta
1016
1017#if (! defined FC)
1018
1019tso_n1_binit3 tso_n1_binit3.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff
1020tso_n1_cross_mod1 tso_n1_cross_mod1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1021tso_n1_cross_mod101 tso_n1_cross_mod101.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1022tso_n1_cross_mod102 tso_n1_cross_mod102.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1023tso_n1_cross_mod103 tso_n1_cross_mod103.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1024tso_n1_cross_mod2 tso_n1_cross_mod2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1025tso_n1_cross_mod201 tso_n1_cross_mod201.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1026tso_n1_cross_mod203 tso_n1_cross_mod203.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1027tso_n1_cross_mod3 tso_n1_cross_mod3.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+inst_check_off=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1028tso_n1_cross_mod4 tso_n1_cross_mod4.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff
1029tso_n1_cross_mod5 tso_n1_cross_mod5.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1030tso_n1_cross_mod6_bug6372 tso_n1_cross_mod6_bug6372.s -midas_args=-DTHREAD_COUNT=4 -finish_mask=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=f
1031tso_n1_dekker1 tso_n1_dekker1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1032tso_n1_dekker2 tso_n1_dekker2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3
1033tso_n1_dekker10 tso_n1_dekker10.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1034tso_n1_dekker11 tso_n1_dekker11.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
1035tso_n1_false_sharing1 tso_n1_false_sharing1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
1036tso_n1_false_sharing2 tso_n1_false_sharing2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff
1037tso_n1_false_sharing_vershort tso_n1_false_sharing_vershort.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff
1038tso_n1_indirection1 tso_n1_indirection1.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -vcs_run_args=+thread=7 -nosas
1039tso_n1_indirection2 tso_n1_indirection2.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -vcs_run_args=+thread=7 -nosas
1040tso_n1_membar1 tso_n1_membar1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta
1041tso_n1_mutex1 tso_n1_mutex1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
1042tso_n1_mutex2_ldstub tso_n1_mutex2_ldstub.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
1043tso_n1_mutex3_cas tso_n1_mutex3_cas.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
1044tso_n1_mutex4_casx tso_n1_mutex4_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
1045tso_n1_mutex5_swap_casx tso_n1_mutex5_swap_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
1046tso_n1_prod_cons1 tso_n1_prod_cons1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
1047tso_n1_prod_cons2 tso_n1_prod_cons2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
1048tso_n1_prod_cons_variation1_1 tso_n1_prod_cons_variation1_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
1049tso_n1_prod_cons_variation2_1 tso_n1_prod_cons_variation2_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
1050tso_n1_self_mod1 tso_n1_self_mod1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1051tso_n1_self_mod2 tso_n1_self_mod2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1052tso_n1_self_mod3 tso_n1_self_mod3.s -midas_args=-DCMP_THREAD_START=0x11 -finish_mask=11 -vcs_run_args=+show_delta
1053tso_n1_self_mod5 tso_n1_self_mod5.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1054tso_n1_self_mod6 tso_n1_self_mod6.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1055tso_n1_self_mod7 tso_n1_self_mod7.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1056tso_n1_self_mod8 tso_n1_self_mod8.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1057tso_n1_self_mod9 tso_n1_self_mod9.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1058tso_n1_self_mod10 tso_n1_self_mod10.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1059tso_n1_self_mod11 tso_n1_self_mod11.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1060tso_n1_self_mod101 tso_n1_self_mod101.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1061tso_n1_self_mod102 tso_n1_self_mod102.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1062tso_n1_self_mod103 tso_n1_self_mod103.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=11 -nosas
1063tso_n1_self_mod104 tso_n1_self_mod104.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1064tso_n1_self_mod105 tso_n1_self_mod105.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1065
1066tso_n1_self_mod106 tso_n1_self_mod106.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1067tso_n1_self_mod107 tso_n1_self_mod107.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1068tso_n1_self_mod108 tso_n1_self_mod108.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1069tso_n1_self_mod109 tso_n1_self_mod109.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1070tso_n1_self_mod110 tso_n1_self_mod110.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1071tso_n1_self_mod111 tso_n1_self_mod111.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1072tso_n1_self_mod201 tso_n1_self_mod201.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1073tso_n1_self_mod202 tso_n1_self_mod202.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1074tso_n1_self_mod203 tso_n1_self_mod203.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=11 -nosas
1075tso_n1_self_mod206 tso_n1_self_mod206.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1076tso_n1_self_mod207 tso_n1_self_mod207.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
1077tso_n1_starve0 tso_n1_starve0.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off
1078tso_n1_starve1 tso_n1_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off
1079
1080#endif
1081
1082#if (defined FC)
1083
1084tso_n1_binit3 tso_n1_binit3.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff
1085tso_n1_cross_mod1 tso_n1_cross_mod1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1086tso_n1_cross_mod101 tso_n1_cross_mod101.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1087tso_n1_cross_mod102 tso_n1_cross_mod102.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1088tso_n1_cross_mod103 tso_n1_cross_mod103.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1089tso_n1_cross_mod2 tso_n1_cross_mod2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1090tso_n1_cross_mod201 tso_n1_cross_mod201.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1091tso_n1_cross_mod203 tso_n1_cross_mod203.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1092tso_n1_cross_mod3 tso_n1_cross_mod3.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+inst_check_off=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1093tso_n1_cross_mod4 tso_n1_cross_mod4.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff
1094tso_n1_cross_mod5 tso_n1_cross_mod5.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1095tso_n1_cross_mod6_bug6372 tso_n1_cross_mod6_bug6372.s -midas_args=-DTHREAD_COUNT=4 -finish_mask=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf
1096tso_n1_dekker1 tso_n1_dekker1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1097tso_n1_dekker2 tso_n1_dekker2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3
1098tso_n1_dekker10 tso_n1_dekker10.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1099tso_n1_dekker11 tso_n1_dekker11.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
1100tso_n1_false_sharing1 tso_n1_false_sharing1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
1101tso_n1_false_sharing2 tso_n1_false_sharing2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff
1102tso_n1_false_sharing_vershort tso_n1_false_sharing_vershort.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff
1103tso_n1_indirection1 tso_n1_indirection1.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x7 -nosas
1104tso_n1_indirection2 tso_n1_indirection2.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x7 -nosas
1105tso_n1_membar1 tso_n1_membar1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta
1106tso_n1_mutex1 tso_n1_mutex1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
1107tso_n1_mutex2_ldstub tso_n1_mutex2_ldstub.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
1108tso_n1_mutex3_cas tso_n1_mutex3_cas.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
1109tso_n1_mutex4_casx tso_n1_mutex4_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
1110tso_n1_mutex5_swap_casx tso_n1_mutex5_swap_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
1111tso_n1_prod_cons1 tso_n1_prod_cons1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
1112tso_n1_prod_cons2 tso_n1_prod_cons2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
1113tso_n1_prod_cons_variation1_1 tso_n1_prod_cons_variation1_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
1114tso_n1_prod_cons_variation2_1 tso_n1_prod_cons_variation2_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
1115tso_n1_self_mod1 tso_n1_self_mod1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1116tso_n1_self_mod2 tso_n1_self_mod2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1117tso_n1_self_mod3 tso_n1_self_mod3.s -finish_mask=11 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x11
1118tso_n1_self_mod5 tso_n1_self_mod5.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1119tso_n1_self_mod6 tso_n1_self_mod6.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1120tso_n1_self_mod7 tso_n1_self_mod7.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1121tso_n1_self_mod8 tso_n1_self_mod8.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1122tso_n1_self_mod9 tso_n1_self_mod9.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1123tso_n1_self_mod10 tso_n1_self_mod10.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1124tso_n1_self_mod11 tso_n1_self_mod11.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1125tso_n1_self_mod101 tso_n1_self_mod101.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1126tso_n1_self_mod102 tso_n1_self_mod102.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1127tso_n1_self_mod103 tso_n1_self_mod103.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x11 -nosas
1128tso_n1_self_mod104 tso_n1_self_mod104.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1129tso_n1_self_mod105 tso_n1_self_mod105.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1130
1131tso_n1_self_mod106 tso_n1_self_mod106.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1132tso_n1_self_mod107 tso_n1_self_mod107.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1133tso_n1_self_mod108 tso_n1_self_mod108.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1134tso_n1_self_mod109 tso_n1_self_mod109.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1135tso_n1_self_mod110 tso_n1_self_mod110.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1136tso_n1_self_mod111 tso_n1_self_mod111.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1137tso_n1_self_mod201 tso_n1_self_mod201.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1138tso_n1_self_mod202 tso_n1_self_mod202.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1139tso_n1_self_mod203 tso_n1_self_mod203.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x11 -nosas
1140tso_n1_self_mod206 tso_n1_self_mod206.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1141tso_n1_self_mod207 tso_n1_self_mod207.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
1142tso_n1_starve0 tso_n1_starve0.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off
1143tso_n1_starve1 tso_n1_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off
1144
1145#endif
1146
1147#if (!defined CCM && !defined CMP)
1148// <runargs -sas -vcs_run_args=+PEU_TEST >
1149// tso_n2_ncrdwr1 tso_n2_ncrdwr1.s
1150// tso_n2_ncrdwr1_user tso_n2_ncrdwr1_user.s
1151// tso_n2_ncrdwr2 tso_n2_ncrdwr2.s
1152// tso_n2_ncrdwr2_user tso_n2_ncrdwr2_user.s
1153// tso_n2_ncrdwr3 tso_n2_ncrdwr3.s
1154// tso_n2_ncrdwr3_user tso_n2_ncrdwr3_user.s
1155// tso_n2_ncrdwr5 tso_n2_ncrdwr5.s
1156// tso_n2_ncrdwr5_user tso_n2_ncrdwr5_user.s
1157// tso_n2_ncrdwr6 tso_n2_ncrdwr6.s
1158// </runargs>
1159#endif
1160
1161#if (! defined FC)
1162
1163tso_n1_prod_cons1_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
1164tso_n1_prod_cons2_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
1165tso_n1_dekker1_pio tso_n1_dekker1_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+thread=3
1166tso_n1_dekker2_pio tso_n1_dekker2_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+thread=3
1167tso_n1_dekker7 tso_n1_dekker7.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
1168tso_n1_dekker8 tso_n1_dekker8.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
1169tso_n1_dekker9 tso_n1_dekker9.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
1170tso_n1_peterson1 tso_n1_peterson1.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
1171tso_n1_peterson2 tso_n1_peterson2.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
1172tso_n1_peterson3 tso_n1_peterson3.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
1173
1174#endif
1175
1176#if (defined FC)
1177
1178tso_n1_prod_cons1_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
1179tso_n1_prod_cons2_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
1180tso_n1_dekker1_pio tso_n1_dekker1_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DCMP_THREAD_START=0x3
1181tso_n1_dekker2_pio tso_n1_dekker2_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DCMP_THREAD_START=0x3
1182tso_n1_dekker7 tso_n1_dekker7.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
1183tso_n1_dekker8 tso_n1_dekker8.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
1184tso_n1_dekker9 tso_n1_dekker9.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
1185tso_n1_peterson1 tso_n1_peterson1.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
1186tso_n1_peterson2 tso_n1_peterson2.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
1187tso_n1_peterson3 tso_n1_peterson3.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
1188
1189#endif
1190
1191#if (!defined CCM && !defined CMP)
1192
1193#if (! defined FC)
1194
1195tso_n1_ld_starve1 tso_n1_ld_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off
1196tso_n1_ld_starve2 tso_n1_ld_starve2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off
1197
1198#endif
1199
1200#if (defined FC)
1201
1202tso_n1_ld_starve1 tso_n1_ld_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off
1203tso_n1_ld_starve2 tso_n1_ld_starve2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off
1204
1205#endif
1206
1207#endif
1208
1209</tso_diags>
1210
1211<sys(ccu_clk_ratios) name=sys(ccu_clk_ratios)>
1212
1213 <fc_ccu_166> // fc bench: default is 166mhz sys clk
1214
1215 <runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1> // single thread (ie. thread 0)
1216 <runargs -midas_args=-DRESET_STAT_CHECK> // must specify this option when doing WMR reset
1217 <runargs -nofast_boot -vcs_run_args=+NO_CCU_CSR_SLAM -midas_args=-DCCU_REG_PROG -midas_args=-DWARM_RESET_INIT>
1218 <runargs -sas -midas_args=-DBOOTPROM_INIT>
1219 <runargs -vcs_run_args=+SSI_CLK_4 -vcs_run_args=+show_delta>
1220 <runargs -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+l2esr_mon_off>
1221 <runargs -vcs_run_args=+ccu_checker>
1222 memop_all_atomics_CMPDR_RATIO_2_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_00
1223 memop_all_atomics_CMPDR_RATIO_2_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_25
1224 memop_all_atomics_CMPDR_RATIO_2_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_50
1225 memop_all_atomics_CMPDR_RATIO_2_75_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_75
1226 memop_all_atomics_CMPDR_RATIO_3_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_00
1227 memop_all_atomics_CMPDR_RATIO_3_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_25
1228 memop_all_atomics_CMPDR_RATIO_3_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_50
1229 memop_all_atomics_CMPDR_RATIO_3_75_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_75
1230 memop_all_atomics_CMPDR_RATIO_4_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_00
1231 memop_all_atomics_CMPDR_RATIO_4_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_25
1232 memop_all_atomics_CMPDR_RATIO_4_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_50
1233 </runargs>
1234 </runargs>
1235 </runargs>
1236 </runargs>
1237 </runargs>
1238 </runargs>
1239 </runargs>
1240
1241</fc_ccu_166>
1242</sys(ccu_clk_ratios)>
1243
1244<sys(mcu) name=sys(mcu)>
1245
1246
1247#if (!defined FC)
1248<runargs -sas -vcs_run -vcs_run_args=+8_FBDIMMS -midas_args=-allow_tsb_conflicts -vcs_run_args=+thread=ff>
1249#endif
1250#if (defined FC)
1251<runargs -sas -vcs_run -vcs_run_args=+8_FBDIMMS -midas_args=-allow_tsb_conflicts -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff >
1252#endif
1253
1254n2_mcu_0_all_bcopy_all_banks n2_mcu_0_all_bcopy_all_banks.s
1255</runargs>
1256
1257<runargs -vcs_run -sas -vcs_run_args=+8_FBDIMMS >
1258n2_mcu_0_all_fbdimm_rkhi_mcu0 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU0 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
1259n2_mcu_0_all_fbdimm_rkhi_mcu1 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU1 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
1260n2_mcu_0_all_fbdimm_rkhi_mcu2 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU2 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
1261n2_mcu_0_all_fbdimm_rkhi_mcu3 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU3 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
1262
1263n2_mcu_0_all_fbdimm_rkhi_mcu0_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU0 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off
1264n2_mcu_0_all_fbdimm_rkhi_mcu1_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU1 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off
1265n2_mcu_0_all_fbdimm_rkhi_mcu2_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU2 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off
1266n2_mcu_0_all_fbdimm_rkhi_mcu3_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU3 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off
1267
1268n2_all_mcu_all_l2_8th n2_all_mcu_all_l2.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
1269n2_all_th_ldst_8th n2_all_th_ldst.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
1270
1271</runargs>
1272
1273</sys(mcu)>
1274
1275<sys(cmp) name=sys(cmp)>
1276
1277<runargs -vcs_run >
1278
1279n2_cmp_CRW1S_2th n2_ncu_cmp.s -finish_mask=3 -sas
1280n2_cmp_upk_pk_upk n2_cmp_upk_pk_upk.s -finish_mask=3 -sas
1281n2_cmp_upk_pk_upk_nosas n2_cmp_upk_pk_upk.s -finish_mask=3 -nosas
1282
1283ncu_1core_wakup ncu_1core_wakup.s -finish_mask=0x2b -sas -midas_args=-DPART_0_BASE=0x200000000
1284ncu_ssi_rw ncu_ssi_rw.s -finish_mask=0x1 -nofast_boot -sas -midas_args=-DPART_0_BASE=0x200000000
1285ncu_ssi_rw_b2b ncu_ssi_rw_b2b.s -finish_mask=0x1 -nofast_boot -sas -midas_args=-DPART_0_BASE=0x200000000
1286
1287</runargs>
1288
1289</sys(cmp)>
1290
1291
1292
1293
1294
1295
1296
1297
1298</runargs>
1299</runargs>
1300</sys(all_T2)>
1301</sys(all_T2_build)>
1302
1303
1304
1305////////////////////////////////////////////////////////////////////////////////////////////////////
1306
1307
1308
1309// vvvv moved outside sys(fcbuild) tag since this one has its own build
1310// below contains dma_qual.diaglist, mcu_clock_ratio.diaglist
1311// mcu_dimm_*.diaglist, mss_l2_qual.diaglist,
1312#include "diaglists/mss/mss_fc.diaglist"
1313// ^^^^
1314
1315#ifndef ZEROINCOV
1316</runargs> // -vcs_run_args=+0in_no_checksim_db -vcs_run_args=+0in_no_statistics
1317#endif
1318</runargs> // -drm_freeram=1500
1319</runargs> //runargs -sas
1320
1321//----- End of FC ----------- Edit above this line -------------------------
1322
1323#ifdef FC
1324#undef FC
1325#undef sys
1326#undef SYSNAME
1327#endif
1328
1329
Full OpenSPARC design & verification tarball including full HDL.