Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / fc8.diaglist.add_fc1_all
CommitLineData
86530b38
AT
1<runargs -sas -finish_mask=01 >
2
3////////////////////////////////////////////////////////////////////////////////////////////////////
4
5<runargs -tg_seed=1 -midas_args=-DPART_0_BASE=0x200000000 -midas_args=-DL2_REG_PROG >
6<runargs -nosas >
7
8#include "diaglists/memop/memop.diaglist"
9
10#include "diaglists/misc/ported_arch_diags.diaglist"
11
12<sys(cmp) name=sys(cmp)>
13
14
15////////////////////////////////////////////////////////////////////////////
16// CMT diags, 1 core
17
18<runargs -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 -midas_args=-DTHREAD_COUNT=2>
19
20cmp_park_self cmp_park_self.s -midas_args=-DSYNC_THREADS -midas_args=-allow_tsb_conflicts
21
22</runargs>
23</sys(cmp)>
24
25
26<sys(interrupt) name=sys(interrupt)>
27
28////////////////////////////////////////////////////////////////////////////
29// Single-threaded interrupt diags
30<runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1>
31
32interrupt_INT_VEC_DIS interrupt_INT_VEC_DIS.s
33interrupt_INT_VEC_DIS_all2 interrupt_INT_VEC_DIS_all2.s
34interrupt_SWVR_INTR_R interrupt_SWVR_INTR_R.s
35interrupt_SWVR_INTR_W interrupt_SWVR_INTR_W.s
36interrupt_SWVR_INTR_W_all_vectors interrupt_SWVR_INTR_W_all_vectors.s
37interrupt_INTR_REC_priority interrupt_INTR_REC_priority.s
38interrupt_QUEUE_CPU_MONDO_trap interrupt_QUEUE_CPU_MONDO_trap.s
39interrupt_QUEUE_DEV_MONDO_trap interrupt_QUEUE_DEV_MONDO_trap.s
40interrupt_ncu_regs_rw interrupt_ncu_regs_rw.s
41interrupt_QUEUE_CPU_MONDO_mode interrupt_QUEUE_CPU_MONDO_mode.s
42interrupt_QUEUE_DEV_MONDO_mode interrupt_QUEUE_DEV_MONDO_mode.s
43interrupt_DMU_CORE_BLK_enable1 interrupt_DMU_CORE_BLK_enable1.s
44
45</runargs>
46////////////////////////////////////////////////////////////////////////////
47// 2-threaded interrupt diags
48<runargs -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=3 -midas_args=-DSYNC_THREADS >
49
50interrupt_SWVR_INTR_REC_mode interrupt_SWVR_INTR_REC_mode.s
51interrupt_SWVR_INTR_R_mode interrupt_SWVR_INTR_R_mode.s
52interrupt_SWVR_INTR_W_mode interrupt_SWVR_INTR_W_mode.s
53
54</runargs>
55
56
57////////////////////////////////////////////////////////////////////////////
58// Miscellaneous interrupt diags
59
60interrupt_pci_spurious_err interrupt_pci_spurious_err.s -nosas
61
62</sys(interrupt)>
63
64<sys(pll) name=sys(pll)>
65<runargs -sas>
66
67<runargs -vcs_run_args=+bank_set_mask=3 -vcs_run_args=+core_set_mask=01>
68memop_all_atomics_pll memop_all_atomics.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -vcs_run_args=+pll_bypass -vcs_run_args=+NO_CCU_CSR_SLAM -vcs_run_args=+POR_pulse_width=4 -vcs_run_args=+gchkr_off
69
70</runargs>
71</runargs>
72
73</sys(pll)>
74
75<sys(tcu_no_tck) name=sys(tcu_no_tck)>
76<runargs -midas_args=-DINC_SOC_ERR_TRAPS -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off >
77 tcu_csr_regs_rw tcu_csr_regs_rw.s -nosas
78 tcu_regs_l2 tcu_regs_l2.s
79 tcu_regs_soc tcu_regs_soc.s
80 tcu_regs_bist tcu_regs_bist.s -nosas
81</runargs>
82
83<runargs -midas_args=-DINC_SOC_ERR_TRAPS -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+MCU_REG_DEFAULT_VAL -vcs_run_args=+NO_MCU_CSR_SLAM>
84 tcu_regs_dram tcu_regs_dram.s -nofast_boot
85 tcu_regs_dram_2 tcu_regs_dram_2.s -nofast_boot
86 tcu_regs_dram_piu tcu_regs_dram_piu.s -nofast_boot
87</runargs>
88
89</sys(tcu_no_tck)>
90
91<sys(dbg) name=sys(dbg)>
92<runargs -vcs_run_args=-DL2_7 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+50000 -nosas -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+DISABLE_L2_CHECKER -vcs_run_args=+BOOT_CODE_FINISH=13000000 -vcs_run_args=+TIMEOUT=10000 -vcs_run_args=+PEU_TEST>
93Debug_Event_Mcu_Ctl2 Debug_Event_Mcu2.s
94</runargs>
95
96<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off>
97Debug_Event_L2_PABank0 Debug_Event_L2PaBank.s -midas_args=-DMCU0
98Debug_Event_L2_PABank2 Debug_Event_L2PaBank.s -midas_args=-DMCU1
99Debug_Event_L2_PABank4 Debug_Event_L2PaBank.s -midas_args=-DMCU2
100Debug_Event_L2_PABank6 Debug_Event_L2PaBank.s -midas_args=-DMCU3
101Debug_Event_L2_PABank1 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU0
102Debug_Event_L2_PABank3 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU1
103Debug_Event_L2_PABank5 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU2
104Debug_Event_L2_PABank7 Debug_Event_L2PaBankOdd.s -midas_args=-DMCU3
105</runargs>
106
107
108
109
110<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+DISABLE_L2_CHECKER>
111Debug_Event_Mcu_Ctl0 Debug_Event_Mcu.s -midas_args=-DMCU0
112Debug_Event_Mcu_Ctl1 Debug_Event_Mcu.s -midas_args=-DMCU1
113Debug_Event_Mcu_Ctl2 Debug_Event_Mcu.s -midas_args=-DMCU2
114Debug_Event_Mcu_Ctl3 Debug_Event_Mcu.s -midas_args=-DMCU3
115</runargs>
116
117<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+DISABLE_L2_CHECKER>
118Debug_Event_L2Bank0 Debug_Event_L2.s -midas_args=-DL2_0 -midas_args=-DMCU0
119Debug_Event_L2Bank2 Debug_Event_L2.s -midas_args=-DL2_2 -midas_args=-DMCU1
120Debug_Event_L2Bank4 Debug_Event_L2.s -midas_args=-DL2_4 -midas_args=-DMCU2
121Debug_Event_L2Bank6 Debug_Event_L2.s -midas_args=-DL2_6 -midas_args=-DMCU3
122</runargs>
123
124
125<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+DISABLE_L2_CHECKER>
126Debug_Event_L2Bank1 Debug_Event_L2Odd.s -midas_args=-DMCU0
127Debug_Event_L2Bank3 Debug_Event_L2Odd.s -midas_args=-DMCU1
128Debug_Event_L2Bank5 Debug_Event_L2Odd.s -midas_args=-DMCU2
129Debug_Event_L2Bank7 Debug_Event_L2Odd.s -midas_args=-DMCU3
130</runargs>
131
132
133#ifndef FC_NO_NIU_T2
134<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -midas_args=-DMCU1 -vcs_run_args=+ios_0in_ras_chk_off>
135Debug_Niu_Obs Debug_Niu_Mode.s
136</runargs>
137#endif
138
139</sys(dbg)>
140
141<runargs -vcs_run_args=+8_FBDIMMS -midas_args=-DPART_0_BASE=0x1000000000>
142
143<sys(ras)>
144
145// Applied for ALL Error diags
146// esr mon off
147// CEEN and NCEEN bit OFF
148<runargs -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+100000 -midas_args=-DCREGS_L2_ERR_EN_REG_CEEN=0 -midas_args=-DCREGS_L2_ERR_EN_REG_NCEEN=0 -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+siu_mon_l2err>
149
150// L2 RAS DIAGS
151<sys(err_l2) name=sys(err_l2)>
152
153// Need -nosas because of L2$ diagnostic load
154// Use +L2_SCRUB_FREQ=1000 to speed simulation
155// Use +L2_SCRUB_IDX=50 to match the corrupted address
156n2_err_l2_LDSC_cecc_trap n2_err_l2_LDSC_cecc_trap.s -nosas -vcs_run_args=+L2_SCRUB_FREQ=1000 -vcs_run_args=+L2_SCRUB_IDX=50
157n2_err_l2_LDSU_uecc_trap n2_err_l2_LDSU_uecc_trap.s -nosas -vcs_run_args=+L2_SCRUB_FREQ=1000 -vcs_run_args=+L2_SCRUB_IDX=50
158
159// Only for following few l2 error diags
160<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS -midas_args=-DL2_LDAC_err>
161
162n2_err_l2_LDAC_tid_01.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x03 -finish_mask=03
163n2_err_l2_LDAC_tid_02.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x05 -finish_mask=05
164n2_err_l2_LDAC_tid_03.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x09 -finish_mask=09
165n2_err_l2_LDAC_tid_04.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x11 -finish_mask=11
166n2_err_l2_LDAC_tid_05.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x21 -finish_mask=21
167n2_err_l2_LDAC_tid_06.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x41 -finish_mask=41
168n2_err_l2_LDAC_tid_07.s n2_err_l2_LDAC_all_tids.s -midas_args=-DCMP_THREAD_START=0x81 -finish_mask=81
169</runargs>
170
171//Only for following L2 RAS diags
172<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS >
173
174n2_err_L2_LDWC_cecc_trap n2_err_L2_LDWC_cecc_trap.s
175n2_err_L2_LDWC_cecc n2_err_L2_LDWC_cecc.s
176n2_err_L2_LVC_cecc_trap n2_err_L2_LVC_cecc_trap.s
177n2_err_L2_LVC_cecc n2_err_L2_LVC_cecc.s
178n2_err_L2_LVC_cecc_Synd_check n2_err_L2_LVC_cecc_SyndCheck.s
179n2_err_L2_LDWU_MEU_uecc n2_err_L2_LDWU_uecc.s
180n2_err_l2_LDAC_st_cecc_trap n2_err_l2_LDAC_st_cecc_trap.s
181n2_err_l2_LDAC_st_cecc n2_err_l2_LDAC_st_cecc.s
182n2_err_l2_LDAC_cecc_trap n2_err_l2_LDAC_cecc_trap.s -midas_args=-DL2_LDAC_err
183n2_err_l2_LDAC_cecc n2_err_l2_LDAC_cecc.s
184n2_err_l2_LDAU_trap n2_err_l2_LDAU_uecc_trap.s
185//n2_err_l2_LDAU_trap_inj n2_err_l2_trap_ErrInj.s -midas_args=-DLDAU -midas_args=-DL2_0 -vcs_run_args=+L2DA_INJECT_UE
186n2_err_l2_LDAU_trap_2thrds n2_err_l2_LDAU_uecc_2thrds_trap.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
187n2_err_l2_LDAU_uecc n2_err_l2_LDAU_uecc.s
188n2_err_l2_LDAU_st_uecc_trap n2_err_l2_LDAU_st_uecc_trap.s -midas_args=-DL2_DWS_err
189n2_err_l2_LDAU_st_uecc n2_err_l2_LDAU_st_uecc.s
190n2_err_l2_LDWU_uecc n2_err_l2_LDWU_uecc.s
191n2_err_l2_csrs n2_err_l2_csrs.s
192n2_err_l2_LTC_cecc_trap n2_err_l2_LTC_cecc_trap.s
193n2_err_l2_LTC_cecc n2_err_l2_LTC_cecc.s
194n2_err_l2_LTC_4bnk_trap n2_err_l2_LTC_4bnk_cecc_trap.s -vcs_run_args=+bank_set_mask=3
195n2_err_l2_LTC_L2off_trap n2_err_l2_LTC_cecc_trap_L2off.s -vcs_run_args=+gchkr_off
196//n2_err_l2_LRU n2_err_l2_LRU.s
197n2_err_l2_LDWU_uecc_trap n2_err_l2_LDWU_uecc_trap.s -midas_args=-DL2_DWS_err
198
199
200// L2 Not Data diag, In Fc because MCU registers prog in FC
201n2_err_L2_NotData_NDSP n2_err_L2_NotData.s -midas_args=-DL2_NDSP_err
202n2_err_L2_NotData_NDSP_meu n2_err_L2_NotData_NDSP_meu.s
203n2_err_L2_NotData_NDSP_meu_trap0 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL20
204n2_err_L2_NotData_NDSP_meu_trap1 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL21
205n2_err_L2_NotData_NDSP_meu_trap2 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL22
206n2_err_L2_NotData_NDSP_meu_trap3 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL23
207n2_err_L2_NotData_NDSP_meu_trap4 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL24
208n2_err_L2_NotData_NDSP_meu_trap5 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL25
209n2_err_L2_NotData_NDSP_meu_trap6 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL26
210n2_err_L2_NotData_NDSP_meu_trap7 n2_err_L2_NotData_NDSP_meu_trap.s -midas_args=-DL2_NDSP_err -midas_args=-DL27
211
212// n2_err_L2_NotData_NDDM n2_err_L2_NotData_NDDM.s -midas_args=-DL2_NDSP_err -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
213// n2_err_L2_NotData_NDDM_meu n2_err_L2_NotData_NDDM_meu.s -midas_args=-DL2_NDDM_err -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
214// n2_err_L2_NotData_NDDM_meu_trap n2_err_L2_NotData_NDDM_meu_trap.s -midas_args=-DL2_NDDM_err -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off -midas_args=-DL20
215
216// n2_err_l2_LDRC_cecc_trap n2_err_l2_LDRC_cecc_trap.s -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
217// n2_err_l2_LDRU_cecc_trap n2_err_l2_LDRU_cecc_trap.s -vcs_run_args=+PEU_TEST -vcs_run_args=+PEU_MEM_Chkr_off
218</runargs>
219</sys(err_l2)>
220
221
222// ADVANCED L2 RAS DIAGS
223<sys(err_l2_ADV) name=sys(err_l2_ADV)>
224
225<runargs -nosas -midas_args=-DINC_SOC_ERR_TRAPS >
226n2_err_dram_L2_Off_DAU_ld_mcu0 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU0
227n2_err_dram_L2_Off_DAU_ld_mcu1 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU1
228n2_err_dram_L2_Off_DAU_ld_mcu2 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU2
229n2_err_dram_L2_Off_DAU_ld_mcu3 n2_err_dram_DAU_ld_trap_L2_Off.s -midas_args=-DMCU3
230
231n2_err_dram_L2_Off_DAC_st n2_err_dram_DAC_st_trap_L2_Off.s -midas_args=-DMCU0
232n2_err_dram_L2_Off_DAU_st_mcu0 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU0 -midas_args=-DL2_DWS_err
233//n2_err_dram_L2_Off_DAU_st_mcu1 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU1 -midas_args=-DL2_DWS_err
234//n2_err_dram_L2_Off_DAU_st_mcu2 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU2 -midas_args=-DL2_DWS_err
235//n2_err_dram_L2_Off_DAU_st_mcu3 n2_err_dram_DAU_st_trap_L2_Off.s -midas_args=-DMCU3 -midas_args=-DL2_DWS_err
236
237n2_err_dram_L2_Off_DAC_ld_mcu0 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU0 -midas_args=-DL2_LDAC_err
238n2_err_dram_L2_Off_DAC_ld_mcu1 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU1 -midas_args=-DL2_LDAC_err
239n2_err_dram_L2_Off_DAC_ld_mcu2 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU2 -midas_args=-DL2_LDAC_err
240n2_err_dram_L2_Off_DAC_ld_mcu3 n2_err_dram_DAC_ld_trap_L2_Off.s -midas_args=-DMCU3 -midas_args=-DL2_LDAC_err
241
242n2_err_L2_LVF_WrmRst_uecc n2_err_L2_LVF_uecc_WrmRst.s
243//n2_err_L2_FatalErr_WrmRst n2_err_L2_FatalErr_WrmRst.s
244
245</runargs>
246
247<runargs -nosas >
248n2_err_l2_LDAC_LDWC_noDAC n2_err_l2_LDAC_LDWC_noDAC.s
249
250</runargs>
251</sys(err_l2_ADV)>
252
253//End of L2 Advanced Diags
254
255
256// MCU Error diags; except FBD errors
257<sys(err_mcu) name=sys(err_mcu)>
258
259
260<runargs -midas_args=-DINC_SOC_ERR_TRAPS -midas_args=-DINC_MCU_ERR_REG>
261
262//-nosas to be debugged and removed
263n2_err_mcu_csrs n2_err_mcu_csrs.s -vcs_run_args=+mcu_errmon_disable -nosas
264
265n2_err_dram_DAC_ld_mcu0 n2_err_dram_DAC_ld.s -midas_args=-DMCU0 -sas
266n2_err_dram_DAC_ld_mcu1 n2_err_dram_DAC_ld.s -midas_args=-DMCU1
267n2_err_dram_DAC_ld_mcu2 n2_err_dram_DAC_ld.s -midas_args=-DMCU2
268n2_err_dram_DAC_ld_mcu3 n2_err_dram_DAC_ld.s -midas_args=-DMCU3
269
270n2_err_dram_DAC_ld_trap_mcu0 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU0
271n2_err_dram_DAC_ld_trap_mcu1 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU1
272n2_err_dram_DAC_ld_trap_mcu2 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU2
273n2_err_dram_DAC_ld_trap_mcu3 n2_err_dram_DAC_ld_trap.s -midas_args=-DMCU3
274
275n2_err_dram_DAC_st_mcu0 n2_err_dram_DAC_st.s -midas_args=-DMCU0
276n2_err_dram_DAC_st_mcu1 n2_err_dram_DAC_st.s -midas_args=-DMCU1
277n2_err_dram_DAC_st_mcu2 n2_err_dram_DAC_st.s -midas_args=-DMCU2
278n2_err_dram_DAC_st_mcu3 n2_err_dram_DAC_st.s -midas_args=-DMCU3
279
280n2_err_dram_DAC_st_trap n2_err_dram_DAC_st_trap.s
281
282n2_err_dram_DAU_st n2_err_dram_DAU_st.s
283n2_err_dram_DAU_st_trap n2_err_dram_DAU_st_trap.s -midas_args=-DL2_DWS_err
284
285
286// advanced Directed Diags
287n2_err_dram_Mem_Poisn_L2Bank0 n2_err_dram_Mem_Poisn.s -midas_args=-DL2_0 -nosas
288n2_err_dram_Mem_Poisn_L2Bank1 n2_err_dram_Mem_Poisn.s -midas_args=-DL2_1 -nosas
289n2_err_all_4_mcu n2_err_all_4_mcu.s
290
291
292</runargs>
293
294</sys(err_mcu)>
295
296// MCU Err Advanced Diags
297<sys(err_mcu_ADV) name=sys(err_mcu_ADV)>
298
299<runargs -vcs_run_args=+mcu_errmon_disable >
300
301n2_err_dram_dac_dau_fbr_mcu0 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
302n2_err_dram_dac_dau_fbr_mcu1 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
303n2_err_dram_dac_dau_fbr_mcu2 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
304n2_err_dram_dac_dau_fbr_mcu3 n2_err_dram_dac_dau_fbr.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
305n2_err_dram_dau_fbr_mcu0 n2_err_dram_dau_fbr.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
306n2_err_dram_dau_fbr_mcu1 n2_err_dram_dau_fbr.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
307n2_err_dram_dau_fbr_mcu2 n2_err_dram_dau_fbr.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
308n2_err_dram_dau_fbr_mcu3 n2_err_dram_dau_fbr.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
309n2_err_dram_afe_NoMemOp n2_err_dram_afe_NoMemOp.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1
310n2_err_dram_sfe_NoMemOp n2_err_dram_sfe_NoMemOp.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
311
312n2_err_dram_dac_dau_fbr_fbu_mcu0 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
313n2_err_dram_dac_dau_fbr_fbu_mcu1 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
314n2_err_dram_dac_dau_fbr_fbu_mcu2 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
315n2_err_dram_dac_dau_fbr_fbu_mcu3 n2_err_dram_dac_dau_fbr_fbu.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
316
317</runargs>
318
319</sys(err_mcu_ADV)>
320
321
322
323// IOS Error diags
324// runarg for all IOS diags
325<runargs -vcs_run_args=+ios_0in_ras_chk_off >
326<sys(ios_mcu_err) name=sys(ios_mcu_err)>
327
328<runargs -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable >
329
330//FBR
331n2_err_Mcu0Fbr_C n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
332n2_err_Mcu0Fbr_AFE n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1
333n2_err_Mcu0Fbr_AA n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x2 -midas_args=-DINJ_ERR_SRC=2
334n2_err_Mcu0Fbr_SFPE n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
335
336
337n2_err_Mcu0Fbr_C_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
338n2_err_Mcu0Fbr_AFE_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1
339n2_err_Mcu0Fbr_AA_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x2 -midas_args=-DINJ_ERR_SRC=2
340n2_err_Mcu0Fbr_SFPE_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
341
342n2_err_Mcu1Fbr_C n2_err_mcu_int.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
343n2_err_Mcu1Fbr_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
344
345n2_err_Mcu2Fbr_C n2_err_mcu_int.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
346n2_err_Mcu2Fbr_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
347
348n2_err_Mcu3Fbr_C n2_err_mcu_int.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
349n2_err_Mcu3Fbr_trap n2_err_mcu_ios_fbr_trap.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Fbr -midas_args=-DFBR -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
350
351<runargs -vcs_run_args=+nb_crc_mon_disable >
352
353n2_err_Mcu0Fbu_C n2_err_mcu_int_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x0 -midas_args=-DINJ_ERR_SRC=0
354
355n2_err_Mcu0Fbu_AFE n2_err_mcu_int_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x1 -midas_args=-DINJ_ERR_SRC=1
356
357n2_err_Mcu0Fbu_AA n2_err_mcu_int_fbu_AA.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x2 -midas_args=-DINJ_ERR_SRC=2
358
359n2_err_Mcu0Fbu_SFPE n2_err_mcu_int_fbu.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Fbu -midas_args=-DFBSYND=0x3 -midas_args=-DINJ_ERR_SRC=3
360</runargs>
361
362//ECC
363n2_err_Mcu0Ecc n2_err_mcu_int.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Ecc -midas_args=-DECC
364n2_err_Mcu0Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU0 -midas_args=-DERR_FIELD=Mcu0Ecc -midas_args=-DECC
365
366n2_err_Mcu1Ecc n2_err_mcu_int.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Ecc -midas_args=-DECC
367n2_err_Mcu1Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU1 -midas_args=-DERR_FIELD=Mcu1Ecc -midas_args=-DECC
368
369n2_err_Mcu2Ecc n2_err_mcu_int.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Ecc -midas_args=-DECC
370n2_err_Mcu2Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU2 -midas_args=-DERR_FIELD=Mcu2Ecc -midas_args=-DECC
371
372n2_err_Mcu3Ecc n2_err_mcu_int.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Ecc -midas_args=-DECC
373n2_err_Mcu3Ecc_trap n2_err_mcu_ios_ecc_trap.s -midas_args=-DMCU3 -midas_args=-DERR_FIELD=Mcu3Ecc -midas_args=-DECC
374
375//FBR and ECC both
376
377</runargs>
378
379</sys(ios_mcu_err)>
380
381
382
383// IOS ncu error diags
384
385<sys(ios_ncu_err) name=sys(ios_ncu_err)>
386
387//temporarily disabling sas because of outstanding bug 103339; associated diag n2_err_NcuDmuCredit
388n2_err_ncu_csrs n2_err_ncu_csrs.s -nosas
389n2_err_ncu_ejr_ce_10 n2_err_ncu_ejr_ce_10.s
390n2_err_ncu_esr_3 n2_err_ncu_esr_3.s
391
392n2_err_ncu_all_int n2_err_ncu_all_int.s
393n2_err_ncu_NcuMondoTable n2_err_ncu_dmu_mondo.s -midas_args=-DERR_FIELD=NcuMondoTable -midas_args=-DTT=0x32
394n2_err_ncu_NcuMondoFifo n2_err_ncu_dmu_mondo_2th.s -midas_args=-DERR_FIELD=NcuMondoFifo -midas_args=-DCMP_THREAD_START=0x3 -finish_mask=2 -midas_args=-DTT=0x32
395</sys(ios_ncu_err)>
396
397
398</runargs>
399
400//all diags
401</runargs>
402
403</sys(ras)>
404
405// Applied for ALL Error diags
406// esr mon off
407
408<runargs -vcs_run_args=+ios_0in_ras_chk_off -vcs_run_args=+l2esr_mon_off -vcs_run_args=+l2cpx_errmon_off -max_cycle=+500000 -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+mcu_errmon_disable >
409
410// This suit requires PEU
411
412// </sys(ios_adv_niu_ras)>
413
414<sys(ios_adv_ncu_ras) name=sys(ios_adv_ncu_ras)>
415<runargs -vcs_run_args=+ios_0in_ras_chk_off >
416
417//NCU: using EJR
418
419n2_err_adv_NcuCtagUe_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=NcuCtagUe -midas_args=-DTT=0x40 -vcs_run_args=+lsu_mon_off
420n2_err_adv_NcuCtagCe_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=NcuCtagCe -midas_args=-DTT=0x63
421
422n2_err_adv_NcuDataParity_mondo n2_err_adv_piu_int_ejr_nomondo.s -midas_args=-DERR_FIELD=NcuDataParity -vcs_run_args=+PEU_TEST
423
424//DMU
425n2_err_adv_DmuNcuCredit_int n2_err_adv_piu_int_ejr.s -midas_args=-DERR_FIELD=DmuNcuCredit -midas_args=-DTT=0x40
426
427</runargs>
428
429</sys(ios_adv_ncu_ras)>
430
431
432/////////////////////// Diags with follow up of Silicon Level Testing ////////////////////////////
433
434<sys(mcu_si_ras) name=sys(mcu_si_ras)>
435n2_mcu_si_DSC n2_mcu_si_DSC.s -vcs_run_args=+l2cpx_mon_off -midas_args=-DMCU0
436
437</sys(mcu_si_ras)>
438
439// for all diags
440
441</runargs>
442</runargs>
443
444
445<tso_diags name=tso_diags>
446
447tso_n1_bcopy tso_n1_bcopy.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta
448tso_n1_binit1 tso_n1_binit1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta
449tso_n1_binit2 tso_n1_binit2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta
450
451#if (! defined FC)
452
453tso_n1_binit3 tso_n1_binit3.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff
454tso_n1_cross_mod1 tso_n1_cross_mod1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
455tso_n1_cross_mod101 tso_n1_cross_mod101.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
456tso_n1_cross_mod102 tso_n1_cross_mod102.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
457tso_n1_cross_mod103 tso_n1_cross_mod103.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
458tso_n1_cross_mod2 tso_n1_cross_mod2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
459tso_n1_cross_mod201 tso_n1_cross_mod201.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
460tso_n1_cross_mod203 tso_n1_cross_mod203.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
461tso_n1_cross_mod3 tso_n1_cross_mod3.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+inst_check_off=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
462tso_n1_cross_mod4 tso_n1_cross_mod4.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff
463tso_n1_cross_mod5 tso_n1_cross_mod5.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
464tso_n1_cross_mod6_bug6372 tso_n1_cross_mod6_bug6372.s -midas_args=-DTHREAD_COUNT=4 -finish_mask=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=f
465tso_n1_dekker1 tso_n1_dekker1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
466tso_n1_dekker2 tso_n1_dekker2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3
467tso_n1_dekker10 tso_n1_dekker10.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
468tso_n1_dekker11 tso_n1_dekker11.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -vcs_run_args=+thread=3 -nosas
469tso_n1_false_sharing1 tso_n1_false_sharing1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
470tso_n1_false_sharing2 tso_n1_false_sharing2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff
471tso_n1_false_sharing_vershort tso_n1_false_sharing_vershort.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff
472tso_n1_indirection1 tso_n1_indirection1.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -vcs_run_args=+thread=7 -nosas
473tso_n1_indirection2 tso_n1_indirection2.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -vcs_run_args=+thread=7 -nosas
474tso_n1_membar1 tso_n1_membar1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta
475tso_n1_mutex1 tso_n1_mutex1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
476tso_n1_mutex2_ldstub tso_n1_mutex2_ldstub.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
477tso_n1_mutex3_cas tso_n1_mutex3_cas.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
478tso_n1_mutex4_casx tso_n1_mutex4_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
479tso_n1_mutex5_swap_casx tso_n1_mutex5_swap_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
480tso_n1_prod_cons1 tso_n1_prod_cons1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
481tso_n1_prod_cons2 tso_n1_prod_cons2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
482tso_n1_prod_cons_variation1_1 tso_n1_prod_cons_variation1_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
483tso_n1_prod_cons_variation2_1 tso_n1_prod_cons_variation2_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -vcs_run_args=+thread=ff -nosas
484tso_n1_self_mod1 tso_n1_self_mod1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
485tso_n1_self_mod2 tso_n1_self_mod2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
486tso_n1_self_mod3 tso_n1_self_mod3.s -midas_args=-DCMP_THREAD_START=0x11 -finish_mask=11 -vcs_run_args=+show_delta
487tso_n1_self_mod5 tso_n1_self_mod5.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
488tso_n1_self_mod6 tso_n1_self_mod6.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
489tso_n1_self_mod7 tso_n1_self_mod7.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
490tso_n1_self_mod8 tso_n1_self_mod8.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
491tso_n1_self_mod9 tso_n1_self_mod9.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
492tso_n1_self_mod10 tso_n1_self_mod10.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
493tso_n1_self_mod11 tso_n1_self_mod11.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
494tso_n1_self_mod101 tso_n1_self_mod101.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
495tso_n1_self_mod102 tso_n1_self_mod102.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
496tso_n1_self_mod103 tso_n1_self_mod103.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=11 -nosas
497tso_n1_self_mod104 tso_n1_self_mod104.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
498tso_n1_self_mod105 tso_n1_self_mod105.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
499
500tso_n1_self_mod106 tso_n1_self_mod106.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
501tso_n1_self_mod107 tso_n1_self_mod107.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
502tso_n1_self_mod108 tso_n1_self_mod108.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
503tso_n1_self_mod109 tso_n1_self_mod109.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
504tso_n1_self_mod110 tso_n1_self_mod110.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
505tso_n1_self_mod111 tso_n1_self_mod111.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
506tso_n1_self_mod201 tso_n1_self_mod201.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
507tso_n1_self_mod202 tso_n1_self_mod202.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
508tso_n1_self_mod203 tso_n1_self_mod203.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=11 -nosas
509tso_n1_self_mod206 tso_n1_self_mod206.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
510tso_n1_self_mod207 tso_n1_self_mod207.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -vcs_run_args=+thread=1
511tso_n1_starve0 tso_n1_starve0.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off
512tso_n1_starve1 tso_n1_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off
513
514#endif
515
516#if (defined FC)
517
518tso_n1_binit3 tso_n1_binit3.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff
519tso_n1_cross_mod1 tso_n1_cross_mod1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
520tso_n1_cross_mod101 tso_n1_cross_mod101.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
521tso_n1_cross_mod102 tso_n1_cross_mod102.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
522tso_n1_cross_mod103 tso_n1_cross_mod103.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
523tso_n1_cross_mod2 tso_n1_cross_mod2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
524tso_n1_cross_mod201 tso_n1_cross_mod201.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
525tso_n1_cross_mod203 tso_n1_cross_mod203.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
526tso_n1_cross_mod3 tso_n1_cross_mod3.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+inst_check_off=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
527tso_n1_cross_mod4 tso_n1_cross_mod4.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff
528tso_n1_cross_mod5 tso_n1_cross_mod5.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
529tso_n1_cross_mod6_bug6372 tso_n1_cross_mod6_bug6372.s -midas_args=-DTHREAD_COUNT=4 -finish_mask=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf
530tso_n1_dekker1 tso_n1_dekker1.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
531tso_n1_dekker2 tso_n1_dekker2.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3
532tso_n1_dekker10 tso_n1_dekker10.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
533tso_n1_dekker11 tso_n1_dekker11.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x3 -nosas
534tso_n1_false_sharing1 tso_n1_false_sharing1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
535tso_n1_false_sharing2 tso_n1_false_sharing2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff
536tso_n1_false_sharing_vershort tso_n1_false_sharing_vershort.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff
537tso_n1_indirection1 tso_n1_indirection1.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x7 -nosas
538tso_n1_indirection2 tso_n1_indirection2.s -finish_mask=7 -midas_args=-DTHREAD_COUNT=3 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x7 -nosas
539tso_n1_membar1 tso_n1_membar1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta
540tso_n1_mutex1 tso_n1_mutex1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
541tso_n1_mutex2_ldstub tso_n1_mutex2_ldstub.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
542tso_n1_mutex3_cas tso_n1_mutex3_cas.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
543tso_n1_mutex4_casx tso_n1_mutex4_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
544tso_n1_mutex5_swap_casx tso_n1_mutex5_swap_casx.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
545tso_n1_prod_cons1 tso_n1_prod_cons1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
546tso_n1_prod_cons2 tso_n1_prod_cons2.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
547tso_n1_prod_cons_variation1_1 tso_n1_prod_cons_variation1_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
548tso_n1_prod_cons_variation2_1 tso_n1_prod_cons_variation2_1.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xff -nosas
549tso_n1_self_mod1 tso_n1_self_mod1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
550tso_n1_self_mod2 tso_n1_self_mod2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
551tso_n1_self_mod3 tso_n1_self_mod3.s -finish_mask=11 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x11
552tso_n1_self_mod5 tso_n1_self_mod5.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
553tso_n1_self_mod6 tso_n1_self_mod6.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
554tso_n1_self_mod7 tso_n1_self_mod7.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
555tso_n1_self_mod8 tso_n1_self_mod8.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
556tso_n1_self_mod9 tso_n1_self_mod9.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
557tso_n1_self_mod10 tso_n1_self_mod10.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
558tso_n1_self_mod11 tso_n1_self_mod11.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
559tso_n1_self_mod101 tso_n1_self_mod101.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
560tso_n1_self_mod102 tso_n1_self_mod102.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
561tso_n1_self_mod103 tso_n1_self_mod103.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x11 -nosas
562tso_n1_self_mod104 tso_n1_self_mod104.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
563tso_n1_self_mod105 tso_n1_self_mod105.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
564
565tso_n1_self_mod106 tso_n1_self_mod106.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
566tso_n1_self_mod107 tso_n1_self_mod107.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
567tso_n1_self_mod108 tso_n1_self_mod108.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
568tso_n1_self_mod109 tso_n1_self_mod109.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
569tso_n1_self_mod110 tso_n1_self_mod110.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
570tso_n1_self_mod111 tso_n1_self_mod111.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
571tso_n1_self_mod201 tso_n1_self_mod201.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
572tso_n1_self_mod202 tso_n1_self_mod202.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
573tso_n1_self_mod203 tso_n1_self_mod203.s -finish_mask=11 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DTHREAD_STRIDE=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x11 -nosas
574tso_n1_self_mod206 tso_n1_self_mod206.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
575tso_n1_self_mod207 tso_n1_self_mod207.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=1 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0x1
576tso_n1_starve0 tso_n1_starve0.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off
577tso_n1_starve1 tso_n1_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off
578
579#endif
580
581#if (! defined FC)
582
583tso_n1_prod_cons1_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
584tso_n1_prod_cons2_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
585tso_n1_dekker1_pio tso_n1_dekker1_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+thread=3
586tso_n1_dekker2_pio tso_n1_dekker2_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -vcs_run_args=+thread=3
587tso_n1_dekker7 tso_n1_dekker7.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
588tso_n1_dekker8 tso_n1_dekker8.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
589tso_n1_dekker9 tso_n1_dekker9.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
590tso_n1_peterson1 tso_n1_peterson1.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
591tso_n1_peterson2 tso_n1_peterson2.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
592tso_n1_peterson3 tso_n1_peterson3.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -vcs_run_args=+thread=ff -sas
593
594#endif
595
596#if (defined FC)
597
598tso_n1_prod_cons1_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
599tso_n1_prod_cons2_pio tso_n1_prod_cons1_pio.s -finish_mask=ff -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
600tso_n1_dekker1_pio tso_n1_dekker1_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DCMP_THREAD_START=0x3
601tso_n1_dekker2_pio tso_n1_dekker2_pio.s -finish_mask=3 -midas_args=-DTHREAD_COUNT=2 -midas_args=-DCMP_THREAD_START=0x3
602tso_n1_dekker7 tso_n1_dekker7.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
603tso_n1_dekker8 tso_n1_dekker8.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
604tso_n1_dekker9 tso_n1_dekker9.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
605tso_n1_peterson1 tso_n1_peterson1.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
606tso_n1_peterson2 tso_n1_peterson2.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
607tso_n1_peterson3 tso_n1_peterson3.pal -finish_mask=ff -midas_args=-pal_diag_args=8 -midas_args=-DTHREAD_COUNT=8 -midas_args=-DCMP_THREAD_START=0xff -sas
608
609#endif
610
611#if (!defined CCM && !defined CMP)
612
613#if (! defined FC)
614
615tso_n1_ld_starve1 tso_n1_ld_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off
616tso_n1_ld_starve2 tso_n1_ld_starve2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -vcs_run_args=+thread=f -vcs_run_args=+gchkr_off
617
618#endif
619
620#if (defined FC)
621
622tso_n1_ld_starve1 tso_n1_ld_starve1.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off
623tso_n1_ld_starve2 tso_n1_ld_starve2.s -finish_mask=1 -midas_args=-DTHREAD_COUNT=4 -vcs_run_args=+show_delta -midas_args=-DCMP_THREAD_START=0xf -vcs_run_args=+gchkr_off
624
625#endif
626
627#endif
628
629</tso_diags>
630
631<sys(ccu_clk_ratios) name=sys(ccu_clk_ratios)>
632
633 <fc_ccu_166> // fc bench: default is 166mhz sys clk
634
635 <runargs -midas_args=-DCMP_THREAD_START=0x1 -finish_mask=1> // single thread (ie. thread 0)
636 <runargs -midas_args=-DRESET_STAT_CHECK> // must specify this option when doing WMR reset
637 <runargs -nofast_boot -vcs_run_args=+NO_CCU_CSR_SLAM -midas_args=-DCCU_REG_PROG -midas_args=-DWARM_RESET_INIT>
638 <runargs -sas -midas_args=-DBOOTPROM_INIT>
639 <runargs -vcs_run_args=+SSI_CLK_4 -vcs_run_args=+show_delta>
640 <runargs -vcs_run_args=+mcu_errmon_disable -vcs_run_args=+mcu_fmon_disable -vcs_run_args=+l2esr_mon_off>
641 <runargs -vcs_run_args=+ccu_checker>
642 memop_all_atomics_CMPDR_RATIO_2_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_00
643 memop_all_atomics_CMPDR_RATIO_2_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_25
644 memop_all_atomics_CMPDR_RATIO_2_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_50
645 memop_all_atomics_CMPDR_RATIO_2_75_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_2_75
646 memop_all_atomics_CMPDR_RATIO_3_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_00
647 memop_all_atomics_CMPDR_RATIO_3_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_25
648 memop_all_atomics_CMPDR_RATIO_3_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_50
649 memop_all_atomics_CMPDR_RATIO_3_75_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_3_75
650 memop_all_atomics_CMPDR_RATIO_4_00_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_00
651 memop_all_atomics_CMPDR_RATIO_4_25_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_25
652 memop_all_atomics_CMPDR_RATIO_4_50_sysclk166 memop_all_atomics.s -midas_args=-DCMPDR_RATIO_4_50
653 </runargs>
654 </runargs>
655 </runargs>
656 </runargs>
657 </runargs>
658 </runargs>
659 </runargs>
660
661</fc_ccu_166>
662</sys(ccu_clk_ratios)>
663
664<sys(mcu) name=sys(mcu)>
665
666
667#if (!defined FC)
668<runargs -sas -vcs_run -vcs_run_args=+8_FBDIMMS -midas_args=-allow_tsb_conflicts -vcs_run_args=+thread=ff>
669#endif
670#if (defined FC)
671<runargs -sas -vcs_run -vcs_run_args=+8_FBDIMMS -midas_args=-allow_tsb_conflicts -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff >
672#endif
673
674n2_mcu_0_all_bcopy_all_banks n2_mcu_0_all_bcopy_all_banks.s
675</runargs>
676
677<runargs -vcs_run -sas -vcs_run_args=+8_FBDIMMS >
678n2_mcu_0_all_fbdimm_rkhi_mcu0 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU0 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
679n2_mcu_0_all_fbdimm_rkhi_mcu1 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU1 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
680n2_mcu_0_all_fbdimm_rkhi_mcu2 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU2 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
681n2_mcu_0_all_fbdimm_rkhi_mcu3 n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU3 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
682
683n2_mcu_0_all_fbdimm_rkhi_mcu0_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU0 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off
684n2_mcu_0_all_fbdimm_rkhi_mcu1_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU1 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off
685n2_mcu_0_all_fbdimm_rkhi_mcu2_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU2 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off
686n2_mcu_0_all_fbdimm_rkhi_mcu3_L2off n2_mcu_0_all_fbdimm_rkhi.s -midas_args=-DMCU3 -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff -midas_args=-DL2_OFF -vcs_run_args=+gchkr_off
687
688n2_all_mcu_all_l2_8th n2_all_mcu_all_l2.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
689n2_all_th_ldst_8th n2_all_th_ldst.s -midas_args=-DCMP_THREAD_START=0xff -finish_mask=ff
690
691</runargs>
692
693</sys(mcu)>
694
695<sys(cmp) name=sys(cmp)>
696
697<runargs -vcs_run >
698
699n2_cmp_upk_pk_upk n2_cmp_upk_pk_upk.s -finish_mask=3 -sas
700n2_cmp_upk_pk_upk_nosas n2_cmp_upk_pk_upk.s -finish_mask=3 -nosas
701
702ncu_1core_wakup ncu_1core_wakup.s -finish_mask=0x2b -sas -midas_args=-DPART_0_BASE=0x200000000
703ncu_ssi_rw ncu_ssi_rw.s -finish_mask=0x1 -nofast_boot -sas -midas_args=-DPART_0_BASE=0x200000000
704ncu_ssi_rw_b2b ncu_ssi_rw_b2b.s -finish_mask=0x1 -nofast_boot -sas -midas_args=-DPART_0_BASE=0x200000000
705
706</runargs>
707
708</sys(cmp)>
709
710</runargs>
711</runargs>
712
713</runargs> //runargs -sas -finish_mask=ff
714