Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / cmp / vera / classes / asmToVeraIntf.vr
CommitLineData
86530b38
AT
1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: asmToVeraIntf.vr
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#include <vera_defines.vrh>
36#include <globals.vri>
37
38#include <ccxDevicesDefines.vri>
39
40#include <std_display_defines.vri>
41#include <std_display_class.vrh>
42#include <baseUtilsClass.vrh>
43#include <sparcBenchUtils.vrh>
44#include <utilsClass.vrh>
45#include <memArray.vrh>
46#include <baseAsmToVeraIntf.vrh>
47
48class AsmToVeraIntf extends BaseAsmToVeraIntf {
49
50 // THESE CALLS MUST RETURN IN ZERO TIME OR WE ARE BROKEN!!!
51
52 task new();
53
54 // trig_pc_d(kind, 64'h1234567812345678) -> intp(tid, type, vector) hex, w/no 64'h
55 // trig_pc_d(kind, 64'h1234567812345678) -> intp(tid, type, vector, src, wait)
56 task intp(reg [5:0] tid = 0,
57 reg [63:0] type = 0,
58 reg [63:0] vec = 0,
59 integer src = 16, // 0-16 are ccx ports. 16 = NCU
60 integer wait = 0);
61
62 // dump actual RAM contents
63 // trig_pc_d(1,expr(@VA(.MAIN.T1_ext_intr_200), 16, 16)) -> dump_mem(addr, amount)
64 task dump_mem(reg [63:0] addr=0,
65 integer amount = 8);
66
67 task warmrst(integer wait = 0);
68
69 // SPC BFM will do a store. Pick correct port w/ BFM!!!
70 // trig_pc_d(1,...) -> store(cpu/ccxPort, addr, data)
71 task store(reg [7:0] ccxPortMask = 0,
72 reg [63:0] addr=0,
73 reg [63:0] data=0);
74
75 task marker(string what, reg [5:0] fromTid, reg [63:0] pc);
76
77}
78
79
80
81task AsmToVeraIntf::new() {
82 probe_if.gOutOfBoot <= 64'h0;
83}
84
85
86
87// trig_pc_d(kind, 64'h1234567812345678) -> intp(tid, type, vector) hex, w/no 64'h
88// trig_pc_d(kind, 64'h1234567812345678) -> intp(tid, type, vector, src, wait)
89task AsmToVeraIntf::intp(reg [5:0] tid = 0,
90 reg [63:0] type = 0,
91 reg [63:0] vec = 0,
92 integer src = DEV_NCU, // 0-16 are ccx ports. 16 = NCU
93 integer wait = 0)
94{
95 fork {
96 repeat (wait) @(posedge CLOCK);
97 gUtil.sendIntr(tid,type,vec,src);
98 }
99 join none
100}
101
102// dump actual RAM contents
103// trig_pc_d(1,expr(@VA(.MAIN.T1_ext_intr_200), 16, 16)) -> dump_mem(addr, amount)
104task AsmToVeraIntf::dump_mem(reg [63:0] addr=0,
105 integer amount = 8)
106{
107 gMem.dumpMem(addr,amount);
108}
109
110
111task AsmToVeraIntf::warmrst(integer wait = 0)
112{
113 error("AsmToVeraIntf::warmrst is not coded yet\n");
114}
115
116
117// SPC BFM will do a store. Pick correct port w/ BFM!!!
118// trig_pc_d(1,...) -> store(cpu/ccxPort, addr, data)
119task AsmToVeraIntf::store(reg [7:0] ccxPortMask = 0,
120 reg [63:0] addr=0,
121 reg [63:0] data=0)
122{
123 error("AsmToVeraIntf::store is not coded yet\n");
124}
125
126// Use this to mark progress or a location in code. Any action can be
127// performed based on the string passed in. This is very flexible if all
128// you need is tid and pc.
129task AsmToVeraIntf::marker(string what, reg [5:0] fromTid, reg [63:0] pc)
130{
131
132 case (what) {
133 "bootEnd": {
134 // gOutOfBoot works with User Events to show asm diag progress.
135 // Function gUtil.getThreadEnables will tell you which threads are running.
136 // (so will top_if.th_check_enable)
137 //
138 // Here is how you use gOutOfBoot:
139 // reg [63:0] tmp;
140 // tmp = gUtil.getThreadEnables;
141 // while (tmp !== gOutOfBoot) wait_var(gOutOfBoot); // all threads out of boot
142 gOutOfBoot[fromTid] = 1;
143 probe_if.gOutOfBoot[fromTid] <= gOutOfBoot[fromTid];
144 }
145 "bootStart": {
146 // see comments for bootEnd above. This will clear bits in gOutOfBoot
147 // when that thread starts boot code execution after a reset.
148 //
149 // Here is how you could use gOutOfBoot if +thread is used, once you
150 // detect a warm reset has started.
151
152 // Any thread has started boot code after this line of code
153 // while (top_if.th_check_enable === gOutOfBoot) wait_var(gOutOfBoot);
154
155 // All threads have started boot code after this line of code.
156 // With the large staggering of 64 threads, gOutOfBoot may NEVER
157 // be zero!!!
158 // while (gOutOfBoot) wait_var(gOutOfBoot);
159
160 // All threads have finished boot code after this line of code
161 // while (top_if.th_check_enable !== gOutOfBoot) wait_var(gOutOfBoot);
162 gOutOfBoot[fromTid] = 0;
163 probe_if.gOutOfBoot[fromTid] <= gOutOfBoot[fromTid];
164 }
165 default: error("AsmToVeraIntf::marker got unknown string!\n");
166 } // case
167
168
169}